diff --git a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp index 078a745ee9bae..41927a3d3fe3c 100644 --- a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp +++ b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp @@ -788,8 +788,12 @@ GCNMaxOccupancySchedStrategy::GCNMaxOccupancySchedStrategy( SchedStages.push_back(GCNSchedStageID::UnclusteredHighRPReschedule); SchedStages.push_back(GCNSchedStageID::ClusteredLowOccupancyReschedule); SchedStages.push_back(GCNSchedStageID::PreRARematerialize); - if (IsLegacyScheduler) + // Use more accurate GCN pressure trackers. + UseGCNTrackers = true; + if (IsLegacyScheduler) { GCNTrackersOverride = std::nullopt; + UseGCNTrackers = false; + } } GCNMaxILPSchedStrategy::GCNMaxILPSchedStrategy(const MachineSchedContext *C) diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll index 18f96acb268fa..d5c077cfa93e7 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll @@ -370,62 +370,62 @@ define void @addv_7i16(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb, ptr addrs ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: flat_load_ushort v17, v[6:7] ; GFX8-NEXT: flat_load_ushort v18, v[8:9] -; GFX8-NEXT: flat_load_ushort v19, v[10:11] -; GFX8-NEXT: flat_load_ushort v20, v[12:13] -; GFX8-NEXT: flat_load_ushort v21, v[14:15] -; GFX8-NEXT: flat_load_ushort v22, v[0:1] +; GFX8-NEXT: flat_load_ushort v10, v[10:11] +; GFX8-NEXT: flat_load_ushort v11, v[12:13] +; GFX8-NEXT: flat_load_ushort v12, v[14:15] +; GFX8-NEXT: flat_load_ushort v13, v[0:1] ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 2, v2 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-NEXT: v_add_u32_e32 v6, vcc, 4, v2 ; GFX8-NEXT: v_addc_u32_e32 v7, vcc, 0, v3, vcc -; GFX8-NEXT: v_add_u32_e32 v8, vcc, 6, v2 +; GFX8-NEXT: flat_load_ushort v14, v[2:3] +; GFX8-NEXT: flat_load_ushort v15, v[0:1] +; GFX8-NEXT: flat_load_ushort v19, v[6:7] +; GFX8-NEXT: v_add_u32_e32 v0, vcc, 6, v2 +; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc +; GFX8-NEXT: v_add_u32_e32 v6, vcc, 8, v2 +; GFX8-NEXT: v_addc_u32_e32 v7, vcc, 0, v3, vcc +; GFX8-NEXT: v_add_u32_e32 v8, vcc, 10, v2 ; GFX8-NEXT: v_addc_u32_e32 v9, vcc, 0, v3, vcc -; GFX8-NEXT: v_add_u32_e32 v10, vcc, 8, v2 -; GFX8-NEXT: v_addc_u32_e32 v11, vcc, 0, v3, vcc -; GFX8-NEXT: v_add_u32_e32 v12, vcc, 10, v2 -; GFX8-NEXT: v_addc_u32_e32 v13, vcc, 0, v3, vcc -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 12, v2 -; GFX8-NEXT: v_addc_u32_e32 v15, vcc, 0, v3, vcc -; GFX8-NEXT: flat_load_ushort v2, v[2:3] -; GFX8-NEXT: flat_load_ushort v3, v[0:1] +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 12, v2 +; GFX8-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc +; GFX8-NEXT: flat_load_ushort v20, v[0:1] ; GFX8-NEXT: flat_load_ushort v6, v[6:7] ; GFX8-NEXT: flat_load_ushort v7, v[8:9] -; GFX8-NEXT: flat_load_ushort v8, v[10:11] -; GFX8-NEXT: flat_load_ushort v9, v[12:13] -; GFX8-NEXT: flat_load_ushort v10, v[14:15] +; GFX8-NEXT: flat_load_ushort v2, v[2:3] ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 2, v4 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v5, vcc ; GFX8-NEXT: s_waitcnt vmcnt(6) -; GFX8-NEXT: v_add_u16_e32 v2, v16, v2 +; GFX8-NEXT: v_add_u16_e32 v3, v16, v14 ; GFX8-NEXT: s_waitcnt vmcnt(5) -; GFX8-NEXT: v_add_u16_e32 v3, v17, v3 -; GFX8-NEXT: flat_store_short v[4:5], v2 -; GFX8-NEXT: flat_store_short v[0:1], v3 +; GFX8-NEXT: v_add_u16_e32 v8, v17, v15 +; GFX8-NEXT: flat_store_short v[4:5], v3 +; GFX8-NEXT: flat_store_short v[0:1], v8 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 4, v4 ; GFX8-NEXT: s_waitcnt vmcnt(6) -; GFX8-NEXT: v_add_u16_e32 v6, v18, v6 +; GFX8-NEXT: v_add_u16_e32 v9, v18, v19 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v5, vcc -; GFX8-NEXT: flat_store_short v[0:1], v6 +; GFX8-NEXT: flat_store_short v[0:1], v9 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 6, v4 -; GFX8-NEXT: s_waitcnt vmcnt(6) -; GFX8-NEXT: v_add_u16_e32 v7, v19, v7 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v5, vcc -; GFX8-NEXT: flat_store_short v[0:1], v7 +; GFX8-NEXT: s_waitcnt vmcnt(6) +; GFX8-NEXT: v_add_u16_e32 v10, v10, v20 +; GFX8-NEXT: flat_store_short v[0:1], v10 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 8, v4 ; GFX8-NEXT: s_waitcnt vmcnt(6) -; GFX8-NEXT: v_add_u16_e32 v8, v20, v8 +; GFX8-NEXT: v_add_u16_e32 v6, v11, v6 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v5, vcc -; GFX8-NEXT: flat_store_short v[0:1], v8 +; GFX8-NEXT: flat_store_short v[0:1], v6 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 10, v4 ; GFX8-NEXT: s_waitcnt vmcnt(6) -; GFX8-NEXT: v_add_u16_e32 v9, v21, v9 +; GFX8-NEXT: v_add_u16_e32 v7, v12, v7 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v5, vcc -; GFX8-NEXT: flat_store_short v[0:1], v9 +; GFX8-NEXT: flat_store_short v[0:1], v7 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 12, v4 ; GFX8-NEXT: s_waitcnt vmcnt(6) -; GFX8-NEXT: v_add_u16_e32 v10, v22, v10 +; GFX8-NEXT: v_add_u16_e32 v2, v13, v2 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v5, vcc -; GFX8-NEXT: flat_store_short v[0:1], v10 +; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_setpc_b64 s[30:31] ; @@ -532,29 +532,29 @@ define void @add_v9i16(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb, ptr addrs ; GFX8-NEXT: flat_load_dwordx4 v[10:13], v[2:3] ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 16, v0 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc -; GFX8-NEXT: flat_load_ushort v14, v[0:1] +; GFX8-NEXT: flat_load_ushort v16, v[0:1] ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 16, v2 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-NEXT: flat_load_ushort v0, v[0:1] +; GFX8-NEXT: v_add_u32_e32 v14, vcc, 16, v4 +; GFX8-NEXT: v_addc_u32_e32 v15, vcc, 0, v5, vcc ; GFX8-NEXT: s_waitcnt vmcnt(2) ; GFX8-NEXT: v_add_u16_e32 v1, v6, v10 ; GFX8-NEXT: v_add_u16_sdwa v2, v6, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; GFX8-NEXT: v_add_u16_e32 v3, v7, v11 -; GFX8-NEXT: v_add_u16_sdwa v10, v7, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: v_add_u16_e32 v11, v8, v12 +; GFX8-NEXT: v_add_u16_sdwa v6, v7, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 +; GFX8-NEXT: v_add_u16_e32 v7, v8, v12 ; GFX8-NEXT: v_add_u16_sdwa v8, v8, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: v_add_u16_e32 v12, v9, v13 +; GFX8-NEXT: v_add_u16_e32 v10, v9, v13 ; GFX8-NEXT: v_add_u16_sdwa v9, v9, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: v_add_u32_e32 v6, vcc, 16, v4 ; GFX8-NEXT: s_waitcnt vmcnt(0) -; GFX8-NEXT: v_add_u16_e32 v13, v14, v0 +; GFX8-NEXT: v_add_u16_e32 v11, v16, v0 ; GFX8-NEXT: v_or_b32_e32 v0, v1, v2 -; GFX8-NEXT: v_or_b32_e32 v1, v3, v10 -; GFX8-NEXT: v_or_b32_e32 v2, v11, v8 -; GFX8-NEXT: v_or_b32_e32 v3, v12, v9 -; GFX8-NEXT: v_addc_u32_e32 v7, vcc, 0, v5, vcc +; GFX8-NEXT: v_or_b32_e32 v1, v3, v6 +; GFX8-NEXT: v_or_b32_e32 v2, v7, v8 +; GFX8-NEXT: v_or_b32_e32 v3, v10, v9 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: flat_store_short v[6:7], v13 +; GFX8-NEXT: flat_store_short v[14:15], v11 ; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_setpc_b64 s[30:31] ; @@ -685,55 +685,55 @@ define void @add_v11i16(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb, ptr addr ; GFX8-LABEL: add_v11i16: ; GFX8: ; %bb.0: ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_add_u32_e32 v14, vcc, 16, v0 +; GFX8-NEXT: v_addc_u32_e32 v15, vcc, 0, v1, vcc +; GFX8-NEXT: v_add_u32_e32 v16, vcc, 18, v0 +; GFX8-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc ; GFX8-NEXT: flat_load_dwordx4 v[6:9], v[0:1] -; GFX8-NEXT: flat_load_dwordx4 v[10:13], v[2:3] -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 16, v2 -; GFX8-NEXT: v_addc_u32_e32 v15, vcc, 0, v3, vcc -; GFX8-NEXT: v_add_u32_e32 v16, vcc, 18, v2 -; GFX8-NEXT: v_addc_u32_e32 v17, vcc, 0, v3, vcc -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 20, v2 -; GFX8-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc -; GFX8-NEXT: flat_load_ushort v14, v[14:15] -; GFX8-NEXT: flat_load_ushort v15, v[16:17] -; GFX8-NEXT: flat_load_ushort v16, v[2:3] -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 16, v0 -; GFX8-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc -; GFX8-NEXT: s_waitcnt vmcnt(3) -; GFX8-NEXT: v_add_u16_e32 v17, v6, v10 -; GFX8-NEXT: v_add_u16_sdwa v10, v6, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: v_add_u32_e32 v6, vcc, 18, v0 -; GFX8-NEXT: v_add_u16_e32 v18, v7, v11 -; GFX8-NEXT: v_add_u16_sdwa v11, v7, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: v_addc_u32_e32 v7, vcc, 0, v1, vcc ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 20, v0 -; GFX8-NEXT: flat_load_ushort v2, v[2:3] -; GFX8-NEXT: flat_load_ushort v3, v[6:7] ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc -; GFX8-NEXT: flat_load_ushort v21, v[0:1] -; GFX8-NEXT: v_add_u32_e32 v6, vcc, 16, v4 -; GFX8-NEXT: v_addc_u32_e32 v7, vcc, 0, v5, vcc -; GFX8-NEXT: v_add_u16_e32 v19, v8, v12 +; GFX8-NEXT: flat_load_dwordx4 v[10:13], v[2:3] +; GFX8-NEXT: flat_load_ushort v18, v[14:15] +; GFX8-NEXT: flat_load_ushort v16, v[16:17] +; GFX8-NEXT: flat_load_ushort v17, v[0:1] +; GFX8-NEXT: v_add_u32_e32 v0, vcc, 16, v2 +; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc +; GFX8-NEXT: v_add_u32_e32 v14, vcc, 18, v2 +; GFX8-NEXT: v_addc_u32_e32 v15, vcc, 0, v3, vcc +; GFX8-NEXT: flat_load_ushort v19, v[0:1] +; GFX8-NEXT: flat_load_ushort v20, v[14:15] +; GFX8-NEXT: v_add_u32_e32 v0, vcc, 20, v2 +; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc +; GFX8-NEXT: flat_load_ushort v0, v[0:1] +; GFX8-NEXT: v_add_u32_e32 v14, vcc, 16, v4 +; GFX8-NEXT: v_addc_u32_e32 v15, vcc, 0, v5, vcc +; GFX8-NEXT: s_waitcnt vmcnt(6) +; GFX8-NEXT: v_add_u16_e32 v1, v6, v10 +; GFX8-NEXT: v_add_u16_sdwa v2, v6, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 +; GFX8-NEXT: v_add_u32_e32 v6, vcc, 18, v4 +; GFX8-NEXT: v_add_u16_e32 v3, v7, v11 +; GFX8-NEXT: v_add_u16_sdwa v10, v7, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 +; GFX8-NEXT: v_add_u16_e32 v11, v8, v12 ; GFX8-NEXT: v_add_u16_sdwa v12, v8, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: v_add_u32_e32 v8, vcc, 18, v4 -; GFX8-NEXT: v_add_u16_e32 v20, v9, v13 +; GFX8-NEXT: v_add_u16_e32 v21, v9, v13 ; GFX8-NEXT: v_add_u16_sdwa v13, v9, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: v_addc_u32_e32 v9, vcc, 0, v5, vcc -; GFX8-NEXT: v_or_b32_e32 v0, v17, v10 -; GFX8-NEXT: v_or_b32_e32 v1, v18, v11 -; GFX8-NEXT: v_add_u32_e32 v10, vcc, 20, v4 -; GFX8-NEXT: v_addc_u32_e32 v11, vcc, 0, v5, vcc +; GFX8-NEXT: v_addc_u32_e32 v7, vcc, 0, v5, vcc +; GFX8-NEXT: v_add_u32_e32 v8, vcc, 20, v4 ; GFX8-NEXT: s_waitcnt vmcnt(2) -; GFX8-NEXT: v_add_u16_e32 v14, v2, v14 +; GFX8-NEXT: v_add_u16_e32 v18, v18, v19 ; GFX8-NEXT: s_waitcnt vmcnt(1) -; GFX8-NEXT: v_add_u16_e32 v15, v3, v15 -; GFX8-NEXT: v_or_b32_e32 v2, v19, v12 -; GFX8-NEXT: v_or_b32_e32 v3, v20, v13 +; GFX8-NEXT: v_add_u16_e32 v16, v16, v20 +; GFX8-NEXT: v_addc_u32_e32 v9, vcc, 0, v5, vcc ; GFX8-NEXT: s_waitcnt vmcnt(0) -; GFX8-NEXT: v_add_u16_e32 v16, v21, v16 +; GFX8-NEXT: v_add_u16_e32 v17, v17, v0 +; GFX8-NEXT: v_or_b32_e32 v0, v1, v2 +; GFX8-NEXT: v_or_b32_e32 v1, v3, v10 +; GFX8-NEXT: v_or_b32_e32 v2, v11, v12 +; GFX8-NEXT: v_or_b32_e32 v3, v21, v13 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: flat_store_short v[6:7], v14 -; GFX8-NEXT: flat_store_short v[8:9], v15 -; GFX8-NEXT: flat_store_short v[10:11], v16 +; GFX8-NEXT: flat_store_short v[14:15], v18 +; GFX8-NEXT: flat_store_short v[6:7], v16 +; GFX8-NEXT: flat_store_short v[8:9], v17 ; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_setpc_b64 s[30:31] ; @@ -825,34 +825,34 @@ define void @add_v12i16(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb, ptr addr ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: flat_load_dwordx4 v[6:9], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[10:13], v[2:3] -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 16, v2 -; GFX8-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 16, v0 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc -; GFX8-NEXT: flat_load_dwordx2 v[14:15], v[2:3] -; GFX8-NEXT: s_waitcnt vmcnt(1) -; GFX8-NEXT: v_add_u16_e32 v2, v6, v10 -; GFX8-NEXT: v_add_u16_sdwa v3, v6, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: v_add_u16_e32 v10, v7, v11 -; GFX8-NEXT: v_add_u16_sdwa v11, v7, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: flat_load_dwordx2 v[6:7], v[0:1] -; GFX8-NEXT: v_add_u16_e32 v16, v8, v12 -; GFX8-NEXT: v_add_u16_sdwa v8, v8, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: v_add_u16_e32 v12, v9, v13 +; GFX8-NEXT: flat_load_dwordx2 v[14:15], v[0:1] +; GFX8-NEXT: v_add_u32_e32 v0, vcc, 16, v2 +; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc +; GFX8-NEXT: flat_load_dwordx2 v[16:17], v[0:1] +; GFX8-NEXT: s_waitcnt vmcnt(2) +; GFX8-NEXT: v_add_u16_e32 v0, v6, v10 +; GFX8-NEXT: v_add_u16_sdwa v1, v6, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 +; GFX8-NEXT: v_add_u16_e32 v2, v7, v11 +; GFX8-NEXT: v_add_u16_sdwa v3, v7, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 +; GFX8-NEXT: v_add_u16_e32 v6, v8, v12 +; GFX8-NEXT: v_add_u16_sdwa v7, v8, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 +; GFX8-NEXT: v_add_u16_e32 v8, v9, v13 ; GFX8-NEXT: v_add_u16_sdwa v9, v9, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: v_or_b32_e32 v0, v2, v3 -; GFX8-NEXT: v_or_b32_e32 v1, v10, v11 -; GFX8-NEXT: v_or_b32_e32 v2, v16, v8 -; GFX8-NEXT: v_or_b32_e32 v3, v12, v9 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX8-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX8-NEXT: v_or_b32_e32 v2, v6, v7 +; GFX8-NEXT: v_or_b32_e32 v3, v8, v9 +; GFX8-NEXT: s_waitcnt vmcnt(0) +; GFX8-NEXT: v_add_u16_e32 v6, v14, v16 +; GFX8-NEXT: v_add_u16_sdwa v7, v14, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 +; GFX8-NEXT: v_add_u16_e32 v8, v15, v17 +; GFX8-NEXT: v_add_u16_sdwa v9, v15, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_waitcnt vmcnt(1) -; GFX8-NEXT: v_add_u16_e32 v8, v6, v14 -; GFX8-NEXT: v_add_u16_sdwa v6, v6, v14 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 -; GFX8-NEXT: v_add_u16_e32 v9, v7, v15 -; GFX8-NEXT: v_add_u16_sdwa v7, v7, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 +; GFX8-NEXT: v_or_b32_e32 v6, v6, v7 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 16, v4 -; GFX8-NEXT: v_or_b32_e32 v6, v8, v6 -; GFX8-NEXT: v_or_b32_e32 v7, v9, v7 +; GFX8-NEXT: v_or_b32_e32 v7, v8, v9 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v5, vcc ; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[6:7] ; GFX8-NEXT: s_waitcnt vmcnt(0) diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll index c575bc4e5e129..33f1fe6b60a81 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll @@ -751,8 +751,8 @@ define <4 x double> @test_f64_add_mul(<4 x double> %a, <4 x double> %b, <4 x dou ; GFX9-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] ; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) ; GFX9-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[24:25] -; GFX9-CONTRACT-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-CONTRACT-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:28 +; GFX9-CONTRACT-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-CONTRACT-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:32 ; GFX9-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] ; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) @@ -777,8 +777,8 @@ define <4 x double> @test_f64_add_mul(<4 x double> %a, <4 x double> %b, <4 x dou ; GFX9-DENORM-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] ; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) ; GFX9-DENORM-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[24:25] -; GFX9-DENORM-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-DENORM-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:28 +; GFX9-DENORM-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-DENORM-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:32 ; GFX9-DENORM-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] ; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) @@ -922,8 +922,8 @@ define <4 x double> @test_f64_add_mul_rhs(<4 x double> %a, <4 x double> %b, <4 x ; GFX9-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] ; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) ; GFX9-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[24:25] -; GFX9-CONTRACT-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-CONTRACT-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:28 +; GFX9-CONTRACT-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-CONTRACT-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:32 ; GFX9-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] ; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) @@ -948,8 +948,8 @@ define <4 x double> @test_f64_add_mul_rhs(<4 x double> %a, <4 x double> %b, <4 x ; GFX9-DENORM-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] ; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) ; GFX9-DENORM-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[24:25] -; GFX9-DENORM-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-DENORM-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:28 +; GFX9-DENORM-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-DENORM-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:32 ; GFX9-DENORM-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] ; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll index 958dd4cce4424..52df703747c87 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll @@ -757,9 +757,9 @@ define <2 x double> @v_fdiv_v2f64(<2 x double> %a, <2 x double> %b) { ; GFX6-NEXT: v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0 ; GFX6-NEXT: v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] ; GFX6-NEXT: v_mul_f64 v[16:17], v[18:19], v[10:11] -; GFX6-NEXT: v_fma_f64 v[18:19], -v[8:9], v[16:17], v[18:19] +; GFX6-NEXT: v_fma_f64 v[20:21], -v[8:9], v[16:17], v[18:19] ; GFX6-NEXT: v_fma_f64 v[8:9], -v[12:13], v[14:15], 1.0 -; GFX6-NEXT: v_div_fmas_f64 v[10:11], v[18:19], v[10:11], v[16:17] +; GFX6-NEXT: v_div_fmas_f64 v[10:11], v[20:21], v[10:11], v[16:17] ; GFX6-NEXT: v_fma_f64 v[8:9], v[14:15], v[8:9], v[14:15] ; GFX6-NEXT: v_div_scale_f64 v[14:15], s[6:7], v[2:3], v[6:7], v[2:3] ; GFX6-NEXT: v_div_fixup_f64 v[0:1], v[10:11], v[4:5], v[0:1] @@ -990,9 +990,9 @@ define <2 x double> @v_fdiv_v2f64_ulp25(<2 x double> %a, <2 x double> %b) { ; GFX6-NEXT: v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0 ; GFX6-NEXT: v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] ; GFX6-NEXT: v_mul_f64 v[16:17], v[18:19], v[10:11] -; GFX6-NEXT: v_fma_f64 v[18:19], -v[8:9], v[16:17], v[18:19] +; GFX6-NEXT: v_fma_f64 v[20:21], -v[8:9], v[16:17], v[18:19] ; GFX6-NEXT: v_fma_f64 v[8:9], -v[12:13], v[14:15], 1.0 -; GFX6-NEXT: v_div_fmas_f64 v[10:11], v[18:19], v[10:11], v[16:17] +; GFX6-NEXT: v_div_fmas_f64 v[10:11], v[20:21], v[10:11], v[16:17] ; GFX6-NEXT: v_fma_f64 v[8:9], v[14:15], v[8:9], v[14:15] ; GFX6-NEXT: v_div_scale_f64 v[14:15], s[6:7], v[2:3], v[6:7], v[2:3] ; GFX6-NEXT: v_div_fixup_f64 v[0:1], v[10:11], v[4:5], v[0:1] @@ -1134,35 +1134,34 @@ define <2 x double> @v_rcp_v2f64(<2 x double> %x) { ; GFX6: ; %bb.0: ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX6-NEXT: v_div_scale_f64 v[4:5], s[4:5], v[0:1], v[0:1], 1.0 -; GFX6-NEXT: v_div_scale_f64 v[10:11], s[4:5], v[2:3], v[2:3], 1.0 -; GFX6-NEXT: v_div_scale_f64 v[8:9], s[4:5], 1.0, v[0:1], 1.0 -; GFX6-NEXT: v_mov_b32_e32 v18, 0x3ff00000 +; GFX6-NEXT: v_div_scale_f64 v[8:9], s[4:5], v[2:3], v[2:3], 1.0 +; GFX6-NEXT: v_div_scale_f64 v[10:11], s[4:5], 1.0, v[0:1], 1.0 +; GFX6-NEXT: v_div_scale_f64 v[18:19], s[4:5], 1.0, v[2:3], 1.0 ; GFX6-NEXT: v_rcp_f64_e32 v[6:7], v[4:5] +; GFX6-NEXT: v_rcp_f64_e32 v[14:15], v[8:9] +; GFX6-NEXT: v_mov_b32_e32 v20, 0x3ff00000 +; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v11, v20 +; GFX6-NEXT: v_fma_f64 v[12:13], -v[4:5], v[6:7], 1.0 +; GFX6-NEXT: v_fma_f64 v[16:17], -v[8:9], v[14:15], 1.0 +; GFX6-NEXT: v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7] ; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v5 -; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v9, v18 -; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5] ; GFX6-NEXT: v_fma_f64 v[12:13], -v[4:5], v[6:7], 1.0 -; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v11 +; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5] ; GFX6-NEXT: v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7] -; GFX6-NEXT: v_rcp_f64_e32 v[12:13], v[10:11] -; GFX6-NEXT: v_fma_f64 v[14:15], -v[4:5], v[6:7], 1.0 -; GFX6-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[6:7] -; GFX6-NEXT: v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0 -; GFX6-NEXT: v_mul_f64 v[16:17], v[8:9], v[6:7] -; GFX6-NEXT: v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13] -; GFX6-NEXT: v_fma_f64 v[4:5], -v[4:5], v[16:17], v[8:9] -; GFX6-NEXT: v_fma_f64 v[8:9], -v[10:11], v[12:13], 1.0 -; GFX6-NEXT: v_div_scale_f64 v[14:15], s[6:7], 1.0, v[2:3], 1.0 -; GFX6-NEXT: v_fma_f64 v[8:9], v[12:13], v[8:9], v[12:13] -; GFX6-NEXT: v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[16:17] -; GFX6-NEXT: v_mul_f64 v[12:13], v[14:15], v[8:9] -; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v15, v18 -; GFX6-NEXT: v_fma_f64 v[6:7], -v[10:11], v[12:13], v[14:15] +; GFX6-NEXT: v_fma_f64 v[12:13], v[14:15], v[16:17], v[14:15] +; GFX6-NEXT: v_mul_f64 v[14:15], v[10:11], v[6:7] +; GFX6-NEXT: v_fma_f64 v[16:17], -v[8:9], v[12:13], 1.0 +; GFX6-NEXT: v_fma_f64 v[10:11], -v[4:5], v[14:15], v[10:11] +; GFX6-NEXT: v_fma_f64 v[4:5], v[12:13], v[16:17], v[12:13] +; GFX6-NEXT: v_div_fmas_f64 v[6:7], v[10:11], v[6:7], v[14:15] +; GFX6-NEXT: v_mul_f64 v[12:13], v[18:19], v[4:5] +; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v19, v20 +; GFX6-NEXT: v_fma_f64 v[10:11], -v[8:9], v[12:13], v[18:19] +; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v9 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5] -; GFX6-NEXT: v_div_fixup_f64 v[0:1], v[4:5], v[0:1], 1.0 -; GFX6-NEXT: s_nop 0 -; GFX6-NEXT: v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13] -; GFX6-NEXT: v_div_fixup_f64 v[2:3], v[6:7], v[2:3], 1.0 +; GFX6-NEXT: v_div_fixup_f64 v[0:1], v[6:7], v[0:1], 1.0 +; GFX6-NEXT: v_div_fmas_f64 v[4:5], v[10:11], v[4:5], v[12:13] +; GFX6-NEXT: v_div_fixup_f64 v[2:3], v[4:5], v[2:3], 1.0 ; GFX6-NEXT: s_setpc_b64 s[30:31] ; ; GFX8-LABEL: v_rcp_v2f64: @@ -1294,35 +1293,34 @@ define <2 x double> @v_rcp_v2f64_arcp(<2 x double> %x) { ; GFX6: ; %bb.0: ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX6-NEXT: v_div_scale_f64 v[4:5], s[4:5], v[0:1], v[0:1], 1.0 -; GFX6-NEXT: v_div_scale_f64 v[10:11], s[4:5], v[2:3], v[2:3], 1.0 -; GFX6-NEXT: v_div_scale_f64 v[8:9], s[4:5], 1.0, v[0:1], 1.0 -; GFX6-NEXT: v_mov_b32_e32 v18, 0x3ff00000 +; GFX6-NEXT: v_div_scale_f64 v[8:9], s[4:5], v[2:3], v[2:3], 1.0 +; GFX6-NEXT: v_div_scale_f64 v[10:11], s[4:5], 1.0, v[0:1], 1.0 +; GFX6-NEXT: v_div_scale_f64 v[18:19], s[4:5], 1.0, v[2:3], 1.0 ; GFX6-NEXT: v_rcp_f64_e32 v[6:7], v[4:5] +; GFX6-NEXT: v_rcp_f64_e32 v[14:15], v[8:9] +; GFX6-NEXT: v_mov_b32_e32 v20, 0x3ff00000 +; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v11, v20 +; GFX6-NEXT: v_fma_f64 v[12:13], -v[4:5], v[6:7], 1.0 +; GFX6-NEXT: v_fma_f64 v[16:17], -v[8:9], v[14:15], 1.0 +; GFX6-NEXT: v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7] ; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v5 -; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v9, v18 -; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5] ; GFX6-NEXT: v_fma_f64 v[12:13], -v[4:5], v[6:7], 1.0 -; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v11 +; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5] ; GFX6-NEXT: v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7] -; GFX6-NEXT: v_rcp_f64_e32 v[12:13], v[10:11] -; GFX6-NEXT: v_fma_f64 v[14:15], -v[4:5], v[6:7], 1.0 -; GFX6-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[6:7] -; GFX6-NEXT: v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0 -; GFX6-NEXT: v_mul_f64 v[16:17], v[8:9], v[6:7] -; GFX6-NEXT: v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13] -; GFX6-NEXT: v_fma_f64 v[4:5], -v[4:5], v[16:17], v[8:9] -; GFX6-NEXT: v_fma_f64 v[8:9], -v[10:11], v[12:13], 1.0 -; GFX6-NEXT: v_div_scale_f64 v[14:15], s[6:7], 1.0, v[2:3], 1.0 -; GFX6-NEXT: v_fma_f64 v[8:9], v[12:13], v[8:9], v[12:13] -; GFX6-NEXT: v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[16:17] -; GFX6-NEXT: v_mul_f64 v[12:13], v[14:15], v[8:9] -; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v15, v18 -; GFX6-NEXT: v_fma_f64 v[6:7], -v[10:11], v[12:13], v[14:15] +; GFX6-NEXT: v_fma_f64 v[12:13], v[14:15], v[16:17], v[14:15] +; GFX6-NEXT: v_mul_f64 v[14:15], v[10:11], v[6:7] +; GFX6-NEXT: v_fma_f64 v[16:17], -v[8:9], v[12:13], 1.0 +; GFX6-NEXT: v_fma_f64 v[10:11], -v[4:5], v[14:15], v[10:11] +; GFX6-NEXT: v_fma_f64 v[4:5], v[12:13], v[16:17], v[12:13] +; GFX6-NEXT: v_div_fmas_f64 v[6:7], v[10:11], v[6:7], v[14:15] +; GFX6-NEXT: v_mul_f64 v[12:13], v[18:19], v[4:5] +; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v19, v20 +; GFX6-NEXT: v_fma_f64 v[10:11], -v[8:9], v[12:13], v[18:19] +; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v9 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5] -; GFX6-NEXT: v_div_fixup_f64 v[0:1], v[4:5], v[0:1], 1.0 -; GFX6-NEXT: s_nop 0 -; GFX6-NEXT: v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13] -; GFX6-NEXT: v_div_fixup_f64 v[2:3], v[6:7], v[2:3], 1.0 +; GFX6-NEXT: v_div_fixup_f64 v[0:1], v[6:7], v[0:1], 1.0 +; GFX6-NEXT: v_div_fmas_f64 v[4:5], v[10:11], v[4:5], v[12:13] +; GFX6-NEXT: v_div_fixup_f64 v[2:3], v[4:5], v[2:3], 1.0 ; GFX6-NEXT: s_setpc_b64 s[30:31] ; ; GFX8-LABEL: v_rcp_v2f64_arcp: @@ -1521,35 +1519,34 @@ define <2 x double> @v_rcp_v2f64_ulp25(<2 x double> %x) { ; GFX6: ; %bb.0: ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX6-NEXT: v_div_scale_f64 v[4:5], s[4:5], v[0:1], v[0:1], 1.0 -; GFX6-NEXT: v_div_scale_f64 v[10:11], s[4:5], v[2:3], v[2:3], 1.0 -; GFX6-NEXT: v_div_scale_f64 v[8:9], s[4:5], 1.0, v[0:1], 1.0 -; GFX6-NEXT: v_mov_b32_e32 v18, 0x3ff00000 +; GFX6-NEXT: v_div_scale_f64 v[8:9], s[4:5], v[2:3], v[2:3], 1.0 +; GFX6-NEXT: v_div_scale_f64 v[10:11], s[4:5], 1.0, v[0:1], 1.0 +; GFX6-NEXT: v_div_scale_f64 v[18:19], s[4:5], 1.0, v[2:3], 1.0 ; GFX6-NEXT: v_rcp_f64_e32 v[6:7], v[4:5] +; GFX6-NEXT: v_rcp_f64_e32 v[14:15], v[8:9] +; GFX6-NEXT: v_mov_b32_e32 v20, 0x3ff00000 +; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v11, v20 +; GFX6-NEXT: v_fma_f64 v[12:13], -v[4:5], v[6:7], 1.0 +; GFX6-NEXT: v_fma_f64 v[16:17], -v[8:9], v[14:15], 1.0 +; GFX6-NEXT: v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7] ; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v5 -; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v9, v18 -; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5] ; GFX6-NEXT: v_fma_f64 v[12:13], -v[4:5], v[6:7], 1.0 -; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v11 +; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5] ; GFX6-NEXT: v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7] -; GFX6-NEXT: v_rcp_f64_e32 v[12:13], v[10:11] -; GFX6-NEXT: v_fma_f64 v[14:15], -v[4:5], v[6:7], 1.0 -; GFX6-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[6:7] -; GFX6-NEXT: v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0 -; GFX6-NEXT: v_mul_f64 v[16:17], v[8:9], v[6:7] -; GFX6-NEXT: v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13] -; GFX6-NEXT: v_fma_f64 v[4:5], -v[4:5], v[16:17], v[8:9] -; GFX6-NEXT: v_fma_f64 v[8:9], -v[10:11], v[12:13], 1.0 -; GFX6-NEXT: v_div_scale_f64 v[14:15], s[6:7], 1.0, v[2:3], 1.0 -; GFX6-NEXT: v_fma_f64 v[8:9], v[12:13], v[8:9], v[12:13] -; GFX6-NEXT: v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[16:17] -; GFX6-NEXT: v_mul_f64 v[12:13], v[14:15], v[8:9] -; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v15, v18 -; GFX6-NEXT: v_fma_f64 v[6:7], -v[10:11], v[12:13], v[14:15] +; GFX6-NEXT: v_fma_f64 v[12:13], v[14:15], v[16:17], v[14:15] +; GFX6-NEXT: v_mul_f64 v[14:15], v[10:11], v[6:7] +; GFX6-NEXT: v_fma_f64 v[16:17], -v[8:9], v[12:13], 1.0 +; GFX6-NEXT: v_fma_f64 v[10:11], -v[4:5], v[14:15], v[10:11] +; GFX6-NEXT: v_fma_f64 v[4:5], v[12:13], v[16:17], v[12:13] +; GFX6-NEXT: v_div_fmas_f64 v[6:7], v[10:11], v[6:7], v[14:15] +; GFX6-NEXT: v_mul_f64 v[12:13], v[18:19], v[4:5] +; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, v19, v20 +; GFX6-NEXT: v_fma_f64 v[10:11], -v[8:9], v[12:13], v[18:19] +; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v9 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5] -; GFX6-NEXT: v_div_fixup_f64 v[0:1], v[4:5], v[0:1], 1.0 -; GFX6-NEXT: s_nop 0 -; GFX6-NEXT: v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13] -; GFX6-NEXT: v_div_fixup_f64 v[2:3], v[6:7], v[2:3], 1.0 +; GFX6-NEXT: v_div_fixup_f64 v[0:1], v[6:7], v[0:1], 1.0 +; GFX6-NEXT: v_div_fmas_f64 v[4:5], v[10:11], v[4:5], v[12:13] +; GFX6-NEXT: v_div_fixup_f64 v[2:3], v[4:5], v[2:3], 1.0 ; GFX6-NEXT: s_setpc_b64 s[30:31] ; ; GFX8-LABEL: v_rcp_v2f64_ulp25: @@ -1770,9 +1767,9 @@ define <2 x double> @v_fdiv_v2f64_arcp_ulp25(<2 x double> %a, <2 x double> %b) { ; GFX6-NEXT: v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0 ; GFX6-NEXT: v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] ; GFX6-NEXT: v_mul_f64 v[16:17], v[18:19], v[10:11] -; GFX6-NEXT: v_fma_f64 v[18:19], -v[8:9], v[16:17], v[18:19] +; GFX6-NEXT: v_fma_f64 v[20:21], -v[8:9], v[16:17], v[18:19] ; GFX6-NEXT: v_fma_f64 v[8:9], -v[12:13], v[14:15], 1.0 -; GFX6-NEXT: v_div_fmas_f64 v[10:11], v[18:19], v[10:11], v[16:17] +; GFX6-NEXT: v_div_fmas_f64 v[10:11], v[20:21], v[10:11], v[16:17] ; GFX6-NEXT: v_fma_f64 v[8:9], v[14:15], v[8:9], v[14:15] ; GFX6-NEXT: v_div_scale_f64 v[14:15], s[6:7], v[2:3], v[6:7], v[2:3] ; GFX6-NEXT: v_div_fixup_f64 v[0:1], v[10:11], v[4:5], v[0:1] diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll index 7b62737a79bb7..2b97db68747af 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll @@ -6469,99 +6469,99 @@ define i128 @v_fshl_i128(i128 %lhs, i128 %rhs, i128 %amt) { ; GFX6-LABEL: v_fshl_i128: ; GFX6: ; %bb.0: ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX6-NEXT: v_and_b32_e32 v16, 0x7f, v8 -; GFX6-NEXT: v_sub_i32_e32 v9, vcc, 64, v16 -; GFX6-NEXT: v_add_i32_e32 v18, vcc, 0xffffffc0, v16 +; GFX6-NEXT: v_and_b32_e32 v14, 0x7f, v8 +; GFX6-NEXT: v_sub_i32_e32 v9, vcc, 64, v14 ; GFX6-NEXT: v_lshr_b64 v[9:10], v[0:1], v9 -; GFX6-NEXT: v_lshl_b64 v[11:12], v[2:3], v16 -; GFX6-NEXT: v_lshl_b64 v[13:14], v[0:1], v16 -; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], v18 -; GFX6-NEXT: v_or_b32_e32 v9, v9, v11 -; GFX6-NEXT: v_or_b32_e32 v10, v10, v12 -; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v16 -; GFX6-NEXT: v_cndmask_b32_e32 v11, 0, v13, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v12, 0, v14, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc -; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16 -; GFX6-NEXT: v_cndmask_b32_e32 v10, v0, v2, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v13, v1, v3, vcc +; GFX6-NEXT: v_lshl_b64 v[11:12], v[2:3], v14 +; GFX6-NEXT: v_add_i32_e32 v16, vcc, 0xffffffc0, v14 +; GFX6-NEXT: v_or_b32_e32 v11, v9, v11 +; GFX6-NEXT: v_or_b32_e32 v12, v10, v12 +; GFX6-NEXT: v_lshl_b64 v[9:10], v[0:1], v14 +; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], v16 +; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v14 +; GFX6-NEXT: v_cndmask_b32_e32 v16, 0, v9, vcc +; GFX6-NEXT: v_cndmask_b32_e32 v10, 0, v10, vcc +; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v11, vcc +; GFX6-NEXT: v_cndmask_b32_e32 v1, v1, v12, vcc +; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, 0, v14 +; GFX6-NEXT: v_cndmask_b32_e32 v11, v0, v2, vcc +; GFX6-NEXT: v_cndmask_b32_e32 v12, v1, v3, vcc ; GFX6-NEXT: v_lshr_b64 v[0:1], v[4:5], 1 -; GFX6-NEXT: v_mov_b32_e32 v15, 0x7f +; GFX6-NEXT: v_mov_b32_e32 v13, 0x7f ; GFX6-NEXT: v_lshlrev_b32_e32 v2, 31, v6 ; GFX6-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX6-NEXT: v_lshr_b64 v[2:3], v[6:7], 1 -; GFX6-NEXT: v_bfi_b32 v14, v8, 0, v15 -; GFX6-NEXT: v_not_b32_e32 v17, 63 -; GFX6-NEXT: v_sub_i32_e32 v6, vcc, 64, v14 -; GFX6-NEXT: v_add_i32_e32 v15, vcc, v14, v17 -; GFX6-NEXT: v_lshr_b64 v[4:5], v[0:1], v14 +; GFX6-NEXT: v_bfi_b32 v13, v8, 0, v13 +; GFX6-NEXT: v_not_b32_e32 v15, 63 +; GFX6-NEXT: v_sub_i32_e32 v6, vcc, 64, v13 +; GFX6-NEXT: v_add_i32_e32 v14, vcc, v13, v15 +; GFX6-NEXT: v_lshr_b64 v[4:5], v[0:1], v13 ; GFX6-NEXT: v_lshl_b64 v[6:7], v[2:3], v6 -; GFX6-NEXT: v_lshr_b64 v[8:9], v[2:3], v14 -; GFX6-NEXT: v_lshr_b64 v[2:3], v[2:3], v15 +; GFX6-NEXT: v_lshr_b64 v[8:9], v[2:3], v13 +; GFX6-NEXT: v_lshr_b64 v[2:3], v[2:3], v14 ; GFX6-NEXT: v_or_b32_e32 v4, v4, v6 ; GFX6-NEXT: v_or_b32_e32 v5, v5, v7 -; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v14 +; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v13 ; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc -; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v14 +; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v13 ; GFX6-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5] ; GFX6-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5] ; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v3, 0, v9, vcc -; GFX6-NEXT: v_or_b32_e32 v0, v11, v0 -; GFX6-NEXT: v_or_b32_e32 v1, v12, v1 -; GFX6-NEXT: v_or_b32_e32 v2, v10, v2 -; GFX6-NEXT: v_or_b32_e32 v3, v13, v3 +; GFX6-NEXT: v_or_b32_e32 v0, v16, v0 +; GFX6-NEXT: v_or_b32_e32 v1, v10, v1 +; GFX6-NEXT: v_or_b32_e32 v2, v11, v2 +; GFX6-NEXT: v_or_b32_e32 v3, v12, v3 ; GFX6-NEXT: s_setpc_b64 s[30:31] ; ; GFX8-LABEL: v_fshl_i128: ; GFX8: ; %bb.0: ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX8-NEXT: v_and_b32_e32 v16, 0x7f, v8 -; GFX8-NEXT: v_sub_u32_e32 v9, vcc, 64, v16 -; GFX8-NEXT: v_add_u32_e32 v18, vcc, 0xffffffc0, v16 +; GFX8-NEXT: v_and_b32_e32 v14, 0x7f, v8 +; GFX8-NEXT: v_sub_u32_e32 v9, vcc, 64, v14 ; GFX8-NEXT: v_lshrrev_b64 v[9:10], v9, v[0:1] -; GFX8-NEXT: v_lshlrev_b64 v[11:12], v16, v[2:3] -; GFX8-NEXT: v_lshlrev_b64 v[13:14], v16, v[0:1] -; GFX8-NEXT: v_lshlrev_b64 v[0:1], v18, v[0:1] -; GFX8-NEXT: v_or_b32_e32 v9, v9, v11 -; GFX8-NEXT: v_or_b32_e32 v10, v10, v12 -; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v16 -; GFX8-NEXT: v_cndmask_b32_e32 v11, 0, v13, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v12, 0, v14, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc -; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16 -; GFX8-NEXT: v_cndmask_b32_e32 v10, v0, v2, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v13, v1, v3, vcc +; GFX8-NEXT: v_lshlrev_b64 v[11:12], v14, v[2:3] +; GFX8-NEXT: v_add_u32_e32 v16, vcc, 0xffffffc0, v14 +; GFX8-NEXT: v_or_b32_e32 v11, v9, v11 +; GFX8-NEXT: v_or_b32_e32 v12, v10, v12 +; GFX8-NEXT: v_lshlrev_b64 v[9:10], v14, v[0:1] +; GFX8-NEXT: v_lshlrev_b64 v[0:1], v16, v[0:1] +; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v14 +; GFX8-NEXT: v_cndmask_b32_e32 v16, 0, v9, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v10, 0, v10, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v11, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v12, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v14 +; GFX8-NEXT: v_cndmask_b32_e32 v11, v0, v2, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v12, v1, v3, vcc ; GFX8-NEXT: v_lshrrev_b64 v[0:1], 1, v[4:5] -; GFX8-NEXT: v_mov_b32_e32 v15, 0x7f +; GFX8-NEXT: v_mov_b32_e32 v13, 0x7f ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 31, v6 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX8-NEXT: v_lshrrev_b64 v[2:3], 1, v[6:7] -; GFX8-NEXT: v_bfi_b32 v14, v8, 0, v15 -; GFX8-NEXT: v_not_b32_e32 v17, 63 -; GFX8-NEXT: v_sub_u32_e32 v6, vcc, 64, v14 -; GFX8-NEXT: v_add_u32_e32 v15, vcc, v14, v17 -; GFX8-NEXT: v_lshrrev_b64 v[4:5], v14, v[0:1] +; GFX8-NEXT: v_bfi_b32 v13, v8, 0, v13 +; GFX8-NEXT: v_not_b32_e32 v15, 63 +; GFX8-NEXT: v_sub_u32_e32 v6, vcc, 64, v13 +; GFX8-NEXT: v_add_u32_e32 v14, vcc, v13, v15 +; GFX8-NEXT: v_lshrrev_b64 v[4:5], v13, v[0:1] ; GFX8-NEXT: v_lshlrev_b64 v[6:7], v6, v[2:3] -; GFX8-NEXT: v_lshrrev_b64 v[8:9], v14, v[2:3] -; GFX8-NEXT: v_lshrrev_b64 v[2:3], v15, v[2:3] +; GFX8-NEXT: v_lshrrev_b64 v[8:9], v13, v[2:3] +; GFX8-NEXT: v_lshrrev_b64 v[2:3], v14, v[2:3] ; GFX8-NEXT: v_or_b32_e32 v4, v4, v6 ; GFX8-NEXT: v_or_b32_e32 v5, v5, v7 -; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v14 +; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v13 ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc -; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v14 +; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v13 ; GFX8-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, 0, v9, vcc -; GFX8-NEXT: v_or_b32_e32 v0, v11, v0 -; GFX8-NEXT: v_or_b32_e32 v1, v12, v1 -; GFX8-NEXT: v_or_b32_e32 v2, v10, v2 -; GFX8-NEXT: v_or_b32_e32 v3, v13, v3 +; GFX8-NEXT: v_or_b32_e32 v0, v16, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v10, v1 +; GFX8-NEXT: v_or_b32_e32 v2, v11, v2 +; GFX8-NEXT: v_or_b32_e32 v3, v12, v3 ; GFX8-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: v_fshl_i128: @@ -6569,9 +6569,9 @@ define i128 @v_fshl_i128(i128 %lhs, i128 %rhs, i128 %amt) { ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: v_and_b32_e32 v16, 0x7f, v8 ; GFX9-NEXT: v_sub_u32_e32 v9, 64, v16 -; GFX9-NEXT: v_add_u32_e32 v17, 0xffffffc0, v16 ; GFX9-NEXT: v_lshrrev_b64 v[9:10], v9, v[0:1] ; GFX9-NEXT: v_lshlrev_b64 v[11:12], v16, v[2:3] +; GFX9-NEXT: v_add_u32_e32 v17, 0xffffffc0, v16 ; GFX9-NEXT: v_lshlrev_b64 v[13:14], v16, v[0:1] ; GFX9-NEXT: v_lshlrev_b64 v[0:1], v17, v[0:1] ; GFX9-NEXT: v_or_b32_e32 v9, v9, v11 @@ -8137,271 +8137,271 @@ define <2 x i128> @v_fshl_v2i128(<2 x i128> %lhs, <2 x i128> %rhs, <2 x i128> %a ; GFX6-LABEL: v_fshl_v2i128: ; GFX6: ; %bb.0: ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX6-NEXT: v_lshr_b64 v[23:24], v[8:9], 1 ; GFX6-NEXT: v_and_b32_e32 v19, 0x7f, v16 -; GFX6-NEXT: v_lshlrev_b32_e32 v8, 31, v10 ; GFX6-NEXT: v_sub_i32_e32 v17, vcc, 64, v19 -; GFX6-NEXT: v_or_b32_e32 v24, v24, v8 -; GFX6-NEXT: v_mov_b32_e32 v8, 0x7f ; GFX6-NEXT: v_lshr_b64 v[17:18], v[0:1], v17 ; GFX6-NEXT: v_lshl_b64 v[21:22], v[2:3], v19 -; GFX6-NEXT: v_lshr_b64 v[9:10], v[10:11], 1 -; GFX6-NEXT: v_bfi_b32 v11, v16, 0, v8 -; GFX6-NEXT: v_sub_i32_e32 v16, vcc, 64, v11 +; GFX6-NEXT: v_not_b32_e32 v23, 63 ; GFX6-NEXT: v_or_b32_e32 v21, v17, v21 -; GFX6-NEXT: v_lshl_b64 v[16:17], v[9:10], v16 -; GFX6-NEXT: v_lshr_b64 v[25:26], v[23:24], v11 -; GFX6-NEXT: v_or_b32_e32 v18, v18, v22 -; GFX6-NEXT: v_or_b32_e32 v22, v25, v16 -; GFX6-NEXT: v_or_b32_e32 v25, v26, v17 -; GFX6-NEXT: v_not_b32_e32 v26, 63 -; GFX6-NEXT: v_add_i32_e32 v16, vcc, v19, v26 -; GFX6-NEXT: v_lshl_b64 v[16:17], v[0:1], v16 +; GFX6-NEXT: v_add_i32_e32 v17, vcc, v19, v23 +; GFX6-NEXT: v_or_b32_e32 v22, v18, v22 +; GFX6-NEXT: v_lshl_b64 v[17:18], v[0:1], v17 ; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v19 -; GFX6-NEXT: v_cndmask_b32_e32 v16, v16, v21, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc +; GFX6-NEXT: v_cndmask_b32_e32 v17, v17, v21, vcc +; GFX6-NEXT: v_cndmask_b32_e32 v18, v18, v22, vcc ; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v19 -; GFX6-NEXT: v_cndmask_b32_e64 v16, v16, v2, s[4:5] -; GFX6-NEXT: v_cndmask_b32_e64 v18, v17, v3, s[4:5] -; GFX6-NEXT: v_add_i32_e64 v2, s[4:5], v11, v26 -; GFX6-NEXT: v_lshr_b64 v[2:3], v[9:10], v2 ; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], v19 -; GFX6-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v11 -; GFX6-NEXT: v_cndmask_b32_e64 v3, v3, v25, s[4:5] -; GFX6-NEXT: v_cndmask_b32_e32 v17, 0, v0, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v19, 0, v1, vcc -; GFX6-NEXT: v_lshr_b64 v[0:1], v[9:10], v11 -; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, 0, v11 -; GFX6-NEXT: v_cndmask_b32_e32 v3, v3, v24, vcc -; GFX6-NEXT: v_cndmask_b32_e64 v2, v2, v22, s[4:5] -; GFX6-NEXT: v_cndmask_b32_e64 v11, 0, v1, s[4:5] -; GFX6-NEXT: v_or_b32_e32 v1, v19, v3 -; GFX6-NEXT: v_and_b32_e32 v19, 0x7f, v20 -; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v23, vcc -; GFX6-NEXT: v_cndmask_b32_e64 v9, 0, v0, s[4:5] -; GFX6-NEXT: v_sub_i32_e32 v3, vcc, 64, v19 -; GFX6-NEXT: v_or_b32_e32 v0, v17, v2 -; GFX6-NEXT: v_or_b32_e32 v2, v16, v9 -; GFX6-NEXT: v_lshr_b64 v[9:10], v[4:5], v3 -; GFX6-NEXT: v_lshl_b64 v[16:17], v[6:7], v19 -; GFX6-NEXT: v_or_b32_e32 v3, v18, v11 -; GFX6-NEXT: v_or_b32_e32 v11, v9, v16 -; GFX6-NEXT: v_or_b32_e32 v16, v10, v17 -; GFX6-NEXT: v_add_i32_e32 v17, vcc, v19, v26 -; GFX6-NEXT: v_lshl_b64 v[9:10], v[4:5], v19 -; GFX6-NEXT: v_lshl_b64 v[4:5], v[4:5], v17 -; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v19 -; GFX6-NEXT: v_cndmask_b32_e32 v17, 0, v9, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v18, 0, v10, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v4, v4, v11, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v5, v5, v16, vcc -; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, 0, v19 -; GFX6-NEXT: v_cndmask_b32_e32 v16, v4, v6, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v19, v5, v7, vcc -; GFX6-NEXT: v_lshr_b64 v[4:5], v[12:13], 1 +; GFX6-NEXT: v_cndmask_b32_e64 v19, v17, v2, s[4:5] +; GFX6-NEXT: v_cndmask_b32_e64 v18, v18, v3, s[4:5] +; GFX6-NEXT: v_lshr_b64 v[2:3], v[8:9], 1 +; GFX6-NEXT: v_lshlrev_b32_e32 v8, 31, v10 +; GFX6-NEXT: v_mov_b32_e32 v21, 0x7f +; GFX6-NEXT: v_or_b32_e32 v3, v3, v8 +; GFX6-NEXT: v_lshr_b64 v[8:9], v[10:11], 1 +; GFX6-NEXT: v_bfi_b32 v22, v16, 0, v21 +; GFX6-NEXT: v_sub_i32_e64 v10, s[4:5], 64, v22 +; GFX6-NEXT: v_lshl_b64 v[10:11], v[8:9], v10 +; GFX6-NEXT: v_lshr_b64 v[16:17], v[2:3], v22 +; GFX6-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v22 +; GFX6-NEXT: v_or_b32_e32 v16, v16, v10 +; GFX6-NEXT: v_add_i32_e64 v10, s[4:5], v22, v23 +; GFX6-NEXT: v_or_b32_e32 v17, v17, v11 +; GFX6-NEXT: v_lshr_b64 v[10:11], v[8:9], v10 +; GFX6-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v22 +; GFX6-NEXT: v_cndmask_b32_e64 v10, v10, v16, s[4:5] +; GFX6-NEXT: v_lshr_b64 v[8:9], v[8:9], v22 +; GFX6-NEXT: v_cndmask_b32_e64 v11, v11, v17, s[4:5] +; GFX6-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[6:7] +; GFX6-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc +; GFX6-NEXT: v_and_b32_e32 v16, 0x7f, v20 +; GFX6-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[6:7] +; GFX6-NEXT: v_or_b32_e32 v0, v0, v2 +; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc +; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, v8, s[4:5] +; GFX6-NEXT: v_sub_i32_e32 v8, vcc, 64, v16 +; GFX6-NEXT: v_or_b32_e32 v1, v1, v3 +; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, v9, s[4:5] +; GFX6-NEXT: v_lshr_b64 v[8:9], v[4:5], v8 +; GFX6-NEXT: v_lshl_b64 v[10:11], v[6:7], v16 +; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v16 +; GFX6-NEXT: v_or_b32_e32 v10, v8, v10 +; GFX6-NEXT: v_add_i32_e32 v8, vcc, v16, v23 +; GFX6-NEXT: v_or_b32_e32 v11, v9, v11 +; GFX6-NEXT: v_lshl_b64 v[8:9], v[4:5], v8 +; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v16 +; GFX6-NEXT: v_cndmask_b32_e32 v8, v8, v10, vcc +; GFX6-NEXT: v_cndmask_b32_e32 v17, v9, v11, vcc +; GFX6-NEXT: v_lshl_b64 v[4:5], v[4:5], v16 +; GFX6-NEXT: v_cndmask_b32_e64 v16, v8, v6, s[4:5] +; GFX6-NEXT: v_lshr_b64 v[8:9], v[12:13], 1 +; GFX6-NEXT: v_or_b32_e32 v3, v18, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v6, 31, v14 -; GFX6-NEXT: v_or_b32_e32 v5, v5, v6 -; GFX6-NEXT: v_lshr_b64 v[6:7], v[14:15], 1 -; GFX6-NEXT: v_bfi_b32 v14, v20, 0, v8 -; GFX6-NEXT: v_sub_i32_e32 v10, vcc, 64, v14 -; GFX6-NEXT: v_add_i32_e32 v15, vcc, v14, v26 -; GFX6-NEXT: v_lshr_b64 v[8:9], v[4:5], v14 -; GFX6-NEXT: v_lshl_b64 v[10:11], v[6:7], v10 -; GFX6-NEXT: v_lshr_b64 v[12:13], v[6:7], v14 -; GFX6-NEXT: v_lshr_b64 v[6:7], v[6:7], v15 -; GFX6-NEXT: v_or_b32_e32 v8, v8, v10 -; GFX6-NEXT: v_or_b32_e32 v9, v9, v11 -; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v14 -; GFX6-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc -; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v14 -; GFX6-NEXT: v_cndmask_b32_e64 v4, v6, v4, s[4:5] -; GFX6-NEXT: v_cndmask_b32_e64 v5, v7, v5, s[4:5] -; GFX6-NEXT: v_cndmask_b32_e32 v6, 0, v12, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v7, 0, v13, vcc -; GFX6-NEXT: v_or_b32_e32 v4, v17, v4 -; GFX6-NEXT: v_or_b32_e32 v5, v18, v5 +; GFX6-NEXT: v_bfi_b32 v18, v20, 0, v21 +; GFX6-NEXT: v_lshr_b64 v[10:11], v[14:15], 1 +; GFX6-NEXT: v_or_b32_e32 v9, v9, v6 +; GFX6-NEXT: v_sub_i32_e64 v6, s[6:7], 64, v18 +; GFX6-NEXT: v_lshl_b64 v[12:13], v[10:11], v6 +; GFX6-NEXT: v_lshr_b64 v[14:15], v[8:9], v18 +; GFX6-NEXT: v_cndmask_b32_e64 v17, v17, v7, s[4:5] +; GFX6-NEXT: v_add_i32_e64 v6, s[4:5], v18, v23 +; GFX6-NEXT: v_lshr_b64 v[6:7], v[10:11], v6 +; GFX6-NEXT: v_or_b32_e32 v12, v14, v12 +; GFX6-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v18 +; GFX6-NEXT: v_cndmask_b32_e64 v6, v6, v12, s[4:5] +; GFX6-NEXT: v_lshr_b64 v[10:11], v[10:11], v18 +; GFX6-NEXT: v_or_b32_e32 v12, v15, v13 +; GFX6-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v18 +; GFX6-NEXT: v_cndmask_b32_e64 v7, v7, v12, s[4:5] +; GFX6-NEXT: v_cndmask_b32_e64 v6, v6, v8, s[6:7] +; GFX6-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc +; GFX6-NEXT: v_cndmask_b32_e64 v7, v7, v9, s[6:7] +; GFX6-NEXT: v_or_b32_e32 v4, v4, v6 +; GFX6-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc +; GFX6-NEXT: v_cndmask_b32_e64 v6, 0, v10, s[4:5] +; GFX6-NEXT: v_cndmask_b32_e64 v8, 0, v11, s[4:5] +; GFX6-NEXT: v_or_b32_e32 v2, v19, v2 +; GFX6-NEXT: v_or_b32_e32 v5, v5, v7 ; GFX6-NEXT: v_or_b32_e32 v6, v16, v6 -; GFX6-NEXT: v_or_b32_e32 v7, v19, v7 +; GFX6-NEXT: v_or_b32_e32 v7, v17, v8 ; GFX6-NEXT: s_setpc_b64 s[30:31] ; ; GFX8-LABEL: v_fshl_v2i128: ; GFX8: ; %bb.0: ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX8-NEXT: v_lshrrev_b64 v[23:24], 1, v[8:9] ; GFX8-NEXT: v_and_b32_e32 v19, 0x7f, v16 -; GFX8-NEXT: v_lshlrev_b32_e32 v8, 31, v10 ; GFX8-NEXT: v_sub_u32_e32 v17, vcc, 64, v19 -; GFX8-NEXT: v_or_b32_e32 v24, v24, v8 -; GFX8-NEXT: v_mov_b32_e32 v8, 0x7f ; GFX8-NEXT: v_lshrrev_b64 v[17:18], v17, v[0:1] ; GFX8-NEXT: v_lshlrev_b64 v[21:22], v19, v[2:3] -; GFX8-NEXT: v_lshrrev_b64 v[9:10], 1, v[10:11] -; GFX8-NEXT: v_bfi_b32 v11, v16, 0, v8 -; GFX8-NEXT: v_sub_u32_e32 v16, vcc, 64, v11 +; GFX8-NEXT: v_not_b32_e32 v23, 63 ; GFX8-NEXT: v_or_b32_e32 v21, v17, v21 -; GFX8-NEXT: v_lshlrev_b64 v[16:17], v16, v[9:10] -; GFX8-NEXT: v_lshrrev_b64 v[25:26], v11, v[23:24] -; GFX8-NEXT: v_or_b32_e32 v18, v18, v22 -; GFX8-NEXT: v_or_b32_e32 v22, v25, v16 -; GFX8-NEXT: v_or_b32_e32 v25, v26, v17 -; GFX8-NEXT: v_not_b32_e32 v26, 63 -; GFX8-NEXT: v_add_u32_e32 v16, vcc, v19, v26 -; GFX8-NEXT: v_lshlrev_b64 v[16:17], v16, v[0:1] +; GFX8-NEXT: v_add_u32_e32 v17, vcc, v19, v23 +; GFX8-NEXT: v_or_b32_e32 v22, v18, v22 +; GFX8-NEXT: v_lshlrev_b64 v[17:18], v17, v[0:1] ; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v19 -; GFX8-NEXT: v_cndmask_b32_e32 v16, v16, v21, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v17, v17, v21, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v18, v18, v22, vcc ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v19 -; GFX8-NEXT: v_cndmask_b32_e64 v16, v16, v2, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v18, v17, v3, s[4:5] -; GFX8-NEXT: v_add_u32_e64 v2, s[4:5], v11, v26 -; GFX8-NEXT: v_lshrrev_b64 v[2:3], v2, v[9:10] ; GFX8-NEXT: v_lshlrev_b64 v[0:1], v19, v[0:1] -; GFX8-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v11 -; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v25, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e32 v17, 0, v0, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v19, 0, v1, vcc -; GFX8-NEXT: v_lshrrev_b64 v[0:1], v11, v[9:10] -; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v11 -; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v24, vcc -; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v22, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v11, 0, v1, s[4:5] -; GFX8-NEXT: v_or_b32_e32 v1, v19, v3 -; GFX8-NEXT: v_and_b32_e32 v19, 0x7f, v20 -; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v23, vcc -; GFX8-NEXT: v_cndmask_b32_e64 v9, 0, v0, s[4:5] -; GFX8-NEXT: v_sub_u32_e32 v3, vcc, 64, v19 -; GFX8-NEXT: v_or_b32_e32 v0, v17, v2 -; GFX8-NEXT: v_or_b32_e32 v2, v16, v9 -; GFX8-NEXT: v_lshrrev_b64 v[9:10], v3, v[4:5] -; GFX8-NEXT: v_lshlrev_b64 v[16:17], v19, v[6:7] -; GFX8-NEXT: v_or_b32_e32 v3, v18, v11 -; GFX8-NEXT: v_or_b32_e32 v11, v9, v16 -; GFX8-NEXT: v_or_b32_e32 v16, v10, v17 -; GFX8-NEXT: v_add_u32_e32 v17, vcc, v19, v26 -; GFX8-NEXT: v_lshlrev_b64 v[9:10], v19, v[4:5] -; GFX8-NEXT: v_lshlrev_b64 v[4:5], v17, v[4:5] -; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v19 -; GFX8-NEXT: v_cndmask_b32_e32 v17, 0, v9, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v18, 0, v10, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v11, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v5, v5, v16, vcc -; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v19 -; GFX8-NEXT: v_cndmask_b32_e32 v16, v4, v6, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v19, v5, v7, vcc -; GFX8-NEXT: v_lshrrev_b64 v[4:5], 1, v[12:13] +; GFX8-NEXT: v_cndmask_b32_e64 v19, v17, v2, s[4:5] +; GFX8-NEXT: v_cndmask_b32_e64 v18, v18, v3, s[4:5] +; GFX8-NEXT: v_lshrrev_b64 v[2:3], 1, v[8:9] +; GFX8-NEXT: v_lshlrev_b32_e32 v8, 31, v10 +; GFX8-NEXT: v_mov_b32_e32 v21, 0x7f +; GFX8-NEXT: v_or_b32_e32 v3, v3, v8 +; GFX8-NEXT: v_lshrrev_b64 v[8:9], 1, v[10:11] +; GFX8-NEXT: v_bfi_b32 v22, v16, 0, v21 +; GFX8-NEXT: v_sub_u32_e64 v10, s[4:5], 64, v22 +; GFX8-NEXT: v_lshlrev_b64 v[10:11], v10, v[8:9] +; GFX8-NEXT: v_lshrrev_b64 v[16:17], v22, v[2:3] +; GFX8-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v22 +; GFX8-NEXT: v_or_b32_e32 v16, v16, v10 +; GFX8-NEXT: v_add_u32_e64 v10, s[4:5], v22, v23 +; GFX8-NEXT: v_or_b32_e32 v17, v17, v11 +; GFX8-NEXT: v_lshrrev_b64 v[10:11], v10, v[8:9] +; GFX8-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v22 +; GFX8-NEXT: v_cndmask_b32_e64 v10, v10, v16, s[4:5] +; GFX8-NEXT: v_lshrrev_b64 v[8:9], v22, v[8:9] +; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v17, s[4:5] +; GFX8-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[6:7] +; GFX8-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc +; GFX8-NEXT: v_and_b32_e32 v16, 0x7f, v20 +; GFX8-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[6:7] +; GFX8-NEXT: v_or_b32_e32 v0, v0, v2 +; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc +; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, v8, s[4:5] +; GFX8-NEXT: v_sub_u32_e32 v8, vcc, 64, v16 +; GFX8-NEXT: v_or_b32_e32 v1, v1, v3 +; GFX8-NEXT: v_cndmask_b32_e64 v3, 0, v9, s[4:5] +; GFX8-NEXT: v_lshrrev_b64 v[8:9], v8, v[4:5] +; GFX8-NEXT: v_lshlrev_b64 v[10:11], v16, v[6:7] +; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v16 +; GFX8-NEXT: v_or_b32_e32 v10, v8, v10 +; GFX8-NEXT: v_add_u32_e32 v8, vcc, v16, v23 +; GFX8-NEXT: v_or_b32_e32 v11, v9, v11 +; GFX8-NEXT: v_lshlrev_b64 v[8:9], v8, v[4:5] +; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v16 +; GFX8-NEXT: v_cndmask_b32_e32 v8, v8, v10, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v17, v9, v11, vcc +; GFX8-NEXT: v_lshlrev_b64 v[4:5], v16, v[4:5] +; GFX8-NEXT: v_cndmask_b32_e64 v16, v8, v6, s[4:5] +; GFX8-NEXT: v_lshrrev_b64 v[8:9], 1, v[12:13] +; GFX8-NEXT: v_or_b32_e32 v3, v18, v3 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 31, v14 -; GFX8-NEXT: v_or_b32_e32 v5, v5, v6 -; GFX8-NEXT: v_lshrrev_b64 v[6:7], 1, v[14:15] -; GFX8-NEXT: v_bfi_b32 v14, v20, 0, v8 -; GFX8-NEXT: v_sub_u32_e32 v10, vcc, 64, v14 -; GFX8-NEXT: v_add_u32_e32 v15, vcc, v14, v26 -; GFX8-NEXT: v_lshrrev_b64 v[8:9], v14, v[4:5] -; GFX8-NEXT: v_lshlrev_b64 v[10:11], v10, v[6:7] -; GFX8-NEXT: v_lshrrev_b64 v[12:13], v14, v[6:7] -; GFX8-NEXT: v_lshrrev_b64 v[6:7], v15, v[6:7] -; GFX8-NEXT: v_or_b32_e32 v8, v8, v10 -; GFX8-NEXT: v_or_b32_e32 v9, v9, v11 -; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v14 -; GFX8-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc -; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v14 -; GFX8-NEXT: v_cndmask_b32_e64 v4, v6, v4, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v5, v7, v5, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e32 v6, 0, v12, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v7, 0, v13, vcc -; GFX8-NEXT: v_or_b32_e32 v4, v17, v4 -; GFX8-NEXT: v_or_b32_e32 v5, v18, v5 +; GFX8-NEXT: v_bfi_b32 v18, v20, 0, v21 +; GFX8-NEXT: v_lshrrev_b64 v[10:11], 1, v[14:15] +; GFX8-NEXT: v_or_b32_e32 v9, v9, v6 +; GFX8-NEXT: v_sub_u32_e64 v6, s[6:7], 64, v18 +; GFX8-NEXT: v_lshlrev_b64 v[12:13], v6, v[10:11] +; GFX8-NEXT: v_lshrrev_b64 v[14:15], v18, v[8:9] +; GFX8-NEXT: v_cndmask_b32_e64 v17, v17, v7, s[4:5] +; GFX8-NEXT: v_add_u32_e64 v6, s[4:5], v18, v23 +; GFX8-NEXT: v_lshrrev_b64 v[6:7], v6, v[10:11] +; GFX8-NEXT: v_or_b32_e32 v12, v14, v12 +; GFX8-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v18 +; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v12, s[4:5] +; GFX8-NEXT: v_lshrrev_b64 v[10:11], v18, v[10:11] +; GFX8-NEXT: v_or_b32_e32 v12, v15, v13 +; GFX8-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v18 +; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v12, s[4:5] +; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v8, s[6:7] +; GFX8-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc +; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v9, s[6:7] +; GFX8-NEXT: v_or_b32_e32 v4, v4, v6 +; GFX8-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc +; GFX8-NEXT: v_cndmask_b32_e64 v6, 0, v10, s[4:5] +; GFX8-NEXT: v_cndmask_b32_e64 v8, 0, v11, s[4:5] +; GFX8-NEXT: v_or_b32_e32 v2, v19, v2 +; GFX8-NEXT: v_or_b32_e32 v5, v5, v7 ; GFX8-NEXT: v_or_b32_e32 v6, v16, v6 -; GFX8-NEXT: v_or_b32_e32 v7, v19, v7 +; GFX8-NEXT: v_or_b32_e32 v7, v17, v8 ; GFX8-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: v_fshl_v2i128: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: v_and_b32_e32 v19, 0x7f, v16 -; GFX9-NEXT: v_lshrrev_b64 v[8:9], 1, v[8:9] ; GFX9-NEXT: v_sub_u32_e32 v17, 64, v19 -; GFX9-NEXT: v_mov_b32_e32 v25, 0x7f ; GFX9-NEXT: v_lshrrev_b64 v[17:18], v17, v[0:1] ; GFX9-NEXT: v_lshlrev_b64 v[21:22], v19, v[2:3] -; GFX9-NEXT: v_lshl_or_b32 v9, v10, 31, v9 -; GFX9-NEXT: v_lshrrev_b64 v[10:11], 1, v[10:11] -; GFX9-NEXT: v_bfi_b32 v26, v16, 0, v25 -; GFX9-NEXT: v_sub_u32_e32 v16, 64, v26 -; GFX9-NEXT: v_or_b32_e32 v21, v17, v21 -; GFX9-NEXT: v_lshlrev_b64 v[16:17], v16, v[10:11] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], v26, v[8:9] -; GFX9-NEXT: v_or_b32_e32 v18, v18, v22 -; GFX9-NEXT: v_or_b32_e32 v22, v23, v16 -; GFX9-NEXT: v_add_u32_e32 v16, 0xffffffc0, v19 -; GFX9-NEXT: v_or_b32_e32 v23, v24, v17 -; GFX9-NEXT: v_lshlrev_b64 v[16:17], v16, v[0:1] ; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v19 -; GFX9-NEXT: v_cndmask_b32_e32 v16, v16, v21, vcc +; GFX9-NEXT: v_or_b32_e32 v21, v17, v21 +; GFX9-NEXT: v_add_u32_e32 v17, 0xffffffc0, v19 +; GFX9-NEXT: v_or_b32_e32 v22, v18, v22 +; GFX9-NEXT: v_lshlrev_b64 v[17:18], v17, v[0:1] ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v19 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; GFX9-NEXT: v_cndmask_b32_e64 v16, v16, v2, s[4:5] -; GFX9-NEXT: v_add_u32_e32 v2, 0xffffffc0, v26 +; GFX9-NEXT: v_cndmask_b32_e32 v17, v17, v21, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v18, v18, v22, vcc +; GFX9-NEXT: v_lshrrev_b64 v[8:9], 1, v[8:9] +; GFX9-NEXT: v_mov_b32_e32 v21, 0x7f ; GFX9-NEXT: v_lshlrev_b64 v[0:1], v19, v[0:1] -; GFX9-NEXT: v_cndmask_b32_e64 v17, v17, v3, s[4:5] -; GFX9-NEXT: v_lshrrev_b64 v[2:3], v2, v[10:11] -; GFX9-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v26 -; GFX9-NEXT: v_cndmask_b32_e32 v18, 0, v0, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v19, 0, v1, vcc -; GFX9-NEXT: v_lshrrev_b64 v[0:1], v26, v[10:11] -; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v22, s[4:5] -; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v26 -; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v23, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc -; GFX9-NEXT: v_cndmask_b32_e64 v8, 0, v0, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v9, vcc -; GFX9-NEXT: v_or_b32_e32 v0, v18, v2 -; GFX9-NEXT: v_or_b32_e32 v2, v16, v8 +; GFX9-NEXT: v_cndmask_b32_e64 v19, v17, v2, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v18, v18, v3, s[4:5] +; GFX9-NEXT: v_lshrrev_b64 v[2:3], 1, v[10:11] +; GFX9-NEXT: v_bfi_b32 v22, v16, 0, v21 +; GFX9-NEXT: v_lshl_or_b32 v9, v10, 31, v9 +; GFX9-NEXT: v_sub_u32_e32 v10, 64, v22 +; GFX9-NEXT: v_lshlrev_b64 v[10:11], v10, v[2:3] +; GFX9-NEXT: v_lshrrev_b64 v[16:17], v22, v[8:9] +; GFX9-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v22 +; GFX9-NEXT: v_or_b32_e32 v16, v16, v10 +; GFX9-NEXT: v_add_u32_e32 v10, 0xffffffc0, v22 +; GFX9-NEXT: v_or_b32_e32 v17, v17, v11 +; GFX9-NEXT: v_lshrrev_b64 v[10:11], v10, v[2:3] +; GFX9-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v22 +; GFX9-NEXT: v_cndmask_b32_e64 v10, v10, v16, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v11, v11, v17, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v8, v10, v8, s[6:7] +; GFX9-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc ; GFX9-NEXT: v_and_b32_e32 v16, 0x7f, v20 -; GFX9-NEXT: v_cndmask_b32_e64 v21, 0, v1, s[4:5] -; GFX9-NEXT: v_or_b32_e32 v1, v19, v3 -; GFX9-NEXT: v_sub_u32_e32 v3, 64, v16 -; GFX9-NEXT: v_lshrrev_b64 v[8:9], v3, v[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v9, v11, v9, s[6:7] +; GFX9-NEXT: v_or_b32_e32 v0, v0, v8 +; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc +; GFX9-NEXT: v_sub_u32_e32 v8, 64, v16 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v9 +; GFX9-NEXT: v_lshrrev_b64 v[8:9], v8, v[4:5] ; GFX9-NEXT: v_lshlrev_b64 v[10:11], v16, v[6:7] -; GFX9-NEXT: v_or_b32_e32 v3, v17, v21 -; GFX9-NEXT: v_add_u32_e32 v17, 0xffffffc0, v16 +; GFX9-NEXT: v_lshrrev_b64 v[2:3], v22, v[2:3] ; GFX9-NEXT: v_or_b32_e32 v10, v8, v10 +; GFX9-NEXT: v_add_u32_e32 v8, 0xffffffc0, v16 ; GFX9-NEXT: v_or_b32_e32 v11, v9, v11 -; GFX9-NEXT: v_lshlrev_b64 v[8:9], v16, v[4:5] -; GFX9-NEXT: v_lshlrev_b64 v[4:5], v17, v[4:5] +; GFX9-NEXT: v_lshlrev_b64 v[8:9], v8, v[4:5] ; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, 0, v8, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v18, 0, v9, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v4, v4, v10, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v8, v5, v11, vcc -; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v16, v4, v6, vcc -; GFX9-NEXT: v_lshrrev_b64 v[4:5], 1, v[12:13] -; GFX9-NEXT: v_cndmask_b32_e32 v12, v8, v7, vcc -; GFX9-NEXT: v_lshrrev_b64 v[6:7], 1, v[14:15] -; GFX9-NEXT: v_bfi_b32 v13, v20, 0, v25 -; GFX9-NEXT: v_lshl_or_b32 v5, v14, 31, v5 -; GFX9-NEXT: v_sub_u32_e32 v10, 64, v13 -; GFX9-NEXT: v_lshrrev_b64 v[8:9], v13, v[4:5] -; GFX9-NEXT: v_lshlrev_b64 v[10:11], v10, v[6:7] -; GFX9-NEXT: v_add_u32_e32 v14, 0xffffffc0, v13 -; GFX9-NEXT: v_or_b32_e32 v10, v8, v10 -; GFX9-NEXT: v_or_b32_e32 v11, v9, v11 -; GFX9-NEXT: v_lshrrev_b64 v[8:9], v13, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[6:7], v14, v[6:7] -; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v13 -; GFX9-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v7, v7, v11, vcc -; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v13 -; GFX9-NEXT: v_cndmask_b32_e64 v4, v6, v4, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e64 v5, v7, v5, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v7, 0, v9, vcc -; GFX9-NEXT: v_or_b32_e32 v4, v17, v4 -; GFX9-NEXT: v_or_b32_e32 v5, v18, v5 +; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e32 v8, v8, v10, vcc +; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v17, v9, v11, vcc +; GFX9-NEXT: v_lshlrev_b64 v[4:5], v16, v[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v16, v8, v6, s[4:5] +; GFX9-NEXT: v_lshrrev_b64 v[8:9], 1, v[12:13] +; GFX9-NEXT: v_or_b32_e32 v3, v18, v3 +; GFX9-NEXT: v_bfi_b32 v18, v20, 0, v21 +; GFX9-NEXT: v_lshrrev_b64 v[10:11], 1, v[14:15] +; GFX9-NEXT: v_lshl_or_b32 v9, v14, 31, v9 +; GFX9-NEXT: v_sub_u32_e32 v6, 64, v18 +; GFX9-NEXT: v_lshlrev_b64 v[12:13], v6, v[10:11] +; GFX9-NEXT: v_lshrrev_b64 v[14:15], v18, v[8:9] +; GFX9-NEXT: v_add_u32_e32 v6, 0xffffffc0, v18 +; GFX9-NEXT: v_cndmask_b32_e64 v17, v17, v7, s[4:5] +; GFX9-NEXT: v_lshrrev_b64 v[6:7], v6, v[10:11] +; GFX9-NEXT: v_or_b32_e32 v12, v14, v12 +; GFX9-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v18 +; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v12, s[4:5] +; GFX9-NEXT: v_lshrrev_b64 v[10:11], v18, v[10:11] +; GFX9-NEXT: v_or_b32_e32 v12, v15, v13 +; GFX9-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v18 +; GFX9-NEXT: v_cndmask_b32_e64 v7, v7, v12, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v8, s[6:7] +; GFX9-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc +; GFX9-NEXT: v_cndmask_b32_e64 v7, v7, v9, s[6:7] +; GFX9-NEXT: v_or_b32_e32 v4, v4, v6 +; GFX9-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc +; GFX9-NEXT: v_cndmask_b32_e64 v6, 0, v10, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v8, 0, v11, s[4:5] +; GFX9-NEXT: v_or_b32_e32 v2, v19, v2 +; GFX9-NEXT: v_or_b32_e32 v5, v5, v7 ; GFX9-NEXT: v_or_b32_e32 v6, v16, v6 -; GFX9-NEXT: v_or_b32_e32 v7, v12, v7 +; GFX9-NEXT: v_or_b32_e32 v7, v17, v8 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX10-LABEL: v_fshl_v2i128: diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll index dcc3684422f27..2cd5868b15aaf 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll @@ -6184,8 +6184,8 @@ define i128 @v_fshr_i128(i128 %lhs, i128 %rhs, i128 %amt) { ; GFX6-NEXT: v_lshr_b64 v[0:1], v[9:10], v0 ; GFX6-NEXT: v_lshl_b64 v[11:12], v[2:3], v15 ; GFX6-NEXT: v_add_i32_e32 v17, vcc, v15, v16 -; GFX6-NEXT: v_lshl_b64 v[13:14], v[9:10], v15 ; GFX6-NEXT: v_or_b32_e32 v11, v0, v11 +; GFX6-NEXT: v_lshl_b64 v[13:14], v[9:10], v15 ; GFX6-NEXT: v_or_b32_e32 v12, v1, v12 ; GFX6-NEXT: v_lshl_b64 v[0:1], v[9:10], v17 ; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v15 @@ -6233,8 +6233,8 @@ define i128 @v_fshr_i128(i128 %lhs, i128 %rhs, i128 %amt) { ; GFX8-NEXT: v_lshrrev_b64 v[0:1], v0, v[9:10] ; GFX8-NEXT: v_lshlrev_b64 v[11:12], v15, v[2:3] ; GFX8-NEXT: v_add_u32_e32 v17, vcc, v15, v16 -; GFX8-NEXT: v_lshlrev_b64 v[13:14], v15, v[9:10] ; GFX8-NEXT: v_or_b32_e32 v11, v0, v11 +; GFX8-NEXT: v_lshlrev_b64 v[13:14], v15, v[9:10] ; GFX8-NEXT: v_or_b32_e32 v12, v1, v12 ; GFX8-NEXT: v_lshlrev_b64 v[0:1], v17, v[9:10] ; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v15 @@ -7849,90 +7849,90 @@ define <2 x i128> @v_fshr_v2i128(<2 x i128> %lhs, <2 x i128> %rhs, <2 x i128> %a ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX6-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GFX6-NEXT: v_mov_b32_e32 v19, 0x7f -; GFX6-NEXT: v_lshl_b64 v[17:18], v[0:1], 1 -; GFX6-NEXT: v_lshrrev_b32_e32 v0, 31, v1 -; GFX6-NEXT: v_bfi_b32 v27, v16, 0, v19 -; GFX6-NEXT: v_or_b32_e32 v2, v2, v0 -; GFX6-NEXT: v_sub_i32_e32 v0, vcc, 64, v27 -; GFX6-NEXT: v_lshr_b64 v[0:1], v[17:18], v0 -; GFX6-NEXT: v_lshl_b64 v[21:22], v[2:3], v27 -; GFX6-NEXT: v_and_b32_e32 v16, 0x7f, v16 -; GFX6-NEXT: v_or_b32_e32 v21, v0, v21 -; GFX6-NEXT: v_sub_i32_e32 v0, vcc, 64, v16 -; GFX6-NEXT: v_lshl_b64 v[23:24], v[10:11], v0 -; GFX6-NEXT: v_lshr_b64 v[25:26], v[8:9], v16 -; GFX6-NEXT: v_or_b32_e32 v22, v1, v22 -; GFX6-NEXT: v_or_b32_e32 v23, v25, v23 -; GFX6-NEXT: v_not_b32_e32 v25, 63 -; GFX6-NEXT: v_add_i32_e32 v0, vcc, v27, v25 -; GFX6-NEXT: v_lshl_b64 v[0:1], v[17:18], v0 -; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v27 -; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v21, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v1, v1, v22, vcc -; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v27 -; GFX6-NEXT: v_cndmask_b32_e64 v21, v0, v2, s[4:5] -; GFX6-NEXT: v_cndmask_b32_e64 v22, v1, v3, s[4:5] -; GFX6-NEXT: v_add_i32_e64 v0, s[4:5], v16, v25 -; GFX6-NEXT: v_lshr_b64 v[0:1], v[10:11], v0 -; GFX6-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v16 -; GFX6-NEXT: v_or_b32_e32 v24, v26, v24 -; GFX6-NEXT: v_cndmask_b32_e64 v0, v0, v23, s[4:5] -; GFX6-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v16 -; GFX6-NEXT: v_cndmask_b32_e64 v2, v1, v24, s[4:5] -; GFX6-NEXT: v_cndmask_b32_e64 v8, v0, v8, s[6:7] -; GFX6-NEXT: v_lshl_b64 v[0:1], v[17:18], v27 -; GFX6-NEXT: v_cndmask_b32_e64 v9, v2, v9, s[6:7] +; GFX6-NEXT: v_lshrrev_b32_e32 v17, 31, v1 +; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], 1 +; GFX6-NEXT: v_bfi_b32 v23, v16, 0, v19 +; GFX6-NEXT: v_or_b32_e32 v2, v2, v17 +; GFX6-NEXT: v_sub_i32_e32 v17, vcc, 64, v23 +; GFX6-NEXT: v_lshr_b64 v[17:18], v[0:1], v17 +; GFX6-NEXT: v_lshl_b64 v[21:22], v[2:3], v23 +; GFX6-NEXT: v_not_b32_e32 v24, 63 +; GFX6-NEXT: v_or_b32_e32 v21, v17, v21 +; GFX6-NEXT: v_add_i32_e32 v17, vcc, v23, v24 +; GFX6-NEXT: v_or_b32_e32 v22, v18, v22 +; GFX6-NEXT: v_lshl_b64 v[17:18], v[0:1], v17 +; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v23 +; GFX6-NEXT: v_cndmask_b32_e32 v17, v17, v21, vcc +; GFX6-NEXT: v_cndmask_b32_e32 v18, v18, v22, vcc +; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v23 +; GFX6-NEXT: v_and_b32_e32 v22, 0x7f, v16 +; GFX6-NEXT: v_cndmask_b32_e64 v21, v17, v2, s[4:5] +; GFX6-NEXT: v_cndmask_b32_e64 v18, v18, v3, s[4:5] +; GFX6-NEXT: v_sub_i32_e64 v2, s[4:5], 64, v22 +; GFX6-NEXT: v_lshl_b64 v[2:3], v[10:11], v2 +; GFX6-NEXT: v_lshr_b64 v[16:17], v[8:9], v22 +; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], v23 +; GFX6-NEXT: v_or_b32_e32 v16, v16, v2 +; GFX6-NEXT: v_add_i32_e64 v2, s[4:5], v22, v24 +; GFX6-NEXT: v_or_b32_e32 v17, v17, v3 +; GFX6-NEXT: v_lshr_b64 v[2:3], v[10:11], v2 +; GFX6-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v22 +; GFX6-NEXT: v_cndmask_b32_e64 v16, v2, v16, s[4:5] +; GFX6-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v22 +; GFX6-NEXT: v_cndmask_b32_e64 v8, v16, v8, s[6:7] ; GFX6-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc ; GFX6-NEXT: v_lshl_b64 v[6:7], v[6:7], 1 -; GFX6-NEXT: v_lshr_b64 v[2:3], v[10:11], v16 +; GFX6-NEXT: v_cndmask_b32_e64 v17, v3, v17, s[4:5] ; GFX6-NEXT: v_or_b32_e32 v0, v0, v8 -; GFX6-NEXT: v_or_b32_e32 v1, v1, v9 -; GFX6-NEXT: v_lshl_b64 v[8:9], v[4:5], 1 -; GFX6-NEXT: v_lshrrev_b32_e32 v4, 31, v5 +; GFX6-NEXT: v_lshrrev_b32_e32 v8, 31, v5 +; GFX6-NEXT: v_lshl_b64 v[4:5], v[4:5], 1 ; GFX6-NEXT: v_bfi_b32 v16, v20, 0, v19 -; GFX6-NEXT: v_or_b32_e32 v6, v6, v4 -; GFX6-NEXT: v_sub_i32_e32 v4, vcc, 64, v16 -; GFX6-NEXT: v_lshr_b64 v[4:5], v[8:9], v4 +; GFX6-NEXT: v_cndmask_b32_e64 v9, v17, v9, s[6:7] +; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc +; GFX6-NEXT: v_or_b32_e32 v6, v6, v8 +; GFX6-NEXT: v_sub_i32_e32 v8, vcc, 64, v16 +; GFX6-NEXT: v_lshr_b64 v[2:3], v[10:11], v22 +; GFX6-NEXT: v_or_b32_e32 v1, v1, v9 +; GFX6-NEXT: v_lshr_b64 v[8:9], v[4:5], v8 ; GFX6-NEXT: v_lshl_b64 v[10:11], v[6:7], v16 -; GFX6-NEXT: v_add_i32_e32 v17, vcc, v16, v25 -; GFX6-NEXT: v_or_b32_e32 v10, v4, v10 -; GFX6-NEXT: v_or_b32_e32 v11, v5, v11 -; GFX6-NEXT: v_lshl_b64 v[4:5], v[8:9], v16 -; GFX6-NEXT: v_lshl_b64 v[8:9], v[8:9], v17 +; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5] +; GFX6-NEXT: v_or_b32_e32 v10, v8, v10 +; GFX6-NEXT: v_add_i32_e32 v8, vcc, v16, v24 +; GFX6-NEXT: v_or_b32_e32 v11, v9, v11 +; GFX6-NEXT: v_lshl_b64 v[8:9], v[4:5], v8 ; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v16 -; GFX6-NEXT: v_cndmask_b32_e32 v17, 0, v4, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v18, 0, v5, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v4, v8, v10, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v5, v9, v11, vcc -; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16 -; GFX6-NEXT: v_and_b32_e32 v10, 0x7f, v20 -; GFX6-NEXT: v_cndmask_b32_e32 v8, v4, v6, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v9, v5, v7, vcc -; GFX6-NEXT: v_sub_i32_e32 v6, vcc, 64, v10 -; GFX6-NEXT: v_lshr_b64 v[4:5], v[12:13], v10 -; GFX6-NEXT: v_lshl_b64 v[6:7], v[14:15], v6 -; GFX6-NEXT: v_add_i32_e32 v11, vcc, v10, v25 -; GFX6-NEXT: v_or_b32_e32 v16, v4, v6 -; GFX6-NEXT: v_or_b32_e32 v19, v5, v7 -; GFX6-NEXT: v_lshr_b64 v[6:7], v[14:15], v11 -; GFX6-NEXT: v_lshr_b64 v[4:5], v[14:15], v10 -; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v10 ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[4:5] -; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5] -; GFX6-NEXT: v_cndmask_b32_e32 v6, v6, v16, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v7, v7, v19, vcc -; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v10 -; GFX6-NEXT: v_cndmask_b32_e64 v6, v6, v12, s[4:5] -; GFX6-NEXT: v_cndmask_b32_e64 v7, v7, v13, s[4:5] -; GFX6-NEXT: v_cndmask_b32_e32 v10, 0, v4, vcc -; GFX6-NEXT: v_cndmask_b32_e32 v11, 0, v5, vcc +; GFX6-NEXT: v_or_b32_e32 v3, v18, v3 +; GFX6-NEXT: v_cndmask_b32_e32 v8, v8, v10, vcc +; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v16 +; GFX6-NEXT: v_and_b32_e32 v18, 0x7f, v20 +; GFX6-NEXT: v_cndmask_b32_e32 v17, v9, v11, vcc +; GFX6-NEXT: v_lshl_b64 v[4:5], v[4:5], v16 +; GFX6-NEXT: v_cndmask_b32_e64 v16, v8, v6, s[4:5] +; GFX6-NEXT: v_sub_i32_e64 v6, s[6:7], 64, v18 +; GFX6-NEXT: v_lshl_b64 v[8:9], v[14:15], v6 +; GFX6-NEXT: v_lshr_b64 v[10:11], v[12:13], v18 +; GFX6-NEXT: v_cndmask_b32_e64 v17, v17, v7, s[4:5] +; GFX6-NEXT: v_add_i32_e64 v6, s[4:5], v18, v24 +; GFX6-NEXT: v_lshr_b64 v[6:7], v[14:15], v6 +; GFX6-NEXT: v_or_b32_e32 v8, v10, v8 +; GFX6-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v18 +; GFX6-NEXT: v_cndmask_b32_e64 v6, v6, v8, s[4:5] +; GFX6-NEXT: v_lshr_b64 v[14:15], v[14:15], v18 +; GFX6-NEXT: v_or_b32_e32 v8, v11, v9 +; GFX6-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc +; GFX6-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[4:5] +; GFX6-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc +; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, 0, v18 +; GFX6-NEXT: v_cndmask_b32_e32 v6, v6, v12, vcc +; GFX6-NEXT: v_cndmask_b32_e32 v7, v7, v13, vcc +; GFX6-NEXT: v_cndmask_b32_e64 v8, 0, v14, s[4:5] +; GFX6-NEXT: v_cndmask_b32_e64 v9, 0, v15, s[4:5] ; GFX6-NEXT: v_or_b32_e32 v2, v21, v2 -; GFX6-NEXT: v_or_b32_e32 v3, v22, v3 -; GFX6-NEXT: v_or_b32_e32 v4, v17, v6 -; GFX6-NEXT: v_or_b32_e32 v5, v18, v7 -; GFX6-NEXT: v_or_b32_e32 v6, v8, v10 -; GFX6-NEXT: v_or_b32_e32 v7, v9, v11 +; GFX6-NEXT: v_or_b32_e32 v4, v4, v6 +; GFX6-NEXT: v_or_b32_e32 v5, v5, v7 +; GFX6-NEXT: v_or_b32_e32 v6, v16, v8 +; GFX6-NEXT: v_or_b32_e32 v7, v17, v9 ; GFX6-NEXT: s_setpc_b64 s[30:31] ; ; GFX8-LABEL: v_fshr_v2i128: @@ -7940,90 +7940,90 @@ define <2 x i128> @v_fshr_v2i128(<2 x i128> %lhs, <2 x i128> %rhs, <2 x i128> %a ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: v_lshlrev_b64 v[2:3], 1, v[2:3] ; GFX8-NEXT: v_mov_b32_e32 v19, 0x7f -; GFX8-NEXT: v_lshlrev_b64 v[17:18], 1, v[0:1] -; GFX8-NEXT: v_lshrrev_b32_e32 v0, 31, v1 -; GFX8-NEXT: v_bfi_b32 v27, v16, 0, v19 -; GFX8-NEXT: v_or_b32_e32 v2, v2, v0 -; GFX8-NEXT: v_sub_u32_e32 v0, vcc, 64, v27 -; GFX8-NEXT: v_lshrrev_b64 v[0:1], v0, v[17:18] -; GFX8-NEXT: v_lshlrev_b64 v[21:22], v27, v[2:3] -; GFX8-NEXT: v_and_b32_e32 v16, 0x7f, v16 -; GFX8-NEXT: v_or_b32_e32 v21, v0, v21 -; GFX8-NEXT: v_sub_u32_e32 v0, vcc, 64, v16 -; GFX8-NEXT: v_lshlrev_b64 v[23:24], v0, v[10:11] -; GFX8-NEXT: v_lshrrev_b64 v[25:26], v16, v[8:9] -; GFX8-NEXT: v_or_b32_e32 v22, v1, v22 -; GFX8-NEXT: v_or_b32_e32 v23, v25, v23 -; GFX8-NEXT: v_not_b32_e32 v25, 63 -; GFX8-NEXT: v_add_u32_e32 v0, vcc, v27, v25 -; GFX8-NEXT: v_lshlrev_b64 v[0:1], v0, v[17:18] -; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v27 -; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v21, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v22, vcc -; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v27 -; GFX8-NEXT: v_cndmask_b32_e64 v21, v0, v2, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v22, v1, v3, s[4:5] -; GFX8-NEXT: v_add_u32_e64 v0, s[4:5], v16, v25 -; GFX8-NEXT: v_lshrrev_b64 v[0:1], v0, v[10:11] -; GFX8-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v16 -; GFX8-NEXT: v_or_b32_e32 v24, v26, v24 -; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v23, s[4:5] -; GFX8-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v16 -; GFX8-NEXT: v_cndmask_b32_e64 v2, v1, v24, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v8, v0, v8, s[6:7] -; GFX8-NEXT: v_lshlrev_b64 v[0:1], v27, v[17:18] -; GFX8-NEXT: v_cndmask_b32_e64 v9, v2, v9, s[6:7] +; GFX8-NEXT: v_lshrrev_b32_e32 v17, 31, v1 +; GFX8-NEXT: v_lshlrev_b64 v[0:1], 1, v[0:1] +; GFX8-NEXT: v_bfi_b32 v23, v16, 0, v19 +; GFX8-NEXT: v_or_b32_e32 v2, v2, v17 +; GFX8-NEXT: v_sub_u32_e32 v17, vcc, 64, v23 +; GFX8-NEXT: v_lshrrev_b64 v[17:18], v17, v[0:1] +; GFX8-NEXT: v_lshlrev_b64 v[21:22], v23, v[2:3] +; GFX8-NEXT: v_not_b32_e32 v24, 63 +; GFX8-NEXT: v_or_b32_e32 v21, v17, v21 +; GFX8-NEXT: v_add_u32_e32 v17, vcc, v23, v24 +; GFX8-NEXT: v_or_b32_e32 v22, v18, v22 +; GFX8-NEXT: v_lshlrev_b64 v[17:18], v17, v[0:1] +; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v23 +; GFX8-NEXT: v_cndmask_b32_e32 v17, v17, v21, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v18, v18, v22, vcc +; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v23 +; GFX8-NEXT: v_and_b32_e32 v22, 0x7f, v16 +; GFX8-NEXT: v_cndmask_b32_e64 v21, v17, v2, s[4:5] +; GFX8-NEXT: v_cndmask_b32_e64 v18, v18, v3, s[4:5] +; GFX8-NEXT: v_sub_u32_e64 v2, s[4:5], 64, v22 +; GFX8-NEXT: v_lshlrev_b64 v[2:3], v2, v[10:11] +; GFX8-NEXT: v_lshrrev_b64 v[16:17], v22, v[8:9] +; GFX8-NEXT: v_lshlrev_b64 v[0:1], v23, v[0:1] +; GFX8-NEXT: v_or_b32_e32 v16, v16, v2 +; GFX8-NEXT: v_add_u32_e64 v2, s[4:5], v22, v24 +; GFX8-NEXT: v_or_b32_e32 v17, v17, v3 +; GFX8-NEXT: v_lshrrev_b64 v[2:3], v2, v[10:11] +; GFX8-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v22 +; GFX8-NEXT: v_cndmask_b32_e64 v16, v2, v16, s[4:5] +; GFX8-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v22 +; GFX8-NEXT: v_cndmask_b32_e64 v8, v16, v8, s[6:7] ; GFX8-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc ; GFX8-NEXT: v_lshlrev_b64 v[6:7], 1, v[6:7] -; GFX8-NEXT: v_lshrrev_b64 v[2:3], v16, v[10:11] +; GFX8-NEXT: v_cndmask_b32_e64 v17, v3, v17, s[4:5] ; GFX8-NEXT: v_or_b32_e32 v0, v0, v8 -; GFX8-NEXT: v_or_b32_e32 v1, v1, v9 -; GFX8-NEXT: v_lshlrev_b64 v[8:9], 1, v[4:5] -; GFX8-NEXT: v_lshrrev_b32_e32 v4, 31, v5 +; GFX8-NEXT: v_lshrrev_b32_e32 v8, 31, v5 +; GFX8-NEXT: v_lshlrev_b64 v[4:5], 1, v[4:5] ; GFX8-NEXT: v_bfi_b32 v16, v20, 0, v19 -; GFX8-NEXT: v_or_b32_e32 v6, v6, v4 -; GFX8-NEXT: v_sub_u32_e32 v4, vcc, 64, v16 -; GFX8-NEXT: v_lshrrev_b64 v[4:5], v4, v[8:9] +; GFX8-NEXT: v_cndmask_b32_e64 v9, v17, v9, s[6:7] +; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc +; GFX8-NEXT: v_or_b32_e32 v6, v6, v8 +; GFX8-NEXT: v_sub_u32_e32 v8, vcc, 64, v16 +; GFX8-NEXT: v_lshrrev_b64 v[2:3], v22, v[10:11] +; GFX8-NEXT: v_or_b32_e32 v1, v1, v9 +; GFX8-NEXT: v_lshrrev_b64 v[8:9], v8, v[4:5] ; GFX8-NEXT: v_lshlrev_b64 v[10:11], v16, v[6:7] -; GFX8-NEXT: v_add_u32_e32 v17, vcc, v16, v25 -; GFX8-NEXT: v_or_b32_e32 v10, v4, v10 -; GFX8-NEXT: v_or_b32_e32 v11, v5, v11 -; GFX8-NEXT: v_lshlrev_b64 v[4:5], v16, v[8:9] -; GFX8-NEXT: v_lshlrev_b64 v[8:9], v17, v[8:9] +; GFX8-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5] +; GFX8-NEXT: v_or_b32_e32 v10, v8, v10 +; GFX8-NEXT: v_add_u32_e32 v8, vcc, v16, v24 +; GFX8-NEXT: v_or_b32_e32 v11, v9, v11 +; GFX8-NEXT: v_lshlrev_b64 v[8:9], v8, v[4:5] ; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v16 -; GFX8-NEXT: v_cndmask_b32_e32 v17, 0, v4, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v18, 0, v5, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v4, v8, v10, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v5, v9, v11, vcc -; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16 -; GFX8-NEXT: v_and_b32_e32 v10, 0x7f, v20 -; GFX8-NEXT: v_cndmask_b32_e32 v8, v4, v6, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v9, v5, v7, vcc -; GFX8-NEXT: v_sub_u32_e32 v6, vcc, 64, v10 -; GFX8-NEXT: v_lshrrev_b64 v[4:5], v10, v[12:13] -; GFX8-NEXT: v_lshlrev_b64 v[6:7], v6, v[14:15] -; GFX8-NEXT: v_add_u32_e32 v11, vcc, v10, v25 -; GFX8-NEXT: v_or_b32_e32 v16, v4, v6 -; GFX8-NEXT: v_or_b32_e32 v19, v5, v7 -; GFX8-NEXT: v_lshrrev_b64 v[6:7], v11, v[14:15] -; GFX8-NEXT: v_lshrrev_b64 v[4:5], v10, v[14:15] -; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v10 ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e32 v6, v6, v16, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v19, vcc -; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v10 -; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v12, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v13, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e32 v10, 0, v4, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v11, 0, v5, vcc +; GFX8-NEXT: v_or_b32_e32 v3, v18, v3 +; GFX8-NEXT: v_cndmask_b32_e32 v8, v8, v10, vcc +; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v16 +; GFX8-NEXT: v_and_b32_e32 v18, 0x7f, v20 +; GFX8-NEXT: v_cndmask_b32_e32 v17, v9, v11, vcc +; GFX8-NEXT: v_lshlrev_b64 v[4:5], v16, v[4:5] +; GFX8-NEXT: v_cndmask_b32_e64 v16, v8, v6, s[4:5] +; GFX8-NEXT: v_sub_u32_e64 v6, s[6:7], 64, v18 +; GFX8-NEXT: v_lshlrev_b64 v[8:9], v6, v[14:15] +; GFX8-NEXT: v_lshrrev_b64 v[10:11], v18, v[12:13] +; GFX8-NEXT: v_cndmask_b32_e64 v17, v17, v7, s[4:5] +; GFX8-NEXT: v_add_u32_e64 v6, s[4:5], v18, v24 +; GFX8-NEXT: v_lshrrev_b64 v[6:7], v6, v[14:15] +; GFX8-NEXT: v_or_b32_e32 v8, v10, v8 +; GFX8-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v18 +; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v8, s[4:5] +; GFX8-NEXT: v_lshrrev_b64 v[14:15], v18, v[14:15] +; GFX8-NEXT: v_or_b32_e32 v8, v11, v9 +; GFX8-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc +; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[4:5] +; GFX8-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v18 +; GFX8-NEXT: v_cndmask_b32_e32 v6, v6, v12, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v13, vcc +; GFX8-NEXT: v_cndmask_b32_e64 v8, 0, v14, s[4:5] +; GFX8-NEXT: v_cndmask_b32_e64 v9, 0, v15, s[4:5] ; GFX8-NEXT: v_or_b32_e32 v2, v21, v2 -; GFX8-NEXT: v_or_b32_e32 v3, v22, v3 -; GFX8-NEXT: v_or_b32_e32 v4, v17, v6 -; GFX8-NEXT: v_or_b32_e32 v5, v18, v7 -; GFX8-NEXT: v_or_b32_e32 v6, v8, v10 -; GFX8-NEXT: v_or_b32_e32 v7, v9, v11 +; GFX8-NEXT: v_or_b32_e32 v4, v4, v6 +; GFX8-NEXT: v_or_b32_e32 v5, v5, v7 +; GFX8-NEXT: v_or_b32_e32 v6, v16, v8 +; GFX8-NEXT: v_or_b32_e32 v7, v17, v9 ; GFX8-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: v_fshr_v2i128: @@ -8031,89 +8031,89 @@ define <2 x i128> @v_fshr_v2i128(<2 x i128> %lhs, <2 x i128> %rhs, <2 x i128> %a ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: v_lshlrev_b64 v[2:3], 1, v[2:3] ; GFX9-NEXT: v_mov_b32_e32 v19, 0x7f -; GFX9-NEXT: v_lshlrev_b64 v[17:18], 1, v[0:1] -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 31, v1 -; GFX9-NEXT: v_bfi_b32 v27, v16, 0, v19 -; GFX9-NEXT: v_or_b32_e32 v2, v2, v0 -; GFX9-NEXT: v_sub_u32_e32 v0, 64, v27 -; GFX9-NEXT: v_lshrrev_b64 v[0:1], v0, v[17:18] -; GFX9-NEXT: v_lshlrev_b64 v[21:22], v27, v[2:3] -; GFX9-NEXT: v_and_b32_e32 v16, 0x7f, v16 -; GFX9-NEXT: v_or_b32_e32 v21, v0, v21 -; GFX9-NEXT: v_sub_u32_e32 v0, 64, v16 -; GFX9-NEXT: v_lshlrev_b64 v[23:24], v0, v[10:11] -; GFX9-NEXT: v_add_u32_e32 v0, 0xffffffc0, v27 -; GFX9-NEXT: v_or_b32_e32 v22, v1, v22 -; GFX9-NEXT: v_lshlrev_b64 v[0:1], v0, v[17:18] -; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v27 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v21, vcc -; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v27 -; GFX9-NEXT: v_lshrrev_b64 v[25:26], v16, v[8:9] -; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v22, vcc -; GFX9-NEXT: v_cndmask_b32_e64 v21, v0, v2, s[4:5] -; GFX9-NEXT: v_add_u32_e32 v0, 0xffffffc0, v16 -; GFX9-NEXT: v_cndmask_b32_e64 v22, v1, v3, s[4:5] -; GFX9-NEXT: v_lshrrev_b64 v[0:1], v0, v[10:11] -; GFX9-NEXT: v_lshlrev_b64 v[2:3], v27, v[17:18] -; GFX9-NEXT: v_or_b32_e32 v23, v25, v23 -; GFX9-NEXT: v_or_b32_e32 v24, v26, v24 -; GFX9-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v16 -; GFX9-NEXT: v_cndmask_b32_e64 v23, v0, v23, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e64 v17, v1, v24, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v3, 0, v3, vcc -; GFX9-NEXT: v_lshrrev_b64 v[0:1], v16, v[10:11] -; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v8, v23, v8, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v9, v17, v9, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 31, v1 +; GFX9-NEXT: v_lshlrev_b64 v[0:1], 1, v[0:1] +; GFX9-NEXT: v_bfi_b32 v23, v16, 0, v19 +; GFX9-NEXT: v_or_b32_e32 v2, v2, v17 +; GFX9-NEXT: v_sub_u32_e32 v17, 64, v23 +; GFX9-NEXT: v_lshrrev_b64 v[17:18], v17, v[0:1] +; GFX9-NEXT: v_lshlrev_b64 v[21:22], v23, v[2:3] +; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v23 +; GFX9-NEXT: v_or_b32_e32 v21, v17, v21 +; GFX9-NEXT: v_add_u32_e32 v17, 0xffffffc0, v23 +; GFX9-NEXT: v_or_b32_e32 v22, v18, v22 +; GFX9-NEXT: v_lshlrev_b64 v[17:18], v17, v[0:1] +; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v23 +; GFX9-NEXT: v_cndmask_b32_e32 v17, v17, v21, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v18, v18, v22, vcc +; GFX9-NEXT: v_and_b32_e32 v22, 0x7f, v16 +; GFX9-NEXT: v_cndmask_b32_e64 v21, v17, v2, s[4:5] +; GFX9-NEXT: v_sub_u32_e32 v2, 64, v22 +; GFX9-NEXT: v_cndmask_b32_e64 v18, v18, v3, s[4:5] +; GFX9-NEXT: v_lshlrev_b64 v[2:3], v2, v[10:11] +; GFX9-NEXT: v_lshrrev_b64 v[16:17], v22, v[8:9] +; GFX9-NEXT: v_lshlrev_b64 v[0:1], v23, v[0:1] +; GFX9-NEXT: v_or_b32_e32 v16, v16, v2 +; GFX9-NEXT: v_add_u32_e32 v2, 0xffffffc0, v22 +; GFX9-NEXT: v_or_b32_e32 v17, v17, v3 +; GFX9-NEXT: v_lshrrev_b64 v[2:3], v2, v[10:11] +; GFX9-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v22 +; GFX9-NEXT: v_cndmask_b32_e64 v16, v2, v16, s[4:5] +; GFX9-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v22 +; GFX9-NEXT: v_cndmask_b32_e64 v8, v16, v8, s[6:7] +; GFX9-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc ; GFX9-NEXT: v_lshlrev_b64 v[6:7], 1, v[6:7] -; GFX9-NEXT: v_cndmask_b32_e64 v10, 0, v0, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e64 v11, 0, v1, s[4:5] -; GFX9-NEXT: v_or_b32_e32 v0, v2, v8 -; GFX9-NEXT: v_or_b32_e32 v1, v3, v9 -; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[4:5] -; GFX9-NEXT: v_lshrrev_b32_e32 v4, 31, v5 +; GFX9-NEXT: v_cndmask_b32_e64 v17, v3, v17, s[4:5] +; GFX9-NEXT: v_or_b32_e32 v0, v0, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 31, v5 +; GFX9-NEXT: v_lshlrev_b64 v[4:5], 1, v[4:5] ; GFX9-NEXT: v_bfi_b32 v16, v20, 0, v19 -; GFX9-NEXT: v_or_b32_e32 v6, v6, v4 -; GFX9-NEXT: v_sub_u32_e32 v4, 64, v16 -; GFX9-NEXT: v_or_b32_e32 v2, v21, v10 -; GFX9-NEXT: v_or_b32_e32 v3, v22, v11 -; GFX9-NEXT: v_lshrrev_b64 v[4:5], v4, v[8:9] +; GFX9-NEXT: v_cndmask_b32_e64 v9, v17, v9, s[6:7] +; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc +; GFX9-NEXT: v_or_b32_e32 v6, v6, v8 +; GFX9-NEXT: v_sub_u32_e32 v8, 64, v16 +; GFX9-NEXT: v_lshrrev_b64 v[2:3], v22, v[10:11] +; GFX9-NEXT: v_or_b32_e32 v1, v1, v9 +; GFX9-NEXT: v_lshrrev_b64 v[8:9], v8, v[4:5] ; GFX9-NEXT: v_lshlrev_b64 v[10:11], v16, v[6:7] -; GFX9-NEXT: v_add_u32_e32 v17, 0xffffffc0, v16 -; GFX9-NEXT: v_or_b32_e32 v10, v4, v10 -; GFX9-NEXT: v_or_b32_e32 v11, v5, v11 -; GFX9-NEXT: v_lshlrev_b64 v[4:5], v16, v[8:9] -; GFX9-NEXT: v_lshlrev_b64 v[8:9], v17, v[8:9] +; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5] +; GFX9-NEXT: v_or_b32_e32 v10, v8, v10 +; GFX9-NEXT: v_add_u32_e32 v8, 0xffffffc0, v16 +; GFX9-NEXT: v_or_b32_e32 v11, v9, v11 +; GFX9-NEXT: v_lshlrev_b64 v[8:9], v8, v[4:5] ; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, 0, v4, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v18, 0, v5, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v4, v8, v10, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v5, v9, v11, vcc -; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16 -; GFX9-NEXT: v_and_b32_e32 v10, 0x7f, v20 -; GFX9-NEXT: v_cndmask_b32_e32 v8, v4, v6, vcc -; GFX9-NEXT: v_sub_u32_e32 v6, 64, v10 -; GFX9-NEXT: v_cndmask_b32_e32 v9, v5, v7, vcc -; GFX9-NEXT: v_lshrrev_b64 v[4:5], v10, v[12:13] -; GFX9-NEXT: v_lshlrev_b64 v[6:7], v6, v[14:15] -; GFX9-NEXT: v_add_u32_e32 v11, 0xffffffc0, v10 -; GFX9-NEXT: v_or_b32_e32 v16, v4, v6 -; GFX9-NEXT: v_or_b32_e32 v19, v5, v7 -; GFX9-NEXT: v_lshrrev_b64 v[6:7], v11, v[14:15] -; GFX9-NEXT: v_lshrrev_b64 v[4:5], v10, v[14:15] -; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v10 -; GFX9-NEXT: v_cndmask_b32_e32 v6, v6, v16, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v7, v7, v19, vcc -; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v10 -; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v12, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e64 v7, v7, v13, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e32 v10, 0, v4, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v11, 0, v5, vcc -; GFX9-NEXT: v_or_b32_e32 v4, v17, v6 -; GFX9-NEXT: v_or_b32_e32 v5, v18, v7 -; GFX9-NEXT: v_or_b32_e32 v6, v8, v10 -; GFX9-NEXT: v_or_b32_e32 v7, v9, v11 +; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[4:5] +; GFX9-NEXT: v_or_b32_e32 v3, v18, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v8, v8, v10, vcc +; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v16 +; GFX9-NEXT: v_and_b32_e32 v18, 0x7f, v20 +; GFX9-NEXT: v_lshlrev_b64 v[4:5], v16, v[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v16, v8, v6, s[4:5] +; GFX9-NEXT: v_sub_u32_e32 v6, 64, v18 +; GFX9-NEXT: v_cndmask_b32_e32 v17, v9, v11, vcc +; GFX9-NEXT: v_lshlrev_b64 v[8:9], v6, v[14:15] +; GFX9-NEXT: v_lshrrev_b64 v[10:11], v18, v[12:13] +; GFX9-NEXT: v_add_u32_e32 v6, 0xffffffc0, v18 +; GFX9-NEXT: v_cndmask_b32_e64 v17, v17, v7, s[4:5] +; GFX9-NEXT: v_lshrrev_b64 v[6:7], v6, v[14:15] +; GFX9-NEXT: v_or_b32_e32 v8, v10, v8 +; GFX9-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v18 +; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v8, s[4:5] +; GFX9-NEXT: v_lshrrev_b64 v[14:15], v18, v[14:15] +; GFX9-NEXT: v_or_b32_e32 v8, v11, v9 +; GFX9-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v18 +; GFX9-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v12, s[6:7] +; GFX9-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc +; GFX9-NEXT: v_cndmask_b32_e64 v7, v7, v13, s[6:7] +; GFX9-NEXT: v_or_b32_e32 v4, v4, v6 +; GFX9-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc +; GFX9-NEXT: v_cndmask_b32_e64 v6, 0, v14, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v8, 0, v15, s[4:5] +; GFX9-NEXT: v_or_b32_e32 v2, v21, v2 +; GFX9-NEXT: v_or_b32_e32 v5, v5, v7 +; GFX9-NEXT: v_or_b32_e32 v6, v16, v6 +; GFX9-NEXT: v_or_b32_e32 v7, v17, v8 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX10-LABEL: v_fshr_v2i128: diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll index 3e1602625f197..d3f8c6f672fea 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll @@ -7,33 +7,25 @@ define amdgpu_kernel void @v_insert_v64i32_varidx(ptr addrspace(1) %out.ptr, ptr addrspace(1) %ptr, i32 %val, i32 %idx) #0 { ; GCN-LABEL: v_insert_v64i32_varidx: ; GCN: ; %bb.0: -; GCN-NEXT: s_load_dwordx4 s[20:23], s[8:9], 0x0 -; GCN-NEXT: s_load_dwordx2 s[24:25], s[8:9], 0x10 +; GCN-NEXT: s_load_dwordx4 s[28:31], s[8:9], 0x0 +; GCN-NEXT: s_load_dwordx2 s[34:35], s[8:9], 0x10 ; GCN-NEXT: s_add_u32 s0, s0, s17 ; GCN-NEXT: s_addc_u32 s1, s1, 0 ; GCN-NEXT: v_mov_b32_e32 v64, 0 ; GCN-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NEXT: s_load_dwordx16 s[36:51], s[22:23], 0x0 -; GCN-NEXT: s_load_dwordx16 s[52:67], s[22:23], 0x40 -; GCN-NEXT: s_load_dwordx16 s[4:19], s[22:23], 0x80 +; GCN-NEXT: s_load_dwordx16 s[12:27], s[30:31], 0x0 +; GCN-NEXT: s_load_dwordx16 s[52:67], s[30:31], 0x40 +; GCN-NEXT: s_load_dwordx16 s[36:51], s[30:31], 0x80 ; GCN-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NEXT: v_mov_b32_e32 v0, s36 -; GCN-NEXT: v_mov_b32_e32 v1, s37 -; GCN-NEXT: v_mov_b32_e32 v2, s38 -; GCN-NEXT: v_mov_b32_e32 v3, s39 -; GCN-NEXT: v_mov_b32_e32 v4, s40 -; GCN-NEXT: v_mov_b32_e32 v5, s41 -; GCN-NEXT: v_mov_b32_e32 v6, s42 -; GCN-NEXT: v_mov_b32_e32 v7, s43 -; GCN-NEXT: v_mov_b32_e32 v8, s44 -; GCN-NEXT: v_mov_b32_e32 v9, s45 -; GCN-NEXT: v_mov_b32_e32 v10, s46 -; GCN-NEXT: v_mov_b32_e32 v11, s47 -; GCN-NEXT: v_mov_b32_e32 v12, s48 -; GCN-NEXT: v_mov_b32_e32 v13, s49 -; GCN-NEXT: v_mov_b32_e32 v14, s50 -; GCN-NEXT: v_mov_b32_e32 v15, s51 -; GCN-NEXT: s_load_dwordx16 s[36:51], s[22:23], 0xc0 +; GCN-NEXT: v_mov_b32_e32 v0, s12 +; GCN-NEXT: v_mov_b32_e32 v1, s13 +; GCN-NEXT: v_mov_b32_e32 v2, s14 +; GCN-NEXT: v_mov_b32_e32 v3, s15 +; GCN-NEXT: v_mov_b32_e32 v4, s16 +; GCN-NEXT: v_mov_b32_e32 v5, s17 +; GCN-NEXT: v_mov_b32_e32 v6, s18 +; GCN-NEXT: v_mov_b32_e32 v7, s19 +; GCN-NEXT: s_load_dwordx16 s[4:19], s[30:31], 0xc0 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0 offset:4 ; GCN-NEXT: buffer_store_dword v2, off, s[0:3], 0 offset:8 @@ -42,14 +34,22 @@ define amdgpu_kernel void @v_insert_v64i32_varidx(ptr addrspace(1) %out.ptr, ptr ; GCN-NEXT: buffer_store_dword v5, off, s[0:3], 0 offset:20 ; GCN-NEXT: buffer_store_dword v6, off, s[0:3], 0 offset:24 ; GCN-NEXT: buffer_store_dword v7, off, s[0:3], 0 offset:28 -; GCN-NEXT: buffer_store_dword v8, off, s[0:3], 0 offset:32 -; GCN-NEXT: buffer_store_dword v9, off, s[0:3], 0 offset:36 -; GCN-NEXT: buffer_store_dword v10, off, s[0:3], 0 offset:40 -; GCN-NEXT: buffer_store_dword v11, off, s[0:3], 0 offset:44 -; GCN-NEXT: buffer_store_dword v12, off, s[0:3], 0 offset:48 -; GCN-NEXT: buffer_store_dword v13, off, s[0:3], 0 offset:52 -; GCN-NEXT: buffer_store_dword v14, off, s[0:3], 0 offset:56 -; GCN-NEXT: buffer_store_dword v15, off, s[0:3], 0 offset:60 +; GCN-NEXT: v_mov_b32_e32 v0, s20 +; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:32 +; GCN-NEXT: v_mov_b32_e32 v0, s21 +; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:36 +; GCN-NEXT: v_mov_b32_e32 v0, s22 +; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:40 +; GCN-NEXT: v_mov_b32_e32 v0, s23 +; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:44 +; GCN-NEXT: v_mov_b32_e32 v0, s24 +; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:48 +; GCN-NEXT: v_mov_b32_e32 v0, s25 +; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:52 +; GCN-NEXT: v_mov_b32_e32 v0, s26 +; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:56 +; GCN-NEXT: v_mov_b32_e32 v0, s27 +; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:60 ; GCN-NEXT: v_mov_b32_e32 v0, s52 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:64 ; GCN-NEXT: v_mov_b32_e32 v0, s53 @@ -82,74 +82,74 @@ define amdgpu_kernel void @v_insert_v64i32_varidx(ptr addrspace(1) %out.ptr, ptr ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:120 ; GCN-NEXT: v_mov_b32_e32 v0, s67 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:124 -; GCN-NEXT: v_mov_b32_e32 v0, s4 +; GCN-NEXT: v_mov_b32_e32 v0, s36 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:128 -; GCN-NEXT: v_mov_b32_e32 v0, s5 +; GCN-NEXT: v_mov_b32_e32 v0, s37 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:132 -; GCN-NEXT: v_mov_b32_e32 v0, s6 +; GCN-NEXT: v_mov_b32_e32 v0, s38 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:136 -; GCN-NEXT: v_mov_b32_e32 v0, s7 +; GCN-NEXT: v_mov_b32_e32 v0, s39 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:140 -; GCN-NEXT: v_mov_b32_e32 v0, s8 +; GCN-NEXT: v_mov_b32_e32 v0, s40 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:144 -; GCN-NEXT: v_mov_b32_e32 v0, s9 +; GCN-NEXT: v_mov_b32_e32 v0, s41 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:148 -; GCN-NEXT: v_mov_b32_e32 v0, s10 +; GCN-NEXT: v_mov_b32_e32 v0, s42 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:152 -; GCN-NEXT: v_mov_b32_e32 v0, s11 +; GCN-NEXT: v_mov_b32_e32 v0, s43 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:156 -; GCN-NEXT: v_mov_b32_e32 v0, s12 +; GCN-NEXT: v_mov_b32_e32 v0, s44 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:160 -; GCN-NEXT: v_mov_b32_e32 v0, s13 +; GCN-NEXT: v_mov_b32_e32 v0, s45 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:164 -; GCN-NEXT: v_mov_b32_e32 v0, s14 +; GCN-NEXT: v_mov_b32_e32 v0, s46 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:168 -; GCN-NEXT: v_mov_b32_e32 v0, s15 +; GCN-NEXT: v_mov_b32_e32 v0, s47 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:172 -; GCN-NEXT: v_mov_b32_e32 v0, s16 +; GCN-NEXT: v_mov_b32_e32 v0, s48 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:176 -; GCN-NEXT: v_mov_b32_e32 v0, s17 +; GCN-NEXT: v_mov_b32_e32 v0, s49 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:180 -; GCN-NEXT: v_mov_b32_e32 v0, s18 +; GCN-NEXT: v_mov_b32_e32 v0, s50 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:184 -; GCN-NEXT: v_mov_b32_e32 v0, s19 +; GCN-NEXT: v_mov_b32_e32 v0, s51 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:188 ; GCN-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NEXT: v_mov_b32_e32 v0, s36 +; GCN-NEXT: v_mov_b32_e32 v0, s4 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:192 -; GCN-NEXT: v_mov_b32_e32 v0, s37 +; GCN-NEXT: v_mov_b32_e32 v0, s5 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:196 -; GCN-NEXT: v_mov_b32_e32 v0, s38 +; GCN-NEXT: v_mov_b32_e32 v0, s6 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:200 -; GCN-NEXT: v_mov_b32_e32 v0, s39 +; GCN-NEXT: v_mov_b32_e32 v0, s7 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:204 -; GCN-NEXT: v_mov_b32_e32 v0, s40 +; GCN-NEXT: v_mov_b32_e32 v0, s8 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:208 -; GCN-NEXT: v_mov_b32_e32 v0, s41 +; GCN-NEXT: v_mov_b32_e32 v0, s9 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:212 -; GCN-NEXT: v_mov_b32_e32 v0, s42 +; GCN-NEXT: v_mov_b32_e32 v0, s10 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:216 -; GCN-NEXT: v_mov_b32_e32 v0, s43 +; GCN-NEXT: v_mov_b32_e32 v0, s11 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:220 -; GCN-NEXT: v_mov_b32_e32 v0, s44 +; GCN-NEXT: v_mov_b32_e32 v0, s12 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:224 -; GCN-NEXT: v_mov_b32_e32 v0, s45 +; GCN-NEXT: v_mov_b32_e32 v0, s13 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:228 -; GCN-NEXT: v_mov_b32_e32 v0, s46 +; GCN-NEXT: v_mov_b32_e32 v0, s14 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:232 -; GCN-NEXT: v_mov_b32_e32 v0, s47 +; GCN-NEXT: v_mov_b32_e32 v0, s15 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:236 -; GCN-NEXT: v_mov_b32_e32 v0, s48 +; GCN-NEXT: v_mov_b32_e32 v0, s16 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:240 -; GCN-NEXT: v_mov_b32_e32 v0, s49 +; GCN-NEXT: v_mov_b32_e32 v0, s17 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:244 -; GCN-NEXT: v_mov_b32_e32 v0, s50 -; GCN-NEXT: s_and_b32 s4, s25, 63 +; GCN-NEXT: v_mov_b32_e32 v0, s18 +; GCN-NEXT: s_and_b32 s4, s35, 63 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:248 -; GCN-NEXT: v_mov_b32_e32 v0, s51 +; GCN-NEXT: v_mov_b32_e32 v0, s19 ; GCN-NEXT: s_lshl_b32 s4, s4, 2 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:252 -; GCN-NEXT: v_mov_b32_e32 v0, s24 +; GCN-NEXT: v_mov_b32_e32 v0, s34 ; GCN-NEXT: v_mov_b32_e32 v1, s4 ; GCN-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen ; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 @@ -218,37 +218,37 @@ define amdgpu_kernel void @v_insert_v64i32_varidx(ptr addrspace(1) %out.ptr, ptr ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], 0 offset:248 ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], 0 offset:252 ; GCN-NEXT: s_waitcnt vmcnt(60) -; GCN-NEXT: global_store_dwordx4 v64, v[0:3], s[20:21] +; GCN-NEXT: global_store_dwordx4 v64, v[0:3], s[28:29] ; GCN-NEXT: s_waitcnt vmcnt(57) -; GCN-NEXT: global_store_dwordx4 v64, v[4:7], s[20:21] offset:16 +; GCN-NEXT: global_store_dwordx4 v64, v[4:7], s[28:29] offset:16 ; GCN-NEXT: s_waitcnt vmcnt(54) -; GCN-NEXT: global_store_dwordx4 v64, v[8:11], s[20:21] offset:32 +; GCN-NEXT: global_store_dwordx4 v64, v[8:11], s[28:29] offset:32 ; GCN-NEXT: s_waitcnt vmcnt(51) -; GCN-NEXT: global_store_dwordx4 v64, v[12:15], s[20:21] offset:48 +; GCN-NEXT: global_store_dwordx4 v64, v[12:15], s[28:29] offset:48 ; GCN-NEXT: s_waitcnt vmcnt(48) -; GCN-NEXT: global_store_dwordx4 v64, v[16:19], s[20:21] offset:64 +; GCN-NEXT: global_store_dwordx4 v64, v[16:19], s[28:29] offset:64 ; GCN-NEXT: s_waitcnt vmcnt(45) -; GCN-NEXT: global_store_dwordx4 v64, v[20:23], s[20:21] offset:80 +; GCN-NEXT: global_store_dwordx4 v64, v[20:23], s[28:29] offset:80 ; GCN-NEXT: s_waitcnt vmcnt(42) -; GCN-NEXT: global_store_dwordx4 v64, v[24:27], s[20:21] offset:96 +; GCN-NEXT: global_store_dwordx4 v64, v[24:27], s[28:29] offset:96 ; GCN-NEXT: s_waitcnt vmcnt(39) -; GCN-NEXT: global_store_dwordx4 v64, v[28:31], s[20:21] offset:112 +; GCN-NEXT: global_store_dwordx4 v64, v[28:31], s[28:29] offset:112 ; GCN-NEXT: s_waitcnt vmcnt(36) -; GCN-NEXT: global_store_dwordx4 v64, v[32:35], s[20:21] offset:128 +; GCN-NEXT: global_store_dwordx4 v64, v[32:35], s[28:29] offset:128 ; GCN-NEXT: s_waitcnt vmcnt(33) -; GCN-NEXT: global_store_dwordx4 v64, v[36:39], s[20:21] offset:144 +; GCN-NEXT: global_store_dwordx4 v64, v[36:39], s[28:29] offset:144 ; GCN-NEXT: s_waitcnt vmcnt(30) -; GCN-NEXT: global_store_dwordx4 v64, v[40:43], s[20:21] offset:160 +; GCN-NEXT: global_store_dwordx4 v64, v[40:43], s[28:29] offset:160 ; GCN-NEXT: s_waitcnt vmcnt(27) -; GCN-NEXT: global_store_dwordx4 v64, v[44:47], s[20:21] offset:176 +; GCN-NEXT: global_store_dwordx4 v64, v[44:47], s[28:29] offset:176 ; GCN-NEXT: s_waitcnt vmcnt(24) -; GCN-NEXT: global_store_dwordx4 v64, v[48:51], s[20:21] offset:192 +; GCN-NEXT: global_store_dwordx4 v64, v[48:51], s[28:29] offset:192 ; GCN-NEXT: s_waitcnt vmcnt(21) -; GCN-NEXT: global_store_dwordx4 v64, v[52:55], s[20:21] offset:208 +; GCN-NEXT: global_store_dwordx4 v64, v[52:55], s[28:29] offset:208 ; GCN-NEXT: s_waitcnt vmcnt(18) -; GCN-NEXT: global_store_dwordx4 v64, v[56:59], s[20:21] offset:224 +; GCN-NEXT: global_store_dwordx4 v64, v[56:59], s[28:29] offset:224 ; GCN-NEXT: s_waitcnt vmcnt(15) -; GCN-NEXT: global_store_dwordx4 v64, v[60:63], s[20:21] offset:240 +; GCN-NEXT: global_store_dwordx4 v64, v[60:63], s[28:29] offset:240 ; GCN-NEXT: s_endpgm %vec = load <64 x i32>, ptr addrspace(1) %ptr %insert = insertelement <64 x i32> %vec, i32 %val, i32 %idx diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll index cc433d210f985..a223a50511c5e 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll @@ -885,44 +885,44 @@ define void @dyn_insertelement_v8f64_const_s_v_v(double %val, i32 %idx) { ; GPRIDX-NEXT: s_mov_b64 s[6:7], 2.0 ; GPRIDX-NEXT: v_mov_b32_e32 v3, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v4, s5 +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 ; GPRIDX-NEXT: v_mov_b32_e32 v5, s6 ; GPRIDX-NEXT: v_mov_b32_e32 v6, s7 +; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 ; GPRIDX-NEXT: v_mov_b32_e32 v7, s8 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s9 +; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v2 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s10 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s11 +; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v2 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s12 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s13 +; GPRIDX-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v10, v10, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v2 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s14 ; GPRIDX-NEXT: v_mov_b32_e32 v14, s15 +; GPRIDX-NEXT: v_cndmask_b32_e32 v11, v11, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v12, v12, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v2 ; GPRIDX-NEXT: v_mov_b32_e32 v15, s16 ; GPRIDX-NEXT: v_mov_b32_e32 v16, s17 +; GPRIDX-NEXT: v_cndmask_b32_e32 v13, v13, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v14, v14, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v2 ; GPRIDX-NEXT: v_mov_b32_e32 v17, s18 ; GPRIDX-NEXT: v_mov_b32_e32 v18, s19 -; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[16:17], 0, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[4:5], 2, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[6:7], 3, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[8:9], 4, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[10:11], 5, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[12:13], 6, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[14:15], 7, v2 -; GPRIDX-NEXT: v_cndmask_b32_e64 v3, v3, v0, s[16:17] -; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc -; GPRIDX-NEXT: v_cndmask_b32_e64 v4, v4, v1, s[16:17] -; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc -; GPRIDX-NEXT: v_cndmask_b32_e64 v7, v7, v0, s[4:5] -; GPRIDX-NEXT: v_cndmask_b32_e64 v9, v9, v0, s[6:7] -; GPRIDX-NEXT: v_cndmask_b32_e64 v11, v11, v0, s[8:9] -; GPRIDX-NEXT: v_cndmask_b32_e64 v13, v13, v0, s[10:11] -; GPRIDX-NEXT: v_cndmask_b32_e64 v15, v15, v0, s[12:13] -; GPRIDX-NEXT: v_cndmask_b32_e64 v17, v17, v0, s[14:15] -; GPRIDX-NEXT: v_cndmask_b32_e64 v8, v8, v1, s[4:5] -; GPRIDX-NEXT: v_cndmask_b32_e64 v10, v10, v1, s[6:7] -; GPRIDX-NEXT: v_cndmask_b32_e64 v12, v12, v1, s[8:9] -; GPRIDX-NEXT: v_cndmask_b32_e64 v14, v14, v1, s[10:11] -; GPRIDX-NEXT: v_cndmask_b32_e64 v16, v16, v1, s[12:13] -; GPRIDX-NEXT: v_cndmask_b32_e64 v18, v18, v1, s[14:15] +; GPRIDX-NEXT: v_cndmask_b32_e32 v15, v15, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v16, v16, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v2 +; GPRIDX-NEXT: v_cndmask_b32_e32 v17, v17, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v18, v18, v1, vcc ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[3:6], off ; GPRIDX-NEXT: s_waitcnt vmcnt(0) ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[7:10], off @@ -1071,44 +1071,44 @@ define void @dyn_insertelement_v8f64_const_s_v_v(double %val, i32 %idx) { ; GFX8-NEXT: s_mov_b64 s[6:7], 2.0 ; GFX8-NEXT: v_mov_b32_e32 v3, s4 ; GFX8-NEXT: v_mov_b32_e32 v4, s5 +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 ; GFX8-NEXT: v_mov_b32_e32 v5, s6 ; GFX8-NEXT: v_mov_b32_e32 v6, s7 +; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 ; GFX8-NEXT: v_mov_b32_e32 v7, s8 ; GFX8-NEXT: v_mov_b32_e32 v8, s9 +; GFX8-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 2, v2 ; GFX8-NEXT: v_mov_b32_e32 v9, s10 ; GFX8-NEXT: v_mov_b32_e32 v10, s11 +; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v8, v8, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 3, v2 ; GFX8-NEXT: v_mov_b32_e32 v11, s12 ; GFX8-NEXT: v_mov_b32_e32 v12, s13 +; GFX8-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v10, v10, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 4, v2 ; GFX8-NEXT: v_mov_b32_e32 v13, s14 ; GFX8-NEXT: v_mov_b32_e32 v14, s15 +; GFX8-NEXT: v_cndmask_b32_e32 v11, v11, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v12, v12, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 5, v2 ; GFX8-NEXT: v_mov_b32_e32 v15, s16 ; GFX8-NEXT: v_mov_b32_e32 v16, s17 +; GFX8-NEXT: v_cndmask_b32_e32 v13, v13, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v14, v14, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 6, v2 ; GFX8-NEXT: v_mov_b32_e32 v17, s18 ; GFX8-NEXT: v_mov_b32_e32 v18, s19 -; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[16:17], 0, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 2, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[6:7], 3, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[8:9], 4, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[10:11], 5, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[12:13], 6, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[14:15], 7, v2 -; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v0, s[16:17] -; GFX8-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc -; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v1, s[16:17] -; GFX8-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc -; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v0, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v9, v9, v0, s[6:7] -; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v0, s[8:9] -; GFX8-NEXT: v_cndmask_b32_e64 v13, v13, v0, s[10:11] -; GFX8-NEXT: v_cndmask_b32_e64 v15, v15, v0, s[12:13] -; GFX8-NEXT: v_cndmask_b32_e64 v17, v17, v0, s[14:15] -; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v1, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v10, v10, v1, s[6:7] -; GFX8-NEXT: v_cndmask_b32_e64 v12, v12, v1, s[8:9] -; GFX8-NEXT: v_cndmask_b32_e64 v14, v14, v1, s[10:11] -; GFX8-NEXT: v_cndmask_b32_e64 v16, v16, v1, s[12:13] -; GFX8-NEXT: v_cndmask_b32_e64 v18, v18, v1, s[14:15] +; GFX8-NEXT: v_cndmask_b32_e32 v15, v15, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v16, v16, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 7, v2 +; GFX8-NEXT: v_cndmask_b32_e32 v17, v17, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v18, v18, v1, vcc ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[3:6] ; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[7:10] @@ -1151,47 +1151,47 @@ define amdgpu_ps void @dyn_insertelement_v8f64_s_s_v(<8 x double> inreg %vec, do ; GPRIDX-NEXT: s_mov_b32 s12, s14 ; GPRIDX-NEXT: s_mov_b32 s14, s16 ; GPRIDX-NEXT: v_mov_b32_e32 v16, s15 -; GPRIDX-NEXT: v_mov_b32_e32 v15, s14 -; GPRIDX-NEXT: v_mov_b32_e32 v14, s13 -; GPRIDX-NEXT: v_mov_b32_e32 v13, s12 -; GPRIDX-NEXT: v_mov_b32_e32 v12, s11 -; GPRIDX-NEXT: v_mov_b32_e32 v11, s10 -; GPRIDX-NEXT: v_mov_b32_e32 v10, s9 -; GPRIDX-NEXT: v_mov_b32_e32 v9, s8 -; GPRIDX-NEXT: v_mov_b32_e32 v8, s7 -; GPRIDX-NEXT: v_mov_b32_e32 v7, s6 -; GPRIDX-NEXT: v_mov_b32_e32 v6, s5 -; GPRIDX-NEXT: v_mov_b32_e32 v5, s4 -; GPRIDX-NEXT: v_mov_b32_e32 v4, s3 -; GPRIDX-NEXT: v_mov_b32_e32 v3, s2 ; GPRIDX-NEXT: v_mov_b32_e32 v2, s1 ; GPRIDX-NEXT: v_mov_b32_e32 v1, s0 ; GPRIDX-NEXT: v_mov_b32_e32 v17, s18 +; GPRIDX-NEXT: v_mov_b32_e32 v18, s19 +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GPRIDX-NEXT: v_mov_b32_e32 v4, s3 +; GPRIDX-NEXT: v_mov_b32_e32 v3, s2 +; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v1, v17, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v2, v18, vcc ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[4:5], 4, v0 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[6:7], 5, v0 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[8:9], 6, v0 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[10:11], 7, v0 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v0 -; GPRIDX-NEXT: v_mov_b32_e32 v0, s19 -; GPRIDX-NEXT: v_cndmask_b32_e64 v1, v1, v17, s[12:13] +; GPRIDX-NEXT: v_mov_b32_e32 v6, s5 +; GPRIDX-NEXT: v_mov_b32_e32 v5, s4 ; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v3, v17, vcc -; GPRIDX-NEXT: v_cndmask_b32_e64 v2, v2, v0, s[12:13] -; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v4, v0, vcc -; GPRIDX-NEXT: v_cndmask_b32_e64 v5, v5, v17, s[0:1] -; GPRIDX-NEXT: v_cndmask_b32_e64 v7, v7, v17, s[2:3] -; GPRIDX-NEXT: v_cndmask_b32_e64 v9, v9, v17, s[4:5] -; GPRIDX-NEXT: v_cndmask_b32_e64 v11, v11, v17, s[6:7] -; GPRIDX-NEXT: v_cndmask_b32_e64 v13, v13, v17, s[8:9] -; GPRIDX-NEXT: v_cndmask_b32_e64 v15, v15, v17, s[10:11] -; GPRIDX-NEXT: v_cndmask_b32_e64 v6, v6, v0, s[0:1] -; GPRIDX-NEXT: v_cndmask_b32_e64 v8, v8, v0, s[2:3] -; GPRIDX-NEXT: v_cndmask_b32_e64 v10, v10, v0, s[4:5] -; GPRIDX-NEXT: v_cndmask_b32_e64 v12, v12, v0, s[6:7] -; GPRIDX-NEXT: v_cndmask_b32_e64 v14, v14, v0, s[8:9] -; GPRIDX-NEXT: v_cndmask_b32_e64 v16, v16, v0, s[10:11] +; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v4, v18, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v0 +; GPRIDX-NEXT: v_mov_b32_e32 v8, s7 +; GPRIDX-NEXT: v_mov_b32_e32 v7, s6 +; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v5, v17, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v6, v18, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v0 +; GPRIDX-NEXT: v_mov_b32_e32 v10, s9 +; GPRIDX-NEXT: v_mov_b32_e32 v9, s8 +; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v7, v17, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v18, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v0 +; GPRIDX-NEXT: v_mov_b32_e32 v12, s11 +; GPRIDX-NEXT: v_mov_b32_e32 v11, s10 +; GPRIDX-NEXT: v_cndmask_b32_e32 v9, v9, v17, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v10, v10, v18, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v0 +; GPRIDX-NEXT: v_mov_b32_e32 v14, s13 +; GPRIDX-NEXT: v_mov_b32_e32 v13, s12 +; GPRIDX-NEXT: v_cndmask_b32_e32 v11, v11, v17, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v12, v12, v18, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v0 +; GPRIDX-NEXT: v_mov_b32_e32 v15, s14 +; GPRIDX-NEXT: v_cndmask_b32_e32 v13, v13, v17, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v0 +; GPRIDX-NEXT: v_cndmask_b32_e32 v15, v15, v17, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v16, v16, v18, vcc ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[1:4], off ; GPRIDX-NEXT: s_waitcnt vmcnt(0) ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[5:8], off @@ -1349,47 +1349,47 @@ define amdgpu_ps void @dyn_insertelement_v8f64_s_s_v(<8 x double> inreg %vec, do ; GFX8-NEXT: s_mov_b32 s12, s14 ; GFX8-NEXT: s_mov_b32 s14, s16 ; GFX8-NEXT: v_mov_b32_e32 v16, s15 -; GFX8-NEXT: v_mov_b32_e32 v15, s14 -; GFX8-NEXT: v_mov_b32_e32 v14, s13 -; GFX8-NEXT: v_mov_b32_e32 v13, s12 -; GFX8-NEXT: v_mov_b32_e32 v12, s11 -; GFX8-NEXT: v_mov_b32_e32 v11, s10 -; GFX8-NEXT: v_mov_b32_e32 v10, s9 -; GFX8-NEXT: v_mov_b32_e32 v9, s8 -; GFX8-NEXT: v_mov_b32_e32 v8, s7 -; GFX8-NEXT: v_mov_b32_e32 v7, s6 -; GFX8-NEXT: v_mov_b32_e32 v6, s5 -; GFX8-NEXT: v_mov_b32_e32 v5, s4 -; GFX8-NEXT: v_mov_b32_e32 v4, s3 -; GFX8-NEXT: v_mov_b32_e32 v3, s2 ; GFX8-NEXT: v_mov_b32_e32 v2, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s0 ; GFX8-NEXT: v_mov_b32_e32 v17, s18 +; GFX8-NEXT: v_mov_b32_e32 v18, s19 +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX8-NEXT: v_mov_b32_e32 v4, s3 +; GFX8-NEXT: v_mov_b32_e32 v3, s2 +; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v17, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v18, vcc ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 4, v0 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[6:7], 5, v0 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[8:9], 6, v0 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[10:11], 7, v0 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v0 -; GFX8-NEXT: v_mov_b32_e32 v0, s19 -; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v17, s[12:13] +; GFX8-NEXT: v_mov_b32_e32 v6, s5 +; GFX8-NEXT: v_mov_b32_e32 v5, s4 ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v17, vcc -; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v0, s[12:13] -; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v0, vcc -; GFX8-NEXT: v_cndmask_b32_e64 v5, v5, v17, s[0:1] -; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v17, s[2:3] -; GFX8-NEXT: v_cndmask_b32_e64 v9, v9, v17, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v17, s[6:7] -; GFX8-NEXT: v_cndmask_b32_e64 v13, v13, v17, s[8:9] -; GFX8-NEXT: v_cndmask_b32_e64 v15, v15, v17, s[10:11] -; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v0, s[0:1] -; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v0, s[2:3] -; GFX8-NEXT: v_cndmask_b32_e64 v10, v10, v0, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v12, v12, v0, s[6:7] -; GFX8-NEXT: v_cndmask_b32_e64 v14, v14, v0, s[8:9] -; GFX8-NEXT: v_cndmask_b32_e64 v16, v16, v0, s[10:11] +; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v18, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 2, v0 +; GFX8-NEXT: v_mov_b32_e32 v8, s7 +; GFX8-NEXT: v_mov_b32_e32 v7, s6 +; GFX8-NEXT: v_cndmask_b32_e32 v5, v5, v17, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v6, v6, v18, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 3, v0 +; GFX8-NEXT: v_mov_b32_e32 v10, s9 +; GFX8-NEXT: v_mov_b32_e32 v9, s8 +; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v17, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v8, v8, v18, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 4, v0 +; GFX8-NEXT: v_mov_b32_e32 v12, s11 +; GFX8-NEXT: v_mov_b32_e32 v11, s10 +; GFX8-NEXT: v_cndmask_b32_e32 v9, v9, v17, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v10, v10, v18, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 5, v0 +; GFX8-NEXT: v_mov_b32_e32 v14, s13 +; GFX8-NEXT: v_mov_b32_e32 v13, s12 +; GFX8-NEXT: v_cndmask_b32_e32 v11, v11, v17, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v12, v12, v18, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 6, v0 +; GFX8-NEXT: v_mov_b32_e32 v15, s14 +; GFX8-NEXT: v_cndmask_b32_e32 v13, v13, v17, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 7, v0 +; GFX8-NEXT: v_cndmask_b32_e32 v15, v15, v17, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v16, v16, v18, vcc ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[1:4] ; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[5:8] @@ -1708,45 +1708,45 @@ define amdgpu_ps void @dyn_insertelement_v8f64_s_v_v(<8 x double> inreg %vec, do ; GPRIDX-NEXT: s_mov_b32 s12, s14 ; GPRIDX-NEXT: s_mov_b32 s14, s16 ; GPRIDX-NEXT: v_mov_b32_e32 v18, s15 -; GPRIDX-NEXT: v_mov_b32_e32 v17, s14 -; GPRIDX-NEXT: v_mov_b32_e32 v16, s13 -; GPRIDX-NEXT: v_mov_b32_e32 v15, s12 -; GPRIDX-NEXT: v_mov_b32_e32 v14, s11 -; GPRIDX-NEXT: v_mov_b32_e32 v13, s10 -; GPRIDX-NEXT: v_mov_b32_e32 v12, s9 -; GPRIDX-NEXT: v_mov_b32_e32 v11, s8 -; GPRIDX-NEXT: v_mov_b32_e32 v10, s7 -; GPRIDX-NEXT: v_mov_b32_e32 v9, s6 -; GPRIDX-NEXT: v_mov_b32_e32 v8, s5 -; GPRIDX-NEXT: v_mov_b32_e32 v7, s4 -; GPRIDX-NEXT: v_mov_b32_e32 v6, s3 -; GPRIDX-NEXT: v_mov_b32_e32 v5, s2 ; GPRIDX-NEXT: v_mov_b32_e32 v4, s1 ; GPRIDX-NEXT: v_mov_b32_e32 v3, s0 +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v6, s3 +; GPRIDX-NEXT: v_mov_b32_e32 v5, s2 +; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[4:5], 4, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[6:7], 5, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[8:9], 6, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[10:11], 7, v2 -; GPRIDX-NEXT: v_cndmask_b32_e64 v3, v3, v0, s[12:13] +; GPRIDX-NEXT: v_mov_b32_e32 v8, s5 +; GPRIDX-NEXT: v_mov_b32_e32 v7, s4 ; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc -; GPRIDX-NEXT: v_cndmask_b32_e64 v4, v4, v1, s[12:13] ; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc -; GPRIDX-NEXT: v_cndmask_b32_e64 v7, v7, v0, s[0:1] -; GPRIDX-NEXT: v_cndmask_b32_e64 v9, v9, v0, s[2:3] -; GPRIDX-NEXT: v_cndmask_b32_e64 v11, v11, v0, s[4:5] -; GPRIDX-NEXT: v_cndmask_b32_e64 v13, v13, v0, s[6:7] -; GPRIDX-NEXT: v_cndmask_b32_e64 v15, v15, v0, s[8:9] -; GPRIDX-NEXT: v_cndmask_b32_e64 v17, v17, v0, s[10:11] -; GPRIDX-NEXT: v_cndmask_b32_e64 v8, v8, v1, s[0:1] -; GPRIDX-NEXT: v_cndmask_b32_e64 v10, v10, v1, s[2:3] -; GPRIDX-NEXT: v_cndmask_b32_e64 v12, v12, v1, s[4:5] -; GPRIDX-NEXT: v_cndmask_b32_e64 v14, v14, v1, s[6:7] -; GPRIDX-NEXT: v_cndmask_b32_e64 v16, v16, v1, s[8:9] -; GPRIDX-NEXT: v_cndmask_b32_e64 v18, v18, v1, s[10:11] +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v10, s7 +; GPRIDX-NEXT: v_mov_b32_e32 v9, s6 +; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v12, s9 +; GPRIDX-NEXT: v_mov_b32_e32 v11, s8 +; GPRIDX-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v10, v10, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v14, s11 +; GPRIDX-NEXT: v_mov_b32_e32 v13, s10 +; GPRIDX-NEXT: v_cndmask_b32_e32 v11, v11, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v12, v12, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v16, s13 +; GPRIDX-NEXT: v_mov_b32_e32 v15, s12 +; GPRIDX-NEXT: v_cndmask_b32_e32 v13, v13, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v14, v14, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v17, s14 +; GPRIDX-NEXT: v_cndmask_b32_e32 v15, v15, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v16, v16, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v2 +; GPRIDX-NEXT: v_cndmask_b32_e32 v17, v17, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v18, v18, v1, vcc ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[3:6], off ; GPRIDX-NEXT: s_waitcnt vmcnt(0) ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[7:10], off @@ -1900,45 +1900,45 @@ define amdgpu_ps void @dyn_insertelement_v8f64_s_v_v(<8 x double> inreg %vec, do ; GFX8-NEXT: s_mov_b32 s12, s14 ; GFX8-NEXT: s_mov_b32 s14, s16 ; GFX8-NEXT: v_mov_b32_e32 v18, s15 -; GFX8-NEXT: v_mov_b32_e32 v17, s14 -; GFX8-NEXT: v_mov_b32_e32 v16, s13 -; GFX8-NEXT: v_mov_b32_e32 v15, s12 -; GFX8-NEXT: v_mov_b32_e32 v14, s11 -; GFX8-NEXT: v_mov_b32_e32 v13, s10 -; GFX8-NEXT: v_mov_b32_e32 v12, s9 -; GFX8-NEXT: v_mov_b32_e32 v11, s8 -; GFX8-NEXT: v_mov_b32_e32 v10, s7 -; GFX8-NEXT: v_mov_b32_e32 v9, s6 -; GFX8-NEXT: v_mov_b32_e32 v8, s5 -; GFX8-NEXT: v_mov_b32_e32 v7, s4 -; GFX8-NEXT: v_mov_b32_e32 v6, s3 -; GFX8-NEXT: v_mov_b32_e32 v5, s2 ; GFX8-NEXT: v_mov_b32_e32 v4, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s0 +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 +; GFX8-NEXT: v_mov_b32_e32 v6, s3 +; GFX8-NEXT: v_mov_b32_e32 v5, s2 +; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 4, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[6:7], 5, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[8:9], 6, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[10:11], 7, v2 -; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v0, s[12:13] +; GFX8-NEXT: v_mov_b32_e32 v8, s5 +; GFX8-NEXT: v_mov_b32_e32 v7, s4 ; GFX8-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc -; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v1, s[12:13] ; GFX8-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc -; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v0, s[0:1] -; GFX8-NEXT: v_cndmask_b32_e64 v9, v9, v0, s[2:3] -; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v0, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v13, v13, v0, s[6:7] -; GFX8-NEXT: v_cndmask_b32_e64 v15, v15, v0, s[8:9] -; GFX8-NEXT: v_cndmask_b32_e64 v17, v17, v0, s[10:11] -; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v1, s[0:1] -; GFX8-NEXT: v_cndmask_b32_e64 v10, v10, v1, s[2:3] -; GFX8-NEXT: v_cndmask_b32_e64 v12, v12, v1, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v14, v14, v1, s[6:7] -; GFX8-NEXT: v_cndmask_b32_e64 v16, v16, v1, s[8:9] -; GFX8-NEXT: v_cndmask_b32_e64 v18, v18, v1, s[10:11] +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 2, v2 +; GFX8-NEXT: v_mov_b32_e32 v10, s7 +; GFX8-NEXT: v_mov_b32_e32 v9, s6 +; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v8, v8, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 3, v2 +; GFX8-NEXT: v_mov_b32_e32 v12, s9 +; GFX8-NEXT: v_mov_b32_e32 v11, s8 +; GFX8-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v10, v10, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 4, v2 +; GFX8-NEXT: v_mov_b32_e32 v14, s11 +; GFX8-NEXT: v_mov_b32_e32 v13, s10 +; GFX8-NEXT: v_cndmask_b32_e32 v11, v11, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v12, v12, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 5, v2 +; GFX8-NEXT: v_mov_b32_e32 v16, s13 +; GFX8-NEXT: v_mov_b32_e32 v15, s12 +; GFX8-NEXT: v_cndmask_b32_e32 v13, v13, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v14, v14, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 6, v2 +; GFX8-NEXT: v_mov_b32_e32 v17, s14 +; GFX8-NEXT: v_cndmask_b32_e32 v15, v15, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v16, v16, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 7, v2 +; GFX8-NEXT: v_cndmask_b32_e32 v17, v17, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v18, v18, v1, vcc ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[3:6] ; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[7:10] @@ -7488,54 +7488,54 @@ define amdgpu_ps <7 x double> @dyn_insertelement_v7f64_s_v_v(<7 x double> inreg ; GPRIDX-NEXT: s_mov_b32 s12, s14 ; GPRIDX-NEXT: s_mov_b32 s13, s15 ; GPRIDX-NEXT: v_mov_b32_e32 v18, s15 -; GPRIDX-NEXT: v_mov_b32_e32 v17, s14 -; GPRIDX-NEXT: v_mov_b32_e32 v16, s13 -; GPRIDX-NEXT: v_mov_b32_e32 v15, s12 -; GPRIDX-NEXT: v_mov_b32_e32 v14, s11 -; GPRIDX-NEXT: v_mov_b32_e32 v13, s10 -; GPRIDX-NEXT: v_mov_b32_e32 v12, s9 -; GPRIDX-NEXT: v_mov_b32_e32 v11, s8 -; GPRIDX-NEXT: v_mov_b32_e32 v10, s7 -; GPRIDX-NEXT: v_mov_b32_e32 v9, s6 -; GPRIDX-NEXT: v_mov_b32_e32 v8, s5 -; GPRIDX-NEXT: v_mov_b32_e32 v7, s4 -; GPRIDX-NEXT: v_mov_b32_e32 v6, s3 -; GPRIDX-NEXT: v_mov_b32_e32 v5, s2 ; GPRIDX-NEXT: v_mov_b32_e32 v4, s1 ; GPRIDX-NEXT: v_mov_b32_e32 v3, s0 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[4:5], 4, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[6:7], 5, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[8:9], 6, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[10:11], 1, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v6, s3 +; GPRIDX-NEXT: v_mov_b32_e32 v5, s2 ; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc -; GPRIDX-NEXT: v_cndmask_b32_e64 v2, v5, v0, s[10:11] -; GPRIDX-NEXT: v_cndmask_b32_e64 v5, v7, v0, s[0:1] -; GPRIDX-NEXT: v_cndmask_b32_e64 v7, v9, v0, s[2:3] -; GPRIDX-NEXT: v_cndmask_b32_e64 v9, v11, v0, s[4:5] -; GPRIDX-NEXT: v_cndmask_b32_e64 v11, v13, v0, s[6:7] -; GPRIDX-NEXT: v_cndmask_b32_e64 v0, v15, v0, s[8:9] ; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc -; GPRIDX-NEXT: v_cndmask_b32_e64 v6, v6, v1, s[10:11] -; GPRIDX-NEXT: v_cndmask_b32_e64 v8, v8, v1, s[0:1] -; GPRIDX-NEXT: v_cndmask_b32_e64 v10, v10, v1, s[2:3] -; GPRIDX-NEXT: v_cndmask_b32_e64 v12, v12, v1, s[4:5] -; GPRIDX-NEXT: v_cndmask_b32_e64 v13, v14, v1, s[6:7] -; GPRIDX-NEXT: v_cndmask_b32_e64 v1, v16, v1, s[8:9] +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v8, s5 +; GPRIDX-NEXT: v_mov_b32_e32 v7, s4 +; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v10, s7 +; GPRIDX-NEXT: v_mov_b32_e32 v9, s6 +; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v12, s9 +; GPRIDX-NEXT: v_mov_b32_e32 v11, s8 +; GPRIDX-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v10, v10, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v14, s11 +; GPRIDX-NEXT: v_mov_b32_e32 v13, s10 +; GPRIDX-NEXT: v_cndmask_b32_e32 v11, v11, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v12, v12, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v16, s13 +; GPRIDX-NEXT: v_mov_b32_e32 v15, s12 +; GPRIDX-NEXT: v_cndmask_b32_e32 v13, v13, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v14, v14, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v2 +; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v15, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v16, v1, vcc +; GPRIDX-NEXT: v_mov_b32_e32 v17, s14 ; GPRIDX-NEXT: v_readfirstlane_b32 s0, v3 ; GPRIDX-NEXT: v_readfirstlane_b32 s1, v4 -; GPRIDX-NEXT: v_readfirstlane_b32 s2, v2 +; GPRIDX-NEXT: v_readfirstlane_b32 s2, v5 ; GPRIDX-NEXT: v_readfirstlane_b32 s3, v6 -; GPRIDX-NEXT: v_readfirstlane_b32 s4, v5 +; GPRIDX-NEXT: v_readfirstlane_b32 s4, v7 ; GPRIDX-NEXT: v_readfirstlane_b32 s5, v8 -; GPRIDX-NEXT: v_readfirstlane_b32 s6, v7 +; GPRIDX-NEXT: v_readfirstlane_b32 s6, v9 ; GPRIDX-NEXT: v_readfirstlane_b32 s7, v10 -; GPRIDX-NEXT: v_readfirstlane_b32 s8, v9 +; GPRIDX-NEXT: v_readfirstlane_b32 s8, v11 ; GPRIDX-NEXT: v_readfirstlane_b32 s9, v12 -; GPRIDX-NEXT: v_readfirstlane_b32 s10, v11 -; GPRIDX-NEXT: v_readfirstlane_b32 s11, v13 +; GPRIDX-NEXT: v_readfirstlane_b32 s10, v13 +; GPRIDX-NEXT: v_readfirstlane_b32 s11, v14 ; GPRIDX-NEXT: v_readfirstlane_b32 s12, v0 ; GPRIDX-NEXT: v_readfirstlane_b32 s13, v1 ; GPRIDX-NEXT: ; return to shader part epilog @@ -7684,54 +7684,54 @@ define amdgpu_ps <7 x double> @dyn_insertelement_v7f64_s_v_v(<7 x double> inreg ; GFX8-NEXT: s_mov_b32 s12, s14 ; GFX8-NEXT: s_mov_b32 s13, s15 ; GFX8-NEXT: v_mov_b32_e32 v18, s15 -; GFX8-NEXT: v_mov_b32_e32 v17, s14 -; GFX8-NEXT: v_mov_b32_e32 v16, s13 -; GFX8-NEXT: v_mov_b32_e32 v15, s12 -; GFX8-NEXT: v_mov_b32_e32 v14, s11 -; GFX8-NEXT: v_mov_b32_e32 v13, s10 -; GFX8-NEXT: v_mov_b32_e32 v12, s9 -; GFX8-NEXT: v_mov_b32_e32 v11, s8 -; GFX8-NEXT: v_mov_b32_e32 v10, s7 -; GFX8-NEXT: v_mov_b32_e32 v9, s6 -; GFX8-NEXT: v_mov_b32_e32 v8, s5 -; GFX8-NEXT: v_mov_b32_e32 v7, s4 -; GFX8-NEXT: v_mov_b32_e32 v6, s3 -; GFX8-NEXT: v_mov_b32_e32 v5, s2 ; GFX8-NEXT: v_mov_b32_e32 v4, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s0 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 4, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[6:7], 5, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[8:9], 6, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[10:11], 1, v2 +; GFX8-NEXT: v_mov_b32_e32 v6, s3 +; GFX8-NEXT: v_mov_b32_e32 v5, s2 ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc -; GFX8-NEXT: v_cndmask_b32_e64 v2, v5, v0, s[10:11] -; GFX8-NEXT: v_cndmask_b32_e64 v5, v7, v0, s[0:1] -; GFX8-NEXT: v_cndmask_b32_e64 v7, v9, v0, s[2:3] -; GFX8-NEXT: v_cndmask_b32_e64 v9, v11, v0, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v11, v13, v0, s[6:7] -; GFX8-NEXT: v_cndmask_b32_e64 v0, v15, v0, s[8:9] ; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc -; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v1, s[10:11] -; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v1, s[0:1] -; GFX8-NEXT: v_cndmask_b32_e64 v10, v10, v1, s[2:3] -; GFX8-NEXT: v_cndmask_b32_e64 v12, v12, v1, s[4:5] -; GFX8-NEXT: v_cndmask_b32_e64 v13, v14, v1, s[6:7] -; GFX8-NEXT: v_cndmask_b32_e64 v1, v16, v1, s[8:9] +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 +; GFX8-NEXT: v_mov_b32_e32 v8, s5 +; GFX8-NEXT: v_mov_b32_e32 v7, s4 +; GFX8-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 2, v2 +; GFX8-NEXT: v_mov_b32_e32 v10, s7 +; GFX8-NEXT: v_mov_b32_e32 v9, s6 +; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v8, v8, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 3, v2 +; GFX8-NEXT: v_mov_b32_e32 v12, s9 +; GFX8-NEXT: v_mov_b32_e32 v11, s8 +; GFX8-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v10, v10, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 4, v2 +; GFX8-NEXT: v_mov_b32_e32 v14, s11 +; GFX8-NEXT: v_mov_b32_e32 v13, s10 +; GFX8-NEXT: v_cndmask_b32_e32 v11, v11, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v12, v12, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 5, v2 +; GFX8-NEXT: v_mov_b32_e32 v16, s13 +; GFX8-NEXT: v_mov_b32_e32 v15, s12 +; GFX8-NEXT: v_cndmask_b32_e32 v13, v13, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v14, v14, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 6, v2 +; GFX8-NEXT: v_cndmask_b32_e32 v0, v15, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v1, v16, v1, vcc +; GFX8-NEXT: v_mov_b32_e32 v17, s14 ; GFX8-NEXT: v_readfirstlane_b32 s0, v3 ; GFX8-NEXT: v_readfirstlane_b32 s1, v4 -; GFX8-NEXT: v_readfirstlane_b32 s2, v2 +; GFX8-NEXT: v_readfirstlane_b32 s2, v5 ; GFX8-NEXT: v_readfirstlane_b32 s3, v6 -; GFX8-NEXT: v_readfirstlane_b32 s4, v5 +; GFX8-NEXT: v_readfirstlane_b32 s4, v7 ; GFX8-NEXT: v_readfirstlane_b32 s5, v8 -; GFX8-NEXT: v_readfirstlane_b32 s6, v7 +; GFX8-NEXT: v_readfirstlane_b32 s6, v9 ; GFX8-NEXT: v_readfirstlane_b32 s7, v10 -; GFX8-NEXT: v_readfirstlane_b32 s8, v9 +; GFX8-NEXT: v_readfirstlane_b32 s8, v11 ; GFX8-NEXT: v_readfirstlane_b32 s9, v12 -; GFX8-NEXT: v_readfirstlane_b32 s10, v11 -; GFX8-NEXT: v_readfirstlane_b32 s11, v13 +; GFX8-NEXT: v_readfirstlane_b32 s10, v13 +; GFX8-NEXT: v_readfirstlane_b32 s11, v14 ; GFX8-NEXT: v_readfirstlane_b32 s12, v0 ; GFX8-NEXT: v_readfirstlane_b32 s13, v1 ; GFX8-NEXT: ; return to shader part epilog @@ -8195,17 +8195,17 @@ define amdgpu_ps <5 x double> @dyn_insertelement_v5f64_s_v_v(<5 x double> inreg ; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v2 -; GPRIDX-NEXT: v_mov_b32_e32 v11, s8 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s7 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s6 ; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v1, vcc ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v2 -; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[0:1], 4, v2 +; GPRIDX-NEXT: v_mov_b32_e32 v11, s8 ; GPRIDX-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc -; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v10, v1, vcc -; GPRIDX-NEXT: v_cndmask_b32_e64 v0, v11, v0, s[0:1] -; GPRIDX-NEXT: v_cndmask_b32_e64 v1, v12, v1, s[0:1] +; GPRIDX-NEXT: v_cndmask_b32_e32 v10, v10, v1, vcc +; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v2 +; GPRIDX-NEXT: v_cndmask_b32_e32 v0, v11, v0, vcc +; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v12, v1, vcc ; GPRIDX-NEXT: v_readfirstlane_b32 s0, v3 ; GPRIDX-NEXT: v_readfirstlane_b32 s1, v4 ; GPRIDX-NEXT: v_readfirstlane_b32 s2, v5 @@ -8213,7 +8213,7 @@ define amdgpu_ps <5 x double> @dyn_insertelement_v5f64_s_v_v(<5 x double> inreg ; GPRIDX-NEXT: v_readfirstlane_b32 s4, v7 ; GPRIDX-NEXT: v_readfirstlane_b32 s5, v8 ; GPRIDX-NEXT: v_readfirstlane_b32 s6, v9 -; GPRIDX-NEXT: v_readfirstlane_b32 s7, v2 +; GPRIDX-NEXT: v_readfirstlane_b32 s7, v10 ; GPRIDX-NEXT: v_readfirstlane_b32 s8, v0 ; GPRIDX-NEXT: v_readfirstlane_b32 s9, v1 ; GPRIDX-NEXT: ; return to shader part epilog @@ -8335,17 +8335,17 @@ define amdgpu_ps <5 x double> @dyn_insertelement_v5f64_s_v_v(<5 x double> inreg ; GFX8-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 2, v2 -; GFX8-NEXT: v_mov_b32_e32 v11, s8 ; GFX8-NEXT: v_mov_b32_e32 v10, s7 ; GFX8-NEXT: v_mov_b32_e32 v9, s6 ; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v8, v8, v1, vcc ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 3, v2 -; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 4, v2 +; GFX8-NEXT: v_mov_b32_e32 v11, s8 ; GFX8-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc -; GFX8-NEXT: v_cndmask_b32_e32 v2, v10, v1, vcc -; GFX8-NEXT: v_cndmask_b32_e64 v0, v11, v0, s[0:1] -; GFX8-NEXT: v_cndmask_b32_e64 v1, v12, v1, s[0:1] +; GFX8-NEXT: v_cndmask_b32_e32 v10, v10, v1, vcc +; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 4, v2 +; GFX8-NEXT: v_cndmask_b32_e32 v0, v11, v0, vcc +; GFX8-NEXT: v_cndmask_b32_e32 v1, v12, v1, vcc ; GFX8-NEXT: v_readfirstlane_b32 s0, v3 ; GFX8-NEXT: v_readfirstlane_b32 s1, v4 ; GFX8-NEXT: v_readfirstlane_b32 s2, v5 @@ -8353,7 +8353,7 @@ define amdgpu_ps <5 x double> @dyn_insertelement_v5f64_s_v_v(<5 x double> inreg ; GFX8-NEXT: v_readfirstlane_b32 s4, v7 ; GFX8-NEXT: v_readfirstlane_b32 s5, v8 ; GFX8-NEXT: v_readfirstlane_b32 s6, v9 -; GFX8-NEXT: v_readfirstlane_b32 s7, v2 +; GFX8-NEXT: v_readfirstlane_b32 s7, v10 ; GFX8-NEXT: v_readfirstlane_b32 s8, v0 ; GFX8-NEXT: v_readfirstlane_b32 s9, v1 ; GFX8-NEXT: ; return to shader part epilog diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll index f25904350d8d9..b3a827f118e1a 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll @@ -774,54 +774,53 @@ define amdgpu_ps void @load_uniform_P1_v16i32(ptr addrspace(1) inreg %ptra, ptr ; GFX7-NEXT: buffer_load_dwordx4 v[6:9], off, s[0:3], 0 offset:16 ; GFX7-NEXT: buffer_load_dwordx4 v[10:13], off, s[0:3], 0 offset:32 ; GFX7-NEXT: buffer_load_dwordx4 v[14:17], off, s[0:3], 0 offset:48 -; GFX7-NEXT: s_waitcnt vmcnt(3) +; GFX7-NEXT: buffer_load_dwordx4 v[18:21], off, s[0:3], 0 glc +; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: v_readfirstlane_b32 s4, v2 ; GFX7-NEXT: v_readfirstlane_b32 s5, v3 ; GFX7-NEXT: v_readfirstlane_b32 s6, v4 ; GFX7-NEXT: v_readfirstlane_b32 s7, v5 -; GFX7-NEXT: buffer_load_dwordx4 v[2:5], off, s[0:3], 0 glc -; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: v_readfirstlane_b32 s8, v6 ; GFX7-NEXT: v_readfirstlane_b32 s9, v7 +; GFX7-NEXT: buffer_load_dwordx4 v[2:5], off, s[0:3], 0 offset:16 glc +; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: v_readfirstlane_b32 s10, v8 ; GFX7-NEXT: v_readfirstlane_b32 s11, v9 -; GFX7-NEXT: buffer_load_dwordx4 v[6:9], off, s[0:3], 0 offset:16 glc -; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: v_readfirstlane_b32 s12, v10 ; GFX7-NEXT: v_readfirstlane_b32 s13, v11 +; GFX7-NEXT: buffer_load_dwordx4 v[6:9], off, s[0:3], 0 offset:32 glc +; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: v_readfirstlane_b32 s14, v12 ; GFX7-NEXT: v_readfirstlane_b32 s15, v13 -; GFX7-NEXT: buffer_load_dwordx4 v[10:13], off, s[0:3], 0 offset:32 glc +; GFX7-NEXT: buffer_load_dwordx4 v[10:13], off, s[0:3], 0 offset:48 glc ; GFX7-NEXT: s_waitcnt vmcnt(0) +; GFX7-NEXT: v_readfirstlane_b32 s20, v18 ; GFX7-NEXT: v_readfirstlane_b32 s16, v14 +; GFX7-NEXT: v_readfirstlane_b32 s21, v19 +; GFX7-NEXT: v_readfirstlane_b32 s22, v20 +; GFX7-NEXT: v_readfirstlane_b32 s23, v21 +; GFX7-NEXT: s_add_i32 s4, s4, s20 ; GFX7-NEXT: v_readfirstlane_b32 s17, v15 ; GFX7-NEXT: v_readfirstlane_b32 s18, v16 ; GFX7-NEXT: v_readfirstlane_b32 s19, v17 -; GFX7-NEXT: buffer_load_dwordx4 v[14:17], off, s[0:3], 0 offset:48 glc -; GFX7-NEXT: s_waitcnt vmcnt(0) -; GFX7-NEXT: s_mov_b32 s2, 0 -; GFX7-NEXT: s_mov_b64 s[0:1], 0 -; GFX7-NEXT: v_readfirstlane_b32 s20, v2 -; GFX7-NEXT: v_readfirstlane_b32 s21, v3 -; GFX7-NEXT: v_readfirstlane_b32 s22, v4 -; GFX7-NEXT: v_readfirstlane_b32 s23, v5 -; GFX7-NEXT: s_add_i32 s4, s4, s20 -; GFX7-NEXT: v_readfirstlane_b32 s24, v6 -; GFX7-NEXT: v_readfirstlane_b32 s25, v7 -; GFX7-NEXT: v_readfirstlane_b32 s26, v8 -; GFX7-NEXT: v_readfirstlane_b32 s27, v9 ; GFX7-NEXT: s_add_i32 s5, s5, s21 -; GFX7-NEXT: v_readfirstlane_b32 s28, v10 -; GFX7-NEXT: v_readfirstlane_b32 s29, v11 -; GFX7-NEXT: v_readfirstlane_b32 s30, v12 -; GFX7-NEXT: v_readfirstlane_b32 s31, v13 ; GFX7-NEXT: s_add_i32 s6, s6, s22 -; GFX7-NEXT: v_readfirstlane_b32 s33, v14 -; GFX7-NEXT: v_readfirstlane_b32 s34, v15 -; GFX7-NEXT: v_readfirstlane_b32 s35, v16 -; GFX7-NEXT: v_readfirstlane_b32 s36, v17 ; GFX7-NEXT: s_add_i32 s7, s7, s23 +; GFX7-NEXT: s_mov_b32 s2, 0 +; GFX7-NEXT: s_mov_b64 s[0:1], 0 +; GFX7-NEXT: v_readfirstlane_b32 s24, v2 +; GFX7-NEXT: v_readfirstlane_b32 s25, v3 +; GFX7-NEXT: v_readfirstlane_b32 s26, v4 +; GFX7-NEXT: v_readfirstlane_b32 s27, v5 ; GFX7-NEXT: s_add_i32 s8, s8, s24 +; GFX7-NEXT: v_readfirstlane_b32 s28, v6 +; GFX7-NEXT: v_readfirstlane_b32 s29, v7 +; GFX7-NEXT: v_readfirstlane_b32 s30, v8 +; GFX7-NEXT: v_readfirstlane_b32 s33, v10 +; GFX7-NEXT: v_readfirstlane_b32 s31, v9 +; GFX7-NEXT: v_readfirstlane_b32 s34, v11 +; GFX7-NEXT: v_readfirstlane_b32 s35, v12 +; GFX7-NEXT: v_readfirstlane_b32 s36, v13 ; GFX7-NEXT: s_add_i32 s12, s12, s28 ; GFX7-NEXT: s_add_i32 s16, s16, s33 ; GFX7-NEXT: v_mov_b32_e32 v2, s4 diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll index 976fef0e3807e..bd734ed7e03e1 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll @@ -3022,62 +3022,62 @@ define i256 @v_mul_i256(i256 %num, i256 %den) { ; GFX7: ; %bb.0: ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v14, 0 -; GFX7-NEXT: v_mul_lo_u32 v27, v5, v10 -; GFX7-NEXT: v_mul_lo_u32 v29, v3, v12 +; GFX7-NEXT: v_mul_lo_u32 v27, v6, v9 +; GFX7-NEXT: v_mul_lo_u32 v29, v4, v11 +; GFX7-NEXT: v_mul_lo_u32 v30, v3, v12 ; GFX7-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v1, v13, v[16:17] -; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v2, v12, v[18:19] -; GFX7-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v3, v11, v[16:17] -; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v10, 0 -; GFX7-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v4, v10, v[18:19] -; GFX7-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v1, v9, v[16:17] -; GFX7-NEXT: v_cndmask_b32_e64 v26, 0, 1, s[4:5] -; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[6:7], v5, v9, v[20:21] -; GFX7-NEXT: v_mad_u64_u32 v[18:19], vcc, v2, v8, v[22:23] -; GFX7-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v6, v8, v[16:17] ; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v12, 0 -; GFX7-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v1, v11, v[16:17] -; GFX7-NEXT: v_cndmask_b32_e64 v24, 0, 1, s[4:5] -; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v2, v10, v[20:21] -; GFX7-NEXT: v_addc_u32_e64 v20, s[4:5], 0, v24, s[4:5] -; GFX7-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v3, v9, v[16:17] -; GFX7-NEXT: v_addc_u32_e64 v16, s[4:5], 0, v20, s[4:5] -; GFX7-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v4, v8, v[24:25] -; GFX7-NEXT: v_addc_u32_e64 v24, s[4:5], 0, v16, s[4:5] -; GFX7-NEXT: v_mul_lo_u32 v25, v6, v9 -; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v13, v[21:22] +; GFX7-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v2, v12, v[18:19] +; GFX7-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v1, v11, v[16:17] +; GFX7-NEXT: v_cndmask_b32_e64 v22, 0, 1, s[4:5] +; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[6:7], v3, v11, v[20:21] +; GFX7-NEXT: v_mad_u64_u32 v[20:21], vcc, v2, v10, v[18:19] +; GFX7-NEXT: v_addc_u32_e32 v22, vcc, 0, v22, vcc +; GFX7-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v4, v10, v[16:17] +; GFX7-NEXT: v_mad_u64_u32 v[16:17], vcc, v3, v9, v[20:21] +; GFX7-NEXT: v_addc_u32_e32 v26, vcc, 0, v22, vcc +; GFX7-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v5, v9, v[18:19] +; GFX7-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v0, v10, 0 +; GFX7-NEXT: v_mad_u64_u32 v[20:21], vcc, v4, v8, v[16:17] +; GFX7-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v6, v8, v[24:25] +; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v1, v9, v[18:19] ; GFX7-NEXT: v_addc_u32_e32 v6, vcc, 0, v26, vcc -; GFX7-NEXT: v_mul_lo_u32 v26, v4, v11 -; GFX7-NEXT: v_mad_u64_u32 v[21:22], s[6:7], v1, v12, v[16:17] -; GFX7-NEXT: v_mad_u64_u32 v[16:17], vcc, v2, v11, v[21:22] +; GFX7-NEXT: v_mad_u64_u32 v[24:25], vcc, v0, v13, v[21:22] +; GFX7-NEXT: v_cndmask_b32_e64 v21, 0, 1, s[4:5] +; GFX7-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v2, v8, v[16:17] +; GFX7-NEXT: v_addc_u32_e64 v28, s[4:5], 0, v21, s[4:5] +; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[6:7], v1, v12, v[24:25] ; GFX7-NEXT: v_mad_u64_u32 v[21:22], s[8:9], v0, v11, v[19:20] -; GFX7-NEXT: v_cndmask_b32_e64 v28, 0, 1, s[8:9] -; GFX7-NEXT: v_mad_u64_u32 v[11:12], s[10:11], v3, v10, v[16:17] -; GFX7-NEXT: v_mad_u64_u32 v[19:20], s[8:9], v1, v10, v[21:22] -; GFX7-NEXT: v_addc_u32_e64 v10, s[8:9], 0, v28, s[8:9] -; GFX7-NEXT: v_mul_lo_u32 v28, v2, v13 -; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[8:9], v2, v9, v[19:20] -; GFX7-NEXT: v_mad_u64_u32 v[19:20], s[12:13], v4, v9, v[11:12] -; GFX7-NEXT: v_addc_u32_e64 v2, s[8:9], 0, v10, s[8:9] -; GFX7-NEXT: v_mad_u64_u32 v[21:22], s[8:9], v3, v8, v[16:17] -; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[16:17], v0, v8, 0 -; GFX7-NEXT: v_mul_lo_u32 v10, v1, v14 -; GFX7-NEXT: v_mad_u64_u32 v[13:14], s[14:15], v5, v8, v[19:20] -; GFX7-NEXT: v_addc_u32_e64 v5, s[8:9], 0, v2, s[8:9] -; GFX7-NEXT: v_mad_u64_u32 v[2:3], s[8:9], v0, v9, v[17:18] -; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, 1, s[8:9] -; GFX7-NEXT: v_mul_lo_u32 v0, v0, v15 +; GFX7-NEXT: v_cndmask_b32_e64 v24, 0, 1, s[8:9] +; GFX7-NEXT: v_mul_lo_u32 v26, v5, v10 +; GFX7-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v2, v11, v[16:17] +; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[8:9], v1, v10, v[21:22] +; GFX7-NEXT: v_mul_lo_u32 v13, v2, v13 +; GFX7-NEXT: v_mad_u64_u32 v[11:12], s[10:11], v3, v10, v[19:20] +; GFX7-NEXT: v_addc_u32_e64 v10, s[8:9], 0, v24, s[8:9] +; GFX7-NEXT: v_mad_u64_u32 v[19:20], s[8:9], v2, v9, v[16:17] +; GFX7-NEXT: v_mad_u64_u32 v[16:17], s[14:15], v0, v8, 0 +; GFX7-NEXT: v_mad_u64_u32 v[21:22], s[12:13], v4, v9, v[11:12] +; GFX7-NEXT: v_addc_u32_e64 v4, s[8:9], 0, v10, s[8:9] +; GFX7-NEXT: v_mad_u64_u32 v[24:25], s[8:9], v3, v8, v[19:20] +; GFX7-NEXT: v_mad_u64_u32 v[2:3], s[14:15], v0, v9, v[17:18] +; GFX7-NEXT: v_addc_u32_e64 v10, s[8:9], 0, v4, s[8:9] +; GFX7-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[14:15] ; GFX7-NEXT: v_mad_u64_u32 v[11:12], s[8:9], v1, v8, v[2:3] -; GFX7-NEXT: v_addc_u32_e64 v3, s[8:9], v4, v21, s[8:9] -; GFX7-NEXT: v_addc_u32_e64 v4, s[8:9], v6, v22, s[8:9] -; GFX7-NEXT: v_addc_u32_e64 v5, s[8:9], v5, v13, s[8:9] -; GFX7-NEXT: v_addc_u32_e64 v6, s[8:9], v24, v14, s[8:9] +; GFX7-NEXT: v_addc_u32_e64 v3, s[8:9], v9, v24, s[8:9] +; GFX7-NEXT: v_mul_lo_u32 v9, v1, v14 +; GFX7-NEXT: v_mad_u64_u32 v[1:2], s[14:15], v5, v8, v[21:22] +; GFX7-NEXT: v_mul_lo_u32 v0, v0, v15 +; GFX7-NEXT: v_addc_u32_e64 v4, s[8:9], v28, v25, s[8:9] +; GFX7-NEXT: v_addc_u32_e64 v5, s[8:9], v10, v1, s[8:9] +; GFX7-NEXT: v_addc_u32_e64 v6, s[8:9], v6, v2, s[8:9] ; GFX7-NEXT: v_addc_u32_e64 v0, s[8:9], v23, v0, s[8:9] -; GFX7-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v10, s[14:15] -; GFX7-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v28, s[12:13] -; GFX7-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v29, s[10:11] -; GFX7-NEXT: v_addc_u32_e32 v0, vcc, v0, v26, vcc -; GFX7-NEXT: v_addc_u32_e64 v0, vcc, v0, v27, s[6:7] -; GFX7-NEXT: v_addc_u32_e64 v0, vcc, v0, v25, s[4:5] +; GFX7-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v9, s[14:15] +; GFX7-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v13, s[12:13] +; GFX7-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v30, s[10:11] +; GFX7-NEXT: v_addc_u32_e64 v0, s[4:5], v0, v29, s[4:5] +; GFX7-NEXT: v_addc_u32_e64 v0, s[4:5], v0, v26, s[6:7] +; GFX7-NEXT: v_addc_u32_e32 v0, vcc, v0, v27, vcc ; GFX7-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v7, v8, v[0:1] ; GFX7-NEXT: v_mov_b32_e32 v0, v16 ; GFX7-NEXT: v_mov_b32_e32 v1, v11 @@ -3089,62 +3089,62 @@ define i256 @v_mul_i256(i256 %num, i256 %den) { ; GFX8: ; %bb.0: ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v14, 0 -; GFX8-NEXT: v_mul_lo_u32 v27, v5, v10 -; GFX8-NEXT: v_mul_lo_u32 v29, v3, v12 +; GFX8-NEXT: v_mul_lo_u32 v27, v6, v9 +; GFX8-NEXT: v_mul_lo_u32 v29, v4, v11 +; GFX8-NEXT: v_mul_lo_u32 v30, v3, v12 ; GFX8-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v1, v13, v[16:17] -; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v2, v12, v[18:19] -; GFX8-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v3, v11, v[16:17] -; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v10, 0 -; GFX8-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v4, v10, v[18:19] -; GFX8-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v1, v9, v[16:17] -; GFX8-NEXT: v_cndmask_b32_e64 v26, 0, 1, s[4:5] -; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[6:7], v5, v9, v[20:21] -; GFX8-NEXT: v_mad_u64_u32 v[18:19], vcc, v2, v8, v[22:23] -; GFX8-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v6, v8, v[16:17] ; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v12, 0 -; GFX8-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v1, v11, v[16:17] -; GFX8-NEXT: v_cndmask_b32_e64 v24, 0, 1, s[4:5] -; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v2, v10, v[20:21] -; GFX8-NEXT: v_addc_u32_e64 v20, s[4:5], 0, v24, s[4:5] -; GFX8-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v3, v9, v[16:17] -; GFX8-NEXT: v_addc_u32_e64 v16, s[4:5], 0, v20, s[4:5] -; GFX8-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v4, v8, v[24:25] -; GFX8-NEXT: v_addc_u32_e64 v24, s[4:5], 0, v16, s[4:5] -; GFX8-NEXT: v_mul_lo_u32 v25, v6, v9 -; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v13, v[21:22] +; GFX8-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v2, v12, v[18:19] +; GFX8-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v1, v11, v[16:17] +; GFX8-NEXT: v_cndmask_b32_e64 v22, 0, 1, s[4:5] +; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[6:7], v3, v11, v[20:21] +; GFX8-NEXT: v_mad_u64_u32 v[20:21], vcc, v2, v10, v[18:19] +; GFX8-NEXT: v_addc_u32_e32 v22, vcc, 0, v22, vcc +; GFX8-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v4, v10, v[16:17] +; GFX8-NEXT: v_mad_u64_u32 v[16:17], vcc, v3, v9, v[20:21] +; GFX8-NEXT: v_addc_u32_e32 v26, vcc, 0, v22, vcc +; GFX8-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v5, v9, v[18:19] +; GFX8-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v0, v10, 0 +; GFX8-NEXT: v_mad_u64_u32 v[20:21], vcc, v4, v8, v[16:17] +; GFX8-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v6, v8, v[24:25] +; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v1, v9, v[18:19] ; GFX8-NEXT: v_addc_u32_e32 v6, vcc, 0, v26, vcc -; GFX8-NEXT: v_mul_lo_u32 v26, v4, v11 -; GFX8-NEXT: v_mad_u64_u32 v[21:22], s[6:7], v1, v12, v[16:17] -; GFX8-NEXT: v_mad_u64_u32 v[16:17], vcc, v2, v11, v[21:22] +; GFX8-NEXT: v_mad_u64_u32 v[24:25], vcc, v0, v13, v[21:22] +; GFX8-NEXT: v_cndmask_b32_e64 v21, 0, 1, s[4:5] +; GFX8-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v2, v8, v[16:17] +; GFX8-NEXT: v_addc_u32_e64 v28, s[4:5], 0, v21, s[4:5] +; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[6:7], v1, v12, v[24:25] ; GFX8-NEXT: v_mad_u64_u32 v[21:22], s[8:9], v0, v11, v[19:20] -; GFX8-NEXT: v_cndmask_b32_e64 v28, 0, 1, s[8:9] -; GFX8-NEXT: v_mad_u64_u32 v[11:12], s[10:11], v3, v10, v[16:17] -; GFX8-NEXT: v_mad_u64_u32 v[19:20], s[8:9], v1, v10, v[21:22] -; GFX8-NEXT: v_addc_u32_e64 v10, s[8:9], 0, v28, s[8:9] -; GFX8-NEXT: v_mul_lo_u32 v28, v2, v13 -; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[8:9], v2, v9, v[19:20] -; GFX8-NEXT: v_mad_u64_u32 v[19:20], s[12:13], v4, v9, v[11:12] -; GFX8-NEXT: v_addc_u32_e64 v2, s[8:9], 0, v10, s[8:9] -; GFX8-NEXT: v_mad_u64_u32 v[21:22], s[8:9], v3, v8, v[16:17] -; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[16:17], v0, v8, 0 -; GFX8-NEXT: v_mul_lo_u32 v10, v1, v14 -; GFX8-NEXT: v_mad_u64_u32 v[13:14], s[14:15], v5, v8, v[19:20] -; GFX8-NEXT: v_addc_u32_e64 v5, s[8:9], 0, v2, s[8:9] -; GFX8-NEXT: v_mad_u64_u32 v[2:3], s[8:9], v0, v9, v[17:18] -; GFX8-NEXT: v_cndmask_b32_e64 v4, 0, 1, s[8:9] -; GFX8-NEXT: v_mul_lo_u32 v0, v0, v15 +; GFX8-NEXT: v_cndmask_b32_e64 v24, 0, 1, s[8:9] +; GFX8-NEXT: v_mul_lo_u32 v26, v5, v10 +; GFX8-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v2, v11, v[16:17] +; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[8:9], v1, v10, v[21:22] +; GFX8-NEXT: v_mul_lo_u32 v13, v2, v13 +; GFX8-NEXT: v_mad_u64_u32 v[11:12], s[10:11], v3, v10, v[19:20] +; GFX8-NEXT: v_addc_u32_e64 v10, s[8:9], 0, v24, s[8:9] +; GFX8-NEXT: v_mad_u64_u32 v[19:20], s[8:9], v2, v9, v[16:17] +; GFX8-NEXT: v_mad_u64_u32 v[16:17], s[14:15], v0, v8, 0 +; GFX8-NEXT: v_mad_u64_u32 v[21:22], s[12:13], v4, v9, v[11:12] +; GFX8-NEXT: v_addc_u32_e64 v4, s[8:9], 0, v10, s[8:9] +; GFX8-NEXT: v_mad_u64_u32 v[24:25], s[8:9], v3, v8, v[19:20] +; GFX8-NEXT: v_mad_u64_u32 v[2:3], s[14:15], v0, v9, v[17:18] +; GFX8-NEXT: v_addc_u32_e64 v10, s[8:9], 0, v4, s[8:9] +; GFX8-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[14:15] ; GFX8-NEXT: v_mad_u64_u32 v[11:12], s[8:9], v1, v8, v[2:3] -; GFX8-NEXT: v_addc_u32_e64 v3, s[8:9], v4, v21, s[8:9] -; GFX8-NEXT: v_addc_u32_e64 v4, s[8:9], v6, v22, s[8:9] -; GFX8-NEXT: v_addc_u32_e64 v5, s[8:9], v5, v13, s[8:9] -; GFX8-NEXT: v_addc_u32_e64 v6, s[8:9], v24, v14, s[8:9] +; GFX8-NEXT: v_addc_u32_e64 v3, s[8:9], v9, v24, s[8:9] +; GFX8-NEXT: v_mul_lo_u32 v9, v1, v14 +; GFX8-NEXT: v_mad_u64_u32 v[1:2], s[14:15], v5, v8, v[21:22] +; GFX8-NEXT: v_mul_lo_u32 v0, v0, v15 +; GFX8-NEXT: v_addc_u32_e64 v4, s[8:9], v28, v25, s[8:9] +; GFX8-NEXT: v_addc_u32_e64 v5, s[8:9], v10, v1, s[8:9] +; GFX8-NEXT: v_addc_u32_e64 v6, s[8:9], v6, v2, s[8:9] ; GFX8-NEXT: v_addc_u32_e64 v0, s[8:9], v23, v0, s[8:9] -; GFX8-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v10, s[14:15] -; GFX8-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v28, s[12:13] -; GFX8-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v29, s[10:11] -; GFX8-NEXT: v_addc_u32_e32 v0, vcc, v0, v26, vcc -; GFX8-NEXT: v_addc_u32_e64 v0, vcc, v0, v27, s[6:7] -; GFX8-NEXT: v_addc_u32_e64 v0, vcc, v0, v25, s[4:5] +; GFX8-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v9, s[14:15] +; GFX8-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v13, s[12:13] +; GFX8-NEXT: v_addc_u32_e64 v0, s[8:9], v0, v30, s[10:11] +; GFX8-NEXT: v_addc_u32_e64 v0, s[4:5], v0, v29, s[4:5] +; GFX8-NEXT: v_addc_u32_e64 v0, s[4:5], v0, v26, s[6:7] +; GFX8-NEXT: v_addc_u32_e32 v0, vcc, v0, v27, vcc ; GFX8-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v7, v8, v[0:1] ; GFX8-NEXT: v_mov_b32_e32 v0, v16 ; GFX8-NEXT: v_mov_b32_e32 v1, v11 @@ -3156,62 +3156,62 @@ define i256 @v_mul_i256(i256 %num, i256 %den) { ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v14, 0 -; GFX9-NEXT: v_mul_lo_u32 v27, v5, v10 -; GFX9-NEXT: v_mul_lo_u32 v29, v3, v12 +; GFX9-NEXT: v_mul_lo_u32 v27, v6, v9 +; GFX9-NEXT: v_mul_lo_u32 v29, v4, v11 +; GFX9-NEXT: v_mul_lo_u32 v30, v3, v12 ; GFX9-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v1, v13, v[16:17] -; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v2, v12, v[18:19] -; GFX9-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v3, v11, v[16:17] -; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v10, 0 -; GFX9-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v4, v10, v[18:19] -; GFX9-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v1, v9, v[16:17] -; GFX9-NEXT: v_cndmask_b32_e64 v26, 0, 1, s[4:5] -; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[6:7], v5, v9, v[20:21] -; GFX9-NEXT: v_mad_u64_u32 v[18:19], vcc, v2, v8, v[22:23] -; GFX9-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v6, v8, v[16:17] ; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v12, 0 -; GFX9-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v1, v11, v[16:17] -; GFX9-NEXT: v_cndmask_b32_e64 v24, 0, 1, s[4:5] -; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v2, v10, v[20:21] -; GFX9-NEXT: v_addc_co_u32_e64 v20, s[4:5], 0, v24, s[4:5] -; GFX9-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v3, v9, v[16:17] -; GFX9-NEXT: v_addc_co_u32_e64 v16, s[4:5], 0, v20, s[4:5] -; GFX9-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v4, v8, v[24:25] -; GFX9-NEXT: v_addc_co_u32_e64 v24, s[4:5], 0, v16, s[4:5] -; GFX9-NEXT: v_mul_lo_u32 v25, v6, v9 -; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v13, v[21:22] +; GFX9-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v2, v12, v[18:19] +; GFX9-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v1, v11, v[16:17] +; GFX9-NEXT: v_cndmask_b32_e64 v22, 0, 1, s[4:5] +; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[6:7], v3, v11, v[20:21] +; GFX9-NEXT: v_mad_u64_u32 v[20:21], vcc, v2, v10, v[18:19] +; GFX9-NEXT: v_addc_co_u32_e32 v22, vcc, 0, v22, vcc +; GFX9-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v4, v10, v[16:17] +; GFX9-NEXT: v_mad_u64_u32 v[16:17], vcc, v3, v9, v[20:21] +; GFX9-NEXT: v_addc_co_u32_e32 v26, vcc, 0, v22, vcc +; GFX9-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v5, v9, v[18:19] +; GFX9-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v0, v10, 0 +; GFX9-NEXT: v_mad_u64_u32 v[20:21], vcc, v4, v8, v[16:17] +; GFX9-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v6, v8, v[24:25] +; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v1, v9, v[18:19] ; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v26, vcc -; GFX9-NEXT: v_mul_lo_u32 v26, v4, v11 -; GFX9-NEXT: v_mad_u64_u32 v[21:22], s[6:7], v1, v12, v[16:17] -; GFX9-NEXT: v_mad_u64_u32 v[16:17], vcc, v2, v11, v[21:22] +; GFX9-NEXT: v_mad_u64_u32 v[24:25], vcc, v0, v13, v[21:22] +; GFX9-NEXT: v_cndmask_b32_e64 v21, 0, 1, s[4:5] +; GFX9-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v2, v8, v[16:17] +; GFX9-NEXT: v_addc_co_u32_e64 v28, s[4:5], 0, v21, s[4:5] +; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[6:7], v1, v12, v[24:25] ; GFX9-NEXT: v_mad_u64_u32 v[21:22], s[8:9], v0, v11, v[19:20] -; GFX9-NEXT: v_cndmask_b32_e64 v28, 0, 1, s[8:9] -; GFX9-NEXT: v_mad_u64_u32 v[11:12], s[10:11], v3, v10, v[16:17] -; GFX9-NEXT: v_mad_u64_u32 v[19:20], s[8:9], v1, v10, v[21:22] -; GFX9-NEXT: v_addc_co_u32_e64 v10, s[8:9], 0, v28, s[8:9] -; GFX9-NEXT: v_mul_lo_u32 v28, v2, v13 -; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[8:9], v2, v9, v[19:20] -; GFX9-NEXT: v_mad_u64_u32 v[19:20], s[12:13], v4, v9, v[11:12] -; GFX9-NEXT: v_addc_co_u32_e64 v2, s[8:9], 0, v10, s[8:9] -; GFX9-NEXT: v_mad_u64_u32 v[21:22], s[8:9], v3, v8, v[16:17] -; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[16:17], v0, v8, 0 -; GFX9-NEXT: v_mul_lo_u32 v10, v1, v14 -; GFX9-NEXT: v_mad_u64_u32 v[13:14], s[14:15], v5, v8, v[19:20] -; GFX9-NEXT: v_addc_co_u32_e64 v5, s[8:9], 0, v2, s[8:9] -; GFX9-NEXT: v_mad_u64_u32 v[2:3], s[8:9], v0, v9, v[17:18] -; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, 1, s[8:9] -; GFX9-NEXT: v_mul_lo_u32 v0, v0, v15 +; GFX9-NEXT: v_cndmask_b32_e64 v24, 0, 1, s[8:9] +; GFX9-NEXT: v_mul_lo_u32 v26, v5, v10 +; GFX9-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v2, v11, v[16:17] +; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[8:9], v1, v10, v[21:22] +; GFX9-NEXT: v_mul_lo_u32 v13, v2, v13 +; GFX9-NEXT: v_mad_u64_u32 v[11:12], s[10:11], v3, v10, v[19:20] +; GFX9-NEXT: v_addc_co_u32_e64 v10, s[8:9], 0, v24, s[8:9] +; GFX9-NEXT: v_mad_u64_u32 v[19:20], s[8:9], v2, v9, v[16:17] +; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[14:15], v0, v8, 0 +; GFX9-NEXT: v_mad_u64_u32 v[21:22], s[12:13], v4, v9, v[11:12] +; GFX9-NEXT: v_addc_co_u32_e64 v4, s[8:9], 0, v10, s[8:9] +; GFX9-NEXT: v_mad_u64_u32 v[24:25], s[8:9], v3, v8, v[19:20] +; GFX9-NEXT: v_mad_u64_u32 v[2:3], s[14:15], v0, v9, v[17:18] +; GFX9-NEXT: v_addc_co_u32_e64 v10, s[8:9], 0, v4, s[8:9] +; GFX9-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[14:15] ; GFX9-NEXT: v_mad_u64_u32 v[11:12], s[8:9], v1, v8, v[2:3] -; GFX9-NEXT: v_addc_co_u32_e64 v3, s[8:9], v4, v21, s[8:9] -; GFX9-NEXT: v_addc_co_u32_e64 v4, s[8:9], v6, v22, s[8:9] -; GFX9-NEXT: v_addc_co_u32_e64 v5, s[8:9], v5, v13, s[8:9] -; GFX9-NEXT: v_addc_co_u32_e64 v6, s[8:9], v24, v14, s[8:9] +; GFX9-NEXT: v_addc_co_u32_e64 v3, s[8:9], v9, v24, s[8:9] +; GFX9-NEXT: v_mul_lo_u32 v9, v1, v14 +; GFX9-NEXT: v_mad_u64_u32 v[1:2], s[14:15], v5, v8, v[21:22] +; GFX9-NEXT: v_mul_lo_u32 v0, v0, v15 +; GFX9-NEXT: v_addc_co_u32_e64 v4, s[8:9], v28, v25, s[8:9] +; GFX9-NEXT: v_addc_co_u32_e64 v5, s[8:9], v10, v1, s[8:9] +; GFX9-NEXT: v_addc_co_u32_e64 v6, s[8:9], v6, v2, s[8:9] ; GFX9-NEXT: v_addc_co_u32_e64 v0, s[8:9], v23, v0, s[8:9] -; GFX9-NEXT: v_addc_co_u32_e64 v0, s[8:9], v0, v10, s[14:15] -; GFX9-NEXT: v_addc_co_u32_e64 v0, s[8:9], v0, v28, s[12:13] -; GFX9-NEXT: v_addc_co_u32_e64 v0, s[8:9], v0, v29, s[10:11] -; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, v0, v26, vcc -; GFX9-NEXT: v_addc_co_u32_e64 v0, vcc, v0, v27, s[6:7] -; GFX9-NEXT: v_addc_co_u32_e64 v0, vcc, v0, v25, s[4:5] +; GFX9-NEXT: v_addc_co_u32_e64 v0, s[8:9], v0, v9, s[14:15] +; GFX9-NEXT: v_addc_co_u32_e64 v0, s[8:9], v0, v13, s[12:13] +; GFX9-NEXT: v_addc_co_u32_e64 v0, s[8:9], v0, v30, s[10:11] +; GFX9-NEXT: v_addc_co_u32_e64 v0, s[4:5], v0, v29, s[4:5] +; GFX9-NEXT: v_addc_co_u32_e64 v0, s[4:5], v0, v26, s[6:7] +; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, v0, v27, vcc ; GFX9-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v7, v8, v[0:1] ; GFX9-NEXT: v_mov_b32_e32 v0, v16 ; GFX9-NEXT: v_mov_b32_e32 v1, v11 diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll index 3aefbd95fe581..694eff97dd446 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll @@ -442,21 +442,21 @@ define <2 x i64> @v_sdiv_v2i64(<2 x i64> %num, <2 x i64> %den) { ; GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v17, v9, v[12:13] ; GISEL-NEXT: v_mul_hi_u32 v12, v5, v11 ; GISEL-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v18, v5, v[13:14] -; GISEL-NEXT: v_mul_lo_u32 v13, v5, v15 -; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 -; GISEL-NEXT: v_mul_lo_u32 v13, v9, v11 -; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc +; GISEL-NEXT: v_mul_lo_u32 v14, v9, v11 ; GISEL-NEXT: v_mul_hi_u32 v11, v9, v11 +; GISEL-NEXT: v_mul_lo_u32 v13, v5, v15 ; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 -; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc -; GISEL-NEXT: v_mul_hi_u32 v13, v5, v15 -; GISEL-NEXT: v_add_i32_e32 v12, vcc, v14, v12 -; GISEL-NEXT: v_mul_lo_u32 v14, v9, v15 -; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v13 ; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v14 +; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc +; GISEL-NEXT: v_mul_hi_u32 v14, v5, v15 +; GISEL-NEXT: v_add_i32_e32 v12, vcc, v13, v12 +; GISEL-NEXT: v_mul_lo_u32 v13, v9, v15 ; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v14 ; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v14 +; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v13 +; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v13, vcc, v14, v13 ; GISEL-NEXT: v_mul_hi_u32 v14, v9, v15 ; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 ; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc @@ -521,108 +521,108 @@ define <2 x i64> @v_sdiv_v2i64(<2 x i64> %num, <2 x i64> %den) { ; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v16, v0 ; GISEL-NEXT: v_ashrrev_i32_e32 v5, 31, v7 ; GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v4, v17, v[11:12] -; GISEL-NEXT: v_subb_u32_e64 v14, s[4:5], v15, v13, vcc +; GISEL-NEXT: v_subb_u32_e64 v11, s[4:5], v15, v13, vcc ; GISEL-NEXT: v_sub_i32_e64 v1, s[4:5], v15, v13 ; GISEL-NEXT: v_add_i32_e64 v6, s[4:5], v6, v5 -; GISEL-NEXT: v_addc_u32_e64 v11, s[4:5], v7, v5, s[4:5] +; GISEL-NEXT: v_addc_u32_e64 v12, s[4:5], v7, v5, s[4:5] ; GISEL-NEXT: v_xor_b32_e32 v7, v6, v5 -; GISEL-NEXT: v_xor_b32_e32 v6, v11, v5 -; GISEL-NEXT: v_cvt_f32_u32_e32 v11, v7 -; GISEL-NEXT: v_cvt_f32_u32_e32 v12, v6 +; GISEL-NEXT: v_xor_b32_e32 v6, v12, v5 +; GISEL-NEXT: v_cvt_f32_u32_e32 v12, v7 +; GISEL-NEXT: v_cvt_f32_u32_e32 v13, v6 ; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v4, vcc ; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v0, v10 -; GISEL-NEXT: v_mac_f32_e32 v11, 0x4f800000, v12 -; GISEL-NEXT: v_rcp_iflag_f32_e32 v11, v11 +; GISEL-NEXT: v_mac_f32_e32 v12, 0x4f800000, v13 +; GISEL-NEXT: v_rcp_iflag_f32_e32 v12, v12 ; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v10 -; GISEL-NEXT: v_subbrev_u32_e32 v15, vcc, 0, v1, vcc +; GISEL-NEXT: v_subbrev_u32_e32 v14, vcc, 0, v1, vcc ; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v0, v10 -; GISEL-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v11 +; GISEL-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v12 ; GISEL-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0 ; GISEL-NEXT: v_trunc_f32_e32 v1, v1 ; GISEL-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1 -; GISEL-NEXT: v_cvt_u32_f32_e32 v16, v0 -; GISEL-NEXT: v_sub_i32_e64 v20, s[6:7], 0, v7 -; GISEL-NEXT: v_cvt_u32_f32_e32 v19, v1 -; GISEL-NEXT: v_subb_u32_e64 v21, s[6:7], 0, v6, s[6:7] -; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v20, v16, 0 -; GISEL-NEXT: v_cmp_ge_u32_e64 s[8:9], v15, v4 -; GISEL-NEXT: v_mad_u64_u32 v[10:11], s[6:7], v20, v19, v[1:2] -; GISEL-NEXT: v_mul_hi_u32 v1, v16, v0 -; GISEL-NEXT: v_mad_u64_u32 v[12:13], s[6:7], v21, v16, v[10:11] -; GISEL-NEXT: v_mul_lo_u32 v10, v16, v12 -; GISEL-NEXT: v_add_i32_e64 v1, s[6:7], v1, v10 -; GISEL-NEXT: v_mul_lo_u32 v10, v19, v0 -; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[6:7] -; GISEL-NEXT: v_mul_hi_u32 v0, v19, v0 -; GISEL-NEXT: v_add_i32_e64 v1, s[6:7], v1, v10 -; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, s[8:9] +; GISEL-NEXT: v_cvt_u32_f32_e32 v15, v0 +; GISEL-NEXT: v_sub_i32_e64 v19, s[6:7], 0, v7 +; GISEL-NEXT: v_cvt_u32_f32_e32 v16, v1 +; GISEL-NEXT: v_subb_u32_e64 v20, s[6:7], 0, v6, s[6:7] +; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v19, v15, 0 +; GISEL-NEXT: v_cmp_ge_u32_e64 s[6:7], v11, v4 +; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[6:7] +; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] +; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v11, v4 +; GISEL-NEXT: v_mad_u64_u32 v[10:11], s[6:7], v19, v16, v[1:2] +; GISEL-NEXT: v_cndmask_b32_e64 v21, v12, v13, s[4:5] +; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v14, v4 +; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, s[4:5] +; GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v20, v15, v[10:11] ; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, vcc -; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v15, v4 -; GISEL-NEXT: v_cmp_ge_u32_e64 s[8:9], v14, v4 -; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[8:9] -; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, -1, s[4:5] -; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v14, v4 +; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v14, v4 +; GISEL-NEXT: v_mul_hi_u32 v4, v15, v0 +; GISEL-NEXT: v_mul_lo_u32 v11, v15, v12 ; GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc -; GISEL-NEXT: v_add_i32_e32 v10, vcc, 1, v17 -; GISEL-NEXT: v_cndmask_b32_e64 v4, v13, v15, s[4:5] -; GISEL-NEXT: v_addc_u32_e32 v13, vcc, 0, v18, vcc -; GISEL-NEXT: v_add_i32_e32 v14, vcc, 1, v10 -; GISEL-NEXT: v_addc_u32_e32 v15, vcc, 0, v13, vcc -; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 -; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[6:7] -; GISEL-NEXT: v_cndmask_b32_e32 v10, v10, v14, vcc -; GISEL-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc +; GISEL-NEXT: v_mul_lo_u32 v10, v16, v0 +; GISEL-NEXT: v_mul_hi_u32 v0, v16, v0 +; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v11 +; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v10 +; GISEL-NEXT: v_add_i32_e64 v4, s[4:5], 1, v17 +; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], 0, v18, s[4:5] +; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], 1, v4 +; GISEL-NEXT: v_addc_u32_e64 v14, s[4:5], 0, v10, s[4:5] +; GISEL-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v1 +; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v1, vcc, v11, v1 -; GISEL-NEXT: v_mul_hi_u32 v11, v16, v12 -; GISEL-NEXT: v_ashrrev_i32_e32 v15, 31, v3 +; GISEL-NEXT: v_mul_hi_u32 v11, v15, v12 +; GISEL-NEXT: v_cndmask_b32_e64 v4, v4, v13, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v14, s[4:5] +; GISEL-NEXT: v_xor_b32_e32 v14, v9, v8 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v11 -; GISEL-NEXT: v_mul_lo_u32 v11, v19, v12 -; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc -; GISEL-NEXT: v_mul_hi_u32 v12, v19, v12 +; GISEL-NEXT: v_mul_lo_u32 v11, v16, v12 +; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc +; GISEL-NEXT: v_mul_hi_u32 v12, v16, v12 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v11 ; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v11, vcc, v14, v11 +; GISEL-NEXT: v_add_i32_e32 v11, vcc, v13, v11 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v1 ; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v1, vcc, v11, v1 ; GISEL-NEXT: v_add_i32_e32 v1, vcc, v12, v1 -; GISEL-NEXT: v_add_i32_e32 v12, vcc, v16, v0 -; GISEL-NEXT: v_addc_u32_e32 v14, vcc, v19, v1, vcc -; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v20, v12, 0 -; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 -; GISEL-NEXT: v_cndmask_b32_e32 v4, v17, v10, vcc -; GISEL-NEXT: v_cndmask_b32_e32 v10, v18, v13, vcc -; GISEL-NEXT: v_xor_b32_e32 v13, v9, v8 -; GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v20, v14, v[1:2] -; GISEL-NEXT: v_xor_b32_e32 v1, v4, v13 -; GISEL-NEXT: v_xor_b32_e32 v4, v10, v13 +; GISEL-NEXT: v_add_i32_e32 v12, vcc, v15, v0 +; GISEL-NEXT: v_addc_u32_e32 v13, vcc, v16, v1, vcc +; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v19, v12, 0 +; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v21 +; GISEL-NEXT: v_cndmask_b32_e32 v4, v17, v4, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v10, v18, v10, vcc +; GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v19, v13, v[1:2] +; GISEL-NEXT: v_xor_b32_e32 v1, v4, v14 +; GISEL-NEXT: v_xor_b32_e32 v4, v10, v14 +; GISEL-NEXT: v_ashrrev_i32_e32 v15, 31, v3 +; GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v20, v12, v[8:9] ; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v15 -; GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v21, v12, v[8:9] ; GISEL-NEXT: v_mul_hi_u32 v8, v12, v0 -; GISEL-NEXT: v_xor_b32_e32 v11, v2, v15 -; GISEL-NEXT: v_mul_lo_u32 v2, v14, v0 ; GISEL-NEXT: v_mul_lo_u32 v9, v12, v10 +; GISEL-NEXT: v_xor_b32_e32 v11, v2, v15 +; GISEL-NEXT: v_mul_lo_u32 v2, v13, v0 ; GISEL-NEXT: v_addc_u32_e32 v3, vcc, v3, v15, vcc -; GISEL-NEXT: v_mul_hi_u32 v0, v14, v0 ; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v9 ; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v2, vcc, v8, v2 ; GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc +; GISEL-NEXT: v_mul_hi_u32 v0, v13, v0 ; GISEL-NEXT: v_mul_hi_u32 v8, v12, v10 ; GISEL-NEXT: v_add_i32_e32 v2, vcc, v9, v2 -; GISEL-NEXT: v_mul_lo_u32 v9, v14, v10 +; GISEL-NEXT: v_mul_lo_u32 v9, v13, v10 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v8 ; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v9 ; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v9 -; GISEL-NEXT: v_mul_hi_u32 v9, v14, v10 +; GISEL-NEXT: v_mul_hi_u32 v9, v13, v10 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v2 ; GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v2, vcc, v8, v2 ; GISEL-NEXT: v_add_i32_e32 v2, vcc, v9, v2 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v12, v0 -; GISEL-NEXT: v_addc_u32_e32 v2, vcc, v14, v2, vcc +; GISEL-NEXT: v_addc_u32_e32 v2, vcc, v13, v2, vcc ; GISEL-NEXT: v_mul_hi_u32 v8, v11, v0 ; GISEL-NEXT: v_mul_lo_u32 v9, v11, v2 ; GISEL-NEXT: v_xor_b32_e32 v10, v3, v15 @@ -645,10 +645,10 @@ define <2 x i64> @v_sdiv_v2i64(<2 x i64> %num, <2 x i64> %den) { ; GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v7, v12, 0 ; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v8, v0 -; GISEL-NEXT: v_add_i32_e32 v14, vcc, v9, v0 -; GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v7, v14, v[3:4] -; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v1, v13 -; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v4, v13, vcc +; GISEL-NEXT: v_add_i32_e32 v13, vcc, v9, v0 +; GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v7, v13, v[3:4] +; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v1, v14 +; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v4, v14, vcc ; GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v6, v12, v[8:9] ; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v11, v2 ; GISEL-NEXT: v_subb_u32_e64 v4, s[4:5], v10, v3, vcc @@ -663,7 +663,7 @@ define <2 x i64> @v_sdiv_v2i64(<2 x i64> %num, <2 x i64> %den) { ; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc ; GISEL-NEXT: v_cndmask_b32_e64 v4, v8, v9, s[4:5] ; GISEL-NEXT: v_add_i32_e32 v8, vcc, 1, v12 -; GISEL-NEXT: v_addc_u32_e32 v9, vcc, 0, v14, vcc +; GISEL-NEXT: v_addc_u32_e32 v9, vcc, 0, v13, vcc ; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v3, v6 ; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, vcc ; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v2, v7 @@ -678,7 +678,7 @@ define <2 x i64> @v_sdiv_v2i64(<2 x i64> %num, <2 x i64> %den) { ; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 ; GISEL-NEXT: v_cndmask_b32_e32 v2, v12, v2, vcc ; GISEL-NEXT: v_xor_b32_e32 v4, v15, v5 -; GISEL-NEXT: v_cndmask_b32_e32 v3, v14, v3, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v3, v13, v3, vcc ; GISEL-NEXT: v_xor_b32_e32 v2, v2, v4 ; GISEL-NEXT: v_xor_b32_e32 v3, v3, v4 ; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v4 @@ -1957,74 +1957,74 @@ define <2 x i64> @v_sdiv_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) { ; GISEL-NEXT: v_xor_b32_e32 v5, v7, v4 ; GISEL-NEXT: v_cvt_f32_u32_e32 v7, v8 ; GISEL-NEXT: v_cvt_f32_u32_e32 v9, v5 -; GISEL-NEXT: v_sub_i32_e32 v15, vcc, 0, v8 -; GISEL-NEXT: v_subb_u32_e32 v17, vcc, 0, v5, vcc +; GISEL-NEXT: v_sub_i32_e32 v18, vcc, 0, v8 +; GISEL-NEXT: v_subb_u32_e32 v19, vcc, 0, v5, vcc ; GISEL-NEXT: v_mac_f32_e32 v7, 0x4f800000, v9 ; GISEL-NEXT: v_rcp_iflag_f32_e32 v7, v7 ; GISEL-NEXT: v_mul_f32_e32 v7, 0x5f7ffffc, v7 ; GISEL-NEXT: v_mul_f32_e32 v9, 0x2f800000, v7 -; GISEL-NEXT: v_trunc_f32_e32 v13, v9 -; GISEL-NEXT: v_mac_f32_e32 v7, 0xcf800000, v13 +; GISEL-NEXT: v_trunc_f32_e32 v9, v9 +; GISEL-NEXT: v_mac_f32_e32 v7, 0xcf800000, v9 ; GISEL-NEXT: v_cvt_u32_f32_e32 v7, v7 -; GISEL-NEXT: v_cvt_u32_f32_e32 v16, v13 -; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v15, v7, 0 -; GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v15, v16, v[10:11] -; GISEL-NEXT: v_mul_hi_u32 v18, v7, v9 -; GISEL-NEXT: v_mul_lo_u32 v19, v16, v9 -; GISEL-NEXT: v_mul_hi_u32 v20, v16, v9 -; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v17, v7, v[13:14] -; GISEL-NEXT: v_mul_lo_u32 v10, v7, v9 -; GISEL-NEXT: v_mul_hi_u32 v14, v7, v9 -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v18, v10 -; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v19 +; GISEL-NEXT: v_cvt_u32_f32_e32 v17, v9 +; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v18, v7, 0 +; GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v18, v17, v[10:11] +; GISEL-NEXT: v_mul_hi_u32 v10, v7, v9 +; GISEL-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v19, v7, v[13:14] +; GISEL-NEXT: v_mul_lo_u32 v13, v7, v15 +; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v13 +; GISEL-NEXT: v_mul_lo_u32 v13, v17, v9 +; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc +; GISEL-NEXT: v_mul_hi_u32 v9, v17, v9 +; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v13 +; GISEL-NEXT: v_mul_hi_u32 v13, v7, v15 ; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v13, v10 -; GISEL-NEXT: v_mul_lo_u32 v13, v16, v9 -; GISEL-NEXT: v_add_i32_e32 v14, vcc, v20, v14 -; GISEL-NEXT: v_cndmask_b32_e64 v18, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v13, vcc, v14, v13 +; GISEL-NEXT: v_add_i32_e32 v10, vcc, v14, v10 +; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v13 +; GISEL-NEXT: v_mul_lo_u32 v13, v17, v15 ; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v14, vcc, v18, v14 -; GISEL-NEXT: v_mul_hi_u32 v9, v16, v9 -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v13, v10 +; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v13 ; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v13, vcc, v14, v13 -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v13 -; GISEL-NEXT: v_add_i32_e32 v18, vcc, v7, v10 -; GISEL-NEXT: v_addc_u32_e32 v19, vcc, v16, v9, vcc -; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v15, v18, 0 -; GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v15, v19, v[10:11] -; GISEL-NEXT: v_mul_hi_u32 v7, v18, v9 -; GISEL-NEXT: v_lshl_b64 v[11:12], v[11:12], v6 -; GISEL-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v17, v18, v[13:14] -; GISEL-NEXT: v_mul_lo_u32 v13, v19, v9 -; GISEL-NEXT: v_mul_hi_u32 v9, v19, v9 -; GISEL-NEXT: v_ashrrev_i32_e32 v6, 31, v12 -; GISEL-NEXT: v_mul_lo_u32 v10, v18, v15 -; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 +; GISEL-NEXT: v_mul_hi_u32 v14, v17, v15 +; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 ; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v13 +; GISEL-NEXT: v_add_i32_e32 v10, vcc, v13, v10 +; GISEL-NEXT: v_add_i32_e32 v10, vcc, v14, v10 +; GISEL-NEXT: v_add_i32_e32 v20, vcc, v7, v9 +; GISEL-NEXT: v_addc_u32_e32 v17, vcc, v17, v10, vcc +; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v18, v20, 0 ; GISEL-NEXT: v_ashrrev_i32_e32 v7, 31, v1 -; GISEL-NEXT: v_add_i32_e64 v0, s[4:5], v0, v7 +; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v7 +; GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v18, v17, v[10:11] +; GISEL-NEXT: v_mul_hi_u32 v10, v20, v9 +; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v7, vcc +; GISEL-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v19, v20, v[13:14] ; GISEL-NEXT: v_xor_b32_e32 v16, v0, v7 -; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc -; GISEL-NEXT: v_mul_hi_u32 v13, v18, v15 -; GISEL-NEXT: v_add_i32_e32 v0, vcc, v10, v0 -; GISEL-NEXT: v_mul_lo_u32 v10, v19, v15 -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v13 +; GISEL-NEXT: v_mul_lo_u32 v0, v17, v9 +; GISEL-NEXT: v_mul_hi_u32 v9, v17, v9 +; GISEL-NEXT: v_mul_lo_u32 v13, v20, v15 +; GISEL-NEXT: v_lshl_b64 v[11:12], v[11:12], v6 +; GISEL-NEXT: v_ashrrev_i32_e32 v6, 31, v12 +; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v13 ; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v0, vcc, v10, v0 +; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; GISEL-NEXT: v_mul_hi_u32 v10, v20, v15 +; GISEL-NEXT: v_add_i32_e32 v0, vcc, v13, v0 +; GISEL-NEXT: v_mul_lo_u32 v13, v17, v15 ; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 ; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v13, v10 -; GISEL-NEXT: v_mul_hi_u32 v13, v19, v15 +; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v13 +; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v13 +; GISEL-NEXT: v_mul_hi_u32 v13, v17, v15 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v9, v0 ; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 ; GISEL-NEXT: v_add_i32_e32 v9, vcc, v13, v9 -; GISEL-NEXT: v_add_i32_e32 v0, vcc, v18, v0 -; GISEL-NEXT: v_addc_u32_e64 v1, s[4:5], v1, v7, s[4:5] -; GISEL-NEXT: v_addc_u32_e32 v9, vcc, v19, v9, vcc +; GISEL-NEXT: v_add_i32_e32 v0, vcc, v20, v0 +; GISEL-NEXT: v_addc_u32_e32 v9, vcc, v17, v9, vcc ; GISEL-NEXT: v_mul_hi_u32 v10, v16, v0 ; GISEL-NEXT: v_mul_lo_u32 v13, v16, v9 ; GISEL-NEXT: v_xor_b32_e32 v15, v1, v7 @@ -2107,14 +2107,15 @@ define <2 x i64> @v_sdiv_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) { ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v12 ; GISEL-NEXT: v_mul_lo_u32 v12, v19, v13 ; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc -; GISEL-NEXT: v_mul_hi_u32 v13, v19, v13 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v12 ; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v12, vcc, v15, v12 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v1 ; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v1, vcc, v12, v1 -; GISEL-NEXT: v_add_i32_e32 v1, vcc, v13, v1 +; GISEL-NEXT: v_mul_hi_u32 v12, v19, v13 +; GISEL-NEXT: v_ashrrev_i32_e32 v15, 31, v3 +; GISEL-NEXT: v_add_i32_e32 v1, vcc, v12, v1 ; GISEL-NEXT: v_add_i32_e32 v12, vcc, v8, v0 ; GISEL-NEXT: v_addc_u32_e32 v13, vcc, v19, v1, vcc ; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v20, v12, 0 @@ -2124,7 +2125,6 @@ define <2 x i64> @v_sdiv_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) { ; GISEL-NEXT: v_xor_b32_e32 v14, v7, v4 ; GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v20, v13, v[1:2] ; GISEL-NEXT: v_xor_b32_e32 v1, v8, v14 -; GISEL-NEXT: v_ashrrev_i32_e32 v15, 31, v3 ; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v15 ; GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v21, v12, v[4:5] ; GISEL-NEXT: v_mul_hi_u32 v4, v12, v0 @@ -2258,21 +2258,21 @@ define <2 x i64> @v_sdiv_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) { ; CGP-NEXT: v_mul_hi_u32 v10, v16, v10 ; CGP-NEXT: v_mul_lo_u32 v13, v17, v14 ; CGP-NEXT: v_mul_hi_u32 v15, v17, v14 -; CGP-NEXT: v_mul_lo_u32 v20, v16, v14 ; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v13 ; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc ; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 -; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc -; CGP-NEXT: v_add_i32_e32 v11, vcc, v13, v11 -; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v15 +; CGP-NEXT: v_mul_lo_u32 v11, v16, v14 ; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc -; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v20 +; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 +; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v15 ; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc -; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v13 -; CGP-NEXT: v_mul_hi_u32 v13, v16, v14 ; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11 ; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc -; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 +; CGP-NEXT: v_add_i32_e32 v11, vcc, v13, v11 +; CGP-NEXT: v_mul_hi_u32 v13, v16, v14 +; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v12 +; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc +; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 ; CGP-NEXT: v_add_i32_e32 v11, vcc, v13, v11 ; CGP-NEXT: v_add_i32_e32 v17, vcc, v17, v10 ; CGP-NEXT: v_addc_u32_e32 v16, vcc, v16, v11, vcc diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll index a7bb61abeb3d3..d3a8739598aa3 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll @@ -513,107 +513,107 @@ define <2 x i64> @v_srem_v2i64(<2 x i64> %num, <2 x i64> %den) { ; GISEL-NEXT: v_add_i32_e32 v11, vcc, v9, v10 ; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v5, v11, v[1:2] ; GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v8, v15, v[9:10] -; GISEL-NEXT: v_sub_i32_e32 v10, vcc, v14, v0 -; GISEL-NEXT: v_subb_u32_e64 v12, s[4:5], v13, v11, vcc +; GISEL-NEXT: v_sub_i32_e32 v12, vcc, v14, v0 +; GISEL-NEXT: v_subb_u32_e64 v14, s[4:5], v13, v11, vcc ; GISEL-NEXT: v_sub_i32_e64 v0, s[4:5], v13, v11 -; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v8 +; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v14, v8 ; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, s[4:5] -; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v5 -; GISEL-NEXT: v_subb_u32_e32 v0, vcc, v0, v8, vcc +; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v5 ; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] -; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v12, v8 -; GISEL-NEXT: v_sub_i32_e32 v13, vcc, v10, v5 -; GISEL-NEXT: v_cndmask_b32_e64 v11, v1, v9, s[4:5] -; GISEL-NEXT: v_subbrev_u32_e64 v14, s[4:5], 0, v0, vcc -; GISEL-NEXT: v_ashrrev_i32_e32 v1, 31, v7 -; GISEL-NEXT: v_add_i32_e64 v6, s[4:5], v6, v1 -; GISEL-NEXT: v_addc_u32_e64 v7, s[4:5], v7, v1, s[4:5] -; GISEL-NEXT: v_xor_b32_e32 v6, v6, v1 -; GISEL-NEXT: v_xor_b32_e32 v7, v7, v1 -; GISEL-NEXT: v_cvt_f32_u32_e32 v1, v6 -; GISEL-NEXT: v_cvt_f32_u32_e32 v9, v7 -; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v14, v8 -; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, -1, s[4:5] -; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v13, v5 -; GISEL-NEXT: v_mac_f32_e32 v1, 0x4f800000, v9 -; GISEL-NEXT: v_rcp_iflag_f32_e32 v1, v1 -; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, -1, s[4:5] ; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v14, v8 -; GISEL-NEXT: v_cndmask_b32_e64 v15, v15, v16, s[4:5] -; GISEL-NEXT: v_subb_u32_e32 v16, vcc, v0, v8, vcc -; GISEL-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v1 +; GISEL-NEXT: v_cndmask_b32_e64 v13, v1, v9, s[4:5] +; GISEL-NEXT: v_subb_u32_e32 v9, vcc, v0, v8, vcc +; GISEL-NEXT: v_ashrrev_i32_e32 v0, 31, v7 +; GISEL-NEXT: v_add_i32_e32 v1, vcc, v6, v0 +; GISEL-NEXT: v_addc_u32_e32 v7, vcc, v7, v0, vcc +; GISEL-NEXT: v_xor_b32_e32 v6, v1, v0 +; GISEL-NEXT: v_xor_b32_e32 v7, v7, v0 +; GISEL-NEXT: v_cvt_f32_u32_e32 v0, v6 +; GISEL-NEXT: v_cvt_f32_u32_e32 v1, v7 +; GISEL-NEXT: v_sub_i32_e32 v15, vcc, v12, v5 +; GISEL-NEXT: v_subbrev_u32_e64 v16, s[4:5], 0, v9, vcc +; GISEL-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1 +; GISEL-NEXT: v_rcp_iflag_f32_e32 v0, v0 +; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v16, v8 +; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] +; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v15, v5 +; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, s[4:5] +; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v16, v8 +; GISEL-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0 +; GISEL-NEXT: v_cndmask_b32_e64 v17, v10, v1, s[4:5] ; GISEL-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0 -; GISEL-NEXT: v_trunc_f32_e32 v8, v1 -; GISEL-NEXT: v_mac_f32_e32 v0, 0xcf800000, v8 -; GISEL-NEXT: v_cvt_u32_f32_e32 v17, v0 -; GISEL-NEXT: v_sub_i32_e32 v18, vcc, 0, v6 -; GISEL-NEXT: v_cvt_u32_f32_e32 v20, v8 -; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v18, v17, 0 -; GISEL-NEXT: v_subb_u32_e32 v19, vcc, 0, v7, vcc -; GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v18, v20, v[1:2] -; GISEL-NEXT: v_mul_hi_u32 v21, v17, v0 -; GISEL-NEXT: v_mul_lo_u32 v22, v20, v0 -; GISEL-NEXT: v_mul_hi_u32 v23, v20, v0 -; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v13, v5 -; GISEL-NEXT: v_subbrev_u32_e32 v5, vcc, 0, v16, vcc -; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v15 -; GISEL-NEXT: v_cndmask_b32_e32 v13, v13, v0, vcc -; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v19, v17, v[8:9] -; GISEL-NEXT: v_cndmask_b32_e32 v5, v14, v5, vcc -; GISEL-NEXT: v_mul_lo_u32 v1, v17, v0 -; GISEL-NEXT: v_mul_hi_u32 v9, v17, v0 -; GISEL-NEXT: v_add_i32_e32 v1, vcc, v21, v1 -; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v1, vcc, v1, v22 +; GISEL-NEXT: v_trunc_f32_e32 v1, v1 +; GISEL-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1 +; GISEL-NEXT: v_cvt_u32_f32_e32 v18, v0 +; GISEL-NEXT: v_sub_i32_e64 v20, s[4:5], 0, v6 +; GISEL-NEXT: v_cvt_u32_f32_e32 v19, v1 +; GISEL-NEXT: v_subb_u32_e64 v21, s[4:5], 0, v7, s[4:5] +; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v20, v18, 0 +; GISEL-NEXT: v_subb_u32_e32 v10, vcc, v9, v8, vcc +; GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v20, v19, v[1:2] +; GISEL-NEXT: v_sub_i32_e32 v1, vcc, v15, v5 +; GISEL-NEXT: v_subbrev_u32_e32 v5, vcc, 0, v10, vcc +; GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v21, v18, v[8:9] +; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 +; GISEL-NEXT: v_cndmask_b32_e32 v8, v15, v1, vcc +; GISEL-NEXT: v_mul_hi_u32 v1, v18, v0 +; GISEL-NEXT: v_mul_lo_u32 v9, v18, v10 +; GISEL-NEXT: v_mul_lo_u32 v11, v19, v0 +; GISEL-NEXT: v_cndmask_b32_e32 v5, v16, v5, vcc +; GISEL-NEXT: v_mul_hi_u32 v0, v19, v0 +; GISEL-NEXT: v_add_i32_e32 v1, vcc, v1, v9 +; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v1, vcc, v1, v11 ; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v1, vcc, v8, v1 -; GISEL-NEXT: v_mul_lo_u32 v8, v20, v0 -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v23, v9 -; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 +; GISEL-NEXT: v_mul_hi_u32 v11, v18, v10 +; GISEL-NEXT: v_add_i32_e32 v1, vcc, v9, v1 +; GISEL-NEXT: v_mul_lo_u32 v9, v19, v10 +; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v11 +; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v9 ; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v14, v9 -; GISEL-NEXT: v_mul_hi_u32 v0, v20, v0 -; GISEL-NEXT: v_add_i32_e32 v1, vcc, v8, v1 -; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 -; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v8 -; GISEL-NEXT: v_add_i32_e32 v14, vcc, v17, v1 -; GISEL-NEXT: v_addc_u32_e32 v15, vcc, v20, v0, vcc -; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v18, v14, 0 -; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11 -; GISEL-NEXT: v_cndmask_b32_e32 v10, v10, v13, vcc -; GISEL-NEXT: v_cndmask_b32_e32 v5, v12, v5, vcc -; GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v18, v15, v[1:2] -; GISEL-NEXT: v_xor_b32_e32 v1, v10, v4 +; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 +; GISEL-NEXT: v_mul_hi_u32 v10, v19, v10 +; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v1 +; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v1, vcc, v9, v1 +; GISEL-NEXT: v_add_i32_e32 v1, vcc, v10, v1 +; GISEL-NEXT: v_add_i32_e32 v15, vcc, v18, v0 +; GISEL-NEXT: v_addc_u32_e32 v16, vcc, v19, v1, vcc +; GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v20, v15, 0 +; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 +; GISEL-NEXT: v_cndmask_b32_e32 v10, v12, v8, vcc ; GISEL-NEXT: v_ashrrev_i32_e32 v12, 31, v3 +; GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v20, v16, v[1:2] +; GISEL-NEXT: v_xor_b32_e32 v1, v10, v4 +; GISEL-NEXT: v_cndmask_b32_e32 v5, v14, v5, vcc ; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v12 -; GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v19, v14, v[8:9] -; GISEL-NEXT: v_mul_hi_u32 v8, v14, v0 +; GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v21, v15, v[8:9] +; GISEL-NEXT: v_mul_hi_u32 v8, v15, v0 ; GISEL-NEXT: v_xor_b32_e32 v11, v2, v12 -; GISEL-NEXT: v_mul_lo_u32 v2, v15, v0 -; GISEL-NEXT: v_mul_lo_u32 v9, v14, v10 +; GISEL-NEXT: v_mul_lo_u32 v2, v16, v0 +; GISEL-NEXT: v_mul_lo_u32 v9, v15, v10 ; GISEL-NEXT: v_addc_u32_e32 v3, vcc, v3, v12, vcc -; GISEL-NEXT: v_mul_hi_u32 v0, v15, v0 +; GISEL-NEXT: v_mul_hi_u32 v0, v16, v0 ; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v9 ; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v2, vcc, v8, v2 ; GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc -; GISEL-NEXT: v_mul_hi_u32 v8, v14, v10 +; GISEL-NEXT: v_mul_hi_u32 v8, v15, v10 ; GISEL-NEXT: v_add_i32_e32 v2, vcc, v9, v2 -; GISEL-NEXT: v_mul_lo_u32 v9, v15, v10 +; GISEL-NEXT: v_mul_lo_u32 v9, v16, v10 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v8 ; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v9 ; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v9 -; GISEL-NEXT: v_mul_hi_u32 v9, v15, v10 +; GISEL-NEXT: v_mul_hi_u32 v9, v16, v10 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v2 ; GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GISEL-NEXT: v_add_i32_e32 v2, vcc, v8, v2 ; GISEL-NEXT: v_add_i32_e32 v2, vcc, v9, v2 -; GISEL-NEXT: v_add_i32_e32 v0, vcc, v14, v0 -; GISEL-NEXT: v_addc_u32_e32 v2, vcc, v15, v2, vcc +; GISEL-NEXT: v_add_i32_e32 v0, vcc, v15, v0 +; GISEL-NEXT: v_addc_u32_e32 v2, vcc, v16, v2, vcc ; GISEL-NEXT: v_mul_hi_u32 v8, v11, v0 ; GISEL-NEXT: v_mul_lo_u32 v9, v11, v2 ; GISEL-NEXT: v_xor_b32_e32 v10, v3, v12 @@ -1926,114 +1926,114 @@ define <2 x i64> @v_srem_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) { ; GISEL-NEXT: v_lshl_b64 v[4:5], v[7:8], v6 ; GISEL-NEXT: v_ashrrev_i32_e32 v6, 31, v1 ; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v6 -; GISEL-NEXT: v_ashrrev_i32_e32 v11, 31, v10 +; GISEL-NEXT: v_ashrrev_i32_e32 v7, 31, v10 ; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v6, vcc -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 -; GISEL-NEXT: v_addc_u32_e32 v10, vcc, v10, v11, vcc -; GISEL-NEXT: v_xor_b32_e32 v8, v0, v6 -; GISEL-NEXT: v_xor_b32_e32 v7, v1, v6 -; GISEL-NEXT: v_xor_b32_e32 v0, v9, v11 -; GISEL-NEXT: v_xor_b32_e32 v1, v10, v11 -; GISEL-NEXT: v_cvt_f32_u32_e32 v9, v0 -; GISEL-NEXT: v_cvt_f32_u32_e32 v10, v1 +; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v7 +; GISEL-NEXT: v_addc_u32_e32 v9, vcc, v10, v7, vcc +; GISEL-NEXT: v_xor_b32_e32 v13, v0, v6 +; GISEL-NEXT: v_xor_b32_e32 v14, v1, v6 +; GISEL-NEXT: v_xor_b32_e32 v0, v8, v7 +; GISEL-NEXT: v_xor_b32_e32 v1, v9, v7 +; GISEL-NEXT: v_cvt_f32_u32_e32 v7, v0 +; GISEL-NEXT: v_cvt_f32_u32_e32 v8, v1 ; GISEL-NEXT: v_sub_i32_e32 v17, vcc, 0, v0 ; GISEL-NEXT: v_subb_u32_e32 v18, vcc, 0, v1, vcc -; GISEL-NEXT: v_mac_f32_e32 v9, 0x4f800000, v10 -; GISEL-NEXT: v_rcp_iflag_f32_e32 v9, v9 -; GISEL-NEXT: v_mul_f32_e32 v9, 0x5f7ffffc, v9 -; GISEL-NEXT: v_mul_f32_e32 v10, 0x2f800000, v9 -; GISEL-NEXT: v_trunc_f32_e32 v10, v10 -; GISEL-NEXT: v_mac_f32_e32 v9, 0xcf800000, v10 -; GISEL-NEXT: v_cvt_u32_f32_e32 v15, v9 -; GISEL-NEXT: v_cvt_u32_f32_e32 v16, v10 -; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v17, v15, 0 -; GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v17, v16, v[10:11] -; GISEL-NEXT: v_mul_hi_u32 v10, v15, v9 -; GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v18, v15, v[11:12] -; GISEL-NEXT: v_mul_lo_u32 v12, v16, v9 -; GISEL-NEXT: v_mul_hi_u32 v9, v16, v9 -; GISEL-NEXT: v_mul_lo_u32 v11, v15, v13 -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 -; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v12 +; GISEL-NEXT: v_mac_f32_e32 v7, 0x4f800000, v8 +; GISEL-NEXT: v_rcp_iflag_f32_e32 v7, v7 +; GISEL-NEXT: v_mul_f32_e32 v7, 0x5f7ffffc, v7 +; GISEL-NEXT: v_mul_f32_e32 v8, 0x2f800000, v7 +; GISEL-NEXT: v_trunc_f32_e32 v8, v8 +; GISEL-NEXT: v_mac_f32_e32 v7, 0xcf800000, v8 +; GISEL-NEXT: v_cvt_u32_f32_e32 v15, v7 +; GISEL-NEXT: v_cvt_u32_f32_e32 v16, v8 +; GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v17, v15, 0 +; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v17, v16, v[8:9] +; GISEL-NEXT: v_mul_hi_u32 v8, v15, v7 +; GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v18, v15, v[9:10] +; GISEL-NEXT: v_mul_lo_u32 v10, v16, v7 +; GISEL-NEXT: v_mul_hi_u32 v7, v16, v7 +; GISEL-NEXT: v_mul_lo_u32 v9, v15, v11 +; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v9 +; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 +; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 +; GISEL-NEXT: v_mul_hi_u32 v9, v15, v11 +; GISEL-NEXT: v_mul_lo_u32 v10, v16, v11 +; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 +; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 ; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 -; GISEL-NEXT: v_mul_hi_u32 v11, v15, v13 -; GISEL-NEXT: v_mul_lo_u32 v12, v16, v13 -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 -; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v12 -; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 ; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 +; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 +; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 +; GISEL-NEXT: v_mul_hi_u32 v9, v16, v11 +; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 +; GISEL-NEXT: v_add_i32_e32 v15, vcc, v15, v7 +; GISEL-NEXT: v_addc_u32_e32 v16, vcc, v16, v8, vcc +; GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v17, v15, 0 +; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v17, v16, v[8:9] +; GISEL-NEXT: v_mul_hi_u32 v8, v15, v7 +; GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v18, v15, v[9:10] +; GISEL-NEXT: v_mul_lo_u32 v10, v16, v7 +; GISEL-NEXT: v_mul_hi_u32 v7, v16, v7 +; GISEL-NEXT: v_mul_lo_u32 v9, v15, v11 +; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v9 +; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 +; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 +; GISEL-NEXT: v_mul_hi_u32 v9, v15, v11 +; GISEL-NEXT: v_mul_lo_u32 v10, v16, v11 +; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 +; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 ; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 -; GISEL-NEXT: v_mul_hi_u32 v11, v16, v13 -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 -; GISEL-NEXT: v_add_i32_e32 v15, vcc, v15, v9 -; GISEL-NEXT: v_addc_u32_e32 v16, vcc, v16, v10, vcc -; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v17, v15, 0 -; GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v17, v16, v[10:11] -; GISEL-NEXT: v_mul_hi_u32 v10, v15, v9 -; GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v18, v15, v[11:12] -; GISEL-NEXT: v_mul_lo_u32 v12, v16, v9 -; GISEL-NEXT: v_mul_hi_u32 v9, v16, v9 -; GISEL-NEXT: v_mul_lo_u32 v11, v15, v13 -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 -; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v12 +; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 +; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 +; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 +; GISEL-NEXT: v_mul_hi_u32 v9, v16, v11 +; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 +; GISEL-NEXT: v_add_i32_e32 v7, vcc, v15, v7 +; GISEL-NEXT: v_addc_u32_e32 v8, vcc, v16, v8, vcc +; GISEL-NEXT: v_mul_hi_u32 v9, v13, v7 +; GISEL-NEXT: v_mul_lo_u32 v10, v13, v8 +; GISEL-NEXT: v_mul_lo_u32 v11, v14, v7 +; GISEL-NEXT: v_mul_hi_u32 v7, v14, v7 +; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 ; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 -; GISEL-NEXT: v_mul_hi_u32 v11, v15, v13 -; GISEL-NEXT: v_mul_lo_u32 v12, v16, v13 ; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 -; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v12 -; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 +; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 +; GISEL-NEXT: v_mul_hi_u32 v10, v13, v8 +; GISEL-NEXT: v_mul_lo_u32 v11, v14, v8 +; GISEL-NEXT: v_mul_hi_u32 v8, v14, v8 +; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 ; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 -; GISEL-NEXT: v_mul_hi_u32 v11, v16, v13 -; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v15, v9 -; GISEL-NEXT: v_addc_u32_e32 v10, vcc, v16, v10, vcc -; GISEL-NEXT: v_mul_hi_u32 v11, v8, v9 -; GISEL-NEXT: v_mul_lo_u32 v12, v8, v10 -; GISEL-NEXT: v_mul_lo_u32 v13, v7, v9 -; GISEL-NEXT: v_mul_hi_u32 v9, v7, v9 -; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 -; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v13 +; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v11 ; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 -; GISEL-NEXT: v_mul_hi_u32 v12, v8, v10 -; GISEL-NEXT: v_mul_lo_u32 v13, v7, v10 -; GISEL-NEXT: v_mul_hi_u32 v10, v7, v10 -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v12 -; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v13 -; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 -; GISEL-NEXT: v_add_i32_e32 v15, vcc, v9, v11 -; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc -; GISEL-NEXT: v_add_i32_e32 v9, vcc, v12, v9 -; GISEL-NEXT: v_add_i32_e32 v13, vcc, v10, v9 -; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v0, v15, 0 -; GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v0, v13, v[10:11] -; GISEL-NEXT: v_sub_i32_e32 v8, vcc, v8, v9 -; GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v1, v15, v[11:12] -; GISEL-NEXT: v_subb_u32_e64 v9, s[4:5], v7, v13, vcc -; GISEL-NEXT: v_sub_i32_e64 v7, s[4:5], v7, v13 -; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v1 +; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 +; GISEL-NEXT: v_add_i32_e32 v15, vcc, v7, v9 +; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc +; GISEL-NEXT: v_add_i32_e32 v7, vcc, v10, v7 +; GISEL-NEXT: v_add_i32_e32 v11, vcc, v8, v7 +; GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v0, v15, 0 +; GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v0, v11, v[8:9] +; GISEL-NEXT: v_sub_i32_e32 v7, vcc, v13, v7 +; GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v1, v15, v[9:10] +; GISEL-NEXT: v_subb_u32_e64 v8, s[4:5], v14, v11, vcc +; GISEL-NEXT: v_sub_i32_e64 v9, s[4:5], v14, v11 +; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v1 ; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] -; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v0 +; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v0 ; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] -; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v9, v1 +; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v8, v1 ; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] -; GISEL-NEXT: v_sub_i32_e64 v11, s[4:5], v8, v0 -; GISEL-NEXT: v_subb_u32_e32 v7, vcc, v7, v1, vcc -; GISEL-NEXT: v_subbrev_u32_e64 v12, vcc, 0, v7, s[4:5] +; GISEL-NEXT: v_sub_i32_e64 v11, s[4:5], v7, v0 +; GISEL-NEXT: v_subb_u32_e32 v9, vcc, v9, v1, vcc +; GISEL-NEXT: v_subbrev_u32_e64 v12, vcc, 0, v9, s[4:5] ; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v12, v1 ; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, -1, vcc ; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v11, v0 @@ -2041,14 +2041,14 @@ define <2 x i64> @v_srem_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) { ; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v12, v1 ; GISEL-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc ; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v11, v0 -; GISEL-NEXT: v_subb_u32_e64 v1, s[4:5], v7, v1, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v1, s[4:5], v9, v1, s[4:5] ; GISEL-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc ; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 ; GISEL-NEXT: v_cndmask_b32_e32 v0, v11, v0, vcc ; GISEL-NEXT: v_cndmask_b32_e32 v1, v12, v1, vcc ; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 -; GISEL-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc -; GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v0, v7, v0, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc ; GISEL-NEXT: v_xor_b32_e32 v0, v0, v6 ; GISEL-NEXT: v_xor_b32_e32 v1, v1, v6 ; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v6 diff --git a/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll b/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll index 7d0d6eb3f7c91..40f8b08a74212 100644 --- a/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll +++ b/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll @@ -2127,25 +2127,24 @@ define void @flat_atomic_xor_expansion_i32_ret_av_av_no_agprs(ptr %ptr) #0 { ; GFX90A-LABEL: flat_atomic_xor_expansion_i32_ret_av_av_no_agprs: ; GFX90A: ; %bb.0: ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX90A-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword a32, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword a33, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword a34, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword a32, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword a33, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX90A-NEXT: v_accvgpr_write_b32 a33, v1 ; GFX90A-NEXT: v_accvgpr_write_b32 a32, v0 ; GFX90A-NEXT: ;;#ASMSTART @@ -2183,21 +2182,20 @@ define void @flat_atomic_xor_expansion_i32_ret_av_av_no_agprs(ptr %ptr) #0 { ; GFX90A-NEXT: v_accvgpr_write_b32 a29, v29 ; GFX90A-NEXT: v_accvgpr_write_b32 a30, v30 ; GFX90A-NEXT: v_accvgpr_write_b32 a31, v31 -; GFX90A-NEXT: v_accvgpr_read_b32 v2, a32 -; GFX90A-NEXT: v_accvgpr_read_b32 v3, a33 -; GFX90A-NEXT: flat_load_dword v1, v[2:3] +; GFX90A-NEXT: v_accvgpr_read_b32 v4, a32 +; GFX90A-NEXT: v_accvgpr_read_b32 v5, a33 +; GFX90A-NEXT: flat_load_dword v1, v[4:5] +; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: ;;#ASMSTART -; GFX90A-NEXT: ; def a34 +; GFX90A-NEXT: ; def v2 ; GFX90A-NEXT: ;;#ASMEND -; GFX90A-NEXT: s_mov_b64 s[4:5], 0 -; GFX90A-NEXT: v_accvgpr_read_b32 v4, a34 ; GFX90A-NEXT: .LBB29_1: ; %atomicrmw.start ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) -; GFX90A-NEXT: v_xor_b32_e32 v0, v1, v4 +; GFX90A-NEXT: v_xor_b32_e32 v0, v1, v2 ; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: s_waitcnt vmcnt(0) -; GFX90A-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc +; GFX90A-NEXT: flat_atomic_cmpswap v0, v[4:5], v[0:1] glc ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_wbinvl1_vol @@ -2247,58 +2245,53 @@ define void @flat_atomic_xor_expansion_i32_ret_av_av_no_agprs(ptr %ptr) #0 { ; GFX90A-NEXT: ;;#ASMSTART ; GFX90A-NEXT: ; use a32 ; GFX90A-NEXT: ;;#ASMEND -; GFX90A-NEXT: buffer_load_dword a34, off, s[0:3], s32 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword a33, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword a32, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword a33, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword a32, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_setpc_b64 s[30:31] ; ; GFX950-LABEL: flat_atomic_xor_expansion_i32_ret_av_av_no_agprs: ; GFX950: ; %bb.0: ; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX950-NEXT: scratch_store_dword off, v40, s32 offset:72 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v41, s32 offset:68 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v42, s32 offset:64 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v43, s32 offset:60 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v44, s32 offset:56 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v45, s32 offset:52 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v46, s32 offset:48 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v47, s32 offset:44 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v56, s32 offset:40 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v57, s32 offset:36 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v58, s32 offset:32 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v59, s32 offset:28 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v60, s32 offset:24 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v61, s32 offset:20 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v62, s32 offset:16 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v63, s32 offset:12 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, a32, s32 offset:8 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, a33, s32 offset:4 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, a34, s32 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v40, s32 offset:68 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v41, s32 offset:64 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v42, s32 offset:60 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v43, s32 offset:56 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v44, s32 offset:52 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v45, s32 offset:48 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v46, s32 offset:44 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v47, s32 offset:40 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v56, s32 offset:36 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v57, s32 offset:32 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v58, s32 offset:28 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v59, s32 offset:24 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v60, s32 offset:20 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v61, s32 offset:16 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v62, s32 offset:12 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v63, s32 offset:8 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, a32, s32 offset:4 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, a33, s32 ; 4-byte Folded Spill ; GFX950-NEXT: v_accvgpr_write_b32 a33, v1 ; GFX950-NEXT: v_accvgpr_write_b32 a32, v0 ; GFX950-NEXT: ;;#ASMSTART ; GFX950-NEXT: ; def v[0:31] ; GFX950-NEXT: ;;#ASMEND -; GFX950-NEXT: ;;#ASMSTART -; GFX950-NEXT: ; def a34 -; GFX950-NEXT: ;;#ASMEND ; GFX950-NEXT: s_mov_b64 s[0:1], 0 ; GFX950-NEXT: v_accvgpr_write_b32 a0, v0 ; GFX950-NEXT: v_accvgpr_write_b32 a1, v1 @@ -2332,17 +2325,19 @@ define void @flat_atomic_xor_expansion_i32_ret_av_av_no_agprs(ptr %ptr) #0 { ; GFX950-NEXT: v_accvgpr_write_b32 a29, v29 ; GFX950-NEXT: v_accvgpr_write_b32 a30, v30 ; GFX950-NEXT: v_accvgpr_write_b32 a31, v31 -; GFX950-NEXT: v_accvgpr_read_b32 v2, a32 -; GFX950-NEXT: v_accvgpr_read_b32 v3, a33 -; GFX950-NEXT: flat_load_dword v1, v[2:3] -; GFX950-NEXT: v_accvgpr_read_b32 v4, a34 +; GFX950-NEXT: v_accvgpr_read_b32 v4, a32 +; GFX950-NEXT: v_accvgpr_read_b32 v5, a33 +; GFX950-NEXT: flat_load_dword v1, v[4:5] +; GFX950-NEXT: ;;#ASMSTART +; GFX950-NEXT: ; def v2 +; GFX950-NEXT: ;;#ASMEND ; GFX950-NEXT: .LBB29_1: ; %atomicrmw.start ; GFX950-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX950-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) -; GFX950-NEXT: v_xor_b32_e32 v0, v1, v4 +; GFX950-NEXT: v_xor_b32_e32 v0, v1, v2 ; GFX950-NEXT: buffer_wbl2 sc0 sc1 ; GFX950-NEXT: s_waitcnt vmcnt(0) -; GFX950-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] sc0 sc1 +; GFX950-NEXT: flat_atomic_cmpswap v0, v[4:5], v[0:1] sc0 sc1 ; GFX950-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX950-NEXT: buffer_inv sc0 sc1 ; GFX950-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 @@ -2391,25 +2386,24 @@ define void @flat_atomic_xor_expansion_i32_ret_av_av_no_agprs(ptr %ptr) #0 { ; GFX950-NEXT: ;;#ASMSTART ; GFX950-NEXT: ; use a32 ; GFX950-NEXT: ;;#ASMEND -; GFX950-NEXT: scratch_load_dword a34, off, s32 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword a33, off, s32 offset:4 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword a32, off, s32 offset:8 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v63, off, s32 offset:12 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v62, off, s32 offset:16 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v61, off, s32 offset:20 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v60, off, s32 offset:24 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v59, off, s32 offset:28 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v58, off, s32 offset:32 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v57, off, s32 offset:36 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v56, off, s32 offset:40 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v47, off, s32 offset:44 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v46, off, s32 offset:48 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v45, off, s32 offset:52 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v44, off, s32 offset:56 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v43, off, s32 offset:60 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v42, off, s32 offset:64 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v41, off, s32 offset:68 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v40, off, s32 offset:72 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword a33, off, s32 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword a32, off, s32 offset:4 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v63, off, s32 offset:8 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v62, off, s32 offset:12 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v61, off, s32 offset:16 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v60, off, s32 offset:20 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v59, off, s32 offset:24 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v58, off, s32 offset:28 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v57, off, s32 offset:32 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v56, off, s32 offset:36 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v47, off, s32 offset:40 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v46, off, s32 offset:44 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v45, off, s32 offset:48 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v44, off, s32 offset:52 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v43, off, s32 offset:56 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v42, off, s32 offset:60 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v41, off, s32 offset:64 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v40, off, s32 offset:68 ; 4-byte Folded Reload ; GFX950-NEXT: s_waitcnt vmcnt(0) ; GFX950-NEXT: s_setpc_b64 s[30:31] %gep.0 = getelementptr inbounds [512 x i32], ptr %ptr, i64 0, i64 10 diff --git a/llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll b/llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll index c424dcc4aa398..b84b85e71c747 100644 --- a/llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll +++ b/llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll @@ -1632,25 +1632,24 @@ define void @global_atomic_xor_expansion_i32_ret_av_av_no_agprs(ptr addrspace(1) ; GFX90A-LABEL: global_atomic_xor_expansion_i32_ret_av_av_no_agprs: ; GFX90A: ; %bb.0: ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX90A-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword a32, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword a33, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; GFX90A-NEXT: buffer_store_dword a34, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword a32, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; GFX90A-NEXT: buffer_store_dword a33, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX90A-NEXT: v_accvgpr_write_b32 a33, v1 ; GFX90A-NEXT: v_accvgpr_write_b32 a32, v0 ; GFX90A-NEXT: ;;#ASMSTART @@ -1688,21 +1687,20 @@ define void @global_atomic_xor_expansion_i32_ret_av_av_no_agprs(ptr addrspace(1) ; GFX90A-NEXT: v_accvgpr_write_b32 a29, v29 ; GFX90A-NEXT: v_accvgpr_write_b32 a30, v30 ; GFX90A-NEXT: v_accvgpr_write_b32 a31, v31 -; GFX90A-NEXT: v_accvgpr_read_b32 v2, a32 -; GFX90A-NEXT: v_accvgpr_read_b32 v3, a33 -; GFX90A-NEXT: global_load_dword v1, v[2:3], off +; GFX90A-NEXT: v_accvgpr_read_b32 v4, a32 +; GFX90A-NEXT: v_accvgpr_read_b32 v5, a33 +; GFX90A-NEXT: global_load_dword v1, v[4:5], off +; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: ;;#ASMSTART -; GFX90A-NEXT: ; def a34 +; GFX90A-NEXT: ; def v2 ; GFX90A-NEXT: ;;#ASMEND -; GFX90A-NEXT: s_mov_b64 s[4:5], 0 -; GFX90A-NEXT: v_accvgpr_read_b32 v4, a34 ; GFX90A-NEXT: .LBB29_1: ; %atomicrmw.start ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: s_waitcnt vmcnt(0) -; GFX90A-NEXT: v_xor_b32_e32 v0, v1, v4 +; GFX90A-NEXT: v_xor_b32_e32 v0, v1, v2 ; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: s_waitcnt vmcnt(0) -; GFX90A-NEXT: global_atomic_cmpswap v0, v[2:3], v[0:1], off glc +; GFX90A-NEXT: global_atomic_cmpswap v0, v[4:5], v[0:1], off glc ; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_wbinvl1_vol @@ -1752,58 +1750,53 @@ define void @global_atomic_xor_expansion_i32_ret_av_av_no_agprs(ptr addrspace(1) ; GFX90A-NEXT: ;;#ASMSTART ; GFX90A-NEXT: ; use a32 ; GFX90A-NEXT: ;;#ASMEND -; GFX90A-NEXT: buffer_load_dword a34, off, s[0:3], s32 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword a33, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword a32, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX90A-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword a33, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword a32, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX90A-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_setpc_b64 s[30:31] ; ; GFX950-LABEL: global_atomic_xor_expansion_i32_ret_av_av_no_agprs: ; GFX950: ; %bb.0: ; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX950-NEXT: scratch_store_dword off, v40, s32 offset:72 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v41, s32 offset:68 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v42, s32 offset:64 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v43, s32 offset:60 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v44, s32 offset:56 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v45, s32 offset:52 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v46, s32 offset:48 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v47, s32 offset:44 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v56, s32 offset:40 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v57, s32 offset:36 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v58, s32 offset:32 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v59, s32 offset:28 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v60, s32 offset:24 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v61, s32 offset:20 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v62, s32 offset:16 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, v63, s32 offset:12 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, a32, s32 offset:8 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, a33, s32 offset:4 ; 4-byte Folded Spill -; GFX950-NEXT: scratch_store_dword off, a34, s32 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v40, s32 offset:68 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v41, s32 offset:64 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v42, s32 offset:60 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v43, s32 offset:56 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v44, s32 offset:52 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v45, s32 offset:48 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v46, s32 offset:44 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v47, s32 offset:40 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v56, s32 offset:36 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v57, s32 offset:32 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v58, s32 offset:28 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v59, s32 offset:24 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v60, s32 offset:20 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v61, s32 offset:16 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v62, s32 offset:12 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, v63, s32 offset:8 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, a32, s32 offset:4 ; 4-byte Folded Spill +; GFX950-NEXT: scratch_store_dword off, a33, s32 ; 4-byte Folded Spill ; GFX950-NEXT: v_accvgpr_write_b32 a33, v1 ; GFX950-NEXT: v_accvgpr_write_b32 a32, v0 ; GFX950-NEXT: ;;#ASMSTART ; GFX950-NEXT: ; def v[0:31] ; GFX950-NEXT: ;;#ASMEND -; GFX950-NEXT: ;;#ASMSTART -; GFX950-NEXT: ; def a34 -; GFX950-NEXT: ;;#ASMEND ; GFX950-NEXT: s_mov_b64 s[0:1], 0 ; GFX950-NEXT: v_accvgpr_write_b32 a0, v0 ; GFX950-NEXT: v_accvgpr_write_b32 a1, v1 @@ -1837,17 +1830,19 @@ define void @global_atomic_xor_expansion_i32_ret_av_av_no_agprs(ptr addrspace(1) ; GFX950-NEXT: v_accvgpr_write_b32 a29, v29 ; GFX950-NEXT: v_accvgpr_write_b32 a30, v30 ; GFX950-NEXT: v_accvgpr_write_b32 a31, v31 -; GFX950-NEXT: v_accvgpr_read_b32 v2, a32 -; GFX950-NEXT: v_accvgpr_read_b32 v3, a33 -; GFX950-NEXT: global_load_dword v1, v[2:3], off -; GFX950-NEXT: v_accvgpr_read_b32 v4, a34 +; GFX950-NEXT: v_accvgpr_read_b32 v4, a32 +; GFX950-NEXT: v_accvgpr_read_b32 v5, a33 +; GFX950-NEXT: global_load_dword v1, v[4:5], off +; GFX950-NEXT: ;;#ASMSTART +; GFX950-NEXT: ; def v2 +; GFX950-NEXT: ;;#ASMEND ; GFX950-NEXT: .LBB29_1: ; %atomicrmw.start ; GFX950-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX950-NEXT: s_waitcnt vmcnt(0) -; GFX950-NEXT: v_xor_b32_e32 v0, v1, v4 +; GFX950-NEXT: v_xor_b32_e32 v0, v1, v2 ; GFX950-NEXT: buffer_wbl2 sc0 sc1 ; GFX950-NEXT: s_waitcnt vmcnt(0) -; GFX950-NEXT: global_atomic_cmpswap v0, v[2:3], v[0:1], off sc0 sc1 +; GFX950-NEXT: global_atomic_cmpswap v0, v[4:5], v[0:1], off sc0 sc1 ; GFX950-NEXT: s_waitcnt vmcnt(0) ; GFX950-NEXT: buffer_inv sc0 sc1 ; GFX950-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 @@ -1896,25 +1891,24 @@ define void @global_atomic_xor_expansion_i32_ret_av_av_no_agprs(ptr addrspace(1) ; GFX950-NEXT: ;;#ASMSTART ; GFX950-NEXT: ; use a32 ; GFX950-NEXT: ;;#ASMEND -; GFX950-NEXT: scratch_load_dword a34, off, s32 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword a33, off, s32 offset:4 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword a32, off, s32 offset:8 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v63, off, s32 offset:12 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v62, off, s32 offset:16 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v61, off, s32 offset:20 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v60, off, s32 offset:24 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v59, off, s32 offset:28 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v58, off, s32 offset:32 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v57, off, s32 offset:36 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v56, off, s32 offset:40 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v47, off, s32 offset:44 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v46, off, s32 offset:48 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v45, off, s32 offset:52 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v44, off, s32 offset:56 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v43, off, s32 offset:60 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v42, off, s32 offset:64 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v41, off, s32 offset:68 ; 4-byte Folded Reload -; GFX950-NEXT: scratch_load_dword v40, off, s32 offset:72 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword a33, off, s32 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword a32, off, s32 offset:4 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v63, off, s32 offset:8 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v62, off, s32 offset:12 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v61, off, s32 offset:16 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v60, off, s32 offset:20 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v59, off, s32 offset:24 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v58, off, s32 offset:28 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v57, off, s32 offset:32 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v56, off, s32 offset:36 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v47, off, s32 offset:40 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v46, off, s32 offset:44 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v45, off, s32 offset:48 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v44, off, s32 offset:52 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v43, off, s32 offset:56 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v42, off, s32 offset:60 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v41, off, s32 offset:64 ; 4-byte Folded Reload +; GFX950-NEXT: scratch_load_dword v40, off, s32 offset:68 ; 4-byte Folded Reload ; GFX950-NEXT: s_waitcnt vmcnt(0) ; GFX950-NEXT: s_setpc_b64 s[30:31] %gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(1) %ptr, i64 0, i64 10 diff --git a/llvm/test/CodeGen/AMDGPU/add.ll b/llvm/test/CodeGen/AMDGPU/add.ll index b8814b64735e6..13ce63115d2c0 100644 --- a/llvm/test/CodeGen/AMDGPU/add.ll +++ b/llvm/test/CodeGen/AMDGPU/add.ll @@ -474,44 +474,44 @@ define amdgpu_kernel void @s_add_v16i32(ptr addrspace(1) %out, <16 x i32> %a, <1 ; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s2, -1 ; GFX6-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NEXT: s_add_i32 s6, s11, s39 -; GFX6-NEXT: s_add_i32 s7, s10, s38 -; GFX6-NEXT: s_add_i32 s10, s15, s43 -; GFX6-NEXT: s_add_i32 s11, s14, s42 -; GFX6-NEXT: s_add_i32 s14, s19, s47 -; GFX6-NEXT: s_add_i32 s15, s18, s46 -; GFX6-NEXT: s_add_i32 s18, s23, s51 -; GFX6-NEXT: s_add_i32 s19, s22, s50 -; GFX6-NEXT: s_add_i32 s21, s21, s49 -; GFX6-NEXT: s_add_i32 s20, s20, s48 -; GFX6-NEXT: s_add_i32 s17, s17, s45 -; GFX6-NEXT: s_add_i32 s16, s16, s44 -; GFX6-NEXT: v_mov_b32_e32 v0, s20 -; GFX6-NEXT: v_mov_b32_e32 v1, s21 -; GFX6-NEXT: v_mov_b32_e32 v2, s19 -; GFX6-NEXT: v_mov_b32_e32 v3, s18 -; GFX6-NEXT: s_add_i32 s13, s13, s41 -; GFX6-NEXT: s_add_i32 s12, s12, s40 +; GFX6-NEXT: s_add_i32 s4, s11, s39 +; GFX6-NEXT: s_add_i32 s5, s10, s38 +; GFX6-NEXT: s_add_i32 s6, s9, s37 +; GFX6-NEXT: s_add_i32 s7, s8, s36 +; GFX6-NEXT: s_add_i32 s8, s15, s43 +; GFX6-NEXT: s_add_i32 s9, s14, s42 +; GFX6-NEXT: s_add_i32 s10, s13, s41 +; GFX6-NEXT: s_add_i32 s11, s12, s40 +; GFX6-NEXT: s_add_i32 s12, s19, s47 +; GFX6-NEXT: s_add_i32 s13, s18, s46 +; GFX6-NEXT: s_add_i32 s14, s17, s45 +; GFX6-NEXT: s_add_i32 s15, s16, s44 +; GFX6-NEXT: s_add_i32 s16, s23, s51 +; GFX6-NEXT: s_add_i32 s17, s22, s50 +; GFX6-NEXT: s_add_i32 s18, s21, s49 +; GFX6-NEXT: s_add_i32 s19, s20, s48 +; GFX6-NEXT: v_mov_b32_e32 v0, s19 +; GFX6-NEXT: v_mov_b32_e32 v1, s18 +; GFX6-NEXT: v_mov_b32_e32 v2, s17 +; GFX6-NEXT: v_mov_b32_e32 v3, s16 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s16 -; GFX6-NEXT: v_mov_b32_e32 v1, s17 -; GFX6-NEXT: v_mov_b32_e32 v2, s15 -; GFX6-NEXT: v_mov_b32_e32 v3, s14 -; GFX6-NEXT: s_add_i32 s9, s9, s37 -; GFX6-NEXT: s_add_i32 s8, s8, s36 +; GFX6-NEXT: v_mov_b32_e32 v0, s15 +; GFX6-NEXT: v_mov_b32_e32 v1, s14 +; GFX6-NEXT: v_mov_b32_e32 v2, s13 +; GFX6-NEXT: v_mov_b32_e32 v3, s12 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s12 -; GFX6-NEXT: v_mov_b32_e32 v1, s13 -; GFX6-NEXT: v_mov_b32_e32 v2, s11 -; GFX6-NEXT: v_mov_b32_e32 v3, s10 +; GFX6-NEXT: v_mov_b32_e32 v0, s11 +; GFX6-NEXT: v_mov_b32_e32 v1, s10 +; GFX6-NEXT: v_mov_b32_e32 v2, s9 +; GFX6-NEXT: v_mov_b32_e32 v3, s8 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s8 -; GFX6-NEXT: v_mov_b32_e32 v1, s9 -; GFX6-NEXT: v_mov_b32_e32 v2, s7 -; GFX6-NEXT: v_mov_b32_e32 v3, s6 +; GFX6-NEXT: v_mov_b32_e32 v0, s7 +; GFX6-NEXT: v_mov_b32_e32 v1, s6 +; GFX6-NEXT: v_mov_b32_e32 v2, s5 +; GFX6-NEXT: v_mov_b32_e32 v3, s4 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GFX6-NEXT: s_endpgm ; diff --git a/llvm/test/CodeGen/AMDGPU/addrspacecast.ll b/llvm/test/CodeGen/AMDGPU/addrspacecast.ll index 19fe3152c2f3e..6e4726a767cf1 100644 --- a/llvm/test/CodeGen/AMDGPU/addrspacecast.ll +++ b/llvm/test/CodeGen/AMDGPU/addrspacecast.ll @@ -491,18 +491,18 @@ define <16 x ptr addrspace(5)> @addrspacecast_v16p0_to_v16p5(<16 x ptr> %ptr) { ; HSA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; HSA-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1] +; HSA-NEXT: v_cmp_ne_u64_e64 s[4:5], 0, v[2:3] +; HSA-NEXT: v_cmp_ne_u64_e64 s[6:7], 0, v[4:5] ; HSA-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc -; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] -; HSA-NEXT: v_cndmask_b32_e32 v1, -1, v2, vcc -; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5] -; HSA-NEXT: v_cndmask_b32_e32 v2, -1, v4, vcc -; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[6:7] -; HSA-NEXT: v_cndmask_b32_e32 v3, -1, v6, vcc ; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[8:9] +; HSA-NEXT: v_cndmask_b32_e64 v1, -1, v2, s[4:5] +; HSA-NEXT: v_cndmask_b32_e64 v2, -1, v4, s[6:7] ; HSA-NEXT: v_cndmask_b32_e32 v4, -1, v8, vcc ; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[10:11] +; HSA-NEXT: v_cmp_ne_u64_e64 s[8:9], 0, v[6:7] ; HSA-NEXT: v_cndmask_b32_e32 v5, -1, v10, vcc ; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[12:13] +; HSA-NEXT: v_cndmask_b32_e64 v3, -1, v6, s[8:9] ; HSA-NEXT: v_cndmask_b32_e32 v6, -1, v12, vcc ; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[14:15] ; HSA-NEXT: v_cndmask_b32_e32 v7, -1, v14, vcc @@ -943,18 +943,18 @@ define <16 x ptr addrspace(3)> @addrspacecast_v16p0_to_v16p3(<16 x ptr> %ptr) { ; HSA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; HSA-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1] +; HSA-NEXT: v_cmp_ne_u64_e64 s[4:5], 0, v[2:3] +; HSA-NEXT: v_cmp_ne_u64_e64 s[6:7], 0, v[4:5] ; HSA-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc -; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] -; HSA-NEXT: v_cndmask_b32_e32 v1, -1, v2, vcc -; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5] -; HSA-NEXT: v_cndmask_b32_e32 v2, -1, v4, vcc -; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[6:7] -; HSA-NEXT: v_cndmask_b32_e32 v3, -1, v6, vcc ; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[8:9] +; HSA-NEXT: v_cndmask_b32_e64 v1, -1, v2, s[4:5] +; HSA-NEXT: v_cndmask_b32_e64 v2, -1, v4, s[6:7] ; HSA-NEXT: v_cndmask_b32_e32 v4, -1, v8, vcc ; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[10:11] +; HSA-NEXT: v_cmp_ne_u64_e64 s[8:9], 0, v[6:7] ; HSA-NEXT: v_cndmask_b32_e32 v5, -1, v10, vcc ; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[12:13] +; HSA-NEXT: v_cndmask_b32_e64 v3, -1, v6, s[8:9] ; HSA-NEXT: v_cndmask_b32_e32 v6, -1, v12, vcc ; HSA-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[14:15] ; HSA-NEXT: v_cndmask_b32_e32 v7, -1, v14, vcc diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll index 47ad460609461..f57991b49c138 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll @@ -3243,15 +3243,16 @@ define <32 x i32> @bitcast_v16f64_to_v32i32(<16 x double> %a, i32 %b) #0 { ; SI-LABEL: bitcast_v16f64_to_v32i32: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB10_2 ; SI-NEXT: ; %bb.1: ; %cmp.true +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; SI-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; SI-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -3270,20 +3271,22 @@ define <32 x i32> @bitcast_v16f64_to_v32i32(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 ; SI-NEXT: .LBB10_2: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v16f64_to_v32i32: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB10_2 ; VI-NEXT: ; %bb.1: ; %cmp.true +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; VI-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; VI-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -3302,20 +3305,22 @@ define <32 x i32> @bitcast_v16f64_to_v32i32(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 ; VI-NEXT: .LBB10_2: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v16f64_to_v32i32: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB10_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.true +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; GFX9-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; GFX9-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -3334,6 +3339,7 @@ define <32 x i32> @bitcast_v16f64_to_v32i32(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 ; GFX9-NEXT: .LBB10_2: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-LABEL: bitcast_v16f64_to_v32i32: @@ -5167,365 +5173,371 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: ; kill: killed $vgpr39 ; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr47 -; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr54 ; VI-NEXT: ; implicit-def: $vgpr46 ; VI-NEXT: ; implicit-def: $vgpr45 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr53 +; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr44 +; VI-NEXT: ; implicit-def: $vgpr52 ; VI-NEXT: ; implicit-def: $vgpr43 ; VI-NEXT: ; implicit-def: $vgpr63 -; VI-NEXT: ; implicit-def: $vgpr50 -; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr35 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr51 ; VI-NEXT: ; implicit-def: $vgpr62 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr50 ; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr60 -; VI-NEXT: ; implicit-def: $vgpr35 +; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr59 +; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr42 -; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 ; VI-NEXT: ; implicit-def: $vgpr40 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 -; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB12_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[31:32] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[29:30] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[27:28] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[25:26] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[23:24] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[21:22] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[19:20] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[27:28] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[17:18] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[15:16] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[13:14] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[11:12] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[9:10] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[7:8] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[5:6] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v32 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v8 ; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v7 ; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7 ; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v5 ; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4 ; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32 +; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v1 ; VI-NEXT: .LBB12_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB12_4 ; VI-NEXT: ; %bb.3: ; %cmp.true ; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v32 +; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v31 ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] ; VI-NEXT: v_add_u32_e32 v30, vcc, 3, v30 @@ -5583,257 +5595,262 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] +; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 +; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32 +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] +; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 +; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] +; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 +; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 -; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 -; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3 -; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 -; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1 -; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 -; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7 -; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 +; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v32 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v8 ; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v7 ; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7 ; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v5 ; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4 ; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1 +; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v1 ; VI-NEXT: .LBB12_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v55, v57, v41, s4 -; VI-NEXT: v_perm_b32 v1, v1, v48, s4 -; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v55 -; VI-NEXT: v_or_b32_e32 v1, v1, v48 +; VI-NEXT: v_perm_b32 v38, v38, v41, s4 +; VI-NEXT: v_perm_b32 v1, v1, v42, s4 +; VI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 +; VI-NEXT: v_or_b32_e32 v1, v1, v38 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v34, v56, s4 -; VI-NEXT: v_perm_b32 v2, v2, v53, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v2, v56, s4 +; VI-NEXT: v_perm_b32 v2, v39, v47, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v47, v40, s4 -; VI-NEXT: v_perm_b32 v2, v3, v38, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v3, v37, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v55, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; VI-NEXT: v_perm_b32 v2, v46, v45, s4 -; VI-NEXT: v_perm_b32 v1, v4, v52, s4 +; VI-NEXT: v_perm_b32 v1, v4, v54, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v33, v39, s4 -; VI-NEXT: v_perm_b32 v2, v5, v37, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v5, v53, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v36, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v44, v43, s4 -; VI-NEXT: v_perm_b32 v1, v6, v51, s4 +; VI-NEXT: v_perm_b32 v2, v52, v43, s4 +; VI-NEXT: v_perm_b32 v1, v6, v44, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v50, v54, s4 -; VI-NEXT: v_perm_b32 v2, v7, v63, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v7, v63, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v35, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v62, v61, s4 -; VI-NEXT: v_perm_b32 v1, v8, v36, s4 +; VI-NEXT: v_perm_b32 v2, v62, v34, s4 +; VI-NEXT: v_perm_b32 v1, v8, v51, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v9, v49, s4 -; VI-NEXT: v_perm_b32 v1, v60, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v9, v50, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v61, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v59, v58, s4 -; VI-NEXT: v_perm_b32 v1, v10, v35, s4 +; VI-NEXT: v_perm_b32 v2, v49, v33, s4 +; VI-NEXT: v_perm_b32 v1, v10, v60, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v11, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v11, v59, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v48, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v12, v58, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v12, v1, s4 +; VI-NEXT: v_perm_b32 v2, v57, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v13, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v13, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -5842,21 +5859,21 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v15, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v15, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -5865,21 +5882,21 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_perm_b32 v1, v17, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v17, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -5888,21 +5905,20 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v19, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v19, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -5911,8 +5927,8 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -5922,9 +5938,9 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -5933,8 +5949,8 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -5944,9 +5960,9 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -5955,8 +5971,8 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -5966,9 +5982,9 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -5977,8 +5993,8 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -5988,9 +6004,9 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -5999,8 +6015,8 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -6010,9 +6026,9 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -6021,8 +6037,8 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -6032,13 +6048,13 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v1, v32, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v42, s4 +; VI-NEXT: v_perm_b32 v2, v40, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen @@ -6083,389 +6099,419 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr58 ; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; implicit-def: $vgpr49 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr51 -; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr50 -; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; implicit-def: $vgpr45 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr44 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr40 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr53 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr44 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr57 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr49 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr43 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: ; kill: killed $vgpr48 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(23) -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 -; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB12_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(24) +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(29) ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v14 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v9 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v9 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v3 +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[29:30] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v3 +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[31:32] +; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[27:28] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v2 +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v2 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[60:61], 24, v[23:24] +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[19:20] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v2 +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[25:26] +; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[17:18] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v16 +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v1 +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[21:22] +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v10 +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v44, v35 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[13:14] +; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; GFX9-NEXT: v_mov_b32_e32 v49, v38 +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[15:16] +; GFX9-NEXT: v_mov_b32_e32 v36, v52 +; GFX9-NEXT: v_mov_b32_e32 v52, v37 +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[5:6] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20] +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v17 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[9:10] +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16] +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; GFX9-NEXT: v_mov_b32_e32 v57, v55 +; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[55:56], 24, v[3:4] +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[1:2] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v10 +; GFX9-NEXT: v_mov_b32_e32 v60, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v1 ; GFX9-NEXT: .LBB12_2: ; %Flow -; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] +; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5] +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v61, v58 +; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB12_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true ; GFX9-NEXT: v_add_u32_e32 v32, 3, v32 -; GFX9-NEXT: s_waitcnt vmcnt(22) +; GFX9-NEXT: s_waitcnt vmcnt(30) ; GFX9-NEXT: v_add_u32_e32 v31, 3, v31 +; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] ; GFX9-NEXT: v_add_u32_e32 v30, 3, v30 ; GFX9-NEXT: v_add_u32_e32 v29, 3, v29 @@ -6491,365 +6537,374 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] -; GFX9-NEXT: v_add_u32_e32 v22, 3, v22 -; GFX9-NEXT: v_add_u32_e32 v21, 3, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] ; GFX9-NEXT: v_add_u32_e32 v20, 3, v20 ; GFX9-NEXT: v_add_u32_e32 v19, 3, v19 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] ; GFX9-NEXT: v_add_u32_e32 v18, 3, v18 ; GFX9-NEXT: v_add_u32_e32 v17, 3, v17 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18] ; GFX9-NEXT: v_add_u32_e32 v16, 3, v16 ; GFX9-NEXT: v_add_u32_e32 v15, 3, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] ; GFX9-NEXT: v_add_u32_e32 v14, 3, v14 ; GFX9-NEXT: v_add_u32_e32 v13, 3, v13 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] +; GFX9-NEXT: v_add_u32_e32 v8, 3, v8 +; GFX9-NEXT: v_add_u32_e32 v7, 3, v7 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] -; GFX9-NEXT: v_add_u32_e32 v12, 3, v12 -; GFX9-NEXT: v_add_u32_e32 v11, 3, v11 +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] +; GFX9-NEXT: v_add_u32_e32 v6, 3, v6 +; GFX9-NEXT: v_add_u32_e32 v5, 3, v5 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] +; GFX9-NEXT: v_add_u32_e32 v4, 3, v4 +; GFX9-NEXT: v_add_u32_e32 v3, 3, v3 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] +; GFX9-NEXT: v_add_u32_e32 v2, 3, v2 +; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32 +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v6 +; GFX9-NEXT: v_add_u32_e32 v22, 3, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v5 +; GFX9-NEXT: v_add_u32_e32 v21, 3, v21 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v4 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v4 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v3 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v3 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v2 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v2 ; GFX9-NEXT: v_add_u32_e32 v10, 3, v10 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: v_add_u32_e32 v6, 3, v6 -; GFX9-NEXT: v_add_u32_e32 v5, 3, v5 -; GFX9-NEXT: v_add_u32_e32 v8, 3, v8 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: v_add_u32_e32 v4, 3, v4 -; GFX9-NEXT: v_add_u32_e32 v3, 3, v3 ; GFX9-NEXT: v_add_u32_e32 v9, 3, v9 -; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; GFX9-NEXT: v_add_u32_e32 v2, 3, v2 -; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 -; GFX9-NEXT: v_add_u32_e32 v7, 3, v7 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1 +; GFX9-NEXT: v_add_u32_e32 v12, 3, v12 +; GFX9-NEXT: v_add_u32_e32 v11, 3, v11 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v2 +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[21:22] +; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12] +; GFX9-NEXT: v_lshrrev_b64 v[61:62], 24, v[9:10] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 +; GFX9-NEXT: s_waitcnt vmcnt(62) +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v22 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v14 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v8 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v1 ; GFX9-NEXT: .LBB12_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v11, v11, v36, s4 -; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4 -; GFX9-NEXT: v_perm_b32 v34, v38, v39, s4 -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v4, v4, v51, s4 -; GFX9-NEXT: v_perm_b32 v6, v6, v33, s4 -; GFX9-NEXT: v_perm_b32 v33, v50, v54, s4 -; GFX9-NEXT: v_perm_b32 v55, v58, v41, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v59, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v2, v52, s4 -; GFX9-NEXT: v_perm_b32 v37, v37, v53, s4 -; GFX9-NEXT: v_perm_b32 v52, v57, v40, s4 -; GFX9-NEXT: v_perm_b32 v5, v5, v56, s4 -; GFX9-NEXT: v_perm_b32 v7, v7, v47, s4 -; GFX9-NEXT: v_perm_b32 v8, v8, v46, s4 -; GFX9-NEXT: v_perm_b32 v9, v9, v45, s4 -; GFX9-NEXT: v_perm_b32 v10, v10, v44, s4 -; GFX9-NEXT: v_perm_b32 v13, v13, v60, s4 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v35, v36, v35, s4 -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v38, v63, v38, s4 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v15, v15, v39, s4 -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v14, v14, v36, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v16, v16, v39, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v37, s4 +; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v36, v36, v50, s4 -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v39, v39, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v37, v37, v58, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v17, v17, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v18, v18, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v50, v50, v53, s4 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v1, v49, v43, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 +; GFX9-NEXT: v_perm_b32 v2, v37, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v3 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v3, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v1, v48, v62, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v4, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v5 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v5, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v6, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v61, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v7 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v7, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v1, v8, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8 +; GFX9-NEXT: v_perm_b32 v2, v2, v56, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v9 +; GFX9-NEXT: v_perm_b32 v1, v9, v48, s4 +; GFX9-NEXT: v_perm_b32 v2, v33, v61, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10 +; GFX9-NEXT: v_perm_b32 v1, v10, v52, s4 +; GFX9-NEXT: v_perm_b32 v2, v62, v63, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v11 +; GFX9-NEXT: v_perm_b32 v1, v11, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v41, v35, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12 +; GFX9-NEXT: v_perm_b32 v1, v12, v47, s4 +; GFX9-NEXT: v_perm_b32 v2, v45, v60, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v13 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v13, v40, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v50, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v55, v46, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14 +; GFX9-NEXT: v_perm_b32 v1, v14, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v15 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v15, v39, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v36, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16 +; GFX9-NEXT: v_perm_b32 v1, v16, v44, s4 +; GFX9-NEXT: v_perm_b32 v2, v54, v53, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v17 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v17, v34, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v57, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v51, v49, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18 +; GFX9-NEXT: v_perm_b32 v1, v18, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v1 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v20, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v1, v21, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v21, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_perm_b32 v2, v38, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -6858,19 +6913,19 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -6879,19 +6934,19 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -6900,19 +6955,19 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -6921,19 +6976,19 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -6942,13 +6997,14 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload @@ -7362,51 +7418,49 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX11-FAKE16-LABEL: bitcast_v32i32_to_v128i8: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:88 +; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:84 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:84 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:80 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:76 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:72 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:72 -; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:68 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:64 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:60 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:56 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:52 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:48 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:44 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:40 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:36 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:32 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:28 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:24 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:20 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:16 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:12 ; GFX11-FAKE16-NEXT: s_clause 0x2 ; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8 ; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4 ; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73 @@ -7492,6 +7546,7 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr86 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr85 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr83 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr82 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81 @@ -7500,7 +7555,6 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2) ; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v33 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33 @@ -7509,18 +7563,19 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB12_2 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20] ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4] ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32 @@ -7602,10 +7657,9 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v1 ; GFX11-FAKE16-NEXT: .LBB12_2: ; %Flow ; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB12_4 @@ -7739,12 +7793,12 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v1 ; GFX11-FAKE16-NEXT: .LBB12_4: ; %end ; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v39, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004 @@ -7850,27 +7904,26 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112 -; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:12 -; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:16 -; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:20 -; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:24 -; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:28 -; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:32 -; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:36 -; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:40 -; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:44 -; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:48 -; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:52 -; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:56 -; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:60 -; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:64 -; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:68 -; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:72 -; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:76 -; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:80 -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:84 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:88 +; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:84 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 @@ -7958,506 +8011,309 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: v_readfirstlane_b32 s44, v1 ; SI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane ; SI-NEXT: ; implicit-def: $vgpr22 : SGPR spill to VGPR lane -; SI-NEXT: s_cbranch_scc0 .LBB13_2 +; SI-NEXT: s_cbranch_scc0 .LBB13_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_lshr_b32 s46, s5, 24 +; SI-NEXT: s_lshr_b32 s46, s29, 8 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_writelane_b32 v22, s46, 6 -; SI-NEXT: s_lshr_b32 s46, s5, 16 -; SI-NEXT: v_writelane_b32 v22, s46, 7 -; SI-NEXT: s_lshr_b32 s46, s15, 24 -; SI-NEXT: v_writelane_b32 v22, s46, 8 -; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 ; SI-NEXT: v_writelane_b32 v22, s46, 2 -; SI-NEXT: v_writelane_b32 v22, s47, 3 -; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 +; SI-NEXT: s_lshr_b32 s46, s27, 24 +; SI-NEXT: v_writelane_b32 v22, s46, 3 +; SI-NEXT: s_lshr_b32 s46, s27, 16 ; SI-NEXT: v_writelane_b32 v22, s46, 4 -; SI-NEXT: v_writelane_b32 v22, s47, 5 -; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 ; SI-NEXT: v_writelane_b32 v22, s46, 0 ; SI-NEXT: v_writelane_b32 v22, s47, 1 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 62 ; SI-NEXT: v_writelane_b32 v21, s47, 63 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8 ; SI-NEXT: v_writelane_b32 v21, s46, 60 ; SI-NEXT: v_writelane_b32 v21, s47, 61 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 58 ; SI-NEXT: v_writelane_b32 v21, s47, 59 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 56 ; SI-NEXT: v_writelane_b32 v21, s47, 57 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8 ; SI-NEXT: v_writelane_b32 v21, s46, 54 ; SI-NEXT: v_writelane_b32 v21, s47, 55 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 52 ; SI-NEXT: v_writelane_b32 v21, s47, 53 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 50 ; SI-NEXT: v_writelane_b32 v21, s47, 51 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 ; SI-NEXT: v_writelane_b32 v21, s46, 48 ; SI-NEXT: v_writelane_b32 v21, s47, 49 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 46 ; SI-NEXT: v_writelane_b32 v21, s47, 47 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 44 ; SI-NEXT: v_writelane_b32 v21, s47, 45 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8 ; SI-NEXT: v_writelane_b32 v21, s46, 42 ; SI-NEXT: v_writelane_b32 v21, s47, 43 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 40 ; SI-NEXT: v_writelane_b32 v21, s47, 41 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 38 ; SI-NEXT: v_writelane_b32 v21, s47, 39 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8 ; SI-NEXT: v_writelane_b32 v21, s46, 36 ; SI-NEXT: v_writelane_b32 v21, s47, 37 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 34 ; SI-NEXT: v_writelane_b32 v21, s47, 35 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 32 ; SI-NEXT: v_writelane_b32 v21, s47, 33 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8 ; SI-NEXT: v_writelane_b32 v21, s46, 30 ; SI-NEXT: v_writelane_b32 v21, s47, 31 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 28 ; SI-NEXT: v_writelane_b32 v21, s47, 29 -; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 26 ; SI-NEXT: v_writelane_b32 v21, s47, 27 -; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8 ; SI-NEXT: v_writelane_b32 v21, s46, 24 ; SI-NEXT: v_writelane_b32 v21, s47, 25 -; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 22 ; SI-NEXT: v_writelane_b32 v21, s47, 23 -; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 20 ; SI-NEXT: v_writelane_b32 v21, s47, 21 -; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 8 ; SI-NEXT: v_writelane_b32 v21, s46, 18 ; SI-NEXT: v_writelane_b32 v21, s47, 19 -; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 16 ; SI-NEXT: v_writelane_b32 v21, s47, 17 -; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 14 ; SI-NEXT: v_writelane_b32 v21, s47, 15 -; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 8 ; SI-NEXT: v_writelane_b32 v21, s46, 12 ; SI-NEXT: v_writelane_b32 v21, s47, 13 -; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24 +; SI-NEXT: s_lshr_b32 s60, s5, 16 ; SI-NEXT: v_writelane_b32 v21, s46, 10 +; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 24 +; SI-NEXT: s_lshr_b32 s62, s5, 8 ; SI-NEXT: v_writelane_b32 v21, s47, 11 -; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16 +; SI-NEXT: s_mov_b32 s59, s60 +; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16 +; SI-NEXT: s_lshr_b32 s72, s7, 24 ; SI-NEXT: v_writelane_b32 v21, s46, 8 -; SI-NEXT: s_lshr_b32 s74, s7, 24 +; SI-NEXT: s_mov_b32 s61, s62 +; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 8 +; SI-NEXT: s_lshr_b32 s74, s7, 16 ; SI-NEXT: v_writelane_b32 v21, s47, 9 -; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 8 +; SI-NEXT: s_mov_b32 s63, s72 ; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 24 -; SI-NEXT: s_lshr_b32 s76, s7, 16 +; SI-NEXT: s_lshr_b32 s76, s7, 8 ; SI-NEXT: v_writelane_b32 v21, s46, 6 ; SI-NEXT: s_mov_b32 s73, s74 ; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16 -; SI-NEXT: s_lshr_b32 s78, s7, 8 +; SI-NEXT: s_lshr_b32 s78, s9, 24 ; SI-NEXT: v_writelane_b32 v21, s47, 7 -; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24 ; SI-NEXT: s_mov_b32 s75, s76 ; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 8 -; SI-NEXT: s_lshr_b32 s88, s9, 24 +; SI-NEXT: s_lshr_b32 s88, s9, 16 ; SI-NEXT: v_writelane_b32 v21, s46, 4 ; SI-NEXT: s_mov_b32 s77, s78 ; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 24 -; SI-NEXT: s_lshr_b32 s90, s9, 16 +; SI-NEXT: s_lshr_b32 s90, s9, 8 ; SI-NEXT: v_writelane_b32 v21, s47, 5 -; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 16 ; SI-NEXT: s_mov_b32 s79, s88 ; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16 -; SI-NEXT: s_lshr_b32 s92, s9, 8 +; SI-NEXT: s_lshr_b32 s92, s11, 24 ; SI-NEXT: v_writelane_b32 v21, s46, 2 ; SI-NEXT: s_mov_b32 s89, s90 ; SI-NEXT: s_lshr_b64 s[90:91], s[20:21], 8 -; SI-NEXT: s_lshr_b32 s94, s11, 24 -; SI-NEXT: s_lshr_b32 s36, s13, 24 +; SI-NEXT: s_lshr_b32 s94, s11, 16 ; SI-NEXT: v_writelane_b32 v21, s47, 3 -; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8 ; SI-NEXT: s_mov_b32 s91, s92 ; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 24 -; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 24 -; SI-NEXT: s_lshr_b32 vcc_lo, s11, 16 -; SI-NEXT: s_lshr_b32 vcc_hi, s11, 8 -; SI-NEXT: s_lshr_b32 s38, s13, 16 +; SI-NEXT: s_lshr_b32 vcc_lo, s11, 8 +; SI-NEXT: s_lshr_b32 vcc_hi, s13, 24 +; SI-NEXT: s_lshr_b32 s36, s13, 16 +; SI-NEXT: s_lshr_b32 s56, s29, 16 ; SI-NEXT: v_writelane_b32 v21, s46, 0 ; SI-NEXT: s_mov_b32 s93, s94 ; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[30:31], s[18:19], 8 -; SI-NEXT: s_mov_b32 s35, s36 -; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 -; SI-NEXT: s_lshr_b32 s63, s5, 8 -; SI-NEXT: s_lshr_b32 s39, s13, 8 -; SI-NEXT: s_lshr_b32 s87, s15, 16 -; SI-NEXT: s_lshr_b32 s55, s15, 8 -; SI-NEXT: s_lshr_b32 s97, s41, 24 -; SI-NEXT: s_lshr_b32 s54, s41, 16 -; SI-NEXT: s_lshr_b32 s99, s41, 8 -; SI-NEXT: s_lshr_b32 s85, s43, 24 -; SI-NEXT: s_lshr_b32 s98, s43, 16 -; SI-NEXT: s_lshr_b32 s53, s43, 8 -; SI-NEXT: s_lshr_b32 s96, s45, 24 -; SI-NEXT: s_lshr_b32 s86, s45, 16 -; SI-NEXT: s_lshr_b32 s49, s45, 8 -; SI-NEXT: s_lshr_b32 s64, s29, 24 -; SI-NEXT: s_lshr_b32 s65, s29, 16 -; SI-NEXT: s_lshr_b32 s66, s29, 8 -; SI-NEXT: s_lshr_b32 s67, s27, 24 -; SI-NEXT: s_lshr_b32 s58, s27, 16 -; SI-NEXT: s_lshr_b32 s59, s27, 8 -; SI-NEXT: s_lshr_b32 s60, s25, 24 -; SI-NEXT: s_lshr_b32 s61, s25, 16 -; SI-NEXT: s_lshr_b32 s62, s25, 8 -; SI-NEXT: s_lshr_b32 s68, s23, 24 -; SI-NEXT: s_lshr_b32 s69, s23, 16 -; SI-NEXT: s_lshr_b32 s48, s23, 8 -; SI-NEXT: s_lshr_b32 s50, s21, 24 -; SI-NEXT: s_lshr_b32 s51, s21, 16 -; SI-NEXT: s_lshr_b32 s70, s21, 8 -; SI-NEXT: s_lshr_b32 s71, s19, 24 -; SI-NEXT: s_lshr_b32 s80, s19, 16 -; SI-NEXT: s_lshr_b32 s81, s19, 8 -; SI-NEXT: s_lshr_b32 s82, s17, 24 -; SI-NEXT: s_lshr_b32 s83, s17, 16 -; SI-NEXT: s_lshr_b32 s52, s17, 8 -; SI-NEXT: s_lshr_b64 s[56:57], s[42:43], 24 +; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 24 +; SI-NEXT: s_lshr_b32 s51, s5, 24 +; SI-NEXT: s_lshr_b32 s37, s13, 8 +; SI-NEXT: s_lshr_b32 s39, s15, 24 +; SI-NEXT: s_lshr_b32 s38, s15, 16 +; SI-NEXT: s_lshr_b32 s83, s15, 8 +; SI-NEXT: s_lshr_b32 s82, s41, 24 +; SI-NEXT: s_lshr_b32 s85, s41, 16 +; SI-NEXT: s_lshr_b32 s84, s41, 8 +; SI-NEXT: s_lshr_b32 s87, s43, 24 +; SI-NEXT: s_lshr_b32 s86, s43, 16 +; SI-NEXT: s_lshr_b32 s97, s43, 8 +; SI-NEXT: s_lshr_b32 s50, s45, 24 +; SI-NEXT: s_lshr_b32 s96, s45, 16 +; SI-NEXT: s_lshr_b32 s99, s45, 8 +; SI-NEXT: s_lshr_b32 s98, s29, 24 +; SI-NEXT: s_lshr_b32 s48, s27, 8 +; SI-NEXT: s_lshr_b32 s81, s25, 24 +; SI-NEXT: s_lshr_b32 s55, s25, 16 +; SI-NEXT: s_lshr_b32 s64, s25, 8 +; SI-NEXT: s_lshr_b32 s65, s23, 24 +; SI-NEXT: s_lshr_b32 s66, s23, 16 +; SI-NEXT: s_lshr_b32 s67, s23, 8 +; SI-NEXT: s_lshr_b32 s68, s21, 24 +; SI-NEXT: s_lshr_b32 s69, s21, 16 +; SI-NEXT: s_lshr_b32 s49, s21, 8 +; SI-NEXT: s_lshr_b32 s52, s19, 24 +; SI-NEXT: s_lshr_b32 s53, s19, 16 +; SI-NEXT: s_lshr_b32 s70, s19, 8 +; SI-NEXT: s_lshr_b32 s71, s17, 24 +; SI-NEXT: s_lshr_b32 s54, s17, 16 +; SI-NEXT: s_lshr_b32 s80, s17, 8 ; SI-NEXT: v_writelane_b32 v21, s47, 1 ; SI-NEXT: s_mov_b32 s95, vcc_lo ; SI-NEXT: s_mov_b32 s31, vcc_hi -; SI-NEXT: s_mov_b32 s37, s38 +; SI-NEXT: s_mov_b32 s35, s36 +; SI-NEXT: s_mov_b32 s36, s56 +; SI-NEXT: s_lshr_b64 s[56:57], s[16:17], 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[16:17], 8 -; SI-NEXT: s_mov_b64 vcc, 0 -; SI-NEXT: s_branch .LBB13_3 -; SI-NEXT: .LBB13_2: -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr85 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: s_mov_b64 vcc, -1 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_writelane_b32 v21, s56, 0 -; SI-NEXT: v_writelane_b32 v21, s57, 1 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v21, s56, 2 -; SI-NEXT: v_writelane_b32 v21, s57, 3 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr83 -; SI-NEXT: ; implicit-def: $sgpr82 -; SI-NEXT: ; implicit-def: $sgpr81 -; SI-NEXT: ; implicit-def: $sgpr80 -; SI-NEXT: ; implicit-def: $sgpr71 -; SI-NEXT: ; implicit-def: $sgpr70 -; SI-NEXT: ; implicit-def: $sgpr51 -; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr69 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr61 -; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr59 -; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr67 -; SI-NEXT: ; implicit-def: $sgpr66 -; SI-NEXT: ; implicit-def: $sgpr65 -; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr49 -; SI-NEXT: ; implicit-def: $sgpr86 -; SI-NEXT: ; implicit-def: $sgpr96 -; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr98 -; SI-NEXT: ; implicit-def: $sgpr99 -; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr97 -; SI-NEXT: ; implicit-def: $sgpr55 -; SI-NEXT: ; implicit-def: $sgpr87 -; SI-NEXT: ; implicit-def: $sgpr37 -; SI-NEXT: ; implicit-def: $sgpr35 -; SI-NEXT: ; implicit-def: $sgpr31 -; SI-NEXT: ; implicit-def: $sgpr95 -; SI-NEXT: ; implicit-def: $sgpr93 -; SI-NEXT: ; implicit-def: $sgpr91 -; SI-NEXT: ; implicit-def: $sgpr89 -; SI-NEXT: ; implicit-def: $sgpr79 -; SI-NEXT: ; implicit-def: $sgpr77 -; SI-NEXT: ; implicit-def: $sgpr75 -; SI-NEXT: ; implicit-def: $sgpr73 -; SI-NEXT: ; implicit-def: $sgpr63 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr30 -; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr92 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; implicit-def: $sgpr88 -; SI-NEXT: ; implicit-def: $sgpr78 -; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: v_writelane_b32 v21, s56, 4 -; SI-NEXT: v_writelane_b32 v21, s57, 5 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s56, 6 -; SI-NEXT: v_writelane_b32 v21, s57, 7 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s56, 8 -; SI-NEXT: v_writelane_b32 v21, s57, 9 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s56, 10 -; SI-NEXT: v_writelane_b32 v21, s57, 11 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s56, 12 -; SI-NEXT: v_writelane_b32 v21, s57, 13 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s56, 14 -; SI-NEXT: v_writelane_b32 v21, s57, 15 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s56, 16 -; SI-NEXT: v_writelane_b32 v21, s57, 17 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s56, 18 -; SI-NEXT: v_writelane_b32 v21, s57, 19 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s56, 20 -; SI-NEXT: v_writelane_b32 v21, s57, 21 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s56, 22 -; SI-NEXT: v_writelane_b32 v21, s57, 23 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s56, 24 -; SI-NEXT: v_writelane_b32 v21, s57, 25 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s56, 26 -; SI-NEXT: v_writelane_b32 v21, s57, 27 -; SI-NEXT: v_writelane_b32 v21, s38, 28 -; SI-NEXT: v_writelane_b32 v21, s39, 29 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: v_writelane_b32 v21, s38, 30 -; SI-NEXT: v_writelane_b32 v21, s39, 31 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: v_writelane_b32 v21, s38, 32 -; SI-NEXT: v_writelane_b32 v21, s39, 33 -; SI-NEXT: v_writelane_b32 v21, s84, 34 -; SI-NEXT: v_writelane_b32 v21, s85, 35 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: v_writelane_b32 v21, s84, 36 -; SI-NEXT: v_writelane_b32 v21, s85, 37 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 38 -; SI-NEXT: v_writelane_b32 v21, s85, 39 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 40 -; SI-NEXT: v_writelane_b32 v21, s85, 41 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 42 -; SI-NEXT: v_writelane_b32 v21, s85, 43 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 44 -; SI-NEXT: v_writelane_b32 v21, s85, 45 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 46 -; SI-NEXT: v_writelane_b32 v21, s85, 47 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 48 -; SI-NEXT: v_writelane_b32 v21, s85, 49 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 50 -; SI-NEXT: v_writelane_b32 v21, s85, 51 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 52 -; SI-NEXT: v_writelane_b32 v21, s85, 53 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 54 -; SI-NEXT: v_writelane_b32 v21, s85, 55 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 56 -; SI-NEXT: v_writelane_b32 v21, s85, 57 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 58 -; SI-NEXT: v_writelane_b32 v21, s85, 59 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 60 -; SI-NEXT: v_writelane_b32 v21, s85, 61 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v21, s84, 62 -; SI-NEXT: v_writelane_b32 v21, s85, 63 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_writelane_b32 v22, s84, 0 -; SI-NEXT: v_writelane_b32 v22, s85, 1 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: v_writelane_b32 v22, s84, 2 -; SI-NEXT: v_writelane_b32 v22, s85, 3 -; SI-NEXT: v_writelane_b32 v22, s38, 4 -; SI-NEXT: v_writelane_b32 v22, s39, 5 -; SI-NEXT: .LBB13_3: ; %Flow -; SI-NEXT: s_andn2_b64 vcc, exec, vcc -; SI-NEXT: s_mov_b32 s38, s98 -; SI-NEXT: s_mov_b32 s98, s85 -; SI-NEXT: s_mov_b32 s84, s56 -; SI-NEXT: s_mov_b32 s56, s53 -; SI-NEXT: s_mov_b32 s85, s86 -; SI-NEXT: s_mov_b32 s86, s49 -; SI-NEXT: s_mov_b32 s49, s64 -; SI-NEXT: s_mov_b32 s64, s65 -; SI-NEXT: s_mov_b32 s65, s66 -; SI-NEXT: s_mov_b32 s66, s67 -; SI-NEXT: s_mov_b32 s67, s58 -; SI-NEXT: s_cbranch_vccnz .LBB13_5 -; SI-NEXT: ; %bb.4: ; %cmp.true +; SI-NEXT: s_cbranch_execnz .LBB13_3 +; SI-NEXT: .LBB13_2: ; %cmp.true ; SI-NEXT: s_add_i32 s5, s5, 3 ; SI-NEXT: s_add_i32 s4, s4, 3 ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; SI-NEXT: v_writelane_b32 v22, s46, 2 -; SI-NEXT: v_writelane_b32 v22, s47, 3 -; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 -; SI-NEXT: v_writelane_b32 v22, s46, 4 -; SI-NEXT: v_writelane_b32 v22, s47, 5 -; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8 -; SI-NEXT: s_add_i32 s7, s7, 3 -; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: v_writelane_b32 v22, s46, 0 ; SI-NEXT: v_writelane_b32 v22, s47, 1 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 62 ; SI-NEXT: v_writelane_b32 v21, s47, 63 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8 +; SI-NEXT: s_add_i32 s7, s7, 3 +; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: v_writelane_b32 v21, s46, 60 ; SI-NEXT: v_writelane_b32 v21, s47, 61 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8 -; SI-NEXT: s_add_i32 s9, s9, 3 -; SI-NEXT: s_add_i32 s8, s8, 3 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 58 ; SI-NEXT: v_writelane_b32 v21, s47, 59 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 56 ; SI-NEXT: v_writelane_b32 v21, s47, 57 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8 +; SI-NEXT: s_add_i32 s9, s9, 3 +; SI-NEXT: s_add_i32 s8, s8, 3 ; SI-NEXT: v_writelane_b32 v21, s46, 54 ; SI-NEXT: v_writelane_b32 v21, s47, 55 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 -; SI-NEXT: s_add_i32 s11, s11, 3 -; SI-NEXT: s_add_i32 s10, s10, 3 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 52 ; SI-NEXT: v_writelane_b32 v21, s47, 53 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 50 ; SI-NEXT: v_writelane_b32 v21, s47, 51 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 +; SI-NEXT: s_add_i32 s11, s11, 3 +; SI-NEXT: s_add_i32 s10, s10, 3 ; SI-NEXT: v_writelane_b32 v21, s46, 48 ; SI-NEXT: v_writelane_b32 v21, s47, 49 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8 -; SI-NEXT: s_add_i32 s13, s13, 3 -; SI-NEXT: s_add_i32 s12, s12, 3 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 46 ; SI-NEXT: v_writelane_b32 v21, s47, 47 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 44 ; SI-NEXT: v_writelane_b32 v21, s47, 45 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8 +; SI-NEXT: s_add_i32 s13, s13, 3 +; SI-NEXT: s_add_i32 s12, s12, 3 ; SI-NEXT: v_writelane_b32 v21, s46, 42 ; SI-NEXT: v_writelane_b32 v21, s47, 43 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8 -; SI-NEXT: s_add_i32 s15, s15, 3 -; SI-NEXT: s_add_i32 s14, s14, 3 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 40 ; SI-NEXT: v_writelane_b32 v21, s47, 41 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 38 ; SI-NEXT: v_writelane_b32 v21, s47, 39 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8 +; SI-NEXT: s_add_i32 s15, s15, 3 +; SI-NEXT: s_add_i32 s14, s14, 3 ; SI-NEXT: v_writelane_b32 v21, s46, 36 ; SI-NEXT: v_writelane_b32 v21, s47, 37 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8 -; SI-NEXT: s_add_i32 s41, s41, 3 -; SI-NEXT: s_add_i32 s40, s40, 3 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 34 ; SI-NEXT: v_writelane_b32 v21, s47, 35 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 32 ; SI-NEXT: v_writelane_b32 v21, s47, 33 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8 +; SI-NEXT: s_add_i32 s41, s41, 3 +; SI-NEXT: s_add_i32 s40, s40, 3 ; SI-NEXT: v_writelane_b32 v21, s46, 30 ; SI-NEXT: v_writelane_b32 v21, s47, 31 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8 -; SI-NEXT: s_add_i32 s43, s43, 3 -; SI-NEXT: s_add_i32 s42, s42, 3 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 28 ; SI-NEXT: v_writelane_b32 v21, s47, 29 -; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 26 ; SI-NEXT: v_writelane_b32 v21, s47, 27 -; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 8 -; SI-NEXT: s_add_i32 s45, s45, 3 -; SI-NEXT: s_add_i32 s44, s44, 3 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8 +; SI-NEXT: s_add_i32 s43, s43, 3 +; SI-NEXT: s_add_i32 s42, s42, 3 ; SI-NEXT: v_writelane_b32 v21, s46, 24 ; SI-NEXT: v_writelane_b32 v21, s47, 25 -; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 22 ; SI-NEXT: v_writelane_b32 v21, s47, 23 -; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 20 ; SI-NEXT: v_writelane_b32 v21, s47, 21 -; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 8 -; SI-NEXT: s_add_i32 s29, s29, 3 -; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 8 +; SI-NEXT: s_add_i32 s45, s45, 3 +; SI-NEXT: s_add_i32 s44, s44, 3 ; SI-NEXT: v_writelane_b32 v21, s46, 18 ; SI-NEXT: v_writelane_b32 v21, s47, 19 -; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 16 ; SI-NEXT: v_writelane_b32 v21, s47, 17 -; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 14 ; SI-NEXT: v_writelane_b32 v21, s47, 15 -; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 8 -; SI-NEXT: s_add_i32 s27, s27, 3 -; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 8 +; SI-NEXT: s_add_i32 s29, s29, 3 +; SI-NEXT: s_add_i32 s28, s28, 3 ; SI-NEXT: v_writelane_b32 v21, s46, 12 ; SI-NEXT: v_writelane_b32 v21, s47, 13 -; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 10 ; SI-NEXT: v_writelane_b32 v21, s47, 11 -; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 8 ; SI-NEXT: v_writelane_b32 v21, s47, 9 -; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8 -; SI-NEXT: s_add_i32 s25, s25, 3 -; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 8 +; SI-NEXT: s_add_i32 s27, s27, 3 +; SI-NEXT: s_add_i32 s26, s26, 3 ; SI-NEXT: v_writelane_b32 v21, s46, 6 ; SI-NEXT: v_writelane_b32 v21, s47, 7 -; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24 ; SI-NEXT: v_writelane_b32 v21, s46, 4 ; SI-NEXT: v_writelane_b32 v21, s47, 5 -; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 16 ; SI-NEXT: v_writelane_b32 v21, s46, 2 ; SI-NEXT: v_writelane_b32 v21, s47, 3 -; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8 ; SI-NEXT: s_add_i32 s17, s17, 3 ; SI-NEXT: s_add_i32 s16, s16, 3 ; SI-NEXT: v_writelane_b32 v21, s46, 0 @@ -8469,8 +8325,12 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_add_i32 s20, s20, 3 ; SI-NEXT: s_add_i32 s23, s23, 3 ; SI-NEXT: s_add_i32 s22, s22, 3 -; SI-NEXT: s_lshr_b32 s47, s5, 24 -; SI-NEXT: s_lshr_b64 s[84:85], s[42:43], 24 +; SI-NEXT: s_add_i32 s25, s25, 3 +; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: s_lshr_b32 s47, s29, 8 +; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 24 +; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 8 ; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 24 ; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16 ; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 8 @@ -8481,62 +8341,62 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[30:31], s[18:19], 8 ; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 24 -; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 -; SI-NEXT: v_writelane_b32 v22, s47, 6 -; SI-NEXT: s_lshr_b32 s47, s5, 16 -; SI-NEXT: v_writelane_b32 v22, s47, 7 -; SI-NEXT: s_lshr_b32 s63, s5, 8 -; SI-NEXT: s_lshr_b32 s73, s7, 24 -; SI-NEXT: s_lshr_b32 s75, s7, 16 -; SI-NEXT: s_lshr_b32 s77, s7, 8 -; SI-NEXT: s_lshr_b32 s79, s9, 24 -; SI-NEXT: s_lshr_b32 s89, s9, 16 -; SI-NEXT: s_lshr_b32 s91, s9, 8 -; SI-NEXT: s_lshr_b32 s93, s11, 24 -; SI-NEXT: s_lshr_b32 s95, s11, 16 -; SI-NEXT: s_lshr_b32 s31, s11, 8 -; SI-NEXT: s_lshr_b32 s35, s13, 24 -; SI-NEXT: s_lshr_b32 s37, s13, 16 -; SI-NEXT: s_lshr_b32 s39, s13, 8 -; SI-NEXT: s_lshr_b32 s47, s15, 24 -; SI-NEXT: s_lshr_b32 s87, s15, 16 -; SI-NEXT: s_lshr_b32 s55, s15, 8 -; SI-NEXT: s_lshr_b32 s97, s41, 24 -; SI-NEXT: s_lshr_b32 s54, s41, 16 -; SI-NEXT: s_lshr_b32 s99, s41, 8 -; SI-NEXT: s_lshr_b32 s98, s43, 24 -; SI-NEXT: s_lshr_b32 s38, s43, 16 -; SI-NEXT: s_lshr_b32 s56, s43, 8 -; SI-NEXT: s_lshr_b32 s96, s45, 24 -; SI-NEXT: s_lshr_b32 s85, s45, 16 -; SI-NEXT: s_lshr_b32 s86, s45, 8 -; SI-NEXT: s_lshr_b32 s49, s29, 24 -; SI-NEXT: s_lshr_b32 s64, s29, 16 -; SI-NEXT: s_lshr_b32 s65, s29, 8 -; SI-NEXT: s_lshr_b32 s66, s27, 24 -; SI-NEXT: s_lshr_b32 s67, s27, 16 -; SI-NEXT: s_lshr_b32 s59, s27, 8 -; SI-NEXT: s_lshr_b32 s60, s25, 24 -; SI-NEXT: s_lshr_b32 s61, s25, 16 -; SI-NEXT: s_lshr_b32 s62, s25, 8 -; SI-NEXT: s_lshr_b32 s68, s23, 24 -; SI-NEXT: s_lshr_b32 s69, s23, 16 -; SI-NEXT: s_lshr_b32 s48, s23, 8 -; SI-NEXT: s_lshr_b32 s50, s21, 24 -; SI-NEXT: s_lshr_b32 s51, s21, 16 -; SI-NEXT: s_lshr_b32 s70, s21, 8 -; SI-NEXT: s_lshr_b32 s71, s19, 24 -; SI-NEXT: s_lshr_b32 s80, s19, 16 -; SI-NEXT: s_lshr_b32 s81, s19, 8 -; SI-NEXT: s_lshr_b32 s82, s17, 24 -; SI-NEXT: s_lshr_b32 s83, s17, 16 -; SI-NEXT: s_lshr_b32 s52, s17, 8 -; SI-NEXT: v_writelane_b32 v22, s47, 8 -; SI-NEXT: .LBB13_5: ; %end +; SI-NEXT: v_writelane_b32 v22, s47, 2 +; SI-NEXT: s_lshr_b32 s47, s27, 24 +; SI-NEXT: s_lshr_b64 s[56:57], s[16:17], 16 +; SI-NEXT: s_lshr_b32 s51, s5, 24 +; SI-NEXT: s_lshr_b32 s59, s5, 16 +; SI-NEXT: s_lshr_b32 s61, s5, 8 +; SI-NEXT: s_lshr_b32 s63, s7, 24 +; SI-NEXT: s_lshr_b32 s73, s7, 16 +; SI-NEXT: s_lshr_b32 s75, s7, 8 +; SI-NEXT: s_lshr_b32 s77, s9, 24 +; SI-NEXT: s_lshr_b32 s79, s9, 16 +; SI-NEXT: s_lshr_b32 s89, s9, 8 +; SI-NEXT: s_lshr_b32 s91, s11, 24 +; SI-NEXT: s_lshr_b32 s93, s11, 16 +; SI-NEXT: s_lshr_b32 s95, s11, 8 +; SI-NEXT: s_lshr_b32 s31, s13, 24 +; SI-NEXT: s_lshr_b32 s35, s13, 16 +; SI-NEXT: s_lshr_b32 s37, s13, 8 +; SI-NEXT: s_lshr_b32 s39, s15, 24 +; SI-NEXT: s_lshr_b32 s38, s15, 16 +; SI-NEXT: s_lshr_b32 s83, s15, 8 +; SI-NEXT: s_lshr_b32 s82, s41, 24 +; SI-NEXT: s_lshr_b32 s85, s41, 16 +; SI-NEXT: s_lshr_b32 s84, s41, 8 +; SI-NEXT: s_lshr_b32 s87, s43, 24 +; SI-NEXT: s_lshr_b32 s86, s43, 16 +; SI-NEXT: s_lshr_b32 s97, s43, 8 +; SI-NEXT: s_lshr_b32 s50, s45, 24 +; SI-NEXT: s_lshr_b32 s96, s45, 16 +; SI-NEXT: s_lshr_b32 s99, s45, 8 +; SI-NEXT: s_lshr_b32 s98, s29, 24 +; SI-NEXT: s_lshr_b32 s36, s29, 16 +; SI-NEXT: v_writelane_b32 v22, s47, 3 +; SI-NEXT: s_lshr_b32 s47, s27, 16 +; SI-NEXT: s_lshr_b32 s48, s27, 8 +; SI-NEXT: s_lshr_b32 s81, s25, 24 +; SI-NEXT: s_lshr_b32 s55, s25, 16 +; SI-NEXT: s_lshr_b32 s64, s25, 8 +; SI-NEXT: s_lshr_b32 s65, s23, 24 +; SI-NEXT: s_lshr_b32 s66, s23, 16 +; SI-NEXT: s_lshr_b32 s67, s23, 8 +; SI-NEXT: s_lshr_b32 s68, s21, 24 +; SI-NEXT: s_lshr_b32 s69, s21, 16 +; SI-NEXT: s_lshr_b32 s49, s21, 8 +; SI-NEXT: s_lshr_b32 s52, s19, 24 +; SI-NEXT: s_lshr_b32 s53, s19, 16 +; SI-NEXT: s_lshr_b32 s70, s19, 8 +; SI-NEXT: s_lshr_b32 s71, s17, 24 +; SI-NEXT: s_lshr_b32 s54, s17, 16 +; SI-NEXT: s_lshr_b32 s80, s17, 8 +; SI-NEXT: v_writelane_b32 v22, s47, 4 +; SI-NEXT: .LBB13_3: ; %end ; SI-NEXT: s_and_b32 s16, s16, 0xff ; SI-NEXT: s_lshl_b32 s47, s46, 8 ; SI-NEXT: s_or_b32 s16, s16, s47 -; SI-NEXT: s_and_b32 s47, s36, 0xff +; SI-NEXT: s_and_b32 s47, s56, 0xff ; SI-NEXT: s_lshl_b32 s47, s47, 16 ; SI-NEXT: s_lshl_b32 s57, s34, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff @@ -8544,11 +8404,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_or_b32 s16, s16, s47 ; SI-NEXT: v_mov_b32_e32 v1, s16 ; SI-NEXT: s_and_b32 s16, s17, 0xff -; SI-NEXT: s_lshl_b32 s17, s52, 8 +; SI-NEXT: s_lshl_b32 s17, s80, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s83, 0xff +; SI-NEXT: s_and_b32 s17, s54, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s47, s82, 24 +; SI-NEXT: s_lshl_b32 s47, s71, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s47, s17 ; SI-NEXT: s_or_b32 s16, s16, s17 @@ -8569,11 +8429,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s19, 0xff -; SI-NEXT: s_lshl_b32 s17, s81, 8 +; SI-NEXT: s_lshl_b32 s17, s70, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s80, 0xff +; SI-NEXT: s_and_b32 s17, s53, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s71, 24 +; SI-NEXT: s_lshl_b32 s18, s52, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0 @@ -8595,11 +8455,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s21, 0xff -; SI-NEXT: s_lshl_b32 s17, s70, 8 +; SI-NEXT: s_lshl_b32 s17, s49, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s51, 0xff +; SI-NEXT: s_and_b32 s17, s69, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s50, 24 +; SI-NEXT: s_lshl_b32 s18, s68, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0 @@ -8621,29 +8481,24 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s23, 0xff -; SI-NEXT: s_lshl_b32 s17, s48, 8 +; SI-NEXT: s_lshl_b32 s17, s67, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s69, 0xff +; SI-NEXT: s_and_b32 s17, s66, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s68, 24 -; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 0 +; SI-NEXT: s_lshl_b32 s18, s65, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 1 +; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 2 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s24, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 3 +; SI-NEXT: s_lshl_b32 s17, s62, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 4 +; SI-NEXT: s_and_b32 s17, s60, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s18, 24 +; SI-NEXT: s_lshl_b32 s18, s58, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0 @@ -8652,28 +8507,27 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s25, 0xff -; SI-NEXT: s_lshl_b32 s17, s62, 8 +; SI-NEXT: s_lshl_b32 s17, s64, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s61, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 5 +; SI-NEXT: s_and_b32 s17, s55, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s60, 24 +; SI-NEXT: s_lshl_b32 s18, s81, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 6 +; SI-NEXT: v_readlane_b32 s18, v21, 0 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 7 +; SI-NEXT: v_readlane_b32 s19, v21, 1 ; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 8 +; SI-NEXT: v_readlane_b32 s18, v21, 2 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s26, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 9 +; SI-NEXT: v_readlane_b32 s19, v21, 3 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 10 +; SI-NEXT: v_readlane_b32 s18, v21, 4 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff @@ -8684,60 +8538,63 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s27, 0xff -; SI-NEXT: s_lshl_b32 s17, s59, 8 +; SI-NEXT: s_lshl_b32 s17, s48, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s67, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 11 +; SI-NEXT: v_readlane_b32 s17, v22, 4 +; SI-NEXT: s_and_b32 s17, s17, 0xff +; SI-NEXT: v_readlane_b32 s18, v22, 3 +; SI-NEXT: v_readlane_b32 s19, v21, 5 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s66, 24 +; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 12 +; SI-NEXT: v_readlane_b32 s18, v21, 6 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 13 +; SI-NEXT: v_readlane_b32 s19, v21, 7 ; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 14 +; SI-NEXT: v_readlane_b32 s18, v21, 8 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s28, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 15 +; SI-NEXT: v_readlane_b32 s19, v21, 9 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 16 +; SI-NEXT: v_readlane_b32 s18, v21, 10 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 44, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: v_readlane_b32 s17, v22, 2 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s29, 0xff -; SI-NEXT: s_lshl_b32 s17, s65, 8 +; SI-NEXT: s_lshl_b32 s17, s17, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s64, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 17 +; SI-NEXT: s_and_b32 s17, s36, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 11 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s49, 24 +; SI-NEXT: s_lshl_b32 s18, s98, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 18 +; SI-NEXT: v_readlane_b32 s18, v21, 12 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 19 +; SI-NEXT: v_readlane_b32 s19, v21, 13 ; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 20 +; SI-NEXT: v_readlane_b32 s18, v21, 14 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s44, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 21 +; SI-NEXT: v_readlane_b32 s19, v21, 15 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 22 +; SI-NEXT: v_readlane_b32 s18, v21, 16 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff @@ -8748,28 +8605,30 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s45, 0xff -; SI-NEXT: s_lshl_b32 s17, s86, 8 +; SI-NEXT: s_lshl_b32 s17, s99, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s85, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 23 +; SI-NEXT: s_and_b32 s17, s96, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 17 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s96, 24 -; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s18, s50, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 24 +; SI-NEXT: v_readlane_b32 s18, v21, 18 +; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: v_readlane_b32 s19, v21, 19 ; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s19, v21, 25 +; SI-NEXT: s_lshl_b32 s17, s18, 8 +; SI-NEXT: v_readlane_b32 s18, v21, 20 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s42, 0xff -; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 26 +; SI-NEXT: v_readlane_b32 s19, v21, 21 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff +; SI-NEXT: v_readlane_b32 s18, v21, 22 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s84, 24 +; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 60, v0 @@ -8778,28 +8637,28 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s43, 0xff -; SI-NEXT: s_lshl_b32 s17, s56, 8 +; SI-NEXT: s_lshl_b32 s17, s97, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s38, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 27 +; SI-NEXT: s_and_b32 s17, s86, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 23 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s98, 24 +; SI-NEXT: s_lshl_b32 s18, s87, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 28 +; SI-NEXT: v_readlane_b32 s18, v21, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 29 +; SI-NEXT: v_readlane_b32 s19, v21, 25 ; SI-NEXT: v_add_i32_e32 v1, vcc, 64, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 30 +; SI-NEXT: v_readlane_b32 s18, v21, 26 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s40, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 31 +; SI-NEXT: v_readlane_b32 s19, v21, 27 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 32 +; SI-NEXT: v_readlane_b32 s18, v21, 28 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff @@ -8810,11 +8669,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s41, 0xff -; SI-NEXT: s_lshl_b32 s17, s99, 8 +; SI-NEXT: s_lshl_b32 s17, s84, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s54, 0xff +; SI-NEXT: s_and_b32 s17, s85, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s97, 24 +; SI-NEXT: s_lshl_b32 s18, s82, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x48, v0 @@ -8822,16 +8681,16 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: v_readlane_b32 s16, v21, 34 +; SI-NEXT: v_readlane_b32 s16, v21, 30 ; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: v_readlane_b32 s17, v21, 35 +; SI-NEXT: v_readlane_b32 s17, v21, 31 ; SI-NEXT: s_lshl_b32 s16, s16, 8 -; SI-NEXT: v_readlane_b32 s19, v21, 33 +; SI-NEXT: v_readlane_b32 s19, v21, 29 ; SI-NEXT: s_or_b32 s14, s14, s16 -; SI-NEXT: v_readlane_b32 s16, v21, 36 -; SI-NEXT: v_readlane_b32 s17, v21, 37 +; SI-NEXT: v_readlane_b32 s16, v21, 32 +; SI-NEXT: v_readlane_b32 s17, v21, 33 ; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 38 +; SI-NEXT: v_readlane_b32 s18, v21, 34 ; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: s_lshl_b32 s17, s18, 24 ; SI-NEXT: s_and_b32 s14, s14, 0xffff @@ -8842,12 +8701,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s14 ; SI-NEXT: s_and_b32 s14, s15, 0xff -; SI-NEXT: s_lshl_b32 s15, s55, 8 +; SI-NEXT: s_lshl_b32 s15, s83, 8 ; SI-NEXT: s_or_b32 s14, s14, s15 -; SI-NEXT: s_and_b32 s15, s87, 0xff -; SI-NEXT: v_readlane_b32 s16, v22, 8 +; SI-NEXT: s_and_b32 s15, s38, 0xff ; SI-NEXT: s_lshl_b32 s15, s15, 16 -; SI-NEXT: s_lshl_b32 s16, s16, 24 +; SI-NEXT: s_lshl_b32 s16, s39, 24 ; SI-NEXT: s_and_b32 s14, s14, 0xffff ; SI-NEXT: s_or_b32 s15, s16, s15 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x50, v0 @@ -8855,15 +8713,15 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s14 -; SI-NEXT: v_readlane_b32 s14, v21, 40 +; SI-NEXT: v_readlane_b32 s14, v21, 36 ; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s15, v21, 41 +; SI-NEXT: v_readlane_b32 s15, v21, 37 ; SI-NEXT: s_lshl_b32 s14, s14, 8 ; SI-NEXT: s_or_b32 s12, s12, s14 -; SI-NEXT: v_readlane_b32 s14, v21, 42 -; SI-NEXT: v_readlane_b32 s15, v21, 43 +; SI-NEXT: v_readlane_b32 s14, v21, 38 +; SI-NEXT: v_readlane_b32 s15, v21, 39 ; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: v_readlane_b32 s16, v21, 44 +; SI-NEXT: v_readlane_b32 s16, v21, 40 ; SI-NEXT: s_lshl_b32 s14, s14, 16 ; SI-NEXT: s_lshl_b32 s15, s16, 24 ; SI-NEXT: s_and_b32 s12, s12, 0xffff @@ -8874,11 +8732,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s12 ; SI-NEXT: s_and_b32 s12, s13, 0xff -; SI-NEXT: s_lshl_b32 s13, s39, 8 +; SI-NEXT: s_lshl_b32 s13, s37, 8 ; SI-NEXT: s_or_b32 s12, s12, s13 -; SI-NEXT: s_and_b32 s13, s37, 0xff +; SI-NEXT: s_and_b32 s13, s35, 0xff ; SI-NEXT: s_lshl_b32 s13, s13, 16 -; SI-NEXT: s_lshl_b32 s14, s35, 24 +; SI-NEXT: s_lshl_b32 s14, s31, 24 ; SI-NEXT: s_and_b32 s12, s12, 0xffff ; SI-NEXT: s_or_b32 s13, s14, s13 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x58, v0 @@ -8886,15 +8744,15 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s12 -; SI-NEXT: v_readlane_b32 s12, v21, 46 +; SI-NEXT: v_readlane_b32 s12, v21, 42 ; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s13, v21, 47 +; SI-NEXT: v_readlane_b32 s13, v21, 43 ; SI-NEXT: s_lshl_b32 s12, s12, 8 ; SI-NEXT: s_or_b32 s10, s10, s12 -; SI-NEXT: v_readlane_b32 s12, v21, 48 -; SI-NEXT: v_readlane_b32 s13, v21, 49 +; SI-NEXT: v_readlane_b32 s12, v21, 44 +; SI-NEXT: v_readlane_b32 s13, v21, 45 ; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s14, v21, 50 +; SI-NEXT: v_readlane_b32 s14, v21, 46 ; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_lshl_b32 s13, s14, 24 ; SI-NEXT: s_and_b32 s10, s10, 0xffff @@ -8905,11 +8763,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s10 ; SI-NEXT: s_and_b32 s10, s11, 0xff -; SI-NEXT: s_lshl_b32 s11, s31, 8 +; SI-NEXT: s_lshl_b32 s11, s95, 8 ; SI-NEXT: s_or_b32 s10, s10, s11 -; SI-NEXT: s_and_b32 s11, s95, 0xff +; SI-NEXT: s_and_b32 s11, s93, 0xff ; SI-NEXT: s_lshl_b32 s11, s11, 16 -; SI-NEXT: s_lshl_b32 s12, s93, 24 +; SI-NEXT: s_lshl_b32 s12, s91, 24 ; SI-NEXT: s_and_b32 s10, s10, 0xffff ; SI-NEXT: s_or_b32 s11, s12, s11 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x60, v0 @@ -8917,15 +8775,15 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s10 -; SI-NEXT: v_readlane_b32 s10, v21, 52 +; SI-NEXT: v_readlane_b32 s10, v21, 48 ; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s11, v21, 53 +; SI-NEXT: v_readlane_b32 s11, v21, 49 ; SI-NEXT: s_lshl_b32 s10, s10, 8 ; SI-NEXT: s_or_b32 s8, s8, s10 -; SI-NEXT: v_readlane_b32 s10, v21, 54 -; SI-NEXT: v_readlane_b32 s11, v21, 55 +; SI-NEXT: v_readlane_b32 s10, v21, 50 +; SI-NEXT: v_readlane_b32 s11, v21, 51 ; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s12, v21, 56 +; SI-NEXT: v_readlane_b32 s12, v21, 52 ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_lshl_b32 s11, s12, 24 ; SI-NEXT: s_and_b32 s8, s8, 0xffff @@ -8936,11 +8794,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s8 ; SI-NEXT: s_and_b32 s8, s9, 0xff -; SI-NEXT: s_lshl_b32 s9, s91, 8 +; SI-NEXT: s_lshl_b32 s9, s89, 8 ; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s89, 0xff +; SI-NEXT: s_and_b32 s9, s79, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s10, s79, 24 +; SI-NEXT: s_lshl_b32 s10, s77, 24 ; SI-NEXT: s_and_b32 s8, s8, 0xffff ; SI-NEXT: s_or_b32 s9, s10, s9 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x68, v0 @@ -8948,15 +8806,15 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s8 -; SI-NEXT: v_readlane_b32 s8, v21, 58 +; SI-NEXT: v_readlane_b32 s8, v21, 54 ; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: v_readlane_b32 s9, v21, 59 +; SI-NEXT: v_readlane_b32 s9, v21, 55 ; SI-NEXT: s_lshl_b32 s8, s8, 8 ; SI-NEXT: s_or_b32 s6, s6, s8 -; SI-NEXT: v_readlane_b32 s8, v21, 60 -; SI-NEXT: v_readlane_b32 s9, v21, 61 +; SI-NEXT: v_readlane_b32 s8, v21, 56 +; SI-NEXT: v_readlane_b32 s9, v21, 57 ; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s10, v21, 62 +; SI-NEXT: v_readlane_b32 s10, v21, 58 ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_lshl_b32 s9, s10, 24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff @@ -8967,11 +8825,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s6 ; SI-NEXT: s_and_b32 s6, s7, 0xff -; SI-NEXT: s_lshl_b32 s7, s77, 8 +; SI-NEXT: s_lshl_b32 s7, s75, 8 ; SI-NEXT: s_or_b32 s6, s6, s7 -; SI-NEXT: s_and_b32 s7, s75, 0xff +; SI-NEXT: s_and_b32 s7, s73, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_lshl_b32 s8, s73, 24 +; SI-NEXT: s_lshl_b32 s8, s63, 24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff ; SI-NEXT: s_or_b32 s7, s8, s7 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x70, v0 @@ -8979,15 +8837,15 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s6 -; SI-NEXT: v_readlane_b32 s6, v22, 0 +; SI-NEXT: v_readlane_b32 s6, v21, 60 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: v_readlane_b32 s7, v22, 1 +; SI-NEXT: v_readlane_b32 s7, v21, 61 ; SI-NEXT: s_lshl_b32 s6, s6, 8 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: v_readlane_b32 s6, v22, 4 -; SI-NEXT: v_readlane_b32 s7, v22, 5 +; SI-NEXT: v_readlane_b32 s6, v21, 62 +; SI-NEXT: v_readlane_b32 s7, v21, 63 ; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: v_readlane_b32 s8, v22, 2 +; SI-NEXT: v_readlane_b32 s8, v22, 0 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s7, s8, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff @@ -8998,13 +8856,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s4 ; SI-NEXT: s_and_b32 s4, s5, 0xff -; SI-NEXT: s_lshl_b32 s5, s63, 8 +; SI-NEXT: s_lshl_b32 s5, s61, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_readlane_b32 s5, v22, 7 -; SI-NEXT: s_and_b32 s5, s5, 0xff -; SI-NEXT: v_readlane_b32 s6, v22, 6 +; SI-NEXT: s_and_b32 s5, s59, 0xff ; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s6, s6, 24 +; SI-NEXT: s_lshl_b32 s6, s51, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s6, s5 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x78, v0 @@ -9013,12 +8869,12 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0 ; SI-NEXT: v_mov_b32_e32 v1, s4 ; SI-NEXT: v_readlane_b32 s30, v20, 34 -; SI-NEXT: v_readlane_b32 s19, v21, 39 -; SI-NEXT: v_readlane_b32 s17, v21, 45 -; SI-NEXT: v_readlane_b32 s15, v21, 51 -; SI-NEXT: v_readlane_b32 s13, v21, 57 -; SI-NEXT: v_readlane_b32 s11, v21, 63 -; SI-NEXT: v_readlane_b32 s9, v22, 3 +; SI-NEXT: v_readlane_b32 s19, v21, 35 +; SI-NEXT: v_readlane_b32 s17, v21, 41 +; SI-NEXT: v_readlane_b32 s15, v21, 47 +; SI-NEXT: v_readlane_b32 s13, v21, 53 +; SI-NEXT: v_readlane_b32 s11, v21, 59 +; SI-NEXT: v_readlane_b32 s9, v22, 1 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; SI-NEXT: v_readlane_b32 s31, v20, 35 ; SI-NEXT: v_readlane_b32 s99, v20, 33 @@ -9062,46 +8918,215 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] +; SI-NEXT: .LBB13_4: +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr34 +; SI-NEXT: ; implicit-def: $sgpr80 +; SI-NEXT: ; implicit-def: $sgpr54 +; SI-NEXT: ; implicit-def: $sgpr71 +; SI-NEXT: ; implicit-def: $sgpr30 +; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr70 +; SI-NEXT: ; implicit-def: $sgpr53 +; SI-NEXT: ; implicit-def: $sgpr52 +; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr49 +; SI-NEXT: ; implicit-def: $sgpr69 +; SI-NEXT: ; implicit-def: $sgpr68 +; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr67 +; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr65 +; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr64 +; SI-NEXT: ; implicit-def: $sgpr55 +; SI-NEXT: ; implicit-def: $sgpr81 +; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; implicit-def: $sgpr36 +; SI-NEXT: ; implicit-def: $sgpr98 +; SI-NEXT: ; implicit-def: $sgpr99 +; SI-NEXT: ; implicit-def: $sgpr96 +; SI-NEXT: ; implicit-def: $sgpr50 +; SI-NEXT: ; implicit-def: $sgpr97 +; SI-NEXT: ; implicit-def: $sgpr86 +; SI-NEXT: ; implicit-def: $sgpr87 +; SI-NEXT: ; implicit-def: $sgpr84 +; SI-NEXT: ; implicit-def: $sgpr85 +; SI-NEXT: ; implicit-def: $sgpr82 +; SI-NEXT: ; implicit-def: $sgpr83 +; SI-NEXT: ; implicit-def: $sgpr38 +; SI-NEXT: ; implicit-def: $sgpr39 +; SI-NEXT: ; implicit-def: $sgpr37 +; SI-NEXT: ; implicit-def: $sgpr35 +; SI-NEXT: ; implicit-def: $sgpr31 +; SI-NEXT: ; implicit-def: $sgpr95 +; SI-NEXT: ; implicit-def: $sgpr93 +; SI-NEXT: ; implicit-def: $sgpr91 +; SI-NEXT: ; implicit-def: $sgpr89 +; SI-NEXT: ; implicit-def: $sgpr79 +; SI-NEXT: ; implicit-def: $sgpr77 +; SI-NEXT: ; implicit-def: $sgpr75 +; SI-NEXT: ; implicit-def: $sgpr73 +; SI-NEXT: ; implicit-def: $sgpr63 +; SI-NEXT: ; implicit-def: $sgpr61 +; SI-NEXT: ; implicit-def: $sgpr59 +; SI-NEXT: ; implicit-def: $sgpr51 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 0 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 1 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 2 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 3 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 4 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 5 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 6 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 7 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 8 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 9 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 10 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 11 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 12 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 13 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 14 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 15 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 16 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 17 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 18 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 19 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 20 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 21 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 22 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 23 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 24 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 25 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 26 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 27 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 28 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 29 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 30 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 31 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 32 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 33 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 34 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 35 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 36 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 37 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 38 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 39 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 40 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 41 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 42 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 43 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 44 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 45 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 46 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 47 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 48 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 49 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 50 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 51 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 52 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 53 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 54 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 55 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 56 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 57 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 58 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 59 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 60 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 61 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 62 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 63 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 0 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 1 +; SI-NEXT: s_branch .LBB13_2 ; ; VI-LABEL: bitcast_v32i32_to_v128i8_scalar: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v32, s34, 0 -; VI-NEXT: v_writelane_b32 v32, s35, 1 -; VI-NEXT: v_writelane_b32 v32, s36, 2 -; VI-NEXT: v_writelane_b32 v32, s37, 3 -; VI-NEXT: v_writelane_b32 v32, s38, 4 -; VI-NEXT: v_writelane_b32 v32, s39, 5 -; VI-NEXT: v_writelane_b32 v32, s48, 6 -; VI-NEXT: v_writelane_b32 v32, s49, 7 -; VI-NEXT: v_writelane_b32 v32, s50, 8 -; VI-NEXT: v_writelane_b32 v32, s51, 9 -; VI-NEXT: v_writelane_b32 v32, s52, 10 -; VI-NEXT: v_writelane_b32 v32, s53, 11 -; VI-NEXT: v_writelane_b32 v32, s54, 12 -; VI-NEXT: v_writelane_b32 v32, s55, 13 -; VI-NEXT: v_writelane_b32 v32, s64, 14 -; VI-NEXT: v_writelane_b32 v32, s65, 15 -; VI-NEXT: v_writelane_b32 v32, s66, 16 -; VI-NEXT: v_writelane_b32 v32, s67, 17 -; VI-NEXT: v_writelane_b32 v32, s68, 18 -; VI-NEXT: v_writelane_b32 v32, s69, 19 -; VI-NEXT: v_writelane_b32 v32, s70, 20 -; VI-NEXT: v_writelane_b32 v32, s71, 21 -; VI-NEXT: v_writelane_b32 v32, s80, 22 -; VI-NEXT: v_writelane_b32 v32, s81, 23 -; VI-NEXT: v_writelane_b32 v32, s82, 24 -; VI-NEXT: v_writelane_b32 v32, s83, 25 -; VI-NEXT: v_writelane_b32 v32, s84, 26 -; VI-NEXT: v_writelane_b32 v32, s85, 27 -; VI-NEXT: v_writelane_b32 v32, s86, 28 -; VI-NEXT: v_writelane_b32 v32, s87, 29 -; VI-NEXT: v_writelane_b32 v32, s30, 30 -; VI-NEXT: v_writelane_b32 v32, s31, 31 +; VI-NEXT: v_writelane_b32 v28, s34, 0 +; VI-NEXT: v_writelane_b32 v28, s35, 1 +; VI-NEXT: v_writelane_b32 v28, s36, 2 +; VI-NEXT: v_writelane_b32 v28, s37, 3 +; VI-NEXT: v_writelane_b32 v28, s38, 4 +; VI-NEXT: v_writelane_b32 v28, s39, 5 +; VI-NEXT: v_writelane_b32 v28, s48, 6 +; VI-NEXT: v_writelane_b32 v28, s49, 7 +; VI-NEXT: v_writelane_b32 v28, s50, 8 +; VI-NEXT: v_writelane_b32 v28, s51, 9 +; VI-NEXT: v_writelane_b32 v28, s52, 10 +; VI-NEXT: v_writelane_b32 v28, s53, 11 +; VI-NEXT: v_writelane_b32 v28, s54, 12 +; VI-NEXT: v_writelane_b32 v28, s55, 13 +; VI-NEXT: v_writelane_b32 v28, s64, 14 +; VI-NEXT: v_writelane_b32 v28, s65, 15 +; VI-NEXT: v_writelane_b32 v28, s66, 16 +; VI-NEXT: v_writelane_b32 v28, s67, 17 +; VI-NEXT: v_writelane_b32 v28, s68, 18 +; VI-NEXT: v_writelane_b32 v28, s69, 19 +; VI-NEXT: v_writelane_b32 v28, s70, 20 +; VI-NEXT: v_writelane_b32 v28, s71, 21 +; VI-NEXT: v_writelane_b32 v28, s80, 22 +; VI-NEXT: v_writelane_b32 v28, s81, 23 +; VI-NEXT: v_writelane_b32 v28, s82, 24 +; VI-NEXT: v_writelane_b32 v28, s83, 25 +; VI-NEXT: v_writelane_b32 v28, s84, 26 +; VI-NEXT: v_writelane_b32 v28, s85, 27 +; VI-NEXT: v_writelane_b32 v28, s86, 28 +; VI-NEXT: v_writelane_b32 v28, s87, 29 +; VI-NEXT: v_writelane_b32 v28, s30, 30 +; VI-NEXT: v_writelane_b32 v28, s31, 31 ; VI-NEXT: v_readfirstlane_b32 s44, v19 ; VI-NEXT: v_readfirstlane_b32 s5, v18 ; VI-NEXT: v_readfirstlane_b32 s4, v17 @@ -9122,904 +9147,907 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; VI-NEXT: v_readfirstlane_b32 s45, v2 ; VI-NEXT: s_cmp_lg_u32 s44, 0 ; VI-NEXT: v_readfirstlane_b32 s44, v1 -; VI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane -; VI-NEXT: s_cbranch_scc0 .LBB13_4 +; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane +; VI-NEXT: s_cbranch_scc0 .LBB13_2 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_lshr_b32 s46, s5, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 2 +; VI-NEXT: v_writelane_b32 v29, s46, 29 ; VI-NEXT: s_lshr_b32 s46, s5, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 3 +; VI-NEXT: v_writelane_b32 v29, s46, 30 ; VI-NEXT: s_lshr_b32 s46, s5, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 4 +; VI-NEXT: v_writelane_b32 v29, s46, 31 ; VI-NEXT: s_lshr_b32 s46, s4, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 5 -; VI-NEXT: s_lshr_b32 s46, s4, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 6 -; VI-NEXT: s_lshr_b32 s46, s7, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 7 -; VI-NEXT: s_lshr_b32 s46, s7, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 8 -; VI-NEXT: s_lshr_b32 s46, s7, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 9 -; VI-NEXT: s_lshr_b32 s46, s6, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 10 -; VI-NEXT: s_lshr_b32 s46, s6, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 11 -; VI-NEXT: s_lshr_b32 s46, s9, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 12 -; VI-NEXT: s_lshr_b32 s46, s9, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 13 -; VI-NEXT: s_lshr_b32 s46, s9, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 14 +; VI-NEXT: v_writelane_b32 v29, s46, 32 ; VI-NEXT: s_lshr_b32 s46, s8, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 15 -; VI-NEXT: s_lshr_b32 s46, s8, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 16 -; VI-NEXT: s_lshr_b32 s46, s11, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 17 -; VI-NEXT: s_lshr_b32 s46, s11, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 18 +; VI-NEXT: v_writelane_b32 v29, s46, 28 +; VI-NEXT: s_lshr_b32 s47, s12, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 33 +; VI-NEXT: s_lshr_b32 s89, s25, 8 +; VI-NEXT: v_writelane_b32 v29, s89, 34 +; VI-NEXT: s_lshr_b32 s89, s24, 16 +; VI-NEXT: v_writelane_b32 v29, s89, 35 +; VI-NEXT: s_lshr_b32 s89, s24, 8 +; VI-NEXT: v_writelane_b32 v29, s89, 36 +; VI-NEXT: s_lshr_b32 s89, s23, 24 +; VI-NEXT: v_writelane_b32 v29, s89, 37 +; VI-NEXT: s_lshr_b32 s89, s23, 16 +; VI-NEXT: v_writelane_b32 v29, s89, 38 +; VI-NEXT: s_lshr_b32 s89, s23, 8 +; VI-NEXT: v_writelane_b32 v29, s89, 39 +; VI-NEXT: s_lshr_b32 s89, s22, 16 +; VI-NEXT: v_writelane_b32 v29, s89, 40 +; VI-NEXT: s_lshr_b32 s89, s22, 8 +; VI-NEXT: v_writelane_b32 v29, s89, 41 +; VI-NEXT: s_lshr_b32 s89, s21, 24 +; VI-NEXT: v_writelane_b32 v29, s89, 42 +; VI-NEXT: s_lshr_b32 s89, s21, 16 +; VI-NEXT: v_writelane_b32 v29, s89, 43 +; VI-NEXT: s_lshr_b32 s89, s21, 8 +; VI-NEXT: v_writelane_b32 v29, s89, 44 +; VI-NEXT: s_lshr_b32 s89, s20, 16 +; VI-NEXT: v_writelane_b32 v29, s89, 45 +; VI-NEXT: s_lshr_b32 s89, s20, 8 +; VI-NEXT: v_writelane_b32 v29, s89, 46 +; VI-NEXT: s_lshr_b32 s89, s19, 24 +; VI-NEXT: v_writelane_b32 v29, s89, 47 +; VI-NEXT: s_lshr_b32 s89, s19, 16 +; VI-NEXT: v_writelane_b32 v29, s89, 48 +; VI-NEXT: s_lshr_b32 s89, s19, 8 +; VI-NEXT: v_writelane_b32 v29, s89, 49 +; VI-NEXT: s_lshr_b32 s89, s18, 16 +; VI-NEXT: v_writelane_b32 v29, s89, 50 +; VI-NEXT: s_lshr_b32 s89, s18, 8 +; VI-NEXT: v_writelane_b32 v29, s89, 51 +; VI-NEXT: s_lshr_b32 s89, s17, 24 +; VI-NEXT: v_writelane_b32 v29, s89, 52 +; VI-NEXT: s_lshr_b32 s89, s17, 16 +; VI-NEXT: v_writelane_b32 v29, s89, 53 +; VI-NEXT: s_lshr_b32 s89, s17, 8 +; VI-NEXT: v_writelane_b32 v29, s89, 54 +; VI-NEXT: s_lshr_b32 s89, s16, 16 +; VI-NEXT: v_writelane_b32 v29, s89, 55 +; VI-NEXT: s_lshr_b32 s89, s16, 8 +; VI-NEXT: v_writelane_b32 v29, s89, 56 +; VI-NEXT: s_lshr_b64 s[30:31], s[4:5], 24 +; VI-NEXT: v_writelane_b32 v29, s30, 26 +; VI-NEXT: v_writelane_b32 v29, s31, 27 +; VI-NEXT: s_lshr_b64 s[30:31], s[6:7], 24 +; VI-NEXT: v_writelane_b32 v29, s30, 24 +; VI-NEXT: v_writelane_b32 v29, s31, 25 +; VI-NEXT: s_lshr_b64 vcc, s[8:9], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 22 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 23 +; VI-NEXT: s_lshr_b64 vcc, s[10:11], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 20 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 21 +; VI-NEXT: s_lshr_b64 vcc, s[12:13], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 18 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 19 +; VI-NEXT: s_lshr_b64 vcc, s[14:15], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 17 +; VI-NEXT: s_lshr_b64 vcc, s[40:41], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 14 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 15 +; VI-NEXT: s_lshr_b64 vcc, s[42:43], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 12 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 13 +; VI-NEXT: s_lshr_b64 vcc, s[44:45], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 10 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 11 +; VI-NEXT: s_lshr_b64 vcc, s[28:29], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 9 +; VI-NEXT: s_lshr_b64 vcc, s[26:27], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 6 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 7 +; VI-NEXT: s_lshr_b64 vcc, s[24:25], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 4 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 5 +; VI-NEXT: s_lshr_b64 vcc, s[22:23], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 2 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 3 +; VI-NEXT: s_lshr_b64 vcc, s[20:21], 24 +; VI-NEXT: s_lshr_b32 s48, s7, 24 +; VI-NEXT: s_lshr_b32 s84, s7, 8 +; VI-NEXT: s_lshr_b32 s86, s9, 24 +; VI-NEXT: s_lshr_b32 s88, s9, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 0 +; VI-NEXT: s_lshr_b64 s[30:31], s[18:19], 24 +; VI-NEXT: s_lshr_b32 s38, s4, 8 +; VI-NEXT: s_lshr_b32 s49, s7, 16 +; VI-NEXT: s_lshr_b32 s85, s6, 16 +; VI-NEXT: s_lshr_b32 s57, s6, 8 +; VI-NEXT: s_lshr_b32 s87, s9, 16 +; VI-NEXT: s_lshr_b32 s56, s8, 8 +; VI-NEXT: s_lshr_b32 s83, s11, 24 +; VI-NEXT: s_lshr_b32 s50, s11, 16 ; VI-NEXT: s_lshr_b32 s46, s11, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 19 -; VI-NEXT: s_lshr_b32 s46, s10, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 20 -; VI-NEXT: s_lshr_b32 s46, s10, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 21 -; VI-NEXT: s_lshr_b32 s46, s13, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 22 -; VI-NEXT: s_lshr_b32 s46, s13, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 23 -; VI-NEXT: s_lshr_b32 s46, s13, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 24 -; VI-NEXT: s_lshr_b32 s46, s12, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 25 -; VI-NEXT: s_lshr_b32 s46, s12, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 26 -; VI-NEXT: s_lshr_b32 s46, s15, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 27 -; VI-NEXT: s_lshr_b32 s46, s15, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 28 -; VI-NEXT: s_lshr_b32 s46, s15, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 29 -; VI-NEXT: s_lshr_b32 s46, s14, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 30 -; VI-NEXT: s_lshr_b32 s46, s14, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 31 -; VI-NEXT: s_lshr_b32 s46, s41, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 32 -; VI-NEXT: s_lshr_b32 s46, s41, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 33 -; VI-NEXT: s_lshr_b32 s46, s41, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 34 -; VI-NEXT: s_lshr_b32 s46, s40, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 35 -; VI-NEXT: s_lshr_b32 s46, s40, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 36 -; VI-NEXT: s_lshr_b32 s46, s43, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 37 -; VI-NEXT: s_lshr_b32 s46, s43, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 38 -; VI-NEXT: s_lshr_b32 s46, s43, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 39 -; VI-NEXT: s_lshr_b32 s46, s42, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 40 -; VI-NEXT: s_lshr_b32 s46, s42, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 41 -; VI-NEXT: s_lshr_b32 s46, s45, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 42 -; VI-NEXT: s_lshr_b32 s46, s45, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 43 -; VI-NEXT: s_lshr_b32 s46, s45, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 44 -; VI-NEXT: s_lshr_b32 s46, s44, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 45 -; VI-NEXT: s_lshr_b32 s46, s44, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 46 -; VI-NEXT: s_lshr_b32 s46, s29, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 47 -; VI-NEXT: s_lshr_b32 s46, s29, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 48 -; VI-NEXT: s_lshr_b32 s46, s28, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 49 -; VI-NEXT: s_lshr_b32 s46, s27, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 50 -; VI-NEXT: s_lshr_b32 s46, s27, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 51 -; VI-NEXT: s_lshr_b32 s46, s26, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 52 -; VI-NEXT: s_lshr_b32 s46, s25, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 53 -; VI-NEXT: s_lshr_b32 s46, s25, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 54 -; VI-NEXT: s_lshr_b32 s46, s24, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 55 -; VI-NEXT: s_lshr_b32 s46, s22, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 56 -; VI-NEXT: s_lshr_b32 s46, s21, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 57 -; VI-NEXT: s_lshr_b64 s[56:57], s[4:5], 24 -; VI-NEXT: v_writelane_b32 v33, s56, 0 -; VI-NEXT: s_lshr_b32 s64, s29, 8 -; VI-NEXT: s_lshr_b32 s50, s28, 8 -; VI-NEXT: s_lshr_b32 s86, s27, 8 -; VI-NEXT: s_lshr_b32 s51, s26, 8 -; VI-NEXT: s_lshr_b32 s66, s25, 8 -; VI-NEXT: s_lshr_b32 s54, s24, 8 -; VI-NEXT: s_lshr_b32 s71, s23, 24 -; VI-NEXT: s_lshr_b32 s70, s23, 16 -; VI-NEXT: s_lshr_b32 s52, s23, 8 -; VI-NEXT: s_lshr_b32 s55, s22, 8 -; VI-NEXT: s_lshr_b32 s68, s21, 24 -; VI-NEXT: s_lshr_b32 s65, s21, 8 -; VI-NEXT: s_lshr_b32 s84, s20, 16 -; VI-NEXT: s_lshr_b32 s69, s20, 8 -; VI-NEXT: s_lshr_b32 s80, s19, 24 -; VI-NEXT: s_lshr_b32 s87, s19, 16 -; VI-NEXT: s_lshr_b32 s46, s19, 8 -; VI-NEXT: s_lshr_b32 s81, s18, 16 -; VI-NEXT: s_lshr_b32 s47, s18, 8 -; VI-NEXT: s_lshr_b32 s83, s17, 24 -; VI-NEXT: s_lshr_b32 s85, s17, 16 -; VI-NEXT: s_lshr_b32 s67, s17, 8 -; VI-NEXT: s_lshr_b32 s53, s16, 16 -; VI-NEXT: s_lshr_b32 s82, s16, 8 -; VI-NEXT: v_writelane_b32 v33, s57, 1 -; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; VI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; VI-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; VI-NEXT: s_lshr_b64 s[30:31], s[24:25], 24 -; VI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24 -; VI-NEXT: s_lshr_b64 s[36:37], s[20:21], 24 -; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24 -; VI-NEXT: s_lshr_b64 s[48:49], s[16:17], 24 -; VI-NEXT: s_cbranch_execnz .LBB13_3 -; VI-NEXT: .LBB13_2: ; %cmp.true +; VI-NEXT: s_lshr_b32 s90, s10, 16 +; VI-NEXT: s_lshr_b32 s91, s10, 8 +; VI-NEXT: s_lshr_b32 s51, s13, 24 +; VI-NEXT: s_lshr_b32 s58, s13, 16 +; VI-NEXT: s_lshr_b32 s59, s13, 8 +; VI-NEXT: s_lshr_b32 s34, s12, 16 +; VI-NEXT: s_lshr_b32 s35, s15, 24 +; VI-NEXT: s_lshr_b32 s36, s15, 16 +; VI-NEXT: s_lshr_b32 s37, s15, 8 +; VI-NEXT: s_lshr_b32 s60, s14, 16 +; VI-NEXT: s_lshr_b32 s39, s14, 8 +; VI-NEXT: s_lshr_b32 s52, s41, 24 +; VI-NEXT: s_lshr_b32 s61, s41, 16 +; VI-NEXT: s_lshr_b32 s53, s41, 8 +; VI-NEXT: s_lshr_b32 s62, s40, 16 +; VI-NEXT: s_lshr_b32 s55, s40, 8 +; VI-NEXT: s_lshr_b32 s69, s43, 24 +; VI-NEXT: s_lshr_b32 s63, s43, 16 +; VI-NEXT: s_lshr_b32 s54, s43, 8 +; VI-NEXT: s_lshr_b32 s73, s42, 16 +; VI-NEXT: s_lshr_b32 s72, s42, 8 +; VI-NEXT: s_lshr_b32 s66, s45, 24 +; VI-NEXT: s_lshr_b32 s68, s45, 16 +; VI-NEXT: s_lshr_b32 s65, s45, 8 +; VI-NEXT: s_lshr_b32 s75, s44, 16 +; VI-NEXT: s_lshr_b32 s74, s44, 8 +; VI-NEXT: s_lshr_b32 s67, s29, 24 +; VI-NEXT: s_lshr_b32 s76, s29, 16 +; VI-NEXT: s_lshr_b32 s82, s29, 8 +; VI-NEXT: s_lshr_b32 s71, s28, 16 +; VI-NEXT: s_lshr_b32 s77, s28, 8 +; VI-NEXT: s_lshr_b32 s70, s27, 24 +; VI-NEXT: s_lshr_b32 s78, s27, 16 +; VI-NEXT: s_lshr_b32 s81, s27, 8 +; VI-NEXT: s_lshr_b32 s80, s26, 16 +; VI-NEXT: s_lshr_b32 s79, s26, 8 +; VI-NEXT: s_lshr_b32 s47, s25, 24 +; VI-NEXT: s_lshr_b32 s64, s25, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 1 +; VI-NEXT: s_mov_b32 s31, s48 +; VI-NEXT: s_mov_b32 s48, s84 +; VI-NEXT: s_mov_b32 s84, s86 +; VI-NEXT: s_mov_b32 s86, s88 +; VI-NEXT: s_lshr_b64 s[88:89], s[16:17], 24 +; VI-NEXT: s_mov_b64 vcc, 0 +; VI-NEXT: s_branch .LBB13_3 +; VI-NEXT: .LBB13_2: +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; implicit-def: $sgpr89 +; VI-NEXT: ; kill: killed $sgpr89 +; VI-NEXT: ; implicit-def: $sgpr57 +; VI-NEXT: ; implicit-def: $sgpr88 +; VI-NEXT: ; implicit-def: $sgpr30 +; VI-NEXT: ; implicit-def: $sgpr64 +; VI-NEXT: ; implicit-def: $sgpr79 +; VI-NEXT: ; implicit-def: $sgpr80 +; VI-NEXT: ; implicit-def: $sgpr81 +; VI-NEXT: ; implicit-def: $sgpr78 +; VI-NEXT: ; implicit-def: $sgpr70 +; VI-NEXT: ; implicit-def: $sgpr77 +; VI-NEXT: ; implicit-def: $sgpr71 +; VI-NEXT: ; implicit-def: $sgpr82 +; VI-NEXT: ; implicit-def: $sgpr76 +; VI-NEXT: ; implicit-def: $sgpr67 +; VI-NEXT: ; implicit-def: $sgpr74 +; VI-NEXT: ; implicit-def: $sgpr75 +; VI-NEXT: ; implicit-def: $sgpr65 +; VI-NEXT: ; implicit-def: $sgpr68 +; VI-NEXT: ; implicit-def: $sgpr66 +; VI-NEXT: ; implicit-def: $sgpr72 +; VI-NEXT: ; implicit-def: $sgpr73 +; VI-NEXT: ; implicit-def: $sgpr54 +; VI-NEXT: ; implicit-def: $sgpr63 +; VI-NEXT: ; implicit-def: $sgpr69 +; VI-NEXT: ; implicit-def: $sgpr55 +; VI-NEXT: ; implicit-def: $sgpr62 +; VI-NEXT: ; implicit-def: $sgpr53 +; VI-NEXT: ; implicit-def: $sgpr61 +; VI-NEXT: ; implicit-def: $sgpr52 +; VI-NEXT: ; implicit-def: $sgpr39 +; VI-NEXT: ; implicit-def: $sgpr60 +; VI-NEXT: ; implicit-def: $sgpr37 +; VI-NEXT: ; implicit-def: $sgpr36 +; VI-NEXT: ; implicit-def: $sgpr35 +; VI-NEXT: ; implicit-def: $sgpr34 +; VI-NEXT: ; implicit-def: $sgpr59 +; VI-NEXT: ; implicit-def: $sgpr58 +; VI-NEXT: ; implicit-def: $sgpr51 +; VI-NEXT: ; implicit-def: $sgpr91 +; VI-NEXT: ; implicit-def: $sgpr90 +; VI-NEXT: ; implicit-def: $sgpr50 +; VI-NEXT: ; implicit-def: $sgpr83 +; VI-NEXT: ; implicit-def: $sgpr56 +; VI-NEXT: ; kill: killed $sgpr57 +; VI-NEXT: ; implicit-def: $sgpr86 +; VI-NEXT: ; implicit-def: $sgpr87 +; VI-NEXT: ; implicit-def: $sgpr84 +; VI-NEXT: ; implicit-def: $sgpr85 +; VI-NEXT: ; implicit-def: $sgpr48 +; VI-NEXT: ; implicit-def: $sgpr49 +; VI-NEXT: ; implicit-def: $sgpr31 +; VI-NEXT: ; implicit-def: $sgpr38 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr89 +; VI-NEXT: ; kill: killed $sgpr89 +; VI-NEXT: ; implicit-def: $sgpr57 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr89 +; VI-NEXT: ; kill: killed $sgpr89 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr89 +; VI-NEXT: ; kill: killed $sgpr89 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 0 +; VI-NEXT: v_writelane_b32 v29, s47, 1 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 2 +; VI-NEXT: v_writelane_b32 v29, s47, 3 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 4 +; VI-NEXT: v_writelane_b32 v29, s47, 5 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 6 +; VI-NEXT: v_writelane_b32 v29, s47, 7 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 9 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 10 +; VI-NEXT: v_writelane_b32 v29, s47, 11 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 12 +; VI-NEXT: v_writelane_b32 v29, s47, 13 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 14 +; VI-NEXT: v_writelane_b32 v29, s47, 15 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 17 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 18 +; VI-NEXT: v_writelane_b32 v29, s47, 19 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 20 +; VI-NEXT: v_writelane_b32 v29, s47, 21 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 22 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 23 +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 24 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 25 +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 26 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 27 +; VI-NEXT: s_mov_b64 vcc, -1 +; VI-NEXT: .LBB13_3: ; %Flow +; VI-NEXT: s_andn2_b64 vcc, exec, vcc +; VI-NEXT: v_readlane_b32 s89, v29, 28 +; VI-NEXT: s_cbranch_vccnz .LBB13_5 +; VI-NEXT: ; %bb.4: ; %cmp.true ; VI-NEXT: s_add_i32 s5, s5, 3 -; VI-NEXT: s_lshr_b32 s46, s5, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 2 -; VI-NEXT: s_lshr_b32 s46, s5, 16 ; VI-NEXT: s_add_i32 s4, s4, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 3 -; VI-NEXT: s_lshr_b32 s46, s5, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 4 -; VI-NEXT: s_lshr_b32 s46, s4, 16 +; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 ; VI-NEXT: s_add_i32 s7, s7, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 5 -; VI-NEXT: s_lshr_b32 s46, s4, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 6 -; VI-NEXT: s_lshr_b32 s46, s7, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 7 -; VI-NEXT: s_lshr_b32 s46, s7, 16 ; VI-NEXT: s_add_i32 s6, s6, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 8 -; VI-NEXT: s_lshr_b32 s46, s7, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 9 -; VI-NEXT: s_lshr_b32 s46, s6, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 26 +; VI-NEXT: v_writelane_b32 v29, s47, 27 +; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 ; VI-NEXT: s_add_i32 s9, s9, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 10 -; VI-NEXT: s_lshr_b32 s46, s6, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 11 -; VI-NEXT: s_lshr_b32 s46, s9, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 12 -; VI-NEXT: s_lshr_b32 s46, s9, 16 ; VI-NEXT: s_add_i32 s8, s8, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 13 -; VI-NEXT: s_lshr_b32 s46, s9, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 14 -; VI-NEXT: s_lshr_b32 s46, s8, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 24 +; VI-NEXT: v_writelane_b32 v29, s47, 25 +; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 ; VI-NEXT: s_add_i32 s11, s11, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 15 -; VI-NEXT: s_lshr_b32 s46, s8, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 16 -; VI-NEXT: s_lshr_b32 s46, s11, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 17 -; VI-NEXT: s_lshr_b32 s46, s11, 16 ; VI-NEXT: s_add_i32 s10, s10, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 18 -; VI-NEXT: s_lshr_b32 s46, s11, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 19 -; VI-NEXT: s_lshr_b32 s46, s10, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 22 +; VI-NEXT: v_writelane_b32 v29, s47, 23 +; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 ; VI-NEXT: s_add_i32 s13, s13, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 20 -; VI-NEXT: s_lshr_b32 s46, s10, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 21 -; VI-NEXT: s_lshr_b32 s46, s13, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 22 -; VI-NEXT: s_lshr_b32 s46, s13, 16 ; VI-NEXT: s_add_i32 s12, s12, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 23 -; VI-NEXT: s_lshr_b32 s46, s13, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 24 -; VI-NEXT: s_lshr_b32 s46, s12, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 20 +; VI-NEXT: v_writelane_b32 v29, s47, 21 +; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 ; VI-NEXT: s_add_i32 s15, s15, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 25 -; VI-NEXT: s_lshr_b32 s46, s12, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 26 -; VI-NEXT: s_lshr_b32 s46, s15, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 27 -; VI-NEXT: s_lshr_b32 s46, s15, 16 ; VI-NEXT: s_add_i32 s14, s14, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 28 -; VI-NEXT: s_lshr_b32 s46, s15, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 29 -; VI-NEXT: s_lshr_b32 s46, s14, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 18 +; VI-NEXT: v_writelane_b32 v29, s47, 19 +; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 ; VI-NEXT: s_add_i32 s41, s41, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 30 -; VI-NEXT: s_lshr_b32 s46, s14, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 31 -; VI-NEXT: s_lshr_b32 s46, s41, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 32 -; VI-NEXT: s_lshr_b32 s46, s41, 16 ; VI-NEXT: s_add_i32 s40, s40, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 33 -; VI-NEXT: s_lshr_b32 s46, s41, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 34 -; VI-NEXT: s_lshr_b32 s46, s40, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 17 +; VI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 ; VI-NEXT: s_add_i32 s43, s43, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 35 -; VI-NEXT: s_lshr_b32 s46, s40, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 36 -; VI-NEXT: s_lshr_b32 s46, s43, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 37 -; VI-NEXT: s_lshr_b32 s46, s43, 16 ; VI-NEXT: s_add_i32 s42, s42, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 38 -; VI-NEXT: s_lshr_b32 s46, s43, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 39 -; VI-NEXT: s_lshr_b32 s46, s42, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 14 +; VI-NEXT: v_writelane_b32 v29, s47, 15 +; VI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24 ; VI-NEXT: s_add_i32 s45, s45, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 40 -; VI-NEXT: s_lshr_b32 s46, s42, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 41 -; VI-NEXT: s_lshr_b32 s46, s45, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 42 -; VI-NEXT: s_lshr_b32 s46, s45, 16 ; VI-NEXT: s_add_i32 s44, s44, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 43 -; VI-NEXT: s_lshr_b32 s46, s45, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 44 -; VI-NEXT: s_lshr_b32 s46, s44, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 12 +; VI-NEXT: v_writelane_b32 v29, s47, 13 +; VI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24 ; VI-NEXT: s_add_i32 s29, s29, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 45 -; VI-NEXT: s_lshr_b32 s46, s44, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 46 -; VI-NEXT: s_lshr_b32 s46, s29, 24 ; VI-NEXT: s_add_i32 s28, s28, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 47 -; VI-NEXT: s_lshr_b32 s46, s29, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 10 +; VI-NEXT: v_writelane_b32 v29, s47, 11 +; VI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24 ; VI-NEXT: s_add_i32 s27, s27, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 48 -; VI-NEXT: s_lshr_b32 s46, s28, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 49 -; VI-NEXT: s_lshr_b32 s46, s27, 24 ; VI-NEXT: s_add_i32 s26, s26, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 50 -; VI-NEXT: s_lshr_b32 s46, s27, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 9 +; VI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24 ; VI-NEXT: s_add_i32 s25, s25, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 51 -; VI-NEXT: s_lshr_b32 s46, s26, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 52 -; VI-NEXT: s_lshr_b32 s46, s25, 24 ; VI-NEXT: s_add_i32 s24, s24, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 53 -; VI-NEXT: s_lshr_b32 s46, s25, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 6 +; VI-NEXT: v_writelane_b32 v29, s47, 7 +; VI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24 +; VI-NEXT: s_add_i32 s23, s23, 3 ; VI-NEXT: s_add_i32 s22, s22, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 54 -; VI-NEXT: s_lshr_b32 s46, s24, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 4 +; VI-NEXT: v_writelane_b32 v29, s47, 5 +; VI-NEXT: s_lshr_b64 s[46:47], s[22:23], 24 ; VI-NEXT: s_add_i32 s21, s21, 3 -; VI-NEXT: v_writelane_b32 v33, s46, 55 -; VI-NEXT: s_lshr_b32 s46, s22, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 56 -; VI-NEXT: s_lshr_b32 s46, s21, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 57 -; VI-NEXT: s_lshr_b64 s[56:57], s[4:5], 24 -; VI-NEXT: s_add_i32 s17, s17, 3 -; VI-NEXT: s_add_i32 s16, s16, 3 +; VI-NEXT: s_add_i32 s20, s20, 3 +; VI-NEXT: v_writelane_b32 v29, s46, 2 +; VI-NEXT: v_writelane_b32 v29, s47, 3 +; VI-NEXT: s_lshr_b64 s[46:47], s[20:21], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 0 +; VI-NEXT: v_writelane_b32 v29, s47, 1 +; VI-NEXT: s_lshr_b32 s46, s5, 24 +; VI-NEXT: v_writelane_b32 v29, s46, 29 +; VI-NEXT: s_lshr_b32 s46, s5, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 30 +; VI-NEXT: s_lshr_b32 s46, s5, 8 +; VI-NEXT: v_writelane_b32 v29, s46, 31 +; VI-NEXT: s_lshr_b32 s46, s4, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 32 +; VI-NEXT: s_lshr_b32 s47, s12, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 33 +; VI-NEXT: s_lshr_b32 vcc_lo, s25, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 34 +; VI-NEXT: s_lshr_b32 vcc_lo, s24, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 35 +; VI-NEXT: s_lshr_b32 vcc_lo, s24, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 36 +; VI-NEXT: s_lshr_b32 vcc_lo, s23, 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 37 +; VI-NEXT: s_lshr_b32 vcc_lo, s23, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 38 +; VI-NEXT: s_lshr_b32 vcc_lo, s23, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 39 +; VI-NEXT: s_lshr_b32 vcc_lo, s22, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 40 +; VI-NEXT: s_lshr_b32 vcc_lo, s22, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 41 +; VI-NEXT: s_lshr_b32 vcc_lo, s21, 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 42 +; VI-NEXT: s_lshr_b32 vcc_lo, s21, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 43 +; VI-NEXT: s_lshr_b32 vcc_lo, s21, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 44 +; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16 ; VI-NEXT: s_add_i32 s19, s19, 3 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 45 +; VI-NEXT: s_lshr_b32 vcc_lo, s20, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 46 +; VI-NEXT: s_lshr_b32 vcc_lo, s19, 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 47 +; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s20, s20, 3 -; VI-NEXT: s_add_i32 s23, s23, 3 -; VI-NEXT: v_writelane_b32 v33, s56, 0 -; VI-NEXT: s_lshr_b32 s64, s29, 8 -; VI-NEXT: s_lshr_b32 s50, s28, 8 -; VI-NEXT: s_lshr_b32 s86, s27, 8 -; VI-NEXT: s_lshr_b32 s51, s26, 8 -; VI-NEXT: s_lshr_b32 s66, s25, 8 -; VI-NEXT: s_lshr_b32 s54, s24, 8 -; VI-NEXT: s_lshr_b32 s71, s23, 24 -; VI-NEXT: s_lshr_b32 s70, s23, 16 -; VI-NEXT: s_lshr_b32 s52, s23, 8 -; VI-NEXT: s_lshr_b32 s55, s22, 8 -; VI-NEXT: s_lshr_b32 s68, s21, 24 -; VI-NEXT: s_lshr_b32 s65, s21, 8 -; VI-NEXT: s_lshr_b32 s84, s20, 16 -; VI-NEXT: s_lshr_b32 s69, s20, 8 -; VI-NEXT: s_lshr_b32 s80, s19, 24 -; VI-NEXT: s_lshr_b32 s87, s19, 16 -; VI-NEXT: s_lshr_b32 s46, s19, 8 -; VI-NEXT: s_lshr_b32 s81, s18, 16 -; VI-NEXT: s_lshr_b32 s47, s18, 8 -; VI-NEXT: s_lshr_b32 s83, s17, 24 -; VI-NEXT: s_lshr_b32 s85, s17, 16 -; VI-NEXT: s_lshr_b32 s67, s17, 8 -; VI-NEXT: s_lshr_b32 s53, s16, 16 -; VI-NEXT: s_lshr_b32 s82, s16, 8 -; VI-NEXT: v_writelane_b32 v33, s57, 1 -; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; VI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; VI-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; VI-NEXT: s_lshr_b64 s[30:31], s[24:25], 24 -; VI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24 -; VI-NEXT: s_lshr_b64 s[36:37], s[20:21], 24 -; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24 -; VI-NEXT: s_lshr_b64 s[48:49], s[16:17], 24 -; VI-NEXT: .LBB13_3: ; %end -; VI-NEXT: v_mov_b32_e32 v9, s48 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 48 +; VI-NEXT: s_lshr_b32 vcc_lo, s19, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 49 +; VI-NEXT: s_lshr_b32 vcc_lo, s18, 16 +; VI-NEXT: s_add_i32 s17, s17, 3 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 50 +; VI-NEXT: s_lshr_b32 vcc_lo, s18, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 51 +; VI-NEXT: s_lshr_b32 vcc_lo, s17, 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 52 +; VI-NEXT: s_lshr_b32 vcc_lo, s17, 16 +; VI-NEXT: s_add_i32 s16, s16, 3 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 53 +; VI-NEXT: s_lshr_b32 vcc_lo, s17, 8 +; VI-NEXT: s_lshr_b64 s[30:31], s[18:19], 24 +; VI-NEXT: s_lshr_b64 s[88:89], s[16:17], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 54 +; VI-NEXT: s_lshr_b32 vcc_lo, s16, 16 +; VI-NEXT: s_lshr_b32 s38, s4, 8 +; VI-NEXT: s_lshr_b32 s31, s7, 24 +; VI-NEXT: s_lshr_b32 s49, s7, 16 +; VI-NEXT: s_lshr_b32 s48, s7, 8 +; VI-NEXT: s_lshr_b32 s85, s6, 16 +; VI-NEXT: s_lshr_b32 s57, s6, 8 +; VI-NEXT: s_lshr_b32 s84, s9, 24 +; VI-NEXT: s_lshr_b32 s87, s9, 16 +; VI-NEXT: s_lshr_b32 s86, s9, 8 +; VI-NEXT: s_lshr_b32 s89, s8, 16 +; VI-NEXT: s_lshr_b32 s56, s8, 8 +; VI-NEXT: s_lshr_b32 s83, s11, 24 +; VI-NEXT: s_lshr_b32 s50, s11, 16 +; VI-NEXT: s_lshr_b32 s46, s11, 8 +; VI-NEXT: s_lshr_b32 s90, s10, 16 +; VI-NEXT: s_lshr_b32 s91, s10, 8 +; VI-NEXT: s_lshr_b32 s51, s13, 24 +; VI-NEXT: s_lshr_b32 s58, s13, 16 +; VI-NEXT: s_lshr_b32 s59, s13, 8 +; VI-NEXT: s_lshr_b32 s34, s12, 16 +; VI-NEXT: s_lshr_b32 s35, s15, 24 +; VI-NEXT: s_lshr_b32 s36, s15, 16 +; VI-NEXT: s_lshr_b32 s37, s15, 8 +; VI-NEXT: s_lshr_b32 s60, s14, 16 +; VI-NEXT: s_lshr_b32 s39, s14, 8 +; VI-NEXT: s_lshr_b32 s52, s41, 24 +; VI-NEXT: s_lshr_b32 s61, s41, 16 +; VI-NEXT: s_lshr_b32 s53, s41, 8 +; VI-NEXT: s_lshr_b32 s62, s40, 16 +; VI-NEXT: s_lshr_b32 s55, s40, 8 +; VI-NEXT: s_lshr_b32 s69, s43, 24 +; VI-NEXT: s_lshr_b32 s63, s43, 16 +; VI-NEXT: s_lshr_b32 s54, s43, 8 +; VI-NEXT: s_lshr_b32 s73, s42, 16 +; VI-NEXT: s_lshr_b32 s72, s42, 8 +; VI-NEXT: s_lshr_b32 s66, s45, 24 +; VI-NEXT: s_lshr_b32 s68, s45, 16 +; VI-NEXT: s_lshr_b32 s65, s45, 8 +; VI-NEXT: s_lshr_b32 s75, s44, 16 +; VI-NEXT: s_lshr_b32 s74, s44, 8 +; VI-NEXT: s_lshr_b32 s67, s29, 24 +; VI-NEXT: s_lshr_b32 s76, s29, 16 +; VI-NEXT: s_lshr_b32 s82, s29, 8 +; VI-NEXT: s_lshr_b32 s71, s28, 16 +; VI-NEXT: s_lshr_b32 s77, s28, 8 +; VI-NEXT: s_lshr_b32 s70, s27, 24 +; VI-NEXT: s_lshr_b32 s78, s27, 16 +; VI-NEXT: s_lshr_b32 s81, s27, 8 +; VI-NEXT: s_lshr_b32 s80, s26, 16 +; VI-NEXT: s_lshr_b32 s79, s26, 8 +; VI-NEXT: s_lshr_b32 s47, s25, 24 +; VI-NEXT: s_lshr_b32 s64, s25, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 55 +; VI-NEXT: s_lshr_b32 vcc_lo, s16, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 56 +; VI-NEXT: .LBB13_5: ; %end +; VI-NEXT: v_readlane_b32 vcc_lo, v29, 56 +; VI-NEXT: v_mov_b32_e32 v2, vcc_lo ; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; VI-NEXT: v_mov_b32_e32 v2, s82 -; VI-NEXT: v_perm_b32 v9, s53, v9, v1 -; VI-NEXT: v_perm_b32 v3, s16, v2, v1 -; VI-NEXT: v_mov_b32_e32 v24, s83 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_mov_b32_e32 v4, s67 -; VI-NEXT: v_perm_b32 v24, s85, v24, v1 -; VI-NEXT: v_or_b32_e32 v3, v3, v9 -; VI-NEXT: v_perm_b32 v2, s17, v4, v1 -; VI-NEXT: v_mov_b32_e32 v13, s38 -; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24 -; VI-NEXT: v_mov_b32_e32 v4, s47 -; VI-NEXT: v_perm_b32 v13, s81, v13, v1 +; VI-NEXT: v_perm_b32 v2, s16, v2, v1 +; VI-NEXT: v_mov_b32_e32 v3, s88 +; VI-NEXT: v_readlane_b32 s16, v29, 55 +; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 54 +; VI-NEXT: v_mov_b32_e32 v4, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 52 +; VI-NEXT: v_mov_b32_e32 v5, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 53 +; VI-NEXT: v_perm_b32 v5, s16, v5, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 51 +; VI-NEXT: v_mov_b32_e32 v6, s16 +; VI-NEXT: v_mov_b32_e32 v7, s30 +; VI-NEXT: v_readlane_b32 s16, v29, 50 +; VI-NEXT: v_perm_b32 v7, s16, v7, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 49 +; VI-NEXT: v_mov_b32_e32 v8, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 47 +; VI-NEXT: v_mov_b32_e32 v9, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 48 +; VI-NEXT: v_perm_b32 v9, s16, v9, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 46 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_perm_b32 v4, s17, v4, v1 +; VI-NEXT: v_mov_b32_e32 v10, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 0 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 +; VI-NEXT: v_mov_b32_e32 v11, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 45 +; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v5 +; VI-NEXT: v_perm_b32 v11, s16, v11, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 44 +; VI-NEXT: v_or_b32_e32 v2, v4, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0 -; VI-NEXT: v_perm_b32 v5, s18, v4, v1 -; VI-NEXT: v_mov_b32_e32 v25, s80 +; VI-NEXT: v_perm_b32 v6, s18, v6, v1 +; VI-NEXT: v_mov_b32_e32 v12, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 42 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13 -; VI-NEXT: v_mov_b32_e32 v6, s46 -; VI-NEXT: v_perm_b32 v25, s87, v25, v1 -; VI-NEXT: v_or_b32_e32 v2, v5, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v7 +; VI-NEXT: v_mov_b32_e32 v13, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 43 +; VI-NEXT: v_or_b32_e32 v2, v6, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0 -; VI-NEXT: v_perm_b32 v4, s19, v6, v1 -; VI-NEXT: v_mov_b32_e32 v17, s36 +; VI-NEXT: v_perm_b32 v8, s19, v8, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 1 +; VI-NEXT: v_perm_b32 v13, s16, v13, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 41 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25 -; VI-NEXT: v_mov_b32_e32 v6, s69 -; VI-NEXT: v_perm_b32 v17, s84, v17, v1 -; VI-NEXT: v_or_b32_e32 v2, v4, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9 +; VI-NEXT: v_mov_b32_e32 v14, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 2 +; VI-NEXT: v_or_b32_e32 v2, v8, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 12, v0 -; VI-NEXT: v_perm_b32 v7, s20, v6, v1 -; VI-NEXT: v_mov_b32_e32 v26, s68 -; VI-NEXT: v_readlane_b32 s16, v33, 57 +; VI-NEXT: v_perm_b32 v10, s20, v10, v1 +; VI-NEXT: v_mov_b32_e32 v15, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 40 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17 -; VI-NEXT: v_mov_b32_e32 v8, s65 -; VI-NEXT: v_perm_b32 v26, s16, v26, v1 -; VI-NEXT: v_or_b32_e32 v2, v7, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11 +; VI-NEXT: v_perm_b32 v15, s16, v15, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 39 +; VI-NEXT: v_or_b32_e32 v2, v10, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 16, v0 -; VI-NEXT: v_perm_b32 v6, s21, v8, v1 -; VI-NEXT: v_mov_b32_e32 v19, s34 -; VI-NEXT: v_readlane_b32 s16, v33, 56 +; VI-NEXT: v_perm_b32 v12, s21, v12, v1 +; VI-NEXT: v_mov_b32_e32 v16, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 37 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26 -; VI-NEXT: v_mov_b32_e32 v8, s55 -; VI-NEXT: v_perm_b32 v19, s16, v19, v1 -; VI-NEXT: v_or_b32_e32 v2, v6, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13 +; VI-NEXT: v_mov_b32_e32 v17, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 38 +; VI-NEXT: v_or_b32_e32 v2, v12, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 20, v0 -; VI-NEXT: v_perm_b32 v10, s22, v8, v1 -; VI-NEXT: v_mov_b32_e32 v27, s71 +; VI-NEXT: v_perm_b32 v14, s22, v14, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 3 +; VI-NEXT: v_perm_b32 v17, s16, v17, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 36 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19 -; VI-NEXT: v_mov_b32_e32 v11, s52 -; VI-NEXT: v_perm_b32 v27, s70, v27, v1 -; VI-NEXT: v_or_b32_e32 v2, v10, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v15 +; VI-NEXT: v_mov_b32_e32 v18, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 4 +; VI-NEXT: v_or_b32_e32 v2, v14, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 24, v0 -; VI-NEXT: v_perm_b32 v8, s23, v11, v1 -; VI-NEXT: v_mov_b32_e32 v20, s30 -; VI-NEXT: v_readlane_b32 s16, v33, 55 +; VI-NEXT: v_perm_b32 v16, s23, v16, v1 +; VI-NEXT: v_mov_b32_e32 v19, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 35 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27 -; VI-NEXT: v_mov_b32_e32 v11, s54 -; VI-NEXT: v_perm_b32 v20, s16, v20, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 53 -; VI-NEXT: v_or_b32_e32 v2, v8, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17 +; VI-NEXT: v_perm_b32 v19, s16, v19, v1 +; VI-NEXT: v_or_b32_e32 v2, v16, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 28, v0 -; VI-NEXT: v_perm_b32 v12, s24, v11, v1 -; VI-NEXT: v_mov_b32_e32 v28, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 54 +; VI-NEXT: v_perm_b32 v18, s24, v18, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 5 +; VI-NEXT: v_readlane_b32 s16, v29, 34 +; VI-NEXT: v_mov_b32_e32 v21, s47 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20 -; VI-NEXT: v_mov_b32_e32 v14, s66 -; VI-NEXT: v_perm_b32 v28, s16, v28, v1 -; VI-NEXT: v_or_b32_e32 v2, v12, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19 +; VI-NEXT: v_mov_b32_e32 v20, s16 +; VI-NEXT: v_perm_b32 v21, s64, v21, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 6 +; VI-NEXT: v_or_b32_e32 v2, v18, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0 -; VI-NEXT: v_perm_b32 v11, s25, v14, v1 -; VI-NEXT: v_mov_b32_e32 v21, s90 -; VI-NEXT: v_readlane_b32 s16, v33, 52 +; VI-NEXT: v_perm_b32 v20, s25, v20, v1 +; VI-NEXT: v_mov_b32_e32 v23, s16 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28 -; VI-NEXT: v_mov_b32_e32 v14, s51 -; VI-NEXT: v_perm_b32 v21, s16, v21, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 50 -; VI-NEXT: v_or_b32_e32 v2, v11, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21 +; VI-NEXT: v_mov_b32_e32 v22, s79 +; VI-NEXT: v_perm_b32 v23, s80, v23, v1 +; VI-NEXT: v_or_b32_e32 v2, v20, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 36, v0 -; VI-NEXT: v_perm_b32 v15, s26, v14, v1 -; VI-NEXT: v_mov_b32_e32 v29, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 51 +; VI-NEXT: v_perm_b32 v22, s26, v22, v1 +; VI-NEXT: v_mov_b32_e32 v25, s70 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21 -; VI-NEXT: v_mov_b32_e32 v16, s86 -; VI-NEXT: v_perm_b32 v29, s16, v29, v1 -; VI-NEXT: v_or_b32_e32 v2, v15, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v23 +; VI-NEXT: v_readlane_b32 s17, v29, 7 +; VI-NEXT: v_mov_b32_e32 v24, s81 +; VI-NEXT: v_perm_b32 v25, s78, v25, v1 +; VI-NEXT: v_or_b32_e32 v2, v22, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 40, v0 -; VI-NEXT: v_perm_b32 v14, s27, v16, v1 -; VI-NEXT: v_mov_b32_e32 v22, s88 -; VI-NEXT: v_readlane_b32 s16, v33, 49 +; VI-NEXT: v_perm_b32 v24, s27, v24, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 8 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29 -; VI-NEXT: v_mov_b32_e32 v16, s50 -; VI-NEXT: v_perm_b32 v22, s16, v22, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 47 -; VI-NEXT: v_or_b32_e32 v2, v14, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25 +; VI-NEXT: v_mov_b32_e32 v27, s16 +; VI-NEXT: v_or_b32_e32 v2, v24, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 44, v0 -; VI-NEXT: v_perm_b32 v18, s28, v16, v1 -; VI-NEXT: v_mov_b32_e32 v30, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 48 +; VI-NEXT: v_mov_b32_e32 v26, s77 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22 -; VI-NEXT: v_mov_b32_e32 v23, s64 -; VI-NEXT: v_perm_b32 v30, s16, v30, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 46 -; VI-NEXT: v_or_b32_e32 v2, v18, v2 +; VI-NEXT: v_perm_b32 v2, s71, v27, v1 +; VI-NEXT: v_perm_b32 v26, s28, v26, v1 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v2, v26, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 48, v0 -; VI-NEXT: v_perm_b32 v16, s29, v23, v1 -; VI-NEXT: v_mov_b32_e32 v23, s78 -; VI-NEXT: v_mov_b32_e32 v31, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 45 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30 -; VI-NEXT: v_perm_b32 v23, s16, v23, v1 -; VI-NEXT: v_or_b32_e32 v2, v16, v2 +; VI-NEXT: v_mov_b32_e32 v3, s67 +; VI-NEXT: v_mov_b32_e32 v2, s82 +; VI-NEXT: v_perm_b32 v3, s76, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 9 +; VI-NEXT: v_perm_b32 v2, s29, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 52, v0 +; VI-NEXT: v_readlane_b32 s16, v29, 10 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, s44, v31, v1 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v23 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s74 +; VI-NEXT: v_perm_b32 v3, s75, v3, v1 +; VI-NEXT: v_perm_b32 v2, s44, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 44 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 42 -; VI-NEXT: v_mov_b32_e32 v3, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 43 -; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s66 +; VI-NEXT: v_mov_b32_e32 v2, s65 +; VI-NEXT: v_perm_b32 v3, s68, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 11 ; VI-NEXT: v_perm_b32 v2, s45, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 60, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 41 +; VI-NEXT: v_readlane_b32 s16, v29, 12 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_mov_b32_e32 v3, s76 -; VI-NEXT: v_readlane_b32 s16, v33, 40 -; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s72 +; VI-NEXT: v_perm_b32 v3, s73, v3, v1 ; VI-NEXT: v_perm_b32 v2, s42, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 64, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 39 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 37 -; VI-NEXT: v_mov_b32_e32 v3, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 38 -; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s69 +; VI-NEXT: v_mov_b32_e32 v2, s54 +; VI-NEXT: v_perm_b32 v3, s63, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 13 ; VI-NEXT: v_perm_b32 v2, s43, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x44, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 36 +; VI-NEXT: v_readlane_b32 s16, v29, 14 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_mov_b32_e32 v3, s74 -; VI-NEXT: v_readlane_b32 s16, v33, 35 -; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s55 +; VI-NEXT: v_perm_b32 v3, s62, v3, v1 ; VI-NEXT: v_perm_b32 v2, s40, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x48, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 34 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 32 -; VI-NEXT: v_mov_b32_e32 v3, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 33 -; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s52 +; VI-NEXT: v_mov_b32_e32 v2, s53 +; VI-NEXT: v_perm_b32 v3, s61, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 15 ; VI-NEXT: v_perm_b32 v2, s41, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x4c, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 31 +; VI-NEXT: v_readlane_b32 s16, v29, 16 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s39 +; VI-NEXT: v_perm_b32 v3, s60, v3, v1 ; VI-NEXT: v_perm_b32 v2, s14, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s72 -; VI-NEXT: v_readlane_b32 s14, v33, 30 -; VI-NEXT: v_perm_b32 v3, s14, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x50, v0 -; VI-NEXT: v_readlane_b32 s14, v33, 29 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s14 -; VI-NEXT: v_readlane_b32 s14, v33, 27 -; VI-NEXT: v_mov_b32_e32 v3, s14 -; VI-NEXT: v_readlane_b32 s14, v33, 28 -; VI-NEXT: v_perm_b32 v3, s14, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s35 +; VI-NEXT: v_mov_b32_e32 v2, s37 +; VI-NEXT: v_perm_b32 v3, s36, v3, v1 ; VI-NEXT: v_perm_b32 v2, s15, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x54, v0 -; VI-NEXT: v_readlane_b32 s14, v33, 26 +; VI-NEXT: v_readlane_b32 s14, v29, 33 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; VI-NEXT: v_mov_b32_e32 v2, s14 +; VI-NEXT: v_readlane_b32 s14, v29, 18 +; VI-NEXT: v_mov_b32_e32 v3, s14 +; VI-NEXT: v_perm_b32 v3, s34, v3, v1 ; VI-NEXT: v_perm_b32 v2, s12, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s62 -; VI-NEXT: v_readlane_b32 s12, v33, 25 -; VI-NEXT: v_perm_b32 v3, s12, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x58, v0 -; VI-NEXT: v_readlane_b32 s12, v33, 24 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s12 -; VI-NEXT: v_readlane_b32 s12, v33, 22 -; VI-NEXT: v_mov_b32_e32 v3, s12 -; VI-NEXT: v_readlane_b32 s12, v33, 23 -; VI-NEXT: v_perm_b32 v3, s12, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s51 +; VI-NEXT: v_mov_b32_e32 v2, s59 +; VI-NEXT: v_perm_b32 v3, s58, v3, v1 ; VI-NEXT: v_perm_b32 v2, s13, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x5c, v0 -; VI-NEXT: v_readlane_b32 s12, v33, 21 +; VI-NEXT: v_readlane_b32 s12, v29, 20 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s12 +; VI-NEXT: v_mov_b32_e32 v3, s12 +; VI-NEXT: v_mov_b32_e32 v2, s91 +; VI-NEXT: v_perm_b32 v3, s90, v3, v1 ; VI-NEXT: v_perm_b32 v2, s10, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s60 -; VI-NEXT: v_readlane_b32 s10, v33, 20 -; VI-NEXT: v_perm_b32 v3, s10, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x60, v0 -; VI-NEXT: v_readlane_b32 s10, v33, 19 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s10 -; VI-NEXT: v_readlane_b32 s10, v33, 17 -; VI-NEXT: v_mov_b32_e32 v3, s10 -; VI-NEXT: v_readlane_b32 s10, v33, 18 -; VI-NEXT: v_perm_b32 v3, s10, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s83 +; VI-NEXT: v_mov_b32_e32 v2, s46 +; VI-NEXT: v_perm_b32 v3, s50, v3, v1 ; VI-NEXT: v_perm_b32 v2, s11, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x64, v0 -; VI-NEXT: v_readlane_b32 s10, v33, 16 +; VI-NEXT: v_readlane_b32 s10, v29, 22 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s10 +; VI-NEXT: v_mov_b32_e32 v3, s10 +; VI-NEXT: v_mov_b32_e32 v2, s56 +; VI-NEXT: v_perm_b32 v3, s89, v3, v1 ; VI-NEXT: v_perm_b32 v2, s8, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s58 -; VI-NEXT: v_readlane_b32 s8, v33, 15 -; VI-NEXT: v_perm_b32 v3, s8, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x68, v0 -; VI-NEXT: v_readlane_b32 s8, v33, 14 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s8 -; VI-NEXT: v_readlane_b32 s8, v33, 12 -; VI-NEXT: v_mov_b32_e32 v3, s8 -; VI-NEXT: v_readlane_b32 s8, v33, 13 -; VI-NEXT: v_perm_b32 v3, s8, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s84 +; VI-NEXT: v_mov_b32_e32 v2, s86 +; VI-NEXT: v_perm_b32 v3, s87, v3, v1 ; VI-NEXT: v_perm_b32 v2, s9, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x6c, v0 -; VI-NEXT: v_readlane_b32 s8, v33, 11 +; VI-NEXT: v_readlane_b32 s8, v29, 24 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s8 +; VI-NEXT: v_mov_b32_e32 v3, s8 +; VI-NEXT: v_mov_b32_e32 v2, s57 +; VI-NEXT: v_perm_b32 v3, s85, v3, v1 ; VI-NEXT: v_perm_b32 v2, s6, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s56 -; VI-NEXT: v_readlane_b32 s6, v33, 10 -; VI-NEXT: v_perm_b32 v3, s6, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x70, v0 -; VI-NEXT: v_readlane_b32 s6, v33, 9 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s6 -; VI-NEXT: v_readlane_b32 s6, v33, 7 -; VI-NEXT: v_mov_b32_e32 v3, s6 -; VI-NEXT: v_readlane_b32 s6, v33, 8 -; VI-NEXT: v_perm_b32 v3, s6, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s31 +; VI-NEXT: v_mov_b32_e32 v2, s48 +; VI-NEXT: v_perm_b32 v3, s49, v3, v1 ; VI-NEXT: v_perm_b32 v2, s7, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x74, v0 -; VI-NEXT: v_readlane_b32 s6, v33, 6 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s6 -; VI-NEXT: v_readlane_b32 s6, v33, 0 +; VI-NEXT: v_mov_b32_e32 v2, s38 +; VI-NEXT: v_readlane_b32 s6, v29, 26 ; VI-NEXT: v_perm_b32 v2, s4, v2, v1 ; VI-NEXT: v_mov_b32_e32 v3, s6 -; VI-NEXT: v_readlane_b32 s4, v33, 5 +; VI-NEXT: v_readlane_b32 s4, v29, 32 ; VI-NEXT: v_perm_b32 v3, s4, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x78, v0 -; VI-NEXT: v_readlane_b32 s4, v33, 4 +; VI-NEXT: v_readlane_b32 s4, v29, 31 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; VI-NEXT: v_mov_b32_e32 v2, s4 -; VI-NEXT: v_readlane_b32 s4, v33, 2 +; VI-NEXT: v_readlane_b32 s4, v29, 29 ; VI-NEXT: v_mov_b32_e32 v3, s4 -; VI-NEXT: v_readlane_b32 s4, v33, 3 +; VI-NEXT: v_readlane_b32 s4, v29, 30 ; VI-NEXT: v_perm_b32 v2, s5, v2, v1 ; VI-NEXT: v_perm_b32 v1, s4, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 -; VI-NEXT: v_readlane_b32 s30, v32, 30 -; VI-NEXT: v_readlane_b32 s7, v33, 1 +; VI-NEXT: v_readlane_b32 s30, v28, 30 +; VI-NEXT: v_readlane_b32 s17, v29, 17 +; VI-NEXT: v_readlane_b32 s15, v29, 19 +; VI-NEXT: v_readlane_b32 s13, v29, 21 +; VI-NEXT: v_readlane_b32 s11, v29, 23 +; VI-NEXT: v_readlane_b32 s9, v29, 25 +; VI-NEXT: v_readlane_b32 s7, v29, 27 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_readlane_b32 s31, v32, 31 -; VI-NEXT: v_readlane_b32 s87, v32, 29 -; VI-NEXT: v_readlane_b32 s86, v32, 28 -; VI-NEXT: v_readlane_b32 s85, v32, 27 -; VI-NEXT: v_readlane_b32 s84, v32, 26 -; VI-NEXT: v_readlane_b32 s83, v32, 25 -; VI-NEXT: v_readlane_b32 s82, v32, 24 -; VI-NEXT: v_readlane_b32 s81, v32, 23 -; VI-NEXT: v_readlane_b32 s80, v32, 22 -; VI-NEXT: v_readlane_b32 s71, v32, 21 -; VI-NEXT: v_readlane_b32 s70, v32, 20 -; VI-NEXT: v_readlane_b32 s69, v32, 19 -; VI-NEXT: v_readlane_b32 s68, v32, 18 -; VI-NEXT: v_readlane_b32 s67, v32, 17 -; VI-NEXT: v_readlane_b32 s66, v32, 16 -; VI-NEXT: v_readlane_b32 s65, v32, 15 -; VI-NEXT: v_readlane_b32 s64, v32, 14 -; VI-NEXT: v_readlane_b32 s55, v32, 13 -; VI-NEXT: v_readlane_b32 s54, v32, 12 -; VI-NEXT: v_readlane_b32 s53, v32, 11 -; VI-NEXT: v_readlane_b32 s52, v32, 10 -; VI-NEXT: v_readlane_b32 s51, v32, 9 -; VI-NEXT: v_readlane_b32 s50, v32, 8 -; VI-NEXT: v_readlane_b32 s49, v32, 7 -; VI-NEXT: v_readlane_b32 s48, v32, 6 -; VI-NEXT: v_readlane_b32 s39, v32, 5 -; VI-NEXT: v_readlane_b32 s38, v32, 4 -; VI-NEXT: v_readlane_b32 s37, v32, 3 -; VI-NEXT: v_readlane_b32 s36, v32, 2 -; VI-NEXT: v_readlane_b32 s35, v32, 1 -; VI-NEXT: v_readlane_b32 s34, v32, 0 +; VI-NEXT: v_readlane_b32 s31, v28, 31 +; VI-NEXT: v_readlane_b32 s87, v28, 29 +; VI-NEXT: v_readlane_b32 s86, v28, 28 +; VI-NEXT: v_readlane_b32 s85, v28, 27 +; VI-NEXT: v_readlane_b32 s84, v28, 26 +; VI-NEXT: v_readlane_b32 s83, v28, 25 +; VI-NEXT: v_readlane_b32 s82, v28, 24 +; VI-NEXT: v_readlane_b32 s81, v28, 23 +; VI-NEXT: v_readlane_b32 s80, v28, 22 +; VI-NEXT: v_readlane_b32 s71, v28, 21 +; VI-NEXT: v_readlane_b32 s70, v28, 20 +; VI-NEXT: v_readlane_b32 s69, v28, 19 +; VI-NEXT: v_readlane_b32 s68, v28, 18 +; VI-NEXT: v_readlane_b32 s67, v28, 17 +; VI-NEXT: v_readlane_b32 s66, v28, 16 +; VI-NEXT: v_readlane_b32 s65, v28, 15 +; VI-NEXT: v_readlane_b32 s64, v28, 14 +; VI-NEXT: v_readlane_b32 s55, v28, 13 +; VI-NEXT: v_readlane_b32 s54, v28, 12 +; VI-NEXT: v_readlane_b32 s53, v28, 11 +; VI-NEXT: v_readlane_b32 s52, v28, 10 +; VI-NEXT: v_readlane_b32 s51, v28, 9 +; VI-NEXT: v_readlane_b32 s50, v28, 8 +; VI-NEXT: v_readlane_b32 s49, v28, 7 +; VI-NEXT: v_readlane_b32 s48, v28, 6 +; VI-NEXT: v_readlane_b32 s39, v28, 5 +; VI-NEXT: v_readlane_b32 s38, v28, 4 +; VI-NEXT: v_readlane_b32 s37, v28, 3 +; VI-NEXT: v_readlane_b32 s36, v28, 2 +; VI-NEXT: v_readlane_b32 s35, v28, 1 +; VI-NEXT: v_readlane_b32 s34, v28, 0 ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] -; VI-NEXT: .LBB13_4: -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr71 -; VI-NEXT: ; implicit-def: $sgpr70 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: v_writelane_b32 v33, s70, 0 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr82 -; VI-NEXT: ; implicit-def: $sgpr53 -; VI-NEXT: ; implicit-def: $sgpr67 -; VI-NEXT: ; implicit-def: $sgpr85 -; VI-NEXT: ; implicit-def: $sgpr83 -; VI-NEXT: ; implicit-def: $sgpr47 -; VI-NEXT: ; implicit-def: $sgpr81 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr87 -; VI-NEXT: ; implicit-def: $sgpr80 -; VI-NEXT: ; implicit-def: $sgpr69 -; VI-NEXT: ; implicit-def: $sgpr84 -; VI-NEXT: ; implicit-def: $sgpr65 -; VI-NEXT: ; implicit-def: $sgpr68 -; VI-NEXT: ; implicit-def: $sgpr55 -; VI-NEXT: ; implicit-def: $sgpr52 -; VI-NEXT: ; implicit-def: $sgpr54 -; VI-NEXT: ; implicit-def: $sgpr66 -; VI-NEXT: ; implicit-def: $sgpr51 -; VI-NEXT: ; implicit-def: $sgpr86 -; VI-NEXT: ; implicit-def: $sgpr50 -; VI-NEXT: ; implicit-def: $sgpr64 -; VI-NEXT: ; implicit-def: $sgpr48 -; VI-NEXT: ; implicit-def: $sgpr38 -; VI-NEXT: ; implicit-def: $sgpr36 -; VI-NEXT: ; implicit-def: $sgpr34 -; VI-NEXT: ; implicit-def: $sgpr30 -; VI-NEXT: ; implicit-def: $sgpr90 -; VI-NEXT: ; implicit-def: $sgpr88 -; VI-NEXT: ; implicit-def: $sgpr78 -; VI-NEXT: ; implicit-def: $sgpr76 -; VI-NEXT: ; implicit-def: $sgpr74 -; VI-NEXT: ; implicit-def: $sgpr72 -; VI-NEXT: ; implicit-def: $sgpr62 -; VI-NEXT: ; implicit-def: $sgpr60 -; VI-NEXT: ; implicit-def: $sgpr58 -; VI-NEXT: v_writelane_b32 v33, s71, 1 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr70 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: s_branch .LBB13_2 ; ; GFX9-LABEL: bitcast_v32i32_to_v128i8_scalar: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v29, s34, 0 -; GFX9-NEXT: v_writelane_b32 v29, s35, 1 -; GFX9-NEXT: v_writelane_b32 v29, s36, 2 -; GFX9-NEXT: v_writelane_b32 v29, s37, 3 -; GFX9-NEXT: v_writelane_b32 v29, s38, 4 -; GFX9-NEXT: v_writelane_b32 v29, s39, 5 -; GFX9-NEXT: v_writelane_b32 v29, s48, 6 -; GFX9-NEXT: v_writelane_b32 v29, s49, 7 -; GFX9-NEXT: v_writelane_b32 v29, s50, 8 -; GFX9-NEXT: v_writelane_b32 v29, s51, 9 -; GFX9-NEXT: v_writelane_b32 v29, s52, 10 -; GFX9-NEXT: v_writelane_b32 v29, s53, 11 -; GFX9-NEXT: v_writelane_b32 v29, s54, 12 -; GFX9-NEXT: v_writelane_b32 v29, s55, 13 -; GFX9-NEXT: v_writelane_b32 v29, s64, 14 -; GFX9-NEXT: v_writelane_b32 v29, s65, 15 -; GFX9-NEXT: v_writelane_b32 v29, s66, 16 -; GFX9-NEXT: v_writelane_b32 v29, s67, 17 -; GFX9-NEXT: v_writelane_b32 v29, s68, 18 -; GFX9-NEXT: v_writelane_b32 v29, s69, 19 -; GFX9-NEXT: v_writelane_b32 v29, s70, 20 -; GFX9-NEXT: v_writelane_b32 v29, s71, 21 -; GFX9-NEXT: v_writelane_b32 v29, s80, 22 -; GFX9-NEXT: v_writelane_b32 v29, s81, 23 -; GFX9-NEXT: v_writelane_b32 v29, s82, 24 -; GFX9-NEXT: v_writelane_b32 v29, s83, 25 -; GFX9-NEXT: v_writelane_b32 v29, s84, 26 -; GFX9-NEXT: v_writelane_b32 v29, s85, 27 -; GFX9-NEXT: v_writelane_b32 v29, s86, 28 -; GFX9-NEXT: v_writelane_b32 v29, s87, 29 -; GFX9-NEXT: v_writelane_b32 v29, s96, 30 -; GFX9-NEXT: v_writelane_b32 v29, s97, 31 -; GFX9-NEXT: v_writelane_b32 v29, s98, 32 -; GFX9-NEXT: v_writelane_b32 v29, s99, 33 -; GFX9-NEXT: v_writelane_b32 v29, s30, 34 -; GFX9-NEXT: v_writelane_b32 v29, s31, 35 +; GFX9-NEXT: v_writelane_b32 v24, s34, 0 +; GFX9-NEXT: v_writelane_b32 v24, s35, 1 +; GFX9-NEXT: v_writelane_b32 v24, s36, 2 +; GFX9-NEXT: v_writelane_b32 v24, s37, 3 +; GFX9-NEXT: v_writelane_b32 v24, s38, 4 +; GFX9-NEXT: v_writelane_b32 v24, s39, 5 +; GFX9-NEXT: v_writelane_b32 v24, s48, 6 +; GFX9-NEXT: v_writelane_b32 v24, s49, 7 +; GFX9-NEXT: v_writelane_b32 v24, s50, 8 +; GFX9-NEXT: v_writelane_b32 v24, s51, 9 +; GFX9-NEXT: v_writelane_b32 v24, s52, 10 +; GFX9-NEXT: v_writelane_b32 v24, s53, 11 +; GFX9-NEXT: v_writelane_b32 v24, s54, 12 +; GFX9-NEXT: v_writelane_b32 v24, s55, 13 +; GFX9-NEXT: v_writelane_b32 v24, s64, 14 +; GFX9-NEXT: v_writelane_b32 v24, s65, 15 +; GFX9-NEXT: v_writelane_b32 v24, s66, 16 +; GFX9-NEXT: v_writelane_b32 v24, s67, 17 +; GFX9-NEXT: v_writelane_b32 v24, s68, 18 +; GFX9-NEXT: v_writelane_b32 v24, s69, 19 +; GFX9-NEXT: v_writelane_b32 v24, s70, 20 +; GFX9-NEXT: v_writelane_b32 v24, s71, 21 +; GFX9-NEXT: v_writelane_b32 v24, s80, 22 +; GFX9-NEXT: v_writelane_b32 v24, s81, 23 +; GFX9-NEXT: v_writelane_b32 v24, s82, 24 +; GFX9-NEXT: v_writelane_b32 v24, s83, 25 +; GFX9-NEXT: v_writelane_b32 v24, s84, 26 +; GFX9-NEXT: v_writelane_b32 v24, s85, 27 +; GFX9-NEXT: v_writelane_b32 v24, s86, 28 +; GFX9-NEXT: v_writelane_b32 v24, s87, 29 +; GFX9-NEXT: v_writelane_b32 v24, s96, 30 +; GFX9-NEXT: v_writelane_b32 v24, s97, 31 +; GFX9-NEXT: v_writelane_b32 v24, s98, 32 +; GFX9-NEXT: v_writelane_b32 v24, s99, 33 +; GFX9-NEXT: v_writelane_b32 v24, s30, 34 +; GFX9-NEXT: v_writelane_b32 v24, s31, 35 ; GFX9-NEXT: v_readfirstlane_b32 s44, v19 ; GFX9-NEXT: v_readfirstlane_b32 s5, v18 ; GFX9-NEXT: v_readfirstlane_b32 s4, v17 @@ -10040,853 +10068,862 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s45, v2 ; GFX9-NEXT: s_cmp_lg_u32 s44, 0 ; GFX9-NEXT: v_readfirstlane_b32 s44, v1 -; GFX9-NEXT: ; implicit-def: $vgpr30 : SGPR spill to VGPR lane -; GFX9-NEXT: s_cbranch_scc0 .LBB13_4 +; GFX9-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane +; GFX9-NEXT: s_cbranch_scc0 .LBB13_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: s_lshr_b32 s46, s5, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 0 +; GFX9-NEXT: v_writelane_b32 v25, s46, 33 ; GFX9-NEXT: s_lshr_b32 s46, s5, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 1 +; GFX9-NEXT: v_writelane_b32 v25, s46, 34 ; GFX9-NEXT: s_lshr_b32 s46, s5, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 2 +; GFX9-NEXT: v_writelane_b32 v25, s46, 35 ; GFX9-NEXT: s_lshr_b32 s46, s4, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 3 +; GFX9-NEXT: v_writelane_b32 v25, s46, 36 ; GFX9-NEXT: s_lshr_b32 s46, s4, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 4 +; GFX9-NEXT: v_writelane_b32 v25, s46, 37 ; GFX9-NEXT: s_lshr_b32 s46, s7, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 5 +; GFX9-NEXT: v_writelane_b32 v25, s46, 38 ; GFX9-NEXT: s_lshr_b32 s46, s7, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 6 +; GFX9-NEXT: v_writelane_b32 v25, s46, 39 ; GFX9-NEXT: s_lshr_b32 s46, s7, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 7 -; GFX9-NEXT: s_lshr_b32 s46, s6, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 8 -; GFX9-NEXT: s_lshr_b32 s46, s6, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 9 -; GFX9-NEXT: s_lshr_b32 s46, s9, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 10 -; GFX9-NEXT: s_lshr_b32 s46, s9, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 11 -; GFX9-NEXT: s_lshr_b32 s46, s9, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 12 -; GFX9-NEXT: s_lshr_b32 s46, s8, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 13 -; GFX9-NEXT: s_lshr_b32 s46, s8, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 14 -; GFX9-NEXT: s_lshr_b32 s46, s11, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 15 -; GFX9-NEXT: s_lshr_b32 s46, s11, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 16 -; GFX9-NEXT: s_lshr_b32 s46, s11, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 17 -; GFX9-NEXT: s_lshr_b32 s46, s10, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 18 -; GFX9-NEXT: s_lshr_b32 s46, s10, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 19 -; GFX9-NEXT: s_lshr_b32 s46, s13, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 20 -; GFX9-NEXT: s_lshr_b32 s46, s13, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 21 -; GFX9-NEXT: s_lshr_b32 s46, s13, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 22 -; GFX9-NEXT: s_lshr_b32 s46, s12, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 23 -; GFX9-NEXT: s_lshr_b32 s46, s12, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 24 -; GFX9-NEXT: s_lshr_b32 s46, s15, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 25 -; GFX9-NEXT: s_lshr_b32 s46, s15, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 26 -; GFX9-NEXT: s_lshr_b32 s46, s15, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 27 -; GFX9-NEXT: s_lshr_b32 s46, s14, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 28 -; GFX9-NEXT: s_lshr_b32 s46, s14, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 29 -; GFX9-NEXT: s_lshr_b32 s46, s41, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 30 -; GFX9-NEXT: s_lshr_b32 s46, s41, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 31 -; GFX9-NEXT: s_lshr_b32 s46, s41, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 32 -; GFX9-NEXT: s_lshr_b32 s46, s40, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 33 -; GFX9-NEXT: s_lshr_b32 s46, s40, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 34 -; GFX9-NEXT: s_lshr_b32 s46, s43, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 35 -; GFX9-NEXT: s_lshr_b32 s46, s43, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 36 -; GFX9-NEXT: s_lshr_b32 s46, s43, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 37 -; GFX9-NEXT: s_lshr_b32 s46, s42, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 38 -; GFX9-NEXT: s_lshr_b32 s46, s42, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 39 -; GFX9-NEXT: s_lshr_b32 s46, s45, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 40 -; GFX9-NEXT: s_lshr_b32 s46, s45, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 41 -; GFX9-NEXT: s_lshr_b32 s46, s45, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 42 -; GFX9-NEXT: s_lshr_b32 s46, s44, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 43 -; GFX9-NEXT: s_lshr_b32 s46, s44, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 44 -; GFX9-NEXT: s_lshr_b32 s46, s29, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 45 -; GFX9-NEXT: s_lshr_b32 s46, s29, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 46 -; GFX9-NEXT: s_lshr_b32 s46, s29, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 47 -; GFX9-NEXT: s_lshr_b32 s46, s28, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 48 -; GFX9-NEXT: s_lshr_b32 s46, s27, 16 -; GFX9-NEXT: s_lshr_b32 s83, s28, 8 -; GFX9-NEXT: s_lshr_b32 s81, s27, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 49 -; GFX9-NEXT: s_lshr_b32 s53, s27, 8 -; GFX9-NEXT: s_lshr_b32 s82, s26, 16 -; GFX9-NEXT: s_lshr_b32 s67, s26, 8 -; GFX9-NEXT: s_lshr_b32 s84, s25, 24 -; GFX9-NEXT: s_lshr_b32 s96, s25, 16 -; GFX9-NEXT: s_lshr_b32 s65, s25, 8 -; GFX9-NEXT: s_lshr_b32 s86, s24, 16 -; GFX9-NEXT: s_lshr_b32 s55, s24, 8 -; GFX9-NEXT: s_lshr_b32 s98, s23, 24 -; GFX9-NEXT: s_lshr_b32 s87, s23, 16 -; GFX9-NEXT: s_lshr_b32 s66, s23, 8 -; GFX9-NEXT: s_lshr_b32 s97, s22, 16 -; GFX9-NEXT: s_lshr_b32 s64, s22, 8 -; GFX9-NEXT: s_lshr_b32 s49, s21, 24 -; GFX9-NEXT: s_lshr_b32 s99, s21, 16 -; GFX9-NEXT: s_lshr_b32 s80, s21, 8 -; GFX9-NEXT: s_lshr_b32 s39, s20, 16 -; GFX9-NEXT: s_lshr_b32 s70, s20, 8 -; GFX9-NEXT: s_lshr_b32 s48, s19, 24 -; GFX9-NEXT: s_lshr_b32 s38, s19, 16 -; GFX9-NEXT: s_lshr_b32 s68, s19, 8 -; GFX9-NEXT: s_lshr_b32 s54, s18, 16 -; GFX9-NEXT: s_lshr_b32 s71, s18, 8 -; GFX9-NEXT: s_lshr_b32 s52, s17, 24 -; GFX9-NEXT: s_lshr_b32 s50, s17, 16 -; GFX9-NEXT: s_lshr_b32 s69, s17, 8 -; GFX9-NEXT: s_lshr_b32 s51, s16, 16 -; GFX9-NEXT: s_lshr_b32 s85, s16, 8 -; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; GFX9-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; GFX9-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; GFX9-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; GFX9-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; GFX9-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; GFX9-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; GFX9-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; GFX9-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; GFX9-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 40 +; GFX9-NEXT: s_lshr_b32 s90, s20, 8 +; GFX9-NEXT: v_writelane_b32 v25, s90, 32 +; GFX9-NEXT: s_lshr_b32 s90, s19, 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 41 +; GFX9-NEXT: s_lshr_b32 s90, s19, 16 +; GFX9-NEXT: v_writelane_b32 v25, s90, 42 +; GFX9-NEXT: s_lshr_b32 s90, s19, 8 +; GFX9-NEXT: v_writelane_b32 v25, s90, 43 +; GFX9-NEXT: s_lshr_b32 s90, s18, 16 +; GFX9-NEXT: v_writelane_b32 v25, s90, 44 +; GFX9-NEXT: s_lshr_b32 s90, s18, 8 +; GFX9-NEXT: v_writelane_b32 v25, s90, 45 +; GFX9-NEXT: s_lshr_b32 s90, s17, 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 46 +; GFX9-NEXT: s_lshr_b32 s90, s17, 16 +; GFX9-NEXT: v_writelane_b32 v25, s90, 47 +; GFX9-NEXT: s_lshr_b32 s90, s17, 8 +; GFX9-NEXT: v_writelane_b32 v25, s90, 48 +; GFX9-NEXT: s_lshr_b32 s90, s16, 16 +; GFX9-NEXT: v_writelane_b32 v25, s90, 49 +; GFX9-NEXT: s_lshr_b32 s90, s16, 8 +; GFX9-NEXT: v_writelane_b32 v25, s90, 50 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[4:5], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 30 +; GFX9-NEXT: v_writelane_b32 v25, s91, 31 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[6:7], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 28 +; GFX9-NEXT: v_writelane_b32 v25, s91, 29 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[8:9], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 26 +; GFX9-NEXT: v_writelane_b32 v25, s91, 27 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 24 +; GFX9-NEXT: v_writelane_b32 v25, s91, 25 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[12:13], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 22 +; GFX9-NEXT: v_writelane_b32 v25, s91, 23 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[14:15], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 20 +; GFX9-NEXT: v_writelane_b32 v25, s91, 21 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[40:41], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 18 +; GFX9-NEXT: v_writelane_b32 v25, s91, 19 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[42:43], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 16 +; GFX9-NEXT: v_writelane_b32 v25, s91, 17 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[44:45], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 14 +; GFX9-NEXT: v_writelane_b32 v25, s91, 15 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[28:29], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 12 +; GFX9-NEXT: v_writelane_b32 v25, s91, 13 ; GFX9-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; GFX9-NEXT: s_lshr_b64 s[92:93], s[24:25], 24 -; GFX9-NEXT: s_lshr_b64 s[94:95], s[22:23], 24 -; GFX9-NEXT: s_lshr_b64 s[30:31], s[20:21], 24 -; GFX9-NEXT: s_lshr_b64 s[34:35], s[18:19], 24 -; GFX9-NEXT: s_lshr_b64 s[36:37], s[16:17], 24 -; GFX9-NEXT: s_cbranch_execnz .LBB13_3 -; GFX9-NEXT: .LBB13_2: ; %cmp.true +; GFX9-NEXT: v_writelane_b32 v25, s90, 10 +; GFX9-NEXT: v_writelane_b32 v25, s91, 11 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[24:25], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 8 +; GFX9-NEXT: v_writelane_b32 v25, s91, 9 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[22:23], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 6 +; GFX9-NEXT: v_writelane_b32 v25, s91, 7 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[20:21], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 4 +; GFX9-NEXT: v_writelane_b32 v25, s91, 5 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s43, 16 +; GFX9-NEXT: v_writelane_b32 v25, s90, 2 +; GFX9-NEXT: v_writelane_b32 v25, s91, 3 +; GFX9-NEXT: s_mov_b32 s90, vcc_lo +; GFX9-NEXT: s_lshr_b64 vcc, s[16:17], 24 +; GFX9-NEXT: s_lshr_b32 s46, s13, 24 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 0 +; GFX9-NEXT: s_lshr_b32 s37, s6, 16 +; GFX9-NEXT: s_lshr_b32 s53, s6, 8 +; GFX9-NEXT: s_lshr_b32 s51, s9, 24 +; GFX9-NEXT: s_lshr_b32 s79, s9, 16 +; GFX9-NEXT: s_lshr_b32 s89, s9, 8 +; GFX9-NEXT: s_lshr_b32 s52, s8, 16 +; GFX9-NEXT: s_lshr_b32 s67, s8, 8 +; GFX9-NEXT: s_lshr_b32 s65, s11, 24 +; GFX9-NEXT: s_lshr_b32 s66, s11, 16 +; GFX9-NEXT: s_lshr_b32 s69, s11, 8 +; GFX9-NEXT: s_lshr_b32 s68, s10, 16 +; GFX9-NEXT: s_lshr_b32 s71, s10, 8 +; GFX9-NEXT: s_lshr_b32 s50, s13, 16 +; GFX9-NEXT: s_lshr_b32 s78, s13, 8 +; GFX9-NEXT: s_lshr_b32 s77, s12, 16 +; GFX9-NEXT: s_lshr_b32 s88, s12, 8 +; GFX9-NEXT: s_lshr_b32 s64, s15, 24 +; GFX9-NEXT: s_lshr_b32 s55, s15, 16 +; GFX9-NEXT: s_lshr_b32 s70, s15, 8 +; GFX9-NEXT: s_lshr_b32 s80, s14, 16 +; GFX9-NEXT: s_lshr_b32 s83, s14, 8 +; GFX9-NEXT: s_lshr_b32 s47, s41, 24 +; GFX9-NEXT: s_lshr_b32 s56, s41, 16 +; GFX9-NEXT: s_lshr_b32 s81, s41, 8 +; GFX9-NEXT: s_lshr_b32 s92, s40, 16 +; GFX9-NEXT: s_lshr_b32 s93, s40, 8 +; GFX9-NEXT: s_lshr_b32 s94, s43, 24 +; GFX9-NEXT: s_lshr_b32 s30, s43, 8 +; GFX9-NEXT: s_lshr_b32 s31, s42, 16 +; GFX9-NEXT: s_lshr_b32 s85, s42, 8 +; GFX9-NEXT: s_lshr_b32 s57, s45, 24 +; GFX9-NEXT: s_lshr_b32 s34, s45, 16 +; GFX9-NEXT: s_lshr_b32 s35, s45, 8 +; GFX9-NEXT: s_lshr_b32 s82, s44, 16 +; GFX9-NEXT: s_lshr_b32 s84, s44, 8 +; GFX9-NEXT: s_lshr_b32 s95, s29, 24 +; GFX9-NEXT: s_lshr_b32 s36, s29, 16 +; GFX9-NEXT: s_lshr_b32 s58, s29, 8 +; GFX9-NEXT: s_lshr_b32 s86, s28, 16 +; GFX9-NEXT: s_lshr_b32 s59, s28, 8 +; GFX9-NEXT: s_lshr_b32 s96, s27, 24 +; GFX9-NEXT: s_lshr_b32 s61, s27, 16 +; GFX9-NEXT: s_lshr_b32 s60, s27, 8 +; GFX9-NEXT: s_lshr_b32 s62, s26, 16 +; GFX9-NEXT: s_lshr_b32 s87, s26, 8 +; GFX9-NEXT: s_lshr_b32 s98, s25, 24 +; GFX9-NEXT: s_lshr_b32 s97, s25, 16 +; GFX9-NEXT: s_lshr_b32 s63, s25, 8 +; GFX9-NEXT: s_lshr_b32 s73, s24, 16 +; GFX9-NEXT: s_lshr_b32 s38, s24, 8 +; GFX9-NEXT: s_lshr_b32 s72, s23, 24 +; GFX9-NEXT: s_lshr_b32 s39, s23, 16 +; GFX9-NEXT: s_lshr_b32 s99, s23, 8 +; GFX9-NEXT: s_lshr_b32 s75, s22, 16 +; GFX9-NEXT: s_lshr_b32 s48, s22, 8 +; GFX9-NEXT: s_lshr_b32 s74, s21, 24 +; GFX9-NEXT: s_lshr_b32 s54, s21, 16 +; GFX9-NEXT: s_lshr_b32 s49, s21, 8 +; GFX9-NEXT: s_lshr_b32 s76, s20, 16 +; GFX9-NEXT: v_writelane_b32 v25, vcc_hi, 1 +; GFX9-NEXT: s_mov_b32 s91, s46 +; GFX9-NEXT: s_mov_b64 vcc, 0 +; GFX9-NEXT: s_branch .LBB13_3 +; GFX9-NEXT: .LBB13_2: +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $vcc_lo +; GFX9-NEXT: ; implicit-def: $sgpr76 +; GFX9-NEXT: ; implicit-def: $sgpr49 +; GFX9-NEXT: ; implicit-def: $sgpr54 +; GFX9-NEXT: ; implicit-def: $sgpr74 +; GFX9-NEXT: ; implicit-def: $sgpr48 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: ; implicit-def: $sgpr99 +; GFX9-NEXT: ; implicit-def: $sgpr39 +; GFX9-NEXT: ; implicit-def: $sgpr72 +; GFX9-NEXT: ; implicit-def: $sgpr38 +; GFX9-NEXT: ; implicit-def: $sgpr73 +; GFX9-NEXT: ; implicit-def: $sgpr63 +; GFX9-NEXT: ; implicit-def: $sgpr97 +; GFX9-NEXT: ; implicit-def: $sgpr98 +; GFX9-NEXT: ; implicit-def: $sgpr87 +; GFX9-NEXT: ; implicit-def: $sgpr62 +; GFX9-NEXT: ; implicit-def: $sgpr60 +; GFX9-NEXT: ; implicit-def: $sgpr61 +; GFX9-NEXT: ; implicit-def: $sgpr96 +; GFX9-NEXT: ; implicit-def: $sgpr59 +; GFX9-NEXT: ; implicit-def: $sgpr86 +; GFX9-NEXT: ; implicit-def: $sgpr58 +; GFX9-NEXT: ; implicit-def: $sgpr36 +; GFX9-NEXT: ; implicit-def: $sgpr95 +; GFX9-NEXT: ; implicit-def: $sgpr84 +; GFX9-NEXT: ; implicit-def: $sgpr82 +; GFX9-NEXT: ; implicit-def: $sgpr35 +; GFX9-NEXT: ; implicit-def: $sgpr34 +; GFX9-NEXT: ; implicit-def: $sgpr57 +; GFX9-NEXT: ; implicit-def: $sgpr85 +; GFX9-NEXT: ; implicit-def: $sgpr31 +; GFX9-NEXT: ; implicit-def: $sgpr30 +; GFX9-NEXT: ; implicit-def: $sgpr90 +; GFX9-NEXT: ; implicit-def: $sgpr94 +; GFX9-NEXT: ; implicit-def: $sgpr93 +; GFX9-NEXT: ; implicit-def: $sgpr92 +; GFX9-NEXT: ; implicit-def: $sgpr81 +; GFX9-NEXT: ; implicit-def: $sgpr56 +; GFX9-NEXT: ; implicit-def: $sgpr83 +; GFX9-NEXT: ; implicit-def: $sgpr80 +; GFX9-NEXT: ; implicit-def: $sgpr70 +; GFX9-NEXT: ; implicit-def: $sgpr55 +; GFX9-NEXT: ; implicit-def: $sgpr64 +; GFX9-NEXT: ; implicit-def: $sgpr88 +; GFX9-NEXT: ; implicit-def: $sgpr77 +; GFX9-NEXT: ; implicit-def: $sgpr78 +; GFX9-NEXT: ; implicit-def: $sgpr50 +; GFX9-NEXT: ; implicit-def: $sgpr91 +; GFX9-NEXT: ; implicit-def: $sgpr71 +; GFX9-NEXT: ; implicit-def: $sgpr68 +; GFX9-NEXT: ; implicit-def: $sgpr69 +; GFX9-NEXT: ; implicit-def: $sgpr66 +; GFX9-NEXT: ; implicit-def: $sgpr65 +; GFX9-NEXT: ; implicit-def: $sgpr67 +; GFX9-NEXT: ; implicit-def: $sgpr52 +; GFX9-NEXT: ; implicit-def: $sgpr89 +; GFX9-NEXT: ; implicit-def: $sgpr79 +; GFX9-NEXT: ; implicit-def: $sgpr51 +; GFX9-NEXT: ; implicit-def: $sgpr53 +; GFX9-NEXT: ; implicit-def: $sgpr37 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 0 +; GFX9-NEXT: v_writelane_b32 v25, s47, 1 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 2 +; GFX9-NEXT: v_writelane_b32 v25, s47, 3 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 4 +; GFX9-NEXT: v_writelane_b32 v25, s47, 5 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 6 +; GFX9-NEXT: v_writelane_b32 v25, s47, 7 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 8 +; GFX9-NEXT: v_writelane_b32 v25, s47, 9 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 10 +; GFX9-NEXT: v_writelane_b32 v25, s47, 11 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 12 +; GFX9-NEXT: v_writelane_b32 v25, s47, 13 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 14 +; GFX9-NEXT: v_writelane_b32 v25, s47, 15 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 16 +; GFX9-NEXT: v_writelane_b32 v25, s47, 17 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 18 +; GFX9-NEXT: v_writelane_b32 v25, s47, 19 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 20 +; GFX9-NEXT: v_writelane_b32 v25, s47, 21 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 22 +; GFX9-NEXT: v_writelane_b32 v25, s47, 23 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 24 +; GFX9-NEXT: v_writelane_b32 v25, vcc_hi, 25 +; GFX9-NEXT: ; implicit-def: $vcc_lo +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 26 +; GFX9-NEXT: v_writelane_b32 v25, vcc_hi, 27 +; GFX9-NEXT: ; implicit-def: $vcc_lo +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 28 +; GFX9-NEXT: v_writelane_b32 v25, vcc_hi, 29 +; GFX9-NEXT: ; implicit-def: $vcc_lo +; GFX9-NEXT: ; kill: killed $vcc_lo +; GFX9-NEXT: ; implicit-def: $vcc_lo +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 30 +; GFX9-NEXT: v_writelane_b32 v25, vcc_hi, 31 +; GFX9-NEXT: ; implicit-def: $vcc_lo +; GFX9-NEXT: ; kill: killed $vcc_lo +; GFX9-NEXT: ; implicit-def: $vcc_lo +; GFX9-NEXT: ; kill: killed $vcc_lo +; GFX9-NEXT: s_mov_b64 vcc, -1 +; GFX9-NEXT: .LBB13_3: ; %Flow +; GFX9-NEXT: s_andn2_b64 vcc, exec, vcc +; GFX9-NEXT: v_readlane_b32 s46, v25, 32 +; GFX9-NEXT: s_cbranch_vccnz .LBB13_5 +; GFX9-NEXT: ; %bb.4: ; %cmp.true ; GFX9-NEXT: s_add_i32 s5, s5, 3 -; GFX9-NEXT: s_lshr_b32 s46, s5, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 0 -; GFX9-NEXT: s_lshr_b32 s46, s5, 16 ; GFX9-NEXT: s_add_i32 s4, s4, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 1 -; GFX9-NEXT: s_lshr_b32 s46, s5, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 2 -; GFX9-NEXT: s_lshr_b32 s46, s4, 16 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 ; GFX9-NEXT: s_add_i32 s7, s7, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 3 -; GFX9-NEXT: s_lshr_b32 s46, s4, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 4 -; GFX9-NEXT: s_lshr_b32 s46, s7, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 5 -; GFX9-NEXT: s_lshr_b32 s46, s7, 16 ; GFX9-NEXT: s_add_i32 s6, s6, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 6 -; GFX9-NEXT: s_lshr_b32 s46, s7, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 7 -; GFX9-NEXT: s_lshr_b32 s46, s6, 16 +; GFX9-NEXT: v_writelane_b32 v25, s46, 30 +; GFX9-NEXT: v_writelane_b32 v25, s47, 31 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 ; GFX9-NEXT: s_add_i32 s9, s9, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 8 -; GFX9-NEXT: s_lshr_b32 s46, s6, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 9 -; GFX9-NEXT: s_lshr_b32 s46, s9, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 10 -; GFX9-NEXT: s_lshr_b32 s46, s9, 16 ; GFX9-NEXT: s_add_i32 s8, s8, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 11 -; GFX9-NEXT: s_lshr_b32 s46, s9, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 12 -; GFX9-NEXT: s_lshr_b32 s46, s8, 16 +; GFX9-NEXT: v_writelane_b32 v25, s46, 28 +; GFX9-NEXT: v_writelane_b32 v25, s47, 29 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 ; GFX9-NEXT: s_add_i32 s11, s11, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 13 -; GFX9-NEXT: s_lshr_b32 s46, s8, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 14 -; GFX9-NEXT: s_lshr_b32 s46, s11, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 15 -; GFX9-NEXT: s_lshr_b32 s46, s11, 16 ; GFX9-NEXT: s_add_i32 s10, s10, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 16 -; GFX9-NEXT: s_lshr_b32 s46, s11, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 17 -; GFX9-NEXT: s_lshr_b32 s46, s10, 16 +; GFX9-NEXT: v_writelane_b32 v25, s46, 26 +; GFX9-NEXT: v_writelane_b32 v25, s47, 27 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 ; GFX9-NEXT: s_add_i32 s13, s13, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 18 -; GFX9-NEXT: s_lshr_b32 s46, s10, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 19 -; GFX9-NEXT: s_lshr_b32 s46, s13, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 20 -; GFX9-NEXT: s_lshr_b32 s46, s13, 16 ; GFX9-NEXT: s_add_i32 s12, s12, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 21 -; GFX9-NEXT: s_lshr_b32 s46, s13, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 22 -; GFX9-NEXT: s_lshr_b32 s46, s12, 16 +; GFX9-NEXT: v_writelane_b32 v25, s46, 24 +; GFX9-NEXT: v_writelane_b32 v25, s47, 25 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 ; GFX9-NEXT: s_add_i32 s15, s15, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 23 -; GFX9-NEXT: s_lshr_b32 s46, s12, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 24 -; GFX9-NEXT: s_lshr_b32 s46, s15, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 25 -; GFX9-NEXT: s_lshr_b32 s46, s15, 16 ; GFX9-NEXT: s_add_i32 s14, s14, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 26 -; GFX9-NEXT: s_lshr_b32 s46, s15, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 27 -; GFX9-NEXT: s_lshr_b32 s46, s14, 16 +; GFX9-NEXT: v_writelane_b32 v25, s46, 22 +; GFX9-NEXT: v_writelane_b32 v25, s47, 23 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 ; GFX9-NEXT: s_add_i32 s41, s41, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 28 -; GFX9-NEXT: s_lshr_b32 s46, s14, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 29 -; GFX9-NEXT: s_lshr_b32 s46, s41, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 30 -; GFX9-NEXT: s_lshr_b32 s46, s41, 16 ; GFX9-NEXT: s_add_i32 s40, s40, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 31 -; GFX9-NEXT: s_lshr_b32 s46, s41, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 32 -; GFX9-NEXT: s_lshr_b32 s46, s40, 16 +; GFX9-NEXT: v_writelane_b32 v25, s46, 20 +; GFX9-NEXT: v_writelane_b32 v25, s47, 21 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 ; GFX9-NEXT: s_add_i32 s43, s43, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 33 -; GFX9-NEXT: s_lshr_b32 s46, s40, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 34 -; GFX9-NEXT: s_lshr_b32 s46, s43, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 35 -; GFX9-NEXT: s_lshr_b32 s46, s43, 16 ; GFX9-NEXT: s_add_i32 s42, s42, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 36 -; GFX9-NEXT: s_lshr_b32 s46, s43, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 37 -; GFX9-NEXT: s_lshr_b32 s46, s42, 16 +; GFX9-NEXT: v_writelane_b32 v25, s46, 18 +; GFX9-NEXT: v_writelane_b32 v25, s47, 19 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[42:43], 24 ; GFX9-NEXT: s_add_i32 s45, s45, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 38 -; GFX9-NEXT: s_lshr_b32 s46, s42, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 39 -; GFX9-NEXT: s_lshr_b32 s46, s45, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 40 -; GFX9-NEXT: s_lshr_b32 s46, s45, 16 ; GFX9-NEXT: s_add_i32 s44, s44, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 41 -; GFX9-NEXT: s_lshr_b32 s46, s45, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 42 -; GFX9-NEXT: s_lshr_b32 s46, s44, 16 +; GFX9-NEXT: v_writelane_b32 v25, s46, 16 +; GFX9-NEXT: v_writelane_b32 v25, s47, 17 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[44:45], 24 ; GFX9-NEXT: s_add_i32 s29, s29, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 43 -; GFX9-NEXT: s_lshr_b32 s46, s44, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 44 -; GFX9-NEXT: s_lshr_b32 s46, s29, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 45 -; GFX9-NEXT: s_lshr_b32 s46, s29, 16 ; GFX9-NEXT: s_add_i32 s28, s28, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 46 -; GFX9-NEXT: s_lshr_b32 s46, s29, 8 +; GFX9-NEXT: v_writelane_b32 v25, s46, 14 +; GFX9-NEXT: v_writelane_b32 v25, s47, 15 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[28:29], 24 ; GFX9-NEXT: s_add_i32 s27, s27, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 47 -; GFX9-NEXT: s_lshr_b32 s46, s28, 16 -; GFX9-NEXT: s_add_i32 s17, s17, 3 -; GFX9-NEXT: s_add_i32 s16, s16, 3 -; GFX9-NEXT: s_add_i32 s19, s19, 3 -; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: s_add_i32 s21, s21, 3 -; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: s_add_i32 s23, s23, 3 -; GFX9-NEXT: s_add_i32 s22, s22, 3 +; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: v_writelane_b32 v25, s46, 12 +; GFX9-NEXT: v_writelane_b32 v25, s47, 13 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[26:27], 24 ; GFX9-NEXT: s_add_i32 s25, s25, 3 ; GFX9-NEXT: s_add_i32 s24, s24, 3 -; GFX9-NEXT: s_add_i32 s26, s26, 3 -; GFX9-NEXT: v_writelane_b32 v30, s46, 48 -; GFX9-NEXT: s_lshr_b32 s46, s27, 16 -; GFX9-NEXT: s_lshr_b32 s83, s28, 8 -; GFX9-NEXT: s_lshr_b32 s81, s27, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 49 -; GFX9-NEXT: s_lshr_b32 s53, s27, 8 -; GFX9-NEXT: s_lshr_b32 s82, s26, 16 -; GFX9-NEXT: s_lshr_b32 s67, s26, 8 -; GFX9-NEXT: s_lshr_b32 s84, s25, 24 -; GFX9-NEXT: s_lshr_b32 s96, s25, 16 -; GFX9-NEXT: s_lshr_b32 s65, s25, 8 -; GFX9-NEXT: s_lshr_b32 s86, s24, 16 -; GFX9-NEXT: s_lshr_b32 s55, s24, 8 -; GFX9-NEXT: s_lshr_b32 s98, s23, 24 -; GFX9-NEXT: s_lshr_b32 s87, s23, 16 -; GFX9-NEXT: s_lshr_b32 s66, s23, 8 -; GFX9-NEXT: s_lshr_b32 s97, s22, 16 -; GFX9-NEXT: s_lshr_b32 s64, s22, 8 -; GFX9-NEXT: s_lshr_b32 s49, s21, 24 -; GFX9-NEXT: s_lshr_b32 s99, s21, 16 -; GFX9-NEXT: s_lshr_b32 s80, s21, 8 -; GFX9-NEXT: s_lshr_b32 s39, s20, 16 -; GFX9-NEXT: s_lshr_b32 s70, s20, 8 -; GFX9-NEXT: s_lshr_b32 s48, s19, 24 -; GFX9-NEXT: s_lshr_b32 s38, s19, 16 -; GFX9-NEXT: s_lshr_b32 s68, s19, 8 -; GFX9-NEXT: s_lshr_b32 s54, s18, 16 -; GFX9-NEXT: s_lshr_b32 s71, s18, 8 -; GFX9-NEXT: s_lshr_b32 s52, s17, 24 -; GFX9-NEXT: s_lshr_b32 s50, s17, 16 -; GFX9-NEXT: s_lshr_b32 s69, s17, 8 -; GFX9-NEXT: s_lshr_b32 s51, s16, 16 -; GFX9-NEXT: s_lshr_b32 s85, s16, 8 -; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; GFX9-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; GFX9-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; GFX9-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; GFX9-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; GFX9-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; GFX9-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; GFX9-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; GFX9-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; GFX9-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; GFX9-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; GFX9-NEXT: s_lshr_b64 s[92:93], s[24:25], 24 -; GFX9-NEXT: s_lshr_b64 s[94:95], s[22:23], 24 -; GFX9-NEXT: s_lshr_b64 s[30:31], s[20:21], 24 -; GFX9-NEXT: s_lshr_b64 s[34:35], s[18:19], 24 -; GFX9-NEXT: s_lshr_b64 s[36:37], s[16:17], 24 -; GFX9-NEXT: .LBB13_3: ; %end -; GFX9-NEXT: v_mov_b32_e32 v7, s36 +; GFX9-NEXT: v_writelane_b32 v25, s46, 10 +; GFX9-NEXT: v_writelane_b32 v25, s47, 11 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[24:25], 24 +; GFX9-NEXT: s_add_i32 s23, s23, 3 +; GFX9-NEXT: s_add_i32 s22, s22, 3 +; GFX9-NEXT: v_writelane_b32 v25, s46, 8 +; GFX9-NEXT: v_writelane_b32 v25, s47, 9 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[22:23], 24 +; GFX9-NEXT: s_add_i32 s21, s21, 3 +; GFX9-NEXT: s_add_i32 s20, s20, 3 +; GFX9-NEXT: v_writelane_b32 v25, s46, 6 +; GFX9-NEXT: v_writelane_b32 v25, s47, 7 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[20:21], 24 +; GFX9-NEXT: s_add_i32 s19, s19, 3 +; GFX9-NEXT: s_add_i32 s18, s18, 3 +; GFX9-NEXT: v_writelane_b32 v25, s46, 4 +; GFX9-NEXT: v_writelane_b32 v25, s47, 5 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[18:19], 24 +; GFX9-NEXT: s_add_i32 s17, s17, 3 +; GFX9-NEXT: s_add_i32 s16, s16, 3 +; GFX9-NEXT: v_writelane_b32 v25, s46, 2 +; GFX9-NEXT: v_writelane_b32 v25, s47, 3 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[16:17], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 0 +; GFX9-NEXT: v_writelane_b32 v25, s47, 1 +; GFX9-NEXT: s_lshr_b32 s46, s5, 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 33 +; GFX9-NEXT: s_lshr_b32 s46, s5, 16 +; GFX9-NEXT: v_writelane_b32 v25, s46, 34 +; GFX9-NEXT: s_lshr_b32 s46, s5, 8 +; GFX9-NEXT: v_writelane_b32 v25, s46, 35 +; GFX9-NEXT: s_lshr_b32 s46, s4, 16 +; GFX9-NEXT: v_writelane_b32 v25, s46, 36 +; GFX9-NEXT: s_lshr_b32 s46, s4, 8 +; GFX9-NEXT: v_writelane_b32 v25, s46, 37 +; GFX9-NEXT: s_lshr_b32 s46, s7, 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 38 +; GFX9-NEXT: s_lshr_b32 s46, s7, 16 +; GFX9-NEXT: v_writelane_b32 v25, s46, 39 +; GFX9-NEXT: s_lshr_b32 s46, s7, 8 +; GFX9-NEXT: v_writelane_b32 v25, s46, 40 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s19, 24 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 41 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s19, 16 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 42 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s19, 8 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 43 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s18, 16 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 44 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s18, 8 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 45 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s17, 24 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 46 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s17, 16 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 47 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s17, 8 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 48 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s16, 16 +; GFX9-NEXT: s_lshr_b32 s37, s6, 16 +; GFX9-NEXT: s_lshr_b32 s53, s6, 8 +; GFX9-NEXT: s_lshr_b32 s51, s9, 24 +; GFX9-NEXT: s_lshr_b32 s79, s9, 16 +; GFX9-NEXT: s_lshr_b32 s89, s9, 8 +; GFX9-NEXT: s_lshr_b32 s52, s8, 16 +; GFX9-NEXT: s_lshr_b32 s67, s8, 8 +; GFX9-NEXT: s_lshr_b32 s65, s11, 24 +; GFX9-NEXT: s_lshr_b32 s66, s11, 16 +; GFX9-NEXT: s_lshr_b32 s69, s11, 8 +; GFX9-NEXT: s_lshr_b32 s68, s10, 16 +; GFX9-NEXT: s_lshr_b32 s71, s10, 8 +; GFX9-NEXT: s_lshr_b32 s91, s13, 24 +; GFX9-NEXT: s_lshr_b32 s50, s13, 16 +; GFX9-NEXT: s_lshr_b32 s78, s13, 8 +; GFX9-NEXT: s_lshr_b32 s77, s12, 16 +; GFX9-NEXT: s_lshr_b32 s88, s12, 8 +; GFX9-NEXT: s_lshr_b32 s64, s15, 24 +; GFX9-NEXT: s_lshr_b32 s55, s15, 16 +; GFX9-NEXT: s_lshr_b32 s70, s15, 8 +; GFX9-NEXT: s_lshr_b32 s80, s14, 16 +; GFX9-NEXT: s_lshr_b32 s83, s14, 8 +; GFX9-NEXT: s_lshr_b32 s47, s41, 24 +; GFX9-NEXT: s_lshr_b32 s56, s41, 16 +; GFX9-NEXT: s_lshr_b32 s81, s41, 8 +; GFX9-NEXT: s_lshr_b32 s92, s40, 16 +; GFX9-NEXT: s_lshr_b32 s93, s40, 8 +; GFX9-NEXT: s_lshr_b32 s94, s43, 24 +; GFX9-NEXT: s_lshr_b32 s90, s43, 16 +; GFX9-NEXT: s_lshr_b32 s30, s43, 8 +; GFX9-NEXT: s_lshr_b32 s31, s42, 16 +; GFX9-NEXT: s_lshr_b32 s85, s42, 8 +; GFX9-NEXT: s_lshr_b32 s57, s45, 24 +; GFX9-NEXT: s_lshr_b32 s34, s45, 16 +; GFX9-NEXT: s_lshr_b32 s35, s45, 8 +; GFX9-NEXT: s_lshr_b32 s82, s44, 16 +; GFX9-NEXT: s_lshr_b32 s84, s44, 8 +; GFX9-NEXT: s_lshr_b32 s95, s29, 24 +; GFX9-NEXT: s_lshr_b32 s36, s29, 16 +; GFX9-NEXT: s_lshr_b32 s58, s29, 8 +; GFX9-NEXT: s_lshr_b32 s86, s28, 16 +; GFX9-NEXT: s_lshr_b32 s59, s28, 8 +; GFX9-NEXT: s_lshr_b32 s96, s27, 24 +; GFX9-NEXT: s_lshr_b32 s61, s27, 16 +; GFX9-NEXT: s_lshr_b32 s60, s27, 8 +; GFX9-NEXT: s_lshr_b32 s62, s26, 16 +; GFX9-NEXT: s_lshr_b32 s87, s26, 8 +; GFX9-NEXT: s_lshr_b32 s98, s25, 24 +; GFX9-NEXT: s_lshr_b32 s97, s25, 16 +; GFX9-NEXT: s_lshr_b32 s63, s25, 8 +; GFX9-NEXT: s_lshr_b32 s73, s24, 16 +; GFX9-NEXT: s_lshr_b32 s38, s24, 8 +; GFX9-NEXT: s_lshr_b32 s72, s23, 24 +; GFX9-NEXT: s_lshr_b32 s39, s23, 16 +; GFX9-NEXT: s_lshr_b32 s99, s23, 8 +; GFX9-NEXT: s_lshr_b32 s75, s22, 16 +; GFX9-NEXT: s_lshr_b32 s48, s22, 8 +; GFX9-NEXT: s_lshr_b32 s74, s21, 24 +; GFX9-NEXT: s_lshr_b32 s54, s21, 16 +; GFX9-NEXT: s_lshr_b32 s49, s21, 8 +; GFX9-NEXT: s_lshr_b32 s76, s20, 16 +; GFX9-NEXT: s_lshr_b32 s46, s20, 8 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 49 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s16, 8 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 50 +; GFX9-NEXT: .LBB13_5: ; %end +; GFX9-NEXT: v_readlane_b32 vcc_lo, v25, 50 +; GFX9-NEXT: v_mov_b32_e32 v2, vcc_lo ; GFX9-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; GFX9-NEXT: v_mov_b32_e32 v2, s85 -; GFX9-NEXT: v_perm_b32 v7, s51, v7, v1 -; GFX9-NEXT: v_perm_b32 v3, s16, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v21, s52 -; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: v_mov_b32_e32 v4, s69 -; GFX9-NEXT: v_perm_b32 v21, s50, v21, v1 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v7 -; GFX9-NEXT: v_perm_b32 v2, s17, v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v11, s34 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v21 -; GFX9-NEXT: v_mov_b32_e32 v4, s71 -; GFX9-NEXT: v_perm_b32 v11, s54, v11, v1 +; GFX9-NEXT: v_readlane_b32 vcc_lo, v25, 0 +; GFX9-NEXT: v_perm_b32 v2, s16, v2, v1 +; GFX9-NEXT: v_mov_b32_e32 v3, vcc_lo +; GFX9-NEXT: v_readlane_b32 s16, v25, 49 +; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 48 +; GFX9-NEXT: v_mov_b32_e32 v4, s16 +; GFX9-NEXT: v_readlane_b32 s16, v25, 46 +; GFX9-NEXT: v_mov_b32_e32 v5, s16 +; GFX9-NEXT: v_readlane_b32 s16, v25, 47 +; GFX9-NEXT: v_perm_b32 v5, s16, v5, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 45 +; GFX9-NEXT: v_perm_b32 v4, s17, v4, v1 +; GFX9-NEXT: v_mov_b32_e32 v6, s16 +; GFX9-NEXT: v_readlane_b32 s16, v25, 2 +; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_mov_b32_e32 v7, s16 +; GFX9-NEXT: v_readlane_b32 s16, v25, 44 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_perm_b32 v5, s18, v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v22, s48 +; GFX9-NEXT: v_perm_b32 v7, s16, v7, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 43 +; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v5 +; GFX9-NEXT: v_mov_b32_e32 v8, s16 +; GFX9-NEXT: v_readlane_b32 s16, v25, 41 +; GFX9-NEXT: v_or_b32_e32 v2, v4, v2 +; GFX9-NEXT: v_perm_b32 v6, s18, v6, v1 +; GFX9-NEXT: v_readlane_b32 s17, v25, 3 +; GFX9-NEXT: v_mov_b32_e32 v9, s16 +; GFX9-NEXT: v_readlane_b32 s16, v25, 42 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v11 -; GFX9-NEXT: v_mov_b32_e32 v6, s68 -; GFX9-NEXT: v_perm_b32 v22, s38, v22, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v5, v2 -; GFX9-NEXT: v_perm_b32 v4, s19, v6, v1 -; GFX9-NEXT: v_mov_b32_e32 v14, s30 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v7 +; GFX9-NEXT: v_perm_b32 v9, s16, v9, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 4 +; GFX9-NEXT: v_or_b32_e32 v2, v6, v2 +; GFX9-NEXT: v_perm_b32 v8, s19, v8, v1 +; GFX9-NEXT: v_mov_b32_e32 v11, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v22 -; GFX9-NEXT: v_mov_b32_e32 v6, s70 -; GFX9-NEXT: v_perm_b32 v14, s39, v14, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v4, v2 -; GFX9-NEXT: v_perm_b32 v8, s20, v6, v1 -; GFX9-NEXT: v_mov_b32_e32 v23, s49 -; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v14 -; GFX9-NEXT: v_mov_b32_e32 v9, s80 -; GFX9-NEXT: v_perm_b32 v23, s99, v23, v1 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v9 +; GFX9-NEXT: v_mov_b32_e32 v10, s46 +; GFX9-NEXT: v_perm_b32 v11, s76, v11, v1 ; GFX9-NEXT: v_or_b32_e32 v2, v8, v2 -; GFX9-NEXT: v_perm_b32 v6, s21, v9, v1 -; GFX9-NEXT: v_mov_b32_e32 v15, s94 +; GFX9-NEXT: v_perm_b32 v10, s20, v10, v1 +; GFX9-NEXT: v_readlane_b32 s17, v25, 5 +; GFX9-NEXT: v_mov_b32_e32 v13, s74 +; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v11 +; GFX9-NEXT: v_mov_b32_e32 v12, s49 +; GFX9-NEXT: v_perm_b32 v13, s54, v13, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 6 +; GFX9-NEXT: v_or_b32_e32 v2, v10, v2 +; GFX9-NEXT: v_perm_b32 v12, s21, v12, v1 +; GFX9-NEXT: v_mov_b32_e32 v15, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v23 -; GFX9-NEXT: v_mov_b32_e32 v9, s64 -; GFX9-NEXT: v_perm_b32 v15, s97, v15, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v6, v2 -; GFX9-NEXT: v_perm_b32 v10, s22, v9, v1 -; GFX9-NEXT: v_mov_b32_e32 v24, s98 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v13 +; GFX9-NEXT: v_mov_b32_e32 v14, s48 +; GFX9-NEXT: v_perm_b32 v15, s75, v15, v1 +; GFX9-NEXT: v_or_b32_e32 v2, v12, v2 +; GFX9-NEXT: v_perm_b32 v14, s22, v14, v1 +; GFX9-NEXT: v_readlane_b32 s17, v25, 7 +; GFX9-NEXT: v_mov_b32_e32 v17, s72 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v15 -; GFX9-NEXT: v_mov_b32_e32 v12, s66 -; GFX9-NEXT: v_perm_b32 v24, s87, v24, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v10, v2 -; GFX9-NEXT: v_perm_b32 v9, s23, v12, v1 -; GFX9-NEXT: v_mov_b32_e32 v16, s92 +; GFX9-NEXT: v_mov_b32_e32 v16, s99 +; GFX9-NEXT: v_perm_b32 v17, s39, v17, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 8 +; GFX9-NEXT: v_or_b32_e32 v2, v14, v2 +; GFX9-NEXT: v_perm_b32 v16, s23, v16, v1 +; GFX9-NEXT: v_mov_b32_e32 v19, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v24 -; GFX9-NEXT: v_mov_b32_e32 v12, s55 -; GFX9-NEXT: v_perm_b32 v16, s86, v16, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v9, v2 -; GFX9-NEXT: v_perm_b32 v13, s24, v12, v1 -; GFX9-NEXT: v_mov_b32_e32 v25, s84 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v17 +; GFX9-NEXT: v_mov_b32_e32 v18, s38 +; GFX9-NEXT: v_perm_b32 v19, s73, v19, v1 +; GFX9-NEXT: v_or_b32_e32 v2, v16, v2 +; GFX9-NEXT: v_perm_b32 v18, s24, v18, v1 +; GFX9-NEXT: v_mov_b32_e32 v21, s98 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v16 -; GFX9-NEXT: v_mov_b32_e32 v17, s65 -; GFX9-NEXT: v_perm_b32 v25, s96, v25, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v13, v2 -; GFX9-NEXT: v_perm_b32 v12, s25, v17, v1 -; GFX9-NEXT: v_mov_b32_e32 v17, s90 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v19 +; GFX9-NEXT: v_readlane_b32 s17, v25, 9 +; GFX9-NEXT: v_mov_b32_e32 v20, s63 +; GFX9-NEXT: v_perm_b32 v21, s97, v21, v1 +; GFX9-NEXT: v_or_b32_e32 v2, v18, v2 +; GFX9-NEXT: v_perm_b32 v20, s25, v20, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 10 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v25 -; GFX9-NEXT: v_mov_b32_e32 v18, s67 -; GFX9-NEXT: v_perm_b32 v17, s82, v17, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v12, v2 -; GFX9-NEXT: v_perm_b32 v18, s26, v18, v1 -; GFX9-NEXT: v_mov_b32_e32 v26, s81 -; GFX9-NEXT: v_readlane_b32 s16, v30, 49 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v21 +; GFX9-NEXT: v_mov_b32_e32 v23, s16 +; GFX9-NEXT: v_or_b32_e32 v2, v20, v2 +; GFX9-NEXT: v_mov_b32_e32 v22, s87 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v17 -; GFX9-NEXT: v_mov_b32_e32 v19, s53 -; GFX9-NEXT: v_perm_b32 v26, s16, v26, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v18, v2 -; GFX9-NEXT: v_perm_b32 v19, s27, v19, v1 -; GFX9-NEXT: v_mov_b32_e32 v20, s88 -; GFX9-NEXT: v_readlane_b32 s16, v30, 48 +; GFX9-NEXT: v_perm_b32 v2, s62, v23, v1 +; GFX9-NEXT: v_perm_b32 v22, s26, v22, v1 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v2, v22, v2 +; GFX9-NEXT: v_mov_b32_e32 v3, s96 +; GFX9-NEXT: v_readlane_b32 s17, v25, 11 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v26 -; GFX9-NEXT: v_mov_b32_e32 v27, s83 -; GFX9-NEXT: v_perm_b32 v20, s16, v20, v1 -; GFX9-NEXT: v_readlane_b32 s16, v30, 47 -; GFX9-NEXT: v_or_b32_e32 v2, v19, v2 -; GFX9-NEXT: v_mov_b32_e32 v28, s16 -; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_perm_b32 v2, s28, v27, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v20 -; GFX9-NEXT: v_readlane_b32 s16, v30, 45 +; GFX9-NEXT: v_mov_b32_e32 v2, s60 +; GFX9-NEXT: v_perm_b32 v3, s61, v3, v1 +; GFX9-NEXT: v_perm_b32 v2, s27, v2, v1 +; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s16, v25, 12 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX9-NEXT: v_mov_b32_e32 v3, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 46 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44 +; GFX9-NEXT: v_mov_b32_e32 v2, s59 +; GFX9-NEXT: v_perm_b32 v3, s86, v3, v1 +; GFX9-NEXT: v_perm_b32 v2, s28, v2, v1 +; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 +; GFX9-NEXT: v_mov_b32_e32 v3, s95 +; GFX9-NEXT: v_readlane_b32 s17, v25, 13 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v2, s29, v28, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s58 +; GFX9-NEXT: v_perm_b32 v3, s36, v3, v1 +; GFX9-NEXT: v_perm_b32 v2, s29, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s16, v25, 14 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 44 +; GFX9-NEXT: v_mov_b32_e32 v3, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_mov_b32_e32 v3, s78 -; GFX9-NEXT: v_readlane_b32 s16, v30, 43 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s84 +; GFX9-NEXT: v_perm_b32 v3, s82, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s44, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 42 +; GFX9-NEXT: v_mov_b32_e32 v3, s57 +; GFX9-NEXT: v_readlane_b32 s17, v25, 15 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 40 -; GFX9-NEXT: v_mov_b32_e32 v3, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 41 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s35 +; GFX9-NEXT: v_perm_b32 v3, s34, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s45, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s16, v25, 16 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 39 +; GFX9-NEXT: v_mov_b32_e32 v3, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_mov_b32_e32 v3, s76 -; GFX9-NEXT: v_readlane_b32 s16, v30, 38 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s85 +; GFX9-NEXT: v_perm_b32 v3, s31, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s42, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 37 +; GFX9-NEXT: v_mov_b32_e32 v3, s94 +; GFX9-NEXT: v_readlane_b32 s17, v25, 17 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 35 -; GFX9-NEXT: v_mov_b32_e32 v3, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 36 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s30 +; GFX9-NEXT: v_perm_b32 v3, s90, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s43, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s16, v25, 18 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 34 +; GFX9-NEXT: v_mov_b32_e32 v3, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_mov_b32_e32 v3, s74 -; GFX9-NEXT: v_readlane_b32 s16, v30, 33 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s93 +; GFX9-NEXT: v_perm_b32 v3, s92, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s40, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 32 +; GFX9-NEXT: v_mov_b32_e32 v3, s47 +; GFX9-NEXT: v_readlane_b32 s17, v25, 19 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 30 -; GFX9-NEXT: v_mov_b32_e32 v3, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 31 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s81 +; GFX9-NEXT: v_perm_b32 v3, s56, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s41, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s16, v25, 20 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 29 +; GFX9-NEXT: v_mov_b32_e32 v3, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 +; GFX9-NEXT: v_mov_b32_e32 v2, s83 +; GFX9-NEXT: v_perm_b32 v3, s80, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s14, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s72 -; GFX9-NEXT: v_readlane_b32 s14, v30, 28 -; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s14, v30, 27 +; GFX9-NEXT: v_mov_b32_e32 v3, s64 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: v_mov_b32_e32 v2, s14 -; GFX9-NEXT: v_readlane_b32 s14, v30, 25 -; GFX9-NEXT: v_mov_b32_e32 v3, s14 -; GFX9-NEXT: v_readlane_b32 s14, v30, 26 -; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s70 +; GFX9-NEXT: v_perm_b32 v3, s55, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s15, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s14, v25, 22 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s14, v30, 24 +; GFX9-NEXT: v_mov_b32_e32 v3, s14 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: v_mov_b32_e32 v2, s14 +; GFX9-NEXT: v_mov_b32_e32 v2, s88 +; GFX9-NEXT: v_perm_b32 v3, s77, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s12, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s62 -; GFX9-NEXT: v_readlane_b32 s12, v30, 23 -; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s12, v30, 22 +; GFX9-NEXT: v_mov_b32_e32 v3, s91 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: v_mov_b32_e32 v2, s12 -; GFX9-NEXT: v_readlane_b32 s12, v30, 20 -; GFX9-NEXT: v_mov_b32_e32 v3, s12 -; GFX9-NEXT: v_readlane_b32 s12, v30, 21 -; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s78 +; GFX9-NEXT: v_perm_b32 v3, s50, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s13, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s12, v25, 24 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s12, v30, 19 +; GFX9-NEXT: v_mov_b32_e32 v3, s12 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: v_mov_b32_e32 v2, s12 +; GFX9-NEXT: v_mov_b32_e32 v2, s71 +; GFX9-NEXT: v_perm_b32 v3, s68, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s10, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s60 -; GFX9-NEXT: v_readlane_b32 s10, v30, 18 -; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s10, v30, 17 +; GFX9-NEXT: v_mov_b32_e32 v3, s65 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: v_mov_b32_e32 v2, s10 -; GFX9-NEXT: v_readlane_b32 s10, v30, 15 -; GFX9-NEXT: v_mov_b32_e32 v3, s10 -; GFX9-NEXT: v_readlane_b32 s10, v30, 16 -; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s69 +; GFX9-NEXT: v_perm_b32 v3, s66, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s11, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s10, v25, 26 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s10, v30, 14 +; GFX9-NEXT: v_mov_b32_e32 v3, s10 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: v_mov_b32_e32 v2, s10 +; GFX9-NEXT: v_mov_b32_e32 v2, s67 +; GFX9-NEXT: v_perm_b32 v3, s52, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s8, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s58 -; GFX9-NEXT: v_readlane_b32 s8, v30, 13 -; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s8, v30, 12 +; GFX9-NEXT: v_mov_b32_e32 v3, s51 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104 -; GFX9-NEXT: v_mov_b32_e32 v2, s8 -; GFX9-NEXT: v_readlane_b32 s8, v30, 10 -; GFX9-NEXT: v_mov_b32_e32 v3, s8 -; GFX9-NEXT: v_readlane_b32 s8, v30, 11 -; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s89 +; GFX9-NEXT: v_perm_b32 v3, s79, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s9, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s8, v25, 28 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s8, v30, 9 +; GFX9-NEXT: v_mov_b32_e32 v3, s8 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: v_mov_b32_e32 v2, s8 +; GFX9-NEXT: v_mov_b32_e32 v2, s53 +; GFX9-NEXT: v_perm_b32 v3, s37, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s6, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s56 -; GFX9-NEXT: v_readlane_b32 s6, v30, 8 -; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s6, v30, 7 +; GFX9-NEXT: v_readlane_b32 s6, v25, 40 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112 ; GFX9-NEXT: v_mov_b32_e32 v2, s6 -; GFX9-NEXT: v_readlane_b32 s6, v30, 5 +; GFX9-NEXT: v_readlane_b32 s6, v25, 38 ; GFX9-NEXT: v_mov_b32_e32 v3, s6 -; GFX9-NEXT: v_readlane_b32 s6, v30, 6 +; GFX9-NEXT: v_readlane_b32 s6, v25, 39 ; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s7, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s6, v30, 4 +; GFX9-NEXT: v_readlane_b32 s6, v25, 37 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116 ; GFX9-NEXT: v_mov_b32_e32 v2, s6 +; GFX9-NEXT: v_readlane_b32 s6, v25, 30 ; GFX9-NEXT: v_perm_b32 v2, s4, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s46 -; GFX9-NEXT: v_readlane_b32 s4, v30, 3 +; GFX9-NEXT: v_mov_b32_e32 v3, s6 +; GFX9-NEXT: v_readlane_b32 s4, v25, 36 ; GFX9-NEXT: v_perm_b32 v3, s4, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s4, v30, 2 +; GFX9-NEXT: v_readlane_b32 s4, v25, 35 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120 ; GFX9-NEXT: v_mov_b32_e32 v2, s4 -; GFX9-NEXT: v_readlane_b32 s4, v30, 0 +; GFX9-NEXT: v_readlane_b32 s4, v25, 33 ; GFX9-NEXT: v_mov_b32_e32 v3, s4 -; GFX9-NEXT: v_readlane_b32 s4, v30, 1 +; GFX9-NEXT: v_readlane_b32 s4, v25, 34 ; GFX9-NEXT: v_perm_b32 v2, s5, v2, v1 ; GFX9-NEXT: v_perm_b32 v1, s4, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_or_b32_e32 v1, v2, v1 -; GFX9-NEXT: v_readlane_b32 s30, v29, 34 +; GFX9-NEXT: v_readlane_b32 s30, v24, 34 +; GFX9-NEXT: v_readlane_b32 vcc_hi, v25, 1 +; GFX9-NEXT: v_readlane_b32 s17, v25, 21 +; GFX9-NEXT: v_readlane_b32 s15, v25, 23 +; GFX9-NEXT: v_readlane_b32 s13, v25, 25 +; GFX9-NEXT: v_readlane_b32 s11, v25, 27 +; GFX9-NEXT: v_readlane_b32 s9, v25, 29 +; GFX9-NEXT: v_readlane_b32 s7, v25, 31 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 -; GFX9-NEXT: v_readlane_b32 s31, v29, 35 -; GFX9-NEXT: v_readlane_b32 s99, v29, 33 -; GFX9-NEXT: v_readlane_b32 s98, v29, 32 -; GFX9-NEXT: v_readlane_b32 s97, v29, 31 -; GFX9-NEXT: v_readlane_b32 s96, v29, 30 -; GFX9-NEXT: v_readlane_b32 s87, v29, 29 -; GFX9-NEXT: v_readlane_b32 s86, v29, 28 -; GFX9-NEXT: v_readlane_b32 s85, v29, 27 -; GFX9-NEXT: v_readlane_b32 s84, v29, 26 -; GFX9-NEXT: v_readlane_b32 s83, v29, 25 -; GFX9-NEXT: v_readlane_b32 s82, v29, 24 -; GFX9-NEXT: v_readlane_b32 s81, v29, 23 -; GFX9-NEXT: v_readlane_b32 s80, v29, 22 -; GFX9-NEXT: v_readlane_b32 s71, v29, 21 -; GFX9-NEXT: v_readlane_b32 s70, v29, 20 -; GFX9-NEXT: v_readlane_b32 s69, v29, 19 -; GFX9-NEXT: v_readlane_b32 s68, v29, 18 -; GFX9-NEXT: v_readlane_b32 s67, v29, 17 -; GFX9-NEXT: v_readlane_b32 s66, v29, 16 -; GFX9-NEXT: v_readlane_b32 s65, v29, 15 -; GFX9-NEXT: v_readlane_b32 s64, v29, 14 -; GFX9-NEXT: v_readlane_b32 s55, v29, 13 -; GFX9-NEXT: v_readlane_b32 s54, v29, 12 -; GFX9-NEXT: v_readlane_b32 s53, v29, 11 -; GFX9-NEXT: v_readlane_b32 s52, v29, 10 -; GFX9-NEXT: v_readlane_b32 s51, v29, 9 -; GFX9-NEXT: v_readlane_b32 s50, v29, 8 -; GFX9-NEXT: v_readlane_b32 s49, v29, 7 -; GFX9-NEXT: v_readlane_b32 s48, v29, 6 -; GFX9-NEXT: v_readlane_b32 s39, v29, 5 -; GFX9-NEXT: v_readlane_b32 s38, v29, 4 -; GFX9-NEXT: v_readlane_b32 s37, v29, 3 -; GFX9-NEXT: v_readlane_b32 s36, v29, 2 -; GFX9-NEXT: v_readlane_b32 s35, v29, 1 -; GFX9-NEXT: v_readlane_b32 s34, v29, 0 +; GFX9-NEXT: v_readlane_b32 s31, v24, 35 +; GFX9-NEXT: v_readlane_b32 s99, v24, 33 +; GFX9-NEXT: v_readlane_b32 s98, v24, 32 +; GFX9-NEXT: v_readlane_b32 s97, v24, 31 +; GFX9-NEXT: v_readlane_b32 s96, v24, 30 +; GFX9-NEXT: v_readlane_b32 s87, v24, 29 +; GFX9-NEXT: v_readlane_b32 s86, v24, 28 +; GFX9-NEXT: v_readlane_b32 s85, v24, 27 +; GFX9-NEXT: v_readlane_b32 s84, v24, 26 +; GFX9-NEXT: v_readlane_b32 s83, v24, 25 +; GFX9-NEXT: v_readlane_b32 s82, v24, 24 +; GFX9-NEXT: v_readlane_b32 s81, v24, 23 +; GFX9-NEXT: v_readlane_b32 s80, v24, 22 +; GFX9-NEXT: v_readlane_b32 s71, v24, 21 +; GFX9-NEXT: v_readlane_b32 s70, v24, 20 +; GFX9-NEXT: v_readlane_b32 s69, v24, 19 +; GFX9-NEXT: v_readlane_b32 s68, v24, 18 +; GFX9-NEXT: v_readlane_b32 s67, v24, 17 +; GFX9-NEXT: v_readlane_b32 s66, v24, 16 +; GFX9-NEXT: v_readlane_b32 s65, v24, 15 +; GFX9-NEXT: v_readlane_b32 s64, v24, 14 +; GFX9-NEXT: v_readlane_b32 s55, v24, 13 +; GFX9-NEXT: v_readlane_b32 s54, v24, 12 +; GFX9-NEXT: v_readlane_b32 s53, v24, 11 +; GFX9-NEXT: v_readlane_b32 s52, v24, 10 +; GFX9-NEXT: v_readlane_b32 s51, v24, 9 +; GFX9-NEXT: v_readlane_b32 s50, v24, 8 +; GFX9-NEXT: v_readlane_b32 s49, v24, 7 +; GFX9-NEXT: v_readlane_b32 s48, v24, 6 +; GFX9-NEXT: v_readlane_b32 s39, v24, 5 +; GFX9-NEXT: v_readlane_b32 s38, v24, 4 +; GFX9-NEXT: v_readlane_b32 s37, v24, 3 +; GFX9-NEXT: v_readlane_b32 s36, v24, 2 +; GFX9-NEXT: v_readlane_b32 s35, v24, 1 +; GFX9-NEXT: v_readlane_b32 s34, v24, 0 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] -; GFX9-NEXT: .LBB13_4: -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr85 -; GFX9-NEXT: ; implicit-def: $sgpr51 -; GFX9-NEXT: ; implicit-def: $sgpr69 -; GFX9-NEXT: ; implicit-def: $sgpr50 -; GFX9-NEXT: ; implicit-def: $sgpr52 -; GFX9-NEXT: ; implicit-def: $sgpr71 -; GFX9-NEXT: ; implicit-def: $sgpr54 -; GFX9-NEXT: ; implicit-def: $sgpr68 -; GFX9-NEXT: ; implicit-def: $sgpr38 -; GFX9-NEXT: ; implicit-def: $sgpr48 -; GFX9-NEXT: ; implicit-def: $sgpr70 -; GFX9-NEXT: ; implicit-def: $sgpr39 -; GFX9-NEXT: ; implicit-def: $sgpr80 -; GFX9-NEXT: ; implicit-def: $sgpr99 -; GFX9-NEXT: ; implicit-def: $sgpr49 -; GFX9-NEXT: ; implicit-def: $sgpr64 -; GFX9-NEXT: ; implicit-def: $sgpr97 -; GFX9-NEXT: ; implicit-def: $sgpr66 -; GFX9-NEXT: ; implicit-def: $sgpr87 -; GFX9-NEXT: ; implicit-def: $sgpr98 -; GFX9-NEXT: ; implicit-def: $sgpr55 -; GFX9-NEXT: ; implicit-def: $sgpr86 -; GFX9-NEXT: ; implicit-def: $sgpr65 -; GFX9-NEXT: ; implicit-def: $sgpr96 -; GFX9-NEXT: ; implicit-def: $sgpr84 -; GFX9-NEXT: ; implicit-def: $sgpr67 -; GFX9-NEXT: ; implicit-def: $sgpr82 -; GFX9-NEXT: ; implicit-def: $sgpr53 -; GFX9-NEXT: ; implicit-def: $sgpr81 -; GFX9-NEXT: ; implicit-def: $sgpr83 -; GFX9-NEXT: ; implicit-def: $sgpr36 -; GFX9-NEXT: ; implicit-def: $sgpr34 -; GFX9-NEXT: ; implicit-def: $sgpr30 -; GFX9-NEXT: ; implicit-def: $sgpr94 -; GFX9-NEXT: ; implicit-def: $sgpr92 -; GFX9-NEXT: ; implicit-def: $sgpr90 -; GFX9-NEXT: ; implicit-def: $sgpr88 -; GFX9-NEXT: ; implicit-def: $sgpr78 -; GFX9-NEXT: ; implicit-def: $sgpr76 -; GFX9-NEXT: ; implicit-def: $sgpr74 -; GFX9-NEXT: ; implicit-def: $sgpr72 -; GFX9-NEXT: ; implicit-def: $sgpr62 -; GFX9-NEXT: ; implicit-def: $sgpr60 -; GFX9-NEXT: ; implicit-def: $sgpr58 -; GFX9-NEXT: ; implicit-def: $sgpr56 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: s_branch .LBB13_2 ; ; GFX11-LABEL: bitcast_v32i32_to_v128i8_scalar: ; GFX11: ; %bb.0: ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_xor_saveexec_b32 s4, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill -; GFX11-NEXT: scratch_store_b32 off, v23, s32 -; GFX11-NEXT: scratch_store_b32 off, v24, s32 offset:4 -; GFX11-NEXT: scratch_store_b32 off, v25, s32 offset:8 -; GFX11-NEXT: scratch_store_b32 off, v26, s32 offset:12 +; GFX11-NEXT: scratch_store_b32 off, v19, s32 +; GFX11-NEXT: scratch_store_b32 off, v20, s32 offset:4 +; GFX11-NEXT: scratch_store_b32 off, v21, s32 offset:8 +; GFX11-NEXT: scratch_store_b32 off, v22, s32 offset:12 ; GFX11-NEXT: s_mov_b32 exec_lo, s4 -; GFX11-NEXT: v_writelane_b32 v23, s34, 0 -; GFX11-NEXT: v_writelane_b32 v23, s35, 1 -; GFX11-NEXT: v_writelane_b32 v23, s36, 2 -; GFX11-NEXT: v_writelane_b32 v23, s37, 3 -; GFX11-NEXT: v_writelane_b32 v23, s38, 4 -; GFX11-NEXT: v_writelane_b32 v23, s39, 5 -; GFX11-NEXT: v_writelane_b32 v23, s48, 6 -; GFX11-NEXT: v_writelane_b32 v23, s49, 7 -; GFX11-NEXT: v_writelane_b32 v23, s50, 8 -; GFX11-NEXT: v_writelane_b32 v23, s51, 9 -; GFX11-NEXT: v_writelane_b32 v23, s52, 10 -; GFX11-NEXT: v_writelane_b32 v23, s53, 11 -; GFX11-NEXT: v_writelane_b32 v23, s54, 12 -; GFX11-NEXT: v_writelane_b32 v23, s55, 13 -; GFX11-NEXT: v_writelane_b32 v23, s64, 14 -; GFX11-NEXT: v_writelane_b32 v23, s65, 15 -; GFX11-NEXT: v_writelane_b32 v23, s66, 16 -; GFX11-NEXT: v_writelane_b32 v23, s67, 17 -; GFX11-NEXT: v_writelane_b32 v23, s68, 18 -; GFX11-NEXT: v_writelane_b32 v23, s69, 19 -; GFX11-NEXT: v_writelane_b32 v23, s70, 20 -; GFX11-NEXT: v_writelane_b32 v23, s71, 21 -; GFX11-NEXT: v_writelane_b32 v23, s80, 22 -; GFX11-NEXT: v_writelane_b32 v23, s81, 23 -; GFX11-NEXT: v_writelane_b32 v23, s82, 24 -; GFX11-NEXT: v_writelane_b32 v23, s83, 25 -; GFX11-NEXT: v_writelane_b32 v23, s84, 26 -; GFX11-NEXT: v_writelane_b32 v23, s85, 27 -; GFX11-NEXT: v_writelane_b32 v23, s86, 28 -; GFX11-NEXT: v_writelane_b32 v23, s87, 29 -; GFX11-NEXT: v_writelane_b32 v23, s96, 30 -; GFX11-NEXT: v_writelane_b32 v23, s97, 31 -; GFX11-NEXT: v_writelane_b32 v24, s98, 0 -; GFX11-NEXT: v_writelane_b32 v24, s99, 1 -; GFX11-NEXT: v_writelane_b32 v24, s100, 2 -; GFX11-NEXT: v_writelane_b32 v24, s101, 3 -; GFX11-NEXT: v_writelane_b32 v24, s102, 4 -; GFX11-NEXT: v_writelane_b32 v24, s103, 5 -; GFX11-NEXT: v_writelane_b32 v24, s104, 6 -; GFX11-NEXT: v_writelane_b32 v24, s30, 7 -; GFX11-NEXT: v_writelane_b32 v24, s31, 8 +; GFX11-NEXT: v_writelane_b32 v19, s34, 0 +; GFX11-NEXT: v_writelane_b32 v19, s35, 1 +; GFX11-NEXT: v_writelane_b32 v19, s36, 2 +; GFX11-NEXT: v_writelane_b32 v19, s37, 3 +; GFX11-NEXT: v_writelane_b32 v19, s38, 4 +; GFX11-NEXT: v_writelane_b32 v19, s39, 5 +; GFX11-NEXT: v_writelane_b32 v19, s48, 6 +; GFX11-NEXT: v_writelane_b32 v19, s49, 7 +; GFX11-NEXT: v_writelane_b32 v19, s50, 8 +; GFX11-NEXT: v_writelane_b32 v19, s51, 9 +; GFX11-NEXT: v_writelane_b32 v19, s52, 10 +; GFX11-NEXT: v_writelane_b32 v19, s53, 11 +; GFX11-NEXT: v_writelane_b32 v19, s54, 12 +; GFX11-NEXT: v_writelane_b32 v19, s55, 13 +; GFX11-NEXT: v_writelane_b32 v19, s64, 14 +; GFX11-NEXT: v_writelane_b32 v19, s65, 15 +; GFX11-NEXT: v_writelane_b32 v19, s66, 16 +; GFX11-NEXT: v_writelane_b32 v19, s67, 17 +; GFX11-NEXT: v_writelane_b32 v19, s68, 18 +; GFX11-NEXT: v_writelane_b32 v19, s69, 19 +; GFX11-NEXT: v_writelane_b32 v19, s70, 20 +; GFX11-NEXT: v_writelane_b32 v19, s71, 21 +; GFX11-NEXT: v_writelane_b32 v19, s80, 22 +; GFX11-NEXT: v_writelane_b32 v19, s81, 23 +; GFX11-NEXT: v_writelane_b32 v19, s82, 24 +; GFX11-NEXT: v_writelane_b32 v19, s83, 25 +; GFX11-NEXT: v_writelane_b32 v19, s84, 26 +; GFX11-NEXT: v_writelane_b32 v19, s85, 27 +; GFX11-NEXT: v_writelane_b32 v19, s86, 28 +; GFX11-NEXT: v_writelane_b32 v19, s87, 29 +; GFX11-NEXT: v_writelane_b32 v19, s96, 30 +; GFX11-NEXT: v_writelane_b32 v19, s97, 31 +; GFX11-NEXT: v_writelane_b32 v20, s98, 0 +; GFX11-NEXT: v_writelane_b32 v20, s99, 1 +; GFX11-NEXT: v_writelane_b32 v20, s100, 2 +; GFX11-NEXT: v_writelane_b32 v20, s101, 3 +; GFX11-NEXT: v_writelane_b32 v20, s102, 4 +; GFX11-NEXT: v_writelane_b32 v20, s103, 5 +; GFX11-NEXT: v_writelane_b32 v20, s104, 6 +; GFX11-NEXT: v_writelane_b32 v20, s30, 7 +; GFX11-NEXT: v_writelane_b32 v20, s31, 8 ; GFX11-NEXT: v_readfirstlane_b32 s42, v15 ; GFX11-NEXT: v_readfirstlane_b32 s5, v14 ; GFX11-NEXT: v_readfirstlane_b32 s4, v13 @@ -10904,716 +10941,710 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3 ; GFX11-NEXT: v_readfirstlane_b32 s40, v1 ; GFX11-NEXT: s_cmp_lg_u32 s42, 0 ; GFX11-NEXT: s_mov_b32 vcc_lo, 0 -; GFX11-NEXT: ; implicit-def: $vgpr26 : SGPR spill to VGPR lane -; GFX11-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane -; GFX11-NEXT: s_cbranch_scc0 .LBB13_4 +; GFX11-NEXT: ; implicit-def: $vgpr22 : SGPR spill to VGPR lane +; GFX11-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane +; GFX11-NEXT: s_cbranch_scc0 .LBB13_2 ; GFX11-NEXT: ; %bb.1: ; %cmp.false ; GFX11-NEXT: s_lshr_b32 s42, s5, 24 -; GFX11-NEXT: s_lshr_b32 vcc_hi, s27, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 0 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[4:5], 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 28 ; GFX11-NEXT: s_lshr_b32 s42, s5, 16 -; GFX11-NEXT: s_lshr_b32 s34, s27, 16 -; GFX11-NEXT: s_lshr_b32 s35, s27, 8 -; GFX11-NEXT: s_lshr_b32 s37, s26, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 1 +; GFX11-NEXT: s_lshr_b32 s84, s25, 8 +; GFX11-NEXT: s_lshr_b32 s86, s24, 16 +; GFX11-NEXT: s_lshr_b32 s98, s9, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 29 ; GFX11-NEXT: s_lshr_b32 s42, s5, 8 -; GFX11-NEXT: s_lshr_b32 s36, s26, 8 -; GFX11-NEXT: s_lshr_b32 s39, s25, 24 -; GFX11-NEXT: s_lshr_b32 s48, s25, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 2 +; GFX11-NEXT: s_lshr_b32 s100, s8, 16 +; GFX11-NEXT: s_lshr_b32 s102, s10, 16 +; GFX11-NEXT: s_lshr_b32 s43, s27, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 30 ; GFX11-NEXT: s_lshr_b32 s42, s4, 16 -; GFX11-NEXT: s_lshr_b32 s38, s25, 8 -; GFX11-NEXT: s_lshr_b32 s50, s24, 16 -; GFX11-NEXT: s_lshr_b32 s49, s24, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 3 +; GFX11-NEXT: s_lshr_b32 s96, s23, 24 +; GFX11-NEXT: s_lshr_b64 s[44:45], s[24:25], 24 +; GFX11-NEXT: s_lshr_b64 s[68:69], s[28:29], 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 31 ; GFX11-NEXT: s_lshr_b32 s42, s4, 8 -; GFX11-NEXT: s_lshr_b32 s52, s23, 24 -; GFX11-NEXT: s_lshr_b32 s53, s23, 16 -; GFX11-NEXT: s_lshr_b32 s51, s23, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 4 +; GFX11-NEXT: s_mov_b32 s45, s84 +; GFX11-NEXT: v_writelane_b32 v21, s42, 0 ; GFX11-NEXT: s_lshr_b32 s42, s7, 24 -; GFX11-NEXT: s_lshr_b32 s69, s22, 16 -; GFX11-NEXT: s_lshr_b32 s54, s22, 8 -; GFX11-NEXT: s_lshr_b32 s55, s21, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 5 +; GFX11-NEXT: s_mov_b32 s84, s86 +; GFX11-NEXT: s_lshr_b64 s[86:87], s[22:23], 24 +; GFX11-NEXT: s_lshr_b32 s78, s7, 8 +; GFX11-NEXT: v_writelane_b32 v21, s42, 1 ; GFX11-NEXT: s_lshr_b32 s42, s7, 16 -; GFX11-NEXT: s_lshr_b32 s64, s21, 16 -; GFX11-NEXT: s_lshr_b32 s65, s21, 8 -; GFX11-NEXT: s_lshr_b32 s82, s20, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 6 -; GFX11-NEXT: s_lshr_b32 s42, s7, 8 -; GFX11-NEXT: s_lshr_b32 s68, s20, 8 -; GFX11-NEXT: s_lshr_b32 s66, s19, 24 -; GFX11-NEXT: s_lshr_b32 s67, s19, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 7 -; GFX11-NEXT: s_lshr_b32 s42, s6, 16 -; GFX11-NEXT: s_lshr_b32 s85, s19, 8 -; GFX11-NEXT: s_lshr_b32 s86, s18, 16 -; GFX11-NEXT: s_lshr_b32 s87, s18, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 8 -; GFX11-NEXT: s_lshr_b32 s42, s6, 8 -; GFX11-NEXT: s_lshr_b32 s70, s17, 24 -; GFX11-NEXT: s_lshr_b32 s71, s17, 16 -; GFX11-NEXT: s_lshr_b32 s96, s17, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 9 -; GFX11-NEXT: s_lshr_b32 s42, s9, 24 -; GFX11-NEXT: s_lshr_b32 s97, s16, 16 -; GFX11-NEXT: s_lshr_b32 s98, s16, 8 -; GFX11-NEXT: s_lshr_b32 s80, s3, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 10 -; GFX11-NEXT: s_lshr_b32 s42, s9, 16 -; GFX11-NEXT: s_lshr_b32 s81, s3, 16 -; GFX11-NEXT: s_lshr_b32 s99, s3, 8 -; GFX11-NEXT: s_lshr_b32 s100, s2, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 11 -; GFX11-NEXT: s_lshr_b32 s42, s9, 8 -; GFX11-NEXT: s_lshr_b32 s101, s2, 8 -; GFX11-NEXT: s_lshr_b32 s83, s1, 24 -; GFX11-NEXT: s_lshr_b32 s84, s1, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 12 -; GFX11-NEXT: s_lshr_b32 s42, s8, 16 -; GFX11-NEXT: s_lshr_b32 s102, s1, 8 -; GFX11-NEXT: s_lshr_b32 s103, s0, 16 -; GFX11-NEXT: s_lshr_b32 s104, s0, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 13 -; GFX11-NEXT: s_lshr_b32 s42, s8, 8 -; GFX11-NEXT: s_lshr_b64 s[44:45], s[6:7], 24 -; GFX11-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 -; GFX11-NEXT: s_lshr_b64 s[56:57], s[10:11], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 14 -; GFX11-NEXT: s_lshr_b32 s42, s11, 24 -; GFX11-NEXT: s_lshr_b64 s[58:59], s[12:13], 24 +; GFX11-NEXT: s_lshr_b32 s90, s6, 16 +; GFX11-NEXT: s_lshr_b32 s92, s6, 8 +; GFX11-NEXT: s_lshr_b32 s94, s9, 24 +; GFX11-NEXT: v_writelane_b32 v21, s42, 2 +; GFX11-NEXT: s_lshr_b32 s42, s27, 24 +; GFX11-NEXT: s_lshr_b32 s31, s9, 8 +; GFX11-NEXT: s_lshr_b32 s99, s8, 8 +; GFX11-NEXT: s_lshr_b32 s101, s11, 24 +; GFX11-NEXT: v_writelane_b32 v21, s42, 3 +; GFX11-NEXT: s_lshr_b32 s42, s3, 16 +; GFX11-NEXT: s_lshr_b32 s63, s11, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 24 +; GFX11-NEXT: s_lshr_b32 s42, s3, 8 +; GFX11-NEXT: s_lshr_b32 s59, s11, 8 +; GFX11-NEXT: s_lshr_b32 s73, s10, 8 +; GFX11-NEXT: s_lshr_b32 s103, s13, 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 25 +; GFX11-NEXT: s_lshr_b32 s42, s2, 16 +; GFX11-NEXT: s_lshr_b32 s77, s13, 16 +; GFX11-NEXT: s_lshr_b32 s75, s13, 8 +; GFX11-NEXT: s_lshr_b32 s37, s12, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 26 +; GFX11-NEXT: s_lshr_b32 s42, s2, 8 +; GFX11-NEXT: s_lshr_b32 s35, s12, 8 +; GFX11-NEXT: v_writelane_b32 v21, s42, 4 +; GFX11-NEXT: s_lshr_b32 s42, s1, 24 +; GFX11-NEXT: s_lshr_b32 s79, s15, 24 +; GFX11-NEXT: s_lshr_b32 s49, s15, 16 +; GFX11-NEXT: s_lshr_b32 s39, s15, 8 +; GFX11-NEXT: v_writelane_b32 v21, s42, 5 +; GFX11-NEXT: s_lshr_b32 s42, s1, 16 +; GFX11-NEXT: s_lshr_b32 s51, s14, 16 +; GFX11-NEXT: s_lshr_b32 s89, s14, 8 +; GFX11-NEXT: s_lshr_b32 s53, s41, 24 +; GFX11-NEXT: v_writelane_b32 v21, s42, 6 +; GFX11-NEXT: s_lshr_b32 s42, s1, 8 +; GFX11-NEXT: s_lshr_b32 s91, s41, 16 +; GFX11-NEXT: s_lshr_b32 s55, s41, 8 +; GFX11-NEXT: s_lshr_b32 s65, s40, 16 +; GFX11-NEXT: v_writelane_b32 v21, s42, 7 +; GFX11-NEXT: s_lshr_b32 s42, s0, 16 +; GFX11-NEXT: s_lshr_b32 s93, s40, 8 +; GFX11-NEXT: s_lshr_b32 s72, s29, 24 +; GFX11-NEXT: s_lshr_b32 s66, s29, 16 +; GFX11-NEXT: v_writelane_b32 v21, s42, 8 +; GFX11-NEXT: s_lshr_b32 s42, s0, 8 +; GFX11-NEXT: s_lshr_b32 s95, s29, 8 +; GFX11-NEXT: v_writelane_b32 v22, s42, 27 +; GFX11-NEXT: s_lshr_b32 s34, s28, 16 +; GFX11-NEXT: s_lshr_b32 s67, s28, 8 +; GFX11-NEXT: s_lshr_b32 s71, s27, 8 +; GFX11-NEXT: s_lshr_b32 s83, s26, 16 +; GFX11-NEXT: v_writelane_b32 v22, s60, 22 +; GFX11-NEXT: s_lshr_b32 s81, s26, 8 +; GFX11-NEXT: s_lshr_b32 s85, s25, 24 +; GFX11-NEXT: s_lshr_b32 s47, s25, 16 +; GFX11-NEXT: s_lshr_b32 s57, s24, 8 +; GFX11-NEXT: v_writelane_b32 v22, s61, 23 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[6:7], 24 +; GFX11-NEXT: s_lshr_b32 s36, s23, 16 +; GFX11-NEXT: s_lshr_b32 s97, s23, 8 +; GFX11-NEXT: s_lshr_b32 s76, s22, 16 +; GFX11-NEXT: v_writelane_b32 v22, s60, 20 +; GFX11-NEXT: s_lshr_b32 s38, s22, 8 +; GFX11-NEXT: s_lshr_b32 s62, s21, 24 +; GFX11-NEXT: s_lshr_b32 s88, s21, 16 +; GFX11-NEXT: s_lshr_b32 s70, s21, 8 +; GFX11-NEXT: v_writelane_b32 v22, s61, 21 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[8:9], 24 +; GFX11-NEXT: s_lshr_b32 s48, s20, 16 +; GFX11-NEXT: s_lshr_b32 s80, s20, 8 +; GFX11-NEXT: s_lshr_b32 s50, s19, 24 +; GFX11-NEXT: v_writelane_b32 v22, s60, 18 +; GFX11-NEXT: s_lshr_b32 s52, s19, 16 +; GFX11-NEXT: s_lshr_b32 s82, s19, 8 +; GFX11-NEXT: s_lshr_b32 s56, s18, 16 +; GFX11-NEXT: s_lshr_b32 s58, s18, 8 +; GFX11-NEXT: v_writelane_b32 v22, s61, 19 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 +; GFX11-NEXT: s_lshr_b32 s104, s17, 24 +; GFX11-NEXT: s_lshr_b32 s54, s17, 16 +; GFX11-NEXT: s_lshr_b32 s46, s17, 8 +; GFX11-NEXT: v_writelane_b32 v22, s60, 16 +; GFX11-NEXT: s_lshr_b32 vcc_hi, s16, 16 +; GFX11-NEXT: s_lshr_b32 s64, s16, 8 +; GFX11-NEXT: s_lshr_b32 s74, s3, 24 +; GFX11-NEXT: s_mov_b32 s69, s43 +; GFX11-NEXT: v_writelane_b32 v22, s61, 17 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[12:13], 24 +; GFX11-NEXT: s_mov_b32 s87, s96 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[20:21], 24 +; GFX11-NEXT: s_mov_b32 s30, s98 +; GFX11-NEXT: v_writelane_b32 v22, s60, 14 +; GFX11-NEXT: s_mov_b32 s98, s100 +; GFX11-NEXT: s_mov_b32 s100, s102 +; GFX11-NEXT: v_writelane_b32 v22, s61, 15 ; GFX11-NEXT: s_lshr_b64 s[60:61], s[14:15], 24 -; GFX11-NEXT: s_lshr_b64 s[62:63], s[40:41], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 15 -; GFX11-NEXT: s_lshr_b32 s42, s11, 16 -; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 -; GFX11-NEXT: s_lshr_b64 s[76:77], s[26:27], 24 -; GFX11-NEXT: s_lshr_b64 s[72:73], s[24:25], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 16 -; GFX11-NEXT: s_lshr_b32 s42, s11, 8 -; GFX11-NEXT: s_lshr_b64 s[78:79], s[22:23], 24 -; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24 -; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 17 -; GFX11-NEXT: s_lshr_b32 s42, s10, 16 -; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24 -; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24 -; GFX11-NEXT: s_lshr_b64 s[30:31], s[0:1], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 18 -; GFX11-NEXT: s_lshr_b32 s42, s10, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 19 -; GFX11-NEXT: s_lshr_b32 s42, s13, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 20 -; GFX11-NEXT: s_lshr_b32 s42, s13, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 21 -; GFX11-NEXT: s_lshr_b32 s42, s13, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 22 -; GFX11-NEXT: s_lshr_b32 s42, s12, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 23 -; GFX11-NEXT: s_lshr_b32 s42, s12, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 24 -; GFX11-NEXT: s_lshr_b32 s42, s15, 24 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 25 -; GFX11-NEXT: s_lshr_b32 s42, s15, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 26 -; GFX11-NEXT: s_lshr_b32 s42, s15, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 27 -; GFX11-NEXT: s_lshr_b32 s42, s14, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 28 -; GFX11-NEXT: s_lshr_b32 s42, s14, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 29 -; GFX11-NEXT: s_lshr_b32 s42, s41, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 30 -; GFX11-NEXT: s_lshr_b32 s42, s41, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 31 -; GFX11-NEXT: s_lshr_b32 s42, s41, 8 -; GFX11-NEXT: v_writelane_b32 v25, s42, 0 -; GFX11-NEXT: s_lshr_b32 s42, s40, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 1 -; GFX11-NEXT: s_lshr_b32 s42, s40, 8 -; GFX11-NEXT: v_writelane_b32 v25, s42, 2 -; GFX11-NEXT: s_lshr_b32 s42, s29, 24 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 3 -; GFX11-NEXT: s_lshr_b32 s42, s29, 16 -; GFX11-NEXT: v_writelane_b32 v25, s42, 4 -; GFX11-NEXT: s_lshr_b32 s42, s29, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 5 -; GFX11-NEXT: s_lshr_b32 s42, s28, 16 -; GFX11-NEXT: v_writelane_b32 v25, s42, 6 -; GFX11-NEXT: s_lshr_b32 s42, s28, 8 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-NEXT: v_writelane_b32 v22, s60, 12 +; GFX11-NEXT: v_writelane_b32 v22, s61, 13 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[40:41], 24 +; GFX11-NEXT: v_writelane_b32 v22, s60, 10 +; GFX11-NEXT: v_writelane_b32 v22, s61, 11 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[26:27], 24 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-NEXT: v_writelane_b32 v22, s60, 8 +; GFX11-NEXT: v_writelane_b32 v22, s61, 9 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[18:19], 24 +; GFX11-NEXT: v_writelane_b32 v22, s60, 6 +; GFX11-NEXT: v_writelane_b32 v22, s61, 7 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[16:17], 24 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-NEXT: v_writelane_b32 v22, s60, 4 +; GFX11-NEXT: v_writelane_b32 v22, s61, 5 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[2:3], 24 +; GFX11-NEXT: v_writelane_b32 v22, s60, 2 +; GFX11-NEXT: v_writelane_b32 v22, s61, 3 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[0:1], 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 7 -; GFX11-NEXT: s_lshr_b64 s[42:43], s[4:5], 24 +; GFX11-NEXT: v_writelane_b32 v22, s60, 0 +; GFX11-NEXT: v_writelane_b32 v22, s61, 1 +; GFX11-NEXT: s_branch .LBB13_3 +; GFX11-NEXT: .LBB13_2: +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; kill: killed $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr60 +; GFX11-NEXT: ; implicit-def: $sgpr78 +; GFX11-NEXT: ; implicit-def: $sgpr103 +; GFX11-NEXT: ; implicit-def: $sgpr102 +; GFX11-NEXT: s_mov_b32 vcc_lo, -1 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; kill: killed $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr74 +; GFX11-NEXT: ; implicit-def: $sgpr64 +; GFX11-NEXT: ; implicit-def: $vcc_hi +; GFX11-NEXT: ; implicit-def: $sgpr46 +; GFX11-NEXT: ; implicit-def: $sgpr54 +; GFX11-NEXT: ; implicit-def: $sgpr104 +; GFX11-NEXT: ; implicit-def: $sgpr58 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: ; implicit-def: $sgpr82 +; GFX11-NEXT: ; implicit-def: $sgpr52 +; GFX11-NEXT: ; implicit-def: $sgpr50 +; GFX11-NEXT: ; implicit-def: $sgpr80 +; GFX11-NEXT: ; implicit-def: $sgpr48 +; GFX11-NEXT: ; implicit-def: $sgpr70 +; GFX11-NEXT: ; implicit-def: $sgpr88 +; GFX11-NEXT: ; implicit-def: $sgpr62 +; GFX11-NEXT: ; implicit-def: $sgpr38 +; GFX11-NEXT: ; implicit-def: $sgpr76 +; GFX11-NEXT: ; implicit-def: $sgpr86 +; GFX11-NEXT: ; implicit-def: $sgpr97 +; GFX11-NEXT: ; implicit-def: $sgpr36 +; GFX11-NEXT: ; implicit-def: $sgpr87 +; GFX11-NEXT: ; implicit-def: $sgpr57 +; GFX11-NEXT: ; implicit-def: $sgpr84 +; GFX11-NEXT: ; implicit-def: $sgpr44 +; GFX11-NEXT: ; implicit-def: $sgpr45 +; GFX11-NEXT: ; implicit-def: $sgpr47 +; GFX11-NEXT: ; implicit-def: $sgpr85 +; GFX11-NEXT: ; implicit-def: $sgpr81 +; GFX11-NEXT: ; implicit-def: $sgpr83 +; GFX11-NEXT: ; implicit-def: $sgpr71 +; GFX11-NEXT: ; implicit-def: $sgpr69 +; GFX11-NEXT: ; implicit-def: $sgpr67 +; GFX11-NEXT: ; implicit-def: $sgpr34 +; GFX11-NEXT: ; implicit-def: $sgpr68 +; GFX11-NEXT: ; implicit-def: $sgpr95 +; GFX11-NEXT: ; implicit-def: $sgpr66 +; GFX11-NEXT: ; implicit-def: $sgpr72 +; GFX11-NEXT: ; implicit-def: $sgpr93 +; GFX11-NEXT: ; implicit-def: $sgpr65 +; GFX11-NEXT: ; implicit-def: $sgpr55 +; GFX11-NEXT: ; implicit-def: $sgpr91 +; GFX11-NEXT: ; implicit-def: $sgpr53 +; GFX11-NEXT: ; implicit-def: $sgpr89 +; GFX11-NEXT: ; implicit-def: $sgpr51 +; GFX11-NEXT: ; implicit-def: $sgpr39 +; GFX11-NEXT: ; implicit-def: $sgpr49 +; GFX11-NEXT: ; implicit-def: $sgpr35 +; GFX11-NEXT: ; implicit-def: $sgpr37 +; GFX11-NEXT: ; implicit-def: $sgpr75 +; GFX11-NEXT: ; implicit-def: $sgpr77 +; GFX11-NEXT: ; implicit-def: $sgpr73 +; GFX11-NEXT: ; implicit-def: $sgpr100 +; GFX11-NEXT: ; implicit-def: $sgpr59 +; GFX11-NEXT: ; implicit-def: $sgpr63 +; GFX11-NEXT: ; implicit-def: $sgpr101 +; GFX11-NEXT: ; implicit-def: $sgpr99 +; GFX11-NEXT: ; implicit-def: $sgpr98 +; GFX11-NEXT: ; implicit-def: $sgpr31 +; GFX11-NEXT: ; implicit-def: $sgpr30 +; GFX11-NEXT: ; implicit-def: $sgpr94 +; GFX11-NEXT: ; implicit-def: $sgpr92 +; GFX11-NEXT: ; implicit-def: $sgpr90 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: v_writelane_b32 v22, s42, 0 +; GFX11-NEXT: v_writelane_b32 v22, s43, 1 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; kill: killed $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; kill: killed $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; kill: killed $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; kill: killed $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; kill: killed $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: v_writelane_b32 v22, s42, 2 +; GFX11-NEXT: v_writelane_b32 v22, s43, 3 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; kill: killed $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; kill: killed $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: v_writelane_b32 v22, s42, 4 +; GFX11-NEXT: v_writelane_b32 v22, s43, 5 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: v_writelane_b32 v22, s42, 6 +; GFX11-NEXT: v_writelane_b32 v22, s43, 7 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr43 +; GFX11-NEXT: ; kill: killed $sgpr43 +; GFX11-NEXT: v_writelane_b32 v22, s60, 8 +; GFX11-NEXT: v_writelane_b32 v22, s61, 9 +; GFX11-NEXT: ; implicit-def: $sgpr61 +; GFX11-NEXT: ; kill: killed $sgpr61 +; GFX11-NEXT: ; implicit-def: $sgpr61 +; GFX11-NEXT: ; kill: killed $sgpr61 +; GFX11-NEXT: ; implicit-def: $sgpr61 +; GFX11-NEXT: ; kill: killed $sgpr61 +; GFX11-NEXT: ; implicit-def: $sgpr61 +; GFX11-NEXT: ; kill: killed $sgpr61 +; GFX11-NEXT: ; implicit-def: $sgpr61 +; GFX11-NEXT: v_writelane_b32 v22, s78, 10 +; GFX11-NEXT: ; kill: killed $sgpr61 +; GFX11-NEXT: ; implicit-def: $sgpr61 +; GFX11-NEXT: ; kill: killed $sgpr61 +; GFX11-NEXT: ; implicit-def: $sgpr61 +; GFX11-NEXT: ; kill: killed $sgpr61 +; GFX11-NEXT: v_writelane_b32 v22, s79, 11 +; GFX11-NEXT: ; implicit-def: $sgpr78 +; GFX11-NEXT: v_writelane_b32 v22, s78, 12 +; GFX11-NEXT: v_writelane_b32 v22, s79, 13 +; GFX11-NEXT: ; implicit-def: $sgpr79 +; GFX11-NEXT: ; implicit-def: $sgpr78 +; GFX11-NEXT: v_writelane_b32 v22, s78, 14 +; GFX11-NEXT: v_writelane_b32 v22, s79, 15 +; GFX11-NEXT: ; implicit-def: $sgpr78 +; GFX11-NEXT: v_writelane_b32 v22, s78, 16 +; GFX11-NEXT: v_writelane_b32 v22, s79, 17 +; GFX11-NEXT: ; implicit-def: $sgpr78 +; GFX11-NEXT: v_writelane_b32 v22, s78, 18 +; GFX11-NEXT: v_writelane_b32 v22, s79, 19 +; GFX11-NEXT: ; implicit-def: $sgpr78 +; GFX11-NEXT: v_writelane_b32 v22, s78, 20 +; GFX11-NEXT: v_writelane_b32 v22, s79, 21 +; GFX11-NEXT: ; implicit-def: $sgpr78 +; GFX11-NEXT: v_writelane_b32 v22, s102, 22 +; GFX11-NEXT: v_writelane_b32 v22, s103, 23 +; GFX11-NEXT: .LBB13_3: ; %Flow +; GFX11-NEXT: s_mov_b32 s60, s68 +; GFX11-NEXT: s_mov_b32 s68, s44 +; GFX11-NEXT: s_mov_b32 s44, s86 +; GFX11-NEXT: s_mov_b32 s96, s42 +; GFX11-NEXT: v_readlane_b32 s61, v22, 24 +; GFX11-NEXT: v_readlane_b32 s86, v22, 25 +; GFX11-NEXT: v_readlane_b32 s102, v22, 26 +; GFX11-NEXT: v_readlane_b32 s42, v22, 27 ; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_lo -; GFX11-NEXT: s_cbranch_vccnz .LBB13_3 -; GFX11-NEXT: .LBB13_2: ; %cmp.true +; GFX11-NEXT: s_cbranch_vccnz .LBB13_5 +; GFX11-NEXT: ; %bb.4: ; %cmp.true ; GFX11-NEXT: s_add_i32 s5, s5, 3 ; GFX11-NEXT: s_add_i32 s4, s4, 3 -; GFX11-NEXT: s_lshr_b32 s42, s5, 24 ; GFX11-NEXT: s_add_i32 s7, s7, 3 -; GFX11-NEXT: v_writelane_b32 v26, s42, 0 -; GFX11-NEXT: s_lshr_b32 s42, s5, 16 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[4:5], 24 ; GFX11-NEXT: s_add_i32 s6, s6, 3 +; GFX11-NEXT: v_writelane_b32 v22, s42, 22 ; GFX11-NEXT: s_add_i32 s9, s9, 3 ; GFX11-NEXT: s_add_i32 s8, s8, 3 -; GFX11-NEXT: v_writelane_b32 v26, s42, 1 -; GFX11-NEXT: s_lshr_b32 s42, s5, 8 ; GFX11-NEXT: s_add_i32 s11, s11, 3 ; GFX11-NEXT: s_add_i32 s10, s10, 3 +; GFX11-NEXT: v_writelane_b32 v22, s43, 23 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[6:7], 24 ; GFX11-NEXT: s_add_i32 s13, s13, 3 -; GFX11-NEXT: v_writelane_b32 v26, s42, 2 -; GFX11-NEXT: s_lshr_b32 s42, s4, 16 ; GFX11-NEXT: s_add_i32 s12, s12, 3 ; GFX11-NEXT: s_add_i32 s15, s15, 3 +; GFX11-NEXT: v_writelane_b32 v22, s42, 20 ; GFX11-NEXT: s_add_i32 s14, s14, 3 -; GFX11-NEXT: v_writelane_b32 v26, s42, 3 -; GFX11-NEXT: s_lshr_b32 s42, s4, 8 ; GFX11-NEXT: s_add_i32 s41, s41, 3 ; GFX11-NEXT: s_add_i32 s40, s40, 3 -; GFX11-NEXT: s_add_i32 s29, s29, 3 -; GFX11-NEXT: v_writelane_b32 v26, s42, 4 -; GFX11-NEXT: s_lshr_b32 s42, s7, 24 -; GFX11-NEXT: s_add_i32 s28, s28, 3 -; GFX11-NEXT: s_add_i32 s1, s1, 3 -; GFX11-NEXT: s_add_i32 s0, s0, 3 -; GFX11-NEXT: v_writelane_b32 v26, s42, 5 -; GFX11-NEXT: s_lshr_b32 s42, s7, 16 -; GFX11-NEXT: s_add_i32 s3, s3, 3 -; GFX11-NEXT: s_add_i32 s2, s2, 3 -; GFX11-NEXT: s_add_i32 s17, s17, 3 -; GFX11-NEXT: v_writelane_b32 v26, s42, 6 -; GFX11-NEXT: s_lshr_b32 s42, s7, 8 -; GFX11-NEXT: s_add_i32 s16, s16, 3 +; GFX11-NEXT: s_add_i32 s27, s27, 3 +; GFX11-NEXT: v_writelane_b32 v22, s43, 21 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[8:9], 24 +; GFX11-NEXT: s_add_i32 s26, s26, 3 ; GFX11-NEXT: s_add_i32 s19, s19, 3 ; GFX11-NEXT: s_add_i32 s18, s18, 3 -; GFX11-NEXT: v_writelane_b32 v26, s42, 7 -; GFX11-NEXT: s_lshr_b32 s42, s6, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 18 +; GFX11-NEXT: s_add_i32 s17, s17, 3 +; GFX11-NEXT: s_add_i32 s16, s16, 3 +; GFX11-NEXT: s_add_i32 s3, s3, 3 +; GFX11-NEXT: s_add_i32 s2, s2, 3 +; GFX11-NEXT: v_writelane_b32 v22, s43, 19 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[10:11], 24 +; GFX11-NEXT: s_add_i32 s1, s1, 3 +; GFX11-NEXT: s_add_i32 s0, s0, 3 ; GFX11-NEXT: s_add_i32 s21, s21, 3 +; GFX11-NEXT: v_writelane_b32 v22, s42, 16 ; GFX11-NEXT: s_add_i32 s20, s20, 3 ; GFX11-NEXT: s_add_i32 s23, s23, 3 -; GFX11-NEXT: v_writelane_b32 v26, s42, 8 -; GFX11-NEXT: s_lshr_b32 s42, s6, 8 ; GFX11-NEXT: s_add_i32 s22, s22, 3 ; GFX11-NEXT: s_add_i32 s25, s25, 3 +; GFX11-NEXT: v_writelane_b32 v22, s43, 17 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[12:13], 24 ; GFX11-NEXT: s_add_i32 s24, s24, 3 -; GFX11-NEXT: v_writelane_b32 v26, s42, 9 -; GFX11-NEXT: s_lshr_b32 s42, s9, 24 -; GFX11-NEXT: s_add_i32 s27, s27, 3 -; GFX11-NEXT: s_add_i32 s26, s26, 3 -; GFX11-NEXT: s_lshr_b32 vcc_hi, s27, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 10 -; GFX11-NEXT: s_lshr_b32 s42, s9, 16 -; GFX11-NEXT: s_lshr_b32 s34, s27, 16 -; GFX11-NEXT: s_lshr_b32 s35, s27, 8 -; GFX11-NEXT: s_lshr_b32 s37, s26, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 11 -; GFX11-NEXT: s_lshr_b32 s42, s9, 8 -; GFX11-NEXT: s_lshr_b32 s36, s26, 8 -; GFX11-NEXT: s_lshr_b32 s39, s25, 24 -; GFX11-NEXT: s_lshr_b32 s48, s25, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 12 -; GFX11-NEXT: s_lshr_b32 s42, s8, 16 -; GFX11-NEXT: s_lshr_b32 s38, s25, 8 -; GFX11-NEXT: s_lshr_b32 s50, s24, 16 -; GFX11-NEXT: s_lshr_b32 s49, s24, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 13 -; GFX11-NEXT: s_lshr_b32 s42, s8, 8 -; GFX11-NEXT: s_lshr_b32 s52, s23, 24 -; GFX11-NEXT: s_lshr_b32 s53, s23, 16 -; GFX11-NEXT: s_lshr_b32 s51, s23, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 14 -; GFX11-NEXT: s_lshr_b32 s42, s11, 24 -; GFX11-NEXT: s_lshr_b32 s69, s22, 16 -; GFX11-NEXT: s_lshr_b32 s54, s22, 8 -; GFX11-NEXT: s_lshr_b32 s55, s21, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 15 -; GFX11-NEXT: s_lshr_b32 s42, s11, 16 -; GFX11-NEXT: s_lshr_b32 s64, s21, 16 -; GFX11-NEXT: s_lshr_b32 s65, s21, 8 -; GFX11-NEXT: s_lshr_b32 s82, s20, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 16 -; GFX11-NEXT: s_lshr_b32 s42, s11, 8 -; GFX11-NEXT: s_lshr_b32 s68, s20, 8 -; GFX11-NEXT: s_lshr_b32 s66, s19, 24 -; GFX11-NEXT: s_lshr_b32 s67, s19, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 17 -; GFX11-NEXT: s_lshr_b32 s42, s10, 16 -; GFX11-NEXT: s_lshr_b32 s85, s19, 8 -; GFX11-NEXT: s_lshr_b32 s86, s18, 16 -; GFX11-NEXT: s_lshr_b32 s87, s18, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 18 -; GFX11-NEXT: s_lshr_b32 s42, s10, 8 -; GFX11-NEXT: s_lshr_b32 s70, s17, 24 -; GFX11-NEXT: s_lshr_b32 s71, s17, 16 -; GFX11-NEXT: s_lshr_b32 s96, s17, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 19 -; GFX11-NEXT: s_lshr_b32 s42, s13, 24 -; GFX11-NEXT: s_lshr_b32 s97, s16, 16 -; GFX11-NEXT: s_lshr_b32 s98, s16, 8 -; GFX11-NEXT: s_lshr_b32 s80, s3, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 20 -; GFX11-NEXT: s_lshr_b32 s42, s13, 16 -; GFX11-NEXT: s_lshr_b32 s81, s3, 16 -; GFX11-NEXT: s_lshr_b32 s99, s3, 8 -; GFX11-NEXT: s_lshr_b32 s100, s2, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 21 -; GFX11-NEXT: s_lshr_b32 s42, s13, 8 -; GFX11-NEXT: s_lshr_b32 s101, s2, 8 -; GFX11-NEXT: s_lshr_b32 s83, s1, 24 -; GFX11-NEXT: s_lshr_b32 s84, s1, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 22 -; GFX11-NEXT: s_lshr_b32 s42, s12, 16 -; GFX11-NEXT: s_lshr_b32 s102, s1, 8 -; GFX11-NEXT: s_lshr_b32 s103, s0, 16 -; GFX11-NEXT: s_lshr_b32 s104, s0, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 23 -; GFX11-NEXT: s_lshr_b32 s42, s12, 8 -; GFX11-NEXT: s_lshr_b64 s[44:45], s[6:7], 24 -; GFX11-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 -; GFX11-NEXT: s_lshr_b64 s[56:57], s[10:11], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 24 -; GFX11-NEXT: s_lshr_b32 s42, s15, 24 -; GFX11-NEXT: s_lshr_b64 s[58:59], s[12:13], 24 -; GFX11-NEXT: s_lshr_b64 s[60:61], s[14:15], 24 -; GFX11-NEXT: s_lshr_b64 s[62:63], s[40:41], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 25 -; GFX11-NEXT: s_lshr_b32 s42, s15, 16 -; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 -; GFX11-NEXT: s_lshr_b64 s[76:77], s[26:27], 24 -; GFX11-NEXT: s_lshr_b64 s[72:73], s[24:25], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 26 -; GFX11-NEXT: s_lshr_b32 s42, s15, 8 -; GFX11-NEXT: s_lshr_b64 s[78:79], s[22:23], 24 -; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24 -; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 27 -; GFX11-NEXT: s_lshr_b32 s42, s14, 16 -; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24 -; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24 -; GFX11-NEXT: s_lshr_b64 s[30:31], s[0:1], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 28 -; GFX11-NEXT: s_lshr_b32 s42, s14, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 29 -; GFX11-NEXT: s_lshr_b32 s42, s41, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 30 -; GFX11-NEXT: s_lshr_b32 s42, s41, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 31 -; GFX11-NEXT: s_lshr_b32 s42, s41, 8 -; GFX11-NEXT: v_writelane_b32 v25, s42, 0 -; GFX11-NEXT: s_lshr_b32 s42, s40, 16 +; GFX11-NEXT: s_add_i32 s29, s29, 3 +; GFX11-NEXT: s_add_i32 s28, s28, 3 +; GFX11-NEXT: v_writelane_b32 v22, s42, 14 +; GFX11-NEXT: s_lshr_b64 s[60:61], s[28:29], 24 +; GFX11-NEXT: s_lshr_b64 s[68:69], s[24:25], 24 +; GFX11-NEXT: s_lshr_b64 s[44:45], s[22:23], 24 +; GFX11-NEXT: s_lshr_b64 s[96:97], s[20:21], 24 +; GFX11-NEXT: v_writelane_b32 v22, s43, 15 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[14:15], 24 +; GFX11-NEXT: s_lshr_b32 s78, s7, 8 +; GFX11-NEXT: s_lshr_b32 s90, s6, 16 +; GFX11-NEXT: s_lshr_b32 s92, s6, 8 +; GFX11-NEXT: v_writelane_b32 v22, s42, 12 +; GFX11-NEXT: s_lshr_b32 s94, s9, 24 +; GFX11-NEXT: s_lshr_b32 s30, s9, 16 +; GFX11-NEXT: s_lshr_b32 s31, s9, 8 +; GFX11-NEXT: s_lshr_b32 s98, s8, 16 +; GFX11-NEXT: v_writelane_b32 v22, s43, 13 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[40:41], 24 +; GFX11-NEXT: s_lshr_b32 s99, s8, 8 +; GFX11-NEXT: s_lshr_b32 s101, s11, 24 +; GFX11-NEXT: s_lshr_b32 s63, s11, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 10 +; GFX11-NEXT: s_lshr_b32 s59, s11, 8 +; GFX11-NEXT: s_lshr_b32 s100, s10, 16 +; GFX11-NEXT: s_lshr_b32 s73, s10, 8 +; GFX11-NEXT: s_lshr_b32 s103, s13, 24 +; GFX11-NEXT: v_writelane_b32 v22, s43, 11 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[26:27], 24 +; GFX11-NEXT: s_lshr_b32 s77, s13, 16 +; GFX11-NEXT: s_lshr_b32 s75, s13, 8 +; GFX11-NEXT: s_lshr_b32 s37, s12, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 8 +; GFX11-NEXT: s_lshr_b32 s35, s12, 8 +; GFX11-NEXT: s_lshr_b32 s79, s15, 24 +; GFX11-NEXT: s_lshr_b32 s49, s15, 16 +; GFX11-NEXT: s_lshr_b32 s39, s15, 8 +; GFX11-NEXT: v_writelane_b32 v22, s43, 9 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[18:19], 24 +; GFX11-NEXT: s_lshr_b32 s51, s14, 16 +; GFX11-NEXT: s_lshr_b32 s89, s14, 8 +; GFX11-NEXT: s_lshr_b32 s53, s41, 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 6 +; GFX11-NEXT: s_lshr_b32 s91, s41, 16 +; GFX11-NEXT: s_lshr_b32 s55, s41, 8 +; GFX11-NEXT: s_lshr_b32 s65, s40, 16 +; GFX11-NEXT: s_lshr_b32 s93, s40, 8 +; GFX11-NEXT: v_writelane_b32 v22, s43, 7 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[16:17], 24 +; GFX11-NEXT: s_lshr_b32 s72, s29, 24 +; GFX11-NEXT: s_lshr_b32 s66, s29, 16 +; GFX11-NEXT: s_lshr_b32 s95, s29, 8 +; GFX11-NEXT: v_writelane_b32 v22, s42, 4 +; GFX11-NEXT: s_lshr_b32 s34, s28, 16 +; GFX11-NEXT: s_lshr_b32 s67, s28, 8 +; GFX11-NEXT: s_lshr_b32 s69, s27, 16 +; GFX11-NEXT: s_lshr_b32 s71, s27, 8 +; GFX11-NEXT: v_writelane_b32 v22, s43, 5 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[2:3], 24 +; GFX11-NEXT: s_lshr_b32 s83, s26, 16 +; GFX11-NEXT: s_lshr_b32 s81, s26, 8 +; GFX11-NEXT: s_lshr_b32 s85, s25, 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 2 +; GFX11-NEXT: s_lshr_b32 s47, s25, 16 +; GFX11-NEXT: s_lshr_b32 s45, s25, 8 +; GFX11-NEXT: s_lshr_b32 s84, s24, 16 +; GFX11-NEXT: s_lshr_b32 s57, s24, 8 +; GFX11-NEXT: v_writelane_b32 v22, s43, 3 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24 +; GFX11-NEXT: s_lshr_b32 s87, s23, 24 +; GFX11-NEXT: s_lshr_b32 s36, s23, 16 +; GFX11-NEXT: s_lshr_b32 s97, s23, 8 +; GFX11-NEXT: v_writelane_b32 v22, s42, 0 +; GFX11-NEXT: s_lshr_b32 s76, s22, 16 +; GFX11-NEXT: s_lshr_b32 s38, s22, 8 +; GFX11-NEXT: s_lshr_b32 s62, s21, 24 +; GFX11-NEXT: s_lshr_b32 s88, s21, 16 +; GFX11-NEXT: v_writelane_b32 v22, s43, 1 +; GFX11-NEXT: s_lshr_b32 s42, s5, 24 +; GFX11-NEXT: s_lshr_b32 s70, s21, 8 +; GFX11-NEXT: s_lshr_b32 s48, s20, 16 +; GFX11-NEXT: s_lshr_b32 s80, s20, 8 +; GFX11-NEXT: v_writelane_b32 v22, s42, 28 +; GFX11-NEXT: s_lshr_b32 s42, s5, 16 +; GFX11-NEXT: s_lshr_b32 s50, s19, 24 +; GFX11-NEXT: s_lshr_b32 s52, s19, 16 +; GFX11-NEXT: s_lshr_b32 s82, s19, 8 +; GFX11-NEXT: v_writelane_b32 v22, s42, 29 +; GFX11-NEXT: s_lshr_b32 s42, s5, 8 +; GFX11-NEXT: s_lshr_b32 s56, s18, 16 +; GFX11-NEXT: s_lshr_b32 s58, s18, 8 +; GFX11-NEXT: s_lshr_b32 s104, s17, 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 30 +; GFX11-NEXT: s_lshr_b32 s42, s4, 16 +; GFX11-NEXT: s_lshr_b32 s54, s17, 16 +; GFX11-NEXT: s_lshr_b32 s46, s17, 8 +; GFX11-NEXT: s_lshr_b32 vcc_hi, s16, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 31 +; GFX11-NEXT: s_lshr_b32 s42, s4, 8 +; GFX11-NEXT: s_lshr_b32 s64, s16, 8 +; GFX11-NEXT: v_writelane_b32 v21, s42, 0 +; GFX11-NEXT: s_lshr_b32 s42, s7, 24 +; GFX11-NEXT: s_lshr_b32 s74, s3, 24 +; GFX11-NEXT: s_lshr_b32 s61, s3, 16 +; GFX11-NEXT: s_lshr_b32 s86, s3, 8 +; GFX11-NEXT: v_writelane_b32 v21, s42, 1 +; GFX11-NEXT: s_lshr_b32 s42, s7, 16 +; GFX11-NEXT: s_lshr_b32 s102, s2, 16 +; GFX11-NEXT: v_writelane_b32 v21, s42, 2 +; GFX11-NEXT: s_lshr_b32 s42, s27, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 1 -; GFX11-NEXT: s_lshr_b32 s42, s40, 8 -; GFX11-NEXT: v_writelane_b32 v25, s42, 2 -; GFX11-NEXT: s_lshr_b32 s42, s29, 24 +; GFX11-NEXT: v_writelane_b32 v21, s42, 3 +; GFX11-NEXT: s_lshr_b32 s42, s2, 8 +; GFX11-NEXT: v_writelane_b32 v21, s42, 4 +; GFX11-NEXT: s_lshr_b32 s42, s1, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 3 -; GFX11-NEXT: s_lshr_b32 s42, s29, 16 -; GFX11-NEXT: v_writelane_b32 v25, s42, 4 -; GFX11-NEXT: s_lshr_b32 s42, s29, 8 +; GFX11-NEXT: v_writelane_b32 v21, s42, 5 +; GFX11-NEXT: s_lshr_b32 s42, s1, 16 +; GFX11-NEXT: v_writelane_b32 v21, s42, 6 +; GFX11-NEXT: s_lshr_b32 s42, s1, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 5 -; GFX11-NEXT: s_lshr_b32 s42, s28, 16 -; GFX11-NEXT: v_writelane_b32 v25, s42, 6 -; GFX11-NEXT: s_lshr_b32 s42, s28, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 7 -; GFX11-NEXT: s_lshr_b64 s[42:43], s[4:5], 24 -; GFX11-NEXT: .LBB13_3: ; %end -; GFX11-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_perm_b32 v2, s103, s30, v1 -; GFX11-NEXT: v_readlane_b32 s30, v24, 7 -; GFX11-NEXT: v_readlane_b32 s31, v24, 8 -; GFX11-NEXT: v_readlane_b32 s103, v24, 5 +; GFX11-NEXT: v_writelane_b32 v21, s42, 7 +; GFX11-NEXT: s_lshr_b32 s42, s0, 16 +; GFX11-NEXT: v_writelane_b32 v21, s42, 8 +; GFX11-NEXT: s_lshr_b32 s42, s0, 8 +; GFX11-NEXT: .LBB13_5: ; %end +; GFX11-NEXT: v_mov_b32_e32 v12, 0xc0c0004 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_perm_b32 v1, s0, s42, v12 +; GFX11-NEXT: v_readlane_b32 s42, v22, 0 +; GFX11-NEXT: v_readlane_b32 s0, v21, 8 +; GFX11-NEXT: v_readlane_b32 s43, v22, 1 +; GFX11-NEXT: v_perm_b32 v2, s0, s42, v12 +; GFX11-NEXT: v_readlane_b32 s0, v21, 7 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) ; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-NEXT: v_perm_b32 v18, s84, s83, v1 -; GFX11-NEXT: v_perm_b32 v3, s0, s104, v1 -; GFX11-NEXT: v_perm_b32 v4, s1, s102, v1 -; GFX11-NEXT: v_perm_b32 v5, s100, s94, v1 -; GFX11-NEXT: v_perm_b32 v19, s81, s80, v1 -; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-NEXT: v_perm_b32 v6, s2, s101, v1 -; GFX11-NEXT: v_perm_b32 v7, s3, s99, v1 +; GFX11-NEXT: v_perm_b32 v3, s1, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v21, 5 +; GFX11-NEXT: v_readlane_b32 s1, v21, 6 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX11-NEXT: v_perm_b32 v4, s1, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v21, 4 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v4 +; GFX11-NEXT: v_perm_b32 v5, s2, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 2 +; GFX11-NEXT: v_readlane_b32 s1, v22, 3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX11-NEXT: v_or_b32_e32 v2, v3, v2 -; GFX11-NEXT: v_perm_b32 v8, s97, s92, v1 -; GFX11-NEXT: v_or_b32_e32 v3, v4, v18 -; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v5 -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v19 -; GFX11-NEXT: v_perm_b32 v11, s86, s90, v1 -; GFX11-NEXT: v_perm_b32 v20, s71, s70, v1 -; GFX11-NEXT: v_perm_b32 v21, s67, s66, v1 -; GFX11-NEXT: v_or_b32_e32 v4, v6, v4 -; GFX11-NEXT: v_or_b32_e32 v5, v7, v5 -; GFX11-NEXT: v_perm_b32 v9, s16, s98, v1 -; GFX11-NEXT: v_perm_b32 v10, s17, s96, v1 -; GFX11-NEXT: v_perm_b32 v12, s18, s87, v1 -; GFX11-NEXT: v_perm_b32 v13, s19, s85, v1 -; GFX11-NEXT: v_perm_b32 v22, s64, s55, v1 -; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off -; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v8 -; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v20 -; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v11 -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v21 -; GFX11-NEXT: v_perm_b32 v14, s82, s88, v1 -; GFX11-NEXT: v_perm_b32 v17, s21, s65, v1 -; GFX11-NEXT: v_or_b32_e32 v2, v9, v2 -; GFX11-NEXT: v_or_b32_e32 v3, v10, v3 -; GFX11-NEXT: v_or_b32_e32 v4, v12, v4 -; GFX11-NEXT: v_or_b32_e32 v5, v13, v5 -; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v22 -; GFX11-NEXT: v_perm_b32 v15, s69, s78, v1 -; GFX11-NEXT: v_perm_b32 v16, s20, s68, v1 -; GFX11-NEXT: v_perm_b32 v6, s53, s52, v1 +; GFX11-NEXT: v_perm_b32 v6, s102, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 4 +; GFX11-NEXT: v_readlane_b32 s1, v22, 5 +; GFX11-NEXT: v_readlane_b32 s102, v20, 4 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v6 +; GFX11-NEXT: v_perm_b32 v8, s61, s74, v12 +; GFX11-NEXT: v_perm_b32 v10, vcc_hi, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 6 +; GFX11-NEXT: v_perm_b32 v7, s3, s86, v12 +; GFX11-NEXT: v_perm_b32 v13, s54, s104, v12 +; GFX11-NEXT: v_perm_b32 v15, s52, s50, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v8 +; GFX11-NEXT: v_perm_b32 v14, s56, s0, v12 +; GFX11-NEXT: v_perm_b32 v9, s16, s64, v12 +; GFX11-NEXT: v_perm_b32 v11, s17, s46, v12 +; GFX11-NEXT: v_perm_b32 v16, s18, s58, v12 +; GFX11-NEXT: v_perm_b32 v17, s19, s82, v12 +; GFX11-NEXT: v_or_b32_e32 v3, v5, v3 +; GFX11-NEXT: v_or_b32_e32 v4, v7, v4 +; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v10 +; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v13 ; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v14 -; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:16 -; GFX11-NEXT: v_or_b32_e32 v3, v17, v8 -; GFX11-NEXT: v_perm_b32 v8, s48, s39, v1 -; GFX11-NEXT: v_perm_b32 v9, s22, s54, v1 -; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v15 -; GFX11-NEXT: v_or_b32_e32 v2, v16, v7 -; GFX11-NEXT: v_perm_b32 v5, s50, s72, v1 -; GFX11-NEXT: v_perm_b32 v7, s23, s51, v1 +; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v15 +; GFX11-NEXT: v_perm_b32 v18, s48, s96, v12 +; GFX11-NEXT: v_or_b32_e32 v5, v9, v5 +; GFX11-NEXT: v_or_b32_e32 v6, v11, v6 +; GFX11-NEXT: v_or_b32_e32 v7, v16, v7 +; GFX11-NEXT: v_or_b32_e32 v8, v17, v8 +; GFX11-NEXT: v_perm_b32 v9, s88, s62, v12 +; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off +; GFX11-NEXT: v_perm_b32 v1, s76, s44, v12 +; GFX11-NEXT: v_readlane_b32 s1, v22, 7 +; GFX11-NEXT: v_perm_b32 v10, s20, s80, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v18 +; GFX11-NEXT: v_perm_b32 v3, s21, s70, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v9 +; GFX11-NEXT: v_perm_b32 v9, s22, s38, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v1 +; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:16 +; GFX11-NEXT: v_perm_b32 v5, s36, s87, v12 +; GFX11-NEXT: v_perm_b32 v6, s84, s68, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 8 +; GFX11-NEXT: v_or_b32_e32 v1, v10, v2 +; GFX11-NEXT: v_or_b32_e32 v2, v3, v4 +; GFX11-NEXT: v_or_b32_e32 v3, v9, v11 +; GFX11-NEXT: v_perm_b32 v4, s23, s97, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-NEXT: v_perm_b32 v7, s47, s85, v12 +; GFX11-NEXT: v_perm_b32 v8, s24, s57, v12 +; GFX11-NEXT: v_perm_b32 v9, s83, s0, v12 ; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-NEXT: v_perm_b32 v11, s25, s38, v1 +; GFX11-NEXT: v_readlane_b32 s0, v21, 3 +; GFX11-NEXT: v_perm_b32 v10, s25, s45, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX11-NEXT: v_perm_b32 v11, s26, s81, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-NEXT: v_or_b32_e32 v4, v4, v5 +; GFX11-NEXT: v_or_b32_e32 v5, v8, v6 +; GFX11-NEXT: v_perm_b32 v8, s69, s0, v12 +; GFX11-NEXT: v_readlane_b32 s1, v22, 9 +; GFX11-NEXT: v_or_b32_e32 v6, v10, v7 +; GFX11-NEXT: v_or_b32_e32 v7, v11, v9 +; GFX11-NEXT: v_perm_b32 v9, s27, s71, v12 +; GFX11-NEXT: v_perm_b32 v10, s34, s60, v12 ; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX11-NEXT: v_readlane_b32 s0, v25, 6 -; GFX11-NEXT: v_or_b32_e32 v4, v9, v10 -; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v5 -; GFX11-NEXT: v_or_b32_e32 v5, v7, v6 -; GFX11-NEXT: v_or_b32_e32 v7, v11, v8 -; GFX11-NEXT: v_perm_b32 v11, s0, s74, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 3 -; GFX11-NEXT: v_readlane_b32 s1, v25, 4 -; GFX11-NEXT: v_perm_b32 v9, s24, s49, v1 -; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:32 -; GFX11-NEXT: v_perm_b32 v12, s37, s76, v1 -; GFX11-NEXT: v_perm_b32 v8, s26, s36, v1 -; GFX11-NEXT: v_perm_b32 v2, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 7 -; GFX11-NEXT: v_or_b32_e32 v6, v9, v10 -; GFX11-NEXT: v_perm_b32 v10, s34, vcc_hi, v1 -; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12 -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11 -; GFX11-NEXT: v_perm_b32 v4, s28, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 5 +; GFX11-NEXT: v_perm_b32 v11, s66, s72, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 10 +; GFX11-NEXT: v_readlane_b32 s1, v22, 11 +; GFX11-NEXT: v_readlane_b32 s2, v22, 22 +; GFX11-NEXT: v_or_b32_e32 v8, v9, v8 +; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:32 +; GFX11-NEXT: v_perm_b32 v2, s65, s0, v12 ; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10 -; GFX11-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-NEXT: v_perm_b32 v9, s27, s35, v1 -; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2 -; GFX11-NEXT: v_perm_b32 v10, s29, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 1 -; GFX11-NEXT: v_or_b32_e32 v2, v4, v5 -; GFX11-NEXT: v_readlane_b32 s1, v26, 31 -; GFX11-NEXT: v_or_b32_e32 v9, v9, v3 -; GFX11-NEXT: v_or_b32_e32 v3, v10, v11 -; GFX11-NEXT: v_perm_b32 v12, s0, s62, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 2 -; GFX11-NEXT: v_readlane_b32 s104, v24, 6 -; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:48 -; GFX11-NEXT: v_readlane_b32 s102, v24, 4 -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12 -; GFX11-NEXT: v_perm_b32 v4, s40, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 30 -; GFX11-NEXT: v_readlane_b32 s101, v24, 3 -; GFX11-NEXT: v_readlane_b32 s100, v24, 2 -; GFX11-NEXT: v_readlane_b32 s99, v24, 1 -; GFX11-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-NEXT: v_perm_b32 v10, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 0 -; GFX11-NEXT: v_readlane_b32 s1, v26, 26 -; GFX11-NEXT: v_readlane_b32 s98, v24, 0 -; GFX11-NEXT: v_readlane_b32 s97, v23, 31 +; GFX11-NEXT: v_perm_b32 v4, s29, s95, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; GFX11-NEXT: v_readlane_b32 s0, v22, 12 +; GFX11-NEXT: v_readlane_b32 s1, v22, 13 +; GFX11-NEXT: v_perm_b32 v1, s28, s67, v12 +; GFX11-NEXT: v_perm_b32 v11, s40, s93, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v2 +; GFX11-NEXT: v_perm_b32 v9, s91, s53, v12 +; GFX11-NEXT: v_or_b32_e32 v2, v4, v10 +; GFX11-NEXT: v_perm_b32 v10, s51, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 14 +; GFX11-NEXT: v_or_b32_e32 v1, v1, v3 +; GFX11-NEXT: v_or_b32_e32 v3, v11, v13 +; GFX11-NEXT: v_perm_b32 v4, s41, s55, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-NEXT: v_perm_b32 v11, s49, s79, v12 +; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:48 +; GFX11-NEXT: v_perm_b32 v6, s37, s0, v12 +; GFX11-NEXT: v_readlane_b32 s1, v22, 15 +; GFX11-NEXT: v_perm_b32 v5, s14, s89, v12 ; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v10 -; GFX11-NEXT: v_perm_b32 v5, s41, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 28 -; GFX11-NEXT: v_readlane_b32 s96, v23, 30 -; GFX11-NEXT: v_readlane_b32 s87, v23, 29 -; GFX11-NEXT: v_readlane_b32 s86, v23, 28 +; GFX11-NEXT: v_perm_b32 v8, s15, s39, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; GFX11-NEXT: v_perm_b32 v11, s12, s35, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v6 +; GFX11-NEXT: v_or_b32_e32 v4, v4, v9 +; GFX11-NEXT: v_perm_b32 v9, s77, s103, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 16 +; GFX11-NEXT: v_readlane_b32 s1, v22, 17 ; GFX11-NEXT: v_or_b32_e32 v5, v5, v7 -; GFX11-NEXT: v_perm_b32 v11, s0, s60, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 25 -; GFX11-NEXT: v_readlane_b32 s85, v23, 27 -; GFX11-NEXT: v_readlane_b32 s84, v23, 26 -; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:64 -; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v11 -; GFX11-NEXT: v_perm_b32 v6, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 29 -; GFX11-NEXT: v_readlane_b32 s1, v26, 21 -; GFX11-NEXT: v_readlane_b32 s83, v23, 25 -; GFX11-NEXT: v_readlane_b32 s82, v23, 24 -; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v6 -; GFX11-NEXT: v_perm_b32 v8, s14, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 27 -; GFX11-NEXT: v_readlane_b32 s81, v23, 23 -; GFX11-NEXT: v_readlane_b32 s80, v23, 22 -; GFX11-NEXT: v_readlane_b32 s71, v23, 21 -; GFX11-NEXT: v_or_b32_e32 v6, v8, v9 -; GFX11-NEXT: v_perm_b32 v10, s15, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 23 -; GFX11-NEXT: v_readlane_b32 s70, v23, 20 -; GFX11-NEXT: v_readlane_b32 s69, v23, 19 -; GFX11-NEXT: v_readlane_b32 s68, v23, 18 -; GFX11-NEXT: v_or_b32_e32 v7, v10, v11 -; GFX11-NEXT: v_perm_b32 v12, s0, s58, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 24 -; GFX11-NEXT: v_readlane_b32 s67, v23, 17 -; GFX11-NEXT: v_readlane_b32 s66, v23, 16 -; GFX11-NEXT: v_readlane_b32 s65, v23, 15 -; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12 -; GFX11-NEXT: v_perm_b32 v8, s12, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 20 -; GFX11-NEXT: v_readlane_b32 s64, v23, 14 -; GFX11-NEXT: v_readlane_b32 s55, v23, 13 -; GFX11-NEXT: v_readlane_b32 s54, v23, 12 -; GFX11-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-NEXT: v_perm_b32 v10, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 22 -; GFX11-NEXT: v_readlane_b32 s1, v26, 16 -; GFX11-NEXT: v_readlane_b32 s53, v23, 11 -; GFX11-NEXT: v_readlane_b32 s52, v23, 10 +; GFX11-NEXT: v_or_b32_e32 v6, v8, v10 +; GFX11-NEXT: v_or_b32_e32 v7, v11, v13 +; GFX11-NEXT: v_perm_b32 v8, s13, s75, v12 +; GFX11-NEXT: v_perm_b32 v10, s100, s0, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-NEXT: v_perm_b32 v11, s63, s101, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 18 +; GFX11-NEXT: v_readlane_b32 s1, v22, 19 +; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:64 ; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10 -; GFX11-NEXT: v_perm_b32 v9, s13, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 18 -; GFX11-NEXT: v_readlane_b32 s51, v23, 9 -; GFX11-NEXT: v_readlane_b32 s50, v23, 8 -; GFX11-NEXT: v_readlane_b32 s49, v23, 7 -; GFX11-NEXT: v_or_b32_e32 v9, v9, v3 -; GFX11-NEXT: v_perm_b32 v11, s0, s56, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 15 -; GFX11-NEXT: v_readlane_b32 s48, v23, 6 -; GFX11-NEXT: v_readlane_b32 s39, v23, 5 -; GFX11-NEXT: v_readlane_b32 s38, v23, 4 -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11 -; GFX11-NEXT: v_perm_b32 v2, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 19 -; GFX11-NEXT: v_readlane_b32 s1, v26, 11 -; GFX11-NEXT: v_readlane_b32 s37, v23, 3 -; GFX11-NEXT: v_readlane_b32 s36, v23, 2 -; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2 -; GFX11-NEXT: v_perm_b32 v4, s10, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 17 -; GFX11-NEXT: v_readlane_b32 s35, v23, 1 -; GFX11-NEXT: v_readlane_b32 s34, v23, 0 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_or_b32_e32 v2, v4, v5 -; GFX11-NEXT: v_perm_b32 v10, s11, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 13 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v3, v10, v11 -; GFX11-NEXT: v_perm_b32 v12, s0, s46, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 14 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12 -; GFX11-NEXT: v_perm_b32 v4, s8, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 10 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-NEXT: v_perm_b32 v10, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 12 -; GFX11-NEXT: v_readlane_b32 s1, v26, 6 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_perm_b32 v4, s11, s59, v12 +; GFX11-NEXT: v_perm_b32 v2, s98, s0, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; GFX11-NEXT: v_or_b32_e32 v8, v8, v9 +; GFX11-NEXT: v_perm_b32 v9, s30, s94, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 20 +; GFX11-NEXT: v_readlane_b32 s1, v22, 21 +; GFX11-NEXT: v_perm_b32 v1, s10, s73, v12 +; GFX11-NEXT: v_perm_b32 v11, s8, s99, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v2 +; GFX11-NEXT: v_or_b32_e32 v2, v4, v10 +; GFX11-NEXT: v_perm_b32 v4, s90, s0, v12 +; GFX11-NEXT: v_perm_b32 v10, s9, s31, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-NEXT: v_readlane_b32 s0, v21, 2 +; GFX11-NEXT: v_readlane_b32 s1, v21, 1 +; GFX11-NEXT: v_or_b32_e32 v1, v1, v3 +; GFX11-NEXT: v_or_b32_e32 v3, v11, v13 +; GFX11-NEXT: v_perm_b32 v11, s6, s92, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v4 +; GFX11-NEXT: v_or_b32_e32 v4, v10, v9 +; GFX11-NEXT: v_perm_b32 v10, s0, s1, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 31 +; GFX11-NEXT: v_readlane_b32 s1, v22, 28 +; GFX11-NEXT: v_or_b32_e32 v9, v11, v13 +; GFX11-NEXT: v_perm_b32 v11, s7, s78, v12 ; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; GFX11-NEXT: v_perm_b32 v5, s9, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 8 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v5, v5, v10 -; GFX11-NEXT: v_perm_b32 v11, s0, s44, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 5 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_readlane_b32 s30, v20, 7 +; GFX11-NEXT: v_readlane_b32 s3, v22, 23 +; GFX11-NEXT: v_readlane_b32 s31, v20, 8 +; GFX11-NEXT: v_readlane_b32 s104, v20, 6 +; GFX11-NEXT: v_or_b32_e32 v10, v11, v10 +; GFX11-NEXT: v_perm_b32 v11, s0, s2, v12 +; GFX11-NEXT: v_readlane_b32 s0, v21, 0 +; GFX11-NEXT: v_readlane_b32 s103, v20, 5 +; GFX11-NEXT: v_readlane_b32 s101, v20, 3 +; GFX11-NEXT: v_readlane_b32 s100, v20, 2 ; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GFX11-NEXT: v_perm_b32 v10, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 9 -; GFX11-NEXT: v_readlane_b32 s1, v26, 1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v10 -; GFX11-NEXT: v_perm_b32 v12, s6, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 7 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v10, v12, v11 -; GFX11-NEXT: v_perm_b32 v14, s7, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 3 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v11, v14, v13 -; GFX11-NEXT: v_perm_b32 v12, s0, s42, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 4 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; GFX11-NEXT: v_perm_b32 v13, s4, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 0 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v12, v13, v12 -; GFX11-NEXT: v_perm_b32 v13, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 2 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_perm_b32 v13, s4, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 29 +; GFX11-NEXT: v_readlane_b32 s99, v20, 1 +; GFX11-NEXT: v_readlane_b32 s98, v20, 0 +; GFX11-NEXT: v_readlane_b32 s97, v19, 31 +; GFX11-NEXT: v_or_b32_e32 v11, v13, v11 +; GFX11-NEXT: v_perm_b32 v13, s0, s1, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 30 +; GFX11-NEXT: v_readlane_b32 s96, v19, 30 +; GFX11-NEXT: v_readlane_b32 s87, v19, 29 +; GFX11-NEXT: v_readlane_b32 s86, v19, 28 ; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; GFX11-NEXT: v_perm_b32 v1, s5, s0, v1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX11-NEXT: v_or_b32_e32 v13, v1, v13 +; GFX11-NEXT: v_perm_b32 v12, s5, s0, v12 +; GFX11-NEXT: v_readlane_b32 s85, v19, 27 +; GFX11-NEXT: v_readlane_b32 s84, v19, 26 +; GFX11-NEXT: v_readlane_b32 s83, v19, 25 +; GFX11-NEXT: v_readlane_b32 s82, v19, 24 +; GFX11-NEXT: v_or_b32_e32 v12, v12, v13 ; GFX11-NEXT: s_clause 0x2 -; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:80 -; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:96 -; GFX11-NEXT: scratch_store_b128 v0, v[10:13], off offset:112 +; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:80 +; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:96 +; GFX11-NEXT: scratch_store_b128 v0, v[9:12], off offset:112 +; GFX11-NEXT: v_readlane_b32 s81, v19, 23 +; GFX11-NEXT: v_readlane_b32 s80, v19, 22 +; GFX11-NEXT: v_readlane_b32 s71, v19, 21 +; GFX11-NEXT: v_readlane_b32 s70, v19, 20 +; GFX11-NEXT: v_readlane_b32 s69, v19, 19 +; GFX11-NEXT: v_readlane_b32 s68, v19, 18 +; GFX11-NEXT: v_readlane_b32 s67, v19, 17 +; GFX11-NEXT: v_readlane_b32 s66, v19, 16 +; GFX11-NEXT: v_readlane_b32 s65, v19, 15 +; GFX11-NEXT: v_readlane_b32 s64, v19, 14 +; GFX11-NEXT: v_readlane_b32 s55, v19, 13 +; GFX11-NEXT: v_readlane_b32 s54, v19, 12 +; GFX11-NEXT: v_readlane_b32 s53, v19, 11 +; GFX11-NEXT: v_readlane_b32 s52, v19, 10 +; GFX11-NEXT: v_readlane_b32 s51, v19, 9 +; GFX11-NEXT: v_readlane_b32 s50, v19, 8 +; GFX11-NEXT: v_readlane_b32 s49, v19, 7 +; GFX11-NEXT: v_readlane_b32 s48, v19, 6 +; GFX11-NEXT: v_readlane_b32 s39, v19, 5 +; GFX11-NEXT: v_readlane_b32 s38, v19, 4 +; GFX11-NEXT: v_readlane_b32 s37, v19, 3 +; GFX11-NEXT: v_readlane_b32 s36, v19, 2 +; GFX11-NEXT: v_readlane_b32 s35, v19, 1 +; GFX11-NEXT: v_readlane_b32 s34, v19, 0 ; GFX11-NEXT: s_xor_saveexec_b32 s0, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload -; GFX11-NEXT: scratch_load_b32 v23, off, s32 -; GFX11-NEXT: scratch_load_b32 v24, off, s32 offset:4 -; GFX11-NEXT: scratch_load_b32 v25, off, s32 offset:8 -; GFX11-NEXT: scratch_load_b32 v26, off, s32 offset:12 +; GFX11-NEXT: scratch_load_b32 v19, off, s32 +; GFX11-NEXT: scratch_load_b32 v20, off, s32 offset:4 +; GFX11-NEXT: scratch_load_b32 v21, off, s32 offset:8 +; GFX11-NEXT: scratch_load_b32 v22, off, s32 offset:12 ; GFX11-NEXT: s_mov_b32 exec_lo, s0 ; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_setpc_b64 s[30:31] -; GFX11-NEXT: .LBB13_4: -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr104 -; GFX11-NEXT: ; implicit-def: $sgpr103 -; GFX11-NEXT: ; implicit-def: $sgpr30 -; GFX11-NEXT: ; implicit-def: $sgpr102 -; GFX11-NEXT: ; implicit-def: $sgpr84 -; GFX11-NEXT: ; implicit-def: $sgpr83 -; GFX11-NEXT: ; implicit-def: $sgpr101 -; GFX11-NEXT: ; implicit-def: $sgpr100 -; GFX11-NEXT: ; implicit-def: $sgpr94 -; GFX11-NEXT: ; implicit-def: $sgpr99 -; GFX11-NEXT: ; implicit-def: $sgpr81 -; GFX11-NEXT: ; implicit-def: $sgpr80 -; GFX11-NEXT: ; implicit-def: $sgpr98 -; GFX11-NEXT: ; implicit-def: $sgpr97 -; GFX11-NEXT: ; implicit-def: $sgpr92 -; GFX11-NEXT: ; implicit-def: $sgpr96 -; GFX11-NEXT: ; implicit-def: $sgpr71 -; GFX11-NEXT: ; implicit-def: $sgpr70 -; GFX11-NEXT: ; implicit-def: $sgpr87 -; GFX11-NEXT: ; implicit-def: $sgpr86 -; GFX11-NEXT: ; implicit-def: $sgpr90 -; GFX11-NEXT: ; implicit-def: $sgpr85 -; GFX11-NEXT: ; implicit-def: $sgpr67 -; GFX11-NEXT: ; implicit-def: $sgpr66 -; GFX11-NEXT: ; implicit-def: $sgpr68 -; GFX11-NEXT: ; implicit-def: $sgpr82 -; GFX11-NEXT: ; implicit-def: $sgpr88 -; GFX11-NEXT: ; implicit-def: $sgpr65 -; GFX11-NEXT: ; implicit-def: $sgpr64 -; GFX11-NEXT: ; implicit-def: $sgpr55 -; GFX11-NEXT: ; implicit-def: $sgpr54 -; GFX11-NEXT: ; implicit-def: $sgpr69 -; GFX11-NEXT: ; implicit-def: $sgpr78 -; GFX11-NEXT: ; implicit-def: $sgpr51 -; GFX11-NEXT: ; implicit-def: $sgpr53 -; GFX11-NEXT: ; implicit-def: $sgpr52 -; GFX11-NEXT: ; implicit-def: $sgpr49 -; GFX11-NEXT: ; implicit-def: $sgpr50 -; GFX11-NEXT: ; implicit-def: $sgpr72 -; GFX11-NEXT: ; implicit-def: $sgpr38 -; GFX11-NEXT: ; implicit-def: $sgpr48 -; GFX11-NEXT: ; implicit-def: $sgpr39 -; GFX11-NEXT: ; implicit-def: $sgpr36 -; GFX11-NEXT: ; implicit-def: $sgpr37 -; GFX11-NEXT: ; implicit-def: $sgpr35 -; GFX11-NEXT: ; implicit-def: $sgpr34 -; GFX11-NEXT: ; implicit-def: $vcc_hi -; GFX11-NEXT: ; implicit-def: $sgpr76 -; GFX11-NEXT: ; implicit-def: $sgpr74 -; GFX11-NEXT: ; implicit-def: $sgpr62 -; GFX11-NEXT: ; implicit-def: $sgpr60 -; GFX11-NEXT: ; implicit-def: $sgpr58 -; GFX11-NEXT: ; implicit-def: $sgpr56 -; GFX11-NEXT: ; implicit-def: $sgpr46 -; GFX11-NEXT: ; implicit-def: $sgpr44 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: s_branch .LBB13_2 %cmp = icmp eq i32 %b, 0 br i1 %cmp, label %cmp.true, label %cmp.false @@ -11651,22 +11682,22 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:388 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 @@ -11685,33 +11716,33 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:112 ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:128 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:128 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:136 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:144 ; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 ; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:160 ; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:168 ; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:184 -; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v1 -; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v3 -; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v5 -; SI-NEXT: v_lshlrev_b32_e32 v40, 24, v7 -; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v9 -; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v11 -; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v13 -; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v15 -; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v17 -; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v19 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v21 -; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v23 -; SI-NEXT: v_lshlrev_b32_e32 v56, 8, v25 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v27 -; SI-NEXT: v_lshlrev_b32_e32 v46, 8, v29 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:184 +; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v1 +; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v3 +; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v5 +; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v7 +; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v9 +; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v11 +; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v13 +; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v15 +; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v17 +; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v19 +; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v21 +; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v23 +; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v25 +; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v27 +; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v29 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30 -; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v0 -; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v2 +; SI-NEXT: v_lshlrev_b32_e32 v61, 24, v0 +; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v4 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) @@ -11768,19 +11799,19 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v33 +; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v32 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v35 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v33 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v36 +; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v35 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v39 @@ -11788,19 +11819,19 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill @@ -11811,7 +11842,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v51 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v40 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 @@ -11819,27 +11850,27 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:188 -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:44 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:28 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:20 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:12 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:4 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:108 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:100 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:92 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:84 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:76 -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68 -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:60 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:44 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:28 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:20 +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:12 +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:4 +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:108 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:100 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:92 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:84 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:76 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:60 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 @@ -11848,15 +11879,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:204 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:212 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:224 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 @@ -11870,24 +11901,24 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 @@ -11896,29 +11927,26 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:252 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:260 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:268 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:268 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:276 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 @@ -11927,29 +11955,29 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:292 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 @@ -11958,29 +11986,29 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:332 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:340 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:352 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 @@ -11989,239 +12017,307 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:348 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:356 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 -; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v3 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:364 ; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:372 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB14_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v9, 0xff, v56 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v9, 0xff, v49 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v0, v0, v54 -; SI-NEXT: v_or_b32_e32 v2, v2, v41 +; SI-NEXT: v_or_b32_e32 v0, v0, v37 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 -; SI-NEXT: v_or_b32_e32 v3, v40, v3 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v9, v10, v9 ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v53, v2 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_or_b32_e32 v3, v47, v3 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 +; SI-NEXT: v_or_b32_e32 v4, v45, v4 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v60, v5 +; SI-NEXT: v_or_b32_e32 v5, v41, v5 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v58, v6 +; SI-NEXT: v_or_b32_e32 v6, v62, v6 ; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v37, v7 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v7, v48, v7 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v61, v8 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr53 +; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr60 +; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 +; SI-NEXT: v_or_b32_e32 v1, v1, v58 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v2, v2, v53 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v34, v3 +; SI-NEXT: v_or_b32_e32 v2, v2, v52 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v55, v8 -; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v3, v48 +; SI-NEXT: v_or_b32_e32 v3, v3, v36 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 -; SI-NEXT: v_or_b32_e32 v4, v4, v62 +; SI-NEXT: v_or_b32_e32 v4, v4, v43 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 -; SI-NEXT: v_or_b32_e32 v5, v5, v38 +; SI-NEXT: v_or_b32_e32 v5, v5, v63 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_or_b32_e32 v6, v6, v56 +; SI-NEXT: v_or_b32_e32 v6, v6, v34 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v7, v7, v46 +; SI-NEXT: v_or_b32_e32 v7, v7, v38 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xff, v35 -; SI-NEXT: v_or_b32_e32 v8, v8, v44 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v57 +; SI-NEXT: v_or_b32_e32 v8, v8, v55 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: v_and_b32_e32 v9, 0xff, v33 +; SI-NEXT: v_and_b32_e32 v9, 0xff, v46 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xff, v52 +; SI-NEXT: v_and_b32_e32 v10, 0xff, v51 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 ; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xff, v63 -; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr52 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: v_and_b32_e32 v10, 0xff, v44 +; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xff, v39 +; SI-NEXT: v_and_b32_e32 v11, 0xff, v50 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xff, v61 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: v_and_b32_e32 v11, 0xff, v42 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xff, v59 +; SI-NEXT: v_and_b32_e32 v12, 0xff, v35 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xff, v51 -; SI-NEXT: ; implicit-def: $vgpr59 -; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: v_and_b32_e32 v12, 0xff, v40 +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xff, v57 +; SI-NEXT: v_and_b32_e32 v13, 0xff, v49 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xff, v47 -; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: v_and_b32_e32 v13, 0xff, v39 +; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v50 +; SI-NEXT: v_and_b32_e32 v14, 0xff, v33 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v45 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr45 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v14, 0xff, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v14, v14, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v36 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v60 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -12239,204 +12335,299 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 +; SI-NEXT: v_and_b32_e32 v25, 0xff, v59 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v26, v26, v27 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: v_or_b32_e32 v26, v26, v27 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v28, v28, v29 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: v_or_b32_e32 v28, v28, v29 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v30, v30, v31 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_or_b32_e32 v30, v30, v31 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v31, v31, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v32, 0xff, v32 -; SI-NEXT: v_or_b32_e32 v31, v31, v43 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_or_b32_e32 v32, v33, v32 ; SI-NEXT: v_or_b32_e32 v31, v31, v32 ; SI-NEXT: ; implicit-def: $vgpr32 @@ -12448,351 +12639,189 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: .LBB14_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB14_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; SI-NEXT: s_movk_i32 s6, 0x300 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v49 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v56 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: s_movk_i32 s6, 0x300 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b32 s7, 0x3000000 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v54, v0 +; SI-NEXT: v_or_b32_e32 v0, v37, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v40, v2 +; SI-NEXT: v_or_b32_e32 v2, v53, v2 ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v34, v3 +; SI-NEXT: v_or_b32_e32 v3, v47, v3 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v4, v45, v4 ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v60, v5 -; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_or_b32_e32 v5, v41, v5 +; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v58, v6 -; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_or_b32_e32 v6, v62, v6 +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v37, v7 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v7, v48, v7 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v61, v8 ; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v0 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_or_b32_e32 v1, v58, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v55, v8 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_or_b32_e32 v2, v53, v2 +; SI-NEXT: v_or_b32_e32 v2, v52, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v48, v3 +; SI-NEXT: v_or_b32_e32 v3, v36, v3 ; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v3, vcc, s7, v3 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 -; SI-NEXT: v_or_b32_e32 v4, v62, v4 +; SI-NEXT: v_or_b32_e32 v4, v43, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v4, vcc, s7, v4 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 -; SI-NEXT: v_or_b32_e32 v5, v38, v5 +; SI-NEXT: v_or_b32_e32 v5, v63, v5 ; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v5, vcc, s7, v5 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_or_b32_e32 v6, v56, v6 +; SI-NEXT: v_or_b32_e32 v6, v34, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v6, vcc, s7, v6 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v7, v46, v7 +; SI-NEXT: v_or_b32_e32 v7, v38, v7 ; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v35 +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v57 ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_or_b32_e32 v8, v44, v8 +; SI-NEXT: v_or_b32_e32 v8, v55, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v33 +; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v46 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v52 +; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51 ; SI-NEXT: v_and_b32_e32 v10, 0xff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 @@ -12800,15 +12829,14 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v63 +; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v10, 0xff, v10 ; SI-NEXT: v_add_i32_e32 v7, vcc, s7, v7 ; SI-NEXT: v_add_i32_e32 v8, vcc, s7, v8 ; SI-NEXT: v_add_i32_e32 v9, vcc, s7, v9 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v39 +; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50 ; SI-NEXT: v_and_b32_e32 v11, 0xff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 @@ -12816,12 +12844,12 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v61 +; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v11, 0xff, v11 ; SI-NEXT: v_add_i32_e32 v10, vcc, s7, v10 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v59 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v35 ; SI-NEXT: v_and_b32_e32 v12, 0xff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 @@ -12829,12 +12857,12 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v40 ; SI-NEXT: v_and_b32_e32 v12, 0xff, v12 ; SI-NEXT: v_add_i32_e32 v11, vcc, s7, v11 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v57 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v49 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 @@ -12842,12 +12870,12 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v39 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_add_i32_e32 v12, vcc, s7, v12 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v50 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 @@ -12855,12 +12883,14 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v45 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v32 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_add_i32_e32 v13, vcc, s7, v13 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v36 +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v60 ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 @@ -12892,7 +12922,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -12901,7 +12931,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 ; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v16, vcc, s7, v16 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -12909,7 +12939,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v17, v18, v17 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -12918,7 +12948,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v17, vcc, s7, v17 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -12926,7 +12956,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v18, v19, v18 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -12935,7 +12965,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v18, vcc, s7, v18 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -12943,7 +12973,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -12952,7 +12982,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s7, v19 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -12960,7 +12990,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v20, v21, v20 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v20 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -12969,7 +12999,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v20, vcc, s7, v20 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -12977,7 +13007,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v21, v22, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, s6, v21 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -12986,7 +13016,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, s7, v21 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -12994,7 +13024,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v22, v23, v22 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v22 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -13003,15 +13033,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, s7, v22 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23 ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v23, v24, v23 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, s6, v23 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -13020,32 +13050,30 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, s7, v23 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v24, v25, v24 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 +; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v59 ; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 +; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v24, vcc, s7, v24 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v25, v26, v25 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -13054,15 +13082,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, s7, v25 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v26, v27, v26 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -13071,15 +13099,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, s7, v26 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v27, v28, v27 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -13088,15 +13116,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, s7, v27 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v28, v29, v28 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -13105,15 +13133,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, s7, v28 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v29, v30, v29 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v29, vcc, s6, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -13122,15 +13150,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v29, vcc, s7, v29 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30 ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v30, v31, v30 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v30, vcc, s6, v30 ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -13139,19 +13167,21 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v30 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v31, vcc, 3, v31 ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v31, v32, v31 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v31, vcc, 0x300, v31 +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v32, vcc, 3, v32 -; SI-NEXT: v_or_b32_e32 v31, v43, v31 ; SI-NEXT: v_and_b32_e32 v32, 0xff, v32 -; SI-NEXT: v_add_i32_e32 v31, vcc, 0x300, v31 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_or_b32_e32 v32, v33, v32 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_add_i32_e32 v31, vcc, 0x3000000, v31 @@ -13195,11 +13225,11 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill @@ -13218,13 +13248,13 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 @@ -13244,20 +13274,20 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:72 ; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:68 ; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:64 -; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:60 -; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:56 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:48 +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:60 +; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:56 +; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:52 +; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:48 ; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:44 ; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:40 ; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:36 ; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:32 -; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:28 -; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:24 -; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:20 -; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:16 +; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:28 +; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:24 +; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:20 +; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:16 ; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:12 -; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:8 +; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:8 ; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:4 ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 @@ -13290,19 +13320,19 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill @@ -13376,25 +13406,25 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:348 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:344 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:340 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill @@ -13406,19 +13436,19 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:324 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:148 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill @@ -13459,18 +13489,18 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB14_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b32 s6, 0xc0c0004 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v9, v33, v62, s6 +; VI-NEXT: v_perm_b32 v9, v33, v32, s6 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_perm_b32 v10, v63, v60, s6 +; VI-NEXT: v_perm_b32 v10, v61, v60, s6 ; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_perm_b32 v11, v53, v58, s6 +; VI-NEXT: v_perm_b32 v11, v53, v52, s6 ; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; VI-NEXT: v_perm_b32 v12, v51, v56, s6 +; VI-NEXT: v_perm_b32 v12, v57, v56, s6 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_perm_b32 v13, v37, v36, s6 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -13479,12 +13509,11 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v15, v49, v48, s6 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; implicit-def: $vgpr63 +; VI-NEXT: ; implicit-def: $vgpr61 ; VI-NEXT: ; implicit-def: $vgpr60 ; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 @@ -13494,25 +13523,25 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v0, v1, v0, s6 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v16, v17, v16, s6 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s6 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s6 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v2, v1, s6 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) @@ -13557,28 +13586,28 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v6, v6, v7 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v8, v8, v41, s6 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_perm_b32 v8, v55, v34, s6 +; VI-NEXT: v_perm_b32 v8, v55, v63, s6 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 -; VI-NEXT: v_perm_b32 v9, v61, v32, s6 +; VI-NEXT: v_perm_b32 v9, v34, v62, s6 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 ; VI-NEXT: v_perm_b32 v10, v59, v54, s6 ; VI-NEXT: v_or_b32_e32 v10, v10, v11 -; VI-NEXT: v_perm_b32 v11, v57, v52, s6 +; VI-NEXT: v_perm_b32 v11, v51, v58, s6 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 ; VI-NEXT: v_perm_b32 v12, v47, v38, s6 ; VI-NEXT: v_or_b32_e32 v12, v12, v13 @@ -13592,12 +13621,13 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; VI-NEXT: ; implicit-def: $vgpr41 ; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr61 +; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr59 ; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr35 @@ -13614,22 +13644,22 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v17, v18, v17, s6 ; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; VI-NEXT: v_or_b32_e32 v16, v16, v17 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v17, v18, v17, s6 ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v19, v18, s6 ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; VI-NEXT: v_or_b32_e32 v17, v17, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v19, v18, s6 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v19, v20, v19, s6 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 @@ -13678,18 +13708,18 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v23, v24, v23, s6 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v24, v25, v24, s6 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v24, v25, v24, s6 ; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v25, v26, v25, s6 ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 @@ -13962,25 +13992,24 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_cbranch_execz .LBB14_4 ; VI-NEXT: ; %bb.3: ; %cmp.true ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; VI-NEXT: v_mov_b32_e32 v31, 0x300 ; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v41 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32 ; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v60 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58 +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52 ; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v56 ; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v36 ; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v44 ; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v48 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload @@ -13988,79 +14017,82 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_add_u16_e32 v0, 3, v0 ; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_lshlrev_b16_e32 v20, 8, v20 ; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 +; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5 ; VI-NEXT: v_lshlrev_b16_e32 v23, 8, v23 -; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26 +; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 ; VI-NEXT: s_waitcnt vmcnt(12) -; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 +; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; VI-NEXT: s_waitcnt vmcnt(11) -; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 +; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 ; VI-NEXT: s_waitcnt vmcnt(10) -; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 +; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: s_waitcnt vmcnt(9) -; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 +; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 ; VI-NEXT: s_waitcnt vmcnt(8) -; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 ; VI-NEXT: s_waitcnt vmcnt(7) -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 +; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; VI-NEXT: s_waitcnt vmcnt(6) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 +; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26 ; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 -; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v27, 8, v27 -; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: v_lshlrev_b16_e32 v29, 8, v29 -; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_lshlrev_b16_e32 v30, 8, v30 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v1, 3, v1 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_sdwa v1, v1, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v1, 3, v1 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v2, 3, v2 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v3, v3, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_sdwa v2, v2, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_add_u16_e32 v2, 3, v2 ; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v2, 3, v2 +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v3, 3, v3 @@ -14116,21 +14148,21 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v6, 0x300, v6 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v7, 3, v7 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v7, v7, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v6, v6, v7 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v7, 3, v7 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v7, 0x300, v7 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v8, 3, v8 @@ -14138,17 +14170,17 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_sdwa v8, v8, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v7, v7, v8 ; VI-NEXT: v_add_u16_e32 v8, 3, v55 -; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v34 +; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v63 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 3, v33 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v8, 0x300, v8 ; VI-NEXT: v_add_u16_sdwa v9, v9, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v8, v8, v9 -; VI-NEXT: v_add_u16_e32 v9, 3, v61 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32 +; VI-NEXT: v_add_u16_e32 v9, 3, v34 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v10, 3, v63 +; VI-NEXT: v_add_u16_e32 v10, 3, v61 ; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 0x300, v9 ; VI-NEXT: v_add_u16_sdwa v10, v10, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -14161,10 +14193,10 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_e32 v10, 0x300, v10 ; VI-NEXT: v_add_u16_sdwa v11, v11, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v10, v10, v11 -; VI-NEXT: v_add_u16_e32 v11, 3, v57 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52 +; VI-NEXT: v_add_u16_e32 v11, 3, v51 +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58 ; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v12, 3, v51 +; VI-NEXT: v_add_u16_e32 v12, 3, v57 ; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v11, 0x300, v11 ; VI-NEXT: v_add_u16_sdwa v12, v12, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -14198,18 +14230,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v15, 0x300, v15 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_add_u16_e32 v16, 3, v16 ; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v16, v16, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v15, v15, v16 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33 ; VI-NEXT: s_waitcnt vmcnt(2) @@ -14226,28 +14255,28 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v17, v17, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v16, v16, v17 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v17, 3, v17 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v17, 0x300, v17 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v18, 3, v18 ; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v18, v18, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v17, v17, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v18, 3, v18 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 ; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v18, 0x300, v18 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v19, 3, v19 @@ -14317,21 +14346,21 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24 ; VI-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v23, 0x300, v23 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v24, 3, v24 ; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v24, v24, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v24, 3, v24 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25 ; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v24, 0x300, v24 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v25, 3, v25 @@ -14479,11 +14508,11 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill @@ -14497,14 +14526,14 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 @@ -14514,23 +14543,23 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112 ; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:108 ; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:104 -; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:100 +; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:100 ; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:96 -; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:92 -; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:88 -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:84 -; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:80 +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:92 +; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:88 +; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:84 +; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:80 ; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:76 -; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:72 -; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:68 +; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:72 +; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:68 ; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:64 -; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:60 -; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:56 -; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:52 -; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:48 +; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:60 +; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:56 +; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:52 +; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:48 ; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:44 -; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:40 -; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:36 +; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:40 +; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:36 ; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:32 ; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:28 ; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:24 @@ -14567,7 +14596,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill @@ -14579,7 +14608,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill @@ -14616,7 +14645,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:380 +; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:380 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:376 ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -14638,31 +14667,31 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:364 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:360 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:356 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:352 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:348 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill @@ -14674,13 +14703,13 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:340 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill @@ -14742,46 +14771,46 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB14_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004 ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v10, v55, v32, s6 -; GFX9-NEXT: v_perm_b32 v11, v61, v60, s6 -; GFX9-NEXT: v_perm_b32 v12, v53, v38, s6 -; GFX9-NEXT: v_perm_b32 v13, v57, v56, s6 -; GFX9-NEXT: v_perm_b32 v14, v51, v34, s6 +; GFX9-NEXT: v_perm_b32 v11, v61, v54, s6 +; GFX9-NEXT: v_perm_b32 v12, v59, v38, s6 +; GFX9-NEXT: v_perm_b32 v13, v57, v52, s6 +; GFX9-NEXT: v_perm_b32 v14, v47, v34, s6 ; GFX9-NEXT: v_perm_b32 v15, v45, v50, s6 ; GFX9-NEXT: ; implicit-def: $vgpr55 ; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr59 ; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr34 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr50 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v0, v1, v0, s6 ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v16, v43, v16, s6 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -14809,7 +14838,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 @@ -14818,7 +14847,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 @@ -14841,15 +14870,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8 ; GFX9-NEXT: v_perm_b32 v9, v39, v40, s6 ; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v10, v62, v63, s6 +; GFX9-NEXT: v_perm_b32 v10, v63, v62, s6 ; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10 -; GFX9-NEXT: v_perm_b32 v11, v59, v54, s6 +; GFX9-NEXT: v_perm_b32 v11, v53, v60, s6 ; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11 -; GFX9-NEXT: v_perm_b32 v12, v58, v37, s6 +; GFX9-NEXT: v_perm_b32 v12, v37, v58, s6 ; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12 -; GFX9-NEXT: v_perm_b32 v13, v47, v52, s6 +; GFX9-NEXT: v_perm_b32 v13, v51, v56, s6 ; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13 -; GFX9-NEXT: v_perm_b32 v14, v33, v46, s6 +; GFX9-NEXT: v_perm_b32 v14, v36, v46, s6 ; GFX9-NEXT: v_lshl_or_b32 v14, v15, 16, v14 ; GFX9-NEXT: v_perm_b32 v15, v49, v44, s6 ; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15 @@ -14861,15 +14890,15 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr40 -; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr46 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr44 @@ -14889,21 +14918,21 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 ; GFX9-NEXT: v_lshl_or_b32 v17, v18, 16, v17 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s6 ; GFX9-NEXT: v_lshl_or_b32 v18, v19, 16, v18 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s6 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v20, v21, v20, s6 ; GFX9-NEXT: v_lshl_or_b32 v19, v20, 16, v19 @@ -14939,7 +14968,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 ; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6 ; GFX9-NEXT: v_lshl_or_b32 v23, v24, 16, v23 @@ -14948,7 +14977,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6 ; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6 ; GFX9-NEXT: v_lshl_or_b32 v24, v25, 16, v24 @@ -15012,223 +15041,223 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v32, v36, v32, s6 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: v_perm_b32 v32, v33, v32, s6 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: .LBB14_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB14_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload ; GFX9-NEXT: s_movk_i32 s6, 0x300 ; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload @@ -15236,9 +15265,9 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v48 ; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v32 -; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60 +; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54 ; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v38 -; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56 +; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52 ; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v34 ; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v50 ; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload @@ -15251,19 +15280,19 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(24) ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0 ; GFX9-NEXT: s_waitcnt vmcnt(22) ; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; GFX9-NEXT: s_waitcnt vmcnt(21) ; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; GFX9-NEXT: s_waitcnt vmcnt(20) +; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21 +; GFX9-NEXT: s_waitcnt vmcnt(18) ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; GFX9-NEXT: s_waitcnt vmcnt(19) +; GFX9-NEXT: s_waitcnt vmcnt(17) ; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18 -; GFX9-NEXT: s_waitcnt vmcnt(18) -; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21 ; GFX9-NEXT: s_waitcnt vmcnt(16) ; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: s_waitcnt vmcnt(15) @@ -15301,30 +15330,30 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v1, 3, v1 ; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v1, 3, v1 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 ; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 @@ -15360,7 +15389,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v5, v5, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v4, v4, v5 ; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v5, 3, v5 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -15374,7 +15403,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -15417,39 +15446,39 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 ; GFX9-NEXT: v_add_u16_sdwa v10, v10, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v62 -; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v63 +; GFX9-NEXT: v_add_u16_e32 v10, 3, v63 +; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v62 ; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v11, 3, v61 ; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 ; GFX9-NEXT: v_add_u16_sdwa v11, v11, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX9-NEXT: v_add_u16_e32 v11, 3, v59 -; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54 +; GFX9-NEXT: v_add_u16_e32 v11, 3, v53 +; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60 ; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v53 +; GFX9-NEXT: v_add_u16_e32 v12, 3, v59 ; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 ; GFX9-NEXT: v_add_u16_sdwa v12, v12, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v58 -; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v37 +; GFX9-NEXT: v_add_u16_e32 v12, 3, v37 +; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v58 ; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v13, 3, v57 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 ; GFX9-NEXT: v_add_u16_sdwa v13, v13, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v12, v12, v13 -; GFX9-NEXT: v_add_u16_e32 v13, 3, v47 -; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52 +; GFX9-NEXT: v_add_u16_e32 v13, 3, v51 +; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v14, 3, v51 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v47 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 ; GFX9-NEXT: v_add_u16_sdwa v14, v14, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 -; GFX9-NEXT: v_add_u16_e32 v14, 3, v33 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v36 ; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v46 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v15, 3, v45 @@ -15467,16 +15496,13 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_e32 v15, v15, v16 ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v16, 3, v16 ; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v16, 3, v16 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v17, 3, v17 ; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -15496,8 +15522,8 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v18, v18, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v17, v17, v18 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v18, 3, v18 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -15510,14 +15536,14 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v19, v19, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v18, v18, v19 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v19, 3, v19 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v20 ; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v19, 0x300, v19 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v20, 3, v20 @@ -15573,7 +15599,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v24, 8, v24 ; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v23, 0x300, v23 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v24, 3, v24 @@ -15587,7 +15613,7 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v25, 8, v25 ; GFX9-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v24, 0x300, v24 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v25, 3, v25 @@ -15685,9 +15711,12 @@ define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v32, 3, v36 -; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v32, 3, v33 +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v31 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33 +; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v32, v32, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v31, v31, v32 ; GFX9-NEXT: .LBB14_4: ; %end @@ -17518,9 +17547,7 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: v_readfirstlane_b32 s76, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 -; SI-NEXT: v_readfirstlane_b32 s46, v30 +; SI-NEXT: v_readfirstlane_b32 s42, v30 ; SI-NEXT: v_readfirstlane_b32 s6, v29 ; SI-NEXT: v_readfirstlane_b32 s7, v28 ; SI-NEXT: v_readfirstlane_b32 s8, v27 @@ -17533,36 +17560,38 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: v_readfirstlane_b32 s15, v20 ; SI-NEXT: v_readfirstlane_b32 s40, v19 ; SI-NEXT: v_readfirstlane_b32 s41, v18 -; SI-NEXT: v_readfirstlane_b32 s42, v17 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:8 -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:16 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:24 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:32 -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:40 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:48 -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:72 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:80 -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:88 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:96 +; SI-NEXT: v_readfirstlane_b32 s43, v17 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:8 +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:16 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:24 +; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:32 +; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:64 +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:80 +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:88 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:96 +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:104 +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:112 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:120 +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:128 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:104 -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:112 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:120 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:128 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:136 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:144 -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160 -; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:168 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:176 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:184 -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:192 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:200 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:208 +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:136 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:144 +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:152 +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:168 +; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:176 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:184 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:192 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:200 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:208 ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:216 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:224 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:232 @@ -17579,275 +17608,284 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:320 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:328 ; SI-NEXT: v_readfirstlane_b32 s75, v1 -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332 -; SI-NEXT: v_readfirstlane_b32 s43, v16 -; SI-NEXT: v_readfirstlane_b32 s45, v14 +; SI-NEXT: v_readfirstlane_b32 s76, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:332 +; SI-NEXT: v_readfirstlane_b32 s56, v12 ; SI-NEXT: v_readfirstlane_b32 s73, v3 -; SI-NEXT: v_readfirstlane_b32 s74, v2 ; SI-NEXT: v_readfirstlane_b32 s57, v11 -; SI-NEXT: v_readfirstlane_b32 s72, v4 -; SI-NEXT: v_readfirstlane_b32 s44, v15 +; SI-NEXT: v_readfirstlane_b32 s45, v15 +; SI-NEXT: v_readfirstlane_b32 s46, v14 +; SI-NEXT: v_readfirstlane_b32 s74, v2 +; SI-NEXT: v_readfirstlane_b32 s44, v16 ; SI-NEXT: v_readfirstlane_b32 s47, v13 -; SI-NEXT: v_readfirstlane_b32 s56, v12 ; SI-NEXT: v_readfirstlane_b32 s58, v10 ; SI-NEXT: v_readfirstlane_b32 s59, v9 ; SI-NEXT: v_readfirstlane_b32 s60, v8 ; SI-NEXT: v_readfirstlane_b32 s61, v7 ; SI-NEXT: v_readfirstlane_b32 s62, v6 ; SI-NEXT: v_readfirstlane_b32 s63, v5 +; SI-NEXT: v_readfirstlane_b32 s72, v4 ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v50 -; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v51 -; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v52 -; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v53 -; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v54 -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v55 -; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v40 -; SI-NEXT: v_lshlrev_b32_e32 v60, 8, v41 -; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v42 -; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v43 -; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v46 -; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v56 -; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v59 -; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v61 -; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v44 -; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v45 -; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v47 -; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v57 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 -; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v30 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v29 -; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v28 +; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v35 +; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v52 +; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v53 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v54 +; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v55 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v40 +; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v41 +; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v42 +; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v43 +; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v44 +; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v45 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v46 +; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v47 +; SI-NEXT: v_lshlrev_b32_e32 v42, 8, v56 +; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v57 +; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v58 +; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v59 +; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v60 +; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v51 +; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v50 +; SI-NEXT: v_lshlrev_b32_e32 v43, 24, v39 +; SI-NEXT: v_lshlrev_b32_e32 v61, 8, v38 +; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v37 +; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v36 +; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v31 +; SI-NEXT: v_lshlrev_b32_e32 v47, 8, v30 +; SI-NEXT: v_lshlrev_b32_e32 v57, 24, v29 ; SI-NEXT: s_waitcnt vmcnt(13) -; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27 +; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v28 ; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v26 +; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v27 ; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25 +; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v26 ; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v24 +; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v23 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v22 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v21 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v31, 8, v24 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v23 +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_lshlrev_b32_e32 v30, 8, v22 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v21 +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v20 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v19 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v18 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v17 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:284 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:276 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:268 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:260 -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:252 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292 -; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v48 -; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v34 -; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v32 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:220 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 +; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 +; SI-NEXT: v_lshlrev_b32_e32 v32, 8, v48 ; SI-NEXT: s_and_b64 s[4:5], vcc, exec -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49 -; SI-NEXT: v_lshlrev_b32_e32 v49, 24, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v33 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v33 +; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v49 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 -; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v31 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:188 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180 +; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:172 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:156 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:148 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:124 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:92 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:68 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:52 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:44 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:36 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:28 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:20 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:12 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:92 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:84 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:76 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:60 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:52 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:44 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:36 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:28 +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:20 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:12 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:4 -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; SI-NEXT: s_cbranch_scc0 .LBB15_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: s_and_b32 s4, s42, 0xff +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_and_b32 s4, s46, 0xff -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v31 ; SI-NEXT: v_or_b32_e32 v0, s4, v0 -; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v11, v3 +; SI-NEXT: v_or_b32_e32 v1, v11, v1 ; SI-NEXT: v_or_b32_e32 v11, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v30 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v10 -; SI-NEXT: v_or_b32_e32 v0, v0, v5 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v10 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v9 +; SI-NEXT: v_or_b32_e32 v0, v0, v3 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v12, v1 +; SI-NEXT: v_or_b32_e32 v12, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v8 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v36 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v13, v1 ; SI-NEXT: v_or_b32_e32 v13, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v9 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v8 -; SI-NEXT: v_or_b32_e32 v0, v0, v4 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v7 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v6 +; SI-NEXT: v_or_b32_e32 v0, v0, v62 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v14, v1 ; SI-NEXT: v_or_b32_e32 v14, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v42 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v0, v0, v60 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v5 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v4 +; SI-NEXT: v_or_b32_e32 v0, v0, v35 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v15, v1 ; SI-NEXT: v_or_b32_e32 v15, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v6 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v63 -; SI-NEXT: v_or_b32_e32 v0, v0, v41 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v46 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v49 +; SI-NEXT: v_or_b32_e32 v0, v0, v55 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v16, v1 ; SI-NEXT: v_or_b32_e32 v16, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v61 +; SI-NEXT: v_mov_b32_e32 v49, v37 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v37 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xff, v17 -; SI-NEXT: v_or_b32_e32 v0, v0, v40 +; SI-NEXT: v_or_b32_e32 v0, v0, v63 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v55, v1 +; SI-NEXT: v_or_b32_e32 v1, v34, v1 ; SI-NEXT: v_or_b32_e32 v17, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v44 -; SI-NEXT: v_mov_b32_e32 v55, v54 -; SI-NEXT: v_or_b32_e32 v0, v0, v54 -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v34, v42 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v53, v1 -; SI-NEXT: v_or_b32_e32 v18, v0, v1 -; SI-NEXT: v_mov_b32_e32 v53, v52 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v51, v1 -; SI-NEXT: v_mov_b32_e32 v51, v50 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v12, v2, v3 +; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_mov_b32_e32 v62, v35 +; SI-NEXT: v_mov_b32_e32 v55, v63 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 @@ -17856,229 +17894,236 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_lshl_b32 s77, s19, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s77, s5 +; SI-NEXT: s_or_b32 s77, s4, s5 +; SI-NEXT: s_and_b32 s4, s20, 0xff +; SI-NEXT: s_lshl_b32 s5, s21, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s20, 0xff -; SI-NEXT: s_lshl_b32 s77, s21, 8 -; SI-NEXT: s_or_b32 s5, s5, s77 -; SI-NEXT: s_and_b32 s77, s22, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 +; SI-NEXT: s_and_b32 s5, s22, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s78, s23, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s77, s78, s77 -; SI-NEXT: s_or_b32 s5, s5, s77 -; SI-NEXT: s_and_b32 s77, s24, 0xff -; SI-NEXT: s_lshl_b32 s78, s25, 8 -; SI-NEXT: s_or_b32 s77, s77, s78 -; SI-NEXT: s_and_b32 s78, s26, 0xff -; SI-NEXT: s_lshl_b32 s78, s78, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s78, s5 +; SI-NEXT: s_or_b32 s78, s4, s5 +; SI-NEXT: s_and_b32 s4, s24, 0xff +; SI-NEXT: s_lshl_b32 s5, s25, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s26, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s79, s27, 24 -; SI-NEXT: s_and_b32 s77, s77, 0xffff -; SI-NEXT: s_or_b32 s78, s79, s78 -; SI-NEXT: s_or_b32 s77, s77, s78 -; SI-NEXT: s_and_b32 s78, s28, 0xff -; SI-NEXT: s_lshl_b32 s79, s29, 8 -; SI-NEXT: s_or_b32 s78, s78, s79 -; SI-NEXT: s_and_b32 s79, s76, 0xff -; SI-NEXT: s_lshl_b32 s79, s79, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s79, s5 +; SI-NEXT: s_or_b32 s79, s4, s5 +; SI-NEXT: s_and_b32 s4, s28, 0xff +; SI-NEXT: s_lshl_b32 s5, s29, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s76, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s88, s75, 24 -; SI-NEXT: s_and_b32 s78, s78, 0xffff -; SI-NEXT: s_or_b32 s79, s88, s79 -; SI-NEXT: s_or_b32 s78, s78, s79 -; SI-NEXT: s_and_b32 s79, s74, 0xff -; SI-NEXT: s_lshl_b32 s88, s73, 8 -; SI-NEXT: s_or_b32 s79, s79, s88 -; SI-NEXT: s_and_b32 s88, s72, 0xff -; SI-NEXT: s_lshl_b32 s88, s88, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s88, s5 +; SI-NEXT: s_or_b32 s88, s4, s5 +; SI-NEXT: s_and_b32 s4, s74, 0xff +; SI-NEXT: s_lshl_b32 s5, s73, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s72, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; SI-NEXT: s_lshl_b32 s89, s63, 24 -; SI-NEXT: s_and_b32 s79, s79, 0xffff -; SI-NEXT: s_or_b32 s88, s89, s88 -; SI-NEXT: s_or_b32 s79, s79, s88 -; SI-NEXT: s_and_b32 s88, s62, 0xff -; SI-NEXT: s_lshl_b32 s89, s61, 8 -; SI-NEXT: s_or_b32 s88, s88, s89 -; SI-NEXT: s_and_b32 s89, s60, 0xff -; SI-NEXT: s_lshl_b32 s89, s89, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s89, s5 +; SI-NEXT: s_or_b32 s89, s4, s5 +; SI-NEXT: s_and_b32 s4, s62, 0xff +; SI-NEXT: s_lshl_b32 s5, s61, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s60, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s90, s59, 24 -; SI-NEXT: s_and_b32 s88, s88, 0xffff -; SI-NEXT: s_or_b32 s89, s90, s89 -; SI-NEXT: s_or_b32 s88, s88, s89 -; SI-NEXT: s_and_b32 s89, s58, 0xff -; SI-NEXT: s_lshl_b32 s90, s57, 8 -; SI-NEXT: s_or_b32 s89, s89, s90 -; SI-NEXT: s_and_b32 s90, s56, 0xff -; SI-NEXT: s_lshl_b32 s90, s90, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s90, s5 +; SI-NEXT: s_or_b32 s90, s4, s5 +; SI-NEXT: s_and_b32 s4, s58, 0xff +; SI-NEXT: s_lshl_b32 s5, s57, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s56, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s91, s47, 24 -; SI-NEXT: s_and_b32 s89, s89, 0xffff -; SI-NEXT: s_or_b32 s90, s91, s90 -; SI-NEXT: s_or_b32 s89, s89, s90 -; SI-NEXT: s_and_b32 s90, s45, 0xff -; SI-NEXT: s_lshl_b32 s91, s44, 8 -; SI-NEXT: s_or_b32 s90, s90, s91 -; SI-NEXT: s_and_b32 s91, s43, 0xff -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v54 -; SI-NEXT: v_or_b32_e32 v0, v0, v52 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s91, s5 +; SI-NEXT: s_or_b32 s91, s4, s5 +; SI-NEXT: s_and_b32 s4, s46, 0xff +; SI-NEXT: s_lshl_b32 s5, s45, 8 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v37 +; SI-NEXT: v_or_b32_e32 v0, v0, v42 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v18, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v40 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v19 +; SI-NEXT: v_or_b32_e32 v0, v0, v54 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v53, v1 +; SI-NEXT: v_mov_b32_e32 v54, v53 ; SI-NEXT: v_or_b32_e32 v19, v0, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v36 +; SI-NEXT: v_or_b32_e32 v0, v0, v52 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v49, v1 -; SI-NEXT: v_mov_b32_e32 v49, v48 -; SI-NEXT: s_lshl_b32 s91, s91, 16 -; SI-NEXT: s_lshl_b32 s92, s42, 24 -; SI-NEXT: s_and_b32 s90, s90, 0xffff -; SI-NEXT: s_or_b32 s91, s92, s91 -; SI-NEXT: s_or_b32 s90, s90, s91 -; SI-NEXT: s_and_b32 s91, s41, 0xff -; SI-NEXT: s_lshl_b32 s92, s40, 8 -; SI-NEXT: s_or_b32 s91, s91, s92 -; SI-NEXT: s_and_b32 s92, s15, 0xff -; SI-NEXT: s_lshl_b32 s92, s92, 16 -; SI-NEXT: s_lshl_b32 s93, s14, 24 -; SI-NEXT: s_and_b32 s91, s91, 0xffff -; SI-NEXT: s_or_b32 s92, s93, s92 -; SI-NEXT: s_or_b32 s91, s91, s92 -; SI-NEXT: s_and_b32 s92, s13, 0xff -; SI-NEXT: s_lshl_b32 s93, s12, 8 -; SI-NEXT: s_or_b32 s92, s92, s93 -; SI-NEXT: s_and_b32 s93, s11, 0xff -; SI-NEXT: s_lshl_b32 s93, s93, 16 -; SI-NEXT: s_lshl_b32 s94, s10, 24 -; SI-NEXT: s_and_b32 s92, s92, 0xffff -; SI-NEXT: s_or_b32 s93, s94, s93 -; SI-NEXT: s_or_b32 s92, s92, s93 -; SI-NEXT: s_and_b32 s93, s9, 0xff -; SI-NEXT: s_lshl_b32 s94, s8, 8 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: s_and_b32 s94, s7, 0xff -; SI-NEXT: s_lshl_b32 s94, s94, 16 -; SI-NEXT: s_lshl_b32 s95, s6, 24 -; SI-NEXT: s_and_b32 s93, s93, 0xffff -; SI-NEXT: s_or_b32 s94, s95, s94 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: v_mov_b32_e32 v41, v40 -; SI-NEXT: v_mov_b32_e32 v3, s78 -; SI-NEXT: v_mov_b32_e32 v4, s79 -; SI-NEXT: v_mov_b32_e32 v5, s88 -; SI-NEXT: v_mov_b32_e32 v6, s89 -; SI-NEXT: v_mov_b32_e32 v7, s90 -; SI-NEXT: v_mov_b32_e32 v8, s91 -; SI-NEXT: v_mov_b32_e32 v9, s92 -; SI-NEXT: v_mov_b32_e32 v10, s93 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v52 -; SI-NEXT: v_or_b32_e32 v0, v0, v50 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v51, v1 ; SI-NEXT: v_or_b32_e32 v20, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v38 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 +; SI-NEXT: v_or_b32_e32 v0, v0, v50 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v39, v1 -; SI-NEXT: v_mov_b32_e32 v39, v38 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v50 -; SI-NEXT: v_or_b32_e32 v0, v0, v48 -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 ; SI-NEXT: v_or_b32_e32 v21, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v48 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v22 +; SI-NEXT: v_or_b32_e32 v0, v0, v32 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v37, v1 -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v48 -; SI-NEXT: v_or_b32_e32 v0, v0, v38 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v43, v1 ; SI-NEXT: v_or_b32_e32 v22, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v39 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v23 +; SI-NEXT: v_mov_b32_e32 v52, v51 +; SI-NEXT: v_mov_b32_e32 v33, v32 +; SI-NEXT: v_or_b32_e32 v0, v0, v61 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v35, v1 -; SI-NEXT: v_mov_b32_e32 v35, v34 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v38 -; SI-NEXT: v_or_b32_e32 v0, v0, v36 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v45, v1 ; SI-NEXT: v_or_b32_e32 v23, v0, v1 +; SI-NEXT: v_mov_b32_e32 v45, v44 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v33, v1 -; SI-NEXT: v_mov_b32_e32 v33, v32 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v36 -; SI-NEXT: v_or_b32_e32 v0, v0, v34 +; SI-NEXT: v_or_b32_e32 v1, v56, v1 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s44, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s92, s43, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s92, s5 +; SI-NEXT: s_or_b32 s92, s4, s5 +; SI-NEXT: s_and_b32 s4, s41, 0xff +; SI-NEXT: s_lshl_b32 s5, s40, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s15, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s93, s14, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s93, s5 +; SI-NEXT: s_or_b32 s93, s4, s5 +; SI-NEXT: s_and_b32 s4, s13, 0xff +; SI-NEXT: s_lshl_b32 s5, s12, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s11, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s94, s10, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s94, s5 +; SI-NEXT: s_or_b32 s94, s4, s5 +; SI-NEXT: s_and_b32 s4, s9, 0xff +; SI-NEXT: s_lshl_b32 s5, s8, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s7, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s95, s6, 24 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v42 +; SI-NEXT: v_or_b32_e32 v0, v0, v44 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v24, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v32 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v35 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v25 -; SI-NEXT: v_or_b32_e32 v0, v0, v62 +; SI-NEXT: v_or_b32_e32 v0, v0, v47 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v29, v1 +; SI-NEXT: v_or_b32_e32 v1, v57, v1 ; SI-NEXT: v_or_b32_e32 v25, v0, v1 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v53 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v58 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v28, v1 -; SI-NEXT: v_mov_b32_e32 v62, v29 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v32 -; SI-NEXT: v_or_b32_e32 v0, v0, v59 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v60, v1 ; SI-NEXT: v_or_b32_e32 v26, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v58 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v56 -; SI-NEXT: v_or_b32_e32 v0, v0, v57 +; SI-NEXT: v_mov_b32_e32 v57, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s95, s5 +; SI-NEXT: s_or_b32 s95, s4, s5 +; SI-NEXT: v_mov_b32_e32 v41, v40 +; SI-NEXT: v_mov_b32_e32 v38, v50 +; SI-NEXT: v_mov_b32_e32 v48, v39 +; SI-NEXT: v_mov_b32_e32 v43, v61 +; SI-NEXT: v_mov_b32_e32 v56, v47 +; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: v_mov_b32_e32 v3, s88 +; SI-NEXT: v_mov_b32_e32 v4, s89 +; SI-NEXT: v_mov_b32_e32 v5, s90 +; SI-NEXT: v_mov_b32_e32 v6, s91 +; SI-NEXT: v_mov_b32_e32 v7, s92 +; SI-NEXT: v_mov_b32_e32 v8, s93 +; SI-NEXT: v_mov_b32_e32 v9, s94 +; SI-NEXT: v_mov_b32_e32 v10, s95 +; SI-NEXT: v_mov_b32_e32 v61, v36 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v51 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v32 +; SI-NEXT: v_or_b32_e32 v0, v0, v59 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v27, v1 -; SI-NEXT: v_mov_b32_e32 v57, v27 +; SI-NEXT: v_mov_b32_e32 v59, v27 ; SI-NEXT: v_or_b32_e32 v27, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v47 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v43 -; SI-NEXT: v_or_b32_e32 v0, v0, v45 +; SI-NEXT: v_mov_b32_e32 v40, v37 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v63 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_or_b32_e32 v1, v28, v1 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v44 +; SI-NEXT: v_or_b32_e32 v0, v0, v31 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_mov_b32_e32 v59, v28 ; SI-NEXT: v_or_b32_e32 v28, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v0, 0xff, v46 -; SI-NEXT: v_mov_b32_e32 v45, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: v_mov_b32_e32 v47, v43 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v60, v32 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v58 +; SI-NEXT: v_or_b32_e32 v0, v0, v30 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_or_b32_e32 v1, v29, v1 ; SI-NEXT: v_or_b32_e32 v29, v0, v1 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v30, v0, v1 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -18090,53 +18135,57 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v31, v0, v1 -; SI-NEXT: v_mov_b32_e32 v0, s4 -; SI-NEXT: v_mov_b32_e32 v1, s5 -; SI-NEXT: v_mov_b32_e32 v2, s77 -; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: v_mov_b32_e32 v0, s77 +; SI-NEXT: v_mov_b32_e32 v1, s78 +; SI-NEXT: v_mov_b32_e32 v2, s79 ; SI-NEXT: s_branch .LBB15_3 ; SI-NEXT: .LBB15_2: -; SI-NEXT: v_mov_b32_e32 v55, v54 -; SI-NEXT: v_mov_b32_e32 v53, v52 -; SI-NEXT: v_mov_b32_e32 v51, v50 -; SI-NEXT: v_mov_b32_e32 v49, v48 -; SI-NEXT: v_mov_b32_e32 v39, v38 -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v62, v35 +; SI-NEXT: v_mov_b32_e32 v55, v63 +; SI-NEXT: v_mov_b32_e32 v34, v42 ; SI-NEXT: v_mov_b32_e32 v41, v40 -; SI-NEXT: v_mov_b32_e32 v35, v34 +; SI-NEXT: v_mov_b32_e32 v54, v53 +; SI-NEXT: v_mov_b32_e32 v52, v51 ; SI-NEXT: v_mov_b32_e32 v33, v32 -; SI-NEXT: v_mov_b32_e32 v62, v29 -; SI-NEXT: v_mov_b32_e32 v59, v28 -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: v_mov_b32_e32 v47, v43 -; SI-NEXT: v_mov_b32_e32 v57, v27 +; SI-NEXT: v_mov_b32_e32 v43, v61 +; SI-NEXT: v_mov_b32_e32 v45, v44 +; SI-NEXT: v_mov_b32_e32 v57, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v49, v37 +; SI-NEXT: v_mov_b32_e32 v38, v50 +; SI-NEXT: v_mov_b32_e32 v48, v39 +; SI-NEXT: v_mov_b32_e32 v56, v47 +; SI-NEXT: v_mov_b32_e32 v59, v27 ; SI-NEXT: s_mov_b64 s[4:5], -1 ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: .LBB15_3: ; %Flow -; SI-NEXT: v_mov_b32_e32 v43, v58 -; SI-NEXT: v_mov_b32_e32 v58, v33 -; SI-NEXT: v_mov_b32_e32 v33, v37 -; SI-NEXT: v_mov_b32_e32 v34, v39 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v39, v52 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload ; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] +; SI-NEXT: v_mov_b32_e32 v47, v33 ; SI-NEXT: s_cbranch_vccnz .LBB15_5 ; SI-NEXT: ; %bb.4: ; %cmp.true -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: s_add_i32 s46, s46, 3 -; SI-NEXT: s_and_b32 s4, s46, 0xff -; SI-NEXT: v_mov_b32_e32 v32, v35 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: s_add_i32 s42, s42, 3 +; SI-NEXT: s_and_b32 s4, s42, 0xff +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v33, v48 ; SI-NEXT: s_add_i32 s16, s16, 3 ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_add_i32 s18, s18, 3 @@ -18156,8 +18205,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_add_i32 s56, s56, 3 ; SI-NEXT: s_and_b32 s22, s56, 0xff ; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: s_add_i32 s45, s45, 3 -; SI-NEXT: s_add_i32 s43, s43, 3 +; SI-NEXT: s_add_i32 s46, s46, 3 +; SI-NEXT: s_add_i32 s44, s44, 3 ; SI-NEXT: s_add_i32 s41, s41, 3 ; SI-NEXT: s_add_i32 s13, s13, 3 ; SI-NEXT: s_add_i32 s9, s9, 3 @@ -18190,24 +18239,35 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_or_b32 s6, s6, s8 ; SI-NEXT: s_add_i32 s10, s10, 0x3000000 ; SI-NEXT: s_add_i32 s6, s6, 0x3000000 -; SI-NEXT: v_mov_b32_e32 v9, s10 ; SI-NEXT: v_mov_b32_e32 v10, s6 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v1, s4, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v41 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_and_b32 s16, s18, 0xff @@ -18273,25 +18333,30 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_and_b32 s20, s20, 0xffff ; SI-NEXT: s_or_b32 s21, s21, s22 ; SI-NEXT: s_or_b32 s20, s21, s20 -; SI-NEXT: s_and_b32 s21, s45, 0xff -; SI-NEXT: s_lshl_b32 s22, s44, 8 +; SI-NEXT: s_and_b32 s21, s46, 0xff +; SI-NEXT: s_lshl_b32 s22, s45, 8 ; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: s_and_b32 s23, s43, 0xff +; SI-NEXT: s_and_b32 s23, s44, 0xff ; SI-NEXT: s_addk_i32 s21, 0x300 -; SI-NEXT: s_lshl_b32 s22, s42, 24 +; SI-NEXT: s_lshl_b32 s22, s43, 24 ; SI-NEXT: s_lshl_b32 s23, s23, 16 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; SI-NEXT: s_and_b32 s22, s41, 0xff -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v1, v52, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: s_or_b32 s21, s22, s21 +; SI-NEXT: s_and_b32 s22, s41, 0xff ; SI-NEXT: s_lshl_b32 s23, s40, 8 ; SI-NEXT: s_or_b32 s22, s23, s22 ; SI-NEXT: s_addk_i32 s22, 0x300 @@ -18306,180 +18371,82 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_add_i32 s20, s20, 0x3000000 ; SI-NEXT: s_add_i32 s21, s21, 0x3000000 ; SI-NEXT: s_add_i32 s14, s14, 0x3000000 -; SI-NEXT: v_mov_b32_e32 v4, s18 -; SI-NEXT: v_mov_b32_e32 v5, s19 -; SI-NEXT: v_mov_b32_e32 v6, s20 -; SI-NEXT: v_mov_b32_e32 v7, s21 -; SI-NEXT: v_mov_b32_e32 v8, s14 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v39, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_mov_b32_e32 v3, s17 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v37, v0 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v42, v0 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v41, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v55, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v54 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v53, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_or_b32_e32 v1, v39, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v52 +; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v36, v2 +; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v51, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 +; SI-NEXT: v_or_b32_e32 v0, v38, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v50 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v49, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v48 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v34, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 +; SI-NEXT: v_or_b32_e32 v0, v47, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 +; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v38 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v33, v0 +; SI-NEXT: v_or_b32_e32 v0, v43, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -18489,12 +18456,12 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v36 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v32, v0 +; SI-NEXT: v_or_b32_e32 v0, v45, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -18504,79 +18471,107 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v35 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v0, v56, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v62, v1 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v60 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v53 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v0, v57, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v59, v1 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v51 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v43 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v32 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v57, v1 +; SI-NEXT: v_or_b32_e32 v1, v59, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 0x300, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v45, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v3 +; SI-NEXT: v_mov_b32_e32 v3, s17 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 +; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 +; SI-NEXT: v_or_b32_e32 v4, v62, v4 +; SI-NEXT: v_add_i32_e32 v4, vcc, 0x300, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v46 +; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 +; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v4 +; SI-NEXT: v_mov_b32_e32 v4, s18 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 @@ -18585,33 +18580,76 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v5, vcc, 0x300, v5 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v49 +; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 +; SI-NEXT: v_or_b32_e32 v6, v55, v6 +; SI-NEXT: v_add_i32_e32 v6, vcc, 0x300, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v5 +; SI-NEXT: v_mov_b32_e32 v5, s19 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v40 +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_or_b32_e32 v7, v34, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 0x300, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v6 +; SI-NEXT: v_mov_b32_e32 v6, s20 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v9, v8 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v7 +; SI-NEXT: v_mov_b32_e32 v7, s21 +; SI-NEXT: v_mov_b32_e32 v8, s14 +; SI-NEXT: v_mov_b32_e32 v9, s10 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 @@ -18639,7 +18677,7 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v128i8_to_v32i32_scalar: @@ -18891,18 +18929,18 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -19132,11 +19170,11 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: ; %bb.4: ; %cmp.true ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v0, s17 -; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; VI-NEXT: v_mov_b32_e32 v9, 0xc0c0004 ; VI-NEXT: s_add_i32 s18, s18, 3 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_perm_b32 v0, s16, v0, v11 -; VI-NEXT: v_perm_b32 v1, s18, v1, v11 +; VI-NEXT: v_perm_b32 v0, s16, v0, v9 +; VI-NEXT: v_perm_b32 v1, s18, v1, v9 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -19144,8 +19182,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v1, s21 ; VI-NEXT: s_add_i32 s22, s22, 3 ; VI-NEXT: v_mov_b32_e32 v2, s23 -; VI-NEXT: v_perm_b32 v1, s20, v1, v11 -; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v9 +; VI-NEXT: v_perm_b32 v2, s22, v2, v9 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -19153,8 +19191,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: s_add_i32 s26, s26, 3 ; VI-NEXT: v_mov_b32_e32 v3, s27 -; VI-NEXT: v_perm_b32 v2, s24, v2, v11 -; VI-NEXT: v_perm_b32 v3, s26, v3, v11 +; VI-NEXT: v_perm_b32 v2, s24, v2, v9 +; VI-NEXT: v_perm_b32 v3, s26, v3, v9 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x300, v2 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -19162,8 +19200,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v3, s29 ; VI-NEXT: s_add_i32 s76, s76, 3 ; VI-NEXT: v_mov_b32_e32 v4, s75 -; VI-NEXT: v_perm_b32 v3, s28, v3, v11 -; VI-NEXT: v_perm_b32 v4, s76, v4, v11 +; VI-NEXT: v_perm_b32 v3, s28, v3, v9 +; VI-NEXT: v_perm_b32 v4, s76, v4, v9 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x300, v3 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -19171,8 +19209,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v4, s73 ; VI-NEXT: s_add_i32 s72, s72, 3 ; VI-NEXT: v_mov_b32_e32 v5, s63 -; VI-NEXT: v_perm_b32 v4, s74, v4, v11 -; VI-NEXT: v_perm_b32 v5, s72, v5, v11 +; VI-NEXT: v_perm_b32 v4, s74, v4, v9 +; VI-NEXT: v_perm_b32 v5, s72, v5, v9 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x300, v4 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -19180,8 +19218,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v5, s61 ; VI-NEXT: s_add_i32 s60, s60, 3 ; VI-NEXT: v_mov_b32_e32 v6, s59 -; VI-NEXT: v_perm_b32 v5, s62, v5, v11 -; VI-NEXT: v_perm_b32 v6, s60, v6, v11 +; VI-NEXT: v_perm_b32 v5, s62, v5, v9 +; VI-NEXT: v_perm_b32 v6, s60, v6, v9 ; VI-NEXT: v_add_u32_e32 v5, vcc, 0x300, v5 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -19189,8 +19227,8 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v6, s57 ; VI-NEXT: s_add_i32 s56, s56, 3 ; VI-NEXT: v_mov_b32_e32 v7, s47 -; VI-NEXT: v_perm_b32 v6, s58, v6, v11 -; VI-NEXT: v_perm_b32 v7, s56, v7, v11 +; VI-NEXT: v_perm_b32 v6, s58, v6, v9 +; VI-NEXT: v_perm_b32 v7, s56, v7, v9 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x300, v6 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -19198,38 +19236,38 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v7, s45 ; VI-NEXT: s_add_i32 s44, s44, 3 ; VI-NEXT: v_mov_b32_e32 v8, s43 -; VI-NEXT: v_perm_b32 v7, s46, v7, v11 -; VI-NEXT: v_perm_b32 v8, s44, v8, v11 +; VI-NEXT: v_perm_b32 v7, s46, v7, v9 +; VI-NEXT: v_perm_b32 v8, s44, v8, v9 ; VI-NEXT: v_add_u32_e32 v7, vcc, 0x300, v7 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s42, s42, 3 ; VI-NEXT: v_mov_b32_e32 v8, s41 ; VI-NEXT: s_add_i32 s40, s40, 3 -; VI-NEXT: v_mov_b32_e32 v9, s15 -; VI-NEXT: v_perm_b32 v8, s42, v8, v11 -; VI-NEXT: v_perm_b32 v9, s40, v9, v11 +; VI-NEXT: v_mov_b32_e32 v10, s15 +; VI-NEXT: v_perm_b32 v8, s42, v8, v9 +; VI-NEXT: v_perm_b32 v10, s40, v10, v9 ; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v8 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; VI-NEXT: v_or_b32_sdwa v8, v10, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s14, s14, 3 -; VI-NEXT: v_mov_b32_e32 v9, s13 +; VI-NEXT: v_mov_b32_e32 v10, s13 ; VI-NEXT: s_add_i32 s12, s12, 3 -; VI-NEXT: v_mov_b32_e32 v10, s11 -; VI-NEXT: v_perm_b32 v9, s14, v9, v11 -; VI-NEXT: v_perm_b32 v10, s12, v10, v11 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_mov_b32_e32 v11, s11 +; VI-NEXT: v_perm_b32 v10, s14, v10, v9 +; VI-NEXT: v_perm_b32 v11, s12, v11, v9 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s10, s10, 3 -; VI-NEXT: v_mov_b32_e32 v10, s9 +; VI-NEXT: v_mov_b32_e32 v11, s9 ; VI-NEXT: s_add_i32 s8, s8, 3 ; VI-NEXT: v_mov_b32_e32 v12, s7 -; VI-NEXT: v_perm_b32 v10, s10, v10, v11 -; VI-NEXT: v_perm_b32 v12, s8, v12, v11 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 +; VI-NEXT: v_perm_b32 v11, s10, v11, v9 +; VI-NEXT: v_perm_b32 v12, s8, v12, v9 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload @@ -19256,8 +19294,6 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x3000000, v6 ; VI-NEXT: v_add_u32_e32 v7, vcc, 0x3000000, v7 ; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v9 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10 ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload @@ -19271,9 +19307,9 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_perm_b32 v11, s6, v12, v11 +; VI-NEXT: v_perm_b32 v9, s6, v12, v9 ; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_perm_b32 v16, v16, v17, s4 ; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v60 ; VI-NEXT: v_perm_b32 v17, v17, v18, s4 @@ -19292,93 +19328,95 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; VI-NEXT: v_perm_b32 v12, v12, v13, s4 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v54 +; VI-NEXT: v_or_b32_sdwa v12, v12, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v54 ; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v52 -; VI-NEXT: v_perm_b32 v12, v12, v53, s4 +; VI-NEXT: v_perm_b32 v9, v9, v53, s4 ; VI-NEXT: v_perm_b32 v13, v13, v51, s4 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v12 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v50 -; VI-NEXT: v_perm_b32 v13, v13, v49, s4 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13 -; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v38 -; VI-NEXT: v_perm_b32 v14, v14, v37, s4 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 -; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v34 -; VI-NEXT: v_perm_b32 v15, v15, v33, s4 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15 -; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v62 -; VI-NEXT: v_perm_b32 v16, v16, v61, s4 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16 -; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v41 -; VI-NEXT: v_perm_b32 v17, v17, v40, s4 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17 -; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v42 -; VI-NEXT: v_perm_b32 v18, v18, v47, s4 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18 +; VI-NEXT: v_or_b32_sdwa v13, v13, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v50 +; VI-NEXT: v_perm_b32 v9, v9, v49, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v14, v14, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v38 +; VI-NEXT: v_perm_b32 v9, v9, v37, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v15, v15, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v34 +; VI-NEXT: v_perm_b32 v9, v9, v33, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v16, v16, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v62 +; VI-NEXT: v_perm_b32 v9, v9, v61, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v17, v17, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v41 +; VI-NEXT: v_perm_b32 v9, v9, v40, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v18, v18, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v42 +; VI-NEXT: v_perm_b32 v9, v9, v47, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v46 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v11 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v14 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18 +; VI-NEXT: v_or_b32_sdwa v19, v19, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v46 ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v19, v19, v20, s4 +; VI-NEXT: v_perm_b32 v9, v9, v20, s4 ; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v19 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v20 ; VI-NEXT: v_perm_b32 v20, v20, v21, s4 ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v45 -; VI-NEXT: v_perm_b32 v20, v20, v44, s4 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x300, v20 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19 +; VI-NEXT: v_or_b32_sdwa v20, v20, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v45 +; VI-NEXT: v_perm_b32 v9, v9, v44, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v21 ; VI-NEXT: v_perm_b32 v21, v21, v22, s4 ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v43 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20 +; VI-NEXT: v_or_b32_sdwa v21, v21, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v43 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v21, v21, v22, s4 +; VI-NEXT: v_perm_b32 v9, v9, v22, s4 ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22 ; VI-NEXT: v_perm_b32 v22, v22, v23, s4 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; VI-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v22, v22, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v22, v22, v23, s4 -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v22 +; VI-NEXT: v_perm_b32 v23, v9, v23, s4 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23 -; VI-NEXT: v_perm_b32 v23, v23, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 +; VI-NEXT: v_perm_b32 v24, v9, v24, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v10 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v11 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v13 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v14 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v15 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v16 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v17 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v18 +; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v19 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v20 +; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v21 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v22 +; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v23 +; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v24 ; VI-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload @@ -19815,18 +19853,18 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s27 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -20059,21 +20097,21 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: s_add_i32 s18, s18, 3 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: s_movk_i32 s4, 0x300 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 ; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; GFX9-NEXT: v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; GFX9-NEXT: s_add_i32 s20, s20, 3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: s_add_i32 s22, s22, 3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u32_sdwa v2, v2, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s24, s24, 3 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: s_add_i32 s26, s26, 3 @@ -20166,11 +20204,11 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; GFX9-NEXT: s_waitcnt vmcnt(10) ; GFX9-NEXT: v_add_u32_e32 v14, 3, v48 ; GFX9-NEXT: v_perm_b32 v14, v14, v39, s5 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v15, 3, v36 ; GFX9-NEXT: v_perm_b32 v15, v15, v35, s5 +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload @@ -20425,10 +20463,14 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v32i32_scalar: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:332 +; GFX11-TRUE16-NEXT: ; meta instruction +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:328 +; GFX11-TRUE16-NEXT: ; meta instruction +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:324 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:320 ; GFX11-TRUE16-NEXT: s_clause 0x1f ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:312 ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:308 @@ -20549,291 +20591,280 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo ; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB15_4 ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v131, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v1, s18, s19, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, v165, v162, 0xc0c0004 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3) +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v181, v177, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v167, v166, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v135, v131, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v161, v149, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v147, v144, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v145, v133, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s20, s21, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v0, s2, s3, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s0, s1, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s16, s17, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s74, s73, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s14, s13, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s58, s57, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, s6, s5, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v8 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s46, s45, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v55, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s26, s27, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v6, s24, s25, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s60, s59, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s42, s41, v10 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s44, s43, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v8 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s46, s45, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s14, s13, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v12, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s56, s47, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v8 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v11 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, s40, s15, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s12, s11, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v9 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s6, s5, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v15, v13 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-TRUE16-NEXT: v_perm_b32 v13, v182, v178, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, v180, v176, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s8, s7, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v16 -; GFX11-TRUE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v144, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v17, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v20 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v20 -; GFX11-TRUE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v22 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v21, v22 -; GFX11-TRUE16-NEXT: v_perm_b32 v22, v99, v87, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v24 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v103, v100, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v23, v24 -; GFX11-TRUE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v25, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v28 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s4, v179, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12 +; GFX11-TRUE16-NEXT: v_perm_b32 v24, v102, v98, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v13 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v163, v151, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v17, v14 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v18, v16 +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v150, v148, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v146, v134, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, v164, v160, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v128, v116, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v117, v113, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v16, v15 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v103, v100, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v19, v17 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v129, v118, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v21, v18 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v22, v20 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v119, v115, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v114, v112, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v132, v130, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX11-TRUE16-NEXT: v_perm_b32 v28, v70, v68, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v20, v19 +; GFX11-TRUE16-NEXT: v_perm_b32 v27, v96, v86, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v23, v21 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v99, v87, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v25, v22 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v26, v24 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v85, v82, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v83, v71, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v24, v101, v97, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX11-TRUE16-NEXT: v_perm_b32 v29, v84, v80, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX11-TRUE16-NEXT: v_perm_b32 v30, v81, v69, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v24, v23 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v27, v25 +; GFX11-TRUE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v29, v26 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v30, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v28, v55, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v31, v49, v38, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v183, v39, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v41, v34, v32, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v64, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v27, v28 -; GFX11-TRUE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v30 -; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30 -; GFX11-TRUE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v183 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40 -; GFX11-TRUE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v183 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v40, v41 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX11-TRUE16-NEXT: v_perm_b32 v30, v65, v53, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v40, v52, v50, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX11-TRUE16-NEXT: v_perm_b32 v42, v48, v36, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v183 +; GFX11-TRUE16-NEXT: v_perm_b32 v43, v37, v33, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v41 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v27 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v30, v28 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v40, v31 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v42, v183 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v43, v41 ; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB15_3 ; GFX11-TRUE16-NEXT: .LBB15_2: ; %cmp.true -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, 0xc0c0004 +; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3 +; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v7 ; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v10 ; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3 -; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v7 +; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v7 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s72, s63, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v6, s28, s29, v7 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s62, s61, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s62, s61, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s60, s59, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s58, s57, v7 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s74, s73, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s40, s15, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v6, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s59, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s14, s13, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 ; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s44, s43, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v8 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v11, v12 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s44, s43, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s42, s41, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, s14, s13, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, s12, s11, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s10, s9, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, s8, s7, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s6, s5, v7 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v7 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v13 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v15 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v16, v17 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v167 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v164 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v163 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v161 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v150 ; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s10, s9, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v10, s6, s5, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 ; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10 ; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 @@ -20987,9 +21018,11 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v35 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v32 ; GFX11-TRUE16-NEXT: .LBB15_3: ; %end -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload -; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:320 -; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:324 +; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:328 +; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:332 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-TRUE16-NEXT: .LBB15_4: @@ -20999,10 +21032,14 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; GFX11-FAKE16-LABEL: bitcast_v128i8_to_v32i32_scalar: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:324 +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:332 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:328 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:320 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:324 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:320 ; GFX11-FAKE16-NEXT: s_clause 0x1f ; GFX11-FAKE16-NEXT: scratch_load_u16 v32, off, s32 offset:312 ; GFX11-FAKE16-NEXT: scratch_load_u16 v34, off, s32 offset:308 @@ -21123,291 +21160,280 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; GFX11-FAKE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo ; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB15_4 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v144, v131, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, s18, s19, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v165, v162, 0xc0c0004 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(3) +; GFX11-FAKE16-NEXT: v_perm_b32 v17, v181, v177, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v167, v166, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v144, v131, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v161, v149, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v147, v135, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v145, v133, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v0, s2, s3, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s0, s1, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s74, s73, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v1 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v2, v0 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s72, s63, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s56, s47, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s62, s61, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s14, s13, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s40, s15, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s10, s9, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s58, s57, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, s6, s5, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v7, v8 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s46, s45, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s60, s59, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v64, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s74, s73, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s72, s63, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s62, s61, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s58, s57, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v6, s24, s25, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s60, s59, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v8, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s42, s41, v10 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v9, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s44, s43, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s46, s45, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s42, s41, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s14, s13, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, s10, s9, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v6, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v12, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s56, s47, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v9, v8 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v12, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v13, v14 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s44, s43, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, s40, s15, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s12, s11, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v8 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v12, v9 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s6, s5, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v14, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v15, v13 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v182, v178, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, v180, v176, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s8, s7, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v13, v14 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v15, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v15, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v17, v18 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v147, v135, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v17, v18 -; GFX11-FAKE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v19, v20 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v19, v20 -; GFX11-FAKE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v21, v22 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v21, v22 -; GFX11-FAKE16-NEXT: v_perm_b32 v22, v100, v87, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v23, v24 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v103, v99, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v23, v24 -; GFX11-FAKE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v25, v26 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v25, v26 -; GFX11-FAKE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v27, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s4, v179, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v12 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v102, v98, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v15, v13 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, v163, v151, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v17, v14 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v18, v16 +; GFX11-FAKE16-NEXT: v_perm_b32 v17, v150, v148, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v146, v134, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v164, v160, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v128, v116, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v117, v113, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v16, v15 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v103, v99, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v19, v17 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v129, v118, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v21, v18 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v22, v20 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v119, v115, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v114, v112, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v132, v130, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX11-FAKE16-NEXT: v_perm_b32 v28, v70, v68, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v20, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v27, v96, v86, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v23, v21 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v100, v87, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v25, v22 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v26, v24 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v85, v82, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v83, v71, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v101, v97, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX11-FAKE16-NEXT: v_perm_b32 v29, v84, v80, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX11-FAKE16-NEXT: v_perm_b32 v30, v81, v69, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v24, v23 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v27, v25 +; GFX11-FAKE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v29, v26 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v30, v28 +; GFX11-FAKE16-NEXT: v_perm_b32 v28, v64, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v31, v49, v38, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v183, v39, v35, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v41, v34, v32, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v29, v67, v55, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v27, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v29, v30 -; GFX11-FAKE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v29, v30 -; GFX11-FAKE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v31, v183 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40 -; GFX11-FAKE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v31, v183 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v40, v41 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX11-FAKE16-NEXT: v_perm_b32 v30, v65, v53, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-FAKE16-NEXT: v_perm_b32 v40, v52, v50, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX11-FAKE16-NEXT: v_perm_b32 v42, v48, v36, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v183 +; GFX11-FAKE16-NEXT: v_perm_b32 v43, v37, v33, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v41, 16, v41 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v29, v27 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v30, v28 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v40, v31 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v42, v183 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v43, v41 ; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB15_3 ; GFX11-FAKE16-NEXT: .LBB15_2: ; %cmp.true -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, 0xc0c0004 +; GFX11-FAKE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3 +; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s74, s73, v7 ; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v10 ; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3 -; GFX11-FAKE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s72, s72, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s62, s62, 3 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v10 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v7 +; GFX11-FAKE16-NEXT: s_add_i32 s60, s60, 3 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-FAKE16-NEXT: s_add_i32 s58, s58, 3 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v7 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s72, s63, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v6, s28, s29, v7 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s22, s23, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s62, s61, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-FAKE16-NEXT: s_add_i32 s60, s60, 3 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s22, s23, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s72, s63, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s62, s61, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s60, s59, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s58, s57, v7 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-FAKE16-NEXT: s_add_i32 s58, s58, 3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_add_i32 s56, s56, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s46, s46, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s56, s47, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s28, s29, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s74, s73, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s46, s45, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s44, s44, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s42, s42, 3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-FAKE16-NEXT: s_add_i32 s40, s40, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s14, s14, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s40, s15, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s60, s59, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s58, s57, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s14, s13, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 ; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, 3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v7 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v8, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s44, s43, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s42, s41, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v6, v8 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v11, v12 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s56, s47, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s46, s45, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s44, s43, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s42, s41, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s40, s15, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, s14, s13, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, s12, s11, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s10, s9, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, s8, s7, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s6, s5, v7 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v7 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v8, v9 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v10, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v12, v13 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v14, v15 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v16, v17 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 3, v167 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, 3, v165 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 3, v164 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 3, v163 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 3, v161 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 3, v150 ; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v11, v12 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s10, s9, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s6, s5, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 ; GFX11-FAKE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10 ; GFX11-FAKE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v13, v14 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 @@ -21561,9 +21587,11 @@ define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i3 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v36, v35 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v33, v32 ; GFX11-FAKE16-NEXT: .LBB15_3: ; %end -; GFX11-FAKE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:320 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:324 +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:320 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:324 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:328 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:332 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-FAKE16-NEXT: .LBB15_4: @@ -23634,8 +23662,6 @@ define <32 x i32> @bitcast_v64bf16_to_v32i32(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB18_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v63 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 @@ -23684,6 +23710,8 @@ define <32 x i32> @bitcast_v64bf16_to_v32i32(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32 ; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v32 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload @@ -23701,80 +23729,77 @@ define <32 x i32> @bitcast_v64bf16_to_v32i32(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6 -; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 ; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 ; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8 -; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9 -; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 ; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10 -; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 -; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: s_waitcnt vmcnt(6) ; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 ; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 ; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 -; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 ; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 ; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 ; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 -; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 ; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_alignbit_b32 v2, v3, v2, 16 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 @@ -26203,7 +26228,7 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -26225,100 +26250,79 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_writelane_b32 v63, s36, 2 ; SI-NEXT: v_writelane_b32 v63, s30, 3 ; SI-NEXT: v_writelane_b32 v63, s31, 4 -; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 -; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 -; SI-NEXT: v_readfirstlane_b32 s30, v1 -; SI-NEXT: v_readfirstlane_b32 s34, v0 -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s12 -; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2 -; SI-NEXT: s_and_b32 s31, s30, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6 -; SI-NEXT: v_readfirstlane_b32 s94, v3 -; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s31 +; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 ; SI-NEXT: v_readfirstlane_b32 s90, v5 -; SI-NEXT: s_and_b32 s95, s94, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_hi -; SI-NEXT: v_readfirstlane_b32 s88, v6 +; SI-NEXT: v_readfirstlane_b32 s76, v8 ; SI-NEXT: s_and_b32 s91, s90, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s95 -; SI-NEXT: v_readfirstlane_b32 s78, v7 -; SI-NEXT: s_and_b32 s89, s88, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_readfirstlane_b32 s34, v0 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s14 +; SI-NEXT: s_and_b32 s77, s76, 0xffff0000 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s91 -; SI-NEXT: v_readfirstlane_b32 s76, v8 -; SI-NEXT: s_and_b32 s79, s78, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: s_and_b32 s41, s16, 0xffff0000 +; SI-NEXT: s_lshl_b32 s76, s76, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s89 -; SI-NEXT: v_readfirstlane_b32 s74, v9 -; SI-NEXT: s_and_b32 s77, s76, 0xffff0000 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77 +; SI-NEXT: v_readfirstlane_b32 s30, v1 +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s41 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s76 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: v_readfirstlane_b32 s72, v10 -; SI-NEXT: s_and_b32 s75, s74, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77 ; SI-NEXT: v_readfirstlane_b32 s62, v11 ; SI-NEXT: s_and_b32 s73, s72, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s75 ; SI-NEXT: v_readfirstlane_b32 s60, v12 ; SI-NEXT: s_and_b32 s63, s62, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s73 ; SI-NEXT: v_readfirstlane_b32 s58, v13 ; SI-NEXT: s_and_b32 s61, s60, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s63 ; SI-NEXT: v_readfirstlane_b32 s56, v14 ; SI-NEXT: s_and_b32 s59, s58, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s61 -; SI-NEXT: v_readfirstlane_b32 s46, v15 +; SI-NEXT: v_readfirstlane_b32 s44, v16 ; SI-NEXT: s_and_b32 s57, s56, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s59 -; SI-NEXT: v_readfirstlane_b32 s44, v16 -; SI-NEXT: s_and_b32 s47, s46, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57 -; SI-NEXT: v_readfirstlane_b32 s42, v17 ; SI-NEXT: s_and_b32 s45, s44, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s47 -; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 -; SI-NEXT: v_readfirstlane_b32 s92, v4 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57 +; SI-NEXT: s_lshl_b32 s44, s44, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s44 +; SI-NEXT: v_readfirstlane_b32 s42, v17 +; SI-NEXT: v_readfirstlane_b32 s46, v15 +; SI-NEXT: v_readfirstlane_b32 s74, v9 +; SI-NEXT: v_readfirstlane_b32 s78, v7 +; SI-NEXT: v_readfirstlane_b32 s88, v6 +; SI-NEXT: v_readfirstlane_b32 s92, v4 +; SI-NEXT: v_readfirstlane_b32 s94, v3 +; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2 ; SI-NEXT: s_and_b32 s4, s29, 0xffff0000 ; SI-NEXT: s_lshl_b32 s5, s29, 16 +; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 ; SI-NEXT: s_lshl_b32 s7, s28, 16 ; SI-NEXT: s_and_b32 s8, s27, 0xffff0000 ; SI-NEXT: s_lshl_b32 s9, s27, 16 ; SI-NEXT: s_and_b32 s10, s26, 0xffff0000 ; SI-NEXT: s_lshl_b32 s11, s26, 16 +; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 ; SI-NEXT: s_lshl_b32 s13, s25, 16 -; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 ; SI-NEXT: s_lshl_b32 s15, s24, 16 ; SI-NEXT: s_and_b32 s24, s23, 0xffff0000 ; SI-NEXT: s_lshl_b32 s23, s23, 16 @@ -26334,528 +26338,559 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a ; SI-NEXT: s_lshl_b32 s18, s18, 16 ; SI-NEXT: s_and_b32 s40, s17, 0xffff0000 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_and_b32 s41, s16, 0xffff0000 ; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 ; SI-NEXT: s_lshl_b32 s42, s42, 16 -; SI-NEXT: s_lshl_b32 s44, s44, 16 +; SI-NEXT: s_and_b32 s47, s46, 0xffff0000 ; SI-NEXT: s_lshl_b32 s46, s46, 16 ; SI-NEXT: s_lshl_b32 s56, s56, 16 ; SI-NEXT: s_lshl_b32 s58, s58, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_lshl_b32 s60, s60, 16 ; SI-NEXT: s_lshl_b32 s62, s62, 16 ; SI-NEXT: s_lshl_b32 s72, s72, 16 +; SI-NEXT: s_and_b32 s75, s74, 0xffff0000 ; SI-NEXT: s_lshl_b32 s74, s74, 16 -; SI-NEXT: s_lshl_b32 s76, s76, 16 +; SI-NEXT: s_and_b32 s79, s78, 0xffff0000 ; SI-NEXT: s_lshl_b32 s78, s78, 16 +; SI-NEXT: s_and_b32 s89, s88, 0xffff0000 ; SI-NEXT: s_lshl_b32 s88, s88, 16 ; SI-NEXT: s_lshl_b32 s90, s90, 16 ; SI-NEXT: s_and_b32 s93, s92, 0xffff0000 ; SI-NEXT: s_lshl_b32 s92, s92, 16 +; SI-NEXT: s_and_b32 s95, s94, 0xffff0000 ; SI-NEXT: s_lshl_b32 s94, s94, 16 +; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000 ; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16 +; SI-NEXT: s_and_b32 s31, s30, 0xffff0000 ; SI-NEXT: s_lshl_b32 s30, s30, 16 ; SI-NEXT: s_and_b32 s35, s34, 0xffff0000 ; SI-NEXT: s_lshl_b32 s34, s34, 16 ; SI-NEXT: v_readfirstlane_b32 s36, v18 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43 ; SI-NEXT: s_cmp_lg_u32 s36, 0 -; SI-NEXT: v_mul_f32_e64 v55, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v53, 1.0, s40 -; SI-NEXT: v_mul_f32_e64 v3, 1.0, s29 -; SI-NEXT: v_mul_f32_e64 v4, 1.0, s28 -; SI-NEXT: v_mul_f32_e64 v62, 1.0, s27 -; SI-NEXT: v_mul_f32_e64 v6, 1.0, s26 -; SI-NEXT: v_mul_f32_e64 v7, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v3, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v11, 1.0, s40 +; SI-NEXT: v_mul_f32_e64 v36, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v9, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v40, 1.0, s18 +; SI-NEXT: v_mul_f32_e64 v6, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v22, 1.0, s19 +; SI-NEXT: v_mul_f32_e64 v5, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v35, 1.0, s20 +; SI-NEXT: v_mul_f32_e64 v7, 1.0, s26 +; SI-NEXT: v_mul_f32_e64 v34, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v62, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v33, 1.0, s22 ; SI-NEXT: v_mul_f32_e64 v8, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v9, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v11, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v61, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v60, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v10, 1.0, s12 +; SI-NEXT: v_mul_f32_e64 v59, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v20, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v53, 1.0, s11 ; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s35 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s93 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: v_mul_f32_e64 v43, 1.0, s16 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17 -; SI-NEXT: v_mul_f32_e64 v34, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v17, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v20, 1.0, s20 -; SI-NEXT: v_mul_f32_e64 v19, 1.0, s21 -; SI-NEXT: v_mul_f32_e64 v13, 1.0, s22 -; SI-NEXT: v_mul_f32_e64 v31, 1.0, s23 -; SI-NEXT: v_mul_f32_e64 v23, 1.0, s15 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s13 -; SI-NEXT: v_mul_f32_e64 v30, 1.0, s11 -; SI-NEXT: v_mul_f32_e64 v27, 1.0, s9 -; SI-NEXT: v_mul_f32_e64 v61, 1.0, s7 -; SI-NEXT: v_mul_f32_e64 v29, 1.0, s5 -; SI-NEXT: v_mul_f32_e64 v15, 1.0, s34 -; SI-NEXT: v_mul_f32_e64 v60, 1.0, s30 -; SI-NEXT: v_mul_f32_e64 v33, 1.0, vcc_lo -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s94 -; SI-NEXT: v_mul_f32_e64 v59, 1.0, s92 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s90 -; SI-NEXT: v_mul_f32_e64 v38, 1.0, s88 -; SI-NEXT: v_mul_f32_e64 v22, 1.0, s78 -; SI-NEXT: v_mul_f32_e64 v36, 1.0, s76 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s74 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s72 -; SI-NEXT: v_mul_f32_e64 v49, 1.0, s62 +; SI-NEXT: v_mul_f32_e64 v51, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v13, 1.0, s6 +; SI-NEXT: v_mul_f32_e64 v43, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v14, 1.0, s4 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v15, 1.0, s35 +; SI-NEXT: v_mul_f32_e64 v32, 1.0, s34 +; SI-NEXT: v_mul_f32_e64 v17, 1.0, s31 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s30 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, vcc_hi +; SI-NEXT: v_mul_f32_e64 v48, 1.0, vcc_lo +; SI-NEXT: v_mul_f32_e64 v18, 1.0, s95 +; SI-NEXT: v_mul_f32_e64 v55, 1.0, s94 +; SI-NEXT: v_mul_f32_e64 v19, 1.0, s93 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s92 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s90 +; SI-NEXT: v_mul_f32_e64 v21, 1.0, s89 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s88 +; SI-NEXT: v_mul_f32_e64 v27, 1.0, s79 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s78 +; SI-NEXT: v_mul_f32_e64 v49, 1.0, s75 +; SI-NEXT: v_mul_f32_e64 v24, 1.0, s74 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s72 +; SI-NEXT: v_mul_f32_e64 v26, 1.0, s62 ; SI-NEXT: v_mul_f32_e64 v45, 1.0, s60 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s58 -; SI-NEXT: v_mul_f32_e64 v51, 1.0, s56 -; SI-NEXT: v_mul_f32_e64 v41, 1.0, s46 -; SI-NEXT: v_mul_f32_e64 v54, 1.0, s44 -; SI-NEXT: v_mul_f32_e64 v52, 1.0, s42 -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v28, 1.0, s58 +; SI-NEXT: v_mul_f32_e64 v52, 1.0, s56 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s47 +; SI-NEXT: v_mul_f32_e64 v30, 1.0, s46 +; SI-NEXT: v_mul_f32_e64 v44, 1.0, s43 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s42 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; SI-NEXT: s_cbranch_scc0 .LBB19_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v55 -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v53 +; SI-NEXT: v_mov_b32_e32 v0, v3 +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v44, v1 -; SI-NEXT: v_mov_b32_e32 v43, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v4 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v62 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v12 -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: v_mov_b32_e32 v36, v47 -; SI-NEXT: v_mov_b32_e32 v50, v49 -; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v40, v41 -; SI-NEXT: s_mov_b64 s[4:5], 0 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v1, v43 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[0:1], v[3:4], 16 +; SI-NEXT: v_mov_b32_e32 v1, v36 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v11 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[1:2], v[43:44], 16 -; SI-NEXT: v_mov_b32_e32 v2, v34 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[1:2], v[36:37], 16 +; SI-NEXT: v_mov_b32_e32 v2, v40 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v9 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[2:3], v[34:35], 16 -; SI-NEXT: v_mov_b32_e32 v3, v17 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[2:3], v[40:41], 16 +; SI-NEXT: v_mov_b32_e32 v3, v22 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v6 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 16 -; SI-NEXT: v_mov_b32_e32 v4, v20 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[3:4], v[22:23], 16 +; SI-NEXT: v_mov_b32_e32 v4, v35 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v5 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[4:5], v[20:21], 16 -; SI-NEXT: v_mov_b32_e32 v5, v19 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v6 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[4:5], v[35:36], 16 +; SI-NEXT: v_mov_b32_e32 v5, v34 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v7 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[5:6], v[19:20], 16 -; SI-NEXT: v_mov_b32_e32 v6, v13 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[5:6], v[34:35], 16 +; SI-NEXT: v_mov_b32_e32 v6, v33 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v62 +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[6:7], v[13:14], 16 -; SI-NEXT: v_mov_b32_e32 v7, v31 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[6:7], v[33:34], 16 +; SI-NEXT: v_mov_b32_e32 v7, v61 +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[7:8], v[31:32], 16 -; SI-NEXT: v_mov_b32_e32 v8, v23 -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v8 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[8:9], v[23:24], 16 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v44, v45 -; SI-NEXT: v_mov_b32_e32 v32, v59 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 -; SI-NEXT: v_mov_b32_e32 v9, v25 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[7:8], v[61:62], 16 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v20 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v12 +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[9:10], v[25:26], 16 -; SI-NEXT: v_mov_b32_e32 v10, v30 -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_mov_b32_e32 v25, v49 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v56 +; SI-NEXT: v_mov_b32_e32 v20, v56 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v18 +; SI-NEXT: v_mov_b32_e32 v31, v47 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v27 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v8 +; SI-NEXT: v_mov_b32_e32 v8, v60 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[10:11], v[30:31], 16 -; SI-NEXT: v_mov_b32_e32 v11, v27 -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[8:9], v[60:61], 16 +; SI-NEXT: v_mov_b32_e32 v9, v59 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v10 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[11:12], v[27:28], 16 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v16 -; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v17 -; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v18 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v27 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v12 -; SI-NEXT: v_mov_b32_e32 v12, v61 +; SI-NEXT: v_lshr_b64 v[9:10], v[59:60], 16 +; SI-NEXT: v_mov_b32_e32 v10, v53 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[10:11], v[53:54], 16 +; SI-NEXT: v_mov_b32_e32 v11, v51 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[12:13], v[61:62], 16 -; SI-NEXT: v_mov_b32_e32 v13, v29 -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[11:12], v[51:52], 16 +; SI-NEXT: v_mov_b32_e32 v12, v43 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[13:14], v[29:30], 16 -; SI-NEXT: v_mov_b32_e32 v14, v15 -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v62, v39 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v62 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v21 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v25 -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v26 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28 +; SI-NEXT: v_lshr_b64 v[12:13], v[43:44], 16 +; SI-NEXT: v_mov_b32_e32 v13, v39 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[14:15], v[15:16], 16 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v30 +; SI-NEXT: v_lshr_b64 v[13:14], v[39:40], 16 +; SI-NEXT: v_mov_b32_e32 v14, v32 +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[14:15], v[32:33], 16 +; SI-NEXT: v_mov_b32_e32 v15, v16 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v39, v48 +; SI-NEXT: v_mov_b32_e32 v54, v55 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v19 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v21 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[15:16], v[16:17], 16 +; SI-NEXT: v_lshr_b64 v[16:17], v[48:49], 16 +; SI-NEXT: v_mov_b32_e32 v48, v18 +; SI-NEXT: v_lshr_b64 v[17:18], v[55:56], 16 +; SI-NEXT: v_mov_b32_e32 v18, v42 +; SI-NEXT: v_mov_b32_e32 v55, v19 +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[18:19], v[42:43], 16 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v56, v20 +; SI-NEXT: v_mov_b32_e32 v49, v25 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v15 -; SI-NEXT: v_mov_b32_e32 v15, v60 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v19 +; SI-NEXT: v_mov_b32_e32 v19, v50 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[60:61], 16 -; SI-NEXT: v_mov_b32_e32 v16, v33 -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[50:51], 16 +; SI-NEXT: v_mov_b32_e32 v20, v58 +; SI-NEXT: v_mov_b32_e32 v50, v21 +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[16:17], v[33:34], 16 -; SI-NEXT: v_mov_b32_e32 v17, v57 -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[20:21], v[58:59], 16 +; SI-NEXT: v_mov_b32_e32 v21, v46 +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[17:18], v[57:58], 16 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v47 -; SI-NEXT: v_lshr_b64 v[18:19], v[59:60], 16 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v20 -; SI-NEXT: v_lshr_b64 v[19:20], v[56:57], 16 -; SI-NEXT: v_mov_b32_e32 v20, v38 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[21:22], v[46:47], 16 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v36 +; SI-NEXT: v_mov_b32_e32 v47, v31 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22 +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16 +; SI-NEXT: v_mov_b32_e32 v23, v24 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[20:21], v[38:39], 16 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v24 +; SI-NEXT: v_lshr_b64 v[23:24], v[24:25], 16 +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; SI-NEXT: v_mov_b32_e32 v39, v62 -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21 -; SI-NEXT: v_mov_b32_e32 v21, v22 -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v24 +; SI-NEXT: v_lshr_b64 v[24:25], v[57:58], 16 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v25 +; SI-NEXT: v_mov_b32_e32 v25, v26 +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[21:22], v[22:23], 16 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v55 +; SI-NEXT: v_lshr_b64 v[25:26], v[26:27], 16 +; SI-NEXT: v_lshr_b64 v[26:27], v[45:46], 16 +; SI-NEXT: v_mov_b32_e32 v46, v28 +; SI-NEXT: v_lshr_b64 v[27:28], v[28:29], 16 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22 -; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16 -; SI-NEXT: v_lshr_b64 v[23:24], v[46:47], 16 -; SI-NEXT: v_lshr_b64 v[24:25], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[25:26], v[50:51], 16 -; SI-NEXT: v_lshr_b64 v[26:27], v[44:45], 16 -; SI-NEXT: v_lshr_b64 v[27:28], v[42:43], 16 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v53 -; SI-NEXT: v_lshr_b64 v[61:62], v[52:53], 16 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v45, v44 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v47, v36 -; SI-NEXT: v_mov_b32_e32 v36, v37 -; SI-NEXT: v_mov_b32_e32 v49, v50 -; SI-NEXT: v_mov_b32_e32 v51, v33 -; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16 -; SI-NEXT: v_lshr_b64 v[29:30], v[40:41], 16 -; SI-NEXT: v_lshr_b64 v[30:31], v[54:55], 16 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v29, v30 +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_mov_b32_e32 v44, v32 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[29:30], v[30:31], 16 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v32 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshr_b64 v[61:62], v[30:31], 16 +; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v53 +; SI-NEXT: v_mov_b32_e32 v53, v30 +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16 ; SI-NEXT: v_mov_b32_e32 v31, v61 -; SI-NEXT: v_mov_b32_e32 v41, v40 ; SI-NEXT: s_branch .LBB19_3 ; SI-NEXT: .LBB19_2: -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v32, v59 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v58, v56 +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v39, v48 +; SI-NEXT: v_mov_b32_e32 v54, v55 +; SI-NEXT: v_mov_b32_e32 v48, v18 +; SI-NEXT: v_mov_b32_e32 v55, v19 +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: v_mov_b32_e32 v46, v28 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_mov_b32_e32 v50, v21 +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: .LBB19_3: ; %Flow -; SI-NEXT: v_mov_b32_e32 v37, v32 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_mov_b32_e32 v53, v39 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v35, v54 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_mov_b32_e32 v33, v38 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v33, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) expcnt(3) -; SI-NEXT: v_mov_b32_e32 v38, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v50, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v40, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v51, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0) +; SI-NEXT: v_mov_b32_e32 v54, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v39, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v34, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v40, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v43, v58 ; SI-NEXT: s_cbranch_vccnz .LBB19_5 ; SI-NEXT: ; %bb.4: ; %cmp.true -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v55 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v43 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v53 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v62 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v56 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v48 +; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18 +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v34, v56 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v47 -; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v34 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 -; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 -; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23 -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31 -; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 -; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 -; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 -; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 -; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 -; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 -; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 -; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v40 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v43 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v62 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v42 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 -; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v41 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v40 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v34 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v39 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 ; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 -; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v54 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 +; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 +; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28 +; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 +; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 +; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 +; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 @@ -26864,99 +26899,85 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 ; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v50 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 -; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v51 +; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 ; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16 ; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v38 ; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 ; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v33 ; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v39 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v32 ; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 ; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16 -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v33 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v44 +; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16 -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v32 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v52 -; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 -; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v35 ; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v55 +; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32 +; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 +; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16 ; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 ; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16 -; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v37 -; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 ; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16 -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v58 -; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 -; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 +; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 ; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21 +; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v50 ; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 ; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 +; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21 ; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 @@ -26965,32 +26986,68 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16 -; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v36 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22 ; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 +; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v46 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v49 +; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 ; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16 -; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v48 +; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v57 ; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 ; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16 -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v49 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 ; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 +; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16 ; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v45 ; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 ; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16 -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v42 +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v46 ; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 ; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16 -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v51 +; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v52 ; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 ; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16 -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v41 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v47 +; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 ; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 ; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16 -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v54 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 ; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31 +; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16 ; SI-NEXT: v_mov_b32_e32 v31, v32 ; SI-NEXT: .LBB19_5: ; %end @@ -27015,33 +27072,34 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v64bf16_to_v32i32_scalar: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v35, s36, 0 -; VI-NEXT: v_writelane_b32 v35, s37, 1 -; VI-NEXT: v_writelane_b32 v35, s38, 2 -; VI-NEXT: v_writelane_b32 v35, s39, 3 -; VI-NEXT: v_writelane_b32 v35, s48, 4 -; VI-NEXT: v_writelane_b32 v35, s49, 5 -; VI-NEXT: v_writelane_b32 v35, s50, 6 -; VI-NEXT: v_writelane_b32 v35, s51, 7 -; VI-NEXT: v_writelane_b32 v35, s52, 8 -; VI-NEXT: v_writelane_b32 v35, s53, 9 -; VI-NEXT: v_writelane_b32 v35, s54, 10 -; VI-NEXT: v_writelane_b32 v35, s55, 11 -; VI-NEXT: v_writelane_b32 v35, s64, 12 -; VI-NEXT: v_writelane_b32 v35, s65, 13 -; VI-NEXT: v_writelane_b32 v35, s66, 14 -; VI-NEXT: v_writelane_b32 v35, s67, 15 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: v_writelane_b32 v41, s36, 0 +; VI-NEXT: v_writelane_b32 v41, s37, 1 +; VI-NEXT: v_writelane_b32 v41, s38, 2 +; VI-NEXT: v_writelane_b32 v41, s39, 3 +; VI-NEXT: v_writelane_b32 v41, s48, 4 +; VI-NEXT: v_writelane_b32 v41, s49, 5 +; VI-NEXT: v_writelane_b32 v41, s50, 6 +; VI-NEXT: v_writelane_b32 v41, s51, 7 +; VI-NEXT: v_writelane_b32 v41, s52, 8 +; VI-NEXT: v_writelane_b32 v41, s53, 9 +; VI-NEXT: v_writelane_b32 v41, s54, 10 +; VI-NEXT: v_writelane_b32 v41, s55, 11 +; VI-NEXT: v_writelane_b32 v41, s64, 12 +; VI-NEXT: v_writelane_b32 v41, s65, 13 +; VI-NEXT: v_writelane_b32 v41, s66, 14 +; VI-NEXT: v_writelane_b32 v41, s67, 15 ; VI-NEXT: v_readfirstlane_b32 s4, v18 ; VI-NEXT: s_mov_b32 s49, s29 ; VI-NEXT: s_mov_b32 s48, s28 @@ -27080,9 +27138,27 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB19_4 ; VI-NEXT: .LBB19_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v32, 0x40c00000 +; VI-NEXT: s_lshl_b32 s4, s51, 16 +; VI-NEXT: v_mov_b32_e32 v17, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; VI-NEXT: s_lshl_b32 s4, s50, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 @@ -27090,588 +27166,571 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 ; VI-NEXT: s_and_b32 s4, s50, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v32 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s48, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v32 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: s_lshl_b32 s4, s49, 16 ; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s46, 16 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[2:3] ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s48, 16 +; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s47, 16 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s46, 16 +; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s45, 16 ; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s44, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s44, 16 +; VI-NEXT: v_lshrrev_b64 v[34:35], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s43, 16 ; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s42, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s42, 16 +; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s41, 16 ; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s40, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s40, 16 +; VI-NEXT: v_lshrrev_b64 v[36:37], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s39, 16 ; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s38, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s38, 16 +; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s37, 16 ; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s36, 16 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc -; VI-NEXT: v_bfe_u32 v3, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v0 +; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s36, 16 +; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc +; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: s_and_b32 s4, s66, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 +; VI-NEXT: s_lshl_b32 s4, s67, 16 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s67, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s66, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s66, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[48:49], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s64, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s65, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s65, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s64, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s64, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[49:50], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s62, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s63, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s63, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s62, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s62, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[50:51], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s60, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s61, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s61, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s60, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s60, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[51:52], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s58, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s59, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s59, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s58, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s58, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[52:53], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s56, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s57, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s57, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s56, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s56, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[53:54], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s54, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s55, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s55, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s54, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s54, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[54:55], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s52, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s53, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s53, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v39, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s52, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s52, 16 +; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s52, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v16, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s37, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: s_lshl_b32 s4, s39, 16 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc -; VI-NEXT: v_add_f32_e32 v5, s4, v32 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s4, v32 -; VI-NEXT: v_mov_b32_e32 v1, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v7, v9, vcc -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: s_lshl_b32 s4, s41, 16 -; VI-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc -; VI-NEXT: v_add_f32_e32 v7, s4, v32 -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v3 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s4, v32 -; VI-NEXT: v_mov_b32_e32 v3, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v9, v11, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: s_lshl_b32 s4, s43, 16 -; VI-NEXT: v_cndmask_b32_e32 v7, v9, v11, vcc -; VI-NEXT: v_add_f32_e32 v9, s4, v32 -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v5 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s4, v32 -; VI-NEXT: v_mov_b32_e32 v5, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: s_lshl_b32 s4, s45, 16 -; VI-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc -; VI-NEXT: v_add_f32_e32 v11, s4, v32 -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[15:16] -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s4, v32 -; VI-NEXT: v_mov_b32_e32 v7, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v13, v15, vcc -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: s_lshl_b32 s4, s47, 16 -; VI-NEXT: v_cndmask_b32_e32 v11, v13, v15, vcc -; VI-NEXT: v_add_f32_e32 v13, s4, v32 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v9 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v32 -; VI-NEXT: v_mov_b32_e32 v9, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: s_lshl_b32 s4, s49, 16 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v17, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v15, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v11 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v15 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_add_f32_e32 v15, s4, v32 +; VI-NEXT: v_lshrrev_b64 v[39:40], 16, v[39:40] +; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v1 +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] +; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[16:17] +; VI-NEXT: v_mov_b32_e32 v1, v38 +; VI-NEXT: v_mov_b32_e32 v3, v37 +; VI-NEXT: v_mov_b32_e32 v5, v36 +; VI-NEXT: v_mov_b32_e32 v7, v35 +; VI-NEXT: v_mov_b32_e32 v9, v34 ; VI-NEXT: v_mov_b32_e32 v11, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v17, v19, vcc -; VI-NEXT: v_bfe_u32 v17, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v15 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: s_lshl_b32 s4, s51, 16 -; VI-NEXT: v_cndmask_b32_e32 v15, v17, v19, vcc -; VI-NEXT: v_add_f32_e32 v17, s4, v32 -; VI-NEXT: v_bfe_u32 v19, v17, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: s_and_b32 s4, s53, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; VI-NEXT: v_add_f32_e32 v17, s4, v32 -; VI-NEXT: v_mov_b32_e32 v13, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v19, v21, vcc -; VI-NEXT: v_bfe_u32 v19, v17, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; VI-NEXT: s_lshl_b32 s4, s53, 16 -; VI-NEXT: v_cndmask_b32_e32 v17, v19, v21, vcc -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v15 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: s_and_b32 s4, s55, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_mov_b32_e32 v15, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v21, v23, vcc -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: s_lshl_b32 s4, s55, 16 -; VI-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v17 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: s_and_b32 s4, s57, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_mov_b32_e32 v17, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v23, v25, vcc -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: s_lshl_b32 s4, s57, 16 -; VI-NEXT: v_cndmask_b32_e32 v21, v23, v25, vcc -; VI-NEXT: v_add_f32_e32 v23, s4, v32 -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v19 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: s_and_b32 s4, s59, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: v_add_f32_e32 v23, s4, v32 -; VI-NEXT: v_mov_b32_e32 v19, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v25, v27, vcc -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: s_lshl_b32 s4, s59, 16 -; VI-NEXT: v_cndmask_b32_e32 v23, v25, v27, vcc -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: s_and_b32 s4, s61, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_mov_b32_e32 v21, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v27, v29, vcc -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: s_lshl_b32 s4, s61, 16 -; VI-NEXT: v_cndmask_b32_e32 v25, v27, v29, vcc -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v23 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: s_and_b32 s4, s63, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_mov_b32_e32 v23, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v29, v31, vcc -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: s_lshl_b32 s4, s63, 16 -; VI-NEXT: v_cndmask_b32_e32 v27, v29, v31, vcc -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v25 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: s_and_b32 s4, s65, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v25, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v31, v33, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v27 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: v_mov_b32_e32 v27, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: s_lshl_b32 s4, s65, 16 -; VI-NEXT: v_cndmask_b32_e32 v29, v31, v33, vcc -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: s_and_b32 s4, s67, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_mov_b32_e32 v29, v33 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: s_lshl_b32 s4, s67, 16 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v32, v31, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_add_u32_e32 v32, vcc, v32, v31 -; VI-NEXT: v_add_u32_e32 v32, vcc, 0x7fff, v32 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v31, v32, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v33 -; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[31:32] +; VI-NEXT: v_mov_b32_e32 v13, v15 +; VI-NEXT: v_mov_b32_e32 v15, v32 +; VI-NEXT: v_mov_b32_e32 v17, v39 +; VI-NEXT: v_mov_b32_e32 v19, v54 +; VI-NEXT: v_mov_b32_e32 v21, v53 +; VI-NEXT: v_mov_b32_e32 v23, v52 +; VI-NEXT: v_mov_b32_e32 v25, v51 +; VI-NEXT: v_mov_b32_e32 v27, v50 +; VI-NEXT: v_mov_b32_e32 v29, v49 +; VI-NEXT: v_mov_b32_e32 v31, v48 ; VI-NEXT: s_branch .LBB19_5 ; VI-NEXT: .LBB19_3: ; VI-NEXT: s_branch .LBB19_2 @@ -27709,24 +27768,25 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a ; VI-NEXT: v_mov_b32_e32 v30, s66 ; VI-NEXT: v_mov_b32_e32 v31, s67 ; VI-NEXT: .LBB19_5: ; %end -; VI-NEXT: v_readlane_b32 s67, v35, 15 -; VI-NEXT: v_readlane_b32 s66, v35, 14 -; VI-NEXT: v_readlane_b32 s65, v35, 13 -; VI-NEXT: v_readlane_b32 s64, v35, 12 -; VI-NEXT: v_readlane_b32 s55, v35, 11 -; VI-NEXT: v_readlane_b32 s54, v35, 10 -; VI-NEXT: v_readlane_b32 s53, v35, 9 -; VI-NEXT: v_readlane_b32 s52, v35, 8 -; VI-NEXT: v_readlane_b32 s51, v35, 7 -; VI-NEXT: v_readlane_b32 s50, v35, 6 -; VI-NEXT: v_readlane_b32 s49, v35, 5 -; VI-NEXT: v_readlane_b32 s48, v35, 4 -; VI-NEXT: v_readlane_b32 s39, v35, 3 -; VI-NEXT: v_readlane_b32 s38, v35, 2 -; VI-NEXT: v_readlane_b32 s37, v35, 1 -; VI-NEXT: v_readlane_b32 s36, v35, 0 -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: v_readlane_b32 s67, v41, 15 +; VI-NEXT: v_readlane_b32 s66, v41, 14 +; VI-NEXT: v_readlane_b32 s65, v41, 13 +; VI-NEXT: v_readlane_b32 s64, v41, 12 +; VI-NEXT: v_readlane_b32 s55, v41, 11 +; VI-NEXT: v_readlane_b32 s54, v41, 10 +; VI-NEXT: v_readlane_b32 s53, v41, 9 +; VI-NEXT: v_readlane_b32 s52, v41, 8 +; VI-NEXT: v_readlane_b32 s51, v41, 7 +; VI-NEXT: v_readlane_b32 s50, v41, 6 +; VI-NEXT: v_readlane_b32 s49, v41, 5 +; VI-NEXT: v_readlane_b32 s48, v41, 4 +; VI-NEXT: v_readlane_b32 s39, v41, 3 +; VI-NEXT: v_readlane_b32 s38, v41, 2 +; VI-NEXT: v_readlane_b32 s37, v41, 1 +; VI-NEXT: v_readlane_b32 s36, v41, 0 +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -27807,34 +27867,34 @@ define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v16 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_lshl_b32 s4, s50, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s4, v16 ; GFX9-NEXT: v_mov_b32_e32 v32, 0xffff -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v15, v0, 16, v1 ; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_b32_sdwa v3, v32, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_lshl_or_b32 v14, v2, 16, v3 +; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 +; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: s_lshl_b32 s4, s50, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 +; GFX9-NEXT: v_lshl_or_b32 v14, v0, 16, v1 +; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 +; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 ; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 ; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 @@ -30492,8 +30552,8 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i ; SI-NEXT: s_lshr_b32 s69, s17, 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 @@ -30542,14 +30602,20 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i ; SI-NEXT: s_add_i32 s4, s4, 3 ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 ; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16 ; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16 ; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s38, s5, 16 ; SI-NEXT: s_lshr_b32 s39, s7, 16 ; SI-NEXT: s_lshr_b32 s48, s9, 16 @@ -30566,39 +30632,33 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i ; SI-NEXT: s_lshr_b32 s67, s21, 16 ; SI-NEXT: s_lshr_b32 s68, s19, 16 ; SI-NEXT: s_lshr_b32 s69, s17, 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 ; SI-NEXT: .LBB21_3: ; %end -; SI-NEXT: s_lshl_b32 s47, s36, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s47, s36, 16 ; SI-NEXT: s_or_b32 s16, s16, s47 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s47, s69, 16 ; SI-NEXT: s_or_b32 s17, s17, s47 -; SI-NEXT: s_lshl_b32 s47, s34, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s47, s34, 16 ; SI-NEXT: s_or_b32 s18, s18, s47 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s47, s68, 16 ; SI-NEXT: s_or_b32 s19, s19, s47 -; SI-NEXT: s_lshl_b32 s47, s30, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s47, s30, 16 ; SI-NEXT: s_or_b32 s20, s20, s47 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s47, s67, 16 ; SI-NEXT: s_or_b32 s21, s21, s47 -; SI-NEXT: s_lshl_b32 s47, s94, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s47, s94, 16 ; SI-NEXT: s_or_b32 s22, s22, s47 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s47, s66, 16 ; SI-NEXT: s_or_b32 s23, s23, s47 -; SI-NEXT: s_lshl_b32 s47, s92, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s47, s92, 16 ; SI-NEXT: s_or_b32 s24, s24, s47 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s47, s65, 16 @@ -30646,13 +30706,13 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i ; SI-NEXT: s_lshl_b32 s47, s50, 16 ; SI-NEXT: s_or_b32 s13, s13, s47 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s47, s58, 16 +; SI-NEXT: s_lshl_b32 s47, s60, 16 ; SI-NEXT: s_or_b32 s10, s10, s47 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_lshl_b32 s47, s49, 16 ; SI-NEXT: s_or_b32 s11, s11, s47 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s47, s60, 16 +; SI-NEXT: s_lshl_b32 s47, s58, 16 ; SI-NEXT: s_or_b32 s8, s8, s47 ; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_lshl_b32 s47, s48, 16 @@ -30753,14 +30813,14 @@ define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i ; SI-NEXT: ; implicit-def: $sgpr51 ; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr49 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr39 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: s_branch .LBB21_2 ; ; VI-LABEL: bitcast_v32i32_to_v64f16_scalar: @@ -31089,15 +31149,15 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v25 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v24 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23 @@ -31110,12 +31170,12 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v20 ; SI-NEXT: v_mov_b32_e32 v52, v18 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19 ; SI-NEXT: v_mov_b32_e32 v53, v17 @@ -31155,18 +31215,18 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v43 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v44 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v56 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v58 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v59 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v60 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v61 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v62 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v45 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v58 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v59 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v61 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v62 ; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill @@ -31191,40 +31251,40 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v61 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v50 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v48 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v39 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v38 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v37 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v63 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v32 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v36 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51 @@ -31282,25 +31342,25 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr44 ; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; kill: killed $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload @@ -31328,7 +31388,7 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: s_waitcnt vmcnt(11) @@ -31362,7 +31422,7 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 @@ -31438,213 +31498,212 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB22_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v0, v63 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v50 +; SI-NEXT: v_cvt_f32_f16_e32 v0, v50 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v62 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v33 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v59 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v36 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v49 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v57 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v57 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v48 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v34 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v32 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v49 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v47 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v46 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v33 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v35 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v44 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v44 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v43 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v56 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v6, v6, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v37 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v63 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v13, v43 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v41 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v41 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v40 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v39 +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v11, v36 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v54 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v40 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v18, v54 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v34 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_cvt_f32_f16_e32 v18, v53 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v38 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v19, v53 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v37 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v29, v51 ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 ; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 -; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v13, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_cvt_f32_f16_e32 v20, v20 -; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 ; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v31, v31 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v32, v32 ; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 ; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 -; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 -; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 ; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v32, v32 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 +; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32 ; SI-NEXT: v_cvt_f16_f32_e32 v32, v32 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_or_b32_e32 v14, v16, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v17, v16 +; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; SI-NEXT: v_or_b32_e32 v17, v18, v17 +; SI-NEXT: v_or_b32_e32 v16, v18, v16 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_or_b32_e32 v17, v19, v17 +; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload @@ -31688,7 +31747,7 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28 ; SI-NEXT: v_cvt_f16_f32_e32 v28, v28 ; SI-NEXT: v_or_b32_e32 v22, v24, v22 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 ; SI-NEXT: s_waitcnt vmcnt(2) @@ -31704,7 +31763,7 @@ define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 @@ -32116,17 +32175,17 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s13, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s11, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s9, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s7, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s11, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s98, 16 @@ -32615,14 +32674,17 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i ; VI-NEXT: s_lshr_b32 s4, s51, 16 ; VI-NEXT: v_mov_b32_e32 v16, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s4 -; VI-NEXT: s_lshr_b32 s4, s50, 16 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s51, v16 -; VI-NEXT: v_mov_b32_e32 v2, s4 -; VI-NEXT: s_lshr_b32 s4, s49, 16 +; VI-NEXT: s_lshr_b32 s4, s50, 16 ; VI-NEXT: v_or_b32_e32 v15, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, s50, v16 +; VI-NEXT: s_lshr_b32 s4, s49, 16 +; VI-NEXT: v_or_b32_e32 v14, v1, v0 +; VI-NEXT: v_mov_b32_e32 v0, s4 +; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s49, v16 ; VI-NEXT: s_lshr_b32 s4, s48, 16 ; VI-NEXT: v_or_b32_e32 v13, v1, v0 @@ -32672,12 +32734,9 @@ define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i ; VI-NEXT: s_lshr_b32 s4, s39, 16 ; VI-NEXT: v_or_b32_e32 v4, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 -; VI-NEXT: v_add_f16_sdwa v2, v2, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s50, v16 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s39, v16 ; VI-NEXT: s_lshr_b32 s4, s38, 16 -; VI-NEXT: v_or_b32_e32 v14, v3, v2 ; VI-NEXT: v_or_b32_e32 v3, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -33670,8 +33729,8 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b32 s69, s17, 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 @@ -33720,14 +33779,20 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_add_i32 s4, s4, 3 ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 ; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16 ; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16 ; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s38, s5, 16 ; SI-NEXT: s_lshr_b32 s39, s7, 16 ; SI-NEXT: s_lshr_b32 s48, s9, 16 @@ -33744,39 +33809,33 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b32 s67, s21, 16 ; SI-NEXT: s_lshr_b32 s68, s19, 16 ; SI-NEXT: s_lshr_b32 s69, s17, 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 ; SI-NEXT: .LBB25_3: ; %end -; SI-NEXT: s_lshl_b32 s47, s36, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s47, s36, 16 ; SI-NEXT: s_or_b32 s16, s16, s47 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s47, s69, 16 ; SI-NEXT: s_or_b32 s17, s17, s47 -; SI-NEXT: s_lshl_b32 s47, s34, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s47, s34, 16 ; SI-NEXT: s_or_b32 s18, s18, s47 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s47, s68, 16 ; SI-NEXT: s_or_b32 s19, s19, s47 -; SI-NEXT: s_lshl_b32 s47, s30, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s47, s30, 16 ; SI-NEXT: s_or_b32 s20, s20, s47 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s47, s67, 16 ; SI-NEXT: s_or_b32 s21, s21, s47 -; SI-NEXT: s_lshl_b32 s47, s94, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s47, s94, 16 ; SI-NEXT: s_or_b32 s22, s22, s47 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s47, s66, 16 ; SI-NEXT: s_or_b32 s23, s23, s47 -; SI-NEXT: s_lshl_b32 s47, s92, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s47, s92, 16 ; SI-NEXT: s_or_b32 s24, s24, s47 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s47, s65, 16 @@ -33824,13 +33883,13 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: s_lshl_b32 s47, s50, 16 ; SI-NEXT: s_or_b32 s13, s13, s47 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s47, s58, 16 +; SI-NEXT: s_lshl_b32 s47, s60, 16 ; SI-NEXT: s_or_b32 s10, s10, s47 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_lshl_b32 s47, s49, 16 ; SI-NEXT: s_or_b32 s11, s11, s47 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s47, s60, 16 +; SI-NEXT: s_lshl_b32 s47, s58, 16 ; SI-NEXT: s_or_b32 s8, s8, s47 ; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_lshl_b32 s47, s48, 16 @@ -33931,14 +33990,14 @@ define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i3 ; SI-NEXT: ; implicit-def: $sgpr51 ; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr49 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr39 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: s_branch .LBB25_2 ; ; VI-LABEL: bitcast_v32i32_to_v64i16_scalar: @@ -34252,6 +34311,8 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:4 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 +; SI-NEXT: v_mov_b32_e32 v44, v10 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18 ; SI-NEXT: v_mov_b32_e32 v45, v9 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v19 ; SI-NEXT: v_mov_b32_e32 v46, v8 @@ -34270,8 +34331,8 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26 ; SI-NEXT: v_mov_b32_e32 v61, v1 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v27 +; SI-NEXT: v_mov_b32_e32 v42, v12 ; SI-NEXT: v_mov_b32_e32 v43, v11 -; SI-NEXT: v_mov_b32_e32 v44, v10 ; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill @@ -34282,18 +34343,17 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18 ; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17 ; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v16 ; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15 ; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v45 @@ -34305,123 +34365,119 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v59 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v60 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v61 -; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v26 -; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v25 -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v24 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v23 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v22 -; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v21 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20 -; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v19 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v18 -; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v17 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v15 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v14 -; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v31 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v35 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v11 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v10 +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v11 ; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62 -; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v0 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v29 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v30 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v63 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB26_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 -; SI-NEXT: v_or_b32_e32 v8, v8, v32 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61 @@ -34431,21 +34487,25 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: v_or_b32_e32 v0, v0, v49 -; SI-NEXT: v_or_b32_e32 v1, v1, v42 -; SI-NEXT: v_or_b32_e32 v2, v2, v34 -; SI-NEXT: v_or_b32_e32 v3, v3, v41 -; SI-NEXT: v_or_b32_e32 v4, v4, v48 -; SI-NEXT: v_or_b32_e32 v5, v5, v40 -; SI-NEXT: v_or_b32_e32 v6, v6, v33 -; SI-NEXT: v_or_b32_e32 v7, v7, v55 -; SI-NEXT: v_or_b32_e32 v9, v9, v54 -; SI-NEXT: v_or_b32_e32 v10, v10, v39 -; SI-NEXT: v_or_b32_e32 v11, v11, v53 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: v_or_b32_e32 v0, v0, v36 +; SI-NEXT: v_or_b32_e32 v1, v1, v41 +; SI-NEXT: v_or_b32_e32 v2, v2, v48 +; SI-NEXT: v_or_b32_e32 v3, v3, v40 +; SI-NEXT: v_or_b32_e32 v4, v4, v35 +; SI-NEXT: v_or_b32_e32 v5, v5, v55 +; SI-NEXT: v_or_b32_e32 v6, v6, v39 +; SI-NEXT: v_or_b32_e32 v7, v7, v54 +; SI-NEXT: v_or_b32_e32 v8, v8, v34 +; SI-NEXT: v_or_b32_e32 v9, v9, v53 +; SI-NEXT: v_or_b32_e32 v10, v10, v38 +; SI-NEXT: v_or_b32_e32 v11, v11, v52 +; SI-NEXT: v_or_b32_e32 v12, v12, v33 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr60 @@ -34457,24 +34517,34 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr55 -; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: v_or_b32_e32 v18, v18, v19 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload @@ -34494,51 +34564,45 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v12, v12, v38 -; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_or_b32_e32 v13, v13, v52 -; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v14, v14, v37 -; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; SI-NEXT: v_or_b32_e32 v13, v13, v51 +; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v26, v27 ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_or_b32_e32 v15, v15, v51 -; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_or_b32_e32 v14, v14, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v16, v16, v36 -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v15, v15, v50 +; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v28, v28, v29 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v17, v17, v50 -; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_or_b32_e32 v16, v16, v37 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v18, v18, v35 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_or_b32_e32 v17, v17, v49 +; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: v_or_b32_e32 v30, v30, v31 @@ -34580,34 +34644,24 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: .LBB26_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB26_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v8, v32, v8 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v62 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v61 @@ -34617,9 +34671,11 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v57 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v56 ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46 ; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v45 ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44 ; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v43 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 @@ -34628,21 +34684,25 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_or_b32_e32 v0, v49, v0 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_or_b32_e32 v0, v36, v0 +; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_or_b32_e32 v2, v48, v2 +; SI-NEXT: v_or_b32_e32 v3, v40, v3 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v2, v34, v2 -; SI-NEXT: v_or_b32_e32 v3, v41, v3 -; SI-NEXT: v_or_b32_e32 v4, v48, v4 -; SI-NEXT: v_or_b32_e32 v5, v40, v5 -; SI-NEXT: v_or_b32_e32 v6, v33, v6 -; SI-NEXT: v_or_b32_e32 v7, v55, v7 -; SI-NEXT: v_or_b32_e32 v9, v54, v9 -; SI-NEXT: v_or_b32_e32 v10, v39, v10 -; SI-NEXT: v_or_b32_e32 v11, v53, v11 +; SI-NEXT: v_or_b32_e32 v4, v35, v4 +; SI-NEXT: v_or_b32_e32 v5, v55, v5 +; SI-NEXT: v_or_b32_e32 v6, v39, v6 +; SI-NEXT: v_or_b32_e32 v7, v54, v7 +; SI-NEXT: v_or_b32_e32 v8, v34, v8 +; SI-NEXT: v_or_b32_e32 v9, v53, v9 +; SI-NEXT: v_or_b32_e32 v10, v38, v10 +; SI-NEXT: v_or_b32_e32 v11, v52, v11 +; SI-NEXT: v_or_b32_e32 v12, v33, v12 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 @@ -34650,22 +34710,33 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_or_b32_e32 v18, v19, v18 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9 ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v10 ; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11 +; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 +; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; SI-NEXT: v_or_b32_e32 v19, v20, v19 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 @@ -34688,70 +34759,63 @@ define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v12, v38, v12 -; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 ; SI-NEXT: v_add_i32_e32 v23, vcc, s6, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_or_b32_e32 v13, v52, v13 -; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v14, v37, v14 -; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; SI-NEXT: v_or_b32_e32 v13, v51, v13 +; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_or_b32_e32 v15, v51, v15 -; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_or_b32_e32 v14, v32, v14 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v26 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v16, v36, v16 -; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v15, v50, v15 +; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15 ; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v17, v50, v17 -; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 +; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_or_b32_e32 v16, v37, v16 +; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v18, v35, v18 -; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 +; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_or_b32_e32 v17, v49, v17 +; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 ; SI-NEXT: v_add_i32_e32 v29, vcc, 0x30000, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30 @@ -35124,17 +35188,17 @@ define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s12, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s10, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s8, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s6, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s10, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s98, 16 @@ -35226,14 +35290,14 @@ define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_add_i32 s16, s16, 3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s12, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s17, s17, 3 +; SI-NEXT: s_add_i32 s36, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s10, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s10, s10, 16 -; SI-NEXT: s_or_b32 s5, s10, s5 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_add_i32 s36, s4, 0x30000 -; SI-NEXT: s_add_i32 s37, s5, 0x30000 +; SI-NEXT: s_add_i32 s37, s4, 0x30000 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s8, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 @@ -38235,15 +38299,16 @@ define <32 x float> @bitcast_v16f64_to_v32f32(<16 x double> %a, i32 %b) #0 { ; SI-LABEL: bitcast_v16f64_to_v32f32: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB34_2 ; SI-NEXT: ; %bb.1: ; %cmp.true +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; SI-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; SI-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -38262,20 +38327,22 @@ define <32 x float> @bitcast_v16f64_to_v32f32(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 ; SI-NEXT: .LBB34_2: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v16f64_to_v32f32: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB34_2 ; VI-NEXT: ; %bb.1: ; %cmp.true +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; VI-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; VI-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -38294,20 +38361,22 @@ define <32 x float> @bitcast_v16f64_to_v32f32(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 ; VI-NEXT: .LBB34_2: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v16f64_to_v32f32: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB34_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.true +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; GFX9-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; GFX9-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -38326,6 +38395,7 @@ define <32 x float> @bitcast_v16f64_to_v32f32(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 ; GFX9-NEXT: .LBB34_2: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-LABEL: bitcast_v16f64_to_v32f32: @@ -40159,365 +40229,371 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: ; kill: killed $vgpr39 ; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr47 -; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr54 ; VI-NEXT: ; implicit-def: $vgpr46 ; VI-NEXT: ; implicit-def: $vgpr45 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr53 +; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr44 +; VI-NEXT: ; implicit-def: $vgpr52 ; VI-NEXT: ; implicit-def: $vgpr43 ; VI-NEXT: ; implicit-def: $vgpr63 -; VI-NEXT: ; implicit-def: $vgpr50 -; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr35 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr51 ; VI-NEXT: ; implicit-def: $vgpr62 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr50 ; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr60 -; VI-NEXT: ; implicit-def: $vgpr35 +; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr59 +; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr42 -; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; kill: killed $vgpr40 ; VI-NEXT: ; implicit-def: $vgpr40 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 -; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB36_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[31:32] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[29:30] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[27:28] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[25:26] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[23:24] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[21:22] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[19:20] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[27:28] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[17:18] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[15:16] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[13:14] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[11:12] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[9:10] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[7:8] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[5:6] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v32 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v8 ; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v7 ; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7 ; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v5 ; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4 ; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32 +; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v1 ; VI-NEXT: .LBB36_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB36_4 ; VI-NEXT: ; %bb.3: ; %cmp.true ; VI-NEXT: v_add_f32_e32 v32, 1.0, v32 +; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_add_f32_e32 v31, 1.0, v31 ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] ; VI-NEXT: v_add_f32_e32 v30, 1.0, v30 @@ -40575,257 +40651,262 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] +; VI-NEXT: v_add_f32_e32 v8, 1.0, v8 +; VI-NEXT: v_add_f32_e32 v7, 1.0, v7 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32 +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] +; VI-NEXT: v_add_f32_e32 v6, 1.0, v6 +; VI-NEXT: v_add_f32_e32 v5, 1.0, v5 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] +; VI-NEXT: v_add_f32_e32 v4, 1.0, v4 +; VI-NEXT: v_add_f32_e32 v3, 1.0, v3 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; VI-NEXT: v_add_f32_e32 v6, 1.0, v6 -; VI-NEXT: v_add_f32_e32 v5, 1.0, v5 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; VI-NEXT: v_add_f32_e32 v4, 1.0, v4 -; VI-NEXT: v_add_f32_e32 v3, 1.0, v3 -; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; VI-NEXT: v_add_f32_e32 v2, 1.0, v2 -; VI-NEXT: v_add_f32_e32 v1, 1.0, v1 -; VI-NEXT: v_add_f32_e32 v8, 1.0, v8 -; VI-NEXT: v_add_f32_e32 v7, 1.0, v7 -; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; VI-NEXT: v_add_f32_e32 v2, 1.0, v2 +; VI-NEXT: v_add_f32_e32 v1, 1.0, v1 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 +; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v32 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v8 ; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v7 ; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7 ; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v5 ; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4 ; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1 +; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v1 ; VI-NEXT: .LBB36_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v55, v57, v41, s4 -; VI-NEXT: v_perm_b32 v1, v1, v48, s4 -; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v55 -; VI-NEXT: v_or_b32_e32 v1, v1, v48 +; VI-NEXT: v_perm_b32 v38, v38, v41, s4 +; VI-NEXT: v_perm_b32 v1, v1, v42, s4 +; VI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 +; VI-NEXT: v_or_b32_e32 v1, v1, v38 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v34, v56, s4 -; VI-NEXT: v_perm_b32 v2, v2, v53, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v2, v56, s4 +; VI-NEXT: v_perm_b32 v2, v39, v47, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v47, v40, s4 -; VI-NEXT: v_perm_b32 v2, v3, v38, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v3, v37, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v55, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; VI-NEXT: v_perm_b32 v2, v46, v45, s4 -; VI-NEXT: v_perm_b32 v1, v4, v52, s4 +; VI-NEXT: v_perm_b32 v1, v4, v54, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v33, v39, s4 -; VI-NEXT: v_perm_b32 v2, v5, v37, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v5, v53, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v36, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v44, v43, s4 -; VI-NEXT: v_perm_b32 v1, v6, v51, s4 +; VI-NEXT: v_perm_b32 v2, v52, v43, s4 +; VI-NEXT: v_perm_b32 v1, v6, v44, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v50, v54, s4 -; VI-NEXT: v_perm_b32 v2, v7, v63, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v7, v63, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v35, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v62, v61, s4 -; VI-NEXT: v_perm_b32 v1, v8, v36, s4 +; VI-NEXT: v_perm_b32 v2, v62, v34, s4 +; VI-NEXT: v_perm_b32 v1, v8, v51, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v9, v49, s4 -; VI-NEXT: v_perm_b32 v1, v60, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v9, v50, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v61, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v59, v58, s4 -; VI-NEXT: v_perm_b32 v1, v10, v35, s4 +; VI-NEXT: v_perm_b32 v2, v49, v33, s4 +; VI-NEXT: v_perm_b32 v1, v10, v60, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v11, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v11, v59, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v48, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v12, v58, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v12, v1, s4 +; VI-NEXT: v_perm_b32 v2, v57, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v13, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v13, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -40834,21 +40915,21 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v15, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v15, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -40857,21 +40938,21 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_perm_b32 v1, v17, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v17, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -40880,21 +40961,20 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v19, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v19, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -40903,8 +40983,8 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -40914,9 +40994,9 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -40925,8 +41005,8 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -40936,9 +41016,9 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -40947,8 +41027,8 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -40958,9 +41038,9 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -40969,8 +41049,8 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -40980,9 +41060,9 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -40991,8 +41071,8 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -41002,9 +41082,9 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -41013,8 +41093,8 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -41024,13 +41104,13 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v1, v32, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v42, s4 +; VI-NEXT: v_perm_b32 v2, v40, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen @@ -41075,389 +41155,419 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr58 ; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; implicit-def: $vgpr49 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr51 -; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr50 -; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; implicit-def: $vgpr45 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr44 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr40 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr53 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr44 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr57 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr49 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr43 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: ; kill: killed $vgpr48 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(23) -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 -; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; kill: killed $vgpr56 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB36_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(24) +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(29) ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v14 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v9 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v9 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v3 +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[29:30] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v3 +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[31:32] +; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[27:28] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v2 +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v2 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[60:61], 24, v[23:24] +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[19:20] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v2 +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[25:26] +; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[17:18] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v16 +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v1 +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[21:22] +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v10 +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v44, v35 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[13:14] +; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; GFX9-NEXT: v_mov_b32_e32 v49, v38 +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[15:16] +; GFX9-NEXT: v_mov_b32_e32 v36, v52 +; GFX9-NEXT: v_mov_b32_e32 v52, v37 +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[5:6] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20] +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v17 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[9:10] +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16] +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; GFX9-NEXT: v_mov_b32_e32 v57, v55 +; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[55:56], 24, v[3:4] +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[1:2] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v10 +; GFX9-NEXT: v_mov_b32_e32 v60, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v1 ; GFX9-NEXT: .LBB36_2: ; %Flow -; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] +; GFX9-NEXT: s_or_saveexec_b64 s[4:5], s[4:5] +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v61, v58 +; GFX9-NEXT: s_xor_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB36_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true ; GFX9-NEXT: v_add_f32_e32 v32, 1.0, v32 -; GFX9-NEXT: s_waitcnt vmcnt(22) +; GFX9-NEXT: s_waitcnt vmcnt(30) ; GFX9-NEXT: v_add_f32_e32 v31, 1.0, v31 +; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] ; GFX9-NEXT: v_add_f32_e32 v30, 1.0, v30 ; GFX9-NEXT: v_add_f32_e32 v29, 1.0, v29 @@ -41483,365 +41593,374 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] -; GFX9-NEXT: v_add_f32_e32 v22, 1.0, v22 -; GFX9-NEXT: v_add_f32_e32 v21, 1.0, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] ; GFX9-NEXT: v_add_f32_e32 v20, 1.0, v20 ; GFX9-NEXT: v_add_f32_e32 v19, 1.0, v19 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] ; GFX9-NEXT: v_add_f32_e32 v18, 1.0, v18 ; GFX9-NEXT: v_add_f32_e32 v17, 1.0, v17 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18] ; GFX9-NEXT: v_add_f32_e32 v16, 1.0, v16 ; GFX9-NEXT: v_add_f32_e32 v15, 1.0, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] ; GFX9-NEXT: v_add_f32_e32 v14, 1.0, v14 ; GFX9-NEXT: v_add_f32_e32 v13, 1.0, v13 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] +; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8 +; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] -; GFX9-NEXT: v_add_f32_e32 v12, 1.0, v12 -; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v11 +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] +; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6 +; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] +; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4 +; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] +; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2 +; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32 +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v6 +; GFX9-NEXT: v_add_f32_e32 v22, 1.0, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v5 +; GFX9-NEXT: v_add_f32_e32 v21, 1.0, v21 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v4 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v4 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v3 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v3 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v2 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v2 ; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6 -; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5 -; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4 -; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3 ; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v9 -; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2 -; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1 -; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1 +; GFX9-NEXT: v_add_f32_e32 v12, 1.0, v12 +; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v11 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v2 +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[21:22] +; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12] +; GFX9-NEXT: v_lshrrev_b64 v[61:62], 24, v[9:10] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 +; GFX9-NEXT: s_waitcnt vmcnt(62) +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v22 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v14 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v8 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v1 ; GFX9-NEXT: .LBB36_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v11, v11, v36, s4 -; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4 -; GFX9-NEXT: v_perm_b32 v34, v38, v39, s4 -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v4, v4, v51, s4 -; GFX9-NEXT: v_perm_b32 v6, v6, v33, s4 -; GFX9-NEXT: v_perm_b32 v33, v50, v54, s4 -; GFX9-NEXT: v_perm_b32 v55, v58, v41, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v59, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v2, v52, s4 -; GFX9-NEXT: v_perm_b32 v37, v37, v53, s4 -; GFX9-NEXT: v_perm_b32 v52, v57, v40, s4 -; GFX9-NEXT: v_perm_b32 v5, v5, v56, s4 -; GFX9-NEXT: v_perm_b32 v7, v7, v47, s4 -; GFX9-NEXT: v_perm_b32 v8, v8, v46, s4 -; GFX9-NEXT: v_perm_b32 v9, v9, v45, s4 -; GFX9-NEXT: v_perm_b32 v10, v10, v44, s4 -; GFX9-NEXT: v_perm_b32 v13, v13, v60, s4 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v35, v36, v35, s4 -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v38, v63, v38, s4 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v15, v15, v39, s4 -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v14, v14, v36, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v16, v16, v39, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v37, s4 +; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v36, v36, v50, s4 -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v39, v39, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v37, v37, v58, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v17, v17, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v18, v18, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v50, v50, v53, s4 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v1, v49, v43, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 +; GFX9-NEXT: v_perm_b32 v2, v37, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v3 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v3, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v1, v48, v62, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v4, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v5 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v5, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v6, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v61, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v7 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v7, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v1, v8, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8 +; GFX9-NEXT: v_perm_b32 v2, v2, v56, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v9 +; GFX9-NEXT: v_perm_b32 v1, v9, v48, s4 +; GFX9-NEXT: v_perm_b32 v2, v33, v61, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10 +; GFX9-NEXT: v_perm_b32 v1, v10, v52, s4 +; GFX9-NEXT: v_perm_b32 v2, v62, v63, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v11 +; GFX9-NEXT: v_perm_b32 v1, v11, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v41, v35, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12 +; GFX9-NEXT: v_perm_b32 v1, v12, v47, s4 +; GFX9-NEXT: v_perm_b32 v2, v45, v60, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v13 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v13, v40, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v50, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v55, v46, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14 +; GFX9-NEXT: v_perm_b32 v1, v14, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v15 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v15, v39, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v36, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16 +; GFX9-NEXT: v_perm_b32 v1, v16, v44, s4 +; GFX9-NEXT: v_perm_b32 v2, v54, v53, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v17 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v17, v34, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v57, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v51, v49, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18 +; GFX9-NEXT: v_perm_b32 v1, v18, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v1 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v20, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v1, v21, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v21, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_perm_b32 v2, v38, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -41850,19 +41969,19 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -41871,19 +41990,19 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -41892,19 +42011,19 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -41913,19 +42032,19 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -41934,13 +42053,14 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload @@ -42337,51 +42457,49 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX11-FAKE16-LABEL: bitcast_v32f32_to_v128i8: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:88 +; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:84 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:84 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:80 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:76 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:72 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:68 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:64 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:60 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:56 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:52 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:48 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:44 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:40 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:36 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:32 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:28 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:24 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:20 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:16 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:16 -; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:12 ; GFX11-FAKE16-NEXT: s_clause 0x2 ; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8 ; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4 ; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73 @@ -42467,6 +42585,7 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr86 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr85 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr83 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr82 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81 @@ -42475,7 +42594,6 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2) ; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v33 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33 @@ -42484,18 +42602,19 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB36_2 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20] ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4] ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32 @@ -42577,10 +42696,9 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v1 ; GFX11-FAKE16-NEXT: .LBB36_2: ; %Flow ; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB36_4 @@ -42697,12 +42815,12 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v1 ; GFX11-FAKE16-NEXT: .LBB36_4: ; %end ; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v39, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004 @@ -42808,27 +42926,26 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112 -; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:12 -; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:16 -; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:20 -; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:24 -; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:28 -; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:32 -; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:36 -; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:40 -; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:44 -; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:48 -; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:52 -; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:56 -; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:60 -; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:64 -; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:68 -; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:72 -; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:76 -; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:80 -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:84 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:88 +; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:84 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 @@ -42930,183 +43047,183 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane ; SI-NEXT: s_cbranch_scc0 .LBB37_3 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_lshr_b32 s4, s45, 24 +; SI-NEXT: s_lshr_b32 s4, s29, 24 ; SI-NEXT: v_writelane_b32 v62, s4, 17 -; SI-NEXT: s_lshr_b32 s4, s47, 24 +; SI-NEXT: s_lshr_b32 s4, s29, 16 ; SI-NEXT: v_writelane_b32 v62, s4, 16 -; SI-NEXT: s_lshr_b32 s4, s57, 24 +; SI-NEXT: s_lshr_b32 s4, s27, 24 ; SI-NEXT: v_writelane_b32 v62, s4, 15 -; SI-NEXT: s_lshr_b32 s4, s57, 16 +; SI-NEXT: s_lshr_b32 s4, s27, 16 ; SI-NEXT: v_writelane_b32 v62, s4, 14 -; SI-NEXT: s_lshr_b32 s4, s59, 24 +; SI-NEXT: s_lshr_b32 s4, s27, 8 ; SI-NEXT: v_writelane_b32 v62, s4, 13 -; SI-NEXT: s_lshr_b32 s4, s59, 16 +; SI-NEXT: s_lshr_b32 s4, s25, 24 ; SI-NEXT: v_writelane_b32 v62, s4, 12 -; SI-NEXT: s_lshr_b32 s4, s59, 8 +; SI-NEXT: s_lshr_b32 s4, s25, 16 ; SI-NEXT: v_writelane_b32 v62, s4, 11 -; SI-NEXT: s_lshr_b32 s4, s61, 24 +; SI-NEXT: s_lshr_b32 s4, s25, 8 ; SI-NEXT: v_writelane_b32 v62, s4, 10 -; SI-NEXT: s_lshr_b32 s4, s61, 16 +; SI-NEXT: s_lshr_b32 s4, s23, 24 ; SI-NEXT: v_writelane_b32 v62, s4, 9 -; SI-NEXT: s_lshr_b32 s4, s61, 8 +; SI-NEXT: s_lshr_b32 s4, s23, 16 ; SI-NEXT: v_writelane_b32 v62, s4, 8 -; SI-NEXT: s_lshr_b32 s4, s63, 24 +; SI-NEXT: s_lshr_b32 s4, s23, 8 ; SI-NEXT: v_writelane_b32 v62, s4, 7 -; SI-NEXT: s_lshr_b32 s4, s63, 16 +; SI-NEXT: s_lshr_b32 s4, s21, 24 ; SI-NEXT: v_writelane_b32 v62, s4, 6 -; SI-NEXT: s_lshr_b32 s4, s63, 8 +; SI-NEXT: s_lshr_b32 s4, s21, 16 ; SI-NEXT: v_writelane_b32 v62, s4, 5 -; SI-NEXT: s_lshr_b32 s4, s73, 24 +; SI-NEXT: s_lshr_b32 s4, s21, 8 ; SI-NEXT: v_writelane_b32 v62, s4, 4 -; SI-NEXT: s_lshr_b32 s4, s73, 16 +; SI-NEXT: s_lshr_b32 s4, s19, 24 ; SI-NEXT: v_writelane_b32 v62, s4, 3 -; SI-NEXT: s_lshr_b32 s4, s73, 8 +; SI-NEXT: s_lshr_b32 s4, s19, 16 ; SI-NEXT: v_writelane_b32 v62, s4, 2 -; SI-NEXT: s_lshr_b32 s4, s75, 24 +; SI-NEXT: s_lshr_b32 s4, s19, 8 ; SI-NEXT: v_writelane_b32 v62, s4, 1 -; SI-NEXT: s_lshr_b32 s4, s75, 16 +; SI-NEXT: s_lshr_b32 s4, s17, 24 ; SI-NEXT: v_writelane_b32 v62, s4, 0 -; SI-NEXT: s_lshr_b32 s4, s75, 8 +; SI-NEXT: s_lshr_b32 s4, s17, 16 ; SI-NEXT: v_writelane_b32 v61, s4, 63 -; SI-NEXT: s_lshr_b32 s4, s77, 24 +; SI-NEXT: s_lshr_b32 s4, s17, 8 ; SI-NEXT: v_writelane_b32 v61, s4, 62 -; SI-NEXT: s_lshr_b32 s4, s77, 16 -; SI-NEXT: v_writelane_b32 v61, s4, 61 -; SI-NEXT: s_lshr_b32 s4, s77, 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 60 -; SI-NEXT: s_lshr_b32 s4, s29, 24 -; SI-NEXT: v_writelane_b32 v61, s4, 59 -; SI-NEXT: s_lshr_b32 s4, s29, 16 +; SI-NEXT: v_writelane_b32 v61, s5, 61 +; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 16 ; SI-NEXT: v_writelane_b32 v61, s4, 58 -; SI-NEXT: s_lshr_b32 s4, s29, 8 -; SI-NEXT: v_writelane_b32 v61, s4, 57 -; SI-NEXT: s_lshr_b32 s4, s27, 24 +; SI-NEXT: v_writelane_b32 v61, s5, 59 +; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 8 ; SI-NEXT: v_writelane_b32 v61, s4, 56 -; SI-NEXT: s_lshr_b32 s4, s27, 16 -; SI-NEXT: v_writelane_b32 v61, s4, 55 -; SI-NEXT: s_lshr_b32 s4, s27, 8 +; SI-NEXT: v_writelane_b32 v61, s5, 57 +; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 54 -; SI-NEXT: s_lshr_b32 s4, s25, 24 -; SI-NEXT: v_writelane_b32 v61, s4, 53 -; SI-NEXT: s_lshr_b32 s4, s25, 16 +; SI-NEXT: v_writelane_b32 v61, s5, 55 +; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 16 ; SI-NEXT: v_writelane_b32 v61, s4, 52 -; SI-NEXT: s_lshr_b32 s4, s25, 8 -; SI-NEXT: v_writelane_b32 v61, s4, 51 -; SI-NEXT: s_lshr_b32 s4, s23, 24 +; SI-NEXT: v_writelane_b32 v61, s5, 53 +; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 8 ; SI-NEXT: v_writelane_b32 v61, s4, 50 -; SI-NEXT: s_lshr_b32 s4, s23, 16 -; SI-NEXT: v_writelane_b32 v61, s4, 49 -; SI-NEXT: s_lshr_b32 s4, s23, 8 +; SI-NEXT: v_writelane_b32 v61, s5, 51 +; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 48 -; SI-NEXT: s_lshr_b32 s4, s21, 24 -; SI-NEXT: v_writelane_b32 v61, s4, 47 -; SI-NEXT: s_lshr_b32 s4, s21, 16 +; SI-NEXT: v_writelane_b32 v61, s5, 49 +; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 16 ; SI-NEXT: v_writelane_b32 v61, s4, 46 -; SI-NEXT: s_lshr_b32 s4, s21, 8 -; SI-NEXT: v_writelane_b32 v61, s4, 45 -; SI-NEXT: s_lshr_b32 s4, s19, 24 +; SI-NEXT: v_writelane_b32 v61, s5, 47 +; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 8 ; SI-NEXT: v_writelane_b32 v61, s4, 44 -; SI-NEXT: s_lshr_b32 s4, s19, 16 -; SI-NEXT: v_writelane_b32 v61, s4, 43 -; SI-NEXT: s_lshr_b32 s4, s19, 8 +; SI-NEXT: v_writelane_b32 v61, s5, 45 +; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 42 -; SI-NEXT: s_lshr_b32 s4, s17, 16 -; SI-NEXT: v_writelane_b32 v61, s4, 41 -; SI-NEXT: s_lshr_b32 s4, s17, 8 +; SI-NEXT: v_writelane_b32 v61, s5, 43 +; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 16 ; SI-NEXT: v_writelane_b32 v61, s4, 40 -; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 24 +; SI-NEXT: v_writelane_b32 v61, s5, 41 +; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 8 ; SI-NEXT: v_writelane_b32 v61, s4, 38 ; SI-NEXT: v_writelane_b32 v61, s5, 39 -; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 36 ; SI-NEXT: v_writelane_b32 v61, s5, 37 -; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 16 ; SI-NEXT: v_writelane_b32 v61, s4, 34 ; SI-NEXT: v_writelane_b32 v61, s5, 35 -; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 24 +; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 8 ; SI-NEXT: v_writelane_b32 v61, s4, 32 ; SI-NEXT: v_writelane_b32 v61, s5, 33 -; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 16 +; SI-NEXT: s_lshr_b64 s[4:5], s[62:63], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 30 ; SI-NEXT: v_writelane_b32 v61, s5, 31 -; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[62:63], 16 ; SI-NEXT: v_writelane_b32 v61, s4, 28 ; SI-NEXT: v_writelane_b32 v61, s5, 29 -; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 24 +; SI-NEXT: s_lshr_b64 s[4:5], s[62:63], 8 ; SI-NEXT: v_writelane_b32 v61, s4, 26 ; SI-NEXT: v_writelane_b32 v61, s5, 27 -; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 16 +; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 24 ; SI-NEXT: v_writelane_b32 v61, s5, 25 -; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 16 ; SI-NEXT: v_writelane_b32 v61, s4, 22 ; SI-NEXT: v_writelane_b32 v61, s5, 23 -; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 24 +; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 8 ; SI-NEXT: v_writelane_b32 v61, s4, 20 ; SI-NEXT: v_writelane_b32 v61, s5, 21 -; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 16 +; SI-NEXT: s_lshr_b64 s[4:5], s[74:75], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 18 ; SI-NEXT: v_writelane_b32 v61, s5, 19 -; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[74:75], 16 ; SI-NEXT: v_writelane_b32 v61, s4, 16 ; SI-NEXT: v_writelane_b32 v61, s5, 17 -; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 24 +; SI-NEXT: s_lshr_b64 s[4:5], s[74:75], 8 ; SI-NEXT: v_writelane_b32 v61, s4, 14 ; SI-NEXT: v_writelane_b32 v61, s5, 15 -; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[76:77], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 12 ; SI-NEXT: v_writelane_b32 v61, s5, 13 -; SI-NEXT: s_lshr_b64 s[4:5], s[62:63], 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[76:77], 16 ; SI-NEXT: v_writelane_b32 v61, s4, 10 ; SI-NEXT: v_writelane_b32 v61, s5, 11 -; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 24 +; SI-NEXT: s_lshr_b64 s[4:5], s[76:77], 8 ; SI-NEXT: v_writelane_b32 v61, s4, 8 ; SI-NEXT: v_writelane_b32 v61, s5, 9 -; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[28:29], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 6 ; SI-NEXT: v_writelane_b32 v61, s5, 7 -; SI-NEXT: s_lshr_b64 s[4:5], s[74:75], 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[28:29], 16 ; SI-NEXT: v_writelane_b32 v61, s4, 4 ; SI-NEXT: v_writelane_b32 v61, s5, 5 -; SI-NEXT: s_lshr_b64 s[4:5], s[76:77], 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[28:29], 8 ; SI-NEXT: v_writelane_b32 v61, s4, 2 ; SI-NEXT: v_writelane_b32 v61, s5, 3 -; SI-NEXT: s_lshr_b64 s[4:5], s[20:21], 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[18:19], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 0 -; SI-NEXT: s_lshr_b32 s79, s45, 16 -; SI-NEXT: s_lshr_b32 s89, s45, 8 -; SI-NEXT: s_lshr_b32 s91, s47, 16 -; SI-NEXT: s_lshr_b32 s78, s47, 8 -; SI-NEXT: s_lshr_b32 s88, s57, 8 -; SI-NEXT: s_lshr_b32 s90, s17, 24 -; SI-NEXT: s_lshr_b64 s[92:93], s[60:61], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[62:63], 24 -; SI-NEXT: s_lshr_b64 s[30:31], s[62:63], 16 -; SI-NEXT: s_lshr_b64 s[34:35], s[72:73], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[74:75], 24 -; SI-NEXT: s_lshr_b64 s[38:39], s[74:75], 16 -; SI-NEXT: s_lshr_b64 s[48:49], s[76:77], 24 -; SI-NEXT: s_lshr_b64 s[50:51], s[76:77], 16 -; SI-NEXT: s_lshr_b64 s[52:53], s[28:29], 24 -; SI-NEXT: s_lshr_b64 s[54:55], s[28:29], 16 -; SI-NEXT: s_lshr_b64 s[64:65], s[28:29], 8 -; SI-NEXT: s_lshr_b64 s[66:67], s[26:27], 24 -; SI-NEXT: s_lshr_b64 s[68:69], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[70:71], s[26:27], 8 +; SI-NEXT: s_lshr_b32 s64, s45, 24 +; SI-NEXT: s_lshr_b32 s48, s45, 16 +; SI-NEXT: s_lshr_b32 s49, s45, 8 +; SI-NEXT: s_lshr_b32 s37, s47, 24 +; SI-NEXT: s_lshr_b32 s39, s47, 16 +; SI-NEXT: s_lshr_b32 s65, s47, 8 +; SI-NEXT: s_lshr_b32 s34, s57, 24 +; SI-NEXT: s_lshr_b32 s36, s57, 16 +; SI-NEXT: s_lshr_b32 s38, s57, 8 +; SI-NEXT: s_lshr_b32 s95, s59, 24 +; SI-NEXT: s_lshr_b32 s31, s59, 16 +; SI-NEXT: s_lshr_b32 s35, s59, 8 +; SI-NEXT: s_lshr_b32 s92, s61, 24 +; SI-NEXT: s_lshr_b32 s94, s61, 16 +; SI-NEXT: s_lshr_b32 s30, s61, 8 +; SI-NEXT: s_lshr_b32 s89, s63, 24 +; SI-NEXT: s_lshr_b32 s91, s63, 16 +; SI-NEXT: s_lshr_b32 s93, s63, 8 +; SI-NEXT: s_lshr_b32 s78, s73, 24 +; SI-NEXT: s_lshr_b32 s88, s73, 16 +; SI-NEXT: s_lshr_b32 s90, s73, 8 +; SI-NEXT: s_lshr_b32 s53, s75, 24 +; SI-NEXT: s_lshr_b32 s55, s75, 16 +; SI-NEXT: s_lshr_b32 s79, s75, 8 +; SI-NEXT: s_lshr_b32 s50, s77, 24 +; SI-NEXT: s_lshr_b32 s52, s77, 16 +; SI-NEXT: s_lshr_b32 s54, s77, 8 +; SI-NEXT: s_lshr_b32 s51, s29, 8 +; SI-NEXT: s_lshr_b64 s[70:71], s[26:27], 24 +; SI-NEXT: s_lshr_b64 s[66:67], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[68:69], s[26:27], 8 ; SI-NEXT: s_lshr_b64 s[80:81], s[24:25], 24 ; SI-NEXT: s_lshr_b64 s[82:83], s[24:25], 16 ; SI-NEXT: s_lshr_b64 s[84:85], s[24:25], 8 ; SI-NEXT: s_lshr_b64 s[86:87], s[22:23], 24 ; SI-NEXT: s_lshr_b64 s[96:97], s[22:23], 16 ; SI-NEXT: s_lshr_b64 s[98:99], s[22:23], 8 -; SI-NEXT: s_lshr_b64 s[40:41], s[20:21], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[20:21], 24 ; SI-NEXT: s_lshr_b64 s[42:43], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[20:21], 8 ; SI-NEXT: v_writelane_b32 v61, s5, 1 -; SI-NEXT: s_lshr_b64 s[8:9], s[18:19], 24 ; SI-NEXT: s_lshr_b64 s[10:11], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[14:15], s[18:19], 8 -; SI-NEXT: s_lshr_b64 s[12:13], s[16:17], 24 -; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[8:9], s[18:19], 8 +; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24 +; SI-NEXT: s_lshr_b64 s[12:13], s[16:17], 16 ; SI-NEXT: s_lshr_b64 s[4:5], s[16:17], 8 ; SI-NEXT: s_cbranch_execnz .LBB37_4 ; SI-NEXT: .LBB37_2: ; %cmp.true @@ -43130,64 +43247,64 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_f32_e64 v1, s45, 1.0 ; SI-NEXT: v_add_f32_e64 v2, s44, 1.0 -; SI-NEXT: v_add_f32_e64 v13, s73, 1.0 +; SI-NEXT: v_add_f32_e64 v15, s75, 1.0 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; SI-NEXT: v_readfirstlane_b32 s44, v2 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v1 -; SI-NEXT: v_add_f32_e64 v15, s75, 1.0 +; SI-NEXT: v_add_f32_e64 v17, s77, 1.0 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v13 +; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v15 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v15 +; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v17 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v15 -; SI-NEXT: v_add_f32_e64 v17, s77, 1.0 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v17 +; SI-NEXT: v_add_f32_e64 v19, s29, 1.0 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v15 +; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v17 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v17 +; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v19 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v17 -; SI-NEXT: v_add_f32_e64 v19, s29, 1.0 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19 +; SI-NEXT: v_add_f32_e64 v21, s27, 1.0 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v17 +; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v19 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v19 +; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v21 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19 -; SI-NEXT: v_add_f32_e64 v21, s27, 1.0 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21 +; SI-NEXT: v_add_f32_e64 v23, s25, 1.0 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v19 +; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v21 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v21 +; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v23 ; SI-NEXT: v_readfirstlane_b32 s45, v1 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21 -; SI-NEXT: v_add_f32_e64 v37, s17, 1.0 -; SI-NEXT: v_add_f32_e64 v38, s16, 1.0 -; SI-NEXT: v_add_f32_e64 v32, s19, 1.0 -; SI-NEXT: v_add_f32_e64 v35, s18, 1.0 -; SI-NEXT: v_add_f32_e64 v28, s21, 1.0 -; SI-NEXT: v_add_f32_e64 v31, s20, 1.0 -; SI-NEXT: v_add_f32_e64 v25, s23, 1.0 -; SI-NEXT: v_add_f32_e64 v26, s22, 1.0 -; SI-NEXT: v_add_f32_e64 v23, s25, 1.0 -; SI-NEXT: v_add_f32_e64 v24, s24, 1.0 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23 +; SI-NEXT: v_add_f32_e64 v48, s17, 1.0 +; SI-NEXT: v_add_f32_e64 v49, s16, 1.0 +; SI-NEXT: v_add_f32_e64 v35, s19, 1.0 +; SI-NEXT: v_add_f32_e64 v38, s18, 1.0 +; SI-NEXT: v_add_f32_e64 v30, s21, 1.0 +; SI-NEXT: v_add_f32_e64 v34, s20, 1.0 +; SI-NEXT: v_add_f32_e64 v28, s23, 1.0 +; SI-NEXT: v_add_f32_e64 v29, s22, 1.0 +; SI-NEXT: v_add_f32_e64 v26, s24, 1.0 ; SI-NEXT: v_add_f32_e64 v18, s76, 1.0 ; SI-NEXT: v_add_f32_e64 v16, s74, 1.0 +; SI-NEXT: v_add_f32_e64 v13, s73, 1.0 ; SI-NEXT: v_add_f32_e64 v14, s72, 1.0 ; SI-NEXT: v_add_f32_e64 v11, s63, 1.0 ; SI-NEXT: v_add_f32_e64 v12, s62, 1.0 @@ -43198,16 +43315,16 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v21 -; SI-NEXT: v_readfirstlane_b32 s16, v38 -; SI-NEXT: v_readfirstlane_b32 s17, v37 -; SI-NEXT: v_readfirstlane_b32 s12, v35 -; SI-NEXT: v_readfirstlane_b32 s13, v32 -; SI-NEXT: v_readfirstlane_b32 s6, v31 -; SI-NEXT: v_readfirstlane_b32 s7, v28 -; SI-NEXT: v_readfirstlane_b32 s4, v26 -; SI-NEXT: v_readfirstlane_b32 s5, v25 -; SI-NEXT: v_readfirstlane_b32 s8, v24 +; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v23 +; SI-NEXT: v_readfirstlane_b32 s16, v49 +; SI-NEXT: v_readfirstlane_b32 s17, v48 +; SI-NEXT: v_readfirstlane_b32 s12, v38 +; SI-NEXT: v_readfirstlane_b32 s13, v35 +; SI-NEXT: v_readfirstlane_b32 s6, v34 +; SI-NEXT: v_readfirstlane_b32 s7, v30 +; SI-NEXT: v_readfirstlane_b32 s4, v29 +; SI-NEXT: v_readfirstlane_b32 s5, v28 +; SI-NEXT: v_readfirstlane_b32 s8, v26 ; SI-NEXT: v_readfirstlane_b32 s9, v23 ; SI-NEXT: v_readfirstlane_b32 s10, v22 ; SI-NEXT: v_readfirstlane_b32 s11, v21 @@ -43226,11 +43343,11 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: v_readfirstlane_b32 s41, v5 ; SI-NEXT: v_readfirstlane_b32 s43, v3 ; SI-NEXT: s_lshr_b64 vcc, s[44:45], 24 -; SI-NEXT: v_writelane_b32 v61, s46, 36 +; SI-NEXT: v_writelane_b32 v61, s46, 58 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v23 -; SI-NEXT: v_writelane_b32 v61, s47, 37 +; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v28 +; SI-NEXT: v_writelane_b32 v61, s47, 59 ; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 8 ; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 24 ; SI-NEXT: s_lshr_b64 s[60:61], s[42:43], 16 @@ -43248,34 +43365,34 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: s_lshr_b64 s[30:31], s[24:25], 16 ; SI-NEXT: s_lshr_b64 s[24:25], s[24:25], 8 ; SI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24 -; SI-NEXT: s_lshr_b64 s[46:47], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[22:23], 16 ; SI-NEXT: s_lshr_b64 s[22:23], s[22:23], 8 -; SI-NEXT: s_lshr_b64 s[36:37], s[20:21], 24 -; SI-NEXT: s_lshr_b64 s[38:39], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[38:39], s[20:21], 24 +; SI-NEXT: s_lshr_b64 s[48:49], s[20:21], 16 ; SI-NEXT: s_lshr_b64 s[20:21], s[20:21], 8 -; SI-NEXT: s_lshr_b64 s[48:49], s[18:19], 24 -; SI-NEXT: s_lshr_b64 s[50:51], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[50:51], s[18:19], 24 +; SI-NEXT: s_lshr_b64 s[52:53], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[18:19], s[18:19], 8 -; SI-NEXT: s_lshr_b64 s[52:53], s[14:15], 24 -; SI-NEXT: s_lshr_b64 s[54:55], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 8 -; SI-NEXT: s_lshr_b64 s[66:67], s[10:11], 24 -; SI-NEXT: s_lshr_b64 s[68:69], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[70:71], s[10:11], 8 +; SI-NEXT: s_lshr_b64 s[54:55], s[14:15], 24 +; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 +; SI-NEXT: s_lshr_b64 s[70:71], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[68:69], s[10:11], 8 ; SI-NEXT: s_lshr_b64 s[80:81], s[8:9], 24 ; SI-NEXT: s_lshr_b64 s[82:83], s[8:9], 16 ; SI-NEXT: s_lshr_b64 s[84:85], s[8:9], 8 ; SI-NEXT: s_lshr_b64 s[86:87], s[4:5], 24 ; SI-NEXT: s_lshr_b64 s[96:97], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[98:99], s[4:5], 8 -; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[6:7], 24 ; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[8:9], s[6:7], 8 -; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 24 -; SI-NEXT: s_lshr_b64 s[10:11], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 8 -; SI-NEXT: s_lshr_b64 s[12:13], s[16:17], 24 -; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 8 +; SI-NEXT: s_lshr_b64 s[10:11], s[12:13], 24 +; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[8:9], s[12:13], 8 +; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24 +; SI-NEXT: s_lshr_b64 s[12:13], s[16:17], 16 ; SI-NEXT: s_lshr_b64 s[4:5], s[16:17], 8 ; SI-NEXT: s_mov_b32 s16, vcc_lo ; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v1 @@ -43291,343 +43408,303 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v58, 8, v7 ; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v9 ; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v27, 8, v9 -; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v11 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v13 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v24, 8, v9 +; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v11 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v11 +; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v13 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v36, 8, v13 +; SI-NEXT: v_lshrrev_b32_e32 v37, 24, v15 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v15 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v39, 8, v23 -; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v25 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v25 -; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v28 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v28 -; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v28 -; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v32 -; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v32 -; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v32 -; SI-NEXT: v_lshrrev_b32_e32 v10, 24, v37 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v37 -; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v37 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v28 +; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v28 +; SI-NEXT: v_lshrrev_b32_e32 v51, 24, v30 +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v30 +; SI-NEXT: v_lshrrev_b32_e32 v52, 8, v30 +; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v35 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v35 +; SI-NEXT: v_lshrrev_b32_e32 v54, 8, v35 +; SI-NEXT: v_lshrrev_b32_e32 v8, 24, v48 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v48 +; SI-NEXT: v_lshrrev_b32_e32 v10, 8, v48 ; SI-NEXT: s_branch .LBB37_5 ; SI-NEXT: .LBB37_3: -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr91 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s8, 0 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s9, 1 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 2 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s91, 3 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr78 -; SI-NEXT: ; implicit-def: $sgpr89 -; SI-NEXT: ; implicit-def: $sgpr79 -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr42 ; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr98 ; SI-NEXT: ; implicit-def: $sgpr96 ; SI-NEXT: ; implicit-def: $sgpr86 ; SI-NEXT: ; implicit-def: $sgpr84 ; SI-NEXT: ; implicit-def: $sgpr82 ; SI-NEXT: ; implicit-def: $sgpr80 -; SI-NEXT: ; implicit-def: $sgpr70 ; SI-NEXT: ; implicit-def: $sgpr68 ; SI-NEXT: ; implicit-def: $sgpr66 -; SI-NEXT: ; implicit-def: $sgpr64 +; SI-NEXT: ; implicit-def: $sgpr70 +; SI-NEXT: ; implicit-def: $sgpr51 ; SI-NEXT: ; implicit-def: $sgpr54 ; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; implicit-def: $sgpr55 +; SI-NEXT: ; implicit-def: $sgpr53 +; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr91 +; SI-NEXT: ; implicit-def: $sgpr89 +; SI-NEXT: ; implicit-def: $sgpr30 +; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr35 +; SI-NEXT: ; implicit-def: $sgpr31 +; SI-NEXT: ; implicit-def: $sgpr95 ; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: ; implicit-def: $sgpr36 ; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr30 -; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr65 +; SI-NEXT: ; implicit-def: $sgpr39 +; SI-NEXT: ; implicit-def: $sgpr37 +; SI-NEXT: ; implicit-def: $sgpr49 +; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; implicit-def: $sgpr64 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: v_writelane_b32 v61, s10, 0 +; SI-NEXT: v_writelane_b32 v61, s11, 1 +; SI-NEXT: v_writelane_b32 v61, s78, 2 +; SI-NEXT: v_writelane_b32 v61, s79, 3 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: v_writelane_b32 v61, s78, 4 +; SI-NEXT: v_writelane_b32 v61, s79, 5 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: v_writelane_b32 v61, s78, 6 +; SI-NEXT: v_writelane_b32 v61, s79, 7 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: v_writelane_b32 v61, s78, 8 +; SI-NEXT: v_writelane_b32 v61, s79, 9 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: v_writelane_b32 v61, s78, 10 +; SI-NEXT: v_writelane_b32 v61, s79, 11 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: v_writelane_b32 v61, s78, 12 +; SI-NEXT: v_writelane_b32 v61, s79, 13 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: v_writelane_b32 v61, s78, 14 +; SI-NEXT: v_writelane_b32 v61, s79, 15 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: v_writelane_b32 v61, s78, 16 +; SI-NEXT: v_writelane_b32 v61, s79, 17 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: v_writelane_b32 v61, s78, 18 +; SI-NEXT: v_writelane_b32 v61, s79, 19 +; SI-NEXT: ; implicit-def: $sgpr79 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: v_writelane_b32 v61, s78, 20 +; SI-NEXT: v_writelane_b32 v61, s79, 21 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: v_writelane_b32 v61, s78, 22 +; SI-NEXT: v_writelane_b32 v61, s79, 23 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: v_writelane_b32 v61, s78, 24 +; SI-NEXT: v_writelane_b32 v61, s79, 25 +; SI-NEXT: v_writelane_b32 v61, s92, 26 +; SI-NEXT: v_writelane_b32 v61, s93, 27 ; SI-NEXT: ; implicit-def: $sgpr92 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s91, 5 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 6 -; SI-NEXT: v_writelane_b32 v61, s91, 7 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 8 -; SI-NEXT: v_writelane_b32 v61, s91, 9 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 10 -; SI-NEXT: v_writelane_b32 v61, s91, 11 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 12 -; SI-NEXT: v_writelane_b32 v61, s91, 13 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 14 -; SI-NEXT: v_writelane_b32 v61, s91, 15 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 16 -; SI-NEXT: v_writelane_b32 v61, s91, 17 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 18 -; SI-NEXT: v_writelane_b32 v61, s91, 19 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 20 -; SI-NEXT: v_writelane_b32 v61, s91, 21 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 22 -; SI-NEXT: v_writelane_b32 v61, s91, 23 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 24 -; SI-NEXT: v_writelane_b32 v61, s91, 25 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 26 -; SI-NEXT: v_writelane_b32 v61, s91, 27 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 28 -; SI-NEXT: v_writelane_b32 v61, s91, 29 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 30 -; SI-NEXT: v_writelane_b32 v61, s91, 31 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 32 -; SI-NEXT: v_writelane_b32 v61, s91, 33 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 34 -; SI-NEXT: v_writelane_b32 v61, s91, 35 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 36 -; SI-NEXT: v_writelane_b32 v61, s91, 37 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s90, 38 -; SI-NEXT: v_writelane_b32 v61, s91, 39 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: v_writelane_b32 v61, s92, 28 +; SI-NEXT: v_writelane_b32 v61, s93, 29 +; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: v_writelane_b32 v61, s92, 30 +; SI-NEXT: v_writelane_b32 v61, s93, 31 +; SI-NEXT: ; implicit-def: $sgpr93 +; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: v_writelane_b32 v61, s92, 32 +; SI-NEXT: v_writelane_b32 v61, s93, 33 +; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: v_writelane_b32 v61, s92, 34 +; SI-NEXT: v_writelane_b32 v61, s93, 35 +; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: v_writelane_b32 v61, s92, 36 +; SI-NEXT: v_writelane_b32 v61, s93, 37 +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 38 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 39 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 40 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 41 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 42 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 43 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 44 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 45 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 46 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 47 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 48 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 49 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 50 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 51 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 52 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 53 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 54 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 55 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 56 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 57 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 58 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 59 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v61, vcc_lo, 60 +; SI-NEXT: v_writelane_b32 v61, vcc_hi, 61 ; SI-NEXT: s_branch .LBB37_2 ; SI-NEXT: .LBB37_4: ; SI-NEXT: v_mov_b32_e32 v1, s16 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: v_readlane_b32 s5, v61, 40 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_readlane_b32 s5, v61, 62 +; SI-NEXT: v_mov_b32_e32 v10, s5 +; SI-NEXT: v_readlane_b32 s5, v61, 63 ; SI-NEXT: v_mov_b32_e32 v55, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 41 +; SI-NEXT: v_readlane_b32 s5, v62, 0 +; SI-NEXT: v_mov_b32_e32 v8, s5 +; SI-NEXT: v_readlane_b32 s5, v62, 1 ; SI-NEXT: v_mov_b32_e32 v54, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 42 +; SI-NEXT: v_readlane_b32 s5, v62, 2 ; SI-NEXT: v_mov_b32_e32 v53, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 43 -; SI-NEXT: v_mov_b32_e32 v8, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 44 +; SI-NEXT: v_readlane_b32 s5, v62, 3 +; SI-NEXT: v_mov_b32_e32 v6, s5 +; SI-NEXT: v_readlane_b32 s5, v62, 4 ; SI-NEXT: v_mov_b32_e32 v52, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 45 +; SI-NEXT: v_readlane_b32 s5, v62, 5 +; SI-NEXT: v_mov_b32_e32 v4, s5 +; SI-NEXT: v_readlane_b32 s5, v62, 6 ; SI-NEXT: v_mov_b32_e32 v51, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 46 +; SI-NEXT: v_readlane_b32 s5, v62, 7 ; SI-NEXT: v_mov_b32_e32 v50, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 47 -; SI-NEXT: v_mov_b32_e32 v6, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 48 -; SI-NEXT: v_mov_b32_e32 v4, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 49 -; SI-NEXT: v_mov_b32_e32 v49, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 50 -; SI-NEXT: v_mov_b32_e32 v48, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 51 -; SI-NEXT: v_mov_b32_e32 v39, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 52 +; SI-NEXT: v_readlane_b32 s5, v62, 8 ; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 53 +; SI-NEXT: v_readlane_b32 s5, v62, 9 ; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 54 +; SI-NEXT: v_readlane_b32 s5, v62, 10 ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 55 +; SI-NEXT: v_readlane_b32 s5, v62, 11 ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 56 +; SI-NEXT: v_readlane_b32 s5, v62, 12 ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 57 +; SI-NEXT: v_readlane_b32 s5, v62, 13 ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 58 +; SI-NEXT: v_readlane_b32 s5, v62, 14 ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 59 +; SI-NEXT: v_readlane_b32 s5, v62, 15 ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 60 ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 61 +; SI-NEXT: v_mov_b32_e32 v12, s51 +; SI-NEXT: v_readlane_b32 s5, v62, 16 ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 62 +; SI-NEXT: v_readlane_b32 s5, v62, 17 +; SI-NEXT: v_mov_b32_e32 v1, s60 ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v61, 63 -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 0 -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 1 -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 2 -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 3 -; SI-NEXT: v_mov_b32_e32 v36, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 4 -; SI-NEXT: v_mov_b32_e32 v34, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 5 -; SI-NEXT: v_mov_b32_e32 v33, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 6 -; SI-NEXT: v_mov_b32_e32 v30, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 7 -; SI-NEXT: v_mov_b32_e32 v29, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 8 -; SI-NEXT: v_mov_b32_e32 v27, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 9 -; SI-NEXT: v_mov_b32_e32 v60, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 10 -; SI-NEXT: v_mov_b32_e32 v59, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 11 -; SI-NEXT: v_mov_b32_e32 v58, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 12 -; SI-NEXT: v_mov_b32_e32 v57, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 13 -; SI-NEXT: v_mov_b32_e32 v1, s60 -; SI-NEXT: v_mov_b32_e32 v56, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 14 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v1, s58 -; SI-NEXT: v_mov_b32_e32 v46, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 15 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v12, s54 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v1, s56 -; SI-NEXT: v_mov_b32_e32 v45, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 16 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v12, s52 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v1, s46 -; SI-NEXT: v_mov_b32_e32 v42, s5 -; SI-NEXT: v_readlane_b32 s5, v62, 17 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v12, s50 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: v_mov_b32_e32 v3, s47 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v1, s44 -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v12, s5 -; SI-NEXT: v_readlane_b32 s46, v61, 38 -; SI-NEXT: v_mov_b32_e32 v32, s19 -; SI-NEXT: v_mov_b32_e32 v28, s21 -; SI-NEXT: v_mov_b32_e32 v25, s23 +; SI-NEXT: v_mov_b32_e32 v12, s79 +; SI-NEXT: v_mov_b32_e32 v40, s64 +; SI-NEXT: v_readlane_b32 s46, v61, 60 +; SI-NEXT: v_mov_b32_e32 v35, s19 +; SI-NEXT: v_mov_b32_e32 v30, s21 +; SI-NEXT: v_mov_b32_e32 v28, s23 ; SI-NEXT: v_mov_b32_e32 v23, s25 ; SI-NEXT: v_mov_b32_e32 v21, s27 ; SI-NEXT: v_mov_b32_e32 v19, s29 @@ -43640,184 +43717,199 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v1, s45 -; SI-NEXT: v_mov_b32_e32 v10, s90 -; SI-NEXT: v_mov_b32_e32 v47, s88 -; SI-NEXT: v_mov_b32_e32 v44, s78 -; SI-NEXT: v_mov_b32_e32 v43, s91 -; SI-NEXT: v_mov_b32_e32 v41, s89 -; SI-NEXT: v_mov_b32_e32 v40, s79 -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v39, s55 +; SI-NEXT: v_mov_b32_e32 v37, s53 +; SI-NEXT: v_mov_b32_e32 v36, s90 +; SI-NEXT: v_mov_b32_e32 v33, s88 +; SI-NEXT: v_mov_b32_e32 v32, s78 +; SI-NEXT: v_mov_b32_e32 v31, s93 +; SI-NEXT: v_mov_b32_e32 v27, s91 +; SI-NEXT: v_mov_b32_e32 v25, s89 +; SI-NEXT: v_mov_b32_e32 v24, s30 +; SI-NEXT: v_mov_b32_e32 v60, s94 +; SI-NEXT: v_mov_b32_e32 v59, s92 +; SI-NEXT: v_mov_b32_e32 v58, s35 +; SI-NEXT: v_mov_b32_e32 v57, s31 +; SI-NEXT: v_mov_b32_e32 v56, s95 +; SI-NEXT: v_mov_b32_e32 v47, s38 +; SI-NEXT: v_mov_b32_e32 v46, s36 +; SI-NEXT: v_mov_b32_e32 v45, s34 +; SI-NEXT: v_mov_b32_e32 v44, s65 +; SI-NEXT: v_mov_b32_e32 v43, s39 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v40, s48 +; SI-NEXT: v_mov_b32_e32 v41, s49 +; SI-NEXT: v_mov_b32_e32 v42, s37 ; SI-NEXT: v_mov_b32_e32 v12, s62 ; SI-NEXT: v_mov_b32_e32 v14, s72 ; SI-NEXT: v_mov_b32_e32 v16, s74 ; SI-NEXT: v_mov_b32_e32 v18, s76 ; SI-NEXT: v_mov_b32_e32 v20, s28 ; SI-NEXT: v_mov_b32_e32 v22, s26 -; SI-NEXT: v_mov_b32_e32 v24, s24 -; SI-NEXT: v_mov_b32_e32 v26, s22 -; SI-NEXT: v_mov_b32_e32 v31, s20 -; SI-NEXT: v_mov_b32_e32 v35, s18 +; SI-NEXT: v_mov_b32_e32 v26, s24 +; SI-NEXT: v_mov_b32_e32 v29, s22 +; SI-NEXT: v_mov_b32_e32 v34, s20 +; SI-NEXT: v_mov_b32_e32 v38, s18 ; SI-NEXT: s_mov_b32 s16, s46 -; SI-NEXT: v_readlane_b32 s44, v61, 34 -; SI-NEXT: v_readlane_b32 s58, v61, 32 -; SI-NEXT: v_readlane_b32 s60, v61, 30 -; SI-NEXT: v_readlane_b32 s62, v61, 28 -; SI-NEXT: v_readlane_b32 s72, v61, 26 -; SI-NEXT: v_readlane_b32 s74, v61, 24 -; SI-NEXT: v_readlane_b32 s76, v61, 22 -; SI-NEXT: v_readlane_b32 s78, v61, 20 -; SI-NEXT: v_readlane_b32 s88, v61, 18 -; SI-NEXT: v_readlane_b32 s28, v61, 16 -; SI-NEXT: v_readlane_b32 s90, v61, 14 -; SI-NEXT: v_readlane_b32 s26, v61, 12 -; SI-NEXT: v_readlane_b32 s24, v61, 10 -; SI-NEXT: v_readlane_b32 s22, v61, 6 -; SI-NEXT: s_mov_b32 s46, s34 -; SI-NEXT: v_readlane_b32 s34, v61, 8 -; SI-NEXT: v_readlane_b32 s20, v61, 4 -; SI-NEXT: v_readlane_b32 s18, v61, 2 -; SI-NEXT: s_mov_b32 s56, s8 -; SI-NEXT: v_readlane_b32 s8, v61, 0 -; SI-NEXT: v_mov_b32_e32 v37, s17 +; SI-NEXT: v_readlane_b32 s44, v61, 56 +; SI-NEXT: v_readlane_b32 s58, v61, 54 +; SI-NEXT: v_readlane_b32 s60, v61, 52 +; SI-NEXT: v_readlane_b32 s62, v61, 50 +; SI-NEXT: v_readlane_b32 s72, v61, 48 +; SI-NEXT: v_readlane_b32 s74, v61, 46 +; SI-NEXT: v_readlane_b32 s76, v61, 44 +; SI-NEXT: v_readlane_b32 s78, v61, 42 +; SI-NEXT: v_readlane_b32 s88, v61, 40 +; SI-NEXT: v_readlane_b32 s28, v61, 38 +; SI-NEXT: v_readlane_b32 s90, v61, 36 +; SI-NEXT: v_readlane_b32 s92, v61, 34 +; SI-NEXT: v_readlane_b32 s26, v61, 32 +; SI-NEXT: v_readlane_b32 s94, v61, 30 +; SI-NEXT: v_readlane_b32 s30, v61, 28 +; SI-NEXT: v_readlane_b32 s24, v61, 26 +; SI-NEXT: v_readlane_b32 s34, v61, 24 +; SI-NEXT: v_readlane_b32 s36, v61, 22 +; SI-NEXT: v_readlane_b32 s22, v61, 20 +; SI-NEXT: v_readlane_b32 s38, v61, 18 +; SI-NEXT: v_readlane_b32 s48, v61, 16 +; SI-NEXT: v_readlane_b32 s20, v61, 14 +; SI-NEXT: v_readlane_b32 s50, v61, 12 +; SI-NEXT: v_readlane_b32 s52, v61, 10 +; SI-NEXT: v_readlane_b32 s18, v61, 8 +; SI-NEXT: v_readlane_b32 s54, v61, 6 +; SI-NEXT: v_readlane_b32 s64, v61, 4 +; SI-NEXT: s_mov_b32 s46, s70 +; SI-NEXT: s_mov_b32 s70, s66 +; SI-NEXT: v_readlane_b32 s66, v61, 2 +; SI-NEXT: s_mov_b32 s56, s10 +; SI-NEXT: v_readlane_b32 s10, v61, 0 +; SI-NEXT: v_mov_b32_e32 v48, s17 ; SI-NEXT: v_mov_b32_e32 v5, s57 -; SI-NEXT: v_readlane_b32 s47, v61, 39 -; SI-NEXT: v_readlane_b32 s45, v61, 35 -; SI-NEXT: v_readlane_b32 s59, v61, 33 -; SI-NEXT: v_readlane_b32 s61, v61, 31 -; SI-NEXT: v_readlane_b32 s63, v61, 29 -; SI-NEXT: v_readlane_b32 s73, v61, 27 -; SI-NEXT: v_readlane_b32 s75, v61, 25 -; SI-NEXT: v_readlane_b32 s77, v61, 23 -; SI-NEXT: v_readlane_b32 s79, v61, 21 -; SI-NEXT: v_readlane_b32 s89, v61, 19 -; SI-NEXT: v_readlane_b32 s29, v61, 17 -; SI-NEXT: v_readlane_b32 s91, v61, 15 -; SI-NEXT: v_readlane_b32 s27, v61, 13 -; SI-NEXT: v_readlane_b32 s25, v61, 11 -; SI-NEXT: v_readlane_b32 s23, v61, 7 -; SI-NEXT: v_readlane_b32 s35, v61, 9 -; SI-NEXT: v_readlane_b32 s21, v61, 5 -; SI-NEXT: v_readlane_b32 s19, v61, 3 -; SI-NEXT: v_readlane_b32 s9, v61, 1 +; SI-NEXT: v_readlane_b32 s47, v61, 61 +; SI-NEXT: v_readlane_b32 s45, v61, 57 +; SI-NEXT: v_readlane_b32 s59, v61, 55 +; SI-NEXT: v_readlane_b32 s61, v61, 53 +; SI-NEXT: v_readlane_b32 s63, v61, 51 +; SI-NEXT: v_readlane_b32 s73, v61, 49 +; SI-NEXT: v_readlane_b32 s75, v61, 47 +; SI-NEXT: v_readlane_b32 s77, v61, 45 +; SI-NEXT: v_readlane_b32 s79, v61, 43 +; SI-NEXT: v_readlane_b32 s89, v61, 41 +; SI-NEXT: v_readlane_b32 s29, v61, 39 +; SI-NEXT: v_readlane_b32 s91, v61, 37 +; SI-NEXT: v_readlane_b32 s93, v61, 35 +; SI-NEXT: v_readlane_b32 s27, v61, 33 +; SI-NEXT: v_readlane_b32 s95, v61, 31 +; SI-NEXT: v_readlane_b32 s31, v61, 29 +; SI-NEXT: v_readlane_b32 s25, v61, 27 +; SI-NEXT: v_readlane_b32 s35, v61, 25 +; SI-NEXT: v_readlane_b32 s37, v61, 23 +; SI-NEXT: v_readlane_b32 s23, v61, 21 +; SI-NEXT: v_readlane_b32 s39, v61, 19 +; SI-NEXT: v_readlane_b32 s49, v61, 17 +; SI-NEXT: v_readlane_b32 s21, v61, 15 +; SI-NEXT: v_readlane_b32 s51, v61, 13 +; SI-NEXT: v_readlane_b32 s53, v61, 11 +; SI-NEXT: v_readlane_b32 s19, v61, 9 +; SI-NEXT: v_readlane_b32 s55, v61, 7 +; SI-NEXT: v_readlane_b32 s65, v61, 5 +; SI-NEXT: v_readlane_b32 s67, v61, 3 +; SI-NEXT: v_readlane_b32 s11, v61, 1 ; SI-NEXT: .LBB37_5: ; %end ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_and_b32_e32 v38, 0xff, v38 +; SI-NEXT: v_and_b32_e32 v49, 0xff, v49 ; SI-NEXT: s_lshl_b32 s5, s4, 8 -; SI-NEXT: v_or_b32_e32 v38, s5, v38 -; SI-NEXT: s_and_b32 s5, s6, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s12, 24 -; SI-NEXT: v_and_b32_e32 v38, 0xffff, v38 -; SI-NEXT: s_or_b32 s5, s7, s5 -; SI-NEXT: v_or_b32_e32 v38, s5, v38 -; SI-NEXT: buffer_store_dword v38, v0, s[0:3], 0 offen -; SI-NEXT: v_and_b32_e32 v37, 0xff, v37 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v55 -; SI-NEXT: v_or_b32_e32 v37, v37, v38 -; SI-NEXT: v_and_b32_e32 v38, 0xff, v54 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 -; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 -; SI-NEXT: v_or_b32_e32 v10, v10, v38 -; SI-NEXT: v_and_b32_e32 v37, 0xffff, v37 -; SI-NEXT: v_or_b32_e32 v10, v37, v10 -; SI-NEXT: v_add_i32_e32 v37, vcc, 4, v0 -; SI-NEXT: buffer_store_dword v10, v37, s[0:3], 0 offen -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v10, 0xff, v35 -; SI-NEXT: s_lshl_b32 s5, s14, 8 -; SI-NEXT: v_or_b32_e32 v10, s5, v10 -; SI-NEXT: s_and_b32 s5, s10, 0xff +; SI-NEXT: v_and_b32_e32 v48, 0xff, v48 +; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10 +; SI-NEXT: v_or_b32_e32 v49, s5, v49 +; SI-NEXT: s_and_b32 s5, s12, 0xff +; SI-NEXT: v_or_b32_e32 v10, v48, v10 +; SI-NEXT: v_and_b32_e32 v48, 0xff, v55 ; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s56, 24 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: s_lshl_b32 s7, s6, 24 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v8 +; SI-NEXT: v_and_b32_e32 v49, 0xffff, v49 ; SI-NEXT: s_or_b32 s5, s7, s5 -; SI-NEXT: v_or_b32_e32 v10, s5, v10 -; SI-NEXT: v_add_i32_e32 v35, vcc, 8, v0 -; SI-NEXT: buffer_store_dword v10, v35, s[0:3], 0 offen -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v10, 0xff, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 8, v53 -; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_or_b32_e32 v10, v10, v32 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v52 -; SI-NEXT: v_or_b32_e32 v8, v32, v8 +; SI-NEXT: v_or_b32_e32 v8, v8, v48 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_or_b32_e32 v49, s5, v49 ; SI-NEXT: v_or_b32_e32 v8, v10, v8 -; SI-NEXT: v_add_i32_e32 v10, vcc, 12, v0 +; SI-NEXT: v_add_i32_e32 v10, vcc, 4, v0 +; SI-NEXT: buffer_store_dword v49, v0, s[0:3], 0 offen ; SI-NEXT: buffer_store_dword v8, v10, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v8, 0xff, v31 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v38 ; SI-NEXT: s_lshl_b32 s5, s8, 8 -; SI-NEXT: s_and_b32 s4, s42, 0xff ; SI-NEXT: v_or_b32_e32 v8, s5, v8 -; SI-NEXT: s_lshl_b32 s4, s4, 16 -; SI-NEXT: s_lshl_b32 s5, s40, 24 +; SI-NEXT: s_and_b32 s5, s56, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s7, s10, 24 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: v_or_b32_e32 v8, s4, v8 -; SI-NEXT: v_add_i32_e32 v10, vcc, 16, v0 +; SI-NEXT: s_or_b32 s5, s7, s5 +; SI-NEXT: v_or_b32_e32 v8, s5, v8 +; SI-NEXT: v_add_i32_e32 v10, vcc, 8, v0 ; SI-NEXT: buffer_store_dword v8, v10, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v8, 0xff, v28 -; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v51 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v35 +; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v54 ; SI-NEXT: v_or_b32_e32 v8, v8, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xff, v50 +; SI-NEXT: v_and_b32_e32 v10, 0xff, v53 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6 ; SI-NEXT: v_or_b32_e32 v6, v6, v10 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v6, v8, v6 -; SI-NEXT: v_add_i32_e32 v8, vcc, 20, v0 +; SI-NEXT: v_add_i32_e32 v8, vcc, 12, v0 ; SI-NEXT: buffer_store_dword v6, v8, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v26 -; SI-NEXT: s_lshl_b32 s4, s98, 8 -; SI-NEXT: v_or_b32_e32 v6, s4, v6 -; SI-NEXT: s_and_b32 s4, s96, 0xff +; SI-NEXT: v_and_b32_e32 v6, 0xff, v34 +; SI-NEXT: s_lshl_b32 s5, s40, 8 +; SI-NEXT: s_and_b32 s4, s42, 0xff +; SI-NEXT: v_or_b32_e32 v6, s5, v6 ; SI-NEXT: s_lshl_b32 s4, s4, 16 -; SI-NEXT: s_lshl_b32 s5, s86, 24 +; SI-NEXT: s_lshl_b32 s5, s14, 24 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: v_or_b32_e32 v6, s4, v6 -; SI-NEXT: v_add_i32_e32 v8, vcc, 24, v0 +; SI-NEXT: v_add_i32_e32 v8, vcc, 16, v0 ; SI-NEXT: buffer_store_dword v6, v8, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v25 -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4 +; SI-NEXT: v_and_b32_e32 v6, 0xff, v30 +; SI-NEXT: v_lshlrev_b32_e32 v8, 8, v52 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v51 +; SI-NEXT: v_or_b32_e32 v4, v8, v4 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v4, v6, v4 -; SI-NEXT: v_and_b32_e32 v6, 0xff, v49 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v48 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_or_b32_e32 v4, v4, v6 -; SI-NEXT: v_add_i32_e32 v6, vcc, 28, v0 +; SI-NEXT: v_add_i32_e32 v6, vcc, 20, v0 ; SI-NEXT: buffer_store_dword v4, v6, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v4, 0xff, v24 -; SI-NEXT: s_lshl_b32 s4, s84, 8 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v29 +; SI-NEXT: s_lshl_b32 s4, s98, 8 ; SI-NEXT: v_or_b32_e32 v4, s4, v4 -; SI-NEXT: s_and_b32 s4, s82, 0xff +; SI-NEXT: s_and_b32 s4, s96, 0xff ; SI-NEXT: s_lshl_b32 s4, s4, 16 -; SI-NEXT: s_lshl_b32 s5, s80, 24 +; SI-NEXT: s_lshl_b32 s5, s86, 24 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: v_or_b32_e32 v4, s4, v4 -; SI-NEXT: v_add_i32_e32 v6, vcc, 32, v0 +; SI-NEXT: v_add_i32_e32 v6, vcc, 24, v0 ; SI-NEXT: buffer_store_dword v4, v6, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v4, 0xff, v23 -; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v39 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v28 +; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v50 ; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: s_lshl_b32 s4, s70, 8 -; SI-NEXT: s_lshl_b32 s5, s66, 24 +; SI-NEXT: s_lshl_b32 s4, s84, 8 +; SI-NEXT: s_lshl_b32 s5, s80, 24 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_readlane_b32 s99, v63, 33 ; SI-NEXT: v_readlane_b32 s98, v63, 32 @@ -43828,14 +43920,11 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: v_readlane_b32 s85, v63, 27 ; SI-NEXT: v_readlane_b32 s84, v63, 26 ; SI-NEXT: v_readlane_b32 s83, v63, 25 -; SI-NEXT: v_readlane_b32 s82, v63, 24 ; SI-NEXT: v_readlane_b32 s81, v63, 23 ; SI-NEXT: v_readlane_b32 s80, v63, 22 ; SI-NEXT: v_readlane_b32 s71, v63, 21 -; SI-NEXT: v_readlane_b32 s70, v63, 20 ; SI-NEXT: v_readlane_b32 s69, v63, 19 ; SI-NEXT: v_readlane_b32 s67, v63, 17 -; SI-NEXT: v_readlane_b32 s66, v63, 16 ; SI-NEXT: v_readlane_b32 s65, v63, 15 ; SI-NEXT: v_readlane_b32 s55, v63, 13 ; SI-NEXT: v_readlane_b32 s53, v63, 11 @@ -43848,26 +43937,25 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6 ; SI-NEXT: v_or_b32_e32 v2, v6, v2 ; SI-NEXT: v_or_b32_e32 v2, v4, v2 -; SI-NEXT: v_add_i32_e32 v4, vcc, 36, v0 +; SI-NEXT: v_add_i32_e32 v4, vcc, 28, v0 ; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xff, v22 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v26 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 -; SI-NEXT: s_and_b32 s4, s68, 0xff +; SI-NEXT: s_and_b32 s4, s82, 0xff ; SI-NEXT: s_lshl_b32 s4, s4, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 -; SI-NEXT: v_add_i32_e32 v4, vcc, 40, v0 +; SI-NEXT: v_add_i32_e32 v4, vcc, 32, v0 ; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xff, v21 -; SI-NEXT: s_lshl_b32 s4, s64, 8 -; SI-NEXT: s_lshl_b32 s5, s52, 24 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v23 +; SI-NEXT: s_lshl_b32 s4, s68, 8 +; SI-NEXT: s_lshl_b32 s5, s46, 24 +; SI-NEXT: v_readlane_b32 s82, v63, 24 ; SI-NEXT: v_readlane_b32 s68, v63, 18 -; SI-NEXT: v_readlane_b32 s64, v63, 14 -; SI-NEXT: v_readlane_b32 s52, v63, 10 ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4 @@ -43881,30 +43969,63 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 +; SI-NEXT: v_add_i32_e32 v4, vcc, 36, v0 +; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v2, 0xff, v22 +; SI-NEXT: v_or_b32_e32 v2, s4, v2 +; SI-NEXT: s_and_b32 s4, s70, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_or_b32_e32 v2, s4, v2 +; SI-NEXT: v_add_i32_e32 v4, vcc, 40, v0 +; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v2, 0xff, v21 +; SI-NEXT: s_lshl_b32 s4, s66, 8 +; SI-NEXT: s_lshl_b32 s5, s54, 24 +; SI-NEXT: v_readlane_b32 s70, v63, 20 +; SI-NEXT: v_readlane_b32 s66, v63, 16 +; SI-NEXT: v_readlane_b32 s54, v63, 12 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, 44, v0 ; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v20 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 -; SI-NEXT: s_and_b32 s4, s54, 0xff +; SI-NEXT: s_and_b32 s4, s64, 0xff ; SI-NEXT: s_lshl_b32 s4, s4, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 ; SI-NEXT: v_add_i32_e32 v4, vcc, 48, v0 ; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v19 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: s_lshl_b32 s4, s18, 8 -; SI-NEXT: s_lshl_b32 s5, s48, 24 -; SI-NEXT: v_readlane_b32 s54, v63, 12 -; SI-NEXT: v_readlane_b32 s48, v63, 6 +; SI-NEXT: s_lshl_b32 s5, s50, 24 +; SI-NEXT: v_readlane_b32 s64, v63, 14 +; SI-NEXT: v_readlane_b32 s50, v63, 8 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 @@ -43918,25 +44039,25 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v18 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 -; SI-NEXT: s_and_b32 s4, s50, 0xff +; SI-NEXT: s_and_b32 s4, s52, 0xff ; SI-NEXT: s_lshl_b32 s4, s4, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 ; SI-NEXT: v_add_i32_e32 v4, vcc, 56, v0 ; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v17 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: s_lshl_b32 s4, s20, 8 -; SI-NEXT: s_lshl_b32 s5, s36, 24 -; SI-NEXT: v_readlane_b32 s50, v63, 8 -; SI-NEXT: v_readlane_b32 s36, v63, 2 +; SI-NEXT: s_lshl_b32 s5, s38, 24 +; SI-NEXT: v_readlane_b32 s52, v63, 10 +; SI-NEXT: v_readlane_b32 s38, v63, 4 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 @@ -43950,31 +44071,27 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v16 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 -; SI-NEXT: s_and_b32 s4, s38, 0xff +; SI-NEXT: s_and_b32 s4, s48, 0xff ; SI-NEXT: s_lshl_b32 s4, s4, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 ; SI-NEXT: v_add_i32_e32 v4, vcc, 64, v0 ; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v15 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v37 ; SI-NEXT: s_lshl_b32 s4, s22, 8 ; SI-NEXT: s_lshl_b32 s5, s34, 24 -; SI-NEXT: v_readlane_b32 s38, v63, 4 +; SI-NEXT: v_readlane_b32 s48, v63, 6 ; SI-NEXT: v_readlane_b32 s34, v63, 0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v39 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, 0x44, v0 @@ -43982,24 +44099,20 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v14 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 -; SI-NEXT: s_and_b32 s4, s46, 0xff +; SI-NEXT: s_and_b32 s4, s36, 0xff ; SI-NEXT: s_lshl_b32 s4, s4, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 ; SI-NEXT: v_add_i32_e32 v4, vcc, 0x48, v0 ; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v34 -; SI-NEXT: s_lshl_b32 s4, s24, 8 -; SI-NEXT: s_lshl_b32 s5, s94, 24 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v36 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v36 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v33 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v32 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -44007,9 +44120,11 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v12 +; SI-NEXT: s_lshl_b32 s4, s24, 8 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 ; SI-NEXT: s_and_b32 s4, s30, 0xff ; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s5, s94, 24 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 @@ -44017,11 +44132,11 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v33 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v31 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v30 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v27 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v29 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v25 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -44035,6 +44150,7 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v59 ; SI-NEXT: v_readlane_b32 s30, v63, 34 ; SI-NEXT: v_readlane_b32 s31, v63, 35 +; SI-NEXT: v_readlane_b32 s36, v63, 2 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 @@ -44046,7 +44162,7 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v27 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v24 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v60 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 @@ -44141,8 +44257,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_or_b32_e32 v2, s4, v2 -; SI-NEXT: v_readlane_b32 s4, v61, 36 -; SI-NEXT: v_readlane_b32 s5, v61, 37 +; SI-NEXT: v_readlane_b32 s4, v61, 58 +; SI-NEXT: v_readlane_b32 s5, v61, 59 ; SI-NEXT: s_and_b32 s4, s4, 0xff ; SI-NEXT: s_lshl_b32 s4, s4, 16 ; SI-NEXT: s_lshl_b32 s5, s16, 24 @@ -44187,8 +44303,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -44397,22 +44513,22 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; VI-NEXT: s_lshr_b32 s70, s17, 8 ; VI-NEXT: s_lshr_b32 s69, s16, 16 ; VI-NEXT: s_lshr_b32 s71, s16, 8 -; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; VI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; VI-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; VI-NEXT: s_lshr_b64 s[30:31], s[24:25], 24 -; VI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24 -; VI-NEXT: s_lshr_b64 s[36:37], s[20:21], 24 -; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24 -; VI-NEXT: s_lshr_b64 s[48:49], s[16:17], 24 +; VI-NEXT: s_lshr_b64 s[48:49], s[4:5], 24 +; VI-NEXT: s_lshr_b64 s[38:39], s[6:7], 24 +; VI-NEXT: s_lshr_b64 s[36:37], s[8:9], 24 +; VI-NEXT: s_lshr_b64 s[34:35], s[10:11], 24 +; VI-NEXT: s_lshr_b64 s[30:31], s[12:13], 24 +; VI-NEXT: s_lshr_b64 s[90:91], s[14:15], 24 +; VI-NEXT: s_lshr_b64 s[88:89], s[40:41], 24 +; VI-NEXT: s_lshr_b64 s[78:79], s[42:43], 24 +; VI-NEXT: s_lshr_b64 s[76:77], s[44:45], 24 +; VI-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; VI-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 +; VI-NEXT: s_lshr_b64 s[62:63], s[24:25], 24 +; VI-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 +; VI-NEXT: s_lshr_b64 s[58:59], s[20:21], 24 +; VI-NEXT: s_lshr_b64 s[56:57], s[18:19], 24 +; VI-NEXT: s_lshr_b64 s[46:47], s[16:17], 24 ; VI-NEXT: s_cbranch_execnz .LBB37_4 ; VI-NEXT: .LBB37_2: ; %cmp.true ; VI-NEXT: v_add_f32_e64 v2, s5, 1.0 @@ -44430,537 +44546,538 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] ; VI-NEXT: v_add_f32_e64 v8, s11, 1.0 ; VI-NEXT: v_add_f32_e64 v7, s10, 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] ; VI-NEXT: v_add_f32_e64 v10, s13, 1.0 ; VI-NEXT: v_add_f32_e64 v9, s12, 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] ; VI-NEXT: v_add_f32_e64 v12, s15, 1.0 ; VI-NEXT: v_add_f32_e64 v11, s14, 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] ; VI-NEXT: v_add_f32_e64 v14, s41, 1.0 ; VI-NEXT: v_add_f32_e64 v13, s40, 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] ; VI-NEXT: v_add_f32_e64 v16, s43, 1.0 ; VI-NEXT: v_add_f32_e64 v15, s42, 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] -; VI-NEXT: v_add_f32_e64 v18, s45, 1.0 -; VI-NEXT: v_add_f32_e64 v17, s44, 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18] -; VI-NEXT: v_add_f32_e64 v20, s29, 1.0 -; VI-NEXT: v_add_f32_e64 v19, s28, 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] -; VI-NEXT: v_add_f32_e64 v22, s27, 1.0 -; VI-NEXT: v_add_f32_e64 v21, s26, 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v2 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v1 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v4 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v5 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v9 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e64 v18, s45, 1.0 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e64 v17, s44, 1.0 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e64 v20, s29, 1.0 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e64 v19, s28, 1.0 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e64 v22, s27, 1.0 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; VI-NEXT: v_add_f32_e64 v21, s26, 1.0 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; VI-NEXT: v_add_f32_e64 v24, s25, 1.0 +; VI-NEXT: v_lshrrev_b64 v[50:51], 24, v[17:18] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 ; VI-NEXT: v_add_f32_e64 v28, s21, 1.0 ; VI-NEXT: v_add_f32_e64 v27, s20, 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[19:20] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 ; VI-NEXT: v_add_f32_e64 v30, s19, 1.0 ; VI-NEXT: v_add_f32_e64 v29, s18, 1.0 -; VI-NEXT: v_add_f32_e64 v24, s25, 1.0 ; VI-NEXT: v_add_f32_e64 v23, s24, 1.0 +; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[21:22] ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[27:28] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 ; VI-NEXT: v_add_f32_e64 v32, s17, 1.0 ; VI-NEXT: v_add_f32_e64 v31, s16, 1.0 ; VI-NEXT: v_add_f32_e64 v26, s23, 1.0 ; VI-NEXT: v_add_f32_e64 v25, s22, 1.0 ; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24] ; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[29:30] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 ; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26] ; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[31:32] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v24 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v24 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v23 -; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v23 -; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v26 -; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v26 -; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v26 -; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v25 -; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v25 -; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v28 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v28 -; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v28 -; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v27 -; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v27 -; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v30 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v30 -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v30 -; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v29 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v29 -; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v32 -; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v31 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 +; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v23 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v26 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v26 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 +; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v28 +; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v28 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v28 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v27 +; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v30 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v30 +; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v30 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v29 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v29 +; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v32 +; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v31 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v31 ; VI-NEXT: s_branch .LBB37_5 ; VI-NEXT: .LBB37_3: -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 ; VI-NEXT: ; implicit-def: $sgpr71 ; VI-NEXT: ; implicit-def: $sgpr69 +; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr70 ; VI-NEXT: ; implicit-def: $sgpr68 ; VI-NEXT: ; implicit-def: $sgpr67 ; VI-NEXT: ; implicit-def: $sgpr66 ; VI-NEXT: ; implicit-def: $sgpr64 +; VI-NEXT: ; implicit-def: $sgpr56 ; VI-NEXT: ; implicit-def: $sgpr65 ; VI-NEXT: ; implicit-def: $sgpr55 ; VI-NEXT: ; implicit-def: $sgpr54 ; VI-NEXT: ; implicit-def: $sgpr53 ; VI-NEXT: ; implicit-def: $sgpr51 +; VI-NEXT: ; implicit-def: $sgpr58 ; VI-NEXT: ; implicit-def: $sgpr52 ; VI-NEXT: ; implicit-def: $sgpr50 ; VI-NEXT: ; implicit-def: $sgpr87 ; VI-NEXT: ; implicit-def: $sgpr86 ; VI-NEXT: ; implicit-def: $sgpr84 +; VI-NEXT: ; implicit-def: $sgpr60 ; VI-NEXT: ; implicit-def: $sgpr85 ; VI-NEXT: ; implicit-def: $sgpr83 ; VI-NEXT: ; implicit-def: $sgpr82 ; VI-NEXT: ; implicit-def: $sgpr81 +; VI-NEXT: ; implicit-def: $sgpr62 ; VI-NEXT: ; implicit-def: $sgpr80 -; VI-NEXT: ; implicit-def: $sgpr48 -; VI-NEXT: ; implicit-def: $sgpr38 -; VI-NEXT: ; implicit-def: $sgpr36 -; VI-NEXT: ; implicit-def: $sgpr34 -; VI-NEXT: ; implicit-def: $sgpr30 -; VI-NEXT: ; implicit-def: $sgpr90 -; VI-NEXT: ; implicit-def: $sgpr88 -; VI-NEXT: ; implicit-def: $sgpr78 -; VI-NEXT: ; implicit-def: $sgpr76 -; VI-NEXT: ; implicit-def: $sgpr74 ; VI-NEXT: ; implicit-def: $sgpr72 -; VI-NEXT: ; implicit-def: $sgpr62 -; VI-NEXT: ; implicit-def: $sgpr60 -; VI-NEXT: ; implicit-def: $sgpr58 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr74 +; VI-NEXT: ; implicit-def: $sgpr76 +; VI-NEXT: ; implicit-def: $sgpr78 +; VI-NEXT: ; implicit-def: $sgpr88 +; VI-NEXT: ; implicit-def: $sgpr90 +; VI-NEXT: ; implicit-def: $sgpr30 +; VI-NEXT: ; implicit-def: $sgpr34 +; VI-NEXT: ; implicit-def: $sgpr36 +; VI-NEXT: ; implicit-def: $sgpr38 +; VI-NEXT: ; implicit-def: $sgpr48 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 ; VI-NEXT: s_branch .LBB37_2 ; VI-NEXT: .LBB37_4: -; VI-NEXT: v_mov_b32_e32 v53, s46 -; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v53, s56 +; VI-NEXT: v_mov_b32_e32 v50, s48 +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v50, s38 ; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_mov_b32_e32 v39, s81 ; VI-NEXT: v_readlane_b32 s4, v62, 0 -; VI-NEXT: v_mov_b32_e32 v37, s4 -; VI-NEXT: v_mov_b32_e32 v34, s80 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v56, s4 +; VI-NEXT: v_mov_b32_e32 v39, s80 ; VI-NEXT: v_readlane_b32 s4, v62, 1 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 2 -; VI-NEXT: v_mov_b32_e32 v35, s4 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 3 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 4 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 5 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 6 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 7 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 8 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 9 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 10 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 11 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 12 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 13 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 14 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 15 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 16 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 17 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 18 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 19 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 20 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 21 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 22 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 23 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 24 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v50, s36 ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 25 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 -; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v53, s58 ; VI-NEXT: v_readlane_b32 s4, v62, 26 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 27 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 28 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 29 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 30 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 31 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 32 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 33 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 34 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 35 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 36 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 37 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 38 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 39 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 40 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 41 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 42 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 43 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 44 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 45 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 46 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 47 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 48 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 49 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 50 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v50, s34 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 51 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v53, s60 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 52 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 53 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 54 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 55 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 56 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 57 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_mov_b32_e32 v31, s16 ; VI-NEXT: v_mov_b32_e32 v32, s17 @@ -44993,112 +45110,99 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; VI-NEXT: v_mov_b32_e32 v3, s6 ; VI-NEXT: v_mov_b32_e32 v4, s7 ; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_mov_b32_e32 v61, s71 -; VI-NEXT: v_mov_b32_e32 v33, s69 -; VI-NEXT: v_mov_b32_e32 v60, s70 -; VI-NEXT: v_mov_b32_e32 v50, s68 -; VI-NEXT: v_mov_b32_e32 v59, s67 -; VI-NEXT: v_mov_b32_e32 v58, s66 -; VI-NEXT: v_mov_b32_e32 v48, s64 -; VI-NEXT: v_mov_b32_e32 v52, s65 -; VI-NEXT: v_mov_b32_e32 v56, s55 -; VI-NEXT: v_mov_b32_e32 v57, s54 -; VI-NEXT: v_mov_b32_e32 v46, s53 -; VI-NEXT: v_mov_b32_e32 v47, s51 -; VI-NEXT: v_mov_b32_e32 v45, s52 -; VI-NEXT: v_mov_b32_e32 v43, s50 -; VI-NEXT: v_mov_b32_e32 v44, s87 -; VI-NEXT: v_mov_b32_e32 v49, s86 -; VI-NEXT: v_mov_b32_e32 v42, s84 -; VI-NEXT: v_mov_b32_e32 v51, s85 -; VI-NEXT: v_mov_b32_e32 v38, s83 -; VI-NEXT: v_mov_b32_e32 v55, s82 -; VI-NEXT: v_mov_b32_e32 v36, s81 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v39, s36 -; VI-NEXT: v_mov_b32_e32 v40, s38 -; VI-NEXT: v_mov_b32_e32 v41, s48 -; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v47, s71 +; VI-NEXT: v_mov_b32_e32 v49, s69 +; VI-NEXT: v_mov_b32_e32 v46, s70 +; VI-NEXT: v_mov_b32_e32 v35, s68 +; VI-NEXT: v_mov_b32_e32 v38, s67 +; VI-NEXT: v_mov_b32_e32 v45, s66 +; VI-NEXT: v_mov_b32_e32 v44, s64 +; VI-NEXT: v_mov_b32_e32 v43, s65 +; VI-NEXT: v_mov_b32_e32 v55, s55 +; VI-NEXT: v_mov_b32_e32 v42, s54 +; VI-NEXT: v_mov_b32_e32 v36, s53 +; VI-NEXT: v_mov_b32_e32 v34, s51 +; VI-NEXT: v_mov_b32_e32 v48, s52 +; VI-NEXT: v_mov_b32_e32 v60, s50 +; VI-NEXT: v_mov_b32_e32 v61, s87 +; VI-NEXT: v_mov_b32_e32 v33, s86 +; VI-NEXT: v_mov_b32_e32 v59, s84 +; VI-NEXT: v_mov_b32_e32 v37, s85 +; VI-NEXT: v_mov_b32_e32 v57, s83 +; VI-NEXT: v_mov_b32_e32 v58, s82 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v52, s72 ; VI-NEXT: v_mov_b32_e32 v53, s62 -; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v53, s72 -; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v53, s74 -; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v53, s76 -; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v53, s78 -; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v53, s88 -; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v53, s90 -; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v53, s30 -; VI-NEXT: v_mov_b32_e32 v54, s34 +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v50, s30 +; VI-NEXT: v_mov_b32_e32 v54, s60 +; VI-NEXT: v_mov_b32_e32 v39, s58 +; VI-NEXT: v_mov_b32_e32 v40, s56 +; VI-NEXT: v_mov_b32_e32 v41, s46 +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v50, s90 +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v50, s88 +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v50, s78 +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v50, s76 +; VI-NEXT: v_mov_b32_e32 v51, s74 ; VI-NEXT: .LBB37_5: ; %end ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v33, v33, v41, s4 -; VI-NEXT: v_perm_b32 v31, v31, v61, s4 -; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 -; VI-NEXT: v_or_b32_e32 v31, v31, v33 +; VI-NEXT: v_perm_b32 v49, v49, v41, s4 +; VI-NEXT: v_perm_b32 v31, v31, v47, s4 +; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v49 +; VI-NEXT: v_or_b32_e32 v31, v31, v49 ; VI-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v31, v50, v59, s4 -; VI-NEXT: v_perm_b32 v32, v32, v60, s4 -; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; VI-NEXT: v_or_b32_e32 v31, v32, v31 +; VI-NEXT: v_perm_b32 v31, v32, v46, s4 +; VI-NEXT: v_perm_b32 v32, v35, v38, s4 +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; VI-NEXT: v_or_b32_e32 v31, v31, v32 ; VI-NEXT: v_add_u32_e32 v32, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v31, v32, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v31, v48, v40, s4 -; VI-NEXT: v_perm_b32 v29, v29, v58, s4 +; VI-NEXT: v_perm_b32 v31, v44, v40, s4 +; VI-NEXT: v_perm_b32 v29, v29, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; VI-NEXT: v_or_b32_e32 v29, v29, v31 ; VI-NEXT: v_add_u32_e32 v31, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v29, v31, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v29, v30, v52, s4 -; VI-NEXT: v_perm_b32 v30, v56, v57, s4 +; VI-NEXT: v_perm_b32 v29, v30, v43, s4 +; VI-NEXT: v_perm_b32 v30, v55, v42, s4 ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; VI-NEXT: v_or_b32_e32 v29, v29, v30 ; VI-NEXT: v_add_u32_e32 v30, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v29, v30, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v29, v47, v39, s4 -; VI-NEXT: v_perm_b32 v27, v27, v46, s4 +; VI-NEXT: v_perm_b32 v29, v34, v39, s4 +; VI-NEXT: v_perm_b32 v27, v27, v36, s4 ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; VI-NEXT: v_or_b32_e32 v27, v27, v29 ; VI-NEXT: v_add_u32_e32 v29, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v27, v29, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v27, v28, v45, s4 -; VI-NEXT: v_perm_b32 v28, v43, v44, s4 +; VI-NEXT: v_perm_b32 v27, v28, v48, s4 +; VI-NEXT: v_perm_b32 v28, v60, v61, s4 ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; VI-NEXT: v_or_b32_e32 v27, v27, v28 ; VI-NEXT: v_add_u32_e32 v28, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v27, v28, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v27, v42, v54, s4 -; VI-NEXT: v_perm_b32 v25, v25, v49, s4 +; VI-NEXT: v_perm_b32 v27, v59, v54, s4 +; VI-NEXT: v_perm_b32 v25, v25, v33, s4 ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; VI-NEXT: v_or_b32_e32 v25, v25, v27 ; VI-NEXT: v_add_u32_e32 v27, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v25, v27, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v25, v26, v51, s4 -; VI-NEXT: v_perm_b32 v26, v38, v55, s4 +; VI-NEXT: v_perm_b32 v25, v26, v37, s4 +; VI-NEXT: v_perm_b32 v26, v57, v58, s4 ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; VI-NEXT: v_or_b32_e32 v25, v25, v26 ; VI-NEXT: v_add_u32_e32 v26, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v25, v26, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v25, v37, v53, s4 -; VI-NEXT: v_perm_b32 v23, v23, v36, s4 -; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; VI-NEXT: v_or_b32_e32 v23, v23, v25 -; VI-NEXT: v_add_u32_e32 v25, vcc, 32, v0 -; VI-NEXT: buffer_store_dword v23, v25, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload ; VI-NEXT: v_readlane_b32 s30, v63, 30 ; VI-NEXT: v_readlane_b32 s31, v63, 31 ; VI-NEXT: v_readlane_b32 s87, v63, 29 @@ -45132,260 +45236,265 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; VI-NEXT: v_readlane_b32 s35, v63, 1 ; VI-NEXT: v_readlane_b32 s34, v63, 0 ; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v23, v23, v25, s4 +; VI-NEXT: v_perm_b32 v25, v56, v53, s4 +; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; VI-NEXT: v_or_b32_e32 v23, v23, v25 +; VI-NEXT: v_add_u32_e32 v25, vcc, 32, v0 +; VI-NEXT: buffer_store_dword v23, v25, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v23, v24, v23, s4 -; VI-NEXT: v_perm_b32 v24, v34, v35, s4 +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v24, v24, v25, s4 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; VI-NEXT: v_or_b32_e32 v23, v23, v24 ; VI-NEXT: v_add_u32_e32 v24, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v23, v24, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v23, v24, v23, s4 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; VI-NEXT: v_perm_b32 v21, v21, v23, s4 +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v21, v21, v24, s4 +; VI-NEXT: v_perm_b32 v23, v23, v52, s4 +; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; VI-NEXT: v_or_b32_e32 v21, v21, v23 ; VI-NEXT: v_add_u32_e32 v23, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v21, v23, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v21, v22, v21, s4 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v22, v22, v23, s4 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; VI-NEXT: v_or_b32_e32 v21, v21, v22 ; VI-NEXT: v_add_u32_e32 v22, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v21, v22, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v21, v22, v21, s4 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; VI-NEXT: v_perm_b32 v19, v19, v21, s4 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v19, v22, s4 +; VI-NEXT: v_perm_b32 v21, v21, v51, s4 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; VI-NEXT: v_or_b32_e32 v19, v19, v21 ; VI-NEXT: v_add_u32_e32 v21, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v19, v21, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v19, v20, v19, s4 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v20, v20, v21, s4 ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; VI-NEXT: v_or_b32_e32 v19, v19, v20 ; VI-NEXT: v_add_u32_e32 v20, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v19, v20, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v20, v19, s4 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; VI-NEXT: v_perm_b32 v17, v17, v19, s4 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v17, v17, v20, s4 +; VI-NEXT: v_perm_b32 v19, v19, v50, s4 +; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; VI-NEXT: v_or_b32_e32 v17, v17, v19 ; VI-NEXT: v_add_u32_e32 v19, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v17, v19, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v17, v18, v17, s4 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v18, v19, s4 ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; VI-NEXT: v_or_b32_e32 v17, v17, v18 ; VI-NEXT: v_add_u32_e32 v18, vcc, 60, v0 ; VI-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v17, v18, v17, s4 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v15, v15, v17, s4 +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v17, v17, v18, s4 ; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v15, v18, s4 ; VI-NEXT: v_or_b32_e32 v15, v15, v17 ; VI-NEXT: v_add_u32_e32 v17, vcc, 64, v0 ; VI-NEXT: buffer_store_dword v15, v17, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v15, v16, v15, s4 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v16, v16, v17, s4 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; VI-NEXT: v_or_b32_e32 v15, v15, v16 ; VI-NEXT: v_add_u32_e32 v16, vcc, 0x44, v0 ; VI-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v16, v15, s4 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v13, v13, v15, s4 +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v15, v15, v16, s4 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v13, v13, v16, s4 ; VI-NEXT: v_or_b32_e32 v13, v13, v15 ; VI-NEXT: v_add_u32_e32 v15, vcc, 0x48, v0 ; VI-NEXT: buffer_store_dword v13, v15, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v13, v14, v13, s4 -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v14, v14, v15, s4 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_or_b32_e32 v13, v13, v14 ; VI-NEXT: v_add_u32_e32 v14, vcc, 0x4c, v0 ; VI-NEXT: buffer_store_dword v13, v14, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v11, v11, v13, s4 -; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v13, v14, v13, s4 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v13, v13, v14, s4 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; VI-NEXT: v_or_b32_e32 v11, v11, v13 ; VI-NEXT: v_add_u32_e32 v13, vcc, 0x50, v0 ; VI-NEXT: buffer_store_dword v11, v13, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v11, v12, v11, s4 -; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v12, v12, v13, s4 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 ; VI-NEXT: v_add_u32_e32 v12, vcc, 0x54, v0 ; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v9, v9, v11, s4 -; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v11, v12, v11, s4 +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v11, v11, v12, s4 ; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; VI-NEXT: v_or_b32_e32 v9, v9, v11 ; VI-NEXT: v_add_u32_e32 v11, vcc, 0x58, v0 ; VI-NEXT: buffer_store_dword v9, v11, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v9, v10, v9, s4 -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v10, v10, v11, s4 ; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 ; VI-NEXT: v_add_u32_e32 v10, vcc, 0x5c, v0 ; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v7, v9, s4 -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v9, v10, v9, s4 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; VI-NEXT: v_or_b32_e32 v7, v7, v9 ; VI-NEXT: v_add_u32_e32 v9, vcc, 0x60, v0 ; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s4 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v8, v8, v9, s4 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 ; VI-NEXT: v_add_u32_e32 v8, vcc, 0x64, v0 ; VI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v5, v5, v7, s4 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s4 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v5, v5, v7 ; VI-NEXT: v_add_u32_e32 v7, vcc, 0x68, v0 ; VI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v5, v6, v5, s4 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v6, v7, s4 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_e32 v5, v5, v6 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x6c, v0 ; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v3, v3, v5, s4 ; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v5, v6, v5, s4 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_e32 v3, v3, v5 ; VI-NEXT: v_add_u32_e32 v5, vcc, 0x70, v0 ; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v3, v4, v3, s4 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v4, v4, v5, s4 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; VI-NEXT: v_or_b32_e32 v3, v3, v4 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x74, v0 ; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v3, s4 ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v3, v4, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v1, v1, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x78, v0 ; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v2, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 @@ -45406,8 +45515,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -45416,8 +45525,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -45622,438 +45731,449 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX9-NEXT: s_lshr_b32 s80, s17, 8 ; GFX9-NEXT: s_lshr_b32 s71, s16, 16 ; GFX9-NEXT: s_lshr_b32 s81, s16, 8 -; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; GFX9-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; GFX9-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; GFX9-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; GFX9-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; GFX9-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; GFX9-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; GFX9-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; GFX9-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; GFX9-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; GFX9-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; GFX9-NEXT: s_lshr_b64 s[92:93], s[24:25], 24 -; GFX9-NEXT: s_lshr_b64 s[94:95], s[22:23], 24 -; GFX9-NEXT: s_lshr_b64 s[30:31], s[20:21], 24 -; GFX9-NEXT: s_lshr_b64 s[34:35], s[18:19], 24 -; GFX9-NEXT: s_lshr_b64 s[36:37], s[16:17], 24 +; GFX9-NEXT: s_lshr_b64 s[36:37], s[4:5], 24 +; GFX9-NEXT: s_lshr_b64 s[34:35], s[6:7], 24 +; GFX9-NEXT: s_lshr_b64 s[30:31], s[8:9], 24 +; GFX9-NEXT: s_lshr_b64 s[94:95], s[10:11], 24 +; GFX9-NEXT: s_lshr_b64 s[92:93], s[12:13], 24 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[14:15], 24 +; GFX9-NEXT: s_lshr_b64 s[88:89], s[40:41], 24 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[42:43], 24 +; GFX9-NEXT: s_lshr_b64 s[76:77], s[44:45], 24 +; GFX9-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX9-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 +; GFX9-NEXT: s_lshr_b64 s[62:63], s[24:25], 24 +; GFX9-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 +; GFX9-NEXT: s_lshr_b64 s[58:59], s[20:21], 24 +; GFX9-NEXT: s_lshr_b64 s[56:57], s[18:19], 24 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[16:17], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB37_4 ; GFX9-NEXT: .LBB37_2: ; %cmp.true ; GFX9-NEXT: v_add_f32_e64 v2, s5, 1.0 ; GFX9-NEXT: v_add_f32_e64 v1, s4, 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2] +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] ; GFX9-NEXT: v_add_f32_e64 v4, s7, 1.0 ; GFX9-NEXT: v_add_f32_e64 v3, s6, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4] +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] ; GFX9-NEXT: v_add_f32_e64 v6, s9, 1.0 ; GFX9-NEXT: v_add_f32_e64 v5, s8, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[5:6] +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] ; GFX9-NEXT: v_add_f32_e64 v8, s11, 1.0 ; GFX9-NEXT: v_add_f32_e64 v7, s10, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8] +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] ; GFX9-NEXT: v_add_f32_e64 v10, s13, 1.0 ; GFX9-NEXT: v_add_f32_e64 v9, s12, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10] +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] ; GFX9-NEXT: v_add_f32_e64 v12, s15, 1.0 ; GFX9-NEXT: v_add_f32_e64 v11, s14, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12] +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] ; GFX9-NEXT: v_add_f32_e64 v14, s41, 1.0 ; GFX9-NEXT: v_add_f32_e64 v13, s40, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14] -; GFX9-NEXT: v_add_f32_e64 v22, s43, 1.0 -; GFX9-NEXT: v_add_f32_e64 v21, s42, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[21:22] -; GFX9-NEXT: v_add_f32_e64 v24, s45, 1.0 -; GFX9-NEXT: v_add_f32_e64 v23, s44, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[23:24] -; GFX9-NEXT: v_add_f32_e64 v26, s29, 1.0 -; GFX9-NEXT: v_add_f32_e64 v25, s28, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[25:26] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v2 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v2 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v2 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v1 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v1 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v3 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v3 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v6 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v6 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v6 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v5 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v5 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v8 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v8 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v8 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v7 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v7 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v10 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v10 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v10 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v9 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v9 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v12 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v12 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v12 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v11 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v11 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v22 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v22 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v22 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v21 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v21 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v24 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v24 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v24 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v26 -; GFX9-NEXT: v_add_f32_e64 v28, s27, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v26 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v28 -; GFX9-NEXT: v_add_f32_e64 v32, s23, 1.0 -; GFX9-NEXT: v_add_f32_e64 v31, s22, 1.0 -; GFX9-NEXT: v_add_f32_e64 v30, s25, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v28 -; GFX9-NEXT: v_add_f32_e64 v34, s21, 1.0 -; GFX9-NEXT: v_add_f32_e64 v33, s20, 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[31:32] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v30 -; GFX9-NEXT: v_add_f32_e64 v49, s17, 1.0 -; GFX9-NEXT: v_add_f32_e64 v36, s19, 1.0 -; GFX9-NEXT: v_add_f32_e64 v35, s18, 1.0 -; GFX9-NEXT: v_add_f32_e64 v27, s26, 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[33:34] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v30 -; GFX9-NEXT: v_add_f32_e64 v48, s16, 1.0 -; GFX9-NEXT: v_add_f32_e64 v29, s24, 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28] -; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[35:36] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 24, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v19, 24, v49 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30] -; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[48:49] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v32 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v34 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v36 -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v49 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v23 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v23 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v26 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v28 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v27 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v27 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v30 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v29 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v29 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v31 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v31 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v33 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v35 -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v49 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v48 -; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v48 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] +; GFX9-NEXT: v_add_f32_e64 v16, s43, 1.0 +; GFX9-NEXT: v_add_f32_e64 v15, s42, 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v2 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v1 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v1 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v3 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v3 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; GFX9-NEXT: v_add_f32_e64 v18, s45, 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; GFX9-NEXT: v_add_f32_e64 v17, s44, 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; GFX9-NEXT: v_add_f32_e64 v20, s29, 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; GFX9-NEXT: v_add_f32_e64 v19, s28, 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; GFX9-NEXT: v_add_f32_e64 v22, s27, 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; GFX9-NEXT: v_add_f32_e64 v21, s26, 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; GFX9-NEXT: v_add_f32_e64 v24, s25, 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[17:18] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; GFX9-NEXT: v_add_f32_e64 v28, s21, 1.0 +; GFX9-NEXT: v_add_f32_e64 v27, s20, 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[19:20] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 +; GFX9-NEXT: v_add_f32_e64 v30, s19, 1.0 +; GFX9-NEXT: v_add_f32_e64 v29, s18, 1.0 +; GFX9-NEXT: v_add_f32_e64 v23, s24, 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[21:22] +; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[27:28] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; GFX9-NEXT: v_add_f32_e64 v32, s17, 1.0 +; GFX9-NEXT: v_add_f32_e64 v31, s16, 1.0 +; GFX9-NEXT: v_add_f32_e64 v26, s23, 1.0 +; GFX9-NEXT: v_add_f32_e64 v25, s22, 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24] +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[29:30] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26] +; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[31:32] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v23 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v25 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v31 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v31 ; GFX9-NEXT: s_branch .LBB37_5 ; GFX9-NEXT: .LBB37_3: -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 ; GFX9-NEXT: ; implicit-def: $sgpr81 ; GFX9-NEXT: ; implicit-def: $sgpr71 +; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr80 ; GFX9-NEXT: ; implicit-def: $sgpr70 ; GFX9-NEXT: ; implicit-def: $sgpr69 ; GFX9-NEXT: ; implicit-def: $sgpr68 ; GFX9-NEXT: ; implicit-def: $sgpr66 +; GFX9-NEXT: ; implicit-def: $sgpr56 ; GFX9-NEXT: ; implicit-def: $sgpr67 ; GFX9-NEXT: ; implicit-def: $sgpr65 ; GFX9-NEXT: ; implicit-def: $sgpr64 ; GFX9-NEXT: ; implicit-def: $sgpr55 ; GFX9-NEXT: ; implicit-def: $sgpr53 +; GFX9-NEXT: ; implicit-def: $sgpr58 ; GFX9-NEXT: ; implicit-def: $sgpr54 ; GFX9-NEXT: ; implicit-def: $sgpr52 ; GFX9-NEXT: ; implicit-def: $sgpr51 ; GFX9-NEXT: ; implicit-def: $sgpr50 ; GFX9-NEXT: ; implicit-def: $sgpr48 +; GFX9-NEXT: ; implicit-def: $sgpr60 ; GFX9-NEXT: ; implicit-def: $sgpr49 ; GFX9-NEXT: ; implicit-def: $sgpr39 ; GFX9-NEXT: ; implicit-def: $sgpr38 ; GFX9-NEXT: ; implicit-def: $sgpr99 ; GFX9-NEXT: ; implicit-def: $sgpr97 +; GFX9-NEXT: ; implicit-def: $sgpr62 ; GFX9-NEXT: ; implicit-def: $sgpr98 ; GFX9-NEXT: ; implicit-def: $sgpr96 ; GFX9-NEXT: ; implicit-def: $sgpr87 ; GFX9-NEXT: ; implicit-def: $sgpr86 ; GFX9-NEXT: ; implicit-def: $sgpr84 +; GFX9-NEXT: ; implicit-def: $sgpr72 ; GFX9-NEXT: ; implicit-def: $sgpr85 ; GFX9-NEXT: ; implicit-def: $sgpr83 ; GFX9-NEXT: ; implicit-def: $sgpr82 -; GFX9-NEXT: ; implicit-def: $sgpr36 -; GFX9-NEXT: ; implicit-def: $sgpr34 -; GFX9-NEXT: ; implicit-def: $sgpr30 -; GFX9-NEXT: ; implicit-def: $sgpr94 -; GFX9-NEXT: ; implicit-def: $sgpr92 -; GFX9-NEXT: ; implicit-def: $sgpr90 -; GFX9-NEXT: ; implicit-def: $sgpr88 -; GFX9-NEXT: ; implicit-def: $sgpr78 -; GFX9-NEXT: ; implicit-def: $sgpr76 ; GFX9-NEXT: ; implicit-def: $sgpr74 -; GFX9-NEXT: ; implicit-def: $sgpr72 -; GFX9-NEXT: ; implicit-def: $sgpr62 -; GFX9-NEXT: ; implicit-def: $sgpr60 -; GFX9-NEXT: ; implicit-def: $sgpr58 -; GFX9-NEXT: ; implicit-def: $sgpr56 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr76 +; GFX9-NEXT: ; implicit-def: $sgpr78 +; GFX9-NEXT: ; implicit-def: $sgpr88 +; GFX9-NEXT: ; implicit-def: $sgpr90 +; GFX9-NEXT: ; implicit-def: $sgpr92 +; GFX9-NEXT: ; implicit-def: $sgpr94 +; GFX9-NEXT: ; implicit-def: $sgpr30 +; GFX9-NEXT: ; implicit-def: $sgpr34 +; GFX9-NEXT: ; implicit-def: $sgpr36 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 ; GFX9-NEXT: s_branch .LBB37_2 ; GFX9-NEXT: .LBB37_4: -; GFX9-NEXT: v_mov_b32_e32 v53, s46 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v50, s36 +; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v53, s56 -; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v50, s34 +; GFX9-NEXT: v_mov_b32_e32 v39, s97 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, s98 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s96 -; GFX9-NEXT: v_readlane_b32 s4, v62, 0 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s87 -; GFX9-NEXT: v_mov_b32_e32 v46, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 1 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, s86 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, s84 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, s85 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s83 -; GFX9-NEXT: v_mov_b32_e32 v47, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 2 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s82 -; GFX9-NEXT: v_mov_b32_e32 v45, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 0 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 1 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 2 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 3 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 4 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 5 -; GFX9-NEXT: v_mov_b32_e32 v43, s4 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 6 -; GFX9-NEXT: v_mov_b32_e32 v44, s4 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 7 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 8 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 9 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 10 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 11 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 12 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 13 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 14 ; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill @@ -46062,147 +46182,133 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 16 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 17 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 18 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 19 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v50, s30 ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 20 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 21 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 22 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 23 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 24 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v53, s58 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 25 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 26 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 27 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 28 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 29 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 30 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 31 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 32 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 33 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 34 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 35 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 36 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 37 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 38 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 39 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 40 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 41 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 42 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 43 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 44 -; GFX9-NEXT: v_mov_b32_e32 v15, s70 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 45 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s69 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v50, s94 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 46 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s65 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 47 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s64 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v53, s60 ; GFX9-NEXT: v_readlane_b32 s4, v62, 48 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s52 -; GFX9-NEXT: v_mov_b32_e32 v37, s39 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 49 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s51 -; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v37, s38 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v39, s4 -; GFX9-NEXT: v_mov_b32_e32 v48, s16 -; GFX9-NEXT: v_mov_b32_e32 v49, s17 -; GFX9-NEXT: v_mov_b32_e32 v35, s18 -; GFX9-NEXT: v_mov_b32_e32 v36, s19 -; GFX9-NEXT: v_mov_b32_e32 v33, s20 -; GFX9-NEXT: v_mov_b32_e32 v34, s21 -; GFX9-NEXT: v_mov_b32_e32 v31, s22 -; GFX9-NEXT: v_mov_b32_e32 v32, s23 -; GFX9-NEXT: v_mov_b32_e32 v29, s24 -; GFX9-NEXT: v_mov_b32_e32 v30, s25 -; GFX9-NEXT: v_mov_b32_e32 v27, s26 -; GFX9-NEXT: v_mov_b32_e32 v28, s27 -; GFX9-NEXT: v_mov_b32_e32 v25, s28 -; GFX9-NEXT: v_mov_b32_e32 v26, s29 -; GFX9-NEXT: v_mov_b32_e32 v23, s44 -; GFX9-NEXT: v_mov_b32_e32 v24, s45 -; GFX9-NEXT: v_mov_b32_e32 v21, s42 -; GFX9-NEXT: v_mov_b32_e32 v22, s43 +; GFX9-NEXT: v_mov_b32_e32 v31, s16 +; GFX9-NEXT: v_mov_b32_e32 v32, s17 +; GFX9-NEXT: v_mov_b32_e32 v29, s18 +; GFX9-NEXT: v_mov_b32_e32 v30, s19 +; GFX9-NEXT: v_mov_b32_e32 v27, s20 +; GFX9-NEXT: v_mov_b32_e32 v28, s21 +; GFX9-NEXT: v_mov_b32_e32 v25, s22 +; GFX9-NEXT: v_mov_b32_e32 v26, s23 +; GFX9-NEXT: v_mov_b32_e32 v23, s24 +; GFX9-NEXT: v_mov_b32_e32 v24, s25 +; GFX9-NEXT: v_mov_b32_e32 v21, s26 +; GFX9-NEXT: v_mov_b32_e32 v22, s27 +; GFX9-NEXT: v_mov_b32_e32 v19, s28 +; GFX9-NEXT: v_mov_b32_e32 v20, s29 +; GFX9-NEXT: v_mov_b32_e32 v17, s44 +; GFX9-NEXT: v_mov_b32_e32 v18, s45 +; GFX9-NEXT: v_mov_b32_e32 v15, s42 +; GFX9-NEXT: v_mov_b32_e32 v16, s43 ; GFX9-NEXT: v_mov_b32_e32 v13, s40 ; GFX9-NEXT: v_mov_b32_e32 v14, s41 ; GFX9-NEXT: v_mov_b32_e32 v11, s14 @@ -46216,88 +46322,99 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v3, s6 ; GFX9-NEXT: v_mov_b32_e32 v4, s7 ; GFX9-NEXT: v_mov_b32_e32 v2, s5 -; GFX9-NEXT: v_mov_b32_e32 v20, s81 -; GFX9-NEXT: v_mov_b32_e32 v55, s71 -; GFX9-NEXT: v_mov_b32_e32 v19, s80 -; GFX9-NEXT: v_mov_b32_e32 v18, s68 -; GFX9-NEXT: v_mov_b32_e32 v52, s66 -; GFX9-NEXT: v_mov_b32_e32 v17, s67 -; GFX9-NEXT: v_mov_b32_e32 v61, s55 -; GFX9-NEXT: v_mov_b32_e32 v51, s53 -; GFX9-NEXT: v_mov_b32_e32 v16, s54 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v60, s50 -; GFX9-NEXT: v_mov_b32_e32 v50, s48 -; GFX9-NEXT: v_mov_b32_e32 v15, s49 -; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v37, s99 -; GFX9-NEXT: v_mov_b32_e32 v59, s97 -; GFX9-NEXT: v_mov_b32_e32 v38, s98 -; GFX9-NEXT: v_mov_b32_e32 v57, s86 -; GFX9-NEXT: v_mov_b32_e32 v58, s84 -; GFX9-NEXT: v_mov_b32_e32 v56, s85 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v39, s94 -; GFX9-NEXT: v_mov_b32_e32 v40, s30 -; GFX9-NEXT: v_mov_b32_e32 v41, s34 -; GFX9-NEXT: v_mov_b32_e32 v42, s36 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v49, s81 +; GFX9-NEXT: v_mov_b32_e32 v38, s71 +; GFX9-NEXT: v_mov_b32_e32 v47, s80 +; GFX9-NEXT: v_mov_b32_e32 v45, s70 +; GFX9-NEXT: v_mov_b32_e32 v46, s69 +; GFX9-NEXT: v_mov_b32_e32 v44, s68 +; GFX9-NEXT: v_mov_b32_e32 v35, s66 +; GFX9-NEXT: v_mov_b32_e32 v48, s67 +; GFX9-NEXT: v_mov_b32_e32 v42, s65 +; GFX9-NEXT: v_mov_b32_e32 v43, s64 +; GFX9-NEXT: v_mov_b32_e32 v55, s55 +; GFX9-NEXT: v_mov_b32_e32 v36, s53 +; GFX9-NEXT: v_mov_b32_e32 v34, s54 +; GFX9-NEXT: v_mov_b32_e32 v37, s52 +; GFX9-NEXT: v_mov_b32_e32 v61, s51 +; GFX9-NEXT: v_mov_b32_e32 v33, s50 +; GFX9-NEXT: v_mov_b32_e32 v60, s48 +; GFX9-NEXT: v_mov_b32_e32 v59, s49 +; GFX9-NEXT: v_mov_b32_e32 v57, s39 +; GFX9-NEXT: v_mov_b32_e32 v58, s38 +; GFX9-NEXT: v_mov_b32_e32 v56, s99 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v52, s72 ; GFX9-NEXT: v_mov_b32_e32 v53, s62 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v53, s72 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v54, s60 +; GFX9-NEXT: v_mov_b32_e32 v39, s58 +; GFX9-NEXT: v_mov_b32_e32 v40, s56 +; GFX9-NEXT: v_mov_b32_e32 v41, s46 +; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v53, s74 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v50, s92 +; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v53, s76 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v50, s90 +; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v53, s78 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v50, s88 +; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v53, s88 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v50, s78 +; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v53, s90 -; GFX9-NEXT: v_mov_b32_e32 v54, s92 +; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v50, s76 +; GFX9-NEXT: v_mov_b32_e32 v51, s74 ; GFX9-NEXT: .LBB37_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v32, v32, v15, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v19, v49, v19, s4 -; GFX9-NEXT: v_perm_b32 v16, v34, v16, s4 -; GFX9-NEXT: v_perm_b32 v34, v50, v39, s4 -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v30, v30, v38, s4 -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v18, v35, v18, s4 -; GFX9-NEXT: v_perm_b32 v35, v51, v40, s4 -; GFX9-NEXT: v_perm_b32 v55, v55, v42, s4 -; GFX9-NEXT: v_perm_b32 v20, v48, v20, s4 -; GFX9-NEXT: v_perm_b32 v48, v52, v41, s4 -; GFX9-NEXT: v_perm_b32 v17, v36, v17, s4 -; GFX9-NEXT: v_perm_b32 v33, v33, v61, s4 -; GFX9-NEXT: v_perm_b32 v31, v31, v60, s4 -; GFX9-NEXT: v_perm_b32 v36, v59, v54, s4 -; GFX9-NEXT: v_perm_b32 v29, v29, v37, s4 -; GFX9-NEXT: v_perm_b32 v37, v58, v53, s4 -; GFX9-NEXT: v_perm_b32 v27, v27, v57, s4 -; GFX9-NEXT: v_perm_b32 v28, v28, v56, s4 -; GFX9-NEXT: v_perm_b32 v25, v25, v46, s4 -; GFX9-NEXT: v_perm_b32 v26, v26, v45, s4 -; GFX9-NEXT: v_perm_b32 v23, v23, v43, s4 +; GFX9-NEXT: v_perm_b32 v38, v38, v41, s4 +; GFX9-NEXT: v_perm_b32 v31, v31, v49, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v38, 16, v38 +; GFX9-NEXT: v_or_b32_e32 v31, v31, v38 +; GFX9-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen +; GFX9-NEXT: v_perm_b32 v31, v32, v47, s4 +; GFX9-NEXT: v_perm_b32 v32, v45, v46, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; GFX9-NEXT: v_or_b32_e32 v31, v31, v32 +; GFX9-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:4 +; GFX9-NEXT: v_perm_b32 v31, v35, v40, s4 +; GFX9-NEXT: v_perm_b32 v29, v29, v44, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX9-NEXT: v_or_b32_e32 v29, v29, v31 +; GFX9-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:8 +; GFX9-NEXT: v_perm_b32 v29, v30, v48, s4 +; GFX9-NEXT: v_perm_b32 v30, v42, v43, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; GFX9-NEXT: v_or_b32_e32 v29, v29, v30 +; GFX9-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:12 +; GFX9-NEXT: v_perm_b32 v29, v36, v39, s4 +; GFX9-NEXT: v_perm_b32 v27, v27, v55, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; GFX9-NEXT: v_or_b32_e32 v27, v27, v29 +; GFX9-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:16 +; GFX9-NEXT: v_perm_b32 v27, v28, v34, s4 +; GFX9-NEXT: v_perm_b32 v28, v37, v61, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX9-NEXT: v_or_b32_e32 v27, v27, v28 +; GFX9-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:20 +; GFX9-NEXT: v_perm_b32 v27, v60, v54, s4 +; GFX9-NEXT: v_perm_b32 v25, v25, v33, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX9-NEXT: v_or_b32_e32 v25, v25, v27 +; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:24 +; GFX9-NEXT: v_perm_b32 v25, v26, v59, s4 +; GFX9-NEXT: v_perm_b32 v26, v57, v58, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX9-NEXT: v_or_b32_e32 v25, v25, v26 +; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:28 +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v23, v23, v56, s4 ; GFX9-NEXT: v_readlane_b32 s30, v63, 34 ; GFX9-NEXT: v_readlane_b32 s31, v63, 35 ; GFX9-NEXT: v_readlane_b32 s99, v63, 33 @@ -46334,263 +46451,241 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX9-NEXT: v_readlane_b32 s36, v63, 2 ; GFX9-NEXT: v_readlane_b32 s35, v63, 1 ; GFX9-NEXT: v_readlane_b32 s34, v63, 0 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v24, v24, v15, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v39, v44, v49, s4 -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v38, v47, v38, s4 +; GFX9-NEXT: v_perm_b32 v25, v25, v53, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX9-NEXT: v_or_b32_e32 v23, v23, v25 +; GFX9-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:32 +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v49, v15, v49, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v23, v24, v23, s4 +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v21, v21, v15, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v24, v24, v25, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX9-NEXT: v_or_b32_e32 v23, v23, v24 +; GFX9-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:36 +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v22, v22, v15, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v21, v23, s4 +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v15, v15, v50, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v50, 16, v55 -; GFX9-NEXT: v_or_b32_e32 v20, v20, v50 -; GFX9-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX9-NEXT: v_perm_b32 v23, v23, v52, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX9-NEXT: v_or_b32_e32 v21, v21, v23 +; GFX9-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:40 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v20, v20, v50, s4 +; GFX9-NEXT: v_perm_b32 v21, v22, v21, s4 +; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v22, v22, v23, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX9-NEXT: v_or_b32_e32 v21, v21, v22 +; GFX9-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:44 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v19, v19, v21, s4 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v21, v21, v51, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX9-NEXT: v_or_b32_e32 v19, v19, v21 +; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:48 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v19, v20, v19, s4 +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v20, v20, v21, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; GFX9-NEXT: v_or_b32_e32 v19, v19, v20 -; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v48 -; GFX9-NEXT: v_or_b32_e32 v18, v18, v19 -; GFX9-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:52 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v17, v17, v19, s4 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v19, v19, v50, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX9-NEXT: v_or_b32_e32 v17, v17, v19 +; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:56 +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4 +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v18, v19, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; GFX9-NEXT: v_or_b32_e32 v17, v17, v18 -; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v35 -; GFX9-NEXT: v_or_b32_e32 v17, v33, v17 -; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:60 +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v15, v15, v17, s4 +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v17, v17, v18, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_or_b32_e32 v16, v16, v17 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v34 -; GFX9-NEXT: v_or_b32_e32 v16, v31, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v32, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v36 -; GFX9-NEXT: v_or_b32_e32 v16, v29, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v30, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v37 -; GFX9-NEXT: v_or_b32_e32 v16, v27, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v28, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v38 -; GFX9-NEXT: v_or_b32_e32 v16, v25, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v26, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v39 -; GFX9-NEXT: v_or_b32_e32 v16, v23, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_e32 v15, v15, v17 +; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:64 +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v24, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v49 -; GFX9-NEXT: v_or_b32_e32 v16, v21, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:64 +; GFX9-NEXT: v_perm_b32 v15, v16, v15, s4 ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v22, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_e32 v15, v15, v16 +; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:68 +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v13, v16, s4 +; GFX9-NEXT: v_perm_b32 v13, v13, v15, s4 +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v15, v15, v16, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v15 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v14, v14, v15, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v11, v11, v13, s4 ; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4 +; GFX9-NEXT: v_perm_b32 v11, v11, v13, s4 +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v13, v13, v14, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v13 ; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4 -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v12, v12, v13, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 ; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v9, v9, v11, s4 -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4 +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v11 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4 -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v10, v10, v11, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v7, v9, s4 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v9 ; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v8, v8, v9, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 ; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v5, v7, s4 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v7 ; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:104 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v6, v7, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v3, v5, s4 ; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 ; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v4, v4, v5, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4 ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v3 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 @@ -46611,8 +46706,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -46622,88 +46717,86 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_or_saveexec_b32 s4, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-NEXT: scratch_store_b32 off, v73, s32 offset:68 ; GFX11-NEXT: scratch_store_b32 off, v74, s32 offset:72 ; GFX11-NEXT: scratch_store_b32 off, v75, s32 offset:76 ; GFX11-NEXT: scratch_store_b32 off, v76, s32 offset:80 -; GFX11-NEXT: scratch_store_b32 off, v77, s32 offset:84 ; GFX11-NEXT: s_mov_b32 exec_lo, s4 -; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Spill -; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:68 -; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:64 +; GFX11-NEXT: s_clause 0x10 ; 68-byte Folded Spill +; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:64 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:60 +; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:60 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:56 +; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:56 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:52 +; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:52 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:48 +; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:48 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:44 +; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:44 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:40 +; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:40 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:36 +; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:36 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:32 +; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:32 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:28 +; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:28 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:24 +; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:24 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:20 +; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:20 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:16 +; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:16 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:12 +; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:12 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:8 +; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:8 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v72, s32 offset:4 +; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:4 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v73, s32 -; GFX11-NEXT: v_writelane_b32 v74, s34, 0 -; GFX11-NEXT: v_writelane_b32 v74, s35, 1 -; GFX11-NEXT: v_writelane_b32 v74, s36, 2 -; GFX11-NEXT: v_writelane_b32 v74, s37, 3 -; GFX11-NEXT: v_writelane_b32 v74, s38, 4 -; GFX11-NEXT: v_writelane_b32 v74, s39, 5 -; GFX11-NEXT: v_writelane_b32 v74, s48, 6 -; GFX11-NEXT: v_writelane_b32 v74, s49, 7 -; GFX11-NEXT: v_writelane_b32 v74, s50, 8 -; GFX11-NEXT: v_writelane_b32 v74, s51, 9 -; GFX11-NEXT: v_writelane_b32 v74, s52, 10 -; GFX11-NEXT: v_writelane_b32 v74, s53, 11 -; GFX11-NEXT: v_writelane_b32 v74, s54, 12 -; GFX11-NEXT: v_writelane_b32 v74, s55, 13 -; GFX11-NEXT: v_writelane_b32 v74, s64, 14 -; GFX11-NEXT: v_writelane_b32 v74, s65, 15 -; GFX11-NEXT: v_writelane_b32 v74, s66, 16 -; GFX11-NEXT: v_writelane_b32 v74, s67, 17 -; GFX11-NEXT: v_writelane_b32 v74, s68, 18 -; GFX11-NEXT: v_writelane_b32 v74, s69, 19 -; GFX11-NEXT: v_writelane_b32 v74, s70, 20 -; GFX11-NEXT: v_writelane_b32 v74, s71, 21 -; GFX11-NEXT: v_writelane_b32 v74, s80, 22 -; GFX11-NEXT: v_writelane_b32 v74, s81, 23 -; GFX11-NEXT: v_writelane_b32 v74, s82, 24 -; GFX11-NEXT: v_writelane_b32 v74, s83, 25 -; GFX11-NEXT: v_writelane_b32 v74, s84, 26 -; GFX11-NEXT: v_writelane_b32 v74, s85, 27 -; GFX11-NEXT: v_writelane_b32 v74, s86, 28 -; GFX11-NEXT: v_writelane_b32 v74, s87, 29 -; GFX11-NEXT: v_writelane_b32 v74, s96, 30 -; GFX11-NEXT: v_writelane_b32 v74, s97, 31 -; GFX11-NEXT: v_writelane_b32 v75, s98, 0 -; GFX11-NEXT: v_writelane_b32 v75, s99, 1 -; GFX11-NEXT: v_writelane_b32 v75, s100, 2 -; GFX11-NEXT: v_writelane_b32 v75, s101, 3 -; GFX11-NEXT: v_writelane_b32 v75, s102, 4 -; GFX11-NEXT: v_writelane_b32 v75, s103, 5 -; GFX11-NEXT: v_writelane_b32 v75, s104, 6 -; GFX11-NEXT: v_writelane_b32 v75, s30, 7 -; GFX11-NEXT: v_writelane_b32 v75, s31, 8 +; GFX11-NEXT: scratch_store_b32 off, v72, s32 +; GFX11-NEXT: v_writelane_b32 v73, s34, 0 +; GFX11-NEXT: v_writelane_b32 v73, s35, 1 +; GFX11-NEXT: v_writelane_b32 v73, s36, 2 +; GFX11-NEXT: v_writelane_b32 v73, s37, 3 +; GFX11-NEXT: v_writelane_b32 v73, s38, 4 +; GFX11-NEXT: v_writelane_b32 v73, s39, 5 +; GFX11-NEXT: v_writelane_b32 v73, s48, 6 +; GFX11-NEXT: v_writelane_b32 v73, s49, 7 +; GFX11-NEXT: v_writelane_b32 v73, s50, 8 +; GFX11-NEXT: v_writelane_b32 v73, s51, 9 +; GFX11-NEXT: v_writelane_b32 v73, s52, 10 +; GFX11-NEXT: v_writelane_b32 v73, s53, 11 +; GFX11-NEXT: v_writelane_b32 v73, s54, 12 +; GFX11-NEXT: v_writelane_b32 v73, s55, 13 +; GFX11-NEXT: v_writelane_b32 v73, s64, 14 +; GFX11-NEXT: v_writelane_b32 v73, s65, 15 +; GFX11-NEXT: v_writelane_b32 v73, s66, 16 +; GFX11-NEXT: v_writelane_b32 v73, s67, 17 +; GFX11-NEXT: v_writelane_b32 v73, s68, 18 +; GFX11-NEXT: v_writelane_b32 v73, s69, 19 +; GFX11-NEXT: v_writelane_b32 v73, s70, 20 +; GFX11-NEXT: v_writelane_b32 v73, s71, 21 +; GFX11-NEXT: v_writelane_b32 v73, s80, 22 +; GFX11-NEXT: v_writelane_b32 v73, s81, 23 +; GFX11-NEXT: v_writelane_b32 v73, s82, 24 +; GFX11-NEXT: v_writelane_b32 v73, s83, 25 +; GFX11-NEXT: v_writelane_b32 v73, s84, 26 +; GFX11-NEXT: v_writelane_b32 v73, s85, 27 +; GFX11-NEXT: v_writelane_b32 v73, s86, 28 +; GFX11-NEXT: v_writelane_b32 v73, s87, 29 +; GFX11-NEXT: v_writelane_b32 v73, s96, 30 +; GFX11-NEXT: v_writelane_b32 v73, s97, 31 +; GFX11-NEXT: v_writelane_b32 v74, s98, 0 +; GFX11-NEXT: v_writelane_b32 v74, s99, 1 +; GFX11-NEXT: v_writelane_b32 v74, s100, 2 +; GFX11-NEXT: v_writelane_b32 v74, s101, 3 +; GFX11-NEXT: v_writelane_b32 v74, s102, 4 +; GFX11-NEXT: v_writelane_b32 v74, s103, 5 +; GFX11-NEXT: v_writelane_b32 v74, s104, 6 +; GFX11-NEXT: v_writelane_b32 v74, s30, 7 +; GFX11-NEXT: v_writelane_b32 v74, s31, 8 ; GFX11-NEXT: v_readfirstlane_b32 s42, v15 ; GFX11-NEXT: v_readfirstlane_b32 s5, v14 ; GFX11-NEXT: v_readfirstlane_b32 s4, v13 @@ -46721,155 +46814,155 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX11-NEXT: v_readfirstlane_b32 s40, v1 ; GFX11-NEXT: s_cmp_lg_u32 s42, 0 ; GFX11-NEXT: s_mov_b32 vcc_lo, 0 +; GFX11-NEXT: ; implicit-def: $vgpr75 : SGPR spill to VGPR lane ; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane -; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane ; GFX11-NEXT: s_cbranch_scc0 .LBB37_3 ; GFX11-NEXT: ; %bb.1: ; %cmp.false ; GFX11-NEXT: s_lshr_b32 s42, s5, 24 ; GFX11-NEXT: s_lshr_b32 vcc_hi, s27, 24 -; GFX11-NEXT: v_writelane_b32 v77, s42, 7 +; GFX11-NEXT: v_writelane_b32 v76, s42, 7 ; GFX11-NEXT: s_lshr_b32 s42, s5, 16 ; GFX11-NEXT: s_lshr_b32 s34, s27, 16 ; GFX11-NEXT: s_lshr_b32 s36, s27, 8 ; GFX11-NEXT: s_lshr_b32 s35, s26, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 6 +; GFX11-NEXT: v_writelane_b32 v76, s42, 6 ; GFX11-NEXT: s_lshr_b32 s42, s5, 8 ; GFX11-NEXT: s_lshr_b32 s37, s26, 8 ; GFX11-NEXT: s_lshr_b32 s38, s25, 24 ; GFX11-NEXT: s_lshr_b32 s39, s25, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 5 +; GFX11-NEXT: v_writelane_b32 v76, s42, 5 ; GFX11-NEXT: s_lshr_b32 s42, s4, 16 ; GFX11-NEXT: s_lshr_b32 s49, s25, 8 ; GFX11-NEXT: s_lshr_b32 s48, s24, 16 ; GFX11-NEXT: s_lshr_b32 s50, s24, 8 -; GFX11-NEXT: v_writelane_b32 v77, s42, 4 +; GFX11-NEXT: v_writelane_b32 v76, s42, 4 ; GFX11-NEXT: s_lshr_b32 s42, s4, 8 ; GFX11-NEXT: s_lshr_b32 s51, s23, 24 ; GFX11-NEXT: s_lshr_b32 s52, s23, 16 ; GFX11-NEXT: s_lshr_b32 s54, s23, 8 -; GFX11-NEXT: v_writelane_b32 v77, s42, 3 +; GFX11-NEXT: v_writelane_b32 v76, s42, 3 ; GFX11-NEXT: s_lshr_b32 s42, s7, 24 ; GFX11-NEXT: s_lshr_b32 s53, s22, 16 ; GFX11-NEXT: s_lshr_b32 s55, s22, 8 ; GFX11-NEXT: s_lshr_b32 s64, s21, 24 -; GFX11-NEXT: v_writelane_b32 v77, s42, 2 +; GFX11-NEXT: v_writelane_b32 v76, s42, 2 ; GFX11-NEXT: s_lshr_b32 s42, s7, 16 ; GFX11-NEXT: s_lshr_b32 s65, s21, 16 ; GFX11-NEXT: s_lshr_b32 s67, s21, 8 ; GFX11-NEXT: s_lshr_b32 s66, s20, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 1 +; GFX11-NEXT: v_writelane_b32 v76, s42, 1 ; GFX11-NEXT: s_lshr_b32 s42, s7, 8 ; GFX11-NEXT: s_lshr_b32 s68, s20, 8 ; GFX11-NEXT: s_lshr_b32 s69, s19, 24 ; GFX11-NEXT: s_lshr_b32 s70, s19, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 0 +; GFX11-NEXT: v_writelane_b32 v76, s42, 0 ; GFX11-NEXT: s_lshr_b32 s42, s6, 16 ; GFX11-NEXT: s_lshr_b32 s80, s19, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 31 +; GFX11-NEXT: v_writelane_b32 v75, s42, 31 ; GFX11-NEXT: s_lshr_b32 s42, s6, 8 ; GFX11-NEXT: s_lshr_b32 s71, s18, 16 ; GFX11-NEXT: s_lshr_b32 s81, s18, 8 ; GFX11-NEXT: s_lshr_b32 s82, s17, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 30 +; GFX11-NEXT: v_writelane_b32 v75, s42, 30 ; GFX11-NEXT: s_lshr_b32 s42, s9, 24 ; GFX11-NEXT: s_lshr_b32 s83, s17, 16 ; GFX11-NEXT: s_lshr_b32 s85, s17, 8 ; GFX11-NEXT: s_lshr_b32 s84, s16, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 29 +; GFX11-NEXT: v_writelane_b32 v75, s42, 29 ; GFX11-NEXT: s_lshr_b32 s42, s9, 16 ; GFX11-NEXT: s_lshr_b32 s86, s16, 8 ; GFX11-NEXT: s_lshr_b32 s87, s3, 24 ; GFX11-NEXT: s_lshr_b32 s96, s3, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 28 +; GFX11-NEXT: v_writelane_b32 v75, s42, 28 ; GFX11-NEXT: s_lshr_b32 s42, s9, 8 ; GFX11-NEXT: s_lshr_b32 s98, s3, 8 ; GFX11-NEXT: s_lshr_b32 s97, s2, 16 ; GFX11-NEXT: s_lshr_b32 s99, s2, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 27 +; GFX11-NEXT: v_writelane_b32 v75, s42, 27 ; GFX11-NEXT: s_lshr_b32 s42, s8, 16 ; GFX11-NEXT: s_lshr_b32 s100, s1, 24 ; GFX11-NEXT: s_lshr_b32 s101, s1, 16 ; GFX11-NEXT: s_lshr_b32 s103, s1, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 26 +; GFX11-NEXT: v_writelane_b32 v75, s42, 26 ; GFX11-NEXT: s_lshr_b32 s42, s8, 8 ; GFX11-NEXT: s_lshr_b32 s102, s0, 16 ; GFX11-NEXT: s_lshr_b32 s104, s0, 8 -; GFX11-NEXT: s_lshr_b64 s[72:73], s[4:5], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 25 +; GFX11-NEXT: s_lshr_b64 s[30:31], s[4:5], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 25 ; GFX11-NEXT: s_lshr_b32 s42, s11, 24 -; GFX11-NEXT: s_lshr_b64 s[74:75], s[6:7], 24 -; GFX11-NEXT: s_lshr_b64 s[76:77], s[8:9], 24 -; GFX11-NEXT: s_lshr_b64 s[78:79], s[10:11], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 24 +; GFX11-NEXT: s_lshr_b64 s[94:95], s[6:7], 24 +; GFX11-NEXT: s_lshr_b64 s[92:93], s[8:9], 24 +; GFX11-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 24 ; GFX11-NEXT: s_lshr_b32 s42, s11, 16 ; GFX11-NEXT: s_lshr_b64 s[88:89], s[12:13], 24 -; GFX11-NEXT: s_lshr_b64 s[90:91], s[14:15], 24 -; GFX11-NEXT: s_lshr_b64 s[92:93], s[40:41], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 23 +; GFX11-NEXT: s_lshr_b64 s[78:79], s[14:15], 24 +; GFX11-NEXT: s_lshr_b64 s[76:77], s[40:41], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 23 ; GFX11-NEXT: s_lshr_b32 s42, s11, 8 -; GFX11-NEXT: s_lshr_b64 s[94:95], s[28:29], 24 -; GFX11-NEXT: s_lshr_b64 s[30:31], s[26:27], 24 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX11-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 ; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 22 +; GFX11-NEXT: v_writelane_b32 v75, s42, 22 ; GFX11-NEXT: s_lshr_b32 s42, s10, 16 ; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 ; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24 ; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 21 +; GFX11-NEXT: v_writelane_b32 v75, s42, 21 ; GFX11-NEXT: s_lshr_b32 s42, s10, 8 ; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24 ; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 20 +; GFX11-NEXT: v_writelane_b32 v75, s42, 20 ; GFX11-NEXT: s_lshr_b32 s42, s13, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 19 +; GFX11-NEXT: v_writelane_b32 v75, s42, 19 ; GFX11-NEXT: s_lshr_b32 s42, s13, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 18 +; GFX11-NEXT: v_writelane_b32 v75, s42, 18 ; GFX11-NEXT: s_lshr_b32 s42, s13, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 17 +; GFX11-NEXT: v_writelane_b32 v75, s42, 17 ; GFX11-NEXT: s_lshr_b32 s42, s12, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 16 +; GFX11-NEXT: v_writelane_b32 v75, s42, 16 ; GFX11-NEXT: s_lshr_b32 s42, s12, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 15 +; GFX11-NEXT: v_writelane_b32 v75, s42, 15 ; GFX11-NEXT: s_lshr_b32 s42, s15, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 14 +; GFX11-NEXT: v_writelane_b32 v75, s42, 14 ; GFX11-NEXT: s_lshr_b32 s42, s15, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 13 +; GFX11-NEXT: v_writelane_b32 v75, s42, 13 ; GFX11-NEXT: s_lshr_b32 s42, s15, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 12 +; GFX11-NEXT: v_writelane_b32 v75, s42, 12 ; GFX11-NEXT: s_lshr_b32 s42, s14, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 11 +; GFX11-NEXT: v_writelane_b32 v75, s42, 11 ; GFX11-NEXT: s_lshr_b32 s42, s14, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 10 +; GFX11-NEXT: v_writelane_b32 v75, s42, 10 ; GFX11-NEXT: s_lshr_b32 s42, s41, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 9 +; GFX11-NEXT: v_writelane_b32 v75, s42, 9 ; GFX11-NEXT: s_lshr_b32 s42, s41, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 8 +; GFX11-NEXT: v_writelane_b32 v75, s42, 8 ; GFX11-NEXT: s_lshr_b32 s42, s41, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 7 +; GFX11-NEXT: v_writelane_b32 v75, s42, 7 ; GFX11-NEXT: s_lshr_b32 s42, s40, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 6 +; GFX11-NEXT: v_writelane_b32 v75, s42, 6 ; GFX11-NEXT: s_lshr_b32 s42, s40, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 5 +; GFX11-NEXT: v_writelane_b32 v75, s42, 5 ; GFX11-NEXT: s_lshr_b32 s42, s29, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 4 +; GFX11-NEXT: v_writelane_b32 v75, s42, 4 ; GFX11-NEXT: s_lshr_b32 s42, s29, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 3 +; GFX11-NEXT: v_writelane_b32 v75, s42, 3 ; GFX11-NEXT: s_lshr_b32 s42, s29, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 2 +; GFX11-NEXT: v_writelane_b32 v75, s42, 2 ; GFX11-NEXT: s_lshr_b32 s42, s28, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 1 +; GFX11-NEXT: v_writelane_b32 v75, s42, 1 ; GFX11-NEXT: s_lshr_b32 s42, s28, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 0 +; GFX11-NEXT: v_writelane_b32 v75, s42, 0 ; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24 ; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_lo ; GFX11-NEXT: s_cbranch_vccnz .LBB37_4 @@ -46922,86 +47015,86 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[9:10] ; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] ; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[33:34] -; GFX11-NEXT: v_lshrrev_b32_e32 v70, 24, v2 -; GFX11-NEXT: v_lshrrev_b32_e32 v69, 16, v2 +; GFX11-NEXT: v_lshrrev_b32_e32 v69, 24, v2 +; GFX11-NEXT: v_lshrrev_b32_e32 v68, 16, v2 ; GFX11-NEXT: v_lshrrev_b32_e32 v39, 8, v2 -; GFX11-NEXT: v_lshrrev_b32_e32 v71, 16, v1 +; GFX11-NEXT: v_lshrrev_b32_e32 v70, 16, v1 ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 8, v1 -; GFX11-NEXT: v_lshrrev_b32_e32 v83, 24, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v81, 16, v4 +; GFX11-NEXT: v_lshrrev_b32_e32 v82, 24, v4 +; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v4 ; GFX11-NEXT: v_lshrrev_b32_e32 v55, 8, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v3 -; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v3 -; GFX11-NEXT: v_lshrrev_b32_e32 v86, 24, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v85, 16, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v80, 8, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v98, 16, v5 -; GFX11-NEXT: v_lshrrev_b32_e32 v96, 8, v5 -; GFX11-NEXT: v_lshrrev_b32_e32 v100, 24, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v99, 16, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v101, 16, v7 -; GFX11-NEXT: v_lshrrev_b32_e32 v97, 8, v7 -; GFX11-NEXT: v_lshrrev_b32_e32 v112, 24, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v103, 16, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v102, 8, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v116, 16, v9 -; GFX11-NEXT: v_lshrrev_b32_e32 v114, 8, v9 -; GFX11-NEXT: v_lshrrev_b32_e32 v118, 24, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v117, 16, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v113, 8, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v119, 16, v11 -; GFX11-NEXT: v_lshrrev_b32_e32 v115, 8, v11 -; GFX11-NEXT: v_lshrrev_b32_e32 v130, 24, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v129, 16, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v128, 8, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v134, 16, v13 -; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v13 -; GFX11-NEXT: v_lshrrev_b32_e32 v144, 24, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v135, 16, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v15 -; GFX11-NEXT: v_lshrrev_b32_e32 v133, 8, v15 -; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v147, 16, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v146, 8, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v151, 16, v17 -; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v17 -; GFX11-NEXT: v_lshrrev_b32_e32 v162, 24, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v161, 16, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v163, 16, v19 -; GFX11-NEXT: v_lshrrev_b32_e32 v160, 8, v19 -; GFX11-NEXT: v_lshrrev_b32_e32 v166, 24, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v165, 16, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v164, 8, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v177, 16, v21 -; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v21 -; GFX11-NEXT: v_lshrrev_b32_e32 v180, 24, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v23 -; GFX11-NEXT: v_lshrrev_b32_e32 v178, 8, v23 -; GFX11-NEXT: v_lshrrev_b32_e32 v41, 24, v26 -; GFX11-NEXT: v_lshrrev_b32_e32 v40, 16, v26 -; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v26 -; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v25 -; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v25 -; GFX11-NEXT: v_lshrrev_b32_e32 v45, 24, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v42, 8, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v47, 16, v27 -; GFX11-NEXT: v_lshrrev_b32_e32 v46, 8, v27 -; GFX11-NEXT: v_lshrrev_b32_e32 v59, 24, v32 -; GFX11-NEXT: v_lshrrev_b32_e32 v58, 16, v32 -; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v32 -; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v31 -; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v31 +; GFX11-NEXT: v_lshrrev_b32_e32 v83, 16, v3 +; GFX11-NEXT: v_lshrrev_b32_e32 v81, 8, v3 +; GFX11-NEXT: v_lshrrev_b32_e32 v85, 24, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v71, 8, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v97, 16, v5 +; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v5 +; GFX11-NEXT: v_lshrrev_b32_e32 v99, 24, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v98, 16, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v86, 8, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v100, 16, v7 +; GFX11-NEXT: v_lshrrev_b32_e32 v96, 8, v7 +; GFX11-NEXT: v_lshrrev_b32_e32 v103, 24, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v102, 16, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v101, 8, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v115, 16, v9 +; GFX11-NEXT: v_lshrrev_b32_e32 v113, 8, v9 +; GFX11-NEXT: v_lshrrev_b32_e32 v117, 24, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v116, 16, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v112, 8, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v118, 16, v11 +; GFX11-NEXT: v_lshrrev_b32_e32 v114, 8, v11 +; GFX11-NEXT: v_lshrrev_b32_e32 v129, 24, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v128, 16, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v119, 8, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v133, 16, v13 +; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v13 +; GFX11-NEXT: v_lshrrev_b32_e32 v135, 24, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v134, 16, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v130, 8, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v144, 16, v15 +; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v15 +; GFX11-NEXT: v_lshrrev_b32_e32 v147, 24, v18 +; GFX11-NEXT: v_lshrrev_b32_e32 v146, 16, v18 +; GFX11-NEXT: v_lshrrev_b32_e32 v145, 8, v18 +; GFX11-NEXT: v_lshrrev_b32_e32 v150, 16, v17 +; GFX11-NEXT: v_lshrrev_b32_e32 v148, 8, v17 +; GFX11-NEXT: v_lshrrev_b32_e32 v161, 24, v20 +; GFX11-NEXT: v_lshrrev_b32_e32 v160, 16, v20 +; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v20 +; GFX11-NEXT: v_lshrrev_b32_e32 v162, 16, v19 +; GFX11-NEXT: v_lshrrev_b32_e32 v151, 8, v19 +; GFX11-NEXT: v_lshrrev_b32_e32 v165, 24, v22 +; GFX11-NEXT: v_lshrrev_b32_e32 v164, 16, v22 +; GFX11-NEXT: v_lshrrev_b32_e32 v163, 8, v22 +; GFX11-NEXT: v_lshrrev_b32_e32 v176, 16, v21 +; GFX11-NEXT: v_lshrrev_b32_e32 v166, 8, v21 +; GFX11-NEXT: v_lshrrev_b32_e32 v179, 24, v24 +; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v24 +; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v24 +; GFX11-NEXT: v_lshrrev_b32_e32 v180, 16, v23 +; GFX11-NEXT: v_lshrrev_b32_e32 v177, 8, v23 +; GFX11-NEXT: v_lshrrev_b32_e32 v40, 24, v26 +; GFX11-NEXT: v_lshrrev_b32_e32 v183, 16, v26 +; GFX11-NEXT: v_lshrrev_b32_e32 v181, 8, v26 +; GFX11-NEXT: v_lshrrev_b32_e32 v42, 16, v25 +; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v25 +; GFX11-NEXT: v_lshrrev_b32_e32 v44, 24, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v41, 8, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v46, 16, v27 +; GFX11-NEXT: v_lshrrev_b32_e32 v45, 8, v27 +; GFX11-NEXT: v_lshrrev_b32_e32 v58, 24, v32 +; GFX11-NEXT: v_lshrrev_b32_e32 v57, 16, v32 +; GFX11-NEXT: v_lshrrev_b32_e32 v47, 8, v32 +; GFX11-NEXT: v_lshrrev_b32_e32 v59, 16, v31 +; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v31 ; GFX11-NEXT: v_lshrrev_b32_e32 v62, 24, v34 ; GFX11-NEXT: v_lshrrev_b32_e32 v61, 16, v34 -; GFX11-NEXT: v_lshrrev_b32_e32 v63, 8, v34 -; GFX11-NEXT: v_lshrrev_b32_e32 v73, 16, v33 -; GFX11-NEXT: v_lshrrev_b32_e32 v72, 8, v33 +; GFX11-NEXT: v_lshrrev_b32_e32 v60, 8, v34 +; GFX11-NEXT: v_lshrrev_b32_e32 v72, 16, v33 +; GFX11-NEXT: v_lshrrev_b32_e32 v63, 8, v33 ; GFX11-NEXT: s_branch .LBB37_5 ; GFX11-NEXT: .LBB37_3: ; GFX11-NEXT: ; implicit-def: $sgpr43 @@ -47052,18 +47145,18 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX11-NEXT: ; implicit-def: $sgpr38 ; GFX11-NEXT: ; implicit-def: $sgpr37 ; GFX11-NEXT: ; implicit-def: $sgpr35 +; GFX11-NEXT: ; implicit-def: $sgpr72 ; GFX11-NEXT: ; implicit-def: $sgpr36 ; GFX11-NEXT: ; implicit-def: $sgpr34 ; GFX11-NEXT: ; implicit-def: $vcc_hi -; GFX11-NEXT: ; implicit-def: $sgpr30 -; GFX11-NEXT: ; implicit-def: $sgpr94 -; GFX11-NEXT: ; implicit-def: $sgpr92 -; GFX11-NEXT: ; implicit-def: $sgpr90 -; GFX11-NEXT: ; implicit-def: $sgpr88 -; GFX11-NEXT: ; implicit-def: $sgpr78 -; GFX11-NEXT: ; implicit-def: $sgpr76 ; GFX11-NEXT: ; implicit-def: $sgpr74 -; GFX11-NEXT: ; implicit-def: $sgpr72 +; GFX11-NEXT: ; implicit-def: $sgpr76 +; GFX11-NEXT: ; implicit-def: $sgpr78 +; GFX11-NEXT: ; implicit-def: $sgpr88 +; GFX11-NEXT: ; implicit-def: $sgpr90 +; GFX11-NEXT: ; implicit-def: $sgpr92 +; GFX11-NEXT: ; implicit-def: $sgpr94 +; GFX11-NEXT: ; implicit-def: $sgpr30 ; GFX11-NEXT: ; implicit-def: $sgpr43 ; GFX11-NEXT: ; kill: killed $sgpr43 ; GFX11-NEXT: ; implicit-def: $sgpr43 @@ -47143,271 +47236,270 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX11-NEXT: s_branch .LBB37_2 ; GFX11-NEXT: .LBB37_4: ; GFX11-NEXT: v_dual_mov_b32 v33, s0 :: v_dual_mov_b32 v34, s1 -; GFX11-NEXT: v_readlane_b32 s0, v76, 0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 0 ; GFX11-NEXT: v_dual_mov_b32 v31, s2 :: v_dual_mov_b32 v32, s3 ; GFX11-NEXT: v_dual_mov_b32 v27, s16 :: v_dual_mov_b32 v28, s17 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v133, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 1 +; GFX11-NEXT: v_mov_b32_e32 v132, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 1 ; GFX11-NEXT: v_dual_mov_b32 v25, s18 :: v_dual_mov_b32 v26, s19 ; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21 -; GFX11-NEXT: v_mov_b32_e32 v145, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 2 +; GFX11-NEXT: v_mov_b32_e32 v144, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 2 ; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23 ; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v131, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 3 +; GFX11-NEXT: v_mov_b32_e32 v130, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 3 ; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27 ; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29 -; GFX11-NEXT: v_mov_b32_e32 v135, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 4 +; GFX11-NEXT: v_mov_b32_e32 v134, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 4 ; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41 ; GFX11-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v144, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 5 +; GFX11-NEXT: v_mov_b32_e32 v135, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 5 ; GFX11-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13 ; GFX11-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11 -; GFX11-NEXT: v_mov_b32_e32 v132, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 6 +; GFX11-NEXT: v_mov_b32_e32 v131, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 6 ; GFX11-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9 ; GFX11-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v134, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 7 +; GFX11-NEXT: v_mov_b32_e32 v133, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 7 ; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5 -; GFX11-NEXT: v_dual_mov_b32 v72, s104 :: v_dual_mov_b32 v73, s102 -; GFX11-NEXT: v_mov_b32_e32 v128, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 8 -; GFX11-NEXT: v_dual_mov_b32 v63, s103 :: v_dual_mov_b32 v62, s100 -; GFX11-NEXT: v_dual_mov_b32 v61, s101 :: v_dual_mov_b32 v60, s97 +; GFX11-NEXT: v_dual_mov_b32 v63, s104 :: v_dual_mov_b32 v72, s102 +; GFX11-NEXT: v_mov_b32_e32 v119, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 8 +; GFX11-NEXT: v_dual_mov_b32 v60, s103 :: v_dual_mov_b32 v61, s101 +; GFX11-NEXT: v_dual_mov_b32 v62, s100 :: v_dual_mov_b32 v59, s97 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mov_b32_e32 v128, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 9 +; GFX11-NEXT: v_dual_mov_b32 v56, s99 :: v_dual_mov_b32 v47, s98 +; GFX11-NEXT: v_dual_mov_b32 v57, s96 :: v_dual_mov_b32 v58, s87 ; GFX11-NEXT: v_mov_b32_e32 v129, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 9 -; GFX11-NEXT: v_dual_mov_b32 v57, s99 :: v_dual_mov_b32 v56, s98 -; GFX11-NEXT: v_dual_mov_b32 v58, s96 :: v_dual_mov_b32 v59, s87 -; GFX11-NEXT: v_mov_b32_e32 v130, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 10 -; GFX11-NEXT: v_dual_mov_b32 v46, s86 :: v_dual_mov_b32 v47, s84 -; GFX11-NEXT: v_dual_mov_b32 v42, s85 :: v_dual_mov_b32 v45, s82 +; GFX11-NEXT: v_readlane_b32 s0, v75, 10 +; GFX11-NEXT: v_dual_mov_b32 v45, s86 :: v_dual_mov_b32 v46, s84 +; GFX11-NEXT: v_dual_mov_b32 v41, s85 :: v_dual_mov_b32 v44, s82 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v115, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 11 -; GFX11-NEXT: v_dual_mov_b32 v44, s83 :: v_dual_mov_b32 v183, s81 -; GFX11-NEXT: v_dual_mov_b32 v43, s71 :: v_dual_mov_b32 v182, s80 -; GFX11-NEXT: v_mov_b32_e32 v119, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 12 -; GFX11-NEXT: v_dual_mov_b32 v40, s70 :: v_dual_mov_b32 v41, s69 -; GFX11-NEXT: v_dual_mov_b32 v178, s68 :: v_dual_mov_b32 v181, s66 +; GFX11-NEXT: v_mov_b32_e32 v114, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 11 +; GFX11-NEXT: v_dual_mov_b32 v43, s83 :: v_dual_mov_b32 v182, s81 +; GFX11-NEXT: v_dual_mov_b32 v42, s71 :: v_dual_mov_b32 v181, s80 +; GFX11-NEXT: v_mov_b32_e32 v118, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 12 +; GFX11-NEXT: v_dual_mov_b32 v183, s70 :: v_dual_mov_b32 v40, s69 +; GFX11-NEXT: v_dual_mov_b32 v177, s68 :: v_dual_mov_b32 v180, s66 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mov_b32_e32 v112, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 13 +; GFX11-NEXT: v_dual_mov_b32 v167, s67 :: v_dual_mov_b32 v178, s65 +; GFX11-NEXT: v_dual_mov_b32 v179, s64 :: v_dual_mov_b32 v166, s55 +; GFX11-NEXT: v_mov_b32_e32 v116, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 14 +; GFX11-NEXT: v_dual_mov_b32 v176, s53 :: v_dual_mov_b32 v163, s54 +; GFX11-NEXT: v_dual_mov_b32 v164, s52 :: v_dual_mov_b32 v165, s51 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v113, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 13 -; GFX11-NEXT: v_dual_mov_b32 v176, s67 :: v_dual_mov_b32 v179, s65 -; GFX11-NEXT: v_dual_mov_b32 v180, s64 :: v_dual_mov_b32 v167, s55 ; GFX11-NEXT: v_mov_b32_e32 v117, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 14 -; GFX11-NEXT: v_dual_mov_b32 v177, s53 :: v_dual_mov_b32 v164, s54 -; GFX11-NEXT: v_dual_mov_b32 v165, s52 :: v_dual_mov_b32 v166, s51 +; GFX11-NEXT: v_readlane_b32 s0, v75, 15 +; GFX11-NEXT: v_dual_mov_b32 v151, s50 :: v_dual_mov_b32 v162, s48 +; GFX11-NEXT: v_dual_mov_b32 v149, s49 :: v_dual_mov_b32 v160, s39 +; GFX11-NEXT: v_mov_b32_e32 v113, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 16 +; GFX11-NEXT: v_dual_mov_b32 v161, s38 :: v_dual_mov_b32 v148, s37 +; GFX11-NEXT: v_dual_mov_b32 v150, s35 :: v_dual_mov_b32 v145, s36 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v118, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 15 -; GFX11-NEXT: v_dual_mov_b32 v160, s50 :: v_dual_mov_b32 v163, s48 -; GFX11-NEXT: v_dual_mov_b32 v150, s49 :: v_dual_mov_b32 v161, s39 -; GFX11-NEXT: v_mov_b32_e32 v114, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 16 -; GFX11-NEXT: v_dual_mov_b32 v162, s38 :: v_dual_mov_b32 v149, s37 -; GFX11-NEXT: v_dual_mov_b32 v151, s35 :: v_dual_mov_b32 v146, s36 +; GFX11-NEXT: v_mov_b32_e32 v115, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 17 +; GFX11-NEXT: v_dual_mov_b32 v146, s34 :: v_dual_mov_b32 v147, vcc_hi +; GFX11-NEXT: v_dual_mov_b32 v29, s30 :: v_dual_mov_b32 v36, s92 +; GFX11-NEXT: v_mov_b32_e32 v101, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 18 +; GFX11-NEXT: v_dual_mov_b32 v35, s94 :: v_dual_mov_b32 v38, s88 +; GFX11-NEXT: v_dual_mov_b32 v37, s90 :: v_dual_mov_b32 v48, s78 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v116, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 17 -; GFX11-NEXT: v_dual_mov_b32 v147, s34 :: v_dual_mov_b32 v148, vcc_hi -; GFX11-NEXT: v_dual_mov_b32 v29, s72 :: v_dual_mov_b32 v48, s90 ; GFX11-NEXT: v_mov_b32_e32 v102, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 18 -; GFX11-NEXT: v_dual_mov_b32 v35, s74 :: v_dual_mov_b32 v50, s94 -; GFX11-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v52, s62 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_readlane_b32 s0, v75, 19 +; GFX11-NEXT: v_dual_mov_b32 v49, s76 :: v_dual_mov_b32 v50, s74 +; GFX11-NEXT: v_dual_mov_b32 v51, s72 :: v_dual_mov_b32 v52, s62 ; GFX11-NEXT: v_mov_b32_e32 v103, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 19 -; GFX11-NEXT: v_dual_mov_b32 v49, s92 :: v_dual_mov_b32 v54, s58 -; GFX11-NEXT: v_dual_mov_b32 v51, s30 :: v_dual_mov_b32 v64, s56 -; GFX11-NEXT: v_mov_b32_e32 v112, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 20 -; GFX11-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v66, s44 -; GFX11-NEXT: v_mov_b32_e32 v65, s46 -; GFX11-NEXT: v_mov_b32_e32 v67, s42 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_mov_b32_e32 v97, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 21 -; GFX11-NEXT: v_mov_b32_e32 v36, s76 -; GFX11-NEXT: v_dual_mov_b32 v38, s88 :: v_dual_mov_b32 v101, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 22 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v87, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 23 -; GFX11-NEXT: v_mov_b32_e32 v99, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 24 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v100, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 25 +; GFX11-NEXT: v_readlane_b32 s0, v75, 20 +; GFX11-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v54, s58 +; GFX11-NEXT: v_dual_mov_b32 v64, s56 :: v_dual_mov_b32 v65, s46 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2) ; GFX11-NEXT: v_mov_b32_e32 v96, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 26 +; GFX11-NEXT: v_readlane_b32 s0, v75, 21 +; GFX11-NEXT: v_dual_mov_b32 v66, s44 :: v_dual_mov_b32 v67, s42 +; GFX11-NEXT: v_mov_b32_e32 v100, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 22 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v86, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 23 ; GFX11-NEXT: v_mov_b32_e32 v98, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 27 -; GFX11-NEXT: v_mov_b32_e32 v80, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 28 +; GFX11-NEXT: v_readlane_b32 s0, v75, 24 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v85, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 29 -; GFX11-NEXT: v_mov_b32_e32 v86, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 30 +; GFX11-NEXT: v_mov_b32_e32 v99, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 25 +; GFX11-NEXT: v_mov_b32_e32 v87, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 26 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v97, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 27 +; GFX11-NEXT: v_mov_b32_e32 v71, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 28 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v82, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 31 ; GFX11-NEXT: v_mov_b32_e32 v84, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 29 +; GFX11-NEXT: v_mov_b32_e32 v85, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 30 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v55, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 1 ; GFX11-NEXT: v_mov_b32_e32 v81, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 2 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_readlane_b32 s0, v75, 31 ; GFX11-NEXT: v_mov_b32_e32 v83, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 3 +; GFX11-NEXT: v_readlane_b32 s0, v76, 0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v55, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 1 +; GFX11-NEXT: v_mov_b32_e32 v80, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 2 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v82, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 3 ; GFX11-NEXT: v_mov_b32_e32 v30, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 4 +; GFX11-NEXT: v_readlane_b32 s0, v76, 4 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v71, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 5 +; GFX11-NEXT: v_mov_b32_e32 v70, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 5 ; GFX11-NEXT: v_mov_b32_e32 v39, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 6 +; GFX11-NEXT: v_readlane_b32 s0, v76, 6 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v68, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 7 ; GFX11-NEXT: v_mov_b32_e32 v69, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 7 -; GFX11-NEXT: v_mov_b32_e32 v70, s0 ; GFX11-NEXT: .LBB37_5: ; %end ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_perm_b32 v67, v73, v67, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v66, v60, v66, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v33, v33, v72, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v68, v61, v62, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v57, v31, v57, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v67, v72, v67, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v66, v59, v66, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v33, v33, v63, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v56, v31, v56, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v61, v61, v62, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67 ; GFX11-NEXT: v_lshlrev_b32_e32 v66, 16, v66 -; GFX11-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v34, v34, v63, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68 +; GFX11-NEXT: v_perm_b32 v57, v57, v58, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v65, v46, v65, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v64, v42, v64, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v31, v33, v67 -; GFX11-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v33, v57, v66 -; GFX11-NEXT: v_perm_b32 v66, v44, v45, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v67, v40, v41, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v56, v32, v56, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v58 -; GFX11-NEXT: v_perm_b32 v53, v177, v53, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v32, v34, v68 -; GFX11-NEXT: v_perm_b32 v27, v27, v46, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v33, v56, v66 +; GFX11-NEXT: v_perm_b32 v66, v43, v44, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v67, v183, v40, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v34, v34, v60, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v61 +; GFX11-NEXT: v_perm_b32 v47, v32, v47, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v57, 16, v57 +; GFX11-NEXT: v_perm_b32 v53, v176, v53, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v27, v27, v45, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v65, 16, v65 -; GFX11-NEXT: v_perm_b32 v28, v28, v42, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v28, v28, v41, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v66, 16, v66 -; GFX11-NEXT: v_perm_b32 v68, v25, v183, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v182, v25, v182, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64 -; GFX11-NEXT: v_perm_b32 v182, v26, v182, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v181, v26, v181, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67 -; GFX11-NEXT: v_or_b32_e32 v34, v56, v58 -; GFX11-NEXT: v_perm_b32 v21, v21, v167, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v32, v34, v58 +; GFX11-NEXT: v_or_b32_e32 v34, v47, v57 +; GFX11-NEXT: v_perm_b32 v21, v21, v166, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v53, 16, v53 ; GFX11-NEXT: v_or_b32_e32 v25, v27, v65 ; GFX11-NEXT: v_or_b32_e32 v26, v28, v66 -; GFX11-NEXT: v_or_b32_e32 v27, v68, v64 -; GFX11-NEXT: v_or_b32_e32 v28, v182, v67 +; GFX11-NEXT: v_or_b32_e32 v27, v182, v64 +; GFX11-NEXT: v_or_b32_e32 v28, v181, v67 ; GFX11-NEXT: s_clause 0x1 ; GFX11-NEXT: scratch_store_b128 v0, v[31:34], off ; GFX11-NEXT: scratch_store_b128 v0, v[25:28], off offset:16 -; GFX11-NEXT: v_perm_b32 v26, v165, v166, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v26, v164, v165, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v25, v21, v53 -; GFX11-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v28, v151, v51, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v27, v161, v162, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v21, v22, v163, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v22, v162, v52, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v28, v150, v51, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v27, v160, v161, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; GFX11-NEXT: v_perm_b32 v19, v19, v160, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; GFX11-NEXT: v_perm_b32 v17, v17, v149, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v17, v17, v148, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; GFX11-NEXT: v_perm_b32 v20, v20, v150, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; GFX11-NEXT: v_or_b32_e32 v26, v21, v26 ; GFX11-NEXT: v_or_b32_e32 v19, v19, v22 -; GFX11-NEXT: v_perm_b32 v22, v147, v148, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v22, v146, v147, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v21, v17, v28 -; GFX11-NEXT: v_perm_b32 v17, v18, v146, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v18, v145, v50, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v28, v134, v49, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v17, v18, v145, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v18, v144, v50, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v28, v133, v49, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v20, v20, v27 -; GFX11-NEXT: v_perm_b32 v27, v135, v144, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v27, v134, v135, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; GFX11-NEXT: v_perm_b32 v15, v15, v133, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v15, v15, v132, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-NEXT: v_perm_b32 v13, v13, v132, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v13, v13, v131, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; GFX11-NEXT: v_perm_b32 v16, v16, v131, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v16, v16, v130, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; GFX11-NEXT: v_or_b32_e32 v22, v17, v22 ; GFX11-NEXT: v_or_b32_e32 v15, v15, v18 -; GFX11-NEXT: v_perm_b32 v18, v129, v130, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v18, v128, v129, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v17, v13, v28 -; GFX11-NEXT: v_perm_b32 v28, v116, v38, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v28, v115, v38, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v16, v16, v27 -; GFX11-NEXT: v_perm_b32 v13, v14, v128, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v14, v119, v48, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v27, v117, v118, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v13, v14, v119, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v14, v118, v48, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v27, v116, v117, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-NEXT: v_perm_b32 v9, v9, v114, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v9, v9, v113, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; GFX11-NEXT: v_perm_b32 v11, v11, v115, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v11, v11, v114, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-NEXT: v_perm_b32 v12, v12, v113, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v12, v12, v112, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; GFX11-NEXT: v_or_b32_e32 v18, v13, v18 ; GFX11-NEXT: v_or_b32_e32 v13, v9, v28 -; GFX11-NEXT: v_perm_b32 v9, v10, v102, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v10, v101, v37, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v9, v10, v101, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v10, v100, v37, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v11, v11, v14 -; GFX11-NEXT: v_perm_b32 v14, v103, v112, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v14, v102, v103, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v12, v12, v27 -; GFX11-NEXT: v_perm_b32 v27, v99, v100, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v28, v98, v36, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v7, v7, v97, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v27, v98, v99, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v28, v97, v36, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v7, v7, v96, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; GFX11-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v54, v180, v54, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v64, v178, v179, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-NEXT: v_perm_b32 v8, v8, v87, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v8, v8, v86, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; GFX11-NEXT: v_perm_b32 v5, v5, v96, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v5, v5, v87, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; GFX11-NEXT: v_or_b32_e32 v7, v7, v10 -; GFX11-NEXT: v_perm_b32 v10, v85, v86, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v23, v23, v178, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v10, v84, v85, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v23, v23, v177, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v54, 16, v54 -; GFX11-NEXT: v_perm_b32 v24, v24, v176, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v24, v24, v167, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64 ; GFX11-NEXT: v_or_b32_e32 v14, v9, v14 ; GFX11-NEXT: v_or_b32_e32 v8, v8, v27 ; GFX11-NEXT: v_or_b32_e32 v9, v5, v28 -; GFX11-NEXT: v_perm_b32 v5, v84, v35, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v27, v81, v83, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v28, v71, v29, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v29, v69, v70, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v6, v6, v80, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v5, v83, v35, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v27, v80, v82, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v28, v70, v29, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v29, v68, v69, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v6, v6, v71, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX11-NEXT: v_or_b32_e32 v23, v23, v54 ; GFX11-NEXT: v_or_b32_e32 v24, v24, v64 -; GFX11-NEXT: v_perm_b32 v3, v3, v82, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v3, v3, v81, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX11-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27 @@ -47427,72 +47519,71 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, ; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:80 ; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off offset:96 ; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:112 -; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Reload -; GFX11-NEXT: scratch_load_b32 v73, off, s32 -; GFX11-NEXT: scratch_load_b32 v72, off, s32 offset:4 -; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:8 -; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:12 -; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:16 -; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:20 -; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:24 -; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:28 -; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:32 -; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:36 -; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:40 -; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:44 -; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:48 -; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:52 -; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:56 -; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:60 -; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:64 -; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:68 -; GFX11-NEXT: v_readlane_b32 s30, v75, 7 -; GFX11-NEXT: v_readlane_b32 s31, v75, 8 -; GFX11-NEXT: v_readlane_b32 s104, v75, 6 -; GFX11-NEXT: v_readlane_b32 s103, v75, 5 -; GFX11-NEXT: v_readlane_b32 s102, v75, 4 -; GFX11-NEXT: v_readlane_b32 s101, v75, 3 -; GFX11-NEXT: v_readlane_b32 s100, v75, 2 -; GFX11-NEXT: v_readlane_b32 s99, v75, 1 -; GFX11-NEXT: v_readlane_b32 s98, v75, 0 -; GFX11-NEXT: v_readlane_b32 s97, v74, 31 -; GFX11-NEXT: v_readlane_b32 s96, v74, 30 -; GFX11-NEXT: v_readlane_b32 s87, v74, 29 -; GFX11-NEXT: v_readlane_b32 s86, v74, 28 -; GFX11-NEXT: v_readlane_b32 s85, v74, 27 -; GFX11-NEXT: v_readlane_b32 s84, v74, 26 -; GFX11-NEXT: v_readlane_b32 s83, v74, 25 -; GFX11-NEXT: v_readlane_b32 s82, v74, 24 -; GFX11-NEXT: v_readlane_b32 s81, v74, 23 -; GFX11-NEXT: v_readlane_b32 s80, v74, 22 -; GFX11-NEXT: v_readlane_b32 s71, v74, 21 -; GFX11-NEXT: v_readlane_b32 s70, v74, 20 -; GFX11-NEXT: v_readlane_b32 s69, v74, 19 -; GFX11-NEXT: v_readlane_b32 s68, v74, 18 -; GFX11-NEXT: v_readlane_b32 s67, v74, 17 -; GFX11-NEXT: v_readlane_b32 s66, v74, 16 -; GFX11-NEXT: v_readlane_b32 s65, v74, 15 -; GFX11-NEXT: v_readlane_b32 s64, v74, 14 -; GFX11-NEXT: v_readlane_b32 s55, v74, 13 -; GFX11-NEXT: v_readlane_b32 s54, v74, 12 -; GFX11-NEXT: v_readlane_b32 s53, v74, 11 -; GFX11-NEXT: v_readlane_b32 s52, v74, 10 -; GFX11-NEXT: v_readlane_b32 s51, v74, 9 -; GFX11-NEXT: v_readlane_b32 s50, v74, 8 -; GFX11-NEXT: v_readlane_b32 s49, v74, 7 -; GFX11-NEXT: v_readlane_b32 s48, v74, 6 -; GFX11-NEXT: v_readlane_b32 s39, v74, 5 -; GFX11-NEXT: v_readlane_b32 s38, v74, 4 -; GFX11-NEXT: v_readlane_b32 s37, v74, 3 -; GFX11-NEXT: v_readlane_b32 s36, v74, 2 -; GFX11-NEXT: v_readlane_b32 s35, v74, 1 -; GFX11-NEXT: v_readlane_b32 s34, v74, 0 +; GFX11-NEXT: s_clause 0x10 ; 68-byte Folded Reload +; GFX11-NEXT: scratch_load_b32 v72, off, s32 +; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:4 +; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:8 +; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:12 +; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:16 +; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:20 +; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:24 +; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:28 +; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:32 +; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:36 +; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:40 +; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:44 +; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:48 +; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:52 +; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:56 +; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:60 +; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:64 +; GFX11-NEXT: v_readlane_b32 s30, v74, 7 +; GFX11-NEXT: v_readlane_b32 s31, v74, 8 +; GFX11-NEXT: v_readlane_b32 s104, v74, 6 +; GFX11-NEXT: v_readlane_b32 s103, v74, 5 +; GFX11-NEXT: v_readlane_b32 s102, v74, 4 +; GFX11-NEXT: v_readlane_b32 s101, v74, 3 +; GFX11-NEXT: v_readlane_b32 s100, v74, 2 +; GFX11-NEXT: v_readlane_b32 s99, v74, 1 +; GFX11-NEXT: v_readlane_b32 s98, v74, 0 +; GFX11-NEXT: v_readlane_b32 s97, v73, 31 +; GFX11-NEXT: v_readlane_b32 s96, v73, 30 +; GFX11-NEXT: v_readlane_b32 s87, v73, 29 +; GFX11-NEXT: v_readlane_b32 s86, v73, 28 +; GFX11-NEXT: v_readlane_b32 s85, v73, 27 +; GFX11-NEXT: v_readlane_b32 s84, v73, 26 +; GFX11-NEXT: v_readlane_b32 s83, v73, 25 +; GFX11-NEXT: v_readlane_b32 s82, v73, 24 +; GFX11-NEXT: v_readlane_b32 s81, v73, 23 +; GFX11-NEXT: v_readlane_b32 s80, v73, 22 +; GFX11-NEXT: v_readlane_b32 s71, v73, 21 +; GFX11-NEXT: v_readlane_b32 s70, v73, 20 +; GFX11-NEXT: v_readlane_b32 s69, v73, 19 +; GFX11-NEXT: v_readlane_b32 s68, v73, 18 +; GFX11-NEXT: v_readlane_b32 s67, v73, 17 +; GFX11-NEXT: v_readlane_b32 s66, v73, 16 +; GFX11-NEXT: v_readlane_b32 s65, v73, 15 +; GFX11-NEXT: v_readlane_b32 s64, v73, 14 +; GFX11-NEXT: v_readlane_b32 s55, v73, 13 +; GFX11-NEXT: v_readlane_b32 s54, v73, 12 +; GFX11-NEXT: v_readlane_b32 s53, v73, 11 +; GFX11-NEXT: v_readlane_b32 s52, v73, 10 +; GFX11-NEXT: v_readlane_b32 s51, v73, 9 +; GFX11-NEXT: v_readlane_b32 s50, v73, 8 +; GFX11-NEXT: v_readlane_b32 s49, v73, 7 +; GFX11-NEXT: v_readlane_b32 s48, v73, 6 +; GFX11-NEXT: v_readlane_b32 s39, v73, 5 +; GFX11-NEXT: v_readlane_b32 s38, v73, 4 +; GFX11-NEXT: v_readlane_b32 s37, v73, 3 +; GFX11-NEXT: v_readlane_b32 s36, v73, 2 +; GFX11-NEXT: v_readlane_b32 s35, v73, 1 +; GFX11-NEXT: v_readlane_b32 s34, v73, 0 ; GFX11-NEXT: s_or_saveexec_b32 s0, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-NEXT: scratch_load_b32 v73, off, s32 offset:68 ; GFX11-NEXT: scratch_load_b32 v74, off, s32 offset:72 ; GFX11-NEXT: scratch_load_b32 v75, off, s32 offset:76 ; GFX11-NEXT: scratch_load_b32 v76, off, s32 offset:80 -; GFX11-NEXT: scratch_load_b32 v77, off, s32 offset:84 ; GFX11-NEXT: s_mov_b32 exec_lo, s0 ; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_setpc_b64 s[30:31] @@ -47533,22 +47624,22 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:388 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 @@ -47567,33 +47658,33 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:112 ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:128 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:128 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:136 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:144 ; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 ; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:160 ; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:168 ; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:184 -; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v1 -; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v3 -; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v5 -; SI-NEXT: v_lshlrev_b32_e32 v40, 24, v7 -; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v9 -; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v11 -; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v13 -; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v15 -; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v17 -; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v19 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v21 -; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v23 -; SI-NEXT: v_lshlrev_b32_e32 v56, 8, v25 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v27 -; SI-NEXT: v_lshlrev_b32_e32 v46, 8, v29 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:184 +; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v1 +; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v3 +; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v5 +; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v7 +; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v9 +; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v11 +; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v13 +; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v15 +; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v17 +; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v19 +; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v21 +; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v23 +; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v25 +; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v27 +; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v29 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30 -; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v0 -; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v2 +; SI-NEXT: v_lshlrev_b32_e32 v61, 24, v0 +; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v4 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) @@ -47650,19 +47741,19 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v33 +; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v32 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v35 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v33 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v36 +; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v35 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v39 @@ -47670,19 +47761,19 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill @@ -47693,7 +47784,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v51 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v40 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 @@ -47701,27 +47792,27 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:188 -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:44 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:28 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:20 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:12 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:4 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:108 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:100 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:92 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:84 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:76 -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68 -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:60 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:44 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:28 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:20 +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:12 +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:4 +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:108 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:100 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:92 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:84 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:76 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:60 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 @@ -47730,15 +47821,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:204 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:212 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:224 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 @@ -47752,24 +47843,24 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 @@ -47778,29 +47869,26 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:252 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:260 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:268 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:268 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:276 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 @@ -47809,29 +47897,29 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:292 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 @@ -47840,29 +47928,29 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:332 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:340 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:352 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 @@ -47871,239 +47959,307 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:348 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:356 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 -; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v3 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:364 ; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:372 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB38_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v9, 0xff, v56 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v9, 0xff, v49 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v0, v0, v54 -; SI-NEXT: v_or_b32_e32 v2, v2, v41 +; SI-NEXT: v_or_b32_e32 v0, v0, v37 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 -; SI-NEXT: v_or_b32_e32 v3, v40, v3 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v9, v10, v9 ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v53, v2 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_or_b32_e32 v3, v47, v3 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 +; SI-NEXT: v_or_b32_e32 v4, v45, v4 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v60, v5 +; SI-NEXT: v_or_b32_e32 v5, v41, v5 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v58, v6 +; SI-NEXT: v_or_b32_e32 v6, v62, v6 ; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v37, v7 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v7, v48, v7 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v61, v8 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr53 +; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr60 +; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 +; SI-NEXT: v_or_b32_e32 v1, v1, v58 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v2, v2, v53 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v34, v3 +; SI-NEXT: v_or_b32_e32 v2, v2, v52 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v55, v8 -; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v3, v48 +; SI-NEXT: v_or_b32_e32 v3, v3, v36 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 -; SI-NEXT: v_or_b32_e32 v4, v4, v62 +; SI-NEXT: v_or_b32_e32 v4, v4, v43 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 -; SI-NEXT: v_or_b32_e32 v5, v5, v38 +; SI-NEXT: v_or_b32_e32 v5, v5, v63 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_or_b32_e32 v6, v6, v56 +; SI-NEXT: v_or_b32_e32 v6, v6, v34 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v7, v7, v46 +; SI-NEXT: v_or_b32_e32 v7, v7, v38 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xff, v35 -; SI-NEXT: v_or_b32_e32 v8, v8, v44 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v57 +; SI-NEXT: v_or_b32_e32 v8, v8, v55 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: v_and_b32_e32 v9, 0xff, v33 +; SI-NEXT: v_and_b32_e32 v9, 0xff, v46 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xff, v52 +; SI-NEXT: v_and_b32_e32 v10, 0xff, v51 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 ; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xff, v63 -; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr52 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: v_and_b32_e32 v10, 0xff, v44 +; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xff, v39 +; SI-NEXT: v_and_b32_e32 v11, 0xff, v50 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xff, v61 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: v_and_b32_e32 v11, 0xff, v42 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xff, v59 +; SI-NEXT: v_and_b32_e32 v12, 0xff, v35 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xff, v51 -; SI-NEXT: ; implicit-def: $vgpr59 -; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: v_and_b32_e32 v12, 0xff, v40 +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xff, v57 +; SI-NEXT: v_and_b32_e32 v13, 0xff, v49 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xff, v47 -; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: v_and_b32_e32 v13, 0xff, v39 +; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v50 +; SI-NEXT: v_and_b32_e32 v14, 0xff, v33 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v45 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr45 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v14, 0xff, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v14, v14, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v36 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v60 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48121,204 +48277,299 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 +; SI-NEXT: v_and_b32_e32 v25, 0xff, v59 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v26, v26, v27 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: v_or_b32_e32 v26, v26, v27 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v28, v28, v29 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: v_or_b32_e32 v28, v28, v29 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v30, v30, v31 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_or_b32_e32 v30, v30, v31 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v31, v31, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v32, 0xff, v32 -; SI-NEXT: v_or_b32_e32 v31, v31, v43 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_or_b32_e32 v32, v33, v32 ; SI-NEXT: v_or_b32_e32 v31, v31, v32 ; SI-NEXT: ; implicit-def: $vgpr32 @@ -48330,351 +48581,189 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: .LBB38_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB38_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; SI-NEXT: s_movk_i32 s6, 0x300 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v49 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v56 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: s_movk_i32 s6, 0x300 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b32 s7, 0x3000000 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v54, v0 +; SI-NEXT: v_or_b32_e32 v0, v37, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v40, v2 +; SI-NEXT: v_or_b32_e32 v2, v53, v2 ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v34, v3 +; SI-NEXT: v_or_b32_e32 v3, v47, v3 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v4, v45, v4 ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v60, v5 -; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_or_b32_e32 v5, v41, v5 +; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v58, v6 -; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_or_b32_e32 v6, v62, v6 +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v37, v7 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v7, v48, v7 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v61, v8 ; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v0 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_or_b32_e32 v1, v58, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v55, v8 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_or_b32_e32 v2, v53, v2 +; SI-NEXT: v_or_b32_e32 v2, v52, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v48, v3 +; SI-NEXT: v_or_b32_e32 v3, v36, v3 ; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v3, vcc, s7, v3 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 -; SI-NEXT: v_or_b32_e32 v4, v62, v4 +; SI-NEXT: v_or_b32_e32 v4, v43, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v4, vcc, s7, v4 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 -; SI-NEXT: v_or_b32_e32 v5, v38, v5 +; SI-NEXT: v_or_b32_e32 v5, v63, v5 ; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v5, vcc, s7, v5 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_or_b32_e32 v6, v56, v6 +; SI-NEXT: v_or_b32_e32 v6, v34, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v6, vcc, s7, v6 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v7, v46, v7 +; SI-NEXT: v_or_b32_e32 v7, v38, v7 ; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v35 +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v57 ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_or_b32_e32 v8, v44, v8 +; SI-NEXT: v_or_b32_e32 v8, v55, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v33 +; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v46 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v52 +; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51 ; SI-NEXT: v_and_b32_e32 v10, 0xff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 @@ -48682,15 +48771,14 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v63 +; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v10, 0xff, v10 ; SI-NEXT: v_add_i32_e32 v7, vcc, s7, v7 ; SI-NEXT: v_add_i32_e32 v8, vcc, s7, v8 ; SI-NEXT: v_add_i32_e32 v9, vcc, s7, v9 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v39 +; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50 ; SI-NEXT: v_and_b32_e32 v11, 0xff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 @@ -48698,12 +48786,12 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v61 +; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v11, 0xff, v11 ; SI-NEXT: v_add_i32_e32 v10, vcc, s7, v10 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v59 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v35 ; SI-NEXT: v_and_b32_e32 v12, 0xff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 @@ -48711,12 +48799,12 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v40 ; SI-NEXT: v_and_b32_e32 v12, 0xff, v12 ; SI-NEXT: v_add_i32_e32 v11, vcc, s7, v11 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v57 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v49 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 @@ -48724,12 +48812,12 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v39 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_add_i32_e32 v12, vcc, s7, v12 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v50 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 @@ -48737,12 +48825,14 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v45 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v32 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_add_i32_e32 v13, vcc, s7, v13 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v36 +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v60 ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 @@ -48774,7 +48864,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48783,7 +48873,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 ; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v16, vcc, s7, v16 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -48791,7 +48881,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v17, v18, v17 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48800,7 +48890,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v17, vcc, s7, v17 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -48808,7 +48898,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v18, v19, v18 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48817,7 +48907,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v18, vcc, s7, v18 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -48825,7 +48915,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48834,7 +48924,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s7, v19 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -48842,7 +48932,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v20, v21, v20 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v20 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48851,7 +48941,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v20, vcc, s7, v20 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -48859,7 +48949,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v21, v22, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, s6, v21 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48868,7 +48958,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, s7, v21 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -48876,7 +48966,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v22, v23, v22 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v22 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48885,15 +48975,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, s7, v22 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23 ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v23, v24, v23 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, s6, v23 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48902,32 +48992,30 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, s7, v23 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v24, v25, v24 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 +; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v59 ; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 +; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v24, vcc, s7, v24 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v25, v26, v25 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48936,15 +49024,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, s7, v25 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v26, v27, v26 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48953,15 +49041,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, s7, v26 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v27, v28, v27 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48970,15 +49058,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, s7, v27 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v28, v29, v28 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -48987,15 +49075,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, s7, v28 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v29, v30, v29 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v29, vcc, s6, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -49004,15 +49092,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v29, vcc, s7, v29 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30 ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v30, v31, v30 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v30, vcc, s6, v30 ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -49021,19 +49109,21 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v30 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v31, vcc, 3, v31 ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v31, v32, v31 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v31, vcc, 0x300, v31 +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v32, vcc, 3, v32 -; SI-NEXT: v_or_b32_e32 v31, v43, v31 ; SI-NEXT: v_and_b32_e32 v32, 0xff, v32 -; SI-NEXT: v_add_i32_e32 v31, vcc, 0x300, v31 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_or_b32_e32 v32, v33, v32 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_add_i32_e32 v31, vcc, 0x3000000, v31 @@ -49077,11 +49167,11 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill @@ -49100,13 +49190,13 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 @@ -49126,20 +49216,20 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:72 ; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:68 ; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:64 -; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:60 -; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:56 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:48 +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:60 +; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:56 +; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:52 +; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:48 ; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:44 ; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:40 ; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:36 ; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:32 -; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:28 -; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:24 -; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:20 -; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:16 +; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:28 +; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:24 +; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:20 +; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:16 ; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:12 -; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:8 +; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:8 ; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:4 ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 @@ -49172,19 +49262,19 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill @@ -49258,25 +49348,25 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:348 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:344 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:340 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill @@ -49288,19 +49378,19 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:324 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:148 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill @@ -49341,18 +49431,18 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB38_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b32 s6, 0xc0c0004 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v9, v33, v62, s6 +; VI-NEXT: v_perm_b32 v9, v33, v32, s6 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_perm_b32 v10, v63, v60, s6 +; VI-NEXT: v_perm_b32 v10, v61, v60, s6 ; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_perm_b32 v11, v53, v58, s6 +; VI-NEXT: v_perm_b32 v11, v53, v52, s6 ; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; VI-NEXT: v_perm_b32 v12, v51, v56, s6 +; VI-NEXT: v_perm_b32 v12, v57, v56, s6 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_perm_b32 v13, v37, v36, s6 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -49361,12 +49451,11 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v15, v49, v48, s6 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; implicit-def: $vgpr63 +; VI-NEXT: ; implicit-def: $vgpr61 ; VI-NEXT: ; implicit-def: $vgpr60 ; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 @@ -49376,25 +49465,25 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v0, v1, v0, s6 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v16, v17, v16, s6 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s6 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s6 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v2, v1, s6 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) @@ -49439,28 +49528,28 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v6, v6, v7 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v8, v8, v41, s6 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_perm_b32 v8, v55, v34, s6 +; VI-NEXT: v_perm_b32 v8, v55, v63, s6 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 -; VI-NEXT: v_perm_b32 v9, v61, v32, s6 +; VI-NEXT: v_perm_b32 v9, v34, v62, s6 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 ; VI-NEXT: v_perm_b32 v10, v59, v54, s6 ; VI-NEXT: v_or_b32_e32 v10, v10, v11 -; VI-NEXT: v_perm_b32 v11, v57, v52, s6 +; VI-NEXT: v_perm_b32 v11, v51, v58, s6 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 ; VI-NEXT: v_perm_b32 v12, v47, v38, s6 ; VI-NEXT: v_or_b32_e32 v12, v12, v13 @@ -49474,12 +49563,13 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; VI-NEXT: ; implicit-def: $vgpr41 ; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr61 +; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr59 ; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr35 @@ -49496,22 +49586,22 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v17, v18, v17, s6 ; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; VI-NEXT: v_or_b32_e32 v16, v16, v17 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v17, v18, v17, s6 ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v19, v18, s6 ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; VI-NEXT: v_or_b32_e32 v17, v17, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v19, v18, s6 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v19, v20, v19, s6 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 @@ -49560,18 +49650,18 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v23, v24, v23, s6 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v24, v25, v24, s6 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v24, v25, v24, s6 ; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v25, v26, v25, s6 ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 @@ -49844,25 +49934,24 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_cbranch_execz .LBB38_4 ; VI-NEXT: ; %bb.3: ; %cmp.true ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; VI-NEXT: v_mov_b32_e32 v31, 0x300 ; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v41 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32 ; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v60 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58 +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52 ; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v56 ; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v36 ; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v44 ; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v48 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload @@ -49870,79 +49959,82 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_add_u16_e32 v0, 3, v0 ; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_lshlrev_b16_e32 v20, 8, v20 ; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 +; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5 ; VI-NEXT: v_lshlrev_b16_e32 v23, 8, v23 -; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26 +; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 ; VI-NEXT: s_waitcnt vmcnt(12) -; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 +; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; VI-NEXT: s_waitcnt vmcnt(11) -; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 +; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 ; VI-NEXT: s_waitcnt vmcnt(10) -; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 +; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: s_waitcnt vmcnt(9) -; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 +; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 ; VI-NEXT: s_waitcnt vmcnt(8) -; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 ; VI-NEXT: s_waitcnt vmcnt(7) -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 +; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; VI-NEXT: s_waitcnt vmcnt(6) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 +; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26 ; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 -; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v27, 8, v27 -; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: v_lshlrev_b16_e32 v29, 8, v29 -; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_lshlrev_b16_e32 v30, 8, v30 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v1, 3, v1 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_sdwa v1, v1, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v1, 3, v1 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v2, 3, v2 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v3, v3, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_sdwa v2, v2, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_add_u16_e32 v2, 3, v2 ; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v2, 3, v2 +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v3, 3, v3 @@ -49998,21 +50090,21 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v6, 0x300, v6 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v7, 3, v7 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v7, v7, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v6, v6, v7 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v7, 3, v7 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v7, 0x300, v7 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v8, 3, v8 @@ -50020,17 +50112,17 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_sdwa v8, v8, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v7, v7, v8 ; VI-NEXT: v_add_u16_e32 v8, 3, v55 -; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v34 +; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v63 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 3, v33 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v8, 0x300, v8 ; VI-NEXT: v_add_u16_sdwa v9, v9, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v8, v8, v9 -; VI-NEXT: v_add_u16_e32 v9, 3, v61 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32 +; VI-NEXT: v_add_u16_e32 v9, 3, v34 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v10, 3, v63 +; VI-NEXT: v_add_u16_e32 v10, 3, v61 ; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 0x300, v9 ; VI-NEXT: v_add_u16_sdwa v10, v10, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -50043,10 +50135,10 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_e32 v10, 0x300, v10 ; VI-NEXT: v_add_u16_sdwa v11, v11, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v10, v10, v11 -; VI-NEXT: v_add_u16_e32 v11, 3, v57 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52 +; VI-NEXT: v_add_u16_e32 v11, 3, v51 +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58 ; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v12, 3, v51 +; VI-NEXT: v_add_u16_e32 v12, 3, v57 ; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v11, 0x300, v11 ; VI-NEXT: v_add_u16_sdwa v12, v12, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -50080,18 +50172,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v15, 0x300, v15 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_add_u16_e32 v16, 3, v16 ; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v16, v16, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v15, v15, v16 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33 ; VI-NEXT: s_waitcnt vmcnt(2) @@ -50108,28 +50197,28 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v17, v17, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v16, v16, v17 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v17, 3, v17 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v17, 0x300, v17 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v18, 3, v18 ; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v18, v18, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v17, v17, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v18, 3, v18 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 ; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v18, 0x300, v18 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v19, 3, v19 @@ -50199,21 +50288,21 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24 ; VI-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v23, 0x300, v23 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v24, 3, v24 ; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v24, v24, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v24, 3, v24 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25 ; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v24, 0x300, v24 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v25, 3, v25 @@ -50361,11 +50450,11 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill @@ -50379,14 +50468,14 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 @@ -50396,23 +50485,23 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112 ; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:108 ; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:104 -; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:100 +; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:100 ; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:96 -; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:92 -; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:88 -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:84 -; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:80 +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:92 +; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:88 +; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:84 +; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:80 ; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:76 -; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:72 -; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:68 +; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:72 +; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:68 ; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:64 -; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:60 -; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:56 -; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:52 -; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:48 +; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:60 +; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:56 +; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:52 +; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:48 ; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:44 -; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:40 -; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:36 +; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:40 +; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:36 ; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:32 ; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:28 ; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:24 @@ -50449,7 +50538,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill @@ -50461,7 +50550,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill @@ -50498,7 +50587,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:380 +; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:380 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:376 ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -50520,31 +50609,31 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:364 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:360 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:356 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:352 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:348 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill @@ -50556,13 +50645,13 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:340 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill @@ -50624,46 +50713,46 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB38_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004 ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v10, v55, v32, s6 -; GFX9-NEXT: v_perm_b32 v11, v61, v60, s6 -; GFX9-NEXT: v_perm_b32 v12, v53, v38, s6 -; GFX9-NEXT: v_perm_b32 v13, v57, v56, s6 -; GFX9-NEXT: v_perm_b32 v14, v51, v34, s6 +; GFX9-NEXT: v_perm_b32 v11, v61, v54, s6 +; GFX9-NEXT: v_perm_b32 v12, v59, v38, s6 +; GFX9-NEXT: v_perm_b32 v13, v57, v52, s6 +; GFX9-NEXT: v_perm_b32 v14, v47, v34, s6 ; GFX9-NEXT: v_perm_b32 v15, v45, v50, s6 ; GFX9-NEXT: ; implicit-def: $vgpr55 ; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr59 ; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr34 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr50 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v0, v1, v0, s6 ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v16, v43, v16, s6 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -50691,7 +50780,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 @@ -50700,7 +50789,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 @@ -50723,15 +50812,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8 ; GFX9-NEXT: v_perm_b32 v9, v39, v40, s6 ; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v10, v62, v63, s6 +; GFX9-NEXT: v_perm_b32 v10, v63, v62, s6 ; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10 -; GFX9-NEXT: v_perm_b32 v11, v59, v54, s6 +; GFX9-NEXT: v_perm_b32 v11, v53, v60, s6 ; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11 -; GFX9-NEXT: v_perm_b32 v12, v58, v37, s6 +; GFX9-NEXT: v_perm_b32 v12, v37, v58, s6 ; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12 -; GFX9-NEXT: v_perm_b32 v13, v47, v52, s6 +; GFX9-NEXT: v_perm_b32 v13, v51, v56, s6 ; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13 -; GFX9-NEXT: v_perm_b32 v14, v33, v46, s6 +; GFX9-NEXT: v_perm_b32 v14, v36, v46, s6 ; GFX9-NEXT: v_lshl_or_b32 v14, v15, 16, v14 ; GFX9-NEXT: v_perm_b32 v15, v49, v44, s6 ; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15 @@ -50743,15 +50832,15 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr40 -; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr46 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr44 @@ -50771,21 +50860,21 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 ; GFX9-NEXT: v_lshl_or_b32 v17, v18, 16, v17 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s6 ; GFX9-NEXT: v_lshl_or_b32 v18, v19, 16, v18 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s6 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v20, v21, v20, s6 ; GFX9-NEXT: v_lshl_or_b32 v19, v20, 16, v19 @@ -50821,7 +50910,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 ; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6 ; GFX9-NEXT: v_lshl_or_b32 v23, v24, 16, v23 @@ -50830,7 +50919,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6 ; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6 ; GFX9-NEXT: v_lshl_or_b32 v24, v25, 16, v24 @@ -50894,223 +50983,223 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v32, v36, v32, s6 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: v_perm_b32 v32, v33, v32, s6 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: .LBB38_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB38_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload ; GFX9-NEXT: s_movk_i32 s6, 0x300 ; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload @@ -51118,9 +51207,9 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v48 ; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v32 -; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60 +; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54 ; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v38 -; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56 +; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52 ; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v34 ; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v50 ; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload @@ -51133,19 +51222,19 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(24) ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0 ; GFX9-NEXT: s_waitcnt vmcnt(22) ; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; GFX9-NEXT: s_waitcnt vmcnt(21) ; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; GFX9-NEXT: s_waitcnt vmcnt(20) +; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21 +; GFX9-NEXT: s_waitcnt vmcnt(18) ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; GFX9-NEXT: s_waitcnt vmcnt(19) +; GFX9-NEXT: s_waitcnt vmcnt(17) ; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18 -; GFX9-NEXT: s_waitcnt vmcnt(18) -; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21 ; GFX9-NEXT: s_waitcnt vmcnt(16) ; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: s_waitcnt vmcnt(15) @@ -51183,30 +51272,30 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v1, 3, v1 ; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v1, 3, v1 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 ; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 @@ -51242,7 +51331,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v5, v5, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v4, v4, v5 ; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v5, 3, v5 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -51256,7 +51345,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -51299,39 +51388,39 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 ; GFX9-NEXT: v_add_u16_sdwa v10, v10, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v62 -; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v63 +; GFX9-NEXT: v_add_u16_e32 v10, 3, v63 +; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v62 ; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v11, 3, v61 ; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 ; GFX9-NEXT: v_add_u16_sdwa v11, v11, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX9-NEXT: v_add_u16_e32 v11, 3, v59 -; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54 +; GFX9-NEXT: v_add_u16_e32 v11, 3, v53 +; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60 ; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v53 +; GFX9-NEXT: v_add_u16_e32 v12, 3, v59 ; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 ; GFX9-NEXT: v_add_u16_sdwa v12, v12, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v58 -; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v37 +; GFX9-NEXT: v_add_u16_e32 v12, 3, v37 +; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v58 ; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v13, 3, v57 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 ; GFX9-NEXT: v_add_u16_sdwa v13, v13, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v12, v12, v13 -; GFX9-NEXT: v_add_u16_e32 v13, 3, v47 -; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52 +; GFX9-NEXT: v_add_u16_e32 v13, 3, v51 +; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v14, 3, v51 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v47 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 ; GFX9-NEXT: v_add_u16_sdwa v14, v14, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 -; GFX9-NEXT: v_add_u16_e32 v14, 3, v33 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v36 ; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v46 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v15, 3, v45 @@ -51349,16 +51438,13 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_e32 v15, v15, v16 ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v16, 3, v16 ; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v16, 3, v16 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v17, 3, v17 ; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -51378,8 +51464,8 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v18, v18, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v17, v17, v18 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v18, 3, v18 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -51392,14 +51478,14 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v19, v19, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v18, v18, v19 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v19, 3, v19 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v20 ; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v19, 0x300, v19 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v20, 3, v20 @@ -51455,7 +51541,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v24, 8, v24 ; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v23, 0x300, v23 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v24, 3, v24 @@ -51469,7 +51555,7 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v25, 8, v25 ; GFX9-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v24, 0x300, v24 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v25, 3, v25 @@ -51567,9 +51653,12 @@ define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v32, 3, v36 -; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v32, 3, v33 +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v31 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33 +; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v32, v32, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v31, v31, v32 ; GFX9-NEXT: .LBB38_4: ; %end @@ -53400,9 +53489,7 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: v_readfirstlane_b32 s76, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 -; SI-NEXT: v_readfirstlane_b32 s46, v30 +; SI-NEXT: v_readfirstlane_b32 s42, v30 ; SI-NEXT: v_readfirstlane_b32 s6, v29 ; SI-NEXT: v_readfirstlane_b32 s7, v28 ; SI-NEXT: v_readfirstlane_b32 s8, v27 @@ -53415,36 +53502,38 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: v_readfirstlane_b32 s15, v20 ; SI-NEXT: v_readfirstlane_b32 s40, v19 ; SI-NEXT: v_readfirstlane_b32 s41, v18 -; SI-NEXT: v_readfirstlane_b32 s42, v17 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:8 -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:16 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:24 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:32 -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:40 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:48 -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:72 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:80 -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:88 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:96 +; SI-NEXT: v_readfirstlane_b32 s43, v17 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:8 +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:16 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:24 +; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:32 +; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:64 +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:80 +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:88 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:96 +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:104 +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:112 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:120 +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:128 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:104 -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:112 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:120 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:128 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:136 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:144 -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160 -; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:168 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:176 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:184 -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:192 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:200 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:208 +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:136 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:144 +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:152 +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:168 +; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:176 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:184 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:192 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:200 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:208 ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:216 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:224 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:232 @@ -53461,275 +53550,284 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:320 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:328 ; SI-NEXT: v_readfirstlane_b32 s75, v1 -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332 -; SI-NEXT: v_readfirstlane_b32 s43, v16 -; SI-NEXT: v_readfirstlane_b32 s45, v14 +; SI-NEXT: v_readfirstlane_b32 s76, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:332 +; SI-NEXT: v_readfirstlane_b32 s56, v12 ; SI-NEXT: v_readfirstlane_b32 s73, v3 -; SI-NEXT: v_readfirstlane_b32 s74, v2 ; SI-NEXT: v_readfirstlane_b32 s57, v11 -; SI-NEXT: v_readfirstlane_b32 s72, v4 -; SI-NEXT: v_readfirstlane_b32 s44, v15 +; SI-NEXT: v_readfirstlane_b32 s45, v15 +; SI-NEXT: v_readfirstlane_b32 s46, v14 +; SI-NEXT: v_readfirstlane_b32 s74, v2 +; SI-NEXT: v_readfirstlane_b32 s44, v16 ; SI-NEXT: v_readfirstlane_b32 s47, v13 -; SI-NEXT: v_readfirstlane_b32 s56, v12 ; SI-NEXT: v_readfirstlane_b32 s58, v10 ; SI-NEXT: v_readfirstlane_b32 s59, v9 ; SI-NEXT: v_readfirstlane_b32 s60, v8 ; SI-NEXT: v_readfirstlane_b32 s61, v7 ; SI-NEXT: v_readfirstlane_b32 s62, v6 ; SI-NEXT: v_readfirstlane_b32 s63, v5 +; SI-NEXT: v_readfirstlane_b32 s72, v4 ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v50 -; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v51 -; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v52 -; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v53 -; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v54 -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v55 -; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v40 -; SI-NEXT: v_lshlrev_b32_e32 v60, 8, v41 -; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v42 -; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v43 -; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v46 -; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v56 -; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v59 -; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v61 -; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v44 -; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v45 -; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v47 -; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v57 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 -; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v30 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v29 -; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v28 +; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v35 +; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v52 +; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v53 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v54 +; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v55 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v40 +; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v41 +; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v42 +; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v43 +; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v44 +; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v45 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v46 +; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v47 +; SI-NEXT: v_lshlrev_b32_e32 v42, 8, v56 +; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v57 +; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v58 +; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v59 +; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v60 +; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v51 +; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v50 +; SI-NEXT: v_lshlrev_b32_e32 v43, 24, v39 +; SI-NEXT: v_lshlrev_b32_e32 v61, 8, v38 +; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v37 +; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v36 +; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v31 +; SI-NEXT: v_lshlrev_b32_e32 v47, 8, v30 +; SI-NEXT: v_lshlrev_b32_e32 v57, 24, v29 ; SI-NEXT: s_waitcnt vmcnt(13) -; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27 +; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v28 ; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v26 +; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v27 ; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25 +; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v26 ; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v24 +; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v23 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v22 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v21 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v31, 8, v24 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v23 +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_lshlrev_b32_e32 v30, 8, v22 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v21 +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v20 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v19 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v18 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v17 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:284 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:276 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:268 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:260 -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:252 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292 -; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v48 -; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v34 -; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v32 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:220 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 +; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 +; SI-NEXT: v_lshlrev_b32_e32 v32, 8, v48 ; SI-NEXT: s_and_b64 s[4:5], vcc, exec -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49 -; SI-NEXT: v_lshlrev_b32_e32 v49, 24, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v33 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v33 +; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v49 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 -; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v31 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:188 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180 +; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:172 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:156 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:148 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:124 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:92 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:68 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:52 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:44 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:36 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:28 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:20 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:12 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:92 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:84 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:76 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:60 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:52 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:44 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:36 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:28 +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:20 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:12 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:4 -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; SI-NEXT: s_cbranch_scc0 .LBB39_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: s_and_b32 s4, s42, 0xff +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_and_b32 s4, s46, 0xff -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v31 ; SI-NEXT: v_or_b32_e32 v0, s4, v0 -; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v11, v3 +; SI-NEXT: v_or_b32_e32 v1, v11, v1 ; SI-NEXT: v_or_b32_e32 v11, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v30 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v10 -; SI-NEXT: v_or_b32_e32 v0, v0, v5 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v10 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v9 +; SI-NEXT: v_or_b32_e32 v0, v0, v3 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v12, v1 +; SI-NEXT: v_or_b32_e32 v12, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v8 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v36 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v13, v1 ; SI-NEXT: v_or_b32_e32 v13, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v9 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v8 -; SI-NEXT: v_or_b32_e32 v0, v0, v4 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v7 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v6 +; SI-NEXT: v_or_b32_e32 v0, v0, v62 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v14, v1 ; SI-NEXT: v_or_b32_e32 v14, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v42 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v0, v0, v60 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v5 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v4 +; SI-NEXT: v_or_b32_e32 v0, v0, v35 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v15, v1 ; SI-NEXT: v_or_b32_e32 v15, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v6 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v63 -; SI-NEXT: v_or_b32_e32 v0, v0, v41 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v46 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v49 +; SI-NEXT: v_or_b32_e32 v0, v0, v55 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v16, v1 ; SI-NEXT: v_or_b32_e32 v16, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v61 +; SI-NEXT: v_mov_b32_e32 v49, v37 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v37 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xff, v17 -; SI-NEXT: v_or_b32_e32 v0, v0, v40 +; SI-NEXT: v_or_b32_e32 v0, v0, v63 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v55, v1 +; SI-NEXT: v_or_b32_e32 v1, v34, v1 ; SI-NEXT: v_or_b32_e32 v17, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v44 -; SI-NEXT: v_mov_b32_e32 v55, v54 -; SI-NEXT: v_or_b32_e32 v0, v0, v54 -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v34, v42 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v53, v1 -; SI-NEXT: v_or_b32_e32 v18, v0, v1 -; SI-NEXT: v_mov_b32_e32 v53, v52 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v51, v1 -; SI-NEXT: v_mov_b32_e32 v51, v50 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v12, v2, v3 +; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_mov_b32_e32 v62, v35 +; SI-NEXT: v_mov_b32_e32 v55, v63 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 @@ -53738,229 +53836,236 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_lshl_b32 s77, s19, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s77, s5 +; SI-NEXT: s_or_b32 s77, s4, s5 +; SI-NEXT: s_and_b32 s4, s20, 0xff +; SI-NEXT: s_lshl_b32 s5, s21, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s20, 0xff -; SI-NEXT: s_lshl_b32 s77, s21, 8 -; SI-NEXT: s_or_b32 s5, s5, s77 -; SI-NEXT: s_and_b32 s77, s22, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 +; SI-NEXT: s_and_b32 s5, s22, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s78, s23, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s77, s78, s77 -; SI-NEXT: s_or_b32 s5, s5, s77 -; SI-NEXT: s_and_b32 s77, s24, 0xff -; SI-NEXT: s_lshl_b32 s78, s25, 8 -; SI-NEXT: s_or_b32 s77, s77, s78 -; SI-NEXT: s_and_b32 s78, s26, 0xff -; SI-NEXT: s_lshl_b32 s78, s78, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s78, s5 +; SI-NEXT: s_or_b32 s78, s4, s5 +; SI-NEXT: s_and_b32 s4, s24, 0xff +; SI-NEXT: s_lshl_b32 s5, s25, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s26, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s79, s27, 24 -; SI-NEXT: s_and_b32 s77, s77, 0xffff -; SI-NEXT: s_or_b32 s78, s79, s78 -; SI-NEXT: s_or_b32 s77, s77, s78 -; SI-NEXT: s_and_b32 s78, s28, 0xff -; SI-NEXT: s_lshl_b32 s79, s29, 8 -; SI-NEXT: s_or_b32 s78, s78, s79 -; SI-NEXT: s_and_b32 s79, s76, 0xff -; SI-NEXT: s_lshl_b32 s79, s79, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s79, s5 +; SI-NEXT: s_or_b32 s79, s4, s5 +; SI-NEXT: s_and_b32 s4, s28, 0xff +; SI-NEXT: s_lshl_b32 s5, s29, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s76, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s88, s75, 24 -; SI-NEXT: s_and_b32 s78, s78, 0xffff -; SI-NEXT: s_or_b32 s79, s88, s79 -; SI-NEXT: s_or_b32 s78, s78, s79 -; SI-NEXT: s_and_b32 s79, s74, 0xff -; SI-NEXT: s_lshl_b32 s88, s73, 8 -; SI-NEXT: s_or_b32 s79, s79, s88 -; SI-NEXT: s_and_b32 s88, s72, 0xff -; SI-NEXT: s_lshl_b32 s88, s88, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s88, s5 +; SI-NEXT: s_or_b32 s88, s4, s5 +; SI-NEXT: s_and_b32 s4, s74, 0xff +; SI-NEXT: s_lshl_b32 s5, s73, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s72, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; SI-NEXT: s_lshl_b32 s89, s63, 24 -; SI-NEXT: s_and_b32 s79, s79, 0xffff -; SI-NEXT: s_or_b32 s88, s89, s88 -; SI-NEXT: s_or_b32 s79, s79, s88 -; SI-NEXT: s_and_b32 s88, s62, 0xff -; SI-NEXT: s_lshl_b32 s89, s61, 8 -; SI-NEXT: s_or_b32 s88, s88, s89 -; SI-NEXT: s_and_b32 s89, s60, 0xff -; SI-NEXT: s_lshl_b32 s89, s89, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s89, s5 +; SI-NEXT: s_or_b32 s89, s4, s5 +; SI-NEXT: s_and_b32 s4, s62, 0xff +; SI-NEXT: s_lshl_b32 s5, s61, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s60, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s90, s59, 24 -; SI-NEXT: s_and_b32 s88, s88, 0xffff -; SI-NEXT: s_or_b32 s89, s90, s89 -; SI-NEXT: s_or_b32 s88, s88, s89 -; SI-NEXT: s_and_b32 s89, s58, 0xff -; SI-NEXT: s_lshl_b32 s90, s57, 8 -; SI-NEXT: s_or_b32 s89, s89, s90 -; SI-NEXT: s_and_b32 s90, s56, 0xff -; SI-NEXT: s_lshl_b32 s90, s90, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s90, s5 +; SI-NEXT: s_or_b32 s90, s4, s5 +; SI-NEXT: s_and_b32 s4, s58, 0xff +; SI-NEXT: s_lshl_b32 s5, s57, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s56, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s91, s47, 24 -; SI-NEXT: s_and_b32 s89, s89, 0xffff -; SI-NEXT: s_or_b32 s90, s91, s90 -; SI-NEXT: s_or_b32 s89, s89, s90 -; SI-NEXT: s_and_b32 s90, s45, 0xff -; SI-NEXT: s_lshl_b32 s91, s44, 8 -; SI-NEXT: s_or_b32 s90, s90, s91 -; SI-NEXT: s_and_b32 s91, s43, 0xff -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v54 -; SI-NEXT: v_or_b32_e32 v0, v0, v52 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s91, s5 +; SI-NEXT: s_or_b32 s91, s4, s5 +; SI-NEXT: s_and_b32 s4, s46, 0xff +; SI-NEXT: s_lshl_b32 s5, s45, 8 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v37 +; SI-NEXT: v_or_b32_e32 v0, v0, v42 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v18, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v40 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v19 +; SI-NEXT: v_or_b32_e32 v0, v0, v54 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v53, v1 +; SI-NEXT: v_mov_b32_e32 v54, v53 ; SI-NEXT: v_or_b32_e32 v19, v0, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v36 +; SI-NEXT: v_or_b32_e32 v0, v0, v52 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v49, v1 -; SI-NEXT: v_mov_b32_e32 v49, v48 -; SI-NEXT: s_lshl_b32 s91, s91, 16 -; SI-NEXT: s_lshl_b32 s92, s42, 24 -; SI-NEXT: s_and_b32 s90, s90, 0xffff -; SI-NEXT: s_or_b32 s91, s92, s91 -; SI-NEXT: s_or_b32 s90, s90, s91 -; SI-NEXT: s_and_b32 s91, s41, 0xff -; SI-NEXT: s_lshl_b32 s92, s40, 8 -; SI-NEXT: s_or_b32 s91, s91, s92 -; SI-NEXT: s_and_b32 s92, s15, 0xff -; SI-NEXT: s_lshl_b32 s92, s92, 16 -; SI-NEXT: s_lshl_b32 s93, s14, 24 -; SI-NEXT: s_and_b32 s91, s91, 0xffff -; SI-NEXT: s_or_b32 s92, s93, s92 -; SI-NEXT: s_or_b32 s91, s91, s92 -; SI-NEXT: s_and_b32 s92, s13, 0xff -; SI-NEXT: s_lshl_b32 s93, s12, 8 -; SI-NEXT: s_or_b32 s92, s92, s93 -; SI-NEXT: s_and_b32 s93, s11, 0xff -; SI-NEXT: s_lshl_b32 s93, s93, 16 -; SI-NEXT: s_lshl_b32 s94, s10, 24 -; SI-NEXT: s_and_b32 s92, s92, 0xffff -; SI-NEXT: s_or_b32 s93, s94, s93 -; SI-NEXT: s_or_b32 s92, s92, s93 -; SI-NEXT: s_and_b32 s93, s9, 0xff -; SI-NEXT: s_lshl_b32 s94, s8, 8 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: s_and_b32 s94, s7, 0xff -; SI-NEXT: s_lshl_b32 s94, s94, 16 -; SI-NEXT: s_lshl_b32 s95, s6, 24 -; SI-NEXT: s_and_b32 s93, s93, 0xffff -; SI-NEXT: s_or_b32 s94, s95, s94 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: v_mov_b32_e32 v41, v40 -; SI-NEXT: v_mov_b32_e32 v3, s78 -; SI-NEXT: v_mov_b32_e32 v4, s79 -; SI-NEXT: v_mov_b32_e32 v5, s88 -; SI-NEXT: v_mov_b32_e32 v6, s89 -; SI-NEXT: v_mov_b32_e32 v7, s90 -; SI-NEXT: v_mov_b32_e32 v8, s91 -; SI-NEXT: v_mov_b32_e32 v9, s92 -; SI-NEXT: v_mov_b32_e32 v10, s93 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v52 -; SI-NEXT: v_or_b32_e32 v0, v0, v50 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v51, v1 ; SI-NEXT: v_or_b32_e32 v20, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v38 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 +; SI-NEXT: v_or_b32_e32 v0, v0, v50 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v39, v1 -; SI-NEXT: v_mov_b32_e32 v39, v38 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v50 -; SI-NEXT: v_or_b32_e32 v0, v0, v48 -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 ; SI-NEXT: v_or_b32_e32 v21, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v48 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v22 +; SI-NEXT: v_or_b32_e32 v0, v0, v32 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v37, v1 -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v48 -; SI-NEXT: v_or_b32_e32 v0, v0, v38 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v43, v1 ; SI-NEXT: v_or_b32_e32 v22, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v39 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v23 +; SI-NEXT: v_mov_b32_e32 v52, v51 +; SI-NEXT: v_mov_b32_e32 v33, v32 +; SI-NEXT: v_or_b32_e32 v0, v0, v61 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v35, v1 -; SI-NEXT: v_mov_b32_e32 v35, v34 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v38 -; SI-NEXT: v_or_b32_e32 v0, v0, v36 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v45, v1 ; SI-NEXT: v_or_b32_e32 v23, v0, v1 +; SI-NEXT: v_mov_b32_e32 v45, v44 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v33, v1 -; SI-NEXT: v_mov_b32_e32 v33, v32 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v36 -; SI-NEXT: v_or_b32_e32 v0, v0, v34 +; SI-NEXT: v_or_b32_e32 v1, v56, v1 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s44, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s92, s43, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s92, s5 +; SI-NEXT: s_or_b32 s92, s4, s5 +; SI-NEXT: s_and_b32 s4, s41, 0xff +; SI-NEXT: s_lshl_b32 s5, s40, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s15, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s93, s14, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s93, s5 +; SI-NEXT: s_or_b32 s93, s4, s5 +; SI-NEXT: s_and_b32 s4, s13, 0xff +; SI-NEXT: s_lshl_b32 s5, s12, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s11, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s94, s10, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s94, s5 +; SI-NEXT: s_or_b32 s94, s4, s5 +; SI-NEXT: s_and_b32 s4, s9, 0xff +; SI-NEXT: s_lshl_b32 s5, s8, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s7, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s95, s6, 24 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v42 +; SI-NEXT: v_or_b32_e32 v0, v0, v44 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v24, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v32 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v35 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v25 -; SI-NEXT: v_or_b32_e32 v0, v0, v62 +; SI-NEXT: v_or_b32_e32 v0, v0, v47 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v29, v1 +; SI-NEXT: v_or_b32_e32 v1, v57, v1 ; SI-NEXT: v_or_b32_e32 v25, v0, v1 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v53 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v58 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v28, v1 -; SI-NEXT: v_mov_b32_e32 v62, v29 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v32 -; SI-NEXT: v_or_b32_e32 v0, v0, v59 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v60, v1 ; SI-NEXT: v_or_b32_e32 v26, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v58 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v56 -; SI-NEXT: v_or_b32_e32 v0, v0, v57 +; SI-NEXT: v_mov_b32_e32 v57, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s95, s5 +; SI-NEXT: s_or_b32 s95, s4, s5 +; SI-NEXT: v_mov_b32_e32 v41, v40 +; SI-NEXT: v_mov_b32_e32 v38, v50 +; SI-NEXT: v_mov_b32_e32 v48, v39 +; SI-NEXT: v_mov_b32_e32 v43, v61 +; SI-NEXT: v_mov_b32_e32 v56, v47 +; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: v_mov_b32_e32 v3, s88 +; SI-NEXT: v_mov_b32_e32 v4, s89 +; SI-NEXT: v_mov_b32_e32 v5, s90 +; SI-NEXT: v_mov_b32_e32 v6, s91 +; SI-NEXT: v_mov_b32_e32 v7, s92 +; SI-NEXT: v_mov_b32_e32 v8, s93 +; SI-NEXT: v_mov_b32_e32 v9, s94 +; SI-NEXT: v_mov_b32_e32 v10, s95 +; SI-NEXT: v_mov_b32_e32 v61, v36 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v51 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v32 +; SI-NEXT: v_or_b32_e32 v0, v0, v59 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v27, v1 -; SI-NEXT: v_mov_b32_e32 v57, v27 +; SI-NEXT: v_mov_b32_e32 v59, v27 ; SI-NEXT: v_or_b32_e32 v27, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v47 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v43 -; SI-NEXT: v_or_b32_e32 v0, v0, v45 +; SI-NEXT: v_mov_b32_e32 v40, v37 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v63 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_or_b32_e32 v1, v28, v1 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v44 +; SI-NEXT: v_or_b32_e32 v0, v0, v31 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_mov_b32_e32 v59, v28 ; SI-NEXT: v_or_b32_e32 v28, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v0, 0xff, v46 -; SI-NEXT: v_mov_b32_e32 v45, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: v_mov_b32_e32 v47, v43 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v60, v32 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v58 +; SI-NEXT: v_or_b32_e32 v0, v0, v30 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_or_b32_e32 v1, v29, v1 ; SI-NEXT: v_or_b32_e32 v29, v0, v1 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v30, v0, v1 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -53972,53 +54077,57 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v31, v0, v1 -; SI-NEXT: v_mov_b32_e32 v0, s4 -; SI-NEXT: v_mov_b32_e32 v1, s5 -; SI-NEXT: v_mov_b32_e32 v2, s77 -; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: v_mov_b32_e32 v0, s77 +; SI-NEXT: v_mov_b32_e32 v1, s78 +; SI-NEXT: v_mov_b32_e32 v2, s79 ; SI-NEXT: s_branch .LBB39_3 ; SI-NEXT: .LBB39_2: -; SI-NEXT: v_mov_b32_e32 v55, v54 -; SI-NEXT: v_mov_b32_e32 v53, v52 -; SI-NEXT: v_mov_b32_e32 v51, v50 -; SI-NEXT: v_mov_b32_e32 v49, v48 -; SI-NEXT: v_mov_b32_e32 v39, v38 -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v62, v35 +; SI-NEXT: v_mov_b32_e32 v55, v63 +; SI-NEXT: v_mov_b32_e32 v34, v42 ; SI-NEXT: v_mov_b32_e32 v41, v40 -; SI-NEXT: v_mov_b32_e32 v35, v34 +; SI-NEXT: v_mov_b32_e32 v54, v53 +; SI-NEXT: v_mov_b32_e32 v52, v51 ; SI-NEXT: v_mov_b32_e32 v33, v32 -; SI-NEXT: v_mov_b32_e32 v62, v29 -; SI-NEXT: v_mov_b32_e32 v59, v28 -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: v_mov_b32_e32 v47, v43 -; SI-NEXT: v_mov_b32_e32 v57, v27 +; SI-NEXT: v_mov_b32_e32 v43, v61 +; SI-NEXT: v_mov_b32_e32 v45, v44 +; SI-NEXT: v_mov_b32_e32 v57, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v49, v37 +; SI-NEXT: v_mov_b32_e32 v38, v50 +; SI-NEXT: v_mov_b32_e32 v48, v39 +; SI-NEXT: v_mov_b32_e32 v56, v47 +; SI-NEXT: v_mov_b32_e32 v59, v27 ; SI-NEXT: s_mov_b64 s[4:5], -1 ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: .LBB39_3: ; %Flow -; SI-NEXT: v_mov_b32_e32 v43, v58 -; SI-NEXT: v_mov_b32_e32 v58, v33 -; SI-NEXT: v_mov_b32_e32 v33, v37 -; SI-NEXT: v_mov_b32_e32 v34, v39 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v39, v52 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload ; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] +; SI-NEXT: v_mov_b32_e32 v47, v33 ; SI-NEXT: s_cbranch_vccnz .LBB39_5 ; SI-NEXT: ; %bb.4: ; %cmp.true -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: s_add_i32 s46, s46, 3 -; SI-NEXT: s_and_b32 s4, s46, 0xff -; SI-NEXT: v_mov_b32_e32 v32, v35 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: s_add_i32 s42, s42, 3 +; SI-NEXT: s_and_b32 s4, s42, 0xff +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v33, v48 ; SI-NEXT: s_add_i32 s16, s16, 3 ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_add_i32 s18, s18, 3 @@ -54038,8 +54147,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_add_i32 s56, s56, 3 ; SI-NEXT: s_and_b32 s22, s56, 0xff ; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: s_add_i32 s45, s45, 3 -; SI-NEXT: s_add_i32 s43, s43, 3 +; SI-NEXT: s_add_i32 s46, s46, 3 +; SI-NEXT: s_add_i32 s44, s44, 3 ; SI-NEXT: s_add_i32 s41, s41, 3 ; SI-NEXT: s_add_i32 s13, s13, 3 ; SI-NEXT: s_add_i32 s9, s9, 3 @@ -54072,24 +54181,35 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_or_b32 s6, s6, s8 ; SI-NEXT: s_add_i32 s10, s10, 0x3000000 ; SI-NEXT: s_add_i32 s6, s6, 0x3000000 -; SI-NEXT: v_mov_b32_e32 v9, s10 ; SI-NEXT: v_mov_b32_e32 v10, s6 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v1, s4, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v41 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_and_b32 s16, s18, 0xff @@ -54155,25 +54275,30 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_and_b32 s20, s20, 0xffff ; SI-NEXT: s_or_b32 s21, s21, s22 ; SI-NEXT: s_or_b32 s20, s21, s20 -; SI-NEXT: s_and_b32 s21, s45, 0xff -; SI-NEXT: s_lshl_b32 s22, s44, 8 +; SI-NEXT: s_and_b32 s21, s46, 0xff +; SI-NEXT: s_lshl_b32 s22, s45, 8 ; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: s_and_b32 s23, s43, 0xff +; SI-NEXT: s_and_b32 s23, s44, 0xff ; SI-NEXT: s_addk_i32 s21, 0x300 -; SI-NEXT: s_lshl_b32 s22, s42, 24 +; SI-NEXT: s_lshl_b32 s22, s43, 24 ; SI-NEXT: s_lshl_b32 s23, s23, 16 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; SI-NEXT: s_and_b32 s22, s41, 0xff -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v1, v52, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: s_or_b32 s21, s22, s21 +; SI-NEXT: s_and_b32 s22, s41, 0xff ; SI-NEXT: s_lshl_b32 s23, s40, 8 ; SI-NEXT: s_or_b32 s22, s23, s22 ; SI-NEXT: s_addk_i32 s22, 0x300 @@ -54188,180 +54313,82 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_add_i32 s20, s20, 0x3000000 ; SI-NEXT: s_add_i32 s21, s21, 0x3000000 ; SI-NEXT: s_add_i32 s14, s14, 0x3000000 -; SI-NEXT: v_mov_b32_e32 v4, s18 -; SI-NEXT: v_mov_b32_e32 v5, s19 -; SI-NEXT: v_mov_b32_e32 v6, s20 -; SI-NEXT: v_mov_b32_e32 v7, s21 -; SI-NEXT: v_mov_b32_e32 v8, s14 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v39, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_mov_b32_e32 v3, s17 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v37, v0 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v42, v0 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v41, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v55, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v54 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v53, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_or_b32_e32 v1, v39, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v52 +; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v36, v2 +; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v51, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 +; SI-NEXT: v_or_b32_e32 v0, v38, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v50 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v49, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v48 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v34, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 +; SI-NEXT: v_or_b32_e32 v0, v47, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 +; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v38 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v33, v0 +; SI-NEXT: v_or_b32_e32 v0, v43, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -54371,12 +54398,12 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v36 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v32, v0 +; SI-NEXT: v_or_b32_e32 v0, v45, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -54386,79 +54413,107 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v35 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v0, v56, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v62, v1 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v60 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v53 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v0, v57, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v59, v1 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v51 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v43 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v32 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v57, v1 +; SI-NEXT: v_or_b32_e32 v1, v59, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 0x300, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v45, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v3 +; SI-NEXT: v_mov_b32_e32 v3, s17 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 +; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 +; SI-NEXT: v_or_b32_e32 v4, v62, v4 +; SI-NEXT: v_add_i32_e32 v4, vcc, 0x300, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v46 +; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 +; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v4 +; SI-NEXT: v_mov_b32_e32 v4, s18 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 @@ -54467,33 +54522,76 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v5, vcc, 0x300, v5 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v49 +; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 +; SI-NEXT: v_or_b32_e32 v6, v55, v6 +; SI-NEXT: v_add_i32_e32 v6, vcc, 0x300, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v5 +; SI-NEXT: v_mov_b32_e32 v5, s19 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v40 +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_or_b32_e32 v7, v34, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 0x300, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v6 +; SI-NEXT: v_mov_b32_e32 v6, s20 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v9, v8 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v7 +; SI-NEXT: v_mov_b32_e32 v7, s21 +; SI-NEXT: v_mov_b32_e32 v8, s14 +; SI-NEXT: v_mov_b32_e32 v9, s10 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 @@ -54521,7 +54619,7 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v128i8_to_v32f32_scalar: @@ -54773,18 +54871,18 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -55014,11 +55112,11 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: ; %bb.4: ; %cmp.true ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v0, s17 -; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; VI-NEXT: v_mov_b32_e32 v9, 0xc0c0004 ; VI-NEXT: s_add_i32 s18, s18, 3 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_perm_b32 v0, s16, v0, v11 -; VI-NEXT: v_perm_b32 v1, s18, v1, v11 +; VI-NEXT: v_perm_b32 v0, s16, v0, v9 +; VI-NEXT: v_perm_b32 v1, s18, v1, v9 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -55026,8 +55124,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v1, s21 ; VI-NEXT: s_add_i32 s22, s22, 3 ; VI-NEXT: v_mov_b32_e32 v2, s23 -; VI-NEXT: v_perm_b32 v1, s20, v1, v11 -; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v9 +; VI-NEXT: v_perm_b32 v2, s22, v2, v9 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -55035,8 +55133,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: s_add_i32 s26, s26, 3 ; VI-NEXT: v_mov_b32_e32 v3, s27 -; VI-NEXT: v_perm_b32 v2, s24, v2, v11 -; VI-NEXT: v_perm_b32 v3, s26, v3, v11 +; VI-NEXT: v_perm_b32 v2, s24, v2, v9 +; VI-NEXT: v_perm_b32 v3, s26, v3, v9 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x300, v2 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -55044,8 +55142,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v3, s29 ; VI-NEXT: s_add_i32 s76, s76, 3 ; VI-NEXT: v_mov_b32_e32 v4, s75 -; VI-NEXT: v_perm_b32 v3, s28, v3, v11 -; VI-NEXT: v_perm_b32 v4, s76, v4, v11 +; VI-NEXT: v_perm_b32 v3, s28, v3, v9 +; VI-NEXT: v_perm_b32 v4, s76, v4, v9 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x300, v3 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -55053,8 +55151,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v4, s73 ; VI-NEXT: s_add_i32 s72, s72, 3 ; VI-NEXT: v_mov_b32_e32 v5, s63 -; VI-NEXT: v_perm_b32 v4, s74, v4, v11 -; VI-NEXT: v_perm_b32 v5, s72, v5, v11 +; VI-NEXT: v_perm_b32 v4, s74, v4, v9 +; VI-NEXT: v_perm_b32 v5, s72, v5, v9 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x300, v4 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -55062,8 +55160,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v5, s61 ; VI-NEXT: s_add_i32 s60, s60, 3 ; VI-NEXT: v_mov_b32_e32 v6, s59 -; VI-NEXT: v_perm_b32 v5, s62, v5, v11 -; VI-NEXT: v_perm_b32 v6, s60, v6, v11 +; VI-NEXT: v_perm_b32 v5, s62, v5, v9 +; VI-NEXT: v_perm_b32 v6, s60, v6, v9 ; VI-NEXT: v_add_u32_e32 v5, vcc, 0x300, v5 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -55071,8 +55169,8 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v6, s57 ; VI-NEXT: s_add_i32 s56, s56, 3 ; VI-NEXT: v_mov_b32_e32 v7, s47 -; VI-NEXT: v_perm_b32 v6, s58, v6, v11 -; VI-NEXT: v_perm_b32 v7, s56, v7, v11 +; VI-NEXT: v_perm_b32 v6, s58, v6, v9 +; VI-NEXT: v_perm_b32 v7, s56, v7, v9 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x300, v6 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -55080,38 +55178,38 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v7, s45 ; VI-NEXT: s_add_i32 s44, s44, 3 ; VI-NEXT: v_mov_b32_e32 v8, s43 -; VI-NEXT: v_perm_b32 v7, s46, v7, v11 -; VI-NEXT: v_perm_b32 v8, s44, v8, v11 +; VI-NEXT: v_perm_b32 v7, s46, v7, v9 +; VI-NEXT: v_perm_b32 v8, s44, v8, v9 ; VI-NEXT: v_add_u32_e32 v7, vcc, 0x300, v7 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s42, s42, 3 ; VI-NEXT: v_mov_b32_e32 v8, s41 ; VI-NEXT: s_add_i32 s40, s40, 3 -; VI-NEXT: v_mov_b32_e32 v9, s15 -; VI-NEXT: v_perm_b32 v8, s42, v8, v11 -; VI-NEXT: v_perm_b32 v9, s40, v9, v11 +; VI-NEXT: v_mov_b32_e32 v10, s15 +; VI-NEXT: v_perm_b32 v8, s42, v8, v9 +; VI-NEXT: v_perm_b32 v10, s40, v10, v9 ; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v8 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; VI-NEXT: v_or_b32_sdwa v8, v10, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s14, s14, 3 -; VI-NEXT: v_mov_b32_e32 v9, s13 +; VI-NEXT: v_mov_b32_e32 v10, s13 ; VI-NEXT: s_add_i32 s12, s12, 3 -; VI-NEXT: v_mov_b32_e32 v10, s11 -; VI-NEXT: v_perm_b32 v9, s14, v9, v11 -; VI-NEXT: v_perm_b32 v10, s12, v10, v11 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_mov_b32_e32 v11, s11 +; VI-NEXT: v_perm_b32 v10, s14, v10, v9 +; VI-NEXT: v_perm_b32 v11, s12, v11, v9 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s10, s10, 3 -; VI-NEXT: v_mov_b32_e32 v10, s9 +; VI-NEXT: v_mov_b32_e32 v11, s9 ; VI-NEXT: s_add_i32 s8, s8, 3 ; VI-NEXT: v_mov_b32_e32 v12, s7 -; VI-NEXT: v_perm_b32 v10, s10, v10, v11 -; VI-NEXT: v_perm_b32 v12, s8, v12, v11 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 +; VI-NEXT: v_perm_b32 v11, s10, v11, v9 +; VI-NEXT: v_perm_b32 v12, s8, v12, v9 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload @@ -55138,8 +55236,6 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x3000000, v6 ; VI-NEXT: v_add_u32_e32 v7, vcc, 0x3000000, v7 ; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v9 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10 ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload @@ -55153,9 +55249,9 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_perm_b32 v11, s6, v12, v11 +; VI-NEXT: v_perm_b32 v9, s6, v12, v9 ; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_perm_b32 v16, v16, v17, s4 ; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v60 ; VI-NEXT: v_perm_b32 v17, v17, v18, s4 @@ -55174,93 +55270,95 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; VI-NEXT: v_perm_b32 v12, v12, v13, s4 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v54 +; VI-NEXT: v_or_b32_sdwa v12, v12, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v54 ; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v52 -; VI-NEXT: v_perm_b32 v12, v12, v53, s4 +; VI-NEXT: v_perm_b32 v9, v9, v53, s4 ; VI-NEXT: v_perm_b32 v13, v13, v51, s4 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v12 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v50 -; VI-NEXT: v_perm_b32 v13, v13, v49, s4 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13 -; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v38 -; VI-NEXT: v_perm_b32 v14, v14, v37, s4 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 -; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v34 -; VI-NEXT: v_perm_b32 v15, v15, v33, s4 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15 -; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v62 -; VI-NEXT: v_perm_b32 v16, v16, v61, s4 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16 -; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v41 -; VI-NEXT: v_perm_b32 v17, v17, v40, s4 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17 -; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v42 -; VI-NEXT: v_perm_b32 v18, v18, v47, s4 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18 +; VI-NEXT: v_or_b32_sdwa v13, v13, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v50 +; VI-NEXT: v_perm_b32 v9, v9, v49, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v14, v14, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v38 +; VI-NEXT: v_perm_b32 v9, v9, v37, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v15, v15, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v34 +; VI-NEXT: v_perm_b32 v9, v9, v33, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v16, v16, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v62 +; VI-NEXT: v_perm_b32 v9, v9, v61, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v17, v17, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v41 +; VI-NEXT: v_perm_b32 v9, v9, v40, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v18, v18, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v42 +; VI-NEXT: v_perm_b32 v9, v9, v47, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v46 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v11 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v14 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18 +; VI-NEXT: v_or_b32_sdwa v19, v19, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v46 ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v19, v19, v20, s4 +; VI-NEXT: v_perm_b32 v9, v9, v20, s4 ; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v19 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v20 ; VI-NEXT: v_perm_b32 v20, v20, v21, s4 ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v45 -; VI-NEXT: v_perm_b32 v20, v20, v44, s4 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x300, v20 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19 +; VI-NEXT: v_or_b32_sdwa v20, v20, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v45 +; VI-NEXT: v_perm_b32 v9, v9, v44, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v21 ; VI-NEXT: v_perm_b32 v21, v21, v22, s4 ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v43 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20 +; VI-NEXT: v_or_b32_sdwa v21, v21, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v43 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v21, v21, v22, s4 +; VI-NEXT: v_perm_b32 v9, v9, v22, s4 ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22 ; VI-NEXT: v_perm_b32 v22, v22, v23, s4 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; VI-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v22, v22, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v22, v22, v23, s4 -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v22 +; VI-NEXT: v_perm_b32 v23, v9, v23, s4 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23 -; VI-NEXT: v_perm_b32 v23, v23, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 +; VI-NEXT: v_perm_b32 v24, v9, v24, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v10 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v11 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v13 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v14 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v15 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v16 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v17 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v18 +; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v19 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v20 +; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v21 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v22 +; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v23 +; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v24 ; VI-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload @@ -55697,18 +55795,18 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s27 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -55941,21 +56039,21 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: s_add_i32 s18, s18, 3 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: s_movk_i32 s4, 0x300 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 ; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; GFX9-NEXT: v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; GFX9-NEXT: s_add_i32 s20, s20, 3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: s_add_i32 s22, s22, 3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u32_sdwa v2, v2, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s24, s24, 3 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: s_add_i32 s26, s26, 3 @@ -56048,11 +56146,11 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; GFX9-NEXT: s_waitcnt vmcnt(10) ; GFX9-NEXT: v_add_u32_e32 v14, 3, v48 ; GFX9-NEXT: v_perm_b32 v14, v14, v39, s5 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v15, 3, v36 ; GFX9-NEXT: v_perm_b32 v15, v15, v35, s5 +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload @@ -56307,10 +56405,14 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v32f32_scalar: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:332 +; GFX11-TRUE16-NEXT: ; meta instruction +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:328 +; GFX11-TRUE16-NEXT: ; meta instruction +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:324 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:320 ; GFX11-TRUE16-NEXT: s_clause 0x1f ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:312 ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:308 @@ -56431,291 +56533,280 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo ; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB39_4 ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v131, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v1, s18, s19, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, v165, v162, 0xc0c0004 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3) +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v181, v177, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v167, v166, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v135, v131, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v161, v149, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v147, v144, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v145, v133, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s20, s21, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v0, s2, s3, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s0, s1, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s16, s17, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s74, s73, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s14, s13, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s58, s57, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, s6, s5, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v8 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s46, s45, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v55, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s26, s27, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v6, s24, s25, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s60, s59, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s42, s41, v10 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s44, s43, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v8 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s46, s45, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s14, s13, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v12, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s56, s47, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v8 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v11 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, s40, s15, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s12, s11, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v9 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s6, s5, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v15, v13 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-TRUE16-NEXT: v_perm_b32 v13, v182, v178, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, v180, v176, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s8, s7, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v16 -; GFX11-TRUE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v144, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v17, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v20 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v20 -; GFX11-TRUE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v22 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v21, v22 -; GFX11-TRUE16-NEXT: v_perm_b32 v22, v99, v87, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v24 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v103, v100, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v23, v24 -; GFX11-TRUE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v25, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v28 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s4, v179, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12 +; GFX11-TRUE16-NEXT: v_perm_b32 v24, v102, v98, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v13 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v163, v151, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v17, v14 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v18, v16 +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v150, v148, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v146, v134, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, v164, v160, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v128, v116, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v117, v113, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v16, v15 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v103, v100, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v19, v17 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v129, v118, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v21, v18 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v22, v20 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v119, v115, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v114, v112, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v132, v130, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX11-TRUE16-NEXT: v_perm_b32 v28, v70, v68, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v20, v19 +; GFX11-TRUE16-NEXT: v_perm_b32 v27, v96, v86, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v23, v21 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v99, v87, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v25, v22 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v26, v24 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v85, v82, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v83, v71, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v24, v101, v97, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX11-TRUE16-NEXT: v_perm_b32 v29, v84, v80, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX11-TRUE16-NEXT: v_perm_b32 v30, v81, v69, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v24, v23 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v27, v25 +; GFX11-TRUE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v29, v26 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v30, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v28, v55, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v31, v49, v38, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v183, v39, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v41, v34, v32, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v64, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v27, v28 -; GFX11-TRUE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v30 -; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30 -; GFX11-TRUE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v183 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40 -; GFX11-TRUE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v183 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v40, v41 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX11-TRUE16-NEXT: v_perm_b32 v30, v65, v53, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v40, v52, v50, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX11-TRUE16-NEXT: v_perm_b32 v42, v48, v36, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v183 +; GFX11-TRUE16-NEXT: v_perm_b32 v43, v37, v33, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v41 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v27 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v30, v28 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v40, v31 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v42, v183 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v43, v41 ; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB39_3 ; GFX11-TRUE16-NEXT: .LBB39_2: ; %cmp.true -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, 0xc0c0004 +; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3 +; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v7 ; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v10 ; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3 -; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v7 +; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v7 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s72, s63, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v6, s28, s29, v7 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s62, s61, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s62, s61, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s60, s59, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s58, s57, v7 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s74, s73, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s40, s15, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v6, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s59, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s14, s13, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 ; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s44, s43, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v8 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v11, v12 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s44, s43, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s42, s41, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, s14, s13, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, s12, s11, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s10, s9, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, s8, s7, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s6, s5, v7 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v7 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v13 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v15 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v16, v17 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v167 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v164 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v163 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v161 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v150 ; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s10, s9, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v10, s6, s5, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 ; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10 ; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 @@ -56869,9 +56960,11 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v35 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v32 ; GFX11-TRUE16-NEXT: .LBB39_3: ; %end -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload -; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:320 -; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:324 +; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:328 +; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:332 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-TRUE16-NEXT: .LBB39_4: @@ -56881,10 +56974,14 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; GFX11-FAKE16-LABEL: bitcast_v128i8_to_v32f32_scalar: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:324 +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:332 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:328 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:320 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:324 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:320 ; GFX11-FAKE16-NEXT: s_clause 0x1f ; GFX11-FAKE16-NEXT: scratch_load_u16 v32, off, s32 offset:312 ; GFX11-FAKE16-NEXT: scratch_load_u16 v34, off, s32 offset:308 @@ -57005,291 +57102,280 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; GFX11-FAKE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo ; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB39_4 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v144, v131, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, s18, s19, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v165, v162, 0xc0c0004 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(3) +; GFX11-FAKE16-NEXT: v_perm_b32 v17, v181, v177, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v167, v166, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v144, v131, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v161, v149, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v147, v135, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v145, v133, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v0, s2, s3, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s0, s1, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s74, s73, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v1 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v2, v0 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s72, s63, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s56, s47, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s62, s61, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s14, s13, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s40, s15, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s10, s9, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s58, s57, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, s6, s5, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v7, v8 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s46, s45, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s60, s59, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v64, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s74, s73, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s72, s63, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s62, s61, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s58, s57, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v6, s24, s25, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s60, s59, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v8, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s42, s41, v10 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v9, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s44, s43, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s46, s45, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s42, s41, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s14, s13, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, s10, s9, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v6, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v12, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s56, s47, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v9, v8 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v12, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v13, v14 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s44, s43, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, s40, s15, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s12, s11, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v8 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v12, v9 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s6, s5, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v14, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v15, v13 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v182, v178, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, v180, v176, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s8, s7, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v13, v14 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v15, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v15, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v17, v18 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v147, v135, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v17, v18 -; GFX11-FAKE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v19, v20 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v19, v20 -; GFX11-FAKE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v21, v22 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v21, v22 -; GFX11-FAKE16-NEXT: v_perm_b32 v22, v100, v87, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v23, v24 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v103, v99, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v23, v24 -; GFX11-FAKE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v25, v26 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v25, v26 -; GFX11-FAKE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v27, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s4, v179, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v12 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v102, v98, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v15, v13 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, v163, v151, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v17, v14 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v18, v16 +; GFX11-FAKE16-NEXT: v_perm_b32 v17, v150, v148, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v146, v134, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v164, v160, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v128, v116, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v117, v113, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v16, v15 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v103, v99, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v19, v17 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v129, v118, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v21, v18 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v22, v20 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v119, v115, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v114, v112, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v132, v130, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX11-FAKE16-NEXT: v_perm_b32 v28, v70, v68, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v20, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v27, v96, v86, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v23, v21 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v100, v87, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v25, v22 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v26, v24 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v85, v82, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v83, v71, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v101, v97, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX11-FAKE16-NEXT: v_perm_b32 v29, v84, v80, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX11-FAKE16-NEXT: v_perm_b32 v30, v81, v69, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v24, v23 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v27, v25 +; GFX11-FAKE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v29, v26 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v30, v28 +; GFX11-FAKE16-NEXT: v_perm_b32 v28, v64, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v31, v49, v38, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v183, v39, v35, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v41, v34, v32, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v29, v67, v55, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v27, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v29, v30 -; GFX11-FAKE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v29, v30 -; GFX11-FAKE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v31, v183 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40 -; GFX11-FAKE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v31, v183 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v40, v41 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX11-FAKE16-NEXT: v_perm_b32 v30, v65, v53, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-FAKE16-NEXT: v_perm_b32 v40, v52, v50, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX11-FAKE16-NEXT: v_perm_b32 v42, v48, v36, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v183 +; GFX11-FAKE16-NEXT: v_perm_b32 v43, v37, v33, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v41, 16, v41 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v29, v27 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v30, v28 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v40, v31 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v42, v183 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v43, v41 ; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB39_3 ; GFX11-FAKE16-NEXT: .LBB39_2: ; %cmp.true -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, 0xc0c0004 +; GFX11-FAKE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3 +; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s74, s73, v7 ; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v10 ; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3 -; GFX11-FAKE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s72, s72, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s62, s62, 3 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v10 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v7 +; GFX11-FAKE16-NEXT: s_add_i32 s60, s60, 3 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-FAKE16-NEXT: s_add_i32 s58, s58, 3 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v7 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s72, s63, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v6, s28, s29, v7 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s22, s23, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s62, s61, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-FAKE16-NEXT: s_add_i32 s60, s60, 3 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s22, s23, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s72, s63, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s62, s61, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s60, s59, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s58, s57, v7 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-FAKE16-NEXT: s_add_i32 s58, s58, 3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_add_i32 s56, s56, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s46, s46, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s56, s47, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s28, s29, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s74, s73, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s46, s45, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s44, s44, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s42, s42, 3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-FAKE16-NEXT: s_add_i32 s40, s40, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s14, s14, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s40, s15, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s60, s59, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s58, s57, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s14, s13, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 ; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, 3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v7 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v8, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s44, s43, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s42, s41, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v6, v8 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v11, v12 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s56, s47, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s46, s45, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s44, s43, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s42, s41, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s40, s15, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, s14, s13, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, s12, s11, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s10, s9, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, s8, s7, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s6, s5, v7 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v7 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v8, v9 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v10, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v12, v13 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v14, v15 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v16, v17 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 3, v167 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, 3, v165 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 3, v164 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 3, v163 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 3, v161 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 3, v150 ; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v11, v12 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s10, s9, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s6, s5, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 ; GFX11-FAKE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10 ; GFX11-FAKE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v13, v14 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 @@ -57443,9 +57529,11 @@ define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, ; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v36, v35 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v33, v32 ; GFX11-FAKE16-NEXT: .LBB39_3: ; %end -; GFX11-FAKE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:320 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:324 +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:320 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:324 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:328 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:332 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-FAKE16-NEXT: .LBB39_4: @@ -58256,8 +58344,8 @@ define inreg <64 x bfloat> @bitcast_v32f32_to_v64bf16_scalar(<32 x float> inreg ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -58403,113 +58491,105 @@ define inreg <64 x bfloat> @bitcast_v32f32_to_v64bf16_scalar(<32 x float> inreg ; SI-NEXT: s_cbranch_execnz .LBB41_4 ; SI-NEXT: .LBB41_2: ; %cmp.true ; SI-NEXT: v_add_f32_e64 v29, s6, 1.0 -; SI-NEXT: v_add_f32_e64 v28, s7, 1.0 -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v29 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 -; SI-NEXT: v_add_f32_e64 v27, s8, 1.0 -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v28 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_add_f32_e64 v0, s18, 1.0 -; SI-NEXT: v_add_f32_e64 v4, s22, 1.0 -; SI-NEXT: v_add_f32_e64 v5, s23, 1.0 +; SI-NEXT: v_add_f32_e64 v3, s21, 1.0 +; SI-NEXT: v_add_f32_e64 v6, s24, 1.0 +; SI-NEXT: v_add_f32_e64 v9, s27, 1.0 ; SI-NEXT: v_add_f32_e64 v12, s47, 1.0 -; SI-NEXT: v_add_f32_e64 v13, s46, 1.0 -; SI-NEXT: v_add_f32_e64 v14, s45, 1.0 ; SI-NEXT: v_add_f32_e64 v15, s44, 1.0 -; SI-NEXT: v_add_f32_e64 v26, s9, 1.0 -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v27 +; SI-NEXT: v_add_f32_e64 v18, s41, 1.0 +; SI-NEXT: v_add_f32_e64 v21, s14, 1.0 +; SI-NEXT: v_add_f32_e64 v24, s11, 1.0 +; SI-NEXT: v_add_f32_e64 v27, s8, 1.0 +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v29 ; SI-NEXT: v_add_f32_e64 v2, s20, 1.0 -; SI-NEXT: v_add_f32_e64 v3, s21, 1.0 -; SI-NEXT: v_add_f32_e64 v9, s27, 1.0 -; SI-NEXT: v_add_f32_e64 v10, s28, 1.0 +; SI-NEXT: v_add_f32_e64 v5, s23, 1.0 +; SI-NEXT: v_add_f32_e64 v8, s26, 1.0 ; SI-NEXT: v_add_f32_e64 v11, s29, 1.0 -; SI-NEXT: v_add_f32_e64 v22, s13, 1.0 +; SI-NEXT: v_add_f32_e64 v14, s45, 1.0 +; SI-NEXT: v_add_f32_e64 v17, s42, 1.0 +; SI-NEXT: v_add_f32_e64 v20, s15, 1.0 ; SI-NEXT: v_add_f32_e64 v23, s12, 1.0 -; SI-NEXT: v_add_f32_e64 v24, s11, 1.0 -; SI-NEXT: v_add_f32_e64 v25, s10, 1.0 +; SI-NEXT: v_add_f32_e64 v26, s9, 1.0 +; SI-NEXT: v_add_f32_e64 v28, s7, 1.0 ; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v26 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v15 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v15 -; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v14 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v14 -; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v13 -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v13 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v12 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v12 -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v5 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v5 -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v4 -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v0 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v0 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v27 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v27 +; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v24 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v24 +; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v21 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v21 +; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v18 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v18 +; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v15 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v15 +; SI-NEXT: v_and_b32_e32 v42, 0xffff0000, v12 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v12 +; SI-NEXT: v_and_b32_e32 v45, 0xffff0000, v9 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v9 +; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v6 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v6 +; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v3 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3 +; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v0 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v0 ; SI-NEXT: v_add_f32_e64 v0, s17, 1.0 ; SI-NEXT: v_add_f32_e64 v1, s19, 1.0 -; SI-NEXT: v_add_f32_e64 v6, s24, 1.0 +; SI-NEXT: v_add_f32_e64 v4, s22, 1.0 ; SI-NEXT: v_add_f32_e64 v7, s25, 1.0 -; SI-NEXT: v_add_f32_e64 v8, s26, 1.0 +; SI-NEXT: v_add_f32_e64 v10, s28, 1.0 +; SI-NEXT: v_add_f32_e64 v13, s46, 1.0 ; SI-NEXT: v_add_f32_e64 v16, s43, 1.0 -; SI-NEXT: v_add_f32_e64 v17, s42, 1.0 -; SI-NEXT: v_add_f32_e64 v18, s41, 1.0 ; SI-NEXT: v_add_f32_e64 v19, s40, 1.0 -; SI-NEXT: v_add_f32_e64 v20, s15, 1.0 -; SI-NEXT: v_add_f32_e64 v21, s14, 1.0 -; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v25 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v25 -; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v24 -; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v24 -; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v23 -; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v23 -; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v22 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v22 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v11 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v11 -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v10 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v10 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v9 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v9 -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v3 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v3 -; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v2 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v2 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e64 v22, s13, 1.0 +; SI-NEXT: v_add_f32_e64 v25, s10, 1.0 +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v28 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v26 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v26 +; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v23 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v23 +; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v20 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v20 +; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v17 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v17 +; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v14 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v14 +; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v11 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v11 +; SI-NEXT: v_and_b32_e32 v46, 0xffff0000, v8 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v8 +; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v5 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v5 +; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v2 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v2 +; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v0 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0 ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 -; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v21 -; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v21 -; SI-NEXT: v_and_b32_e32 v45, 0xffff0000, v20 -; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v20 -; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v19 -; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v19 -; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v18 -; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v18 -; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v17 -; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v17 -; SI-NEXT: v_and_b32_e32 v61, 0xffff0000, v16 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v16 -; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v8 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v8 -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v7 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v7 -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v6 -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v6 -; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v1 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v1 +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v25 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v25 +; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v22 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v22 +; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v19 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v19 +; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v16 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v16 +; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v13 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v13 +; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v10 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v10 +; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v7 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v7 +; SI-NEXT: v_and_b32_e32 v58, 0xffff0000, v4 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: v_and_b32_e32 v61, 0xffff0000, v1 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v0 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; SI-NEXT: s_branch .LBB41_5 @@ -58584,191 +58664,218 @@ define inreg <64 x bfloat> @bitcast_v32f32_to_v64bf16_scalar(<32 x float> inreg ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: s_branch .LBB41_2 ; SI-NEXT: .LBB41_4: -; SI-NEXT: v_mov_b32_e32 v7, s63 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v7, s61 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v7, s60 ; SI-NEXT: v_readlane_b32 s4, v62, 0 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v7, s4 +; SI-NEXT: v_mov_b32_e32 v31, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 1 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v7, s4 +; SI-NEXT: v_mov_b32_e32 v31, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 2 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v7, s4 +; SI-NEXT: v_mov_b32_e32 v34, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 3 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v7, s4 +; SI-NEXT: v_mov_b32_e32 v34, s4 ; SI-NEXT: v_mov_b32_e32 v0, s59 ; SI-NEXT: v_mov_b32_e32 v1, s58 ; SI-NEXT: v_mov_b32_e32 v2, s57 -; SI-NEXT: v_mov_b32_e32 v3, s56 -; SI-NEXT: v_mov_b32_e32 v4, s99 -; SI-NEXT: v_mov_b32_e32 v5, s98 -; SI-NEXT: v_mov_b32_e32 v6, s97 -; SI-NEXT: v_mov_b32_e32 v39, s96 -; SI-NEXT: v_mov_b32_e32 v38, s87 -; SI-NEXT: v_mov_b32_e32 v9, s86 -; SI-NEXT: v_mov_b32_e32 v10, s85 -; SI-NEXT: v_mov_b32_e32 v11, s84 -; SI-NEXT: v_mov_b32_e32 v12, s83 -; SI-NEXT: v_mov_b32_e32 v13, s82 -; SI-NEXT: v_mov_b32_e32 v14, s81 -; SI-NEXT: v_mov_b32_e32 v15, s80 -; SI-NEXT: v_mov_b32_e32 v48, s71 -; SI-NEXT: v_mov_b32_e32 v17, s70 -; SI-NEXT: v_mov_b32_e32 v18, s69 -; SI-NEXT: v_mov_b32_e32 v19, s68 -; SI-NEXT: v_mov_b32_e32 v20, s67 -; SI-NEXT: v_mov_b32_e32 v21, s66 -; SI-NEXT: v_mov_b32_e32 v22, s65 -; SI-NEXT: v_mov_b32_e32 v23, s64 -; SI-NEXT: v_mov_b32_e32 v24, s55 -; SI-NEXT: v_mov_b32_e32 v25, s54 -; SI-NEXT: v_mov_b32_e32 v26, s53 -; SI-NEXT: v_mov_b32_e32 v27, s52 -; SI-NEXT: v_mov_b32_e32 v28, s51 -; SI-NEXT: v_mov_b32_e32 v29, s50 -; SI-NEXT: v_mov_b32_e32 v30, s49 -; SI-NEXT: v_mov_b32_e32 v31, s48 -; SI-NEXT: v_mov_b32_e32 v32, s39 -; SI-NEXT: v_mov_b32_e32 v33, s38 -; SI-NEXT: v_mov_b32_e32 v36, s37 -; SI-NEXT: v_mov_b32_e32 v37, s36 -; SI-NEXT: v_mov_b32_e32 v60, s35 -; SI-NEXT: v_mov_b32_e32 v61, s34 -; SI-NEXT: v_mov_b32_e32 v58, s31 -; SI-NEXT: v_mov_b32_e32 v59, s30 -; SI-NEXT: v_mov_b32_e32 v56, s95 -; SI-NEXT: v_mov_b32_e32 v57, s94 -; SI-NEXT: v_mov_b32_e32 v46, s93 -; SI-NEXT: v_mov_b32_e32 v47, s92 -; SI-NEXT: v_mov_b32_e32 v44, s91 -; SI-NEXT: v_mov_b32_e32 v45, s90 -; SI-NEXT: v_mov_b32_e32 v42, s89 -; SI-NEXT: v_mov_b32_e32 v43, s88 -; SI-NEXT: v_mov_b32_e32 v40, s79 -; SI-NEXT: v_mov_b32_e32 v41, s78 -; SI-NEXT: v_mov_b32_e32 v54, s77 -; SI-NEXT: v_mov_b32_e32 v55, s76 -; SI-NEXT: v_mov_b32_e32 v52, s75 -; SI-NEXT: v_mov_b32_e32 v53, s74 -; SI-NEXT: v_mov_b32_e32 v50, s73 -; SI-NEXT: v_mov_b32_e32 v51, s72 -; SI-NEXT: v_mov_b32_e32 v49, s62 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v33, s56 +; SI-NEXT: v_mov_b32_e32 v3, s99 +; SI-NEXT: v_mov_b32_e32 v32, s98 +; SI-NEXT: v_mov_b32_e32 v4, s97 +; SI-NEXT: v_mov_b32_e32 v61, s96 +; SI-NEXT: v_mov_b32_e32 v5, s87 +; SI-NEXT: v_mov_b32_e32 v60, s86 +; SI-NEXT: v_mov_b32_e32 v6, s85 +; SI-NEXT: v_mov_b32_e32 v59, s84 +; SI-NEXT: v_mov_b32_e32 v7, s83 +; SI-NEXT: v_mov_b32_e32 v58, s82 +; SI-NEXT: v_mov_b32_e32 v8, s81 +; SI-NEXT: v_mov_b32_e32 v57, s80 +; SI-NEXT: v_mov_b32_e32 v9, s71 +; SI-NEXT: v_mov_b32_e32 v56, s70 +; SI-NEXT: v_mov_b32_e32 v10, s69 +; SI-NEXT: v_mov_b32_e32 v47, s68 +; SI-NEXT: v_mov_b32_e32 v11, s67 +; SI-NEXT: v_mov_b32_e32 v46, s66 +; SI-NEXT: v_mov_b32_e32 v12, s65 +; SI-NEXT: v_mov_b32_e32 v45, s64 +; SI-NEXT: v_mov_b32_e32 v13, s55 +; SI-NEXT: v_mov_b32_e32 v44, s54 +; SI-NEXT: v_mov_b32_e32 v14, s53 +; SI-NEXT: v_mov_b32_e32 v43, s52 +; SI-NEXT: v_mov_b32_e32 v15, s51 +; SI-NEXT: v_mov_b32_e32 v42, s50 +; SI-NEXT: v_mov_b32_e32 v16, s49 +; SI-NEXT: v_mov_b32_e32 v41, s48 +; SI-NEXT: v_mov_b32_e32 v17, s39 +; SI-NEXT: v_mov_b32_e32 v40, s38 +; SI-NEXT: v_mov_b32_e32 v18, s37 +; SI-NEXT: v_mov_b32_e32 v55, s36 +; SI-NEXT: v_mov_b32_e32 v19, s35 +; SI-NEXT: v_mov_b32_e32 v54, s34 +; SI-NEXT: v_mov_b32_e32 v20, s31 +; SI-NEXT: v_mov_b32_e32 v53, s30 +; SI-NEXT: v_mov_b32_e32 v21, s95 +; SI-NEXT: v_mov_b32_e32 v52, s94 +; SI-NEXT: v_mov_b32_e32 v22, s93 +; SI-NEXT: v_mov_b32_e32 v51, s92 +; SI-NEXT: v_mov_b32_e32 v23, s91 +; SI-NEXT: v_mov_b32_e32 v50, s90 +; SI-NEXT: v_mov_b32_e32 v24, s89 +; SI-NEXT: v_mov_b32_e32 v49, s88 +; SI-NEXT: v_mov_b32_e32 v25, s79 +; SI-NEXT: v_mov_b32_e32 v48, s78 +; SI-NEXT: v_mov_b32_e32 v26, s77 +; SI-NEXT: v_mov_b32_e32 v39, s76 +; SI-NEXT: v_mov_b32_e32 v27, s75 +; SI-NEXT: v_mov_b32_e32 v38, s74 +; SI-NEXT: v_mov_b32_e32 v28, s73 +; SI-NEXT: v_mov_b32_e32 v37, s72 +; SI-NEXT: v_mov_b32_e32 v29, s63 +; SI-NEXT: v_mov_b32_e32 v36, s62 +; SI-NEXT: v_mov_b32_e32 v30, s61 +; SI-NEXT: v_mov_b32_e32 v35, s60 +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; SI-NEXT: .LBB41_5: ; %end -; SI-NEXT: v_mul_f32_e32 v34, 1.0, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v3 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v5 ; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1 -; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v39 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v1 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v6 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v9 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v11 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v10 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v13 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 +; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 +; SI-NEXT: v_mul_f32_e32 v1, 1.0, v33 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v12 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v15 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v17 -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v19 -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v21 -; SI-NEXT: v_mul_f32_e32 v15, 1.0, v14 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v23 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v25 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v27 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v29 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v31 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v33 -; SI-NEXT: v_mul_f32_e32 v11, 1.0, v18 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v37 -; SI-NEXT: v_mul_f32_e32 v13, 1.0, v20 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v61 -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v59 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v57 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v47 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v45 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v43 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v41 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v55 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v53 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v51 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v49 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_mul_f32_e32 v9, 1.0, v48 -; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2 -; SI-NEXT: v_mul_f32_e32 v7, 1.0, v4 -; SI-NEXT: v_lshr_b64 v[33:34], v[34:35], 16 -; SI-NEXT: v_lshr_b64 v[34:35], v[2:3], 16 -; SI-NEXT: v_lshr_b64 v[2:3], v[7:8], 16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_mul_f32_e32 v5, 1.0, v38 -; SI-NEXT: v_mul_f32_e32 v19, 1.0, v36 -; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22 -; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24 -; SI-NEXT: v_mul_f32_e32 v26, 1.0, v26 -; SI-NEXT: v_mul_f32_e32 v28, 1.0, v28 -; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 -; SI-NEXT: v_mul_f32_e32 v17, 1.0, v32 -; SI-NEXT: v_mul_f32_e32 v60, 1.0, v60 -; SI-NEXT: v_mul_f32_e32 v58, 1.0, v58 -; SI-NEXT: v_mul_f32_e32 v56, 1.0, v56 -; SI-NEXT: v_mul_f32_e32 v46, 1.0, v46 -; SI-NEXT: v_mul_f32_e32 v44, 1.0, v44 -; SI-NEXT: v_mul_f32_e32 v42, 1.0, v42 -; SI-NEXT: v_mul_f32_e32 v40, 1.0, v40 -; SI-NEXT: v_mul_f32_e32 v54, 1.0, v54 -; SI-NEXT: v_mul_f32_e32 v52, 1.0, v52 -; SI-NEXT: v_mul_f32_e32 v50, 1.0, v50 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 +; SI-NEXT: v_mul_f32_e32 v33, 1.0, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[33:34], 16 +; SI-NEXT: v_mul_f32_e32 v2, 1.0, v32 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v3 +; SI-NEXT: v_lshr_b64 v[2:3], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v3, 1.0, v61 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v3 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v4 +; SI-NEXT: v_lshr_b64 v[3:4], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v4, 1.0, v60 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v4 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v5 +; SI-NEXT: v_lshr_b64 v[4:5], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v5, 1.0, v59 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v6 +; SI-NEXT: v_lshr_b64 v[5:6], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v6, 1.0, v58 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v6 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v7 +; SI-NEXT: v_lshr_b64 v[6:7], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v7, 1.0, v57 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v7 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v8 +; SI-NEXT: v_lshr_b64 v[7:8], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v8, 1.0, v56 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v8 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v9 +; SI-NEXT: v_lshr_b64 v[8:9], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v9, 1.0, v47 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v9 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v10 +; SI-NEXT: v_lshr_b64 v[9:10], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v10, 1.0, v46 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v10 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v11 +; SI-NEXT: v_lshr_b64 v[10:11], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v11, 1.0, v45 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v12 +; SI-NEXT: v_lshr_b64 v[11:12], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v12, 1.0, v44 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v13 +; SI-NEXT: v_lshr_b64 v[12:13], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v13, 1.0, v43 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v14 +; SI-NEXT: v_lshr_b64 v[13:14], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v14, 1.0, v42 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v15 +; SI-NEXT: v_lshr_b64 v[14:15], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v15, 1.0, v41 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v16 +; SI-NEXT: v_lshr_b64 v[15:16], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v16, 1.0, v40 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v17 +; SI-NEXT: v_lshr_b64 v[16:17], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v17, 1.0, v55 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v18 +; SI-NEXT: v_lshr_b64 v[17:18], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v18, 1.0, v54 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v19 +; SI-NEXT: v_lshr_b64 v[18:19], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v19, 1.0, v53 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v20 +; SI-NEXT: v_lshr_b64 v[19:20], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v20, 1.0, v52 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v21 +; SI-NEXT: v_lshr_b64 v[20:21], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v21, 1.0, v51 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v22 +; SI-NEXT: v_lshr_b64 v[21:22], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v22, 1.0, v50 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v23 +; SI-NEXT: v_lshr_b64 v[22:23], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v23, 1.0, v49 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v24 +; SI-NEXT: v_lshr_b64 v[23:24], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v24, 1.0, v48 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v25 +; SI-NEXT: v_lshr_b64 v[24:25], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v25, 1.0, v39 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v26 +; SI-NEXT: v_lshr_b64 v[25:26], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v26, 1.0, v38 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v27 +; SI-NEXT: v_lshr_b64 v[26:27], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v27, 1.0, v37 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v28 +; SI-NEXT: v_lshr_b64 v[27:28], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v28, 1.0, v36 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v29 +; SI-NEXT: v_lshr_b64 v[28:29], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v29, 1.0, v35 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 +; SI-NEXT: v_mul_f32_e32 v32, 1.0, v30 +; SI-NEXT: v_lshr_b64 v[29:30], v[32:33], 16 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v31 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v30 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: v_readlane_b32 s30, v63, 34 ; SI-NEXT: v_readlane_b32 s31, v63, 35 ; SI-NEXT: v_readlane_b32 s99, v63, 33 @@ -58805,85 +58912,20 @@ define inreg <64 x bfloat> @bitcast_v32f32_to_v64bf16_scalar(<32 x float> inreg ; SI-NEXT: v_readlane_b32 s36, v63, 2 ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_mul_f32_e32 v48, 1.0, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 -; SI-NEXT: v_lshr_b64 v[4:5], v[5:6], 16 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_mul_f32_e32 v38, 1.0, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16 -; SI-NEXT: v_lshr_b64 v[7:8], v[15:16], 16 -; SI-NEXT: v_lshr_b64 v[8:9], v[9:10], 16 -; SI-NEXT: v_lshr_b64 v[9:10], v[11:12], 16 -; SI-NEXT: v_lshr_b64 v[10:11], v[13:14], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[22:23], 16 -; SI-NEXT: v_lshr_b64 v[12:13], v[24:25], 16 -; SI-NEXT: v_lshr_b64 v[13:14], v[26:27], 16 -; SI-NEXT: v_lshr_b64 v[14:15], v[28:29], 16 -; SI-NEXT: v_lshr_b64 v[15:16], v[30:31], 16 -; SI-NEXT: v_lshr_b64 v[16:17], v[17:18], 16 -; SI-NEXT: v_lshr_b64 v[17:18], v[19:20], 16 -; SI-NEXT: v_lshr_b64 v[18:19], v[60:61], 16 -; SI-NEXT: v_lshr_b64 v[19:20], v[58:59], 16 -; SI-NEXT: v_lshr_b64 v[20:21], v[56:57], 16 -; SI-NEXT: v_lshr_b64 v[21:22], v[46:47], 16 -; SI-NEXT: v_lshr_b64 v[22:23], v[44:45], 16 -; SI-NEXT: v_lshr_b64 v[23:24], v[42:43], 16 -; SI-NEXT: v_lshr_b64 v[24:25], v[40:41], 16 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[25:26], v[54:55], 16 -; SI-NEXT: v_lshr_b64 v[26:27], v[52:53], 16 -; SI-NEXT: v_lshr_b64 v[27:28], v[50:51], 16 -; SI-NEXT: v_lshr_b64 v[28:29], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[29:30], v[38:39], 16 ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mul_f32_e32 v36, 1.0, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[30:31], v[36:37], 16 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 +; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16 +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v31 +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_lshr_b64 v[31:32], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v0, v33 -; SI-NEXT: v_mov_b32_e32 v1, v34 +; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31 +; SI-NEXT: v_lshr_b64 v[31:32], v[31:32], 16 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -59707,8 +59749,6 @@ define <32 x float> @bitcast_v64bf16_to_v32f32(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB42_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v63 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 @@ -59757,6 +59797,8 @@ define <32 x float> @bitcast_v64bf16_to_v32f32(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32 ; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v32 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload @@ -59774,80 +59816,77 @@ define <32 x float> @bitcast_v64bf16_to_v32f32(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6 -; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 ; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 ; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8 -; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9 -; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 ; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10 -; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 -; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: s_waitcnt vmcnt(6) ; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 ; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 ; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 -; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 ; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 ; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 ; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 -; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 ; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_alignbit_b32 v2, v3, v2, 16 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 @@ -62276,7 +62315,7 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -62298,100 +62337,79 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg ; SI-NEXT: v_writelane_b32 v63, s36, 2 ; SI-NEXT: v_writelane_b32 v63, s30, 3 ; SI-NEXT: v_writelane_b32 v63, s31, 4 -; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 -; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 -; SI-NEXT: v_readfirstlane_b32 s30, v1 -; SI-NEXT: v_readfirstlane_b32 s34, v0 -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s12 -; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2 -; SI-NEXT: s_and_b32 s31, s30, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6 -; SI-NEXT: v_readfirstlane_b32 s94, v3 -; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s31 +; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 ; SI-NEXT: v_readfirstlane_b32 s90, v5 -; SI-NEXT: s_and_b32 s95, s94, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_hi -; SI-NEXT: v_readfirstlane_b32 s88, v6 +; SI-NEXT: v_readfirstlane_b32 s76, v8 ; SI-NEXT: s_and_b32 s91, s90, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s95 -; SI-NEXT: v_readfirstlane_b32 s78, v7 -; SI-NEXT: s_and_b32 s89, s88, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_readfirstlane_b32 s34, v0 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s14 +; SI-NEXT: s_and_b32 s77, s76, 0xffff0000 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s91 -; SI-NEXT: v_readfirstlane_b32 s76, v8 -; SI-NEXT: s_and_b32 s79, s78, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: s_and_b32 s41, s16, 0xffff0000 +; SI-NEXT: s_lshl_b32 s76, s76, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s89 -; SI-NEXT: v_readfirstlane_b32 s74, v9 -; SI-NEXT: s_and_b32 s77, s76, 0xffff0000 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77 +; SI-NEXT: v_readfirstlane_b32 s30, v1 +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s41 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s76 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: v_readfirstlane_b32 s72, v10 -; SI-NEXT: s_and_b32 s75, s74, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77 ; SI-NEXT: v_readfirstlane_b32 s62, v11 ; SI-NEXT: s_and_b32 s73, s72, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s75 ; SI-NEXT: v_readfirstlane_b32 s60, v12 ; SI-NEXT: s_and_b32 s63, s62, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s73 ; SI-NEXT: v_readfirstlane_b32 s58, v13 ; SI-NEXT: s_and_b32 s61, s60, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s63 ; SI-NEXT: v_readfirstlane_b32 s56, v14 ; SI-NEXT: s_and_b32 s59, s58, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s61 -; SI-NEXT: v_readfirstlane_b32 s46, v15 +; SI-NEXT: v_readfirstlane_b32 s44, v16 ; SI-NEXT: s_and_b32 s57, s56, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s59 -; SI-NEXT: v_readfirstlane_b32 s44, v16 -; SI-NEXT: s_and_b32 s47, s46, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57 -; SI-NEXT: v_readfirstlane_b32 s42, v17 ; SI-NEXT: s_and_b32 s45, s44, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s47 -; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 -; SI-NEXT: v_readfirstlane_b32 s92, v4 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57 +; SI-NEXT: s_lshl_b32 s44, s44, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s44 +; SI-NEXT: v_readfirstlane_b32 s42, v17 +; SI-NEXT: v_readfirstlane_b32 s46, v15 +; SI-NEXT: v_readfirstlane_b32 s74, v9 +; SI-NEXT: v_readfirstlane_b32 s78, v7 +; SI-NEXT: v_readfirstlane_b32 s88, v6 +; SI-NEXT: v_readfirstlane_b32 s92, v4 +; SI-NEXT: v_readfirstlane_b32 s94, v3 +; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2 ; SI-NEXT: s_and_b32 s4, s29, 0xffff0000 ; SI-NEXT: s_lshl_b32 s5, s29, 16 +; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 ; SI-NEXT: s_lshl_b32 s7, s28, 16 ; SI-NEXT: s_and_b32 s8, s27, 0xffff0000 ; SI-NEXT: s_lshl_b32 s9, s27, 16 ; SI-NEXT: s_and_b32 s10, s26, 0xffff0000 ; SI-NEXT: s_lshl_b32 s11, s26, 16 +; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 ; SI-NEXT: s_lshl_b32 s13, s25, 16 -; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 ; SI-NEXT: s_lshl_b32 s15, s24, 16 ; SI-NEXT: s_and_b32 s24, s23, 0xffff0000 ; SI-NEXT: s_lshl_b32 s23, s23, 16 @@ -62407,528 +62425,559 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg ; SI-NEXT: s_lshl_b32 s18, s18, 16 ; SI-NEXT: s_and_b32 s40, s17, 0xffff0000 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_and_b32 s41, s16, 0xffff0000 ; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 ; SI-NEXT: s_lshl_b32 s42, s42, 16 -; SI-NEXT: s_lshl_b32 s44, s44, 16 +; SI-NEXT: s_and_b32 s47, s46, 0xffff0000 ; SI-NEXT: s_lshl_b32 s46, s46, 16 ; SI-NEXT: s_lshl_b32 s56, s56, 16 ; SI-NEXT: s_lshl_b32 s58, s58, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_lshl_b32 s60, s60, 16 ; SI-NEXT: s_lshl_b32 s62, s62, 16 ; SI-NEXT: s_lshl_b32 s72, s72, 16 +; SI-NEXT: s_and_b32 s75, s74, 0xffff0000 ; SI-NEXT: s_lshl_b32 s74, s74, 16 -; SI-NEXT: s_lshl_b32 s76, s76, 16 +; SI-NEXT: s_and_b32 s79, s78, 0xffff0000 ; SI-NEXT: s_lshl_b32 s78, s78, 16 +; SI-NEXT: s_and_b32 s89, s88, 0xffff0000 ; SI-NEXT: s_lshl_b32 s88, s88, 16 ; SI-NEXT: s_lshl_b32 s90, s90, 16 ; SI-NEXT: s_and_b32 s93, s92, 0xffff0000 ; SI-NEXT: s_lshl_b32 s92, s92, 16 +; SI-NEXT: s_and_b32 s95, s94, 0xffff0000 ; SI-NEXT: s_lshl_b32 s94, s94, 16 +; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000 ; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16 +; SI-NEXT: s_and_b32 s31, s30, 0xffff0000 ; SI-NEXT: s_lshl_b32 s30, s30, 16 ; SI-NEXT: s_and_b32 s35, s34, 0xffff0000 ; SI-NEXT: s_lshl_b32 s34, s34, 16 ; SI-NEXT: v_readfirstlane_b32 s36, v18 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43 ; SI-NEXT: s_cmp_lg_u32 s36, 0 -; SI-NEXT: v_mul_f32_e64 v55, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v53, 1.0, s40 -; SI-NEXT: v_mul_f32_e64 v3, 1.0, s29 -; SI-NEXT: v_mul_f32_e64 v4, 1.0, s28 -; SI-NEXT: v_mul_f32_e64 v62, 1.0, s27 -; SI-NEXT: v_mul_f32_e64 v6, 1.0, s26 -; SI-NEXT: v_mul_f32_e64 v7, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v3, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v11, 1.0, s40 +; SI-NEXT: v_mul_f32_e64 v36, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v9, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v40, 1.0, s18 +; SI-NEXT: v_mul_f32_e64 v6, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v22, 1.0, s19 +; SI-NEXT: v_mul_f32_e64 v5, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v35, 1.0, s20 +; SI-NEXT: v_mul_f32_e64 v7, 1.0, s26 +; SI-NEXT: v_mul_f32_e64 v34, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v62, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v33, 1.0, s22 ; SI-NEXT: v_mul_f32_e64 v8, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v9, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v11, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v61, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v60, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v10, 1.0, s12 +; SI-NEXT: v_mul_f32_e64 v59, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v20, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v53, 1.0, s11 ; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s35 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s93 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: v_mul_f32_e64 v43, 1.0, s16 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17 -; SI-NEXT: v_mul_f32_e64 v34, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v17, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v20, 1.0, s20 -; SI-NEXT: v_mul_f32_e64 v19, 1.0, s21 -; SI-NEXT: v_mul_f32_e64 v13, 1.0, s22 -; SI-NEXT: v_mul_f32_e64 v31, 1.0, s23 -; SI-NEXT: v_mul_f32_e64 v23, 1.0, s15 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s13 -; SI-NEXT: v_mul_f32_e64 v30, 1.0, s11 -; SI-NEXT: v_mul_f32_e64 v27, 1.0, s9 -; SI-NEXT: v_mul_f32_e64 v61, 1.0, s7 -; SI-NEXT: v_mul_f32_e64 v29, 1.0, s5 -; SI-NEXT: v_mul_f32_e64 v15, 1.0, s34 -; SI-NEXT: v_mul_f32_e64 v60, 1.0, s30 -; SI-NEXT: v_mul_f32_e64 v33, 1.0, vcc_lo -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s94 -; SI-NEXT: v_mul_f32_e64 v59, 1.0, s92 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s90 -; SI-NEXT: v_mul_f32_e64 v38, 1.0, s88 -; SI-NEXT: v_mul_f32_e64 v22, 1.0, s78 -; SI-NEXT: v_mul_f32_e64 v36, 1.0, s76 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s74 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s72 -; SI-NEXT: v_mul_f32_e64 v49, 1.0, s62 +; SI-NEXT: v_mul_f32_e64 v51, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v13, 1.0, s6 +; SI-NEXT: v_mul_f32_e64 v43, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v14, 1.0, s4 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v15, 1.0, s35 +; SI-NEXT: v_mul_f32_e64 v32, 1.0, s34 +; SI-NEXT: v_mul_f32_e64 v17, 1.0, s31 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s30 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, vcc_hi +; SI-NEXT: v_mul_f32_e64 v48, 1.0, vcc_lo +; SI-NEXT: v_mul_f32_e64 v18, 1.0, s95 +; SI-NEXT: v_mul_f32_e64 v55, 1.0, s94 +; SI-NEXT: v_mul_f32_e64 v19, 1.0, s93 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s92 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s90 +; SI-NEXT: v_mul_f32_e64 v21, 1.0, s89 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s88 +; SI-NEXT: v_mul_f32_e64 v27, 1.0, s79 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s78 +; SI-NEXT: v_mul_f32_e64 v49, 1.0, s75 +; SI-NEXT: v_mul_f32_e64 v24, 1.0, s74 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s72 +; SI-NEXT: v_mul_f32_e64 v26, 1.0, s62 ; SI-NEXT: v_mul_f32_e64 v45, 1.0, s60 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s58 -; SI-NEXT: v_mul_f32_e64 v51, 1.0, s56 -; SI-NEXT: v_mul_f32_e64 v41, 1.0, s46 -; SI-NEXT: v_mul_f32_e64 v54, 1.0, s44 -; SI-NEXT: v_mul_f32_e64 v52, 1.0, s42 -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v28, 1.0, s58 +; SI-NEXT: v_mul_f32_e64 v52, 1.0, s56 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s47 +; SI-NEXT: v_mul_f32_e64 v30, 1.0, s46 +; SI-NEXT: v_mul_f32_e64 v44, 1.0, s43 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s42 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; SI-NEXT: s_cbranch_scc0 .LBB43_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v55 -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v53 +; SI-NEXT: v_mov_b32_e32 v0, v3 +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v44, v1 -; SI-NEXT: v_mov_b32_e32 v43, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v4 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v62 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v12 -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: v_mov_b32_e32 v36, v47 -; SI-NEXT: v_mov_b32_e32 v50, v49 -; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v40, v41 -; SI-NEXT: s_mov_b64 s[4:5], 0 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v1, v43 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[0:1], v[3:4], 16 +; SI-NEXT: v_mov_b32_e32 v1, v36 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v11 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[1:2], v[43:44], 16 -; SI-NEXT: v_mov_b32_e32 v2, v34 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[1:2], v[36:37], 16 +; SI-NEXT: v_mov_b32_e32 v2, v40 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v9 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[2:3], v[34:35], 16 -; SI-NEXT: v_mov_b32_e32 v3, v17 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[2:3], v[40:41], 16 +; SI-NEXT: v_mov_b32_e32 v3, v22 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v6 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 16 -; SI-NEXT: v_mov_b32_e32 v4, v20 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[3:4], v[22:23], 16 +; SI-NEXT: v_mov_b32_e32 v4, v35 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v5 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[4:5], v[20:21], 16 -; SI-NEXT: v_mov_b32_e32 v5, v19 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v6 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[4:5], v[35:36], 16 +; SI-NEXT: v_mov_b32_e32 v5, v34 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v7 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[5:6], v[19:20], 16 -; SI-NEXT: v_mov_b32_e32 v6, v13 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[5:6], v[34:35], 16 +; SI-NEXT: v_mov_b32_e32 v6, v33 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v62 +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[6:7], v[13:14], 16 -; SI-NEXT: v_mov_b32_e32 v7, v31 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[6:7], v[33:34], 16 +; SI-NEXT: v_mov_b32_e32 v7, v61 +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[7:8], v[31:32], 16 -; SI-NEXT: v_mov_b32_e32 v8, v23 -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v8 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[8:9], v[23:24], 16 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v44, v45 -; SI-NEXT: v_mov_b32_e32 v32, v59 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 -; SI-NEXT: v_mov_b32_e32 v9, v25 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[7:8], v[61:62], 16 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v20 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v12 +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[9:10], v[25:26], 16 -; SI-NEXT: v_mov_b32_e32 v10, v30 -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_mov_b32_e32 v25, v49 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v56 +; SI-NEXT: v_mov_b32_e32 v20, v56 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v18 +; SI-NEXT: v_mov_b32_e32 v31, v47 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v27 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v8 +; SI-NEXT: v_mov_b32_e32 v8, v60 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[10:11], v[30:31], 16 -; SI-NEXT: v_mov_b32_e32 v11, v27 -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[8:9], v[60:61], 16 +; SI-NEXT: v_mov_b32_e32 v9, v59 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v10 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[11:12], v[27:28], 16 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v16 -; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v17 -; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v18 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v27 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v12 -; SI-NEXT: v_mov_b32_e32 v12, v61 +; SI-NEXT: v_lshr_b64 v[9:10], v[59:60], 16 +; SI-NEXT: v_mov_b32_e32 v10, v53 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[10:11], v[53:54], 16 +; SI-NEXT: v_mov_b32_e32 v11, v51 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[12:13], v[61:62], 16 -; SI-NEXT: v_mov_b32_e32 v13, v29 -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[11:12], v[51:52], 16 +; SI-NEXT: v_mov_b32_e32 v12, v43 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[13:14], v[29:30], 16 -; SI-NEXT: v_mov_b32_e32 v14, v15 -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v62, v39 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v62 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v21 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v25 -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v26 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28 +; SI-NEXT: v_lshr_b64 v[12:13], v[43:44], 16 +; SI-NEXT: v_mov_b32_e32 v13, v39 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[14:15], v[15:16], 16 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v30 +; SI-NEXT: v_lshr_b64 v[13:14], v[39:40], 16 +; SI-NEXT: v_mov_b32_e32 v14, v32 +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[14:15], v[32:33], 16 +; SI-NEXT: v_mov_b32_e32 v15, v16 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v39, v48 +; SI-NEXT: v_mov_b32_e32 v54, v55 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v19 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v21 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[15:16], v[16:17], 16 +; SI-NEXT: v_lshr_b64 v[16:17], v[48:49], 16 +; SI-NEXT: v_mov_b32_e32 v48, v18 +; SI-NEXT: v_lshr_b64 v[17:18], v[55:56], 16 +; SI-NEXT: v_mov_b32_e32 v18, v42 +; SI-NEXT: v_mov_b32_e32 v55, v19 +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[18:19], v[42:43], 16 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v56, v20 +; SI-NEXT: v_mov_b32_e32 v49, v25 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v15 -; SI-NEXT: v_mov_b32_e32 v15, v60 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v19 +; SI-NEXT: v_mov_b32_e32 v19, v50 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[60:61], 16 -; SI-NEXT: v_mov_b32_e32 v16, v33 -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[50:51], 16 +; SI-NEXT: v_mov_b32_e32 v20, v58 +; SI-NEXT: v_mov_b32_e32 v50, v21 +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[16:17], v[33:34], 16 -; SI-NEXT: v_mov_b32_e32 v17, v57 -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[20:21], v[58:59], 16 +; SI-NEXT: v_mov_b32_e32 v21, v46 +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[17:18], v[57:58], 16 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v47 -; SI-NEXT: v_lshr_b64 v[18:19], v[59:60], 16 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v20 -; SI-NEXT: v_lshr_b64 v[19:20], v[56:57], 16 -; SI-NEXT: v_mov_b32_e32 v20, v38 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[21:22], v[46:47], 16 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v36 +; SI-NEXT: v_mov_b32_e32 v47, v31 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22 +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16 +; SI-NEXT: v_mov_b32_e32 v23, v24 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[20:21], v[38:39], 16 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v24 +; SI-NEXT: v_lshr_b64 v[23:24], v[24:25], 16 +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; SI-NEXT: v_mov_b32_e32 v39, v62 -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21 -; SI-NEXT: v_mov_b32_e32 v21, v22 -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v24 +; SI-NEXT: v_lshr_b64 v[24:25], v[57:58], 16 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v25 +; SI-NEXT: v_mov_b32_e32 v25, v26 +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[21:22], v[22:23], 16 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v55 +; SI-NEXT: v_lshr_b64 v[25:26], v[26:27], 16 +; SI-NEXT: v_lshr_b64 v[26:27], v[45:46], 16 +; SI-NEXT: v_mov_b32_e32 v46, v28 +; SI-NEXT: v_lshr_b64 v[27:28], v[28:29], 16 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22 -; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16 -; SI-NEXT: v_lshr_b64 v[23:24], v[46:47], 16 -; SI-NEXT: v_lshr_b64 v[24:25], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[25:26], v[50:51], 16 -; SI-NEXT: v_lshr_b64 v[26:27], v[44:45], 16 -; SI-NEXT: v_lshr_b64 v[27:28], v[42:43], 16 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v53 -; SI-NEXT: v_lshr_b64 v[61:62], v[52:53], 16 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v45, v44 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v47, v36 -; SI-NEXT: v_mov_b32_e32 v36, v37 -; SI-NEXT: v_mov_b32_e32 v49, v50 -; SI-NEXT: v_mov_b32_e32 v51, v33 -; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16 -; SI-NEXT: v_lshr_b64 v[29:30], v[40:41], 16 -; SI-NEXT: v_lshr_b64 v[30:31], v[54:55], 16 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v29, v30 +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_mov_b32_e32 v44, v32 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[29:30], v[30:31], 16 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v32 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshr_b64 v[61:62], v[30:31], 16 +; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v53 +; SI-NEXT: v_mov_b32_e32 v53, v30 +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16 ; SI-NEXT: v_mov_b32_e32 v31, v61 -; SI-NEXT: v_mov_b32_e32 v41, v40 ; SI-NEXT: s_branch .LBB43_3 ; SI-NEXT: .LBB43_2: -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v32, v59 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v58, v56 +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v39, v48 +; SI-NEXT: v_mov_b32_e32 v54, v55 +; SI-NEXT: v_mov_b32_e32 v48, v18 +; SI-NEXT: v_mov_b32_e32 v55, v19 +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: v_mov_b32_e32 v46, v28 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_mov_b32_e32 v50, v21 +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: .LBB43_3: ; %Flow -; SI-NEXT: v_mov_b32_e32 v37, v32 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_mov_b32_e32 v53, v39 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v35, v54 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_mov_b32_e32 v33, v38 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v33, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) expcnt(3) -; SI-NEXT: v_mov_b32_e32 v38, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v50, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v40, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v51, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0) +; SI-NEXT: v_mov_b32_e32 v54, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v39, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v34, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v40, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v43, v58 ; SI-NEXT: s_cbranch_vccnz .LBB43_5 ; SI-NEXT: ; %bb.4: ; %cmp.true -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v55 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v43 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v53 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v62 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v56 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v48 +; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18 +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v34, v56 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v47 -; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v34 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 -; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 -; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23 -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31 -; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 -; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 -; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 -; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 -; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 -; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 -; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 -; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v40 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v43 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v62 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v42 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 -; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v41 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v40 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v34 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v39 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 ; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 -; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v54 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 +; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 +; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28 +; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 +; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 +; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 +; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 @@ -62937,99 +62986,85 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 ; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v50 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 -; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v51 +; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 ; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16 ; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v38 ; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 ; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v33 ; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v39 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v32 ; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 ; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16 -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v33 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v44 +; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16 -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v32 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v52 -; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 -; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v35 ; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v55 +; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32 +; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 +; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16 ; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 ; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16 -; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v37 -; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 ; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16 -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v58 -; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 -; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 +; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 ; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21 +; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v50 ; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 ; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 +; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21 ; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 @@ -63038,32 +63073,68 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg ; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16 -; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v36 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22 ; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 +; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v46 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v49 +; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 ; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16 -; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v48 +; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v57 ; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 ; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16 -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v49 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 ; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 +; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16 ; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v45 ; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 ; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16 -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v42 +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v46 ; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 ; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16 -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v51 +; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v52 ; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 ; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16 -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v41 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v47 +; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 ; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 ; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16 -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v54 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 ; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31 +; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16 ; SI-NEXT: v_mov_b32_e32 v31, v32 ; SI-NEXT: .LBB43_5: ; %end @@ -63088,33 +63159,34 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v64bf16_to_v32f32_scalar: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v35, s36, 0 -; VI-NEXT: v_writelane_b32 v35, s37, 1 -; VI-NEXT: v_writelane_b32 v35, s38, 2 -; VI-NEXT: v_writelane_b32 v35, s39, 3 -; VI-NEXT: v_writelane_b32 v35, s48, 4 -; VI-NEXT: v_writelane_b32 v35, s49, 5 -; VI-NEXT: v_writelane_b32 v35, s50, 6 -; VI-NEXT: v_writelane_b32 v35, s51, 7 -; VI-NEXT: v_writelane_b32 v35, s52, 8 -; VI-NEXT: v_writelane_b32 v35, s53, 9 -; VI-NEXT: v_writelane_b32 v35, s54, 10 -; VI-NEXT: v_writelane_b32 v35, s55, 11 -; VI-NEXT: v_writelane_b32 v35, s64, 12 -; VI-NEXT: v_writelane_b32 v35, s65, 13 -; VI-NEXT: v_writelane_b32 v35, s66, 14 -; VI-NEXT: v_writelane_b32 v35, s67, 15 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: v_writelane_b32 v41, s36, 0 +; VI-NEXT: v_writelane_b32 v41, s37, 1 +; VI-NEXT: v_writelane_b32 v41, s38, 2 +; VI-NEXT: v_writelane_b32 v41, s39, 3 +; VI-NEXT: v_writelane_b32 v41, s48, 4 +; VI-NEXT: v_writelane_b32 v41, s49, 5 +; VI-NEXT: v_writelane_b32 v41, s50, 6 +; VI-NEXT: v_writelane_b32 v41, s51, 7 +; VI-NEXT: v_writelane_b32 v41, s52, 8 +; VI-NEXT: v_writelane_b32 v41, s53, 9 +; VI-NEXT: v_writelane_b32 v41, s54, 10 +; VI-NEXT: v_writelane_b32 v41, s55, 11 +; VI-NEXT: v_writelane_b32 v41, s64, 12 +; VI-NEXT: v_writelane_b32 v41, s65, 13 +; VI-NEXT: v_writelane_b32 v41, s66, 14 +; VI-NEXT: v_writelane_b32 v41, s67, 15 ; VI-NEXT: v_readfirstlane_b32 s4, v18 ; VI-NEXT: s_mov_b32 s49, s29 ; VI-NEXT: s_mov_b32 s48, s28 @@ -63153,9 +63225,27 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB43_4 ; VI-NEXT: .LBB43_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v32, 0x40c00000 +; VI-NEXT: s_lshl_b32 s4, s51, 16 +; VI-NEXT: v_mov_b32_e32 v17, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; VI-NEXT: s_lshl_b32 s4, s50, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 @@ -63163,588 +63253,571 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 ; VI-NEXT: s_and_b32 s4, s50, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v32 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s48, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v32 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: s_lshl_b32 s4, s49, 16 ; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s46, 16 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[2:3] ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s48, 16 +; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s47, 16 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s46, 16 +; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s45, 16 ; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s44, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s44, 16 +; VI-NEXT: v_lshrrev_b64 v[34:35], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s43, 16 ; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s42, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s42, 16 +; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s41, 16 ; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s40, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s40, 16 +; VI-NEXT: v_lshrrev_b64 v[36:37], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s39, 16 ; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s38, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s38, 16 +; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s37, 16 ; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s36, 16 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc -; VI-NEXT: v_bfe_u32 v3, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v0 +; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s36, 16 +; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc +; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: s_and_b32 s4, s66, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 +; VI-NEXT: s_lshl_b32 s4, s67, 16 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s67, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s66, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s66, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[48:49], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s64, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s65, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s65, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s64, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s64, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[49:50], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s62, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s63, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s63, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s62, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s62, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[50:51], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s60, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s61, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s61, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s60, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s60, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[51:52], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s58, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s59, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s59, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s58, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s58, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[52:53], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s56, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s57, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s57, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s56, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s56, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[53:54], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s54, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s55, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s55, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s54, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s54, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[54:55], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s52, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s53, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s53, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v39, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s52, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s52, 16 +; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s52, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v16, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s37, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: s_lshl_b32 s4, s39, 16 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc -; VI-NEXT: v_add_f32_e32 v5, s4, v32 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s4, v32 -; VI-NEXT: v_mov_b32_e32 v1, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v7, v9, vcc -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: s_lshl_b32 s4, s41, 16 -; VI-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc -; VI-NEXT: v_add_f32_e32 v7, s4, v32 -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v3 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s4, v32 -; VI-NEXT: v_mov_b32_e32 v3, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v9, v11, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: s_lshl_b32 s4, s43, 16 -; VI-NEXT: v_cndmask_b32_e32 v7, v9, v11, vcc -; VI-NEXT: v_add_f32_e32 v9, s4, v32 -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v5 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s4, v32 -; VI-NEXT: v_mov_b32_e32 v5, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: s_lshl_b32 s4, s45, 16 -; VI-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc -; VI-NEXT: v_add_f32_e32 v11, s4, v32 -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[15:16] -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s4, v32 -; VI-NEXT: v_mov_b32_e32 v7, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v13, v15, vcc -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: s_lshl_b32 s4, s47, 16 -; VI-NEXT: v_cndmask_b32_e32 v11, v13, v15, vcc -; VI-NEXT: v_add_f32_e32 v13, s4, v32 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v9 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v32 -; VI-NEXT: v_mov_b32_e32 v9, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: s_lshl_b32 s4, s49, 16 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v17, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v15, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v11 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v15 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_add_f32_e32 v15, s4, v32 +; VI-NEXT: v_lshrrev_b64 v[39:40], 16, v[39:40] +; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v1 +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] +; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[16:17] +; VI-NEXT: v_mov_b32_e32 v1, v38 +; VI-NEXT: v_mov_b32_e32 v3, v37 +; VI-NEXT: v_mov_b32_e32 v5, v36 +; VI-NEXT: v_mov_b32_e32 v7, v35 +; VI-NEXT: v_mov_b32_e32 v9, v34 ; VI-NEXT: v_mov_b32_e32 v11, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v17, v19, vcc -; VI-NEXT: v_bfe_u32 v17, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v15 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: s_lshl_b32 s4, s51, 16 -; VI-NEXT: v_cndmask_b32_e32 v15, v17, v19, vcc -; VI-NEXT: v_add_f32_e32 v17, s4, v32 -; VI-NEXT: v_bfe_u32 v19, v17, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: s_and_b32 s4, s53, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; VI-NEXT: v_add_f32_e32 v17, s4, v32 -; VI-NEXT: v_mov_b32_e32 v13, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v19, v21, vcc -; VI-NEXT: v_bfe_u32 v19, v17, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; VI-NEXT: s_lshl_b32 s4, s53, 16 -; VI-NEXT: v_cndmask_b32_e32 v17, v19, v21, vcc -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v15 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: s_and_b32 s4, s55, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_mov_b32_e32 v15, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v21, v23, vcc -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: s_lshl_b32 s4, s55, 16 -; VI-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v17 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: s_and_b32 s4, s57, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_mov_b32_e32 v17, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v23, v25, vcc -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: s_lshl_b32 s4, s57, 16 -; VI-NEXT: v_cndmask_b32_e32 v21, v23, v25, vcc -; VI-NEXT: v_add_f32_e32 v23, s4, v32 -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v19 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: s_and_b32 s4, s59, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: v_add_f32_e32 v23, s4, v32 -; VI-NEXT: v_mov_b32_e32 v19, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v25, v27, vcc -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: s_lshl_b32 s4, s59, 16 -; VI-NEXT: v_cndmask_b32_e32 v23, v25, v27, vcc -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: s_and_b32 s4, s61, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_mov_b32_e32 v21, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v27, v29, vcc -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: s_lshl_b32 s4, s61, 16 -; VI-NEXT: v_cndmask_b32_e32 v25, v27, v29, vcc -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v23 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: s_and_b32 s4, s63, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_mov_b32_e32 v23, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v29, v31, vcc -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: s_lshl_b32 s4, s63, 16 -; VI-NEXT: v_cndmask_b32_e32 v27, v29, v31, vcc -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v25 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: s_and_b32 s4, s65, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v25, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v31, v33, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v27 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: v_mov_b32_e32 v27, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: s_lshl_b32 s4, s65, 16 -; VI-NEXT: v_cndmask_b32_e32 v29, v31, v33, vcc -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: s_and_b32 s4, s67, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_mov_b32_e32 v29, v33 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: s_lshl_b32 s4, s67, 16 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v32, v31, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_add_u32_e32 v32, vcc, v32, v31 -; VI-NEXT: v_add_u32_e32 v32, vcc, 0x7fff, v32 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v31, v32, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v33 -; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[31:32] +; VI-NEXT: v_mov_b32_e32 v13, v15 +; VI-NEXT: v_mov_b32_e32 v15, v32 +; VI-NEXT: v_mov_b32_e32 v17, v39 +; VI-NEXT: v_mov_b32_e32 v19, v54 +; VI-NEXT: v_mov_b32_e32 v21, v53 +; VI-NEXT: v_mov_b32_e32 v23, v52 +; VI-NEXT: v_mov_b32_e32 v25, v51 +; VI-NEXT: v_mov_b32_e32 v27, v50 +; VI-NEXT: v_mov_b32_e32 v29, v49 +; VI-NEXT: v_mov_b32_e32 v31, v48 ; VI-NEXT: s_branch .LBB43_5 ; VI-NEXT: .LBB43_3: ; VI-NEXT: s_branch .LBB43_2 @@ -63782,24 +63855,25 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg ; VI-NEXT: v_mov_b32_e32 v30, s66 ; VI-NEXT: v_mov_b32_e32 v31, s67 ; VI-NEXT: .LBB43_5: ; %end -; VI-NEXT: v_readlane_b32 s67, v35, 15 -; VI-NEXT: v_readlane_b32 s66, v35, 14 -; VI-NEXT: v_readlane_b32 s65, v35, 13 -; VI-NEXT: v_readlane_b32 s64, v35, 12 -; VI-NEXT: v_readlane_b32 s55, v35, 11 -; VI-NEXT: v_readlane_b32 s54, v35, 10 -; VI-NEXT: v_readlane_b32 s53, v35, 9 -; VI-NEXT: v_readlane_b32 s52, v35, 8 -; VI-NEXT: v_readlane_b32 s51, v35, 7 -; VI-NEXT: v_readlane_b32 s50, v35, 6 -; VI-NEXT: v_readlane_b32 s49, v35, 5 -; VI-NEXT: v_readlane_b32 s48, v35, 4 -; VI-NEXT: v_readlane_b32 s39, v35, 3 -; VI-NEXT: v_readlane_b32 s38, v35, 2 -; VI-NEXT: v_readlane_b32 s37, v35, 1 -; VI-NEXT: v_readlane_b32 s36, v35, 0 -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: v_readlane_b32 s67, v41, 15 +; VI-NEXT: v_readlane_b32 s66, v41, 14 +; VI-NEXT: v_readlane_b32 s65, v41, 13 +; VI-NEXT: v_readlane_b32 s64, v41, 12 +; VI-NEXT: v_readlane_b32 s55, v41, 11 +; VI-NEXT: v_readlane_b32 s54, v41, 10 +; VI-NEXT: v_readlane_b32 s53, v41, 9 +; VI-NEXT: v_readlane_b32 s52, v41, 8 +; VI-NEXT: v_readlane_b32 s51, v41, 7 +; VI-NEXT: v_readlane_b32 s50, v41, 6 +; VI-NEXT: v_readlane_b32 s49, v41, 5 +; VI-NEXT: v_readlane_b32 s48, v41, 4 +; VI-NEXT: v_readlane_b32 s39, v41, 3 +; VI-NEXT: v_readlane_b32 s38, v41, 2 +; VI-NEXT: v_readlane_b32 s37, v41, 1 +; VI-NEXT: v_readlane_b32 s36, v41, 0 +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -63880,34 +63954,34 @@ define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v16 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_lshl_b32 s4, s50, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s4, v16 ; GFX9-NEXT: v_mov_b32_e32 v32, 0xffff -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v15, v0, 16, v1 ; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_b32_sdwa v3, v32, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_lshl_or_b32 v14, v2, 16, v3 +; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 +; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: s_lshl_b32 s4, s50, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 +; GFX9-NEXT: v_lshl_or_b32 v14, v0, 16, v1 +; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 +; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 ; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 ; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 @@ -66561,22 +66635,22 @@ define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a, ; SI-NEXT: s_lshr_b32 s48, s21, 16 ; SI-NEXT: s_lshr_b32 s39, s19, 16 ; SI-NEXT: s_lshr_b32 s38, s17, 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[34:35], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[44:45], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 ; SI-NEXT: s_cbranch_execnz .LBB45_4 ; SI-NEXT: .LBB45_2: ; %cmp.true ; SI-NEXT: v_add_f32_e64 v31, s5, 1.0 @@ -66648,41 +66722,41 @@ define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 ; SI-NEXT: s_branch .LBB45_5 ; SI-NEXT: .LBB45_3: -; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr36 ; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr30 ; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: ; implicit-def: $sgpr49 -; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: ; implicit-def: $sgpr90 ; SI-NEXT: ; implicit-def: $sgpr51 -; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr88 ; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr55 -; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr65 -; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr67 +; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr68 +; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr69 -; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr30 ; SI-NEXT: s_branch .LBB45_2 ; SI-NEXT: .LBB45_4: -; SI-NEXT: v_mov_b32_e32 v33, s30 +; SI-NEXT: v_mov_b32_e32 v33, s46 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: v_mov_b32_e32 v0, s16 @@ -66735,58 +66809,58 @@ define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v41, s68 ; SI-NEXT: v_mov_b32_e32 v55, s69 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v33, s34 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v34, s36 -; SI-NEXT: v_mov_b32_e32 v35, s46 -; SI-NEXT: v_mov_b32_e32 v36, s56 -; SI-NEXT: v_mov_b32_e32 v37, s58 -; SI-NEXT: v_mov_b32_e32 v38, s60 -; SI-NEXT: v_mov_b32_e32 v48, s62 -; SI-NEXT: v_mov_b32_e32 v49, s72 -; SI-NEXT: v_mov_b32_e32 v50, s74 -; SI-NEXT: v_mov_b32_e32 v51, s76 -; SI-NEXT: v_mov_b32_e32 v52, s78 -; SI-NEXT: v_mov_b32_e32 v53, s88 -; SI-NEXT: v_mov_b32_e32 v54, s90 -; SI-NEXT: v_mov_b32_e32 v39, s92 -; SI-NEXT: v_mov_b32_e32 v40, s94 +; SI-NEXT: v_mov_b32_e32 v33, s56 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v34, s58 +; SI-NEXT: v_mov_b32_e32 v35, s60 +; SI-NEXT: v_mov_b32_e32 v36, s62 +; SI-NEXT: v_mov_b32_e32 v37, s72 +; SI-NEXT: v_mov_b32_e32 v38, s74 +; SI-NEXT: v_mov_b32_e32 v48, s76 +; SI-NEXT: v_mov_b32_e32 v49, s78 +; SI-NEXT: v_mov_b32_e32 v50, s88 +; SI-NEXT: v_mov_b32_e32 v51, s90 +; SI-NEXT: v_mov_b32_e32 v52, s92 +; SI-NEXT: v_mov_b32_e32 v53, s94 +; SI-NEXT: v_mov_b32_e32 v54, s30 +; SI-NEXT: v_mov_b32_e32 v39, s34 +; SI-NEXT: v_mov_b32_e32 v40, s36 ; SI-NEXT: .LBB45_5: ; %end ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_or_b32_e32 v1, v1, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v39 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v39 ; SI-NEXT: v_or_b32_e32 v2, v2, v32 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v62 ; SI-NEXT: v_or_b32_e32 v3, v3, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v54 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v54 ; SI-NEXT: v_or_b32_e32 v4, v4, v32 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v61 ; SI-NEXT: v_or_b32_e32 v5, v5, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v53 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v53 ; SI-NEXT: v_or_b32_e32 v6, v6, v32 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v60 ; SI-NEXT: v_or_b32_e32 v7, v7, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52 ; SI-NEXT: v_or_b32_e32 v8, v8, v32 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v59 ; SI-NEXT: v_or_b32_e32 v9, v9, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v51 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v51 ; SI-NEXT: v_or_b32_e32 v10, v10, v32 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v58 ; SI-NEXT: v_or_b32_e32 v11, v11, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v50 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v50 ; SI-NEXT: v_or_b32_e32 v12, v12, v32 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v57 @@ -66832,8 +66906,8 @@ define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a, ; SI-NEXT: v_or_b32_e32 v26, v26, v32 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v42 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40 ; SI-NEXT: v_or_b32_e32 v27, v27, v32 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33 @@ -67309,15 +67383,15 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v25 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v24 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23 @@ -67330,12 +67404,12 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v20 ; SI-NEXT: v_mov_b32_e32 v52, v18 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19 ; SI-NEXT: v_mov_b32_e32 v53, v17 @@ -67375,18 +67449,18 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v43 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v44 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v56 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v58 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v59 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v60 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v61 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v62 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v45 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v58 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v59 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v61 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v62 ; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill @@ -67411,40 +67485,40 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v61 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v50 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v48 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v39 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v38 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v37 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v63 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v32 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v36 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51 @@ -67502,25 +67576,25 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr44 ; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; kill: killed $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload @@ -67548,7 +67622,7 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: s_waitcnt vmcnt(11) @@ -67582,7 +67656,7 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 @@ -67658,213 +67732,212 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB46_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v0, v63 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v50 +; SI-NEXT: v_cvt_f32_f16_e32 v0, v50 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v62 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v33 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v59 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v36 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v49 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v57 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v57 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v48 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v34 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v32 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v49 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v47 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v46 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v33 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v35 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v44 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v44 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v43 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v56 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v6, v6, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v37 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v63 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v13, v43 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v41 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v41 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v40 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v39 +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v11, v36 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v54 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v40 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v18, v54 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v34 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_cvt_f32_f16_e32 v18, v53 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v38 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v19, v53 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v37 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v29, v51 ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 ; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 -; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v13, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_cvt_f32_f16_e32 v20, v20 -; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 ; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v31, v31 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v32, v32 ; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 ; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 -; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 -; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 ; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v32, v32 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 +; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32 ; SI-NEXT: v_cvt_f16_f32_e32 v32, v32 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_or_b32_e32 v14, v16, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v17, v16 +; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; SI-NEXT: v_or_b32_e32 v17, v18, v17 +; SI-NEXT: v_or_b32_e32 v16, v18, v16 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_or_b32_e32 v17, v19, v17 +; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload @@ -67908,7 +67981,7 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28 ; SI-NEXT: v_cvt_f16_f32_e32 v28, v28 ; SI-NEXT: v_or_b32_e32 v22, v24, v22 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 ; SI-NEXT: s_waitcnt vmcnt(2) @@ -67924,7 +67997,7 @@ define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 @@ -68336,17 +68409,17 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s13, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s11, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s9, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s7, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s11, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s98, 16 @@ -68835,14 +68908,17 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a, ; VI-NEXT: s_lshr_b32 s4, s51, 16 ; VI-NEXT: v_mov_b32_e32 v16, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s4 -; VI-NEXT: s_lshr_b32 s4, s50, 16 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s51, v16 -; VI-NEXT: v_mov_b32_e32 v2, s4 -; VI-NEXT: s_lshr_b32 s4, s49, 16 +; VI-NEXT: s_lshr_b32 s4, s50, 16 ; VI-NEXT: v_or_b32_e32 v15, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, s50, v16 +; VI-NEXT: s_lshr_b32 s4, s49, 16 +; VI-NEXT: v_or_b32_e32 v14, v1, v0 +; VI-NEXT: v_mov_b32_e32 v0, s4 +; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s49, v16 ; VI-NEXT: s_lshr_b32 s4, s48, 16 ; VI-NEXT: v_or_b32_e32 v13, v1, v0 @@ -68892,12 +68968,9 @@ define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a, ; VI-NEXT: s_lshr_b32 s4, s39, 16 ; VI-NEXT: v_or_b32_e32 v4, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 -; VI-NEXT: v_add_f16_sdwa v2, v2, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s50, v16 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s39, v16 ; VI-NEXT: s_lshr_b32 s4, s38, 16 -; VI-NEXT: v_or_b32_e32 v14, v3, v2 ; VI-NEXT: v_or_b32_e32 v3, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -69886,22 +69959,22 @@ define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a, ; SI-NEXT: s_lshr_b32 s48, s21, 16 ; SI-NEXT: s_lshr_b32 s39, s19, 16 ; SI-NEXT: s_lshr_b32 s38, s17, 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[34:35], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[44:45], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 ; SI-NEXT: s_cbranch_execnz .LBB49_4 ; SI-NEXT: .LBB49_2: ; %cmp.true ; SI-NEXT: v_add_f32_e64 v31, s5, 1.0 @@ -69973,41 +70046,41 @@ define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 ; SI-NEXT: s_branch .LBB49_5 ; SI-NEXT: .LBB49_3: -; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr36 ; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr30 ; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: ; implicit-def: $sgpr49 -; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: ; implicit-def: $sgpr90 ; SI-NEXT: ; implicit-def: $sgpr51 -; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr88 ; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr55 -; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr65 -; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr67 +; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr68 +; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr69 -; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr30 ; SI-NEXT: s_branch .LBB49_2 ; SI-NEXT: .LBB49_4: -; SI-NEXT: v_mov_b32_e32 v33, s30 +; SI-NEXT: v_mov_b32_e32 v33, s46 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: v_mov_b32_e32 v0, s16 @@ -70060,58 +70133,58 @@ define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v41, s68 ; SI-NEXT: v_mov_b32_e32 v55, s69 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v33, s34 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v34, s36 -; SI-NEXT: v_mov_b32_e32 v35, s46 -; SI-NEXT: v_mov_b32_e32 v36, s56 -; SI-NEXT: v_mov_b32_e32 v37, s58 -; SI-NEXT: v_mov_b32_e32 v38, s60 -; SI-NEXT: v_mov_b32_e32 v48, s62 -; SI-NEXT: v_mov_b32_e32 v49, s72 -; SI-NEXT: v_mov_b32_e32 v50, s74 -; SI-NEXT: v_mov_b32_e32 v51, s76 -; SI-NEXT: v_mov_b32_e32 v52, s78 -; SI-NEXT: v_mov_b32_e32 v53, s88 -; SI-NEXT: v_mov_b32_e32 v54, s90 -; SI-NEXT: v_mov_b32_e32 v39, s92 -; SI-NEXT: v_mov_b32_e32 v40, s94 +; SI-NEXT: v_mov_b32_e32 v33, s56 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v34, s58 +; SI-NEXT: v_mov_b32_e32 v35, s60 +; SI-NEXT: v_mov_b32_e32 v36, s62 +; SI-NEXT: v_mov_b32_e32 v37, s72 +; SI-NEXT: v_mov_b32_e32 v38, s74 +; SI-NEXT: v_mov_b32_e32 v48, s76 +; SI-NEXT: v_mov_b32_e32 v49, s78 +; SI-NEXT: v_mov_b32_e32 v50, s88 +; SI-NEXT: v_mov_b32_e32 v51, s90 +; SI-NEXT: v_mov_b32_e32 v52, s92 +; SI-NEXT: v_mov_b32_e32 v53, s94 +; SI-NEXT: v_mov_b32_e32 v54, s30 +; SI-NEXT: v_mov_b32_e32 v39, s34 +; SI-NEXT: v_mov_b32_e32 v40, s36 ; SI-NEXT: .LBB49_5: ; %end ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_or_b32_e32 v1, v1, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v39 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v39 ; SI-NEXT: v_or_b32_e32 v2, v2, v32 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v62 ; SI-NEXT: v_or_b32_e32 v3, v3, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v54 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v54 ; SI-NEXT: v_or_b32_e32 v4, v4, v32 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v61 ; SI-NEXT: v_or_b32_e32 v5, v5, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v53 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v53 ; SI-NEXT: v_or_b32_e32 v6, v6, v32 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v60 ; SI-NEXT: v_or_b32_e32 v7, v7, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52 ; SI-NEXT: v_or_b32_e32 v8, v8, v32 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v59 ; SI-NEXT: v_or_b32_e32 v9, v9, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v51 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v51 ; SI-NEXT: v_or_b32_e32 v10, v10, v32 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v58 ; SI-NEXT: v_or_b32_e32 v11, v11, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v50 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v50 ; SI-NEXT: v_or_b32_e32 v12, v12, v32 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v57 @@ -70157,8 +70230,8 @@ define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a, ; SI-NEXT: v_or_b32_e32 v26, v26, v32 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v42 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40 ; SI-NEXT: v_or_b32_e32 v27, v27, v32 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33 @@ -70619,6 +70692,8 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:4 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 +; SI-NEXT: v_mov_b32_e32 v44, v10 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18 ; SI-NEXT: v_mov_b32_e32 v45, v9 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v19 ; SI-NEXT: v_mov_b32_e32 v46, v8 @@ -70637,8 +70712,8 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26 ; SI-NEXT: v_mov_b32_e32 v61, v1 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v27 +; SI-NEXT: v_mov_b32_e32 v42, v12 ; SI-NEXT: v_mov_b32_e32 v43, v11 -; SI-NEXT: v_mov_b32_e32 v44, v10 ; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill @@ -70649,18 +70724,17 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18 ; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17 ; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v16 ; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15 ; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v45 @@ -70672,123 +70746,119 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v59 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v60 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v61 -; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v26 -; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v25 -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v24 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v23 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v22 -; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v21 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20 -; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v19 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v18 -; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v17 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v15 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v14 -; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v31 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v35 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v11 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v10 +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v11 ; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62 -; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v0 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v29 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v30 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v63 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB50_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 -; SI-NEXT: v_or_b32_e32 v8, v8, v32 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61 @@ -70798,21 +70868,25 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: v_or_b32_e32 v0, v0, v49 -; SI-NEXT: v_or_b32_e32 v1, v1, v42 -; SI-NEXT: v_or_b32_e32 v2, v2, v34 -; SI-NEXT: v_or_b32_e32 v3, v3, v41 -; SI-NEXT: v_or_b32_e32 v4, v4, v48 -; SI-NEXT: v_or_b32_e32 v5, v5, v40 -; SI-NEXT: v_or_b32_e32 v6, v6, v33 -; SI-NEXT: v_or_b32_e32 v7, v7, v55 -; SI-NEXT: v_or_b32_e32 v9, v9, v54 -; SI-NEXT: v_or_b32_e32 v10, v10, v39 -; SI-NEXT: v_or_b32_e32 v11, v11, v53 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: v_or_b32_e32 v0, v0, v36 +; SI-NEXT: v_or_b32_e32 v1, v1, v41 +; SI-NEXT: v_or_b32_e32 v2, v2, v48 +; SI-NEXT: v_or_b32_e32 v3, v3, v40 +; SI-NEXT: v_or_b32_e32 v4, v4, v35 +; SI-NEXT: v_or_b32_e32 v5, v5, v55 +; SI-NEXT: v_or_b32_e32 v6, v6, v39 +; SI-NEXT: v_or_b32_e32 v7, v7, v54 +; SI-NEXT: v_or_b32_e32 v8, v8, v34 +; SI-NEXT: v_or_b32_e32 v9, v9, v53 +; SI-NEXT: v_or_b32_e32 v10, v10, v38 +; SI-NEXT: v_or_b32_e32 v11, v11, v52 +; SI-NEXT: v_or_b32_e32 v12, v12, v33 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr60 @@ -70824,24 +70898,34 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr55 -; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: v_or_b32_e32 v18, v18, v19 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload @@ -70861,51 +70945,45 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v12, v12, v38 -; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_or_b32_e32 v13, v13, v52 -; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v14, v14, v37 -; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; SI-NEXT: v_or_b32_e32 v13, v13, v51 +; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v26, v27 ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_or_b32_e32 v15, v15, v51 -; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_or_b32_e32 v14, v14, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v16, v16, v36 -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v15, v15, v50 +; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v28, v28, v29 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v17, v17, v50 -; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_or_b32_e32 v16, v16, v37 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v18, v18, v35 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_or_b32_e32 v17, v17, v49 +; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: v_or_b32_e32 v30, v30, v31 @@ -70947,34 +71025,24 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: .LBB50_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB50_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v8, v32, v8 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v62 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v61 @@ -70984,9 +71052,11 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v57 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v56 ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46 ; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v45 ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44 ; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v43 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 @@ -70995,21 +71065,25 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_or_b32_e32 v0, v49, v0 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_or_b32_e32 v0, v36, v0 +; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_or_b32_e32 v2, v48, v2 +; SI-NEXT: v_or_b32_e32 v3, v40, v3 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v2, v34, v2 -; SI-NEXT: v_or_b32_e32 v3, v41, v3 -; SI-NEXT: v_or_b32_e32 v4, v48, v4 -; SI-NEXT: v_or_b32_e32 v5, v40, v5 -; SI-NEXT: v_or_b32_e32 v6, v33, v6 -; SI-NEXT: v_or_b32_e32 v7, v55, v7 -; SI-NEXT: v_or_b32_e32 v9, v54, v9 -; SI-NEXT: v_or_b32_e32 v10, v39, v10 -; SI-NEXT: v_or_b32_e32 v11, v53, v11 +; SI-NEXT: v_or_b32_e32 v4, v35, v4 +; SI-NEXT: v_or_b32_e32 v5, v55, v5 +; SI-NEXT: v_or_b32_e32 v6, v39, v6 +; SI-NEXT: v_or_b32_e32 v7, v54, v7 +; SI-NEXT: v_or_b32_e32 v8, v34, v8 +; SI-NEXT: v_or_b32_e32 v9, v53, v9 +; SI-NEXT: v_or_b32_e32 v10, v38, v10 +; SI-NEXT: v_or_b32_e32 v11, v52, v11 +; SI-NEXT: v_or_b32_e32 v12, v33, v12 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 @@ -71017,22 +71091,33 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_or_b32_e32 v18, v19, v18 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9 ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v10 ; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11 +; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 +; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; SI-NEXT: v_or_b32_e32 v19, v20, v19 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 @@ -71055,70 +71140,63 @@ define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v12, v38, v12 -; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 ; SI-NEXT: v_add_i32_e32 v23, vcc, s6, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_or_b32_e32 v13, v52, v13 -; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v14, v37, v14 -; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; SI-NEXT: v_or_b32_e32 v13, v51, v13 +; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_or_b32_e32 v15, v51, v15 -; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_or_b32_e32 v14, v32, v14 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v26 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v16, v36, v16 -; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v15, v50, v15 +; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15 ; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v17, v50, v17 -; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 +; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_or_b32_e32 v16, v37, v16 +; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v18, v35, v18 -; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 +; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_or_b32_e32 v17, v49, v17 +; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 ; SI-NEXT: v_add_i32_e32 v29, vcc, 0x30000, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30 @@ -71491,17 +71569,17 @@ define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s12, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s10, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s8, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s6, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s10, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s98, 16 @@ -71593,14 +71671,14 @@ define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a, ; SI-NEXT: s_add_i32 s16, s16, 3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s12, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s17, s17, 3 +; SI-NEXT: s_add_i32 s36, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s10, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s10, s10, 16 -; SI-NEXT: s_or_b32 s5, s10, s5 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_add_i32 s36, s4, 0x30000 -; SI-NEXT: s_add_i32 s37, s5, 0x30000 +; SI-NEXT: s_add_i32 s37, s4, 0x30000 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s8, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 @@ -72979,9 +73057,9 @@ define <16 x i64> @bitcast_v16f64_to_v16i64(<16 x double> %a, i32 %b) #0 { ; SI-LABEL: bitcast_v16f64_to_v16i64: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] @@ -73003,17 +73081,19 @@ define <16 x i64> @bitcast_v16f64_to_v16i64(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_add_f64 v[24:25], v[24:25], 1.0 ; SI-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 ; SI-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; SI-NEXT: .LBB54_2: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v16f64_to_v16i64: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] @@ -73035,17 +73115,19 @@ define <16 x i64> @bitcast_v16f64_to_v16i64(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_add_f64 v[24:25], v[24:25], 1.0 ; VI-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 ; VI-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; VI-NEXT: .LBB54_2: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v16f64_to_v16i64: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] @@ -73067,9 +73149,11 @@ define <16 x i64> @bitcast_v16f64_to_v16i64(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_f64 v[24:25], v[24:25], 1.0 ; GFX9-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 ; GFX9-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; GFX9-NEXT: .LBB54_2: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-LABEL: bitcast_v16f64_to_v16i64: @@ -74903,360 +74987,362 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr34 ; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr54 +; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr59 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr38 -; VI-NEXT: ; implicit-def: $vgpr47 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr36 ; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr56 +; VI-NEXT: ; implicit-def: $vgpr47 +; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: ; implicit-def: $vgpr46 ; VI-NEXT: ; implicit-def: $vgpr45 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr50 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr44 +; VI-NEXT: ; implicit-def: $vgpr49 ; VI-NEXT: ; implicit-def: $vgpr43 ; VI-NEXT: ; implicit-def: $vgpr63 -; VI-NEXT: ; implicit-def: $vgpr50 -; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr62 +; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr49 ; VI-NEXT: ; implicit-def: $vgpr60 -; VI-NEXT: ; implicit-def: $vgpr35 -; VI-NEXT: ; implicit-def: $vgpr59 -; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; kill: killed $vgpr39 ; VI-NEXT: ; implicit-def: $vgpr42 -; VI-NEXT: ; implicit-def: $vgpr41 -; VI-NEXT: ; implicit-def: $vgpr40 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 -; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB56_2 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[31:32] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[29:30] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32] +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[27:28] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30] +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[25:26] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[27:28] +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[23:24] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26] +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[21:22] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[19:20] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22] +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[17:18] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20] +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[15:16] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18] +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[13:14] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16] +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[11:12] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14] +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[9:10] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12] +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[7:8] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10] +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 ; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] +; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 ; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32 +; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v1 +; VI-NEXT: v_mov_b32_e32 v42, v55 +; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v1 ; VI-NEXT: .LBB56_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB56_4 @@ -75291,6 +75377,7 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_addc_u32_e32 v28, vcc, 0, v28, vcc ; VI-NEXT: v_add_u32_e32 v29, vcc, 3, v29 ; VI-NEXT: v_addc_u32_e32 v30, vcc, 0, v30, vcc +; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_add_u32_e32 v31, vcc, 3, v31 ; VI-NEXT: v_addc_u32_e32 v32, vcc, 0, v32, vcc ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] @@ -75329,224 +75416,224 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32 +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 ; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 ; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 ; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1 +; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v1 ; VI-NEXT: .LBB56_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v55, v57, v41, s4 -; VI-NEXT: v_perm_b32 v1, v1, v48, s4 -; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v55 -; VI-NEXT: v_or_b32_e32 v1, v1, v48 +; VI-NEXT: v_perm_b32 v54, v54, v41, s4 +; VI-NEXT: v_perm_b32 v1, v1, v55, s4 +; VI-NEXT: v_lshlrev_b32_e32 v54, 16, v54 +; VI-NEXT: v_or_b32_e32 v1, v1, v54 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v34, v56, s4 -; VI-NEXT: v_perm_b32 v2, v2, v53, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v2, v59, s4 +; VI-NEXT: v_perm_b32 v2, v37, v58, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v47, v40, s4 -; VI-NEXT: v_perm_b32 v2, v3, v38, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v57, v40, s4 +; VI-NEXT: v_perm_b32 v1, v3, v53, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v46, v45, s4 -; VI-NEXT: v_perm_b32 v1, v4, v52, s4 +; VI-NEXT: v_perm_b32 v2, v52, v56, s4 +; VI-NEXT: v_perm_b32 v1, v4, v36, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v33, v39, s4 -; VI-NEXT: v_perm_b32 v2, v5, v37, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v51, v39, s4 +; VI-NEXT: v_perm_b32 v1, v5, v47, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v44, v43, s4 -; VI-NEXT: v_perm_b32 v1, v6, v51, s4 +; VI-NEXT: v_perm_b32 v2, v46, v45, s4 +; VI-NEXT: v_perm_b32 v1, v6, v35, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v50, v54, s4 -; VI-NEXT: v_perm_b32 v2, v7, v63, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v7, v50, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v34, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v62, v61, s4 -; VI-NEXT: v_perm_b32 v1, v8, v36, s4 +; VI-NEXT: v_perm_b32 v2, v49, v43, s4 +; VI-NEXT: v_perm_b32 v1, v8, v44, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v9, v49, s4 -; VI-NEXT: v_perm_b32 v1, v60, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v9, v63, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v48, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v59, v58, s4 -; VI-NEXT: v_perm_b32 v1, v10, v35, s4 +; VI-NEXT: v_perm_b32 v2, v62, v38, s4 +; VI-NEXT: v_perm_b32 v1, v10, v33, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v11, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v11, v61, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v60, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -75555,21 +75642,21 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v13, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v13, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -75578,21 +75665,21 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v15, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v15, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -75601,21 +75688,20 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v17, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v17, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -75624,21 +75710,20 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v19, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v19, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -75647,8 +75732,8 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -75658,9 +75743,9 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -75669,8 +75754,8 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -75680,9 +75765,9 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -75691,8 +75776,8 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -75702,9 +75787,9 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -75713,8 +75798,8 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -75724,9 +75809,9 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -75735,8 +75820,8 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -75746,9 +75831,9 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -75757,8 +75842,8 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -75768,8 +75853,8 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v1, v32, v1, s4 @@ -75819,8 +75904,54 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; GFX9-NEXT: ; implicit-def: $vgpr40 +; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr42 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr55 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr57 +; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr49 +; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr44 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: ; implicit-def: $vgpr43 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr63 +; GFX9-NEXT: ; implicit-def: $vgpr38 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr61 +; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 @@ -75830,6 +75961,10 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -75840,6 +75975,10 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -75850,6 +75989,10 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -75860,6 +76003,10 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -75870,6 +76017,10 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -75880,6 +76031,10 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -75890,6 +76045,10 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -75900,6 +76059,10 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -75908,293 +76071,224 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; implicit-def: $vgpr49 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr51 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr50 -; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; implicit-def: $vgpr45 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr44 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr42 -; GFX9-NEXT: ; implicit-def: $vgpr41 -; GFX9-NEXT: ; implicit-def: $vgpr40 ; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(23) -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 -; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; kill: killed $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; kill: killed $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB56_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(24) +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(30) ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[31:32] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[29:30] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[27:28] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[25:26] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[23:24] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[21:22] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[19:20] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[17:18] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[15:16] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[13:14] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22] +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[11:12] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[9:10] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18] +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[7:8] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 ; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 ; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v5 ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v1 ; GFX9-NEXT: .LBB56_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB56_4 @@ -76229,7 +76323,7 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: v_addc_co_u32_e32 v28, vcc, 0, v28, vcc ; GFX9-NEXT: v_add_co_u32_e32 v29, vcc, 3, v29 ; GFX9-NEXT: v_addc_co_u32_e32 v30, vcc, 0, v30, vcc -; GFX9-NEXT: s_waitcnt vmcnt(22) +; GFX9-NEXT: s_waitcnt vmcnt(28) ; GFX9-NEXT: v_add_co_u32_e32 v31, vcc, 3, v31 ; GFX9-NEXT: v_addc_co_u32_e32 v32, vcc, 0, v32, vcc ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] @@ -76276,78 +76370,90 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32 +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 @@ -76355,9 +76461,9 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 @@ -76365,206 +76471,201 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10] +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13 ; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v7 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v5 ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v1 ; GFX9-NEXT: .LBB56_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v11, v11, v36, s4 -; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4 -; GFX9-NEXT: v_perm_b32 v34, v38, v39, s4 -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v4, v4, v51, s4 -; GFX9-NEXT: v_perm_b32 v6, v6, v33, s4 -; GFX9-NEXT: v_perm_b32 v33, v50, v54, s4 -; GFX9-NEXT: v_perm_b32 v55, v58, v41, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v59, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v2, v52, s4 -; GFX9-NEXT: v_perm_b32 v37, v37, v53, s4 -; GFX9-NEXT: v_perm_b32 v52, v57, v40, s4 -; GFX9-NEXT: v_perm_b32 v5, v5, v56, s4 -; GFX9-NEXT: v_perm_b32 v7, v7, v47, s4 -; GFX9-NEXT: v_perm_b32 v8, v8, v46, s4 -; GFX9-NEXT: v_perm_b32 v9, v9, v45, s4 -; GFX9-NEXT: v_perm_b32 v10, v10, v44, s4 -; GFX9-NEXT: v_perm_b32 v13, v13, v60, s4 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v35, v36, v35, s4 -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v38, v63, v38, s4 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v15, v15, v39, s4 -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v14, v14, v36, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v16, v16, v39, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v36, v36, v50, s4 -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v39, v39, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v17, v17, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v18, v18, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v50, v50, v53, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v42, s4 +; GFX9-NEXT: v_perm_b32 v36, v36, v41, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v1, v49, v43, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 +; GFX9-NEXT: v_perm_b32 v1, v2, v59, s4 +; GFX9-NEXT: v_perm_b32 v2, v55, v54, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v3 +; GFX9-NEXT: v_perm_b32 v1, v3, v58, s4 +; GFX9-NEXT: v_perm_b32 v2, v53, v40, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v1, v48, v62, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4 +; GFX9-NEXT: v_perm_b32 v1, v4, v35, s4 +; GFX9-NEXT: v_perm_b32 v2, v57, v52, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v5 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v5, v56, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v34, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v61, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6 +; GFX9-NEXT: v_perm_b32 v1, v6, v51, s4 +; GFX9-NEXT: v_perm_b32 v2, v47, v46, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v7 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v7, v50, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v33, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8 +; GFX9-NEXT: v_perm_b32 v1, v8, v49, s4 +; GFX9-NEXT: v_perm_b32 v2, v45, v44, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v9 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v9, v48, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v43, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10 +; GFX9-NEXT: v_perm_b32 v1, v10, v63, s4 +; GFX9-NEXT: v_perm_b32 v2, v38, v62, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v11 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v11, v61, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v37, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v12, v60, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v13 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v13, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v14, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v15 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v15, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v17 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(3) +; GFX9-NEXT: v_perm_b32 v1, v17, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v18, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v1 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v20, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -76573,19 +76674,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -76594,19 +76695,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -76615,19 +76716,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -76636,19 +76737,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -76657,19 +76758,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -76678,13 +76779,13 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v39, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload @@ -77106,51 +77207,49 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX11-FAKE16-LABEL: bitcast_v16i64_to_v128i8: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:88 +; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:84 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:84 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:80 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:76 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:72 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:68 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:64 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:60 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:56 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:52 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:48 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:44 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:44 -; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:40 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:36 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:32 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:28 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:24 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:20 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:16 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:12 ; GFX11-FAKE16-NEXT: s_clause 0x2 ; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8 ; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4 ; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73 @@ -77236,6 +77335,7 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr86 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr85 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr83 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr82 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81 @@ -77244,7 +77344,6 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2) ; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v33 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33 @@ -77253,18 +77352,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB56_2 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20] ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4] ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32 @@ -77346,10 +77446,9 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v1 ; GFX11-FAKE16-NEXT: .LBB56_2: ; %Flow ; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB56_4 @@ -77491,12 +77590,12 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v1 ; GFX11-FAKE16-NEXT: .LBB56_4: ; %end ; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v39, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004 @@ -77602,27 +77701,26 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112 -; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:12 -; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:16 -; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:20 -; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:24 -; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:28 -; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:32 -; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:36 -; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:40 -; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:44 -; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:48 -; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:52 -; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:56 -; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:60 -; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:64 -; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:68 -; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:72 -; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:76 -; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:80 -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:84 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:88 +; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:84 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 @@ -77788,297 +77886,297 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 ; SI-NEXT: v_writelane_b32 v22, s46, 44 ; SI-NEXT: v_writelane_b32 v22, s47, 45 -; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: v_writelane_b32 v22, s46, 42 ; SI-NEXT: v_writelane_b32 v22, s47, 43 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8 ; SI-NEXT: v_writelane_b32 v22, s46, 40 ; SI-NEXT: v_writelane_b32 v22, s47, 41 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 ; SI-NEXT: v_writelane_b32 v22, s46, 38 ; SI-NEXT: v_writelane_b32 v22, s47, 39 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 ; SI-NEXT: v_writelane_b32 v22, s46, 36 ; SI-NEXT: v_writelane_b32 v22, s47, 37 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8 ; SI-NEXT: v_writelane_b32 v22, s46, 34 ; SI-NEXT: v_writelane_b32 v22, s47, 35 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 ; SI-NEXT: v_writelane_b32 v22, s46, 32 ; SI-NEXT: v_writelane_b32 v22, s47, 33 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 ; SI-NEXT: v_writelane_b32 v22, s46, 30 ; SI-NEXT: v_writelane_b32 v22, s47, 31 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 ; SI-NEXT: v_writelane_b32 v22, s46, 28 ; SI-NEXT: v_writelane_b32 v22, s47, 29 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 ; SI-NEXT: v_writelane_b32 v22, s46, 26 ; SI-NEXT: v_writelane_b32 v22, s47, 27 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 ; SI-NEXT: v_writelane_b32 v22, s46, 24 ; SI-NEXT: v_writelane_b32 v22, s47, 25 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8 ; SI-NEXT: v_writelane_b32 v22, s46, 22 ; SI-NEXT: v_writelane_b32 v22, s47, 23 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 ; SI-NEXT: v_writelane_b32 v22, s46, 20 ; SI-NEXT: v_writelane_b32 v22, s47, 21 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 ; SI-NEXT: v_writelane_b32 v22, s46, 18 ; SI-NEXT: v_writelane_b32 v22, s47, 19 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8 ; SI-NEXT: v_writelane_b32 v22, s46, 16 ; SI-NEXT: v_writelane_b32 v22, s47, 17 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 ; SI-NEXT: v_writelane_b32 v22, s46, 14 ; SI-NEXT: v_writelane_b32 v22, s47, 15 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 ; SI-NEXT: v_writelane_b32 v22, s46, 12 ; SI-NEXT: v_writelane_b32 v22, s47, 13 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8 ; SI-NEXT: v_writelane_b32 v22, s46, 10 ; SI-NEXT: v_writelane_b32 v22, s47, 11 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 ; SI-NEXT: v_writelane_b32 v22, s46, 8 ; SI-NEXT: v_writelane_b32 v22, s47, 9 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 ; SI-NEXT: v_writelane_b32 v22, s46, 6 ; SI-NEXT: v_writelane_b32 v22, s47, 7 -; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8 ; SI-NEXT: v_writelane_b32 v22, s46, 4 ; SI-NEXT: v_writelane_b32 v22, s47, 5 +; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24 +; SI-NEXT: v_writelane_b32 v22, s46, 2 +; SI-NEXT: v_writelane_b32 v22, s47, 3 ; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16 +; SI-NEXT: v_writelane_b32 v22, s46, 0 +; SI-NEXT: s_lshr_b32 s48, s23, 24 +; SI-NEXT: s_lshr_b32 s49, s23, 16 +; SI-NEXT: s_lshr_b32 s50, s23, 8 +; SI-NEXT: s_lshr_b32 s51, s21, 24 +; SI-NEXT: s_lshr_b32 s52, s21, 16 +; SI-NEXT: s_lshr_b32 s53, s21, 8 +; SI-NEXT: s_lshr_b32 s54, s19, 24 +; SI-NEXT: s_lshr_b32 s55, s19, 16 +; SI-NEXT: s_lshr_b32 s64, s19, 8 +; SI-NEXT: s_lshr_b32 s65, s17, 24 +; SI-NEXT: s_lshr_b32 s66, s17, 16 +; SI-NEXT: s_lshr_b32 s67, s17, 8 +; SI-NEXT: v_writelane_b32 v22, s47, 1 +; SI-NEXT: s_lshr_b64 s[68:69], s[42:43], 8 +; SI-NEXT: s_lshr_b64 s[70:71], s[44:45], 24 +; SI-NEXT: s_lshr_b64 s[80:81], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[82:83], s[44:45], 8 +; SI-NEXT: s_lshr_b64 s[84:85], s[28:29], 24 +; SI-NEXT: s_lshr_b64 s[86:87], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[96:97], s[28:29], 8 +; SI-NEXT: s_lshr_b64 s[98:99], s[26:27], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[26:27], 8 +; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 24 +; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 8 +; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 24 +; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 8 +; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 24 +; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[20:21], 8 +; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 24 +; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[18:19], 8 +; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 24 +; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[38:39], s[16:17], 8 +; SI-NEXT: s_cbranch_execnz .LBB57_3 +; SI-NEXT: .LBB57_2: ; %cmp.true +; SI-NEXT: s_add_u32 s4, s4, 3 +; SI-NEXT: s_addc_u32 s5, s5, 0 +; SI-NEXT: s_add_u32 s6, s6, 3 +; SI-NEXT: s_addc_u32 s7, s7, 0 +; SI-NEXT: s_add_u32 s8, s8, 3 +; SI-NEXT: s_addc_u32 s9, s9, 0 +; SI-NEXT: s_add_u32 s10, s10, 3 +; SI-NEXT: s_addc_u32 s11, s11, 0 +; SI-NEXT: s_add_u32 s12, s12, 3 +; SI-NEXT: s_addc_u32 s13, s13, 0 +; SI-NEXT: s_add_u32 s14, s14, 3 +; SI-NEXT: s_addc_u32 s15, s15, 0 +; SI-NEXT: s_add_u32 s40, s40, 3 +; SI-NEXT: s_addc_u32 s41, s41, 0 +; SI-NEXT: s_add_u32 s42, s42, 3 +; SI-NEXT: s_addc_u32 s43, s43, 0 +; SI-NEXT: s_add_u32 s44, s44, 3 +; SI-NEXT: s_addc_u32 s45, s45, 0 +; SI-NEXT: s_add_u32 s28, s28, 3 +; SI-NEXT: s_addc_u32 s29, s29, 0 +; SI-NEXT: s_add_u32 s26, s26, 3 +; SI-NEXT: s_addc_u32 s27, s27, 0 +; SI-NEXT: s_add_u32 s24, s24, 3 +; SI-NEXT: s_addc_u32 s25, s25, 0 +; SI-NEXT: s_add_u32 s22, s22, 3 +; SI-NEXT: s_addc_u32 s23, s23, 0 +; SI-NEXT: s_add_u32 s20, s20, 3 +; SI-NEXT: s_addc_u32 s21, s21, 0 +; SI-NEXT: s_add_u32 s18, s18, 3 +; SI-NEXT: s_addc_u32 s19, s19, 0 +; SI-NEXT: s_add_u32 s16, s16, 3 +; SI-NEXT: s_addc_u32 s17, s17, 0 +; SI-NEXT: s_lshr_b32 s46, s5, 24 +; SI-NEXT: v_writelane_b32 v22, s46, 46 +; SI-NEXT: s_lshr_b32 s46, s5, 16 +; SI-NEXT: v_writelane_b32 v22, s46, 47 +; SI-NEXT: s_lshr_b32 s46, s5, 8 +; SI-NEXT: v_writelane_b32 v22, s46, 48 +; SI-NEXT: s_lshr_b32 s46, s7, 24 +; SI-NEXT: v_writelane_b32 v22, s46, 49 +; SI-NEXT: s_lshr_b32 s46, s7, 16 +; SI-NEXT: v_writelane_b32 v22, s46, 50 +; SI-NEXT: s_lshr_b32 s46, s7, 8 +; SI-NEXT: v_writelane_b32 v22, s46, 51 +; SI-NEXT: s_lshr_b32 s46, s9, 24 +; SI-NEXT: v_writelane_b32 v22, s46, 52 +; SI-NEXT: s_lshr_b32 s46, s9, 16 +; SI-NEXT: v_writelane_b32 v22, s46, 53 +; SI-NEXT: s_lshr_b32 s46, s9, 8 +; SI-NEXT: v_writelane_b32 v22, s46, 54 +; SI-NEXT: s_lshr_b32 s46, s11, 24 +; SI-NEXT: v_writelane_b32 v22, s46, 55 +; SI-NEXT: s_lshr_b32 s46, s11, 16 +; SI-NEXT: v_writelane_b32 v22, s46, 56 +; SI-NEXT: s_lshr_b32 s46, s11, 8 +; SI-NEXT: v_writelane_b32 v22, s46, 57 +; SI-NEXT: s_lshr_b32 s46, s13, 24 +; SI-NEXT: v_writelane_b32 v22, s46, 58 +; SI-NEXT: s_lshr_b32 s46, s13, 16 +; SI-NEXT: v_writelane_b32 v22, s46, 59 +; SI-NEXT: s_lshr_b32 s46, s13, 8 +; SI-NEXT: v_writelane_b32 v22, s46, 60 +; SI-NEXT: s_lshr_b32 s46, s15, 24 +; SI-NEXT: v_writelane_b32 v22, s46, 61 +; SI-NEXT: s_lshr_b32 s46, s15, 16 +; SI-NEXT: v_writelane_b32 v22, s46, 62 +; SI-NEXT: s_lshr_b32 s46, s15, 8 +; SI-NEXT: v_writelane_b32 v22, s46, 63 +; SI-NEXT: s_lshr_b32 s46, s41, 24 +; SI-NEXT: v_writelane_b32 v21, s46, 0 +; SI-NEXT: s_lshr_b32 s46, s41, 16 +; SI-NEXT: v_writelane_b32 v21, s46, 1 +; SI-NEXT: s_lshr_b32 s46, s41, 8 +; SI-NEXT: v_writelane_b32 v21, s46, 2 +; SI-NEXT: s_lshr_b32 s46, s43, 24 +; SI-NEXT: v_writelane_b32 v21, s46, 3 +; SI-NEXT: s_lshr_b32 s46, s43, 16 +; SI-NEXT: v_writelane_b32 v21, s46, 4 +; SI-NEXT: s_lshr_b32 s46, s43, 8 +; SI-NEXT: v_writelane_b32 v21, s46, 5 +; SI-NEXT: s_lshr_b32 s46, s45, 24 +; SI-NEXT: v_writelane_b32 v21, s46, 6 +; SI-NEXT: s_lshr_b32 s46, s45, 16 +; SI-NEXT: v_writelane_b32 v21, s46, 7 +; SI-NEXT: s_lshr_b32 s46, s45, 8 +; SI-NEXT: v_writelane_b32 v21, s46, 8 +; SI-NEXT: s_lshr_b32 s46, s29, 24 +; SI-NEXT: v_writelane_b32 v21, s46, 9 +; SI-NEXT: s_lshr_b32 s46, s29, 16 +; SI-NEXT: v_writelane_b32 v21, s46, 10 +; SI-NEXT: s_lshr_b32 s46, s29, 8 +; SI-NEXT: v_writelane_b32 v21, s46, 11 +; SI-NEXT: s_lshr_b32 s46, s27, 24 +; SI-NEXT: v_writelane_b32 v21, s46, 12 +; SI-NEXT: s_lshr_b32 s46, s27, 16 +; SI-NEXT: v_writelane_b32 v21, s46, 13 +; SI-NEXT: s_lshr_b32 s46, s27, 8 +; SI-NEXT: v_writelane_b32 v21, s46, 14 +; SI-NEXT: s_lshr_b32 s46, s25, 24 +; SI-NEXT: v_writelane_b32 v21, s46, 15 +; SI-NEXT: s_lshr_b32 s46, s25, 16 +; SI-NEXT: v_writelane_b32 v21, s46, 16 +; SI-NEXT: s_lshr_b32 s46, s25, 8 +; SI-NEXT: v_writelane_b32 v21, s46, 17 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 +; SI-NEXT: v_writelane_b32 v22, s46, 44 +; SI-NEXT: v_writelane_b32 v22, s47, 45 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 +; SI-NEXT: v_writelane_b32 v22, s46, 42 +; SI-NEXT: v_writelane_b32 v22, s47, 43 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8 +; SI-NEXT: v_writelane_b32 v22, s46, 40 +; SI-NEXT: v_writelane_b32 v22, s47, 41 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 +; SI-NEXT: v_writelane_b32 v22, s46, 38 +; SI-NEXT: v_writelane_b32 v22, s47, 39 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 +; SI-NEXT: v_writelane_b32 v22, s46, 36 +; SI-NEXT: v_writelane_b32 v22, s47, 37 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8 +; SI-NEXT: v_writelane_b32 v22, s46, 34 +; SI-NEXT: v_writelane_b32 v22, s47, 35 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 +; SI-NEXT: v_writelane_b32 v22, s46, 32 +; SI-NEXT: v_writelane_b32 v22, s47, 33 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 +; SI-NEXT: v_writelane_b32 v22, s46, 30 +; SI-NEXT: v_writelane_b32 v22, s47, 31 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 +; SI-NEXT: v_writelane_b32 v22, s46, 28 +; SI-NEXT: v_writelane_b32 v22, s47, 29 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 +; SI-NEXT: v_writelane_b32 v22, s46, 26 +; SI-NEXT: v_writelane_b32 v22, s47, 27 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 +; SI-NEXT: v_writelane_b32 v22, s46, 24 +; SI-NEXT: v_writelane_b32 v22, s47, 25 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8 +; SI-NEXT: v_writelane_b32 v22, s46, 22 +; SI-NEXT: v_writelane_b32 v22, s47, 23 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 +; SI-NEXT: v_writelane_b32 v22, s46, 20 +; SI-NEXT: v_writelane_b32 v22, s47, 21 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 +; SI-NEXT: v_writelane_b32 v22, s46, 18 +; SI-NEXT: v_writelane_b32 v22, s47, 19 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8 +; SI-NEXT: v_writelane_b32 v22, s46, 16 +; SI-NEXT: v_writelane_b32 v22, s47, 17 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 +; SI-NEXT: v_writelane_b32 v22, s46, 14 +; SI-NEXT: v_writelane_b32 v22, s47, 15 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 +; SI-NEXT: v_writelane_b32 v22, s46, 12 +; SI-NEXT: v_writelane_b32 v22, s47, 13 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8 +; SI-NEXT: v_writelane_b32 v22, s46, 10 +; SI-NEXT: v_writelane_b32 v22, s47, 11 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 +; SI-NEXT: v_writelane_b32 v22, s46, 8 +; SI-NEXT: v_writelane_b32 v22, s47, 9 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 +; SI-NEXT: v_writelane_b32 v22, s46, 6 +; SI-NEXT: v_writelane_b32 v22, s47, 7 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8 +; SI-NEXT: v_writelane_b32 v22, s46, 4 +; SI-NEXT: v_writelane_b32 v22, s47, 5 +; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24 ; SI-NEXT: v_writelane_b32 v22, s46, 2 ; SI-NEXT: v_writelane_b32 v22, s47, 3 -; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16 ; SI-NEXT: v_writelane_b32 v22, s46, 0 ; SI-NEXT: s_lshr_b32 s48, s23, 24 ; SI-NEXT: s_lshr_b32 s49, s23, 16 -; SI-NEXT: s_lshr_b32 s54, s23, 8 -; SI-NEXT: s_lshr_b32 s55, s21, 24 -; SI-NEXT: s_lshr_b32 s50, s21, 16 -; SI-NEXT: s_lshr_b32 s51, s21, 8 -; SI-NEXT: s_lshr_b32 s52, s19, 24 -; SI-NEXT: s_lshr_b32 s64, s19, 16 -; SI-NEXT: s_lshr_b32 s65, s19, 8 -; SI-NEXT: s_lshr_b32 s66, s17, 24 -; SI-NEXT: s_lshr_b32 s67, s17, 16 -; SI-NEXT: s_lshr_b32 s53, s17, 8 -; SI-NEXT: s_lshr_b64 s[68:69], s[4:5], 16 -; SI-NEXT: v_writelane_b32 v22, s47, 1 -; SI-NEXT: s_lshr_b64 s[70:71], s[44:45], 24 -; SI-NEXT: s_lshr_b64 s[80:81], s[44:45], 16 -; SI-NEXT: s_lshr_b64 s[82:83], s[44:45], 8 -; SI-NEXT: s_lshr_b64 s[84:85], s[28:29], 24 -; SI-NEXT: s_lshr_b64 s[86:87], s[28:29], 16 -; SI-NEXT: s_lshr_b64 s[96:97], s[28:29], 8 -; SI-NEXT: s_lshr_b64 s[98:99], s[26:27], 24 -; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[26:27], 8 -; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 24 -; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 8 -; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 24 -; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 8 -; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 24 -; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[20:21], 8 -; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 24 -; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[18:19], 8 -; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 24 -; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 -; SI-NEXT: s_lshr_b64 s[38:39], s[16:17], 8 -; SI-NEXT: s_cbranch_execnz .LBB57_3 -; SI-NEXT: .LBB57_2: ; %cmp.true -; SI-NEXT: s_add_u32 s4, s4, 3 -; SI-NEXT: s_addc_u32 s5, s5, 0 -; SI-NEXT: s_add_u32 s6, s6, 3 -; SI-NEXT: s_addc_u32 s7, s7, 0 -; SI-NEXT: s_add_u32 s8, s8, 3 -; SI-NEXT: s_addc_u32 s9, s9, 0 -; SI-NEXT: s_add_u32 s10, s10, 3 -; SI-NEXT: s_addc_u32 s11, s11, 0 -; SI-NEXT: s_add_u32 s12, s12, 3 -; SI-NEXT: s_addc_u32 s13, s13, 0 -; SI-NEXT: s_add_u32 s14, s14, 3 -; SI-NEXT: s_addc_u32 s15, s15, 0 -; SI-NEXT: s_add_u32 s40, s40, 3 -; SI-NEXT: s_addc_u32 s41, s41, 0 -; SI-NEXT: s_add_u32 s42, s42, 3 -; SI-NEXT: s_addc_u32 s43, s43, 0 -; SI-NEXT: s_add_u32 s44, s44, 3 -; SI-NEXT: s_addc_u32 s45, s45, 0 -; SI-NEXT: s_add_u32 s28, s28, 3 -; SI-NEXT: s_addc_u32 s29, s29, 0 -; SI-NEXT: s_add_u32 s26, s26, 3 -; SI-NEXT: s_addc_u32 s27, s27, 0 -; SI-NEXT: s_add_u32 s24, s24, 3 -; SI-NEXT: s_addc_u32 s25, s25, 0 -; SI-NEXT: s_add_u32 s22, s22, 3 -; SI-NEXT: s_addc_u32 s23, s23, 0 -; SI-NEXT: s_add_u32 s20, s20, 3 -; SI-NEXT: s_addc_u32 s21, s21, 0 -; SI-NEXT: s_add_u32 s18, s18, 3 -; SI-NEXT: s_addc_u32 s19, s19, 0 -; SI-NEXT: s_add_u32 s16, s16, 3 -; SI-NEXT: s_addc_u32 s17, s17, 0 -; SI-NEXT: s_lshr_b32 s46, s5, 24 -; SI-NEXT: v_writelane_b32 v22, s46, 46 -; SI-NEXT: s_lshr_b32 s46, s5, 16 -; SI-NEXT: v_writelane_b32 v22, s46, 47 -; SI-NEXT: s_lshr_b32 s46, s5, 8 -; SI-NEXT: v_writelane_b32 v22, s46, 48 -; SI-NEXT: s_lshr_b32 s46, s7, 24 -; SI-NEXT: v_writelane_b32 v22, s46, 49 -; SI-NEXT: s_lshr_b32 s46, s7, 16 -; SI-NEXT: v_writelane_b32 v22, s46, 50 -; SI-NEXT: s_lshr_b32 s46, s7, 8 -; SI-NEXT: v_writelane_b32 v22, s46, 51 -; SI-NEXT: s_lshr_b32 s46, s9, 24 -; SI-NEXT: v_writelane_b32 v22, s46, 52 -; SI-NEXT: s_lshr_b32 s46, s9, 16 -; SI-NEXT: v_writelane_b32 v22, s46, 53 -; SI-NEXT: s_lshr_b32 s46, s9, 8 -; SI-NEXT: v_writelane_b32 v22, s46, 54 -; SI-NEXT: s_lshr_b32 s46, s11, 24 -; SI-NEXT: v_writelane_b32 v22, s46, 55 -; SI-NEXT: s_lshr_b32 s46, s11, 16 -; SI-NEXT: v_writelane_b32 v22, s46, 56 -; SI-NEXT: s_lshr_b32 s46, s11, 8 -; SI-NEXT: v_writelane_b32 v22, s46, 57 -; SI-NEXT: s_lshr_b32 s46, s13, 24 -; SI-NEXT: v_writelane_b32 v22, s46, 58 -; SI-NEXT: s_lshr_b32 s46, s13, 16 -; SI-NEXT: v_writelane_b32 v22, s46, 59 -; SI-NEXT: s_lshr_b32 s46, s13, 8 -; SI-NEXT: v_writelane_b32 v22, s46, 60 -; SI-NEXT: s_lshr_b32 s46, s15, 24 -; SI-NEXT: v_writelane_b32 v22, s46, 61 -; SI-NEXT: s_lshr_b32 s46, s15, 16 -; SI-NEXT: v_writelane_b32 v22, s46, 62 -; SI-NEXT: s_lshr_b32 s46, s15, 8 -; SI-NEXT: v_writelane_b32 v22, s46, 63 -; SI-NEXT: s_lshr_b32 s46, s41, 24 -; SI-NEXT: v_writelane_b32 v21, s46, 0 -; SI-NEXT: s_lshr_b32 s46, s41, 16 -; SI-NEXT: v_writelane_b32 v21, s46, 1 -; SI-NEXT: s_lshr_b32 s46, s41, 8 -; SI-NEXT: v_writelane_b32 v21, s46, 2 -; SI-NEXT: s_lshr_b32 s46, s43, 24 -; SI-NEXT: v_writelane_b32 v21, s46, 3 -; SI-NEXT: s_lshr_b32 s46, s43, 16 -; SI-NEXT: v_writelane_b32 v21, s46, 4 -; SI-NEXT: s_lshr_b32 s46, s43, 8 -; SI-NEXT: v_writelane_b32 v21, s46, 5 -; SI-NEXT: s_lshr_b32 s46, s45, 24 -; SI-NEXT: v_writelane_b32 v21, s46, 6 -; SI-NEXT: s_lshr_b32 s46, s45, 16 -; SI-NEXT: v_writelane_b32 v21, s46, 7 -; SI-NEXT: s_lshr_b32 s46, s45, 8 -; SI-NEXT: v_writelane_b32 v21, s46, 8 -; SI-NEXT: s_lshr_b32 s46, s29, 24 -; SI-NEXT: v_writelane_b32 v21, s46, 9 -; SI-NEXT: s_lshr_b32 s46, s29, 16 -; SI-NEXT: v_writelane_b32 v21, s46, 10 -; SI-NEXT: s_lshr_b32 s46, s29, 8 -; SI-NEXT: v_writelane_b32 v21, s46, 11 -; SI-NEXT: s_lshr_b32 s46, s27, 24 -; SI-NEXT: v_writelane_b32 v21, s46, 12 -; SI-NEXT: s_lshr_b32 s46, s27, 16 -; SI-NEXT: v_writelane_b32 v21, s46, 13 -; SI-NEXT: s_lshr_b32 s46, s27, 8 -; SI-NEXT: v_writelane_b32 v21, s46, 14 -; SI-NEXT: s_lshr_b32 s46, s25, 24 -; SI-NEXT: v_writelane_b32 v21, s46, 15 -; SI-NEXT: s_lshr_b32 s46, s25, 16 -; SI-NEXT: v_writelane_b32 v21, s46, 16 -; SI-NEXT: s_lshr_b32 s46, s25, 8 -; SI-NEXT: v_writelane_b32 v21, s46, 17 -; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; SI-NEXT: v_writelane_b32 v22, s46, 44 -; SI-NEXT: v_writelane_b32 v22, s47, 45 -; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8 -; SI-NEXT: v_writelane_b32 v22, s46, 42 -; SI-NEXT: v_writelane_b32 v22, s47, 43 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 -; SI-NEXT: v_writelane_b32 v22, s46, 40 -; SI-NEXT: v_writelane_b32 v22, s47, 41 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 -; SI-NEXT: v_writelane_b32 v22, s46, 38 -; SI-NEXT: v_writelane_b32 v22, s47, 39 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8 -; SI-NEXT: v_writelane_b32 v22, s46, 36 -; SI-NEXT: v_writelane_b32 v22, s47, 37 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 -; SI-NEXT: v_writelane_b32 v22, s46, 34 -; SI-NEXT: v_writelane_b32 v22, s47, 35 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 -; SI-NEXT: v_writelane_b32 v22, s46, 32 -; SI-NEXT: v_writelane_b32 v22, s47, 33 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 -; SI-NEXT: v_writelane_b32 v22, s46, 30 -; SI-NEXT: v_writelane_b32 v22, s47, 31 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 -; SI-NEXT: v_writelane_b32 v22, s46, 28 -; SI-NEXT: v_writelane_b32 v22, s47, 29 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 -; SI-NEXT: v_writelane_b32 v22, s46, 26 -; SI-NEXT: v_writelane_b32 v22, s47, 27 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8 -; SI-NEXT: v_writelane_b32 v22, s46, 24 -; SI-NEXT: v_writelane_b32 v22, s47, 25 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 -; SI-NEXT: v_writelane_b32 v22, s46, 22 -; SI-NEXT: v_writelane_b32 v22, s47, 23 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 -; SI-NEXT: v_writelane_b32 v22, s46, 20 -; SI-NEXT: v_writelane_b32 v22, s47, 21 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8 -; SI-NEXT: v_writelane_b32 v22, s46, 18 -; SI-NEXT: v_writelane_b32 v22, s47, 19 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 -; SI-NEXT: v_writelane_b32 v22, s46, 16 -; SI-NEXT: v_writelane_b32 v22, s47, 17 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 -; SI-NEXT: v_writelane_b32 v22, s46, 14 -; SI-NEXT: v_writelane_b32 v22, s47, 15 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8 -; SI-NEXT: v_writelane_b32 v22, s46, 12 -; SI-NEXT: v_writelane_b32 v22, s47, 13 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 -; SI-NEXT: v_writelane_b32 v22, s46, 10 -; SI-NEXT: v_writelane_b32 v22, s47, 11 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 -; SI-NEXT: v_writelane_b32 v22, s46, 8 -; SI-NEXT: v_writelane_b32 v22, s47, 9 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8 -; SI-NEXT: v_writelane_b32 v22, s46, 6 -; SI-NEXT: v_writelane_b32 v22, s47, 7 -; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24 -; SI-NEXT: v_writelane_b32 v22, s46, 4 -; SI-NEXT: v_writelane_b32 v22, s47, 5 -; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 16 -; SI-NEXT: v_writelane_b32 v22, s46, 2 -; SI-NEXT: v_writelane_b32 v22, s47, 3 -; SI-NEXT: s_lshr_b64 s[46:47], s[42:43], 8 -; SI-NEXT: v_writelane_b32 v22, s46, 0 -; SI-NEXT: s_lshr_b32 s48, s23, 24 -; SI-NEXT: s_lshr_b32 s49, s23, 16 -; SI-NEXT: s_lshr_b32 s54, s23, 8 -; SI-NEXT: s_lshr_b32 s55, s21, 24 -; SI-NEXT: s_lshr_b32 s50, s21, 16 -; SI-NEXT: s_lshr_b32 s51, s21, 8 -; SI-NEXT: s_lshr_b32 s52, s19, 24 -; SI-NEXT: s_lshr_b32 s64, s19, 16 -; SI-NEXT: s_lshr_b32 s65, s19, 8 -; SI-NEXT: s_lshr_b32 s66, s17, 24 -; SI-NEXT: s_lshr_b32 s67, s17, 16 -; SI-NEXT: s_lshr_b32 s53, s17, 8 -; SI-NEXT: s_lshr_b64 s[68:69], s[4:5], 16 +; SI-NEXT: s_lshr_b32 s50, s23, 8 +; SI-NEXT: s_lshr_b32 s51, s21, 24 +; SI-NEXT: s_lshr_b32 s52, s21, 16 +; SI-NEXT: s_lshr_b32 s53, s21, 8 +; SI-NEXT: s_lshr_b32 s54, s19, 24 +; SI-NEXT: s_lshr_b32 s55, s19, 16 +; SI-NEXT: s_lshr_b32 s64, s19, 8 +; SI-NEXT: s_lshr_b32 s65, s17, 24 +; SI-NEXT: s_lshr_b32 s66, s17, 16 +; SI-NEXT: s_lshr_b32 s67, s17, 8 ; SI-NEXT: v_writelane_b32 v22, s47, 1 +; SI-NEXT: s_lshr_b64 s[68:69], s[42:43], 8 ; SI-NEXT: s_lshr_b64 s[70:71], s[44:45], 24 ; SI-NEXT: s_lshr_b64 s[80:81], s[44:45], 16 ; SI-NEXT: s_lshr_b64 s[82:83], s[44:45], 8 @@ -78115,11 +78213,11 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: s_or_b32 s16, s16, s47 ; SI-NEXT: v_mov_b32_e32 v1, s16 ; SI-NEXT: s_and_b32 s16, s17, 0xff -; SI-NEXT: s_lshl_b32 s17, s53, 8 +; SI-NEXT: s_lshl_b32 s17, s67, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s67, 0xff +; SI-NEXT: s_and_b32 s17, s66, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s47, s66, 24 +; SI-NEXT: s_lshl_b32 s47, s65, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s47, s17 ; SI-NEXT: s_or_b32 s16, s16, s17 @@ -78140,11 +78238,11 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s19, 0xff -; SI-NEXT: s_lshl_b32 s17, s65, 8 +; SI-NEXT: s_lshl_b32 s17, s64, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s64, 0xff +; SI-NEXT: s_and_b32 s17, s55, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s52, 24 +; SI-NEXT: s_lshl_b32 s18, s54, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0 @@ -78166,11 +78264,11 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s21, 0xff -; SI-NEXT: s_lshl_b32 s17, s51, 8 +; SI-NEXT: s_lshl_b32 s17, s53, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s50, 0xff +; SI-NEXT: s_and_b32 s17, s52, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s55, 24 +; SI-NEXT: s_lshl_b32 s18, s51, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0 @@ -78192,7 +78290,7 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s23, 0xff -; SI-NEXT: s_lshl_b32 s17, s54, 8 +; SI-NEXT: s_lshl_b32 s17, s50, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s49, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 @@ -78313,22 +78411,20 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: v_readlane_b32 s18, v21, 6 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 -; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v22, 0 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v22, 1 +; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v22, 2 +; SI-NEXT: v_readlane_b32 s18, v22, 0 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s42, 0xff -; SI-NEXT: v_readlane_b32 s19, v22, 3 +; SI-NEXT: s_lshl_b32 s17, s68, 8 +; SI-NEXT: v_readlane_b32 s19, v22, 1 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 4 +; SI-NEXT: v_readlane_b32 s18, v22, 2 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff @@ -78345,25 +78441,25 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: v_readlane_b32 s17, v21, 4 ; SI-NEXT: s_and_b32 s17, s17, 0xff ; SI-NEXT: v_readlane_b32 s18, v21, 3 -; SI-NEXT: v_readlane_b32 s19, v22, 5 +; SI-NEXT: v_readlane_b32 s19, v22, 3 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v22, 6 +; SI-NEXT: v_readlane_b32 s18, v22, 4 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v22, 7 +; SI-NEXT: v_readlane_b32 s19, v22, 5 ; SI-NEXT: v_add_i32_e32 v1, vcc, 64, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v22, 8 +; SI-NEXT: v_readlane_b32 s18, v22, 6 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s40, 0xff -; SI-NEXT: v_readlane_b32 s19, v22, 9 +; SI-NEXT: v_readlane_b32 s19, v22, 7 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 10 +; SI-NEXT: v_readlane_b32 s18, v22, 8 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff @@ -78389,16 +78485,16 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: v_readlane_b32 s16, v22, 12 +; SI-NEXT: v_readlane_b32 s16, v22, 10 ; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: v_readlane_b32 s17, v22, 13 +; SI-NEXT: v_readlane_b32 s17, v22, 11 ; SI-NEXT: s_lshl_b32 s16, s16, 8 -; SI-NEXT: v_readlane_b32 s19, v22, 11 +; SI-NEXT: v_readlane_b32 s19, v22, 9 ; SI-NEXT: s_or_b32 s14, s14, s16 -; SI-NEXT: v_readlane_b32 s16, v22, 14 -; SI-NEXT: v_readlane_b32 s17, v22, 15 +; SI-NEXT: v_readlane_b32 s16, v22, 12 +; SI-NEXT: v_readlane_b32 s17, v22, 13 ; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 16 +; SI-NEXT: v_readlane_b32 s18, v22, 14 ; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: s_lshl_b32 s17, s18, 24 ; SI-NEXT: s_and_b32 s14, s14, 0xffff @@ -78424,15 +78520,15 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s14 -; SI-NEXT: v_readlane_b32 s14, v22, 18 +; SI-NEXT: v_readlane_b32 s14, v22, 16 ; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s15, v22, 19 +; SI-NEXT: v_readlane_b32 s15, v22, 17 ; SI-NEXT: s_lshl_b32 s14, s14, 8 ; SI-NEXT: s_or_b32 s12, s12, s14 -; SI-NEXT: v_readlane_b32 s14, v22, 20 -; SI-NEXT: v_readlane_b32 s15, v22, 21 +; SI-NEXT: v_readlane_b32 s14, v22, 18 +; SI-NEXT: v_readlane_b32 s15, v22, 19 ; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: v_readlane_b32 s16, v22, 22 +; SI-NEXT: v_readlane_b32 s16, v22, 20 ; SI-NEXT: s_lshl_b32 s14, s14, 16 ; SI-NEXT: s_lshl_b32 s15, s16, 24 ; SI-NEXT: s_and_b32 s12, s12, 0xffff @@ -78458,15 +78554,15 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s12 -; SI-NEXT: v_readlane_b32 s12, v22, 24 +; SI-NEXT: v_readlane_b32 s12, v22, 22 ; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s13, v22, 25 +; SI-NEXT: v_readlane_b32 s13, v22, 23 ; SI-NEXT: s_lshl_b32 s12, s12, 8 ; SI-NEXT: s_or_b32 s10, s10, s12 -; SI-NEXT: v_readlane_b32 s12, v22, 26 -; SI-NEXT: v_readlane_b32 s13, v22, 27 +; SI-NEXT: v_readlane_b32 s12, v22, 24 +; SI-NEXT: v_readlane_b32 s13, v22, 25 ; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s14, v22, 28 +; SI-NEXT: v_readlane_b32 s14, v22, 26 ; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_lshl_b32 s13, s14, 24 ; SI-NEXT: s_and_b32 s10, s10, 0xffff @@ -78492,15 +78588,15 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s10 -; SI-NEXT: v_readlane_b32 s10, v22, 30 +; SI-NEXT: v_readlane_b32 s10, v22, 28 ; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s11, v22, 31 +; SI-NEXT: v_readlane_b32 s11, v22, 29 ; SI-NEXT: s_lshl_b32 s10, s10, 8 ; SI-NEXT: s_or_b32 s8, s8, s10 -; SI-NEXT: v_readlane_b32 s10, v22, 32 -; SI-NEXT: v_readlane_b32 s11, v22, 33 +; SI-NEXT: v_readlane_b32 s10, v22, 30 +; SI-NEXT: v_readlane_b32 s11, v22, 31 ; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s12, v22, 34 +; SI-NEXT: v_readlane_b32 s12, v22, 32 ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_lshl_b32 s11, s12, 24 ; SI-NEXT: s_and_b32 s8, s8, 0xffff @@ -78526,15 +78622,15 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s8 -; SI-NEXT: v_readlane_b32 s8, v22, 36 +; SI-NEXT: v_readlane_b32 s8, v22, 34 ; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: v_readlane_b32 s9, v22, 37 +; SI-NEXT: v_readlane_b32 s9, v22, 35 ; SI-NEXT: s_lshl_b32 s8, s8, 8 ; SI-NEXT: s_or_b32 s6, s6, s8 -; SI-NEXT: v_readlane_b32 s8, v22, 38 -; SI-NEXT: v_readlane_b32 s9, v22, 39 +; SI-NEXT: v_readlane_b32 s8, v22, 36 +; SI-NEXT: v_readlane_b32 s9, v22, 37 ; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s10, v22, 40 +; SI-NEXT: v_readlane_b32 s10, v22, 38 ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_lshl_b32 s9, s10, 24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff @@ -78560,12 +78656,14 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s6 -; SI-NEXT: v_readlane_b32 s6, v22, 42 +; SI-NEXT: v_readlane_b32 s6, v22, 40 ; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: v_readlane_b32 s7, v22, 41 ; SI-NEXT: s_lshl_b32 s6, s6, 8 -; SI-NEXT: v_readlane_b32 s7, v22, 43 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_and_b32 s6, s68, 0xff +; SI-NEXT: v_readlane_b32 s6, v22, 42 +; SI-NEXT: v_readlane_b32 s7, v22, 43 +; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: v_readlane_b32 s8, v22, 44 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s7, s8, 24 @@ -78593,11 +78691,11 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0 ; SI-NEXT: v_mov_b32_e32 v1, s4 ; SI-NEXT: v_readlane_b32 s30, v20, 34 -; SI-NEXT: v_readlane_b32 s19, v22, 17 -; SI-NEXT: v_readlane_b32 s17, v22, 23 -; SI-NEXT: v_readlane_b32 s15, v22, 29 -; SI-NEXT: v_readlane_b32 s13, v22, 35 -; SI-NEXT: v_readlane_b32 s11, v22, 41 +; SI-NEXT: v_readlane_b32 s19, v22, 15 +; SI-NEXT: v_readlane_b32 s17, v22, 21 +; SI-NEXT: v_readlane_b32 s15, v22, 27 +; SI-NEXT: v_readlane_b32 s13, v22, 33 +; SI-NEXT: v_readlane_b32 s11, v22, 39 ; SI-NEXT: v_readlane_b32 s9, v22, 45 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; SI-NEXT: v_readlane_b32 s31, v20, 35 @@ -78643,166 +78741,39 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB57_4: -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_writelane_b32 v22, s68, 0 -; SI-NEXT: v_writelane_b32 v22, s69, 1 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 2 -; SI-NEXT: v_writelane_b32 v22, s69, 3 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 4 -; SI-NEXT: v_writelane_b32 v22, s69, 5 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 6 -; SI-NEXT: v_writelane_b32 v22, s69, 7 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 8 -; SI-NEXT: v_writelane_b32 v22, s69, 9 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 10 -; SI-NEXT: v_writelane_b32 v22, s69, 11 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 12 -; SI-NEXT: v_writelane_b32 v22, s69, 13 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 14 -; SI-NEXT: v_writelane_b32 v22, s69, 15 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 16 -; SI-NEXT: v_writelane_b32 v22, s69, 17 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 18 -; SI-NEXT: v_writelane_b32 v22, s69, 19 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 20 -; SI-NEXT: v_writelane_b32 v22, s69, 21 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 22 -; SI-NEXT: v_writelane_b32 v22, s69, 23 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 24 -; SI-NEXT: v_writelane_b32 v22, s69, 25 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 26 -; SI-NEXT: v_writelane_b32 v22, s69, 27 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 28 -; SI-NEXT: v_writelane_b32 v22, s69, 29 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 30 -; SI-NEXT: v_writelane_b32 v22, s69, 31 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 32 -; SI-NEXT: v_writelane_b32 v22, s69, 33 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 34 -; SI-NEXT: v_writelane_b32 v22, s69, 35 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; kill: killed $sgpr46 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr67 -; SI-NEXT: ; implicit-def: $sgpr66 -; SI-NEXT: ; implicit-def: $sgpr65 -; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr51 -; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr55 -; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr49 -; SI-NEXT: ; implicit-def: $sgpr48 ; SI-NEXT: ; kill: killed $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: ; implicit-def: $sgpr36 ; SI-NEXT: ; implicit-def: $sgpr34 +; SI-NEXT: ; implicit-def: $sgpr67 +; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr65 ; SI-NEXT: ; implicit-def: $sgpr30 ; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr64 +; SI-NEXT: ; implicit-def: $sgpr55 +; SI-NEXT: ; implicit-def: $sgpr54 ; SI-NEXT: ; implicit-def: $sgpr90 ; SI-NEXT: ; implicit-def: $sgpr88 ; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr53 +; SI-NEXT: ; implicit-def: $sgpr52 +; SI-NEXT: ; implicit-def: $sgpr51 ; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr50 +; SI-NEXT: ; implicit-def: $sgpr49 +; SI-NEXT: ; implicit-def: $sgpr48 ; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v22, s68, 36 -; SI-NEXT: v_writelane_b32 v22, s69, 37 -; SI-NEXT: ; implicit-def: $sgpr68 ; SI-NEXT: ; implicit-def: $sgpr98 ; SI-NEXT: ; implicit-def: $sgpr96 ; SI-NEXT: ; implicit-def: $sgpr86 @@ -78810,59 +78781,186 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: ; implicit-def: $sgpr82 ; SI-NEXT: ; implicit-def: $sgpr80 ; SI-NEXT: ; implicit-def: $sgpr70 -; SI-NEXT: v_writelane_b32 v22, s68, 38 -; SI-NEXT: v_writelane_b32 v22, s69, 39 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: v_writelane_b32 v22, s68, 40 -; SI-NEXT: v_writelane_b32 v22, s69, 41 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: v_writelane_b32 v22, s68, 42 -; SI-NEXT: v_writelane_b32 v22, s69, 43 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: v_writelane_b32 v22, s68, 44 -; SI-NEXT: v_writelane_b32 v22, s69, 45 ; SI-NEXT: ; implicit-def: $sgpr68 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 0 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 1 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 2 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 3 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 4 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 5 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 6 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 7 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 9 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 10 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 11 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 12 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 13 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 14 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 15 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 16 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 17 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 18 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 19 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 20 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 21 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 22 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 23 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 24 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 25 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 26 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 27 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 28 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 29 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 30 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 31 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 32 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 33 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 34 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 35 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 36 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 37 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 38 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 39 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 40 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 41 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 42 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 43 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 44 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 45 ; SI-NEXT: s_branch .LBB57_2 ; ; VI-LABEL: bitcast_v16i64_to_v128i8_scalar: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v32, s34, 0 -; VI-NEXT: v_writelane_b32 v32, s35, 1 -; VI-NEXT: v_writelane_b32 v32, s36, 2 -; VI-NEXT: v_writelane_b32 v32, s37, 3 -; VI-NEXT: v_writelane_b32 v32, s38, 4 -; VI-NEXT: v_writelane_b32 v32, s39, 5 -; VI-NEXT: v_writelane_b32 v32, s48, 6 -; VI-NEXT: v_writelane_b32 v32, s49, 7 -; VI-NEXT: v_writelane_b32 v32, s50, 8 -; VI-NEXT: v_writelane_b32 v32, s51, 9 -; VI-NEXT: v_writelane_b32 v32, s52, 10 -; VI-NEXT: v_writelane_b32 v32, s53, 11 -; VI-NEXT: v_writelane_b32 v32, s54, 12 -; VI-NEXT: v_writelane_b32 v32, s55, 13 -; VI-NEXT: v_writelane_b32 v32, s64, 14 -; VI-NEXT: v_writelane_b32 v32, s65, 15 -; VI-NEXT: v_writelane_b32 v32, s66, 16 -; VI-NEXT: v_writelane_b32 v32, s67, 17 -; VI-NEXT: v_writelane_b32 v32, s68, 18 -; VI-NEXT: v_writelane_b32 v32, s69, 19 -; VI-NEXT: v_writelane_b32 v32, s70, 20 -; VI-NEXT: v_writelane_b32 v32, s71, 21 -; VI-NEXT: v_writelane_b32 v32, s80, 22 -; VI-NEXT: v_writelane_b32 v32, s81, 23 -; VI-NEXT: v_writelane_b32 v32, s82, 24 -; VI-NEXT: v_writelane_b32 v32, s83, 25 -; VI-NEXT: v_writelane_b32 v32, s84, 26 -; VI-NEXT: v_writelane_b32 v32, s85, 27 -; VI-NEXT: v_writelane_b32 v32, s86, 28 -; VI-NEXT: v_writelane_b32 v32, s87, 29 -; VI-NEXT: v_writelane_b32 v32, s30, 30 -; VI-NEXT: v_writelane_b32 v32, s31, 31 +; VI-NEXT: v_writelane_b32 v28, s34, 0 +; VI-NEXT: v_writelane_b32 v28, s35, 1 +; VI-NEXT: v_writelane_b32 v28, s36, 2 +; VI-NEXT: v_writelane_b32 v28, s37, 3 +; VI-NEXT: v_writelane_b32 v28, s38, 4 +; VI-NEXT: v_writelane_b32 v28, s39, 5 +; VI-NEXT: v_writelane_b32 v28, s48, 6 +; VI-NEXT: v_writelane_b32 v28, s49, 7 +; VI-NEXT: v_writelane_b32 v28, s50, 8 +; VI-NEXT: v_writelane_b32 v28, s51, 9 +; VI-NEXT: v_writelane_b32 v28, s52, 10 +; VI-NEXT: v_writelane_b32 v28, s53, 11 +; VI-NEXT: v_writelane_b32 v28, s54, 12 +; VI-NEXT: v_writelane_b32 v28, s55, 13 +; VI-NEXT: v_writelane_b32 v28, s64, 14 +; VI-NEXT: v_writelane_b32 v28, s65, 15 +; VI-NEXT: v_writelane_b32 v28, s66, 16 +; VI-NEXT: v_writelane_b32 v28, s67, 17 +; VI-NEXT: v_writelane_b32 v28, s68, 18 +; VI-NEXT: v_writelane_b32 v28, s69, 19 +; VI-NEXT: v_writelane_b32 v28, s70, 20 +; VI-NEXT: v_writelane_b32 v28, s71, 21 +; VI-NEXT: v_writelane_b32 v28, s80, 22 +; VI-NEXT: v_writelane_b32 v28, s81, 23 +; VI-NEXT: v_writelane_b32 v28, s82, 24 +; VI-NEXT: v_writelane_b32 v28, s83, 25 +; VI-NEXT: v_writelane_b32 v28, s84, 26 +; VI-NEXT: v_writelane_b32 v28, s85, 27 +; VI-NEXT: v_writelane_b32 v28, s86, 28 +; VI-NEXT: v_writelane_b32 v28, s87, 29 +; VI-NEXT: v_writelane_b32 v28, s30, 30 +; VI-NEXT: v_writelane_b32 v28, s31, 31 ; VI-NEXT: v_readfirstlane_b32 s44, v19 ; VI-NEXT: v_readfirstlane_b32 s5, v18 ; VI-NEXT: v_readfirstlane_b32 s4, v17 @@ -78883,165 +78981,329 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; VI-NEXT: v_readfirstlane_b32 s45, v2 ; VI-NEXT: s_cmp_lg_u32 s44, 0 ; VI-NEXT: v_readfirstlane_b32 s44, v1 -; VI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane -; VI-NEXT: s_cbranch_scc0 .LBB57_4 +; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane +; VI-NEXT: s_cbranch_scc0 .LBB57_2 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_lshr_b32 s46, s5, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 2 +; VI-NEXT: v_writelane_b32 v29, s46, 31 ; VI-NEXT: s_lshr_b32 s46, s5, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 3 +; VI-NEXT: v_writelane_b32 v29, s46, 32 ; VI-NEXT: s_lshr_b32 s46, s5, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 4 +; VI-NEXT: v_writelane_b32 v29, s46, 33 ; VI-NEXT: s_lshr_b32 s46, s4, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 5 +; VI-NEXT: v_writelane_b32 v29, s46, 34 ; VI-NEXT: s_lshr_b32 s46, s4, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 6 +; VI-NEXT: v_writelane_b32 v29, s46, 35 ; VI-NEXT: s_lshr_b32 s46, s7, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 7 +; VI-NEXT: v_writelane_b32 v29, s46, 36 ; VI-NEXT: s_lshr_b32 s46, s7, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 8 -; VI-NEXT: s_lshr_b32 s46, s7, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 9 +; VI-NEXT: v_writelane_b32 v29, s46, 37 ; VI-NEXT: s_lshr_b32 s46, s6, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 10 -; VI-NEXT: s_lshr_b32 s46, s6, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 11 -; VI-NEXT: s_lshr_b32 s46, s9, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 12 -; VI-NEXT: s_lshr_b32 s46, s9, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 13 -; VI-NEXT: s_lshr_b32 s46, s9, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 14 -; VI-NEXT: s_lshr_b32 s46, s8, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 15 -; VI-NEXT: s_lshr_b32 s46, s8, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 16 -; VI-NEXT: s_lshr_b32 s46, s11, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 17 -; VI-NEXT: s_lshr_b32 s46, s11, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 18 -; VI-NEXT: s_lshr_b32 s46, s11, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 19 -; VI-NEXT: s_lshr_b32 s46, s10, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 20 -; VI-NEXT: s_lshr_b32 s46, s10, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 21 -; VI-NEXT: s_lshr_b32 s46, s13, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 22 -; VI-NEXT: s_lshr_b32 s46, s13, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 23 -; VI-NEXT: s_lshr_b32 s46, s13, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 24 -; VI-NEXT: s_lshr_b32 s46, s12, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 25 -; VI-NEXT: s_lshr_b32 s46, s12, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 26 -; VI-NEXT: s_lshr_b32 s46, s15, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 27 -; VI-NEXT: s_lshr_b32 s46, s15, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 28 -; VI-NEXT: s_lshr_b32 s46, s15, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 29 -; VI-NEXT: s_lshr_b32 s46, s14, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 30 -; VI-NEXT: s_lshr_b32 s46, s14, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 31 -; VI-NEXT: s_lshr_b32 s46, s41, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 32 -; VI-NEXT: s_lshr_b32 s46, s41, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 33 -; VI-NEXT: s_lshr_b32 s46, s41, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 34 -; VI-NEXT: s_lshr_b32 s46, s40, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 35 -; VI-NEXT: s_lshr_b32 s46, s40, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 36 -; VI-NEXT: s_lshr_b32 s46, s43, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 37 -; VI-NEXT: s_lshr_b32 s46, s43, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 38 -; VI-NEXT: s_lshr_b32 s46, s43, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 39 -; VI-NEXT: s_lshr_b32 s46, s42, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 40 -; VI-NEXT: s_lshr_b32 s46, s42, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 41 -; VI-NEXT: s_lshr_b32 s46, s45, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 42 -; VI-NEXT: s_lshr_b32 s46, s45, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 43 -; VI-NEXT: s_lshr_b32 s46, s45, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 44 -; VI-NEXT: s_lshr_b32 s46, s44, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 45 -; VI-NEXT: s_lshr_b32 s46, s44, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 46 -; VI-NEXT: s_lshr_b32 s46, s29, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 47 -; VI-NEXT: s_lshr_b32 s46, s29, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 48 -; VI-NEXT: s_lshr_b32 s46, s28, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 49 -; VI-NEXT: s_lshr_b32 s46, s27, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 50 -; VI-NEXT: s_lshr_b32 s46, s27, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 51 -; VI-NEXT: s_lshr_b32 s46, s26, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 52 -; VI-NEXT: s_lshr_b32 s46, s25, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 53 -; VI-NEXT: s_lshr_b32 s46, s25, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 54 -; VI-NEXT: s_lshr_b32 s46, s24, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 55 -; VI-NEXT: s_lshr_b32 s46, s22, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 56 -; VI-NEXT: s_lshr_b32 s46, s21, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 57 -; VI-NEXT: s_lshr_b64 s[56:57], s[4:5], 24 -; VI-NEXT: v_writelane_b32 v33, s56, 0 -; VI-NEXT: s_lshr_b32 s64, s29, 8 -; VI-NEXT: s_lshr_b32 s50, s28, 8 -; VI-NEXT: s_lshr_b32 s86, s27, 8 -; VI-NEXT: s_lshr_b32 s51, s26, 8 -; VI-NEXT: s_lshr_b32 s66, s25, 8 -; VI-NEXT: s_lshr_b32 s54, s24, 8 -; VI-NEXT: s_lshr_b32 s71, s23, 24 -; VI-NEXT: s_lshr_b32 s70, s23, 16 -; VI-NEXT: s_lshr_b32 s52, s23, 8 -; VI-NEXT: s_lshr_b32 s55, s22, 8 -; VI-NEXT: s_lshr_b32 s68, s21, 24 -; VI-NEXT: s_lshr_b32 s65, s21, 8 -; VI-NEXT: s_lshr_b32 s84, s20, 16 -; VI-NEXT: s_lshr_b32 s69, s20, 8 -; VI-NEXT: s_lshr_b32 s80, s19, 24 -; VI-NEXT: s_lshr_b32 s87, s19, 16 -; VI-NEXT: s_lshr_b32 s46, s19, 8 -; VI-NEXT: s_lshr_b32 s81, s18, 16 -; VI-NEXT: s_lshr_b32 s47, s18, 8 -; VI-NEXT: s_lshr_b32 s83, s17, 24 -; VI-NEXT: s_lshr_b32 s85, s17, 16 -; VI-NEXT: s_lshr_b32 s67, s17, 8 -; VI-NEXT: s_lshr_b32 s53, s16, 16 -; VI-NEXT: s_lshr_b32 s82, s16, 8 -; VI-NEXT: v_writelane_b32 v33, s57, 1 -; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; VI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; VI-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 38 +; VI-NEXT: s_lshr_b32 s56, s8, 16 +; VI-NEXT: v_writelane_b32 v29, s56, 30 +; VI-NEXT: s_lshr_b32 s59, s12, 16 +; VI-NEXT: v_writelane_b32 v29, s59, 39 +; VI-NEXT: s_lshr_b32 s62, s43, 24 +; VI-NEXT: v_writelane_b32 v29, s62, 40 +; VI-NEXT: s_lshr_b32 s90, s22, 16 +; VI-NEXT: v_writelane_b32 v29, s90, 41 +; VI-NEXT: s_lshr_b32 s90, s22, 8 +; VI-NEXT: v_writelane_b32 v29, s90, 42 +; VI-NEXT: s_lshr_b32 s90, s21, 24 +; VI-NEXT: v_writelane_b32 v29, s90, 43 +; VI-NEXT: s_lshr_b32 s90, s21, 16 +; VI-NEXT: v_writelane_b32 v29, s90, 44 +; VI-NEXT: s_lshr_b32 s90, s21, 8 +; VI-NEXT: v_writelane_b32 v29, s90, 45 +; VI-NEXT: s_lshr_b32 s90, s20, 16 +; VI-NEXT: v_writelane_b32 v29, s90, 46 +; VI-NEXT: s_lshr_b32 s90, s20, 8 +; VI-NEXT: v_writelane_b32 v29, s90, 47 +; VI-NEXT: s_lshr_b32 s90, s19, 24 +; VI-NEXT: v_writelane_b32 v29, s90, 48 +; VI-NEXT: s_lshr_b32 s90, s19, 16 +; VI-NEXT: v_writelane_b32 v29, s90, 49 +; VI-NEXT: s_lshr_b32 s90, s19, 8 +; VI-NEXT: v_writelane_b32 v29, s90, 50 +; VI-NEXT: s_lshr_b32 s90, s18, 16 +; VI-NEXT: v_writelane_b32 v29, s90, 51 +; VI-NEXT: s_lshr_b32 s90, s18, 8 +; VI-NEXT: v_writelane_b32 v29, s90, 52 +; VI-NEXT: s_lshr_b32 s90, s17, 24 +; VI-NEXT: v_writelane_b32 v29, s90, 53 +; VI-NEXT: s_lshr_b32 s90, s17, 16 +; VI-NEXT: v_writelane_b32 v29, s90, 54 +; VI-NEXT: s_lshr_b32 s90, s17, 8 +; VI-NEXT: v_writelane_b32 v29, s90, 55 +; VI-NEXT: s_lshr_b32 s90, s16, 16 +; VI-NEXT: v_writelane_b32 v29, s90, 56 +; VI-NEXT: s_lshr_b32 s90, s16, 8 +; VI-NEXT: v_writelane_b32 v29, s90, 57 +; VI-NEXT: s_lshr_b64 s[90:91], s[4:5], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 28 +; VI-NEXT: v_writelane_b32 v29, s91, 29 +; VI-NEXT: s_lshr_b64 s[90:91], s[6:7], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 26 +; VI-NEXT: v_writelane_b32 v29, s91, 27 +; VI-NEXT: s_lshr_b64 s[90:91], s[8:9], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 24 +; VI-NEXT: v_writelane_b32 v29, s91, 25 +; VI-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 22 +; VI-NEXT: v_writelane_b32 v29, s91, 23 +; VI-NEXT: s_lshr_b64 s[90:91], s[12:13], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 20 +; VI-NEXT: v_writelane_b32 v29, s91, 21 +; VI-NEXT: s_lshr_b64 s[90:91], s[14:15], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 18 +; VI-NEXT: v_writelane_b32 v29, s91, 19 +; VI-NEXT: s_lshr_b64 s[90:91], s[40:41], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 16 +; VI-NEXT: v_writelane_b32 v29, s91, 17 +; VI-NEXT: s_lshr_b64 s[90:91], s[42:43], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 14 +; VI-NEXT: v_writelane_b32 v29, s91, 15 +; VI-NEXT: s_lshr_b64 s[90:91], s[44:45], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 12 +; VI-NEXT: v_writelane_b32 v29, s91, 13 +; VI-NEXT: s_lshr_b64 s[90:91], s[28:29], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 10 +; VI-NEXT: v_writelane_b32 v29, s91, 11 ; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; VI-NEXT: s_lshr_b64 s[30:31], s[24:25], 24 -; VI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24 -; VI-NEXT: s_lshr_b64 s[36:37], s[20:21], 24 -; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24 -; VI-NEXT: s_lshr_b64 s[48:49], s[16:17], 24 -; VI-NEXT: s_cbranch_execnz .LBB57_3 -; VI-NEXT: .LBB57_2: ; %cmp.true +; VI-NEXT: v_writelane_b32 v29, s90, 8 +; VI-NEXT: v_writelane_b32 v29, s91, 9 +; VI-NEXT: s_lshr_b64 s[90:91], s[24:25], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 6 +; VI-NEXT: v_writelane_b32 v29, s91, 7 +; VI-NEXT: s_lshr_b64 s[90:91], s[22:23], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 4 +; VI-NEXT: v_writelane_b32 v29, s91, 5 +; VI-NEXT: s_lshr_b64 s[90:91], s[20:21], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 2 +; VI-NEXT: v_writelane_b32 v29, s91, 3 +; VI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 +; VI-NEXT: v_writelane_b32 v29, s90, 0 +; VI-NEXT: s_lshr_b32 s79, s45, 8 +; VI-NEXT: v_writelane_b32 v29, s91, 1 +; VI-NEXT: s_lshr_b64 s[90:91], s[16:17], 24 +; VI-NEXT: s_lshr_b32 s49, s7, 8 +; VI-NEXT: s_lshr_b32 s46, s6, 8 +; VI-NEXT: s_lshr_b32 s47, s9, 24 +; VI-NEXT: s_lshr_b32 s85, s9, 16 +; VI-NEXT: s_lshr_b32 s50, s9, 8 +; VI-NEXT: s_lshr_b32 s86, s8, 8 +; VI-NEXT: s_lshr_b32 s56, s11, 24 +; VI-NEXT: s_lshr_b32 s51, s11, 16 +; VI-NEXT: s_lshr_b32 s88, s11, 8 +; VI-NEXT: s_lshr_b32 s89, s10, 16 +; VI-NEXT: s_lshr_b32 s53, s10, 8 +; VI-NEXT: s_lshr_b32 s57, s13, 24 +; VI-NEXT: s_lshr_b32 s64, s13, 16 +; VI-NEXT: s_lshr_b32 s30, s13, 8 +; VI-NEXT: s_lshr_b32 s31, s12, 8 +; VI-NEXT: s_lshr_b32 s59, s15, 24 +; VI-NEXT: s_lshr_b32 s34, s15, 16 +; VI-NEXT: s_lshr_b32 s35, s15, 8 +; VI-NEXT: s_lshr_b32 s54, s14, 16 +; VI-NEXT: s_lshr_b32 s52, s14, 8 +; VI-NEXT: s_lshr_b32 s37, s41, 24 +; VI-NEXT: s_lshr_b32 s55, s41, 16 +; VI-NEXT: s_lshr_b32 s61, s41, 8 +; VI-NEXT: s_lshr_b32 s60, s40, 16 +; VI-NEXT: s_lshr_b32 s39, s40, 8 +; VI-NEXT: s_lshr_b32 s36, s43, 16 +; VI-NEXT: s_lshr_b32 s38, s43, 8 +; VI-NEXT: s_lshr_b32 s48, s42, 16 +; VI-NEXT: s_lshr_b32 s62, s42, 8 +; VI-NEXT: s_lshr_b32 s69, s45, 24 +; VI-NEXT: s_lshr_b32 s78, s45, 16 +; VI-NEXT: s_lshr_b32 s66, s44, 16 +; VI-NEXT: s_lshr_b32 s65, s44, 8 +; VI-NEXT: s_lshr_b32 s63, s29, 24 +; VI-NEXT: s_lshr_b32 s68, s29, 16 +; VI-NEXT: s_lshr_b32 s72, s29, 8 +; VI-NEXT: s_lshr_b32 s67, s28, 16 +; VI-NEXT: s_lshr_b32 s82, s28, 8 +; VI-NEXT: s_lshr_b32 s73, s27, 24 +; VI-NEXT: s_lshr_b32 s71, s27, 16 +; VI-NEXT: s_lshr_b32 s74, s27, 8 +; VI-NEXT: s_lshr_b32 s70, s26, 16 +; VI-NEXT: s_lshr_b32 s81, s26, 8 +; VI-NEXT: s_lshr_b32 s75, s25, 24 +; VI-NEXT: s_lshr_b32 s80, s25, 16 +; VI-NEXT: s_lshr_b32 s77, s25, 8 +; VI-NEXT: s_lshr_b32 s76, s24, 16 +; VI-NEXT: s_lshr_b32 s84, s24, 8 +; VI-NEXT: s_lshr_b32 s87, s23, 24 +; VI-NEXT: s_lshr_b32 s83, s23, 16 +; VI-NEXT: s_lshr_b32 s58, s23, 8 +; VI-NEXT: s_mov_b32 s91, s79 +; VI-NEXT: s_mov_b64 vcc, 0 +; VI-NEXT: s_branch .LBB57_3 +; VI-NEXT: .LBB57_2: +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr79 +; VI-NEXT: ; kill: killed $sgpr79 +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; implicit-def: $sgpr90 +; VI-NEXT: ; implicit-def: $sgpr58 +; VI-NEXT: ; implicit-def: $sgpr83 +; VI-NEXT: ; implicit-def: $sgpr87 +; VI-NEXT: ; implicit-def: $sgpr84 +; VI-NEXT: ; implicit-def: $sgpr76 +; VI-NEXT: ; implicit-def: $sgpr77 +; VI-NEXT: ; implicit-def: $sgpr80 +; VI-NEXT: ; implicit-def: $sgpr75 +; VI-NEXT: ; implicit-def: $sgpr81 +; VI-NEXT: ; implicit-def: $sgpr70 +; VI-NEXT: ; implicit-def: $sgpr74 +; VI-NEXT: ; implicit-def: $sgpr71 +; VI-NEXT: ; implicit-def: $sgpr73 +; VI-NEXT: ; implicit-def: $sgpr82 +; VI-NEXT: ; implicit-def: $sgpr67 +; VI-NEXT: ; implicit-def: $sgpr72 +; VI-NEXT: ; implicit-def: $sgpr68 +; VI-NEXT: ; implicit-def: $sgpr63 +; VI-NEXT: ; implicit-def: $sgpr65 +; VI-NEXT: ; implicit-def: $sgpr66 +; VI-NEXT: ; implicit-def: $sgpr91 +; VI-NEXT: ; implicit-def: $sgpr78 +; VI-NEXT: ; implicit-def: $sgpr69 +; VI-NEXT: ; implicit-def: $sgpr62 +; VI-NEXT: ; implicit-def: $sgpr48 +; VI-NEXT: ; implicit-def: $sgpr38 +; VI-NEXT: ; implicit-def: $sgpr36 +; VI-NEXT: ; implicit-def: $sgpr39 +; VI-NEXT: ; implicit-def: $sgpr60 +; VI-NEXT: ; implicit-def: $sgpr61 +; VI-NEXT: ; implicit-def: $sgpr55 +; VI-NEXT: ; implicit-def: $sgpr37 +; VI-NEXT: ; implicit-def: $sgpr52 +; VI-NEXT: ; implicit-def: $sgpr54 +; VI-NEXT: ; implicit-def: $sgpr35 +; VI-NEXT: ; implicit-def: $sgpr34 +; VI-NEXT: ; implicit-def: $sgpr59 +; VI-NEXT: ; implicit-def: $sgpr31 +; VI-NEXT: ; implicit-def: $sgpr30 +; VI-NEXT: ; implicit-def: $sgpr64 +; VI-NEXT: ; implicit-def: $sgpr57 +; VI-NEXT: ; implicit-def: $sgpr53 +; VI-NEXT: ; implicit-def: $sgpr89 +; VI-NEXT: ; implicit-def: $sgpr88 +; VI-NEXT: ; implicit-def: $sgpr51 +; VI-NEXT: ; implicit-def: $sgpr56 +; VI-NEXT: ; implicit-def: $sgpr86 +; VI-NEXT: ; implicit-def: $sgpr50 +; VI-NEXT: ; implicit-def: $sgpr85 +; VI-NEXT: ; implicit-def: $sgpr49 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr79 +; VI-NEXT: ; kill: killed $sgpr79 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr79 +; VI-NEXT: ; kill: killed $sgpr79 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr79 +; VI-NEXT: ; kill: killed $sgpr79 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr79 +; VI-NEXT: ; kill: killed $sgpr79 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr79 +; VI-NEXT: ; kill: killed $sgpr79 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr79 +; VI-NEXT: ; kill: killed $sgpr79 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr79 +; VI-NEXT: ; kill: killed $sgpr79 +; VI-NEXT: v_writelane_b32 v29, s46, 0 +; VI-NEXT: v_writelane_b32 v29, s47, 1 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 2 +; VI-NEXT: v_writelane_b32 v29, s47, 3 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 4 +; VI-NEXT: v_writelane_b32 v29, s47, 5 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 6 +; VI-NEXT: v_writelane_b32 v29, s47, 7 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 9 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 10 +; VI-NEXT: v_writelane_b32 v29, s47, 11 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 12 +; VI-NEXT: v_writelane_b32 v29, s47, 13 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 14 +; VI-NEXT: v_writelane_b32 v29, s47, 15 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 17 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 18 +; VI-NEXT: v_writelane_b32 v29, s47, 19 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 20 +; VI-NEXT: v_writelane_b32 v29, s47, 21 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 22 +; VI-NEXT: v_writelane_b32 v29, s47, 23 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, s46, 24 +; VI-NEXT: v_writelane_b32 v29, s47, 25 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 26 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 27 +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 28 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 29 +; VI-NEXT: s_mov_b64 vcc, -1 +; VI-NEXT: .LBB57_3: ; %Flow +; VI-NEXT: s_andn2_b64 vcc, exec, vcc +; VI-NEXT: s_mov_b32 s79, s46 +; VI-NEXT: s_mov_b32 s46, s47 +; VI-NEXT: v_readlane_b32 s47, v29, 30 +; VI-NEXT: s_cbranch_vccnz .LBB57_5 +; VI-NEXT: ; %bb.4: ; %cmp.true ; VI-NEXT: s_add_u32 s16, s16, 3 ; VI-NEXT: s_addc_u32 s17, s17, 0 ; VI-NEXT: s_add_u32 s18, s18, 3 @@ -79074,713 +79336,555 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; VI-NEXT: s_addc_u32 s7, s7, 0 ; VI-NEXT: s_add_u32 s4, s4, 3 ; VI-NEXT: s_addc_u32 s5, s5, 0 +; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 28 +; VI-NEXT: v_writelane_b32 v29, s47, 29 +; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 26 +; VI-NEXT: v_writelane_b32 v29, s47, 27 +; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 24 +; VI-NEXT: v_writelane_b32 v29, s47, 25 +; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 22 +; VI-NEXT: v_writelane_b32 v29, s47, 23 +; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 20 +; VI-NEXT: v_writelane_b32 v29, s47, 21 +; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 18 +; VI-NEXT: v_writelane_b32 v29, s47, 19 +; VI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 17 +; VI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 14 +; VI-NEXT: v_writelane_b32 v29, s47, 15 +; VI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 12 +; VI-NEXT: v_writelane_b32 v29, s47, 13 +; VI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 10 +; VI-NEXT: v_writelane_b32 v29, s47, 11 +; VI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 9 +; VI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 6 +; VI-NEXT: v_writelane_b32 v29, s47, 7 +; VI-NEXT: s_lshr_b64 s[46:47], s[22:23], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 4 +; VI-NEXT: v_writelane_b32 v29, s47, 5 +; VI-NEXT: s_lshr_b64 s[46:47], s[20:21], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 2 +; VI-NEXT: v_writelane_b32 v29, s47, 3 +; VI-NEXT: s_lshr_b64 s[46:47], s[18:19], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 0 +; VI-NEXT: v_writelane_b32 v29, s47, 1 ; VI-NEXT: s_lshr_b32 s46, s5, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 2 +; VI-NEXT: v_writelane_b32 v29, s46, 31 ; VI-NEXT: s_lshr_b32 s46, s5, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 3 +; VI-NEXT: v_writelane_b32 v29, s46, 32 ; VI-NEXT: s_lshr_b32 s46, s5, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 4 +; VI-NEXT: v_writelane_b32 v29, s46, 33 ; VI-NEXT: s_lshr_b32 s46, s4, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 5 +; VI-NEXT: v_writelane_b32 v29, s46, 34 ; VI-NEXT: s_lshr_b32 s46, s4, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 6 +; VI-NEXT: v_writelane_b32 v29, s46, 35 ; VI-NEXT: s_lshr_b32 s46, s7, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 7 +; VI-NEXT: v_writelane_b32 v29, s46, 36 ; VI-NEXT: s_lshr_b32 s46, s7, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 8 -; VI-NEXT: s_lshr_b32 s46, s7, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 9 +; VI-NEXT: v_writelane_b32 v29, s46, 37 ; VI-NEXT: s_lshr_b32 s46, s6, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 10 -; VI-NEXT: s_lshr_b32 s46, s6, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 11 +; VI-NEXT: v_writelane_b32 v29, s46, 38 +; VI-NEXT: s_lshr_b32 s58, s12, 16 +; VI-NEXT: v_writelane_b32 v29, s58, 39 +; VI-NEXT: s_lshr_b32 s58, s43, 24 +; VI-NEXT: v_writelane_b32 v29, s58, 40 +; VI-NEXT: s_lshr_b32 vcc_lo, s22, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 41 +; VI-NEXT: s_lshr_b32 vcc_lo, s22, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 42 +; VI-NEXT: s_lshr_b32 vcc_lo, s21, 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 43 +; VI-NEXT: s_lshr_b32 vcc_lo, s21, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 44 +; VI-NEXT: s_lshr_b32 vcc_lo, s21, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 45 +; VI-NEXT: s_lshr_b32 vcc_lo, s20, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 46 +; VI-NEXT: s_lshr_b32 vcc_lo, s20, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 47 +; VI-NEXT: s_lshr_b32 vcc_lo, s19, 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 48 +; VI-NEXT: s_lshr_b32 vcc_lo, s19, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 49 +; VI-NEXT: s_lshr_b32 vcc_lo, s19, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 50 +; VI-NEXT: s_lshr_b32 vcc_lo, s18, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 51 +; VI-NEXT: s_lshr_b32 vcc_lo, s18, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 52 +; VI-NEXT: s_lshr_b32 vcc_lo, s17, 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 53 +; VI-NEXT: s_lshr_b32 vcc_lo, s17, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 54 +; VI-NEXT: s_lshr_b32 vcc_lo, s17, 8 +; VI-NEXT: s_lshr_b64 s[90:91], s[16:17], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 55 +; VI-NEXT: s_lshr_b32 vcc_lo, s16, 16 +; VI-NEXT: s_lshr_b32 s49, s7, 8 +; VI-NEXT: s_lshr_b32 s79, s6, 8 ; VI-NEXT: s_lshr_b32 s46, s9, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 12 -; VI-NEXT: s_lshr_b32 s46, s9, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 13 -; VI-NEXT: s_lshr_b32 s46, s9, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 14 -; VI-NEXT: s_lshr_b32 s46, s8, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 15 -; VI-NEXT: s_lshr_b32 s46, s8, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 16 -; VI-NEXT: s_lshr_b32 s46, s11, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 17 -; VI-NEXT: s_lshr_b32 s46, s11, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 18 -; VI-NEXT: s_lshr_b32 s46, s11, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 19 -; VI-NEXT: s_lshr_b32 s46, s10, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 20 -; VI-NEXT: s_lshr_b32 s46, s10, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 21 -; VI-NEXT: s_lshr_b32 s46, s13, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 22 -; VI-NEXT: s_lshr_b32 s46, s13, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 23 -; VI-NEXT: s_lshr_b32 s46, s13, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 24 -; VI-NEXT: s_lshr_b32 s46, s12, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 25 -; VI-NEXT: s_lshr_b32 s46, s12, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 26 -; VI-NEXT: s_lshr_b32 s46, s15, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 27 -; VI-NEXT: s_lshr_b32 s46, s15, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 28 -; VI-NEXT: s_lshr_b32 s46, s15, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 29 -; VI-NEXT: s_lshr_b32 s46, s14, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 30 -; VI-NEXT: s_lshr_b32 s46, s14, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 31 -; VI-NEXT: s_lshr_b32 s46, s41, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 32 -; VI-NEXT: s_lshr_b32 s46, s41, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 33 -; VI-NEXT: s_lshr_b32 s46, s41, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 34 -; VI-NEXT: s_lshr_b32 s46, s40, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 35 -; VI-NEXT: s_lshr_b32 s46, s40, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 36 -; VI-NEXT: s_lshr_b32 s46, s43, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 37 -; VI-NEXT: s_lshr_b32 s46, s43, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 38 -; VI-NEXT: s_lshr_b32 s46, s43, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 39 -; VI-NEXT: s_lshr_b32 s46, s42, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 40 -; VI-NEXT: s_lshr_b32 s46, s42, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 41 -; VI-NEXT: s_lshr_b32 s46, s45, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 42 -; VI-NEXT: s_lshr_b32 s46, s45, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 43 -; VI-NEXT: s_lshr_b32 s46, s45, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 44 -; VI-NEXT: s_lshr_b32 s46, s44, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 45 -; VI-NEXT: s_lshr_b32 s46, s44, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 46 -; VI-NEXT: s_lshr_b32 s46, s29, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 47 -; VI-NEXT: s_lshr_b32 s46, s29, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 48 -; VI-NEXT: s_lshr_b32 s46, s28, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 49 -; VI-NEXT: s_lshr_b32 s46, s27, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 50 -; VI-NEXT: s_lshr_b32 s46, s27, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 51 -; VI-NEXT: s_lshr_b32 s46, s26, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 52 -; VI-NEXT: s_lshr_b32 s46, s25, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 53 -; VI-NEXT: s_lshr_b32 s46, s25, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 54 -; VI-NEXT: s_lshr_b32 s46, s24, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 55 -; VI-NEXT: s_lshr_b32 s46, s22, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 56 -; VI-NEXT: s_lshr_b32 s46, s21, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 57 -; VI-NEXT: s_lshr_b64 s[56:57], s[4:5], 24 -; VI-NEXT: v_writelane_b32 v33, s56, 0 -; VI-NEXT: s_lshr_b32 s64, s29, 8 -; VI-NEXT: s_lshr_b32 s50, s28, 8 -; VI-NEXT: s_lshr_b32 s86, s27, 8 -; VI-NEXT: s_lshr_b32 s51, s26, 8 -; VI-NEXT: s_lshr_b32 s66, s25, 8 -; VI-NEXT: s_lshr_b32 s54, s24, 8 -; VI-NEXT: s_lshr_b32 s71, s23, 24 -; VI-NEXT: s_lshr_b32 s70, s23, 16 -; VI-NEXT: s_lshr_b32 s52, s23, 8 -; VI-NEXT: s_lshr_b32 s55, s22, 8 -; VI-NEXT: s_lshr_b32 s68, s21, 24 -; VI-NEXT: s_lshr_b32 s65, s21, 8 -; VI-NEXT: s_lshr_b32 s84, s20, 16 -; VI-NEXT: s_lshr_b32 s69, s20, 8 -; VI-NEXT: s_lshr_b32 s80, s19, 24 -; VI-NEXT: s_lshr_b32 s87, s19, 16 -; VI-NEXT: s_lshr_b32 s46, s19, 8 -; VI-NEXT: s_lshr_b32 s81, s18, 16 -; VI-NEXT: s_lshr_b32 s47, s18, 8 -; VI-NEXT: s_lshr_b32 s83, s17, 24 -; VI-NEXT: s_lshr_b32 s85, s17, 16 -; VI-NEXT: s_lshr_b32 s67, s17, 8 -; VI-NEXT: s_lshr_b32 s53, s16, 16 -; VI-NEXT: s_lshr_b32 s82, s16, 8 -; VI-NEXT: v_writelane_b32 v33, s57, 1 -; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; VI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; VI-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; VI-NEXT: s_lshr_b64 s[30:31], s[24:25], 24 -; VI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24 -; VI-NEXT: s_lshr_b64 s[36:37], s[20:21], 24 -; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24 -; VI-NEXT: s_lshr_b64 s[48:49], s[16:17], 24 -; VI-NEXT: .LBB57_3: ; %end -; VI-NEXT: v_mov_b32_e32 v9, s48 +; VI-NEXT: s_lshr_b32 s85, s9, 16 +; VI-NEXT: s_lshr_b32 s50, s9, 8 +; VI-NEXT: s_lshr_b32 s47, s8, 16 +; VI-NEXT: s_lshr_b32 s86, s8, 8 +; VI-NEXT: s_lshr_b32 s56, s11, 24 +; VI-NEXT: s_lshr_b32 s51, s11, 16 +; VI-NEXT: s_lshr_b32 s88, s11, 8 +; VI-NEXT: s_lshr_b32 s89, s10, 16 +; VI-NEXT: s_lshr_b32 s53, s10, 8 +; VI-NEXT: s_lshr_b32 s57, s13, 24 +; VI-NEXT: s_lshr_b32 s64, s13, 16 +; VI-NEXT: s_lshr_b32 s30, s13, 8 +; VI-NEXT: s_lshr_b32 s31, s12, 8 +; VI-NEXT: s_lshr_b32 s59, s15, 24 +; VI-NEXT: s_lshr_b32 s34, s15, 16 +; VI-NEXT: s_lshr_b32 s35, s15, 8 +; VI-NEXT: s_lshr_b32 s54, s14, 16 +; VI-NEXT: s_lshr_b32 s52, s14, 8 +; VI-NEXT: s_lshr_b32 s37, s41, 24 +; VI-NEXT: s_lshr_b32 s55, s41, 16 +; VI-NEXT: s_lshr_b32 s61, s41, 8 +; VI-NEXT: s_lshr_b32 s60, s40, 16 +; VI-NEXT: s_lshr_b32 s39, s40, 8 +; VI-NEXT: s_lshr_b32 s36, s43, 16 +; VI-NEXT: s_lshr_b32 s38, s43, 8 +; VI-NEXT: s_lshr_b32 s48, s42, 16 +; VI-NEXT: s_lshr_b32 s62, s42, 8 +; VI-NEXT: s_lshr_b32 s69, s45, 24 +; VI-NEXT: s_lshr_b32 s78, s45, 16 +; VI-NEXT: s_lshr_b32 s91, s45, 8 +; VI-NEXT: s_lshr_b32 s66, s44, 16 +; VI-NEXT: s_lshr_b32 s65, s44, 8 +; VI-NEXT: s_lshr_b32 s63, s29, 24 +; VI-NEXT: s_lshr_b32 s68, s29, 16 +; VI-NEXT: s_lshr_b32 s72, s29, 8 +; VI-NEXT: s_lshr_b32 s67, s28, 16 +; VI-NEXT: s_lshr_b32 s82, s28, 8 +; VI-NEXT: s_lshr_b32 s73, s27, 24 +; VI-NEXT: s_lshr_b32 s71, s27, 16 +; VI-NEXT: s_lshr_b32 s74, s27, 8 +; VI-NEXT: s_lshr_b32 s70, s26, 16 +; VI-NEXT: s_lshr_b32 s81, s26, 8 +; VI-NEXT: s_lshr_b32 s75, s25, 24 +; VI-NEXT: s_lshr_b32 s80, s25, 16 +; VI-NEXT: s_lshr_b32 s77, s25, 8 +; VI-NEXT: s_lshr_b32 s76, s24, 16 +; VI-NEXT: s_lshr_b32 s84, s24, 8 +; VI-NEXT: s_lshr_b32 s87, s23, 24 +; VI-NEXT: s_lshr_b32 s83, s23, 16 +; VI-NEXT: s_lshr_b32 s58, s23, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 56 +; VI-NEXT: s_lshr_b32 vcc_lo, s16, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 57 +; VI-NEXT: .LBB57_5: ; %end +; VI-NEXT: v_readlane_b32 vcc_lo, v29, 57 +; VI-NEXT: v_mov_b32_e32 v2, vcc_lo ; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; VI-NEXT: v_mov_b32_e32 v2, s82 -; VI-NEXT: v_perm_b32 v9, s53, v9, v1 -; VI-NEXT: v_perm_b32 v3, s16, v2, v1 -; VI-NEXT: v_mov_b32_e32 v24, s83 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_mov_b32_e32 v4, s67 -; VI-NEXT: v_perm_b32 v24, s85, v24, v1 -; VI-NEXT: v_or_b32_e32 v3, v3, v9 -; VI-NEXT: v_perm_b32 v2, s17, v4, v1 -; VI-NEXT: v_mov_b32_e32 v13, s38 -; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24 -; VI-NEXT: v_mov_b32_e32 v4, s47 -; VI-NEXT: v_perm_b32 v13, s81, v13, v1 +; VI-NEXT: v_perm_b32 v2, s16, v2, v1 +; VI-NEXT: v_mov_b32_e32 v3, s90 +; VI-NEXT: v_readlane_b32 s16, v29, 56 +; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 55 +; VI-NEXT: v_mov_b32_e32 v4, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 53 +; VI-NEXT: v_mov_b32_e32 v5, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 54 +; VI-NEXT: v_perm_b32 v5, s16, v5, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 52 +; VI-NEXT: v_perm_b32 v4, s17, v4, v1 +; VI-NEXT: v_mov_b32_e32 v6, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 0 +; VI-NEXT: v_mov_b32_e32 v7, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 51 +; VI-NEXT: v_perm_b32 v7, s16, v7, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 50 +; VI-NEXT: v_mov_b32_e32 v8, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 48 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v9, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 49 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 +; VI-NEXT: v_readlane_b32 s17, v29, 1 +; VI-NEXT: v_perm_b32 v9, s16, v9, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 47 +; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v5 +; VI-NEXT: v_mov_b32_e32 v10, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 2 +; VI-NEXT: v_or_b32_e32 v2, v4, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0 -; VI-NEXT: v_perm_b32 v5, s18, v4, v1 -; VI-NEXT: v_mov_b32_e32 v25, s80 +; VI-NEXT: v_perm_b32 v6, s18, v6, v1 +; VI-NEXT: v_mov_b32_e32 v11, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 46 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13 -; VI-NEXT: v_mov_b32_e32 v6, s46 -; VI-NEXT: v_perm_b32 v25, s87, v25, v1 -; VI-NEXT: v_or_b32_e32 v2, v5, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v7 +; VI-NEXT: v_perm_b32 v11, s16, v11, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 45 +; VI-NEXT: v_or_b32_e32 v2, v6, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0 -; VI-NEXT: v_perm_b32 v4, s19, v6, v1 -; VI-NEXT: v_mov_b32_e32 v17, s36 +; VI-NEXT: v_perm_b32 v8, s19, v8, v1 +; VI-NEXT: v_mov_b32_e32 v12, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 43 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25 -; VI-NEXT: v_mov_b32_e32 v6, s69 -; VI-NEXT: v_perm_b32 v17, s84, v17, v1 -; VI-NEXT: v_or_b32_e32 v2, v4, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9 +; VI-NEXT: v_mov_b32_e32 v13, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 44 +; VI-NEXT: v_or_b32_e32 v2, v8, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 12, v0 -; VI-NEXT: v_perm_b32 v7, s20, v6, v1 -; VI-NEXT: v_mov_b32_e32 v26, s68 -; VI-NEXT: v_readlane_b32 s16, v33, 57 +; VI-NEXT: v_perm_b32 v10, s20, v10, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 3 +; VI-NEXT: v_perm_b32 v13, s16, v13, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 42 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17 -; VI-NEXT: v_mov_b32_e32 v8, s65 -; VI-NEXT: v_perm_b32 v26, s16, v26, v1 -; VI-NEXT: v_or_b32_e32 v2, v7, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11 +; VI-NEXT: v_mov_b32_e32 v14, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 4 +; VI-NEXT: v_or_b32_e32 v2, v10, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 16, v0 -; VI-NEXT: v_perm_b32 v6, s21, v8, v1 -; VI-NEXT: v_mov_b32_e32 v19, s34 -; VI-NEXT: v_readlane_b32 s16, v33, 56 +; VI-NEXT: v_perm_b32 v12, s21, v12, v1 +; VI-NEXT: v_mov_b32_e32 v15, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 41 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26 -; VI-NEXT: v_mov_b32_e32 v8, s55 -; VI-NEXT: v_perm_b32 v19, s16, v19, v1 -; VI-NEXT: v_or_b32_e32 v2, v6, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13 +; VI-NEXT: v_perm_b32 v15, s16, v15, v1 +; VI-NEXT: v_or_b32_e32 v2, v12, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 20, v0 -; VI-NEXT: v_perm_b32 v10, s22, v8, v1 -; VI-NEXT: v_mov_b32_e32 v27, s71 +; VI-NEXT: v_perm_b32 v14, s22, v14, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 5 +; VI-NEXT: v_mov_b32_e32 v17, s87 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19 -; VI-NEXT: v_mov_b32_e32 v11, s52 -; VI-NEXT: v_perm_b32 v27, s70, v27, v1 -; VI-NEXT: v_or_b32_e32 v2, v10, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v15 +; VI-NEXT: v_mov_b32_e32 v16, s58 +; VI-NEXT: v_perm_b32 v17, s83, v17, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 6 +; VI-NEXT: v_or_b32_e32 v2, v14, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 24, v0 -; VI-NEXT: v_perm_b32 v8, s23, v11, v1 -; VI-NEXT: v_mov_b32_e32 v20, s30 -; VI-NEXT: v_readlane_b32 s16, v33, 55 +; VI-NEXT: v_perm_b32 v16, s23, v16, v1 +; VI-NEXT: v_mov_b32_e32 v19, s16 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27 -; VI-NEXT: v_mov_b32_e32 v11, s54 -; VI-NEXT: v_perm_b32 v20, s16, v20, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 53 -; VI-NEXT: v_or_b32_e32 v2, v8, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17 +; VI-NEXT: v_mov_b32_e32 v18, s84 +; VI-NEXT: v_perm_b32 v19, s76, v19, v1 +; VI-NEXT: v_or_b32_e32 v2, v16, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 28, v0 -; VI-NEXT: v_perm_b32 v12, s24, v11, v1 -; VI-NEXT: v_mov_b32_e32 v28, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 54 +; VI-NEXT: v_perm_b32 v18, s24, v18, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 7 +; VI-NEXT: v_mov_b32_e32 v21, s75 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20 -; VI-NEXT: v_mov_b32_e32 v14, s66 -; VI-NEXT: v_perm_b32 v28, s16, v28, v1 -; VI-NEXT: v_or_b32_e32 v2, v12, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19 +; VI-NEXT: v_mov_b32_e32 v20, s77 +; VI-NEXT: v_perm_b32 v21, s80, v21, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 8 +; VI-NEXT: v_or_b32_e32 v2, v18, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0 -; VI-NEXT: v_perm_b32 v11, s25, v14, v1 -; VI-NEXT: v_mov_b32_e32 v21, s90 -; VI-NEXT: v_readlane_b32 s16, v33, 52 +; VI-NEXT: v_perm_b32 v20, s25, v20, v1 +; VI-NEXT: v_mov_b32_e32 v23, s16 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28 -; VI-NEXT: v_mov_b32_e32 v14, s51 -; VI-NEXT: v_perm_b32 v21, s16, v21, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 50 -; VI-NEXT: v_or_b32_e32 v2, v11, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21 +; VI-NEXT: v_mov_b32_e32 v22, s81 +; VI-NEXT: v_perm_b32 v23, s70, v23, v1 +; VI-NEXT: v_or_b32_e32 v2, v20, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 36, v0 -; VI-NEXT: v_perm_b32 v15, s26, v14, v1 -; VI-NEXT: v_mov_b32_e32 v29, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 51 +; VI-NEXT: v_perm_b32 v22, s26, v22, v1 +; VI-NEXT: v_mov_b32_e32 v25, s73 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21 -; VI-NEXT: v_mov_b32_e32 v16, s86 -; VI-NEXT: v_perm_b32 v29, s16, v29, v1 -; VI-NEXT: v_or_b32_e32 v2, v15, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v23 +; VI-NEXT: v_readlane_b32 s17, v29, 9 +; VI-NEXT: v_mov_b32_e32 v24, s74 +; VI-NEXT: v_perm_b32 v25, s71, v25, v1 +; VI-NEXT: v_or_b32_e32 v2, v22, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 40, v0 -; VI-NEXT: v_perm_b32 v14, s27, v16, v1 -; VI-NEXT: v_mov_b32_e32 v22, s88 -; VI-NEXT: v_readlane_b32 s16, v33, 49 +; VI-NEXT: v_perm_b32 v24, s27, v24, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 10 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29 -; VI-NEXT: v_mov_b32_e32 v16, s50 -; VI-NEXT: v_perm_b32 v22, s16, v22, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 47 -; VI-NEXT: v_or_b32_e32 v2, v14, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25 +; VI-NEXT: v_mov_b32_e32 v27, s16 +; VI-NEXT: v_or_b32_e32 v2, v24, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 44, v0 -; VI-NEXT: v_perm_b32 v18, s28, v16, v1 -; VI-NEXT: v_mov_b32_e32 v30, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 48 +; VI-NEXT: v_mov_b32_e32 v26, s82 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22 -; VI-NEXT: v_mov_b32_e32 v23, s64 -; VI-NEXT: v_perm_b32 v30, s16, v30, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 46 -; VI-NEXT: v_or_b32_e32 v2, v18, v2 +; VI-NEXT: v_perm_b32 v2, s67, v27, v1 +; VI-NEXT: v_perm_b32 v26, s28, v26, v1 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v2, v26, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 48, v0 -; VI-NEXT: v_perm_b32 v16, s29, v23, v1 -; VI-NEXT: v_mov_b32_e32 v23, s78 -; VI-NEXT: v_mov_b32_e32 v31, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 45 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30 -; VI-NEXT: v_perm_b32 v23, s16, v23, v1 -; VI-NEXT: v_or_b32_e32 v2, v16, v2 +; VI-NEXT: v_mov_b32_e32 v3, s63 +; VI-NEXT: v_mov_b32_e32 v2, s72 +; VI-NEXT: v_perm_b32 v3, s68, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 11 +; VI-NEXT: v_perm_b32 v2, s29, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 52, v0 +; VI-NEXT: v_readlane_b32 s16, v29, 12 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, s44, v31, v1 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v23 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s65 +; VI-NEXT: v_perm_b32 v3, s66, v3, v1 +; VI-NEXT: v_perm_b32 v2, s44, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 44 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 42 -; VI-NEXT: v_mov_b32_e32 v3, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 43 -; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s69 +; VI-NEXT: v_mov_b32_e32 v2, s91 +; VI-NEXT: v_perm_b32 v3, s78, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 13 ; VI-NEXT: v_perm_b32 v2, s45, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 60, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 41 +; VI-NEXT: v_readlane_b32 s16, v29, 14 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_mov_b32_e32 v3, s76 -; VI-NEXT: v_readlane_b32 s16, v33, 40 -; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s62 +; VI-NEXT: v_perm_b32 v3, s48, v3, v1 ; VI-NEXT: v_perm_b32 v2, s42, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 64, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 39 +; VI-NEXT: v_readlane_b32 s16, v29, 40 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 37 ; VI-NEXT: v_mov_b32_e32 v3, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 38 -; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_mov_b32_e32 v2, s38 +; VI-NEXT: v_perm_b32 v3, s36, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 15 ; VI-NEXT: v_perm_b32 v2, s43, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x44, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 36 +; VI-NEXT: v_readlane_b32 s16, v29, 16 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_mov_b32_e32 v3, s74 -; VI-NEXT: v_readlane_b32 s16, v33, 35 -; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s39 +; VI-NEXT: v_perm_b32 v3, s60, v3, v1 ; VI-NEXT: v_perm_b32 v2, s40, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x48, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 34 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 32 -; VI-NEXT: v_mov_b32_e32 v3, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 33 -; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s37 +; VI-NEXT: v_mov_b32_e32 v2, s61 +; VI-NEXT: v_perm_b32 v3, s55, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 17 ; VI-NEXT: v_perm_b32 v2, s41, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x4c, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 31 +; VI-NEXT: v_readlane_b32 s16, v29, 18 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s52 +; VI-NEXT: v_perm_b32 v3, s54, v3, v1 ; VI-NEXT: v_perm_b32 v2, s14, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s72 -; VI-NEXT: v_readlane_b32 s14, v33, 30 -; VI-NEXT: v_perm_b32 v3, s14, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x50, v0 -; VI-NEXT: v_readlane_b32 s14, v33, 29 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s14 -; VI-NEXT: v_readlane_b32 s14, v33, 27 -; VI-NEXT: v_mov_b32_e32 v3, s14 -; VI-NEXT: v_readlane_b32 s14, v33, 28 -; VI-NEXT: v_perm_b32 v3, s14, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s59 +; VI-NEXT: v_mov_b32_e32 v2, s35 +; VI-NEXT: v_perm_b32 v3, s34, v3, v1 ; VI-NEXT: v_perm_b32 v2, s15, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x54, v0 -; VI-NEXT: v_readlane_b32 s14, v33, 26 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s14 +; VI-NEXT: v_mov_b32_e32 v2, s31 +; VI-NEXT: v_readlane_b32 s14, v29, 20 ; VI-NEXT: v_perm_b32 v2, s12, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s62 -; VI-NEXT: v_readlane_b32 s12, v33, 25 +; VI-NEXT: v_mov_b32_e32 v3, s14 +; VI-NEXT: v_readlane_b32 s12, v29, 39 ; VI-NEXT: v_perm_b32 v3, s12, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x58, v0 -; VI-NEXT: v_readlane_b32 s12, v33, 24 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s12 -; VI-NEXT: v_readlane_b32 s12, v33, 22 -; VI-NEXT: v_mov_b32_e32 v3, s12 -; VI-NEXT: v_readlane_b32 s12, v33, 23 -; VI-NEXT: v_perm_b32 v3, s12, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s57 +; VI-NEXT: v_mov_b32_e32 v2, s30 +; VI-NEXT: v_perm_b32 v3, s64, v3, v1 ; VI-NEXT: v_perm_b32 v2, s13, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x5c, v0 -; VI-NEXT: v_readlane_b32 s12, v33, 21 +; VI-NEXT: v_readlane_b32 s12, v29, 22 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s12 +; VI-NEXT: v_mov_b32_e32 v3, s12 +; VI-NEXT: v_mov_b32_e32 v2, s53 +; VI-NEXT: v_perm_b32 v3, s89, v3, v1 ; VI-NEXT: v_perm_b32 v2, s10, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s60 -; VI-NEXT: v_readlane_b32 s10, v33, 20 -; VI-NEXT: v_perm_b32 v3, s10, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x60, v0 -; VI-NEXT: v_readlane_b32 s10, v33, 19 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s10 -; VI-NEXT: v_readlane_b32 s10, v33, 17 -; VI-NEXT: v_mov_b32_e32 v3, s10 -; VI-NEXT: v_readlane_b32 s10, v33, 18 -; VI-NEXT: v_perm_b32 v3, s10, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s56 +; VI-NEXT: v_mov_b32_e32 v2, s88 +; VI-NEXT: v_perm_b32 v3, s51, v3, v1 ; VI-NEXT: v_perm_b32 v2, s11, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x64, v0 -; VI-NEXT: v_readlane_b32 s10, v33, 16 +; VI-NEXT: v_readlane_b32 s10, v29, 24 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s10 +; VI-NEXT: v_mov_b32_e32 v3, s10 +; VI-NEXT: v_mov_b32_e32 v2, s86 +; VI-NEXT: v_perm_b32 v3, s47, v3, v1 ; VI-NEXT: v_perm_b32 v2, s8, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s58 -; VI-NEXT: v_readlane_b32 s8, v33, 15 -; VI-NEXT: v_perm_b32 v3, s8, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x68, v0 -; VI-NEXT: v_readlane_b32 s8, v33, 14 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s8 -; VI-NEXT: v_readlane_b32 s8, v33, 12 -; VI-NEXT: v_mov_b32_e32 v3, s8 -; VI-NEXT: v_readlane_b32 s8, v33, 13 -; VI-NEXT: v_perm_b32 v3, s8, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s46 +; VI-NEXT: v_mov_b32_e32 v2, s50 +; VI-NEXT: v_perm_b32 v3, s85, v3, v1 ; VI-NEXT: v_perm_b32 v2, s9, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x6c, v0 -; VI-NEXT: v_readlane_b32 s8, v33, 11 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s8 +; VI-NEXT: v_mov_b32_e32 v2, s79 +; VI-NEXT: v_readlane_b32 s8, v29, 26 ; VI-NEXT: v_perm_b32 v2, s6, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s56 -; VI-NEXT: v_readlane_b32 s6, v33, 10 +; VI-NEXT: v_mov_b32_e32 v3, s8 +; VI-NEXT: v_readlane_b32 s6, v29, 38 ; VI-NEXT: v_perm_b32 v3, s6, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x70, v0 -; VI-NEXT: v_readlane_b32 s6, v33, 9 +; VI-NEXT: v_readlane_b32 s6, v29, 36 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s6 -; VI-NEXT: v_readlane_b32 s6, v33, 7 ; VI-NEXT: v_mov_b32_e32 v3, s6 -; VI-NEXT: v_readlane_b32 s6, v33, 8 +; VI-NEXT: v_readlane_b32 s6, v29, 37 +; VI-NEXT: v_mov_b32_e32 v2, s49 ; VI-NEXT: v_perm_b32 v3, s6, v3, v1 ; VI-NEXT: v_perm_b32 v2, s7, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x74, v0 -; VI-NEXT: v_readlane_b32 s6, v33, 6 +; VI-NEXT: v_readlane_b32 s6, v29, 35 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; VI-NEXT: v_mov_b32_e32 v2, s6 -; VI-NEXT: v_readlane_b32 s6, v33, 0 +; VI-NEXT: v_readlane_b32 s6, v29, 28 ; VI-NEXT: v_perm_b32 v2, s4, v2, v1 ; VI-NEXT: v_mov_b32_e32 v3, s6 -; VI-NEXT: v_readlane_b32 s4, v33, 5 +; VI-NEXT: v_readlane_b32 s4, v29, 34 ; VI-NEXT: v_perm_b32 v3, s4, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x78, v0 -; VI-NEXT: v_readlane_b32 s4, v33, 4 +; VI-NEXT: v_readlane_b32 s4, v29, 33 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; VI-NEXT: v_mov_b32_e32 v2, s4 -; VI-NEXT: v_readlane_b32 s4, v33, 2 +; VI-NEXT: v_readlane_b32 s4, v29, 31 ; VI-NEXT: v_mov_b32_e32 v3, s4 -; VI-NEXT: v_readlane_b32 s4, v33, 3 +; VI-NEXT: v_readlane_b32 s4, v29, 32 ; VI-NEXT: v_perm_b32 v2, s5, v2, v1 ; VI-NEXT: v_perm_b32 v1, s4, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 -; VI-NEXT: v_readlane_b32 s30, v32, 30 -; VI-NEXT: v_readlane_b32 s7, v33, 1 +; VI-NEXT: v_readlane_b32 s30, v28, 30 +; VI-NEXT: v_readlane_b32 s17, v29, 19 +; VI-NEXT: v_readlane_b32 s15, v29, 21 +; VI-NEXT: v_readlane_b32 s13, v29, 23 +; VI-NEXT: v_readlane_b32 s11, v29, 25 +; VI-NEXT: v_readlane_b32 s9, v29, 27 +; VI-NEXT: v_readlane_b32 s7, v29, 29 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_readlane_b32 s31, v32, 31 -; VI-NEXT: v_readlane_b32 s87, v32, 29 -; VI-NEXT: v_readlane_b32 s86, v32, 28 -; VI-NEXT: v_readlane_b32 s85, v32, 27 -; VI-NEXT: v_readlane_b32 s84, v32, 26 -; VI-NEXT: v_readlane_b32 s83, v32, 25 -; VI-NEXT: v_readlane_b32 s82, v32, 24 -; VI-NEXT: v_readlane_b32 s81, v32, 23 -; VI-NEXT: v_readlane_b32 s80, v32, 22 -; VI-NEXT: v_readlane_b32 s71, v32, 21 -; VI-NEXT: v_readlane_b32 s70, v32, 20 -; VI-NEXT: v_readlane_b32 s69, v32, 19 -; VI-NEXT: v_readlane_b32 s68, v32, 18 -; VI-NEXT: v_readlane_b32 s67, v32, 17 -; VI-NEXT: v_readlane_b32 s66, v32, 16 -; VI-NEXT: v_readlane_b32 s65, v32, 15 -; VI-NEXT: v_readlane_b32 s64, v32, 14 -; VI-NEXT: v_readlane_b32 s55, v32, 13 -; VI-NEXT: v_readlane_b32 s54, v32, 12 -; VI-NEXT: v_readlane_b32 s53, v32, 11 -; VI-NEXT: v_readlane_b32 s52, v32, 10 -; VI-NEXT: v_readlane_b32 s51, v32, 9 -; VI-NEXT: v_readlane_b32 s50, v32, 8 -; VI-NEXT: v_readlane_b32 s49, v32, 7 -; VI-NEXT: v_readlane_b32 s48, v32, 6 -; VI-NEXT: v_readlane_b32 s39, v32, 5 -; VI-NEXT: v_readlane_b32 s38, v32, 4 -; VI-NEXT: v_readlane_b32 s37, v32, 3 -; VI-NEXT: v_readlane_b32 s36, v32, 2 -; VI-NEXT: v_readlane_b32 s35, v32, 1 -; VI-NEXT: v_readlane_b32 s34, v32, 0 +; VI-NEXT: v_readlane_b32 s31, v28, 31 +; VI-NEXT: v_readlane_b32 s87, v28, 29 +; VI-NEXT: v_readlane_b32 s86, v28, 28 +; VI-NEXT: v_readlane_b32 s85, v28, 27 +; VI-NEXT: v_readlane_b32 s84, v28, 26 +; VI-NEXT: v_readlane_b32 s83, v28, 25 +; VI-NEXT: v_readlane_b32 s82, v28, 24 +; VI-NEXT: v_readlane_b32 s81, v28, 23 +; VI-NEXT: v_readlane_b32 s80, v28, 22 +; VI-NEXT: v_readlane_b32 s71, v28, 21 +; VI-NEXT: v_readlane_b32 s70, v28, 20 +; VI-NEXT: v_readlane_b32 s69, v28, 19 +; VI-NEXT: v_readlane_b32 s68, v28, 18 +; VI-NEXT: v_readlane_b32 s67, v28, 17 +; VI-NEXT: v_readlane_b32 s66, v28, 16 +; VI-NEXT: v_readlane_b32 s65, v28, 15 +; VI-NEXT: v_readlane_b32 s64, v28, 14 +; VI-NEXT: v_readlane_b32 s55, v28, 13 +; VI-NEXT: v_readlane_b32 s54, v28, 12 +; VI-NEXT: v_readlane_b32 s53, v28, 11 +; VI-NEXT: v_readlane_b32 s52, v28, 10 +; VI-NEXT: v_readlane_b32 s51, v28, 9 +; VI-NEXT: v_readlane_b32 s50, v28, 8 +; VI-NEXT: v_readlane_b32 s49, v28, 7 +; VI-NEXT: v_readlane_b32 s48, v28, 6 +; VI-NEXT: v_readlane_b32 s39, v28, 5 +; VI-NEXT: v_readlane_b32 s38, v28, 4 +; VI-NEXT: v_readlane_b32 s37, v28, 3 +; VI-NEXT: v_readlane_b32 s36, v28, 2 +; VI-NEXT: v_readlane_b32 s35, v28, 1 +; VI-NEXT: v_readlane_b32 s34, v28, 0 ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] -; VI-NEXT: .LBB57_4: -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr71 -; VI-NEXT: ; implicit-def: $sgpr70 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: v_writelane_b32 v33, s70, 0 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr82 -; VI-NEXT: ; implicit-def: $sgpr53 -; VI-NEXT: ; implicit-def: $sgpr67 -; VI-NEXT: ; implicit-def: $sgpr85 -; VI-NEXT: ; implicit-def: $sgpr83 -; VI-NEXT: ; implicit-def: $sgpr47 -; VI-NEXT: ; implicit-def: $sgpr81 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr87 -; VI-NEXT: ; implicit-def: $sgpr80 -; VI-NEXT: ; implicit-def: $sgpr69 -; VI-NEXT: ; implicit-def: $sgpr84 -; VI-NEXT: ; implicit-def: $sgpr65 -; VI-NEXT: ; implicit-def: $sgpr68 -; VI-NEXT: ; implicit-def: $sgpr55 -; VI-NEXT: ; implicit-def: $sgpr52 -; VI-NEXT: ; implicit-def: $sgpr54 -; VI-NEXT: ; implicit-def: $sgpr66 -; VI-NEXT: ; implicit-def: $sgpr51 -; VI-NEXT: ; implicit-def: $sgpr86 -; VI-NEXT: ; implicit-def: $sgpr50 -; VI-NEXT: ; implicit-def: $sgpr64 -; VI-NEXT: ; implicit-def: $sgpr48 -; VI-NEXT: ; implicit-def: $sgpr38 -; VI-NEXT: ; implicit-def: $sgpr36 -; VI-NEXT: ; implicit-def: $sgpr34 -; VI-NEXT: ; implicit-def: $sgpr30 -; VI-NEXT: ; implicit-def: $sgpr90 -; VI-NEXT: ; implicit-def: $sgpr88 -; VI-NEXT: ; implicit-def: $sgpr78 -; VI-NEXT: ; implicit-def: $sgpr76 -; VI-NEXT: ; implicit-def: $sgpr74 -; VI-NEXT: ; implicit-def: $sgpr72 -; VI-NEXT: ; implicit-def: $sgpr62 -; VI-NEXT: ; implicit-def: $sgpr60 -; VI-NEXT: ; implicit-def: $sgpr58 -; VI-NEXT: v_writelane_b32 v33, s71, 1 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr70 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; kill: killed $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: s_branch .LBB57_2 ; ; GFX9-LABEL: bitcast_v16i64_to_v128i8_scalar: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v29, s34, 0 -; GFX9-NEXT: v_writelane_b32 v29, s35, 1 -; GFX9-NEXT: v_writelane_b32 v29, s36, 2 -; GFX9-NEXT: v_writelane_b32 v29, s37, 3 -; GFX9-NEXT: v_writelane_b32 v29, s38, 4 -; GFX9-NEXT: v_writelane_b32 v29, s39, 5 -; GFX9-NEXT: v_writelane_b32 v29, s48, 6 -; GFX9-NEXT: v_writelane_b32 v29, s49, 7 -; GFX9-NEXT: v_writelane_b32 v29, s50, 8 -; GFX9-NEXT: v_writelane_b32 v29, s51, 9 -; GFX9-NEXT: v_writelane_b32 v29, s52, 10 -; GFX9-NEXT: v_writelane_b32 v29, s53, 11 -; GFX9-NEXT: v_writelane_b32 v29, s54, 12 -; GFX9-NEXT: v_writelane_b32 v29, s55, 13 -; GFX9-NEXT: v_writelane_b32 v29, s64, 14 -; GFX9-NEXT: v_writelane_b32 v29, s65, 15 -; GFX9-NEXT: v_writelane_b32 v29, s66, 16 -; GFX9-NEXT: v_writelane_b32 v29, s67, 17 -; GFX9-NEXT: v_writelane_b32 v29, s68, 18 -; GFX9-NEXT: v_writelane_b32 v29, s69, 19 -; GFX9-NEXT: v_writelane_b32 v29, s70, 20 -; GFX9-NEXT: v_writelane_b32 v29, s71, 21 -; GFX9-NEXT: v_writelane_b32 v29, s80, 22 -; GFX9-NEXT: v_writelane_b32 v29, s81, 23 -; GFX9-NEXT: v_writelane_b32 v29, s82, 24 -; GFX9-NEXT: v_writelane_b32 v29, s83, 25 -; GFX9-NEXT: v_writelane_b32 v29, s84, 26 -; GFX9-NEXT: v_writelane_b32 v29, s85, 27 -; GFX9-NEXT: v_writelane_b32 v29, s86, 28 -; GFX9-NEXT: v_writelane_b32 v29, s87, 29 -; GFX9-NEXT: v_writelane_b32 v29, s96, 30 -; GFX9-NEXT: v_writelane_b32 v29, s97, 31 -; GFX9-NEXT: v_writelane_b32 v29, s98, 32 -; GFX9-NEXT: v_writelane_b32 v29, s99, 33 -; GFX9-NEXT: v_writelane_b32 v29, s30, 34 -; GFX9-NEXT: v_writelane_b32 v29, s31, 35 +; GFX9-NEXT: v_writelane_b32 v24, s34, 0 +; GFX9-NEXT: v_writelane_b32 v24, s35, 1 +; GFX9-NEXT: v_writelane_b32 v24, s36, 2 +; GFX9-NEXT: v_writelane_b32 v24, s37, 3 +; GFX9-NEXT: v_writelane_b32 v24, s38, 4 +; GFX9-NEXT: v_writelane_b32 v24, s39, 5 +; GFX9-NEXT: v_writelane_b32 v24, s48, 6 +; GFX9-NEXT: v_writelane_b32 v24, s49, 7 +; GFX9-NEXT: v_writelane_b32 v24, s50, 8 +; GFX9-NEXT: v_writelane_b32 v24, s51, 9 +; GFX9-NEXT: v_writelane_b32 v24, s52, 10 +; GFX9-NEXT: v_writelane_b32 v24, s53, 11 +; GFX9-NEXT: v_writelane_b32 v24, s54, 12 +; GFX9-NEXT: v_writelane_b32 v24, s55, 13 +; GFX9-NEXT: v_writelane_b32 v24, s64, 14 +; GFX9-NEXT: v_writelane_b32 v24, s65, 15 +; GFX9-NEXT: v_writelane_b32 v24, s66, 16 +; GFX9-NEXT: v_writelane_b32 v24, s67, 17 +; GFX9-NEXT: v_writelane_b32 v24, s68, 18 +; GFX9-NEXT: v_writelane_b32 v24, s69, 19 +; GFX9-NEXT: v_writelane_b32 v24, s70, 20 +; GFX9-NEXT: v_writelane_b32 v24, s71, 21 +; GFX9-NEXT: v_writelane_b32 v24, s80, 22 +; GFX9-NEXT: v_writelane_b32 v24, s81, 23 +; GFX9-NEXT: v_writelane_b32 v24, s82, 24 +; GFX9-NEXT: v_writelane_b32 v24, s83, 25 +; GFX9-NEXT: v_writelane_b32 v24, s84, 26 +; GFX9-NEXT: v_writelane_b32 v24, s85, 27 +; GFX9-NEXT: v_writelane_b32 v24, s86, 28 +; GFX9-NEXT: v_writelane_b32 v24, s87, 29 +; GFX9-NEXT: v_writelane_b32 v24, s96, 30 +; GFX9-NEXT: v_writelane_b32 v24, s97, 31 +; GFX9-NEXT: v_writelane_b32 v24, s98, 32 +; GFX9-NEXT: v_writelane_b32 v24, s99, 33 +; GFX9-NEXT: v_writelane_b32 v24, s30, 34 +; GFX9-NEXT: v_writelane_b32 v24, s31, 35 ; GFX9-NEXT: v_readfirstlane_b32 s44, v19 ; GFX9-NEXT: v_readfirstlane_b32 s5, v18 ; GFX9-NEXT: v_readfirstlane_b32 s4, v17 @@ -79801,155 +79905,155 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s45, v2 ; GFX9-NEXT: s_cmp_lg_u32 s44, 0 ; GFX9-NEXT: v_readfirstlane_b32 s44, v1 -; GFX9-NEXT: ; implicit-def: $vgpr30 : SGPR spill to VGPR lane +; GFX9-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane ; GFX9-NEXT: s_cbranch_scc0 .LBB57_4 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: s_lshr_b32 s46, s5, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 0 +; GFX9-NEXT: v_writelane_b32 v25, s46, 30 ; GFX9-NEXT: s_lshr_b32 s46, s5, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 1 +; GFX9-NEXT: v_writelane_b32 v25, s46, 31 ; GFX9-NEXT: s_lshr_b32 s46, s5, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 2 +; GFX9-NEXT: v_writelane_b32 v25, s46, 32 ; GFX9-NEXT: s_lshr_b32 s46, s4, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 3 +; GFX9-NEXT: v_writelane_b32 v25, s46, 33 ; GFX9-NEXT: s_lshr_b32 s46, s4, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 4 +; GFX9-NEXT: v_writelane_b32 v25, s46, 34 ; GFX9-NEXT: s_lshr_b32 s46, s7, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 5 +; GFX9-NEXT: v_writelane_b32 v25, s46, 35 ; GFX9-NEXT: s_lshr_b32 s46, s7, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 6 +; GFX9-NEXT: v_writelane_b32 v25, s46, 36 ; GFX9-NEXT: s_lshr_b32 s46, s7, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 7 +; GFX9-NEXT: v_writelane_b32 v25, s46, 37 ; GFX9-NEXT: s_lshr_b32 s46, s6, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 8 -; GFX9-NEXT: s_lshr_b32 s46, s6, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 9 +; GFX9-NEXT: v_writelane_b32 v25, s46, 38 ; GFX9-NEXT: s_lshr_b32 s46, s9, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 10 -; GFX9-NEXT: s_lshr_b32 s46, s9, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 11 -; GFX9-NEXT: s_lshr_b32 s46, s9, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 12 -; GFX9-NEXT: s_lshr_b32 s46, s8, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 13 -; GFX9-NEXT: s_lshr_b32 s46, s8, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 14 -; GFX9-NEXT: s_lshr_b32 s46, s11, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 15 -; GFX9-NEXT: s_lshr_b32 s46, s11, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 16 -; GFX9-NEXT: s_lshr_b32 s46, s11, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 17 -; GFX9-NEXT: s_lshr_b32 s46, s10, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 18 -; GFX9-NEXT: s_lshr_b32 s46, s10, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 19 -; GFX9-NEXT: s_lshr_b32 s46, s13, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 20 -; GFX9-NEXT: s_lshr_b32 s46, s13, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 21 -; GFX9-NEXT: s_lshr_b32 s46, s13, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 22 -; GFX9-NEXT: s_lshr_b32 s46, s12, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 23 -; GFX9-NEXT: s_lshr_b32 s46, s12, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 24 -; GFX9-NEXT: s_lshr_b32 s46, s15, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 25 -; GFX9-NEXT: s_lshr_b32 s46, s15, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 26 -; GFX9-NEXT: s_lshr_b32 s46, s15, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 27 -; GFX9-NEXT: s_lshr_b32 s46, s14, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 28 -; GFX9-NEXT: s_lshr_b32 s46, s14, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 29 -; GFX9-NEXT: s_lshr_b32 s46, s41, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 30 +; GFX9-NEXT: v_writelane_b32 v25, s46, 39 +; GFX9-NEXT: s_lshr_b32 s57, s42, 16 +; GFX9-NEXT: v_writelane_b32 v25, s57, 40 +; GFX9-NEXT: s_lshr_b32 s58, s29, 16 +; GFX9-NEXT: v_writelane_b32 v25, s58, 41 +; GFX9-NEXT: s_lshr_b32 s58, s27, 8 +; GFX9-NEXT: v_writelane_b32 v25, s58, 42 +; GFX9-NEXT: s_lshr_b32 s58, s26, 16 +; GFX9-NEXT: v_writelane_b32 v25, s58, 43 +; GFX9-NEXT: s_lshr_b32 s58, s26, 8 +; GFX9-NEXT: v_writelane_b32 v25, s58, 44 +; GFX9-NEXT: s_lshr_b32 s58, s25, 24 +; GFX9-NEXT: v_writelane_b32 v25, s58, 45 +; GFX9-NEXT: s_lshr_b32 s58, s25, 16 +; GFX9-NEXT: v_writelane_b32 v25, s58, 46 +; GFX9-NEXT: s_lshr_b32 s58, s25, 8 +; GFX9-NEXT: v_writelane_b32 v25, s58, 47 +; GFX9-NEXT: s_lshr_b32 s58, s24, 16 +; GFX9-NEXT: v_writelane_b32 v25, s58, 48 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[4:5], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 28 +; GFX9-NEXT: v_writelane_b32 v25, s91, 29 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[6:7], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 26 +; GFX9-NEXT: v_writelane_b32 v25, s91, 27 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[8:9], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 24 +; GFX9-NEXT: v_writelane_b32 v25, s91, 25 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 22 +; GFX9-NEXT: v_writelane_b32 v25, s91, 23 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[12:13], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 20 +; GFX9-NEXT: v_writelane_b32 v25, s91, 21 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[14:15], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 18 +; GFX9-NEXT: v_writelane_b32 v25, s91, 19 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[40:41], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 16 +; GFX9-NEXT: v_writelane_b32 v25, s91, 17 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[42:43], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 14 +; GFX9-NEXT: v_writelane_b32 v25, s91, 15 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[44:45], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 12 +; GFX9-NEXT: v_writelane_b32 v25, s91, 13 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[28:29], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 10 +; GFX9-NEXT: v_writelane_b32 v25, s91, 11 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 8 +; GFX9-NEXT: v_writelane_b32 v25, s91, 9 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[24:25], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 6 +; GFX9-NEXT: v_writelane_b32 v25, s91, 7 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[22:23], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 4 +; GFX9-NEXT: v_writelane_b32 v25, s91, 5 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[20:21], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 2 +; GFX9-NEXT: v_writelane_b32 v25, s91, 3 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 +; GFX9-NEXT: v_writelane_b32 v25, s90, 0 +; GFX9-NEXT: s_lshr_b32 vcc_lo, s27, 16 +; GFX9-NEXT: v_writelane_b32 v25, s91, 1 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[16:17], 24 +; GFX9-NEXT: s_lshr_b32 s37, s6, 8 +; GFX9-NEXT: s_lshr_b32 s51, s9, 16 +; GFX9-NEXT: s_lshr_b32 s76, s9, 8 +; GFX9-NEXT: s_lshr_b32 s77, s8, 16 +; GFX9-NEXT: s_lshr_b32 s67, s8, 8 +; GFX9-NEXT: s_lshr_b32 s65, s11, 24 +; GFX9-NEXT: s_lshr_b32 s55, s11, 16 +; GFX9-NEXT: s_lshr_b32 s66, s11, 8 +; GFX9-NEXT: s_lshr_b32 s78, s10, 16 +; GFX9-NEXT: s_lshr_b32 s79, s10, 8 +; GFX9-NEXT: s_lshr_b32 s64, s13, 24 +; GFX9-NEXT: s_lshr_b32 s88, s13, 16 +; GFX9-NEXT: s_lshr_b32 s89, s13, 8 +; GFX9-NEXT: s_lshr_b32 s69, s12, 16 +; GFX9-NEXT: s_lshr_b32 s70, s12, 8 +; GFX9-NEXT: s_lshr_b32 s68, s15, 24 +; GFX9-NEXT: s_lshr_b32 s71, s15, 16 +; GFX9-NEXT: s_lshr_b32 s80, s15, 8 +; GFX9-NEXT: s_lshr_b32 s82, s14, 16 +; GFX9-NEXT: s_lshr_b32 s83, s14, 8 +; GFX9-NEXT: s_lshr_b32 s81, s41, 24 ; GFX9-NEXT: s_lshr_b32 s46, s41, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 31 -; GFX9-NEXT: s_lshr_b32 s46, s41, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 32 -; GFX9-NEXT: s_lshr_b32 s46, s40, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 33 -; GFX9-NEXT: s_lshr_b32 s46, s40, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 34 -; GFX9-NEXT: s_lshr_b32 s46, s43, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 35 -; GFX9-NEXT: s_lshr_b32 s46, s43, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 36 -; GFX9-NEXT: s_lshr_b32 s46, s43, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 37 -; GFX9-NEXT: s_lshr_b32 s46, s42, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 38 -; GFX9-NEXT: s_lshr_b32 s46, s42, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 39 -; GFX9-NEXT: s_lshr_b32 s46, s45, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 40 -; GFX9-NEXT: s_lshr_b32 s46, s45, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 41 -; GFX9-NEXT: s_lshr_b32 s46, s45, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 42 -; GFX9-NEXT: s_lshr_b32 s46, s44, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 43 -; GFX9-NEXT: s_lshr_b32 s46, s44, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 44 -; GFX9-NEXT: s_lshr_b32 s46, s29, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 45 -; GFX9-NEXT: s_lshr_b32 s46, s29, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 46 -; GFX9-NEXT: s_lshr_b32 s46, s29, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 47 -; GFX9-NEXT: s_lshr_b32 s46, s28, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 48 -; GFX9-NEXT: s_lshr_b32 s46, s27, 16 -; GFX9-NEXT: s_lshr_b32 s83, s28, 8 -; GFX9-NEXT: s_lshr_b32 s81, s27, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 49 -; GFX9-NEXT: s_lshr_b32 s53, s27, 8 -; GFX9-NEXT: s_lshr_b32 s82, s26, 16 -; GFX9-NEXT: s_lshr_b32 s67, s26, 8 -; GFX9-NEXT: s_lshr_b32 s84, s25, 24 -; GFX9-NEXT: s_lshr_b32 s96, s25, 16 -; GFX9-NEXT: s_lshr_b32 s65, s25, 8 -; GFX9-NEXT: s_lshr_b32 s86, s24, 16 -; GFX9-NEXT: s_lshr_b32 s55, s24, 8 -; GFX9-NEXT: s_lshr_b32 s98, s23, 24 -; GFX9-NEXT: s_lshr_b32 s87, s23, 16 -; GFX9-NEXT: s_lshr_b32 s66, s23, 8 -; GFX9-NEXT: s_lshr_b32 s97, s22, 16 -; GFX9-NEXT: s_lshr_b32 s64, s22, 8 -; GFX9-NEXT: s_lshr_b32 s49, s21, 24 -; GFX9-NEXT: s_lshr_b32 s99, s21, 16 -; GFX9-NEXT: s_lshr_b32 s80, s21, 8 -; GFX9-NEXT: s_lshr_b32 s39, s20, 16 -; GFX9-NEXT: s_lshr_b32 s70, s20, 8 +; GFX9-NEXT: s_lshr_b32 s85, s41, 8 +; GFX9-NEXT: s_lshr_b32 s93, s40, 16 +; GFX9-NEXT: s_lshr_b32 s56, s40, 8 +; GFX9-NEXT: s_lshr_b32 s47, s43, 24 +; GFX9-NEXT: s_lshr_b32 s84, s43, 16 +; GFX9-NEXT: s_lshr_b32 s95, s43, 8 +; GFX9-NEXT: s_lshr_b32 s92, s42, 8 +; GFX9-NEXT: s_lshr_b32 s94, s45, 24 +; GFX9-NEXT: s_lshr_b32 s57, s45, 16 +; GFX9-NEXT: s_lshr_b32 s30, s45, 8 +; GFX9-NEXT: s_lshr_b32 s31, s44, 16 +; GFX9-NEXT: s_lshr_b32 s96, s44, 8 +; GFX9-NEXT: s_lshr_b32 s34, s29, 24 +; GFX9-NEXT: s_lshr_b32 s35, s29, 8 +; GFX9-NEXT: s_lshr_b32 s36, s28, 16 +; GFX9-NEXT: s_lshr_b32 s74, s28, 8 +; GFX9-NEXT: s_lshr_b32 s75, s27, 24 +; GFX9-NEXT: s_lshr_b32 s86, s24, 8 +; GFX9-NEXT: s_lshr_b32 s87, s23, 24 +; GFX9-NEXT: s_lshr_b32 s98, s23, 16 +; GFX9-NEXT: s_lshr_b32 s58, s23, 8 +; GFX9-NEXT: s_lshr_b32 s59, s22, 16 +; GFX9-NEXT: s_lshr_b32 s97, s22, 8 +; GFX9-NEXT: s_lshr_b32 s60, s21, 24 +; GFX9-NEXT: s_lshr_b32 s61, s21, 16 +; GFX9-NEXT: s_lshr_b32 s38, s21, 8 +; GFX9-NEXT: s_lshr_b32 s99, s20, 16 +; GFX9-NEXT: s_lshr_b32 s39, s20, 8 ; GFX9-NEXT: s_lshr_b32 s48, s19, 24 -; GFX9-NEXT: s_lshr_b32 s38, s19, 16 -; GFX9-NEXT: s_lshr_b32 s68, s19, 8 -; GFX9-NEXT: s_lshr_b32 s54, s18, 16 -; GFX9-NEXT: s_lshr_b32 s71, s18, 8 -; GFX9-NEXT: s_lshr_b32 s52, s17, 24 -; GFX9-NEXT: s_lshr_b32 s50, s17, 16 -; GFX9-NEXT: s_lshr_b32 s69, s17, 8 -; GFX9-NEXT: s_lshr_b32 s51, s16, 16 -; GFX9-NEXT: s_lshr_b32 s85, s16, 8 -; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; GFX9-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; GFX9-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; GFX9-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; GFX9-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; GFX9-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; GFX9-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; GFX9-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; GFX9-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; GFX9-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; GFX9-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; GFX9-NEXT: s_lshr_b64 s[92:93], s[24:25], 24 -; GFX9-NEXT: s_lshr_b64 s[94:95], s[22:23], 24 -; GFX9-NEXT: s_lshr_b64 s[30:31], s[20:21], 24 -; GFX9-NEXT: s_lshr_b64 s[34:35], s[18:19], 24 -; GFX9-NEXT: s_lshr_b64 s[36:37], s[16:17], 24 +; GFX9-NEXT: s_lshr_b32 s62, s19, 16 +; GFX9-NEXT: s_lshr_b32 s63, s19, 8 +; GFX9-NEXT: s_lshr_b32 s49, s18, 16 +; GFX9-NEXT: s_lshr_b32 s72, s18, 8 +; GFX9-NEXT: s_lshr_b32 s73, s17, 24 +; GFX9-NEXT: s_lshr_b32 s54, s17, 16 +; GFX9-NEXT: s_lshr_b32 s52, s17, 8 +; GFX9-NEXT: s_lshr_b32 s50, s16, 16 +; GFX9-NEXT: s_lshr_b32 s53, s16, 8 +; GFX9-NEXT: s_mov_b32 s91, vcc_lo ; GFX9-NEXT: s_cbranch_execnz .LBB57_3 ; GFX9-NEXT: .LBB57_2: ; %cmp.true ; GFX9-NEXT: s_add_u32 s16, s16, 3 @@ -79984,590 +80088,557 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; GFX9-NEXT: s_addc_u32 s7, s7, 0 ; GFX9-NEXT: s_add_u32 s4, s4, 3 ; GFX9-NEXT: s_addc_u32 s5, s5, 0 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 28 +; GFX9-NEXT: v_writelane_b32 v25, s47, 29 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 26 +; GFX9-NEXT: v_writelane_b32 v25, s47, 27 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 24 +; GFX9-NEXT: v_writelane_b32 v25, s47, 25 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 22 +; GFX9-NEXT: v_writelane_b32 v25, s47, 23 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 20 +; GFX9-NEXT: v_writelane_b32 v25, s47, 21 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 18 +; GFX9-NEXT: v_writelane_b32 v25, s47, 19 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 16 +; GFX9-NEXT: v_writelane_b32 v25, s47, 17 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[42:43], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 14 +; GFX9-NEXT: v_writelane_b32 v25, s47, 15 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[44:45], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 12 +; GFX9-NEXT: v_writelane_b32 v25, s47, 13 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[28:29], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 10 +; GFX9-NEXT: v_writelane_b32 v25, s47, 11 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[26:27], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 8 +; GFX9-NEXT: v_writelane_b32 v25, s47, 9 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[24:25], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 6 +; GFX9-NEXT: v_writelane_b32 v25, s47, 7 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[22:23], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 4 +; GFX9-NEXT: v_writelane_b32 v25, s47, 5 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[20:21], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 2 +; GFX9-NEXT: v_writelane_b32 v25, s47, 3 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[18:19], 24 +; GFX9-NEXT: v_writelane_b32 v25, s46, 0 +; GFX9-NEXT: v_writelane_b32 v25, s47, 1 ; GFX9-NEXT: s_lshr_b32 s46, s5, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 0 +; GFX9-NEXT: v_writelane_b32 v25, s46, 30 ; GFX9-NEXT: s_lshr_b32 s46, s5, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 1 +; GFX9-NEXT: v_writelane_b32 v25, s46, 31 ; GFX9-NEXT: s_lshr_b32 s46, s5, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 2 +; GFX9-NEXT: v_writelane_b32 v25, s46, 32 ; GFX9-NEXT: s_lshr_b32 s46, s4, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 3 +; GFX9-NEXT: v_writelane_b32 v25, s46, 33 ; GFX9-NEXT: s_lshr_b32 s46, s4, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 4 +; GFX9-NEXT: v_writelane_b32 v25, s46, 34 ; GFX9-NEXT: s_lshr_b32 s46, s7, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 5 +; GFX9-NEXT: v_writelane_b32 v25, s46, 35 ; GFX9-NEXT: s_lshr_b32 s46, s7, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 6 +; GFX9-NEXT: v_writelane_b32 v25, s46, 36 ; GFX9-NEXT: s_lshr_b32 s46, s7, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 7 +; GFX9-NEXT: v_writelane_b32 v25, s46, 37 ; GFX9-NEXT: s_lshr_b32 s46, s6, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 8 -; GFX9-NEXT: s_lshr_b32 s46, s6, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 9 +; GFX9-NEXT: v_writelane_b32 v25, s46, 38 ; GFX9-NEXT: s_lshr_b32 s46, s9, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 10 -; GFX9-NEXT: s_lshr_b32 s46, s9, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 11 -; GFX9-NEXT: s_lshr_b32 s46, s9, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 12 -; GFX9-NEXT: s_lshr_b32 s46, s8, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 13 -; GFX9-NEXT: s_lshr_b32 s46, s8, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 14 -; GFX9-NEXT: s_lshr_b32 s46, s11, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 15 -; GFX9-NEXT: s_lshr_b32 s46, s11, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 16 -; GFX9-NEXT: s_lshr_b32 s46, s11, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 17 -; GFX9-NEXT: s_lshr_b32 s46, s10, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 18 -; GFX9-NEXT: s_lshr_b32 s46, s10, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 19 -; GFX9-NEXT: s_lshr_b32 s46, s13, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 20 -; GFX9-NEXT: s_lshr_b32 s46, s13, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 21 -; GFX9-NEXT: s_lshr_b32 s46, s13, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 22 -; GFX9-NEXT: s_lshr_b32 s46, s12, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 23 -; GFX9-NEXT: s_lshr_b32 s46, s12, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 24 -; GFX9-NEXT: s_lshr_b32 s46, s15, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 25 -; GFX9-NEXT: s_lshr_b32 s46, s15, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 26 -; GFX9-NEXT: s_lshr_b32 s46, s15, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 27 -; GFX9-NEXT: s_lshr_b32 s46, s14, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 28 -; GFX9-NEXT: s_lshr_b32 s46, s14, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 29 -; GFX9-NEXT: s_lshr_b32 s46, s41, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 30 +; GFX9-NEXT: v_writelane_b32 v25, s46, 39 +; GFX9-NEXT: s_lshr_b32 s57, s42, 16 +; GFX9-NEXT: v_writelane_b32 v25, s57, 40 +; GFX9-NEXT: s_lshr_b32 s58, s29, 16 +; GFX9-NEXT: v_writelane_b32 v25, s58, 41 +; GFX9-NEXT: s_lshr_b32 s58, s27, 8 +; GFX9-NEXT: v_writelane_b32 v25, s58, 42 +; GFX9-NEXT: s_lshr_b32 s58, s26, 16 +; GFX9-NEXT: v_writelane_b32 v25, s58, 43 +; GFX9-NEXT: s_lshr_b32 s58, s26, 8 +; GFX9-NEXT: v_writelane_b32 v25, s58, 44 +; GFX9-NEXT: s_lshr_b32 s58, s25, 24 +; GFX9-NEXT: v_writelane_b32 v25, s58, 45 +; GFX9-NEXT: s_lshr_b32 s58, s25, 16 +; GFX9-NEXT: v_writelane_b32 v25, s58, 46 +; GFX9-NEXT: s_lshr_b32 s58, s25, 8 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[16:17], 24 +; GFX9-NEXT: v_writelane_b32 v25, s58, 47 +; GFX9-NEXT: s_lshr_b32 s58, s24, 16 +; GFX9-NEXT: s_lshr_b32 s37, s6, 8 +; GFX9-NEXT: s_lshr_b32 s51, s9, 16 +; GFX9-NEXT: s_lshr_b32 s76, s9, 8 +; GFX9-NEXT: s_lshr_b32 s77, s8, 16 +; GFX9-NEXT: s_lshr_b32 s67, s8, 8 +; GFX9-NEXT: s_lshr_b32 s65, s11, 24 +; GFX9-NEXT: s_lshr_b32 s55, s11, 16 +; GFX9-NEXT: s_lshr_b32 s66, s11, 8 +; GFX9-NEXT: s_lshr_b32 s78, s10, 16 +; GFX9-NEXT: s_lshr_b32 s79, s10, 8 +; GFX9-NEXT: s_lshr_b32 s64, s13, 24 +; GFX9-NEXT: s_lshr_b32 s88, s13, 16 +; GFX9-NEXT: s_lshr_b32 s89, s13, 8 +; GFX9-NEXT: s_lshr_b32 s69, s12, 16 +; GFX9-NEXT: s_lshr_b32 s70, s12, 8 +; GFX9-NEXT: s_lshr_b32 s68, s15, 24 +; GFX9-NEXT: s_lshr_b32 s71, s15, 16 +; GFX9-NEXT: s_lshr_b32 s80, s15, 8 +; GFX9-NEXT: s_lshr_b32 s82, s14, 16 +; GFX9-NEXT: s_lshr_b32 s83, s14, 8 +; GFX9-NEXT: s_lshr_b32 s81, s41, 24 ; GFX9-NEXT: s_lshr_b32 s46, s41, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 31 -; GFX9-NEXT: s_lshr_b32 s46, s41, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 32 -; GFX9-NEXT: s_lshr_b32 s46, s40, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 33 -; GFX9-NEXT: s_lshr_b32 s46, s40, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 34 -; GFX9-NEXT: s_lshr_b32 s46, s43, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 35 -; GFX9-NEXT: s_lshr_b32 s46, s43, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 36 -; GFX9-NEXT: s_lshr_b32 s46, s43, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 37 -; GFX9-NEXT: s_lshr_b32 s46, s42, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 38 -; GFX9-NEXT: s_lshr_b32 s46, s42, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 39 -; GFX9-NEXT: s_lshr_b32 s46, s45, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 40 -; GFX9-NEXT: s_lshr_b32 s46, s45, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 41 -; GFX9-NEXT: s_lshr_b32 s46, s45, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 42 -; GFX9-NEXT: s_lshr_b32 s46, s44, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 43 -; GFX9-NEXT: s_lshr_b32 s46, s44, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 44 -; GFX9-NEXT: s_lshr_b32 s46, s29, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 45 -; GFX9-NEXT: s_lshr_b32 s46, s29, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 46 -; GFX9-NEXT: s_lshr_b32 s46, s29, 8 -; GFX9-NEXT: v_writelane_b32 v30, s46, 47 -; GFX9-NEXT: s_lshr_b32 s46, s28, 16 -; GFX9-NEXT: v_writelane_b32 v30, s46, 48 -; GFX9-NEXT: s_lshr_b32 s46, s27, 16 -; GFX9-NEXT: s_lshr_b32 s83, s28, 8 -; GFX9-NEXT: s_lshr_b32 s81, s27, 24 -; GFX9-NEXT: v_writelane_b32 v30, s46, 49 -; GFX9-NEXT: s_lshr_b32 s53, s27, 8 -; GFX9-NEXT: s_lshr_b32 s82, s26, 16 -; GFX9-NEXT: s_lshr_b32 s67, s26, 8 -; GFX9-NEXT: s_lshr_b32 s84, s25, 24 -; GFX9-NEXT: s_lshr_b32 s96, s25, 16 -; GFX9-NEXT: s_lshr_b32 s65, s25, 8 -; GFX9-NEXT: s_lshr_b32 s86, s24, 16 -; GFX9-NEXT: s_lshr_b32 s55, s24, 8 -; GFX9-NEXT: s_lshr_b32 s98, s23, 24 -; GFX9-NEXT: s_lshr_b32 s87, s23, 16 -; GFX9-NEXT: s_lshr_b32 s66, s23, 8 -; GFX9-NEXT: s_lshr_b32 s97, s22, 16 -; GFX9-NEXT: s_lshr_b32 s64, s22, 8 -; GFX9-NEXT: s_lshr_b32 s49, s21, 24 -; GFX9-NEXT: s_lshr_b32 s99, s21, 16 -; GFX9-NEXT: s_lshr_b32 s80, s21, 8 -; GFX9-NEXT: s_lshr_b32 s39, s20, 16 -; GFX9-NEXT: s_lshr_b32 s70, s20, 8 +; GFX9-NEXT: s_lshr_b32 s85, s41, 8 +; GFX9-NEXT: s_lshr_b32 s93, s40, 16 +; GFX9-NEXT: s_lshr_b32 s56, s40, 8 +; GFX9-NEXT: s_lshr_b32 s47, s43, 24 +; GFX9-NEXT: s_lshr_b32 s84, s43, 16 +; GFX9-NEXT: s_lshr_b32 s95, s43, 8 +; GFX9-NEXT: s_lshr_b32 s92, s42, 8 +; GFX9-NEXT: s_lshr_b32 s94, s45, 24 +; GFX9-NEXT: s_lshr_b32 s57, s45, 16 +; GFX9-NEXT: s_lshr_b32 s30, s45, 8 +; GFX9-NEXT: s_lshr_b32 s31, s44, 16 +; GFX9-NEXT: s_lshr_b32 s96, s44, 8 +; GFX9-NEXT: s_lshr_b32 s34, s29, 24 +; GFX9-NEXT: s_lshr_b32 s35, s29, 8 +; GFX9-NEXT: s_lshr_b32 s36, s28, 16 +; GFX9-NEXT: s_lshr_b32 s74, s28, 8 +; GFX9-NEXT: s_lshr_b32 s75, s27, 24 +; GFX9-NEXT: s_lshr_b32 s91, s27, 16 +; GFX9-NEXT: v_writelane_b32 v25, s58, 48 +; GFX9-NEXT: s_lshr_b32 s86, s24, 8 +; GFX9-NEXT: s_lshr_b32 s87, s23, 24 +; GFX9-NEXT: s_lshr_b32 s98, s23, 16 +; GFX9-NEXT: s_lshr_b32 s58, s23, 8 +; GFX9-NEXT: s_lshr_b32 s59, s22, 16 +; GFX9-NEXT: s_lshr_b32 s97, s22, 8 +; GFX9-NEXT: s_lshr_b32 s60, s21, 24 +; GFX9-NEXT: s_lshr_b32 s61, s21, 16 +; GFX9-NEXT: s_lshr_b32 s38, s21, 8 +; GFX9-NEXT: s_lshr_b32 s99, s20, 16 +; GFX9-NEXT: s_lshr_b32 s39, s20, 8 ; GFX9-NEXT: s_lshr_b32 s48, s19, 24 -; GFX9-NEXT: s_lshr_b32 s38, s19, 16 -; GFX9-NEXT: s_lshr_b32 s68, s19, 8 -; GFX9-NEXT: s_lshr_b32 s54, s18, 16 -; GFX9-NEXT: s_lshr_b32 s71, s18, 8 -; GFX9-NEXT: s_lshr_b32 s52, s17, 24 -; GFX9-NEXT: s_lshr_b32 s50, s17, 16 -; GFX9-NEXT: s_lshr_b32 s69, s17, 8 -; GFX9-NEXT: s_lshr_b32 s51, s16, 16 -; GFX9-NEXT: s_lshr_b32 s85, s16, 8 -; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; GFX9-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; GFX9-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; GFX9-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; GFX9-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; GFX9-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; GFX9-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; GFX9-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; GFX9-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; GFX9-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; GFX9-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; GFX9-NEXT: s_lshr_b64 s[92:93], s[24:25], 24 -; GFX9-NEXT: s_lshr_b64 s[94:95], s[22:23], 24 -; GFX9-NEXT: s_lshr_b64 s[30:31], s[20:21], 24 -; GFX9-NEXT: s_lshr_b64 s[34:35], s[18:19], 24 -; GFX9-NEXT: s_lshr_b64 s[36:37], s[16:17], 24 +; GFX9-NEXT: s_lshr_b32 s62, s19, 16 +; GFX9-NEXT: s_lshr_b32 s63, s19, 8 +; GFX9-NEXT: s_lshr_b32 s49, s18, 16 +; GFX9-NEXT: s_lshr_b32 s72, s18, 8 +; GFX9-NEXT: s_lshr_b32 s73, s17, 24 +; GFX9-NEXT: s_lshr_b32 s54, s17, 16 +; GFX9-NEXT: s_lshr_b32 s52, s17, 8 +; GFX9-NEXT: s_lshr_b32 s50, s16, 16 +; GFX9-NEXT: s_lshr_b32 s53, s16, 8 ; GFX9-NEXT: .LBB57_3: ; %end -; GFX9-NEXT: v_mov_b32_e32 v7, s36 ; GFX9-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; GFX9-NEXT: v_mov_b32_e32 v2, s85 -; GFX9-NEXT: v_perm_b32 v7, s51, v7, v1 -; GFX9-NEXT: v_perm_b32 v3, s16, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v21, s52 -; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: v_mov_b32_e32 v4, s69 -; GFX9-NEXT: v_perm_b32 v21, s50, v21, v1 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v7 -; GFX9-NEXT: v_perm_b32 v2, s17, v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v11, s34 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v21 -; GFX9-NEXT: v_mov_b32_e32 v4, s71 -; GFX9-NEXT: v_perm_b32 v11, s54, v11, v1 +; GFX9-NEXT: v_mov_b32_e32 v3, s90 +; GFX9-NEXT: v_mov_b32_e32 v2, s53 +; GFX9-NEXT: v_perm_b32 v3, s50, v3, v1 +; GFX9-NEXT: v_perm_b32 v2, s16, v2, v1 +; GFX9-NEXT: v_mov_b32_e32 v4, s52 +; GFX9-NEXT: v_mov_b32_e32 v5, s73 +; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_perm_b32 v4, s17, v4, v1 +; GFX9-NEXT: v_perm_b32 v5, s54, v5, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 0 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_perm_b32 v5, s18, v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v22, s48 +; GFX9-NEXT: v_mov_b32_e32 v7, s16 +; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v5 +; GFX9-NEXT: v_mov_b32_e32 v6, s72 +; GFX9-NEXT: v_perm_b32 v7, s49, v7, v1 +; GFX9-NEXT: v_or_b32_e32 v2, v4, v2 +; GFX9-NEXT: v_perm_b32 v6, s18, v6, v1 +; GFX9-NEXT: v_readlane_b32 s17, v25, 1 +; GFX9-NEXT: v_mov_b32_e32 v9, s48 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v11 -; GFX9-NEXT: v_mov_b32_e32 v6, s68 -; GFX9-NEXT: v_perm_b32 v22, s38, v22, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v5, v2 -; GFX9-NEXT: v_perm_b32 v4, s19, v6, v1 -; GFX9-NEXT: v_mov_b32_e32 v14, s30 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v7 +; GFX9-NEXT: v_mov_b32_e32 v8, s63 +; GFX9-NEXT: v_perm_b32 v9, s62, v9, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 2 +; GFX9-NEXT: v_or_b32_e32 v2, v6, v2 +; GFX9-NEXT: v_perm_b32 v8, s19, v8, v1 +; GFX9-NEXT: v_mov_b32_e32 v11, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v22 -; GFX9-NEXT: v_mov_b32_e32 v6, s70 -; GFX9-NEXT: v_perm_b32 v14, s39, v14, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v4, v2 -; GFX9-NEXT: v_perm_b32 v8, s20, v6, v1 -; GFX9-NEXT: v_mov_b32_e32 v23, s49 -; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v14 -; GFX9-NEXT: v_mov_b32_e32 v9, s80 -; GFX9-NEXT: v_perm_b32 v23, s99, v23, v1 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v9 +; GFX9-NEXT: v_mov_b32_e32 v10, s39 +; GFX9-NEXT: v_perm_b32 v11, s99, v11, v1 ; GFX9-NEXT: v_or_b32_e32 v2, v8, v2 -; GFX9-NEXT: v_perm_b32 v6, s21, v9, v1 -; GFX9-NEXT: v_mov_b32_e32 v15, s94 +; GFX9-NEXT: v_perm_b32 v10, s20, v10, v1 +; GFX9-NEXT: v_readlane_b32 s17, v25, 3 +; GFX9-NEXT: v_mov_b32_e32 v13, s60 +; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v11 +; GFX9-NEXT: v_mov_b32_e32 v12, s38 +; GFX9-NEXT: v_perm_b32 v13, s61, v13, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 4 +; GFX9-NEXT: v_or_b32_e32 v2, v10, v2 +; GFX9-NEXT: v_perm_b32 v12, s21, v12, v1 +; GFX9-NEXT: v_mov_b32_e32 v15, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v23 -; GFX9-NEXT: v_mov_b32_e32 v9, s64 -; GFX9-NEXT: v_perm_b32 v15, s97, v15, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v6, v2 -; GFX9-NEXT: v_perm_b32 v10, s22, v9, v1 -; GFX9-NEXT: v_mov_b32_e32 v24, s98 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v13 +; GFX9-NEXT: v_mov_b32_e32 v14, s97 +; GFX9-NEXT: v_readlane_b32 s17, v25, 5 +; GFX9-NEXT: v_perm_b32 v15, s59, v15, v1 +; GFX9-NEXT: v_or_b32_e32 v2, v12, v2 +; GFX9-NEXT: v_perm_b32 v14, s22, v14, v1 +; GFX9-NEXT: v_mov_b32_e32 v17, s87 +; GFX9-NEXT: v_readlane_b32 s16, v25, 6 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v15 -; GFX9-NEXT: v_mov_b32_e32 v12, s66 -; GFX9-NEXT: v_perm_b32 v24, s87, v24, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v10, v2 -; GFX9-NEXT: v_perm_b32 v9, s23, v12, v1 -; GFX9-NEXT: v_mov_b32_e32 v16, s92 +; GFX9-NEXT: v_mov_b32_e32 v16, s58 +; GFX9-NEXT: v_perm_b32 v17, s98, v17, v1 +; GFX9-NEXT: v_mov_b32_e32 v19, s16 +; GFX9-NEXT: v_readlane_b32 s16, v25, 48 +; GFX9-NEXT: v_or_b32_e32 v2, v14, v2 +; GFX9-NEXT: v_perm_b32 v16, s23, v16, v1 +; GFX9-NEXT: v_perm_b32 v19, s16, v19, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 47 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v24 -; GFX9-NEXT: v_mov_b32_e32 v12, s55 -; GFX9-NEXT: v_perm_b32 v16, s86, v16, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v9, v2 -; GFX9-NEXT: v_perm_b32 v13, s24, v12, v1 -; GFX9-NEXT: v_mov_b32_e32 v25, s84 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v17 +; GFX9-NEXT: v_mov_b32_e32 v18, s86 +; GFX9-NEXT: v_mov_b32_e32 v20, s16 +; GFX9-NEXT: v_readlane_b32 s16, v25, 45 +; GFX9-NEXT: v_or_b32_e32 v2, v16, v2 +; GFX9-NEXT: v_perm_b32 v18, s24, v18, v1 +; GFX9-NEXT: v_mov_b32_e32 v21, s16 +; GFX9-NEXT: v_readlane_b32 s16, v25, 46 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v16 -; GFX9-NEXT: v_mov_b32_e32 v17, s65 -; GFX9-NEXT: v_perm_b32 v25, s96, v25, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v13, v2 -; GFX9-NEXT: v_perm_b32 v12, s25, v17, v1 -; GFX9-NEXT: v_mov_b32_e32 v17, s90 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v19 +; GFX9-NEXT: v_readlane_b32 s17, v25, 7 +; GFX9-NEXT: v_perm_b32 v21, s16, v21, v1 +; GFX9-NEXT: v_readlane_b32 s16, v25, 44 +; GFX9-NEXT: v_or_b32_e32 v2, v18, v2 +; GFX9-NEXT: v_perm_b32 v20, s25, v20, v1 +; GFX9-NEXT: v_mov_b32_e32 v22, s16 +; GFX9-NEXT: v_readlane_b32 s16, v25, 8 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v25 -; GFX9-NEXT: v_mov_b32_e32 v18, s67 -; GFX9-NEXT: v_perm_b32 v17, s82, v17, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v12, v2 -; GFX9-NEXT: v_perm_b32 v18, s26, v18, v1 -; GFX9-NEXT: v_mov_b32_e32 v26, s81 -; GFX9-NEXT: v_readlane_b32 s16, v30, 49 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v21 +; GFX9-NEXT: v_mov_b32_e32 v23, s16 +; GFX9-NEXT: v_or_b32_e32 v2, v20, v2 +; GFX9-NEXT: v_readlane_b32 s16, v25, 43 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v17 -; GFX9-NEXT: v_mov_b32_e32 v19, s53 -; GFX9-NEXT: v_perm_b32 v26, s16, v26, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v18, v2 -; GFX9-NEXT: v_perm_b32 v19, s27, v19, v1 -; GFX9-NEXT: v_mov_b32_e32 v20, s88 -; GFX9-NEXT: v_readlane_b32 s16, v30, 48 +; GFX9-NEXT: v_perm_b32 v2, s16, v23, v1 +; GFX9-NEXT: v_perm_b32 v22, s26, v22, v1 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v2, v22, v2 +; GFX9-NEXT: v_readlane_b32 s16, v25, 42 +; GFX9-NEXT: v_mov_b32_e32 v3, s75 +; GFX9-NEXT: v_readlane_b32 s17, v25, 9 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v26 -; GFX9-NEXT: v_mov_b32_e32 v27, s83 -; GFX9-NEXT: v_perm_b32 v20, s16, v20, v1 -; GFX9-NEXT: v_readlane_b32 s16, v30, 47 -; GFX9-NEXT: v_or_b32_e32 v2, v19, v2 -; GFX9-NEXT: v_mov_b32_e32 v28, s16 -; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_perm_b32 v2, s28, v27, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v20 -; GFX9-NEXT: v_readlane_b32 s16, v30, 45 +; GFX9-NEXT: v_mov_b32_e32 v2, s16 +; GFX9-NEXT: v_perm_b32 v3, s91, v3, v1 +; GFX9-NEXT: v_perm_b32 v2, s27, v2, v1 +; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s16, v25, 10 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX9-NEXT: v_mov_b32_e32 v3, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 46 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44 +; GFX9-NEXT: v_mov_b32_e32 v2, s74 +; GFX9-NEXT: v_perm_b32 v3, s36, v3, v1 +; GFX9-NEXT: v_perm_b32 v2, s28, v2, v1 +; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 +; GFX9-NEXT: v_mov_b32_e32 v3, s34 +; GFX9-NEXT: v_readlane_b32 s16, v25, 41 +; GFX9-NEXT: v_readlane_b32 s17, v25, 11 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v2, s29, v28, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s35 +; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_perm_b32 v2, s29, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s16, v25, 12 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 44 +; GFX9-NEXT: v_mov_b32_e32 v3, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_mov_b32_e32 v3, s78 -; GFX9-NEXT: v_readlane_b32 s16, v30, 43 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s96 +; GFX9-NEXT: v_perm_b32 v3, s31, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s44, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 42 +; GFX9-NEXT: v_mov_b32_e32 v3, s94 +; GFX9-NEXT: v_readlane_b32 s17, v25, 13 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 40 -; GFX9-NEXT: v_mov_b32_e32 v3, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 41 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s30 +; GFX9-NEXT: v_perm_b32 v3, s57, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s45, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s16, v25, 14 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 39 +; GFX9-NEXT: v_mov_b32_e32 v3, s16 +; GFX9-NEXT: v_readlane_b32 s16, v25, 40 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_mov_b32_e32 v3, s76 -; GFX9-NEXT: v_readlane_b32 s16, v30, 38 +; GFX9-NEXT: v_mov_b32_e32 v2, s92 ; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s42, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 37 +; GFX9-NEXT: v_mov_b32_e32 v3, s47 +; GFX9-NEXT: v_readlane_b32 s17, v25, 15 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 35 -; GFX9-NEXT: v_mov_b32_e32 v3, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 36 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s95 +; GFX9-NEXT: v_perm_b32 v3, s84, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s43, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s16, v25, 16 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 34 +; GFX9-NEXT: v_mov_b32_e32 v3, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_mov_b32_e32 v3, s74 -; GFX9-NEXT: v_readlane_b32 s16, v30, 33 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s56 +; GFX9-NEXT: v_perm_b32 v3, s93, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s40, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 32 +; GFX9-NEXT: v_mov_b32_e32 v3, s81 +; GFX9-NEXT: v_readlane_b32 s17, v25, 17 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 30 -; GFX9-NEXT: v_mov_b32_e32 v3, s16 -; GFX9-NEXT: v_readlane_b32 s16, v30, 31 -; GFX9-NEXT: v_perm_b32 v3, s16, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s85 +; GFX9-NEXT: v_perm_b32 v3, s46, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s41, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s16, v25, 18 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s16, v30, 29 +; GFX9-NEXT: v_mov_b32_e32 v3, s16 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: v_mov_b32_e32 v2, s16 +; GFX9-NEXT: v_mov_b32_e32 v2, s83 +; GFX9-NEXT: v_perm_b32 v3, s82, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s14, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s72 -; GFX9-NEXT: v_readlane_b32 s14, v30, 28 -; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s14, v30, 27 +; GFX9-NEXT: v_mov_b32_e32 v3, s68 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: v_mov_b32_e32 v2, s14 -; GFX9-NEXT: v_readlane_b32 s14, v30, 25 -; GFX9-NEXT: v_mov_b32_e32 v3, s14 -; GFX9-NEXT: v_readlane_b32 s14, v30, 26 -; GFX9-NEXT: v_perm_b32 v3, s14, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s80 +; GFX9-NEXT: v_perm_b32 v3, s71, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s15, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s14, v25, 20 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s14, v30, 24 +; GFX9-NEXT: v_mov_b32_e32 v3, s14 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: v_mov_b32_e32 v2, s14 +; GFX9-NEXT: v_mov_b32_e32 v2, s70 +; GFX9-NEXT: v_perm_b32 v3, s69, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s12, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s62 -; GFX9-NEXT: v_readlane_b32 s12, v30, 23 -; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s12, v30, 22 +; GFX9-NEXT: v_mov_b32_e32 v3, s64 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: v_mov_b32_e32 v2, s12 -; GFX9-NEXT: v_readlane_b32 s12, v30, 20 -; GFX9-NEXT: v_mov_b32_e32 v3, s12 -; GFX9-NEXT: v_readlane_b32 s12, v30, 21 -; GFX9-NEXT: v_perm_b32 v3, s12, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s89 +; GFX9-NEXT: v_perm_b32 v3, s88, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s13, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s12, v25, 22 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s12, v30, 19 +; GFX9-NEXT: v_mov_b32_e32 v3, s12 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: v_mov_b32_e32 v2, s12 +; GFX9-NEXT: v_mov_b32_e32 v2, s79 +; GFX9-NEXT: v_perm_b32 v3, s78, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s10, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s60 -; GFX9-NEXT: v_readlane_b32 s10, v30, 18 -; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s10, v30, 17 +; GFX9-NEXT: v_mov_b32_e32 v3, s65 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: v_mov_b32_e32 v2, s10 -; GFX9-NEXT: v_readlane_b32 s10, v30, 15 -; GFX9-NEXT: v_mov_b32_e32 v3, s10 -; GFX9-NEXT: v_readlane_b32 s10, v30, 16 -; GFX9-NEXT: v_perm_b32 v3, s10, v3, v1 +; GFX9-NEXT: v_mov_b32_e32 v2, s66 +; GFX9-NEXT: v_perm_b32 v3, s55, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s11, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s10, v25, 24 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s10, v30, 14 +; GFX9-NEXT: v_mov_b32_e32 v3, s10 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: v_mov_b32_e32 v2, s10 +; GFX9-NEXT: v_mov_b32_e32 v2, s67 +; GFX9-NEXT: v_perm_b32 v3, s77, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s8, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s58 -; GFX9-NEXT: v_readlane_b32 s8, v30, 13 -; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_readlane_b32 s8, v25, 39 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s8, v30, 12 -; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104 -; GFX9-NEXT: v_mov_b32_e32 v2, s8 -; GFX9-NEXT: v_readlane_b32 s8, v30, 10 ; GFX9-NEXT: v_mov_b32_e32 v3, s8 -; GFX9-NEXT: v_readlane_b32 s8, v30, 11 -; GFX9-NEXT: v_perm_b32 v3, s8, v3, v1 +; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104 +; GFX9-NEXT: v_mov_b32_e32 v2, s76 +; GFX9-NEXT: v_perm_b32 v3, s51, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s9, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s8, v30, 9 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: v_mov_b32_e32 v2, s8 +; GFX9-NEXT: v_mov_b32_e32 v2, s37 +; GFX9-NEXT: v_readlane_b32 s8, v25, 26 ; GFX9-NEXT: v_perm_b32 v2, s6, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s56 -; GFX9-NEXT: v_readlane_b32 s6, v30, 8 +; GFX9-NEXT: v_mov_b32_e32 v3, s8 +; GFX9-NEXT: v_readlane_b32 s6, v25, 38 ; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s6, v30, 7 +; GFX9-NEXT: v_readlane_b32 s6, v25, 37 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112 ; GFX9-NEXT: v_mov_b32_e32 v2, s6 -; GFX9-NEXT: v_readlane_b32 s6, v30, 5 +; GFX9-NEXT: v_readlane_b32 s6, v25, 35 ; GFX9-NEXT: v_mov_b32_e32 v3, s6 -; GFX9-NEXT: v_readlane_b32 s6, v30, 6 +; GFX9-NEXT: v_readlane_b32 s6, v25, 36 ; GFX9-NEXT: v_perm_b32 v3, s6, v3, v1 ; GFX9-NEXT: v_perm_b32 v2, s7, v2, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s6, v30, 4 +; GFX9-NEXT: v_readlane_b32 s6, v25, 34 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116 ; GFX9-NEXT: v_mov_b32_e32 v2, s6 +; GFX9-NEXT: v_readlane_b32 s6, v25, 28 ; GFX9-NEXT: v_perm_b32 v2, s4, v2, v1 -; GFX9-NEXT: v_mov_b32_e32 v3, s46 -; GFX9-NEXT: v_readlane_b32 s4, v30, 3 +; GFX9-NEXT: v_mov_b32_e32 v3, s6 +; GFX9-NEXT: v_readlane_b32 s4, v25, 33 ; GFX9-NEXT: v_perm_b32 v3, s4, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX9-NEXT: v_readlane_b32 s4, v30, 2 +; GFX9-NEXT: v_readlane_b32 s4, v25, 32 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120 ; GFX9-NEXT: v_mov_b32_e32 v2, s4 -; GFX9-NEXT: v_readlane_b32 s4, v30, 0 +; GFX9-NEXT: v_readlane_b32 s4, v25, 30 ; GFX9-NEXT: v_mov_b32_e32 v3, s4 -; GFX9-NEXT: v_readlane_b32 s4, v30, 1 +; GFX9-NEXT: v_readlane_b32 s4, v25, 31 ; GFX9-NEXT: v_perm_b32 v2, s5, v2, v1 ; GFX9-NEXT: v_perm_b32 v1, s4, v3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_or_b32_e32 v1, v2, v1 -; GFX9-NEXT: v_readlane_b32 s30, v29, 34 +; GFX9-NEXT: v_readlane_b32 s30, v24, 34 +; GFX9-NEXT: v_readlane_b32 s17, v25, 19 +; GFX9-NEXT: v_readlane_b32 s15, v25, 21 +; GFX9-NEXT: v_readlane_b32 s13, v25, 23 +; GFX9-NEXT: v_readlane_b32 s11, v25, 25 +; GFX9-NEXT: v_readlane_b32 s9, v25, 27 +; GFX9-NEXT: v_readlane_b32 s7, v25, 29 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 -; GFX9-NEXT: v_readlane_b32 s31, v29, 35 -; GFX9-NEXT: v_readlane_b32 s99, v29, 33 -; GFX9-NEXT: v_readlane_b32 s98, v29, 32 -; GFX9-NEXT: v_readlane_b32 s97, v29, 31 -; GFX9-NEXT: v_readlane_b32 s96, v29, 30 -; GFX9-NEXT: v_readlane_b32 s87, v29, 29 -; GFX9-NEXT: v_readlane_b32 s86, v29, 28 -; GFX9-NEXT: v_readlane_b32 s85, v29, 27 -; GFX9-NEXT: v_readlane_b32 s84, v29, 26 -; GFX9-NEXT: v_readlane_b32 s83, v29, 25 -; GFX9-NEXT: v_readlane_b32 s82, v29, 24 -; GFX9-NEXT: v_readlane_b32 s81, v29, 23 -; GFX9-NEXT: v_readlane_b32 s80, v29, 22 -; GFX9-NEXT: v_readlane_b32 s71, v29, 21 -; GFX9-NEXT: v_readlane_b32 s70, v29, 20 -; GFX9-NEXT: v_readlane_b32 s69, v29, 19 -; GFX9-NEXT: v_readlane_b32 s68, v29, 18 -; GFX9-NEXT: v_readlane_b32 s67, v29, 17 -; GFX9-NEXT: v_readlane_b32 s66, v29, 16 -; GFX9-NEXT: v_readlane_b32 s65, v29, 15 -; GFX9-NEXT: v_readlane_b32 s64, v29, 14 -; GFX9-NEXT: v_readlane_b32 s55, v29, 13 -; GFX9-NEXT: v_readlane_b32 s54, v29, 12 -; GFX9-NEXT: v_readlane_b32 s53, v29, 11 -; GFX9-NEXT: v_readlane_b32 s52, v29, 10 -; GFX9-NEXT: v_readlane_b32 s51, v29, 9 -; GFX9-NEXT: v_readlane_b32 s50, v29, 8 -; GFX9-NEXT: v_readlane_b32 s49, v29, 7 -; GFX9-NEXT: v_readlane_b32 s48, v29, 6 -; GFX9-NEXT: v_readlane_b32 s39, v29, 5 -; GFX9-NEXT: v_readlane_b32 s38, v29, 4 -; GFX9-NEXT: v_readlane_b32 s37, v29, 3 -; GFX9-NEXT: v_readlane_b32 s36, v29, 2 -; GFX9-NEXT: v_readlane_b32 s35, v29, 1 -; GFX9-NEXT: v_readlane_b32 s34, v29, 0 +; GFX9-NEXT: v_readlane_b32 s31, v24, 35 +; GFX9-NEXT: v_readlane_b32 s99, v24, 33 +; GFX9-NEXT: v_readlane_b32 s98, v24, 32 +; GFX9-NEXT: v_readlane_b32 s97, v24, 31 +; GFX9-NEXT: v_readlane_b32 s96, v24, 30 +; GFX9-NEXT: v_readlane_b32 s87, v24, 29 +; GFX9-NEXT: v_readlane_b32 s86, v24, 28 +; GFX9-NEXT: v_readlane_b32 s85, v24, 27 +; GFX9-NEXT: v_readlane_b32 s84, v24, 26 +; GFX9-NEXT: v_readlane_b32 s83, v24, 25 +; GFX9-NEXT: v_readlane_b32 s82, v24, 24 +; GFX9-NEXT: v_readlane_b32 s81, v24, 23 +; GFX9-NEXT: v_readlane_b32 s80, v24, 22 +; GFX9-NEXT: v_readlane_b32 s71, v24, 21 +; GFX9-NEXT: v_readlane_b32 s70, v24, 20 +; GFX9-NEXT: v_readlane_b32 s69, v24, 19 +; GFX9-NEXT: v_readlane_b32 s68, v24, 18 +; GFX9-NEXT: v_readlane_b32 s67, v24, 17 +; GFX9-NEXT: v_readlane_b32 s66, v24, 16 +; GFX9-NEXT: v_readlane_b32 s65, v24, 15 +; GFX9-NEXT: v_readlane_b32 s64, v24, 14 +; GFX9-NEXT: v_readlane_b32 s55, v24, 13 +; GFX9-NEXT: v_readlane_b32 s54, v24, 12 +; GFX9-NEXT: v_readlane_b32 s53, v24, 11 +; GFX9-NEXT: v_readlane_b32 s52, v24, 10 +; GFX9-NEXT: v_readlane_b32 s51, v24, 9 +; GFX9-NEXT: v_readlane_b32 s50, v24, 8 +; GFX9-NEXT: v_readlane_b32 s49, v24, 7 +; GFX9-NEXT: v_readlane_b32 s48, v24, 6 +; GFX9-NEXT: v_readlane_b32 s39, v24, 5 +; GFX9-NEXT: v_readlane_b32 s38, v24, 4 +; GFX9-NEXT: v_readlane_b32 s37, v24, 3 +; GFX9-NEXT: v_readlane_b32 s36, v24, 2 +; GFX9-NEXT: v_readlane_b32 s35, v24, 1 +; GFX9-NEXT: v_readlane_b32 s34, v24, 0 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: .LBB57_4: ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr85 -; GFX9-NEXT: ; implicit-def: $sgpr51 -; GFX9-NEXT: ; implicit-def: $sgpr69 +; GFX9-NEXT: ; implicit-def: $sgpr76 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: ; kill: killed $sgpr75 +; GFX9-NEXT: ; implicit-def: $vcc_lo +; GFX9-NEXT: ; implicit-def: $sgpr53 ; GFX9-NEXT: ; implicit-def: $sgpr50 +; GFX9-NEXT: ; implicit-def: $sgpr90 ; GFX9-NEXT: ; implicit-def: $sgpr52 -; GFX9-NEXT: ; implicit-def: $sgpr71 ; GFX9-NEXT: ; implicit-def: $sgpr54 -; GFX9-NEXT: ; implicit-def: $sgpr68 -; GFX9-NEXT: ; implicit-def: $sgpr38 +; GFX9-NEXT: ; implicit-def: $sgpr73 +; GFX9-NEXT: ; implicit-def: $sgpr72 +; GFX9-NEXT: ; implicit-def: $sgpr49 +; GFX9-NEXT: ; implicit-def: $sgpr63 +; GFX9-NEXT: ; implicit-def: $sgpr62 ; GFX9-NEXT: ; implicit-def: $sgpr48 -; GFX9-NEXT: ; implicit-def: $sgpr70 ; GFX9-NEXT: ; implicit-def: $sgpr39 -; GFX9-NEXT: ; implicit-def: $sgpr80 ; GFX9-NEXT: ; implicit-def: $sgpr99 -; GFX9-NEXT: ; implicit-def: $sgpr49 -; GFX9-NEXT: ; implicit-def: $sgpr64 +; GFX9-NEXT: ; implicit-def: $sgpr38 +; GFX9-NEXT: ; implicit-def: $sgpr61 +; GFX9-NEXT: ; implicit-def: $sgpr60 ; GFX9-NEXT: ; implicit-def: $sgpr97 -; GFX9-NEXT: ; implicit-def: $sgpr66 -; GFX9-NEXT: ; implicit-def: $sgpr87 +; GFX9-NEXT: ; implicit-def: $sgpr59 +; GFX9-NEXT: ; implicit-def: $sgpr58 ; GFX9-NEXT: ; implicit-def: $sgpr98 -; GFX9-NEXT: ; implicit-def: $sgpr55 +; GFX9-NEXT: ; implicit-def: $sgpr87 ; GFX9-NEXT: ; implicit-def: $sgpr86 -; GFX9-NEXT: ; implicit-def: $sgpr65 -; GFX9-NEXT: ; implicit-def: $sgpr96 -; GFX9-NEXT: ; implicit-def: $sgpr84 -; GFX9-NEXT: ; implicit-def: $sgpr67 -; GFX9-NEXT: ; implicit-def: $sgpr82 -; GFX9-NEXT: ; implicit-def: $sgpr53 -; GFX9-NEXT: ; implicit-def: $sgpr81 -; GFX9-NEXT: ; implicit-def: $sgpr83 +; GFX9-NEXT: ; implicit-def: $sgpr91 +; GFX9-NEXT: ; implicit-def: $sgpr74 ; GFX9-NEXT: ; implicit-def: $sgpr36 +; GFX9-NEXT: ; implicit-def: $sgpr35 ; GFX9-NEXT: ; implicit-def: $sgpr34 +; GFX9-NEXT: ; implicit-def: $sgpr96 +; GFX9-NEXT: ; implicit-def: $sgpr31 ; GFX9-NEXT: ; implicit-def: $sgpr30 +; GFX9-NEXT: ; implicit-def: $sgpr57 ; GFX9-NEXT: ; implicit-def: $sgpr94 ; GFX9-NEXT: ; implicit-def: $sgpr92 -; GFX9-NEXT: ; implicit-def: $sgpr90 +; GFX9-NEXT: ; implicit-def: $sgpr95 +; GFX9-NEXT: ; implicit-def: $sgpr84 +; GFX9-NEXT: ; implicit-def: $sgpr56 +; GFX9-NEXT: ; implicit-def: $sgpr93 +; GFX9-NEXT: ; implicit-def: $sgpr85 +; GFX9-NEXT: ; implicit-def: $sgpr81 +; GFX9-NEXT: ; implicit-def: $sgpr83 +; GFX9-NEXT: ; implicit-def: $sgpr82 +; GFX9-NEXT: ; implicit-def: $sgpr80 +; GFX9-NEXT: ; implicit-def: $sgpr71 +; GFX9-NEXT: ; implicit-def: $sgpr68 +; GFX9-NEXT: ; implicit-def: $sgpr70 +; GFX9-NEXT: ; implicit-def: $sgpr69 +; GFX9-NEXT: ; implicit-def: $sgpr89 ; GFX9-NEXT: ; implicit-def: $sgpr88 +; GFX9-NEXT: ; implicit-def: $sgpr64 +; GFX9-NEXT: ; implicit-def: $sgpr79 ; GFX9-NEXT: ; implicit-def: $sgpr78 -; GFX9-NEXT: ; implicit-def: $sgpr76 -; GFX9-NEXT: ; implicit-def: $sgpr74 -; GFX9-NEXT: ; implicit-def: $sgpr72 -; GFX9-NEXT: ; implicit-def: $sgpr62 -; GFX9-NEXT: ; implicit-def: $sgpr60 -; GFX9-NEXT: ; implicit-def: $sgpr58 -; GFX9-NEXT: ; implicit-def: $sgpr56 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr66 +; GFX9-NEXT: ; implicit-def: $sgpr55 +; GFX9-NEXT: ; implicit-def: $sgpr65 +; GFX9-NEXT: ; implicit-def: $sgpr67 +; GFX9-NEXT: ; implicit-def: $sgpr51 +; GFX9-NEXT: ; implicit-def: $sgpr37 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: v_writelane_b32 v25, s46, 0 +; GFX9-NEXT: v_writelane_b32 v25, s47, 1 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr75 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: ; kill: killed $sgpr75 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: v_writelane_b32 v25, s46, 2 +; GFX9-NEXT: v_writelane_b32 v25, s47, 3 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr75 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: ; kill: killed $sgpr75 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: v_writelane_b32 v25, s46, 4 +; GFX9-NEXT: v_writelane_b32 v25, s47, 5 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr75 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: ; kill: killed $sgpr75 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: v_writelane_b32 v25, s46, 6 +; GFX9-NEXT: v_writelane_b32 v25, s47, 7 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -80579,22 +80650,52 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr75 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: ; kill: killed $sgpr75 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: v_writelane_b32 v25, s46, 8 +; GFX9-NEXT: v_writelane_b32 v25, s47, 9 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; kill: killed $sgpr75 +; GFX9-NEXT: ; implicit-def: $sgpr75 +; GFX9-NEXT: v_writelane_b32 v25, s46, 10 +; GFX9-NEXT: v_writelane_b32 v25, s47, 11 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 12 +; GFX9-NEXT: v_writelane_b32 v25, s47, 13 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 14 +; GFX9-NEXT: v_writelane_b32 v25, s47, 15 +; GFX9-NEXT: ; implicit-def: $sgpr47 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s46, 16 +; GFX9-NEXT: v_writelane_b32 v25, s47, 17 +; GFX9-NEXT: v_writelane_b32 v25, s76, 18 +; GFX9-NEXT: v_writelane_b32 v25, s77, 19 +; GFX9-NEXT: ; implicit-def: $sgpr76 ; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: v_writelane_b32 v25, s76, 20 +; GFX9-NEXT: v_writelane_b32 v25, s77, 21 +; GFX9-NEXT: ; implicit-def: $sgpr76 +; GFX9-NEXT: v_writelane_b32 v25, s76, 22 +; GFX9-NEXT: v_writelane_b32 v25, s77, 23 +; GFX9-NEXT: ; implicit-def: $sgpr77 +; GFX9-NEXT: ; implicit-def: $sgpr76 +; GFX9-NEXT: v_writelane_b32 v25, s76, 24 +; GFX9-NEXT: v_writelane_b32 v25, s77, 25 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 26 +; GFX9-NEXT: v_writelane_b32 v25, vcc_hi, 27 +; GFX9-NEXT: ; implicit-def: $vcc_lo +; GFX9-NEXT: ; implicit-def: $sgpr76 +; GFX9-NEXT: v_writelane_b32 v25, vcc_lo, 28 +; GFX9-NEXT: v_writelane_b32 v25, vcc_hi, 29 ; GFX9-NEXT: s_branch .LBB57_2 ; ; GFX11-LABEL: bitcast_v16i64_to_v128i8_scalar: @@ -80602,52 +80703,52 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_xor_saveexec_b32 s4, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill -; GFX11-NEXT: scratch_store_b32 off, v23, s32 -; GFX11-NEXT: scratch_store_b32 off, v24, s32 offset:4 -; GFX11-NEXT: scratch_store_b32 off, v25, s32 offset:8 -; GFX11-NEXT: scratch_store_b32 off, v26, s32 offset:12 +; GFX11-NEXT: scratch_store_b32 off, v19, s32 +; GFX11-NEXT: scratch_store_b32 off, v20, s32 offset:4 +; GFX11-NEXT: scratch_store_b32 off, v21, s32 offset:8 +; GFX11-NEXT: scratch_store_b32 off, v22, s32 offset:12 ; GFX11-NEXT: s_mov_b32 exec_lo, s4 -; GFX11-NEXT: v_writelane_b32 v23, s34, 0 -; GFX11-NEXT: v_writelane_b32 v23, s35, 1 -; GFX11-NEXT: v_writelane_b32 v23, s36, 2 -; GFX11-NEXT: v_writelane_b32 v23, s37, 3 -; GFX11-NEXT: v_writelane_b32 v23, s38, 4 -; GFX11-NEXT: v_writelane_b32 v23, s39, 5 -; GFX11-NEXT: v_writelane_b32 v23, s48, 6 -; GFX11-NEXT: v_writelane_b32 v23, s49, 7 -; GFX11-NEXT: v_writelane_b32 v23, s50, 8 -; GFX11-NEXT: v_writelane_b32 v23, s51, 9 -; GFX11-NEXT: v_writelane_b32 v23, s52, 10 -; GFX11-NEXT: v_writelane_b32 v23, s53, 11 -; GFX11-NEXT: v_writelane_b32 v23, s54, 12 -; GFX11-NEXT: v_writelane_b32 v23, s55, 13 -; GFX11-NEXT: v_writelane_b32 v23, s64, 14 -; GFX11-NEXT: v_writelane_b32 v23, s65, 15 -; GFX11-NEXT: v_writelane_b32 v23, s66, 16 -; GFX11-NEXT: v_writelane_b32 v23, s67, 17 -; GFX11-NEXT: v_writelane_b32 v23, s68, 18 -; GFX11-NEXT: v_writelane_b32 v23, s69, 19 -; GFX11-NEXT: v_writelane_b32 v23, s70, 20 -; GFX11-NEXT: v_writelane_b32 v23, s71, 21 -; GFX11-NEXT: v_writelane_b32 v23, s80, 22 -; GFX11-NEXT: v_writelane_b32 v23, s81, 23 -; GFX11-NEXT: v_writelane_b32 v23, s82, 24 -; GFX11-NEXT: v_writelane_b32 v23, s83, 25 -; GFX11-NEXT: v_writelane_b32 v23, s84, 26 -; GFX11-NEXT: v_writelane_b32 v23, s85, 27 -; GFX11-NEXT: v_writelane_b32 v23, s86, 28 -; GFX11-NEXT: v_writelane_b32 v23, s87, 29 -; GFX11-NEXT: v_writelane_b32 v23, s96, 30 -; GFX11-NEXT: v_writelane_b32 v23, s97, 31 -; GFX11-NEXT: v_writelane_b32 v24, s98, 0 -; GFX11-NEXT: v_writelane_b32 v24, s99, 1 -; GFX11-NEXT: v_writelane_b32 v24, s100, 2 -; GFX11-NEXT: v_writelane_b32 v24, s101, 3 -; GFX11-NEXT: v_writelane_b32 v24, s102, 4 -; GFX11-NEXT: v_writelane_b32 v24, s103, 5 -; GFX11-NEXT: v_writelane_b32 v24, s104, 6 -; GFX11-NEXT: v_writelane_b32 v24, s30, 7 -; GFX11-NEXT: v_writelane_b32 v24, s31, 8 +; GFX11-NEXT: v_writelane_b32 v19, s34, 0 +; GFX11-NEXT: v_writelane_b32 v19, s35, 1 +; GFX11-NEXT: v_writelane_b32 v19, s36, 2 +; GFX11-NEXT: v_writelane_b32 v19, s37, 3 +; GFX11-NEXT: v_writelane_b32 v19, s38, 4 +; GFX11-NEXT: v_writelane_b32 v19, s39, 5 +; GFX11-NEXT: v_writelane_b32 v19, s48, 6 +; GFX11-NEXT: v_writelane_b32 v19, s49, 7 +; GFX11-NEXT: v_writelane_b32 v19, s50, 8 +; GFX11-NEXT: v_writelane_b32 v19, s51, 9 +; GFX11-NEXT: v_writelane_b32 v19, s52, 10 +; GFX11-NEXT: v_writelane_b32 v19, s53, 11 +; GFX11-NEXT: v_writelane_b32 v19, s54, 12 +; GFX11-NEXT: v_writelane_b32 v19, s55, 13 +; GFX11-NEXT: v_writelane_b32 v19, s64, 14 +; GFX11-NEXT: v_writelane_b32 v19, s65, 15 +; GFX11-NEXT: v_writelane_b32 v19, s66, 16 +; GFX11-NEXT: v_writelane_b32 v19, s67, 17 +; GFX11-NEXT: v_writelane_b32 v19, s68, 18 +; GFX11-NEXT: v_writelane_b32 v19, s69, 19 +; GFX11-NEXT: v_writelane_b32 v19, s70, 20 +; GFX11-NEXT: v_writelane_b32 v19, s71, 21 +; GFX11-NEXT: v_writelane_b32 v19, s80, 22 +; GFX11-NEXT: v_writelane_b32 v19, s81, 23 +; GFX11-NEXT: v_writelane_b32 v19, s82, 24 +; GFX11-NEXT: v_writelane_b32 v19, s83, 25 +; GFX11-NEXT: v_writelane_b32 v19, s84, 26 +; GFX11-NEXT: v_writelane_b32 v19, s85, 27 +; GFX11-NEXT: v_writelane_b32 v19, s86, 28 +; GFX11-NEXT: v_writelane_b32 v19, s87, 29 +; GFX11-NEXT: v_writelane_b32 v19, s96, 30 +; GFX11-NEXT: v_writelane_b32 v19, s97, 31 +; GFX11-NEXT: v_writelane_b32 v20, s98, 0 +; GFX11-NEXT: v_writelane_b32 v20, s99, 1 +; GFX11-NEXT: v_writelane_b32 v20, s100, 2 +; GFX11-NEXT: v_writelane_b32 v20, s101, 3 +; GFX11-NEXT: v_writelane_b32 v20, s102, 4 +; GFX11-NEXT: v_writelane_b32 v20, s103, 5 +; GFX11-NEXT: v_writelane_b32 v20, s104, 6 +; GFX11-NEXT: v_writelane_b32 v20, s30, 7 +; GFX11-NEXT: v_writelane_b32 v20, s31, 8 ; GFX11-NEXT: v_readfirstlane_b32 s42, v15 ; GFX11-NEXT: v_readfirstlane_b32 s5, v14 ; GFX11-NEXT: v_readfirstlane_b32 s4, v13 @@ -80665,160 +80766,308 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; GFX11-NEXT: v_readfirstlane_b32 s40, v1 ; GFX11-NEXT: s_cmp_lg_u32 s42, 0 ; GFX11-NEXT: s_mov_b32 vcc_lo, 0 -; GFX11-NEXT: ; implicit-def: $vgpr26 : SGPR spill to VGPR lane -; GFX11-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane -; GFX11-NEXT: s_cbranch_scc0 .LBB57_4 +; GFX11-NEXT: ; implicit-def: $vgpr22 : SGPR spill to VGPR lane +; GFX11-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane +; GFX11-NEXT: s_cbranch_scc0 .LBB57_2 ; GFX11-NEXT: ; %bb.1: ; %cmp.false ; GFX11-NEXT: s_lshr_b32 s42, s5, 24 -; GFX11-NEXT: s_lshr_b32 vcc_hi, s27, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 0 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[4:5], 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 29 ; GFX11-NEXT: s_lshr_b32 s42, s5, 16 -; GFX11-NEXT: s_lshr_b32 s34, s27, 16 -; GFX11-NEXT: s_lshr_b32 s35, s27, 8 -; GFX11-NEXT: s_lshr_b32 s37, s26, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 1 +; GFX11-NEXT: s_lshr_b64 s[70:71], s[18:19], 24 +; GFX11-NEXT: s_lshr_b64 s[80:81], s[20:21], 24 +; GFX11-NEXT: s_lshr_b32 s94, s9, 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 30 ; GFX11-NEXT: s_lshr_b32 s42, s5, 8 -; GFX11-NEXT: s_lshr_b32 s36, s26, 8 -; GFX11-NEXT: s_lshr_b32 s39, s25, 24 -; GFX11-NEXT: s_lshr_b32 s48, s25, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 2 +; GFX11-NEXT: s_lshr_b32 s30, s9, 8 +; GFX11-NEXT: s_lshr_b32 s100, s8, 8 +; GFX11-NEXT: s_lshr_b32 s102, s10, 8 +; GFX11-NEXT: v_writelane_b32 v22, s42, 31 ; GFX11-NEXT: s_lshr_b32 s42, s4, 16 -; GFX11-NEXT: s_lshr_b32 s38, s25, 8 -; GFX11-NEXT: s_lshr_b32 s50, s24, 16 -; GFX11-NEXT: s_lshr_b32 s49, s24, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 3 +; GFX11-NEXT: s_lshr_b32 s58, s13, 8 +; GFX11-NEXT: v_writelane_b32 v21, s42, 0 ; GFX11-NEXT: s_lshr_b32 s42, s4, 8 -; GFX11-NEXT: s_lshr_b32 s52, s23, 24 -; GFX11-NEXT: s_lshr_b32 s53, s23, 16 -; GFX11-NEXT: s_lshr_b32 s51, s23, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 4 +; GFX11-NEXT: s_lshr_b32 s62, s20, 16 +; GFX11-NEXT: s_lshr_b32 s69, s19, 8 +; GFX11-NEXT: s_lshr_b32 s59, s18, 8 +; GFX11-NEXT: v_writelane_b32 v21, s42, 1 ; GFX11-NEXT: s_lshr_b32 s42, s7, 24 -; GFX11-NEXT: s_lshr_b32 s69, s22, 16 -; GFX11-NEXT: s_lshr_b32 s54, s22, 8 -; GFX11-NEXT: s_lshr_b32 s55, s21, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 5 +; GFX11-NEXT: s_lshr_b32 s31, s9, 16 +; GFX11-NEXT: s_lshr_b32 s101, s8, 16 +; GFX11-NEXT: s_lshr_b32 s57, s11, 24 +; GFX11-NEXT: v_writelane_b32 v21, s42, 2 ; GFX11-NEXT: s_lshr_b32 s42, s7, 16 -; GFX11-NEXT: s_lshr_b32 s64, s21, 16 -; GFX11-NEXT: s_lshr_b32 s65, s21, 8 -; GFX11-NEXT: s_lshr_b32 s82, s20, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 6 +; GFX11-NEXT: s_lshr_b32 s63, s11, 16 +; GFX11-NEXT: s_lshr_b32 s61, s11, 8 +; GFX11-NEXT: s_lshr_b32 s103, s10, 16 +; GFX11-NEXT: v_writelane_b32 v21, s42, 3 ; GFX11-NEXT: s_lshr_b32 s42, s7, 8 -; GFX11-NEXT: s_lshr_b32 s68, s20, 8 -; GFX11-NEXT: s_lshr_b32 s66, s19, 24 -; GFX11-NEXT: s_lshr_b32 s67, s19, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 7 +; GFX11-NEXT: s_lshr_b32 s99, s13, 16 +; GFX11-NEXT: s_lshr_b32 s60, s12, 8 +; GFX11-NEXT: s_lshr_b32 s56, s15, 24 +; GFX11-NEXT: v_writelane_b32 v21, s42, 4 ; GFX11-NEXT: s_lshr_b32 s42, s6, 16 -; GFX11-NEXT: s_lshr_b32 s85, s19, 8 -; GFX11-NEXT: s_lshr_b32 s86, s18, 16 -; GFX11-NEXT: s_lshr_b32 s87, s18, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 8 +; GFX11-NEXT: s_lshr_b32 s72, s15, 16 +; GFX11-NEXT: s_lshr_b32 s104, s15, 8 +; GFX11-NEXT: s_lshr_b32 vcc_hi, s14, 16 +; GFX11-NEXT: v_writelane_b32 v21, s42, 5 ; GFX11-NEXT: s_lshr_b32 s42, s6, 8 -; GFX11-NEXT: s_lshr_b32 s70, s17, 24 -; GFX11-NEXT: s_lshr_b32 s71, s17, 16 -; GFX11-NEXT: s_lshr_b32 s96, s17, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 9 -; GFX11-NEXT: s_lshr_b32 s42, s9, 24 -; GFX11-NEXT: s_lshr_b32 s97, s16, 16 -; GFX11-NEXT: s_lshr_b32 s98, s16, 8 -; GFX11-NEXT: s_lshr_b32 s80, s3, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 10 -; GFX11-NEXT: s_lshr_b32 s42, s9, 16 -; GFX11-NEXT: s_lshr_b32 s81, s3, 16 -; GFX11-NEXT: s_lshr_b32 s99, s3, 8 -; GFX11-NEXT: s_lshr_b32 s100, s2, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 11 -; GFX11-NEXT: s_lshr_b32 s42, s9, 8 -; GFX11-NEXT: s_lshr_b32 s101, s2, 8 -; GFX11-NEXT: s_lshr_b32 s83, s1, 24 -; GFX11-NEXT: s_lshr_b32 s84, s1, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 12 -; GFX11-NEXT: s_lshr_b32 s42, s8, 16 -; GFX11-NEXT: s_lshr_b32 s102, s1, 8 -; GFX11-NEXT: s_lshr_b32 s103, s0, 16 -; GFX11-NEXT: s_lshr_b32 s104, s0, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 13 -; GFX11-NEXT: s_lshr_b32 s42, s8, 8 -; GFX11-NEXT: s_lshr_b64 s[44:45], s[6:7], 24 -; GFX11-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 -; GFX11-NEXT: s_lshr_b64 s[56:57], s[10:11], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 14 -; GFX11-NEXT: s_lshr_b32 s42, s11, 24 -; GFX11-NEXT: s_lshr_b64 s[58:59], s[12:13], 24 -; GFX11-NEXT: s_lshr_b64 s[60:61], s[14:15], 24 -; GFX11-NEXT: s_lshr_b64 s[62:63], s[40:41], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 15 -; GFX11-NEXT: s_lshr_b32 s42, s11, 16 -; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 -; GFX11-NEXT: s_lshr_b64 s[76:77], s[26:27], 24 -; GFX11-NEXT: s_lshr_b64 s[72:73], s[24:25], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 16 -; GFX11-NEXT: s_lshr_b32 s42, s11, 8 -; GFX11-NEXT: s_lshr_b64 s[78:79], s[22:23], 24 -; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24 -; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 17 -; GFX11-NEXT: s_lshr_b32 s42, s10, 16 -; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24 -; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24 -; GFX11-NEXT: s_lshr_b64 s[30:31], s[0:1], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 18 -; GFX11-NEXT: s_lshr_b32 s42, s10, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 19 +; GFX11-NEXT: s_lshr_b32 s73, s14, 8 +; GFX11-NEXT: s_lshr_b32 s35, s41, 24 +; GFX11-NEXT: s_lshr_b32 s37, s41, 16 +; GFX11-NEXT: v_writelane_b32 v21, s42, 6 ; GFX11-NEXT: s_lshr_b32 s42, s13, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 20 -; GFX11-NEXT: s_lshr_b32 s42, s13, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 21 -; GFX11-NEXT: s_lshr_b32 s42, s13, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 22 +; GFX11-NEXT: s_lshr_b32 s36, s41, 8 +; GFX11-NEXT: s_lshr_b32 s77, s40, 8 +; GFX11-NEXT: s_lshr_b32 s39, s29, 24 +; GFX11-NEXT: v_writelane_b32 v21, s42, 7 ; GFX11-NEXT: s_lshr_b32 s42, s12, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 23 -; GFX11-NEXT: s_lshr_b32 s42, s12, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 24 -; GFX11-NEXT: s_lshr_b32 s42, s15, 24 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 25 -; GFX11-NEXT: s_lshr_b32 s42, s15, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 26 -; GFX11-NEXT: s_lshr_b32 s42, s15, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 27 -; GFX11-NEXT: s_lshr_b32 s42, s14, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 28 -; GFX11-NEXT: s_lshr_b32 s42, s14, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 29 -; GFX11-NEXT: s_lshr_b32 s42, s41, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 30 -; GFX11-NEXT: s_lshr_b32 s42, s41, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 31 -; GFX11-NEXT: s_lshr_b32 s42, s41, 8 -; GFX11-NEXT: v_writelane_b32 v25, s42, 0 +; GFX11-NEXT: s_lshr_b32 s48, s29, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 28 ; GFX11-NEXT: s_lshr_b32 s42, s40, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 1 -; GFX11-NEXT: s_lshr_b32 s42, s40, 8 -; GFX11-NEXT: v_writelane_b32 v25, s42, 2 -; GFX11-NEXT: s_lshr_b32 s42, s29, 24 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 3 -; GFX11-NEXT: s_lshr_b32 s42, s29, 16 -; GFX11-NEXT: v_writelane_b32 v25, s42, 4 -; GFX11-NEXT: s_lshr_b32 s42, s29, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 5 -; GFX11-NEXT: s_lshr_b32 s42, s28, 16 -; GFX11-NEXT: v_writelane_b32 v25, s42, 6 -; GFX11-NEXT: s_lshr_b32 s42, s28, 8 +; GFX11-NEXT: s_lshr_b32 s76, s29, 8 +; GFX11-NEXT: v_writelane_b32 v21, s42, 8 +; GFX11-NEXT: s_lshr_b32 s42, s25, 16 +; GFX11-NEXT: v_writelane_b32 v22, s74, 26 +; GFX11-NEXT: s_lshr_b32 s49, s28, 16 +; GFX11-NEXT: s_lshr_b32 s38, s28, 8 +; GFX11-NEXT: s_lshr_b32 s50, s27, 24 +; GFX11-NEXT: s_lshr_b32 s78, s27, 16 +; GFX11-NEXT: v_writelane_b32 v22, s75, 27 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[6:7], 24 +; GFX11-NEXT: s_lshr_b32 s79, s27, 8 +; GFX11-NEXT: s_lshr_b32 s52, s26, 16 +; GFX11-NEXT: s_lshr_b32 s51, s26, 8 +; GFX11-NEXT: v_writelane_b32 v22, s74, 24 +; GFX11-NEXT: s_lshr_b32 s89, s25, 24 +; GFX11-NEXT: v_writelane_b32 v21, s42, 9 +; GFX11-NEXT: s_lshr_b32 s53, s25, 8 +; GFX11-NEXT: s_lshr_b32 s54, s24, 16 +; GFX11-NEXT: v_writelane_b32 v22, s75, 25 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[8:9], 24 +; GFX11-NEXT: s_lshr_b32 s88, s24, 8 +; GFX11-NEXT: s_lshr_b32 s55, s23, 24 +; GFX11-NEXT: s_lshr_b32 s64, s23, 16 +; GFX11-NEXT: v_writelane_b32 v22, s74, 22 +; GFX11-NEXT: s_lshr_b32 s65, s23, 8 +; GFX11-NEXT: s_lshr_b32 s67, s22, 16 +; GFX11-NEXT: s_lshr_b32 s66, s22, 8 +; GFX11-NEXT: s_lshr_b32 s91, s21, 24 +; GFX11-NEXT: v_writelane_b32 v22, s75, 23 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[10:11], 24 +; GFX11-NEXT: s_lshr_b32 s68, s21, 16 +; GFX11-NEXT: s_lshr_b32 s90, s21, 8 +; GFX11-NEXT: s_lshr_b32 s92, s20, 8 +; GFX11-NEXT: v_writelane_b32 v22, s74, 20 +; GFX11-NEXT: s_lshr_b32 s98, s19, 24 +; GFX11-NEXT: s_lshr_b32 s93, s19, 16 +; GFX11-NEXT: s_lshr_b32 s95, s18, 16 +; GFX11-NEXT: s_lshr_b32 s34, s17, 24 +; GFX11-NEXT: v_writelane_b32 v22, s75, 21 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[12:13], 24 +; GFX11-NEXT: s_lshr_b32 s82, s17, 16 +; GFX11-NEXT: s_lshr_b32 s83, s17, 8 +; GFX11-NEXT: s_lshr_b32 s84, s16, 16 +; GFX11-NEXT: v_writelane_b32 v22, s74, 18 +; GFX11-NEXT: s_lshr_b32 s85, s16, 8 +; GFX11-NEXT: s_lshr_b32 s42, s3, 24 +; GFX11-NEXT: s_lshr_b32 s43, s3, 16 +; GFX11-NEXT: s_lshr_b32 s86, s3, 8 +; GFX11-NEXT: v_writelane_b32 v22, s75, 19 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24 +; GFX11-NEXT: s_lshr_b32 s44, s2, 16 +; GFX11-NEXT: s_lshr_b32 s45, s2, 8 +; GFX11-NEXT: s_lshr_b32 s87, s1, 24 +; GFX11-NEXT: v_writelane_b32 v22, s74, 16 +; GFX11-NEXT: s_lshr_b32 s96, s1, 16 +; GFX11-NEXT: s_lshr_b32 s46, s1, 8 +; GFX11-NEXT: s_lshr_b32 s47, s0, 16 +; GFX11-NEXT: s_lshr_b32 s97, s0, 8 +; GFX11-NEXT: v_writelane_b32 v22, s75, 17 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-NEXT: v_writelane_b32 v22, s74, 14 +; GFX11-NEXT: v_writelane_b32 v22, s75, 15 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX11-NEXT: v_writelane_b32 v22, s74, 12 +; GFX11-NEXT: v_writelane_b32 v22, s75, 13 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[26:27], 24 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-NEXT: v_writelane_b32 v22, s74, 10 +; GFX11-NEXT: v_writelane_b32 v22, s75, 11 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[24:25], 24 +; GFX11-NEXT: v_writelane_b32 v22, s74, 8 +; GFX11-NEXT: v_writelane_b32 v22, s75, 9 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[22:23], 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 7 -; GFX11-NEXT: s_lshr_b64 s[42:43], s[4:5], 24 +; GFX11-NEXT: v_writelane_b32 v22, s74, 6 +; GFX11-NEXT: v_writelane_b32 v22, s75, 7 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[16:17], 24 +; GFX11-NEXT: v_writelane_b32 v22, s70, 4 +; GFX11-NEXT: v_writelane_b32 v22, s71, 5 +; GFX11-NEXT: s_mov_b32 s71, s62 +; GFX11-NEXT: s_mov_b32 s70, s94 +; GFX11-NEXT: s_mov_b32 s94, s30 +; GFX11-NEXT: s_mov_b32 s30, s100 +; GFX11-NEXT: v_writelane_b32 v22, s74, 2 +; GFX11-NEXT: s_mov_b32 s100, s102 +; GFX11-NEXT: s_mov_b32 s102, s58 +; GFX11-NEXT: v_writelane_b32 v22, s75, 3 +; GFX11-NEXT: s_mov_b32 s74, s80 +; GFX11-NEXT: s_lshr_b64 s[80:81], s[2:3], 24 +; GFX11-NEXT: s_mov_b32 s75, s69 +; GFX11-NEXT: s_mov_b32 s69, s59 +; GFX11-NEXT: v_writelane_b32 v22, s80, 0 +; GFX11-NEXT: s_lshr_b64 s[58:59], s[0:1], 24 +; GFX11-NEXT: v_writelane_b32 v22, s81, 1 +; GFX11-NEXT: s_branch .LBB57_3 +; GFX11-NEXT: .LBB57_2: +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: ; implicit-def: $sgpr62 +; GFX11-NEXT: ; implicit-def: $sgpr59 +; GFX11-NEXT: ; kill: killed $sgpr59 +; GFX11-NEXT: s_mov_b32 vcc_lo, -1 +; GFX11-NEXT: v_writelane_b32 v22, s42, 0 +; GFX11-NEXT: ; implicit-def: $sgpr59 +; GFX11-NEXT: ; kill: killed $sgpr59 +; GFX11-NEXT: ; implicit-def: $sgpr59 +; GFX11-NEXT: ; kill: killed $sgpr59 +; GFX11-NEXT: ; implicit-def: $sgpr59 +; GFX11-NEXT: ; kill: killed $sgpr59 +; GFX11-NEXT: ; implicit-def: $sgpr59 +; GFX11-NEXT: ; kill: killed $sgpr59 +; GFX11-NEXT: ; implicit-def: $sgpr59 +; GFX11-NEXT: v_writelane_b32 v22, s43, 1 +; GFX11-NEXT: ; kill: killed $sgpr59 +; GFX11-NEXT: ; implicit-def: $sgpr59 +; GFX11-NEXT: ; kill: killed $sgpr59 +; GFX11-NEXT: ; implicit-def: $sgpr59 +; GFX11-NEXT: ; kill: killed $sgpr59 +; GFX11-NEXT: ; implicit-def: $sgpr59 +; GFX11-NEXT: ; implicit-def: $sgpr97 +; GFX11-NEXT: ; implicit-def: $sgpr47 +; GFX11-NEXT: ; implicit-def: $sgpr58 +; GFX11-NEXT: ; implicit-def: $sgpr46 +; GFX11-NEXT: ; implicit-def: $sgpr96 +; GFX11-NEXT: ; implicit-def: $sgpr87 +; GFX11-NEXT: ; implicit-def: $sgpr45 +; GFX11-NEXT: ; implicit-def: $sgpr44 +; GFX11-NEXT: ; implicit-def: $sgpr86 +; GFX11-NEXT: ; implicit-def: $sgpr43 +; GFX11-NEXT: ; implicit-def: $sgpr42 +; GFX11-NEXT: ; implicit-def: $sgpr85 +; GFX11-NEXT: ; implicit-def: $sgpr84 +; GFX11-NEXT: ; implicit-def: $sgpr83 +; GFX11-NEXT: ; implicit-def: $sgpr82 +; GFX11-NEXT: ; implicit-def: $sgpr34 +; GFX11-NEXT: ; implicit-def: $sgpr69 +; GFX11-NEXT: ; implicit-def: $sgpr95 +; GFX11-NEXT: ; implicit-def: $sgpr75 +; GFX11-NEXT: ; implicit-def: $sgpr93 +; GFX11-NEXT: ; implicit-def: $sgpr98 +; GFX11-NEXT: ; implicit-def: $sgpr92 +; GFX11-NEXT: ; implicit-def: $sgpr71 +; GFX11-NEXT: ; implicit-def: $sgpr74 +; GFX11-NEXT: ; implicit-def: $sgpr90 +; GFX11-NEXT: ; implicit-def: $sgpr68 +; GFX11-NEXT: ; implicit-def: $sgpr91 +; GFX11-NEXT: ; implicit-def: $sgpr66 +; GFX11-NEXT: ; implicit-def: $sgpr67 +; GFX11-NEXT: ; implicit-def: $sgpr65 +; GFX11-NEXT: ; implicit-def: $sgpr64 +; GFX11-NEXT: ; implicit-def: $sgpr55 +; GFX11-NEXT: ; implicit-def: $sgpr88 +; GFX11-NEXT: ; implicit-def: $sgpr54 +; GFX11-NEXT: ; implicit-def: $sgpr53 +; GFX11-NEXT: ; implicit-def: $sgpr89 +; GFX11-NEXT: ; implicit-def: $sgpr51 +; GFX11-NEXT: ; implicit-def: $sgpr52 +; GFX11-NEXT: ; implicit-def: $sgpr79 +; GFX11-NEXT: ; implicit-def: $sgpr78 +; GFX11-NEXT: ; implicit-def: $sgpr50 +; GFX11-NEXT: ; implicit-def: $sgpr38 +; GFX11-NEXT: ; implicit-def: $sgpr49 +; GFX11-NEXT: ; implicit-def: $sgpr76 +; GFX11-NEXT: ; implicit-def: $sgpr48 +; GFX11-NEXT: ; implicit-def: $sgpr39 +; GFX11-NEXT: ; implicit-def: $sgpr77 +; GFX11-NEXT: ; implicit-def: $sgpr36 +; GFX11-NEXT: ; implicit-def: $sgpr37 +; GFX11-NEXT: ; implicit-def: $sgpr35 +; GFX11-NEXT: ; implicit-def: $sgpr73 +; GFX11-NEXT: ; implicit-def: $vcc_hi +; GFX11-NEXT: ; implicit-def: $sgpr104 +; GFX11-NEXT: ; implicit-def: $sgpr72 +; GFX11-NEXT: ; implicit-def: $sgpr60 +; GFX11-NEXT: ; implicit-def: $sgpr102 +; GFX11-NEXT: ; implicit-def: $sgpr99 +; GFX11-NEXT: ; implicit-def: $sgpr100 +; GFX11-NEXT: ; implicit-def: $sgpr103 +; GFX11-NEXT: ; implicit-def: $sgpr61 +; GFX11-NEXT: ; implicit-def: $sgpr30 +; GFX11-NEXT: ; implicit-def: $sgpr101 +; GFX11-NEXT: ; implicit-def: $sgpr94 +; GFX11-NEXT: ; implicit-def: $sgpr31 +; GFX11-NEXT: ; implicit-def: $sgpr70 +; GFX11-NEXT: ; kill: killed $sgpr59 +; GFX11-NEXT: ; implicit-def: $sgpr59 +; GFX11-NEXT: ; kill: killed $sgpr59 +; GFX11-NEXT: v_writelane_b32 v22, s56, 2 +; GFX11-NEXT: v_writelane_b32 v22, s57, 3 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: v_writelane_b32 v22, s56, 4 +; GFX11-NEXT: v_writelane_b32 v22, s57, 5 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: v_writelane_b32 v22, s56, 6 +; GFX11-NEXT: v_writelane_b32 v22, s57, 7 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: v_writelane_b32 v22, s56, 8 +; GFX11-NEXT: v_writelane_b32 v22, s57, 9 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: ; kill: killed $sgpr56 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: v_writelane_b32 v22, s56, 10 +; GFX11-NEXT: v_writelane_b32 v22, s57, 11 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: v_writelane_b32 v22, s56, 12 +; GFX11-NEXT: v_writelane_b32 v22, s57, 13 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: ; kill: killed $sgpr56 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: v_writelane_b32 v22, s56, 14 +; GFX11-NEXT: v_writelane_b32 v22, s57, 15 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: v_writelane_b32 v22, s56, 16 +; GFX11-NEXT: v_writelane_b32 v22, s57, 17 +; GFX11-NEXT: ; implicit-def: $sgpr57 +; GFX11-NEXT: ; implicit-def: $sgpr56 +; GFX11-NEXT: ; kill: killed $sgpr57 +; GFX11-NEXT: ; implicit-def: $sgpr57 +; GFX11-NEXT: v_writelane_b32 v22, s62, 18 +; GFX11-NEXT: v_writelane_b32 v22, s63, 19 +; GFX11-NEXT: ; implicit-def: $sgpr62 +; GFX11-NEXT: v_writelane_b32 v22, s62, 20 +; GFX11-NEXT: v_writelane_b32 v22, s63, 21 +; GFX11-NEXT: ; implicit-def: $sgpr63 +; GFX11-NEXT: ; implicit-def: $sgpr62 +; GFX11-NEXT: v_writelane_b32 v22, s62, 22 +; GFX11-NEXT: v_writelane_b32 v22, s63, 23 +; GFX11-NEXT: ; implicit-def: $sgpr62 +; GFX11-NEXT: v_writelane_b32 v22, s62, 24 +; GFX11-NEXT: v_writelane_b32 v22, s63, 25 +; GFX11-NEXT: ; implicit-def: $sgpr62 +; GFX11-NEXT: v_writelane_b32 v22, s62, 26 +; GFX11-NEXT: v_writelane_b32 v22, s63, 27 +; GFX11-NEXT: ; implicit-def: $sgpr62 +; GFX11-NEXT: ; kill: killed $sgpr62 +; GFX11-NEXT: .LBB57_3: ; %Flow +; GFX11-NEXT: s_mov_b32 s59, s99 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-NEXT: v_readlane_b32 s99, v22, 28 ; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_lo -; GFX11-NEXT: s_cbranch_vccnz .LBB57_3 -; GFX11-NEXT: .LBB57_2: ; %cmp.true +; GFX11-NEXT: s_cbranch_vccnz .LBB57_5 +; GFX11-NEXT: ; %bb.4: ; %cmp.true ; GFX11-NEXT: s_add_u32 s0, s0, 3 ; GFX11-NEXT: s_addc_u32 s1, s1, 0 ; GFX11-NEXT: s_add_u32 s2, s2, 3 @@ -80851,535 +81100,383 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3 ; GFX11-NEXT: s_addc_u32 s7, s7, 0 ; GFX11-NEXT: s_add_u32 s4, s4, 3 ; GFX11-NEXT: s_addc_u32 s5, s5, 0 -; GFX11-NEXT: s_lshr_b32 vcc_hi, s27, 24 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[6:7], 24 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[20:21], 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 24 +; GFX11-NEXT: s_lshr_b64 s[58:59], s[0:1], 24 +; GFX11-NEXT: s_lshr_b32 s70, s9, 24 +; GFX11-NEXT: s_lshr_b32 s31, s9, 16 +; GFX11-NEXT: s_lshr_b32 s94, s9, 8 +; GFX11-NEXT: v_writelane_b32 v22, s43, 25 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[4:5], 24 +; GFX11-NEXT: s_lshr_b32 s101, s8, 16 +; GFX11-NEXT: s_lshr_b32 s30, s8, 8 +; GFX11-NEXT: s_lshr_b32 s57, s11, 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 26 +; GFX11-NEXT: s_lshr_b32 s63, s11, 16 +; GFX11-NEXT: s_lshr_b32 s61, s11, 8 +; GFX11-NEXT: s_lshr_b32 s103, s10, 16 +; GFX11-NEXT: s_lshr_b32 s100, s10, 8 +; GFX11-NEXT: v_writelane_b32 v22, s43, 27 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[8:9], 24 +; GFX11-NEXT: s_lshr_b32 s59, s13, 16 +; GFX11-NEXT: s_lshr_b32 s102, s13, 8 +; GFX11-NEXT: s_lshr_b32 s99, s12, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 22 +; GFX11-NEXT: s_lshr_b32 s60, s12, 8 +; GFX11-NEXT: s_lshr_b32 s56, s15, 24 +; GFX11-NEXT: s_lshr_b32 s72, s15, 16 +; GFX11-NEXT: s_lshr_b32 s104, s15, 8 +; GFX11-NEXT: v_writelane_b32 v22, s43, 23 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[10:11], 24 +; GFX11-NEXT: s_lshr_b32 vcc_hi, s14, 16 +; GFX11-NEXT: s_lshr_b32 s73, s14, 8 +; GFX11-NEXT: s_lshr_b32 s35, s41, 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 20 +; GFX11-NEXT: s_lshr_b32 s37, s41, 16 +; GFX11-NEXT: s_lshr_b32 s36, s41, 8 +; GFX11-NEXT: s_lshr_b32 s77, s40, 8 +; GFX11-NEXT: s_lshr_b32 s39, s29, 24 +; GFX11-NEXT: v_writelane_b32 v22, s43, 21 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[12:13], 24 +; GFX11-NEXT: s_lshr_b32 s48, s29, 16 +; GFX11-NEXT: s_lshr_b32 s76, s29, 8 +; GFX11-NEXT: s_lshr_b32 s49, s28, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 18 +; GFX11-NEXT: s_lshr_b32 s38, s28, 8 +; GFX11-NEXT: s_lshr_b32 s50, s27, 24 +; GFX11-NEXT: s_lshr_b32 s78, s27, 16 +; GFX11-NEXT: s_lshr_b32 s79, s27, 8 +; GFX11-NEXT: v_writelane_b32 v22, s43, 19 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[14:15], 24 +; GFX11-NEXT: s_lshr_b32 s52, s26, 16 +; GFX11-NEXT: s_lshr_b32 s51, s26, 8 +; GFX11-NEXT: s_lshr_b32 s89, s25, 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 16 +; GFX11-NEXT: s_lshr_b32 s53, s25, 8 +; GFX11-NEXT: s_lshr_b32 s54, s24, 16 +; GFX11-NEXT: s_lshr_b32 s88, s24, 8 +; GFX11-NEXT: s_lshr_b32 s55, s23, 24 +; GFX11-NEXT: v_writelane_b32 v22, s43, 17 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[40:41], 24 +; GFX11-NEXT: s_lshr_b32 s64, s23, 16 +; GFX11-NEXT: s_lshr_b32 s65, s23, 8 +; GFX11-NEXT: s_lshr_b32 s67, s22, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 14 +; GFX11-NEXT: s_lshr_b32 s66, s22, 8 +; GFX11-NEXT: s_lshr_b32 s91, s21, 24 +; GFX11-NEXT: s_lshr_b32 s68, s21, 16 +; GFX11-NEXT: s_lshr_b32 s90, s21, 8 +; GFX11-NEXT: v_writelane_b32 v22, s43, 15 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[28:29], 24 +; GFX11-NEXT: s_lshr_b32 s71, s20, 16 +; GFX11-NEXT: s_lshr_b32 s92, s20, 8 +; GFX11-NEXT: s_lshr_b32 s98, s19, 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 12 +; GFX11-NEXT: s_lshr_b32 s93, s19, 16 +; GFX11-NEXT: s_lshr_b32 s75, s19, 8 +; GFX11-NEXT: s_lshr_b32 s95, s18, 16 +; GFX11-NEXT: s_lshr_b32 s69, s18, 8 +; GFX11-NEXT: v_writelane_b32 v22, s43, 13 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[26:27], 24 +; GFX11-NEXT: s_lshr_b32 s34, s17, 24 +; GFX11-NEXT: s_lshr_b32 s82, s17, 16 +; GFX11-NEXT: s_lshr_b32 s83, s17, 8 +; GFX11-NEXT: v_writelane_b32 v22, s42, 10 +; GFX11-NEXT: s_lshr_b32 s84, s16, 16 +; GFX11-NEXT: s_lshr_b32 s85, s16, 8 +; GFX11-NEXT: s_lshr_b32 s86, s3, 8 +; GFX11-NEXT: s_lshr_b32 s44, s2, 16 +; GFX11-NEXT: v_writelane_b32 v22, s43, 11 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[24:25], 24 +; GFX11-NEXT: s_lshr_b32 s45, s2, 8 +; GFX11-NEXT: s_lshr_b32 s87, s1, 24 +; GFX11-NEXT: s_lshr_b32 s96, s1, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 8 +; GFX11-NEXT: s_lshr_b32 s46, s1, 8 +; GFX11-NEXT: s_lshr_b32 s47, s0, 16 +; GFX11-NEXT: s_lshr_b32 s97, s0, 8 +; GFX11-NEXT: v_writelane_b32 v22, s43, 9 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[22:23], 24 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-NEXT: v_writelane_b32 v22, s42, 6 +; GFX11-NEXT: v_writelane_b32 v22, s43, 7 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[18:19], 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 4 +; GFX11-NEXT: v_writelane_b32 v22, s43, 5 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[16:17], 24 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX11-NEXT: v_writelane_b32 v22, s42, 2 +; GFX11-NEXT: v_writelane_b32 v22, s43, 3 +; GFX11-NEXT: s_lshr_b64 s[42:43], s[2:3], 24 +; GFX11-NEXT: v_writelane_b32 v22, s42, 0 +; GFX11-NEXT: v_writelane_b32 v22, s43, 1 ; GFX11-NEXT: s_lshr_b32 s42, s5, 24 -; GFX11-NEXT: s_lshr_b32 s34, s27, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 0 +; GFX11-NEXT: s_lshr_b32 s43, s3, 16 +; GFX11-NEXT: v_writelane_b32 v22, s42, 29 ; GFX11-NEXT: s_lshr_b32 s42, s5, 16 -; GFX11-NEXT: s_lshr_b32 s35, s27, 8 -; GFX11-NEXT: s_lshr_b32 s37, s26, 16 -; GFX11-NEXT: s_lshr_b32 s36, s26, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 1 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-NEXT: v_writelane_b32 v22, s42, 30 ; GFX11-NEXT: s_lshr_b32 s42, s5, 8 -; GFX11-NEXT: s_lshr_b32 s39, s25, 24 -; GFX11-NEXT: s_lshr_b32 s48, s25, 16 -; GFX11-NEXT: s_lshr_b32 s38, s25, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 2 +; GFX11-NEXT: v_writelane_b32 v22, s42, 31 ; GFX11-NEXT: s_lshr_b32 s42, s4, 16 -; GFX11-NEXT: s_lshr_b32 s50, s24, 16 -; GFX11-NEXT: s_lshr_b32 s49, s24, 8 -; GFX11-NEXT: s_lshr_b32 s52, s23, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 3 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-NEXT: v_writelane_b32 v21, s42, 0 ; GFX11-NEXT: s_lshr_b32 s42, s4, 8 -; GFX11-NEXT: s_lshr_b32 s53, s23, 16 -; GFX11-NEXT: s_lshr_b32 s51, s23, 8 -; GFX11-NEXT: s_lshr_b32 s69, s22, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 4 +; GFX11-NEXT: v_writelane_b32 v21, s42, 1 ; GFX11-NEXT: s_lshr_b32 s42, s7, 24 -; GFX11-NEXT: s_lshr_b32 s54, s22, 8 -; GFX11-NEXT: s_lshr_b32 s55, s21, 24 -; GFX11-NEXT: s_lshr_b32 s64, s21, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 5 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-NEXT: v_writelane_b32 v21, s42, 2 ; GFX11-NEXT: s_lshr_b32 s42, s7, 16 -; GFX11-NEXT: s_lshr_b32 s65, s21, 8 -; GFX11-NEXT: s_lshr_b32 s82, s20, 16 -; GFX11-NEXT: s_lshr_b32 s68, s20, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 6 +; GFX11-NEXT: v_writelane_b32 v21, s42, 3 ; GFX11-NEXT: s_lshr_b32 s42, s7, 8 -; GFX11-NEXT: s_lshr_b32 s66, s19, 24 -; GFX11-NEXT: s_lshr_b32 s67, s19, 16 -; GFX11-NEXT: s_lshr_b32 s85, s19, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 7 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX11-NEXT: v_writelane_b32 v21, s42, 4 ; GFX11-NEXT: s_lshr_b32 s42, s6, 16 -; GFX11-NEXT: s_lshr_b32 s86, s18, 16 -; GFX11-NEXT: s_lshr_b32 s87, s18, 8 -; GFX11-NEXT: s_lshr_b32 s70, s17, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 8 +; GFX11-NEXT: v_writelane_b32 v21, s42, 5 ; GFX11-NEXT: s_lshr_b32 s42, s6, 8 -; GFX11-NEXT: s_lshr_b32 s71, s17, 16 -; GFX11-NEXT: s_lshr_b32 s96, s17, 8 -; GFX11-NEXT: s_lshr_b32 s97, s16, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 9 -; GFX11-NEXT: s_lshr_b32 s42, s9, 24 -; GFX11-NEXT: s_lshr_b32 s98, s16, 8 -; GFX11-NEXT: s_lshr_b32 s80, s3, 24 -; GFX11-NEXT: s_lshr_b32 s81, s3, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 10 -; GFX11-NEXT: s_lshr_b32 s42, s9, 16 -; GFX11-NEXT: s_lshr_b32 s99, s3, 8 -; GFX11-NEXT: s_lshr_b32 s100, s2, 16 -; GFX11-NEXT: s_lshr_b32 s101, s2, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 11 -; GFX11-NEXT: s_lshr_b32 s42, s9, 8 -; GFX11-NEXT: s_lshr_b32 s83, s1, 24 -; GFX11-NEXT: s_lshr_b32 s84, s1, 16 -; GFX11-NEXT: s_lshr_b32 s102, s1, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 12 -; GFX11-NEXT: s_lshr_b32 s42, s8, 16 -; GFX11-NEXT: s_lshr_b32 s103, s0, 16 -; GFX11-NEXT: s_lshr_b32 s104, s0, 8 -; GFX11-NEXT: s_lshr_b64 s[44:45], s[6:7], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 13 -; GFX11-NEXT: s_lshr_b32 s42, s8, 8 -; GFX11-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 -; GFX11-NEXT: s_lshr_b64 s[56:57], s[10:11], 24 -; GFX11-NEXT: s_lshr_b64 s[58:59], s[12:13], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 14 -; GFX11-NEXT: s_lshr_b32 s42, s11, 24 -; GFX11-NEXT: s_lshr_b64 s[60:61], s[14:15], 24 -; GFX11-NEXT: s_lshr_b64 s[62:63], s[40:41], 24 -; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 15 -; GFX11-NEXT: s_lshr_b32 s42, s11, 16 -; GFX11-NEXT: s_lshr_b64 s[76:77], s[26:27], 24 -; GFX11-NEXT: s_lshr_b64 s[72:73], s[24:25], 24 -; GFX11-NEXT: s_lshr_b64 s[78:79], s[22:23], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 16 -; GFX11-NEXT: s_lshr_b32 s42, s11, 8 -; GFX11-NEXT: s_lshr_b64 s[88:89], s[20:21], 24 -; GFX11-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 -; GFX11-NEXT: s_lshr_b64 s[92:93], s[16:17], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 17 -; GFX11-NEXT: s_lshr_b32 s42, s10, 16 -; GFX11-NEXT: s_lshr_b64 s[94:95], s[2:3], 24 -; GFX11-NEXT: s_lshr_b64 s[30:31], s[0:1], 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 18 -; GFX11-NEXT: s_lshr_b32 s42, s10, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 19 +; GFX11-NEXT: v_writelane_b32 v21, s42, 6 ; GFX11-NEXT: s_lshr_b32 s42, s13, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 20 -; GFX11-NEXT: s_lshr_b32 s42, s13, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 21 -; GFX11-NEXT: s_lshr_b32 s42, s13, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 22 -; GFX11-NEXT: s_lshr_b32 s42, s12, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 23 -; GFX11-NEXT: s_lshr_b32 s42, s12, 8 -; GFX11-NEXT: v_writelane_b32 v26, s42, 24 -; GFX11-NEXT: s_lshr_b32 s42, s15, 24 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 25 -; GFX11-NEXT: s_lshr_b32 s42, s15, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 26 -; GFX11-NEXT: s_lshr_b32 s42, s15, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 27 -; GFX11-NEXT: s_lshr_b32 s42, s14, 16 -; GFX11-NEXT: v_writelane_b32 v26, s42, 28 -; GFX11-NEXT: s_lshr_b32 s42, s14, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 29 -; GFX11-NEXT: s_lshr_b32 s42, s41, 24 -; GFX11-NEXT: v_writelane_b32 v26, s42, 30 -; GFX11-NEXT: s_lshr_b32 s42, s41, 16 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v26, s42, 31 -; GFX11-NEXT: s_lshr_b32 s42, s41, 8 -; GFX11-NEXT: v_writelane_b32 v25, s42, 0 +; GFX11-NEXT: v_writelane_b32 v21, s42, 7 ; GFX11-NEXT: s_lshr_b32 s42, s40, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 1 -; GFX11-NEXT: s_lshr_b32 s42, s40, 8 -; GFX11-NEXT: v_writelane_b32 v25, s42, 2 -; GFX11-NEXT: s_lshr_b32 s42, s29, 24 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 3 -; GFX11-NEXT: s_lshr_b32 s42, s29, 16 -; GFX11-NEXT: v_writelane_b32 v25, s42, 4 -; GFX11-NEXT: s_lshr_b32 s42, s29, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 5 -; GFX11-NEXT: s_lshr_b32 s42, s28, 16 -; GFX11-NEXT: v_writelane_b32 v25, s42, 6 -; GFX11-NEXT: s_lshr_b32 s42, s28, 8 -; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v25, s42, 7 -; GFX11-NEXT: s_lshr_b64 s[42:43], s[4:5], 24 -; GFX11-NEXT: .LBB57_3: ; %end -; GFX11-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_perm_b32 v2, s103, s30, v1 -; GFX11-NEXT: v_readlane_b32 s30, v24, 7 -; GFX11-NEXT: v_readlane_b32 s31, v24, 8 -; GFX11-NEXT: v_readlane_b32 s103, v24, 5 +; GFX11-NEXT: v_writelane_b32 v21, s42, 8 +; GFX11-NEXT: s_lshr_b32 s42, s25, 16 +; GFX11-NEXT: v_writelane_b32 v21, s42, 9 +; GFX11-NEXT: s_lshr_b32 s42, s3, 24 +; GFX11-NEXT: .LBB57_5: ; %end +; GFX11-NEXT: v_mov_b32_e32 v12, 0xc0c0004 +; GFX11-NEXT: v_readlane_b32 s81, v19, 23 +; GFX11-NEXT: v_readlane_b32 s80, v19, 22 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-NEXT: v_perm_b32 v2, s47, s58, v12 +; GFX11-NEXT: v_perm_b32 v1, s0, s97, v12 +; GFX11-NEXT: v_perm_b32 v3, s1, s46, v12 +; GFX11-NEXT: v_perm_b32 v4, s96, s87, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 0 ; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-NEXT: v_perm_b32 v18, s84, s83, v1 -; GFX11-NEXT: v_perm_b32 v3, s0, s104, v1 -; GFX11-NEXT: v_perm_b32 v4, s1, s102, v1 -; GFX11-NEXT: v_perm_b32 v5, s100, s94, v1 -; GFX11-NEXT: v_perm_b32 v19, s81, s80, v1 -; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-NEXT: v_perm_b32 v6, s2, s101, v1 -; GFX11-NEXT: v_perm_b32 v7, s3, s99, v1 +; GFX11-NEXT: v_readlane_b32 s1, v22, 1 +; GFX11-NEXT: v_readlane_b32 s97, v19, 31 +; GFX11-NEXT: v_readlane_b32 s96, v19, 30 +; GFX11-NEXT: v_perm_b32 v6, s44, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 2 +; GFX11-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v4 +; GFX11-NEXT: v_readlane_b32 s1, v22, 3 +; GFX11-NEXT: v_readlane_b32 s87, v19, 29 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) ; GFX11-NEXT: v_or_b32_e32 v2, v3, v2 -; GFX11-NEXT: v_perm_b32 v8, s97, s92, v1 -; GFX11-NEXT: v_or_b32_e32 v3, v4, v18 -; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v5 -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v19 -; GFX11-NEXT: v_perm_b32 v11, s86, s90, v1 -; GFX11-NEXT: v_perm_b32 v20, s71, s70, v1 -; GFX11-NEXT: v_perm_b32 v21, s67, s66, v1 -; GFX11-NEXT: v_or_b32_e32 v4, v6, v4 -; GFX11-NEXT: v_or_b32_e32 v5, v7, v5 -; GFX11-NEXT: v_perm_b32 v9, s16, s98, v1 -; GFX11-NEXT: v_perm_b32 v10, s17, s96, v1 -; GFX11-NEXT: v_perm_b32 v12, s18, s87, v1 -; GFX11-NEXT: v_perm_b32 v13, s19, s85, v1 -; GFX11-NEXT: v_perm_b32 v22, s64, s55, v1 -; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off -; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v8 -; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v20 -; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v11 -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v21 -; GFX11-NEXT: v_perm_b32 v14, s82, s88, v1 -; GFX11-NEXT: v_perm_b32 v17, s21, s65, v1 -; GFX11-NEXT: v_or_b32_e32 v2, v9, v2 -; GFX11-NEXT: v_or_b32_e32 v3, v10, v3 -; GFX11-NEXT: v_or_b32_e32 v4, v12, v4 -; GFX11-NEXT: v_or_b32_e32 v5, v13, v5 -; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v22 -; GFX11-NEXT: v_perm_b32 v15, s69, s78, v1 -; GFX11-NEXT: v_perm_b32 v16, s20, s68, v1 -; GFX11-NEXT: v_perm_b32 v6, s53, s52, v1 +; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v6 +; GFX11-NEXT: v_perm_b32 v8, s43, s42, v12 +; GFX11-NEXT: v_perm_b32 v10, s84, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 4 +; GFX11-NEXT: v_perm_b32 v5, s2, s45, v12 +; GFX11-NEXT: v_perm_b32 v7, s3, s86, v12 +; GFX11-NEXT: v_perm_b32 v13, s82, s34, v12 +; GFX11-NEXT: v_perm_b32 v15, s93, s98, v12 +; GFX11-NEXT: v_perm_b32 v14, s95, s0, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v8 +; GFX11-NEXT: v_readlane_b32 s1, v22, 5 +; GFX11-NEXT: v_perm_b32 v9, s16, s85, v12 +; GFX11-NEXT: v_perm_b32 v11, s17, s83, v12 +; GFX11-NEXT: v_perm_b32 v16, s18, s69, v12 +; GFX11-NEXT: v_perm_b32 v17, s19, s75, v12 +; GFX11-NEXT: v_or_b32_e32 v3, v5, v3 +; GFX11-NEXT: v_or_b32_e32 v4, v7, v4 +; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v10 +; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v13 ; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v14 -; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:16 -; GFX11-NEXT: v_or_b32_e32 v3, v17, v8 -; GFX11-NEXT: v_perm_b32 v8, s48, s39, v1 -; GFX11-NEXT: v_perm_b32 v9, s22, s54, v1 -; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v15 -; GFX11-NEXT: v_or_b32_e32 v2, v16, v7 -; GFX11-NEXT: v_perm_b32 v5, s50, s72, v1 -; GFX11-NEXT: v_perm_b32 v7, s23, s51, v1 +; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v15 +; GFX11-NEXT: v_readlane_b32 s0, v22, 6 +; GFX11-NEXT: v_readlane_b32 s1, v22, 7 +; GFX11-NEXT: v_or_b32_e32 v5, v9, v5 +; GFX11-NEXT: v_or_b32_e32 v6, v11, v6 +; GFX11-NEXT: v_or_b32_e32 v7, v16, v7 +; GFX11-NEXT: v_or_b32_e32 v8, v17, v8 +; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off +; GFX11-NEXT: v_perm_b32 v1, s67, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 8 +; GFX11-NEXT: v_perm_b32 v18, s71, s74, v12 +; GFX11-NEXT: v_perm_b32 v9, s68, s91, v12 +; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:16 +; GFX11-NEXT: v_readlane_b32 s1, v22, 9 +; GFX11-NEXT: v_perm_b32 v6, s54, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v21, 9 +; GFX11-NEXT: v_perm_b32 v10, s20, s92, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v18 +; GFX11-NEXT: v_perm_b32 v3, s21, s90, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v4, 16, v9 +; GFX11-NEXT: v_perm_b32 v9, s22, s66, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v1 +; GFX11-NEXT: v_perm_b32 v5, s64, s55, v12 +; GFX11-NEXT: v_perm_b32 v7, s0, s89, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 10 +; GFX11-NEXT: v_or_b32_e32 v1, v10, v2 +; GFX11-NEXT: v_or_b32_e32 v2, v3, v4 +; GFX11-NEXT: v_or_b32_e32 v3, v9, v11 +; GFX11-NEXT: v_perm_b32 v4, s23, s65, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-NEXT: v_perm_b32 v8, s24, s88, v12 +; GFX11-NEXT: v_perm_b32 v9, s52, s0, v12 ; GFX11-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-NEXT: v_perm_b32 v11, s25, s38, v1 +; GFX11-NEXT: v_readlane_b32 s1, v22, 11 +; GFX11-NEXT: v_perm_b32 v10, s25, s53, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX11-NEXT: v_readlane_b32 s0, v22, 12 +; GFX11-NEXT: v_perm_b32 v11, s26, s51, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-NEXT: v_or_b32_e32 v4, v4, v5 +; GFX11-NEXT: v_or_b32_e32 v5, v8, v6 +; GFX11-NEXT: v_perm_b32 v8, s78, s50, v12 +; GFX11-NEXT: v_readlane_b32 s1, v22, 13 +; GFX11-NEXT: v_or_b32_e32 v6, v10, v7 +; GFX11-NEXT: v_perm_b32 v10, s49, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 14 +; GFX11-NEXT: v_readlane_b32 s1, v22, 15 +; GFX11-NEXT: v_or_b32_e32 v7, v11, v9 +; GFX11-NEXT: v_perm_b32 v9, s27, s79, v12 ; GFX11-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX11-NEXT: v_readlane_b32 s0, v25, 6 -; GFX11-NEXT: v_or_b32_e32 v4, v9, v10 -; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v5 -; GFX11-NEXT: v_or_b32_e32 v5, v7, v6 -; GFX11-NEXT: v_or_b32_e32 v7, v11, v8 -; GFX11-NEXT: v_perm_b32 v11, s0, s74, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 3 -; GFX11-NEXT: v_readlane_b32 s1, v25, 4 -; GFX11-NEXT: v_perm_b32 v9, s24, s49, v1 -; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:32 -; GFX11-NEXT: v_perm_b32 v12, s37, s76, v1 -; GFX11-NEXT: v_perm_b32 v8, s26, s36, v1 -; GFX11-NEXT: v_perm_b32 v2, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 7 -; GFX11-NEXT: v_or_b32_e32 v6, v9, v10 -; GFX11-NEXT: v_perm_b32 v10, s34, vcc_hi, v1 -; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12 -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11 -; GFX11-NEXT: v_perm_b32 v4, s28, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 5 +; GFX11-NEXT: v_perm_b32 v11, s48, s39, v12 +; GFX11-NEXT: v_readlane_b32 s1, v21, 8 +; GFX11-NEXT: v_readlane_b32 s2, v22, 26 +; GFX11-NEXT: v_readlane_b32 s3, v22, 27 +; GFX11-NEXT: v_or_b32_e32 v8, v9, v8 +; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:32 +; GFX11-NEXT: v_perm_b32 v2, s1, s0, v12 ; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10 -; GFX11-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-NEXT: v_perm_b32 v9, s27, s35, v1 -; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2 -; GFX11-NEXT: v_perm_b32 v10, s29, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 1 -; GFX11-NEXT: v_or_b32_e32 v2, v4, v5 -; GFX11-NEXT: v_readlane_b32 s1, v26, 31 -; GFX11-NEXT: v_or_b32_e32 v9, v9, v3 -; GFX11-NEXT: v_or_b32_e32 v3, v10, v11 -; GFX11-NEXT: v_perm_b32 v12, s0, s62, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 2 -; GFX11-NEXT: v_readlane_b32 s104, v24, 6 -; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:48 -; GFX11-NEXT: v_readlane_b32 s102, v24, 4 -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12 -; GFX11-NEXT: v_perm_b32 v4, s40, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 30 -; GFX11-NEXT: v_readlane_b32 s101, v24, 3 -; GFX11-NEXT: v_readlane_b32 s100, v24, 2 -; GFX11-NEXT: v_readlane_b32 s99, v24, 1 -; GFX11-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-NEXT: v_perm_b32 v10, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v25, 0 -; GFX11-NEXT: v_readlane_b32 s1, v26, 26 -; GFX11-NEXT: v_readlane_b32 s98, v24, 0 -; GFX11-NEXT: v_readlane_b32 s97, v23, 31 +; GFX11-NEXT: v_perm_b32 v4, s29, s76, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; GFX11-NEXT: v_readlane_b32 s0, v22, 16 +; GFX11-NEXT: v_readlane_b32 s1, v22, 17 +; GFX11-NEXT: v_perm_b32 v1, s28, s38, v12 +; GFX11-NEXT: v_perm_b32 v11, s40, s77, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v2 +; GFX11-NEXT: v_perm_b32 v9, s37, s35, v12 +; GFX11-NEXT: v_or_b32_e32 v2, v4, v10 +; GFX11-NEXT: v_perm_b32 v10, vcc_hi, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 18 +; GFX11-NEXT: v_or_b32_e32 v1, v1, v3 +; GFX11-NEXT: v_or_b32_e32 v3, v11, v13 +; GFX11-NEXT: v_perm_b32 v4, s41, s36, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-NEXT: v_perm_b32 v11, s72, s56, v12 +; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:48 +; GFX11-NEXT: v_perm_b32 v6, s99, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v21, 7 +; GFX11-NEXT: v_readlane_b32 s1, v22, 19 ; GFX11-NEXT: v_lshlrev_b32_e32 v7, 16, v10 -; GFX11-NEXT: v_perm_b32 v5, s41, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 28 -; GFX11-NEXT: v_readlane_b32 s96, v23, 30 -; GFX11-NEXT: v_readlane_b32 s87, v23, 29 -; GFX11-NEXT: v_readlane_b32 s86, v23, 28 +; GFX11-NEXT: v_perm_b32 v8, s15, s104, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; GFX11-NEXT: v_or_b32_e32 v4, v4, v9 +; GFX11-NEXT: v_perm_b32 v9, s59, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 20 +; GFX11-NEXT: v_perm_b32 v5, s14, s73, v12 +; GFX11-NEXT: v_perm_b32 v11, s12, s60, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v6 +; GFX11-NEXT: v_readlane_b32 s1, v22, 21 +; GFX11-NEXT: v_or_b32_e32 v6, v8, v10 +; GFX11-NEXT: v_perm_b32 v10, s103, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 22 ; GFX11-NEXT: v_or_b32_e32 v5, v5, v7 -; GFX11-NEXT: v_perm_b32 v11, s0, s60, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 25 -; GFX11-NEXT: v_readlane_b32 s85, v23, 27 -; GFX11-NEXT: v_readlane_b32 s84, v23, 26 -; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:64 -; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v11 -; GFX11-NEXT: v_perm_b32 v6, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 29 -; GFX11-NEXT: v_readlane_b32 s1, v26, 21 -; GFX11-NEXT: v_readlane_b32 s83, v23, 25 -; GFX11-NEXT: v_readlane_b32 s82, v23, 24 -; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v6 -; GFX11-NEXT: v_perm_b32 v8, s14, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 27 -; GFX11-NEXT: v_readlane_b32 s81, v23, 23 -; GFX11-NEXT: v_readlane_b32 s80, v23, 22 -; GFX11-NEXT: v_readlane_b32 s71, v23, 21 -; GFX11-NEXT: v_or_b32_e32 v6, v8, v9 -; GFX11-NEXT: v_perm_b32 v10, s15, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 23 -; GFX11-NEXT: v_readlane_b32 s70, v23, 20 -; GFX11-NEXT: v_readlane_b32 s69, v23, 19 -; GFX11-NEXT: v_readlane_b32 s68, v23, 18 -; GFX11-NEXT: v_or_b32_e32 v7, v10, v11 -; GFX11-NEXT: v_perm_b32 v12, s0, s58, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 24 -; GFX11-NEXT: v_readlane_b32 s67, v23, 17 -; GFX11-NEXT: v_readlane_b32 s66, v23, 16 -; GFX11-NEXT: v_readlane_b32 s65, v23, 15 -; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v12 -; GFX11-NEXT: v_perm_b32 v8, s12, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 20 -; GFX11-NEXT: v_readlane_b32 s64, v23, 14 -; GFX11-NEXT: v_readlane_b32 s55, v23, 13 -; GFX11-NEXT: v_readlane_b32 s54, v23, 12 -; GFX11-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-NEXT: v_perm_b32 v10, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 22 -; GFX11-NEXT: v_readlane_b32 s1, v26, 16 -; GFX11-NEXT: v_readlane_b32 s53, v23, 11 -; GFX11-NEXT: v_readlane_b32 s52, v23, 10 +; GFX11-NEXT: v_or_b32_e32 v7, v11, v13 +; GFX11-NEXT: v_perm_b32 v11, s63, s57, v12 +; GFX11-NEXT: v_readlane_b32 s1, v22, 23 +; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:64 +; GFX11-NEXT: v_perm_b32 v2, s101, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 24 +; GFX11-NEXT: v_readlane_b32 s1, v22, 25 +; GFX11-NEXT: v_perm_b32 v8, s13, s102, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v10 -; GFX11-NEXT: v_perm_b32 v9, s13, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 18 -; GFX11-NEXT: v_readlane_b32 s51, v23, 9 -; GFX11-NEXT: v_readlane_b32 s50, v23, 8 -; GFX11-NEXT: v_readlane_b32 s49, v23, 7 -; GFX11-NEXT: v_or_b32_e32 v9, v9, v3 -; GFX11-NEXT: v_perm_b32 v11, s0, s56, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 15 -; GFX11-NEXT: v_readlane_b32 s48, v23, 6 -; GFX11-NEXT: v_readlane_b32 s39, v23, 5 -; GFX11-NEXT: v_readlane_b32 s38, v23, 4 -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v11 -; GFX11-NEXT: v_perm_b32 v2, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 19 -; GFX11-NEXT: v_readlane_b32 s1, v26, 11 -; GFX11-NEXT: v_readlane_b32 s37, v23, 3 -; GFX11-NEXT: v_readlane_b32 s36, v23, 2 -; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v2 -; GFX11-NEXT: v_perm_b32 v4, s10, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 17 -; GFX11-NEXT: v_readlane_b32 s35, v23, 1 -; GFX11-NEXT: v_readlane_b32 s34, v23, 0 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_or_b32_e32 v2, v4, v5 -; GFX11-NEXT: v_perm_b32 v10, s11, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 13 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v3, v10, v11 -; GFX11-NEXT: v_perm_b32 v12, s0, s46, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 14 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v12 -; GFX11-NEXT: v_perm_b32 v4, s8, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 10 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-NEXT: v_perm_b32 v10, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 12 -; GFX11-NEXT: v_readlane_b32 s1, v26, 6 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_perm_b32 v4, s11, s61, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; GFX11-NEXT: v_readlane_b32 s1, v21, 5 +; GFX11-NEXT: v_perm_b32 v1, s10, s100, v12 +; GFX11-NEXT: v_perm_b32 v11, s8, s30, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v2 +; GFX11-NEXT: v_or_b32_e32 v8, v8, v9 +; GFX11-NEXT: v_perm_b32 v9, s31, s70, v12 +; GFX11-NEXT: v_or_b32_e32 v2, v4, v10 +; GFX11-NEXT: v_perm_b32 v4, s1, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v21, 6 +; GFX11-NEXT: v_or_b32_e32 v1, v1, v3 +; GFX11-NEXT: v_perm_b32 v10, s9, s94, v12 +; GFX11-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-NEXT: v_or_b32_e32 v3, v11, v13 +; GFX11-NEXT: v_perm_b32 v11, s6, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v21, 2 +; GFX11-NEXT: v_readlane_b32 s1, v21, 3 +; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v4 +; GFX11-NEXT: v_or_b32_e32 v4, v10, v9 +; GFX11-NEXT: v_readlane_b32 s30, v20, 7 +; GFX11-NEXT: v_readlane_b32 s31, v20, 8 +; GFX11-NEXT: v_perm_b32 v10, s1, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v21, 4 +; GFX11-NEXT: v_or_b32_e32 v9, v11, v13 +; GFX11-NEXT: v_readlane_b32 s1, v22, 30 +; GFX11-NEXT: v_readlane_b32 s104, v20, 6 ; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; GFX11-NEXT: v_perm_b32 v5, s9, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 8 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v5, v5, v10 -; GFX11-NEXT: v_perm_b32 v11, s0, s44, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 5 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_perm_b32 v11, s7, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v21, 0 +; GFX11-NEXT: v_readlane_b32 s103, v20, 5 +; GFX11-NEXT: v_readlane_b32 s102, v20, 4 +; GFX11-NEXT: v_readlane_b32 s101, v20, 3 +; GFX11-NEXT: v_or_b32_e32 v10, v11, v10 +; GFX11-NEXT: v_perm_b32 v11, s0, s2, v12 +; GFX11-NEXT: v_readlane_b32 s0, v21, 1 +; GFX11-NEXT: v_readlane_b32 s100, v20, 2 +; GFX11-NEXT: v_readlane_b32 s99, v20, 1 +; GFX11-NEXT: v_readlane_b32 s98, v20, 0 ; GFX11-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GFX11-NEXT: v_perm_b32 v10, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 9 -; GFX11-NEXT: v_readlane_b32 s1, v26, 1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v10 -; GFX11-NEXT: v_perm_b32 v12, s6, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 7 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v10, v12, v11 -; GFX11-NEXT: v_perm_b32 v14, s7, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 3 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v11, v14, v13 -; GFX11-NEXT: v_perm_b32 v12, s0, s42, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 4 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; GFX11-NEXT: v_perm_b32 v13, s4, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 0 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_or_b32_e32 v12, v13, v12 -; GFX11-NEXT: v_perm_b32 v13, s1, s0, v1 -; GFX11-NEXT: v_readlane_b32 s0, v26, 2 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_perm_b32 v13, s4, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 29 +; GFX11-NEXT: v_readlane_b32 s86, v19, 28 +; GFX11-NEXT: v_readlane_b32 s85, v19, 27 +; GFX11-NEXT: v_readlane_b32 s84, v19, 26 +; GFX11-NEXT: v_or_b32_e32 v11, v13, v11 +; GFX11-NEXT: v_perm_b32 v13, s1, s0, v12 +; GFX11-NEXT: v_readlane_b32 s0, v22, 31 +; GFX11-NEXT: v_readlane_b32 s83, v19, 25 +; GFX11-NEXT: v_readlane_b32 s82, v19, 24 +; GFX11-NEXT: v_readlane_b32 s71, v19, 21 ; GFX11-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; GFX11-NEXT: v_perm_b32 v1, s5, s0, v1 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX11-NEXT: v_or_b32_e32 v13, v1, v13 +; GFX11-NEXT: v_perm_b32 v12, s5, s0, v12 +; GFX11-NEXT: v_readlane_b32 s70, v19, 20 +; GFX11-NEXT: v_readlane_b32 s69, v19, 19 +; GFX11-NEXT: v_readlane_b32 s68, v19, 18 +; GFX11-NEXT: v_readlane_b32 s67, v19, 17 +; GFX11-NEXT: v_or_b32_e32 v12, v12, v13 ; GFX11-NEXT: s_clause 0x2 -; GFX11-NEXT: scratch_store_b128 v0, v[6:9], off offset:80 -; GFX11-NEXT: scratch_store_b128 v0, v[2:5], off offset:96 -; GFX11-NEXT: scratch_store_b128 v0, v[10:13], off offset:112 +; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:80 +; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:96 +; GFX11-NEXT: scratch_store_b128 v0, v[9:12], off offset:112 +; GFX11-NEXT: v_readlane_b32 s66, v19, 16 +; GFX11-NEXT: v_readlane_b32 s65, v19, 15 +; GFX11-NEXT: v_readlane_b32 s64, v19, 14 +; GFX11-NEXT: v_readlane_b32 s55, v19, 13 +; GFX11-NEXT: v_readlane_b32 s54, v19, 12 +; GFX11-NEXT: v_readlane_b32 s53, v19, 11 +; GFX11-NEXT: v_readlane_b32 s52, v19, 10 +; GFX11-NEXT: v_readlane_b32 s51, v19, 9 +; GFX11-NEXT: v_readlane_b32 s50, v19, 8 +; GFX11-NEXT: v_readlane_b32 s49, v19, 7 +; GFX11-NEXT: v_readlane_b32 s48, v19, 6 +; GFX11-NEXT: v_readlane_b32 s39, v19, 5 +; GFX11-NEXT: v_readlane_b32 s38, v19, 4 +; GFX11-NEXT: v_readlane_b32 s37, v19, 3 +; GFX11-NEXT: v_readlane_b32 s36, v19, 2 +; GFX11-NEXT: v_readlane_b32 s35, v19, 1 +; GFX11-NEXT: v_readlane_b32 s34, v19, 0 ; GFX11-NEXT: s_xor_saveexec_b32 s0, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload -; GFX11-NEXT: scratch_load_b32 v23, off, s32 -; GFX11-NEXT: scratch_load_b32 v24, off, s32 offset:4 -; GFX11-NEXT: scratch_load_b32 v25, off, s32 offset:8 -; GFX11-NEXT: scratch_load_b32 v26, off, s32 offset:12 +; GFX11-NEXT: scratch_load_b32 v19, off, s32 +; GFX11-NEXT: scratch_load_b32 v20, off, s32 offset:4 +; GFX11-NEXT: scratch_load_b32 v21, off, s32 offset:8 +; GFX11-NEXT: scratch_load_b32 v22, off, s32 offset:12 ; GFX11-NEXT: s_mov_b32 exec_lo, s0 ; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_setpc_b64 s[30:31] -; GFX11-NEXT: .LBB57_4: -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr104 -; GFX11-NEXT: ; implicit-def: $sgpr103 -; GFX11-NEXT: ; implicit-def: $sgpr30 -; GFX11-NEXT: ; implicit-def: $sgpr102 -; GFX11-NEXT: ; implicit-def: $sgpr84 -; GFX11-NEXT: ; implicit-def: $sgpr83 -; GFX11-NEXT: ; implicit-def: $sgpr101 -; GFX11-NEXT: ; implicit-def: $sgpr100 -; GFX11-NEXT: ; implicit-def: $sgpr94 -; GFX11-NEXT: ; implicit-def: $sgpr99 -; GFX11-NEXT: ; implicit-def: $sgpr81 -; GFX11-NEXT: ; implicit-def: $sgpr80 -; GFX11-NEXT: ; implicit-def: $sgpr98 -; GFX11-NEXT: ; implicit-def: $sgpr97 -; GFX11-NEXT: ; implicit-def: $sgpr92 -; GFX11-NEXT: ; implicit-def: $sgpr96 -; GFX11-NEXT: ; implicit-def: $sgpr71 -; GFX11-NEXT: ; implicit-def: $sgpr70 -; GFX11-NEXT: ; implicit-def: $sgpr87 -; GFX11-NEXT: ; implicit-def: $sgpr86 -; GFX11-NEXT: ; implicit-def: $sgpr90 -; GFX11-NEXT: ; implicit-def: $sgpr85 -; GFX11-NEXT: ; implicit-def: $sgpr67 -; GFX11-NEXT: ; implicit-def: $sgpr66 -; GFX11-NEXT: ; implicit-def: $sgpr68 -; GFX11-NEXT: ; implicit-def: $sgpr82 -; GFX11-NEXT: ; implicit-def: $sgpr88 -; GFX11-NEXT: ; implicit-def: $sgpr65 -; GFX11-NEXT: ; implicit-def: $sgpr64 -; GFX11-NEXT: ; implicit-def: $sgpr55 -; GFX11-NEXT: ; implicit-def: $sgpr54 -; GFX11-NEXT: ; implicit-def: $sgpr69 -; GFX11-NEXT: ; implicit-def: $sgpr78 -; GFX11-NEXT: ; implicit-def: $sgpr51 -; GFX11-NEXT: ; implicit-def: $sgpr53 -; GFX11-NEXT: ; implicit-def: $sgpr52 -; GFX11-NEXT: ; implicit-def: $sgpr49 -; GFX11-NEXT: ; implicit-def: $sgpr50 -; GFX11-NEXT: ; implicit-def: $sgpr72 -; GFX11-NEXT: ; implicit-def: $sgpr38 -; GFX11-NEXT: ; implicit-def: $sgpr48 -; GFX11-NEXT: ; implicit-def: $sgpr39 -; GFX11-NEXT: ; implicit-def: $sgpr36 -; GFX11-NEXT: ; implicit-def: $sgpr37 -; GFX11-NEXT: ; implicit-def: $sgpr35 -; GFX11-NEXT: ; implicit-def: $sgpr34 -; GFX11-NEXT: ; implicit-def: $vcc_hi -; GFX11-NEXT: ; implicit-def: $sgpr76 -; GFX11-NEXT: ; implicit-def: $sgpr74 -; GFX11-NEXT: ; implicit-def: $sgpr62 -; GFX11-NEXT: ; implicit-def: $sgpr60 -; GFX11-NEXT: ; implicit-def: $sgpr58 -; GFX11-NEXT: ; implicit-def: $sgpr56 -; GFX11-NEXT: ; implicit-def: $sgpr46 -; GFX11-NEXT: ; implicit-def: $sgpr44 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: ; kill: killed $sgpr42 -; GFX11-NEXT: ; implicit-def: $sgpr42 -; GFX11-NEXT: s_branch .LBB57_2 %cmp = icmp eq i32 %b, 0 br i1 %cmp, label %cmp.true, label %cmp.false @@ -81417,22 +81514,22 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:388 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 @@ -81451,33 +81548,33 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:112 ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:128 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:128 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:136 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:144 ; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 ; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:160 ; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:168 ; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:184 -; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v1 -; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v3 -; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v5 -; SI-NEXT: v_lshlrev_b32_e32 v40, 24, v7 -; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v9 -; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v11 -; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v13 -; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v15 -; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v17 -; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v19 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v21 -; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v23 -; SI-NEXT: v_lshlrev_b32_e32 v56, 8, v25 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v27 -; SI-NEXT: v_lshlrev_b32_e32 v46, 8, v29 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:184 +; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v1 +; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v3 +; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v5 +; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v7 +; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v9 +; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v11 +; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v13 +; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v15 +; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v17 +; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v19 +; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v21 +; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v23 +; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v25 +; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v27 +; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v29 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30 -; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v0 -; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v2 +; SI-NEXT: v_lshlrev_b32_e32 v61, 24, v0 +; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v4 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) @@ -81534,19 +81631,19 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v33 +; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v32 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v35 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v33 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v36 +; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v35 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v39 @@ -81554,19 +81651,19 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill @@ -81577,7 +81674,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v51 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v40 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 @@ -81585,27 +81682,27 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:188 -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:44 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:28 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:20 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:12 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:4 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:108 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:100 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:92 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:84 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:76 -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68 -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:60 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:44 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:28 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:20 +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:12 +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:4 +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:108 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:100 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:92 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:84 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:76 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:60 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 @@ -81614,15 +81711,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:204 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:212 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:224 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 @@ -81636,24 +81733,24 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 @@ -81662,29 +81759,26 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:252 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:260 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:268 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:268 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:276 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 @@ -81693,29 +81787,29 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:292 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 @@ -81724,29 +81818,29 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:332 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:340 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:352 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 @@ -81755,239 +81849,307 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:348 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:356 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 -; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v3 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:364 ; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:372 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB58_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v9, 0xff, v56 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v9, 0xff, v49 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v0, v0, v54 -; SI-NEXT: v_or_b32_e32 v2, v2, v41 +; SI-NEXT: v_or_b32_e32 v0, v0, v37 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 -; SI-NEXT: v_or_b32_e32 v3, v40, v3 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v9, v10, v9 ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v53, v2 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_or_b32_e32 v3, v47, v3 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 +; SI-NEXT: v_or_b32_e32 v4, v45, v4 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v60, v5 +; SI-NEXT: v_or_b32_e32 v5, v41, v5 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v58, v6 +; SI-NEXT: v_or_b32_e32 v6, v62, v6 ; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v37, v7 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v7, v48, v7 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v61, v8 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr53 +; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr60 +; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 +; SI-NEXT: v_or_b32_e32 v1, v1, v58 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v2, v2, v53 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v34, v3 +; SI-NEXT: v_or_b32_e32 v2, v2, v52 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v55, v8 -; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v3, v48 +; SI-NEXT: v_or_b32_e32 v3, v3, v36 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 -; SI-NEXT: v_or_b32_e32 v4, v4, v62 +; SI-NEXT: v_or_b32_e32 v4, v4, v43 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 -; SI-NEXT: v_or_b32_e32 v5, v5, v38 +; SI-NEXT: v_or_b32_e32 v5, v5, v63 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_or_b32_e32 v6, v6, v56 +; SI-NEXT: v_or_b32_e32 v6, v6, v34 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v7, v7, v46 +; SI-NEXT: v_or_b32_e32 v7, v7, v38 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xff, v35 -; SI-NEXT: v_or_b32_e32 v8, v8, v44 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v57 +; SI-NEXT: v_or_b32_e32 v8, v8, v55 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: v_and_b32_e32 v9, 0xff, v33 +; SI-NEXT: v_and_b32_e32 v9, 0xff, v46 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xff, v52 +; SI-NEXT: v_and_b32_e32 v10, 0xff, v51 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 ; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xff, v63 -; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr52 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: v_and_b32_e32 v10, 0xff, v44 +; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xff, v39 +; SI-NEXT: v_and_b32_e32 v11, 0xff, v50 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xff, v61 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: v_and_b32_e32 v11, 0xff, v42 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xff, v59 +; SI-NEXT: v_and_b32_e32 v12, 0xff, v35 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xff, v51 -; SI-NEXT: ; implicit-def: $vgpr59 -; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: v_and_b32_e32 v12, 0xff, v40 +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xff, v57 +; SI-NEXT: v_and_b32_e32 v13, 0xff, v49 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xff, v47 -; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: v_and_b32_e32 v13, 0xff, v39 +; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v50 +; SI-NEXT: v_and_b32_e32 v14, 0xff, v33 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v45 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr45 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v14, 0xff, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v14, v14, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v36 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v60 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82005,204 +82167,299 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 +; SI-NEXT: v_and_b32_e32 v25, 0xff, v59 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v26, v26, v27 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: v_or_b32_e32 v26, v26, v27 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v28, v28, v29 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: v_or_b32_e32 v28, v28, v29 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v30, v30, v31 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_or_b32_e32 v30, v30, v31 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v31, v31, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v32, 0xff, v32 -; SI-NEXT: v_or_b32_e32 v31, v31, v43 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_or_b32_e32 v32, v33, v32 ; SI-NEXT: v_or_b32_e32 v31, v31, v32 ; SI-NEXT: ; implicit-def: $vgpr32 @@ -82214,351 +82471,189 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: .LBB58_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB58_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; SI-NEXT: s_movk_i32 s6, 0x300 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v49 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v56 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: s_movk_i32 s6, 0x300 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b32 s7, 0x3000000 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v54, v0 +; SI-NEXT: v_or_b32_e32 v0, v37, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v40, v2 +; SI-NEXT: v_or_b32_e32 v2, v53, v2 ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v34, v3 +; SI-NEXT: v_or_b32_e32 v3, v47, v3 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v4, v45, v4 ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v60, v5 -; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_or_b32_e32 v5, v41, v5 +; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v58, v6 -; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_or_b32_e32 v6, v62, v6 +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v37, v7 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v7, v48, v7 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v61, v8 ; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v0 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_or_b32_e32 v1, v58, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v55, v8 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_or_b32_e32 v2, v53, v2 +; SI-NEXT: v_or_b32_e32 v2, v52, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v48, v3 +; SI-NEXT: v_or_b32_e32 v3, v36, v3 ; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v3, vcc, s7, v3 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 -; SI-NEXT: v_or_b32_e32 v4, v62, v4 +; SI-NEXT: v_or_b32_e32 v4, v43, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v4, vcc, s7, v4 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 -; SI-NEXT: v_or_b32_e32 v5, v38, v5 +; SI-NEXT: v_or_b32_e32 v5, v63, v5 ; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v5, vcc, s7, v5 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_or_b32_e32 v6, v56, v6 +; SI-NEXT: v_or_b32_e32 v6, v34, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v6, vcc, s7, v6 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v7, v46, v7 +; SI-NEXT: v_or_b32_e32 v7, v38, v7 ; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v35 +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v57 ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_or_b32_e32 v8, v44, v8 +; SI-NEXT: v_or_b32_e32 v8, v55, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v33 +; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v46 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v52 +; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51 ; SI-NEXT: v_and_b32_e32 v10, 0xff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 @@ -82566,15 +82661,14 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v63 +; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v10, 0xff, v10 ; SI-NEXT: v_add_i32_e32 v7, vcc, s7, v7 ; SI-NEXT: v_add_i32_e32 v8, vcc, s7, v8 ; SI-NEXT: v_add_i32_e32 v9, vcc, s7, v9 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v39 +; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50 ; SI-NEXT: v_and_b32_e32 v11, 0xff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 @@ -82582,12 +82676,12 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v61 +; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v11, 0xff, v11 ; SI-NEXT: v_add_i32_e32 v10, vcc, s7, v10 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v59 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v35 ; SI-NEXT: v_and_b32_e32 v12, 0xff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 @@ -82595,12 +82689,12 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v40 ; SI-NEXT: v_and_b32_e32 v12, 0xff, v12 ; SI-NEXT: v_add_i32_e32 v11, vcc, s7, v11 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v57 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v49 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 @@ -82608,12 +82702,12 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v39 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_add_i32_e32 v12, vcc, s7, v12 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v50 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 @@ -82621,12 +82715,14 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v45 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v32 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_add_i32_e32 v13, vcc, s7, v13 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v36 +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v60 ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 @@ -82658,7 +82754,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82667,7 +82763,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 ; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v16, vcc, s7, v16 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -82675,7 +82771,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v17, v18, v17 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82684,7 +82780,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v17, vcc, s7, v17 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -82692,7 +82788,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v18, v19, v18 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82701,7 +82797,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v18, vcc, s7, v18 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -82709,7 +82805,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82718,7 +82814,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s7, v19 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -82726,7 +82822,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v20, v21, v20 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v20 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82735,7 +82831,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v20, vcc, s7, v20 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -82743,7 +82839,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v21, v22, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, s6, v21 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82752,7 +82848,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, s7, v21 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -82760,7 +82856,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v22, v23, v22 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v22 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82769,15 +82865,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, s7, v22 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23 ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v23, v24, v23 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, s6, v23 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82786,32 +82882,30 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, s7, v23 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v24, v25, v24 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 +; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v59 ; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 +; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v24, vcc, s7, v24 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v25, v26, v25 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82820,15 +82914,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, s7, v25 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v26, v27, v26 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82837,15 +82931,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, s7, v26 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v27, v28, v27 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82854,15 +82948,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, s7, v27 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v28, v29, v28 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82871,15 +82965,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, s7, v28 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v29, v30, v29 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v29, vcc, s6, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82888,15 +82982,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v29, vcc, s7, v29 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30 ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v30, v31, v30 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v30, vcc, s6, v30 ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -82905,19 +82999,21 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v30 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v31, vcc, 3, v31 ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v31, v32, v31 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v31, vcc, 0x300, v31 +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v32, vcc, 3, v32 -; SI-NEXT: v_or_b32_e32 v31, v43, v31 ; SI-NEXT: v_and_b32_e32 v32, 0xff, v32 -; SI-NEXT: v_add_i32_e32 v31, vcc, 0x300, v31 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_or_b32_e32 v32, v33, v32 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_add_i32_e32 v31, vcc, 0x3000000, v31 @@ -82961,11 +83057,11 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill @@ -82984,13 +83080,13 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 @@ -83010,20 +83106,20 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:72 ; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:68 ; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:64 -; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:60 -; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:56 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:48 +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:60 +; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:56 +; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:52 +; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:48 ; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:44 ; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:40 ; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:36 ; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:32 -; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:28 -; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:24 -; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:20 -; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:16 +; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:28 +; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:24 +; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:20 +; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:16 ; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:12 -; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:8 +; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:8 ; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:4 ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 @@ -83056,19 +83152,19 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill @@ -83142,25 +83238,25 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:348 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:344 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:340 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill @@ -83172,19 +83268,19 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:324 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:148 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill @@ -83225,18 +83321,18 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB58_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b32 s6, 0xc0c0004 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v9, v33, v62, s6 +; VI-NEXT: v_perm_b32 v9, v33, v32, s6 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_perm_b32 v10, v63, v60, s6 +; VI-NEXT: v_perm_b32 v10, v61, v60, s6 ; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_perm_b32 v11, v53, v58, s6 +; VI-NEXT: v_perm_b32 v11, v53, v52, s6 ; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; VI-NEXT: v_perm_b32 v12, v51, v56, s6 +; VI-NEXT: v_perm_b32 v12, v57, v56, s6 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_perm_b32 v13, v37, v36, s6 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -83245,12 +83341,11 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v15, v49, v48, s6 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; implicit-def: $vgpr63 +; VI-NEXT: ; implicit-def: $vgpr61 ; VI-NEXT: ; implicit-def: $vgpr60 ; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 @@ -83260,25 +83355,25 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v0, v1, v0, s6 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v16, v17, v16, s6 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s6 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s6 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v2, v1, s6 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) @@ -83323,28 +83418,28 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v6, v6, v7 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v8, v8, v41, s6 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_perm_b32 v8, v55, v34, s6 +; VI-NEXT: v_perm_b32 v8, v55, v63, s6 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 -; VI-NEXT: v_perm_b32 v9, v61, v32, s6 +; VI-NEXT: v_perm_b32 v9, v34, v62, s6 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 ; VI-NEXT: v_perm_b32 v10, v59, v54, s6 ; VI-NEXT: v_or_b32_e32 v10, v10, v11 -; VI-NEXT: v_perm_b32 v11, v57, v52, s6 +; VI-NEXT: v_perm_b32 v11, v51, v58, s6 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 ; VI-NEXT: v_perm_b32 v12, v47, v38, s6 ; VI-NEXT: v_or_b32_e32 v12, v12, v13 @@ -83358,12 +83453,13 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; VI-NEXT: ; implicit-def: $vgpr41 ; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr61 +; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr59 ; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr35 @@ -83380,22 +83476,22 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v17, v18, v17, s6 ; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; VI-NEXT: v_or_b32_e32 v16, v16, v17 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v17, v18, v17, s6 ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v19, v18, s6 ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; VI-NEXT: v_or_b32_e32 v17, v17, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v19, v18, s6 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v19, v20, v19, s6 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 @@ -83444,18 +83540,18 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v23, v24, v23, s6 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v24, v25, v24, s6 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v24, v25, v24, s6 ; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v25, v26, v25, s6 ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 @@ -83728,25 +83824,24 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_cbranch_execz .LBB58_4 ; VI-NEXT: ; %bb.3: ; %cmp.true ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; VI-NEXT: v_mov_b32_e32 v31, 0x300 ; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v41 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32 ; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v60 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58 +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52 ; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v56 ; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v36 ; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v44 ; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v48 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload @@ -83754,79 +83849,82 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_add_u16_e32 v0, 3, v0 ; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_lshlrev_b16_e32 v20, 8, v20 ; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 +; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5 ; VI-NEXT: v_lshlrev_b16_e32 v23, 8, v23 -; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26 +; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 ; VI-NEXT: s_waitcnt vmcnt(12) -; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 +; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; VI-NEXT: s_waitcnt vmcnt(11) -; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 +; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 ; VI-NEXT: s_waitcnt vmcnt(10) -; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 +; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: s_waitcnt vmcnt(9) -; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 +; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 ; VI-NEXT: s_waitcnt vmcnt(8) -; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 ; VI-NEXT: s_waitcnt vmcnt(7) -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 +; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; VI-NEXT: s_waitcnt vmcnt(6) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 +; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26 ; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 -; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v27, 8, v27 -; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: v_lshlrev_b16_e32 v29, 8, v29 -; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_lshlrev_b16_e32 v30, 8, v30 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v1, 3, v1 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_sdwa v1, v1, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v1, 3, v1 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v2, 3, v2 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v3, v3, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_sdwa v2, v2, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_add_u16_e32 v2, 3, v2 ; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v2, 3, v2 +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v3, 3, v3 @@ -83882,21 +83980,21 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v6, 0x300, v6 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v7, 3, v7 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v7, v7, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v6, v6, v7 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v7, 3, v7 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v7, 0x300, v7 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v8, 3, v8 @@ -83904,17 +84002,17 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_sdwa v8, v8, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v7, v7, v8 ; VI-NEXT: v_add_u16_e32 v8, 3, v55 -; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v34 +; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v63 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 3, v33 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v8, 0x300, v8 ; VI-NEXT: v_add_u16_sdwa v9, v9, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v8, v8, v9 -; VI-NEXT: v_add_u16_e32 v9, 3, v61 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32 +; VI-NEXT: v_add_u16_e32 v9, 3, v34 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v10, 3, v63 +; VI-NEXT: v_add_u16_e32 v10, 3, v61 ; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 0x300, v9 ; VI-NEXT: v_add_u16_sdwa v10, v10, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -83927,10 +84025,10 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_e32 v10, 0x300, v10 ; VI-NEXT: v_add_u16_sdwa v11, v11, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v10, v10, v11 -; VI-NEXT: v_add_u16_e32 v11, 3, v57 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52 +; VI-NEXT: v_add_u16_e32 v11, 3, v51 +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58 ; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v12, 3, v51 +; VI-NEXT: v_add_u16_e32 v12, 3, v57 ; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v11, 0x300, v11 ; VI-NEXT: v_add_u16_sdwa v12, v12, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -83964,18 +84062,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v15, 0x300, v15 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_add_u16_e32 v16, 3, v16 ; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v16, v16, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v15, v15, v16 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33 ; VI-NEXT: s_waitcnt vmcnt(2) @@ -83992,28 +84087,28 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v17, v17, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v16, v16, v17 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v17, 3, v17 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v17, 0x300, v17 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v18, 3, v18 ; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v18, v18, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v17, v17, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v18, 3, v18 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 ; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v18, 0x300, v18 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v19, 3, v19 @@ -84083,21 +84178,21 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24 ; VI-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v23, 0x300, v23 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v24, 3, v24 ; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v24, v24, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v24, 3, v24 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25 ; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v24, 0x300, v24 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v25, 3, v25 @@ -84245,11 +84340,11 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill @@ -84263,14 +84358,14 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 @@ -84280,23 +84375,23 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112 ; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:108 ; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:104 -; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:100 +; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:100 ; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:96 -; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:92 -; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:88 -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:84 -; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:80 +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:92 +; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:88 +; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:84 +; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:80 ; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:76 -; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:72 -; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:68 +; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:72 +; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:68 ; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:64 -; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:60 -; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:56 -; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:52 -; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:48 +; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:60 +; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:56 +; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:52 +; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:48 ; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:44 -; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:40 -; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:36 +; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:40 +; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:36 ; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:32 ; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:28 ; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:24 @@ -84333,7 +84428,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill @@ -84345,7 +84440,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill @@ -84382,7 +84477,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:380 +; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:380 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:376 ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -84404,31 +84499,31 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:364 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:360 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:356 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:352 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:348 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill @@ -84440,13 +84535,13 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:340 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill @@ -84508,46 +84603,46 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB58_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004 ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v10, v55, v32, s6 -; GFX9-NEXT: v_perm_b32 v11, v61, v60, s6 -; GFX9-NEXT: v_perm_b32 v12, v53, v38, s6 -; GFX9-NEXT: v_perm_b32 v13, v57, v56, s6 -; GFX9-NEXT: v_perm_b32 v14, v51, v34, s6 +; GFX9-NEXT: v_perm_b32 v11, v61, v54, s6 +; GFX9-NEXT: v_perm_b32 v12, v59, v38, s6 +; GFX9-NEXT: v_perm_b32 v13, v57, v52, s6 +; GFX9-NEXT: v_perm_b32 v14, v47, v34, s6 ; GFX9-NEXT: v_perm_b32 v15, v45, v50, s6 ; GFX9-NEXT: ; implicit-def: $vgpr55 ; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr59 ; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr34 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr50 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v0, v1, v0, s6 ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v16, v43, v16, s6 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -84575,7 +84670,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 @@ -84584,7 +84679,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 @@ -84607,15 +84702,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8 ; GFX9-NEXT: v_perm_b32 v9, v39, v40, s6 ; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v10, v62, v63, s6 +; GFX9-NEXT: v_perm_b32 v10, v63, v62, s6 ; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10 -; GFX9-NEXT: v_perm_b32 v11, v59, v54, s6 +; GFX9-NEXT: v_perm_b32 v11, v53, v60, s6 ; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11 -; GFX9-NEXT: v_perm_b32 v12, v58, v37, s6 +; GFX9-NEXT: v_perm_b32 v12, v37, v58, s6 ; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12 -; GFX9-NEXT: v_perm_b32 v13, v47, v52, s6 +; GFX9-NEXT: v_perm_b32 v13, v51, v56, s6 ; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13 -; GFX9-NEXT: v_perm_b32 v14, v33, v46, s6 +; GFX9-NEXT: v_perm_b32 v14, v36, v46, s6 ; GFX9-NEXT: v_lshl_or_b32 v14, v15, 16, v14 ; GFX9-NEXT: v_perm_b32 v15, v49, v44, s6 ; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15 @@ -84627,15 +84722,15 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr40 -; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr46 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr44 @@ -84655,21 +84750,21 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 ; GFX9-NEXT: v_lshl_or_b32 v17, v18, 16, v17 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s6 ; GFX9-NEXT: v_lshl_or_b32 v18, v19, 16, v18 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s6 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v20, v21, v20, s6 ; GFX9-NEXT: v_lshl_or_b32 v19, v20, 16, v19 @@ -84705,7 +84800,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 ; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6 ; GFX9-NEXT: v_lshl_or_b32 v23, v24, 16, v23 @@ -84714,7 +84809,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6 ; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6 ; GFX9-NEXT: v_lshl_or_b32 v24, v25, 16, v24 @@ -84778,223 +84873,223 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v32, v36, v32, s6 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: v_perm_b32 v32, v33, v32, s6 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: .LBB58_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB58_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload ; GFX9-NEXT: s_movk_i32 s6, 0x300 ; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload @@ -85002,9 +85097,9 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v48 ; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v32 -; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60 +; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54 ; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v38 -; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56 +; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52 ; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v34 ; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v50 ; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload @@ -85017,19 +85112,19 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(24) ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0 ; GFX9-NEXT: s_waitcnt vmcnt(22) ; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; GFX9-NEXT: s_waitcnt vmcnt(21) ; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; GFX9-NEXT: s_waitcnt vmcnt(20) +; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21 +; GFX9-NEXT: s_waitcnt vmcnt(18) ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; GFX9-NEXT: s_waitcnt vmcnt(19) +; GFX9-NEXT: s_waitcnt vmcnt(17) ; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18 -; GFX9-NEXT: s_waitcnt vmcnt(18) -; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21 ; GFX9-NEXT: s_waitcnt vmcnt(16) ; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: s_waitcnt vmcnt(15) @@ -85067,30 +85162,30 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v1, 3, v1 ; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v1, 3, v1 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 ; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 @@ -85126,7 +85221,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v5, v5, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v4, v4, v5 ; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v5, 3, v5 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -85140,7 +85235,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -85183,39 +85278,39 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 ; GFX9-NEXT: v_add_u16_sdwa v10, v10, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v62 -; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v63 +; GFX9-NEXT: v_add_u16_e32 v10, 3, v63 +; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v62 ; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v11, 3, v61 ; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 ; GFX9-NEXT: v_add_u16_sdwa v11, v11, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX9-NEXT: v_add_u16_e32 v11, 3, v59 -; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54 +; GFX9-NEXT: v_add_u16_e32 v11, 3, v53 +; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60 ; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v53 +; GFX9-NEXT: v_add_u16_e32 v12, 3, v59 ; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 ; GFX9-NEXT: v_add_u16_sdwa v12, v12, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v58 -; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v37 +; GFX9-NEXT: v_add_u16_e32 v12, 3, v37 +; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v58 ; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v13, 3, v57 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 ; GFX9-NEXT: v_add_u16_sdwa v13, v13, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v12, v12, v13 -; GFX9-NEXT: v_add_u16_e32 v13, 3, v47 -; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52 +; GFX9-NEXT: v_add_u16_e32 v13, 3, v51 +; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v14, 3, v51 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v47 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 ; GFX9-NEXT: v_add_u16_sdwa v14, v14, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 -; GFX9-NEXT: v_add_u16_e32 v14, 3, v33 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v36 ; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v46 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v15, 3, v45 @@ -85233,16 +85328,13 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_e32 v15, v15, v16 ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v16, 3, v16 ; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v16, 3, v16 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v17, 3, v17 ; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -85262,8 +85354,8 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v18, v18, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v17, v17, v18 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v18, 3, v18 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -85276,14 +85368,14 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v19, v19, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v18, v18, v19 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v19, 3, v19 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v20 ; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v19, 0x300, v19 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v20, 3, v20 @@ -85339,7 +85431,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v24, 8, v24 ; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v23, 0x300, v23 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v24, 3, v24 @@ -85353,7 +85445,7 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v25, 8, v25 ; GFX9-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v24, 0x300, v24 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v25, 3, v25 @@ -85451,9 +85543,12 @@ define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v32, 3, v36 -; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v32, 3, v33 +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v31 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33 +; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v32, v32, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v31, v31, v32 ; GFX9-NEXT: .LBB58_4: ; %end @@ -87284,9 +87379,7 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: v_readfirstlane_b32 s76, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 -; SI-NEXT: v_readfirstlane_b32 s46, v30 +; SI-NEXT: v_readfirstlane_b32 s42, v30 ; SI-NEXT: v_readfirstlane_b32 s6, v29 ; SI-NEXT: v_readfirstlane_b32 s7, v28 ; SI-NEXT: v_readfirstlane_b32 s8, v27 @@ -87299,36 +87392,38 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: v_readfirstlane_b32 s15, v20 ; SI-NEXT: v_readfirstlane_b32 s40, v19 ; SI-NEXT: v_readfirstlane_b32 s41, v18 -; SI-NEXT: v_readfirstlane_b32 s42, v17 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:8 -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:16 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:24 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:32 -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:40 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:48 -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:72 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:80 -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:88 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:96 +; SI-NEXT: v_readfirstlane_b32 s43, v17 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:8 +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:16 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:24 +; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:32 +; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:64 +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:80 +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:88 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:96 +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:104 +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:112 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:120 +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:128 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:104 -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:112 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:120 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:128 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:136 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:144 -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160 -; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:168 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:176 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:184 -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:192 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:200 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:208 +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:136 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:144 +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:152 +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:168 +; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:176 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:184 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:192 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:200 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:208 ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:216 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:224 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:232 @@ -87345,275 +87440,284 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:320 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:328 ; SI-NEXT: v_readfirstlane_b32 s75, v1 -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332 -; SI-NEXT: v_readfirstlane_b32 s43, v16 -; SI-NEXT: v_readfirstlane_b32 s45, v14 +; SI-NEXT: v_readfirstlane_b32 s76, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:332 +; SI-NEXT: v_readfirstlane_b32 s56, v12 ; SI-NEXT: v_readfirstlane_b32 s73, v3 -; SI-NEXT: v_readfirstlane_b32 s74, v2 ; SI-NEXT: v_readfirstlane_b32 s57, v11 -; SI-NEXT: v_readfirstlane_b32 s72, v4 -; SI-NEXT: v_readfirstlane_b32 s44, v15 +; SI-NEXT: v_readfirstlane_b32 s45, v15 +; SI-NEXT: v_readfirstlane_b32 s46, v14 +; SI-NEXT: v_readfirstlane_b32 s74, v2 +; SI-NEXT: v_readfirstlane_b32 s44, v16 ; SI-NEXT: v_readfirstlane_b32 s47, v13 -; SI-NEXT: v_readfirstlane_b32 s56, v12 ; SI-NEXT: v_readfirstlane_b32 s58, v10 ; SI-NEXT: v_readfirstlane_b32 s59, v9 ; SI-NEXT: v_readfirstlane_b32 s60, v8 ; SI-NEXT: v_readfirstlane_b32 s61, v7 ; SI-NEXT: v_readfirstlane_b32 s62, v6 ; SI-NEXT: v_readfirstlane_b32 s63, v5 +; SI-NEXT: v_readfirstlane_b32 s72, v4 ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v50 -; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v51 -; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v52 -; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v53 -; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v54 -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v55 -; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v40 -; SI-NEXT: v_lshlrev_b32_e32 v60, 8, v41 -; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v42 -; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v43 -; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v46 -; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v56 -; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v59 -; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v61 -; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v44 -; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v45 -; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v47 -; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v57 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 -; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v30 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v29 -; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v28 +; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v35 +; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v52 +; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v53 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v54 +; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v55 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v40 +; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v41 +; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v42 +; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v43 +; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v44 +; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v45 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v46 +; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v47 +; SI-NEXT: v_lshlrev_b32_e32 v42, 8, v56 +; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v57 +; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v58 +; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v59 +; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v60 +; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v51 +; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v50 +; SI-NEXT: v_lshlrev_b32_e32 v43, 24, v39 +; SI-NEXT: v_lshlrev_b32_e32 v61, 8, v38 +; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v37 +; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v36 +; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v31 +; SI-NEXT: v_lshlrev_b32_e32 v47, 8, v30 +; SI-NEXT: v_lshlrev_b32_e32 v57, 24, v29 ; SI-NEXT: s_waitcnt vmcnt(13) -; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27 +; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v28 ; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v26 +; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v27 ; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25 +; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v26 ; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v24 +; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v23 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v22 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v21 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v31, 8, v24 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v23 +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_lshlrev_b32_e32 v30, 8, v22 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v21 +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v20 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v19 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v18 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v17 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:284 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:276 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:268 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:260 -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:252 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292 -; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v48 -; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v34 -; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v32 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:220 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 +; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 +; SI-NEXT: v_lshlrev_b32_e32 v32, 8, v48 ; SI-NEXT: s_and_b64 s[4:5], vcc, exec -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49 -; SI-NEXT: v_lshlrev_b32_e32 v49, 24, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v33 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v33 +; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v49 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 -; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v31 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:188 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180 +; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:172 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:156 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:148 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:124 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:92 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:68 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:52 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:44 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:36 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:28 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:20 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:12 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:92 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:84 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:76 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:60 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:52 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:44 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:36 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:28 +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:20 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:12 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:4 -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; SI-NEXT: s_cbranch_scc0 .LBB59_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: s_and_b32 s4, s42, 0xff +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_and_b32 s4, s46, 0xff -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v31 ; SI-NEXT: v_or_b32_e32 v0, s4, v0 -; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v11, v3 +; SI-NEXT: v_or_b32_e32 v1, v11, v1 ; SI-NEXT: v_or_b32_e32 v11, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v30 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v10 -; SI-NEXT: v_or_b32_e32 v0, v0, v5 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v10 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v9 +; SI-NEXT: v_or_b32_e32 v0, v0, v3 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v12, v1 +; SI-NEXT: v_or_b32_e32 v12, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v8 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v36 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v13, v1 ; SI-NEXT: v_or_b32_e32 v13, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v9 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v8 -; SI-NEXT: v_or_b32_e32 v0, v0, v4 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v7 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v6 +; SI-NEXT: v_or_b32_e32 v0, v0, v62 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v14, v1 ; SI-NEXT: v_or_b32_e32 v14, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v42 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v0, v0, v60 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v5 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v4 +; SI-NEXT: v_or_b32_e32 v0, v0, v35 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v15, v1 ; SI-NEXT: v_or_b32_e32 v15, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v6 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v63 -; SI-NEXT: v_or_b32_e32 v0, v0, v41 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v46 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v49 +; SI-NEXT: v_or_b32_e32 v0, v0, v55 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v16, v1 ; SI-NEXT: v_or_b32_e32 v16, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v61 +; SI-NEXT: v_mov_b32_e32 v49, v37 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v37 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xff, v17 -; SI-NEXT: v_or_b32_e32 v0, v0, v40 +; SI-NEXT: v_or_b32_e32 v0, v0, v63 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v55, v1 +; SI-NEXT: v_or_b32_e32 v1, v34, v1 ; SI-NEXT: v_or_b32_e32 v17, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v44 -; SI-NEXT: v_mov_b32_e32 v55, v54 -; SI-NEXT: v_or_b32_e32 v0, v0, v54 -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v34, v42 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v53, v1 -; SI-NEXT: v_or_b32_e32 v18, v0, v1 -; SI-NEXT: v_mov_b32_e32 v53, v52 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v51, v1 -; SI-NEXT: v_mov_b32_e32 v51, v50 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v12, v2, v3 +; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_mov_b32_e32 v62, v35 +; SI-NEXT: v_mov_b32_e32 v55, v63 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 @@ -87622,229 +87726,236 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_lshl_b32 s77, s19, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s77, s5 +; SI-NEXT: s_or_b32 s77, s4, s5 +; SI-NEXT: s_and_b32 s4, s20, 0xff +; SI-NEXT: s_lshl_b32 s5, s21, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s20, 0xff -; SI-NEXT: s_lshl_b32 s77, s21, 8 -; SI-NEXT: s_or_b32 s5, s5, s77 -; SI-NEXT: s_and_b32 s77, s22, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 +; SI-NEXT: s_and_b32 s5, s22, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s78, s23, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s77, s78, s77 -; SI-NEXT: s_or_b32 s5, s5, s77 -; SI-NEXT: s_and_b32 s77, s24, 0xff -; SI-NEXT: s_lshl_b32 s78, s25, 8 -; SI-NEXT: s_or_b32 s77, s77, s78 -; SI-NEXT: s_and_b32 s78, s26, 0xff -; SI-NEXT: s_lshl_b32 s78, s78, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s78, s5 +; SI-NEXT: s_or_b32 s78, s4, s5 +; SI-NEXT: s_and_b32 s4, s24, 0xff +; SI-NEXT: s_lshl_b32 s5, s25, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s26, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s79, s27, 24 -; SI-NEXT: s_and_b32 s77, s77, 0xffff -; SI-NEXT: s_or_b32 s78, s79, s78 -; SI-NEXT: s_or_b32 s77, s77, s78 -; SI-NEXT: s_and_b32 s78, s28, 0xff -; SI-NEXT: s_lshl_b32 s79, s29, 8 -; SI-NEXT: s_or_b32 s78, s78, s79 -; SI-NEXT: s_and_b32 s79, s76, 0xff -; SI-NEXT: s_lshl_b32 s79, s79, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s79, s5 +; SI-NEXT: s_or_b32 s79, s4, s5 +; SI-NEXT: s_and_b32 s4, s28, 0xff +; SI-NEXT: s_lshl_b32 s5, s29, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s76, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s88, s75, 24 -; SI-NEXT: s_and_b32 s78, s78, 0xffff -; SI-NEXT: s_or_b32 s79, s88, s79 -; SI-NEXT: s_or_b32 s78, s78, s79 -; SI-NEXT: s_and_b32 s79, s74, 0xff -; SI-NEXT: s_lshl_b32 s88, s73, 8 -; SI-NEXT: s_or_b32 s79, s79, s88 -; SI-NEXT: s_and_b32 s88, s72, 0xff -; SI-NEXT: s_lshl_b32 s88, s88, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s88, s5 +; SI-NEXT: s_or_b32 s88, s4, s5 +; SI-NEXT: s_and_b32 s4, s74, 0xff +; SI-NEXT: s_lshl_b32 s5, s73, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s72, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; SI-NEXT: s_lshl_b32 s89, s63, 24 -; SI-NEXT: s_and_b32 s79, s79, 0xffff -; SI-NEXT: s_or_b32 s88, s89, s88 -; SI-NEXT: s_or_b32 s79, s79, s88 -; SI-NEXT: s_and_b32 s88, s62, 0xff -; SI-NEXT: s_lshl_b32 s89, s61, 8 -; SI-NEXT: s_or_b32 s88, s88, s89 -; SI-NEXT: s_and_b32 s89, s60, 0xff -; SI-NEXT: s_lshl_b32 s89, s89, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s89, s5 +; SI-NEXT: s_or_b32 s89, s4, s5 +; SI-NEXT: s_and_b32 s4, s62, 0xff +; SI-NEXT: s_lshl_b32 s5, s61, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s60, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s90, s59, 24 -; SI-NEXT: s_and_b32 s88, s88, 0xffff -; SI-NEXT: s_or_b32 s89, s90, s89 -; SI-NEXT: s_or_b32 s88, s88, s89 -; SI-NEXT: s_and_b32 s89, s58, 0xff -; SI-NEXT: s_lshl_b32 s90, s57, 8 -; SI-NEXT: s_or_b32 s89, s89, s90 -; SI-NEXT: s_and_b32 s90, s56, 0xff -; SI-NEXT: s_lshl_b32 s90, s90, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s90, s5 +; SI-NEXT: s_or_b32 s90, s4, s5 +; SI-NEXT: s_and_b32 s4, s58, 0xff +; SI-NEXT: s_lshl_b32 s5, s57, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s56, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s91, s47, 24 -; SI-NEXT: s_and_b32 s89, s89, 0xffff -; SI-NEXT: s_or_b32 s90, s91, s90 -; SI-NEXT: s_or_b32 s89, s89, s90 -; SI-NEXT: s_and_b32 s90, s45, 0xff -; SI-NEXT: s_lshl_b32 s91, s44, 8 -; SI-NEXT: s_or_b32 s90, s90, s91 -; SI-NEXT: s_and_b32 s91, s43, 0xff -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v54 -; SI-NEXT: v_or_b32_e32 v0, v0, v52 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s91, s5 +; SI-NEXT: s_or_b32 s91, s4, s5 +; SI-NEXT: s_and_b32 s4, s46, 0xff +; SI-NEXT: s_lshl_b32 s5, s45, 8 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v37 +; SI-NEXT: v_or_b32_e32 v0, v0, v42 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v18, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v40 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v19 +; SI-NEXT: v_or_b32_e32 v0, v0, v54 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v53, v1 +; SI-NEXT: v_mov_b32_e32 v54, v53 ; SI-NEXT: v_or_b32_e32 v19, v0, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v36 +; SI-NEXT: v_or_b32_e32 v0, v0, v52 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v49, v1 -; SI-NEXT: v_mov_b32_e32 v49, v48 -; SI-NEXT: s_lshl_b32 s91, s91, 16 -; SI-NEXT: s_lshl_b32 s92, s42, 24 -; SI-NEXT: s_and_b32 s90, s90, 0xffff -; SI-NEXT: s_or_b32 s91, s92, s91 -; SI-NEXT: s_or_b32 s90, s90, s91 -; SI-NEXT: s_and_b32 s91, s41, 0xff -; SI-NEXT: s_lshl_b32 s92, s40, 8 -; SI-NEXT: s_or_b32 s91, s91, s92 -; SI-NEXT: s_and_b32 s92, s15, 0xff -; SI-NEXT: s_lshl_b32 s92, s92, 16 -; SI-NEXT: s_lshl_b32 s93, s14, 24 -; SI-NEXT: s_and_b32 s91, s91, 0xffff -; SI-NEXT: s_or_b32 s92, s93, s92 -; SI-NEXT: s_or_b32 s91, s91, s92 -; SI-NEXT: s_and_b32 s92, s13, 0xff -; SI-NEXT: s_lshl_b32 s93, s12, 8 -; SI-NEXT: s_or_b32 s92, s92, s93 -; SI-NEXT: s_and_b32 s93, s11, 0xff -; SI-NEXT: s_lshl_b32 s93, s93, 16 -; SI-NEXT: s_lshl_b32 s94, s10, 24 -; SI-NEXT: s_and_b32 s92, s92, 0xffff -; SI-NEXT: s_or_b32 s93, s94, s93 -; SI-NEXT: s_or_b32 s92, s92, s93 -; SI-NEXT: s_and_b32 s93, s9, 0xff -; SI-NEXT: s_lshl_b32 s94, s8, 8 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: s_and_b32 s94, s7, 0xff -; SI-NEXT: s_lshl_b32 s94, s94, 16 -; SI-NEXT: s_lshl_b32 s95, s6, 24 -; SI-NEXT: s_and_b32 s93, s93, 0xffff -; SI-NEXT: s_or_b32 s94, s95, s94 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: v_mov_b32_e32 v41, v40 -; SI-NEXT: v_mov_b32_e32 v3, s78 -; SI-NEXT: v_mov_b32_e32 v4, s79 -; SI-NEXT: v_mov_b32_e32 v5, s88 -; SI-NEXT: v_mov_b32_e32 v6, s89 -; SI-NEXT: v_mov_b32_e32 v7, s90 -; SI-NEXT: v_mov_b32_e32 v8, s91 -; SI-NEXT: v_mov_b32_e32 v9, s92 -; SI-NEXT: v_mov_b32_e32 v10, s93 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v52 -; SI-NEXT: v_or_b32_e32 v0, v0, v50 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v51, v1 ; SI-NEXT: v_or_b32_e32 v20, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v38 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 +; SI-NEXT: v_or_b32_e32 v0, v0, v50 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v39, v1 -; SI-NEXT: v_mov_b32_e32 v39, v38 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v50 -; SI-NEXT: v_or_b32_e32 v0, v0, v48 -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 ; SI-NEXT: v_or_b32_e32 v21, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v48 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v22 +; SI-NEXT: v_or_b32_e32 v0, v0, v32 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v37, v1 -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v48 -; SI-NEXT: v_or_b32_e32 v0, v0, v38 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v43, v1 ; SI-NEXT: v_or_b32_e32 v22, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v39 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v23 +; SI-NEXT: v_mov_b32_e32 v52, v51 +; SI-NEXT: v_mov_b32_e32 v33, v32 +; SI-NEXT: v_or_b32_e32 v0, v0, v61 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v35, v1 -; SI-NEXT: v_mov_b32_e32 v35, v34 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v38 -; SI-NEXT: v_or_b32_e32 v0, v0, v36 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v45, v1 ; SI-NEXT: v_or_b32_e32 v23, v0, v1 +; SI-NEXT: v_mov_b32_e32 v45, v44 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v33, v1 -; SI-NEXT: v_mov_b32_e32 v33, v32 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v36 -; SI-NEXT: v_or_b32_e32 v0, v0, v34 +; SI-NEXT: v_or_b32_e32 v1, v56, v1 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s44, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s92, s43, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s92, s5 +; SI-NEXT: s_or_b32 s92, s4, s5 +; SI-NEXT: s_and_b32 s4, s41, 0xff +; SI-NEXT: s_lshl_b32 s5, s40, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s15, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s93, s14, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s93, s5 +; SI-NEXT: s_or_b32 s93, s4, s5 +; SI-NEXT: s_and_b32 s4, s13, 0xff +; SI-NEXT: s_lshl_b32 s5, s12, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s11, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s94, s10, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s94, s5 +; SI-NEXT: s_or_b32 s94, s4, s5 +; SI-NEXT: s_and_b32 s4, s9, 0xff +; SI-NEXT: s_lshl_b32 s5, s8, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s7, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s95, s6, 24 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v42 +; SI-NEXT: v_or_b32_e32 v0, v0, v44 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v24, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v32 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v35 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v25 -; SI-NEXT: v_or_b32_e32 v0, v0, v62 +; SI-NEXT: v_or_b32_e32 v0, v0, v47 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v29, v1 +; SI-NEXT: v_or_b32_e32 v1, v57, v1 ; SI-NEXT: v_or_b32_e32 v25, v0, v1 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v53 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v58 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v28, v1 -; SI-NEXT: v_mov_b32_e32 v62, v29 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v32 -; SI-NEXT: v_or_b32_e32 v0, v0, v59 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v60, v1 ; SI-NEXT: v_or_b32_e32 v26, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v58 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v56 -; SI-NEXT: v_or_b32_e32 v0, v0, v57 +; SI-NEXT: v_mov_b32_e32 v57, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s95, s5 +; SI-NEXT: s_or_b32 s95, s4, s5 +; SI-NEXT: v_mov_b32_e32 v41, v40 +; SI-NEXT: v_mov_b32_e32 v38, v50 +; SI-NEXT: v_mov_b32_e32 v48, v39 +; SI-NEXT: v_mov_b32_e32 v43, v61 +; SI-NEXT: v_mov_b32_e32 v56, v47 +; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: v_mov_b32_e32 v3, s88 +; SI-NEXT: v_mov_b32_e32 v4, s89 +; SI-NEXT: v_mov_b32_e32 v5, s90 +; SI-NEXT: v_mov_b32_e32 v6, s91 +; SI-NEXT: v_mov_b32_e32 v7, s92 +; SI-NEXT: v_mov_b32_e32 v8, s93 +; SI-NEXT: v_mov_b32_e32 v9, s94 +; SI-NEXT: v_mov_b32_e32 v10, s95 +; SI-NEXT: v_mov_b32_e32 v61, v36 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v51 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v32 +; SI-NEXT: v_or_b32_e32 v0, v0, v59 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v27, v1 -; SI-NEXT: v_mov_b32_e32 v57, v27 +; SI-NEXT: v_mov_b32_e32 v59, v27 ; SI-NEXT: v_or_b32_e32 v27, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v47 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v43 -; SI-NEXT: v_or_b32_e32 v0, v0, v45 +; SI-NEXT: v_mov_b32_e32 v40, v37 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v63 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_or_b32_e32 v1, v28, v1 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v44 +; SI-NEXT: v_or_b32_e32 v0, v0, v31 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_mov_b32_e32 v59, v28 ; SI-NEXT: v_or_b32_e32 v28, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v0, 0xff, v46 -; SI-NEXT: v_mov_b32_e32 v45, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: v_mov_b32_e32 v47, v43 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v60, v32 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v58 +; SI-NEXT: v_or_b32_e32 v0, v0, v30 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_or_b32_e32 v1, v29, v1 ; SI-NEXT: v_or_b32_e32 v29, v0, v1 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v30, v0, v1 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -87856,53 +87967,57 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v31, v0, v1 -; SI-NEXT: v_mov_b32_e32 v0, s4 -; SI-NEXT: v_mov_b32_e32 v1, s5 -; SI-NEXT: v_mov_b32_e32 v2, s77 -; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: v_mov_b32_e32 v0, s77 +; SI-NEXT: v_mov_b32_e32 v1, s78 +; SI-NEXT: v_mov_b32_e32 v2, s79 ; SI-NEXT: s_branch .LBB59_3 ; SI-NEXT: .LBB59_2: -; SI-NEXT: v_mov_b32_e32 v55, v54 -; SI-NEXT: v_mov_b32_e32 v53, v52 -; SI-NEXT: v_mov_b32_e32 v51, v50 -; SI-NEXT: v_mov_b32_e32 v49, v48 -; SI-NEXT: v_mov_b32_e32 v39, v38 -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v62, v35 +; SI-NEXT: v_mov_b32_e32 v55, v63 +; SI-NEXT: v_mov_b32_e32 v34, v42 ; SI-NEXT: v_mov_b32_e32 v41, v40 -; SI-NEXT: v_mov_b32_e32 v35, v34 +; SI-NEXT: v_mov_b32_e32 v54, v53 +; SI-NEXT: v_mov_b32_e32 v52, v51 ; SI-NEXT: v_mov_b32_e32 v33, v32 -; SI-NEXT: v_mov_b32_e32 v62, v29 -; SI-NEXT: v_mov_b32_e32 v59, v28 -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: v_mov_b32_e32 v47, v43 -; SI-NEXT: v_mov_b32_e32 v57, v27 +; SI-NEXT: v_mov_b32_e32 v43, v61 +; SI-NEXT: v_mov_b32_e32 v45, v44 +; SI-NEXT: v_mov_b32_e32 v57, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v49, v37 +; SI-NEXT: v_mov_b32_e32 v38, v50 +; SI-NEXT: v_mov_b32_e32 v48, v39 +; SI-NEXT: v_mov_b32_e32 v56, v47 +; SI-NEXT: v_mov_b32_e32 v59, v27 ; SI-NEXT: s_mov_b64 s[4:5], -1 ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: .LBB59_3: ; %Flow -; SI-NEXT: v_mov_b32_e32 v43, v58 -; SI-NEXT: v_mov_b32_e32 v58, v33 -; SI-NEXT: v_mov_b32_e32 v33, v37 -; SI-NEXT: v_mov_b32_e32 v34, v39 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v39, v52 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload ; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] +; SI-NEXT: v_mov_b32_e32 v47, v33 ; SI-NEXT: s_cbranch_vccnz .LBB59_5 ; SI-NEXT: ; %bb.4: ; %cmp.true -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: s_add_i32 s46, s46, 3 -; SI-NEXT: s_and_b32 s4, s46, 0xff -; SI-NEXT: v_mov_b32_e32 v32, v35 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: s_add_i32 s42, s42, 3 +; SI-NEXT: s_and_b32 s4, s42, 0xff +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v33, v48 ; SI-NEXT: s_add_i32 s16, s16, 3 ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_add_i32 s18, s18, 3 @@ -87922,8 +88037,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_add_i32 s56, s56, 3 ; SI-NEXT: s_and_b32 s22, s56, 0xff ; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: s_add_i32 s45, s45, 3 -; SI-NEXT: s_add_i32 s43, s43, 3 +; SI-NEXT: s_add_i32 s46, s46, 3 +; SI-NEXT: s_add_i32 s44, s44, 3 ; SI-NEXT: s_add_i32 s41, s41, 3 ; SI-NEXT: s_add_i32 s13, s13, 3 ; SI-NEXT: s_add_i32 s9, s9, 3 @@ -87956,24 +88071,35 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_or_b32 s6, s6, s8 ; SI-NEXT: s_add_i32 s10, s10, 0x3000000 ; SI-NEXT: s_add_i32 s6, s6, 0x3000000 -; SI-NEXT: v_mov_b32_e32 v9, s10 ; SI-NEXT: v_mov_b32_e32 v10, s6 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v1, s4, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v41 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_and_b32 s16, s18, 0xff @@ -88039,25 +88165,30 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_and_b32 s20, s20, 0xffff ; SI-NEXT: s_or_b32 s21, s21, s22 ; SI-NEXT: s_or_b32 s20, s21, s20 -; SI-NEXT: s_and_b32 s21, s45, 0xff -; SI-NEXT: s_lshl_b32 s22, s44, 8 +; SI-NEXT: s_and_b32 s21, s46, 0xff +; SI-NEXT: s_lshl_b32 s22, s45, 8 ; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: s_and_b32 s23, s43, 0xff +; SI-NEXT: s_and_b32 s23, s44, 0xff ; SI-NEXT: s_addk_i32 s21, 0x300 -; SI-NEXT: s_lshl_b32 s22, s42, 24 +; SI-NEXT: s_lshl_b32 s22, s43, 24 ; SI-NEXT: s_lshl_b32 s23, s23, 16 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; SI-NEXT: s_and_b32 s22, s41, 0xff -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v1, v52, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: s_or_b32 s21, s22, s21 +; SI-NEXT: s_and_b32 s22, s41, 0xff ; SI-NEXT: s_lshl_b32 s23, s40, 8 ; SI-NEXT: s_or_b32 s22, s23, s22 ; SI-NEXT: s_addk_i32 s22, 0x300 @@ -88072,180 +88203,82 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_add_i32 s20, s20, 0x3000000 ; SI-NEXT: s_add_i32 s21, s21, 0x3000000 ; SI-NEXT: s_add_i32 s14, s14, 0x3000000 -; SI-NEXT: v_mov_b32_e32 v4, s18 -; SI-NEXT: v_mov_b32_e32 v5, s19 -; SI-NEXT: v_mov_b32_e32 v6, s20 -; SI-NEXT: v_mov_b32_e32 v7, s21 -; SI-NEXT: v_mov_b32_e32 v8, s14 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v39, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_mov_b32_e32 v3, s17 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v37, v0 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v42, v0 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v41, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v55, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v54 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v53, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_or_b32_e32 v1, v39, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v52 +; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v36, v2 +; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v51, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 +; SI-NEXT: v_or_b32_e32 v0, v38, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v50 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v49, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v48 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v34, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 +; SI-NEXT: v_or_b32_e32 v0, v47, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 +; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v38 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v33, v0 +; SI-NEXT: v_or_b32_e32 v0, v43, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -88255,12 +88288,12 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v36 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v32, v0 +; SI-NEXT: v_or_b32_e32 v0, v45, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -88270,79 +88303,107 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v35 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v0, v56, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v62, v1 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v60 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v53 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v0, v57, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v59, v1 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v51 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v43 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v32 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v57, v1 +; SI-NEXT: v_or_b32_e32 v1, v59, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 0x300, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v45, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v3 +; SI-NEXT: v_mov_b32_e32 v3, s17 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 +; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 +; SI-NEXT: v_or_b32_e32 v4, v62, v4 +; SI-NEXT: v_add_i32_e32 v4, vcc, 0x300, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v46 +; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 +; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v4 +; SI-NEXT: v_mov_b32_e32 v4, s18 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 @@ -88351,33 +88412,76 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v5, vcc, 0x300, v5 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v49 +; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 +; SI-NEXT: v_or_b32_e32 v6, v55, v6 +; SI-NEXT: v_add_i32_e32 v6, vcc, 0x300, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v5 +; SI-NEXT: v_mov_b32_e32 v5, s19 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v40 +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_or_b32_e32 v7, v34, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 0x300, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v6 +; SI-NEXT: v_mov_b32_e32 v6, s20 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v9, v8 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v7 +; SI-NEXT: v_mov_b32_e32 v7, s21 +; SI-NEXT: v_mov_b32_e32 v8, s14 +; SI-NEXT: v_mov_b32_e32 v9, s10 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 @@ -88405,7 +88509,7 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v128i8_to_v16i64_scalar: @@ -88657,18 +88761,18 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -88898,11 +89002,11 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: ; %bb.4: ; %cmp.true ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v0, s17 -; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; VI-NEXT: v_mov_b32_e32 v9, 0xc0c0004 ; VI-NEXT: s_add_i32 s18, s18, 3 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_perm_b32 v0, s16, v0, v11 -; VI-NEXT: v_perm_b32 v1, s18, v1, v11 +; VI-NEXT: v_perm_b32 v0, s16, v0, v9 +; VI-NEXT: v_perm_b32 v1, s18, v1, v9 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -88910,8 +89014,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v1, s21 ; VI-NEXT: s_add_i32 s22, s22, 3 ; VI-NEXT: v_mov_b32_e32 v2, s23 -; VI-NEXT: v_perm_b32 v1, s20, v1, v11 -; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v9 +; VI-NEXT: v_perm_b32 v2, s22, v2, v9 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -88919,8 +89023,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: s_add_i32 s26, s26, 3 ; VI-NEXT: v_mov_b32_e32 v3, s27 -; VI-NEXT: v_perm_b32 v2, s24, v2, v11 -; VI-NEXT: v_perm_b32 v3, s26, v3, v11 +; VI-NEXT: v_perm_b32 v2, s24, v2, v9 +; VI-NEXT: v_perm_b32 v3, s26, v3, v9 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x300, v2 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -88928,8 +89032,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v3, s29 ; VI-NEXT: s_add_i32 s76, s76, 3 ; VI-NEXT: v_mov_b32_e32 v4, s75 -; VI-NEXT: v_perm_b32 v3, s28, v3, v11 -; VI-NEXT: v_perm_b32 v4, s76, v4, v11 +; VI-NEXT: v_perm_b32 v3, s28, v3, v9 +; VI-NEXT: v_perm_b32 v4, s76, v4, v9 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x300, v3 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -88937,8 +89041,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v4, s73 ; VI-NEXT: s_add_i32 s72, s72, 3 ; VI-NEXT: v_mov_b32_e32 v5, s63 -; VI-NEXT: v_perm_b32 v4, s74, v4, v11 -; VI-NEXT: v_perm_b32 v5, s72, v5, v11 +; VI-NEXT: v_perm_b32 v4, s74, v4, v9 +; VI-NEXT: v_perm_b32 v5, s72, v5, v9 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x300, v4 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -88946,8 +89050,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v5, s61 ; VI-NEXT: s_add_i32 s60, s60, 3 ; VI-NEXT: v_mov_b32_e32 v6, s59 -; VI-NEXT: v_perm_b32 v5, s62, v5, v11 -; VI-NEXT: v_perm_b32 v6, s60, v6, v11 +; VI-NEXT: v_perm_b32 v5, s62, v5, v9 +; VI-NEXT: v_perm_b32 v6, s60, v6, v9 ; VI-NEXT: v_add_u32_e32 v5, vcc, 0x300, v5 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -88955,8 +89059,8 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v6, s57 ; VI-NEXT: s_add_i32 s56, s56, 3 ; VI-NEXT: v_mov_b32_e32 v7, s47 -; VI-NEXT: v_perm_b32 v6, s58, v6, v11 -; VI-NEXT: v_perm_b32 v7, s56, v7, v11 +; VI-NEXT: v_perm_b32 v6, s58, v6, v9 +; VI-NEXT: v_perm_b32 v7, s56, v7, v9 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x300, v6 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -88964,38 +89068,38 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v7, s45 ; VI-NEXT: s_add_i32 s44, s44, 3 ; VI-NEXT: v_mov_b32_e32 v8, s43 -; VI-NEXT: v_perm_b32 v7, s46, v7, v11 -; VI-NEXT: v_perm_b32 v8, s44, v8, v11 +; VI-NEXT: v_perm_b32 v7, s46, v7, v9 +; VI-NEXT: v_perm_b32 v8, s44, v8, v9 ; VI-NEXT: v_add_u32_e32 v7, vcc, 0x300, v7 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s42, s42, 3 ; VI-NEXT: v_mov_b32_e32 v8, s41 ; VI-NEXT: s_add_i32 s40, s40, 3 -; VI-NEXT: v_mov_b32_e32 v9, s15 -; VI-NEXT: v_perm_b32 v8, s42, v8, v11 -; VI-NEXT: v_perm_b32 v9, s40, v9, v11 +; VI-NEXT: v_mov_b32_e32 v10, s15 +; VI-NEXT: v_perm_b32 v8, s42, v8, v9 +; VI-NEXT: v_perm_b32 v10, s40, v10, v9 ; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v8 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; VI-NEXT: v_or_b32_sdwa v8, v10, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s14, s14, 3 -; VI-NEXT: v_mov_b32_e32 v9, s13 +; VI-NEXT: v_mov_b32_e32 v10, s13 ; VI-NEXT: s_add_i32 s12, s12, 3 -; VI-NEXT: v_mov_b32_e32 v10, s11 -; VI-NEXT: v_perm_b32 v9, s14, v9, v11 -; VI-NEXT: v_perm_b32 v10, s12, v10, v11 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_mov_b32_e32 v11, s11 +; VI-NEXT: v_perm_b32 v10, s14, v10, v9 +; VI-NEXT: v_perm_b32 v11, s12, v11, v9 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s10, s10, 3 -; VI-NEXT: v_mov_b32_e32 v10, s9 +; VI-NEXT: v_mov_b32_e32 v11, s9 ; VI-NEXT: s_add_i32 s8, s8, 3 ; VI-NEXT: v_mov_b32_e32 v12, s7 -; VI-NEXT: v_perm_b32 v10, s10, v10, v11 -; VI-NEXT: v_perm_b32 v12, s8, v12, v11 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 +; VI-NEXT: v_perm_b32 v11, s10, v11, v9 +; VI-NEXT: v_perm_b32 v12, s8, v12, v9 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload @@ -89022,8 +89126,6 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x3000000, v6 ; VI-NEXT: v_add_u32_e32 v7, vcc, 0x3000000, v7 ; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v9 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10 ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload @@ -89037,9 +89139,9 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_perm_b32 v11, s6, v12, v11 +; VI-NEXT: v_perm_b32 v9, s6, v12, v9 ; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_perm_b32 v16, v16, v17, s4 ; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v60 ; VI-NEXT: v_perm_b32 v17, v17, v18, s4 @@ -89058,93 +89160,95 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; VI-NEXT: v_perm_b32 v12, v12, v13, s4 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v54 +; VI-NEXT: v_or_b32_sdwa v12, v12, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v54 ; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v52 -; VI-NEXT: v_perm_b32 v12, v12, v53, s4 +; VI-NEXT: v_perm_b32 v9, v9, v53, s4 ; VI-NEXT: v_perm_b32 v13, v13, v51, s4 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v12 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v50 -; VI-NEXT: v_perm_b32 v13, v13, v49, s4 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13 -; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v38 -; VI-NEXT: v_perm_b32 v14, v14, v37, s4 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 -; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v34 -; VI-NEXT: v_perm_b32 v15, v15, v33, s4 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15 -; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v62 -; VI-NEXT: v_perm_b32 v16, v16, v61, s4 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16 -; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v41 -; VI-NEXT: v_perm_b32 v17, v17, v40, s4 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17 -; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v42 -; VI-NEXT: v_perm_b32 v18, v18, v47, s4 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18 +; VI-NEXT: v_or_b32_sdwa v13, v13, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v50 +; VI-NEXT: v_perm_b32 v9, v9, v49, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v14, v14, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v38 +; VI-NEXT: v_perm_b32 v9, v9, v37, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v15, v15, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v34 +; VI-NEXT: v_perm_b32 v9, v9, v33, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v16, v16, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v62 +; VI-NEXT: v_perm_b32 v9, v9, v61, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v17, v17, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v41 +; VI-NEXT: v_perm_b32 v9, v9, v40, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v18, v18, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v42 +; VI-NEXT: v_perm_b32 v9, v9, v47, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v46 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v11 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v14 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18 +; VI-NEXT: v_or_b32_sdwa v19, v19, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v46 ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v19, v19, v20, s4 +; VI-NEXT: v_perm_b32 v9, v9, v20, s4 ; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v19 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v20 ; VI-NEXT: v_perm_b32 v20, v20, v21, s4 ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v45 -; VI-NEXT: v_perm_b32 v20, v20, v44, s4 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x300, v20 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19 +; VI-NEXT: v_or_b32_sdwa v20, v20, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v45 +; VI-NEXT: v_perm_b32 v9, v9, v44, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v21 ; VI-NEXT: v_perm_b32 v21, v21, v22, s4 ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v43 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20 +; VI-NEXT: v_or_b32_sdwa v21, v21, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v43 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v21, v21, v22, s4 +; VI-NEXT: v_perm_b32 v9, v9, v22, s4 ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22 ; VI-NEXT: v_perm_b32 v22, v22, v23, s4 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; VI-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v22, v22, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v22, v22, v23, s4 -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v22 +; VI-NEXT: v_perm_b32 v23, v9, v23, s4 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23 -; VI-NEXT: v_perm_b32 v23, v23, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 +; VI-NEXT: v_perm_b32 v24, v9, v24, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v10 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v11 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v13 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v14 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v15 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v16 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v17 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v18 +; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v19 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v20 +; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v21 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v22 +; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v23 +; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v24 ; VI-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload @@ -89581,18 +89685,18 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s27 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -89825,21 +89929,21 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: s_add_i32 s18, s18, 3 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: s_movk_i32 s4, 0x300 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 ; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; GFX9-NEXT: v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; GFX9-NEXT: s_add_i32 s20, s20, 3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: s_add_i32 s22, s22, 3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u32_sdwa v2, v2, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s24, s24, 3 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: s_add_i32 s26, s26, 3 @@ -89932,11 +90036,11 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; GFX9-NEXT: s_waitcnt vmcnt(10) ; GFX9-NEXT: v_add_u32_e32 v14, 3, v48 ; GFX9-NEXT: v_perm_b32 v14, v14, v39, s5 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v15, 3, v36 ; GFX9-NEXT: v_perm_b32 v15, v15, v35, s5 +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload @@ -90191,10 +90295,14 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v16i64_scalar: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:332 +; GFX11-TRUE16-NEXT: ; meta instruction +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:328 +; GFX11-TRUE16-NEXT: ; meta instruction +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:324 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:320 ; GFX11-TRUE16-NEXT: s_clause 0x1f ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:312 ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:308 @@ -90315,291 +90423,280 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo ; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB59_4 ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v131, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v1, s18, s19, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, v165, v162, 0xc0c0004 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3) +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v181, v177, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v167, v166, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v135, v131, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v161, v149, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v147, v144, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v145, v133, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s20, s21, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v0, s2, s3, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s0, s1, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s16, s17, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s74, s73, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s14, s13, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s58, s57, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, s6, s5, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v8 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s46, s45, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v55, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s26, s27, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v6, s24, s25, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s60, s59, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s42, s41, v10 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s44, s43, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v8 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s46, s45, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s14, s13, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v12, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s56, s47, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v8 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v11 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, s40, s15, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s12, s11, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v9 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s6, s5, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v15, v13 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-TRUE16-NEXT: v_perm_b32 v13, v182, v178, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, v180, v176, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s8, s7, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v16 -; GFX11-TRUE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v144, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v17, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v20 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v20 -; GFX11-TRUE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v22 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v21, v22 -; GFX11-TRUE16-NEXT: v_perm_b32 v22, v99, v87, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v24 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v103, v100, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v23, v24 -; GFX11-TRUE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v25, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v28 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s4, v179, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12 +; GFX11-TRUE16-NEXT: v_perm_b32 v24, v102, v98, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v13 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v163, v151, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v17, v14 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v18, v16 +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v150, v148, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v146, v134, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, v164, v160, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v128, v116, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v117, v113, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v16, v15 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v103, v100, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v19, v17 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v129, v118, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v21, v18 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v22, v20 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v119, v115, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v114, v112, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v132, v130, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX11-TRUE16-NEXT: v_perm_b32 v28, v70, v68, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v20, v19 +; GFX11-TRUE16-NEXT: v_perm_b32 v27, v96, v86, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v23, v21 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v99, v87, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v25, v22 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v26, v24 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v85, v82, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v83, v71, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v24, v101, v97, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX11-TRUE16-NEXT: v_perm_b32 v29, v84, v80, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX11-TRUE16-NEXT: v_perm_b32 v30, v81, v69, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v24, v23 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v27, v25 +; GFX11-TRUE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v29, v26 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v30, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v28, v55, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v31, v49, v38, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v183, v39, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v41, v34, v32, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v64, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v27, v28 -; GFX11-TRUE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v30 -; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30 -; GFX11-TRUE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v183 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40 -; GFX11-TRUE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v183 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v40, v41 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX11-TRUE16-NEXT: v_perm_b32 v30, v65, v53, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v40, v52, v50, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX11-TRUE16-NEXT: v_perm_b32 v42, v48, v36, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v183 +; GFX11-TRUE16-NEXT: v_perm_b32 v43, v37, v33, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v41 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v27 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v30, v28 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v40, v31 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v42, v183 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v43, v41 ; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB59_3 ; GFX11-TRUE16-NEXT: .LBB59_2: ; %cmp.true -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, 0xc0c0004 +; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3 +; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v7 ; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v10 ; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3 -; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v7 +; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v7 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s72, s63, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v6, s28, s29, v7 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s62, s61, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s62, s61, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s60, s59, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s58, s57, v7 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s74, s73, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s40, s15, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v6, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s59, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s14, s13, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 ; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s44, s43, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v8 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v11, v12 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s44, s43, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s42, s41, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, s14, s13, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, s12, s11, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s10, s9, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, s8, s7, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s6, s5, v7 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v7 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v13 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v15 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v16, v17 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v167 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v164 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v163 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v161 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v150 ; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s10, s9, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v10, s6, s5, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 ; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10 ; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 @@ -90753,9 +90850,11 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v35 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v32 ; GFX11-TRUE16-NEXT: .LBB59_3: ; %end -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload -; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:320 -; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:324 +; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:328 +; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:332 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-TRUE16-NEXT: .LBB59_4: @@ -90765,10 +90864,14 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; GFX11-FAKE16-LABEL: bitcast_v128i8_to_v16i64_scalar: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:324 +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:332 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:328 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:320 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:324 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:320 ; GFX11-FAKE16-NEXT: s_clause 0x1f ; GFX11-FAKE16-NEXT: scratch_load_u16 v32, off, s32 offset:312 ; GFX11-FAKE16-NEXT: scratch_load_u16 v34, off, s32 offset:308 @@ -90889,291 +90992,280 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; GFX11-FAKE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo ; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB59_4 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v144, v131, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, s18, s19, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v165, v162, 0xc0c0004 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(3) +; GFX11-FAKE16-NEXT: v_perm_b32 v17, v181, v177, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v167, v166, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v144, v131, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v161, v149, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v147, v135, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v145, v133, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v0, s2, s3, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s0, s1, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s74, s73, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v1 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v2, v0 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s72, s63, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s56, s47, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s62, s61, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s14, s13, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s40, s15, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s10, s9, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s58, s57, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, s6, s5, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v7, v8 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s46, s45, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s60, s59, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v64, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s74, s73, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s72, s63, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s62, s61, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s58, s57, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v6, s24, s25, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s60, s59, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v8, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s42, s41, v10 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v9, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s44, s43, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s46, s45, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s42, s41, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s14, s13, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, s10, s9, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v6, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v12, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s56, s47, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v9, v8 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v12, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v13, v14 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s44, s43, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, s40, s15, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s12, s11, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v8 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v12, v9 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s6, s5, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v14, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v15, v13 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v182, v178, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, v180, v176, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s8, s7, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v13, v14 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v15, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v15, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v17, v18 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v147, v135, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v17, v18 -; GFX11-FAKE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v19, v20 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v19, v20 -; GFX11-FAKE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v21, v22 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v21, v22 -; GFX11-FAKE16-NEXT: v_perm_b32 v22, v100, v87, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v23, v24 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v103, v99, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v23, v24 -; GFX11-FAKE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v25, v26 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v25, v26 -; GFX11-FAKE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v27, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s4, v179, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v12 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v102, v98, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v15, v13 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, v163, v151, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v17, v14 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v18, v16 +; GFX11-FAKE16-NEXT: v_perm_b32 v17, v150, v148, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v146, v134, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v164, v160, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v128, v116, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v117, v113, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v16, v15 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v103, v99, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v19, v17 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v129, v118, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v21, v18 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v22, v20 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v119, v115, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v114, v112, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v132, v130, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX11-FAKE16-NEXT: v_perm_b32 v28, v70, v68, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v20, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v27, v96, v86, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v23, v21 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v100, v87, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v25, v22 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v26, v24 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v85, v82, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v83, v71, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v101, v97, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX11-FAKE16-NEXT: v_perm_b32 v29, v84, v80, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX11-FAKE16-NEXT: v_perm_b32 v30, v81, v69, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v24, v23 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v27, v25 +; GFX11-FAKE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v29, v26 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v30, v28 +; GFX11-FAKE16-NEXT: v_perm_b32 v28, v64, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v31, v49, v38, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v183, v39, v35, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v41, v34, v32, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v29, v67, v55, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v27, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v29, v30 -; GFX11-FAKE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v29, v30 -; GFX11-FAKE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v31, v183 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40 -; GFX11-FAKE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v31, v183 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v40, v41 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX11-FAKE16-NEXT: v_perm_b32 v30, v65, v53, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-FAKE16-NEXT: v_perm_b32 v40, v52, v50, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX11-FAKE16-NEXT: v_perm_b32 v42, v48, v36, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v183 +; GFX11-FAKE16-NEXT: v_perm_b32 v43, v37, v33, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v41, 16, v41 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v29, v27 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v30, v28 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v40, v31 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v42, v183 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v43, v41 ; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB59_3 ; GFX11-FAKE16-NEXT: .LBB59_2: ; %cmp.true -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, 0xc0c0004 +; GFX11-FAKE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3 +; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s74, s73, v7 ; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v10 ; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3 -; GFX11-FAKE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s72, s72, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s62, s62, 3 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v10 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v7 +; GFX11-FAKE16-NEXT: s_add_i32 s60, s60, 3 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-FAKE16-NEXT: s_add_i32 s58, s58, 3 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v7 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s72, s63, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v6, s28, s29, v7 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s22, s23, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s62, s61, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-FAKE16-NEXT: s_add_i32 s60, s60, 3 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s22, s23, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s72, s63, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s62, s61, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s60, s59, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s58, s57, v7 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-FAKE16-NEXT: s_add_i32 s58, s58, 3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_add_i32 s56, s56, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s46, s46, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s56, s47, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s28, s29, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s74, s73, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s46, s45, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s44, s44, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s42, s42, 3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-FAKE16-NEXT: s_add_i32 s40, s40, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s14, s14, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s40, s15, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s60, s59, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s58, s57, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s14, s13, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 ; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, 3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v7 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v8, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s44, s43, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s42, s41, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v6, v8 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v11, v12 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s56, s47, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s46, s45, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s44, s43, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s42, s41, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s40, s15, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, s14, s13, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, s12, s11, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s10, s9, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, s8, s7, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s6, s5, v7 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v7 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v8, v9 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v10, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v12, v13 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v14, v15 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v16, v17 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 3, v167 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, 3, v165 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 3, v164 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 3, v163 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 3, v161 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 3, v150 ; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v11, v12 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s10, s9, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s6, s5, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 ; GFX11-FAKE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10 ; GFX11-FAKE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v13, v14 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 @@ -91327,9 +91419,11 @@ define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i3 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v36, v35 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v33, v32 ; GFX11-FAKE16-NEXT: .LBB59_3: ; %end -; GFX11-FAKE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:320 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:324 +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:320 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:324 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:328 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:332 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-FAKE16-NEXT: .LBB59_4: @@ -93376,8 +93470,6 @@ define <16 x i64> @bitcast_v64bf16_to_v16i64(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB62_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v63 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 @@ -93426,6 +93518,8 @@ define <16 x i64> @bitcast_v64bf16_to_v16i64(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32 ; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v32 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload @@ -93443,80 +93537,77 @@ define <16 x i64> @bitcast_v64bf16_to_v16i64(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6 -; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 ; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 ; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8 -; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9 -; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 ; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10 -; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 -; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: s_waitcnt vmcnt(6) ; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 ; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 ; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 -; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 ; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 ; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 ; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 -; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 ; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_alignbit_b32 v2, v3, v2, 16 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 @@ -95945,7 +96036,7 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -95967,100 +96058,79 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_writelane_b32 v63, s36, 2 ; SI-NEXT: v_writelane_b32 v63, s30, 3 ; SI-NEXT: v_writelane_b32 v63, s31, 4 -; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 -; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 -; SI-NEXT: v_readfirstlane_b32 s30, v1 -; SI-NEXT: v_readfirstlane_b32 s34, v0 -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s12 -; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2 -; SI-NEXT: s_and_b32 s31, s30, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6 -; SI-NEXT: v_readfirstlane_b32 s94, v3 -; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s31 +; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 ; SI-NEXT: v_readfirstlane_b32 s90, v5 -; SI-NEXT: s_and_b32 s95, s94, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_hi -; SI-NEXT: v_readfirstlane_b32 s88, v6 +; SI-NEXT: v_readfirstlane_b32 s76, v8 ; SI-NEXT: s_and_b32 s91, s90, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s95 -; SI-NEXT: v_readfirstlane_b32 s78, v7 -; SI-NEXT: s_and_b32 s89, s88, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_readfirstlane_b32 s34, v0 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s14 +; SI-NEXT: s_and_b32 s77, s76, 0xffff0000 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s91 -; SI-NEXT: v_readfirstlane_b32 s76, v8 -; SI-NEXT: s_and_b32 s79, s78, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: s_and_b32 s41, s16, 0xffff0000 +; SI-NEXT: s_lshl_b32 s76, s76, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s89 -; SI-NEXT: v_readfirstlane_b32 s74, v9 -; SI-NEXT: s_and_b32 s77, s76, 0xffff0000 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77 +; SI-NEXT: v_readfirstlane_b32 s30, v1 +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s41 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s76 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: v_readfirstlane_b32 s72, v10 -; SI-NEXT: s_and_b32 s75, s74, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77 ; SI-NEXT: v_readfirstlane_b32 s62, v11 ; SI-NEXT: s_and_b32 s73, s72, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s75 ; SI-NEXT: v_readfirstlane_b32 s60, v12 ; SI-NEXT: s_and_b32 s63, s62, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s73 ; SI-NEXT: v_readfirstlane_b32 s58, v13 ; SI-NEXT: s_and_b32 s61, s60, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s63 ; SI-NEXT: v_readfirstlane_b32 s56, v14 ; SI-NEXT: s_and_b32 s59, s58, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s61 -; SI-NEXT: v_readfirstlane_b32 s46, v15 +; SI-NEXT: v_readfirstlane_b32 s44, v16 ; SI-NEXT: s_and_b32 s57, s56, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s59 -; SI-NEXT: v_readfirstlane_b32 s44, v16 -; SI-NEXT: s_and_b32 s47, s46, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57 -; SI-NEXT: v_readfirstlane_b32 s42, v17 ; SI-NEXT: s_and_b32 s45, s44, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s47 -; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 -; SI-NEXT: v_readfirstlane_b32 s92, v4 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57 +; SI-NEXT: s_lshl_b32 s44, s44, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s44 +; SI-NEXT: v_readfirstlane_b32 s42, v17 +; SI-NEXT: v_readfirstlane_b32 s46, v15 +; SI-NEXT: v_readfirstlane_b32 s74, v9 +; SI-NEXT: v_readfirstlane_b32 s78, v7 +; SI-NEXT: v_readfirstlane_b32 s88, v6 +; SI-NEXT: v_readfirstlane_b32 s92, v4 +; SI-NEXT: v_readfirstlane_b32 s94, v3 +; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2 ; SI-NEXT: s_and_b32 s4, s29, 0xffff0000 ; SI-NEXT: s_lshl_b32 s5, s29, 16 +; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 ; SI-NEXT: s_lshl_b32 s7, s28, 16 ; SI-NEXT: s_and_b32 s8, s27, 0xffff0000 ; SI-NEXT: s_lshl_b32 s9, s27, 16 ; SI-NEXT: s_and_b32 s10, s26, 0xffff0000 ; SI-NEXT: s_lshl_b32 s11, s26, 16 +; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 ; SI-NEXT: s_lshl_b32 s13, s25, 16 -; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 ; SI-NEXT: s_lshl_b32 s15, s24, 16 ; SI-NEXT: s_and_b32 s24, s23, 0xffff0000 ; SI-NEXT: s_lshl_b32 s23, s23, 16 @@ -96076,528 +96146,559 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a ; SI-NEXT: s_lshl_b32 s18, s18, 16 ; SI-NEXT: s_and_b32 s40, s17, 0xffff0000 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_and_b32 s41, s16, 0xffff0000 ; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 ; SI-NEXT: s_lshl_b32 s42, s42, 16 -; SI-NEXT: s_lshl_b32 s44, s44, 16 +; SI-NEXT: s_and_b32 s47, s46, 0xffff0000 ; SI-NEXT: s_lshl_b32 s46, s46, 16 ; SI-NEXT: s_lshl_b32 s56, s56, 16 ; SI-NEXT: s_lshl_b32 s58, s58, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_lshl_b32 s60, s60, 16 ; SI-NEXT: s_lshl_b32 s62, s62, 16 ; SI-NEXT: s_lshl_b32 s72, s72, 16 +; SI-NEXT: s_and_b32 s75, s74, 0xffff0000 ; SI-NEXT: s_lshl_b32 s74, s74, 16 -; SI-NEXT: s_lshl_b32 s76, s76, 16 +; SI-NEXT: s_and_b32 s79, s78, 0xffff0000 ; SI-NEXT: s_lshl_b32 s78, s78, 16 +; SI-NEXT: s_and_b32 s89, s88, 0xffff0000 ; SI-NEXT: s_lshl_b32 s88, s88, 16 ; SI-NEXT: s_lshl_b32 s90, s90, 16 ; SI-NEXT: s_and_b32 s93, s92, 0xffff0000 ; SI-NEXT: s_lshl_b32 s92, s92, 16 +; SI-NEXT: s_and_b32 s95, s94, 0xffff0000 ; SI-NEXT: s_lshl_b32 s94, s94, 16 +; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000 ; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16 +; SI-NEXT: s_and_b32 s31, s30, 0xffff0000 ; SI-NEXT: s_lshl_b32 s30, s30, 16 ; SI-NEXT: s_and_b32 s35, s34, 0xffff0000 ; SI-NEXT: s_lshl_b32 s34, s34, 16 ; SI-NEXT: v_readfirstlane_b32 s36, v18 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43 ; SI-NEXT: s_cmp_lg_u32 s36, 0 -; SI-NEXT: v_mul_f32_e64 v55, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v53, 1.0, s40 -; SI-NEXT: v_mul_f32_e64 v3, 1.0, s29 -; SI-NEXT: v_mul_f32_e64 v4, 1.0, s28 -; SI-NEXT: v_mul_f32_e64 v62, 1.0, s27 -; SI-NEXT: v_mul_f32_e64 v6, 1.0, s26 -; SI-NEXT: v_mul_f32_e64 v7, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v3, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v11, 1.0, s40 +; SI-NEXT: v_mul_f32_e64 v36, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v9, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v40, 1.0, s18 +; SI-NEXT: v_mul_f32_e64 v6, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v22, 1.0, s19 +; SI-NEXT: v_mul_f32_e64 v5, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v35, 1.0, s20 +; SI-NEXT: v_mul_f32_e64 v7, 1.0, s26 +; SI-NEXT: v_mul_f32_e64 v34, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v62, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v33, 1.0, s22 ; SI-NEXT: v_mul_f32_e64 v8, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v9, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v11, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v61, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v60, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v10, 1.0, s12 +; SI-NEXT: v_mul_f32_e64 v59, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v20, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v53, 1.0, s11 ; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s35 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s93 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: v_mul_f32_e64 v43, 1.0, s16 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17 -; SI-NEXT: v_mul_f32_e64 v34, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v17, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v20, 1.0, s20 -; SI-NEXT: v_mul_f32_e64 v19, 1.0, s21 -; SI-NEXT: v_mul_f32_e64 v13, 1.0, s22 -; SI-NEXT: v_mul_f32_e64 v31, 1.0, s23 -; SI-NEXT: v_mul_f32_e64 v23, 1.0, s15 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s13 -; SI-NEXT: v_mul_f32_e64 v30, 1.0, s11 -; SI-NEXT: v_mul_f32_e64 v27, 1.0, s9 -; SI-NEXT: v_mul_f32_e64 v61, 1.0, s7 -; SI-NEXT: v_mul_f32_e64 v29, 1.0, s5 -; SI-NEXT: v_mul_f32_e64 v15, 1.0, s34 -; SI-NEXT: v_mul_f32_e64 v60, 1.0, s30 -; SI-NEXT: v_mul_f32_e64 v33, 1.0, vcc_lo -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s94 -; SI-NEXT: v_mul_f32_e64 v59, 1.0, s92 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s90 -; SI-NEXT: v_mul_f32_e64 v38, 1.0, s88 -; SI-NEXT: v_mul_f32_e64 v22, 1.0, s78 -; SI-NEXT: v_mul_f32_e64 v36, 1.0, s76 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s74 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s72 -; SI-NEXT: v_mul_f32_e64 v49, 1.0, s62 +; SI-NEXT: v_mul_f32_e64 v51, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v13, 1.0, s6 +; SI-NEXT: v_mul_f32_e64 v43, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v14, 1.0, s4 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v15, 1.0, s35 +; SI-NEXT: v_mul_f32_e64 v32, 1.0, s34 +; SI-NEXT: v_mul_f32_e64 v17, 1.0, s31 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s30 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, vcc_hi +; SI-NEXT: v_mul_f32_e64 v48, 1.0, vcc_lo +; SI-NEXT: v_mul_f32_e64 v18, 1.0, s95 +; SI-NEXT: v_mul_f32_e64 v55, 1.0, s94 +; SI-NEXT: v_mul_f32_e64 v19, 1.0, s93 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s92 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s90 +; SI-NEXT: v_mul_f32_e64 v21, 1.0, s89 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s88 +; SI-NEXT: v_mul_f32_e64 v27, 1.0, s79 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s78 +; SI-NEXT: v_mul_f32_e64 v49, 1.0, s75 +; SI-NEXT: v_mul_f32_e64 v24, 1.0, s74 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s72 +; SI-NEXT: v_mul_f32_e64 v26, 1.0, s62 ; SI-NEXT: v_mul_f32_e64 v45, 1.0, s60 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s58 -; SI-NEXT: v_mul_f32_e64 v51, 1.0, s56 -; SI-NEXT: v_mul_f32_e64 v41, 1.0, s46 -; SI-NEXT: v_mul_f32_e64 v54, 1.0, s44 -; SI-NEXT: v_mul_f32_e64 v52, 1.0, s42 -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v28, 1.0, s58 +; SI-NEXT: v_mul_f32_e64 v52, 1.0, s56 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s47 +; SI-NEXT: v_mul_f32_e64 v30, 1.0, s46 +; SI-NEXT: v_mul_f32_e64 v44, 1.0, s43 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s42 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; SI-NEXT: s_cbranch_scc0 .LBB63_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v55 -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v53 +; SI-NEXT: v_mov_b32_e32 v0, v3 +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v44, v1 -; SI-NEXT: v_mov_b32_e32 v43, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v4 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v62 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v12 -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: v_mov_b32_e32 v36, v47 -; SI-NEXT: v_mov_b32_e32 v50, v49 -; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v40, v41 -; SI-NEXT: s_mov_b64 s[4:5], 0 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v1, v43 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[0:1], v[3:4], 16 +; SI-NEXT: v_mov_b32_e32 v1, v36 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v11 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[1:2], v[43:44], 16 -; SI-NEXT: v_mov_b32_e32 v2, v34 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[1:2], v[36:37], 16 +; SI-NEXT: v_mov_b32_e32 v2, v40 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v9 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[2:3], v[34:35], 16 -; SI-NEXT: v_mov_b32_e32 v3, v17 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[2:3], v[40:41], 16 +; SI-NEXT: v_mov_b32_e32 v3, v22 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v6 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 16 -; SI-NEXT: v_mov_b32_e32 v4, v20 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[3:4], v[22:23], 16 +; SI-NEXT: v_mov_b32_e32 v4, v35 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v5 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[4:5], v[20:21], 16 -; SI-NEXT: v_mov_b32_e32 v5, v19 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v6 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[4:5], v[35:36], 16 +; SI-NEXT: v_mov_b32_e32 v5, v34 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v7 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[5:6], v[19:20], 16 -; SI-NEXT: v_mov_b32_e32 v6, v13 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[5:6], v[34:35], 16 +; SI-NEXT: v_mov_b32_e32 v6, v33 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v62 +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[6:7], v[13:14], 16 -; SI-NEXT: v_mov_b32_e32 v7, v31 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[6:7], v[33:34], 16 +; SI-NEXT: v_mov_b32_e32 v7, v61 +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[7:8], v[31:32], 16 -; SI-NEXT: v_mov_b32_e32 v8, v23 -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v8 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[8:9], v[23:24], 16 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v44, v45 -; SI-NEXT: v_mov_b32_e32 v32, v59 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 -; SI-NEXT: v_mov_b32_e32 v9, v25 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[7:8], v[61:62], 16 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v20 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v12 +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[9:10], v[25:26], 16 -; SI-NEXT: v_mov_b32_e32 v10, v30 -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_mov_b32_e32 v25, v49 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v56 +; SI-NEXT: v_mov_b32_e32 v20, v56 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v18 +; SI-NEXT: v_mov_b32_e32 v31, v47 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v27 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v8 +; SI-NEXT: v_mov_b32_e32 v8, v60 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[10:11], v[30:31], 16 -; SI-NEXT: v_mov_b32_e32 v11, v27 -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[8:9], v[60:61], 16 +; SI-NEXT: v_mov_b32_e32 v9, v59 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v10 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[11:12], v[27:28], 16 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v16 -; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v17 -; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v18 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v27 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v12 -; SI-NEXT: v_mov_b32_e32 v12, v61 +; SI-NEXT: v_lshr_b64 v[9:10], v[59:60], 16 +; SI-NEXT: v_mov_b32_e32 v10, v53 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[10:11], v[53:54], 16 +; SI-NEXT: v_mov_b32_e32 v11, v51 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[12:13], v[61:62], 16 -; SI-NEXT: v_mov_b32_e32 v13, v29 -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[11:12], v[51:52], 16 +; SI-NEXT: v_mov_b32_e32 v12, v43 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[13:14], v[29:30], 16 -; SI-NEXT: v_mov_b32_e32 v14, v15 -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v62, v39 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v62 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v21 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v25 -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v26 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28 +; SI-NEXT: v_lshr_b64 v[12:13], v[43:44], 16 +; SI-NEXT: v_mov_b32_e32 v13, v39 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[14:15], v[15:16], 16 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v30 +; SI-NEXT: v_lshr_b64 v[13:14], v[39:40], 16 +; SI-NEXT: v_mov_b32_e32 v14, v32 +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[14:15], v[32:33], 16 +; SI-NEXT: v_mov_b32_e32 v15, v16 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v39, v48 +; SI-NEXT: v_mov_b32_e32 v54, v55 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v19 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v21 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[15:16], v[16:17], 16 +; SI-NEXT: v_lshr_b64 v[16:17], v[48:49], 16 +; SI-NEXT: v_mov_b32_e32 v48, v18 +; SI-NEXT: v_lshr_b64 v[17:18], v[55:56], 16 +; SI-NEXT: v_mov_b32_e32 v18, v42 +; SI-NEXT: v_mov_b32_e32 v55, v19 +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[18:19], v[42:43], 16 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v56, v20 +; SI-NEXT: v_mov_b32_e32 v49, v25 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v15 -; SI-NEXT: v_mov_b32_e32 v15, v60 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v19 +; SI-NEXT: v_mov_b32_e32 v19, v50 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[60:61], 16 -; SI-NEXT: v_mov_b32_e32 v16, v33 -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[50:51], 16 +; SI-NEXT: v_mov_b32_e32 v20, v58 +; SI-NEXT: v_mov_b32_e32 v50, v21 +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[16:17], v[33:34], 16 -; SI-NEXT: v_mov_b32_e32 v17, v57 -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[20:21], v[58:59], 16 +; SI-NEXT: v_mov_b32_e32 v21, v46 +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[17:18], v[57:58], 16 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v47 -; SI-NEXT: v_lshr_b64 v[18:19], v[59:60], 16 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v20 -; SI-NEXT: v_lshr_b64 v[19:20], v[56:57], 16 -; SI-NEXT: v_mov_b32_e32 v20, v38 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[21:22], v[46:47], 16 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v36 +; SI-NEXT: v_mov_b32_e32 v47, v31 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22 +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16 +; SI-NEXT: v_mov_b32_e32 v23, v24 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[20:21], v[38:39], 16 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v24 +; SI-NEXT: v_lshr_b64 v[23:24], v[24:25], 16 +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; SI-NEXT: v_mov_b32_e32 v39, v62 -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21 -; SI-NEXT: v_mov_b32_e32 v21, v22 -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v24 +; SI-NEXT: v_lshr_b64 v[24:25], v[57:58], 16 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v25 +; SI-NEXT: v_mov_b32_e32 v25, v26 +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[21:22], v[22:23], 16 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v55 +; SI-NEXT: v_lshr_b64 v[25:26], v[26:27], 16 +; SI-NEXT: v_lshr_b64 v[26:27], v[45:46], 16 +; SI-NEXT: v_mov_b32_e32 v46, v28 +; SI-NEXT: v_lshr_b64 v[27:28], v[28:29], 16 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22 -; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16 -; SI-NEXT: v_lshr_b64 v[23:24], v[46:47], 16 -; SI-NEXT: v_lshr_b64 v[24:25], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[25:26], v[50:51], 16 -; SI-NEXT: v_lshr_b64 v[26:27], v[44:45], 16 -; SI-NEXT: v_lshr_b64 v[27:28], v[42:43], 16 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v53 -; SI-NEXT: v_lshr_b64 v[61:62], v[52:53], 16 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v45, v44 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v47, v36 -; SI-NEXT: v_mov_b32_e32 v36, v37 -; SI-NEXT: v_mov_b32_e32 v49, v50 -; SI-NEXT: v_mov_b32_e32 v51, v33 -; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16 -; SI-NEXT: v_lshr_b64 v[29:30], v[40:41], 16 -; SI-NEXT: v_lshr_b64 v[30:31], v[54:55], 16 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v29, v30 +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_mov_b32_e32 v44, v32 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[29:30], v[30:31], 16 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v32 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshr_b64 v[61:62], v[30:31], 16 +; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v53 +; SI-NEXT: v_mov_b32_e32 v53, v30 +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16 ; SI-NEXT: v_mov_b32_e32 v31, v61 -; SI-NEXT: v_mov_b32_e32 v41, v40 ; SI-NEXT: s_branch .LBB63_3 ; SI-NEXT: .LBB63_2: -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v32, v59 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v58, v56 +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v39, v48 +; SI-NEXT: v_mov_b32_e32 v54, v55 +; SI-NEXT: v_mov_b32_e32 v48, v18 +; SI-NEXT: v_mov_b32_e32 v55, v19 +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: v_mov_b32_e32 v46, v28 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_mov_b32_e32 v50, v21 +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: .LBB63_3: ; %Flow -; SI-NEXT: v_mov_b32_e32 v37, v32 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_mov_b32_e32 v53, v39 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v35, v54 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_mov_b32_e32 v33, v38 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v33, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) expcnt(3) -; SI-NEXT: v_mov_b32_e32 v38, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v50, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v40, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v51, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0) +; SI-NEXT: v_mov_b32_e32 v54, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v39, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v34, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v40, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v43, v58 ; SI-NEXT: s_cbranch_vccnz .LBB63_5 ; SI-NEXT: ; %bb.4: ; %cmp.true -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v55 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v43 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v53 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v62 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v56 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v48 +; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18 +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v34, v56 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v47 -; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v34 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 -; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 -; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23 -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31 -; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 -; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 -; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 -; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 -; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 -; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 -; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 -; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v40 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v43 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v62 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v42 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 -; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v41 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v40 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v34 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v39 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 ; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 -; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v54 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 +; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 +; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28 +; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 +; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 +; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 +; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 @@ -96606,99 +96707,85 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 ; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v50 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 -; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v51 +; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 ; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16 ; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v38 ; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 ; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v33 ; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v39 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v32 ; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 ; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16 -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v33 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v44 +; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16 -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v32 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v52 -; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 -; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v35 ; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v55 +; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32 +; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 +; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16 ; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 ; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16 -; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v37 -; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 ; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16 -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v58 -; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 -; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 +; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 ; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21 +; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v50 ; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 ; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 +; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21 ; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 @@ -96707,32 +96794,68 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16 -; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v36 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22 ; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 +; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v46 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v49 +; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 ; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16 -; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v48 +; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v57 ; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 ; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16 -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v49 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 ; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 +; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16 ; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v45 ; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 ; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16 -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v42 +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v46 ; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 ; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16 -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v51 +; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v52 ; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 ; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16 -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v41 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v47 +; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 ; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 ; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16 -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v54 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 ; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31 +; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16 ; SI-NEXT: v_mov_b32_e32 v31, v32 ; SI-NEXT: .LBB63_5: ; %end @@ -96757,33 +96880,34 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v64bf16_to_v16i64_scalar: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v35, s36, 0 -; VI-NEXT: v_writelane_b32 v35, s37, 1 -; VI-NEXT: v_writelane_b32 v35, s38, 2 -; VI-NEXT: v_writelane_b32 v35, s39, 3 -; VI-NEXT: v_writelane_b32 v35, s48, 4 -; VI-NEXT: v_writelane_b32 v35, s49, 5 -; VI-NEXT: v_writelane_b32 v35, s50, 6 -; VI-NEXT: v_writelane_b32 v35, s51, 7 -; VI-NEXT: v_writelane_b32 v35, s52, 8 -; VI-NEXT: v_writelane_b32 v35, s53, 9 -; VI-NEXT: v_writelane_b32 v35, s54, 10 -; VI-NEXT: v_writelane_b32 v35, s55, 11 -; VI-NEXT: v_writelane_b32 v35, s64, 12 -; VI-NEXT: v_writelane_b32 v35, s65, 13 -; VI-NEXT: v_writelane_b32 v35, s66, 14 -; VI-NEXT: v_writelane_b32 v35, s67, 15 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: v_writelane_b32 v41, s36, 0 +; VI-NEXT: v_writelane_b32 v41, s37, 1 +; VI-NEXT: v_writelane_b32 v41, s38, 2 +; VI-NEXT: v_writelane_b32 v41, s39, 3 +; VI-NEXT: v_writelane_b32 v41, s48, 4 +; VI-NEXT: v_writelane_b32 v41, s49, 5 +; VI-NEXT: v_writelane_b32 v41, s50, 6 +; VI-NEXT: v_writelane_b32 v41, s51, 7 +; VI-NEXT: v_writelane_b32 v41, s52, 8 +; VI-NEXT: v_writelane_b32 v41, s53, 9 +; VI-NEXT: v_writelane_b32 v41, s54, 10 +; VI-NEXT: v_writelane_b32 v41, s55, 11 +; VI-NEXT: v_writelane_b32 v41, s64, 12 +; VI-NEXT: v_writelane_b32 v41, s65, 13 +; VI-NEXT: v_writelane_b32 v41, s66, 14 +; VI-NEXT: v_writelane_b32 v41, s67, 15 ; VI-NEXT: v_readfirstlane_b32 s4, v18 ; VI-NEXT: s_mov_b32 s49, s29 ; VI-NEXT: s_mov_b32 s48, s28 @@ -96822,9 +96946,27 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB63_4 ; VI-NEXT: .LBB63_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v32, 0x40c00000 +; VI-NEXT: s_lshl_b32 s4, s51, 16 +; VI-NEXT: v_mov_b32_e32 v17, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; VI-NEXT: s_lshl_b32 s4, s50, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 @@ -96832,588 +96974,571 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 ; VI-NEXT: s_and_b32 s4, s50, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v32 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s48, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v32 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: s_lshl_b32 s4, s49, 16 ; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s46, 16 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[2:3] ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s48, 16 +; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s47, 16 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s46, 16 +; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s45, 16 ; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s44, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s44, 16 +; VI-NEXT: v_lshrrev_b64 v[34:35], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s43, 16 ; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s42, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s42, 16 +; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s41, 16 ; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s40, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s40, 16 +; VI-NEXT: v_lshrrev_b64 v[36:37], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s39, 16 ; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s38, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s38, 16 +; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s37, 16 ; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s36, 16 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc -; VI-NEXT: v_bfe_u32 v3, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v0 +; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s36, 16 +; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc +; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: s_and_b32 s4, s66, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 +; VI-NEXT: s_lshl_b32 s4, s67, 16 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s67, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s66, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s66, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[48:49], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s64, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s65, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s65, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s64, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s64, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[49:50], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s62, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s63, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s63, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s62, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s62, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[50:51], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s60, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s61, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s61, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s60, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s60, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[51:52], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s58, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s59, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s59, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s58, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s58, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[52:53], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s56, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s57, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s57, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s56, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s56, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[53:54], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s54, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s55, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s55, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s54, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s54, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[54:55], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s52, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s53, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s53, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v39, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s52, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s52, 16 +; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s52, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v16, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s37, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: s_lshl_b32 s4, s39, 16 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc -; VI-NEXT: v_add_f32_e32 v5, s4, v32 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s4, v32 -; VI-NEXT: v_mov_b32_e32 v1, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v7, v9, vcc -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: s_lshl_b32 s4, s41, 16 -; VI-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc -; VI-NEXT: v_add_f32_e32 v7, s4, v32 -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v3 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s4, v32 -; VI-NEXT: v_mov_b32_e32 v3, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v9, v11, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: s_lshl_b32 s4, s43, 16 -; VI-NEXT: v_cndmask_b32_e32 v7, v9, v11, vcc -; VI-NEXT: v_add_f32_e32 v9, s4, v32 -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v5 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s4, v32 -; VI-NEXT: v_mov_b32_e32 v5, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: s_lshl_b32 s4, s45, 16 -; VI-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc -; VI-NEXT: v_add_f32_e32 v11, s4, v32 -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[15:16] -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s4, v32 -; VI-NEXT: v_mov_b32_e32 v7, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v13, v15, vcc -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: s_lshl_b32 s4, s47, 16 -; VI-NEXT: v_cndmask_b32_e32 v11, v13, v15, vcc -; VI-NEXT: v_add_f32_e32 v13, s4, v32 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v9 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v32 -; VI-NEXT: v_mov_b32_e32 v9, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: s_lshl_b32 s4, s49, 16 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v17, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v15, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v11 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v15 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_add_f32_e32 v15, s4, v32 +; VI-NEXT: v_lshrrev_b64 v[39:40], 16, v[39:40] +; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v1 +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] +; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[16:17] +; VI-NEXT: v_mov_b32_e32 v1, v38 +; VI-NEXT: v_mov_b32_e32 v3, v37 +; VI-NEXT: v_mov_b32_e32 v5, v36 +; VI-NEXT: v_mov_b32_e32 v7, v35 +; VI-NEXT: v_mov_b32_e32 v9, v34 ; VI-NEXT: v_mov_b32_e32 v11, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v17, v19, vcc -; VI-NEXT: v_bfe_u32 v17, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v15 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: s_lshl_b32 s4, s51, 16 -; VI-NEXT: v_cndmask_b32_e32 v15, v17, v19, vcc -; VI-NEXT: v_add_f32_e32 v17, s4, v32 -; VI-NEXT: v_bfe_u32 v19, v17, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: s_and_b32 s4, s53, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; VI-NEXT: v_add_f32_e32 v17, s4, v32 -; VI-NEXT: v_mov_b32_e32 v13, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v19, v21, vcc -; VI-NEXT: v_bfe_u32 v19, v17, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; VI-NEXT: s_lshl_b32 s4, s53, 16 -; VI-NEXT: v_cndmask_b32_e32 v17, v19, v21, vcc -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v15 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: s_and_b32 s4, s55, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_mov_b32_e32 v15, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v21, v23, vcc -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: s_lshl_b32 s4, s55, 16 -; VI-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v17 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: s_and_b32 s4, s57, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_mov_b32_e32 v17, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v23, v25, vcc -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: s_lshl_b32 s4, s57, 16 -; VI-NEXT: v_cndmask_b32_e32 v21, v23, v25, vcc -; VI-NEXT: v_add_f32_e32 v23, s4, v32 -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v19 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: s_and_b32 s4, s59, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: v_add_f32_e32 v23, s4, v32 -; VI-NEXT: v_mov_b32_e32 v19, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v25, v27, vcc -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: s_lshl_b32 s4, s59, 16 -; VI-NEXT: v_cndmask_b32_e32 v23, v25, v27, vcc -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: s_and_b32 s4, s61, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_mov_b32_e32 v21, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v27, v29, vcc -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: s_lshl_b32 s4, s61, 16 -; VI-NEXT: v_cndmask_b32_e32 v25, v27, v29, vcc -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v23 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: s_and_b32 s4, s63, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_mov_b32_e32 v23, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v29, v31, vcc -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: s_lshl_b32 s4, s63, 16 -; VI-NEXT: v_cndmask_b32_e32 v27, v29, v31, vcc -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v25 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: s_and_b32 s4, s65, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v25, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v31, v33, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v27 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: v_mov_b32_e32 v27, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: s_lshl_b32 s4, s65, 16 -; VI-NEXT: v_cndmask_b32_e32 v29, v31, v33, vcc -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: s_and_b32 s4, s67, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_mov_b32_e32 v29, v33 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: s_lshl_b32 s4, s67, 16 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v32, v31, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_add_u32_e32 v32, vcc, v32, v31 -; VI-NEXT: v_add_u32_e32 v32, vcc, 0x7fff, v32 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v31, v32, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v33 -; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[31:32] +; VI-NEXT: v_mov_b32_e32 v13, v15 +; VI-NEXT: v_mov_b32_e32 v15, v32 +; VI-NEXT: v_mov_b32_e32 v17, v39 +; VI-NEXT: v_mov_b32_e32 v19, v54 +; VI-NEXT: v_mov_b32_e32 v21, v53 +; VI-NEXT: v_mov_b32_e32 v23, v52 +; VI-NEXT: v_mov_b32_e32 v25, v51 +; VI-NEXT: v_mov_b32_e32 v27, v50 +; VI-NEXT: v_mov_b32_e32 v29, v49 +; VI-NEXT: v_mov_b32_e32 v31, v48 ; VI-NEXT: s_branch .LBB63_5 ; VI-NEXT: .LBB63_3: ; VI-NEXT: s_branch .LBB63_2 @@ -97451,24 +97576,25 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a ; VI-NEXT: v_mov_b32_e32 v30, s66 ; VI-NEXT: v_mov_b32_e32 v31, s67 ; VI-NEXT: .LBB63_5: ; %end -; VI-NEXT: v_readlane_b32 s67, v35, 15 -; VI-NEXT: v_readlane_b32 s66, v35, 14 -; VI-NEXT: v_readlane_b32 s65, v35, 13 -; VI-NEXT: v_readlane_b32 s64, v35, 12 -; VI-NEXT: v_readlane_b32 s55, v35, 11 -; VI-NEXT: v_readlane_b32 s54, v35, 10 -; VI-NEXT: v_readlane_b32 s53, v35, 9 -; VI-NEXT: v_readlane_b32 s52, v35, 8 -; VI-NEXT: v_readlane_b32 s51, v35, 7 -; VI-NEXT: v_readlane_b32 s50, v35, 6 -; VI-NEXT: v_readlane_b32 s49, v35, 5 -; VI-NEXT: v_readlane_b32 s48, v35, 4 -; VI-NEXT: v_readlane_b32 s39, v35, 3 -; VI-NEXT: v_readlane_b32 s38, v35, 2 -; VI-NEXT: v_readlane_b32 s37, v35, 1 -; VI-NEXT: v_readlane_b32 s36, v35, 0 -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: v_readlane_b32 s67, v41, 15 +; VI-NEXT: v_readlane_b32 s66, v41, 14 +; VI-NEXT: v_readlane_b32 s65, v41, 13 +; VI-NEXT: v_readlane_b32 s64, v41, 12 +; VI-NEXT: v_readlane_b32 s55, v41, 11 +; VI-NEXT: v_readlane_b32 s54, v41, 10 +; VI-NEXT: v_readlane_b32 s53, v41, 9 +; VI-NEXT: v_readlane_b32 s52, v41, 8 +; VI-NEXT: v_readlane_b32 s51, v41, 7 +; VI-NEXT: v_readlane_b32 s50, v41, 6 +; VI-NEXT: v_readlane_b32 s49, v41, 5 +; VI-NEXT: v_readlane_b32 s48, v41, 4 +; VI-NEXT: v_readlane_b32 s39, v41, 3 +; VI-NEXT: v_readlane_b32 s38, v41, 2 +; VI-NEXT: v_readlane_b32 s37, v41, 1 +; VI-NEXT: v_readlane_b32 s36, v41, 0 +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -97549,34 +97675,34 @@ define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v16 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_lshl_b32 s4, s50, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s4, v16 ; GFX9-NEXT: v_mov_b32_e32 v32, 0xffff -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v15, v0, 16, v1 ; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_b32_sdwa v3, v32, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_lshl_or_b32 v14, v2, 16, v3 +; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 +; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: s_lshl_b32 s4, s50, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 +; GFX9-NEXT: v_lshl_or_b32 v14, v0, 16, v1 +; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 +; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 ; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 ; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 @@ -100242,8 +100368,8 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i ; SI-NEXT: s_lshr_b32 s69, s17, 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 @@ -100308,8 +100434,8 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i ; SI-NEXT: s_lshr_b32 s69, s17, 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 @@ -100323,32 +100449,32 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i ; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 ; SI-NEXT: .LBB65_3: ; %end -; SI-NEXT: s_lshl_b32 s47, s36, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s47, s36, 16 ; SI-NEXT: s_or_b32 s16, s16, s47 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s47, s69, 16 ; SI-NEXT: s_or_b32 s17, s17, s47 -; SI-NEXT: s_lshl_b32 s47, s34, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s47, s34, 16 ; SI-NEXT: s_or_b32 s18, s18, s47 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s47, s68, 16 ; SI-NEXT: s_or_b32 s19, s19, s47 -; SI-NEXT: s_lshl_b32 s47, s30, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s47, s30, 16 ; SI-NEXT: s_or_b32 s20, s20, s47 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s47, s67, 16 ; SI-NEXT: s_or_b32 s21, s21, s47 -; SI-NEXT: s_lshl_b32 s47, s94, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s47, s94, 16 ; SI-NEXT: s_or_b32 s22, s22, s47 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s47, s66, 16 ; SI-NEXT: s_or_b32 s23, s23, s47 -; SI-NEXT: s_lshl_b32 s47, s92, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s47, s92, 16 ; SI-NEXT: s_or_b32 s24, s24, s47 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s47, s65, 16 @@ -100396,13 +100522,13 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i ; SI-NEXT: s_lshl_b32 s47, s50, 16 ; SI-NEXT: s_or_b32 s13, s13, s47 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s47, s58, 16 +; SI-NEXT: s_lshl_b32 s47, s60, 16 ; SI-NEXT: s_or_b32 s10, s10, s47 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_lshl_b32 s47, s49, 16 ; SI-NEXT: s_or_b32 s11, s11, s47 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s47, s60, 16 +; SI-NEXT: s_lshl_b32 s47, s58, 16 ; SI-NEXT: s_or_b32 s8, s8, s47 ; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_lshl_b32 s47, s48, 16 @@ -100503,14 +100629,14 @@ define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i ; SI-NEXT: ; implicit-def: $sgpr51 ; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr49 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr39 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: s_branch .LBB65_2 ; ; VI-LABEL: bitcast_v16i64_to_v64f16_scalar: @@ -100839,15 +100965,15 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v25 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v24 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23 @@ -100860,12 +100986,12 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v20 ; SI-NEXT: v_mov_b32_e32 v52, v18 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19 ; SI-NEXT: v_mov_b32_e32 v53, v17 @@ -100905,18 +101031,18 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v43 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v44 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v56 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v58 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v59 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v60 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v61 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v62 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v45 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v58 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v59 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v61 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v62 ; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill @@ -100941,40 +101067,40 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v61 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v50 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v48 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v39 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v38 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v37 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v63 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v32 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v36 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51 @@ -101032,25 +101158,25 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr44 ; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; kill: killed $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload @@ -101078,7 +101204,7 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: s_waitcnt vmcnt(11) @@ -101112,7 +101238,7 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 @@ -101188,213 +101314,212 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB66_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v0, v63 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v50 +; SI-NEXT: v_cvt_f32_f16_e32 v0, v50 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v62 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v33 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v59 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v36 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v49 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v57 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v57 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v48 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v34 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v32 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v49 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v47 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v46 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v33 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v35 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v44 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v44 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v43 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v56 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v6, v6, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v37 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v63 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v13, v43 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v41 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v41 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v40 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v39 +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v11, v36 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v54 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v40 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v18, v54 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v34 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_cvt_f32_f16_e32 v18, v53 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v38 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v19, v53 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v37 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v29, v51 ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 ; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 -; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v13, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_cvt_f32_f16_e32 v20, v20 -; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 ; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v31, v31 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v32, v32 ; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 ; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 -; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 -; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 ; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v32, v32 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 +; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32 ; SI-NEXT: v_cvt_f16_f32_e32 v32, v32 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_or_b32_e32 v14, v16, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v17, v16 +; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; SI-NEXT: v_or_b32_e32 v17, v18, v17 +; SI-NEXT: v_or_b32_e32 v16, v18, v16 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_or_b32_e32 v17, v19, v17 +; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload @@ -101438,7 +101563,7 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28 ; SI-NEXT: v_cvt_f16_f32_e32 v28, v28 ; SI-NEXT: v_or_b32_e32 v22, v24, v22 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 ; SI-NEXT: s_waitcnt vmcnt(2) @@ -101454,7 +101579,7 @@ define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 @@ -101866,17 +101991,17 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s13, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s11, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s9, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s7, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s11, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s98, 16 @@ -102365,14 +102490,17 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i ; VI-NEXT: s_lshr_b32 s4, s51, 16 ; VI-NEXT: v_mov_b32_e32 v16, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s4 -; VI-NEXT: s_lshr_b32 s4, s50, 16 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s51, v16 -; VI-NEXT: v_mov_b32_e32 v2, s4 -; VI-NEXT: s_lshr_b32 s4, s49, 16 +; VI-NEXT: s_lshr_b32 s4, s50, 16 ; VI-NEXT: v_or_b32_e32 v15, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, s50, v16 +; VI-NEXT: s_lshr_b32 s4, s49, 16 +; VI-NEXT: v_or_b32_e32 v14, v1, v0 +; VI-NEXT: v_mov_b32_e32 v0, s4 +; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s49, v16 ; VI-NEXT: s_lshr_b32 s4, s48, 16 ; VI-NEXT: v_or_b32_e32 v13, v1, v0 @@ -102422,12 +102550,9 @@ define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i ; VI-NEXT: s_lshr_b32 s4, s39, 16 ; VI-NEXT: v_or_b32_e32 v4, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 -; VI-NEXT: v_add_f16_sdwa v2, v2, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s50, v16 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s39, v16 ; VI-NEXT: s_lshr_b32 s4, s38, 16 -; VI-NEXT: v_or_b32_e32 v14, v3, v2 ; VI-NEXT: v_or_b32_e32 v3, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -103428,8 +103553,8 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: s_lshr_b32 s69, s17, 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 @@ -103494,8 +103619,8 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: s_lshr_b32 s69, s17, 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 @@ -103509,32 +103634,32 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[34:35], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 16 ; SI-NEXT: .LBB69_3: ; %end -; SI-NEXT: s_lshl_b32 s47, s36, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s47, s36, 16 ; SI-NEXT: s_or_b32 s16, s16, s47 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s47, s69, 16 ; SI-NEXT: s_or_b32 s17, s17, s47 -; SI-NEXT: s_lshl_b32 s47, s34, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s47, s34, 16 ; SI-NEXT: s_or_b32 s18, s18, s47 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s47, s68, 16 ; SI-NEXT: s_or_b32 s19, s19, s47 -; SI-NEXT: s_lshl_b32 s47, s30, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s47, s30, 16 ; SI-NEXT: s_or_b32 s20, s20, s47 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s47, s67, 16 ; SI-NEXT: s_or_b32 s21, s21, s47 -; SI-NEXT: s_lshl_b32 s47, s94, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s47, s94, 16 ; SI-NEXT: s_or_b32 s22, s22, s47 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s47, s66, 16 ; SI-NEXT: s_or_b32 s23, s23, s47 -; SI-NEXT: s_lshl_b32 s47, s92, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s47, s92, 16 ; SI-NEXT: s_or_b32 s24, s24, s47 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s47, s65, 16 @@ -103582,13 +103707,13 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: s_lshl_b32 s47, s50, 16 ; SI-NEXT: s_or_b32 s13, s13, s47 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s47, s58, 16 +; SI-NEXT: s_lshl_b32 s47, s60, 16 ; SI-NEXT: s_or_b32 s10, s10, s47 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_lshl_b32 s47, s49, 16 ; SI-NEXT: s_or_b32 s11, s11, s47 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s47, s60, 16 +; SI-NEXT: s_lshl_b32 s47, s58, 16 ; SI-NEXT: s_or_b32 s8, s8, s47 ; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_lshl_b32 s47, s48, 16 @@ -103689,14 +103814,14 @@ define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i3 ; SI-NEXT: ; implicit-def: $sgpr51 ; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr49 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr39 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: s_branch .LBB69_2 ; ; VI-LABEL: bitcast_v16i64_to_v64i16_scalar: @@ -104010,6 +104135,8 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:4 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 +; SI-NEXT: v_mov_b32_e32 v44, v10 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18 ; SI-NEXT: v_mov_b32_e32 v45, v9 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v19 ; SI-NEXT: v_mov_b32_e32 v46, v8 @@ -104028,8 +104155,8 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26 ; SI-NEXT: v_mov_b32_e32 v61, v1 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v27 +; SI-NEXT: v_mov_b32_e32 v42, v12 ; SI-NEXT: v_mov_b32_e32 v43, v11 -; SI-NEXT: v_mov_b32_e32 v44, v10 ; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill @@ -104040,18 +104167,17 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18 ; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17 ; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v16 ; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15 ; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v45 @@ -104063,123 +104189,119 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v59 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v60 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v61 -; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v26 -; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v25 -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v24 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v23 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v22 -; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v21 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20 -; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v19 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v18 -; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v17 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v15 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v14 -; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v31 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v35 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v11 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v10 +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v11 ; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62 -; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v0 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v29 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v30 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v63 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB70_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 -; SI-NEXT: v_or_b32_e32 v8, v8, v32 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61 @@ -104189,21 +104311,25 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: v_or_b32_e32 v0, v0, v49 -; SI-NEXT: v_or_b32_e32 v1, v1, v42 -; SI-NEXT: v_or_b32_e32 v2, v2, v34 -; SI-NEXT: v_or_b32_e32 v3, v3, v41 -; SI-NEXT: v_or_b32_e32 v4, v4, v48 -; SI-NEXT: v_or_b32_e32 v5, v5, v40 -; SI-NEXT: v_or_b32_e32 v6, v6, v33 -; SI-NEXT: v_or_b32_e32 v7, v7, v55 -; SI-NEXT: v_or_b32_e32 v9, v9, v54 -; SI-NEXT: v_or_b32_e32 v10, v10, v39 -; SI-NEXT: v_or_b32_e32 v11, v11, v53 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: v_or_b32_e32 v0, v0, v36 +; SI-NEXT: v_or_b32_e32 v1, v1, v41 +; SI-NEXT: v_or_b32_e32 v2, v2, v48 +; SI-NEXT: v_or_b32_e32 v3, v3, v40 +; SI-NEXT: v_or_b32_e32 v4, v4, v35 +; SI-NEXT: v_or_b32_e32 v5, v5, v55 +; SI-NEXT: v_or_b32_e32 v6, v6, v39 +; SI-NEXT: v_or_b32_e32 v7, v7, v54 +; SI-NEXT: v_or_b32_e32 v8, v8, v34 +; SI-NEXT: v_or_b32_e32 v9, v9, v53 +; SI-NEXT: v_or_b32_e32 v10, v10, v38 +; SI-NEXT: v_or_b32_e32 v11, v11, v52 +; SI-NEXT: v_or_b32_e32 v12, v12, v33 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr60 @@ -104215,24 +104341,34 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr55 -; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: v_or_b32_e32 v18, v18, v19 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload @@ -104252,51 +104388,45 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v12, v12, v38 -; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_or_b32_e32 v13, v13, v52 -; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v14, v14, v37 -; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; SI-NEXT: v_or_b32_e32 v13, v13, v51 +; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v26, v27 ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_or_b32_e32 v15, v15, v51 -; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_or_b32_e32 v14, v14, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v16, v16, v36 -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v15, v15, v50 +; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v28, v28, v29 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v17, v17, v50 -; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_or_b32_e32 v16, v16, v37 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v18, v18, v35 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_or_b32_e32 v17, v17, v49 +; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: v_or_b32_e32 v30, v30, v31 @@ -104338,34 +104468,24 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: .LBB70_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB70_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v8, v32, v8 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v62 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v61 @@ -104375,9 +104495,11 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v57 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v56 ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46 ; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v45 ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44 ; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v43 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 @@ -104386,21 +104508,25 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_or_b32_e32 v0, v49, v0 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_or_b32_e32 v0, v36, v0 +; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_or_b32_e32 v2, v48, v2 +; SI-NEXT: v_or_b32_e32 v3, v40, v3 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v2, v34, v2 -; SI-NEXT: v_or_b32_e32 v3, v41, v3 -; SI-NEXT: v_or_b32_e32 v4, v48, v4 -; SI-NEXT: v_or_b32_e32 v5, v40, v5 -; SI-NEXT: v_or_b32_e32 v6, v33, v6 -; SI-NEXT: v_or_b32_e32 v7, v55, v7 -; SI-NEXT: v_or_b32_e32 v9, v54, v9 -; SI-NEXT: v_or_b32_e32 v10, v39, v10 -; SI-NEXT: v_or_b32_e32 v11, v53, v11 +; SI-NEXT: v_or_b32_e32 v4, v35, v4 +; SI-NEXT: v_or_b32_e32 v5, v55, v5 +; SI-NEXT: v_or_b32_e32 v6, v39, v6 +; SI-NEXT: v_or_b32_e32 v7, v54, v7 +; SI-NEXT: v_or_b32_e32 v8, v34, v8 +; SI-NEXT: v_or_b32_e32 v9, v53, v9 +; SI-NEXT: v_or_b32_e32 v10, v38, v10 +; SI-NEXT: v_or_b32_e32 v11, v52, v11 +; SI-NEXT: v_or_b32_e32 v12, v33, v12 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 @@ -104408,22 +104534,33 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_or_b32_e32 v18, v19, v18 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9 ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v10 ; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11 +; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 +; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; SI-NEXT: v_or_b32_e32 v19, v20, v19 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 @@ -104446,70 +104583,63 @@ define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v12, v38, v12 -; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 ; SI-NEXT: v_add_i32_e32 v23, vcc, s6, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_or_b32_e32 v13, v52, v13 -; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v14, v37, v14 -; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; SI-NEXT: v_or_b32_e32 v13, v51, v13 +; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_or_b32_e32 v15, v51, v15 -; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_or_b32_e32 v14, v32, v14 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v26 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v16, v36, v16 -; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v15, v50, v15 +; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15 ; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v17, v50, v17 -; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 +; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_or_b32_e32 v16, v37, v16 +; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v18, v35, v18 -; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 +; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_or_b32_e32 v17, v49, v17 +; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 ; SI-NEXT: v_add_i32_e32 v29, vcc, 0x30000, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30 @@ -104882,17 +105012,17 @@ define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s12, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s10, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s8, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s6, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s10, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s98, 16 @@ -104984,14 +105114,14 @@ define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_add_i32 s16, s16, 3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s12, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s17, s17, 3 +; SI-NEXT: s_add_i32 s36, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s10, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s10, s10, 16 -; SI-NEXT: s_or_b32 s5, s10, s5 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_add_i32 s36, s4, 0x30000 -; SI-NEXT: s_add_i32 s37, s5, 0x30000 +; SI-NEXT: s_add_i32 s37, s4, 0x30000 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s8, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 @@ -105908,19 +106038,19 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; kill: killed $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr46 -; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr45 +; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr55 ; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr61 -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr59 @@ -105928,15 +106058,15 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr47 -; SI-NEXT: ; implicit-def: $vgpr45 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr44 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr40 +; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; kill: killed $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -106017,28 +106147,28 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v18, v17, 8 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v16, v15, 24 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v16, v15, 16 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v16, v15, 8 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v14, v13, 24 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v14, v13, 16 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v14, v13, 8 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v12, v11, 24 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v12, v11, 16 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill @@ -106053,7 +106183,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v10, v9, 8 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill @@ -106062,7 +106192,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v8, v7, 8 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v32 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill @@ -106080,7 +106210,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill @@ -106089,22 +106219,22 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill @@ -106113,7 +106243,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill @@ -106125,7 +106255,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill @@ -106134,32 +106264,32 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 ; SI-NEXT: v_alignbit_b32 v37, v6, v5, 24 -; SI-NEXT: v_alignbit_b32 v39, v6, v5, 16 -; SI-NEXT: v_alignbit_b32 v49, v6, v5, 8 -; SI-NEXT: v_alignbit_b32 v52, v4, v3, 24 -; SI-NEXT: v_alignbit_b32 v54, v4, v3, 16 -; SI-NEXT: v_alignbit_b32 v40, v4, v3, 8 -; SI-NEXT: v_alignbit_b32 v42, v2, v1, 24 -; SI-NEXT: v_alignbit_b32 v44, v2, v1, 16 -; SI-NEXT: v_alignbit_b32 v46, v2, v1, 8 +; SI-NEXT: v_alignbit_b32 v38, v6, v5, 16 +; SI-NEXT: v_alignbit_b32 v48, v6, v5, 8 +; SI-NEXT: v_alignbit_b32 v51, v4, v3, 24 +; SI-NEXT: v_alignbit_b32 v52, v4, v3, 16 +; SI-NEXT: v_alignbit_b32 v55, v4, v3, 8 +; SI-NEXT: v_alignbit_b32 v41, v2, v1, 24 +; SI-NEXT: v_alignbit_b32 v43, v2, v1, 16 +; SI-NEXT: v_alignbit_b32 v45, v2, v1, 8 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v32 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v14 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v14 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v14 ; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v14 -; SI-NEXT: v_lshrrev_b32_e32 v51, 24, v12 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v12 -; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v12 -; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v10 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v10 -; SI-NEXT: v_lshrrev_b32_e32 v45, 8, v10 +; SI-NEXT: v_lshrrev_b32_e32 v53, 24, v12 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v12 +; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v10 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v10 +; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v10 ; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v8 ; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v8 ; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v8 @@ -106257,31 +106387,31 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v18, v17, 8 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v16, v15, 24 ; SI-NEXT: v_add_f64 v[13:14], v[13:14], 1.0 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v16, v15, 16 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v16, v15, 8 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v14, v13, 24 ; SI-NEXT: v_add_f64 v[11:12], v[11:12], 1.0 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v14, v13, 16 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v14, v13, 8 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v12, v11, 24 ; SI-NEXT: v_add_f64 v[9:10], v[9:10], 1.0 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v12, v11, 16 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill @@ -106297,7 +106427,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v10, v9, 8 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill @@ -106306,7 +106436,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v33, v8, v7, 8 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v32 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill @@ -106324,7 +106454,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill @@ -106333,22 +106463,22 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill @@ -106357,7 +106487,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill @@ -106369,7 +106499,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill @@ -106381,32 +106511,32 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_add_f64 v[1:2], v[1:2], 1.0 ; SI-NEXT: v_add_f64 v[3:4], v[3:4], 1.0 ; SI-NEXT: v_add_f64 v[5:6], v[5:6], 1.0 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 ; SI-NEXT: v_alignbit_b32 v37, v6, v5, 24 -; SI-NEXT: v_alignbit_b32 v39, v6, v5, 16 -; SI-NEXT: v_alignbit_b32 v49, v6, v5, 8 -; SI-NEXT: v_alignbit_b32 v52, v4, v3, 24 -; SI-NEXT: v_alignbit_b32 v54, v4, v3, 16 -; SI-NEXT: v_alignbit_b32 v40, v4, v3, 8 -; SI-NEXT: v_alignbit_b32 v42, v2, v1, 24 -; SI-NEXT: v_alignbit_b32 v44, v2, v1, 16 -; SI-NEXT: v_alignbit_b32 v46, v2, v1, 8 +; SI-NEXT: v_alignbit_b32 v38, v6, v5, 16 +; SI-NEXT: v_alignbit_b32 v48, v6, v5, 8 +; SI-NEXT: v_alignbit_b32 v51, v4, v3, 24 +; SI-NEXT: v_alignbit_b32 v52, v4, v3, 16 +; SI-NEXT: v_alignbit_b32 v55, v4, v3, 8 +; SI-NEXT: v_alignbit_b32 v41, v2, v1, 24 +; SI-NEXT: v_alignbit_b32 v43, v2, v1, 16 +; SI-NEXT: v_alignbit_b32 v45, v2, v1, 8 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v32 ; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v14 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v14 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v14 ; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v14 -; SI-NEXT: v_lshrrev_b32_e32 v51, 24, v12 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v12 -; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v12 -; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v10 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v10 -; SI-NEXT: v_lshrrev_b32_e32 v45, 8, v10 +; SI-NEXT: v_lshrrev_b32_e32 v53, 24, v12 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v12 +; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v10 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v10 +; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v10 ; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v8 ; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v8 ; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v8 @@ -106422,15 +106552,15 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v35, 8, v2 ; SI-NEXT: .LBB72_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v46, 8, v46 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_and_b32_e32 v44, 0xff, v44 -; SI-NEXT: v_or_b32_e32 v1, v1, v46 -; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v44 -; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v42 -; SI-NEXT: v_or_b32_e32 v42, v42, v44 +; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v45 +; SI-NEXT: v_and_b32_e32 v43, 0xff, v43 +; SI-NEXT: v_or_b32_e32 v1, v1, v45 +; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v41 +; SI-NEXT: v_or_b32_e32 v41, v41, v43 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v1, v1, v42 +; SI-NEXT: v_or_b32_e32 v1, v1, v41 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v2 @@ -106445,12 +106575,12 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v40 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v54 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v55 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v52 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v52 +; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v51 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 @@ -106469,10 +106599,10 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v49 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v5 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v39 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v5 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v38 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v37 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 @@ -106492,13 +106622,13 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xff, v7 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v7 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -106522,13 +106652,13 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xff, v9 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v9 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -106542,23 +106672,23 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v45 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v46 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v43 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v44 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v41 +; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v42 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xff, v11 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xff, v11 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -106572,24 +106702,24 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v12 -; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v55 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v40 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v53 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v54 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v51 +; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v53 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xff, v13 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xff, v13 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -106604,22 +106734,22 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v1, 0xff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v50 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v48 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v49 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v38 +; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v39 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xff, v15 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v15 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 @@ -106633,7 +106763,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 @@ -106648,13 +106778,13 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xff, v17 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v17 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -106669,7 +106799,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 @@ -106738,7 +106868,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x50, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v22 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload @@ -106774,14 +106904,14 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x58, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v24 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 @@ -106810,10 +106940,10 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x60, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v26 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 @@ -106849,7 +106979,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v28 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 @@ -106975,182 +107105,182 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: ; implicit-def: $vgpr54 +; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr59 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr58 +; VI-NEXT: ; implicit-def: $vgpr53 ; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: ; kill: killed $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr52 ; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr47 -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: ; implicit-def: $vgpr46 ; VI-NEXT: ; implicit-def: $vgpr45 -; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr50 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr44 -; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr49 ; VI-NEXT: ; implicit-def: $vgpr43 -; VI-NEXT: ; implicit-def: $vgpr52 ; VI-NEXT: ; implicit-def: $vgpr63 +; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr61 ; VI-NEXT: ; implicit-def: $vgpr60 -; VI-NEXT: ; implicit-def: $vgpr59 -; VI-NEXT: ; implicit-def: $vgpr50 -; VI-NEXT: ; implicit-def: $vgpr36 -; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; implicit-def: $vgpr35 -; VI-NEXT: ; implicit-def: $vgpr49 -; VI-NEXT: ; kill: killed $vgpr39 ; VI-NEXT: ; implicit-def: $vgpr42 -; VI-NEXT: ; implicit-def: $vgpr41 -; VI-NEXT: ; implicit-def: $vgpr40 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 -; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; kill: killed $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr42 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB72_2 @@ -107159,6 +107289,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 @@ -107175,164 +107306,166 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[31:32] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[29:30] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[27:28] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[25:26] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[23:24] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[21:22] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[19:20] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[17:18] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[15:16] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[13:14] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[11:12] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[9:10] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[7:8] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 ; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 ; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 ; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] +; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 ; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32 +; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v1 +; VI-NEXT: v_mov_b32_e32 v42, v55 +; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v1 ; VI-NEXT: .LBB72_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB72_4 ; VI-NEXT: ; %bb.3: ; %cmp.true +; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_add_f64 v[31:32], v[31:32], 1.0 ; VI-NEXT: v_add_f64 v[29:30], v[29:30], 1.0 ; VI-NEXT: v_add_f64 v[27:28], v[27:28], 1.0 @@ -107390,7 +107523,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v28 +; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v11 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32 @@ -107413,197 +107546,196 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v1 +; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v1 ; VI-NEXT: .LBB72_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v55, v55, v41, s4 -; VI-NEXT: v_perm_b32 v1, v1, v47, s4 -; VI-NEXT: v_perm_b32 v2, v2, v54, s4 -; VI-NEXT: v_lshlrev_b32_e32 v54, 16, v55 +; VI-NEXT: v_perm_b32 v54, v54, v41, s4 +; VI-NEXT: v_perm_b32 v1, v1, v55, s4 +; VI-NEXT: v_lshlrev_b32_e32 v54, 16, v54 ; VI-NEXT: v_or_b32_e32 v1, v1, v54 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v48, v46, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v2, v59, s4 +; VI-NEXT: v_perm_b32 v2, v37, v58, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v53, v40, s4 -; VI-NEXT: v_perm_b32 v2, v3, v45, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v57, v40, s4 +; VI-NEXT: v_perm_b32 v1, v3, v53, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v44, v38, s4 -; VI-NEXT: v_perm_b32 v1, v4, v34, s4 +; VI-NEXT: v_perm_b32 v2, v52, v56, s4 +; VI-NEXT: v_perm_b32 v1, v4, v36, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v52, v39, s4 -; VI-NEXT: v_perm_b32 v2, v5, v43, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v51, v39, s4 +; VI-NEXT: v_perm_b32 v1, v5, v47, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v62, v37, s4 -; VI-NEXT: v_perm_b32 v1, v6, v63, s4 +; VI-NEXT: v_perm_b32 v2, v46, v45, s4 +; VI-NEXT: v_perm_b32 v1, v6, v35, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v7, v51, s4 -; VI-NEXT: v_perm_b32 v1, v33, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v7, v50, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v34, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v60, v59, s4 -; VI-NEXT: v_perm_b32 v1, v8, v61, s4 +; VI-NEXT: v_perm_b32 v2, v49, v43, s4 +; VI-NEXT: v_perm_b32 v1, v8, v44, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v9, v50, s4 -; VI-NEXT: v_perm_b32 v1, v36, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v9, v63, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v48, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v35, v49, s4 -; VI-NEXT: v_perm_b32 v1, v10, v58, s4 +; VI-NEXT: v_perm_b32 v2, v62, v38, s4 +; VI-NEXT: v_perm_b32 v1, v10, v33, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: v_perm_b32 v2, v11, v57, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v11, v61, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v60, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -107612,21 +107744,21 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v13, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v13, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -107635,21 +107767,21 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v15, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v15, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -107658,21 +107790,20 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v17, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v17, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -107681,21 +107812,20 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v19, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v19, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -107704,21 +107834,20 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 ; VI-NEXT: v_perm_b32 v1, v21, v1, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -107727,8 +107856,8 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -107738,9 +107867,9 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -107749,8 +107878,8 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -107760,9 +107889,9 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -107771,8 +107900,8 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) @@ -107782,12 +107911,13 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v28, v1, s4 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v56, v2, s4 +; VI-NEXT: v_perm_b32 v1, v28, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0 @@ -107876,6 +108006,54 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; GFX9-NEXT: ; implicit-def: $vgpr40 +; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr42 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr55 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr57 +; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr49 +; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr44 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: ; implicit-def: $vgpr43 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr63 +; GFX9-NEXT: ; implicit-def: $vgpr38 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr61 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 @@ -107885,6 +108063,10 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -107895,6 +108077,10 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -107905,6 +108091,10 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -107915,6 +108105,10 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -107925,6 +108119,10 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -107935,6 +108133,10 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -107945,6 +108147,10 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -107955,6 +108161,10 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 @@ -107965,301 +108175,227 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; kill: killed $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; kill: killed $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr53 -; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr45 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr44 -; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: ; implicit-def: $vgpr51 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr50 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr49 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; kill: killed $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; kill: killed $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr42 -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: ; implicit-def: $vgpr41 -; GFX9-NEXT: ; implicit-def: $vgpr40 ; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: s_waitcnt vmcnt(25) -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB72_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(25) +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(30) ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[31:32] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[29:30] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[27:28] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[25:26] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[27:28] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[23:24] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[21:22] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[19:20] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[17:18] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[15:16] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[13:14] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16] +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[11:12] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[9:10] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12] +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[7:8] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10] +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v32 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: v_mov_b32_e32 v55, v39 -; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8 ; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 ; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v27 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v11 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v9 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v6 ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v1 ; GFX9-NEXT: .LBB72_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB72_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: s_waitcnt vmcnt(24) +; GFX9-NEXT: s_waitcnt vmcnt(28) ; GFX9-NEXT: v_add_f64 v[31:32], v[31:32], 1.0 ; GFX9-NEXT: v_add_f64 v[29:30], v[29:30], 1.0 ; GFX9-NEXT: v_add_f64 v[27:28], v[27:28], 1.0 @@ -108289,17 +108425,17 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] -; GFX9-NEXT: v_add_f64 v[5:6], v[5:6], 1.0 +; GFX9-NEXT: v_add_f64 v[7:8], v[7:8], 1.0 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] -; GFX9-NEXT: v_add_f64 v[3:4], v[3:4], 1.0 +; GFX9-NEXT: v_add_f64 v[5:6], v[5:6], 1.0 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] -; GFX9-NEXT: v_add_f64 v[7:8], v[7:8], 1.0 +; GFX9-NEXT: v_add_f64 v[3:4], v[3:4], 1.0 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill @@ -108309,7 +108445,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] -; GFX9-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v32 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill @@ -108319,83 +108455,97 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v12 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32 +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v11 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v11 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v32 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 @@ -108403,9 +108553,9 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 @@ -108413,9 +108563,9 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 @@ -108423,216 +108573,206 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v8 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v27 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v11 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v9 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v6 ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v1 ; GFX9-NEXT: .LBB72_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v5, v5, v52, s4 -; GFX9-NEXT: v_perm_b32 v8, v8, v51, s4 -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v10, v10, v50, s4 -; GFX9-NEXT: v_perm_b32 v34, v34, v39, s4 -; GFX9-NEXT: v_perm_b32 v12, v12, v36, s4 -; GFX9-NEXT: v_perm_b32 v35, v35, v41, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v57, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v35, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v2, v53, s4 -; GFX9-NEXT: v_perm_b32 v53, v47, v40, s4 -; GFX9-NEXT: v_perm_b32 v3, v3, v56, s4 -; GFX9-NEXT: v_perm_b32 v4, v4, v46, s4 -; GFX9-NEXT: v_perm_b32 v6, v6, v45, s4 -; GFX9-NEXT: v_perm_b32 v38, v38, v54, s4 -; GFX9-NEXT: v_perm_b32 v7, v7, v44, s4 -; GFX9-NEXT: v_perm_b32 v9, v9, v43, s4 -; GFX9-NEXT: v_perm_b32 v11, v11, v62, s4 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v33, v33, v51, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v39, v49, v50, s4 -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v36, v36, v49, s4 -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v13, v49, s4 -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v14, v14, v49, s4 -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v49, v50, v49, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v15, v15, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v50, v51, v50, s4 -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v17, v17, v51, s4 -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v18, v18, v51, s4 -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v51, v52, v51, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v42, s4 +; GFX9-NEXT: v_perm_b32 v36, v36, v41, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v1, v63, v37, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 +; GFX9-NEXT: v_perm_b32 v1, v2, v59, s4 +; GFX9-NEXT: v_perm_b32 v2, v55, v54, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshl_or_b32 v1, v53, 16, v3 +; GFX9-NEXT: v_perm_b32 v1, v3, v58, s4 +; GFX9-NEXT: v_perm_b32 v2, v53, v40, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v1, v61, v60, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4 +; GFX9-NEXT: v_perm_b32 v1, v4, v35, s4 +; GFX9-NEXT: v_perm_b32 v2, v57, v52, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_lshl_or_b32 v1, v34, 16, v5 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v5, v56, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v34, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_perm_b32 v1, v48, v59, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6 +; GFX9-NEXT: v_perm_b32 v1, v6, v51, s4 +; GFX9-NEXT: v_perm_b32 v2, v47, v46, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_lshl_or_b32 v1, v38, 16, v7 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v7, v50, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v33, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8 +; GFX9-NEXT: v_perm_b32 v1, v8, v49, s4 +; GFX9-NEXT: v_perm_b32 v2, v45, v44, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v9 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v9, v48, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v43, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10 +; GFX9-NEXT: v_perm_b32 v1, v10, v63, s4 +; GFX9-NEXT: v_perm_b32 v2, v38, v62, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v11 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v11, v61, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v37, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v12, v60, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v13 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v13, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v14, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_lshl_or_b32 v1, v49, 16, v15 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v15, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v17 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(3) +; GFX9-NEXT: v_perm_b32 v1, v17, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v18, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v1 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v20, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_perm_b32 v1, v21, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -108641,19 +108781,19 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -108662,39 +108802,40 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_perm_b32 v1, v27, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v58, v2, s4 +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -108703,19 +108844,19 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -108724,10 +108865,13 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v2, v42, v55, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v39, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload @@ -109124,51 +109268,49 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX11-FAKE16-LABEL: bitcast_v16f64_to_v128i8: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:88 +; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:84 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:84 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:80 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:76 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:72 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:68 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:64 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:60 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:56 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:52 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:48 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:44 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:44 -; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:40 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:36 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:32 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:28 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:24 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:20 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:16 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:12 ; GFX11-FAKE16-NEXT: s_clause 0x2 ; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8 ; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4 ; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr66 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73 @@ -109254,6 +109396,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr86 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr85 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr83 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr82 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81 @@ -109262,7 +109405,6 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2) ; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v33 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33 @@ -109271,18 +109413,19 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: s_xor_b32 s0, exec_lo, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB72_2 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20] ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[19:20] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[29:30] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[17:18] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[25:26] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[11:12] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[5:6] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[23:24] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[3:4] ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 24, v32 @@ -109364,10 +109507,9 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[21:22] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[1:2] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v1 ; GFX11-FAKE16-NEXT: .LBB72_2: ; %Flow ; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB72_4 @@ -109484,12 +109626,12 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v1 ; GFX11-FAKE16-NEXT: .LBB72_4: ; %end ; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v39, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v39, v74, v66, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v75, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v73, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v55, v72, v63, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v62, 0xc0c0004 @@ -109595,27 +109737,26 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112 -; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:12 -; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:16 -; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:20 -; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:24 -; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:28 -; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:32 -; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:36 -; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:40 -; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:44 -; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:48 -; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:52 -; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:56 -; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:60 -; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:64 -; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:68 -; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:72 -; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:76 -; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:80 -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:84 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:88 +; GFX11-FAKE16-NEXT: s_clause 0x12 ; 76-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:84 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 @@ -109640,9 +109781,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill @@ -109816,55 +109957,55 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 ; SI-NEXT: v_writelane_b32 v62, s46, 32 ; SI-NEXT: v_writelane_b32 v62, s47, 33 -; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 ; SI-NEXT: v_writelane_b32 v62, s46, 30 ; SI-NEXT: v_writelane_b32 v62, s47, 31 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8 ; SI-NEXT: v_writelane_b32 v62, s46, 28 ; SI-NEXT: v_writelane_b32 v62, s47, 29 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 ; SI-NEXT: v_writelane_b32 v62, s46, 26 ; SI-NEXT: v_writelane_b32 v62, s47, 27 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 ; SI-NEXT: v_writelane_b32 v62, s46, 24 ; SI-NEXT: v_writelane_b32 v62, s47, 25 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8 ; SI-NEXT: v_writelane_b32 v62, s46, 22 ; SI-NEXT: v_writelane_b32 v62, s47, 23 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 ; SI-NEXT: v_writelane_b32 v62, s46, 20 ; SI-NEXT: v_writelane_b32 v62, s47, 21 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 ; SI-NEXT: v_writelane_b32 v62, s46, 18 ; SI-NEXT: v_writelane_b32 v62, s47, 19 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 ; SI-NEXT: v_writelane_b32 v62, s46, 16 ; SI-NEXT: v_writelane_b32 v62, s47, 17 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 ; SI-NEXT: v_writelane_b32 v62, s46, 14 ; SI-NEXT: v_writelane_b32 v62, s47, 15 -; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 ; SI-NEXT: v_writelane_b32 v62, s46, 12 ; SI-NEXT: v_writelane_b32 v62, s47, 13 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8 ; SI-NEXT: v_writelane_b32 v62, s46, 10 ; SI-NEXT: v_writelane_b32 v62, s47, 11 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 ; SI-NEXT: v_writelane_b32 v62, s46, 8 ; SI-NEXT: v_writelane_b32 v62, s47, 9 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 ; SI-NEXT: v_writelane_b32 v62, s46, 6 ; SI-NEXT: v_writelane_b32 v62, s47, 7 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8 ; SI-NEXT: v_writelane_b32 v62, s46, 4 ; SI-NEXT: v_writelane_b32 v62, s47, 5 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 ; SI-NEXT: v_writelane_b32 v62, s46, 2 ; SI-NEXT: v_writelane_b32 v62, s47, 3 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8 +; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 ; SI-NEXT: v_writelane_b32 v62, s46, 0 -; SI-NEXT: s_lshr_b64 s[48:49], s[4:5], 16 ; SI-NEXT: v_writelane_b32 v62, s47, 1 +; SI-NEXT: s_lshr_b64 s[48:49], s[14:15], 8 ; SI-NEXT: s_lshr_b64 s[50:51], s[40:41], 24 ; SI-NEXT: s_lshr_b64 s[52:53], s[40:41], 16 ; SI-NEXT: s_lshr_b64 s[54:55], s[40:41], 8 @@ -109899,153 +110040,160 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: .LBB73_2: ; %cmp.true ; SI-NEXT: v_add_f64 v[1:2], s[4:5], 1.0 ; SI-NEXT: v_add_f64 v[3:4], s[6:7], 1.0 -; SI-NEXT: v_lshr_b64 v[15:16], v[1:2], 24 +; SI-NEXT: v_lshr_b64 v[19:20], v[1:2], 24 ; SI-NEXT: v_add_f64 v[5:6], s[8:9], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[1:2], 16 +; SI-NEXT: v_lshr_b64 v[19:20], v[1:2], 16 ; SI-NEXT: v_add_f64 v[7:8], s[10:11], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[1:2], 8 +; SI-NEXT: v_lshr_b64 v[19:20], v[1:2], 8 ; SI-NEXT: v_add_f64 v[9:10], s[12:13], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[3:4], 24 +; SI-NEXT: v_lshr_b64 v[19:20], v[3:4], 24 ; SI-NEXT: v_add_f64 v[11:12], s[14:15], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[3:4], 16 +; SI-NEXT: v_lshr_b64 v[19:20], v[3:4], 16 ; SI-NEXT: v_add_f64 v[13:14], s[40:41], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[3:4], 8 -; SI-NEXT: v_readfirstlane_b32 s41, v14 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[3:4], 8 +; SI-NEXT: v_add_f64 v[15:16], s[42:43], 1.0 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[5:6], 24 -; SI-NEXT: v_add_f64 v[17:18], s[42:43], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[5:6], 24 +; SI-NEXT: v_add_f64 v[27:28], s[28:29], 1.0 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[5:6], 16 -; SI-NEXT: v_add_f64 v[48:49], s[26:27], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[5:6], 16 +; SI-NEXT: v_add_f64 v[33:34], s[26:27], 1.0 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[5:6], 8 -; SI-NEXT: v_add_f64 v[25:26], s[44:45], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[5:6], 8 +; SI-NEXT: v_lshr_b64 v[35:36], v[27:28], 8 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[7:8], 24 -; SI-NEXT: v_add_f64 v[31:32], s[28:29], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[7:8], 24 +; SI-NEXT: v_add_f64 v[41:42], s[22:23], 1.0 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[7:8], 16 -; SI-NEXT: v_add_f64 v[54:55], s[24:25], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[7:8], 16 +; SI-NEXT: v_lshr_b64 v[36:37], v[33:34], 24 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[7:8], 8 -; SI-NEXT: v_lshr_b64 v[34:35], v[48:49], 24 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[7:8], 8 +; SI-NEXT: v_lshr_b64 v[37:38], v[33:34], 16 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[9:10], 24 -; SI-NEXT: v_add_f64 v[43:44], s[22:23], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[9:10], 24 +; SI-NEXT: v_add_f64 v[21:22], s[44:45], 1.0 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[9:10], 16 -; SI-NEXT: v_lshr_b64 v[22:23], v[31:32], 24 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[9:10], 16 +; SI-NEXT: v_add_f64 v[56:57], s[20:21], 1.0 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[9:10], 8 -; SI-NEXT: v_lshr_b64 v[35:36], v[48:49], 16 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[9:10], 8 +; SI-NEXT: v_lshr_b64 v[38:39], v[41:42], 24 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[11:12], 24 -; SI-NEXT: v_add_f64 v[58:59], s[20:21], 1.0 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[11:12], 24 +; SI-NEXT: v_readfirstlane_b32 s23, v42 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[11:12], 16 -; SI-NEXT: v_readfirstlane_b32 s27, v49 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[11:12], 16 +; SI-NEXT: v_lshr_b64 v[39:40], v[41:42], 16 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[11:12], 8 -; SI-NEXT: v_readfirstlane_b32 s29, v32 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[11:12], 8 +; SI-NEXT: v_lshr_b64 v[42:43], v[41:42], 8 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[13:14], 24 -; SI-NEXT: v_readfirstlane_b32 s45, v26 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[13:14], 24 +; SI-NEXT: v_add_f64 v[50:51], s[24:25], 1.0 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[13:14], 16 -; SI-NEXT: v_readfirstlane_b32 s43, v18 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[13:14], 16 +; SI-NEXT: v_add_f64 v[17:18], s[18:19], 1.0 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[19:20], v[13:14], 8 +; SI-NEXT: v_lshr_b64 v[43:44], v[56:57], 24 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[19:20], v[15:16], 24 +; SI-NEXT: v_add_f64 v[29:30], s[16:17], 1.0 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[19:20], v[15:16], 16 +; SI-NEXT: v_lshr_b64 v[44:45], v[56:57], 16 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[19:20], v[15:16], 8 +; SI-NEXT: v_readfirstlane_b32 s21, v57 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[19:20], v[21:22], 24 +; SI-NEXT: v_lshr_b64 v[23:24], v[21:22], 16 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[52:53], v[50:51], 24 +; SI-NEXT: v_lshr_b64 v[45:46], v[56:57], 8 +; SI-NEXT: v_lshr_b64 v[57:58], v[17:18], 16 +; SI-NEXT: v_readfirstlane_b32 s19, v18 +; SI-NEXT: v_lshr_b64 v[24:25], v[21:22], 8 +; SI-NEXT: v_lshr_b64 v[53:54], v[50:51], 16 +; SI-NEXT: v_lshr_b64 v[46:47], v[17:18], 24 +; SI-NEXT: v_lshr_b64 v[58:59], v[17:18], 8 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshr_b64 v[14:15], v[13:14], 8 -; SI-NEXT: v_lshr_b64 v[56:57], v[17:18], 8 -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[14:15], v[17:18], 24 -; SI-NEXT: v_lshr_b64 v[23:24], v[31:32], 16 -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[14:15], v[17:18], 16 -; SI-NEXT: v_lshr_b64 v[18:19], v[25:26], 8 -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[14:15], v[25:26], 24 -; SI-NEXT: v_lshr_b64 v[15:16], v[25:26], 16 -; SI-NEXT: v_lshr_b64 v[26:27], v[31:32], 8 -; SI-NEXT: v_lshr_b64 v[32:33], v[48:49], 8 -; SI-NEXT: v_lshr_b64 v[36:37], v[54:55], 24 -; SI-NEXT: v_lshr_b64 v[49:50], v[54:55], 8 -; SI-NEXT: v_add_f64 v[20:21], s[18:19], 1.0 -; SI-NEXT: v_lshr_b64 v[37:38], v[54:55], 16 -; SI-NEXT: v_lshr_b64 v[50:51], v[43:44], 24 -; SI-NEXT: v_add_f64 v[28:29], s[16:17], 1.0 -; SI-NEXT: v_lshr_b64 v[51:52], v[43:44], 16 -; SI-NEXT: v_lshr_b64 v[38:39], v[58:59], 24 -; SI-NEXT: v_readfirstlane_b32 s23, v44 -; SI-NEXT: v_lshr_b64 v[52:53], v[43:44], 8 -; SI-NEXT: v_lshr_b64 v[39:40], v[58:59], 16 -; SI-NEXT: v_lshr_b64 v[44:45], v[20:21], 8 -; SI-NEXT: v_lshr_b64 v[40:41], v[20:21], 24 -; SI-NEXT: v_lshr_b64 v[45:46], v[28:29], 24 -; SI-NEXT: v_readfirstlane_b32 s17, v29 -; SI-NEXT: v_readfirstlane_b32 s19, v21 -; SI-NEXT: v_readfirstlane_b32 s21, v59 -; SI-NEXT: v_readfirstlane_b32 s25, v55 +; SI-NEXT: v_lshr_b64 v[18:19], v[29:30], 16 +; SI-NEXT: v_readfirstlane_b32 s17, v30 +; SI-NEXT: v_readfirstlane_b32 s25, v51 +; SI-NEXT: v_readfirstlane_b32 s27, v34 +; SI-NEXT: v_readfirstlane_b32 s29, v28 +; SI-NEXT: v_readfirstlane_b32 s45, v22 +; SI-NEXT: v_readfirstlane_b32 s43, v16 +; SI-NEXT: v_readfirstlane_b32 s41, v14 ; SI-NEXT: v_readfirstlane_b32 s15, v12 ; SI-NEXT: v_readfirstlane_b32 s13, v10 ; SI-NEXT: v_readfirstlane_b32 s11, v8 ; SI-NEXT: v_readfirstlane_b32 s9, v6 ; SI-NEXT: v_readfirstlane_b32 s7, v4 ; SI-NEXT: v_readfirstlane_b32 s5, v2 -; SI-NEXT: v_lshr_b64 v[59:60], v[58:59], 8 -; SI-NEXT: v_lshr_b64 v[41:42], v[20:21], 16 -; SI-NEXT: v_lshr_b64 v[46:47], v[28:29], 16 -; SI-NEXT: v_lshr_b64 v[29:30], v[28:29], 8 +; SI-NEXT: v_lshr_b64 v[25:26], v[27:28], 24 +; SI-NEXT: v_lshr_b64 v[31:32], v[27:28], 16 +; SI-NEXT: v_lshr_b64 v[48:49], v[33:34], 8 +; SI-NEXT: v_lshr_b64 v[54:55], v[50:51], 8 +; SI-NEXT: v_lshr_b64 v[59:60], v[29:30], 24 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[19:20], v[29:30], 8 ; SI-NEXT: s_lshr_b32 s10, s5, 24 ; SI-NEXT: s_lshr_b32 s12, s5, 16 ; SI-NEXT: s_lshr_b32 s14, s5, 8 @@ -110096,18 +110244,11 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: s_lshr_b32 s6, s17, 8 ; SI-NEXT: s_branch .LBB73_5 ; SI-NEXT: .LBB73_3: +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 ; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 0 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 1 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 ; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: ; implicit-def: $sgpr36 ; SI-NEXT: ; implicit-def: $sgpr34 @@ -110137,193 +110278,198 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: ; implicit-def: $sgpr54 ; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 2 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 3 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 4 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 5 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 6 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 7 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 8 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 9 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 10 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 11 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 12 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 13 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 14 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 15 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 16 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 17 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 18 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 19 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 20 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 21 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; kill: killed $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 0 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 1 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 2 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 3 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 4 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 5 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 6 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 7 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 8 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 9 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 10 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 11 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 12 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 13 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 14 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 15 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 16 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 17 +; SI-NEXT: ; implicit-def: $vcc_lo ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 22 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 18 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 19 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 23 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 20 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 21 +; SI-NEXT: ; implicit-def: $vcc_lo ; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 24 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 22 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 23 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: ; kill: killed $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 25 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 24 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 25 +; SI-NEXT: ; implicit-def: $vcc_lo ; SI-NEXT: ; kill: killed $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 26 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: ; kill: killed $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s49, 27 -; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 26 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 27 +; SI-NEXT: ; implicit-def: $vcc_lo ; SI-NEXT: ; kill: killed $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: ; kill: killed $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 28 -; SI-NEXT: v_writelane_b32 v62, s49, 29 -; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 28 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 29 +; SI-NEXT: ; implicit-def: $vcc_lo ; SI-NEXT: ; kill: killed $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: ; kill: killed $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 30 -; SI-NEXT: v_writelane_b32 v62, s49, 31 -; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 30 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 31 +; SI-NEXT: ; implicit-def: $vcc_lo ; SI-NEXT: ; kill: killed $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: ; kill: killed $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: v_writelane_b32 v62, s48, 32 -; SI-NEXT: v_writelane_b32 v62, s49, 33 +; SI-NEXT: v_writelane_b32 v62, vcc_lo, 32 +; SI-NEXT: v_writelane_b32 v62, vcc_hi, 33 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: ; kill: killed $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; kill: killed $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; kill: killed $sgpr47 ; SI-NEXT: s_branch .LBB73_2 ; SI-NEXT: .LBB73_4: ; SI-NEXT: v_mov_b32_e32 v3, s6 -; SI-NEXT: v_mov_b32_e32 v2, s66 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v2, s70 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v2, s64 -; SI-NEXT: v_mov_b32_e32 v35, s46 +; SI-NEXT: v_mov_b32_e32 v2, s68 +; SI-NEXT: v_mov_b32_e32 v37, s46 ; SI-NEXT: v_readlane_b32 s46, v62, 0 ; SI-NEXT: v_readlane_b32 s47, v62, 1 -; SI-NEXT: v_mov_b32_e32 v29, s38 -; SI-NEXT: v_mov_b32_e32 v46, s36 -; SI-NEXT: v_mov_b32_e32 v45, s34 -; SI-NEXT: v_mov_b32_e32 v44, s30 -; SI-NEXT: v_mov_b32_e32 v41, s94 -; SI-NEXT: v_mov_b32_e32 v40, s92 -; SI-NEXT: v_mov_b32_e32 v59, s90 -; SI-NEXT: v_mov_b32_e32 v39, s88 -; SI-NEXT: v_mov_b32_e32 v38, s78 -; SI-NEXT: v_mov_b32_e32 v52, s76 -; SI-NEXT: v_mov_b32_e32 v51, s74 -; SI-NEXT: v_mov_b32_e32 v50, s72 -; SI-NEXT: v_mov_b32_e32 v49, s62 -; SI-NEXT: v_mov_b32_e32 v37, s60 -; SI-NEXT: v_mov_b32_e32 v36, s58 -; SI-NEXT: v_mov_b32_e32 v32, s56 -; SI-NEXT: v_mov_b32_e32 v28, s16 -; SI-NEXT: v_mov_b32_e32 v20, s18 -; SI-NEXT: v_mov_b32_e32 v58, s20 -; SI-NEXT: v_mov_b32_e32 v43, s22 -; SI-NEXT: v_mov_b32_e32 v54, s24 -; SI-NEXT: v_mov_b32_e32 v48, s26 -; SI-NEXT: v_mov_b32_e32 v31, s28 -; SI-NEXT: v_mov_b32_e32 v25, s44 -; SI-NEXT: v_mov_b32_e32 v17, s42 +; SI-NEXT: v_mov_b32_e32 v29, s16 +; SI-NEXT: v_mov_b32_e32 v17, s18 +; SI-NEXT: v_mov_b32_e32 v56, s20 +; SI-NEXT: v_mov_b32_e32 v41, s22 +; SI-NEXT: v_mov_b32_e32 v50, s24 +; SI-NEXT: v_mov_b32_e32 v33, s26 +; SI-NEXT: v_mov_b32_e32 v27, s28 +; SI-NEXT: v_mov_b32_e32 v21, s44 +; SI-NEXT: v_mov_b32_e32 v15, s42 ; SI-NEXT: v_mov_b32_e32 v13, s40 ; SI-NEXT: v_mov_b32_e32 v11, s14 ; SI-NEXT: v_mov_b32_e32 v9, s12 ; SI-NEXT: v_mov_b32_e32 v7, s10 ; SI-NEXT: v_mov_b32_e32 v5, s8 ; SI-NEXT: v_mov_b32_e32 v1, s4 -; SI-NEXT: v_mov_b32_e32 v34, s98 -; SI-NEXT: v_mov_b32_e32 v26, s96 -; SI-NEXT: v_mov_b32_e32 v23, s86 -; SI-NEXT: v_mov_b32_e32 v22, s84 -; SI-NEXT: v_mov_b32_e32 v18, s82 -; SI-NEXT: v_mov_b32_e32 v15, s80 -; SI-NEXT: v_mov_b32_e32 v14, s70 -; SI-NEXT: v_mov_b32_e32 v56, s68 +; SI-NEXT: v_mov_b32_e32 v19, s38 +; SI-NEXT: v_mov_b32_e32 v18, s36 +; SI-NEXT: v_mov_b32_e32 v59, s34 +; SI-NEXT: v_mov_b32_e32 v58, s30 +; SI-NEXT: v_mov_b32_e32 v57, s94 +; SI-NEXT: v_mov_b32_e32 v46, s92 +; SI-NEXT: v_mov_b32_e32 v45, s90 +; SI-NEXT: v_mov_b32_e32 v44, s88 +; SI-NEXT: v_mov_b32_e32 v43, s78 +; SI-NEXT: v_mov_b32_e32 v42, s76 +; SI-NEXT: v_mov_b32_e32 v39, s74 +; SI-NEXT: v_mov_b32_e32 v38, s72 +; SI-NEXT: v_mov_b32_e32 v54, s62 +; SI-NEXT: v_mov_b32_e32 v53, s60 +; SI-NEXT: v_mov_b32_e32 v52, s58 +; SI-NEXT: v_mov_b32_e32 v48, s56 +; SI-NEXT: v_mov_b32_e32 v36, s98 +; SI-NEXT: v_mov_b32_e32 v35, s96 +; SI-NEXT: v_mov_b32_e32 v31, s86 +; SI-NEXT: v_mov_b32_e32 v25, s84 +; SI-NEXT: v_mov_b32_e32 v24, s82 +; SI-NEXT: v_mov_b32_e32 v23, s80 ; SI-NEXT: v_readlane_b32 s10, v62, 34 ; SI-NEXT: v_readlane_b32 s12, v62, 35 ; SI-NEXT: v_readlane_b32 s14, v62, 36 @@ -110358,12 +110504,12 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_readlane_b32 s90, v61, 3 ; SI-NEXT: v_readlane_b32 s91, v61, 4 ; SI-NEXT: v_readlane_b32 s92, v61, 5 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v2, s54 ; SI-NEXT: v_readlane_b32 s93, v61, 6 ; SI-NEXT: v_readlane_b32 s94, v61, 7 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mov_b32_e32 v2, s66 ; SI-NEXT: v_readlane_b32 s95, v61, 8 ; SI-NEXT: v_readlane_b32 s30, v61, 9 ; SI-NEXT: v_readlane_b32 s31, v61, 10 @@ -110374,6 +110520,14 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_readlane_b32 s8, v61, 15 ; SI-NEXT: v_readlane_b32 vcc_lo, v61, 16 ; SI-NEXT: v_readlane_b32 s6, v61, 17 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mov_b32_e32 v2, s64 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mov_b32_e32 v2, s54 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) @@ -110382,6 +110536,10 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_mov_b32_e32 v2, s50 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mov_b32_e32 v2, s48 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) @@ -110482,26 +110640,22 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v2, s48 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_mov_b32_e32 v2, s46 ; SI-NEXT: v_readlane_b32 s46, v62, 47 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: .LBB73_5: ; %end ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_and_b32_e32 v2, 0xff, v28 -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v29 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v29 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v19 ; SI-NEXT: s_and_b32 s4, s17, 0xff ; SI-NEXT: s_lshl_b32 s6, s6, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v46 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v18 ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, vcc_lo, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v45 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v59 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s8, s8, 24 ; SI-NEXT: v_or_b32_e32 v4, v6, v4 @@ -110515,21 +110669,21 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0 ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen -; SI-NEXT: v_and_b32_e32 v2, 0xff, v20 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v17 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v44 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v58 ; SI-NEXT: s_and_b32 s4, s19, 0xff ; SI-NEXT: s_lshl_b32 s6, s37, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v41 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v57 ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s36, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v40 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v46 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s8, s35, 24 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s8, s6 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -110540,21 +110694,21 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0 ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen -; SI-NEXT: v_and_b32_e32 v2, 0xff, v58 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v56 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v59 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v45 ; SI-NEXT: s_and_b32 s4, s21, 0xff ; SI-NEXT: s_lshl_b32 s6, s34, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v39 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v44 ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s31, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v38 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v43 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s8, s30, 24 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s8, s6 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -110565,21 +110719,21 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0 ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen -; SI-NEXT: v_and_b32_e32 v2, 0xff, v43 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v41 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v52 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v42 ; SI-NEXT: s_and_b32 s4, s23, 0xff ; SI-NEXT: s_lshl_b32 s6, s95, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v51 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v39 ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s94, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v50 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v38 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s8, s93, 24 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s8, s6 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -110590,21 +110744,21 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0 ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen -; SI-NEXT: v_and_b32_e32 v2, 0xff, v54 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v50 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v49 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v54 ; SI-NEXT: s_and_b32 s4, s25, 0xff ; SI-NEXT: s_lshl_b32 s6, s92, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v37 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v53 ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s91, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v36 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v52 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s8, s90, 24 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s8, s6 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -110615,21 +110769,21 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0 ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen -; SI-NEXT: v_and_b32_e32 v2, 0xff, v48 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v33 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v32 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v48 ; SI-NEXT: s_and_b32 s4, s27, 0xff ; SI-NEXT: s_lshl_b32 s6, s89, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v35 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v37 ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s88, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v34 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v36 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s8, s79, 24 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s8, s6 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -110640,21 +110794,21 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0 ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen -; SI-NEXT: v_and_b32_e32 v2, 0xff, v31 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v27 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v26 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v35 ; SI-NEXT: s_and_b32 s4, s29, 0xff ; SI-NEXT: s_lshl_b32 s6, s78, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v23 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v31 ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s77, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v22 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v25 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s8, s76, 24 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s8, s6 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -110665,49 +110819,26 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0 ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen -; SI-NEXT: v_and_b32_e32 v2, 0xff, v25 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v2, 0xff, v21 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v18 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v24 ; SI-NEXT: s_and_b32 s4, s45, 0xff ; SI-NEXT: s_lshl_b32 s6, s75, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v15 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v23 ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s74, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v14 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s8, s73, 24 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s8, s6 -; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_add_i32_e32 v4, vcc, 56, v0 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0 -; SI-NEXT: v_mov_b32_e32 v4, s4 -; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xff, v17 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v56 -; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: s_and_b32 s4, s43, 0xff ; SI-NEXT: s_lshl_b32 s6, s72, 8 -; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_and_b32 s6, s63, 0xff -; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s8, s62, 24 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_or_b32 s6, s8, s6 -; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_lshl_b32 s6, s61, 8 -; SI-NEXT: s_lshl_b32 s8, s59, 24 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_readlane_b32 s30, v63, 34 ; SI-NEXT: v_readlane_b32 s31, v63, 35 @@ -110746,6 +110877,34 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 ; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v16 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 +; SI-NEXT: v_add_i32_e32 v4, vcc, 56, v0 +; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0 +; SI-NEXT: v_mov_b32_e32 v4, s4 +; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen +; SI-NEXT: v_and_b32_e32 v2, 0xff, v15 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: s_and_b32 s4, s43, 0xff +; SI-NEXT: s_or_b32 s4, s4, s6 +; SI-NEXT: s_and_b32 s6, s63, 0xff +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s6, s8, s6 +; SI-NEXT: s_or_b32 s4, s4, s6 +; SI-NEXT: s_lshl_b32 s6, s61, 8 +; SI-NEXT: s_lshl_b32 s8, s59, 24 +; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v14 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v2, v2, v4 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v14 ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload @@ -110780,8 +110939,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v12 @@ -110794,8 +110953,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen ; SI-NEXT: v_and_b32_e32 v2, 0xff, v11 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: s_and_b32 s4, s15, 0xff ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s57, 0xff @@ -110807,14 +110966,14 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: s_lshl_b32 s8, s44, 24 ; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v10 @@ -110827,8 +110986,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen ; SI-NEXT: v_and_b32_e32 v2, 0xff, v9 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: s_and_b32 s4, s13, 0xff ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s46, 0xff @@ -110840,14 +110999,14 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: s_lshl_b32 s8, s28, 24 ; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v8 @@ -110860,8 +111019,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen ; SI-NEXT: v_and_b32_e32 v2, 0xff, v7 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload ; SI-NEXT: s_and_b32 s4, s11, 0xff ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s40, 0xff @@ -110873,14 +111032,14 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: s_lshl_b32 s8, s22, 24 ; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6 @@ -110894,8 +111053,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen ; SI-NEXT: v_and_b32_e32 v2, 0xff, v5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: s_and_b32 s4, s9, 0xff ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s24, 0xff @@ -110907,10 +111066,10 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 @@ -110926,9 +111085,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen ; SI-NEXT: v_and_b32_e32 v2, 0xff, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; SI-NEXT: s_and_b32 s4, s7, 0xff ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s18, 0xff @@ -110941,10 +111100,10 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 @@ -110959,9 +111118,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0 ; SI-NEXT: v_mov_b32_e32 v3, s4 ; SI-NEXT: buffer_store_dword v3, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: s_and_b32 s4, s5, 0xff ; SI-NEXT: s_lshl_b32 s5, s14, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 @@ -110973,10 +111132,10 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 @@ -111005,9 +111164,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -111016,8 +111175,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -111226,663 +111385,656 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; VI-NEXT: v_writelane_b32 v62, s46, 57 ; VI-NEXT: s_lshr_b32 s71, s16, 16 ; VI-NEXT: s_lshr_b32 s70, s16, 8 -; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; VI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; VI-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; VI-NEXT: s_lshr_b64 s[30:31], s[24:25], 24 -; VI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24 -; VI-NEXT: s_lshr_b64 s[36:37], s[20:21], 24 -; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24 -; VI-NEXT: s_lshr_b64 s[48:49], s[16:17], 24 +; VI-NEXT: s_lshr_b64 s[48:49], s[4:5], 24 +; VI-NEXT: s_lshr_b64 s[38:39], s[6:7], 24 +; VI-NEXT: s_lshr_b64 s[36:37], s[8:9], 24 +; VI-NEXT: s_lshr_b64 s[34:35], s[10:11], 24 +; VI-NEXT: s_lshr_b64 s[30:31], s[12:13], 24 +; VI-NEXT: s_lshr_b64 s[90:91], s[14:15], 24 +; VI-NEXT: s_lshr_b64 s[88:89], s[40:41], 24 +; VI-NEXT: s_lshr_b64 s[78:79], s[42:43], 24 +; VI-NEXT: s_lshr_b64 s[76:77], s[44:45], 24 +; VI-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; VI-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 +; VI-NEXT: s_lshr_b64 s[62:63], s[24:25], 24 +; VI-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 +; VI-NEXT: s_lshr_b64 s[58:59], s[20:21], 24 +; VI-NEXT: s_lshr_b64 s[56:57], s[18:19], 24 +; VI-NEXT: s_lshr_b64 s[46:47], s[16:17], 24 ; VI-NEXT: s_cbranch_execnz .LBB73_4 ; VI-NEXT: .LBB73_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[13:14], s[4:5], 1.0 -; VI-NEXT: v_add_f64 v[1:2], s[6:7], 1.0 -; VI-NEXT: v_add_f64 v[3:4], s[8:9], 1.0 -; VI-NEXT: v_add_f64 v[5:6], s[10:11], 1.0 -; VI-NEXT: v_add_f64 v[7:8], s[12:13], 1.0 -; VI-NEXT: v_add_f64 v[9:10], s[14:15], 1.0 -; VI-NEXT: v_add_f64 v[11:12], s[40:41], 1.0 -; VI-NEXT: v_add_f64 v[15:16], s[42:43], 1.0 -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] -; VI-NEXT: v_add_f64 v[17:18], s[44:45], 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] -; VI-NEXT: v_add_f64 v[19:20], s[28:29], 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] -; VI-NEXT: v_add_f64 v[21:22], s[26:27], 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] -; VI-NEXT: v_add_f64 v[23:24], s[24:25], 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] -; VI-NEXT: v_add_f64 v[25:26], s[22:23], 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] +; VI-NEXT: v_add_f64 v[1:2], s[4:5], 1.0 +; VI-NEXT: v_add_f64 v[3:4], s[6:7], 1.0 +; VI-NEXT: v_add_f64 v[5:6], s[8:9], 1.0 +; VI-NEXT: v_add_f64 v[7:8], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[9:10], s[12:13], 1.0 +; VI-NEXT: v_add_f64 v[13:14], s[14:15], 1.0 +; VI-NEXT: v_add_f64 v[19:20], s[40:41], 1.0 +; VI-NEXT: v_add_f64 v[25:26], s[42:43], 1.0 +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[1:2] +; VI-NEXT: v_add_f64 v[11:12], s[44:45], 1.0 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4] +; VI-NEXT: v_add_f64 v[15:16], s[28:29], 1.0 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[5:6] +; VI-NEXT: v_add_f64 v[17:18], s[26:27], 1.0 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[7:8] +; VI-NEXT: v_add_f64 v[21:22], s[24:25], 1.0 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[9:10] +; VI-NEXT: v_add_f64 v[23:24], s[22:23], 1.0 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[13:14] ; VI-NEXT: v_add_f64 v[27:28], s[20:21], 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[19:20] ; VI-NEXT: v_add_f64 v[29:30], s[18:19], 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] -; VI-NEXT: v_add_f64 v[31:32], s[16:17], 1.0 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18] -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v20 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v20 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] -; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[31:32] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v20 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26] -; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v22 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28] -; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v22 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30] -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v22 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v2 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v1 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v4 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v5 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v9 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v24 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v24 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v24 -; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v26 -; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v26 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v26 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v28 -; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v28 -; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v28 -; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v27 -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27 -; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v30 -; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v30 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v30 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v29 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v29 -; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v32 -; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v31 -; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[25:26] +; VI-NEXT: v_add_f64 v[33:34], s[16:17], 1.0 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[11:12] +; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v12 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[15:16] +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v12 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[17:18] +; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v16 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[21:22] +; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v16 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[23:24] +; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v16 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[27:28] +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v18 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[29:30] +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v18 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[33:34] +; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v18 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v2 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v2 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v2 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v1 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v4 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v4 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v3 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v3 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v6 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v6 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v6 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v5 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v5 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v8 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v8 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v8 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v7 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v7 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v10 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v10 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v10 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v9 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v9 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v14 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v14 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v13 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v13 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v20 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v20 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v20 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v19 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v19 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v26 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v26 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v26 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v25 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v25 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v12 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v11 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v11 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v15 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v17 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v17 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v21 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v21 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v23 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v23 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v27 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v22 +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v24 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v24 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v28 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v28 +; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v28 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v30 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v30 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v30 +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v29 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v29 +; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v34 +; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v33 ; VI-NEXT: s_branch .LBB73_5 ; VI-NEXT: .LBB73_3: -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 ; VI-NEXT: ; implicit-def: $sgpr70 ; VI-NEXT: ; implicit-def: $sgpr71 +; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr68 ; VI-NEXT: ; implicit-def: $sgpr69 +; VI-NEXT: ; implicit-def: $sgpr56 ; VI-NEXT: ; implicit-def: $sgpr66 ; VI-NEXT: ; implicit-def: $sgpr67 +; VI-NEXT: ; implicit-def: $sgpr58 ; VI-NEXT: ; implicit-def: $sgpr64 ; VI-NEXT: ; implicit-def: $sgpr65 +; VI-NEXT: ; implicit-def: $sgpr60 ; VI-NEXT: ; implicit-def: $sgpr54 ; VI-NEXT: ; implicit-def: $sgpr55 +; VI-NEXT: ; implicit-def: $sgpr62 ; VI-NEXT: ; implicit-def: $sgpr53 ; VI-NEXT: ; implicit-def: $sgpr87 +; VI-NEXT: ; implicit-def: $sgpr72 ; VI-NEXT: ; implicit-def: $sgpr86 ; VI-NEXT: ; implicit-def: $sgpr52 +; VI-NEXT: ; implicit-def: $sgpr74 ; VI-NEXT: ; implicit-def: $sgpr50 ; VI-NEXT: ; implicit-def: $sgpr51 +; VI-NEXT: ; implicit-def: $sgpr76 ; VI-NEXT: ; implicit-def: $sgpr84 ; VI-NEXT: ; implicit-def: $sgpr85 +; VI-NEXT: ; implicit-def: $sgpr78 ; VI-NEXT: ; implicit-def: $sgpr82 ; VI-NEXT: ; implicit-def: $sgpr83 +; VI-NEXT: ; implicit-def: $sgpr88 ; VI-NEXT: ; implicit-def: $sgpr80 ; VI-NEXT: ; implicit-def: $sgpr81 -; VI-NEXT: ; implicit-def: $sgpr48 -; VI-NEXT: ; implicit-def: $sgpr38 -; VI-NEXT: ; implicit-def: $sgpr36 -; VI-NEXT: ; implicit-def: $sgpr34 -; VI-NEXT: ; implicit-def: $sgpr30 ; VI-NEXT: ; implicit-def: $sgpr90 -; VI-NEXT: ; implicit-def: $sgpr88 -; VI-NEXT: ; implicit-def: $sgpr78 -; VI-NEXT: ; implicit-def: $sgpr76 -; VI-NEXT: ; implicit-def: $sgpr74 -; VI-NEXT: ; implicit-def: $sgpr72 -; VI-NEXT: ; implicit-def: $sgpr62 -; VI-NEXT: ; implicit-def: $sgpr60 -; VI-NEXT: ; implicit-def: $sgpr58 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr30 +; VI-NEXT: ; implicit-def: $sgpr34 +; VI-NEXT: ; implicit-def: $sgpr36 +; VI-NEXT: ; implicit-def: $sgpr38 +; VI-NEXT: ; implicit-def: $sgpr48 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 ; VI-NEXT: s_branch .LBB73_2 ; VI-NEXT: .LBB73_4: -; VI-NEXT: v_mov_b32_e32 v42, s48 -; VI-NEXT: v_mov_b32_e32 v41, s38 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s36 -; VI-NEXT: v_mov_b32_e32 v34, s65 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s64 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s55 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s54 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s87 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s53 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s52 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s86 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s51 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s50 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s85 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s84 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s83 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s82 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s81 -; VI-NEXT: v_mov_b32_e32 v13, s4 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s80 +; VI-NEXT: v_mov_b32_e32 v36, s67 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s66 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s65 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s64 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s55 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s54 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s87 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s53 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s52 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s86 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s51 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s50 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s85 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s84 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s83 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s82 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s81 +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s80 ; VI-NEXT: v_readlane_b32 s4, v62, 0 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 1 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 2 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 3 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 4 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 5 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 6 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 7 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 8 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 9 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s46 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s56 ; VI-NEXT: v_readlane_b32 s4, v62, 10 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: v_mov_b32_e32 v33, s16 +; VI-NEXT: v_mov_b32_e32 v29, s18 +; VI-NEXT: v_mov_b32_e32 v27, s20 +; VI-NEXT: v_mov_b32_e32 v23, s22 +; VI-NEXT: v_mov_b32_e32 v21, s24 +; VI-NEXT: v_mov_b32_e32 v17, s26 +; VI-NEXT: v_mov_b32_e32 v15, s28 +; VI-NEXT: v_mov_b32_e32 v11, s44 +; VI-NEXT: v_mov_b32_e32 v25, s42 +; VI-NEXT: v_mov_b32_e32 v19, s40 +; VI-NEXT: v_mov_b32_e32 v13, s14 +; VI-NEXT: v_mov_b32_e32 v9, s12 +; VI-NEXT: v_mov_b32_e32 v7, s10 +; VI-NEXT: v_mov_b32_e32 v5, s8 +; VI-NEXT: v_mov_b32_e32 v3, s6 +; VI-NEXT: v_mov_b32_e32 v2, s5 +; VI-NEXT: v_mov_b32_e32 v4, s7 +; VI-NEXT: v_mov_b32_e32 v6, s9 +; VI-NEXT: v_mov_b32_e32 v8, s11 +; VI-NEXT: v_mov_b32_e32 v10, s13 +; VI-NEXT: v_mov_b32_e32 v14, s15 +; VI-NEXT: v_mov_b32_e32 v20, s41 +; VI-NEXT: v_mov_b32_e32 v26, s43 +; VI-NEXT: v_mov_b32_e32 v12, s45 +; VI-NEXT: v_mov_b32_e32 v16, s29 +; VI-NEXT: v_mov_b32_e32 v18, s27 +; VI-NEXT: v_mov_b32_e32 v22, s25 +; VI-NEXT: v_mov_b32_e32 v24, s23 +; VI-NEXT: v_mov_b32_e32 v28, s21 +; VI-NEXT: v_mov_b32_e32 v30, s19 +; VI-NEXT: v_mov_b32_e32 v34, s17 +; VI-NEXT: v_mov_b32_e32 v32, s71 +; VI-NEXT: v_mov_b32_e32 v35, s70 +; VI-NEXT: v_mov_b32_e32 v31, s69 +; VI-NEXT: v_mov_b32_e32 v48, s68 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s58 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s60 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s62 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s72 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s74 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s76 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s78 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s88 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s90 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s30 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s34 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s36 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s38 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s48 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 11 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 12 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 13 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 14 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s34 -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 15 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 16 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 17 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 18 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 19 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 20 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 21 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 22 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 23 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 24 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 25 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 26 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 27 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 28 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 29 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 30 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 31 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 32 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 33 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 34 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 35 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: v_mov_b32_e32 v61, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 36 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: v_mov_b32_e32 v53, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 37 -; VI-NEXT: v_mov_b32_e32 v51, s4 +; VI-NEXT: v_mov_b32_e32 v54, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 38 -; VI-NEXT: v_mov_b32_e32 v37, s4 +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 39 -; VI-NEXT: v_mov_b32_e32 v52, s4 +; VI-NEXT: v_mov_b32_e32 v55, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 40 -; VI-NEXT: v_mov_b32_e32 v53, s4 +; VI-NEXT: v_mov_b32_e32 v49, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 41 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s30 -; VI-NEXT: v_mov_b32_e32 v38, s4 +; VI-NEXT: v_mov_b32_e32 v39, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 42 -; VI-NEXT: v_mov_b32_e32 v47, s4 +; VI-NEXT: v_mov_b32_e32 v43, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 43 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: v_mov_b32_e32 v44, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 44 -; VI-NEXT: v_mov_b32_e32 v56, s4 +; VI-NEXT: v_mov_b32_e32 v45, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 45 -; VI-NEXT: v_mov_b32_e32 v48, s4 +; VI-NEXT: v_mov_b32_e32 v50, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 46 -; VI-NEXT: v_mov_b32_e32 v54, s4 +; VI-NEXT: v_mov_b32_e32 v40, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 47 -; VI-NEXT: v_mov_b32_e32 v57, s4 +; VI-NEXT: v_mov_b32_e32 v46, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 48 -; VI-NEXT: v_mov_b32_e32 v35, s4 +; VI-NEXT: v_mov_b32_e32 v47, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 49 -; VI-NEXT: v_mov_b32_e32 v39, s4 +; VI-NEXT: v_mov_b32_e32 v37, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 50 -; VI-NEXT: v_mov_b32_e32 v58, s4 +; VI-NEXT: v_mov_b32_e32 v41, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 51 -; VI-NEXT: v_mov_b32_e32 v49, s4 +; VI-NEXT: v_mov_b32_e32 v56, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 52 -; VI-NEXT: v_mov_b32_e32 v59, s4 +; VI-NEXT: v_mov_b32_e32 v51, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 53 -; VI-NEXT: v_mov_b32_e32 v40, s4 +; VI-NEXT: v_mov_b32_e32 v57, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 54 -; VI-NEXT: v_mov_b32_e32 v60, s4 +; VI-NEXT: v_mov_b32_e32 v58, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 55 -; VI-NEXT: v_mov_b32_e32 v61, s4 +; VI-NEXT: v_mov_b32_e32 v42, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 56 -; VI-NEXT: v_mov_b32_e32 v55, s4 +; VI-NEXT: v_mov_b32_e32 v38, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 57 -; VI-NEXT: v_mov_b32_e32 v14, s5 -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: v_mov_b32_e32 v2, s7 -; VI-NEXT: v_mov_b32_e32 v3, s8 -; VI-NEXT: v_mov_b32_e32 v4, s9 -; VI-NEXT: v_mov_b32_e32 v5, s10 -; VI-NEXT: v_mov_b32_e32 v6, s11 -; VI-NEXT: v_mov_b32_e32 v7, s12 -; VI-NEXT: v_mov_b32_e32 v8, s13 -; VI-NEXT: v_mov_b32_e32 v9, s14 -; VI-NEXT: v_mov_b32_e32 v10, s15 -; VI-NEXT: v_mov_b32_e32 v11, s40 -; VI-NEXT: v_mov_b32_e32 v12, s41 -; VI-NEXT: v_mov_b32_e32 v15, s42 -; VI-NEXT: v_mov_b32_e32 v16, s43 -; VI-NEXT: v_mov_b32_e32 v17, s44 -; VI-NEXT: v_mov_b32_e32 v18, s45 -; VI-NEXT: v_mov_b32_e32 v19, s28 -; VI-NEXT: v_mov_b32_e32 v20, s29 -; VI-NEXT: v_mov_b32_e32 v21, s26 -; VI-NEXT: v_mov_b32_e32 v22, s27 -; VI-NEXT: v_mov_b32_e32 v23, s24 -; VI-NEXT: v_mov_b32_e32 v24, s25 -; VI-NEXT: v_mov_b32_e32 v25, s22 -; VI-NEXT: v_mov_b32_e32 v26, s23 -; VI-NEXT: v_mov_b32_e32 v27, s20 -; VI-NEXT: v_mov_b32_e32 v28, s21 -; VI-NEXT: v_mov_b32_e32 v29, s18 -; VI-NEXT: v_mov_b32_e32 v30, s19 -; VI-NEXT: v_mov_b32_e32 v31, s16 -; VI-NEXT: v_mov_b32_e32 v32, s17 -; VI-NEXT: v_mov_b32_e32 v45, s71 -; VI-NEXT: v_mov_b32_e32 v46, s70 -; VI-NEXT: v_mov_b32_e32 v43, s69 -; VI-NEXT: v_mov_b32_e32 v44, s68 -; VI-NEXT: v_mov_b32_e32 v50, s67 -; VI-NEXT: v_mov_b32_e32 v33, s66 -; VI-NEXT: v_mov_b32_e32 v36, s4 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s90 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s88 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s78 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s76 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s74 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s72 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s62 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s60 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s58 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s56 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v41, s46 -; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v52, s4 ; VI-NEXT: .LBB73_5: ; %end +; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v41, v45, v42, s4 -; VI-NEXT: v_perm_b32 v31, v31, v46, s4 -; VI-NEXT: v_perm_b32 v32, v32, v36, s4 -; VI-NEXT: v_lshlrev_b32_e32 v36, 16, v41 -; VI-NEXT: v_or_b32_e32 v31, v31, v36 -; VI-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v31, v55, v61, s4 -; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; VI-NEXT: v_or_b32_e32 v31, v32, v31 -; VI-NEXT: v_add_u32_e32 v32, vcc, 4, v0 -; VI-NEXT: buffer_store_dword v31, v32, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v29, v29, v44, s4 -; VI-NEXT: v_perm_b32 v27, v27, v33, s4 +; VI-NEXT: v_perm_b32 v33, v33, v35, s4 +; VI-NEXT: v_perm_b32 v29, v29, v48, s4 ; VI-NEXT: v_readlane_b32 s30, v63, 30 ; VI-NEXT: v_readlane_b32 s31, v63, 31 ; VI-NEXT: v_readlane_b32 s87, v63, 29 @@ -111916,308 +112068,323 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; VI-NEXT: v_readlane_b32 s35, v63, 1 ; VI-NEXT: v_readlane_b32 s34, v63, 0 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v31, v43, v31, s4 +; VI-NEXT: v_perm_b32 v32, v32, v59, s4 +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; VI-NEXT: v_or_b32_e32 v32, v33, v32 +; VI-NEXT: v_perm_b32 v33, v38, v42, s4 +; VI-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v32, v34, v52, s4 +; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; VI-NEXT: v_or_b32_e32 v32, v32, v33 +; VI-NEXT: v_add_u32_e32 v33, vcc, 4, v0 +; VI-NEXT: buffer_store_dword v32, v33, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v31, v31, v32, s4 ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; VI-NEXT: v_or_b32_e32 v29, v29, v31 ; VI-NEXT: v_add_u32_e32 v31, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v29, v31, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v29, v30, v60, s4 -; VI-NEXT: v_perm_b32 v30, v40, v59, s4 +; VI-NEXT: v_perm_b32 v29, v30, v58, s4 +; VI-NEXT: v_perm_b32 v30, v57, v51, s4 ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; VI-NEXT: v_or_b32_e32 v29, v29, v30 ; VI-NEXT: v_add_u32_e32 v30, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v29, v30, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v29, v50, v29, s4 +; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v27, v27, v29, s4 +; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v29, v30, v29, s4 ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; VI-NEXT: v_or_b32_e32 v27, v27, v29 ; VI-NEXT: v_add_u32_e32 v29, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v27, v29, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v27, v28, v49, s4 -; VI-NEXT: v_perm_b32 v28, v58, v39, s4 +; VI-NEXT: v_perm_b32 v27, v28, v56, s4 +; VI-NEXT: v_perm_b32 v28, v41, v37, s4 ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; VI-NEXT: v_or_b32_e32 v27, v27, v28 ; VI-NEXT: v_add_u32_e32 v28, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v27, v28, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v23, v23, v27, s4 +; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v27, v28, v27, s4 -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v25, v25, v28, s4 -; VI-NEXT: v_or_b32_e32 v25, v25, v27 +; VI-NEXT: v_or_b32_e32 v23, v23, v27 ; VI-NEXT: v_add_u32_e32 v27, vcc, 24, v0 -; VI-NEXT: buffer_store_dword v25, v27, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v25, v26, v35, s4 -; VI-NEXT: v_perm_b32 v26, v57, v54, s4 -; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; VI-NEXT: v_or_b32_e32 v25, v25, v26 -; VI-NEXT: v_add_u32_e32 v26, vcc, 28, v0 -; VI-NEXT: buffer_store_dword v25, v26, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v25, v26, v25, s4 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v23, v23, v26, s4 -; VI-NEXT: v_or_b32_e32 v23, v23, v25 -; VI-NEXT: v_add_u32_e32 v25, vcc, 32, v0 -; VI-NEXT: buffer_store_dword v23, v25, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v23, v24, v48, s4 -; VI-NEXT: v_perm_b32 v24, v56, v34, s4 +; VI-NEXT: buffer_store_dword v23, v27, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v23, v24, v47, s4 +; VI-NEXT: v_perm_b32 v24, v46, v40, s4 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: v_add_u32_e32 v24, vcc, 36, v0 +; VI-NEXT: v_add_u32_e32 v24, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v23, v24, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v21, v21, v23, s4 +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v23, v24, v23, s4 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v21, v21, v24, s4 ; VI-NEXT: v_or_b32_e32 v21, v21, v23 -; VI-NEXT: v_add_u32_e32 v23, vcc, 40, v0 +; VI-NEXT: v_add_u32_e32 v23, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v21, v23, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v21, v22, v47, s4 -; VI-NEXT: v_perm_b32 v22, v38, v53, s4 +; VI-NEXT: v_perm_b32 v21, v22, v50, s4 +; VI-NEXT: v_perm_b32 v22, v45, v44, s4 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; VI-NEXT: v_or_b32_e32 v21, v21, v22 -; VI-NEXT: v_add_u32_e32 v22, vcc, 44, v0 +; VI-NEXT: v_add_u32_e32 v22, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v21, v22, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v17, v17, v21, s4 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v21, v22, v21, s4 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v19, v22, s4 -; VI-NEXT: v_or_b32_e32 v19, v19, v21 -; VI-NEXT: v_add_u32_e32 v21, vcc, 48, v0 -; VI-NEXT: buffer_store_dword v19, v21, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v19, v20, v52, s4 -; VI-NEXT: v_perm_b32 v20, v37, v51, s4 -; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; VI-NEXT: v_or_b32_e32 v19, v19, v20 -; VI-NEXT: v_add_u32_e32 v20, vcc, 52, v0 -; VI-NEXT: buffer_store_dword v19, v20, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v20, v19, s4 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v17, v17, v20, s4 -; VI-NEXT: v_or_b32_e32 v17, v17, v19 -; VI-NEXT: v_add_u32_e32 v19, vcc, 56, v0 -; VI-NEXT: buffer_store_dword v17, v19, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v17, v18, v17, s4 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v18, v19, v18, s4 +; VI-NEXT: v_or_b32_e32 v17, v17, v21 +; VI-NEXT: v_add_u32_e32 v21, vcc, 40, v0 +; VI-NEXT: buffer_store_dword v17, v21, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v17, v18, v43, s4 +; VI-NEXT: v_perm_b32 v18, v39, v49, s4 ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; VI-NEXT: v_or_b32_e32 v17, v17, v18 -; VI-NEXT: v_add_u32_e32 v18, vcc, 60, v0 +; VI-NEXT: v_add_u32_e32 v18, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v15, v15, v17, s4 +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v17, v18, v17, s4 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v15, v18, s4 ; VI-NEXT: v_or_b32_e32 v15, v15, v17 -; VI-NEXT: v_add_u32_e32 v17, vcc, 64, v0 +; VI-NEXT: v_add_u32_e32 v17, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v15, v17, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v16, v15, s4 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v16, v17, v16, s4 +; VI-NEXT: v_perm_b32 v15, v16, v55, s4 +; VI-NEXT: v_perm_b32 v16, v36, v54, s4 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; VI-NEXT: v_or_b32_e32 v15, v15, v16 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x44, v0 +; VI-NEXT: v_add_u32_e32 v16, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v11, v15, s4 +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v15, v16, v15, s4 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v11, v11, v16, s4 ; VI-NEXT: v_or_b32_e32 v11, v11, v15 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x48, v0 +; VI-NEXT: v_add_u32_e32 v15, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v11, v15, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v11, v12, v53, s4 +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v11, v12, v11, s4 -; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v12, v61, v12, s4 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_or_b32_e32 v11, v11, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 60, v0 +; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v12, v12, v15, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v12, v15, v12, s4 +; VI-NEXT: v_perm_b32 v11, v25, v11, s4 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x4c, v0 +; VI-NEXT: v_add_u32_e32 v12, vcc, 64, v0 ; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v12, v15, v12, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v9, v9, v11, s4 -; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v11, v26, v11, s4 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_or_b32_e32 v11, v11, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x44, v0 +; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v11, v11, v15, s4 +; VI-NEXT: v_perm_b32 v12, v12, v15, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v19, v11, s4 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_or_b32_e32 v11, v11, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x48, v0 +; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v12, v15, v12, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v20, v11, s4 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_or_b32_e32 v11, v11, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x4c, v0 +; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v13, v11, s4 +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v12, v13, v12, s4 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_or_b32_e32 v11, v11, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x50, v0 +; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v12, v13, v12, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v14, v11, s4 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_or_b32_e32 v11, v11, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x54, v0 +; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v9, v9, v11, s4 +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v12, v11, s4 ; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; VI-NEXT: v_or_b32_e32 v9, v9, v11 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x50, v0 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x58, v0 ; VI-NEXT: buffer_store_dword v9, v11, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v9, v10, v9, s4 -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v10, v11, v10, s4 ; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x54, v0 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x5c, v0 ; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v7, v9, s4 -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v9, v9, v10, s4 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v9, v10, v9, s4 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; VI-NEXT: v_or_b32_e32 v7, v7, v9 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x58, v0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x60, v0 ; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s4 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v8, v9, v8, s4 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_add_u32_e32 v8, vcc, 0x5c, v0 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x64, v0 ; VI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v5, v5, v7, s4 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v7, v7, v8, s4 +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v7, v8, v7, s4 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v5, v5, v7 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x60, v0 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x68, v0 ; VI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v5, v6, v5, s4 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v7, v6, s4 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_e32 v5, v5, v6 -; VI-NEXT: v_add_u32_e32 v6, vcc, 0x64, v0 +; VI-NEXT: v_add_u32_e32 v6, vcc, 0x6c, v0 ; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v3, v3, v5, s4 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v5, v5, v6, s4 +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v5, v6, v5, s4 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_e32 v3, v3, v5 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x68, v0 +; VI-NEXT: v_add_u32_e32 v5, vcc, 0x70, v0 ; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v3, v4, v3, s4 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v4, v5, v4, s4 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; VI-NEXT: v_or_b32_e32 v3, v3, v4 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x6c, v0 +; VI-NEXT: v_add_u32_e32 v4, vcc, 0x74, v0 ; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v3, s4 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v3, v3, v4, s4 +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v3, v4, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v1, v1, v3 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x70, v0 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x78, v0 ; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 -; VI-NEXT: v_perm_b32 v1, v13, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v14, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload @@ -112234,8 +112401,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -112244,8 +112411,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -112450,692 +112617,672 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; GFX9-NEXT: v_writelane_b32 v62, s46, 49 ; GFX9-NEXT: s_lshr_b32 s81, s16, 16 ; GFX9-NEXT: s_lshr_b32 s80, s16, 8 -; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; GFX9-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; GFX9-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; GFX9-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; GFX9-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; GFX9-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; GFX9-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; GFX9-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 -; GFX9-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; GFX9-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; GFX9-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; GFX9-NEXT: s_lshr_b64 s[92:93], s[24:25], 24 -; GFX9-NEXT: s_lshr_b64 s[94:95], s[22:23], 24 -; GFX9-NEXT: s_lshr_b64 s[30:31], s[20:21], 24 -; GFX9-NEXT: s_lshr_b64 s[34:35], s[18:19], 24 -; GFX9-NEXT: s_lshr_b64 s[36:37], s[16:17], 24 +; GFX9-NEXT: s_lshr_b64 s[36:37], s[4:5], 24 +; GFX9-NEXT: s_lshr_b64 s[34:35], s[6:7], 24 +; GFX9-NEXT: s_lshr_b64 s[30:31], s[8:9], 24 +; GFX9-NEXT: s_lshr_b64 s[94:95], s[10:11], 24 +; GFX9-NEXT: s_lshr_b64 s[92:93], s[12:13], 24 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[14:15], 24 +; GFX9-NEXT: s_lshr_b64 s[88:89], s[40:41], 24 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[42:43], 24 +; GFX9-NEXT: s_lshr_b64 s[76:77], s[44:45], 24 +; GFX9-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX9-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 +; GFX9-NEXT: s_lshr_b64 s[62:63], s[24:25], 24 +; GFX9-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 +; GFX9-NEXT: s_lshr_b64 s[58:59], s[20:21], 24 +; GFX9-NEXT: s_lshr_b64 s[56:57], s[18:19], 24 +; GFX9-NEXT: s_lshr_b64 s[46:47], s[16:17], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB73_4 ; GFX9-NEXT: .LBB73_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[11:12], s[4:5], 1.0 -; GFX9-NEXT: v_add_f64 v[1:2], s[6:7], 1.0 -; GFX9-NEXT: v_add_f64 v[3:4], s[8:9], 1.0 -; GFX9-NEXT: v_add_f64 v[5:6], s[10:11], 1.0 -; GFX9-NEXT: v_add_f64 v[7:8], s[12:13], 1.0 -; GFX9-NEXT: v_add_f64 v[9:10], s[14:15], 1.0 -; GFX9-NEXT: v_add_f64 v[13:14], s[40:41], 1.0 -; GFX9-NEXT: v_add_f64 v[17:18], s[42:43], 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12] -; GFX9-NEXT: v_add_f64 v[21:22], s[44:45], 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2] -; GFX9-NEXT: v_add_f64 v[23:24], s[28:29], 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_f64 v[1:2], s[4:5], 1.0 +; GFX9-NEXT: v_add_f64 v[3:4], s[6:7], 1.0 +; GFX9-NEXT: v_add_f64 v[5:6], s[8:9], 1.0 +; GFX9-NEXT: v_add_f64 v[7:8], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[11:12], s[12:13], 1.0 +; GFX9-NEXT: v_add_f64 v[17:18], s[14:15], 1.0 +; GFX9-NEXT: v_add_f64 v[23:24], s[40:41], 1.0 +; GFX9-NEXT: v_add_f64 v[29:30], s[42:43], 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] +; GFX9-NEXT: v_add_f64 v[9:10], s[44:45], 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] +; GFX9-NEXT: v_add_f64 v[13:14], s[28:29], 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] +; GFX9-NEXT: v_add_f64 v[15:16], s[26:27], 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] +; GFX9-NEXT: v_add_f64 v[19:20], s[24:25], 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] +; GFX9-NEXT: v_add_f64 v[21:22], s[22:23], 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4] -; GFX9-NEXT: v_add_f64 v[28:29], s[26:27], 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[5:6] -; GFX9-NEXT: v_add_f64 v[32:33], s[24:25], 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8] -; GFX9-NEXT: v_add_f64 v[34:35], s[22:23], 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10] -; GFX9-NEXT: v_add_f64 v[36:37], s[20:21], 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14] -; GFX9-NEXT: v_add_f64 v[38:39], s[18:19], 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[17:18] -; GFX9-NEXT: v_add_f64 v[48:49], s[16:17], 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[21:22] -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v11 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[23:24] -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v22 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[28:29] -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v24 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v29 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v28 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[36:37] -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v33 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[38:39] -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v35 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[48:49] -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v35 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v12 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v12 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v12 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v11 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v2 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v2 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v2 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v1 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v1 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v3 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v3 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v6 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v6 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v6 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v5 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v5 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v8 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v8 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v8 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v7 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v7 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v10 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v10 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v10 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v9 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v9 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v18 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v18 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v18 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v17 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v17 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v22 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v22 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v21 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v21 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v24 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v24 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v23 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v23 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v29 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v29 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v28 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v33 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v32 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v32 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v34 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v37 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v37 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v37 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v39 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v39 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v39 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v38 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v49 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v49 -; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v49 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v48 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v48 -; GFX9-NEXT: s_branch .LBB73_5 -; GFX9-NEXT: .LBB73_3: -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr80 -; GFX9-NEXT: ; implicit-def: $sgpr81 -; GFX9-NEXT: ; implicit-def: $sgpr70 -; GFX9-NEXT: ; implicit-def: $sgpr71 -; GFX9-NEXT: ; implicit-def: $sgpr68 -; GFX9-NEXT: ; implicit-def: $sgpr69 -; GFX9-NEXT: ; implicit-def: $sgpr66 -; GFX9-NEXT: ; implicit-def: $sgpr67 -; GFX9-NEXT: ; implicit-def: $sgpr64 -; GFX9-NEXT: ; implicit-def: $sgpr65 -; GFX9-NEXT: ; implicit-def: $sgpr54 -; GFX9-NEXT: ; implicit-def: $sgpr55 -; GFX9-NEXT: ; implicit-def: $sgpr52 -; GFX9-NEXT: ; implicit-def: $sgpr53 -; GFX9-NEXT: ; implicit-def: $sgpr50 -; GFX9-NEXT: ; implicit-def: $sgpr51 -; GFX9-NEXT: ; implicit-def: $sgpr48 -; GFX9-NEXT: ; implicit-def: $sgpr49 -; GFX9-NEXT: ; implicit-def: $sgpr38 -; GFX9-NEXT: ; implicit-def: $sgpr39 -; GFX9-NEXT: ; implicit-def: $sgpr98 -; GFX9-NEXT: ; implicit-def: $sgpr99 -; GFX9-NEXT: ; implicit-def: $sgpr96 -; GFX9-NEXT: ; implicit-def: $sgpr97 -; GFX9-NEXT: ; implicit-def: $sgpr86 -; GFX9-NEXT: ; implicit-def: $sgpr87 -; GFX9-NEXT: ; implicit-def: $sgpr84 -; GFX9-NEXT: ; implicit-def: $sgpr85 -; GFX9-NEXT: ; implicit-def: $sgpr82 -; GFX9-NEXT: ; implicit-def: $sgpr83 -; GFX9-NEXT: ; implicit-def: $sgpr36 -; GFX9-NEXT: ; implicit-def: $sgpr34 -; GFX9-NEXT: ; implicit-def: $sgpr30 -; GFX9-NEXT: ; implicit-def: $sgpr94 -; GFX9-NEXT: ; implicit-def: $sgpr92 -; GFX9-NEXT: ; implicit-def: $sgpr90 -; GFX9-NEXT: ; implicit-def: $sgpr88 -; GFX9-NEXT: ; implicit-def: $sgpr78 -; GFX9-NEXT: ; implicit-def: $sgpr76 -; GFX9-NEXT: ; implicit-def: $sgpr74 -; GFX9-NEXT: ; implicit-def: $sgpr72 -; GFX9-NEXT: ; implicit-def: $sgpr62 -; GFX9-NEXT: ; implicit-def: $sgpr60 -; GFX9-NEXT: ; implicit-def: $sgpr58 -; GFX9-NEXT: ; implicit-def: $sgpr56 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18] +; GFX9-NEXT: v_add_f64 v[25:26], s[20:21], 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] +; GFX9-NEXT: v_add_f64 v[27:28], s[18:19], 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30] +; GFX9-NEXT: v_add_f64 v[31:32], s[16:17], 1.0 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v14 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v14 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v16 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26] +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v16 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28] +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v16 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v20 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v2 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v1 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v1 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v3 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v3 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v22 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v22 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v22 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v26 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v31 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v31 +; GFX9-NEXT: s_branch .LBB73_5 +; GFX9-NEXT: .LBB73_3: +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr80 +; GFX9-NEXT: ; implicit-def: $sgpr81 ; GFX9-NEXT: ; implicit-def: $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr70 +; GFX9-NEXT: ; implicit-def: $sgpr71 +; GFX9-NEXT: ; implicit-def: $sgpr56 +; GFX9-NEXT: ; implicit-def: $sgpr68 +; GFX9-NEXT: ; implicit-def: $sgpr69 +; GFX9-NEXT: ; implicit-def: $sgpr58 +; GFX9-NEXT: ; implicit-def: $sgpr66 +; GFX9-NEXT: ; implicit-def: $sgpr67 +; GFX9-NEXT: ; implicit-def: $sgpr60 +; GFX9-NEXT: ; implicit-def: $sgpr64 +; GFX9-NEXT: ; implicit-def: $sgpr65 +; GFX9-NEXT: ; implicit-def: $sgpr62 +; GFX9-NEXT: ; implicit-def: $sgpr54 +; GFX9-NEXT: ; implicit-def: $sgpr55 +; GFX9-NEXT: ; implicit-def: $sgpr72 +; GFX9-NEXT: ; implicit-def: $sgpr52 +; GFX9-NEXT: ; implicit-def: $sgpr53 +; GFX9-NEXT: ; implicit-def: $sgpr74 +; GFX9-NEXT: ; implicit-def: $sgpr50 +; GFX9-NEXT: ; implicit-def: $sgpr51 +; GFX9-NEXT: ; implicit-def: $sgpr76 +; GFX9-NEXT: ; implicit-def: $sgpr48 +; GFX9-NEXT: ; implicit-def: $sgpr49 +; GFX9-NEXT: ; implicit-def: $sgpr78 +; GFX9-NEXT: ; implicit-def: $sgpr38 +; GFX9-NEXT: ; implicit-def: $sgpr39 +; GFX9-NEXT: ; implicit-def: $sgpr88 +; GFX9-NEXT: ; implicit-def: $sgpr98 +; GFX9-NEXT: ; implicit-def: $sgpr99 +; GFX9-NEXT: ; implicit-def: $sgpr90 +; GFX9-NEXT: ; implicit-def: $sgpr96 +; GFX9-NEXT: ; implicit-def: $sgpr97 +; GFX9-NEXT: ; implicit-def: $sgpr92 +; GFX9-NEXT: ; implicit-def: $sgpr86 +; GFX9-NEXT: ; implicit-def: $sgpr87 +; GFX9-NEXT: ; implicit-def: $sgpr94 +; GFX9-NEXT: ; implicit-def: $sgpr84 +; GFX9-NEXT: ; implicit-def: $sgpr85 +; GFX9-NEXT: ; implicit-def: $sgpr30 +; GFX9-NEXT: ; implicit-def: $sgpr82 +; GFX9-NEXT: ; implicit-def: $sgpr83 +; GFX9-NEXT: ; implicit-def: $sgpr34 +; GFX9-NEXT: ; implicit-def: $sgpr36 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 +; GFX9-NEXT: ; implicit-def: $sgpr47 +; GFX9-NEXT: ; kill: killed $sgpr47 ; GFX9-NEXT: s_branch .LBB73_2 ; GFX9-NEXT: .LBB73_4: -; GFX9-NEXT: v_mov_b32_e32 v15, s66 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s65 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s64 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s54 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s53 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s52 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s51 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s50 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s49 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s48 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s39 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s38 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s99 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s98 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s97 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s96 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s87 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s86 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s85 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s84 -; GFX9-NEXT: v_mov_b32_e32 v11, s4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s83 +; GFX9-NEXT: v_mov_b32_e32 v34, s69 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s68 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s67 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s66 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s65 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s64 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s55 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s54 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s53 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s52 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s51 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s50 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s49 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s48 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s39 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s38 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s99 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s98 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s97 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s96 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s87 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s86 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s85 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s84 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s83 +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s82 ; GFX9-NEXT: v_readlane_b32 s4, v62, 0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s82 -; GFX9-NEXT: v_mov_b32_e32 v51, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 1 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s46 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s56 ; GFX9-NEXT: v_readlane_b32 s4, v62, 2 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v31, s16 +; GFX9-NEXT: v_mov_b32_e32 v27, s18 +; GFX9-NEXT: v_mov_b32_e32 v25, s20 +; GFX9-NEXT: v_mov_b32_e32 v21, s22 +; GFX9-NEXT: v_mov_b32_e32 v19, s24 +; GFX9-NEXT: v_mov_b32_e32 v15, s26 +; GFX9-NEXT: v_mov_b32_e32 v13, s28 +; GFX9-NEXT: v_mov_b32_e32 v9, s44 +; GFX9-NEXT: v_mov_b32_e32 v29, s42 +; GFX9-NEXT: v_mov_b32_e32 v23, s40 +; GFX9-NEXT: v_mov_b32_e32 v17, s14 +; GFX9-NEXT: v_mov_b32_e32 v11, s12 +; GFX9-NEXT: v_mov_b32_e32 v7, s10 +; GFX9-NEXT: v_mov_b32_e32 v5, s8 +; GFX9-NEXT: v_mov_b32_e32 v3, s6 +; GFX9-NEXT: v_mov_b32_e32 v2, s5 +; GFX9-NEXT: v_mov_b32_e32 v4, s7 +; GFX9-NEXT: v_mov_b32_e32 v6, s9 +; GFX9-NEXT: v_mov_b32_e32 v8, s11 +; GFX9-NEXT: v_mov_b32_e32 v12, s13 +; GFX9-NEXT: v_mov_b32_e32 v18, s15 +; GFX9-NEXT: v_mov_b32_e32 v24, s41 +; GFX9-NEXT: v_mov_b32_e32 v30, s43 +; GFX9-NEXT: v_mov_b32_e32 v10, s45 +; GFX9-NEXT: v_mov_b32_e32 v14, s29 +; GFX9-NEXT: v_mov_b32_e32 v16, s27 +; GFX9-NEXT: v_mov_b32_e32 v20, s25 +; GFX9-NEXT: v_mov_b32_e32 v22, s23 +; GFX9-NEXT: v_mov_b32_e32 v26, s21 +; GFX9-NEXT: v_mov_b32_e32 v28, s19 +; GFX9-NEXT: v_mov_b32_e32 v32, s17 +; GFX9-NEXT: v_mov_b32_e32 v33, s81 +; GFX9-NEXT: v_mov_b32_e32 v54, s80 +; GFX9-NEXT: v_mov_b32_e32 v38, s71 +; GFX9-NEXT: v_mov_b32_e32 v61, s70 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s58 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s60 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s62 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s72 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s74 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s76 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s78 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s88 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s90 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s92 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s94 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s30 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s34 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s36 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 3 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 5 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 6 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 7 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 8 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 9 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 10 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 11 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 12 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 15 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 16 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 17 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 18 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 19 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 20 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 21 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 22 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 23 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 24 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 25 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 26 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 27 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v60, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 28 -; GFX9-NEXT: v_mov_b32_e32 v55, s4 +; GFX9-NEXT: v_mov_b32_e32 v53, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 29 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 30 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 31 -; GFX9-NEXT: v_mov_b32_e32 v58, s4 -; GFX9-NEXT: v_mov_b32_e32 v57, s34 -; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v57, s30 -; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v57, s94 -; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v57, s92 -; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v52, s36 -; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v57, s90 -; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v57, v51 -; GFX9-NEXT: v_mov_b32_e32 v51, s88 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s78 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s76 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s74 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s72 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s62 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s60 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s58 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s56 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v55, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 32 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v42, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 33 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v35, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 34 -; GFX9-NEXT: v_mov_b32_e32 v50, s4 +; GFX9-NEXT: v_mov_b32_e32 v39, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 35 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v49, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 36 -; GFX9-NEXT: v_mov_b32_e32 v31, s4 +; GFX9-NEXT: v_mov_b32_e32 v43, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 37 -; GFX9-NEXT: v_mov_b32_e32 v16, s4 +; GFX9-NEXT: v_mov_b32_e32 v40, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 38 -; GFX9-NEXT: v_mov_b32_e32 v54, s4 +; GFX9-NEXT: v_mov_b32_e32 v44, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 39 -; GFX9-NEXT: v_mov_b32_e32 v47, s4 +; GFX9-NEXT: v_mov_b32_e32 v45, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 40 -; GFX9-NEXT: v_mov_b32_e32 v30, s4 +; GFX9-NEXT: v_mov_b32_e32 v50, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 41 -; GFX9-NEXT: v_mov_b32_e32 v25, s4 +; GFX9-NEXT: v_mov_b32_e32 v36, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 42 -; GFX9-NEXT: v_mov_b32_e32 v41, s4 +; GFX9-NEXT: v_mov_b32_e32 v46, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 43 -; GFX9-NEXT: v_mov_b32_e32 v44, s4 +; GFX9-NEXT: v_mov_b32_e32 v41, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 44 -; GFX9-NEXT: v_mov_b32_e32 v42, s4 +; GFX9-NEXT: v_mov_b32_e32 v47, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 45 -; GFX9-NEXT: v_mov_b32_e32 v26, s4 +; GFX9-NEXT: v_mov_b32_e32 v56, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 46 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v37, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 47 -; GFX9-NEXT: v_mov_b32_e32 v61, s4 +; GFX9-NEXT: v_mov_b32_e32 v51, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 48 -; GFX9-NEXT: v_mov_b32_e32 v51, s46 -; GFX9-NEXT: v_mov_b32_e32 v43, s4 +; GFX9-NEXT: v_mov_b32_e32 v57, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 49 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v12, s5 -; GFX9-NEXT: v_mov_b32_e32 v1, s6 -; GFX9-NEXT: v_mov_b32_e32 v2, s7 -; GFX9-NEXT: v_mov_b32_e32 v3, s8 -; GFX9-NEXT: v_mov_b32_e32 v4, s9 -; GFX9-NEXT: v_mov_b32_e32 v5, s10 -; GFX9-NEXT: v_mov_b32_e32 v6, s11 -; GFX9-NEXT: v_mov_b32_e32 v7, s12 -; GFX9-NEXT: v_mov_b32_e32 v8, s13 -; GFX9-NEXT: v_mov_b32_e32 v9, s14 -; GFX9-NEXT: v_mov_b32_e32 v10, s15 -; GFX9-NEXT: v_mov_b32_e32 v13, s40 -; GFX9-NEXT: v_mov_b32_e32 v14, s41 -; GFX9-NEXT: v_mov_b32_e32 v17, s42 -; GFX9-NEXT: v_mov_b32_e32 v18, s43 -; GFX9-NEXT: v_mov_b32_e32 v21, s44 -; GFX9-NEXT: v_mov_b32_e32 v22, s45 -; GFX9-NEXT: v_mov_b32_e32 v23, s28 -; GFX9-NEXT: v_mov_b32_e32 v24, s29 -; GFX9-NEXT: v_mov_b32_e32 v28, s26 -; GFX9-NEXT: v_mov_b32_e32 v29, s27 -; GFX9-NEXT: v_mov_b32_e32 v32, s24 -; GFX9-NEXT: v_mov_b32_e32 v33, s25 -; GFX9-NEXT: v_mov_b32_e32 v34, s22 -; GFX9-NEXT: v_mov_b32_e32 v35, s23 -; GFX9-NEXT: v_mov_b32_e32 v36, s20 -; GFX9-NEXT: v_mov_b32_e32 v37, s21 -; GFX9-NEXT: v_mov_b32_e32 v38, s18 -; GFX9-NEXT: v_mov_b32_e32 v39, s19 -; GFX9-NEXT: v_mov_b32_e32 v48, s16 -; GFX9-NEXT: v_mov_b32_e32 v49, s17 -; GFX9-NEXT: v_mov_b32_e32 v59, s81 -; GFX9-NEXT: v_mov_b32_e32 v60, s80 -; GFX9-NEXT: v_mov_b32_e32 v56, s71 -; GFX9-NEXT: v_mov_b32_e32 v40, s70 -; GFX9-NEXT: v_mov_b32_e32 v46, s69 -; GFX9-NEXT: v_mov_b32_e32 v19, s68 -; GFX9-NEXT: v_mov_b32_e32 v27, s67 -; GFX9-NEXT: v_mov_b32_e32 v20, s4 -; GFX9-NEXT: v_mov_b32_e32 v51, s55 +; GFX9-NEXT: v_mov_b32_e32 v52, s4 ; GFX9-NEXT: .LBB73_5: ; %end +; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v39, v39, v15, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v49, v49, v20, s4 -; GFX9-NEXT: v_perm_b32 v36, v36, v19, s4 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v30, v35, v30, s4 -; GFX9-NEXT: v_perm_b32 v16, v33, v16, s4 -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v48, v48, v60, s4 -; GFX9-NEXT: v_perm_b32 v25, v41, v25, s4 -; GFX9-NEXT: v_perm_b32 v37, v37, v44, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; GFX9-NEXT: v_or_b32_e32 v25, v37, v25 -; GFX9-NEXT: v_perm_b32 v26, v26, v42, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; GFX9-NEXT: v_perm_b32 v38, v38, v40, s4 -; GFX9-NEXT: v_or_b32_e32 v26, v39, v26 -; GFX9-NEXT: v_perm_b32 v24, v24, v58, s4 -; GFX9-NEXT: v_perm_b32 v22, v22, v55, s4 +; GFX9-NEXT: v_perm_b32 v31, v31, v54, s4 +; GFX9-NEXT: v_perm_b32 v27, v27, v61, s4 ; GFX9-NEXT: v_readlane_b32 s30, v63, 34 ; GFX9-NEXT: v_readlane_b32 s31, v63, 35 ; GFX9-NEXT: v_readlane_b32 s99, v63, 33 @@ -113172,212 +113319,244 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; GFX9-NEXT: v_readlane_b32 s36, v63, 2 ; GFX9-NEXT: v_readlane_b32 s35, v63, 1 ; GFX9-NEXT: v_readlane_b32 s34, v63, 0 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v34, v34, v15, s4 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v27, v27, v19, s4 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v45, v59, v52, s4 -; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v35, v15, v19, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v56, v56, v59, s4 -; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v19, v51, v19, s4 -; GFX9-NEXT: v_perm_b32 v32, v32, v15, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v40, v46, v59, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v20, v28, v15, s4 -; GFX9-NEXT: v_perm_b32 v28, v29, v50, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v29, v15, v50, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v23, v23, v15, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v33, v15, v50, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v21, v21, v15, s4 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v33, v33, v58, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; GFX9-NEXT: v_or_b32_e32 v31, v31, v33 +; GFX9-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen +; GFX9-NEXT: v_perm_b32 v31, v32, v52, s4 +; GFX9-NEXT: v_perm_b32 v32, v57, v51, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; GFX9-NEXT: v_or_b32_e32 v31, v31, v32 +; GFX9-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:4 +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v31, v38, v31, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX9-NEXT: v_or_b32_e32 v27, v27, v31 +; GFX9-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:8 +; GFX9-NEXT: v_perm_b32 v27, v28, v37, s4 +; GFX9-NEXT: v_perm_b32 v28, v56, v47, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX9-NEXT: v_or_b32_e32 v27, v27, v28 +; GFX9-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:12 +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v50, v15, v50, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v25, v25, v27, s4 +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v17, v17, v15, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v27, v28, v27, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX9-NEXT: v_or_b32_e32 v25, v25, v27 +; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:16 +; GFX9-NEXT: v_perm_b32 v25, v26, v41, s4 +; GFX9-NEXT: v_perm_b32 v26, v46, v36, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX9-NEXT: v_or_b32_e32 v25, v25, v26 +; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:20 +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v18, v18, v15, s4 -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v21, v25, s4 +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v15, v15, v51, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v51, 16, v45 -; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v27 -; GFX9-NEXT: v_or_b32_e32 v48, v48, v51 -; GFX9-NEXT: v_or_b32_e32 v25, v34, v25 -; GFX9-NEXT: buffer_store_dword v48, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v48, v43, v61, s4 -; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_perm_b32 v25, v47, v54, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v48 +; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; GFX9-NEXT: v_or_b32_e32 v48, v49, v48 -; GFX9-NEXT: v_or_b32_e32 v25, v30, v25 -; GFX9-NEXT: buffer_store_dword v48, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v56 -; GFX9-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v40 -; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v35 -; GFX9-NEXT: v_or_b32_e32 v38, v38, v48 -; GFX9-NEXT: v_or_b32_e32 v26, v36, v26 -; GFX9-NEXT: v_or_b32_e32 v25, v32, v25 -; GFX9-NEXT: buffer_store_dword v38, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX9-NEXT: v_or_b32_e32 v21, v21, v25 +; GFX9-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:24 +; GFX9-NEXT: v_perm_b32 v21, v22, v50, s4 +; GFX9-NEXT: v_perm_b32 v22, v45, v44, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX9-NEXT: v_or_b32_e32 v21, v21, v22 +; GFX9-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:28 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v25, v31, v25, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; GFX9-NEXT: v_or_b32_e32 v16, v16, v25 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v19 -; GFX9-NEXT: v_or_b32_e32 v16, v20, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v19, v19, v21, s4 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v28, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v29 -; GFX9-NEXT: v_or_b32_e32 v16, v23, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v22, v21, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX9-NEXT: v_or_b32_e32 v19, v19, v21 +; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:32 +; GFX9-NEXT: v_perm_b32 v19, v20, v40, s4 +; GFX9-NEXT: v_perm_b32 v20, v43, v49, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX9-NEXT: v_or_b32_e32 v19, v19, v20 +; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:36 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v24, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v33 -; GFX9-NEXT: v_or_b32_e32 v16, v21, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v15, v15, v19, s4 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4 +; GFX9-NEXT: v_perm_b32 v19, v20, v19, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX9-NEXT: v_or_b32_e32 v15, v15, v19 +; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:40 +; GFX9-NEXT: v_perm_b32 v15, v16, v39, s4 +; GFX9-NEXT: v_perm_b32 v16, v35, v42, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v22, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v50 -; GFX9-NEXT: v_or_b32_e32 v16, v17, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_e32 v15, v15, v16 +; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:44 +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v17, v16, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v18, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v13, v13, v15, s4 +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v13, v16, s4 +; GFX9-NEXT: v_perm_b32 v15, v16, v15, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v15 -; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v14, v15, v14, s4 +; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:48 +; GFX9-NEXT: v_perm_b32 v13, v14, v55, s4 +; GFX9-NEXT: v_perm_b32 v14, v34, v48, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 -; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:52 +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v9, v9, v13, s4 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v13 -; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:56 +; GFX9-NEXT: v_perm_b32 v9, v10, v53, s4 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4 -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v10, v60, v10, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 +; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:60 +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v10, v13, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v9, v29, v9, s4 +; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 +; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:64 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v13, v10, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v9, v30, v9, s4 +; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 +; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:68 +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v10, v13, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v9, v23, v9, s4 +; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 +; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:72 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v13, v10, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v9, v24, v9, s4 +; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 +; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:76 +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v10, v13, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v9, v17, v9, s4 +; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 +; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:80 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v10, v13, v10, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v9, v18, v9, s4 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v9, v11, v9, s4 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v11, v10, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 +; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:88 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v11, v10, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v9, v12, v9, s4 +; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 +; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:92 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v7, v9, s4 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v9 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:96 +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v8, v9, v8, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:100 +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v5, v7, s4 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v7, v7, v8, s4 +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v7 -; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:104 +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4 ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload @@ -113386,67 +113565,47 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 -; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:108 +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v3, v5, s4 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v5, v5, v6, s4 +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:104 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v4, v5, v4, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:116 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v3, v3, v4, s4 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v3 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v57, v2, s4 -; GFX9-NEXT: v_perm_b32 v1, v11, v1, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v12, v1, s4 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 ; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload @@ -113464,8 +113623,8 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -113475,371 +113634,369 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_or_saveexec_b32 s4, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-NEXT: scratch_store_b32 off, v73, s32 offset:68 ; GFX11-NEXT: scratch_store_b32 off, v74, s32 offset:72 ; GFX11-NEXT: scratch_store_b32 off, v75, s32 offset:76 ; GFX11-NEXT: scratch_store_b32 off, v76, s32 offset:80 -; GFX11-NEXT: scratch_store_b32 off, v77, s32 offset:84 ; GFX11-NEXT: s_mov_b32 exec_lo, s4 -; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Spill -; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:68 -; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:64 +; GFX11-NEXT: s_clause 0x10 ; 68-byte Folded Spill +; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:64 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:60 +; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:60 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:56 +; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:56 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:52 +; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:52 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:48 +; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:48 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:44 +; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:44 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:40 +; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:40 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:36 +; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:36 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:32 +; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:32 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:28 +; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:28 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:24 +; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:24 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:20 +; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:20 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:16 +; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:16 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:12 +; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:12 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:8 +; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:8 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v72, s32 offset:4 +; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:4 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v73, s32 -; GFX11-NEXT: v_writelane_b32 v74, s34, 0 -; GFX11-NEXT: v_writelane_b32 v74, s35, 1 -; GFX11-NEXT: v_writelane_b32 v74, s36, 2 -; GFX11-NEXT: v_writelane_b32 v74, s37, 3 -; GFX11-NEXT: v_writelane_b32 v74, s38, 4 -; GFX11-NEXT: v_writelane_b32 v74, s39, 5 -; GFX11-NEXT: v_writelane_b32 v74, s48, 6 -; GFX11-NEXT: v_writelane_b32 v74, s49, 7 -; GFX11-NEXT: v_writelane_b32 v74, s50, 8 -; GFX11-NEXT: v_writelane_b32 v74, s51, 9 -; GFX11-NEXT: v_writelane_b32 v74, s52, 10 -; GFX11-NEXT: v_writelane_b32 v74, s53, 11 -; GFX11-NEXT: v_writelane_b32 v74, s54, 12 -; GFX11-NEXT: v_writelane_b32 v74, s55, 13 -; GFX11-NEXT: v_writelane_b32 v74, s64, 14 -; GFX11-NEXT: v_writelane_b32 v74, s65, 15 -; GFX11-NEXT: v_writelane_b32 v74, s66, 16 -; GFX11-NEXT: v_writelane_b32 v74, s67, 17 -; GFX11-NEXT: v_writelane_b32 v74, s68, 18 -; GFX11-NEXT: v_writelane_b32 v74, s69, 19 -; GFX11-NEXT: v_writelane_b32 v74, s70, 20 -; GFX11-NEXT: v_writelane_b32 v74, s71, 21 -; GFX11-NEXT: v_writelane_b32 v74, s80, 22 -; GFX11-NEXT: v_writelane_b32 v74, s81, 23 -; GFX11-NEXT: v_writelane_b32 v74, s82, 24 -; GFX11-NEXT: v_writelane_b32 v74, s83, 25 -; GFX11-NEXT: v_writelane_b32 v74, s84, 26 -; GFX11-NEXT: v_writelane_b32 v74, s85, 27 -; GFX11-NEXT: v_writelane_b32 v74, s86, 28 -; GFX11-NEXT: v_writelane_b32 v74, s87, 29 -; GFX11-NEXT: v_writelane_b32 v74, s96, 30 -; GFX11-NEXT: v_writelane_b32 v74, s97, 31 -; GFX11-NEXT: v_writelane_b32 v75, s98, 0 -; GFX11-NEXT: v_writelane_b32 v75, s99, 1 -; GFX11-NEXT: v_writelane_b32 v75, s100, 2 -; GFX11-NEXT: v_writelane_b32 v75, s101, 3 -; GFX11-NEXT: v_writelane_b32 v75, s102, 4 -; GFX11-NEXT: v_writelane_b32 v75, s103, 5 -; GFX11-NEXT: v_writelane_b32 v75, s104, 6 -; GFX11-NEXT: v_writelane_b32 v75, s30, 7 -; GFX11-NEXT: v_writelane_b32 v75, s31, 8 +; GFX11-NEXT: scratch_store_b32 off, v72, s32 +; GFX11-NEXT: v_writelane_b32 v73, s34, 0 +; GFX11-NEXT: v_writelane_b32 v73, s35, 1 +; GFX11-NEXT: v_writelane_b32 v73, s36, 2 +; GFX11-NEXT: v_writelane_b32 v73, s37, 3 +; GFX11-NEXT: v_writelane_b32 v73, s38, 4 +; GFX11-NEXT: v_writelane_b32 v73, s39, 5 +; GFX11-NEXT: v_writelane_b32 v73, s48, 6 +; GFX11-NEXT: v_writelane_b32 v73, s49, 7 +; GFX11-NEXT: v_writelane_b32 v73, s50, 8 +; GFX11-NEXT: v_writelane_b32 v73, s51, 9 +; GFX11-NEXT: v_writelane_b32 v73, s52, 10 +; GFX11-NEXT: v_writelane_b32 v73, s53, 11 +; GFX11-NEXT: v_writelane_b32 v73, s54, 12 +; GFX11-NEXT: v_writelane_b32 v73, s55, 13 +; GFX11-NEXT: v_writelane_b32 v73, s64, 14 +; GFX11-NEXT: v_writelane_b32 v73, s65, 15 +; GFX11-NEXT: v_writelane_b32 v73, s66, 16 +; GFX11-NEXT: v_writelane_b32 v73, s67, 17 +; GFX11-NEXT: v_writelane_b32 v73, s68, 18 +; GFX11-NEXT: v_writelane_b32 v73, s69, 19 +; GFX11-NEXT: v_writelane_b32 v73, s70, 20 +; GFX11-NEXT: v_writelane_b32 v73, s71, 21 +; GFX11-NEXT: v_writelane_b32 v73, s80, 22 +; GFX11-NEXT: v_writelane_b32 v73, s81, 23 +; GFX11-NEXT: v_writelane_b32 v73, s82, 24 +; GFX11-NEXT: v_writelane_b32 v73, s83, 25 +; GFX11-NEXT: v_writelane_b32 v73, s84, 26 +; GFX11-NEXT: v_writelane_b32 v73, s85, 27 +; GFX11-NEXT: v_writelane_b32 v73, s86, 28 +; GFX11-NEXT: v_writelane_b32 v73, s87, 29 +; GFX11-NEXT: v_writelane_b32 v73, s96, 30 +; GFX11-NEXT: v_writelane_b32 v73, s97, 31 +; GFX11-NEXT: v_writelane_b32 v74, s98, 0 +; GFX11-NEXT: v_writelane_b32 v74, s99, 1 +; GFX11-NEXT: v_writelane_b32 v74, s100, 2 +; GFX11-NEXT: v_writelane_b32 v74, s101, 3 +; GFX11-NEXT: v_writelane_b32 v74, s102, 4 +; GFX11-NEXT: v_writelane_b32 v74, s103, 5 +; GFX11-NEXT: v_writelane_b32 v74, s104, 6 +; GFX11-NEXT: v_writelane_b32 v74, s30, 7 +; GFX11-NEXT: v_writelane_b32 v74, s31, 8 ; GFX11-NEXT: v_readfirstlane_b32 s42, v15 -; GFX11-NEXT: v_readfirstlane_b32 s41, v14 -; GFX11-NEXT: v_readfirstlane_b32 s40, v13 -; GFX11-NEXT: v_readfirstlane_b32 s15, v12 -; GFX11-NEXT: v_readfirstlane_b32 s14, v11 -; GFX11-NEXT: v_readfirstlane_b32 s11, v10 -; GFX11-NEXT: v_readfirstlane_b32 s10, v9 -; GFX11-NEXT: v_readfirstlane_b32 s9, v8 -; GFX11-NEXT: v_readfirstlane_b32 s8, v7 -; GFX11-NEXT: v_readfirstlane_b32 s7, v6 -; GFX11-NEXT: v_readfirstlane_b32 s6, v5 -; GFX11-NEXT: v_readfirstlane_b32 s5, v4 -; GFX11-NEXT: v_readfirstlane_b32 s4, v3 -; GFX11-NEXT: v_readfirstlane_b32 s13, v2 -; GFX11-NEXT: v_readfirstlane_b32 s12, v1 +; GFX11-NEXT: v_readfirstlane_b32 s5, v14 +; GFX11-NEXT: v_readfirstlane_b32 s4, v13 +; GFX11-NEXT: v_readfirstlane_b32 s7, v12 +; GFX11-NEXT: v_readfirstlane_b32 s6, v11 +; GFX11-NEXT: v_readfirstlane_b32 s9, v10 +; GFX11-NEXT: v_readfirstlane_b32 s8, v9 +; GFX11-NEXT: v_readfirstlane_b32 s11, v8 +; GFX11-NEXT: v_readfirstlane_b32 s10, v7 +; GFX11-NEXT: v_readfirstlane_b32 s13, v6 +; GFX11-NEXT: v_readfirstlane_b32 s12, v5 +; GFX11-NEXT: v_readfirstlane_b32 s15, v4 +; GFX11-NEXT: v_readfirstlane_b32 s14, v3 +; GFX11-NEXT: v_readfirstlane_b32 s41, v2 +; GFX11-NEXT: v_readfirstlane_b32 s40, v1 ; GFX11-NEXT: s_cmp_lg_u32 s42, 0 ; GFX11-NEXT: s_mov_b32 vcc_lo, 0 +; GFX11-NEXT: ; implicit-def: $vgpr75 : SGPR spill to VGPR lane ; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane -; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane ; GFX11-NEXT: s_cbranch_scc0 .LBB73_3 ; GFX11-NEXT: ; %bb.1: ; %cmp.false -; GFX11-NEXT: s_lshr_b32 s42, s11, 16 -; GFX11-NEXT: s_lshr_b32 s48, s41, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 0 -; GFX11-NEXT: s_lshr_b32 s42, s9, 24 -; GFX11-NEXT: s_lshr_b32 s39, s41, 16 -; GFX11-NEXT: s_lshr_b32 s38, s41, 8 -; GFX11-NEXT: s_lshr_b32 s50, s40, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 1 ; GFX11-NEXT: s_lshr_b32 s42, s9, 16 -; GFX11-NEXT: s_lshr_b32 s49, s40, 8 -; GFX11-NEXT: s_lshr_b32 s37, s15, 24 -; GFX11-NEXT: s_lshr_b32 s36, s15, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 2 -; GFX11-NEXT: s_lshr_b32 s42, s9, 8 -; GFX11-NEXT: s_lshr_b32 s35, s15, 8 -; GFX11-NEXT: s_lshr_b32 s52, s14, 16 -; GFX11-NEXT: s_lshr_b32 s51, s14, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 3 -; GFX11-NEXT: s_lshr_b32 s42, s7, 24 -; GFX11-NEXT: s_lshr_b32 s34, s11, 24 -; GFX11-NEXT: s_lshr_b32 s104, s11, 8 -; GFX11-NEXT: s_lshr_b32 s54, s10, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 4 -; GFX11-NEXT: s_lshr_b32 s42, s7, 16 -; GFX11-NEXT: s_lshr_b32 s53, s10, 8 -; GFX11-NEXT: s_lshr_b32 s64, s8, 16 -; GFX11-NEXT: s_lshr_b32 s55, s8, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 5 -; GFX11-NEXT: s_lshr_b32 s42, s7, 8 -; GFX11-NEXT: s_lshr_b32 s66, s6, 16 -; GFX11-NEXT: s_lshr_b32 s65, s6, 8 -; GFX11-NEXT: s_lshr_b32 s68, s4, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 6 -; GFX11-NEXT: s_lshr_b32 s42, s5, 24 -; GFX11-NEXT: s_lshr_b32 s67, s4, 8 -; GFX11-NEXT: s_lshr_b32 s70, s12, 16 -; GFX11-NEXT: s_lshr_b32 s69, s12, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 7 -; GFX11-NEXT: s_lshr_b32 s42, s5, 16 +; GFX11-NEXT: s_lshr_b32 s48, s5, 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 0 +; GFX11-NEXT: s_lshr_b32 s42, s11, 24 +; GFX11-NEXT: s_lshr_b32 s39, s5, 16 +; GFX11-NEXT: s_lshr_b32 s38, s5, 8 +; GFX11-NEXT: s_lshr_b32 s50, s4, 16 +; GFX11-NEXT: v_writelane_b32 v75, s42, 1 +; GFX11-NEXT: s_lshr_b32 s42, s11, 16 +; GFX11-NEXT: s_lshr_b32 s49, s4, 8 +; GFX11-NEXT: s_lshr_b32 s37, s7, 24 +; GFX11-NEXT: s_lshr_b32 s36, s7, 16 +; GFX11-NEXT: v_writelane_b32 v75, s42, 2 +; GFX11-NEXT: s_lshr_b32 s42, s11, 8 +; GFX11-NEXT: s_lshr_b32 s35, s7, 8 +; GFX11-NEXT: s_lshr_b32 s52, s6, 16 +; GFX11-NEXT: s_lshr_b32 s51, s6, 8 +; GFX11-NEXT: v_writelane_b32 v75, s42, 3 +; GFX11-NEXT: s_lshr_b32 s42, s13, 24 +; GFX11-NEXT: s_lshr_b32 s34, s9, 24 +; GFX11-NEXT: s_lshr_b32 s104, s9, 8 +; GFX11-NEXT: s_lshr_b32 s54, s8, 16 +; GFX11-NEXT: v_writelane_b32 v75, s42, 4 +; GFX11-NEXT: s_lshr_b32 s42, s13, 16 +; GFX11-NEXT: s_lshr_b32 s53, s8, 8 +; GFX11-NEXT: s_lshr_b32 s64, s10, 16 +; GFX11-NEXT: s_lshr_b32 s55, s10, 8 +; GFX11-NEXT: v_writelane_b32 v75, s42, 5 +; GFX11-NEXT: s_lshr_b32 s42, s13, 8 +; GFX11-NEXT: s_lshr_b32 s66, s12, 16 +; GFX11-NEXT: s_lshr_b32 s65, s12, 8 +; GFX11-NEXT: s_lshr_b32 s68, s14, 16 +; GFX11-NEXT: v_writelane_b32 v75, s42, 6 +; GFX11-NEXT: s_lshr_b32 s42, s15, 24 +; GFX11-NEXT: s_lshr_b32 s67, s14, 8 +; GFX11-NEXT: s_lshr_b32 s70, s40, 16 +; GFX11-NEXT: s_lshr_b32 s69, s40, 8 +; GFX11-NEXT: v_writelane_b32 v75, s42, 7 +; GFX11-NEXT: s_lshr_b32 s42, s15, 16 ; GFX11-NEXT: s_lshr_b32 s80, s28, 16 ; GFX11-NEXT: s_lshr_b32 s71, s28, 8 ; GFX11-NEXT: s_lshr_b32 s82, s26, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 8 -; GFX11-NEXT: s_lshr_b32 s42, s5, 8 +; GFX11-NEXT: v_writelane_b32 v75, s42, 8 +; GFX11-NEXT: s_lshr_b32 s42, s15, 8 ; GFX11-NEXT: s_lshr_b32 s81, s26, 8 ; GFX11-NEXT: s_lshr_b32 s84, s24, 16 ; GFX11-NEXT: s_lshr_b32 s83, s24, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 9 -; GFX11-NEXT: s_lshr_b32 s42, s13, 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 9 +; GFX11-NEXT: s_lshr_b32 s42, s41, 24 ; GFX11-NEXT: s_lshr_b32 s86, s22, 16 ; GFX11-NEXT: s_lshr_b32 s85, s22, 8 ; GFX11-NEXT: s_lshr_b32 s96, s20, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 10 -; GFX11-NEXT: s_lshr_b32 s42, s13, 16 +; GFX11-NEXT: v_writelane_b32 v75, s42, 10 +; GFX11-NEXT: s_lshr_b32 s42, s41, 16 ; GFX11-NEXT: s_lshr_b32 s87, s20, 8 ; GFX11-NEXT: s_lshr_b32 s98, s18, 16 ; GFX11-NEXT: s_lshr_b32 s97, s18, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 11 -; GFX11-NEXT: s_lshr_b32 s42, s13, 8 +; GFX11-NEXT: v_writelane_b32 v75, s42, 11 +; GFX11-NEXT: s_lshr_b32 s42, s41, 8 ; GFX11-NEXT: s_lshr_b32 s100, s16, 16 ; GFX11-NEXT: s_lshr_b32 s99, s16, 8 ; GFX11-NEXT: s_lshr_b32 s102, s2, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 12 +; GFX11-NEXT: v_writelane_b32 v75, s42, 12 ; GFX11-NEXT: s_lshr_b32 s42, s29, 24 ; GFX11-NEXT: s_lshr_b32 s101, s2, 8 ; GFX11-NEXT: s_lshr_b32 vcc_hi, s0, 16 ; GFX11-NEXT: s_lshr_b32 s103, s0, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 13 +; GFX11-NEXT: v_writelane_b32 v75, s42, 13 ; GFX11-NEXT: s_lshr_b32 s42, s29, 16 -; GFX11-NEXT: s_lshr_b64 s[72:73], s[40:41], 24 -; GFX11-NEXT: s_lshr_b64 s[74:75], s[14:15], 24 -; GFX11-NEXT: s_lshr_b64 s[76:77], s[10:11], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 14 +; GFX11-NEXT: s_lshr_b64 s[30:31], s[4:5], 24 +; GFX11-NEXT: s_lshr_b64 s[94:95], s[6:7], 24 +; GFX11-NEXT: s_lshr_b64 s[92:93], s[8:9], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 14 ; GFX11-NEXT: s_lshr_b32 s42, s29, 8 -; GFX11-NEXT: s_lshr_b64 s[78:79], s[8:9], 24 -; GFX11-NEXT: s_lshr_b64 s[88:89], s[6:7], 24 -; GFX11-NEXT: s_lshr_b64 s[90:91], s[4:5], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 15 +; GFX11-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 +; GFX11-NEXT: s_lshr_b64 s[88:89], s[12:13], 24 +; GFX11-NEXT: s_lshr_b64 s[78:79], s[14:15], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 15 ; GFX11-NEXT: s_lshr_b32 s42, s27, 24 -; GFX11-NEXT: s_lshr_b64 s[92:93], s[12:13], 24 -; GFX11-NEXT: s_lshr_b64 s[94:95], s[28:29], 24 -; GFX11-NEXT: s_lshr_b64 s[30:31], s[26:27], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 16 +; GFX11-NEXT: s_lshr_b64 s[76:77], s[40:41], 24 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX11-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 16 ; GFX11-NEXT: s_lshr_b32 s42, s27, 16 ; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24 ; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 ; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 17 +; GFX11-NEXT: v_writelane_b32 v75, s42, 17 ; GFX11-NEXT: s_lshr_b32 s42, s27, 8 ; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24 ; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24 ; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 18 +; GFX11-NEXT: v_writelane_b32 v75, s42, 18 ; GFX11-NEXT: s_lshr_b32 s42, s25, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 19 +; GFX11-NEXT: v_writelane_b32 v75, s42, 19 ; GFX11-NEXT: s_lshr_b32 s42, s25, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 20 +; GFX11-NEXT: v_writelane_b32 v75, s42, 20 ; GFX11-NEXT: s_lshr_b32 s42, s25, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 21 +; GFX11-NEXT: v_writelane_b32 v75, s42, 21 ; GFX11-NEXT: s_lshr_b32 s42, s23, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 22 +; GFX11-NEXT: v_writelane_b32 v75, s42, 22 ; GFX11-NEXT: s_lshr_b32 s42, s23, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 23 +; GFX11-NEXT: v_writelane_b32 v75, s42, 23 ; GFX11-NEXT: s_lshr_b32 s42, s23, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 24 ; GFX11-NEXT: s_lshr_b32 s42, s21, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 25 +; GFX11-NEXT: v_writelane_b32 v75, s42, 25 ; GFX11-NEXT: s_lshr_b32 s42, s21, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 26 +; GFX11-NEXT: v_writelane_b32 v75, s42, 26 ; GFX11-NEXT: s_lshr_b32 s42, s21, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 27 +; GFX11-NEXT: v_writelane_b32 v75, s42, 27 ; GFX11-NEXT: s_lshr_b32 s42, s19, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 28 +; GFX11-NEXT: v_writelane_b32 v75, s42, 28 ; GFX11-NEXT: s_lshr_b32 s42, s19, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 29 +; GFX11-NEXT: v_writelane_b32 v75, s42, 29 ; GFX11-NEXT: s_lshr_b32 s42, s19, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 30 +; GFX11-NEXT: v_writelane_b32 v75, s42, 30 ; GFX11-NEXT: s_lshr_b32 s42, s17, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 31 +; GFX11-NEXT: v_writelane_b32 v75, s42, 31 ; GFX11-NEXT: s_lshr_b32 s42, s17, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 0 +; GFX11-NEXT: v_writelane_b32 v76, s42, 0 ; GFX11-NEXT: s_lshr_b32 s42, s17, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v77, s42, 1 +; GFX11-NEXT: v_writelane_b32 v76, s42, 1 ; GFX11-NEXT: s_lshr_b32 s42, s3, 24 -; GFX11-NEXT: v_writelane_b32 v77, s42, 2 +; GFX11-NEXT: v_writelane_b32 v76, s42, 2 ; GFX11-NEXT: s_lshr_b32 s42, s3, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v77, s42, 3 +; GFX11-NEXT: v_writelane_b32 v76, s42, 3 ; GFX11-NEXT: s_lshr_b32 s42, s3, 8 -; GFX11-NEXT: v_writelane_b32 v77, s42, 4 +; GFX11-NEXT: v_writelane_b32 v76, s42, 4 ; GFX11-NEXT: s_lshr_b32 s42, s1, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v77, s42, 5 +; GFX11-NEXT: v_writelane_b32 v76, s42, 5 ; GFX11-NEXT: s_lshr_b32 s42, s1, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 6 +; GFX11-NEXT: v_writelane_b32 v76, s42, 6 ; GFX11-NEXT: s_lshr_b32 s42, s1, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v77, s42, 7 +; GFX11-NEXT: v_writelane_b32 v76, s42, 7 ; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24 ; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_lo ; GFX11-NEXT: s_cbranch_vccnz .LBB73_4 ; GFX11-NEXT: .LBB73_2: ; %cmp.true -; GFX11-NEXT: v_add_f64 v[21:22], s[22:23], 1.0 -; GFX11-NEXT: v_add_f64 v[11:12], s[4:5], 1.0 -; GFX11-NEXT: v_add_f64 v[23:24], s[20:21], 1.0 -; GFX11-NEXT: v_add_f64 v[13:14], s[12:13], 1.0 -; GFX11-NEXT: v_add_f64 v[27:28], s[18:19], 1.0 +; GFX11-NEXT: v_add_f64 v[22:23], s[24:25], 1.0 +; GFX11-NEXT: v_add_f64 v[27:28], s[22:23], 1.0 +; GFX11-NEXT: v_add_f64 v[29:30], s[20:21], 1.0 +; GFX11-NEXT: v_add_f64 v[34:35], s[18:19], 1.0 +; GFX11-NEXT: v_add_f64 v[36:37], s[16:17], 1.0 +; GFX11-NEXT: v_add_f64 v[1:2], s[4:5], 1.0 +; GFX11-NEXT: v_add_f64 v[5:6], s[8:9], 1.0 +; GFX11-NEXT: v_add_f64 v[9:10], s[12:13], 1.0 +; GFX11-NEXT: v_add_f64 v[50:51], s[2:3], 1.0 +; GFX11-NEXT: v_add_f64 v[3:4], s[6:7], 1.0 +; GFX11-NEXT: v_add_f64 v[7:8], s[10:11], 1.0 +; GFX11-NEXT: v_add_f64 v[11:12], s[14:15], 1.0 +; GFX11-NEXT: v_add_f64 v[13:14], s[40:41], 1.0 ; GFX11-NEXT: v_add_f64 v[15:16], s[28:29], 1.0 -; GFX11-NEXT: v_add_f64 v[31:32], s[16:17], 1.0 -; GFX11-NEXT: v_add_f64 v[7:8], s[8:9], 1.0 -; GFX11-NEXT: v_add_f64 v[17:18], s[26:27], 1.0 -; GFX11-NEXT: v_add_f64 v[35:36], s[2:3], 1.0 -; GFX11-NEXT: v_add_f64 v[1:2], s[40:41], 1.0 -; GFX11-NEXT: v_add_f64 v[3:4], s[14:15], 1.0 -; GFX11-NEXT: v_add_f64 v[5:6], s[10:11], 1.0 -; GFX11-NEXT: v_add_f64 v[9:10], s[6:7], 1.0 -; GFX11-NEXT: v_add_f64 v[19:20], s[24:25], 1.0 -; GFX11-NEXT: v_add_f64 v[48:49], s[0:1], 1.0 -; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[21:22] -; GFX11-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12] -; GFX11-NEXT: v_lshrrev_b64 v[65:66], 24, v[23:24] -; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[13:14] -; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[27:28] -; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[15:16] -; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[31:32] -; GFX11-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8] -; GFX11-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18] -; GFX11-NEXT: v_lshrrev_b64 v[68:69], 24, v[35:36] -; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[1:2] -; GFX11-NEXT: v_lshrrev_b64 v[29:30], 24, v[3:4] -; GFX11-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] -; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[9:10] -; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20] -; GFX11-NEXT: v_lshrrev_b64 v[69:70], 24, v[48:49] +; GFX11-NEXT: v_add_f64 v[20:21], s[26:27], 1.0 +; GFX11-NEXT: v_add_f64 v[52:53], s[0:1], 1.0 +; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[22:23] +; GFX11-NEXT: v_lshrrev_b64 v[65:66], 24, v[27:28] +; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[29:30] +; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[34:35] +; GFX11-NEXT: v_lshrrev_b64 v[68:69], 24, v[36:37] +; GFX11-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2] +; GFX11-NEXT: v_lshrrev_b64 v[24:25], 24, v[5:6] +; GFX11-NEXT: v_lshrrev_b64 v[31:32], 24, v[9:10] +; GFX11-NEXT: v_lshrrev_b64 v[69:70], 24, v[50:51] +; GFX11-NEXT: v_lshrrev_b64 v[18:19], 24, v[3:4] +; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8] +; GFX11-NEXT: v_lshrrev_b64 v[32:33], 24, v[11:12] +; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[13:14] +; GFX11-NEXT: v_lshrrev_b64 v[48:49], 24, v[15:16] +; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[20:21] +; GFX11-NEXT: v_lshrrev_b64 v[70:71], 24, v[52:53] ; GFX11-NEXT: v_lshrrev_b32_e32 v39, 24, v2 -; GFX11-NEXT: v_lshrrev_b32_e32 v55, 16, v2 -; GFX11-NEXT: v_lshrrev_b32_e32 v34, 8, v2 -; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v1 -; GFX11-NEXT: v_lshrrev_b32_e32 v82, 24, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v83, 16, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v81, 8, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v3 -; GFX11-NEXT: v_lshrrev_b32_e32 v71, 8, v3 -; GFX11-NEXT: v_lshrrev_b32_e32 v97, 24, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v98, 16, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v86, 8, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v85, 16, v5 -; GFX11-NEXT: v_lshrrev_b32_e32 v84, 8, v5 -; GFX11-NEXT: v_lshrrev_b32_e32 v102, 24, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v103, 16, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v101, 8, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v96, 16, v7 -; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v7 -; GFX11-NEXT: v_lshrrev_b32_e32 v114, 24, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v116, 16, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v115, 8, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v100, 16, v9 -; GFX11-NEXT: v_lshrrev_b32_e32 v99, 8, v9 -; GFX11-NEXT: v_lshrrev_b32_e32 v130, 24, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v131, 16, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v129, 8, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v113, 16, v11 -; GFX11-NEXT: v_lshrrev_b32_e32 v112, 8, v11 -; GFX11-NEXT: v_lshrrev_b32_e32 v134, 24, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v144, 8, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v118, 16, v13 -; GFX11-NEXT: v_lshrrev_b32_e32 v117, 8, v13 -; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v150, 16, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v147, 8, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v128, 16, v15 -; GFX11-NEXT: v_lshrrev_b32_e32 v119, 8, v15 -; GFX11-NEXT: v_lshrrev_b32_e32 v162, 24, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v164, 16, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v163, 8, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v133, 16, v17 -; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v17 -; GFX11-NEXT: v_lshrrev_b32_e32 v176, 24, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v146, 16, v19 -; GFX11-NEXT: v_lshrrev_b32_e32 v135, 8, v19 -; GFX11-NEXT: v_lshrrev_b32_e32 v182, 24, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v40, 16, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v151, 16, v21 -; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v21 -; GFX11-NEXT: v_lshrrev_b32_e32 v44, 24, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v45, 16, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v43, 8, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v161, 16, v23 -; GFX11-NEXT: v_lshrrev_b32_e32 v160, 8, v23 -; GFX11-NEXT: v_lshrrev_b32_e32 v46, 24, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v56, 16, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v47, 8, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v166, 16, v27 -; GFX11-NEXT: v_lshrrev_b32_e32 v165, 8, v27 -; GFX11-NEXT: v_lshrrev_b32_e32 v58, 24, v32 -; GFX11-NEXT: v_lshrrev_b32_e32 v59, 16, v32 -; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v32 -; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v31 -; GFX11-NEXT: v_lshrrev_b32_e32 v177, 8, v31 -; GFX11-NEXT: v_lshrrev_b32_e32 v60, 24, v36 -; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v36 -; GFX11-NEXT: v_lshrrev_b32_e32 v61, 8, v36 -; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v35 -; GFX11-NEXT: v_lshrrev_b32_e32 v180, 8, v35 -; GFX11-NEXT: v_lshrrev_b32_e32 v63, 24, v49 -; GFX11-NEXT: v_lshrrev_b32_e32 v72, 16, v49 -; GFX11-NEXT: v_lshrrev_b32_e32 v73, 8, v49 -; GFX11-NEXT: v_lshrrev_b32_e32 v41, 16, v48 -; GFX11-NEXT: v_lshrrev_b32_e32 v42, 8, v48 +; GFX11-NEXT: v_lshrrev_b32_e32 v49, 16, v2 +; GFX11-NEXT: v_lshrrev_b32_e32 v33, 8, v2 +; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX11-NEXT: v_lshrrev_b32_e32 v19, 8, v1 +; GFX11-NEXT: v_lshrrev_b32_e32 v81, 24, v4 +; GFX11-NEXT: v_lshrrev_b32_e32 v82, 16, v4 +; GFX11-NEXT: v_lshrrev_b32_e32 v80, 8, v4 +; GFX11-NEXT: v_lshrrev_b32_e32 v71, 16, v3 +; GFX11-NEXT: v_lshrrev_b32_e32 v55, 8, v3 +; GFX11-NEXT: v_lshrrev_b32_e32 v96, 24, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v97, 16, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v85, 8, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v5 +; GFX11-NEXT: v_lshrrev_b32_e32 v83, 8, v5 +; GFX11-NEXT: v_lshrrev_b32_e32 v101, 24, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v102, 16, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v100, 8, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v87, 16, v7 +; GFX11-NEXT: v_lshrrev_b32_e32 v86, 8, v7 +; GFX11-NEXT: v_lshrrev_b32_e32 v113, 24, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v115, 16, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v114, 8, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v99, 16, v9 +; GFX11-NEXT: v_lshrrev_b32_e32 v98, 8, v9 +; GFX11-NEXT: v_lshrrev_b32_e32 v129, 24, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v130, 16, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v128, 8, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v112, 16, v11 +; GFX11-NEXT: v_lshrrev_b32_e32 v103, 8, v11 +; GFX11-NEXT: v_lshrrev_b32_e32 v133, 24, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v144, 16, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v135, 8, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v117, 16, v13 +; GFX11-NEXT: v_lshrrev_b32_e32 v116, 8, v13 +; GFX11-NEXT: v_lshrrev_b32_e32 v147, 24, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v149, 16, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v146, 8, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v119, 16, v15 +; GFX11-NEXT: v_lshrrev_b32_e32 v118, 8, v15 +; GFX11-NEXT: v_lshrrev_b32_e32 v161, 24, v21 +; GFX11-NEXT: v_lshrrev_b32_e32 v163, 16, v21 +; GFX11-NEXT: v_lshrrev_b32_e32 v162, 8, v21 +; GFX11-NEXT: v_lshrrev_b32_e32 v132, 16, v20 +; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v20 +; GFX11-NEXT: v_lshrrev_b32_e32 v167, 24, v23 +; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v23 +; GFX11-NEXT: v_lshrrev_b32_e32 v166, 8, v23 +; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v22 +; GFX11-NEXT: v_lshrrev_b32_e32 v134, 8, v22 +; GFX11-NEXT: v_lshrrev_b32_e32 v181, 24, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v183, 16, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v150, 16, v27 +; GFX11-NEXT: v_lshrrev_b32_e32 v148, 8, v27 +; GFX11-NEXT: v_lshrrev_b32_e32 v43, 24, v30 +; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v30 +; GFX11-NEXT: v_lshrrev_b32_e32 v42, 8, v30 +; GFX11-NEXT: v_lshrrev_b32_e32 v160, 16, v29 +; GFX11-NEXT: v_lshrrev_b32_e32 v151, 8, v29 +; GFX11-NEXT: v_lshrrev_b32_e32 v45, 24, v35 +; GFX11-NEXT: v_lshrrev_b32_e32 v47, 16, v35 +; GFX11-NEXT: v_lshrrev_b32_e32 v46, 8, v35 +; GFX11-NEXT: v_lshrrev_b32_e32 v165, 16, v34 +; GFX11-NEXT: v_lshrrev_b32_e32 v164, 8, v34 +; GFX11-NEXT: v_lshrrev_b32_e32 v57, 24, v37 +; GFX11-NEXT: v_lshrrev_b32_e32 v58, 16, v37 +; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v37 +; GFX11-NEXT: v_lshrrev_b32_e32 v177, 16, v36 +; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v36 +; GFX11-NEXT: v_lshrrev_b32_e32 v59, 24, v51 +; GFX11-NEXT: v_lshrrev_b32_e32 v61, 16, v51 +; GFX11-NEXT: v_lshrrev_b32_e32 v60, 8, v51 +; GFX11-NEXT: v_lshrrev_b32_e32 v180, 16, v50 +; GFX11-NEXT: v_lshrrev_b32_e32 v179, 8, v50 +; GFX11-NEXT: v_lshrrev_b32_e32 v62, 24, v53 +; GFX11-NEXT: v_lshrrev_b32_e32 v63, 16, v53 +; GFX11-NEXT: v_lshrrev_b32_e32 v72, 8, v53 +; GFX11-NEXT: v_lshrrev_b32_e32 v40, 16, v52 +; GFX11-NEXT: v_lshrrev_b32_e32 v41, 8, v52 ; GFX11-NEXT: s_branch .LBB73_5 ; GFX11-NEXT: .LBB73_3: ; GFX11-NEXT: ; implicit-def: $sgpr43 @@ -113869,39 +114026,39 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; GFX11-NEXT: ; implicit-def: $sgpr62 ; GFX11-NEXT: ; implicit-def: $sgpr81 ; GFX11-NEXT: ; implicit-def: $sgpr82 +; GFX11-NEXT: ; implicit-def: $sgpr72 ; GFX11-NEXT: ; implicit-def: $sgpr71 ; GFX11-NEXT: ; implicit-def: $sgpr80 +; GFX11-NEXT: ; implicit-def: $sgpr74 ; GFX11-NEXT: ; implicit-def: $sgpr69 ; GFX11-NEXT: ; implicit-def: $sgpr70 +; GFX11-NEXT: ; implicit-def: $sgpr76 ; GFX11-NEXT: ; implicit-def: $sgpr67 ; GFX11-NEXT: ; implicit-def: $sgpr68 +; GFX11-NEXT: ; implicit-def: $sgpr78 ; GFX11-NEXT: ; implicit-def: $sgpr65 ; GFX11-NEXT: ; implicit-def: $sgpr66 +; GFX11-NEXT: ; implicit-def: $sgpr88 ; GFX11-NEXT: ; implicit-def: $sgpr55 ; GFX11-NEXT: ; implicit-def: $sgpr64 +; GFX11-NEXT: ; implicit-def: $sgpr90 ; GFX11-NEXT: ; implicit-def: $sgpr53 ; GFX11-NEXT: ; implicit-def: $sgpr54 +; GFX11-NEXT: ; implicit-def: $sgpr92 ; GFX11-NEXT: ; implicit-def: $sgpr104 ; GFX11-NEXT: ; implicit-def: $sgpr34 ; GFX11-NEXT: ; implicit-def: $sgpr51 ; GFX11-NEXT: ; implicit-def: $sgpr52 +; GFX11-NEXT: ; implicit-def: $sgpr94 ; GFX11-NEXT: ; implicit-def: $sgpr35 ; GFX11-NEXT: ; implicit-def: $sgpr36 ; GFX11-NEXT: ; implicit-def: $sgpr37 ; GFX11-NEXT: ; implicit-def: $sgpr49 ; GFX11-NEXT: ; implicit-def: $sgpr50 +; GFX11-NEXT: ; implicit-def: $sgpr30 ; GFX11-NEXT: ; implicit-def: $sgpr38 ; GFX11-NEXT: ; implicit-def: $sgpr39 ; GFX11-NEXT: ; implicit-def: $sgpr48 -; GFX11-NEXT: ; implicit-def: $sgpr30 -; GFX11-NEXT: ; implicit-def: $sgpr94 -; GFX11-NEXT: ; implicit-def: $sgpr92 -; GFX11-NEXT: ; implicit-def: $sgpr90 -; GFX11-NEXT: ; implicit-def: $sgpr88 -; GFX11-NEXT: ; implicit-def: $sgpr78 -; GFX11-NEXT: ; implicit-def: $sgpr76 -; GFX11-NEXT: ; implicit-def: $sgpr74 -; GFX11-NEXT: ; implicit-def: $sgpr72 ; GFX11-NEXT: ; implicit-def: $sgpr43 ; GFX11-NEXT: ; kill: killed $sgpr43 ; GFX11-NEXT: ; implicit-def: $sgpr43 @@ -113980,358 +114137,356 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, ; GFX11-NEXT: ; kill: killed $sgpr43 ; GFX11-NEXT: s_branch .LBB73_2 ; GFX11-NEXT: .LBB73_4: -; GFX11-NEXT: v_dual_mov_b32 v48, s0 :: v_dual_mov_b32 v49, s1 -; GFX11-NEXT: v_readlane_b32 s0, v76, 0 -; GFX11-NEXT: v_mov_b32_e32 v83, s36 -; GFX11-NEXT: v_dual_mov_b32 v1, s40 :: v_dual_mov_b32 v2, s41 -; GFX11-NEXT: v_dual_mov_b32 v3, s14 :: v_dual_mov_b32 v4, s15 +; GFX11-NEXT: v_dual_mov_b32 v52, s0 :: v_dual_mov_b32 v29, s20 +; GFX11-NEXT: v_readlane_b32 s0, v75, 0 +; GFX11-NEXT: v_mov_b32_e32 v82, s36 +; GFX11-NEXT: v_dual_mov_b32 v50, s2 :: v_dual_mov_b32 v27, s22 +; GFX11-NEXT: v_dual_mov_b32 v36, s16 :: v_dual_mov_b32 v15, s28 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) -; GFX11-NEXT: v_mov_b32_e32 v98, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 1 -; GFX11-NEXT: v_mov_b32_e32 v97, s34 -; GFX11-NEXT: v_dual_mov_b32 v5, s10 :: v_dual_mov_b32 v6, s11 -; GFX11-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9 -; GFX11-NEXT: v_mov_b32_e32 v102, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 2 -; GFX11-NEXT: v_dual_mov_b32 v9, s6 :: v_dual_mov_b32 v10, s7 -; GFX11-NEXT: v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v103, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 3 -; GFX11-NEXT: v_dual_mov_b32 v13, s12 :: v_dual_mov_b32 v14, s13 -; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29 +; GFX11-NEXT: v_mov_b32_e32 v97, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 1 +; GFX11-NEXT: v_mov_b32_e32 v96, s34 +; GFX11-NEXT: v_dual_mov_b32 v34, s18 :: v_dual_mov_b32 v13, s40 +; GFX11-NEXT: v_dual_mov_b32 v22, s24 :: v_dual_mov_b32 v11, s14 ; GFX11-NEXT: v_mov_b32_e32 v101, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 4 -; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27 -; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25 +; GFX11-NEXT: v_readlane_b32 s0, v75, 2 +; GFX11-NEXT: v_dual_mov_b32 v20, s26 :: v_dual_mov_b32 v9, s12 +; GFX11-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v2, s5 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v114, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 5 -; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23 -; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21 -; GFX11-NEXT: v_mov_b32_e32 v116, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 6 -; GFX11-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19 -; GFX11-NEXT: v_dual_mov_b32 v31, s16 :: v_dual_mov_b32 v32, s17 +; GFX11-NEXT: v_mov_b32_e32 v102, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 3 +; GFX11-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v4, s7 +; GFX11-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v6, s9 +; GFX11-NEXT: v_mov_b32_e32 v100, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 4 +; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v8, s11 +; GFX11-NEXT: v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v21, s27 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mov_b32_e32 v113, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 5 +; GFX11-NEXT: v_dual_mov_b32 v12, s15 :: v_dual_mov_b32 v23, s25 +; GFX11-NEXT: v_dual_mov_b32 v14, s41 :: v_dual_mov_b32 v35, s19 ; GFX11-NEXT: v_mov_b32_e32 v115, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 7 -; GFX11-NEXT: v_dual_mov_b32 v35, s2 :: v_dual_mov_b32 v36, s3 -; GFX11-NEXT: v_dual_mov_b32 v41, vcc_hi :: v_dual_mov_b32 v42, s103 -; GFX11-NEXT: v_mov_b32_e32 v130, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 8 -; GFX11-NEXT: v_dual_mov_b32 v181, s102 :: v_dual_mov_b32 v180, s101 -; GFX11-NEXT: v_dual_mov_b32 v178, s100 :: v_dual_mov_b32 v177, s99 +; GFX11-NEXT: v_readlane_b32 s0, v75, 6 +; GFX11-NEXT: v_dual_mov_b32 v16, s29 :: v_dual_mov_b32 v37, s17 +; GFX11-NEXT: v_dual_mov_b32 v28, s23 :: v_dual_mov_b32 v51, s3 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v131, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 9 -; GFX11-NEXT: v_dual_mov_b32 v166, s98 :: v_dual_mov_b32 v165, s97 -; GFX11-NEXT: v_dual_mov_b32 v161, s96 :: v_dual_mov_b32 v160, s87 +; GFX11-NEXT: v_mov_b32_e32 v114, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 7 +; GFX11-NEXT: v_dual_mov_b32 v30, s21 :: v_dual_mov_b32 v53, s1 +; GFX11-NEXT: v_dual_mov_b32 v40, vcc_hi :: v_dual_mov_b32 v41, s103 ; GFX11-NEXT: v_mov_b32_e32 v129, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 10 -; GFX11-NEXT: v_dual_mov_b32 v151, s86 :: v_dual_mov_b32 v146, s84 -; GFX11-NEXT: v_dual_mov_b32 v149, s85 :: v_dual_mov_b32 v132, s81 +; GFX11-NEXT: v_readlane_b32 s0, v75, 8 +; GFX11-NEXT: v_dual_mov_b32 v180, s102 :: v_dual_mov_b32 v179, s101 +; GFX11-NEXT: v_dual_mov_b32 v177, s100 :: v_dual_mov_b32 v176, s99 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v134, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 11 -; GFX11-NEXT: v_dual_mov_b32 v135, s83 :: v_dual_mov_b32 v128, s80 -; GFX11-NEXT: v_dual_mov_b32 v133, s82 :: v_dual_mov_b32 v118, s70 -; GFX11-NEXT: v_mov_b32_e32 v145, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 12 -; GFX11-NEXT: v_dual_mov_b32 v119, s71 :: v_dual_mov_b32 v112, s67 -; GFX11-NEXT: v_dual_mov_b32 v117, s69 :: v_dual_mov_b32 v100, s66 +; GFX11-NEXT: v_mov_b32_e32 v130, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 9 +; GFX11-NEXT: v_dual_mov_b32 v165, s98 :: v_dual_mov_b32 v164, s97 +; GFX11-NEXT: v_dual_mov_b32 v160, s96 :: v_dual_mov_b32 v151, s87 +; GFX11-NEXT: v_mov_b32_e32 v128, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 10 +; GFX11-NEXT: v_dual_mov_b32 v150, s86 :: v_dual_mov_b32 v145, s84 +; GFX11-NEXT: v_dual_mov_b32 v148, s85 :: v_dual_mov_b32 v131, s81 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mov_b32_e32 v133, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 11 +; GFX11-NEXT: v_dual_mov_b32 v134, s83 :: v_dual_mov_b32 v119, s80 +; GFX11-NEXT: v_dual_mov_b32 v132, s82 :: v_dual_mov_b32 v117, s70 ; GFX11-NEXT: v_mov_b32_e32 v144, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 13 -; GFX11-NEXT: v_dual_mov_b32 v113, s68 :: v_dual_mov_b32 v96, s64 -; GFX11-NEXT: v_dual_mov_b32 v99, s65 :: v_dual_mov_b32 v84, s53 -; GFX11-NEXT: v_mov_b32_e32 v148, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 14 -; GFX11-NEXT: v_dual_mov_b32 v87, s55 :: v_dual_mov_b32 v80, s52 -; GFX11-NEXT: v_dual_mov_b32 v85, s54 :: v_dual_mov_b32 v30, s50 +; GFX11-NEXT: v_readlane_b32 s0, v75, 12 +; GFX11-NEXT: v_dual_mov_b32 v118, s71 :: v_dual_mov_b32 v103, s67 +; GFX11-NEXT: v_dual_mov_b32 v116, s69 :: v_dual_mov_b32 v99, s66 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v150, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 15 -; GFX11-NEXT: v_dual_mov_b32 v71, s51 :: v_dual_mov_b32 v26, s49 -; GFX11-NEXT: v_dual_mov_b32 v39, s48 :: v_dual_mov_b32 v34, s38 +; GFX11-NEXT: v_mov_b32_e32 v135, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 13 +; GFX11-NEXT: v_dual_mov_b32 v112, s68 :: v_dual_mov_b32 v87, s64 +; GFX11-NEXT: v_dual_mov_b32 v98, s65 :: v_dual_mov_b32 v83, s53 ; GFX11-NEXT: v_mov_b32_e32 v147, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 16 -; GFX11-NEXT: v_dual_mov_b32 v55, s39 :: v_dual_mov_b32 v82, s37 -; GFX11-NEXT: v_dual_mov_b32 v81, s35 :: v_dual_mov_b32 v86, s104 +; GFX11-NEXT: v_readlane_b32 s0, v75, 14 +; GFX11-NEXT: v_dual_mov_b32 v86, s55 :: v_dual_mov_b32 v71, s52 +; GFX11-NEXT: v_dual_mov_b32 v84, s54 :: v_dual_mov_b32 v55, s51 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v162, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 17 -; GFX11-NEXT: v_dual_mov_b32 v69, s42 :: v_dual_mov_b32 v68, s44 -; GFX11-NEXT: v_dual_mov_b32 v67, s46 :: v_dual_mov_b32 v66, s56 -; GFX11-NEXT: v_mov_b32_e32 v164, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 18 -; GFX11-NEXT: v_dual_mov_b32 v65, s58 :: v_dual_mov_b32 v64, s60 -; GFX11-NEXT: v_dual_mov_b32 v54, s62 :: v_dual_mov_b32 v53, s30 +; GFX11-NEXT: v_mov_b32_e32 v149, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 15 +; GFX11-NEXT: v_dual_mov_b32 v26, s50 :: v_dual_mov_b32 v19, s49 +; GFX11-NEXT: v_dual_mov_b32 v70, s42 :: v_dual_mov_b32 v69, s44 +; GFX11-NEXT: v_mov_b32_e32 v146, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 16 +; GFX11-NEXT: v_dual_mov_b32 v68, s46 :: v_dual_mov_b32 v67, s56 +; GFX11-NEXT: v_dual_mov_b32 v66, s58 :: v_dual_mov_b32 v65, s60 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mov_b32_e32 v161, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 17 +; GFX11-NEXT: v_dual_mov_b32 v64, s62 :: v_dual_mov_b32 v31, s88 +; GFX11-NEXT: v_dual_mov_b32 v54, s72 :: v_dual_mov_b32 v25, s90 ; GFX11-NEXT: v_mov_b32_e32 v163, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 19 -; GFX11-NEXT: v_dual_mov_b32 v52, s94 :: v_dual_mov_b32 v51, s92 -; GFX11-NEXT: v_dual_mov_b32 v50, s90 :: v_dual_mov_b32 v37, s78 -; GFX11-NEXT: v_mov_b32_e32 v176, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 20 -; GFX11-NEXT: v_dual_mov_b32 v38, s88 :: v_dual_mov_b32 v33, s76 -; GFX11-NEXT: v_mov_b32_e32 v29, s74 -; GFX11-NEXT: v_mov_b32_e32 v25, s72 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v179, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 21 +; GFX11-NEXT: v_readlane_b32 s0, v75, 18 +; GFX11-NEXT: v_dual_mov_b32 v48, s74 :: v_dual_mov_b32 v17, s30 +; GFX11-NEXT: v_dual_mov_b32 v38, s76 :: v_dual_mov_b32 v39, s48 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mov_b32_e32 v162, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 19 +; GFX11-NEXT: v_dual_mov_b32 v32, s78 :: v_dual_mov_b32 v49, s39 +; GFX11-NEXT: v_dual_mov_b32 v24, s92 :: v_dual_mov_b32 v33, s38 ; GFX11-NEXT: v_mov_b32_e32 v167, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 22 +; GFX11-NEXT: v_readlane_b32 s0, v75, 20 +; GFX11-NEXT: v_dual_mov_b32 v18, s94 :: v_dual_mov_b32 v81, s37 +; GFX11-NEXT: v_dual_mov_b32 v80, s35 :: v_dual_mov_b32 v85, s104 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v178, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 21 +; GFX11-NEXT: v_mov_b32_e32 v166, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 22 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v181, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 23 +; GFX11-NEXT: v_mov_b32_e32 v183, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 24 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX11-NEXT: v_mov_b32_e32 v182, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 23 -; GFX11-NEXT: v_mov_b32_e32 v40, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 24 +; GFX11-NEXT: v_readlane_b32 s0, v75, 25 +; GFX11-NEXT: v_mov_b32_e32 v43, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 26 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v183, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 25 ; GFX11-NEXT: v_mov_b32_e32 v44, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 26 +; GFX11-NEXT: v_readlane_b32 s0, v75, 27 +; GFX11-NEXT: v_mov_b32_e32 v42, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 28 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX11-NEXT: v_mov_b32_e32 v45, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 27 -; GFX11-NEXT: v_mov_b32_e32 v43, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 28 +; GFX11-NEXT: v_readlane_b32 s0, v75, 29 +; GFX11-NEXT: v_mov_b32_e32 v47, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 30 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX11-NEXT: v_mov_b32_e32 v46, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 29 -; GFX11-NEXT: v_mov_b32_e32 v56, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 30 +; GFX11-NEXT: v_readlane_b32 s0, v75, 31 +; GFX11-NEXT: v_mov_b32_e32 v57, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 0 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v47, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 31 ; GFX11-NEXT: v_mov_b32_e32 v58, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 1 +; GFX11-NEXT: v_mov_b32_e32 v56, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 2 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX11-NEXT: v_mov_b32_e32 v59, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 1 -; GFX11-NEXT: v_mov_b32_e32 v57, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 2 +; GFX11-NEXT: v_readlane_b32 s0, v76, 3 +; GFX11-NEXT: v_mov_b32_e32 v61, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 4 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX11-NEXT: v_mov_b32_e32 v60, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 3 +; GFX11-NEXT: v_readlane_b32 s0, v76, 5 ; GFX11-NEXT: v_mov_b32_e32 v62, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 4 +; GFX11-NEXT: v_readlane_b32 s0, v76, 6 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v61, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 5 ; GFX11-NEXT: v_mov_b32_e32 v63, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 6 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_readlane_b32 s0, v76, 7 ; GFX11-NEXT: v_mov_b32_e32 v72, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 7 -; GFX11-NEXT: v_mov_b32_e32 v73, s0 ; GFX11-NEXT: .LBB73_5: ; %end -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-NEXT: v_perm_b32 v69, v41, v69, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v48, v48, v42, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v70, v72, v63, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v68, v181, v68, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v181, v62, v60, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69 -; GFX11-NEXT: v_perm_b32 v49, v49, v73, 0xc0c0004 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-NEXT: v_perm_b32 v70, v40, v70, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v69, v180, v69, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v68, v177, v68, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v67, v165, v67, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v52, v52, v41, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70 -; GFX11-NEXT: v_perm_b32 v35, v35, v180, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v180, 16, v181 -; GFX11-NEXT: v_or_b32_e32 v60, v48, v69 -; GFX11-NEXT: v_perm_b32 v48, v178, v67, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v61, v49, v70 -; GFX11-NEXT: v_perm_b32 v49, v56, v46, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v63, v36, v180 +; GFX11-NEXT: v_perm_b32 v179, v50, v179, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69 +; GFX11-NEXT: v_perm_b32 v40, v63, v62, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v180, v61, v59, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v36, v36, v176, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68 -; GFX11-NEXT: v_lshlrev_b32_e32 v36, 16, v48 -; GFX11-NEXT: v_perm_b32 v48, v166, v66, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v31, v31, v177, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v27, v27, v165, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v28, v28, v47, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v49, 16, v49 -; GFX11-NEXT: v_lshlrev_b32_e32 v48, 16, v48 -; GFX11-NEXT: v_or_b32_e32 v62, v35, v68 -; GFX11-NEXT: v_perm_b32 v35, v59, v58, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v66, v31, v36 -; GFX11-NEXT: v_or_b32_e32 v69, v28, v49 -; GFX11-NEXT: v_or_b32_e32 v68, v27, v48 -; GFX11-NEXT: v_perm_b32 v27, v161, v65, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v28, v45, v44, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v31, v151, v64, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v32, v32, v57, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v35, 16, v35 -; GFX11-NEXT: v_perm_b32 v23, v23, v160, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; GFX11-NEXT: v_perm_b32 v24, v24, v43, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; GFX11-NEXT: v_perm_b32 v21, v21, v149, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; GFX11-NEXT: v_or_b32_e32 v67, v32, v35 +; GFX11-NEXT: v_perm_b32 v164, v34, v164, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67 +; GFX11-NEXT: v_or_b32_e32 v50, v52, v70 +; GFX11-NEXT: v_or_b32_e32 v52, v179, v69 +; GFX11-NEXT: v_perm_b32 v69, v58, v57, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v70, v47, v45, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v53, v53, v72, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v40, 16, v40 +; GFX11-NEXT: v_perm_b32 v41, v51, v60, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v180, 16, v180 +; GFX11-NEXT: v_or_b32_e32 v34, v36, v68 +; GFX11-NEXT: v_or_b32_e32 v36, v164, v67 +; GFX11-NEXT: v_perm_b32 v66, v160, v66, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v67, v44, v43, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v65, v150, v65, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v37, v37, v56, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69 +; GFX11-NEXT: v_perm_b32 v165, v35, v46, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70 +; GFX11-NEXT: v_or_b32_e32 v51, v53, v40 +; GFX11-NEXT: v_or_b32_e32 v53, v41, v180 +; GFX11-NEXT: v_perm_b32 v29, v29, v151, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v66, 16, v66 +; GFX11-NEXT: v_perm_b32 v30, v30, v42, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67 +; GFX11-NEXT: v_perm_b32 v27, v27, v148, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v65, 16, v65 +; GFX11-NEXT: v_or_b32_e32 v35, v37, v69 +; GFX11-NEXT: v_or_b32_e32 v37, v165, v70 ; GFX11-NEXT: s_clause 0x1 -; GFX11-NEXT: scratch_store_b128 v0, v[60:63], off -; GFX11-NEXT: scratch_store_b128 v0, v[66:69], off offset:16 -; GFX11-NEXT: v_or_b32_e32 v64, v23, v27 -; GFX11-NEXT: v_perm_b32 v23, v40, v182, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v65, v24, v28 -; GFX11-NEXT: v_or_b32_e32 v66, v21, v31 -; GFX11-NEXT: v_perm_b32 v21, v22, v183, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v22, v146, v54, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v179, v176, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v27, v133, v53, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; GFX11-NEXT: v_perm_b32 v19, v19, v135, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; GFX11-NEXT: v_perm_b32 v20, v20, v167, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; GFX11-NEXT: v_perm_b32 v17, v17, v132, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; GFX11-NEXT: v_or_b32_e32 v67, v21, v23 -; GFX11-NEXT: v_or_b32_e32 v19, v19, v22 -; GFX11-NEXT: v_perm_b32 v22, v164, v162, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v20, v20, v24 -; GFX11-NEXT: v_or_b32_e32 v21, v17, v27 -; GFX11-NEXT: v_perm_b32 v17, v18, v163, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v18, v128, v52, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v118, v51, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v23, v150, v148, 0xc0c0004 +; GFX11-NEXT: scratch_store_b128 v0, v[50:53], off +; GFX11-NEXT: scratch_store_b128 v0, v[34:37], off offset:16 +; GFX11-NEXT: v_or_b32_e32 v34, v29, v66 +; GFX11-NEXT: v_perm_b32 v29, v183, v181, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v35, v30, v67 +; GFX11-NEXT: v_or_b32_e32 v36, v27, v65 +; GFX11-NEXT: v_perm_b32 v27, v28, v182, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v28, v145, v64, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v30, v178, v167, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v37, v132, v54, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; GFX11-NEXT: v_perm_b32 v22, v22, v134, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-NEXT: v_perm_b32 v23, v23, v166, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; GFX11-NEXT: v_perm_b32 v20, v20, v131, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v50, 16, v37 +; GFX11-NEXT: v_or_b32_e32 v37, v27, v29 +; GFX11-NEXT: v_or_b32_e32 v27, v22, v28 +; GFX11-NEXT: v_perm_b32 v22, v163, v161, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v28, v23, v30 +; GFX11-NEXT: v_or_b32_e32 v29, v20, v50 +; GFX11-NEXT: v_perm_b32 v20, v21, v162, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v21, v119, v48, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v23, v149, v147, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v30, v117, v38, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; GFX11-NEXT: v_perm_b32 v15, v15, v119, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-NEXT: v_perm_b32 v13, v13, v117, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; GFX11-NEXT: v_perm_b32 v16, v16, v147, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v15, v15, v118, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX11-NEXT: v_perm_b32 v16, v16, v146, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; GFX11-NEXT: v_or_b32_e32 v22, v17, v22 -; GFX11-NEXT: v_or_b32_e32 v15, v15, v18 -; GFX11-NEXT: v_perm_b32 v18, v145, v134, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v17, v13, v24 -; GFX11-NEXT: v_perm_b32 v24, v100, v38, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v16, v16, v23 -; GFX11-NEXT: v_perm_b32 v13, v14, v144, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v14, v113, v50, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v23, v131, v130, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-NEXT: v_perm_b32 v9, v9, v99, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; GFX11-NEXT: v_perm_b32 v11, v11, v112, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v13, v13, v116, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v38, 16, v30 +; GFX11-NEXT: v_or_b32_e32 v30, v20, v22 +; GFX11-NEXT: v_or_b32_e32 v20, v15, v21 +; GFX11-NEXT: v_perm_b32 v15, v144, v133, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v21, v16, v23 +; GFX11-NEXT: v_perm_b32 v23, v99, v31, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v22, v13, v38 +; GFX11-NEXT: v_perm_b32 v13, v14, v135, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v14, v112, v32, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v16, v130, v129, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-NEXT: v_perm_b32 v9, v9, v98, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v31, 16, v23 +; GFX11-NEXT: v_perm_b32 v11, v11, v103, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-NEXT: v_perm_b32 v12, v12, v129, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; GFX11-NEXT: v_or_b32_e32 v18, v13, v18 -; GFX11-NEXT: v_or_b32_e32 v13, v9, v24 -; GFX11-NEXT: v_perm_b32 v9, v10, v115, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v10, v96, v37, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v12, v12, v128, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX11-NEXT: v_or_b32_e32 v23, v13, v15 +; GFX11-NEXT: v_or_b32_e32 v13, v9, v31 +; GFX11-NEXT: v_perm_b32 v9, v10, v114, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v10, v87, v25, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v11, v11, v14 -; GFX11-NEXT: v_perm_b32 v14, v116, v114, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v12, v12, v23 -; GFX11-NEXT: v_perm_b32 v23, v103, v102, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v85, v33, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v7, v7, v87, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v14, v115, v113, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v12, v12, v16 +; GFX11-NEXT: v_perm_b32 v15, v102, v101, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v16, v84, v24, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v7, v7, v86, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-NEXT: v_perm_b32 v8, v8, v101, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; GFX11-NEXT: v_perm_b32 v5, v5, v84, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX11-NEXT: v_perm_b32 v8, v8, v100, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-NEXT: v_perm_b32 v5, v5, v83, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; GFX11-NEXT: v_or_b32_e32 v7, v7, v10 -; GFX11-NEXT: v_perm_b32 v10, v98, v97, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v10, v97, v96, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v14, v9, v14 -; GFX11-NEXT: v_or_b32_e32 v8, v8, v23 -; GFX11-NEXT: v_or_b32_e32 v9, v5, v24 -; GFX11-NEXT: v_perm_b32 v5, v80, v29, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v23, v83, v82, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v30, v25, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v25, v55, v39, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v6, v6, v86, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v8, v8, v15 +; GFX11-NEXT: v_or_b32_e32 v9, v5, v16 +; GFX11-NEXT: v_perm_b32 v5, v71, v18, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v15, v82, v81, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v16, v26, v17, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v17, v49, v39, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v6, v6, v85, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; GFX11-NEXT: v_perm_b32 v3, v3, v71, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v3, v3, v55, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-NEXT: v_perm_b32 v4, v4, v81, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; GFX11-NEXT: v_perm_b32 v26, v1, v26, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; GFX11-NEXT: v_perm_b32 v27, v2, v34, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX11-NEXT: v_perm_b32 v4, v4, v80, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-NEXT: v_perm_b32 v18, v1, v19, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX11-NEXT: v_perm_b32 v19, v2, v33, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; GFX11-NEXT: v_or_b32_e32 v10, v6, v10 ; GFX11-NEXT: v_or_b32_e32 v1, v3, v5 -; GFX11-NEXT: v_or_b32_e32 v2, v4, v23 -; GFX11-NEXT: v_or_b32_e32 v3, v26, v24 -; GFX11-NEXT: v_or_b32_e32 v4, v27, v25 +; GFX11-NEXT: v_or_b32_e32 v2, v4, v15 +; GFX11-NEXT: v_or_b32_e32 v3, v18, v16 +; GFX11-NEXT: v_or_b32_e32 v4, v19, v17 ; GFX11-NEXT: s_clause 0x5 -; GFX11-NEXT: scratch_store_b128 v0, v[64:67], off offset:32 -; GFX11-NEXT: scratch_store_b128 v0, v[19:22], off offset:48 -; GFX11-NEXT: scratch_store_b128 v0, v[15:18], off offset:64 +; GFX11-NEXT: scratch_store_b128 v0, v[34:37], off offset:32 +; GFX11-NEXT: scratch_store_b128 v0, v[27:30], off offset:48 +; GFX11-NEXT: scratch_store_b128 v0, v[20:23], off offset:64 ; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:80 ; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off offset:96 ; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:112 -; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Reload -; GFX11-NEXT: scratch_load_b32 v73, off, s32 -; GFX11-NEXT: scratch_load_b32 v72, off, s32 offset:4 -; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:8 -; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:12 -; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:16 -; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:20 -; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:24 -; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:28 -; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:32 -; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:36 -; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:40 -; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:44 -; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:48 -; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:52 -; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:56 -; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:60 -; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:64 -; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:68 -; GFX11-NEXT: v_readlane_b32 s30, v75, 7 -; GFX11-NEXT: v_readlane_b32 s31, v75, 8 -; GFX11-NEXT: v_readlane_b32 s104, v75, 6 -; GFX11-NEXT: v_readlane_b32 s103, v75, 5 -; GFX11-NEXT: v_readlane_b32 s102, v75, 4 -; GFX11-NEXT: v_readlane_b32 s101, v75, 3 -; GFX11-NEXT: v_readlane_b32 s100, v75, 2 -; GFX11-NEXT: v_readlane_b32 s99, v75, 1 -; GFX11-NEXT: v_readlane_b32 s98, v75, 0 -; GFX11-NEXT: v_readlane_b32 s97, v74, 31 -; GFX11-NEXT: v_readlane_b32 s96, v74, 30 -; GFX11-NEXT: v_readlane_b32 s87, v74, 29 -; GFX11-NEXT: v_readlane_b32 s86, v74, 28 -; GFX11-NEXT: v_readlane_b32 s85, v74, 27 -; GFX11-NEXT: v_readlane_b32 s84, v74, 26 -; GFX11-NEXT: v_readlane_b32 s83, v74, 25 -; GFX11-NEXT: v_readlane_b32 s82, v74, 24 -; GFX11-NEXT: v_readlane_b32 s81, v74, 23 -; GFX11-NEXT: v_readlane_b32 s80, v74, 22 -; GFX11-NEXT: v_readlane_b32 s71, v74, 21 -; GFX11-NEXT: v_readlane_b32 s70, v74, 20 -; GFX11-NEXT: v_readlane_b32 s69, v74, 19 -; GFX11-NEXT: v_readlane_b32 s68, v74, 18 -; GFX11-NEXT: v_readlane_b32 s67, v74, 17 -; GFX11-NEXT: v_readlane_b32 s66, v74, 16 -; GFX11-NEXT: v_readlane_b32 s65, v74, 15 -; GFX11-NEXT: v_readlane_b32 s64, v74, 14 -; GFX11-NEXT: v_readlane_b32 s55, v74, 13 -; GFX11-NEXT: v_readlane_b32 s54, v74, 12 -; GFX11-NEXT: v_readlane_b32 s53, v74, 11 -; GFX11-NEXT: v_readlane_b32 s52, v74, 10 -; GFX11-NEXT: v_readlane_b32 s51, v74, 9 -; GFX11-NEXT: v_readlane_b32 s50, v74, 8 -; GFX11-NEXT: v_readlane_b32 s49, v74, 7 -; GFX11-NEXT: v_readlane_b32 s48, v74, 6 -; GFX11-NEXT: v_readlane_b32 s39, v74, 5 -; GFX11-NEXT: v_readlane_b32 s38, v74, 4 -; GFX11-NEXT: v_readlane_b32 s37, v74, 3 -; GFX11-NEXT: v_readlane_b32 s36, v74, 2 -; GFX11-NEXT: v_readlane_b32 s35, v74, 1 -; GFX11-NEXT: v_readlane_b32 s34, v74, 0 +; GFX11-NEXT: s_clause 0x10 ; 68-byte Folded Reload +; GFX11-NEXT: scratch_load_b32 v72, off, s32 +; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:4 +; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:8 +; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:12 +; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:16 +; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:20 +; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:24 +; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:28 +; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:32 +; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:36 +; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:40 +; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:44 +; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:48 +; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:52 +; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:56 +; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:60 +; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:64 +; GFX11-NEXT: v_readlane_b32 s30, v74, 7 +; GFX11-NEXT: v_readlane_b32 s31, v74, 8 +; GFX11-NEXT: v_readlane_b32 s104, v74, 6 +; GFX11-NEXT: v_readlane_b32 s103, v74, 5 +; GFX11-NEXT: v_readlane_b32 s102, v74, 4 +; GFX11-NEXT: v_readlane_b32 s101, v74, 3 +; GFX11-NEXT: v_readlane_b32 s100, v74, 2 +; GFX11-NEXT: v_readlane_b32 s99, v74, 1 +; GFX11-NEXT: v_readlane_b32 s98, v74, 0 +; GFX11-NEXT: v_readlane_b32 s97, v73, 31 +; GFX11-NEXT: v_readlane_b32 s96, v73, 30 +; GFX11-NEXT: v_readlane_b32 s87, v73, 29 +; GFX11-NEXT: v_readlane_b32 s86, v73, 28 +; GFX11-NEXT: v_readlane_b32 s85, v73, 27 +; GFX11-NEXT: v_readlane_b32 s84, v73, 26 +; GFX11-NEXT: v_readlane_b32 s83, v73, 25 +; GFX11-NEXT: v_readlane_b32 s82, v73, 24 +; GFX11-NEXT: v_readlane_b32 s81, v73, 23 +; GFX11-NEXT: v_readlane_b32 s80, v73, 22 +; GFX11-NEXT: v_readlane_b32 s71, v73, 21 +; GFX11-NEXT: v_readlane_b32 s70, v73, 20 +; GFX11-NEXT: v_readlane_b32 s69, v73, 19 +; GFX11-NEXT: v_readlane_b32 s68, v73, 18 +; GFX11-NEXT: v_readlane_b32 s67, v73, 17 +; GFX11-NEXT: v_readlane_b32 s66, v73, 16 +; GFX11-NEXT: v_readlane_b32 s65, v73, 15 +; GFX11-NEXT: v_readlane_b32 s64, v73, 14 +; GFX11-NEXT: v_readlane_b32 s55, v73, 13 +; GFX11-NEXT: v_readlane_b32 s54, v73, 12 +; GFX11-NEXT: v_readlane_b32 s53, v73, 11 +; GFX11-NEXT: v_readlane_b32 s52, v73, 10 +; GFX11-NEXT: v_readlane_b32 s51, v73, 9 +; GFX11-NEXT: v_readlane_b32 s50, v73, 8 +; GFX11-NEXT: v_readlane_b32 s49, v73, 7 +; GFX11-NEXT: v_readlane_b32 s48, v73, 6 +; GFX11-NEXT: v_readlane_b32 s39, v73, 5 +; GFX11-NEXT: v_readlane_b32 s38, v73, 4 +; GFX11-NEXT: v_readlane_b32 s37, v73, 3 +; GFX11-NEXT: v_readlane_b32 s36, v73, 2 +; GFX11-NEXT: v_readlane_b32 s35, v73, 1 +; GFX11-NEXT: v_readlane_b32 s34, v73, 0 ; GFX11-NEXT: s_or_saveexec_b32 s0, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-NEXT: scratch_load_b32 v73, off, s32 offset:68 ; GFX11-NEXT: scratch_load_b32 v74, off, s32 offset:72 ; GFX11-NEXT: scratch_load_b32 v75, off, s32 offset:76 ; GFX11-NEXT: scratch_load_b32 v76, off, s32 offset:80 -; GFX11-NEXT: scratch_load_b32 v77, off, s32 offset:84 ; GFX11-NEXT: s_mov_b32 exec_lo, s0 ; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_setpc_b64 s[30:31] @@ -114372,22 +114527,22 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:388 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 @@ -114406,33 +114561,33 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:112 ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:128 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:128 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:136 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:144 ; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 ; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:160 ; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:168 ; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:184 -; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v1 -; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v3 -; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v5 -; SI-NEXT: v_lshlrev_b32_e32 v40, 24, v7 -; SI-NEXT: v_lshlrev_b32_e32 v53, 8, v9 -; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v11 -; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v13 -; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v15 -; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v17 -; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v19 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v21 -; SI-NEXT: v_lshlrev_b32_e32 v58, 24, v23 -; SI-NEXT: v_lshlrev_b32_e32 v56, 8, v25 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v27 -; SI-NEXT: v_lshlrev_b32_e32 v46, 8, v29 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:184 +; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v1 +; SI-NEXT: v_lshlrev_b32_e32 v54, 24, v3 +; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v5 +; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v7 +; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v9 +; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v11 +; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v13 +; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v15 +; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v17 +; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v19 +; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v21 +; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v23 +; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v25 +; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v27 +; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v29 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30 -; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v0 -; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v2 +; SI-NEXT: v_lshlrev_b32_e32 v61, 24, v0 +; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v4 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) @@ -114489,19 +114644,19 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v33 +; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v32 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v35 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v33 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v36 +; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v35 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v39 @@ -114509,19 +114664,19 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v49 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill @@ -114532,7 +114687,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v51 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v52 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v40 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 @@ -114540,27 +114695,27 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:188 -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:44 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:36 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:28 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:20 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:12 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:4 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:108 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:100 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:92 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:84 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:76 -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68 -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:60 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:44 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:28 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:20 +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:12 +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:4 +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:108 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:100 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:92 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:84 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:76 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:60 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 @@ -114569,15 +114724,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:204 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:212 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:224 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 @@ -114591,24 +114746,24 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 @@ -114617,29 +114772,26 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:252 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:260 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:268 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:268 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:276 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 @@ -114648,29 +114800,29 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:292 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 @@ -114679,29 +114831,29 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:332 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:340 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:352 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 @@ -114710,239 +114862,307 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:348 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:356 ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v3 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 -; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v3 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:364 ; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_lshlrev_b32_e32 v0, 24, v0 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:372 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB74_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v9, 0xff, v56 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v9, 0xff, v49 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v0, v0, v54 -; SI-NEXT: v_or_b32_e32 v2, v2, v41 +; SI-NEXT: v_or_b32_e32 v0, v0, v37 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 -; SI-NEXT: v_or_b32_e32 v3, v40, v3 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v9, v10, v9 ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v53, v2 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_or_b32_e32 v3, v47, v3 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 +; SI-NEXT: v_or_b32_e32 v4, v45, v4 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v60, v5 +; SI-NEXT: v_or_b32_e32 v5, v41, v5 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v58, v6 +; SI-NEXT: v_or_b32_e32 v6, v62, v6 ; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v37, v7 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v7, v48, v7 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v61, v8 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr53 +; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr60 +; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 +; SI-NEXT: v_or_b32_e32 v1, v1, v58 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v2, v2, v53 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v34, v3 +; SI-NEXT: v_or_b32_e32 v2, v2, v52 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v55, v8 -; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v3, v48 +; SI-NEXT: v_or_b32_e32 v3, v3, v36 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 -; SI-NEXT: v_or_b32_e32 v4, v4, v62 +; SI-NEXT: v_or_b32_e32 v4, v4, v43 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 -; SI-NEXT: v_or_b32_e32 v5, v5, v38 +; SI-NEXT: v_or_b32_e32 v5, v5, v63 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_or_b32_e32 v6, v6, v56 +; SI-NEXT: v_or_b32_e32 v6, v6, v34 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; kill: killed $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v7, v7, v46 +; SI-NEXT: v_or_b32_e32 v7, v7, v38 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xff, v35 -; SI-NEXT: v_or_b32_e32 v8, v8, v44 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v57 +; SI-NEXT: v_or_b32_e32 v8, v8, v55 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: v_and_b32_e32 v9, 0xff, v33 +; SI-NEXT: v_and_b32_e32 v9, 0xff, v46 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xff, v52 +; SI-NEXT: v_and_b32_e32 v10, 0xff, v51 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 ; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xff, v63 -; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr52 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: v_and_b32_e32 v10, 0xff, v44 +; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xff, v39 +; SI-NEXT: v_and_b32_e32 v11, 0xff, v50 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xff, v61 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: v_and_b32_e32 v11, 0xff, v42 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xff, v59 +; SI-NEXT: v_and_b32_e32 v12, 0xff, v35 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xff, v51 -; SI-NEXT: ; implicit-def: $vgpr59 -; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: v_and_b32_e32 v12, 0xff, v40 +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xff, v57 +; SI-NEXT: v_and_b32_e32 v13, 0xff, v49 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xff, v47 -; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: v_and_b32_e32 v13, 0xff, v39 +; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v50 +; SI-NEXT: v_and_b32_e32 v14, 0xff, v33 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v45 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr45 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v14, 0xff, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v14, v14, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v36 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v60 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -114960,204 +115180,299 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 +; SI-NEXT: v_and_b32_e32 v25, 0xff, v59 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; SI-NEXT: v_or_b32_e32 v26, v27, v26 -; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v26, v26, v27 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_or_b32_e32 v27, v28, v27 -; SI-NEXT: v_or_b32_e32 v26, v26, v27 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_or_b32_e32 v28, v29, v28 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; kill: killed $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v25, v25, v26 +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_or_b32_e32 v26, v27, v26 +; SI-NEXT: v_or_b32_e32 v25, v25, v26 +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v26, v26, v27 +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; SI-NEXT: v_or_b32_e32 v27, v28, v27 +; SI-NEXT: v_or_b32_e32 v26, v26, v27 +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_or_b32_e32 v28, v29, v28 +; SI-NEXT: v_or_b32_e32 v27, v27, v28 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v28, v28, v29 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: v_or_b32_e32 v28, v28, v29 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v30, v30, v31 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_or_b32_e32 v30, v30, v31 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v31, v31, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v32, 0xff, v32 -; SI-NEXT: v_or_b32_e32 v31, v31, v43 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_or_b32_e32 v32, v33, v32 ; SI-NEXT: v_or_b32_e32 v31, v31, v32 ; SI-NEXT: ; implicit-def: $vgpr32 @@ -115169,351 +115484,189 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: .LBB74_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB74_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; SI-NEXT: s_movk_i32 s6, 0x300 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v49 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v56 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: s_movk_i32 s6, 0x300 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b32 s7, 0x3000000 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v54, v0 +; SI-NEXT: v_or_b32_e32 v0, v37, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v40, v2 +; SI-NEXT: v_or_b32_e32 v2, v53, v2 ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v34, v3 +; SI-NEXT: v_or_b32_e32 v3, v47, v3 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v4, v45, v4 ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v60, v5 -; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_or_b32_e32 v5, v41, v5 +; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v58, v6 -; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_or_b32_e32 v6, v62, v6 +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v37, v7 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v7, v48, v7 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v61, v8 ; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v0 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_or_b32_e32 v1, v58, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v55, v8 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_or_b32_e32 v2, v53, v2 +; SI-NEXT: v_or_b32_e32 v2, v52, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v48, v3 +; SI-NEXT: v_or_b32_e32 v3, v36, v3 ; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v3, vcc, s7, v3 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 -; SI-NEXT: v_or_b32_e32 v4, v62, v4 +; SI-NEXT: v_or_b32_e32 v4, v43, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v4, vcc, s7, v4 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 -; SI-NEXT: v_or_b32_e32 v5, v38, v5 +; SI-NEXT: v_or_b32_e32 v5, v63, v5 ; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v5, vcc, s7, v5 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_or_b32_e32 v6, v56, v6 +; SI-NEXT: v_or_b32_e32 v6, v34, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v6, vcc, s7, v6 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v7, v46, v7 +; SI-NEXT: v_or_b32_e32 v7, v38, v7 ; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v35 +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v57 ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 -; SI-NEXT: v_or_b32_e32 v8, v44, v8 +; SI-NEXT: v_or_b32_e32 v8, v55, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v33 +; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v46 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v52 +; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v51 ; SI-NEXT: v_and_b32_e32 v10, 0xff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 @@ -115521,15 +115674,14 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v63 +; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v10, 0xff, v10 ; SI-NEXT: v_add_i32_e32 v7, vcc, s7, v7 ; SI-NEXT: v_add_i32_e32 v8, vcc, s7, v8 ; SI-NEXT: v_add_i32_e32 v9, vcc, s7, v9 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v39 +; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v50 ; SI-NEXT: v_and_b32_e32 v11, 0xff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 @@ -115537,12 +115689,12 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v61 +; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v11, 0xff, v11 ; SI-NEXT: v_add_i32_e32 v10, vcc, s7, v10 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v59 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v35 ; SI-NEXT: v_and_b32_e32 v12, 0xff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 @@ -115550,12 +115702,12 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v51 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v40 ; SI-NEXT: v_and_b32_e32 v12, 0xff, v12 ; SI-NEXT: v_add_i32_e32 v11, vcc, s7, v11 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v57 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v49 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 @@ -115563,12 +115715,12 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v39 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_add_i32_e32 v12, vcc, s7, v12 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v50 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 @@ -115576,12 +115728,14 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v45 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v32 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_add_i32_e32 v13, vcc, s7, v13 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v36 +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v60 ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 @@ -115613,7 +115767,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115622,7 +115776,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 ; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v16, vcc, s7, v16 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -115630,7 +115784,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v17, v18, v17 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115639,7 +115793,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_or_b32_e32 v17, v18, v17 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v17, vcc, s7, v17 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -115647,7 +115801,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v18, 0xff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v18, v19, v18 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115656,7 +115810,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v18, vcc, s7, v18 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -115664,7 +115818,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115673,7 +115827,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s7, v19 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -115681,7 +115835,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v20, v21, v20 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v20 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115690,7 +115844,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v20, vcc, s7, v20 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -115698,7 +115852,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v21, 0xff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v21, v22, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, s6, v21 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115707,7 +115861,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 ; SI-NEXT: v_or_b32_e32 v21, v22, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, s7, v21 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -115715,7 +115869,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v22, 0xff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v22, v23, v22 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v22 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115724,15 +115878,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: v_or_b32_e32 v22, v23, v22 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, s7, v22 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23 ; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v23, v24, v23 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, s6, v23 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115741,32 +115895,30 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, s7, v23 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v24, v25, v24 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 +; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v59 ; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 +; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v24, vcc, s7, v24 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v25, v26, v25 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115775,15 +115927,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, s7, v25 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v26, v27, v26 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115792,15 +115944,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, s7, v26 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v27, v28, v27 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115809,15 +115961,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, s7, v27 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v28, v29, v28 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115826,15 +115978,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, s7, v28 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v29, v30, v29 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v29, vcc, s6, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115843,15 +115995,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v29, vcc, s7, v29 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30 ; SI-NEXT: v_and_b32_e32 v30, 0xff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v30, v31, v30 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v30, vcc, s6, v30 ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -115860,19 +116012,21 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_or_b32_e32 v30, v31, v30 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v30 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v31, vcc, 3, v31 ; SI-NEXT: v_and_b32_e32 v31, 0xff, v31 ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v31, v32, v31 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v31, vcc, 0x300, v31 +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v32, vcc, 3, v32 -; SI-NEXT: v_or_b32_e32 v31, v43, v31 ; SI-NEXT: v_and_b32_e32 v32, 0xff, v32 -; SI-NEXT: v_add_i32_e32 v31, vcc, 0x300, v31 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_or_b32_e32 v32, v33, v32 ; SI-NEXT: v_or_b32_e32 v31, v32, v31 ; SI-NEXT: v_add_i32_e32 v31, vcc, 0x3000000, v31 @@ -115916,11 +116070,11 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill @@ -115939,13 +116093,13 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 @@ -115965,20 +116119,20 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:72 ; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:68 ; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:64 -; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:60 -; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:56 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:48 +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:60 +; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:56 +; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:52 +; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:48 ; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:44 ; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:40 ; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:36 ; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:32 -; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:28 -; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:24 -; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:20 -; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:16 +; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:28 +; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:24 +; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:20 +; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:16 ; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:12 -; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:8 +; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:8 ; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:4 ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 @@ -116011,19 +116165,19 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill @@ -116097,25 +116251,25 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:348 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:344 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:340 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill @@ -116127,19 +116281,19 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:324 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:148 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill @@ -116180,18 +116334,18 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB74_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b32 s6, 0xc0c0004 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v9, v33, v62, s6 +; VI-NEXT: v_perm_b32 v9, v33, v32, s6 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_perm_b32 v10, v63, v60, s6 +; VI-NEXT: v_perm_b32 v10, v61, v60, s6 ; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_perm_b32 v11, v53, v58, s6 +; VI-NEXT: v_perm_b32 v11, v53, v52, s6 ; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; VI-NEXT: v_perm_b32 v12, v51, v56, s6 +; VI-NEXT: v_perm_b32 v12, v57, v56, s6 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_perm_b32 v13, v37, v36, s6 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -116200,12 +116354,11 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v15, v49, v48, s6 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; implicit-def: $vgpr63 +; VI-NEXT: ; implicit-def: $vgpr61 ; VI-NEXT: ; implicit-def: $vgpr60 ; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 @@ -116215,25 +116368,25 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v0, v1, v0, s6 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v16, v17, v16, s6 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s6 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s6 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v2, v1, s6 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) @@ -116278,28 +116431,28 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v6, v6, v7 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v8, v8, v41, s6 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_perm_b32 v8, v55, v34, s6 +; VI-NEXT: v_perm_b32 v8, v55, v63, s6 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 -; VI-NEXT: v_perm_b32 v9, v61, v32, s6 +; VI-NEXT: v_perm_b32 v9, v34, v62, s6 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 ; VI-NEXT: v_perm_b32 v10, v59, v54, s6 ; VI-NEXT: v_or_b32_e32 v10, v10, v11 -; VI-NEXT: v_perm_b32 v11, v57, v52, s6 +; VI-NEXT: v_perm_b32 v11, v51, v58, s6 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 ; VI-NEXT: v_perm_b32 v12, v47, v38, s6 ; VI-NEXT: v_or_b32_e32 v12, v12, v13 @@ -116313,12 +116466,13 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; VI-NEXT: ; implicit-def: $vgpr41 ; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr61 +; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr59 ; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr35 @@ -116335,22 +116489,22 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v17, v18, v17, s6 ; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; VI-NEXT: v_or_b32_e32 v16, v16, v17 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v17, v18, v17, s6 ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v19, v18, s6 ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; VI-NEXT: v_or_b32_e32 v17, v17, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v19, v18, s6 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v19, v20, v19, s6 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 @@ -116399,18 +116553,18 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v23, v24, v23, s6 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v24, v25, v24, s6 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v24, v25, v24, s6 ; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v25, v26, v25, s6 ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 @@ -116683,25 +116837,24 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_cbranch_execz .LBB74_4 ; VI-NEXT: ; %bb.3: ; %cmp.true ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload ; VI-NEXT: v_mov_b32_e32 v31, 0x300 ; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v41 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32 ; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v60 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58 +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52 ; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v56 ; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v36 ; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v44 ; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v48 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload @@ -116709,79 +116862,82 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_add_u16_e32 v0, 3, v0 ; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_lshlrev_b16_e32 v20, 8, v20 ; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 +; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5 ; VI-NEXT: v_lshlrev_b16_e32 v23, 8, v23 -; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26 +; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 ; VI-NEXT: s_waitcnt vmcnt(12) -; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 +; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; VI-NEXT: s_waitcnt vmcnt(11) -; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 +; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 ; VI-NEXT: s_waitcnt vmcnt(10) -; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 +; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: s_waitcnt vmcnt(9) -; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 +; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 ; VI-NEXT: s_waitcnt vmcnt(8) -; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 ; VI-NEXT: s_waitcnt vmcnt(7) -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 +; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; VI-NEXT: s_waitcnt vmcnt(6) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 +; VI-NEXT: v_lshlrev_b16_e32 v26, 8, v26 ; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 -; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v27, 8, v27 -; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: v_lshlrev_b16_e32 v29, 8, v29 -; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_lshlrev_b16_e32 v30, 8, v30 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v1, 3, v1 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_sdwa v1, v1, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v1, 3, v1 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v2, 3, v2 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v3, v3, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_sdwa v2, v2, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_add_u16_e32 v2, 3, v2 ; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v2, 3, v2 +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v3, 3, v3 @@ -116837,21 +116993,21 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v6, 0x300, v6 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v7, 3, v7 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v7, v7, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v6, v6, v7 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v7, 3, v7 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v7, 0x300, v7 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v8, 3, v8 @@ -116859,17 +117015,17 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_sdwa v8, v8, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v7, v7, v8 ; VI-NEXT: v_add_u16_e32 v8, 3, v55 -; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v34 +; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v63 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 3, v33 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v8, 0x300, v8 ; VI-NEXT: v_add_u16_sdwa v9, v9, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v8, v8, v9 -; VI-NEXT: v_add_u16_e32 v9, 3, v61 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v32 +; VI-NEXT: v_add_u16_e32 v9, 3, v34 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v62 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v10, 3, v63 +; VI-NEXT: v_add_u16_e32 v10, 3, v61 ; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 0x300, v9 ; VI-NEXT: v_add_u16_sdwa v10, v10, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -116882,10 +117038,10 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_e32 v10, 0x300, v10 ; VI-NEXT: v_add_u16_sdwa v11, v11, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v10, v10, v11 -; VI-NEXT: v_add_u16_e32 v11, 3, v57 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v52 +; VI-NEXT: v_add_u16_e32 v11, 3, v51 +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58 ; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v12, 3, v51 +; VI-NEXT: v_add_u16_e32 v12, 3, v57 ; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v11, 0x300, v11 ; VI-NEXT: v_add_u16_sdwa v12, v12, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -116919,18 +117075,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v15, 0x300, v15 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_add_u16_e32 v16, 3, v16 ; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v16, v16, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v15, v15, v16 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v33 ; VI-NEXT: s_waitcnt vmcnt(2) @@ -116947,28 +117100,28 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v17, v17, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v16, v16, v17 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v17, 3, v17 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v17, 0x300, v17 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v18, 3, v18 ; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v18, v18, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v17, v17, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v18, 3, v18 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 ; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v18, 0x300, v18 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v19, 3, v19 @@ -117038,21 +117191,21 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v24, 8, v24 ; VI-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v23, 0x300, v23 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v24, 3, v24 ; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v24, v24, v31 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v24, 3, v24 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v25, 8, v25 ; VI-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v24, 0x300, v24 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u16_e32 v25, 3, v25 @@ -117200,11 +117353,11 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill @@ -117218,14 +117371,14 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 @@ -117235,23 +117388,23 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112 ; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:108 ; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:104 -; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:100 +; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:100 ; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:96 -; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:92 -; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:88 -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:84 -; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:80 +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:92 +; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:88 +; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:84 +; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:80 ; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:76 -; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:72 -; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:68 +; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:72 +; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:68 ; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:64 -; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:60 -; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:56 -; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:52 -; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:48 +; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:60 +; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:56 +; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:52 +; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:48 ; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:44 -; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:40 -; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:36 +; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:40 +; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:36 ; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:32 ; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:28 ; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:24 @@ -117288,7 +117441,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill @@ -117300,7 +117453,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill @@ -117337,7 +117490,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:380 +; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:380 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:376 ; GFX9-NEXT: s_waitcnt vmcnt(3) @@ -117359,31 +117512,31 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:364 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:360 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:356 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:352 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:348 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill @@ -117395,13 +117548,13 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:340 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill @@ -117463,46 +117616,46 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB74_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004 ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v10, v55, v32, s6 -; GFX9-NEXT: v_perm_b32 v11, v61, v60, s6 -; GFX9-NEXT: v_perm_b32 v12, v53, v38, s6 -; GFX9-NEXT: v_perm_b32 v13, v57, v56, s6 -; GFX9-NEXT: v_perm_b32 v14, v51, v34, s6 +; GFX9-NEXT: v_perm_b32 v11, v61, v54, s6 +; GFX9-NEXT: v_perm_b32 v12, v59, v38, s6 +; GFX9-NEXT: v_perm_b32 v13, v57, v52, s6 +; GFX9-NEXT: v_perm_b32 v14, v47, v34, s6 ; GFX9-NEXT: v_perm_b32 v15, v45, v50, s6 ; GFX9-NEXT: ; implicit-def: $vgpr55 ; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr59 ; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr34 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr50 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v0, v1, v0, s6 ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v16, v43, v16, s6 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -117530,7 +117683,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 @@ -117539,7 +117692,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 @@ -117562,15 +117715,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8 ; GFX9-NEXT: v_perm_b32 v9, v39, v40, s6 ; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v10, v62, v63, s6 +; GFX9-NEXT: v_perm_b32 v10, v63, v62, s6 ; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10 -; GFX9-NEXT: v_perm_b32 v11, v59, v54, s6 +; GFX9-NEXT: v_perm_b32 v11, v53, v60, s6 ; GFX9-NEXT: v_lshl_or_b32 v11, v12, 16, v11 -; GFX9-NEXT: v_perm_b32 v12, v58, v37, s6 +; GFX9-NEXT: v_perm_b32 v12, v37, v58, s6 ; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12 -; GFX9-NEXT: v_perm_b32 v13, v47, v52, s6 +; GFX9-NEXT: v_perm_b32 v13, v51, v56, s6 ; GFX9-NEXT: v_lshl_or_b32 v13, v14, 16, v13 -; GFX9-NEXT: v_perm_b32 v14, v33, v46, s6 +; GFX9-NEXT: v_perm_b32 v14, v36, v46, s6 ; GFX9-NEXT: v_lshl_or_b32 v14, v15, 16, v14 ; GFX9-NEXT: v_perm_b32 v15, v49, v44, s6 ; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15 @@ -117582,15 +117735,15 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr40 -; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr46 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr44 @@ -117610,21 +117763,21 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 ; GFX9-NEXT: v_lshl_or_b32 v17, v18, 16, v17 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s6 ; GFX9-NEXT: v_lshl_or_b32 v18, v19, 16, v18 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s6 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v20, v21, v20, s6 ; GFX9-NEXT: v_lshl_or_b32 v19, v20, 16, v19 @@ -117660,7 +117813,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 ; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6 ; GFX9-NEXT: v_lshl_or_b32 v23, v24, 16, v23 @@ -117669,7 +117822,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6 ; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v25, v26, v25, s6 ; GFX9-NEXT: v_lshl_or_b32 v24, v25, 16, v24 @@ -117733,223 +117886,223 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v32, v36, v32, s6 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: v_perm_b32 v32, v33, v32, s6 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: .LBB74_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB74_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload ; GFX9-NEXT: s_movk_i32 s6, 0x300 ; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload @@ -117957,9 +118110,9 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v48 ; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v32 -; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60 +; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54 ; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v38 -; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56 +; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52 ; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v34 ; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v50 ; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload @@ -117972,19 +118125,19 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(24) ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0 ; GFX9-NEXT: s_waitcnt vmcnt(22) ; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; GFX9-NEXT: s_waitcnt vmcnt(21) ; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18 ; GFX9-NEXT: s_waitcnt vmcnt(20) +; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21 +; GFX9-NEXT: s_waitcnt vmcnt(18) ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; GFX9-NEXT: s_waitcnt vmcnt(19) +; GFX9-NEXT: s_waitcnt vmcnt(17) ; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v18 -; GFX9-NEXT: s_waitcnt vmcnt(18) -; GFX9-NEXT: v_lshlrev_b16_e32 v21, 8, v21 ; GFX9-NEXT: s_waitcnt vmcnt(16) ; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: s_waitcnt vmcnt(15) @@ -118022,30 +118175,30 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v1, 3, v1 ; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v1, 3, v1 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2 +; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 ; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 ; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 @@ -118081,7 +118234,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v5, v5, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v4, v4, v5 ; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v5, 3, v5 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -118095,7 +118248,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -118138,39 +118291,39 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 ; GFX9-NEXT: v_add_u16_sdwa v10, v10, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v62 -; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v63 +; GFX9-NEXT: v_add_u16_e32 v10, 3, v63 +; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v62 ; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v11, 3, v61 ; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 ; GFX9-NEXT: v_add_u16_sdwa v11, v11, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX9-NEXT: v_add_u16_e32 v11, 3, v59 -; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54 +; GFX9-NEXT: v_add_u16_e32 v11, 3, v53 +; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v60 ; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v53 +; GFX9-NEXT: v_add_u16_e32 v12, 3, v59 ; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 ; GFX9-NEXT: v_add_u16_sdwa v12, v12, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v58 -; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v37 +; GFX9-NEXT: v_add_u16_e32 v12, 3, v37 +; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v58 ; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v13, 3, v57 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 ; GFX9-NEXT: v_add_u16_sdwa v13, v13, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v12, v12, v13 -; GFX9-NEXT: v_add_u16_e32 v13, 3, v47 -; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v52 +; GFX9-NEXT: v_add_u16_e32 v13, 3, v51 +; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v56 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v14, 3, v51 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v47 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 ; GFX9-NEXT: v_add_u16_sdwa v14, v14, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 -; GFX9-NEXT: v_add_u16_e32 v14, 3, v33 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v36 ; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v46 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v15, 3, v45 @@ -118188,16 +118341,13 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_e32 v15, v15, v16 ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v16, 3, v16 ; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v16, 3, v16 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v17, 3, v17 ; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -118217,8 +118367,8 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v18, v18, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v17, v17, v18 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v18, 3, v18 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -118231,14 +118381,14 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v19, v19, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v18, v18, v19 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v19, 3, v19 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v20 ; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v19, 0x300, v19 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v20, 3, v20 @@ -118294,7 +118444,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v24, 8, v24 ; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v23, 0x300, v23 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v24, 3, v24 @@ -118308,7 +118458,7 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v25, 8, v25 ; GFX9-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v24, 0x300, v24 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v25, 3, v25 @@ -118406,9 +118556,12 @@ define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v32 ; GFX9-NEXT: v_or_b32_sdwa v31, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v32, 3, v36 -; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v32, 3, v33 +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v31 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v33 +; GFX9-NEXT: v_or_b32_sdwa v32, v33, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_sdwa v32, v32, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v31, v31, v32 ; GFX9-NEXT: .LBB74_4: ; %end @@ -120239,9 +120392,7 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: v_readfirstlane_b32 s76, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 -; SI-NEXT: v_readfirstlane_b32 s46, v30 +; SI-NEXT: v_readfirstlane_b32 s42, v30 ; SI-NEXT: v_readfirstlane_b32 s6, v29 ; SI-NEXT: v_readfirstlane_b32 s7, v28 ; SI-NEXT: v_readfirstlane_b32 s8, v27 @@ -120254,36 +120405,38 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: v_readfirstlane_b32 s15, v20 ; SI-NEXT: v_readfirstlane_b32 s40, v19 ; SI-NEXT: v_readfirstlane_b32 s41, v18 -; SI-NEXT: v_readfirstlane_b32 s42, v17 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:8 -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:16 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:24 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:32 -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:40 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:48 -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:72 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:80 -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:88 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:96 +; SI-NEXT: v_readfirstlane_b32 s43, v17 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:8 +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:16 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:24 +; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:32 +; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:64 +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:80 +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:88 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:96 +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:104 +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:112 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:120 +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:128 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:104 -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:112 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:120 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:128 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:136 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:144 -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:152 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160 -; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:168 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:176 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:184 -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:192 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:200 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:208 +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:136 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:144 +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:152 +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:160 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:168 +; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:176 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:184 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:192 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:200 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:208 ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:216 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:224 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:232 @@ -120300,275 +120453,284 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:320 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:328 ; SI-NEXT: v_readfirstlane_b32 s75, v1 -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332 -; SI-NEXT: v_readfirstlane_b32 s43, v16 -; SI-NEXT: v_readfirstlane_b32 s45, v14 +; SI-NEXT: v_readfirstlane_b32 s76, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:332 +; SI-NEXT: v_readfirstlane_b32 s56, v12 ; SI-NEXT: v_readfirstlane_b32 s73, v3 -; SI-NEXT: v_readfirstlane_b32 s74, v2 ; SI-NEXT: v_readfirstlane_b32 s57, v11 -; SI-NEXT: v_readfirstlane_b32 s72, v4 -; SI-NEXT: v_readfirstlane_b32 s44, v15 +; SI-NEXT: v_readfirstlane_b32 s45, v15 +; SI-NEXT: v_readfirstlane_b32 s46, v14 +; SI-NEXT: v_readfirstlane_b32 s74, v2 +; SI-NEXT: v_readfirstlane_b32 s44, v16 ; SI-NEXT: v_readfirstlane_b32 s47, v13 -; SI-NEXT: v_readfirstlane_b32 s56, v12 ; SI-NEXT: v_readfirstlane_b32 s58, v10 ; SI-NEXT: v_readfirstlane_b32 s59, v9 ; SI-NEXT: v_readfirstlane_b32 s60, v8 ; SI-NEXT: v_readfirstlane_b32 s61, v7 ; SI-NEXT: v_readfirstlane_b32 s62, v6 ; SI-NEXT: v_readfirstlane_b32 s63, v5 +; SI-NEXT: v_readfirstlane_b32 s72, v4 ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v50 -; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v51 -; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v52 -; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v53 -; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v54 -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v55 -; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v40 -; SI-NEXT: v_lshlrev_b32_e32 v60, 8, v41 -; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v42 -; SI-NEXT: v_lshlrev_b32_e32 v41, 8, v43 -; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v46 -; SI-NEXT: v_lshlrev_b32_e32 v40, 8, v56 -; SI-NEXT: v_lshlrev_b32_e32 v55, 24, v59 -; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v61 -; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v44 -; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v45 -; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v47 -; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v57 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 -; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v30 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v29 -; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v28 +; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v35 +; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v52 +; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v53 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v54 +; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v55 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v62, 8, v40 +; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v41 +; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v42 +; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v43 +; SI-NEXT: v_lshlrev_b32_e32 v55, 8, v44 +; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v45 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v46 +; SI-NEXT: v_lshlrev_b32_e32 v34, 24, v47 +; SI-NEXT: v_lshlrev_b32_e32 v42, 8, v56 +; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v57 +; SI-NEXT: v_lshlrev_b32_e32 v54, 8, v58 +; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v59 +; SI-NEXT: v_lshlrev_b32_e32 v52, 8, v60 +; SI-NEXT: v_lshlrev_b32_e32 v51, 24, v51 +; SI-NEXT: v_lshlrev_b32_e32 v50, 8, v50 +; SI-NEXT: v_lshlrev_b32_e32 v43, 24, v39 +; SI-NEXT: v_lshlrev_b32_e32 v61, 8, v38 +; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v37 +; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v36 +; SI-NEXT: v_lshlrev_b32_e32 v56, 24, v31 +; SI-NEXT: v_lshlrev_b32_e32 v47, 8, v30 +; SI-NEXT: v_lshlrev_b32_e32 v57, 24, v29 ; SI-NEXT: s_waitcnt vmcnt(13) -; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27 +; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v28 ; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v26 +; SI-NEXT: v_lshlrev_b32_e32 v60, 24, v27 ; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25 +; SI-NEXT: v_lshlrev_b32_e32 v59, 8, v26 ; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v24 +; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v25 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v23 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v22 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v21 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v31, 8, v24 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v23 +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_lshlrev_b32_e32 v30, 8, v22 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v21 +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v20 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v19 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v18 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(9) expcnt(0) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v17 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:284 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:276 -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:268 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:260 -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:252 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292 -; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v48 -; SI-NEXT: v_lshlrev_b32_e32 v48, 8, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v34 -; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v32 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:220 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 +; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 +; SI-NEXT: v_lshlrev_b32_e32 v32, 8, v48 ; SI-NEXT: s_and_b64 s[4:5], vcc, exec -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v49 -; SI-NEXT: v_lshlrev_b32_e32 v49, 24, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v33 +; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v33 +; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v49 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 -; SI-NEXT: v_lshlrev_b32_e32 v33, 24, v31 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:196 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:188 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:180 +; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:172 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:156 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:148 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:124 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:116 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:108 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:92 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:68 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:52 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:44 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:36 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:28 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:20 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:12 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:92 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:84 +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:76 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:60 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:52 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:44 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:36 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:28 +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:20 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:12 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:4 -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; SI-NEXT: s_cbranch_scc0 .LBB75_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: s_and_b32 s4, s42, 0xff +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_and_b32 s4, s46, 0xff -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v31 ; SI-NEXT: v_or_b32_e32 v0, s4, v0 -; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v11, v3 +; SI-NEXT: v_or_b32_e32 v1, v11, v1 ; SI-NEXT: v_or_b32_e32 v11, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v30 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v10 -; SI-NEXT: v_or_b32_e32 v0, v0, v5 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v10 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v9 +; SI-NEXT: v_or_b32_e32 v0, v0, v3 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v12, v1 +; SI-NEXT: v_or_b32_e32 v12, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v8 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v36 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v13, v1 ; SI-NEXT: v_or_b32_e32 v13, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v9 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v8 -; SI-NEXT: v_or_b32_e32 v0, v0, v4 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v7 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v6 +; SI-NEXT: v_or_b32_e32 v0, v0, v62 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v14, v1 ; SI-NEXT: v_or_b32_e32 v14, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v42 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v7 -; SI-NEXT: v_or_b32_e32 v0, v0, v60 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v5 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v4 +; SI-NEXT: v_or_b32_e32 v0, v0, v35 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v15, v1 ; SI-NEXT: v_or_b32_e32 v15, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v6 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v63 -; SI-NEXT: v_or_b32_e32 v0, v0, v41 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v46 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v49 +; SI-NEXT: v_or_b32_e32 v0, v0, v55 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v16, v1 ; SI-NEXT: v_or_b32_e32 v16, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v61 +; SI-NEXT: v_mov_b32_e32 v49, v37 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v37 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xff, v17 -; SI-NEXT: v_or_b32_e32 v0, v0, v40 +; SI-NEXT: v_or_b32_e32 v0, v0, v63 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v55, v1 +; SI-NEXT: v_or_b32_e32 v1, v34, v1 ; SI-NEXT: v_or_b32_e32 v17, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v44 -; SI-NEXT: v_mov_b32_e32 v55, v54 -; SI-NEXT: v_or_b32_e32 v0, v0, v54 -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v34, v42 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v53, v1 -; SI-NEXT: v_or_b32_e32 v18, v0, v1 -; SI-NEXT: v_mov_b32_e32 v53, v52 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v51, v1 -; SI-NEXT: v_mov_b32_e32 v51, v50 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v12, v2, v3 +; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_mov_b32_e32 v62, v35 +; SI-NEXT: v_mov_b32_e32 v55, v63 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 @@ -120577,229 +120739,236 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_lshl_b32 s77, s19, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s77, s5 +; SI-NEXT: s_or_b32 s77, s4, s5 +; SI-NEXT: s_and_b32 s4, s20, 0xff +; SI-NEXT: s_lshl_b32 s5, s21, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s20, 0xff -; SI-NEXT: s_lshl_b32 s77, s21, 8 -; SI-NEXT: s_or_b32 s5, s5, s77 -; SI-NEXT: s_and_b32 s77, s22, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 +; SI-NEXT: s_and_b32 s5, s22, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s78, s23, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s77, s78, s77 -; SI-NEXT: s_or_b32 s5, s5, s77 -; SI-NEXT: s_and_b32 s77, s24, 0xff -; SI-NEXT: s_lshl_b32 s78, s25, 8 -; SI-NEXT: s_or_b32 s77, s77, s78 -; SI-NEXT: s_and_b32 s78, s26, 0xff -; SI-NEXT: s_lshl_b32 s78, s78, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s78, s5 +; SI-NEXT: s_or_b32 s78, s4, s5 +; SI-NEXT: s_and_b32 s4, s24, 0xff +; SI-NEXT: s_lshl_b32 s5, s25, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s26, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s79, s27, 24 -; SI-NEXT: s_and_b32 s77, s77, 0xffff -; SI-NEXT: s_or_b32 s78, s79, s78 -; SI-NEXT: s_or_b32 s77, s77, s78 -; SI-NEXT: s_and_b32 s78, s28, 0xff -; SI-NEXT: s_lshl_b32 s79, s29, 8 -; SI-NEXT: s_or_b32 s78, s78, s79 -; SI-NEXT: s_and_b32 s79, s76, 0xff -; SI-NEXT: s_lshl_b32 s79, s79, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s79, s5 +; SI-NEXT: s_or_b32 s79, s4, s5 +; SI-NEXT: s_and_b32 s4, s28, 0xff +; SI-NEXT: s_lshl_b32 s5, s29, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s76, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s88, s75, 24 -; SI-NEXT: s_and_b32 s78, s78, 0xffff -; SI-NEXT: s_or_b32 s79, s88, s79 -; SI-NEXT: s_or_b32 s78, s78, s79 -; SI-NEXT: s_and_b32 s79, s74, 0xff -; SI-NEXT: s_lshl_b32 s88, s73, 8 -; SI-NEXT: s_or_b32 s79, s79, s88 -; SI-NEXT: s_and_b32 s88, s72, 0xff -; SI-NEXT: s_lshl_b32 s88, s88, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s88, s5 +; SI-NEXT: s_or_b32 s88, s4, s5 +; SI-NEXT: s_and_b32 s4, s74, 0xff +; SI-NEXT: s_lshl_b32 s5, s73, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s72, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; SI-NEXT: s_lshl_b32 s89, s63, 24 -; SI-NEXT: s_and_b32 s79, s79, 0xffff -; SI-NEXT: s_or_b32 s88, s89, s88 -; SI-NEXT: s_or_b32 s79, s79, s88 -; SI-NEXT: s_and_b32 s88, s62, 0xff -; SI-NEXT: s_lshl_b32 s89, s61, 8 -; SI-NEXT: s_or_b32 s88, s88, s89 -; SI-NEXT: s_and_b32 s89, s60, 0xff -; SI-NEXT: s_lshl_b32 s89, s89, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s89, s5 +; SI-NEXT: s_or_b32 s89, s4, s5 +; SI-NEXT: s_and_b32 s4, s62, 0xff +; SI-NEXT: s_lshl_b32 s5, s61, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s60, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s90, s59, 24 -; SI-NEXT: s_and_b32 s88, s88, 0xffff -; SI-NEXT: s_or_b32 s89, s90, s89 -; SI-NEXT: s_or_b32 s88, s88, s89 -; SI-NEXT: s_and_b32 s89, s58, 0xff -; SI-NEXT: s_lshl_b32 s90, s57, 8 -; SI-NEXT: s_or_b32 s89, s89, s90 -; SI-NEXT: s_and_b32 s90, s56, 0xff -; SI-NEXT: s_lshl_b32 s90, s90, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s90, s5 +; SI-NEXT: s_or_b32 s90, s4, s5 +; SI-NEXT: s_and_b32 s4, s58, 0xff +; SI-NEXT: s_lshl_b32 s5, s57, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s56, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s91, s47, 24 -; SI-NEXT: s_and_b32 s89, s89, 0xffff -; SI-NEXT: s_or_b32 s90, s91, s90 -; SI-NEXT: s_or_b32 s89, s89, s90 -; SI-NEXT: s_and_b32 s90, s45, 0xff -; SI-NEXT: s_lshl_b32 s91, s44, 8 -; SI-NEXT: s_or_b32 s90, s90, s91 -; SI-NEXT: s_and_b32 s91, s43, 0xff -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v54 -; SI-NEXT: v_or_b32_e32 v0, v0, v52 -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s91, s5 +; SI-NEXT: s_or_b32 s91, s4, s5 +; SI-NEXT: s_and_b32 s4, s46, 0xff +; SI-NEXT: s_lshl_b32 s5, s45, 8 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v37 +; SI-NEXT: v_or_b32_e32 v0, v0, v42 +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v18, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v40 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v19 +; SI-NEXT: v_or_b32_e32 v0, v0, v54 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v53, v1 +; SI-NEXT: v_mov_b32_e32 v54, v53 ; SI-NEXT: v_or_b32_e32 v19, v0, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v36 +; SI-NEXT: v_or_b32_e32 v0, v0, v52 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v49, v1 -; SI-NEXT: v_mov_b32_e32 v49, v48 -; SI-NEXT: s_lshl_b32 s91, s91, 16 -; SI-NEXT: s_lshl_b32 s92, s42, 24 -; SI-NEXT: s_and_b32 s90, s90, 0xffff -; SI-NEXT: s_or_b32 s91, s92, s91 -; SI-NEXT: s_or_b32 s90, s90, s91 -; SI-NEXT: s_and_b32 s91, s41, 0xff -; SI-NEXT: s_lshl_b32 s92, s40, 8 -; SI-NEXT: s_or_b32 s91, s91, s92 -; SI-NEXT: s_and_b32 s92, s15, 0xff -; SI-NEXT: s_lshl_b32 s92, s92, 16 -; SI-NEXT: s_lshl_b32 s93, s14, 24 -; SI-NEXT: s_and_b32 s91, s91, 0xffff -; SI-NEXT: s_or_b32 s92, s93, s92 -; SI-NEXT: s_or_b32 s91, s91, s92 -; SI-NEXT: s_and_b32 s92, s13, 0xff -; SI-NEXT: s_lshl_b32 s93, s12, 8 -; SI-NEXT: s_or_b32 s92, s92, s93 -; SI-NEXT: s_and_b32 s93, s11, 0xff -; SI-NEXT: s_lshl_b32 s93, s93, 16 -; SI-NEXT: s_lshl_b32 s94, s10, 24 -; SI-NEXT: s_and_b32 s92, s92, 0xffff -; SI-NEXT: s_or_b32 s93, s94, s93 -; SI-NEXT: s_or_b32 s92, s92, s93 -; SI-NEXT: s_and_b32 s93, s9, 0xff -; SI-NEXT: s_lshl_b32 s94, s8, 8 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: s_and_b32 s94, s7, 0xff -; SI-NEXT: s_lshl_b32 s94, s94, 16 -; SI-NEXT: s_lshl_b32 s95, s6, 24 -; SI-NEXT: s_and_b32 s93, s93, 0xffff -; SI-NEXT: s_or_b32 s94, s95, s94 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: v_mov_b32_e32 v41, v40 -; SI-NEXT: v_mov_b32_e32 v3, s78 -; SI-NEXT: v_mov_b32_e32 v4, s79 -; SI-NEXT: v_mov_b32_e32 v5, s88 -; SI-NEXT: v_mov_b32_e32 v6, s89 -; SI-NEXT: v_mov_b32_e32 v7, s90 -; SI-NEXT: v_mov_b32_e32 v8, s91 -; SI-NEXT: v_mov_b32_e32 v9, s92 -; SI-NEXT: v_mov_b32_e32 v10, s93 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v52 -; SI-NEXT: v_or_b32_e32 v0, v0, v50 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v51, v1 ; SI-NEXT: v_or_b32_e32 v20, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v38 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 +; SI-NEXT: v_or_b32_e32 v0, v0, v50 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v39, v1 -; SI-NEXT: v_mov_b32_e32 v39, v38 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v50 -; SI-NEXT: v_or_b32_e32 v0, v0, v48 -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 ; SI-NEXT: v_or_b32_e32 v21, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v48 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v22 +; SI-NEXT: v_or_b32_e32 v0, v0, v32 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v37, v1 -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v48 -; SI-NEXT: v_or_b32_e32 v0, v0, v38 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v43, v1 ; SI-NEXT: v_or_b32_e32 v22, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v39 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v23 +; SI-NEXT: v_mov_b32_e32 v52, v51 +; SI-NEXT: v_mov_b32_e32 v33, v32 +; SI-NEXT: v_or_b32_e32 v0, v0, v61 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v35, v1 -; SI-NEXT: v_mov_b32_e32 v35, v34 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v38 -; SI-NEXT: v_or_b32_e32 v0, v0, v36 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v45, v1 ; SI-NEXT: v_or_b32_e32 v23, v0, v1 +; SI-NEXT: v_mov_b32_e32 v45, v44 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v33, v1 -; SI-NEXT: v_mov_b32_e32 v33, v32 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v36 -; SI-NEXT: v_or_b32_e32 v0, v0, v34 +; SI-NEXT: v_or_b32_e32 v1, v56, v1 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s44, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s92, s43, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s92, s5 +; SI-NEXT: s_or_b32 s92, s4, s5 +; SI-NEXT: s_and_b32 s4, s41, 0xff +; SI-NEXT: s_lshl_b32 s5, s40, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s15, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s93, s14, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s93, s5 +; SI-NEXT: s_or_b32 s93, s4, s5 +; SI-NEXT: s_and_b32 s4, s13, 0xff +; SI-NEXT: s_lshl_b32 s5, s12, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s11, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s94, s10, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s94, s5 +; SI-NEXT: s_or_b32 s94, s4, s5 +; SI-NEXT: s_and_b32 s4, s9, 0xff +; SI-NEXT: s_lshl_b32 s5, s8, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s7, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s95, s6, 24 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v42 +; SI-NEXT: v_or_b32_e32 v0, v0, v44 +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v24, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v32 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v35 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v25 -; SI-NEXT: v_or_b32_e32 v0, v0, v62 +; SI-NEXT: v_or_b32_e32 v0, v0, v47 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v29, v1 +; SI-NEXT: v_or_b32_e32 v1, v57, v1 ; SI-NEXT: v_or_b32_e32 v25, v0, v1 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v53 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v58 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v28, v1 -; SI-NEXT: v_mov_b32_e32 v62, v29 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v32 -; SI-NEXT: v_or_b32_e32 v0, v0, v59 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v60, v1 ; SI-NEXT: v_or_b32_e32 v26, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v58 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v56 -; SI-NEXT: v_or_b32_e32 v0, v0, v57 +; SI-NEXT: v_mov_b32_e32 v57, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s95, s5 +; SI-NEXT: s_or_b32 s95, s4, s5 +; SI-NEXT: v_mov_b32_e32 v41, v40 +; SI-NEXT: v_mov_b32_e32 v38, v50 +; SI-NEXT: v_mov_b32_e32 v48, v39 +; SI-NEXT: v_mov_b32_e32 v43, v61 +; SI-NEXT: v_mov_b32_e32 v56, v47 +; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: v_mov_b32_e32 v3, s88 +; SI-NEXT: v_mov_b32_e32 v4, s89 +; SI-NEXT: v_mov_b32_e32 v5, s90 +; SI-NEXT: v_mov_b32_e32 v6, s91 +; SI-NEXT: v_mov_b32_e32 v7, s92 +; SI-NEXT: v_mov_b32_e32 v8, s93 +; SI-NEXT: v_mov_b32_e32 v9, s94 +; SI-NEXT: v_mov_b32_e32 v10, s95 +; SI-NEXT: v_mov_b32_e32 v61, v36 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v51 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v32 +; SI-NEXT: v_or_b32_e32 v0, v0, v59 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v27, v1 -; SI-NEXT: v_mov_b32_e32 v57, v27 +; SI-NEXT: v_mov_b32_e32 v59, v27 ; SI-NEXT: v_or_b32_e32 v27, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v47 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v43 -; SI-NEXT: v_or_b32_e32 v0, v0, v45 +; SI-NEXT: v_mov_b32_e32 v40, v37 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v63 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_or_b32_e32 v1, v28, v1 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v44 +; SI-NEXT: v_or_b32_e32 v0, v0, v31 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_mov_b32_e32 v59, v28 ; SI-NEXT: v_or_b32_e32 v28, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v0, 0xff, v46 -; SI-NEXT: v_mov_b32_e32 v45, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: v_mov_b32_e32 v47, v43 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v60, v32 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v58 +; SI-NEXT: v_or_b32_e32 v0, v0, v30 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_or_b32_e32 v1, v29, v1 ; SI-NEXT: v_or_b32_e32 v29, v0, v1 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v30, v0, v1 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -120811,53 +120980,57 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v31, v0, v1 -; SI-NEXT: v_mov_b32_e32 v0, s4 -; SI-NEXT: v_mov_b32_e32 v1, s5 -; SI-NEXT: v_mov_b32_e32 v2, s77 -; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: v_mov_b32_e32 v0, s77 +; SI-NEXT: v_mov_b32_e32 v1, s78 +; SI-NEXT: v_mov_b32_e32 v2, s79 ; SI-NEXT: s_branch .LBB75_3 ; SI-NEXT: .LBB75_2: -; SI-NEXT: v_mov_b32_e32 v55, v54 -; SI-NEXT: v_mov_b32_e32 v53, v52 -; SI-NEXT: v_mov_b32_e32 v51, v50 -; SI-NEXT: v_mov_b32_e32 v49, v48 -; SI-NEXT: v_mov_b32_e32 v39, v38 -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v62, v35 +; SI-NEXT: v_mov_b32_e32 v55, v63 +; SI-NEXT: v_mov_b32_e32 v34, v42 ; SI-NEXT: v_mov_b32_e32 v41, v40 -; SI-NEXT: v_mov_b32_e32 v35, v34 +; SI-NEXT: v_mov_b32_e32 v54, v53 +; SI-NEXT: v_mov_b32_e32 v52, v51 ; SI-NEXT: v_mov_b32_e32 v33, v32 -; SI-NEXT: v_mov_b32_e32 v62, v29 -; SI-NEXT: v_mov_b32_e32 v59, v28 -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: v_mov_b32_e32 v47, v43 -; SI-NEXT: v_mov_b32_e32 v57, v27 +; SI-NEXT: v_mov_b32_e32 v43, v61 +; SI-NEXT: v_mov_b32_e32 v45, v44 +; SI-NEXT: v_mov_b32_e32 v57, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v49, v37 +; SI-NEXT: v_mov_b32_e32 v38, v50 +; SI-NEXT: v_mov_b32_e32 v48, v39 +; SI-NEXT: v_mov_b32_e32 v56, v47 +; SI-NEXT: v_mov_b32_e32 v59, v27 ; SI-NEXT: s_mov_b64 s[4:5], -1 ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: .LBB75_3: ; %Flow -; SI-NEXT: v_mov_b32_e32 v43, v58 -; SI-NEXT: v_mov_b32_e32 v58, v33 -; SI-NEXT: v_mov_b32_e32 v33, v37 -; SI-NEXT: v_mov_b32_e32 v34, v39 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v39, v52 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload ; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] +; SI-NEXT: v_mov_b32_e32 v47, v33 ; SI-NEXT: s_cbranch_vccnz .LBB75_5 ; SI-NEXT: ; %bb.4: ; %cmp.true -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: s_add_i32 s46, s46, 3 -; SI-NEXT: s_and_b32 s4, s46, 0xff -; SI-NEXT: v_mov_b32_e32 v32, v35 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: s_add_i32 s42, s42, 3 +; SI-NEXT: s_and_b32 s4, s42, 0xff +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v33, v48 ; SI-NEXT: s_add_i32 s16, s16, 3 ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_add_i32 s18, s18, 3 @@ -120877,8 +121050,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_add_i32 s56, s56, 3 ; SI-NEXT: s_and_b32 s22, s56, 0xff ; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: s_add_i32 s45, s45, 3 -; SI-NEXT: s_add_i32 s43, s43, 3 +; SI-NEXT: s_add_i32 s46, s46, 3 +; SI-NEXT: s_add_i32 s44, s44, 3 ; SI-NEXT: s_add_i32 s41, s41, 3 ; SI-NEXT: s_add_i32 s13, s13, 3 ; SI-NEXT: s_add_i32 s9, s9, 3 @@ -120911,24 +121084,35 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_or_b32 s6, s6, s8 ; SI-NEXT: s_add_i32 s10, s10, 0x3000000 ; SI-NEXT: s_add_i32 s6, s6, 0x3000000 -; SI-NEXT: v_mov_b32_e32 v9, s10 ; SI-NEXT: v_mov_b32_e32 v10, s6 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v1, s4, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v11, vcc, 0x3000000, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v41 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_and_b32 s16, s18, 0xff @@ -120994,25 +121178,30 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_and_b32 s20, s20, 0xffff ; SI-NEXT: s_or_b32 s21, s21, s22 ; SI-NEXT: s_or_b32 s20, s21, s20 -; SI-NEXT: s_and_b32 s21, s45, 0xff -; SI-NEXT: s_lshl_b32 s22, s44, 8 +; SI-NEXT: s_and_b32 s21, s46, 0xff +; SI-NEXT: s_lshl_b32 s22, s45, 8 ; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: s_and_b32 s23, s43, 0xff +; SI-NEXT: s_and_b32 s23, s44, 0xff ; SI-NEXT: s_addk_i32 s21, 0x300 -; SI-NEXT: s_lshl_b32 s22, s42, 24 +; SI-NEXT: s_lshl_b32 s22, s43, 24 ; SI-NEXT: s_lshl_b32 s23, s23, 16 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; SI-NEXT: s_and_b32 s22, s41, 0xff -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v1, v52, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x300, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: s_or_b32 s21, s22, s21 +; SI-NEXT: s_and_b32 s22, s41, 0xff ; SI-NEXT: s_lshl_b32 s23, s40, 8 ; SI-NEXT: s_or_b32 s22, s23, s22 ; SI-NEXT: s_addk_i32 s22, 0x300 @@ -121027,180 +121216,82 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_add_i32 s20, s20, 0x3000000 ; SI-NEXT: s_add_i32 s21, s21, 0x3000000 ; SI-NEXT: s_add_i32 s14, s14, 0x3000000 -; SI-NEXT: v_mov_b32_e32 v4, s18 -; SI-NEXT: v_mov_b32_e32 v5, s19 -; SI-NEXT: v_mov_b32_e32 v6, s20 -; SI-NEXT: v_mov_b32_e32 v7, s21 -; SI-NEXT: v_mov_b32_e32 v8, s14 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_add_i32_e32 v12, vcc, 0x3000000, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v39, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_mov_b32_e32 v3, s17 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v37, v0 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_or_b32_e32 v0, v42, v0 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v54, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v61 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v41, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v55, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v54 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v53, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_or_b32_e32 v1, v39, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v19, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v52 +; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v36, v2 +; SI-NEXT: v_add_i32_e32 v2, vcc, 0x300, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_add_i32_e32 v13, vcc, 0x3000000, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v51, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 +; SI-NEXT: v_or_b32_e32 v0, v38, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v20, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v50 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v49, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v21, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v48 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v34, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 +; SI-NEXT: v_or_b32_e32 v0, v47, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 +; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v22, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v38 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v33, v0 +; SI-NEXT: v_or_b32_e32 v0, v43, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -121210,12 +121301,12 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v23, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v36 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: v_or_b32_e32 v0, v32, v0 +; SI-NEXT: v_or_b32_e32 v0, v45, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -121225,79 +121316,107 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v24, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v35 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v0, v56, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v62, v1 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v25, vcc, 0x3000000, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v60 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v53 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v0, v57, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v59, v1 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v26, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v51 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v43 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v32 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v57, v1 +; SI-NEXT: v_or_b32_e32 v1, v59, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v27, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v3, vcc, 0x300, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v63 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v45, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v28, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v58 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v14, vcc, 0x3000000, v3 +; SI-NEXT: v_mov_b32_e32 v3, s17 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 +; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 +; SI-NEXT: v_or_b32_e32 v4, v62, v4 +; SI-NEXT: v_add_i32_e32 v4, vcc, 0x300, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v46 +; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 +; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v4 +; SI-NEXT: v_mov_b32_e32 v4, s18 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 @@ -121306,33 +121425,76 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: v_add_i32_e32 v29, vcc, 0x3000000, v0 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v5, vcc, 0x300, v5 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v49 +; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 +; SI-NEXT: v_or_b32_e32 v6, v55, v6 +; SI-NEXT: v_add_i32_e32 v6, vcc, 0x300, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_add_i32_e32 v16, vcc, 0x3000000, v5 +; SI-NEXT: v_mov_b32_e32 v5, s19 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: v_add_i32_e32 v30, vcc, 0x3000000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v40 +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_or_b32_e32 v7, v34, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 0x300, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_add_i32_e32 v17, vcc, 0x3000000, v6 +; SI-NEXT: v_mov_b32_e32 v6, s20 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x300, v0 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v9, v8 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_add_i32_e32 v18, vcc, 0x3000000, v7 +; SI-NEXT: v_mov_b32_e32 v7, s21 +; SI-NEXT: v_mov_b32_e32 v8, s14 +; SI-NEXT: v_mov_b32_e32 v9, s10 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 @@ -121360,7 +121522,7 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v128i8_to_v16f64_scalar: @@ -121612,18 +121774,18 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -121853,11 +122015,11 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: ; %bb.4: ; %cmp.true ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v0, s17 -; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; VI-NEXT: v_mov_b32_e32 v9, 0xc0c0004 ; VI-NEXT: s_add_i32 s18, s18, 3 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_perm_b32 v0, s16, v0, v11 -; VI-NEXT: v_perm_b32 v1, s18, v1, v11 +; VI-NEXT: v_perm_b32 v0, s16, v0, v9 +; VI-NEXT: v_perm_b32 v1, s18, v1, v9 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -121865,8 +122027,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v1, s21 ; VI-NEXT: s_add_i32 s22, s22, 3 ; VI-NEXT: v_mov_b32_e32 v2, s23 -; VI-NEXT: v_perm_b32 v1, s20, v1, v11 -; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v9 +; VI-NEXT: v_perm_b32 v2, s22, v2, v9 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -121874,8 +122036,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: s_add_i32 s26, s26, 3 ; VI-NEXT: v_mov_b32_e32 v3, s27 -; VI-NEXT: v_perm_b32 v2, s24, v2, v11 -; VI-NEXT: v_perm_b32 v3, s26, v3, v11 +; VI-NEXT: v_perm_b32 v2, s24, v2, v9 +; VI-NEXT: v_perm_b32 v3, s26, v3, v9 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x300, v2 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -121883,8 +122045,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v3, s29 ; VI-NEXT: s_add_i32 s76, s76, 3 ; VI-NEXT: v_mov_b32_e32 v4, s75 -; VI-NEXT: v_perm_b32 v3, s28, v3, v11 -; VI-NEXT: v_perm_b32 v4, s76, v4, v11 +; VI-NEXT: v_perm_b32 v3, s28, v3, v9 +; VI-NEXT: v_perm_b32 v4, s76, v4, v9 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x300, v3 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -121892,8 +122054,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v4, s73 ; VI-NEXT: s_add_i32 s72, s72, 3 ; VI-NEXT: v_mov_b32_e32 v5, s63 -; VI-NEXT: v_perm_b32 v4, s74, v4, v11 -; VI-NEXT: v_perm_b32 v5, s72, v5, v11 +; VI-NEXT: v_perm_b32 v4, s74, v4, v9 +; VI-NEXT: v_perm_b32 v5, s72, v5, v9 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x300, v4 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -121901,8 +122063,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v5, s61 ; VI-NEXT: s_add_i32 s60, s60, 3 ; VI-NEXT: v_mov_b32_e32 v6, s59 -; VI-NEXT: v_perm_b32 v5, s62, v5, v11 -; VI-NEXT: v_perm_b32 v6, s60, v6, v11 +; VI-NEXT: v_perm_b32 v5, s62, v5, v9 +; VI-NEXT: v_perm_b32 v6, s60, v6, v9 ; VI-NEXT: v_add_u32_e32 v5, vcc, 0x300, v5 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -121910,8 +122072,8 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v6, s57 ; VI-NEXT: s_add_i32 s56, s56, 3 ; VI-NEXT: v_mov_b32_e32 v7, s47 -; VI-NEXT: v_perm_b32 v6, s58, v6, v11 -; VI-NEXT: v_perm_b32 v7, s56, v7, v11 +; VI-NEXT: v_perm_b32 v6, s58, v6, v9 +; VI-NEXT: v_perm_b32 v7, s56, v7, v9 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x300, v6 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 @@ -121919,38 +122081,38 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_mov_b32_e32 v7, s45 ; VI-NEXT: s_add_i32 s44, s44, 3 ; VI-NEXT: v_mov_b32_e32 v8, s43 -; VI-NEXT: v_perm_b32 v7, s46, v7, v11 -; VI-NEXT: v_perm_b32 v8, s44, v8, v11 +; VI-NEXT: v_perm_b32 v7, s46, v7, v9 +; VI-NEXT: v_perm_b32 v8, s44, v8, v9 ; VI-NEXT: v_add_u32_e32 v7, vcc, 0x300, v7 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s42, s42, 3 ; VI-NEXT: v_mov_b32_e32 v8, s41 ; VI-NEXT: s_add_i32 s40, s40, 3 -; VI-NEXT: v_mov_b32_e32 v9, s15 -; VI-NEXT: v_perm_b32 v8, s42, v8, v11 -; VI-NEXT: v_perm_b32 v9, s40, v9, v11 +; VI-NEXT: v_mov_b32_e32 v10, s15 +; VI-NEXT: v_perm_b32 v8, s42, v8, v9 +; VI-NEXT: v_perm_b32 v10, s40, v10, v9 ; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v8 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; VI-NEXT: v_or_b32_sdwa v8, v10, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s14, s14, 3 -; VI-NEXT: v_mov_b32_e32 v9, s13 +; VI-NEXT: v_mov_b32_e32 v10, s13 ; VI-NEXT: s_add_i32 s12, s12, 3 -; VI-NEXT: v_mov_b32_e32 v10, s11 -; VI-NEXT: v_perm_b32 v9, s14, v9, v11 -; VI-NEXT: v_perm_b32 v10, s12, v10, v11 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_mov_b32_e32 v11, s11 +; VI-NEXT: v_perm_b32 v10, s14, v10, v9 +; VI-NEXT: v_perm_b32 v11, s12, v11, v9 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s10, s10, 3 -; VI-NEXT: v_mov_b32_e32 v10, s9 +; VI-NEXT: v_mov_b32_e32 v11, s9 ; VI-NEXT: s_add_i32 s8, s8, 3 ; VI-NEXT: v_mov_b32_e32 v12, s7 -; VI-NEXT: v_perm_b32 v10, s10, v10, v11 -; VI-NEXT: v_perm_b32 v12, s8, v12, v11 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 +; VI-NEXT: v_perm_b32 v11, s10, v11, v9 +; VI-NEXT: v_perm_b32 v12, s8, v12, v9 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload @@ -121977,8 +122139,6 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x3000000, v6 ; VI-NEXT: v_add_u32_e32 v7, vcc, 0x3000000, v7 ; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v9 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10 ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload @@ -121992,9 +122152,9 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_perm_b32 v11, s6, v12, v11 +; VI-NEXT: v_perm_b32 v9, s6, v12, v9 ; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_perm_b32 v16, v16, v17, s4 ; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v60 ; VI-NEXT: v_perm_b32 v17, v17, v18, s4 @@ -122013,93 +122173,95 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; VI-NEXT: v_perm_b32 v12, v12, v13, s4 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v54 +; VI-NEXT: v_or_b32_sdwa v12, v12, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v54 ; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v52 -; VI-NEXT: v_perm_b32 v12, v12, v53, s4 +; VI-NEXT: v_perm_b32 v9, v9, v53, s4 ; VI-NEXT: v_perm_b32 v13, v13, v51, s4 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v12 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v50 -; VI-NEXT: v_perm_b32 v13, v13, v49, s4 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13 -; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v38 -; VI-NEXT: v_perm_b32 v14, v14, v37, s4 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 -; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v34 -; VI-NEXT: v_perm_b32 v15, v15, v33, s4 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15 -; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v62 -; VI-NEXT: v_perm_b32 v16, v16, v61, s4 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16 -; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v41 -; VI-NEXT: v_perm_b32 v17, v17, v40, s4 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17 -; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v18, vcc, 3, v42 -; VI-NEXT: v_perm_b32 v18, v18, v47, s4 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18 +; VI-NEXT: v_or_b32_sdwa v13, v13, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v50 +; VI-NEXT: v_perm_b32 v9, v9, v49, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v14, v14, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v38 +; VI-NEXT: v_perm_b32 v9, v9, v37, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v15, v15, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v34 +; VI-NEXT: v_perm_b32 v9, v9, v33, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v16, v16, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v62 +; VI-NEXT: v_perm_b32 v9, v9, v61, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v17, v17, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v41 +; VI-NEXT: v_perm_b32 v9, v9, v40, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v18, v18, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v42 +; VI-NEXT: v_perm_b32 v9, v9, v47, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; VI-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v19, vcc, 3, v46 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v11 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v14 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18 +; VI-NEXT: v_or_b32_sdwa v19, v19, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v46 ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v19, v19, v20, s4 +; VI-NEXT: v_perm_b32 v9, v9, v20, s4 ; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v19 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v20 ; VI-NEXT: v_perm_b32 v20, v20, v21, s4 ; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v20, vcc, 3, v45 -; VI-NEXT: v_perm_b32 v20, v20, v44, s4 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x300, v20 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19 +; VI-NEXT: v_or_b32_sdwa v20, v20, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v45 +; VI-NEXT: v_perm_b32 v9, v9, v44, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v21 ; VI-NEXT: v_perm_b32 v21, v21, v22, s4 ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v21, vcc, 3, v43 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20 +; VI-NEXT: v_or_b32_sdwa v21, v21, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v43 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v21, v21, v22, s4 +; VI-NEXT: v_perm_b32 v9, v9, v22, s4 ; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22 ; VI-NEXT: v_perm_b32 v22, v22, v23, s4 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; VI-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v22, v22, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u32_e32 v22, vcc, 3, v22 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v22, v22, v23, s4 -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v22 +; VI-NEXT: v_perm_b32 v23, v9, v23, s4 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v23, vcc, 3, v23 -; VI-NEXT: v_perm_b32 v23, v23, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 +; VI-NEXT: v_perm_b32 v24, v9, v24, s4 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v10 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v11 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v13 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v14 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v15 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v16 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v17 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v18 +; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v19 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v20 +; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v21 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v22 +; VI-NEXT: v_add_u32_e32 v22, vcc, 0x300, v23 +; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v24 ; VI-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload @@ -122536,18 +122698,18 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s27 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -122780,21 +122942,21 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: s_add_i32 s18, s18, 3 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: s_movk_i32 s4, 0x300 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 ; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; GFX9-NEXT: v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; GFX9-NEXT: s_add_i32 s20, s20, 3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: s_add_i32 s22, s22, 3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u32_sdwa v2, v2, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s24, s24, 3 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: s_add_i32 s26, s26, 3 @@ -122887,11 +123049,11 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; GFX9-NEXT: s_waitcnt vmcnt(10) ; GFX9-NEXT: v_add_u32_e32 v14, 3, v48 ; GFX9-NEXT: v_perm_b32 v14, v14, v39, s5 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v15, 3, v36 ; GFX9-NEXT: v_perm_b32 v15, v15, v35, s5 +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload @@ -123146,10 +123308,14 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v16f64_scalar: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:332 +; GFX11-TRUE16-NEXT: ; meta instruction +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:328 +; GFX11-TRUE16-NEXT: ; meta instruction +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:324 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:320 ; GFX11-TRUE16-NEXT: s_clause 0x1f ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v32, off, s32 offset:312 ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v34, off, s32 offset:308 @@ -123270,291 +123436,280 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; GFX11-TRUE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo ; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB75_4 ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v131, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v1, s18, s19, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, v165, v162, 0xc0c0004 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3) +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v181, v177, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v167, v166, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v135, v131, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v161, v149, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v147, v144, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v145, v133, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s20, s21, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v0, s2, s3, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s0, s1, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s16, s17, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s22, s23, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s74, s73, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v3, v1 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v2, v0 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s63, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s56, s47, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s14, s13, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s58, s57, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, s6, s5, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v7, v8 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s46, s45, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s60, s59, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v55, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s26, s27, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v5, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s62, s61, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s28, s29, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4 +; GFX11-TRUE16-NEXT: v_perm_b32 v6, s24, s25, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s60, s59, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v8, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s42, s41, v10 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v9, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s44, s43, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v5, v8 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s46, s45, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s14, s13, v11 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, s10, s9, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v6, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v12, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s56, s47, v11 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v9, v8 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v11 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s44, s43, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, s40, s15, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s12, s11, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v8 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v9 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s6, s5, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v15, v13 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-TRUE16-NEXT: v_perm_b32 v13, v182, v178, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, v180, v176, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s8, s7, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v13, v14 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v15, v16 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v15, v16 -; GFX11-TRUE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v147, v144, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v17, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v19, v20 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v20 -; GFX11-TRUE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v21, v22 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v21, v22 -; GFX11-TRUE16-NEXT: v_perm_b32 v22, v99, v87, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v23, v24 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v103, v100, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v23, v24 -; GFX11-TRUE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v25, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v25, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v27, v28 -; GFX11-TRUE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s4, v179, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v12 +; GFX11-TRUE16-NEXT: v_perm_b32 v24, v102, v98, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v15, v13 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v163, v151, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v17, v14 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v18, v16 +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v150, v148, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v146, v134, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, v164, v160, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v128, v116, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v117, v113, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v16, v15 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v103, v100, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v19, v17 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v129, v118, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v21, v18 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v22, v20 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v119, v115, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v114, v112, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v132, v130, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX11-TRUE16-NEXT: v_perm_b32 v28, v70, v68, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, v20, v19 +; GFX11-TRUE16-NEXT: v_perm_b32 v27, v96, v86, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, v23, v21 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v99, v87, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, v25, v22 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, v26, v24 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v85, v82, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v83, v71, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v24, v101, v97, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX11-TRUE16-NEXT: v_perm_b32 v29, v84, v80, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX11-TRUE16-NEXT: v_perm_b32 v30, v81, v69, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, v24, v23 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v27, v25 +; GFX11-TRUE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v29, v26 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v30, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v28, v55, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v31, v49, v38, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v183, v39, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v41, v34, v32, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v29, v67, v64, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v27, v28 -; GFX11-TRUE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v30 -; GFX11-TRUE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v29, v30 -; GFX11-TRUE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v31, v183 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40 -; GFX11-TRUE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v31, v183 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v40, v41 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX11-TRUE16-NEXT: v_perm_b32 v30, v65, v53, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v40, v52, v50, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX11-TRUE16-NEXT: v_perm_b32 v42, v48, v36, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 16, v183 +; GFX11-TRUE16-NEXT: v_perm_b32 v43, v37, v33, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v41, 16, v41 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v29, v27 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v30, v28 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v40, v31 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v42, v183 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v43, v41 ; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB75_3 ; GFX11-TRUE16-NEXT: .LBB75_2: ; %cmp.true -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v7, 0xc0c0004 +; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s0, s0, 3 +; GFX11-TRUE16-NEXT: s_add_i32 s2, s2, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s16, s16, 3 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s74, s73, v7 ; GFX11-TRUE16-NEXT: s_add_i32 s18, s18, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v10 ; GFX11-TRUE16-NEXT: s_add_i32 s20, s20, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s22, s22, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s24, s24, 3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s26, s26, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-TRUE16-NEXT: s_add_i32 s28, s28, 3 -; GFX11-TRUE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s72, s72, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s62, s62, 3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v10 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v1, s2, s3, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s16, s17, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s18, s19, v7 +; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, s24, s25, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, s26, s27, v7 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s72, s63, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v6, s28, s29, v7 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v2, v3 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s62, s61, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-TRUE16-NEXT: s_add_i32 s60, s60, 3 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, s22, s23, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s72, s63, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s62, s61, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s60, s59, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s58, s57, v7 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-TRUE16-NEXT: s_add_i32 s58, s58, 3 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_add_i32 s56, s56, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s46, s46, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, s74, s73, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s44, s44, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, 3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s40, s15, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v6, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s59, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, s58, s57, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s14, s13, v10 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 ; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, 3 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, 3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, 3 ; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v7 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, s44, s43, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, s42, s41, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v4, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v6, v8 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v11, v12 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, s56, s47, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, s46, s45, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, s44, s43, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, s42, s41, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, s40, s15, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, s14, s13, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, s12, s11, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, s10, s9, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, s8, s7, v7 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, s6, s5, v7 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v7 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v8, v9 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v10, v11 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v12, v13 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v14, v15 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v16, v17 +; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 3, v167 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 3, v165 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 3, v164 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 3, v163 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 3, v161 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 3, v150 ; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v11, v12 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, s10, s9, v10 -; GFX11-TRUE16-NEXT: v_perm_b32 v10, s6, s5, v10 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 ; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10 ; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 -; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 @@ -123708,9 +123863,11 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v36, v35 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v32 ; GFX11-TRUE16-NEXT: .LBB75_3: ; %end -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload -; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:320 -; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:324 +; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:328 +; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:332 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-TRUE16-NEXT: .LBB75_4: @@ -123720,10 +123877,14 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; GFX11-FAKE16-LABEL: bitcast_v128i8_to_v16f64_scalar: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:324 +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:332 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:328 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:320 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:324 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:320 ; GFX11-FAKE16-NEXT: s_clause 0x1f ; GFX11-FAKE16-NEXT: scratch_load_u16 v32, off, s32 offset:312 ; GFX11-FAKE16-NEXT: scratch_load_u16 v34, off, s32 offset:308 @@ -123844,291 +124005,280 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; GFX11-FAKE16-NEXT: s_and_b32 s76, vcc_lo, exec_lo ; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB75_4 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v182, v178, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v165, v162, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v150, v148, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v144, v131, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, s18, s19, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v119, v115, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v102, v98, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v85, v82, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v29, v70, v68, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v11, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v165, v162, 0xc0c0004 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(3) +; GFX11-FAKE16-NEXT: v_perm_b32 v17, v181, v177, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v167, v166, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v144, v131, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v161, v149, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v147, v135, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v145, v133, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s20, s21, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v0, s2, s3, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s0, s1, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s16, s17, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s22, s23, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s74, s73, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v3, v1 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v4 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v2, v0 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s72, s63, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s56, s47, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s62, s61, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s14, s13, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s40, s15, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s10, s9, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v4 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s58, s57, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, s6, s5, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v7, v8 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s46, s45, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s60, s59, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v64, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s74, s73, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s72, s63, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v5, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s62, s61, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s28, s29, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s58, s57, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v4 +; GFX11-FAKE16-NEXT: v_perm_b32 v6, s24, s25, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s60, s59, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v40, v39, v35, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v8, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s42, s41, v10 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v9, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s44, s43, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v5, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s46, s45, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s42, s41, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s14, s13, v11 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, s10, s9, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v6, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v12, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s56, s47, v11 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v9, v8 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v12, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v13 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v180, v176, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v13, v14 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s44, s43, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, s40, s15, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s12, s11, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v8 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v12, v9 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s6, s5, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v14, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v15, v13 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v182, v178, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, v180, v176, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s8, s7, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s4, v179, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v15 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v181, v177, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v12 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v13, v14 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v163, v151, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v15, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v167, v166, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 16, v17 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v164, v160, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v14 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v15, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v16, v146, v134, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v17, v18 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v161, v149, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v147, v135, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v16 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v17, v18 -; GFX11-FAKE16-NEXT: v_perm_b32 v18, v129, v118, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v19, v20 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v145, v133, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v132, v130, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v18 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v19, v20 -; GFX11-FAKE16-NEXT: v_perm_b32 v20, v114, v112, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v21, v22 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v128, v116, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v117, v113, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v20 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v21, v22 -; GFX11-FAKE16-NEXT: v_perm_b32 v22, v100, v87, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v23, v24 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v103, v99, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v25 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v101, v97, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v22 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v23, v24 -; GFX11-FAKE16-NEXT: v_perm_b32 v24, v83, v71, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v25, v26 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v96, v86, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v27 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v84, v80, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v24 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v25, v26 -; GFX11-FAKE16-NEXT: v_perm_b32 v26, v66, v54, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v27, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v81, v69, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v29 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s4, v179, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v12 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v102, v98, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v15, v13 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, v163, v151, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v17, v14 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v18, v16 +; GFX11-FAKE16-NEXT: v_perm_b32 v17, v150, v148, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v146, v134, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v164, v160, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v128, v116, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v117, v113, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v16, v15 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v103, v99, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v19, v17 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v129, v118, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v21, v18 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, v22, v20 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v119, v115, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v114, v112, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v132, v130, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX11-FAKE16-NEXT: v_perm_b32 v28, v70, v68, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, v20, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v27, v96, v86, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, v23, v21 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v100, v87, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v25, v22 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, v26, v24 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v85, v82, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v83, v71, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v101, v97, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX11-FAKE16-NEXT: v_perm_b32 v29, v84, v80, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX11-FAKE16-NEXT: v_perm_b32 v30, v81, v69, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v24, v23 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v27, v25 +; GFX11-FAKE16-NEXT: v_perm_b32 v27, v66, v54, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v29, v26 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v30, v28 +; GFX11-FAKE16-NEXT: v_perm_b32 v28, v64, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v31, v49, v38, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v183, v39, v35, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v41, v34, v32, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v29, v67, v55, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v26 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v27, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v28, v49, v38, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v29, v30 -; GFX11-FAKE16-NEXT: v_perm_b32 v29, v65, v53, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v31 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v52, v50, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v28 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v29, v30 -; GFX11-FAKE16-NEXT: v_perm_b32 v30, v34, v32, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v31, v183 -; GFX11-FAKE16-NEXT: v_perm_b32 v31, v48, v36, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v40 -; GFX11-FAKE16-NEXT: v_perm_b32 v40, v37, v33, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v41, 16, v30 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v31, v183 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v40, v41 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX11-FAKE16-NEXT: v_perm_b32 v30, v65, v53, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-FAKE16-NEXT: v_perm_b32 v40, v52, v50, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX11-FAKE16-NEXT: v_perm_b32 v42, v48, v36, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 16, v183 +; GFX11-FAKE16-NEXT: v_perm_b32 v43, v37, v33, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v41, 16, v41 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v29, v27 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v30, v28 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v40, v31 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v42, v183 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v43, v41 ; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB75_3 ; GFX11-FAKE16-NEXT: .LBB75_2: ; %cmp.true -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v7, 0xc0c0004 +; GFX11-FAKE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s0, s0, 3 +; GFX11-FAKE16-NEXT: s_add_i32 s2, s2, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s16, s16, 3 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s74, s73, v7 ; GFX11-FAKE16-NEXT: s_add_i32 s18, s18, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v10 ; GFX11-FAKE16-NEXT: s_add_i32 s20, s20, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s22, s22, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s24, s24, 3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s26, s26, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, 3 -; GFX11-FAKE16-NEXT: s_add_i32 s74, s74, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s72, s72, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s62, s62, 3 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v10 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, s2, s3, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s18, s19, v7 +; GFX11-FAKE16-NEXT: s_add_i32 s60, s60, 3 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v0, 0x300, v0 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x300, v1 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-FAKE16-NEXT: s_add_i32 s58, s58, 3 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s24, s25, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s26, s27, v7 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s72, s63, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v6, s28, s29, v7 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v2, v3 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, s22, s23, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s62, s61, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-FAKE16-NEXT: s_add_i32 s60, s60, 3 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, s20, s21, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, s22, s23, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s72, s63, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s62, s61, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s60, s59, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s58, s57, v7 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x300, v2 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x300, v3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-FAKE16-NEXT: s_add_i32 s58, s58, 3 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_add_i32 s56, s56, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s46, s46, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s56, s47, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s28, s29, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s74, s73, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s46, s45, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s44, s44, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x300, v4 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x300, v5 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; GFX11-FAKE16-NEXT: s_add_i32 s42, s42, 3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-FAKE16-NEXT: s_add_i32 s40, s40, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s14, s14, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s40, s15, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v5 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v6, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, s60, s59, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s58, s57, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s14, s13, v10 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 ; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, 3 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x300, v6 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, 3 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, 3 ; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, s8, s7, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v7 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v8, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s44, s43, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, s42, s41, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v4, v5 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v6, v8 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v9, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v11, v12 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s56, s47, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s46, s45, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s44, s43, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s42, s41, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s40, s15, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, s14, s13, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, s12, s11, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, s10, s9, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, s8, s7, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s6, s5, v7 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, 0x300, v7 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 16, v7 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v8, v9 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v10, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v12, v13 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v14, v15 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v16, v17 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 3, v167 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, 3, v165 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x300, v8 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 0x300, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 3, v164 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 3, v163 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 3, v161 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 3, v150 ; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v11, v12 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, s12, s11, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, s10, s9, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s6, s5, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_perm_b32 v16, s4, v179, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, v15, v166, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v17, v17, v162, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 0x300, v11 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, 0x300, v10 ; GFX11-FAKE16-NEXT: v_perm_b32 v18, v18, v160, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v10 ; GFX11-FAKE16-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v21, v21, v148, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, 0x300, v16 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v11, v12 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v13, v14 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 3, v182 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 3, v181 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 3, v180 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x300, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v17, 0x300, v17 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v178, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, v13, v177, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v14, v176, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x300, v18 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, 0x300, v19 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, 0x300, v12 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x300, v13 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x300, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x300, v20 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, 0x300, v21 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 @@ -124282,9 +124432,11 @@ define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, ; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v36, v35 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v33, v32 ; GFX11-FAKE16-NEXT: .LBB75_3: ; %end -; GFX11-FAKE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:320 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:324 +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:320 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:324 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:328 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:332 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-FAKE16-NEXT: .LBB75_4: @@ -124622,6 +124774,8 @@ define <64 x bfloat> @bitcast_v16f64_to_v64bf16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v19 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 +; SI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 ; SI-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 ; SI-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 ; SI-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 @@ -124632,8 +124786,6 @@ define <64 x bfloat> @bitcast_v16f64_to_v64bf16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v18 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; SI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 -; SI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 ; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v17 @@ -124907,9 +125059,9 @@ define <64 x bfloat> @bitcast_v16f64_to_v64bf16(<16 x double> %a, i32 %b) #0 { ; VI-LABEL: bitcast_v16f64_to_v64bf16: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] @@ -124924,6 +125076,7 @@ define <64 x bfloat> @bitcast_v16f64_to_v64bf16(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 ; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 ; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; VI-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; VI-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -124934,14 +125087,15 @@ define <64 x bfloat> @bitcast_v16f64_to_v64bf16(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 ; VI-NEXT: .LBB76_2: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v16f64_to_v64bf16: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] @@ -124956,6 +125110,7 @@ define <64 x bfloat> @bitcast_v16f64_to_v64bf16(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 ; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; GFX9-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; GFX9-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -124966,6 +125121,7 @@ define <64 x bfloat> @bitcast_v16f64_to_v64bf16(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 ; GFX9-NEXT: .LBB76_2: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-LABEL: bitcast_v16f64_to_v64bf16: @@ -125025,8 +125181,8 @@ define inreg <64 x bfloat> @bitcast_v16f64_to_v64bf16_scalar(<16 x double> inreg ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -125174,100 +125330,91 @@ define inreg <64 x bfloat> @bitcast_v16f64_to_v64bf16_scalar(<16 x double> inreg ; SI-NEXT: v_add_f64 v[22:23], s[4:5], 1.0 ; SI-NEXT: v_add_f64 v[0:1], s[22:23], 1.0 ; SI-NEXT: v_add_f64 v[2:3], s[24:25], 1.0 +; SI-NEXT: v_add_f64 v[8:9], s[44:45], 1.0 ; SI-NEXT: v_add_f64 v[14:15], s[14:15], 1.0 ; SI-NEXT: v_add_f64 v[16:17], s[12:13], 1.0 -; SI-NEXT: v_add_f64 v[24:25], s[6:7], 1.0 ; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v23 ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; SI-NEXT: v_add_f64 v[10:11], s[42:43], 1.0 -; SI-NEXT: v_add_f64 v[18:19], s[10:11], 1.0 ; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v22 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v17 -; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v17 -; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v15 -; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v15 -; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v14 -; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v14 -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v2 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v2 -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v1 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v1 -; SI-NEXT: v_add_f64 v[1:2], s[20:21], 1.0 +; SI-NEXT: v_add_f64 v[6:7], s[28:29], 1.0 +; SI-NEXT: v_add_f64 v[10:11], s[42:43], 1.0 +; SI-NEXT: v_add_f64 v[12:13], s[40:41], 1.0 ; SI-NEXT: v_add_f64 v[20:21], s[8:9], 1.0 +; SI-NEXT: v_add_f64 v[24:25], s[6:7], 1.0 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v25 +; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v16 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v16 +; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v15 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v15 +; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v9 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v9 +; SI-NEXT: v_and_b32_e32 v42, 0xffff0000, v8 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v8 +; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v2 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v2 +; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v1 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v1 +; SI-NEXT: v_add_f64 v[1:2], s[20:21], 1.0 ; SI-NEXT: v_add_f64 v[4:5], s[26:27], 1.0 -; SI-NEXT: v_add_f64 v[6:7], s[28:29], 1.0 -; SI-NEXT: v_add_f64 v[8:9], s[44:45], 1.0 -; SI-NEXT: v_add_f64 v[12:13], s[40:41], 1.0 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v24 -; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v19 -; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v19 -; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v18 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v18 -; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v11 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v11 -; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v10 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v10 -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v3 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v3 -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v2 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v2 +; SI-NEXT: v_add_f64 v[18:19], s[10:11], 1.0 +; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v24 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v24 +; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v20 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v20 +; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v17 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v17 +; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v13 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v13 +; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v10 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v10 +; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v6 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v6 +; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v3 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v3 +; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v2 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v2 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 -; SI-NEXT: v_add_f64 v[37:38], s[16:17], 1.0 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v25 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v24 -; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v21 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_add_f64 v[30:31], s[16:17], 1.0 ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v20 -; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v20 -; SI-NEXT: v_and_b32_e32 v45, 0xffff0000, v16 -; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v16 -; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v13 -; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v13 -; SI-NEXT: v_and_b32_e32 v61, 0xffff0000, v12 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v12 -; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v9 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v9 -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v8 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v8 -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v7 -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v7 -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v6 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v6 -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v5 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v5 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v4 -; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v0 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v0 -; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v1 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v3 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3 -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v2 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v38 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v38 -; SI-NEXT: v_mov_b32_e32 v38, v34 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v37 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37 +; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v25 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v25 +; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v21 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v21 +; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v19 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v19 +; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v18 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v18 +; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v14 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v14 +; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v12 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v12 +; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v11 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v11 +; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v7 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v7 +; SI-NEXT: v_and_b32_e32 v45, 0xffff0000, v5 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v5 +; SI-NEXT: v_and_b32_e32 v46, 0xffff0000, v4 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v4 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v0 +; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v0 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v1 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v1 +; SI-NEXT: v_and_b32_e32 v61, 0xffff0000, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v3 +; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v2 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v31 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v31 +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v30 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v30 ; SI-NEXT: s_branch .LBB77_5 ; SI-NEXT: .LBB77_3: ; SI-NEXT: ; implicit-def: $sgpr46 @@ -125344,188 +125491,214 @@ define inreg <64 x bfloat> @bitcast_v16f64_to_v64bf16_scalar(<16 x double> inreg ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v0, s58 +; SI-NEXT: v_readlane_b32 s4, v62, 0 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v0, s57 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v0, s56 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v0, s99 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v0, s97 -; SI-NEXT: v_readlane_b32 s4, v62, 0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v0, s96 ; SI-NEXT: v_mov_b32_e32 v2, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v0, s86 -; SI-NEXT: v_mov_b32_e32 v9, s4 +; SI-NEXT: v_mov_b32_e32 v0, s56 +; SI-NEXT: v_mov_b32_e32 v33, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 3 -; SI-NEXT: v_mov_b32_e32 v38, s98 -; SI-NEXT: v_mov_b32_e32 v51, s87 -; SI-NEXT: v_mov_b32_e32 v53, s85 -; SI-NEXT: v_mov_b32_e32 v52, s84 -; SI-NEXT: v_mov_b32_e32 v55, s83 -; SI-NEXT: v_mov_b32_e32 v54, s82 -; SI-NEXT: v_mov_b32_e32 v41, s81 -; SI-NEXT: v_mov_b32_e32 v40, s80 -; SI-NEXT: v_mov_b32_e32 v43, s71 -; SI-NEXT: v_mov_b32_e32 v42, s70 -; SI-NEXT: v_mov_b32_e32 v45, s69 -; SI-NEXT: v_mov_b32_e32 v44, s68 -; SI-NEXT: v_mov_b32_e32 v47, s67 -; SI-NEXT: v_mov_b32_e32 v46, s66 -; SI-NEXT: v_mov_b32_e32 v57, s65 -; SI-NEXT: v_mov_b32_e32 v56, s64 -; SI-NEXT: v_mov_b32_e32 v59, s55 -; SI-NEXT: v_mov_b32_e32 v58, s54 -; SI-NEXT: v_mov_b32_e32 v61, s53 -; SI-NEXT: v_mov_b32_e32 v60, s52 -; SI-NEXT: v_mov_b32_e32 v48, s51 -; SI-NEXT: v_mov_b32_e32 v39, s50 -; SI-NEXT: v_mov_b32_e32 v33, s49 -; SI-NEXT: v_mov_b32_e32 v32, s48 -; SI-NEXT: v_mov_b32_e32 v31, s39 -; SI-NEXT: v_mov_b32_e32 v30, s38 -; SI-NEXT: v_mov_b32_e32 v29, s37 -; SI-NEXT: v_mov_b32_e32 v28, s36 -; SI-NEXT: v_mov_b32_e32 v27, s35 -; SI-NEXT: v_mov_b32_e32 v26, s34 -; SI-NEXT: v_mov_b32_e32 v25, s31 -; SI-NEXT: v_mov_b32_e32 v24, s30 -; SI-NEXT: v_mov_b32_e32 v23, s95 -; SI-NEXT: v_mov_b32_e32 v22, s94 -; SI-NEXT: v_mov_b32_e32 v21, s93 -; SI-NEXT: v_mov_b32_e32 v20, s92 -; SI-NEXT: v_mov_b32_e32 v19, s91 -; SI-NEXT: v_mov_b32_e32 v18, s90 -; SI-NEXT: v_mov_b32_e32 v17, s89 -; SI-NEXT: v_mov_b32_e32 v50, s88 -; SI-NEXT: v_mov_b32_e32 v15, s79 -; SI-NEXT: v_mov_b32_e32 v14, s78 -; SI-NEXT: v_mov_b32_e32 v12, s77 -; SI-NEXT: v_mov_b32_e32 v36, s76 -; SI-NEXT: v_mov_b32_e32 v11, s75 -; SI-NEXT: v_mov_b32_e32 v10, s74 -; SI-NEXT: v_mov_b32_e32 v49, s73 -; SI-NEXT: v_mov_b32_e32 v13, s72 -; SI-NEXT: v_mov_b32_e32 v1, s63 -; SI-NEXT: v_mov_b32_e32 v6, s62 -; SI-NEXT: v_mov_b32_e32 v5, s61 -; SI-NEXT: v_mov_b32_e32 v4, s60 -; SI-NEXT: v_mov_b32_e32 v3, s4 +; SI-NEXT: v_mov_b32_e32 v35, s99 +; SI-NEXT: v_mov_b32_e32 v34, s98 +; SI-NEXT: v_mov_b32_e32 v36, s97 +; SI-NEXT: v_mov_b32_e32 v29, s96 +; SI-NEXT: v_mov_b32_e32 v37, s87 +; SI-NEXT: v_mov_b32_e32 v28, s86 +; SI-NEXT: v_mov_b32_e32 v38, s85 +; SI-NEXT: v_mov_b32_e32 v27, s84 +; SI-NEXT: v_mov_b32_e32 v39, s83 +; SI-NEXT: v_mov_b32_e32 v26, s82 +; SI-NEXT: v_mov_b32_e32 v48, s81 +; SI-NEXT: v_mov_b32_e32 v25, s80 +; SI-NEXT: v_mov_b32_e32 v49, s71 +; SI-NEXT: v_mov_b32_e32 v24, s70 +; SI-NEXT: v_mov_b32_e32 v50, s69 +; SI-NEXT: v_mov_b32_e32 v23, s68 +; SI-NEXT: v_mov_b32_e32 v51, s67 +; SI-NEXT: v_mov_b32_e32 v22, s66 +; SI-NEXT: v_mov_b32_e32 v52, s65 +; SI-NEXT: v_mov_b32_e32 v21, s64 +; SI-NEXT: v_mov_b32_e32 v53, s55 +; SI-NEXT: v_mov_b32_e32 v20, s54 +; SI-NEXT: v_mov_b32_e32 v54, s53 +; SI-NEXT: v_mov_b32_e32 v19, s52 +; SI-NEXT: v_mov_b32_e32 v55, s51 +; SI-NEXT: v_mov_b32_e32 v18, s50 +; SI-NEXT: v_mov_b32_e32 v40, s49 +; SI-NEXT: v_mov_b32_e32 v17, s48 +; SI-NEXT: v_mov_b32_e32 v41, s39 +; SI-NEXT: v_mov_b32_e32 v16, s38 +; SI-NEXT: v_mov_b32_e32 v42, s37 +; SI-NEXT: v_mov_b32_e32 v15, s36 +; SI-NEXT: v_mov_b32_e32 v43, s35 +; SI-NEXT: v_mov_b32_e32 v14, s34 +; SI-NEXT: v_mov_b32_e32 v44, s31 +; SI-NEXT: v_mov_b32_e32 v13, s30 +; SI-NEXT: v_mov_b32_e32 v45, s95 +; SI-NEXT: v_mov_b32_e32 v12, s94 +; SI-NEXT: v_mov_b32_e32 v46, s93 +; SI-NEXT: v_mov_b32_e32 v11, s92 +; SI-NEXT: v_mov_b32_e32 v47, s91 +; SI-NEXT: v_mov_b32_e32 v10, s90 +; SI-NEXT: v_mov_b32_e32 v56, s89 +; SI-NEXT: v_mov_b32_e32 v9, s88 +; SI-NEXT: v_mov_b32_e32 v57, s79 +; SI-NEXT: v_mov_b32_e32 v8, s78 +; SI-NEXT: v_mov_b32_e32 v7, s77 +; SI-NEXT: v_mov_b32_e32 v58, s76 +; SI-NEXT: v_mov_b32_e32 v59, s75 +; SI-NEXT: v_mov_b32_e32 v6, s74 +; SI-NEXT: v_mov_b32_e32 v5, s73 +; SI-NEXT: v_mov_b32_e32 v60, s72 +; SI-NEXT: v_mov_b32_e32 v61, s63 +; SI-NEXT: v_mov_b32_e32 v4, s62 +; SI-NEXT: v_mov_b32_e32 v32, s61 +; SI-NEXT: v_mov_b32_e32 v3, s60 +; SI-NEXT: v_mov_b32_e32 v1, s4 ; SI-NEXT: .LBB77_5: ; %end ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v2 -; SI-NEXT: v_mul_f32_e32 v34, 1.0, v3 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v5 -; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v1 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v6 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v49 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v11 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v10 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v12 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v36 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v15 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v17 -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v19 -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v21 -; SI-NEXT: v_mul_f32_e32 v15, 1.0, v14 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v23 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v25 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v27 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v29 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v31 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v33 -; SI-NEXT: v_mul_f32_e32 v11, 1.0, v18 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v48 -; SI-NEXT: v_mul_f32_e32 v5, 1.0, v13 -; SI-NEXT: v_mul_f32_e32 v13, 1.0, v20 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v61 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v59 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v57 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v47 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v45 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v43 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v41 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v55 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v53 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v51 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: v_mul_f32_e32 v2, 1.0, v9 -; SI-NEXT: v_mul_f32_e32 v9, 1.0, v50 -; SI-NEXT: v_mul_f32_e32 v7, 1.0, v4 -; SI-NEXT: v_lshr_b64 v[33:34], v[34:35], 16 -; SI-NEXT: v_lshr_b64 v[34:35], v[2:3], 16 -; SI-NEXT: v_lshr_b64 v[2:3], v[7:8], 16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: v_mul_f32_e32 v19, 1.0, v39 -; SI-NEXT: v_mul_f32_e32 v36, 1.0, v60 -; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22 -; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24 -; SI-NEXT: v_mul_f32_e32 v26, 1.0, v26 -; SI-NEXT: v_mul_f32_e32 v28, 1.0, v28 -; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 -; SI-NEXT: v_mul_f32_e32 v17, 1.0, v32 -; SI-NEXT: v_mul_f32_e32 v58, 1.0, v58 -; SI-NEXT: v_mul_f32_e32 v56, 1.0, v56 -; SI-NEXT: v_mul_f32_e32 v46, 1.0, v46 -; SI-NEXT: v_mul_f32_e32 v44, 1.0, v44 -; SI-NEXT: v_mul_f32_e32 v42, 1.0, v42 -; SI-NEXT: v_mul_f32_e32 v40, 1.0, v40 -; SI-NEXT: v_mul_f32_e32 v54, 1.0, v54 -; SI-NEXT: v_mul_f32_e32 v52, 1.0, v52 -; SI-NEXT: v_mul_f32_e32 v38, 1.0, v38 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v1 +; SI-NEXT: v_lshr_b64 v[0:1], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v1, 1.0, v2 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1 +; SI-NEXT: v_mul_f32_e32 v1, 1.0, v33 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 +; SI-NEXT: v_mul_f32_e32 v2, 1.0, v32 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v2 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v3 +; SI-NEXT: v_lshr_b64 v[2:3], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v3, 1.0, v61 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v3 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v4 +; SI-NEXT: v_lshr_b64 v[3:4], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v4, 1.0, v5 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4 +; SI-NEXT: v_mul_f32_e32 v4, 1.0, v60 +; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16 +; SI-NEXT: v_mul_f32_e32 v5, 1.0, v59 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v5 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v6 +; SI-NEXT: v_lshr_b64 v[5:6], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v6, 1.0, v7 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6 +; SI-NEXT: v_mul_f32_e32 v6, 1.0, v58 +; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16 +; SI-NEXT: v_mul_f32_e32 v7, 1.0, v57 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v7 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v8 +; SI-NEXT: v_lshr_b64 v[7:8], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v8, 1.0, v56 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v8 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v9 +; SI-NEXT: v_lshr_b64 v[8:9], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v9, 1.0, v47 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v9 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v10 +; SI-NEXT: v_lshr_b64 v[9:10], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v10, 1.0, v46 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v10 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v11 +; SI-NEXT: v_lshr_b64 v[10:11], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v11, 1.0, v45 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v12 +; SI-NEXT: v_lshr_b64 v[11:12], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v12, 1.0, v44 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v12 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v13 +; SI-NEXT: v_lshr_b64 v[12:13], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v13, 1.0, v43 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v13 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v14 +; SI-NEXT: v_lshr_b64 v[13:14], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v14, 1.0, v42 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v14 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v15 +; SI-NEXT: v_lshr_b64 v[14:15], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v15, 1.0, v41 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v16 +; SI-NEXT: v_lshr_b64 v[15:16], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v16, 1.0, v40 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v16 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v17 +; SI-NEXT: v_lshr_b64 v[16:17], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v17, 1.0, v55 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v17 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v18 +; SI-NEXT: v_lshr_b64 v[17:18], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v18, 1.0, v54 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v18 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v19 +; SI-NEXT: v_lshr_b64 v[18:19], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v19, 1.0, v53 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v19 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v20 +; SI-NEXT: v_lshr_b64 v[19:20], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v20, 1.0, v52 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v20 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v21 +; SI-NEXT: v_lshr_b64 v[20:21], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v21, 1.0, v51 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v21 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v22 +; SI-NEXT: v_lshr_b64 v[21:22], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v22, 1.0, v50 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v22 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v23 +; SI-NEXT: v_lshr_b64 v[22:23], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v23, 1.0, v49 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v23 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v24 +; SI-NEXT: v_lshr_b64 v[23:24], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v24, 1.0, v48 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v24 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v25 +; SI-NEXT: v_lshr_b64 v[24:25], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v25, 1.0, v39 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v25 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v26 +; SI-NEXT: v_lshr_b64 v[25:26], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v26, 1.0, v38 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v26 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v27 +; SI-NEXT: v_lshr_b64 v[26:27], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v27, 1.0, v37 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v27 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v28 +; SI-NEXT: v_lshr_b64 v[27:28], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v28, 1.0, v36 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v28 +; SI-NEXT: v_mul_f32_e32 v29, 1.0, v29 +; SI-NEXT: v_lshr_b64 v[28:29], v[29:30], 16 +; SI-NEXT: v_mul_f32_e32 v29, 1.0, v35 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v29 +; SI-NEXT: v_mul_f32_e32 v29, 1.0, v34 +; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: v_readlane_b32 s30, v63, 34 ; SI-NEXT: v_readlane_b32 s31, v63, 35 ; SI-NEXT: v_readlane_b32 s99, v63, 33 @@ -125562,89 +125735,24 @@ define inreg <64 x bfloat> @bitcast_v16f64_to_v64bf16_scalar(<16 x double> inreg ; SI-NEXT: v_readlane_b32 s36, v63, 2 ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_mul_f32_e32 v50, 1.0, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 -; SI-NEXT: v_lshr_b64 v[4:5], v[5:6], 16 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_mul_f32_e32 v48, 1.0, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16 -; SI-NEXT: v_lshr_b64 v[7:8], v[15:16], 16 -; SI-NEXT: v_lshr_b64 v[8:9], v[9:10], 16 -; SI-NEXT: v_lshr_b64 v[9:10], v[11:12], 16 -; SI-NEXT: v_lshr_b64 v[10:11], v[13:14], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[22:23], 16 -; SI-NEXT: v_lshr_b64 v[12:13], v[24:25], 16 -; SI-NEXT: v_lshr_b64 v[13:14], v[26:27], 16 -; SI-NEXT: v_lshr_b64 v[14:15], v[28:29], 16 -; SI-NEXT: v_lshr_b64 v[15:16], v[30:31], 16 -; SI-NEXT: v_lshr_b64 v[16:17], v[17:18], 16 -; SI-NEXT: v_lshr_b64 v[17:18], v[19:20], 16 -; SI-NEXT: v_lshr_b64 v[18:19], v[36:37], 16 -; SI-NEXT: v_lshr_b64 v[19:20], v[58:59], 16 -; SI-NEXT: v_lshr_b64 v[20:21], v[56:57], 16 -; SI-NEXT: v_lshr_b64 v[21:22], v[46:47], 16 -; SI-NEXT: v_lshr_b64 v[22:23], v[44:45], 16 -; SI-NEXT: v_lshr_b64 v[23:24], v[42:43], 16 -; SI-NEXT: v_lshr_b64 v[24:25], v[40:41], 16 -; SI-NEXT: v_lshr_b64 v[25:26], v[54:55], 16 -; SI-NEXT: v_lshr_b64 v[26:27], v[52:53], 16 -; SI-NEXT: v_lshr_b64 v[27:28], v[50:51], 16 -; SI-NEXT: v_lshr_b64 v[28:29], v[48:49], 16 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[29:30], v[38:39], 16 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v30 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 +; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16 +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mul_f32_e32 v60, 1.0, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[30:31], v[60:61], 16 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v31 +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_lshr_b64 v[31:32], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v0, v33 -; SI-NEXT: v_mov_b32_e32 v1, v34 +; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31 +; SI-NEXT: v_lshr_b64 v[31:32], v[31:32], 16 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -126420,8 +126528,6 @@ define <16 x double> @bitcast_v64bf16_to_v16f64(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB78_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v63 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 @@ -126470,6 +126576,8 @@ define <16 x double> @bitcast_v64bf16_to_v16f64(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32 ; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v32 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload @@ -126487,80 +126595,77 @@ define <16 x double> @bitcast_v64bf16_to_v16f64(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6 -; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 ; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 ; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8 -; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9 -; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 ; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10 -; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 -; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: s_waitcnt vmcnt(6) ; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 ; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 ; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 -; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 ; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 ; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 ; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 -; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 ; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_alignbit_b32 v2, v3, v2, 16 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 @@ -128989,7 +129094,7 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -129011,100 +129116,79 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg ; SI-NEXT: v_writelane_b32 v63, s36, 2 ; SI-NEXT: v_writelane_b32 v63, s30, 3 ; SI-NEXT: v_writelane_b32 v63, s31, 4 -; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 -; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 -; SI-NEXT: v_readfirstlane_b32 s30, v1 -; SI-NEXT: v_readfirstlane_b32 s34, v0 -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s12 -; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2 -; SI-NEXT: s_and_b32 s31, s30, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6 -; SI-NEXT: v_readfirstlane_b32 s94, v3 -; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s31 +; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 ; SI-NEXT: v_readfirstlane_b32 s90, v5 -; SI-NEXT: s_and_b32 s95, s94, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_hi -; SI-NEXT: v_readfirstlane_b32 s88, v6 +; SI-NEXT: v_readfirstlane_b32 s76, v8 ; SI-NEXT: s_and_b32 s91, s90, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s95 -; SI-NEXT: v_readfirstlane_b32 s78, v7 -; SI-NEXT: s_and_b32 s89, s88, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_readfirstlane_b32 s34, v0 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s14 +; SI-NEXT: s_and_b32 s77, s76, 0xffff0000 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s91 -; SI-NEXT: v_readfirstlane_b32 s76, v8 -; SI-NEXT: s_and_b32 s79, s78, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: s_and_b32 s41, s16, 0xffff0000 +; SI-NEXT: s_lshl_b32 s76, s76, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s89 -; SI-NEXT: v_readfirstlane_b32 s74, v9 -; SI-NEXT: s_and_b32 s77, s76, 0xffff0000 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77 +; SI-NEXT: v_readfirstlane_b32 s30, v1 +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s41 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s76 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: v_readfirstlane_b32 s72, v10 -; SI-NEXT: s_and_b32 s75, s74, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77 ; SI-NEXT: v_readfirstlane_b32 s62, v11 ; SI-NEXT: s_and_b32 s73, s72, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s75 ; SI-NEXT: v_readfirstlane_b32 s60, v12 ; SI-NEXT: s_and_b32 s63, s62, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s73 ; SI-NEXT: v_readfirstlane_b32 s58, v13 ; SI-NEXT: s_and_b32 s61, s60, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s63 ; SI-NEXT: v_readfirstlane_b32 s56, v14 ; SI-NEXT: s_and_b32 s59, s58, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s61 -; SI-NEXT: v_readfirstlane_b32 s46, v15 +; SI-NEXT: v_readfirstlane_b32 s44, v16 ; SI-NEXT: s_and_b32 s57, s56, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s59 -; SI-NEXT: v_readfirstlane_b32 s44, v16 -; SI-NEXT: s_and_b32 s47, s46, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57 -; SI-NEXT: v_readfirstlane_b32 s42, v17 ; SI-NEXT: s_and_b32 s45, s44, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s47 -; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 -; SI-NEXT: v_readfirstlane_b32 s92, v4 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s57 +; SI-NEXT: s_lshl_b32 s44, s44, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s44 +; SI-NEXT: v_readfirstlane_b32 s42, v17 +; SI-NEXT: v_readfirstlane_b32 s46, v15 +; SI-NEXT: v_readfirstlane_b32 s74, v9 +; SI-NEXT: v_readfirstlane_b32 s78, v7 +; SI-NEXT: v_readfirstlane_b32 s88, v6 +; SI-NEXT: v_readfirstlane_b32 s92, v4 +; SI-NEXT: v_readfirstlane_b32 s94, v3 +; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2 ; SI-NEXT: s_and_b32 s4, s29, 0xffff0000 ; SI-NEXT: s_lshl_b32 s5, s29, 16 +; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 ; SI-NEXT: s_lshl_b32 s7, s28, 16 ; SI-NEXT: s_and_b32 s8, s27, 0xffff0000 ; SI-NEXT: s_lshl_b32 s9, s27, 16 ; SI-NEXT: s_and_b32 s10, s26, 0xffff0000 ; SI-NEXT: s_lshl_b32 s11, s26, 16 +; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 ; SI-NEXT: s_lshl_b32 s13, s25, 16 -; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 ; SI-NEXT: s_lshl_b32 s15, s24, 16 ; SI-NEXT: s_and_b32 s24, s23, 0xffff0000 ; SI-NEXT: s_lshl_b32 s23, s23, 16 @@ -129120,528 +129204,559 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg ; SI-NEXT: s_lshl_b32 s18, s18, 16 ; SI-NEXT: s_and_b32 s40, s17, 0xffff0000 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_and_b32 s41, s16, 0xffff0000 ; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 ; SI-NEXT: s_lshl_b32 s42, s42, 16 -; SI-NEXT: s_lshl_b32 s44, s44, 16 +; SI-NEXT: s_and_b32 s47, s46, 0xffff0000 ; SI-NEXT: s_lshl_b32 s46, s46, 16 ; SI-NEXT: s_lshl_b32 s56, s56, 16 ; SI-NEXT: s_lshl_b32 s58, s58, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_lshl_b32 s60, s60, 16 ; SI-NEXT: s_lshl_b32 s62, s62, 16 ; SI-NEXT: s_lshl_b32 s72, s72, 16 +; SI-NEXT: s_and_b32 s75, s74, 0xffff0000 ; SI-NEXT: s_lshl_b32 s74, s74, 16 -; SI-NEXT: s_lshl_b32 s76, s76, 16 +; SI-NEXT: s_and_b32 s79, s78, 0xffff0000 ; SI-NEXT: s_lshl_b32 s78, s78, 16 +; SI-NEXT: s_and_b32 s89, s88, 0xffff0000 ; SI-NEXT: s_lshl_b32 s88, s88, 16 ; SI-NEXT: s_lshl_b32 s90, s90, 16 ; SI-NEXT: s_and_b32 s93, s92, 0xffff0000 ; SI-NEXT: s_lshl_b32 s92, s92, 16 +; SI-NEXT: s_and_b32 s95, s94, 0xffff0000 ; SI-NEXT: s_lshl_b32 s94, s94, 16 +; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000 ; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16 +; SI-NEXT: s_and_b32 s31, s30, 0xffff0000 ; SI-NEXT: s_lshl_b32 s30, s30, 16 ; SI-NEXT: s_and_b32 s35, s34, 0xffff0000 ; SI-NEXT: s_lshl_b32 s34, s34, 16 ; SI-NEXT: v_readfirstlane_b32 s36, v18 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43 ; SI-NEXT: s_cmp_lg_u32 s36, 0 -; SI-NEXT: v_mul_f32_e64 v55, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v53, 1.0, s40 -; SI-NEXT: v_mul_f32_e64 v3, 1.0, s29 -; SI-NEXT: v_mul_f32_e64 v4, 1.0, s28 -; SI-NEXT: v_mul_f32_e64 v62, 1.0, s27 -; SI-NEXT: v_mul_f32_e64 v6, 1.0, s26 -; SI-NEXT: v_mul_f32_e64 v7, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v3, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v11, 1.0, s40 +; SI-NEXT: v_mul_f32_e64 v36, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v9, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v40, 1.0, s18 +; SI-NEXT: v_mul_f32_e64 v6, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v22, 1.0, s19 +; SI-NEXT: v_mul_f32_e64 v5, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v35, 1.0, s20 +; SI-NEXT: v_mul_f32_e64 v7, 1.0, s26 +; SI-NEXT: v_mul_f32_e64 v34, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v62, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v33, 1.0, s22 ; SI-NEXT: v_mul_f32_e64 v8, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v9, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v11, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v61, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v60, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v10, 1.0, s12 +; SI-NEXT: v_mul_f32_e64 v59, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v20, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v53, 1.0, s11 ; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s35 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s93 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: v_mul_f32_e64 v43, 1.0, s16 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17 -; SI-NEXT: v_mul_f32_e64 v34, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v17, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v20, 1.0, s20 -; SI-NEXT: v_mul_f32_e64 v19, 1.0, s21 -; SI-NEXT: v_mul_f32_e64 v13, 1.0, s22 -; SI-NEXT: v_mul_f32_e64 v31, 1.0, s23 -; SI-NEXT: v_mul_f32_e64 v23, 1.0, s15 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s13 -; SI-NEXT: v_mul_f32_e64 v30, 1.0, s11 -; SI-NEXT: v_mul_f32_e64 v27, 1.0, s9 -; SI-NEXT: v_mul_f32_e64 v61, 1.0, s7 -; SI-NEXT: v_mul_f32_e64 v29, 1.0, s5 -; SI-NEXT: v_mul_f32_e64 v15, 1.0, s34 -; SI-NEXT: v_mul_f32_e64 v60, 1.0, s30 -; SI-NEXT: v_mul_f32_e64 v33, 1.0, vcc_lo -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s94 -; SI-NEXT: v_mul_f32_e64 v59, 1.0, s92 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s90 -; SI-NEXT: v_mul_f32_e64 v38, 1.0, s88 -; SI-NEXT: v_mul_f32_e64 v22, 1.0, s78 -; SI-NEXT: v_mul_f32_e64 v36, 1.0, s76 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s74 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s72 -; SI-NEXT: v_mul_f32_e64 v49, 1.0, s62 +; SI-NEXT: v_mul_f32_e64 v51, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v13, 1.0, s6 +; SI-NEXT: v_mul_f32_e64 v43, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v14, 1.0, s4 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v15, 1.0, s35 +; SI-NEXT: v_mul_f32_e64 v32, 1.0, s34 +; SI-NEXT: v_mul_f32_e64 v17, 1.0, s31 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s30 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, vcc_hi +; SI-NEXT: v_mul_f32_e64 v48, 1.0, vcc_lo +; SI-NEXT: v_mul_f32_e64 v18, 1.0, s95 +; SI-NEXT: v_mul_f32_e64 v55, 1.0, s94 +; SI-NEXT: v_mul_f32_e64 v19, 1.0, s93 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s92 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s90 +; SI-NEXT: v_mul_f32_e64 v21, 1.0, s89 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s88 +; SI-NEXT: v_mul_f32_e64 v27, 1.0, s79 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s78 +; SI-NEXT: v_mul_f32_e64 v49, 1.0, s75 +; SI-NEXT: v_mul_f32_e64 v24, 1.0, s74 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s72 +; SI-NEXT: v_mul_f32_e64 v26, 1.0, s62 ; SI-NEXT: v_mul_f32_e64 v45, 1.0, s60 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s58 -; SI-NEXT: v_mul_f32_e64 v51, 1.0, s56 -; SI-NEXT: v_mul_f32_e64 v41, 1.0, s46 -; SI-NEXT: v_mul_f32_e64 v54, 1.0, s44 -; SI-NEXT: v_mul_f32_e64 v52, 1.0, s42 -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v28, 1.0, s58 +; SI-NEXT: v_mul_f32_e64 v52, 1.0, s56 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s47 +; SI-NEXT: v_mul_f32_e64 v30, 1.0, s46 +; SI-NEXT: v_mul_f32_e64 v44, 1.0, s43 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s42 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; SI-NEXT: s_cbranch_scc0 .LBB79_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v55 -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v53 +; SI-NEXT: v_mov_b32_e32 v0, v3 +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v44, v1 -; SI-NEXT: v_mov_b32_e32 v43, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v4 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v62 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v12 -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v37, v36 -; SI-NEXT: v_mov_b32_e32 v36, v47 -; SI-NEXT: v_mov_b32_e32 v50, v49 -; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v40, v41 -; SI-NEXT: s_mov_b64 s[4:5], 0 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v1, v43 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[0:1], v[3:4], 16 +; SI-NEXT: v_mov_b32_e32 v1, v36 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v11 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[1:2], v[43:44], 16 -; SI-NEXT: v_mov_b32_e32 v2, v34 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[1:2], v[36:37], 16 +; SI-NEXT: v_mov_b32_e32 v2, v40 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v9 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[2:3], v[34:35], 16 -; SI-NEXT: v_mov_b32_e32 v3, v17 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[2:3], v[40:41], 16 +; SI-NEXT: v_mov_b32_e32 v3, v22 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v6 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 16 -; SI-NEXT: v_mov_b32_e32 v4, v20 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[3:4], v[22:23], 16 +; SI-NEXT: v_mov_b32_e32 v4, v35 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v5 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[4:5], v[20:21], 16 -; SI-NEXT: v_mov_b32_e32 v5, v19 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v6 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[4:5], v[35:36], 16 +; SI-NEXT: v_mov_b32_e32 v5, v34 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v7 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[5:6], v[19:20], 16 -; SI-NEXT: v_mov_b32_e32 v6, v13 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[5:6], v[34:35], 16 +; SI-NEXT: v_mov_b32_e32 v6, v33 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v62 +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[6:7], v[13:14], 16 -; SI-NEXT: v_mov_b32_e32 v7, v31 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[6:7], v[33:34], 16 +; SI-NEXT: v_mov_b32_e32 v7, v61 +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[7:8], v[31:32], 16 -; SI-NEXT: v_mov_b32_e32 v8, v23 -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v8 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[8:9], v[23:24], 16 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v44, v45 -; SI-NEXT: v_mov_b32_e32 v32, v59 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 -; SI-NEXT: v_mov_b32_e32 v9, v25 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[7:8], v[61:62], 16 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v20 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v12 +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[9:10], v[25:26], 16 -; SI-NEXT: v_mov_b32_e32 v10, v30 -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_mov_b32_e32 v25, v49 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v56 +; SI-NEXT: v_mov_b32_e32 v20, v56 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v18 +; SI-NEXT: v_mov_b32_e32 v31, v47 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v27 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: s_mov_b64 s[4:5], 0 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v8 +; SI-NEXT: v_mov_b32_e32 v8, v60 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[10:11], v[30:31], 16 -; SI-NEXT: v_mov_b32_e32 v11, v27 -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[8:9], v[60:61], 16 +; SI-NEXT: v_mov_b32_e32 v9, v59 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v10 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[11:12], v[27:28], 16 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v16 -; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v17 -; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v18 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v27 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v12 -; SI-NEXT: v_mov_b32_e32 v12, v61 +; SI-NEXT: v_lshr_b64 v[9:10], v[59:60], 16 +; SI-NEXT: v_mov_b32_e32 v10, v53 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[10:11], v[53:54], 16 +; SI-NEXT: v_mov_b32_e32 v11, v51 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[12:13], v[61:62], 16 -; SI-NEXT: v_mov_b32_e32 v13, v29 -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[11:12], v[51:52], 16 +; SI-NEXT: v_mov_b32_e32 v12, v43 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[13:14], v[29:30], 16 -; SI-NEXT: v_mov_b32_e32 v14, v15 -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v62, v39 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v62 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v21 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v25 -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v26 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28 +; SI-NEXT: v_lshr_b64 v[12:13], v[43:44], 16 +; SI-NEXT: v_mov_b32_e32 v13, v39 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[14:15], v[15:16], 16 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v30 +; SI-NEXT: v_lshr_b64 v[13:14], v[39:40], 16 +; SI-NEXT: v_mov_b32_e32 v14, v32 +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[14:15], v[32:33], 16 +; SI-NEXT: v_mov_b32_e32 v15, v16 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v39, v48 +; SI-NEXT: v_mov_b32_e32 v54, v55 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v19 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v21 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[15:16], v[16:17], 16 +; SI-NEXT: v_lshr_b64 v[16:17], v[48:49], 16 +; SI-NEXT: v_mov_b32_e32 v48, v18 +; SI-NEXT: v_lshr_b64 v[17:18], v[55:56], 16 +; SI-NEXT: v_mov_b32_e32 v18, v42 +; SI-NEXT: v_mov_b32_e32 v55, v19 +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[18:19], v[42:43], 16 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v56, v20 +; SI-NEXT: v_mov_b32_e32 v49, v25 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v15 -; SI-NEXT: v_mov_b32_e32 v15, v60 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v19 +; SI-NEXT: v_mov_b32_e32 v19, v50 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[15:16], v[60:61], 16 -; SI-NEXT: v_mov_b32_e32 v16, v33 -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[19:20], v[50:51], 16 +; SI-NEXT: v_mov_b32_e32 v20, v58 +; SI-NEXT: v_mov_b32_e32 v50, v21 +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[16:17], v[33:34], 16 -; SI-NEXT: v_mov_b32_e32 v17, v57 -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[20:21], v[58:59], 16 +; SI-NEXT: v_mov_b32_e32 v21, v46 +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[17:18], v[57:58], 16 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v47 -; SI-NEXT: v_lshr_b64 v[18:19], v[59:60], 16 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v20 -; SI-NEXT: v_lshr_b64 v[19:20], v[56:57], 16 -; SI-NEXT: v_mov_b32_e32 v20, v38 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[21:22], v[46:47], 16 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v36 +; SI-NEXT: v_mov_b32_e32 v47, v31 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22 +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16 +; SI-NEXT: v_mov_b32_e32 v23, v24 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[20:21], v[38:39], 16 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v24 +; SI-NEXT: v_lshr_b64 v[23:24], v[24:25], 16 +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; SI-NEXT: v_mov_b32_e32 v39, v62 -; SI-NEXT: v_mov_b32_e32 v58, v56 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21 -; SI-NEXT: v_mov_b32_e32 v21, v22 -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v24 +; SI-NEXT: v_lshr_b64 v[24:25], v[57:58], 16 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v25 +; SI-NEXT: v_mov_b32_e32 v25, v26 +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[21:22], v[22:23], 16 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v55 +; SI-NEXT: v_lshr_b64 v[25:26], v[26:27], 16 +; SI-NEXT: v_lshr_b64 v[26:27], v[45:46], 16 +; SI-NEXT: v_mov_b32_e32 v46, v28 +; SI-NEXT: v_lshr_b64 v[27:28], v[28:29], 16 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22 -; SI-NEXT: v_lshr_b64 v[22:23], v[37:38], 16 -; SI-NEXT: v_lshr_b64 v[23:24], v[46:47], 16 -; SI-NEXT: v_lshr_b64 v[24:25], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[25:26], v[50:51], 16 -; SI-NEXT: v_lshr_b64 v[26:27], v[44:45], 16 -; SI-NEXT: v_lshr_b64 v[27:28], v[42:43], 16 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v53 -; SI-NEXT: v_lshr_b64 v[61:62], v[52:53], 16 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v45, v44 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v47, v36 -; SI-NEXT: v_mov_b32_e32 v36, v37 -; SI-NEXT: v_mov_b32_e32 v49, v50 -; SI-NEXT: v_mov_b32_e32 v51, v33 -; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16 -; SI-NEXT: v_lshr_b64 v[29:30], v[40:41], 16 -; SI-NEXT: v_lshr_b64 v[30:31], v[54:55], 16 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v29, v30 +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_mov_b32_e32 v44, v32 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[29:30], v[30:31], 16 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v32 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshr_b64 v[61:62], v[30:31], 16 +; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v53 +; SI-NEXT: v_mov_b32_e32 v53, v30 +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16 ; SI-NEXT: v_mov_b32_e32 v31, v61 -; SI-NEXT: v_mov_b32_e32 v41, v40 ; SI-NEXT: s_branch .LBB79_3 ; SI-NEXT: .LBB79_2: -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v32, v59 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v58, v56 +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v39, v48 +; SI-NEXT: v_mov_b32_e32 v54, v55 +; SI-NEXT: v_mov_b32_e32 v48, v18 +; SI-NEXT: v_mov_b32_e32 v55, v19 +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: v_mov_b32_e32 v46, v28 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_mov_b32_e32 v50, v21 +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: .LBB79_3: ; %Flow -; SI-NEXT: v_mov_b32_e32 v37, v32 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_mov_b32_e32 v53, v39 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v35, v54 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_mov_b32_e32 v33, v38 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v33, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) expcnt(3) -; SI-NEXT: v_mov_b32_e32 v38, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v50, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v40, v56 -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v51, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0) +; SI-NEXT: v_mov_b32_e32 v54, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v39, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v34, v41 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v40, v58 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v43, v58 ; SI-NEXT: s_cbranch_vccnz .LBB79_5 ; SI-NEXT: ; %bb.4: ; %cmp.true -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v55 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v43 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v53 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v62 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v56 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v48 +; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18 +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v34, v56 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v47 -; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v34 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 -; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 -; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23 -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31 -; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 -; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 -; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 -; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 -; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 -; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 -; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 -; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v40 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v43 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v62 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v42 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 -; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v41 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v40 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v34 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v39 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 ; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 -; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v54 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 +; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 +; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28 +; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 +; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 +; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 +; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 @@ -129650,99 +129765,85 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 ; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v50 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 -; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v51 +; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 ; SI-NEXT: v_lshr_b64 v[11:12], v[11:12], 16 ; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v38 ; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 ; SI-NEXT: v_lshr_b64 v[12:13], v[12:13], 16 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v33 ; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshr_b64 v[13:14], v[13:14], 16 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v39 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v32 ; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 ; SI-NEXT: v_lshr_b64 v[14:15], v[14:15], 16 -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v33 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v44 +; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16 -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v32 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v52 -; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 -; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v35 ; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v55 +; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32 +; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 +; SI-NEXT: v_lshr_b64 v[32:33], v[32:33], 16 ; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 ; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16 -; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v37 -; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 ; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16 -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v58 -; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 -; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 +; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 ; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21 +; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v50 ; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 ; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 +; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; SI-NEXT: v_lshr_b64 v[20:21], v[20:21], 16 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21 ; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 @@ -129751,32 +129852,68 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg ; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16 -; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v36 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22 ; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 +; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v46 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v49 +; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 ; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16 -; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v48 +; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v57 ; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 ; SI-NEXT: v_lshr_b64 v[24:25], v[24:25], 16 -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v49 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 ; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 +; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16 ; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v45 ; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 ; SI-NEXT: v_lshr_b64 v[26:27], v[26:27], 16 -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v42 +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v46 ; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 ; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16 -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v51 +; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v52 ; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 ; SI-NEXT: v_lshr_b64 v[28:29], v[28:29], 16 -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v41 +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v47 +; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 ; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 ; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16 -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v54 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 ; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v31 +; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16 ; SI-NEXT: v_mov_b32_e32 v31, v32 ; SI-NEXT: .LBB79_5: ; %end @@ -129801,33 +129938,34 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v64bf16_to_v16f64_scalar: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v35, s36, 0 -; VI-NEXT: v_writelane_b32 v35, s37, 1 -; VI-NEXT: v_writelane_b32 v35, s38, 2 -; VI-NEXT: v_writelane_b32 v35, s39, 3 -; VI-NEXT: v_writelane_b32 v35, s48, 4 -; VI-NEXT: v_writelane_b32 v35, s49, 5 -; VI-NEXT: v_writelane_b32 v35, s50, 6 -; VI-NEXT: v_writelane_b32 v35, s51, 7 -; VI-NEXT: v_writelane_b32 v35, s52, 8 -; VI-NEXT: v_writelane_b32 v35, s53, 9 -; VI-NEXT: v_writelane_b32 v35, s54, 10 -; VI-NEXT: v_writelane_b32 v35, s55, 11 -; VI-NEXT: v_writelane_b32 v35, s64, 12 -; VI-NEXT: v_writelane_b32 v35, s65, 13 -; VI-NEXT: v_writelane_b32 v35, s66, 14 -; VI-NEXT: v_writelane_b32 v35, s67, 15 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: v_writelane_b32 v41, s36, 0 +; VI-NEXT: v_writelane_b32 v41, s37, 1 +; VI-NEXT: v_writelane_b32 v41, s38, 2 +; VI-NEXT: v_writelane_b32 v41, s39, 3 +; VI-NEXT: v_writelane_b32 v41, s48, 4 +; VI-NEXT: v_writelane_b32 v41, s49, 5 +; VI-NEXT: v_writelane_b32 v41, s50, 6 +; VI-NEXT: v_writelane_b32 v41, s51, 7 +; VI-NEXT: v_writelane_b32 v41, s52, 8 +; VI-NEXT: v_writelane_b32 v41, s53, 9 +; VI-NEXT: v_writelane_b32 v41, s54, 10 +; VI-NEXT: v_writelane_b32 v41, s55, 11 +; VI-NEXT: v_writelane_b32 v41, s64, 12 +; VI-NEXT: v_writelane_b32 v41, s65, 13 +; VI-NEXT: v_writelane_b32 v41, s66, 14 +; VI-NEXT: v_writelane_b32 v41, s67, 15 ; VI-NEXT: v_readfirstlane_b32 s4, v18 ; VI-NEXT: s_mov_b32 s49, s29 ; VI-NEXT: s_mov_b32 s48, s28 @@ -129866,9 +130004,27 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB79_4 ; VI-NEXT: .LBB79_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v32, 0x40c00000 +; VI-NEXT: s_lshl_b32 s4, s51, 16 +; VI-NEXT: v_mov_b32_e32 v17, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; VI-NEXT: s_lshl_b32 s4, s50, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 @@ -129876,588 +130032,571 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 ; VI-NEXT: s_and_b32 s4, s50, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v32 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s48, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v32 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: s_lshl_b32 s4, s49, 16 ; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s46, 16 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[2:3] ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s48, 16 +; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s47, 16 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s46, 16 +; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s45, 16 ; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s44, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s44, 16 +; VI-NEXT: v_lshrrev_b64 v[34:35], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s43, 16 ; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s42, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s42, 16 +; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s41, 16 ; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s40, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s40, 16 +; VI-NEXT: v_lshrrev_b64 v[36:37], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s39, 16 ; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s38, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s38, 16 +; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 +; VI-NEXT: s_lshl_b32 s4, s37, 16 ; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v17 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_lshl_b32 s4, s36, 16 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc -; VI-NEXT: v_bfe_u32 v3, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v0 +; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: s_lshl_b32 s4, s36, 16 +; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[0:1] +; VI-NEXT: v_add_f32_e32 v0, s4, v17 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc +; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: s_and_b32 s4, s66, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 +; VI-NEXT: s_lshl_b32 s4, s67, 16 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s67, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s66, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s66, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[48:49], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s64, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s65, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s65, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s64, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s64, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[49:50], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s62, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s63, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s63, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s62, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s62, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[50:51], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s60, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s61, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s61, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s60, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s60, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[51:52], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s58, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s59, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s59, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s58, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s58, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[52:53], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s56, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s57, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s57, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s56, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s56, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[53:54], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s54, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s55, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s55, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s54, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s54, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_lshrrev_b64 v[54:55], 16, v[18:19] +; VI-NEXT: v_cndmask_b32_e32 v18, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s52, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s53, 16 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s53, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v39, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s52, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[15:16] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s4, v32 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: s_lshl_b32 s4, s52, 16 +; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s52, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v17 +; VI-NEXT: v_cndmask_b32_e32 v16, v3, v5, vcc ; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v15, v5, v7, vcc ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s37, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: s_lshl_b32 s4, s39, 16 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc -; VI-NEXT: v_add_f32_e32 v5, s4, v32 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s4, v32 -; VI-NEXT: v_mov_b32_e32 v1, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v7, v9, vcc -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: s_lshl_b32 s4, s41, 16 -; VI-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc -; VI-NEXT: v_add_f32_e32 v7, s4, v32 -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v3 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s4, v32 -; VI-NEXT: v_mov_b32_e32 v3, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v9, v11, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: s_lshl_b32 s4, s43, 16 -; VI-NEXT: v_cndmask_b32_e32 v7, v9, v11, vcc -; VI-NEXT: v_add_f32_e32 v9, s4, v32 -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v5 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s4, v32 -; VI-NEXT: v_mov_b32_e32 v5, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: s_lshl_b32 s4, s45, 16 -; VI-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc -; VI-NEXT: v_add_f32_e32 v11, s4, v32 -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[15:16] -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s4, v32 -; VI-NEXT: v_mov_b32_e32 v7, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v13, v15, vcc -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: s_lshl_b32 s4, s47, 16 -; VI-NEXT: v_cndmask_b32_e32 v11, v13, v15, vcc -; VI-NEXT: v_add_f32_e32 v13, s4, v32 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v9 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v32 -; VI-NEXT: v_mov_b32_e32 v9, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: s_lshl_b32 s4, s49, 16 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v17, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v15, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v11 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v15 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_add_f32_e32 v15, s4, v32 +; VI-NEXT: v_lshrrev_b64 v[39:40], 16, v[39:40] +; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v1 +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] +; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[16:17] +; VI-NEXT: v_mov_b32_e32 v1, v38 +; VI-NEXT: v_mov_b32_e32 v3, v37 +; VI-NEXT: v_mov_b32_e32 v5, v36 +; VI-NEXT: v_mov_b32_e32 v7, v35 +; VI-NEXT: v_mov_b32_e32 v9, v34 ; VI-NEXT: v_mov_b32_e32 v11, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v17, v19, vcc -; VI-NEXT: v_bfe_u32 v17, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v15 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: s_lshl_b32 s4, s51, 16 -; VI-NEXT: v_cndmask_b32_e32 v15, v17, v19, vcc -; VI-NEXT: v_add_f32_e32 v17, s4, v32 -; VI-NEXT: v_bfe_u32 v19, v17, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: s_and_b32 s4, s53, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; VI-NEXT: v_add_f32_e32 v17, s4, v32 -; VI-NEXT: v_mov_b32_e32 v13, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v19, v21, vcc -; VI-NEXT: v_bfe_u32 v19, v17, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; VI-NEXT: s_lshl_b32 s4, s53, 16 -; VI-NEXT: v_cndmask_b32_e32 v17, v19, v21, vcc -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v15 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: s_and_b32 s4, s55, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_mov_b32_e32 v15, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v21, v23, vcc -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: s_lshl_b32 s4, s55, 16 -; VI-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v17 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: s_and_b32 s4, s57, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_mov_b32_e32 v17, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v23, v25, vcc -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: s_lshl_b32 s4, s57, 16 -; VI-NEXT: v_cndmask_b32_e32 v21, v23, v25, vcc -; VI-NEXT: v_add_f32_e32 v23, s4, v32 -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v19 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: s_and_b32 s4, s59, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: v_add_f32_e32 v23, s4, v32 -; VI-NEXT: v_mov_b32_e32 v19, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v25, v27, vcc -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: s_lshl_b32 s4, s59, 16 -; VI-NEXT: v_cndmask_b32_e32 v23, v25, v27, vcc -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: s_and_b32 s4, s61, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_mov_b32_e32 v21, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v27, v29, vcc -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: s_lshl_b32 s4, s61, 16 -; VI-NEXT: v_cndmask_b32_e32 v25, v27, v29, vcc -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v23 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: s_and_b32 s4, s63, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_mov_b32_e32 v23, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v29, v31, vcc -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: s_lshl_b32 s4, s63, 16 -; VI-NEXT: v_cndmask_b32_e32 v27, v29, v31, vcc -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v25 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: s_and_b32 s4, s65, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v25, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v31, v33, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v27 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: v_mov_b32_e32 v27, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: s_lshl_b32 s4, s65, 16 -; VI-NEXT: v_cndmask_b32_e32 v29, v31, v33, vcc -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: s_and_b32 s4, s67, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_mov_b32_e32 v29, v33 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: s_lshl_b32 s4, s67, 16 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v32, v31, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_add_u32_e32 v32, vcc, v32, v31 -; VI-NEXT: v_add_u32_e32 v32, vcc, 0x7fff, v32 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v31, v32, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v33 -; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[31:32] +; VI-NEXT: v_mov_b32_e32 v13, v15 +; VI-NEXT: v_mov_b32_e32 v15, v32 +; VI-NEXT: v_mov_b32_e32 v17, v39 +; VI-NEXT: v_mov_b32_e32 v19, v54 +; VI-NEXT: v_mov_b32_e32 v21, v53 +; VI-NEXT: v_mov_b32_e32 v23, v52 +; VI-NEXT: v_mov_b32_e32 v25, v51 +; VI-NEXT: v_mov_b32_e32 v27, v50 +; VI-NEXT: v_mov_b32_e32 v29, v49 +; VI-NEXT: v_mov_b32_e32 v31, v48 ; VI-NEXT: s_branch .LBB79_5 ; VI-NEXT: .LBB79_3: ; VI-NEXT: s_branch .LBB79_2 @@ -130495,24 +130634,25 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg ; VI-NEXT: v_mov_b32_e32 v30, s66 ; VI-NEXT: v_mov_b32_e32 v31, s67 ; VI-NEXT: .LBB79_5: ; %end -; VI-NEXT: v_readlane_b32 s67, v35, 15 -; VI-NEXT: v_readlane_b32 s66, v35, 14 -; VI-NEXT: v_readlane_b32 s65, v35, 13 -; VI-NEXT: v_readlane_b32 s64, v35, 12 -; VI-NEXT: v_readlane_b32 s55, v35, 11 -; VI-NEXT: v_readlane_b32 s54, v35, 10 -; VI-NEXT: v_readlane_b32 s53, v35, 9 -; VI-NEXT: v_readlane_b32 s52, v35, 8 -; VI-NEXT: v_readlane_b32 s51, v35, 7 -; VI-NEXT: v_readlane_b32 s50, v35, 6 -; VI-NEXT: v_readlane_b32 s49, v35, 5 -; VI-NEXT: v_readlane_b32 s48, v35, 4 -; VI-NEXT: v_readlane_b32 s39, v35, 3 -; VI-NEXT: v_readlane_b32 s38, v35, 2 -; VI-NEXT: v_readlane_b32 s37, v35, 1 -; VI-NEXT: v_readlane_b32 s36, v35, 0 -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: v_readlane_b32 s67, v41, 15 +; VI-NEXT: v_readlane_b32 s66, v41, 14 +; VI-NEXT: v_readlane_b32 s65, v41, 13 +; VI-NEXT: v_readlane_b32 s64, v41, 12 +; VI-NEXT: v_readlane_b32 s55, v41, 11 +; VI-NEXT: v_readlane_b32 s54, v41, 10 +; VI-NEXT: v_readlane_b32 s53, v41, 9 +; VI-NEXT: v_readlane_b32 s52, v41, 8 +; VI-NEXT: v_readlane_b32 s51, v41, 7 +; VI-NEXT: v_readlane_b32 s50, v41, 6 +; VI-NEXT: v_readlane_b32 s49, v41, 5 +; VI-NEXT: v_readlane_b32 s48, v41, 4 +; VI-NEXT: v_readlane_b32 s39, v41, 3 +; VI-NEXT: v_readlane_b32 s38, v41, 2 +; VI-NEXT: v_readlane_b32 s37, v41, 1 +; VI-NEXT: v_readlane_b32 s36, v41, 0 +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -130593,34 +130733,34 @@ define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v16 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_lshl_b32 s4, s50, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s4, v16 ; GFX9-NEXT: v_mov_b32_e32 v32, 0xffff -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v15, v0, 16, v1 ; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_b32_sdwa v3, v32, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_lshl_or_b32 v14, v2, 16, v3 +; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 +; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: s_lshl_b32 s4, s50, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 +; GFX9-NEXT: v_lshl_or_b32 v14, v0, 16, v1 +; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 +; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 ; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 ; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 @@ -132767,34 +132907,34 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; SI-NEXT: ; implicit-def: $vgpr57 +; SI-NEXT: ; implicit-def: $vgpr47 ; SI-NEXT: ; implicit-def: $vgpr63 -; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr44 ; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr61 -; SI-NEXT: ; implicit-def: $vgpr40 +; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr45 +; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr44 +; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr41 +; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr55 ; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr53 ; SI-NEXT: ; implicit-def: $vgpr51 @@ -132818,21 +132958,21 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v49, v13, v12, 16 ; SI-NEXT: v_alignbit_b32 v50, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v52, v9, v8, 16 -; SI-NEXT: v_alignbit_b32 v40, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v43, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v46, v3, v2, 16 -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_alignbit_b32 v57, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v54, v7, v6, 16 +; SI-NEXT: v_alignbit_b32 v41, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v44, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v47, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v31 ; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v15 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v13 ; SI-NEXT: s_waitcnt expcnt(5) ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v11 ; SI-NEXT: s_waitcnt expcnt(4) @@ -132878,21 +133018,21 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v49, v13, v12, 16 ; SI-NEXT: v_alignbit_b32 v50, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v52, v9, v8, 16 -; SI-NEXT: v_alignbit_b32 v40, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v43, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v46, v3, v2, 16 -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_alignbit_b32 v57, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v54, v7, v6, 16 +; SI-NEXT: v_alignbit_b32 v41, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v44, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v47, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v31 ; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v15 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v13 ; SI-NEXT: s_waitcnt expcnt(5) ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v11 ; SI-NEXT: s_waitcnt expcnt(4) @@ -132907,27 +133047,23 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v1 ; SI-NEXT: .LBB80_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v57 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v47 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v44 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40 -; SI-NEXT: v_or_b32_e32 v0, v0, v57 +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v41 +; SI-NEXT: v_or_b32_e32 v0, v0, v47 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v63 -; SI-NEXT: v_or_b32_e32 v2, v2, v46 +; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v63 +; SI-NEXT: v_or_b32_e32 v2, v2, v44 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v62 -; SI-NEXT: v_or_b32_e32 v4, v4, v43 +; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v62 +; SI-NEXT: v_or_b32_e32 v4, v4, v41 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v61 -; SI-NEXT: v_or_b32_e32 v6, v6, v40 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v60 +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v61 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v54 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v52 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -132944,26 +133080,31 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 -; SI-NEXT: v_or_b32_e32 v1, v1, v57 -; SI-NEXT: v_or_b32_e32 v3, v3, v46 -; SI-NEXT: v_or_b32_e32 v5, v5, v43 -; SI-NEXT: v_or_b32_e32 v7, v7, v40 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 +; SI-NEXT: v_or_b32_e32 v1, v1, v47 +; SI-NEXT: v_or_b32_e32 v3, v3, v44 +; SI-NEXT: v_or_b32_e32 v5, v5, v41 +; SI-NEXT: v_or_b32_e32 v6, v6, v54 +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v60 ; SI-NEXT: v_or_b32_e32 v8, v8, v52 ; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v59 ; SI-NEXT: v_or_b32_e32 v10, v10, v50 ; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v58 ; SI-NEXT: v_or_b32_e32 v12, v12, v49 -; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v56 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v57 ; SI-NEXT: v_or_b32_e32 v14, v14, v48 -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v56 ; SI-NEXT: v_or_b32_e32 v16, v16, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v46 ; SI-NEXT: v_or_b32_e32 v18, v18, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v45 ; SI-NEXT: v_or_b32_e32 v20, v20, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v42 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43 ; SI-NEXT: v_or_b32_e32 v22, v22, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v41 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42 +; SI-NEXT: v_or_b32_e32 v24, v24, v35 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload @@ -132981,14 +133122,13 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 @@ -132997,12 +133137,10 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_or_b32_e32 v24, v24, v35 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v55 ; SI-NEXT: v_or_b32_e32 v26, v26, v34 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v54 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v55 ; SI-NEXT: v_or_b32_e32 v28, v28, v33 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v53 @@ -133010,6 +133148,7 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v51 +; SI-NEXT: v_or_b32_e32 v7, v7, v54 ; SI-NEXT: v_or_b32_e32 v9, v9, v52 ; SI-NEXT: v_or_b32_e32 v11, v11, v50 ; SI-NEXT: v_or_b32_e32 v13, v13, v49 @@ -133028,9 +133167,9 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; VI-LABEL: bitcast_v16f64_to_v64f16: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] @@ -133045,6 +133184,7 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 ; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 ; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; VI-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; VI-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -133055,14 +133195,15 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 ; VI-NEXT: .LBB80_2: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v16f64_to_v64f16: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] @@ -133077,6 +133218,7 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 ; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; GFX9-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; GFX9-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -133087,6 +133229,7 @@ define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 ; GFX9-NEXT: .LBB80_2: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-LABEL: bitcast_v16f64_to_v64f16: @@ -133146,7 +133289,7 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -133224,13 +133367,13 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a ; SI-NEXT: s_lshr_b32 s39, s19, 16 ; SI-NEXT: s_lshr_b32 s38, s17, 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16 ; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16 ; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16 @@ -133243,24 +133386,21 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a ; SI-NEXT: .LBB81_2: ; %cmp.true ; SI-NEXT: v_add_f64 v[28:29], s[42:43], 1.0 ; SI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 -; SI-NEXT: v_add_f64 v[30:31], s[44:45], 1.0 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v29 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v27 ; SI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[32:33], v[30:31], 16 +; SI-NEXT: v_add_f64 v[30:31], s[44:45], 1.0 ; SI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 ; SI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; SI-NEXT: v_lshr_b64 v[33:34], v[28:29], 16 ; SI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 ; SI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v17 ; SI-NEXT: v_lshr_b64 v[34:35], v[26:27], 16 ; SI-NEXT: v_lshr_b64 v[48:49], v[16:17], 16 ; SI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 ; SI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[0:1], v[30:31], 16 ; SI-NEXT: v_lshr_b64 v[35:36], v[24:25], 16 ; SI-NEXT: v_lshr_b64 v[49:50], v[14:15], 16 ; SI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 @@ -133269,21 +133409,26 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a ; SI-NEXT: v_lshr_b64 v[50:51], v[12:13], 16 ; SI-NEXT: v_add_f64 v[6:7], s[22:23], 1.0 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: v_lshr_b64 v[37:38], v[20:21], 16 ; SI-NEXT: v_lshr_b64 v[51:52], v[10:11], 16 ; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[38:39], v[18:19], 16 ; SI-NEXT: v_lshr_b64 v[52:53], v[8:9], 16 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[53:54], v[6:7], 16 ; SI-NEXT: v_lshr_b64 v[39:40], v[2:3], 16 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v31 ; SI-NEXT: v_lshr_b64 v[54:55], v[4:5], 16 ; SI-NEXT: v_lshr_b64 v[40:41], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v13 ; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v11 @@ -133291,8 +133436,8 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a ; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v31 +; SI-NEXT: v_mov_b32_e32 v41, v57 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v1 ; SI-NEXT: s_branch .LBB81_5 ; SI-NEXT: .LBB81_3: ; SI-NEXT: ; implicit-def: $sgpr36 @@ -133311,40 +133456,28 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a ; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr55 -; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr65 -; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr67 +; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; implicit-def: $sgpr69 -; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr69 ; SI-NEXT: s_branch .LBB81_2 ; SI-NEXT: .LBB81_4: -; SI-NEXT: v_mov_b32_e32 v32, s68 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v32, s67 -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v6, s22 -; SI-NEXT: v_mov_b32_e32 v9, s25 -; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v11, s27 -; SI-NEXT: v_mov_b32_e32 v10, s26 +; SI-NEXT: v_mov_b32_e32 v33, s54 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_mov_b32_e32 v58, s53 +; SI-NEXT: v_mov_b32_e32 v57, s46 ; SI-NEXT: v_mov_b32_e32 v31, s45 ; SI-NEXT: v_mov_b32_e32 v29, s43 ; SI-NEXT: v_mov_b32_e32 v27, s41 @@ -133355,6 +133488,18 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v17, s7 ; SI-NEXT: v_mov_b32_e32 v15, s5 ; SI-NEXT: v_mov_b32_e32 v13, s29 +; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v4, s20 +; SI-NEXT: v_mov_b32_e32 v6, s22 +; SI-NEXT: v_mov_b32_e32 v8, s24 +; SI-NEXT: v_mov_b32_e32 v10, s26 ; SI-NEXT: v_mov_b32_e32 v12, s28 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: v_mov_b32_e32 v16, s6 @@ -133366,20 +133511,24 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v28, s42 ; SI-NEXT: v_mov_b32_e32 v30, s44 ; SI-NEXT: v_mov_b32_e32 v41, s69 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v45, s66 -; SI-NEXT: v_mov_b32_e32 v46, s65 -; SI-NEXT: v_mov_b32_e32 v47, s64 -; SI-NEXT: v_mov_b32_e32 v56, s55 -; SI-NEXT: v_mov_b32_e32 v57, s54 -; SI-NEXT: v_mov_b32_e32 v58, s53 +; SI-NEXT: v_mov_b32_e32 v44, s68 +; SI-NEXT: v_mov_b32_e32 v45, s67 +; SI-NEXT: v_mov_b32_e32 v46, s66 +; SI-NEXT: v_mov_b32_e32 v47, s65 +; SI-NEXT: v_mov_b32_e32 v56, s64 +; SI-NEXT: v_mov_b32_e32 v32, s55 +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(4) ; SI-NEXT: v_mov_b32_e32 v59, s52 +; SI-NEXT: s_waitcnt expcnt(3) ; SI-NEXT: v_mov_b32_e32 v60, s51 +; SI-NEXT: s_waitcnt expcnt(2) ; SI-NEXT: v_mov_b32_e32 v61, s50 +; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_mov_b32_e32 v62, s49 ; SI-NEXT: v_mov_b32_e32 v42, s48 ; SI-NEXT: v_mov_b32_e32 v43, s39 -; SI-NEXT: v_mov_b32_e32 v44, s38 +; SI-NEXT: v_mov_b32_e32 v55, s38 ; SI-NEXT: v_mov_b32_e32 v40, s36 ; SI-NEXT: v_mov_b32_e32 v39, s34 ; SI-NEXT: v_mov_b32_e32 v54, s30 @@ -133388,90 +133537,116 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v51, s90 ; SI-NEXT: v_mov_b32_e32 v50, s88 ; SI-NEXT: v_mov_b32_e32 v49, s78 -; SI-NEXT: v_mov_b32_e32 v48, s74 -; SI-NEXT: v_mov_b32_e32 v38, s72 -; SI-NEXT: v_mov_b32_e32 v37, s62 -; SI-NEXT: v_mov_b32_e32 v36, s58 -; SI-NEXT: v_mov_b32_e32 v35, s56 -; SI-NEXT: v_mov_b32_e32 v34, s76 -; SI-NEXT: v_mov_b32_e32 v33, s60 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v32, s46 +; SI-NEXT: v_mov_b32_e32 v48, s76 +; SI-NEXT: v_mov_b32_e32 v38, s74 +; SI-NEXT: v_mov_b32_e32 v37, s72 +; SI-NEXT: v_mov_b32_e32 v36, s62 +; SI-NEXT: v_mov_b32_e32 v35, s60 +; SI-NEXT: v_mov_b32_e32 v34, s58 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v33, s56 +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: .LBB81_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 +; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 +; SI-NEXT: v_or_b32_e32 v28, v28, v33 +; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v44 +; SI-NEXT: v_or_b32_e32 v18, v18, v38 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v32 +; SI-NEXT: v_or_b32_e32 v29, v29, v33 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 ; SI-NEXT: v_or_b32_e32 v2, v2, v39 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v43 ; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v54 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v54 ; SI-NEXT: v_or_b32_e32 v4, v4, v39 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v42 ; SI-NEXT: v_or_b32_e32 v5, v5, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53 ; SI-NEXT: v_or_b32_e32 v6, v6, v39 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v62 ; SI-NEXT: v_or_b32_e32 v7, v7, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52 ; SI-NEXT: v_or_b32_e32 v8, v8, v39 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61 ; SI-NEXT: v_or_b32_e32 v9, v9, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51 ; SI-NEXT: v_or_b32_e32 v10, v10, v39 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60 ; SI-NEXT: v_or_b32_e32 v11, v11, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 ; SI-NEXT: v_or_b32_e32 v12, v12, v39 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40 ; SI-NEXT: v_or_b32_e32 v13, v13, v39 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 -; SI-NEXT: v_or_b32_e32 v14, v14, v39 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58 -; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v40 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v15, v15, v39 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_or_b32_e32 v0, v0, v55 -; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v44 -; SI-NEXT: v_or_b32_e32 v16, v16, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57 -; SI-NEXT: v_or_b32_e32 v18, v18, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v56 +; SI-NEXT: v_or_b32_e32 v0, v0, v40 +; SI-NEXT: v_or_b32_e32 v14, v14, v39 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58 ; SI-NEXT: v_or_b32_e32 v20, v20, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v56 ; SI-NEXT: v_or_b32_e32 v22, v22, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v47 ; SI-NEXT: v_or_b32_e32 v24, v24, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v46 +; SI-NEXT: v_or_b32_e32 v26, v26, v34 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v45 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v15, v15, v39 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 +; SI-NEXT: v_or_b32_e32 v16, v16, v39 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v55 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 +; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 +; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; SI-NEXT: v_readlane_b32 s30, v63, 20 +; SI-NEXT: v_or_b32_e32 v1, v1, v55 +; SI-NEXT: v_or_b32_e32 v19, v19, v38 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_or_b32_e32 v30, v30, v32 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v41 ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload @@ -133483,30 +133658,10 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 -; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_or_b32_e32 v26, v26, v34 -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v28, v28, v33 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 -; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 -; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 -; SI-NEXT: v_readlane_b32 s30, v63, 20 -; SI-NEXT: v_or_b32_e32 v1, v1, v55 -; SI-NEXT: v_or_b32_e32 v17, v17, v39 -; SI-NEXT: v_or_b32_e32 v19, v19, v38 ; SI-NEXT: v_or_b32_e32 v21, v21, v37 ; SI-NEXT: v_or_b32_e32 v23, v23, v36 ; SI-NEXT: v_or_b32_e32 v25, v25, v35 +; SI-NEXT: v_or_b32_e32 v27, v27, v34 ; SI-NEXT: v_or_b32_e32 v31, v31, v32 ; SI-NEXT: v_readlane_b32 s31, v63, 21 ; SI-NEXT: v_readlane_b32 s69, v63, 19 @@ -133529,14 +133684,11 @@ define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a ; SI-NEXT: v_readlane_b32 s36, v63, 2 ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 -; SI-NEXT: v_or_b32_e32 v27, v27, v34 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_or_b32_e32 v29, v29, v33 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 +; SI-NEXT: v_or_b32_e32 v17, v17, v39 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -133908,15 +134060,15 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v25 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v24 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23 @@ -133929,12 +134081,12 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v20 ; SI-NEXT: v_mov_b32_e32 v52, v18 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19 ; SI-NEXT: v_mov_b32_e32 v53, v17 @@ -133974,18 +134126,18 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v43 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v44 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v56 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v58 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v59 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v60 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v61 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v62 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v45 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v58 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v59 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v61 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v62 ; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill @@ -134010,40 +134162,40 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v61 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v50 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v59 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v48 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v58 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v39 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v38 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v37 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v63 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v32 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v36 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51 @@ -134101,25 +134253,25 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr44 ; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; kill: killed $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload @@ -134147,7 +134299,7 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: s_waitcnt vmcnt(11) @@ -134181,7 +134333,7 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 @@ -134257,213 +134409,212 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB82_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v0, v63 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v50 +; SI-NEXT: v_cvt_f32_f16_e32 v0, v50 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v62 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v33 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v59 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v36 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v49 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v57 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v57 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v48 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v34 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v32 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v49 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v47 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v46 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v33 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v35 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v44 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v44 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v43 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v56 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v6, v6, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v37 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v63 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v13, v43 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v41 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v41 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v40 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v39 +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v11, v36 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v54 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v40 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v18, v54 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v34 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_cvt_f32_f16_e32 v18, v53 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v38 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v19, v53 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v37 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v29, v51 ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 ; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 -; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v13, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_cvt_f32_f16_e32 v20, v20 -; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 ; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v31, v31 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v32, v32 ; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 ; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 -; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 -; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 ; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v32, v32 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 +; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32 ; SI-NEXT: v_cvt_f16_f32_e32 v32, v32 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_or_b32_e32 v14, v16, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v17, v16 +; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; SI-NEXT: v_or_b32_e32 v17, v18, v17 +; SI-NEXT: v_or_b32_e32 v16, v18, v16 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_or_b32_e32 v17, v19, v17 +; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_or_b32_e32 v18, v19, v18 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v20 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload @@ -134507,7 +134658,7 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28 ; SI-NEXT: v_cvt_f16_f32_e32 v28, v28 ; SI-NEXT: v_or_b32_e32 v22, v24, v22 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 ; SI-NEXT: s_waitcnt vmcnt(2) @@ -134523,7 +134674,7 @@ define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 @@ -134935,17 +135086,17 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s13, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s11, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s9, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s7, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s11, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s98, 16 @@ -135434,14 +135585,17 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a ; VI-NEXT: s_lshr_b32 s4, s51, 16 ; VI-NEXT: v_mov_b32_e32 v16, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s4 -; VI-NEXT: s_lshr_b32 s4, s50, 16 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s51, v16 -; VI-NEXT: v_mov_b32_e32 v2, s4 -; VI-NEXT: s_lshr_b32 s4, s49, 16 +; VI-NEXT: s_lshr_b32 s4, s50, 16 ; VI-NEXT: v_or_b32_e32 v15, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, s50, v16 +; VI-NEXT: s_lshr_b32 s4, s49, 16 +; VI-NEXT: v_or_b32_e32 v14, v1, v0 +; VI-NEXT: v_mov_b32_e32 v0, s4 +; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s49, v16 ; VI-NEXT: s_lshr_b32 s4, s48, 16 ; VI-NEXT: v_or_b32_e32 v13, v1, v0 @@ -135491,12 +135645,9 @@ define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a ; VI-NEXT: s_lshr_b32 s4, s39, 16 ; VI-NEXT: v_or_b32_e32 v4, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 -; VI-NEXT: v_add_f16_sdwa v2, v2, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s50, v16 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s39, v16 ; VI-NEXT: s_lshr_b32 s4, s38, 16 -; VI-NEXT: v_or_b32_e32 v14, v3, v2 ; VI-NEXT: v_or_b32_e32 v3, v1, v0 ; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_add_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -135978,34 +136129,34 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; SI-NEXT: ; implicit-def: $vgpr57 +; SI-NEXT: ; implicit-def: $vgpr47 ; SI-NEXT: ; implicit-def: $vgpr63 -; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr44 ; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr61 -; SI-NEXT: ; implicit-def: $vgpr40 +; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr45 +; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr44 +; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr41 +; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr55 ; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr53 ; SI-NEXT: ; implicit-def: $vgpr51 @@ -136029,21 +136180,21 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v49, v13, v12, 16 ; SI-NEXT: v_alignbit_b32 v50, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v52, v9, v8, 16 -; SI-NEXT: v_alignbit_b32 v40, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v43, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v46, v3, v2, 16 -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_alignbit_b32 v57, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v54, v7, v6, 16 +; SI-NEXT: v_alignbit_b32 v41, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v44, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v47, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v31 ; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v15 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v13 ; SI-NEXT: s_waitcnt expcnt(5) ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v11 ; SI-NEXT: s_waitcnt expcnt(4) @@ -136089,21 +136240,21 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v49, v13, v12, 16 ; SI-NEXT: v_alignbit_b32 v50, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v52, v9, v8, 16 -; SI-NEXT: v_alignbit_b32 v40, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v43, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v46, v3, v2, 16 -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_alignbit_b32 v57, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v54, v7, v6, 16 +; SI-NEXT: v_alignbit_b32 v41, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v44, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v47, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v31 ; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v15 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v13 ; SI-NEXT: s_waitcnt expcnt(5) ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v11 ; SI-NEXT: s_waitcnt expcnt(4) @@ -136118,27 +136269,23 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v1 ; SI-NEXT: .LBB84_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v57 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v47 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v44 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40 -; SI-NEXT: v_or_b32_e32 v0, v0, v57 +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v41 +; SI-NEXT: v_or_b32_e32 v0, v0, v47 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v63 -; SI-NEXT: v_or_b32_e32 v2, v2, v46 +; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v63 +; SI-NEXT: v_or_b32_e32 v2, v2, v44 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v62 -; SI-NEXT: v_or_b32_e32 v4, v4, v43 +; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v62 +; SI-NEXT: v_or_b32_e32 v4, v4, v41 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v61 -; SI-NEXT: v_or_b32_e32 v6, v6, v40 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v60 +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v61 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v54 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v52 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -136155,26 +136302,31 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 -; SI-NEXT: v_or_b32_e32 v1, v1, v57 -; SI-NEXT: v_or_b32_e32 v3, v3, v46 -; SI-NEXT: v_or_b32_e32 v5, v5, v43 -; SI-NEXT: v_or_b32_e32 v7, v7, v40 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 +; SI-NEXT: v_or_b32_e32 v1, v1, v47 +; SI-NEXT: v_or_b32_e32 v3, v3, v44 +; SI-NEXT: v_or_b32_e32 v5, v5, v41 +; SI-NEXT: v_or_b32_e32 v6, v6, v54 +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v60 ; SI-NEXT: v_or_b32_e32 v8, v8, v52 ; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v59 ; SI-NEXT: v_or_b32_e32 v10, v10, v50 ; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v58 ; SI-NEXT: v_or_b32_e32 v12, v12, v49 -; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v56 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v57 ; SI-NEXT: v_or_b32_e32 v14, v14, v48 -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v56 ; SI-NEXT: v_or_b32_e32 v16, v16, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v46 ; SI-NEXT: v_or_b32_e32 v18, v18, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v45 ; SI-NEXT: v_or_b32_e32 v20, v20, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v42 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43 ; SI-NEXT: v_or_b32_e32 v22, v22, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v41 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42 +; SI-NEXT: v_or_b32_e32 v24, v24, v35 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload @@ -136192,14 +136344,13 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 @@ -136208,12 +136359,10 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_or_b32_e32 v24, v24, v35 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v55 ; SI-NEXT: v_or_b32_e32 v26, v26, v34 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v54 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v55 ; SI-NEXT: v_or_b32_e32 v28, v28, v33 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v53 @@ -136221,6 +136370,7 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v51 +; SI-NEXT: v_or_b32_e32 v7, v7, v54 ; SI-NEXT: v_or_b32_e32 v9, v9, v52 ; SI-NEXT: v_or_b32_e32 v11, v11, v50 ; SI-NEXT: v_or_b32_e32 v13, v13, v49 @@ -136239,9 +136389,9 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; VI-LABEL: bitcast_v16f64_to_v64i16: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] @@ -136256,6 +136406,7 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 ; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 ; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; VI-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; VI-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -136266,14 +136417,15 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; VI-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 ; VI-NEXT: .LBB84_2: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v16f64_to_v64i16: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v32 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] @@ -136288,6 +136440,7 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 ; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_f64 v[30:31], v[30:31], 1.0 ; GFX9-NEXT: v_add_f64 v[28:29], v[28:29], 1.0 ; GFX9-NEXT: v_add_f64 v[26:27], v[26:27], 1.0 @@ -136298,6 +136451,7 @@ define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 ; GFX9-NEXT: .LBB84_2: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-LABEL: bitcast_v16f64_to_v64i16: @@ -136357,7 +136511,7 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -136435,13 +136589,13 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, ; SI-NEXT: s_lshr_b32 s39, s19, 16 ; SI-NEXT: s_lshr_b32 s38, s17, 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16 ; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16 ; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16 @@ -136454,24 +136608,21 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, ; SI-NEXT: .LBB85_2: ; %cmp.true ; SI-NEXT: v_add_f64 v[28:29], s[42:43], 1.0 ; SI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 -; SI-NEXT: v_add_f64 v[30:31], s[44:45], 1.0 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v29 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v27 ; SI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[32:33], v[30:31], 16 +; SI-NEXT: v_add_f64 v[30:31], s[44:45], 1.0 ; SI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 ; SI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; SI-NEXT: v_lshr_b64 v[33:34], v[28:29], 16 ; SI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 ; SI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v17 ; SI-NEXT: v_lshr_b64 v[34:35], v[26:27], 16 ; SI-NEXT: v_lshr_b64 v[48:49], v[16:17], 16 ; SI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 ; SI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[0:1], v[30:31], 16 ; SI-NEXT: v_lshr_b64 v[35:36], v[24:25], 16 ; SI-NEXT: v_lshr_b64 v[49:50], v[14:15], 16 ; SI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 @@ -136480,21 +136631,26 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, ; SI-NEXT: v_lshr_b64 v[50:51], v[12:13], 16 ; SI-NEXT: v_add_f64 v[6:7], s[22:23], 1.0 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: v_lshr_b64 v[37:38], v[20:21], 16 ; SI-NEXT: v_lshr_b64 v[51:52], v[10:11], 16 ; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[38:39], v[18:19], 16 ; SI-NEXT: v_lshr_b64 v[52:53], v[8:9], 16 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[53:54], v[6:7], 16 ; SI-NEXT: v_lshr_b64 v[39:40], v[2:3], 16 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v31 ; SI-NEXT: v_lshr_b64 v[54:55], v[4:5], 16 ; SI-NEXT: v_lshr_b64 v[40:41], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v13 ; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v11 @@ -136502,8 +136658,8 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v31 +; SI-NEXT: v_mov_b32_e32 v41, v57 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v1 ; SI-NEXT: s_branch .LBB85_5 ; SI-NEXT: .LBB85_3: ; SI-NEXT: ; implicit-def: $sgpr36 @@ -136522,40 +136678,28 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, ; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr55 -; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr65 -; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr67 +; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; implicit-def: $sgpr69 -; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr69 ; SI-NEXT: s_branch .LBB85_2 ; SI-NEXT: .LBB85_4: -; SI-NEXT: v_mov_b32_e32 v32, s68 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v32, s67 -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v6, s22 -; SI-NEXT: v_mov_b32_e32 v9, s25 -; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v11, s27 -; SI-NEXT: v_mov_b32_e32 v10, s26 +; SI-NEXT: v_mov_b32_e32 v33, s54 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_mov_b32_e32 v58, s53 +; SI-NEXT: v_mov_b32_e32 v57, s46 ; SI-NEXT: v_mov_b32_e32 v31, s45 ; SI-NEXT: v_mov_b32_e32 v29, s43 ; SI-NEXT: v_mov_b32_e32 v27, s41 @@ -136566,6 +136710,18 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v17, s7 ; SI-NEXT: v_mov_b32_e32 v15, s5 ; SI-NEXT: v_mov_b32_e32 v13, s29 +; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v4, s20 +; SI-NEXT: v_mov_b32_e32 v6, s22 +; SI-NEXT: v_mov_b32_e32 v8, s24 +; SI-NEXT: v_mov_b32_e32 v10, s26 ; SI-NEXT: v_mov_b32_e32 v12, s28 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: v_mov_b32_e32 v16, s6 @@ -136577,20 +136733,24 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v28, s42 ; SI-NEXT: v_mov_b32_e32 v30, s44 ; SI-NEXT: v_mov_b32_e32 v41, s69 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v45, s66 -; SI-NEXT: v_mov_b32_e32 v46, s65 -; SI-NEXT: v_mov_b32_e32 v47, s64 -; SI-NEXT: v_mov_b32_e32 v56, s55 -; SI-NEXT: v_mov_b32_e32 v57, s54 -; SI-NEXT: v_mov_b32_e32 v58, s53 +; SI-NEXT: v_mov_b32_e32 v44, s68 +; SI-NEXT: v_mov_b32_e32 v45, s67 +; SI-NEXT: v_mov_b32_e32 v46, s66 +; SI-NEXT: v_mov_b32_e32 v47, s65 +; SI-NEXT: v_mov_b32_e32 v56, s64 +; SI-NEXT: v_mov_b32_e32 v32, s55 +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(4) ; SI-NEXT: v_mov_b32_e32 v59, s52 +; SI-NEXT: s_waitcnt expcnt(3) ; SI-NEXT: v_mov_b32_e32 v60, s51 +; SI-NEXT: s_waitcnt expcnt(2) ; SI-NEXT: v_mov_b32_e32 v61, s50 +; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_mov_b32_e32 v62, s49 ; SI-NEXT: v_mov_b32_e32 v42, s48 ; SI-NEXT: v_mov_b32_e32 v43, s39 -; SI-NEXT: v_mov_b32_e32 v44, s38 +; SI-NEXT: v_mov_b32_e32 v55, s38 ; SI-NEXT: v_mov_b32_e32 v40, s36 ; SI-NEXT: v_mov_b32_e32 v39, s34 ; SI-NEXT: v_mov_b32_e32 v54, s30 @@ -136599,90 +136759,116 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v51, s90 ; SI-NEXT: v_mov_b32_e32 v50, s88 ; SI-NEXT: v_mov_b32_e32 v49, s78 -; SI-NEXT: v_mov_b32_e32 v48, s74 -; SI-NEXT: v_mov_b32_e32 v38, s72 -; SI-NEXT: v_mov_b32_e32 v37, s62 -; SI-NEXT: v_mov_b32_e32 v36, s58 -; SI-NEXT: v_mov_b32_e32 v35, s56 -; SI-NEXT: v_mov_b32_e32 v34, s76 -; SI-NEXT: v_mov_b32_e32 v33, s60 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v32, s46 +; SI-NEXT: v_mov_b32_e32 v48, s76 +; SI-NEXT: v_mov_b32_e32 v38, s74 +; SI-NEXT: v_mov_b32_e32 v37, s72 +; SI-NEXT: v_mov_b32_e32 v36, s62 +; SI-NEXT: v_mov_b32_e32 v35, s60 +; SI-NEXT: v_mov_b32_e32 v34, s58 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v33, s56 +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: .LBB85_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 +; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 +; SI-NEXT: v_or_b32_e32 v28, v28, v33 +; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v44 +; SI-NEXT: v_or_b32_e32 v18, v18, v38 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v32 +; SI-NEXT: v_or_b32_e32 v29, v29, v33 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 ; SI-NEXT: v_or_b32_e32 v2, v2, v39 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v43 ; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v54 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v54 ; SI-NEXT: v_or_b32_e32 v4, v4, v39 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v42 ; SI-NEXT: v_or_b32_e32 v5, v5, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53 ; SI-NEXT: v_or_b32_e32 v6, v6, v39 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v62 ; SI-NEXT: v_or_b32_e32 v7, v7, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52 ; SI-NEXT: v_or_b32_e32 v8, v8, v39 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61 ; SI-NEXT: v_or_b32_e32 v9, v9, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51 ; SI-NEXT: v_or_b32_e32 v10, v10, v39 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60 ; SI-NEXT: v_or_b32_e32 v11, v11, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 ; SI-NEXT: v_or_b32_e32 v12, v12, v39 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40 ; SI-NEXT: v_or_b32_e32 v13, v13, v39 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 -; SI-NEXT: v_or_b32_e32 v14, v14, v39 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58 -; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v40 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v15, v15, v39 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_or_b32_e32 v0, v0, v55 -; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v44 -; SI-NEXT: v_or_b32_e32 v16, v16, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57 -; SI-NEXT: v_or_b32_e32 v18, v18, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v56 +; SI-NEXT: v_or_b32_e32 v0, v0, v40 +; SI-NEXT: v_or_b32_e32 v14, v14, v39 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58 ; SI-NEXT: v_or_b32_e32 v20, v20, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v56 ; SI-NEXT: v_or_b32_e32 v22, v22, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v47 ; SI-NEXT: v_or_b32_e32 v24, v24, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v46 +; SI-NEXT: v_or_b32_e32 v26, v26, v34 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v45 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v15, v15, v39 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 +; SI-NEXT: v_or_b32_e32 v16, v16, v39 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v55 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 +; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 +; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; SI-NEXT: v_readlane_b32 s30, v63, 20 +; SI-NEXT: v_or_b32_e32 v1, v1, v55 +; SI-NEXT: v_or_b32_e32 v19, v19, v38 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_or_b32_e32 v30, v30, v32 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v41 ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload @@ -136694,30 +136880,10 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 -; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_or_b32_e32 v26, v26, v34 -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v28, v28, v33 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 -; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 -; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 -; SI-NEXT: v_readlane_b32 s30, v63, 20 -; SI-NEXT: v_or_b32_e32 v1, v1, v55 -; SI-NEXT: v_or_b32_e32 v17, v17, v39 -; SI-NEXT: v_or_b32_e32 v19, v19, v38 ; SI-NEXT: v_or_b32_e32 v21, v21, v37 ; SI-NEXT: v_or_b32_e32 v23, v23, v36 ; SI-NEXT: v_or_b32_e32 v25, v25, v35 +; SI-NEXT: v_or_b32_e32 v27, v27, v34 ; SI-NEXT: v_or_b32_e32 v31, v31, v32 ; SI-NEXT: v_readlane_b32 s31, v63, 21 ; SI-NEXT: v_readlane_b32 s69, v63, 19 @@ -136740,14 +136906,11 @@ define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, ; SI-NEXT: v_readlane_b32 s36, v63, 2 ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 -; SI-NEXT: v_or_b32_e32 v27, v27, v34 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_or_b32_e32 v29, v29, v33 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 +; SI-NEXT: v_or_b32_e32 v17, v17, v39 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -137104,6 +137267,8 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:4 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 +; SI-NEXT: v_mov_b32_e32 v44, v10 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18 ; SI-NEXT: v_mov_b32_e32 v45, v9 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v19 ; SI-NEXT: v_mov_b32_e32 v46, v8 @@ -137122,8 +137287,8 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26 ; SI-NEXT: v_mov_b32_e32 v61, v1 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v27 +; SI-NEXT: v_mov_b32_e32 v42, v12 ; SI-NEXT: v_mov_b32_e32 v43, v11 -; SI-NEXT: v_mov_b32_e32 v44, v10 ; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill @@ -137134,18 +137299,17 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v18 ; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17 ; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v16 ; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15 ; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v45 @@ -137157,123 +137321,119 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v59 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v60 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v61 -; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v26 -; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v25 -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v24 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v23 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v22 -; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v21 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v20 -; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v19 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v18 -; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v17 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v15 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v14 -; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v31 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v35 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v11 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v10 +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v11 ; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62 -; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v0 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v10 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v9 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v8 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v7 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v5 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v4 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v29 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v30 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v63 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB86_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 -; SI-NEXT: v_or_b32_e32 v8, v8, v32 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v62 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61 @@ -137283,21 +137443,25 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v56 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: v_or_b32_e32 v0, v0, v49 -; SI-NEXT: v_or_b32_e32 v1, v1, v42 -; SI-NEXT: v_or_b32_e32 v2, v2, v34 -; SI-NEXT: v_or_b32_e32 v3, v3, v41 -; SI-NEXT: v_or_b32_e32 v4, v4, v48 -; SI-NEXT: v_or_b32_e32 v5, v5, v40 -; SI-NEXT: v_or_b32_e32 v6, v6, v33 -; SI-NEXT: v_or_b32_e32 v7, v7, v55 -; SI-NEXT: v_or_b32_e32 v9, v9, v54 -; SI-NEXT: v_or_b32_e32 v10, v10, v39 -; SI-NEXT: v_or_b32_e32 v11, v11, v53 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v43 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: v_or_b32_e32 v0, v0, v36 +; SI-NEXT: v_or_b32_e32 v1, v1, v41 +; SI-NEXT: v_or_b32_e32 v2, v2, v48 +; SI-NEXT: v_or_b32_e32 v3, v3, v40 +; SI-NEXT: v_or_b32_e32 v4, v4, v35 +; SI-NEXT: v_or_b32_e32 v5, v5, v55 +; SI-NEXT: v_or_b32_e32 v6, v6, v39 +; SI-NEXT: v_or_b32_e32 v7, v7, v54 +; SI-NEXT: v_or_b32_e32 v8, v8, v34 +; SI-NEXT: v_or_b32_e32 v9, v9, v53 +; SI-NEXT: v_or_b32_e32 v10, v10, v38 +; SI-NEXT: v_or_b32_e32 v11, v11, v52 +; SI-NEXT: v_or_b32_e32 v12, v12, v33 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr60 @@ -137309,24 +137473,34 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr55 -; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; kill: killed $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: v_or_b32_e32 v18, v18, v19 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload @@ -137346,51 +137520,45 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v12, v12, v38 -; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_or_b32_e32 v13, v13, v52 -; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v14, v14, v37 -; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; SI-NEXT: v_or_b32_e32 v13, v13, v51 +; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v26, v27 ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_or_b32_e32 v15, v15, v51 -; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_or_b32_e32 v14, v14, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v16, v16, v36 -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v15, v15, v50 +; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v28, v28, v29 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v17, v17, v50 -; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_or_b32_e32 v16, v16, v37 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v18, v18, v35 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_or_b32_e32 v17, v17, v49 +; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 ; SI-NEXT: v_or_b32_e32 v30, v30, v31 @@ -137432,34 +137600,24 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; kill: killed $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: .LBB86_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB86_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v8, v32, v8 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v62 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v61 @@ -137469,9 +137627,11 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v57 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v56 ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v47 +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v46 ; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v45 ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v44 ; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v43 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v42 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 @@ -137480,21 +137640,25 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_or_b32_e32 v0, v49, v0 -; SI-NEXT: v_or_b32_e32 v1, v42, v1 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_or_b32_e32 v0, v36, v0 +; SI-NEXT: v_or_b32_e32 v1, v41, v1 +; SI-NEXT: v_or_b32_e32 v2, v48, v2 +; SI-NEXT: v_or_b32_e32 v3, v40, v3 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v2, v34, v2 -; SI-NEXT: v_or_b32_e32 v3, v41, v3 -; SI-NEXT: v_or_b32_e32 v4, v48, v4 -; SI-NEXT: v_or_b32_e32 v5, v40, v5 -; SI-NEXT: v_or_b32_e32 v6, v33, v6 -; SI-NEXT: v_or_b32_e32 v7, v55, v7 -; SI-NEXT: v_or_b32_e32 v9, v54, v9 -; SI-NEXT: v_or_b32_e32 v10, v39, v10 -; SI-NEXT: v_or_b32_e32 v11, v53, v11 +; SI-NEXT: v_or_b32_e32 v4, v35, v4 +; SI-NEXT: v_or_b32_e32 v5, v55, v5 +; SI-NEXT: v_or_b32_e32 v6, v39, v6 +; SI-NEXT: v_or_b32_e32 v7, v54, v7 +; SI-NEXT: v_or_b32_e32 v8, v34, v8 +; SI-NEXT: v_or_b32_e32 v9, v53, v9 +; SI-NEXT: v_or_b32_e32 v10, v38, v10 +; SI-NEXT: v_or_b32_e32 v11, v52, v11 +; SI-NEXT: v_or_b32_e32 v12, v33, v12 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 @@ -137502,22 +137666,33 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v5 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v6 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_or_b32_e32 v19, v20, v19 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v7 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_or_b32_e32 v18, v19, v18 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v9 ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v10 ; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v11 +; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 +; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v19 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; SI-NEXT: v_or_b32_e32 v19, v20, v19 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v19 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v21, v20 @@ -137540,70 +137715,63 @@ define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v23, v24, v23 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v12, v38, v12 -; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v12 ; SI-NEXT: v_add_i32_e32 v23, vcc, s6, v23 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_or_b32_e32 v13, v52, v13 -; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v14, v37, v14 -; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 +; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; SI-NEXT: v_or_b32_e32 v13, v51, v13 +; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v27, v26 ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_or_b32_e32 v15, v51, v15 -; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_or_b32_e32 v14, v32, v14 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v26 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v16, v36, v16 -; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v15, v50, v15 +; SI-NEXT: v_add_i32_e32 v15, vcc, s6, v15 ; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v27 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v28, v29, v28 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v17, v50, v17 -; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 +; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_or_b32_e32 v16, v37, v16 +; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_or_b32_e32 v29, v30, v29 ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v18, v35, v18 -; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v18 +; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_or_b32_e32 v17, v49, v17 +; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v17 ; SI-NEXT: v_add_i32_e32 v29, vcc, 0x30000, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30 @@ -137976,17 +138144,17 @@ define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s12, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s10, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s8, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s6, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s10, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s98, 16 @@ -138078,14 +138246,14 @@ define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a, ; SI-NEXT: s_add_i32 s16, s16, 3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s12, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s17, s17, 3 +; SI-NEXT: s_add_i32 s36, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s10, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s10, s10, 16 -; SI-NEXT: s_or_b32 s5, s10, s5 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_add_i32 s36, s4, 0x30000 -; SI-NEXT: s_add_i32 s37, s5, 0x30000 +; SI-NEXT: s_add_i32 s37, s4, 0x30000 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s8, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 @@ -140919,1254 +141087,1294 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 -; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:116 -; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:112 -; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:108 -; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:104 -; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:100 -; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:96 -; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:92 -; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:88 -; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:84 -; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:80 -; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:76 -; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:72 -; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:68 -; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:64 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:60 -; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:56 -; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:48 -; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:44 -; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:40 -; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:36 -; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:32 -; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:28 -; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:24 -; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:20 -; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:16 -; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:12 -; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:300 ; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:384 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:288 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:280 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:272 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:296 +; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:292 +; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:288 +; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:284 +; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:280 +; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:276 +; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:272 +; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:268 +; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:264 +; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:260 +; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:256 +; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:252 ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:384 +; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:380 +; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:376 +; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:372 +; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:368 +; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:364 +; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:360 +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:356 +; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:352 +; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:348 +; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:344 +; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:340 +; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:336 +; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:332 +; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:328 +; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:324 +; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:320 +; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:316 +; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:308 +; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:304 +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:380 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:376 -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:372 -; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:368 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:364 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:360 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:356 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:352 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:348 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:344 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:340 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:332 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:156 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:324 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:148 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:316 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:140 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:308 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:136 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:304 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:132 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:128 -; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:124 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:124 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:120 -; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:108 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:104 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:100 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:96 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:92 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:88 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:84 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:80 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:76 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:72 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:68 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:64 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:60 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:56 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:52 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:48 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:44 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:40 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:36 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:32 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:28 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:20 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:16 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:12 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB88_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b32 s6, 0xc0c0004 -; VI-NEXT: v_perm_b32 v10, v37, v36, s6 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_perm_b32 v11, v59, v34, s6 -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; VI-NEXT: v_perm_b32 v12, v57, v32, s6 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_perm_b32 v13, v47, v46, s6 -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_perm_b32 v14, v43, v42, s6 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; VI-NEXT: v_perm_b32 v15, v55, v54, s6 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: v_perm_b32 v16, v51, v50, s6 -; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr36 -; VI-NEXT: ; implicit-def: $vgpr59 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; implicit-def: $vgpr47 -; VI-NEXT: ; implicit-def: $vgpr46 -; VI-NEXT: ; implicit-def: $vgpr43 -; VI-NEXT: ; implicit-def: $vgpr42 -; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v25, v54, v51, s6 +; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; VI-NEXT: v_perm_b32 v26, v45, v44, s6 +; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; VI-NEXT: v_perm_b32 v28, v49, v38, s6 +; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; VI-NEXT: v_perm_b32 v29, v42, v40, s6 +; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; VI-NEXT: v_perm_b32 v30, v56, v46, s6 +; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; VI-NEXT: v_perm_b32 v31, v60, v58, s6 +; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr54 ; VI-NEXT: ; implicit-def: $vgpr51 -; VI-NEXT: ; implicit-def: $vgpr50 -; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: ; implicit-def: $vgpr45 +; VI-NEXT: ; implicit-def: $vgpr44 +; VI-NEXT: ; kill: killed $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr56 +; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr60 +; VI-NEXT: ; implicit-def: $vgpr58 +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v0, v1, v0, s6 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_perm_b32 v27, v32, v27, s6 +; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; VI-NEXT: v_perm_b32 v32, v63, v62, s6 +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; VI-NEXT: ; implicit-def: $vgpr63 +; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s6 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s6 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v2, v1, s6 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s6 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v3, v4, v3, s6 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v4, v5, v4, s6 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; VI-NEXT: v_or_b32_e32 v3, v3, v4 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v4, v5, v4, s6 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v5, v6, v5, s6 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_e32 v4, v4, v5 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v5, v6, v5, s6 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_e32 v5, v5, v6 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v6, v6, v7 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v8, v8, v9, s6 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; VI-NEXT: v_perm_b32 v9, v39, v62, s6 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_perm_b32 v8, v38, v61, s6 +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v8, v9, v8, s6 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v9, v10, v9, s6 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 -; VI-NEXT: v_perm_b32 v9, v35, v60, s6 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v9, v10, v9, s6 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v10, v11, v10, s6 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 -; VI-NEXT: v_perm_b32 v10, v33, v58, s6 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v10, v11, v10, s6 +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v12, v11, s6 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; VI-NEXT: v_or_b32_e32 v10, v10, v11 -; VI-NEXT: v_perm_b32 v11, v63, v56, s6 +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v12, v11, s6 +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v12, v13, v12, s6 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 -; VI-NEXT: v_perm_b32 v12, v45, v44, s6 +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v12, v13, v12, s6 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v13, v14, v13, s6 +; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; VI-NEXT: v_or_b32_e32 v12, v12, v13 -; VI-NEXT: v_perm_b32 v13, v41, v40, s6 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v13, v14, v13, s6 +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v14, v15, v14, s6 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: v_perm_b32 v14, v53, v52, s6 +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v14, v15, v14, s6 +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v15, v16, v15, s6 +; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_or_b32_e32 v14, v14, v15 -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; VI-NEXT: ; implicit-def: $vgpr38 -; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; implicit-def: $vgpr35 -; VI-NEXT: ; implicit-def: $vgpr60 -; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; implicit-def: $vgpr63 -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: ; implicit-def: $vgpr45 -; VI-NEXT: ; implicit-def: $vgpr44 -; VI-NEXT: ; implicit-def: $vgpr41 -; VI-NEXT: ; implicit-def: $vgpr40 -; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v15, v16, v15, s6 +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v49, v15, s6 +; VI-NEXT: v_perm_b32 v16, v17, v16, s6 +; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; VI-NEXT: v_or_b32_e32 v15, v15, v16 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v16, v17, v16, s6 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v17, v18, v17, s6 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; VI-NEXT: v_or_b32_e32 v16, v16, v17 +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v18, v19, v18, s6 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v17, v18, v17, s6 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v20, v19, s6 -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; VI-NEXT: v_or_b32_e32 v17, v18, v19 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v18, v19, v18, s6 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; VI-NEXT: v_or_b32_e32 v17, v17, v18 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v19, v18, s6 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v19, v20, v19, s6 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; VI-NEXT: v_or_b32_e32 v18, v18, v19 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v19, v20, v19, s6 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v20, v21, v20, s6 ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; VI-NEXT: v_or_b32_e32 v19, v19, v20 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v20, v20, v21, s6 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v20, v21, v20, s6 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v21, v22, v21, s6 ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; VI-NEXT: v_or_b32_e32 v20, v20, v21 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v21, v21, v22, s6 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v21, v22, v21, s6 +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v22, v23, v22, s6 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; VI-NEXT: v_or_b32_e32 v21, v21, v22 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v22, v23, v22, s6 -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v23, v23, v24, s6 +; VI-NEXT: v_perm_b32 v23, v24, v23, s6 ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; VI-NEXT: v_or_b32_e32 v22, v22, v23 -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v23, v24, v23, s6 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v24, v25, v24, s6 +; VI-NEXT: v_perm_b32 v24, v36, v34, s6 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v24, v25, v24, s6 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v25, v25, v26, s6 -; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; VI-NEXT: v_perm_b32 v24, v37, v35, s6 ; VI-NEXT: v_or_b32_e32 v24, v24, v25 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v25, v26, v25, s6 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s6 -; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; VI-NEXT: v_perm_b32 v25, v55, v52, s6 ; VI-NEXT: v_or_b32_e32 v25, v25, v26 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s6 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v28, v27, s6 -; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; VI-NEXT: v_perm_b32 v26, v53, v48, s6 ; VI-NEXT: v_or_b32_e32 v26, v26, v27 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v27, v28, s6 -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr35 +; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr53 +; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v29, v28, s6 -; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; VI-NEXT: v_perm_b32 v27, v33, v27, s6 ; VI-NEXT: v_or_b32_e32 v27, v27, v28 -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v29, v28, s6 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v30, v29, s6 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; VI-NEXT: v_perm_b32 v28, v50, v39, s6 ; VI-NEXT: v_or_b32_e32 v28, v28, v29 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v29, v30, s6 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v30, v31, v30, s6 -; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; VI-NEXT: v_perm_b32 v29, v43, v41, s6 ; VI-NEXT: v_or_b32_e32 v29, v29, v30 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v30, v31, v30, s6 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v31, v32, v31, s6 -; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; VI-NEXT: v_perm_b32 v30, v57, v47, s6 ; VI-NEXT: v_or_b32_e32 v30, v30, v31 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_perm_b32 v31, v31, v48, s6 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v32, v33, v32, s6 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: v_perm_b32 v31, v61, v59, s6 ; VI-NEXT: v_or_b32_e32 v31, v31, v32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; kill: killed $vgpr33 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: ; implicit-def: $vgpr50 +; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr43 +; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr47 +; VI-NEXT: ; implicit-def: $vgpr61 +; VI-NEXT: ; implicit-def: $vgpr59 ; VI-NEXT: .LBB88_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB88_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v18, 0x300 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v61 -; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v60 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58 -; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v56 -; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v44 -; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v40 -; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v52 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_add_u16_e32 v0, 3, v0 -; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v0, 3, v63 +; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v62 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 -; VI-NEXT: s_waitcnt vmcnt(12) -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; VI-NEXT: s_waitcnt vmcnt(11) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 +; VI-NEXT: v_add_u16_e32 v1, 3, v61 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v59 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v1, 3, v60 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v58 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v2, 3, v57 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v47 +; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v2, 3, v56 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v46 +; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v3, 3, v43 +; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v41 +; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v3, 3, v42 +; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v40 +; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v4, 3, v50 +; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v39 +; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v4, 3, v49 +; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v38 +; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v5, 3, v33 +; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v48 +; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v52 +; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v35 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(10) -; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; VI-NEXT: s_waitcnt vmcnt(9) ; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 -; VI-NEXT: s_waitcnt vmcnt(8) -; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v5, 3, v32 ; VI-NEXT: s_waitcnt vmcnt(7) -; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v10 ; VI-NEXT: s_waitcnt vmcnt(6) -; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 +; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v11 ; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v12 ; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_lshlrev_b16_e32 v20, 8, v20 +; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v13 ; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v9 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v1, 3, v1 -; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v2, 3, v2 -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v4, v0, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v0, v2, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 0x300, v3 -; VI-NEXT: v_or_b32_e32 v0, v2, v0 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_e32 v1, v1, v4 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_add_u16_e32 v2, 3, v2 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; VI-NEXT: v_add_u16_sdwa v2, v2, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v3, 0x300, v3 -; VI-NEXT: v_or_b32_e32 v2, v3, v2 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v3, v3, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v4, 3, v4 -; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v4, 0x300, v4 -; VI-NEXT: v_or_b32_e32 v3, v4, v3 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v4, 3, v4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v4, v4, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v5, 3, v5 -; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v5, 0x300, v5 -; VI-NEXT: v_or_b32_e32 v4, v5, v4 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v5, 3, v5 -; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 ; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v5, v5, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v6, 3, v6 +; VI-NEXT: v_add_u16_e32 v6, 3, v53 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v6, 0x300, v6 -; VI-NEXT: v_or_b32_e32 v5, v6, v5 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v6, 3, v6 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v6, 3, v45 +; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v44 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v6, v6, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v7, 3, v7 +; VI-NEXT: v_add_u16_e32 v7, 3, v55 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v7, 0x300, v7 -; VI-NEXT: v_or_b32_e32 v6, v7, v6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v7, 3, v7 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v7, 3, v54 +; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v51 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v7, v7, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v8, 3, v8 +; VI-NEXT: v_add_u16_e32 v8, 3, v37 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v8, 0x300, v8 -; VI-NEXT: v_or_b32_e32 v7, v8, v7 -; VI-NEXT: v_add_u16_e32 v8, 3, v39 -; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v62 +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v8, 3, v36 +; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v34 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v9, 3, v38 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v9, 3, v9 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v8, v8, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v9, 0x300, v9 -; VI-NEXT: v_or_b32_e32 v8, v9, v8 -; VI-NEXT: v_add_u16_e32 v9, 3, v37 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v36 +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v9, 3, v9 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v10 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v10, 3, v35 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v10, 3, v10 ; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v9, v9, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v10, 0x300, v10 -; VI-NEXT: v_or_b32_e32 v9, v10, v9 -; VI-NEXT: v_add_u16_e32 v10, 3, v59 -; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v34 +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v10, 3, v10 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v11 ; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v11, 3, v33 +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v11, 3, v11 ; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v10, v10, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v11, 0x300, v11 -; VI-NEXT: v_or_b32_e32 v10, v11, v10 -; VI-NEXT: v_add_u16_e32 v11, 3, v57 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v32 +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v11, 3, v11 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v12 ; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v12, 3, v63 +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v12, 3, v12 ; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v11, v11, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v12, 0x300, v12 -; VI-NEXT: v_or_b32_e32 v11, v12, v11 -; VI-NEXT: v_add_u16_e32 v12, 3, v47 -; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v46 +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v12, 3, v12 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v13 ; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v13, 3, v45 -; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v12, v12, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v13, 0x300, v13 -; VI-NEXT: v_or_b32_e32 v12, v13, v12 -; VI-NEXT: v_add_u16_e32 v13, 3, v43 -; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v42 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v14, 3, v41 -; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v13, v13, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v14, 0x300, v14 -; VI-NEXT: v_or_b32_e32 v13, v14, v13 -; VI-NEXT: v_add_u16_e32 v14, 3, v55 -; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v54 -; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v15, 3, v53 -; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v14, v14, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v15, 0x300, v15 -; VI-NEXT: v_or_b32_e32 v14, v15, v14 -; VI-NEXT: v_add_u16_e32 v15, 3, v51 -; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v50 -; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v16, 3, v49 -; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v15, v15, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v16, 0x300, v16 -; VI-NEXT: v_or_b32_e32 v15, v16, v15 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_add_u16_e32 v16, 3, v16 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 -; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v17, 3, v17 -; VI-NEXT: v_or_b32_sdwa v17, v19, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v17, 0x300, v17 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v19, 3, v19 -; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v32, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v20, 3, v20 -; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v21, v16, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v16, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v19, 0x300, v20 -; VI-NEXT: v_or_b32_e32 v16, v19, v16 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_e32 v17, v17, v21 -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v48 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v18, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v18, 0x300, v18 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v19, 3, v19 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v20, 8, v20 -; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v34, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v20, 3, v20 -; VI-NEXT: v_or_b32_sdwa v31, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v31, 0x300, v31 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v17, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v17, 0x300, v17 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v20, 3, v20 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 -; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v36, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 -; VI-NEXT: v_or_b32_sdwa v30, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v30, 0x300, v30 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v16, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v16, 0x300, v16 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v33, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v33, v33, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v37, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v29, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v29, 0x300, v29 -; VI-NEXT: v_or_b32_e32 v29, v29, v33 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v15, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v15, 0x300, v15 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v35, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v35, v35, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v38, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v28, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v28, 0x300, v28 -; VI-NEXT: v_or_b32_e32 v28, v28, v35 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v14, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v14, 0x300, v14 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v37, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v37, v37, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_e32 v13, 3, v13 +; VI-NEXT: v_or_b32_sdwa v39, v33, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 +; VI-NEXT: v_or_b32_sdwa v13, v33, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v27, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v27, 0x300, v27 -; VI-NEXT: v_or_b32_e32 v27, v27, v37 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v33, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v13, 0x300, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v38, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v38, v38, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v35, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v48, v35, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v26, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v26, 0x300, v26 -; VI-NEXT: v_or_b32_e32 v26, v26, v38 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v33, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v39, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v39, v39, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v35, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v33, v35, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v33, 0x300, v33 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v25, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v25, 0x300, v25 -; VI-NEXT: v_or_b32_e32 v25, v25, v39 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v35, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v48, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v48, v48, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v49, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v49, v49, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v24, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v24, 0x300, v24 -; VI-NEXT: v_or_b32_e32 v24, v24, v48 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v35, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v49, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v49, v49, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v50, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v35, v50, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v35, 0x300, v35 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v23, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v23, 0x300, v23 -; VI-NEXT: v_or_b32_e32 v23, v23, v49 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v50, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v50, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v50, v50, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v51, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v50, v51, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v22, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v22, 0x300, v22 -; VI-NEXT: v_or_b32_e32 v22, v22, v50 +; VI-NEXT: v_add_u16_e32 v51, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 -; VI-NEXT: v_or_b32_sdwa v51, v32, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v51, v51, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v52, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v51, v52, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 -; VI-NEXT: v_or_b32_sdwa v21, v32, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v21, 0x300, v21 -; VI-NEXT: v_or_b32_e32 v21, v21, v51 +; VI-NEXT: v_add_u16_e32 v52, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 -; VI-NEXT: v_or_b32_sdwa v52, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_lshlrev_b16_e32 v53, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v52, v53, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v36, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v36, 0x300, v36 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_add_u16_e32 v53, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v53, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_lshlrev_b16_e32 v54, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v53, v54, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v54, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_add_u16_e32 v54, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v55, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v32, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v34, v20, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v20, v52, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v19, v53, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v18, v55, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v20, v36, v20 -; VI-NEXT: v_or_b32_e32 v30, v30, v34 -; VI-NEXT: v_or_b32_e32 v31, v31, v32 +; VI-NEXT: v_lshlrev_b16_e32 v55, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v54, v55, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v55, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v40, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v55, v40, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v40, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v41, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v40, v41, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v41, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v42, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v41, v42, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v42, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v43, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v42, v43, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v43, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v44, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v43, v44, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v44, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v45, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v44, v45, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v45, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v46, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v45, v46, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v46, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v47, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v46, v47, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v47, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v56, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v47, v56, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v56, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v57, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v56, v57, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v57, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v58, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v57, v58, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v58, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v59, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v58, v59, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v59, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v60, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v59, v60, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v60, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v61, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v60, v61, v60 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v61, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v62, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v61, v62, v61 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v62, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v63, 8, v19 +; VI-NEXT: v_or_b32_sdwa v62, v63, v62 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_mov_b32_e32 v63, 0x300 +; VI-NEXT: v_add_u16_sdwa v32, v32, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v19, v12, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v12, v48, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_e32 v18, v18, v32 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_sdwa v20, v11, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v21, v10, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v22, v9, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v23, v8, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v24, v7, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v25, v6, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v26, v5, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v27, v4, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v28, v3, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v29, v2, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v11, v49, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_sdwa v30, v1, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v31, v0, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v0, v62, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v1, v60, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v2, v58, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v3, v56, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v4, v46, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v5, v44, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v6, v42, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v7, v40, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v8, v54, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v9, v52, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v34, v34, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v36, v36, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v37, v37, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v38, v38, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v39, v39, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v10, v50, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v11, v35, v11 +; VI-NEXT: v_or_b32_e32 v12, v33, v12 +; VI-NEXT: v_or_b32_e32 v13, v13, v39 +; VI-NEXT: v_or_b32_e32 v14, v14, v38 +; VI-NEXT: v_or_b32_e32 v15, v15, v37 +; VI-NEXT: v_or_b32_e32 v16, v16, v36 +; VI-NEXT: v_or_b32_e32 v17, v17, v34 +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_add_u16_e32 v48, 3, v48 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v52, 3, v52 +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v19, v32, v19 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_lshlrev_b16_e32 v49, 8, v49 +; VI-NEXT: v_or_b32_sdwa v48, v49, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v48 +; VI-NEXT: v_or_b32_e32 v0, v48, v0 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v61 +; VI-NEXT: v_or_b32_e32 v1, v48, v1 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v59 +; VI-NEXT: v_or_b32_e32 v2, v48, v2 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v57 +; VI-NEXT: v_or_b32_e32 v3, v48, v3 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v47 +; VI-NEXT: v_or_b32_e32 v4, v48, v4 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v45 +; VI-NEXT: v_or_b32_e32 v5, v48, v5 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v43 +; VI-NEXT: v_or_b32_e32 v6, v48, v6 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v41 +; VI-NEXT: v_or_b32_e32 v7, v48, v7 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v55 +; VI-NEXT: v_or_b32_e32 v8, v48, v8 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v53 +; VI-NEXT: v_or_b32_e32 v9, v48, v9 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v51 +; VI-NEXT: v_or_b32_e32 v10, v48, v10 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v53, 8, v53 -; VI-NEXT: v_or_b32_sdwa v52, v53, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v52, 0x300, v52 -; VI-NEXT: v_or_b32_e32 v18, v52, v18 -; VI-NEXT: v_add_u16_e32 v52, 0x300, v54 -; VI-NEXT: v_or_b32_e32 v19, v52, v19 +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v20, v32, v20 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v21, v32, v21 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v22, v32, v22 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v23, v32, v23 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v24, v32, v24 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v25, v32, v25 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v26, v32, v26 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v27, v32, v27 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v28, v32, v28 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v29, v32, v29 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v30, v32, v30 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v31, v32, v31 ; VI-NEXT: .LBB88_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload @@ -142207,39 +142415,38 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, v7 +; GFX9-NEXT: v_mov_b32_e32 v50, v6 +; GFX9-NEXT: v_mov_b32_e32 v53, v5 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v36, v3 +; GFX9-NEXT: v_mov_b32_e32 v37, v2 +; GFX9-NEXT: v_mov_b32_e32 v48, v1 +; GFX9-NEXT: v_mov_b32_e32 v52, v0 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 -; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:16 ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:32 @@ -142259,70 +142466,61 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:304 ; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:320 ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:108 -; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:160 -; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:156 -; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:152 -; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:148 -; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:144 -; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:140 -; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:136 -; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:132 -; GFX9-NEXT: s_waitcnt vmcnt(27) -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; GFX9-NEXT: s_waitcnt vmcnt(26) -; GFX9-NEXT: v_lshlrev_b16_e32 v53, 8, v1 -; GFX9-NEXT: s_waitcnt vmcnt(25) -; GFX9-NEXT: v_lshlrev_b16_e32 v51, 8, v2 -; GFX9-NEXT: s_waitcnt vmcnt(24) -; GFX9-NEXT: v_lshlrev_b16_e32 v49, 8, v3 -; GFX9-NEXT: s_waitcnt vmcnt(23) -; GFX9-NEXT: v_lshlrev_b16_e32 v39, 8, v4 -; GFX9-NEXT: s_waitcnt vmcnt(22) -; GFX9-NEXT: v_lshlrev_b16_e32 v38, 8, v5 +; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:380 +; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:376 ; GFX9-NEXT: s_waitcnt vmcnt(21) -; GFX9-NEXT: v_lshlrev_b16_e32 v34, 8, v6 +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292 -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(3) +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:100 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:92 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v1 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v3 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v5 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v6 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v7 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v8 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v9 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v10 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v11 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v12 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v13 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v14 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v15 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v16 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v18 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 @@ -142330,572 +142528,457 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:324 ; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill ; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v1 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:332 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v2 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:348 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:344 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:360 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:368 ; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:384 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:356 ; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v1 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v59, 8, v0 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 ; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v2 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v56, 8, v1 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:364 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:260 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:380 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v2 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:308 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:340 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:88 -; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:84 -; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:76 -; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:68 -; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:60 -; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:56 -; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:52 -; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:44 -; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:36 -; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:28 -; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:24 -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:20 -; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:12 -; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:4 -; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:124 -; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:120 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:372 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:340 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:88 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:84 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:76 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:68 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:60 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:56 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:52 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:44 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:36 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:28 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:200 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:20 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:12 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:92 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:260 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:124 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:120 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:268 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:372 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:256 +; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:252 +; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:248 +; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:244 +; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:240 +; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:236 +; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:232 +; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:228 +; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:224 +; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:220 +; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:216 +; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:212 +; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:208 +; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:204 +; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:200 +; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:196 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:184 +; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:180 +; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:376 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:156 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:148 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:140 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:136 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:132 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:268 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:284 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:284 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:280 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB88_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v0, v52, v48, s6 +; GFX9-NEXT: v_perm_b32 v1, v37, v36, s6 ; GFX9-NEXT: s_mov_b32 s7, 0x5040100 -; GFX9-NEXT: v_or_b32_sdwa v9, v59, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_perm_b32 v10, v47, v45, s6 -; GFX9-NEXT: v_or_b32_sdwa v11, v40, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_perm_b32 v12, v55, v54, s6 -; GFX9-NEXT: v_perm_b32 v17, v43, v42, s6 -; GFX9-NEXT: v_perm_b32 v18, v58, v57, s6 -; GFX9-NEXT: v_perm_b32 v19, v63, v46, s6 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr45 -; GFX9-NEXT: ; implicit-def: $vgpr40 +; GFX9-NEXT: v_perm_b32 v0, v1, v0, s7 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v50, v39, s6 +; GFX9-NEXT: v_perm_b32 v22, v41, v55, s6 +; GFX9-NEXT: v_perm_b32 v23, v45, v43, s6 +; GFX9-NEXT: v_perm_b32 v24, v58, v47, s6 +; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr41 ; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; implicit-def: $vgpr51 -; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v0, v1, v0, s6 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v1, v53, s6 +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s7 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_or_b32_sdwa v13, v48, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, v1, v0, s7 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: v_perm_b32 v1, v3, v2, s7 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v31, v31, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s7 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v4, v5, v4, s6 ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s7 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v4, v5, v4, s6 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 ; GFX9-NEXT: v_perm_b32 v4, v5, v4, s7 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s7 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s7 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v8, v8, v33, s6 +; GFX9-NEXT: v_perm_b32 v8, v8, v9, s6 ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s7 -; GFX9-NEXT: v_or_b32_sdwa v8, v60, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v8, v9, v8, s7 -; GFX9-NEXT: v_or_b32_sdwa v9, v44, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v11, v10, s6 ; GFX9-NEXT: v_perm_b32 v9, v9, v10, s7 -; GFX9-NEXT: v_or_b32_sdwa v10, v41, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v10, v11, v10, s7 -; GFX9-NEXT: v_or_b32_sdwa v11, v52, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v12, v13, v12, s6 ; GFX9-NEXT: v_perm_b32 v11, v11, v12, s7 -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; implicit-def: $vgpr44 -; GFX9-NEXT: ; implicit-def: $vgpr41 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr53 -; GFX9-NEXT: ; implicit-def: $vgpr49 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v12, v50, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v12, v13, v12, s7 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_perm_b32 v14, v37, v36, s6 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v14, v15, v14, s6 ; GFX9-NEXT: v_perm_b32 v13, v13, v14, s7 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v14, v15, v14, s7 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_or_b32_sdwa v15, v62, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v35, s6 +; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v16, v16, v17, s6 ; GFX9-NEXT: v_perm_b32 v15, v15, v16, s7 -; GFX9-NEXT: v_perm_b32 v16, v32, v56, s6 +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v16, v17, v16, s6 +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s6 ; GFX9-NEXT: v_perm_b32 v16, v17, v16, s7 -; GFX9-NEXT: v_perm_b32 v17, v19, v18, s7 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s6 +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s7 +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v19, v19, v20, s6 -; GFX9-NEXT: v_perm_b32 v18, v19, v18, s7 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s6 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v18, v19, v18, s7 +; GFX9-NEXT: v_perm_b32 v19, v33, v63, s6 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v20, v21, v20, s6 ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s7 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v20, v20, v61, s6 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v21, v22, v21, s6 +; GFX9-NEXT: v_perm_b32 v20, v40, v54, s6 +; GFX9-NEXT: v_perm_b32 v21, v34, v51, s6 ; GFX9-NEXT: v_perm_b32 v20, v21, v20, s7 -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v21, v22, v21, s6 -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v22, v23, v22, s6 +; GFX9-NEXT: v_perm_b32 v21, v44, v42, s6 ; GFX9-NEXT: v_perm_b32 v21, v22, v21, s7 -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v22, v23, v22, s6 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 +; GFX9-NEXT: v_perm_b32 v22, v57, v46, s6 ; GFX9-NEXT: v_perm_b32 v22, v23, v22, s7 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6 +; GFX9-NEXT: v_perm_b32 v23, v61, v60, s6 ; GFX9-NEXT: v_perm_b32 v23, v24, v23, s7 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr40 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr44 +; GFX9-NEXT: ; implicit-def: $vgpr42 +; GFX9-NEXT: ; implicit-def: $vgpr57 +; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr61 +; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v24, v25, v24, s7 -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6 ; GFX9-NEXT: v_perm_b32 v25, v25, v26, s7 -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v26, v27, v26, s7 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6 ; GFX9-NEXT: v_perm_b32 v27, v27, v28, s7 -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v28, v29, v28, s7 -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v30, v31, v30, s6 +; GFX9-NEXT: v_perm_b32 v30, v38, v30, s6 ; GFX9-NEXT: v_perm_b32 v29, v29, v30, s7 -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v30, v30, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v30, v31, v30, s7 -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v32, v33, v32, s6 +; GFX9-NEXT: v_or_b32_sdwa v31, v35, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_perm_b32 v32, v62, v49, s6 ; GFX9-NEXT: v_perm_b32 v31, v31, v32, s7 ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: ; kill: killed $vgpr32 @@ -142964,458 +143047,630 @@ define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr49 +; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: .LBB88_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB88_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v0, 3, v62 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v49 +; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u16_e32 v0, 3, v35 +; GFX9-NEXT: v_or_b32_sdwa v0, v32, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v30, v36 +; GFX9-NEXT: v_lshlrev_b16_e32 v30, 8, v30 ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 -; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v33 -; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v45 -; GFX9-NEXT: v_add_u16_e32 v11, 3, v40 -; GFX9-NEXT: v_or_b32_sdwa v11, v38, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 -; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54 -; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v46 -; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v56 -; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v42 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(21) +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 -; GFX9-NEXT: s_waitcnt vmcnt(20) +; GFX9-NEXT: v_or_b32_sdwa v0, v59, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 +; GFX9-NEXT: v_or_b32_sdwa v0, v56, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u16_e32 v0, 3, v38 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(20) -; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2 -; GFX9-NEXT: s_waitcnt vmcnt(19) -; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: s_waitcnt vmcnt(12) -; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6 -; GFX9-NEXT: s_waitcnt vmcnt(6) -; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_lshlrev_b16_e32 v23, 8, v23 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v27, 8, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v1, 3, v1 -; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 +; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 -; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v0 -; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v2 -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v3 -; GFX9-NEXT: v_perm_b32 v0, v2, v0, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v1, v4, s6 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 +; GFX9-NEXT: v_or_b32_sdwa v35, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v35 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v38, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v3, 0x300, v3 -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v36, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v36, 0x300, v36 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v3, 0x300, v3 +; GFX9-NEXT: v_or_b32_sdwa v29, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v29, 0x300, v29 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v4, 3, v4 -; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v4 -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v28, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v4, 3, v4 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v4 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v27, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v5, 3, v5 -; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 -; GFX9-NEXT: v_perm_b32 v4, v5, v4, s6 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v26, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v5, 3, v5 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6 -; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 +; GFX9-NEXT: v_or_b32_sdwa v18, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 -; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 -; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v19, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v61 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v60 +; GFX9-NEXT: v_or_b32_sdwa v20, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v58 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v47 +; GFX9-NEXT: v_or_b32_sdwa v21, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v57 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v46 +; GFX9-NEXT: v_or_b32_sdwa v22, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v45 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v43 +; GFX9-NEXT: v_or_b32_sdwa v23, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v44 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v42 +; GFX9-NEXT: v_or_b32_sdwa v24, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v41 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v55 +; GFX9-NEXT: v_or_b32_sdwa v25, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v40 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v54 +; GFX9-NEXT: v_or_b32_sdwa v49, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v34 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v51 +; GFX9-NEXT: v_or_b32_sdwa v51, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v33 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v63 +; GFX9-NEXT: v_or_b32_sdwa v54, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v39 +; GFX9-NEXT: v_lshlrev_b16_e32 v34, 8, v48 +; GFX9-NEXT: v_add_u16_e32 v39, 0x300, v26 +; GFX9-NEXT: v_add_u16_e32 v48, 0x300, v18 +; GFX9-NEXT: v_add_u16_e32 v26, 0x300, v24 +; GFX9-NEXT: v_add_u16_e32 v24, 0x300, v25 +; GFX9-NEXT: v_add_u16_e32 v25, 0x300, v51 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 -; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v55, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v7, 3, v7 -; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v7, 0x300, v7 -; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v40, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v7, 3, v7 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 -; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v7, 0x300, v7 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v41, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v51, 0x300, v41 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v8, 3, v8 -; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 -; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 -; GFX9-NEXT: v_add_u16_e32 v8, 3, v60 -; GFX9-NEXT: v_add_u16_e32 v9, 3, v59 -; GFX9-NEXT: v_or_b32_sdwa v8, v53, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_or_b32_sdwa v9, v51, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 -; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 -; GFX9-NEXT: v_perm_b32 v8, v9, v8, s6 -; GFX9-NEXT: v_add_u16_e32 v9, 3, v47 -; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v44 -; GFX9-NEXT: v_or_b32_sdwa v10, v49, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 -; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 -; GFX9-NEXT: v_perm_b32 v9, v10, v9, s6 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v41 -; GFX9-NEXT: v_or_b32_sdwa v10, v39, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 -; GFX9-NEXT: v_perm_b32 v10, v11, v10, s6 -; GFX9-NEXT: v_add_u16_e32 v11, 3, v55 -; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v52 -; GFX9-NEXT: v_or_b32_sdwa v12, v34, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 -; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 -; GFX9-NEXT: v_perm_b32 v11, v12, v11, s6 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v50 -; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v13, 3, v48 -; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 -; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 -; GFX9-NEXT: v_perm_b32 v12, v13, v12, s6 -; GFX9-NEXT: v_add_u16_e32 v13, 3, v37 -; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v36 -; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v42, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v14, 3, v14 -; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14 -; GFX9-NEXT: v_perm_b32 v13, v14, v13, s6 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v43, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v14, 3, v14 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v44, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v15, 3, v15 -; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v15, 0x300, v15 -; GFX9-NEXT: v_perm_b32 v14, v15, v14, s6 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v35 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v45, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v15, 3, v15 -; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v16, 3, v62 -; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v15, 0x300, v15 -; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16 -; GFX9-NEXT: v_perm_b32 v15, v16, v15, s6 -; GFX9-NEXT: v_add_u16_e32 v16, 3, v58 -; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v57 -; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v17, 3, v63 -; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v18, 3, v32 -; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v19, 3, v43 -; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v20, 0x300, v16 -; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v18 -; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v19 -; GFX9-NEXT: v_perm_b32 v16, v18, v16, s6 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v17, 0x300, v17 -; GFX9-NEXT: v_perm_b32 v17, v17, v20, s6 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v18, 3, v18 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v46, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v46 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v19 -; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v18 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v19, 3, v19 -; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v32, 0x300, v19 -; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6 +; GFX9-NEXT: v_or_b32_sdwa v56, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v20, 3, v20 -; GFX9-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v20 +; GFX9-NEXT: v_or_b32_sdwa v58, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v21, 3, v21 -; GFX9-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v33, 0x300, v21 -; GFX9-NEXT: v_perm_b32 v30, v33, v30, s6 +; GFX9-NEXT: v_or_b32_sdwa v59, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v41, 0x300, v59 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v22, 3, v22 -; GFX9-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v29, 0x300, v22 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v60, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v46, 0x300, v60 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v23, 3, v23 -; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v34, 0x300, v23 -; GFX9-NEXT: v_perm_b32 v29, v34, v29, s6 +; GFX9-NEXT: v_or_b32_sdwa v61, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v24, 3, v24 -; GFX9-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v62, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v25, 3, v25 -; GFX9-NEXT: v_or_b32_sdwa v25, v26, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v25 +; GFX9-NEXT: v_or_b32_sdwa v63, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v26, 3, v26 -; GFX9-NEXT: v_or_b32_sdwa v26, v27, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v16, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 -; GFX9-NEXT: v_or_b32_sdwa v36, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v36, 0x300, v36 +; GFX9-NEXT: v_or_b32_sdwa v17, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v37, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v15, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v15, 0x300, v15 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v38, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v14, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v39, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v25, 0x300, v39 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v13, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v48, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v12, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v49, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v11, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v50, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v39, 0x300, v50 +; GFX9-NEXT: v_or_b32_sdwa v10, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v51, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v23, 0x300, v51 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v9, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v52, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v8, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v53, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v22, 0x300, v53 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v7, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v7, 0x300, v7 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v54, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v6, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 +; GFX9-NEXT: v_perm_b32 v6, v6, v7, s6 +; GFX9-NEXT: v_perm_b32 v7, v8, v9, s6 +; GFX9-NEXT: v_perm_b32 v8, v10, v11, s6 +; GFX9-NEXT: v_perm_b32 v10, v14, v15, s6 +; GFX9-NEXT: v_perm_b32 v9, v12, v13, s6 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v55, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v21, 0x300, v55 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v5, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v40, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v61 -; GFX9-NEXT: v_add_u16_e32 v50, 0x300, v40 -; GFX9-NEXT: v_perm_b32 v21, v50, v21, s6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v4, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 -; GFX9-NEXT: v_or_b32_sdwa v41, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v20, 0x300, v41 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v47, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v42, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v51, 0x300, v42 -; GFX9-NEXT: v_perm_b32 v20, v51, v20, s6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v57, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v43, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v19, 0x300, v43 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v3, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v3, 0x300, v3 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v44, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v31, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v45, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v45 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v2, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v46, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v28, 0x300, v24 -; GFX9-NEXT: v_add_u16_e32 v27, 0x300, v26 -; GFX9-NEXT: v_add_u16_e32 v26, 0x300, v37 -; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v38 -; GFX9-NEXT: v_add_u16_e32 v38, 0x300, v48 -; GFX9-NEXT: v_add_u16_e32 v24, 0x300, v49 -; GFX9-NEXT: v_add_u16_e32 v48, 0x300, v52 -; GFX9-NEXT: v_add_u16_e32 v49, 0x300, v54 -; GFX9-NEXT: v_add_u16_e32 v52, 0x300, v44 -; GFX9-NEXT: v_add_u16_e32 v53, 0x300, v46 -; GFX9-NEXT: v_perm_b32 v18, v53, v18, s6 -; GFX9-NEXT: v_perm_b32 v19, v52, v19, s6 -; GFX9-NEXT: v_perm_b32 v22, v49, v22, s6 -; GFX9-NEXT: v_perm_b32 v23, v48, v23, s6 -; GFX9-NEXT: v_perm_b32 v24, v39, v24, s6 -; GFX9-NEXT: v_perm_b32 v25, v38, v25, s6 -; GFX9-NEXT: v_perm_b32 v26, v37, v26, s6 -; GFX9-NEXT: v_perm_b32 v27, v36, v27, s6 -; GFX9-NEXT: v_perm_b32 v28, v35, v28, s6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v32, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v53 +; GFX9-NEXT: v_add_u16_e32 v53, 0x300, v21 +; GFX9-NEXT: v_add_u16_e32 v21, 0x300, v40 +; GFX9-NEXT: v_add_u16_e32 v40, 0x300, v56 +; GFX9-NEXT: v_perm_b32 v15, v40, v18, s6 +; GFX9-NEXT: v_perm_b32 v18, v51, v21, s6 +; GFX9-NEXT: v_perm_b32 v21, v24, v26, s6 +; GFX9-NEXT: v_add_u16_e32 v56, 0x300, v62 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 +; GFX9-NEXT: v_or_b32_sdwa v1, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v50 +; GFX9-NEXT: v_or_b32_sdwa v33, v33, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v52 +; GFX9-NEXT: v_or_b32_sdwa v0, v34, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v34, 3, v37 +; GFX9-NEXT: v_or_b32_sdwa v30, v30, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: v_perm_b32 v0, v30, v0, s6 +; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v33 +; GFX9-NEXT: v_perm_b32 v1, v30, v1, s6 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v32 +; GFX9-NEXT: v_perm_b32 v2, v30, v2, s6 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v31 +; GFX9-NEXT: v_perm_b32 v3, v30, v3, s6 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v28 +; GFX9-NEXT: v_add_u16_e32 v50, 0x300, v19 +; GFX9-NEXT: v_add_u16_e32 v28, 0x300, v22 +; GFX9-NEXT: v_add_u16_e32 v22, 0x300, v54 +; GFX9-NEXT: v_add_u16_e32 v19, 0x300, v44 +; GFX9-NEXT: v_add_u16_e32 v44, 0x300, v17 +; GFX9-NEXT: v_perm_b32 v11, v44, v16, s6 +; GFX9-NEXT: v_perm_b32 v26, v37, v29, s6 +; GFX9-NEXT: v_add_u16_e32 v52, 0x300, v20 +; GFX9-NEXT: v_add_u16_e32 v20, 0x300, v42 +; GFX9-NEXT: v_add_u16_e32 v54, 0x300, v43 +; GFX9-NEXT: v_add_u16_e32 v42, 0x300, v61 +; GFX9-NEXT: v_add_u16_e32 v43, 0x300, v63 +; GFX9-NEXT: v_add_u16_e32 v17, 0x300, v4 +; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v47 +; GFX9-NEXT: v_add_u16_e32 v47, 0x300, v57 +; GFX9-NEXT: v_perm_b32 v4, v47, v4, s6 +; GFX9-NEXT: v_perm_b32 v5, v17, v5, s6 +; GFX9-NEXT: v_perm_b32 v12, v43, v56, s6 +; GFX9-NEXT: v_perm_b32 v13, v42, v46, s6 +; GFX9-NEXT: v_perm_b32 v17, v54, v20, s6 +; GFX9-NEXT: v_perm_b32 v24, v50, v48, s6 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v33, 0x300, v30 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v32, 0x300, v30 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v34, 0x300, v30 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v29, v34, v32, s6 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v30 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v38 +; GFX9-NEXT: v_add_u16_e32 v38, 0x300, v27 +; GFX9-NEXT: v_add_u16_e32 v27, 0x300, v23 +; GFX9-NEXT: v_add_u16_e32 v23, 0x300, v49 +; GFX9-NEXT: v_add_u16_e32 v49, 0x300, v55 +; GFX9-NEXT: v_add_u16_e32 v55, 0x300, v45 +; GFX9-NEXT: v_perm_b32 v16, v55, v19, s6 +; GFX9-NEXT: v_perm_b32 v19, v49, v22, s6 +; GFX9-NEXT: v_perm_b32 v22, v27, v28, s6 +; GFX9-NEXT: v_perm_b32 v27, v36, v30, s6 +; GFX9-NEXT: v_perm_b32 v28, v35, v31, s6 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v45, 0x300, v58 +; GFX9-NEXT: v_perm_b32 v14, v41, v45, s6 +; GFX9-NEXT: v_perm_b32 v20, v25, v23, s6 +; GFX9-NEXT: v_perm_b32 v23, v53, v52, s6 +; GFX9-NEXT: v_perm_b32 v25, v39, v38, s6 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v30, v33, v30, s6 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6 ; GFX9-NEXT: .LBB88_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload @@ -146645,16 +146900,16 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB89_4: -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: s_mov_b32 s49, s76 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: s_mov_b32 s73, s92 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr57 ; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; kill: killed $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr22 ; SI-NEXT: ; implicit-def: $sgpr28 ; SI-NEXT: ; implicit-def: $sgpr26 @@ -146734,17 +146989,40 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_readfirstlane_b32 s63, v12 +; VI-NEXT: v_readfirstlane_b32 s62, v15 +; VI-NEXT: v_readfirstlane_b32 s74, v14 +; VI-NEXT: v_readfirstlane_b32 s57, v13 ; VI-NEXT: v_readfirstlane_b32 s8, v0 -; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:280 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276 +; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:8 +; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328 +; VI-NEXT: v_readfirstlane_b32 s63, v12 ; VI-NEXT: v_readfirstlane_b32 s45, v11 +; VI-NEXT: v_readfirstlane_b32 s41, v9 +; VI-NEXT: v_readfirstlane_b32 s46, v8 +; VI-NEXT: v_readfirstlane_b32 s13, v7 ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332 -; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:12 -; VI-NEXT: v_readfirstlane_b32 s59, v29 -; VI-NEXT: v_readfirstlane_b32 s47, v27 +; VI-NEXT: v_readfirstlane_b32 s42, v6 +; VI-NEXT: v_readfirstlane_b32 s10, v5 +; VI-NEXT: v_readfirstlane_b32 s14, v4 +; VI-NEXT: v_readfirstlane_b32 s7, v3 +; VI-NEXT: v_readfirstlane_b32 s11, v2 +; VI-NEXT: v_readfirstlane_b32 s6, v1 +; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 +; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:316 +; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:312 +; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:308 +; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:304 +; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:300 +; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:296 +; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:292 +; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:288 +; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:284 ; VI-NEXT: v_readfirstlane_b32 s75, v30 +; VI-NEXT: v_readfirstlane_b32 s59, v29 ; VI-NEXT: v_readfirstlane_b32 s72, v28 +; VI-NEXT: v_readfirstlane_b32 s47, v27 ; VI-NEXT: v_readfirstlane_b32 s60, v26 ; VI-NEXT: v_readfirstlane_b32 s43, v25 ; VI-NEXT: v_readfirstlane_b32 s56, v24 @@ -146752,250 +147030,247 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; VI-NEXT: v_readfirstlane_b32 s44, v22 ; VI-NEXT: v_readfirstlane_b32 s12, v21 ; VI-NEXT: v_readfirstlane_b32 s40, v20 -; VI-NEXT: v_readfirstlane_b32 s76, v18 -; VI-NEXT: v_readfirstlane_b32 s73, v16 ; VI-NEXT: v_readfirstlane_b32 s9, v19 +; VI-NEXT: v_readfirstlane_b32 s76, v18 ; VI-NEXT: v_readfirstlane_b32 s61, v17 -; VI-NEXT: v_readfirstlane_b32 s62, v15 -; VI-NEXT: v_readfirstlane_b32 s74, v14 -; VI-NEXT: v_readfirstlane_b32 s57, v13 +; VI-NEXT: v_readfirstlane_b32 s73, v16 ; VI-NEXT: v_readfirstlane_b32 s58, v10 -; VI-NEXT: v_readfirstlane_b32 s41, v9 -; VI-NEXT: v_readfirstlane_b32 s46, v8 -; VI-NEXT: v_readfirstlane_b32 s13, v7 -; VI-NEXT: v_readfirstlane_b32 s42, v6 -; VI-NEXT: v_readfirstlane_b32 s10, v5 -; VI-NEXT: v_readfirstlane_b32 s14, v4 -; VI-NEXT: v_readfirstlane_b32 s7, v3 -; VI-NEXT: v_readfirstlane_b32 s11, v2 -; VI-NEXT: v_readfirstlane_b32 s6, v1 -; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:4 -; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 -; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:328 -; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:324 -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 -; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:316 -; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:312 -; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:308 -; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:304 -; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:300 -; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:296 -; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:292 -; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:288 -; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:284 -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:272 -; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:268 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 +; VI-NEXT: s_waitcnt vmcnt(11) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:280 +; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:276 +; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:272 +; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:268 +; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:264 +; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:260 +; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:256 +; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:252 +; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:248 +; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:244 +; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:240 +; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:236 +; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:232 +; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:228 +; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:224 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:252 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:212 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 -; VI-NEXT: s_and_b64 s[4:5], vcc, exec +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:180 +; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:176 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:216 -; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:212 -; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:208 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:168 +; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:164 +; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:160 +; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:156 +; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:152 +; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:148 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:200 -; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:196 -; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:192 -; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:188 -; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:184 -; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:180 -; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176 -; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:172 -; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:168 -; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:164 -; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:160 -; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:156 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:152 -; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:148 -; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:144 -; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:140 -; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:136 -; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:132 -; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:128 -; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:124 -; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:120 -; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:116 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:140 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:136 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:108 -; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:104 -; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:100 -; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:96 -; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:92 -; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:88 -; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:84 -; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:80 -; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:76 -; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72 -; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:68 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:64 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:132 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60 -; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:56 -; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:48 -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:44 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:40 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:124 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:120 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:36 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:32 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:28 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:20 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:108 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:104 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:100 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:96 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:92 +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 +; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:88 +; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:84 +; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:80 +; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:76 +; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:72 +; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:68 +; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:64 +; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:60 +; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:56 +; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:52 +; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:48 +; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:44 +; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:40 +; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:36 +; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:32 +; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:28 +; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:24 +; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20 +; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:16 +; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:12 +; VI-NEXT: s_and_b64 s[4:5], vcc, exec +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(4) +; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(6) +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill ; VI-NEXT: s_cbranch_scc0 .LBB89_4 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v4, s6 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_mov_b32_e32 v3, s29 ; VI-NEXT: v_perm_b32 v4, s8, v4, v11 ; VI-NEXT: v_perm_b32 v3, s28, v3, v11 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v5, s10 ; VI-NEXT: v_or_b32_e32 v3, v3, v4 ; VI-NEXT: v_mov_b32_e32 v4, s7 ; VI-NEXT: v_perm_b32 v5, s14, v5, v11 ; VI-NEXT: v_perm_b32 v4, s11, v4, v11 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v6, s41 ; VI-NEXT: v_or_b32_e32 v4, v4, v5 ; VI-NEXT: v_mov_b32_e32 v5, s13 ; VI-NEXT: v_perm_b32 v6, s46, v6, v11 ; VI-NEXT: v_perm_b32 v5, s42, v5, v11 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; VI-NEXT: v_mov_b32_e32 v63, v60 +; VI-NEXT: v_mov_b32_e32 v60, v7 ; VI-NEXT: v_mov_b32_e32 v7, s57 ; VI-NEXT: v_or_b32_e32 v5, v5, v6 ; VI-NEXT: v_mov_b32_e32 v6, s45 ; VI-NEXT: v_perm_b32 v7, s63, v7, v11 ; VI-NEXT: v_perm_b32 v6, s58, v6, v11 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; VI-NEXT: v_mov_b32_e32 v42, v8 ; VI-NEXT: v_mov_b32_e32 v8, s61 ; VI-NEXT: v_or_b32_e32 v6, v6, v7 ; VI-NEXT: v_mov_b32_e32 v7, s62 ; VI-NEXT: v_perm_b32 v8, s73, v8, v11 ; VI-NEXT: v_perm_b32 v7, s74, v7, v11 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; VI-NEXT: v_mov_b32_e32 v40, v9 ; VI-NEXT: v_mov_b32_e32 v9, s12 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 ; VI-NEXT: v_mov_b32_e32 v8, s9 ; VI-NEXT: v_perm_b32 v9, s40, v9, v11 ; VI-NEXT: v_perm_b32 v8, s76, v8, v11 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_mov_b32_e32 v43, v10 ; VI-NEXT: v_mov_b32_e32 v10, s43 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 ; VI-NEXT: v_mov_b32_e32 v9, s15 ; VI-NEXT: v_perm_b32 v10, s56, v10, v11 +; VI-NEXT: v_mov_b32_e32 v62, v32 ; VI-NEXT: v_perm_b32 v9, s44, v9, v11 ; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_mov_b32_e32 v35, v12 +; VI-NEXT: v_mov_b32_e32 v32, v39 +; VI-NEXT: v_mov_b32_e32 v39, v12 ; VI-NEXT: v_mov_b32_e32 v12, s59 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 ; VI-NEXT: v_mov_b32_e32 v10, s47 @@ -147008,568 +147283,574 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; VI-NEXT: v_perm_b32 v11, s75, v13, v11 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 -; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v18, v23, v18, s4 -; VI-NEXT: v_perm_b32 v23, v51, v33, s4 -; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_perm_b32 v12, v56, v12, s4 +; VI-NEXT: v_perm_b32 v12, v21, v17, s4 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v13, v47, v13, s4 +; VI-NEXT: v_perm_b32 v13, v19, v16, s4 ; VI-NEXT: v_or_b32_e32 v12, v13, v12 -; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v14, v59, v14, s4 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v15, v32, v15, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v13, v61, v13, s4 +; VI-NEXT: v_perm_b32 v13, v25, v20, s4 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; VI-NEXT: v_perm_b32 v14, v23, v18, s4 ; VI-NEXT: v_or_b32_e32 v13, v14, v13 -; VI-NEXT: v_perm_b32 v14, v17, v60, s4 +; VI-NEXT: v_perm_b32 v14, v29, v24, s4 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; VI-NEXT: v_perm_b32 v15, v27, v22, s4 ; VI-NEXT: v_or_b32_e32 v14, v15, v14 -; VI-NEXT: v_perm_b32 v15, v21, v16, s4 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v17, v28, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; VI-NEXT: v_perm_b32 v15, v46, v28, s4 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: v_perm_b32 v21, v58, v46, s4 -; VI-NEXT: v_perm_b32 v24, v36, v49, s4 -; VI-NEXT: v_mov_b32_e32 v28, v52 -; VI-NEXT: v_mov_b32_e32 v52, v53 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v16, v19, v16, s4 -; VI-NEXT: v_perm_b32 v19, v26, v22, s4 -; VI-NEXT: v_or_b32_e32 v17, v19, v17 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v16, v31, v26, s4 ; VI-NEXT: v_or_b32_e32 v15, v16, v15 -; VI-NEXT: v_perm_b32 v16, v25, v20, s4 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v16, v58, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; VI-NEXT: v_or_b32_e32 v16, v18, v16 -; VI-NEXT: v_perm_b32 v18, v45, v27, s4 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; VI-NEXT: v_perm_b32 v20, v44, v29, s4 -; VI-NEXT: v_perm_b32 v22, v53, v42, s4 -; VI-NEXT: v_mov_b32_e32 v45, v34 -; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v17, v56, v30, s4 +; VI-NEXT: v_or_b32_e32 v16, v17, v16 +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v34, v44 +; VI-NEXT: v_perm_b32 v22, v55, v48, s4 +; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v27, v32, v39, s4 +; VI-NEXT: v_perm_b32 v29, v61, v62, s4 +; VI-NEXT: v_mov_b32_e32 v32, v63 +; VI-NEXT: s_waitcnt vmcnt(7) +; VI-NEXT: v_perm_b32 v17, v18, v17, s4 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; VI-NEXT: s_waitcnt vmcnt(8) +; VI-NEXT: v_perm_b32 v23, v44, v54, s4 +; VI-NEXT: s_waitcnt vmcnt(5) +; VI-NEXT: v_perm_b32 v21, v49, v21, s4 +; VI-NEXT: s_waitcnt vmcnt(4) +; VI-NEXT: v_perm_b32 v26, v26, v43, s4 +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: v_perm_b32 v28, v28, v53, s4 +; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_perm_b32 v19, v30, v19, s4 +; VI-NEXT: v_mov_b32_e32 v39, v31 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v18, v19, v18, s4 +; VI-NEXT: v_or_b32_e32 v17, v18, v17 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_mov_b32_e32 v53, v43 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v18, v19, v18, s4 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v19, v20, v19, s4 ; VI-NEXT: v_or_b32_e32 v18, v19, v18 -; VI-NEXT: v_perm_b32 v19, v55, v31, s4 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v19, v36, v19, s4 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v20, v35, v20, s4 ; VI-NEXT: v_or_b32_e32 v19, v20, v19 -; VI-NEXT: v_perm_b32 v20, v39, v57, s4 +; VI-NEXT: v_perm_b32 v20, v50, v47, s4 +; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: v_or_b32_e32 v20, v21, v20 -; VI-NEXT: v_perm_b32 v21, v38, v63, s4 +; VI-NEXT: v_perm_b32 v21, v41, v51, s4 +; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; VI-NEXT: v_or_b32_e32 v21, v22, v21 -; VI-NEXT: v_perm_b32 v22, v54, v37, s4 +; VI-NEXT: s_waitcnt vmcnt(6) +; VI-NEXT: v_perm_b32 v22, v38, v50, s4 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; VI-NEXT: v_or_b32_e32 v22, v23, v22 -; VI-NEXT: v_perm_b32 v23, v40, v50, s4 +; VI-NEXT: s_waitcnt vmcnt(4) +; VI-NEXT: v_perm_b32 v23, v47, v36, s4 ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_perm_b32 v24, v51, v49, s4 ; VI-NEXT: v_or_b32_e32 v23, v24, v23 -; VI-NEXT: v_perm_b32 v24, v48, v34, s4 +; VI-NEXT: v_perm_b32 v24, v57, v48, s4 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_mov_b32_e32 v48, v25 -; VI-NEXT: v_perm_b32 v25, v25, v41, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v25, v25, v35, s4 ; VI-NEXT: v_or_b32_e32 v24, v25, v24 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v34, v33 -; VI-NEXT: v_mov_b32_e32 v33, v26 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v55, v57 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_mov_b32_e32 v53, v25 -; VI-NEXT: v_perm_b32 v25, v26, v25, s4 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v25, v33, v59, s4 ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_perm_b32 v30, v31, v30, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s4 ; VI-NEXT: v_or_b32_e32 v25, v26, v25 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s4 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v26, v52, v37, s4 ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v29, v27, s4 ; VI-NEXT: v_or_b32_e32 v26, v27, v26 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v29, v27, s4 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v27, v34, v40, s4 ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v28, v29, s4 ; VI-NEXT: v_or_b32_e32 v27, v28, v27 -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v28, v28, v35, s4 +; VI-NEXT: v_perm_b32 v28, v42, v60, s4 ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v62, v29, s4 ; VI-NEXT: v_or_b32_e32 v28, v29, v28 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v62, v44 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v43, v29, s4 +; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v60, v30 +; VI-NEXT: v_perm_b32 v30, v31, v30, s4 +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v57, v59 +; VI-NEXT: v_mov_b32_e32 v34, v61 +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: v_mov_b32_e32 v33, v29 +; VI-NEXT: v_perm_b32 v29, v29, v63, s4 ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; VI-NEXT: v_or_b32_e32 v29, v30, v29 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_mov_b32_e32 v63, v31 +; VI-NEXT: v_mov_b32_e32 v62, v37 +; VI-NEXT: v_perm_b32 v43, v43, v52, s4 +; VI-NEXT: v_mov_b32_e32 v61, v52 +; VI-NEXT: v_mov_b32_e32 v52, v51 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_mov_b32_e32 v42, v30 ; VI-NEXT: v_perm_b32 v30, v31, v30, s4 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v31, v35, v31, s4 +; VI-NEXT: v_mov_b32_e32 v40, v31 +; VI-NEXT: v_perm_b32 v31, v37, v31, s4 +; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload ; VI-NEXT: v_or_b32_e32 v30, v31, v30 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v31, v35, v31, s4 +; VI-NEXT: v_perm_b32 v31, v37, v59, s4 ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; VI-NEXT: v_mov_b32_e32 v35, v43 -; VI-NEXT: v_perm_b32 v43, v44, v43, s4 ; VI-NEXT: v_or_b32_e32 v31, v43, v31 -; VI-NEXT: v_mov_b32_e32 v43, v39 -; VI-NEXT: v_mov_b32_e32 v39, v34 -; VI-NEXT: v_mov_b32_e32 v34, v52 -; VI-NEXT: v_mov_b32_e32 v52, v45 +; VI-NEXT: v_mov_b32_e32 v43, v35 +; VI-NEXT: v_mov_b32_e32 v35, v37 +; VI-NEXT: v_mov_b32_e32 v37, v59 ; VI-NEXT: s_cbranch_execnz .LBB89_3 ; VI-NEXT: .LBB89_2: ; %cmp.true -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v35 ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: s_add_i32 s75, s75, 3 -; VI-NEXT: s_add_i32 s72, s72, 3 -; VI-NEXT: s_add_i32 s60, s60, 3 -; VI-NEXT: s_add_i32 s56, s56, 3 -; VI-NEXT: s_add_i32 s44, s44, 3 -; VI-NEXT: s_add_i32 s40, s40, 3 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v0, v0, v37, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v53 +; VI-NEXT: v_perm_b32 v0, v0, v61, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v63 +; VI-NEXT: v_perm_b32 v0, v0, v42, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62 +; VI-NEXT: v_perm_b32 v0, v0, v40, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33 +; VI-NEXT: v_perm_b32 v0, v0, v32, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v39 +; VI-NEXT: v_perm_b32 v39, v0, v60, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v27, 0xc0c0004 ; VI-NEXT: s_add_i32 s76, s76, 3 +; VI-NEXT: v_mov_b32_e32 v28, s9 +; VI-NEXT: v_perm_b32 v6, s76, v28, v27 ; VI-NEXT: s_add_i32 s73, s73, 3 +; VI-NEXT: v_mov_b32_e32 v28, s61 +; VI-NEXT: v_perm_b32 v7, s73, v28, v27 ; VI-NEXT: s_add_i32 s74, s74, 3 +; VI-NEXT: v_mov_b32_e32 v28, s62 +; VI-NEXT: v_perm_b32 v8, s74, v28, v27 ; VI-NEXT: s_add_i32 s63, s63, 3 +; VI-NEXT: v_mov_b32_e32 v28, s57 +; VI-NEXT: v_perm_b32 v9, s63, v28, v27 ; VI-NEXT: s_add_i32 s58, s58, 3 +; VI-NEXT: v_mov_b32_e32 v28, s45 +; VI-NEXT: v_perm_b32 v10, s58, v28, v27 ; VI-NEXT: s_add_i32 s46, s46, 3 +; VI-NEXT: v_mov_b32_e32 v28, s41 +; VI-NEXT: v_perm_b32 v15, s46, v28, v27 ; VI-NEXT: s_add_i32 s42, s42, 3 +; VI-NEXT: v_mov_b32_e32 v28, s13 +; VI-NEXT: v_perm_b32 v14, s42, v28, v27 ; VI-NEXT: s_add_i32 s14, s14, 3 +; VI-NEXT: v_mov_b32_e32 v28, s10 ; VI-NEXT: s_add_i32 s11, s11, 3 +; VI-NEXT: s_add_i32 s18, s18, 3 +; VI-NEXT: s_add_i32 s16, s16, 3 +; VI-NEXT: v_mov_b32_e32 v21, s17 +; VI-NEXT: s_add_i32 s75, s75, 3 +; VI-NEXT: s_add_i32 s72, s72, 3 +; VI-NEXT: s_add_i32 s60, s60, 3 +; VI-NEXT: v_mov_b32_e32 v2, s47 +; VI-NEXT: s_add_i32 s56, s56, 3 +; VI-NEXT: v_mov_b32_e32 v3, s43 +; VI-NEXT: s_add_i32 s44, s44, 3 +; VI-NEXT: v_mov_b32_e32 v4, s15 +; VI-NEXT: s_add_i32 s40, s40, 3 +; VI-NEXT: v_mov_b32_e32 v5, s12 ; VI-NEXT: s_add_i32 s8, s8, 3 ; VI-NEXT: s_add_i32 s28, s28, 3 +; VI-NEXT: v_mov_b32_e32 v29, s29 ; VI-NEXT: s_add_i32 s26, s26, 3 +; VI-NEXT: v_mov_b32_e32 v30, s27 ; VI-NEXT: s_add_i32 s24, s24, 3 +; VI-NEXT: v_mov_b32_e32 v31, s25 ; VI-NEXT: s_add_i32 s22, s22, 3 +; VI-NEXT: v_mov_b32_e32 v32, s23 ; VI-NEXT: s_add_i32 s20, s20, 3 -; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s16, s16, 3 -; VI-NEXT: v_mov_b32_e32 v18, s17 +; VI-NEXT: v_mov_b32_e32 v33, s21 +; VI-NEXT: v_perm_b32 v21, s16, v21, v27 +; VI-NEXT: v_perm_b32 v12, s60, v2, v27 +; VI-NEXT: v_perm_b32 v11, s56, v3, v27 +; VI-NEXT: v_perm_b32 v4, s44, v4, v27 +; VI-NEXT: v_perm_b32 v5, s40, v5, v27 +; VI-NEXT: v_perm_b32 v29, s28, v29, v27 +; VI-NEXT: v_perm_b32 v30, s26, v30, v27 +; VI-NEXT: v_perm_b32 v31, s24, v31, v27 +; VI-NEXT: v_perm_b32 v32, s22, v32, v27 +; VI-NEXT: v_perm_b32 v33, s20, v33, v27 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v12 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v8 +; VI-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x3000000, v7 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62 -; VI-NEXT: v_perm_b32 v0, v0, v35, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v62, s21 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34 +; VI-NEXT: v_mov_b32_e32 v34, s19 +; VI-NEXT: v_perm_b32 v34, s18, v34, v27 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v35, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v37, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v26, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v25, v0, v57, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v24, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v23, v0, v48, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v48, v0, v43, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v47 +; VI-NEXT: v_perm_b32 v22, v0, v36, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v52 +; VI-NEXT: v_perm_b32 v17, v0, v49, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38 +; VI-NEXT: v_perm_b32 v18, v0, v50, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v44 +; VI-NEXT: v_perm_b32 v19, v0, v54, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v41 +; VI-NEXT: v_perm_b32 v20, v0, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v55 +; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v35 +; VI-NEXT: v_add_u32_e32 v38, vcc, 0x300, v24 +; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v22 +; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v19 +; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v20 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v49, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v49 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; VI-NEXT: v_perm_b32 v51, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v0, v1, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33 -; VI-NEXT: v_perm_b32 v25, v0, v53, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28 -; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26 +; VI-NEXT: v_perm_b32 v52, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29 -; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25 +; VI-NEXT: v_perm_b32 v53, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v53 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: v_perm_b32 v24, v0, v52, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v48 -; VI-NEXT: v_perm_b32 v30, v0, v41, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v40 -; VI-NEXT: v_perm_b32 v23, v0, v50, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v36 -; VI-NEXT: v_perm_b32 v31, v0, v49, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v54 -; VI-NEXT: v_perm_b32 v22, v0, v37, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51 -; VI-NEXT: v_perm_b32 v33, v0, v39, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38 -; VI-NEXT: v_perm_b32 v21, v0, v63, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34 -; VI-NEXT: v_perm_b32 v36, v0, v42, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v43 -; VI-NEXT: v_perm_b32 v20, v0, v55, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v63, s19 -; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30 -; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v31 -; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33 -; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; VI-NEXT: v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22 -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23 -; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24 +; VI-NEXT: v_perm_b32 v54, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v52, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v55, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v55 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v53, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v53 +; VI-NEXT: v_perm_b32 v40, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v40 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v38, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v41, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v34, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v42, v0, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58 +; VI-NEXT: v_perm_b32 v43, v0, v45, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v56 +; VI-NEXT: v_perm_b32 v56, s14, v28, v27 +; VI-NEXT: v_mov_b32_e32 v28, s7 +; VI-NEXT: v_perm_b32 v58, s11, v28, v27 +; VI-NEXT: v_mov_b32_e32 v28, s6 +; VI-NEXT: v_perm_b32 v28, s8, v28, v27 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v44, v0, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v46 +; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v44 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v45, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v45, 16, v45 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v10, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v46, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v40, vcc, 0x300, v46 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v11, v0, v1, s4 +; VI-NEXT: v_perm_b32 v47, v0, v1, s4 ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v46, 16, v47 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v12, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v57, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v13, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v59, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v59, 16, v59 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v14, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v60, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15 +; VI-NEXT: v_perm_b32 v61, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: v_perm_b32 v16, v0, v60, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v32 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v17, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v61 -; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v34 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v54, v0, v1, s4 +; VI-NEXT: v_perm_b32 v62, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v59 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v40, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v56 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v42, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v47 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v43, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v44, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004 -; VI-NEXT: v_perm_b32 v62, s20, v62, v0 -; VI-NEXT: v_perm_b32 v63, s18, v63, v0 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v45, s75, v1, v0 +; VI-NEXT: v_perm_b32 v63, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; VI-NEXT: v_mov_b32_e32 v1, s59 -; VI-NEXT: v_perm_b32 v55, s72, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_perm_b32 v41, s60, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s43 -; VI-NEXT: v_perm_b32 v9, s56, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s15 -; VI-NEXT: v_perm_b32 v46, s44, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s12 -; VI-NEXT: v_perm_b32 v8, s40, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s9 -; VI-NEXT: v_perm_b32 v47, s76, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s61 -; VI-NEXT: v_perm_b32 v7, s73, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s62 -; VI-NEXT: v_perm_b32 v56, s74, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s57 -; VI-NEXT: v_perm_b32 v6, s63, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s45 -; VI-NEXT: v_perm_b32 v57, s58, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s41 -; VI-NEXT: v_perm_b32 v5, s46, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s13 -; VI-NEXT: v_perm_b32 v58, s42, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s10 -; VI-NEXT: v_perm_b32 v4, s14, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s7 -; VI-NEXT: v_perm_b32 v59, s11, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: v_perm_b32 v3, s8, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s29 -; VI-NEXT: v_perm_b32 v60, s28, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s27 -; VI-NEXT: v_perm_b32 v2, s26, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s25 -; VI-NEXT: v_perm_b32 v61, s24, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s23 -; VI-NEXT: v_perm_b32 v1, s22, v1, v0 -; VI-NEXT: v_perm_b32 v0, s16, v18, v0 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v63 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0 -; VI-NEXT: v_or_b32_sdwa v0, v18, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v62 -; VI-NEXT: v_or_b32_sdwa v1, v1, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v61 -; VI-NEXT: v_or_b32_sdwa v2, v2, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v60 -; VI-NEXT: v_or_b32_sdwa v3, v3, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v59 -; VI-NEXT: v_or_b32_sdwa v4, v4, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v58 -; VI-NEXT: v_or_b32_sdwa v5, v5, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v57 -; VI-NEXT: v_or_b32_sdwa v6, v6, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v56 -; VI-NEXT: v_or_b32_sdwa v7, v7, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v47 -; VI-NEXT: v_or_b32_sdwa v8, v8, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v46 -; VI-NEXT: v_or_b32_sdwa v9, v9, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v10 -; VI-NEXT: v_add_u32_e32 v46, vcc, 0x300, v11 -; VI-NEXT: v_add_u32_e32 v56, vcc, 0x300, v13 -; VI-NEXT: v_lshlrev_b32_e32 v57, 16, v14 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17 -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v54 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v40 -; VI-NEXT: v_or_b32_sdwa v13, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v17, v18, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v47, 16, v12 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v42 -; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v43 -; VI-NEXT: v_or_b32_sdwa v12, v12, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v55 -; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v41 -; VI-NEXT: v_or_b32_sdwa v10, v10, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v44 -; VI-NEXT: v_add_u32_e32 v40, vcc, 0x300, v45 -; VI-NEXT: v_or_b32_sdwa v11, v11, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v35 -; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v36 -; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v19 -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v52 -; VI-NEXT: v_or_b32_sdwa v14, v14, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v15, v57, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v16, v47, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v19, v19, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v20, v20, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v21, v21, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_perm_b32 v13, s72, v1, v27 +; VI-NEXT: v_lshlrev_b32_e32 v47, 16, v63 +; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v16, s75, v0, v27 +; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v34 +; VI-NEXT: v_or_b32_sdwa v0, v27, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v32 +; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v33 +; VI-NEXT: v_or_b32_sdwa v1, v21, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v30 +; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v31 +; VI-NEXT: v_or_b32_sdwa v2, v21, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v28 +; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v29 +; VI-NEXT: v_or_b32_sdwa v3, v21, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v39 +; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v37 +; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v26 +; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v25 +; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v23 +; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v48 +; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v17 +; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v41 +; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v43 +; VI-NEXT: v_add_u32_e32 v41, vcc, 0x300, v57 +; VI-NEXT: v_lshlrev_b32_e32 v57, 16, v61 +; VI-NEXT: v_add_u32_e32 v44, vcc, 0x300, v16 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v4 +; VI-NEXT: v_add_u32_e32 v61, vcc, 0x300, v6 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v9 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v10 +; VI-NEXT: v_or_b32_sdwa v6, v6, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v9, v11, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v16, v17, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v62 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v14 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v56 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v58 +; VI-NEXT: v_or_b32_sdwa v4, v4, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v11, v47, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v14, v46, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x3000000, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x3000000, v4 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x3000000, v5 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x3000000, v6 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x3000000, v7 -; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8 ; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v9 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10 ; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v11 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13 ; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v14 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15 ; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20 -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v54, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v31, v54, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21 +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v41, vcc, 0x300, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v30, v40, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30 +; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v29, v42, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29 +; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v44, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v45, vcc, 0x300, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v28, v44, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28 +; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v46, 16, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v38 -; VI-NEXT: v_or_b32_sdwa v18, v18, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v27, v46, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v21 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v51 +; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v52 +; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v54 +; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v42 +; VI-NEXT: v_or_b32_sdwa v17, v18, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v18, v19, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v19, v20, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v20, v21, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v21, v22, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v22, v23, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v23, v24, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v24, v25, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v25, v26, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v26, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v27, v28, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v28, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v29, v31, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v30, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v42, vcc, 0x300, v60 +; VI-NEXT: v_lshlrev_b32_e32 v60, 16, v5 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v15 +; VI-NEXT: v_or_b32_sdwa v5, v5, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v8, v60, v61 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v10, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v12, v57, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v13, v59, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v15, v45, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v5, vcc, 0x3000000, v5 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17 ; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19 +; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21 +; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22 +; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23 +; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24 +; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25 +; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26 ; VI-NEXT: v_add_u32_e32 v27, vcc, 0x3000000, v27 +; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28 +; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29 +; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31 ; VI-NEXT: .LBB89_3: ; %end ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload @@ -147590,16 +147871,26 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB89_4: -; VI-NEXT: v_mov_b32_e32 v43, v39 -; VI-NEXT: v_mov_b32_e32 v52, v34 -; VI-NEXT: v_mov_b32_e32 v39, v33 -; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v34, v53 -; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v62, v2 -; VI-NEXT: v_mov_b32_e32 v35, v1 -; VI-NEXT: v_mov_b32_e32 v55, v57 +; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v34, v61 +; VI-NEXT: v_mov_b32_e32 v61, v1 +; VI-NEXT: v_mov_b32_e32 v32, v60 +; VI-NEXT: v_mov_b32_e32 v40, v4 +; VI-NEXT: v_mov_b32_e32 v33, v42 +; VI-NEXT: v_mov_b32_e32 v42, v3 +; VI-NEXT: v_mov_b32_e32 v39, v6 +; VI-NEXT: v_mov_b32_e32 v60, v5 +; VI-NEXT: v_mov_b32_e32 v53, v2 +; VI-NEXT: v_mov_b32_e32 v57, v59 ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; VI-NEXT: s_branch .LBB89_2 @@ -147633,15 +147924,11 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328 ; GFX9-NEXT: v_readfirstlane_b32 s43, v2 ; GFX9-NEXT: v_readfirstlane_b32 s6, v1 -; GFX9-NEXT: v_readfirstlane_b32 s8, v5 -; GFX9-NEXT: v_readfirstlane_b32 s10, v4 -; GFX9-NEXT: v_readfirstlane_b32 s15, v3 -; GFX9-NEXT: v_readfirstlane_b32 s12, v9 ; GFX9-NEXT: v_readfirstlane_b32 s14, v8 ; GFX9-NEXT: v_readfirstlane_b32 s47, v7 ; GFX9-NEXT: v_readfirstlane_b32 s59, v6 +; GFX9-NEXT: v_readfirstlane_b32 s12, v9 ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332 -; GFX9-NEXT: v_readfirstlane_b32 s42, v13 ; GFX9-NEXT: v_readfirstlane_b32 s74, v30 ; GFX9-NEXT: v_readfirstlane_b32 s44, v29 ; GFX9-NEXT: v_readfirstlane_b32 s56, v28 @@ -147659,117 +147946,115 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX9-NEXT: v_readfirstlane_b32 s58, v16 ; GFX9-NEXT: v_readfirstlane_b32 s73, v15 ; GFX9-NEXT: v_readfirstlane_b32 s75, v14 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; GFX9-NEXT: v_readfirstlane_b32 s42, v13 +; GFX9-NEXT: v_readfirstlane_b32 s8, v5 +; GFX9-NEXT: v_readfirstlane_b32 s10, v4 +; GFX9-NEXT: v_readfirstlane_b32 s15, v3 +; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:296 +; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:292 +; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:288 +; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:284 +; GFX9-NEXT: s_waitcnt vmcnt(5) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:312 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:308 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:304 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:296 -; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:292 -; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:288 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:280 -; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:276 -; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:272 -; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:268 -; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:264 -; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:260 -; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:256 -; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:252 -; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:248 -; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:244 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:236 -; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:280 +; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:276 +; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:272 +; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:268 +; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:264 +; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:260 +; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:256 +; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:252 +; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:248 +; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:244 +; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:240 +; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:236 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:228 +; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:224 +; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:220 +; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:204 +; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 -; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:172 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:188 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:184 -; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:180 -; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:176 -; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:172 -; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:168 -; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:164 -; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:160 -; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:156 -; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:152 -; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:148 -; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:144 -; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:140 -; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:136 -; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:132 -; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:128 -; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:124 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 +; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:148 +; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:144 +; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:140 +; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:136 +; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:132 +; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:128 +; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:124 ; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:120 -; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:116 -; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112 -; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:108 +; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:116 +; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:112 +; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:108 ; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:104 -; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:100 -; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:96 -; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:92 +; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:100 +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:96 +; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:92 ; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:88 ; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:84 -; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:80 -; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:76 +; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:80 +; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:76 ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:72 ; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:68 ; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:64 -; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:60 +; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:60 ; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:56 ; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:52 ; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:48 @@ -147782,114 +148067,139 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:20 ; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:16 ; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:12 +; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec +; GFX9-NEXT: s_waitcnt vmcnt(35) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:160 +; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:156 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(6) -; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(7) -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(12) -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(10) +; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(11) +; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(13) +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(16) +; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(27) +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(49) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill ; GFX9-NEXT: s_cbranch_scc0 .LBB89_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v0, s17 -; GFX9-NEXT: v_mov_b32_e32 v8, 0xc0c0004 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: v_perm_b32 v0, s16, v0, v8 +; GFX9-NEXT: v_mov_b32_e32 v9, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v0, s16, v0, v9 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v8 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 -; GFX9-NEXT: v_perm_b32 v1, s18, v1, v8 +; GFX9-NEXT: v_perm_b32 v1, s18, v1, v9 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v8 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v9 +; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v9 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 -; GFX9-NEXT: v_perm_b32 v2, s24, v2, v8 +; GFX9-NEXT: v_perm_b32 v2, s24, v2, v9 +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v3, s27 -; GFX9-NEXT: v_perm_b32 v3, s26, v3, v8 +; GFX9-NEXT: v_perm_b32 v3, s26, v3, v9 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 -; GFX9-NEXT: v_perm_b32 v3, s28, v3, v8 +; GFX9-NEXT: v_perm_b32 v3, s28, v3, v9 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v4, s6 -; GFX9-NEXT: v_perm_b32 v4, s7, v4, v8 +; GFX9-NEXT: v_perm_b32 v4, s7, v4, v9 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 ; GFX9-NEXT: v_mov_b32_e32 v4, s15 -; GFX9-NEXT: v_perm_b32 v4, s43, v4, v8 +; GFX9-NEXT: v_perm_b32 v4, s43, v4, v9 +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v5, s8 -; GFX9-NEXT: v_perm_b32 v5, s10, v5, v8 +; GFX9-NEXT: v_perm_b32 v5, s10, v5, v9 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 ; GFX9-NEXT: v_mov_b32_e32 v5, s47 -; GFX9-NEXT: v_perm_b32 v5, s59, v5, v8 +; GFX9-NEXT: v_perm_b32 v5, s59, v5, v9 +; GFX9-NEXT: v_mov_b32_e32 v60, v52 +; GFX9-NEXT: v_mov_b32_e32 v52, v6 ; GFX9-NEXT: v_mov_b32_e32 v6, s12 -; GFX9-NEXT: v_perm_b32 v6, s14, v6, v8 +; GFX9-NEXT: v_perm_b32 v6, s14, v6, v9 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 ; GFX9-NEXT: v_mov_b32_e32 v6, s61 -; GFX9-NEXT: v_perm_b32 v6, s63, v6, v8 +; GFX9-NEXT: v_perm_b32 v6, s63, v6, v9 +; GFX9-NEXT: v_mov_b32_e32 v48, v53 +; GFX9-NEXT: v_mov_b32_e32 v53, v7 ; GFX9-NEXT: v_mov_b32_e32 v7, s42 -; GFX9-NEXT: v_perm_b32 v7, s46, v7, v8 +; GFX9-NEXT: v_perm_b32 v7, s46, v7, v9 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 ; GFX9-NEXT: v_mov_b32_e32 v7, s73 -; GFX9-NEXT: v_perm_b32 v7, s75, v7, v8 -; GFX9-NEXT: v_mov_b32_e32 v63, v33 -; GFX9-NEXT: v_mov_b32_e32 v33, v9 -; GFX9-NEXT: v_mov_b32_e32 v9, s45 -; GFX9-NEXT: v_perm_b32 v9, s58, v9, v8 +; GFX9-NEXT: v_perm_b32 v7, s75, v7, v9 +; GFX9-NEXT: v_mov_b32_e32 v51, v37 +; GFX9-NEXT: v_mov_b32_e32 v37, v8 +; GFX9-NEXT: v_mov_b32_e32 v8, s45 +; GFX9-NEXT: v_perm_b32 v8, s58, v8, v9 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; GFX9-NEXT: v_lshl_or_b32 v7, v9, 16, v7 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v10 -; GFX9-NEXT: v_perm_b32 v10, s74, v12, v8 -; GFX9-NEXT: v_or_b32_sdwa v9, v11, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v9, 16, v10 +; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7 +; GFX9-NEXT: v_mov_b32_e32 v8, s57 +; GFX9-NEXT: v_perm_b32 v8, s60, v8, v9 +; GFX9-NEXT: v_perm_b32 v9, s74, v12, v9 +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v10 +; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v9 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v18 ; GFX9-NEXT: v_or_b32_sdwa v9, v22, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v13 @@ -147909,212 +148219,227 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v14, v10, 16, v9 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v19 -; GFX9-NEXT: v_perm_b32 v10, v35, v29, s4 +; GFX9-NEXT: v_perm_b32 v10, v44, v29, s4 ; GFX9-NEXT: v_or_b32_sdwa v9, v24, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v15, v9, 16, v10 -; GFX9-NEXT: v_perm_b32 v9, v39, v34, s4 +; GFX9-NEXT: v_perm_b32 v9, v45, v43, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v51, v36, s4 -; GFX9-NEXT: v_perm_b32 v16, v28, v23, s4 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_perm_b32 v17, v37, v27, s4 -; GFX9-NEXT: v_lshl_or_b32 v16, v16, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v41, v50, s4 -; GFX9-NEXT: v_lshl_or_b32 v17, v17, 16, v10 +; GFX9-NEXT: v_perm_b32 v10, v28, v23, s4 +; GFX9-NEXT: v_lshl_or_b32 v16, v10, 16, v9 +; GFX9-NEXT: v_perm_b32 v9, v32, v47, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v52, v31, s4 +; GFX9-NEXT: v_perm_b32 v10, v46, v27, s4 +; GFX9-NEXT: v_lshl_or_b32 v17, v10, 16, v9 +; GFX9-NEXT: v_perm_b32 v9, v63, v58, s4 +; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_perm_b32 v10, v41, v31, s4 ; GFX9-NEXT: v_lshl_or_b32 v18, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v40, v46, s4 +; GFX9-NEXT: v_perm_b32 v9, v33, v35, s4 +; GFX9-NEXT: v_mov_b32_e32 v45, v56 +; GFX9-NEXT: v_perm_b32 v10, v61, v56, s4 +; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v32, v38, s4 ; GFX9-NEXT: v_lshl_or_b32 v19, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v55, v57, s4 +; GFX9-NEXT: v_perm_b32 v9, v42, v39, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v45, v49, s4 +; GFX9-NEXT: v_mov_b32_e32 v63, v35 +; GFX9-NEXT: v_mov_b32_e32 v32, v58 +; GFX9-NEXT: v_mov_b32_e32 v58, v41 +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; GFX9-NEXT: s_lshl_b32 s5, s41, 8 +; GFX9-NEXT: s_lshl_b32 s77, s9, 8 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_mov_b32_e32 v47, v46 +; GFX9-NEXT: v_mov_b32_e32 v46, v31 +; GFX9-NEXT: s_lshl_b32 s78, s44, 8 +; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(8) +; GFX9-NEXT: v_perm_b32 v10, v34, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v20, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v53, v60, s4 +; GFX9-NEXT: v_perm_b32 v9, v36, v54, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v56, v44, s4 +; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(6) +; GFX9-NEXT: v_perm_b32 v10, v56, v33, s4 ; GFX9-NEXT: v_lshl_or_b32 v21, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v58, v42, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_mov_b32_e32 v36, v9 +; GFX9-NEXT: v_perm_b32 v9, v50, v9, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v59, v47, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v10, v35, s4 ; GFX9-NEXT: v_lshl_or_b32 v22, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v50, v32 -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v51, v49 -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v41, v46 -; GFX9-NEXT: v_mov_b32_e32 v39, v52 -; GFX9-NEXT: v_mov_b32_e32 v52, v38 -; GFX9-NEXT: v_mov_b32_e32 v34, v37 -; GFX9-NEXT: v_mov_b32_e32 v37, v31 -; GFX9-NEXT: s_lshl_b32 s5, s13, 8 -; GFX9-NEXT: s_lshl_b32 s77, s9, 8 -; GFX9-NEXT: s_lshl_b32 s78, s44, 8 -; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: v_perm_b32 v9, v9, v10, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_mov_b32_e32 v50, v9 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4 +; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: s_waitcnt vmcnt(7) -; GFX9-NEXT: v_perm_b32 v10, v32, v58, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v42, v10, s4 ; GFX9-NEXT: v_lshl_or_b32 v23, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v41 +; GFX9-NEXT: v_or_b32_sdwa v10, v44, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v49 -; GFX9-NEXT: v_or_b32_sdwa v10, v24, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 +; GFX9-NEXT: v_or_b32_sdwa v9, v57, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v24, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v35 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v54 +; GFX9-NEXT: v_mov_b32_e32 v57, v60 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v10, v25, v10, s4 +; GFX9-NEXT: v_perm_b32 v10, v49, v55, s4 ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v25, v9, 16, v10 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v33 -; GFX9-NEXT: v_or_b32_sdwa v10, v62, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v33, v46 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; GFX9-NEXT: v_or_b32_sdwa v9, v43, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v38 +; GFX9-NEXT: v_or_b32_sdwa v9, v48, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v53 +; GFX9-NEXT: v_or_b32_sdwa v10, v37, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v26, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v48 -; GFX9-NEXT: v_perm_b32 v10, v63, v61, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v54, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v52 +; GFX9-NEXT: v_perm_b32 v10, v59, v51, s4 +; GFX9-NEXT: v_or_b32_sdwa v9, v40, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v27, v9, 16, v10 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v54, v61 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v60 +; GFX9-NEXT: v_or_b32_sdwa v9, v62, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_mov_b32_e32 v48, v63 -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v48, v29 +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v53, v30 +; GFX9-NEXT: v_mov_b32_e32 v38, v39 +; GFX9-NEXT: s_waitcnt vmcnt(5) ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v10 ; GFX9-NEXT: v_or_b32_sdwa v10, v28, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshl_or_b32 v28, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_mov_b32_e32 v40, v37 ; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_mov_b32_e32 v51, v9 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v10, v36, v10, s4 +; GFX9-NEXT: v_mov_b32_e32 v52, v10 +; GFX9-NEXT: v_perm_b32 v10, v10, v29, s4 ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v29, v9, 16, v10 -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v43 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v49 ; GFX9-NEXT: v_or_b32_sdwa v9, v62, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_mov_b32_e32 v60, v10 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v10 ; GFX9-NEXT: v_or_b32_sdwa v10, v30, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshl_or_b32 v30, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v38 -; GFX9-NEXT: v_perm_b32 v10, v63, v61, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v46, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v31, v9, 16, v10 -; GFX9-NEXT: v_mov_b32_e32 v9, s57 -; GFX9-NEXT: v_perm_b32 v8, s60, v9, v8 -; GFX9-NEXT: s_and_b32 s4, s40, 0xff -; GFX9-NEXT: s_or_b32 s4, s4, s5 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX9-NEXT: v_lshl_or_b32 v9, s4, 16, v8 +; GFX9-NEXT: v_perm_b32 v10, v59, v55, s4 ; GFX9-NEXT: s_and_b32 s4, s76, 0xff -; GFX9-NEXT: s_lshl_b32 s5, s41, 8 ; GFX9-NEXT: s_or_b32 s4, s4, s5 ; GFX9-NEXT: s_and_b32 s5, s11, 0xff ; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_pack_ll_b32_b16 s4, s4, s5 -; GFX9-NEXT: s_and_b32 s5, s72, 0xff -; GFX9-NEXT: s_lshl_b32 s77, s62, 8 -; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_and_b32 s77, s56, 0xff -; GFX9-NEXT: s_or_b32 s77, s77, s78 -; GFX9-NEXT: s_pack_ll_b32_b16 s5, s5, s77 -; GFX9-NEXT: v_mov_b32_e32 v8, s4 -; GFX9-NEXT: v_mov_b32_e32 v10, s5 +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v39 +; GFX9-NEXT: s_pack_ll_b32_b16 s77, s4, s5 +; GFX9-NEXT: s_and_b32 s4, s40, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s13, 8 +; GFX9-NEXT: v_or_b32_sdwa v9, v37, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NEXT: s_or_b32 s4, s4, s5 +; GFX9-NEXT: v_lshl_or_b32 v31, v9, 16, v10 +; GFX9-NEXT: v_lshl_or_b32 v9, s4, 16, v8 +; GFX9-NEXT: s_and_b32 s4, s72, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s62, 8 +; GFX9-NEXT: s_or_b32 s4, s4, s5 +; GFX9-NEXT: s_and_b32 s5, s56, 0xff +; GFX9-NEXT: s_or_b32 s5, s5, s78 +; GFX9-NEXT: s_pack_ll_b32_b16 s78, s4, s5 ; GFX9-NEXT: s_mov_b64 s[4:5], 0 -; GFX9-NEXT: v_mov_b32_e32 v63, v36 +; GFX9-NEXT: v_mov_b32_e32 v8, s77 +; GFX9-NEXT: v_mov_b32_e32 v10, s78 +; GFX9-NEXT: v_mov_b32_e32 v37, v49 ; GFX9-NEXT: s_branch .LBB89_3 ; GFX9-NEXT: .LBB89_2: -; GFX9-NEXT: v_mov_b32_e32 v54, v61 -; GFX9-NEXT: v_mov_b32_e32 v50, v32 -; GFX9-NEXT: v_mov_b32_e32 v51, v49 -; GFX9-NEXT: v_mov_b32_e32 v39, v52 -; GFX9-NEXT: v_mov_b32_e32 v52, v38 -; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v41, v46 -; GFX9-NEXT: v_mov_b32_e32 v34, v37 -; GFX9-NEXT: v_mov_b32_e32 v37, v31 +; GFX9-NEXT: v_mov_b32_e32 v63, v35 +; GFX9-NEXT: v_mov_b32_e32 v32, v58 +; GFX9-NEXT: v_mov_b32_e32 v58, v41 +; GFX9-NEXT: v_mov_b32_e32 v45, v56 +; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v57, v52 +; GFX9-NEXT: v_mov_b32_e32 v60, v2 +; GFX9-NEXT: v_mov_b32_e32 v48, v5 +; GFX9-NEXT: v_mov_b32_e32 v53, v1 +; GFX9-NEXT: v_mov_b32_e32 v52, v4 +; GFX9-NEXT: v_mov_b32_e32 v51, v3 +; GFX9-NEXT: v_mov_b32_e32 v47, v46 +; GFX9-NEXT: v_mov_b32_e32 v46, v31 ; GFX9-NEXT: s_mov_b64 s[4:5], -1 ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; GFX9-NEXT: .LBB89_3: ; %Flow -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; GFX9-NEXT: s_andn2_b64 vcc, exec, s[4:5] ; GFX9-NEXT: s_cbranch_vccnz .LBB89_5 ; GFX9-NEXT: ; %bb.4: ; %cmp.true -; GFX9-NEXT: s_waitcnt vmcnt(5) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v48 +; GFX9-NEXT: s_waitcnt vmcnt(8) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v59 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v0, v0, v61, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_u32_e32 v0, 3, v33 -; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_perm_b32 v0, v0, v55, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v40 +; GFX9-NEXT: s_waitcnt vmcnt(6) ; GFX9-NEXT: v_perm_b32 v0, v0, v38, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill ; GFX9-NEXT: v_add_u32_e32 v0, 3, v62 -; GFX9-NEXT: v_perm_b32 v0, v0, v43, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; GFX9-NEXT: s_add_i32 s74, s74, 3 +; GFX9-NEXT: v_perm_b32 v0, v0, v37, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v53 +; GFX9-NEXT: v_perm_b32 v0, v0, v60, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v52 +; GFX9-NEXT: v_perm_b32 v48, v0, v48, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; GFX9-NEXT: s_add_i32 s74, s74, 3 ; GFX9-NEXT: s_add_i32 s72, s72, 3 ; GFX9-NEXT: s_add_i32 s56, s56, 3 ; GFX9-NEXT: s_add_i32 s60, s60, 3 @@ -148133,372 +148458,369 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX9-NEXT: s_add_i32 s7, s7, 3 ; GFX9-NEXT: s_add_i32 s24, s24, 3 ; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: s_add_i32 s16, s16, 3 ; GFX9-NEXT: s_add_i32 s20, s20, 3 ; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: s_add_i32 s16, s16, 3 -; GFX9-NEXT: v_mov_b32_e32 v33, s17 ; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v29, s19 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_u32_e32 v0, 3, v63 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v0, v0, v51, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v39 +; GFX9-NEXT: v_perm_b32 v31, v0, v57, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v39, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v62, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v30, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v54, s4 -; GFX9-NEXT: v_add_u32_e32 v63, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v28, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; GFX9-NEXT: v_perm_b32 v37, v0, v1, s4 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v37, 0x300, v37 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v27, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v38, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v38 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v35, s4 -; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v36 +; GFX9-NEXT: v_perm_b32 v26, v0, v54, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v25, v0, v1, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v44 +; GFX9-NEXT: v_perm_b32 v24, v0, v41, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v49, s4 -; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v23, v0, v50, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v42 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v32 -; GFX9-NEXT: v_perm_b32 v0, v0, v58, s4 -; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v32, s23 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v42, s4 -; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v59 -; GFX9-NEXT: v_perm_b32 v0, v0, v47, s4 -; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v53 -; GFX9-NEXT: v_perm_b32 v0, v0, v60, s4 -; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v56 -; GFX9-NEXT: v_perm_b32 v0, v0, v44, s4 -; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v55 -; GFX9-NEXT: v_perm_b32 v0, v0, v57, s4 -; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v45 -; GFX9-NEXT: v_perm_b32 v0, v0, v51, s4 -; GFX9-NEXT: v_add_u32_e32 v49, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v40 -; GFX9-NEXT: v_perm_b32 v0, v0, v41, s4 -; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v50 -; GFX9-NEXT: v_perm_b32 v0, v0, v52, s4 -; GFX9-NEXT: v_add_u32_e32 v52, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v22, 0xffff, v22 -; GFX9-NEXT: v_lshl_or_b32 v21, v21, 16, v22 -; GFX9-NEXT: v_and_b32_e32 v22, 0xffff, v24 -; GFX9-NEXT: v_lshl_or_b32 v22, v23, 16, v22 -; GFX9-NEXT: v_and_b32_e32 v23, 0xffff, v26 -; GFX9-NEXT: v_lshl_or_b32 v23, v25, 16, v23 -; GFX9-NEXT: v_and_b32_e32 v25, 0xffff, v30 -; GFX9-NEXT: v_lshl_or_b32 v25, v29, 16, v25 -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v24, 0xffff, v28 -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v24, v27, 16, v24 -; GFX9-NEXT: v_and_b32_e32 v27, 0xffff, v63 -; GFX9-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; GFX9-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; GFX9-NEXT: v_lshl_or_b32 v19, v52, 16, v19 -; GFX9-NEXT: v_lshl_or_b32 v20, v49, 16, v20 -; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_perm_b32 v22, v0, v36, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v49, 0x300, v22 +; GFX9-NEXT: v_add_u32_e32 v36, 0x300, v30 +; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v28 +; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v26 +; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v21 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v39 -; GFX9-NEXT: v_perm_b32 v0, v0, v37, s4 -; GFX9-NEXT: v_add_u32_e32 v37, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v50, v0, v35, s4 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; GFX9-NEXT: v_lshl_or_b32 v18, v37, 16, v18 +; GFX9-NEXT: v_mov_b32_e32 v35, s17 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v51, v0, v1, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v56 +; GFX9-NEXT: v_perm_b32 v52, v0, v33, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u32_e32 v54, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v53, v0, v1, s4 ; GFX9-NEXT: v_add_u32_e32 v0, 3, v34 -; GFX9-NEXT: v_mov_b32_e32 v34, s19 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v54, v0, v43, s4 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v34, s23 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v55, v0, v63, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v61 +; GFX9-NEXT: v_perm_b32 v40, v0, v45, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v40 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v41, v0, v32, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v58 +; GFX9-NEXT: v_perm_b32 v42, v0, v46, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v42 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v20, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v0, 3, v47 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v44, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v55, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v16, v55, 16, v16 +; GFX9-NEXT: v_perm_b32 v19, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; GFX9-NEXT: v_perm_b32 v46, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v45, 0x300, v46 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v40, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v15, v40, 16, v15 +; GFX9-NEXT: v_perm_b32 v47, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v40, 0x300, v47 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX9-NEXT: v_perm_b32 v56, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v46, 0x300, v56 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v41, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v14, v41, 16, v14 +; GFX9-NEXT: v_perm_b32 v57, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; GFX9-NEXT: v_perm_b32 v59, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v47, 0x300, v59 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v42, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v13, v42, 16, v13 +; GFX9-NEXT: v_perm_b32 v61, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v42, 0x300, v61 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX9-NEXT: v_perm_b32 v62, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v56, 0x300, v62 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u32_e32 v43, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v63, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v43, 0x300, v63 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v12, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; GFX9-NEXT: v_mov_b32_e32 v0, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v32, s22, v32, v0 -; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v32 -; GFX9-NEXT: v_perm_b32 v33, s16, v33, v0 -; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v33 -; GFX9-NEXT: v_and_b32_e32 v33, 0xffff, v33 -; GFX9-NEXT: v_lshl_or_b32 v12, v43, 16, v12 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, s74, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v1 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX9-NEXT: v_perm_b32 v35, s16, v35, v0 +; GFX9-NEXT: v_perm_b32 v34, s22, v34, v0 +; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v18, s74, v1, v0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: v_add_u32_e32 v44, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v11, v1, v2, s4 ; GFX9-NEXT: v_mov_b32_e32 v1, s62 -; GFX9-NEXT: v_perm_b32 v1, s72, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v17, s72, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s44 -; GFX9-NEXT: v_perm_b32 v1, s56, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v45, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v8, s56, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s57 -; GFX9-NEXT: v_perm_b32 v1, s60, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v9, s60, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s13 -; GFX9-NEXT: v_perm_b32 v1, s40, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v46, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v10, s40, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s41 -; GFX9-NEXT: v_perm_b32 v1, s76, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v16, s76, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s9 -; GFX9-NEXT: v_perm_b32 v1, s11, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v47, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v15, s11, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s73 -; GFX9-NEXT: v_perm_b32 v1, s75, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v7, s75, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s45 -; GFX9-NEXT: v_perm_b32 v1, s58, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v56, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v14, s58, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s61 -; GFX9-NEXT: v_perm_b32 v1, s63, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v13, s63, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s42 -; GFX9-NEXT: v_perm_b32 v1, s46, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v57, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v6, s46, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s47 -; GFX9-NEXT: v_perm_b32 v1, s59, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v5, s59, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s12 -; GFX9-NEXT: v_perm_b32 v1, s14, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v58, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v4, s14, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s15 -; GFX9-NEXT: v_perm_b32 v1, s43, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v58, s43, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s8 -; GFX9-NEXT: v_perm_b32 v1, s10, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v59, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v60, s10, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s29 -; GFX9-NEXT: v_perm_b32 v1, s28, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v3, s28, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s6 -; GFX9-NEXT: v_perm_b32 v1, s7, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v60, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v32, s7, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s25 -; GFX9-NEXT: v_perm_b32 v1, s24, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v2, s24, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s27 -; GFX9-NEXT: v_perm_b32 v1, s26, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v61, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v33, s26, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s21 ; GFX9-NEXT: v_perm_b32 v1, s20, v1, v0 +; GFX9-NEXT: v_perm_b32 v0, s18, v29, v0 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v35 +; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 +; GFX9-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 +; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v29 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v34 ; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: v_lshl_or_b32 v1, v32, 16, v1 -; GFX9-NEXT: v_and_b32_e32 v32, 0xffff, v54 -; GFX9-NEXT: v_lshl_or_b32 v17, v17, 16, v32 -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v29, 0xffff, v29 -; GFX9-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; GFX9-NEXT: v_lshl_or_b32 v29, v30, 16, v29 -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v26, v31, 16, v26 -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 +; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 +; GFX9-NEXT: v_lshl_or_b32 v1, v29, 16, v1 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v33 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_lshl_or_b32 v2, v29, 16, v2 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v32 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX9-NEXT: v_lshl_or_b32 v3, v29, 16, v3 +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v35, 0x300, v31 +; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v39 +; GFX9-NEXT: v_add_u32_e32 v39, 0x300, v25 +; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v50 +; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v9 +; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v17 +; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v10 +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_add_u32_e32 v34, 0x300, v48 +; GFX9-NEXT: v_add_u32_e32 v48, 0x300, v23 +; GFX9-NEXT: v_add_u32_e32 v50, 0x300, v51 +; GFX9-NEXT: v_add_u32_e32 v51, 0x300, v53 +; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v54 +; GFX9-NEXT: v_add_u32_e32 v53, 0x300, v41 +; GFX9-NEXT: v_add_u32_e32 v54, 0x300, v20 +; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v44 +; GFX9-NEXT: v_add_u32_e32 v44, 0x300, v18 +; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v8 +; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 +; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v17 +; GFX9-NEXT: v_lshl_or_b32 v10, v18, 16, v10 +; GFX9-NEXT: v_and_b32_e32 v18, 0xffff, v53 +; GFX9-NEXT: v_and_b32_e32 v17, 0xffff, v54 +; GFX9-NEXT: v_lshl_or_b32 v18, v21, 16, v18 +; GFX9-NEXT: v_and_b32_e32 v21, 0xffff, v50 +; GFX9-NEXT: v_lshl_or_b32 v17, v20, 16, v17 +; GFX9-NEXT: v_and_b32_e32 v20, 0xffff, v51 +; GFX9-NEXT: v_lshl_or_b32 v20, v23, 16, v20 +; GFX9-NEXT: v_and_b32_e32 v23, 0xffff, v48 +; GFX9-NEXT: v_lshl_or_b32 v23, v26, 16, v23 +; GFX9-NEXT: v_and_b32_e32 v26, 0xffff, v37 +; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 +; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v11 +; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v16 +; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 +; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v6, 16, v13 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v44 +; GFX9-NEXT: v_add_u32_e32 v41, 0x300, v57 +; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v15 +; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v14 +; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v4 +; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v58 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v27, v28, 16, v27 -; GFX9-NEXT: v_and_b32_e32 v28, 0xffff, v38 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v33 -; GFX9-NEXT: v_lshl_or_b32 v2, v61, 16, v2 -; GFX9-NEXT: v_lshl_or_b32 v3, v60, 16, v3 -; GFX9-NEXT: v_lshl_or_b32 v4, v59, 16, v4 -; GFX9-NEXT: v_lshl_or_b32 v5, v58, 16, v5 -; GFX9-NEXT: v_lshl_or_b32 v6, v57, 16, v6 -; GFX9-NEXT: v_lshl_or_b32 v7, v56, 16, v7 -; GFX9-NEXT: v_lshl_or_b32 v8, v47, 16, v8 -; GFX9-NEXT: v_lshl_or_b32 v9, v46, 16, v9 -; GFX9-NEXT: v_lshl_or_b32 v10, v45, 16, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v44, 16, v11 -; GFX9-NEXT: v_lshl_or_b32 v28, v62, 16, v28 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_and_b32_e32 v30, 0xffff, v30 +; GFX9-NEXT: v_lshl_or_b32 v11, v11, 16, v13 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v43 +; GFX9-NEXT: v_add_u32_e32 v57, 0x300, v60 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v16, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v7, v14, 16, v7 +; GFX9-NEXT: v_lshl_or_b32 v8, v15, 16, v8 +; GFX9-NEXT: v_lshl_or_b32 v12, v12, 16, v13 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v42 +; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v41 +; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v40 +; GFX9-NEXT: v_lshl_or_b32 v4, v57, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v13, v56, 16, v13 +; GFX9-NEXT: v_lshl_or_b32 v14, v47, 16, v14 +; GFX9-NEXT: v_lshl_or_b32 v15, v46, 16, v15 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29 +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29 +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v29 +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29 +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v29 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v27 +; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v24 +; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v52 +; GFX9-NEXT: v_add_u32_e32 v52, 0x300, v55 +; GFX9-NEXT: v_add_u32_e32 v55, 0x300, v19 +; GFX9-NEXT: v_and_b32_e32 v19, 0xffff, v52 +; GFX9-NEXT: v_lshl_or_b32 v19, v22, 16, v19 +; GFX9-NEXT: v_and_b32_e32 v22, 0xffff, v49 +; GFX9-NEXT: v_lshl_or_b32 v22, v25, 16, v22 +; GFX9-NEXT: v_and_b32_e32 v25, 0xffff, v38 +; GFX9-NEXT: v_lshl_or_b32 v25, v28, 16, v25 +; GFX9-NEXT: v_and_b32_e32 v28, 0xffff, v35 +; GFX9-NEXT: v_lshl_or_b32 v28, v31, 16, v28 +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshl_or_b32 v21, v24, 16, v21 +; GFX9-NEXT: v_and_b32_e32 v24, 0xffff, v39 +; GFX9-NEXT: v_lshl_or_b32 v24, v27, 16, v24 +; GFX9-NEXT: v_and_b32_e32 v27, 0xffff, v36 +; GFX9-NEXT: v_lshl_or_b32 v27, v30, 16, v27 +; GFX9-NEXT: v_and_b32_e32 v30, 0xffff, v33 +; GFX9-NEXT: v_lshl_or_b32 v26, v29, 16, v26 +; GFX9-NEXT: v_and_b32_e32 v29, 0xffff, v34 +; GFX9-NEXT: v_lshl_or_b32 v29, v32, 16, v29 +; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: v_and_b32_e32 v16, 0xffff, v55 +; GFX9-NEXT: v_lshl_or_b32 v16, v45, 16, v16 +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_lshl_or_b32 v30, v31, 16, v30 -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31 @@ -148525,10 +148847,12 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v64bf16_scalar: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x2 ; 12-byte Folded Spill +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:328 +; GFX11-TRUE16-NEXT: ; meta instruction +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:324 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:320 ; GFX11-TRUE16-NEXT: s_clause 0x1f ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:312 ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:308 @@ -148651,13 +148975,14 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, 0xc0c0004 :: v_dual_lshlrev_b32 v13, 8, v86 -; GFX11-TRUE16-NEXT: s_and_b32 s76, s43, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s77, s11, 8 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 8, v37 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: s_and_b32 s76, s63, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s77, s57, 8 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s56, 0xff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v8 +; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s5, 8 ; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v8 @@ -148665,140 +148990,138 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l ; GFX11-TRUE16-NEXT: v_perm_b32 v5, s9, s4, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v8 +; GFX11-TRUE16-NEXT: s_or_b32 s76, s76, s77 +; GFX11-TRUE16-NEXT: s_or_b32 s77, s78, s79 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s43, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s11, 8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l ; GFX11-TRUE16-NEXT: v_perm_b32 v6, s40, s8, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v7, s14, s7, v8 -; GFX11-TRUE16-NEXT: s_or_b32 s76, s76, s77 +; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 +; GFX11-TRUE16-NEXT: s_or_b32 s77, s78, s79 ; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v9, s12, s6, v8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l ; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v8 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s76 :: v_dual_lshlrev_b32 v15, 8, v70 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s77 :: v_dual_lshlrev_b32 v15, 8, v70 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l ; GFX11-TRUE16-NEXT: v_perm_b32 v5, s61, s45, v8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l ; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s15, v8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v7.l ; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s58, v8 +; GFX11-TRUE16-NEXT: s_and_b32 s77, s62, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s78, s47, 8 +; GFX11-TRUE16-NEXT: s_and_b32 s79, s46, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s88, s13, 8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l ; GFX11-TRUE16-NEXT: v_perm_b32 v9, s59, s44, v8 +; GFX11-TRUE16-NEXT: s_or_b32 s77, s77, s78 +; GFX11-TRUE16-NEXT: s_or_b32 s78, s79, s88 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v10.l ; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v68 -; GFX11-TRUE16-NEXT: s_and_b32 s88, s41, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s89, s10, 8 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 8, v37 +; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s77, s77, s78 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s41, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s10, 8 ; GFX11-TRUE16-NEXT: v_perm_b32 v11, s73, s42, v8 -; GFX11-TRUE16-NEXT: s_or_b32 s88, s88, s89 +; GFX11-TRUE16-NEXT: s_or_b32 s78, s78, s79 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v12 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s88 -; GFX11-TRUE16-NEXT: s_and_b32 s88, s74, 0xff -; GFX11-TRUE16-NEXT: s_and_b32 s77, s63, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s76, s57, 8 -; GFX11-TRUE16-NEXT: s_and_b32 s78, s56, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s5, 8 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s78 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v114 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, s88, v13 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s74, 0xff +; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xff, v83 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, s78, v13 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v10.l ; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v38 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 8, v32 -; GFX11-TRUE16-NEXT: s_or_b32 s76, s77, s76 -; GFX11-TRUE16-NEXT: s_or_b32 s77, s78, s79 -; GFX11-TRUE16-NEXT: s_and_b32 s78, s62, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s47, 8 -; GFX11-TRUE16-NEXT: s_and_b32 s88, s46, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s89, s13, 8 -; GFX11-TRUE16-NEXT: s_or_b32 s78, s78, s79 -; GFX11-TRUE16-NEXT: s_or_b32 s79, s88, s89 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v8.l ; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v14, v15 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v83 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 8, v33 -; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xff, v50 -; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s77, s78, s79 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v50 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 8, v33 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 8, v39 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v13 ; GFX11-TRUE16-NEXT: v_perm_b32 v13, v134, v96, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v8.l -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v15, v16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v17 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v53, v34, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s76 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v14, v15 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v17 ; GFX11-TRUE16-NEXT: v_perm_b32 v15, v99, v65, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v8.l -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v66, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v53, v34, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v71, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v18.l +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v66, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v69, v36, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v16, v97, v48, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v71, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v84, v49, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v17.l ; GFX11-TRUE16-NEXT: v_perm_b32 v17, v103, v54, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v8.l -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v69, v36, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v98, v52, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l ; GFX11-TRUE16-NEXT: v_perm_b32 v18, v116, v67, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v84, v49, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v113, v55, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v24, 0xff, v117 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 8, v64 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xff, v164 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 8, v119 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v19.l ; GFX11-TRUE16-NEXT: v_perm_b32 v19, v130, v80, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v8.l -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v98, v52, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v118, v85, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v131 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 8, v82 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l ; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v112, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v113, v55, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v21.l ; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v81, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v8.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l ; GFX11-TRUE16-NEXT: v_perm_b32 v22, v147, v100, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v118, v85, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v117 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 8, v64 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v23.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v24, v25 ; GFX11-TRUE16-NEXT: v_perm_b32 v23, v151, v115, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v8.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v164 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 8, v119 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v26, 0xff, v131 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 8, v82 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v24 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v28, 0xff, v149 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v8, v25 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v27, v28 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xff, v144 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 8, v87 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v26.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v29, v30 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v167 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 8, v128 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v25.l ; GFX11-TRUE16-NEXT: v_perm_b32 v25, v176, v148, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v26, v27 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v144 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 8, v87 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 8, v128 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v8.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v167 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 8, v101 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v26 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v27, v28 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v28, 0xff, v149 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v101 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v29, v30 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v162 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 8, v132 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v28, v31 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v31, 0xff, v179 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 8, v150 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v40, 8, v102 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v29, v30 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v30, 0xff, v160 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v102 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v8, v27 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v28, v29 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v162 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 8, v132 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v27.l ; GFX11-TRUE16-NEXT: v_perm_b32 v27, v177, v146, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v8.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v179 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 8, v150 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v28 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v30, v31 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v133 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v40, 0xff, v182 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v8, v29 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v166 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v165 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 8, v129 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v41, v29, v31 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v178 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v31, v183 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v29.l +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v165 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v129 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v30, v40 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v183, 0xff, v166 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v40, 8, v133 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v41, 0xff, v182 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v42, 8, v178 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v29, v31 ; GFX11-TRUE16-NEXT: v_perm_b32 v29, v181, v163, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v183, v8, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v183, v183, v40 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s76 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v40, v31 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v41, v42 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v31.l ; GFX11-TRUE16-NEXT: v_perm_b32 v31, v180, v161, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v10.l ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, s77 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v183.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v41.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v183.l ; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB89_3 ; GFX11-TRUE16-NEXT: .LBB89_2: ; %cmp.true @@ -149031,9 +149354,10 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v129.l ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v133.l ; GFX11-TRUE16-NEXT: .LBB89_3: ; %end -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload -; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:320 -; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x2 ; 12-byte Folded Reload +; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:324 +; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:328 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-TRUE16-NEXT: .LBB89_4: @@ -149044,7 +149368,14 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX11-FAKE16-LABEL: bitcast_v128i8_to_v64bf16_scalar: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:320 ; 4-byte Folded Spill +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:332 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:328 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:324 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:320 ; GFX11-FAKE16-NEXT: s_clause 0x1f ; GFX11-FAKE16-NEXT: scratch_load_u16 v166, off, s32 offset:312 ; GFX11-FAKE16-NEXT: scratch_load_u16 v180, off, s32 offset:308 @@ -149166,11 +149497,10 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB89_4 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_and_b32 s76, s74, 0xff -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2) -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 8, v33 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xff, v48 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 8, v32 +; GFX11-FAKE16-NEXT: s_and_b32 s76, s58, 0xff +; GFX11-FAKE16-NEXT: s_lshl_b32 s77, s47, 8 +; GFX11-FAKE16-NEXT: s_lshl_b32 s78, s13, 8 +; GFX11-FAKE16-NEXT: s_or_b32 s76, s76, s77 ; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v8 ; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v8 ; GFX11-FAKE16-NEXT: v_perm_b32 v4, s20, s21, v8 @@ -149185,175 +149515,164 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v0 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v2 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v5, 16, v4 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s11, s8, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s11, s8, v8 +; GFX11-FAKE16-NEXT: s_and_b32 s77, s40, 0xff +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s7, s5, v8 +; GFX11-FAKE16-NEXT: s_or_b32 s77, s77, s78 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s44, s41, v8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s6, s4, v8 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s7, s5, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v4 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v67, v51, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v16, v80, v66, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v5, 16, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v68, v55, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v10, 16, v11 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v35 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v8 ; GFX11-FAKE16-NEXT: v_perm_b32 v9, s42, s15, v8 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s44, s41, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v18, v69, v52, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v7, 16, v3 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s12, s9, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v17, 16, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v116, v103, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_lshl_b32 s77, s43, 8 -; GFX11-FAKE16-NEXT: v_perm_b32 v22, v118, v101, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v7, 16, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s14, s10, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, s76, v11 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v38 -; GFX11-FAKE16-NEXT: s_and_b32 s76, s46, 0xff -; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v7, 16, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v11, v12 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v13, v14 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v15 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v53 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 8, v37 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v9, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xff, v49 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 8, v36 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v11, 16, v13 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v14, v15 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v50 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 8, v34 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v65, v39, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-FAKE16-NEXT: s_or_b32 s76, s76, s77 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v14, v15 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v82, v64, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v22 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v115, v99, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xff, v130 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v14 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v9, 16, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, v96, v85, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v15, 16, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v71, v54, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v98, v83, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v18, 16, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s6, s4, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s12, s9, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, s14, s10, v8 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v86, v81, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 8, v117 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 8, v144 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v10, 16, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, v102, v84, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s60, s57, v8 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v19, 16, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v87, v70, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 8, v135 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v150 -; GFX11-FAKE16-NEXT: s_lshl_b32 s77, s47, 8 -; GFX11-FAKE16-NEXT: s_and_b32 s78, s40, 0xff -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v11, 16, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v112, v100, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, s76, 16, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v132, v129, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_and_b32 s76, s58, 0xff -; GFX11-FAKE16-NEXT: s_lshl_b32 s79, s13, 8 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v21, v11, 16, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v113, v97, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v10, 16, v5 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 8, v35 +; GFX11-FAKE16-NEXT: s_and_b32 s89, s74, 0xff +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v7, 16, v3 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v4, 16, v6 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v12, 16, v9 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v13, 16, v11 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v38 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 8, v33 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, s89, v10 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xff, v48 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 8, v32 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xff, v53 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v11, v12 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: s_or_b32 s76, s76, s77 -; GFX11-FAKE16-NEXT: s_or_b32 s77, s78, s79 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s73, s72, v8 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v22, v11, 16, v22 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v23, v23, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v134 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v119 -; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 8, v37 +; GFX11-FAKE16-NEXT: s_and_b32 s79, s46, 0xff +; GFX11-FAKE16-NEXT: s_lshl_b32 s88, s43, 8 ; GFX11-FAKE16-NEXT: s_and_b32 s77, s62, 0xff +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v12, 16, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v13, v14 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v15, v16 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 8, v36 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s60, s57, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s73, s72, v8 +; GFX11-FAKE16-NEXT: s_or_b32 s78, s79, s88 +; GFX11-FAKE16-NEXT: s_and_b32 s79, s56, 0xff +; GFX11-FAKE16-NEXT: s_lshl_b32 s88, s45, 8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v49 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xff, v50 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 8, v34 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, s78, 16, v9 ; GFX11-FAKE16-NEXT: s_lshl_b32 s78, s59, 8 -; GFX11-FAKE16-NEXT: s_lshl_b32 s79, s45, 8 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v24, v25 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xff, v131 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 8, v114 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v65, v39, 0xc0c0004 ; GFX11-FAKE16-NEXT: s_or_b32 s77, s77, s78 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: s_and_b32 s78, s56, 0xff -; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v24, v25 -; GFX11-FAKE16-NEXT: v_perm_b32 v24, v146, v128, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_or_b32 s78, s78, s79 +; GFX11-FAKE16-NEXT: s_or_b32 s78, s79, s88 ; GFX11-FAKE16-NEXT: s_and_b32 s79, s63, 0xff ; GFX11-FAKE16-NEXT: s_lshl_b32 s88, s61, 8 ; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s77, s77, s78 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xffff, v24 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v24, v11, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v160 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v147 ; GFX11-FAKE16-NEXT: s_or_b32 s78, s79, s88 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v25, v25, 16, v26 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xff, v148 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v26, v27 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xff, v149 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 8, v133 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v26, v27 -; GFX11-FAKE16-NEXT: v_perm_b32 v26, v162, v145, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff, v26 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v11, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v177 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v164 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v27, v27, 16, v28 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xff, v151 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v28, v29 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xff, v176 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 8, v161 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v28, v29 -; GFX11-FAKE16-NEXT: v_perm_b32 v28, v179, v163, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xffff, v28 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v28, v11, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v181 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v165 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v29, v29, 16, v30 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xff, v178 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v180 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v30, v31 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v166 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s77 :: v_dual_and_b32 v183, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v11, v31 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v182, v167, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v30, 16, v183 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v40, 0xffff, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v14, v15 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, s78, 16, v8 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, s76 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v31, 16, v40 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, v67, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v13 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v16, v17 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v18 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v69, v52, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v14, 16, v15 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v96, v85, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v16, 16, v17 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v68, v55, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v10, 16, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, v80, v66, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, v82, v64, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v102, v84, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v116, v103, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v20 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v87, v70, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v21 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v112, v100, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v16, 16, v17 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v18, 16, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v71, v54, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v98, v83, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff, v23 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v118, v101, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v86, v81, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v18, 16, v20 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v24, 16, v21 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v21, v25, 16, v23 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff, v26 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xff, v134 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 8, v119 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xff, v130 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 8, v117 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v22, 16, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v113, v97, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v132, v129, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v25, v26 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v27, v28 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xff, v131 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 8, v114 +; GFX11-FAKE16-NEXT: v_perm_b32 v29, v146, v128, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xff, v160 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v147 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v22, v22, 16, v23 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v115, v99, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xffff, v25 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v27, v28 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff, v29 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v29, 0xff, v148 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 8, v144 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v30, v31 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v23, v23, 16, v24 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v24, v26, 16, v25 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v25, v27, 16, v28 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v29, v183 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xffff, v30 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xff, v149 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 8, v133 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xff, v177 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v164 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v183, 0xff, v151 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v40, 8, v135 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v41, 0xff, v176 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v42, 8, v161 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v26, 16, v27 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v28, v29 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v30, v31 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v183, v40 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v41, v42 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v31, 0xff, v181 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 8, v165 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v40, 0xff, v178 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v41, 8, v150 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v42, 0xff, v180 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v43, 8, v166 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v31, v183 +; GFX11-FAKE16-NEXT: v_perm_b32 v183, v162, v145, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v40, v40, v41 +; GFX11-FAKE16-NEXT: v_perm_b32 v41, v179, v163, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v42, v42, v43 +; GFX11-FAKE16-NEXT: v_perm_b32 v43, v182, v167, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v183, 0xffff, v183 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff, v28 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v41, 0xffff, v41 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s76 :: v_dual_and_b32 v43, 0xffff, v43 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, s77 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v27, v27, 16, v183 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v28, v29, 16, v28 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v29, v30, 16, v41 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v40, 16, v31 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v42, 16, v43 ; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB89_3 ; GFX11-FAKE16-NEXT: .LBB89_2: ; %cmp.true @@ -149618,7 +149937,11 @@ define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v30, 16, v34 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v31, 16, v35 ; GFX11-FAKE16-NEXT: .LBB89_3: ; %end -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:320 ; 4-byte Folded Reload +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:320 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:324 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:328 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:332 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-FAKE16-NEXT: .LBB89_4: @@ -149662,8 +149985,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 +; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:4 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 ; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:8 ; SI-NEXT: v_mov_b32_e32 v31, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v30 @@ -149672,42 +149995,46 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_and_b32_e32 v62, 0xffff0000, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v63, 0xffff0000, v2 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v1 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v62 +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v63 ; SI-NEXT: v_and_b32_e32 v61, 0xffff0000, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v2 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v61 -; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v4 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v4 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v3 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v57 -; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v5 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v60 +; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v5 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v4 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v56 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v59 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v5 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v9 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_and_b32_e32 v46, 0xffff0000, v10 @@ -149716,30 +150043,34 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v12 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v24 -; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v24 -; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v13 +; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v23 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v23 +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v13 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v14 +; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v14 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v27 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v27 -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v15 -; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v19 -; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v16 +; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v16 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v18 +; SI-NEXT: v_and_b32_e32 v42, 0xffff0000, v18 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v20 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v22 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v25 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v25 +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v22 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v24 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v26 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: ; kill: killed $vgpr1 ; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v28 ; SI-NEXT: ; kill: killed $vgpr1 ; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: ; kill: killed $vgpr1 @@ -149768,98 +150099,88 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: ; kill: killed $vgpr1 ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: s_waitcnt vmcnt(13) -; SI-NEXT: v_and_b32_e32 v63, 0xffff0000, v33 -; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v36 ; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v39 ; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v39 -; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v36 -; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v7 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v6 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v36 -; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v33 -; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v8 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v57 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v33 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v56 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v8 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v47 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v9 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v46 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v10 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v45 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v11 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v44 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v12 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v24 +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v23 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v13 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v53 +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v43 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v14 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v27 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v19 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v51 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v18 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v20 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v22 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v51 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v26 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v33 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: ; kill: killed $vgpr1 @@ -149910,1600 +150231,1617 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: ; kill: killed $vgpr1 ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: v_mul_f32_e32 v51, 1.0, v63 -; SI-NEXT: v_mul_f32_e32 v63, 1.0, v58 ; SI-NEXT: ; kill: killed $vgpr1 ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr58 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: v_and_b32_e32 v62, 0xffff0000, v34 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: v_mul_f32_e32 v39, 1.0, v62 +; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr8 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v29 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 -; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v28 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v25 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v23 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v21 +; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v28 +; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v27 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v21 ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v17 +; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v19 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v17 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v15 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 +; SI-NEXT: v_and_b32_e32 v58, 0xffff0000, v37 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: ; kill: killed $vgpr1 ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr7 -; SI-NEXT: ; kill: killed $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: v_mul_f32_e32 v27, 1.0, v15 -; SI-NEXT: v_mul_f32_e32 v49, 1.0, v49 -; SI-NEXT: v_mul_f32_e32 v53, 1.0, v17 -; SI-NEXT: v_mul_f32_e32 v43, 1.0, v43 +; SI-NEXT: ; kill: killed $vgpr8 +; SI-NEXT: ; implicit-def: $vgpr8 +; SI-NEXT: ; kill: killed $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: v_mul_f32_e32 v13, 1.0, v49 +; SI-NEXT: v_mul_f32_e32 v49, 1.0, v15 +; SI-NEXT: v_mul_f32_e32 v28, 1.0, v28 +; SI-NEXT: v_mul_f32_e32 v51, 1.0, v17 +; SI-NEXT: v_mul_f32_e32 v44, 1.0, v42 +; SI-NEXT: v_mul_f32_e32 v53, 1.0, v53 +; SI-NEXT: v_mul_f32_e32 v43, 1.0, v19 +; SI-NEXT: v_mul_f32_e32 v16, 1.0, v41 ; SI-NEXT: v_mul_f32_e32 v55, 1.0, v55 -; SI-NEXT: v_mul_f32_e32 v19, 1.0, v42 -; SI-NEXT: v_mul_f32_e32 v9, 1.0, v41 -; SI-NEXT: v_mul_f32_e32 v62, 1.0, v40 -; SI-NEXT: v_mul_f32_e32 v21, 1.0, v21 -; SI-NEXT: v_mul_f32_e32 v56, 1.0, v54 +; SI-NEXT: v_mul_f32_e32 v20, 1.0, v21 +; SI-NEXT: v_mul_f32_e32 v25, 1.0, v25 +; SI-NEXT: v_mul_f32_e32 v23, 1.0, v54 +; SI-NEXT: v_mul_f32_e32 v60, 1.0, v40 ; SI-NEXT: v_mul_f32_e32 v42, 1.0, v52 -; SI-NEXT: v_mul_f32_e32 v41, 1.0, v23 -; SI-NEXT: v_mul_f32_e32 v33, 1.0, v50 -; SI-NEXT: v_mul_f32_e32 v57, 1.0, v48 -; SI-NEXT: v_mul_f32_e32 v36, 1.0, v25 -; SI-NEXT: v_mul_f32_e32 v16, 1.0, v38 -; SI-NEXT: v_mul_f32_e32 v45, 1.0, v37 -; SI-NEXT: v_mul_f32_e32 v61, 1.0, v35 -; SI-NEXT: v_mul_f32_e32 v12, 1.0, v34 -; SI-NEXT: v_mul_f32_e32 v24, 1.0, v28 -; SI-NEXT: v_mul_f32_e32 v44, 1.0, v32 -; SI-NEXT: v_mul_f32_e32 v47, 1.0, v29 -; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 -; SI-NEXT: v_mul_f32_e32 v46, 1.0, v60 -; SI-NEXT: v_mul_f32_e32 v60, 1.0, v59 +; SI-NEXT: v_mul_f32_e32 v61, 1.0, v48 +; SI-NEXT: v_mul_f32_e32 v56, 1.0, v50 +; SI-NEXT: v_mul_f32_e32 v47, 1.0, v38 +; SI-NEXT: v_mul_f32_e32 v57, 1.0, v36 +; SI-NEXT: v_mul_f32_e32 v41, 1.0, v27 +; SI-NEXT: v_mul_f32_e32 v45, 1.0, v35 +; SI-NEXT: v_mul_f32_e32 v59, 1.0, v32 +; SI-NEXT: v_mul_f32_e32 v46, 1.0, v29 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_mul_f32_e32 v63, 1.0, v0 +; SI-NEXT: v_mul_f32_e32 v7, 1.0, v30 +; SI-NEXT: v_mul_f32_e32 v58, 1.0, v58 +; SI-NEXT: v_mul_f32_e32 v10, 1.0, v37 +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v34 ; SI-NEXT: ; kill: killed $vgpr1 ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr7 -; SI-NEXT: ; implicit-def: $vgpr7 -; SI-NEXT: ; kill: killed $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; kill: killed $vgpr8 +; SI-NEXT: ; implicit-def: $vgpr8 +; SI-NEXT: ; kill: killed $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr52 -; SI-NEXT: ; implicit-def: $vgpr29 +; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr26 +; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr23 -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: ; implicit-def: $vgpr18 +; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr17 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr15 -; SI-NEXT: ; implicit-def: $vgpr13 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr11 -; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $vgpr8 -; SI-NEXT: ; implicit-def: $vgpr22 +; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr12 +; SI-NEXT: ; implicit-def: $vgpr29 +; SI-NEXT: ; implicit-def: $vgpr9 +; SI-NEXT: ; implicit-def: $vgpr26 +; SI-NEXT: ; implicit-def: $vgpr6 +; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr5 -; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr4 -; SI-NEXT: ; implicit-def: $vgpr17 +; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr3 -; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr14 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr2 -; SI-NEXT: ; implicit-def: $vgpr10 -; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr11 ; SI-NEXT: ; kill: killed $vgpr1 ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr7 -; SI-NEXT: ; implicit-def: $vgpr7 -; SI-NEXT: ; kill: killed $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mul_f32_e32 v6, 1.0, v0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr8 +; SI-NEXT: ; implicit-def: $vgpr8 +; SI-NEXT: ; kill: killed $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB90_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_alignbit_b32 v38, v0, v1, 16 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v45 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_alignbit_b32 v36, v1, v2, 16 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_alignbit_b32 v35, v0, v1, 16 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v33, v1, v2, 16 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_alignbit_b32 v32, v0, v1, 16 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v30, v1, v2, 16 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_alignbit_b32 v29, v0, v1, 16 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v27, v1, v2, 16 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_alignbit_b32 v26, v0, v1, 16 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v59 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_alignbit_b32 v40, v0, v1, 16 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v22, v1, v2, 16 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_alignbit_b32 v23, v0, v1, 16 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v58 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v19, v1, v2, 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v62 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_alignbit_b32 v54, v0, v1, 16 +; SI-NEXT: v_alignbit_b32 v40, v1, v2, 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_alignbit_b32 v18, v0, v1, 16 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v17, v1, v2, 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v34 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_alignbit_b32 v52, v0, v1, 16 +; SI-NEXT: v_alignbit_b32 v54, v1, v2, 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v13 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v15, v1, v49, 16 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v13 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_alignbit_b32 v52, v1, v2, 16 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v28 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v12, v1, v51, 16 +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v28 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_alignbit_b32 v15, v0, v27, 16 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v27 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: v_alignbit_b32 v50, v0, v1, 16 +; SI-NEXT: v_alignbit_b32 v50, v1, v2, 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v13, v0, v53, 16 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v53 +; SI-NEXT: v_alignbit_b32 v9, v1, v43, 16 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v49 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr53 +; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49 +; SI-NEXT: v_alignbit_b32 v48, v1, v2, 16 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v55 +; SI-NEXT: v_alignbit_b32 v6, v1, v20, 16 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr55 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_alignbit_b32 v48, v0, v1, 16 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_alignbit_b32 v38, v1, v2, 16 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v23 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v5, v1, v60, 16 +; SI-NEXT: ; implicit-def: $vgpr60 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v23 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_alignbit_b32 v35, v1, v2, 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55 -; SI-NEXT: v_alignbit_b32 v11, v0, v19, 16 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v61 +; SI-NEXT: v_alignbit_b32 v4, v1, v56, 16 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v51 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v6 -; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v6 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v32, v1, v2, 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v51 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v57 +; SI-NEXT: v_alignbit_b32 v3, v1, v41, 16 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v44 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr57 +; SI-NEXT: ; implicit-def: $vgpr41 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_alignbit_b32 v29, v1, v2, 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v40, v38, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v59 +; SI-NEXT: v_alignbit_b32 v2, v1, v46, 16 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v26, v1, v8, 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v40, v38, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v58 +; SI-NEXT: v_alignbit_b32 v1, v1, v10, 16 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v25 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr58 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_alignbit_b32 v24, v8, v10, 16 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v40, v38, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v42 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_alignbit_b32 v21, v8, v10, 16 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v54, v35, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v47 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_alignbit_b32 v18, v8, v10, 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v54, v35, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr10 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_alignbit_b32 v14, v37, v8, 16 +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v63 +; SI-NEXT: v_alignbit_b32 v11, v8, v7, 16 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v54, v35, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v8, v7, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v62 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v52, v32, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v34 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v52, v32, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v13 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v52, v32, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v28 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v50, v29, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v49 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v50, v29, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v51 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v50, v29, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v44 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v48, v26, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v48, v26, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v25 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v48, v26, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_alignbit_b32 v37, v0, v1, 16 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62 -; SI-NEXT: v_alignbit_b32 v8, v0, v21, 16 +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v42 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v37, v23, 24 -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v47 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v37, v23, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v45 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v37, v23, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v21, 24, v59 -; SI-NEXT: v_mov_b32_e32 v59, v19 -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_alignbit_b32 v34, v0, v1, 16 -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42 -; SI-NEXT: v_alignbit_b32 v5, v0, v41, 16 -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v6, v34, v18, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v63 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v34, v18, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v39 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v34, v18, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) -; SI-NEXT: v_alignbit_b32 v0, v0, v1, 16 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v57 -; SI-NEXT: v_alignbit_b32 v4, v1, v36, 16 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v43 -; SI-NEXT: v_alignbit_b32 v28, v1, v2, 16 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v40, v36, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v45 -; SI-NEXT: v_alignbit_b32 v3, v1, v61, 16 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v9 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: v_alignbit_b32 v6, v0, v15, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v40, v36, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v0, v15, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v40, v36, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v0, v15, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v54, v33, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v28, v13, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v54, v33, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v28, v13, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v54, v33, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v28, v13, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v9 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v52, v30, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v56 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v52, v30, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v33 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v52, v30, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v16 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v50, v27, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v12 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr9 -; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr45 -; SI-NEXT: ; implicit-def: $vgpr61 -; SI-NEXT: s_waitcnt vmcnt(13) -; SI-NEXT: v_alignbit_b32 v25, v1, v2, 16 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v44 -; SI-NEXT: v_alignbit_b32 v2, v1, v47, 16 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v56 -; SI-NEXT: v_alignbit_b32 v22, v1, v7, 16 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v33 -; SI-NEXT: v_alignbit_b32 v20, v7, v10, 16 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v6, v25, v11, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v50, v27, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v25, v11, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v50, v27, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v25, v11, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v48, v22, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v22, v8, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v48, v22, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v22, v8, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v48, v22, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v22, v8, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v38, v19, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v20, v5, 24 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v38, v19, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v38, v19, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v20, v5, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v35, v17, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v20, v5, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v35, v17, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v46 -; SI-NEXT: v_alignbit_b32 v1, v1, v60, 16 -; SI-NEXT: ; implicit-def: $vgpr56 -; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: ; implicit-def: $vgpr47 -; SI-NEXT: ; implicit-def: $vgpr46 -; SI-NEXT: ; implicit-def: $vgpr60 -; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_alignbit_b32 v17, v7, v10, 16 -; SI-NEXT: v_alignbit_b32 v6, v17, v4, 24 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v12 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v35, v17, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v17, v4, 16 -; SI-NEXT: v_alignbit_b32 v14, v7, v24, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v32, v15, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v17, v4, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v32, v15, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v14, v3, 16 -; SI-NEXT: v_alignbit_b32 v10, v19, v30, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v32, v15, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v14, v3, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v29, v12, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v10, v2, 24 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v29, v12, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v51 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v29, v12, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v10, v2, 16 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v26, v9, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v7, v7, v63, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v26, v9, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v10, v2, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v26, v9, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v7, v1, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v24, v6, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v7, v1, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v24, v6, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v24, v6, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v21, v5, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v21, v5, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v21, v5, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v18, v4, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v18, v4, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v40 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v18, v4, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v54 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v14, v3, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v52 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v14, v3, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v50 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v14, v3, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v48 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v11, v2, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v37 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v11, v2, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v34 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v11, v2, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v0 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v8, v1, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v28 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v8, v1, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v25 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v8, v1, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v22 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v40 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v20 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v54 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v17 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v52 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v14 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v50 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v10 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v48 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v7 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v58 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v38 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v39 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v35 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v27 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v32 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v49 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v29 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v53 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v26 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v55 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v41 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v21 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v43 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: v_alignbit_b32 v39, v14, v3, 24 -; SI-NEXT: v_alignbit_b32 v58, v7, v1, 8 -; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v18 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v14 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v11 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v20 +; SI-NEXT: v_lshrrev_b32_e32 v62, 24, v23 +; SI-NEXT: ; implicit-def: $vgpr13 ; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr55 -; SI-NEXT: ; implicit-def: $vgpr19 -; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr12 -; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr30 +; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: ; implicit-def: $vgpr44 +; SI-NEXT: ; implicit-def: $vgpr16 +; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: ; implicit-def: $vgpr25 +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: ; implicit-def: $vgpr45 +; SI-NEXT: ; kill: killed $vgpr0 ; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr0 ; SI-NEXT: .LBB90_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB90_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v46 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v60 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v44 -; SI-NEXT: v_alignbit_b32 v1, v1, v0, 16 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v47 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v58 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v10 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v45 -; SI-NEXT: v_alignbit_b32 v2, v2, v0, 16 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v61 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v59 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v46 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v57 -; SI-NEXT: v_alignbit_b32 v3, v3, v0, 16 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v36 +; SI-NEXT: v_alignbit_b32 v2, v3, v2, 16 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v41 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v51 -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v42 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v5 -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v41 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; SI-NEXT: v_alignbit_b32 v4, v4, v0, 16 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v63 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v61 +; SI-NEXT: v_alignbit_b32 v3, v4, v3, 16 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v56 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_alignbit_b32 v5, v7, v5, 16 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v36 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v62 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v7, v7, v0, 16 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v30 +; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v23 +; SI-NEXT: v_alignbit_b32 v4, v5, v4, 16 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v60 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 -; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v21 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v12 -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v55 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_alignbit_b32 v5, v6, v5, 16 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v39 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v55 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v20 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v6 -; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v19 -; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; SI-NEXT: v_alignbit_b32 v8, v10, v8, 16 -; SI-NEXT: v_alignbit_b32 v10, v59, v0, 16 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v24 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_alignbit_b32 v6, v8, v6, 16 +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v10 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v53 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v8, v8, v0, 16 +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v63 +; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v43 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_alignbit_b32 v11, v13, v11, 16 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12 -; SI-NEXT: v_alignbit_b32 v14, v13, v0, 16 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v9, v11, v9, 16 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v7 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v16 +; SI-NEXT: v_alignbit_b32 v11, v11, v0, 16 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v45 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v28 +; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v12 +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v51 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v20 +; SI-NEXT: v_alignbit_b32 v12, v14, v12, 16 +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v47 +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 +; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v15 ; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v49 -; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v53 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_alignbit_b32 v13, v15, v13, 16 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v16 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 -; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 -; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v6 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v36 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: v_alignbit_b32 v58, v7, v1, 8 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_alignbit_b32 v15, v13, v15, 16 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v28 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_alignbit_b32 v17, v15, v0, 16 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v33 -; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v27 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 -; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 -; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; SI-NEXT: v_alignbit_b32 v15, v18, v15, 16 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v21 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_alignbit_b32 v14, v45, v0, 16 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 ; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 -; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23 -; SI-NEXT: s_waitcnt vmcnt(13) -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 -; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26 -; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 +; SI-NEXT: v_alignbit_b32 v17, v19, v17, 16 +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22 +; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22 +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 -; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 ; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30 -; SI-NEXT: v_alignbit_b32 v29, v30, v29, 16 +; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_alignbit_b32 v27, v29, v27, 16 ; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v34 -; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32 -; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v34 -; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v34 -; SI-NEXT: v_alignbit_b32 v32, v34, v32, 16 +; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33 +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 +; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 +; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_alignbit_b32 v30, v33, v30, 16 ; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38 -; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v35 -; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v38 -; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v38 -; SI-NEXT: v_alignbit_b32 v35, v38, v35, 16 +; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v36 +; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v36 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v36 ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49 +; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v39 ; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v50 +; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v48 ; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v52 +; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v50 ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v54 +; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v52 ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v54 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v40 -; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49 +; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v39 +; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v48 ; SI-NEXT: v_add_f32_e32 v51, 0x40c00000, v50 ; SI-NEXT: v_add_f32_e32 v53, 0x40c00000, v52 ; SI-NEXT: v_add_f32_e32 v55, 0x40c00000, v54 ; SI-NEXT: v_add_f32_e32 v41, 0x40c00000, v40 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v49 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v39 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v49 ; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v51 ; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v53 ; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v55 ; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v41 -; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_alignbit_b32 v20, v18, v0, 16 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v56 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v18, v13, v0, 16 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v42 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v13 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 -; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 -; SI-NEXT: v_alignbit_b32 v18, v19, v18, 16 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v27 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: v_alignbit_b32 v22, v19, v0, 16 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v21, v19, v0, 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v25 +; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v19 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 ; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_alignbit_b32 v23, v23, v19, 16 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v9 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: v_alignbit_b32 v25, v19, v0, 16 +; SI-NEXT: v_alignbit_b32 v19, v22, v19, 16 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v23 +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v24, v22, v0, 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v43 -; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v9 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v27 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v21 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v16 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v12 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 +; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 +; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_alignbit_b32 v26, v26, v19, 16 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v24 -; SI-NEXT: v_alignbit_b32 v28, v19, v0, 16 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v22, v25, v22, 16 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v16 +; SI-NEXT: v_alignbit_b32 v26, v25, v0, 16 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v44 +; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v25 +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v29, v29, v0, 16 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 -; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v19 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: v_alignbit_b32 v0, v30, v0, 16 +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v0 +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v32, v33, v32, 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v19 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v0 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v24 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 -; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 -; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v30 -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v25 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v34, v34, v33, 16 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v30 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v23 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v13 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v28 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v20 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v7 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v10 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33 -; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v33 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v33 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33 -; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v33 -; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: v_alignbit_b32 v37, v38, v37, 16 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v33 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38 -; SI-NEXT: v_add_f32_e32 v48, 0x40c00000, v38 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v33 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v62, 24, v34 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38 -; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v38 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33 +; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 +; SI-NEXT: v_alignbit_b32 v33, v36, v33, 16 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v34 +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v35, v36, v35, 16 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v36 +; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v36 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v36 +; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v36 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v36 +; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v36 +; SI-NEXT: v_alignbit_b32 v36, v39, v36, 16 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v37 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v38, v39, v38, 16 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v39 +; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v39 +; SI-NEXT: v_alignbit_b32 v48, v48, v39, 16 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v39 +; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v39 +; SI-NEXT: v_alignbit_b32 v50, v50, v39, 16 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v39 +; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v39 +; SI-NEXT: v_alignbit_b32 v52, v52, v39, 16 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v39 +; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v39 +; SI-NEXT: v_alignbit_b32 v54, v54, v39, 16 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38 -; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v38 -; SI-NEXT: v_alignbit_b32 v38, v49, v38, 16 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v39 -; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: v_alignbit_b32 v48, v49, v48, 16 +; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v39 +; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v39 +; SI-NEXT: v_alignbit_b32 v40, v40, v39, 16 +; SI-NEXT: v_alignbit_b32 v0, v40, v36, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v39 -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v40, v36, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v39, v14, v3, 24 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49 -; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49 -; SI-NEXT: v_alignbit_b32 v50, v50, v49, 16 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49 -; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49 -; SI-NEXT: v_alignbit_b32 v52, v52, v49, 16 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49 -; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49 -; SI-NEXT: v_alignbit_b32 v54, v54, v49, 16 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49 -; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49 -; SI-NEXT: v_alignbit_b32 v40, v40, v49, 16 -; SI-NEXT: v_alignbit_b32 v6, v40, v38, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v40, v36, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v40, v38, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v54, v33, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v40, v38, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v54, v33, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v54, v35, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v54, v33, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v54, v35, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v52, v30, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v54, v35, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v52, v30, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v52, v32, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v52, v30, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v52, v32, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v50, v27, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v52, v32, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v50, v27, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v50, v29, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v50, v27, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v50, v29, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v48, v22, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v50, v29, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v48, v22, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v48, v26, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v48, v22, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v48, v26, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v38, v19, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v48, v26, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v38, v19, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v37, v23, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v38, v19, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v37, v23, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v35, v17, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v37, v23, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v35, v17, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v35, v17, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v32, v15, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v34, v18, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v32, v15, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v34, v18, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v32, v15, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v34, v18, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v29, v12, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v0, v15, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v29, v12, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v0, v15, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v29, v12, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v0, v15, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v26, v9, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v28, v13, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v26, v9, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v28, v13, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v26, v9, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v28, v13, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v24, v6, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v25, v11, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v24, v6, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v25, v11, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v24, v6, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v25, v11, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v21, v5, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v22, v8, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v21, v5, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v22, v8, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v21, v5, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v22, v8, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v18, v4, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v20, v5, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v18, v4, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v20, v5, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v18, v4, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v20, v5, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v14, v3, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v17, v4, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v14, v3, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v17, v4, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v14, v3, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v17, v4, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v11, v2, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v14, v3, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v11, v2, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v14, v3, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v11, v2, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v10, v2, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v8, v1, 24 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v10, v2, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v8, v1, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v10, v2, 8 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v8, v1, 8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v7, v1, 24 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v40 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v6, v7, v1, 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v54 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v40 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v52 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v54 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v50 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v52 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v48 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v50 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v38 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v48 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v35 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v37 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v32 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v34 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v29 +; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v41 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v0 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v26 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v28 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v55 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v25 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v24 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v22 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v53 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v20 -; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v41 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v21 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v17 -; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v51 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v55 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v18 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v14 -; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v49 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v53 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v14 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v10 -; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v37 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v51 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v11 +; SI-NEXT: v_mov_b32_e32 v37, v45 +; SI-NEXT: v_mov_b32_e32 v34, v39 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v7 -; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v8 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: .LBB90_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v38 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v36 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v40 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v40 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 4, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v35 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 4, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v33 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 8, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 8, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v54 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v54 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 12, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 12, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v32 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v30 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 16, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 16, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v52 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v52 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 20, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v29 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 20, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v27 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 24, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 24, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v50 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v50 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 28, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 28, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v26 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v22 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 32, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 32, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v48 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v48 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 36, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v23 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 36, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v19 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 40, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 40, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v37 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v38 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v34 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 44, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v18 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 48, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 44, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v34 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v17 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 52, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 48, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v15 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v35 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v62 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 52, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v15 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v12, v9 -; SI-NEXT: v_or_b32_e32 v6, v6, v9 -; SI-NEXT: v_add_i32_e32 v9, vcc, 56, v31 -; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 56, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v32 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6 -; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v9, v6 -; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: v_add_i32_e32 v6, vcc, 60, v31 -; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v13 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6 -; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 60, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xff, v12 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v9, v6 -; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: v_add_i32_e32 v6, vcc, 64, v31 -; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 64, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v28 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v29 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6 -; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v9, v6 -; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: v_add_i32_e32 v6, vcc, 0x44, v31 -; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 0x44, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v11 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v9 ; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6 -; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v9 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v9, v6 -; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: v_add_i32_e32 v6, vcc, 0x48, v31 -; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 0x48, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v25 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v26 +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6 -; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v9 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v9, v6 -; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: v_add_i32_e32 v6, vcc, 0x4c, v31 -; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: v_add_i32_e32 v7, vcc, 0x4c, v31 +; SI-NEXT: buffer_store_dword v0, v7, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6 ; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v8 +; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 ; SI-NEXT: v_or_b32_e32 v0, v0, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, 0x50, v31 ; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v22 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v24 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6 ; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v8 +; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 ; SI-NEXT: v_or_b32_e32 v0, v0, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, 0x54, v31 ; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5 ; SI-NEXT: v_or_b32_e32 v0, v0, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6 @@ -151514,14 +151852,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v0, v0, v5 ; SI-NEXT: v_add_i32_e32 v5, vcc, 0x58, v31 ; SI-NEXT: buffer_store_dword v0, v5, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v20 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v21 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5 ; SI-NEXT: v_or_b32_e32 v0, v0, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6 @@ -151534,12 +151872,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v0, v5, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; SI-NEXT: v_or_b32_e32 v0, v0, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5 @@ -151550,14 +151888,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v0, v0, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, 0x60, v31 ; SI-NEXT: buffer_store_dword v0, v4, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v17 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v18 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; SI-NEXT: v_or_b32_e32 v0, v0, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5 @@ -151570,12 +151908,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v0, v4, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v39 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3 ; SI-NEXT: v_or_b32_e32 v0, v0, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 @@ -151584,32 +151924,30 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v0, v0, v3 ; SI-NEXT: v_add_i32_e32 v3, vcc, 0x68, v31 ; SI-NEXT: buffer_store_dword v0, v3, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v14 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3 ; SI-NEXT: v_or_b32_e32 v0, v0, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v3, 0xff, v37 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: v_or_b32_e32 v0, v0, v3 ; SI-NEXT: v_add_i32_e32 v3, vcc, 0x6c, v31 ; SI-NEXT: buffer_store_dword v0, v3, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v0, v0, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 @@ -151621,45 +151959,49 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v31 ; SI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v10 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v11 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v0, v0, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v59 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 ; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v31 ; SI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v58 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x78, v31 ; SI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v7 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xff, v8 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 @@ -151711,58 +152053,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; kill: killed $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; kill: killed $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; kill: killed $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; kill: killed $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; kill: killed $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; kill: killed $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; kill: killed $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; kill: killed $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; kill: killed $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr40 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr35 -; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr49 -; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; implicit-def: $vgpr36 -; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr43 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: ; implicit-def: $vgpr44 -; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr51 -; VI-NEXT: ; implicit-def: $vgpr47 -; VI-NEXT: ; implicit-def: $vgpr63 -; VI-NEXT: ; implicit-def: $vgpr60 -; VI-NEXT: ; implicit-def: $vgpr41 -; VI-NEXT: ; implicit-def: $vgpr50 -; VI-NEXT: ; implicit-def: $vgpr59 -; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; implicit-def: $vgpr38 -; VI-NEXT: ; implicit-def: $vgpr42 -; VI-NEXT: ; implicit-def: $vgpr52 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; kill: killed $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 @@ -151774,7 +152072,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; kill: killed $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 @@ -151786,7 +152085,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; kill: killed $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 @@ -151796,7 +152096,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; kill: killed $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 @@ -151808,7 +152109,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; kill: killed $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 @@ -151820,7 +152122,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; kill: killed $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 @@ -151832,6 +152135,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 @@ -151842,246 +152148,272 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; kill: killed $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: ; kill: killed $vgpr33 +; VI-NEXT: ; implicit-def: $vgpr47 +; VI-NEXT: ; implicit-def: $vgpr63 +; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr45 +; VI-NEXT: ; implicit-def: $vgpr50 +; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr62 +; VI-NEXT: ; implicit-def: $vgpr44 ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr45 -; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr61 +; VI-NEXT: ; implicit-def: $vgpr43 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr60 +; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr59 +; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr58 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr54 +; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr53 +; VI-NEXT: ; implicit-def: $vgpr56 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr35 +; VI-NEXT: ; kill: killed $vgpr35 +; VI-NEXT: ; implicit-def: $vgpr35 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; kill: killed $vgpr35 +; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB90_2 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[15:16] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[13:14] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[11:12] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[9:10] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[7:8] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v9 +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8 +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[5:6] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8 +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7 +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[3:4] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[1:2] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v5 +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[31:32] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v4 +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3 +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[29:30] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2 +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[27:28] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v2 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1 +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[25:26] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[23:24] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[21:22] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[19:20] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[17:18] +; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v1 +; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] -; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v28 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, v53 -; VI-NEXT: v_mov_b32_e32 v53, v40 -; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[17:18] -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v29 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v30 -; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v29 -; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v28 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v28 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v27 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v27 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v17 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v17 -; VI-NEXT: v_mov_b32_e32 v38, v45 -; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v1 -; VI-NEXT: v_mov_b32_e32 v39, v46 +; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v26 +; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v26 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v25 +; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v24 +; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v24 +; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v23 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v23 +; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v22 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v21 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v21 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v20 +; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v19 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v18 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v18 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v18 +; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v17 ; VI-NEXT: .LBB90_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB90_4 @@ -152665,265 +152997,284 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_alignbit_b32 v15, v15, v33, 16 ; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30] +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26] +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18] +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v9 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v5 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v4 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v2 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1 +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 +; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[17:18] ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 +; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v1 +; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v32 ; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 -; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v30 -; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v29 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v29 -; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v28 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v28 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v28 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v27 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v27 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v17 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v17 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v26 +; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v26 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v25 +; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v24 +; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v24 +; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v23 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v23 +; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v22 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v21 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v21 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v20 +; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v20 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v19 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v18 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v18 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v18 +; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v17 ; VI-NEXT: .LBB90_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] -; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v1, v1, v40, s4 -; VI-NEXT: v_perm_b32 v2, v2, v35, s4 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v45, v39, v45, s4 -; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v45 -; VI-NEXT: v_or_b32_e32 v1, v1, v33 +; VI-NEXT: v_perm_b32 v1, v1, v51, s4 +; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v51, v52, v51, s4 +; VI-NEXT: v_lshlrev_b32_e32 v51, 16, v51 +; VI-NEXT: v_or_b32_e32 v1, v1, v51 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v53, v49, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v2, v1, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v51, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v62, s4 -; VI-NEXT: v_perm_b32 v1, v36, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v51, s4 +; VI-NEXT: v_perm_b32 v1, v3, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v43, v37, s4 -; VI-NEXT: v_perm_b32 v1, v4, v61, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v4, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v5, v55, s4 -; VI-NEXT: v_perm_b32 v1, v48, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v5, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v6, v1, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v2, v34, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v7, v54, s4 -; VI-NEXT: v_perm_b32 v1, v44, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v7, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v51, v47, s4 -; VI-NEXT: v_perm_b32 v1, v8, v56, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v8, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: v_perm_b32 v2, v9, v63, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v9, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -152932,21 +153283,20 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v11, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v11, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -152955,44 +153305,42 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v13, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v13, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v14, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v15, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v15, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -153001,155 +153349,126 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v17, v60, s4 -; VI-NEXT: v_perm_b32 v1, v41, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v63, v46, s4 +; VI-NEXT: v_perm_b32 v1, v17, v47, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v18, v1, s4 +; VI-NEXT: v_perm_b32 v2, v50, v49, s4 +; VI-NEXT: v_perm_b32 v1, v18, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v19, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v19, v62, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v44, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v20, v1, s4 +; VI-NEXT: v_perm_b32 v2, v61, v43, s4 +; VI-NEXT: v_perm_b32 v1, v20, v33, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v21, v42, s4 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v21, v1, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_perm_b32 v2, v48, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v22, v1, s4 +; VI-NEXT: v_perm_b32 v2, v41, v59, s4 +; VI-NEXT: v_perm_b32 v1, v22, v60, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v23, v38, s4 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v23, v1, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_perm_b32 v2, v40, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v24, v1, s4 +; VI-NEXT: v_perm_b32 v2, v58, v57, s4 +; VI-NEXT: v_perm_b32 v1, v24, v39, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v25, v37, s4 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v25, v1, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_perm_b32 v2, v55, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v26, v1, s4 +; VI-NEXT: v_perm_b32 v2, v36, v53, s4 +; VI-NEXT: v_perm_b32 v1, v26, v54, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v27, v50, s4 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v59, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v27, v56, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v34, v57, s4 -; VI-NEXT: v_perm_b32 v1, v28, v58, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v28, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v29, v38, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v42, v2, s4 +; VI-NEXT: v_perm_b32 v1, v29, v1, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v30, v52, s4 -; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v30, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v1, v31, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -153158,14 +153477,13 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 -; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v32, v1, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v35, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen @@ -153207,1551 +153525,1360 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 +; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:4 ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8 -; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: v_mov_b32_e32 v45, v0 +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 +; GFX9-NEXT: v_mov_b32_e32 v39, v0 ; GFX9-NEXT: ; implicit-def: $vgpr0 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; kill: killed $vgpr0 ; GFX9-NEXT: ; implicit-def: $vgpr0 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; kill: killed $vgpr0 ; GFX9-NEXT: ; implicit-def: $vgpr0 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: v_mov_b32_e32 v56, v15 ; GFX9-NEXT: ; kill: killed $vgpr0 ; GFX9-NEXT: ; implicit-def: $vgpr0 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr15 -; GFX9-NEXT: ; kill: killed $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; kill: killed $vgpr0 ; GFX9-NEXT: ; implicit-def: $vgpr0 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr15 -; GFX9-NEXT: ; implicit-def: $vgpr15 -; GFX9-NEXT: ; kill: killed $vgpr43 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: v_mov_b32_e32 v57, v16 ; GFX9-NEXT: ; kill: killed $vgpr0 ; GFX9-NEXT: ; implicit-def: $vgpr0 -; GFX9-NEXT: ; implicit-def: $vgpr16 -; GFX9-NEXT: ; implicit-def: $vgpr44 -; GFX9-NEXT: ; kill: killed $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr15 -; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: v_mov_b32_e32 v3, v1 +; GFX9-NEXT: ; implicit-def: $vgpr1 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: v_mov_b32_e32 v4, v2 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 ; GFX9-NEXT: ; implicit-def: $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr43 -; GFX9-NEXT: ; kill: killed $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr15 -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: ; implicit-def: $vgpr40 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr2 ; GFX9-NEXT: ; kill: killed $vgpr0 ; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; kill: killed $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr2 ; GFX9-NEXT: ; implicit-def: $vgpr49 -; GFX9-NEXT: ; implicit-def: $vgpr53 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr42 -; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr41 -; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; kill: killed $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr40 ; GFX9-NEXT: ; implicit-def: $vgpr34 ; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr55 +; GFX9-NEXT: ; implicit-def: $vgpr63 +; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr60 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr61 +; GFX9-NEXT: ; implicit-def: $vgpr43 +; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; kill: killed $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr44 +; GFX9-NEXT: ; implicit-def: $vgpr0 +; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr57 +; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; kill: killed $vgpr36 -; GFX9-NEXT: ; kill: killed $vgpr43 -; GFX9-NEXT: ; kill: killed $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr50 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr15 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr15 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr15 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr15 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr15 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr15 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr15 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(29) +; GFX9-NEXT: ; kill: killed $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; kill: killed $vgpr2 +; GFX9-NEXT: s_waitcnt vmcnt(9) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 ; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; kill: killed $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; kill: killed $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; kill: killed $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; kill: killed $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr31 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB90_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[56:57] -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v57 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v57 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[7:8] -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[5:6] -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v57 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[3:4] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4 -; GFX9-NEXT: s_waitcnt vmcnt(45) -; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[60:61] -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v56 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v3 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v56 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v19 -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v26 +; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v25 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v8 +; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v24 +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v3 +; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v23 +; GFX9-NEXT: v_mov_b32_e32 v38, v48 +; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v22 +; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v21 +; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v20 +; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v19 +; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v18 +; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v17 +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[19:20] +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v25 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v24 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v24 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v23 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v22 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v22 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v21 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v18 +; GFX9-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[17:18] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v17 +; GFX9-NEXT: s_waitcnt vmcnt(12) +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v36 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v36 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v35 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v10 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v1 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v17 -; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[29:30] -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v61 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v59, v36 -; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28] -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v14 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v61 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v13 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v61 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v13 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v60 -; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[25:26] -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v60 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v30 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v12 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v30 -; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[23:24] -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v30 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v11 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v29 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v10 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v10 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v29 -; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[21:22] -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v10 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v28 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v8 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v28 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v24 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v9 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v8 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v23 -; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[19:20] -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v8 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v27 -; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v22 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v7 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v2 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26 -; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v21 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v6 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v25 -; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v20 -; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[17:18] -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v6 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v24 -; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v6 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v27 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v23 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v22 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v22 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v18 -; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v17 -; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[1:2] -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(39) +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v1 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v3 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v16 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v16 +; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[35:36] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v16 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v15 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v15 +; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[13:14] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v30 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v30 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[1:2] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v30 +; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12] +; GFX9-NEXT: v_mov_b32_e32 v1, v50 +; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[3:4] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29 +; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v29 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[29:30] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v28 +; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[9:10] +; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[27:28] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28 +; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27 +; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v27 +; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[55:56], 24, v[21:22] ; GFX9-NEXT: .LBB90_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB90_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true ; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v18 ; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 -; GFX9-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 ; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1 ; GFX9-NEXT: s_movk_i32 s6, 0x7fff -; GFX9-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; GFX9-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 ; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6 ; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v31 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; GFX9-NEXT: v_bfe_u32 v31, v18, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v15, v32, v33, vcc -; GFX9-NEXT: v_add3_u32 v31, v31, v18, s6 -; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v17 ; GFX9-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v32, v33, vcc +; GFX9-NEXT: v_bfe_u32 v32, v18, 16, 1 +; GFX9-NEXT: v_add3_u32 v32, v32, v18, s6 +; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v18 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v32, v33, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v32, 16, v17 +; GFX9-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 ; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v31, v32, vcc -; GFX9-NEXT: v_bfe_u32 v31, v18, 16, 1 +; GFX9-NEXT: v_bfe_u32 v33, v32, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: s_mov_b32 s7, 0x7060302 -; GFX9-NEXT: v_add3_u32 v31, v31, v18, s6 -; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 +; GFX9-NEXT: v_add3_u32 v33, v33, v32, s6 +; GFX9-NEXT: v_or_b32_e32 v34, 0x400000, v32 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v32, v32 +; GFX9-NEXT: v_bfe_u32 v32, v17, 16, 1 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v16, v0, v15, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v31, v32, vcc -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v17 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v33, v34, vcc +; GFX9-NEXT: v_add3_u32 v32, v32, v17, s6 +; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v17 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 ; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v20 ; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v31, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v17 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v32, v33, vcc +; GFX9-NEXT: v_bfe_u32 v32, v17, 16, 1 +; GFX9-NEXT: v_add3_u32 v32, v32, v17, s6 +; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v17 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 ; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v20 ; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v62, v18, v31, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v17 +; GFX9-NEXT: v_bfe_u32 v20, v17, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v32, v32, v33, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v17, s6 +; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v17 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 ; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v19 ; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v20, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v19 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v20, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v22 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v16, v0, v62, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v22 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v43, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v21 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v15, v0, v15, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v21 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v44, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v24 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v16, v0, v43, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v24 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v15, v0, v44, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v23 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v23 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v26 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v26 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v25 -; GFX9-NEXT: v_mov_b32_e32 v51, v16 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_mov_b32_e32 v50, v15 -; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v25 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v28 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v28 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v27 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v27 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v16, v15, v0, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v30 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v30 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v42, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v29 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v54, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v29 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v39, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v61 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v55, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v61 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v15, v15, v0, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_waitcnt vmcnt(57) -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v60 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v53, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_and_b32_e32 v17, 0xffff0000, v60 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v30, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v52, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; GFX9-NEXT: v_add3_u32 v18, v18, v17, s6 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 +; GFX9-NEXT: v_cndmask_b32_e32 v20, v20, v33, vcc +; GFX9-NEXT: v_bfe_u32 v33, v17, 16, 1 +; GFX9-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 +; GFX9-NEXT: v_add3_u32 v33, v33, v17, s6 +; GFX9-NEXT: v_or_b32_e32 v34, 0x400000, v17 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v29, v18, v19, vcc -; GFX9-NEXT: v_add3_u32 v17, v17, v2, s6 -; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v1 +; GFX9-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 +; GFX9-NEXT: v_cndmask_b32_e32 v31, v33, v34, vcc +; GFX9-NEXT: v_bfe_u32 v33, v19, 16, 1 +; GFX9-NEXT: v_add3_u32 v33, v33, v19, s6 +; GFX9-NEXT: v_or_b32_e32 v34, 0x400000, v19 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 +; GFX9-NEXT: v_cndmask_b32_e32 v19, v33, v34, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v33, 16, v22 +; GFX9-NEXT: v_add_f32_e32 v33, 0x40c00000, v33 +; GFX9-NEXT: v_bfe_u32 v34, v33, 16, 1 +; GFX9-NEXT: v_and_b32_e32 v22, 0xffff0000, v22 +; GFX9-NEXT: v_add3_u32 v34, v34, v33, s6 +; GFX9-NEXT: v_or_b32_e32 v35, 0x400000, v33 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v33, v33 +; GFX9-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 +; GFX9-NEXT: v_cndmask_b32_e32 v33, v34, v35, vcc +; GFX9-NEXT: v_bfe_u32 v34, v22, 16, 1 +; GFX9-NEXT: v_add3_u32 v34, v34, v22, s6 +; GFX9-NEXT: v_or_b32_e32 v35, 0x400000, v22 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v22, v22 +; GFX9-NEXT: v_cndmask_b32_e32 v22, v34, v35, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v34, 16, v21 +; GFX9-NEXT: v_add_f32_e32 v34, 0x40c00000, v34 +; GFX9-NEXT: v_bfe_u32 v35, v34, 16, 1 +; GFX9-NEXT: v_and_b32_e32 v21, 0xffff0000, v21 +; GFX9-NEXT: v_add3_u32 v35, v35, v34, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v34 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v34, v34 +; GFX9-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 +; GFX9-NEXT: v_cndmask_b32_e32 v34, v35, v36, vcc +; GFX9-NEXT: v_bfe_u32 v35, v21, 16, 1 +; GFX9-NEXT: v_add3_u32 v35, v35, v21, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v21 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 +; GFX9-NEXT: v_cndmask_b32_e32 v21, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v24 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v24, 0xffff0000, v24 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v24, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v60, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v24, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v24 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v24, v24 +; GFX9-NEXT: v_cndmask_b32_e32 v24, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v23 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v23, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v62, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v23, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v23 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 +; GFX9-NEXT: v_cndmask_b32_e32 v23, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v26 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v26, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v58, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v26, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v26 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v26, v26 +; GFX9-NEXT: v_cndmask_b32_e32 v26, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v25 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v25, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v61, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v25, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v25 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 +; GFX9-NEXT: v_cndmask_b32_e32 v25, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v28 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v28, 0xffff0000, v28 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v28, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v56, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v28, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v28 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v28, v28 +; GFX9-NEXT: v_cndmask_b32_e32 v28, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v27 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v27, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v59, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v27, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v27 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 +; GFX9-NEXT: v_cndmask_b32_e32 v27, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v30 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v30, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v46, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v30, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v30 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v30, v30 +; GFX9-NEXT: v_cndmask_b32_e32 v30, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v29 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v29, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v57, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v29, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v29 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 +; GFX9-NEXT: v_cndmask_b32_e32 v29, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v16 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v16, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v44, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v16, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v16 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v18, v35, v36, vcc +; GFX9-NEXT: s_waitcnt vmcnt(11) +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v15 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v15, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v47, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v15, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v15 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 +; GFX9-NEXT: v_cndmask_b32_e32 v17, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v2, 0xffff0000, v4 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v27, v17, v18, vcc -; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_add3_u32 v17, v17, v2, s6 -; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v2, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v42, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v2, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v2 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v28, v17, v18, vcc -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v4 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v26, v2, v17, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v4 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v25, v2, v17, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v3 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v23, v2, v4, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v16, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v3 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 ; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v3 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v24, v2, v4, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v6 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v22, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v6 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v21, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v5 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v19, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v5 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v20, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v8 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v8 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v7 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v10 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v10 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v9 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v10, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v9 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v12 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v9, v2, v9, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v12 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_bfe_u32 v12, v1, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v2, v31, vcc -; GFX9-NEXT: v_add3_u32 v12, v12, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v1 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v1, 16, 1 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v45, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v1, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v11 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v12, v12, v31, vcc -; GFX9-NEXT: v_bfe_u32 v31, v1, 16, 1 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; GFX9-NEXT: v_cndmask_b32_e32 v15, v35, v36, vcc +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v0 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v1 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff0000, v1 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v4, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v40, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v4, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v3, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v43, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v3, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v3, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v6 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v6, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v54, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v6, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v6 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: v_cndmask_b32_e32 v6, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v5 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v5, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v41, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v5, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v5 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 +; GFX9-NEXT: v_cndmask_b32_e32 v5, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v8 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v8, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v52, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v8, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v8 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; GFX9-NEXT: v_cndmask_b32_e32 v8, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v7 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v7, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v55, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v7, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: v_cndmask_b32_e32 v7, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v10 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v10, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v50, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v10, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v10 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; GFX9-NEXT: v_cndmask_b32_e32 v10, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v9 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v9, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v53, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v9, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v9 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 +; GFX9-NEXT: v_cndmask_b32_e32 v9, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v12 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v12, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v48, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v12, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v12 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; GFX9-NEXT: v_cndmask_b32_e32 v12, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v11 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 ; GFX9-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 -; GFX9-NEXT: v_add3_u32 v31, v31, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v31, v32, vcc -; GFX9-NEXT: v_bfe_u32 v31, v11, 16, 1 -; GFX9-NEXT: v_add3_u32 v31, v31, v11, s6 -; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v11 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v11, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v51, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v11, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v11 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; GFX9-NEXT: v_cndmask_b32_e32 v11, v31, v32, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v14 -; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 +; GFX9-NEXT: v_cndmask_b32_e32 v11, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v14 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 ; GFX9-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 -; GFX9-NEXT: v_bfe_u32 v32, v31, 16, 1 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 -; GFX9-NEXT: v_add3_u32 v32, v32, v31, s6 -; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v31 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; GFX9-NEXT: v_bfe_u32 v31, v14, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v32, v48, vcc -; GFX9-NEXT: v_add3_u32 v31, v31, v14, s6 -; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v14 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v37, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v14, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v37, v36, v37, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v14, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v14 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 -; GFX9-NEXT: v_cndmask_b32_e32 v14, v31, v32, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v13 -; GFX9-NEXT: v_mov_b32_e32 v34, v16 -; GFX9-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 +; GFX9-NEXT: v_cndmask_b32_e32 v14, v35, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v13 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 ; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 -; GFX9-NEXT: v_mov_b32_e32 v33, v15 -; GFX9-NEXT: v_perm_b32 v16, v54, v42, s7 -; GFX9-NEXT: v_perm_b32 v15, v55, v39, s7 -; GFX9-NEXT: v_bfe_u32 v48, v31, 16, 1 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; GFX9-NEXT: v_add3_u32 v48, v48, v31, s6 -; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v31 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; GFX9-NEXT: v_bfe_u32 v31, v13, 16, 1 -; GFX9-NEXT: v_perm_b32 v16, v53, v0, s7 -; GFX9-NEXT: v_mov_b32_e32 v61, v0 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v48, v49, vcc -; GFX9-NEXT: v_add3_u32 v31, v31, v13, s6 -; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v13 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v38, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_bfe_u32 v35, v13, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v49, v36, v38, vcc +; GFX9-NEXT: v_add3_u32 v35, v35, v13, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v13 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; GFX9-NEXT: v_perm_b32 v32, v14, v1, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v13, v31, v48, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v14 -; GFX9-NEXT: v_perm_b32 v31, v13, v0, s7 -; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v0 +; GFX9-NEXT: v_cndmask_b32_e32 v13, v35, v36, vcc +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b32_e32 v35, 16, v1 +; GFX9-NEXT: v_add_f32_e32 v35, 0x40c00000, v35 +; GFX9-NEXT: v_bfe_u32 v36, v35, 16, 1 +; GFX9-NEXT: v_add3_u32 v36, v36, v35, s6 +; GFX9-NEXT: v_or_b32_e32 v38, 0x400000, v35 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v35, v35 +; GFX9-NEXT: v_cndmask_b32_e32 v35, v36, v38, vcc +; GFX9-NEXT: v_and_b32_e32 v36, 0xffff0000, v1 +; GFX9-NEXT: v_add_f32_e32 v36, 0x40c00000, v36 +; GFX9-NEXT: v_bfe_u32 v38, v36, 16, 1 +; GFX9-NEXT: v_add3_u32 v38, v38, v36, s6 +; GFX9-NEXT: v_or_b32_e32 v63, 0x400000, v36 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v36, v36 +; GFX9-NEXT: v_lshlrev_b32_e32 v36, 16, v0 +; GFX9-NEXT: v_add_f32_e32 v36, 0x40c00000, v36 +; GFX9-NEXT: v_cndmask_b32_e32 v38, v38, v63, vcc +; GFX9-NEXT: v_bfe_u32 v63, v36, 16, 1 +; GFX9-NEXT: v_add3_u32 v63, v63, v36, s6 +; GFX9-NEXT: v_or_b32_e32 v1, 0x400000, v36 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v36, v36 +; GFX9-NEXT: v_and_b32_e32 v36, 0xffff0000, v0 +; GFX9-NEXT: v_add_f32_e32 v36, 0x40c00000, v36 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v63, v1, vcc +; GFX9-NEXT: v_bfe_u32 v63, v36, 16, 1 +; GFX9-NEXT: v_add3_u32 v63, v63, v36, s6 +; GFX9-NEXT: v_mov_b32_e32 v0, v39 +; GFX9-NEXT: v_or_b32_e32 v39, 0x400000, v36 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v36, v36 +; GFX9-NEXT: v_cndmask_b32_e32 v39, v63, v39, vcc +; GFX9-NEXT: s_mov_b32 s6, 0x7060302 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v38 +; GFX9-NEXT: v_perm_b32 v36, v38, v35, s6 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v35 +; GFX9-NEXT: v_perm_b32 v35, v39, v2, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v39 +; GFX9-NEXT: v_mov_b32_e32 v39, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v14 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v13 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v12 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v10 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v8 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v19 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v6 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v3 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v16 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v15 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v18 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v17 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v30 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v29 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v22 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v21 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_perm_b32 v38, v14, v37, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_perm_b32 v37, v13, v49, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v49 +; GFX9-NEXT: v_perm_b32 v49, v12, v48, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v48 +; GFX9-NEXT: v_perm_b32 v48, v11, v51, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v51 +; GFX9-NEXT: v_perm_b32 v51, v10, v50, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v50 +; GFX9-NEXT: v_perm_b32 v50, v9, v53, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v53 +; GFX9-NEXT: v_perm_b32 v53, v8, v52, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v52 +; GFX9-NEXT: v_perm_b32 v52, v7, v55, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v55 +; GFX9-NEXT: v_perm_b32 v55, v6, v54, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v54 +; GFX9-NEXT: v_perm_b32 v54, v5, v41, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v41 +; GFX9-NEXT: v_perm_b32 v41, v4, v40, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v40 +; GFX9-NEXT: v_perm_b32 v40, v3, v43, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v43 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v52 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v54 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v55 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v15, v52, v30, s7 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v20 +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v15, v26, v28, s7 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v28 -; GFX9-NEXT: v_perm_b32 v16, v27, v29, s7 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v16, v23, v25, s7 -; GFX9-NEXT: v_perm_b32 v15, v22, v24, s7 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, v56 -; GFX9-NEXT: v_mov_b32_e32 v16, v57 -; GFX9-NEXT: v_perm_b32 v56, v9, v4, s7 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v25 -; GFX9-NEXT: v_perm_b32 v59, v12, v3, s7 -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v24 -; GFX9-NEXT: v_perm_b32 v38, v19, v21, s7 -; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v16 -; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48 -; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; GFX9-NEXT: v_bfe_u32 v49, v48, 16, 1 -; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; GFX9-NEXT: v_add3_u32 v49, v49, v48, s6 -; GFX9-NEXT: v_or_b32_e32 v63, 0x400000, v48 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48 -; GFX9-NEXT: v_bfe_u32 v48, v16, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v63, v49, v63, vcc -; GFX9-NEXT: v_add3_u32 v48, v48, v16, s6 -; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v16 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v16, v48, v49, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v15 -; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48 -; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 -; GFX9-NEXT: v_bfe_u32 v47, v48, 16, 1 -; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 -; GFX9-NEXT: v_add3_u32 v47, v47, v48, s6 -; GFX9-NEXT: v_or_b32_e32 v60, 0x400000, v48 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48 -; GFX9-NEXT: v_bfe_u32 v48, v15, 16, 1 -; GFX9-NEXT: v_perm_b32 v36, v8, v17, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v46, v47, v60, vcc -; GFX9-NEXT: v_add3_u32 v48, v48, v15, s6 -; GFX9-NEXT: v_or_b32_e32 v47, 0x400000, v15 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; GFX9-NEXT: v_perm_b32 v37, v18, v20, s7 -; GFX9-NEXT: v_perm_b32 v35, v7, v6, s7 -; GFX9-NEXT: v_cndmask_b32_e32 v15, v48, v47, vcc -; GFX9-NEXT: v_mov_b32_e32 v49, v36 -; GFX9-NEXT: v_mov_b32_e32 v48, v35 -; GFX9-NEXT: v_mov_b32_e32 v35, v37 -; GFX9-NEXT: v_mov_b32_e32 v36, v38 -; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; GFX9-NEXT: v_perm_b32 v41, v16, v63, s7 -; GFX9-NEXT: v_perm_b32 v40, v15, v46, s7 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v46 -; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[40:41] -; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v30 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v42 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v43 -; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v63 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[31:32] -; GFX9-NEXT: v_perm_b32 v58, v11, v2, s7 -; GFX9-NEXT: v_perm_b32 v57, v10, v5, s7 -; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v29 -; GFX9-NEXT: s_waitcnt vmcnt(23) -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v39 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v62 -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v44 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v48 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v61 -; GFX9-NEXT: s_waitcnt vmcnt(18) -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v38 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v38 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v37 -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(5) -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v19 +; GFX9-NEXT: v_perm_b32 v43, v16, v42, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v42 +; GFX9-NEXT: v_perm_b32 v42, v15, v45, s6 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v45 +; GFX9-NEXT: v_perm_b32 v45, v18, v44, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v44 +; GFX9-NEXT: v_perm_b32 v44, v17, v47, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v47 +; GFX9-NEXT: v_perm_b32 v47, v30, v46, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v46 +; GFX9-NEXT: v_perm_b32 v46, v29, v57, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v57 +; GFX9-NEXT: v_perm_b32 v57, v28, v56, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v56 +; GFX9-NEXT: v_perm_b32 v56, v27, v59, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v59 +; GFX9-NEXT: v_perm_b32 v59, v26, v58, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v58 +; GFX9-NEXT: v_perm_b32 v58, v25, v61, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v61 +; GFX9-NEXT: v_perm_b32 v61, v24, v60, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v60 +; GFX9-NEXT: v_perm_b32 v60, v23, v62, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v62 +; GFX9-NEXT: v_perm_b32 v62, v21, v34, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v34 +; GFX9-NEXT: v_perm_b32 v34, v20, v32, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v32 +; GFX9-NEXT: v_perm_b32 v63, v22, v33, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 +; GFX9-NEXT: v_perm_b32 v33, v19, v31, s6 +; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v31 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v15 ; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v32, v0, v15, s6 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15 ; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v31, v0, v15, s6 +; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[35:36] ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v36 +; GFX9-NEXT: v_mov_b32_e32 v16, v6 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v36 +; GFX9-NEXT: v_mov_b32_e32 v15, v5 +; GFX9-NEXT: v_mov_b32_e32 v6, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v35 +; GFX9-NEXT: v_mov_b32_e32 v5, v1 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[0:1], 24, v[37:38] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[37:38] -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v38 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v38 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v37 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[0:1], 24, v[48:49] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v49 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v49 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v48 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[0:1], 24, v[50:51] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[58:59] -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v51 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v51 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v50 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v53 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v52 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v55 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v55 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[33:34] -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[33:34] -; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[50:51] -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v33 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(7) -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[62:63] -; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v62 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v54 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[56:57] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[48:49] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[35:36] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[54:55] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[42:43] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[50:51] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v55 -; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v43 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v54 -; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(18) -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v41 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v41 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v40 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v32 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v32 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v31 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v59 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v40 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v59 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v58 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v49 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v43 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v43 +; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[40:41] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v45 +; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[42:43] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v45 +; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[44:45] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v44 +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[52:53] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[46:47] +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v47 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v53 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v49 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v35 -; GFX9-NEXT: v_mov_b32_e32 v35, v52 -; GFX9-NEXT: v_mov_b32_e32 v36, v53 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v35 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(15) -; GFX9-NEXT: v_lshrrev_b64 v[46:47], 24, v[15:16] -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[52:53] -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v57 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v57 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v56 -; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v53, v44 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v63 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v55 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v43 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v42 -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v36 -; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v36 -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(7) -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v39 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v35, v50 -; GFX9-NEXT: v_mov_b32_e32 v36, v51 -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v39 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v38 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 24, v63 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v35 -; GFX9-NEXT: v_mov_b32_e32 v36, v16 -; GFX9-NEXT: v_mov_b32_e32 v35, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v47 +; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[56:57] +; GFX9-NEXT: v_lshrrev_b64 v[35:36], 24, v[54:55] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v46 +; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[58:59] +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v57 +; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[60:61] +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[33:34] +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v42 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v56 +; GFX9-NEXT: v_lshrrev_b64 v[55:56], 24, v[62:63] +; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[31:32] +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v57 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v59 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v59 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v58 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v61 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v61 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v60 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v63 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v63 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v62 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v34 ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v34 -; GFX9-NEXT: v_mov_b32_e32 v16, v46 -; GFX9-NEXT: v_mov_b32_e32 v46, v37 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 24, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v31 ; GFX9-NEXT: .LBB90_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] -; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v1, v1, v55, s4 -; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v3, v3, v54, s4 -; GFX9-NEXT: v_perm_b32 v0, v5, v0, s4 -; GFX9-NEXT: v_perm_b32 v5, v6, v49, s4 -; GFX9-NEXT: v_perm_b32 v8, v8, v31, s4 -; GFX9-NEXT: v_perm_b32 v10, v10, v47, s4 -; GFX9-NEXT: v_perm_b32 v4, v4, v32, s4 -; GFX9-NEXT: v_perm_b32 v9, v9, v16, s4 -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v18, v18, v37, s4 -; GFX9-NEXT: v_perm_b32 v2, v2, v40, s4 -; GFX9-NEXT: v_perm_b32 v7, v7, v53, s4 -; GFX9-NEXT: v_perm_b32 v17, v17, v42, s4 -; GFX9-NEXT: s_waitcnt vmcnt(5) -; GFX9-NEXT: v_perm_b32 v55, v55, v35, s4 -; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(5) -; GFX9-NEXT: v_perm_b32 v32, v32, v15, s4 -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v54, v54, v35, s4 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v0, v54, 16, v0 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v49, v49, v15, s4 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v6, v6, v35, s4 -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v31, v31, v35, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v11, v11, v35, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v12, v12, v35, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v1, v3, v1, s4 +; GFX9-NEXT: v_perm_b32 v0, v27, v0, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v13, v35, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v36, v36, v49, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v36, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v4, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v14, v14, v35, s4 -; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v2, v36, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v47, v47, v35, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v15, v56, v35, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v43, v43, v50, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v43, 16, v1 +; GFX9-NEXT: v_perm_b32 v2, v2, v48, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:8 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v57, v35, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v56, v35, v50, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v3, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v37, v35, v36, s4 -; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:12 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v1, v5, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v35, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 -; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v3 -; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:8 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v2, v35, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:16 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v6, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4 -; GFX9-NEXT: buffer_store_dword v1, v45, s[0:3], 0 offen offset:12 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:16 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:20 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v1, v7, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v5 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_lshl_or_b32 v0, v6, 16, v7 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:24 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v2, v37, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:24 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v1, v8, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v8 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshl_or_b32 v0, v31, 16, v9 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v59, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v10 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshl_or_b32 v0, v32, 16, v11 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v2, v38, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:28 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v12 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_lshl_or_b32 v0, v49, 16, v13 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:48 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v9, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:32 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v10, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v14 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_lshl_or_b32 v0, v47, 16, v15 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:36 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v16 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_lshl_or_b32 v0, v56, 16, v17 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:64 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v48, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v18 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:68 -; GFX9-NEXT: v_perm_b32 v0, v19, v38, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v37, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:72 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, v20, v63, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v41, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, v21, v62, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, v22, v44, s4 +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v11, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:40 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v12, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v39, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, v23, v52, s4 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:44 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v0, v24, v0, s4 +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v13, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:48 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v14, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v33, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:52 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: v_perm_b32 v0, v25, v0, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, v26, v34, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, v27, v46, s4 +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 +; GFX9-NEXT: v_perm_b32 v2, v2, v4, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:56 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v3, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:60 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v17, v31, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v41, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:64 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v18, v32, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v45, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:68 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v19, v33, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v40, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:72 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v20, v34, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v46, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:76 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v21, v62, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v55, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:80 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v22, v63, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v47, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:84 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v23, v60, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v54, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:88 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v24, v61, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v43, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:92 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v25, v58, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v53, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:96 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v26, v59, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v44, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, v39, s[0:3], 0 offen offset:100 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v1, v52, s4 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:104 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v0, v28, v0, s4 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:104 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v0, v28, v57, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:108 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v0, v29, v0, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v58, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v51, s4 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:112 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v0, v30, v0, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:116 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: v_perm_b32 v0, v60, v0, s4 +; GFX9-NEXT: v_perm_b32 v0, v15, v0, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v1, v50, s4 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:120 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:120 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v0, v61, v0, s4 +; GFX9-NEXT: v_perm_b32 v0, v16, v0, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: buffer_store_dword v0, v45, s[0:3], 0 offen offset:124 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:124 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload @@ -154775,234 +154902,232 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Spill -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:236 -; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:232 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:232 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:228 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:228 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:224 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:224 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:220 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:220 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:216 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:216 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:212 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:212 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:208 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:208 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:204 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:204 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:200 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:200 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:196 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:196 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:192 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:192 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:188 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:188 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:184 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:184 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:180 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:180 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:176 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:176 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:172 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:172 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:168 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:168 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:164 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:164 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:160 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:160 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:156 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:156 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:152 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:152 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:148 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:148 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:144 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v78, s32 offset:144 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:140 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v79, s32 offset:140 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:136 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v88, s32 offset:136 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:132 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v89, s32 offset:132 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32 offset:128 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v90, s32 offset:128 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v92, s32 offset:124 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v91, s32 offset:124 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v93, s32 offset:120 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v92, s32 offset:120 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v94, s32 offset:116 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v93, s32 offset:116 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v95, s32 offset:112 -; GFX11-TRUE16-NEXT: s_clause 0x18 ; 100-byte Folded Spill -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v104, s32 offset:108 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v94, s32 offset:112 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v105, s32 offset:104 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v95, s32 offset:108 +; GFX11-TRUE16-NEXT: s_clause 0x17 ; 96-byte Folded Spill +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v104, s32 offset:104 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v106, s32 offset:100 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v105, s32 offset:100 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:96 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v106, s32 offset:96 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v108, s32 offset:92 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v107, s32 offset:92 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v109, s32 offset:88 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v108, s32 offset:88 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v110, s32 offset:84 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v109, s32 offset:84 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v111, s32 offset:80 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v110, s32 offset:80 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v120, s32 offset:76 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v111, s32 offset:76 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v121, s32 offset:72 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v120, s32 offset:72 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v122, s32 offset:68 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v121, s32 offset:68 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v123, s32 offset:64 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v122, s32 offset:64 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v124, s32 offset:60 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v123, s32 offset:60 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v125, s32 offset:56 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v124, s32 offset:56 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v126, s32 offset:52 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v125, s32 offset:52 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v127, s32 offset:48 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v126, s32 offset:48 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v136, s32 offset:44 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v127, s32 offset:44 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v137, s32 offset:40 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v136, s32 offset:40 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v138, s32 offset:36 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v137, s32 offset:36 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v139, s32 offset:32 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v138, s32 offset:32 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v140, s32 offset:28 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v139, s32 offset:28 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v141, s32 offset:24 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v140, s32 offset:24 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v142, s32 offset:20 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v141, s32 offset:20 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v143, s32 offset:16 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v142, s32 offset:16 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v152, s32 offset:12 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v143, s32 offset:12 ; GFX11-TRUE16-NEXT: s_clause 0x2 ; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:8 ; GFX11-TRUE16-NEXT: scratch_load_b32 v71, off, s32 offset:4 ; GFX11-TRUE16-NEXT: scratch_load_b32 v70, off, s32 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr178_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr141_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr140_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr64_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr134_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr177_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr139_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr138_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr136_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr137_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr127_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr66_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr133_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr179_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr122_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr178_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr121_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr120_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr181_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr111_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr109_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr104_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr68_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr130_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr180_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr110_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr108_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr95_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr80_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr117_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr95_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr93_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr94_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr90_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr84_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr94_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr92_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr93_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr89_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr85_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr116_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr88_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr78_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr127_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr76_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr62_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr79_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr126_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr114_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr112_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr105_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr142_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr99_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr137_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr104_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr63_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr141_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr58_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr152_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr86_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr128_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr136_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr143_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr140_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr144_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr142_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr182_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr87_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr139_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr131_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr39_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr126_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr125_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr124_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr147_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr123_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr110_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr108_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr118_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr146_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr122_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr109_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr149_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr107_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr102_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr148_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr106_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr92_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr105_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr151_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr91_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr89_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr79_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr101_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr150_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr90_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr88_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr161_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr73_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr78_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr98_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr160_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr76_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr74_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr163_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr61_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr72_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr97_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr162_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr60_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr57_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr59_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr165_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr47_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr45_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr176_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr56_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr83_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr164_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr46_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr44_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr167_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr40_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr100_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr52_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr96_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr54_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr82_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr166_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr41_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr183_lo16 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2) ; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v31 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_hi16 @@ -155011,135 +155136,134 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB90_2 ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[99:100], 24, v[13:14] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[96:97], 24, v[15:16] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[13:14] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[116:117], 24, v[9:10] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[27:28] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[117:118], 24, v[7:8] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[130:131], 24, v[5:6] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[133:134], 24, v[3:4] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[96:97], 24, v[29:30] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[101:102], 24, v[23:24] -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v15 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v14 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v14 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v13 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 24, v12 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 8, v12 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 8, v11 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 24, v10 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v88, 8, v10 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v90, 8, v9 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v93, 24, v8 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v8 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v104, 8, v7 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v109, 24, v6 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v111, 8, v6 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v120, 8, v5 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v121, 24, v4 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v122, 8, v4 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v136, 8, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v138, 24, v2 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v139, 8, v2 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v141, 8, v1 -; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v71 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v71 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v70 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v30 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v30 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v29 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v28 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v28 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v27 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 24, v26 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v26 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v79, 8, v25 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v89, 24, v24 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v91, 8, v24 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 8, v23 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v106, 24, v22 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v107, 8, v22 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v108, 8, v21 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v110, 24, v20 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v123, 8, v20 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v124, 8, v19 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v125, 24, v18 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v126, 8, v18 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v140, 8, v17 -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[86:87], 24, v[15:16] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[70:71] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[97:98], 24, v[27:28] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[101:102], 24, v[23:24] +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 24, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v14 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v14 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v13 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v12 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v12 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v11 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 24, v10 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v79, 8, v10 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v89, 8, v9 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 24, v8 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v94, 8, v8 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v7 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v108, 24, v6 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v110, 8, v6 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v111, 8, v5 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v120, 24, v4 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v121, 8, v4 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v127, 8, v3 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v137, 24, v2 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v138, 8, v2 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v140, 8, v1 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v71 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v71 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v70 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v30 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v30 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v29 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v28 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v28 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v27 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 24, v26 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 8, v26 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 8, v25 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v88, 24, v24 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v90, 8, v24 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v91, 8, v23 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v105, 24, v22 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v106, 8, v22 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v107, 8, v21 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v109, 24, v20 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v122, 8, v20 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v123, 8, v19 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v124, 24, v18 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v125, 8, v18 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v139, 8, v17 ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[11:12] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[134:135], 24, v[1:2] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[70:71] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[97:98], 24, v[25:26] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[83:84], 24, v[29:30] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[98:99], 24, v[25:26] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[102:103], 24, v[21:22] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[19:20] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[131:132], 24, v[17:18] -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v1.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v177.h, v1.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.h, v1.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v177.h, v2.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v176.h, v2.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.h, v2.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v180.h, v3.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v3.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v66.h, v3.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v4.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v4.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v67.h, v4.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.h, v5.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v181.h, v5.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.h, v5.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v181.h, v6.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v180.h, v6.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v6.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v62.h, v7.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v61.h, v7.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.h, v7.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v44.h, v8.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v43.h, v8.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.h, v8.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v94.h, v9.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.h, v9.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v63.h, v10.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.h, v10.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v127.h, v11.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v93.h, v9.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.h, v9.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v62.h, v10.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v86.h, v10.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v126.h, v11.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.h, v11.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v105.h, v12.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v104.h, v12.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.h, v12.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v142.h, v13.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v141.h, v13.l ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.h, v13.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v137.h, v14.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v136.h, v14.l ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.h, v14.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v152.h, v15.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v143.h, v15.l ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.h, v15.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v143.h, v16.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v142.h, v16.l ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.h, v16.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.h, v17.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v87.h, v17.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v17.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v39.h, v18.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.h, v18.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v148.h, v19.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v147.h, v19.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.h, v19.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v147.h, v20.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v146.h, v20.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.h, v20.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v150.h, v21.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, v21.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.h, v21.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v149.h, v22.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v148.h, v22.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.h, v22.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v160.h, v23.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v151.h, v23.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v37.h, v23.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v151.h, v24.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v150.h, v24.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v38.h, v24.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v162.h, v25.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v161.h, v25.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v48.h, v25.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v161.h, v26.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v160.h, v26.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.h, v26.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v164.h, v27.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v163.h, v27.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.h, v27.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v163.h, v28.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v162.h, v28.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.h, v28.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v166.h, v29.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v165.h, v29.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v52.h, v29.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v165.h, v30.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v164.h, v30.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v53.h, v30.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v176.h, v70.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v167.h, v70.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v54.h, v70.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v167.h, v71.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v166.h, v71.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v55.h, v71.h ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3 @@ -155162,142 +155286,150 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB90_4 ; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true ; GFX11-TRUE16-NEXT: v_and_b32_e32 v32, 0xffff0000, v17 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v34, 0x40c00000, v32 :: v_dual_lshlrev_b32 v31, 16, v18 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v31, 0x40c00000, v31 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v18 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v33, 0xffff0000, v20 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v34, 0x40c00000, v32 :: v_dual_add_f32 v31, 0x40c00000, v31 ; GFX11-TRUE16-NEXT: v_bfe_u32 v38, v34, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v32, v31, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v37, 0x400000, v31 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v31, v31 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_add3_u32 v32, v32, v31, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 ; GFX11-TRUE16-NEXT: v_add3_u32 v31, v38, v34, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v39, v32, v37, vcc_lo -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_dual_add_f32 v18, 0x40c00000, v18 :: v_dual_lshlrev_b32 v17, 16, v17 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v35, v18, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v18 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_add3_u32 v35, v35, v18, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_add_f32 v17, 0x40c00000, v17 :: v_dual_cndmask_b32 v32, v35, v36 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v33 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, 0x400000, v34 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v32, v35, v36, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v48, v17, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v49, 0x400000, v17 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v39.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_add3_u32 v37, v48, v17, 0x7fff -; GFX11-TRUE16-NEXT: v_and_b32_e32 v33, 0xffff0000, v20 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v124, 24, v32 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v125, 8, v32 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v125, 24, v32 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v126, 8, v32 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v146, v37, v49, vcc_lo -; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v33 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, 0x400000, v34 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v87, v37, v49, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v34, 0xffff0000, v19 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v20 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v31, v31, v33, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v33, v20, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v20 -; GFX11-TRUE16-NEXT: v_dual_add_f32 v36, 0x40c00000, v34 :: v_dual_add_f32 v19, 0x40c00000, v19 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_add3_u32 v33, v33, v20, 0x7fff ; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v18, 0x7fff +; GFX11-TRUE16-NEXT: v_dual_add_f32 v36, 0x40c00000, v34 :: v_dual_add_f32 v19, 0x40c00000, v19 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add3_u32 v33, v33, v20, 0x7fff ; GFX11-TRUE16-NEXT: v_or_b32_e32 v34, 0x400000, v18 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v87.h ; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v36, 16, 1 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.l, v146.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v147, v33, v35, vcc_lo +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v146, v33, v35, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v36 -; GFX11-TRUE16-NEXT: v_add3_u32 v20, v20, v36, 0x7fff ; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, 0x400000, v19 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v22 +; GFX11-TRUE16-NEXT: v_add3_u32 v20, v20, v36, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v36 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v139, 8, v31 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v34, v17, v34, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v34.l, v147.h -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v140, 8, v31 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v19, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v148, v17, v33, vcc_lo +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v147, v17, v33 :: v_dual_and_b32 v18, 0xffff0000, v22 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36 -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v33, v20, v35 :: v_dual_and_b32 v20, 0xffff0000, v21 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v18, 0x40c00000, v18 :: v_dual_cndmask_b32 v33, v20, v35 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v21 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v110, 24, v34 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v123, 8, v34 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v18 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 -; GFX11-TRUE16-NEXT: v_dual_add_f32 v21, 0x40c00000, v21 :: v_dual_lshlrev_b32 v22, 16, v22 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v20, 0x40c00000, v20 :: v_dual_add_f32 v21, 0x40c00000, v21 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v18, 0x7fff +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v34.l, v146.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v33.l, v147.h ; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v22, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v22 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v109, 24, v34 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v122, 8, v34 ; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v149, v19, v35 :: v_dual_lshlrev_b32 v22, 16, v24 -; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v20 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 -; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v20, 0x7fff -; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, 0x400000, v18 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v24 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v123, 8, v33 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v148, v19, v35, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 -; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v18, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v24 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v21 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v36, v17, v36, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v36.l, v149.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v150, v17, v24 :: v_dual_lshlrev_b32 v21, 16, v23 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v23 +; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, 0x400000, v20 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v149, v17, v24, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 -; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v20, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v23 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v36.l, v148.h ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v35, v19, v35, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v22, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 -; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v18, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_add_f32 v21, 0x40c00000, v21 :: v_dual_add_f32 v20, 0x40c00000, v20 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v35.l, v149.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v26 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v106, 24, v36 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v107, 8, v36 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v151, v19, v23, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v107, 8, v35 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v150, v19, v23, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v26 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 +; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v20, 0x7fff +; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 +; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v18, 0x7fff +; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v26 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v38, v17, v24, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v21, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21 -; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v20, 0x7fff ; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v20 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 ; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v25 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v38.l, v151.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v33.l, v148.h +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v105, 24, v36 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v106, 8, v36 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v160, v17, v23, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v151, v17, v23, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22 @@ -155311,9 +155443,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v28 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v124, 8, v33 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v37.l, v151.h ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v161, v19, v23, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v160, v19, v23, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21 @@ -155326,10 +155458,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 ; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v27 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v35.l, v150.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v49.l, v161.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v162, v17, v23, vcc_lo +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v91, 8, v37 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v161, v17, v23, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22 @@ -155342,10 +155473,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v30 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 24, v49 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 8, v49 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v108, 8, v35 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v163, v19, v23, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v38.l, v150.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.l, v161.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v162, v19, v23, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21 @@ -155358,10 +155489,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 ; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v29 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v51.l, v163.h -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v89, 24, v38 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v91, 8, v38 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v164, v17, v23, vcc_lo +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v88, 24, v38 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v90, 8, v38 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v163, v17, v23, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22 @@ -155375,9 +155506,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1) ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v71 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 24, v51 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v51 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v165, v19, v23, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v50.l, v163.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v164, v19, v23, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v21 @@ -155391,9 +155522,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v70 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v37.l, v160.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v53.l, v165.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v166, v17, v23, vcc_lo +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v165, v17, v23, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v22 @@ -155406,10 +155536,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v22, 0x7fff ; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v21 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v53 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v53 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 8, v37 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v167, v19, v23, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v49.l, v160.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v52.l, v165.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v166, v19, v23, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v20, 16, 1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v2 @@ -155422,10 +155552,11 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 ; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v21, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v55.l, v167.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 24, v49 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 8, v49 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v2 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v176, v17, v22, vcc_lo +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v167, v17, v22, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v1 @@ -155436,13 +155567,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 ; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v18, 0x7fff ; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_f32 v20, 0x40c00000, v20 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v2, 0x7fff -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 24, v55 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v55 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v54.l, v167.h ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v20, 16, 1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v177, v19, v21, vcc_lo +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v176, v19, v21, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v4 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 @@ -155455,10 +155585,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 ; GFX11-TRUE16-NEXT: v_add3_u32 v17, v17, v1, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v65.l, v177.h +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 8, v48 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v18, 16, 1 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v178, v17, v19, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v177, v17, v19, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff0000, v3 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 @@ -155473,9 +155603,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v4, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v6 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.l, v162.h -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v138, 24, v65 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v179, v2, v19, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v51.l, v162.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v64.l, v177.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v178, v2, v19, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v17, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v3 @@ -155485,13 +155615,13 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v17, 0x7fff ; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v67.l, v179.h +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 24, v51 ; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v5 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v50.l, v164.h -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v121, 24, v67 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v180, v1, v18, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v53.l, v164.h +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v51 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v179, v1, v18, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17 ; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v4, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v6 @@ -155502,13 +155632,13 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v4, 0x7fff ; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v122, 8, v67 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v66.l, v179.h ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v8 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v139, 8, v65 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v50 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v79, 8, v48 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v181, v2, v17, vcc_lo +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 24, v53 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v53 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v50 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v180, v2, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v5, 16, 1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v8 @@ -155522,26 +155652,25 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v3 ; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v6, 16, 1 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v69.l, v181.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v182, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v181, v2, v8, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v4, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_add3_u32 v3, v5, v6, 0x7fff ; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v109, 24, v69 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v68, v1, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_add3_u32 v1, v2, v4, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v7 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v10 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v68.l, v182.h -; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v44, v3, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v68.l, v181.h +; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_cndmask_b32 v43, v3, v5 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v7 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v10 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2 ; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v81, v1, v8 ; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 1 @@ -155552,8 +155681,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v2, 0x7fff ; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v6, 16, 1 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v52.l, v166.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.l, v44.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v81.l, v43.h +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 8, v52 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v80, v1, v7, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v5, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 @@ -155561,53 +155690,51 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff ; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v62, v4, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v61, v4, v8, vcc_lo ; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v5 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v11 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.l, v62.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v63, v1, v4, vcc_lo -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v9 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v55.l, v166.h +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v62, v1, v4 :: v_dual_lshlrev_b32 v1, 16, v9 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v3 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v85, v2, v7, vcc_lo +; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_cndmask_b32 v86, v2, v7 ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v13 ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.l, v63.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v54.l, v176.h -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[130:131], 24, v[68:69] -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v84, v2, v6, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v86.l, v62.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v80.l, v61.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v65.l, v176.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v85, v2, v6, vcc_lo ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v7, v1, 0x7fff ; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v5, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1 -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[96:97], 24, v[52:53] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[97:98], 24, v[48:49] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[54:55] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[83:84], 24, v[52:53] ; GFX11-TRUE16-NEXT: v_add3_u32 v1, v6, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v94, v2, v3, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v93, v2, v3, vcc_lo ; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v5 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v8 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 ; GFX11-TRUE16-NEXT: v_add3_u32 v3, v7, v4, 0x7fff ; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v4 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v14 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v84.l, v94.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v105, v1, v2, vcc_lo -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v11 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v85.l, v93.h +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v104, v1, v2 :: v_dual_lshlrev_b32 v1, 16, v11 ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v6, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v14 -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[116:117], 24, v[84:85] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[116:117], 24, v[85:86] ; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v6, 0x7fff ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v115, v3, v7, vcc_lo @@ -155615,7 +155742,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v13 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.l, v105.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v115.l, v104.h ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[117:118], 24, v[80:81] ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v114, v2, v3, vcc_lo ; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v4 :: v_dual_add_f32 v3, 0x40c00000, v5 @@ -155626,8 +155753,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1 ; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v6 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v64.l, v178.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v127, v4, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v67.l, v178.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v126, v4, v5, vcc_lo ; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff ; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 @@ -155641,12 +155768,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add3_u32 v3, v8, v1, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v16 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v15 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v137, v6, v7, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v136, v6, v7, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v5 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v15 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.l, v137.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v129.l, v136.h ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v128, v3, v4, vcc_lo ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v16 ; GFX11-TRUE16-NEXT: v_add3_u32 v4, v6, v2, 0x7fff @@ -155655,11 +155782,11 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v66.l, v180.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.l, v127.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v69.l, v180.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v114.l, v126.h ; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5 ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v3, 16, 1 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v142, v4, v6, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v141, v4, v6, vcc_lo ; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v1, 0x7fff ; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3 @@ -155668,14 +155795,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v8 ; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v5, 0x7fff ; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v142.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v143, v2, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v128.l, v141.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v142, v2, v9, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 ; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v6 -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[99:100], 24, v[128:129] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[50:51] -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v152, v7, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[100:101], 24, v[128:129] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[130:131], 24, v[68:69] +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v143, v7, v11, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v10, v6, 0x7fff ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[133:134], 24, v[66:67] @@ -155683,119 +155810,126 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[112:113], 24, v[114:115] ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v145, v4, v8, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.l, v143.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v145.l, v142.h ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[134:135], 24, v[64:65] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[82:83], 24, v[54:55] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[102:103], 24, v[35:36] -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v144, v2, v3, vcc_lo -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.l, v152.h ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[118:119], 24, v[33:34] +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v144, v2, v3, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v144.l, v143.h ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[131:132], 24, v[31:32] -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v145 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v145 -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[86:87], 24, v[144:145] -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v144 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v129 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v129 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v128 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 24, v115 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v74, 8, v115 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v76, 8, v114 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v78, 24, v85 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v88, 8, v85 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v90, 8, v84 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v93, 24, v81 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v81 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v104, 8, v80 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v111, 8, v69 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v120, 8, v68 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v136, 8, v66 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v141, 8, v64 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v54 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v52 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 24, v145 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v145 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 24, v129 +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[96:97], 24, v[144:145] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[97:98], 24, v[50:51] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[98:99], 24, v[48:49] +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 8, v144 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v129 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v128 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v115 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v115 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v75, 8, v114 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v77, 24, v86 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v79, 8, v86 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v89, 8, v85 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v92, 24, v81 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v94, 8, v81 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v95, 8, v80 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v108, 24, v69 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v110, 8, v69 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v111, 8, v68 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v120, 24, v67 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v121, 8, v67 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v127, 8, v66 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v137, 24, v65 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v138, 8, v65 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v140, 8, v64 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v55 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v55 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v54 ; GFX11-TRUE16-NEXT: .LBB90_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v1.l, v178.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v1.l, v177.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v64.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v3.l, v177.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v3.l, v176.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v65.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v5.l, v180.h -; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v141, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v5.l, v179.h +; GFX11-TRUE16-NEXT: v_perm_b32 v1, v1, v140, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v2, v2, v134, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v139, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v138, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, v3, v138, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v137, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v67.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v7.l, v182.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v7.l, v181.h ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v68.h ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v4, 16, v3 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, v5, v136, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, v5, v127, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v66.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v5.l, v179.h -; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v121, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v120, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v5.l, v178.h +; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v120, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v111, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v130, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v4, v4, v133, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v122, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v9.l, v181.h +; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v121, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v9.l, v180.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v69.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v81.h ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v4, 16, v3 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v6, 16, v5 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v8, 16, v7 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, v9, v111, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, v10, v109, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v62.h +; GFX11-TRUE16-NEXT: v_perm_b32 v6, v9, v110, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, v10, v108, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v61.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v80.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v44.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v84.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v43.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v85.h ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v6, v7, 16, v6 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, v8, v104, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, v8, v95, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v8, v9, v117, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, v10, v95, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v11, v93, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v94.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v63.h +; GFX11-TRUE16-NEXT: v_perm_b32 v9, v10, v94, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, v11, v92, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v93.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v62.h ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v7, v8, 16, v7 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v114.h ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v8, v10, 16, v9 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, v11, v90, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, v11, v89, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v10, v12, v116, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, v13, v88, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v85.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v127.h +; GFX11-TRUE16-NEXT: v_perm_b32 v11, v13, v79, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v86.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v126.h ; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v112, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v105.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v104.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v115.h -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v78, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v76, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v77, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v75, 0xc0c0004 ; GFX11-TRUE16-NEXT: s_clause 0x1 ; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off ; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v10, 16, v9 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v5.l, v142.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v5.l, v141.h ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v2, v12, 16, v11 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v3, v14, 16, v13 ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v6.l, v128.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v7.l, v137.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v7.l, v136.h ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v8.l, v129.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v9.l, v152.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v9.l, v143.h ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v10.l, v144.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v11.l, v143.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v11.l, v142.h ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v12.l, v145.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v13.l, v146.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v87.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v31.h -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v74, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v72, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v59, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v99, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v58, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v56, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v46, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v86, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v41, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v183, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v140, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v73, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v63, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, v5, v58, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v6, v6, v100, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v7, v7, v57, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, v8, v47, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, v9, v45, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v96, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v40, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v182, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v139, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v131, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v4, v16, 16, v15 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5 @@ -155805,74 +155939,74 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v9, v14, 16, v13 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v39.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v32.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v12.l, v148.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v12.l, v147.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v33.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v14.l, v147.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v14.l, v146.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v34.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v16.l, v150.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v16.l, v149.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v35.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v18.l, v149.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v18.l, v148.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v36.h -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v126, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v125, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v124, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, v10, v125, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, v11, v124, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, v12, v123, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v13, v13, v118, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v123, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v110, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v108, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, v14, v122, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v109, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v107, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v102, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v107, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v106, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v106, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v105, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v10, v11, 16, v10 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v11, v13, 16, v12 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v12, v15, 16, v14 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v13, v17, 16, v16 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v14, v19, 16, v18 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v15.l, v160.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v15.l, v151.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v37.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v17.l, v151.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v17.l, v150.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v38.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v19.l, v162.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v19.l, v161.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v48.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v21.l, v161.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v21.l, v160.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v49.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v23.l, v164.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v23.l, v163.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v50.h -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v92, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v15, v91, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v16, v16, v101, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v91, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v89, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v79, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v97, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v77, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v75, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v73, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v100, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v17, v90, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v18, v88, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v19, v78, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v98, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v76, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v74, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v72, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v97, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v15, v16, 16, v15 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v16, v18, 16, v17 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v17, v20, 16, v19 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v18, v22, 16, v21 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v20.l, v163.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v20.l, v162.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v51.h ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v19, v24, 16, v23 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v22.l, v166.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v22.l, v165.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v52.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v24.l, v165.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v24.l, v164.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.l, v53.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v26.l, v176.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v26.l, v167.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v54.h -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.l, v167.h +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.l, v166.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v55.h -; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v61, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v60, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v57, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v96, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v47, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v45, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v43, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v20, v60, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v21, v59, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v22, v56, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v23, v83, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v24, v24, v46, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v25, v44, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v26, v42, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v27, v27, v82, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v42, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v40, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v28, v28, v41, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v29, v29, v183, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v20, v21, 16, v20 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v21, v23, 16, v22 ; GFX11-TRUE16-NEXT: v_lshl_or_b32 v22, v25, 16, v24 @@ -155886,215 +156020,212 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96 ; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112 ; GFX11-TRUE16-NEXT: s_clause 0x1f ; 128-byte Folded Reload -; GFX11-TRUE16-NEXT: scratch_load_b32 v152, off, s32 offset:12 -; GFX11-TRUE16-NEXT: scratch_load_b32 v143, off, s32 offset:16 -; GFX11-TRUE16-NEXT: scratch_load_b32 v142, off, s32 offset:20 -; GFX11-TRUE16-NEXT: scratch_load_b32 v141, off, s32 offset:24 -; GFX11-TRUE16-NEXT: scratch_load_b32 v140, off, s32 offset:28 -; GFX11-TRUE16-NEXT: scratch_load_b32 v139, off, s32 offset:32 -; GFX11-TRUE16-NEXT: scratch_load_b32 v138, off, s32 offset:36 -; GFX11-TRUE16-NEXT: scratch_load_b32 v137, off, s32 offset:40 -; GFX11-TRUE16-NEXT: scratch_load_b32 v136, off, s32 offset:44 -; GFX11-TRUE16-NEXT: scratch_load_b32 v127, off, s32 offset:48 -; GFX11-TRUE16-NEXT: scratch_load_b32 v126, off, s32 offset:52 -; GFX11-TRUE16-NEXT: scratch_load_b32 v125, off, s32 offset:56 -; GFX11-TRUE16-NEXT: scratch_load_b32 v124, off, s32 offset:60 -; GFX11-TRUE16-NEXT: scratch_load_b32 v123, off, s32 offset:64 -; GFX11-TRUE16-NEXT: scratch_load_b32 v122, off, s32 offset:68 -; GFX11-TRUE16-NEXT: scratch_load_b32 v121, off, s32 offset:72 -; GFX11-TRUE16-NEXT: scratch_load_b32 v120, off, s32 offset:76 -; GFX11-TRUE16-NEXT: scratch_load_b32 v111, off, s32 offset:80 -; GFX11-TRUE16-NEXT: scratch_load_b32 v110, off, s32 offset:84 -; GFX11-TRUE16-NEXT: scratch_load_b32 v109, off, s32 offset:88 -; GFX11-TRUE16-NEXT: scratch_load_b32 v108, off, s32 offset:92 -; GFX11-TRUE16-NEXT: scratch_load_b32 v107, off, s32 offset:96 -; GFX11-TRUE16-NEXT: scratch_load_b32 v106, off, s32 offset:100 -; GFX11-TRUE16-NEXT: scratch_load_b32 v105, off, s32 offset:104 -; GFX11-TRUE16-NEXT: scratch_load_b32 v104, off, s32 offset:108 -; GFX11-TRUE16-NEXT: scratch_load_b32 v95, off, s32 offset:112 -; GFX11-TRUE16-NEXT: scratch_load_b32 v94, off, s32 offset:116 -; GFX11-TRUE16-NEXT: scratch_load_b32 v93, off, s32 offset:120 -; GFX11-TRUE16-NEXT: scratch_load_b32 v92, off, s32 offset:124 -; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32 offset:128 -; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:132 -; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:136 -; GFX11-TRUE16-NEXT: s_clause 0x18 ; 100-byte Folded Reload -; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:140 -; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:144 -; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:148 -; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:152 -; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:156 -; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:160 -; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:164 -; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:168 -; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:172 -; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:176 -; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:180 -; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:184 -; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:188 -; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:192 -; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:196 -; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:200 -; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:204 -; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:208 -; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:212 -; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:216 -; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:220 -; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:224 -; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:228 -; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:232 -; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:236 +; GFX11-TRUE16-NEXT: scratch_load_b32 v143, off, s32 offset:12 +; GFX11-TRUE16-NEXT: scratch_load_b32 v142, off, s32 offset:16 +; GFX11-TRUE16-NEXT: scratch_load_b32 v141, off, s32 offset:20 +; GFX11-TRUE16-NEXT: scratch_load_b32 v140, off, s32 offset:24 +; GFX11-TRUE16-NEXT: scratch_load_b32 v139, off, s32 offset:28 +; GFX11-TRUE16-NEXT: scratch_load_b32 v138, off, s32 offset:32 +; GFX11-TRUE16-NEXT: scratch_load_b32 v137, off, s32 offset:36 +; GFX11-TRUE16-NEXT: scratch_load_b32 v136, off, s32 offset:40 +; GFX11-TRUE16-NEXT: scratch_load_b32 v127, off, s32 offset:44 +; GFX11-TRUE16-NEXT: scratch_load_b32 v126, off, s32 offset:48 +; GFX11-TRUE16-NEXT: scratch_load_b32 v125, off, s32 offset:52 +; GFX11-TRUE16-NEXT: scratch_load_b32 v124, off, s32 offset:56 +; GFX11-TRUE16-NEXT: scratch_load_b32 v123, off, s32 offset:60 +; GFX11-TRUE16-NEXT: scratch_load_b32 v122, off, s32 offset:64 +; GFX11-TRUE16-NEXT: scratch_load_b32 v121, off, s32 offset:68 +; GFX11-TRUE16-NEXT: scratch_load_b32 v120, off, s32 offset:72 +; GFX11-TRUE16-NEXT: scratch_load_b32 v111, off, s32 offset:76 +; GFX11-TRUE16-NEXT: scratch_load_b32 v110, off, s32 offset:80 +; GFX11-TRUE16-NEXT: scratch_load_b32 v109, off, s32 offset:84 +; GFX11-TRUE16-NEXT: scratch_load_b32 v108, off, s32 offset:88 +; GFX11-TRUE16-NEXT: scratch_load_b32 v107, off, s32 offset:92 +; GFX11-TRUE16-NEXT: scratch_load_b32 v106, off, s32 offset:96 +; GFX11-TRUE16-NEXT: scratch_load_b32 v105, off, s32 offset:100 +; GFX11-TRUE16-NEXT: scratch_load_b32 v104, off, s32 offset:104 +; GFX11-TRUE16-NEXT: scratch_load_b32 v95, off, s32 offset:108 +; GFX11-TRUE16-NEXT: scratch_load_b32 v94, off, s32 offset:112 +; GFX11-TRUE16-NEXT: scratch_load_b32 v93, off, s32 offset:116 +; GFX11-TRUE16-NEXT: scratch_load_b32 v92, off, s32 offset:120 +; GFX11-TRUE16-NEXT: scratch_load_b32 v91, off, s32 offset:124 +; GFX11-TRUE16-NEXT: scratch_load_b32 v90, off, s32 offset:128 +; GFX11-TRUE16-NEXT: scratch_load_b32 v89, off, s32 offset:132 +; GFX11-TRUE16-NEXT: scratch_load_b32 v88, off, s32 offset:136 +; GFX11-TRUE16-NEXT: s_clause 0x17 ; 96-byte Folded Reload +; GFX11-TRUE16-NEXT: scratch_load_b32 v79, off, s32 offset:140 +; GFX11-TRUE16-NEXT: scratch_load_b32 v78, off, s32 offset:144 +; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:148 +; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:152 +; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:156 +; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:160 +; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:164 +; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:168 +; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:172 +; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:176 +; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:180 +; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:184 +; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:188 +; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:192 +; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:196 +; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:200 +; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:204 +; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:208 +; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:212 +; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:216 +; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:220 +; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:224 +; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:228 +; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:232 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v64bf16_to_v128i8: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: s_clause 0x16 ; 92-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:100 +; GFX11-FAKE16-NEXT: s_clause 0x15 ; 88-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:96 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:96 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:92 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:92 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:88 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:88 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:84 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:84 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:80 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:76 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:72 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:68 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:64 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:60 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:56 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:52 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:48 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:44 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:40 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:36 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:32 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:28 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:24 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:20 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:16 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:16 -; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v78, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:12 ; GFX11-FAKE16-NEXT: s_clause 0x2 ; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8 ; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4 ; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr150 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr160 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr150 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr112 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr148 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr102 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr146 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr52 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr103 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr113 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr146 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr59 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr114 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr145 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr115 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr144 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr112 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr116 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr135 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr113 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr117 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr134 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr46 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr114 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr133 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr115 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr132 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr131 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr36 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr132 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr40 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr130 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr131 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr181 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr130 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr180 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr177 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr129 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr35 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr179 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr128 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr178 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr167 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr119 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr34 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr176 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr128 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr166 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr118 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr164 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr165 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr119 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr163 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr117 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr116 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr160 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr78 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr118 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr60 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr65 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr58 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr56 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr80 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr57 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr81 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr47 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr82 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr183 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr45 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr68 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr83 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr180 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr63 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr44 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr84 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr177 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr41 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr54 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr85 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr176 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr62 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr182 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr86 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr165 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr50 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr179 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr53 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr87 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr61 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr178 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr73 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr96 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr167 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr50 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr97 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr149 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr101 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr164 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr72 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr98 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr147 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr99 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr145 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr103 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr100 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr149 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr101 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr147 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr102 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2) ; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v33 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33 @@ -156107,100 +156238,99 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[13:14] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[7:8] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[3:4] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[21:22] -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v16 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 8, v16 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v15 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 24, v14 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v14 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v13 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v13 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 24, v12 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v12 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v12 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v11 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v11 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v10 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v10 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v10 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v9 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v9 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v8 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v8 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v8 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v7 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v7 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v6 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v6 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v6 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v5 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v5 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v4 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v4 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 8, v4 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v3 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v3 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v2 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v2 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v2 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v1 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v32 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v32 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v32 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v31 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v31 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 24, v30 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v30 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v30 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v29 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v29 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v28 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v28 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v28 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v27 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v27 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v26 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v26 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v26 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v25 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v25 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v24 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 16, v24 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v24 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v23 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v23 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v22 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v22 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v21 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v21 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 24, v20 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v20 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v20 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v19 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v19 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 24, v18 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v18 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 8, v18 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v17 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 8, v17 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[31:32] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[21:22] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[5:6] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[29:30] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[19:20] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 24, v16 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v16 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v16 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v15 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 8, v15 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 24, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v13 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v13 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v12 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v12 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v12 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v11 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v11 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v10 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v10 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v10 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v9 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v9 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v8 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v8 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 8, v8 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v7 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 8, v7 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v6 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v6 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v6 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v5 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v5 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v4 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v4 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v4 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v3 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v3 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v2 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v2 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 24, v32 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v32 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 8, v32 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v31 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 8, v31 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 24, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v29 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v29 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 24, v28 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v28 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v28 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 16, v27 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v27 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v26 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v26 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v26 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 16, v25 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v25 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 24, v24 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 16, v24 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v24 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v23 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v23 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 24, v22 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 16, v22 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v22 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v21 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v21 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 24, v20 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v20 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v20 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v19 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v19 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 24, v18 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v18 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v18 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v17 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[19:20] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[17:18] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[17:18] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v17 ; GFX11-FAKE16-NEXT: .LBB90_2: ; %Flow ; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB90_4 @@ -156231,693 +156361,707 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v18, 0x7fff ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v37, v39, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v20 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v35 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) ; GFX11-FAKE16-NEXT: v_perm_b32 v67, v18, v17, 0x7060302 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v33, v38, v33, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v35, v35 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v34, 0x40c00000, v37 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 16, v18 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 16, v18 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v17 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v33 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v72, v36, v39, vcc_lo +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 24, v67 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v34, v36, v39, vcc_lo ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v19 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 -; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v34, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v38, 0x400000, v34 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v34, v34 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v20 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_dual_add_f32 v36, 0x40c00000, v36 :: v_dual_add_f32 v39, 0x40c00000, v19 -; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v34, 0x7fff -; GFX11-FAKE16-NEXT: v_perm_b32 v66, v72, v33, 0x7060302 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v77, 8, v67 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v36, 16, 1 -; GFX11-FAKE16-NEXT: v_bfe_u32 v34, v39, 16, 1 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v35, v38, vcc_lo -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v78, 8, v66 -; GFX11-FAKE16-NEXT: v_add3_u32 v35, v49, v36, 0x7fff -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1) -; GFX11-FAKE16-NEXT: v_add3_u32 v38, v34, v39, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v39 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 16, v34 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v36, 0x40c00000, v36 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-FAKE16-NEXT: v_dual_add_f32 v48, 0x40c00000, v19 :: v_dual_add_f32 v37, 0x40c00000, v37 +; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v36, 16, 1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v37, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v37 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37 +; GFX11-FAKE16-NEXT: v_add3_u32 v35, v35, v37, 0x7fff +; GFX11-FAKE16-NEXT: v_add3_u32 v37, v50, v36, 0x7fff +; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v48 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v35, v39, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v35, v48, 16, 1 ; GFX11-FAKE16-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 -; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v20, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v20 +; GFX11-FAKE16-NEXT: v_perm_b32 v66, v34, v33, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v33 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_add3_u32 v39, v35, v48, 0x7fff +; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v20, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v20 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v20, 0x7fff -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v20, v37, v48, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v22 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, 0x400000, v36 +; GFX11-FAKE16-NEXT: v_add3_u32 v38, v38, v20, 0x7fff +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v20, v38, v49, vcc_lo +; GFX11-FAKE16-NEXT: v_or_b32_e32 v38, 0x400000, v36 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_perm_b32 v71, v20, v19, 0x7060302 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v36, 0x40c00000, v48 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v20 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v34, v35, v37, vcc_lo -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_perm_b32 v81, v20, v19, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v20 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v37, v38, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v19 -; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v36, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v36 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 24, v71 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v38, v49, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v38, 16, v21 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 24, v81 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v35 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v36, v39, v50 :: v_dual_lshlrev_b32 v39, 16, v21 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff0000, v21 -; GFX11-FAKE16-NEXT: v_add3_u32 v37, v37, v36, 0x7fff -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v36, v36 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v49, 16, v22 +; GFX11-FAKE16-NEXT: v_perm_b32 v80, v36, v35, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 16, v36 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_add_f32_e32 v50, 0x40c00000, v21 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v37, 0x40c00000, v49 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v39, 0x40c00000, v39 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v37, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v37 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v37, v37 +; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v39, 16, 1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2) +; GFX11-FAKE16-NEXT: v_add3_u32 v38, v38, v37, 0x7fff ; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff0000, v22 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_dual_add_f32 v38, 0x40c00000, v38 :: v_dual_add_f32 v49, 0x40c00000, v21 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 16, v35 -; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v21, v37, v48 :: v_dual_add_f32 v22, 0x40c00000, v22 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v38, 16, 1 -; GFX11-FAKE16-NEXT: v_bfe_u32 v36, v49, 16, 1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 8, v71 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v22, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v22 +; GFX11-FAKE16-NEXT: v_bfe_u32 v37, v50, 16, 1 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v21, v38, v49 :: v_dual_add_f32 v22, 0x40c00000, v22 +; GFX11-FAKE16-NEXT: v_add3_u32 v38, v52, v39, 0x7fff +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_add3_u32 v49, v37, v50, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v50 +; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v22, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v22 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 -; GFX11-FAKE16-NEXT: v_add3_u32 v37, v51, v38, 0x7fff -; GFX11-FAKE16-NEXT: v_add3_u32 v48, v36, v49, 0x7fff -; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v22, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v49 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v22, v39, v50, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v24 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, 0x400000, v38 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v24 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38 -; GFX11-FAKE16-NEXT: v_perm_b32 v81, v22, v21, 0x7060302 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v38, 0x40c00000, v50 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 16, v22 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v37, v39, vcc_lo -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49 -; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v38, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v38 -; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v24, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v24 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v37, v48, v51, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v23 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_add3_u32 v48, v48, v22, 0x7fff +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v22, v48, v51, vcc_lo +; GFX11-FAKE16-NEXT: v_or_b32_e32 v48, 0x400000, v39 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_perm_b32 v83, v22, v21, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 16, v22 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v37, v38, v48, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 24, v83 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v38, v49, v52 :: v_dual_lshlrev_b32 v49, 16, v23 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 -; GFX11-FAKE16-NEXT: v_add3_u32 v39, v39, v38, 0x7fff -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v38, v38 -; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v24, 0x7fff -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_dual_add_f32 v48, 0x40c00000, v48 :: v_dual_add_f32 v51, 0x40c00000, v23 -; GFX11-FAKE16-NEXT: v_perm_b32 v70, v35, v34, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v23, v39, v50, vcc_lo +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v51, 16, v24 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 16, v38 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v23 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_add_f32_e32 v39, 0x40c00000, v51 +; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v39, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v39 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v39, v39 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2) +; GFX11-FAKE16-NEXT: v_add3_u32 v48, v48, v39, 0x7fff +; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xffff0000, v24 +; GFX11-FAKE16-NEXT: v_bfe_u32 v39, v52, 16, 1 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v23, v48, v51 :: v_dual_add_f32 v24, 0x40c00000, v24 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_add3_u32 v51, v39, v52, 0x7fff +; GFX11-FAKE16-NEXT: v_add_f32_e32 v49, 0x40c00000, v49 +; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v24, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v24 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_bfe_u32 v54, v49, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24 -; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v48, 16, 1 -; GFX11-FAKE16-NEXT: v_bfe_u32 v38, v51, 16, 1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v34 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v21 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v49, v52, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v52, 16, v26 -; GFX11-FAKE16-NEXT: v_add3_u32 v39, v53, v48, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v49, 0x400000, v48 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v48, 0x40c00000, v52 -; GFX11-FAKE16-NEXT: v_add3_u32 v50, v38, v51, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v51 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v39, v49, vcc_lo -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51 -; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v48, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v48 -; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v26, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v26 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v39, v50, v53, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v50, 16, v25 +; GFX11-FAKE16-NEXT: v_add3_u32 v50, v50, v24, 0x7fff +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_add3_u32 v48, v54, v49, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v52 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v24, v50, v53, vcc_lo +; GFX11-FAKE16-NEXT: v_or_b32_e32 v50, 0x400000, v49 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_perm_b32 v85, v24, v23, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 16, v24 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v39, v48, v50, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v23 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 24, v85 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v48, v51, v54 :: v_dual_lshlrev_b32 v51, 16, v25 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 -; GFX11-FAKE16-NEXT: v_add3_u32 v49, v49, v48, 0x7fff -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v48, v48 -; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v26, 0x7fff -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_dual_add_f32 v50, 0x40c00000, v50 :: v_dual_add_f32 v53, 0x40c00000, v25 -; GFX11-FAKE16-NEXT: v_perm_b32 v80, v37, v36, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v49, v52, vcc_lo +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v53, 16, v26 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xffff0000, v26 +; GFX11-FAKE16-NEXT: v_perm_b32 v82, v38, v37, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 16, v48 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v54, 0x40c00000, v25 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-FAKE16-NEXT: v_dual_add_f32 v49, 0x40c00000, v53 :: v_dual_add_f32 v26, 0x40c00000, v26 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v37 +; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v49, 16, 1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v26, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v49 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v49, v49 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v26 +; GFX11-FAKE16-NEXT: v_add3_u32 v50, v50, v49, 0x7fff +; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v26, 0x7fff +; GFX11-FAKE16-NEXT: v_bfe_u32 v49, v54, 16, 1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v50, v53, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26 -; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v50, 16, 1 -; GFX11-FAKE16-NEXT: v_bfe_u32 v48, v53, 16, 1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v36 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 16, v37 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v26, v51, v54, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v28 -; GFX11-FAKE16-NEXT: v_add3_u32 v49, v55, v50, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v51, 0x400000, v50 +; GFX11-FAKE16-NEXT: v_add3_u32 v53, v49, v54, 0x7fff +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v26, v52, v55 :: v_dual_lshlrev_b32 v55, 16, v28 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff0000, v28 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v50, 0x40c00000, v54 -; GFX11-FAKE16-NEXT: v_add3_u32 v52, v48, v53, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v53 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v51, 0x40c00000, v51 +; GFX11-FAKE16-NEXT: v_perm_b32 v84, v48, v39, 0x7060302 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v26 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v39 ; GFX11-FAKE16-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v48, v49, v51, vcc_lo -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v53, v53 -; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v50, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v50 -; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v28, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v28 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v49, v52, v55, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v52, 16, v27 +; GFX11-FAKE16-NEXT: v_bfe_u32 v64, v51, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v52, 0x400000, v51 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v28 +; GFX11-FAKE16-NEXT: v_add3_u32 v50, v64, v51, 0x7fff +; GFX11-FAKE16-NEXT: v_add_f32_e32 v51, 0x40c00000, v55 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v54 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v49, v50, v52, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v54, v54 +; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v51, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v54, v28, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v51 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v50, v53, v64 :: v_dual_lshlrev_b32 v53, 16, v27 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 -; GFX11-FAKE16-NEXT: v_add3_u32 v51, v51, v50, 0x7fff -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v50, v50 -; GFX11-FAKE16-NEXT: v_add3_u32 v53, v53, v28, 0x7fff -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_dual_add_f32 v52, 0x40c00000, v52 :: v_dual_add_f32 v55, 0x40c00000, v27 -; GFX11-FAKE16-NEXT: v_perm_b32 v83, v24, v23, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v27, v51, v54, vcc_lo +; GFX11-FAKE16-NEXT: v_add3_u32 v52, v52, v51, 0x7fff +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v51, v51 +; GFX11-FAKE16-NEXT: v_add3_u32 v54, v54, v28, 0x7fff +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 16, v50 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v64, 0x40c00000, v27 +; GFX11-FAKE16-NEXT: v_perm_b32 v87, v26, v25, 0x7060302 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v27, v52, v55, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28 -; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v52, 16, 1 -; GFX11-FAKE16-NEXT: v_bfe_u32 v50, v55, 16, 1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v49 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 16, v24 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v28, v53, v64, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v64, 16, v30 -; GFX11-FAKE16-NEXT: v_add3_u32 v51, v65, v52, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v53, 0x400000, v52 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25 +; GFX11-FAKE16-NEXT: v_bfe_u32 v51, v64, 16, 1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v87 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v28, v54, v65 :: v_dual_lshlrev_b32 v65, 16, v30 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xffff0000, v30 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v52, 0x40c00000, v64 -; GFX11-FAKE16-NEXT: v_add3_u32 v54, v50, v55, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v55 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v50, v51, v53, vcc_lo -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55 -; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v52, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v52 -; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v30, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v68, 0x400000, v30 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v51, v54, v65, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v54, 16, v29 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_add3_u32 v55, v51, v64, 0x7fff +; GFX11-FAKE16-NEXT: v_perm_b32 v86, v50, v49, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v49 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v28 +; GFX11-FAKE16-NEXT: v_dual_add_f32 v30, 0x40c00000, v30 :: v_dual_add_f32 v53, 0x40c00000, v53 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v69, 0x400000, v30 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_bfe_u32 v68, v53, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v54, 0x400000, v53 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v53, v53 +; GFX11-FAKE16-NEXT: v_add3_u32 v52, v68, v53, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v68, 0x400000, v64 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v53, 0x40c00000, v65 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v51, v52, v54, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64 +; GFX11-FAKE16-NEXT: v_bfe_u32 v54, v53, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v64, v30, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v53 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v52, v55, v68 :: v_dual_lshlrev_b32 v55, 16, v29 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 -; GFX11-FAKE16-NEXT: v_add3_u32 v53, v53, v52, 0x7fff -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52 -; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v30, 0x7fff +; GFX11-FAKE16-NEXT: v_add3_u32 v54, v54, v53, 0x7fff +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v53, v53 +; GFX11-FAKE16-NEXT: v_add3_u32 v64, v64, v30, 0x7fff ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_dual_add_f32 v54, 0x40c00000, v54 :: v_dual_add_f32 v65, 0x40c00000, v29 -; GFX11-FAKE16-NEXT: v_perm_b32 v85, v26, v25, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v29, v53, v64, vcc_lo +; GFX11-FAKE16-NEXT: v_dual_add_f32 v55, 0x40c00000, v55 :: v_dual_add_f32 v68, 0x40c00000, v29 +; GFX11-FAKE16-NEXT: v_perm_b32 v97, v28, v27, 0x7060302 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v29, v54, v65, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v30, v30 -; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v54, 16, 1 -; GFX11-FAKE16-NEXT: v_bfe_u32 v52, v65, 16, 1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v26 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v25 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v30, v55, v68, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v70, v55, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v53, v68, 16, 1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 16, v52 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v27 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v30, v64, v69, vcc_lo +; GFX11-FAKE16-NEXT: v_add3_u32 v54, v70, v55, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v64, 0x400000, v55 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v68, 16, v32 -; GFX11-FAKE16-NEXT: v_add3_u32 v53, v69, v54, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v55, 0x400000, v54 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v69, 16, v32 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55 +; GFX11-FAKE16-NEXT: v_add3_u32 v65, v53, v68, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v70, 0x400000, v68 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v32, 0xffff0000, v32 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v54, v54 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v54, 0x40c00000, v68 -; GFX11-FAKE16-NEXT: v_add3_u32 v64, v52, v65, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v69, 0x400000, v65 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v55, 0x40c00000, v69 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v53, v54, v64, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v68, v68 +; GFX11-FAKE16-NEXT: v_perm_b32 v96, v52, v51, 0x7060302 ; GFX11-FAKE16-NEXT: v_add_f32_e32 v32, 0x40c00000, v32 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v52, v53, v55, vcc_lo -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v65, v65 -; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v54, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v68, 0x400000, v54 -; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v32, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v98, 0x400000, v32 +; GFX11-FAKE16-NEXT: v_bfe_u32 v64, v55, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v69, 0x400000, v55 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v53, v64, v69 :: v_dual_lshlrev_b32 v64, 16, v31 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v54, v65, v70 :: v_dual_lshlrev_b32 v65, 16, v31 +; GFX11-FAKE16-NEXT: v_bfe_u32 v68, v32, 16, 1 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v31, 0xffff0000, v31 -; GFX11-FAKE16-NEXT: v_add3_u32 v55, v55, v54, 0x7fff -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v54, v54 -; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v32, 0x7fff -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_dual_add_f32 v64, 0x40c00000, v64 :: v_dual_add_f32 v69, 0x40c00000, v31 -; GFX11-FAKE16-NEXT: v_perm_b32 v82, v39, v38, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v31, v55, v68, vcc_lo +; GFX11-FAKE16-NEXT: v_add3_u32 v64, v64, v55, 0x7fff +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v55, v55 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v65, 0x40c00000, v65 +; GFX11-FAKE16-NEXT: v_add3_u32 v68, v68, v32, 0x7fff +; GFX11-FAKE16-NEXT: v_add_f32_e32 v70, 0x40c00000, v31 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v71, 0x400000, v32 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v31, v64, v69, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v100, v65, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v32, v32 -; GFX11-FAKE16-NEXT: v_bfe_u32 v99, v64, 16, 1 -; GFX11-FAKE16-NEXT: v_bfe_u32 v54, v69, 16, 1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v53 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v23 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v65, v98, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v98, 16, v2 -; GFX11-FAKE16-NEXT: v_add3_u32 v55, v99, v64, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v65, 0x400000, v64 +; GFX11-FAKE16-NEXT: v_bfe_u32 v55, v70, 16, 1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v54 +; GFX11-FAKE16-NEXT: v_add3_u32 v64, v100, v65, 0x7fff +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v68, v71, vcc_lo +; GFX11-FAKE16-NEXT: v_or_b32_e32 v68, 0x400000, v65 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v71, 16, v2 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v65, v65 +; GFX11-FAKE16-NEXT: v_add3_u32 v69, v55, v70, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v100, 0x400000, v70 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v64, 0x40c00000, v98 -; GFX11-FAKE16-NEXT: v_add3_u32 v68, v54, v69, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v99, 0x400000, v69 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v65, 0x40c00000, v71 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v55, v64, v68, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v70, v70 +; GFX11-FAKE16-NEXT: v_perm_b32 v99, v30, v29, 0x7060302 ; GFX11-FAKE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v54, v55, v65, vcc_lo -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v69, v69 -; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v64, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v100, 0x400000, v64 -; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v2, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v102, 0x400000, v2 -; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v55, v68, v99 :: v_dual_lshlrev_b32 v68, 16, v1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v68, v65, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v71, 0x400000, v65 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v64, v69, v100 :: v_dual_lshlrev_b32 v69, 16, v1 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_bfe_u32 v70, v2, 16, 1 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; GFX11-FAKE16-NEXT: v_add3_u32 v65, v65, v64, 0x7fff -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v64, v64 -; GFX11-FAKE16-NEXT: v_add3_u32 v69, v69, v2, 0x7fff -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_dual_add_f32 v68, 0x40c00000, v68 :: v_dual_add_f32 v101, 0x40c00000, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v84, v49, v48, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v65, v100, vcc_lo +; GFX11-FAKE16-NEXT: v_add3_u32 v68, v68, v65, 0x7fff +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v65, v65 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v69, 0x40c00000, v69 +; GFX11-FAKE16-NEXT: v_add3_u32 v70, v70, v2, 0x7fff +; GFX11-FAKE16-NEXT: v_add_f32_e32 v102, 0x40c00000, v1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v103, 0x400000, v2 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v68, v71, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v112, v69, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 -; GFX11-FAKE16-NEXT: v_bfe_u32 v103, v68, 16, 1 -; GFX11-FAKE16-NEXT: v_bfe_u32 v64, v101, 16, 1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v48 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v38 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v69, v102, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v102, 16, v4 -; GFX11-FAKE16-NEXT: v_add3_u32 v65, v103, v68, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v69, 0x400000, v68 +; GFX11-FAKE16-NEXT: v_bfe_u32 v65, v102, 16, 1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v29 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v51 +; GFX11-FAKE16-NEXT: v_add3_u32 v68, v112, v69, 0x7fff +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v70, v103, vcc_lo +; GFX11-FAKE16-NEXT: v_or_b32_e32 v70, 0x400000, v69 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v103, 16, v4 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v69, v69 +; GFX11-FAKE16-NEXT: v_add3_u32 v71, v65, v102, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, 0x400000, v102 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v68, v68 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v68, 0x40c00000, v102 -; GFX11-FAKE16-NEXT: v_add3_u32 v100, v64, v101, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v103, 0x400000, v101 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v69, 0x40c00000, v103 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v65, v68, v70, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v102, v102 +; GFX11-FAKE16-NEXT: v_perm_b32 v101, v32, v31, 0x7060302 ; GFX11-FAKE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v64, v65, v69, vcc_lo -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v101, v101 -; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v68, 16, 1 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v102, 16, v3 +; GFX11-FAKE16-NEXT: v_bfe_u32 v70, v69, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v113, 0x400000, v69 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v68, v71, v112 :: v_dual_lshlrev_b32 v71, 16, v3 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_bfe_u32 v112, v4, 16, 1 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, 0x400000, v68 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v65, v100, v103, vcc_lo -; GFX11-FAKE16-NEXT: v_bfe_u32 v103, v4, 16, 1 -; GFX11-FAKE16-NEXT: v_add3_u32 v69, v69, v68, 0x7fff -; GFX11-FAKE16-NEXT: v_add_f32_e32 v102, 0x40c00000, v102 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v68, v68 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v113, 0x40c00000, v3 -; GFX11-FAKE16-NEXT: v_add3_u32 v103, v103, v4, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v4 -; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v102, 16, 1 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v69, v112, vcc_lo +; GFX11-FAKE16-NEXT: v_add3_u32 v70, v70, v69, 0x7fff +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v69, v69 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v71, 0x40c00000, v71 +; GFX11-FAKE16-NEXT: v_add3_u32 v112, v112, v4, 0x7fff +; GFX11-FAKE16-NEXT: v_add_f32_e32 v114, 0x40c00000, v3 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v4 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v70, v113, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v71, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-FAKE16-NEXT: v_bfe_u32 v68, v113, 16, 1 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v112, 16, v6 -; GFX11-FAKE16-NEXT: v_add3_u32 v69, v115, v102, 0x7fff +; GFX11-FAKE16-NEXT: v_bfe_u32 v69, v114, 16, 1 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v113, 16, v6 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v103, v114, vcc_lo -; GFX11-FAKE16-NEXT: v_or_b32_e32 v103, 0x400000, v102 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v102, v102 -; GFX11-FAKE16-NEXT: v_add3_u32 v68, v68, v113, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, 0x400000, v113 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v112, 0x40c00000, v112 -; GFX11-FAKE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v69, v69, v103 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v113, v113 -; GFX11-FAKE16-NEXT: v_perm_b32 v87, v28, v27, 0x7060302 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_bfe_u32 v113, v112, 16, 1 -; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v6, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, 0x400000, v112 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v68, v68, v114, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v114, 16, v5 +; GFX11-FAKE16-NEXT: v_add3_u32 v70, v116, v71, 0x7fff +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v112, v115, vcc_lo +; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, 0x400000, v71 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v71, v71 +; GFX11-FAKE16-NEXT: v_add3_u32 v69, v69, v114, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v114 +; GFX11-FAKE16-NEXT: v_dual_add_f32 v71, 0x40c00000, v113 :: v_dual_add_f32 v6, 0x40c00000, v6 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v70, v70, v112, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v114, v114 +; GFX11-FAKE16-NEXT: v_perm_b32 v100, v64, v55, 0x7060302 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_bfe_u32 v114, v71, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v6, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v71 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v69, v69, v115, vcc_lo +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v115, 16, v5 +; GFX11-FAKE16-NEXT: v_add3_u32 v114, v114, v71, 0x7fff +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v71, v71 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 -; GFX11-FAKE16-NEXT: v_add3_u32 v113, v113, v112, 0x7fff -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v112, v112 -; GFX11-FAKE16-NEXT: v_add3_u32 v115, v115, v6, 0x7fff -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_dual_add_f32 v114, 0x40c00000, v114 :: v_dual_add_f32 v5, 0x40c00000, v5 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v6 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v135, v113, v116, vcc_lo +; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v6, 0x7fff +; GFX11-FAKE16-NEXT: v_add_f32_e32 v115, 0x40c00000, v115 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v6 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v71, v114, v117, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-FAKE16-NEXT: v_bfe_u32 v118, v114, 16, 1 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v116, 16, v8 -; GFX11-FAKE16-NEXT: v_bfe_u32 v112, v5, 16, 1 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v115, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v115 +; GFX11-FAKE16-NEXT: v_perm_b32 v98, v54, v53, 0x7060302 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v116, v118, vcc_lo +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v8 +; GFX11-FAKE16-NEXT: v_add3_u32 v116, v119, v115, 0x7fff +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v115, v115 +; GFX11-FAKE16-NEXT: v_bfe_u32 v114, v5, 16, 1 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v115, v117, vcc_lo -; GFX11-FAKE16-NEXT: v_add3_u32 v113, v118, v114, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, 0x400000, v114 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v114, v114 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v114, 0x40c00000, v116 -; GFX11-FAKE16-NEXT: v_add3_u32 v112, v112, v5, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v5 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v144, v113, v115, vcc_lo +; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v5 +; GFX11-FAKE16-NEXT: v_perm_b32 v103, v2, v1, 0x7060302 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v146, v116, v117, vcc_lo +; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v118 +; GFX11-FAKE16-NEXT: v_add3_u32 v114, v114, v5, 0x7fff ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-FAKE16-NEXT: v_bfe_u32 v115, v114, 16, 1 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v116, 16, v7 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v7 +; GFX11-FAKE16-NEXT: v_bfe_u32 v117, v116, 16, 1 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v114 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v112, v117, vcc_lo -; GFX11-FAKE16-NEXT: v_bfe_u32 v117, v8, 16, 1 -; GFX11-FAKE16-NEXT: v_add3_u32 v115, v115, v114, 0x7fff -; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v116 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v114, v114 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v114, v119, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v8, 16, 1 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v118, 0x40c00000, v118 +; GFX11-FAKE16-NEXT: v_add3_u32 v117, v117, v116, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v116 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116 +; GFX11-FAKE16-NEXT: v_add3_u32 v119, v119, v8, 0x7fff ; GFX11-FAKE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; GFX11-FAKE16-NEXT: v_add3_u32 v117, v117, v8, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v8 -; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v116, 16, 1 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v133, v115, v118, vcc_lo +; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v8 +; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v118, 16, 1 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v135, v117, v128, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v10 -; GFX11-FAKE16-NEXT: v_bfe_u32 v114, v7, 16, 1 -; GFX11-FAKE16-NEXT: v_add3_u32 v115, v128, v116, 0x7fff +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v128, 16, v10 +; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v7, 16, 1 +; GFX11-FAKE16-NEXT: v_add3_u32 v117, v130, v118, 0x7fff ; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v117, v119, vcc_lo -; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, 0x400000, v116 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v118 -; GFX11-FAKE16-NEXT: v_add3_u32 v114, v114, v7, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v7 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v119, v129, vcc_lo +; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v118 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v118, v118 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v118, 0x40c00000, v128 +; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v7, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v7 ; GFX11-FAKE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v134, v115, v117, vcc_lo +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v144, v117, v119, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-FAKE16-NEXT: v_bfe_u32 v117, v116, 16, 1 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v116 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v114, v119, vcc_lo -; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v10, 16, 1 -; GFX11-FAKE16-NEXT: v_add3_u32 v117, v117, v116, 0x7fff -; GFX11-FAKE16-NEXT: v_add_f32_e32 v118, 0x40c00000, v118 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 -; GFX11-FAKE16-NEXT: v_add3_u32 v119, v119, v10, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v10 -; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v118, 16, 1 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v131, v117, v128, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v118, 16, 1 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v128, 16, v9 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v130, 0x400000, v118 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v131, 0x400000, v10 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v116, v129, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v10, 16, 1 +; GFX11-FAKE16-NEXT: v_add3_u32 v119, v119, v118, 0x7fff +; GFX11-FAKE16-NEXT: v_add_f32_e32 v128, 0x40c00000, v128 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v118, v118 +; GFX11-FAKE16-NEXT: v_perm_b32 v113, v4, v3, 0x7060302 +; GFX11-FAKE16-NEXT: v_add3_u32 v129, v129, v10, 0x7fff +; GFX11-FAKE16-NEXT: v_perm_b32 v112, v69, v70, 0x7060302 +; GFX11-FAKE16-NEXT: v_bfe_u32 v132, v128, 16, 1 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v133, v119, v130, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v9, 16, 1 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v128, 16, v12 -; GFX11-FAKE16-NEXT: v_add3_u32 v117, v130, v118, 0x7fff +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v130, 16, v12 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v119, v129, vcc_lo -; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v118 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v118, v118 -; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v9, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v9 +; GFX11-FAKE16-NEXT: v_add3_u32 v119, v132, v128, 0x7fff +; GFX11-FAKE16-NEXT: v_perm_b32 v115, v6, v71, 0x7060302 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v129, v131, vcc_lo +; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v128 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v128, v128 ; GFX11-FAKE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 -; GFX11-FAKE16-NEXT: v_perm_b32 v102, v68, v69, 0x7060302 -; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v132, v117, v119 :: v_dual_add_f32 v117, 0x40c00000, v128 +; GFX11-FAKE16-NEXT: v_perm_b32 v102, v68, v65, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v68 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v53 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v134, v119, v129, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v12, 16, 1 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v119, 0x40c00000, v130 +; GFX11-FAKE16-NEXT: v_perm_b32 v114, v5, v146, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[112:113] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[86:87] +; GFX11-FAKE16-NEXT: v_add3_u32 v129, v129, v12, 0x7fff +; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 +; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v119, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v130, 0x400000, v119 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v115 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 24, v113 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 +; GFX11-FAKE16-NEXT: v_add3_u32 v128, v128, v119, 0x7fff +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v113 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v112 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v102 +; GFX11-FAKE16-NEXT: v_bfe_u32 v118, v9, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v131, 0x400000, v9 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_bfe_u32 v119, v12, 16, 1 -; GFX11-FAKE16-NEXT: v_perm_b32 v113, v6, v135, 0x7060302 -; GFX11-FAKE16-NEXT: v_perm_b32 v112, v5, v144, 0x7060302 -; GFX11-FAKE16-NEXT: v_bfe_u32 v118, v117, 16, 1 -; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v9, v116, v129 :: v_dual_lshlrev_b32 v116, 16, v11 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v117 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 24, v97 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v87 +; GFX11-FAKE16-NEXT: v_add3_u32 v118, v118, v9, 0x7fff +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v86 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v118, v131, vcc_lo +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v118, 16, v11 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_add3_u32 v118, v118, v117, 0x7fff -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v116 -; GFX11-FAKE16-NEXT: v_add3_u32 v119, v119, v12, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v12 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v145, v118, v128, vcc_lo -; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v116, 16, 1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v119, v119 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v131, 0x400000, v12 +; GFX11-FAKE16-NEXT: v_perm_b32 v117, v8, v135, 0x7060302 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_dual_add_f32 v118, 0x40c00000, v118 :: v_dual_add_f32 v11, 0x40c00000, v11 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v145, v128, v130, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v116 -; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v11, 16, 1 -; GFX11-FAKE16-NEXT: v_perm_b32 v58, v10, v131, 0x7060302 -; GFX11-FAKE16-NEXT: v_add3_u32 v117, v130, v116, 0x7fff -; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v119, v129 :: v_dual_lshlrev_b32 v119, 16, v14 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 -; GFX11-FAKE16-NEXT: v_perm_b32 v57, v9, v132, 0x7060302 +; GFX11-FAKE16-NEXT: v_perm_b32 v116, v7, v144, 0x7060302 +; GFX11-FAKE16-NEXT: v_bfe_u32 v132, v118, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v118 +; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v11, 16, 1 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v129, v131 :: v_dual_lshlrev_b32 v129, 16, v14 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_perm_b32 v182, v12, v145, 0x7060302 -; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v119 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v130, v117, v118, vcc_lo -; GFX11-FAKE16-NEXT: v_add3_u32 v117, v128, v11, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v11 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v119, 16, v13 +; GFX11-FAKE16-NEXT: v_add3_u32 v119, v132, v118, 0x7fff +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v118, v118 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 +; GFX11-FAKE16-NEXT: v_perm_b32 v61, v9, v134, 0x7060302 +; GFX11-FAKE16-NEXT: v_add_f32_e32 v118, 0x40c00000, v129 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v132, v119, v128 :: v_dual_lshlrev_b32 v129, 16, v13 +; GFX11-FAKE16-NEXT: v_add3_u32 v119, v130, v11, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v11 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v116, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v118, 16, 1 ; GFX11-FAKE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 -; GFX11-FAKE16-NEXT: v_perm_b32 v97, v30, v29, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v117, v118, vcc_lo -; GFX11-FAKE16-NEXT: v_add_f32_e32 v117, 0x40c00000, v119 -; GFX11-FAKE16-NEXT: v_add3_u32 v118, v128, v116, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, 0x400000, v116 -; GFX11-FAKE16-NEXT: v_bfe_u32 v128, v14, 16, 1 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116 -; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v117, 16, 1 +; GFX11-FAKE16-NEXT: v_perm_b32 v62, v10, v133, 0x7060302 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v119, v128, vcc_lo +; GFX11-FAKE16-NEXT: v_add_f32_e32 v119, 0x40c00000, v129 +; GFX11-FAKE16-NEXT: v_add3_u32 v128, v130, v118, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v118 +; GFX11-FAKE16-NEXT: v_bfe_u32 v130, v14, 16, 1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v118, v118 +; GFX11-FAKE16-NEXT: v_bfe_u32 v131, v119, 16, 1 ; GFX11-FAKE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v146, 0x400000, v117 -; GFX11-FAKE16-NEXT: v_add3_u32 v116, v128, v14, 0x7fff -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v119, v118, v119, vcc_lo -; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v14 -; GFX11-FAKE16-NEXT: v_add3_u32 v128, v129, v117, 0x7fff -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v129, 16, v16 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v147, 0x400000, v119 +; GFX11-FAKE16-NEXT: v_add3_u32 v118, v130, v14, 0x7fff +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v129, v128, v129, vcc_lo +; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v14 +; GFX11-FAKE16-NEXT: v_add3_u32 v130, v131, v119, 0x7fff +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v131, 16, v16 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14 -; GFX11-FAKE16-NEXT: v_bfe_u32 v147, v13, 16, 1 +; GFX11-FAKE16-NEXT: v_bfe_u32 v148, v13, 16, 1 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v181, v11, v130, 0x7060302 -; GFX11-FAKE16-NEXT: v_perm_b32 v96, v53, v52, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v116, v118, vcc_lo -; GFX11-FAKE16-NEXT: v_add_f32_e32 v116, 0x40c00000, v129 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117 -; GFX11-FAKE16-NEXT: v_add3_u32 v117, v147, v13, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, 0x400000, v13 +; GFX11-FAKE16-NEXT: v_perm_b32 v42, v11, v132, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[116:117] +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v118, v128, vcc_lo +; GFX11-FAKE16-NEXT: v_add_f32_e32 v118, 0x40c00000, v131 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v119, v119 +; GFX11-FAKE16-NEXT: v_add3_u32 v119, v148, v13, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, 0x400000, v13 ; GFX11-FAKE16-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; GFX11-FAKE16-NEXT: v_bfe_u32 v129, v116, 16, 1 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v128, v128, v146, vcc_lo -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v146, 16, v15 +; GFX11-FAKE16-NEXT: v_bfe_u32 v131, v118, 16, 1 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v130, v130, v147, vcc_lo +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v147, 16, v15 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 -; GFX11-FAKE16-NEXT: v_perm_b32 v179, v14, v119, 0x7060302 -; GFX11-FAKE16-NEXT: v_perm_b32 v103, v4, v3, 0x7060302 -; GFX11-FAKE16-NEXT: v_perm_b32 v101, v2, v1, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v117, v118, vcc_lo -; GFX11-FAKE16-NEXT: v_add_f32_e32 v117, 0x40c00000, v146 -; GFX11-FAKE16-NEXT: v_add3_u32 v118, v129, v116, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, 0x400000, v116 -; GFX11-FAKE16-NEXT: v_bfe_u32 v146, v16, 16, 1 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v116, v116 +; GFX11-FAKE16-NEXT: v_perm_b32 v181, v14, v129, 0x7060302 +; GFX11-FAKE16-NEXT: v_perm_b32 v43, v12, v145, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[114:115] +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v119, v128, vcc_lo +; GFX11-FAKE16-NEXT: v_add_f32_e32 v119, 0x40c00000, v147 +; GFX11-FAKE16-NEXT: v_add3_u32 v128, v131, v118, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v131, 0x400000, v118 +; GFX11-FAKE16-NEXT: v_bfe_u32 v147, v16, 16, 1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v118, v118 ; GFX11-FAKE16-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 -; GFX11-FAKE16-NEXT: v_bfe_u32 v147, v117, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v148, 0x400000, v117 -; GFX11-FAKE16-NEXT: v_perm_b32 v178, v13, v128, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v118, v118, v129, vcc_lo -; GFX11-FAKE16-NEXT: v_add3_u32 v129, v146, v16, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v146, 0x400000, v16 +; GFX11-FAKE16-NEXT: v_bfe_u32 v148, v119, 16, 1 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v149, 0x400000, v119 +; GFX11-FAKE16-NEXT: v_perm_b32 v180, v13, v130, 0x7060302 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v128, v128, v131, vcc_lo +; GFX11-FAKE16-NEXT: v_add3_u32 v131, v147, v16, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v147, 0x400000, v16 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16 -; GFX11-FAKE16-NEXT: v_bfe_u32 v116, v15, 16, 1 -; GFX11-FAKE16-NEXT: v_add3_u32 v147, v147, v117, 0x7fff -; GFX11-FAKE16-NEXT: v_or_b32_e32 v149, 0x400000, v15 -; GFX11-FAKE16-NEXT: v_perm_b32 v100, v65, v64, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v129, v146, vcc_lo -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v117, v117 -; GFX11-FAKE16-NEXT: v_add3_u32 v116, v116, v15, 0x7fff -; GFX11-FAKE16-NEXT: v_perm_b32 v115, v8, v133, 0x7060302 -; GFX11-FAKE16-NEXT: v_perm_b32 v114, v7, v134, 0x7060302 -; GFX11-FAKE16-NEXT: v_perm_b32 v164, v16, v118, 0x7060302 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v129, v147, v148, vcc_lo +; GFX11-FAKE16-NEXT: v_bfe_u32 v118, v15, 16, 1 +; GFX11-FAKE16-NEXT: v_add3_u32 v148, v148, v119, 0x7fff +; GFX11-FAKE16-NEXT: v_or_b32_e32 v150, 0x400000, v15 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[96:97] +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v131, v147, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v119, v119 +; GFX11-FAKE16-NEXT: v_add3_u32 v118, v118, v15, 0x7fff +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v32 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v31 +; GFX11-FAKE16-NEXT: v_perm_b32 v166, v16, v128, 0x7060302 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v131, v148, v149, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15 -; GFX11-FAKE16-NEXT: v_perm_b32 v86, v51, v50, 0x7060302 -; GFX11-FAKE16-NEXT: v_perm_b32 v99, v32, v31, 0x7060302 -; GFX11-FAKE16-NEXT: v_perm_b32 v98, v55, v54, 0x7060302 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[112:113] -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v116, v149, vcc_lo -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v30 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v29 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v52 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[102:103] -; GFX11-FAKE16-NEXT: v_perm_b32 v163, v15, v129, 0x7060302 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v118 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v129 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[163:164] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[178:179] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[181:182] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[57:58] -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v119 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v13 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v128 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v12 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v69 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[82:83] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v64 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v55 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v118, v150, vcc_lo +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v16 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v128 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v129 +; GFX11-FAKE16-NEXT: v_perm_b32 v165, v15, v131, 0x7060302 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v13 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v130 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v12 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v145 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v11 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v130 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v10 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v131 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v9 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v132 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v8 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v133 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v7 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v134 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v6 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v135 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v5 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v144 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v4 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[165:166] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[180:181] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[42:43] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[61:62] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v5 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v146 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v4 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v68 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v69 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v2 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v70 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[100:101] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[80:81] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v15 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v131 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v11 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v132 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v10 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v133 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v9 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v134 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v8 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v135 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v7 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v144 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v6 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v71 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v65 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v64 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v32 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v31 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v54 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v28 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v27 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v50 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[114:115] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[100:101] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[96:97] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[84:85] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[68:69], 24, v[80:81] -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v55 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v51 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 16, v39 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v65 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[102:103] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[98:99] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[86:87] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[82:83] -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v70 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[69:70], 24, v[70:71] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[66:67] -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v164 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 8, v164 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v163 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 24, v179 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v179 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 8, v178 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 24, v182 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 8, v182 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v181 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 24, v58 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v58 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v57 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v115 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[84:85] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[70:71], 24, v[66:67] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 24, v166 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v166 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 8, v165 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 24, v181 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v181 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v180 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 24, v43 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 8, v43 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v42 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 24, v62 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v62 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v61 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v117 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 8, v117 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 8, v116 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 8, v115 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 8, v114 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 24, v113 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 8, v113 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 8, v112 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v103 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 8, v103 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 8, v102 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v101 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v101 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v100 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 24, v99 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v103 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 8, v103 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 24, v101 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 8, v101 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 8, v100 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 24, v99 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 8, v99 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 8, v98 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 24, v97 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 8, v97 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 8, v96 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v87 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 8, v87 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 8, v86 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v85 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 8, v85 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 8, v84 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v83 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 8, v83 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 8, v82 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 24, v81 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 8, v81 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 8, v80 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 24, v67 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v72 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 8, v67 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v66 ; GFX11-FAKE16-NEXT: .LBB90_4: ; %end ; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 -; GFX11-FAKE16-NEXT: v_perm_b32 v39, v150, v64, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v60, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v59, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v51, v148, v58, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v102, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v52, v146, v52, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v103, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v39, v144, v57, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v114, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v37, v133, v37, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v51, 16, v2 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v52, 16, v3 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v112, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v63, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v51, v160, v64, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v62, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v55, v150, v61, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v112, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v52, v148, v52, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v51, 16, v1 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v113, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v51, v146, v59, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v114, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v49, v145, v49, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v116, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v48, v135, v48, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v113, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v51, v134, v46, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v115, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v52, v132, v44, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v37, 16, v7 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v41, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v36, v131, v36, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v40, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v37, v130, v182, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v181, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v35, v129, v35, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v179, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v39, v128, v178, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v48, 16, v5 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v51, 16, v6 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v52, 16, v8 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v52, 16, v3 +; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v115, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v52, v144, v56, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v117, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v55, v134, v46, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v51, 16, v4 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v49, 16, v5 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v48, 16, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v43, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v36, v133, v36, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v42, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v48, v132, v40, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v183, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v35, v131, v35, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v181, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v49, v130, v180, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v52, 16, v6 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v55, 16, v8 ; GFX11-FAKE16-NEXT: s_clause 0x1 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v36, 16, v9 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v37, 16, v10 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v48, 16, v10 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v35, 16, v11 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v12 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v167, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, v119, v34, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v166, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, v118, v164, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, v15, v163, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v117, v33, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v161, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v116, v160, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v78, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v67, v65, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v49, 16, v12 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v177, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v6, v129, v34, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v176, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, v128, v166, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, v15, v165, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, v119, v33, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v163, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, v118, v162, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v39, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, v60, v70, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v10, 16, v9 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v12, 16, v11 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v14, 16, v13 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v77, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v56, v71, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v76, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, v47, v69, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v75, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v45, v74, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v16, v21, v80, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v43, v68, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v18, v22, v81, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v42, v73, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, v18, v67, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, v58, v77, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, v19, v80, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v57, v69, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, v20, v81, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, v47, v76, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v21, v82, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v17, v45, v68, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v22, v83, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v44, v75, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v11, 16, v10 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v13, 16, v12 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v15, 16, v14 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v17, 16, v16 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v19, 16, v18 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v23, v82, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v16, v183, v54, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v24, v83, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v18, v180, v63, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v25, v84, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v20, v177, v53, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v26, v85, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v22, v176, v62, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v27, v86, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v24, v165, v50, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v15, v23, v84, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v41, v54, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v17, v24, v85, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v182, v74, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v25, v86, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v179, v53, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v26, v87, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v178, v73, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v27, v96, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v167, v50, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v16, 16, v15 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v18, 16, v17 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v20, 16, v19 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v22, 16, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v20, v28, v87, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v162, v61, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v28, v97, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v164, v72, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v24, 16, v23 -; GFX11-FAKE16-NEXT: v_perm_b32 v22, v29, v96, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v151, v49, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v24, v30, v97, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v149, v101, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v29, v98, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v161, v38, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v30, v99, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v151, v103, 0xc0c0004 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_perm_b32 v26, v31, v98, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v147, v38, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v28, v32, v99, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v29, v145, v100, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v31, v100, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v27, v149, v37, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v28, v32, v101, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v29, v147, v102, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v21, 16, v20 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v21, v23, 16, v22 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v22, v25, 16, v24 @@ -156930,30 +157074,29 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112 -; GFX11-FAKE16-NEXT: s_clause 0x16 ; 92-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v78, off, s32 offset:12 -; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:16 -; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:20 -; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:24 -; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:28 -; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:32 -; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:36 -; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:40 -; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:44 -; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:48 -; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:52 -; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:56 -; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:60 -; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:64 -; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:68 -; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:72 -; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:76 -; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:80 -; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:84 -; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:88 -; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:92 -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:96 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:100 +; GFX11-FAKE16-NEXT: s_clause 0x15 ; 88-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:84 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:88 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:92 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:96 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 @@ -156978,9 +157121,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill @@ -157031,37 +157174,37 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_writelane_b32 v63, s99, 33 ; SI-NEXT: v_writelane_b32 v63, s30, 34 ; SI-NEXT: v_writelane_b32 v63, s31, 35 +; SI-NEXT: v_readfirstlane_b32 s60, v13 ; SI-NEXT: v_readfirstlane_b32 s56, v15 +; SI-NEXT: s_and_b32 s61, s60, 0xffff0000 +; SI-NEXT: s_lshl_b32 s60, s60, 16 ; SI-NEXT: s_and_b32 s57, s56, 0xffff0000 +; SI-NEXT: v_readfirstlane_b32 vcc_lo, v3 +; SI-NEXT: v_mul_f32_e64 v3, 1.0, s60 ; SI-NEXT: v_readfirstlane_b32 s46, v16 ; SI-NEXT: s_lshl_b32 s56, s56, 16 -; SI-NEXT: v_readfirstlane_b32 s78, v8 -; SI-NEXT: v_mul_f32_e64 v8, 1.0, s57 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v3, 1.0, s57 +; SI-NEXT: v_readfirstlane_b32 s42, v18 ; SI-NEXT: v_readfirstlane_b32 s44, v17 ; SI-NEXT: s_and_b32 s47, s46, 0xffff0000 ; SI-NEXT: s_lshl_b32 s46, s46, 16 -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v8, 1.0, s56 -; SI-NEXT: v_readfirstlane_b32 s42, v18 -; SI-NEXT: s_and_b32 s45, s44, 0xffff0000 -; SI-NEXT: s_lshl_b32 s44, s44, 16 ; SI-NEXT: v_readfirstlane_b32 s58, v14 -; SI-NEXT: v_readfirstlane_b32 s60, v13 ; SI-NEXT: v_readfirstlane_b32 s62, v12 ; SI-NEXT: v_readfirstlane_b32 s72, v11 ; SI-NEXT: v_readfirstlane_b32 s74, v10 ; SI-NEXT: v_readfirstlane_b32 s76, v9 +; SI-NEXT: v_readfirstlane_b32 s78, v8 ; SI-NEXT: v_readfirstlane_b32 s88, v7 ; SI-NEXT: v_readfirstlane_b32 s90, v6 ; SI-NEXT: v_readfirstlane_b32 s92, v5 ; SI-NEXT: v_readfirstlane_b32 s94, v4 -; SI-NEXT: v_readfirstlane_b32 vcc_lo, v3 ; SI-NEXT: v_readfirstlane_b32 s30, v2 ; SI-NEXT: v_readfirstlane_b32 s34, v1 -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v8, 1.0, s46 +; SI-NEXT: v_mul_f32_e64 v3, 1.0, s56 ; SI-NEXT: s_and_b32 s4, s29, 0xffff0000 ; SI-NEXT: s_lshl_b32 s5, s29, 16 ; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 @@ -157092,10 +157235,10 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 ; SI-NEXT: s_lshl_b32 s42, s42, 16 +; SI-NEXT: s_and_b32 s45, s44, 0xffff0000 +; SI-NEXT: s_lshl_b32 s44, s44, 16 ; SI-NEXT: s_and_b32 s59, s58, 0xffff0000 ; SI-NEXT: s_lshl_b32 s58, s58, 16 -; SI-NEXT: s_and_b32 s61, s60, 0xffff0000 -; SI-NEXT: s_lshl_b32 s60, s60, 16 ; SI-NEXT: s_and_b32 s63, s62, 0xffff0000 ; SI-NEXT: s_lshl_b32 s62, s62, 16 ; SI-NEXT: s_and_b32 s73, s72, 0xffff0000 @@ -157121,688 +157264,652 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; SI-NEXT: s_and_b32 s35, s34, 0xffff0000 ; SI-NEXT: s_lshl_b32 s34, s34, 16 ; SI-NEXT: v_readfirstlane_b32 s36, v19 -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v8, 1.0, s44 +; SI-NEXT: v_mul_f32_e64 v3, 1.0, s46 ; SI-NEXT: s_cmp_lg_u32 s36, 0 -; SI-NEXT: v_mul_f32_e64 v10, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v15, 1.0, s16 -; SI-NEXT: v_mul_f32_e64 v7, 1.0, s40 -; SI-NEXT: v_mul_f32_e64 v4, 1.0, s17 -; SI-NEXT: v_mul_f32_e64 v24, 1.0, s29 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v9, 1.0, s28 -; SI-NEXT: v_mul_f32_e64 v19, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v27, 1.0, s27 -; SI-NEXT: v_mul_f32_e64 v29, 1.0, s20 -; SI-NEXT: v_mul_f32_e64 v21, 1.0, s26 -; SI-NEXT: v_mul_f32_e64 v26, 1.0, s21 -; SI-NEXT: v_mul_f32_e64 v52, 1.0, s25 -; SI-NEXT: v_mul_f32_e64 v31, 1.0, s22 -; SI-NEXT: v_mul_f32_e64 v14, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v30, 1.0, s23 -; SI-NEXT: v_mul_f32_e64 v45, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v60, 1.0, s15 -; SI-NEXT: v_mul_f32_e64 v20, 1.0, s12 -; SI-NEXT: v_mul_f32_e64 v33, 1.0, s13 -; SI-NEXT: v_mul_f32_e64 v35, 1.0, s10 -; SI-NEXT: v_mul_f32_e64 v49, 1.0, s11 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v34, 1.0, s9 -; SI-NEXT: v_mul_f32_e64 v54, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v40, 1.0, s7 -; SI-NEXT: v_mul_f32_e64 v22, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v2, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v7, 1.0, s41 +; SI-NEXT: v_mul_f32_e64 v12, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s40 +; SI-NEXT: v_mul_f32_e64 v2, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v15, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s18 +; SI-NEXT: v_mul_f32_e64 v44, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v14, 1.0, s19 +; SI-NEXT: v_mul_f32_e64 v19, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v20, 1.0, s20 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, s26 +; SI-NEXT: v_mul_f32_e64 v18, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v23, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v24, 1.0, s22 +; SI-NEXT: v_mul_f32_e64 v60, 1.0, s24 +; SI-NEXT: v_mul_f32_e64 v22, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v27, 1.0, s14 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v43, 1.0, s12 +; SI-NEXT: v_mul_f32_e64 v26, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v28, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v36, 1.0, s11 +; SI-NEXT: v_mul_f32_e64 v8, 1.0, s8 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v31, 1.0, s6 +; SI-NEXT: v_mul_f32_e64 v35, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v29, 1.0, s4 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s5 ; SI-NEXT: v_mul_f32_e64 v38, 1.0, s35 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s34 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s31 -; SI-NEXT: v_mul_f32_e64 v11, 1.0, s30 -; SI-NEXT: v_mul_f32_e64 v51, 1.0, vcc_hi -; SI-NEXT: v_mul_f32_e64 v50, 1.0, vcc_lo -; SI-NEXT: v_mul_f32_e64 v53, 1.0, s95 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s94 -; SI-NEXT: v_mul_f32_e64 v44, 1.0, s93 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s92 -; SI-NEXT: v_mul_f32_e64 v41, 1.0, s91 -; SI-NEXT: v_mul_f32_e64 v32, 1.0, s90 -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s89 -; SI-NEXT: v_mul_f32_e64 v59, 1.0, s88 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s79 -; SI-NEXT: v_mul_f32_e64 v17, 1.0, s78 -; SI-NEXT: v_mul_f32_e64 v3, 1.0, s77 -; SI-NEXT: v_mul_f32_e64 v1, 1.0, s76 -; SI-NEXT: v_mul_f32_e64 v58, 1.0, s75 -; SI-NEXT: v_mul_f32_e64 v23, 1.0, s74 -; SI-NEXT: v_mul_f32_e64 v6, 1.0, s73 -; SI-NEXT: v_mul_f32_e64 v36, 1.0, s72 -; SI-NEXT: v_mul_f32_e64 v5, 1.0, s63 -; SI-NEXT: v_mul_f32_e64 v28, 1.0, s62 -; SI-NEXT: v_mul_f32_e64 v43, 1.0, s61 -; SI-NEXT: v_mul_f32_e64 v13, 1.0, s60 -; SI-NEXT: v_mul_f32_e64 v12, 1.0, s59 -; SI-NEXT: v_mul_f32_e64 v55, 1.0, s58 -; SI-NEXT: v_mul_f32_e64 v18, 1.0, s47 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s45 -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v8, 1.0, s43 -; SI-NEXT: v_mul_f32_e64 v37, 1.0, s42 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s34 +; SI-NEXT: v_mul_f32_e64 v33, 1.0, s31 +; SI-NEXT: v_mul_f32_e64 v54, 1.0, s30 +; SI-NEXT: v_mul_f32_e64 v48, 1.0, vcc_hi +; SI-NEXT: v_mul_f32_e64 v52, 1.0, vcc_lo +; SI-NEXT: v_mul_f32_e64 v37, 1.0, s95 +; SI-NEXT: v_mul_f32_e64 v25, 1.0, s94 +; SI-NEXT: v_mul_f32_e64 v40, 1.0, s93 +; SI-NEXT: v_mul_f32_e64 v21, 1.0, s92 +; SI-NEXT: v_mul_f32_e64 v49, 1.0, s91 +; SI-NEXT: v_mul_f32_e64 v51, 1.0, s90 +; SI-NEXT: v_mul_f32_e64 v30, 1.0, s89 +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s88 +; SI-NEXT: v_mul_f32_e64 v53, 1.0, s79 +; SI-NEXT: v_mul_f32_e64 v55, 1.0, s78 +; SI-NEXT: v_mul_f32_e64 v5, 1.0, s77 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s76 +; SI-NEXT: v_mul_f32_e64 v41, 1.0, s75 +; SI-NEXT: v_mul_f32_e64 v9, 1.0, s74 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s73 +; SI-NEXT: v_mul_f32_e64 v13, 1.0, s72 +; SI-NEXT: v_mul_f32_e64 v45, 1.0, s63 +; SI-NEXT: v_mul_f32_e64 v17, 1.0, s62 +; SI-NEXT: v_mul_f32_e64 v6, 1.0, s61 +; SI-NEXT: v_mul_f32_e64 v59, 1.0, s59 +; SI-NEXT: v_mul_f32_e64 v11, 1.0, s58 +; SI-NEXT: v_mul_f32_e64 v4, 1.0, s47 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v34, 1.0, s45 +; SI-NEXT: v_mul_f32_e64 v32, 1.0, s44 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v3, 1.0, s43 +; SI-NEXT: v_mul_f32_e64 v10, 1.0, s42 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane ; SI-NEXT: ; implicit-def: $vgpr61 : SGPR spill to VGPR lane -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; SI-NEXT: s_cbranch_scc0 .LBB91_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_readfirstlane_b32 s4, v10 +; SI-NEXT: v_readfirstlane_b32 s4, v7 ; SI-NEXT: s_lshr_b32 s5, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v12 +; SI-NEXT: s_lshr_b64 s[96:97], s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v42 +; SI-NEXT: s_lshr_b32 s99, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s98, v2 +; SI-NEXT: s_lshr_b64 s[10:11], s[98:99], 16 +; SI-NEXT: s_mov_b32 s97, s10 +; SI-NEXT: s_lshr_b64 s[4:5], s[96:97], 24 +; SI-NEXT: v_writelane_b32 v62, s4, 4 +; SI-NEXT: v_writelane_b32 v62, s5, 5 +; SI-NEXT: s_lshr_b64 s[4:5], s[96:97], 16 +; SI-NEXT: v_writelane_b32 v62, s4, 2 +; SI-NEXT: v_writelane_b32 v62, s5, 3 +; SI-NEXT: s_lshr_b64 s[4:5], s[96:97], 8 +; SI-NEXT: v_writelane_b32 v62, s4, 0 +; SI-NEXT: v_writelane_b32 v62, s5, 1 ; SI-NEXT: v_readfirstlane_b32 s4, v15 -; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v7 -; SI-NEXT: s_lshr_b32 s7, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v24 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v25 +; SI-NEXT: v_readfirstlane_b32 s4, v16 ; SI-NEXT: s_lshr_b64 s[86:87], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v9 -; SI-NEXT: s_lshr_b32 s65, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v27 +; SI-NEXT: v_readfirstlane_b32 s4, v44 +; SI-NEXT: s_lshr_b32 s83, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s82, v14 +; SI-NEXT: s_lshr_b64 s[42:43], s[82:83], 16 +; SI-NEXT: s_mov_b32 s87, s42 +; SI-NEXT: s_lshr_b64 s[4:5], s[86:87], 24 +; SI-NEXT: v_writelane_b32 v62, s4, 10 +; SI-NEXT: v_writelane_b32 v62, s5, 11 +; SI-NEXT: s_lshr_b64 s[4:5], s[86:87], 16 +; SI-NEXT: v_writelane_b32 v62, s4, 8 +; SI-NEXT: v_writelane_b32 v62, s5, 9 +; SI-NEXT: s_lshr_b64 s[4:5], s[86:87], 8 +; SI-NEXT: v_writelane_b32 v62, s4, 6 +; SI-NEXT: v_writelane_b32 v62, s5, 7 +; SI-NEXT: v_readfirstlane_b32 s4, v19 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v29 -; SI-NEXT: v_mov_b32_e32 v10, v21 +; SI-NEXT: v_readfirstlane_b32 s4, v20 ; SI-NEXT: s_lshr_b64 s[80:81], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v10 +; SI-NEXT: v_readfirstlane_b32 s4, v56 ; SI-NEXT: s_lshr_b32 s69, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v52 -; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v31 -; SI-NEXT: s_lshr_b64 s[66:67], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v14 -; SI-NEXT: s_lshr_b32 s93, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v45 +; SI-NEXT: v_readfirstlane_b32 s68, v18 +; SI-NEXT: s_lshr_b64 s[54:55], s[68:69], 16 +; SI-NEXT: s_mov_b32 s81, s54 +; SI-NEXT: s_lshr_b64 s[4:5], s[80:81], 24 +; SI-NEXT: v_writelane_b32 v62, s4, 16 +; SI-NEXT: v_writelane_b32 v62, s5, 17 +; SI-NEXT: s_lshr_b64 s[4:5], s[80:81], 16 +; SI-NEXT: v_writelane_b32 v62, s4, 14 +; SI-NEXT: v_writelane_b32 v62, s5, 15 +; SI-NEXT: s_lshr_b64 s[4:5], s[80:81], 8 +; SI-NEXT: v_writelane_b32 v62, s4, 12 +; SI-NEXT: v_writelane_b32 v62, s5, 13 +; SI-NEXT: v_readfirstlane_b32 s4, v23 ; SI-NEXT: s_lshr_b32 s5, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v24 +; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16 ; SI-NEXT: v_readfirstlane_b32 s4, v60 -; SI-NEXT: s_lshr_b64 s[52:53], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v20 -; SI-NEXT: s_lshr_b32 s39, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v35 -; SI-NEXT: v_mov_b32_e32 v35, v49 +; SI-NEXT: s_lshr_b32 s27, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s26, v22 +; SI-NEXT: s_lshr_b64 s[38:39], s[26:27], 16 +; SI-NEXT: s_mov_b32 s65, s38 +; SI-NEXT: s_lshr_b64 s[4:5], s[64:65], 24 +; SI-NEXT: v_writelane_b32 v62, s4, 22 +; SI-NEXT: v_writelane_b32 v62, s5, 23 +; SI-NEXT: s_lshr_b64 s[4:5], s[64:65], 16 +; SI-NEXT: v_writelane_b32 v62, s4, 20 +; SI-NEXT: v_writelane_b32 v62, s5, 21 +; SI-NEXT: s_lshr_b64 s[4:5], s[64:65], 8 +; SI-NEXT: v_writelane_b32 v62, s4, 18 +; SI-NEXT: v_writelane_b32 v62, s5, 19 +; SI-NEXT: v_readfirstlane_b32 s4, v27 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v35 -; SI-NEXT: s_lshr_b64 s[34:35], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v56 -; SI-NEXT: v_mov_b32_e32 v52, v54 -; SI-NEXT: s_lshr_b32 s91, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v52 -; SI-NEXT: v_mov_b32_e32 v45, v40 +; SI-NEXT: v_readfirstlane_b32 s4, v46 +; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v43 +; SI-NEXT: s_lshr_b32 s85, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s84, v26 +; SI-NEXT: s_lshr_b64 s[34:35], s[84:85], 16 +; SI-NEXT: s_mov_b32 s51, s34 +; SI-NEXT: s_lshr_b64 s[4:5], s[50:51], 24 +; SI-NEXT: v_writelane_b32 v62, s4, 28 +; SI-NEXT: v_writelane_b32 v62, s5, 29 +; SI-NEXT: s_lshr_b64 s[4:5], s[50:51], 16 +; SI-NEXT: v_writelane_b32 v62, s4, 26 +; SI-NEXT: v_writelane_b32 v62, s5, 27 +; SI-NEXT: s_lshr_b64 s[4:5], s[50:51], 8 +; SI-NEXT: v_writelane_b32 v62, s4, 24 +; SI-NEXT: v_writelane_b32 v62, s5, 25 +; SI-NEXT: v_readfirstlane_b32 s4, v28 +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: v_mov_b32_e32 v28, v36 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v45 -; SI-NEXT: v_mov_b32_e32 v21, v22 -; SI-NEXT: v_readfirstlane_b32 s6, v4 -; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v21 -; SI-NEXT: v_mov_b32_e32 v4, v38 -; SI-NEXT: s_lshr_b32 s57, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v4 -; SI-NEXT: v_mov_b32_e32 v54, v42 +; SI-NEXT: v_readfirstlane_b32 s4, v28 +; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v8 +; SI-NEXT: s_lshr_b32 s19, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s18, v58 +; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16 +; SI-NEXT: s_mov_b32 s37, s90 +; SI-NEXT: s_lshr_b64 s[4:5], s[36:37], 24 +; SI-NEXT: v_writelane_b32 v62, s4, 34 +; SI-NEXT: v_writelane_b32 v62, s5, 35 +; SI-NEXT: s_lshr_b64 s[4:5], s[36:37], 16 +; SI-NEXT: v_writelane_b32 v62, s4, 32 +; SI-NEXT: v_writelane_b32 v62, s5, 33 +; SI-NEXT: s_lshr_b64 s[4:5], s[36:37], 8 +; SI-NEXT: v_writelane_b32 v62, s4, 30 +; SI-NEXT: v_writelane_b32 v62, s5, 31 +; SI-NEXT: v_readfirstlane_b32 s4, v31 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v54 -; SI-NEXT: v_mov_b32_e32 v22, v48 +; SI-NEXT: v_readfirstlane_b32 s4, v35 ; SI-NEXT: s_lshr_b64 s[94:95], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v22 -; SI-NEXT: v_mov_b32_e32 v40, v51 -; SI-NEXT: s_lshr_b32 s89, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v40 -; SI-NEXT: v_mov_b32_e32 v42, v50 -; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v42 -; SI-NEXT: v_mov_b32_e32 v49, v2 -; SI-NEXT: v_mov_b32_e32 v2, v11 -; SI-NEXT: s_lshr_b64 s[76:77], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v53 -; SI-NEXT: v_mov_b32_e32 v11, v44 +; SI-NEXT: v_readfirstlane_b32 s4, v29 +; SI-NEXT: v_mov_b32_e32 v16, v50 ; SI-NEXT: s_lshr_b32 s73, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v11 -; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v47 -; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v41 -; SI-NEXT: s_lshr_b32 s59, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v57 +; SI-NEXT: v_readfirstlane_b32 s72, v16 +; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16 +; SI-NEXT: s_mov_b32 s95, s76 +; SI-NEXT: v_mov_b32_e32 v15, v54 +; SI-NEXT: v_mov_b32_e32 v54, v21 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: s_lshr_b64 s[4:5], s[94:95], 24 +; SI-NEXT: v_writelane_b32 v62, s4, 40 +; SI-NEXT: v_writelane_b32 v62, s5, 41 +; SI-NEXT: s_lshr_b64 s[4:5], s[94:95], 16 +; SI-NEXT: v_writelane_b32 v62, s4, 38 +; SI-NEXT: v_writelane_b32 v62, s5, 39 +; SI-NEXT: s_lshr_b64 s[4:5], s[94:95], 8 +; SI-NEXT: v_writelane_b32 v62, s4, 36 +; SI-NEXT: v_writelane_b32 v62, s5, 37 +; SI-NEXT: v_readfirstlane_b32 s4, v38 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v59 +; SI-NEXT: v_readfirstlane_b32 s4, v39 +; SI-NEXT: s_lshr_b64 s[88:89], s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v33 +; SI-NEXT: s_lshr_b32 s13, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s12, v15 +; SI-NEXT: s_lshr_b64 s[92:93], s[12:13], 16 +; SI-NEXT: v_mov_b32_e32 v14, v25 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_mov_b32 s89, s92 +; SI-NEXT: v_mov_b32_e32 v12, v51 +; SI-NEXT: v_mov_b32_e32 v51, v55 +; SI-NEXT: v_mov_b32_e32 v55, v9 +; SI-NEXT: v_mov_b32_e32 v9, v17 +; SI-NEXT: v_mov_b32_e32 v17, v11 +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: s_lshr_b64 s[4:5], s[88:89], 24 +; SI-NEXT: v_writelane_b32 v62, s4, 46 +; SI-NEXT: v_writelane_b32 v62, s5, 47 +; SI-NEXT: s_lshr_b64 s[4:5], s[88:89], 16 +; SI-NEXT: v_writelane_b32 v62, s4, 44 +; SI-NEXT: v_writelane_b32 v62, s5, 45 +; SI-NEXT: s_lshr_b64 s[4:5], s[88:89], 8 +; SI-NEXT: v_writelane_b32 v62, s4, 42 +; SI-NEXT: v_writelane_b32 v62, s5, 43 +; SI-NEXT: v_readfirstlane_b32 s4, v48 +; SI-NEXT: v_mov_b32_e32 v50, v52 +; SI-NEXT: s_lshr_b32 s5, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v50 +; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v37 +; SI-NEXT: s_lshr_b32 s71, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s70, v14 +; SI-NEXT: s_lshr_b64 s[62:63], s[70:71], 16 +; SI-NEXT: s_mov_b32 s75, s62 +; SI-NEXT: s_lshr_b64 s[4:5], s[74:75], 24 +; SI-NEXT: v_writelane_b32 v62, s4, 52 +; SI-NEXT: v_mov_b32_e32 v52, v40 +; SI-NEXT: v_mov_b32_e32 v40, v30 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_writelane_b32 v62, s5, 53 +; SI-NEXT: s_lshr_b64 s[4:5], s[74:75], 16 +; SI-NEXT: v_writelane_b32 v62, s4, 50 +; SI-NEXT: v_writelane_b32 v62, s5, 51 +; SI-NEXT: s_lshr_b64 s[4:5], s[74:75], 8 +; SI-NEXT: v_writelane_b32 v62, s4, 48 +; SI-NEXT: v_writelane_b32 v62, s5, 49 +; SI-NEXT: v_readfirstlane_b32 s4, v52 +; SI-NEXT: s_lshr_b32 s5, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v54 +; SI-NEXT: s_lshr_b64 s[60:61], s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v49 +; SI-NEXT: s_lshr_b32 s59, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s58, v12 +; SI-NEXT: s_lshr_b64 s[78:79], s[58:59], 16 +; SI-NEXT: s_mov_b32 s61, s78 +; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 24 +; SI-NEXT: v_writelane_b32 v62, s4, 58 +; SI-NEXT: v_writelane_b32 v62, s5, 59 +; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 16 +; SI-NEXT: v_writelane_b32 v62, s4, 56 +; SI-NEXT: v_writelane_b32 v62, s5, 57 +; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 8 +; SI-NEXT: v_writelane_b32 v62, s4, 54 +; SI-NEXT: v_writelane_b32 v62, s5, 55 +; SI-NEXT: v_readfirstlane_b32 s4, v40 +; SI-NEXT: v_mov_b32_e32 v2, v1 +; SI-NEXT: s_lshr_b32 s5, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v2 ; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v46 +; SI-NEXT: v_readfirstlane_b32 s4, v53 ; SI-NEXT: s_lshr_b32 s45, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v3 +; SI-NEXT: v_readfirstlane_b32 s44, v51 +; SI-NEXT: s_lshr_b64 s[56:57], s[44:45], 16 +; SI-NEXT: s_mov_b32 s47, s56 +; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 24 +; SI-NEXT: v_writelane_b32 v61, s4, 0 +; SI-NEXT: v_writelane_b32 v61, s5, 1 +; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 16 +; SI-NEXT: v_writelane_b32 v62, s4, 62 +; SI-NEXT: v_writelane_b32 v62, s5, 63 +; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 8 +; SI-NEXT: v_writelane_b32 v62, s4, 60 +; SI-NEXT: v_writelane_b32 v62, s5, 61 +; SI-NEXT: v_readfirstlane_b32 s4, v5 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v1 -; SI-NEXT: v_mov_b32_e32 v44, v32 +; SI-NEXT: v_readfirstlane_b32 s4, v47 ; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v58 -; SI-NEXT: v_mov_b32_e32 v32, v13 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: v_readfirstlane_b32 s4, v41 ; SI-NEXT: s_lshr_b32 s29, s4, 16 -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_mov_b32_e32 v1, v9 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v9, v6 -; SI-NEXT: v_readfirstlane_b32 s4, v6 -; SI-NEXT: v_mov_b32_e32 v6, v36 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: v_readfirstlane_b32 s28, v55 +; SI-NEXT: s_lshr_b64 s[48:49], s[28:29], 16 +; SI-NEXT: s_mov_b32 s41, s48 +; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 24 +; SI-NEXT: v_writelane_b32 v61, s4, 6 +; SI-NEXT: v_writelane_b32 v61, s5, 7 +; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 16 +; SI-NEXT: v_writelane_b32 v61, s4, 4 +; SI-NEXT: v_writelane_b32 v61, s5, 5 +; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 8 +; SI-NEXT: v_writelane_b32 v61, s4, 2 +; SI-NEXT: v_writelane_b32 v61, s5, 3 +; SI-NEXT: v_readfirstlane_b32 s4, v57 ; SI-NEXT: s_lshr_b32 s5, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v13 +; SI-NEXT: s_lshr_b64 s[22:23], s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v45 +; SI-NEXT: s_lshr_b32 s7, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s6, v9 +; SI-NEXT: s_mov_b32 s5, s7 +; SI-NEXT: s_lshr_b64 s[30:31], s[6:7], 16 +; SI-NEXT: v_writelane_b32 v61, s4, 14 +; SI-NEXT: s_mov_b32 s23, s30 +; SI-NEXT: v_writelane_b32 v61, s5, 15 +; SI-NEXT: s_lshr_b64 s[4:5], s[22:23], 24 +; SI-NEXT: v_writelane_b32 v61, s4, 12 +; SI-NEXT: v_writelane_b32 v61, s5, 13 +; SI-NEXT: s_lshr_b64 s[4:5], s[22:23], 16 +; SI-NEXT: v_writelane_b32 v61, s4, 10 +; SI-NEXT: v_writelane_b32 v61, s5, 11 +; SI-NEXT: s_lshr_b64 s[4:5], s[22:23], 8 +; SI-NEXT: v_writelane_b32 v61, s4, 8 +; SI-NEXT: v_writelane_b32 v61, s5, 9 ; SI-NEXT: v_readfirstlane_b32 s4, v6 -; SI-NEXT: v_mov_b32_e32 v3, v23 -; SI-NEXT: s_lshr_b64 s[24:25], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v5 -; SI-NEXT: v_mov_b32_e32 v23, v43 -; SI-NEXT: s_lshr_b32 s23, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v23 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v32 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_readfirstlane_b32 s4, v21 ; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v12 -; SI-NEXT: s_lshr_b32 s19, s4, 16 -; SI-NEXT: s_lshr_b64 s[96:97], s[6:7], 16 -; SI-NEXT: s_mov_b32 s9, s96 -; SI-NEXT: v_readfirstlane_b32 s90, v34 -; SI-NEXT: s_lshr_b64 s[82:83], s[90:91], 16 -; SI-NEXT: v_readfirstlane_b32 s64, v19 -; SI-NEXT: s_lshr_b64 s[84:85], s[64:65], 16 -; SI-NEXT: s_mov_b32 s87, s84 -; SI-NEXT: v_readfirstlane_b32 s68, v26 -; SI-NEXT: s_lshr_b64 s[70:71], s[68:69], 16 -; SI-NEXT: s_mov_b32 s81, s70 -; SI-NEXT: v_readfirstlane_b32 s92, v30 -; SI-NEXT: s_lshr_b64 s[48:49], s[92:93], 16 -; SI-NEXT: s_mov_b32 s67, s48 -; SI-NEXT: v_readfirstlane_b32 s38, v33 -; SI-NEXT: s_lshr_b64 s[98:99], s[38:39], 16 -; SI-NEXT: s_mov_b32 s53, s98 -; SI-NEXT: s_mov_b32 s35, s82 -; SI-NEXT: v_readfirstlane_b32 s56, v49 -; SI-NEXT: s_lshr_b64 s[30:31], s[56:57], 16 -; SI-NEXT: s_mov_b32 s79, s30 -; SI-NEXT: v_readfirstlane_b32 s88, v2 -; SI-NEXT: s_lshr_b64 s[74:75], s[88:89], 16 -; SI-NEXT: s_mov_b32 s95, s74 -; SI-NEXT: v_mov_b32_e32 v38, v16 -; SI-NEXT: v_readfirstlane_b32 s72, v38 -; SI-NEXT: s_lshr_b64 s[60:61], s[72:73], 16 -; SI-NEXT: s_mov_b32 s77, s60 -; SI-NEXT: v_readfirstlane_b32 s58, v44 -; SI-NEXT: s_lshr_b64 s[54:55], s[58:59], 16 -; SI-NEXT: s_mov_b32 s63, s54 -; SI-NEXT: v_mov_b32_e32 v15, v17 -; SI-NEXT: v_readfirstlane_b32 s44, v15 -; SI-NEXT: s_lshr_b64 s[42:43], s[44:45], 16 -; SI-NEXT: s_mov_b32 s47, s42 -; SI-NEXT: v_readfirstlane_b32 s28, v3 -; SI-NEXT: s_lshr_b64 s[26:27], s[28:29], 16 -; SI-NEXT: s_mov_b32 s41, s26 -; SI-NEXT: v_mov_b32_e32 v17, v28 -; SI-NEXT: v_readfirstlane_b32 s22, v17 -; SI-NEXT: s_lshr_b64 s[36:37], s[22:23], 16 -; SI-NEXT: s_mov_b32 s25, s36 -; SI-NEXT: v_mov_b32_e32 v28, v55 -; SI-NEXT: v_readfirstlane_b32 s18, v28 -; SI-NEXT: s_lshr_b64 s[14:15], s[18:19], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v59 +; SI-NEXT: s_lshr_b32 s67, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s66, v17 +; SI-NEXT: s_lshr_b64 s[14:15], s[66:67], 16 ; SI-NEXT: s_mov_b32 s17, s14 -; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v7 -; SI-NEXT: v_lshrrev_b32_e32 v24, 24, v1 -; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v20 -; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v53 -; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v8 -; SI-NEXT: s_lshr_b32 s88, s96, 8 -; SI-NEXT: s_lshr_b32 s61, s84, 8 -; SI-NEXT: s_lshr_b32 s72, s70, 8 -; SI-NEXT: s_lshr_b32 s75, s48, 8 -; SI-NEXT: s_lshr_b32 s58, s98, 8 -; SI-NEXT: s_lshr_b32 s43, s82, 8 -; SI-NEXT: s_lshr_b32 s44, s30, 8 -; SI-NEXT: s_mov_b32 s64, s74 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_readfirstlane_b32 s4, v13 -; SI-NEXT: s_lshr_b32 s5, s4, 16 +; SI-NEXT: s_lshr_b64 s[4:5], s[16:17], 24 +; SI-NEXT: v_writelane_b32 v61, s4, 20 +; SI-NEXT: v_writelane_b32 v61, s5, 21 +; SI-NEXT: s_lshr_b64 s[4:5], s[16:17], 16 +; SI-NEXT: v_writelane_b32 v61, s4, 18 +; SI-NEXT: v_writelane_b32 v61, s5, 19 +; SI-NEXT: s_lshr_b64 s[4:5], s[16:17], 8 +; SI-NEXT: v_writelane_b32 v61, s4, 16 +; SI-NEXT: v_writelane_b32 v61, s5, 17 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_readfirstlane_b32 s12, v48 -; SI-NEXT: s_lshr_b32 s27, s74, 8 -; SI-NEXT: s_mov_b32 s92, s60 -; SI-NEXT: s_lshr_b32 s28, s60, 8 -; SI-NEXT: s_lshr_b32 s74, s54, 8 -; SI-NEXT: s_mov_b32 s68, s42 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_readfirstlane_b32 s4, v36 -; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v18 -; SI-NEXT: s_lshr_b32 s13, s4, 16 -; SI-NEXT: s_mov_b32 s5, s13 +; SI-NEXT: v_readfirstlane_b32 s4, v25 +; SI-NEXT: s_lshr_b32 s5, s4, 16 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_readfirstlane_b32 s4, v11 +; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v4 +; SI-NEXT: s_lshr_b32 s53, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s52, v10 +; SI-NEXT: s_lshr_b64 s[20:21], s[52:53], 16 +; SI-NEXT: s_mov_b32 s9, s20 +; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 24 ; SI-NEXT: v_writelane_b32 v61, s4, 26 ; SI-NEXT: v_writelane_b32 v61, s5, 27 -; SI-NEXT: v_readfirstlane_b32 s4, v39 +; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 16 +; SI-NEXT: v_writelane_b32 v61, s4, 24 +; SI-NEXT: v_writelane_b32 v61, s5, 25 +; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 8 +; SI-NEXT: v_writelane_b32 v61, s4, 22 +; SI-NEXT: v_writelane_b32 v61, s5, 23 +; SI-NEXT: v_readfirstlane_b32 s4, v34 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v51 -; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s5, v8 -; SI-NEXT: s_lshr_b64 s[20:21], s[12:13], 16 -; SI-NEXT: s_lshr_b32 s13, s5, 16 -; SI-NEXT: v_readfirstlane_b32 s12, v37 -; SI-NEXT: s_lshr_b64 vcc, s[12:13], 16 -; SI-NEXT: s_mov_b32 s5, vcc_lo -; SI-NEXT: s_mov_b32 s90, vcc_lo -; SI-NEXT: s_lshr_b32 s6, vcc_lo, 8 -; SI-NEXT: s_lshr_b64 vcc, s[8:9], 24 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 4 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 5 -; SI-NEXT: s_lshr_b64 vcc, s[8:9], 16 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 2 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 3 -; SI-NEXT: s_lshr_b64 vcc, s[8:9], 8 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 0 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 1 -; SI-NEXT: s_lshr_b64 vcc, s[86:87], 24 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 10 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 11 -; SI-NEXT: s_lshr_b64 vcc, s[86:87], 16 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 8 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 9 -; SI-NEXT: s_lshr_b64 vcc, s[86:87], 8 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 6 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 7 -; SI-NEXT: s_lshr_b64 vcc, s[80:81], 24 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 16 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 17 -; SI-NEXT: s_lshr_b64 vcc, s[80:81], 16 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 14 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 15 -; SI-NEXT: s_lshr_b64 vcc, s[80:81], 8 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 12 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 13 -; SI-NEXT: s_lshr_b64 vcc, s[66:67], 24 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 22 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 23 -; SI-NEXT: s_lshr_b64 vcc, s[66:67], 16 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 20 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 21 -; SI-NEXT: s_lshr_b64 vcc, s[66:67], 8 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 18 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 19 -; SI-NEXT: s_lshr_b64 vcc, s[52:53], 24 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 28 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 29 -; SI-NEXT: s_lshr_b64 vcc, s[52:53], 16 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 26 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 27 -; SI-NEXT: s_lshr_b64 vcc, s[52:53], 8 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 24 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 25 -; SI-NEXT: s_lshr_b64 vcc, s[34:35], 24 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 34 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 35 -; SI-NEXT: s_lshr_b64 vcc, s[34:35], 16 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 32 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 33 -; SI-NEXT: s_lshr_b64 vcc, s[34:35], 8 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 30 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 31 -; SI-NEXT: s_lshr_b64 vcc, s[78:79], 24 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 40 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 41 -; SI-NEXT: s_lshr_b64 vcc, s[78:79], 16 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 38 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 39 -; SI-NEXT: s_lshr_b64 vcc, s[78:79], 8 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 36 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 37 -; SI-NEXT: s_lshr_b64 vcc, s[94:95], 24 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 46 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 47 -; SI-NEXT: s_lshr_b64 vcc, s[94:95], 16 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 44 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 45 -; SI-NEXT: s_lshr_b64 vcc, s[94:95], 8 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 42 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 43 -; SI-NEXT: s_lshr_b64 vcc, s[76:77], 24 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 52 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 53 -; SI-NEXT: s_lshr_b64 vcc, s[76:77], 16 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 50 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 51 -; SI-NEXT: s_lshr_b64 vcc, s[76:77], 8 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 48 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 49 -; SI-NEXT: s_lshr_b64 vcc, s[62:63], 24 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 58 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 59 -; SI-NEXT: s_lshr_b64 vcc, s[62:63], 16 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 56 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 57 -; SI-NEXT: s_lshr_b64 vcc, s[62:63], 8 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 54 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 55 -; SI-NEXT: s_lshr_b64 vcc, s[46:47], 24 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 0 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 1 -; SI-NEXT: s_lshr_b64 vcc, s[46:47], 16 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 62 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 63 -; SI-NEXT: s_lshr_b64 vcc, s[46:47], 8 -; SI-NEXT: v_writelane_b32 v62, vcc_lo, 60 -; SI-NEXT: v_writelane_b32 v62, vcc_hi, 61 -; SI-NEXT: s_lshr_b64 vcc, s[40:41], 24 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 6 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 7 -; SI-NEXT: s_lshr_b64 vcc, s[40:41], 16 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 4 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 5 -; SI-NEXT: s_lshr_b64 vcc, s[40:41], 8 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 2 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 3 -; SI-NEXT: s_lshr_b64 vcc, s[24:25], 24 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 12 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 13 -; SI-NEXT: s_lshr_b64 vcc, s[24:25], 16 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 10 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 11 -; SI-NEXT: s_lshr_b64 vcc, s[24:25], 8 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 8 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 9 -; SI-NEXT: s_lshr_b64 vcc, s[16:17], 24 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 18 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 19 -; SI-NEXT: s_lshr_b64 vcc, s[16:17], 16 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 16 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 17 -; SI-NEXT: s_lshr_b64 vcc, s[16:17], 8 -; SI-NEXT: s_mov_b32 s11, s20 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 14 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 15 -; SI-NEXT: s_lshr_b64 vcc, s[10:11], 24 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 24 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 25 -; SI-NEXT: s_lshr_b64 vcc, s[10:11], 16 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 22 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 23 -; SI-NEXT: s_lshr_b64 vcc, s[10:11], 8 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 20 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 21 -; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 32 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 33 +; SI-NEXT: v_readfirstlane_b32 s4, v32 +; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v3 +; SI-NEXT: s_lshr_b32 s5, s4, 16 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_readfirstlane_b32 s4, v30 ; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 30 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 31 -; SI-NEXT: s_lshr_b64 vcc, s[4:5], 8 -; SI-NEXT: v_writelane_b32 v61, vcc_lo, 28 -; SI-NEXT: s_lshr_b32 s22, s42, 8 -; SI-NEXT: s_mov_b32 s56, s26 -; SI-NEXT: s_lshr_b32 s21, s26, 8 -; SI-NEXT: s_lshr_b32 s18, s36, 8 -; SI-NEXT: s_mov_b32 s38, s14 -; SI-NEXT: s_lshr_b32 s15, s14, 8 +; SI-NEXT: s_mov_b32 s7, vcc_lo +; SI-NEXT: s_lshr_b64 s[24:25], s[6:7], 24 +; SI-NEXT: v_writelane_b32 v61, s24, 32 +; SI-NEXT: v_writelane_b32 v61, s25, 33 +; SI-NEXT: s_lshr_b64 s[24:25], s[6:7], 16 +; SI-NEXT: v_writelane_b32 v61, s24, 30 +; SI-NEXT: v_writelane_b32 v61, s25, 31 +; SI-NEXT: s_lshr_b64 s[24:25], s[6:7], 8 +; SI-NEXT: v_writelane_b32 v61, s24, 28 +; SI-NEXT: v_lshrrev_b32_e32 v20, 24, v8 +; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v37 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_lshrrev_b32_e32 v8, 24, v59 +; SI-NEXT: v_writelane_b32 v61, s25, 29 +; SI-NEXT: s_lshr_b32 s44, s10, 8 +; SI-NEXT: s_mov_b32 s82, s42 +; SI-NEXT: s_lshr_b32 s42, s42, 8 +; SI-NEXT: s_lshr_b32 s41, s54, 8 +; SI-NEXT: s_lshr_b32 s28, s38, 8 +; SI-NEXT: s_lshr_b32 s26, s34, 8 +; SI-NEXT: s_lshr_b32 s24, s90, 8 +; SI-NEXT: s_lshr_b32 s23, s76, 8 +; SI-NEXT: s_lshr_b32 s21, s92, 8 +; SI-NEXT: s_lshr_b32 s18, s62, 8 +; SI-NEXT: s_lshr_b32 s17, s78, 8 +; SI-NEXT: s_mov_b32 s68, s56 +; SI-NEXT: s_lshr_b32 s15, s56, 8 +; SI-NEXT: s_lshr_b32 s12, s48, 8 +; SI-NEXT: s_lshr_b32 s11, s30, 8 +; SI-NEXT: s_mov_b32 s52, s14 +; SI-NEXT: s_lshr_b32 s9, s14, 8 ; SI-NEXT: s_mov_b32 s14, s20 -; SI-NEXT: s_lshr_b32 s12, s20, 8 -; SI-NEXT: v_writelane_b32 v61, vcc_hi, 29 +; SI-NEXT: s_lshr_b32 s7, s20, 8 +; SI-NEXT: s_mov_b32 s20, vcc_lo +; SI-NEXT: s_lshr_b32 s4, vcc_lo, 8 ; SI-NEXT: s_mov_b64 vcc, 0 -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v10 -; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v14 -; SI-NEXT: v_lshrrev_b32_e32 v55, 24, v56 -; SI-NEXT: v_lshrrev_b32_e32 v50, 24, v21 -; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v22 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v41 -; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v46 -; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v58 -; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v5 -; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v12 -; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v18 -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v20, v35 -; SI-NEXT: v_mov_b32_e32 v14, v52 -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_mov_b32_e32 v37, v45 -; SI-NEXT: v_mov_b32_e32 v45, v2 +; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v42 +; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v44 +; SI-NEXT: v_lshrrev_b32_e32 v24, 24, v56 +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v60 +; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v43 +; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v29 +; SI-NEXT: v_lshrrev_b32_e32 v18, 24, v33 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v58, v39 +; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v49 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v39, v4 -; SI-NEXT: v_mov_b32_e32 v52, v44 -; SI-NEXT: v_mov_b32_e32 v44, v11 -; SI-NEXT: v_mov_b32_e32 v35, v3 +; SI-NEXT: v_mov_b32_e32 v32, v35 +; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v53 +; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v41 +; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v45 +; SI-NEXT: v_mov_b32_e32 v46, v31 +; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v4 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v1, v17 -; SI-NEXT: v_mov_b32_e32 v11, v6 -; SI-NEXT: v_mov_b32_e32 v6, v10 -; SI-NEXT: v_mov_b32_e32 v10, v7 -; SI-NEXT: v_mov_b32_e32 v17, v28 -; SI-NEXT: v_mov_b32_e32 v16, v23 -; SI-NEXT: v_mov_b32_e32 v23, v32 -; SI-NEXT: v_mov_b32_e32 v28, v48 -; SI-NEXT: v_mov_b32_e32 v32, v13 -; SI-NEXT: v_mov_b32_e32 v48, v22 -; SI-NEXT: v_mov_b32_e32 v7, v5 -; SI-NEXT: v_mov_b32_e32 v2, v12 -; SI-NEXT: v_mov_b32_e32 v3, v18 +; SI-NEXT: v_mov_b32_e32 v34, v38 +; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v3 +; SI-NEXT: v_mov_b32_e32 v29, v36 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v1, v2 +; SI-NEXT: v_mov_b32_e32 v2, v8 ; SI-NEXT: s_branch .LBB91_3 ; SI-NEXT: .LBB91_2: ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v37, v40 +; SI-NEXT: v_mov_b32_e32 v16, v50 ; SI-NEXT: v_writelane_b32 v62, s4, 0 ; SI-NEXT: v_writelane_b32 v62, s5, 1 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v45, v11 +; SI-NEXT: v_mov_b32_e32 v15, v54 ; SI-NEXT: v_writelane_b32 v62, s4, 2 ; SI-NEXT: v_writelane_b32 v62, s5, 3 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v40, v51 +; SI-NEXT: v_mov_b32_e32 v14, v25 ; SI-NEXT: v_writelane_b32 v62, s4, 4 ; SI-NEXT: v_writelane_b32 v62, s5, 5 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v52, v32 +; SI-NEXT: v_mov_b32_e32 v50, v52 ; SI-NEXT: v_writelane_b32 v62, s4, 6 ; SI-NEXT: v_writelane_b32 v62, s5, 7 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v1, v28 +; SI-NEXT: v_mov_b32_e32 v12, v51 ; SI-NEXT: v_writelane_b32 v62, s4, 8 ; SI-NEXT: v_writelane_b32 v62, s5, 9 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v11, v36 +; SI-NEXT: v_mov_b32_e32 v52, v40 ; SI-NEXT: v_writelane_b32 v62, s4, 10 ; SI-NEXT: v_writelane_b32 v62, s5, 11 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v54, v21 ; SI-NEXT: v_writelane_b32 v62, s4, 12 ; SI-NEXT: v_writelane_b32 v62, s5, 13 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v51, v55 +; SI-NEXT: v_mov_b32_e32 v40, v30 +; SI-NEXT: v_mov_b32_e32 v55, v9 +; SI-NEXT: v_mov_b32_e32 v9, v17 +; SI-NEXT: v_mov_b32_e32 v17, v11 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr8 +; SI-NEXT: ; kill: killed $vgpr8 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: v_writelane_b32 v62, s4, 14 ; SI-NEXT: v_writelane_b32 v62, s5, 15 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr21 -; SI-NEXT: ; implicit-def: $sgpr20 -; SI-NEXT: ; implicit-def: $sgpr91 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: v_mov_b32_e32 v9, v6 +; SI-NEXT: s_mov_b64 vcc, -1 ; SI-NEXT: v_writelane_b32 v62, s4, 16 ; SI-NEXT: v_writelane_b32 v62, s5, 17 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: s_mov_b64 vcc, -1 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: v_mov_b32_e32 v58, v39 ; SI-NEXT: v_writelane_b32 v62, s4, 18 ; SI-NEXT: v_writelane_b32 v62, s5, 19 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v20, v49 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mov_b32_e32 v32, v35 ; SI-NEXT: v_writelane_b32 v62, s4, 20 ; SI-NEXT: v_writelane_b32 v62, s5, 21 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v49, v2 +; SI-NEXT: v_mov_b32_e32 v46, v31 ; SI-NEXT: v_writelane_b32 v62, s4, 22 ; SI-NEXT: v_writelane_b32 v62, s5, 23 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v14, v54 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v34, v38 ; SI-NEXT: v_writelane_b32 v62, s4, 24 ; SI-NEXT: v_writelane_b32 v62, s5, 25 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v39, v38 +; SI-NEXT: v_mov_b32_e32 v29, v36 ; SI-NEXT: v_writelane_b32 v62, s4, 26 ; SI-NEXT: v_writelane_b32 v62, s5, 27 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v54, v42 +; SI-NEXT: ; implicit-def: $sgpr96 +; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr99 +; SI-NEXT: ; implicit-def: $sgpr86 +; SI-NEXT: ; implicit-def: $sgpr82 +; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr83 +; SI-NEXT: ; implicit-def: $sgpr80 +; SI-NEXT: ; implicit-def: $sgpr54 +; SI-NEXT: ; implicit-def: $sgpr41 +; SI-NEXT: ; implicit-def: $sgpr69 +; SI-NEXT: ; implicit-def: $sgpr64 +; SI-NEXT: ; implicit-def: $sgpr38 +; SI-NEXT: ; implicit-def: $sgpr28 +; SI-NEXT: ; implicit-def: $sgpr27 +; SI-NEXT: ; implicit-def: $sgpr50 +; SI-NEXT: ; implicit-def: $sgpr34 +; SI-NEXT: ; implicit-def: $sgpr26 +; SI-NEXT: ; implicit-def: $sgpr85 +; SI-NEXT: ; implicit-def: $sgpr36 +; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr24 +; SI-NEXT: ; implicit-def: $sgpr19 +; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: ; implicit-def: $sgpr23 +; SI-NEXT: ; implicit-def: $sgpr73 +; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr21 +; SI-NEXT: ; implicit-def: $sgpr13 +; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr18 +; SI-NEXT: ; implicit-def: $sgpr71 +; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr17 +; SI-NEXT: ; implicit-def: $sgpr59 +; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr68 +; SI-NEXT: ; implicit-def: $sgpr15 +; SI-NEXT: ; implicit-def: $sgpr45 +; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr29 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: ; implicit-def: $sgpr30 +; SI-NEXT: ; implicit-def: $sgpr11 +; SI-NEXT: ; implicit-def: $sgpr16 +; SI-NEXT: ; implicit-def: $sgpr52 +; SI-NEXT: ; implicit-def: $sgpr9 +; SI-NEXT: ; implicit-def: $sgpr67 +; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr7 +; SI-NEXT: ; implicit-def: $sgpr53 +; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr20 +; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr26 +; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr22 +; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr18 +; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: ; implicit-def: $vgpr6 +; SI-NEXT: ; implicit-def: $vgpr2 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: v_writelane_b32 v62, s4, 28 ; SI-NEXT: v_writelane_b32 v62, s5, 29 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v38, v16 ; SI-NEXT: v_writelane_b32 v62, s4, 30 ; SI-NEXT: v_writelane_b32 v62, s5, 31 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v42, v50 ; SI-NEXT: v_writelane_b32 v62, s4, 32 ; SI-NEXT: v_writelane_b32 v62, s5, 33 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v15, v17 ; SI-NEXT: v_writelane_b32 v62, s4, 34 ; SI-NEXT: v_writelane_b32 v62, s5, 35 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v35, v23 ; SI-NEXT: v_writelane_b32 v62, s4, 36 ; SI-NEXT: v_writelane_b32 v62, s5, 37 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v6, v21 ; SI-NEXT: v_writelane_b32 v62, s4, 38 ; SI-NEXT: v_writelane_b32 v62, s5, 39 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v17, v55 ; SI-NEXT: v_writelane_b32 v62, s4, 40 ; SI-NEXT: v_writelane_b32 v62, s5, 41 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v16, v43 ; SI-NEXT: v_writelane_b32 v62, s4, 42 ; SI-NEXT: v_writelane_b32 v62, s5, 43 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v23, v13 ; SI-NEXT: v_writelane_b32 v62, s4, 44 ; SI-NEXT: v_writelane_b32 v62, s5, 45 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v21, v22 ; SI-NEXT: v_writelane_b32 v62, s4, 46 ; SI-NEXT: v_writelane_b32 v62, s5, 47 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v7, v5 ; SI-NEXT: v_writelane_b32 v62, s4, 48 ; SI-NEXT: v_writelane_b32 v62, s5, 49 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v2, v12 ; SI-NEXT: v_writelane_b32 v62, s4, 50 ; SI-NEXT: v_writelane_b32 v62, s5, 51 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_mov_b32_e32 v3, v18 ; SI-NEXT: v_writelane_b32 v62, s4, 52 ; SI-NEXT: v_writelane_b32 v62, s5, 53 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr96 -; SI-NEXT: ; implicit-def: $sgpr88 -; SI-NEXT: ; implicit-def: $sgpr7 -; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $sgpr86 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: ; implicit-def: $sgpr61 -; SI-NEXT: ; implicit-def: $sgpr65 -; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: ; implicit-def: $sgpr80 -; SI-NEXT: ; implicit-def: $sgpr70 -; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr69 -; SI-NEXT: ; implicit-def: $vgpr19 -; SI-NEXT: ; implicit-def: $sgpr66 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr75 -; SI-NEXT: ; implicit-def: $sgpr93 -; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr98 -; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $vgpr10 -; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr82 -; SI-NEXT: ; implicit-def: $sgpr43 -; SI-NEXT: ; implicit-def: $sgpr78 -; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr27 -; SI-NEXT: ; implicit-def: $sgpr28 -; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $sgpr22 -; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr31 -; SI-NEXT: ; implicit-def: $sgpr18 -; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: ; implicit-def: $sgpr15 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: ; kill: killed $vgpr26 -; SI-NEXT: ; implicit-def: $sgpr30 -; SI-NEXT: ; implicit-def: $sgpr57 -; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr89 -; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr92 -; SI-NEXT: ; implicit-def: $sgpr73 -; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr59 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; implicit-def: $sgpr45 -; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr29 -; SI-NEXT: ; implicit-def: $sgpr24 -; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr23 -; SI-NEXT: ; implicit-def: $sgpr16 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr19 -; SI-NEXT: ; implicit-def: $sgpr10 -; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr13 -; SI-NEXT: ; implicit-def: $vgpr60 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr55 ; SI-NEXT: v_writelane_b32 v62, s4, 54 ; SI-NEXT: v_writelane_b32 v62, s5, 55 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -157838,7 +157945,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v61, s4, 12 ; SI-NEXT: v_writelane_b32 v61, s5, 13 -; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr5 ; SI-NEXT: v_writelane_b32 v61, s4, 14 ; SI-NEXT: v_writelane_b32 v61, s5, 15 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -157856,391 +157963,376 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v61, s4, 24 ; SI-NEXT: v_writelane_b32 v61, s5, 25 -; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v61, s4, 26 ; SI-NEXT: v_writelane_b32 v61, s5, 27 -; SI-NEXT: v_writelane_b32 v61, s20, 28 -; SI-NEXT: v_writelane_b32 v61, s21, 29 -; SI-NEXT: ; implicit-def: $sgpr20 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v61, s20, 30 -; SI-NEXT: v_writelane_b32 v61, s21, 31 -; SI-NEXT: v_writelane_b32 v61, s90, 32 -; SI-NEXT: v_writelane_b32 v61, s91, 33 -; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: v_writelane_b32 v61, s4, 28 +; SI-NEXT: v_writelane_b32 v61, s5, 29 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v61, s4, 30 +; SI-NEXT: v_writelane_b32 v61, s5, 31 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v61, s4, 32 +; SI-NEXT: v_writelane_b32 v61, s5, 33 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr5 ; SI-NEXT: .LBB91_3: ; %Flow -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_andn2_b64 vcc, exec, vcc -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v26, v27 -; SI-NEXT: v_mov_b32_e32 v27, v29 -; SI-NEXT: v_mov_b32_e32 v29, v30 -; SI-NEXT: v_mov_b32_e32 v30, v31 -; SI-NEXT: v_mov_b32_e32 v31, v33 ; SI-NEXT: s_cbranch_vccnz .LBB91_5 ; SI-NEXT: ; %bb.4: ; %cmp.true -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v12 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v51 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: v_readfirstlane_b32 s4, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v8 -; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v5 -; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v32 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_readfirstlane_b32 s12, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v36 -; SI-NEXT: v_readfirstlane_b32 s6, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v3 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v10 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: v_readfirstlane_b32 s6, v12 -; SI-NEXT: s_lshr_b64 s[10:11], s[8:9], 16 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v28 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_mov_b32 s7, s9 -; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v16 -; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: v_writelane_b32 v61, s6, 26 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v23 -; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v2 -; SI-NEXT: v_writelane_b32 v61, s7, 27 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: v_readfirstlane_b32 s6, v8 -; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v9 -; SI-NEXT: s_lshr_b64 s[20:21], s[8:9], 16 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v17 -; SI-NEXT: v_readfirstlane_b32 s6, v5 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v36 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_readfirstlane_b32 s5, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v8 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_lshr_b32 s19, s6, 16 ; SI-NEXT: v_readfirstlane_b32 s6, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: v_readfirstlane_b32 s18, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v11 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16 -; SI-NEXT: v_readfirstlane_b32 s8, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v30 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_readfirstlane_b32 s4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v25 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_readfirstlane_b32 s9, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v11 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_readfirstlane_b32 s8, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v7 -; SI-NEXT: v_readfirstlane_b32 s22, v3 -; SI-NEXT: s_lshr_b32 s9, s6, 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v10 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: s_lshr_b64 s[24:25], s[8:9], 16 -; SI-NEXT: v_readfirstlane_b32 s6, v2 -; SI-NEXT: s_lshr_b32 s23, s6, 16 +; SI-NEXT: s_lshr_b32 s7, s5, 16 +; SI-NEXT: v_readfirstlane_b32 s5, v3 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 +; SI-NEXT: v_readfirstlane_b32 s52, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21 +; SI-NEXT: s_lshr_b32 s5, s5, 16 +; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v4 +; SI-NEXT: v_readfirstlane_b32 s10, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v17 +; SI-NEXT: s_lshr_b32 s53, s4, 16 ; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v57 ; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v44 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v5 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v40 -; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v39 +; SI-NEXT: s_lshr_b64 s[6:7], s[6:7], 16 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v40 ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v6 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v52 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; SI-NEXT: s_lshr_b64 s[36:37], s[22:23], 16 -; SI-NEXT: s_mov_b32 s25, s36 -; SI-NEXT: s_lshr_b64 s[26:27], s[18:19], 16 -; SI-NEXT: s_mov_b32 s17, s26 -; SI-NEXT: s_mov_b32 s11, s20 -; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s5, v18 -; SI-NEXT: s_lshr_b32 s13, s5, 16 -; SI-NEXT: s_lshr_b64 vcc, s[12:13], 16 -; SI-NEXT: s_mov_b32 s5, vcc_lo -; SI-NEXT: s_lshr_b32 s18, s36, 8 -; SI-NEXT: s_lshr_b32 s12, s20, 8 -; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v11 -; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v2 -; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v5 -; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v12 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v44 +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; SI-NEXT: s_lshr_b32 s9, s9, 16 +; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[20:21], s[52:53], 16 +; SI-NEXT: s_mov_b32 s9, s20 +; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v5 +; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v4 +; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v3 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: v_readfirstlane_b32 s8, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v35 -; SI-NEXT: v_readfirstlane_b32 s6, v4 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v3 -; SI-NEXT: v_readfirstlane_b32 s28, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v59 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v58 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_lshr_b64 s[40:41], s[8:9], 16 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v15 -; SI-NEXT: v_readfirstlane_b32 s6, v3 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_lshr_b32 s29, s6, 16 -; SI-NEXT: v_readfirstlane_b32 s6, v7 -; SI-NEXT: v_readfirstlane_b32 s44, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v47 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v46 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: v_readfirstlane_b32 s4, v6 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v59 +; SI-NEXT: v_readfirstlane_b32 s42, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v13 +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v2 +; SI-NEXT: v_readfirstlane_b32 s10, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v9 +; SI-NEXT: s_lshr_b32 s43, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v7 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v45 +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: s_lshr_b64 s[22:23], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v6 +; SI-NEXT: v_readfirstlane_b32 s10, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v47 +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; SI-NEXT: s_lshr_b64 s[30:31], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s10, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v55 +; SI-NEXT: v_readfirstlane_b32 s4, v8 +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v41 +; SI-NEXT: v_readfirstlane_b32 s28, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v1 +; SI-NEXT: s_mov_b32 s7, s11 +; SI-NEXT: s_lshr_b32 s11, s4, 16 ; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v52 -; SI-NEXT: v_readfirstlane_b32 s6, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_lshr_b32 s45, s6, 16 -; SI-NEXT: v_readfirstlane_b32 s6, v8 -; SI-NEXT: v_readfirstlane_b32 s58, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v42 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v41 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v38 -; SI-NEXT: v_readfirstlane_b32 s6, v8 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_lshr_b32 s59, s6, 16 -; SI-NEXT: v_readfirstlane_b32 s6, v9 -; SI-NEXT: v_readfirstlane_b32 s72, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v54 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v53 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 16 -; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 -; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v45 -; SI-NEXT: v_readfirstlane_b32 s6, v9 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_lshr_b32 s73, s6, 16 -; SI-NEXT: v_readfirstlane_b32 s6, v10 -; SI-NEXT: v_readfirstlane_b32 s88, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v37 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v48 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 16 -; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v14 -; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v49 -; SI-NEXT: v_readfirstlane_b32 s6, v13 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: s_lshr_b32 s89, s6, 16 -; SI-NEXT: v_readfirstlane_b32 s6, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v21 -; SI-NEXT: v_readfirstlane_b32 s56, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v20 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v10 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 16 -; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: v_readfirstlane_b32 s6, v14 -; SI-NEXT: s_lshr_b32 s57, s6, 16 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: s_lshr_b64 s[30:31], s[56:57], 16 -; SI-NEXT: s_mov_b32 s79, s30 -; SI-NEXT: s_lshr_b64 s[50:51], s[88:89], 16 -; SI-NEXT: s_mov_b32 s95, s50 -; SI-NEXT: s_lshr_b64 s[74:75], s[72:73], 16 -; SI-NEXT: s_mov_b32 s77, s74 -; SI-NEXT: s_lshr_b64 s[54:55], s[58:59], 16 -; SI-NEXT: s_mov_b32 s63, s54 -; SI-NEXT: s_lshr_b64 s[60:61], s[44:45], 16 -; SI-NEXT: s_mov_b32 s47, s60 -; SI-NEXT: s_lshr_b64 s[42:43], s[28:29], 16 -; SI-NEXT: s_mov_b32 s41, s42 -; SI-NEXT: s_lshr_b32 s44, s30, 8 -; SI-NEXT: s_lshr_b32 s27, s50, 8 -; SI-NEXT: s_lshr_b32 s28, s74, 8 -; SI-NEXT: s_lshr_b32 s22, s60, 8 -; SI-NEXT: s_mov_b32 s56, s42 -; SI-NEXT: s_lshr_b32 s21, s42, 8 -; SI-NEXT: v_lshrrev_b32_e32 v50, 24, v14 -; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v13 -; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v8 -; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v3 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: s_lshr_b64 s[40:41], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v7 +; SI-NEXT: v_readfirstlane_b32 s10, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v51 +; SI-NEXT: s_lshr_b32 s29, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v53 +; SI-NEXT: v_readfirstlane_b32 s44, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v54 +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_readfirstlane_b32 s6, v10 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v4 -; SI-NEXT: v_readfirstlane_b32 s90, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: s_lshr_b64 s[34:35], s[8:9], 16 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v56 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; SI-NEXT: v_readfirstlane_b32 s6, v4 -; SI-NEXT: s_lshr_b32 s91, s6, 16 -; SI-NEXT: s_lshr_b64 s[82:83], s[90:91], 16 -; SI-NEXT: s_mov_b32 s35, s82 -; SI-NEXT: s_lshr_b32 s43, s82, 8 -; SI-NEXT: s_mov_b32 s90, vcc_lo -; SI-NEXT: v_lshrrev_b32_e32 v55, 24, v4 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v8 +; SI-NEXT: v_readfirstlane_b32 s10, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v12 +; SI-NEXT: s_lshr_b32 s45, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v11 +; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v49 +; SI-NEXT: v_readfirstlane_b32 s58, v11 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v50 +; SI-NEXT: s_lshr_b32 s11, s4, 16 ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_readfirstlane_b32 s8, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 +; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v48 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v10 +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 +; SI-NEXT: v_readfirstlane_b32 s10, v11 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v14 +; SI-NEXT: s_lshr_b32 s59, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v12 +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v11 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v37 +; SI-NEXT: v_readfirstlane_b32 s24, v12 +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v58 +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v34 +; SI-NEXT: s_lshr_b64 s[74:75], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v11 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 +; SI-NEXT: v_readfirstlane_b32 s10, v12 +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v15 +; SI-NEXT: s_lshr_b32 s25, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v14 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v12 +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v33 +; SI-NEXT: v_readfirstlane_b32 s12, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v32 +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v46 +; SI-NEXT: s_lshr_b64 s[88:89], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v12 ; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 -; SI-NEXT: v_readfirstlane_b32 s6, v15 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 16 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v10 -; SI-NEXT: v_readfirstlane_b32 s38, v15 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; SI-NEXT: v_readfirstlane_b32 s6, v10 -; SI-NEXT: s_lshr_b32 s39, s6, 16 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: s_lshr_b64 s[98:99], s[38:39], 16 -; SI-NEXT: s_mov_b32 s53, s98 -; SI-NEXT: s_lshr_b32 s58, s98, 8 -; SI-NEXT: s_mov_b32 s38, s26 -; SI-NEXT: v_lshrrev_b32_e32 v10, 24, v10 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 +; SI-NEXT: v_readfirstlane_b32 s10, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v16 +; SI-NEXT: s_lshr_b32 s13, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v15 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v14 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: v_readfirstlane_b32 s72, v15 +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v29 +; SI-NEXT: s_lshr_b32 s11, s4, 16 ; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 -; SI-NEXT: v_readfirstlane_b32 s8, v15 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: s_lshr_b64 s[94:95], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s10, v15 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v60 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 +; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v56 +; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 +; SI-NEXT: s_lshr_b64 s[92:93], s[12:13], 16 +; SI-NEXT: s_mov_b32 s89, s92 +; SI-NEXT: s_lshr_b64 s[62:63], s[24:25], 16 +; SI-NEXT: s_mov_b32 s75, s62 +; SI-NEXT: s_lshr_b64 s[78:79], s[58:59], 16 +; SI-NEXT: s_mov_b32 s61, s78 +; SI-NEXT: s_lshr_b64 s[66:67], s[44:45], 16 +; SI-NEXT: v_writelane_b32 v61, s6, 14 +; SI-NEXT: s_mov_b32 s47, s66 +; SI-NEXT: v_writelane_b32 v61, s7, 15 +; SI-NEXT: s_lshr_b64 s[48:49], s[28:29], 16 +; SI-NEXT: s_mov_b32 s41, s48 +; SI-NEXT: s_mov_b32 s23, s30 +; SI-NEXT: s_lshr_b64 s[56:57], s[42:43], 16 +; SI-NEXT: s_mov_b32 s17, s56 +; SI-NEXT: s_mov_b32 s7, vcc_lo +; SI-NEXT: v_lshrrev_b32_e32 v24, 24, v9 +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v13 +; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v10 +; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v8 +; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v7 +; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v6 +; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v2 +; SI-NEXT: s_lshr_b32 s21, s92, 8 +; SI-NEXT: s_mov_b32 s67, s43 +; SI-NEXT: s_lshr_b32 s12, s48, 8 +; SI-NEXT: s_mov_b32 s52, s56 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 +; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 +; SI-NEXT: v_readfirstlane_b32 s4, v14 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_readfirstlane_b32 s6, v16 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: s_lshr_b64 s[66:67], s[8:9], 16 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_lshr_b32 s73, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v16 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v15 -; SI-NEXT: v_readfirstlane_b32 s92, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: v_readfirstlane_b32 s18, v16 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16 +; SI-NEXT: s_mov_b32 s95, s76 +; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v14 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 +; SI-NEXT: v_readfirstlane_b32 s10, v16 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 -; SI-NEXT: v_readfirstlane_b32 s6, v15 -; SI-NEXT: s_lshr_b32 s93, s6, 16 -; SI-NEXT: s_lshr_b64 s[48:49], s[92:93], 16 -; SI-NEXT: s_mov_b32 s67, s48 -; SI-NEXT: s_lshr_b32 s75, s48, 8 -; SI-NEXT: s_mov_b32 s92, s74 -; SI-NEXT: s_lshr_b32 s74, s54, 8 -; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v15 +; SI-NEXT: v_readfirstlane_b32 s4, v15 +; SI-NEXT: s_lshr_b32 s19, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v18 +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s10, v17 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v42 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16 +; SI-NEXT: s_mov_b32 s37, s90 +; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v1 +; SI-NEXT: v_lshrrev_b32_e32 v20, 24, v15 +; SI-NEXT: s_lshr_b32 s24, s90, 8 +; SI-NEXT: s_lshr_b32 s18, s62, 8 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 +; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v16 +; SI-NEXT: v_readfirstlane_b32 s84, v18 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v43 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_readfirstlane_b32 s8, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 -; SI-NEXT: v_lshrrev_b32_e32 v24, 24, v6 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: v_readfirstlane_b32 s4, v16 +; SI-NEXT: s_lshr_b32 s85, s4, 16 +; SI-NEXT: s_lshr_b64 s[34:35], s[84:85], 16 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_readfirstlane_b32 s68, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 ; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_readfirstlane_b32 s6, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: s_lshr_b64 s[80:81], s[8:9], 16 -; SI-NEXT: v_readfirstlane_b32 s6, v11 -; SI-NEXT: s_lshr_b32 s69, s6, 16 -; SI-NEXT: s_lshr_b64 s[70:71], s[68:69], 16 -; SI-NEXT: s_mov_b32 s81, s70 -; SI-NEXT: s_lshr_b32 s72, s70, 8 -; SI-NEXT: s_mov_b32 s68, s60 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v1 +; SI-NEXT: v_readfirstlane_b32 s26, v17 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_mov_b32 s51, s34 +; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v16 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_readfirstlane_b32 s8, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 +; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; SI-NEXT: v_readfirstlane_b32 s4, v18 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v13 +; SI-NEXT: s_lshr_b32 s27, s4, 16 +; SI-NEXT: s_lshr_b64 s[38:39], s[26:27], 16 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_readfirstlane_b32 s10, v17 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: s_mov_b32 s65, s38 +; SI-NEXT: s_lshr_b32 s28, s38, 8 +; SI-NEXT: s_lshr_b32 s26, s34, 8 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_readfirstlane_b32 s64, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 ; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_readfirstlane_b32 s6, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: s_lshr_b64 s[86:87], s[8:9], 16 -; SI-NEXT: v_readfirstlane_b32 s6, v6 -; SI-NEXT: s_lshr_b32 s65, s6, 16 -; SI-NEXT: s_lshr_b64 s[84:85], s[64:65], 16 -; SI-NEXT: s_mov_b32 s87, s84 -; SI-NEXT: s_lshr_b32 s61, s84, 8 -; SI-NEXT: s_mov_b32 s64, s50 +; SI-NEXT: v_readfirstlane_b32 s68, v17 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 +; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; SI-NEXT: v_readfirstlane_b32 s4, v18 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: s_lshr_b64 s[80:81], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v9 +; SI-NEXT: s_lshr_b32 s69, s4, 16 +; SI-NEXT: s_lshr_b64 s[54:55], s[68:69], 16 +; SI-NEXT: s_mov_b32 s81, s54 +; SI-NEXT: s_mov_b32 s68, s66 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_readfirstlane_b32 s8, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_readfirstlane_b32 s10, v17 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_readfirstlane_b32 s82, v17 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 +; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; SI-NEXT: v_readfirstlane_b32 s4, v18 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: s_lshr_b64 s[86:87], s[10:11], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v5 +; SI-NEXT: s_lshr_b32 s83, s4, 16 +; SI-NEXT: s_lshr_b64 s[70:71], s[82:83], 16 +; SI-NEXT: s_mov_b32 s87, s70 +; SI-NEXT: s_mov_b32 s82, s70 +; SI-NEXT: s_lshr_b32 s42, s70, 8 +; SI-NEXT: s_mov_b32 s71, s25 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 ; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_readfirstlane_b32 s6, v17 -; SI-NEXT: s_lshr_b32 s9, s6, 16 -; SI-NEXT: v_readfirstlane_b32 s6, v1 -; SI-NEXT: s_lshr_b32 s7, s6, 16 -; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 16 -; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v9 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v18 +; SI-NEXT: v_readfirstlane_b32 s10, v17 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 +; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 +; SI-NEXT: v_readfirstlane_b32 s4, v18 +; SI-NEXT: s_lshr_b32 s11, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v1 +; SI-NEXT: s_lshr_b32 s99, s4, 16 +; SI-NEXT: s_lshr_b64 s[96:97], s[10:11], 16 +; SI-NEXT: v_lshrrev_b32_e32 v18, 24, v12 +; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v11 +; SI-NEXT: s_lshr_b32 s4, vcc_lo, 8 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; SI-NEXT: v_readfirstlane_b32 s6, v16 -; SI-NEXT: s_lshr_b64 s[96:97], s[6:7], 16 -; SI-NEXT: s_mov_b32 s9, s96 -; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 24 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 +; SI-NEXT: v_readfirstlane_b32 s98, v17 +; SI-NEXT: s_lshr_b64 s[10:11], s[98:99], 16 +; SI-NEXT: s_mov_b32 s97, s10 +; SI-NEXT: s_lshr_b64 s[14:15], s[96:97], 24 ; SI-NEXT: v_writelane_b32 v62, s14, 4 ; SI-NEXT: v_writelane_b32 v62, s15, 5 -; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[96:97], 16 ; SI-NEXT: v_writelane_b32 v62, s14, 2 ; SI-NEXT: v_writelane_b32 v62, s15, 3 -; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[96:97], 8 ; SI-NEXT: v_writelane_b32 v62, s14, 0 ; SI-NEXT: v_writelane_b32 v62, s15, 1 ; SI-NEXT: s_lshr_b64 s[14:15], s[86:87], 24 @@ -158261,67 +158353,67 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; SI-NEXT: s_lshr_b64 s[14:15], s[80:81], 8 ; SI-NEXT: v_writelane_b32 v62, s14, 12 ; SI-NEXT: v_writelane_b32 v62, s15, 13 -; SI-NEXT: s_lshr_b64 s[14:15], s[66:67], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[64:65], 24 ; SI-NEXT: v_writelane_b32 v62, s14, 22 ; SI-NEXT: v_writelane_b32 v62, s15, 23 -; SI-NEXT: s_lshr_b64 s[14:15], s[66:67], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[64:65], 16 ; SI-NEXT: v_writelane_b32 v62, s14, 20 ; SI-NEXT: v_writelane_b32 v62, s15, 21 -; SI-NEXT: s_lshr_b64 s[14:15], s[66:67], 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[64:65], 8 ; SI-NEXT: v_writelane_b32 v62, s14, 18 ; SI-NEXT: v_writelane_b32 v62, s15, 19 -; SI-NEXT: s_lshr_b64 s[14:15], s[52:53], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[50:51], 24 ; SI-NEXT: v_writelane_b32 v62, s14, 28 ; SI-NEXT: v_writelane_b32 v62, s15, 29 -; SI-NEXT: s_lshr_b64 s[14:15], s[52:53], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[50:51], 16 ; SI-NEXT: v_writelane_b32 v62, s14, 26 ; SI-NEXT: v_writelane_b32 v62, s15, 27 -; SI-NEXT: s_lshr_b64 s[14:15], s[52:53], 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[50:51], 8 ; SI-NEXT: v_writelane_b32 v62, s14, 24 ; SI-NEXT: v_writelane_b32 v62, s15, 25 -; SI-NEXT: s_lshr_b64 s[14:15], s[34:35], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[36:37], 24 ; SI-NEXT: v_writelane_b32 v62, s14, 34 ; SI-NEXT: v_writelane_b32 v62, s15, 35 -; SI-NEXT: s_lshr_b64 s[14:15], s[34:35], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[36:37], 16 ; SI-NEXT: v_writelane_b32 v62, s14, 32 ; SI-NEXT: v_writelane_b32 v62, s15, 33 -; SI-NEXT: s_lshr_b64 s[14:15], s[34:35], 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[36:37], 8 ; SI-NEXT: v_writelane_b32 v62, s14, 30 ; SI-NEXT: v_writelane_b32 v62, s15, 31 -; SI-NEXT: s_lshr_b64 s[14:15], s[78:79], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 24 ; SI-NEXT: v_writelane_b32 v62, s14, 40 ; SI-NEXT: v_writelane_b32 v62, s15, 41 -; SI-NEXT: s_lshr_b64 s[14:15], s[78:79], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 16 ; SI-NEXT: v_writelane_b32 v62, s14, 38 ; SI-NEXT: v_writelane_b32 v62, s15, 39 -; SI-NEXT: s_lshr_b64 s[14:15], s[78:79], 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 8 ; SI-NEXT: v_writelane_b32 v62, s14, 36 ; SI-NEXT: v_writelane_b32 v62, s15, 37 -; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[88:89], 24 ; SI-NEXT: v_writelane_b32 v62, s14, 46 ; SI-NEXT: v_writelane_b32 v62, s15, 47 -; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[88:89], 16 ; SI-NEXT: v_writelane_b32 v62, s14, 44 ; SI-NEXT: v_writelane_b32 v62, s15, 45 -; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[88:89], 8 ; SI-NEXT: v_writelane_b32 v62, s14, 42 ; SI-NEXT: v_writelane_b32 v62, s15, 43 -; SI-NEXT: s_lshr_b64 s[14:15], s[76:77], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[74:75], 24 ; SI-NEXT: v_writelane_b32 v62, s14, 52 ; SI-NEXT: v_writelane_b32 v62, s15, 53 -; SI-NEXT: s_lshr_b64 s[14:15], s[76:77], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[74:75], 16 ; SI-NEXT: v_writelane_b32 v62, s14, 50 ; SI-NEXT: v_writelane_b32 v62, s15, 51 -; SI-NEXT: s_lshr_b64 s[14:15], s[76:77], 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[74:75], 8 ; SI-NEXT: v_writelane_b32 v62, s14, 48 ; SI-NEXT: v_writelane_b32 v62, s15, 49 -; SI-NEXT: s_lshr_b64 s[14:15], s[62:63], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[60:61], 24 ; SI-NEXT: v_writelane_b32 v62, s14, 58 ; SI-NEXT: v_writelane_b32 v62, s15, 59 -; SI-NEXT: s_lshr_b64 s[14:15], s[62:63], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[60:61], 16 ; SI-NEXT: v_writelane_b32 v62, s14, 56 ; SI-NEXT: v_writelane_b32 v62, s15, 57 -; SI-NEXT: s_lshr_b64 s[14:15], s[62:63], 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[60:61], 8 ; SI-NEXT: v_writelane_b32 v62, s14, 54 ; SI-NEXT: v_writelane_b32 v62, s15, 55 ; SI-NEXT: s_lshr_b64 s[14:15], s[46:47], 24 @@ -158342,327 +158434,342 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; SI-NEXT: s_lshr_b64 s[14:15], s[40:41], 8 ; SI-NEXT: v_writelane_b32 v61, s14, 2 ; SI-NEXT: v_writelane_b32 v61, s15, 3 -; SI-NEXT: s_lshr_b64 s[14:15], s[24:25], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[22:23], 24 ; SI-NEXT: v_writelane_b32 v61, s14, 12 ; SI-NEXT: v_writelane_b32 v61, s15, 13 -; SI-NEXT: s_lshr_b64 s[14:15], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[22:23], 16 ; SI-NEXT: v_writelane_b32 v61, s14, 10 ; SI-NEXT: v_writelane_b32 v61, s15, 11 -; SI-NEXT: s_lshr_b64 s[14:15], s[24:25], 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[22:23], 8 ; SI-NEXT: v_writelane_b32 v61, s14, 8 ; SI-NEXT: v_writelane_b32 v61, s15, 9 ; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 24 +; SI-NEXT: v_writelane_b32 v61, s14, 20 +; SI-NEXT: v_writelane_b32 v61, s15, 21 +; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 16 ; SI-NEXT: v_writelane_b32 v61, s14, 18 ; SI-NEXT: v_writelane_b32 v61, s15, 19 -; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 8 ; SI-NEXT: v_writelane_b32 v61, s14, 16 ; SI-NEXT: v_writelane_b32 v61, s15, 17 -; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 8 -; SI-NEXT: v_writelane_b32 v61, s14, 14 -; SI-NEXT: v_writelane_b32 v61, s15, 15 -; SI-NEXT: s_lshr_b64 s[14:15], s[10:11], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 24 +; SI-NEXT: v_writelane_b32 v61, s14, 26 +; SI-NEXT: v_writelane_b32 v61, s15, 27 +; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 16 ; SI-NEXT: v_writelane_b32 v61, s14, 24 ; SI-NEXT: v_writelane_b32 v61, s15, 25 -; SI-NEXT: s_lshr_b64 s[14:15], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 8 ; SI-NEXT: v_writelane_b32 v61, s14, 22 ; SI-NEXT: v_writelane_b32 v61, s15, 23 -; SI-NEXT: s_lshr_b64 s[14:15], s[10:11], 8 -; SI-NEXT: v_writelane_b32 v61, s14, 20 -; SI-NEXT: v_writelane_b32 v61, s15, 21 -; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[6:7], 24 ; SI-NEXT: v_writelane_b32 v61, s14, 32 ; SI-NEXT: v_writelane_b32 v61, s15, 33 -; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[6:7], 16 ; SI-NEXT: v_writelane_b32 v61, s14, 30 ; SI-NEXT: v_writelane_b32 v61, s15, 31 -; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[6:7], 8 ; SI-NEXT: v_writelane_b32 v61, s14, 28 ; SI-NEXT: v_writelane_b32 v61, s15, 29 -; SI-NEXT: s_lshr_b32 s88, s96, 8 -; SI-NEXT: s_lshr_b32 s15, s26, 8 +; SI-NEXT: s_lshr_b32 s44, s10, 8 +; SI-NEXT: s_lshr_b32 s41, s54, 8 +; SI-NEXT: s_lshr_b32 s23, s76, 8 +; SI-NEXT: s_lshr_b32 s17, s78, 8 +; SI-NEXT: s_lshr_b32 s15, s66, 8 +; SI-NEXT: s_lshr_b32 s11, s30, 8 +; SI-NEXT: s_lshr_b32 s9, s56, 8 ; SI-NEXT: s_mov_b32 s14, s20 -; SI-NEXT: s_lshr_b32 s6, vcc_lo, 8 +; SI-NEXT: s_lshr_b32 s7, s20, 8 +; SI-NEXT: s_mov_b32 s20, vcc_lo ; SI-NEXT: .LBB91_5: ; %end -; SI-NEXT: s_and_b32 s5, s8, 0xff -; SI-NEXT: v_readlane_b32 s8, v62, 0 -; SI-NEXT: v_readlane_b32 s9, v62, 1 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v62, 2 -; SI-NEXT: v_readlane_b32 s9, v62, 3 -; SI-NEXT: s_and_b32 s8, s8, 0xff +; SI-NEXT: v_readlane_b32 s56, v62, 0 +; SI-NEXT: v_readlane_b32 s57, v62, 1 +; SI-NEXT: s_and_b32 s47, s96, 0xff +; SI-NEXT: s_lshl_b32 s57, s56, 8 +; SI-NEXT: s_or_b32 s47, s47, s57 +; SI-NEXT: v_readlane_b32 s56, v62, 2 +; SI-NEXT: v_readlane_b32 s57, v62, 3 +; SI-NEXT: s_and_b32 s57, s56, 0xff ; SI-NEXT: v_readlane_b32 vcc_lo, v62, 4 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, vcc_lo, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_or_b32 s5, s5, s8 +; SI-NEXT: s_lshl_b32 s57, s57, 16 +; SI-NEXT: s_lshl_b32 s58, vcc_lo, 24 +; SI-NEXT: s_and_b32 s47, s47, 0xffff +; SI-NEXT: s_or_b32 s57, s58, s57 +; SI-NEXT: s_or_b32 s47, s47, s57 +; SI-NEXT: s_and_b32 s10, s10, 0xff +; SI-NEXT: s_lshl_b32 s44, s44, 8 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, s5 -; SI-NEXT: s_and_b32 s5, s96, 0xff -; SI-NEXT: s_lshl_b32 s8, s88, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s7, 0xff +; SI-NEXT: v_mov_b32_e32 v1, s47 +; SI-NEXT: s_or_b32 s10, s10, s44 +; SI-NEXT: s_and_b32 s44, s99, 0xff +; SI-NEXT: v_readlane_b32 s56, v62, 6 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s44, s44, 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v25 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v62, 6 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v27 +; SI-NEXT: v_readlane_b32 s57, v62, 7 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s44, v1 +; SI-NEXT: s_lshl_b32 s44, s56, 8 +; SI-NEXT: v_readlane_b32 s56, v62, 8 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s86, 0xff +; SI-NEXT: v_readlane_b32 s57, v62, 9 +; SI-NEXT: s_or_b32 s10, s10, s44 +; SI-NEXT: s_and_b32 s44, s56, 0xff +; SI-NEXT: v_readlane_b32 s56, v62, 10 +; SI-NEXT: s_lshl_b32 s44, s44, 16 +; SI-NEXT: s_lshl_b32 s47, s56, 24 ; SI-NEXT: v_readlane_b32 vcc_hi, v62, 5 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s86, 0xff -; SI-NEXT: v_readlane_b32 s9, v62, 7 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v62, 8 -; SI-NEXT: v_readlane_b32 s9, v62, 9 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 vcc_lo, v62, 10 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, vcc_lo, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_readlane_b32 vcc_hi, v62, 11 -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s84, 0xff -; SI-NEXT: s_lshl_b32 s8, s61, 8 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s44, s47, s44 +; SI-NEXT: v_add_i32_e32 v3, vcc, 4, v0 +; SI-NEXT: s_or_b32 s10, s10, s44 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s82, 0xff +; SI-NEXT: s_lshl_b32 s43, s42, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s65, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v62, 12 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s80, 0xff -; SI-NEXT: v_readlane_b32 s9, v62, 13 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v62, 14 -; SI-NEXT: v_readlane_b32 s9, v62, 15 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s60, v62, 16 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s60, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s10, s10, s43 +; SI-NEXT: s_and_b32 s43, s83, 0xff +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s43, s43, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v26 +; SI-NEXT: v_or_b32_e32 v1, s43, v1 +; SI-NEXT: v_readlane_b32 s42, v62, 12 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_readlane_b32 s43, v62, 13 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s80, 0xff +; SI-NEXT: s_lshl_b32 s43, s42, 8 +; SI-NEXT: s_or_b32 s10, s10, s43 +; SI-NEXT: v_readlane_b32 s42, v62, 14 +; SI-NEXT: v_readlane_b32 s57, v62, 11 +; SI-NEXT: v_readlane_b32 s43, v62, 15 +; SI-NEXT: s_and_b32 s43, s42, 0xff +; SI-NEXT: v_readlane_b32 s56, v62, 16 +; SI-NEXT: s_lshl_b32 s43, s43, 16 +; SI-NEXT: s_lshl_b32 s44, s56, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s43, s44, s43 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s70, 0xff -; SI-NEXT: s_lshl_b32 s8, s72, 8 +; SI-NEXT: v_add_i32_e32 v3, vcc, 12, v0 +; SI-NEXT: s_or_b32 s10, s10, s43 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s54, 0xff +; SI-NEXT: s_lshl_b32 s41, s41, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s69, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v19 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v62, 18 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s66, 0xff -; SI-NEXT: v_readlane_b32 s9, v62, 19 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: v_readlane_b32 s61, v62, 17 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v62, 20 -; SI-NEXT: v_readlane_b32 s9, v62, 21 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s60, v62, 22 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s60, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s10, s10, s41 +; SI-NEXT: s_and_b32 s41, s69, 0xff +; SI-NEXT: v_readlane_b32 s42, v62, 18 +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s41, s41, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v24 +; SI-NEXT: v_readlane_b32 s43, v62, 19 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s41, v1 +; SI-NEXT: s_lshl_b32 s41, s42, 8 +; SI-NEXT: v_readlane_b32 s42, v62, 20 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s64, 0xff +; SI-NEXT: v_readlane_b32 s43, v62, 21 +; SI-NEXT: s_or_b32 s10, s10, s41 +; SI-NEXT: s_and_b32 s41, s42, 0xff +; SI-NEXT: v_readlane_b32 s42, v62, 22 +; SI-NEXT: v_readlane_b32 s43, v62, 23 +; SI-NEXT: s_lshl_b32 s41, s41, 16 +; SI-NEXT: s_lshl_b32 s43, s42, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s41, s43, s41 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s48, 0xff -; SI-NEXT: s_lshl_b32 s8, s75, 8 +; SI-NEXT: v_add_i32_e32 v3, vcc, 20, v0 +; SI-NEXT: s_or_b32 s10, s10, s41 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s38, 0xff +; SI-NEXT: s_lshl_b32 s28, s28, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s93, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v43 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v62, 24 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s52, 0xff -; SI-NEXT: v_readlane_b32 s9, v62, 25 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: v_readlane_b32 s61, v62, 23 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v62, 26 -; SI-NEXT: v_readlane_b32 s9, v62, 27 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s60, v62, 28 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s60, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s98, 0xff -; SI-NEXT: s_lshl_b32 s8, s58, 8 +; SI-NEXT: s_or_b32 s10, s10, s28 +; SI-NEXT: s_and_b32 s28, s27, 0xff +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s28, s28, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v23 +; SI-NEXT: v_readlane_b32 s42, v62, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s28, v1 +; SI-NEXT: v_readlane_b32 s43, v62, 25 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_i32_e32 v3, vcc, 28, v0 +; SI-NEXT: s_and_b32 s10, s50, 0xff +; SI-NEXT: s_lshl_b32 s28, s42, 8 +; SI-NEXT: v_readlane_b32 s42, v62, 26 +; SI-NEXT: s_or_b32 s10, s10, s28 +; SI-NEXT: s_and_b32 s28, s42, 0xff +; SI-NEXT: v_readlane_b32 vcc_lo, v62, 28 +; SI-NEXT: s_lshl_b32 s28, s28, 16 +; SI-NEXT: s_lshl_b32 s41, vcc_lo, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s28, s41, s28 +; SI-NEXT: s_or_b32 s10, s10, s28 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_readlane_b32 vcc_hi, v62, 29 +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s34, 0xff +; SI-NEXT: s_lshl_b32 s27, s26, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s39, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v10 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v62, 30 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s34, 0xff -; SI-NEXT: v_readlane_b32 s9, v62, 31 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: v_readlane_b32 s61, v62, 29 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v62, 32 -; SI-NEXT: v_readlane_b32 s9, v62, 33 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s60, v62, 34 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s60, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s10, s10, s27 +; SI-NEXT: s_and_b32 s27, s85, 0xff +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s27, s27, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v22 +; SI-NEXT: v_or_b32_e32 v1, s27, v1 +; SI-NEXT: v_readlane_b32 s26, v62, 30 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_readlane_b32 s27, v62, 31 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s36, 0xff +; SI-NEXT: s_lshl_b32 s27, s26, 8 +; SI-NEXT: s_or_b32 s10, s10, s27 +; SI-NEXT: v_readlane_b32 s26, v62, 32 +; SI-NEXT: v_readlane_b32 s43, v62, 27 +; SI-NEXT: v_readlane_b32 s27, v62, 33 +; SI-NEXT: s_and_b32 s27, s26, 0xff +; SI-NEXT: v_readlane_b32 s42, v62, 34 +; SI-NEXT: s_lshl_b32 s27, s27, 16 +; SI-NEXT: s_lshl_b32 s28, s42, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s27, s28, s27 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s82, 0xff -; SI-NEXT: s_lshl_b32 s8, s43, 8 +; SI-NEXT: v_add_i32_e32 v3, vcc, 36, v0 +; SI-NEXT: s_or_b32 s10, s10, s27 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s90, 0xff +; SI-NEXT: s_lshl_b32 s24, s24, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s91, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v55 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v62, 36 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s78, 0xff -; SI-NEXT: v_readlane_b32 s9, v62, 37 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v62, 38 -; SI-NEXT: v_readlane_b32 s9, v62, 39 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s42, v62, 40 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s42, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s10, s10, s24 +; SI-NEXT: s_and_b32 s24, s19, 0xff +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s24, s24, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v20 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s24, v1 +; SI-NEXT: v_readlane_b32 s24, v62, 36 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s94, 0xff +; SI-NEXT: v_readlane_b32 s25, v62, 37 +; SI-NEXT: s_lshl_b32 s24, s24, 8 +; SI-NEXT: s_or_b32 s10, s10, s24 +; SI-NEXT: v_readlane_b32 s24, v62, 38 +; SI-NEXT: v_readlane_b32 s26, v62, 40 +; SI-NEXT: s_and_b32 s24, s24, 0xff +; SI-NEXT: v_readlane_b32 s27, v62, 41 +; SI-NEXT: s_lshl_b32 s24, s24, 16 +; SI-NEXT: s_lshl_b32 s27, s26, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s24, s27, s24 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s30, 0xff -; SI-NEXT: s_lshl_b32 s8, s44, 8 +; SI-NEXT: v_add_i32_e32 v3, vcc, 44, v0 +; SI-NEXT: s_or_b32 s10, s10, s24 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_readlane_b32 s25, v62, 39 +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s76, 0xff +; SI-NEXT: s_lshl_b32 s23, s23, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s57, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v50 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v62, 42 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s94, 0xff -; SI-NEXT: v_readlane_b32 s9, v62, 43 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: v_readlane_b32 s43, v62, 41 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v62, 44 -; SI-NEXT: v_readlane_b32 s9, v62, 45 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s42, v62, 46 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s42, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s10, s10, s23 +; SI-NEXT: s_and_b32 s23, s73, 0xff +; SI-NEXT: v_readlane_b32 s24, v62, 42 +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s23, s23, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v19 +; SI-NEXT: v_readlane_b32 s25, v62, 43 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s23, v1 +; SI-NEXT: s_lshl_b32 s23, s24, 8 +; SI-NEXT: v_readlane_b32 s24, v62, 44 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s88, 0xff +; SI-NEXT: v_readlane_b32 s25, v62, 45 +; SI-NEXT: s_or_b32 s10, s10, s23 +; SI-NEXT: s_and_b32 s23, s24, 0xff +; SI-NEXT: v_readlane_b32 s24, v62, 46 +; SI-NEXT: s_lshl_b32 s23, s23, 16 +; SI-NEXT: s_lshl_b32 s24, s24, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s23, s24, s23 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s64, 0xff -; SI-NEXT: s_lshl_b32 s8, s27, 8 +; SI-NEXT: v_add_i32_e32 v3, vcc, 52, v0 +; SI-NEXT: s_or_b32 s10, s10, s23 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_readlane_b32 s25, v62, 47 +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s92, 0xff +; SI-NEXT: s_lshl_b32 s21, s21, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s89, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v60 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v62, 48 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s76, 0xff -; SI-NEXT: v_readlane_b32 s9, v62, 49 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v62, 50 -; SI-NEXT: v_readlane_b32 s9, v62, 51 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s26, v62, 52 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s26, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s10, s10, s21 +; SI-NEXT: s_and_b32 s21, s13, 0xff +; SI-NEXT: v_readlane_b32 s24, v62, 48 +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s21, s21, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v18 +; SI-NEXT: v_readlane_b32 s25, v62, 49 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s21, v1 +; SI-NEXT: s_lshl_b32 s21, s24, 8 +; SI-NEXT: v_readlane_b32 s24, v62, 50 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s74, 0xff +; SI-NEXT: v_readlane_b32 s25, v62, 51 +; SI-NEXT: s_or_b32 s10, s10, s21 +; SI-NEXT: s_and_b32 s21, s24, 0xff +; SI-NEXT: v_readlane_b32 s24, v62, 52 +; SI-NEXT: s_lshl_b32 s21, s21, 16 +; SI-NEXT: s_lshl_b32 s23, s24, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s21, s23, s21 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; SI-NEXT: v_add_i32_e32 v3, vcc, 60, v0 +; SI-NEXT: s_or_b32 s10, s10, s21 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 64, v0 -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; SI-NEXT: s_and_b32 s5, s92, 0xff -; SI-NEXT: s_lshl_b32 s8, s28, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s73, 0xff -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_readlane_b32 s27, v62, 53 -; SI-NEXT: v_readlane_b32 s26, v62, 58 +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; SI-NEXT: s_and_b32 s10, s62, 0xff +; SI-NEXT: s_lshl_b32 s18, s18, 8 +; SI-NEXT: s_or_b32 s10, s10, s18 +; SI-NEXT: s_and_b32 s18, s71, 0xff +; SI-NEXT: s_lshl_b32 s18, s18, 16 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_readlane_b32 s25, v62, 53 +; SI-NEXT: v_readlane_b32 s24, v62, 58 +; SI-NEXT: s_lshl_b32 s21, s24, 24 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0 -; SI-NEXT: v_readlane_b32 s27, v62, 59 -; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: v_readlane_b32 s30, v63, 34 -; SI-NEXT: v_readlane_b32 s61, v62, 35 -; SI-NEXT: v_readlane_b32 s43, v62, 47 -; SI-NEXT: v_readlane_b32 s31, v63, 35 +; SI-NEXT: v_add_i32_e32 v3, vcc, 0x44, v0 +; SI-NEXT: s_lshl_b32 s17, s17, 8 +; SI-NEXT: s_lshl_b32 s15, s15, 8 +; SI-NEXT: s_lshl_b32 s12, s12, 8 +; SI-NEXT: s_lshl_b32 s11, s11, 8 +; SI-NEXT: s_lshl_b32 s9, s9, 8 +; SI-NEXT: s_and_b32 s8, s8, 0xff +; SI-NEXT: s_lshl_b32 s7, s7, 8 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 8 +; SI-NEXT: s_and_b32 s5, s5, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: v_readlane_b32 s57, v62, 17 +; SI-NEXT: v_readlane_b32 s43, v62, 35 +; SI-NEXT: v_readlane_b32 s25, v62, 59 ; SI-NEXT: v_readlane_b32 s99, v63, 33 ; SI-NEXT: v_readlane_b32 s98, v63, 32 ; SI-NEXT: v_readlane_b32 s97, v63, 31 @@ -158678,246 +158785,223 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_readlane_b32 s71, v63, 21 ; SI-NEXT: v_readlane_b32 s70, v63, 20 ; SI-NEXT: v_readlane_b32 s69, v63, 19 -; SI-NEXT: v_readlane_b32 s67, v63, 17 ; SI-NEXT: v_readlane_b32 s66, v63, 16 ; SI-NEXT: v_readlane_b32 s65, v63, 15 ; SI-NEXT: v_readlane_b32 s64, v63, 14 ; SI-NEXT: v_readlane_b32 s55, v63, 13 -; SI-NEXT: v_readlane_b32 s53, v63, 11 -; SI-NEXT: v_readlane_b32 s52, v63, 10 +; SI-NEXT: v_readlane_b32 s54, v63, 12 ; SI-NEXT: v_readlane_b32 s51, v63, 9 ; SI-NEXT: v_readlane_b32 s50, v63, 8 ; SI-NEXT: v_readlane_b32 s49, v63, 7 -; SI-NEXT: v_readlane_b32 s48, v63, 6 ; SI-NEXT: v_readlane_b32 s39, v63, 5 +; SI-NEXT: v_readlane_b32 s38, v63, 4 ; SI-NEXT: v_readlane_b32 s37, v63, 3 +; SI-NEXT: v_readlane_b32 s36, v63, 2 ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v1 -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v62, 54 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s62, 0xff -; SI-NEXT: v_readlane_b32 s9, v62, 55 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v62, 56 -; SI-NEXT: v_readlane_b32 s9, v62, 57 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s26, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s54, 0xff -; SI-NEXT: s_lshl_b32 s8, s74, 8 +; SI-NEXT: v_or_b32_e32 v1, s18, v1 +; SI-NEXT: v_readlane_b32 s18, v62, 54 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s60, 0xff +; SI-NEXT: v_readlane_b32 s19, v62, 55 +; SI-NEXT: s_lshl_b32 s18, s18, 8 +; SI-NEXT: s_or_b32 s10, s10, s18 +; SI-NEXT: v_readlane_b32 s18, v62, 56 +; SI-NEXT: s_and_b32 s18, s18, 0xff +; SI-NEXT: s_lshl_b32 s18, s18, 16 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s18, s21, s18 +; SI-NEXT: s_or_b32 s10, s10, s18 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_readlane_b32 s19, v62, 57 +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s78, 0xff ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x48, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s59, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v34 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v62, 60 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s46, 0xff -; SI-NEXT: v_readlane_b32 s9, v62, 61 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v62, 62 -; SI-NEXT: v_readlane_b32 s9, v62, 63 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s26, v61, 0 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s26, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s10, s10, s17 +; SI-NEXT: s_and_b32 s17, s59, 0xff +; SI-NEXT: v_readlane_b32 s18, v62, 60 +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s17, s17, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v39 +; SI-NEXT: v_readlane_b32 s19, v62, 61 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s17, v1 +; SI-NEXT: s_lshl_b32 s17, s18, 8 +; SI-NEXT: v_readlane_b32 s18, v62, 62 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s46, 0xff +; SI-NEXT: v_readlane_b32 s19, v62, 63 +; SI-NEXT: s_or_b32 s10, s10, s17 +; SI-NEXT: s_and_b32 s17, s18, 0xff +; SI-NEXT: v_readlane_b32 s18, v61, 0 +; SI-NEXT: s_lshl_b32 s17, s17, 16 +; SI-NEXT: s_lshl_b32 s18, s18, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 0x4c, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s68, 0xff -; SI-NEXT: s_lshl_b32 s8, s22, 8 +; SI-NEXT: v_add_i32_e32 v3, vcc, 0x4c, v0 +; SI-NEXT: s_or_b32 s10, s10, s17 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_readlane_b32 s19, v61, 1 +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s68, 0xff ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x50, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s45, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v31 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v61, 2 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s40, 0xff -; SI-NEXT: v_readlane_b32 s9, v61, 3 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: v_readlane_b32 s27, v61, 1 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v61, 4 -; SI-NEXT: v_readlane_b32 s9, v61, 5 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s26, v61, 6 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s26, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s10, s10, s15 +; SI-NEXT: s_and_b32 s15, s45, 0xff +; SI-NEXT: v_readlane_b32 s18, v61, 2 +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s15, s15, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v35 +; SI-NEXT: v_readlane_b32 s19, v61, 3 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s15, v1 +; SI-NEXT: s_lshl_b32 s15, s18, 8 +; SI-NEXT: v_readlane_b32 s18, v61, 4 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s40, 0xff +; SI-NEXT: v_readlane_b32 s19, v61, 5 +; SI-NEXT: s_or_b32 s10, s10, s15 +; SI-NEXT: s_and_b32 s15, s18, 0xff +; SI-NEXT: v_readlane_b32 s18, v61, 6 +; SI-NEXT: s_lshl_b32 s15, s15, 16 +; SI-NEXT: s_lshl_b32 s17, s18, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s15, s17, s15 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 0x54, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s56, 0xff -; SI-NEXT: s_lshl_b32 s8, s21, 8 +; SI-NEXT: v_add_i32_e32 v3, vcc, 0x54, v0 +; SI-NEXT: s_or_b32 s10, s10, s15 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s48, 0xff ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x58, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s29, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v30 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v61, 8 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s24, 0xff -; SI-NEXT: v_readlane_b32 s9, v61, 9 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v61, 10 -; SI-NEXT: v_readlane_b32 s9, v61, 11 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s20, v61, 12 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s20, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s10, s10, s12 +; SI-NEXT: s_and_b32 s12, s29, 0xff +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s12, s12, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v7 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s12, v1 +; SI-NEXT: v_readlane_b32 s12, v61, 8 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s22, 0xff +; SI-NEXT: v_readlane_b32 s13, v61, 9 +; SI-NEXT: s_lshl_b32 s12, s12, 8 +; SI-NEXT: v_readlane_b32 s19, v61, 7 +; SI-NEXT: s_or_b32 s10, s10, s12 +; SI-NEXT: v_readlane_b32 s12, v61, 10 +; SI-NEXT: s_and_b32 s12, s12, 0xff +; SI-NEXT: v_readlane_b32 s18, v61, 12 +; SI-NEXT: s_lshl_b32 s12, s12, 16 +; SI-NEXT: s_lshl_b32 s15, s18, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_readlane_b32 s13, v61, 11 +; SI-NEXT: s_or_b32 s12, s15, s12 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s36, 0xff -; SI-NEXT: s_lshl_b32 s8, s18, 8 +; SI-NEXT: v_add_i32_e32 v3, vcc, 0x5c, v0 +; SI-NEXT: s_or_b32 s10, s10, s12 +; SI-NEXT: v_readlane_b32 s12, v61, 14 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s30, 0xff +; SI-NEXT: v_readlane_b32 s13, v61, 15 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x60, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s23, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v29 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v61, 14 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s16, 0xff -; SI-NEXT: v_readlane_b32 s9, v61, 15 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v61, 16 -; SI-NEXT: v_readlane_b32 s9, v61, 17 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s16, v61, 18 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s16, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s10, s10, s11 +; SI-NEXT: s_and_b32 s11, s13, 0xff +; SI-NEXT: v_readlane_b32 s12, v61, 16 +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s11, s11, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v6 +; SI-NEXT: v_readlane_b32 s13, v61, 17 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s11, v1 +; SI-NEXT: s_lshl_b32 s11, s12, 8 +; SI-NEXT: v_readlane_b32 s12, v61, 18 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s16, 0xff +; SI-NEXT: v_readlane_b32 s13, v61, 19 +; SI-NEXT: s_or_b32 s10, s10, s11 +; SI-NEXT: s_and_b32 s11, s12, 0xff +; SI-NEXT: v_readlane_b32 s12, v61, 20 +; SI-NEXT: s_lshl_b32 s11, s11, 16 +; SI-NEXT: s_lshl_b32 s12, s12, 24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s11, s12, s11 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s38, 0xff -; SI-NEXT: s_lshl_b32 s8, s15, 8 +; SI-NEXT: v_add_i32_e32 v3, vcc, 0x64, v0 +; SI-NEXT: s_or_b32 s10, s10, s11 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; SI-NEXT: v_mov_b32_e32 v3, s10 +; SI-NEXT: s_and_b32 s10, s52, 0xff ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x68, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: s_and_b32 s8, s19, 0xff -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v27 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s8, v1 -; SI-NEXT: v_readlane_b32 s8, v61, 20 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_and_b32 s5, s10, 0xff -; SI-NEXT: v_readlane_b32 s9, v61, 21 -; SI-NEXT: s_lshl_b32 s8, s8, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v61, 22 -; SI-NEXT: v_readlane_b32 s9, v61, 23 -; SI-NEXT: s_and_b32 s8, s8, 0xff +; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: s_and_b32 s10, s67, 0xff +; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v2 +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: v_readlane_b32 s10, v61, 22 +; SI-NEXT: s_and_b32 s9, s9, 0xffff +; SI-NEXT: v_readlane_b32 s11, v61, 23 +; SI-NEXT: v_or_b32_e32 v1, s9, v1 +; SI-NEXT: s_lshl_b32 s9, s10, 8 ; SI-NEXT: v_readlane_b32 s10, v61, 24 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s10, 24 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_readlane_b32 s11, v61, 25 +; SI-NEXT: s_or_b32 s8, s8, s9 +; SI-NEXT: s_and_b32 s9, s10, 0xff +; SI-NEXT: v_readlane_b32 s10, v61, 26 +; SI-NEXT: s_lshl_b32 s9, s9, 16 +; SI-NEXT: s_lshl_b32 s10, s10, 24 +; SI-NEXT: s_and_b32 s8, s8, 0xffff +; SI-NEXT: s_or_b32 s9, s10, s9 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x6c, v0 -; SI-NEXT: s_or_b32 s5, s5, s8 +; SI-NEXT: s_or_b32 s8, s8, s9 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_and_b32 s5, s14, 0xff -; SI-NEXT: s_lshl_b32 s8, s12, 8 -; SI-NEXT: s_or_b32 s5, s5, s8 -; SI-NEXT: v_readlane_b32 s8, v61, 26 -; SI-NEXT: v_readlane_b32 s9, v61, 27 +; SI-NEXT: v_mov_b32_e32 v2, s8 +; SI-NEXT: s_and_b32 s8, s14, 0xff ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x70, v0 -; SI-NEXT: s_and_b32 s8, s9, 0xff +; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_and_b32 s8, s53, 0xff ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v26 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v31 ; SI-NEXT: v_or_b32_e32 v1, s8, v1 ; SI-NEXT: v_readlane_b32 s8, v61, 28 -; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_and_b32 s7, s7, 0xffff ; SI-NEXT: v_readlane_b32 s9, v61, 29 -; SI-NEXT: v_or_b32_e32 v1, s5, v1 -; SI-NEXT: s_lshl_b32 s5, s8, 8 +; SI-NEXT: v_or_b32_e32 v1, s7, v1 +; SI-NEXT: s_lshl_b32 s7, s8, 8 ; SI-NEXT: v_readlane_b32 s8, v61, 30 ; SI-NEXT: v_readlane_b32 s9, v61, 31 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s8, 0xff +; SI-NEXT: s_or_b32 s6, s6, s7 +; SI-NEXT: s_and_b32 s7, s8, 0xff ; SI-NEXT: v_readlane_b32 s8, v61, 32 -; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_lshl_b32 s8, s8, 24 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_or_b32 s5, s8, s5 +; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_or_b32 s7, s8, s7 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0 -; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_or_b32 s6, s6, s7 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x78, v0 -; SI-NEXT: v_mov_b32_e32 v2, s4 +; SI-NEXT: v_mov_b32_e32 v2, s6 +; SI-NEXT: s_and_b32 s6, s20, 0xff ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload -; SI-NEXT: s_and_b32 s4, s90, 0xff -; SI-NEXT: s_lshl_b32 s5, s6, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s13, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_or_b32 s4, s6, s4 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v38 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0 -; SI-NEXT: v_readlane_b32 s27, v61, 7 -; SI-NEXT: v_readlane_b32 s21, v61, 13 -; SI-NEXT: v_readlane_b32 s17, v61, 19 -; SI-NEXT: v_readlane_b32 s11, v61, 25 -; SI-NEXT: v_readlane_b32 s9, v61, 33 -; SI-NEXT: v_readlane_b32 s68, v63, 18 -; SI-NEXT: v_readlane_b32 s54, v63, 12 -; SI-NEXT: v_readlane_b32 s38, v63, 4 -; SI-NEXT: v_readlane_b32 s36, v63, 2 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v1 ; SI-NEXT: v_or_b32_e32 v1, s5, v1 ; SI-NEXT: v_or_b32_e32 v1, s4, v1 +; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload @@ -158932,10 +159016,21 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload +; SI-NEXT: v_readlane_b32 s30, v63, 34 +; SI-NEXT: v_readlane_b32 s19, v61, 13 +; SI-NEXT: v_readlane_b32 s13, v61, 21 +; SI-NEXT: v_readlane_b32 s11, v61, 27 +; SI-NEXT: v_readlane_b32 s9, v61, 33 +; SI-NEXT: v_readlane_b32 s31, v63, 35 +; SI-NEXT: v_readlane_b32 s68, v63, 18 +; SI-NEXT: v_readlane_b32 s67, v63, 17 +; SI-NEXT: v_readlane_b32 s53, v63, 11 +; SI-NEXT: v_readlane_b32 s52, v63, 10 +; SI-NEXT: v_readlane_b32 s48, v63, 6 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -158944,8 +159039,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -159017,1040 +159112,1006 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI-NEXT: s_cbranch_scc0 .LBB91_3 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_lshr_b32 s46, s5, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 2 +; VI-NEXT: v_writelane_b32 v62, s46, 18 ; VI-NEXT: s_lshr_b32 s46, s5, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 3 +; VI-NEXT: v_writelane_b32 v62, s46, 19 ; VI-NEXT: s_lshr_b32 s46, s5, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 4 +; VI-NEXT: v_writelane_b32 v62, s46, 20 ; VI-NEXT: s_lshr_b32 s46, s4, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 0 +; VI-NEXT: v_writelane_b32 v62, s46, 16 ; VI-NEXT: s_lshr_b32 s46, s4, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 1 +; VI-NEXT: v_writelane_b32 v62, s46, 17 ; VI-NEXT: s_lshr_b32 s46, s29, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 7 +; VI-NEXT: v_writelane_b32 v62, s46, 23 ; VI-NEXT: s_lshr_b32 s46, s29, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 8 +; VI-NEXT: v_writelane_b32 v62, s46, 24 ; VI-NEXT: s_lshr_b32 s46, s29, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 9 +; VI-NEXT: v_writelane_b32 v62, s46, 25 ; VI-NEXT: s_lshr_b32 s46, s28, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 5 +; VI-NEXT: v_writelane_b32 v62, s46, 21 ; VI-NEXT: s_lshr_b32 s46, s28, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 6 +; VI-NEXT: v_writelane_b32 v62, s46, 22 ; VI-NEXT: s_lshr_b32 s46, s27, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 12 +; VI-NEXT: v_writelane_b32 v62, s46, 28 ; VI-NEXT: s_lshr_b32 s46, s27, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 13 +; VI-NEXT: v_writelane_b32 v62, s46, 29 ; VI-NEXT: s_lshr_b32 s46, s27, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 14 +; VI-NEXT: v_writelane_b32 v62, s46, 30 ; VI-NEXT: s_lshr_b32 s46, s26, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 10 +; VI-NEXT: v_writelane_b32 v62, s46, 26 ; VI-NEXT: s_lshr_b32 s46, s26, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 11 +; VI-NEXT: v_writelane_b32 v62, s46, 27 ; VI-NEXT: s_lshr_b32 s46, s25, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 17 +; VI-NEXT: v_writelane_b32 v62, s46, 33 ; VI-NEXT: s_lshr_b32 s46, s25, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 18 +; VI-NEXT: v_writelane_b32 v62, s46, 34 ; VI-NEXT: s_lshr_b32 s46, s25, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 19 +; VI-NEXT: v_writelane_b32 v62, s46, 35 ; VI-NEXT: s_lshr_b32 s46, s24, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 15 +; VI-NEXT: v_writelane_b32 v62, s46, 31 ; VI-NEXT: s_lshr_b32 s46, s24, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 16 +; VI-NEXT: v_writelane_b32 v62, s46, 32 ; VI-NEXT: s_lshr_b32 s46, s23, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 22 +; VI-NEXT: v_writelane_b32 v62, s46, 38 ; VI-NEXT: s_lshr_b32 s46, s23, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 23 +; VI-NEXT: v_writelane_b32 v62, s46, 39 ; VI-NEXT: s_lshr_b32 s46, s23, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 24 +; VI-NEXT: v_writelane_b32 v62, s46, 40 ; VI-NEXT: s_lshr_b32 s46, s22, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 20 +; VI-NEXT: v_writelane_b32 v62, s46, 36 ; VI-NEXT: s_lshr_b32 s46, s22, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 21 +; VI-NEXT: v_writelane_b32 v62, s46, 37 ; VI-NEXT: s_lshr_b32 s46, s21, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 27 +; VI-NEXT: v_writelane_b32 v62, s46, 43 ; VI-NEXT: s_lshr_b32 s46, s21, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 28 +; VI-NEXT: v_writelane_b32 v62, s46, 44 ; VI-NEXT: s_lshr_b32 s46, s21, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 29 +; VI-NEXT: v_writelane_b32 v62, s46, 45 ; VI-NEXT: s_lshr_b32 s46, s20, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 25 +; VI-NEXT: v_writelane_b32 v62, s46, 41 ; VI-NEXT: s_lshr_b32 s46, s20, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 26 +; VI-NEXT: v_writelane_b32 v62, s46, 42 ; VI-NEXT: s_lshr_b32 s46, s19, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 32 +; VI-NEXT: v_writelane_b32 v62, s46, 48 ; VI-NEXT: s_lshr_b32 s46, s19, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 33 +; VI-NEXT: v_writelane_b32 v62, s46, 49 ; VI-NEXT: s_lshr_b32 s46, s19, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 34 +; VI-NEXT: v_writelane_b32 v62, s46, 50 ; VI-NEXT: s_lshr_b32 s46, s18, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 30 +; VI-NEXT: v_writelane_b32 v62, s46, 46 ; VI-NEXT: s_lshr_b32 s46, s18, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 31 +; VI-NEXT: v_writelane_b32 v62, s46, 47 ; VI-NEXT: s_lshr_b32 s46, s17, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 37 +; VI-NEXT: v_writelane_b32 v62, s46, 53 ; VI-NEXT: s_lshr_b32 s46, s17, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 38 +; VI-NEXT: v_writelane_b32 v62, s46, 54 ; VI-NEXT: s_lshr_b32 s46, s17, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 39 +; VI-NEXT: v_writelane_b32 v62, s46, 55 ; VI-NEXT: s_lshr_b32 s46, s16, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 35 -; VI-NEXT: s_lshr_b32 s46, s16, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 36 -; VI-NEXT: s_lshr_b32 s46, s15, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 40 -; VI-NEXT: s_lshr_b32 s46, s15, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 41 -; VI-NEXT: s_lshr_b32 s46, s15, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 42 -; VI-NEXT: s_lshr_b32 s46, s41, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 45 -; VI-NEXT: s_lshr_b32 s46, s41, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 46 -; VI-NEXT: s_lshr_b32 s46, s41, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 47 -; VI-NEXT: s_lshr_b32 s46, s40, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 43 -; VI-NEXT: s_lshr_b32 s46, s40, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 44 -; VI-NEXT: s_lshr_b32 s46, s43, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 50 -; VI-NEXT: s_lshr_b32 s46, s43, 16 ; VI-NEXT: v_writelane_b32 v62, s46, 51 -; VI-NEXT: s_lshr_b32 s46, s43, 8 +; VI-NEXT: s_lshr_b32 s46, s16, 8 ; VI-NEXT: v_writelane_b32 v62, s46, 52 -; VI-NEXT: s_lshr_b32 s46, s42, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 48 -; VI-NEXT: s_lshr_b32 s46, s42, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 49 -; VI-NEXT: s_lshr_b32 s46, s45, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 55 -; VI-NEXT: s_lshr_b32 s46, s45, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 56 -; VI-NEXT: s_lshr_b32 s46, s45, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 57 -; VI-NEXT: s_lshr_b32 s46, s44, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 53 -; VI-NEXT: s_lshr_b32 s46, s44, 8 -; VI-NEXT: s_lshr_b32 s69, s7, 24 -; VI-NEXT: s_lshr_b32 s68, s7, 16 -; VI-NEXT: s_lshr_b32 s67, s7, 8 -; VI-NEXT: s_lshr_b32 s71, s6, 16 -; VI-NEXT: s_lshr_b32 s70, s6, 8 -; VI-NEXT: s_lshr_b32 s64, s9, 24 -; VI-NEXT: s_lshr_b32 s55, s9, 16 -; VI-NEXT: s_lshr_b32 s54, s9, 8 -; VI-NEXT: s_lshr_b32 s66, s8, 16 -; VI-NEXT: s_lshr_b32 s65, s8, 8 -; VI-NEXT: s_lshr_b32 s53, s11, 24 -; VI-NEXT: s_lshr_b32 s52, s11, 16 -; VI-NEXT: s_lshr_b32 s51, s11, 8 -; VI-NEXT: s_lshr_b32 s87, s10, 16 -; VI-NEXT: s_lshr_b32 s86, s10, 8 -; VI-NEXT: s_lshr_b32 s50, s13, 24 +; VI-NEXT: s_lshr_b32 s78, s45, 16 +; VI-NEXT: v_writelane_b32 v62, s78, 56 +; VI-NEXT: s_lshr_b32 s78, s45, 8 +; VI-NEXT: v_writelane_b32 v62, s78, 57 +; VI-NEXT: s_lshr_b64 s[78:79], s[4:5], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 14 +; VI-NEXT: v_writelane_b32 v62, s79, 15 +; VI-NEXT: s_lshr_b64 s[78:79], s[28:29], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 12 +; VI-NEXT: v_writelane_b32 v62, s79, 13 +; VI-NEXT: s_lshr_b64 s[78:79], s[26:27], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 10 +; VI-NEXT: v_writelane_b32 v62, s79, 11 +; VI-NEXT: s_lshr_b64 s[78:79], s[24:25], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 8 +; VI-NEXT: v_writelane_b32 v62, s79, 9 +; VI-NEXT: s_lshr_b64 s[78:79], s[22:23], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 6 +; VI-NEXT: v_writelane_b32 v62, s79, 7 +; VI-NEXT: s_lshr_b64 s[78:79], s[20:21], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 4 +; VI-NEXT: v_writelane_b32 v62, s79, 5 +; VI-NEXT: s_lshr_b64 s[78:79], s[18:19], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 2 +; VI-NEXT: v_writelane_b32 v62, s79, 3 +; VI-NEXT: s_lshr_b64 s[78:79], s[16:17], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 0 +; VI-NEXT: s_lshr_b32 s77, s7, 24 +; VI-NEXT: s_lshr_b32 s76, s7, 16 +; VI-NEXT: s_lshr_b32 s75, s7, 8 +; VI-NEXT: s_lshr_b32 s84, s6, 16 +; VI-NEXT: s_lshr_b32 s50, s6, 8 +; VI-NEXT: s_lshr_b32 s72, s9, 24 +; VI-NEXT: s_lshr_b32 s63, s9, 16 +; VI-NEXT: s_lshr_b32 s62, s9, 8 +; VI-NEXT: s_lshr_b32 s74, s8, 16 +; VI-NEXT: s_lshr_b32 s73, s8, 8 +; VI-NEXT: s_lshr_b32 s59, s11, 24 +; VI-NEXT: s_lshr_b32 s58, s11, 16 +; VI-NEXT: s_lshr_b32 s57, s11, 8 +; VI-NEXT: s_lshr_b32 s61, s10, 16 +; VI-NEXT: s_lshr_b32 s60, s10, 8 +; VI-NEXT: s_lshr_b32 s46, s13, 24 ; VI-NEXT: s_lshr_b32 s83, s13, 16 ; VI-NEXT: s_lshr_b32 s82, s13, 8 -; VI-NEXT: s_lshr_b32 s85, s12, 16 -; VI-NEXT: s_lshr_b32 s84, s12, 8 +; VI-NEXT: s_lshr_b32 s56, s12, 16 +; VI-NEXT: s_lshr_b32 s47, s12, 8 +; VI-NEXT: s_lshr_b32 s71, s15, 24 +; VI-NEXT: s_lshr_b32 s70, s15, 16 +; VI-NEXT: s_lshr_b32 s69, s15, 8 ; VI-NEXT: s_lshr_b32 s81, s14, 16 ; VI-NEXT: s_lshr_b32 s80, s14, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 54 -; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; VI-NEXT: s_lshr_b64 s[56:57], s[28:29], 24 -; VI-NEXT: s_lshr_b64 s[58:59], s[26:27], 24 -; VI-NEXT: s_lshr_b64 s[60:61], s[24:25], 24 -; VI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24 -; VI-NEXT: s_lshr_b64 s[72:73], s[20:21], 24 -; VI-NEXT: s_lshr_b64 s[74:75], s[18:19], 24 -; VI-NEXT: s_lshr_b64 s[76:77], s[16:17], 24 -; VI-NEXT: s_lshr_b64 s[78:79], s[6:7], 24 -; VI-NEXT: s_lshr_b64 s[88:89], s[8:9], 24 -; VI-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 -; VI-NEXT: s_lshr_b64 s[30:31], s[12:13], 24 -; VI-NEXT: s_lshr_b64 s[34:35], s[14:15], 24 -; VI-NEXT: s_lshr_b64 s[36:37], s[40:41], 24 -; VI-NEXT: s_lshr_b64 s[38:39], s[42:43], 24 -; VI-NEXT: s_lshr_b64 s[48:49], s[44:45], 24 +; VI-NEXT: s_lshr_b32 s66, s41, 24 +; VI-NEXT: s_lshr_b32 s65, s41, 16 +; VI-NEXT: s_lshr_b32 s64, s41, 8 +; VI-NEXT: s_lshr_b32 s68, s40, 16 +; VI-NEXT: s_lshr_b32 s67, s40, 8 +; VI-NEXT: s_lshr_b32 s53, s43, 24 +; VI-NEXT: s_lshr_b32 s52, s43, 16 +; VI-NEXT: s_lshr_b32 s51, s43, 8 +; VI-NEXT: s_lshr_b32 s55, s42, 16 +; VI-NEXT: s_lshr_b32 s54, s42, 8 +; VI-NEXT: s_lshr_b32 s85, s45, 24 +; VI-NEXT: s_lshr_b32 s87, s44, 16 +; VI-NEXT: s_lshr_b32 s86, s44, 8 +; VI-NEXT: v_writelane_b32 v62, s79, 1 +; VI-NEXT: s_lshr_b64 s[48:49], s[6:7], 24 +; VI-NEXT: s_lshr_b64 s[38:39], s[8:9], 24 +; VI-NEXT: s_lshr_b64 s[36:37], s[10:11], 24 +; VI-NEXT: s_lshr_b64 s[34:35], s[12:13], 24 +; VI-NEXT: s_lshr_b64 s[30:31], s[14:15], 24 +; VI-NEXT: s_lshr_b64 s[90:91], s[40:41], 24 +; VI-NEXT: s_lshr_b64 s[88:89], s[42:43], 24 +; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 ; VI-NEXT: s_cbranch_execnz .LBB91_4 ; VI-NEXT: .LBB91_2: ; %cmp.true ; VI-NEXT: s_lshl_b32 s46, s45, 16 -; VI-NEXT: v_mov_b32_e32 v2, 0x40c00000 -; VI-NEXT: v_add_f32_e32 v1, s46, v2 -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_mov_b32_e32 v1, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v2, s46, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s45, s45, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s45, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s45, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4] -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s45, s44, 16 -; VI-NEXT: v_add_f32_e32 v1, s45, v2 -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s45, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s44, s44, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s44, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s44, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_lshrrev_b64 v[3:4], 16, v[3:4] +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s44, s43, 16 -; VI-NEXT: v_add_f32_e32 v1, s44, v2 -; VI-NEXT: s_and_b32 s43, s43, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v4, v6 -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[7:8], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s44, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s43, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: s_and_b32 s43, s43, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s43, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4] -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s43, s42, 16 -; VI-NEXT: v_add_f32_e32 v1, s43, v2 -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s43, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s42, s42, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s42, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s42, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s42, s41, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s42, v2 -; VI-NEXT: v_lshrrev_b64 v[59:60], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[57:58], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s42, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s41, s41, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s41, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s41, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s41, s40, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s41, v2 -; VI-NEXT: s_and_b32 s40, s40, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v60, v6 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s41, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s40, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: s_and_b32 s40, s40, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s40, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s40, s15, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s40, v2 -; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[46:47], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s40, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s15, s15, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s15, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s15, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s15, s14, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s15, v2 -; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[59:60], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s15, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s14, s14, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s14, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s14, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s14, s13, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s14, v2 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[11:12], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s14, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s13, s13, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s13, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s13, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s13, s12, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s13, v2 -; VI-NEXT: v_lshrrev_b64 v[55:56], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s13, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s12, s12, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s12, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s12, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s12, s11, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s12, v2 -; VI-NEXT: v_lshrrev_b64 v[21:22], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s12, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s11, s11, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s11, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s11, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s11, s10, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s11, v2 -; VI-NEXT: v_lshrrev_b64 v[57:58], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[40:41], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s11, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s10, s10, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s10, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s10, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s10, s9, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s10, v2 -; VI-NEXT: v_lshrrev_b64 v[40:41], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s10, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s9, s9, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s9, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s9, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s9, s8, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s9, v2 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[41:42], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s9, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s8, s8, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s8, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s8, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s8, s7, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s8, v2 -; VI-NEXT: v_lshrrev_b64 v[42:43], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s8, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s7, s7, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s7, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s7, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s7, s6, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s7, v2 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[60:61], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s7, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s6, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s17, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[23:24], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s17, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s16, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[46:47], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[25:26], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s16, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s19, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s19, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s18, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s18, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s21, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[29:30], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[29:30], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s21, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s20, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s20, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s23, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s23, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s22, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[34:35], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[34:35], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s22, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s25, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s25, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s24, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s24, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s27, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s27, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s26, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[48:49], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[48:49], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s26, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s29, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[49:50], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[49:50], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s29, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s28, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[51:52], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[51:52], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s6, s28, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s6, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s6, s5, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s6, v2 -; VI-NEXT: v_lshrrev_b64 v[52:53], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_lshrrev_b64 v[52:53], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s6, v1 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s5, s5, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v1, s5, v2 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v4, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_add_f32_e32 v3, s5, v1 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_lshl_b32 s5, s4, 16 -; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; VI-NEXT: v_add_f32_e32 v1, s5, v2 -; VI-NEXT: v_lshrrev_b64 v[19:20], 16, v[3:4] -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: s_and_b32 s4, s4, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_add_f32_e32 v2, s4, v2 -; VI-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc +; VI-NEXT: v_lshrrev_b64 v[54:55], 16, v[2:3] +; VI-NEXT: v_add_f32_e32 v2, s5, v1 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s4, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_add_f32_e32 v1, s4, v1 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_lshrrev_b64 v[44:45], 16, v[1:2] -; VI-NEXT: v_mov_b32_e32 v45, v19 -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[44:45] +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; VI-NEXT: v_lshrrev_b64 v[42:43], 16, v[2:3] +; VI-NEXT: v_mov_b32_e32 v43, v54 +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[42:43] ; VI-NEXT: v_mov_b32_e32 v53, v51 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[52:53] -; VI-NEXT: v_mov_b32_e32 v50, v48 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v39, v37 -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[49:50] -; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[38:39] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[38:39] ; VI-NEXT: v_mov_b32_e32 v36, v34 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[35:36] +; VI-NEXT: v_mov_b32_e32 v30, v28 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v27, v25 +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30] +; VI-NEXT: v_mov_b32_e32 v24, v60 +; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[26:27] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[23:24] +; VI-NEXT: v_mov_b32_e32 v21, v41 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[20:21] +; VI-NEXT: v_mov_b32_e32 v18, v40 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[17:18] +; VI-NEXT: v_mov_b32_e32 v16, v14 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[15:16] +; VI-NEXT: v_mov_b32_e32 v12, v59 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[11:12] +; VI-NEXT: v_mov_b32_e32 v47, v10 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[46:47] +; VI-NEXT: v_mov_b32_e32 v58, v9 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[57:58] +; VI-NEXT: v_mov_b32_e32 v8, v6 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[7:8] +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v54 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v54 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v42 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v51 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v51 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v51 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v52 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v52 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v48 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v48 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v48 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v49 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v49 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v37 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v37 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v37 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v38 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v38 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v34 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v34 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v34 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v35 ; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v35 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v60 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v60 +; VI-NEXT: v_lshrrev_b32_e32 v4, 8, v25 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v3, v60 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v60 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v23 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v23 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v41 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v41 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v41 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v20 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v20 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v40 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v40 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v3, v40 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v40 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v17 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v17 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v14 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v14 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v3, v14 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v14 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v15 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v3, v15 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v15 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v59 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v59 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v3, v59 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v3, v10 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v3, v46 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v50, v48 ; VI-NEXT: v_mov_b32_e32 v33, v31 -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[35:36] -; VI-NEXT: v_mov_b32_e32 v30, v24 -; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[32:33] -; VI-NEXT: v_mov_b32_e32 v15, v6 -; VI-NEXT: v_mov_b32_e32 v27, v46 -; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[29:30] -; VI-NEXT: v_lshrrev_b64 v[6:7], 24, v[26:27] -; VI-NEXT: v_mov_b32_e32 v7, v8 -; VI-NEXT: v_mov_b32_e32 v10, v8 -; VI-NEXT: v_lshrrev_b32_e32 v30, 24, v46 -; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v46 -; VI-NEXT: v_mov_b32_e32 v47, v46 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v46 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v8 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[9:10] -; VI-NEXT: v_mov_b32_e32 v43, v12 -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v7, v9 -; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[42:43] -; VI-NEXT: v_mov_b32_e32 v41, v57 -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[40:41] -; VI-NEXT: v_mov_b32_e32 v22, v55 -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[21:22] -; VI-NEXT: v_mov_b32_e32 v18, v16 -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[17:18] -; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[14:15] -; VI-NEXT: v_mov_b32_e32 v18, v14 -; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v19 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v19 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v19 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v44 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v44 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v51 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v51 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v52 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v52 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v48 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v48 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v48 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v49 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v49 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v37 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v37 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v37 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v38 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v34 -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v34 -; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[59:60] -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v34 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v35 -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v35 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v31 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v31 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v51 -; VI-NEXT: v_mov_b32_e32 v27, v34 -; VI-NEXT: v_mov_b32_e32 v60, v31 -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v31 -; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v8 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v9 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v12 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v12 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v7, v12 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v12 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v42 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v7, v42 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v42 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v57 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v57 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v7, v57 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v57 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v40 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v7, v40 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v40 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v55 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v55 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v7, v55 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v55 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v21 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v21 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v16 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v16 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v16 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v17 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v17 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_mov_b32_e32 v7, v12 -; VI-NEXT: v_lshrrev_b32_e32 v12, 24, v7 -; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; VI-NEXT: v_mov_b32_e32 v8, v16 -; VI-NEXT: v_mov_b32_e32 v16, v17 -; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v12, v7 -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v14 -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[53:54] -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v24 -; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v24 -; VI-NEXT: v_mov_b32_e32 v23, v24 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v24 -; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v29 -; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v29 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v26 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v9 -; VI-NEXT: v_mov_b32_e32 v42, v21 -; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v59 -; VI-NEXT: v_mov_b32_e32 v41, v59 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v59 -; VI-NEXT: v_mov_b32_e32 v59, v53 -; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: v_mov_b32_e32 v15, v14 -; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_mov_b32_e32 v36, v55 -; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v15 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v15 -; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v36 -; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v36 -; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_mov_b32_e32 v56, v36 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v36 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v53 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v53 +; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[49:50] +; VI-NEXT: v_lshrrev_b64 v[44:45], 24, v[32:33] +; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v42 +; VI-NEXT: v_mov_b32_e32 v14, v24 +; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v9 +; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v9 +; VI-NEXT: v_mov_b32_e32 v3, v9 +; VI-NEXT: v_lshrrev_b32_e32 v10, 8, v9 +; VI-NEXT: v_mov_b32_e32 v9, v6 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v3, v57 +; VI-NEXT: v_mov_b32_e32 v9, v7 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v30, 24, v31 +; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v31 +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v31 +; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v28 +; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v28 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v28 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v29 +; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v29 +; VI-NEXT: v_lshrrev_b32_e32 v13, 24, v25 +; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v25 +; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v26 +; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v26 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v59 +; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v46 +; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v46 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v57 +; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v57 +; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v54 ; VI-NEXT: s_branch .LBB91_5 ; VI-NEXT: .LBB91_3: ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr80 -; VI-NEXT: ; implicit-def: $sgpr81 -; VI-NEXT: ; implicit-def: $sgpr84 -; VI-NEXT: ; implicit-def: $sgpr85 -; VI-NEXT: ; implicit-def: $sgpr82 -; VI-NEXT: ; implicit-def: $sgpr83 -; VI-NEXT: ; implicit-def: $sgpr50 ; VI-NEXT: ; implicit-def: $sgpr86 ; VI-NEXT: ; implicit-def: $sgpr87 +; VI-NEXT: ; implicit-def: $sgpr78 +; VI-NEXT: ; implicit-def: $sgpr85 +; VI-NEXT: ; implicit-def: $sgpr54 +; VI-NEXT: ; implicit-def: $sgpr55 +; VI-NEXT: ; implicit-def: $sgpr88 ; VI-NEXT: ; implicit-def: $sgpr51 ; VI-NEXT: ; implicit-def: $sgpr52 ; VI-NEXT: ; implicit-def: $sgpr53 +; VI-NEXT: ; implicit-def: $sgpr67 +; VI-NEXT: ; implicit-def: $sgpr68 +; VI-NEXT: ; implicit-def: $sgpr90 +; VI-NEXT: ; implicit-def: $sgpr64 ; VI-NEXT: ; implicit-def: $sgpr65 ; VI-NEXT: ; implicit-def: $sgpr66 -; VI-NEXT: ; implicit-def: $sgpr54 -; VI-NEXT: ; implicit-def: $sgpr55 -; VI-NEXT: ; implicit-def: $sgpr64 +; VI-NEXT: ; implicit-def: $sgpr80 +; VI-NEXT: ; implicit-def: $sgpr81 +; VI-NEXT: ; implicit-def: $sgpr30 +; VI-NEXT: ; implicit-def: $sgpr69 ; VI-NEXT: ; implicit-def: $sgpr70 ; VI-NEXT: ; implicit-def: $sgpr71 -; VI-NEXT: ; implicit-def: $sgpr67 -; VI-NEXT: ; implicit-def: $sgpr68 -; VI-NEXT: ; implicit-def: $sgpr69 -; VI-NEXT: ; implicit-def: $sgpr76 -; VI-NEXT: ; implicit-def: $sgpr74 -; VI-NEXT: ; implicit-def: $sgpr72 -; VI-NEXT: ; implicit-def: $sgpr62 +; VI-NEXT: ; implicit-def: $sgpr56 +; VI-NEXT: ; implicit-def: $sgpr34 +; VI-NEXT: ; implicit-def: $sgpr82 +; VI-NEXT: ; implicit-def: $sgpr83 ; VI-NEXT: ; implicit-def: $sgpr60 +; VI-NEXT: ; implicit-def: $sgpr61 +; VI-NEXT: ; implicit-def: $sgpr36 +; VI-NEXT: ; implicit-def: $sgpr57 ; VI-NEXT: ; implicit-def: $sgpr58 -; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr48 +; VI-NEXT: ; implicit-def: $sgpr59 +; VI-NEXT: ; implicit-def: $sgpr73 +; VI-NEXT: ; implicit-def: $sgpr74 ; VI-NEXT: ; implicit-def: $sgpr38 -; VI-NEXT: ; implicit-def: $sgpr36 -; VI-NEXT: ; implicit-def: $sgpr34 -; VI-NEXT: ; implicit-def: $sgpr30 -; VI-NEXT: ; implicit-def: $sgpr90 -; VI-NEXT: ; implicit-def: $sgpr88 -; VI-NEXT: ; implicit-def: $sgpr78 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr62 +; VI-NEXT: ; implicit-def: $sgpr63 +; VI-NEXT: ; implicit-def: $sgpr72 +; VI-NEXT: ; implicit-def: $sgpr50 +; VI-NEXT: ; implicit-def: $sgpr84 +; VI-NEXT: ; implicit-def: $sgpr48 +; VI-NEXT: ; implicit-def: $sgpr75 +; VI-NEXT: ; implicit-def: $sgpr76 +; VI-NEXT: ; implicit-def: $sgpr77 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 0 +; VI-NEXT: v_writelane_b32 v62, s47, 1 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -160062,7 +160123,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 2 +; VI-NEXT: v_writelane_b32 v62, s47, 3 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -160074,7 +160136,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 4 +; VI-NEXT: v_writelane_b32 v62, s47, 5 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -160086,7 +160149,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 6 +; VI-NEXT: v_writelane_b32 v62, s47, 7 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -160098,7 +160162,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 8 +; VI-NEXT: v_writelane_b32 v62, s47, 9 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -160110,7 +160175,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 10 +; VI-NEXT: v_writelane_b32 v62, s47, 11 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -160122,7 +160188,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 12 +; VI-NEXT: v_writelane_b32 v62, s47, 13 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -160134,7 +160201,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 14 +; VI-NEXT: v_writelane_b32 v62, s47, 15 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -160145,311 +160213,329 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr47 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: s_branch .LBB91_2 ; VI-NEXT: .LBB91_4: -; VI-NEXT: v_readlane_b32 s47, v62, 0 -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 1 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 2 +; VI-NEXT: v_mov_b32_e32 v1, s7 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s11 +; VI-NEXT: v_mov_b32_e32 v60, s69 +; VI-NEXT: v_mov_b32_e32 v59, s48 +; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v59, s38 +; VI-NEXT: v_mov_b32_e32 v42, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 16 +; VI-NEXT: v_mov_b32_e32 v14, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 17 +; VI-NEXT: v_mov_b32_e32 v54, s5 +; VI-NEXT: v_mov_b32_e32 v41, s9 +; VI-NEXT: v_mov_b32_e32 v40, s88 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v40, s78 +; VI-NEXT: v_mov_b32_e32 v52, s28 +; VI-NEXT: v_mov_b32_e32 v51, s29 +; VI-NEXT: v_mov_b32_e32 v49, s26 +; VI-NEXT: v_mov_b32_e32 v48, s27 +; VI-NEXT: v_mov_b32_e32 v38, s24 +; VI-NEXT: v_mov_b32_e32 v37, s25 +; VI-NEXT: v_mov_b32_e32 v35, s22 +; VI-NEXT: v_mov_b32_e32 v34, s23 +; VI-NEXT: v_mov_b32_e32 v32, s20 +; VI-NEXT: v_mov_b32_e32 v31, s21 +; VI-NEXT: v_mov_b32_e32 v29, s18 +; VI-NEXT: v_mov_b32_e32 v28, s19 +; VI-NEXT: v_mov_b32_e32 v26, s16 +; VI-NEXT: v_mov_b32_e32 v25, s17 +; VI-NEXT: v_mov_b32_e32 v23, s6 +; VI-NEXT: v_mov_b32_e32 v20, s8 +; VI-NEXT: v_mov_b32_e32 v17, s10 +; VI-NEXT: v_mov_b32_e32 v11, s14 +; VI-NEXT: v_mov_b32_e32 v21, s80 +; VI-NEXT: v_mov_b32_e32 v33, s68 +; VI-NEXT: v_mov_b32_e32 v39, s67 +; VI-NEXT: v_mov_b32_e32 v24, s66 +; VI-NEXT: v_mov_b32_e32 v27, s65 +; VI-NEXT: v_mov_b32_e32 v15, s64 +; VI-NEXT: v_mov_b32_e32 v46, s55 +; VI-NEXT: v_mov_b32_e32 v55, s54 +; VI-NEXT: v_mov_b32_e32 v53, s53 +; VI-NEXT: v_mov_b32_e32 v45, s52 +; VI-NEXT: v_mov_b32_e32 v10, s51 +; VI-NEXT: v_mov_b32_e32 v58, s87 +; VI-NEXT: v_mov_b32_e32 v9, s86 +; VI-NEXT: v_mov_b32_e32 v3, s85 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s12 +; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v59, s36 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s13 +; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v59, s34 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 3 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s15 +; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v59, s30 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s40 +; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v59, s90 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 4 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 5 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 6 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 7 -; VI-NEXT: v_mov_b32_e32 v7, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 9 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 10 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 11 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 12 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 13 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 14 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 15 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 16 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 17 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 18 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 19 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 20 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 21 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 22 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 23 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 24 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 25 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 26 -; VI-NEXT: v_mov_b32_e32 v34, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 27 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 28 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s70 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s41 +; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v59, s69 +; VI-NEXT: v_mov_b32_e32 v60, s81 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s42 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s43 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s44 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s45 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 18 +; VI-NEXT: v_mov_b32_e32 v7, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 19 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s66 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s65 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s64 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s55 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s54 -; VI-NEXT: v_readlane_b32 s47, v62, 29 +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 20 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 21 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 22 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s87 -; VI-NEXT: v_mov_b32_e32 v10, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 30 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s86 -; VI-NEXT: v_mov_b32_e32 v24, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 31 +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 23 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 24 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 25 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 26 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 27 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s53 -; VI-NEXT: v_mov_b32_e32 v2, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 32 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s52 -; VI-NEXT: v_mov_b32_e32 v28, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 33 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s51 -; VI-NEXT: v_mov_b32_e32 v11, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 34 +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 28 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 29 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s85 -; VI-NEXT: v_mov_b32_e32 v31, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 35 +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 30 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 31 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 32 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 33 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 34 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 35 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s84 -; VI-NEXT: v_mov_b32_e32 v33, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 36 +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 36 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 37 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 38 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 39 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 40 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s84 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s50 -; VI-NEXT: v_mov_b32_e32 v58, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 37 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s77 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s76 +; VI-NEXT: v_readlane_b32 s4, v62, 41 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s75 +; VI-NEXT: v_mov_b32_e32 v36, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 42 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s74 +; VI-NEXT: v_mov_b32_e32 v19, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 43 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s73 +; VI-NEXT: v_mov_b32_e32 v30, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 44 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s72 +; VI-NEXT: v_mov_b32_e32 v8, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 45 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s63 +; VI-NEXT: v_mov_b32_e32 v50, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 46 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s62 +; VI-NEXT: v_mov_b32_e32 v22, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 47 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s61 +; VI-NEXT: v_mov_b32_e32 v61, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 48 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s60 +; VI-NEXT: v_mov_b32_e32 v47, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 49 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s59 +; VI-NEXT: v_mov_b32_e32 v56, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 50 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s58 +; VI-NEXT: v_mov_b32_e32 v5, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 51 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s57 +; VI-NEXT: v_mov_b32_e32 v16, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 52 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s56 +; VI-NEXT: v_mov_b32_e32 v18, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 53 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s47 +; VI-NEXT: v_mov_b32_e32 v13, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 54 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s46 +; VI-NEXT: v_mov_b32_e32 v12, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 55 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s83 -; VI-NEXT: v_mov_b32_e32 v30, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 38 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v4, s4 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s82 -; VI-NEXT: v_mov_b32_e32 v25, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 39 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s81 -; VI-NEXT: v_mov_b32_e32 v50, s47 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s80 -; VI-NEXT: v_readlane_b32 s47, v62, 40 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 41 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 42 +; VI-NEXT: v_readlane_b32 s4, v62, 56 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s71 +; VI-NEXT: v_mov_b32_e32 v57, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 57 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 43 -; VI-NEXT: v_mov_b32_e32 v20, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 44 -; VI-NEXT: v_mov_b32_e32 v17, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 45 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 46 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s7 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s9 -; VI-NEXT: v_mov_b32_e32 v8, s15 -; VI-NEXT: v_mov_b32_e32 v22, v7 -; VI-NEXT: v_mov_b32_e32 v7, s90 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s10 -; VI-NEXT: v_mov_b32_e32 v7, s30 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s11 -; VI-NEXT: v_mov_b32_e32 v7, s34 +; VI-NEXT: v_mov_b32_e32 v1, s70 +; VI-NEXT: v_mov_b32_e32 v6, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 14 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s13 -; VI-NEXT: v_mov_b32_e32 v7, s36 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s46 -; VI-NEXT: v_mov_b32_e32 v7, s38 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_readlane_b32 s47, v62, 47 -; VI-NEXT: v_mov_b32_e32 v13, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 48 -; VI-NEXT: v_mov_b32_e32 v21, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 49 -; VI-NEXT: v_mov_b32_e32 v9, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 50 -; VI-NEXT: v_mov_b32_e32 v54, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 51 -; VI-NEXT: v_mov_b32_e32 v39, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 52 -; VI-NEXT: v_mov_b32_e32 v40, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 53 -; VI-NEXT: v_mov_b32_e32 v36, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 54 -; VI-NEXT: v_mov_b32_e32 v53, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 55 -; VI-NEXT: v_mov_b32_e32 v46, s68 -; VI-NEXT: v_mov_b32_e32 v15, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 56 +; VI-NEXT: v_readlane_b32 s5, v62, 15 +; VI-NEXT: v_readlane_b32 s4, v62, 12 +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s5, v62, 13 +; VI-NEXT: v_readlane_b32 s4, v62, 10 +; VI-NEXT: v_readlane_b32 s5, v62, 11 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v43, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 8 +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s5, v62, 9 +; VI-NEXT: v_readlane_b32 s4, v62, 6 +; VI-NEXT: v_readlane_b32 s5, v62, 7 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 4 +; VI-NEXT: v_readlane_b32 s5, v62, 5 ; VI-NEXT: v_mov_b32_e32 v44, s4 -; VI-NEXT: v_mov_b32_e32 v1, s56 -; VI-NEXT: v_mov_b32_e32 v3, s60 -; VI-NEXT: v_mov_b32_e32 v45, s78 -; VI-NEXT: v_mov_b32_e32 v43, s88 -; VI-NEXT: v_mov_b32_e32 v7, s48 -; VI-NEXT: v_mov_b32_e32 v55, s47 -; VI-NEXT: v_readlane_b32 s47, v62, 57 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v61, s71 -; VI-NEXT: v_mov_b32_e32 v57, s47 -; VI-NEXT: v_mov_b32_e32 v19, s5 -; VI-NEXT: v_mov_b32_e32 v52, s28 -; VI-NEXT: v_mov_b32_e32 v51, s29 -; VI-NEXT: v_mov_b32_e32 v49, s26 -; VI-NEXT: v_mov_b32_e32 v48, s27 -; VI-NEXT: v_mov_b32_e32 v38, s24 -; VI-NEXT: v_mov_b32_e32 v37, s25 -; VI-NEXT: v_mov_b32_e32 v35, s22 -; VI-NEXT: v_mov_b32_e32 v27, s23 -; VI-NEXT: v_mov_b32_e32 v32, s20 -; VI-NEXT: v_mov_b32_e32 v60, s21 -; VI-NEXT: v_mov_b32_e32 v29, s18 -; VI-NEXT: v_mov_b32_e32 v23, s19 -; VI-NEXT: v_mov_b32_e32 v26, s16 -; VI-NEXT: v_mov_b32_e32 v47, s17 -; VI-NEXT: v_mov_b32_e32 v42, s12 -; VI-NEXT: v_mov_b32_e32 v16, s14 -; VI-NEXT: v_mov_b32_e32 v18, s40 -; VI-NEXT: v_mov_b32_e32 v12, s41 -; VI-NEXT: v_mov_b32_e32 v41, s42 -; VI-NEXT: v_mov_b32_e32 v14, s43 -; VI-NEXT: v_mov_b32_e32 v59, s44 -; VI-NEXT: v_mov_b32_e32 v56, s45 -; VI-NEXT: v_mov_b32_e32 v1, s58 -; VI-NEXT: v_mov_b32_e32 v3, s62 -; VI-NEXT: v_mov_b32_e32 v4, s72 -; VI-NEXT: v_mov_b32_e32 v5, s74 -; VI-NEXT: v_mov_b32_e32 v6, s76 -; VI-NEXT: v_mov_b32_e32 v45, s69 -; VI-NEXT: v_mov_b32_e32 v43, s67 -; VI-NEXT: v_mov_b32_e32 v7, v20 -; VI-NEXT: v_mov_b32_e32 v20, v10 +; VI-NEXT: v_readlane_b32 s4, v62, 2 +; VI-NEXT: v_readlane_b32 s5, v62, 3 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 0 +; VI-NEXT: v_readlane_b32 s5, v62, 1 +; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: .LBB91_5: ; %end ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v6, v33, v6, s4 -; VI-NEXT: v_perm_b32 v26, v26, v58, s4 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; VI-NEXT: v_or_b32_e32 v6, v26, v6 -; VI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v6, v25, v30, s4 -; VI-NEXT: v_perm_b32 v33, v47, v50, s4 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; VI-NEXT: v_or_b32_e32 v6, v33, v6 -; VI-NEXT: v_add_u32_e32 v25, vcc, 4, v0 -; VI-NEXT: v_perm_b32 v5, v24, v5, s4 -; VI-NEXT: buffer_store_dword v6, v25, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v6, v29, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_or_b32_e32 v5, v6, v5 -; VI-NEXT: v_add_u32_e32 v6, vcc, 8, v0 -; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v6, v11, v28, s4 -; VI-NEXT: v_perm_b32 v5, v23, v31, s4 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; VI-NEXT: v_or_b32_e32 v5, v5, v6 -; VI-NEXT: v_add_u32_e32 v6, vcc, 12, v0 -; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v5, v32, v34, s4 +; VI-NEXT: v_perm_b32 v2, v16, v2, s4 +; VI-NEXT: v_perm_b32 v18, v26, v18, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v2, v18, v2 +; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v2, v25, v4, s4 +; VI-NEXT: v_perm_b32 v4, v12, v13, s4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; VI-NEXT: v_or_b32_e32 v2, v2, v4 +; VI-NEXT: v_add_u32_e32 v4, vcc, 4, v0 +; VI-NEXT: v_perm_b32 v1, v22, v1, s4 +; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v2, v29, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v2, v56, v47, s4 +; VI-NEXT: v_perm_b32 v1, v28, v5, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v2, v36, v44, s4 +; VI-NEXT: v_perm_b32 v1, v32, v19, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v2, v8, v30, s4 +; VI-NEXT: v_perm_b32 v1, v31, v50, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; VI-NEXT: v_readlane_b32 s30, v63, 30 ; VI-NEXT: v_readlane_b32 s31, v63, 31 ; VI-NEXT: v_readlane_b32 s87, v63, 29 @@ -160482,299 +160568,290 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI-NEXT: v_readlane_b32 s36, v63, 2 ; VI-NEXT: v_readlane_b32 s35, v63, 1 ; VI-NEXT: v_readlane_b32 s34, v63, 0 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v4, v2, v4, s4 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_or_b32_e32 v4, v5, v4 -; VI-NEXT: v_add_u32_e32 v5, vcc, 16, v0 -; VI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v4, v60, v20, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v5, v5, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_or_b32_e32 v4, v4, v5 -; VI-NEXT: v_add_u32_e32 v5, vcc, 20, v0 -; VI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v4, v35, v2, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v4, s4 +; VI-NEXT: v_perm_b32 v1, v35, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v4, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v2, v3, s4 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v3, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, 24, v0 -; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v27, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v4, v4, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_or_b32_e32 v3, v3, v4 -; VI-NEXT: v_add_u32_e32 v4, vcc, 28, v0 -; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v38, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v34, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v2, v4, s4 +; VI-NEXT: v_perm_b32 v1, v38, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v2, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0 -; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v3, v4, v3, s4 +; VI-NEXT: v_perm_b32 v2, v4, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v37, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v2, v2, v3 -; VI-NEXT: v_add_u32_e32 v3, vcc, 36, v0 -; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v37, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v49, v2, s4 +; VI-NEXT: v_perm_b32 v1, v49, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v3, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v2, v43, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_perm_b32 v2, v4, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v48, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v2, v2, v4, s4 ; VI-NEXT: v_perm_b32 v1, v52, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v51, v1, s4 +; VI-NEXT: v_perm_b32 v2, v4, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v22, s4 +; VI-NEXT: v_perm_b32 v1, v51, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 -; VI-NEXT: v_perm_b32 v1, v44, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v4, v42, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 +; VI-NEXT: v_perm_b32 v1, v14, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v1, v4, v1 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_perm_b32 v1, v54, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v19, v1, s4 +; VI-NEXT: v_perm_b32 v2, v2, v7, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v59, v53, s4 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v36, v2, s4 +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v58, v4, s4 +; VI-NEXT: v_perm_b32 v1, v1, v9, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v55, v15, s4 -; VI-NEXT: v_perm_b32 v1, v56, v57, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v57, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_perm_b32 v1, v1, v6, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v41, v9, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: v_perm_b32 v1, v1, v55, s4 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v21, v2, s4 +; VI-NEXT: v_perm_b32 v2, v46, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v39, v54, s4 -; VI-NEXT: v_perm_b32 v1, v14, v40, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v45, v53, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_perm_b32 v1, v1, v10, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v18, v17, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: v_perm_b32 v1, v1, v39, s4 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v7, v2, s4 +; VI-NEXT: v_perm_b32 v2, v33, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v12, v13, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_perm_b32 v2, v27, v24, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_perm_b32 v1, v1, v15, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v11, v21, s4 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v16, v1, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_perm_b32 v2, v60, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: v_perm_b32 v1, v1, v59, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v8, v1, s4 +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v42, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v17, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v20, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v41, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v61, v2, s4 +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v1, v23, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v46, v45, s4 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v3, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 -; VI-NEXT: v_perm_b32 v1, v1, v43, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload @@ -160792,8 +160869,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -160802,8 +160879,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -160856,16 +160933,17 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: v_writelane_b32 v63, s30, 34 ; GFX9-NEXT: v_writelane_b32 v63, s31, 35 ; GFX9-NEXT: v_readfirstlane_b32 s4, v19 +; GFX9-NEXT: v_mov_b32_e32 v39, v0 ; GFX9-NEXT: v_readfirstlane_b32 s7, v18 ; GFX9-NEXT: v_readfirstlane_b32 s6, v17 ; GFX9-NEXT: v_readfirstlane_b32 s9, v16 ; GFX9-NEXT: v_readfirstlane_b32 s8, v15 ; GFX9-NEXT: v_readfirstlane_b32 s11, v14 ; GFX9-NEXT: v_readfirstlane_b32 s10, v13 -; GFX9-NEXT: v_readfirstlane_b32 s15, v12 -; GFX9-NEXT: v_readfirstlane_b32 s14, v11 -; GFX9-NEXT: v_readfirstlane_b32 s13, v10 -; GFX9-NEXT: v_readfirstlane_b32 s12, v9 +; GFX9-NEXT: v_readfirstlane_b32 s13, v12 +; GFX9-NEXT: v_readfirstlane_b32 s12, v11 +; GFX9-NEXT: v_readfirstlane_b32 s15, v10 +; GFX9-NEXT: v_readfirstlane_b32 s14, v9 ; GFX9-NEXT: v_readfirstlane_b32 s41, v8 ; GFX9-NEXT: v_readfirstlane_b32 s40, v7 ; GFX9-NEXT: v_readfirstlane_b32 s43, v6 @@ -160879,999 +160957,1024 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: s_cbranch_scc0 .LBB91_3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: s_lshr_b32 s46, s5, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 17 +; GFX9-NEXT: v_writelane_b32 v62, s46, 27 ; GFX9-NEXT: s_lshr_b32 s46, s5, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 1 +; GFX9-NEXT: v_writelane_b32 v62, s46, 11 ; GFX9-NEXT: s_lshr_b32 s46, s5, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 18 +; GFX9-NEXT: v_writelane_b32 v62, s46, 28 ; GFX9-NEXT: s_lshr_b32 s46, s4, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 0 +; GFX9-NEXT: v_writelane_b32 v62, s46, 10 ; GFX9-NEXT: s_lshr_b32 s46, s4, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 16 +; GFX9-NEXT: v_writelane_b32 v62, s46, 26 ; GFX9-NEXT: s_lshr_b32 s46, s29, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 20 +; GFX9-NEXT: v_writelane_b32 v62, s46, 30 ; GFX9-NEXT: s_lshr_b32 s46, s29, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 3 +; GFX9-NEXT: v_writelane_b32 v62, s46, 13 ; GFX9-NEXT: s_lshr_b32 s46, s29, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 21 +; GFX9-NEXT: v_writelane_b32 v62, s46, 31 ; GFX9-NEXT: s_lshr_b32 s46, s28, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 2 +; GFX9-NEXT: v_writelane_b32 v62, s46, 12 ; GFX9-NEXT: s_lshr_b32 s46, s28, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 19 +; GFX9-NEXT: v_writelane_b32 v62, s46, 29 ; GFX9-NEXT: s_lshr_b32 s46, s27, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 23 +; GFX9-NEXT: v_writelane_b32 v62, s46, 33 ; GFX9-NEXT: s_lshr_b32 s46, s27, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 5 +; GFX9-NEXT: v_writelane_b32 v62, s46, 15 ; GFX9-NEXT: s_lshr_b32 s46, s27, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 24 +; GFX9-NEXT: v_writelane_b32 v62, s46, 34 ; GFX9-NEXT: s_lshr_b32 s46, s26, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 4 +; GFX9-NEXT: v_writelane_b32 v62, s46, 14 ; GFX9-NEXT: s_lshr_b32 s46, s26, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 22 +; GFX9-NEXT: v_writelane_b32 v62, s46, 32 ; GFX9-NEXT: s_lshr_b32 s46, s25, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 26 +; GFX9-NEXT: v_writelane_b32 v62, s46, 36 ; GFX9-NEXT: s_lshr_b32 s46, s25, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 7 +; GFX9-NEXT: v_writelane_b32 v62, s46, 17 ; GFX9-NEXT: s_lshr_b32 s46, s25, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 27 +; GFX9-NEXT: v_writelane_b32 v62, s46, 37 ; GFX9-NEXT: s_lshr_b32 s46, s24, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 6 +; GFX9-NEXT: v_writelane_b32 v62, s46, 16 ; GFX9-NEXT: s_lshr_b32 s46, s24, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 25 +; GFX9-NEXT: v_writelane_b32 v62, s46, 35 ; GFX9-NEXT: s_lshr_b32 s46, s23, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 29 +; GFX9-NEXT: v_writelane_b32 v62, s46, 39 ; GFX9-NEXT: s_lshr_b32 s46, s23, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 9 +; GFX9-NEXT: v_writelane_b32 v62, s46, 19 ; GFX9-NEXT: s_lshr_b32 s46, s23, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 30 +; GFX9-NEXT: v_writelane_b32 v62, s46, 40 ; GFX9-NEXT: s_lshr_b32 s46, s22, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 8 +; GFX9-NEXT: v_writelane_b32 v62, s46, 18 ; GFX9-NEXT: s_lshr_b32 s46, s22, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 28 +; GFX9-NEXT: v_writelane_b32 v62, s46, 38 ; GFX9-NEXT: s_lshr_b32 s46, s21, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 32 +; GFX9-NEXT: v_writelane_b32 v62, s46, 42 ; GFX9-NEXT: s_lshr_b32 s46, s21, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 11 +; GFX9-NEXT: v_writelane_b32 v62, s46, 21 ; GFX9-NEXT: s_lshr_b32 s46, s21, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 33 +; GFX9-NEXT: v_writelane_b32 v62, s46, 43 ; GFX9-NEXT: s_lshr_b32 s46, s20, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 10 +; GFX9-NEXT: v_writelane_b32 v62, s46, 20 ; GFX9-NEXT: s_lshr_b32 s46, s20, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 31 +; GFX9-NEXT: v_writelane_b32 v62, s46, 41 ; GFX9-NEXT: s_lshr_b32 s46, s19, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 35 +; GFX9-NEXT: v_writelane_b32 v62, s46, 45 ; GFX9-NEXT: s_lshr_b32 s46, s19, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 13 +; GFX9-NEXT: v_writelane_b32 v62, s46, 23 ; GFX9-NEXT: s_lshr_b32 s46, s19, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 36 +; GFX9-NEXT: v_writelane_b32 v62, s46, 46 ; GFX9-NEXT: s_lshr_b32 s46, s18, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 12 +; GFX9-NEXT: v_writelane_b32 v62, s46, 22 ; GFX9-NEXT: s_lshr_b32 s46, s18, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 34 +; GFX9-NEXT: v_writelane_b32 v62, s46, 44 ; GFX9-NEXT: s_lshr_b32 s46, s17, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 38 +; GFX9-NEXT: v_writelane_b32 v62, s46, 48 ; GFX9-NEXT: s_lshr_b32 s46, s17, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 15 +; GFX9-NEXT: v_writelane_b32 v62, s46, 25 ; GFX9-NEXT: s_lshr_b32 s46, s17, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 39 +; GFX9-NEXT: v_writelane_b32 v62, s46, 49 ; GFX9-NEXT: s_lshr_b32 s46, s16, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 14 +; GFX9-NEXT: v_writelane_b32 v62, s46, 24 ; GFX9-NEXT: s_lshr_b32 s46, s16, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 37 -; GFX9-NEXT: s_lshr_b32 s46, s13, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 40 -; GFX9-NEXT: s_lshr_b32 s46, s13, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 41 -; GFX9-NEXT: s_lshr_b32 s46, s41, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 42 -; GFX9-NEXT: s_lshr_b32 s46, s41, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 43 -; GFX9-NEXT: s_lshr_b32 s46, s43, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 45 -; GFX9-NEXT: s_lshr_b32 s46, s43, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 46 -; GFX9-NEXT: s_lshr_b32 s46, s42, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 44 -; GFX9-NEXT: s_lshr_b32 s46, s45, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 48 -; GFX9-NEXT: s_lshr_b32 s46, s45, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 49 -; GFX9-NEXT: s_lshr_b32 s46, s44, 8 -; GFX9-NEXT: s_lshr_b32 s97, s7, 24 -; GFX9-NEXT: s_lshr_b32 s68, s7, 16 -; GFX9-NEXT: s_lshr_b32 s99, s7, 8 -; GFX9-NEXT: s_lshr_b32 s81, s6, 16 +; GFX9-NEXT: v_writelane_b32 v62, s46, 47 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[24:25], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 8 +; GFX9-NEXT: v_writelane_b32 v62, s79, 9 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[22:23], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 6 +; GFX9-NEXT: v_writelane_b32 v62, s79, 7 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[20:21], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 4 +; GFX9-NEXT: v_writelane_b32 v62, s79, 5 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[18:19], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 2 +; GFX9-NEXT: v_writelane_b32 v62, s79, 3 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[16:17], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 0 +; GFX9-NEXT: s_lshr_b32 s38, s7, 24 +; GFX9-NEXT: s_lshr_b32 s62, s7, 16 +; GFX9-NEXT: s_lshr_b32 s39, s7, 8 +; GFX9-NEXT: s_lshr_b32 s63, s6, 16 ; GFX9-NEXT: s_lshr_b32 s49, s6, 8 -; GFX9-NEXT: s_lshr_b32 s86, s9, 24 -; GFX9-NEXT: s_lshr_b32 s67, s9, 16 -; GFX9-NEXT: s_lshr_b32 s96, s9, 8 -; GFX9-NEXT: s_lshr_b32 s80, s8, 16 +; GFX9-NEXT: s_lshr_b32 s96, s9, 24 +; GFX9-NEXT: s_lshr_b32 s60, s9, 16 +; GFX9-NEXT: s_lshr_b32 s98, s9, 8 +; GFX9-NEXT: s_lshr_b32 s61, s8, 16 ; GFX9-NEXT: s_lshr_b32 s48, s8, 8 ; GFX9-NEXT: s_lshr_b32 s85, s11, 24 -; GFX9-NEXT: s_lshr_b32 s66, s11, 16 -; GFX9-NEXT: s_lshr_b32 s39, s11, 8 -; GFX9-NEXT: s_lshr_b32 s71, s10, 16 -; GFX9-NEXT: s_lshr_b32 s98, s10, 8 -; GFX9-NEXT: s_lshr_b32 s82, s15, 24 -; GFX9-NEXT: s_lshr_b32 s65, s15, 16 -; GFX9-NEXT: s_lshr_b32 s84, s15, 8 -; GFX9-NEXT: s_lshr_b32 s70, s14, 16 -; GFX9-NEXT: s_lshr_b32 s87, s14, 8 -; GFX9-NEXT: s_lshr_b32 s64, s13, 16 -; GFX9-NEXT: s_lshr_b32 s69, s12, 16 -; GFX9-NEXT: s_lshr_b32 s38, s12, 8 +; GFX9-NEXT: s_lshr_b32 s58, s11, 16 +; GFX9-NEXT: s_lshr_b32 s87, s11, 8 +; GFX9-NEXT: s_lshr_b32 s59, s10, 16 +; GFX9-NEXT: s_lshr_b32 s99, s10, 8 +; GFX9-NEXT: s_lshr_b32 s82, s13, 24 +; GFX9-NEXT: s_lshr_b32 s56, s13, 16 +; GFX9-NEXT: s_lshr_b32 s84, s13, 8 +; GFX9-NEXT: s_lshr_b32 s57, s12, 16 +; GFX9-NEXT: s_lshr_b32 s97, s12, 8 +; GFX9-NEXT: s_lshr_b32 s71, s15, 24 +; GFX9-NEXT: s_lshr_b32 s46, s15, 16 +; GFX9-NEXT: s_lshr_b32 s81, s15, 8 +; GFX9-NEXT: s_lshr_b32 s47, s14, 16 +; GFX9-NEXT: s_lshr_b32 s86, s14, 8 +; GFX9-NEXT: s_lshr_b32 s68, s41, 24 ; GFX9-NEXT: s_lshr_b32 s54, s41, 16 +; GFX9-NEXT: s_lshr_b32 s70, s41, 8 ; GFX9-NEXT: s_lshr_b32 s55, s40, 16 ; GFX9-NEXT: s_lshr_b32 s83, s40, 8 +; GFX9-NEXT: s_lshr_b32 s66, s43, 24 ; GFX9-NEXT: s_lshr_b32 s52, s43, 16 +; GFX9-NEXT: s_lshr_b32 s67, s43, 8 ; GFX9-NEXT: s_lshr_b32 s53, s42, 16 +; GFX9-NEXT: s_lshr_b32 s80, s42, 8 +; GFX9-NEXT: s_lshr_b32 s64, s45, 24 ; GFX9-NEXT: s_lshr_b32 s50, s45, 16 +; GFX9-NEXT: s_lshr_b32 s65, s45, 8 ; GFX9-NEXT: s_lshr_b32 s51, s44, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 47 -; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; GFX9-NEXT: s_lshr_b64 s[56:57], s[28:29], 24 -; GFX9-NEXT: s_lshr_b64 s[58:59], s[26:27], 24 -; GFX9-NEXT: s_lshr_b64 s[60:61], s[24:25], 24 -; GFX9-NEXT: s_lshr_b64 s[62:63], s[22:23], 24 -; GFX9-NEXT: s_lshr_b64 s[72:73], s[20:21], 24 -; GFX9-NEXT: s_lshr_b64 s[74:75], s[18:19], 24 -; GFX9-NEXT: s_lshr_b64 s[76:77], s[16:17], 24 -; GFX9-NEXT: s_lshr_b64 s[78:79], s[6:7], 24 -; GFX9-NEXT: s_lshr_b64 s[88:89], s[8:9], 24 -; GFX9-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 -; GFX9-NEXT: s_lshr_b64 s[92:93], s[14:15], 24 +; GFX9-NEXT: s_lshr_b32 s69, s44, 8 +; GFX9-NEXT: s_lshr_b64 s[76:77], s[4:5], 24 +; GFX9-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX9-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 +; GFX9-NEXT: v_writelane_b32 v62, s79, 1 +; GFX9-NEXT: s_lshr_b64 s[36:37], s[6:7], 24 +; GFX9-NEXT: s_lshr_b64 s[34:35], s[8:9], 24 +; GFX9-NEXT: s_lshr_b64 s[30:31], s[10:11], 24 ; GFX9-NEXT: s_lshr_b64 s[94:95], s[12:13], 24 -; GFX9-NEXT: s_lshr_b64 s[30:31], s[40:41], 24 -; GFX9-NEXT: s_lshr_b64 s[34:35], s[42:43], 24 -; GFX9-NEXT: s_lshr_b64 s[36:37], s[44:45], 24 +; GFX9-NEXT: s_lshr_b64 s[92:93], s[14:15], 24 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[40:41], 24 +; GFX9-NEXT: s_lshr_b64 s[88:89], s[42:43], 24 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB91_4 ; GFX9-NEXT: .LBB91_2: ; %cmp.true ; GFX9-NEXT: s_and_b32 s46, s45, 0xffff0000 -; GFX9-NEXT: v_mov_b32_e32 v13, 0x40c00000 -; GFX9-NEXT: v_add_f32_e32 v1, s46, v13 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; GFX9-NEXT: v_mov_b32_e32 v2, 0x40c00000 +; GFX9-NEXT: v_add_f32_e32 v1, s46, v2 +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s45, s45, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v1, s45, v13 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: s_and_b32 s45, s44, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v2, v4, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v1, s45, v13 +; GFX9-NEXT: v_add_f32_e32 v1, s45, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v15, v3, v4, vcc ; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: s_and_b32 s45, s44, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 ; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc -; GFX9-NEXT: s_lshl_b32 s44, s44, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v1, s44, v13 +; GFX9-NEXT: v_add_f32_e32 v1, s45, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v24, v3, v4, vcc ; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 +; GFX9-NEXT: s_lshl_b32 s44, s44, 16 ; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 ; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s44, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v17, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s44, s43, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s44, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshl_or_b32 v1, v5, 16, v1 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s44, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v23, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s43, s43, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v3 -; GFX9-NEXT: v_add_f32_e32 v3, s43, v13 -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s43, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v18, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s43, s42, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v4, v6, 16, v3 -; GFX9-NEXT: v_add_f32_e32 v3, s43, v13 -; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v3 -; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s43, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v26, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s42, s42, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v3 -; GFX9-NEXT: v_add_f32_e32 v3, s42, v13 -; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v3 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s42, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v49, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s42, s41, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc -; GFX9-NEXT: v_add_f32_e32 v5, s42, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshl_or_b32 v3, v7, 16, v3 -; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 -; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s42, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v25, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s41, s41, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v5 -; GFX9-NEXT: v_add_f32_e32 v5, s41, v13 -; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 -; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 -; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s41, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v50, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s41, s40, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v6, v8, 16, v5 -; GFX9-NEXT: v_add_f32_e32 v5, s41, v13 -; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v7, v7, v5 -; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 -; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s41, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v28, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s40, s40, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v5 -; GFX9-NEXT: v_add_f32_e32 v5, s40, v13 -; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v7, v7, v5 -; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 -; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: s_and_b32 s40, s13, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc -; GFX9-NEXT: v_add_f32_e32 v7, s40, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshl_or_b32 v5, v9, 16, v5 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s40, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v52, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 +; GFX9-NEXT: s_and_b32 s40, s15, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s40, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v27, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 +; GFX9-NEXT: s_lshl_b32 s15, s15, 16 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s15, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v30, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 +; GFX9-NEXT: s_and_b32 s15, s14, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s15, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v29, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 +; GFX9-NEXT: s_lshl_b32 s14, s14, 16 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s14, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v10, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 +; GFX9-NEXT: s_and_b32 s14, s13, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s14, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v53, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s13, s13, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s13, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s13, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v16, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s13, s12, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s13, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s13, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v12, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s12, s12, 16 -; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s12, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; GFX9-NEXT: s_and_b32 s12, s15, 0xffff0000 -; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshl_or_b32 v10, v10, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s12, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: s_lshl_b32 s12, s15, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s12, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; GFX9-NEXT: s_and_b32 s12, s14, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v17, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s12, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: s_lshl_b32 s12, s14, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s12, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s12, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v55, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s12, s11, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v16, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s12, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s12, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v11, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s11, s11, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s11, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s11, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v32, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s11, s10, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v19, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s11, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s11, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v31, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s10, s10, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s10, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s10, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v33, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s10, s9, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v18, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s10, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s10, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v34, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s9, s9, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s9, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s9, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v60, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s9, s8, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v23, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s9, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s9, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v40, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s8, s8, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s8, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s8, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v44, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s8, s7, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v22, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s8, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s8, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v54, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s7, s7, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s7, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s7, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v5, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s7, s6, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v25, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s7, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s7, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v48, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s6, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s17, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v24, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v41, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s17, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s16, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v27, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v36, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s16, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s19, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v26, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v35, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s19, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s18, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v29, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v38, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s18, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s21, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v28, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v37, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s21, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s20, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v53, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v43, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s20, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s23, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v52, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v42, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s23, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v47, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s22, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v55, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s22, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v46, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s25, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v54, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v21, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s25, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v59, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s24, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v41, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v8, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s24, 16 -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v57, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s27, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v40, v12, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v20, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s27, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v56, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s26, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v43, v14, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v14, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s26, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v45, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s29, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v42, v57, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v13, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s29, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v22, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s28, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v45, v56, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v9, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s6, s28, 16 -; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v58, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v44, v14, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s6, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v7, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: s_lshl_b32 s5, s5, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s5, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v7 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v61 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s5, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v51, v3, v6, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v0, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v47, v58, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s5, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc +; GFX9-NEXT: v_add_f32_e32 v0, s5, v2 +; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX9-NEXT: s_lshl_b32 s4, s4, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v7, s4, v13 -; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 -; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v7 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v13 -; GFX9-NEXT: v_lshl_or_b32 v46, v59, 16, v7 -; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[24:25] -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[22:23] -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[18:19] -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[16:17] +; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 +; GFX9-NEXT: v_or_b32_e32 v61, 0x400000, v0 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: v_add_f32_e32 v0, s4, v2 +; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 +; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v19, v1, v61, vcc +; GFX9-NEXT: v_add_u32_e32 v2, v2, v0 +; GFX9-NEXT: v_or_b32_e32 v61, 0x400000, v0 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v24 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v15 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v24, v6, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v23 +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v17 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v23, v6, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v26 +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v18 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v26, v6, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v25 +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v49 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v25, v6, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v50 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v28, v18, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v27 +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v52 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v29 +; GFX9-NEXT: v_lshl_or_b32 v27, v6, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v30 +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v17 +; GFX9-NEXT: v_lshl_or_b32 v30, v15, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v53 +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v10 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v12 +; GFX9-NEXT: v_lshl_or_b32 v29, v6, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v16 +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v50 +; GFX9-NEXT: v_lshl_or_b32 v12, v53, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11 +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v55 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v31 +; GFX9-NEXT: v_lshl_or_b32 v11, v16, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v32 +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v6 +; GFX9-NEXT: v_lshl_or_b32 v32, v10, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v33 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v40 +; GFX9-NEXT: v_lshl_or_b32 v31, v52, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v60 +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v55 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v54 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_lshl_or_b32 v34, v60, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v44 +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v54 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v48 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v61, vcc +; GFX9-NEXT: v_lshl_or_b32 v33, v1, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v5 +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v48 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v41 +; GFX9-NEXT: v_lshl_or_b32 v5, v61, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v41 +; GFX9-NEXT: v_lshl_or_b32 v4, v40, 16, v0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v47 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v46 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v8 +; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v57 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v56 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v45 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v22 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(8) +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v36 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v36, v1, 16, v0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v35, v1, 16, v0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v38 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v38, v1, 16, v0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v37 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v37, v1, 16, v0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v43, v49, 16, v0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v42 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(3) +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v49 +; GFX9-NEXT: v_lshl_or_b32 v42, v1, 16, v0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v47, v47, 16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v21 +; GFX9-NEXT: v_and_b32_e32 v21, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v46, v46, 16, v21 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v59 +; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshl_or_b32 v21, v21, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v20 +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v20, v57, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v14 +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v14, v56, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v13 +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v13, v45, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v9 +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v9, v22, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v58 +; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshl_or_b32 v8, v8, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v51 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v2 +; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshl_or_b32 v3, v7, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v19 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; GFX9-NEXT: v_lshl_or_b32 v2, v7, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v3 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v3 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v2 +; GFX9-NEXT: v_lshrrev_b64 v[44:45], 24, v[2:3] +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[1:2], 24, v[8:9] +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v9 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v9 +; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v8 +; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[4:5] ; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[10:11] -; GFX9-NEXT: v_lshrrev_b64 v[36:37], 24, v[42:43] -; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[52:53] -; GFX9-NEXT: v_lshrrev_b64 v[30:31], 24, v[46:47] -; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[44:45] -; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[40:41] -; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[28:29] -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v22 -; GFX9-NEXT: v_lshrrev_b64 v[38:39], 24, v[54:55] -; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[26:27] -; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6] -; GFX9-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[34:35], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v28 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v25 -; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v23 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v47 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v47 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v46 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v45 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v45 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v44 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v43 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v43 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v42 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v41 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v41 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v40 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v55 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v55 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v54 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 24, v53 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v53 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v52 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v29 -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v29 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v4 +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[4:5], 24, v[33:34] +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v14 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v4, 24, v34 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v13 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v34 +; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v21 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v33 +; GFX9-NEXT: v_lshrrev_b64 v[44:45], 24, v[13:14] +; GFX9-NEXT: v_lshrrev_b64 v[13:14], 24, v[20:21] +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v21 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v20 +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[42:43] +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[4:5], 24, v[31:32] +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[1:2], 24, v[46:47] +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v42 +; GFX9-NEXT: v_mov_b32_e32 v42, v10 +; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[37:38] +; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v32 +; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[11:12] +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11 +; GFX9-NEXT: v_lshrrev_b64 v[10:11], 24, v[29:30] +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v47 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v47 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v43 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v43 +; GFX9-NEXT: v_mov_b32_e32 v43, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v38 +; GFX9-NEXT: v_mov_b32_e32 v38, v48 +; GFX9-NEXT: v_mov_b32_e32 v48, v60 +; GFX9-NEXT: v_mov_b32_e32 v60, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v37 +; GFX9-NEXT: v_mov_b32_e32 v37, v61 +; GFX9-NEXT: v_mov_b32_e32 v61, v18 +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[35:36] +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v12 +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[27:28] +; GFX9-NEXT: v_lshrrev_b64 v[14:15], 24, v[25:26] +; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[23:24] +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v46 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v31 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v12, 24, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v28 ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v26 ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 8, v26 -; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v25 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 24, v24 +; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v24 ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v23 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 24, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v24, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v1 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; GFX9-NEXT: s_branch .LBB91_5 ; GFX9-NEXT: .LBB91_3: ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr72 +; GFX9-NEXT: ; implicit-def: $sgpr74 +; GFX9-NEXT: ; implicit-def: $sgpr76 +; GFX9-NEXT: ; implicit-def: $sgpr69 ; GFX9-NEXT: ; implicit-def: $sgpr51 +; GFX9-NEXT: ; implicit-def: $sgpr78 +; GFX9-NEXT: ; implicit-def: $sgpr65 ; GFX9-NEXT: ; implicit-def: $sgpr50 +; GFX9-NEXT: ; implicit-def: $sgpr64 +; GFX9-NEXT: ; implicit-def: $sgpr80 ; GFX9-NEXT: ; implicit-def: $sgpr53 +; GFX9-NEXT: ; implicit-def: $sgpr88 +; GFX9-NEXT: ; implicit-def: $sgpr67 ; GFX9-NEXT: ; implicit-def: $sgpr52 +; GFX9-NEXT: ; implicit-def: $sgpr66 ; GFX9-NEXT: ; implicit-def: $sgpr83 ; GFX9-NEXT: ; implicit-def: $sgpr55 -; GFX9-NEXT: ; implicit-def: $sgpr54 -; GFX9-NEXT: ; implicit-def: $sgpr38 -; GFX9-NEXT: ; implicit-def: $sgpr69 -; GFX9-NEXT: ; implicit-def: $sgpr64 -; GFX9-NEXT: ; implicit-def: $sgpr87 +; GFX9-NEXT: ; implicit-def: $sgpr90 ; GFX9-NEXT: ; implicit-def: $sgpr70 +; GFX9-NEXT: ; implicit-def: $sgpr54 +; GFX9-NEXT: ; implicit-def: $sgpr68 +; GFX9-NEXT: ; implicit-def: $sgpr86 +; GFX9-NEXT: ; implicit-def: $sgpr92 +; GFX9-NEXT: ; implicit-def: $sgpr81 +; GFX9-NEXT: ; implicit-def: $sgpr71 +; GFX9-NEXT: ; implicit-def: $sgpr97 +; GFX9-NEXT: ; implicit-def: $sgpr57 +; GFX9-NEXT: ; implicit-def: $sgpr94 ; GFX9-NEXT: ; implicit-def: $sgpr84 -; GFX9-NEXT: ; implicit-def: $sgpr65 +; GFX9-NEXT: ; implicit-def: $sgpr56 ; GFX9-NEXT: ; implicit-def: $sgpr82 -; GFX9-NEXT: ; implicit-def: $sgpr98 -; GFX9-NEXT: ; implicit-def: $sgpr71 -; GFX9-NEXT: ; implicit-def: $sgpr39 -; GFX9-NEXT: ; implicit-def: $sgpr66 +; GFX9-NEXT: ; implicit-def: $sgpr99 +; GFX9-NEXT: ; implicit-def: $sgpr59 +; GFX9-NEXT: ; implicit-def: $sgpr30 +; GFX9-NEXT: ; implicit-def: $sgpr87 +; GFX9-NEXT: ; implicit-def: $sgpr58 ; GFX9-NEXT: ; implicit-def: $sgpr85 ; GFX9-NEXT: ; implicit-def: $sgpr48 -; GFX9-NEXT: ; implicit-def: $sgpr80 +; GFX9-NEXT: ; implicit-def: $sgpr61 +; GFX9-NEXT: ; implicit-def: $sgpr34 +; GFX9-NEXT: ; implicit-def: $sgpr98 +; GFX9-NEXT: ; implicit-def: $sgpr60 ; GFX9-NEXT: ; implicit-def: $sgpr96 -; GFX9-NEXT: ; implicit-def: $sgpr67 -; GFX9-NEXT: ; implicit-def: $sgpr86 ; GFX9-NEXT: ; implicit-def: $sgpr49 -; GFX9-NEXT: ; implicit-def: $sgpr81 -; GFX9-NEXT: ; implicit-def: $sgpr99 -; GFX9-NEXT: ; implicit-def: $sgpr68 -; GFX9-NEXT: ; implicit-def: $sgpr97 -; GFX9-NEXT: ; implicit-def: $sgpr76 -; GFX9-NEXT: ; implicit-def: $sgpr74 -; GFX9-NEXT: ; implicit-def: $sgpr72 -; GFX9-NEXT: ; implicit-def: $sgpr62 -; GFX9-NEXT: ; implicit-def: $sgpr60 -; GFX9-NEXT: ; implicit-def: $sgpr58 -; GFX9-NEXT: ; implicit-def: $sgpr56 +; GFX9-NEXT: ; implicit-def: $sgpr63 ; GFX9-NEXT: ; implicit-def: $sgpr36 -; GFX9-NEXT: ; implicit-def: $sgpr34 -; GFX9-NEXT: ; implicit-def: $sgpr30 -; GFX9-NEXT: ; implicit-def: $sgpr94 -; GFX9-NEXT: ; implicit-def: $sgpr92 -; GFX9-NEXT: ; implicit-def: $sgpr90 -; GFX9-NEXT: ; implicit-def: $sgpr88 -; GFX9-NEXT: ; implicit-def: $sgpr78 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr39 +; GFX9-NEXT: ; implicit-def: $sgpr62 +; GFX9-NEXT: ; implicit-def: $sgpr38 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 0 +; GFX9-NEXT: v_writelane_b32 v62, s47, 1 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -161883,7 +161986,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 2 +; GFX9-NEXT: v_writelane_b32 v62, s47, 3 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -161895,7 +161999,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 4 +; GFX9-NEXT: v_writelane_b32 v62, s47, 5 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -161907,7 +162012,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 6 +; GFX9-NEXT: v_writelane_b32 v62, s47, 7 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -161919,7 +162025,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 8 +; GFX9-NEXT: v_writelane_b32 v62, s47, 9 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -161956,273 +162063,268 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr47 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: s_branch .LBB91_2 ; GFX9-NEXT: .LBB91_4: -; GFX9-NEXT: v_mov_b32_e32 v1, s28 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s29 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s26 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s27 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s24 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s25 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s22 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s23 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s20 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s21 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s18 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s16 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s17 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s6 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s7 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s8 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s9 -; GFX9-NEXT: v_mov_b32_e32 v13, s4 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s10 -; GFX9-NEXT: v_readlane_b32 s4, v62, 0 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s11 -; GFX9-NEXT: v_mov_b32_e32 v59, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 1 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s14 -; GFX9-NEXT: v_mov_b32_e32 v58, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 2 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s15 -; GFX9-NEXT: v_mov_b32_e32 v14, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 3 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s12 -; GFX9-NEXT: v_mov_b32_e32 v56, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 4 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s13 -; GFX9-NEXT: v_mov_b32_e32 v57, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 5 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 6 -; GFX9-NEXT: v_mov_b32_e32 v12, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 7 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 8 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 9 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: v_mov_b32_e32 v0, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 10 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s5 ; GFX9-NEXT: v_readlane_b32 s4, v62, 11 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s28 ; GFX9-NEXT: v_readlane_b32 s4, v62, 12 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s29 ; GFX9-NEXT: v_readlane_b32 s4, v62, 13 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s26 ; GFX9-NEXT: v_readlane_b32 s4, v62, 14 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s27 ; GFX9-NEXT: v_readlane_b32 s4, v62, 15 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s24 ; GFX9-NEXT: v_readlane_b32 s4, v62, 16 -; GFX9-NEXT: v_mov_b32_e32 v39, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s25 ; GFX9-NEXT: v_readlane_b32 s4, v62, 17 -; GFX9-NEXT: v_mov_b32_e32 v32, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 18 -; GFX9-NEXT: v_mov_b32_e32 v35, s4 +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s23 ; GFX9-NEXT: v_readlane_b32 s4, v62, 19 -; GFX9-NEXT: v_mov_b32_e32 v44, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 20 -; GFX9-NEXT: v_mov_b32_e32 v51, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s21 ; GFX9-NEXT: v_readlane_b32 s4, v62, 21 -; GFX9-NEXT: v_mov_b32_e32 v45, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s18 ; GFX9-NEXT: v_readlane_b32 s4, v62, 22 -; GFX9-NEXT: v_mov_b32_e32 v42, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s19 ; GFX9-NEXT: v_readlane_b32 s4, v62, 23 -; GFX9-NEXT: v_mov_b32_e32 v46, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s16 ; GFX9-NEXT: v_readlane_b32 s4, v62, 24 -; GFX9-NEXT: v_mov_b32_e32 v43, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: v_readlane_b32 s4, v62, 25 -; GFX9-NEXT: v_mov_b32_e32 v40, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s61 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s10 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s12 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s14 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s47 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s40 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s55 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s41 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s42 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s53 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s43 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s52 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s44 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s51 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s45 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s50 ; GFX9-NEXT: v_readlane_b32 s4, v62, 26 -; GFX9-NEXT: v_mov_b32_e32 v47, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 27 -; GFX9-NEXT: v_mov_b32_e32 v41, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 28 -; GFX9-NEXT: v_mov_b32_e32 v54, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 29 -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 30 -; GFX9-NEXT: v_mov_b32_e32 v55, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 31 -; GFX9-NEXT: v_mov_b32_e32 v52, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 32 -; GFX9-NEXT: v_mov_b32_e32 v21, s4 -; GFX9-NEXT: v_mov_b32_e32 v20, s78 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v20, s88 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s81 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s68 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v20, s90 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s80 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s67 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v20, s92 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s71 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s66 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s70 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s65 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s69 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s64 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s40 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s55 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s41 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s54 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s42 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 33 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s53 -; GFX9-NEXT: v_mov_b32_e32 v53, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 34 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s43 -; GFX9-NEXT: v_mov_b32_e32 v8, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 35 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s52 -; GFX9-NEXT: v_mov_b32_e32 v60, s4 +; GFX9-NEXT: v_mov_b32_e32 v9, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 36 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s44 -; GFX9-NEXT: v_mov_b32_e32 v7, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 37 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s51 -; GFX9-NEXT: v_mov_b32_e32 v26, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s49 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s38 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s39 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s48 ; GFX9-NEXT: v_readlane_b32 s4, v62, 38 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s45 -; GFX9-NEXT: v_mov_b32_e32 v9, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s96 +; GFX9-NEXT: v_mov_b32_e32 v46, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 39 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s50 -; GFX9-NEXT: v_mov_b32_e32 v27, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s98 +; GFX9-NEXT: v_mov_b32_e32 v45, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 40 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s49 -; GFX9-NEXT: v_mov_b32_e32 v28, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s85 +; GFX9-NEXT: v_mov_b32_e32 v2, s4 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v1, s76 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v5, s84 +; GFX9-NEXT: v_mov_b32_e32 v4, s36 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; GFX9-NEXT: v_readlane_b32 s4, v62, 41 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s97 -; GFX9-NEXT: v_mov_b32_e32 v11, s4 +; GFX9-NEXT: v_mov_b32_e32 v57, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 42 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s99 -; GFX9-NEXT: v_mov_b32_e32 v29, s4 +; GFX9-NEXT: v_mov_b32_e32 v47, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 43 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s48 -; GFX9-NEXT: v_mov_b32_e32 v6, s4 +; GFX9-NEXT: v_mov_b32_e32 v56, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 44 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s86 ; GFX9-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 45 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s96 -; GFX9-NEXT: v_mov_b32_e32 v24, s4 +; GFX9-NEXT: v_mov_b32_e32 v58, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 46 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s85 -; GFX9-NEXT: v_mov_b32_e32 v4, s4 +; GFX9-NEXT: v_mov_b32_e32 v59, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 47 -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: v_mov_b32_e32 v35, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 48 -; GFX9-NEXT: v_mov_b32_e32 v20, s94 ; GFX9-NEXT: v_mov_b32_e32 v22, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 49 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v36, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 8 +; GFX9-NEXT: v_readlane_b32 s5, v62, 9 +; GFX9-NEXT: v_mov_b32_e32 v1, s74 +; GFX9-NEXT: v_mov_b32_e32 v13, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 6 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v61, s5 -; GFX9-NEXT: v_mov_b32_e32 v18, s98 -; GFX9-NEXT: v_mov_b32_e32 v19, s39 -; GFX9-NEXT: v_mov_b32_e32 v16, s87 -; GFX9-NEXT: v_mov_b32_e32 v25, s82 -; GFX9-NEXT: v_mov_b32_e32 v17, s84 -; GFX9-NEXT: v_mov_b32_e32 v10, s38 -; GFX9-NEXT: v_mov_b32_e32 v5, s83 -; GFX9-NEXT: v_mov_b32_e32 v2, s4 -; GFX9-NEXT: v_mov_b32_e32 v30, s46 -; GFX9-NEXT: v_mov_b32_e32 v33, s56 -; GFX9-NEXT: v_mov_b32_e32 v36, s58 -; GFX9-NEXT: v_mov_b32_e32 v37, s60 -; GFX9-NEXT: v_mov_b32_e32 v38, s62 -; GFX9-NEXT: v_mov_b32_e32 v48, s72 -; GFX9-NEXT: v_mov_b32_e32 v49, s74 -; GFX9-NEXT: v_mov_b32_e32 v50, s76 -; GFX9-NEXT: v_mov_b32_e32 v20, s30 -; GFX9-NEXT: v_mov_b32_e32 v31, s34 -; GFX9-NEXT: v_mov_b32_e32 v34, s36 +; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_readlane_b32 s5, v62, 7 +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 4 +; GFX9-NEXT: v_readlane_b32 s5, v62, 5 +; GFX9-NEXT: v_mov_b32_e32 v19, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 2 +; GFX9-NEXT: v_readlane_b32 s5, v62, 3 +; GFX9-NEXT: v_mov_b32_e32 v4, s34 +; GFX9-NEXT: v_mov_b32_e32 v20, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 0 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v0, s22 +; GFX9-NEXT: v_mov_b32_e32 v49, s20 +; GFX9-NEXT: v_mov_b32_e32 v41, s6 +; GFX9-NEXT: v_mov_b32_e32 v40, s63 +; GFX9-NEXT: v_mov_b32_e32 v38, s7 +; GFX9-NEXT: v_mov_b32_e32 v37, s62 +; GFX9-NEXT: v_mov_b32_e32 v54, s8 +; GFX9-NEXT: v_mov_b32_e32 v55, s9 +; GFX9-NEXT: v_mov_b32_e32 v48, s60 +; GFX9-NEXT: v_mov_b32_e32 v52, s59 +; GFX9-NEXT: v_mov_b32_e32 v6, s11 +; GFX9-NEXT: v_mov_b32_e32 v42, s58 +; GFX9-NEXT: v_mov_b32_e32 v16, s57 +; GFX9-NEXT: v_mov_b32_e32 v50, s13 +; GFX9-NEXT: v_mov_b32_e32 v53, s56 +; GFX9-NEXT: v_mov_b32_e32 v60, s15 +; GFX9-NEXT: v_mov_b32_e32 v43, s46 +; GFX9-NEXT: v_mov_b32_e32 v61, s54 +; GFX9-NEXT: v_mov_b32_e32 v31, s99 +; GFX9-NEXT: v_mov_b32_e32 v32, s87 +; GFX9-NEXT: v_mov_b32_e32 v33, s97 +; GFX9-NEXT: v_mov_b32_e32 v8, s82 +; GFX9-NEXT: v_mov_b32_e32 v29, s86 +; GFX9-NEXT: v_mov_b32_e32 v34, s71 +; GFX9-NEXT: v_mov_b32_e32 v30, s81 +; GFX9-NEXT: v_mov_b32_e32 v27, s83 +; GFX9-NEXT: v_mov_b32_e32 v12, s68 +; GFX9-NEXT: v_mov_b32_e32 v28, s70 +; GFX9-NEXT: v_mov_b32_e32 v25, s80 +; GFX9-NEXT: v_mov_b32_e32 v15, s66 +; GFX9-NEXT: v_mov_b32_e32 v26, s67 +; GFX9-NEXT: v_mov_b32_e32 v23, s69 +; GFX9-NEXT: v_mov_b32_e32 v18, s64 +; GFX9-NEXT: v_mov_b32_e32 v24, s65 +; GFX9-NEXT: v_mov_b32_e32 v44, s72 +; GFX9-NEXT: v_readlane_b32 s5, v62, 1 +; GFX9-NEXT: v_mov_b32_e32 v21, s4 +; GFX9-NEXT: v_mov_b32_e32 v4, s30 +; GFX9-NEXT: v_mov_b32_e32 v7, s94 +; GFX9-NEXT: v_mov_b32_e32 v10, s92 +; GFX9-NEXT: v_mov_b32_e32 v11, s90 +; GFX9-NEXT: v_mov_b32_e32 v14, s88 +; GFX9-NEXT: v_mov_b32_e32 v17, s78 ; GFX9-NEXT: .LBB91_5: ; %end +; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v14, v14, v33, s4 -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v12, v12, v37, s4 -; GFX9-NEXT: v_perm_b32 v36, v57, v36, s4 -; GFX9-NEXT: v_perm_b32 v30, v59, v30, s4 +; GFX9-NEXT: v_perm_b32 v0, v0, v46, s4 ; GFX9-NEXT: v_readlane_b32 s30, v63, 34 ; GFX9-NEXT: v_readlane_b32 s31, v63, 35 ; GFX9-NEXT: v_readlane_b32 s99, v63, 33 @@ -162259,302 +162361,310 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: v_readlane_b32 s36, v63, 2 ; GFX9-NEXT: v_readlane_b32 s35, v63, 1 ; GFX9-NEXT: v_readlane_b32 s34, v63, 0 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v50, v23, v50, s4 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v33, v33, v34, s4 -; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v49, v23, v49, s4 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v31, v34, v31, s4 -; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v48, v23, v48, s4 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v26, v34, v26, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v34, 16, v50 -; GFX9-NEXT: v_or_b32_e32 v26, v26, v34 -; GFX9-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v38, v23, v38, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v26, v26, v27, s4 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v9, v27, v9, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; GFX9-NEXT: v_or_b32_e32 v9, v26, v9 -; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v35, v51, v35, s4 +; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v8, v9, v8, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v49 -; GFX9-NEXT: v_or_b32_e32 v8, v8, v9 -; GFX9-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v51, v21, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX9-NEXT: v_or_b32_e32 v21, v35, v21 +; GFX9-NEXT: buffer_store_dword v21, v39, s[0:3], 0 offen +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v21, v21, v36, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v22, v35, v22, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX9-NEXT: v_or_b32_e32 v21, v21, v22 +; GFX9-NEXT: buffer_store_dword v21, v39, s[0:3], 0 offen offset:4 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v8, v8, v60, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v48 +; GFX9-NEXT: v_perm_b32 v3, v21, v3, s4 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v7, v7, v52, s4 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v20, v21, v20, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v20 +; GFX9-NEXT: buffer_store_dword v3, v39, s[0:3], 0 offen offset:8 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v7, v7, v53, s4 +; GFX9-NEXT: v_perm_b32 v3, v3, v59, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v8, v8, v21, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v38 +; GFX9-NEXT: v_perm_b32 v20, v20, v58, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v20 +; GFX9-NEXT: buffer_store_dword v3, v39, s[0:3], 0 offen offset:12 +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v3, v49, v57, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v7, v7, v54, s4 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v19, v20, v19, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v19 +; GFX9-NEXT: buffer_store_dword v3, v39, s[0:3], 0 offen offset:16 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v7, v7, v55, s4 +; GFX9-NEXT: v_perm_b32 v3, v3, v56, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v8, v8, v15, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v12 +; GFX9-NEXT: v_perm_b32 v19, v19, v47, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v19 +; GFX9-NEXT: buffer_store_dword v3, v39, s[0:3], 0 offen offset:20 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v7, v7, v40, s4 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v3, v3, v1, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v3 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:24 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v7, v7, v41, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v8, v8, v47, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v36 +; GFX9-NEXT: v_perm_b32 v0, v0, v2, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v7, v7, v42, s4 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v1, v45, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v2 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:28 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v7, v7, v43, s4 +; GFX9-NEXT: v_perm_b32 v0, v0, v9, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v8, v8, v46, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v14 +; GFX9-NEXT: v_perm_b32 v2, v1, v13, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v2 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:32 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v7, v7, v44, s4 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v8, v56, v51, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v7, v7, v45, s4 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_perm_b32 v7, v13, v39, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v30 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: v_perm_b32 v8, v58, v32, s4 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: v_perm_b32 v7, v61, v35, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:36 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v7, v1, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v33 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v7 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v1, v44, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:40 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v22, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v31 +; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:44 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v1, v1, v4, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:48 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v24, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:52 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v1, v1, v5, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:56 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v20, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:60 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v1, v1, v6, s4 +; GFX9-NEXT: v_perm_b32 v0, v0, v23, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v1, v17, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:64 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v10, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v0, v0, v24, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v1, v18, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:68 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v1, v1, v11, s4 +; GFX9-NEXT: v_perm_b32 v0, v0, v25, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v28, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v1, v14, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:72 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v16, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v0, v0, v26, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v1, v15, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:76 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v1, v1, v17, s4 +; GFX9-NEXT: v_perm_b32 v0, v0, v27, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v25, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v1, v11, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:80 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v61, v12, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v0, v0, v28, s4 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:84 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v18, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v0, v0, v29, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_perm_b32 v1, v1, v10, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: v_perm_b32 v1, v43, v34, s4 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:88 +; GFX9-NEXT: v_perm_b32 v0, v60, v30, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:92 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v16, v7, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v19, s4 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v0, v0, v33, s4 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: v_perm_b32 v1, v53, v8, s4 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:96 +; GFX9-NEXT: v_perm_b32 v0, v50, v5, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:100 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v52, v4, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v0, v0, v31, s4 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:104 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v0, v6, v32, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v42, v1, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:108 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v0, v54, v0, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:112 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v0, v55, v0, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v48, v1, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:116 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v40, v1, s4 +; GFX9-NEXT: v_perm_b32 v0, v41, v0, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:120 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v0, v38, v0, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 +; GFX9-NEXT: v_perm_b32 v1, v37, v1, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: buffer_store_dword v0, v39, s[0:3], 0 offen offset:124 ; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -162570,8 +162680,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -162581,88 +162691,86 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s4, -1 ; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 offset:68 ; GFX11-TRUE16-NEXT: scratch_store_b32 off, v74, s32 offset:72 ; GFX11-TRUE16-NEXT: scratch_store_b32 off, v75, s32 offset:76 ; GFX11-TRUE16-NEXT: scratch_store_b32 off, v76, s32 offset:80 -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v77, s32 offset:84 ; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s4 -; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:68 -; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:64 +; GFX11-TRUE16-NEXT: s_clause 0x10 ; 68-byte Folded Spill +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:64 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:60 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:60 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:56 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:56 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:52 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:52 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:48 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s32 offset:48 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:44 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v45, s32 offset:44 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:40 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v46, s32 offset:40 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:36 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v47, s32 offset:36 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:32 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v56, s32 offset:32 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:28 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v57, s32 offset:28 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:24 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v58, s32 offset:24 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:20 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v59, s32 offset:20 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:16 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v60, s32 offset:16 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:12 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v61, s32 offset:12 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:8 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v62, s32 offset:8 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 offset:4 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v63, s32 offset:4 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v73, s32 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s34, 0 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s35, 1 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s36, 2 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s37, 3 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s38, 4 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s39, 5 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s48, 6 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s49, 7 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s50, 8 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s51, 9 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s52, 10 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s53, 11 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s54, 12 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s55, 13 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s64, 14 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s65, 15 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s66, 16 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s67, 17 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s68, 18 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s69, 19 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s70, 20 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s71, 21 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s80, 22 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s81, 23 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s82, 24 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s83, 25 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s84, 26 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s85, 27 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s86, 28 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s87, 29 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s96, 30 -; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s97, 31 -; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s98, 0 -; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s99, 1 -; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s100, 2 -; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s101, 3 -; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s102, 4 -; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s103, 5 -; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s104, 6 -; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s30, 7 -; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s31, 8 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v72, s32 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s34, 0 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s35, 1 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s36, 2 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s37, 3 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s38, 4 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s39, 5 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s48, 6 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s49, 7 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s50, 8 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s51, 9 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s52, 10 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s53, 11 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s54, 12 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s55, 13 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s64, 14 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s65, 15 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s66, 16 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s67, 17 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s68, 18 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s69, 19 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s70, 20 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s71, 21 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s80, 22 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s81, 23 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s82, 24 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s83, 25 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s84, 26 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s85, 27 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s86, 28 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s87, 29 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s96, 30 +; GFX11-TRUE16-NEXT: v_writelane_b32 v73, s97, 31 +; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s98, 0 +; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s99, 1 +; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s100, 2 +; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s101, 3 +; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s102, 4 +; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s103, 5 +; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s104, 6 +; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s30, 7 +; GFX11-TRUE16-NEXT: v_writelane_b32 v74, s31, 8 ; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v15 ; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v14 ; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v13 @@ -162680,156 +162788,156 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s40, v1 ; GFX11-TRUE16-NEXT: s_cmp_lg_u32 s42, 0 ; GFX11-TRUE16-NEXT: s_mov_b32 vcc_lo, 0 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr75 : SGPR spill to VGPR lane ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane ; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB91_3 ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 24 ; GFX11-TRUE16-NEXT: s_lshr_b32 s68, s5, 24 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 17 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 17 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 16 -; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s5, 16 +; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s5, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s70, s5, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s104, s4, 16 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 1 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 1 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s27, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s80, s4, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s65, s7, 24 -; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s7, 16 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 18 +; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s7, 16 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 18 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s67, s7, 8 -; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s6, 16 +; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s6, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s71, s6, 8 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 0 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 0 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s26, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s54, s9, 24 -; GFX11-TRUE16-NEXT: s_lshr_b32 s98, s9, 16 +; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s9, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s64, s9, 8 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 16 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 24 -; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s8, 16 +; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s8, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s69, s8, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s51, s11, 24 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 20 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 20 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s97, s11, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s53, s11, 8 -; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s10, 16 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 3 +; GFX11-TRUE16-NEXT: s_lshr_b32 s98, s10, 16 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 3 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s25, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s66, s10, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s13, 24 ; GFX11-TRUE16-NEXT: s_lshr_b32 s87, s13, 16 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 21 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 21 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s50, s13, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s96, s12, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s55, s12, 8 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 2 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 2 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s24, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s15, 24 ; GFX11-TRUE16-NEXT: s_lshr_b32 s85, s15, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s15, 8 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 19 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 19 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 24 ; GFX11-TRUE16-NEXT: s_lshr_b32 s86, s14, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s52, s14, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s41, 24 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 23 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 23 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s83, s41, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s41, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s84, s40, 16 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 5 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 5 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s23, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s40, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 vcc_hi, s29, 24 ; GFX11-TRUE16-NEXT: s_lshr_b32 s81, s29, 16 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 24 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 24 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s29, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s82, s28, 16 ; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s28, 8 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 4 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 4 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s22, 8 ; GFX11-TRUE16-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 ; GFX11-TRUE16-NEXT: s_lshr_b64 s[62:63], s[24:25], 24 ; GFX11-TRUE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 22 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 22 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 24 ; GFX11-TRUE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24 ; GFX11-TRUE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24 ; GFX11-TRUE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 26 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 26 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 16 ; GFX11-TRUE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24 -; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24 -; GFX11-TRUE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 7 +; GFX11-TRUE16-NEXT: s_lshr_b64 s[30:31], s[4:5], 24 +; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[6:7], 24 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 7 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s21, 8 -; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24 -; GFX11-TRUE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24 -; GFX11-TRUE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 27 +; GFX11-TRUE16-NEXT: s_lshr_b64 s[92:93], s[8:9], 24 +; GFX11-TRUE16-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 +; GFX11-TRUE16-NEXT: s_lshr_b64 s[88:89], s[12:13], 24 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 27 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 16 -; GFX11-TRUE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24 -; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24 -; GFX11-TRUE16-NEXT: s_lshr_b64 s[30:31], s[28:29], 24 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 6 +; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[14:15], 24 +; GFX11-TRUE16-NEXT: s_lshr_b64 s[76:77], s[40:41], 24 +; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 6 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s20, 8 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 25 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 25 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 24 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 29 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 29 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 16 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 9 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 9 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s19, 8 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 30 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 30 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 16 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 8 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 8 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s18, 8 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 28 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 28 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 24 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 0 +; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 0 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 16 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 11 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 11 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s17, 8 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 1 +; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 1 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 16 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 10 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 10 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s16, 8 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 31 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 31 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 24 -; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 3 +; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 3 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 16 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 13 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 13 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s3, 8 -; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 4 +; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 4 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 16 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 12 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 12 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s2, 8 -; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 2 +; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 2 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 24 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 6 +; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 6 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 16 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 15 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 15 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s1, 8 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 7 +; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 7 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 16 -; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 14 +; GFX11-TRUE16-NEXT: v_writelane_b32 v75, s42, 14 ; GFX11-TRUE16-NEXT: s_lshr_b32 s42, s0, 8 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-TRUE16-NEXT: v_writelane_b32 v77, s42, 5 +; GFX11-TRUE16-NEXT: v_writelane_b32 v76, s42, 5 ; GFX11-TRUE16-NEXT: s_lshr_b64 s[42:43], s[0:1], 24 ; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_lo ; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB91_4 @@ -162864,27 +162972,27 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v10, v4 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v7 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v1 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v2, v5, v8 :: v_dual_add_nc_u32 v5, 0x7fff, v9 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s41 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v2 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v2 ; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v8, 16, 1 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v7, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v50.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v51.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v53.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v54.l ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, v5, v7 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v6, v8 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s28 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s29 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v3 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v3 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v5 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v8 @@ -162897,27 +163005,27 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v9 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v4 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v4 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v5, v6 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo ; GFX11-TRUE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s15 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 ; GFX11-TRUE16-NEXT: s_and_b32 s15, s14, 0xffff0000 ; GFX11-TRUE16-NEXT: s_lshl_b32 s14, s14, 16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v3 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v3 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9 ; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v54.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v55.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v65.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v66.l ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v8, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v9, v10 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s15 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 16, v5 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v5 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, v7, v8 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v3, v11 :: v_dual_add_nc_u32 v6, 0x7fff, v6 @@ -162940,20 +163048,20 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 ; GFX11-TRUE16-NEXT: s_and_b32 s13, s12, 0xffff0000 ; GFX11-TRUE16-NEXT: s_lshl_b32 s12, s12, 16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v5 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v5 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v7 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v8 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11 ; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v12, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v1 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 16, v6 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v1 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v6 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v10, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v12 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v52.l -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 16, v7 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v55.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v7 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v10 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v5, v13 :: v_dual_add_nc_u32 v8, v11, v12 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s13 @@ -162977,19 +163085,19 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 ; GFX11-TRUE16-NEXT: s_and_b32 s11, s10, 0xffff0000 ; GFX11-TRUE16-NEXT: s_lshl_b32 s10, s10, 16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v7 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v7 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v9 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v10 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v13 ; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v14, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v12 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 16, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v8 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v8 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v3 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v12, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v14 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v64.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v81.l ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 16, v9 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v12 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v7, v7, v15 :: v_dual_add_nc_u32 v10, v13, v14 @@ -163007,27 +163115,27 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, v14, v15 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s10 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v7 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v7 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v11, v13 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v9, v16, vcc_lo ; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s9 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15 ; GFX11-TRUE16-NEXT: s_and_b32 s9, s8, 0xffff0000 ; GFX11-TRUE16-NEXT: s_lshl_b32 s8, s8, 16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 16, v9 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v9 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 0x7fff, v11 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v12 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v15 ; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v16, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v14 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 16, v5 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 16, v10 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v5 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v10 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v14, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v16 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v66.l -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v11 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v82.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v11 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, v12, v14 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v17 :: v_dual_add_nc_u32 v12, v15, v16 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s9 @@ -163051,20 +163159,20 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17 ; GFX11-TRUE16-NEXT: s_and_b32 s7, s6, 0xffff0000 ; GFX11-TRUE16-NEXT: s_lshl_b32 s6, s6, 16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 16, v11 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v11 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 0x7fff, v13 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v14 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v17 ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 16, v12 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v9 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v12 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 16, v9 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v16, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v18 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v70.l -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v13 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v83.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v13 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, v14, v16 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v11, v11, v19 :: v_dual_add_nc_u32 v14, v17, v18 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s7 @@ -163088,7 +163196,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 ; GFX11-TRUE16-NEXT: s_and_b32 s5, s4, 0xffff0000 ; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v13 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v13 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v19 @@ -163101,7 +163209,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v20 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v16, v18 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v13, v13, v21 :: v_dual_add_nc_u32 v16, v19, v20 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s5 @@ -163117,68 +163225,68 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s4 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 16, v14 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v14 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v16 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v21 :: v_dual_add_nc_u32 v16, v17, v19 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v20, v22 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v19 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22 ; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v13 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v11 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v99.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v13 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v11 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v113.l ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1 ; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s3, 16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v20, vcc_lo ; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23 ; GFX11-TRUE16-NEXT: s_and_b32 s0, s3, 0xffff0000 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v112.l -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v15 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v114.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23 ; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v102.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v113.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v87.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v115.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v116.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v100.l ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: s_and_b32 s0, s2, 0xffff0000 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v16 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v19 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22 ; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1 ; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s2, 16 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v101.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v98.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v102.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v103.l ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: s_and_b32 s0, s17, 0xffff0000 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v16 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v103.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v16 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v112.l ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v24, vcc_lo ; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18 @@ -163191,75 +163299,75 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23 ; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1 ; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s17, 16 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v80.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v83.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v85.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v96.l ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xffff0000 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v16 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v19 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 16, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22 ; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v23, 16, 1 ; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s16, 16 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v36.l, v116.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v36.h, v129.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v98.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v99.l ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s19, 16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v16 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v18 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v22, v23 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 16, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v23 ; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v22, 16, 1 ; GFX11-TRUE16-NEXT: s_and_b32 s1, s19, 0xffff0000 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v118.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v35.h, v132.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v101.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v39.l, v129.l ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: s_and_b32 s0, s18, 0xffff0000 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v16 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v24 :: v_dual_add_nc_u32 v16, v17, v19 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v23, v22 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v23, 0x400000, v19 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v17 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v24 ; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s26, 16 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v84.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v81.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v39.h, v130.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v38.l, v131.l ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v18, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 ; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v24, 16, 1 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v97.l -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 16, v16 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v38.h, v133.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v16 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v23 :: v_dual_add_nc_u32 v16, v17, v18 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v18 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v86.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v64.l ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v15 @@ -163271,7 +163379,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15 ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 16, v16 ; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s21, 16 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v22 :: v_dual_add_nc_u32 v16, v17, v19 @@ -163279,7 +163387,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 ; GFX11-TRUE16-NEXT: s_and_b32 s0, s21, 0xffff0000 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 16, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19 @@ -163292,13 +163400,13 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v25, v22 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v23 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 16, v15 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v22 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.l, v131.l -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v16 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.l, v145.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v148, 16, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s20, 16 @@ -163309,13 +163417,13 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23 ; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s23, 16 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v22 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16 ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v15, v15, v19 :: v_dual_add_nc_u32 v16, v17, v18 ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v22, 16, 1 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: s_and_b32 s0, s23, 0xffff0000 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v149, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 16, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v22 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v18 @@ -163328,13 +163436,13 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v23, 16, 1 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v25, v19 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v23 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 16, v15 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v16, v16, v24 :: v_dual_add_nc_u32 v15, v17, v23 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v24, 0x40c00000, s1 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 16, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 16, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v18 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s22, 16 @@ -163345,14 +163453,14 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23 ; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v24, 16, 1 ; GFX11-TRUE16-NEXT: s_and_b32 s0, s25, 0xffff0000 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v160, 16, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v17, v18 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v19, 16, 1 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v25, v25, v24 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v161, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 16, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v18 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v19 @@ -163364,7 +163472,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v19 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v23, 0x40c00000, s0 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 16, v15 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, v18, v22 ; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xffff0000 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v17, vcc_lo @@ -163372,7 +163480,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v22 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v150, 16, v16 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 16, v16 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v16, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, v17, v23 ; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s24, 16 @@ -163381,7 +163489,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v16, 16, 1 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v17, 0x7fff, v17 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v164, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v163, 16, v15 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v19, v19, v16 ; GFX11-TRUE16-NEXT: s_and_b32 s0, s27, 0xffff0000 @@ -163390,10 +163498,10 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_bfe_u32 v22, v15, 16, 1 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v19 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v151, 16, v17 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 16, v17 ; GFX11-TRUE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s0 ; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s27, 16 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.l, v147.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v43.l, v160.l ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc_lo ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v22, v15 ; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v17, 16, 1 @@ -163413,105 +163521,99 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v23, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, 0x400000, v23 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, v16, v22 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.h, v161.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v43.h, v162.l ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v19, v26, vcc_lo ; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v22 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, 0x7fff, v16 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, v18, v23 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v24 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 16, v17 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v166, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 16, v15 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 16, v17 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v16, v19, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v24, v24 ; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.l, v150.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.h, v163.l -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v162, 16, v16 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v42.l, v165.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v42.h, v164.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v176, 16, v16 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v19, v25, v26, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.l, v134.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.h, v149.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.l, v146.l -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v165, 16, v19 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v57.l, v147.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v57.h, v150.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v56.l, v151.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 16, v19 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v18, v18, v27, vcc_lo -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.h, v160.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v45.h, v145.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.l, v135.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v44.h, v148.l -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v177, 16, v18 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v100.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.l, v114.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v117.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v115.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v28.h, v128.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v49.l, v119.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v49.h, v133.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.l, v130.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v48.h, v144.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.l, v162.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v179.h, v176.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.l, v165.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v178.h, v177.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v53.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v65.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v67.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v68.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v69.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v71.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v85.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v82.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v96.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.l, v151.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v183.h, v164.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.l, v166.l -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.h, v167.l -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[30:31], 24, v[40:41] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[31:32], 24, v[46:47] +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v56.h, v161.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v47.h, v146.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.l, v148.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.l, v166.l +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 16, v18 +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v41.h, v163.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.l, v180.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.l, v176.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v182.h, v177.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v181.l, v178.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v181.h, v179.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v40.h, v167.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v46.h, v149.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v67.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v69.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v68.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v70.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v71.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v80.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v84.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v86.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v87.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v97.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v117.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.h, v118.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.l, v119.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v128.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v52.l, v132.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v52.h, v134.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v51.l, v135.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v51.h, v144.l +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[42:43] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[15:16], 24, v[20:21] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[44:45] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[35:36] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[56:57] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[13:14] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[178:179] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[48:49] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[28:29] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[181:182] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[40:41] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[46:47] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[38:39] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[22:23], 24, v[7:8] -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 24, v49 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 8, v49 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v48 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v36 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 8, v36 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 24, v4 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 8, v4 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 8, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[182:183] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[51:52] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[31:32] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[9:10] ; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[23:24], 24, v[5:6] -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v179 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 8, v179 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 24, v183 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v179, 8, v183 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v180, 8, v182 +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[3:4] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[1:2] +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 24, v182 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 8, v182 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 8, v181 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v183, 24, v41 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v41 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 24, v47 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 8, v47 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v46 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v45 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v45 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v44 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v2 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v2 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1 -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2] -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v178, 8, v178 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v40 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v35 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 24, v29 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v29 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v73, 8, v28 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v181, 8, v41 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v182, 8, v40 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v41, 24, v43 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v40, 8, v43 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v42, 8, v42 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v45, 24, v57 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v43, 8, v57 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v44, 8, v56 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v56, 24, v47 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v47, 8, v47 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v46, 8, v46 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v57, 24, v52 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 8, v52 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v58, 8, v51 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v61, 24, v39 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v60, 8, v39 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v59, 8, v38 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v62, 24, v32 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v63, 8, v32 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v72, 8, v31 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 24, v21 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v21 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 8, v20 @@ -163521,15 +163623,21 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 24, v12 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 24, v10 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v10 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 8, v10 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 24, v8 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 24, v8 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 8, v8 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 24, v6 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 24, v6 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6 ; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 24, v4 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v4 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 8, v3 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 24, v2 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 8, v2 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1 ; GFX11-TRUE16-NEXT: s_branch .LBB91_5 ; GFX11-TRUE16-NEXT: .LBB91_3: ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43 @@ -163551,55 +163659,55 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr58 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr60 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr62 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr82 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr81 ; GFX11-TRUE16-NEXT: ; implicit-def: $vcc_hi ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr49 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr84 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr83 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr52 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr86 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr85 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr55 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr96 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr50 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr87 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr66 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr101 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr98 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr53 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr97 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr51 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr69 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr102 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr100 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr64 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr98 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr99 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr54 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr71 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr103 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr102 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr67 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr99 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr101 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr65 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr80 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr104 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr70 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr100 +; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr103 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr68 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr72 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76 -; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43 ; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43 ; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr43 @@ -163670,358 +163778,344 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-TRUE16-NEXT: ; kill: killed $sgpr43 ; GFX11-TRUE16-NEXT: s_branch .LBB91_2 ; GFX11-TRUE16-NEXT: .LBB91_4: -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v118, s2 :: v_dual_mov_b32 v115, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 0 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s8 :: v_dual_mov_b32 v165, s26 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v162, s27 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v166, s24 :: v_dual_mov_b32 v151, s25 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v177, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 1 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v150, s22 :: v_dual_mov_b32 v147, s23 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v146, s20 :: v_dual_mov_b32 v135, s18 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v176, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 2 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v82, s10 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v134, s21 :: v_dual_mov_b32 v131, s19 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v130, s16 :: v_dual_mov_b32 v119, s17 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v167, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 3 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v116, s3 :: v_dual_mov_b32 v99, s5 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s1 :: v_dual_mov_b32 v87, s7 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v164, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 4 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s4 :: v_dual_mov_b32 v81, s9 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s6 :: v_dual_mov_b32 v71, s11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v163, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 5 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s104 :: v_dual_mov_b32 v112, s100 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s103 :: v_dual_mov_b32 v100, s102 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v161, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 6 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v101, s99 :: v_dual_mov_b32 v96, s101 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s98 :: v_dual_mov_b32 v84, s96 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v160, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 7 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s97 :: v_dual_mov_b32 v70, s13 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v83, s12 :: v_dual_mov_b32 v80, s87 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 8 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s14 :: v_dual_mov_b32 v69, s86 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s15 :: v_dual_mov_b32 v64, s40 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v148, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 9 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s85 :: v_dual_mov_b32 v66, s84 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v54, s41 :: v_dual_mov_b32 v55, s83 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v145, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 10 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s28 :: v_dual_mov_b32 v53, s82 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s29 :: v_dual_mov_b32 v51, s81 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v144, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 11 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s80 :: v_dual_mov_b32 v19, s70 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s68 :: v_dual_mov_b32 v13, s71 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v133, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 12 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v21, s65 :: v_dual_mov_b32 v14, s67 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, s69 :: v_dual_mov_b32 v12, s64 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v132, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 13 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, s54 :: v_dual_mov_b32 v28, s51 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, s66 :: v_dual_mov_b32 v10, s53 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v129, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 14 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s55 :: v_dual_mov_b32 v8, s50 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s48 :: v_dual_mov_b32 v6, s39 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v119, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 14 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v165, s22 +; GFX11-TRUE16-NEXT: v_readlane_b32 s22, v75, 4 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v135, s16 +; GFX11-TRUE16-NEXT: v_readlane_b32 s16, v75, 10 ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v128, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 15 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, s52 :: v_dual_mov_b32 v48, s35 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s37 :: v_dual_mov_b32 v36, s36 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v117, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 16 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v49, s49 :: v_dual_mov_b32 v44, s38 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v45, vcc_hi :: v_dual_mov_b32 v4, s34 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v178, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 17 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s72 :: v_dual_mov_b32 v26, s62 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v30, s60 :: v_dual_mov_b32 v31, s58 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v39, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 18 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v32, s56 :: v_dual_mov_b32 v33, s46 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s44 :: v_dual_mov_b32 v38, s42 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v34, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 19 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s74 :: v_dual_mov_b32 v16, s76 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s78 :: v_dual_mov_b32 v18, s88 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v180, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 20 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s90 :: v_dual_mov_b32 v23, s92 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, s94 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, s30 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 21 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 22 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 23 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 15 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v117, s1 :: v_dual_mov_b32 v178, s26 +; GFX11-TRUE16-NEXT: v_readlane_b32 s26, v75, 0 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v180, s24 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v118, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 16 +; GFX11-TRUE16-NEXT: v_readlane_b32 s24, v75, 2 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v164, s22 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v160, s23 :: v_dual_mov_b32 v151, s20 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v50, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 17 +; GFX11-TRUE16-NEXT: v_readlane_b32 s22, v75, 5 +; GFX11-TRUE16-NEXT: v_readlane_b32 s20, v75, 6 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v148, s18 +; GFX11-TRUE16-NEXT: v_readlane_b32 s18, v75, 8 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v37, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 18 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v144, s16 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v132, s17 :: v_dual_mov_b32 v131, s2 +; GFX11-TRUE16-NEXT: v_readlane_b32 s16, v75, 11 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v30, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 19 +; GFX11-TRUE16-NEXT: v_readlane_b32 s2, v75, 12 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v179, s26 +; GFX11-TRUE16-NEXT: v_readlane_b32 s26, v75, 1 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v167, s24 :: v_dual_mov_b32 v182, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 20 +; GFX11-TRUE16-NEXT: v_readlane_b32 s24, v75, 3 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v162, s22 :: v_dual_mov_b32 v161, s20 +; GFX11-TRUE16-NEXT: v_readlane_b32 s20, v75, 7 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v183, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 24 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v182, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 25 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 21 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v149, s18 +; GFX11-TRUE16-NEXT: v_readlane_b32 s18, v75, 9 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v134, s16 :: v_dual_mov_b32 v133, s2 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v181, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 22 +; GFX11-TRUE16-NEXT: v_readlane_b32 s2, v75, 13 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v176, s27 :: v_dual_mov_b32 v177, s26 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v166, s25 :: v_dual_mov_b32 v163, s24 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v42, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 26 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 27 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 23 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v147, s21 :: v_dual_mov_b32 v150, s20 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v145, s19 :: v_dual_mov_b32 v146, s18 ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 28 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 24 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v129, s3 :: v_dual_mov_b32 v130, s2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s4 :: v_dual_mov_b32 v116, s104 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 25 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s5 :: v_dual_mov_b32 v114, s103 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v103, s6 :: v_dual_mov_b32 v112, s102 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v44, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 26 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v100, s7 :: v_dual_mov_b32 v99, s8 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v102, s101 :: v_dual_mov_b32 v101, s100 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v45, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 27 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s9 :: v_dual_mov_b32 v87, s10 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v98, s99 :: v_dual_mov_b32 v97, s98 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 28 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s11 :: v_dual_mov_b32 v83, s12 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s97 :: v_dual_mov_b32 v85, s96 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v46, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 29 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 29 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v81, s13 :: v_dual_mov_b32 v82, s87 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v71, s14 :: v_dual_mov_b32 v80, s86 ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v56, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 30 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 30 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v68, s15 :: v_dual_mov_b32 v67, s40 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s85 :: v_dual_mov_b32 v69, s84 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v47, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 31 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v75, 31 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s41 :: v_dual_mov_b32 v66, s83 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s28 :: v_dual_mov_b32 v64, s82 ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v58, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 1 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 0 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v53, s29 :: v_dual_mov_b32 v54, s81 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s80 :: v_dual_mov_b32 v21, s65 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v57, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 3 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 4 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 1 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s68 :: v_dual_mov_b32 v11, s69 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, s67 :: v_dual_mov_b32 v27, s54 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v52, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, s70 :: v_dual_mov_b32 v12, s64 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v9, s66 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v13, s71 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v59, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 3 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s51 :: v_dual_mov_b32 v10, s53 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, s55 :: v_dual_mov_b32 v32, s48 ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v61, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 5 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v73, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 6 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v63, s0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v77, 7 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 4 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s50 :: v_dual_mov_b32 v5, s52 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v38, s37 :: v_dual_mov_b32 v3, s49 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v60, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 5 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s39 :: v_dual_mov_b32 v39, s35 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s36 :: v_dual_mov_b32 v1, s38 ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v72, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 6 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, vcc_hi :: v_dual_mov_b32 v2, s34 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v25, s72 :: v_dual_mov_b32 v28, s62 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v62, s0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s0, v76, 7 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v33, s60 :: v_dual_mov_b32 v34, s58 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s56 :: v_dual_mov_b32 v36, s46 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v63, s0 :: v_dual_mov_b32 v48, s44 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v49, s42 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s30 :: v_dual_mov_b32 v16, s94 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v17, s92 :: v_dual_mov_b32 v18, s90 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s88 :: v_dual_mov_b32 v23, s78 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v26, s76 :: v_dual_mov_b32 v29, s74 ; GFX11-TRUE16-NEXT: .LBB91_5: ; %end -; GFX11-TRUE16-NEXT: v_perm_b32 v2, v128, v38, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v38, v115, v73, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v115, v117, v63, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_perm_b32 v117, v114, v72, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v114, v129, v62, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-TRUE16-NEXT: v_perm_b32 v37, v132, v37, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v115, 16, v115 -; GFX11-TRUE16-NEXT: v_perm_b32 v118, v118, v60, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v129, 16, v114 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v38, v2 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, v144, v33, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37 -; GFX11-TRUE16-NEXT: v_perm_b32 v128, v116, v61, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v33, v130, v59, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v32, v148, v32, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v117, v115 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v118, v37 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v128, v129 -; GFX11-TRUE16-NEXT: v_perm_b32 v37, v133, v58, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v38, v119, v57, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v119, v135, v46, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v128, v33, v2 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, v160, v31, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37 -; GFX11-TRUE16-NEXT: v_perm_b32 v31, v149, v43, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v130, v119, v32 -; GFX11-TRUE16-NEXT: v_perm_b32 v32, v146, v42, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v30, v163, v30, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-TRUE16-NEXT: v_perm_b32 v118, v145, v56, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v129, v38, v37 -; GFX11-TRUE16-NEXT: v_perm_b32 v33, v134, v41, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v38, 16, v30 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v32, v2 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, v161, v183, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v131, v131, v47, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v49, v128, v49, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v118, v118, v62, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v48, v133, v48, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v119, v119, v72, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v117, v117, v63, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v49, 16, v49 +; GFX11-TRUE16-NEXT: v_perm_b32 v128, v130, v61, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v118, 16, v118 -; GFX11-TRUE16-NEXT: v_perm_b32 v37, v150, v40, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v26, v167, v26, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v33, v31 -; GFX11-TRUE16-NEXT: v_perm_b32 v33, v147, v182, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v177, v25, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v131, v131, v118 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v32, v37, v38 -; GFX11-TRUE16-NEXT: v_perm_b32 v38, v166, v180, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v69, v23, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v18, v96, v18, 0xc0c0004 -; GFX11-TRUE16-NEXT: s_clause 0x1 -; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off -; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[128:131], off offset:16 -; GFX11-TRUE16-NEXT: v_perm_b32 v116, v165, v178, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v130, v131, v59, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48 +; GFX11-TRUE16-NEXT: v_perm_b32 v36, v144, v36, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v35, v149, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v131, v129, v60, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v133, 16, v128 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v128, v119, v49 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v129, v117, v118 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v130, v130, v48 +; GFX11-TRUE16-NEXT: v_perm_b32 v48, v135, v58, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v49, v134, v57, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36 +; GFX11-TRUE16-NEXT: v_perm_b32 v118, v148, v46, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35 +; GFX11-TRUE16-NEXT: v_perm_b32 v34, v161, v34, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v52, v132, v52, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v49, 16, v49 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v132, v48, v36 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v134, v118, v35 +; GFX11-TRUE16-NEXT: v_perm_b32 v35, v150, v45, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v36, v151, v44, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v33, v164, v33, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v131, v131, v133 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v133, v52, v49 +; GFX11-TRUE16-NEXT: v_perm_b32 v48, v147, v43, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v35, 16, v35 +; GFX11-TRUE16-NEXT: v_perm_b32 v49, v165, v42, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v52, 16, v33 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v36, v34 +; GFX11-TRUE16-NEXT: v_perm_b32 v36, v162, v41, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v28, v167, v28, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v34, v48, v35 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v35, v49, v52 +; GFX11-TRUE16-NEXT: v_perm_b32 v48, v160, v40, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36 +; GFX11-TRUE16-NEXT: v_perm_b32 v52, v180, v182, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v179, v25, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v80, v23, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v97, v18, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v50, v178, v50, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v33, v33, v2 -; GFX11-TRUE16-NEXT: v_perm_b32 v2, v176, v39, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v114, v38, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v26, v51, v45, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v5, v68, v5, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v22, v84, v22, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v36, v48, v36 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v48, v52, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v28, v177, v37, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v69, v26, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v5, v71, v5, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v85, v22, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; GFX11-TRUE16-NEXT: v_perm_b32 v9, v82, v9, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v17, v100, v17, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v9, v87, v9, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v101, v17, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v37, v164, v181, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v116, v116, v25 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v162, v34, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, v50, v4, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v117, v146, v56, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v50, v50, v25 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v176, v30, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v3, v67, v3, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; GFX11-TRUE16-NEXT: v_perm_b32 v7, v83, v7, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v5, v23 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v80, v29, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v11, v86, v11, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v82, v32, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v11, v99, v11, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v18, v97, v27, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v115, v151, v179, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37 -; GFX11-TRUE16-NEXT: v_perm_b32 v1, v53, v1, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v3, v66, v3, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v117, v25, v2 -; GFX11-TRUE16-NEXT: v_perm_b32 v25, v55, v48, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v4, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v26, v67, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v98, v27, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v119, v145, v47, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117 +; GFX11-TRUE16-NEXT: v_perm_b32 v49, v163, v183, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v29, v64, v29, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v30, v54, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v51, v25, v28 +; GFX11-TRUE16-NEXT: v_perm_b32 v25, v66, v39, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v3, v26 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v70, v38, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v7, v22 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v22, 16, v23 -; GFX11-TRUE16-NEXT: v_perm_b32 v23, v85, v28, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v86, v31, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v11, v17 -; GFX11-TRUE16-NEXT: v_perm_b32 v16, v103, v16, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v16, v112, v16, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 16, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v18, v101, v21, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v15, v113, v15, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v21, v112, v24, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v115, v115, v37 -; GFX11-TRUE16-NEXT: v_perm_b32 v34, v52, v44, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-TRUE16-NEXT: v_perm_b32 v37, v64, v49, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_perm_b32 v4, v54, v36, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v102, v21, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v15, v116, v15, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v114, v24, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v135, v119, v117 +; GFX11-TRUE16-NEXT: v_perm_b32 v117, v166, v181, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v49, 16, v49 +; GFX11-TRUE16-NEXT: v_perm_b32 v1, v55, v1, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; GFX11-TRUE16-NEXT: v_perm_b32 v2, v53, v2, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; GFX11-TRUE16-NEXT: v_perm_b32 v4, v65, v4, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; GFX11-TRUE16-NEXT: v_perm_b32 v6, v65, v6, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v6, v68, v6, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v70, v8, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v71, v10, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v8, v81, v8, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v10, v84, v10, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; GFX11-TRUE16-NEXT: v_perm_b32 v12, v81, v12, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v13, v98, v13, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v12, v96, v12, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v13, v103, v13, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX11-TRUE16-NEXT: v_perm_b32 v14, v87, v14, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v14, v100, v14, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-TRUE16-NEXT: v_perm_b32 v20, v102, v20, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v115, v20, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; GFX11-TRUE16-NEXT: v_perm_b32 v19, v99, v19, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v113, v19, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v34, v1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v37, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v49, v117, v49 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v1, v29 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v2, v30 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v25 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v6, v26 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v22 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v23 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v12, v17 +; GFX11-TRUE16-NEXT: s_clause 0x1 +; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[128:131], off +; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[132:135], off offset:16 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v13, v16 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v18 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v20, v15 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v19, v21 ; GFX11-TRUE16-NEXT: s_clause 0x5 -; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[30:33], off offset:32 -; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[114:117], off offset:48 +; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[33:36], off offset:32 +; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[48:51], off offset:48 ; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:64 ; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:80 ; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:96 ; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:112 -; GFX11-TRUE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload -; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 -; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 offset:4 -; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:8 -; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:12 -; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:16 -; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:20 -; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:24 -; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:28 -; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:32 -; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:36 -; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:40 -; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:44 -; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:48 -; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:52 -; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:56 -; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:60 -; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:64 -; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:68 -; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v75, 7 -; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v75, 8 -; GFX11-TRUE16-NEXT: v_readlane_b32 s104, v75, 6 -; GFX11-TRUE16-NEXT: v_readlane_b32 s103, v75, 5 -; GFX11-TRUE16-NEXT: v_readlane_b32 s102, v75, 4 -; GFX11-TRUE16-NEXT: v_readlane_b32 s101, v75, 3 -; GFX11-TRUE16-NEXT: v_readlane_b32 s100, v75, 2 -; GFX11-TRUE16-NEXT: v_readlane_b32 s99, v75, 1 -; GFX11-TRUE16-NEXT: v_readlane_b32 s98, v75, 0 -; GFX11-TRUE16-NEXT: v_readlane_b32 s97, v74, 31 -; GFX11-TRUE16-NEXT: v_readlane_b32 s96, v74, 30 -; GFX11-TRUE16-NEXT: v_readlane_b32 s87, v74, 29 -; GFX11-TRUE16-NEXT: v_readlane_b32 s86, v74, 28 -; GFX11-TRUE16-NEXT: v_readlane_b32 s85, v74, 27 -; GFX11-TRUE16-NEXT: v_readlane_b32 s84, v74, 26 -; GFX11-TRUE16-NEXT: v_readlane_b32 s83, v74, 25 -; GFX11-TRUE16-NEXT: v_readlane_b32 s82, v74, 24 -; GFX11-TRUE16-NEXT: v_readlane_b32 s81, v74, 23 -; GFX11-TRUE16-NEXT: v_readlane_b32 s80, v74, 22 -; GFX11-TRUE16-NEXT: v_readlane_b32 s71, v74, 21 -; GFX11-TRUE16-NEXT: v_readlane_b32 s70, v74, 20 -; GFX11-TRUE16-NEXT: v_readlane_b32 s69, v74, 19 -; GFX11-TRUE16-NEXT: v_readlane_b32 s68, v74, 18 -; GFX11-TRUE16-NEXT: v_readlane_b32 s67, v74, 17 -; GFX11-TRUE16-NEXT: v_readlane_b32 s66, v74, 16 -; GFX11-TRUE16-NEXT: v_readlane_b32 s65, v74, 15 -; GFX11-TRUE16-NEXT: v_readlane_b32 s64, v74, 14 -; GFX11-TRUE16-NEXT: v_readlane_b32 s55, v74, 13 -; GFX11-TRUE16-NEXT: v_readlane_b32 s54, v74, 12 -; GFX11-TRUE16-NEXT: v_readlane_b32 s53, v74, 11 -; GFX11-TRUE16-NEXT: v_readlane_b32 s52, v74, 10 -; GFX11-TRUE16-NEXT: v_readlane_b32 s51, v74, 9 -; GFX11-TRUE16-NEXT: v_readlane_b32 s50, v74, 8 -; GFX11-TRUE16-NEXT: v_readlane_b32 s49, v74, 7 -; GFX11-TRUE16-NEXT: v_readlane_b32 s48, v74, 6 -; GFX11-TRUE16-NEXT: v_readlane_b32 s39, v74, 5 -; GFX11-TRUE16-NEXT: v_readlane_b32 s38, v74, 4 -; GFX11-TRUE16-NEXT: v_readlane_b32 s37, v74, 3 -; GFX11-TRUE16-NEXT: v_readlane_b32 s36, v74, 2 -; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v74, 1 -; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v74, 0 +; GFX11-TRUE16-NEXT: s_clause 0x10 ; 68-byte Folded Reload +; GFX11-TRUE16-NEXT: scratch_load_b32 v72, off, s32 +; GFX11-TRUE16-NEXT: scratch_load_b32 v63, off, s32 offset:4 +; GFX11-TRUE16-NEXT: scratch_load_b32 v62, off, s32 offset:8 +; GFX11-TRUE16-NEXT: scratch_load_b32 v61, off, s32 offset:12 +; GFX11-TRUE16-NEXT: scratch_load_b32 v60, off, s32 offset:16 +; GFX11-TRUE16-NEXT: scratch_load_b32 v59, off, s32 offset:20 +; GFX11-TRUE16-NEXT: scratch_load_b32 v58, off, s32 offset:24 +; GFX11-TRUE16-NEXT: scratch_load_b32 v57, off, s32 offset:28 +; GFX11-TRUE16-NEXT: scratch_load_b32 v56, off, s32 offset:32 +; GFX11-TRUE16-NEXT: scratch_load_b32 v47, off, s32 offset:36 +; GFX11-TRUE16-NEXT: scratch_load_b32 v46, off, s32 offset:40 +; GFX11-TRUE16-NEXT: scratch_load_b32 v45, off, s32 offset:44 +; GFX11-TRUE16-NEXT: scratch_load_b32 v44, off, s32 offset:48 +; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:52 +; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:56 +; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:60 +; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:64 +; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v74, 7 +; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v74, 8 +; GFX11-TRUE16-NEXT: v_readlane_b32 s104, v74, 6 +; GFX11-TRUE16-NEXT: v_readlane_b32 s103, v74, 5 +; GFX11-TRUE16-NEXT: v_readlane_b32 s102, v74, 4 +; GFX11-TRUE16-NEXT: v_readlane_b32 s101, v74, 3 +; GFX11-TRUE16-NEXT: v_readlane_b32 s100, v74, 2 +; GFX11-TRUE16-NEXT: v_readlane_b32 s99, v74, 1 +; GFX11-TRUE16-NEXT: v_readlane_b32 s98, v74, 0 +; GFX11-TRUE16-NEXT: v_readlane_b32 s97, v73, 31 +; GFX11-TRUE16-NEXT: v_readlane_b32 s96, v73, 30 +; GFX11-TRUE16-NEXT: v_readlane_b32 s87, v73, 29 +; GFX11-TRUE16-NEXT: v_readlane_b32 s86, v73, 28 +; GFX11-TRUE16-NEXT: v_readlane_b32 s85, v73, 27 +; GFX11-TRUE16-NEXT: v_readlane_b32 s84, v73, 26 +; GFX11-TRUE16-NEXT: v_readlane_b32 s83, v73, 25 +; GFX11-TRUE16-NEXT: v_readlane_b32 s82, v73, 24 +; GFX11-TRUE16-NEXT: v_readlane_b32 s81, v73, 23 +; GFX11-TRUE16-NEXT: v_readlane_b32 s80, v73, 22 +; GFX11-TRUE16-NEXT: v_readlane_b32 s71, v73, 21 +; GFX11-TRUE16-NEXT: v_readlane_b32 s70, v73, 20 +; GFX11-TRUE16-NEXT: v_readlane_b32 s69, v73, 19 +; GFX11-TRUE16-NEXT: v_readlane_b32 s68, v73, 18 +; GFX11-TRUE16-NEXT: v_readlane_b32 s67, v73, 17 +; GFX11-TRUE16-NEXT: v_readlane_b32 s66, v73, 16 +; GFX11-TRUE16-NEXT: v_readlane_b32 s65, v73, 15 +; GFX11-TRUE16-NEXT: v_readlane_b32 s64, v73, 14 +; GFX11-TRUE16-NEXT: v_readlane_b32 s55, v73, 13 +; GFX11-TRUE16-NEXT: v_readlane_b32 s54, v73, 12 +; GFX11-TRUE16-NEXT: v_readlane_b32 s53, v73, 11 +; GFX11-TRUE16-NEXT: v_readlane_b32 s52, v73, 10 +; GFX11-TRUE16-NEXT: v_readlane_b32 s51, v73, 9 +; GFX11-TRUE16-NEXT: v_readlane_b32 s50, v73, 8 +; GFX11-TRUE16-NEXT: v_readlane_b32 s49, v73, 7 +; GFX11-TRUE16-NEXT: v_readlane_b32 s48, v73, 6 +; GFX11-TRUE16-NEXT: v_readlane_b32 s39, v73, 5 +; GFX11-TRUE16-NEXT: v_readlane_b32 s38, v73, 4 +; GFX11-TRUE16-NEXT: v_readlane_b32 s37, v73, 3 +; GFX11-TRUE16-NEXT: v_readlane_b32 s36, v73, 2 +; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v73, 1 +; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v73, 0 ; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s0, -1 ; GFX11-TRUE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-TRUE16-NEXT: scratch_load_b32 v73, off, s32 offset:68 ; GFX11-TRUE16-NEXT: scratch_load_b32 v74, off, s32 offset:72 ; GFX11-TRUE16-NEXT: scratch_load_b32 v75, off, s32 offset:76 ; GFX11-TRUE16-NEXT: scratch_load_b32 v76, off, s32 offset:80 -; GFX11-TRUE16-NEXT: scratch_load_b32 v77, off, s32 offset:84 ; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s0 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] @@ -164031,88 +164125,86 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1 ; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:68 ; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:72 ; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:76 ; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:80 -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v77, s32 offset:84 ; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4 -; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:68 -; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:64 +; GFX11-FAKE16-NEXT: s_clause 0x10 ; 68-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:64 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:60 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:56 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:52 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:48 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:44 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:40 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:36 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:32 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:28 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:24 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:20 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:16 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:12 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:8 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:8 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:4 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:4 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s34, 0 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s35, 1 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s36, 2 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s37, 3 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s38, 4 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s39, 5 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s48, 6 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s49, 7 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s50, 8 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s51, 9 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s52, 10 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s53, 11 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s54, 12 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s55, 13 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s64, 14 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s65, 15 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s66, 16 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s67, 17 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s68, 18 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s69, 19 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s70, 20 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s71, 21 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s80, 22 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s81, 23 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s82, 24 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s83, 25 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s84, 26 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s85, 27 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s86, 28 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s87, 29 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s96, 30 -; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s97, 31 -; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s98, 0 -; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s99, 1 -; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s100, 2 -; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s101, 3 -; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s102, 4 -; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s103, 5 -; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s104, 6 -; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s30, 7 -; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s31, 8 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s34, 0 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s35, 1 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s36, 2 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s37, 3 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s38, 4 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s39, 5 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s48, 6 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s49, 7 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s50, 8 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s51, 9 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s52, 10 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s53, 11 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s54, 12 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s55, 13 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s64, 14 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s65, 15 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s66, 16 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s67, 17 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s68, 18 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s69, 19 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s70, 20 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s71, 21 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s80, 22 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s81, 23 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s82, 24 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s83, 25 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s84, 26 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s85, 27 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s86, 28 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s87, 29 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s96, 30 +; GFX11-FAKE16-NEXT: v_writelane_b32 v73, s97, 31 +; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s98, 0 +; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s99, 1 +; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s100, 2 +; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s101, 3 +; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s102, 4 +; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s103, 5 +; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s104, 6 +; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s30, 7 +; GFX11-FAKE16-NEXT: v_writelane_b32 v74, s31, 8 ; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s42, v15 ; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s5, v14 ; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s4, v13 @@ -164130,156 +164222,156 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s40, v1 ; GFX11-FAKE16-NEXT: s_cmp_lg_u32 s42, 0 ; GFX11-FAKE16-NEXT: s_mov_b32 vcc_lo, 0 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75 : SGPR spill to VGPR lane ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane ; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB91_3 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 24 ; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s5, 24 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 17 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 17 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 16 -; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s5, 16 +; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s5, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s5, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s4, 16 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 1 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 1 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s27, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s4, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s7, 24 -; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s7, 16 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 18 +; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s7, 16 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 18 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s7, 8 -; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s6, 16 +; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s6, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s6, 8 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 0 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 0 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s26, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s9, 24 -; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s9, 16 +; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s9, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s9, 8 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 16 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 24 -; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s8, 16 +; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s8, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s8, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s11, 24 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 20 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 20 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s11, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s11, 8 -; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s10, 16 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 3 +; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s10, 16 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 3 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s25, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s10, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s13, 24 ; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s13, 16 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 21 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 21 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s13, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s12, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s12, 8 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 2 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 2 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s24, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s15, 24 ; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s15, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s15, 8 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 19 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 19 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 24 ; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s14, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s14, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s41, 24 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 23 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 23 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s41, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s41, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s40, 16 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 5 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 5 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s23, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s40, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 vcc_hi, s29, 24 ; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s29, 16 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 24 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 24 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s29, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s28, 16 ; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s28, 8 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 4 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 4 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s22, 8 ; GFX11-FAKE16-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 ; GFX11-FAKE16-NEXT: s_lshr_b64 s[62:63], s[24:25], 24 ; GFX11-FAKE16-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 22 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 22 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 24 ; GFX11-FAKE16-NEXT: s_lshr_b64 s[58:59], s[20:21], 24 ; GFX11-FAKE16-NEXT: s_lshr_b64 s[56:57], s[18:19], 24 ; GFX11-FAKE16-NEXT: s_lshr_b64 s[46:47], s[16:17], 24 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 26 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 26 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 16 ; GFX11-FAKE16-NEXT: s_lshr_b64 s[44:45], s[2:3], 24 -; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[4:5], 24 -; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[6:7], 24 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 7 +; GFX11-FAKE16-NEXT: s_lshr_b64 s[30:31], s[4:5], 24 +; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[6:7], 24 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 7 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s21, 8 -; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[8:9], 24 -; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[10:11], 24 -; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[12:13], 24 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 27 +; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[8:9], 24 +; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 +; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[12:13], 24 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 27 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 16 -; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[14:15], 24 -; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[40:41], 24 -; GFX11-FAKE16-NEXT: s_lshr_b64 s[30:31], s[28:29], 24 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 6 +; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[14:15], 24 +; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[40:41], 24 +; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 6 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s20, 8 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 25 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 25 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 24 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 29 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 29 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 16 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 9 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 9 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s19, 8 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 30 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 30 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 16 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 8 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 8 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s18, 8 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 28 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 28 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 24 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 0 +; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 0 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 16 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 11 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 11 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s17, 8 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 1 +; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 1 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 16 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 10 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 10 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s16, 8 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 31 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 31 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 24 -; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 3 +; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 3 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 16 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 13 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 13 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s3, 8 -; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 4 +; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 4 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 16 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 12 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 12 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s2, 8 -; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 2 +; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 2 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 24 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 6 +; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 6 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 16 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 15 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 15 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s1, 8 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 7 +; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 7 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 16 -; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 14 +; GFX11-FAKE16-NEXT: v_writelane_b32 v75, s42, 14 ; GFX11-FAKE16-NEXT: s_lshr_b32 s42, s0, 8 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-FAKE16-NEXT: v_writelane_b32 v77, s42, 5 +; GFX11-FAKE16-NEXT: v_writelane_b32 v76, s42, 5 ; GFX11-FAKE16-NEXT: s_lshr_b64 s[42:43], s[0:1], 24 ; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_lo ; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB91_4 @@ -164314,7 +164406,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v11, v6 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v10, v4 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v7 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v1 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo ; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s41 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, 0x400000, v6 @@ -164323,13 +164415,13 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3 ; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v8, 16, 1 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v2 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v2 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo ; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v6, v8 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s28 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v1 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v7 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v3, v3, v9 :: v_dual_add_nc_u32 v4, 0x7fff, v4 @@ -164344,15 +164436,15 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v6, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v6 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v3 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v4 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v3 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 16, v4 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v5, v6 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v1, v10, vcc_lo ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v8, v9 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v7 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 16, v7 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v9 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 @@ -164363,16 +164455,16 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo ; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v8, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v39 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v52 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v5 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v5 ; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v6, v4, v11 :: v_dual_add_nc_u32 v5, v7, v8 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v9, v10 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s15 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s14 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, 0x7fff, v5 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v6 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v6 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v7 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, 0x400000, v10 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 @@ -164384,8 +164476,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_bfe_u32 v7, v9, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v11 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v48, 16, v2 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v6 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v53, 16, v2 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v6 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v6, v7, v9 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v10, v11 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc_lo @@ -164400,9 +164492,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc_lo ; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v10, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 16, v5 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v5 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 16, v7 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v7 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v7, v8, v10 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v11, v12 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s13 @@ -164417,7 +164509,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12 ; GFX11-FAKE16-NEXT: s_and_b32 s12, s11, 0xffff0000 ; GFX11-FAKE16-NEXT: s_lshl_b32 s11, s11, 16 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 16, v9 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v9 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v12 ; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v13, 16, 1 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4) @@ -164425,7 +164517,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v11, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v13 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 16, v8 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v8 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v7, v7, v14 :: v_dual_add_nc_u32 v8, v9, v11 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v12, v13 @@ -164437,12 +164529,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: s_lshl_b32 s10, s10, 16 ; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v14, 16, 1 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v12 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v7 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 16, v7 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc_lo ; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v12, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v9 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v9 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v10, v12 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v13, v14 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v13, 0x40c00000, s11 @@ -164457,7 +164549,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14 ; GFX11-FAKE16-NEXT: s_and_b32 s10, s9, 0xffff0000 ; GFX11-FAKE16-NEXT: s_lshl_b32 s9, s9, 16 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 16, v11 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v11 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v14 ; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v15, 16, 1 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4) @@ -164465,7 +164557,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_bfe_u32 v11, v13, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, 0x400000, v15 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 16, v10 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 16, v10 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, v11, v13 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v14, v15 @@ -164481,9 +164573,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc_lo ; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v14, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v68 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 16, v11 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v9 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v83 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v11 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, v12, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v15, v16 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s9 @@ -164498,17 +164590,17 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16 ; GFX11-FAKE16-NEXT: s_and_b32 s8, s7, 0xffff0000 ; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s7, 16 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 16, v13 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v13 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, 0x400000, v16 ; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v17, 16, 1 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v82, 16, v9 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v10, v85, 16, v9 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v12, v13 :: v_dual_and_b32 v9, 0xffff, v71 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v12, v12, v13 :: v_dual_and_b32 v9, 0xffff, v86 ; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v15, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v17 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v85, 16, v9 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 16, v12 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, v96, 16, v9 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v12 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, v13, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v16, v17 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v11, v18, vcc_lo @@ -164524,15 +164616,15 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_bfe_u32 v14, v16, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v16 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v11 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 16, v13 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v11 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v13 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v14, v16 ; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v15, v12, v19 :: v_dual_add_nc_u32 v14, v17, v18 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v17, 0x40c00000, s7 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s6 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v15 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v18 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 @@ -164544,8 +164636,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v17, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v19 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v70 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v14 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v87 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v15, v17 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo @@ -164561,14 +164653,14 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v18, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v17, v17 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v18 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v13 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 16, v15 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v13 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 16, v15 ; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v21 :: v_dual_add_nc_u32 v15, v16, v18 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, v19, v20 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s5 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s4 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v16 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, 0x400000, v20 @@ -164579,109 +164671,111 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc_lo ; GFX11-FAKE16-NEXT: v_bfe_u32 v16, v19, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v49 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v20, v21 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v15 -; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v22 :: v_dual_add_nc_u32 v15, v16, v19 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s4 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 16, v15 +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v22 :: v_dual_add_nc_u32 v15, v16, v19 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21 ; GFX11-FAKE16-NEXT: s_and_b32 s1, s0, 0xffff0000 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v14 +; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21 ; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1 -; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v84 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v50, 16, v3 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v99 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v97, 16, v11 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v98 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo ; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v54 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1 -; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s3, 16 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v15 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v22 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, 0x400000, v20 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 16, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22 ; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1 ; GFX11-FAKE16-NEXT: s_and_b32 s0, s3, 0xffff0000 +; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s3, 16 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v19 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v98, 16, v13 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo ; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v87 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v15 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v55, 16, v3 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v23, vcc_lo ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21 -; GFX11-FAKE16-NEXT: s_and_b32 s0, s2, 0xffff0000 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v14 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v101, 16, v13 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21 ; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v102 +; GFX11-FAKE16-NEXT: s_and_b32 s0, s2, 0xffff0000 ; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s2, 16 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v100, 16, v13 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v96 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo ; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v20, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v51 -; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 16, v15 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v64 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v103, 16, v13 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v20 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v22 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v112 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s1 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v24, v101, 16, v13 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v22 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v99 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v24, v113, 16, v13 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v114 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v20 ; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v21, 16, 1 -; GFX11-FAKE16-NEXT: s_and_b32 s0, s17, 0xffff0000 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo ; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v19, 16, 1 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v23, v102, 16, v13 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v103 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v15 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v23, v115, 16, v13 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v116 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v18, v19 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v22, v21 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v114, 16, v13 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v112 -; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v14 +; GFX11-FAKE16-NEXT: s_and_b32 s0, s17, 0xffff0000 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v35, v117, 16, v13 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v118 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v21 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21 ; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s17, 16 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v117, 16, v13 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v113 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v34, v119, 16, v13 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v128 ; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v22, 16, 1 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo ; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v19 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v19, v19 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v38, v118, 16, v13 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v15 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v51, v129, 16, v13 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v15 ; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v18, 16, 1 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, v21, v22 ; GFX11-FAKE16-NEXT: s_and_b32 s0, s16, 0xffff0000 @@ -164698,16 +164792,16 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_add_f32_e64 v26, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v20, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v14 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v115 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v14 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v130 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v25, v19 ; GFX11-FAKE16-NEXT: v_bfe_u32 v20, v26, 16, 1 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v21, vcc_lo ; GFX11-FAKE16-NEXT: s_and_b32 s0, s19, 0xffff0000 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v37, v129, 16, v14 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v13 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v50, v132, 16, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v13 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v18 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v15 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v15 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, v20, v26 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, 0x400000, v19 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0 @@ -164720,43 +164814,43 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26 ; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v20, 16, 1 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v52, 16, v3 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v65, 16, v3 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v19, v22, v18 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v13 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v13 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) ; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v21 :: v_dual_add_nc_u32 v15, v15, v20 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v19 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v19, 0x400000, v20 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v14 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, 0x400000, v18 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15 ; GFX11-FAKE16-NEXT: s_and_b32 s0, s18, 0xffff0000 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v116 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v131 ; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s21, 16 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v53 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v128 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v44, v130, 16, v21 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v13 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v66 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v135 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v59, v133, 16, v21 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v13 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v15, v19, vcc_lo ; GFX11-FAKE16-NEXT: v_add_f32_e64 v15, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s18, 16 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v19, 0x40c00000, s1 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v43, v134, 16, v22 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v14 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v58, v145, 16, v22 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v14 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: s_and_b32 s0, s21, 0xffff0000 ; GFX11-FAKE16-NEXT: v_bfe_u32 v25, v19, 16, 1 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v119 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v134 ; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v14, 16, 1 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, 0x400000, v14 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14 ; GFX11-FAKE16-NEXT: v_bfe_u32 v22, v18, 16, 1 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v46, v133, 16, v20 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v45, v144, 16, v20 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v21, v14 ; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v15, 16, 1 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, 0x400000, v19 @@ -164772,25 +164866,25 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 0x7fff, v13 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v15 ; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xffff0000 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v14 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v19, v22, v27, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s20, 16 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v86, 16, v11 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v19 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v100, 16, v11 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v19 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v21, v28, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v15, v15 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v132 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v83 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v131 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v18 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v148 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v68, 16, v3 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v146 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v18 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v13, v25, vcc_lo ; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s23, 16 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v14 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v41, v145, 16, v15 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v13 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v47, v147, 16, v15 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v13 ; GFX11-FAKE16-NEXT: v_bfe_u32 v13, v14, 16, 1 ; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v18, 16, 1 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0 @@ -164814,32 +164908,32 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v21 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v27, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v67 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v14 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v20, 0x40c00000, s0 -; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s22, 16 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v15 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v15 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v18, v22, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v54 +; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s22, 16 ; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v20, 16, 1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v13 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v18 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v69, 16, v5 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 16, v18 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v20, v20 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v20 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v64, 16, v5 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v135 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v13 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v150 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v14 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15 ; GFX11-FAKE16-NEXT: s_and_b32 s0, s25, 0xffff0000 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v144 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v183, v149, 16, v18 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v160 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v41, v151, 16, v18 ; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v14, 16, 1 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v18, 0x400000, v20 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v22, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s25, 16 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v45, v147, 16, v19 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v44, v149, 16, v19 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v21, v14 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc_lo ; GFX11-FAKE16-NEXT: v_add_f32_e64 v18, 0x40c00000, s0 @@ -164848,141 +164942,133 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v21 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v14 ; GFX11-FAKE16-NEXT: v_bfe_u32 v26, v18, 16, 1 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v70 ; GFX11-FAKE16-NEXT: s_and_b32 s0, s24, 0xffff0000 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v15 -; GFX11-FAKE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v15 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v20, v21, vcc_lo ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, v25, v22 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v21, v26, v18 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v27, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 -; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v27, 16, 1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, 0x7fff, v20 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v20, 0x7fff, v21 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, 0x400000, v18 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v67 +; GFX11-FAKE16-NEXT: v_bfe_u32 v15, v27, 16, 1 ; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s24, 16 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, 0x400000, v22 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v18, v20, v21 :: v_dual_add_nc_u32 v15, v15, v27 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v26, 0x40c00000, s0 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v20, v21, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v22, v22 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, v15, v27 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v20, 0x400000, v27 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v15 -; GFX11-FAKE16-NEXT: s_and_b32 s0, s27, 0xffff0000 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v14, v25, vcc_lo ; GFX11-FAKE16-NEXT: v_bfe_u32 v21, v26, 16, 1 +; GFX11-FAKE16-NEXT: s_and_b32 s0, s27, 0xffff0000 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v14, v14, v25 :: v_dual_add_nc_u32 v15, 0x7fff, v15 ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v27, v27 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v18 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v26 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v14 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v18 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v21, v26 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v14 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v14, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s27, 16 -; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v15, v15, v20 :: v_dual_add_nc_u32 v18, v21, v26 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v20, vcc_lo ; GFX11-FAKE16-NEXT: v_add_f32_e64 v21, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s26, 16 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 16, v15 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v22, 0x400000, v26 ; GFX11-FAKE16-NEXT: v_add_f32_e64 v25, 0x40c00000, s0 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v15 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 0x7fff, v18 ; GFX11-FAKE16-NEXT: v_bfe_u32 v27, v21, 16, 1 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v26, v26 +; GFX11-FAKE16-NEXT: v_bfe_u32 v29, v25, 16, 1 ; GFX11-FAKE16-NEXT: s_and_b32 s0, s26, 0xffff0000 ; GFX11-FAKE16-NEXT: v_bfe_u32 v18, v14, 16, 1 +; GFX11-FAKE16-NEXT: v_add_f32_e64 v28, 0x40c00000, s0 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v15, v22, vcc_lo -; GFX11-FAKE16-NEXT: v_bfe_u32 v29, v25, 16, 1 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, v27, v21 -; GFX11-FAKE16-NEXT: v_add_f32_e64 v28, 0x40c00000, s0 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, 0x400000, v21 -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, v29, v25 -; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v22 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, 0x400000, v21 +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v21, v21 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, v18, v14 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v22 ; GFX11-FAKE16-NEXT: v_bfe_u32 v26, v28, 16, 1 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, 0x400000, v25 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v27, 0x7fff, v27 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v22, v32, vcc_lo -; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, 0x400000, v25 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v18, 0x7fff, v18 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, v22, v30, vcc_lo +; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v25, v25 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, 0x400000, v14 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v26, v26, v28 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v69, 16, v7 -; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v27, v33, vcc_lo +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 16, v15 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 16, v21 +; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v25, v27, v31, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v80 ; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v22, 0x7fff, v26 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, 0x400000, v28 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 16, v21 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 16, v25 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v18, v29, vcc_lo ; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v28, v28 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v65 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v25 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v15 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v14 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v81, 16, v7 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff, v82 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v162 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 16, v14 ; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v18, v22, v26, vcc_lo -; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v151 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v160 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v146 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v148 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 16, v18 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v161 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v177, v165, 16, v14 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, v97, 16, v11 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v181, v163, 16, v20 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v176, v166, 16, v15 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v180, v164, 16, v18 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v182, v162, 16, v21 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v55, 16, v3 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v81, 16, v7 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v40, v150, 16, v13 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v66, 16, v5 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[45:46] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[176:177] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[43:44] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[180:181] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[37:38] +; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v167 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v176 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v163 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v84, 16, v7 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 16, v18 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xffff, v179 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v183, v165, 16, v20 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v181, v177, 16, v14 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v40, v164, 16, v21 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v180, v178, 16, v15 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v182, v166, 16, v18 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v71, 16, v5 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v46, v161, 16, v13 ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[11:12] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[27:28], 24, v[182:183] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[30:31] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[44:45] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[9:10] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[40:41] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[25:26], 24, v[180:181] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[28:29], 24, v[182:183] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[31:32], 24, v[40:41] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[58:59] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[23:24] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8] -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v167, 24, v177 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 8, v177 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v179, 24, v181 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v177, 8, v181 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v178, 8, v180 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 24, v183 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 8, v183 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 24, v41 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 8, v41 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v43 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v38 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 8, v38 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 24, v4 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 8, v4 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 8, v3 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[46:47] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[50:51] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[34:35] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[16:17] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[21:22], 24, v[5:6] -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 24, v46 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 8, v46 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v45 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 24, v44 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 8, v44 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 24, v2 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 8, v2 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 8, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2] -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v176, 8, v176 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v182 +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[26:27], 24, v[3:4] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[29:30], 24, v[1:2] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 24, v181 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 8, v181 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v180 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v181, 24, v183 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 8, v183 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v180, 8, v182 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v183, 24, v41 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v182, 8, v41 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v40, 8, v40 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v37 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 24, v31 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v31 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 8, v30 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 24, v24 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v43, 24, v47 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v41, 8, v47 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v42, 8, v46 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v47, 24, v45 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v46, 8, v45 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v45, 8, v44 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v57, 24, v59 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v56, 8, v59 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v58, 8, v58 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v61, 24, v51 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v60, 8, v51 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v59, 8, v50 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v62, 24, v35 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v63, 8, v35 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v72, 8, v34 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 24, v24 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 8, v24 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 8, v23 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 24, v17 @@ -164991,15 +165077,21 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 24, v12 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 24, v10 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 24, v10 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 8, v10 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 8, v9 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 24, v8 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 24, v8 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 8, v8 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 24, v6 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 24, v6 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 24, v4 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 8, v4 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 8, v3 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v44, 24, v2 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 8, v2 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v1 ; GFX11-FAKE16-NEXT: s_branch .LBB91_5 ; GFX11-FAKE16-NEXT: .LBB91_3: ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43 @@ -165021,55 +165113,55 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr58 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr60 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr62 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81 ; GFX11-FAKE16-NEXT: ; implicit-def: $vcc_hi ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100 +; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr72 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76 -; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43 ; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43 ; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr43 @@ -165140,357 +165232,342 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a ; GFX11-FAKE16-NEXT: ; kill: killed $sgpr43 ; GFX11-FAKE16-NEXT: s_branch .LBB91_2 ; GFX11-FAKE16-NEXT: .LBB91_4: -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_mov_b32 v103, s1 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 0 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v160, s26 :: v_dual_mov_b32 v151, s27 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v161, s24 :: v_dual_mov_b32 v146, s25 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v166, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 1 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v148, s22 :: v_dual_mov_b32 v135, s23 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v144, s20 :: v_dual_mov_b32 v131, s21 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v165, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 2 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v119, s19 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v128, s16 :: v_dual_mov_b32 v115, s2 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v164, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 3 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v116, s17 :: v_dual_mov_b32 v113, s3 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s4 :: v_dual_mov_b32 v96, s5 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v163, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 4 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s6 :: v_dual_mov_b32 v84, s7 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s8 :: v_dual_mov_b32 v70, s9 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v162, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 5 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s10 :: v_dual_mov_b32 v68, s11 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v102, s104 :: v_dual_mov_b32 v101, s100 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v149, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 6 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v100, s103 :: v_dual_mov_b32 v97, s102 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v98, s99 :: v_dual_mov_b32 v85, s101 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v150, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 7 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v86, s98 :: v_dual_mov_b32 v81, s96 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v82, s97 :: v_dual_mov_b32 v67, s13 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v145, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 8 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s12 :: v_dual_mov_b32 v69, s87 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s14 :: v_dual_mov_b32 v66, s86 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v147, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 9 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s15 :: v_dual_mov_b32 v53, s40 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v64, s85 :: v_dual_mov_b32 v55, s84 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v133, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 10 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, s41 :: v_dual_mov_b32 v52, s83 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v49, s28 :: v_dual_mov_b32 v50, s82 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v134, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 11 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s29 :: v_dual_mov_b32 v48, s81 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s80 :: v_dual_mov_b32 v23, s65 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v130, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 12 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s71 :: v_dual_mov_b32 v17, s67 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s69 :: v_dual_mov_b32 v24, s54 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v129, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 13 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v12, s64 :: v_dual_mov_b32 v9, s66 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s51 :: v_dual_mov_b32 v7, s55 ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v118, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 14 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s53 :: v_dual_mov_b32 v31, s48 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s50 :: v_dual_mov_b32 v5, s52 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 14 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v148, s18 +; GFX11-FAKE16-NEXT: v_readlane_b32 s18, v75, 8 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v134, s19 :: v_dual_mov_b32 v135, s16 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v119, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 15 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v116, s1 :: v_dual_mov_b32 v149, s18 +; GFX11-FAKE16-NEXT: v_readlane_b32 s18, v75, 9 +; GFX11-FAKE16-NEXT: v_readlane_b32 s16, v75, 10 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v117, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 15 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s37 :: v_dual_mov_b32 v6, s39 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v43, s49 :: v_dual_mov_b32 v38, s36 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v114, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 16 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v41, s35 :: v_dual_mov_b32 v44, s38 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v45, vcc_hi :: v_dual_mov_b32 v4, s34 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v176, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 17 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s72 :: v_dual_mov_b32 v26, s62 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s60 :: v_dual_mov_b32 v28, s58 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v167, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 18 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s56 :: v_dual_mov_b32 v33, s46 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s44 :: v_dual_mov_b32 v35, s42 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v36, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 19 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s74 :: v_dual_mov_b32 v14, s76 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s78 :: v_dual_mov_b32 v19, s88 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v178, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 20 -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s90 :: v_dual_mov_b32 v21, s92 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v3, s94 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, s30 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 16 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v176, s26 :: v_dual_mov_b32 v167, s27 +; GFX11-FAKE16-NEXT: v_readlane_b32 s26, v75, 0 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v179, s24 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v39, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 17 +; GFX11-FAKE16-NEXT: v_readlane_b32 s24, v75, 2 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v163, s22 +; GFX11-FAKE16-NEXT: v_readlane_b32 s22, v75, 4 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v160, s20 :: v_dual_mov_b32 v33, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 18 +; GFX11-FAKE16-NEXT: v_readlane_b32 s20, v75, 6 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v144, s18 :: v_dual_mov_b32 v145, s16 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v131, s17 :: v_dual_mov_b32 v130, s2 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v30, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 19 +; GFX11-FAKE16-NEXT: v_readlane_b32 s16, v75, 11 +; GFX11-FAKE16-NEXT: v_readlane_b32 s2, v75, 12 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v178, s26 +; GFX11-FAKE16-NEXT: v_readlane_b32 s26, v75, 1 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v180, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 20 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v166, s24 +; GFX11-FAKE16-NEXT: v_readlane_b32 s24, v75, 3 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v164, s22 +; GFX11-FAKE16-NEXT: v_readlane_b32 s22, v75, 5 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v181, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 21 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v161, s20 +; GFX11-FAKE16-NEXT: v_readlane_b32 s20, v75, 7 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v133, s16 :: v_dual_mov_b32 v132, s2 ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v179, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 21 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v29, s68 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v15, s70 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v177, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 22 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v49, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 22 +; GFX11-FAKE16-NEXT: v_readlane_b32 s2, v75, 13 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v177, s26 :: v_dual_mov_b32 v162, s25 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v165, s24 :: v_dual_mov_b32 v40, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 23 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v150, s23 :: v_dual_mov_b32 v151, s22 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v146, s21 :: v_dual_mov_b32 v147, s20 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v183, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 24 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v128, s3 :: v_dual_mov_b32 v129, s2 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v114, s4 :: v_dual_mov_b32 v115, s104 ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v182, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 23 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v181, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 24 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v180, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 25 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 26 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 25 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s5 :: v_dual_mov_b32 v113, s103 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v102, s6 :: v_dual_mov_b32 v103, s102 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v42, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 27 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v183, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 28 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 26 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s7 :: v_dual_mov_b32 v98, s8 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v101, s101 :: v_dual_mov_b32 v100, s100 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v43, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 27 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v87, s9 :: v_dual_mov_b32 v86, s10 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v97, s99 :: v_dual_mov_b32 v96, s98 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 28 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s11 :: v_dual_mov_b32 v82, s12 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s97 :: v_dual_mov_b32 v84, s96 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v45, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 29 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s13 :: v_dual_mov_b32 v81, s87 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v70, s14 :: v_dual_mov_b32 v71, s86 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v47, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 30 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v67, s15 :: v_dual_mov_b32 v66, s40 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s85 :: v_dual_mov_b32 v68, s84 ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v46, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 29 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v75, 31 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v64, s41 :: v_dual_mov_b32 v65, s83 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v54, s28 :: v_dual_mov_b32 v55, s82 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v58, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 0 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s29 :: v_dual_mov_b32 v53, s81 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v22, s80 :: v_dual_mov_b32 v27, s68 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s54 :: v_dual_mov_b32 v57, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 1 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v15, s70 :: v_dual_mov_b32 v12, s64 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v23, s65 :: v_dual_mov_b32 v34, s51 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v56, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 30 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v47, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 31 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 2 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v17, s67 :: v_dual_mov_b32 v10, s53 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v11, s69 :: v_dual_mov_b32 v8, s50 ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v59, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 0 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v58, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 1 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v57, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 2 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 3 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v16, s71 :: v_dual_mov_b32 v9, s66 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s37 :: v_dual_mov_b32 v7, s55 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s39 :: v_dual_mov_b32 v61, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 4 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v35, s48 :: v_dual_mov_b32 v4, s36 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s52 :: v_dual_mov_b32 v44, vcc_hi ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v60, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 3 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 5 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s49 :: v_dual_mov_b32 v2, s34 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v51, s35 :: v_dual_mov_b32 v28, s62 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v72, s0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 6 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s38 :: v_dual_mov_b32 v32, s58 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v25, s72 :: v_dual_mov_b32 v36, s56 ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v62, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 4 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v61, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 5 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v73, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 6 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v76, 7 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v31, s60 :: v_dual_mov_b32 v38, s44 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v37, s46 :: v_dual_mov_b32 v48, s42 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v63, s0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s0, v77, 7 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v72, s0 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v13, s30 :: v_dual_mov_b32 v14, s94 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v18, s92 :: v_dual_mov_b32 v19, s90 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v20, s88 :: v_dual_mov_b32 v21, s78 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s76 :: v_dual_mov_b32 v29, s74 ; GFX11-FAKE16-NEXT: .LBB91_5: ; %end -; GFX11-FAKE16-NEXT: v_perm_b32 v2, v117, v35, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v35, v112, v73, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v112, v114, v63, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v34, v129, v34, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v103, v103, v72, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-FAKE16-NEXT: v_perm_b32 v114, v118, v62, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v112 -; GFX11-FAKE16-NEXT: v_perm_b32 v115, v115, v60, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v112, v35, v2 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, v134, v33, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v118, v113, v61, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v129, 16, v114 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v113, v103, v117 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v114, v115, v34 -; GFX11-FAKE16-NEXT: v_perm_b32 v33, v128, v59, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v34, v130, v58, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-FAKE16-NEXT: v_perm_b32 v32, v147, v32, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v103, v133, v56, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v115, v118, v129 -; GFX11-FAKE16-NEXT: v_perm_b32 v35, v116, v57, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v34, 16, v34 -; GFX11-FAKE16-NEXT: v_perm_b32 v116, v132, v46, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v32 -; GFX11-FAKE16-NEXT: v_perm_b32 v118, v119, v47, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v103, 16, v103 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, v33, v2 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, v150, v28, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v28, v145, v42, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v35, v34 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v116, v117 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v118, v103 -; GFX11-FAKE16-NEXT: v_perm_b32 v103, v144, v40, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v162, v27, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-FAKE16-NEXT: v_perm_b32 v116, v131, v183, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v66, v21, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v117, v148, v182, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX11-FAKE16-NEXT: v_perm_b32 v48, v119, v48, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v117, v117, v62, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v119, v116, v63, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v116, v129, v61, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v118, v118, v72, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v38, v132, v38, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v117, 16, v117 +; GFX11-FAKE16-NEXT: v_perm_b32 v129, v130, v59, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v128, v128, v60, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v130, 16, v116 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v38, 16, v38 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, v118, v48 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, v119, v117 +; GFX11-FAKE16-NEXT: v_perm_b32 v37, v145, v37, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, v128, v130 +; GFX11-FAKE16-NEXT: v_perm_b32 v48, v133, v57, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v36, v149, v36, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v128, v144, v47, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, v129, v38 +; GFX11-FAKE16-NEXT: v_perm_b32 v38, v135, v58, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37 +; GFX11-FAKE16-NEXT: v_perm_b32 v129, v131, v56, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48 +; GFX11-FAKE16-NEXT: v_perm_b32 v130, v148, v45, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36 +; GFX11-FAKE16-NEXT: v_perm_b32 v131, v134, v46, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v132, 16, v128 +; GFX11-FAKE16-NEXT: v_perm_b32 v28, v166, v28, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v128, v38, v37 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v129, v129, v48 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v130, v130, v36 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v131, v131, v132 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v71, v21, 0xc0c0004 ; GFX11-FAKE16-NEXT: s_clause 0x1 -; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[112:115], off -; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[32:35], off offset:16 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v32, v103, v2 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, v149, v181, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v33, v116, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v26, v164, v26, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v28, v163, v179, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, v65, v5, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v20, v81, v20, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v85, v19, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v34, v117, v27 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v135, v180, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-FAKE16-NEXT: v_perm_b32 v103, v161, v178, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v166, v25, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; GFX11-FAKE16-NEXT: v_perm_b32 v112, v146, v177, 0xc0c0004 +; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[116:119], off +; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[128:131], off offset:16 +; GFX11-FAKE16-NEXT: v_perm_b32 v116, v179, v180, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v178, v25, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, v50, v1, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, v80, v7, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v32, v161, v32, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, v70, v5, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v84, v20, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v96, v19, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v36, v147, v43, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v118, v176, v39, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v116, v116, v28 +; GFX11-FAKE16-NEXT: v_perm_b32 v28, v177, v33, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v68, v26, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v37, v160, v42, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v31, v164, v31, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, v82, v7, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v69, v31, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, v71, v9, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v18, v97, v18, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v81, v35, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, v86, v9, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v100, v18, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v114, 16, v25 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v35, v27, v2 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v103, v26 -; GFX11-FAKE16-NEXT: v_perm_b32 v2, v165, v167, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v112, v28 -; GFX11-FAKE16-NEXT: v_perm_b32 v28, v151, v36, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v36, v48, v45, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v48, v49, v44, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX11-FAKE16-NEXT: v_perm_b32 v38, v146, v41, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v36 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v118, v118, v25 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v167, v30, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX11-FAKE16-NEXT: v_perm_b32 v3, v66, v3, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX11-FAKE16-NEXT: v_perm_b32 v132, v163, v40, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v36, v37, v32 +; GFX11-FAKE16-NEXT: v_perm_b32 v32, v151, v183, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v7, v20 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, v67, v8, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, v80, v8, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v82, v30, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v83, v11, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v85, v34, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, v98, v11, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v19 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v86, v24, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-FAKE16-NEXT: v_perm_b32 v3, v55, v3, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, v39, v4, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v36 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v48, v1 -; GFX11-FAKE16-NEXT: v_perm_b32 v48, v52, v41, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v37, v64, v37, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v68, v10, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v97, v24, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v37, v38, v48 +; GFX11-FAKE16-NEXT: v_perm_b32 v48, v165, v181, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v29, v55, v29, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v30, v53, v44, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v119, v25, v28 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v65, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v3, v26 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v69, v50, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v38, v132, v31 +; GFX11-FAKE16-NEXT: v_perm_b32 v31, v150, v182, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, v83, v10, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v8, v20 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v11, v18 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v100, v14, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v14, v103, v14, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v19 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v98, v23, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, v102, v13, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v20, v101, v29, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v113, v160, v176, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v39, v53, v43, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v28, v2 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v36 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, v51, v38, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v36, 16, v48 -; GFX11-FAKE16-NEXT: v_perm_b32 v6, v54, v6, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v37, 16, v37 -; GFX11-FAKE16-NEXT: v_perm_b32 v12, v70, v12, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v101, v23, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v115, v13, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v113, v27, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v49, v162, v49, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v48, 16, v48 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, v54, v1, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; GFX11-FAKE16-NEXT: v_perm_b32 v2, v52, v2, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, v64, v4, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX11-FAKE16-NEXT: v_perm_b32 v6, v67, v6, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, v87, v12, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v39, v31, v32 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v16, v87, v16, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v102, v16, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v84, v17, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v17, v99, v17, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v99, v22, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v114, v22, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v22, 16, v13 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v96, v15, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v112, v15, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v113, v114 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v39, v3 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v36 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v37 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v117, v49, v48 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v29 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v2, v30 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v4, v25 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v26 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v12, v18 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v16, v14 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v17, v19 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v21, v22 ; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v23, v20 ; GFX11-FAKE16-NEXT: s_clause 0x5 -; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[32:35], off offset:32 -; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[25:28], off offset:48 +; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[36:39], off offset:32 +; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[116:119], off offset:48 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:64 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:80 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[9:12], off offset:96 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:112 -; GFX11-FAKE16-NEXT: s_clause 0x11 ; 72-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 -; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:4 -; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:8 -; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:12 -; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:16 -; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:20 -; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:24 -; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:28 -; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:32 -; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:36 -; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:40 -; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:44 -; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:48 -; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:52 -; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:56 -; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:60 -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:64 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:68 -; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v75, 7 -; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v75, 8 -; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v75, 6 -; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v75, 5 -; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v75, 4 -; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v75, 3 -; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v75, 2 -; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v75, 1 -; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v75, 0 -; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v74, 31 -; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v74, 30 -; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v74, 29 -; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v74, 28 -; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v74, 27 -; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v74, 26 -; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v74, 25 -; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v74, 24 -; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v74, 23 -; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v74, 22 -; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v74, 21 -; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v74, 20 -; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v74, 19 -; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v74, 18 -; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v74, 17 -; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v74, 16 -; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v74, 15 -; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v74, 14 -; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v74, 13 -; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v74, 12 -; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v74, 11 -; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v74, 10 -; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v74, 9 -; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v74, 8 -; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v74, 7 -; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v74, 6 -; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v74, 5 -; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v74, 4 -; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v74, 3 -; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v74, 2 -; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v74, 1 -; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v74, 0 +; GFX11-FAKE16-NEXT: s_clause 0x10 ; 68-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 +; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:4 +; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:8 +; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:64 +; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v74, 7 +; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v74, 8 +; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v74, 6 +; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v74, 5 +; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v74, 4 +; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v74, 3 +; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v74, 2 +; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v74, 1 +; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v74, 0 +; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v73, 31 +; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v73, 30 +; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v73, 29 +; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v73, 28 +; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v73, 27 +; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v73, 26 +; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v73, 25 +; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v73, 24 +; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v73, 23 +; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v73, 22 +; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v73, 21 +; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v73, 20 +; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v73, 19 +; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v73, 18 +; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v73, 17 +; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v73, 16 +; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v73, 15 +; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v73, 14 +; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v73, 13 +; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v73, 12 +; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v73, 11 +; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v73, 10 +; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v73, 9 +; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v73, 8 +; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v73, 7 +; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v73, 6 +; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v73, 5 +; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v73, 4 +; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v73, 3 +; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v73, 2 +; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v73, 1 +; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v73, 0 ; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1 ; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:68 ; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:72 ; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:76 ; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:80 -; GFX11-FAKE16-NEXT: scratch_load_b32 v77, off, s32 offset:84 ; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] @@ -167577,1254 +167654,1294 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 -; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:116 -; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:112 -; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:108 -; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:104 -; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:100 -; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:96 -; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:92 -; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:88 -; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:84 -; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:80 -; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:76 -; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:72 -; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:68 -; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:64 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:60 -; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:56 -; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:48 -; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:44 -; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:40 -; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:36 -; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:32 -; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:28 -; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:24 -; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:20 -; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:16 -; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:12 -; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:300 ; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:384 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:288 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:280 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:272 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:296 +; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:292 +; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:288 +; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:284 +; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:280 +; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:276 +; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:272 +; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:268 +; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:264 +; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:260 +; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:256 +; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:252 ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:384 +; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:380 +; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:376 +; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:372 +; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:368 +; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:364 +; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:360 +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:356 +; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:352 +; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:348 +; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:344 +; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:340 +; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:336 +; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:332 +; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:328 +; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:324 +; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:320 +; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:316 +; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:308 +; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:304 +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:380 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:376 -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:372 -; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:368 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:364 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:360 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:356 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:352 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:348 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:344 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:340 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:332 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:156 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:324 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:148 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:316 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:140 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:308 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:136 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:304 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:132 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:128 -; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:124 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:124 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:120 -; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:108 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:104 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:100 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:96 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:92 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:88 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:84 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:80 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:76 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:72 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:68 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:64 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:60 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:56 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:52 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:48 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:44 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:40 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:36 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:32 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:28 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:20 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:16 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:12 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB92_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b32 s6, 0xc0c0004 -; VI-NEXT: v_perm_b32 v10, v37, v36, s6 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_perm_b32 v11, v59, v34, s6 -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; VI-NEXT: v_perm_b32 v12, v57, v32, s6 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_perm_b32 v13, v47, v46, s6 -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_perm_b32 v14, v43, v42, s6 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; VI-NEXT: v_perm_b32 v15, v55, v54, s6 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: v_perm_b32 v16, v51, v50, s6 -; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr36 -; VI-NEXT: ; implicit-def: $vgpr59 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; implicit-def: $vgpr47 -; VI-NEXT: ; implicit-def: $vgpr46 -; VI-NEXT: ; implicit-def: $vgpr43 -; VI-NEXT: ; implicit-def: $vgpr42 -; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v25, v54, v51, s6 +; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; VI-NEXT: v_perm_b32 v26, v45, v44, s6 +; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; VI-NEXT: v_perm_b32 v28, v49, v38, s6 +; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; VI-NEXT: v_perm_b32 v29, v42, v40, s6 +; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; VI-NEXT: v_perm_b32 v30, v56, v46, s6 +; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; VI-NEXT: v_perm_b32 v31, v60, v58, s6 +; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr54 ; VI-NEXT: ; implicit-def: $vgpr51 -; VI-NEXT: ; implicit-def: $vgpr50 -; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: ; implicit-def: $vgpr45 +; VI-NEXT: ; implicit-def: $vgpr44 +; VI-NEXT: ; kill: killed $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr56 +; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr60 +; VI-NEXT: ; implicit-def: $vgpr58 +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v0, v1, v0, s6 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_perm_b32 v27, v32, v27, s6 +; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; VI-NEXT: v_perm_b32 v32, v63, v62, s6 +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; VI-NEXT: ; implicit-def: $vgpr63 +; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s6 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s6 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v2, v1, s6 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s6 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v3, v4, v3, s6 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v4, v5, v4, s6 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; VI-NEXT: v_or_b32_e32 v3, v3, v4 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v4, v5, v4, s6 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v5, v6, v5, s6 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_e32 v4, v4, v5 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v5, v6, v5, s6 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_e32 v5, v5, v6 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v6, v6, v7 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v8, v8, v9, s6 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; VI-NEXT: v_perm_b32 v9, v39, v62, s6 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_perm_b32 v8, v38, v61, s6 +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v8, v9, v8, s6 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v9, v10, v9, s6 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 -; VI-NEXT: v_perm_b32 v9, v35, v60, s6 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v9, v10, v9, s6 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v10, v11, v10, s6 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 -; VI-NEXT: v_perm_b32 v10, v33, v58, s6 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v10, v11, v10, s6 +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v12, v11, s6 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; VI-NEXT: v_or_b32_e32 v10, v10, v11 -; VI-NEXT: v_perm_b32 v11, v63, v56, s6 +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v12, v11, s6 +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v12, v13, v12, s6 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 -; VI-NEXT: v_perm_b32 v12, v45, v44, s6 +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v12, v13, v12, s6 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v13, v14, v13, s6 +; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; VI-NEXT: v_or_b32_e32 v12, v12, v13 -; VI-NEXT: v_perm_b32 v13, v41, v40, s6 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v13, v14, v13, s6 +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v14, v15, v14, s6 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: v_perm_b32 v14, v53, v52, s6 +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v14, v15, v14, s6 +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v15, v16, v15, s6 +; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_or_b32_e32 v14, v14, v15 -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; VI-NEXT: ; implicit-def: $vgpr38 -; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; implicit-def: $vgpr35 -; VI-NEXT: ; implicit-def: $vgpr60 -; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; implicit-def: $vgpr63 -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: ; implicit-def: $vgpr45 -; VI-NEXT: ; implicit-def: $vgpr44 -; VI-NEXT: ; implicit-def: $vgpr41 -; VI-NEXT: ; implicit-def: $vgpr40 -; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v15, v16, v15, s6 +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v49, v15, s6 +; VI-NEXT: v_perm_b32 v16, v17, v16, s6 +; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; VI-NEXT: v_or_b32_e32 v15, v15, v16 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v16, v17, v16, s6 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v17, v18, v17, s6 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; VI-NEXT: v_or_b32_e32 v16, v16, v17 +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v18, v19, v18, s6 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v17, v18, v17, s6 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v20, v19, s6 -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; VI-NEXT: v_or_b32_e32 v17, v18, v19 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v18, v19, v18, s6 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; VI-NEXT: v_or_b32_e32 v17, v17, v18 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v19, v18, s6 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v19, v20, v19, s6 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; VI-NEXT: v_or_b32_e32 v18, v18, v19 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v19, v20, v19, s6 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v20, v21, v20, s6 ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; VI-NEXT: v_or_b32_e32 v19, v19, v20 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v20, v20, v21, s6 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v20, v21, v20, s6 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v21, v22, v21, s6 ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; VI-NEXT: v_or_b32_e32 v20, v20, v21 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v21, v21, v22, s6 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v21, v22, v21, s6 +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v22, v23, v22, s6 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; VI-NEXT: v_or_b32_e32 v21, v21, v22 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v22, v23, v22, s6 -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v23, v23, v24, s6 +; VI-NEXT: v_perm_b32 v23, v24, v23, s6 ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; VI-NEXT: v_or_b32_e32 v22, v22, v23 -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v23, v24, v23, s6 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v24, v25, v24, s6 +; VI-NEXT: v_perm_b32 v24, v36, v34, s6 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v24, v25, v24, s6 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v25, v25, v26, s6 -; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; VI-NEXT: v_perm_b32 v24, v37, v35, s6 ; VI-NEXT: v_or_b32_e32 v24, v24, v25 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v25, v26, v25, s6 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s6 -; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; VI-NEXT: v_perm_b32 v25, v55, v52, s6 ; VI-NEXT: v_or_b32_e32 v25, v25, v26 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s6 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v28, v27, s6 -; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; VI-NEXT: v_perm_b32 v26, v53, v48, s6 ; VI-NEXT: v_or_b32_e32 v26, v26, v27 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v27, v28, s6 -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr35 +; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr53 +; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v29, v28, s6 -; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; VI-NEXT: v_perm_b32 v27, v33, v27, s6 ; VI-NEXT: v_or_b32_e32 v27, v27, v28 -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v29, v28, s6 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v30, v29, s6 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; VI-NEXT: v_perm_b32 v28, v50, v39, s6 ; VI-NEXT: v_or_b32_e32 v28, v28, v29 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v29, v30, s6 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v30, v31, v30, s6 -; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; VI-NEXT: v_perm_b32 v29, v43, v41, s6 ; VI-NEXT: v_or_b32_e32 v29, v29, v30 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v30, v31, v30, s6 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v31, v32, v31, s6 -; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; VI-NEXT: v_perm_b32 v30, v57, v47, s6 ; VI-NEXT: v_or_b32_e32 v30, v30, v31 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_perm_b32 v31, v31, v48, s6 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v32, v33, v32, s6 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: v_perm_b32 v31, v61, v59, s6 ; VI-NEXT: v_or_b32_e32 v31, v31, v32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; kill: killed $vgpr33 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: ; implicit-def: $vgpr50 +; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr43 +; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr47 +; VI-NEXT: ; implicit-def: $vgpr61 +; VI-NEXT: ; implicit-def: $vgpr59 ; VI-NEXT: .LBB92_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB92_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v18, 0x300 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v61 -; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v60 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58 -; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v56 -; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v44 -; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v40 -; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v52 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_add_u16_e32 v0, 3, v0 -; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v0, 3, v63 +; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v62 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 -; VI-NEXT: s_waitcnt vmcnt(12) -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; VI-NEXT: s_waitcnt vmcnt(11) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 +; VI-NEXT: v_add_u16_e32 v1, 3, v61 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v59 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v1, 3, v60 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v58 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v2, 3, v57 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v47 +; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v2, 3, v56 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v46 +; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v3, 3, v43 +; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v41 +; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v3, 3, v42 +; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v40 +; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v4, 3, v50 +; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v39 +; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v4, 3, v49 +; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v38 +; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v5, 3, v33 +; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v48 +; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v52 +; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v35 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(10) -; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; VI-NEXT: s_waitcnt vmcnt(9) ; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 -; VI-NEXT: s_waitcnt vmcnt(8) -; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v5, 3, v32 ; VI-NEXT: s_waitcnt vmcnt(7) -; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v10 ; VI-NEXT: s_waitcnt vmcnt(6) -; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 +; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v11 ; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v12 ; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_lshlrev_b16_e32 v20, 8, v20 +; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v13 ; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v9 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v1, 3, v1 -; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v2, 3, v2 -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v4, v0, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v0, v2, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 0x300, v3 -; VI-NEXT: v_or_b32_e32 v0, v2, v0 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_e32 v1, v1, v4 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_add_u16_e32 v2, 3, v2 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; VI-NEXT: v_add_u16_sdwa v2, v2, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v3, 0x300, v3 -; VI-NEXT: v_or_b32_e32 v2, v3, v2 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v3, v3, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v4, 3, v4 -; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v4, 0x300, v4 -; VI-NEXT: v_or_b32_e32 v3, v4, v3 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v4, 3, v4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v4, v4, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v5, 3, v5 -; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v5, 0x300, v5 -; VI-NEXT: v_or_b32_e32 v4, v5, v4 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v5, 3, v5 -; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 ; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v5, v5, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v6, 3, v6 +; VI-NEXT: v_add_u16_e32 v6, 3, v53 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v6, 0x300, v6 -; VI-NEXT: v_or_b32_e32 v5, v6, v5 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v6, 3, v6 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v6, 3, v45 +; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v44 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v6, v6, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v7, 3, v7 +; VI-NEXT: v_add_u16_e32 v7, 3, v55 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v7, 0x300, v7 -; VI-NEXT: v_or_b32_e32 v6, v7, v6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v7, 3, v7 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v7, 3, v54 +; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v51 ; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v7, v7, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v8, 3, v8 +; VI-NEXT: v_add_u16_e32 v8, 3, v37 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v8, 0x300, v8 -; VI-NEXT: v_or_b32_e32 v7, v8, v7 -; VI-NEXT: v_add_u16_e32 v8, 3, v39 -; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v62 +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v8, 3, v36 +; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v34 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v9, 3, v38 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v9, 3, v9 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v8, v8, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v9, 0x300, v9 -; VI-NEXT: v_or_b32_e32 v8, v9, v8 -; VI-NEXT: v_add_u16_e32 v9, 3, v37 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v36 +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v9, 3, v9 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v10 ; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v10, 3, v35 -; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v9, v9, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v10, 0x300, v10 -; VI-NEXT: v_or_b32_e32 v9, v10, v9 -; VI-NEXT: v_add_u16_e32 v10, 3, v59 -; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v34 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v10, 3, v10 ; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v11, 3, v33 -; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v10, v10, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v11, 0x300, v11 -; VI-NEXT: v_or_b32_e32 v10, v11, v10 -; VI-NEXT: v_add_u16_e32 v11, 3, v57 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v32 -; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v12, 3, v63 -; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v11, v11, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v12, 0x300, v12 -; VI-NEXT: v_or_b32_e32 v11, v12, v11 -; VI-NEXT: v_add_u16_e32 v12, 3, v47 -; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v46 -; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v13, 3, v45 -; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v12, v12, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v13, 0x300, v13 -; VI-NEXT: v_or_b32_e32 v12, v13, v12 -; VI-NEXT: v_add_u16_e32 v13, 3, v43 -; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v42 -; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v14, 3, v41 -; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v13, v13, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v14, 0x300, v14 -; VI-NEXT: v_or_b32_e32 v13, v14, v13 -; VI-NEXT: v_add_u16_e32 v14, 3, v55 -; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v54 -; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v15, 3, v53 -; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v14, v14, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v15, 0x300, v15 -; VI-NEXT: v_or_b32_e32 v14, v15, v14 -; VI-NEXT: v_add_u16_e32 v15, 3, v51 -; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v50 -; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v16, 3, v49 -; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v15, v15, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v16, 0x300, v16 -; VI-NEXT: v_or_b32_e32 v15, v16, v15 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_add_u16_e32 v16, 3, v16 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 -; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v17, 3, v17 -; VI-NEXT: v_or_b32_sdwa v17, v19, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v17, 0x300, v17 +; VI-NEXT: v_add_u16_e32 v10, 3, v10 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v19, 3, v19 -; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v11 +; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v20, 3, v20 -; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v21, v16, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v16, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v19, 0x300, v20 -; VI-NEXT: v_or_b32_e32 v16, v19, v16 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_e32 v17, v17, v21 -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v48 +; VI-NEXT: v_add_u16_e32 v11, 3, v11 +; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v19, 3, v19 +; VI-NEXT: v_add_u16_e32 v11, 3, v11 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v20, 8, v20 -; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v12 +; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v20, 3, v20 -; VI-NEXT: v_or_b32_sdwa v31, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v31, 0x300, v31 +; VI-NEXT: v_add_u16_e32 v12, 3, v12 +; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v20, 3, v20 +; VI-NEXT: v_add_u16_e32 v12, 3, v12 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 -; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v13 +; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 -; VI-NEXT: v_or_b32_sdwa v30, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v30, 0x300, v30 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 +; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v33, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v33, v33, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v32, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v29, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v29, 0x300, v29 -; VI-NEXT: v_or_b32_e32 v29, v29, v33 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v18, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v18, 0x300, v18 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v35, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v35, v35, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v34, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v28, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v28, 0x300, v28 -; VI-NEXT: v_or_b32_e32 v28, v28, v35 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v17, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v17, 0x300, v17 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v37, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v37, v37, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v36, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v27, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v27, 0x300, v27 -; VI-NEXT: v_or_b32_e32 v27, v27, v37 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v16, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v16, 0x300, v16 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v38, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v38, v38, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v37, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v26, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v26, 0x300, v26 -; VI-NEXT: v_or_b32_e32 v26, v26, v38 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v15, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v15, 0x300, v15 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v39, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v39, v39, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v38, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v25, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v25, 0x300, v25 -; VI-NEXT: v_or_b32_e32 v25, v25, v39 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v14, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v14, 0x300, v14 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v48, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v48, v48, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_e32 v13, 3, v13 +; VI-NEXT: v_or_b32_sdwa v39, v33, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 +; VI-NEXT: v_or_b32_sdwa v13, v33, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v24, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v24, 0x300, v24 -; VI-NEXT: v_or_b32_e32 v24, v24, v48 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v33, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v13, 0x300, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v49, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v49, v49, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v35, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v48, v35, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v23, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v23, 0x300, v23 -; VI-NEXT: v_or_b32_e32 v23, v23, v49 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v33, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v50, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v50, v50, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v35, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v33, v35, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v33, 0x300, v33 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v22, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v22, 0x300, v22 -; VI-NEXT: v_or_b32_e32 v22, v22, v50 +; VI-NEXT: v_add_u16_e32 v35, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 -; VI-NEXT: v_or_b32_sdwa v51, v32, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v51, v51, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v49, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v49, v49, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 -; VI-NEXT: v_or_b32_sdwa v21, v32, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v21, 0x300, v21 -; VI-NEXT: v_or_b32_e32 v21, v21, v51 +; VI-NEXT: v_add_u16_e32 v35, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 -; VI-NEXT: v_or_b32_sdwa v52, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_lshlrev_b16_e32 v50, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v35, v50, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v35, 0x300, v35 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v36, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v36, 0x300, v36 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_add_u16_e32 v50, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v53, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_lshlrev_b16_e32 v51, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v50, v51, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v54, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_add_u16_e32 v51, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v55, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v32, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v34, v20, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v20, v52, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v19, v53, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v18, v55, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v20, v36, v20 -; VI-NEXT: v_or_b32_e32 v30, v30, v34 -; VI-NEXT: v_or_b32_e32 v31, v31, v32 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v52, 3, v52 +; VI-NEXT: v_lshlrev_b16_e32 v52, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v51, v52, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v53, 8, v53 +; VI-NEXT: v_add_u16_e32 v52, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v53, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: v_or_b32_sdwa v52, v53, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v52, 0x300, v52 -; VI-NEXT: v_or_b32_e32 v18, v52, v18 -; VI-NEXT: v_add_u16_e32 v52, 0x300, v54 -; VI-NEXT: v_or_b32_e32 v19, v52, v19 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v53, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v54, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v53, v54, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v54, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v55, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v54, v55, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v55, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v40, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v55, v40, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v40, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v41, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v40, v41, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v41, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v42, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v41, v42, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v42, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v43, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v42, v43, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v43, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v44, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v43, v44, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v44, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v45, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v44, v45, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v45, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v46, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v45, v46, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v46, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v47, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v46, v47, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v47, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v56, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v47, v56, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v56, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v57, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v56, v57, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v57, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v58, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v57, v58, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v58, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v59, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v58, v59, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v59, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v60, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v59, v60, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v60, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v61, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v60, v61, v60 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v61, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v62, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v61, v62, v61 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v62, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v63, 8, v19 +; VI-NEXT: v_or_b32_sdwa v62, v63, v62 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_mov_b32_e32 v63, 0x300 +; VI-NEXT: v_add_u16_sdwa v32, v32, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v19, v12, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v12, v48, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_e32 v18, v18, v32 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_sdwa v20, v11, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v21, v10, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v22, v9, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v23, v8, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v24, v7, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v25, v6, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v26, v5, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v27, v4, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v28, v3, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v29, v2, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v11, v49, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_sdwa v30, v1, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v31, v0, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v0, v62, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v1, v60, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v2, v58, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v3, v56, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v4, v46, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v5, v44, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v6, v42, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v7, v40, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v8, v54, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v9, v52, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v34, v34, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v36, v36, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v37, v37, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v38, v38, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v39, v39, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v10, v50, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v11, v35, v11 +; VI-NEXT: v_or_b32_e32 v12, v33, v12 +; VI-NEXT: v_or_b32_e32 v13, v13, v39 +; VI-NEXT: v_or_b32_e32 v14, v14, v38 +; VI-NEXT: v_or_b32_e32 v15, v15, v37 +; VI-NEXT: v_or_b32_e32 v16, v16, v36 +; VI-NEXT: v_or_b32_e32 v17, v17, v34 +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_add_u16_e32 v48, 3, v48 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v19, v32, v19 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_lshlrev_b16_e32 v49, 8, v49 +; VI-NEXT: v_or_b32_sdwa v48, v49, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v48 +; VI-NEXT: v_or_b32_e32 v0, v48, v0 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v61 +; VI-NEXT: v_or_b32_e32 v1, v48, v1 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v59 +; VI-NEXT: v_or_b32_e32 v2, v48, v2 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v57 +; VI-NEXT: v_or_b32_e32 v3, v48, v3 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v47 +; VI-NEXT: v_or_b32_e32 v4, v48, v4 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v45 +; VI-NEXT: v_or_b32_e32 v5, v48, v5 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v43 +; VI-NEXT: v_or_b32_e32 v6, v48, v6 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v41 +; VI-NEXT: v_or_b32_e32 v7, v48, v7 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v55 +; VI-NEXT: v_or_b32_e32 v8, v48, v8 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v53 +; VI-NEXT: v_or_b32_e32 v9, v48, v9 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v51 +; VI-NEXT: v_or_b32_e32 v10, v48, v10 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v20, v32, v20 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v21, v32, v21 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v22, v32, v22 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v23, v32, v23 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v24, v32, v24 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v25, v32, v25 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v26, v32, v26 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v27, v32, v27 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v28, v32, v28 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v29, v32, v29 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v30, v32, v30 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v31, v32, v31 ; VI-NEXT: .LBB92_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload @@ -168865,39 +168982,38 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, v7 +; GFX9-NEXT: v_mov_b32_e32 v50, v6 +; GFX9-NEXT: v_mov_b32_e32 v53, v5 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v36, v3 +; GFX9-NEXT: v_mov_b32_e32 v37, v2 +; GFX9-NEXT: v_mov_b32_e32 v48, v1 +; GFX9-NEXT: v_mov_b32_e32 v52, v0 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 -; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:16 ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:32 @@ -168917,70 +169033,61 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:304 ; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:320 ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:108 -; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:160 -; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:156 -; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:152 -; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:148 -; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:144 -; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:140 -; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:136 -; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:132 -; GFX9-NEXT: s_waitcnt vmcnt(27) -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; GFX9-NEXT: s_waitcnt vmcnt(26) -; GFX9-NEXT: v_lshlrev_b16_e32 v53, 8, v1 -; GFX9-NEXT: s_waitcnt vmcnt(25) -; GFX9-NEXT: v_lshlrev_b16_e32 v51, 8, v2 -; GFX9-NEXT: s_waitcnt vmcnt(24) -; GFX9-NEXT: v_lshlrev_b16_e32 v49, 8, v3 -; GFX9-NEXT: s_waitcnt vmcnt(23) -; GFX9-NEXT: v_lshlrev_b16_e32 v39, 8, v4 -; GFX9-NEXT: s_waitcnt vmcnt(22) -; GFX9-NEXT: v_lshlrev_b16_e32 v38, 8, v5 +; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:380 +; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:376 ; GFX9-NEXT: s_waitcnt vmcnt(21) -; GFX9-NEXT: v_lshlrev_b16_e32 v34, 8, v6 +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292 -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(3) +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:100 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:92 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v1 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v3 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v5 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v6 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v7 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v8 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v9 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v10 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v11 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v12 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v13 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v14 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v15 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v16 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v18 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 @@ -168988,572 +169095,457 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:324 ; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill ; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v1 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:332 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v2 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:348 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:344 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:360 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:368 ; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:384 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:356 ; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v1 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v59, 8, v0 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 ; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v2 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v56, 8, v1 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:364 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:260 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:380 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v2 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:308 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:340 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:88 -; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:84 -; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:76 -; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:68 -; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:60 -; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:56 -; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:52 -; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:44 -; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:36 -; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:28 -; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:24 -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:20 -; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:12 -; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:4 -; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:124 -; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:120 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:372 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:340 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:88 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:84 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:76 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:68 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:60 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:56 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:52 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:44 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:36 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:28 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:200 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:20 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:12 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:92 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:260 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:124 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:120 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:268 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:372 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:256 +; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:252 +; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:248 +; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:244 +; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:240 +; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:236 +; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:232 +; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:228 +; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:224 +; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:220 +; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:216 +; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:212 +; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:208 +; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:204 +; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:200 +; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:196 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:184 +; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:180 +; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:376 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:156 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:148 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:140 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:136 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:132 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:268 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:284 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:284 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:280 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB92_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v0, v52, v48, s6 +; GFX9-NEXT: v_perm_b32 v1, v37, v36, s6 ; GFX9-NEXT: s_mov_b32 s7, 0x5040100 -; GFX9-NEXT: v_or_b32_sdwa v9, v59, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_perm_b32 v10, v47, v45, s6 -; GFX9-NEXT: v_or_b32_sdwa v11, v40, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_perm_b32 v12, v55, v54, s6 -; GFX9-NEXT: v_perm_b32 v17, v43, v42, s6 -; GFX9-NEXT: v_perm_b32 v18, v58, v57, s6 -; GFX9-NEXT: v_perm_b32 v19, v63, v46, s6 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr45 -; GFX9-NEXT: ; implicit-def: $vgpr40 +; GFX9-NEXT: v_perm_b32 v0, v1, v0, s7 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v50, v39, s6 +; GFX9-NEXT: v_perm_b32 v22, v41, v55, s6 +; GFX9-NEXT: v_perm_b32 v23, v45, v43, s6 +; GFX9-NEXT: v_perm_b32 v24, v58, v47, s6 +; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr41 ; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; implicit-def: $vgpr51 -; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v0, v1, v0, s6 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v1, v53, s6 +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s7 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_or_b32_sdwa v13, v48, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, v1, v0, s7 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: v_perm_b32 v1, v3, v2, s7 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v31, v31, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s7 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v4, v5, v4, s6 ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s7 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v4, v5, v4, s6 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 ; GFX9-NEXT: v_perm_b32 v4, v5, v4, s7 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s7 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s7 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v8, v8, v33, s6 +; GFX9-NEXT: v_perm_b32 v8, v8, v9, s6 ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s7 -; GFX9-NEXT: v_or_b32_sdwa v8, v60, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v8, v9, v8, s7 -; GFX9-NEXT: v_or_b32_sdwa v9, v44, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v11, v10, s6 ; GFX9-NEXT: v_perm_b32 v9, v9, v10, s7 -; GFX9-NEXT: v_or_b32_sdwa v10, v41, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v10, v11, v10, s7 -; GFX9-NEXT: v_or_b32_sdwa v11, v52, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v12, v13, v12, s6 ; GFX9-NEXT: v_perm_b32 v11, v11, v12, s7 -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; implicit-def: $vgpr44 -; GFX9-NEXT: ; implicit-def: $vgpr41 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr53 -; GFX9-NEXT: ; implicit-def: $vgpr49 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v12, v50, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v12, v13, v12, s7 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_perm_b32 v14, v37, v36, s6 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v14, v15, v14, s6 ; GFX9-NEXT: v_perm_b32 v13, v13, v14, s7 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v14, v15, v14, s7 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_or_b32_sdwa v15, v62, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v35, s6 +; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v16, v16, v17, s6 ; GFX9-NEXT: v_perm_b32 v15, v15, v16, s7 -; GFX9-NEXT: v_perm_b32 v16, v32, v56, s6 +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v16, v17, v16, s6 +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s6 ; GFX9-NEXT: v_perm_b32 v16, v17, v16, s7 -; GFX9-NEXT: v_perm_b32 v17, v19, v18, s7 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s6 +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s7 +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v19, v19, v20, s6 -; GFX9-NEXT: v_perm_b32 v18, v19, v18, s7 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s6 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v18, v19, v18, s7 +; GFX9-NEXT: v_perm_b32 v19, v33, v63, s6 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v20, v21, v20, s6 ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s7 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v20, v20, v61, s6 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v21, v22, v21, s6 +; GFX9-NEXT: v_perm_b32 v20, v40, v54, s6 +; GFX9-NEXT: v_perm_b32 v21, v34, v51, s6 ; GFX9-NEXT: v_perm_b32 v20, v21, v20, s7 -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v21, v22, v21, s6 -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v22, v23, v22, s6 +; GFX9-NEXT: v_perm_b32 v21, v44, v42, s6 ; GFX9-NEXT: v_perm_b32 v21, v22, v21, s7 -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v22, v23, v22, s6 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 +; GFX9-NEXT: v_perm_b32 v22, v57, v46, s6 ; GFX9-NEXT: v_perm_b32 v22, v23, v22, s7 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6 +; GFX9-NEXT: v_perm_b32 v23, v61, v60, s6 ; GFX9-NEXT: v_perm_b32 v23, v24, v23, s7 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr40 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr44 +; GFX9-NEXT: ; implicit-def: $vgpr42 +; GFX9-NEXT: ; implicit-def: $vgpr57 +; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr61 +; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v24, v25, v24, s7 -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6 ; GFX9-NEXT: v_perm_b32 v25, v25, v26, s7 -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v26, v27, v26, s7 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6 ; GFX9-NEXT: v_perm_b32 v27, v27, v28, s7 -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v28, v29, v28, s7 -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v30, v31, v30, s6 +; GFX9-NEXT: v_perm_b32 v30, v38, v30, s6 ; GFX9-NEXT: v_perm_b32 v29, v29, v30, s7 -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v30, v30, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v30, v31, v30, s7 -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v32, v33, v32, s6 +; GFX9-NEXT: v_or_b32_sdwa v31, v35, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_perm_b32 v32, v62, v49, s6 ; GFX9-NEXT: v_perm_b32 v31, v31, v32, s7 ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: ; kill: killed $vgpr32 @@ -169622,458 +169614,630 @@ define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr49 +; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: .LBB92_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB92_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v0, 3, v62 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v49 +; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u16_e32 v0, 3, v35 +; GFX9-NEXT: v_or_b32_sdwa v0, v32, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v30, v36 +; GFX9-NEXT: v_lshlrev_b16_e32 v30, 8, v30 ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 -; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v33 -; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v45 -; GFX9-NEXT: v_add_u16_e32 v11, 3, v40 -; GFX9-NEXT: v_or_b32_sdwa v11, v38, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 -; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54 -; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v46 -; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v56 -; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v42 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(21) +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 -; GFX9-NEXT: s_waitcnt vmcnt(20) +; GFX9-NEXT: v_or_b32_sdwa v0, v59, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 +; GFX9-NEXT: v_or_b32_sdwa v0, v56, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u16_e32 v0, 3, v38 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(20) -; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2 -; GFX9-NEXT: s_waitcnt vmcnt(19) -; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: s_waitcnt vmcnt(12) -; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6 -; GFX9-NEXT: s_waitcnt vmcnt(6) -; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_lshlrev_b16_e32 v23, 8, v23 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v27, 8, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v1, 3, v1 -; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 +; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 -; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v0 -; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v2 -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v3 -; GFX9-NEXT: v_perm_b32 v0, v2, v0, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v1, v4, s6 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 +; GFX9-NEXT: v_or_b32_sdwa v35, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v35 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v38, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v3, 0x300, v3 -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v36, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v36, 0x300, v36 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v3, 0x300, v3 +; GFX9-NEXT: v_or_b32_sdwa v29, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v29, 0x300, v29 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v4, 3, v4 -; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v4 -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v28, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v4, 3, v4 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v4 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v27, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v5, 3, v5 -; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 -; GFX9-NEXT: v_perm_b32 v4, v5, v4, s6 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v26, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v5, 3, v5 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6 -; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 +; GFX9-NEXT: v_or_b32_sdwa v18, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 -; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 -; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v19, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v61 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v60 +; GFX9-NEXT: v_or_b32_sdwa v20, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v58 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v47 +; GFX9-NEXT: v_or_b32_sdwa v21, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v57 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v46 +; GFX9-NEXT: v_or_b32_sdwa v22, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v45 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v43 +; GFX9-NEXT: v_or_b32_sdwa v23, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v44 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v42 +; GFX9-NEXT: v_or_b32_sdwa v24, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v41 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v55 +; GFX9-NEXT: v_or_b32_sdwa v25, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v40 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v54 +; GFX9-NEXT: v_or_b32_sdwa v49, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v34 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v51 +; GFX9-NEXT: v_or_b32_sdwa v51, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v33 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v63 +; GFX9-NEXT: v_or_b32_sdwa v54, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v39 +; GFX9-NEXT: v_lshlrev_b16_e32 v34, 8, v48 +; GFX9-NEXT: v_add_u16_e32 v39, 0x300, v26 +; GFX9-NEXT: v_add_u16_e32 v48, 0x300, v18 +; GFX9-NEXT: v_add_u16_e32 v26, 0x300, v24 +; GFX9-NEXT: v_add_u16_e32 v24, 0x300, v25 +; GFX9-NEXT: v_add_u16_e32 v25, 0x300, v51 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 -; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v55, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v7, 3, v7 -; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v7, 0x300, v7 -; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v40, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v7, 3, v7 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 -; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v7, 0x300, v7 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v41, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v51, 0x300, v41 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v8, 3, v8 -; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 -; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 -; GFX9-NEXT: v_add_u16_e32 v8, 3, v60 -; GFX9-NEXT: v_add_u16_e32 v9, 3, v59 -; GFX9-NEXT: v_or_b32_sdwa v8, v53, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_or_b32_sdwa v9, v51, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 -; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 -; GFX9-NEXT: v_perm_b32 v8, v9, v8, s6 -; GFX9-NEXT: v_add_u16_e32 v9, 3, v47 -; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v44 -; GFX9-NEXT: v_or_b32_sdwa v10, v49, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 -; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 -; GFX9-NEXT: v_perm_b32 v9, v10, v9, s6 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v41 -; GFX9-NEXT: v_or_b32_sdwa v10, v39, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 -; GFX9-NEXT: v_perm_b32 v10, v11, v10, s6 -; GFX9-NEXT: v_add_u16_e32 v11, 3, v55 -; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v52 -; GFX9-NEXT: v_or_b32_sdwa v12, v34, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 -; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 -; GFX9-NEXT: v_perm_b32 v11, v12, v11, s6 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v50 -; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v13, 3, v48 -; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 -; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 -; GFX9-NEXT: v_perm_b32 v12, v13, v12, s6 -; GFX9-NEXT: v_add_u16_e32 v13, 3, v37 -; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v36 -; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v42, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v14, 3, v14 -; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14 -; GFX9-NEXT: v_perm_b32 v13, v14, v13, s6 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v43, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v14, 3, v14 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v44, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v15, 3, v15 -; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v15, 0x300, v15 -; GFX9-NEXT: v_perm_b32 v14, v15, v14, s6 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v35 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v45, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v15, 3, v15 -; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v16, 3, v62 -; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v15, 0x300, v15 -; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16 -; GFX9-NEXT: v_perm_b32 v15, v16, v15, s6 -; GFX9-NEXT: v_add_u16_e32 v16, 3, v58 -; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v57 -; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v17, 3, v63 -; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v18, 3, v32 -; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v19, 3, v43 -; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v20, 0x300, v16 -; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v18 -; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v19 -; GFX9-NEXT: v_perm_b32 v16, v18, v16, s6 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v17, 0x300, v17 -; GFX9-NEXT: v_perm_b32 v17, v17, v20, s6 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v18, 3, v18 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v46, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v46 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v19 -; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v18 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v19, 3, v19 -; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v32, 0x300, v19 -; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6 +; GFX9-NEXT: v_or_b32_sdwa v56, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v20, 3, v20 -; GFX9-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v20 +; GFX9-NEXT: v_or_b32_sdwa v58, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v21, 3, v21 -; GFX9-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v33, 0x300, v21 -; GFX9-NEXT: v_perm_b32 v30, v33, v30, s6 +; GFX9-NEXT: v_or_b32_sdwa v59, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v41, 0x300, v59 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v22, 3, v22 -; GFX9-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v29, 0x300, v22 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v60, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v46, 0x300, v60 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v23, 3, v23 -; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v34, 0x300, v23 -; GFX9-NEXT: v_perm_b32 v29, v34, v29, s6 +; GFX9-NEXT: v_or_b32_sdwa v61, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v24, 3, v24 -; GFX9-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v62, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v25, 3, v25 -; GFX9-NEXT: v_or_b32_sdwa v25, v26, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v25 +; GFX9-NEXT: v_or_b32_sdwa v63, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v26, 3, v26 -; GFX9-NEXT: v_or_b32_sdwa v26, v27, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v16, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 -; GFX9-NEXT: v_or_b32_sdwa v36, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v36, 0x300, v36 +; GFX9-NEXT: v_or_b32_sdwa v17, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v37, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v15, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v15, 0x300, v15 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v38, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v14, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v39, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v25, 0x300, v39 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v13, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v48, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v12, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v49, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v11, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v50, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v39, 0x300, v50 +; GFX9-NEXT: v_or_b32_sdwa v10, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v51, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v23, 0x300, v51 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v9, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v52, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v8, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v53, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v22, 0x300, v53 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v7, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v7, 0x300, v7 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v54, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v6, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 +; GFX9-NEXT: v_perm_b32 v6, v6, v7, s6 +; GFX9-NEXT: v_perm_b32 v7, v8, v9, s6 +; GFX9-NEXT: v_perm_b32 v8, v10, v11, s6 +; GFX9-NEXT: v_perm_b32 v10, v14, v15, s6 +; GFX9-NEXT: v_perm_b32 v9, v12, v13, s6 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v55, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v21, 0x300, v55 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v5, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v40, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v61 -; GFX9-NEXT: v_add_u16_e32 v50, 0x300, v40 -; GFX9-NEXT: v_perm_b32 v21, v50, v21, s6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v4, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 -; GFX9-NEXT: v_or_b32_sdwa v41, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v20, 0x300, v41 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v47, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v42, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v51, 0x300, v42 -; GFX9-NEXT: v_perm_b32 v20, v51, v20, s6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v57, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v43, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v19, 0x300, v43 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v3, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v3, 0x300, v3 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v44, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v31, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v45, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v45 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v2, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v46, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v28, 0x300, v24 -; GFX9-NEXT: v_add_u16_e32 v27, 0x300, v26 -; GFX9-NEXT: v_add_u16_e32 v26, 0x300, v37 -; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v38 -; GFX9-NEXT: v_add_u16_e32 v38, 0x300, v48 -; GFX9-NEXT: v_add_u16_e32 v24, 0x300, v49 -; GFX9-NEXT: v_add_u16_e32 v48, 0x300, v52 -; GFX9-NEXT: v_add_u16_e32 v49, 0x300, v54 -; GFX9-NEXT: v_add_u16_e32 v52, 0x300, v44 -; GFX9-NEXT: v_add_u16_e32 v53, 0x300, v46 -; GFX9-NEXT: v_perm_b32 v18, v53, v18, s6 -; GFX9-NEXT: v_perm_b32 v19, v52, v19, s6 -; GFX9-NEXT: v_perm_b32 v22, v49, v22, s6 -; GFX9-NEXT: v_perm_b32 v23, v48, v23, s6 -; GFX9-NEXT: v_perm_b32 v24, v39, v24, s6 -; GFX9-NEXT: v_perm_b32 v25, v38, v25, s6 -; GFX9-NEXT: v_perm_b32 v26, v37, v26, s6 -; GFX9-NEXT: v_perm_b32 v27, v36, v27, s6 -; GFX9-NEXT: v_perm_b32 v28, v35, v28, s6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v32, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v53 +; GFX9-NEXT: v_add_u16_e32 v53, 0x300, v21 +; GFX9-NEXT: v_add_u16_e32 v21, 0x300, v40 +; GFX9-NEXT: v_add_u16_e32 v40, 0x300, v56 +; GFX9-NEXT: v_perm_b32 v15, v40, v18, s6 +; GFX9-NEXT: v_perm_b32 v18, v51, v21, s6 +; GFX9-NEXT: v_perm_b32 v21, v24, v26, s6 +; GFX9-NEXT: v_add_u16_e32 v56, 0x300, v62 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 +; GFX9-NEXT: v_or_b32_sdwa v1, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v50 +; GFX9-NEXT: v_or_b32_sdwa v33, v33, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v52 +; GFX9-NEXT: v_or_b32_sdwa v0, v34, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v34, 3, v37 +; GFX9-NEXT: v_or_b32_sdwa v30, v30, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: v_perm_b32 v0, v30, v0, s6 +; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v33 +; GFX9-NEXT: v_perm_b32 v1, v30, v1, s6 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v32 +; GFX9-NEXT: v_perm_b32 v2, v30, v2, s6 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v31 +; GFX9-NEXT: v_perm_b32 v3, v30, v3, s6 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v28 +; GFX9-NEXT: v_add_u16_e32 v50, 0x300, v19 +; GFX9-NEXT: v_add_u16_e32 v28, 0x300, v22 +; GFX9-NEXT: v_add_u16_e32 v22, 0x300, v54 +; GFX9-NEXT: v_add_u16_e32 v19, 0x300, v44 +; GFX9-NEXT: v_add_u16_e32 v44, 0x300, v17 +; GFX9-NEXT: v_perm_b32 v11, v44, v16, s6 +; GFX9-NEXT: v_perm_b32 v26, v37, v29, s6 +; GFX9-NEXT: v_add_u16_e32 v52, 0x300, v20 +; GFX9-NEXT: v_add_u16_e32 v20, 0x300, v42 +; GFX9-NEXT: v_add_u16_e32 v54, 0x300, v43 +; GFX9-NEXT: v_add_u16_e32 v42, 0x300, v61 +; GFX9-NEXT: v_add_u16_e32 v43, 0x300, v63 +; GFX9-NEXT: v_add_u16_e32 v17, 0x300, v4 +; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v47 +; GFX9-NEXT: v_add_u16_e32 v47, 0x300, v57 +; GFX9-NEXT: v_perm_b32 v4, v47, v4, s6 +; GFX9-NEXT: v_perm_b32 v5, v17, v5, s6 +; GFX9-NEXT: v_perm_b32 v12, v43, v56, s6 +; GFX9-NEXT: v_perm_b32 v13, v42, v46, s6 +; GFX9-NEXT: v_perm_b32 v17, v54, v20, s6 +; GFX9-NEXT: v_perm_b32 v24, v50, v48, s6 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v33, 0x300, v30 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v32, 0x300, v30 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v34, 0x300, v30 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v29, v34, v32, s6 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v30 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v38 +; GFX9-NEXT: v_add_u16_e32 v38, 0x300, v27 +; GFX9-NEXT: v_add_u16_e32 v27, 0x300, v23 +; GFX9-NEXT: v_add_u16_e32 v23, 0x300, v49 +; GFX9-NEXT: v_add_u16_e32 v49, 0x300, v55 +; GFX9-NEXT: v_add_u16_e32 v55, 0x300, v45 +; GFX9-NEXT: v_perm_b32 v16, v55, v19, s6 +; GFX9-NEXT: v_perm_b32 v19, v49, v22, s6 +; GFX9-NEXT: v_perm_b32 v22, v27, v28, s6 +; GFX9-NEXT: v_perm_b32 v27, v36, v30, s6 +; GFX9-NEXT: v_perm_b32 v28, v35, v31, s6 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v45, 0x300, v58 +; GFX9-NEXT: v_perm_b32 v14, v41, v45, s6 +; GFX9-NEXT: v_perm_b32 v20, v25, v23, s6 +; GFX9-NEXT: v_perm_b32 v23, v53, v52, s6 +; GFX9-NEXT: v_perm_b32 v25, v39, v38, s6 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v30, v33, v30, s6 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6 ; GFX9-NEXT: .LBB92_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload @@ -171831,6 +171995,7 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill @@ -171873,839 +172038,779 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; SI-NEXT: v_writelane_b32 v45, s99, 33 ; SI-NEXT: v_writelane_b32 v45, s30, 34 ; SI-NEXT: v_writelane_b32 v45, s31, 35 -; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane +; SI-NEXT: ; implicit-def: $vgpr56 : SGPR spill to VGPR lane ; SI-NEXT: v_readfirstlane_b32 s4, v30 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_writelane_b32 v47, s29, 0 -; SI-NEXT: v_writelane_b32 v47, s28, 1 -; SI-NEXT: v_writelane_b32 v47, s27, 2 -; SI-NEXT: v_writelane_b32 v47, s26, 3 -; SI-NEXT: v_writelane_b32 v47, s25, 4 -; SI-NEXT: v_writelane_b32 v47, s24, 5 -; SI-NEXT: v_writelane_b32 v47, s23, 6 -; SI-NEXT: v_writelane_b32 v47, s22, 7 -; SI-NEXT: v_writelane_b32 v47, s21, 8 -; SI-NEXT: v_writelane_b32 v47, s20, 9 -; SI-NEXT: v_writelane_b32 v47, s19, 10 -; SI-NEXT: v_writelane_b32 v47, s18, 11 -; SI-NEXT: v_writelane_b32 v47, s17, 12 -; SI-NEXT: v_writelane_b32 v47, s16, 13 -; SI-NEXT: v_writelane_b32 v47, s4, 14 +; SI-NEXT: v_writelane_b32 v56, s29, 0 +; SI-NEXT: v_writelane_b32 v56, s28, 1 +; SI-NEXT: v_writelane_b32 v56, s27, 2 +; SI-NEXT: v_writelane_b32 v56, s26, 3 +; SI-NEXT: v_writelane_b32 v56, s25, 4 +; SI-NEXT: v_writelane_b32 v56, s24, 5 +; SI-NEXT: v_writelane_b32 v56, s23, 6 +; SI-NEXT: v_writelane_b32 v56, s22, 7 +; SI-NEXT: v_writelane_b32 v56, s21, 8 +; SI-NEXT: v_writelane_b32 v56, s20, 9 +; SI-NEXT: v_writelane_b32 v56, s19, 10 +; SI-NEXT: v_writelane_b32 v56, s18, 11 +; SI-NEXT: v_writelane_b32 v56, s17, 12 +; SI-NEXT: v_writelane_b32 v56, s16, 13 +; SI-NEXT: v_writelane_b32 v56, s4, 14 ; SI-NEXT: v_readfirstlane_b32 s4, v29 -; SI-NEXT: v_writelane_b32 v47, s4, 15 +; SI-NEXT: v_writelane_b32 v56, s4, 15 ; SI-NEXT: v_readfirstlane_b32 s4, v28 -; SI-NEXT: v_writelane_b32 v47, s4, 16 +; SI-NEXT: v_writelane_b32 v56, s4, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v27 -; SI-NEXT: v_writelane_b32 v47, s4, 17 +; SI-NEXT: v_writelane_b32 v56, s4, 17 ; SI-NEXT: v_readfirstlane_b32 s4, v26 -; SI-NEXT: v_writelane_b32 v47, s4, 18 +; SI-NEXT: v_writelane_b32 v56, s4, 18 ; SI-NEXT: v_readfirstlane_b32 s4, v25 -; SI-NEXT: v_writelane_b32 v47, s4, 19 +; SI-NEXT: v_writelane_b32 v56, s4, 19 ; SI-NEXT: v_readfirstlane_b32 s4, v24 -; SI-NEXT: v_writelane_b32 v47, s4, 20 +; SI-NEXT: v_writelane_b32 v56, s4, 20 ; SI-NEXT: v_readfirstlane_b32 s4, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:332 -; SI-NEXT: v_writelane_b32 v47, s4, 21 +; SI-NEXT: v_writelane_b32 v56, s4, 21 ; SI-NEXT: v_readfirstlane_b32 s4, v22 -; SI-NEXT: v_writelane_b32 v47, s4, 22 +; SI-NEXT: v_writelane_b32 v56, s4, 22 ; SI-NEXT: v_readfirstlane_b32 s4, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:328 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:324 -; SI-NEXT: v_writelane_b32 v47, s4, 23 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:320 +; SI-NEXT: v_writelane_b32 v56, s4, 23 ; SI-NEXT: v_readfirstlane_b32 s4, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:320 -; SI-NEXT: v_writelane_b32 v47, s4, 24 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:316 +; SI-NEXT: v_writelane_b32 v56, s4, 24 ; SI-NEXT: v_readfirstlane_b32 s4, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:316 -; SI-NEXT: v_writelane_b32 v47, s4, 25 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:332 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:328 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324 +; SI-NEXT: v_writelane_b32 v56, s4, 25 ; SI-NEXT: v_readfirstlane_b32 s4, v18 -; SI-NEXT: v_writelane_b32 v47, s4, 26 +; SI-NEXT: v_writelane_b32 v56, s4, 26 ; SI-NEXT: v_readfirstlane_b32 s4, v17 -; SI-NEXT: v_writelane_b32 v47, s4, 27 +; SI-NEXT: v_writelane_b32 v56, s4, 27 ; SI-NEXT: v_readfirstlane_b32 s4, v16 -; SI-NEXT: v_writelane_b32 v47, s4, 28 -; SI-NEXT: v_readfirstlane_b32 s4, v15 -; SI-NEXT: v_writelane_b32 v47, s4, 29 +; SI-NEXT: v_writelane_b32 v56, s4, 28 ; SI-NEXT: v_readfirstlane_b32 s4, v14 -; SI-NEXT: v_writelane_b32 v47, s4, 30 -; SI-NEXT: v_readfirstlane_b32 s4, v13 -; SI-NEXT: v_writelane_b32 v47, s4, 31 +; SI-NEXT: v_writelane_b32 v56, s4, 29 ; SI-NEXT: v_readfirstlane_b32 s4, v12 -; SI-NEXT: v_writelane_b32 v47, s4, 32 -; SI-NEXT: v_readfirstlane_b32 s4, v11 -; SI-NEXT: v_writelane_b32 v47, s4, 33 +; SI-NEXT: v_writelane_b32 v56, s4, 30 ; SI-NEXT: v_readfirstlane_b32 s4, v10 -; SI-NEXT: v_writelane_b32 v47, s4, 34 +; SI-NEXT: v_writelane_b32 v56, s4, 31 ; SI-NEXT: v_readfirstlane_b32 s4, v9 -; SI-NEXT: v_writelane_b32 v47, s4, 35 +; SI-NEXT: v_readfirstlane_b32 s57, v1 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248 +; SI-NEXT: v_writelane_b32 v56, s4, 32 ; SI-NEXT: v_readfirstlane_b32 s4, v8 -; SI-NEXT: v_writelane_b32 v47, s4, 36 -; SI-NEXT: v_readfirstlane_b32 s4, v7 -; SI-NEXT: v_writelane_b32 v47, s4, 37 -; SI-NEXT: v_readfirstlane_b32 s4, v6 -; SI-NEXT: v_writelane_b32 v47, s4, 38 -; SI-NEXT: v_readfirstlane_b32 s4, v5 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:312 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:308 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:304 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:300 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 +; SI-NEXT: v_writelane_b32 v56, s4, 33 ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288 +; SI-NEXT: v_readfirstlane_b32 s4, v7 ; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:284 +; SI-NEXT: v_readfirstlane_b32 s56, v6 ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280 +; SI-NEXT: v_readfirstlane_b32 s70, v5 ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:276 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:264 -; SI-NEXT: v_writelane_b32 v47, s4, 39 -; SI-NEXT: v_readfirstlane_b32 s4, v4 -; SI-NEXT: v_writelane_b32 v47, s4, 40 -; SI-NEXT: v_readfirstlane_b32 s4, v3 -; SI-NEXT: v_writelane_b32 v47, s4, 41 +; SI-NEXT: v_readfirstlane_b32 s96, v4 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 +; SI-NEXT: v_readfirstlane_b32 s86, v3 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 -; SI-NEXT: v_readfirstlane_b32 s69, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 -; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v23 -; SI-NEXT: s_and_b64 s[4:5], vcc, exec -; SI-NEXT: v_readfirstlane_b32 s4, v1 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248 -; SI-NEXT: v_writelane_b32 v47, s4, 42 -; SI-NEXT: v_readfirstlane_b32 s4, v0 +; SI-NEXT: v_readfirstlane_b32 s84, v11 +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264 +; SI-NEXT: v_readfirstlane_b32 s6, v15 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:312 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:304 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:300 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296 +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 +; SI-NEXT: v_readfirstlane_b32 s80, v13 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:308 +; SI-NEXT: v_readfirstlane_b32 s59, v0 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240 -; SI-NEXT: v_readfirstlane_b32 s83, v21 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:236 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:232 -; SI-NEXT: v_readfirstlane_b32 s86, v22 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:228 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:224 -; SI-NEXT: v_readfirstlane_b32 s99, v20 +; SI-NEXT: v_readfirstlane_b32 s98, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 +; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane +; SI-NEXT: v_writelane_b32 v56, s4, 34 +; SI-NEXT: v_writelane_b32 v56, s6, 35 +; SI-NEXT: v_writelane_b32 v56, s56, 36 +; SI-NEXT: v_writelane_b32 v56, s57, 37 +; SI-NEXT: v_writelane_b32 v56, s59, 38 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_readfirstlane_b32 s15, v23 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:216 -; SI-NEXT: v_readfirstlane_b32 s17, v19 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:216 +; SI-NEXT: v_readfirstlane_b32 s46, v20 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:212 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:208 -; SI-NEXT: v_writelane_b32 v47, s4, 43 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_readfirstlane_b32 s66, v14 -; SI-NEXT: v_readfirstlane_b32 s84, v13 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192 -; SI-NEXT: v_readfirstlane_b32 s8, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:188 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184 -; SI-NEXT: v_readfirstlane_b32 s9, v11 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:180 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176 -; SI-NEXT: v_readfirstlane_b32 s16, v10 -; SI-NEXT: v_readfirstlane_b32 s46, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168 -; SI-NEXT: v_readfirstlane_b32 s24, v8 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:208 +; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22 +; SI-NEXT: v_readfirstlane_b32 s11, v19 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:236 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:232 +; SI-NEXT: v_readfirstlane_b32 s13, v21 +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:228 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224 +; SI-NEXT: s_and_b64 s[4:5], vcc, exec +; SI-NEXT: v_readfirstlane_b32 s49, v16 +; SI-NEXT: v_readfirstlane_b32 s60, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:80 +; SI-NEXT: v_readfirstlane_b32 s41, v17 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76 +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:88 +; SI-NEXT: v_readfirstlane_b32 s25, v8 ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156 ; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:152 -; SI-NEXT: v_readfirstlane_b32 s29, v7 +; SI-NEXT: v_readfirstlane_b32 s97, v7 ; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148 ; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:144 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:204 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200 -; SI-NEXT: v_readfirstlane_b32 s10, v4 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_readfirstlane_b32 s27, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136 +; SI-NEXT: v_readfirstlane_b32 s28, v5 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128 +; SI-NEXT: v_readfirstlane_b32 s69, v4 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:120 -; SI-NEXT: v_readfirstlane_b32 s13, v3 +; SI-NEXT: v_readfirstlane_b32 s45, v3 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:112 -; SI-NEXT: v_readfirstlane_b32 s19, v9 +; SI-NEXT: v_readfirstlane_b32 s83, v11 +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104 +; SI-NEXT: v_readfirstlane_b32 s23, v15 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200 +; SI-NEXT: v_readfirstlane_b32 s55, v14 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184 +; SI-NEXT: v_readfirstlane_b32 s66, v9 ; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164 ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160 -; SI-NEXT: v_readfirstlane_b32 s47, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128 -; SI-NEXT: v_readfirstlane_b32 s27, v15 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:108 -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_readfirstlane_b32 s28, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96 -; SI-NEXT: v_readfirstlane_b32 s54, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:88 -; SI-NEXT: v_readfirstlane_b32 s59, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76 -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72 -; SI-NEXT: v_readfirstlane_b32 s61, v18 +; SI-NEXT: v_readfirstlane_b32 s37, v13 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192 +; SI-NEXT: v_readfirstlane_b32 s78, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176 +; SI-NEXT: v_readfirstlane_b32 s65, v18 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:68 ; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64 -; SI-NEXT: v_readfirstlane_b32 s44, v1 -; SI-NEXT: v_readfirstlane_b32 s52, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:44 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40 -; SI-NEXT: v_readfirstlane_b32 s53, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:36 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 -; SI-NEXT: v_readfirstlane_b32 s45, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:28 -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 -; SI-NEXT: v_readfirstlane_b32 s60, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:12 +; SI-NEXT: v_readfirstlane_b32 s47, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56 +; SI-NEXT: v_readfirstlane_b32 s81, v10 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168 +; SI-NEXT: v_readfirstlane_b32 s87, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 +; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96 +; SI-NEXT: v_readfirstlane_b32 s94, v25 +; SI-NEXT: v_readfirstlane_b32 s35, v23 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:12 ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 -; SI-NEXT: v_readfirstlane_b32 s62, v29 +; SI-NEXT: v_readfirstlane_b32 s48, v29 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:80 -; SI-NEXT: v_readfirstlane_b32 s14, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56 -; SI-NEXT: v_readfirstlane_b32 s15, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:52 -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48 -; SI-NEXT: v_readfirstlane_b32 s56, v25 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:20 ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16 -; SI-NEXT: v_writelane_b32 v46, s54, 0 -; SI-NEXT: v_writelane_b32 v46, s53, 1 -; SI-NEXT: v_readfirstlane_b32 s40, v19 -; SI-NEXT: v_readfirstlane_b32 s50, v13 -; SI-NEXT: v_readfirstlane_b32 s64, v27 -; SI-NEXT: v_readfirstlane_b32 s85, v12 -; SI-NEXT: v_readfirstlane_b32 s58, v28 -; SI-NEXT: v_readfirstlane_b32 s57, v11 -; SI-NEXT: v_readfirstlane_b32 s11, v30 -; SI-NEXT: v_readfirstlane_b32 s7, v6 -; SI-NEXT: v_writelane_b32 v46, s7, 2 -; SI-NEXT: v_writelane_b32 v46, s64, 3 -; SI-NEXT: v_writelane_b32 v46, s44, 4 -; SI-NEXT: v_writelane_b32 v46, s85, 5 -; SI-NEXT: v_writelane_b32 v46, s8, 6 -; SI-NEXT: v_writelane_b32 v46, s45, 7 -; SI-NEXT: v_writelane_b32 v46, s46, 8 -; SI-NEXT: v_writelane_b32 v46, s47, 9 -; SI-NEXT: v_writelane_b32 v46, s56, 10 -; SI-NEXT: v_writelane_b32 v46, s9, 11 -; SI-NEXT: v_writelane_b32 v46, s57, 12 -; SI-NEXT: v_writelane_b32 v46, s58, 13 -; SI-NEXT: v_writelane_b32 v46, s10, 14 +; SI-NEXT: v_readfirstlane_b32 s43, v20 ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_readfirstlane_b32 s92, v3 -; SI-NEXT: v_writelane_b32 v46, s11, 15 -; SI-NEXT: v_readfirstlane_b32 s12, v10 -; SI-NEXT: v_readfirstlane_b32 s30, v37 -; SI-NEXT: v_writelane_b32 v46, s59, 16 -; SI-NEXT: v_readfirstlane_b32 s36, v7 -; SI-NEXT: v_writelane_b32 v46, s12, 17 -; SI-NEXT: v_readfirstlane_b32 s48, v33 -; SI-NEXT: v_writelane_b32 v46, s60, 18 -; SI-NEXT: v_writelane_b32 v46, s61, 19 -; SI-NEXT: v_writelane_b32 v46, s13, 20 -; SI-NEXT: v_writelane_b32 v46, s62, 21 -; SI-NEXT: v_readfirstlane_b32 s6, v34 -; SI-NEXT: v_writelane_b32 v46, s14, 22 -; SI-NEXT: v_writelane_b32 v46, s15, 23 -; SI-NEXT: v_readfirstlane_b32 s41, v14 -; SI-NEXT: v_readfirstlane_b32 s51, v26 -; SI-NEXT: v_readfirstlane_b32 s87, v31 -; SI-NEXT: v_readfirstlane_b32 s23, v9 -; SI-NEXT: v_readfirstlane_b32 s25, v32 -; SI-NEXT: v_readfirstlane_b32 s26, v8 -; SI-NEXT: v_readfirstlane_b32 s4, v51 -; SI-NEXT: v_writelane_b32 v47, s4, 44 -; SI-NEXT: v_readfirstlane_b32 s4, v18 -; SI-NEXT: v_writelane_b32 v47, s4, 45 -; SI-NEXT: v_readfirstlane_b32 s4, v52 -; SI-NEXT: v_writelane_b32 v47, s4, 46 -; SI-NEXT: v_readfirstlane_b32 s4, v55 -; SI-NEXT: v_writelane_b32 v47, s4, 47 -; SI-NEXT: v_readfirstlane_b32 s4, v24 -; SI-NEXT: v_writelane_b32 v47, s4, 48 -; SI-NEXT: v_readfirstlane_b32 s4, v40 -; SI-NEXT: v_writelane_b32 v47, s4, 49 +; SI-NEXT: v_readfirstlane_b32 s16, v22 +; SI-NEXT: v_readfirstlane_b32 s19, v19 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:44 +; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40 +; SI-NEXT: v_readfirstlane_b32 s85, v24 +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:36 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 +; SI-NEXT: v_readfirstlane_b32 s42, v21 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:28 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:52 +; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48 +; SI-NEXT: v_readfirstlane_b32 s40, v1 +; SI-NEXT: v_readfirstlane_b32 s73, v50 +; SI-NEXT: v_readfirstlane_b32 s76, v17 +; SI-NEXT: v_writelane_b32 v47, s73, 0 +; SI-NEXT: v_writelane_b32 v47, s76, 1 +; SI-NEXT: v_readfirstlane_b32 s17, v8 +; SI-NEXT: v_readfirstlane_b32 s34, v33 +; SI-NEXT: v_readfirstlane_b32 s29, v7 +; SI-NEXT: v_readfirstlane_b32 s51, v34 +; SI-NEXT: v_readfirstlane_b32 s52, v6 +; SI-NEXT: v_readfirstlane_b32 s92, v51 +; SI-NEXT: v_readfirstlane_b32 s53, v16 +; SI-NEXT: v_readfirstlane_b32 s24, v35 +; SI-NEXT: v_readfirstlane_b32 s64, v4 +; SI-NEXT: v_writelane_b32 v47, s64, 2 +; SI-NEXT: v_readfirstlane_b32 s77, v3 +; SI-NEXT: v_readfirstlane_b32 vcc_hi, v37 +; SI-NEXT: v_writelane_b32 v47, s77, 3 +; SI-NEXT: v_readfirstlane_b32 s30, v38 +; SI-NEXT: v_writelane_b32 v47, vcc_hi, 4 +; SI-NEXT: v_readfirstlane_b32 s31, v11 +; SI-NEXT: v_writelane_b32 v47, s30, 5 +; SI-NEXT: v_writelane_b32 v47, s31, 6 +; SI-NEXT: v_writelane_b32 v47, s46, 7 +; SI-NEXT: v_readfirstlane_b32 s67, v9 +; SI-NEXT: v_writelane_b32 v47, s81, 8 +; SI-NEXT: v_readfirstlane_b32 s18, v32 +; SI-NEXT: v_writelane_b32 v47, s67, 9 +; SI-NEXT: v_writelane_b32 v47, s18, 10 +; SI-NEXT: v_writelane_b32 v47, s25, 11 +; SI-NEXT: v_writelane_b32 v47, s83, 12 +; SI-NEXT: v_writelane_b32 v47, s17, 13 +; SI-NEXT: v_writelane_b32 v47, s87, 14 +; SI-NEXT: v_writelane_b32 v47, s29, 15 +; SI-NEXT: v_writelane_b32 v47, s34, 16 +; SI-NEXT: v_writelane_b32 v47, s37, 17 +; SI-NEXT: v_writelane_b32 v47, s19, 18 +; SI-NEXT: v_readfirstlane_b32 s90, v13 +; SI-NEXT: v_writelane_b32 v47, s49, 19 +; SI-NEXT: v_readfirstlane_b32 s26, v26 +; SI-NEXT: v_writelane_b32 v47, s90, 20 +; SI-NEXT: v_writelane_b32 v47, s26, 21 +; SI-NEXT: v_writelane_b32 v47, s85, 22 +; SI-NEXT: v_writelane_b32 v47, s51, 23 +; SI-NEXT: v_writelane_b32 v47, s52, 24 +; SI-NEXT: v_writelane_b32 v47, s60, 25 +; SI-NEXT: v_readfirstlane_b32 s62, v27 +; SI-NEXT: v_writelane_b32 v47, s55, 26 +; SI-NEXT: v_writelane_b32 v47, s62, 27 +; SI-NEXT: v_readfirstlane_b32 s44, v14 +; SI-NEXT: v_writelane_b32 v47, s27, 28 +; SI-NEXT: v_writelane_b32 v47, s44, 29 +; SI-NEXT: v_writelane_b32 v47, s42, 30 +; SI-NEXT: v_writelane_b32 v47, s28, 31 +; SI-NEXT: v_writelane_b32 v47, s78, 32 +; SI-NEXT: v_readfirstlane_b32 s54, v12 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_readfirstlane_b32 s91, v18 +; SI-NEXT: v_writelane_b32 v47, s94, 33 +; SI-NEXT: v_readfirstlane_b32 s71, v28 ; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_readfirstlane_b32 s4, v41 -; SI-NEXT: v_writelane_b32 v47, s4, 50 +; SI-NEXT: v_readfirstlane_b32 s72, v43 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_readfirstlane_b32 s63, v29 +; SI-NEXT: v_writelane_b32 v56, s63, 39 ; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_readfirstlane_b32 s4, v43 -; SI-NEXT: v_writelane_b32 v47, s4, 51 +; SI-NEXT: v_readfirstlane_b32 s74, v44 +; SI-NEXT: v_writelane_b32 v56, s72, 40 +; SI-NEXT: v_writelane_b32 v56, s74, 41 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_readfirstlane_b32 s4, v29 -; SI-NEXT: v_writelane_b32 v47, s4, 52 -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_readfirstlane_b32 s4, v44 -; SI-NEXT: v_writelane_b32 v47, s4, 53 -; SI-NEXT: v_writelane_b32 v47, s92, 54 -; SI-NEXT: v_writelane_b32 v47, s30, 55 -; SI-NEXT: v_writelane_b32 v47, s36, 56 -; SI-NEXT: v_writelane_b32 v47, s48, 57 -; SI-NEXT: v_writelane_b32 v47, s66, 58 -; SI-NEXT: v_writelane_b32 v47, s52, 59 -; SI-NEXT: v_writelane_b32 v47, s84, 60 -; SI-NEXT: v_writelane_b32 v47, s6, 61 -; SI-NEXT: v_readfirstlane_b32 s67, v35 -; SI-NEXT: v_readfirstlane_b32 s94, v5 -; SI-NEXT: v_readfirstlane_b32 s65, v36 -; SI-NEXT: v_readfirstlane_b32 s22, v4 -; SI-NEXT: v_readfirstlane_b32 s18, v38 -; SI-NEXT: v_readfirstlane_b32 s20, v15 -; SI-NEXT: v_readfirstlane_b32 s35, v39 -; SI-NEXT: v_readfirstlane_b32 s31, v2 -; SI-NEXT: v_readfirstlane_b32 s78, v48 -; SI-NEXT: v_readfirstlane_b32 s98, v16 -; SI-NEXT: v_readfirstlane_b32 s97, v49 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_readfirstlane_b32 s55, v1 +; SI-NEXT: v_readfirstlane_b32 s7, v25 ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_readfirstlane_b32 s81, v50 -; SI-NEXT: v_readfirstlane_b32 s71, v17 +; SI-NEXT: v_readfirstlane_b32 s79, v55 ; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_readfirstlane_b32 s96, v0 +; SI-NEXT: v_readfirstlane_b32 s75, v24 +; SI-NEXT: v_writelane_b32 v56, s75, 42 ; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_readfirstlane_b32 s79, v53 +; SI-NEXT: v_readfirstlane_b32 s88, v40 +; SI-NEXT: v_writelane_b32 v56, s79, 43 ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_readfirstlane_b32 s90, v23 +; SI-NEXT: v_readfirstlane_b32 s89, v21 +; SI-NEXT: v_writelane_b32 v56, s88, 44 +; SI-NEXT: v_writelane_b32 v56, s89, 45 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_readfirstlane_b32 s37, v54 -; SI-NEXT: v_readfirstlane_b32 s82, v21 -; SI-NEXT: v_readfirstlane_b32 s80, v22 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_readfirstlane_b32 s70, v25 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_readfirstlane_b32 s76, v42 -; SI-NEXT: v_readfirstlane_b32 s21, v20 -; SI-NEXT: v_writelane_b32 v47, s50, 62 -; SI-NEXT: v_writelane_b32 v46, s40, 24 -; SI-NEXT: v_writelane_b32 v47, s51, 63 -; SI-NEXT: v_writelane_b32 v46, s41, 25 +; SI-NEXT: v_readfirstlane_b32 s8, v41 +; SI-NEXT: v_writelane_b32 v56, s7, 46 +; SI-NEXT: v_writelane_b32 v56, s8, 47 +; SI-NEXT: v_writelane_b32 v56, s91, 48 +; SI-NEXT: v_writelane_b32 v47, s54, 34 +; SI-NEXT: v_readfirstlane_b32 s9, v42 +; SI-NEXT: v_writelane_b32 v56, s92, 49 +; SI-NEXT: v_writelane_b32 v47, s71, 35 +; SI-NEXT: v_readfirstlane_b32 s10, v23 +; SI-NEXT: v_writelane_b32 v56, s9, 50 +; SI-NEXT: v_writelane_b32 v47, s69, 36 +; SI-NEXT: v_readfirstlane_b32 s38, v30 +; SI-NEXT: v_readfirstlane_b32 s93, v52 +; SI-NEXT: v_writelane_b32 v56, s10, 51 +; SI-NEXT: v_writelane_b32 v47, s41, 37 +; SI-NEXT: v_readfirstlane_b32 s95, v0 +; SI-NEXT: v_writelane_b32 v56, s93, 52 +; SI-NEXT: v_writelane_b32 v47, s38, 38 +; SI-NEXT: v_readfirstlane_b32 s22, v10 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_readfirstlane_b32 s12, v22 +; SI-NEXT: v_writelane_b32 v56, s95, 53 +; SI-NEXT: v_writelane_b32 v47, s65, 39 +; SI-NEXT: v_readfirstlane_b32 s14, v53 +; SI-NEXT: v_writelane_b32 v56, s12, 54 +; SI-NEXT: v_writelane_b32 v47, s22, 40 +; SI-NEXT: v_readfirstlane_b32 s39, v2 +; SI-NEXT: v_writelane_b32 v56, s14, 55 +; SI-NEXT: v_writelane_b32 v47, s35, 41 +; SI-NEXT: v_readfirstlane_b32 s50, v39 +; SI-NEXT: v_writelane_b32 v56, s39, 56 +; SI-NEXT: v_writelane_b32 v47, s45, 42 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_readfirstlane_b32 s20, v54 +; SI-NEXT: v_writelane_b32 v56, s50, 57 +; SI-NEXT: v_writelane_b32 v47, s48, 43 +; SI-NEXT: v_readfirstlane_b32 s21, v19 +; SI-NEXT: v_writelane_b32 v56, s20, 58 +; SI-NEXT: v_writelane_b32 v47, s47, 44 +; SI-NEXT: v_readfirstlane_b32 s36, v48 +; SI-NEXT: v_writelane_b32 v56, s21, 59 +; SI-NEXT: v_writelane_b32 v47, s16, 45 +; SI-NEXT: v_readfirstlane_b32 s99, v15 +; SI-NEXT: v_writelane_b32 v56, s36, 60 +; SI-NEXT: v_writelane_b32 v47, s43, 46 +; SI-NEXT: v_writelane_b32 v56, s53, 61 +; SI-NEXT: v_writelane_b32 v47, s99, 47 +; SI-NEXT: v_readfirstlane_b32 s58, v31 +; SI-NEXT: v_readfirstlane_b32 s68, v5 +; SI-NEXT: v_readfirstlane_b32 s82, v36 +; SI-NEXT: v_readfirstlane_b32 s61, v49 +; SI-NEXT: v_writelane_b32 v56, s40, 62 +; SI-NEXT: v_writelane_b32 v47, s23, 48 +; SI-NEXT: v_writelane_b32 v56, s61, 63 +; SI-NEXT: v_writelane_b32 v47, s58, 49 ; SI-NEXT: s_cbranch_scc0 .LBB93_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_readlane_b32 s4, v47, 13 -; SI-NEXT: v_readlane_b32 s5, v47, 12 +; SI-NEXT: v_readlane_b32 s4, v56, 13 +; SI-NEXT: v_readlane_b32 s5, v56, 12 ; SI-NEXT: s_and_b32 s4, s4, 0xff ; SI-NEXT: s_lshl_b32 s5, s5, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 26 -; SI-NEXT: v_readlane_b32 s4, v47, 5 -; SI-NEXT: v_readlane_b32 s5, v47, 4 +; SI-NEXT: v_writelane_b32 v47, s4, 50 +; SI-NEXT: v_readlane_b32 s4, v56, 11 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_readlane_b32 s5, v47, 41 -; SI-NEXT: v_writelane_b32 v46, s4, 28 -; SI-NEXT: s_and_b32 s4, s69, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: v_writelane_b32 v46, s69, 44 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 30 -; SI-NEXT: v_readlane_b32 s4, v47, 34 -; SI-NEXT: v_readlane_b32 s5, v47, 33 +; SI-NEXT: s_mov_b32 s5, s6 +; SI-NEXT: v_readlane_b32 s6, v56, 10 +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s6, 24 +; SI-NEXT: s_or_b32 vcc_lo, s6, s4 +; SI-NEXT: v_readlane_b32 s4, v56, 5 +; SI-NEXT: v_readlane_b32 s6, v56, 4 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 32 -; SI-NEXT: v_readlane_b32 s4, v47, 26 -; SI-NEXT: v_readlane_b32 s5, v47, 25 +; SI-NEXT: s_lshl_b32 s6, s6, 8 +; SI-NEXT: s_or_b32 s4, s4, s6 +; SI-NEXT: v_writelane_b32 v47, s4, 54 +; SI-NEXT: v_readlane_b32 s4, v56, 3 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 34 -; SI-NEXT: v_readlane_b32 s4, v47, 18 -; SI-NEXT: v_readlane_b32 s5, v47, 17 +; SI-NEXT: v_readlane_b32 s6, v56, 2 +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s6, 24 +; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane +; SI-NEXT: v_writelane_b32 v46, s24, 0 +; SI-NEXT: s_mov_b32 s24, s68 +; SI-NEXT: s_or_b32 s68, s6, s4 +; SI-NEXT: s_and_b32 s4, s98, 0xff +; SI-NEXT: s_lshl_b32 s6, s86, 8 +; SI-NEXT: s_or_b32 s4, s4, s6 +; SI-NEXT: v_writelane_b32 v47, s4, 56 +; SI-NEXT: s_and_b32 s4, s96, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s70, 24 +; SI-NEXT: v_writelane_b32 v46, s70, 1 +; SI-NEXT: s_or_b32 s70, s6, s4 +; SI-NEXT: v_readlane_b32 s4, v56, 31 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 36 -; SI-NEXT: s_and_b32 s4, s21, 0xff -; SI-NEXT: s_lshl_b32 s5, s76, 8 -; SI-NEXT: v_writelane_b32 v46, s24, 45 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 38 -; SI-NEXT: s_and_b32 s4, s82, 0xff -; SI-NEXT: s_lshl_b32 s5, s37, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 40 -; SI-NEXT: s_and_b32 s4, s71, 0xff -; SI-NEXT: s_lshl_b32 s5, s81, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 42 -; SI-NEXT: s_and_b32 s4, s20, 0xff -; SI-NEXT: s_lshl_b32 s5, s18, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 46 -; SI-NEXT: s_and_b32 s4, s7, 0xff -; SI-NEXT: s_lshl_b32 s5, s6, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 47 -; SI-NEXT: s_and_b32 s4, s12, 0xff -; SI-NEXT: s_lshl_b32 s5, s11, 8 -; SI-NEXT: s_or_b32 s63, s4, s5 -; SI-NEXT: s_and_b32 s4, s41, 0xff -; SI-NEXT: s_lshl_b32 s5, s40, 8 -; SI-NEXT: s_or_b32 s72, s4, s5 -; SI-NEXT: s_and_b32 s4, s15, 0xff -; SI-NEXT: s_lshl_b32 s5, s14, 8 -; SI-NEXT: s_or_b32 s73, s4, s5 -; SI-NEXT: s_and_b32 s4, s13, 0xff -; SI-NEXT: s_lshl_b32 s5, s10, 8 -; SI-NEXT: s_or_b32 s74, s4, s5 -; SI-NEXT: s_and_b32 s4, s9, 0xff -; SI-NEXT: s_lshl_b32 s5, s8, 8 -; SI-NEXT: s_or_b32 s75, s4, s5 -; SI-NEXT: v_readlane_b32 s4, v47, 9 -; SI-NEXT: v_readlane_b32 s5, v47, 8 +; SI-NEXT: s_lshl_b32 s6, s84, 8 +; SI-NEXT: s_or_b32 s4, s4, s6 +; SI-NEXT: v_writelane_b32 v47, s4, 58 +; SI-NEXT: v_readlane_b32 s4, v56, 30 +; SI-NEXT: v_writelane_b32 v46, s11, 2 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: s_or_b32 s5, s4, s5 -; SI-NEXT: v_readlane_b32 s4, v47, 7 +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s80, 24 +; SI-NEXT: v_writelane_b32 v46, s96, 3 +; SI-NEXT: v_writelane_b32 v46, s80, 4 +; SI-NEXT: s_or_b32 s80, s6, s4 +; SI-NEXT: v_readlane_b32 s4, v56, 26 +; SI-NEXT: v_readlane_b32 s6, v56, 25 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s6, s6, 8 +; SI-NEXT: v_writelane_b32 v46, s13, 5 +; SI-NEXT: s_or_b32 s13, s4, s6 +; SI-NEXT: v_readlane_b32 s4, v56, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: v_readlane_b32 s6, v47, 6 +; SI-NEXT: v_readlane_b32 s6, v56, 23 ; SI-NEXT: s_lshl_b32 s4, s4, 16 ; SI-NEXT: s_lshl_b32 s6, s6, 24 -; SI-NEXT: s_or_b32 s68, s6, s4 -; SI-NEXT: v_readlane_b32 s4, v47, 11 +; SI-NEXT: v_writelane_b32 v46, s82, 6 +; SI-NEXT: s_or_b32 s82, s6, s4 +; SI-NEXT: v_readlane_b32 s4, v56, 18 +; SI-NEXT: v_readlane_b32 s6, v56, 17 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: v_writelane_b32 v46, s84, 7 +; SI-NEXT: s_lshl_b32 s6, s6, 8 +; SI-NEXT: v_writelane_b32 v46, s15, 8 +; SI-NEXT: s_or_b32 s15, s4, s6 +; SI-NEXT: v_readlane_b32 s4, v56, 16 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: v_readlane_b32 s6, v47, 10 +; SI-NEXT: v_readlane_b32 s6, v56, 15 ; SI-NEXT: s_lshl_b32 s4, s4, 16 ; SI-NEXT: s_lshl_b32 s6, s6, 24 -; SI-NEXT: s_or_b32 s4, s6, s4 -; SI-NEXT: v_readlane_b32 s6, v47, 1 -; SI-NEXT: v_readlane_b32 s7, v47, 0 -; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: s_lshl_b32 s7, s7, 8 -; SI-NEXT: s_or_b32 s7, s6, s7 -; SI-NEXT: v_readlane_b32 s6, v47, 43 -; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: v_readlane_b32 s8, v47, 42 -; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s8, s8, 24 -; SI-NEXT: s_or_b32 s91, s8, s6 -; SI-NEXT: v_readlane_b32 s6, v47, 3 -; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: v_readlane_b32 s8, v47, 2 -; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s8, s8, 24 -; SI-NEXT: s_or_b32 s6, s8, s6 -; SI-NEXT: v_readlane_b32 s8, v47, 38 -; SI-NEXT: v_readlane_b32 s9, v47, 37 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: s_lshl_b32 s9, s9, 8 -; SI-NEXT: s_or_b32 s9, s8, s9 -; SI-NEXT: v_readlane_b32 s8, v47, 36 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s10, v47, 35 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s10, s10, 24 -; SI-NEXT: s_or_b32 s88, s10, s8 -; SI-NEXT: v_readlane_b32 s8, v47, 40 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s10, v47, 39 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s10, s10, 24 -; SI-NEXT: s_or_b32 s8, s10, s8 -; SI-NEXT: v_readlane_b32 s10, v47, 30 -; SI-NEXT: v_readlane_b32 s11, v47, 29 -; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: s_lshl_b32 s11, s11, 8 -; SI-NEXT: s_or_b32 s11, s10, s11 -; SI-NEXT: v_readlane_b32 s10, v47, 28 -; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s12, v47, 27 -; SI-NEXT: s_lshl_b32 s10, s10, 16 -; SI-NEXT: s_lshl_b32 s12, s12, 24 -; SI-NEXT: s_or_b32 s95, s12, s10 -; SI-NEXT: v_readlane_b32 s10, v47, 32 -; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s12, v47, 31 -; SI-NEXT: s_lshl_b32 s10, s10, 16 -; SI-NEXT: s_lshl_b32 s12, s12, 24 -; SI-NEXT: s_or_b32 s10, s12, s10 -; SI-NEXT: v_readlane_b32 s12, v47, 22 -; SI-NEXT: v_readlane_b32 s13, v47, 21 -; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: s_lshl_b32 s13, s13, 8 -; SI-NEXT: s_or_b32 s13, s12, s13 -; SI-NEXT: v_readlane_b32 s12, v47, 20 -; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s14, v47, 19 -; SI-NEXT: s_lshl_b32 s12, s12, 16 -; SI-NEXT: s_lshl_b32 s14, s14, 24 -; SI-NEXT: s_or_b32 s89, s14, s12 -; SI-NEXT: v_readlane_b32 s12, v47, 24 -; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s14, v47, 23 -; SI-NEXT: s_lshl_b32 s12, s12, 16 -; SI-NEXT: s_lshl_b32 s14, s14, 24 -; SI-NEXT: s_or_b32 s12, s14, s12 -; SI-NEXT: v_readlane_b32 s14, v47, 14 -; SI-NEXT: v_readlane_b32 s15, v47, 53 -; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: s_lshl_b32 s15, s15, 8 -; SI-NEXT: v_writelane_b32 v46, s71, 48 -; SI-NEXT: s_or_b32 s15, s14, s15 -; SI-NEXT: v_readlane_b32 s14, v47, 52 -; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: v_writelane_b32 v46, s16, 49 -; SI-NEXT: v_readlane_b32 s16, v47, 51 -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: v_writelane_b32 v46, s18, 50 -; SI-NEXT: s_lshl_b32 s18, s16, 24 -; SI-NEXT: s_or_b32 s93, s18, s14 -; SI-NEXT: v_readlane_b32 s14, v47, 16 -; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: v_readlane_b32 s16, v47, 15 -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: s_lshl_b32 s18, s16, 24 -; SI-NEXT: v_readlane_b32 s16, v47, 49 -; SI-NEXT: s_or_b32 s14, s18, s14 -; SI-NEXT: s_and_b32 s18, s80, 0xff -; SI-NEXT: s_lshl_b32 s40, s16, 8 -; SI-NEXT: v_readlane_b32 s16, v47, 48 -; SI-NEXT: s_or_b32 s41, s18, s40 -; SI-NEXT: s_and_b32 s18, s16, 0xff -; SI-NEXT: v_readlane_b32 s16, v47, 47 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_lshl_b32 s40, s16, 24 -; SI-NEXT: s_mov_b32 s24, s21 -; SI-NEXT: s_or_b32 s21, s40, s18 -; SI-NEXT: s_and_b32 s40, s70, 0xff -; SI-NEXT: v_readlane_b32 s18, v47, 50 -; SI-NEXT: s_lshl_b32 s40, s40, 16 -; SI-NEXT: s_lshl_b32 s42, s18, 24 -; SI-NEXT: v_readlane_b32 s18, v47, 46 -; SI-NEXT: s_or_b32 s40, s42, s40 -; SI-NEXT: s_and_b32 s42, s96, 0xff -; SI-NEXT: s_lshl_b32 s43, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v47, 45 -; SI-NEXT: s_or_b32 s43, s42, s43 -; SI-NEXT: s_and_b32 s42, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v47, 44 -; SI-NEXT: s_mov_b32 s34, s76 -; SI-NEXT: s_lshl_b32 s42, s42, 16 -; SI-NEXT: s_lshl_b32 s76, s18, 24 -; SI-NEXT: s_or_b32 s69, s76, s42 -; SI-NEXT: s_and_b32 s42, s90, 0xff -; SI-NEXT: s_lshl_b32 s42, s42, 16 -; SI-NEXT: s_lshl_b32 s76, s79, 24 -; SI-NEXT: s_or_b32 s42, s76, s42 -; SI-NEXT: s_and_b32 s76, s98, 0xff -; SI-NEXT: s_lshl_b32 s77, s78, 8 -; SI-NEXT: v_writelane_b32 v46, s20, 51 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s31, 0xff -; SI-NEXT: v_writelane_b32 v46, s78, 52 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s35, 24 -; SI-NEXT: s_mov_b32 s16, s70 -; SI-NEXT: s_or_b32 s70, s78, s77 -; SI-NEXT: s_and_b32 s77, s55, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s97, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_or_b32 vcc_lo, s78, s77 -; SI-NEXT: s_or_b32 vcc_hi, s76, s70 -; SI-NEXT: s_and_b32 s76, s22, 0xff -; SI-NEXT: s_lshl_b32 s77, s65, 8 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s94, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s67, 24 -; SI-NEXT: s_or_b32 s71, s78, s77 -; SI-NEXT: s_and_b32 s77, s92, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s30, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_or_b32 s38, s78, s77 -; SI-NEXT: s_or_b32 s39, s76, s71 -; SI-NEXT: s_and_b32 s76, s26, 0xff -; SI-NEXT: s_lshl_b32 s77, s25, 8 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s23, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s87, 24 -; SI-NEXT: v_writelane_b32 v46, s80, 53 -; SI-NEXT: s_or_b32 s80, s78, s77 -; SI-NEXT: s_and_b32 s77, s36, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s48, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_or_b32 s48, s78, s77 -; SI-NEXT: s_or_b32 s49, s76, s80 -; SI-NEXT: s_and_b32 s76, s85, 0xff -; SI-NEXT: s_lshl_b32 s77, s64, 8 -; SI-NEXT: v_writelane_b32 v46, s98, 54 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s50, 0xff -; SI-NEXT: v_writelane_b32 v46, s24, 55 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s51, 24 -; SI-NEXT: v_writelane_b32 v46, s34, 56 -; SI-NEXT: v_writelane_b32 v46, s81, 57 -; SI-NEXT: s_or_b32 s81, s78, s77 -; SI-NEXT: s_and_b32 s77, s57, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s58, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_or_b32 s50, s78, s77 -; SI-NEXT: s_or_b32 s51, s76, s81 -; SI-NEXT: s_and_b32 s76, s56, 0xff -; SI-NEXT: s_lshl_b32 s77, s45, 8 -; SI-NEXT: v_writelane_b32 v46, s22, 58 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s53, 0xff -; SI-NEXT: v_writelane_b32 v46, s65, 59 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s52, 24 -; SI-NEXT: v_writelane_b32 v46, s67, 60 -; SI-NEXT: v_writelane_b32 v46, s94, 61 -; SI-NEXT: s_mov_b32 s94, s82 -; SI-NEXT: s_or_b32 s82, s78, s77 -; SI-NEXT: s_and_b32 s77, s62, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s60, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_or_b32 s52, s78, s77 -; SI-NEXT: s_or_b32 s53, s76, s82 -; SI-NEXT: s_and_b32 s76, s44, 0xff -; SI-NEXT: s_lshl_b32 s77, s54, 8 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s28, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s27, 24 -; SI-NEXT: v_writelane_b32 v46, s97, 62 -; SI-NEXT: s_mov_b32 s92, s28 -; SI-NEXT: s_mov_b32 s28, s27 -; SI-NEXT: s_mov_b32 s27, s26 -; SI-NEXT: s_mov_b32 s26, s25 -; SI-NEXT: s_mov_b32 s25, s87 -; SI-NEXT: s_or_b32 s87, s78, s77 -; SI-NEXT: s_and_b32 s77, s61, 0xff -; SI-NEXT: s_mov_b32 s24, s23 -; SI-NEXT: s_mov_b32 s23, s16 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s59, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: v_readlane_b32 s16, v46, 45 -; SI-NEXT: s_mov_b32 s85, s55 -; SI-NEXT: s_or_b32 s54, s78, s77 -; SI-NEXT: s_or_b32 s55, s76, s87 -; SI-NEXT: s_and_b32 s76, s29, 0xff -; SI-NEXT: s_lshl_b32 s77, s16, 8 -; SI-NEXT: v_readlane_b32 s18, v46, 26 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s19, 0xff -; SI-NEXT: v_readlane_b32 s16, v46, 49 -; SI-NEXT: s_and_b32 s44, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 28 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s16, 24 -; SI-NEXT: s_and_b32 s45, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 30 -; SI-NEXT: s_mov_b32 s20, s19 -; SI-NEXT: s_mov_b32 s19, s37 -; SI-NEXT: s_mov_b32 s37, s35 -; SI-NEXT: s_mov_b32 s35, s31 -; SI-NEXT: s_mov_b32 s31, s79 -; SI-NEXT: s_mov_b32 s79, s90 -; SI-NEXT: s_mov_b32 s90, s96 -; SI-NEXT: s_or_b32 s96, s78, s77 -; SI-NEXT: s_lshl_b32 s78, s46, 24 -; SI-NEXT: s_and_b32 s46, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 32 -; SI-NEXT: s_and_b32 s77, s47, 0xff -; SI-NEXT: s_and_b32 s47, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 34 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_and_b32 s56, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 36 -; SI-NEXT: s_or_b32 s64, s78, s77 -; SI-NEXT: s_or_b32 s65, s76, s96 -; SI-NEXT: s_and_b32 s76, s17, 0xff -; SI-NEXT: s_lshl_b32 s77, s99, 8 -; SI-NEXT: s_and_b32 s57, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 38 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s86, 0xff -; SI-NEXT: s_and_b32 s30, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 40 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s83, 24 -; SI-NEXT: s_and_b32 s34, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 42 +; SI-NEXT: s_or_b32 s84, s6, s4 +; SI-NEXT: s_and_b32 s4, s10, 0xff +; SI-NEXT: s_lshl_b32 s6, s9, 8 +; SI-NEXT: s_or_b32 s11, s4, s6 +; SI-NEXT: s_and_b32 s4, s7, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s8, 24 +; SI-NEXT: v_writelane_b32 v46, s86, 9 +; SI-NEXT: s_or_b32 s86, s6, s4 +; SI-NEXT: s_and_b32 s4, s21, 0xff +; SI-NEXT: s_lshl_b32 s6, s20, 8 +; SI-NEXT: s_or_b32 s9, s4, s6 +; SI-NEXT: s_and_b32 s4, s12, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s14, 24 +; SI-NEXT: s_or_b32 s96, s6, s4 +; SI-NEXT: s_and_b32 s4, s76, 0xff +; SI-NEXT: s_lshl_b32 s6, s73, 8 +; SI-NEXT: s_or_b32 s7, s4, s6 +; SI-NEXT: s_and_b32 s4, s40, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s61, 24 +; SI-NEXT: v_writelane_b32 v46, s98, 10 +; SI-NEXT: s_or_b32 s98, s6, s4 +; SI-NEXT: s_and_b32 s4, s31, 0xff +; SI-NEXT: s_lshl_b32 s6, s30, 8 +; SI-NEXT: s_or_b32 s76, s4, s6 +; SI-NEXT: s_and_b32 s4, s77, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, vcc_hi, 24 +; SI-NEXT: s_or_b32 s40, s6, s4 +; SI-NEXT: s_and_b32 s4, s52, 0xff +; SI-NEXT: s_lshl_b32 s6, s51, 8 +; SI-NEXT: s_or_b32 vcc_hi, s4, s6 +; SI-NEXT: s_and_b32 s4, s29, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s34, 24 +; SI-NEXT: s_or_b32 s14, s6, s4 +; SI-NEXT: s_and_b32 s4, s22, 0xff +; SI-NEXT: s_lshl_b32 s6, s38, 8 +; SI-NEXT: s_or_b32 s52, s4, s6 +; SI-NEXT: s_and_b32 s4, s54, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s71, 24 +; SI-NEXT: s_or_b32 s12, s6, s4 +; SI-NEXT: s_and_b32 s4, s99, 0xff +; SI-NEXT: s_lshl_b32 s6, s43, 8 +; SI-NEXT: s_or_b32 s54, s4, s6 +; SI-NEXT: s_and_b32 s4, s48, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s35, 24 +; SI-NEXT: s_or_b32 s10, s6, s4 +; SI-NEXT: s_and_b32 s4, s16, 0xff +; SI-NEXT: s_lshl_b32 s6, s47, 8 +; SI-NEXT: s_or_b32 s34, s4, s6 +; SI-NEXT: s_and_b32 s4, s65, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s41, 24 +; SI-NEXT: s_or_b32 s8, s6, s4 +; SI-NEXT: s_and_b32 s4, s45, 0xff +; SI-NEXT: s_lshl_b32 s6, s69, 8 +; SI-NEXT: s_or_b32 s30, s4, s6 +; SI-NEXT: s_and_b32 s4, s28, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s27, 24 +; SI-NEXT: s_or_b32 s6, s6, s4 +; SI-NEXT: s_and_b32 s4, s78, 0xff +; SI-NEXT: s_lshl_b32 s20, s55, 8 +; SI-NEXT: s_or_b32 s41, s4, s20 +; SI-NEXT: s_and_b32 s4, s37, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s20, s23, 24 +; SI-NEXT: s_or_b32 s4, s20, s4 +; SI-NEXT: v_readlane_b32 s20, v56, 9 +; SI-NEXT: v_readlane_b32 s22, v56, 8 +; SI-NEXT: s_and_b32 s21, s20, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 8 +; SI-NEXT: s_or_b32 s69, s21, s22 +; SI-NEXT: v_readlane_b32 s21, v56, 7 +; SI-NEXT: s_and_b32 s21, s21, 0xff +; SI-NEXT: v_readlane_b32 s20, v56, 6 +; SI-NEXT: s_lshl_b32 s21, s21, 16 +; SI-NEXT: s_lshl_b32 s22, s20, 24 +; SI-NEXT: s_or_b32 s51, s22, s21 +; SI-NEXT: v_readlane_b32 s21, v56, 1 +; SI-NEXT: v_readlane_b32 s20, v56, 0 +; SI-NEXT: s_and_b32 s22, s21, 0xff +; SI-NEXT: s_lshl_b32 s27, s20, 8 +; SI-NEXT: s_or_b32 s71, s22, s27 +; SI-NEXT: s_and_b32 s22, s59, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s27, s57, 24 +; SI-NEXT: v_readlane_b32 s16, v56, 34 +; SI-NEXT: s_or_b32 s27, s27, s22 +; SI-NEXT: s_and_b32 s22, s56, 0xff +; SI-NEXT: s_lshl_b32 s28, s16, 8 +; SI-NEXT: v_readlane_b32 s16, v56, 33 +; SI-NEXT: s_or_b32 s61, s22, s28 +; SI-NEXT: s_and_b32 s22, s16, 0xff +; SI-NEXT: v_readlane_b32 s16, v56, 32 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s16, 24 +; SI-NEXT: v_readlane_b32 s20, v56, 29 +; SI-NEXT: s_or_b32 s16, s28, s22 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: s_lshl_b32 s28, s5, 8 +; SI-NEXT: v_readlane_b32 s20, v56, 28 +; SI-NEXT: s_or_b32 s73, s22, s28 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: v_readlane_b32 s20, v56, 27 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s20, 24 +; SI-NEXT: v_readlane_b32 s20, v56, 22 +; SI-NEXT: s_or_b32 s43, s28, s22 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: v_readlane_b32 s20, v56, 21 +; SI-NEXT: s_lshl_b32 s28, s20, 8 +; SI-NEXT: v_readlane_b32 s20, v56, 20 +; SI-NEXT: s_or_b32 s77, s22, s28 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: v_readlane_b32 s20, v56, 19 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s20, 24 +; SI-NEXT: v_readlane_b32 s20, v56, 14 +; SI-NEXT: s_or_b32 s47, s28, s22 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: s_lshl_b32 s28, s74, 8 +; SI-NEXT: s_or_b32 s21, s22, s28 +; SI-NEXT: s_and_b32 s22, s63, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s72, 24 +; SI-NEXT: s_or_b32 s59, s28, s22 +; SI-NEXT: s_and_b32 s22, s89, 0xff +; SI-NEXT: s_lshl_b32 s28, s88, 8 +; SI-NEXT: s_or_b32 s37, s22, s28 +; SI-NEXT: s_and_b32 s22, s75, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s79, 24 +; SI-NEXT: s_or_b32 s63, s28, s22 +; SI-NEXT: s_and_b32 s22, s95, 0xff +; SI-NEXT: s_lshl_b32 s28, s93, 8 +; SI-NEXT: s_or_b32 s65, s22, s28 +; SI-NEXT: s_and_b32 s22, s91, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s92, 24 +; SI-NEXT: s_or_b32 s75, s28, s22 +; SI-NEXT: s_and_b32 s22, s53, 0xff +; SI-NEXT: s_lshl_b32 s28, s36, 8 +; SI-NEXT: s_or_b32 s36, s22, s28 +; SI-NEXT: s_and_b32 s22, s39, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s50, 24 +; SI-NEXT: v_readlane_b32 s20, v46, 6 +; SI-NEXT: s_or_b32 s55, s28, s22 +; SI-NEXT: s_and_b32 s22, s64, 0xff +; SI-NEXT: s_lshl_b32 s28, s20, 8 +; SI-NEXT: s_or_b32 s35, s22, s28 +; SI-NEXT: s_and_b32 s22, s24, 0xff +; SI-NEXT: v_readlane_b32 s20, v46, 0 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s20, 24 +; SI-NEXT: s_or_b32 s57, s28, s22 +; SI-NEXT: s_and_b32 s22, s17, 0xff +; SI-NEXT: s_lshl_b32 s28, s18, 8 +; SI-NEXT: s_or_b32 s17, s22, s28 +; SI-NEXT: s_and_b32 s22, s67, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s58, 24 +; SI-NEXT: s_or_b32 s88, s28, s22 +; SI-NEXT: s_and_b32 s22, s44, 0xff +; SI-NEXT: s_lshl_b32 s28, s62, 8 +; SI-NEXT: s_or_b32 s89, s22, s28 +; SI-NEXT: s_and_b32 s22, s90, 0xff +; SI-NEXT: v_readlane_b32 s5, v47, 50 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s26, 24 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_mov_b32 s16, s83 -; SI-NEXT: s_or_b32 s83, s78, s77 -; SI-NEXT: s_and_b32 s77, s84, 0xff -; SI-NEXT: s_and_b32 s36, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 46 -; SI-NEXT: s_or_b32 s5, s5, s68 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s66, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_and_b32 s84, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 47 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_or_b32 s66, s78, s77 -; SI-NEXT: s_or_b32 s67, s76, s83 -; SI-NEXT: s_mov_b32 s78, s86 -; SI-NEXT: s_and_b32 s86, s18, 0xffff -; SI-NEXT: s_mov_b32 s76, s99 -; SI-NEXT: s_and_b32 s99, s74, 0xffff -; SI-NEXT: s_and_b32 s18, s75, 0xffff -; SI-NEXT: s_or_b32 s74, s44, s4 -; SI-NEXT: s_mov_b32 s75, s5 -; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16 -; SI-NEXT: s_or_b32 s7, s7, s91 -; SI-NEXT: v_writelane_b32 v46, s4, 26 -; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 27 -; SI-NEXT: s_lshr_b64 s[4:5], s[6:7], 16 -; SI-NEXT: s_or_b32 s9, s9, s88 -; SI-NEXT: v_writelane_b32 v46, s4, 28 -; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 29 -; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 16 -; SI-NEXT: s_or_b32 s11, s11, s95 -; SI-NEXT: v_writelane_b32 v46, s4, 30 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 31 -; SI-NEXT: s_lshr_b64 s[4:5], s[10:11], 16 -; SI-NEXT: s_or_b32 s13, s13, s89 -; SI-NEXT: v_writelane_b32 v46, s4, 32 -; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 33 -; SI-NEXT: s_lshr_b64 s[4:5], s[12:13], 16 -; SI-NEXT: s_or_b32 s15, s15, s93 -; SI-NEXT: v_writelane_b32 v46, s4, 34 -; SI-NEXT: s_and_b32 s41, s41, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 35 -; SI-NEXT: s_lshr_b64 s[4:5], s[14:15], 16 -; SI-NEXT: s_or_b32 s41, s41, s21 -; SI-NEXT: v_writelane_b32 v46, s4, 36 -; SI-NEXT: s_and_b32 s43, s43, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 37 -; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 16 -; SI-NEXT: s_or_b32 s43, s43, s69 -; SI-NEXT: v_writelane_b32 v46, s4, 38 -; SI-NEXT: v_writelane_b32 v46, s5, 39 -; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 16 -; SI-NEXT: v_writelane_b32 v46, s4, 40 -; SI-NEXT: v_writelane_b32 v46, s5, 41 -; SI-NEXT: s_lshr_b64 s[4:5], vcc, 16 -; SI-NEXT: s_and_b32 s97, s63, 0xffff -; SI-NEXT: s_and_b32 s98, s72, 0xffff -; SI-NEXT: s_and_b32 s22, s73, 0xffff -; SI-NEXT: v_writelane_b32 v46, s4, 42 -; SI-NEXT: s_or_b32 s72, s45, s6 -; SI-NEXT: s_mov_b32 s73, s7 -; SI-NEXT: s_or_b32 s62, s46, s8 -; SI-NEXT: s_mov_b32 s63, s9 -; SI-NEXT: s_or_b32 s60, s47, s10 -; SI-NEXT: s_mov_b32 s61, s11 -; SI-NEXT: s_or_b32 s58, s56, s12 -; SI-NEXT: s_mov_b32 s59, s13 -; SI-NEXT: s_or_b32 s56, s57, s14 -; SI-NEXT: s_mov_b32 s57, s15 -; SI-NEXT: s_or_b32 s46, s30, s40 -; SI-NEXT: s_mov_b32 s47, s41 -; SI-NEXT: v_writelane_b32 v46, s5, 43 -; SI-NEXT: s_or_b32 s40, s84, s38 -; SI-NEXT: s_mov_b32 s41, s39 -; SI-NEXT: s_lshr_b64 s[38:39], s[38:39], 16 -; SI-NEXT: s_or_b32 s14, s86, s48 -; SI-NEXT: s_mov_b32 s15, s49 -; SI-NEXT: s_lshr_b64 s[48:49], s[48:49], 16 -; SI-NEXT: s_or_b32 s12, s97, s50 -; SI-NEXT: s_mov_b32 s13, s51 -; SI-NEXT: s_lshr_b64 s[50:51], s[50:51], 16 -; SI-NEXT: s_or_b32 s10, s98, s52 -; SI-NEXT: s_mov_b32 s11, s53 -; SI-NEXT: s_lshr_b64 s[52:53], s[52:53], 16 -; SI-NEXT: s_or_b32 s8, s22, s54 -; SI-NEXT: s_mov_b32 s9, s55 -; SI-NEXT: s_lshr_b64 s[54:55], s[54:55], 16 -; SI-NEXT: s_or_b32 s6, s99, s64 -; SI-NEXT: s_mov_b32 s7, s65 -; SI-NEXT: s_lshr_b64 s[64:65], s[64:65], 16 -; SI-NEXT: s_or_b32 s4, s18, s66 -; SI-NEXT: s_mov_b32 s5, s67 -; SI-NEXT: s_lshr_b64 s[66:67], s[66:67], 16 -; SI-NEXT: s_or_b32 s44, s34, s42 -; SI-NEXT: s_mov_b32 s45, s43 -; SI-NEXT: s_or_b32 s42, s36, vcc_lo -; SI-NEXT: s_mov_b32 s43, vcc_hi -; SI-NEXT: s_mov_b32 s86, s78 -; SI-NEXT: s_mov_b32 s99, s76 -; SI-NEXT: v_readlane_b32 s18, v46, 50 -; SI-NEXT: s_lshr_b32 s77, s68, 16 -; SI-NEXT: s_lshr_b32 s68, s91, 16 -; SI-NEXT: s_lshr_b32 s88, s88, 16 -; SI-NEXT: s_lshr_b32 s84, s95, 16 -; SI-NEXT: s_lshr_b32 s89, s89, 16 -; SI-NEXT: s_lshr_b32 s91, s93, 16 -; SI-NEXT: s_lshr_b32 s93, s21, 16 -; SI-NEXT: s_lshr_b32 s95, s69, 16 -; SI-NEXT: s_lshr_b32 s30, s70, 16 -; SI-NEXT: s_lshr_b32 s34, s71, 16 -; SI-NEXT: s_lshr_b32 s36, s80, 16 -; SI-NEXT: v_readlane_b32 s69, v46, 44 -; SI-NEXT: v_readlane_b32 s80, v46, 53 -; SI-NEXT: s_lshr_b32 s39, s81, 16 -; SI-NEXT: v_readlane_b32 s81, v46, 57 -; SI-NEXT: v_readlane_b32 s76, v46, 56 -; SI-NEXT: v_readlane_b32 s21, v46, 55 -; SI-NEXT: v_readlane_b32 s98, v46, 54 -; SI-NEXT: s_lshr_b32 s49, s82, 16 -; SI-NEXT: s_mov_b32 s82, s94 -; SI-NEXT: v_readlane_b32 s71, v46, 48 -; SI-NEXT: v_readlane_b32 s78, v46, 52 -; SI-NEXT: s_mov_b32 s55, s85 -; SI-NEXT: v_readlane_b32 s97, v46, 62 -; SI-NEXT: v_readlane_b32 s94, v46, 61 -; SI-NEXT: v_readlane_b32 s67, v46, 60 -; SI-NEXT: v_readlane_b32 s65, v46, 59 -; SI-NEXT: v_readlane_b32 s22, v46, 58 -; SI-NEXT: s_lshr_b32 s51, s87, 16 -; SI-NEXT: s_mov_b32 s70, s23 -; SI-NEXT: s_mov_b32 s23, s24 -; SI-NEXT: v_readlane_b32 s24, v46, 45 -; SI-NEXT: s_mov_b32 s87, s25 -; SI-NEXT: s_mov_b32 s25, s26 -; SI-NEXT: s_mov_b32 s26, s27 -; SI-NEXT: s_mov_b32 s27, s28 -; SI-NEXT: s_mov_b32 s28, s92 -; SI-NEXT: s_lshr_b32 s53, s96, 16 -; SI-NEXT: s_mov_b32 s96, s90 -; SI-NEXT: s_mov_b32 s90, s79 -; SI-NEXT: s_mov_b32 s79, s31 -; SI-NEXT: s_mov_b32 s31, s35 -; SI-NEXT: s_mov_b32 s35, s37 -; SI-NEXT: s_mov_b32 s37, s19 -; SI-NEXT: s_mov_b32 s19, s20 -; SI-NEXT: v_readlane_b32 s20, v46, 51 -; SI-NEXT: s_lshr_b32 s92, s83, 16 -; SI-NEXT: s_mov_b32 s83, s16 -; SI-NEXT: v_readlane_b32 s16, v46, 49 +; SI-NEXT: s_or_b32 s95, s28, s22 +; SI-NEXT: s_and_b32 s22, s94, 0xff +; SI-NEXT: s_lshl_b32 s28, s42, 8 +; SI-NEXT: s_or_b32 s74, s5, vcc_lo +; SI-NEXT: v_readlane_b32 s5, v47, 54 +; SI-NEXT: s_or_b32 s31, s22, s28 +; SI-NEXT: s_and_b32 s22, s85, 0xff +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s19, 24 +; SI-NEXT: s_or_b32 s72, s5, s68 +; SI-NEXT: v_readlane_b32 s5, v47, 56 +; SI-NEXT: s_or_b32 s92, s28, s22 +; SI-NEXT: s_and_b32 s22, s60, 0xff +; SI-NEXT: s_lshl_b32 s28, s49, 8 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s93, s22, s28 +; SI-NEXT: s_and_b32 s22, s87, 0xff +; SI-NEXT: s_or_b32 s62, s5, s70 +; SI-NEXT: v_readlane_b32 s5, v47, 58 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s83, 24 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s19, s28, s22 +; SI-NEXT: s_and_b32 s22, s97, 0xff +; SI-NEXT: s_lshl_b32 s28, s25, 8 +; SI-NEXT: s_or_b32 s60, s5, s80 +; SI-NEXT: s_and_b32 s5, s13, 0xffff +; SI-NEXT: s_or_b32 s64, s22, s28 +; SI-NEXT: s_and_b32 s22, s66, 0xff +; SI-NEXT: s_or_b32 s58, s5, s82 +; SI-NEXT: s_and_b32 s5, s15, 0xffff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s81, 24 +; SI-NEXT: s_or_b32 s56, s5, s84 +; SI-NEXT: s_and_b32 s5, s11, 0xffff +; SI-NEXT: s_or_b32 s25, s28, s22 +; SI-NEXT: s_and_b32 s22, s46, 0xff +; SI-NEXT: s_or_b32 s46, s5, s86 +; SI-NEXT: s_and_b32 s5, s9, 0xffff +; SI-NEXT: s_or_b32 s44, s5, s96 +; SI-NEXT: s_and_b32 s5, s7, 0xffff +; SI-NEXT: s_or_b32 s42, s5, s98 +; SI-NEXT: s_and_b32 s5, s76, 0xffff +; SI-NEXT: s_or_b32 s76, s5, s40 +; SI-NEXT: s_and_b32 s5, vcc_hi, 0xffff +; SI-NEXT: s_or_b32 s50, s5, s14 +; SI-NEXT: s_and_b32 s5, s52, 0xffff +; SI-NEXT: s_or_b32 s52, s5, s12 +; SI-NEXT: s_and_b32 s5, s54, 0xffff +; SI-NEXT: s_or_b32 s54, s5, s10 +; SI-NEXT: s_and_b32 s5, s34, 0xffff +; SI-NEXT: s_or_b32 s94, s5, s8 +; SI-NEXT: s_and_b32 s5, s30, 0xffff +; SI-NEXT: s_or_b32 s30, s5, s6 +; SI-NEXT: s_and_b32 s5, s41, 0xffff +; SI-NEXT: s_or_b32 s34, s5, s4 +; SI-NEXT: s_and_b32 s5, s69, 0xffff +; SI-NEXT: s_or_b32 vcc_hi, s5, s51 +; SI-NEXT: s_and_b32 s5, s71, 0xffff +; SI-NEXT: s_or_b32 s69, s5, s27 +; SI-NEXT: s_and_b32 s5, s61, 0xffff +; SI-NEXT: s_or_b32 s71, s5, s16 +; SI-NEXT: s_and_b32 s5, s73, 0xffff +; SI-NEXT: s_or_b32 s81, s5, s43 +; SI-NEXT: s_and_b32 s5, s77, 0xffff +; SI-NEXT: v_readlane_b32 s20, v46, 8 +; SI-NEXT: s_or_b32 s83, s5, s47 +; SI-NEXT: s_and_b32 s5, s21, 0xffff +; SI-NEXT: s_lshl_b32 s28, s20, 8 +; SI-NEXT: v_readlane_b32 s20, v46, 5 +; SI-NEXT: s_or_b32 s85, s5, s59 +; SI-NEXT: s_and_b32 s5, s37, 0xffff +; SI-NEXT: s_or_b32 s45, s22, s28 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: v_readlane_b32 s20, v46, 2 +; SI-NEXT: s_or_b32 s87, s5, s63 +; SI-NEXT: s_lshl_b32 s28, s20, 24 +; SI-NEXT: s_lshr_b64 s[20:21], s[86:87], 16 +; SI-NEXT: s_and_b32 s5, s65, 0xffff +; SI-NEXT: s_mov_b32 s26, s97 +; SI-NEXT: v_writelane_b32 v47, s20, 50 +; SI-NEXT: s_or_b32 s97, s5, s75 +; SI-NEXT: s_and_b32 s5, s36, 0xffff +; SI-NEXT: v_writelane_b32 v47, s21, 51 +; SI-NEXT: s_lshr_b64 s[20:21], s[96:97], 16 +; SI-NEXT: s_or_b32 s99, s5, s55 +; SI-NEXT: s_and_b32 s5, s35, 0xffff +; SI-NEXT: v_writelane_b32 v47, s20, 52 +; SI-NEXT: s_or_b32 s41, s5, s57 +; SI-NEXT: s_and_b32 s5, s17, 0xffff +; SI-NEXT: s_mov_b32 s18, s66 +; SI-NEXT: v_writelane_b32 v47, s21, 53 +; SI-NEXT: s_lshr_b64 s[66:67], s[40:41], 16 +; SI-NEXT: s_or_b32 s15, s5, s88 +; SI-NEXT: s_and_b32 s5, s89, 0xffff +; SI-NEXT: v_writelane_b32 v47, s66, 54 +; SI-NEXT: s_or_b32 s13, s5, s95 +; SI-NEXT: v_writelane_b32 v47, s67, 55 +; SI-NEXT: s_lshr_b64 s[20:21], s[12:13], 16 +; SI-NEXT: s_and_b32 s5, s31, 0xffff +; SI-NEXT: v_writelane_b32 v47, s20, 56 +; SI-NEXT: s_or_b32 s11, s5, s92 +; SI-NEXT: v_writelane_b32 v47, s21, 57 +; SI-NEXT: s_lshr_b64 s[20:21], s[10:11], 16 +; SI-NEXT: s_and_b32 s5, s93, 0xffff +; SI-NEXT: v_writelane_b32 v47, s20, 58 +; SI-NEXT: s_or_b32 s9, s5, s19 +; SI-NEXT: v_writelane_b32 v47, s21, 59 +; SI-NEXT: s_lshr_b64 s[20:21], s[8:9], 16 +; SI-NEXT: s_and_b32 s5, s64, 0xffff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: v_writelane_b32 v47, s20, 60 +; SI-NEXT: s_or_b32 s7, s5, s25 +; SI-NEXT: s_or_b32 s53, s28, s22 +; SI-NEXT: v_writelane_b32 v47, s21, 61 +; SI-NEXT: s_lshr_b64 s[20:21], s[6:7], 16 +; SI-NEXT: s_and_b32 s5, s45, 0xffff +; SI-NEXT: s_lshr_b64 s[22:23], vcc, 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[98:99], 16 +; SI-NEXT: v_writelane_b32 v47, s20, 62 +; SI-NEXT: s_or_b32 s5, s5, s53 +; SI-NEXT: s_lshr_b64 s[28:29], s[68:69], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[70:71], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[80:81], 16 +; SI-NEXT: v_readlane_b32 s80, v46, 4 +; SI-NEXT: s_lshr_b64 s[38:39], s[82:83], 16 +; SI-NEXT: s_lshr_b64 s[48:49], s[84:85], 16 +; SI-NEXT: v_readlane_b32 s98, v46, 10 +; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 16 +; SI-NEXT: v_writelane_b32 v47, s21, 63 +; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16 +; SI-NEXT: s_lshr_b32 s8, s51, 16 +; SI-NEXT: s_lshr_b32 s10, s27, 16 +; SI-NEXT: s_lshr_b32 s12, s16, 16 +; SI-NEXT: s_lshr_b32 s14, s43, 16 +; SI-NEXT: s_lshr_b32 s21, s47, 16 +; SI-NEXT: s_lshr_b32 s40, s59, 16 +; SI-NEXT: s_lshr_b32 s17, s63, 16 +; SI-NEXT: s_lshr_b32 s89, s75, 16 +; SI-NEXT: s_lshr_b32 s23, s55, 16 +; SI-NEXT: s_lshr_b32 s93, s57, 16 +; SI-NEXT: s_lshr_b32 s16, s88, 16 +; SI-NEXT: s_lshr_b32 s88, s95, 16 +; SI-NEXT: s_lshr_b32 s92, s92, 16 +; SI-NEXT: s_lshr_b32 s37, s19, 16 +; SI-NEXT: s_lshr_b32 s27, s25, 16 +; SI-NEXT: s_lshr_b32 s6, s53, 16 +; SI-NEXT: s_mov_b32 s75, vcc_hi +; SI-NEXT: s_mov_b32 s73, s69 +; SI-NEXT: s_mov_b32 s63, s71 +; SI-NEXT: s_mov_b32 s61, s81 +; SI-NEXT: s_mov_b32 s59, s83 +; SI-NEXT: v_readlane_b32 s96, v46, 3 +; SI-NEXT: s_mov_b32 s57, s85 +; SI-NEXT: v_readlane_b32 s84, v46, 7 +; SI-NEXT: s_mov_b32 s68, s24 +; SI-NEXT: v_readlane_b32 s24, v46, 0 +; SI-NEXT: s_mov_b32 s47, s87 +; SI-NEXT: s_mov_b32 s45, s97 +; SI-NEXT: v_readlane_b32 s86, v46, 9 +; SI-NEXT: s_mov_b32 s43, s99 +; SI-NEXT: v_readlane_b32 s82, v46, 6 +; SI-NEXT: v_readlane_b32 s70, v46, 1 +; SI-NEXT: s_mov_b32 s77, s41 +; SI-NEXT: s_mov_b32 s51, s15 +; SI-NEXT: v_readlane_b32 s15, v46, 8 +; SI-NEXT: s_mov_b32 s53, s13 +; SI-NEXT: v_readlane_b32 s13, v46, 5 +; SI-NEXT: s_mov_b32 s55, s11 +; SI-NEXT: v_readlane_b32 s11, v46, 2 +; SI-NEXT: s_mov_b32 s95, s9 +; SI-NEXT: s_mov_b32 s31, s7 +; SI-NEXT: s_mov_b32 s35, s5 ; SI-NEXT: s_cbranch_execnz .LBB93_3 ; SI-NEXT: .LBB93_2: ; %cmp.true -; SI-NEXT: v_readlane_b32 s4, v46, 11 -; SI-NEXT: s_add_i32 s85, s4, 3 -; SI-NEXT: v_readlane_b32 s5, v46, 6 -; SI-NEXT: v_readlane_b32 s6, v47, 60 -; SI-NEXT: s_and_b32 s4, s85, 0xff +; SI-NEXT: v_readlane_b32 s4, v47, 32 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v47, 26 +; SI-NEXT: v_readlane_b32 s6, v47, 17 +; SI-NEXT: s_and_b32 s4, s4, 0xff ; SI-NEXT: s_lshl_b32 s5, s5, 8 ; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: v_readlane_b32 s5, v47, 58 +; SI-NEXT: v_readlane_b32 s5, v47, 48 ; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_lshl_b32 s5, s5, 24 ; SI-NEXT: s_lshl_b32 s6, s6, 16 @@ -172713,699 +172818,715 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s5, s17, 3 +; SI-NEXT: v_readlane_b32 s5, v47, 7 +; SI-NEXT: s_add_i32 s5, s5, 3 ; SI-NEXT: s_and_b32 s5, s5, 0xff -; SI-NEXT: s_lshl_b32 s6, s99, 8 -; SI-NEXT: s_add_i32 s7, s86, 3 +; SI-NEXT: s_lshl_b32 s6, s15, 8 +; SI-NEXT: s_add_i32 s7, s13, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 ; SI-NEXT: s_and_b32 s7, s7, 0xff -; SI-NEXT: s_lshl_b32 s6, s83, 24 +; SI-NEXT: s_lshl_b32 s6, s11, 24 ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_addk_i32 s5, 0x300 ; SI-NEXT: s_or_b32 s6, s6, s7 ; SI-NEXT: s_and_b32 s5, s5, 0xffff ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: v_readlane_b32 s6, v46, 20 +; SI-NEXT: v_readlane_b32 s6, v47, 42 ; SI-NEXT: s_add_i32 s6, s6, 3 -; SI-NEXT: v_readlane_b32 s7, v46, 14 -; SI-NEXT: v_readlane_b32 s8, v46, 9 +; SI-NEXT: v_readlane_b32 s7, v47, 36 +; SI-NEXT: v_readlane_b32 s8, v47, 31 ; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 8 -; SI-NEXT: s_add_i32 s83, s8, 3 +; SI-NEXT: s_add_i32 s8, s8, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: v_readlane_b32 s7, v46, 8 -; SI-NEXT: s_and_b32 s8, s83, 0xff +; SI-NEXT: v_readlane_b32 s7, v47, 28 +; SI-NEXT: s_and_b32 s8, s8, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 24 ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_addk_i32 s6, 0x300 ; SI-NEXT: s_or_b32 s7, s7, s8 ; SI-NEXT: s_and_b32 s6, s6, 0xffff ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_add_i32 s7, s29, 3 +; SI-NEXT: s_add_i32 s34, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v47, 6 +; SI-NEXT: s_add_i32 s35, s5, 0x3000000 +; SI-NEXT: s_add_i32 s30, s6, 0x3000000 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v47, 5 +; SI-NEXT: v_readlane_b32 s6, v47, 3 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v47, 4 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s76, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v47, 2 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s82, 8 +; SI-NEXT: s_add_i32 s6, s68, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s24, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s77, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v47, 1 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v47, 0 +; SI-NEXT: v_readlane_b32 s6, v56, 62 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 63 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s42, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 61 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 60 +; SI-NEXT: v_readlane_b32 s6, v56, 56 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 57 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s43, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 59 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 58 +; SI-NEXT: v_readlane_b32 s6, v56, 54 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 55 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s44, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 53 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 52 +; SI-NEXT: v_readlane_b32 s6, v56, 48 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 49 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s45, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 51 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 50 +; SI-NEXT: v_readlane_b32 s6, v56, 46 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 47 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s46, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 45 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 44 +; SI-NEXT: v_readlane_b32 s6, v56, 42 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 43 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s47, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 18 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 17 +; SI-NEXT: v_readlane_b32 s6, v56, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 15 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s56, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 14 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 41 +; SI-NEXT: v_readlane_b32 s6, v56, 39 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 40 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s57, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 26 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 25 +; SI-NEXT: v_readlane_b32 s6, v56, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 23 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s58, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 22 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 21 +; SI-NEXT: v_readlane_b32 s6, v56, 20 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 19 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s59, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 31 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s6, v56, 30 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s84, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s80, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_add_i32 s7, s26, 3 +; SI-NEXT: v_readlane_b32 s8, v47, 11 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_and_b32 s7, s7, 0xff -; SI-NEXT: s_lshl_b32 s8, s24, 8 -; SI-NEXT: s_add_i32 s9, s19, 3 +; SI-NEXT: s_lshl_b32 s8, s8, 8 +; SI-NEXT: s_add_i32 s9, s18, 3 +; SI-NEXT: s_add_i32 s60, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 29 ; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: v_readlane_b32 s8, v47, 8 ; SI-NEXT: s_and_b32 s9, s9, 0xff -; SI-NEXT: s_lshl_b32 s8, s16, 24 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 35 +; SI-NEXT: v_readlane_b32 s6, v56, 28 +; SI-NEXT: s_lshl_b32 s8, s8, 24 ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_addk_i32 s7, 0x300 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: s_or_b32 s8, s8, s9 ; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 27 +; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: v_readlane_b32 s8, v46, 23 +; SI-NEXT: v_readlane_b32 s8, v47, 45 +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_add_i32 s8, s8, 3 -; SI-NEXT: v_readlane_b32 s9, v46, 22 -; SI-NEXT: v_readlane_b32 s10, v46, 19 +; SI-NEXT: v_readlane_b32 s9, v47, 44 +; SI-NEXT: v_readlane_b32 s10, v47, 39 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_and_b32 s8, s8, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 8 -; SI-NEXT: s_add_i32 s68, s10, 3 +; SI-NEXT: s_add_i32 s10, s10, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: v_readlane_b32 s9, v46, 16 -; SI-NEXT: s_and_b32 s10, s68, 0xff +; SI-NEXT: v_readlane_b32 s9, v47, 37 +; SI-NEXT: s_and_b32 s10, s10, 0xff +; SI-NEXT: s_add_i32 s61, s4, 0x3000000 +; SI-NEXT: s_add_i32 s4, s98, 3 ; SI-NEXT: s_lshl_b32 s9, s9, 24 ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_addk_i32 s8, 0x300 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s86, 8 +; SI-NEXT: s_add_i32 s6, s96, 3 ; SI-NEXT: s_or_b32 s9, s9, s10 ; SI-NEXT: s_and_b32 s8, s8, 0xffff +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: v_readlane_b32 s9, v46, 4 +; SI-NEXT: v_readlane_b32 s9, v47, 25 +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s70, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_add_i32 s9, s9, 3 -; SI-NEXT: v_readlane_b32 s10, v46, 0 +; SI-NEXT: v_readlane_b32 s10, v47, 19 +; SI-NEXT: v_readlane_b32 s11, v47, 14 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_and_b32 s9, s9, 0xff ; SI-NEXT: s_lshl_b32 s10, s10, 8 -; SI-NEXT: s_add_i32 s11, s28, 3 +; SI-NEXT: s_add_i32 s11, s11, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: v_readlane_b32 s10, v47, 12 ; SI-NEXT: s_and_b32 s11, s11, 0xff -; SI-NEXT: s_lshl_b32 s10, s27, 24 +; SI-NEXT: s_add_i32 s62, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 36 +; SI-NEXT: s_lshl_b32 s10, s10, 24 ; SI-NEXT: s_lshl_b32 s11, s11, 16 ; SI-NEXT: s_addk_i32 s9, 0x300 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 34 +; SI-NEXT: v_readlane_b32 s6, v56, 33 ; SI-NEXT: s_or_b32 s10, s10, s11 ; SI-NEXT: s_and_b32 s9, s9, 0xffff +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: v_readlane_b32 s10, v46, 25 -; SI-NEXT: s_add_i32 s17, s10, 3 -; SI-NEXT: v_readlane_b32 s11, v46, 24 -; SI-NEXT: v_readlane_b32 s12, v46, 21 -; SI-NEXT: s_and_b32 s10, s17, 0xff +; SI-NEXT: v_readlane_b32 s10, v47, 47 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 32 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_add_i32 s10, s10, 3 +; SI-NEXT: v_readlane_b32 s11, v47, 46 +; SI-NEXT: v_readlane_b32 s12, v47, 43 +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s10, s10, 0xff ; SI-NEXT: s_lshl_b32 s11, s11, 8 ; SI-NEXT: s_add_i32 s12, s12, 3 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: v_readlane_b32 s11, v46, 18 +; SI-NEXT: v_readlane_b32 s11, v47, 41 ; SI-NEXT: s_and_b32 s12, s12, 0xff +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_lshl_b32 s11, s11, 24 ; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_addk_i32 s10, 0x300 +; SI-NEXT: s_add_i32 s63, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 5 ; SI-NEXT: s_or_b32 s11, s11, s12 ; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 4 +; SI-NEXT: v_readlane_b32 s6, v56, 3 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: v_readlane_b32 s11, v46, 10 -; SI-NEXT: s_add_i32 s84, s11, 3 -; SI-NEXT: v_readlane_b32 s12, v46, 7 -; SI-NEXT: v_readlane_b32 s13, v46, 1 -; SI-NEXT: s_and_b32 s11, s84, 0xff +; SI-NEXT: v_readlane_b32 s11, v47, 33 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_add_i32 s11, s11, 3 +; SI-NEXT: v_readlane_b32 s12, v47, 30 +; SI-NEXT: v_readlane_b32 s13, v47, 22 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 2 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_and_b32 s11, s11, 0xff ; SI-NEXT: s_lshl_b32 s12, s12, 8 ; SI-NEXT: s_add_i32 s13, s13, 3 +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: v_readlane_b32 s12, v47, 59 +; SI-NEXT: v_readlane_b32 s12, v47, 18 ; SI-NEXT: s_and_b32 s13, s13, 0xff +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_lshl_b32 s12, s12, 24 ; SI-NEXT: s_lshl_b32 s13, s13, 16 ; SI-NEXT: s_addk_i32 s11, 0x300 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_or_b32 s12, s12, s13 ; SI-NEXT: s_and_b32 s11, s11, 0xffff +; SI-NEXT: s_add_i32 s72, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 1 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: v_readlane_b32 s12, v46, 17 -; SI-NEXT: s_add_i32 s99, s12, 3 -; SI-NEXT: v_readlane_b32 s13, v46, 15 -; SI-NEXT: v_readlane_b32 s14, v46, 12 -; SI-NEXT: s_and_b32 s12, s99, 0xff +; SI-NEXT: v_readlane_b32 s12, v47, 40 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 0 +; SI-NEXT: v_readlane_b32 s6, v56, 38 +; SI-NEXT: s_add_i32 s12, s12, 3 +; SI-NEXT: v_readlane_b32 s13, v47, 38 +; SI-NEXT: v_readlane_b32 s14, v47, 34 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_and_b32 s12, s12, 0xff ; SI-NEXT: s_lshl_b32 s13, s13, 8 -; SI-NEXT: s_add_i32 s86, s14, 3 +; SI-NEXT: s_add_i32 s14, s14, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 37 +; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: v_readlane_b32 s13, v46, 13 -; SI-NEXT: s_and_b32 s14, s86, 0xff +; SI-NEXT: v_readlane_b32 s13, v47, 35 +; SI-NEXT: s_and_b32 s14, s14, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s13, s13, 24 ; SI-NEXT: s_lshl_b32 s14, s14, 16 ; SI-NEXT: s_addk_i32 s12, 0x300 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_or_b32 s13, s13, s14 ; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: v_readlane_b32 s13, v46, 5 +; SI-NEXT: v_readlane_b32 s13, v47, 29 +; SI-NEXT: s_add_i32 s73, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 13 ; SI-NEXT: s_add_i32 s13, s13, 3 -; SI-NEXT: v_readlane_b32 s14, v46, 3 -; SI-NEXT: v_readlane_b32 s15, v47, 62 +; SI-NEXT: v_readlane_b32 s14, v47, 27 +; SI-NEXT: v_readlane_b32 s15, v47, 20 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 12 +; SI-NEXT: v_readlane_b32 s6, v56, 11 ; SI-NEXT: s_and_b32 s13, s13, 0xff ; SI-NEXT: s_lshl_b32 s14, s14, 8 ; SI-NEXT: s_add_i32 s15, s15, 3 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: v_readlane_b32 s14, v47, 63 +; SI-NEXT: v_readlane_b32 s14, v47, 21 ; SI-NEXT: s_and_b32 s15, s15, 0xff +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 10 +; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_lshl_b32 s14, s14, 24 ; SI-NEXT: s_lshl_b32 s15, s15, 16 ; SI-NEXT: s_addk_i32 s13, 0x300 +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_or_b32 s14, s14, s15 ; SI-NEXT: s_and_b32 s13, s13, 0xffff +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: v_readlane_b32 s14, v46, 2 +; SI-NEXT: v_readlane_b32 s14, v47, 24 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s14, s14, 3 -; SI-NEXT: v_readlane_b32 s15, v47, 61 -; SI-NEXT: v_readlane_b32 s16, v47, 56 +; SI-NEXT: v_readlane_b32 s15, v47, 23 +; SI-NEXT: v_readlane_b32 s16, v47, 15 +; SI-NEXT: s_add_i32 s74, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 9 ; SI-NEXT: s_and_b32 s14, s14, 0xff ; SI-NEXT: s_lshl_b32 s15, s15, 8 ; SI-NEXT: s_add_i32 s16, s16, 3 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 8 +; SI-NEXT: v_readlane_b32 s6, v56, 7 ; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: v_readlane_b32 s15, v47, 57 +; SI-NEXT: v_readlane_b32 s15, v47, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xff +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: s_lshl_b32 s15, s15, 24 ; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: s_addk_i32 s14, 0x300 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 6 +; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_or_b32 s15, s15, s16 ; SI-NEXT: s_and_b32 s14, s14, 0xffff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_add_i32 s15, s26, 3 +; SI-NEXT: v_readlane_b32 s15, v47, 13 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_add_i32 s15, s15, 3 +; SI-NEXT: v_readlane_b32 s16, v47, 10 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_and_b32 s15, s15, 0xff -; SI-NEXT: s_lshl_b32 s16, s25, 8 -; SI-NEXT: s_add_i32 s17, s23, 3 +; SI-NEXT: s_lshl_b32 s16, s16, 8 +; SI-NEXT: s_add_i32 s75, s4, 0x3000000 +; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 16 ; SI-NEXT: s_or_b32 s15, s16, s15 -; SI-NEXT: s_and_b32 s17, s17, 0xff -; SI-NEXT: s_lshl_b32 s16, s87, 24 -; SI-NEXT: s_lshl_b32 s17, s17, 16 +; SI-NEXT: v_readlane_b32 s16, v47, 49 +; SI-NEXT: v_readlane_b32 s18, v47, 9 +; SI-NEXT: v_writelane_b32 v47, s4, 50 +; SI-NEXT: v_writelane_b32 v47, s5, 51 +; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 16 +; SI-NEXT: v_writelane_b32 v47, s4, 52 +; SI-NEXT: v_writelane_b32 v47, s5, 53 +; SI-NEXT: s_lshr_b64 s[4:5], s[76:77], 16 +; SI-NEXT: s_add_i32 s52, s12, 0x3000000 +; SI-NEXT: s_add_i32 s53, s13, 0x3000000 +; SI-NEXT: v_writelane_b32 v47, s4, 54 +; SI-NEXT: v_writelane_b32 v47, s5, 55 +; SI-NEXT: s_lshr_b64 s[4:5], s[52:53], 16 +; SI-NEXT: s_add_i32 s20, s18, 3 +; SI-NEXT: s_add_i32 s54, s10, 0x3000000 +; SI-NEXT: s_add_i32 s55, s11, 0x3000000 +; SI-NEXT: v_writelane_b32 v47, s4, 56 +; SI-NEXT: s_and_b32 s20, s20, 0xff +; SI-NEXT: v_writelane_b32 v47, s5, 57 +; SI-NEXT: s_lshr_b64 s[4:5], s[54:55], 16 +; SI-NEXT: s_lshl_b32 s16, s16, 24 +; SI-NEXT: s_lshl_b32 s20, s20, 16 ; SI-NEXT: s_addk_i32 s15, 0x300 -; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_add_i32 s94, s8, 0x3000000 +; SI-NEXT: s_add_i32 s95, s9, 0x3000000 +; SI-NEXT: v_writelane_b32 v47, s4, 58 +; SI-NEXT: s_or_b32 s16, s16, s20 ; SI-NEXT: s_and_b32 s15, s15, 0xffff +; SI-NEXT: v_writelane_b32 v47, s5, 59 +; SI-NEXT: s_lshr_b64 s[4:5], s[94:95], 16 ; SI-NEXT: s_or_b32 s15, s16, s15 -; SI-NEXT: s_add_i32 s16, s20, 3 -; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v47, 54 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 55 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s40, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s22, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s65, 8 -; SI-NEXT: s_add_i32 s18, s94, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s67, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s41, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s71, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s81, 8 -; SI-NEXT: s_add_i32 s18, s55, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s97, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s42, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s98, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s78, 8 -; SI-NEXT: s_add_i32 s18, s31, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s35, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s43, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s82, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s37, 8 -; SI-NEXT: s_add_i32 s18, s90, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s79, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s44, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s96, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 46 -; SI-NEXT: v_readlane_b32 s18, v47, 45 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 44 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s45, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s21, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s76, 8 -; SI-NEXT: s_add_i32 s18, s70, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 50 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s46, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s80, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 49 -; SI-NEXT: v_readlane_b32 s18, v47, 48 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 47 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s47, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 18 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 17 -; SI-NEXT: v_readlane_b32 s18, v47, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 15 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s56, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 14 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 53 -; SI-NEXT: v_readlane_b32 s18, v47, 52 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 51 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s57, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 26 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 25 -; SI-NEXT: v_readlane_b32 s18, v47, 24 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 23 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s58, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 22 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 21 -; SI-NEXT: v_readlane_b32 s18, v47, 20 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 19 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s59, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 34 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 33 -; SI-NEXT: v_readlane_b32 s18, v47, 32 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 31 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s60, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 30 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 29 -; SI-NEXT: v_readlane_b32 s18, v47, 28 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 27 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s61, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s69, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 41 -; SI-NEXT: v_readlane_b32 s18, v47, 40 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 39 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s62, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 38 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 37 -; SI-NEXT: v_readlane_b32 s18, v47, 36 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 35 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s63, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 5 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 4 -; SI-NEXT: v_readlane_b32 s18, v47, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 2 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s72, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 1 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 0 -; SI-NEXT: v_readlane_b32 s18, v47, 43 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 42 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s73, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 13 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 12 -; SI-NEXT: v_readlane_b32 s18, v47, 11 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 10 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s74, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 9 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 8 -; SI-NEXT: v_readlane_b32 s18, v47, 7 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 6 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s75, s16, 0x3000000 -; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 26 -; SI-NEXT: v_writelane_b32 v46, s17, 27 -; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 28 -; SI-NEXT: v_writelane_b32 v46, s17, 29 -; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 30 -; SI-NEXT: v_writelane_b32 v46, s17, 31 -; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 32 -; SI-NEXT: v_writelane_b32 v46, s17, 33 -; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 34 -; SI-NEXT: v_writelane_b32 v46, s17, 35 -; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 36 -; SI-NEXT: v_writelane_b32 v46, s17, 37 -; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 38 -; SI-NEXT: v_writelane_b32 v46, s17, 39 -; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 16 -; SI-NEXT: s_add_i32 s10, s10, 0x3000000 -; SI-NEXT: s_add_i32 s11, s11, 0x3000000 -; SI-NEXT: s_add_i32 s12, s12, 0x3000000 -; SI-NEXT: s_add_i32 s13, s13, 0x3000000 -; SI-NEXT: s_add_i32 s14, s14, 0x3000000 -; SI-NEXT: s_add_i32 s15, s15, 0x3000000 -; SI-NEXT: v_writelane_b32 v46, s16, 40 -; SI-NEXT: s_add_i32 s4, s4, 0x3000000 -; SI-NEXT: s_add_i32 s5, s5, 0x3000000 -; SI-NEXT: s_add_i32 s6, s6, 0x3000000 -; SI-NEXT: s_add_i32 s7, s7, 0x3000000 -; SI-NEXT: s_add_i32 s8, s8, 0x3000000 -; SI-NEXT: s_add_i32 s9, s9, 0x3000000 -; SI-NEXT: v_writelane_b32 v46, s17, 41 -; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[38:39], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[48:49], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[50:51], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 42 -; SI-NEXT: s_lshr_b64 s[54:55], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[66:67], s[4:5], 16 -; SI-NEXT: s_lshr_b32 s77, s75, 16 -; SI-NEXT: s_lshr_b32 s68, s73, 16 -; SI-NEXT: s_lshr_b32 s88, s63, 16 -; SI-NEXT: s_lshr_b32 s84, s61, 16 -; SI-NEXT: s_lshr_b32 s89, s59, 16 -; SI-NEXT: s_lshr_b32 s91, s57, 16 -; SI-NEXT: s_lshr_b32 s93, s47, 16 -; SI-NEXT: s_lshr_b32 s95, s45, 16 -; SI-NEXT: s_lshr_b32 s30, s43, 16 -; SI-NEXT: s_lshr_b32 s34, s41, 16 -; SI-NEXT: s_lshr_b32 s36, s15, 16 -; SI-NEXT: s_lshr_b32 s39, s13, 16 -; SI-NEXT: s_lshr_b32 s49, s11, 16 -; SI-NEXT: s_lshr_b32 s51, s9, 16 -; SI-NEXT: s_lshr_b32 s53, s7, 16 -; SI-NEXT: s_lshr_b32 s92, s5, 16 -; SI-NEXT: v_writelane_b32 v46, s17, 43 +; SI-NEXT: s_add_i32 s31, s7, 0x3000000 +; SI-NEXT: v_writelane_b32 v47, s4, 60 +; SI-NEXT: s_add_i32 s50, s14, 0x3000000 +; SI-NEXT: s_add_i32 s51, s15, 0x3000000 +; SI-NEXT: s_lshr_b64 s[22:23], s[74:75], 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[42:43], 16 +; SI-NEXT: v_writelane_b32 v47, s5, 61 +; SI-NEXT: s_lshr_b64 s[4:5], s[30:31], 16 +; SI-NEXT: s_lshr_b64 s[28:29], s[72:73], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[62:63], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 16 +; SI-NEXT: s_lshr_b64 s[38:39], s[58:59], 16 +; SI-NEXT: s_lshr_b64 s[48:49], s[56:57], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[50:51], 16 +; SI-NEXT: v_writelane_b32 v47, s4, 62 +; SI-NEXT: s_lshr_b64 s[64:65], s[34:35], 16 +; SI-NEXT: s_lshr_b32 s8, s75, 16 +; SI-NEXT: s_lshr_b32 s10, s73, 16 +; SI-NEXT: s_lshr_b32 s12, s63, 16 +; SI-NEXT: s_lshr_b32 s14, s61, 16 +; SI-NEXT: s_lshr_b32 s21, s59, 16 +; SI-NEXT: s_lshr_b32 s40, s57, 16 +; SI-NEXT: s_lshr_b32 s17, s47, 16 +; SI-NEXT: s_lshr_b32 s89, s45, 16 +; SI-NEXT: s_lshr_b32 s23, s43, 16 +; SI-NEXT: s_lshr_b32 s93, s77, 16 +; SI-NEXT: s_lshr_b32 s16, s51, 16 +; SI-NEXT: s_lshr_b32 s88, s53, 16 +; SI-NEXT: s_lshr_b32 s92, s55, 16 +; SI-NEXT: s_lshr_b32 s37, s95, 16 +; SI-NEXT: s_lshr_b32 s27, s31, 16 +; SI-NEXT: s_lshr_b32 s6, s35, 16 +; SI-NEXT: v_writelane_b32 v47, s5, 63 ; SI-NEXT: .LBB93_3: ; %end ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; SI-NEXT: v_readlane_b32 s18, v46, 26 -; SI-NEXT: s_and_b32 s17, s74, 0xffff -; SI-NEXT: v_readlane_b32 s19, v46, 27 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s18, s75, 0xffff -; SI-NEXT: s_lshl_b32 s19, s77, 16 -; SI-NEXT: v_readlane_b32 s20, v46, 28 -; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_and_b32 s19, s72, 0xffff -; SI-NEXT: v_readlane_b32 s21, v46, 29 -; SI-NEXT: s_lshl_b32 s20, s20, 16 -; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_and_b32 s20, s73, 0xffff -; SI-NEXT: s_lshl_b32 s21, s68, 16 -; SI-NEXT: v_readlane_b32 s22, v46, 30 -; SI-NEXT: s_or_b32 s20, s20, s21 -; SI-NEXT: s_and_b32 s21, s62, 0xffff -; SI-NEXT: v_readlane_b32 s23, v46, 31 -; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: s_or_b32 s21, s21, s22 -; SI-NEXT: s_and_b32 s22, s63, 0xffff -; SI-NEXT: s_lshl_b32 s23, s88, 16 -; SI-NEXT: v_readlane_b32 s24, v46, 32 -; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_and_b32 s23, s60, 0xffff -; SI-NEXT: v_readlane_b32 s25, v46, 33 -; SI-NEXT: s_lshl_b32 s24, s24, 16 -; SI-NEXT: s_or_b32 s23, s23, s24 -; SI-NEXT: s_and_b32 s24, s61, 0xffff -; SI-NEXT: s_lshl_b32 s25, s84, 16 -; SI-NEXT: v_readlane_b32 s26, v46, 34 +; SI-NEXT: s_and_b32 s4, s74, 0xffff +; SI-NEXT: s_lshl_b32 s5, s22, 16 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s75, 0xffff +; SI-NEXT: s_lshl_b32 s7, s8, 16 +; SI-NEXT: s_or_b32 s5, s5, s7 +; SI-NEXT: s_and_b32 s7, s72, 0xffff +; SI-NEXT: s_lshl_b32 s8, s28, 16 +; SI-NEXT: s_or_b32 s7, s7, s8 +; SI-NEXT: s_and_b32 s8, s73, 0xffff +; SI-NEXT: s_lshl_b32 s9, s10, 16 +; SI-NEXT: s_or_b32 s8, s8, s9 +; SI-NEXT: s_and_b32 s9, s62, 0xffff +; SI-NEXT: s_lshl_b32 s10, s78, 16 +; SI-NEXT: s_or_b32 s9, s9, s10 +; SI-NEXT: s_and_b32 s10, s63, 0xffff +; SI-NEXT: s_lshl_b32 s11, s12, 16 +; SI-NEXT: s_or_b32 s10, s10, s11 +; SI-NEXT: s_and_b32 s11, s60, 0xffff +; SI-NEXT: s_lshl_b32 s12, s90, 16 +; SI-NEXT: s_or_b32 s11, s11, s12 +; SI-NEXT: s_and_b32 s12, s61, 0xffff +; SI-NEXT: s_lshl_b32 s13, s14, 16 +; SI-NEXT: s_or_b32 s12, s12, s13 +; SI-NEXT: s_and_b32 s13, s58, 0xffff +; SI-NEXT: s_lshl_b32 s14, s38, 16 +; SI-NEXT: s_or_b32 s13, s13, s14 +; SI-NEXT: s_and_b32 s14, s59, 0xffff +; SI-NEXT: s_lshl_b32 s15, s21, 16 +; SI-NEXT: s_or_b32 s14, s14, s15 +; SI-NEXT: s_and_b32 s15, s56, 0xffff +; SI-NEXT: s_lshl_b32 s24, s48, 16 +; SI-NEXT: s_or_b32 s15, s15, s24 +; SI-NEXT: s_and_b32 s24, s57, 0xffff +; SI-NEXT: s_lshl_b32 s25, s40, 16 +; SI-NEXT: v_readlane_b32 s18, v47, 50 ; SI-NEXT: s_or_b32 s24, s24, s25 -; SI-NEXT: s_and_b32 s25, s58, 0xffff -; SI-NEXT: v_readlane_b32 s27, v46, 35 -; SI-NEXT: s_lshl_b32 s26, s26, 16 -; SI-NEXT: s_or_b32 s25, s25, s26 -; SI-NEXT: s_and_b32 s26, s59, 0xffff -; SI-NEXT: s_lshl_b32 s27, s89, 16 -; SI-NEXT: v_readlane_b32 s28, v46, 36 -; SI-NEXT: s_or_b32 s26, s26, s27 -; SI-NEXT: s_and_b32 s27, s56, 0xffff -; SI-NEXT: v_readlane_b32 s29, v46, 37 -; SI-NEXT: s_lshl_b32 s28, s28, 16 -; SI-NEXT: s_or_b32 s27, s27, s28 -; SI-NEXT: s_and_b32 s28, s57, 0xffff -; SI-NEXT: s_lshl_b32 s29, s91, 16 -; SI-NEXT: v_readlane_b32 s56, v46, 38 -; SI-NEXT: s_or_b32 s28, s28, s29 -; SI-NEXT: s_and_b32 s29, s46, 0xffff -; SI-NEXT: v_readlane_b32 s57, v46, 39 -; SI-NEXT: s_lshl_b32 s46, s56, 16 -; SI-NEXT: s_or_b32 s29, s29, s46 -; SI-NEXT: s_and_b32 s46, s47, 0xffff +; SI-NEXT: s_and_b32 s25, s46, 0xffff +; SI-NEXT: v_readlane_b32 s19, v47, 51 +; SI-NEXT: s_lshl_b32 s40, s18, 16 +; SI-NEXT: s_or_b32 s25, s25, s40 +; SI-NEXT: s_and_b32 s40, s47, 0xffff +; SI-NEXT: s_lshl_b32 s41, s17, 16 +; SI-NEXT: v_readlane_b32 s18, v47, 52 +; SI-NEXT: s_or_b32 s40, s40, s41 +; SI-NEXT: s_and_b32 s41, s44, 0xffff +; SI-NEXT: s_lshl_b32 s44, s18, 16 +; SI-NEXT: s_or_b32 s41, s41, s44 +; SI-NEXT: s_and_b32 s44, s45, 0xffff +; SI-NEXT: s_lshl_b32 s45, s89, 16 +; SI-NEXT: v_readlane_b32 s19, v47, 53 +; SI-NEXT: s_or_b32 s44, s44, s45 +; SI-NEXT: s_and_b32 s42, s42, 0xffff +; SI-NEXT: s_lshl_b32 s45, s36, 16 +; SI-NEXT: s_or_b32 s42, s42, s45 +; SI-NEXT: s_and_b32 s43, s43, 0xffff +; SI-NEXT: s_lshl_b32 s45, s23, 16 +; SI-NEXT: v_readlane_b32 s18, v47, 54 +; SI-NEXT: s_or_b32 s43, s43, s45 +; SI-NEXT: s_and_b32 s45, s76, 0xffff +; SI-NEXT: s_lshl_b32 s46, s18, 16 +; SI-NEXT: s_or_b32 s45, s45, s46 +; SI-NEXT: s_and_b32 s46, s77, 0xffff ; SI-NEXT: s_lshl_b32 s47, s93, 16 -; SI-NEXT: v_readlane_b32 s56, v46, 40 ; SI-NEXT: s_or_b32 s46, s46, s47 -; SI-NEXT: s_and_b32 s44, s44, 0xffff -; SI-NEXT: v_readlane_b32 s57, v46, 41 -; SI-NEXT: s_lshl_b32 s47, s56, 16 -; SI-NEXT: s_or_b32 s44, s44, s47 -; SI-NEXT: s_and_b32 s45, s45, 0xffff -; SI-NEXT: s_lshl_b32 s47, s95, 16 -; SI-NEXT: v_readlane_b32 s56, v46, 42 -; SI-NEXT: s_or_b32 s45, s45, s47 -; SI-NEXT: s_and_b32 s42, s42, 0xffff +; SI-NEXT: s_and_b32 s22, s50, 0xffff +; SI-NEXT: s_lshl_b32 s47, s66, 16 +; SI-NEXT: s_or_b32 s22, s22, s47 +; SI-NEXT: s_and_b32 s23, s51, 0xffff +; SI-NEXT: s_lshl_b32 s47, s16, 16 +; SI-NEXT: v_readlane_b32 s16, v47, 56 +; SI-NEXT: s_or_b32 s23, s23, s47 +; SI-NEXT: s_and_b32 s20, s52, 0xffff +; SI-NEXT: v_readlane_b32 s17, v47, 57 +; SI-NEXT: s_lshl_b32 s47, s16, 16 +; SI-NEXT: s_or_b32 s20, s20, s47 +; SI-NEXT: s_and_b32 s21, s53, 0xffff +; SI-NEXT: s_lshl_b32 s47, s88, 16 +; SI-NEXT: v_readlane_b32 s16, v47, 58 +; SI-NEXT: v_readlane_b32 s19, v47, 55 +; SI-NEXT: s_or_b32 s21, s21, s47 +; SI-NEXT: s_and_b32 s18, s54, 0xffff +; SI-NEXT: s_lshl_b32 s47, s16, 16 +; SI-NEXT: s_or_b32 s18, s18, s47 +; SI-NEXT: s_and_b32 s19, s55, 0xffff +; SI-NEXT: s_lshl_b32 s47, s92, 16 +; SI-NEXT: v_readlane_b32 s28, v47, 60 +; SI-NEXT: v_readlane_b32 s17, v47, 59 +; SI-NEXT: s_or_b32 s19, s19, s47 +; SI-NEXT: s_and_b32 s16, s94, 0xffff +; SI-NEXT: s_lshl_b32 s47, s28, 16 +; SI-NEXT: s_or_b32 s16, s16, s47 +; SI-NEXT: s_and_b32 s17, s95, 0xffff +; SI-NEXT: s_lshl_b32 s47, s37, 16 +; SI-NEXT: v_readlane_b32 s56, v47, 62 +; SI-NEXT: v_readlane_b32 s29, v47, 61 +; SI-NEXT: s_or_b32 s17, s17, s47 +; SI-NEXT: s_and_b32 s28, s30, 0xffff ; SI-NEXT: s_lshl_b32 s47, s56, 16 -; SI-NEXT: s_or_b32 s42, s42, s47 -; SI-NEXT: s_and_b32 s43, s43, 0xffff -; SI-NEXT: s_lshl_b32 s47, s30, 16 -; SI-NEXT: s_or_b32 s43, s43, s47 -; SI-NEXT: s_and_b32 s40, s40, 0xffff -; SI-NEXT: s_lshl_b32 s47, s38, 16 -; SI-NEXT: s_or_b32 s40, s40, s47 -; SI-NEXT: s_and_b32 s41, s41, 0xffff -; SI-NEXT: s_lshl_b32 s47, s34, 16 -; SI-NEXT: s_or_b32 s41, s41, s47 -; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s47, s48, 16 -; SI-NEXT: s_or_b32 s14, s14, s47 -; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s47, s36, 16 -; SI-NEXT: s_or_b32 s15, s15, s47 -; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s47, s50, 16 -; SI-NEXT: s_or_b32 s12, s12, s47 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s47, s39, 16 -; SI-NEXT: s_or_b32 s13, s13, s47 -; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s47, s52, 16 -; SI-NEXT: s_or_b32 s10, s10, s47 -; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s47, s49, 16 -; SI-NEXT: s_or_b32 s11, s11, s47 -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s47, s54, 16 -; SI-NEXT: s_or_b32 s8, s8, s47 -; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s47, s51, 16 -; SI-NEXT: s_or_b32 s9, s9, s47 -; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_or_b32 s28, s28, s47 +; SI-NEXT: s_and_b32 s29, s31, 0xffff +; SI-NEXT: s_lshl_b32 s47, s27, 16 +; SI-NEXT: s_or_b32 s29, s29, s47 +; SI-NEXT: s_and_b32 s26, s34, 0xffff ; SI-NEXT: s_lshl_b32 s47, s64, 16 -; SI-NEXT: s_or_b32 s6, s6, s47 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s47, s53, 16 -; SI-NEXT: s_or_b32 s7, s7, s47 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s47, s66, 16 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s16, s92, 16 -; SI-NEXT: s_or_b32 s4, s4, s47 -; SI-NEXT: s_or_b32 s5, s5, s16 +; SI-NEXT: s_and_b32 s27, s35, 0xffff +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_or_b32 s26, s26, s47 +; SI-NEXT: s_or_b32 s6, s27, s6 ; SI-NEXT: v_readlane_b32 s30, v45, 34 -; SI-NEXT: v_readlane_b32 s57, v46, 43 -; SI-NEXT: v_mov_b32_e32 v0, s17 -; SI-NEXT: v_mov_b32_e32 v1, s18 -; SI-NEXT: v_mov_b32_e32 v2, s19 -; SI-NEXT: v_mov_b32_e32 v3, s20 -; SI-NEXT: v_mov_b32_e32 v4, s21 -; SI-NEXT: v_mov_b32_e32 v5, s22 -; SI-NEXT: v_mov_b32_e32 v6, s23 -; SI-NEXT: v_mov_b32_e32 v7, s24 -; SI-NEXT: v_mov_b32_e32 v8, s25 -; SI-NEXT: v_mov_b32_e32 v9, s26 -; SI-NEXT: v_mov_b32_e32 v10, s27 -; SI-NEXT: v_mov_b32_e32 v11, s28 -; SI-NEXT: v_mov_b32_e32 v12, s29 -; SI-NEXT: v_mov_b32_e32 v13, s46 -; SI-NEXT: v_mov_b32_e32 v14, s44 -; SI-NEXT: v_mov_b32_e32 v15, s45 +; SI-NEXT: v_readlane_b32 s57, v47, 63 +; SI-NEXT: v_mov_b32_e32 v0, s4 +; SI-NEXT: v_mov_b32_e32 v1, s5 +; SI-NEXT: v_mov_b32_e32 v2, s7 +; SI-NEXT: v_mov_b32_e32 v3, s8 +; SI-NEXT: v_mov_b32_e32 v4, s9 +; SI-NEXT: v_mov_b32_e32 v5, s10 +; SI-NEXT: v_mov_b32_e32 v6, s11 +; SI-NEXT: v_mov_b32_e32 v7, s12 +; SI-NEXT: v_mov_b32_e32 v8, s13 +; SI-NEXT: v_mov_b32_e32 v9, s14 +; SI-NEXT: v_mov_b32_e32 v10, s15 +; SI-NEXT: v_mov_b32_e32 v11, s24 +; SI-NEXT: v_mov_b32_e32 v12, s25 +; SI-NEXT: v_mov_b32_e32 v13, s40 +; SI-NEXT: v_mov_b32_e32 v14, s41 +; SI-NEXT: v_mov_b32_e32 v15, s44 ; SI-NEXT: v_mov_b32_e32 v16, s42 ; SI-NEXT: v_mov_b32_e32 v17, s43 -; SI-NEXT: v_mov_b32_e32 v18, s40 -; SI-NEXT: v_mov_b32_e32 v19, s41 -; SI-NEXT: v_mov_b32_e32 v20, s14 -; SI-NEXT: v_mov_b32_e32 v21, s15 -; SI-NEXT: v_mov_b32_e32 v22, s12 -; SI-NEXT: v_mov_b32_e32 v23, s13 -; SI-NEXT: v_mov_b32_e32 v24, s10 -; SI-NEXT: v_mov_b32_e32 v25, s11 -; SI-NEXT: v_mov_b32_e32 v26, s8 -; SI-NEXT: v_mov_b32_e32 v27, s9 -; SI-NEXT: v_mov_b32_e32 v28, s6 -; SI-NEXT: v_mov_b32_e32 v29, s7 -; SI-NEXT: v_mov_b32_e32 v30, s4 -; SI-NEXT: v_mov_b32_e32 v31, s5 +; SI-NEXT: v_mov_b32_e32 v18, s45 +; SI-NEXT: v_mov_b32_e32 v19, s46 +; SI-NEXT: v_mov_b32_e32 v20, s22 +; SI-NEXT: v_mov_b32_e32 v21, s23 +; SI-NEXT: v_mov_b32_e32 v22, s20 +; SI-NEXT: v_mov_b32_e32 v23, s21 +; SI-NEXT: v_mov_b32_e32 v24, s18 +; SI-NEXT: v_mov_b32_e32 v25, s19 +; SI-NEXT: v_mov_b32_e32 v26, s16 +; SI-NEXT: v_mov_b32_e32 v27, s17 +; SI-NEXT: v_mov_b32_e32 v28, s28 +; SI-NEXT: v_mov_b32_e32 v29, s29 +; SI-NEXT: v_mov_b32_e32 v30, s26 +; SI-NEXT: v_mov_b32_e32 v31, s6 ; SI-NEXT: v_readlane_b32 s31, v45, 35 ; SI-NEXT: v_readlane_b32 s99, v45, 33 ; SI-NEXT: v_readlane_b32 s98, v45, 32 @@ -173445,76 +173566,75 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB93_4: ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 26 -; SI-NEXT: v_writelane_b32 v46, s5, 27 +; SI-NEXT: s_mov_b32 s26, s97 +; SI-NEXT: v_writelane_b32 v47, s4, 50 +; SI-NEXT: v_writelane_b32 v47, s5, 51 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: s_mov_b32 s18, s66 +; SI-NEXT: v_writelane_b32 v47, s4, 52 +; SI-NEXT: v_writelane_b32 v47, s5, 53 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr77 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr68 +; SI-NEXT: ; implicit-def: $sgpr28 +; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr12 ; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr84 +; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr89 +; SI-NEXT: ; implicit-def: $sgpr38 +; SI-NEXT: ; implicit-def: $sgpr21 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr91 +; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr93 +; SI-NEXT: ; implicit-def: $sgpr17 ; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr95 +; SI-NEXT: ; implicit-def: $sgpr89 ; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr30 -; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr48 ; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr23 +; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: ; implicit-def: $sgpr93 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr16 ; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr49 -; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr88 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr51 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr66 ; SI-NEXT: ; implicit-def: $sgpr92 -; SI-NEXT: v_writelane_b32 v46, s4, 28 -; SI-NEXT: v_writelane_b32 v46, s5, 29 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 30 -; SI-NEXT: v_writelane_b32 v46, s5, 31 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 32 -; SI-NEXT: v_writelane_b32 v46, s5, 33 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 34 -; SI-NEXT: v_writelane_b32 v46, s5, 35 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 36 -; SI-NEXT: v_writelane_b32 v46, s5, 37 +; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr37 +; SI-NEXT: ; implicit-def: $sgpr30 +; SI-NEXT: ; implicit-def: $sgpr27 +; SI-NEXT: ; implicit-def: $sgpr34 +; SI-NEXT: ; implicit-def: $sgpr64 +; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: v_writelane_b32 v47, s4, 54 +; SI-NEXT: v_writelane_b32 v47, s5, 55 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 38 -; SI-NEXT: v_writelane_b32 v46, s5, 39 +; SI-NEXT: v_writelane_b32 v47, s4, 56 +; SI-NEXT: v_writelane_b32 v47, s5, 57 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 40 -; SI-NEXT: v_writelane_b32 v46, s5, 41 +; SI-NEXT: v_writelane_b32 v47, s4, 58 +; SI-NEXT: v_writelane_b32 v47, s5, 59 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 42 -; SI-NEXT: v_writelane_b32 v46, s5, 43 +; SI-NEXT: v_writelane_b32 v47, s4, 60 +; SI-NEXT: v_writelane_b32 v47, s5, 61 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v47, s4, 62 +; SI-NEXT: v_writelane_b32 v47, s5, 63 ; SI-NEXT: s_branch .LBB93_2 ; ; VI-LABEL: bitcast_v128i8_to_v64f16_scalar: @@ -173536,17 +173656,40 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_readfirstlane_b32 s63, v12 +; VI-NEXT: v_readfirstlane_b32 s62, v15 +; VI-NEXT: v_readfirstlane_b32 s74, v14 +; VI-NEXT: v_readfirstlane_b32 s57, v13 ; VI-NEXT: v_readfirstlane_b32 s8, v0 -; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:280 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276 +; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:8 +; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328 +; VI-NEXT: v_readfirstlane_b32 s63, v12 ; VI-NEXT: v_readfirstlane_b32 s45, v11 +; VI-NEXT: v_readfirstlane_b32 s41, v9 +; VI-NEXT: v_readfirstlane_b32 s46, v8 +; VI-NEXT: v_readfirstlane_b32 s13, v7 ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332 -; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:12 -; VI-NEXT: v_readfirstlane_b32 s59, v29 -; VI-NEXT: v_readfirstlane_b32 s47, v27 +; VI-NEXT: v_readfirstlane_b32 s42, v6 +; VI-NEXT: v_readfirstlane_b32 s10, v5 +; VI-NEXT: v_readfirstlane_b32 s14, v4 +; VI-NEXT: v_readfirstlane_b32 s7, v3 +; VI-NEXT: v_readfirstlane_b32 s11, v2 +; VI-NEXT: v_readfirstlane_b32 s6, v1 +; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 +; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:316 +; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:312 +; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:308 +; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:304 +; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:300 +; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:296 +; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:292 +; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:288 +; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:284 ; VI-NEXT: v_readfirstlane_b32 s75, v30 +; VI-NEXT: v_readfirstlane_b32 s59, v29 ; VI-NEXT: v_readfirstlane_b32 s72, v28 +; VI-NEXT: v_readfirstlane_b32 s47, v27 ; VI-NEXT: v_readfirstlane_b32 s60, v26 ; VI-NEXT: v_readfirstlane_b32 s43, v25 ; VI-NEXT: v_readfirstlane_b32 s56, v24 @@ -173554,250 +173697,247 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; VI-NEXT: v_readfirstlane_b32 s44, v22 ; VI-NEXT: v_readfirstlane_b32 s12, v21 ; VI-NEXT: v_readfirstlane_b32 s40, v20 -; VI-NEXT: v_readfirstlane_b32 s76, v18 -; VI-NEXT: v_readfirstlane_b32 s73, v16 ; VI-NEXT: v_readfirstlane_b32 s9, v19 +; VI-NEXT: v_readfirstlane_b32 s76, v18 ; VI-NEXT: v_readfirstlane_b32 s61, v17 -; VI-NEXT: v_readfirstlane_b32 s62, v15 -; VI-NEXT: v_readfirstlane_b32 s74, v14 -; VI-NEXT: v_readfirstlane_b32 s57, v13 +; VI-NEXT: v_readfirstlane_b32 s73, v16 ; VI-NEXT: v_readfirstlane_b32 s58, v10 -; VI-NEXT: v_readfirstlane_b32 s41, v9 -; VI-NEXT: v_readfirstlane_b32 s46, v8 -; VI-NEXT: v_readfirstlane_b32 s13, v7 -; VI-NEXT: v_readfirstlane_b32 s42, v6 -; VI-NEXT: v_readfirstlane_b32 s10, v5 -; VI-NEXT: v_readfirstlane_b32 s14, v4 -; VI-NEXT: v_readfirstlane_b32 s7, v3 -; VI-NEXT: v_readfirstlane_b32 s11, v2 -; VI-NEXT: v_readfirstlane_b32 s6, v1 -; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:4 -; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 -; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:328 -; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:324 -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 -; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:316 -; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:312 -; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:308 -; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:304 -; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:300 -; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:296 -; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:292 -; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:288 -; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:284 -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:272 -; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:268 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 +; VI-NEXT: s_waitcnt vmcnt(11) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:280 +; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:276 +; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:272 +; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:268 +; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:264 +; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:260 +; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:256 +; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:252 +; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:248 +; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:244 +; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:240 +; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:236 +; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:232 +; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:228 +; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:224 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:252 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:212 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 -; VI-NEXT: s_and_b64 s[4:5], vcc, exec +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:180 +; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:176 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:216 -; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:212 -; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:208 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:168 +; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:164 +; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:160 +; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:156 +; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:152 +; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:148 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:200 -; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:196 -; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:192 -; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:188 -; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:184 -; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:180 -; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176 -; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:172 -; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:168 -; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:164 -; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:160 -; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:156 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:152 -; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:148 -; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:144 -; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:140 -; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:136 -; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:132 -; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:128 -; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:124 -; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:120 -; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:116 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:140 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:136 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:108 -; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:104 -; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:100 -; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:96 -; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:92 -; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:88 -; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:84 -; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:80 -; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:76 -; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72 -; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:68 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:64 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:132 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60 -; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:56 -; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:48 -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:44 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:40 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:124 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:120 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:36 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:32 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:28 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:20 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:108 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:104 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:100 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:96 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:92 +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 +; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:88 +; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:84 +; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:80 +; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:76 +; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:72 +; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:68 +; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:64 +; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:60 +; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:56 +; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:52 +; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:48 +; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:44 +; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:40 +; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:36 +; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:32 +; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:28 +; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:24 +; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20 +; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:16 +; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:12 +; VI-NEXT: s_and_b64 s[4:5], vcc, exec +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(4) +; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(6) +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill ; VI-NEXT: s_cbranch_scc0 .LBB93_4 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v4, s6 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_mov_b32_e32 v3, s29 ; VI-NEXT: v_perm_b32 v4, s8, v4, v11 ; VI-NEXT: v_perm_b32 v3, s28, v3, v11 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v5, s10 ; VI-NEXT: v_or_b32_e32 v3, v3, v4 ; VI-NEXT: v_mov_b32_e32 v4, s7 ; VI-NEXT: v_perm_b32 v5, s14, v5, v11 ; VI-NEXT: v_perm_b32 v4, s11, v4, v11 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v6, s41 ; VI-NEXT: v_or_b32_e32 v4, v4, v5 ; VI-NEXT: v_mov_b32_e32 v5, s13 ; VI-NEXT: v_perm_b32 v6, s46, v6, v11 ; VI-NEXT: v_perm_b32 v5, s42, v5, v11 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; VI-NEXT: v_mov_b32_e32 v63, v60 +; VI-NEXT: v_mov_b32_e32 v60, v7 ; VI-NEXT: v_mov_b32_e32 v7, s57 ; VI-NEXT: v_or_b32_e32 v5, v5, v6 ; VI-NEXT: v_mov_b32_e32 v6, s45 ; VI-NEXT: v_perm_b32 v7, s63, v7, v11 ; VI-NEXT: v_perm_b32 v6, s58, v6, v11 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; VI-NEXT: v_mov_b32_e32 v42, v8 ; VI-NEXT: v_mov_b32_e32 v8, s61 ; VI-NEXT: v_or_b32_e32 v6, v6, v7 ; VI-NEXT: v_mov_b32_e32 v7, s62 ; VI-NEXT: v_perm_b32 v8, s73, v8, v11 ; VI-NEXT: v_perm_b32 v7, s74, v7, v11 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; VI-NEXT: v_mov_b32_e32 v40, v9 ; VI-NEXT: v_mov_b32_e32 v9, s12 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 ; VI-NEXT: v_mov_b32_e32 v8, s9 ; VI-NEXT: v_perm_b32 v9, s40, v9, v11 ; VI-NEXT: v_perm_b32 v8, s76, v8, v11 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_mov_b32_e32 v43, v10 ; VI-NEXT: v_mov_b32_e32 v10, s43 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 ; VI-NEXT: v_mov_b32_e32 v9, s15 ; VI-NEXT: v_perm_b32 v10, s56, v10, v11 +; VI-NEXT: v_mov_b32_e32 v62, v32 ; VI-NEXT: v_perm_b32 v9, s44, v9, v11 ; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_mov_b32_e32 v35, v12 +; VI-NEXT: v_mov_b32_e32 v32, v39 +; VI-NEXT: v_mov_b32_e32 v39, v12 ; VI-NEXT: v_mov_b32_e32 v12, s59 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 ; VI-NEXT: v_mov_b32_e32 v10, s47 @@ -173810,568 +173950,574 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; VI-NEXT: v_perm_b32 v11, s75, v13, v11 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 -; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v18, v23, v18, s4 -; VI-NEXT: v_perm_b32 v23, v51, v33, s4 -; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_perm_b32 v12, v56, v12, s4 +; VI-NEXT: v_perm_b32 v12, v21, v17, s4 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v13, v47, v13, s4 +; VI-NEXT: v_perm_b32 v13, v19, v16, s4 ; VI-NEXT: v_or_b32_e32 v12, v13, v12 -; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v14, v59, v14, s4 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v15, v32, v15, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v13, v61, v13, s4 +; VI-NEXT: v_perm_b32 v13, v25, v20, s4 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; VI-NEXT: v_perm_b32 v14, v23, v18, s4 ; VI-NEXT: v_or_b32_e32 v13, v14, v13 -; VI-NEXT: v_perm_b32 v14, v17, v60, s4 +; VI-NEXT: v_perm_b32 v14, v29, v24, s4 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; VI-NEXT: v_perm_b32 v15, v27, v22, s4 ; VI-NEXT: v_or_b32_e32 v14, v15, v14 -; VI-NEXT: v_perm_b32 v15, v21, v16, s4 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v17, v28, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; VI-NEXT: v_perm_b32 v15, v46, v28, s4 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: v_perm_b32 v21, v58, v46, s4 -; VI-NEXT: v_perm_b32 v24, v36, v49, s4 -; VI-NEXT: v_mov_b32_e32 v28, v52 -; VI-NEXT: v_mov_b32_e32 v52, v53 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v16, v19, v16, s4 -; VI-NEXT: v_perm_b32 v19, v26, v22, s4 -; VI-NEXT: v_or_b32_e32 v17, v19, v17 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v16, v31, v26, s4 ; VI-NEXT: v_or_b32_e32 v15, v16, v15 -; VI-NEXT: v_perm_b32 v16, v25, v20, s4 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v16, v58, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; VI-NEXT: v_or_b32_e32 v16, v18, v16 -; VI-NEXT: v_perm_b32 v18, v45, v27, s4 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; VI-NEXT: v_perm_b32 v20, v44, v29, s4 -; VI-NEXT: v_perm_b32 v22, v53, v42, s4 -; VI-NEXT: v_mov_b32_e32 v45, v34 -; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v17, v56, v30, s4 +; VI-NEXT: v_or_b32_e32 v16, v17, v16 +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v34, v44 +; VI-NEXT: v_perm_b32 v22, v55, v48, s4 +; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v27, v32, v39, s4 +; VI-NEXT: v_perm_b32 v29, v61, v62, s4 +; VI-NEXT: v_mov_b32_e32 v32, v63 +; VI-NEXT: s_waitcnt vmcnt(7) +; VI-NEXT: v_perm_b32 v17, v18, v17, s4 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; VI-NEXT: s_waitcnt vmcnt(8) +; VI-NEXT: v_perm_b32 v23, v44, v54, s4 +; VI-NEXT: s_waitcnt vmcnt(5) +; VI-NEXT: v_perm_b32 v21, v49, v21, s4 +; VI-NEXT: s_waitcnt vmcnt(4) +; VI-NEXT: v_perm_b32 v26, v26, v43, s4 +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: v_perm_b32 v28, v28, v53, s4 +; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_perm_b32 v19, v30, v19, s4 +; VI-NEXT: v_mov_b32_e32 v39, v31 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v18, v19, v18, s4 +; VI-NEXT: v_or_b32_e32 v17, v18, v17 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_mov_b32_e32 v53, v43 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v18, v19, v18, s4 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v19, v20, v19, s4 ; VI-NEXT: v_or_b32_e32 v18, v19, v18 -; VI-NEXT: v_perm_b32 v19, v55, v31, s4 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v19, v36, v19, s4 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v20, v35, v20, s4 ; VI-NEXT: v_or_b32_e32 v19, v20, v19 -; VI-NEXT: v_perm_b32 v20, v39, v57, s4 +; VI-NEXT: v_perm_b32 v20, v50, v47, s4 +; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: v_or_b32_e32 v20, v21, v20 -; VI-NEXT: v_perm_b32 v21, v38, v63, s4 +; VI-NEXT: v_perm_b32 v21, v41, v51, s4 +; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; VI-NEXT: v_or_b32_e32 v21, v22, v21 -; VI-NEXT: v_perm_b32 v22, v54, v37, s4 +; VI-NEXT: s_waitcnt vmcnt(6) +; VI-NEXT: v_perm_b32 v22, v38, v50, s4 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; VI-NEXT: v_or_b32_e32 v22, v23, v22 -; VI-NEXT: v_perm_b32 v23, v40, v50, s4 +; VI-NEXT: s_waitcnt vmcnt(4) +; VI-NEXT: v_perm_b32 v23, v47, v36, s4 ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_perm_b32 v24, v51, v49, s4 ; VI-NEXT: v_or_b32_e32 v23, v24, v23 -; VI-NEXT: v_perm_b32 v24, v48, v34, s4 +; VI-NEXT: v_perm_b32 v24, v57, v48, s4 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_mov_b32_e32 v48, v25 -; VI-NEXT: v_perm_b32 v25, v25, v41, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v25, v25, v35, s4 ; VI-NEXT: v_or_b32_e32 v24, v25, v24 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v34, v33 -; VI-NEXT: v_mov_b32_e32 v33, v26 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v55, v57 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_mov_b32_e32 v53, v25 -; VI-NEXT: v_perm_b32 v25, v26, v25, s4 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v25, v33, v59, s4 ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_perm_b32 v30, v31, v30, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s4 ; VI-NEXT: v_or_b32_e32 v25, v26, v25 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s4 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v26, v52, v37, s4 ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v29, v27, s4 ; VI-NEXT: v_or_b32_e32 v26, v27, v26 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v29, v27, s4 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v27, v34, v40, s4 ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v28, v29, s4 ; VI-NEXT: v_or_b32_e32 v27, v28, v27 -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v28, v28, v35, s4 +; VI-NEXT: v_perm_b32 v28, v42, v60, s4 ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v62, v29, s4 ; VI-NEXT: v_or_b32_e32 v28, v29, v28 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v62, v44 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v43, v29, s4 +; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v60, v30 +; VI-NEXT: v_perm_b32 v30, v31, v30, s4 +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v57, v59 +; VI-NEXT: v_mov_b32_e32 v34, v61 +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: v_mov_b32_e32 v33, v29 +; VI-NEXT: v_perm_b32 v29, v29, v63, s4 ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; VI-NEXT: v_or_b32_e32 v29, v30, v29 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_mov_b32_e32 v63, v31 +; VI-NEXT: v_mov_b32_e32 v62, v37 +; VI-NEXT: v_perm_b32 v43, v43, v52, s4 +; VI-NEXT: v_mov_b32_e32 v61, v52 +; VI-NEXT: v_mov_b32_e32 v52, v51 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_mov_b32_e32 v42, v30 ; VI-NEXT: v_perm_b32 v30, v31, v30, s4 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v31, v35, v31, s4 +; VI-NEXT: v_mov_b32_e32 v40, v31 +; VI-NEXT: v_perm_b32 v31, v37, v31, s4 +; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload ; VI-NEXT: v_or_b32_e32 v30, v31, v30 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v31, v35, v31, s4 +; VI-NEXT: v_perm_b32 v31, v37, v59, s4 ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; VI-NEXT: v_mov_b32_e32 v35, v43 -; VI-NEXT: v_perm_b32 v43, v44, v43, s4 ; VI-NEXT: v_or_b32_e32 v31, v43, v31 -; VI-NEXT: v_mov_b32_e32 v43, v39 -; VI-NEXT: v_mov_b32_e32 v39, v34 -; VI-NEXT: v_mov_b32_e32 v34, v52 -; VI-NEXT: v_mov_b32_e32 v52, v45 +; VI-NEXT: v_mov_b32_e32 v43, v35 +; VI-NEXT: v_mov_b32_e32 v35, v37 +; VI-NEXT: v_mov_b32_e32 v37, v59 ; VI-NEXT: s_cbranch_execnz .LBB93_3 ; VI-NEXT: .LBB93_2: ; %cmp.true -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v35 ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: s_add_i32 s75, s75, 3 -; VI-NEXT: s_add_i32 s72, s72, 3 -; VI-NEXT: s_add_i32 s60, s60, 3 -; VI-NEXT: s_add_i32 s56, s56, 3 -; VI-NEXT: s_add_i32 s44, s44, 3 -; VI-NEXT: s_add_i32 s40, s40, 3 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v0, v0, v37, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v53 +; VI-NEXT: v_perm_b32 v0, v0, v61, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v63 +; VI-NEXT: v_perm_b32 v0, v0, v42, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62 +; VI-NEXT: v_perm_b32 v0, v0, v40, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33 +; VI-NEXT: v_perm_b32 v0, v0, v32, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v39 +; VI-NEXT: v_perm_b32 v39, v0, v60, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v27, 0xc0c0004 ; VI-NEXT: s_add_i32 s76, s76, 3 +; VI-NEXT: v_mov_b32_e32 v28, s9 +; VI-NEXT: v_perm_b32 v6, s76, v28, v27 ; VI-NEXT: s_add_i32 s73, s73, 3 +; VI-NEXT: v_mov_b32_e32 v28, s61 +; VI-NEXT: v_perm_b32 v7, s73, v28, v27 ; VI-NEXT: s_add_i32 s74, s74, 3 +; VI-NEXT: v_mov_b32_e32 v28, s62 +; VI-NEXT: v_perm_b32 v8, s74, v28, v27 ; VI-NEXT: s_add_i32 s63, s63, 3 +; VI-NEXT: v_mov_b32_e32 v28, s57 +; VI-NEXT: v_perm_b32 v9, s63, v28, v27 ; VI-NEXT: s_add_i32 s58, s58, 3 +; VI-NEXT: v_mov_b32_e32 v28, s45 +; VI-NEXT: v_perm_b32 v10, s58, v28, v27 ; VI-NEXT: s_add_i32 s46, s46, 3 +; VI-NEXT: v_mov_b32_e32 v28, s41 +; VI-NEXT: v_perm_b32 v15, s46, v28, v27 ; VI-NEXT: s_add_i32 s42, s42, 3 +; VI-NEXT: v_mov_b32_e32 v28, s13 +; VI-NEXT: v_perm_b32 v14, s42, v28, v27 ; VI-NEXT: s_add_i32 s14, s14, 3 +; VI-NEXT: v_mov_b32_e32 v28, s10 ; VI-NEXT: s_add_i32 s11, s11, 3 +; VI-NEXT: s_add_i32 s18, s18, 3 +; VI-NEXT: s_add_i32 s16, s16, 3 +; VI-NEXT: v_mov_b32_e32 v21, s17 +; VI-NEXT: s_add_i32 s75, s75, 3 +; VI-NEXT: s_add_i32 s72, s72, 3 +; VI-NEXT: s_add_i32 s60, s60, 3 +; VI-NEXT: v_mov_b32_e32 v2, s47 +; VI-NEXT: s_add_i32 s56, s56, 3 +; VI-NEXT: v_mov_b32_e32 v3, s43 +; VI-NEXT: s_add_i32 s44, s44, 3 +; VI-NEXT: v_mov_b32_e32 v4, s15 +; VI-NEXT: s_add_i32 s40, s40, 3 +; VI-NEXT: v_mov_b32_e32 v5, s12 ; VI-NEXT: s_add_i32 s8, s8, 3 ; VI-NEXT: s_add_i32 s28, s28, 3 +; VI-NEXT: v_mov_b32_e32 v29, s29 ; VI-NEXT: s_add_i32 s26, s26, 3 +; VI-NEXT: v_mov_b32_e32 v30, s27 ; VI-NEXT: s_add_i32 s24, s24, 3 +; VI-NEXT: v_mov_b32_e32 v31, s25 ; VI-NEXT: s_add_i32 s22, s22, 3 +; VI-NEXT: v_mov_b32_e32 v32, s23 ; VI-NEXT: s_add_i32 s20, s20, 3 -; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s16, s16, 3 -; VI-NEXT: v_mov_b32_e32 v18, s17 +; VI-NEXT: v_mov_b32_e32 v33, s21 +; VI-NEXT: v_perm_b32 v21, s16, v21, v27 +; VI-NEXT: v_perm_b32 v12, s60, v2, v27 +; VI-NEXT: v_perm_b32 v11, s56, v3, v27 +; VI-NEXT: v_perm_b32 v4, s44, v4, v27 +; VI-NEXT: v_perm_b32 v5, s40, v5, v27 +; VI-NEXT: v_perm_b32 v29, s28, v29, v27 +; VI-NEXT: v_perm_b32 v30, s26, v30, v27 +; VI-NEXT: v_perm_b32 v31, s24, v31, v27 +; VI-NEXT: v_perm_b32 v32, s22, v32, v27 +; VI-NEXT: v_perm_b32 v33, s20, v33, v27 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v12 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v8 +; VI-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x3000000, v7 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62 -; VI-NEXT: v_perm_b32 v0, v0, v35, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v62, s21 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34 +; VI-NEXT: v_mov_b32_e32 v34, s19 +; VI-NEXT: v_perm_b32 v34, s18, v34, v27 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v35, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v37, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v26, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v25, v0, v57, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v24, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v23, v0, v48, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v48, v0, v43, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v47 +; VI-NEXT: v_perm_b32 v22, v0, v36, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v52 +; VI-NEXT: v_perm_b32 v17, v0, v49, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38 +; VI-NEXT: v_perm_b32 v18, v0, v50, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v44 +; VI-NEXT: v_perm_b32 v19, v0, v54, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v41 +; VI-NEXT: v_perm_b32 v20, v0, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v55 +; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v35 +; VI-NEXT: v_add_u32_e32 v38, vcc, 0x300, v24 +; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v22 +; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v19 +; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v20 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v49, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v49 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; VI-NEXT: v_perm_b32 v51, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v0, v1, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33 -; VI-NEXT: v_perm_b32 v25, v0, v53, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28 -; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26 +; VI-NEXT: v_perm_b32 v52, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29 -; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25 +; VI-NEXT: v_perm_b32 v53, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v53 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: v_perm_b32 v24, v0, v52, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v48 -; VI-NEXT: v_perm_b32 v30, v0, v41, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v40 -; VI-NEXT: v_perm_b32 v23, v0, v50, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v36 -; VI-NEXT: v_perm_b32 v31, v0, v49, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v54 -; VI-NEXT: v_perm_b32 v22, v0, v37, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51 -; VI-NEXT: v_perm_b32 v33, v0, v39, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38 -; VI-NEXT: v_perm_b32 v21, v0, v63, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34 -; VI-NEXT: v_perm_b32 v36, v0, v42, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v43 -; VI-NEXT: v_perm_b32 v20, v0, v55, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v63, s19 -; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30 -; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v31 -; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33 -; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; VI-NEXT: v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22 -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23 -; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24 +; VI-NEXT: v_perm_b32 v54, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v52, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v55, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v55 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v53, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v53 +; VI-NEXT: v_perm_b32 v40, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v40 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v38, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v41, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v34, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v42, v0, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58 +; VI-NEXT: v_perm_b32 v43, v0, v45, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v56 +; VI-NEXT: v_perm_b32 v56, s14, v28, v27 +; VI-NEXT: v_mov_b32_e32 v28, s7 +; VI-NEXT: v_perm_b32 v58, s11, v28, v27 +; VI-NEXT: v_mov_b32_e32 v28, s6 +; VI-NEXT: v_perm_b32 v28, s8, v28, v27 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v44, v0, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v46 +; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v44 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v45, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v45, 16, v45 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v10, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v46, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v40, vcc, 0x300, v46 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v11, v0, v1, s4 +; VI-NEXT: v_perm_b32 v47, v0, v1, s4 ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v46, 16, v47 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v12, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v57, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v13, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v59, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v59, 16, v59 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v14, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v60, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15 +; VI-NEXT: v_perm_b32 v61, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: v_perm_b32 v16, v0, v60, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v32 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v17, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v61 -; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v34 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v54, v0, v1, s4 +; VI-NEXT: v_perm_b32 v62, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v59 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v40, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v56 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v42, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v47 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v43, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v44, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004 -; VI-NEXT: v_perm_b32 v62, s20, v62, v0 -; VI-NEXT: v_perm_b32 v63, s18, v63, v0 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v45, s75, v1, v0 +; VI-NEXT: v_perm_b32 v63, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; VI-NEXT: v_mov_b32_e32 v1, s59 -; VI-NEXT: v_perm_b32 v55, s72, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_perm_b32 v41, s60, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s43 -; VI-NEXT: v_perm_b32 v9, s56, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s15 -; VI-NEXT: v_perm_b32 v46, s44, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s12 -; VI-NEXT: v_perm_b32 v8, s40, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s9 -; VI-NEXT: v_perm_b32 v47, s76, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s61 -; VI-NEXT: v_perm_b32 v7, s73, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s62 -; VI-NEXT: v_perm_b32 v56, s74, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s57 -; VI-NEXT: v_perm_b32 v6, s63, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s45 -; VI-NEXT: v_perm_b32 v57, s58, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s41 -; VI-NEXT: v_perm_b32 v5, s46, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s13 -; VI-NEXT: v_perm_b32 v58, s42, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s10 -; VI-NEXT: v_perm_b32 v4, s14, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s7 -; VI-NEXT: v_perm_b32 v59, s11, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: v_perm_b32 v3, s8, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s29 -; VI-NEXT: v_perm_b32 v60, s28, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s27 -; VI-NEXT: v_perm_b32 v2, s26, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s25 -; VI-NEXT: v_perm_b32 v61, s24, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s23 -; VI-NEXT: v_perm_b32 v1, s22, v1, v0 -; VI-NEXT: v_perm_b32 v0, s16, v18, v0 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v63 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0 -; VI-NEXT: v_or_b32_sdwa v0, v18, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v62 -; VI-NEXT: v_or_b32_sdwa v1, v1, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v61 -; VI-NEXT: v_or_b32_sdwa v2, v2, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v60 -; VI-NEXT: v_or_b32_sdwa v3, v3, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v59 -; VI-NEXT: v_or_b32_sdwa v4, v4, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v58 -; VI-NEXT: v_or_b32_sdwa v5, v5, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v57 -; VI-NEXT: v_or_b32_sdwa v6, v6, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v56 -; VI-NEXT: v_or_b32_sdwa v7, v7, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v47 -; VI-NEXT: v_or_b32_sdwa v8, v8, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v46 -; VI-NEXT: v_or_b32_sdwa v9, v9, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v10 -; VI-NEXT: v_add_u32_e32 v46, vcc, 0x300, v11 -; VI-NEXT: v_add_u32_e32 v56, vcc, 0x300, v13 -; VI-NEXT: v_lshlrev_b32_e32 v57, 16, v14 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17 -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v54 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v40 -; VI-NEXT: v_or_b32_sdwa v13, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v17, v18, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v47, 16, v12 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v42 -; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v43 -; VI-NEXT: v_or_b32_sdwa v12, v12, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v55 -; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v41 -; VI-NEXT: v_or_b32_sdwa v10, v10, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v44 -; VI-NEXT: v_add_u32_e32 v40, vcc, 0x300, v45 -; VI-NEXT: v_or_b32_sdwa v11, v11, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v35 -; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v36 -; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v19 -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v52 -; VI-NEXT: v_or_b32_sdwa v14, v14, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v15, v57, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v16, v47, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v19, v19, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v20, v20, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v21, v21, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_perm_b32 v13, s72, v1, v27 +; VI-NEXT: v_lshlrev_b32_e32 v47, 16, v63 +; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v16, s75, v0, v27 +; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v34 +; VI-NEXT: v_or_b32_sdwa v0, v27, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v32 +; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v33 +; VI-NEXT: v_or_b32_sdwa v1, v21, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v30 +; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v31 +; VI-NEXT: v_or_b32_sdwa v2, v21, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v28 +; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v29 +; VI-NEXT: v_or_b32_sdwa v3, v21, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v39 +; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v37 +; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v26 +; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v25 +; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v23 +; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v48 +; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v17 +; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v41 +; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v43 +; VI-NEXT: v_add_u32_e32 v41, vcc, 0x300, v57 +; VI-NEXT: v_lshlrev_b32_e32 v57, 16, v61 +; VI-NEXT: v_add_u32_e32 v44, vcc, 0x300, v16 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v4 +; VI-NEXT: v_add_u32_e32 v61, vcc, 0x300, v6 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v9 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v10 +; VI-NEXT: v_or_b32_sdwa v6, v6, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v9, v11, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v16, v17, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v62 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v14 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v56 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v58 +; VI-NEXT: v_or_b32_sdwa v4, v4, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v11, v47, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v14, v46, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x3000000, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x3000000, v4 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x3000000, v5 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x3000000, v6 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x3000000, v7 -; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8 ; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v9 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10 ; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v11 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13 ; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v14 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15 ; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20 -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v54, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v31, v54, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21 +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v41, vcc, 0x300, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v30, v40, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30 +; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v29, v42, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29 +; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v44, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v45, vcc, 0x300, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v28, v44, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28 +; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v46, 16, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v38 -; VI-NEXT: v_or_b32_sdwa v18, v18, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v27, v46, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v21 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v51 +; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v52 +; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v54 +; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v42 +; VI-NEXT: v_or_b32_sdwa v17, v18, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v18, v19, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v19, v20, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v20, v21, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v21, v22, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v22, v23, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v23, v24, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v24, v25, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v25, v26, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v26, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v27, v28, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v28, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v29, v31, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v30, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v42, vcc, 0x300, v60 +; VI-NEXT: v_lshlrev_b32_e32 v60, 16, v5 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v15 +; VI-NEXT: v_or_b32_sdwa v5, v5, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v8, v60, v61 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v10, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v12, v57, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v13, v59, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v15, v45, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v5, vcc, 0x3000000, v5 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17 ; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19 +; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21 +; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22 +; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23 +; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24 +; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25 +; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26 ; VI-NEXT: v_add_u32_e32 v27, vcc, 0x3000000, v27 +; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28 +; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29 +; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31 ; VI-NEXT: .LBB93_3: ; %end ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload @@ -174392,16 +174538,26 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB93_4: -; VI-NEXT: v_mov_b32_e32 v43, v39 -; VI-NEXT: v_mov_b32_e32 v52, v34 -; VI-NEXT: v_mov_b32_e32 v39, v33 -; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v34, v53 -; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v62, v2 -; VI-NEXT: v_mov_b32_e32 v35, v1 -; VI-NEXT: v_mov_b32_e32 v55, v57 +; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v34, v61 +; VI-NEXT: v_mov_b32_e32 v61, v1 +; VI-NEXT: v_mov_b32_e32 v32, v60 +; VI-NEXT: v_mov_b32_e32 v40, v4 +; VI-NEXT: v_mov_b32_e32 v33, v42 +; VI-NEXT: v_mov_b32_e32 v42, v3 +; VI-NEXT: v_mov_b32_e32 v39, v6 +; VI-NEXT: v_mov_b32_e32 v60, v5 +; VI-NEXT: v_mov_b32_e32 v53, v2 +; VI-NEXT: v_mov_b32_e32 v57, v59 ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; VI-NEXT: s_branch .LBB93_2 @@ -174435,15 +174591,11 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328 ; GFX9-NEXT: v_readfirstlane_b32 s43, v2 ; GFX9-NEXT: v_readfirstlane_b32 s6, v1 -; GFX9-NEXT: v_readfirstlane_b32 s8, v5 -; GFX9-NEXT: v_readfirstlane_b32 s10, v4 -; GFX9-NEXT: v_readfirstlane_b32 s15, v3 -; GFX9-NEXT: v_readfirstlane_b32 s12, v9 ; GFX9-NEXT: v_readfirstlane_b32 s14, v8 ; GFX9-NEXT: v_readfirstlane_b32 s47, v7 ; GFX9-NEXT: v_readfirstlane_b32 s59, v6 +; GFX9-NEXT: v_readfirstlane_b32 s12, v9 ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332 -; GFX9-NEXT: v_readfirstlane_b32 s42, v13 ; GFX9-NEXT: v_readfirstlane_b32 s74, v30 ; GFX9-NEXT: v_readfirstlane_b32 s44, v29 ; GFX9-NEXT: v_readfirstlane_b32 s56, v28 @@ -174461,117 +174613,115 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX9-NEXT: v_readfirstlane_b32 s58, v16 ; GFX9-NEXT: v_readfirstlane_b32 s73, v15 ; GFX9-NEXT: v_readfirstlane_b32 s75, v14 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; GFX9-NEXT: v_readfirstlane_b32 s42, v13 +; GFX9-NEXT: v_readfirstlane_b32 s8, v5 +; GFX9-NEXT: v_readfirstlane_b32 s10, v4 +; GFX9-NEXT: v_readfirstlane_b32 s15, v3 +; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:296 +; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:292 +; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:288 +; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:284 +; GFX9-NEXT: s_waitcnt vmcnt(5) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:312 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:308 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:304 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:296 -; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:292 -; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:288 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:280 -; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:276 -; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:272 -; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:268 -; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:264 -; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:260 -; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:256 -; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:252 -; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:248 -; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:244 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:236 -; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:280 +; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:276 +; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:272 +; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:268 +; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:264 +; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:260 +; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:256 +; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:252 +; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:248 +; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:244 +; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:240 +; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:236 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:228 +; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:224 +; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:220 +; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:204 +; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 -; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:172 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:188 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:184 -; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:180 -; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:176 -; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:172 -; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:168 -; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:164 -; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:160 -; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:156 -; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:152 -; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:148 -; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:144 -; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:140 -; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:136 -; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:132 -; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:128 -; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:124 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 +; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:148 +; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:144 +; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:140 +; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:136 +; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:132 +; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:128 +; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:124 ; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:120 -; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:116 -; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112 -; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:108 +; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:116 +; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:112 +; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:108 ; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:104 -; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:100 -; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:96 -; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:92 +; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:100 +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:96 +; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:92 ; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:88 ; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:84 -; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:80 -; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:76 +; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:80 +; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:76 ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:72 ; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:68 ; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:64 -; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:60 +; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:60 ; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:56 ; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:52 ; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:48 @@ -174584,114 +174734,139 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:20 ; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:16 ; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:12 +; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec +; GFX9-NEXT: s_waitcnt vmcnt(35) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:160 +; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:156 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(6) -; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(7) -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(12) -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(10) +; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(11) +; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(13) +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(16) +; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(27) +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(49) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill ; GFX9-NEXT: s_cbranch_scc0 .LBB93_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v0, s17 -; GFX9-NEXT: v_mov_b32_e32 v8, 0xc0c0004 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: v_perm_b32 v0, s16, v0, v8 +; GFX9-NEXT: v_mov_b32_e32 v9, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v0, s16, v0, v9 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v8 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 -; GFX9-NEXT: v_perm_b32 v1, s18, v1, v8 +; GFX9-NEXT: v_perm_b32 v1, s18, v1, v9 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v8 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v9 +; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v9 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 -; GFX9-NEXT: v_perm_b32 v2, s24, v2, v8 +; GFX9-NEXT: v_perm_b32 v2, s24, v2, v9 +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v3, s27 -; GFX9-NEXT: v_perm_b32 v3, s26, v3, v8 +; GFX9-NEXT: v_perm_b32 v3, s26, v3, v9 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 -; GFX9-NEXT: v_perm_b32 v3, s28, v3, v8 +; GFX9-NEXT: v_perm_b32 v3, s28, v3, v9 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v4, s6 -; GFX9-NEXT: v_perm_b32 v4, s7, v4, v8 +; GFX9-NEXT: v_perm_b32 v4, s7, v4, v9 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 ; GFX9-NEXT: v_mov_b32_e32 v4, s15 -; GFX9-NEXT: v_perm_b32 v4, s43, v4, v8 +; GFX9-NEXT: v_perm_b32 v4, s43, v4, v9 +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v5, s8 -; GFX9-NEXT: v_perm_b32 v5, s10, v5, v8 +; GFX9-NEXT: v_perm_b32 v5, s10, v5, v9 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 ; GFX9-NEXT: v_mov_b32_e32 v5, s47 -; GFX9-NEXT: v_perm_b32 v5, s59, v5, v8 +; GFX9-NEXT: v_perm_b32 v5, s59, v5, v9 +; GFX9-NEXT: v_mov_b32_e32 v60, v52 +; GFX9-NEXT: v_mov_b32_e32 v52, v6 ; GFX9-NEXT: v_mov_b32_e32 v6, s12 -; GFX9-NEXT: v_perm_b32 v6, s14, v6, v8 +; GFX9-NEXT: v_perm_b32 v6, s14, v6, v9 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 ; GFX9-NEXT: v_mov_b32_e32 v6, s61 -; GFX9-NEXT: v_perm_b32 v6, s63, v6, v8 +; GFX9-NEXT: v_perm_b32 v6, s63, v6, v9 +; GFX9-NEXT: v_mov_b32_e32 v48, v53 +; GFX9-NEXT: v_mov_b32_e32 v53, v7 ; GFX9-NEXT: v_mov_b32_e32 v7, s42 -; GFX9-NEXT: v_perm_b32 v7, s46, v7, v8 +; GFX9-NEXT: v_perm_b32 v7, s46, v7, v9 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 ; GFX9-NEXT: v_mov_b32_e32 v7, s73 -; GFX9-NEXT: v_perm_b32 v7, s75, v7, v8 -; GFX9-NEXT: v_mov_b32_e32 v63, v33 -; GFX9-NEXT: v_mov_b32_e32 v33, v9 -; GFX9-NEXT: v_mov_b32_e32 v9, s45 -; GFX9-NEXT: v_perm_b32 v9, s58, v9, v8 +; GFX9-NEXT: v_perm_b32 v7, s75, v7, v9 +; GFX9-NEXT: v_mov_b32_e32 v51, v37 +; GFX9-NEXT: v_mov_b32_e32 v37, v8 +; GFX9-NEXT: v_mov_b32_e32 v8, s45 +; GFX9-NEXT: v_perm_b32 v8, s58, v8, v9 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; GFX9-NEXT: v_lshl_or_b32 v7, v9, 16, v7 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v10 -; GFX9-NEXT: v_perm_b32 v10, s74, v12, v8 -; GFX9-NEXT: v_or_b32_sdwa v9, v11, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v9, 16, v10 +; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7 +; GFX9-NEXT: v_mov_b32_e32 v8, s57 +; GFX9-NEXT: v_perm_b32 v8, s60, v8, v9 +; GFX9-NEXT: v_perm_b32 v9, s74, v12, v9 +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v10 +; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v9 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v18 ; GFX9-NEXT: v_or_b32_sdwa v9, v22, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v13 @@ -174711,212 +174886,227 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v14, v10, 16, v9 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v19 -; GFX9-NEXT: v_perm_b32 v10, v35, v29, s4 +; GFX9-NEXT: v_perm_b32 v10, v44, v29, s4 ; GFX9-NEXT: v_or_b32_sdwa v9, v24, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v15, v9, 16, v10 -; GFX9-NEXT: v_perm_b32 v9, v39, v34, s4 +; GFX9-NEXT: v_perm_b32 v9, v45, v43, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v51, v36, s4 -; GFX9-NEXT: v_perm_b32 v16, v28, v23, s4 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_perm_b32 v17, v37, v27, s4 -; GFX9-NEXT: v_lshl_or_b32 v16, v16, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v41, v50, s4 -; GFX9-NEXT: v_lshl_or_b32 v17, v17, 16, v10 +; GFX9-NEXT: v_perm_b32 v10, v28, v23, s4 +; GFX9-NEXT: v_lshl_or_b32 v16, v10, 16, v9 +; GFX9-NEXT: v_perm_b32 v9, v32, v47, s4 +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_perm_b32 v10, v46, v27, s4 +; GFX9-NEXT: v_lshl_or_b32 v17, v10, 16, v9 +; GFX9-NEXT: v_perm_b32 v9, v63, v58, s4 +; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v52, v31, s4 +; GFX9-NEXT: v_perm_b32 v10, v41, v31, s4 ; GFX9-NEXT: v_lshl_or_b32 v18, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v40, v46, s4 +; GFX9-NEXT: v_perm_b32 v9, v33, v35, s4 +; GFX9-NEXT: v_mov_b32_e32 v45, v56 +; GFX9-NEXT: v_perm_b32 v10, v61, v56, s4 +; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v32, v38, s4 ; GFX9-NEXT: v_lshl_or_b32 v19, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v55, v57, s4 +; GFX9-NEXT: v_perm_b32 v9, v42, v39, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v45, v49, s4 +; GFX9-NEXT: v_mov_b32_e32 v63, v35 +; GFX9-NEXT: v_mov_b32_e32 v32, v58 +; GFX9-NEXT: v_mov_b32_e32 v58, v41 +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; GFX9-NEXT: s_lshl_b32 s5, s41, 8 +; GFX9-NEXT: s_lshl_b32 s77, s9, 8 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_mov_b32_e32 v47, v46 +; GFX9-NEXT: v_mov_b32_e32 v46, v31 +; GFX9-NEXT: s_lshl_b32 s78, s44, 8 +; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(8) +; GFX9-NEXT: v_perm_b32 v10, v34, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v20, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v53, v60, s4 +; GFX9-NEXT: v_perm_b32 v9, v36, v54, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v56, v44, s4 +; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(6) +; GFX9-NEXT: v_perm_b32 v10, v56, v33, s4 ; GFX9-NEXT: v_lshl_or_b32 v21, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v58, v42, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_mov_b32_e32 v36, v9 +; GFX9-NEXT: v_perm_b32 v9, v50, v9, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v59, v47, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v10, v35, s4 ; GFX9-NEXT: v_lshl_or_b32 v22, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v50, v32 -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v51, v49 -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v41, v46 -; GFX9-NEXT: v_mov_b32_e32 v39, v52 -; GFX9-NEXT: v_mov_b32_e32 v52, v38 -; GFX9-NEXT: v_mov_b32_e32 v34, v37 -; GFX9-NEXT: v_mov_b32_e32 v37, v31 -; GFX9-NEXT: s_lshl_b32 s5, s13, 8 -; GFX9-NEXT: s_lshl_b32 s77, s9, 8 -; GFX9-NEXT: s_lshl_b32 s78, s44, 8 -; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: v_perm_b32 v9, v9, v10, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_mov_b32_e32 v50, v9 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4 +; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: s_waitcnt vmcnt(7) -; GFX9-NEXT: v_perm_b32 v10, v32, v58, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v42, v10, s4 ; GFX9-NEXT: v_lshl_or_b32 v23, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v41 +; GFX9-NEXT: v_or_b32_sdwa v10, v44, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v49 -; GFX9-NEXT: v_or_b32_sdwa v10, v24, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 +; GFX9-NEXT: v_or_b32_sdwa v9, v57, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v24, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v35 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v54 +; GFX9-NEXT: v_mov_b32_e32 v57, v60 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v10, v25, v10, s4 +; GFX9-NEXT: v_perm_b32 v10, v49, v55, s4 ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v25, v9, 16, v10 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v33 -; GFX9-NEXT: v_or_b32_sdwa v10, v62, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v33, v46 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; GFX9-NEXT: v_or_b32_sdwa v9, v43, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v38 +; GFX9-NEXT: v_or_b32_sdwa v9, v48, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v53 +; GFX9-NEXT: v_or_b32_sdwa v10, v37, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v26, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v48 -; GFX9-NEXT: v_perm_b32 v10, v63, v61, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v54, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v52 +; GFX9-NEXT: v_perm_b32 v10, v59, v51, s4 +; GFX9-NEXT: v_or_b32_sdwa v9, v40, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v27, v9, 16, v10 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v54, v61 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v60 +; GFX9-NEXT: v_or_b32_sdwa v9, v62, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_mov_b32_e32 v48, v63 -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v48, v29 +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v53, v30 +; GFX9-NEXT: v_mov_b32_e32 v38, v39 +; GFX9-NEXT: s_waitcnt vmcnt(5) ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v10 ; GFX9-NEXT: v_or_b32_sdwa v10, v28, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshl_or_b32 v28, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_mov_b32_e32 v40, v37 ; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_mov_b32_e32 v51, v9 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v10, v36, v10, s4 +; GFX9-NEXT: v_mov_b32_e32 v52, v10 +; GFX9-NEXT: v_perm_b32 v10, v10, v29, s4 ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v29, v9, 16, v10 -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v43 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v49 ; GFX9-NEXT: v_or_b32_sdwa v9, v62, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_mov_b32_e32 v60, v10 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v10 ; GFX9-NEXT: v_or_b32_sdwa v10, v30, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshl_or_b32 v30, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v38 -; GFX9-NEXT: v_perm_b32 v10, v63, v61, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v46, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v31, v9, 16, v10 -; GFX9-NEXT: v_mov_b32_e32 v9, s57 -; GFX9-NEXT: v_perm_b32 v8, s60, v9, v8 -; GFX9-NEXT: s_and_b32 s4, s40, 0xff -; GFX9-NEXT: s_or_b32 s4, s4, s5 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX9-NEXT: v_lshl_or_b32 v9, s4, 16, v8 +; GFX9-NEXT: v_perm_b32 v10, v59, v55, s4 ; GFX9-NEXT: s_and_b32 s4, s76, 0xff -; GFX9-NEXT: s_lshl_b32 s5, s41, 8 ; GFX9-NEXT: s_or_b32 s4, s4, s5 ; GFX9-NEXT: s_and_b32 s5, s11, 0xff ; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_pack_ll_b32_b16 s4, s4, s5 -; GFX9-NEXT: s_and_b32 s5, s72, 0xff -; GFX9-NEXT: s_lshl_b32 s77, s62, 8 -; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_and_b32 s77, s56, 0xff -; GFX9-NEXT: s_or_b32 s77, s77, s78 -; GFX9-NEXT: s_pack_ll_b32_b16 s5, s5, s77 -; GFX9-NEXT: v_mov_b32_e32 v8, s4 -; GFX9-NEXT: v_mov_b32_e32 v10, s5 +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v39 +; GFX9-NEXT: s_pack_ll_b32_b16 s77, s4, s5 +; GFX9-NEXT: s_and_b32 s4, s40, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s13, 8 +; GFX9-NEXT: v_or_b32_sdwa v9, v37, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NEXT: s_or_b32 s4, s4, s5 +; GFX9-NEXT: v_lshl_or_b32 v31, v9, 16, v10 +; GFX9-NEXT: v_lshl_or_b32 v9, s4, 16, v8 +; GFX9-NEXT: s_and_b32 s4, s72, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s62, 8 +; GFX9-NEXT: s_or_b32 s4, s4, s5 +; GFX9-NEXT: s_and_b32 s5, s56, 0xff +; GFX9-NEXT: s_or_b32 s5, s5, s78 +; GFX9-NEXT: s_pack_ll_b32_b16 s78, s4, s5 ; GFX9-NEXT: s_mov_b64 s[4:5], 0 -; GFX9-NEXT: v_mov_b32_e32 v63, v36 +; GFX9-NEXT: v_mov_b32_e32 v8, s77 +; GFX9-NEXT: v_mov_b32_e32 v10, s78 +; GFX9-NEXT: v_mov_b32_e32 v37, v49 ; GFX9-NEXT: s_branch .LBB93_3 ; GFX9-NEXT: .LBB93_2: -; GFX9-NEXT: v_mov_b32_e32 v54, v61 -; GFX9-NEXT: v_mov_b32_e32 v50, v32 -; GFX9-NEXT: v_mov_b32_e32 v51, v49 -; GFX9-NEXT: v_mov_b32_e32 v39, v52 -; GFX9-NEXT: v_mov_b32_e32 v52, v38 -; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v41, v46 -; GFX9-NEXT: v_mov_b32_e32 v34, v37 -; GFX9-NEXT: v_mov_b32_e32 v37, v31 +; GFX9-NEXT: v_mov_b32_e32 v63, v35 +; GFX9-NEXT: v_mov_b32_e32 v32, v58 +; GFX9-NEXT: v_mov_b32_e32 v58, v41 +; GFX9-NEXT: v_mov_b32_e32 v45, v56 +; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v57, v52 +; GFX9-NEXT: v_mov_b32_e32 v60, v2 +; GFX9-NEXT: v_mov_b32_e32 v48, v5 +; GFX9-NEXT: v_mov_b32_e32 v53, v1 +; GFX9-NEXT: v_mov_b32_e32 v52, v4 +; GFX9-NEXT: v_mov_b32_e32 v51, v3 +; GFX9-NEXT: v_mov_b32_e32 v47, v46 +; GFX9-NEXT: v_mov_b32_e32 v46, v31 ; GFX9-NEXT: s_mov_b64 s[4:5], -1 ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; GFX9-NEXT: .LBB93_3: ; %Flow -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; GFX9-NEXT: s_andn2_b64 vcc, exec, s[4:5] ; GFX9-NEXT: s_cbranch_vccnz .LBB93_5 ; GFX9-NEXT: ; %bb.4: ; %cmp.true -; GFX9-NEXT: s_waitcnt vmcnt(5) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v48 +; GFX9-NEXT: s_waitcnt vmcnt(8) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v59 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v0, v0, v61, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_u32_e32 v0, 3, v33 -; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_perm_b32 v0, v0, v55, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v40 +; GFX9-NEXT: s_waitcnt vmcnt(6) ; GFX9-NEXT: v_perm_b32 v0, v0, v38, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill ; GFX9-NEXT: v_add_u32_e32 v0, 3, v62 -; GFX9-NEXT: v_perm_b32 v0, v0, v43, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; GFX9-NEXT: s_add_i32 s74, s74, 3 +; GFX9-NEXT: v_perm_b32 v0, v0, v37, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v53 +; GFX9-NEXT: v_perm_b32 v0, v0, v60, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v52 +; GFX9-NEXT: v_perm_b32 v48, v0, v48, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; GFX9-NEXT: s_add_i32 s74, s74, 3 ; GFX9-NEXT: s_add_i32 s72, s72, 3 ; GFX9-NEXT: s_add_i32 s56, s56, 3 ; GFX9-NEXT: s_add_i32 s60, s60, 3 @@ -174935,372 +175125,369 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX9-NEXT: s_add_i32 s7, s7, 3 ; GFX9-NEXT: s_add_i32 s24, s24, 3 ; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: s_add_i32 s16, s16, 3 ; GFX9-NEXT: s_add_i32 s20, s20, 3 ; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: s_add_i32 s16, s16, 3 -; GFX9-NEXT: v_mov_b32_e32 v33, s17 ; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v29, s19 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_u32_e32 v0, 3, v63 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v0, v0, v51, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v39 +; GFX9-NEXT: v_perm_b32 v31, v0, v57, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v39, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v62, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v30, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v54, s4 -; GFX9-NEXT: v_add_u32_e32 v63, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v28, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; GFX9-NEXT: v_perm_b32 v37, v0, v1, s4 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v37, 0x300, v37 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v27, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v38, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v38 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v35, s4 -; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v36 +; GFX9-NEXT: v_perm_b32 v26, v0, v54, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v25, v0, v1, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v44 +; GFX9-NEXT: v_perm_b32 v24, v0, v41, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v49, s4 -; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v23, v0, v50, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v42 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v32 -; GFX9-NEXT: v_perm_b32 v0, v0, v58, s4 -; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v32, s23 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v42, s4 -; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v59 -; GFX9-NEXT: v_perm_b32 v0, v0, v47, s4 -; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v53 -; GFX9-NEXT: v_perm_b32 v0, v0, v60, s4 -; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v56 -; GFX9-NEXT: v_perm_b32 v0, v0, v44, s4 -; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v55 -; GFX9-NEXT: v_perm_b32 v0, v0, v57, s4 -; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v45 -; GFX9-NEXT: v_perm_b32 v0, v0, v51, s4 -; GFX9-NEXT: v_add_u32_e32 v49, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v40 -; GFX9-NEXT: v_perm_b32 v0, v0, v41, s4 -; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v50 -; GFX9-NEXT: v_perm_b32 v0, v0, v52, s4 -; GFX9-NEXT: v_add_u32_e32 v52, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v22, 0xffff, v22 -; GFX9-NEXT: v_lshl_or_b32 v21, v21, 16, v22 -; GFX9-NEXT: v_and_b32_e32 v22, 0xffff, v24 -; GFX9-NEXT: v_lshl_or_b32 v22, v23, 16, v22 -; GFX9-NEXT: v_and_b32_e32 v23, 0xffff, v26 -; GFX9-NEXT: v_lshl_or_b32 v23, v25, 16, v23 -; GFX9-NEXT: v_and_b32_e32 v25, 0xffff, v30 -; GFX9-NEXT: v_lshl_or_b32 v25, v29, 16, v25 -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v24, 0xffff, v28 -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v24, v27, 16, v24 -; GFX9-NEXT: v_and_b32_e32 v27, 0xffff, v63 -; GFX9-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; GFX9-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; GFX9-NEXT: v_lshl_or_b32 v19, v52, 16, v19 -; GFX9-NEXT: v_lshl_or_b32 v20, v49, 16, v20 -; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_perm_b32 v22, v0, v36, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v49, 0x300, v22 +; GFX9-NEXT: v_add_u32_e32 v36, 0x300, v30 +; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v28 +; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v26 +; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v21 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v39 -; GFX9-NEXT: v_perm_b32 v0, v0, v37, s4 -; GFX9-NEXT: v_add_u32_e32 v37, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v50, v0, v35, s4 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; GFX9-NEXT: v_lshl_or_b32 v18, v37, 16, v18 +; GFX9-NEXT: v_mov_b32_e32 v35, s17 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v51, v0, v1, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v56 +; GFX9-NEXT: v_perm_b32 v52, v0, v33, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u32_e32 v54, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v53, v0, v1, s4 ; GFX9-NEXT: v_add_u32_e32 v0, 3, v34 -; GFX9-NEXT: v_mov_b32_e32 v34, s19 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v54, v0, v43, s4 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v34, s23 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v55, v0, v63, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v61 +; GFX9-NEXT: v_perm_b32 v40, v0, v45, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v40 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v41, v0, v32, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v58 +; GFX9-NEXT: v_perm_b32 v42, v0, v46, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v42 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v20, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v0, 3, v47 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v44, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v55, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v16, v55, 16, v16 +; GFX9-NEXT: v_perm_b32 v19, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; GFX9-NEXT: v_perm_b32 v46, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v45, 0x300, v46 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v40, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v15, v40, 16, v15 +; GFX9-NEXT: v_perm_b32 v47, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v40, 0x300, v47 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX9-NEXT: v_perm_b32 v56, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v46, 0x300, v56 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v41, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v14, v41, 16, v14 +; GFX9-NEXT: v_perm_b32 v57, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; GFX9-NEXT: v_perm_b32 v59, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v47, 0x300, v59 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v42, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v13, v42, 16, v13 +; GFX9-NEXT: v_perm_b32 v61, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v42, 0x300, v61 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX9-NEXT: v_perm_b32 v62, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v56, 0x300, v62 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u32_e32 v43, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v63, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v43, 0x300, v63 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v12, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; GFX9-NEXT: v_mov_b32_e32 v0, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v32, s22, v32, v0 -; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v32 -; GFX9-NEXT: v_perm_b32 v33, s16, v33, v0 -; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v33 -; GFX9-NEXT: v_and_b32_e32 v33, 0xffff, v33 -; GFX9-NEXT: v_lshl_or_b32 v12, v43, 16, v12 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, s74, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v1 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX9-NEXT: v_perm_b32 v35, s16, v35, v0 +; GFX9-NEXT: v_perm_b32 v34, s22, v34, v0 +; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v18, s74, v1, v0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: v_add_u32_e32 v44, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v11, v1, v2, s4 ; GFX9-NEXT: v_mov_b32_e32 v1, s62 -; GFX9-NEXT: v_perm_b32 v1, s72, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v17, s72, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s44 -; GFX9-NEXT: v_perm_b32 v1, s56, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v45, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v8, s56, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s57 -; GFX9-NEXT: v_perm_b32 v1, s60, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v9, s60, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s13 -; GFX9-NEXT: v_perm_b32 v1, s40, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v46, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v10, s40, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s41 -; GFX9-NEXT: v_perm_b32 v1, s76, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v16, s76, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s9 -; GFX9-NEXT: v_perm_b32 v1, s11, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v47, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v15, s11, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s73 -; GFX9-NEXT: v_perm_b32 v1, s75, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v7, s75, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s45 -; GFX9-NEXT: v_perm_b32 v1, s58, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v56, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v14, s58, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s61 -; GFX9-NEXT: v_perm_b32 v1, s63, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v13, s63, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s42 -; GFX9-NEXT: v_perm_b32 v1, s46, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v57, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v6, s46, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s47 -; GFX9-NEXT: v_perm_b32 v1, s59, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v5, s59, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s12 -; GFX9-NEXT: v_perm_b32 v1, s14, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v58, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v4, s14, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s15 -; GFX9-NEXT: v_perm_b32 v1, s43, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v58, s43, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s8 -; GFX9-NEXT: v_perm_b32 v1, s10, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v59, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v60, s10, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s29 -; GFX9-NEXT: v_perm_b32 v1, s28, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v3, s28, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s6 -; GFX9-NEXT: v_perm_b32 v1, s7, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v60, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v32, s7, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s25 -; GFX9-NEXT: v_perm_b32 v1, s24, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v2, s24, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s27 -; GFX9-NEXT: v_perm_b32 v1, s26, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v61, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v33, s26, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s21 ; GFX9-NEXT: v_perm_b32 v1, s20, v1, v0 +; GFX9-NEXT: v_perm_b32 v0, s18, v29, v0 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v35 +; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 +; GFX9-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 +; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v29 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v34 ; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: v_lshl_or_b32 v1, v32, 16, v1 -; GFX9-NEXT: v_and_b32_e32 v32, 0xffff, v54 -; GFX9-NEXT: v_lshl_or_b32 v17, v17, 16, v32 -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v29, 0xffff, v29 -; GFX9-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; GFX9-NEXT: v_lshl_or_b32 v29, v30, 16, v29 -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v26, v31, 16, v26 -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 +; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 +; GFX9-NEXT: v_lshl_or_b32 v1, v29, 16, v1 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v33 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_lshl_or_b32 v2, v29, 16, v2 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v32 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX9-NEXT: v_lshl_or_b32 v3, v29, 16, v3 +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v35, 0x300, v31 +; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v39 +; GFX9-NEXT: v_add_u32_e32 v39, 0x300, v25 +; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v50 +; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v9 +; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v17 +; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v10 +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_add_u32_e32 v34, 0x300, v48 +; GFX9-NEXT: v_add_u32_e32 v48, 0x300, v23 +; GFX9-NEXT: v_add_u32_e32 v50, 0x300, v51 +; GFX9-NEXT: v_add_u32_e32 v51, 0x300, v53 +; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v54 +; GFX9-NEXT: v_add_u32_e32 v53, 0x300, v41 +; GFX9-NEXT: v_add_u32_e32 v54, 0x300, v20 +; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v44 +; GFX9-NEXT: v_add_u32_e32 v44, 0x300, v18 +; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v8 +; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 +; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v17 +; GFX9-NEXT: v_lshl_or_b32 v10, v18, 16, v10 +; GFX9-NEXT: v_and_b32_e32 v18, 0xffff, v53 +; GFX9-NEXT: v_and_b32_e32 v17, 0xffff, v54 +; GFX9-NEXT: v_lshl_or_b32 v18, v21, 16, v18 +; GFX9-NEXT: v_and_b32_e32 v21, 0xffff, v50 +; GFX9-NEXT: v_lshl_or_b32 v17, v20, 16, v17 +; GFX9-NEXT: v_and_b32_e32 v20, 0xffff, v51 +; GFX9-NEXT: v_lshl_or_b32 v20, v23, 16, v20 +; GFX9-NEXT: v_and_b32_e32 v23, 0xffff, v48 +; GFX9-NEXT: v_lshl_or_b32 v23, v26, 16, v23 +; GFX9-NEXT: v_and_b32_e32 v26, 0xffff, v37 +; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 +; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v11 +; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v16 +; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 +; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v6, 16, v13 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v44 +; GFX9-NEXT: v_add_u32_e32 v41, 0x300, v57 +; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v15 +; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v14 +; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v4 +; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v58 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v27, v28, 16, v27 -; GFX9-NEXT: v_and_b32_e32 v28, 0xffff, v38 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v33 -; GFX9-NEXT: v_lshl_or_b32 v2, v61, 16, v2 -; GFX9-NEXT: v_lshl_or_b32 v3, v60, 16, v3 -; GFX9-NEXT: v_lshl_or_b32 v4, v59, 16, v4 -; GFX9-NEXT: v_lshl_or_b32 v5, v58, 16, v5 -; GFX9-NEXT: v_lshl_or_b32 v6, v57, 16, v6 -; GFX9-NEXT: v_lshl_or_b32 v7, v56, 16, v7 -; GFX9-NEXT: v_lshl_or_b32 v8, v47, 16, v8 -; GFX9-NEXT: v_lshl_or_b32 v9, v46, 16, v9 -; GFX9-NEXT: v_lshl_or_b32 v10, v45, 16, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v44, 16, v11 -; GFX9-NEXT: v_lshl_or_b32 v28, v62, 16, v28 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_and_b32_e32 v30, 0xffff, v30 +; GFX9-NEXT: v_lshl_or_b32 v11, v11, 16, v13 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v43 +; GFX9-NEXT: v_add_u32_e32 v57, 0x300, v60 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v16, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v7, v14, 16, v7 +; GFX9-NEXT: v_lshl_or_b32 v8, v15, 16, v8 +; GFX9-NEXT: v_lshl_or_b32 v12, v12, 16, v13 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v42 +; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v41 +; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v40 +; GFX9-NEXT: v_lshl_or_b32 v4, v57, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v13, v56, 16, v13 +; GFX9-NEXT: v_lshl_or_b32 v14, v47, 16, v14 +; GFX9-NEXT: v_lshl_or_b32 v15, v46, 16, v15 ; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29 +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29 +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v29 +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29 +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v29 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v27 +; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v24 +; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v52 +; GFX9-NEXT: v_add_u32_e32 v52, 0x300, v55 +; GFX9-NEXT: v_add_u32_e32 v55, 0x300, v19 +; GFX9-NEXT: v_and_b32_e32 v19, 0xffff, v52 +; GFX9-NEXT: v_lshl_or_b32 v19, v22, 16, v19 +; GFX9-NEXT: v_and_b32_e32 v22, 0xffff, v49 +; GFX9-NEXT: v_lshl_or_b32 v22, v25, 16, v22 +; GFX9-NEXT: v_and_b32_e32 v25, 0xffff, v38 +; GFX9-NEXT: v_lshl_or_b32 v25, v28, 16, v25 +; GFX9-NEXT: v_and_b32_e32 v28, 0xffff, v35 +; GFX9-NEXT: v_lshl_or_b32 v28, v31, 16, v28 +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshl_or_b32 v21, v24, 16, v21 +; GFX9-NEXT: v_and_b32_e32 v24, 0xffff, v39 +; GFX9-NEXT: v_lshl_or_b32 v24, v27, 16, v24 +; GFX9-NEXT: v_and_b32_e32 v27, 0xffff, v36 +; GFX9-NEXT: v_lshl_or_b32 v27, v30, 16, v27 +; GFX9-NEXT: v_and_b32_e32 v30, 0xffff, v33 +; GFX9-NEXT: v_lshl_or_b32 v26, v29, 16, v26 +; GFX9-NEXT: v_and_b32_e32 v29, 0xffff, v34 +; GFX9-NEXT: v_lshl_or_b32 v29, v32, 16, v29 +; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: v_and_b32_e32 v16, 0xffff, v55 +; GFX9-NEXT: v_lshl_or_b32 v16, v45, 16, v16 +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_lshl_or_b32 v30, v31, 16, v30 -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31 @@ -175327,10 +175514,12 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v64f16_scalar: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x2 ; 12-byte Folded Spill +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:328 +; GFX11-TRUE16-NEXT: ; meta instruction +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:324 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:320 ; GFX11-TRUE16-NEXT: s_clause 0x1f ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:312 ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:308 @@ -175453,13 +175642,14 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, 0xc0c0004 :: v_dual_lshlrev_b32 v13, 8, v86 -; GFX11-TRUE16-NEXT: s_and_b32 s76, s43, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s77, s11, 8 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 8, v37 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: s_and_b32 s76, s63, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s77, s57, 8 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s56, 0xff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v8 +; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s5, 8 ; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v8 @@ -175467,140 +175657,138 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l ; GFX11-TRUE16-NEXT: v_perm_b32 v5, s9, s4, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v8 +; GFX11-TRUE16-NEXT: s_or_b32 s76, s76, s77 +; GFX11-TRUE16-NEXT: s_or_b32 s77, s78, s79 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s43, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s11, 8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l ; GFX11-TRUE16-NEXT: v_perm_b32 v6, s40, s8, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v7, s14, s7, v8 -; GFX11-TRUE16-NEXT: s_or_b32 s76, s76, s77 +; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 +; GFX11-TRUE16-NEXT: s_or_b32 s77, s78, s79 ; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v9, s12, s6, v8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l ; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v8 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s76 :: v_dual_lshlrev_b32 v15, 8, v70 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s77 :: v_dual_lshlrev_b32 v15, 8, v70 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l ; GFX11-TRUE16-NEXT: v_perm_b32 v5, s61, s45, v8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l ; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s15, v8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v7.l ; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s58, v8 +; GFX11-TRUE16-NEXT: s_and_b32 s77, s62, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s78, s47, 8 +; GFX11-TRUE16-NEXT: s_and_b32 s79, s46, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s88, s13, 8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l ; GFX11-TRUE16-NEXT: v_perm_b32 v9, s59, s44, v8 +; GFX11-TRUE16-NEXT: s_or_b32 s77, s77, s78 +; GFX11-TRUE16-NEXT: s_or_b32 s78, s79, s88 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v10.l ; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v68 -; GFX11-TRUE16-NEXT: s_and_b32 s88, s41, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s89, s10, 8 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 8, v37 +; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s77, s77, s78 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s41, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s10, 8 ; GFX11-TRUE16-NEXT: v_perm_b32 v11, s73, s42, v8 -; GFX11-TRUE16-NEXT: s_or_b32 s88, s88, s89 +; GFX11-TRUE16-NEXT: s_or_b32 s78, s78, s79 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v12 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s88 -; GFX11-TRUE16-NEXT: s_and_b32 s88, s74, 0xff -; GFX11-TRUE16-NEXT: s_and_b32 s77, s63, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s76, s57, 8 -; GFX11-TRUE16-NEXT: s_and_b32 s78, s56, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s5, 8 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s78 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v114 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, s88, v13 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s74, 0xff +; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xff, v83 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, s78, v13 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v10.l ; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v38 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 8, v32 -; GFX11-TRUE16-NEXT: s_or_b32 s76, s77, s76 -; GFX11-TRUE16-NEXT: s_or_b32 s77, s78, s79 -; GFX11-TRUE16-NEXT: s_and_b32 s78, s62, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s47, 8 -; GFX11-TRUE16-NEXT: s_and_b32 s88, s46, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s89, s13, 8 -; GFX11-TRUE16-NEXT: s_or_b32 s78, s78, s79 -; GFX11-TRUE16-NEXT: s_or_b32 s79, s88, s89 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v8.l ; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v14, v15 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v83 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 8, v33 -; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xff, v50 -; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s77, s78, s79 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v50 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 8, v33 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 8, v39 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v13 ; GFX11-TRUE16-NEXT: v_perm_b32 v13, v134, v96, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v8.l -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v15, v16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v17 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v53, v34, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s76 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v14, v15 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v17 ; GFX11-TRUE16-NEXT: v_perm_b32 v15, v99, v65, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v8.l -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v66, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v53, v34, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v71, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v18.l +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v66, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v69, v36, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v16, v97, v48, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v71, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v84, v49, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v17.l ; GFX11-TRUE16-NEXT: v_perm_b32 v17, v103, v54, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v8.l -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v69, v36, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v98, v52, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l ; GFX11-TRUE16-NEXT: v_perm_b32 v18, v116, v67, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v84, v49, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v113, v55, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v24, 0xff, v117 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 8, v64 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xff, v164 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 8, v119 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v19.l ; GFX11-TRUE16-NEXT: v_perm_b32 v19, v130, v80, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v8.l -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v98, v52, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v118, v85, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v131 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 8, v82 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l ; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v112, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v113, v55, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v21.l ; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v81, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v8.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l ; GFX11-TRUE16-NEXT: v_perm_b32 v22, v147, v100, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v118, v85, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v117 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 8, v64 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v23.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v24, v25 ; GFX11-TRUE16-NEXT: v_perm_b32 v23, v151, v115, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v8.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v164 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 8, v119 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v26, 0xff, v131 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 8, v82 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v24 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v28, 0xff, v149 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v8, v25 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v27, v28 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xff, v144 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 8, v87 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v26.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v29, v30 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v167 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 8, v128 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v25.l ; GFX11-TRUE16-NEXT: v_perm_b32 v25, v176, v148, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v26, v27 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v144 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 8, v87 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 8, v128 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v8.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v167 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 8, v101 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v26 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v27, v28 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v28, 0xff, v149 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v101 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v29, v30 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v162 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 8, v132 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v28, v31 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v31, 0xff, v179 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 8, v150 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v40, 8, v102 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v29, v30 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v30, 0xff, v160 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v102 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v8, v27 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v28, v29 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v162 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 8, v132 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v27.l ; GFX11-TRUE16-NEXT: v_perm_b32 v27, v177, v146, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v8.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v179 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 8, v150 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v28 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v30, v31 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v133 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v40, 0xff, v182 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v8, v29 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v166 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v165 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 8, v129 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v41, v29, v31 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v178 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v31, v183 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v29.l +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v165 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v129 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v30, v40 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v183, 0xff, v166 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v40, 8, v133 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v41, 0xff, v182 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v42, 8, v178 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v29, v31 ; GFX11-TRUE16-NEXT: v_perm_b32 v29, v181, v163, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v183, v8, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v183, v183, v40 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s76 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v40, v31 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v41, v42 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v31.l ; GFX11-TRUE16-NEXT: v_perm_b32 v31, v180, v161, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v10.l ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, s77 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v183.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v41.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v183.l ; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB93_3 ; GFX11-TRUE16-NEXT: .LBB93_2: ; %cmp.true @@ -175833,9 +176021,10 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v129.l ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v133.l ; GFX11-TRUE16-NEXT: .LBB93_3: ; %end -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload -; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:320 -; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x2 ; 12-byte Folded Reload +; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:324 +; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:328 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-TRUE16-NEXT: .LBB93_4: @@ -175846,7 +176035,14 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX11-FAKE16-LABEL: bitcast_v128i8_to_v64f16_scalar: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:320 ; 4-byte Folded Spill +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:332 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:328 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:324 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:320 ; GFX11-FAKE16-NEXT: s_clause 0x1f ; GFX11-FAKE16-NEXT: scratch_load_u16 v166, off, s32 offset:312 ; GFX11-FAKE16-NEXT: scratch_load_u16 v180, off, s32 offset:308 @@ -175968,11 +176164,10 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB93_4 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_and_b32 s76, s74, 0xff -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2) -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 8, v33 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xff, v48 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 8, v32 +; GFX11-FAKE16-NEXT: s_and_b32 s76, s58, 0xff +; GFX11-FAKE16-NEXT: s_lshl_b32 s77, s47, 8 +; GFX11-FAKE16-NEXT: s_lshl_b32 s78, s13, 8 +; GFX11-FAKE16-NEXT: s_or_b32 s76, s76, s77 ; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v8 ; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v8 ; GFX11-FAKE16-NEXT: v_perm_b32 v4, s20, s21, v8 @@ -175987,175 +176182,164 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v0 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v2 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v5, 16, v4 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s11, s8, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s11, s8, v8 +; GFX11-FAKE16-NEXT: s_and_b32 s77, s40, 0xff +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s7, s5, v8 +; GFX11-FAKE16-NEXT: s_or_b32 s77, s77, s78 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s44, s41, v8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s6, s4, v8 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s7, s5, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v4 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v67, v51, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v16, v80, v66, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v5, 16, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v68, v55, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v10, 16, v11 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v35 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v8 ; GFX11-FAKE16-NEXT: v_perm_b32 v9, s42, s15, v8 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s44, s41, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v18, v69, v52, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v7, 16, v3 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s12, s9, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v17, 16, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v116, v103, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_lshl_b32 s77, s43, 8 -; GFX11-FAKE16-NEXT: v_perm_b32 v22, v118, v101, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v7, 16, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s14, s10, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, s76, v11 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v38 -; GFX11-FAKE16-NEXT: s_and_b32 s76, s46, 0xff -; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v7, 16, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v11, v12 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v13, v14 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v15 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v53 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 8, v37 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v9, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xff, v49 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 8, v36 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v11, 16, v13 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v14, v15 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v50 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 8, v34 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v65, v39, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-FAKE16-NEXT: s_or_b32 s76, s76, s77 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v14, v15 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v82, v64, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v22 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v115, v99, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xff, v130 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v14 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v9, 16, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, v96, v85, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v15, 16, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v71, v54, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v98, v83, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v18, 16, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s6, s4, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s12, s9, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, s14, s10, v8 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v86, v81, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 8, v117 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 8, v144 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v10, 16, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, v102, v84, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s60, s57, v8 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v19, 16, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v87, v70, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 8, v135 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v150 -; GFX11-FAKE16-NEXT: s_lshl_b32 s77, s47, 8 -; GFX11-FAKE16-NEXT: s_and_b32 s78, s40, 0xff -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v11, 16, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v112, v100, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, s76, 16, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v132, v129, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_and_b32 s76, s58, 0xff -; GFX11-FAKE16-NEXT: s_lshl_b32 s79, s13, 8 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v21, v11, 16, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v113, v97, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v10, 16, v5 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 8, v35 +; GFX11-FAKE16-NEXT: s_and_b32 s89, s74, 0xff +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v7, 16, v3 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v4, 16, v6 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v12, 16, v9 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v13, 16, v11 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v38 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 8, v33 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, s89, v10 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xff, v48 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 8, v32 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xff, v53 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v11, v12 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: s_or_b32 s76, s76, s77 -; GFX11-FAKE16-NEXT: s_or_b32 s77, s78, s79 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s73, s72, v8 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v22, v11, 16, v22 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v23, v23, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v134 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v119 -; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 8, v37 +; GFX11-FAKE16-NEXT: s_and_b32 s79, s46, 0xff +; GFX11-FAKE16-NEXT: s_lshl_b32 s88, s43, 8 ; GFX11-FAKE16-NEXT: s_and_b32 s77, s62, 0xff +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v12, 16, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v13, v14 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v15, v16 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 8, v36 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s60, s57, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s73, s72, v8 +; GFX11-FAKE16-NEXT: s_or_b32 s78, s79, s88 +; GFX11-FAKE16-NEXT: s_and_b32 s79, s56, 0xff +; GFX11-FAKE16-NEXT: s_lshl_b32 s88, s45, 8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v49 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xff, v50 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 8, v34 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, s78, 16, v9 ; GFX11-FAKE16-NEXT: s_lshl_b32 s78, s59, 8 -; GFX11-FAKE16-NEXT: s_lshl_b32 s79, s45, 8 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v24, v25 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xff, v131 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 8, v114 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v65, v39, 0xc0c0004 ; GFX11-FAKE16-NEXT: s_or_b32 s77, s77, s78 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: s_and_b32 s78, s56, 0xff -; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v24, v25 -; GFX11-FAKE16-NEXT: v_perm_b32 v24, v146, v128, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_or_b32 s78, s78, s79 +; GFX11-FAKE16-NEXT: s_or_b32 s78, s79, s88 ; GFX11-FAKE16-NEXT: s_and_b32 s79, s63, 0xff ; GFX11-FAKE16-NEXT: s_lshl_b32 s88, s61, 8 ; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s77, s77, s78 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xffff, v24 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v24, v11, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v160 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v147 ; GFX11-FAKE16-NEXT: s_or_b32 s78, s79, s88 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v25, v25, 16, v26 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xff, v148 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v26, v27 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xff, v149 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 8, v133 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v26, v27 -; GFX11-FAKE16-NEXT: v_perm_b32 v26, v162, v145, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff, v26 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v11, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v177 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v164 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v27, v27, 16, v28 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xff, v151 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v28, v29 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xff, v176 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 8, v161 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v28, v29 -; GFX11-FAKE16-NEXT: v_perm_b32 v28, v179, v163, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xffff, v28 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v28, v11, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v181 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v165 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v29, v29, 16, v30 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xff, v178 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v180 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v30, v31 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v166 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s77 :: v_dual_and_b32 v183, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v11, v31 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v182, v167, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v30, 16, v183 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v40, 0xffff, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v14, v15 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, s78, 16, v8 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, s76 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v31, 16, v40 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, v67, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v13 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v16, v17 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v18 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v69, v52, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v14, 16, v15 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v96, v85, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v16, 16, v17 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v68, v55, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v10, 16, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, v80, v66, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, v82, v64, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v102, v84, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v116, v103, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v20 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v87, v70, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v21 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v112, v100, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v16, 16, v17 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v18, 16, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v71, v54, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v98, v83, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff, v23 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v118, v101, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v86, v81, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v18, 16, v20 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v24, 16, v21 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v21, v25, 16, v23 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff, v26 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xff, v134 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 8, v119 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xff, v130 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 8, v117 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v22, 16, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v113, v97, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v132, v129, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v25, v26 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v27, v28 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xff, v131 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 8, v114 +; GFX11-FAKE16-NEXT: v_perm_b32 v29, v146, v128, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xff, v160 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v147 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v22, v22, 16, v23 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v115, v99, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xffff, v25 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v27, v28 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff, v29 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v29, 0xff, v148 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 8, v144 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v30, v31 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v23, v23, 16, v24 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v24, v26, 16, v25 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v25, v27, 16, v28 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v29, v183 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xffff, v30 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xff, v149 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 8, v133 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xff, v177 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v164 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v183, 0xff, v151 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v40, 8, v135 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v41, 0xff, v176 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v42, 8, v161 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v26, 16, v27 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v28, v29 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v30, v31 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v183, v40 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v41, v42 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v31, 0xff, v181 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 8, v165 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v40, 0xff, v178 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v41, 8, v150 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v42, 0xff, v180 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v43, 8, v166 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v31, v183 +; GFX11-FAKE16-NEXT: v_perm_b32 v183, v162, v145, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v40, v40, v41 +; GFX11-FAKE16-NEXT: v_perm_b32 v41, v179, v163, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v42, v42, v43 +; GFX11-FAKE16-NEXT: v_perm_b32 v43, v182, v167, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v183, 0xffff, v183 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff, v28 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v41, 0xffff, v41 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s76 :: v_dual_and_b32 v43, 0xffff, v43 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, s77 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v27, v27, 16, v183 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v28, v29, 16, v28 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v29, v30, 16, v41 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v40, 16, v31 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v42, 16, v43 ; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB93_3 ; GFX11-FAKE16-NEXT: .LBB93_2: ; %cmp.true @@ -176420,7 +176604,11 @@ define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v30, 16, v34 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v31, 16, v35 ; GFX11-FAKE16-NEXT: .LBB93_3: ; %end -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:320 ; 4-byte Folded Reload +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:320 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:324 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:328 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:332 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-FAKE16-NEXT: .LBB93_4: @@ -176464,751 +176652,756 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v32, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:8 +; SI-NEXT: v_mov_b32_e32 v31, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:8 ; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 -; SI-NEXT: v_mov_b32_e32 v31, v3 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v30 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v29 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: v_mov_b32_e32 v32, v2 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v30 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v28 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v29 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v27 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v28 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v26 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v27 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v25 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v24 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v25 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v23 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v24 +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v22 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v21 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v22 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v20 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v19 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v20 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v18 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v17 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v18 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v16 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v17 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v15 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v16 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v14 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v15 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v13 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v14 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v11 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v13 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v10 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v11 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v9 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v9 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v7 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v4 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v31 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v7 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v32 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v47 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v5 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr2 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v5 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; kill: killed $vgpr2 ; SI-NEXT: ; implicit-def: $vgpr2 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v12 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v57 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; kill: killed $vgpr2 ; SI-NEXT: ; implicit-def: $vgpr2 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr2 +; SI-NEXT: ; implicit-def: $vgpr2 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v6 ; SI-NEXT: ; kill: killed $vgpr2 ; SI-NEXT: ; implicit-def: $vgpr2 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: ; kill: killed $vgpr2 +; SI-NEXT: ; implicit-def: $vgpr2 ; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr63 -; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr60 -; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr6 ; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 ; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr44 ; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; kill: killed $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr6 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; kill: killed $vgpr42 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v4 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v3 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v32 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v47 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v52 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; kill: killed $vgpr4 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB94_2 ; SI-NEXT: ; %bb.1: ; %cmp.false +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v4 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_mov_b32_e32 v42, v40 -; SI-NEXT: v_mov_b32_e32 v6, v53 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v52, v2, v31 +; SI-NEXT: v_mov_b32_e32 v42, v40 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v45 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v43 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v45 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v51, v2, v31 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v31 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v51, v31, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v43 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v50, v31, v32 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v48, v5, v31 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v40 ; SI-NEXT: v_mov_b32_e32 v40, v55 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v49, v5, v31 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v7 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v38, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v55 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v39, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v9 +; SI-NEXT: v_mov_b32_e32 v55, v53 ; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v37, v5, v7 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v10 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v55 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v36, v5, v7 -; SI-NEXT: v_alignbit_b32 v5, v2, v52, 24 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v53 +; SI-NEXT: v_or_b32_e32 v37, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v11 ; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v34, v5, v7 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v53 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v57 ; SI-NEXT: v_or_b32_e32 v35, v5, v7 -; SI-NEXT: v_alignbit_b32 v5, v2, v52, 16 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v5, v51, v1, 24 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v13 ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v32, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v14 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v6 ; SI-NEXT: v_or_b32_e32 v33, v5, v7 -; SI-NEXT: v_alignbit_b32 v5, v2, v52, 8 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v5, v51, v1, 16 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v15 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v63, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v16 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v14 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v15 ; SI-NEXT: v_or_b32_e32 v31, v5, v7 -; SI-NEXT: v_alignbit_b32 v5, v50, v51, 24 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v5, v51, v1, 8 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v17 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v61, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v18 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v13 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v14 ; SI-NEXT: v_or_b32_e32 v62, v5, v7 -; SI-NEXT: v_alignbit_b32 v5, v50, v51, 16 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v5, v50, v2, 24 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v19 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v59, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v20 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v13 ; SI-NEXT: v_or_b32_e32 v60, v5, v7 -; SI-NEXT: v_alignbit_b32 v5, v50, v51, 8 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v5, v50, v2, 16 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v21 ; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v20, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v22 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v11 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v12 ; SI-NEXT: v_or_b32_e32 v58, v5, v7 -; SI-NEXT: v_alignbit_b32 v5, v49, v48, 24 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v5, v50, v2, 8 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v23 ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v19, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v10 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v11 ; SI-NEXT: v_or_b32_e32 v56, v5, v7 -; SI-NEXT: v_alignbit_b32 v5, v49, v48, 16 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v5, v49, v48, 24 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v25 ; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v18, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v26 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v10 ; SI-NEXT: v_or_b32_e32 v46, v5, v7 -; SI-NEXT: v_alignbit_b32 v5, v49, v48, 8 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v5, v49, v48, 16 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v27 ; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v17, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v28 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v9 ; SI-NEXT: v_or_b32_e32 v44, v5, v7 -; SI-NEXT: v_alignbit_b32 v5, v39, v38, 24 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v5, v49, v48, 8 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v29 ; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4 ; SI-NEXT: v_or_b32_e32 v16, v5, v7 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v30 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 ; SI-NEXT: v_or_b32_e32 v41, v5, v7 -; SI-NEXT: v_alignbit_b32 v5, v39, v38, 16 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v5, v39, v38, 24 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_or_b32_e32 v5, v4, v3 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v47 -; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v52 +; SI-NEXT: v_or_b32_e32 v7, v5, v3 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v47 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr30 +; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: ; implicit-def: $vgpr47 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 -; SI-NEXT: v_or_b32_e32 v54, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v39, v38, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 +; SI-NEXT: v_or_b32_e32 v54, v3, v4 +; SI-NEXT: v_alignbit_b32 v3, v39, v38, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v36, v37, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v39, v38, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v36, v37, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v37, v36, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v36, v37, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v37, v36, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v35, v34, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v37, v36, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v35, v34, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v35, v34, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v35, v34, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v35, v34, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v33, v32, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v35, v34, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v33, v32, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v33, v32, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v33, v32, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v33, v32, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v31, v63, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v33, v32, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v31, v63, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v31, v63, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v31, v63, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v31, v63, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v62, v61, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v31, v63, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v62, v61, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v62, v61, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v62, v61, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v62, v61, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v60, v59, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v62, v61, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v60, v59, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v60, v59, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v60, v59, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v60, v59, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v58, v20, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v60, v59, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v58, v20, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v1, v58, v20, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v58, v20, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v56, v19, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v58, v20, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v56, v19, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v58, v20, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v3, v56, v19, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v3, v56, v19, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v1, v56, v19, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v56, v19, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v46, v18, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v46, v18, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v46, v18, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v46, v18, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v1, v46, v18, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v46, v18, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v44, v17, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v44, v17, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v44, v17, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v44, v17, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v44, v17, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v44, v17, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v41, v16, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v41, v16, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v41, v16, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v41, v16, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v41, v16, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v41, v16, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v54, v5, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v54, v7, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v54, v5, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v54, v7, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v54, v5, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v54, v7, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v2 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v51 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v50 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v50 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v49 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v49 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v39 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v39 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v36 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v37 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v35 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v35 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v33 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v33 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v31 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v31 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v62 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v62 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v60 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v60 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v58 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v58 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v56 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v56 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v46 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v46 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v44 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v44 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v41 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v41 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v54 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v54 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v45, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v45, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v43, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v43, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v42, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v42, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v40, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v40, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v55, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v55, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v6, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v57, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v53, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v6, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v14, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v15, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v13, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v14, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v12, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v13, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v11, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v12, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v10, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v11, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v9, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v10, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v15, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v9, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v8, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: v_bfe_u32 v3, v8, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_bfe_u32 v3, v5, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; kill: killed $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr3 ; SI-NEXT: v_mov_b32_e32 v45, v17 ; SI-NEXT: v_mov_b32_e32 v43, v16 +; SI-NEXT: v_mov_b32_e32 v6, v20 ; SI-NEXT: v_mov_b32_e32 v55, v40 ; SI-NEXT: v_mov_b32_e32 v40, v42 -; SI-NEXT: v_mov_b32_e32 v42, v5 -; SI-NEXT: v_mov_b32_e32 v53, v6 -; SI-NEXT: v_bfe_u32 v6, v4, 8, 8 ; SI-NEXT: ; implicit-def: $vgpr5 +; SI-NEXT: ; implicit-def: $vgpr7 ; SI-NEXT: ; implicit-def: $vgpr8 ; SI-NEXT: ; implicit-def: $vgpr9 ; SI-NEXT: ; implicit-def: $vgpr10 @@ -177222,36 +177415,38 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: ; implicit-def: $vgpr20 -; SI-NEXT: ; implicit-def: $vgpr4 -; SI-NEXT: ; kill: killed $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; kill: killed $vgpr1 +; SI-NEXT: ; kill: killed $vgpr3 ; SI-NEXT: ; implicit-def: $vgpr3 ; SI-NEXT: .LBB94_2: ; %Flow -; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] +; SI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5] +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; SI-NEXT: s_xor_b64 exec, exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB94_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: v_cvt_f32_f16_e32 v2, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v57 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v1, v47 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v52 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v22 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v42, v3, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_or_b32_e32 v42, v2, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v2, v47 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v2, v2 -; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v6 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v52, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v52 ; SI-NEXT: v_or_b32_e32 v54, v1, v2 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f32_f16_e32 v2, v29 @@ -177283,7 +177478,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v45, v2, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f32_f16_e32 v2, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v1, v1 @@ -177292,7 +177487,6 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v27 -; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: v_or_b32_e32 v44, v1, v2 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f32_f16_e32 v2, v25 @@ -177304,7 +177498,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v28, v2, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f32_f16_e32 v2, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v1, v1 @@ -177324,47 +177518,44 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v26, v2, v1 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: v_cvt_f32_f16_e32 v1, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v2 -; SI-NEXT: v_mov_b32_e32 v24, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v21 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v2, v24 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v23 -; SI-NEXT: v_or_b32_e32 v56, v1, v3 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v23 +; SI-NEXT: v_or_b32_e32 v56, v1, v2 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v2, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v22 -; SI-NEXT: v_or_b32_e32 v22, v3, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v2 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v17 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v21 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v17 -; SI-NEXT: v_or_b32_e32 v58, v2, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_cvt_f32_f16_e32 v2, v19 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_or_b32_e32 v6, v2, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v21 +; SI-NEXT: v_or_b32_e32 v58, v3, v2 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v2, v19 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_cvt_f32_f16_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_or_b32_e32 v59, v2, v1 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) @@ -177375,11 +177566,11 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v19 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v2, v2 ; SI-NEXT: v_or_b32_e32 v60, v3, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 @@ -177399,7 +177590,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v17 ; SI-NEXT: v_or_b32_e32 v62, v1, v3 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v16 @@ -177416,7 +177607,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v15 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v11 ; SI-NEXT: v_or_b32_e32 v31, v2, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f32_f16_e32 v2, v13 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 @@ -177441,71 +177632,72 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v1, v53 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v57 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v34, v4, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v12 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v53, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v57, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v9 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v57 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v53 ; SI-NEXT: v_or_b32_e32 v35, v1, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v53 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v10 -; SI-NEXT: v_or_b32_e32 v37, v3, v1 +; SI-NEXT: v_or_b32_e32 v36, v3, v1 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v53, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v5 -; SI-NEXT: v_or_b32_e32 v36, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v53 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v37, v2, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v7 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v55 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v55, v3 -; SI-NEXT: v_or_b32_e32 v38, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f32_f16_e32 v3, v8 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v55 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_cvt_f32_f16_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_or_b32_e32 v38, v2, v1 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v55 ; SI-NEXT: v_or_b32_e32 v39, v3, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, v40 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v1, v40 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v40, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v2, v2 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v48, v4, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_cvt_f32_f16_e32 v3, v3 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v2, v2 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -177517,306 +177709,304 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v40 ; SI-NEXT: v_or_b32_e32 v49, v1, v3 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v51, v3, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, v24 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v2, v2 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v5 -; SI-NEXT: v_or_b32_e32 v50, v2, v3 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f16_f32_e32 v4, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v7 +; SI-NEXT: v_or_b32_e32 v50, v4, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_cvt_f32_f16_e32 v4, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v1 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v2, v2 -; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v52, v2, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v7 -; SI-NEXT: v_or_b32_e32 v2, v3, v1 -; SI-NEXT: v_alignbit_b32 v1, v2, v52, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v2, v52, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_cvt_f16_f32_e32 v8, v4 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v8 +; SI-NEXT: v_or_b32_e32 v51, v4, v3 +; SI-NEXT: v_alignbit_b32 v3, v51, v1, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v2, v52, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v51, v1, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v50, v51, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v51, v1, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v50, v51, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v50, v2, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v50, v51, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v50, v2, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v49, v48, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v50, v2, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v49, v48, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v49, v48, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v49, v48, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v49, v48, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v39, v38, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v49, v48, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v39, v38, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v39, v38, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v39, v38, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v39, v38, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v36, v37, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v39, v38, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v36, v37, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v37, v36, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v36, v37, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v37, v36, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v35, v34, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v37, v36, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v35, v34, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v35, v34, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v35, v34, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v35, v34, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v33, v32, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v35, v34, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v33, v32, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v33, v32, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v33, v32, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v33, v32, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v31, v63, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v33, v32, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v31, v63, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v31, v63, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v31, v63, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v31, v63, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v62, v61, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v31, v63, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v62, v61, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v62, v61, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v62, v61, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v62, v61, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v60, v59, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v62, v61, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v60, v59, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v60, v59, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v60, v59, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v60, v59, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v58, v22, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v60, v59, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v58, v22, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v1, v58, v22, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v58, v6, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v56, v26, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v58, v6, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v56, v26, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v1, v56, v26, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v58, v6, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v46, v28, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v56, v26, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v46, v28, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v56, v26, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v1, v46, v28, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v56, v26, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v44, v45, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v46, v28, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v44, v45, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v46, v28, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v3, v46, v28, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v44, v45, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v44, v45, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v41, v43, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v44, v45, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v41, v43, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v44, v45, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v41, v43, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v41, v43, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v54, v42, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v41, v43, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v54, v42, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v41, v43, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v54, v42, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v54, v42, 24 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v2 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v3, v54, v42, 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v3, v54, v42, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v50 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v51 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v49 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v50 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v39 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v49 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v36 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v39 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v35 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v37 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v33 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v35 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v31 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v33 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v62 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v31 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v60 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v62 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v58 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v60 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v56 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v58 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v46 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v56 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v44 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v46 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v41 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v44 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v54 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v54 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_bfe_u32 v1, v7, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v8, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_bfe_u32 v1, v5, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v7, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v40, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v40, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v55, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_bfe_u32 v1, v9, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v55, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v53, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v53, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_bfe_u32 v3, v57, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_bfe_u32 v1, v13, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v13, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_bfe_u32 v1, v15, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v15, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_bfe_u32 v1, v17, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v17, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_bfe_u32 v1, v19, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v19, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_bfe_u32 v1, v21, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v21, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_bfe_u32 v1, v23, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v23, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_bfe_u32 v1, v25, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v1, v27, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: v_bfe_u32 v3, v25, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_bfe_u32 v3, v27, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_bfe_u32 v1, v29, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_bfe_u32 v6, v6, 8, 8 +; SI-NEXT: v_bfe_u32 v3, v29, 8, 8 +; SI-NEXT: v_lshrrev_b32_e32 v42, 8, v41 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_bfe_u32 v3, v52, 8, 8 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: .LBB94_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xff, v52 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3 ; SI-NEXT: v_or_b32_e32 v1, v1, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4 @@ -177826,32 +178016,32 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: v_or_b32_e32 v1, v1, v3 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xff, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xff, v51 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 -; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3 +; SI-NEXT: v_or_b32_e32 v1, v1, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0 -; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: v_or_b32_e32 v1, v1, v3 +; SI-NEXT: v_add_i32_e32 v3, vcc, 4, v0 +; SI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xff, v51 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xff, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -177862,14 +178052,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v50 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -177880,14 +178070,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v48 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -177898,8 +178088,8 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v49 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -177917,11 +178107,11 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v38 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -177932,8 +178122,8 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v39 ; SI-NEXT: s_waitcnt vmcnt(1) @@ -177948,14 +178138,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xff, v37 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xff, v36 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -177966,32 +178156,30 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xff, v36 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xff, v37 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v53 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v34 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178002,14 +178190,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v35 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v53 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178018,14 +178206,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v32 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178036,14 +178224,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v33 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178054,14 +178242,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v63 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178075,11 +178263,11 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v31 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178090,14 +178278,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v61 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178111,11 +178299,11 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v62 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178126,14 +178314,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v59 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178144,14 +178332,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x48, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v60 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178162,16 +178350,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x4c, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v6 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178182,14 +178368,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x50, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v58 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178201,15 +178387,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x54, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178220,14 +178406,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x58, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v56 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -178239,15 +178425,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 @@ -178258,14 +178444,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x60, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v46 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 @@ -178276,14 +178462,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v45 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 @@ -178294,14 +178480,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v44 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 @@ -178312,14 +178498,14 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x6c, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v43 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 @@ -178330,32 +178516,32 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v41 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v42 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xff, v42 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 @@ -178366,15 +178552,17 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x78, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v54 -; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v6 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 @@ -178420,992 +178608,1017 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v24 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v31, v30 -; VI-NEXT: v_mov_b32_e32 v30, v29 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:4 -; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v16 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v15 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v13 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v11 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v9 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v7 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v5 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v30 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v31 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v28 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v26 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25 -; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v22 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v21 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v20 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v19 -; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v18 -; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v17 -; VI-NEXT: ; kill: killed $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr38 -; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; kill: killed $vgpr24 +; VI-NEXT: v_mov_b32_e32 v36, v10 +; VI-NEXT: v_mov_b32_e32 v47, v11 +; VI-NEXT: v_mov_b32_e32 v35, v9 +; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v36 +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v35 +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v8 +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v48, v12 +; VI-NEXT: v_mov_b32_e32 v12, v0 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:8 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v16 +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v48 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v47 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v18 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v6 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v4 +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(10) +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; VI-NEXT: v_lshrrev_b32_e32 v0, 16, v20 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(10) +; VI-NEXT: v_lshrrev_b32_e32 v0, 16, v32 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(10) +; VI-NEXT: v_lshrrev_b32_e32 v0, 16, v31 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v0, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v2 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v30 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v29 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v28 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v27 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v26 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v25 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v24 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v23 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v22 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v21 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr61 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 ; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr56 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr30 +; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr29 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr45 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; implicit-def: $vgpr34 ; VI-NEXT: ; implicit-def: $vgpr43 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v29 -; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v51 -; VI-NEXT: s_waitcnt vmcnt(12) -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v50 -; VI-NEXT: ; kill: killed $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr53 +; VI-NEXT: ; implicit-def: $vgpr8 +; VI-NEXT: ; implicit-def: $vgpr59 +; VI-NEXT: ; implicit-def: $vgpr51 +; VI-NEXT: ; implicit-def: $vgpr6 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr58 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr11 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 ; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: ; implicit-def: $vgpr60 +; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 ; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr50 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr7 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr0 +; VI-NEXT: ; kill: killed $vgpr0 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB94_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v16 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v16 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v15 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v14 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v14 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v13 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v12 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v12 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v11 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v10 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v10 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v9 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v8 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v8 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v7 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v6 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v6 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v5 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v4 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v4 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v3 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v2 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v2 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v1 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v51 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v51 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v50 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v31 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v31 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v30 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v28 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v28 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v27 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v26 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v26 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v25 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v20 -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v19 -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v29, v49 -; VI-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6] -; VI-NEXT: v_mov_b32_e32 v49, v29 +; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v15 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v14 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v47 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v36 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v35 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v40, v5 +; VI-NEXT: v_mov_b32_e32 v25, v4 +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v32 +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v31 +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v54, v3 +; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b32_e32 v41, 24, v16 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v20 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v20 +; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v48 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v48 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v36 +; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v32 +; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v11, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v18 ; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v55 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v55 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v54 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v22 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v21 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v18 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v17 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[15:16] -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[13:14] -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12] -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[9:10] -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[50:51] -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[30:31] -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v29, v44 -; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[3:4] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[27:28] -; VI-NEXT: v_mov_b32_e32 v44, v29 -; VI-NEXT: v_mov_b32_e32 v29, v47 -; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[1:2] -; VI-NEXT: v_mov_b32_e32 v47, v29 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v29, v63 -; VI-NEXT: v_lshrrev_b64 v[62:63], 24, v[54:55] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[25:26] -; VI-NEXT: v_mov_b32_e32 v63, v29 -; VI-NEXT: v_mov_b32_e32 v29, v61 -; VI-NEXT: v_lshrrev_b64 v[60:61], 24, v[21:22] -; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20] -; VI-NEXT: v_mov_b32_e32 v61, v29 -; VI-NEXT: v_mov_b32_e32 v29, v56 -; VI-NEXT: v_lshrrev_b64 v[55:56], 24, v[17:18] -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22 -; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v20 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v18 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v56, v29 +; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v59 +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v29 +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v28 +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b32_e32 v8, 24, v29 +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v59 +; VI-NEXT: s_waitcnt vmcnt(12) +; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v1 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v0 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(12) +; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v5 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v5 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v1 +; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[0:1] +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[4:5] +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[31:32] +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[58:59] +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v0, v63 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v34 +; VI-NEXT: v_mov_b32_e32 v5, v40 +; VI-NEXT: v_mov_b32_e32 v4, v25 +; VI-NEXT: v_mov_b32_e32 v25, v41 +; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[33:34] +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v26 +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v18 +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[50:51], 24, v[15:16] +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[50:51], 24, v[13:14] +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[50:51], 24, v[47:48] +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[50:51], 24, v[35:36] +; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v27 +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v27 +; VI-NEXT: v_mov_b32_e32 v50, v62 +; VI-NEXT: v_lshrrev_b64 v[62:63], 24, v[26:27] +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v6, 24, v3 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v2 +; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[2:3] +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v34 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v33 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v58 +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v23 +; VI-NEXT: v_mov_b32_e32 v3, v54 +; VI-NEXT: v_mov_b32_e32 v63, v0 +; VI-NEXT: v_mov_b32_e32 v0, v55 +; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] +; VI-NEXT: v_lshrrev_b64 v[58:59], 24, v[21:22] +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v6, 24, v24 +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v22 +; VI-NEXT: v_mov_b32_e32 v55, v0 +; VI-NEXT: v_mov_b32_e32 v0, v60 +; VI-NEXT: v_lshrrev_b64 v[59:60], 24, v[19:20] +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v21 +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[28:29] +; VI-NEXT: v_mov_b32_e32 v28, v6 +; VI-NEXT: v_mov_b32_e32 v6, v43 +; VI-NEXT: v_mov_b32_e32 v60, v0 +; VI-NEXT: v_mov_b32_e32 v0, v44 +; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[17:18] +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v19 +; VI-NEXT: v_mov_b32_e32 v51, v61 +; VI-NEXT: v_mov_b32_e32 v61, v57 +; VI-NEXT: v_mov_b32_e32 v29, v42 +; VI-NEXT: v_mov_b32_e32 v44, v0 +; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v17 ; VI-NEXT: .LBB94_2: ; %Flow -; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] +; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5] +; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: s_xor_b64 exec, exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB94_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v42, 0x200 -; VI-NEXT: v_add_f16_sdwa v23, v18, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v23 +; VI-NEXT: v_mov_b32_e32 v50, 0x200 +; VI-NEXT: v_add_f16_sdwa v0, v18, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; VI-NEXT: v_add_f16_e32 v18, 0x200, v18 -; VI-NEXT: v_add_f16_sdwa v23, v17, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v57, v18, v29 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v23 +; VI-NEXT: v_or_b32_e32 v46, v18, v0 +; VI-NEXT: v_add_f16_sdwa v0, v17, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; VI-NEXT: v_add_f16_e32 v17, 0x200, v17 -; VI-NEXT: v_add_f16_sdwa v23, v20, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v56, v17, v29 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v23 +; VI-NEXT: v_or_b32_e32 v45, v17, v0 +; VI-NEXT: v_add_f16_sdwa v0, v20, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; VI-NEXT: v_add_f16_e32 v20, 0x200, v20 -; VI-NEXT: v_add_f16_sdwa v23, v19, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_sdwa v49, v19, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v19, 0x200, v19 -; VI-NEXT: v_or_b32_e32 v59, v20, v29 -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v23 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; VI-NEXT: v_add_f16_sdwa v20, v51, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v51, 0x200, v51 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; VI-NEXT: v_add_f16_sdwa v37, v10, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v10, 0x200, v10 -; VI-NEXT: v_add_f16_sdwa v45, v14, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v14, 0x200, v14 -; VI-NEXT: v_or_b32_e32 v58, v19, v29 -; VI-NEXT: v_add_f16_sdwa v19, v22, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19 +; VI-NEXT: v_or_b32_e32 v57, v20, v0 +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v49 +; VI-NEXT: v_add_f16_sdwa v28, v22, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v22, 0x200, v22 -; VI-NEXT: v_add_f16_sdwa v19, v21, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: v_add_f16_sdwa v42, v32, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v32, 0x200, v32 +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v6, v35 +; VI-NEXT: v_mov_b32_e32 v7, v36 +; VI-NEXT: v_add_f16_sdwa v27, v7, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v7, 0x200, v7 +; VI-NEXT: v_add_f16_sdwa v37, v47, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v47, 0x200, v47 +; VI-NEXT: v_add_f16_sdwa v3, v14, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v14, 0x200, v14 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v56, v19, v0 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v28 +; VI-NEXT: v_or_b32_e32 v44, v22, v0 +; VI-NEXT: v_add_f16_sdwa v0, v21, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v21, 0x200, v21 -; VI-NEXT: v_or_b32_e32 v55, v22, v29 -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19 -; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: v_add_f16_sdwa v19, v24, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; VI-NEXT: s_waitcnt vmcnt(7) +; VI-NEXT: v_add_f16_sdwa v11, v4, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v4, 0x200, v4 +; VI-NEXT: s_waitcnt vmcnt(4) +; VI-NEXT: v_add_f16_sdwa v53, v9, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v9, 0x200, v9 +; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v43, v21, v0 +; VI-NEXT: v_add_f16_sdwa v0, v24, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; VI-NEXT: v_add_f16_e32 v24, 0x200, v24 -; VI-NEXT: v_add_f16_sdwa v22, v8, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v8, 0x200, v8 -; VI-NEXT: v_or_b32_e32 v54, v21, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19 -; VI-NEXT: v_add_f16_sdwa v19, v23, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v59, v24, v0 +; VI-NEXT: v_add_f16_sdwa v0, v23, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v23, 0x200, v23 -; VI-NEXT: v_or_b32_e32 v61, v24, v29 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19 -; VI-NEXT: v_add_f16_sdwa v19, v26, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; VI-NEXT: v_add_f16_e32 v26, 0x200, v26 -; VI-NEXT: v_add_f16_sdwa v24, v4, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v4, 0x200, v4 -; VI-NEXT: v_add_f16_sdwa v21, v6, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v6, 0x200, v6 -; VI-NEXT: v_or_b32_e32 v60, v23, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19 -; VI-NEXT: v_add_f16_sdwa v19, v25, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v25, 0x200, v25 -; VI-NEXT: v_or_b32_e32 v63, v26, v29 -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19 -; VI-NEXT: v_add_f16_sdwa v19, v28, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; VI-NEXT: v_add_f16_e32 v28, 0x200, v28 -; VI-NEXT: v_add_f16_sdwa v26, v31, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; VI-NEXT: v_add_f16_sdwa v24, v2, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, 0x200, v2 +; VI-NEXT: v_or_b32_e32 v58, v23, v0 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v24 +; VI-NEXT: v_or_b32_e32 v61, v2, v0 +; VI-NEXT: v_add_f16_sdwa v0, v1, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, 0x200, v1 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; VI-NEXT: v_or_b32_e32 v60, v1, v0 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_f16_sdwa v0, v2, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; VI-NEXT: v_add_f16_e32 v2, 0x200, v2 +; VI-NEXT: v_or_b32_e32 v55, v2, v0 +; VI-NEXT: v_add_f16_sdwa v0, v1, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, 0x200, v1 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; VI-NEXT: v_or_b32_e32 v54, v1, v0 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_f16_sdwa v19, v2, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v19 +; VI-NEXT: v_add_f16_e32 v2, 0x200, v2 +; VI-NEXT: v_or_b32_e32 v63, v2, v0 +; VI-NEXT: v_add_f16_sdwa v0, v1, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, 0x200, v1 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; VI-NEXT: v_or_b32_e32 v62, v1, v0 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v42 +; VI-NEXT: v_or_b32_e32 v34, v32, v0 +; VI-NEXT: v_add_f16_sdwa v0, v31, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; VI-NEXT: v_add_f16_e32 v31, 0x200, v31 -; VI-NEXT: v_add_f16_sdwa v23, v12, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v12, 0x200, v12 -; VI-NEXT: v_or_b32_e32 v62, v25, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19 -; VI-NEXT: v_add_f16_sdwa v19, v27, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v27, 0x200, v27 -; VI-NEXT: v_or_b32_e32 v39, v28, v29 -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19 -; VI-NEXT: v_add_f16_sdwa v19, v50, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v50, 0x200, v50 -; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; VI-NEXT: v_add_f16_sdwa v25, v30, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v30, 0x200, v30 -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v38, v27, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v26 -; VI-NEXT: v_or_b32_e32 v34, v31, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v25 -; VI-NEXT: v_or_b32_e32 v33, v30, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20 -; VI-NEXT: v_or_b32_e32 v36, v51, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19 -; VI-NEXT: v_add_f16_sdwa v19, v2, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v35, v50, v29 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; VI-NEXT: v_or_b32_e32 v33, v31, v0 +; VI-NEXT: v_mov_b32_e32 v22, v31 +; VI-NEXT: v_mov_b32_e32 v23, v32 +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_add_f16_sdwa v26, v1, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_f16_sdwa v0, v2, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill ; VI-NEXT: v_add_f16_e32 v2, 0x200, v2 -; VI-NEXT: v_add_f16_sdwa v20, v1, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; VI-NEXT: v_add_f16_e32 v1, 0x200, v1 -; VI-NEXT: v_or_b32_e32 v47, v2, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v46, v1, v29 -; VI-NEXT: v_add_f16_sdwa v20, v3, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v24 -; VI-NEXT: v_add_f16_e32 v3, 0x200, v3 -; VI-NEXT: v_or_b32_e32 v44, v4, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v43, v3, v29 -; VI-NEXT: v_add_f16_sdwa v20, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v21 +; VI-NEXT: v_or_b32_e32 v39, v2, v0 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v26 +; VI-NEXT: v_or_b32_e32 v38, v1, v0 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_f16_sdwa v25, v1, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_f16_sdwa v10, v2, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, 0x200, v2 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v10 +; VI-NEXT: v_add_f16_e32 v1, 0x200, v1 +; VI-NEXT: v_or_b32_e32 v41, v2, v0 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v25 +; VI-NEXT: v_add_f16_sdwa v2, v16, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v16, 0x200, v16 +; VI-NEXT: v_or_b32_e32 v40, v1, v0 +; VI-NEXT: v_add_f16_sdwa v0, v5, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; VI-NEXT: v_add_f16_e32 v5, 0x200, v5 -; VI-NEXT: v_or_b32_e32 v49, v6, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v48, v5, v29 -; VI-NEXT: v_add_f16_sdwa v20, v7, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v22 -; VI-NEXT: v_add_f16_e32 v7, 0x200, v7 -; VI-NEXT: v_or_b32_e32 v51, v8, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v50, v7, v29 -; VI-NEXT: v_add_f16_sdwa v20, v9, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v37 -; VI-NEXT: v_add_f16_e32 v9, 0x200, v9 -; VI-NEXT: v_or_b32_e32 v53, v10, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v52, v9, v29 -; VI-NEXT: v_add_f16_sdwa v20, v11, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v23 -; VI-NEXT: v_add_f16_e32 v11, 0x200, v11 -; VI-NEXT: v_or_b32_e32 v41, v12, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v40, v11, v29 -; VI-NEXT: v_add_f16_sdwa v20, v13, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v45 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; VI-NEXT: v_or_b32_e32 v52, v5, v0 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v11 +; VI-NEXT: v_add_f16_sdwa v5, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v13, 0x200, v13 -; VI-NEXT: v_or_b32_e32 v32, v14, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20 -; VI-NEXT: v_mov_b32_e32 v27, v30 -; VI-NEXT: v_add_f16_sdwa v25, v16, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v28, v31 -; VI-NEXT: v_or_b32_e32 v31, v13, v29 -; VI-NEXT: v_add_f16_e32 v16, 0x200, v16 -; VI-NEXT: v_add_f16_sdwa v42, v15, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v25 +; VI-NEXT: v_or_b32_e32 v51, v4, v0 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v53 +; VI-NEXT: v_or_b32_e32 v36, v9, v0 +; VI-NEXT: v_add_f16_sdwa v0, v8, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v8, 0x200, v8 +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; VI-NEXT: v_add_f16_sdwa v4, v48, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v48, 0x200, v48 +; VI-NEXT: v_or_b32_e32 v35, v8, v0 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v27 +; VI-NEXT: v_or_b32_e32 v9, v7, v0 +; VI-NEXT: v_add_f16_sdwa v0, v6, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: v_add_f16_e32 v6, 0x200, v6 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; VI-NEXT: v_or_b32_e32 v8, v6, v0 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v4 +; VI-NEXT: v_or_b32_e32 v32, v48, v0 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v37 +; VI-NEXT: v_or_b32_e32 v31, v47, v0 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v3 +; VI-NEXT: v_or_b32_e32 v30, v14, v0 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v5 +; VI-NEXT: v_or_b32_e32 v29, v13, v0 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v16, v0 +; VI-NEXT: v_add_f16_sdwa v0, v15, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; VI-NEXT: v_add_f16_e32 v15, 0x200, v15 -; VI-NEXT: v_or_b32_e32 v30, v16, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v42 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; VI-NEXT: v_or_b32_e32 v0, v15, v0 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[0:1] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v1 +; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v0 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[29:30] +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v30 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[31:32] +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v31 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v0, v19 +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[8:9] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v9 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v8 +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v29, v15, v29 -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v30 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v29 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v32 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v31 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v41 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v40 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v53 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v52 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v51 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v50 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v49 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v48 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v44 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v43 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v47 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v46 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v36 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v35 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v34 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v33 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v39 -; VI-NEXT: v_lshrrev_b64 v[29:30], 24, v[29:30] -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v38 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v63 -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v62 -; VI-NEXT: v_lshrrev_b64 v[29:30], 24, v[31:32] -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v61 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v60 -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v55 -; VI-NEXT: v_mov_b32_e32 v31, v28 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v54 -; VI-NEXT: v_mov_b32_e32 v30, v27 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[40:41] -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v59 -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[33:34] -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v58 -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v57 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[52:53] -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v56 -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[38:39] -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v20, v25, 8, 8 -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[43:44] -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v40, v45 -; VI-NEXT: v_bfe_u32 v20, v45, 8, 8 -; VI-NEXT: v_mov_b32_e32 v45, v23 -; VI-NEXT: v_mov_b32_e32 v52, v26 -; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[50:51] -; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v20, v45, 8, 8 -; VI-NEXT: v_lshrrev_b64 v[35:36], 24, v[35:36] -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[62:63] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v36 +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[35:36] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v35 +; VI-NEXT: v_lshrrev_b64 v[35:36], 24, v[51:52] +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v52 +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v51 +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[35:36], 24, v[40:41] +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, v7 +; VI-NEXT: v_mov_b32_e32 v35, v6 +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v38 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[33:34] +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v34 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v33 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[62:63] +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v63 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v62 +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[54:55] ; VI-NEXT: v_lshrrev_b64 v[62:63], 24, v[60:61] -; VI-NEXT: v_lshrrev_b64 v[60:61], 24, v[54:55] +; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v55 +; VI-NEXT: v_mov_b32_e32 v63, v4 +; VI-NEXT: v_mov_b32_e32 v4, v25 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v61 +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v54 +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v60 ; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[58:59] -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v59, v37 -; VI-NEXT: v_bfe_u32 v20, v37, 8, 8 -; VI-NEXT: v_mov_b32_e32 v37, v22 -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v20, v37, 8, 8 -; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload -; VI-NEXT: v_lshrrev_b64 v[48:49], 24, v[48:49] -; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[46:47] -; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v20, v21, 8, 8 -; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; VI-NEXT: v_lshrrev_b64 v[55:56], 24, v[56:57] -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v20, v24, 8, 8 -; VI-NEXT: v_mov_b32_e32 v35, v19 -; VI-NEXT: v_bfe_u32 v19, v19, 8, 8 -; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v58, v21 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v34, v24 +; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v44 +; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v41 +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v55, v49 +; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v59 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v58 +; VI-NEXT: v_lshrrev_b64 v[58:59], 24, v[43:44] +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v43 +; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[45:46] +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v40 +; VI-NEXT: v_mov_b32_e32 v44, v2 +; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v46 +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v39 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v39, v0, 8, 8 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v24 +; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v32 +; VI-NEXT: v_mov_b32_e32 v32, v23 +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v31, v22 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b64 v[59:60], 24, v[56:57] +; VI-NEXT: v_mov_b32_e32 v9, v5 +; VI-NEXT: v_mov_b32_e32 v5, v11 +; VI-NEXT: v_mov_b32_e32 v11, v28 +; VI-NEXT: v_mov_b32_e32 v60, v3 +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v41, v27 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v29 +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v57 +; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v56 +; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v45 +; VI-NEXT: v_bfe_u32 v25, v44, 8, 8 +; VI-NEXT: v_bfe_u32 v45, v60, 8, 8 +; VI-NEXT: v_bfe_u32 v38, v63, 8, 8 +; VI-NEXT: v_bfe_u32 v56, v41, 8, 8 +; VI-NEXT: v_bfe_u32 v46, v53, 8, 8 +; VI-NEXT: v_bfe_u32 v50, v1, 8, 8 +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v11, v11, 8, 8 ; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_bfe_u32 v23, v44, 8, 8 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v23, v52, 8, 8 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v23, v32, 8, 8 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v23, v42, 8, 8 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v33, v53, 8, 8 -; VI-NEXT: v_bfe_u32 v23, v41, 8, 8 -; VI-NEXT: v_bfe_u32 v57, v49, 8, 8 -; VI-NEXT: v_bfe_u32 v38, v47, 8, 8 -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v2, v2, 8, 8 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v2, v10, 8, 8 +; VI-NEXT: v_bfe_u32 v0, v0, 8, 8 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v10, v37 +; VI-NEXT: v_bfe_u32 v37, v42, 8, 8 +; VI-NEXT: v_bfe_u32 v53, v52, 8, 8 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_bfe_u32 v28, v0, 8, 8 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: v_bfe_u32 v61, v3, 8, 8 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_bfe_u32 v6, v0, 8, 8 ; VI-NEXT: .LBB94_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v24, v46, s4 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; VI-NEXT: v_perm_b32 v0, v1, v0, s4 +; VI-NEXT: v_perm_b32 v1, v26, v40, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_store_dword v0, v12, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v3, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v24, s4 -; VI-NEXT: v_or_b32_e32 v1, v1, v29 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v2, v0, s4 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 4, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_perm_b32 v2, v2, v24, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v35, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v1, v0, s4 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v43, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_perm_b32 v1, v4, v26, s4 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v4, v1, s4 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 8, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v34, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v48, s4 +; VI-NEXT: v_perm_b32 v0, v2, v0, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v5, v2, s4 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 12, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_perm_b32 v0, v1, v0, s4 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v6, v1, s4 +; VI-NEXT: v_perm_b32 v1, v5, v3, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 16, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v58, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v2, v0, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v2, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 20, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v7, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v0, v1, v0, s4 ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v8, v1, s4 +; VI-NEXT: v_perm_b32 v1, v1, v3, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 24, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v0, v2, v0, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v37, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v46, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 28, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v35, v0, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 32, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v41, v56, s4 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v9, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v36, v0, s4 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 36, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v1, v10, v1, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v59, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v47, v0, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 40, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v1, v63, v38, s4 +; VI-NEXT: v_perm_b32 v0, v48, v30, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 44, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v13, v29, s4 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v9, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 48, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v60, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v11, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v14, v0, s4 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 52, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v12, v1, s4 +; VI-NEXT: v_perm_b32 v0, v15, v0, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v45, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v2, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 56, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v44, v25, s4 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v13, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v14, v1, s4 +; VI-NEXT: v_perm_b32 v0, v16, v0, s4 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 60, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v17, v34, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v40, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v43, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 64, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v52, v53, s4 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v15, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v18, v0, s4 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x44, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v1, v55, v59, s4 +; VI-NEXT: v_perm_b32 v0, v19, v8, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x48, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v20, v51, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v1, v6, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x4c, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_perm_b32 v0, v21, v0, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v16, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v63, v55, s4 +; VI-NEXT: v_perm_b32 v1, v1, v58, s4 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x50, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v0, v22, v0, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v17, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v47, v38, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_perm_b32 v1, v1, v11, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x54, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v0, v23, v0, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v18, v1, s4 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v56, v54, s4 +; VI-NEXT: v_perm_b32 v1, v1, v54, s4 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x58, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v24, v49, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v19, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v49, v57, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_perm_b32 v1, v1, v28, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x5c, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v20, v1, s4 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v39, v60, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_perm_b32 v0, v1, v0, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v21, v1, s4 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v53, v33, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_perm_b32 v1, v1, v62, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x60, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v0, v2, v0, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v22, v1, s4 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v50, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x64, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: v_perm_b32 v2, v36, v62, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v3, v1, s4 +; VI-NEXT: v_perm_b32 v0, v1, v0, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v41, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 -; VI-NEXT: v_perm_b32 v1, v25, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v26, v1, s4 +; VI-NEXT: v_perm_b32 v1, v1, v33, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x68, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v42, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 -; VI-NEXT: v_perm_b32 v1, v27, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v28, v1, s4 +; VI-NEXT: v_perm_b32 v0, v2, v0, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v32, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x6c, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 -; VI-NEXT: v_perm_b32 v1, v30, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v0, v1, v7, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v31, v1, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v52, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v1, v1, v3, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x70, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v61, v2, s4 -; VI-NEXT: v_perm_b32 v1, v50, v1, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 +; VI-NEXT: v_perm_b32 v0, v2, v0, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v1, v39, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x74, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v51, v1, s4 +; VI-NEXT: v_perm_b32 v0, v31, v0, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v44, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v1, v2, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x78, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v0, v32, v0, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v1, v37, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7c, v12 +; VI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload @@ -179447,732 +179660,831 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr52 ; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr45 -; GFX9-NEXT: ; implicit-def: $vgpr44 -; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr49 +; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr42 -; GFX9-NEXT: ; implicit-def: $vgpr41 -; GFX9-NEXT: ; implicit-def: $vgpr40 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr50 -; GFX9-NEXT: ; implicit-def: $vgpr49 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr61 +; GFX9-NEXT: ; implicit-def: $vgpr60 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr43 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr63 +; GFX9-NEXT: ; implicit-def: $vgpr42 +; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr40 +; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr44 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(13) -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr34 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB94_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v25 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v25 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v24 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v24 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v24 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v23 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v23 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v22 +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[11:12] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(22) -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v31 -; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[15:16] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v22 +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v30 -; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v21 +; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[9:10] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v30 -; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v21 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v30 -; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v20 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2] +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v20 +; GFX9-NEXT: s_waitcnt vmcnt(61) +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[31:32] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v29 -; GFX9-NEXT: v_mov_b32_e32 v43, v54 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v20 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v28 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v19 +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v19 +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[27:28] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v28 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v18 +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[15:16] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18 +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v27 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[25:26] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v26 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v17 +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[5:6] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[13:14] +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[21:22] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v25 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[3:4] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8] +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v24 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v1 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[19:20] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v24 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v56, v43 +; GFX9-NEXT: v_mov_b32_e32 v57, v44 +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[29:30] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[1:2] +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v23 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[17:18] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v23 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v22 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v22 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20] -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v30 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[23:24] +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v3 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v1 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v17 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18] +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v26 +; GFX9-NEXT: v_mov_b32_e32 v60, v35 +; GFX9-NEXT: v_mov_b32_e32 v38, v55 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v31 +; GFX9-NEXT: v_mov_b32_e32 v35, v54 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v31 +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v17 ; GFX9-NEXT: .LBB94_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB94_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true ; GFX9-NEXT: s_movk_i32 s6, 0x200 +; GFX9-NEXT: v_pk_add_f16 v16, v16, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v15, v15, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] +; GFX9-NEXT: v_pk_add_f16 v14, v14, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v13, v13, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] +; GFX9-NEXT: v_pk_add_f16 v12, v12, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v11, v11, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] +; GFX9-NEXT: v_pk_add_f16 v10, v10, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v9, v9, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] +; GFX9-NEXT: v_pk_add_f16 v8, v8, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v7, v7, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] +; GFX9-NEXT: v_pk_add_f16 v6, v6, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] +; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] +; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] ; GFX9-NEXT: v_pk_add_f16 v32, v32, s6 op_sel_hi:[1,0] -; GFX9-NEXT: s_waitcnt vmcnt(12) +; GFX9-NEXT: s_waitcnt vmcnt(44) ; GFX9-NEXT: v_pk_add_f16 v31, v31, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] ; GFX9-NEXT: v_pk_add_f16 v30, v30, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v29, v29, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30] ; GFX9-NEXT: v_pk_add_f16 v28, v28, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v27, v27, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28] ; GFX9-NEXT: v_pk_add_f16 v26, v26, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v25, v25, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26] -; GFX9-NEXT: v_pk_add_f16 v24, v24, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v23, v23, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] ; GFX9-NEXT: v_pk_add_f16 v22, v22, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v21, v21, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] -; GFX9-NEXT: v_pk_add_f16 v16, v16, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_pk_add_f16 v20, v20, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v19, v19, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] +; GFX9-NEXT: v_pk_add_f16 v18, v18, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v17, v17, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; GFX9-NEXT: v_pk_add_f16 v15, v15, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; GFX9-NEXT: v_pk_add_f16 v14, v14, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32 -; GFX9-NEXT: v_pk_add_f16 v13, v13, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v31 -; GFX9-NEXT: v_pk_add_f16 v12, v12, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v26 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v25 +; GFX9-NEXT: v_pk_add_f16 v24, v24, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v25 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v30 -; GFX9-NEXT: v_pk_add_f16 v11, v11, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v24 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v24 +; GFX9-NEXT: v_pk_add_f16 v23, v23, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; GFX9-NEXT: v_pk_add_f16 v10, v10, s6 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v24 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v23 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v23 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v28 -; GFX9-NEXT: v_pk_add_f16 v9, v9, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v27 -; GFX9-NEXT: v_pk_add_f16 v8, v8, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v21 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v21 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v26 -; GFX9-NEXT: v_pk_add_f16 v7, v7, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v20 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v20 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v25 -; GFX9-NEXT: v_pk_add_f16 v6, v6, s6 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v20 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v19 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v24 -; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[15:16] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v19 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v24 -; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v18 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v24 -; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v23 -; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18 +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[23:24] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v23 -; GFX9-NEXT: v_pk_add_f16 v20, v20, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v19, v19, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v22 -; GFX9-NEXT: v_pk_add_f16 v18, v18, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v17, v17, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v22 -; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v22 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v3 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v1 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v18 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v31 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v31 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v26 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v17 ; GFX9-NEXT: .LBB94_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v1, v1, v33, s4 -; GFX9-NEXT: v_perm_b32 v33, v62, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v55, v63, v42, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v1 -; GFX9-NEXT: v_perm_b32 v39, v39, v53, s4 -; GFX9-NEXT: v_perm_b32 v2, v2, v45, s4 -; GFX9-NEXT: v_perm_b32 v3, v3, v44, s4 -; GFX9-NEXT: v_perm_b32 v4, v4, v61, s4 -; GFX9-NEXT: v_perm_b32 v5, v5, v60, s4 -; GFX9-NEXT: v_perm_b32 v37, v37, v54, s4 -; GFX9-NEXT: v_perm_b32 v17, v17, v59, s4 -; GFX9-NEXT: v_perm_b32 v18, v18, v58, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v40, v41, v40, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v6, v6, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v52, v41, v52, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v7, v7, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v8, v8, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v51, v41, v51, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v9, v9, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v10, v10, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v50, v41, v50, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v11, v11, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v12, v12, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v49, v41, v49, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v13, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v14, v14, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v48, v41, v48, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v15, v15, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v41, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v52, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v56, v56, v58, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v56, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v53, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 +; GFX9-NEXT: v_perm_b32 v1, v2, v49, s4 +; GFX9-NEXT: v_perm_b32 v2, v51, v38, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v3 +; GFX9-NEXT: v_perm_b32 v1, v3, v57, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v50, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v4, v61, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4 +; GFX9-NEXT: v_perm_b32 v2, v60, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_lshl_or_b32 v1, v40, 16, v5 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v5, v48, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v6, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6 +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v7 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v7, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v8, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v9 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v9, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v10, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v11 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v11, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v12, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_lshl_or_b32 v1, v49, 16, v13 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v13, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v14, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v15 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v15, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v2, v35, v34, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v43, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v17 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v17, v37, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: v_perm_b32 v1, v38, v36, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v18, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: v_perm_b32 v1, v19, v57, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v1 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: v_perm_b32 v1, v20, v56, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v20, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v21, v47, s4 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v46, v2, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v21, v1, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4 @@ -180180,104 +180492,72 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v1, v23, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v25, v1, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v62, v63, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v27, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v27, v42, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v41, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_perm_b32 v1, v28, v47, s4 +; GFX9-NEXT: v_perm_b32 v2, v36, v40, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v29, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v29, v46, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v39, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_perm_b32 v1, v30, v45, s4 +; GFX9-NEXT: v_perm_b32 v2, v35, v55, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v31, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v31, v54, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v44, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_perm_b32 v1, v32, v53, s4 +; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload @@ -180690,54 +180970,52 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-LABEL: bitcast_v64f16_to_v128i8: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: s_clause 0x14 ; 84-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:92 -; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:88 +; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:88 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:84 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:84 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:80 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:76 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:72 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:68 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:64 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:60 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:56 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:52 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:48 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:44 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:40 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:36 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:32 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:28 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:24 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:20 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:16 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:12 ; GFX11-FAKE16-NEXT: s_clause 0x2 ; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8 ; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4 ; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr163 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr160 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr149 @@ -180750,13 +181028,13 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr131 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr130 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr129 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr128 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr119 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr118 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr117 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr116 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr115 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr114 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr113 @@ -180783,7 +181061,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74 @@ -180821,16 +181099,16 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr167 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr166 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr165 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr164 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr163 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr160 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr150 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr148 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr146 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr144 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr135 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2) ; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v33 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33 @@ -180842,13 +181120,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[13:14] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[7:8] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[3:4] +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[31:32] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[21:22] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[5:6] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[29:30] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[19:20] ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v16 @@ -180889,17 +181169,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 24, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 8, v2 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 8, v1 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v1 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 24, v32 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v32 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 8, v32 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v31 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v31 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v30 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 24, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v30 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 8, v30 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v29 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v29 @@ -180932,11 +181210,10 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v18 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v18 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 16, v17 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v17 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v17 ; GFX11-FAKE16-NEXT: .LBB94_2: ; %Flow ; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB94_4 @@ -180953,41 +181230,41 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_pk_add_f16 v21, 0x200, v21 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1] -; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1] -; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1] +; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1] +; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v20, 0x200, v20 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v19, 0x200, v19 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v26, 0x200, v26 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v25, 0x200, v25 op_sel_hi:[0,1] -; GFX11-FAKE16-NEXT: v_pk_add_f16 v30, 0x200, v30 op_sel_hi:[0,1] -; GFX11-FAKE16-NEXT: v_pk_add_f16 v29, 0x200, v29 op_sel_hi:[0,1] -; GFX11-FAKE16-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1] -; GFX11-FAKE16-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1] +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_pk_add_f16 v32, 0x200, v32 op_sel_hi:[0,1] +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-FAKE16-NEXT: v_pk_add_f16 v31, 0x200, v31 op_sel_hi:[0,1] +; GFX11-FAKE16-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1] +; GFX11-FAKE16-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v18, 0x200, v18 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v24, 0x200, v24 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v23, 0x200, v23 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v28, 0x200, v28 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_pk_add_f16 v27, 0x200, v27 op_sel_hi:[0,1] -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-FAKE16-NEXT: v_pk_add_f16 v32, 0x200, v32 op_sel_hi:[0,1] -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_pk_add_f16 v31, 0x200, v31 op_sel_hi:[0,1] +; GFX11-FAKE16-NEXT: v_pk_add_f16 v30, 0x200, v30 op_sel_hi:[0,1] +; GFX11-FAKE16-NEXT: v_pk_add_f16 v29, 0x200, v29 op_sel_hi:[0,1] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[13:14] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[7:8] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[3:4] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[21:22] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[5:6] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[31:32] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[19:20] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[29:30] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18] @@ -181029,15 +181306,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 24, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 8, v2 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 8, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v1 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 24, v32 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v32 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 8, v32 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v31 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v31 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v30 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 24, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v30 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 8, v30 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v29 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v29 @@ -181070,48 +181347,48 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v18 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v18 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 16, v17 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v17 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v17 ; GFX11-FAKE16-NEXT: .LBB94_4: ; %end ; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 -; GFX11-FAKE16-NEXT: v_perm_b32 v39, v161, v64, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v162, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v163, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v51, v160, v64, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v151, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v51, v149, v147, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v55, v149, v147, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v145, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v52, v134, v52, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v51, 16, v1 ; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v133, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v39, v132, v131, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v51, v132, v131, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v130, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v49, v129, v49, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v117, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v37, v116, v37, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v51, 16, v2 +; GFX11-FAKE16-NEXT: v_perm_b32 v48, v116, v48, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v52, 16, v3 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v130, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v48, v129, v48, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v128, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v51, v119, v118, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v52, v119, v118, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v115, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v52, v114, v113, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v37, 16, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v55, v114, v113, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v51, 16, v4 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v49, 16, v5 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v48, 16, v7 ; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v112, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v36, v103, v36, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v102, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v37, v101, v100, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v48, v101, v100, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v99, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v35, v98, v35, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v97, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v39, v96, v87, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v48, 16, v5 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v51, 16, v6 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v52, 16, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v49, v96, v87, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v52, 16, v6 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v55, 16, v8 ; GFX11-FAKE16-NEXT: s_clause 0x1 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v36, 16, v9 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v37, 16, v10 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v48, 16, v10 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v35, 16, v11 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v12 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v49, 16, v12 ; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v86, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v6, v85, v34, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v84, 0xc0c0004 @@ -181120,7 +181397,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_perm_b32 v10, v80, v33, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v71, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v12, v70, v69, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v76, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v39, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v14, v75, v67, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7 @@ -181160,12 +181437,12 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_perm_b32 v21, v176, v167, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v24, 16, v23 ; GFX11-FAKE16-NEXT: v_perm_b32 v22, v29, v166, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v165, v49, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v165, v38, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v24, v30, v164, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v163, v160, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v162, v161, 0xc0c0004 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_perm_b32 v26, v31, v150, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v148, v38, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v27, v148, v37, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v28, v32, v146, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v29, v144, v135, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v21, 16, v20 @@ -181180,28 +181457,27 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112 -; GFX11-FAKE16-NEXT: s_clause 0x14 ; 84-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:12 -; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:16 -; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:20 -; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:24 -; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:28 -; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:32 -; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:36 -; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:40 -; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:44 -; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:48 -; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:52 -; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:56 -; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:60 -; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:64 -; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:68 -; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:72 -; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:76 -; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:80 -; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:84 -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:88 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:92 +; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:84 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:88 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 @@ -181268,73 +181544,81 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_writelane_b32 v34, s99, 33 ; SI-NEXT: v_writelane_b32 v34, s30, 34 ; SI-NEXT: v_writelane_b32 v34, s31, 35 +; SI-NEXT: ; implicit-def: $vgpr36 : SGPR spill to VGPR lane ; SI-NEXT: s_lshr_b32 s5, s16, 16 -; SI-NEXT: ; implicit-def: $vgpr37 : SGPR spill to VGPR lane +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_writelane_b32 v36, s17, 0 +; SI-NEXT: v_writelane_b32 v36, s16, 1 +; SI-NEXT: v_writelane_b32 v36, s19, 2 ; SI-NEXT: s_lshr_b32 s6, s18, 16 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_writelane_b32 v37, s5, 0 +; SI-NEXT: v_writelane_b32 v36, s5, 3 ; SI-NEXT: s_lshr_b32 s7, s20, 16 -; SI-NEXT: v_writelane_b32 v37, s6, 2 +; SI-NEXT: v_writelane_b32 v36, s6, 4 ; SI-NEXT: s_lshr_b32 s8, s22, 16 -; SI-NEXT: v_writelane_b32 v37, s7, 3 +; SI-NEXT: v_writelane_b32 v36, s7, 5 ; SI-NEXT: s_lshr_b32 s9, s24, 16 -; SI-NEXT: v_readfirstlane_b32 s34, v18 -; SI-NEXT: v_readfirstlane_b32 s83, v17 -; SI-NEXT: v_readfirstlane_b32 s70, v16 -; SI-NEXT: v_readfirstlane_b32 s80, v15 -; SI-NEXT: v_readfirstlane_b32 s66, v14 -; SI-NEXT: v_readfirstlane_b32 s68, v13 -; SI-NEXT: v_readfirstlane_b32 s54, v12 -; SI-NEXT: v_readfirstlane_b32 s64, v11 -; SI-NEXT: v_readfirstlane_b32 s51, v10 -; SI-NEXT: v_readfirstlane_b32 s53, v9 -; SI-NEXT: v_readfirstlane_b32 s39, v8 -; SI-NEXT: v_readfirstlane_b32 s49, v7 -; SI-NEXT: v_readfirstlane_b32 s35, v6 -; SI-NEXT: v_readfirstlane_b32 s37, v5 -; SI-NEXT: v_readfirstlane_b32 s94, v4 -; SI-NEXT: v_readfirstlane_b32 s31, v3 +; SI-NEXT: v_writelane_b32 v36, s8, 6 +; SI-NEXT: s_lshr_b32 s10, s26, 16 +; SI-NEXT: v_writelane_b32 v36, s9, 7 +; SI-NEXT: s_lshr_b32 s11, s28, 16 +; SI-NEXT: v_readfirstlane_b32 s30, v1 +; SI-NEXT: v_writelane_b32 v36, s10, 8 +; SI-NEXT: v_readfirstlane_b32 s38, v3 +; SI-NEXT: s_lshr_b32 s12, s30, 16 +; SI-NEXT: v_writelane_b32 v36, s11, 9 +; SI-NEXT: v_readfirstlane_b32 s50, v5 +; SI-NEXT: s_lshr_b32 s13, s38, 16 +; SI-NEXT: v_writelane_b32 v36, s12, 10 +; SI-NEXT: v_readfirstlane_b32 s66, v7 +; SI-NEXT: s_lshr_b32 s14, s50, 16 +; SI-NEXT: v_writelane_b32 v36, s13, 11 +; SI-NEXT: v_readfirstlane_b32 s51, v18 +; SI-NEXT: v_readfirstlane_b32 s34, v17 +; SI-NEXT: v_readfirstlane_b32 s98, v16 +; SI-NEXT: v_readfirstlane_b32 s37, v15 +; SI-NEXT: v_readfirstlane_b32 s86, v14 +; SI-NEXT: v_readfirstlane_b32 s97, v13 +; SI-NEXT: v_readfirstlane_b32 s80, v12 +; SI-NEXT: v_readfirstlane_b32 s84, v11 +; SI-NEXT: v_readfirstlane_b32 s69, v10 +; SI-NEXT: v_readfirstlane_b32 s71, v9 +; SI-NEXT: v_readfirstlane_b32 s54, v8 +; SI-NEXT: s_lshr_b32 s15, s66, 16 +; SI-NEXT: v_readfirstlane_b32 s49, v6 +; SI-NEXT: v_readfirstlane_b32 s36, v4 ; SI-NEXT: v_readfirstlane_b32 s91, v2 -; SI-NEXT: v_readfirstlane_b32 s93, v1 -; SI-NEXT: v_writelane_b32 v37, s8, 4 +; SI-NEXT: v_writelane_b32 v36, s14, 12 ; SI-NEXT: s_lshr_b32 s90, s29, 16 -; SI-NEXT: s_lshr_b32 s11, s28, 16 ; SI-NEXT: s_lshr_b32 s89, s27, 16 -; SI-NEXT: s_lshr_b32 s10, s26, 16 ; SI-NEXT: s_lshr_b32 s88, s25, 16 ; SI-NEXT: s_lshr_b32 s79, s23, 16 -; SI-NEXT: s_lshr_b32 s86, s21, 16 +; SI-NEXT: s_lshr_b32 s78, s21, 16 ; SI-NEXT: s_lshr_b32 s77, s19, 16 ; SI-NEXT: s_lshr_b32 s76, s17, 16 -; SI-NEXT: s_lshr_b32 s82, s34, 16 -; SI-NEXT: s_lshr_b32 s84, s83, 16 -; SI-NEXT: s_lshr_b32 s71, s70, 16 -; SI-NEXT: s_lshr_b32 s81, s80, 16 -; SI-NEXT: s_lshr_b32 s67, s66, 16 -; SI-NEXT: s_lshr_b32 s38, s68, 16 -; SI-NEXT: s_lshr_b32 s55, s54, 16 -; SI-NEXT: s_lshr_b32 s99, s64, 16 -; SI-NEXT: s_lshr_b32 s52, s51, 16 -; SI-NEXT: s_lshr_b32 s69, s53, 16 -; SI-NEXT: s_lshr_b32 s48, s39, 16 -; SI-NEXT: s_lshr_b32 s98, s49, 16 -; SI-NEXT: s_lshr_b32 s36, s35, 16 -; SI-NEXT: s_lshr_b32 s65, s37, 16 -; SI-NEXT: s_lshr_b32 s95, s94, 16 -; SI-NEXT: s_lshr_b32 s85, s31, 16 -; SI-NEXT: s_lshr_b32 s92, s91, 16 -; SI-NEXT: s_lshr_b32 s30, s93, 16 +; SI-NEXT: s_lshr_b32 s53, s51, 16 +; SI-NEXT: s_lshr_b32 s55, s34, 16 +; SI-NEXT: s_lshr_b32 s99, s98, 16 +; SI-NEXT: s_lshr_b32 s39, s37, 16 +; SI-NEXT: s_lshr_b32 s96, s86, 16 +; SI-NEXT: s_lshr_b32 s35, s97, 16 +; SI-NEXT: s_lshr_b32 s82, s80, 16 +; SI-NEXT: s_lshr_b32 vcc_lo, s84, 16 +; SI-NEXT: s_lshr_b32 s70, s69, 16 +; SI-NEXT: s_lshr_b32 s95, s71, 16 +; SI-NEXT: s_lshr_b32 s64, s54, 16 +; SI-NEXT: s_lshr_b32 s93, s49, 16 +; SI-NEXT: s_lshr_b32 s92, s36, 16 +; SI-NEXT: s_lshr_b32 s94, s91, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v19 -; SI-NEXT: v_writelane_b32 v37, s9, 5 -; SI-NEXT: s_mov_b32 s97, s16 +; SI-NEXT: v_writelane_b32 v36, s15, 13 ; SI-NEXT: s_cmp_lg_u32 s4, 0 -; SI-NEXT: v_writelane_b32 v37, s10, 6 -; SI-NEXT: v_writelane_b32 v37, s11, 7 -; SI-NEXT: ; implicit-def: $vgpr36 : SGPR spill to VGPR lane +; SI-NEXT: v_writelane_b32 v36, s95, 14 +; SI-NEXT: v_writelane_b32 v36, vcc_lo, 15 +; SI-NEXT: ; implicit-def: $vgpr37 : SGPR spill to VGPR lane ; SI-NEXT: ; implicit-def: $vgpr35 : SGPR spill to VGPR lane ; SI-NEXT: s_cbranch_scc0 .LBB95_3 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s4, s97, 0xffff +; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_or_b32 s74, s4, s5 ; SI-NEXT: s_and_b32 s4, s17, 0xffff @@ -181350,325 +181634,295 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: s_lshl_b32 s5, s7, 16 ; SI-NEXT: s_or_b32 s62, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff -; SI-NEXT: s_lshl_b32 s5, s86, 16 +; SI-NEXT: s_lshl_b32 s5, s78, 16 ; SI-NEXT: s_or_b32 s63, s4, s5 ; SI-NEXT: s_and_b32 s4, s22, 0xffff ; SI-NEXT: s_lshl_b32 s5, s8, 16 -; SI-NEXT: s_or_b32 s58, s4, s5 +; SI-NEXT: s_or_b32 s60, s4, s5 ; SI-NEXT: s_and_b32 s4, s23, 0xffff ; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s59, s4, s5 +; SI-NEXT: s_or_b32 s61, s4, s5 ; SI-NEXT: s_and_b32 s4, s24, 0xffff ; SI-NEXT: s_lshl_b32 s5, s9, 16 -; SI-NEXT: s_or_b32 s56, s4, s5 +; SI-NEXT: s_or_b32 s58, s4, s5 ; SI-NEXT: s_and_b32 s4, s25, 0xffff ; SI-NEXT: s_lshl_b32 s5, s88, 16 -; SI-NEXT: s_or_b32 s57, s4, s5 +; SI-NEXT: s_or_b32 s59, s4, s5 ; SI-NEXT: s_and_b32 s4, s26, 0xffff ; SI-NEXT: s_lshl_b32 s5, s10, 16 -; SI-NEXT: s_or_b32 s60, s4, s5 +; SI-NEXT: s_or_b32 s56, s4, s5 ; SI-NEXT: s_and_b32 s4, s27, 0xffff ; SI-NEXT: s_lshl_b32 s5, s89, 16 -; SI-NEXT: s_or_b32 s61, s4, s5 +; SI-NEXT: s_or_b32 s57, s4, s5 ; SI-NEXT: s_and_b32 s4, s28, 0xffff ; SI-NEXT: s_lshl_b32 s5, s11, 16 ; SI-NEXT: s_or_b32 s46, s4, s5 ; SI-NEXT: s_and_b32 s4, s29, 0xffff ; SI-NEXT: s_lshl_b32 s5, s90, 16 ; SI-NEXT: s_or_b32 s47, s4, s5 -; SI-NEXT: s_and_b32 s4, s93, 0xffff -; SI-NEXT: s_lshl_b32 s5, s30, 16 +; SI-NEXT: s_and_b32 s4, s30, 0xffff +; SI-NEXT: s_lshl_b32 s5, s12, 16 ; SI-NEXT: s_or_b32 s44, s4, s5 ; SI-NEXT: s_and_b32 s4, s91, 0xffff -; SI-NEXT: s_lshl_b32 s5, s92, 16 +; SI-NEXT: s_lshl_b32 s5, s94, 16 ; SI-NEXT: s_or_b32 s45, s4, s5 -; SI-NEXT: s_and_b32 s4, s31, 0xffff -; SI-NEXT: s_lshl_b32 s5, s85, 16 +; SI-NEXT: s_and_b32 s4, s38, 0xffff +; SI-NEXT: s_lshl_b32 s5, s13, 16 ; SI-NEXT: s_or_b32 s42, s4, s5 -; SI-NEXT: s_and_b32 s4, s94, 0xffff -; SI-NEXT: s_lshl_b32 s5, s95, 16 +; SI-NEXT: s_and_b32 s4, s36, 0xffff +; SI-NEXT: s_lshl_b32 s5, s92, 16 ; SI-NEXT: s_or_b32 s43, s4, s5 -; SI-NEXT: s_and_b32 s4, s37, 0xffff -; SI-NEXT: s_lshl_b32 s5, s65, 16 +; SI-NEXT: s_and_b32 s4, s50, 0xffff +; SI-NEXT: s_lshl_b32 s5, s14, 16 ; SI-NEXT: s_or_b32 s40, s4, s5 -; SI-NEXT: s_and_b32 s4, s35, 0xffff -; SI-NEXT: s_lshl_b32 s5, s36, 16 -; SI-NEXT: s_or_b32 s41, s4, s5 ; SI-NEXT: s_and_b32 s4, s49, 0xffff -; SI-NEXT: s_lshl_b32 s5, s98, 16 +; SI-NEXT: s_lshl_b32 s5, s93, 16 +; SI-NEXT: s_or_b32 s41, s4, s5 +; SI-NEXT: s_and_b32 s4, s66, 0xffff +; SI-NEXT: s_lshl_b32 s5, s15, 16 ; SI-NEXT: s_or_b32 s14, s4, s5 -; SI-NEXT: s_and_b32 s4, s39, 0xffff -; SI-NEXT: s_lshl_b32 s5, s48, 16 +; SI-NEXT: s_and_b32 s4, s54, 0xffff +; SI-NEXT: s_lshl_b32 s5, s64, 16 ; SI-NEXT: s_or_b32 s15, s4, s5 -; SI-NEXT: s_and_b32 s4, s53, 0xffff -; SI-NEXT: s_lshl_b32 s5, s69, 16 +; SI-NEXT: s_and_b32 s4, s71, 0xffff +; SI-NEXT: s_lshl_b32 s5, s95, 16 ; SI-NEXT: s_or_b32 s12, s4, s5 -; SI-NEXT: s_and_b32 s4, s51, 0xffff -; SI-NEXT: s_lshl_b32 s5, s52, 16 +; SI-NEXT: s_and_b32 s4, s69, 0xffff +; SI-NEXT: s_lshl_b32 s5, s70, 16 ; SI-NEXT: s_or_b32 s13, s4, s5 -; SI-NEXT: s_and_b32 s4, s64, 0xffff -; SI-NEXT: s_lshl_b32 s5, s99, 16 +; SI-NEXT: s_and_b32 s4, s84, 0xffff +; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16 ; SI-NEXT: s_or_b32 s10, s4, s5 -; SI-NEXT: s_and_b32 s4, s54, 0xffff -; SI-NEXT: s_lshl_b32 s5, s55, 16 +; SI-NEXT: s_and_b32 s4, s80, 0xffff +; SI-NEXT: s_lshl_b32 s5, s82, 16 ; SI-NEXT: s_or_b32 s11, s4, s5 -; SI-NEXT: s_and_b32 s4, s68, 0xffff -; SI-NEXT: s_lshl_b32 s5, s38, 16 +; SI-NEXT: s_and_b32 s4, s97, 0xffff +; SI-NEXT: s_lshl_b32 s5, s35, 16 ; SI-NEXT: s_or_b32 s8, s4, s5 -; SI-NEXT: s_and_b32 s4, s66, 0xffff -; SI-NEXT: s_lshl_b32 s5, s67, 16 -; SI-NEXT: s_lshr_b32 s16, s75, 8 +; SI-NEXT: s_and_b32 s4, s86, 0xffff +; SI-NEXT: s_lshl_b32 s5, s96, 16 ; SI-NEXT: s_or_b32 s9, s4, s5 -; SI-NEXT: s_and_b32 s4, s80, 0xffff -; SI-NEXT: s_lshl_b32 s5, s81, 16 -; SI-NEXT: v_writelane_b32 v35, s16, 2 -; SI-NEXT: s_lshr_b32 s16, s73, 8 +; SI-NEXT: s_and_b32 s4, s37, 0xffff +; SI-NEXT: s_lshl_b32 s5, s39, 16 ; SI-NEXT: s_or_b32 s6, s4, s5 -; SI-NEXT: s_and_b32 s4, s70, 0xffff -; SI-NEXT: s_lshl_b32 s5, s71, 16 -; SI-NEXT: v_writelane_b32 v35, s16, 1 -; SI-NEXT: s_lshr_b32 s16, s63, 8 +; SI-NEXT: s_and_b32 s4, s98, 0xffff +; SI-NEXT: s_lshl_b32 s5, s99, 16 ; SI-NEXT: s_or_b32 s7, s4, s5 -; SI-NEXT: s_and_b32 s4, s83, 0xffff -; SI-NEXT: s_lshl_b32 s5, s84, 16 -; SI-NEXT: v_writelane_b32 v35, s16, 0 -; SI-NEXT: s_lshr_b32 s16, s59, 8 +; SI-NEXT: s_and_b32 s4, s34, 0xffff +; SI-NEXT: s_lshl_b32 s5, s55, 16 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s34, 0xffff -; SI-NEXT: s_lshl_b32 vcc_lo, s82, 16 -; SI-NEXT: v_writelane_b32 v36, s16, 63 -; SI-NEXT: s_lshr_b32 s16, s57, 8 -; SI-NEXT: s_or_b32 s5, s5, vcc_lo -; SI-NEXT: v_writelane_b32 v36, s16, 62 -; SI-NEXT: s_lshr_b32 vcc_lo, s61, 8 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 61 -; SI-NEXT: s_lshr_b32 vcc_lo, s47, 8 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 60 -; SI-NEXT: s_lshr_b32 vcc_lo, s45, 8 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 59 -; SI-NEXT: s_lshr_b32 vcc_lo, s43, 8 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 58 -; SI-NEXT: s_lshr_b32 vcc_lo, s41, 8 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 57 -; SI-NEXT: s_lshr_b32 vcc_lo, s15, 8 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 56 -; SI-NEXT: s_lshr_b32 vcc_lo, s13, 8 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 55 -; SI-NEXT: s_lshr_b32 vcc_lo, s11, 8 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 54 -; SI-NEXT: s_lshr_b32 vcc_lo, s9, 8 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 53 -; SI-NEXT: s_lshr_b32 vcc_lo, s7, 8 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 52 -; SI-NEXT: s_lshr_b32 vcc_lo, s5, 8 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 51 -; SI-NEXT: s_bfe_u32 s16, s76, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 50 -; SI-NEXT: s_bfe_u32 s16, s77, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 49 -; SI-NEXT: s_bfe_u32 s16, s86, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 48 -; SI-NEXT: s_bfe_u32 s16, s79, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 47 -; SI-NEXT: s_bfe_u32 s16, s88, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 46 -; SI-NEXT: s_bfe_u32 s16, s89, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 45 -; SI-NEXT: s_bfe_u32 s16, s90, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 44 -; SI-NEXT: s_bfe_u32 s16, s92, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 43 -; SI-NEXT: s_bfe_u32 s16, s95, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 42 -; SI-NEXT: s_bfe_u32 s16, s36, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 41 -; SI-NEXT: s_bfe_u32 s16, s48, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 40 -; SI-NEXT: s_bfe_u32 s16, s52, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 39 -; SI-NEXT: s_bfe_u32 s16, s55, 0x80008 -; SI-NEXT: v_writelane_b32 v36, s16, 38 -; SI-NEXT: s_mov_b32 s78, s81 -; SI-NEXT: s_mov_b32 s81, s38 -; SI-NEXT: s_mov_b32 s38, s77 -; SI-NEXT: s_mov_b32 s77, s99 -; SI-NEXT: s_mov_b32 s99, s69 -; SI-NEXT: s_mov_b32 s69, s76 -; SI-NEXT: s_mov_b32 s76, s98 -; SI-NEXT: s_mov_b32 s98, s65 -; SI-NEXT: s_mov_b32 s65, s97 -; SI-NEXT: s_mov_b32 s97, s85 -; SI-NEXT: s_mov_b32 s85, s17 +; SI-NEXT: s_and_b32 s5, s51, 0xffff +; SI-NEXT: s_lshl_b32 s16, s53, 16 +; SI-NEXT: s_or_b32 s5, s5, s16 ; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 24 -; SI-NEXT: v_writelane_b32 v37, s16, 12 -; SI-NEXT: v_writelane_b32 v37, s17, 13 +; SI-NEXT: v_writelane_b32 v36, s16, 20 +; SI-NEXT: v_writelane_b32 v36, s17, 21 ; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 16 -; SI-NEXT: v_writelane_b32 v37, s16, 10 -; SI-NEXT: v_writelane_b32 v37, s17, 11 +; SI-NEXT: v_writelane_b32 v36, s16, 18 +; SI-NEXT: v_writelane_b32 v36, s17, 19 ; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 8 -; SI-NEXT: v_writelane_b32 v37, s16, 8 -; SI-NEXT: v_writelane_b32 v37, s17, 9 +; SI-NEXT: v_writelane_b32 v36, s16, 16 +; SI-NEXT: v_writelane_b32 v36, s17, 17 ; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 24 -; SI-NEXT: v_writelane_b32 v37, s16, 18 -; SI-NEXT: v_writelane_b32 v37, s17, 19 +; SI-NEXT: v_writelane_b32 v36, s16, 26 +; SI-NEXT: v_writelane_b32 v36, s17, 27 ; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 16 -; SI-NEXT: v_writelane_b32 v37, s16, 16 -; SI-NEXT: v_writelane_b32 v37, s17, 17 +; SI-NEXT: v_writelane_b32 v36, s16, 24 +; SI-NEXT: v_writelane_b32 v36, s17, 25 ; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 8 -; SI-NEXT: v_writelane_b32 v37, s16, 14 -; SI-NEXT: v_writelane_b32 v37, s17, 15 -; SI-NEXT: s_lshr_b64 vcc, s[62:63], 24 -; SI-NEXT: v_writelane_b32 v37, vcc_lo, 24 -; SI-NEXT: v_writelane_b32 v37, vcc_hi, 25 +; SI-NEXT: v_writelane_b32 v36, s16, 22 +; SI-NEXT: v_writelane_b32 v36, s17, 23 +; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 24 +; SI-NEXT: v_writelane_b32 v36, s16, 32 +; SI-NEXT: v_writelane_b32 v36, s17, 33 ; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16 -; SI-NEXT: v_writelane_b32 v37, s16, 22 -; SI-NEXT: v_writelane_b32 v37, s17, 23 +; SI-NEXT: v_writelane_b32 v36, s16, 30 +; SI-NEXT: v_writelane_b32 v36, s17, 31 ; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 8 -; SI-NEXT: v_writelane_b32 v37, s16, 20 -; SI-NEXT: v_writelane_b32 v37, s17, 21 -; SI-NEXT: s_lshr_b64 vcc, s[58:59], 24 -; SI-NEXT: v_writelane_b32 v37, vcc_lo, 30 -; SI-NEXT: v_writelane_b32 v37, vcc_hi, 31 -; SI-NEXT: s_lshr_b64 vcc, s[58:59], 16 -; SI-NEXT: v_writelane_b32 v37, vcc_lo, 28 -; SI-NEXT: v_writelane_b32 v37, vcc_hi, 29 -; SI-NEXT: s_lshr_b64 vcc, s[58:59], 8 -; SI-NEXT: v_writelane_b32 v37, vcc_lo, 26 -; SI-NEXT: v_writelane_b32 v37, vcc_hi, 27 -; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 24 -; SI-NEXT: v_writelane_b32 v37, s16, 36 -; SI-NEXT: v_writelane_b32 v37, s17, 37 -; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16 -; SI-NEXT: v_writelane_b32 v37, s16, 34 -; SI-NEXT: v_writelane_b32 v37, s17, 35 -; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 8 -; SI-NEXT: v_writelane_b32 v37, s16, 32 -; SI-NEXT: v_writelane_b32 v37, s17, 33 +; SI-NEXT: v_writelane_b32 v36, s16, 28 +; SI-NEXT: v_writelane_b32 v36, s17, 29 ; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 24 -; SI-NEXT: v_writelane_b32 v37, s16, 42 -; SI-NEXT: v_writelane_b32 v37, s17, 43 +; SI-NEXT: v_writelane_b32 v36, s16, 38 +; SI-NEXT: v_writelane_b32 v36, s17, 39 ; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16 -; SI-NEXT: v_writelane_b32 v37, s16, 40 -; SI-NEXT: v_writelane_b32 v37, s17, 41 +; SI-NEXT: v_writelane_b32 v36, s16, 36 +; SI-NEXT: v_writelane_b32 v36, s17, 37 ; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 8 -; SI-NEXT: v_writelane_b32 v37, s16, 38 -; SI-NEXT: v_writelane_b32 v37, s17, 39 +; SI-NEXT: v_writelane_b32 v36, s16, 34 +; SI-NEXT: v_writelane_b32 v36, s17, 35 +; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 24 +; SI-NEXT: v_writelane_b32 v36, s16, 44 +; SI-NEXT: v_writelane_b32 v36, s17, 45 +; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 16 +; SI-NEXT: v_writelane_b32 v36, s16, 42 +; SI-NEXT: v_writelane_b32 v36, s17, 43 +; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 8 +; SI-NEXT: v_writelane_b32 v36, s16, 40 +; SI-NEXT: v_writelane_b32 v36, s17, 41 +; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 24 +; SI-NEXT: v_writelane_b32 v36, s16, 50 +; SI-NEXT: v_writelane_b32 v36, s17, 51 +; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16 +; SI-NEXT: v_writelane_b32 v36, s16, 48 +; SI-NEXT: v_writelane_b32 v36, s17, 49 +; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 8 +; SI-NEXT: v_writelane_b32 v36, s16, 46 +; SI-NEXT: v_writelane_b32 v36, s17, 47 ; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 24 -; SI-NEXT: v_writelane_b32 v37, s16, 48 -; SI-NEXT: v_writelane_b32 v37, s17, 49 +; SI-NEXT: v_writelane_b32 v36, s16, 56 +; SI-NEXT: v_writelane_b32 v36, s17, 57 ; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 16 -; SI-NEXT: v_writelane_b32 v37, s16, 46 -; SI-NEXT: v_writelane_b32 v37, s17, 47 +; SI-NEXT: v_writelane_b32 v36, s16, 54 +; SI-NEXT: v_writelane_b32 v36, s17, 55 ; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 8 -; SI-NEXT: v_writelane_b32 v37, s16, 44 -; SI-NEXT: v_writelane_b32 v37, s17, 45 +; SI-NEXT: v_writelane_b32 v36, s16, 52 +; SI-NEXT: v_writelane_b32 v36, s17, 53 ; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 24 -; SI-NEXT: v_writelane_b32 v37, s16, 54 -; SI-NEXT: v_writelane_b32 v37, s17, 55 +; SI-NEXT: v_writelane_b32 v36, s16, 62 +; SI-NEXT: v_writelane_b32 v36, s17, 63 ; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 16 -; SI-NEXT: v_writelane_b32 v37, s16, 52 -; SI-NEXT: v_writelane_b32 v37, s17, 53 +; SI-NEXT: v_writelane_b32 v36, s16, 60 +; SI-NEXT: v_writelane_b32 v36, s17, 61 ; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 8 -; SI-NEXT: v_writelane_b32 v37, s16, 50 -; SI-NEXT: v_writelane_b32 v37, s17, 51 +; SI-NEXT: v_writelane_b32 v36, s16, 58 +; SI-NEXT: v_writelane_b32 v36, s17, 59 ; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 24 -; SI-NEXT: v_writelane_b32 v37, s16, 60 -; SI-NEXT: v_writelane_b32 v37, s17, 61 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_writelane_b32 v37, s16, 4 +; SI-NEXT: v_writelane_b32 v37, s17, 5 ; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16 -; SI-NEXT: v_writelane_b32 v37, s16, 58 -; SI-NEXT: v_writelane_b32 v37, s17, 59 +; SI-NEXT: v_writelane_b32 v37, s16, 2 +; SI-NEXT: v_writelane_b32 v37, s17, 3 ; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 8 -; SI-NEXT: v_writelane_b32 v37, s16, 56 -; SI-NEXT: v_writelane_b32 v37, s17, 57 +; SI-NEXT: v_writelane_b32 v37, s16, 0 +; SI-NEXT: v_writelane_b32 v37, s17, 1 ; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 24 -; SI-NEXT: v_writelane_b32 v36, s16, 2 -; SI-NEXT: v_writelane_b32 v36, s17, 3 +; SI-NEXT: v_writelane_b32 v37, s16, 10 +; SI-NEXT: v_writelane_b32 v37, s17, 11 ; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 16 -; SI-NEXT: v_writelane_b32 v36, s16, 0 -; SI-NEXT: v_writelane_b32 v36, s17, 1 +; SI-NEXT: v_writelane_b32 v37, s16, 8 +; SI-NEXT: v_writelane_b32 v37, s17, 9 ; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 8 -; SI-NEXT: v_writelane_b32 v37, s16, 62 -; SI-NEXT: v_writelane_b32 v37, s17, 63 +; SI-NEXT: v_writelane_b32 v37, s16, 6 +; SI-NEXT: v_writelane_b32 v37, s17, 7 ; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 24 -; SI-NEXT: v_writelane_b32 v36, s16, 8 -; SI-NEXT: v_writelane_b32 v36, s17, 9 +; SI-NEXT: v_writelane_b32 v37, s16, 16 +; SI-NEXT: v_writelane_b32 v37, s17, 17 ; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 16 -; SI-NEXT: v_writelane_b32 v36, s16, 6 -; SI-NEXT: v_writelane_b32 v36, s17, 7 +; SI-NEXT: v_writelane_b32 v37, s16, 14 +; SI-NEXT: v_writelane_b32 v37, s17, 15 ; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 8 -; SI-NEXT: v_writelane_b32 v36, s16, 4 -; SI-NEXT: v_writelane_b32 v36, s17, 5 +; SI-NEXT: v_writelane_b32 v37, s16, 12 +; SI-NEXT: v_writelane_b32 v37, s17, 13 ; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 24 -; SI-NEXT: v_writelane_b32 v36, s16, 14 -; SI-NEXT: v_writelane_b32 v36, s17, 15 +; SI-NEXT: v_writelane_b32 v37, s16, 22 +; SI-NEXT: v_writelane_b32 v37, s17, 23 ; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 16 -; SI-NEXT: v_writelane_b32 v36, s16, 12 -; SI-NEXT: v_writelane_b32 v36, s17, 13 +; SI-NEXT: v_writelane_b32 v37, s16, 20 +; SI-NEXT: v_writelane_b32 v37, s17, 21 ; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 8 -; SI-NEXT: v_writelane_b32 v36, s16, 10 -; SI-NEXT: v_writelane_b32 v36, s17, 11 +; SI-NEXT: v_writelane_b32 v37, s16, 18 +; SI-NEXT: v_writelane_b32 v37, s17, 19 ; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 24 -; SI-NEXT: v_writelane_b32 v36, s16, 20 -; SI-NEXT: v_writelane_b32 v36, s17, 21 +; SI-NEXT: v_writelane_b32 v37, s16, 28 +; SI-NEXT: v_writelane_b32 v37, s17, 29 ; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16 -; SI-NEXT: v_writelane_b32 v36, s16, 18 -; SI-NEXT: v_writelane_b32 v36, s17, 19 +; SI-NEXT: v_writelane_b32 v37, s16, 26 +; SI-NEXT: v_writelane_b32 v37, s17, 27 ; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 8 -; SI-NEXT: v_writelane_b32 v36, s16, 16 -; SI-NEXT: v_writelane_b32 v36, s17, 17 +; SI-NEXT: v_writelane_b32 v37, s16, 24 +; SI-NEXT: v_writelane_b32 v37, s17, 25 ; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 24 -; SI-NEXT: v_writelane_b32 v36, s16, 26 -; SI-NEXT: v_writelane_b32 v36, s17, 27 +; SI-NEXT: v_writelane_b32 v37, s16, 34 +; SI-NEXT: v_writelane_b32 v37, s17, 35 ; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16 -; SI-NEXT: v_writelane_b32 v36, s16, 24 -; SI-NEXT: v_writelane_b32 v36, s17, 25 +; SI-NEXT: v_writelane_b32 v37, s16, 32 +; SI-NEXT: v_writelane_b32 v37, s17, 33 ; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 8 -; SI-NEXT: v_writelane_b32 v36, s16, 22 -; SI-NEXT: v_writelane_b32 v36, s17, 23 +; SI-NEXT: v_writelane_b32 v37, s16, 30 +; SI-NEXT: v_writelane_b32 v37, s17, 31 ; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 24 -; SI-NEXT: v_writelane_b32 v36, s16, 32 -; SI-NEXT: v_writelane_b32 v36, s17, 33 +; SI-NEXT: v_writelane_b32 v37, s16, 40 +; SI-NEXT: v_writelane_b32 v37, s17, 41 ; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 16 -; SI-NEXT: v_writelane_b32 v36, s16, 30 -; SI-NEXT: v_writelane_b32 v36, s17, 31 +; SI-NEXT: v_writelane_b32 v37, s16, 38 +; SI-NEXT: v_writelane_b32 v37, s17, 39 ; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 8 -; SI-NEXT: v_writelane_b32 v36, s16, 28 -; SI-NEXT: v_writelane_b32 v36, s17, 29 -; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 36 -; SI-NEXT: v_writelane_b32 v36, vcc_hi, 37 -; SI-NEXT: s_lshr_b64 vcc, s[4:5], 8 +; SI-NEXT: v_writelane_b32 v37, s16, 36 +; SI-NEXT: v_writelane_b32 v37, s17, 37 ; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 24 -; SI-NEXT: v_writelane_b32 v36, vcc_lo, 34 -; SI-NEXT: s_bfe_u32 s87, s67, 0x80008 -; SI-NEXT: s_bfe_u32 s50, s71, 0x80008 -; SI-NEXT: s_bfe_u32 s96, s82, 0x80008 -; SI-NEXT: s_mov_b32 s17, s85 -; SI-NEXT: s_mov_b32 s85, s97 -; SI-NEXT: s_mov_b32 s97, s65 -; SI-NEXT: s_mov_b32 s65, s98 -; SI-NEXT: s_mov_b32 s98, s76 -; SI-NEXT: s_mov_b32 s76, s69 -; SI-NEXT: s_mov_b32 s69, s99 -; SI-NEXT: s_mov_b32 s99, s77 -; SI-NEXT: s_mov_b32 s77, s38 -; SI-NEXT: s_mov_b32 s38, s81 -; SI-NEXT: s_mov_b32 s81, s78 -; SI-NEXT: v_writelane_b32 v36, vcc_hi, 35 +; SI-NEXT: v_writelane_b32 v37, s16, 46 +; SI-NEXT: v_writelane_b32 v37, s17, 47 +; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16 +; SI-NEXT: v_writelane_b32 v37, s16, 44 +; SI-NEXT: v_writelane_b32 v37, s17, 45 +; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 8 +; SI-NEXT: v_writelane_b32 v37, s16, 42 +; SI-NEXT: v_writelane_b32 v37, s17, 43 +; SI-NEXT: s_lshr_b32 s16, s75, 8 +; SI-NEXT: v_writelane_b32 v35, s16, 1 +; SI-NEXT: s_lshr_b32 s16, s73, 8 +; SI-NEXT: v_writelane_b32 v35, s16, 0 +; SI-NEXT: s_lshr_b32 s16, s63, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 63 +; SI-NEXT: s_lshr_b32 s16, s61, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 62 +; SI-NEXT: s_lshr_b32 s16, s59, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 61 +; SI-NEXT: s_lshr_b32 s16, s57, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 60 +; SI-NEXT: s_lshr_b32 s16, s47, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 59 +; SI-NEXT: s_lshr_b32 s16, s45, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 58 +; SI-NEXT: s_lshr_b32 s16, s43, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 57 +; SI-NEXT: s_lshr_b32 s16, s41, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 56 +; SI-NEXT: s_lshr_b32 s16, s15, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 55 +; SI-NEXT: s_lshr_b32 s16, s13, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 53 +; SI-NEXT: s_lshr_b32 s16, s11, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 54 +; SI-NEXT: s_lshr_b32 s16, s9, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 52 +; SI-NEXT: s_lshr_b32 s16, s7, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 51 +; SI-NEXT: s_lshr_b32 s16, s5, 8 +; SI-NEXT: v_writelane_b32 v37, s16, 50 +; SI-NEXT: s_bfe_u32 s16, s76, 0x80008 +; SI-NEXT: v_writelane_b32 v37, s16, 49 +; SI-NEXT: s_bfe_u32 s16, s77, 0x80008 +; SI-NEXT: v_writelane_b32 v37, s16, 48 +; SI-NEXT: s_bfe_u32 s67, s78, 0x80008 +; SI-NEXT: s_bfe_u32 s81, s79, 0x80008 +; SI-NEXT: s_bfe_u32 s83, s88, 0x80008 +; SI-NEXT: s_bfe_u32 s52, s89, 0x80008 +; SI-NEXT: s_bfe_u32 s85, s90, 0x80008 +; SI-NEXT: s_bfe_u32 s87, s94, 0x80008 +; SI-NEXT: s_bfe_u32 s68, s92, 0x80008 +; SI-NEXT: s_bfe_u32 s95, s93, 0x80008 +; SI-NEXT: s_bfe_u32 s65, s64, 0x80008 +; SI-NEXT: s_bfe_u32 s17, s70, 0x80008 +; SI-NEXT: s_bfe_u32 s48, s82, 0x80008 +; SI-NEXT: s_bfe_u32 s16, s96, 0x80008 +; SI-NEXT: s_bfe_u32 s19, s99, 0x80008 +; SI-NEXT: s_bfe_u32 s31, s53, 0x80008 ; SI-NEXT: s_cbranch_execnz .LBB95_4 ; SI-NEXT: .LBB95_2: ; %cmp.true -; SI-NEXT: v_cvt_f32_f16_e32 v2, s83 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s84 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s82 -; SI-NEXT: v_readlane_b32 s46, v37, 7 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s34 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s55 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s53 +; SI-NEXT: v_readlane_b32 s10, v36, 15 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_readfirstlane_b32 s5, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s34 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s81 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s51 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s39 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_readfirstlane_b32 s4, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 @@ -181676,963 +181930,936 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: s_lshl_b32 s4, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s6, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s80 ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: v_readfirstlane_b32 s5, v1 ; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: v_readfirstlane_b32 s6, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s37 ; SI-NEXT: s_or_b32 s5, s6, s5 ; SI-NEXT: v_readfirstlane_b32 s6, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s71 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s99 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v2 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s70 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s98 ; SI-NEXT: v_readfirstlane_b32 s7, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s38 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s35 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: s_or_b32 s6, s7, s6 +; SI-NEXT: v_readfirstlane_b32 s8, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s97 ; SI-NEXT: v_readfirstlane_b32 s7, v2 ; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: v_readfirstlane_b32 s8, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s68 ; SI-NEXT: s_or_b32 s7, s8, s7 ; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s67 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s96 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v3 ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s66 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s86 ; SI-NEXT: v_readfirstlane_b32 s9, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s99 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s10 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: v_readfirstlane_b32 s10, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s64 ; SI-NEXT: v_readfirstlane_b32 s9, v3 ; SI-NEXT: s_lshl_b32 s9, s9, 16 +; SI-NEXT: v_readfirstlane_b32 s10, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s84 ; SI-NEXT: s_or_b32 s9, s10, s9 ; SI-NEXT: v_readfirstlane_b32 s10, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s55 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s82 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v4 -; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: v_readlane_b32 s12, v36, 14 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s54 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s80 ; SI-NEXT: v_readfirstlane_b32 s11, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s69 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s12 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: v_readfirstlane_b32 s12, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s71 ; SI-NEXT: s_or_b32 s10, s11, s10 ; SI-NEXT: v_readfirstlane_b32 s11, v4 ; SI-NEXT: s_lshl_b32 s11, s11, 16 -; SI-NEXT: v_readfirstlane_b32 s12, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s53 ; SI-NEXT: s_or_b32 s11, s12, s11 ; SI-NEXT: v_readfirstlane_b32 s12, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s52 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s70 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v5 -; SI-NEXT: s_lshl_b32 s12, s12, 16 +; SI-NEXT: v_readlane_b32 s14, v36, 13 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s51 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s69 ; SI-NEXT: v_readfirstlane_b32 s13, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s98 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s14 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: v_readfirstlane_b32 s14, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s49 ; SI-NEXT: v_readfirstlane_b32 s13, v5 ; SI-NEXT: s_lshl_b32 s13, s13, 16 +; SI-NEXT: v_readfirstlane_b32 s14, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s66 ; SI-NEXT: s_or_b32 s13, s14, s13 ; SI-NEXT: v_readfirstlane_b32 s14, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s48 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s64 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v6 -; SI-NEXT: s_lshl_b32 s14, s14, 16 +; SI-NEXT: v_readlane_b32 s16, v36, 12 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s39 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s54 ; SI-NEXT: v_readfirstlane_b32 s15, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s65 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s16 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: s_lshl_b32 s14, s14, 16 +; SI-NEXT: v_readfirstlane_b32 s16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s50 ; SI-NEXT: s_or_b32 s14, s15, s14 ; SI-NEXT: v_readfirstlane_b32 s15, v6 ; SI-NEXT: s_lshl_b32 s15, s15, 16 -; SI-NEXT: v_readfirstlane_b32 s40, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s37 -; SI-NEXT: s_or_b32 s15, s40, s15 -; SI-NEXT: v_readfirstlane_b32 s40, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s36 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v7 -; SI-NEXT: s_lshl_b32 s40, s40, 16 +; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: v_readfirstlane_b32 s16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s93 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: v_readfirstlane_b32 s17, v9 +; SI-NEXT: s_or_b32 s40, s17, s16 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s35 -; SI-NEXT: v_readfirstlane_b32 s41, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s85 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s49 +; SI-NEXT: v_readlane_b32 s17, v36, 11 +; SI-NEXT: v_cvt_f32_f16_e32 v9, s17 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: s_or_b32 s40, s41, s40 -; SI-NEXT: v_readfirstlane_b32 s42, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s31 -; SI-NEXT: v_readfirstlane_b32 s41, v7 -; SI-NEXT: s_lshl_b32 s41, s41, 16 -; SI-NEXT: s_or_b32 s41, s42, s41 -; SI-NEXT: v_readfirstlane_b32 s42, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s95 +; SI-NEXT: v_readfirstlane_b32 s16, v7 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: v_readfirstlane_b32 s17, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s38 +; SI-NEXT: s_or_b32 s41, s17, s16 +; SI-NEXT: v_readfirstlane_b32 s16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, s92 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v8 -; SI-NEXT: s_lshl_b32 s42, s42, 16 +; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s94 -; SI-NEXT: v_readfirstlane_b32 s43, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v10, s30 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v9, s36 +; SI-NEXT: v_readfirstlane_b32 s17, v10 +; SI-NEXT: s_or_b32 s42, s17, s16 +; SI-NEXT: v_readlane_b32 s17, v36, 10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s17 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: s_lshr_b64 s[52:53], s[40:41], 24 +; SI-NEXT: v_readfirstlane_b32 s17, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, s30 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: s_or_b32 s42, s43, s42 -; SI-NEXT: v_readfirstlane_b32 s43, v8 -; SI-NEXT: s_lshl_b32 s43, s43, 16 -; SI-NEXT: v_readfirstlane_b32 s44, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s93 -; SI-NEXT: s_or_b32 s43, s44, s43 -; SI-NEXT: v_readfirstlane_b32 s44, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v10, s92 +; SI-NEXT: v_readfirstlane_b32 s16, v8 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v9 -; SI-NEXT: s_lshl_b32 s44, s44, 16 +; SI-NEXT: s_or_b32 s43, s17, s16 +; SI-NEXT: v_readfirstlane_b32 s16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s94 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: v_readfirstlane_b32 s17, v11 +; SI-NEXT: s_or_b32 s44, s17, s16 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v10 ; SI-NEXT: v_cvt_f32_f16_e32 v10, s91 -; SI-NEXT: v_readfirstlane_b32 s45, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s46 +; SI-NEXT: v_readlane_b32 s17, v36, 9 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s17 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: s_or_b32 s44, s45, s44 -; SI-NEXT: v_readfirstlane_b32 s46, v10 +; SI-NEXT: v_readfirstlane_b32 s16, v9 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: v_readfirstlane_b32 s17, v10 ; SI-NEXT: v_cvt_f32_f16_e32 v10, s28 -; SI-NEXT: v_readfirstlane_b32 s28, v11 +; SI-NEXT: s_or_b32 s45, s17, s16 +; SI-NEXT: v_readfirstlane_b32 s16, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v11, s90 -; SI-NEXT: v_readfirstlane_b32 s45, v9 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v10 -; SI-NEXT: s_lshl_b32 s45, s45, 16 +; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v11, s29 -; SI-NEXT: v_readlane_b32 s29, v37, 6 -; SI-NEXT: s_or_b32 s45, s46, s45 -; SI-NEXT: v_readfirstlane_b32 s46, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s29 +; SI-NEXT: v_readfirstlane_b32 s17, v12 +; SI-NEXT: s_or_b32 s46, s17, s16 +; SI-NEXT: v_readlane_b32 s17, v36, 8 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s17 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: s_lshr_b64 s[80:81], s[44:45], 24 +; SI-NEXT: v_readfirstlane_b32 s17, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s26 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_readfirstlane_b32 s29, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s26 -; SI-NEXT: s_lshl_b32 s28, s28, 16 -; SI-NEXT: v_readfirstlane_b32 s26, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s89 +; SI-NEXT: v_readfirstlane_b32 s16, v10 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v11 -; SI-NEXT: s_or_b32 s46, s46, s28 +; SI-NEXT: s_or_b32 s47, s17, s16 +; SI-NEXT: v_readfirstlane_b32 s16, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s89 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: v_readfirstlane_b32 s17, v13 +; SI-NEXT: s_or_b32 s56, s17, s16 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v12, s27 -; SI-NEXT: v_readfirstlane_b32 s28, v10 -; SI-NEXT: s_lshl_b32 s28, s28, 16 -; SI-NEXT: v_readlane_b32 s27, v37, 5 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: s_or_b32 s47, s29, s28 -; SI-NEXT: v_readfirstlane_b32 s28, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s27 -; SI-NEXT: v_readfirstlane_b32 s27, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s24 +; SI-NEXT: v_readlane_b32 s17, v36, 7 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s17 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: s_lshl_b32 s26, s26, 16 -; SI-NEXT: s_or_b32 s60, s28, s26 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_readfirstlane_b32 s26, v11 -; SI-NEXT: s_lshl_b32 s26, s26, 16 -; SI-NEXT: s_or_b32 s61, s27, s26 -; SI-NEXT: v_readfirstlane_b32 s26, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s25 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_readlane_b32 s25, v37, 4 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_readfirstlane_b32 s24, v13 +; SI-NEXT: v_readfirstlane_b32 s16, v11 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: v_readfirstlane_b32 s17, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s24 +; SI-NEXT: s_or_b32 s57, s17, s16 +; SI-NEXT: v_readfirstlane_b32 s16, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v13, s88 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s25 -; SI-NEXT: v_readfirstlane_b32 s25, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s22 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v12 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s25 +; SI-NEXT: v_readfirstlane_b32 s17, v14 +; SI-NEXT: s_or_b32 s58, s17, s16 +; SI-NEXT: v_readlane_b32 s17, v36, 6 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: s_lshl_b32 s24, s24, 16 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s17 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: s_or_b32 s56, s26, s24 -; SI-NEXT: v_readfirstlane_b32 s24, v13 -; SI-NEXT: s_lshl_b32 s24, s24, 16 +; SI-NEXT: s_lshr_b64 s[26:27], s[56:57], 8 +; SI-NEXT: v_readfirstlane_b32 s17, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s22 +; SI-NEXT: v_readfirstlane_b32 s16, v12 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: s_or_b32 s59, s17, s16 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: s_or_b32 s57, s25, s24 -; SI-NEXT: v_readfirstlane_b32 s24, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s23 -; SI-NEXT: v_readfirstlane_b32 s22, v14 +; SI-NEXT: s_lshr_b64 s[88:89], s[58:59], 8 +; SI-NEXT: v_readfirstlane_b32 s17, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s23 +; SI-NEXT: v_readfirstlane_b32 s16, v14 ; SI-NEXT: v_cvt_f32_f16_e32 v14, s79 -; SI-NEXT: v_readlane_b32 s23, v37, 3 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s23 -; SI-NEXT: v_readfirstlane_b32 s23, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s20 -; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: s_or_b32 s58, s24, s22 -; SI-NEXT: v_readfirstlane_b32 s22, v16 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: s_or_b32 s59, s23, s22 -; SI-NEXT: v_readfirstlane_b32 s22, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s21 -; SI-NEXT: v_readfirstlane_b32 s20, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s86 -; SI-NEXT: v_readlane_b32 s21, v37, 2 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s21 -; SI-NEXT: v_readfirstlane_b32 s21, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s18 -; SI-NEXT: s_lshl_b32 s20, s20, 16 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: s_or_b32 s62, s22, s20 -; SI-NEXT: v_readfirstlane_b32 s20, v20 -; SI-NEXT: s_lshl_b32 s20, s20, 16 -; SI-NEXT: v_readfirstlane_b32 s18, v14 -; SI-NEXT: s_or_b32 s63, s21, s20 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: v_readfirstlane_b32 s20, v12 -; SI-NEXT: s_or_b32 s72, s20, s18 -; SI-NEXT: s_lshr_b64 s[20:21], s[46:47], 24 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s19 -; SI-NEXT: v_readlane_b32 s19, v37, 0 -; SI-NEXT: v_writelane_b32 v37, s20, 48 -; SI-NEXT: v_writelane_b32 v37, s21, 49 -; SI-NEXT: s_lshr_b64 s[20:21], s[46:47], 16 -; SI-NEXT: v_writelane_b32 v37, s20, 46 -; SI-NEXT: v_writelane_b32 v37, s21, 47 -; SI-NEXT: s_lshr_b64 s[20:21], s[44:45], 24 -; SI-NEXT: v_writelane_b32 v37, s20, 54 -; SI-NEXT: v_writelane_b32 v37, s21, 55 -; SI-NEXT: s_lshr_b64 s[20:21], s[40:41], 16 -; SI-NEXT: v_writelane_b32 v36, s20, 0 -; SI-NEXT: v_writelane_b32 v36, s21, 1 -; SI-NEXT: s_lshr_b64 s[50:51], s[12:13], 24 -; SI-NEXT: v_writelane_b32 v36, s50, 14 -; SI-NEXT: v_writelane_b32 v36, s51, 15 -; SI-NEXT: s_lshr_b64 s[50:51], s[12:13], 16 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s77 -; SI-NEXT: v_writelane_b32 v36, s50, 12 -; SI-NEXT: v_writelane_b32 v36, s51, 13 -; SI-NEXT: s_lshr_b64 s[50:51], s[12:13], 8 -; SI-NEXT: v_writelane_b32 v36, s50, 10 -; SI-NEXT: v_writelane_b32 v36, s51, 11 -; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 24 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_writelane_b32 v36, s50, 20 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s19 -; SI-NEXT: v_writelane_b32 v36, s51, 21 -; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 16 -; SI-NEXT: v_writelane_b32 v36, s50, 18 -; SI-NEXT: v_writelane_b32 v36, s51, 19 -; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 8 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_writelane_b32 v36, s50, 16 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: s_or_b32 s60, s17, s16 +; SI-NEXT: v_readlane_b32 s17, v36, 5 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s17 +; SI-NEXT: v_readfirstlane_b32 s17, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s20 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s97 -; SI-NEXT: v_writelane_b32 v36, s51, 17 -; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 24 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_writelane_b32 v36, s50, 26 -; SI-NEXT: v_writelane_b32 v36, s51, 27 -; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 16 -; SI-NEXT: v_readfirstlane_b32 s18, v23 -; SI-NEXT: v_writelane_b32 v36, s50, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: v_readfirstlane_b32 s16, v12 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v15 -; SI-NEXT: v_writelane_b32 v36, s51, 25 -; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 8 -; SI-NEXT: s_or_b32 s73, s16, s18 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_readfirstlane_b32 s16, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s76 -; SI-NEXT: v_writelane_b32 v36, s50, 22 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: s_or_b32 s61, s17, s16 +; SI-NEXT: v_readfirstlane_b32 s17, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s21 +; SI-NEXT: v_readfirstlane_b32 s16, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s78 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: s_or_b32 s62, s17, s16 +; SI-NEXT: v_readlane_b32 s17, v36, 4 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v15 ; SI-NEXT: v_cvt_f32_f16_e32 v15, s17 -; SI-NEXT: v_writelane_b32 v36, s51, 23 -; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 24 -; SI-NEXT: v_writelane_b32 v36, s50, 32 -; SI-NEXT: v_writelane_b32 v36, s51, 33 -; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 16 -; SI-NEXT: v_readfirstlane_b32 s17, v12 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v14 -; SI-NEXT: v_writelane_b32 v36, s50, 30 -; SI-NEXT: v_cvt_f16_f32_e32 v27, v12 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v15 -; SI-NEXT: v_writelane_b32 v36, s51, 31 -; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_writelane_b32 v36, s50, 28 -; SI-NEXT: v_writelane_b32 v36, s51, 29 -; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 24 +; SI-NEXT: v_readfirstlane_b32 s17, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s18 +; SI-NEXT: v_readfirstlane_b32 s16, v17 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: s_or_b32 s63, s17, s16 +; SI-NEXT: v_readfirstlane_b32 s16, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s77 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: v_readfirstlane_b32 s17, v13 +; SI-NEXT: s_or_b32 s72, s17, s16 +; SI-NEXT: v_readlane_b32 s16, v36, 2 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s16 +; SI-NEXT: v_readlane_b32 s17, v36, 3 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s17 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_readlane_b32 s17, v36, 1 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s17 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_readfirstlane_b32 s16, v20 +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: v_readfirstlane_b32 s17, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v16 +; SI-NEXT: s_or_b32 s73, s17, s16 +; SI-NEXT: v_readfirstlane_b32 s16, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s76 +; SI-NEXT: v_readlane_b32 s17, v36, 0 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s17 +; SI-NEXT: v_readfirstlane_b32 s17, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: s_lshl_b32 s16, s16, 16 -; SI-NEXT: v_writelane_b32 v37, s50, 0 ; SI-NEXT: s_or_b32 s74, s17, s16 -; SI-NEXT: v_readfirstlane_b32 s16, v27 -; SI-NEXT: v_writelane_b32 v37, s51, 1 -; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s16, v24 ; SI-NEXT: s_lshl_b32 s16, s16, 16 -; SI-NEXT: v_readfirstlane_b32 s17, v12 -; SI-NEXT: v_writelane_b32 v36, s50, 36 +; SI-NEXT: v_readfirstlane_b32 s17, v13 ; SI-NEXT: s_or_b32 s75, s17, s16 -; SI-NEXT: v_writelane_b32 v36, s51, 37 -; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 8 +; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 24 +; SI-NEXT: v_writelane_b32 v37, s16, 16 +; SI-NEXT: v_writelane_b32 v37, s17, 17 +; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 16 +; SI-NEXT: v_writelane_b32 v37, s16, 14 +; SI-NEXT: v_writelane_b32 v37, s17, 15 +; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 24 +; SI-NEXT: v_writelane_b32 v37, s16, 22 +; SI-NEXT: v_writelane_b32 v37, s17, 23 +; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 16 +; SI-NEXT: v_writelane_b32 v37, s16, 20 +; SI-NEXT: v_writelane_b32 v37, s17, 21 +; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 8 +; SI-NEXT: v_writelane_b32 v37, s16, 18 +; SI-NEXT: v_writelane_b32 v37, s17, 19 +; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 24 +; SI-NEXT: v_writelane_b32 v37, s16, 28 +; SI-NEXT: v_writelane_b32 v37, s17, 29 +; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16 +; SI-NEXT: v_writelane_b32 v37, s16, 26 +; SI-NEXT: v_writelane_b32 v37, s17, 27 +; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 8 +; SI-NEXT: v_writelane_b32 v37, s16, 24 +; SI-NEXT: v_writelane_b32 v37, s17, 25 +; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 24 +; SI-NEXT: v_writelane_b32 v37, s16, 34 +; SI-NEXT: v_writelane_b32 v37, s17, 35 +; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16 +; SI-NEXT: v_writelane_b32 v37, s16, 32 +; SI-NEXT: v_writelane_b32 v37, s17, 33 +; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 8 +; SI-NEXT: v_writelane_b32 v37, s16, 30 +; SI-NEXT: v_writelane_b32 v37, s17, 31 +; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 24 +; SI-NEXT: v_writelane_b32 v37, s16, 40 +; SI-NEXT: v_writelane_b32 v37, s17, 41 +; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 16 +; SI-NEXT: v_writelane_b32 v37, s16, 38 +; SI-NEXT: v_writelane_b32 v37, s17, 39 +; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 8 +; SI-NEXT: v_writelane_b32 v37, s16, 36 +; SI-NEXT: v_writelane_b32 v37, s17, 37 +; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 24 +; SI-NEXT: v_writelane_b32 v37, s16, 46 +; SI-NEXT: v_writelane_b32 v37, s17, 47 +; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16 +; SI-NEXT: v_writelane_b32 v37, s16, 44 ; SI-NEXT: s_lshr_b64 s[18:19], s[74:75], 24 -; SI-NEXT: s_lshr_b64 s[54:55], s[74:75], 16 -; SI-NEXT: s_lshr_b64 s[38:39], s[72:73], 16 -; SI-NEXT: s_lshr_b64 s[52:53], s[72:73], 8 -; SI-NEXT: s_lshr_b64 s[88:89], s[62:63], 24 -; SI-NEXT: s_lshr_b64 s[94:95], s[62:63], 16 +; SI-NEXT: s_lshr_b64 vcc, s[74:75], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[72:73], 24 +; SI-NEXT: s_lshr_b64 s[90:91], s[62:63], 24 +; SI-NEXT: s_lshr_b64 s[34:35], s[62:63], 16 ; SI-NEXT: s_lshr_b64 s[36:37], s[62:63], 8 -; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 24 +; SI-NEXT: s_lshr_b64 s[28:29], s[60:61], 24 +; SI-NEXT: s_lshr_b64 s[92:93], s[60:61], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[60:61], 8 +; SI-NEXT: s_lshr_b64 s[22:23], s[58:59], 24 ; SI-NEXT: s_lshr_b64 s[78:79], s[58:59], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[58:59], 8 -; SI-NEXT: s_lshr_b64 s[48:49], s[60:61], 24 -; SI-NEXT: s_lshr_b64 s[22:23], s[60:61], 8 -; SI-NEXT: s_lshr_b64 s[86:87], s[14:15], 24 -; SI-NEXT: v_writelane_b32 v36, s50, 34 -; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 8 -; SI-NEXT: s_lshr_b64 vcc, s[72:73], 24 -; SI-NEXT: s_lshr_b64 s[84:85], s[56:57], 24 -; SI-NEXT: s_lshr_b64 s[98:99], s[56:57], 16 -; SI-NEXT: s_lshr_b64 s[64:65], s[56:57], 8 -; SI-NEXT: s_lshr_b64 s[66:67], s[60:61], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[46:47], 8 -; SI-NEXT: s_lshr_b32 s23, s75, 8 -; SI-NEXT: s_lshr_b32 s91, s73, 8 -; SI-NEXT: s_lshr_b32 s89, s63, 8 -; SI-NEXT: s_lshr_b32 s79, s59, 8 -; SI-NEXT: s_lshr_b32 s77, s57, 8 -; SI-NEXT: s_lshr_b32 s29, s61, 8 -; SI-NEXT: s_lshr_b32 s28, s47, 8 -; SI-NEXT: s_lshr_b32 s27, s45, 8 -; SI-NEXT: s_lshr_b32 s26, s43, 8 -; SI-NEXT: s_lshr_b32 s55, s41, 8 -; SI-NEXT: s_lshr_b32 s19, s15, 8 -; SI-NEXT: s_lshr_b32 s53, s13, 8 -; SI-NEXT: s_lshr_b32 s49, s11, 8 -; SI-NEXT: s_lshr_b32 s39, s9, 8 -; SI-NEXT: s_lshr_b32 s37, s7, 8 -; SI-NEXT: s_lshr_b32 s95, s5, 8 -; SI-NEXT: v_bfe_u32 v32, v27, 8, 8 -; SI-NEXT: v_bfe_u32 v31, v23, 8, 8 -; SI-NEXT: v_bfe_u32 v30, v20, 8, 8 -; SI-NEXT: v_bfe_u32 v29, v16, 8, 8 -; SI-NEXT: v_bfe_u32 v28, v13, 8, 8 -; SI-NEXT: v_bfe_u32 v26, v11, 8, 8 -; SI-NEXT: v_bfe_u32 v25, v10, 8, 8 -; SI-NEXT: v_bfe_u32 v24, v9, 8, 8 -; SI-NEXT: v_bfe_u32 v22, v8, 8, 8 -; SI-NEXT: v_bfe_u32 v21, v7, 8, 8 -; SI-NEXT: v_bfe_u32 v19, v6, 8, 8 -; SI-NEXT: v_bfe_u32 v18, v5, 8, 8 -; SI-NEXT: v_bfe_u32 v17, v4, 8, 8 -; SI-NEXT: v_bfe_u32 v15, v3, 8, 8 -; SI-NEXT: v_bfe_u32 v14, v2, 8, 8 -; SI-NEXT: v_bfe_u32 v12, v1, 8, 8 -; SI-NEXT: s_lshr_b64 s[70:71], s[44:45], 16 -; SI-NEXT: s_lshr_b64 s[82:83], s[44:45], 8 -; SI-NEXT: s_lshr_b64 s[30:31], s[42:43], 24 -; SI-NEXT: s_lshr_b64 s[24:25], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 8 -; SI-NEXT: s_lshr_b64 s[96:97], s[40:41], 24 -; SI-NEXT: s_lshr_b64 s[20:21], s[40:41], 8 -; SI-NEXT: s_lshr_b64 s[68:69], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[80:81], s[14:15], 8 -; SI-NEXT: v_writelane_b32 v36, s51, 35 -; SI-NEXT: s_mov_b32 s50, s86 +; SI-NEXT: s_lshr_b64 s[20:21], s[56:57], 24 +; SI-NEXT: s_lshr_b64 s[76:77], s[56:57], 16 +; SI-NEXT: s_lshr_b64 s[24:25], s[46:47], 8 +; SI-NEXT: v_writelane_b32 v37, s17, 45 +; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 8 +; SI-NEXT: s_lshr_b64 s[50:51], s[74:75], 8 +; SI-NEXT: s_lshr_b64 s[48:49], s[72:73], 16 +; SI-NEXT: s_lshr_b64 s[38:39], s[72:73], 8 +; SI-NEXT: s_lshr_b64 s[86:87], s[46:47], 24 +; SI-NEXT: s_lshr_b64 s[98:99], s[46:47], 16 +; SI-NEXT: s_lshr_b64 s[84:85], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[96:97], s[44:45], 8 +; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 24 +; SI-NEXT: s_lshr_b64 s[70:71], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[82:83], s[42:43], 8 +; SI-NEXT: s_lshr_b64 s[64:65], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[68:69], s[40:41], 8 +; SI-NEXT: s_lshr_b64 s[54:55], s[14:15], 8 +; SI-NEXT: v_writelane_b32 v37, s16, 42 +; SI-NEXT: s_lshr_b32 vcc_hi, s75, 8 +; SI-NEXT: s_lshr_b32 s37, s73, 8 +; SI-NEXT: s_lshr_b32 s35, s63, 8 +; SI-NEXT: s_lshr_b32 s31, s61, 8 +; SI-NEXT: s_lshr_b32 s95, s59, 8 +; SI-NEXT: s_lshr_b32 s93, s57, 8 +; SI-NEXT: s_lshr_b32 s91, s47, 8 +; SI-NEXT: s_lshr_b32 s89, s45, 8 +; SI-NEXT: s_lshr_b32 s79, s43, 8 +; SI-NEXT: s_lshr_b32 s77, s41, 8 +; SI-NEXT: s_lshr_b32 s29, s15, 8 +; SI-NEXT: s_lshr_b32 s25, s13, 8 +; SI-NEXT: v_bfe_u32 v32, v24, 8, 8 +; SI-NEXT: v_bfe_u32 v31, v20, 8, 8 +; SI-NEXT: v_bfe_u32 v30, v17, 8, 8 +; SI-NEXT: v_bfe_u32 v29, v14, 8, 8 +; SI-NEXT: v_bfe_u32 v28, v12, 8, 8 +; SI-NEXT: v_bfe_u32 v27, v11, 8, 8 +; SI-NEXT: v_bfe_u32 v26, v10, 8, 8 +; SI-NEXT: v_bfe_u32 v25, v9, 8, 8 +; SI-NEXT: v_bfe_u32 v23, v8, 8, 8 +; SI-NEXT: v_bfe_u32 v22, v7, 8, 8 +; SI-NEXT: v_bfe_u32 v21, v6, 8, 8 +; SI-NEXT: v_bfe_u32 v19, v5, 8, 8 +; SI-NEXT: v_bfe_u32 v18, v4, 8, 8 +; SI-NEXT: v_bfe_u32 v16, v3, 8, 8 +; SI-NEXT: v_bfe_u32 v15, v2, 8, 8 +; SI-NEXT: v_bfe_u32 v13, v1, 8, 8 +; SI-NEXT: s_lshr_b32 s27, s11, 8 +; SI-NEXT: s_lshr_b32 s23, s9, 8 +; SI-NEXT: s_lshr_b32 s21, s7, 8 +; SI-NEXT: s_lshr_b32 s19, s5, 8 +; SI-NEXT: v_writelane_b32 v37, s17, 43 ; SI-NEXT: s_branch .LBB95_5 ; SI-NEXT: .LBB95_3: ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr16 -; SI-NEXT: v_writelane_b32 v37, s4, 8 -; SI-NEXT: v_writelane_b32 v37, s5, 9 -; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $vcc_lo ; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr67 +; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr81 ; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr83 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr87 -; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr96 -; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr85 ; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr87 ; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr68 ; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr95 ; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr65 ; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr17 ; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr48 ; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr16 ; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v37, s4, 10 -; SI-NEXT: v_writelane_b32 v37, s5, 11 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 12 -; SI-NEXT: v_writelane_b32 v37, s5, 13 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 14 -; SI-NEXT: v_writelane_b32 v37, s5, 15 +; SI-NEXT: ; implicit-def: $sgpr19 +; SI-NEXT: ; implicit-def: $sgpr31 +; SI-NEXT: v_writelane_b32 v36, s4, 16 +; SI-NEXT: v_writelane_b32 v36, s5, 17 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 16 -; SI-NEXT: v_writelane_b32 v37, s5, 17 +; SI-NEXT: v_writelane_b32 v36, s4, 18 +; SI-NEXT: v_writelane_b32 v36, s5, 19 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 18 -; SI-NEXT: v_writelane_b32 v37, s5, 19 +; SI-NEXT: v_writelane_b32 v36, s4, 20 +; SI-NEXT: v_writelane_b32 v36, s5, 21 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 20 -; SI-NEXT: v_writelane_b32 v37, s5, 21 +; SI-NEXT: v_writelane_b32 v36, s4, 22 +; SI-NEXT: v_writelane_b32 v36, s5, 23 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 22 -; SI-NEXT: v_writelane_b32 v37, s5, 23 +; SI-NEXT: v_writelane_b32 v36, s4, 24 +; SI-NEXT: v_writelane_b32 v36, s5, 25 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 24 -; SI-NEXT: v_writelane_b32 v37, s5, 25 +; SI-NEXT: v_writelane_b32 v36, s4, 26 +; SI-NEXT: v_writelane_b32 v36, s5, 27 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 26 -; SI-NEXT: v_writelane_b32 v37, s5, 27 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 28 -; SI-NEXT: v_writelane_b32 v37, s5, 29 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 30 -; SI-NEXT: v_writelane_b32 v37, s5, 31 +; SI-NEXT: v_writelane_b32 v36, s4, 28 +; SI-NEXT: v_writelane_b32 v36, s5, 29 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 30 +; SI-NEXT: v_writelane_b32 v36, s5, 31 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 32 +; SI-NEXT: v_writelane_b32 v36, s5, 33 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 34 +; SI-NEXT: v_writelane_b32 v36, s5, 35 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 36 +; SI-NEXT: v_writelane_b32 v36, s5, 37 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 38 +; SI-NEXT: v_writelane_b32 v36, s5, 39 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 40 +; SI-NEXT: v_writelane_b32 v36, s5, 41 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 42 +; SI-NEXT: v_writelane_b32 v36, s5, 43 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 44 +; SI-NEXT: v_writelane_b32 v36, s5, 45 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 46 +; SI-NEXT: v_writelane_b32 v36, s5, 47 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 48 +; SI-NEXT: v_writelane_b32 v36, s5, 49 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 50 +; SI-NEXT: v_writelane_b32 v36, s5, 51 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 52 +; SI-NEXT: v_writelane_b32 v36, s5, 53 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 54 +; SI-NEXT: v_writelane_b32 v36, s5, 55 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 56 +; SI-NEXT: v_writelane_b32 v36, s5, 57 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 58 +; SI-NEXT: v_writelane_b32 v36, s5, 59 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 60 +; SI-NEXT: v_writelane_b32 v36, s5, 61 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v36, s4, 62 +; SI-NEXT: v_writelane_b32 v36, s5, 63 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 32 -; SI-NEXT: v_writelane_b32 v37, s5, 33 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 34 -; SI-NEXT: v_writelane_b32 v37, s5, 35 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 36 -; SI-NEXT: v_writelane_b32 v37, s5, 37 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 38 -; SI-NEXT: v_writelane_b32 v37, s5, 39 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 40 -; SI-NEXT: v_writelane_b32 v37, s5, 41 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 42 -; SI-NEXT: v_writelane_b32 v37, s5, 43 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_writelane_b32 v37, s4, 0 +; SI-NEXT: v_writelane_b32 v37, s5, 1 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 44 -; SI-NEXT: v_writelane_b32 v37, s5, 45 +; SI-NEXT: v_writelane_b32 v37, s4, 2 +; SI-NEXT: v_writelane_b32 v37, s5, 3 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 46 -; SI-NEXT: v_writelane_b32 v37, s5, 47 +; SI-NEXT: v_writelane_b32 v37, s4, 4 +; SI-NEXT: v_writelane_b32 v37, s5, 5 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 48 -; SI-NEXT: v_writelane_b32 v37, s5, 49 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 50 -; SI-NEXT: v_writelane_b32 v37, s5, 51 +; SI-NEXT: v_writelane_b32 v37, s4, 6 +; SI-NEXT: v_writelane_b32 v37, s5, 7 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 52 -; SI-NEXT: v_writelane_b32 v37, s5, 53 +; SI-NEXT: v_writelane_b32 v37, s4, 8 +; SI-NEXT: v_writelane_b32 v37, s5, 9 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 54 -; SI-NEXT: v_writelane_b32 v37, s5, 55 +; SI-NEXT: v_writelane_b32 v37, s4, 10 +; SI-NEXT: v_writelane_b32 v37, s5, 11 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 56 -; SI-NEXT: v_writelane_b32 v37, s5, 57 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 58 -; SI-NEXT: v_writelane_b32 v37, s5, 59 +; SI-NEXT: v_writelane_b32 v37, s4, 12 +; SI-NEXT: v_writelane_b32 v37, s5, 13 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 60 -; SI-NEXT: v_writelane_b32 v37, s5, 61 +; SI-NEXT: v_writelane_b32 v37, s4, 14 +; SI-NEXT: v_writelane_b32 v37, s5, 15 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v37, s4, 62 -; SI-NEXT: v_writelane_b32 v37, s5, 63 +; SI-NEXT: v_writelane_b32 v37, s4, 16 +; SI-NEXT: v_writelane_b32 v37, s5, 17 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 0 -; SI-NEXT: v_writelane_b32 v36, s5, 1 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 2 -; SI-NEXT: v_writelane_b32 v36, s5, 3 +; SI-NEXT: v_writelane_b32 v37, s4, 18 +; SI-NEXT: v_writelane_b32 v37, s5, 19 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 4 -; SI-NEXT: v_writelane_b32 v36, s5, 5 +; SI-NEXT: v_writelane_b32 v37, s4, 20 +; SI-NEXT: v_writelane_b32 v37, s5, 21 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 6 -; SI-NEXT: v_writelane_b32 v36, s5, 7 +; SI-NEXT: v_writelane_b32 v37, s4, 22 +; SI-NEXT: v_writelane_b32 v37, s5, 23 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 8 -; SI-NEXT: v_writelane_b32 v36, s5, 9 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 10 -; SI-NEXT: v_writelane_b32 v36, s5, 11 +; SI-NEXT: v_writelane_b32 v37, s4, 24 +; SI-NEXT: v_writelane_b32 v37, s5, 25 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 12 -; SI-NEXT: v_writelane_b32 v36, s5, 13 +; SI-NEXT: v_writelane_b32 v37, s4, 26 +; SI-NEXT: v_writelane_b32 v37, s5, 27 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 14 -; SI-NEXT: v_writelane_b32 v36, s5, 15 +; SI-NEXT: v_writelane_b32 v37, s4, 28 +; SI-NEXT: v_writelane_b32 v37, s5, 29 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 16 -; SI-NEXT: v_writelane_b32 v36, s5, 17 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 18 -; SI-NEXT: v_writelane_b32 v36, s5, 19 +; SI-NEXT: v_writelane_b32 v37, s4, 30 +; SI-NEXT: v_writelane_b32 v37, s5, 31 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 20 -; SI-NEXT: v_writelane_b32 v36, s5, 21 +; SI-NEXT: v_writelane_b32 v37, s4, 32 +; SI-NEXT: v_writelane_b32 v37, s5, 33 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 22 -; SI-NEXT: v_writelane_b32 v36, s5, 23 +; SI-NEXT: v_writelane_b32 v37, s4, 34 +; SI-NEXT: v_writelane_b32 v37, s5, 35 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 24 -; SI-NEXT: v_writelane_b32 v36, s5, 25 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 26 -; SI-NEXT: v_writelane_b32 v36, s5, 27 +; SI-NEXT: v_writelane_b32 v37, s4, 36 +; SI-NEXT: v_writelane_b32 v37, s5, 37 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 28 -; SI-NEXT: v_writelane_b32 v36, s5, 29 +; SI-NEXT: v_writelane_b32 v37, s4, 38 +; SI-NEXT: v_writelane_b32 v37, s5, 39 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 30 -; SI-NEXT: v_writelane_b32 v36, s5, 31 +; SI-NEXT: v_writelane_b32 v37, s4, 40 +; SI-NEXT: v_writelane_b32 v37, s5, 41 +; SI-NEXT: v_writelane_b32 v37, vcc_lo, 42 +; SI-NEXT: v_writelane_b32 v37, vcc_hi, 43 +; SI-NEXT: ; implicit-def: $vcc_lo ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s4, 32 -; SI-NEXT: v_writelane_b32 v36, s5, 33 -; SI-NEXT: v_writelane_b32 v36, s16, 34 -; SI-NEXT: v_writelane_b32 v36, s17, 35 -; SI-NEXT: ; implicit-def: $sgpr16 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v36, s16, 36 -; SI-NEXT: v_writelane_b32 v36, s17, 37 -; SI-NEXT: ; implicit-def: $sgpr16 +; SI-NEXT: v_writelane_b32 v37, vcc_lo, 44 +; SI-NEXT: v_writelane_b32 v37, vcc_hi, 45 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: v_writelane_b32 v37, vcc_lo, 46 +; SI-NEXT: v_writelane_b32 v37, vcc_hi, 47 ; SI-NEXT: s_branch .LBB95_2 ; SI-NEXT: .LBB95_4: -; SI-NEXT: v_readlane_b32 s17, v36, 38 -; SI-NEXT: v_mov_b32_e32 v17, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 39 -; SI-NEXT: v_mov_b32_e32 v18, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 40 -; SI-NEXT: v_mov_b32_e32 v19, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 41 -; SI-NEXT: v_mov_b32_e32 v21, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 42 -; SI-NEXT: v_mov_b32_e32 v22, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 43 -; SI-NEXT: v_mov_b32_e32 v24, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 44 -; SI-NEXT: v_mov_b32_e32 v25, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 45 -; SI-NEXT: v_mov_b32_e32 v26, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 46 -; SI-NEXT: v_mov_b32_e32 v28, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 47 -; SI-NEXT: v_mov_b32_e32 v29, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 48 -; SI-NEXT: v_mov_b32_e32 v30, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 49 -; SI-NEXT: v_mov_b32_e32 v31, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 50 +; SI-NEXT: v_mov_b32_e32 v16, s16 +; SI-NEXT: v_readlane_b32 s16, v37, 48 +; SI-NEXT: v_mov_b32_e32 v7, s93 +; SI-NEXT: v_mov_b32_e32 v8, s92 +; SI-NEXT: v_mov_b32_e32 v9, s94 ; SI-NEXT: v_mov_b32_e32 v10, s90 ; SI-NEXT: v_mov_b32_e32 v11, s89 -; SI-NEXT: v_mov_b32_e32 v13, s88 -; SI-NEXT: v_mov_b32_e32 v16, s79 -; SI-NEXT: v_mov_b32_e32 v23, s77 -; SI-NEXT: v_mov_b32_e32 v27, s76 -; SI-NEXT: v_mov_b32_e32 v32, s17 -; SI-NEXT: v_readlane_b32 s17, v36, 51 -; SI-NEXT: v_readlane_b32 s76, v37, 30 -; SI-NEXT: v_readlane_b32 s78, v37, 28 -; SI-NEXT: v_readlane_b32 s88, v37, 24 -; SI-NEXT: v_readlane_b32 s90, v37, 26 -; SI-NEXT: v_readlane_b32 s77, v37, 31 -; SI-NEXT: v_readlane_b32 s79, v37, 29 -; SI-NEXT: v_readlane_b32 s89, v37, 25 -; SI-NEXT: v_readlane_b32 s91, v37, 27 -; SI-NEXT: v_writelane_b32 v37, s16, 0 -; SI-NEXT: v_writelane_b32 v37, s17, 1 -; SI-NEXT: v_mov_b32_e32 v8, s95 -; SI-NEXT: v_readlane_b32 s94, v37, 22 -; SI-NEXT: v_readlane_b32 s95, v37, 23 -; SI-NEXT: s_mov_b32 s95, s17 -; SI-NEXT: v_readlane_b32 s16, v36, 36 -; SI-NEXT: v_mov_b32_e32 v4, s55 -; SI-NEXT: v_mov_b32_e32 v6, s48 -; SI-NEXT: v_readlane_b32 s17, v36, 37 -; SI-NEXT: v_readlane_b32 s54, v37, 10 -; SI-NEXT: v_readlane_b32 s48, v37, 42 -; SI-NEXT: v_mov_b32_e32 v5, s52 -; SI-NEXT: v_mov_b32_e32 v7, s36 -; SI-NEXT: v_readlane_b32 s22, v36, 54 -; SI-NEXT: v_readlane_b32 s23, v36, 57 -; SI-NEXT: v_readlane_b32 s36, v37, 20 -; SI-NEXT: v_readlane_b32 s38, v37, 16 -; SI-NEXT: v_readlane_b32 s16, v37, 12 -; SI-NEXT: v_readlane_b32 s52, v37, 14 -; SI-NEXT: v_readlane_b32 s55, v37, 11 -; SI-NEXT: v_readlane_b32 s49, v37, 43 -; SI-NEXT: v_readlane_b32 s18, v36, 52 -; SI-NEXT: v_readlane_b32 s20, v36, 53 -; SI-NEXT: v_readlane_b32 s21, v36, 55 -; SI-NEXT: v_readlane_b32 s37, v37, 21 -; SI-NEXT: v_readlane_b32 s39, v37, 17 -; SI-NEXT: v_readlane_b32 s17, v37, 13 -; SI-NEXT: v_readlane_b32 s53, v37, 15 -; SI-NEXT: s_mov_b32 s55, s23 -; SI-NEXT: s_mov_b32 s49, s22 -; SI-NEXT: v_readlane_b32 s22, v37, 38 -; SI-NEXT: v_mov_b32_e32 v1, s82 -; SI-NEXT: v_mov_b32_e32 v2, s71 -; SI-NEXT: v_mov_b32_e32 v3, s67 -; SI-NEXT: v_mov_b32_e32 v9, s92 -; SI-NEXT: v_mov_b32_e32 v12, s96 -; SI-NEXT: v_mov_b32_e32 v14, s50 -; SI-NEXT: v_readlane_b32 vcc_lo, v37, 18 -; SI-NEXT: s_mov_b32 s37, s18 -; SI-NEXT: s_mov_b32 s39, s20 +; SI-NEXT: v_mov_b32_e32 v12, s88 +; SI-NEXT: v_mov_b32_e32 v14, s79 +; SI-NEXT: v_mov_b32_e32 v17, s78 +; SI-NEXT: v_mov_b32_e32 v20, s77 +; SI-NEXT: v_mov_b32_e32 v24, s76 +; SI-NEXT: v_mov_b32_e32 v13, s31 +; SI-NEXT: v_mov_b32_e32 v22, s95 +; SI-NEXT: v_mov_b32_e32 v31, s16 +; SI-NEXT: v_readlane_b32 s16, v37, 49 +; SI-NEXT: v_readlane_b32 s20, v36, 50 +; SI-NEXT: v_readlane_b32 s24, v36, 52 +; SI-NEXT: v_readlane_b32 s76, v36, 48 +; SI-NEXT: v_readlane_b32 s22, v36, 44 +; SI-NEXT: v_readlane_b32 s26, v36, 46 +; SI-NEXT: v_readlane_b32 s78, v36, 42 +; SI-NEXT: v_readlane_b32 s28, v36, 38 +; SI-NEXT: v_readlane_b32 s88, v36, 40 +; SI-NEXT: v_readlane_b32 s92, v36, 36 +; SI-NEXT: v_readlane_b32 s90, v36, 32 +; SI-NEXT: v_readlane_b32 s94, v36, 34 +; SI-NEXT: v_readlane_b32 s34, v36, 30 +; SI-NEXT: v_readlane_b32 s30, v36, 26 +; SI-NEXT: v_readlane_b32 s36, v36, 28 +; SI-NEXT: v_readlane_b32 vcc_lo, v36, 18 +; SI-NEXT: v_mov_b32_e32 v1, s53 +; SI-NEXT: v_mov_b32_e32 v2, s99 +; SI-NEXT: v_mov_b32_e32 v3, s96 +; SI-NEXT: v_mov_b32_e32 v4, s82 +; SI-NEXT: v_mov_b32_e32 v5, s70 +; SI-NEXT: v_mov_b32_e32 v6, s64 +; SI-NEXT: v_mov_b32_e32 v18, s48 +; SI-NEXT: v_mov_b32_e32 v19, s17 +; SI-NEXT: v_mov_b32_e32 v21, s65 +; SI-NEXT: v_mov_b32_e32 v23, s68 +; SI-NEXT: v_mov_b32_e32 v25, s87 +; SI-NEXT: v_mov_b32_e32 v26, s85 +; SI-NEXT: v_mov_b32_e32 v27, s52 +; SI-NEXT: v_mov_b32_e32 v28, s83 +; SI-NEXT: v_mov_b32_e32 v29, s81 +; SI-NEXT: v_mov_b32_e32 v30, s67 +; SI-NEXT: v_mov_b32_e32 v32, s16 +; SI-NEXT: v_readlane_b32 s52, v37, 10 +; SI-NEXT: v_readlane_b32 s54, v37, 12 +; SI-NEXT: v_readlane_b32 s64, v37, 8 +; SI-NEXT: v_readlane_b32 s66, v37, 4 +; SI-NEXT: v_readlane_b32 s68, v37, 6 +; SI-NEXT: v_readlane_b32 s70, v37, 2 +; SI-NEXT: v_readlane_b32 s80, v36, 62 +; SI-NEXT: v_readlane_b32 s82, v37, 0 +; SI-NEXT: v_readlane_b32 s84, v36, 60 +; SI-NEXT: v_readlane_b32 s86, v36, 56 +; SI-NEXT: v_readlane_b32 s96, v36, 58 +; SI-NEXT: v_readlane_b32 s98, v36, 54 +; SI-NEXT: v_readlane_b32 s21, v36, 51 +; SI-NEXT: v_readlane_b32 s25, v36, 53 +; SI-NEXT: v_readlane_b32 s77, v36, 49 +; SI-NEXT: v_readlane_b32 s23, v36, 45 +; SI-NEXT: v_readlane_b32 s27, v36, 47 +; SI-NEXT: v_readlane_b32 s79, v36, 43 +; SI-NEXT: v_readlane_b32 s29, v36, 39 +; SI-NEXT: v_readlane_b32 s89, v36, 41 +; SI-NEXT: v_readlane_b32 s93, v36, 37 +; SI-NEXT: v_readlane_b32 s91, v36, 33 +; SI-NEXT: v_readlane_b32 s95, v36, 35 +; SI-NEXT: v_readlane_b32 s35, v36, 31 +; SI-NEXT: v_readlane_b32 s31, v36, 27 +; SI-NEXT: v_readlane_b32 s37, v36, 29 +; SI-NEXT: v_readlane_b32 s48, v36, 24 +; SI-NEXT: v_readlane_b32 s16, v36, 20 +; SI-NEXT: v_readlane_b32 s38, v36, 22 +; SI-NEXT: v_readlane_b32 vcc_hi, v36, 19 +; SI-NEXT: v_readlane_b32 s50, v36, 16 +; SI-NEXT: v_mov_b32_e32 v15, s19 +; SI-NEXT: v_readlane_b32 s53, v37, 11 +; SI-NEXT: v_readlane_b32 s55, v37, 13 +; SI-NEXT: v_readlane_b32 s65, v37, 9 +; SI-NEXT: v_readlane_b32 s67, v37, 5 +; SI-NEXT: v_readlane_b32 s69, v37, 7 +; SI-NEXT: v_readlane_b32 s71, v37, 3 +; SI-NEXT: v_readlane_b32 s81, v36, 63 +; SI-NEXT: v_readlane_b32 s83, v37, 1 +; SI-NEXT: v_readlane_b32 s85, v36, 61 +; SI-NEXT: v_readlane_b32 s87, v36, 57 +; SI-NEXT: v_readlane_b32 s97, v36, 59 +; SI-NEXT: v_readlane_b32 s99, v36, 55 +; SI-NEXT: v_readlane_b32 s19, v37, 50 +; SI-NEXT: v_readlane_b32 s21, v37, 51 +; SI-NEXT: v_readlane_b32 s23, v37, 52 +; SI-NEXT: v_readlane_b32 s49, v36, 25 +; SI-NEXT: v_readlane_b32 s17, v36, 21 ; SI-NEXT: s_mov_b32 s18, s16 -; SI-NEXT: s_mov_b32 s53, s21 -; SI-NEXT: v_readlane_b32 s16, v37, 8 -; SI-NEXT: v_readlane_b32 s92, v37, 44 -; SI-NEXT: v_readlane_b32 s50, v36, 8 -; SI-NEXT: v_readlane_b32 s66, v37, 40 -; SI-NEXT: v_readlane_b32 s68, v36, 6 -; SI-NEXT: v_readlane_b32 s23, v37, 39 -; SI-NEXT: v_readlane_b32 s80, v36, 4 -; SI-NEXT: v_readlane_b32 s84, v37, 36 -; SI-NEXT: v_readlane_b32 s96, v36, 2 -; SI-NEXT: v_readlane_b32 s98, v37, 34 -; SI-NEXT: v_readlane_b32 s64, v37, 32 -; SI-NEXT: v_readlane_b32 s20, v37, 62 -; SI-NEXT: v_readlane_b32 s30, v37, 60 -; SI-NEXT: v_readlane_b32 s24, v37, 58 -; SI-NEXT: v_readlane_b32 s34, v37, 56 -; SI-NEXT: v_readlane_b32 s70, v37, 52 -; SI-NEXT: v_readlane_b32 s82, v37, 50 -; SI-NEXT: v_mov_b32_e32 v20, s86 -; SI-NEXT: v_mov_b32_e32 v15, s87 -; SI-NEXT: v_readlane_b32 s19, v36, 56 -; SI-NEXT: v_readlane_b32 s26, v36, 58 -; SI-NEXT: v_readlane_b32 s27, v36, 59 -; SI-NEXT: v_readlane_b32 s28, v36, 60 -; SI-NEXT: v_readlane_b32 s29, v36, 61 -; SI-NEXT: v_readlane_b32 vcc_hi, v37, 19 -; SI-NEXT: v_readlane_b32 s77, v36, 62 -; SI-NEXT: v_readlane_b32 s17, v37, 9 -; SI-NEXT: v_readlane_b32 s79, v36, 63 -; SI-NEXT: v_readlane_b32 s93, v37, 45 -; SI-NEXT: v_readlane_b32 s89, v35, 0 -; SI-NEXT: v_readlane_b32 s91, v35, 1 -; SI-NEXT: v_readlane_b32 s51, v36, 9 -; SI-NEXT: v_readlane_b32 s67, v37, 41 -; SI-NEXT: v_readlane_b32 s69, v36, 7 -; SI-NEXT: v_readlane_b32 s81, v36, 5 -; SI-NEXT: v_readlane_b32 s23, v35, 2 -; SI-NEXT: v_readlane_b32 s85, v37, 37 -; SI-NEXT: v_readlane_b32 s97, v36, 3 -; SI-NEXT: v_readlane_b32 s99, v37, 35 -; SI-NEXT: v_readlane_b32 s65, v37, 33 -; SI-NEXT: v_readlane_b32 s21, v37, 63 -; SI-NEXT: v_readlane_b32 s31, v37, 61 -; SI-NEXT: v_readlane_b32 s25, v37, 59 -; SI-NEXT: v_readlane_b32 s35, v37, 57 -; SI-NEXT: v_readlane_b32 s71, v37, 53 -; SI-NEXT: v_readlane_b32 s83, v37, 51 +; SI-NEXT: v_readlane_b32 s25, v37, 53 +; SI-NEXT: v_readlane_b32 s39, v36, 23 +; SI-NEXT: v_readlane_b32 s27, v37, 54 +; SI-NEXT: v_readlane_b32 s51, v36, 17 +; SI-NEXT: v_readlane_b32 s29, v37, 55 +; SI-NEXT: v_readlane_b32 s77, v37, 56 +; SI-NEXT: v_readlane_b32 s79, v37, 57 +; SI-NEXT: v_readlane_b32 s89, v37, 58 +; SI-NEXT: v_readlane_b32 s91, v37, 59 +; SI-NEXT: v_readlane_b32 s93, v37, 60 +; SI-NEXT: v_readlane_b32 s95, v37, 61 +; SI-NEXT: v_readlane_b32 s31, v37, 62 +; SI-NEXT: v_readlane_b32 s35, v37, 63 +; SI-NEXT: v_readlane_b32 s37, v35, 0 +; SI-NEXT: v_readlane_b32 vcc_hi, v35, 1 ; SI-NEXT: .LBB95_5: ; %end -; SI-NEXT: s_lshl_b32 s16, s16, 8 -; SI-NEXT: s_and_b32 s17, s74, 0xff -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s17, s54, 0xff -; SI-NEXT: s_lshl_b32 s18, s18, 24 +; SI-NEXT: s_and_b32 s16, s74, 0xff +; SI-NEXT: s_lshl_b32 s17, s50, 8 +; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_and_b32 s17, vcc_lo, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 +; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: v_mov_b32_e32 v33, s16 ; SI-NEXT: s_and_b32 s16, s75, 0xff -; SI-NEXT: s_lshl_b32 s17, s23, 8 -; SI-NEXT: v_and_b32_e32 v27, 0xff, v27 +; SI-NEXT: s_lshl_b32 s17, vcc_hi, 8 +; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v32 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_or_b32_e32 v27, v32, v27 -; SI-NEXT: v_or_b32_e32 v27, s16, v27 -; SI-NEXT: s_lshl_b32 s16, s52, 8 -; SI-NEXT: s_and_b32 s17, s72, 0xff -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s17, s38, 0xff -; SI-NEXT: s_lshl_b32 s18, vcc_lo, 24 +; SI-NEXT: v_or_b32_e32 v24, v32, v24 +; SI-NEXT: v_or_b32_e32 v24, s16, v24 +; SI-NEXT: s_and_b32 s16, s72, 0xff +; SI-NEXT: s_lshl_b32 s17, s38, 8 +; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_and_b32 s17, s48, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_lshl_b32 s18, s30, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: v_add_i32_e32 v32, vcc, 4, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen +; SI-NEXT: buffer_store_dword v24, v32, s[0:3], 0 offen +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_i32_e32 v24, vcc, 8, v0 ; SI-NEXT: v_mov_b32_e32 v32, s16 ; SI-NEXT: s_and_b32 s16, s73, 0xff -; SI-NEXT: s_lshl_b32 s17, s91, 8 -; SI-NEXT: v_and_b32_e32 v23, 0xff, v23 +; SI-NEXT: s_lshl_b32 s17, s37, 8 +; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 +; SI-NEXT: buffer_store_dword v32, v24, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; SI-NEXT: v_lshlrev_b32_e32 v31, 24, v31 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v24, 24, v31 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_or_b32_e32 v23, v31, v23 -; SI-NEXT: v_or_b32_e32 v23, s16, v23 -; SI-NEXT: s_lshl_b32 s16, s36, 8 -; SI-NEXT: s_and_b32 s17, s62, 0xff -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s17, s94, 0xff -; SI-NEXT: s_lshl_b32 s18, s88, 24 +; SI-NEXT: v_or_b32_e32 v20, v24, v20 +; SI-NEXT: v_or_b32_e32 v20, s16, v20 +; SI-NEXT: s_and_b32 s16, s62, 0xff +; SI-NEXT: s_lshl_b32 s17, s36, 8 +; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_and_b32 s17, s34, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_lshl_b32 s18, s90, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: v_add_i32_e32 v24, vcc, 12, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_mov_b32_e32 v31, s16 +; SI-NEXT: buffer_store_dword v20, v24, s[0:3], 0 offen +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_i32_e32 v20, vcc, 16, v0 +; SI-NEXT: v_mov_b32_e32 v24, s16 ; SI-NEXT: s_and_b32 s16, s63, 0xff -; SI-NEXT: s_lshl_b32 s17, s89, 8 -; SI-NEXT: v_and_b32_e32 v20, 0xff, v20 +; SI-NEXT: s_lshl_b32 s17, s35, 8 +; SI-NEXT: v_and_b32_e32 v17, 0xff, v17 +; SI-NEXT: buffer_store_dword v24, v20, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_lshlrev_b32_e32 v30, 24, v30 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v30 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_or_b32_e32 v20, v30, v20 -; SI-NEXT: v_or_b32_e32 v20, s16, v20 -; SI-NEXT: s_lshl_b32 s16, s90, 8 -; SI-NEXT: s_and_b32 s17, s58, 0xff -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s17, s78, 0xff -; SI-NEXT: s_lshl_b32 s18, s76, 24 +; SI-NEXT: v_or_b32_e32 v17, v20, v17 +; SI-NEXT: v_or_b32_e32 v17, s16, v17 +; SI-NEXT: s_and_b32 s16, s60, 0xff +; SI-NEXT: s_lshl_b32 s17, s94, 8 +; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_and_b32 s17, s92, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_lshl_b32 s18, s28, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: v_add_i32_e32 v20, vcc, 20, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_mov_b32_e32 v30, s16 -; SI-NEXT: s_and_b32 s16, s59, 0xff -; SI-NEXT: s_lshl_b32 s17, s79, 8 -; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 +; SI-NEXT: buffer_store_dword v17, v20, s[0:3], 0 offen +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_i32_e32 v17, vcc, 24, v0 +; SI-NEXT: v_mov_b32_e32 v20, s16 +; SI-NEXT: s_and_b32 s16, s61, 0xff +; SI-NEXT: s_lshl_b32 s17, s31, 8 +; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 +; SI-NEXT: buffer_store_dword v20, v17, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v29 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v17, 24, v29 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_or_b32_e32 v16, v29, v16 -; SI-NEXT: v_or_b32_e32 v16, s16, v16 -; SI-NEXT: s_lshl_b32 s16, s64, 8 -; SI-NEXT: s_and_b32 s17, s56, 0xff -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s17, s98, 0xff -; SI-NEXT: s_lshl_b32 s18, s84, 24 +; SI-NEXT: v_or_b32_e32 v14, v17, v14 +; SI-NEXT: v_or_b32_e32 v14, s16, v14 +; SI-NEXT: s_and_b32 s16, s58, 0xff +; SI-NEXT: s_lshl_b32 s17, s88, 8 +; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_and_b32 s17, s78, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_lshl_b32 s18, s22, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: v_add_i32_e32 v17, vcc, 28, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v33, vcc, 4, v0 -; SI-NEXT: v_mov_b32_e32 v29, s16 -; SI-NEXT: s_and_b32 s16, s57, 0xff -; SI-NEXT: s_lshl_b32 s17, s77, 8 -; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 -; SI-NEXT: buffer_store_dword v27, v33, s[0:3], 0 offen +; SI-NEXT: buffer_store_dword v14, v17, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v27, vcc, 8, v0 +; SI-NEXT: v_add_i32_e32 v14, vcc, 32, v0 +; SI-NEXT: v_mov_b32_e32 v17, s16 +; SI-NEXT: s_and_b32 s16, s59, 0xff +; SI-NEXT: s_lshl_b32 s17, s95, 8 +; SI-NEXT: v_and_b32_e32 v12, 0xff, v12 +; SI-NEXT: buffer_store_dword v17, v14, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v28 -; SI-NEXT: buffer_store_dword v32, v27, s[0:3], 0 offen -; SI-NEXT: v_add_i32_e32 v27, vcc, 12, v0 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v28 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_or_b32_e32 v13, v28, v13 -; SI-NEXT: buffer_store_dword v23, v27, s[0:3], 0 offen -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v23, vcc, 16, v0 -; SI-NEXT: v_or_b32_e32 v13, s16, v13 -; SI-NEXT: s_lshl_b32 s16, s22, 8 -; SI-NEXT: s_and_b32 s17, s60, 0xff -; SI-NEXT: buffer_store_dword v31, v23, s[0:3], 0 offen -; SI-NEXT: v_add_i32_e32 v23, vcc, 20, v0 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s17, s66, 0xff -; SI-NEXT: buffer_store_dword v20, v23, s[0:3], 0 offen -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v20, vcc, 24, v0 -; SI-NEXT: s_lshl_b32 s18, s48, 24 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: v_or_b32_e32 v12, s16, v12 +; SI-NEXT: s_and_b32 s16, s56, 0xff +; SI-NEXT: s_lshl_b32 s17, s26, 8 +; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_and_b32 s17, s76, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: buffer_store_dword v30, v20, s[0:3], 0 offen -; SI-NEXT: v_add_i32_e32 v20, vcc, 28, v0 -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_lshl_b32 s18, s20, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: buffer_store_dword v16, v20, s[0:3], 0 offen -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v16, vcc, 32, v0 +; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: v_add_i32_e32 v14, vcc, 36, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: buffer_store_dword v29, v16, s[0:3], 0 offen -; SI-NEXT: v_add_i32_e32 v16, vcc, 36, v0 -; SI-NEXT: v_mov_b32_e32 v28, s16 -; SI-NEXT: s_and_b32 s16, s61, 0xff -; SI-NEXT: buffer_store_dword v13, v16, s[0:3], 0 offen +; SI-NEXT: buffer_store_dword v12, v14, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v13, vcc, 40, v0 -; SI-NEXT: s_lshl_b32 s17, s29, 8 +; SI-NEXT: v_add_i32_e32 v12, vcc, 40, v0 +; SI-NEXT: v_mov_b32_e32 v14, s16 +; SI-NEXT: s_and_b32 s16, s57, 0xff +; SI-NEXT: s_lshl_b32 s17, s93, 8 ; SI-NEXT: v_and_b32_e32 v11, 0xff, v11 -; SI-NEXT: buffer_store_dword v28, v13, s[0:3], 0 offen +; SI-NEXT: buffer_store_dword v14, v12, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v26 +; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v27 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_or_b32_e32 v11, v13, v11 -; SI-NEXT: v_readlane_b32 s22, v37, 46 +; SI-NEXT: v_or_b32_e32 v11, v12, v11 ; SI-NEXT: v_or_b32_e32 v11, s16, v11 ; SI-NEXT: s_and_b32 s16, s46, 0xff -; SI-NEXT: s_lshl_b32 s17, s92, 8 -; SI-NEXT: v_readlane_b32 s23, v37, 47 +; SI-NEXT: s_lshl_b32 s17, s24, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s22, 0xff -; SI-NEXT: v_readlane_b32 s22, v37, 48 +; SI-NEXT: s_and_b32 s17, s98, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s22, 24 +; SI-NEXT: s_lshl_b32 s18, s86, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_add_i32_e32 v13, vcc, 44, v0 +; SI-NEXT: v_add_i32_e32 v12, vcc, 44, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: buffer_store_dword v11, v13, s[0:3], 0 offen +; SI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v11, vcc, 48, v0 -; SI-NEXT: v_mov_b32_e32 v13, s16 +; SI-NEXT: v_mov_b32_e32 v12, s16 ; SI-NEXT: s_and_b32 s16, s47, 0xff -; SI-NEXT: s_lshl_b32 s17, s28, 8 +; SI-NEXT: s_lshl_b32 s17, s91, 8 ; SI-NEXT: v_and_b32_e32 v10, 0xff, v10 -; SI-NEXT: buffer_store_dword v13, v11, s[0:3], 0 offen +; SI-NEXT: buffer_store_dword v12, v11, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v25 +; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v26 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_readlane_b32 s23, v37, 49 ; SI-NEXT: v_or_b32_e32 v10, s16, v10 ; SI-NEXT: s_and_b32 s16, s44, 0xff -; SI-NEXT: s_lshl_b32 s17, s82, 8 +; SI-NEXT: s_lshl_b32 s17, s96, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s70, 0xff -; SI-NEXT: v_readlane_b32 s22, v37, 54 +; SI-NEXT: s_and_b32 s17, s84, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s22, 24 +; SI-NEXT: s_lshl_b32 s18, s80, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v11, vcc, 52, v0 @@ -182642,21 +182869,21 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_add_i32_e32 v10, vcc, 56, v0 ; SI-NEXT: v_mov_b32_e32 v11, s16 ; SI-NEXT: s_and_b32 s16, s45, 0xff -; SI-NEXT: s_lshl_b32 s17, s27, 8 +; SI-NEXT: s_lshl_b32 s17, s89, 8 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: buffer_store_dword v11, v10, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v24 +; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v25 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: v_or_b32_e32 v9, v10, v9 ; SI-NEXT: v_or_b32_e32 v9, s16, v9 ; SI-NEXT: s_and_b32 s16, s42, 0xff -; SI-NEXT: s_lshl_b32 s17, s34, 8 +; SI-NEXT: s_lshl_b32 s17, s82, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s24, 0xff +; SI-NEXT: s_and_b32 s17, s70, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s30, 24 +; SI-NEXT: s_lshl_b32 s18, s66, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v10, vcc, 60, v0 @@ -182666,22 +182893,21 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_add_i32_e32 v9, vcc, 64, v0 ; SI-NEXT: v_mov_b32_e32 v10, s16 ; SI-NEXT: s_and_b32 s16, s43, 0xff -; SI-NEXT: s_lshl_b32 s17, s26, 8 +; SI-NEXT: s_lshl_b32 s17, s79, 8 ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 ; SI-NEXT: buffer_store_dword v10, v9, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v22 +; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v23 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: v_or_b32_e32 v8, v9, v8 ; SI-NEXT: v_or_b32_e32 v8, s16, v8 ; SI-NEXT: s_and_b32 s16, s40, 0xff -; SI-NEXT: s_lshl_b32 s17, s20, 8 -; SI-NEXT: v_readlane_b32 s20, v36, 0 +; SI-NEXT: s_lshl_b32 s17, s68, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s20, 0xff +; SI-NEXT: s_and_b32 s17, s64, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s96, 24 +; SI-NEXT: s_lshl_b32 s18, s52, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v9, vcc, 0x44, v0 @@ -182691,21 +182917,24 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_add_i32_e32 v8, vcc, 0x48, v0 ; SI-NEXT: v_mov_b32_e32 v9, s16 ; SI-NEXT: s_and_b32 s16, s41, 0xff -; SI-NEXT: s_lshl_b32 s17, s55, 8 +; SI-NEXT: s_lshl_b32 s17, s77, 8 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: buffer_store_dword v9, v8, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v21 +; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v22 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: v_or_b32_e32 v7, v8, v7 ; SI-NEXT: v_or_b32_e32 v7, s16, v7 ; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: s_lshl_b32 s16, s80, 8 +; SI-NEXT: s_lshl_b32 s16, s54, 8 ; SI-NEXT: s_or_b32 s14, s14, s16 -; SI-NEXT: s_and_b32 s16, s68, 0xff +; SI-NEXT: v_readlane_b32 s16, v37, 14 +; SI-NEXT: v_readlane_b32 s17, v37, 15 +; SI-NEXT: s_and_b32 s16, s16, 0xff +; SI-NEXT: v_readlane_b32 s40, v37, 16 ; SI-NEXT: s_lshl_b32 s16, s16, 16 -; SI-NEXT: s_lshl_b32 s17, s50, 24 +; SI-NEXT: s_lshl_b32 s17, s40, 24 ; SI-NEXT: s_and_b32 s14, s14, 0xffff ; SI-NEXT: s_or_b32 s16, s17, s16 ; SI-NEXT: v_add_i32_e32 v8, vcc, 0x4c, v0 @@ -182715,24 +182944,24 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_add_i32_e32 v7, vcc, 0x50, v0 ; SI-NEXT: v_mov_b32_e32 v8, s14 ; SI-NEXT: s_and_b32 s14, s15, 0xff -; SI-NEXT: s_lshl_b32 s15, s19, 8 +; SI-NEXT: s_lshl_b32 s15, s29, 8 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: buffer_store_dword v8, v7, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s14, s14, s15 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v19 +; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v21 ; SI-NEXT: s_and_b32 s14, s14, 0xffff ; SI-NEXT: v_or_b32_e32 v6, v7, v6 ; SI-NEXT: v_or_b32_e32 v6, s14, v6 -; SI-NEXT: v_readlane_b32 s14, v36, 10 +; SI-NEXT: v_readlane_b32 s14, v37, 18 ; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s15, v36, 11 +; SI-NEXT: v_readlane_b32 s15, v37, 19 ; SI-NEXT: s_lshl_b32 s14, s14, 8 ; SI-NEXT: s_or_b32 s12, s12, s14 -; SI-NEXT: v_readlane_b32 s14, v36, 12 -; SI-NEXT: v_readlane_b32 s15, v36, 13 +; SI-NEXT: v_readlane_b32 s14, v37, 20 +; SI-NEXT: v_readlane_b32 s15, v37, 21 ; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: v_readlane_b32 s16, v36, 14 +; SI-NEXT: v_readlane_b32 s16, v37, 22 ; SI-NEXT: s_lshl_b32 s14, s14, 16 ; SI-NEXT: s_lshl_b32 s15, s16, 24 ; SI-NEXT: s_and_b32 s12, s12, 0xffff @@ -182744,24 +182973,24 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_add_i32_e32 v6, vcc, 0x58, v0 ; SI-NEXT: v_mov_b32_e32 v7, s12 ; SI-NEXT: s_and_b32 s12, s13, 0xff -; SI-NEXT: s_lshl_b32 s13, s53, 8 +; SI-NEXT: s_lshl_b32 s13, s25, 8 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: buffer_store_dword v7, v6, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s12, s12, s13 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v18 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v19 ; SI-NEXT: s_and_b32 s12, s12, 0xffff ; SI-NEXT: v_or_b32_e32 v5, v6, v5 ; SI-NEXT: v_or_b32_e32 v5, s12, v5 -; SI-NEXT: v_readlane_b32 s12, v36, 16 +; SI-NEXT: v_readlane_b32 s12, v37, 24 ; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s13, v36, 17 +; SI-NEXT: v_readlane_b32 s13, v37, 25 ; SI-NEXT: s_lshl_b32 s12, s12, 8 ; SI-NEXT: s_or_b32 s10, s10, s12 -; SI-NEXT: v_readlane_b32 s12, v36, 18 -; SI-NEXT: v_readlane_b32 s13, v36, 19 +; SI-NEXT: v_readlane_b32 s12, v37, 26 +; SI-NEXT: v_readlane_b32 s13, v37, 27 ; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s14, v36, 20 +; SI-NEXT: v_readlane_b32 s14, v37, 28 ; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_lshl_b32 s13, s14, 24 ; SI-NEXT: s_and_b32 s10, s10, 0xffff @@ -182773,24 +183002,24 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_add_i32_e32 v5, vcc, 0x60, v0 ; SI-NEXT: v_mov_b32_e32 v6, s10 ; SI-NEXT: s_and_b32 s10, s11, 0xff -; SI-NEXT: s_lshl_b32 s11, s49, 8 +; SI-NEXT: s_lshl_b32 s11, s27, 8 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: buffer_store_dword v6, v5, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s10, s10, s11 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v17 +; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v18 ; SI-NEXT: s_and_b32 s10, s10, 0xffff ; SI-NEXT: v_or_b32_e32 v4, v5, v4 ; SI-NEXT: v_or_b32_e32 v4, s10, v4 -; SI-NEXT: v_readlane_b32 s10, v36, 22 +; SI-NEXT: v_readlane_b32 s10, v37, 30 ; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s11, v36, 23 +; SI-NEXT: v_readlane_b32 s11, v37, 31 ; SI-NEXT: s_lshl_b32 s10, s10, 8 ; SI-NEXT: s_or_b32 s8, s8, s10 -; SI-NEXT: v_readlane_b32 s10, v36, 24 -; SI-NEXT: v_readlane_b32 s11, v36, 25 +; SI-NEXT: v_readlane_b32 s10, v37, 32 +; SI-NEXT: v_readlane_b32 s11, v37, 33 ; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s12, v36, 26 +; SI-NEXT: v_readlane_b32 s12, v37, 34 ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_lshl_b32 s11, s12, 24 ; SI-NEXT: s_and_b32 s8, s8, 0xffff @@ -182802,24 +183031,24 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_add_i32_e32 v4, vcc, 0x68, v0 ; SI-NEXT: v_mov_b32_e32 v5, s8 ; SI-NEXT: s_and_b32 s8, s9, 0xff -; SI-NEXT: s_lshl_b32 s9, s39, 8 +; SI-NEXT: s_lshl_b32 s9, s23, 8 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 ; SI-NEXT: buffer_store_dword v5, v4, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s8, s8, s9 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v15 +; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v16 ; SI-NEXT: s_and_b32 s8, s8, 0xffff ; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: v_or_b32_e32 v3, s8, v3 -; SI-NEXT: v_readlane_b32 s8, v36, 28 +; SI-NEXT: v_readlane_b32 s8, v37, 36 ; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: v_readlane_b32 s9, v36, 29 +; SI-NEXT: v_readlane_b32 s9, v37, 37 ; SI-NEXT: s_lshl_b32 s8, s8, 8 ; SI-NEXT: s_or_b32 s6, s6, s8 -; SI-NEXT: v_readlane_b32 s8, v36, 30 -; SI-NEXT: v_readlane_b32 s9, v36, 31 +; SI-NEXT: v_readlane_b32 s8, v37, 38 +; SI-NEXT: v_readlane_b32 s9, v37, 39 ; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s10, v36, 32 +; SI-NEXT: v_readlane_b32 s10, v37, 40 ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_lshl_b32 s9, s10, 24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff @@ -182831,24 +183060,24 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_add_i32_e32 v3, vcc, 0x70, v0 ; SI-NEXT: v_mov_b32_e32 v4, s6 ; SI-NEXT: s_and_b32 s6, s7, 0xff -; SI-NEXT: s_lshl_b32 s7, s37, 8 +; SI-NEXT: s_lshl_b32 s7, s21, 8 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: buffer_store_dword v4, v3, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s6, s6, s7 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v14 +; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v15 ; SI-NEXT: s_and_b32 s6, s6, 0xffff ; SI-NEXT: v_or_b32_e32 v2, v3, v2 ; SI-NEXT: v_or_b32_e32 v2, s6, v2 -; SI-NEXT: v_readlane_b32 s6, v36, 34 +; SI-NEXT: v_readlane_b32 s6, v37, 42 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: v_readlane_b32 s7, v36, 35 +; SI-NEXT: v_readlane_b32 s7, v37, 43 ; SI-NEXT: s_lshl_b32 s6, s6, 8 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: v_readlane_b32 s6, v36, 36 -; SI-NEXT: v_readlane_b32 s7, v36, 37 +; SI-NEXT: v_readlane_b32 s6, v37, 44 +; SI-NEXT: v_readlane_b32 s7, v37, 45 ; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: v_readlane_b32 s8, v37, 0 +; SI-NEXT: v_readlane_b32 s8, v37, 46 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s7, s8, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff @@ -182860,24 +183089,23 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x78, v0 ; SI-NEXT: v_mov_b32_e32 v3, s4 ; SI-NEXT: s_and_b32 s4, s5, 0xff -; SI-NEXT: s_lshl_b32 s5, s95, 8 +; SI-NEXT: s_lshl_b32 s5, s19, 8 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: buffer_store_dword v3, v2, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v12 +; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v13 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_or_b32_e32 v1, s4, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0 ; SI-NEXT: v_readlane_b32 s30, v34, 34 -; SI-NEXT: v_readlane_b32 s23, v37, 55 -; SI-NEXT: v_readlane_b32 s21, v36, 1 -; SI-NEXT: v_readlane_b32 s17, v36, 15 -; SI-NEXT: v_readlane_b32 s15, v36, 21 -; SI-NEXT: v_readlane_b32 s13, v36, 27 -; SI-NEXT: v_readlane_b32 s11, v36, 33 -; SI-NEXT: v_readlane_b32 s9, v37, 1 +; SI-NEXT: v_readlane_b32 s41, v37, 17 +; SI-NEXT: v_readlane_b32 s17, v37, 23 +; SI-NEXT: v_readlane_b32 s15, v37, 29 +; SI-NEXT: v_readlane_b32 s13, v37, 35 +; SI-NEXT: v_readlane_b32 s11, v37, 41 +; SI-NEXT: v_readlane_b32 s9, v37, 47 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; SI-NEXT: v_readlane_b32 s31, v34, 35 ; SI-NEXT: v_readlane_b32 s99, v34, 33 @@ -182927,8 +183155,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -183000,524 +183228,536 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; VI-NEXT: s_cbranch_scc0 .LBB95_3 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_lshr_b32 s46, s5, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 16 +; VI-NEXT: v_writelane_b32 v62, s46, 32 ; VI-NEXT: s_lshr_b32 s46, s5, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 15 +; VI-NEXT: v_writelane_b32 v62, s46, 31 ; VI-NEXT: s_lshr_b32 s46, s5, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 27 +; VI-NEXT: v_writelane_b32 v62, s46, 41 ; VI-NEXT: s_lshr_b32 s46, s4, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 14 +; VI-NEXT: v_writelane_b32 v62, s46, 30 ; VI-NEXT: s_lshr_b32 s46, s4, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 26 +; VI-NEXT: v_writelane_b32 v62, s46, 40 ; VI-NEXT: s_lshr_b32 s46, s29, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 17 +; VI-NEXT: v_writelane_b32 v62, s46, 33 ; VI-NEXT: s_lshr_b32 s46, s29, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 13 -; VI-NEXT: s_lshr_b32 s46, s29, 8 ; VI-NEXT: v_writelane_b32 v62, s46, 29 +; VI-NEXT: s_lshr_b32 s46, s29, 8 +; VI-NEXT: v_writelane_b32 v62, s46, 43 ; VI-NEXT: s_lshr_b32 s46, s28, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 12 -; VI-NEXT: s_lshr_b32 s46, s28, 8 ; VI-NEXT: v_writelane_b32 v62, s46, 28 +; VI-NEXT: s_lshr_b32 s46, s28, 8 +; VI-NEXT: v_writelane_b32 v62, s46, 42 ; VI-NEXT: s_lshr_b32 s46, s27, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 18 +; VI-NEXT: v_writelane_b32 v62, s46, 34 ; VI-NEXT: s_lshr_b32 s46, s27, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 11 +; VI-NEXT: v_writelane_b32 v62, s46, 27 ; VI-NEXT: s_lshr_b32 s46, s27, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 31 +; VI-NEXT: v_writelane_b32 v62, s46, 45 ; VI-NEXT: s_lshr_b32 s46, s26, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 10 +; VI-NEXT: v_writelane_b32 v62, s46, 26 ; VI-NEXT: s_lshr_b32 s46, s26, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 30 +; VI-NEXT: v_writelane_b32 v62, s46, 44 ; VI-NEXT: s_lshr_b32 s46, s25, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 19 +; VI-NEXT: v_writelane_b32 v62, s46, 35 ; VI-NEXT: s_lshr_b32 s46, s25, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 9 +; VI-NEXT: v_writelane_b32 v62, s46, 25 ; VI-NEXT: s_lshr_b32 s46, s25, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 33 +; VI-NEXT: v_writelane_b32 v62, s46, 47 ; VI-NEXT: s_lshr_b32 s46, s24, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 8 +; VI-NEXT: v_writelane_b32 v62, s46, 24 ; VI-NEXT: s_lshr_b32 s46, s24, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 32 +; VI-NEXT: v_writelane_b32 v62, s46, 46 ; VI-NEXT: s_lshr_b32 s46, s23, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 20 +; VI-NEXT: v_writelane_b32 v62, s46, 36 ; VI-NEXT: s_lshr_b32 s46, s23, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 7 +; VI-NEXT: v_writelane_b32 v62, s46, 23 ; VI-NEXT: s_lshr_b32 s46, s23, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 35 +; VI-NEXT: v_writelane_b32 v62, s46, 49 ; VI-NEXT: s_lshr_b32 s46, s22, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 6 +; VI-NEXT: v_writelane_b32 v62, s46, 22 ; VI-NEXT: s_lshr_b32 s46, s22, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 34 +; VI-NEXT: v_writelane_b32 v62, s46, 48 ; VI-NEXT: s_lshr_b32 s46, s21, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 21 +; VI-NEXT: v_writelane_b32 v62, s46, 37 ; VI-NEXT: s_lshr_b32 s46, s21, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 5 +; VI-NEXT: v_writelane_b32 v62, s46, 21 ; VI-NEXT: s_lshr_b32 s46, s21, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 37 +; VI-NEXT: v_writelane_b32 v62, s46, 51 ; VI-NEXT: s_lshr_b32 s46, s20, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 4 +; VI-NEXT: v_writelane_b32 v62, s46, 20 ; VI-NEXT: s_lshr_b32 s46, s20, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 36 +; VI-NEXT: v_writelane_b32 v62, s46, 50 ; VI-NEXT: s_lshr_b32 s46, s19, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 22 +; VI-NEXT: v_writelane_b32 v62, s46, 38 ; VI-NEXT: s_lshr_b32 s46, s19, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 3 +; VI-NEXT: v_writelane_b32 v62, s46, 19 ; VI-NEXT: s_lshr_b32 s46, s19, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 39 +; VI-NEXT: v_writelane_b32 v62, s46, 53 ; VI-NEXT: s_lshr_b32 s46, s18, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 2 +; VI-NEXT: v_writelane_b32 v62, s46, 18 ; VI-NEXT: s_lshr_b32 s46, s18, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 38 +; VI-NEXT: v_writelane_b32 v62, s46, 52 ; VI-NEXT: s_lshr_b32 s46, s17, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 23 +; VI-NEXT: v_writelane_b32 v62, s46, 39 ; VI-NEXT: s_lshr_b32 s46, s17, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 1 +; VI-NEXT: v_writelane_b32 v62, s46, 17 ; VI-NEXT: s_lshr_b32 s46, s17, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 41 +; VI-NEXT: v_writelane_b32 v62, s46, 55 ; VI-NEXT: s_lshr_b32 s46, s16, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 0 +; VI-NEXT: v_writelane_b32 v62, s46, 16 ; VI-NEXT: s_lshr_b32 s46, s16, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 40 -; VI-NEXT: s_lshr_b32 s46, s7, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 24 -; VI-NEXT: s_lshr_b32 s46, s7, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 43 -; VI-NEXT: s_lshr_b32 s46, s6, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 42 -; VI-NEXT: s_lshr_b32 s46, s9, 24 -; VI-NEXT: v_writelane_b32 v62, s46, 25 -; VI-NEXT: s_lshr_b32 s46, s9, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 45 -; VI-NEXT: s_lshr_b32 s46, s8, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 44 +; VI-NEXT: v_writelane_b32 v62, s46, 54 ; VI-NEXT: s_lshr_b32 s46, s11, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 47 -; VI-NEXT: s_lshr_b32 s46, s10, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 46 +; VI-NEXT: v_writelane_b32 v62, s46, 56 ; VI-NEXT: s_lshr_b32 s46, s13, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 49 -; VI-NEXT: s_lshr_b32 s46, s12, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 48 -; VI-NEXT: s_lshr_b32 s46, s15, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 51 -; VI-NEXT: s_lshr_b32 s46, s14, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 50 -; VI-NEXT: s_lshr_b32 s46, s41, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 53 -; VI-NEXT: s_lshr_b32 s46, s40, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 52 -; VI-NEXT: s_lshr_b32 s46, s43, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 55 -; VI-NEXT: s_lshr_b32 s46, s42, 8 -; VI-NEXT: v_writelane_b32 v62, s46, 54 -; VI-NEXT: s_lshr_b32 s46, s45, 8 ; VI-NEXT: v_writelane_b32 v62, s46, 57 -; VI-NEXT: s_lshr_b32 s46, s44, 8 -; VI-NEXT: s_lshr_b32 s52, s7, 16 -; VI-NEXT: s_lshr_b32 s53, s6, 16 -; VI-NEXT: s_lshr_b32 s84, s9, 16 -; VI-NEXT: s_lshr_b32 s85, s8, 16 +; VI-NEXT: s_lshr_b64 s[78:79], s[4:5], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 14 +; VI-NEXT: v_writelane_b32 v62, s79, 15 +; VI-NEXT: s_lshr_b64 s[78:79], s[28:29], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 12 +; VI-NEXT: v_writelane_b32 v62, s79, 13 +; VI-NEXT: s_lshr_b64 s[78:79], s[26:27], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 10 +; VI-NEXT: v_writelane_b32 v62, s79, 11 +; VI-NEXT: s_lshr_b64 s[78:79], s[24:25], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 8 +; VI-NEXT: v_writelane_b32 v62, s79, 9 +; VI-NEXT: s_lshr_b64 s[78:79], s[22:23], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 6 +; VI-NEXT: v_writelane_b32 v62, s79, 7 +; VI-NEXT: s_lshr_b64 s[78:79], s[20:21], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 4 +; VI-NEXT: v_writelane_b32 v62, s79, 5 +; VI-NEXT: s_lshr_b64 s[78:79], s[18:19], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 2 +; VI-NEXT: v_writelane_b32 v62, s79, 3 +; VI-NEXT: s_lshr_b64 s[78:79], s[16:17], 24 +; VI-NEXT: v_writelane_b32 v62, s78, 0 +; VI-NEXT: s_lshr_b32 s70, s7, 24 +; VI-NEXT: s_lshr_b32 s56, s7, 16 +; VI-NEXT: s_lshr_b32 s53, s7, 8 +; VI-NEXT: s_lshr_b32 s57, s6, 16 +; VI-NEXT: s_lshr_b32 s69, s6, 8 +; VI-NEXT: s_lshr_b32 s71, s9, 24 +; VI-NEXT: s_lshr_b32 s58, s9, 16 +; VI-NEXT: s_lshr_b32 s52, s9, 8 +; VI-NEXT: s_lshr_b32 s59, s8, 16 +; VI-NEXT: s_lshr_b32 s68, s8, 8 ; VI-NEXT: s_lshr_b32 s80, s11, 24 -; VI-NEXT: s_lshr_b32 s86, s11, 16 -; VI-NEXT: s_lshr_b32 s87, s10, 16 +; VI-NEXT: s_lshr_b32 s60, s11, 16 +; VI-NEXT: s_lshr_b32 s61, s10, 16 +; VI-NEXT: s_lshr_b32 s67, s10, 8 ; VI-NEXT: s_lshr_b32 s81, s13, 24 -; VI-NEXT: s_lshr_b32 s54, s13, 16 -; VI-NEXT: s_lshr_b32 s55, s12, 16 +; VI-NEXT: s_lshr_b32 s62, s13, 16 +; VI-NEXT: s_lshr_b32 s63, s12, 16 +; VI-NEXT: s_lshr_b32 s66, s12, 8 ; VI-NEXT: s_lshr_b32 s82, s15, 24 -; VI-NEXT: s_lshr_b32 s64, s15, 16 -; VI-NEXT: s_lshr_b32 s65, s14, 16 +; VI-NEXT: s_lshr_b32 s72, s15, 16 +; VI-NEXT: s_lshr_b32 s87, s15, 8 +; VI-NEXT: s_lshr_b32 s73, s14, 16 +; VI-NEXT: s_lshr_b32 s65, s14, 8 ; VI-NEXT: s_lshr_b32 s83, s41, 24 -; VI-NEXT: s_lshr_b32 s66, s41, 16 -; VI-NEXT: s_lshr_b32 s67, s40, 16 -; VI-NEXT: s_lshr_b32 s50, s43, 24 -; VI-NEXT: s_lshr_b32 s68, s43, 16 -; VI-NEXT: s_lshr_b32 s69, s42, 16 -; VI-NEXT: s_lshr_b32 s51, s45, 24 -; VI-NEXT: s_lshr_b32 s70, s45, 16 -; VI-NEXT: s_lshr_b32 s71, s44, 16 -; VI-NEXT: v_writelane_b32 v62, s46, 56 -; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; VI-NEXT: s_lshr_b64 s[56:57], s[28:29], 24 -; VI-NEXT: s_lshr_b64 s[58:59], s[26:27], 24 -; VI-NEXT: s_lshr_b64 s[60:61], s[24:25], 24 -; VI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24 -; VI-NEXT: s_lshr_b64 s[72:73], s[20:21], 24 -; VI-NEXT: s_lshr_b64 s[74:75], s[18:19], 24 -; VI-NEXT: s_lshr_b64 s[76:77], s[16:17], 24 -; VI-NEXT: s_lshr_b64 s[78:79], s[6:7], 24 -; VI-NEXT: s_lshr_b64 s[88:89], s[8:9], 24 -; VI-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 -; VI-NEXT: s_lshr_b64 s[30:31], s[12:13], 24 -; VI-NEXT: s_lshr_b64 s[34:35], s[14:15], 24 -; VI-NEXT: s_lshr_b64 s[36:37], s[40:41], 24 -; VI-NEXT: s_lshr_b64 s[38:39], s[42:43], 24 -; VI-NEXT: s_lshr_b64 s[48:49], s[44:45], 24 +; VI-NEXT: s_lshr_b32 s74, s41, 16 +; VI-NEXT: s_lshr_b32 s86, s41, 8 +; VI-NEXT: s_lshr_b32 s75, s40, 16 +; VI-NEXT: s_lshr_b32 s64, s40, 8 +; VI-NEXT: s_lshr_b32 s46, s43, 24 +; VI-NEXT: s_lshr_b32 s76, s43, 16 +; VI-NEXT: s_lshr_b32 s85, s43, 8 +; VI-NEXT: s_lshr_b32 s77, s42, 16 +; VI-NEXT: s_lshr_b32 s55, s42, 8 +; VI-NEXT: s_lshr_b32 s47, s45, 24 +; VI-NEXT: s_lshr_b32 s50, s45, 16 +; VI-NEXT: s_lshr_b32 s84, s45, 8 +; VI-NEXT: s_lshr_b32 s51, s44, 16 +; VI-NEXT: s_lshr_b32 s54, s44, 8 +; VI-NEXT: v_writelane_b32 v62, s79, 1 +; VI-NEXT: s_lshr_b64 s[48:49], s[6:7], 24 +; VI-NEXT: s_lshr_b64 s[38:39], s[8:9], 24 +; VI-NEXT: s_lshr_b64 s[36:37], s[10:11], 24 +; VI-NEXT: s_lshr_b64 s[34:35], s[12:13], 24 +; VI-NEXT: s_lshr_b64 s[30:31], s[14:15], 24 +; VI-NEXT: s_lshr_b64 s[90:91], s[40:41], 24 +; VI-NEXT: s_lshr_b64 s[88:89], s[42:43], 24 +; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 ; VI-NEXT: s_cbranch_execnz .LBB95_4 ; VI-NEXT: .LBB95_2: ; %cmp.true ; VI-NEXT: s_lshr_b32 s46, s45, 16 -; VI-NEXT: v_mov_b32_e32 v7, 0x200 -; VI-NEXT: v_add_f16_e32 v36, s46, v7 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36 -; VI-NEXT: v_add_f16_e32 v2, s45, v7 +; VI-NEXT: v_mov_b32_e32 v6, 0x200 +; VI-NEXT: v_add_f16_e32 v51, s46, v6 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51 +; VI-NEXT: v_add_f16_e32 v2, s45, v6 ; VI-NEXT: s_lshr_b32 s45, s44, 16 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v23, v2, v1 -; VI-NEXT: v_add_f16_e32 v1, s45, v7 -; VI-NEXT: v_add_f16_e32 v2, s44, v7 +; VI-NEXT: v_or_b32_e32 v24, v2, v1 +; VI-NEXT: v_add_f16_e32 v1, s45, v6 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_add_f16_e32 v2, s44, v6 ; VI-NEXT: s_lshr_b32 s44, s43, 16 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v23, v2, v1 +; VI-NEXT: v_add_f16_e32 v1, s44, v6 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_f16_e32 v59, s44, v7 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v22, v2, v1 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 -; VI-NEXT: v_add_f16_e32 v2, s43, v7 +; VI-NEXT: v_add_f16_e32 v2, s43, v6 ; VI-NEXT: s_lshr_b32 s43, s42, 16 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v25, v2, v1 -; VI-NEXT: v_add_f16_e32 v1, s43, v7 -; VI-NEXT: v_add_f16_e32 v2, s42, v7 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v26, v2, v1 +; VI-NEXT: v_add_f16_e32 v1, s43, v6 +; VI-NEXT: v_add_f16_e32 v2, s42, v6 ; VI-NEXT: s_lshr_b32 s42, s41, 16 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_f16_e32 v56, s42, v7 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v24, v2, v1 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v56 -; VI-NEXT: v_add_f16_e32 v2, s41, v7 +; VI-NEXT: v_add_f16_e32 v58, s42, v6 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v25, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v58 +; VI-NEXT: v_add_f16_e32 v2, s41, v6 ; VI-NEXT: s_lshr_b32 s41, s40, 16 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v27, v2, v1 -; VI-NEXT: v_add_f16_e32 v1, s41, v7 -; VI-NEXT: v_add_f16_e32 v2, s40, v7 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v28, v2, v1 +; VI-NEXT: v_add_f16_e32 v53, s41, v6 +; VI-NEXT: v_add_f16_e32 v2, s40, v6 ; VI-NEXT: s_lshr_b32 s40, s15, 16 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_f16_e32 v61, s40, v7 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v26, v2, v1 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v61 -; VI-NEXT: v_add_f16_e32 v2, s15, v7 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v53 +; VI-NEXT: v_add_f16_e32 v55, s40, v6 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v27, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v55 +; VI-NEXT: v_add_f16_e32 v2, s15, v6 ; VI-NEXT: s_lshr_b32 s15, s14, 16 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v29, v2, v1 -; VI-NEXT: v_add_f16_e32 v1, s15, v7 -; VI-NEXT: v_add_f16_e32 v2, s14, v7 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v30, v2, v1 +; VI-NEXT: v_add_f16_e32 v1, s15, v6 +; VI-NEXT: v_add_f16_e32 v2, s14, v6 ; VI-NEXT: s_lshr_b32 s14, s13, 16 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_f16_e32 v57, s14, v7 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v28, v2, v1 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v57 -; VI-NEXT: v_add_f16_e32 v2, s13, v7 +; VI-NEXT: v_add_f16_e32 v40, s14, v6 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v29, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v40 +; VI-NEXT: v_add_f16_e32 v2, s13, v6 ; VI-NEXT: s_lshr_b32 s13, s12, 16 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v6, v2, v1 -; VI-NEXT: v_add_f16_e32 v1, s13, v7 -; VI-NEXT: v_add_f16_e32 v2, s12, v7 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v32, v2, v1 +; VI-NEXT: v_add_f16_e32 v1, s13, v6 +; VI-NEXT: v_add_f16_e32 v2, s12, v6 ; VI-NEXT: s_lshr_b32 s12, s11, 16 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_f16_e32 v41, s12, v7 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v5, v2, v1 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v41 -; VI-NEXT: v_add_f16_e32 v2, s11, v7 -; VI-NEXT: s_lshr_b32 s11, s10, 16 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: v_add_f16_e32 v61, s12, v6 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; VI-NEXT: v_or_b32_e32 v31, v2, v1 -; VI-NEXT: v_add_f16_e32 v1, s11, v7 -; VI-NEXT: v_add_f16_e32 v2, s10, v7 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v61 +; VI-NEXT: v_add_f16_e32 v2, s11, v6 +; VI-NEXT: s_lshr_b32 s11, s10, 16 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v8, v2, v1 +; VI-NEXT: v_add_f16_e32 v1, s11, v6 +; VI-NEXT: v_add_f16_e32 v2, s10, v6 ; VI-NEXT: s_lshr_b32 s10, s9, 16 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_f16_e32 v37, s10, v7 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v30, v2, v1 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37 -; VI-NEXT: v_add_f16_e32 v2, s9, v7 +; VI-NEXT: v_add_f16_e32 v13, s10, v6 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v7, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v13 +; VI-NEXT: v_add_f16_e32 v2, s9, v6 ; VI-NEXT: s_lshr_b32 s9, s8, 16 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v4, v2, v1 -; VI-NEXT: v_add_f16_e32 v1, s9, v7 -; VI-NEXT: v_add_f16_e32 v2, s8, v7 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v34, v2, v1 +; VI-NEXT: v_add_f16_e32 v1, s9, v6 +; VI-NEXT: v_add_f16_e32 v2, s8, v6 ; VI-NEXT: s_lshr_b32 s8, s7, 16 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_f16_e32 v58, s8, v7 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v3, v2, v1 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v58 -; VI-NEXT: v_add_f16_e32 v2, s7, v7 +; VI-NEXT: v_add_f16_e32 v54, s8, v6 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v33, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v54 +; VI-NEXT: v_add_f16_e32 v2, s7, v6 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v36, v2, v1 ; VI-NEXT: s_lshr_b32 s7, s6, 16 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v2, v2, v1 -; VI-NEXT: v_add_f16_e32 v1, s7, v7 -; VI-NEXT: v_add_f16_e32 v8, s6, v7 +; VI-NEXT: v_add_f16_e32 v2, s6, v6 ; VI-NEXT: s_lshr_b32 s6, s17, 16 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_f16_e32 v42, s6, v7 +; VI-NEXT: v_add_f16_e32 v16, s6, v6 ; VI-NEXT: s_lshr_b32 s6, s16, 16 -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v1, v8, v1 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v42 -; VI-NEXT: v_add_f16_e32 v9, s17, v7 -; VI-NEXT: v_add_f16_e32 v11, s6, v7 +; VI-NEXT: v_add_f16_e32 v20, s6, v6 ; VI-NEXT: s_lshr_b32 s6, s19, 16 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v33, v9, v8 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v11 -; VI-NEXT: v_add_f16_e32 v9, s16, v7 -; VI-NEXT: v_add_f16_e32 v60, s6, v7 +; VI-NEXT: v_add_f16_e32 v50, s6, v6 ; VI-NEXT: s_lshr_b32 s6, s18, 16 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v32, v9, v8 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v60 -; VI-NEXT: v_add_f16_e32 v9, s19, v7 -; VI-NEXT: v_add_f16_e32 v55, s6, v7 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v50 +; VI-NEXT: v_add_f16_e32 v4, s19, v6 +; VI-NEXT: v_add_f16_e32 v56, s6, v6 ; VI-NEXT: s_lshr_b32 s6, s21, 16 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v21, v9, v8 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v55 -; VI-NEXT: v_add_f16_e32 v9, s18, v7 -; VI-NEXT: s_lshr_b32 s7, s20, 16 -; VI-NEXT: v_add_f16_e32 v39, s6, v7 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v20, v9, v8 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v39 -; VI-NEXT: v_add_f16_e32 v9, s21, v7 -; VI-NEXT: v_add_f16_e32 v38, s7, v7 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v38, v4, v3 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v56 +; VI-NEXT: v_add_f16_e32 v5, s18, v6 +; VI-NEXT: v_add_f16_e32 v60, s6, v6 +; VI-NEXT: s_lshr_b32 s6, s20, 16 +; VI-NEXT: v_or_b32_e32 v37, v5, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v60 +; VI-NEXT: v_add_f16_e32 v3, s21, v6 +; VI-NEXT: v_add_f16_e32 v59, s6, v6 ; VI-NEXT: s_lshr_b32 s6, s23, 16 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v35, v9, v8 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v38 -; VI-NEXT: v_add_f16_e32 v9, s20, v7 -; VI-NEXT: s_lshr_b32 s7, s22, 16 -; VI-NEXT: v_add_f16_e32 v49, s6, v7 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v34, v9, v8 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v49 -; VI-NEXT: v_add_f16_e32 v9, s23, v7 -; VI-NEXT: v_add_f16_e32 v48, s7, v7 +; VI-NEXT: v_or_b32_e32 v22, v3, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v59 +; VI-NEXT: v_add_f16_e32 v9, s20, v6 +; VI-NEXT: v_add_f16_e32 v57, s6, v6 +; VI-NEXT: s_lshr_b32 s6, s22, 16 +; VI-NEXT: v_or_b32_e32 v21, v9, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v57 +; VI-NEXT: v_add_f16_e32 v47, s23, v6 +; VI-NEXT: v_add_f16_e32 v43, s6, v6 ; VI-NEXT: s_lshr_b32 s6, s25, 16 ; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v19, v9, v8 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v48 -; VI-NEXT: v_add_f16_e32 v9, s22, v7 -; VI-NEXT: v_add_f16_e32 v51, s6, v7 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v18, v9, v8 -; VI-NEXT: s_lshr_b32 s7, s24, 16 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v51 -; VI-NEXT: v_add_f16_e32 v9, s25, v7 -; VI-NEXT: v_or_b32_e32 v16, v9, v8 -; VI-NEXT: v_add_f16_e32 v8, s7, v7 +; VI-NEXT: v_or_b32_e32 v49, v47, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v43 +; VI-NEXT: v_add_f16_e32 v9, s22, v6 +; VI-NEXT: v_add_f16_e32 v52, s6, v6 +; VI-NEXT: s_lshr_b32 s6, s24, 16 +; VI-NEXT: v_or_b32_e32 v48, v9, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v52 +; VI-NEXT: v_add_f16_e32 v46, s25, v6 +; VI-NEXT: v_add_f16_e32 v19, s6, v6 ; VI-NEXT: s_lshr_b32 s6, s27, 16 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; VI-NEXT: v_add_f16_e32 v9, s24, v7 -; VI-NEXT: v_add_f16_e32 v53, s6, v7 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v15, v9, v8 -; VI-NEXT: s_lshr_b32 s7, s26, 16 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v53 -; VI-NEXT: v_add_f16_e32 v9, s27, v7 -; VI-NEXT: v_or_b32_e32 v13, v9, v8 -; VI-NEXT: v_add_f16_e32 v8, s7, v7 +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v18, v46, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v19 +; VI-NEXT: v_add_f16_e32 v9, s24, v6 +; VI-NEXT: v_add_f16_e32 v41, s6, v6 +; VI-NEXT: v_or_b32_e32 v17, v9, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v41 +; VI-NEXT: v_add_f16_e32 v44, s27, v6 +; VI-NEXT: s_lshr_b32 s6, s26, 16 +; VI-NEXT: v_or_b32_e32 v15, v44, v4 +; VI-NEXT: v_add_f16_e32 v4, s6, v6 ; VI-NEXT: s_lshr_b32 s6, s29, 16 -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; VI-NEXT: v_add_f16_e32 v54, s26, v7 -; VI-NEXT: v_add_f16_e32 v45, s6, v7 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v12, v54, v8 -; VI-NEXT: s_lshr_b32 s7, s28, 16 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v45 -; VI-NEXT: v_add_f16_e32 v9, s29, v7 -; VI-NEXT: v_or_b32_e32 v10, v9, v8 -; VI-NEXT: v_add_f16_e32 v8, s7, v7 +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; VI-NEXT: v_add_f16_e32 v9, s26, v6 +; VI-NEXT: v_add_f16_e32 v45, s6, v6 +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v14, v9, v4 +; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v45 +; VI-NEXT: v_add_f16_e32 v4, s29, v6 +; VI-NEXT: s_lshr_b32 s6, s28, 16 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v12, v4, v9 +; VI-NEXT: v_add_f16_e32 v4, s6, v6 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v4 +; VI-NEXT: v_add_f16_e32 v4, s28, v6 ; VI-NEXT: s_lshr_b32 s6, s5, 16 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; VI-NEXT: v_add_f16_e32 v9, s28, v7 -; VI-NEXT: s_lshr_b32 s7, s4, 16 -; VI-NEXT: v_add_f16_e32 v47, s6, v7 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v9, v9, v8 -; VI-NEXT: v_add_f16_e32 v8, s5, v7 -; VI-NEXT: v_add_f16_e32 v14, s7, v7 -; VI-NEXT: v_add_f16_e32 v17, s4, v7 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v47 -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v8, v8, v7 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v14 -; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v7, v17, v7 -; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v8 -; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v7 -; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[7:8] -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v10 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v9 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[9:10] -; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v13 -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v12 -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v16 -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v15 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[15:16] -; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v19 -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v10, 8, v18 -; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[18:19] -; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v35 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v34 -; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[34:35] -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v1 -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v25 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v24 -; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[24:25] -; VI-NEXT: v_bfe_u32 v25, v58, 8, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v25, v37, 8, 8 -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v4 -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v25, v41, 8, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v3 -; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[3:4] -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v25, v57, 8, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v31 -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[30:31] -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v25, v61, 8, 8 -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v20 -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[20:21] -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v5 -; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[5:6] -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v25, v56, 8, 8 -; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v21 -; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v32 -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[32:33] -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v29 -; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[28:29] -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v27 -; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[26:27] -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v25, v59, 8, 8 -; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v27, v36, 8, 8 -; VI-NEXT: v_mov_b32_e32 v36, v59 -; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[12:13] -; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[22:23] -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v33 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28 -; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v26 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v23 -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22 -; VI-NEXT: v_mov_b32_e32 v23, v11 -; VI-NEXT: v_bfe_u32 v11, v47, 8, 8 -; VI-NEXT: v_bfe_u32 v26, v45, 8, 8 -; VI-NEXT: v_bfe_u32 v28, v53, 8, 8 -; VI-NEXT: v_bfe_u32 v9, v51, 8, 8 -; VI-NEXT: v_bfe_u32 v12, v49, 8, 8 -; VI-NEXT: v_bfe_u32 v15, v39, 8, 8 -; VI-NEXT: v_bfe_u32 v22, v60, 8, 8 -; VI-NEXT: v_bfe_u32 v30, v42, 8, 8 -; VI-NEXT: s_branch .LBB95_5 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v11, v4, v9 +; VI-NEXT: v_add_f16_e32 v4, s6, v6 +; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v4 +; VI-NEXT: v_add_f16_e32 v10, s5, v6 +; VI-NEXT: s_lshr_b32 s5, s4, 16 +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v10, v10, v9 +; VI-NEXT: v_add_f16_e32 v9, s5, v6 +; VI-NEXT: v_add_f16_e32 v1, s7, v6 +; VI-NEXT: v_add_f16_e32 v39, s17, v6 +; VI-NEXT: v_add_f16_e32 v42, s16, v6 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: v_add_f16_e32 v3, s4, v6 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v9 +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v9, v3, v6 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v3, v5 +; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[9:10] +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v10 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v9 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[11:12] +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v12 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v11 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v15 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v14 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v18 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v17 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v49 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v5, v54, 8, 8 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v5, v13, 8, 8 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v5, v61, 8, 8 +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v5, v13 +; VI-NEXT: v_bfe_u32 v13, v40, 8, 8 +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v13, v55, 8, 8 +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v35, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v16 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v2, v39, v1 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v20 +; VI-NEXT: v_or_b32_e32 v1, v42, v1 +; VI-NEXT: v_lshrrev_b64 v[9:10], 24, v[14:15] +; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[17:18] +; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[48:49] +; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v48 +; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[21:22] +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v21 +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v1 +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[35:36] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v36 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v35 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[33:34] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v34 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v33 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[7:8] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v8 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v7 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[31:32] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v32 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v31 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v1, v4, 8, 8 +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[37:38] +; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v38 +; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[29:30] +; VI-NEXT: v_lshrrev_b64 v[29:30], 24, v[25:26] +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v25 +; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[23:24] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v1, v45, 8, 8 +; VI-NEXT: v_lshrrev_b64 v[35:36], 24, v[27:28] +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v28 +; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v23 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v27, v60 +; VI-NEXT: v_bfe_u32 v1, v60, 8, 8 +; VI-NEXT: v_mov_b32_e32 v60, v20 +; VI-NEXT: v_mov_b32_e32 v20, v39 +; VI-NEXT: v_mov_b32_e32 v26, v50 +; VI-NEXT: v_bfe_u32 v23, v50, 8, 8 +; VI-NEXT: v_mov_b32_e32 v50, v42 +; VI-NEXT: v_mov_b32_e32 v24, v16 +; VI-NEXT: v_bfe_u32 v32, v16, 8, 8 +; VI-NEXT: v_mov_b32_e32 v42, v53 +; VI-NEXT: v_bfe_u32 v61, v58, 8, 8 +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v28, v51, 8, 8 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: v_bfe_u32 v16, v13, 8, 8 +; VI-NEXT: v_mov_b32_e32 v51, v13 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v53, v58 +; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v37 +; VI-NEXT: v_bfe_u32 v12, v41, 8, 8 +; VI-NEXT: v_bfe_u32 v36, v52, 8, 8 +; VI-NEXT: v_bfe_u32 v34, v57, 8, 8 +; VI-NEXT: s_branch .LBB95_5 ; VI-NEXT: .LBB95_3: ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr56 +; VI-NEXT: ; kill: killed $sgpr56 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr71 -; VI-NEXT: ; implicit-def: $sgpr70 +; VI-NEXT: ; implicit-def: $sgpr56 +; VI-NEXT: ; implicit-def: $sgpr54 ; VI-NEXT: ; implicit-def: $sgpr51 -; VI-NEXT: ; implicit-def: $sgpr69 -; VI-NEXT: ; implicit-def: $sgpr68 +; VI-NEXT: ; implicit-def: $sgpr78 +; VI-NEXT: ; implicit-def: $sgpr84 ; VI-NEXT: ; implicit-def: $sgpr50 -; VI-NEXT: ; implicit-def: $sgpr67 -; VI-NEXT: ; implicit-def: $sgpr66 -; VI-NEXT: ; implicit-def: $sgpr83 -; VI-NEXT: ; implicit-def: $sgpr65 -; VI-NEXT: ; implicit-def: $sgpr64 -; VI-NEXT: ; implicit-def: $sgpr82 ; VI-NEXT: ; implicit-def: $sgpr55 -; VI-NEXT: ; implicit-def: $sgpr54 -; VI-NEXT: ; implicit-def: $sgpr81 -; VI-NEXT: ; implicit-def: $sgpr87 -; VI-NEXT: ; implicit-def: $sgpr86 -; VI-NEXT: ; implicit-def: $sgpr80 +; VI-NEXT: ; implicit-def: $sgpr77 +; VI-NEXT: ; implicit-def: $sgpr88 ; VI-NEXT: ; implicit-def: $sgpr85 -; VI-NEXT: ; implicit-def: $sgpr84 -; VI-NEXT: ; implicit-def: $sgpr53 -; VI-NEXT: ; implicit-def: $sgpr52 ; VI-NEXT: ; implicit-def: $sgpr76 +; VI-NEXT: ; implicit-def: $sgpr64 +; VI-NEXT: ; implicit-def: $sgpr75 +; VI-NEXT: ; implicit-def: $sgpr90 +; VI-NEXT: ; implicit-def: $sgpr86 ; VI-NEXT: ; implicit-def: $sgpr74 +; VI-NEXT: ; implicit-def: $sgpr83 +; VI-NEXT: ; implicit-def: $sgpr65 +; VI-NEXT: ; implicit-def: $sgpr73 +; VI-NEXT: ; implicit-def: $sgpr30 +; VI-NEXT: ; implicit-def: $sgpr87 ; VI-NEXT: ; implicit-def: $sgpr72 +; VI-NEXT: ; implicit-def: $sgpr82 +; VI-NEXT: ; implicit-def: $sgpr66 +; VI-NEXT: ; implicit-def: $sgpr63 +; VI-NEXT: ; implicit-def: $sgpr34 ; VI-NEXT: ; implicit-def: $sgpr62 +; VI-NEXT: ; implicit-def: $sgpr81 +; VI-NEXT: ; implicit-def: $sgpr67 +; VI-NEXT: ; implicit-def: $sgpr61 +; VI-NEXT: ; implicit-def: $sgpr36 +; VI-NEXT: ; kill: killed $sgpr56 ; VI-NEXT: ; implicit-def: $sgpr60 +; VI-NEXT: ; implicit-def: $sgpr80 +; VI-NEXT: ; implicit-def: $sgpr68 +; VI-NEXT: ; implicit-def: $sgpr59 +; VI-NEXT: ; implicit-def: $sgpr38 +; VI-NEXT: ; implicit-def: $sgpr52 ; VI-NEXT: ; implicit-def: $sgpr58 -; VI-NEXT: ; implicit-def: $sgpr56 +; VI-NEXT: ; implicit-def: $sgpr71 +; VI-NEXT: ; implicit-def: $sgpr69 +; VI-NEXT: ; implicit-def: $sgpr57 ; VI-NEXT: ; implicit-def: $sgpr48 -; VI-NEXT: ; implicit-def: $sgpr38 -; VI-NEXT: ; implicit-def: $sgpr36 -; VI-NEXT: ; implicit-def: $sgpr34 -; VI-NEXT: ; implicit-def: $sgpr30 -; VI-NEXT: ; implicit-def: $sgpr90 -; VI-NEXT: ; implicit-def: $sgpr88 -; VI-NEXT: ; implicit-def: $sgpr78 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr53 +; VI-NEXT: ; implicit-def: $sgpr70 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr56 +; VI-NEXT: v_writelane_b32 v62, s46, 0 +; VI-NEXT: v_writelane_b32 v62, s47, 1 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -183529,7 +183769,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 2 +; VI-NEXT: v_writelane_b32 v62, s47, 3 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -183541,7 +183782,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 4 +; VI-NEXT: v_writelane_b32 v62, s47, 5 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -183553,7 +183795,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 6 +; VI-NEXT: v_writelane_b32 v62, s47, 7 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -183565,7 +183808,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 8 +; VI-NEXT: v_writelane_b32 v62, s47, 9 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -183577,7 +183821,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 10 +; VI-NEXT: v_writelane_b32 v62, s47, 11 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -183589,7 +183834,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 12 +; VI-NEXT: v_writelane_b32 v62, s47, 13 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 @@ -183601,288 +183847,306 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: v_writelane_b32 v62, s46, 14 +; VI-NEXT: v_writelane_b32 v62, s47, 15 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: ; kill: killed $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr47 ; VI-NEXT: ; implicit-def: $sgpr46 ; VI-NEXT: s_branch .LBB95_2 ; VI-NEXT: .LBB95_4: +; VI-NEXT: v_mov_b32_e32 v54, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 16 +; VI-NEXT: v_mov_b32_e32 v60, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 17 +; VI-NEXT: v_mov_b32_e32 v24, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 18 +; VI-NEXT: v_mov_b32_e32 v1, s50 +; VI-NEXT: v_mov_b32_e32 v56, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 19 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s77 +; VI-NEXT: v_mov_b32_e32 v26, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 20 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s73 +; VI-NEXT: v_mov_b32_e32 v59, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 21 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s63 +; VI-NEXT: v_mov_b32_e32 v27, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 22 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s61 +; VI-NEXT: v_mov_b32_e32 v43, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 23 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s60 +; VI-NEXT: v_mov_b32_e32 v57, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 24 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s59 +; VI-NEXT: v_mov_b32_e32 v19, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 25 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s57 +; VI-NEXT: v_mov_b32_e32 v52, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 26 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 27 +; VI-NEXT: v_mov_b32_e32 v41, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 28 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 29 +; VI-NEXT: v_mov_b32_e32 v45, s56 +; VI-NEXT: v_readlane_b32 s56, v62, 30 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s56 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s44 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s45 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s42 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s43 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s40 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s41 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s14 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s15 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s12 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s13 -; VI-NEXT: v_mov_b32_e32 v2, s46 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s10 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s11 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s9 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s7 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s16 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s17 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s18 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s20 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s21 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s22 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s23 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s22 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s24 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s25 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s27 -; VI-NEXT: v_readlane_b32 s6, v62, 0 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s70 -; VI-NEXT: v_mov_b32_e32 v23, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 1 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s69 -; VI-NEXT: v_mov_b32_e32 v42, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 2 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s67 -; VI-NEXT: v_mov_b32_e32 v55, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 3 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s65 -; VI-NEXT: v_mov_b32_e32 v60, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 4 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s55 -; VI-NEXT: v_mov_b32_e32 v38, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 5 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s87 -; VI-NEXT: v_mov_b32_e32 v39, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 6 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s85 -; VI-NEXT: v_mov_b32_e32 v48, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 7 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s53 -; VI-NEXT: v_mov_b32_e32 v49, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 9 -; VI-NEXT: v_mov_b32_e32 v51, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 10 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 11 -; VI-NEXT: v_mov_b32_e32 v53, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 12 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 13 -; VI-NEXT: v_mov_b32_e32 v45, s6 -; VI-NEXT: v_readlane_b32 s6, v62, 14 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s26 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s28 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s29 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 16 -; VI-NEXT: v_mov_b32_e32 v11, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 17 -; VI-NEXT: v_mov_b32_e32 v26, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 18 -; VI-NEXT: v_mov_b32_e32 v28, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 19 -; VI-NEXT: v_mov_b32_e32 v9, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 20 -; VI-NEXT: v_mov_b32_e32 v12, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 21 -; VI-NEXT: v_mov_b32_e32 v15, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 22 -; VI-NEXT: v_mov_b32_e32 v22, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 23 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s5 -; VI-NEXT: v_mov_b32_e32 v30, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 24 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 25 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s80 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s81 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s82 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s83 -; VI-NEXT: v_readlane_b32 s4, v62, 26 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 27 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 28 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 29 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 30 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_readlane_b32 s4, v62, 31 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 32 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 33 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 34 -; VI-NEXT: v_mov_b32_e32 v10, s4 +; VI-NEXT: v_mov_b32_e32 v12, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 35 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_mov_b32_e32 v36, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 36 -; VI-NEXT: v_mov_b32_e32 v50, s4 +; VI-NEXT: v_mov_b32_e32 v2, s70 +; VI-NEXT: v_mov_b32_e32 v34, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 37 -; VI-NEXT: v_mov_b32_e32 v43, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s71 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 38 -; VI-NEXT: v_mov_b32_e32 v52, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s80 +; VI-NEXT: v_mov_b32_e32 v23, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 39 -; VI-NEXT: v_mov_b32_e32 v40, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s81 +; VI-NEXT: v_mov_b32_e32 v32, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s82 ; VI-NEXT: v_readlane_b32 s4, v62, 40 -; VI-NEXT: v_mov_b32_e32 v46, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 41 -; VI-NEXT: v_mov_b32_e32 v44, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 42 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 43 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 44 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 45 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 46 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 47 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 48 -; VI-NEXT: v_mov_b32_e32 v31, s4 +; VI-NEXT: v_mov_b32_e32 v18, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 49 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 50 -; VI-NEXT: v_mov_b32_e32 v33, s4 +; VI-NEXT: v_mov_b32_e32 v6, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 51 -; VI-NEXT: v_mov_b32_e32 v32, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v48, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 52 -; VI-NEXT: v_mov_b32_e32 v6, s4 +; VI-NEXT: v_mov_b32_e32 v2, s69 +; VI-NEXT: v_mov_b32_e32 v37, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 53 -; VI-NEXT: v_mov_b32_e32 v29, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s53 +; VI-NEXT: v_mov_b32_e32 v49, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 54 -; VI-NEXT: v_mov_b32_e32 v35, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s68 +; VI-NEXT: v_mov_b32_e32 v15, s4 ; VI-NEXT: v_readlane_b32 s4, v62, 55 -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s52 +; VI-NEXT: v_mov_b32_e32 v22, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s67 ; VI-NEXT: v_readlane_b32 s4, v62, 56 -; VI-NEXT: v_mov_b32_e32 v2, s78 -; VI-NEXT: v_readlane_b32 s6, v62, 15 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s4 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s66 ; VI-NEXT: v_readlane_b32 s4, v62, 57 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v54, s26 -; VI-NEXT: v_mov_b32_e32 v59, s71 -; VI-NEXT: v_mov_b32_e32 v36, s68 -; VI-NEXT: v_mov_b32_e32 v56, s66 -; VI-NEXT: v_mov_b32_e32 v61, s64 -; VI-NEXT: v_mov_b32_e32 v57, s54 -; VI-NEXT: v_mov_b32_e32 v41, s86 -; VI-NEXT: v_mov_b32_e32 v37, s84 -; VI-NEXT: v_mov_b32_e32 v58, s52 -; VI-NEXT: v_mov_b32_e32 v47, s6 -; VI-NEXT: v_mov_b32_e32 v25, s50 -; VI-NEXT: v_mov_b32_e32 v27, s51 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 14 +; VI-NEXT: v_mov_b32_e32 v8, s64 +; VI-NEXT: v_mov_b32_e32 v7, s4 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_readlane_b32 s5, v62, 15 +; VI-NEXT: v_readlane_b32 s4, v62, 12 +; VI-NEXT: v_mov_b32_e32 v7, s4 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v7, s48 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v7, s38 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v7, s36 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: v_readlane_b32 s5, v62, 13 +; VI-NEXT: v_readlane_b32 s4, v62, 10 +; VI-NEXT: v_readlane_b32 s5, v62, 11 +; VI-NEXT: v_mov_b32_e32 v9, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 8 +; VI-NEXT: v_readlane_b32 s5, v62, 9 +; VI-NEXT: v_mov_b32_e32 v14, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 6 +; VI-NEXT: v_readlane_b32 s5, v62, 7 +; VI-NEXT: v_mov_b32_e32 v17, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 4 +; VI-NEXT: v_readlane_b32 s5, v62, 5 +; VI-NEXT: v_mov_b32_e32 v10, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 2 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s65 +; VI-NEXT: v_readlane_b32 s5, v62, 3 +; VI-NEXT: v_mov_b32_e32 v7, s34 +; VI-NEXT: v_readlane_b32 s56, v62, 31 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s87 +; VI-NEXT: v_mov_b32_e32 v11, s4 +; VI-NEXT: v_readlane_b32 s4, v62, 0 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v13, s51 +; VI-NEXT: v_mov_b32_e32 v51, s76 +; VI-NEXT: v_mov_b32_e32 v42, s75 +; VI-NEXT: v_mov_b32_e32 v53, s74 +; VI-NEXT: v_mov_b32_e32 v55, s72 +; VI-NEXT: v_mov_b32_e32 v40, s62 +; VI-NEXT: v_mov_b32_e32 v5, s58 +; VI-NEXT: v_mov_b32_e32 v4, s56 +; VI-NEXT: v_mov_b32_e32 v50, s16 +; VI-NEXT: v_mov_b32_e32 v20, s17 +; VI-NEXT: v_mov_b32_e32 v3, s18 +; VI-NEXT: v_mov_b32_e32 v58, s19 +; VI-NEXT: v_mov_b32_e32 v39, s21 +; VI-NEXT: v_mov_b32_e32 v47, s23 +; VI-NEXT: v_mov_b32_e32 v46, s25 +; VI-NEXT: v_mov_b32_e32 v44, s27 +; VI-NEXT: v_mov_b32_e32 v61, s83 +; VI-NEXT: v_mov_b32_e32 v16, s46 +; VI-NEXT: v_mov_b32_e32 v28, s47 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v31, s86 +; VI-NEXT: v_mov_b32_e32 v38, s55 +; VI-NEXT: v_mov_b32_e32 v33, s85 +; VI-NEXT: v_mov_b32_e32 v2, s54 +; VI-NEXT: v_mov_b32_e32 v30, s84 +; VI-NEXT: v_readlane_b32 s5, v62, 1 ; VI-NEXT: v_mov_b32_e32 v21, s4 -; VI-NEXT: v_mov_b32_e32 v7, s56 -; VI-NEXT: v_mov_b32_e32 v13, s58 -; VI-NEXT: v_mov_b32_e32 v16, s60 -; VI-NEXT: v_mov_b32_e32 v17, s62 -; VI-NEXT: v_mov_b32_e32 v18, s72 -; VI-NEXT: v_mov_b32_e32 v19, s74 -; VI-NEXT: v_mov_b32_e32 v20, s76 -; VI-NEXT: v_mov_b32_e32 v2, s88 -; VI-NEXT: v_mov_b32_e32 v3, s90 -; VI-NEXT: v_mov_b32_e32 v4, s30 -; VI-NEXT: v_mov_b32_e32 v5, s34 -; VI-NEXT: v_mov_b32_e32 v8, s36 -; VI-NEXT: v_mov_b32_e32 v24, s38 -; VI-NEXT: v_mov_b32_e32 v14, s48 +; VI-NEXT: v_mov_b32_e32 v7, s30 +; VI-NEXT: v_mov_b32_e32 v35, s90 +; VI-NEXT: v_mov_b32_e32 v29, s88 +; VI-NEXT: v_mov_b32_e32 v25, s78 ; VI-NEXT: .LBB95_5: ; %end ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v20, v23, v20, s4 -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v21, v60, v21, s4 +; VI-NEXT: v_perm_b32 v50, v50, v15, s4 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; VI-NEXT: v_or_b32_e32 v21, v50, v21 +; VI-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v21, v20, v22, s4 +; VI-NEXT: v_perm_b32 v22, v24, v32, s4 +; VI-NEXT: v_perm_b32 v20, v56, v11, s4 +; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; VI-NEXT: v_perm_b32 v3, v3, v37, s4 ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; VI-NEXT: v_perm_b32 v30, v42, v30, s4 -; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 -; VI-NEXT: v_perm_b32 v19, v55, v19, s4 -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; VI-NEXT: v_perm_b32 v18, v38, v18, s4 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; VI-NEXT: v_perm_b32 v15, v39, v15, s4 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: v_perm_b32 v12, v49, v12, s4 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_perm_b32 v9, v51, v9, s4 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; VI-NEXT: v_or_b32_e32 v21, v21, v22 +; VI-NEXT: v_add_u32_e32 v22, vcc, 4, v0 +; VI-NEXT: v_or_b32_e32 v3, v3, v20 +; VI-NEXT: v_add_u32_e32 v20, vcc, 8, v0 +; VI-NEXT: buffer_store_dword v21, v22, s[0:3], 0 offen +; VI-NEXT: buffer_store_dword v3, v20, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v20, v26, v23, s4 +; VI-NEXT: s_waitcnt vmcnt(4) +; VI-NEXT: v_perm_b32 v3, v58, v49, s4 +; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; VI-NEXT: v_or_b32_e32 v3, v3, v20 +; VI-NEXT: v_add_u32_e32 v20, vcc, 12, v0 +; VI-NEXT: buffer_store_dword v3, v20, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v27, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_readlane_b32 s30, v63, 30 ; VI-NEXT: v_readlane_b32 s31, v63, 31 ; VI-NEXT: v_readlane_b32 s87, v63, 29 @@ -183916,297 +184180,284 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; VI-NEXT: v_readlane_b32 s35, v63, 1 ; VI-NEXT: v_readlane_b32 s34, v63, 0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v46, v23, v46, s4 -; VI-NEXT: v_or_b32_e32 v20, v46, v20 -; VI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v20, v20, v44, s4 -; VI-NEXT: v_or_b32_e32 v20, v20, v30 -; VI-NEXT: v_add_u32_e32 v30, vcc, 4, v0 -; VI-NEXT: buffer_store_dword v20, v30, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v20, v20, v52, s4 -; VI-NEXT: v_or_b32_e32 v19, v20, v19 -; VI-NEXT: v_add_u32_e32 v20, vcc, 8, v0 -; VI-NEXT: buffer_store_dword v19, v20, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v20, v60, v22, s4 -; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v19, v40, s4 -; VI-NEXT: v_or_b32_e32 v19, v19, v20 -; VI-NEXT: v_add_u32_e32 v20, vcc, 12, v0 -; VI-NEXT: buffer_store_dword v19, v20, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v19, v50, s4 -; VI-NEXT: v_or_b32_e32 v18, v19, v18 -; VI-NEXT: v_add_u32_e32 v19, vcc, 16, v0 -; VI-NEXT: buffer_store_dword v18, v19, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v18, v18, v43, s4 -; VI-NEXT: v_or_b32_e32 v15, v18, v15 -; VI-NEXT: v_add_u32_e32 v18, vcc, 20, v0 -; VI-NEXT: buffer_store_dword v15, v18, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v15, v48, v17, s4 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; VI-NEXT: v_perm_b32 v3, v3, v6, s4 +; VI-NEXT: v_perm_b32 v6, v59, v10, s4 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; VI-NEXT: v_or_b32_e32 v3, v3, v6 +; VI-NEXT: v_add_u32_e32 v6, vcc, 16, v0 +; VI-NEXT: buffer_store_dword v3, v6, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v3, v39, v48, s4 +; VI-NEXT: v_or_b32_e32 v1, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 20, v0 +; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v3, v43, v17, s4 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v17, v17, v10, s4 -; VI-NEXT: v_or_b32_e32 v15, v17, v15 -; VI-NEXT: v_add_u32_e32 v17, vcc, 24, v0 -; VI-NEXT: buffer_store_dword v15, v17, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v15, v10, s4 -; VI-NEXT: v_or_b32_e32 v12, v15, v12 -; VI-NEXT: v_add_u32_e32 v15, vcc, 28, v0 -; VI-NEXT: buffer_store_dword v12, v15, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v12, v10, v16, s4 -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_perm_b32 v1, v1, v18, s4 +; VI-NEXT: v_or_b32_e32 v1, v1, v3 +; VI-NEXT: v_add_u32_e32 v3, vcc, 24, v0 +; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v3, v57, v34, s4 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v15, v10, s4 -; VI-NEXT: v_or_b32_e32 v12, v15, v12 -; VI-NEXT: v_add_u32_e32 v15, vcc, 32, v0 -; VI-NEXT: buffer_store_dword v12, v15, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v47, v1, s4 +; VI-NEXT: v_or_b32_e32 v1, v1, v3 +; VI-NEXT: v_add_u32_e32 v3, vcc, 28, v0 +; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v12, v12, v10, s4 -; VI-NEXT: v_or_b32_e32 v9, v12, v9 -; VI-NEXT: v_add_u32_e32 v12, vcc, 36, v0 -; VI-NEXT: buffer_store_dword v9, v12, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v9, v9, v13, s4 +; VI-NEXT: v_perm_b32 v1, v1, v3, s4 +; VI-NEXT: v_perm_b32 v3, v19, v14, s4 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_or_b32_e32 v1, v1, v3 +; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0 +; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v3, v52, v36, s4 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v12, v54, v10, s4 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_or_b32_e32 v9, v12, v9 -; VI-NEXT: v_add_u32_e32 v12, vcc, 40, v0 -; VI-NEXT: buffer_store_dword v9, v12, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v12, v53, v28, s4 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_perm_b32 v1, v46, v1, s4 +; VI-NEXT: v_or_b32_e32 v1, v1, v3 +; VI-NEXT: v_add_u32_e32 v3, vcc, 36, v0 +; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v9, v9, v10, s4 -; VI-NEXT: v_or_b32_e32 v9, v9, v12 -; VI-NEXT: v_add_u32_e32 v12, vcc, 44, v0 -; VI-NEXT: buffer_store_dword v9, v12, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v3, s4 +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v9, v9, v7, s4 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; VI-NEXT: v_perm_b32 v3, v3, v9, s4 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_or_b32_e32 v1, v1, v3 +; VI-NEXT: v_add_u32_e32 v3, vcc, 40, v0 +; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v3, v41, v12, s4 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v10, v7, v10, s4 -; VI-NEXT: v_or_b32_e32 v9, v10, v9 -; VI-NEXT: v_add_u32_e32 v10, vcc, 48, v0 -; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v10, v45, v26, s4 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; VI-NEXT: v_perm_b32 v1, v44, v1, s4 +; VI-NEXT: v_or_b32_e32 v1, v1, v3 +; VI-NEXT: v_add_u32_e32 v3, vcc, 44, v0 +; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v9, v7, v9, s4 -; VI-NEXT: v_or_b32_e32 v9, v9, v10 -; VI-NEXT: v_add_u32_e32 v10, vcc, 52, v0 -; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v3, s4 +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v7, v7, v9, s4 -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v9, v9, v10, s4 -; VI-NEXT: v_or_b32_e32 v7, v9, v7 -; VI-NEXT: v_add_u32_e32 v9, vcc, 56, v0 -; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v3, v3, v9, s4 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_or_b32_e32 v1, v1, v3 +; VI-NEXT: v_add_u32_e32 v3, vcc, 48, v0 +; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v7, v7, v9, s4 -; VI-NEXT: v_perm_b32 v9, v47, v11, s4 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_or_b32_e32 v7, v7, v9 -; VI-NEXT: v_add_u32_e32 v9, vcc, 60, v0 -; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v7, v59, v14, s4 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; VI-NEXT: v_perm_b32 v1, v1, v3, s4 +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v9, v1, s4 -; VI-NEXT: v_or_b32_e32 v1, v1, v7 -; VI-NEXT: v_add_u32_e32 v7, vcc, 64, v0 -; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v21, s4 +; VI-NEXT: v_perm_b32 v3, v45, v3, s4 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_or_b32_e32 v1, v1, v3 +; VI-NEXT: v_add_u32_e32 v3, vcc, 52, v0 +; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v7, v7, v27, s4 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; VI-NEXT: v_or_b32_e32 v1, v1, v7 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x44, v0 -; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v3, s4 +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v24, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v7, v7, v35, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v7, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x48, v0 -; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v7, v36, v25, s4 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; VI-NEXT: v_perm_b32 v3, v3, v9, s4 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_or_b32_e32 v1, v1, v3 +; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0 +; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v34, s4 -; VI-NEXT: v_or_b32_e32 v1, v1, v7 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x4c, v0 -; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v3, s4 +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v6, s4 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v3, v4, v3, s4 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_or_b32_e32 v1, v1, v3 +; VI-NEXT: v_add_u32_e32 v3, vcc, 60, v0 +; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v6, v6, v8, s4 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; VI-NEXT: v_or_b32_e32 v1, v1, v6 -; VI-NEXT: v_add_u32_e32 v6, vcc, 0x50, v0 -; VI-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: v_perm_b32 v2, v13, v25, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v29, s4 +; VI-NEXT: v_perm_b32 v1, v1, v30, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v6, v56, v6, s4 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; VI-NEXT: v_or_b32_e32 v1, v1, v6 -; VI-NEXT: v_add_u32_e32 v6, vcc, 0x54, v0 -; VI-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v2, v28, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v1, v38, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v2, v29, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v51, v16, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v33, s4 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v42, v35, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v5, v6, v5, s4 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_or_b32_e32 v1, v1, v5 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x58, v0 -; VI-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v32, s4 +; VI-NEXT: v_perm_b32 v1, v1, v8, s4 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v53, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v5, v61, v5, s4 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_or_b32_e32 v1, v1, v5 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x5c, v0 -; VI-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v1, v1, v31, s4 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v4, v5, v4, s4 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_or_b32_e32 v1, v1, v4 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x60, v0 -; VI-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v4, s4 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v2, v7, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v4, v57, v4, s4 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_or_b32_e32 v1, v1, v4 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x64, v0 -; VI-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v4, s4 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v55, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v4, v3, s4 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v1, v3 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x68, v0 -; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v3, s4 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v41, v3, s4 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v1, v3 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x6c, v0 -; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v40, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v3, s4 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0 +; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v37, v2, s4 +; VI-NEXT: v_perm_b32 v2, v5, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v2, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v58, v2, s4 +; VI-NEXT: v_perm_b32 v2, v54, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen @@ -184225,8 +184476,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -184235,8 +184486,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -184391,26 +184642,30 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX9-NEXT: v_writelane_b32 v62, s46, 11 ; GFX9-NEXT: s_lshr_b32 s46, s16, 8 ; GFX9-NEXT: v_writelane_b32 v62, s46, 10 -; GFX9-NEXT: s_lshr_b32 s46, s7, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 9 -; GFX9-NEXT: s_lshr_b32 s46, s7, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 8 -; GFX9-NEXT: s_lshr_b32 s46, s7, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 7 -; GFX9-NEXT: s_lshr_b32 s46, s6, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 6 -; GFX9-NEXT: s_lshr_b32 s46, s6, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 5 -; GFX9-NEXT: s_lshr_b32 s46, s9, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 4 -; GFX9-NEXT: s_lshr_b32 s46, s9, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 3 -; GFX9-NEXT: s_lshr_b32 s46, s9, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 2 -; GFX9-NEXT: s_lshr_b32 s46, s8, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 1 -; GFX9-NEXT: s_lshr_b32 s46, s8, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 0 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[24:25], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 8 +; GFX9-NEXT: v_writelane_b32 v62, s79, 9 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[22:23], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 6 +; GFX9-NEXT: v_writelane_b32 v62, s79, 7 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[20:21], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 4 +; GFX9-NEXT: v_writelane_b32 v62, s79, 5 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[18:19], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 2 +; GFX9-NEXT: v_writelane_b32 v62, s79, 3 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[16:17], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 0 +; GFX9-NEXT: s_lshr_b32 s64, s7, 24 +; GFX9-NEXT: s_lshr_b32 s65, s7, 16 +; GFX9-NEXT: s_lshr_b32 s67, s7, 8 +; GFX9-NEXT: s_lshr_b32 s66, s6, 16 +; GFX9-NEXT: s_lshr_b32 s68, s6, 8 +; GFX9-NEXT: s_lshr_b32 s69, s9, 24 +; GFX9-NEXT: s_lshr_b32 s70, s9, 16 +; GFX9-NEXT: s_lshr_b32 s80, s9, 8 +; GFX9-NEXT: s_lshr_b32 s71, s8, 16 +; GFX9-NEXT: s_lshr_b32 s81, s8, 8 ; GFX9-NEXT: s_lshr_b32 s82, s11, 24 ; GFX9-NEXT: s_lshr_b32 s83, s11, 16 ; GFX9-NEXT: s_lshr_b32 s85, s11, 8 @@ -184431,322 +184686,304 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s54, s41, 8 ; GFX9-NEXT: s_lshr_b32 s53, s40, 16 ; GFX9-NEXT: s_lshr_b32 s55, s40, 8 -; GFX9-NEXT: s_lshr_b32 s64, s43, 24 -; GFX9-NEXT: s_lshr_b32 s65, s43, 16 -; GFX9-NEXT: s_lshr_b32 s67, s43, 8 -; GFX9-NEXT: s_lshr_b32 s66, s42, 16 -; GFX9-NEXT: s_lshr_b32 s68, s42, 8 -; GFX9-NEXT: s_lshr_b32 s69, s45, 24 -; GFX9-NEXT: s_lshr_b32 s70, s45, 16 -; GFX9-NEXT: s_lshr_b32 s80, s45, 8 -; GFX9-NEXT: s_lshr_b32 s71, s44, 16 -; GFX9-NEXT: s_lshr_b32 s81, s44, 8 -; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; GFX9-NEXT: s_lshr_b64 s[56:57], s[28:29], 24 -; GFX9-NEXT: s_lshr_b64 s[58:59], s[26:27], 24 -; GFX9-NEXT: s_lshr_b64 s[60:61], s[24:25], 24 -; GFX9-NEXT: s_lshr_b64 s[62:63], s[22:23], 24 -; GFX9-NEXT: s_lshr_b64 s[72:73], s[20:21], 24 -; GFX9-NEXT: s_lshr_b64 s[74:75], s[18:19], 24 -; GFX9-NEXT: s_lshr_b64 s[76:77], s[16:17], 24 -; GFX9-NEXT: s_lshr_b64 s[78:79], s[6:7], 24 -; GFX9-NEXT: s_lshr_b64 s[88:89], s[8:9], 24 -; GFX9-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 -; GFX9-NEXT: s_lshr_b64 s[92:93], s[12:13], 24 -; GFX9-NEXT: s_lshr_b64 s[94:95], s[14:15], 24 -; GFX9-NEXT: s_lshr_b64 s[30:31], s[40:41], 24 -; GFX9-NEXT: s_lshr_b64 s[34:35], s[42:43], 24 -; GFX9-NEXT: s_lshr_b64 s[36:37], s[44:45], 24 +; GFX9-NEXT: s_lshr_b32 s46, s43, 24 +; GFX9-NEXT: s_lshr_b32 s47, s43, 16 +; GFX9-NEXT: s_lshr_b32 s57, s43, 8 +; GFX9-NEXT: s_lshr_b32 s56, s42, 16 +; GFX9-NEXT: s_lshr_b32 s58, s42, 8 +; GFX9-NEXT: s_lshr_b32 s59, s45, 24 +; GFX9-NEXT: s_lshr_b32 s60, s45, 16 +; GFX9-NEXT: s_lshr_b32 s62, s45, 8 +; GFX9-NEXT: s_lshr_b32 s61, s44, 16 +; GFX9-NEXT: s_lshr_b32 s63, s44, 8 +; GFX9-NEXT: s_lshr_b64 s[76:77], s[4:5], 24 +; GFX9-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX9-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 +; GFX9-NEXT: v_writelane_b32 v62, s79, 1 +; GFX9-NEXT: s_lshr_b64 s[36:37], s[6:7], 24 +; GFX9-NEXT: s_lshr_b64 s[34:35], s[8:9], 24 +; GFX9-NEXT: s_lshr_b64 s[30:31], s[10:11], 24 +; GFX9-NEXT: s_lshr_b64 s[94:95], s[12:13], 24 +; GFX9-NEXT: s_lshr_b64 s[92:93], s[14:15], 24 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[40:41], 24 +; GFX9-NEXT: s_lshr_b64 s[88:89], s[42:43], 24 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB95_4 ; GFX9-NEXT: .LBB95_2: ; %cmp.true -; GFX9-NEXT: v_mov_b32_e32 v15, 0x200 -; GFX9-NEXT: v_pk_add_f16 v26, s5, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v25, s4, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v20, s45, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v19, s44, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v14, s43, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v13, s42, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v12, s41, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v11, s40, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v10, s15, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v9, s14, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v8, s13, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v7, s12, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v6, s11, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v5, s10, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v4, s9, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v3, s8, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v2, s7, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v1, s6, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v49, s17, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v48, s16, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v38, s19, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v37, s18, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v36, s21, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v35, s20, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v34, s23, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v33, s22, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v32, s25, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v31, s24, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v30, s27, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v29, s26, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v28, s29, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v27, s28, v15 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[25:26] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[27:28] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[29:30] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[31:32] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[33:34] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[35:36] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v38 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v38 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v49 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v49 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v1 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v4 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v4 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v3 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v3 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v6 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v17, 0x200 +; GFX9-NEXT: v_pk_add_f16 v16, s45, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v15, s44, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v14, s43, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v13, s42, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v12, s41, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v11, s40, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v10, s15, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v9, s14, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v8, s13, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v7, s12, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v6, s11, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v5, s10, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v4, s9, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v3, s8, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v2, s7, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v1, s6, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v32, s17, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v31, s16, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v30, s19, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v29, s18, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v28, s21, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v27, s20, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v26, s23, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v25, s22, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v24, s25, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v23, s24, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v22, s27, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v21, s26, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v20, s29, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v19, s28, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v18, s5, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v17, s4, v17 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v6 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v6 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v5 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v5 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v8 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v8 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v8 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v7 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v7 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v10 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v10 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v10 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v9 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[19:20] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v9 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v12 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v26 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v12 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v26 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v11 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v26 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v11 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v25 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v28 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v28 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v30 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v30 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v32 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v20 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v32 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v20 -; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[37:38] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 24, v36 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v20 -; GFX9-NEXT: v_lshrrev_b64 v[44:45], 24, v[48:49] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v36 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v28 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v2 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v2 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v1 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v3 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v9 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v12 +; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[25:26] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v1 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[27:28] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v5 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11 +; GFX9-NEXT: v_lshrrev_b64 v[44:45], 24, v[29:30] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v3 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v9 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v14 +; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[31:32] +; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[15:16] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v7 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v14 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v28 ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v27 ; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v27 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v30 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v29 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v29 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v31 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v31 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v33 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v38 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v37 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v37 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v49 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v48 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v48 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v1 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v19 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v31 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v31 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v15 ; GFX9-NEXT: s_branch .LBB95_5 ; GFX9-NEXT: .LBB95_3: ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr81 -; GFX9-NEXT: ; implicit-def: $sgpr71 -; GFX9-NEXT: ; implicit-def: $sgpr80 -; GFX9-NEXT: ; implicit-def: $sgpr70 -; GFX9-NEXT: ; implicit-def: $sgpr69 -; GFX9-NEXT: ; implicit-def: $sgpr68 -; GFX9-NEXT: ; implicit-def: $sgpr66 -; GFX9-NEXT: ; implicit-def: $sgpr67 -; GFX9-NEXT: ; implicit-def: $sgpr65 -; GFX9-NEXT: ; implicit-def: $sgpr64 +; GFX9-NEXT: ; implicit-def: $sgpr72 +; GFX9-NEXT: ; implicit-def: $sgpr74 +; GFX9-NEXT: ; implicit-def: $sgpr76 +; GFX9-NEXT: ; implicit-def: $sgpr63 +; GFX9-NEXT: ; implicit-def: $sgpr61 +; GFX9-NEXT: ; implicit-def: $sgpr78 +; GFX9-NEXT: ; implicit-def: $sgpr62 +; GFX9-NEXT: ; implicit-def: $sgpr60 +; GFX9-NEXT: ; implicit-def: $sgpr59 +; GFX9-NEXT: ; implicit-def: $sgpr58 +; GFX9-NEXT: ; implicit-def: $sgpr56 +; GFX9-NEXT: ; implicit-def: $sgpr88 +; GFX9-NEXT: ; implicit-def: $sgpr57 ; GFX9-NEXT: ; implicit-def: $sgpr55 ; GFX9-NEXT: ; implicit-def: $sgpr53 +; GFX9-NEXT: ; implicit-def: $sgpr90 ; GFX9-NEXT: ; implicit-def: $sgpr54 ; GFX9-NEXT: ; implicit-def: $sgpr52 ; GFX9-NEXT: ; implicit-def: $sgpr51 ; GFX9-NEXT: ; implicit-def: $sgpr50 ; GFX9-NEXT: ; implicit-def: $sgpr48 +; GFX9-NEXT: ; implicit-def: $sgpr92 ; GFX9-NEXT: ; implicit-def: $sgpr49 ; GFX9-NEXT: ; implicit-def: $sgpr39 ; GFX9-NEXT: ; implicit-def: $sgpr38 ; GFX9-NEXT: ; implicit-def: $sgpr99 ; GFX9-NEXT: ; implicit-def: $sgpr97 +; GFX9-NEXT: ; implicit-def: $sgpr94 ; GFX9-NEXT: ; implicit-def: $sgpr98 ; GFX9-NEXT: ; implicit-def: $sgpr96 ; GFX9-NEXT: ; implicit-def: $sgpr87 ; GFX9-NEXT: ; implicit-def: $sgpr86 ; GFX9-NEXT: ; implicit-def: $sgpr84 +; GFX9-NEXT: ; implicit-def: $sgpr30 ; GFX9-NEXT: ; implicit-def: $sgpr85 ; GFX9-NEXT: ; implicit-def: $sgpr83 ; GFX9-NEXT: ; implicit-def: $sgpr82 -; GFX9-NEXT: ; implicit-def: $sgpr76 -; GFX9-NEXT: ; implicit-def: $sgpr74 -; GFX9-NEXT: ; implicit-def: $sgpr72 -; GFX9-NEXT: ; implicit-def: $sgpr62 -; GFX9-NEXT: ; implicit-def: $sgpr60 -; GFX9-NEXT: ; implicit-def: $sgpr58 -; GFX9-NEXT: ; implicit-def: $sgpr56 -; GFX9-NEXT: ; implicit-def: $sgpr36 +; GFX9-NEXT: ; implicit-def: $sgpr81 +; GFX9-NEXT: ; implicit-def: $sgpr71 ; GFX9-NEXT: ; implicit-def: $sgpr34 -; GFX9-NEXT: ; implicit-def: $sgpr30 -; GFX9-NEXT: ; implicit-def: $sgpr94 -; GFX9-NEXT: ; implicit-def: $sgpr92 -; GFX9-NEXT: ; implicit-def: $sgpr90 -; GFX9-NEXT: ; implicit-def: $sgpr88 -; GFX9-NEXT: ; implicit-def: $sgpr78 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr80 +; GFX9-NEXT: ; implicit-def: $sgpr70 +; GFX9-NEXT: ; implicit-def: $sgpr69 +; GFX9-NEXT: ; implicit-def: $sgpr68 +; GFX9-NEXT: ; implicit-def: $sgpr66 +; GFX9-NEXT: ; implicit-def: $sgpr36 +; GFX9-NEXT: ; implicit-def: $sgpr67 +; GFX9-NEXT: ; implicit-def: $sgpr65 +; GFX9-NEXT: ; implicit-def: $sgpr64 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 0 +; GFX9-NEXT: v_writelane_b32 v62, s47, 1 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -184758,7 +184995,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 2 +; GFX9-NEXT: v_writelane_b32 v62, s47, 3 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -184770,7 +185008,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 4 +; GFX9-NEXT: v_writelane_b32 v62, s47, 5 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -184782,7 +185021,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 6 +; GFX9-NEXT: v_writelane_b32 v62, s47, 7 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -184794,7 +185034,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 8 +; GFX9-NEXT: v_writelane_b32 v62, s47, 9 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -184831,228 +185072,236 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr47 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: s_branch .LBB95_2 ; GFX9-NEXT: .LBB95_4: -; GFX9-NEXT: v_mov_b32_e32 v15, s81 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s71 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s80 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s70 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s69 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s68 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s66 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s67 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s65 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s64 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s55 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s53 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s54 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s52 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s51 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s50 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s48 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s49 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s39 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s38 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s99 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s97 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s98 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s96 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s87 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s86 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s84 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s85 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s83 -; GFX9-NEXT: v_mov_b32_e32 v25, s4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s82 -; GFX9-NEXT: v_readlane_b32 s4, v62, 0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 1 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 2 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 3 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 5 -; GFX9-NEXT: v_mov_b32_e32 v22, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 6 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 7 -; GFX9-NEXT: v_mov_b32_e32 v45, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 8 -; GFX9-NEXT: v_mov_b32_e32 v41, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 9 -; GFX9-NEXT: v_mov_b32_e32 v42, s4 +; GFX9-NEXT: v_mov_b32_e32 v33, s47 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s46 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s55 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s53 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s54 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s52 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s51 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s50 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s48 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s49 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s39 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s38 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s99 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s97 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s98 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s96 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s87 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s86 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s84 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s85 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s83 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s82 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s81 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s71 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s80 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s70 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s69 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s68 +; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s66 ; GFX9-NEXT: v_readlane_b32 s4, v62, 10 -; GFX9-NEXT: v_mov_b32_e32 v55, s4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s67 +; GFX9-NEXT: v_mov_b32_e32 v36, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 11 -; GFX9-NEXT: v_mov_b32_e32 v39, s4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s65 +; GFX9-NEXT: v_mov_b32_e32 v37, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 12 -; GFX9-NEXT: v_mov_b32_e32 v50, s4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s64 +; GFX9-NEXT: v_mov_b32_e32 v60, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v35, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 15 -; GFX9-NEXT: v_mov_b32_e32 v52, s4 +; GFX9-NEXT: v_mov_b32_e32 v58, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 16 -; GFX9-NEXT: v_mov_b32_e32 v54, s4 +; GFX9-NEXT: v_mov_b32_e32 v59, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 17 -; GFX9-NEXT: v_mov_b32_e32 v24, s4 +; GFX9-NEXT: v_mov_b32_e32 v54, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 18 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v56, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 19 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v57, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 20 -; GFX9-NEXT: v_mov_b32_e32 v21, s4 +; GFX9-NEXT: v_mov_b32_e32 v46, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 21 -; GFX9-NEXT: v_mov_b32_e32 v18, s4 +; GFX9-NEXT: v_mov_b32_e32 v47, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 22 -; GFX9-NEXT: v_mov_b32_e32 v16, s4 +; GFX9-NEXT: v_mov_b32_e32 v55, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 23 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v41, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 24 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 25 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 26 -; GFX9-NEXT: v_mov_b32_e32 v61, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 27 -; GFX9-NEXT: v_mov_b32_e32 v23, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 28 -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 29 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 30 -; GFX9-NEXT: v_mov_b32_e32 v53, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 31 -; GFX9-NEXT: v_mov_b32_e32 v60, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 32 -; GFX9-NEXT: v_mov_b32_e32 v59, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 33 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 34 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 35 -; GFX9-NEXT: v_mov_b32_e32 v57, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 36 -; GFX9-NEXT: v_mov_b32_e32 v58, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 37 -; GFX9-NEXT: v_mov_b32_e32 v56, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 38 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 39 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 40 -; GFX9-NEXT: v_mov_b32_e32 v46, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 41 -; GFX9-NEXT: v_mov_b32_e32 v47, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 42 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 43 -; GFX9-NEXT: v_mov_b32_e32 v51, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 44 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 45 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 46 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 47 -; GFX9-NEXT: v_mov_b32_e32 v40, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 48 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 49 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s4 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s46 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s56 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 +; GFX9-NEXT: v_mov_b32_e32 v49, s59 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s76 +; GFX9-NEXT: v_mov_b32_e32 v40, s36 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s74 +; GFX9-NEXT: v_mov_b32_e32 v40, s30 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s58 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s60 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s72 +; GFX9-NEXT: v_mov_b32_e32 v40, s92 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s62 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s72 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v18, s5 +; GFX9-NEXT: v_readlane_b32 s4, v62, 8 +; GFX9-NEXT: v_mov_b32_e32 v48, s4 +; GFX9-NEXT: v_mov_b32_e32 v40, s90 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s78 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: v_readlane_b32 s5, v62, 9 +; GFX9-NEXT: v_readlane_b32 s4, v62, 6 +; GFX9-NEXT: v_readlane_b32 s5, v62, 7 +; GFX9-NEXT: v_mov_b32_e32 v42, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 4 +; GFX9-NEXT: v_readlane_b32 s5, v62, 5 +; GFX9-NEXT: v_mov_b32_e32 v43, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 2 +; GFX9-NEXT: v_readlane_b32 s5, v62, 3 +; GFX9-NEXT: v_mov_b32_e32 v48, s34 ; GFX9-NEXT: v_mov_b32_e32 v40, s88 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v44, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 0 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v19, s44 -; GFX9-NEXT: v_mov_b32_e32 v20, s45 +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v15, s44 +; GFX9-NEXT: v_mov_b32_e32 v16, s45 ; GFX9-NEXT: v_mov_b32_e32 v13, s42 ; GFX9-NEXT: v_mov_b32_e32 v14, s43 ; GFX9-NEXT: v_mov_b32_e32 v11, s40 @@ -185067,78 +185316,66 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX9-NEXT: v_mov_b32_e32 v4, s9 ; GFX9-NEXT: v_mov_b32_e32 v1, s6 ; GFX9-NEXT: v_mov_b32_e32 v2, s7 -; GFX9-NEXT: v_mov_b32_e32 v48, s16 -; GFX9-NEXT: v_mov_b32_e32 v49, s17 -; GFX9-NEXT: v_mov_b32_e32 v37, s18 -; GFX9-NEXT: v_mov_b32_e32 v38, s19 -; GFX9-NEXT: v_mov_b32_e32 v35, s20 -; GFX9-NEXT: v_mov_b32_e32 v36, s21 -; GFX9-NEXT: v_mov_b32_e32 v33, s22 -; GFX9-NEXT: v_mov_b32_e32 v34, s23 -; GFX9-NEXT: v_mov_b32_e32 v31, s24 -; GFX9-NEXT: v_mov_b32_e32 v32, s25 -; GFX9-NEXT: v_mov_b32_e32 v29, s26 -; GFX9-NEXT: v_mov_b32_e32 v30, s27 -; GFX9-NEXT: v_mov_b32_e32 v27, s28 -; GFX9-NEXT: v_mov_b32_e32 v28, s29 -; GFX9-NEXT: v_mov_b32_e32 v26, s5 -; GFX9-NEXT: v_mov_b32_e32 v43, s74 -; GFX9-NEXT: v_mov_b32_e32 v44, s76 -; GFX9-NEXT: v_mov_b32_e32 v40, v41 -; GFX9-NEXT: v_mov_b32_e32 v41, v45 -; GFX9-NEXT: v_mov_b32_e32 v45, v22 -; GFX9-NEXT: v_mov_b32_e32 v22, s90 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v22, s92 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v22, s94 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v22, s30 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v22, s34 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v22, s36 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v31, s16 +; GFX9-NEXT: v_mov_b32_e32 v32, s17 +; GFX9-NEXT: v_mov_b32_e32 v29, s18 +; GFX9-NEXT: v_mov_b32_e32 v30, s19 +; GFX9-NEXT: v_mov_b32_e32 v27, s20 +; GFX9-NEXT: v_mov_b32_e32 v28, s21 +; GFX9-NEXT: v_mov_b32_e32 v25, s22 +; GFX9-NEXT: v_mov_b32_e32 v26, s23 +; GFX9-NEXT: v_mov_b32_e32 v23, s24 +; GFX9-NEXT: v_mov_b32_e32 v24, s25 +; GFX9-NEXT: v_mov_b32_e32 v21, s26 +; GFX9-NEXT: v_mov_b32_e32 v22, s27 +; GFX9-NEXT: v_mov_b32_e32 v19, s28 +; GFX9-NEXT: v_mov_b32_e32 v20, s29 +; GFX9-NEXT: v_readlane_b32 s5, v62, 1 +; GFX9-NEXT: v_mov_b32_e32 v45, s4 +; GFX9-NEXT: v_mov_b32_e32 v48, s57 +; GFX9-NEXT: v_mov_b32_e32 v38, s56 +; GFX9-NEXT: v_mov_b32_e32 v39, s58 +; GFX9-NEXT: v_mov_b32_e32 v50, s60 +; GFX9-NEXT: v_mov_b32_e32 v51, s62 +; GFX9-NEXT: v_mov_b32_e32 v61, s61 +; GFX9-NEXT: v_mov_b32_e32 v52, s63 +; GFX9-NEXT: v_mov_b32_e32 v53, s94 +; GFX9-NEXT: v_mov_b32_e32 v40, s78 ; GFX9-NEXT: .LBB95_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v37, v37, v52, s4 -; GFX9-NEXT: v_perm_b32 v31, v31, v53, s4 -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v33, v33, v15, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v21, v35, v21, s4 -; GFX9-NEXT: v_perm_b32 v16, v36, v16, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v24, v38, v24, s4 -; GFX9-NEXT: v_perm_b32 v17, v28, v17, s4 -; GFX9-NEXT: v_perm_b32 v48, v48, v55, s4 -; GFX9-NEXT: v_perm_b32 v49, v49, v50, s4 -; GFX9-NEXT: v_perm_b32 v50, v54, v43, s4 -; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v39, v39, v44, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v39 -; GFX9-NEXT: v_or_b32_e32 v39, v48, v39 -; GFX9-NEXT: v_perm_b32 v23, v34, v23, s4 -; GFX9-NEXT: v_perm_b32 v32, v32, v59, s4 -; GFX9-NEXT: v_perm_b32 v29, v29, v57, s4 -; GFX9-NEXT: v_perm_b32 v30, v30, v56, s4 +; GFX9-NEXT: v_perm_b32 v31, v31, v36, s4 +; GFX9-NEXT: v_perm_b32 v36, v37, v45, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v36, 16, v36 +; GFX9-NEXT: v_or_b32_e32 v31, v31, v36 +; GFX9-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen +; GFX9-NEXT: v_perm_b32 v31, v32, v60, s4 +; GFX9-NEXT: v_perm_b32 v32, v33, v35, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; GFX9-NEXT: v_or_b32_e32 v31, v31, v32 +; GFX9-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:4 +; GFX9-NEXT: v_perm_b32 v31, v59, v44, s4 +; GFX9-NEXT: v_perm_b32 v29, v29, v58, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX9-NEXT: v_or_b32_e32 v29, v29, v31 +; GFX9-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:8 +; GFX9-NEXT: v_perm_b32 v29, v30, v54, s4 +; GFX9-NEXT: v_perm_b32 v30, v56, v57, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; GFX9-NEXT: v_or_b32_e32 v29, v29, v30 +; GFX9-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:12 +; GFX9-NEXT: v_perm_b32 v29, v47, v43, s4 ; GFX9-NEXT: v_perm_b32 v27, v27, v46, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v45, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; GFX9-NEXT: v_or_b32_e32 v27, v27, v29 +; GFX9-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:16 +; GFX9-NEXT: v_perm_b32 v27, v28, v55, s4 +; GFX9-NEXT: v_perm_b32 v28, v41, v34, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX9-NEXT: v_or_b32_e32 v27, v27, v28 +; GFX9-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:20 +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v15, v15, v52, s4 +; GFX9-NEXT: v_perm_b32 v13, v13, v39, s4 ; GFX9-NEXT: v_readlane_b32 s30, v63, 34 ; GFX9-NEXT: v_readlane_b32 s31, v63, 35 ; GFX9-NEXT: v_readlane_b32 s99, v63, 33 @@ -185175,272 +185412,254 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX9-NEXT: v_readlane_b32 s36, v63, 2 ; GFX9-NEXT: v_readlane_b32 s35, v63, 1 ; GFX9-NEXT: v_readlane_b32 s34, v63, 0 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v36, v58, v52, s4 -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v22, v25, v15, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v35, v61, v35, s4 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v18, v18, v54, s4 -; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: v_or_b32_e32 v18, v21, v18 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v38, v47, v52, s4 -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v25, v26, v15, s4 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v34, v60, v54, s4 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v28, v51, v52, s4 -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v26, v15, v51, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v25, v25, v27, s4 +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v27, v27, v42, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX9-NEXT: v_or_b32_e32 v25, v25, v27 +; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:24 +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4 +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v19, v19, v15, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v26, v26, v27, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX9-NEXT: v_or_b32_e32 v25, v25, v26 +; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:28 +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v20, v20, v15, s4 -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v23, v23, v25, s4 +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v15, v15, v51, s4 -; GFX9-NEXT: buffer_store_dword v39, v0, s[0:3], 0 offen -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX9-NEXT: v_or_b32_e32 v23, v23, v25 +; GFX9-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:32 +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v39, v39, v48, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v39 -; GFX9-NEXT: v_or_b32_e32 v39, v49, v39 -; GFX9-NEXT: buffer_store_dword v39, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v50 -; GFX9-NEXT: v_or_b32_e32 v37, v37, v39 -; GFX9-NEXT: buffer_store_dword v37, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v23, v24, v23, s4 +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v37, v37, v39, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v37, 16, v37 -; GFX9-NEXT: v_or_b32_e32 v24, v24, v37 -; GFX9-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v24, v24, v25, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX9-NEXT: v_or_b32_e32 v23, v23, v24 +; GFX9-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:36 +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v18, v18, v21, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: v_or_b32_e32 v16, v16, v18 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v35 -; GFX9-NEXT: v_or_b32_e32 v16, v33, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v21, v23, s4 +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v23, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v34 -; GFX9-NEXT: v_or_b32_e32 v16, v31, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v23, v24, v23, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX9-NEXT: v_or_b32_e32 v21, v21, v23 +; GFX9-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:40 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v32, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v36 -; GFX9-NEXT: v_or_b32_e32 v16, v29, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v22, v21, s4 +; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v30, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v38 -; GFX9-NEXT: v_or_b32_e32 v16, v27, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v22, v22, v23, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX9-NEXT: v_or_b32_e32 v21, v21, v22 +; GFX9-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:44 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v17, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v28 -; GFX9-NEXT: v_or_b32_e32 v16, v22, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v19, v19, v21, s4 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v25, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v26 -; GFX9-NEXT: v_or_b32_e32 v16, v19, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v22, v21, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX9-NEXT: v_or_b32_e32 v19, v19, v21 +; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:48 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v20, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v19, v20, v19, s4 +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v20, v20, v21, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX9-NEXT: v_or_b32_e32 v19, v19, v20 +; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:52 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v17, v17, v19, s4 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v19, v20, v19, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX9-NEXT: v_or_b32_e32 v17, v17, v19 +; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:56 +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v13, v16, s4 +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4 +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v18, v18, v19, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; GFX9-NEXT: v_or_b32_e32 v17, v17, v18 +; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:60 +; GFX9-NEXT: v_perm_b32 v17, v61, v40, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX9-NEXT: v_or_b32_e32 v15, v15, v17 +; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:64 +; GFX9-NEXT: v_perm_b32 v15, v16, v51, s4 +; GFX9-NEXT: v_perm_b32 v16, v50, v49, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX9-NEXT: v_or_b32_e32 v15, v15, v16 +; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:68 +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v15, v38, v15, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v15 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v13, v14, v48, s4 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v14, v14, v15, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v11, v11, v13, s4 ; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; GFX9-NEXT: v_or_b32_e32 v11, v11, v13 +; GFX9-NEXT: v_perm_b32 v11, v11, v13, s4 +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v13, v13, v14, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX9-NEXT: v_or_b32_e32 v11, v11, v13 ; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4 -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v12, v12, v13, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 ; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v9, v9, v11, s4 -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4 +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v11 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4 -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v10, v10, v11, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v7, v9, s4 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4 +; GFX9-NEXT: v_perm_b32 v9, v9, v53, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v9 ; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v8, v8, v9, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 ; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v5, v7, s4 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4 +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v7, v7, v8, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v7 ; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:104 ; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v6, v7, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v3, v5, s4 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4 +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v5, v5, v6, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 ; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v4, v4, v5, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v3, v3, v4, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v3 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 -; GFX9-NEXT: v_perm_b32 v1, v2, v41, s4 -; GFX9-NEXT: v_perm_b32 v2, v40, v42, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 @@ -185459,8 +185678,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -185470,88 +185689,86 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_or_saveexec_b32 s4, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-NEXT: scratch_store_b32 off, v73, s32 offset:68 ; GFX11-NEXT: scratch_store_b32 off, v74, s32 offset:72 ; GFX11-NEXT: scratch_store_b32 off, v75, s32 offset:76 ; GFX11-NEXT: scratch_store_b32 off, v76, s32 offset:80 -; GFX11-NEXT: scratch_store_b32 off, v77, s32 offset:84 ; GFX11-NEXT: s_mov_b32 exec_lo, s4 -; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Spill -; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:68 -; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:64 +; GFX11-NEXT: s_clause 0x10 ; 68-byte Folded Spill +; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:64 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:60 +; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:60 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:56 +; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:56 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:52 +; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:52 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:48 +; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:48 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:44 +; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:44 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:40 +; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:40 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:36 +; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:36 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:32 +; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:32 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:28 +; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:28 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:24 +; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:24 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:20 +; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:20 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:16 +; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:16 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:12 +; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:12 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:8 +; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:8 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v72, s32 offset:4 +; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:4 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v73, s32 -; GFX11-NEXT: v_writelane_b32 v74, s34, 0 -; GFX11-NEXT: v_writelane_b32 v74, s35, 1 -; GFX11-NEXT: v_writelane_b32 v74, s36, 2 -; GFX11-NEXT: v_writelane_b32 v74, s37, 3 -; GFX11-NEXT: v_writelane_b32 v74, s38, 4 -; GFX11-NEXT: v_writelane_b32 v74, s39, 5 -; GFX11-NEXT: v_writelane_b32 v74, s48, 6 -; GFX11-NEXT: v_writelane_b32 v74, s49, 7 -; GFX11-NEXT: v_writelane_b32 v74, s50, 8 -; GFX11-NEXT: v_writelane_b32 v74, s51, 9 -; GFX11-NEXT: v_writelane_b32 v74, s52, 10 -; GFX11-NEXT: v_writelane_b32 v74, s53, 11 -; GFX11-NEXT: v_writelane_b32 v74, s54, 12 -; GFX11-NEXT: v_writelane_b32 v74, s55, 13 -; GFX11-NEXT: v_writelane_b32 v74, s64, 14 -; GFX11-NEXT: v_writelane_b32 v74, s65, 15 -; GFX11-NEXT: v_writelane_b32 v74, s66, 16 -; GFX11-NEXT: v_writelane_b32 v74, s67, 17 -; GFX11-NEXT: v_writelane_b32 v74, s68, 18 -; GFX11-NEXT: v_writelane_b32 v74, s69, 19 -; GFX11-NEXT: v_writelane_b32 v74, s70, 20 -; GFX11-NEXT: v_writelane_b32 v74, s71, 21 -; GFX11-NEXT: v_writelane_b32 v74, s80, 22 -; GFX11-NEXT: v_writelane_b32 v74, s81, 23 -; GFX11-NEXT: v_writelane_b32 v74, s82, 24 -; GFX11-NEXT: v_writelane_b32 v74, s83, 25 -; GFX11-NEXT: v_writelane_b32 v74, s84, 26 -; GFX11-NEXT: v_writelane_b32 v74, s85, 27 -; GFX11-NEXT: v_writelane_b32 v74, s86, 28 -; GFX11-NEXT: v_writelane_b32 v74, s87, 29 -; GFX11-NEXT: v_writelane_b32 v74, s96, 30 -; GFX11-NEXT: v_writelane_b32 v74, s97, 31 -; GFX11-NEXT: v_writelane_b32 v75, s98, 0 -; GFX11-NEXT: v_writelane_b32 v75, s99, 1 -; GFX11-NEXT: v_writelane_b32 v75, s100, 2 -; GFX11-NEXT: v_writelane_b32 v75, s101, 3 -; GFX11-NEXT: v_writelane_b32 v75, s102, 4 -; GFX11-NEXT: v_writelane_b32 v75, s103, 5 -; GFX11-NEXT: v_writelane_b32 v75, s104, 6 -; GFX11-NEXT: v_writelane_b32 v75, s30, 7 -; GFX11-NEXT: v_writelane_b32 v75, s31, 8 +; GFX11-NEXT: scratch_store_b32 off, v72, s32 +; GFX11-NEXT: v_writelane_b32 v73, s34, 0 +; GFX11-NEXT: v_writelane_b32 v73, s35, 1 +; GFX11-NEXT: v_writelane_b32 v73, s36, 2 +; GFX11-NEXT: v_writelane_b32 v73, s37, 3 +; GFX11-NEXT: v_writelane_b32 v73, s38, 4 +; GFX11-NEXT: v_writelane_b32 v73, s39, 5 +; GFX11-NEXT: v_writelane_b32 v73, s48, 6 +; GFX11-NEXT: v_writelane_b32 v73, s49, 7 +; GFX11-NEXT: v_writelane_b32 v73, s50, 8 +; GFX11-NEXT: v_writelane_b32 v73, s51, 9 +; GFX11-NEXT: v_writelane_b32 v73, s52, 10 +; GFX11-NEXT: v_writelane_b32 v73, s53, 11 +; GFX11-NEXT: v_writelane_b32 v73, s54, 12 +; GFX11-NEXT: v_writelane_b32 v73, s55, 13 +; GFX11-NEXT: v_writelane_b32 v73, s64, 14 +; GFX11-NEXT: v_writelane_b32 v73, s65, 15 +; GFX11-NEXT: v_writelane_b32 v73, s66, 16 +; GFX11-NEXT: v_writelane_b32 v73, s67, 17 +; GFX11-NEXT: v_writelane_b32 v73, s68, 18 +; GFX11-NEXT: v_writelane_b32 v73, s69, 19 +; GFX11-NEXT: v_writelane_b32 v73, s70, 20 +; GFX11-NEXT: v_writelane_b32 v73, s71, 21 +; GFX11-NEXT: v_writelane_b32 v73, s80, 22 +; GFX11-NEXT: v_writelane_b32 v73, s81, 23 +; GFX11-NEXT: v_writelane_b32 v73, s82, 24 +; GFX11-NEXT: v_writelane_b32 v73, s83, 25 +; GFX11-NEXT: v_writelane_b32 v73, s84, 26 +; GFX11-NEXT: v_writelane_b32 v73, s85, 27 +; GFX11-NEXT: v_writelane_b32 v73, s86, 28 +; GFX11-NEXT: v_writelane_b32 v73, s87, 29 +; GFX11-NEXT: v_writelane_b32 v73, s96, 30 +; GFX11-NEXT: v_writelane_b32 v73, s97, 31 +; GFX11-NEXT: v_writelane_b32 v74, s98, 0 +; GFX11-NEXT: v_writelane_b32 v74, s99, 1 +; GFX11-NEXT: v_writelane_b32 v74, s100, 2 +; GFX11-NEXT: v_writelane_b32 v74, s101, 3 +; GFX11-NEXT: v_writelane_b32 v74, s102, 4 +; GFX11-NEXT: v_writelane_b32 v74, s103, 5 +; GFX11-NEXT: v_writelane_b32 v74, s104, 6 +; GFX11-NEXT: v_writelane_b32 v74, s30, 7 +; GFX11-NEXT: v_writelane_b32 v74, s31, 8 ; GFX11-NEXT: v_readfirstlane_b32 s42, v15 ; GFX11-NEXT: v_readfirstlane_b32 s5, v14 ; GFX11-NEXT: v_readfirstlane_b32 s4, v13 @@ -185569,179 +185786,177 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX11-NEXT: v_readfirstlane_b32 s40, v1 ; GFX11-NEXT: s_cmp_lg_u32 s42, 0 ; GFX11-NEXT: s_mov_b32 vcc_lo, 0 +; GFX11-NEXT: ; implicit-def: $vgpr75 : SGPR spill to VGPR lane ; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane -; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane ; GFX11-NEXT: s_cbranch_scc0 .LBB95_3 ; GFX11-NEXT: ; %bb.1: ; %cmp.false ; GFX11-NEXT: s_lshr_b32 s42, s27, 24 ; GFX11-NEXT: s_lshr_b32 vcc_hi, s5, 24 -; GFX11-NEXT: v_writelane_b32 v77, s42, 7 +; GFX11-NEXT: v_writelane_b32 v76, s42, 7 ; GFX11-NEXT: s_lshr_b32 s42, s27, 16 ; GFX11-NEXT: s_lshr_b32 s34, s5, 16 ; GFX11-NEXT: s_lshr_b32 s36, s5, 8 ; GFX11-NEXT: s_lshr_b32 s35, s4, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 6 +; GFX11-NEXT: v_writelane_b32 v76, s42, 6 ; GFX11-NEXT: s_lshr_b32 s42, s27, 8 ; GFX11-NEXT: s_lshr_b32 s37, s4, 8 ; GFX11-NEXT: s_lshr_b32 s38, s7, 24 ; GFX11-NEXT: s_lshr_b32 s39, s7, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 5 +; GFX11-NEXT: v_writelane_b32 v76, s42, 5 ; GFX11-NEXT: s_lshr_b32 s42, s26, 16 ; GFX11-NEXT: s_lshr_b32 s49, s7, 8 ; GFX11-NEXT: s_lshr_b32 s48, s6, 16 ; GFX11-NEXT: s_lshr_b32 s50, s6, 8 -; GFX11-NEXT: v_writelane_b32 v77, s42, 4 +; GFX11-NEXT: v_writelane_b32 v76, s42, 4 ; GFX11-NEXT: s_lshr_b32 s42, s26, 8 ; GFX11-NEXT: s_lshr_b32 s51, s9, 24 ; GFX11-NEXT: s_lshr_b32 s52, s9, 16 ; GFX11-NEXT: s_lshr_b32 s54, s9, 8 -; GFX11-NEXT: v_writelane_b32 v77, s42, 3 +; GFX11-NEXT: v_writelane_b32 v76, s42, 3 ; GFX11-NEXT: s_lshr_b32 s42, s25, 24 ; GFX11-NEXT: s_lshr_b32 s53, s8, 16 ; GFX11-NEXT: s_lshr_b32 s55, s8, 8 ; GFX11-NEXT: s_lshr_b32 s64, s11, 24 -; GFX11-NEXT: v_writelane_b32 v77, s42, 2 +; GFX11-NEXT: v_writelane_b32 v76, s42, 2 ; GFX11-NEXT: s_lshr_b32 s42, s25, 16 ; GFX11-NEXT: s_lshr_b32 s65, s11, 16 ; GFX11-NEXT: s_lshr_b32 s67, s11, 8 ; GFX11-NEXT: s_lshr_b32 s66, s10, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 1 +; GFX11-NEXT: v_writelane_b32 v76, s42, 1 ; GFX11-NEXT: s_lshr_b32 s42, s25, 8 ; GFX11-NEXT: s_lshr_b32 s68, s10, 8 ; GFX11-NEXT: s_lshr_b32 s69, s13, 24 ; GFX11-NEXT: s_lshr_b32 s70, s13, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 0 +; GFX11-NEXT: v_writelane_b32 v76, s42, 0 ; GFX11-NEXT: s_lshr_b32 s42, s24, 16 ; GFX11-NEXT: s_lshr_b32 s80, s13, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 31 +; GFX11-NEXT: v_writelane_b32 v75, s42, 31 ; GFX11-NEXT: s_lshr_b32 s42, s24, 8 ; GFX11-NEXT: s_lshr_b32 s71, s12, 16 ; GFX11-NEXT: s_lshr_b32 s81, s12, 8 ; GFX11-NEXT: s_lshr_b32 s82, s15, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 30 +; GFX11-NEXT: v_writelane_b32 v75, s42, 30 ; GFX11-NEXT: s_lshr_b32 s42, s23, 24 ; GFX11-NEXT: s_lshr_b32 s83, s15, 16 ; GFX11-NEXT: s_lshr_b32 s85, s15, 8 ; GFX11-NEXT: s_lshr_b32 s84, s14, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 29 +; GFX11-NEXT: v_writelane_b32 v75, s42, 29 ; GFX11-NEXT: s_lshr_b32 s42, s23, 16 ; GFX11-NEXT: s_lshr_b32 s86, s14, 8 ; GFX11-NEXT: s_lshr_b32 s87, s41, 24 ; GFX11-NEXT: s_lshr_b32 s96, s41, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 28 +; GFX11-NEXT: v_writelane_b32 v75, s42, 28 ; GFX11-NEXT: s_lshr_b32 s42, s23, 8 ; GFX11-NEXT: s_lshr_b32 s98, s41, 8 ; GFX11-NEXT: s_lshr_b32 s97, s40, 16 ; GFX11-NEXT: s_lshr_b32 s99, s40, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 27 +; GFX11-NEXT: v_writelane_b32 v75, s42, 27 ; GFX11-NEXT: s_lshr_b32 s42, s22, 16 ; GFX11-NEXT: s_lshr_b32 s100, s29, 24 ; GFX11-NEXT: s_lshr_b32 s101, s29, 16 ; GFX11-NEXT: s_lshr_b32 s103, s29, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 26 +; GFX11-NEXT: v_writelane_b32 v75, s42, 26 ; GFX11-NEXT: s_lshr_b32 s42, s22, 8 ; GFX11-NEXT: s_lshr_b32 s102, s28, 16 ; GFX11-NEXT: s_lshr_b32 s104, s28, 8 ; GFX11-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 25 +; GFX11-NEXT: v_writelane_b32 v75, s42, 25 ; GFX11-NEXT: s_lshr_b32 s42, s21, 24 ; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24 ; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 ; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 24 ; GFX11-NEXT: s_lshr_b32 s42, s21, 16 ; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24 ; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24 ; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 23 +; GFX11-NEXT: v_writelane_b32 v75, s42, 23 ; GFX11-NEXT: s_lshr_b32 s42, s21, 8 -; GFX11-NEXT: s_lshr_b64 s[74:75], s[4:5], 24 -; GFX11-NEXT: s_lshr_b64 s[76:77], s[6:7], 24 -; GFX11-NEXT: s_lshr_b64 s[78:79], s[8:9], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 22 +; GFX11-NEXT: s_lshr_b64 s[30:31], s[4:5], 24 +; GFX11-NEXT: s_lshr_b64 s[94:95], s[6:7], 24 +; GFX11-NEXT: s_lshr_b64 s[92:93], s[8:9], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 22 ; GFX11-NEXT: s_lshr_b32 s42, s20, 16 -; GFX11-NEXT: s_lshr_b64 s[88:89], s[10:11], 24 -; GFX11-NEXT: s_lshr_b64 s[90:91], s[12:13], 24 -; GFX11-NEXT: s_lshr_b64 s[92:93], s[14:15], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 21 +; GFX11-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 +; GFX11-NEXT: s_lshr_b64 s[88:89], s[12:13], 24 +; GFX11-NEXT: s_lshr_b64 s[78:79], s[14:15], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 21 ; GFX11-NEXT: s_lshr_b32 s42, s20, 8 -; GFX11-NEXT: s_lshr_b64 s[94:95], s[40:41], 24 -; GFX11-NEXT: s_lshr_b64 s[30:31], s[28:29], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 20 +; GFX11-NEXT: s_lshr_b64 s[76:77], s[40:41], 24 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 20 ; GFX11-NEXT: s_lshr_b32 s42, s19, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 19 +; GFX11-NEXT: v_writelane_b32 v75, s42, 19 ; GFX11-NEXT: s_lshr_b32 s42, s19, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 18 +; GFX11-NEXT: v_writelane_b32 v75, s42, 18 ; GFX11-NEXT: s_lshr_b32 s42, s19, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 17 +; GFX11-NEXT: v_writelane_b32 v75, s42, 17 ; GFX11-NEXT: s_lshr_b32 s42, s18, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 16 +; GFX11-NEXT: v_writelane_b32 v75, s42, 16 ; GFX11-NEXT: s_lshr_b32 s42, s18, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 15 +; GFX11-NEXT: v_writelane_b32 v75, s42, 15 ; GFX11-NEXT: s_lshr_b32 s42, s17, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 14 +; GFX11-NEXT: v_writelane_b32 v75, s42, 14 ; GFX11-NEXT: s_lshr_b32 s42, s17, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 13 +; GFX11-NEXT: v_writelane_b32 v75, s42, 13 ; GFX11-NEXT: s_lshr_b32 s42, s17, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 12 +; GFX11-NEXT: v_writelane_b32 v75, s42, 12 ; GFX11-NEXT: s_lshr_b32 s42, s16, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 11 +; GFX11-NEXT: v_writelane_b32 v75, s42, 11 ; GFX11-NEXT: s_lshr_b32 s42, s16, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 10 +; GFX11-NEXT: v_writelane_b32 v75, s42, 10 ; GFX11-NEXT: s_lshr_b32 s42, s3, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 9 +; GFX11-NEXT: v_writelane_b32 v75, s42, 9 ; GFX11-NEXT: s_lshr_b32 s42, s3, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 8 +; GFX11-NEXT: v_writelane_b32 v75, s42, 8 ; GFX11-NEXT: s_lshr_b32 s42, s3, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 7 +; GFX11-NEXT: v_writelane_b32 v75, s42, 7 ; GFX11-NEXT: s_lshr_b32 s42, s2, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 6 +; GFX11-NEXT: v_writelane_b32 v75, s42, 6 ; GFX11-NEXT: s_lshr_b32 s42, s2, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 5 +; GFX11-NEXT: v_writelane_b32 v75, s42, 5 ; GFX11-NEXT: s_lshr_b32 s42, s1, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 4 +; GFX11-NEXT: v_writelane_b32 v75, s42, 4 ; GFX11-NEXT: s_lshr_b32 s42, s1, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 3 +; GFX11-NEXT: v_writelane_b32 v75, s42, 3 ; GFX11-NEXT: s_lshr_b32 s42, s1, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 2 +; GFX11-NEXT: v_writelane_b32 v75, s42, 2 ; GFX11-NEXT: s_lshr_b32 s42, s0, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 1 +; GFX11-NEXT: v_writelane_b32 v75, s42, 1 ; GFX11-NEXT: s_lshr_b32 s42, s0, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 0 +; GFX11-NEXT: v_writelane_b32 v75, s42, 0 ; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24 ; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_lo ; GFX11-NEXT: s_cbranch_vccnz .LBB95_4 ; GFX11-NEXT: .LBB95_2: ; %cmp.true +; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s23 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s22 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s21 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s20 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v28, 0x200, s19 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s27 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s26 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v27, 0x200, s18 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v30, 0x200, s17 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v29, 0x200, s16 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s25 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s24 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s41 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s40 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v10, 0x200, s13 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v9, 0x200, s12 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v6, 0x200, s9 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v5, 0x200, s8 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v34, 0x200, s3 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v33, 0x200, s2 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v22, 0x200, s23 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v21, 0x200, s22 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v30, 0x200, s17 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v29, 0x200, s16 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v18, 0x200, s27 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v17, 0x200, s26 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v16, 0x200, s29 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v15, 0x200, s28 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v14, 0x200, s41 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v13, 0x200, s40 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v12, 0x200, s15 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v11, 0x200, s14 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v8, 0x200, s11 op_sel_hi:[0,1] @@ -185752,104 +185967,106 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX11-NEXT: v_pk_add_f16 v1, 0x200, s4 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v36, 0x200, s1 op_sel_hi:[0,1] ; GFX11-NEXT: v_pk_add_f16 v35, 0x200, s0 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v24, 0x200, s21 op_sel_hi:[0,1] -; GFX11-NEXT: v_pk_add_f16 v23, 0x200, s20 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v34, 0x200, s3 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v33, 0x200, s2 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v20, 0x200, s25 op_sel_hi:[0,1] +; GFX11-NEXT: v_pk_add_f16 v19, 0x200, s24 op_sel_hi:[0,1] +; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[21:22] +; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[23:24] +; GFX11-NEXT: v_lshrrev_b64 v[68:69], 24, v[27:28] ; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18] -; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[27:28] -; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20] -; GFX11-NEXT: v_lshrrev_b64 v[65:66], 24, v[29:30] -; GFX11-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22] -; GFX11-NEXT: v_lshrrev_b64 v[69:70], 24, v[33:34] +; GFX11-NEXT: v_lshrrev_b64 v[69:70], 24, v[29:30] ; GFX11-NEXT: v_lshrrev_b64 v[37:38], 24, v[5:6] ; GFX11-NEXT: v_lshrrev_b64 v[48:49], 24, v[9:10] -; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[13:14] -; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] -; GFX11-NEXT: v_lshrrev_b64 v[70:71], 24, v[35:36] +; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20] +; GFX11-NEXT: v_lshrrev_b64 v[70:71], 24, v[33:34] +; GFX11-NEXT: v_lshrrev_b64 v[80:81], 24, v[35:36] ; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[1:2] ; GFX11-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4] ; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[7:8] ; GFX11-NEXT: v_lshrrev_b64 v[49:50], 24, v[11:12] -; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[15:16] -; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v147, 16, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v146, 8, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v160, 16, v17 -; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v17 -; GFX11-NEXT: v_lshrrev_b32_e32 v162, 24, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v161, 16, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v163, 16, v19 -; GFX11-NEXT: v_lshrrev_b32_e32 v151, 8, v19 -; GFX11-NEXT: v_lshrrev_b32_e32 v166, 24, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v165, 16, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v164, 8, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v21 -; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v21 -; GFX11-NEXT: v_lshrrev_b32_e32 v180, 24, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v23 -; GFX11-NEXT: v_lshrrev_b32_e32 v177, 8, v23 -; GFX11-NEXT: v_lshrrev_b32_e32 v42, 24, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v41, 16, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v27 -; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v27 -; GFX11-NEXT: v_lshrrev_b32_e32 v46, 24, v30 -; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v30 -; GFX11-NEXT: v_lshrrev_b32_e32 v40, 8, v30 -; GFX11-NEXT: v_lshrrev_b32_e32 v47, 16, v29 -; GFX11-NEXT: v_lshrrev_b32_e32 v45, 8, v29 -; GFX11-NEXT: v_lshrrev_b32_e32 v59, 24, v34 -; GFX11-NEXT: v_lshrrev_b32_e32 v58, 16, v34 -; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v34 +; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[13:14] +; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[15:16] +; GFX11-NEXT: v_lshrrev_b32_e32 v147, 24, v18 +; GFX11-NEXT: v_lshrrev_b32_e32 v146, 16, v18 +; GFX11-NEXT: v_lshrrev_b32_e32 v145, 8, v18 +; GFX11-NEXT: v_lshrrev_b32_e32 v151, 16, v17 +; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v17 +; GFX11-NEXT: v_lshrrev_b32_e32 v161, 24, v20 +; GFX11-NEXT: v_lshrrev_b32_e32 v160, 16, v20 +; GFX11-NEXT: v_lshrrev_b32_e32 v148, 8, v20 +; GFX11-NEXT: v_lshrrev_b32_e32 v162, 16, v19 +; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v19 +; GFX11-NEXT: v_lshrrev_b32_e32 v165, 24, v22 +; GFX11-NEXT: v_lshrrev_b32_e32 v164, 16, v22 +; GFX11-NEXT: v_lshrrev_b32_e32 v163, 8, v22 +; GFX11-NEXT: v_lshrrev_b32_e32 v177, 16, v21 +; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v21 +; GFX11-NEXT: v_lshrrev_b32_e32 v179, 24, v24 +; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v24 +; GFX11-NEXT: v_lshrrev_b32_e32 v166, 8, v24 +; GFX11-NEXT: v_lshrrev_b32_e32 v180, 16, v23 +; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v23 +; GFX11-NEXT: v_lshrrev_b32_e32 v41, 24, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v40, 16, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v42, 16, v27 +; GFX11-NEXT: v_lshrrev_b32_e32 v181, 8, v27 +; GFX11-NEXT: v_lshrrev_b32_e32 v45, 24, v30 +; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v30 +; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v30 +; GFX11-NEXT: v_lshrrev_b32_e32 v46, 16, v29 +; GFX11-NEXT: v_lshrrev_b32_e32 v44, 8, v29 +; GFX11-NEXT: v_lshrrev_b32_e32 v58, 24, v34 +; GFX11-NEXT: v_lshrrev_b32_e32 v57, 16, v34 +; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v34 ; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v33 -; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v33 -; GFX11-NEXT: v_lshrrev_b32_e32 v72, 24, v36 -; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v36 -; GFX11-NEXT: v_lshrrev_b32_e32 v61, 8, v36 -; GFX11-NEXT: v_lshrrev_b32_e32 v73, 16, v35 -; GFX11-NEXT: v_lshrrev_b32_e32 v63, 8, v35 +; GFX11-NEXT: v_lshrrev_b32_e32 v47, 8, v33 +; GFX11-NEXT: v_lshrrev_b32_e32 v63, 24, v36 +; GFX11-NEXT: v_lshrrev_b32_e32 v61, 16, v36 +; GFX11-NEXT: v_lshrrev_b32_e32 v59, 8, v36 +; GFX11-NEXT: v_lshrrev_b32_e32 v72, 16, v35 +; GFX11-NEXT: v_lshrrev_b32_e32 v62, 8, v35 ; GFX11-NEXT: v_lshrrev_b32_e32 v50, 24, v2 ; GFX11-NEXT: v_lshrrev_b32_e32 v39, 16, v2 ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v2 -; GFX11-NEXT: v_lshrrev_b32_e32 v71, 16, v1 +; GFX11-NEXT: v_lshrrev_b32_e32 v55, 16, v1 ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 8, v1 -; GFX11-NEXT: v_lshrrev_b32_e32 v81, 24, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v55, 8, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v3 -; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v3 -; GFX11-NEXT: v_lshrrev_b32_e32 v86, 24, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v85, 16, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v83, 8, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v97, 16, v5 -; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v5 -; GFX11-NEXT: v_lshrrev_b32_e32 v100, 24, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v99, 16, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v96, 8, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v101, 16, v7 -; GFX11-NEXT: v_lshrrev_b32_e32 v98, 8, v7 -; GFX11-NEXT: v_lshrrev_b32_e32 v112, 24, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v103, 16, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v102, 8, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v115, 16, v9 -; GFX11-NEXT: v_lshrrev_b32_e32 v113, 8, v9 -; GFX11-NEXT: v_lshrrev_b32_e32 v118, 24, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v117, 16, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v114, 8, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v119, 16, v11 -; GFX11-NEXT: v_lshrrev_b32_e32 v116, 8, v11 -; GFX11-NEXT: v_lshrrev_b32_e32 v130, 24, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v129, 16, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v128, 8, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v133, 16, v13 -; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v13 -; GFX11-NEXT: v_lshrrev_b32_e32 v144, 24, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v135, 16, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v15 -; GFX11-NEXT: v_lshrrev_b32_e32 v134, 8, v15 +; GFX11-NEXT: v_lshrrev_b32_e32 v71, 24, v4 +; GFX11-NEXT: v_lshrrev_b32_e32 v65, 16, v4 +; GFX11-NEXT: v_lshrrev_b32_e32 v53, 8, v4 +; GFX11-NEXT: v_lshrrev_b32_e32 v83, 16, v3 +; GFX11-NEXT: v_lshrrev_b32_e32 v81, 8, v3 +; GFX11-NEXT: v_lshrrev_b32_e32 v85, 24, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v96, 16, v5 +; GFX11-NEXT: v_lshrrev_b32_e32 v86, 8, v5 +; GFX11-NEXT: v_lshrrev_b32_e32 v99, 24, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v98, 16, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v100, 16, v7 +; GFX11-NEXT: v_lshrrev_b32_e32 v97, 8, v7 +; GFX11-NEXT: v_lshrrev_b32_e32 v103, 24, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v102, 16, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v101, 8, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v114, 16, v9 +; GFX11-NEXT: v_lshrrev_b32_e32 v112, 8, v9 +; GFX11-NEXT: v_lshrrev_b32_e32 v117, 24, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v116, 16, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v113, 8, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v118, 16, v11 +; GFX11-NEXT: v_lshrrev_b32_e32 v115, 8, v11 +; GFX11-NEXT: v_lshrrev_b32_e32 v129, 24, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v128, 16, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v119, 8, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v132, 16, v13 +; GFX11-NEXT: v_lshrrev_b32_e32 v130, 8, v13 +; GFX11-NEXT: v_lshrrev_b32_e32 v135, 24, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v134, 16, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v144, 16, v15 +; GFX11-NEXT: v_lshrrev_b32_e32 v133, 8, v15 ; GFX11-NEXT: s_branch .LBB95_5 ; GFX11-NEXT: .LBB95_3: ; GFX11-NEXT: ; implicit-def: $sgpr43 @@ -185871,55 +186088,55 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX11-NEXT: ; implicit-def: $sgpr58 ; GFX11-NEXT: ; implicit-def: $sgpr60 ; GFX11-NEXT: ; implicit-def: $sgpr62 +; GFX11-NEXT: ; implicit-def: $sgpr72 ; GFX11-NEXT: ; implicit-def: $sgpr104 ; GFX11-NEXT: ; implicit-def: $sgpr102 +; GFX11-NEXT: ; implicit-def: $sgpr74 ; GFX11-NEXT: ; implicit-def: $sgpr103 ; GFX11-NEXT: ; implicit-def: $sgpr101 ; GFX11-NEXT: ; implicit-def: $sgpr100 ; GFX11-NEXT: ; implicit-def: $sgpr99 ; GFX11-NEXT: ; implicit-def: $sgpr97 +; GFX11-NEXT: ; implicit-def: $sgpr76 ; GFX11-NEXT: ; implicit-def: $sgpr98 ; GFX11-NEXT: ; implicit-def: $sgpr96 ; GFX11-NEXT: ; implicit-def: $sgpr87 ; GFX11-NEXT: ; implicit-def: $sgpr86 ; GFX11-NEXT: ; implicit-def: $sgpr84 +; GFX11-NEXT: ; implicit-def: $sgpr78 ; GFX11-NEXT: ; implicit-def: $sgpr85 ; GFX11-NEXT: ; implicit-def: $sgpr83 ; GFX11-NEXT: ; implicit-def: $sgpr82 ; GFX11-NEXT: ; implicit-def: $sgpr81 ; GFX11-NEXT: ; implicit-def: $sgpr71 +; GFX11-NEXT: ; implicit-def: $sgpr88 ; GFX11-NEXT: ; implicit-def: $sgpr80 ; GFX11-NEXT: ; implicit-def: $sgpr70 ; GFX11-NEXT: ; implicit-def: $sgpr69 ; GFX11-NEXT: ; implicit-def: $sgpr68 ; GFX11-NEXT: ; implicit-def: $sgpr66 +; GFX11-NEXT: ; implicit-def: $sgpr90 ; GFX11-NEXT: ; implicit-def: $sgpr67 ; GFX11-NEXT: ; implicit-def: $sgpr65 ; GFX11-NEXT: ; implicit-def: $sgpr64 ; GFX11-NEXT: ; implicit-def: $sgpr55 ; GFX11-NEXT: ; implicit-def: $sgpr53 +; GFX11-NEXT: ; implicit-def: $sgpr92 ; GFX11-NEXT: ; implicit-def: $sgpr54 ; GFX11-NEXT: ; implicit-def: $sgpr52 ; GFX11-NEXT: ; implicit-def: $sgpr51 ; GFX11-NEXT: ; implicit-def: $sgpr50 ; GFX11-NEXT: ; implicit-def: $sgpr48 +; GFX11-NEXT: ; implicit-def: $sgpr94 ; GFX11-NEXT: ; implicit-def: $sgpr49 ; GFX11-NEXT: ; implicit-def: $sgpr39 ; GFX11-NEXT: ; implicit-def: $sgpr38 ; GFX11-NEXT: ; implicit-def: $sgpr37 ; GFX11-NEXT: ; implicit-def: $sgpr35 +; GFX11-NEXT: ; implicit-def: $sgpr30 ; GFX11-NEXT: ; implicit-def: $sgpr36 ; GFX11-NEXT: ; implicit-def: $sgpr34 ; GFX11-NEXT: ; implicit-def: $vcc_hi -; GFX11-NEXT: ; implicit-def: $sgpr72 -; GFX11-NEXT: ; implicit-def: $sgpr30 -; GFX11-NEXT: ; implicit-def: $sgpr94 -; GFX11-NEXT: ; implicit-def: $sgpr92 -; GFX11-NEXT: ; implicit-def: $sgpr90 -; GFX11-NEXT: ; implicit-def: $sgpr88 -; GFX11-NEXT: ; implicit-def: $sgpr78 -; GFX11-NEXT: ; implicit-def: $sgpr76 -; GFX11-NEXT: ; implicit-def: $sgpr74 ; GFX11-NEXT: ; implicit-def: $sgpr43 ; GFX11-NEXT: ; kill: killed $sgpr43 ; GFX11-NEXT: ; implicit-def: $sgpr43 @@ -185991,272 +186208,273 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX11-NEXT: s_branch .LBB95_2 ; GFX11-NEXT: .LBB95_4: ; GFX11-NEXT: v_dual_mov_b32 v35, s0 :: v_dual_mov_b32 v36, s1 -; GFX11-NEXT: v_readlane_b32 s0, v76, 0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 0 +; GFX11-NEXT: v_mov_b32_e32 v55, s35 ; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29 ; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v63, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 1 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) +; GFX11-NEXT: v_mov_b32_e32 v62, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 1 +; GFX11-NEXT: v_mov_b32_e32 v39, s34 ; GFX11-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15 ; GFX11-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13 -; GFX11-NEXT: v_mov_b32_e32 v73, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 2 +; GFX11-NEXT: v_mov_b32_e32 v72, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 2 ; GFX11-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11 ; GFX11-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v61, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 3 +; GFX11-NEXT: v_mov_b32_e32 v59, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 3 ; GFX11-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7 ; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5 -; GFX11-NEXT: v_mov_b32_e32 v62, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 4 +; GFX11-NEXT: v_mov_b32_e32 v61, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 4 ; GFX11-NEXT: v_dual_mov_b32 v33, s2 :: v_dual_mov_b32 v34, s3 ; GFX11-NEXT: v_dual_mov_b32 v29, s16 :: v_dual_mov_b32 v30, s17 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v72, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 5 +; GFX11-NEXT: v_mov_b32_e32 v63, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 5 ; GFX11-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19 ; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21 -; GFX11-NEXT: v_mov_b32_e32 v56, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 6 +; GFX11-NEXT: v_mov_b32_e32 v47, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 6 ; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23 ; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX11-NEXT: v_mov_b32_e32 v60, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 7 +; GFX11-NEXT: v_readlane_b32 s0, v75, 7 ; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27 -; GFX11-NEXT: v_dual_mov_b32 v134, s104 :: v_dual_mov_b32 v145, s102 -; GFX11-NEXT: v_mov_b32_e32 v57, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 8 -; GFX11-NEXT: v_dual_mov_b32 v132, s103 :: v_dual_mov_b32 v135, s101 -; GFX11-NEXT: v_dual_mov_b32 v144, s100 :: v_dual_mov_b32 v131, s99 +; GFX11-NEXT: v_dual_mov_b32 v133, s104 :: v_dual_mov_b32 v144, s102 +; GFX11-NEXT: v_mov_b32_e32 v56, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 8 +; GFX11-NEXT: v_dual_mov_b32 v131, s103 :: v_dual_mov_b32 v134, s101 +; GFX11-NEXT: v_dual_mov_b32 v135, s100 :: v_dual_mov_b32 v130, s99 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mov_b32_e32 v57, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 9 +; GFX11-NEXT: v_dual_mov_b32 v132, s97 :: v_dual_mov_b32 v119, s98 +; GFX11-NEXT: v_dual_mov_b32 v128, s96 :: v_dual_mov_b32 v129, s87 ; GFX11-NEXT: v_mov_b32_e32 v58, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 9 -; GFX11-NEXT: v_dual_mov_b32 v133, s97 :: v_dual_mov_b32 v128, s98 -; GFX11-NEXT: v_dual_mov_b32 v129, s96 :: v_dual_mov_b32 v130, s87 -; GFX11-NEXT: v_mov_b32_e32 v59, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 10 -; GFX11-NEXT: v_dual_mov_b32 v116, s86 :: v_dual_mov_b32 v119, s84 -; GFX11-NEXT: v_dual_mov_b32 v114, s85 :: v_dual_mov_b32 v117, s83 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v45, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 11 -; GFX11-NEXT: v_dual_mov_b32 v118, s82 :: v_dual_mov_b32 v113, s81 -; GFX11-NEXT: v_dual_mov_b32 v115, s71 :: v_dual_mov_b32 v102, s80 -; GFX11-NEXT: v_mov_b32_e32 v47, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 12 -; GFX11-NEXT: v_dual_mov_b32 v103, s70 :: v_dual_mov_b32 v112, s69 -; GFX11-NEXT: v_dual_mov_b32 v98, s68 :: v_dual_mov_b32 v101, s66 +; GFX11-NEXT: v_readlane_b32 s0, v75, 10 +; GFX11-NEXT: v_dual_mov_b32 v115, s86 :: v_dual_mov_b32 v118, s84 +; GFX11-NEXT: v_dual_mov_b32 v113, s85 :: v_dual_mov_b32 v116, s83 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v40, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 13 -; GFX11-NEXT: v_dual_mov_b32 v96, s67 :: v_dual_mov_b32 v99, s65 -; GFX11-NEXT: v_dual_mov_b32 v100, s64 :: v_dual_mov_b32 v87, s55 ; GFX11-NEXT: v_mov_b32_e32 v44, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 14 -; GFX11-NEXT: v_dual_mov_b32 v97, s53 :: v_dual_mov_b32 v86, s51 -; GFX11-NEXT: v_dual_mov_b32 v83, s54 :: v_dual_mov_b32 v82, s50 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_readlane_b32 s0, v75, 11 +; GFX11-NEXT: v_dual_mov_b32 v117, s82 :: v_dual_mov_b32 v112, s81 +; GFX11-NEXT: v_dual_mov_b32 v114, s71 :: v_dual_mov_b32 v101, s80 ; GFX11-NEXT: v_mov_b32_e32 v46, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 15 -; GFX11-NEXT: v_dual_mov_b32 v85, s52 :: v_dual_mov_b32 v84, s48 -; GFX11-NEXT: v_dual_mov_b32 v55, s49 :: v_dual_mov_b32 v80, s39 -; GFX11-NEXT: v_mov_b32_e32 v182, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 16 -; GFX11-NEXT: v_dual_mov_b32 v81, s38 :: v_dual_mov_b32 v32, s37 -; GFX11-NEXT: v_dual_mov_b32 v71, s35 :: v_dual_mov_b32 v26, s36 +; GFX11-NEXT: v_readlane_b32 s0, v75, 12 +; GFX11-NEXT: v_dual_mov_b32 v102, s70 :: v_dual_mov_b32 v103, s69 +; GFX11-NEXT: v_dual_mov_b32 v97, s68 :: v_dual_mov_b32 v100, s66 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v43, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 17 -; GFX11-NEXT: v_dual_mov_b32 v39, s34 :: v_dual_mov_b32 v50, vcc_hi -; GFX11-NEXT: v_dual_mov_b32 v51, s72 :: v_dual_mov_b32 v52, s62 ; GFX11-NEXT: v_mov_b32_e32 v183, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 18 -; GFX11-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v54, s58 -; GFX11-NEXT: v_dual_mov_b32 v64, s56 :: v_dual_mov_b32 v65, s46 +; GFX11-NEXT: v_readlane_b32 s0, v75, 13 +; GFX11-NEXT: v_dual_mov_b32 v87, s67 :: v_dual_mov_b32 v98, s65 +; GFX11-NEXT: v_dual_mov_b32 v99, s64 :: v_dual_mov_b32 v86, s55 +; GFX11-NEXT: v_mov_b32_e32 v43, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 14 +; GFX11-NEXT: v_dual_mov_b32 v96, s53 :: v_dual_mov_b32 v85, s51 +; GFX11-NEXT: v_dual_mov_b32 v82, s54 :: v_dual_mov_b32 v81, s50 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mov_b32_e32 v45, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 15 +; GFX11-NEXT: v_dual_mov_b32 v84, s52 :: v_dual_mov_b32 v83, s48 +; GFX11-NEXT: v_dual_mov_b32 v53, s49 :: v_dual_mov_b32 v32, s37 +; GFX11-NEXT: v_mov_b32_e32 v181, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 16 +; GFX11-NEXT: v_dual_mov_b32 v65, s39 :: v_dual_mov_b32 v26, s36 +; GFX11-NEXT: v_dual_mov_b32 v71, s38 :: v_dual_mov_b32 v50, vcc_hi ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v41, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 19 -; GFX11-NEXT: v_dual_mov_b32 v69, s44 :: v_dual_mov_b32 v70, s42 -; GFX11-NEXT: v_dual_mov_b32 v25, s74 :: v_dual_mov_b32 v38, s88 ; GFX11-NEXT: v_mov_b32_e32 v42, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 20 -; GFX11-NEXT: v_dual_mov_b32 v31, s76 :: v_dual_mov_b32 v48, s90 -; GFX11-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v66, s94 +; GFX11-NEXT: v_readlane_b32 s0, v75, 17 +; GFX11-NEXT: v_dual_mov_b32 v51, s72 :: v_dual_mov_b32 v68, s56 +; GFX11-NEXT: v_dual_mov_b32 v67, s58 :: v_dual_mov_b32 v70, s44 +; GFX11-NEXT: v_mov_b32_e32 v182, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 18 +; GFX11-NEXT: v_dual_mov_b32 v69, s46 :: v_dual_mov_b32 v80, s42 +; GFX11-NEXT: v_dual_mov_b32 v25, s30 :: v_dual_mov_b32 v38, s90 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v177, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 21 -; GFX11-NEXT: v_mov_b32_e32 v49, s92 -; GFX11-NEXT: v_mov_b32_e32 v67, s30 -; GFX11-NEXT: v_mov_b32_e32 v181, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 22 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v167, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 23 -; GFX11-NEXT: v_mov_b32_e32 v179, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 24 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v180, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 25 +; GFX11-NEXT: v_mov_b32_e32 v40, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 19 +; GFX11-NEXT: v_dual_mov_b32 v31, s94 :: v_dual_mov_b32 v48, s88 +; GFX11-NEXT: v_dual_mov_b32 v37, s92 :: v_dual_mov_b32 v52, s76 +; GFX11-NEXT: v_mov_b32_e32 v41, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 20 +; GFX11-NEXT: v_dual_mov_b32 v49, s78 :: v_dual_mov_b32 v64, s74 +; GFX11-NEXT: v_mov_b32_e32 v54, s62 +; GFX11-NEXT: v_mov_b32_e32 v66, s60 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX11-NEXT: v_mov_b32_e32 v176, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 26 +; GFX11-NEXT: v_readlane_b32 s0, v75, 21 +; GFX11-NEXT: v_mov_b32_e32 v180, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 22 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v166, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 23 ; GFX11-NEXT: v_mov_b32_e32 v178, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 27 -; GFX11-NEXT: v_mov_b32_e32 v164, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 28 +; GFX11-NEXT: v_readlane_b32 s0, v75, 24 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v165, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 29 -; GFX11-NEXT: v_mov_b32_e32 v166, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 30 +; GFX11-NEXT: v_mov_b32_e32 v179, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 25 +; GFX11-NEXT: v_mov_b32_e32 v167, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 26 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v151, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 31 +; GFX11-NEXT: v_mov_b32_e32 v177, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 27 ; GFX11-NEXT: v_mov_b32_e32 v163, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 28 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v149, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 1 -; GFX11-NEXT: v_mov_b32_e32 v161, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 2 +; GFX11-NEXT: v_mov_b32_e32 v164, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 29 +; GFX11-NEXT: v_mov_b32_e32 v165, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 30 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v162, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 3 ; GFX11-NEXT: v_mov_b32_e32 v150, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 4 +; GFX11-NEXT: v_readlane_b32 s0, v75, 31 +; GFX11-NEXT: v_mov_b32_e32 v162, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 0 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v148, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 1 ; GFX11-NEXT: v_mov_b32_e32 v160, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 5 -; GFX11-NEXT: v_mov_b32_e32 v146, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 6 +; GFX11-NEXT: v_readlane_b32 s0, v76, 2 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v161, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 3 +; GFX11-NEXT: v_mov_b32_e32 v149, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 4 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v151, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 5 +; GFX11-NEXT: v_mov_b32_e32 v145, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 6 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v146, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 7 ; GFX11-NEXT: v_mov_b32_e32 v147, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 7 -; GFX11-NEXT: v_mov_b32_e32 v148, s0 ; GFX11-NEXT: .LBB95_5: ; %end -; GFX11-NEXT: v_perm_b32 v68, v73, v70, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v70, v62, v72, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v69, v60, v69, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v80, v72, v80, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v70, v60, v70, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v69, v46, v69, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v68, v42, v68, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v35, v35, v62, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v80, 16, v80 +; GFX11-NEXT: v_perm_b32 v47, v33, v47, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70 -; GFX11-NEXT: v_perm_b32 v35, v35, v63, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68 -; GFX11-NEXT: v_perm_b32 v56, v33, v56, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v61, v61, v63, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v57, v57, v58, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v29, v29, v44, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69 -; GFX11-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v57, v34, v57, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v34, v36, v70 -; GFX11-NEXT: v_perm_b32 v29, v29, v45, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v65, 16, v65 -; GFX11-NEXT: v_perm_b32 v70, v27, v182, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64 -; GFX11-NEXT: v_or_b32_e32 v33, v35, v68 -; GFX11-NEXT: v_or_b32_e32 v35, v56, v69 -; GFX11-NEXT: v_perm_b32 v68, v44, v46, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v69, v41, v42, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v58 -; GFX11-NEXT: v_or_b32_e32 v27, v29, v65 -; GFX11-NEXT: v_or_b32_e32 v29, v70, v64 -; GFX11-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v53, v178, v53, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v30, v30, v40, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v181, v27, v181, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68 -; GFX11-NEXT: v_perm_b32 v182, v28, v183, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69 -; GFX11-NEXT: v_or_b32_e32 v36, v57, v58 -; GFX11-NEXT: v_perm_b32 v23, v23, v177, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v54, 16, v54 -; GFX11-NEXT: v_perm_b32 v24, v24, v167, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64 -; GFX11-NEXT: v_perm_b32 v21, v21, v176, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v53, 16, v53 -; GFX11-NEXT: v_or_b32_e32 v28, v30, v68 -; GFX11-NEXT: v_or_b32_e32 v30, v182, v69 +; GFX11-NEXT: v_or_b32_e32 v33, v35, v80 +; GFX11-NEXT: v_or_b32_e32 v35, v47, v70 +; GFX11-NEXT: v_perm_b32 v70, v43, v45, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v80, v40, v41, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v36, v36, v59, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v61 +; GFX11-NEXT: v_perm_b32 v56, v34, v56, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v57, 16, v57 +; GFX11-NEXT: v_or_b32_e32 v27, v29, v69 +; GFX11-NEXT: v_or_b32_e32 v29, v181, v68 +; GFX11-NEXT: v_perm_b32 v67, v180, v67, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v68, v178, v179, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v66, v177, v66, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v30, v30, v183, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70 +; GFX11-NEXT: v_perm_b32 v182, v28, v182, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v80, 16, v80 +; GFX11-NEXT: v_or_b32_e32 v34, v36, v58 +; GFX11-NEXT: v_or_b32_e32 v36, v56, v57 +; GFX11-NEXT: v_perm_b32 v23, v23, v176, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67 +; GFX11-NEXT: v_perm_b32 v24, v24, v166, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68 +; GFX11-NEXT: v_perm_b32 v21, v21, v167, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v66, 16, v66 +; GFX11-NEXT: v_or_b32_e32 v28, v30, v70 +; GFX11-NEXT: v_or_b32_e32 v30, v182, v80 ; GFX11-NEXT: s_clause 0x1 ; GFX11-NEXT: scratch_store_b128 v0, v[33:36], off ; GFX11-NEXT: scratch_store_b128 v0, v[27:30], off offset:16 -; GFX11-NEXT: v_or_b32_e32 v27, v23, v54 -; GFX11-NEXT: v_perm_b32 v23, v165, v166, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v28, v24, v64 -; GFX11-NEXT: v_or_b32_e32 v29, v21, v53 -; GFX11-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v161, v162, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v30, v160, v51, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v27, v23, v67 +; GFX11-NEXT: v_perm_b32 v23, v164, v165, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v28, v24, v68 +; GFX11-NEXT: v_or_b32_e32 v29, v21, v66 +; GFX11-NEXT: v_perm_b32 v21, v22, v163, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v22, v162, v54, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v24, v160, v161, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v30, v151, v51, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; GFX11-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v19, v19, v150, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; GFX11-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v20, v20, v148, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; GFX11-NEXT: v_perm_b32 v17, v17, v150, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v17, v17, v149, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v33, 16, v30 ; GFX11-NEXT: v_or_b32_e32 v30, v21, v23 ; GFX11-NEXT: v_or_b32_e32 v19, v19, v22 -; GFX11-NEXT: v_perm_b32 v22, v147, v148, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v22, v146, v147, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v20, v20, v24 ; GFX11-NEXT: v_or_b32_e32 v21, v17, v33 -; GFX11-NEXT: v_perm_b32 v17, v18, v146, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v18, v145, v67, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v133, v66, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v23, v135, v144, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v17, v18, v145, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v18, v144, v64, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v24, v132, v52, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v23, v134, v135, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; GFX11-NEXT: v_perm_b32 v15, v15, v134, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v15, v15, v133, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-NEXT: v_perm_b32 v13, v13, v131, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v13, v13, v130, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; GFX11-NEXT: v_perm_b32 v16, v16, v132, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v16, v16, v131, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; GFX11-NEXT: v_or_b32_e32 v22, v17, v22 ; GFX11-NEXT: v_or_b32_e32 v15, v15, v18 -; GFX11-NEXT: v_perm_b32 v18, v129, v130, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v18, v128, v129, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v17, v13, v24 -; GFX11-NEXT: v_perm_b32 v24, v115, v48, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v24, v114, v48, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v16, v16, v23 -; GFX11-NEXT: v_perm_b32 v13, v14, v128, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v14, v119, v49, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v23, v117, v118, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v13, v14, v119, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v14, v118, v49, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v23, v116, v117, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-NEXT: v_perm_b32 v9, v9, v113, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v9, v9, v112, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; GFX11-NEXT: v_perm_b32 v11, v11, v116, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v11, v11, v115, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-NEXT: v_perm_b32 v12, v12, v114, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v12, v12, v113, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; GFX11-NEXT: v_or_b32_e32 v18, v13, v18 ; GFX11-NEXT: v_or_b32_e32 v13, v9, v24 -; GFX11-NEXT: v_perm_b32 v9, v10, v102, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v10, v101, v38, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v9, v10, v101, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v10, v100, v38, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v11, v11, v14 -; GFX11-NEXT: v_perm_b32 v14, v103, v112, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v14, v102, v103, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v12, v12, v23 -; GFX11-NEXT: v_perm_b32 v23, v99, v100, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v97, v37, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v7, v7, v98, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v23, v98, v99, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v24, v96, v37, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v7, v7, v97, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-NEXT: v_perm_b32 v8, v8, v96, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v8, v8, v87, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; GFX11-NEXT: v_perm_b32 v5, v5, v87, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v5, v5, v86, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; GFX11-NEXT: v_or_b32_e32 v7, v7, v10 -; GFX11-NEXT: v_perm_b32 v10, v85, v86, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v10, v84, v85, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v14, v9, v14 ; GFX11-NEXT: v_or_b32_e32 v8, v8, v23 ; GFX11-NEXT: v_or_b32_e32 v9, v5, v24 -; GFX11-NEXT: v_perm_b32 v5, v84, v31, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v23, v80, v81, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v71, v25, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v5, v83, v31, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v23, v65, v71, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v24, v55, v25, 0xc0c0004 ; GFX11-NEXT: v_perm_b32 v25, v39, v50, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v6, v6, v83, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v6, v6, v82, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; GFX11-NEXT: v_perm_b32 v3, v3, v82, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v3, v3, v81, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v4, v4, v53, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; GFX11-NEXT: v_perm_b32 v31, v1, v32, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 @@ -186274,72 +186492,71 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i ; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:80 ; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off offset:96 ; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:112 -; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Reload -; GFX11-NEXT: scratch_load_b32 v73, off, s32 -; GFX11-NEXT: scratch_load_b32 v72, off, s32 offset:4 -; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:8 -; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:12 -; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:16 -; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:20 -; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:24 -; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:28 -; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:32 -; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:36 -; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:40 -; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:44 -; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:48 -; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:52 -; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:56 -; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:60 -; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:64 -; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:68 -; GFX11-NEXT: v_readlane_b32 s30, v75, 7 -; GFX11-NEXT: v_readlane_b32 s31, v75, 8 -; GFX11-NEXT: v_readlane_b32 s104, v75, 6 -; GFX11-NEXT: v_readlane_b32 s103, v75, 5 -; GFX11-NEXT: v_readlane_b32 s102, v75, 4 -; GFX11-NEXT: v_readlane_b32 s101, v75, 3 -; GFX11-NEXT: v_readlane_b32 s100, v75, 2 -; GFX11-NEXT: v_readlane_b32 s99, v75, 1 -; GFX11-NEXT: v_readlane_b32 s98, v75, 0 -; GFX11-NEXT: v_readlane_b32 s97, v74, 31 -; GFX11-NEXT: v_readlane_b32 s96, v74, 30 -; GFX11-NEXT: v_readlane_b32 s87, v74, 29 -; GFX11-NEXT: v_readlane_b32 s86, v74, 28 -; GFX11-NEXT: v_readlane_b32 s85, v74, 27 -; GFX11-NEXT: v_readlane_b32 s84, v74, 26 -; GFX11-NEXT: v_readlane_b32 s83, v74, 25 -; GFX11-NEXT: v_readlane_b32 s82, v74, 24 -; GFX11-NEXT: v_readlane_b32 s81, v74, 23 -; GFX11-NEXT: v_readlane_b32 s80, v74, 22 -; GFX11-NEXT: v_readlane_b32 s71, v74, 21 -; GFX11-NEXT: v_readlane_b32 s70, v74, 20 -; GFX11-NEXT: v_readlane_b32 s69, v74, 19 -; GFX11-NEXT: v_readlane_b32 s68, v74, 18 -; GFX11-NEXT: v_readlane_b32 s67, v74, 17 -; GFX11-NEXT: v_readlane_b32 s66, v74, 16 -; GFX11-NEXT: v_readlane_b32 s65, v74, 15 -; GFX11-NEXT: v_readlane_b32 s64, v74, 14 -; GFX11-NEXT: v_readlane_b32 s55, v74, 13 -; GFX11-NEXT: v_readlane_b32 s54, v74, 12 -; GFX11-NEXT: v_readlane_b32 s53, v74, 11 -; GFX11-NEXT: v_readlane_b32 s52, v74, 10 -; GFX11-NEXT: v_readlane_b32 s51, v74, 9 -; GFX11-NEXT: v_readlane_b32 s50, v74, 8 -; GFX11-NEXT: v_readlane_b32 s49, v74, 7 -; GFX11-NEXT: v_readlane_b32 s48, v74, 6 -; GFX11-NEXT: v_readlane_b32 s39, v74, 5 -; GFX11-NEXT: v_readlane_b32 s38, v74, 4 -; GFX11-NEXT: v_readlane_b32 s37, v74, 3 -; GFX11-NEXT: v_readlane_b32 s36, v74, 2 -; GFX11-NEXT: v_readlane_b32 s35, v74, 1 -; GFX11-NEXT: v_readlane_b32 s34, v74, 0 +; GFX11-NEXT: s_clause 0x10 ; 68-byte Folded Reload +; GFX11-NEXT: scratch_load_b32 v72, off, s32 +; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:4 +; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:8 +; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:12 +; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:16 +; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:20 +; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:24 +; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:28 +; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:32 +; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:36 +; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:40 +; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:44 +; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:48 +; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:52 +; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:56 +; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:60 +; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:64 +; GFX11-NEXT: v_readlane_b32 s30, v74, 7 +; GFX11-NEXT: v_readlane_b32 s31, v74, 8 +; GFX11-NEXT: v_readlane_b32 s104, v74, 6 +; GFX11-NEXT: v_readlane_b32 s103, v74, 5 +; GFX11-NEXT: v_readlane_b32 s102, v74, 4 +; GFX11-NEXT: v_readlane_b32 s101, v74, 3 +; GFX11-NEXT: v_readlane_b32 s100, v74, 2 +; GFX11-NEXT: v_readlane_b32 s99, v74, 1 +; GFX11-NEXT: v_readlane_b32 s98, v74, 0 +; GFX11-NEXT: v_readlane_b32 s97, v73, 31 +; GFX11-NEXT: v_readlane_b32 s96, v73, 30 +; GFX11-NEXT: v_readlane_b32 s87, v73, 29 +; GFX11-NEXT: v_readlane_b32 s86, v73, 28 +; GFX11-NEXT: v_readlane_b32 s85, v73, 27 +; GFX11-NEXT: v_readlane_b32 s84, v73, 26 +; GFX11-NEXT: v_readlane_b32 s83, v73, 25 +; GFX11-NEXT: v_readlane_b32 s82, v73, 24 +; GFX11-NEXT: v_readlane_b32 s81, v73, 23 +; GFX11-NEXT: v_readlane_b32 s80, v73, 22 +; GFX11-NEXT: v_readlane_b32 s71, v73, 21 +; GFX11-NEXT: v_readlane_b32 s70, v73, 20 +; GFX11-NEXT: v_readlane_b32 s69, v73, 19 +; GFX11-NEXT: v_readlane_b32 s68, v73, 18 +; GFX11-NEXT: v_readlane_b32 s67, v73, 17 +; GFX11-NEXT: v_readlane_b32 s66, v73, 16 +; GFX11-NEXT: v_readlane_b32 s65, v73, 15 +; GFX11-NEXT: v_readlane_b32 s64, v73, 14 +; GFX11-NEXT: v_readlane_b32 s55, v73, 13 +; GFX11-NEXT: v_readlane_b32 s54, v73, 12 +; GFX11-NEXT: v_readlane_b32 s53, v73, 11 +; GFX11-NEXT: v_readlane_b32 s52, v73, 10 +; GFX11-NEXT: v_readlane_b32 s51, v73, 9 +; GFX11-NEXT: v_readlane_b32 s50, v73, 8 +; GFX11-NEXT: v_readlane_b32 s49, v73, 7 +; GFX11-NEXT: v_readlane_b32 s48, v73, 6 +; GFX11-NEXT: v_readlane_b32 s39, v73, 5 +; GFX11-NEXT: v_readlane_b32 s38, v73, 4 +; GFX11-NEXT: v_readlane_b32 s37, v73, 3 +; GFX11-NEXT: v_readlane_b32 s36, v73, 2 +; GFX11-NEXT: v_readlane_b32 s35, v73, 1 +; GFX11-NEXT: v_readlane_b32 s34, v73, 0 ; GFX11-NEXT: s_or_saveexec_b32 s0, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-NEXT: scratch_load_b32 v73, off, s32 offset:68 ; GFX11-NEXT: scratch_load_b32 v74, off, s32 offset:72 ; GFX11-NEXT: scratch_load_b32 v75, off, s32 offset:76 ; GFX11-NEXT: scratch_load_b32 v76, off, s32 offset:80 -; GFX11-NEXT: scratch_load_b32 v77, off, s32 offset:84 ; GFX11-NEXT: s_mov_b32 exec_lo, s0 ; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_setpc_b64 s[30:31] @@ -188426,1254 +188643,1294 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 -; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:116 -; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:112 -; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:108 -; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:104 -; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:100 -; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:96 -; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:92 -; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:88 -; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:84 -; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:80 -; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:76 -; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:72 -; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:68 -; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:64 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:60 -; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:56 -; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:48 -; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:44 -; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:40 -; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:36 -; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:32 -; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:28 -; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:24 -; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:20 -; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:16 -; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:12 -; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:300 ; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:296 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:384 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:288 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:280 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:272 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:268 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 +; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:296 +; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:292 +; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:288 +; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:284 +; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:280 +; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:276 +; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:272 +; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:268 +; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:264 +; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:260 +; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:256 +; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:252 ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:384 +; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:380 +; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:376 +; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:372 +; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:368 +; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:364 +; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:360 +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:356 +; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:352 +; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:348 +; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:344 +; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:340 +; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:336 +; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:332 +; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:328 +; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:324 +; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:320 +; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:316 +; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:308 +; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:304 +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:380 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:376 -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:372 -; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:368 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:364 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:360 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:356 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:352 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:348 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:344 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:340 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:332 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:328 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:156 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:324 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:148 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:316 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:312 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:140 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:308 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:136 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:304 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:132 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:300 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:128 -; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:124 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:124 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:120 -; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:108 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:104 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:100 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:96 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:92 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:88 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:84 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:80 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:76 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:72 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:68 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:64 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:60 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:56 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:52 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:48 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:44 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:40 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:36 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:32 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:28 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:20 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:16 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:12 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:8 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB96_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b32 s6, 0xc0c0004 -; VI-NEXT: v_perm_b32 v10, v37, v36, s6 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_perm_b32 v11, v59, v34, s6 -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; VI-NEXT: v_perm_b32 v12, v57, v32, s6 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_perm_b32 v13, v47, v46, s6 -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_perm_b32 v14, v43, v42, s6 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; VI-NEXT: v_perm_b32 v15, v55, v54, s6 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: v_perm_b32 v16, v51, v50, s6 -; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr36 -; VI-NEXT: ; implicit-def: $vgpr59 -; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr57 -; VI-NEXT: ; implicit-def: $vgpr47 -; VI-NEXT: ; implicit-def: $vgpr46 -; VI-NEXT: ; implicit-def: $vgpr43 -; VI-NEXT: ; implicit-def: $vgpr42 -; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v25, v54, v51, s6 +; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; VI-NEXT: v_perm_b32 v26, v45, v44, s6 +; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; VI-NEXT: v_perm_b32 v28, v49, v38, s6 +; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; VI-NEXT: v_perm_b32 v29, v42, v40, s6 +; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; VI-NEXT: v_perm_b32 v30, v56, v46, s6 +; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; VI-NEXT: v_perm_b32 v31, v60, v58, s6 +; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr54 ; VI-NEXT: ; implicit-def: $vgpr51 -; VI-NEXT: ; implicit-def: $vgpr50 -; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: ; implicit-def: $vgpr45 +; VI-NEXT: ; implicit-def: $vgpr44 +; VI-NEXT: ; kill: killed $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr56 +; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr60 +; VI-NEXT: ; implicit-def: $vgpr58 +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v0, v1, v0, s6 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_perm_b32 v27, v32, v27, s6 +; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; VI-NEXT: v_perm_b32 v32, v63, v62, s6 +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; VI-NEXT: ; implicit-def: $vgpr63 +; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s6 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s6 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v2, v1, s6 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s6 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v3, v4, v3, s6 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v4, v5, v4, s6 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; VI-NEXT: v_or_b32_e32 v3, v3, v4 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v4, v5, v4, s6 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v5, v6, v5, s6 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_e32 v4, v4, v5 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v5, v6, v5, s6 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_e32 v5, v5, v6 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v6, v6, v7 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v7, v8, v7, s6 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v8, v8, v9, s6 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; VI-NEXT: v_perm_b32 v9, v39, v62, s6 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_perm_b32 v8, v38, v61, s6 +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v8, v9, v8, s6 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v9, v10, v9, s6 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 -; VI-NEXT: v_perm_b32 v9, v35, v60, s6 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v9, v10, v9, s6 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v10, v11, v10, s6 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 -; VI-NEXT: v_perm_b32 v10, v33, v58, s6 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v10, v11, v10, s6 +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v12, v11, s6 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; VI-NEXT: v_or_b32_e32 v10, v10, v11 -; VI-NEXT: v_perm_b32 v11, v63, v56, s6 +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v11, v12, v11, s6 +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v12, v13, v12, s6 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 -; VI-NEXT: v_perm_b32 v12, v45, v44, s6 +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v12, v13, v12, s6 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v13, v14, v13, s6 +; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; VI-NEXT: v_or_b32_e32 v12, v12, v13 -; VI-NEXT: v_perm_b32 v13, v41, v40, s6 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v13, v14, v13, s6 +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v14, v15, v14, s6 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: v_perm_b32 v14, v53, v52, s6 +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v14, v15, v14, s6 +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v15, v16, v15, s6 +; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_or_b32_e32 v14, v14, v15 -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; VI-NEXT: ; implicit-def: $vgpr38 -; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; implicit-def: $vgpr35 -; VI-NEXT: ; implicit-def: $vgpr60 -; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; implicit-def: $vgpr63 -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: ; implicit-def: $vgpr45 -; VI-NEXT: ; implicit-def: $vgpr44 -; VI-NEXT: ; implicit-def: $vgpr41 -; VI-NEXT: ; implicit-def: $vgpr40 -; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v49, v15, s6 +; VI-NEXT: v_perm_b32 v15, v16, v15, s6 +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v16, v17, v16, s6 +; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; VI-NEXT: v_or_b32_e32 v15, v15, v16 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v16, v17, v16, s6 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v17, v18, v17, s6 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; VI-NEXT: v_or_b32_e32 v16, v16, v17 +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v18, v19, v18, s6 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v17, v18, v17, s6 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v20, v19, s6 -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; VI-NEXT: v_or_b32_e32 v17, v18, v19 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v18, v19, v18, s6 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; VI-NEXT: v_or_b32_e32 v17, v17, v18 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v18, v19, v18, s6 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v19, v20, v19, s6 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; VI-NEXT: v_or_b32_e32 v18, v18, v19 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v19, v20, v19, s6 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v20, v21, v20, s6 ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; VI-NEXT: v_or_b32_e32 v19, v19, v20 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v20, v20, v21, s6 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v20, v21, v20, s6 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v21, v22, v21, s6 ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; VI-NEXT: v_or_b32_e32 v20, v20, v21 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v21, v21, v22, s6 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v21, v22, v21, s6 +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v22, v23, v22, s6 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; VI-NEXT: v_or_b32_e32 v21, v21, v22 -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v22, v23, v22, s6 -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v23, v23, v24, s6 +; VI-NEXT: v_perm_b32 v23, v24, v23, s6 ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; VI-NEXT: v_or_b32_e32 v22, v22, v23 -; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v23, v24, v23, s6 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v24, v25, v24, s6 +; VI-NEXT: v_perm_b32 v24, v36, v34, s6 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; VI-NEXT: v_or_b32_e32 v23, v23, v24 -; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v24, v25, v24, s6 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v25, v25, v26, s6 -; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; VI-NEXT: v_perm_b32 v24, v37, v35, s6 ; VI-NEXT: v_or_b32_e32 v24, v24, v25 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v25, v26, v25, s6 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s6 -; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; VI-NEXT: v_perm_b32 v25, v55, v52, s6 ; VI-NEXT: v_or_b32_e32 v25, v25, v26 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s6 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v28, v27, s6 -; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; VI-NEXT: v_perm_b32 v26, v53, v48, s6 ; VI-NEXT: v_or_b32_e32 v26, v26, v27 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v27, v28, s6 -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr35 +; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr53 +; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v29, v28, s6 -; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; VI-NEXT: v_perm_b32 v27, v33, v27, s6 ; VI-NEXT: v_or_b32_e32 v27, v27, v28 -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v29, v28, s6 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v30, v29, s6 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; VI-NEXT: v_perm_b32 v28, v50, v39, s6 ; VI-NEXT: v_or_b32_e32 v28, v28, v29 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v29, v30, s6 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v30, v31, v30, s6 -; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; VI-NEXT: v_perm_b32 v29, v43, v41, s6 ; VI-NEXT: v_or_b32_e32 v29, v29, v30 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v30, v31, v30, s6 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v31, v32, v31, s6 -; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; VI-NEXT: v_perm_b32 v30, v57, v47, s6 ; VI-NEXT: v_or_b32_e32 v30, v30, v31 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_perm_b32 v31, v31, v48, s6 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v32, v33, v32, s6 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: v_perm_b32 v31, v61, v59, s6 ; VI-NEXT: v_or_b32_e32 v31, v31, v32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 +; VI-NEXT: ; kill: killed $vgpr32 +; VI-NEXT: ; implicit-def: $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: ; kill: killed $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; kill: killed $vgpr33 +; VI-NEXT: ; implicit-def: $vgpr33 +; VI-NEXT: ; implicit-def: $vgpr50 +; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr43 +; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr47 +; VI-NEXT: ; implicit-def: $vgpr61 +; VI-NEXT: ; implicit-def: $vgpr59 ; VI-NEXT: .LBB96_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB96_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v18, 0x300 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v61 -; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v60 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v58 -; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v56 -; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v44 -; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v40 -; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v52 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: v_add_u16_e32 v0, 3, v0 -; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v0, 3, v63 +; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v62 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 -; VI-NEXT: s_waitcnt vmcnt(12) -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; VI-NEXT: s_waitcnt vmcnt(11) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 +; VI-NEXT: v_add_u16_e32 v1, 3, v61 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v59 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v1, 3, v60 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v58 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v2, 3, v57 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v47 +; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v2, 3, v56 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v46 +; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v3, 3, v43 +; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v41 +; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:848 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v3, 3, v42 +; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v40 +; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v4, 3, v50 +; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v39 +; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:852 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v4, 3, v49 +; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v38 +; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v5, 3, v33 +; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v48 +; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v52 +; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v35 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(10) -; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; VI-NEXT: s_waitcnt vmcnt(9) ; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 -; VI-NEXT: s_waitcnt vmcnt(8) -; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v5, 3, v32 ; VI-NEXT: s_waitcnt vmcnt(7) -; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v10 ; VI-NEXT: s_waitcnt vmcnt(6) -; VI-NEXT: v_lshlrev_b16_e32 v19, 8, v19 +; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v11 ; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v12 ; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_lshlrev_b16_e32 v20, 8, v20 +; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v13 ; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v9 +; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 +; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v6, 3, v53 +; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v6, 3, v45 +; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v44 +; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v7, 3, v55 +; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:856 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v7, 3, v54 +; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v51 +; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v8, 3, v37 +; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:860 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_e32 v8, 3, v36 +; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v34 +; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v9, 3, v9 +; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 +; VI-NEXT: v_add_u16_e32 v9, 3, v9 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v1, 3, v1 -; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 +; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v10 +; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v2, 3, v2 -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v10, 3, v10 +; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v10, 3, v10 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v4, v0, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v0, v2, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 0x300, v3 -; VI-NEXT: v_or_b32_e32 v0, v2, v0 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_e32 v1, v1, v4 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_add_u16_e32 v2, 3, v2 +; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v11 +; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v11, 3, v11 +; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v11, 3, v11 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v12 +; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v12, 3, v12 +; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; VI-NEXT: v_add_u16_sdwa v2, v2, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_e32 v12, 3, v12 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v3, 0x300, v3 -; VI-NEXT: v_or_b32_e32 v2, v3, v2 -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v13 +; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v13, 3, v13 +; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v3, 3, v3 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v3, v3, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v32, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v4, 3, v4 -; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v4, 0x300, v4 -; VI-NEXT: v_or_b32_e32 v3, v4, v3 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v18, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v18, 0x300, v18 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v4, 3, v4 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; VI-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v4, v4, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v34, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v5, 3, v5 -; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v5, 0x300, v5 -; VI-NEXT: v_or_b32_e32 v4, v5, v4 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v17, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v17, 0x300, v17 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v5, 3, v5 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v6, 8, v6 -; VI-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v5, v5, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v36, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v6, 3, v6 -; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v6, 0x300, v6 -; VI-NEXT: v_or_b32_e32 v5, v6, v5 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v16, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v16, 0x300, v16 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v6, 3, v6 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 -; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v6, v6, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v37, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v7, 3, v7 -; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v7, 0x300, v7 -; VI-NEXT: v_or_b32_e32 v6, v7, v6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v15, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v15, 0x300, v15 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v7, 3, v7 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 -; VI-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v7, v7, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v38, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v13, 3, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v8, 3, v8 -; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v8, 0x300, v8 -; VI-NEXT: v_or_b32_e32 v7, v8, v7 -; VI-NEXT: v_add_u16_e32 v8, 3, v39 -; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v62 -; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v9, 3, v38 -; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v8, v8, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v9, 0x300, v9 -; VI-NEXT: v_or_b32_e32 v8, v9, v8 -; VI-NEXT: v_add_u16_e32 v9, 3, v37 -; VI-NEXT: v_lshlrev_b16_e32 v10, 8, v36 -; VI-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v10, 3, v35 -; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v9, v9, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v10, 0x300, v10 -; VI-NEXT: v_or_b32_e32 v9, v10, v9 -; VI-NEXT: v_add_u16_e32 v10, 3, v59 -; VI-NEXT: v_lshlrev_b16_e32 v11, 8, v34 -; VI-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v11, 3, v33 -; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v10, v10, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v11, 0x300, v11 -; VI-NEXT: v_or_b32_e32 v10, v11, v10 -; VI-NEXT: v_add_u16_e32 v11, 3, v57 -; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v32 -; VI-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v12, 3, v63 -; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v11, v11, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v12, 0x300, v12 -; VI-NEXT: v_or_b32_e32 v11, v12, v11 -; VI-NEXT: v_add_u16_e32 v12, 3, v47 -; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v46 -; VI-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v13, 3, v45 -; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v12, v12, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v13, 0x300, v13 -; VI-NEXT: v_or_b32_e32 v12, v13, v12 -; VI-NEXT: v_add_u16_e32 v13, 3, v43 -; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v42 -; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v14, 3, v41 -; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v13, v13, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v14 +; VI-NEXT: v_or_b32_sdwa v14, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v14, 0x300, v14 -; VI-NEXT: v_or_b32_e32 v13, v14, v13 -; VI-NEXT: v_add_u16_e32 v14, 3, v55 -; VI-NEXT: v_lshlrev_b16_e32 v15, 8, v54 -; VI-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v15, 3, v53 -; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v14, v14, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v15, 0x300, v15 -; VI-NEXT: v_or_b32_e32 v14, v15, v14 -; VI-NEXT: v_add_u16_e32 v15, 3, v51 -; VI-NEXT: v_lshlrev_b16_e32 v16, 8, v50 -; VI-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v16, 3, v49 -; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v15, v15, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v16, 0x300, v16 -; VI-NEXT: v_or_b32_e32 v15, v16, v15 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_add_u16_e32 v16, 3, v16 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 -; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v17, 3, v17 -; VI-NEXT: v_or_b32_sdwa v17, v19, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v17, 0x300, v17 +; VI-NEXT: v_add_u16_e32 v13, 3, v13 +; VI-NEXT: v_or_b32_sdwa v39, v33, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b16_e32 v33, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u16_e32 v13, 3, v13 +; VI-NEXT: v_or_b32_sdwa v13, v33, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v19, 3, v19 -; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v33, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v13, 0x300, v13 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v20, 3, v20 -; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v21, v16, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v16, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v19, 0x300, v20 -; VI-NEXT: v_or_b32_e32 v16, v19, v16 +; VI-NEXT: v_lshlrev_b16_e32 v35, 8, v19 ; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_e32 v17, v17, v21 -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v48 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v19, 3, v19 +; VI-NEXT: v_or_b32_sdwa v48, v35, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v20, 8, v20 -; VI-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v33, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v20, 3, v20 -; VI-NEXT: v_or_b32_sdwa v31, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v31, 0x300, v31 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v20, 3, v20 +; VI-NEXT: v_lshlrev_b16_e32 v35, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v33, v35, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v33, 0x300, v33 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v21, 8, v21 -; VI-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_e32 v35, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 -; VI-NEXT: v_or_b32_sdwa v30, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v30, 0x300, v30 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v49, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v49, v49, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v33, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v33, v33, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v35, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v29, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v29, 0x300, v29 -; VI-NEXT: v_or_b32_e32 v29, v29, v33 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v50, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v35, v50, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v35, 0x300, v35 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v35, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v35, v35, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v50, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v28, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v28, 0x300, v28 -; VI-NEXT: v_or_b32_e32 v28, v28, v35 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v51, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v50, v51, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v37, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v37, v37, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v51, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v27, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v27, 0x300, v27 -; VI-NEXT: v_or_b32_e32 v27, v27, v37 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v52, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v51, v52, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v38, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v38, v38, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v52, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v26, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v26, 0x300, v26 -; VI-NEXT: v_or_b32_e32 v26, v26, v38 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v53, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v52, v53, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v39, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v39, v39, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v53, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v25, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v25, 0x300, v25 -; VI-NEXT: v_or_b32_e32 v25, v25, v39 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v54, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v53, v54, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v48, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v48, v48, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v54, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v24, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v24, 0x300, v24 -; VI-NEXT: v_or_b32_e32 v24, v24, v48 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v55, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v54, v55, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v49, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v49, v49, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v55, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v23, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v23, 0x300, v23 -; VI-NEXT: v_or_b32_e32 v23, v23, v49 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_lshlrev_b16_e32 v40, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v55, v40, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v50, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v50, v50, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v40, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v22, 8, v22 -; VI-NEXT: v_or_b32_sdwa v22, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v22, 0x300, v22 -; VI-NEXT: v_or_b32_e32 v22, v22, v50 +; VI-NEXT: v_lshlrev_b16_e32 v41, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v40, v41, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 -; VI-NEXT: v_or_b32_sdwa v51, v32, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v51, v51, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v21, 3, v21 +; VI-NEXT: v_add_u16_e32 v41, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v32, 8, v32 -; VI-NEXT: v_or_b32_sdwa v21, v32, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v21, 0x300, v21 -; VI-NEXT: v_or_b32_e32 v21, v21, v51 +; VI-NEXT: v_lshlrev_b16_e32 v42, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v41, v42, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 -; VI-NEXT: v_or_b32_sdwa v52, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_add_u16_e32 v42, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v36, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_e32 v36, 0x300, v36 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_lshlrev_b16_e32 v43, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v42, v43, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v53, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_add_u16_e32 v43, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v54, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v32, 3, v32 +; VI-NEXT: v_lshlrev_b16_e32 v44, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v43, v44, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v34, 8, v34 -; VI-NEXT: v_or_b32_sdwa v55, v34, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_sdwa v32, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v34, v20, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v20, v52, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v19, v53, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: v_add_u16_sdwa v18, v55, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v20, v36, v20 -; VI-NEXT: v_or_b32_e32 v30, v30, v34 -; VI-NEXT: v_or_b32_e32 v31, v31, v32 +; VI-NEXT: v_add_u16_e32 v44, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v45, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v44, v45, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v45, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v46, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v45, v46, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v46, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v47, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v46, v47, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v47, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v56, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v47, v56, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v56, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v57, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v56, v57, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v57, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v58, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v57, v58, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v58, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v59, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v58, v59, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v59, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v60, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v59, v60, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v60, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v61, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v60, v61, v60 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v61, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v62, 8, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_sdwa v61, v62, v61 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v62, 3, v19 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshlrev_b16_e32 v63, 8, v19 +; VI-NEXT: v_or_b32_sdwa v62, v63, v62 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_mov_b32_e32 v63, 0x300 +; VI-NEXT: v_add_u16_sdwa v32, v32, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v19, v12, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v12, v48, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; VI-NEXT: v_or_b32_e32 v18, v18, v32 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_sdwa v20, v11, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v21, v10, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v22, v9, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v23, v8, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v24, v7, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v25, v6, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v26, v5, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v27, v4, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v28, v3, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v29, v2, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v11, v49, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: v_add_u16_sdwa v30, v1, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v31, v0, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v0, v62, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v1, v60, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v2, v58, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v3, v56, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v4, v46, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v5, v44, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v6, v42, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v7, v40, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v8, v54, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v9, v52, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v34, v34, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v36, v36, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v37, v37, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v38, v38, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v39, v39, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v10, v50, v63 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v11, v35, v11 +; VI-NEXT: v_or_b32_e32 v12, v33, v12 +; VI-NEXT: v_or_b32_e32 v13, v13, v39 +; VI-NEXT: v_or_b32_e32 v14, v14, v38 +; VI-NEXT: v_or_b32_e32 v15, v15, v37 +; VI-NEXT: v_or_b32_e32 v16, v16, v36 +; VI-NEXT: v_or_b32_e32 v17, v17, v34 +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_add_u16_e32 v48, 3, v48 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u16_e32 v52, 3, v52 +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v19, v32, v19 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_lshlrev_b16_e32 v49, 8, v49 +; VI-NEXT: v_or_b32_sdwa v48, v49, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v48 +; VI-NEXT: v_or_b32_e32 v0, v48, v0 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v61 +; VI-NEXT: v_or_b32_e32 v1, v48, v1 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v59 +; VI-NEXT: v_or_b32_e32 v2, v48, v2 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v57 +; VI-NEXT: v_or_b32_e32 v3, v48, v3 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v47 +; VI-NEXT: v_or_b32_e32 v4, v48, v4 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v45 +; VI-NEXT: v_or_b32_e32 v5, v48, v5 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v43 +; VI-NEXT: v_or_b32_e32 v6, v48, v6 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v41 +; VI-NEXT: v_or_b32_e32 v7, v48, v7 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v55 +; VI-NEXT: v_or_b32_e32 v8, v48, v8 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v53 +; VI-NEXT: v_or_b32_e32 v9, v48, v9 +; VI-NEXT: v_add_u16_e32 v48, 0x300, v51 +; VI-NEXT: v_or_b32_e32 v10, v48, v10 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b16_e32 v53, 8, v53 -; VI-NEXT: v_or_b32_sdwa v52, v53, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v52, 0x300, v52 -; VI-NEXT: v_or_b32_e32 v18, v52, v18 -; VI-NEXT: v_add_u16_e32 v52, 0x300, v54 -; VI-NEXT: v_or_b32_e32 v19, v52, v19 +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v20, v32, v20 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v21, v32, v21 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v22, v32, v22 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v23, v32, v23 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:860 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v24, v32, v24 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:856 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v25, v32, v25 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v26, v32, v26 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v27, v32, v27 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:852 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v28, v32, v28 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:848 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v29, v32, v29 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v30, v32, v30 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_add_u16_e32 v32, 0x300, v32 +; VI-NEXT: v_or_b32_e32 v31, v32, v31 ; VI-NEXT: .LBB96_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload @@ -189714,39 +189971,38 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v39, v7 +; GFX9-NEXT: v_mov_b32_e32 v50, v6 +; GFX9-NEXT: v_mov_b32_e32 v53, v5 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v36, v3 +; GFX9-NEXT: v_mov_b32_e32 v37, v2 +; GFX9-NEXT: v_mov_b32_e32 v48, v1 +; GFX9-NEXT: v_mov_b32_e32 v52, v0 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:388 -; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:16 ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:32 @@ -189766,70 +190022,61 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:304 ; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:320 ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:108 -; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:160 -; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:156 -; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:152 -; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:148 -; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:144 -; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:140 -; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:136 -; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:132 -; GFX9-NEXT: s_waitcnt vmcnt(27) -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; GFX9-NEXT: s_waitcnt vmcnt(26) -; GFX9-NEXT: v_lshlrev_b16_e32 v53, 8, v1 -; GFX9-NEXT: s_waitcnt vmcnt(25) -; GFX9-NEXT: v_lshlrev_b16_e32 v51, 8, v2 -; GFX9-NEXT: s_waitcnt vmcnt(24) -; GFX9-NEXT: v_lshlrev_b16_e32 v49, 8, v3 -; GFX9-NEXT: s_waitcnt vmcnt(23) -; GFX9-NEXT: v_lshlrev_b16_e32 v39, 8, v4 -; GFX9-NEXT: s_waitcnt vmcnt(22) -; GFX9-NEXT: v_lshlrev_b16_e32 v38, 8, v5 +; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:380 +; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:376 ; GFX9-NEXT: s_waitcnt vmcnt(21) -; GFX9-NEXT: v_lshlrev_b16_e32 v34, 8, v6 +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:292 -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(3) +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:100 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:92 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:312 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v1 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v2 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v3 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v5 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v6 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v7 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v8 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v9 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v10 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v11 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v12 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v13 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v14 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v15 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v16 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v17 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v18 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:336 @@ -189837,572 +190084,457 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:324 ; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill ; GFX9-NEXT: s_waitcnt vmcnt(3) ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v1 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:332 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v2 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:348 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:344 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:360 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:368 ; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:384 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:356 ; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:760 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v1 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:716 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v59, 8, v0 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 ; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v0, 8, v2 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v56, 8, v1 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:364 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:756 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:260 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:380 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshlrev_b16_e32 v32, 8, v2 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:308 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:340 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:88 -; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:84 -; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:76 -; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:68 -; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:60 -; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:56 -; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:52 -; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:44 -; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:36 -; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:28 -; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:24 -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:20 -; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:12 -; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:4 -; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:124 -; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:120 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:372 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:744 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:340 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:252 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:88 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:84 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:76 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:68 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:60 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:56 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:52 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:44 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:36 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:28 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:732 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:200 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:20 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:12 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:92 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:4 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:260 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:124 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:768 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:120 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:268 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:720 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:372 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:256 +; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:252 +; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:248 +; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:244 +; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:240 +; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:236 +; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:232 +; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:228 +; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:224 +; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:220 +; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:216 +; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:212 +; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:208 +; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:204 +; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:200 +; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:196 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:724 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:828 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:728 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:736 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:184 +; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:180 +; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:812 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:704 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:376 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:708 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:824 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:160 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:788 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:156 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:808 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:148 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:772 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:140 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:136 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:784 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:132 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:268 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:284 ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:284 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:280 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB96_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v0, v52, v48, s6 +; GFX9-NEXT: v_perm_b32 v1, v37, v36, s6 ; GFX9-NEXT: s_mov_b32 s7, 0x5040100 -; GFX9-NEXT: v_or_b32_sdwa v9, v59, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_perm_b32 v10, v47, v45, s6 -; GFX9-NEXT: v_or_b32_sdwa v11, v40, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_perm_b32 v12, v55, v54, s6 -; GFX9-NEXT: v_perm_b32 v17, v43, v42, s6 -; GFX9-NEXT: v_perm_b32 v18, v58, v57, s6 -; GFX9-NEXT: v_perm_b32 v19, v63, v46, s6 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr45 -; GFX9-NEXT: ; implicit-def: $vgpr40 +; GFX9-NEXT: v_perm_b32 v0, v1, v0, s7 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v50, v39, s6 +; GFX9-NEXT: v_perm_b32 v22, v41, v55, s6 +; GFX9-NEXT: v_perm_b32 v23, v45, v43, s6 +; GFX9-NEXT: v_perm_b32 v24, v58, v47, s6 +; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr48 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr41 ; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; implicit-def: $vgpr51 -; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v0, v1, v0, s6 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v1, v53, s6 +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s7 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_or_b32_sdwa v13, v48, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, v1, v0, s7 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: v_perm_b32 v1, v3, v2, s7 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v31, v31, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s7 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v4, v5, v4, s6 ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s7 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v4, v5, v4, s6 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 ; GFX9-NEXT: v_perm_b32 v4, v5, v4, s7 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s7 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s7 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v8, v8, v33, s6 +; GFX9-NEXT: v_perm_b32 v8, v8, v9, s6 ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s7 -; GFX9-NEXT: v_or_b32_sdwa v8, v60, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v8, v9, v8, s7 -; GFX9-NEXT: v_or_b32_sdwa v9, v44, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v11, v10, s6 ; GFX9-NEXT: v_perm_b32 v9, v9, v10, s7 -; GFX9-NEXT: v_or_b32_sdwa v10, v41, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v10, v11, v10, s7 -; GFX9-NEXT: v_or_b32_sdwa v11, v52, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v12, v13, v12, s6 ; GFX9-NEXT: v_perm_b32 v11, v11, v12, s7 -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; implicit-def: $vgpr44 -; GFX9-NEXT: ; implicit-def: $vgpr41 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr53 -; GFX9-NEXT: ; implicit-def: $vgpr49 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v12, v50, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v12, v13, v12, s7 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_perm_b32 v14, v37, v36, s6 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v14, v15, v14, s6 ; GFX9-NEXT: v_perm_b32 v13, v13, v14, s7 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v14, v15, v14, s7 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_or_b32_sdwa v15, v62, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v35, s6 +; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v16, v16, v17, s6 ; GFX9-NEXT: v_perm_b32 v15, v15, v16, s7 -; GFX9-NEXT: v_perm_b32 v16, v32, v56, s6 +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v16, v17, v16, s6 +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s6 ; GFX9-NEXT: v_perm_b32 v16, v17, v16, s7 -; GFX9-NEXT: v_perm_b32 v17, v19, v18, s7 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s6 +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s7 +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v19, v19, v20, s6 -; GFX9-NEXT: v_perm_b32 v18, v19, v18, s7 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v18, v19, v18, s6 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s6 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v18, v19, v18, s7 +; GFX9-NEXT: v_perm_b32 v19, v33, v63, s6 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v20, v21, v20, s6 ; GFX9-NEXT: v_perm_b32 v19, v20, v19, s7 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v20, v20, v61, s6 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v21, v22, v21, s6 +; GFX9-NEXT: v_perm_b32 v20, v40, v54, s6 +; GFX9-NEXT: v_perm_b32 v21, v34, v51, s6 ; GFX9-NEXT: v_perm_b32 v20, v21, v20, s7 -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; kill: killed $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v21, v22, v21, s6 -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v22, v23, v22, s6 +; GFX9-NEXT: v_perm_b32 v21, v44, v42, s6 ; GFX9-NEXT: v_perm_b32 v21, v22, v21, s7 -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v22, v23, v22, s6 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 +; GFX9-NEXT: v_perm_b32 v22, v57, v46, s6 ; GFX9-NEXT: v_perm_b32 v22, v23, v22, s7 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v24, v25, v24, s6 +; GFX9-NEXT: v_perm_b32 v23, v61, v60, s6 ; GFX9-NEXT: v_perm_b32 v23, v24, v23, s7 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr40 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr44 +; GFX9-NEXT: ; implicit-def: $vgpr42 +; GFX9-NEXT: ; implicit-def: $vgpr57 +; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr61 +; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v24, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v24, v25, v24, s7 -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v25, v25, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v26, v27, v26, s6 ; GFX9-NEXT: v_perm_b32 v25, v25, v26, s7 -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v26, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v26, v27, v26, s7 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v28, v29, v28, s6 ; GFX9-NEXT: v_perm_b32 v27, v27, v28, s7 -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v28, v28, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v28, v29, v28, s7 -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v29, v29, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v30, v31, v30, s6 +; GFX9-NEXT: v_perm_b32 v30, v38, v30, s6 ; GFX9-NEXT: v_perm_b32 v29, v29, v30, s7 -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v30, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v30, v30, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v30, v31, v30, s7 -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v32, v33, v32, s6 +; GFX9-NEXT: v_or_b32_sdwa v31, v35, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_perm_b32 v32, v62, v49, s6 ; GFX9-NEXT: v_perm_b32 v31, v31, v32, s7 ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: ; kill: killed $vgpr32 @@ -190471,458 +190603,630 @@ define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; kill: killed $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr49 +; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; kill: killed $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: .LBB96_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB96_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v0, 3, v62 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v49 +; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:840 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u16_e32 v0, 3, v35 +; GFX9-NEXT: v_or_b32_sdwa v0, v32, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:844 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v30, v36 +; GFX9-NEXT: v_lshlrev_b16_e32 v30, 8, v30 ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 -; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v33 -; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v45 -; GFX9-NEXT: v_add_u16_e32 v11, 3, v40 -; GFX9-NEXT: v_or_b32_sdwa v11, v38, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 -; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v54 -; GFX9-NEXT: v_lshlrev_b16_e32 v18, 8, v46 -; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v56 -; GFX9-NEXT: v_lshlrev_b16_e32 v20, 8, v42 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(21) +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 -; GFX9-NEXT: s_waitcnt vmcnt(20) +; GFX9-NEXT: v_or_b32_sdwa v0, v59, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:804 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 +; GFX9-NEXT: v_or_b32_sdwa v0, v56, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:800 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u16_e32 v0, 3, v38 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(20) -; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v2 -; GFX9-NEXT: s_waitcnt vmcnt(19) -; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: s_waitcnt vmcnt(12) -; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6 -; GFX9-NEXT: s_waitcnt vmcnt(6) -; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_lshlrev_b16_e32 v23, 8, v23 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:752 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v27, 8, v27 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v1, 3, v1 -; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 -; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v0 -; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v2 -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v3 -; GFX9-NEXT: v_perm_b32 v0, v2, v0, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v1, v4, s6 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v2, 3, v2 +; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:748 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:760 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v3 -; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:740 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v3, 0x300, v3 -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v35, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v35 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v3, 3, v3 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v4 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v3, 0x300, v3 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v38, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v4, 3, v4 -; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v4 -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v36, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v36, 0x300, v36 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v4, 3, v4 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v5, 8, v5 -; GFX9-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v4 +; GFX9-NEXT: v_or_b32_sdwa v29, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v29, 0x300, v29 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v5, 3, v5 -; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 -; GFX9-NEXT: v_perm_b32 v4, v5, v4, s6 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v28, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v5, 3, v5 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v6 -; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v27, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 -; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 -; GFX9-NEXT: v_perm_b32 v5, v6, v5, s6 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v26, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:716 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 -; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 +; GFX9-NEXT: v_or_b32_sdwa v18, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v7, 3, v7 -; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v7, 0x300, v7 -; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v19, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v61 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v60 +; GFX9-NEXT: v_or_b32_sdwa v20, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v58 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v47 +; GFX9-NEXT: v_or_b32_sdwa v21, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v57 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v46 +; GFX9-NEXT: v_or_b32_sdwa v22, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v45 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v43 +; GFX9-NEXT: v_or_b32_sdwa v23, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v44 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v42 +; GFX9-NEXT: v_or_b32_sdwa v24, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v41 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v55 +; GFX9-NEXT: v_or_b32_sdwa v25, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v40 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v54 +; GFX9-NEXT: v_or_b32_sdwa v49, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v34 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v51 +; GFX9-NEXT: v_or_b32_sdwa v51, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v33 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v63 +; GFX9-NEXT: v_or_b32_sdwa v54, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:836 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:828 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v39 +; GFX9-NEXT: v_lshlrev_b16_e32 v34, 8, v48 +; GFX9-NEXT: v_add_u16_e32 v39, 0x300, v26 +; GFX9-NEXT: v_add_u16_e32 v48, 0x300, v18 +; GFX9-NEXT: v_add_u16_e32 v26, 0x300, v24 +; GFX9-NEXT: v_add_u16_e32 v24, 0x300, v25 +; GFX9-NEXT: v_add_u16_e32 v25, 0x300, v51 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v7, 3, v7 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 -; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v7, 0x300, v7 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v55, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:832 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v8, 3, v8 -; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 -; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 -; GFX9-NEXT: v_add_u16_e32 v8, 3, v60 -; GFX9-NEXT: v_add_u16_e32 v9, 3, v59 -; GFX9-NEXT: v_or_b32_sdwa v8, v53, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_or_b32_sdwa v9, v51, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 -; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 -; GFX9-NEXT: v_perm_b32 v8, v9, v8, s6 -; GFX9-NEXT: v_add_u16_e32 v9, 3, v47 -; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v44 -; GFX9-NEXT: v_or_b32_sdwa v10, v49, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 -; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 -; GFX9-NEXT: v_perm_b32 v9, v10, v9, s6 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v41 -; GFX9-NEXT: v_or_b32_sdwa v10, v39, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 -; GFX9-NEXT: v_perm_b32 v10, v11, v10, s6 -; GFX9-NEXT: v_add_u16_e32 v11, 3, v55 -; GFX9-NEXT: v_or_b32_sdwa v11, v12, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v52 -; GFX9-NEXT: v_or_b32_sdwa v12, v34, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 -; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 -; GFX9-NEXT: v_perm_b32 v11, v12, v11, s6 -; GFX9-NEXT: v_add_u16_e32 v12, 3, v50 -; GFX9-NEXT: v_or_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v13, 3, v48 -; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 -; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 -; GFX9-NEXT: v_perm_b32 v12, v13, v12, s6 -; GFX9-NEXT: v_add_u16_e32 v13, 3, v37 -; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v36 -; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v40, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:812 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v14, 3, v14 -; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14 -; GFX9-NEXT: v_perm_b32 v13, v14, v13, s6 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:820 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v41, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:816 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v51, 0x300, v41 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v14, 3, v14 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v42, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v15, 3, v15 -; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v15, 0x300, v15 -; GFX9-NEXT: v_perm_b32 v14, v15, v14, s6 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:824 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v35 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v43, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v15, 3, v15 -; GFX9-NEXT: v_or_b32_sdwa v15, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v16, 3, v62 -; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v15, 0x300, v15 -; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16 -; GFX9-NEXT: v_perm_b32 v15, v16, v15, s6 -; GFX9-NEXT: v_add_u16_e32 v16, 3, v58 -; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v57 -; GFX9-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v17, 3, v63 -; GFX9-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v18, 3, v32 -; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v19, 3, v43 -; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v20, 0x300, v16 -; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v18 -; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v19 -; GFX9-NEXT: v_perm_b32 v16, v18, v16, s6 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:744 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:708 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v17, 0x300, v17 -; GFX9-NEXT: v_perm_b32 v17, v17, v20, s6 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:756 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_add_u16_e32 v18, 3, v18 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v44, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v19, 8, v19 -; GFX9-NEXT: v_or_b32_sdwa v18, v19, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v18 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v19, 3, v19 -; GFX9-NEXT: v_or_b32_sdwa v19, v20, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v32, 0x300, v19 -; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v45, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:700 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:720 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v20, 3, v20 -; GFX9-NEXT: v_or_b32_sdwa v20, v21, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v20 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v46, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v46 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v21, 3, v21 -; GFX9-NEXT: v_or_b32_sdwa v21, v22, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:712 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v33, 0x300, v21 -; GFX9-NEXT: v_perm_b32 v30, v33, v30, s6 +; GFX9-NEXT: v_or_b32_sdwa v56, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v22, 3, v22 -; GFX9-NEXT: v_or_b32_sdwa v22, v23, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v29, 0x300, v22 +; GFX9-NEXT: v_or_b32_sdwa v58, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v23, 3, v23 -; GFX9-NEXT: v_or_b32_sdwa v23, v24, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v34, 0x300, v23 -; GFX9-NEXT: v_perm_b32 v29, v34, v29, s6 +; GFX9-NEXT: v_or_b32_sdwa v59, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v41, 0x300, v59 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v24, 3, v24 -; GFX9-NEXT: v_or_b32_sdwa v24, v25, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v60, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v46, 0x300, v60 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v25, 3, v25 -; GFX9-NEXT: v_or_b32_sdwa v25, v26, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:696 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v25 +; GFX9-NEXT: v_or_b32_sdwa v61, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v26, 3, v26 -; GFX9-NEXT: v_or_b32_sdwa v26, v27, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v62, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 -; GFX9-NEXT: v_or_b32_sdwa v36, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v36, 0x300, v36 +; GFX9-NEXT: v_or_b32_sdwa v63, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v37, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v16, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v16, 0x300, v16 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v38, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v17, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v39, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v25, 0x300, v39 +; GFX9-NEXT: v_or_b32_sdwa v15, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v15, 0x300, v15 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v48, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v14, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v14, 0x300, v14 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v49, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v13, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v50, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:808 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v39, 0x300, v50 +; GFX9-NEXT: v_or_b32_sdwa v12, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v12 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v51, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:788 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v23, 0x300, v51 +; GFX9-NEXT: v_or_b32_sdwa v11, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v11 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v52, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:792 ; 4-byte Folded Reload +; GFX9-NEXT: v_or_b32_sdwa v10, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v10 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v53, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:780 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:772 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v22, 0x300, v53 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v9, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:704 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v54, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:784 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:776 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v8, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v55, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:764 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v21, 0x300, v55 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v7, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v7, 0x300, v7 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v40, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:768 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v61 -; GFX9-NEXT: v_add_u16_e32 v50, 0x300, v40 -; GFX9-NEXT: v_perm_b32 v21, v50, v21, s6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v6, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 +; GFX9-NEXT: v_perm_b32 v6, v6, v7, s6 +; GFX9-NEXT: v_perm_b32 v7, v8, v9, s6 +; GFX9-NEXT: v_perm_b32 v8, v10, v11, s6 +; GFX9-NEXT: v_perm_b32 v10, v14, v15, s6 +; GFX9-NEXT: v_perm_b32 v9, v12, v13, s6 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 -; GFX9-NEXT: v_or_b32_sdwa v41, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:732 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v20, 0x300, v41 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v5, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v42, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:736 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v51, 0x300, v42 -; GFX9-NEXT: v_perm_b32 v20, v51, v20, s6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v4, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v43, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:728 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:724 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v19, 0x300, v43 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v47, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v44, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v57, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v45, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v45 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v3, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v3, 0x300, v3 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u16_e32 v27, 3, v27 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshlrev_b16_e32 v28, 8, v28 -; GFX9-NEXT: v_or_b32_sdwa v46, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v28, 0x300, v24 -; GFX9-NEXT: v_add_u16_e32 v27, 0x300, v26 -; GFX9-NEXT: v_add_u16_e32 v26, 0x300, v37 -; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v38 -; GFX9-NEXT: v_add_u16_e32 v38, 0x300, v48 -; GFX9-NEXT: v_add_u16_e32 v24, 0x300, v49 -; GFX9-NEXT: v_add_u16_e32 v48, 0x300, v52 -; GFX9-NEXT: v_add_u16_e32 v49, 0x300, v54 -; GFX9-NEXT: v_add_u16_e32 v52, 0x300, v44 -; GFX9-NEXT: v_add_u16_e32 v53, 0x300, v46 -; GFX9-NEXT: v_perm_b32 v18, v53, v18, s6 -; GFX9-NEXT: v_perm_b32 v19, v52, v19, s6 -; GFX9-NEXT: v_perm_b32 v22, v49, v22, s6 -; GFX9-NEXT: v_perm_b32 v23, v48, v23, s6 -; GFX9-NEXT: v_perm_b32 v24, v39, v24, s6 -; GFX9-NEXT: v_perm_b32 v25, v38, v25, s6 -; GFX9-NEXT: v_perm_b32 v26, v37, v26, s6 -; GFX9-NEXT: v_perm_b32 v27, v36, v27, s6 -; GFX9-NEXT: v_perm_b32 v28, v35, v28, s6 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v31, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v2, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 +; GFX9-NEXT: v_or_b32_sdwa v32, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v53 +; GFX9-NEXT: v_add_u16_e32 v53, 0x300, v21 +; GFX9-NEXT: v_add_u16_e32 v21, 0x300, v40 +; GFX9-NEXT: v_add_u16_e32 v40, 0x300, v56 +; GFX9-NEXT: v_perm_b32 v15, v40, v18, s6 +; GFX9-NEXT: v_perm_b32 v18, v51, v21, s6 +; GFX9-NEXT: v_perm_b32 v21, v24, v26, s6 +; GFX9-NEXT: v_add_u16_e32 v56, 0x300, v62 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 +; GFX9-NEXT: v_or_b32_sdwa v1, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v50 +; GFX9-NEXT: v_or_b32_sdwa v33, v33, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 3, v52 +; GFX9-NEXT: v_or_b32_sdwa v0, v34, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v34, 3, v37 +; GFX9-NEXT: v_or_b32_sdwa v30, v30, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: v_perm_b32 v0, v30, v0, s6 +; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v33 +; GFX9-NEXT: v_perm_b32 v1, v30, v1, s6 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v32 +; GFX9-NEXT: v_perm_b32 v2, v30, v2, s6 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v31 +; GFX9-NEXT: v_perm_b32 v3, v30, v3, s6 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:840 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v28 +; GFX9-NEXT: v_add_u16_e32 v50, 0x300, v19 +; GFX9-NEXT: v_add_u16_e32 v28, 0x300, v22 +; GFX9-NEXT: v_add_u16_e32 v22, 0x300, v54 +; GFX9-NEXT: v_add_u16_e32 v19, 0x300, v44 +; GFX9-NEXT: v_add_u16_e32 v44, 0x300, v17 +; GFX9-NEXT: v_perm_b32 v11, v44, v16, s6 +; GFX9-NEXT: v_perm_b32 v26, v37, v29, s6 +; GFX9-NEXT: v_add_u16_e32 v52, 0x300, v20 +; GFX9-NEXT: v_add_u16_e32 v20, 0x300, v42 +; GFX9-NEXT: v_add_u16_e32 v54, 0x300, v43 +; GFX9-NEXT: v_add_u16_e32 v42, 0x300, v61 +; GFX9-NEXT: v_add_u16_e32 v43, 0x300, v63 +; GFX9-NEXT: v_add_u16_e32 v17, 0x300, v4 +; GFX9-NEXT: v_add_u16_e32 v4, 0x300, v47 +; GFX9-NEXT: v_add_u16_e32 v47, 0x300, v57 +; GFX9-NEXT: v_perm_b32 v4, v47, v4, s6 +; GFX9-NEXT: v_perm_b32 v5, v17, v5, s6 +; GFX9-NEXT: v_perm_b32 v12, v43, v56, s6 +; GFX9-NEXT: v_perm_b32 v13, v42, v46, s6 +; GFX9-NEXT: v_perm_b32 v17, v54, v20, s6 +; GFX9-NEXT: v_perm_b32 v24, v50, v48, s6 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:844 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:804 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v30 +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:800 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v33, 0x300, v30 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:752 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v32, 0x300, v30 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:748 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v34, 0x300, v30 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:740 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v29, v34, v32, s6 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u16_e32 v31, 0x300, v30 +; GFX9-NEXT: v_add_u16_e32 v30, 0x300, v38 +; GFX9-NEXT: v_add_u16_e32 v38, 0x300, v27 +; GFX9-NEXT: v_add_u16_e32 v27, 0x300, v23 +; GFX9-NEXT: v_add_u16_e32 v23, 0x300, v49 +; GFX9-NEXT: v_add_u16_e32 v49, 0x300, v55 +; GFX9-NEXT: v_add_u16_e32 v55, 0x300, v45 +; GFX9-NEXT: v_perm_b32 v16, v55, v19, s6 +; GFX9-NEXT: v_perm_b32 v19, v49, v22, s6 +; GFX9-NEXT: v_perm_b32 v22, v27, v28, s6 +; GFX9-NEXT: v_perm_b32 v27, v36, v30, s6 +; GFX9-NEXT: v_perm_b32 v28, v35, v31, s6 +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u16_e32 v45, 0x300, v58 +; GFX9-NEXT: v_perm_b32 v14, v41, v45, s6 +; GFX9-NEXT: v_perm_b32 v20, v25, v23, s6 +; GFX9-NEXT: v_perm_b32 v23, v53, v52, s6 +; GFX9-NEXT: v_perm_b32 v25, v39, v38, s6 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v30, v33, v30, s6 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v31, v32, v31, s6 ; GFX9-NEXT: .LBB96_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload @@ -192680,6 +192984,7 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill @@ -192722,839 +193027,779 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v45, s99, 33 ; SI-NEXT: v_writelane_b32 v45, s30, 34 ; SI-NEXT: v_writelane_b32 v45, s31, 35 -; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane +; SI-NEXT: ; implicit-def: $vgpr56 : SGPR spill to VGPR lane ; SI-NEXT: v_readfirstlane_b32 s4, v30 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_writelane_b32 v47, s29, 0 -; SI-NEXT: v_writelane_b32 v47, s28, 1 -; SI-NEXT: v_writelane_b32 v47, s27, 2 -; SI-NEXT: v_writelane_b32 v47, s26, 3 -; SI-NEXT: v_writelane_b32 v47, s25, 4 -; SI-NEXT: v_writelane_b32 v47, s24, 5 -; SI-NEXT: v_writelane_b32 v47, s23, 6 -; SI-NEXT: v_writelane_b32 v47, s22, 7 -; SI-NEXT: v_writelane_b32 v47, s21, 8 -; SI-NEXT: v_writelane_b32 v47, s20, 9 -; SI-NEXT: v_writelane_b32 v47, s19, 10 -; SI-NEXT: v_writelane_b32 v47, s18, 11 -; SI-NEXT: v_writelane_b32 v47, s17, 12 -; SI-NEXT: v_writelane_b32 v47, s16, 13 -; SI-NEXT: v_writelane_b32 v47, s4, 14 +; SI-NEXT: v_writelane_b32 v56, s29, 0 +; SI-NEXT: v_writelane_b32 v56, s28, 1 +; SI-NEXT: v_writelane_b32 v56, s27, 2 +; SI-NEXT: v_writelane_b32 v56, s26, 3 +; SI-NEXT: v_writelane_b32 v56, s25, 4 +; SI-NEXT: v_writelane_b32 v56, s24, 5 +; SI-NEXT: v_writelane_b32 v56, s23, 6 +; SI-NEXT: v_writelane_b32 v56, s22, 7 +; SI-NEXT: v_writelane_b32 v56, s21, 8 +; SI-NEXT: v_writelane_b32 v56, s20, 9 +; SI-NEXT: v_writelane_b32 v56, s19, 10 +; SI-NEXT: v_writelane_b32 v56, s18, 11 +; SI-NEXT: v_writelane_b32 v56, s17, 12 +; SI-NEXT: v_writelane_b32 v56, s16, 13 +; SI-NEXT: v_writelane_b32 v56, s4, 14 ; SI-NEXT: v_readfirstlane_b32 s4, v29 -; SI-NEXT: v_writelane_b32 v47, s4, 15 +; SI-NEXT: v_writelane_b32 v56, s4, 15 ; SI-NEXT: v_readfirstlane_b32 s4, v28 -; SI-NEXT: v_writelane_b32 v47, s4, 16 +; SI-NEXT: v_writelane_b32 v56, s4, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v27 -; SI-NEXT: v_writelane_b32 v47, s4, 17 +; SI-NEXT: v_writelane_b32 v56, s4, 17 ; SI-NEXT: v_readfirstlane_b32 s4, v26 -; SI-NEXT: v_writelane_b32 v47, s4, 18 +; SI-NEXT: v_writelane_b32 v56, s4, 18 ; SI-NEXT: v_readfirstlane_b32 s4, v25 -; SI-NEXT: v_writelane_b32 v47, s4, 19 +; SI-NEXT: v_writelane_b32 v56, s4, 19 ; SI-NEXT: v_readfirstlane_b32 s4, v24 -; SI-NEXT: v_writelane_b32 v47, s4, 20 +; SI-NEXT: v_writelane_b32 v56, s4, 20 ; SI-NEXT: v_readfirstlane_b32 s4, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:332 -; SI-NEXT: v_writelane_b32 v47, s4, 21 +; SI-NEXT: v_writelane_b32 v56, s4, 21 ; SI-NEXT: v_readfirstlane_b32 s4, v22 -; SI-NEXT: v_writelane_b32 v47, s4, 22 +; SI-NEXT: v_writelane_b32 v56, s4, 22 ; SI-NEXT: v_readfirstlane_b32 s4, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:328 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:324 -; SI-NEXT: v_writelane_b32 v47, s4, 23 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:320 +; SI-NEXT: v_writelane_b32 v56, s4, 23 ; SI-NEXT: v_readfirstlane_b32 s4, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:320 -; SI-NEXT: v_writelane_b32 v47, s4, 24 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:316 +; SI-NEXT: v_writelane_b32 v56, s4, 24 ; SI-NEXT: v_readfirstlane_b32 s4, v19 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:316 -; SI-NEXT: v_writelane_b32 v47, s4, 25 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:332 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:328 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324 +; SI-NEXT: v_writelane_b32 v56, s4, 25 ; SI-NEXT: v_readfirstlane_b32 s4, v18 -; SI-NEXT: v_writelane_b32 v47, s4, 26 +; SI-NEXT: v_writelane_b32 v56, s4, 26 ; SI-NEXT: v_readfirstlane_b32 s4, v17 -; SI-NEXT: v_writelane_b32 v47, s4, 27 +; SI-NEXT: v_writelane_b32 v56, s4, 27 ; SI-NEXT: v_readfirstlane_b32 s4, v16 -; SI-NEXT: v_writelane_b32 v47, s4, 28 -; SI-NEXT: v_readfirstlane_b32 s4, v15 -; SI-NEXT: v_writelane_b32 v47, s4, 29 +; SI-NEXT: v_writelane_b32 v56, s4, 28 ; SI-NEXT: v_readfirstlane_b32 s4, v14 -; SI-NEXT: v_writelane_b32 v47, s4, 30 -; SI-NEXT: v_readfirstlane_b32 s4, v13 -; SI-NEXT: v_writelane_b32 v47, s4, 31 +; SI-NEXT: v_writelane_b32 v56, s4, 29 ; SI-NEXT: v_readfirstlane_b32 s4, v12 -; SI-NEXT: v_writelane_b32 v47, s4, 32 -; SI-NEXT: v_readfirstlane_b32 s4, v11 -; SI-NEXT: v_writelane_b32 v47, s4, 33 +; SI-NEXT: v_writelane_b32 v56, s4, 30 ; SI-NEXT: v_readfirstlane_b32 s4, v10 -; SI-NEXT: v_writelane_b32 v47, s4, 34 +; SI-NEXT: v_writelane_b32 v56, s4, 31 ; SI-NEXT: v_readfirstlane_b32 s4, v9 -; SI-NEXT: v_writelane_b32 v47, s4, 35 +; SI-NEXT: v_readfirstlane_b32 s57, v1 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248 +; SI-NEXT: v_writelane_b32 v56, s4, 32 ; SI-NEXT: v_readfirstlane_b32 s4, v8 -; SI-NEXT: v_writelane_b32 v47, s4, 36 -; SI-NEXT: v_readfirstlane_b32 s4, v7 -; SI-NEXT: v_writelane_b32 v47, s4, 37 -; SI-NEXT: v_readfirstlane_b32 s4, v6 -; SI-NEXT: v_writelane_b32 v47, s4, 38 -; SI-NEXT: v_readfirstlane_b32 s4, v5 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:312 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:308 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:304 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:300 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 +; SI-NEXT: v_writelane_b32 v56, s4, 33 ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:288 +; SI-NEXT: v_readfirstlane_b32 s4, v7 ; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:284 +; SI-NEXT: v_readfirstlane_b32 s56, v6 ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280 +; SI-NEXT: v_readfirstlane_b32 s70, v5 ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:276 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:264 -; SI-NEXT: v_writelane_b32 v47, s4, 39 -; SI-NEXT: v_readfirstlane_b32 s4, v4 -; SI-NEXT: v_writelane_b32 v47, s4, 40 -; SI-NEXT: v_readfirstlane_b32 s4, v3 -; SI-NEXT: v_writelane_b32 v47, s4, 41 +; SI-NEXT: v_readfirstlane_b32 s96, v4 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 +; SI-NEXT: v_readfirstlane_b32 s86, v3 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 -; SI-NEXT: v_readfirstlane_b32 s69, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 -; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v23 -; SI-NEXT: s_and_b64 s[4:5], vcc, exec -; SI-NEXT: v_readfirstlane_b32 s4, v1 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248 -; SI-NEXT: v_writelane_b32 v47, s4, 42 -; SI-NEXT: v_readfirstlane_b32 s4, v0 +; SI-NEXT: v_readfirstlane_b32 s84, v11 +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:264 +; SI-NEXT: v_readfirstlane_b32 s6, v15 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:312 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:304 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:300 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296 +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:292 +; SI-NEXT: v_readfirstlane_b32 s80, v13 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:308 +; SI-NEXT: v_readfirstlane_b32 s59, v0 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:240 -; SI-NEXT: v_readfirstlane_b32 s83, v21 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:236 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:232 -; SI-NEXT: v_readfirstlane_b32 s86, v22 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:228 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:224 -; SI-NEXT: v_readfirstlane_b32 s99, v20 +; SI-NEXT: v_readfirstlane_b32 s98, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 +; SI-NEXT: ; implicit-def: $vgpr47 : SGPR spill to VGPR lane +; SI-NEXT: v_writelane_b32 v56, s4, 34 +; SI-NEXT: v_writelane_b32 v56, s6, 35 +; SI-NEXT: v_writelane_b32 v56, s56, 36 +; SI-NEXT: v_writelane_b32 v56, s57, 37 +; SI-NEXT: v_writelane_b32 v56, s59, 38 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_readfirstlane_b32 s15, v23 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:216 -; SI-NEXT: v_readfirstlane_b32 s17, v19 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:216 +; SI-NEXT: v_readfirstlane_b32 s46, v20 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:212 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:208 -; SI-NEXT: v_writelane_b32 v47, s4, 43 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_readfirstlane_b32 s66, v14 -; SI-NEXT: v_readfirstlane_b32 s84, v13 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192 -; SI-NEXT: v_readfirstlane_b32 s8, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:188 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184 -; SI-NEXT: v_readfirstlane_b32 s9, v11 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:180 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176 -; SI-NEXT: v_readfirstlane_b32 s16, v10 -; SI-NEXT: v_readfirstlane_b32 s46, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168 -; SI-NEXT: v_readfirstlane_b32 s24, v8 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:208 +; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22 +; SI-NEXT: v_readfirstlane_b32 s11, v19 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:236 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:232 +; SI-NEXT: v_readfirstlane_b32 s13, v21 +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:228 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224 +; SI-NEXT: s_and_b64 s[4:5], vcc, exec +; SI-NEXT: v_readfirstlane_b32 s49, v16 +; SI-NEXT: v_readfirstlane_b32 s60, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:80 +; SI-NEXT: v_readfirstlane_b32 s41, v17 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76 +; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 +; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:88 +; SI-NEXT: v_readfirstlane_b32 s25, v8 ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156 ; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:152 -; SI-NEXT: v_readfirstlane_b32 s29, v7 +; SI-NEXT: v_readfirstlane_b32 s97, v7 ; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148 ; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:144 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:204 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200 -; SI-NEXT: v_readfirstlane_b32 s10, v4 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_readfirstlane_b32 s27, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:136 +; SI-NEXT: v_readfirstlane_b32 s28, v5 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128 +; SI-NEXT: v_readfirstlane_b32 s69, v4 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:120 -; SI-NEXT: v_readfirstlane_b32 s13, v3 +; SI-NEXT: v_readfirstlane_b32 s45, v3 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:112 -; SI-NEXT: v_readfirstlane_b32 s19, v9 +; SI-NEXT: v_readfirstlane_b32 s83, v11 +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:108 +; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104 +; SI-NEXT: v_readfirstlane_b32 s23, v15 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:200 +; SI-NEXT: v_readfirstlane_b32 s55, v14 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:184 +; SI-NEXT: v_readfirstlane_b32 s66, v9 ; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164 ; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:160 -; SI-NEXT: v_readfirstlane_b32 s47, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:128 -; SI-NEXT: v_readfirstlane_b32 s27, v15 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:108 -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:104 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_readfirstlane_b32 s28, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96 -; SI-NEXT: v_readfirstlane_b32 s54, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:88 -; SI-NEXT: v_readfirstlane_b32 s59, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76 -; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:72 -; SI-NEXT: v_readfirstlane_b32 s61, v18 +; SI-NEXT: v_readfirstlane_b32 s37, v13 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:192 +; SI-NEXT: v_readfirstlane_b32 s78, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:176 +; SI-NEXT: v_readfirstlane_b32 s65, v18 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:68 ; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:64 -; SI-NEXT: v_readfirstlane_b32 s44, v1 -; SI-NEXT: v_readfirstlane_b32 s52, v21 -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:44 -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40 -; SI-NEXT: v_readfirstlane_b32 s53, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:36 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 -; SI-NEXT: v_readfirstlane_b32 s45, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:28 -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 -; SI-NEXT: v_readfirstlane_b32 s60, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:12 +; SI-NEXT: v_readfirstlane_b32 s47, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56 +; SI-NEXT: v_readfirstlane_b32 s81, v10 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:168 +; SI-NEXT: v_readfirstlane_b32 s87, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 +; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:96 +; SI-NEXT: v_readfirstlane_b32 s94, v25 +; SI-NEXT: v_readfirstlane_b32 s35, v23 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:12 ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 -; SI-NEXT: v_readfirstlane_b32 s62, v29 +; SI-NEXT: v_readfirstlane_b32 s48, v29 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 -; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:80 -; SI-NEXT: v_readfirstlane_b32 s14, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 -; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:56 -; SI-NEXT: v_readfirstlane_b32 s15, v23 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:52 -; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48 -; SI-NEXT: v_readfirstlane_b32 s56, v25 ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:20 ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16 -; SI-NEXT: v_writelane_b32 v46, s54, 0 -; SI-NEXT: v_writelane_b32 v46, s53, 1 -; SI-NEXT: v_readfirstlane_b32 s40, v19 -; SI-NEXT: v_readfirstlane_b32 s50, v13 -; SI-NEXT: v_readfirstlane_b32 s64, v27 -; SI-NEXT: v_readfirstlane_b32 s85, v12 -; SI-NEXT: v_readfirstlane_b32 s58, v28 -; SI-NEXT: v_readfirstlane_b32 s57, v11 -; SI-NEXT: v_readfirstlane_b32 s11, v30 -; SI-NEXT: v_readfirstlane_b32 s7, v6 -; SI-NEXT: v_writelane_b32 v46, s7, 2 -; SI-NEXT: v_writelane_b32 v46, s64, 3 -; SI-NEXT: v_writelane_b32 v46, s44, 4 -; SI-NEXT: v_writelane_b32 v46, s85, 5 -; SI-NEXT: v_writelane_b32 v46, s8, 6 -; SI-NEXT: v_writelane_b32 v46, s45, 7 -; SI-NEXT: v_writelane_b32 v46, s46, 8 -; SI-NEXT: v_writelane_b32 v46, s47, 9 -; SI-NEXT: v_writelane_b32 v46, s56, 10 -; SI-NEXT: v_writelane_b32 v46, s9, 11 -; SI-NEXT: v_writelane_b32 v46, s57, 12 -; SI-NEXT: v_writelane_b32 v46, s58, 13 -; SI-NEXT: v_writelane_b32 v46, s10, 14 +; SI-NEXT: v_readfirstlane_b32 s43, v20 ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_readfirstlane_b32 s92, v3 -; SI-NEXT: v_writelane_b32 v46, s11, 15 -; SI-NEXT: v_readfirstlane_b32 s12, v10 -; SI-NEXT: v_readfirstlane_b32 s30, v37 -; SI-NEXT: v_writelane_b32 v46, s59, 16 -; SI-NEXT: v_readfirstlane_b32 s36, v7 -; SI-NEXT: v_writelane_b32 v46, s12, 17 -; SI-NEXT: v_readfirstlane_b32 s48, v33 -; SI-NEXT: v_writelane_b32 v46, s60, 18 -; SI-NEXT: v_writelane_b32 v46, s61, 19 -; SI-NEXT: v_writelane_b32 v46, s13, 20 -; SI-NEXT: v_writelane_b32 v46, s62, 21 -; SI-NEXT: v_readfirstlane_b32 s6, v34 -; SI-NEXT: v_writelane_b32 v46, s14, 22 -; SI-NEXT: v_writelane_b32 v46, s15, 23 -; SI-NEXT: v_readfirstlane_b32 s41, v14 -; SI-NEXT: v_readfirstlane_b32 s51, v26 -; SI-NEXT: v_readfirstlane_b32 s87, v31 -; SI-NEXT: v_readfirstlane_b32 s23, v9 -; SI-NEXT: v_readfirstlane_b32 s25, v32 -; SI-NEXT: v_readfirstlane_b32 s26, v8 -; SI-NEXT: v_readfirstlane_b32 s4, v51 -; SI-NEXT: v_writelane_b32 v47, s4, 44 -; SI-NEXT: v_readfirstlane_b32 s4, v18 -; SI-NEXT: v_writelane_b32 v47, s4, 45 -; SI-NEXT: v_readfirstlane_b32 s4, v52 -; SI-NEXT: v_writelane_b32 v47, s4, 46 -; SI-NEXT: v_readfirstlane_b32 s4, v55 -; SI-NEXT: v_writelane_b32 v47, s4, 47 -; SI-NEXT: v_readfirstlane_b32 s4, v24 -; SI-NEXT: v_writelane_b32 v47, s4, 48 -; SI-NEXT: v_readfirstlane_b32 s4, v40 -; SI-NEXT: v_writelane_b32 v47, s4, 49 +; SI-NEXT: v_readfirstlane_b32 s16, v22 +; SI-NEXT: v_readfirstlane_b32 s19, v19 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:44 +; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:40 +; SI-NEXT: v_readfirstlane_b32 s85, v24 +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:36 +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 +; SI-NEXT: v_readfirstlane_b32 s42, v21 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:28 +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:52 +; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:48 +; SI-NEXT: v_readfirstlane_b32 s40, v1 +; SI-NEXT: v_readfirstlane_b32 s73, v50 +; SI-NEXT: v_readfirstlane_b32 s76, v17 +; SI-NEXT: v_writelane_b32 v47, s73, 0 +; SI-NEXT: v_writelane_b32 v47, s76, 1 +; SI-NEXT: v_readfirstlane_b32 s17, v8 +; SI-NEXT: v_readfirstlane_b32 s34, v33 +; SI-NEXT: v_readfirstlane_b32 s29, v7 +; SI-NEXT: v_readfirstlane_b32 s51, v34 +; SI-NEXT: v_readfirstlane_b32 s52, v6 +; SI-NEXT: v_readfirstlane_b32 s92, v51 +; SI-NEXT: v_readfirstlane_b32 s53, v16 +; SI-NEXT: v_readfirstlane_b32 s24, v35 +; SI-NEXT: v_readfirstlane_b32 s64, v4 +; SI-NEXT: v_writelane_b32 v47, s64, 2 +; SI-NEXT: v_readfirstlane_b32 s77, v3 +; SI-NEXT: v_readfirstlane_b32 vcc_hi, v37 +; SI-NEXT: v_writelane_b32 v47, s77, 3 +; SI-NEXT: v_readfirstlane_b32 s30, v38 +; SI-NEXT: v_writelane_b32 v47, vcc_hi, 4 +; SI-NEXT: v_readfirstlane_b32 s31, v11 +; SI-NEXT: v_writelane_b32 v47, s30, 5 +; SI-NEXT: v_writelane_b32 v47, s31, 6 +; SI-NEXT: v_writelane_b32 v47, s46, 7 +; SI-NEXT: v_readfirstlane_b32 s67, v9 +; SI-NEXT: v_writelane_b32 v47, s81, 8 +; SI-NEXT: v_readfirstlane_b32 s18, v32 +; SI-NEXT: v_writelane_b32 v47, s67, 9 +; SI-NEXT: v_writelane_b32 v47, s18, 10 +; SI-NEXT: v_writelane_b32 v47, s25, 11 +; SI-NEXT: v_writelane_b32 v47, s83, 12 +; SI-NEXT: v_writelane_b32 v47, s17, 13 +; SI-NEXT: v_writelane_b32 v47, s87, 14 +; SI-NEXT: v_writelane_b32 v47, s29, 15 +; SI-NEXT: v_writelane_b32 v47, s34, 16 +; SI-NEXT: v_writelane_b32 v47, s37, 17 +; SI-NEXT: v_writelane_b32 v47, s19, 18 +; SI-NEXT: v_readfirstlane_b32 s90, v13 +; SI-NEXT: v_writelane_b32 v47, s49, 19 +; SI-NEXT: v_readfirstlane_b32 s26, v26 +; SI-NEXT: v_writelane_b32 v47, s90, 20 +; SI-NEXT: v_writelane_b32 v47, s26, 21 +; SI-NEXT: v_writelane_b32 v47, s85, 22 +; SI-NEXT: v_writelane_b32 v47, s51, 23 +; SI-NEXT: v_writelane_b32 v47, s52, 24 +; SI-NEXT: v_writelane_b32 v47, s60, 25 +; SI-NEXT: v_readfirstlane_b32 s62, v27 +; SI-NEXT: v_writelane_b32 v47, s55, 26 +; SI-NEXT: v_writelane_b32 v47, s62, 27 +; SI-NEXT: v_readfirstlane_b32 s44, v14 +; SI-NEXT: v_writelane_b32 v47, s27, 28 +; SI-NEXT: v_writelane_b32 v47, s44, 29 +; SI-NEXT: v_writelane_b32 v47, s42, 30 +; SI-NEXT: v_writelane_b32 v47, s28, 31 +; SI-NEXT: v_writelane_b32 v47, s78, 32 +; SI-NEXT: v_readfirstlane_b32 s54, v12 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_readfirstlane_b32 s91, v18 +; SI-NEXT: v_writelane_b32 v47, s94, 33 +; SI-NEXT: v_readfirstlane_b32 s71, v28 ; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_readfirstlane_b32 s4, v41 -; SI-NEXT: v_writelane_b32 v47, s4, 50 +; SI-NEXT: v_readfirstlane_b32 s72, v43 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_readfirstlane_b32 s63, v29 +; SI-NEXT: v_writelane_b32 v56, s63, 39 ; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_readfirstlane_b32 s4, v43 -; SI-NEXT: v_writelane_b32 v47, s4, 51 +; SI-NEXT: v_readfirstlane_b32 s74, v44 +; SI-NEXT: v_writelane_b32 v56, s72, 40 +; SI-NEXT: v_writelane_b32 v56, s74, 41 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_readfirstlane_b32 s4, v29 -; SI-NEXT: v_writelane_b32 v47, s4, 52 -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_readfirstlane_b32 s4, v44 -; SI-NEXT: v_writelane_b32 v47, s4, 53 -; SI-NEXT: v_writelane_b32 v47, s92, 54 -; SI-NEXT: v_writelane_b32 v47, s30, 55 -; SI-NEXT: v_writelane_b32 v47, s36, 56 -; SI-NEXT: v_writelane_b32 v47, s48, 57 -; SI-NEXT: v_writelane_b32 v47, s66, 58 -; SI-NEXT: v_writelane_b32 v47, s52, 59 -; SI-NEXT: v_writelane_b32 v47, s84, 60 -; SI-NEXT: v_writelane_b32 v47, s6, 61 -; SI-NEXT: v_readfirstlane_b32 s67, v35 -; SI-NEXT: v_readfirstlane_b32 s94, v5 -; SI-NEXT: v_readfirstlane_b32 s65, v36 -; SI-NEXT: v_readfirstlane_b32 s22, v4 -; SI-NEXT: v_readfirstlane_b32 s18, v38 -; SI-NEXT: v_readfirstlane_b32 s20, v15 -; SI-NEXT: v_readfirstlane_b32 s35, v39 -; SI-NEXT: v_readfirstlane_b32 s31, v2 -; SI-NEXT: v_readfirstlane_b32 s78, v48 -; SI-NEXT: v_readfirstlane_b32 s98, v16 -; SI-NEXT: v_readfirstlane_b32 s97, v49 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_readfirstlane_b32 s55, v1 +; SI-NEXT: v_readfirstlane_b32 s7, v25 ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_readfirstlane_b32 s81, v50 -; SI-NEXT: v_readfirstlane_b32 s71, v17 +; SI-NEXT: v_readfirstlane_b32 s79, v55 ; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_readfirstlane_b32 s96, v0 +; SI-NEXT: v_readfirstlane_b32 s75, v24 +; SI-NEXT: v_writelane_b32 v56, s75, 42 ; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_readfirstlane_b32 s79, v53 +; SI-NEXT: v_readfirstlane_b32 s88, v40 +; SI-NEXT: v_writelane_b32 v56, s79, 43 ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_readfirstlane_b32 s90, v23 +; SI-NEXT: v_readfirstlane_b32 s89, v21 +; SI-NEXT: v_writelane_b32 v56, s88, 44 +; SI-NEXT: v_writelane_b32 v56, s89, 45 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_readfirstlane_b32 s37, v54 -; SI-NEXT: v_readfirstlane_b32 s82, v21 -; SI-NEXT: v_readfirstlane_b32 s80, v22 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_readfirstlane_b32 s70, v25 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_readfirstlane_b32 s76, v42 -; SI-NEXT: v_readfirstlane_b32 s21, v20 -; SI-NEXT: v_writelane_b32 v47, s50, 62 -; SI-NEXT: v_writelane_b32 v46, s40, 24 -; SI-NEXT: v_writelane_b32 v47, s51, 63 -; SI-NEXT: v_writelane_b32 v46, s41, 25 +; SI-NEXT: v_readfirstlane_b32 s8, v41 +; SI-NEXT: v_writelane_b32 v56, s7, 46 +; SI-NEXT: v_writelane_b32 v56, s8, 47 +; SI-NEXT: v_writelane_b32 v56, s91, 48 +; SI-NEXT: v_writelane_b32 v47, s54, 34 +; SI-NEXT: v_readfirstlane_b32 s9, v42 +; SI-NEXT: v_writelane_b32 v56, s92, 49 +; SI-NEXT: v_writelane_b32 v47, s71, 35 +; SI-NEXT: v_readfirstlane_b32 s10, v23 +; SI-NEXT: v_writelane_b32 v56, s9, 50 +; SI-NEXT: v_writelane_b32 v47, s69, 36 +; SI-NEXT: v_readfirstlane_b32 s38, v30 +; SI-NEXT: v_readfirstlane_b32 s93, v52 +; SI-NEXT: v_writelane_b32 v56, s10, 51 +; SI-NEXT: v_writelane_b32 v47, s41, 37 +; SI-NEXT: v_readfirstlane_b32 s95, v0 +; SI-NEXT: v_writelane_b32 v56, s93, 52 +; SI-NEXT: v_writelane_b32 v47, s38, 38 +; SI-NEXT: v_readfirstlane_b32 s22, v10 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_readfirstlane_b32 s12, v22 +; SI-NEXT: v_writelane_b32 v56, s95, 53 +; SI-NEXT: v_writelane_b32 v47, s65, 39 +; SI-NEXT: v_readfirstlane_b32 s14, v53 +; SI-NEXT: v_writelane_b32 v56, s12, 54 +; SI-NEXT: v_writelane_b32 v47, s22, 40 +; SI-NEXT: v_readfirstlane_b32 s39, v2 +; SI-NEXT: v_writelane_b32 v56, s14, 55 +; SI-NEXT: v_writelane_b32 v47, s35, 41 +; SI-NEXT: v_readfirstlane_b32 s50, v39 +; SI-NEXT: v_writelane_b32 v56, s39, 56 +; SI-NEXT: v_writelane_b32 v47, s45, 42 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_readfirstlane_b32 s20, v54 +; SI-NEXT: v_writelane_b32 v56, s50, 57 +; SI-NEXT: v_writelane_b32 v47, s48, 43 +; SI-NEXT: v_readfirstlane_b32 s21, v19 +; SI-NEXT: v_writelane_b32 v56, s20, 58 +; SI-NEXT: v_writelane_b32 v47, s47, 44 +; SI-NEXT: v_readfirstlane_b32 s36, v48 +; SI-NEXT: v_writelane_b32 v56, s21, 59 +; SI-NEXT: v_writelane_b32 v47, s16, 45 +; SI-NEXT: v_readfirstlane_b32 s99, v15 +; SI-NEXT: v_writelane_b32 v56, s36, 60 +; SI-NEXT: v_writelane_b32 v47, s43, 46 +; SI-NEXT: v_writelane_b32 v56, s53, 61 +; SI-NEXT: v_writelane_b32 v47, s99, 47 +; SI-NEXT: v_readfirstlane_b32 s58, v31 +; SI-NEXT: v_readfirstlane_b32 s68, v5 +; SI-NEXT: v_readfirstlane_b32 s82, v36 +; SI-NEXT: v_readfirstlane_b32 s61, v49 +; SI-NEXT: v_writelane_b32 v56, s40, 62 +; SI-NEXT: v_writelane_b32 v47, s23, 48 +; SI-NEXT: v_writelane_b32 v56, s61, 63 +; SI-NEXT: v_writelane_b32 v47, s58, 49 ; SI-NEXT: s_cbranch_scc0 .LBB97_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_readlane_b32 s4, v47, 13 -; SI-NEXT: v_readlane_b32 s5, v47, 12 +; SI-NEXT: v_readlane_b32 s4, v56, 13 +; SI-NEXT: v_readlane_b32 s5, v56, 12 ; SI-NEXT: s_and_b32 s4, s4, 0xff ; SI-NEXT: s_lshl_b32 s5, s5, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 26 -; SI-NEXT: v_readlane_b32 s4, v47, 5 -; SI-NEXT: v_readlane_b32 s5, v47, 4 +; SI-NEXT: v_writelane_b32 v47, s4, 50 +; SI-NEXT: v_readlane_b32 s4, v56, 11 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_readlane_b32 s5, v47, 41 -; SI-NEXT: v_writelane_b32 v46, s4, 28 -; SI-NEXT: s_and_b32 s4, s69, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: v_writelane_b32 v46, s69, 44 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 30 -; SI-NEXT: v_readlane_b32 s4, v47, 34 -; SI-NEXT: v_readlane_b32 s5, v47, 33 +; SI-NEXT: s_mov_b32 s5, s6 +; SI-NEXT: v_readlane_b32 s6, v56, 10 +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s6, 24 +; SI-NEXT: s_or_b32 vcc_lo, s6, s4 +; SI-NEXT: v_readlane_b32 s4, v56, 5 +; SI-NEXT: v_readlane_b32 s6, v56, 4 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 32 -; SI-NEXT: v_readlane_b32 s4, v47, 26 -; SI-NEXT: v_readlane_b32 s5, v47, 25 +; SI-NEXT: s_lshl_b32 s6, s6, 8 +; SI-NEXT: s_or_b32 s4, s4, s6 +; SI-NEXT: v_writelane_b32 v47, s4, 54 +; SI-NEXT: v_readlane_b32 s4, v56, 3 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 34 -; SI-NEXT: v_readlane_b32 s4, v47, 18 -; SI-NEXT: v_readlane_b32 s5, v47, 17 +; SI-NEXT: v_readlane_b32 s6, v56, 2 +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s6, 24 +; SI-NEXT: ; implicit-def: $vgpr46 : SGPR spill to VGPR lane +; SI-NEXT: v_writelane_b32 v46, s24, 0 +; SI-NEXT: s_mov_b32 s24, s68 +; SI-NEXT: s_or_b32 s68, s6, s4 +; SI-NEXT: s_and_b32 s4, s98, 0xff +; SI-NEXT: s_lshl_b32 s6, s86, 8 +; SI-NEXT: s_or_b32 s4, s4, s6 +; SI-NEXT: v_writelane_b32 v47, s4, 56 +; SI-NEXT: s_and_b32 s4, s96, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s70, 24 +; SI-NEXT: v_writelane_b32 v46, s70, 1 +; SI-NEXT: s_or_b32 s70, s6, s4 +; SI-NEXT: v_readlane_b32 s4, v56, 31 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 36 -; SI-NEXT: s_and_b32 s4, s21, 0xff -; SI-NEXT: s_lshl_b32 s5, s76, 8 -; SI-NEXT: v_writelane_b32 v46, s24, 45 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 38 -; SI-NEXT: s_and_b32 s4, s82, 0xff -; SI-NEXT: s_lshl_b32 s5, s37, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 40 -; SI-NEXT: s_and_b32 s4, s71, 0xff -; SI-NEXT: s_lshl_b32 s5, s81, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 42 -; SI-NEXT: s_and_b32 s4, s20, 0xff -; SI-NEXT: s_lshl_b32 s5, s18, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 46 -; SI-NEXT: s_and_b32 s4, s7, 0xff -; SI-NEXT: s_lshl_b32 s5, s6, 8 -; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: v_writelane_b32 v46, s4, 47 -; SI-NEXT: s_and_b32 s4, s12, 0xff -; SI-NEXT: s_lshl_b32 s5, s11, 8 -; SI-NEXT: s_or_b32 s63, s4, s5 -; SI-NEXT: s_and_b32 s4, s41, 0xff -; SI-NEXT: s_lshl_b32 s5, s40, 8 -; SI-NEXT: s_or_b32 s72, s4, s5 -; SI-NEXT: s_and_b32 s4, s15, 0xff -; SI-NEXT: s_lshl_b32 s5, s14, 8 -; SI-NEXT: s_or_b32 s73, s4, s5 -; SI-NEXT: s_and_b32 s4, s13, 0xff -; SI-NEXT: s_lshl_b32 s5, s10, 8 -; SI-NEXT: s_or_b32 s74, s4, s5 -; SI-NEXT: s_and_b32 s4, s9, 0xff -; SI-NEXT: s_lshl_b32 s5, s8, 8 -; SI-NEXT: s_or_b32 s75, s4, s5 -; SI-NEXT: v_readlane_b32 s4, v47, 9 -; SI-NEXT: v_readlane_b32 s5, v47, 8 +; SI-NEXT: s_lshl_b32 s6, s84, 8 +; SI-NEXT: s_or_b32 s4, s4, s6 +; SI-NEXT: v_writelane_b32 v47, s4, 58 +; SI-NEXT: v_readlane_b32 s4, v56, 30 +; SI-NEXT: v_writelane_b32 v46, s11, 2 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 8 -; SI-NEXT: s_or_b32 s5, s4, s5 -; SI-NEXT: v_readlane_b32 s4, v47, 7 +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s80, 24 +; SI-NEXT: v_writelane_b32 v46, s96, 3 +; SI-NEXT: v_writelane_b32 v46, s80, 4 +; SI-NEXT: s_or_b32 s80, s6, s4 +; SI-NEXT: v_readlane_b32 s4, v56, 26 +; SI-NEXT: v_readlane_b32 s6, v56, 25 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s6, s6, 8 +; SI-NEXT: v_writelane_b32 v46, s13, 5 +; SI-NEXT: s_or_b32 s13, s4, s6 +; SI-NEXT: v_readlane_b32 s4, v56, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: v_readlane_b32 s6, v47, 6 +; SI-NEXT: v_readlane_b32 s6, v56, 23 ; SI-NEXT: s_lshl_b32 s4, s4, 16 ; SI-NEXT: s_lshl_b32 s6, s6, 24 -; SI-NEXT: s_or_b32 s68, s6, s4 -; SI-NEXT: v_readlane_b32 s4, v47, 11 +; SI-NEXT: v_writelane_b32 v46, s82, 6 +; SI-NEXT: s_or_b32 s82, s6, s4 +; SI-NEXT: v_readlane_b32 s4, v56, 18 +; SI-NEXT: v_readlane_b32 s6, v56, 17 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: v_writelane_b32 v46, s84, 7 +; SI-NEXT: s_lshl_b32 s6, s6, 8 +; SI-NEXT: v_writelane_b32 v46, s15, 8 +; SI-NEXT: s_or_b32 s15, s4, s6 +; SI-NEXT: v_readlane_b32 s4, v56, 16 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: v_readlane_b32 s6, v47, 10 +; SI-NEXT: v_readlane_b32 s6, v56, 15 ; SI-NEXT: s_lshl_b32 s4, s4, 16 ; SI-NEXT: s_lshl_b32 s6, s6, 24 -; SI-NEXT: s_or_b32 s4, s6, s4 -; SI-NEXT: v_readlane_b32 s6, v47, 1 -; SI-NEXT: v_readlane_b32 s7, v47, 0 -; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: s_lshl_b32 s7, s7, 8 -; SI-NEXT: s_or_b32 s7, s6, s7 -; SI-NEXT: v_readlane_b32 s6, v47, 43 -; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: v_readlane_b32 s8, v47, 42 -; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s8, s8, 24 -; SI-NEXT: s_or_b32 s91, s8, s6 -; SI-NEXT: v_readlane_b32 s6, v47, 3 -; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: v_readlane_b32 s8, v47, 2 -; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s8, s8, 24 -; SI-NEXT: s_or_b32 s6, s8, s6 -; SI-NEXT: v_readlane_b32 s8, v47, 38 -; SI-NEXT: v_readlane_b32 s9, v47, 37 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: s_lshl_b32 s9, s9, 8 -; SI-NEXT: s_or_b32 s9, s8, s9 -; SI-NEXT: v_readlane_b32 s8, v47, 36 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s10, v47, 35 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s10, s10, 24 -; SI-NEXT: s_or_b32 s88, s10, s8 -; SI-NEXT: v_readlane_b32 s8, v47, 40 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s10, v47, 39 -; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s10, s10, 24 -; SI-NEXT: s_or_b32 s8, s10, s8 -; SI-NEXT: v_readlane_b32 s10, v47, 30 -; SI-NEXT: v_readlane_b32 s11, v47, 29 -; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: s_lshl_b32 s11, s11, 8 -; SI-NEXT: s_or_b32 s11, s10, s11 -; SI-NEXT: v_readlane_b32 s10, v47, 28 -; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s12, v47, 27 -; SI-NEXT: s_lshl_b32 s10, s10, 16 -; SI-NEXT: s_lshl_b32 s12, s12, 24 -; SI-NEXT: s_or_b32 s95, s12, s10 -; SI-NEXT: v_readlane_b32 s10, v47, 32 -; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s12, v47, 31 -; SI-NEXT: s_lshl_b32 s10, s10, 16 -; SI-NEXT: s_lshl_b32 s12, s12, 24 -; SI-NEXT: s_or_b32 s10, s12, s10 -; SI-NEXT: v_readlane_b32 s12, v47, 22 -; SI-NEXT: v_readlane_b32 s13, v47, 21 -; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: s_lshl_b32 s13, s13, 8 -; SI-NEXT: s_or_b32 s13, s12, s13 -; SI-NEXT: v_readlane_b32 s12, v47, 20 -; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s14, v47, 19 -; SI-NEXT: s_lshl_b32 s12, s12, 16 -; SI-NEXT: s_lshl_b32 s14, s14, 24 -; SI-NEXT: s_or_b32 s89, s14, s12 -; SI-NEXT: v_readlane_b32 s12, v47, 24 -; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s14, v47, 23 -; SI-NEXT: s_lshl_b32 s12, s12, 16 -; SI-NEXT: s_lshl_b32 s14, s14, 24 -; SI-NEXT: s_or_b32 s12, s14, s12 -; SI-NEXT: v_readlane_b32 s14, v47, 14 -; SI-NEXT: v_readlane_b32 s15, v47, 53 -; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: s_lshl_b32 s15, s15, 8 -; SI-NEXT: v_writelane_b32 v46, s71, 48 -; SI-NEXT: s_or_b32 s15, s14, s15 -; SI-NEXT: v_readlane_b32 s14, v47, 52 -; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: v_writelane_b32 v46, s16, 49 -; SI-NEXT: v_readlane_b32 s16, v47, 51 -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: v_writelane_b32 v46, s18, 50 -; SI-NEXT: s_lshl_b32 s18, s16, 24 -; SI-NEXT: s_or_b32 s93, s18, s14 -; SI-NEXT: v_readlane_b32 s14, v47, 16 -; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: v_readlane_b32 s16, v47, 15 -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: s_lshl_b32 s18, s16, 24 -; SI-NEXT: v_readlane_b32 s16, v47, 49 -; SI-NEXT: s_or_b32 s14, s18, s14 -; SI-NEXT: s_and_b32 s18, s80, 0xff -; SI-NEXT: s_lshl_b32 s40, s16, 8 -; SI-NEXT: v_readlane_b32 s16, v47, 48 -; SI-NEXT: s_or_b32 s41, s18, s40 -; SI-NEXT: s_and_b32 s18, s16, 0xff -; SI-NEXT: v_readlane_b32 s16, v47, 47 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_lshl_b32 s40, s16, 24 -; SI-NEXT: s_mov_b32 s24, s21 -; SI-NEXT: s_or_b32 s21, s40, s18 -; SI-NEXT: s_and_b32 s40, s70, 0xff -; SI-NEXT: v_readlane_b32 s18, v47, 50 -; SI-NEXT: s_lshl_b32 s40, s40, 16 -; SI-NEXT: s_lshl_b32 s42, s18, 24 -; SI-NEXT: v_readlane_b32 s18, v47, 46 -; SI-NEXT: s_or_b32 s40, s42, s40 -; SI-NEXT: s_and_b32 s42, s96, 0xff -; SI-NEXT: s_lshl_b32 s43, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v47, 45 -; SI-NEXT: s_or_b32 s43, s42, s43 -; SI-NEXT: s_and_b32 s42, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v47, 44 -; SI-NEXT: s_mov_b32 s34, s76 -; SI-NEXT: s_lshl_b32 s42, s42, 16 -; SI-NEXT: s_lshl_b32 s76, s18, 24 -; SI-NEXT: s_or_b32 s69, s76, s42 -; SI-NEXT: s_and_b32 s42, s90, 0xff -; SI-NEXT: s_lshl_b32 s42, s42, 16 -; SI-NEXT: s_lshl_b32 s76, s79, 24 -; SI-NEXT: s_or_b32 s42, s76, s42 -; SI-NEXT: s_and_b32 s76, s98, 0xff -; SI-NEXT: s_lshl_b32 s77, s78, 8 -; SI-NEXT: v_writelane_b32 v46, s20, 51 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s31, 0xff -; SI-NEXT: v_writelane_b32 v46, s78, 52 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s35, 24 -; SI-NEXT: s_mov_b32 s16, s70 -; SI-NEXT: s_or_b32 s70, s78, s77 -; SI-NEXT: s_and_b32 s77, s55, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s97, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_or_b32 vcc_lo, s78, s77 -; SI-NEXT: s_or_b32 vcc_hi, s76, s70 -; SI-NEXT: s_and_b32 s76, s22, 0xff -; SI-NEXT: s_lshl_b32 s77, s65, 8 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s94, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s67, 24 -; SI-NEXT: s_or_b32 s71, s78, s77 -; SI-NEXT: s_and_b32 s77, s92, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s30, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_or_b32 s38, s78, s77 -; SI-NEXT: s_or_b32 s39, s76, s71 -; SI-NEXT: s_and_b32 s76, s26, 0xff -; SI-NEXT: s_lshl_b32 s77, s25, 8 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s23, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s87, 24 -; SI-NEXT: v_writelane_b32 v46, s80, 53 -; SI-NEXT: s_or_b32 s80, s78, s77 -; SI-NEXT: s_and_b32 s77, s36, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s48, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_or_b32 s48, s78, s77 -; SI-NEXT: s_or_b32 s49, s76, s80 -; SI-NEXT: s_and_b32 s76, s85, 0xff -; SI-NEXT: s_lshl_b32 s77, s64, 8 -; SI-NEXT: v_writelane_b32 v46, s98, 54 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s50, 0xff -; SI-NEXT: v_writelane_b32 v46, s24, 55 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s51, 24 -; SI-NEXT: v_writelane_b32 v46, s34, 56 -; SI-NEXT: v_writelane_b32 v46, s81, 57 -; SI-NEXT: s_or_b32 s81, s78, s77 -; SI-NEXT: s_and_b32 s77, s57, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s58, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_or_b32 s50, s78, s77 -; SI-NEXT: s_or_b32 s51, s76, s81 -; SI-NEXT: s_and_b32 s76, s56, 0xff -; SI-NEXT: s_lshl_b32 s77, s45, 8 -; SI-NEXT: v_writelane_b32 v46, s22, 58 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s53, 0xff -; SI-NEXT: v_writelane_b32 v46, s65, 59 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s52, 24 -; SI-NEXT: v_writelane_b32 v46, s67, 60 -; SI-NEXT: v_writelane_b32 v46, s94, 61 -; SI-NEXT: s_mov_b32 s94, s82 -; SI-NEXT: s_or_b32 s82, s78, s77 -; SI-NEXT: s_and_b32 s77, s62, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s60, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_or_b32 s52, s78, s77 -; SI-NEXT: s_or_b32 s53, s76, s82 -; SI-NEXT: s_and_b32 s76, s44, 0xff -; SI-NEXT: s_lshl_b32 s77, s54, 8 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s28, 0xff -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s27, 24 -; SI-NEXT: v_writelane_b32 v46, s97, 62 -; SI-NEXT: s_mov_b32 s92, s28 -; SI-NEXT: s_mov_b32 s28, s27 -; SI-NEXT: s_mov_b32 s27, s26 -; SI-NEXT: s_mov_b32 s26, s25 -; SI-NEXT: s_mov_b32 s25, s87 -; SI-NEXT: s_or_b32 s87, s78, s77 -; SI-NEXT: s_and_b32 s77, s61, 0xff -; SI-NEXT: s_mov_b32 s24, s23 -; SI-NEXT: s_mov_b32 s23, s16 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s59, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: v_readlane_b32 s16, v46, 45 -; SI-NEXT: s_mov_b32 s85, s55 -; SI-NEXT: s_or_b32 s54, s78, s77 -; SI-NEXT: s_or_b32 s55, s76, s87 -; SI-NEXT: s_and_b32 s76, s29, 0xff -; SI-NEXT: s_lshl_b32 s77, s16, 8 -; SI-NEXT: v_readlane_b32 s18, v46, 26 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s19, 0xff -; SI-NEXT: v_readlane_b32 s16, v46, 49 -; SI-NEXT: s_and_b32 s44, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 28 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s16, 24 -; SI-NEXT: s_and_b32 s45, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 30 -; SI-NEXT: s_mov_b32 s20, s19 -; SI-NEXT: s_mov_b32 s19, s37 -; SI-NEXT: s_mov_b32 s37, s35 -; SI-NEXT: s_mov_b32 s35, s31 -; SI-NEXT: s_mov_b32 s31, s79 -; SI-NEXT: s_mov_b32 s79, s90 -; SI-NEXT: s_mov_b32 s90, s96 -; SI-NEXT: s_or_b32 s96, s78, s77 -; SI-NEXT: s_lshl_b32 s78, s46, 24 -; SI-NEXT: s_and_b32 s46, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 32 -; SI-NEXT: s_and_b32 s77, s47, 0xff -; SI-NEXT: s_and_b32 s47, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 34 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_and_b32 s56, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 36 -; SI-NEXT: s_or_b32 s64, s78, s77 -; SI-NEXT: s_or_b32 s65, s76, s96 -; SI-NEXT: s_and_b32 s76, s17, 0xff -; SI-NEXT: s_lshl_b32 s77, s99, 8 -; SI-NEXT: s_and_b32 s57, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 38 -; SI-NEXT: s_or_b32 s76, s76, s77 -; SI-NEXT: s_and_b32 s77, s86, 0xff -; SI-NEXT: s_and_b32 s30, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 40 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s83, 24 -; SI-NEXT: s_and_b32 s34, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 42 +; SI-NEXT: s_or_b32 s84, s6, s4 +; SI-NEXT: s_and_b32 s4, s10, 0xff +; SI-NEXT: s_lshl_b32 s6, s9, 8 +; SI-NEXT: s_or_b32 s11, s4, s6 +; SI-NEXT: s_and_b32 s4, s7, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s8, 24 +; SI-NEXT: v_writelane_b32 v46, s86, 9 +; SI-NEXT: s_or_b32 s86, s6, s4 +; SI-NEXT: s_and_b32 s4, s21, 0xff +; SI-NEXT: s_lshl_b32 s6, s20, 8 +; SI-NEXT: s_or_b32 s9, s4, s6 +; SI-NEXT: s_and_b32 s4, s12, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s14, 24 +; SI-NEXT: s_or_b32 s96, s6, s4 +; SI-NEXT: s_and_b32 s4, s76, 0xff +; SI-NEXT: s_lshl_b32 s6, s73, 8 +; SI-NEXT: s_or_b32 s7, s4, s6 +; SI-NEXT: s_and_b32 s4, s40, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s61, 24 +; SI-NEXT: v_writelane_b32 v46, s98, 10 +; SI-NEXT: s_or_b32 s98, s6, s4 +; SI-NEXT: s_and_b32 s4, s31, 0xff +; SI-NEXT: s_lshl_b32 s6, s30, 8 +; SI-NEXT: s_or_b32 s76, s4, s6 +; SI-NEXT: s_and_b32 s4, s77, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, vcc_hi, 24 +; SI-NEXT: s_or_b32 s40, s6, s4 +; SI-NEXT: s_and_b32 s4, s52, 0xff +; SI-NEXT: s_lshl_b32 s6, s51, 8 +; SI-NEXT: s_or_b32 vcc_hi, s4, s6 +; SI-NEXT: s_and_b32 s4, s29, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s34, 24 +; SI-NEXT: s_or_b32 s14, s6, s4 +; SI-NEXT: s_and_b32 s4, s22, 0xff +; SI-NEXT: s_lshl_b32 s6, s38, 8 +; SI-NEXT: s_or_b32 s52, s4, s6 +; SI-NEXT: s_and_b32 s4, s54, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s71, 24 +; SI-NEXT: s_or_b32 s12, s6, s4 +; SI-NEXT: s_and_b32 s4, s99, 0xff +; SI-NEXT: s_lshl_b32 s6, s43, 8 +; SI-NEXT: s_or_b32 s54, s4, s6 +; SI-NEXT: s_and_b32 s4, s48, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s35, 24 +; SI-NEXT: s_or_b32 s10, s6, s4 +; SI-NEXT: s_and_b32 s4, s16, 0xff +; SI-NEXT: s_lshl_b32 s6, s47, 8 +; SI-NEXT: s_or_b32 s34, s4, s6 +; SI-NEXT: s_and_b32 s4, s65, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s41, 24 +; SI-NEXT: s_or_b32 s8, s6, s4 +; SI-NEXT: s_and_b32 s4, s45, 0xff +; SI-NEXT: s_lshl_b32 s6, s69, 8 +; SI-NEXT: s_or_b32 s30, s4, s6 +; SI-NEXT: s_and_b32 s4, s28, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s6, s27, 24 +; SI-NEXT: s_or_b32 s6, s6, s4 +; SI-NEXT: s_and_b32 s4, s78, 0xff +; SI-NEXT: s_lshl_b32 s20, s55, 8 +; SI-NEXT: s_or_b32 s41, s4, s20 +; SI-NEXT: s_and_b32 s4, s37, 0xff +; SI-NEXT: s_lshl_b32 s4, s4, 16 +; SI-NEXT: s_lshl_b32 s20, s23, 24 +; SI-NEXT: s_or_b32 s4, s20, s4 +; SI-NEXT: v_readlane_b32 s20, v56, 9 +; SI-NEXT: v_readlane_b32 s22, v56, 8 +; SI-NEXT: s_and_b32 s21, s20, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 8 +; SI-NEXT: s_or_b32 s69, s21, s22 +; SI-NEXT: v_readlane_b32 s21, v56, 7 +; SI-NEXT: s_and_b32 s21, s21, 0xff +; SI-NEXT: v_readlane_b32 s20, v56, 6 +; SI-NEXT: s_lshl_b32 s21, s21, 16 +; SI-NEXT: s_lshl_b32 s22, s20, 24 +; SI-NEXT: s_or_b32 s51, s22, s21 +; SI-NEXT: v_readlane_b32 s21, v56, 1 +; SI-NEXT: v_readlane_b32 s20, v56, 0 +; SI-NEXT: s_and_b32 s22, s21, 0xff +; SI-NEXT: s_lshl_b32 s27, s20, 8 +; SI-NEXT: s_or_b32 s71, s22, s27 +; SI-NEXT: s_and_b32 s22, s59, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s27, s57, 24 +; SI-NEXT: v_readlane_b32 s16, v56, 34 +; SI-NEXT: s_or_b32 s27, s27, s22 +; SI-NEXT: s_and_b32 s22, s56, 0xff +; SI-NEXT: s_lshl_b32 s28, s16, 8 +; SI-NEXT: v_readlane_b32 s16, v56, 33 +; SI-NEXT: s_or_b32 s61, s22, s28 +; SI-NEXT: s_and_b32 s22, s16, 0xff +; SI-NEXT: v_readlane_b32 s16, v56, 32 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s16, 24 +; SI-NEXT: v_readlane_b32 s20, v56, 29 +; SI-NEXT: s_or_b32 s16, s28, s22 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: s_lshl_b32 s28, s5, 8 +; SI-NEXT: v_readlane_b32 s20, v56, 28 +; SI-NEXT: s_or_b32 s73, s22, s28 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: v_readlane_b32 s20, v56, 27 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s20, 24 +; SI-NEXT: v_readlane_b32 s20, v56, 22 +; SI-NEXT: s_or_b32 s43, s28, s22 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: v_readlane_b32 s20, v56, 21 +; SI-NEXT: s_lshl_b32 s28, s20, 8 +; SI-NEXT: v_readlane_b32 s20, v56, 20 +; SI-NEXT: s_or_b32 s77, s22, s28 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: v_readlane_b32 s20, v56, 19 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s20, 24 +; SI-NEXT: v_readlane_b32 s20, v56, 14 +; SI-NEXT: s_or_b32 s47, s28, s22 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: s_lshl_b32 s28, s74, 8 +; SI-NEXT: s_or_b32 s21, s22, s28 +; SI-NEXT: s_and_b32 s22, s63, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s72, 24 +; SI-NEXT: s_or_b32 s59, s28, s22 +; SI-NEXT: s_and_b32 s22, s89, 0xff +; SI-NEXT: s_lshl_b32 s28, s88, 8 +; SI-NEXT: s_or_b32 s37, s22, s28 +; SI-NEXT: s_and_b32 s22, s75, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s79, 24 +; SI-NEXT: s_or_b32 s63, s28, s22 +; SI-NEXT: s_and_b32 s22, s95, 0xff +; SI-NEXT: s_lshl_b32 s28, s93, 8 +; SI-NEXT: s_or_b32 s65, s22, s28 +; SI-NEXT: s_and_b32 s22, s91, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s92, 24 +; SI-NEXT: s_or_b32 s75, s28, s22 +; SI-NEXT: s_and_b32 s22, s53, 0xff +; SI-NEXT: s_lshl_b32 s28, s36, 8 +; SI-NEXT: s_or_b32 s36, s22, s28 +; SI-NEXT: s_and_b32 s22, s39, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s50, 24 +; SI-NEXT: v_readlane_b32 s20, v46, 6 +; SI-NEXT: s_or_b32 s55, s28, s22 +; SI-NEXT: s_and_b32 s22, s64, 0xff +; SI-NEXT: s_lshl_b32 s28, s20, 8 +; SI-NEXT: s_or_b32 s35, s22, s28 +; SI-NEXT: s_and_b32 s22, s24, 0xff +; SI-NEXT: v_readlane_b32 s20, v46, 0 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s20, 24 +; SI-NEXT: s_or_b32 s57, s28, s22 +; SI-NEXT: s_and_b32 s22, s17, 0xff +; SI-NEXT: s_lshl_b32 s28, s18, 8 +; SI-NEXT: s_or_b32 s17, s22, s28 +; SI-NEXT: s_and_b32 s22, s67, 0xff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s58, 24 +; SI-NEXT: s_or_b32 s88, s28, s22 +; SI-NEXT: s_and_b32 s22, s44, 0xff +; SI-NEXT: s_lshl_b32 s28, s62, 8 +; SI-NEXT: s_or_b32 s89, s22, s28 +; SI-NEXT: s_and_b32 s22, s90, 0xff +; SI-NEXT: v_readlane_b32 s5, v47, 50 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s26, 24 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_mov_b32 s16, s83 -; SI-NEXT: s_or_b32 s83, s78, s77 -; SI-NEXT: s_and_b32 s77, s84, 0xff -; SI-NEXT: s_and_b32 s36, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 46 -; SI-NEXT: s_or_b32 s5, s5, s68 -; SI-NEXT: s_lshl_b32 s77, s77, 16 -; SI-NEXT: s_lshl_b32 s78, s66, 24 -; SI-NEXT: s_and_b32 s76, s76, 0xffff -; SI-NEXT: s_and_b32 s84, s18, 0xffff -; SI-NEXT: v_readlane_b32 s18, v46, 47 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_or_b32 s66, s78, s77 -; SI-NEXT: s_or_b32 s67, s76, s83 -; SI-NEXT: s_mov_b32 s78, s86 -; SI-NEXT: s_and_b32 s86, s18, 0xffff -; SI-NEXT: s_mov_b32 s76, s99 -; SI-NEXT: s_and_b32 s99, s74, 0xffff -; SI-NEXT: s_and_b32 s18, s75, 0xffff -; SI-NEXT: s_or_b32 s74, s44, s4 -; SI-NEXT: s_mov_b32 s75, s5 -; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16 -; SI-NEXT: s_or_b32 s7, s7, s91 -; SI-NEXT: v_writelane_b32 v46, s4, 26 -; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 27 -; SI-NEXT: s_lshr_b64 s[4:5], s[6:7], 16 -; SI-NEXT: s_or_b32 s9, s9, s88 -; SI-NEXT: v_writelane_b32 v46, s4, 28 -; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 29 -; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 16 -; SI-NEXT: s_or_b32 s11, s11, s95 -; SI-NEXT: v_writelane_b32 v46, s4, 30 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 31 -; SI-NEXT: s_lshr_b64 s[4:5], s[10:11], 16 -; SI-NEXT: s_or_b32 s13, s13, s89 -; SI-NEXT: v_writelane_b32 v46, s4, 32 -; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 33 -; SI-NEXT: s_lshr_b64 s[4:5], s[12:13], 16 -; SI-NEXT: s_or_b32 s15, s15, s93 -; SI-NEXT: v_writelane_b32 v46, s4, 34 -; SI-NEXT: s_and_b32 s41, s41, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 35 -; SI-NEXT: s_lshr_b64 s[4:5], s[14:15], 16 -; SI-NEXT: s_or_b32 s41, s41, s21 -; SI-NEXT: v_writelane_b32 v46, s4, 36 -; SI-NEXT: s_and_b32 s43, s43, 0xffff -; SI-NEXT: v_writelane_b32 v46, s5, 37 -; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 16 -; SI-NEXT: s_or_b32 s43, s43, s69 -; SI-NEXT: v_writelane_b32 v46, s4, 38 -; SI-NEXT: v_writelane_b32 v46, s5, 39 -; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 16 -; SI-NEXT: v_writelane_b32 v46, s4, 40 -; SI-NEXT: v_writelane_b32 v46, s5, 41 -; SI-NEXT: s_lshr_b64 s[4:5], vcc, 16 -; SI-NEXT: s_and_b32 s97, s63, 0xffff -; SI-NEXT: s_and_b32 s98, s72, 0xffff -; SI-NEXT: s_and_b32 s22, s73, 0xffff -; SI-NEXT: v_writelane_b32 v46, s4, 42 -; SI-NEXT: s_or_b32 s72, s45, s6 -; SI-NEXT: s_mov_b32 s73, s7 -; SI-NEXT: s_or_b32 s62, s46, s8 -; SI-NEXT: s_mov_b32 s63, s9 -; SI-NEXT: s_or_b32 s60, s47, s10 -; SI-NEXT: s_mov_b32 s61, s11 -; SI-NEXT: s_or_b32 s58, s56, s12 -; SI-NEXT: s_mov_b32 s59, s13 -; SI-NEXT: s_or_b32 s56, s57, s14 -; SI-NEXT: s_mov_b32 s57, s15 -; SI-NEXT: s_or_b32 s46, s30, s40 -; SI-NEXT: s_mov_b32 s47, s41 -; SI-NEXT: v_writelane_b32 v46, s5, 43 -; SI-NEXT: s_or_b32 s40, s84, s38 -; SI-NEXT: s_mov_b32 s41, s39 -; SI-NEXT: s_lshr_b64 s[38:39], s[38:39], 16 -; SI-NEXT: s_or_b32 s14, s86, s48 -; SI-NEXT: s_mov_b32 s15, s49 -; SI-NEXT: s_lshr_b64 s[48:49], s[48:49], 16 -; SI-NEXT: s_or_b32 s12, s97, s50 -; SI-NEXT: s_mov_b32 s13, s51 -; SI-NEXT: s_lshr_b64 s[50:51], s[50:51], 16 -; SI-NEXT: s_or_b32 s10, s98, s52 -; SI-NEXT: s_mov_b32 s11, s53 -; SI-NEXT: s_lshr_b64 s[52:53], s[52:53], 16 -; SI-NEXT: s_or_b32 s8, s22, s54 -; SI-NEXT: s_mov_b32 s9, s55 -; SI-NEXT: s_lshr_b64 s[54:55], s[54:55], 16 -; SI-NEXT: s_or_b32 s6, s99, s64 -; SI-NEXT: s_mov_b32 s7, s65 -; SI-NEXT: s_lshr_b64 s[64:65], s[64:65], 16 -; SI-NEXT: s_or_b32 s4, s18, s66 -; SI-NEXT: s_mov_b32 s5, s67 -; SI-NEXT: s_lshr_b64 s[66:67], s[66:67], 16 -; SI-NEXT: s_or_b32 s44, s34, s42 -; SI-NEXT: s_mov_b32 s45, s43 -; SI-NEXT: s_or_b32 s42, s36, vcc_lo -; SI-NEXT: s_mov_b32 s43, vcc_hi -; SI-NEXT: s_mov_b32 s86, s78 -; SI-NEXT: s_mov_b32 s99, s76 -; SI-NEXT: v_readlane_b32 s18, v46, 50 -; SI-NEXT: s_lshr_b32 s77, s68, 16 -; SI-NEXT: s_lshr_b32 s68, s91, 16 -; SI-NEXT: s_lshr_b32 s88, s88, 16 -; SI-NEXT: s_lshr_b32 s84, s95, 16 -; SI-NEXT: s_lshr_b32 s89, s89, 16 -; SI-NEXT: s_lshr_b32 s91, s93, 16 -; SI-NEXT: s_lshr_b32 s93, s21, 16 -; SI-NEXT: s_lshr_b32 s95, s69, 16 -; SI-NEXT: s_lshr_b32 s30, s70, 16 -; SI-NEXT: s_lshr_b32 s34, s71, 16 -; SI-NEXT: s_lshr_b32 s36, s80, 16 -; SI-NEXT: v_readlane_b32 s69, v46, 44 -; SI-NEXT: v_readlane_b32 s80, v46, 53 -; SI-NEXT: s_lshr_b32 s39, s81, 16 -; SI-NEXT: v_readlane_b32 s81, v46, 57 -; SI-NEXT: v_readlane_b32 s76, v46, 56 -; SI-NEXT: v_readlane_b32 s21, v46, 55 -; SI-NEXT: v_readlane_b32 s98, v46, 54 -; SI-NEXT: s_lshr_b32 s49, s82, 16 -; SI-NEXT: s_mov_b32 s82, s94 -; SI-NEXT: v_readlane_b32 s71, v46, 48 -; SI-NEXT: v_readlane_b32 s78, v46, 52 -; SI-NEXT: s_mov_b32 s55, s85 -; SI-NEXT: v_readlane_b32 s97, v46, 62 -; SI-NEXT: v_readlane_b32 s94, v46, 61 -; SI-NEXT: v_readlane_b32 s67, v46, 60 -; SI-NEXT: v_readlane_b32 s65, v46, 59 -; SI-NEXT: v_readlane_b32 s22, v46, 58 -; SI-NEXT: s_lshr_b32 s51, s87, 16 -; SI-NEXT: s_mov_b32 s70, s23 -; SI-NEXT: s_mov_b32 s23, s24 -; SI-NEXT: v_readlane_b32 s24, v46, 45 -; SI-NEXT: s_mov_b32 s87, s25 -; SI-NEXT: s_mov_b32 s25, s26 -; SI-NEXT: s_mov_b32 s26, s27 -; SI-NEXT: s_mov_b32 s27, s28 -; SI-NEXT: s_mov_b32 s28, s92 -; SI-NEXT: s_lshr_b32 s53, s96, 16 -; SI-NEXT: s_mov_b32 s96, s90 -; SI-NEXT: s_mov_b32 s90, s79 -; SI-NEXT: s_mov_b32 s79, s31 -; SI-NEXT: s_mov_b32 s31, s35 -; SI-NEXT: s_mov_b32 s35, s37 -; SI-NEXT: s_mov_b32 s37, s19 -; SI-NEXT: s_mov_b32 s19, s20 -; SI-NEXT: v_readlane_b32 s20, v46, 51 -; SI-NEXT: s_lshr_b32 s92, s83, 16 -; SI-NEXT: s_mov_b32 s83, s16 -; SI-NEXT: v_readlane_b32 s16, v46, 49 +; SI-NEXT: s_or_b32 s95, s28, s22 +; SI-NEXT: s_and_b32 s22, s94, 0xff +; SI-NEXT: s_lshl_b32 s28, s42, 8 +; SI-NEXT: s_or_b32 s74, s5, vcc_lo +; SI-NEXT: v_readlane_b32 s5, v47, 54 +; SI-NEXT: s_or_b32 s31, s22, s28 +; SI-NEXT: s_and_b32 s22, s85, 0xff +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s19, 24 +; SI-NEXT: s_or_b32 s72, s5, s68 +; SI-NEXT: v_readlane_b32 s5, v47, 56 +; SI-NEXT: s_or_b32 s92, s28, s22 +; SI-NEXT: s_and_b32 s22, s60, 0xff +; SI-NEXT: s_lshl_b32 s28, s49, 8 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s93, s22, s28 +; SI-NEXT: s_and_b32 s22, s87, 0xff +; SI-NEXT: s_or_b32 s62, s5, s70 +; SI-NEXT: v_readlane_b32 s5, v47, 58 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s83, 24 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s19, s28, s22 +; SI-NEXT: s_and_b32 s22, s97, 0xff +; SI-NEXT: s_lshl_b32 s28, s25, 8 +; SI-NEXT: s_or_b32 s60, s5, s80 +; SI-NEXT: s_and_b32 s5, s13, 0xffff +; SI-NEXT: s_or_b32 s64, s22, s28 +; SI-NEXT: s_and_b32 s22, s66, 0xff +; SI-NEXT: s_or_b32 s58, s5, s82 +; SI-NEXT: s_and_b32 s5, s15, 0xffff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s28, s81, 24 +; SI-NEXT: s_or_b32 s56, s5, s84 +; SI-NEXT: s_and_b32 s5, s11, 0xffff +; SI-NEXT: s_or_b32 s25, s28, s22 +; SI-NEXT: s_and_b32 s22, s46, 0xff +; SI-NEXT: s_or_b32 s46, s5, s86 +; SI-NEXT: s_and_b32 s5, s9, 0xffff +; SI-NEXT: s_or_b32 s44, s5, s96 +; SI-NEXT: s_and_b32 s5, s7, 0xffff +; SI-NEXT: s_or_b32 s42, s5, s98 +; SI-NEXT: s_and_b32 s5, s76, 0xffff +; SI-NEXT: s_or_b32 s76, s5, s40 +; SI-NEXT: s_and_b32 s5, vcc_hi, 0xffff +; SI-NEXT: s_or_b32 s50, s5, s14 +; SI-NEXT: s_and_b32 s5, s52, 0xffff +; SI-NEXT: s_or_b32 s52, s5, s12 +; SI-NEXT: s_and_b32 s5, s54, 0xffff +; SI-NEXT: s_or_b32 s54, s5, s10 +; SI-NEXT: s_and_b32 s5, s34, 0xffff +; SI-NEXT: s_or_b32 s94, s5, s8 +; SI-NEXT: s_and_b32 s5, s30, 0xffff +; SI-NEXT: s_or_b32 s30, s5, s6 +; SI-NEXT: s_and_b32 s5, s41, 0xffff +; SI-NEXT: s_or_b32 s34, s5, s4 +; SI-NEXT: s_and_b32 s5, s69, 0xffff +; SI-NEXT: s_or_b32 vcc_hi, s5, s51 +; SI-NEXT: s_and_b32 s5, s71, 0xffff +; SI-NEXT: s_or_b32 s69, s5, s27 +; SI-NEXT: s_and_b32 s5, s61, 0xffff +; SI-NEXT: s_or_b32 s71, s5, s16 +; SI-NEXT: s_and_b32 s5, s73, 0xffff +; SI-NEXT: s_or_b32 s81, s5, s43 +; SI-NEXT: s_and_b32 s5, s77, 0xffff +; SI-NEXT: v_readlane_b32 s20, v46, 8 +; SI-NEXT: s_or_b32 s83, s5, s47 +; SI-NEXT: s_and_b32 s5, s21, 0xffff +; SI-NEXT: s_lshl_b32 s28, s20, 8 +; SI-NEXT: v_readlane_b32 s20, v46, 5 +; SI-NEXT: s_or_b32 s85, s5, s59 +; SI-NEXT: s_and_b32 s5, s37, 0xffff +; SI-NEXT: s_or_b32 s45, s22, s28 +; SI-NEXT: s_and_b32 s22, s20, 0xff +; SI-NEXT: v_readlane_b32 s20, v46, 2 +; SI-NEXT: s_or_b32 s87, s5, s63 +; SI-NEXT: s_lshl_b32 s28, s20, 24 +; SI-NEXT: s_lshr_b64 s[20:21], s[86:87], 16 +; SI-NEXT: s_and_b32 s5, s65, 0xffff +; SI-NEXT: s_mov_b32 s26, s97 +; SI-NEXT: v_writelane_b32 v47, s20, 50 +; SI-NEXT: s_or_b32 s97, s5, s75 +; SI-NEXT: s_and_b32 s5, s36, 0xffff +; SI-NEXT: v_writelane_b32 v47, s21, 51 +; SI-NEXT: s_lshr_b64 s[20:21], s[96:97], 16 +; SI-NEXT: s_or_b32 s99, s5, s55 +; SI-NEXT: s_and_b32 s5, s35, 0xffff +; SI-NEXT: v_writelane_b32 v47, s20, 52 +; SI-NEXT: s_or_b32 s41, s5, s57 +; SI-NEXT: s_and_b32 s5, s17, 0xffff +; SI-NEXT: s_mov_b32 s18, s66 +; SI-NEXT: v_writelane_b32 v47, s21, 53 +; SI-NEXT: s_lshr_b64 s[66:67], s[40:41], 16 +; SI-NEXT: s_or_b32 s15, s5, s88 +; SI-NEXT: s_and_b32 s5, s89, 0xffff +; SI-NEXT: v_writelane_b32 v47, s66, 54 +; SI-NEXT: s_or_b32 s13, s5, s95 +; SI-NEXT: v_writelane_b32 v47, s67, 55 +; SI-NEXT: s_lshr_b64 s[20:21], s[12:13], 16 +; SI-NEXT: s_and_b32 s5, s31, 0xffff +; SI-NEXT: v_writelane_b32 v47, s20, 56 +; SI-NEXT: s_or_b32 s11, s5, s92 +; SI-NEXT: v_writelane_b32 v47, s21, 57 +; SI-NEXT: s_lshr_b64 s[20:21], s[10:11], 16 +; SI-NEXT: s_and_b32 s5, s93, 0xffff +; SI-NEXT: v_writelane_b32 v47, s20, 58 +; SI-NEXT: s_or_b32 s9, s5, s19 +; SI-NEXT: v_writelane_b32 v47, s21, 59 +; SI-NEXT: s_lshr_b64 s[20:21], s[8:9], 16 +; SI-NEXT: s_and_b32 s5, s64, 0xffff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: v_writelane_b32 v47, s20, 60 +; SI-NEXT: s_or_b32 s7, s5, s25 +; SI-NEXT: s_or_b32 s53, s28, s22 +; SI-NEXT: v_writelane_b32 v47, s21, 61 +; SI-NEXT: s_lshr_b64 s[20:21], s[6:7], 16 +; SI-NEXT: s_and_b32 s5, s45, 0xffff +; SI-NEXT: s_lshr_b64 s[22:23], vcc, 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[98:99], 16 +; SI-NEXT: v_writelane_b32 v47, s20, 62 +; SI-NEXT: s_or_b32 s5, s5, s53 +; SI-NEXT: s_lshr_b64 s[28:29], s[68:69], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[70:71], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[80:81], 16 +; SI-NEXT: v_readlane_b32 s80, v46, 4 +; SI-NEXT: s_lshr_b64 s[38:39], s[82:83], 16 +; SI-NEXT: s_lshr_b64 s[48:49], s[84:85], 16 +; SI-NEXT: v_readlane_b32 s98, v46, 10 +; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 16 +; SI-NEXT: v_writelane_b32 v47, s21, 63 +; SI-NEXT: s_lshr_b64 s[64:65], s[4:5], 16 +; SI-NEXT: s_lshr_b32 s8, s51, 16 +; SI-NEXT: s_lshr_b32 s10, s27, 16 +; SI-NEXT: s_lshr_b32 s12, s16, 16 +; SI-NEXT: s_lshr_b32 s14, s43, 16 +; SI-NEXT: s_lshr_b32 s21, s47, 16 +; SI-NEXT: s_lshr_b32 s40, s59, 16 +; SI-NEXT: s_lshr_b32 s17, s63, 16 +; SI-NEXT: s_lshr_b32 s89, s75, 16 +; SI-NEXT: s_lshr_b32 s23, s55, 16 +; SI-NEXT: s_lshr_b32 s93, s57, 16 +; SI-NEXT: s_lshr_b32 s16, s88, 16 +; SI-NEXT: s_lshr_b32 s88, s95, 16 +; SI-NEXT: s_lshr_b32 s92, s92, 16 +; SI-NEXT: s_lshr_b32 s37, s19, 16 +; SI-NEXT: s_lshr_b32 s27, s25, 16 +; SI-NEXT: s_lshr_b32 s6, s53, 16 +; SI-NEXT: s_mov_b32 s75, vcc_hi +; SI-NEXT: s_mov_b32 s73, s69 +; SI-NEXT: s_mov_b32 s63, s71 +; SI-NEXT: s_mov_b32 s61, s81 +; SI-NEXT: s_mov_b32 s59, s83 +; SI-NEXT: v_readlane_b32 s96, v46, 3 +; SI-NEXT: s_mov_b32 s57, s85 +; SI-NEXT: v_readlane_b32 s84, v46, 7 +; SI-NEXT: s_mov_b32 s68, s24 +; SI-NEXT: v_readlane_b32 s24, v46, 0 +; SI-NEXT: s_mov_b32 s47, s87 +; SI-NEXT: s_mov_b32 s45, s97 +; SI-NEXT: v_readlane_b32 s86, v46, 9 +; SI-NEXT: s_mov_b32 s43, s99 +; SI-NEXT: v_readlane_b32 s82, v46, 6 +; SI-NEXT: v_readlane_b32 s70, v46, 1 +; SI-NEXT: s_mov_b32 s77, s41 +; SI-NEXT: s_mov_b32 s51, s15 +; SI-NEXT: v_readlane_b32 s15, v46, 8 +; SI-NEXT: s_mov_b32 s53, s13 +; SI-NEXT: v_readlane_b32 s13, v46, 5 +; SI-NEXT: s_mov_b32 s55, s11 +; SI-NEXT: v_readlane_b32 s11, v46, 2 +; SI-NEXT: s_mov_b32 s95, s9 +; SI-NEXT: s_mov_b32 s31, s7 +; SI-NEXT: s_mov_b32 s35, s5 ; SI-NEXT: s_cbranch_execnz .LBB97_3 ; SI-NEXT: .LBB97_2: ; %cmp.true -; SI-NEXT: v_readlane_b32 s4, v46, 11 -; SI-NEXT: s_add_i32 s85, s4, 3 -; SI-NEXT: v_readlane_b32 s5, v46, 6 -; SI-NEXT: v_readlane_b32 s6, v47, 60 -; SI-NEXT: s_and_b32 s4, s85, 0xff +; SI-NEXT: v_readlane_b32 s4, v47, 32 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v47, 26 +; SI-NEXT: v_readlane_b32 s6, v47, 17 +; SI-NEXT: s_and_b32 s4, s4, 0xff ; SI-NEXT: s_lshl_b32 s5, s5, 8 ; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: v_readlane_b32 s5, v47, 58 +; SI-NEXT: v_readlane_b32 s5, v47, 48 ; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_lshl_b32 s5, s5, 24 ; SI-NEXT: s_lshl_b32 s6, s6, 16 @@ -193562,699 +193807,715 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s5, s17, 3 +; SI-NEXT: v_readlane_b32 s5, v47, 7 +; SI-NEXT: s_add_i32 s5, s5, 3 ; SI-NEXT: s_and_b32 s5, s5, 0xff -; SI-NEXT: s_lshl_b32 s6, s99, 8 -; SI-NEXT: s_add_i32 s7, s86, 3 +; SI-NEXT: s_lshl_b32 s6, s15, 8 +; SI-NEXT: s_add_i32 s7, s13, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 ; SI-NEXT: s_and_b32 s7, s7, 0xff -; SI-NEXT: s_lshl_b32 s6, s83, 24 +; SI-NEXT: s_lshl_b32 s6, s11, 24 ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_addk_i32 s5, 0x300 ; SI-NEXT: s_or_b32 s6, s6, s7 ; SI-NEXT: s_and_b32 s5, s5, 0xffff ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: v_readlane_b32 s6, v46, 20 +; SI-NEXT: v_readlane_b32 s6, v47, 42 ; SI-NEXT: s_add_i32 s6, s6, 3 -; SI-NEXT: v_readlane_b32 s7, v46, 14 -; SI-NEXT: v_readlane_b32 s8, v46, 9 +; SI-NEXT: v_readlane_b32 s7, v47, 36 +; SI-NEXT: v_readlane_b32 s8, v47, 31 ; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 8 -; SI-NEXT: s_add_i32 s83, s8, 3 +; SI-NEXT: s_add_i32 s8, s8, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: v_readlane_b32 s7, v46, 8 -; SI-NEXT: s_and_b32 s8, s83, 0xff +; SI-NEXT: v_readlane_b32 s7, v47, 28 +; SI-NEXT: s_and_b32 s8, s8, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 24 ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_addk_i32 s6, 0x300 ; SI-NEXT: s_or_b32 s7, s7, s8 ; SI-NEXT: s_and_b32 s6, s6, 0xffff ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_add_i32 s7, s29, 3 +; SI-NEXT: s_add_i32 s34, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v47, 6 +; SI-NEXT: s_add_i32 s35, s5, 0x3000000 +; SI-NEXT: s_add_i32 s30, s6, 0x3000000 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v47, 5 +; SI-NEXT: v_readlane_b32 s6, v47, 3 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v47, 4 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s76, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v47, 2 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s82, 8 +; SI-NEXT: s_add_i32 s6, s68, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s24, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s77, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v47, 1 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v47, 0 +; SI-NEXT: v_readlane_b32 s6, v56, 62 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 63 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s42, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 61 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 60 +; SI-NEXT: v_readlane_b32 s6, v56, 56 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 57 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s43, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 59 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 58 +; SI-NEXT: v_readlane_b32 s6, v56, 54 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 55 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s44, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 53 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 52 +; SI-NEXT: v_readlane_b32 s6, v56, 48 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 49 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s45, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 51 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 50 +; SI-NEXT: v_readlane_b32 s6, v56, 46 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 47 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s46, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 45 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 44 +; SI-NEXT: v_readlane_b32 s6, v56, 42 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 43 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s47, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 18 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 17 +; SI-NEXT: v_readlane_b32 s6, v56, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 15 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s56, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 14 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 41 +; SI-NEXT: v_readlane_b32 s6, v56, 39 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 40 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s57, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 26 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 25 +; SI-NEXT: v_readlane_b32 s6, v56, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 23 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s58, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 22 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 21 +; SI-NEXT: v_readlane_b32 s6, v56, 20 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 19 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s59, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 31 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s6, v56, 30 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s84, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s80, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_add_i32 s7, s26, 3 +; SI-NEXT: v_readlane_b32 s8, v47, 11 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_and_b32 s7, s7, 0xff -; SI-NEXT: s_lshl_b32 s8, s24, 8 -; SI-NEXT: s_add_i32 s9, s19, 3 +; SI-NEXT: s_lshl_b32 s8, s8, 8 +; SI-NEXT: s_add_i32 s9, s18, 3 +; SI-NEXT: s_add_i32 s60, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 29 ; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: v_readlane_b32 s8, v47, 8 ; SI-NEXT: s_and_b32 s9, s9, 0xff -; SI-NEXT: s_lshl_b32 s8, s16, 24 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 35 +; SI-NEXT: v_readlane_b32 s6, v56, 28 +; SI-NEXT: s_lshl_b32 s8, s8, 24 ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_addk_i32 s7, 0x300 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: s_or_b32 s8, s8, s9 ; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 27 +; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: v_readlane_b32 s8, v46, 23 +; SI-NEXT: v_readlane_b32 s8, v47, 45 +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_add_i32 s8, s8, 3 -; SI-NEXT: v_readlane_b32 s9, v46, 22 -; SI-NEXT: v_readlane_b32 s10, v46, 19 +; SI-NEXT: v_readlane_b32 s9, v47, 44 +; SI-NEXT: v_readlane_b32 s10, v47, 39 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_and_b32 s8, s8, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 8 -; SI-NEXT: s_add_i32 s68, s10, 3 +; SI-NEXT: s_add_i32 s10, s10, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: v_readlane_b32 s9, v46, 16 -; SI-NEXT: s_and_b32 s10, s68, 0xff +; SI-NEXT: v_readlane_b32 s9, v47, 37 +; SI-NEXT: s_and_b32 s10, s10, 0xff +; SI-NEXT: s_add_i32 s61, s4, 0x3000000 +; SI-NEXT: s_add_i32 s4, s98, 3 ; SI-NEXT: s_lshl_b32 s9, s9, 24 ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_addk_i32 s8, 0x300 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s86, 8 +; SI-NEXT: s_add_i32 s6, s96, 3 ; SI-NEXT: s_or_b32 s9, s9, s10 ; SI-NEXT: s_and_b32 s8, s8, 0xffff +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: v_readlane_b32 s9, v46, 4 +; SI-NEXT: v_readlane_b32 s9, v47, 25 +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s70, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_add_i32 s9, s9, 3 -; SI-NEXT: v_readlane_b32 s10, v46, 0 +; SI-NEXT: v_readlane_b32 s10, v47, 19 +; SI-NEXT: v_readlane_b32 s11, v47, 14 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_and_b32 s9, s9, 0xff ; SI-NEXT: s_lshl_b32 s10, s10, 8 -; SI-NEXT: s_add_i32 s11, s28, 3 +; SI-NEXT: s_add_i32 s11, s11, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: v_readlane_b32 s10, v47, 12 ; SI-NEXT: s_and_b32 s11, s11, 0xff -; SI-NEXT: s_lshl_b32 s10, s27, 24 +; SI-NEXT: s_add_i32 s62, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 36 +; SI-NEXT: s_lshl_b32 s10, s10, 24 ; SI-NEXT: s_lshl_b32 s11, s11, 16 ; SI-NEXT: s_addk_i32 s9, 0x300 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 34 +; SI-NEXT: v_readlane_b32 s6, v56, 33 ; SI-NEXT: s_or_b32 s10, s10, s11 ; SI-NEXT: s_and_b32 s9, s9, 0xffff +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: v_readlane_b32 s10, v46, 25 -; SI-NEXT: s_add_i32 s17, s10, 3 -; SI-NEXT: v_readlane_b32 s11, v46, 24 -; SI-NEXT: v_readlane_b32 s12, v46, 21 -; SI-NEXT: s_and_b32 s10, s17, 0xff +; SI-NEXT: v_readlane_b32 s10, v47, 47 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 32 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_add_i32 s10, s10, 3 +; SI-NEXT: v_readlane_b32 s11, v47, 46 +; SI-NEXT: v_readlane_b32 s12, v47, 43 +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_and_b32 s10, s10, 0xff ; SI-NEXT: s_lshl_b32 s11, s11, 8 ; SI-NEXT: s_add_i32 s12, s12, 3 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: v_readlane_b32 s11, v46, 18 +; SI-NEXT: v_readlane_b32 s11, v47, 41 ; SI-NEXT: s_and_b32 s12, s12, 0xff +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_lshl_b32 s11, s11, 24 ; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_addk_i32 s10, 0x300 +; SI-NEXT: s_add_i32 s63, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 5 ; SI-NEXT: s_or_b32 s11, s11, s12 ; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 4 +; SI-NEXT: v_readlane_b32 s6, v56, 3 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: v_readlane_b32 s11, v46, 10 -; SI-NEXT: s_add_i32 s84, s11, 3 -; SI-NEXT: v_readlane_b32 s12, v46, 7 -; SI-NEXT: v_readlane_b32 s13, v46, 1 -; SI-NEXT: s_and_b32 s11, s84, 0xff +; SI-NEXT: v_readlane_b32 s11, v47, 33 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_add_i32 s11, s11, 3 +; SI-NEXT: v_readlane_b32 s12, v47, 30 +; SI-NEXT: v_readlane_b32 s13, v47, 22 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 2 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_and_b32 s11, s11, 0xff ; SI-NEXT: s_lshl_b32 s12, s12, 8 ; SI-NEXT: s_add_i32 s13, s13, 3 +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: v_readlane_b32 s12, v47, 59 +; SI-NEXT: v_readlane_b32 s12, v47, 18 ; SI-NEXT: s_and_b32 s13, s13, 0xff +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_lshl_b32 s12, s12, 24 ; SI-NEXT: s_lshl_b32 s13, s13, 16 ; SI-NEXT: s_addk_i32 s11, 0x300 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_or_b32 s12, s12, s13 ; SI-NEXT: s_and_b32 s11, s11, 0xffff +; SI-NEXT: s_add_i32 s72, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 1 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: v_readlane_b32 s12, v46, 17 -; SI-NEXT: s_add_i32 s99, s12, 3 -; SI-NEXT: v_readlane_b32 s13, v46, 15 -; SI-NEXT: v_readlane_b32 s14, v46, 12 -; SI-NEXT: s_and_b32 s12, s99, 0xff +; SI-NEXT: v_readlane_b32 s12, v47, 40 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 0 +; SI-NEXT: v_readlane_b32 s6, v56, 38 +; SI-NEXT: s_add_i32 s12, s12, 3 +; SI-NEXT: v_readlane_b32 s13, v47, 38 +; SI-NEXT: v_readlane_b32 s14, v47, 34 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 +; SI-NEXT: s_and_b32 s12, s12, 0xff ; SI-NEXT: s_lshl_b32 s13, s13, 8 -; SI-NEXT: s_add_i32 s86, s14, 3 +; SI-NEXT: s_add_i32 s14, s14, 3 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 37 +; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: v_readlane_b32 s13, v46, 13 -; SI-NEXT: s_and_b32 s14, s86, 0xff +; SI-NEXT: v_readlane_b32 s13, v47, 35 +; SI-NEXT: s_and_b32 s14, s14, 0xff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s13, s13, 24 ; SI-NEXT: s_lshl_b32 s14, s14, 16 ; SI-NEXT: s_addk_i32 s12, 0x300 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_or_b32 s13, s13, s14 ; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: v_readlane_b32 s13, v46, 5 +; SI-NEXT: v_readlane_b32 s13, v47, 29 +; SI-NEXT: s_add_i32 s73, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 13 ; SI-NEXT: s_add_i32 s13, s13, 3 -; SI-NEXT: v_readlane_b32 s14, v46, 3 -; SI-NEXT: v_readlane_b32 s15, v47, 62 +; SI-NEXT: v_readlane_b32 s14, v47, 27 +; SI-NEXT: v_readlane_b32 s15, v47, 20 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 12 +; SI-NEXT: v_readlane_b32 s6, v56, 11 ; SI-NEXT: s_and_b32 s13, s13, 0xff ; SI-NEXT: s_lshl_b32 s14, s14, 8 ; SI-NEXT: s_add_i32 s15, s15, 3 +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: v_readlane_b32 s14, v47, 63 +; SI-NEXT: v_readlane_b32 s14, v47, 21 ; SI-NEXT: s_and_b32 s15, s15, 0xff +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 10 +; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_lshl_b32 s14, s14, 24 ; SI-NEXT: s_lshl_b32 s15, s15, 16 ; SI-NEXT: s_addk_i32 s13, 0x300 +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_or_b32 s14, s14, s15 ; SI-NEXT: s_and_b32 s13, s13, 0xffff +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: v_readlane_b32 s14, v46, 2 +; SI-NEXT: v_readlane_b32 s14, v47, 24 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s14, s14, 3 -; SI-NEXT: v_readlane_b32 s15, v47, 61 -; SI-NEXT: v_readlane_b32 s16, v47, 56 +; SI-NEXT: v_readlane_b32 s15, v47, 23 +; SI-NEXT: v_readlane_b32 s16, v47, 15 +; SI-NEXT: s_add_i32 s74, s4, 0x3000000 +; SI-NEXT: v_readlane_b32 s4, v56, 9 ; SI-NEXT: s_and_b32 s14, s14, 0xff ; SI-NEXT: s_lshl_b32 s15, s15, 8 ; SI-NEXT: s_add_i32 s16, s16, 3 +; SI-NEXT: s_add_i32 s4, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v56, 8 +; SI-NEXT: v_readlane_b32 s6, v56, 7 ; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: v_readlane_b32 s15, v47, 57 +; SI-NEXT: v_readlane_b32 s15, v47, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xff +; SI-NEXT: s_and_b32 s4, s4, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 8 +; SI-NEXT: s_add_i32 s6, s6, 3 ; SI-NEXT: s_lshl_b32 s15, s15, 24 ; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: s_addk_i32 s14, 0x300 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: v_readlane_b32 s5, v56, 6 +; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_or_b32 s15, s15, s16 ; SI-NEXT: s_and_b32 s14, s14, 0xffff +; SI-NEXT: s_addk_i32 s4, 0x300 +; SI-NEXT: s_lshl_b32 s5, s5, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_add_i32 s15, s26, 3 +; SI-NEXT: v_readlane_b32 s15, v47, 13 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_add_i32 s15, s15, 3 +; SI-NEXT: v_readlane_b32 s16, v47, 10 +; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_and_b32 s15, s15, 0xff -; SI-NEXT: s_lshl_b32 s16, s25, 8 -; SI-NEXT: s_add_i32 s17, s23, 3 +; SI-NEXT: s_lshl_b32 s16, s16, 8 +; SI-NEXT: s_add_i32 s75, s4, 0x3000000 +; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 16 ; SI-NEXT: s_or_b32 s15, s16, s15 -; SI-NEXT: s_and_b32 s17, s17, 0xff -; SI-NEXT: s_lshl_b32 s16, s87, 24 -; SI-NEXT: s_lshl_b32 s17, s17, 16 +; SI-NEXT: v_readlane_b32 s16, v47, 49 +; SI-NEXT: v_readlane_b32 s18, v47, 9 +; SI-NEXT: v_writelane_b32 v47, s4, 50 +; SI-NEXT: v_writelane_b32 v47, s5, 51 +; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 16 +; SI-NEXT: v_writelane_b32 v47, s4, 52 +; SI-NEXT: v_writelane_b32 v47, s5, 53 +; SI-NEXT: s_lshr_b64 s[4:5], s[76:77], 16 +; SI-NEXT: s_add_i32 s52, s12, 0x3000000 +; SI-NEXT: s_add_i32 s53, s13, 0x3000000 +; SI-NEXT: v_writelane_b32 v47, s4, 54 +; SI-NEXT: v_writelane_b32 v47, s5, 55 +; SI-NEXT: s_lshr_b64 s[4:5], s[52:53], 16 +; SI-NEXT: s_add_i32 s20, s18, 3 +; SI-NEXT: s_add_i32 s54, s10, 0x3000000 +; SI-NEXT: s_add_i32 s55, s11, 0x3000000 +; SI-NEXT: v_writelane_b32 v47, s4, 56 +; SI-NEXT: s_and_b32 s20, s20, 0xff +; SI-NEXT: v_writelane_b32 v47, s5, 57 +; SI-NEXT: s_lshr_b64 s[4:5], s[54:55], 16 +; SI-NEXT: s_lshl_b32 s16, s16, 24 +; SI-NEXT: s_lshl_b32 s20, s20, 16 ; SI-NEXT: s_addk_i32 s15, 0x300 -; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_add_i32 s94, s8, 0x3000000 +; SI-NEXT: s_add_i32 s95, s9, 0x3000000 +; SI-NEXT: v_writelane_b32 v47, s4, 58 +; SI-NEXT: s_or_b32 s16, s16, s20 ; SI-NEXT: s_and_b32 s15, s15, 0xffff +; SI-NEXT: v_writelane_b32 v47, s5, 59 +; SI-NEXT: s_lshr_b64 s[4:5], s[94:95], 16 ; SI-NEXT: s_or_b32 s15, s16, s15 -; SI-NEXT: s_add_i32 s16, s20, 3 -; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v47, 54 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 55 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s40, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s22, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s65, 8 -; SI-NEXT: s_add_i32 s18, s94, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s67, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s41, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s71, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s81, 8 -; SI-NEXT: s_add_i32 s18, s55, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s97, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s42, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s98, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s78, 8 -; SI-NEXT: s_add_i32 s18, s31, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s35, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s43, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s82, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s37, 8 -; SI-NEXT: s_add_i32 s18, s90, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s79, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s44, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s96, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 46 -; SI-NEXT: v_readlane_b32 s18, v47, 45 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 44 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s45, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s21, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s76, 8 -; SI-NEXT: s_add_i32 s18, s70, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 50 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s46, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s80, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 49 -; SI-NEXT: v_readlane_b32 s18, v47, 48 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 47 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s47, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 18 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 17 -; SI-NEXT: v_readlane_b32 s18, v47, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 15 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s56, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 14 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 53 -; SI-NEXT: v_readlane_b32 s18, v47, 52 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 51 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s57, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 26 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 25 -; SI-NEXT: v_readlane_b32 s18, v47, 24 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 23 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s58, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 22 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 21 -; SI-NEXT: v_readlane_b32 s18, v47, 20 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 19 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s59, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 34 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 33 -; SI-NEXT: v_readlane_b32 s18, v47, 32 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 31 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s60, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 30 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 29 -; SI-NEXT: v_readlane_b32 s18, v47, 28 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 27 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s61, s16, 0x3000000 -; SI-NEXT: s_add_i32 s16, s69, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 41 -; SI-NEXT: v_readlane_b32 s18, v47, 40 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 39 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s62, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 38 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 37 -; SI-NEXT: v_readlane_b32 s18, v47, 36 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 35 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s63, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 5 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 4 -; SI-NEXT: v_readlane_b32 s18, v47, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 2 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s72, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 1 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 0 -; SI-NEXT: v_readlane_b32 s18, v47, 43 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 42 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s73, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 13 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 12 -; SI-NEXT: v_readlane_b32 s18, v47, 11 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 10 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s74, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v47, 9 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v47, 8 -; SI-NEXT: v_readlane_b32 s18, v47, 7 -; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v47, 6 -; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s75, s16, 0x3000000 -; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 26 -; SI-NEXT: v_writelane_b32 v46, s17, 27 -; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 28 -; SI-NEXT: v_writelane_b32 v46, s17, 29 -; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 30 -; SI-NEXT: v_writelane_b32 v46, s17, 31 -; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 32 -; SI-NEXT: v_writelane_b32 v46, s17, 33 -; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 34 -; SI-NEXT: v_writelane_b32 v46, s17, 35 -; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 36 -; SI-NEXT: v_writelane_b32 v46, s17, 37 -; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 38 -; SI-NEXT: v_writelane_b32 v46, s17, 39 -; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 16 -; SI-NEXT: s_add_i32 s10, s10, 0x3000000 -; SI-NEXT: s_add_i32 s11, s11, 0x3000000 -; SI-NEXT: s_add_i32 s12, s12, 0x3000000 -; SI-NEXT: s_add_i32 s13, s13, 0x3000000 -; SI-NEXT: s_add_i32 s14, s14, 0x3000000 -; SI-NEXT: s_add_i32 s15, s15, 0x3000000 -; SI-NEXT: v_writelane_b32 v46, s16, 40 -; SI-NEXT: s_add_i32 s4, s4, 0x3000000 -; SI-NEXT: s_add_i32 s5, s5, 0x3000000 -; SI-NEXT: s_add_i32 s6, s6, 0x3000000 -; SI-NEXT: s_add_i32 s7, s7, 0x3000000 -; SI-NEXT: s_add_i32 s8, s8, 0x3000000 -; SI-NEXT: s_add_i32 s9, s9, 0x3000000 -; SI-NEXT: v_writelane_b32 v46, s17, 41 -; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[38:39], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[48:49], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[50:51], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 16 -; SI-NEXT: v_writelane_b32 v46, s16, 42 -; SI-NEXT: s_lshr_b64 s[54:55], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[66:67], s[4:5], 16 -; SI-NEXT: s_lshr_b32 s77, s75, 16 -; SI-NEXT: s_lshr_b32 s68, s73, 16 -; SI-NEXT: s_lshr_b32 s88, s63, 16 -; SI-NEXT: s_lshr_b32 s84, s61, 16 -; SI-NEXT: s_lshr_b32 s89, s59, 16 -; SI-NEXT: s_lshr_b32 s91, s57, 16 -; SI-NEXT: s_lshr_b32 s93, s47, 16 -; SI-NEXT: s_lshr_b32 s95, s45, 16 -; SI-NEXT: s_lshr_b32 s30, s43, 16 -; SI-NEXT: s_lshr_b32 s34, s41, 16 -; SI-NEXT: s_lshr_b32 s36, s15, 16 -; SI-NEXT: s_lshr_b32 s39, s13, 16 -; SI-NEXT: s_lshr_b32 s49, s11, 16 -; SI-NEXT: s_lshr_b32 s51, s9, 16 -; SI-NEXT: s_lshr_b32 s53, s7, 16 -; SI-NEXT: s_lshr_b32 s92, s5, 16 -; SI-NEXT: v_writelane_b32 v46, s17, 43 +; SI-NEXT: s_add_i32 s31, s7, 0x3000000 +; SI-NEXT: v_writelane_b32 v47, s4, 60 +; SI-NEXT: s_add_i32 s50, s14, 0x3000000 +; SI-NEXT: s_add_i32 s51, s15, 0x3000000 +; SI-NEXT: s_lshr_b64 s[22:23], s[74:75], 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[42:43], 16 +; SI-NEXT: v_writelane_b32 v47, s5, 61 +; SI-NEXT: s_lshr_b64 s[4:5], s[30:31], 16 +; SI-NEXT: s_lshr_b64 s[28:29], s[72:73], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[62:63], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 16 +; SI-NEXT: s_lshr_b64 s[38:39], s[58:59], 16 +; SI-NEXT: s_lshr_b64 s[48:49], s[56:57], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[50:51], 16 +; SI-NEXT: v_writelane_b32 v47, s4, 62 +; SI-NEXT: s_lshr_b64 s[64:65], s[34:35], 16 +; SI-NEXT: s_lshr_b32 s8, s75, 16 +; SI-NEXT: s_lshr_b32 s10, s73, 16 +; SI-NEXT: s_lshr_b32 s12, s63, 16 +; SI-NEXT: s_lshr_b32 s14, s61, 16 +; SI-NEXT: s_lshr_b32 s21, s59, 16 +; SI-NEXT: s_lshr_b32 s40, s57, 16 +; SI-NEXT: s_lshr_b32 s17, s47, 16 +; SI-NEXT: s_lshr_b32 s89, s45, 16 +; SI-NEXT: s_lshr_b32 s23, s43, 16 +; SI-NEXT: s_lshr_b32 s93, s77, 16 +; SI-NEXT: s_lshr_b32 s16, s51, 16 +; SI-NEXT: s_lshr_b32 s88, s53, 16 +; SI-NEXT: s_lshr_b32 s92, s55, 16 +; SI-NEXT: s_lshr_b32 s37, s95, 16 +; SI-NEXT: s_lshr_b32 s27, s31, 16 +; SI-NEXT: s_lshr_b32 s6, s35, 16 +; SI-NEXT: v_writelane_b32 v47, s5, 63 ; SI-NEXT: .LBB97_3: ; %end ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; SI-NEXT: v_readlane_b32 s18, v46, 26 -; SI-NEXT: s_and_b32 s17, s74, 0xffff -; SI-NEXT: v_readlane_b32 s19, v46, 27 -; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s18, s75, 0xffff -; SI-NEXT: s_lshl_b32 s19, s77, 16 -; SI-NEXT: v_readlane_b32 s20, v46, 28 -; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_and_b32 s19, s72, 0xffff -; SI-NEXT: v_readlane_b32 s21, v46, 29 -; SI-NEXT: s_lshl_b32 s20, s20, 16 -; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_and_b32 s20, s73, 0xffff -; SI-NEXT: s_lshl_b32 s21, s68, 16 -; SI-NEXT: v_readlane_b32 s22, v46, 30 -; SI-NEXT: s_or_b32 s20, s20, s21 -; SI-NEXT: s_and_b32 s21, s62, 0xffff -; SI-NEXT: v_readlane_b32 s23, v46, 31 -; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: s_or_b32 s21, s21, s22 -; SI-NEXT: s_and_b32 s22, s63, 0xffff -; SI-NEXT: s_lshl_b32 s23, s88, 16 -; SI-NEXT: v_readlane_b32 s24, v46, 32 -; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_and_b32 s23, s60, 0xffff -; SI-NEXT: v_readlane_b32 s25, v46, 33 -; SI-NEXT: s_lshl_b32 s24, s24, 16 -; SI-NEXT: s_or_b32 s23, s23, s24 -; SI-NEXT: s_and_b32 s24, s61, 0xffff -; SI-NEXT: s_lshl_b32 s25, s84, 16 -; SI-NEXT: v_readlane_b32 s26, v46, 34 +; SI-NEXT: s_and_b32 s4, s74, 0xffff +; SI-NEXT: s_lshl_b32 s5, s22, 16 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s75, 0xffff +; SI-NEXT: s_lshl_b32 s7, s8, 16 +; SI-NEXT: s_or_b32 s5, s5, s7 +; SI-NEXT: s_and_b32 s7, s72, 0xffff +; SI-NEXT: s_lshl_b32 s8, s28, 16 +; SI-NEXT: s_or_b32 s7, s7, s8 +; SI-NEXT: s_and_b32 s8, s73, 0xffff +; SI-NEXT: s_lshl_b32 s9, s10, 16 +; SI-NEXT: s_or_b32 s8, s8, s9 +; SI-NEXT: s_and_b32 s9, s62, 0xffff +; SI-NEXT: s_lshl_b32 s10, s78, 16 +; SI-NEXT: s_or_b32 s9, s9, s10 +; SI-NEXT: s_and_b32 s10, s63, 0xffff +; SI-NEXT: s_lshl_b32 s11, s12, 16 +; SI-NEXT: s_or_b32 s10, s10, s11 +; SI-NEXT: s_and_b32 s11, s60, 0xffff +; SI-NEXT: s_lshl_b32 s12, s90, 16 +; SI-NEXT: s_or_b32 s11, s11, s12 +; SI-NEXT: s_and_b32 s12, s61, 0xffff +; SI-NEXT: s_lshl_b32 s13, s14, 16 +; SI-NEXT: s_or_b32 s12, s12, s13 +; SI-NEXT: s_and_b32 s13, s58, 0xffff +; SI-NEXT: s_lshl_b32 s14, s38, 16 +; SI-NEXT: s_or_b32 s13, s13, s14 +; SI-NEXT: s_and_b32 s14, s59, 0xffff +; SI-NEXT: s_lshl_b32 s15, s21, 16 +; SI-NEXT: s_or_b32 s14, s14, s15 +; SI-NEXT: s_and_b32 s15, s56, 0xffff +; SI-NEXT: s_lshl_b32 s24, s48, 16 +; SI-NEXT: s_or_b32 s15, s15, s24 +; SI-NEXT: s_and_b32 s24, s57, 0xffff +; SI-NEXT: s_lshl_b32 s25, s40, 16 +; SI-NEXT: v_readlane_b32 s18, v47, 50 ; SI-NEXT: s_or_b32 s24, s24, s25 -; SI-NEXT: s_and_b32 s25, s58, 0xffff -; SI-NEXT: v_readlane_b32 s27, v46, 35 -; SI-NEXT: s_lshl_b32 s26, s26, 16 -; SI-NEXT: s_or_b32 s25, s25, s26 -; SI-NEXT: s_and_b32 s26, s59, 0xffff -; SI-NEXT: s_lshl_b32 s27, s89, 16 -; SI-NEXT: v_readlane_b32 s28, v46, 36 -; SI-NEXT: s_or_b32 s26, s26, s27 -; SI-NEXT: s_and_b32 s27, s56, 0xffff -; SI-NEXT: v_readlane_b32 s29, v46, 37 -; SI-NEXT: s_lshl_b32 s28, s28, 16 -; SI-NEXT: s_or_b32 s27, s27, s28 -; SI-NEXT: s_and_b32 s28, s57, 0xffff -; SI-NEXT: s_lshl_b32 s29, s91, 16 -; SI-NEXT: v_readlane_b32 s56, v46, 38 -; SI-NEXT: s_or_b32 s28, s28, s29 -; SI-NEXT: s_and_b32 s29, s46, 0xffff -; SI-NEXT: v_readlane_b32 s57, v46, 39 -; SI-NEXT: s_lshl_b32 s46, s56, 16 -; SI-NEXT: s_or_b32 s29, s29, s46 -; SI-NEXT: s_and_b32 s46, s47, 0xffff +; SI-NEXT: s_and_b32 s25, s46, 0xffff +; SI-NEXT: v_readlane_b32 s19, v47, 51 +; SI-NEXT: s_lshl_b32 s40, s18, 16 +; SI-NEXT: s_or_b32 s25, s25, s40 +; SI-NEXT: s_and_b32 s40, s47, 0xffff +; SI-NEXT: s_lshl_b32 s41, s17, 16 +; SI-NEXT: v_readlane_b32 s18, v47, 52 +; SI-NEXT: s_or_b32 s40, s40, s41 +; SI-NEXT: s_and_b32 s41, s44, 0xffff +; SI-NEXT: s_lshl_b32 s44, s18, 16 +; SI-NEXT: s_or_b32 s41, s41, s44 +; SI-NEXT: s_and_b32 s44, s45, 0xffff +; SI-NEXT: s_lshl_b32 s45, s89, 16 +; SI-NEXT: v_readlane_b32 s19, v47, 53 +; SI-NEXT: s_or_b32 s44, s44, s45 +; SI-NEXT: s_and_b32 s42, s42, 0xffff +; SI-NEXT: s_lshl_b32 s45, s36, 16 +; SI-NEXT: s_or_b32 s42, s42, s45 +; SI-NEXT: s_and_b32 s43, s43, 0xffff +; SI-NEXT: s_lshl_b32 s45, s23, 16 +; SI-NEXT: v_readlane_b32 s18, v47, 54 +; SI-NEXT: s_or_b32 s43, s43, s45 +; SI-NEXT: s_and_b32 s45, s76, 0xffff +; SI-NEXT: s_lshl_b32 s46, s18, 16 +; SI-NEXT: s_or_b32 s45, s45, s46 +; SI-NEXT: s_and_b32 s46, s77, 0xffff ; SI-NEXT: s_lshl_b32 s47, s93, 16 -; SI-NEXT: v_readlane_b32 s56, v46, 40 ; SI-NEXT: s_or_b32 s46, s46, s47 -; SI-NEXT: s_and_b32 s44, s44, 0xffff -; SI-NEXT: v_readlane_b32 s57, v46, 41 -; SI-NEXT: s_lshl_b32 s47, s56, 16 -; SI-NEXT: s_or_b32 s44, s44, s47 -; SI-NEXT: s_and_b32 s45, s45, 0xffff -; SI-NEXT: s_lshl_b32 s47, s95, 16 -; SI-NEXT: v_readlane_b32 s56, v46, 42 -; SI-NEXT: s_or_b32 s45, s45, s47 -; SI-NEXT: s_and_b32 s42, s42, 0xffff +; SI-NEXT: s_and_b32 s22, s50, 0xffff +; SI-NEXT: s_lshl_b32 s47, s66, 16 +; SI-NEXT: s_or_b32 s22, s22, s47 +; SI-NEXT: s_and_b32 s23, s51, 0xffff +; SI-NEXT: s_lshl_b32 s47, s16, 16 +; SI-NEXT: v_readlane_b32 s16, v47, 56 +; SI-NEXT: s_or_b32 s23, s23, s47 +; SI-NEXT: s_and_b32 s20, s52, 0xffff +; SI-NEXT: v_readlane_b32 s17, v47, 57 +; SI-NEXT: s_lshl_b32 s47, s16, 16 +; SI-NEXT: s_or_b32 s20, s20, s47 +; SI-NEXT: s_and_b32 s21, s53, 0xffff +; SI-NEXT: s_lshl_b32 s47, s88, 16 +; SI-NEXT: v_readlane_b32 s16, v47, 58 +; SI-NEXT: v_readlane_b32 s19, v47, 55 +; SI-NEXT: s_or_b32 s21, s21, s47 +; SI-NEXT: s_and_b32 s18, s54, 0xffff +; SI-NEXT: s_lshl_b32 s47, s16, 16 +; SI-NEXT: s_or_b32 s18, s18, s47 +; SI-NEXT: s_and_b32 s19, s55, 0xffff +; SI-NEXT: s_lshl_b32 s47, s92, 16 +; SI-NEXT: v_readlane_b32 s28, v47, 60 +; SI-NEXT: v_readlane_b32 s17, v47, 59 +; SI-NEXT: s_or_b32 s19, s19, s47 +; SI-NEXT: s_and_b32 s16, s94, 0xffff +; SI-NEXT: s_lshl_b32 s47, s28, 16 +; SI-NEXT: s_or_b32 s16, s16, s47 +; SI-NEXT: s_and_b32 s17, s95, 0xffff +; SI-NEXT: s_lshl_b32 s47, s37, 16 +; SI-NEXT: v_readlane_b32 s56, v47, 62 +; SI-NEXT: v_readlane_b32 s29, v47, 61 +; SI-NEXT: s_or_b32 s17, s17, s47 +; SI-NEXT: s_and_b32 s28, s30, 0xffff ; SI-NEXT: s_lshl_b32 s47, s56, 16 -; SI-NEXT: s_or_b32 s42, s42, s47 -; SI-NEXT: s_and_b32 s43, s43, 0xffff -; SI-NEXT: s_lshl_b32 s47, s30, 16 -; SI-NEXT: s_or_b32 s43, s43, s47 -; SI-NEXT: s_and_b32 s40, s40, 0xffff -; SI-NEXT: s_lshl_b32 s47, s38, 16 -; SI-NEXT: s_or_b32 s40, s40, s47 -; SI-NEXT: s_and_b32 s41, s41, 0xffff -; SI-NEXT: s_lshl_b32 s47, s34, 16 -; SI-NEXT: s_or_b32 s41, s41, s47 -; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s47, s48, 16 -; SI-NEXT: s_or_b32 s14, s14, s47 -; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s47, s36, 16 -; SI-NEXT: s_or_b32 s15, s15, s47 -; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s47, s50, 16 -; SI-NEXT: s_or_b32 s12, s12, s47 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s47, s39, 16 -; SI-NEXT: s_or_b32 s13, s13, s47 -; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s47, s52, 16 -; SI-NEXT: s_or_b32 s10, s10, s47 -; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s47, s49, 16 -; SI-NEXT: s_or_b32 s11, s11, s47 -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s47, s54, 16 -; SI-NEXT: s_or_b32 s8, s8, s47 -; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s47, s51, 16 -; SI-NEXT: s_or_b32 s9, s9, s47 -; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_or_b32 s28, s28, s47 +; SI-NEXT: s_and_b32 s29, s31, 0xffff +; SI-NEXT: s_lshl_b32 s47, s27, 16 +; SI-NEXT: s_or_b32 s29, s29, s47 +; SI-NEXT: s_and_b32 s26, s34, 0xffff ; SI-NEXT: s_lshl_b32 s47, s64, 16 -; SI-NEXT: s_or_b32 s6, s6, s47 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s47, s53, 16 -; SI-NEXT: s_or_b32 s7, s7, s47 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s47, s66, 16 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s16, s92, 16 -; SI-NEXT: s_or_b32 s4, s4, s47 -; SI-NEXT: s_or_b32 s5, s5, s16 +; SI-NEXT: s_and_b32 s27, s35, 0xffff +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_or_b32 s26, s26, s47 +; SI-NEXT: s_or_b32 s6, s27, s6 ; SI-NEXT: v_readlane_b32 s30, v45, 34 -; SI-NEXT: v_readlane_b32 s57, v46, 43 -; SI-NEXT: v_mov_b32_e32 v0, s17 -; SI-NEXT: v_mov_b32_e32 v1, s18 -; SI-NEXT: v_mov_b32_e32 v2, s19 -; SI-NEXT: v_mov_b32_e32 v3, s20 -; SI-NEXT: v_mov_b32_e32 v4, s21 -; SI-NEXT: v_mov_b32_e32 v5, s22 -; SI-NEXT: v_mov_b32_e32 v6, s23 -; SI-NEXT: v_mov_b32_e32 v7, s24 -; SI-NEXT: v_mov_b32_e32 v8, s25 -; SI-NEXT: v_mov_b32_e32 v9, s26 -; SI-NEXT: v_mov_b32_e32 v10, s27 -; SI-NEXT: v_mov_b32_e32 v11, s28 -; SI-NEXT: v_mov_b32_e32 v12, s29 -; SI-NEXT: v_mov_b32_e32 v13, s46 -; SI-NEXT: v_mov_b32_e32 v14, s44 -; SI-NEXT: v_mov_b32_e32 v15, s45 +; SI-NEXT: v_readlane_b32 s57, v47, 63 +; SI-NEXT: v_mov_b32_e32 v0, s4 +; SI-NEXT: v_mov_b32_e32 v1, s5 +; SI-NEXT: v_mov_b32_e32 v2, s7 +; SI-NEXT: v_mov_b32_e32 v3, s8 +; SI-NEXT: v_mov_b32_e32 v4, s9 +; SI-NEXT: v_mov_b32_e32 v5, s10 +; SI-NEXT: v_mov_b32_e32 v6, s11 +; SI-NEXT: v_mov_b32_e32 v7, s12 +; SI-NEXT: v_mov_b32_e32 v8, s13 +; SI-NEXT: v_mov_b32_e32 v9, s14 +; SI-NEXT: v_mov_b32_e32 v10, s15 +; SI-NEXT: v_mov_b32_e32 v11, s24 +; SI-NEXT: v_mov_b32_e32 v12, s25 +; SI-NEXT: v_mov_b32_e32 v13, s40 +; SI-NEXT: v_mov_b32_e32 v14, s41 +; SI-NEXT: v_mov_b32_e32 v15, s44 ; SI-NEXT: v_mov_b32_e32 v16, s42 ; SI-NEXT: v_mov_b32_e32 v17, s43 -; SI-NEXT: v_mov_b32_e32 v18, s40 -; SI-NEXT: v_mov_b32_e32 v19, s41 -; SI-NEXT: v_mov_b32_e32 v20, s14 -; SI-NEXT: v_mov_b32_e32 v21, s15 -; SI-NEXT: v_mov_b32_e32 v22, s12 -; SI-NEXT: v_mov_b32_e32 v23, s13 -; SI-NEXT: v_mov_b32_e32 v24, s10 -; SI-NEXT: v_mov_b32_e32 v25, s11 -; SI-NEXT: v_mov_b32_e32 v26, s8 -; SI-NEXT: v_mov_b32_e32 v27, s9 -; SI-NEXT: v_mov_b32_e32 v28, s6 -; SI-NEXT: v_mov_b32_e32 v29, s7 -; SI-NEXT: v_mov_b32_e32 v30, s4 -; SI-NEXT: v_mov_b32_e32 v31, s5 +; SI-NEXT: v_mov_b32_e32 v18, s45 +; SI-NEXT: v_mov_b32_e32 v19, s46 +; SI-NEXT: v_mov_b32_e32 v20, s22 +; SI-NEXT: v_mov_b32_e32 v21, s23 +; SI-NEXT: v_mov_b32_e32 v22, s20 +; SI-NEXT: v_mov_b32_e32 v23, s21 +; SI-NEXT: v_mov_b32_e32 v24, s18 +; SI-NEXT: v_mov_b32_e32 v25, s19 +; SI-NEXT: v_mov_b32_e32 v26, s16 +; SI-NEXT: v_mov_b32_e32 v27, s17 +; SI-NEXT: v_mov_b32_e32 v28, s28 +; SI-NEXT: v_mov_b32_e32 v29, s29 +; SI-NEXT: v_mov_b32_e32 v30, s26 +; SI-NEXT: v_mov_b32_e32 v31, s6 ; SI-NEXT: v_readlane_b32 s31, v45, 35 ; SI-NEXT: v_readlane_b32 s99, v45, 33 ; SI-NEXT: v_readlane_b32 s98, v45, 32 @@ -194294,76 +194555,75 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB97_4: ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 26 -; SI-NEXT: v_writelane_b32 v46, s5, 27 +; SI-NEXT: s_mov_b32 s26, s97 +; SI-NEXT: v_writelane_b32 v47, s4, 50 +; SI-NEXT: v_writelane_b32 v47, s5, 51 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: s_mov_b32 s18, s66 +; SI-NEXT: v_writelane_b32 v47, s4, 52 +; SI-NEXT: v_writelane_b32 v47, s5, 53 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr77 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr68 +; SI-NEXT: ; implicit-def: $sgpr28 +; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr12 ; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr84 +; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr89 +; SI-NEXT: ; implicit-def: $sgpr38 +; SI-NEXT: ; implicit-def: $sgpr21 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr91 +; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr93 +; SI-NEXT: ; implicit-def: $sgpr17 ; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr95 +; SI-NEXT: ; implicit-def: $sgpr89 ; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr30 -; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr48 ; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr23 +; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: ; implicit-def: $sgpr93 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr16 ; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr49 -; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr88 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr51 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr66 ; SI-NEXT: ; implicit-def: $sgpr92 -; SI-NEXT: v_writelane_b32 v46, s4, 28 -; SI-NEXT: v_writelane_b32 v46, s5, 29 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 30 -; SI-NEXT: v_writelane_b32 v46, s5, 31 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 32 -; SI-NEXT: v_writelane_b32 v46, s5, 33 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 34 -; SI-NEXT: v_writelane_b32 v46, s5, 35 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 36 -; SI-NEXT: v_writelane_b32 v46, s5, 37 +; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr37 +; SI-NEXT: ; implicit-def: $sgpr30 +; SI-NEXT: ; implicit-def: $sgpr27 +; SI-NEXT: ; implicit-def: $sgpr34 +; SI-NEXT: ; implicit-def: $sgpr64 +; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: v_writelane_b32 v47, s4, 54 +; SI-NEXT: v_writelane_b32 v47, s5, 55 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 38 -; SI-NEXT: v_writelane_b32 v46, s5, 39 +; SI-NEXT: v_writelane_b32 v47, s4, 56 +; SI-NEXT: v_writelane_b32 v47, s5, 57 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 40 -; SI-NEXT: v_writelane_b32 v46, s5, 41 +; SI-NEXT: v_writelane_b32 v47, s4, 58 +; SI-NEXT: v_writelane_b32 v47, s5, 59 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v46, s4, 42 -; SI-NEXT: v_writelane_b32 v46, s5, 43 +; SI-NEXT: v_writelane_b32 v47, s4, 60 +; SI-NEXT: v_writelane_b32 v47, s5, 61 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v47, s4, 62 +; SI-NEXT: v_writelane_b32 v47, s5, 63 ; SI-NEXT: s_branch .LBB97_2 ; ; VI-LABEL: bitcast_v128i8_to_v64i16_scalar: @@ -194385,17 +194645,40 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_readfirstlane_b32 s63, v12 +; VI-NEXT: v_readfirstlane_b32 s62, v15 +; VI-NEXT: v_readfirstlane_b32 s74, v14 +; VI-NEXT: v_readfirstlane_b32 s57, v13 ; VI-NEXT: v_readfirstlane_b32 s8, v0 -; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:280 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:276 +; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:8 +; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328 +; VI-NEXT: v_readfirstlane_b32 s63, v12 ; VI-NEXT: v_readfirstlane_b32 s45, v11 +; VI-NEXT: v_readfirstlane_b32 s41, v9 +; VI-NEXT: v_readfirstlane_b32 s46, v8 +; VI-NEXT: v_readfirstlane_b32 s13, v7 ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332 -; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:12 -; VI-NEXT: v_readfirstlane_b32 s59, v29 -; VI-NEXT: v_readfirstlane_b32 s47, v27 +; VI-NEXT: v_readfirstlane_b32 s42, v6 +; VI-NEXT: v_readfirstlane_b32 s10, v5 +; VI-NEXT: v_readfirstlane_b32 s14, v4 +; VI-NEXT: v_readfirstlane_b32 s7, v3 +; VI-NEXT: v_readfirstlane_b32 s11, v2 +; VI-NEXT: v_readfirstlane_b32 s6, v1 +; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 +; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:316 +; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:312 +; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:308 +; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:304 +; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:300 +; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:296 +; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:292 +; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:288 +; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:284 ; VI-NEXT: v_readfirstlane_b32 s75, v30 +; VI-NEXT: v_readfirstlane_b32 s59, v29 ; VI-NEXT: v_readfirstlane_b32 s72, v28 +; VI-NEXT: v_readfirstlane_b32 s47, v27 ; VI-NEXT: v_readfirstlane_b32 s60, v26 ; VI-NEXT: v_readfirstlane_b32 s43, v25 ; VI-NEXT: v_readfirstlane_b32 s56, v24 @@ -194403,250 +194686,247 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_readfirstlane_b32 s44, v22 ; VI-NEXT: v_readfirstlane_b32 s12, v21 ; VI-NEXT: v_readfirstlane_b32 s40, v20 -; VI-NEXT: v_readfirstlane_b32 s76, v18 -; VI-NEXT: v_readfirstlane_b32 s73, v16 ; VI-NEXT: v_readfirstlane_b32 s9, v19 +; VI-NEXT: v_readfirstlane_b32 s76, v18 ; VI-NEXT: v_readfirstlane_b32 s61, v17 -; VI-NEXT: v_readfirstlane_b32 s62, v15 -; VI-NEXT: v_readfirstlane_b32 s74, v14 -; VI-NEXT: v_readfirstlane_b32 s57, v13 +; VI-NEXT: v_readfirstlane_b32 s73, v16 ; VI-NEXT: v_readfirstlane_b32 s58, v10 -; VI-NEXT: v_readfirstlane_b32 s41, v9 -; VI-NEXT: v_readfirstlane_b32 s46, v8 -; VI-NEXT: v_readfirstlane_b32 s13, v7 -; VI-NEXT: v_readfirstlane_b32 s42, v6 -; VI-NEXT: v_readfirstlane_b32 s10, v5 -; VI-NEXT: v_readfirstlane_b32 s14, v4 -; VI-NEXT: v_readfirstlane_b32 s7, v3 -; VI-NEXT: v_readfirstlane_b32 s11, v2 -; VI-NEXT: v_readfirstlane_b32 s6, v1 -; VI-NEXT: buffer_load_ushort v14, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:4 -; VI-NEXT: buffer_load_ushort v13, off, s[0:3], s32 -; VI-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:328 -; VI-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:324 -; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:320 -; VI-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:316 -; VI-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:312 -; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:308 -; VI-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:304 -; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:300 -; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:296 -; VI-NEXT: buffer_load_ushort v10, off, s[0:3], s32 offset:292 -; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:288 -; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:284 -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:272 -; VI-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:268 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:264 +; VI-NEXT: s_waitcnt vmcnt(11) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:260 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:280 +; VI-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:276 +; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:272 +; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:268 +; VI-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:264 +; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:260 +; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:256 +; VI-NEXT: buffer_load_ushort v11, off, s[0:3], s32 offset:252 +; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:248 +; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:244 +; VI-NEXT: buffer_load_ushort v12, off, s[0:3], s32 offset:240 +; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:236 +; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:232 +; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:228 +; VI-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:224 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:256 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:252 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:248 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:212 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:244 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:236 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 -; VI-NEXT: s_and_b64 s[4:5], vcc, exec +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:180 +; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:176 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:172 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:216 -; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:212 -; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:208 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:168 +; VI-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:164 +; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:160 +; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:156 +; VI-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:152 +; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:148 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:144 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:200 -; VI-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:196 -; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:192 -; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:188 -; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:184 -; VI-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:180 -; VI-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:176 -; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:172 -; VI-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:168 -; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:164 -; VI-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:160 -; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:156 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:152 -; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:148 -; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:144 -; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:140 -; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:136 -; VI-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:132 -; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:128 -; VI-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:124 -; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:120 -; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:116 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:140 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:136 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:108 -; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:104 -; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:100 -; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:96 -; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:92 -; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:88 -; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:84 -; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:80 -; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:76 -; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72 -; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:68 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:64 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:132 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:128 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60 -; VI-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:56 -; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:48 -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(14) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:44 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:40 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:124 +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:120 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:36 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:32 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:116 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:28 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:24 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:112 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:20 -; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:108 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:104 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:100 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:96 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:92 +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 +; VI-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:88 +; VI-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:84 +; VI-NEXT: buffer_load_ushort v30, off, s[0:3], s32 offset:80 +; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:76 +; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:72 +; VI-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:68 +; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:64 +; VI-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:60 +; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:56 +; VI-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:52 +; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:48 +; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:44 +; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:40 +; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:36 +; VI-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:32 +; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:28 +; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:24 +; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20 +; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:16 +; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:12 +; VI-NEXT: s_and_b64 s[4:5], vcc, exec +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(4) +; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; VI-NEXT: s_waitcnt vmcnt(6) +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill ; VI-NEXT: s_cbranch_scc0 .LBB97_4 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v4, s6 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_mov_b32_e32 v3, s29 ; VI-NEXT: v_perm_b32 v4, s8, v4, v11 ; VI-NEXT: v_perm_b32 v3, s28, v3, v11 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v5, s10 ; VI-NEXT: v_or_b32_e32 v3, v3, v4 ; VI-NEXT: v_mov_b32_e32 v4, s7 ; VI-NEXT: v_perm_b32 v5, s14, v5, v11 ; VI-NEXT: v_perm_b32 v4, s11, v4, v11 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v6, s41 ; VI-NEXT: v_or_b32_e32 v4, v4, v5 ; VI-NEXT: v_mov_b32_e32 v5, s13 ; VI-NEXT: v_perm_b32 v6, s46, v6, v11 ; VI-NEXT: v_perm_b32 v5, s42, v5, v11 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; VI-NEXT: v_mov_b32_e32 v63, v60 +; VI-NEXT: v_mov_b32_e32 v60, v7 ; VI-NEXT: v_mov_b32_e32 v7, s57 ; VI-NEXT: v_or_b32_e32 v5, v5, v6 ; VI-NEXT: v_mov_b32_e32 v6, s45 ; VI-NEXT: v_perm_b32 v7, s63, v7, v11 ; VI-NEXT: v_perm_b32 v6, s58, v6, v11 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; VI-NEXT: v_mov_b32_e32 v42, v8 ; VI-NEXT: v_mov_b32_e32 v8, s61 ; VI-NEXT: v_or_b32_e32 v6, v6, v7 ; VI-NEXT: v_mov_b32_e32 v7, s62 ; VI-NEXT: v_perm_b32 v8, s73, v8, v11 ; VI-NEXT: v_perm_b32 v7, s74, v7, v11 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; VI-NEXT: v_mov_b32_e32 v40, v9 ; VI-NEXT: v_mov_b32_e32 v9, s12 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 ; VI-NEXT: v_mov_b32_e32 v8, s9 ; VI-NEXT: v_perm_b32 v9, s40, v9, v11 ; VI-NEXT: v_perm_b32 v8, s76, v8, v11 ; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_mov_b32_e32 v43, v10 ; VI-NEXT: v_mov_b32_e32 v10, s43 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 ; VI-NEXT: v_mov_b32_e32 v9, s15 ; VI-NEXT: v_perm_b32 v10, s56, v10, v11 +; VI-NEXT: v_mov_b32_e32 v62, v32 ; VI-NEXT: v_perm_b32 v9, s44, v9, v11 ; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_mov_b32_e32 v35, v12 +; VI-NEXT: v_mov_b32_e32 v32, v39 +; VI-NEXT: v_mov_b32_e32 v39, v12 ; VI-NEXT: v_mov_b32_e32 v12, s59 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 ; VI-NEXT: v_mov_b32_e32 v10, s47 @@ -194659,568 +194939,574 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: v_perm_b32 v11, s75, v13, v11 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 -; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v18, v23, v18, s4 -; VI-NEXT: v_perm_b32 v23, v51, v33, s4 -; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_perm_b32 v12, v56, v12, s4 +; VI-NEXT: v_perm_b32 v12, v21, v17, s4 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v13, v47, v13, s4 +; VI-NEXT: v_perm_b32 v13, v19, v16, s4 ; VI-NEXT: v_or_b32_e32 v12, v13, v12 -; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v14, v59, v14, s4 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v15, v32, v15, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v13, v61, v13, s4 +; VI-NEXT: v_perm_b32 v13, v25, v20, s4 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; VI-NEXT: v_perm_b32 v14, v23, v18, s4 ; VI-NEXT: v_or_b32_e32 v13, v14, v13 -; VI-NEXT: v_perm_b32 v14, v17, v60, s4 +; VI-NEXT: v_perm_b32 v14, v29, v24, s4 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; VI-NEXT: v_perm_b32 v15, v27, v22, s4 ; VI-NEXT: v_or_b32_e32 v14, v15, v14 -; VI-NEXT: v_perm_b32 v15, v21, v16, s4 -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v17, v28, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; VI-NEXT: v_perm_b32 v15, v46, v28, s4 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: v_perm_b32 v21, v58, v46, s4 -; VI-NEXT: v_perm_b32 v24, v36, v49, s4 -; VI-NEXT: v_mov_b32_e32 v28, v52 -; VI-NEXT: v_mov_b32_e32 v52, v53 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v16, v19, v16, s4 -; VI-NEXT: v_perm_b32 v19, v26, v22, s4 -; VI-NEXT: v_or_b32_e32 v17, v19, v17 -; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v16, v31, v26, s4 ; VI-NEXT: v_or_b32_e32 v15, v16, v15 -; VI-NEXT: v_perm_b32 v16, v25, v20, s4 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v16, v58, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; VI-NEXT: v_or_b32_e32 v16, v18, v16 -; VI-NEXT: v_perm_b32 v18, v45, v27, s4 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; VI-NEXT: v_perm_b32 v20, v44, v29, s4 -; VI-NEXT: v_perm_b32 v22, v53, v42, s4 -; VI-NEXT: v_mov_b32_e32 v45, v34 -; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v17, v56, v30, s4 +; VI-NEXT: v_or_b32_e32 v16, v17, v16 +; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v34, v44 +; VI-NEXT: v_perm_b32 v22, v55, v48, s4 +; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v27, v32, v39, s4 +; VI-NEXT: v_perm_b32 v29, v61, v62, s4 +; VI-NEXT: v_mov_b32_e32 v32, v63 +; VI-NEXT: s_waitcnt vmcnt(7) +; VI-NEXT: v_perm_b32 v17, v18, v17, s4 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; VI-NEXT: s_waitcnt vmcnt(8) +; VI-NEXT: v_perm_b32 v23, v44, v54, s4 +; VI-NEXT: s_waitcnt vmcnt(5) +; VI-NEXT: v_perm_b32 v21, v49, v21, s4 +; VI-NEXT: s_waitcnt vmcnt(4) +; VI-NEXT: v_perm_b32 v26, v26, v43, s4 ; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_perm_b32 v19, v30, v19, s4 +; VI-NEXT: v_perm_b32 v28, v28, v53, s4 +; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: v_mov_b32_e32 v39, v31 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v18, v19, v18, s4 +; VI-NEXT: v_or_b32_e32 v17, v18, v17 +; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_mov_b32_e32 v53, v43 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v18, v19, v18, s4 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v19, v20, v19, s4 ; VI-NEXT: v_or_b32_e32 v18, v19, v18 -; VI-NEXT: v_perm_b32 v19, v55, v31, s4 +; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v19, v36, v19, s4 ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v20, v35, v20, s4 ; VI-NEXT: v_or_b32_e32 v19, v20, v19 -; VI-NEXT: v_perm_b32 v20, v39, v57, s4 +; VI-NEXT: v_perm_b32 v20, v50, v47, s4 +; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: v_or_b32_e32 v20, v21, v20 -; VI-NEXT: v_perm_b32 v21, v38, v63, s4 +; VI-NEXT: v_perm_b32 v21, v41, v51, s4 +; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; VI-NEXT: v_or_b32_e32 v21, v22, v21 -; VI-NEXT: v_perm_b32 v22, v54, v37, s4 +; VI-NEXT: s_waitcnt vmcnt(6) +; VI-NEXT: v_perm_b32 v22, v38, v50, s4 ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; VI-NEXT: v_or_b32_e32 v22, v23, v22 -; VI-NEXT: v_perm_b32 v23, v40, v50, s4 +; VI-NEXT: s_waitcnt vmcnt(4) +; VI-NEXT: v_perm_b32 v23, v47, v36, s4 ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; VI-NEXT: s_waitcnt vmcnt(2) +; VI-NEXT: v_perm_b32 v24, v51, v49, s4 ; VI-NEXT: v_or_b32_e32 v23, v24, v23 -; VI-NEXT: v_perm_b32 v24, v48, v34, s4 +; VI-NEXT: v_perm_b32 v24, v57, v48, s4 ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_mov_b32_e32 v48, v25 -; VI-NEXT: v_perm_b32 v25, v25, v41, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v25, v25, v35, s4 ; VI-NEXT: v_or_b32_e32 v24, v25, v24 -; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v34, v33 -; VI-NEXT: v_mov_b32_e32 v33, v26 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v55, v57 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_mov_b32_e32 v53, v25 -; VI-NEXT: v_perm_b32 v25, v26, v25, s4 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v25, v33, v59, s4 ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_perm_b32 v30, v31, v30, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s4 ; VI-NEXT: v_or_b32_e32 v25, v26, v25 -; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v27, v26, s4 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v26, v52, v37, s4 ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v29, v27, s4 ; VI-NEXT: v_or_b32_e32 v26, v27, v26 -; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v29, v27, s4 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v27, v34, v40, s4 ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v28, v29, s4 ; VI-NEXT: v_or_b32_e32 v27, v28, v27 -; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v28, v28, v35, s4 +; VI-NEXT: v_perm_b32 v28, v42, v60, s4 ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v62, v29, s4 ; VI-NEXT: v_or_b32_e32 v28, v29, v28 -; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v62, v44 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v43, v29, s4 +; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v60, v30 +; VI-NEXT: v_perm_b32 v30, v31, v30, s4 +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v57, v59 +; VI-NEXT: v_mov_b32_e32 v34, v61 +; VI-NEXT: s_waitcnt vmcnt(3) +; VI-NEXT: v_mov_b32_e32 v33, v29 +; VI-NEXT: v_perm_b32 v29, v29, v63, s4 ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; VI-NEXT: v_or_b32_e32 v29, v30, v29 -; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_mov_b32_e32 v63, v31 +; VI-NEXT: v_mov_b32_e32 v62, v37 +; VI-NEXT: v_perm_b32 v43, v43, v52, s4 +; VI-NEXT: v_mov_b32_e32 v61, v52 +; VI-NEXT: v_mov_b32_e32 v52, v51 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_mov_b32_e32 v42, v30 ; VI-NEXT: v_perm_b32 v30, v31, v30, s4 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v31, v35, v31, s4 +; VI-NEXT: v_mov_b32_e32 v40, v31 +; VI-NEXT: v_perm_b32 v31, v37, v31, s4 +; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload ; VI-NEXT: v_or_b32_e32 v30, v31, v30 -; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v31, v35, v31, s4 +; VI-NEXT: v_perm_b32 v31, v37, v59, s4 ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; VI-NEXT: v_mov_b32_e32 v35, v43 -; VI-NEXT: v_perm_b32 v43, v44, v43, s4 ; VI-NEXT: v_or_b32_e32 v31, v43, v31 -; VI-NEXT: v_mov_b32_e32 v43, v39 -; VI-NEXT: v_mov_b32_e32 v39, v34 -; VI-NEXT: v_mov_b32_e32 v34, v52 -; VI-NEXT: v_mov_b32_e32 v52, v45 +; VI-NEXT: v_mov_b32_e32 v43, v35 +; VI-NEXT: v_mov_b32_e32 v35, v37 +; VI-NEXT: v_mov_b32_e32 v37, v59 ; VI-NEXT: s_cbranch_execnz .LBB97_3 ; VI-NEXT: .LBB97_2: ; %cmp.true -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v35 ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: s_add_i32 s75, s75, 3 -; VI-NEXT: s_add_i32 s72, s72, 3 -; VI-NEXT: s_add_i32 s60, s60, 3 -; VI-NEXT: s_add_i32 s56, s56, 3 -; VI-NEXT: s_add_i32 s44, s44, 3 -; VI-NEXT: s_add_i32 s40, s40, 3 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v0, v0, v37, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v53 +; VI-NEXT: v_perm_b32 v0, v0, v61, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v63 +; VI-NEXT: v_perm_b32 v0, v0, v42, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62 +; VI-NEXT: v_perm_b32 v0, v0, v40, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33 +; VI-NEXT: v_perm_b32 v0, v0, v32, s4 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v39 +; VI-NEXT: v_perm_b32 v39, v0, v60, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v27, 0xc0c0004 ; VI-NEXT: s_add_i32 s76, s76, 3 +; VI-NEXT: v_mov_b32_e32 v28, s9 +; VI-NEXT: v_perm_b32 v6, s76, v28, v27 ; VI-NEXT: s_add_i32 s73, s73, 3 +; VI-NEXT: v_mov_b32_e32 v28, s61 +; VI-NEXT: v_perm_b32 v7, s73, v28, v27 ; VI-NEXT: s_add_i32 s74, s74, 3 +; VI-NEXT: v_mov_b32_e32 v28, s62 +; VI-NEXT: v_perm_b32 v8, s74, v28, v27 ; VI-NEXT: s_add_i32 s63, s63, 3 +; VI-NEXT: v_mov_b32_e32 v28, s57 +; VI-NEXT: v_perm_b32 v9, s63, v28, v27 ; VI-NEXT: s_add_i32 s58, s58, 3 +; VI-NEXT: v_mov_b32_e32 v28, s45 +; VI-NEXT: v_perm_b32 v10, s58, v28, v27 ; VI-NEXT: s_add_i32 s46, s46, 3 +; VI-NEXT: v_mov_b32_e32 v28, s41 +; VI-NEXT: v_perm_b32 v15, s46, v28, v27 ; VI-NEXT: s_add_i32 s42, s42, 3 +; VI-NEXT: v_mov_b32_e32 v28, s13 +; VI-NEXT: v_perm_b32 v14, s42, v28, v27 ; VI-NEXT: s_add_i32 s14, s14, 3 +; VI-NEXT: v_mov_b32_e32 v28, s10 ; VI-NEXT: s_add_i32 s11, s11, 3 +; VI-NEXT: s_add_i32 s18, s18, 3 +; VI-NEXT: s_add_i32 s16, s16, 3 +; VI-NEXT: v_mov_b32_e32 v21, s17 +; VI-NEXT: s_add_i32 s75, s75, 3 +; VI-NEXT: s_add_i32 s72, s72, 3 +; VI-NEXT: s_add_i32 s60, s60, 3 +; VI-NEXT: v_mov_b32_e32 v2, s47 +; VI-NEXT: s_add_i32 s56, s56, 3 +; VI-NEXT: v_mov_b32_e32 v3, s43 +; VI-NEXT: s_add_i32 s44, s44, 3 +; VI-NEXT: v_mov_b32_e32 v4, s15 +; VI-NEXT: s_add_i32 s40, s40, 3 +; VI-NEXT: v_mov_b32_e32 v5, s12 ; VI-NEXT: s_add_i32 s8, s8, 3 ; VI-NEXT: s_add_i32 s28, s28, 3 +; VI-NEXT: v_mov_b32_e32 v29, s29 ; VI-NEXT: s_add_i32 s26, s26, 3 +; VI-NEXT: v_mov_b32_e32 v30, s27 ; VI-NEXT: s_add_i32 s24, s24, 3 +; VI-NEXT: v_mov_b32_e32 v31, s25 ; VI-NEXT: s_add_i32 s22, s22, 3 +; VI-NEXT: v_mov_b32_e32 v32, s23 ; VI-NEXT: s_add_i32 s20, s20, 3 -; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s16, s16, 3 -; VI-NEXT: v_mov_b32_e32 v18, s17 +; VI-NEXT: v_mov_b32_e32 v33, s21 +; VI-NEXT: v_perm_b32 v21, s16, v21, v27 +; VI-NEXT: v_perm_b32 v12, s60, v2, v27 +; VI-NEXT: v_perm_b32 v11, s56, v3, v27 +; VI-NEXT: v_perm_b32 v4, s44, v4, v27 +; VI-NEXT: v_perm_b32 v5, s40, v5, v27 +; VI-NEXT: v_perm_b32 v29, s28, v29, v27 +; VI-NEXT: v_perm_b32 v30, s26, v30, v27 +; VI-NEXT: v_perm_b32 v31, s24, v31, v27 +; VI-NEXT: v_perm_b32 v32, s22, v32, v27 +; VI-NEXT: v_perm_b32 v33, s20, v33, v27 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v12 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v8 +; VI-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x3000000, v7 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v62 -; VI-NEXT: v_perm_b32 v0, v0, v35, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v62, s21 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34 +; VI-NEXT: v_mov_b32_e32 v34, s19 +; VI-NEXT: v_perm_b32 v34, s18, v34, v27 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v35, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v37, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v26, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v25, v0, v57, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v0, v0, v1, s4 -; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v24, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v23, v0, v48, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v27, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_perm_b32 v48, v0, v43, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v47 +; VI-NEXT: v_perm_b32 v22, v0, v36, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v52 +; VI-NEXT: v_perm_b32 v17, v0, v49, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38 +; VI-NEXT: v_perm_b32 v18, v0, v50, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v44 +; VI-NEXT: v_perm_b32 v19, v0, v54, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v41 +; VI-NEXT: v_perm_b32 v20, v0, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v55 +; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v35 +; VI-NEXT: v_add_u32_e32 v38, vcc, 0x300, v24 +; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v22 +; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v19 +; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v20 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v49, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v50, vcc, 0x300, v49 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v26, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; VI-NEXT: v_perm_b32 v51, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v28, v0, v1, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33 -; VI-NEXT: v_perm_b32 v25, v0, v53, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28 -; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 -; VI-NEXT: v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26 +; VI-NEXT: v_perm_b32 v52, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v29, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29 -; VI-NEXT: v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25 +; VI-NEXT: v_perm_b32 v53, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v53 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: v_perm_b32 v24, v0, v52, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v48 -; VI-NEXT: v_perm_b32 v30, v0, v41, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v40 -; VI-NEXT: v_perm_b32 v23, v0, v50, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v36 -; VI-NEXT: v_perm_b32 v31, v0, v49, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v54 -; VI-NEXT: v_perm_b32 v22, v0, v37, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v51 -; VI-NEXT: v_perm_b32 v33, v0, v39, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v38 -; VI-NEXT: v_perm_b32 v21, v0, v63, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34 -; VI-NEXT: v_perm_b32 v36, v0, v42, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v43 -; VI-NEXT: v_perm_b32 v20, v0, v55, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v19, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v63, s19 -; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30 -; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x300, v31 -; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v33 -; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; VI-NEXT: v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v23, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v24, v24, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22 -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23 -; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24 +; VI-NEXT: v_perm_b32 v54, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v52, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v55, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v55 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v53, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v53 +; VI-NEXT: v_perm_b32 v40, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v53, vcc, 0x300, v40 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v38, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v41, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v34, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v42, v0, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v58 +; VI-NEXT: v_perm_b32 v43, v0, v45, s4 +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v56 +; VI-NEXT: v_perm_b32 v56, s14, v28, v27 +; VI-NEXT: v_mov_b32_e32 v28, s7 +; VI-NEXT: v_perm_b32 v58, s11, v28, v27 +; VI-NEXT: v_mov_b32_e32 v28, s6 +; VI-NEXT: v_perm_b32 v28, s8, v28, v27 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v44, v0, v1, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v46 +; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v44 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v45, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v45, 16, v45 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v10, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v46, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v40, vcc, 0x300, v46 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v11, v0, v1, s4 +; VI-NEXT: v_perm_b32 v47, v0, v1, s4 ; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v46, 16, v47 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v12, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v57, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v13, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v59, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v59, 16, v59 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v14, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v60, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v15, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15 +; VI-NEXT: v_perm_b32 v61, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: v_perm_b32 v16, v0, v60, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v32 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v17, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v61 -; VI-NEXT: v_add_u32_e32 v32, vcc, 0x300, v34 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v54, v0, v1, s4 +; VI-NEXT: v_perm_b32 v62, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v59 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v40, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v56 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v42, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v47 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v43, v0, v1, s4 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v44, v0, v1, s4 -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004 -; VI-NEXT: v_perm_b32 v62, s20, v62, v0 -; VI-NEXT: v_perm_b32 v63, s18, v63, v0 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v45, s75, v1, v0 +; VI-NEXT: v_perm_b32 v63, v0, v1, s4 +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; VI-NEXT: v_mov_b32_e32 v1, s59 -; VI-NEXT: v_perm_b32 v55, s72, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_perm_b32 v41, s60, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s43 -; VI-NEXT: v_perm_b32 v9, s56, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s15 -; VI-NEXT: v_perm_b32 v46, s44, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s12 -; VI-NEXT: v_perm_b32 v8, s40, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s9 -; VI-NEXT: v_perm_b32 v47, s76, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s61 -; VI-NEXT: v_perm_b32 v7, s73, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s62 -; VI-NEXT: v_perm_b32 v56, s74, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s57 -; VI-NEXT: v_perm_b32 v6, s63, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s45 -; VI-NEXT: v_perm_b32 v57, s58, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s41 -; VI-NEXT: v_perm_b32 v5, s46, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s13 -; VI-NEXT: v_perm_b32 v58, s42, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s10 -; VI-NEXT: v_perm_b32 v4, s14, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s7 -; VI-NEXT: v_perm_b32 v59, s11, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: v_perm_b32 v3, s8, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s29 -; VI-NEXT: v_perm_b32 v60, s28, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s27 -; VI-NEXT: v_perm_b32 v2, s26, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s25 -; VI-NEXT: v_perm_b32 v61, s24, v1, v0 -; VI-NEXT: v_mov_b32_e32 v1, s23 -; VI-NEXT: v_perm_b32 v1, s22, v1, v0 -; VI-NEXT: v_perm_b32 v0, s16, v18, v0 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v63 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0 -; VI-NEXT: v_or_b32_sdwa v0, v18, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v62 -; VI-NEXT: v_or_b32_sdwa v1, v1, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v61 -; VI-NEXT: v_or_b32_sdwa v2, v2, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v60 -; VI-NEXT: v_or_b32_sdwa v3, v3, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v59 -; VI-NEXT: v_or_b32_sdwa v4, v4, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v58 -; VI-NEXT: v_or_b32_sdwa v5, v5, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v57 -; VI-NEXT: v_or_b32_sdwa v6, v6, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v56 -; VI-NEXT: v_or_b32_sdwa v7, v7, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v47 -; VI-NEXT: v_or_b32_sdwa v8, v8, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v46 -; VI-NEXT: v_or_b32_sdwa v9, v9, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v10 -; VI-NEXT: v_add_u32_e32 v46, vcc, 0x300, v11 -; VI-NEXT: v_add_u32_e32 v56, vcc, 0x300, v13 -; VI-NEXT: v_lshlrev_b32_e32 v57, 16, v14 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v17 -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v54 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v40 -; VI-NEXT: v_or_b32_sdwa v13, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v17, v18, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v47, 16, v12 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v42 -; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v43 -; VI-NEXT: v_or_b32_sdwa v12, v12, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v55 -; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v41 -; VI-NEXT: v_or_b32_sdwa v10, v10, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v44 -; VI-NEXT: v_add_u32_e32 v40, vcc, 0x300, v45 -; VI-NEXT: v_or_b32_sdwa v11, v11, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v35 -; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v36 -; VI-NEXT: v_add_u32_e32 v36, vcc, 0x300, v19 -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v52 -; VI-NEXT: v_or_b32_sdwa v14, v14, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v15, v57, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v16, v47, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v19, v19, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v20, v20, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v21, v21, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_perm_b32 v13, s72, v1, v27 +; VI-NEXT: v_lshlrev_b32_e32 v47, 16, v63 +; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v16, s75, v0, v27 +; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v34 +; VI-NEXT: v_or_b32_sdwa v0, v27, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v32 +; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v33 +; VI-NEXT: v_or_b32_sdwa v1, v21, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v30 +; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v31 +; VI-NEXT: v_or_b32_sdwa v2, v21, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v28 +; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v29 +; VI-NEXT: v_or_b32_sdwa v3, v21, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v34, vcc, 0x300, v39 +; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v37 +; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v26 +; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v25 +; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v23 +; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v48 +; VI-NEXT: v_add_u32_e32 v48, vcc, 0x300, v17 +; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v41 +; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v43 +; VI-NEXT: v_add_u32_e32 v41, vcc, 0x300, v57 +; VI-NEXT: v_lshlrev_b32_e32 v57, 16, v61 +; VI-NEXT: v_add_u32_e32 v44, vcc, 0x300, v16 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v4 +; VI-NEXT: v_add_u32_e32 v61, vcc, 0x300, v6 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v9 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v10 +; VI-NEXT: v_or_b32_sdwa v6, v6, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v9, v11, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v16, v17, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v43, vcc, 0x300, v62 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v14 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v56 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v58 +; VI-NEXT: v_or_b32_sdwa v4, v4, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v11, v47, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v14, v46, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x3000000, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x3000000, v4 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x3000000, v5 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x3000000, v6 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x3000000, v7 -; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8 ; VI-NEXT: v_add_u32_e32 v9, vcc, 0x3000000, v9 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10 ; VI-NEXT: v_add_u32_e32 v11, vcc, 0x3000000, v11 -; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13 ; VI-NEXT: v_add_u32_e32 v14, vcc, 0x3000000, v14 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15 ; VI-NEXT: v_add_u32_e32 v16, vcc, 0x3000000, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20 -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v54, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v55, vcc, 0x300, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v31, v54, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v21 +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v40, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v41, vcc, 0x300, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v30, v40, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30 +; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v42, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v29, v42, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29 +; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v44, 16, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v45, vcc, 0x300, v18 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; VI-NEXT: v_or_b32_sdwa v28, v44, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28 +; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v21 +; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v46, 16, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v38 -; VI-NEXT: v_or_b32_sdwa v18, v18, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v27, v46, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v21 +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v51 +; VI-NEXT: v_add_u32_e32 v51, vcc, 0x300, v52 +; VI-NEXT: v_add_u32_e32 v52, vcc, 0x300, v54 +; VI-NEXT: v_add_u32_e32 v54, vcc, 0x300, v42 +; VI-NEXT: v_or_b32_sdwa v17, v18, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v18, v19, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v19, v20, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v20, v21, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v21, v22, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v22, v23, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v23, v24, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v24, v25, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v25, v26, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v26, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v27, v28, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v28, v30, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v29, v31, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v30, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v42, vcc, 0x300, v60 +; VI-NEXT: v_lshlrev_b32_e32 v60, 16, v5 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v15 +; VI-NEXT: v_or_b32_sdwa v5, v5, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v8, v60, v61 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v10, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v12, v57, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v13, v59, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v15, v45, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v5, vcc, 0x3000000, v5 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x3000000, v8 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x3000000, v10 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x3000000, v12 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x3000000, v13 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x3000000, v15 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x3000000, v17 ; VI-NEXT: v_add_u32_e32 v18, vcc, 0x3000000, v18 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x3000000, v19 +; VI-NEXT: v_add_u32_e32 v20, vcc, 0x3000000, v20 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x3000000, v21 +; VI-NEXT: v_add_u32_e32 v22, vcc, 0x3000000, v22 +; VI-NEXT: v_add_u32_e32 v23, vcc, 0x3000000, v23 +; VI-NEXT: v_add_u32_e32 v24, vcc, 0x3000000, v24 +; VI-NEXT: v_add_u32_e32 v25, vcc, 0x3000000, v25 +; VI-NEXT: v_add_u32_e32 v26, vcc, 0x3000000, v26 ; VI-NEXT: v_add_u32_e32 v27, vcc, 0x3000000, v27 +; VI-NEXT: v_add_u32_e32 v28, vcc, 0x3000000, v28 +; VI-NEXT: v_add_u32_e32 v29, vcc, 0x3000000, v29 +; VI-NEXT: v_add_u32_e32 v30, vcc, 0x3000000, v30 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_or_b32_sdwa v31, v31, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v31, vcc, 0x3000000, v31 ; VI-NEXT: .LBB97_3: ; %end ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload @@ -195241,16 +195527,26 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB97_4: -; VI-NEXT: v_mov_b32_e32 v43, v39 -; VI-NEXT: v_mov_b32_e32 v52, v34 -; VI-NEXT: v_mov_b32_e32 v39, v33 -; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v34, v53 -; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; VI-NEXT: v_mov_b32_e32 v62, v2 -; VI-NEXT: v_mov_b32_e32 v35, v1 -; VI-NEXT: v_mov_b32_e32 v55, v57 +; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; VI-NEXT: v_mov_b32_e32 v34, v61 +; VI-NEXT: v_mov_b32_e32 v61, v1 +; VI-NEXT: v_mov_b32_e32 v32, v60 +; VI-NEXT: v_mov_b32_e32 v40, v4 +; VI-NEXT: v_mov_b32_e32 v33, v42 +; VI-NEXT: v_mov_b32_e32 v42, v3 +; VI-NEXT: v_mov_b32_e32 v39, v6 +; VI-NEXT: v_mov_b32_e32 v60, v5 +; VI-NEXT: v_mov_b32_e32 v53, v2 +; VI-NEXT: v_mov_b32_e32 v57, v59 ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; VI-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; VI-NEXT: s_branch .LBB97_2 @@ -195284,15 +195580,11 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:328 ; GFX9-NEXT: v_readfirstlane_b32 s43, v2 ; GFX9-NEXT: v_readfirstlane_b32 s6, v1 -; GFX9-NEXT: v_readfirstlane_b32 s8, v5 -; GFX9-NEXT: v_readfirstlane_b32 s10, v4 -; GFX9-NEXT: v_readfirstlane_b32 s15, v3 -; GFX9-NEXT: v_readfirstlane_b32 s12, v9 ; GFX9-NEXT: v_readfirstlane_b32 s14, v8 ; GFX9-NEXT: v_readfirstlane_b32 s47, v7 ; GFX9-NEXT: v_readfirstlane_b32 s59, v6 +; GFX9-NEXT: v_readfirstlane_b32 s12, v9 ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:332 -; GFX9-NEXT: v_readfirstlane_b32 s42, v13 ; GFX9-NEXT: v_readfirstlane_b32 s74, v30 ; GFX9-NEXT: v_readfirstlane_b32 s44, v29 ; GFX9-NEXT: v_readfirstlane_b32 s56, v28 @@ -195310,117 +195602,115 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s58, v16 ; GFX9-NEXT: v_readfirstlane_b32 s73, v15 ; GFX9-NEXT: v_readfirstlane_b32 s75, v14 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; GFX9-NEXT: v_readfirstlane_b32 s42, v13 +; GFX9-NEXT: v_readfirstlane_b32 s8, v5 +; GFX9-NEXT: v_readfirstlane_b32 s10, v4 +; GFX9-NEXT: v_readfirstlane_b32 s15, v3 +; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:296 +; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:292 +; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:288 +; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:284 +; GFX9-NEXT: s_waitcnt vmcnt(5) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:324 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:320 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:316 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v2, off, s[0:3], s32 offset:312 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:308 ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:304 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:300 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v4, off, s[0:3], s32 offset:296 -; GFX9-NEXT: buffer_load_ushort v5, off, s[0:3], s32 offset:292 -; GFX9-NEXT: buffer_load_ushort v3, off, s[0:3], s32 offset:288 -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:284 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:280 -; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:276 -; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:272 -; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:268 -; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:264 -; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:260 -; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:256 -; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:252 -; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:248 -; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:244 -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:240 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:236 -; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:280 +; GFX9-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:276 +; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:272 +; GFX9-NEXT: buffer_load_ushort v62, off, s[0:3], s32 offset:268 +; GFX9-NEXT: buffer_load_ushort v6, off, s[0:3], s32 offset:264 +; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:260 +; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:256 +; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:252 +; GFX9-NEXT: buffer_load_ushort v7, off, s[0:3], s32 offset:248 +; GFX9-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:244 +; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:240 +; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:236 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:232 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:228 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:224 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:220 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:228 +; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:224 +; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:220 +; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:216 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:212 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:208 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:204 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:204 +; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:200 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:196 -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 -; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:192 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:188 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:184 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:180 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:176 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:172 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_ushort v13, off, s[0:3], s32 offset:188 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:184 -; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:180 -; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:176 -; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:172 -; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:168 -; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:164 -; GFX9-NEXT: buffer_load_ushort v60, off, s[0:3], s32 offset:160 -; GFX9-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:156 -; GFX9-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:152 -; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:148 -; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:144 -; GFX9-NEXT: buffer_load_ushort v55, off, s[0:3], s32 offset:140 -; GFX9-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:136 -; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:132 -; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:128 -; GFX9-NEXT: buffer_load_ushort v40, off, s[0:3], s32 offset:124 +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:168 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:164 +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 +; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:148 +; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:144 +; GFX9-NEXT: buffer_load_ushort v42, off, s[0:3], s32 offset:140 +; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:136 +; GFX9-NEXT: buffer_load_ushort v61, off, s[0:3], s32 offset:132 +; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:128 +; GFX9-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:124 ; GFX9-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:120 -; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:116 -; GFX9-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112 -; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:108 +; GFX9-NEXT: buffer_load_ushort v41, off, s[0:3], s32 offset:116 +; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:112 +; GFX9-NEXT: buffer_load_ushort v63, off, s[0:3], s32 offset:108 ; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:104 -; GFX9-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:100 -; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:96 -; GFX9-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:92 +; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:100 +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:96 +; GFX9-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:92 ; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:88 ; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:84 -; GFX9-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:80 -; GFX9-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:76 +; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 offset:80 +; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:76 ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:72 ; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:68 ; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:64 -; GFX9-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:60 +; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:60 ; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:56 ; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:52 ; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:48 @@ -195433,114 +195723,139 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX9-NEXT: buffer_load_ushort v15, off, s[0:3], s32 offset:20 ; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:16 ; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:12 +; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec +; GFX9-NEXT: s_waitcnt vmcnt(35) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v54, off, s[0:3], s32 offset:160 +; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:156 ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(6) -; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(7) -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(12) -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:152 +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(10) +; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(11) +; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(13) +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(16) +; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(27) +; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill +; GFX9-NEXT: s_waitcnt vmcnt(49) +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill ; GFX9-NEXT: s_cbranch_scc0 .LBB97_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v0, s17 -; GFX9-NEXT: v_mov_b32_e32 v8, 0xc0c0004 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: v_perm_b32 v0, s16, v0, v8 +; GFX9-NEXT: v_mov_b32_e32 v9, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v0, s16, v0, v9 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v8 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 -; GFX9-NEXT: v_perm_b32 v1, s18, v1, v8 +; GFX9-NEXT: v_perm_b32 v1, s18, v1, v9 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v8 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v9 +; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v9 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 -; GFX9-NEXT: v_perm_b32 v2, s24, v2, v8 +; GFX9-NEXT: v_perm_b32 v2, s24, v2, v9 +; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v3, s27 -; GFX9-NEXT: v_perm_b32 v3, s26, v3, v8 +; GFX9-NEXT: v_perm_b32 v3, s26, v3, v9 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 -; GFX9-NEXT: v_perm_b32 v3, s28, v3, v8 +; GFX9-NEXT: v_perm_b32 v3, s28, v3, v9 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v4, s6 -; GFX9-NEXT: v_perm_b32 v4, s7, v4, v8 +; GFX9-NEXT: v_perm_b32 v4, s7, v4, v9 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 ; GFX9-NEXT: v_mov_b32_e32 v4, s15 -; GFX9-NEXT: v_perm_b32 v4, s43, v4, v8 +; GFX9-NEXT: v_perm_b32 v4, s43, v4, v9 +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:692 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v5, s8 -; GFX9-NEXT: v_perm_b32 v5, s10, v5, v8 +; GFX9-NEXT: v_perm_b32 v5, s10, v5, v9 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 ; GFX9-NEXT: v_mov_b32_e32 v5, s47 -; GFX9-NEXT: v_perm_b32 v5, s59, v5, v8 +; GFX9-NEXT: v_perm_b32 v5, s59, v5, v9 +; GFX9-NEXT: v_mov_b32_e32 v60, v52 +; GFX9-NEXT: v_mov_b32_e32 v52, v6 ; GFX9-NEXT: v_mov_b32_e32 v6, s12 -; GFX9-NEXT: v_perm_b32 v6, s14, v6, v8 +; GFX9-NEXT: v_perm_b32 v6, s14, v6, v9 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 ; GFX9-NEXT: v_mov_b32_e32 v6, s61 -; GFX9-NEXT: v_perm_b32 v6, s63, v6, v8 +; GFX9-NEXT: v_perm_b32 v6, s63, v6, v9 +; GFX9-NEXT: v_mov_b32_e32 v48, v53 +; GFX9-NEXT: v_mov_b32_e32 v53, v7 ; GFX9-NEXT: v_mov_b32_e32 v7, s42 -; GFX9-NEXT: v_perm_b32 v7, s46, v7, v8 +; GFX9-NEXT: v_perm_b32 v7, s46, v7, v9 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 ; GFX9-NEXT: v_mov_b32_e32 v7, s73 -; GFX9-NEXT: v_perm_b32 v7, s75, v7, v8 -; GFX9-NEXT: v_mov_b32_e32 v63, v33 -; GFX9-NEXT: v_mov_b32_e32 v33, v9 -; GFX9-NEXT: v_mov_b32_e32 v9, s45 -; GFX9-NEXT: v_perm_b32 v9, s58, v9, v8 +; GFX9-NEXT: v_perm_b32 v7, s75, v7, v9 +; GFX9-NEXT: v_mov_b32_e32 v51, v37 +; GFX9-NEXT: v_mov_b32_e32 v37, v8 +; GFX9-NEXT: v_mov_b32_e32 v8, s45 +; GFX9-NEXT: v_perm_b32 v8, s58, v8, v9 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; GFX9-NEXT: v_lshl_or_b32 v7, v9, 16, v7 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v10 -; GFX9-NEXT: v_perm_b32 v10, s74, v12, v8 -; GFX9-NEXT: v_or_b32_sdwa v9, v11, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v9, 16, v10 +; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7 +; GFX9-NEXT: v_mov_b32_e32 v8, s57 +; GFX9-NEXT: v_perm_b32 v8, s60, v8, v9 +; GFX9-NEXT: v_perm_b32 v9, s74, v12, v9 +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v10 +; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v9 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v18 ; GFX9-NEXT: v_or_b32_sdwa v9, v22, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v13 @@ -195560,212 +195875,227 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v14, v10, 16, v9 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v19 -; GFX9-NEXT: v_perm_b32 v10, v35, v29, s4 +; GFX9-NEXT: v_perm_b32 v10, v44, v29, s4 ; GFX9-NEXT: v_or_b32_sdwa v9, v24, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v15, v9, 16, v10 -; GFX9-NEXT: v_perm_b32 v9, v39, v34, s4 +; GFX9-NEXT: v_perm_b32 v9, v45, v43, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v51, v36, s4 -; GFX9-NEXT: v_perm_b32 v16, v28, v23, s4 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_perm_b32 v17, v37, v27, s4 -; GFX9-NEXT: v_lshl_or_b32 v16, v16, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v41, v50, s4 -; GFX9-NEXT: v_lshl_or_b32 v17, v17, 16, v10 +; GFX9-NEXT: v_perm_b32 v10, v28, v23, s4 +; GFX9-NEXT: v_lshl_or_b32 v16, v10, 16, v9 +; GFX9-NEXT: v_perm_b32 v9, v32, v47, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v52, v31, s4 +; GFX9-NEXT: v_perm_b32 v10, v46, v27, s4 +; GFX9-NEXT: v_lshl_or_b32 v17, v10, 16, v9 +; GFX9-NEXT: v_perm_b32 v9, v63, v58, s4 +; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_perm_b32 v10, v41, v31, s4 ; GFX9-NEXT: v_lshl_or_b32 v18, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v40, v46, s4 +; GFX9-NEXT: v_perm_b32 v9, v33, v35, s4 +; GFX9-NEXT: v_mov_b32_e32 v45, v56 +; GFX9-NEXT: v_perm_b32 v10, v61, v56, s4 +; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v32, v38, s4 ; GFX9-NEXT: v_lshl_or_b32 v19, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v55, v57, s4 +; GFX9-NEXT: v_perm_b32 v9, v42, v39, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v45, v49, s4 +; GFX9-NEXT: v_mov_b32_e32 v63, v35 +; GFX9-NEXT: v_mov_b32_e32 v32, v58 +; GFX9-NEXT: v_mov_b32_e32 v58, v41 +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:692 ; 4-byte Folded Reload +; GFX9-NEXT: s_lshl_b32 s5, s41, 8 +; GFX9-NEXT: s_lshl_b32 s77, s9, 8 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_mov_b32_e32 v47, v46 +; GFX9-NEXT: v_mov_b32_e32 v46, v31 +; GFX9-NEXT: s_lshl_b32 s78, s44, 8 +; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(8) +; GFX9-NEXT: v_perm_b32 v10, v34, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v20, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v53, v60, s4 +; GFX9-NEXT: v_perm_b32 v9, v36, v54, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v56, v44, s4 +; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(6) +; GFX9-NEXT: v_perm_b32 v10, v56, v33, s4 ; GFX9-NEXT: v_lshl_or_b32 v21, v10, 16, v9 -; GFX9-NEXT: v_perm_b32 v9, v58, v42, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_mov_b32_e32 v36, v9 +; GFX9-NEXT: v_perm_b32 v9, v50, v9, s4 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_perm_b32 v10, v59, v47, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v10, v35, s4 ; GFX9-NEXT: v_lshl_or_b32 v22, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v50, v32 -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v51, v49 -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v41, v46 -; GFX9-NEXT: v_mov_b32_e32 v39, v52 -; GFX9-NEXT: v_mov_b32_e32 v52, v38 -; GFX9-NEXT: v_mov_b32_e32 v34, v37 -; GFX9-NEXT: v_mov_b32_e32 v37, v31 -; GFX9-NEXT: s_lshl_b32 s5, s13, 8 -; GFX9-NEXT: s_lshl_b32 s77, s9, 8 -; GFX9-NEXT: s_lshl_b32 s78, s44, 8 -; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(9) -; GFX9-NEXT: v_perm_b32 v9, v9, v10, s4 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_mov_b32_e32 v50, v9 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4 +; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: s_waitcnt vmcnt(7) -; GFX9-NEXT: v_perm_b32 v10, v32, v58, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v10, v42, v10, s4 ; GFX9-NEXT: v_lshl_or_b32 v23, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v41 +; GFX9-NEXT: v_or_b32_sdwa v10, v44, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v49 -; GFX9-NEXT: v_or_b32_sdwa v10, v24, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 +; GFX9-NEXT: v_or_b32_sdwa v9, v57, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v24, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v35 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v54 +; GFX9-NEXT: v_mov_b32_e32 v57, v60 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v10, v25, v10, s4 +; GFX9-NEXT: v_perm_b32 v10, v49, v55, s4 ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v25, v9, 16, v10 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v33 -; GFX9-NEXT: v_or_b32_sdwa v10, v62, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v33, v46 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; GFX9-NEXT: v_or_b32_sdwa v9, v43, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v38 +; GFX9-NEXT: v_or_b32_sdwa v9, v48, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v53 +; GFX9-NEXT: v_or_b32_sdwa v10, v37, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v26, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v48 -; GFX9-NEXT: v_perm_b32 v10, v63, v61, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v54, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v52 +; GFX9-NEXT: v_perm_b32 v10, v59, v51, s4 +; GFX9-NEXT: v_or_b32_sdwa v9, v40, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v27, v9, 16, v10 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v54, v61 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v60 +; GFX9-NEXT: v_or_b32_sdwa v9, v62, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_mov_b32_e32 v48, v63 -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v48, v29 +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v53, v30 +; GFX9-NEXT: v_mov_b32_e32 v38, v39 +; GFX9-NEXT: s_waitcnt vmcnt(5) ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v10 ; GFX9-NEXT: v_or_b32_sdwa v10, v28, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshl_or_b32 v28, v10, 16, v9 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_mov_b32_e32 v40, v37 ; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_mov_b32_e32 v51, v9 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v9 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v10, v36, v10, s4 +; GFX9-NEXT: v_mov_b32_e32 v52, v10 +; GFX9-NEXT: v_perm_b32 v10, v10, v29, s4 ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; GFX9-NEXT: v_lshl_or_b32 v29, v9, 16, v10 -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v43 +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v49 ; GFX9-NEXT: v_or_b32_sdwa v9, v62, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_mov_b32_e32 v60, v10 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v10 ; GFX9-NEXT: v_or_b32_sdwa v10, v30, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshl_or_b32 v30, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v38 -; GFX9-NEXT: v_perm_b32 v10, v63, v61, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v46, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v31, v9, 16, v10 -; GFX9-NEXT: v_mov_b32_e32 v9, s57 -; GFX9-NEXT: v_perm_b32 v8, s60, v9, v8 -; GFX9-NEXT: s_and_b32 s4, s40, 0xff -; GFX9-NEXT: s_or_b32 s4, s4, s5 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX9-NEXT: v_lshl_or_b32 v9, s4, 16, v8 +; GFX9-NEXT: v_perm_b32 v10, v59, v55, s4 ; GFX9-NEXT: s_and_b32 s4, s76, 0xff -; GFX9-NEXT: s_lshl_b32 s5, s41, 8 ; GFX9-NEXT: s_or_b32 s4, s4, s5 ; GFX9-NEXT: s_and_b32 s5, s11, 0xff ; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_pack_ll_b32_b16 s4, s4, s5 -; GFX9-NEXT: s_and_b32 s5, s72, 0xff -; GFX9-NEXT: s_lshl_b32 s77, s62, 8 -; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_and_b32 s77, s56, 0xff -; GFX9-NEXT: s_or_b32 s77, s77, s78 -; GFX9-NEXT: s_pack_ll_b32_b16 s5, s5, s77 -; GFX9-NEXT: v_mov_b32_e32 v8, s4 -; GFX9-NEXT: v_mov_b32_e32 v10, s5 +; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v39 +; GFX9-NEXT: s_pack_ll_b32_b16 s77, s4, s5 +; GFX9-NEXT: s_and_b32 s4, s40, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s13, 8 +; GFX9-NEXT: v_or_b32_sdwa v9, v37, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NEXT: s_or_b32 s4, s4, s5 +; GFX9-NEXT: v_lshl_or_b32 v31, v9, 16, v10 +; GFX9-NEXT: v_lshl_or_b32 v9, s4, 16, v8 +; GFX9-NEXT: s_and_b32 s4, s72, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s62, 8 +; GFX9-NEXT: s_or_b32 s4, s4, s5 +; GFX9-NEXT: s_and_b32 s5, s56, 0xff +; GFX9-NEXT: s_or_b32 s5, s5, s78 +; GFX9-NEXT: s_pack_ll_b32_b16 s78, s4, s5 ; GFX9-NEXT: s_mov_b64 s[4:5], 0 -; GFX9-NEXT: v_mov_b32_e32 v63, v36 +; GFX9-NEXT: v_mov_b32_e32 v8, s77 +; GFX9-NEXT: v_mov_b32_e32 v10, s78 +; GFX9-NEXT: v_mov_b32_e32 v37, v49 ; GFX9-NEXT: s_branch .LBB97_3 ; GFX9-NEXT: .LBB97_2: -; GFX9-NEXT: v_mov_b32_e32 v54, v61 -; GFX9-NEXT: v_mov_b32_e32 v50, v32 -; GFX9-NEXT: v_mov_b32_e32 v51, v49 -; GFX9-NEXT: v_mov_b32_e32 v39, v52 -; GFX9-NEXT: v_mov_b32_e32 v52, v38 -; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v41, v46 -; GFX9-NEXT: v_mov_b32_e32 v34, v37 -; GFX9-NEXT: v_mov_b32_e32 v37, v31 +; GFX9-NEXT: v_mov_b32_e32 v63, v35 +; GFX9-NEXT: v_mov_b32_e32 v32, v58 +; GFX9-NEXT: v_mov_b32_e32 v58, v41 +; GFX9-NEXT: v_mov_b32_e32 v45, v56 +; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v57, v52 +; GFX9-NEXT: v_mov_b32_e32 v60, v2 +; GFX9-NEXT: v_mov_b32_e32 v48, v5 +; GFX9-NEXT: v_mov_b32_e32 v53, v1 +; GFX9-NEXT: v_mov_b32_e32 v52, v4 +; GFX9-NEXT: v_mov_b32_e32 v51, v3 +; GFX9-NEXT: v_mov_b32_e32 v47, v46 +; GFX9-NEXT: v_mov_b32_e32 v46, v31 ; GFX9-NEXT: s_mov_b64 s[4:5], -1 ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX9-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; GFX9-NEXT: .LBB97_3: ; %Flow -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; GFX9-NEXT: s_andn2_b64 vcc, exec, s[4:5] ; GFX9-NEXT: s_cbranch_vccnz .LBB97_5 ; GFX9-NEXT: ; %bb.4: ; %cmp.true -; GFX9-NEXT: s_waitcnt vmcnt(5) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v48 +; GFX9-NEXT: s_waitcnt vmcnt(8) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v59 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v0, v0, v61, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_u32_e32 v0, 3, v33 -; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_perm_b32 v0, v0, v55, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v40 +; GFX9-NEXT: s_waitcnt vmcnt(6) ; GFX9-NEXT: v_perm_b32 v0, v0, v38, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill ; GFX9-NEXT: v_add_u32_e32 v0, 3, v62 -; GFX9-NEXT: v_perm_b32 v0, v0, v43, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; GFX9-NEXT: s_add_i32 s74, s74, 3 +; GFX9-NEXT: v_perm_b32 v0, v0, v37, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v53 +; GFX9-NEXT: v_perm_b32 v0, v0, v60, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v52 +; GFX9-NEXT: v_perm_b32 v48, v0, v48, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; GFX9-NEXT: s_add_i32 s74, s74, 3 ; GFX9-NEXT: s_add_i32 s72, s72, 3 ; GFX9-NEXT: s_add_i32 s56, s56, 3 ; GFX9-NEXT: s_add_i32 s60, s60, 3 @@ -195784,372 +196114,369 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX9-NEXT: s_add_i32 s7, s7, 3 ; GFX9-NEXT: s_add_i32 s24, s24, 3 ; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: s_add_i32 s16, s16, 3 ; GFX9-NEXT: s_add_i32 s20, s20, 3 ; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: s_add_i32 s16, s16, 3 -; GFX9-NEXT: v_mov_b32_e32 v33, s17 ; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v29, s19 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_u32_e32 v0, 3, v63 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v0, v0, v51, s4 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v0, 3, v39 +; GFX9-NEXT: v_perm_b32 v31, v0, v57, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v39, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v62, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v30, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v54, s4 -; GFX9-NEXT: v_add_u32_e32 v63, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v28, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; GFX9-NEXT: v_perm_b32 v37, v0, v1, s4 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v37, 0x300, v37 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v27, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v38, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v38 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v35, s4 -; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v36 +; GFX9-NEXT: v_perm_b32 v26, v0, v54, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v25, v0, v1, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v44 +; GFX9-NEXT: v_perm_b32 v24, v0, v41, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v49, s4 -; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v23, v0, v50, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v42 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v32 -; GFX9-NEXT: v_perm_b32 v0, v0, v58, s4 -; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload -; GFX9-NEXT: v_mov_b32_e32 v32, s23 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v42, s4 -; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v59 -; GFX9-NEXT: v_perm_b32 v0, v0, v47, s4 -; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v53 -; GFX9-NEXT: v_perm_b32 v0, v0, v60, s4 -; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v56 -; GFX9-NEXT: v_perm_b32 v0, v0, v44, s4 -; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v55 -; GFX9-NEXT: v_perm_b32 v0, v0, v57, s4 -; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v45 -; GFX9-NEXT: v_perm_b32 v0, v0, v51, s4 -; GFX9-NEXT: v_add_u32_e32 v49, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v40 -; GFX9-NEXT: v_perm_b32 v0, v0, v41, s4 -; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v50 -; GFX9-NEXT: v_perm_b32 v0, v0, v52, s4 -; GFX9-NEXT: v_add_u32_e32 v52, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v22, 0xffff, v22 -; GFX9-NEXT: v_lshl_or_b32 v21, v21, 16, v22 -; GFX9-NEXT: v_and_b32_e32 v22, 0xffff, v24 -; GFX9-NEXT: v_lshl_or_b32 v22, v23, 16, v22 -; GFX9-NEXT: v_and_b32_e32 v23, 0xffff, v26 -; GFX9-NEXT: v_lshl_or_b32 v23, v25, 16, v23 -; GFX9-NEXT: v_and_b32_e32 v25, 0xffff, v30 -; GFX9-NEXT: v_lshl_or_b32 v25, v29, 16, v25 -; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v24, 0xffff, v28 -; GFX9-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v24, v27, 16, v24 -; GFX9-NEXT: v_and_b32_e32 v27, 0xffff, v63 -; GFX9-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; GFX9-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; GFX9-NEXT: v_lshl_or_b32 v19, v52, 16, v19 -; GFX9-NEXT: v_lshl_or_b32 v20, v49, 16, v20 -; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_perm_b32 v22, v0, v36, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v49, 0x300, v22 +; GFX9-NEXT: v_add_u32_e32 v36, 0x300, v30 +; GFX9-NEXT: v_add_u32_e32 v30, 0x300, v28 +; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v26 +; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v21 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v39 -; GFX9-NEXT: v_perm_b32 v0, v0, v37, s4 -; GFX9-NEXT: v_add_u32_e32 v37, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v50, v0, v35, s4 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; GFX9-NEXT: v_lshl_or_b32 v18, v37, 16, v18 +; GFX9-NEXT: v_mov_b32_e32 v35, s17 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v51, v0, v1, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v56 +; GFX9-NEXT: v_perm_b32 v52, v0, v33, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u32_e32 v54, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v53, v0, v1, s4 ; GFX9-NEXT: v_add_u32_e32 v0, 3, v34 -; GFX9-NEXT: v_mov_b32_e32 v34, s19 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v54, v0, v43, s4 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: v_mov_b32_e32 v34, s23 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v55, v0, v63, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v61 +; GFX9-NEXT: v_perm_b32 v40, v0, v45, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v40 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v41, v0, v32, s4 +; GFX9-NEXT: v_add_u32_e32 v0, 3, v58 +; GFX9-NEXT: v_perm_b32 v42, v0, v46, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v42 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_perm_b32 v20, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v0, 3, v47 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v44, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v55, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v16, v55, 16, v16 +; GFX9-NEXT: v_perm_b32 v19, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; GFX9-NEXT: v_perm_b32 v46, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v45, 0x300, v46 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v40, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v15, v40, 16, v15 +; GFX9-NEXT: v_perm_b32 v47, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v40, 0x300, v47 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX9-NEXT: v_perm_b32 v56, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v46, 0x300, v56 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v41, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v14, v41, 16, v14 +; GFX9-NEXT: v_perm_b32 v57, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; GFX9-NEXT: v_perm_b32 v59, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v47, 0x300, v59 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v42, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v13, v42, 16, v13 +; GFX9-NEXT: v_perm_b32 v61, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v42, 0x300, v61 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX9-NEXT: v_perm_b32 v62, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v56, 0x300, v62 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u32_e32 v43, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v63, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v43, 0x300, v63 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v12, v0, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; GFX9-NEXT: v_mov_b32_e32 v0, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v32, s22, v32, v0 -; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v32 -; GFX9-NEXT: v_perm_b32 v33, s16, v33, v0 -; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v33 -; GFX9-NEXT: v_and_b32_e32 v33, 0xffff, v33 -; GFX9-NEXT: v_lshl_or_b32 v12, v43, 16, v12 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, s74, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v1 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX9-NEXT: v_perm_b32 v35, s16, v35, v0 +; GFX9-NEXT: v_perm_b32 v34, s22, v34, v0 +; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v18, s74, v1, v0 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 -; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 -; GFX9-NEXT: v_add_u32_e32 v44, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v11, v1, v2, s4 ; GFX9-NEXT: v_mov_b32_e32 v1, s62 -; GFX9-NEXT: v_perm_b32 v1, s72, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v17, s72, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s44 -; GFX9-NEXT: v_perm_b32 v1, s56, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v45, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v8, s56, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s57 -; GFX9-NEXT: v_perm_b32 v1, s60, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v9, s60, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s13 -; GFX9-NEXT: v_perm_b32 v1, s40, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v46, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v10, s40, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s41 -; GFX9-NEXT: v_perm_b32 v1, s76, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v16, s76, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s9 -; GFX9-NEXT: v_perm_b32 v1, s11, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v47, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v15, s11, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s73 -; GFX9-NEXT: v_perm_b32 v1, s75, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v7, s75, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s45 -; GFX9-NEXT: v_perm_b32 v1, s58, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v56, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v14, s58, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s61 -; GFX9-NEXT: v_perm_b32 v1, s63, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v13, s63, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s42 -; GFX9-NEXT: v_perm_b32 v1, s46, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v57, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v6, s46, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s47 -; GFX9-NEXT: v_perm_b32 v1, s59, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v5, s59, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s12 -; GFX9-NEXT: v_perm_b32 v1, s14, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v58, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v4, s14, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s15 -; GFX9-NEXT: v_perm_b32 v1, s43, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v58, s43, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s8 -; GFX9-NEXT: v_perm_b32 v1, s10, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v59, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v60, s10, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s29 -; GFX9-NEXT: v_perm_b32 v1, s28, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v3, s28, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s6 -; GFX9-NEXT: v_perm_b32 v1, s7, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v60, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v32, s7, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s25 -; GFX9-NEXT: v_perm_b32 v1, s24, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v2, s24, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s27 -; GFX9-NEXT: v_perm_b32 v1, s26, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v61, 0x300, v1 +; GFX9-NEXT: v_perm_b32 v33, s26, v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, s21 ; GFX9-NEXT: v_perm_b32 v1, s20, v1, v0 +; GFX9-NEXT: v_perm_b32 v0, s18, v29, v0 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v35 +; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 +; GFX9-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 +; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v29 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v34 ; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: v_lshl_or_b32 v1, v32, 16, v1 -; GFX9-NEXT: v_and_b32_e32 v32, 0xffff, v54 -; GFX9-NEXT: v_lshl_or_b32 v17, v17, 16, v32 -; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; GFX9-NEXT: v_and_b32_e32 v29, 0xffff, v29 -; GFX9-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; GFX9-NEXT: v_lshl_or_b32 v29, v30, 16, v29 -; GFX9-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshl_or_b32 v26, v31, 16, v26 -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v0, s18, v34, v0 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 +; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 +; GFX9-NEXT: v_lshl_or_b32 v1, v29, 16, v1 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v33 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_lshl_or_b32 v2, v29, 16, v2 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v32 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX9-NEXT: v_lshl_or_b32 v3, v29, 16, v3 +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; GFX9-NEXT: v_add_u32_e32 v35, 0x300, v31 +; GFX9-NEXT: v_add_u32_e32 v31, 0x300, v39 +; GFX9-NEXT: v_add_u32_e32 v39, 0x300, v25 +; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v50 +; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v9 +; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v17 +; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v10 +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_add_u32_e32 v34, 0x300, v48 +; GFX9-NEXT: v_add_u32_e32 v48, 0x300, v23 +; GFX9-NEXT: v_add_u32_e32 v50, 0x300, v51 +; GFX9-NEXT: v_add_u32_e32 v51, 0x300, v53 +; GFX9-NEXT: v_add_u32_e32 v23, 0x300, v54 +; GFX9-NEXT: v_add_u32_e32 v53, 0x300, v41 +; GFX9-NEXT: v_add_u32_e32 v54, 0x300, v20 +; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v44 +; GFX9-NEXT: v_add_u32_e32 v44, 0x300, v18 +; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v8 +; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 +; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v17 +; GFX9-NEXT: v_lshl_or_b32 v10, v18, 16, v10 +; GFX9-NEXT: v_and_b32_e32 v18, 0xffff, v53 +; GFX9-NEXT: v_and_b32_e32 v17, 0xffff, v54 +; GFX9-NEXT: v_lshl_or_b32 v18, v21, 16, v18 +; GFX9-NEXT: v_and_b32_e32 v21, 0xffff, v50 +; GFX9-NEXT: v_lshl_or_b32 v17, v20, 16, v17 +; GFX9-NEXT: v_and_b32_e32 v20, 0xffff, v51 +; GFX9-NEXT: v_lshl_or_b32 v20, v23, 16, v20 +; GFX9-NEXT: v_and_b32_e32 v23, 0xffff, v48 +; GFX9-NEXT: v_lshl_or_b32 v23, v26, 16, v23 +; GFX9-NEXT: v_and_b32_e32 v26, 0xffff, v37 +; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 +; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v11 +; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v16 +; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 +; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v6, 16, v13 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v44 +; GFX9-NEXT: v_add_u32_e32 v41, 0x300, v57 +; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v15 +; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v14 +; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v4 +; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v58 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v27, v28, 16, v27 -; GFX9-NEXT: v_and_b32_e32 v28, 0xffff, v38 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v33 -; GFX9-NEXT: v_lshl_or_b32 v2, v61, 16, v2 -; GFX9-NEXT: v_lshl_or_b32 v3, v60, 16, v3 -; GFX9-NEXT: v_lshl_or_b32 v4, v59, 16, v4 -; GFX9-NEXT: v_lshl_or_b32 v5, v58, 16, v5 -; GFX9-NEXT: v_lshl_or_b32 v6, v57, 16, v6 -; GFX9-NEXT: v_lshl_or_b32 v7, v56, 16, v7 -; GFX9-NEXT: v_lshl_or_b32 v8, v47, 16, v8 -; GFX9-NEXT: v_lshl_or_b32 v9, v46, 16, v9 -; GFX9-NEXT: v_lshl_or_b32 v10, v45, 16, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v44, 16, v11 -; GFX9-NEXT: v_lshl_or_b32 v28, v62, 16, v28 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_and_b32_e32 v30, 0xffff, v30 +; GFX9-NEXT: v_lshl_or_b32 v11, v11, 16, v13 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v43 +; GFX9-NEXT: v_add_u32_e32 v57, 0x300, v60 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v16, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v7, v14, 16, v7 +; GFX9-NEXT: v_lshl_or_b32 v8, v15, 16, v8 +; GFX9-NEXT: v_lshl_or_b32 v12, v12, 16, v13 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v42 +; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v41 +; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v40 +; GFX9-NEXT: v_lshl_or_b32 v4, v57, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v13, v56, 16, v13 +; GFX9-NEXT: v_lshl_or_b32 v14, v47, 16, v14 +; GFX9-NEXT: v_lshl_or_b32 v15, v46, 16, v15 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29 +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29 +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v29 +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v29 +; GFX9-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v29 +; GFX9-NEXT: v_add_u32_e32 v29, 0x300, v27 +; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v24 +; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v52 +; GFX9-NEXT: v_add_u32_e32 v52, 0x300, v55 +; GFX9-NEXT: v_add_u32_e32 v55, 0x300, v19 +; GFX9-NEXT: v_and_b32_e32 v19, 0xffff, v52 +; GFX9-NEXT: v_lshl_or_b32 v19, v22, 16, v19 +; GFX9-NEXT: v_and_b32_e32 v22, 0xffff, v49 +; GFX9-NEXT: v_lshl_or_b32 v22, v25, 16, v22 +; GFX9-NEXT: v_and_b32_e32 v25, 0xffff, v38 +; GFX9-NEXT: v_lshl_or_b32 v25, v28, 16, v25 +; GFX9-NEXT: v_and_b32_e32 v28, 0xffff, v35 +; GFX9-NEXT: v_lshl_or_b32 v28, v31, 16, v28 +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshl_or_b32 v21, v24, 16, v21 +; GFX9-NEXT: v_and_b32_e32 v24, 0xffff, v39 +; GFX9-NEXT: v_lshl_or_b32 v24, v27, 16, v24 +; GFX9-NEXT: v_and_b32_e32 v27, 0xffff, v36 +; GFX9-NEXT: v_lshl_or_b32 v27, v30, 16, v27 +; GFX9-NEXT: v_and_b32_e32 v30, 0xffff, v33 +; GFX9-NEXT: v_lshl_or_b32 v26, v29, 16, v26 +; GFX9-NEXT: v_and_b32_e32 v29, 0xffff, v34 +; GFX9-NEXT: v_lshl_or_b32 v29, v32, 16, v29 +; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: v_and_b32_e32 v16, 0xffff, v55 +; GFX9-NEXT: v_lshl_or_b32 v16, v45, 16, v16 +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_lshl_or_b32 v30, v31, 16, v30 -; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; GFX9-NEXT: v_lshl_or_b32 v31, v32, 16, v31 @@ -196176,10 +196503,12 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX11-TRUE16-LABEL: bitcast_v128i8_to_v64i16_scalar: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Spill -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x2 ; 12-byte Folded Spill +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32 offset:328 ; GFX11-TRUE16-NEXT: ; meta instruction -; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:324 +; GFX11-TRUE16-NEXT: ; meta instruction +; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:320 ; GFX11-TRUE16-NEXT: s_clause 0x1f ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v133, off, s32 offset:312 ; GFX11-TRUE16-NEXT: scratch_load_d16_b16 v166, off, s32 offset:308 @@ -196302,13 +196631,14 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, 0xc0c0004 :: v_dual_lshlrev_b32 v13, 8, v86 -; GFX11-TRUE16-NEXT: s_and_b32 s76, s43, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s77, s11, 8 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 8, v37 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: s_and_b32 s76, s63, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s77, s57, 8 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s56, 0xff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_perm_b32 v3, s2, s3, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v5, s22, s23, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v6, s26, s27, v8 +; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s5, 8 ; GFX11-TRUE16-NEXT: v_perm_b32 v0, s0, s1, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v4, s18, s19, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v2, s20, s21, v8 @@ -196316,140 +196646,138 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, v5.l ; GFX11-TRUE16-NEXT: v_perm_b32 v5, s9, s4, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v3, s24, s25, v8 +; GFX11-TRUE16-NEXT: s_or_b32 s76, s76, s77 +; GFX11-TRUE16-NEXT: s_or_b32 s77, s78, s79 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s43, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s11, 8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.h, v6.l ; GFX11-TRUE16-NEXT: v_perm_b32 v6, s40, s8, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v7, s14, s7, v8 -; GFX11-TRUE16-NEXT: s_or_b32 s76, s76, s77 +; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 +; GFX11-TRUE16-NEXT: s_or_b32 s77, s78, s79 ; GFX11-TRUE16-NEXT: v_perm_b32 v1, s16, s17, v8 ; GFX11-TRUE16-NEXT: v_perm_b32 v9, s12, s6, v8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v4.l ; GFX11-TRUE16-NEXT: v_perm_b32 v4, s28, s29, v8 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s76 :: v_dual_lshlrev_b32 v15, 8, v70 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, s77 :: v_dual_lshlrev_b32 v15, 8, v70 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v5.l ; GFX11-TRUE16-NEXT: v_perm_b32 v5, s61, s45, v8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l ; GFX11-TRUE16-NEXT: v_perm_b32 v6, s60, s15, v8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v7.l ; GFX11-TRUE16-NEXT: v_perm_b32 v7, s72, s58, v8 +; GFX11-TRUE16-NEXT: s_and_b32 s77, s62, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s78, s47, 8 +; GFX11-TRUE16-NEXT: s_and_b32 s79, s46, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s88, s13, 8 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.h, v9.l ; GFX11-TRUE16-NEXT: v_perm_b32 v9, s59, s44, v8 +; GFX11-TRUE16-NEXT: s_or_b32 s77, s77, s78 +; GFX11-TRUE16-NEXT: s_or_b32 s78, s79, s88 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.h, v10.l ; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v68 -; GFX11-TRUE16-NEXT: s_and_b32 s88, s41, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s89, s10, 8 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 8, v37 +; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s77, s77, s78 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s41, 0xff +; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s10, 8 ; GFX11-TRUE16-NEXT: v_perm_b32 v11, s73, s42, v8 -; GFX11-TRUE16-NEXT: s_or_b32 s88, s88, s89 +; GFX11-TRUE16-NEXT: s_or_b32 s78, s78, s79 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v12 -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s88 -; GFX11-TRUE16-NEXT: s_and_b32 s88, s74, 0xff -; GFX11-TRUE16-NEXT: s_and_b32 s77, s63, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s76, s57, 8 -; GFX11-TRUE16-NEXT: s_and_b32 s78, s56, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s5, 8 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s78 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v114 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, s88, v13 +; GFX11-TRUE16-NEXT: s_and_b32 s78, s74, 0xff +; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xff, v83 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, s78, v13 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v10.l ; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v38 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 8, v32 -; GFX11-TRUE16-NEXT: s_or_b32 s76, s77, s76 -; GFX11-TRUE16-NEXT: s_or_b32 s77, s78, s79 -; GFX11-TRUE16-NEXT: s_and_b32 s78, s62, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s79, s47, 8 -; GFX11-TRUE16-NEXT: s_and_b32 s88, s46, 0xff -; GFX11-TRUE16-NEXT: s_lshl_b32 s89, s13, 8 -; GFX11-TRUE16-NEXT: s_or_b32 s78, s78, s79 -; GFX11-TRUE16-NEXT: s_or_b32 s79, s88, s89 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v8.l ; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v14, v15 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v83 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 8, v33 -; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xff, v50 -; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s77, s78, s79 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v50 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v15, 8, v33 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 8, v39 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v13 ; GFX11-TRUE16-NEXT: v_perm_b32 v13, v134, v96, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.h, v8.l -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v15, v16 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v17 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v53, v34, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s76 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v14, v15 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v17 ; GFX11-TRUE16-NEXT: v_perm_b32 v15, v99, v65, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v8.l -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v66, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v17, v53, v34, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v19, v71, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.h, v18.l +; GFX11-TRUE16-NEXT: v_perm_b32 v18, v66, v35, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v20, v69, v36, 0xc0c0004 ; GFX11-TRUE16-NEXT: v_perm_b32 v16, v97, v48, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v71, v51, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v21, v84, v49, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v17.l ; GFX11-TRUE16-NEXT: v_perm_b32 v17, v103, v54, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v8.l -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v69, v36, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v22, v98, v52, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v18.l ; GFX11-TRUE16-NEXT: v_perm_b32 v18, v116, v67, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v84, v49, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v23, v113, v55, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v24, 0xff, v117 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 8, v64 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xff, v164 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 8, v119 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v19.l ; GFX11-TRUE16-NEXT: v_perm_b32 v19, v130, v80, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v8.l -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v98, v52, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_perm_b32 v26, v118, v85, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v131 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 8, v82 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v20.l ; GFX11-TRUE16-NEXT: v_perm_b32 v20, v145, v112, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v10.l -; GFX11-TRUE16-NEXT: v_perm_b32 v10, v113, v55, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v21.l ; GFX11-TRUE16-NEXT: v_perm_b32 v21, v135, v81, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v8.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v22.l ; GFX11-TRUE16-NEXT: v_perm_b32 v22, v147, v100, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_perm_b32 v8, v118, v85, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v117 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 8, v64 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v23.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v25, v24, v25 ; GFX11-TRUE16-NEXT: v_perm_b32 v23, v151, v115, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v8.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v164 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v25, 8, v119 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v26, 0xff, v131 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 8, v82 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v24 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v28, 0xff, v149 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v8, v25 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v27, v28 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v27, 0xff, v144 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 8, v87 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v26.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v29, v30 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v167 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 8, v128 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v25.l ; GFX11-TRUE16-NEXT: v_perm_b32 v25, v176, v148, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v26, v27 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v144 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v26, 8, v87 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v27, 8, v128 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v8.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v167 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 8, v101 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v26 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v27, v28 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v28, 0xff, v149 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v101 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v25.h, v26.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v29, v30 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v162 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 8, v132 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v28, v31 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v31, 0xff, v179 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v183, 8, v150 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v40, 8, v102 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v29, v30 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v30, 0xff, v160 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v102 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, v8, v27 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v28, v29 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xff, v162 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v28, 8, v132 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v27.l ; GFX11-TRUE16-NEXT: v_perm_b32 v27, v177, v146, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v8.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v179 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v29, 8, v150 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v10, v28 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v30, v31 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v133 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v40, 0xff, v182 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v8, v29 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v166 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v165 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 8, v129 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v41, v29, v31 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v178 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v28.l +; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v31, v183 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v29.l +; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v165 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v31, 8, v129 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v30, v40 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v183, 0xff, v166 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v40, 8, v133 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v41, 0xff, v182 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v42, 8, v178 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v31, v29, v31 ; GFX11-TRUE16-NEXT: v_perm_b32 v29, v181, v163, 0xc0c0004 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v183, v8, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v183, v183, v40 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v29.h, v30.l -; GFX11-TRUE16-NEXT: v_mov_b32_e32 v8, s76 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v40, v31 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v41, v42 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v31.l ; GFX11-TRUE16-NEXT: v_perm_b32 v31, v180, v161, 0xc0c0004 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v10.l ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v10, s77 -; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v183.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v31.h, v41.l +; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v183.l ; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB97_3 ; GFX11-TRUE16-NEXT: .LBB97_2: ; %cmp.true @@ -196682,9 +197010,10 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v30.h, v129.l ; GFX11-TRUE16-NEXT: v_mov_b16_e64 v31.h, v133.l ; GFX11-TRUE16-NEXT: .LBB97_3: ; %end -; GFX11-TRUE16-NEXT: s_clause 0x1 ; 8-byte Folded Reload -; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:320 -; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:324 +; GFX11-TRUE16-NEXT: s_clause 0x2 ; 12-byte Folded Reload +; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:320 +; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:324 +; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32 offset:328 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-TRUE16-NEXT: .LBB97_4: @@ -196695,7 +197024,14 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX11-FAKE16-LABEL: bitcast_v128i8_to_v64i16_scalar: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:320 ; 4-byte Folded Spill +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:332 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:328 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:324 +; GFX11-FAKE16-NEXT: ; meta instruction +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:320 ; GFX11-FAKE16-NEXT: s_clause 0x1f ; GFX11-FAKE16-NEXT: scratch_load_u16 v166, off, s32 offset:312 ; GFX11-FAKE16-NEXT: scratch_load_u16 v180, off, s32 offset:308 @@ -196817,11 +197153,10 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB97_4 ; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false ; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_and_b32 s76, s74, 0xff -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2) -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 8, v33 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xff, v48 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 8, v32 +; GFX11-FAKE16-NEXT: s_and_b32 s76, s58, 0xff +; GFX11-FAKE16-NEXT: s_lshl_b32 s77, s47, 8 +; GFX11-FAKE16-NEXT: s_lshl_b32 s78, s13, 8 +; GFX11-FAKE16-NEXT: s_or_b32 s76, s76, s77 ; GFX11-FAKE16-NEXT: v_perm_b32 v0, s0, s1, v8 ; GFX11-FAKE16-NEXT: v_perm_b32 v2, s16, s17, v8 ; GFX11-FAKE16-NEXT: v_perm_b32 v4, s20, s21, v8 @@ -196836,175 +197171,164 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v0 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v3, 16, v2 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v5, 16, v4 -; GFX11-FAKE16-NEXT: v_perm_b32 v4, s11, s8, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, s11, s8, v8 +; GFX11-FAKE16-NEXT: s_and_b32 s77, s40, 0xff +; GFX11-FAKE16-NEXT: v_perm_b32 v10, s7, s5, v8 +; GFX11-FAKE16-NEXT: s_or_b32 s77, s77, s78 +; GFX11-FAKE16-NEXT: v_perm_b32 v11, s44, s41, v8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, s6, s4, v8 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s7, s5, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v4 -; GFX11-FAKE16-NEXT: v_perm_b32 v15, v67, v51, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v16, v80, v66, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v5, 16, v6 -; GFX11-FAKE16-NEXT: v_perm_b32 v17, v68, v55, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v10, 16, v11 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v35 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v8 ; GFX11-FAKE16-NEXT: v_perm_b32 v9, s42, s15, v8 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s44, s41, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v18, v69, v52, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v7, 16, v3 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s12, s9, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v17, 16, v16 -; GFX11-FAKE16-NEXT: v_perm_b32 v21, v116, v103, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_lshl_b32 s77, s43, 8 -; GFX11-FAKE16-NEXT: v_perm_b32 v22, v118, v101, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v7, 16, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v7, s14, s10, v8 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, s76, v11 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v38 -; GFX11-FAKE16-NEXT: s_and_b32 s76, s46, 0xff -; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v7, 16, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v11, v12 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v13, v14 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v15 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v53 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 8, v37 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v9, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xff, v49 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 8, v36 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v11, 16, v13 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v14, v15 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v50 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 8, v34 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v65, v39, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-FAKE16-NEXT: s_or_b32 s76, s76, s77 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v14, v15 -; GFX11-FAKE16-NEXT: v_perm_b32 v14, v82, v64, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xffff, v22 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v115, v99, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xff, v130 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v14 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v9, 16, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, v96, v85, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v15, 16, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v71, v54, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v98, v83, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v18, 16, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v7, s26, s27, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v4, s6, s4, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v12, s12, s9, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, s14, s10, v8 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v19, v86, v81, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 8, v117 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 8, v144 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v10, 16, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v9, v102, v84, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, s60, s57, v8 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v19, 16, v11 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v87, v70, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 8, v135 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v150 -; GFX11-FAKE16-NEXT: s_lshl_b32 s77, s47, 8 -; GFX11-FAKE16-NEXT: s_and_b32 s78, s40, 0xff -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v11, 16, v9 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v112, v100, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, s76, 16, v10 -; GFX11-FAKE16-NEXT: v_perm_b32 v10, v132, v129, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_and_b32 s76, s58, 0xff -; GFX11-FAKE16-NEXT: s_lshl_b32 s79, s13, 8 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v21, v11, 16, v21 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v113, v97, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v10, 16, v5 +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 8, v35 +; GFX11-FAKE16-NEXT: s_and_b32 s89, s74, 0xff +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v7, 16, v3 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v4, 16, v6 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v12, 16, v9 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v13, 16, v11 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v38 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 8, v33 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, s89, v10 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xff, v48 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 8, v32 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xff, v53 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v11, v12 ; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: s_or_b32 s76, s76, s77 -; GFX11-FAKE16-NEXT: s_or_b32 s77, s78, s79 -; GFX11-FAKE16-NEXT: v_perm_b32 v8, s73, s72, v8 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v22, v11, 16, v22 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v23, v23, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v134 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v119 -; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s76, s76, s77 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 8, v37 +; GFX11-FAKE16-NEXT: s_and_b32 s79, s46, 0xff +; GFX11-FAKE16-NEXT: s_lshl_b32 s88, s43, 8 ; GFX11-FAKE16-NEXT: s_and_b32 s77, s62, 0xff +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v12, v12, 16, v10 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v13, v14 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v15, v16 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 8, v36 +; GFX11-FAKE16-NEXT: v_perm_b32 v9, s60, s57, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, s73, s72, v8 +; GFX11-FAKE16-NEXT: s_or_b32 s78, s79, s88 +; GFX11-FAKE16-NEXT: s_and_b32 s79, s56, 0xff +; GFX11-FAKE16-NEXT: s_lshl_b32 s88, s45, 8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v49 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xff, v50 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 8, v34 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v9, s78, 16, v9 ; GFX11-FAKE16-NEXT: s_lshl_b32 s78, s59, 8 -; GFX11-FAKE16-NEXT: s_lshl_b32 s79, s45, 8 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v24, v25 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xff, v131 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v25, 8, v114 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v65, v39, 0xc0c0004 ; GFX11-FAKE16-NEXT: s_or_b32 s77, s77, s78 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: s_and_b32 s78, s56, 0xff -; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v24, v25 -; GFX11-FAKE16-NEXT: v_perm_b32 v24, v146, v128, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_or_b32 s78, s78, s79 +; GFX11-FAKE16-NEXT: s_or_b32 s78, s79, s88 ; GFX11-FAKE16-NEXT: s_and_b32 s79, s63, 0xff ; GFX11-FAKE16-NEXT: s_lshl_b32 s88, s61, 8 ; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s77, s77, s78 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xffff, v24 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v24, v11, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v160 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v147 ; GFX11-FAKE16-NEXT: s_or_b32 s78, s79, s88 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v25, v25, 16, v26 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xff, v148 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v26, v27 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xff, v149 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 8, v133 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v26, v27 -; GFX11-FAKE16-NEXT: v_perm_b32 v26, v162, v145, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff, v26 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v11, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v177 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v164 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v27, v27, 16, v28 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xff, v151 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v28, v29 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xff, v176 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 8, v161 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v28, v29 -; GFX11-FAKE16-NEXT: v_perm_b32 v28, v179, v163, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xffff, v28 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v28, v11, 16, v10 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v181 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v165 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v29, v29, 16, v30 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xff, v178 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v10, v11 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v180 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v30, v31 -; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v166 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s77 :: v_dual_and_b32 v183, 0xffff, v10 -; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v11, v31 -; GFX11-FAKE16-NEXT: v_perm_b32 v11, v182, v167, 0xc0c0004 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v30, 16, v183 -; GFX11-FAKE16-NEXT: v_and_b32_e32 v40, 0xffff, v11 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v14, v15 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v11, s78, 16, v8 -; GFX11-FAKE16-NEXT: v_mov_b32_e32 v8, s76 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v31, 16, v40 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, v67, v51, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v13 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v16, v17 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v18 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v69, v52, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v14, 16, v15 +; GFX11-FAKE16-NEXT: v_perm_b32 v20, v96, v85, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v16, 16, v17 +; GFX11-FAKE16-NEXT: v_perm_b32 v16, v68, v55, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v10, 16, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v8, v80, v66, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v10, v82, v64, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v21, v102, v84, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v116, v103, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xffff, v20 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v8 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v10 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v87, v70, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xffff, v21 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v112, v100, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v16, 16, v17 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v18, 16, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v18, v71, v54, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v19, v98, v83, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff, v23 +; GFX11-FAKE16-NEXT: v_perm_b32 v26, v118, v101, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v86, v81, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v18, 16, v20 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v24, 16, v21 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v21, v25, 16, v23 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v23, 0xffff, v26 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xff, v134 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v26, 8, v119 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xff, v130 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 8, v117 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v22, 16, v19 +; GFX11-FAKE16-NEXT: v_perm_b32 v22, v113, v97, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v24, v132, v129, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v25, v26 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v27, v28 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xff, v131 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v28, 8, v114 +; GFX11-FAKE16-NEXT: v_perm_b32 v29, v146, v128, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xff, v160 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v147 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v22, v22, 16, v23 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v115, v99, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xffff, v25 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v27, v28 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff, v29 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v29, 0xff, v148 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 8, v144 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v30, v31 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v23, v23, 16, v24 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v24, v26, 16, v25 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v25, v27, 16, v28 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v29, v183 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v27, 0xffff, v30 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xff, v149 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v29, 8, v133 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v30, 0xff, v177 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v31, 8, v164 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v183, 0xff, v151 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v40, 8, v135 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v41, 0xff, v176 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v42, 8, v161 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v26, v26, 16, v27 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v27, v28, v29 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v28, v30, v31 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v29, v183, v40 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v30, v41, v42 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v31, 0xff, v181 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v183, 8, v165 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v40, 0xff, v178 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v41, 8, v150 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v42, 0xff, v180 +; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v43, 8, v166 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v31, v31, v183 +; GFX11-FAKE16-NEXT: v_perm_b32 v183, v162, v145, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v40, v40, v41 +; GFX11-FAKE16-NEXT: v_perm_b32 v41, v179, v163, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_or_b32_e32 v42, v42, v43 +; GFX11-FAKE16-NEXT: v_perm_b32 v43, v182, v167, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v183, 0xffff, v183 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v28, 0xffff, v28 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v41, 0xffff, v41 +; GFX11-FAKE16-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s76 :: v_dual_and_b32 v43, 0xffff, v43 +; GFX11-FAKE16-NEXT: v_mov_b32_e32 v10, s77 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v27, v27, 16, v183 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v28, v29, 16, v28 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v29, v30, 16, v41 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v40, 16, v31 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v42, 16, v43 ; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s75 ; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB97_3 ; GFX11-FAKE16-NEXT: .LBB97_2: ; %cmp.true @@ -197269,7 +197593,11 @@ define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i3 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v30, v30, 16, v34 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v31, v31, 16, v35 ; GFX11-FAKE16-NEXT: .LBB97_3: ; %end -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:320 ; 4-byte Folded Reload +; GFX11-FAKE16-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:320 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:324 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:328 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:332 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] ; GFX11-FAKE16-NEXT: .LBB97_4: @@ -197347,14 +197675,14 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; kill: killed $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v27 -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v2 ; SI-NEXT: ; kill: killed $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v29 -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v4 @@ -197363,7 +197691,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: ; kill: killed $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v6 @@ -197373,7 +197701,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: ; kill: killed $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v8 ; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill @@ -197418,28 +197746,28 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; kill: killed $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v20 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v46 ; SI-NEXT: ; kill: killed $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v22 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v45 ; SI-NEXT: ; kill: killed $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v24 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v44 ; SI-NEXT: ; kill: killed $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v26 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v43 @@ -197485,7 +197813,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v39 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v60 ; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill @@ -197786,7 +198114,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr15 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v59, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v16 ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -197796,7 +198124,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v57, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v18 ; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -197806,7 +198134,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v46, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v20 ; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -197816,120 +198144,120 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v42, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v36, v41, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v22 ; SI-NEXT: ; implicit-def: $vgpr22 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v43, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v36, v41, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v1, v36, v41, 24 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23 ; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v55, v1, v2 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v36, v41, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v36, v41, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v24 ; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v40, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v44, v47, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v1, v36, v41, 8 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25 ; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v53, v1, v2 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v44, v47, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v44, v47, 24 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v26 ; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v54, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v44, v47, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v1, v44, v47, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v27 ; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v50, v1, v2 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v37, v52, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v44, v47, 8 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v28 ; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v51, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v37, v52, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v1, v37, v52, 24 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v29 ; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v3, v1, v2 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v37, v52, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v37, v52, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v30 ; SI-NEXT: ; implicit-def: $vgpr30 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v48, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v34, v35, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: v_alignbit_b32 v1, v37, v52, 8 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v39 ; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v2, v1, v2 -; SI-NEXT: v_alignbit_b32 v1, v34, v35, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v34, v35, 24 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60 ; SI-NEXT: v_or_b32_e32 v38, v1, v4 +; SI-NEXT: v_alignbit_b32 v1, v34, v35, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v34, v35, 8 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v32, v33, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v32, v33, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v32, v33, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v63, v31, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v63, v31, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v63, v31, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v61, v62, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v61, v62, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v61, v62, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v58, v59, 24 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill @@ -198048,13 +198376,13 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v40 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v54 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v51 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v48 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill @@ -198129,17 +198457,17 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_bfe_u32 v1, v1, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_bfe_u32 v1, v1, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_bfe_u32 v1, v1, 8, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) @@ -198150,7 +198478,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB98_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v31, vcc, 3, v39 ; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 @@ -198158,9 +198486,9 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30 ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 -; SI-NEXT: s_mov_b32 s6, 0x30000 ; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v27 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 +; SI-NEXT: s_mov_b32 s6, 0x30000 ; SI-NEXT: v_add_i32_e32 v25, vcc, 3, v25 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v23 @@ -198194,7 +198522,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v32, 0xffff, v32 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v32, v33, v32 -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v39, vcc, 0x30000, v31 ; SI-NEXT: v_add_i32_e32 v38, vcc, s6, v32 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -198203,10 +198531,10 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v29, vcc, s6, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v30, v33, v30 +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v48, vcc, s6, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v27, v30, v27 +; SI-NEXT: v_or_b32_e32 v27, v33, v27 ; SI-NEXT: v_add_i32_e32 v50, vcc, s6, v27 ; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v28 ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload @@ -198214,7 +198542,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v27, v28, v27 ; SI-NEXT: v_add_i32_e32 v51, vcc, s6, v27 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v25, v27, v25 ; SI-NEXT: v_add_i32_e32 v53, vcc, s6, v25 @@ -198224,7 +198552,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v25, v26, v25 ; SI-NEXT: v_add_i32_e32 v54, vcc, s6, v25 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v23, v25, v23 ; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v23 @@ -198239,7 +198567,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v21, v23, v21 ; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v21 ; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v21, v22, v21 @@ -198249,7 +198577,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v19, v21, v19 ; SI-NEXT: v_add_i32_e32 v46, vcc, s6, v19 ; SI-NEXT: v_add_i32_e32 v19, vcc, 3, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v19, v20, v19 @@ -198259,7 +198587,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v17, v19, v17 ; SI-NEXT: v_add_i32_e32 v57, vcc, s6, v17 ; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v17, v18, v17 @@ -198269,7 +198597,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v15, v17, v15 ; SI-NEXT: v_add_i32_e32 v59, vcc, s6, v15 ; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v15, v16, v15 @@ -198345,67 +198673,67 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v2, v1 ; SI-NEXT: v_add_i32_e32 v36, vcc, s6, v1 ; SI-NEXT: v_alignbit_b32 v1, v36, v41, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v36, v41, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v36, v41, 8 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v44, v47, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v44, v47, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v44, v47, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v37, v52, 24 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v37, v52, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v37, v52, 8 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v34, v35, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v34, v35, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v34, v35, 8 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v32, v33, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v32, v33, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v32, v33, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v63, v31, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v63, v31, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v63, v31, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v61, v62, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v61, v62, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v61, v62, 8 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v58, v59, 24 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill @@ -198596,28 +198924,28 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v40 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v54 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v54 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v54 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v51 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v51 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v51 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v48 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v48 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill @@ -198638,11 +198966,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v41 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -198670,14 +198998,14 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v47 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -198713,7 +199041,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -198745,11 +199073,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v35 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -198778,14 +199106,14 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v33 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -198814,14 +199142,14 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v31 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -198850,14 +199178,14 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v62 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 @@ -199048,7 +199376,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x58, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v40 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload @@ -199084,10 +199412,10 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x60, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v54 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 @@ -199120,10 +199448,10 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v51 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 @@ -199161,7 +199489,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v48 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 @@ -199253,64 +199581,67 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:4 -; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v15 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v13 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v11 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v9 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v7 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v5 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v30 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v29 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v28 +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v27 +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v26 -; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v16 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v28 -; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v27 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v25 +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v25 +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v24 -; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v23 -; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v22 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v21 -; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v20 -; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v18 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v23 +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v22 +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v21 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v2 +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v17 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; kill: killed $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: s_waitcnt vmcnt(13) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 -; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v19 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v20 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; VI-NEXT: s_waitcnt vmcnt(13) -; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v36 -; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v37 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v17 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v40 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: s_waitcnt vmcnt(13) +; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v39 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 @@ -199322,7 +199653,8 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 @@ -199334,7 +199666,8 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 @@ -199346,7 +199679,8 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 @@ -199358,7 +199692,8 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 @@ -199370,7 +199705,8 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 @@ -199382,312 +199718,315 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr58 +; VI-NEXT: ; implicit-def: $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr40 -; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr45 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr32 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr49 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr44 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr42 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr46 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr55 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr43 +; VI-NEXT: ; implicit-def: $vgpr36 ; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: ; kill: killed $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr41 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr44 -; VI-NEXT: ; implicit-def: $vgpr43 -; VI-NEXT: ; implicit-def: $vgpr42 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr31 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB98_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v16 +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 ; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v16 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v14 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v13 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v12 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v12 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v11 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v10 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v10 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v9 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v8 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v8 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v7 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v6 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v6 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v5 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[15:16] +; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[1:2] ; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[13:14] -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[11:12] -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[9:10] -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v31, v7 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v9, v10 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v9, v11 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v9, v12 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v9, v13 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v9, v14 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v9, v15 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v9, v16 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v9, v8 -; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[7:8] -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v7, v5 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v7, v6 -; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6] -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v5, 24, v4 -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4 -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v3 -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v5, v3 -; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4] -; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v2 -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v2 -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v1 -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v3, v1 -; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v37 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v2 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v37 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v36 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v36 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v37 -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v3, v2 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[36:37] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v2 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v2 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v3 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[3:4] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v3 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v4 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v4 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v4 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v5 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[5:6] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v5 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v6 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v6 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v6 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v7 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[7:8] ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v30 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30 +; VI-NEXT: v_mov_b32_e32 v1, v7 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v8 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v29 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v30 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v8 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v8 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v9 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[9:10] ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v28 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28 +; VI-NEXT: v_mov_b32_e32 v1, v9 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v10 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v10 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v10 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v11 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[11:12] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v11 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v12 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v27 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v12 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v12 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v28 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v13 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[13:14] ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v26 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v26 +; VI-NEXT: v_mov_b32_e32 v1, v13 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v14 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v14 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v14 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v15 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[15:16] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v16 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v16 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v17 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v25 +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[17:18] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v17 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v18 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v25 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v26 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[25:26] +; VI-NEXT: v_mov_b32_e32 v1, v18 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v19 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[19:20] ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v24 +; VI-NEXT: v_mov_b32_e32 v1, v19 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v20 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v23 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v23 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v24 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v20 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v21 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[21:22] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, v21 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v1, v22 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v20 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v23 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[23:24] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v23 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v24 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v24 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v25 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[25:26] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v25 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v26 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v19 +; VI-NEXT: v_mov_b32_e32 v1, v26 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v20 -; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[21:22] -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v17 -; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[19:20] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v27 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v18 -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v5, v4 -; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[23:24] -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v45 -; VI-NEXT: v_lshrrev_b64 v[44:45], 24, v[17:18] -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v24 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v22 -; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v20 -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v19 -; VI-NEXT: v_lshrrev_b32_e32 v48, 24, v18 -; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v18 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v17 -; VI-NEXT: v_mov_b32_e32 v45, v1 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v28 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v29 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v1, v30 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v39 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[39:40] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v40 +; VI-NEXT: v_mov_b32_e32 v32, v15 +; VI-NEXT: v_mov_b32_e32 v45, v16 +; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v18 +; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v20 +; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v24 +; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v26 +; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v28 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v30 +; VI-NEXT: v_mov_b32_e32 v36, v39 +; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v40 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v31, v40 ; VI-NEXT: ; implicit-def: $vgpr1 ; VI-NEXT: ; implicit-def: $vgpr3 ; VI-NEXT: ; implicit-def: $vgpr5 @@ -199703,675 +200042,689 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr25 ; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: ; implicit-def: $vgpr29 -; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr40 ; VI-NEXT: .LBB98_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB98_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v31, 3 -; VI-NEXT: v_add_u16_sdwa v55, v18, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v32, 3, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v55 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v18, v32, v18 -; VI-NEXT: v_add_u16_e32 v32, 3, v17 -; VI-NEXT: v_add_u16_sdwa v17, v17, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; VI-NEXT: v_add_u16_sdwa v54, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v17, v32, v17 -; VI-NEXT: v_add_u16_e32 v32, 3, v20 -; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v54 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v20, v32, v20 -; VI-NEXT: v_add_u16_e32 v32, 3, v19 -; VI-NEXT: v_add_u16_sdwa v19, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; VI-NEXT: v_add_u16_sdwa v57, v22, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v19, v32, v19 -; VI-NEXT: v_add_u16_e32 v32, 3, v22 -; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v57 -; VI-NEXT: v_add_u16_sdwa v52, v21, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v22, v32, v22 -; VI-NEXT: v_add_u16_e32 v32, 3, v21 -; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v52 -; VI-NEXT: v_add_u16_sdwa v56, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v21, v32, v21 -; VI-NEXT: v_add_u16_e32 v32, 3, v24 -; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v56 -; VI-NEXT: v_add_u16_sdwa v50, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v24, v32, v24 -; VI-NEXT: v_add_u16_e32 v32, 3, v23 -; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v50 -; VI-NEXT: v_add_u16_sdwa v49, v26, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v23, v32, v23 -; VI-NEXT: v_add_u16_e32 v32, 3, v26 -; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v49 -; VI-NEXT: v_add_u16_sdwa v59, v25, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v37, 3 +; VI-NEXT: v_add_u16_e32 v31, 3, v18 +; VI-NEXT: v_add_u16_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; VI-NEXT: v_add_u16_sdwa v44, v17, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v18, v31, v18 +; VI-NEXT: v_add_u16_e32 v31, 3, v17 +; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v44 +; VI-NEXT: v_add_u16_sdwa v56, v20, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v17, v31, v17 +; VI-NEXT: v_add_u16_e32 v31, 3, v20 +; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v56 +; VI-NEXT: v_add_u16_sdwa v47, v19, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v20, v31, v20 +; VI-NEXT: v_add_u16_e32 v31, 3, v19 +; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v47 +; VI-NEXT: v_add_u16_sdwa v63, v22, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v19, v31, v19 +; VI-NEXT: v_add_u16_e32 v31, 3, v22 +; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v63 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v22, v31, v22 +; VI-NEXT: v_add_u16_e32 v31, 3, v21 +; VI-NEXT: v_add_u16_sdwa v21, v21, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; VI-NEXT: v_add_u16_sdwa v46, v24, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v21, v31, v21 +; VI-NEXT: v_add_u16_e32 v31, 3, v24 +; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v46 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v24, v31, v24 +; VI-NEXT: v_add_u16_e32 v31, 3, v23 +; VI-NEXT: v_add_u16_sdwa v23, v23, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; VI-NEXT: v_add_u16_sdwa v42, v26, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v23, v31, v23 +; VI-NEXT: v_add_u16_e32 v31, 3, v26 +; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v42 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v26, v31, v26 +; VI-NEXT: v_add_u16_e32 v31, 3, v25 +; VI-NEXT: v_add_u16_sdwa v25, v25, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; VI-NEXT: v_add_u16_sdwa v55, v28, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v25, v31, v25 +; VI-NEXT: v_add_u16_e32 v31, 3, v28 +; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v55 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v28, v31, v28 +; VI-NEXT: v_add_u16_e32 v31, 3, v27 +; VI-NEXT: v_add_u16_sdwa v27, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; VI-NEXT: v_add_u16_sdwa v38, v30, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v27, v31, v27 +; VI-NEXT: v_add_u16_e32 v31, 3, v30 +; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v38 +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v30, v31, v30 +; VI-NEXT: v_add_u16_e32 v31, 3, v29 +; VI-NEXT: v_add_u16_sdwa v29, v29, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v43, v40, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; VI-NEXT: v_add_u16_e32 v33, 3, v40 +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v43 +; VI-NEXT: v_add_u16_sdwa v34, v39, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v29, v31, v29 +; VI-NEXT: v_or_b32_e32 v40, v33, v32 +; VI-NEXT: v_add_u16_e32 v31, 3, v39 +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v34 +; VI-NEXT: v_add_u16_sdwa v41, v2, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v39, v31, v32 +; VI-NEXT: v_add_u16_e32 v32, 3, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v41 +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v2, v32, v2 +; VI-NEXT: v_add_u16_e32 v32, 3, v1 +; VI-NEXT: v_add_u16_sdwa v1, v1, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_add_u16_sdwa v51, v4, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v1, v32, v1 +; VI-NEXT: v_add_u16_e32 v32, 3, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v51 +; VI-NEXT: v_add_u16_sdwa v62, v3, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v4, v32, v4 +; VI-NEXT: v_add_u16_e32 v32, 3, v3 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v62 +; VI-NEXT: v_add_u16_sdwa v53, v6, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v3, v32, v3 +; VI-NEXT: v_add_u16_e32 v32, 3, v6 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v53 +; VI-NEXT: v_add_u16_sdwa v61, v5, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v26, v32, v26 -; VI-NEXT: v_add_u16_e32 v32, 3, v25 -; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v59 -; VI-NEXT: v_add_u16_sdwa v38, v28, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v25, v32, v25 -; VI-NEXT: v_add_u16_e32 v32, 3, v28 -; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v38 -; VI-NEXT: v_add_u16_sdwa v35, v27, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v6, v32, v6 +; VI-NEXT: v_add_u16_e32 v32, 3, v5 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v61 +; VI-NEXT: v_add_u16_sdwa v54, v8, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v5, v32, v5 +; VI-NEXT: v_add_u16_e32 v32, 3, v8 +; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v54 +; VI-NEXT: v_add_u16_sdwa v60, v7, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v8, v32, v8 +; VI-NEXT: v_add_u16_e32 v32, 3, v7 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v60 +; VI-NEXT: v_add_u16_sdwa v52, v10, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v28, v32, v28 -; VI-NEXT: v_add_u16_e32 v32, 3, v27 -; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v35 -; VI-NEXT: v_add_u16_sdwa v48, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v27, v32, v27 -; VI-NEXT: v_add_u16_e32 v32, 3, v30 -; VI-NEXT: v_add_u16_e32 v33, 3, v29 -; VI-NEXT: v_add_u16_sdwa v34, v29, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v48 -; VI-NEXT: v_or_b32_e32 v30, v32, v29 -; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v34 -; VI-NEXT: v_add_u16_sdwa v53, v37, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v7, v32, v7 +; VI-NEXT: v_add_u16_e32 v32, 3, v10 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v52 +; VI-NEXT: v_add_u16_sdwa v59, v9, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v29, v33, v29 -; VI-NEXT: v_add_u16_e32 v34, 3, v37 -; VI-NEXT: v_add_u16_sdwa v33, v36, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v53 -; VI-NEXT: v_add_u16_e32 v39, 3, v36 -; VI-NEXT: v_or_b32_e32 v37, v34, v32 -; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v33 -; VI-NEXT: v_add_u16_sdwa v47, v2, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v36, v39, v32 -; VI-NEXT: v_add_u16_e32 v33, 3, v2 -; VI-NEXT: v_add_u16_e32 v34, 3, v1 -; VI-NEXT: v_add_u16_sdwa v32, v1, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v47 -; VI-NEXT: v_or_b32_e32 v2, v33, v1 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v32 -; VI-NEXT: v_add_u16_sdwa v46, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v1, v34, v1 -; VI-NEXT: v_add_u16_e32 v33, 3, v4 -; VI-NEXT: v_add_u16_e32 v34, 3, v3 -; VI-NEXT: v_add_u16_sdwa v32, v3, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v46 -; VI-NEXT: v_or_b32_e32 v4, v33, v3 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 -; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v3, v34, v3 -; VI-NEXT: v_add_u16_sdwa v34, v6, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; VI-NEXT: v_add_u16_e32 v33, 3, v6 -; VI-NEXT: v_add_u16_e32 v39, 3, v5 -; VI-NEXT: v_add_u16_sdwa v32, v5, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v34 -; VI-NEXT: v_or_b32_e32 v6, v33, v5 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v32 -; VI-NEXT: v_add_u16_sdwa v62, v8, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v5, v39, v5 -; VI-NEXT: v_add_u16_e32 v39, 3, v8 -; VI-NEXT: v_add_u16_e32 v33, 3, v7 -; VI-NEXT: v_add_u16_sdwa v32, v7, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v62 -; VI-NEXT: v_or_b32_e32 v8, v39, v7 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v32 -; VI-NEXT: v_add_u16_sdwa v61, v10, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v7, v33, v7 -; VI-NEXT: v_add_u16_e32 v33, 3, v10 -; VI-NEXT: v_add_u16_e32 v39, 3, v9 -; VI-NEXT: v_add_u16_sdwa v32, v9, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v61 -; VI-NEXT: v_or_b32_e32 v10, v33, v9 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v32 -; VI-NEXT: v_add_u16_sdwa v60, v12, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v9, v39, v9 -; VI-NEXT: v_add_u16_e32 v33, 3, v12 -; VI-NEXT: v_add_u16_e32 v39, 3, v11 -; VI-NEXT: v_add_u16_sdwa v32, v11, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v60 -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v12, v33, v11 -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v32 -; VI-NEXT: v_add_u16_sdwa v33, v14, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v11, v39, v11 -; VI-NEXT: v_add_u16_e32 v39, 3, v14 -; VI-NEXT: v_add_u16_e32 v40, 3, v13 -; VI-NEXT: v_add_u16_sdwa v32, v13, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v33 -; VI-NEXT: v_add_u16_sdwa v63, v16, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v14, v39, v13 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v32 -; VI-NEXT: v_add_u16_sdwa v31, v15, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v16, 3, v16 +; VI-NEXT: v_or_b32_e32 v10, v32, v10 +; VI-NEXT: v_add_u16_e32 v32, 3, v9 +; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v59 +; VI-NEXT: v_add_u16_sdwa v50, v12, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v9, v32, v9 +; VI-NEXT: v_add_u16_e32 v32, 3, v12 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v50 +; VI-NEXT: v_add_u16_sdwa v58, v11, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v12, v32, v12 +; VI-NEXT: v_add_u16_e32 v32, 3, v11 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v58 +; VI-NEXT: v_add_u16_sdwa v49, v14, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v11, v32, v11 +; VI-NEXT: v_add_u16_e32 v32, 3, v14 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v49 +; VI-NEXT: v_add_u16_sdwa v35, v13, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v14, v32, v14 +; VI-NEXT: v_add_u16_e32 v32, 3, v13 +; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v35 +; VI-NEXT: v_add_u16_sdwa v48, v16, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v57, v15, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; VI-NEXT: v_or_b32_e32 v13, v32, v13 +; VI-NEXT: v_add_u16_e32 v45, 3, v16 +; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v48 ; VI-NEXT: v_add_u16_e32 v32, 3, v15 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v63 -; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v16, v16, v15 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v31 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v57 +; VI-NEXT: v_or_b32_e32 v16, v45, v16 ; VI-NEXT: v_or_b32_e32 v15, v32, v15 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v16 -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15 -; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[15:16] -; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: v_or_b32_e32 v13, v40, v13 -; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v14 -; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v13 -; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[13:14] -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v12 -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v11 -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12] -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v10 -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v9 -; VI-NEXT: v_lshrrev_b64 v[9:10], 24, v[9:10] -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v8 -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v7 -; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[7:8] -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v6 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v5 -; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6] -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v3 -; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4] -; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v2 -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v1 -; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v37 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v36 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[36:37] -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[36:37], 24, v[15:16] +; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v36, v31 +; VI-NEXT: v_mov_b32_e32 v31, v33 +; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v15 +; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14] +; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v13 +; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[11:12] +; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v11 +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[9:10] +; VI-NEXT: v_lshrrev_b32_e32 v10, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v9 +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[9:10], 24, v[7:8] +; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v7 +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[5:6] +; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v5 +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[3:4] +; VI-NEXT: v_lshrrev_b32_e32 v4, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v3 +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v1 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[39:40] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v40 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v39 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30] -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28] -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[25:26] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v26 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v25 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[25:26] -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[23:24] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v24 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v23 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[21:22] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v21 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[19:20] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v20 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v63, 8, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v33, 8, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v60, 8, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v61, 8, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v62, 8, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v34, 8, 8 -; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[21:22] -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v46, 8, 8 -; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[19:20] -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v47, 8, 8 -; VI-NEXT: v_lshrrev_b64 v[44:45], 24, v[17:18] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v19 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v53, 8, 8 -; VI-NEXT: v_mov_b32_e32 v45, v38 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[17:18] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v18 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v17 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill ; VI-NEXT: v_bfe_u32 v1, v48, 8, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v45, 8, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill ; VI-NEXT: v_bfe_u32 v1, v49, 8, 8 -; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[23:24] -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, v57 -; VI-NEXT: v_mov_b32_e32 v57, v55 -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v19 -; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v18 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v17 -; VI-NEXT: v_bfe_u32 v56, v56, 8, 8 -; VI-NEXT: v_mov_b32_e32 v51, v1 -; VI-NEXT: v_bfe_u32 v38, v1, 8, 8 -; VI-NEXT: v_mov_b32_e32 v55, v54 -; VI-NEXT: v_bfe_u32 v49, v54, 8, 8 -; VI-NEXT: v_bfe_u32 v48, v57, 8, 8 -; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v1, v50, 8, 8 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v1, v52, 8, 8 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v1, v54, 8, 8 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v1, v53, 8, 8 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v1, v51, 8, 8 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v1, v41, 8, 8 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v37, v43, 8, 8 +; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v43, v38, 8, 8 +; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v55, v55, 8, 8 +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v38, v42, 8, 8 +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v46, v46, 8, 8 +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v42, v63, 8, 8 +; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v63, v56, 8, 8 +; VI-NEXT: v_mov_b32_e32 v56, v34 +; VI-NEXT: v_mov_b32_e32 v34, v44 +; VI-NEXT: s_waitcnt vmcnt(14) +; VI-NEXT: v_bfe_u32 v44, v33, 8, 8 +; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; VI-NEXT: .LBB98_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_perm_b32 v1, v1, v41, s4 ; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v2, v1, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v2, v3, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v47, v2, s4 +; VI-NEXT: v_perm_b32 v2, v41, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_perm_b32 v1, v1, v31, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v62, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v46, v2, s4 +; VI-NEXT: v_perm_b32 v2, v51, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v61, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v34, v2, s4 +; VI-NEXT: v_perm_b32 v2, v53, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v60, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v62, v2, s4 +; VI-NEXT: v_perm_b32 v2, v54, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v59, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v61, v2, s4 +; VI-NEXT: v_perm_b32 v2, v52, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v58, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v60, v2, s4 +; VI-NEXT: v_perm_b32 v2, v50, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v35, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v33, v2, s4 +; VI-NEXT: v_perm_b32 v2, v49, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s4 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v57, v2, s4 +; VI-NEXT: v_perm_b32 v1, v32, v1, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v2, v1, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v45, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v63, v2, s4 +; VI-NEXT: v_perm_b32 v2, v48, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v44, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v58, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v34, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v57, v48, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v40, s4 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: v_perm_b32 v2, v33, v44, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v1, v43, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v32, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v1, v2, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v47, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: v_perm_b32 v2, v55, v49, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v2, v63, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: v_perm_b32 v2, v52, v42, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: v_perm_b32 v2, v51, v38, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v2, v42, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: v_perm_b32 v2, v50, v39, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v56, s4 +; VI-NEXT: v_perm_b32 v2, v2, v46, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v59, v2, s4 +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v2, v2, v38, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v35, v2, s4 +; VI-NEXT: v_perm_b32 v2, v2, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v45, v2, s4 +; VI-NEXT: v_perm_b32 v2, v2, v55, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v2, v2, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v2, v2, v43, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v2, v3, s4 +; VI-NEXT: v_perm_b32 v2, v56, v2, s4 +; VI-NEXT: v_perm_b32 v1, v36, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v31, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v1, v2, s4 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v53, v2, s4 +; VI-NEXT: v_perm_b32 v2, v2, v37, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen @@ -200416,731 +200769,830 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4 ; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr52 ; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr45 -; GFX9-NEXT: ; implicit-def: $vgpr44 -; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr60 -; GFX9-NEXT: ; kill: killed $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr59 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr58 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr49 +; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr47 -; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; kill: killed $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr42 -; GFX9-NEXT: ; implicit-def: $vgpr41 -; GFX9-NEXT: ; implicit-def: $vgpr40 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr50 -; GFX9-NEXT: ; implicit-def: $vgpr49 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr61 +; GFX9-NEXT: ; implicit-def: $vgpr60 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr43 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: ; kill: killed $vgpr33 +; GFX9-NEXT: ; implicit-def: $vgpr62 +; GFX9-NEXT: ; implicit-def: $vgpr63 +; GFX9-NEXT: ; implicit-def: $vgpr42 +; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr40 +; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr44 +; GFX9-NEXT: ; implicit-def: $vgpr33 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(13) -; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: ; implicit-def: $vgpr34 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB98_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v25 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v25 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v24 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v24 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v24 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v23 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v23 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v22 +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[11:12] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: s_waitcnt vmcnt(22) -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v31 -; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[15:16] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v22 +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v30 -; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v21 +; GFX9-NEXT: v_lshrrev_b64 v[59:60], 24, v[9:10] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v30 -; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v21 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v30 -; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v20 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2] +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v20 +; GFX9-NEXT: s_waitcnt vmcnt(61) +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[31:32] ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v29 -; GFX9-NEXT: v_mov_b32_e32 v43, v54 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v20 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v28 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v19 +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v19 +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[27:28] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v28 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v18 +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[15:16] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18 +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v27 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[25:26] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v26 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v17 +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[5:6] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[13:14] +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[21:22] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v25 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[56:57], 24, v[3:4] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8] +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v24 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v1 +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[19:20] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v24 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v56, v43 +; GFX9-NEXT: v_mov_b32_e32 v57, v44 +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[29:30] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v24 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[37:38], 24, v[1:2] +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v23 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[58:59], 24, v[17:18] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v23 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v22 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v22 -; GFX9-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v22 -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20] -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v30 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[23:24] +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v3 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v1 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v17 -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18] +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v26 +; GFX9-NEXT: v_mov_b32_e32 v60, v35 +; GFX9-NEXT: v_mov_b32_e32 v38, v55 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v31 +; GFX9-NEXT: v_mov_b32_e32 v35, v54 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v31 +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v17 ; GFX9-NEXT: .LBB98_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB98_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true +; GFX9-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] +; GFX9-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] +; GFX9-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] +; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] +; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8] +; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] +; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] +; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] ; GFX9-NEXT: v_pk_add_u16 v32, v32, 3 op_sel_hi:[1,0] -; GFX9-NEXT: s_waitcnt vmcnt(12) +; GFX9-NEXT: s_waitcnt vmcnt(44) ; GFX9-NEXT: v_pk_add_u16 v31, v31, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32] ; GFX9-NEXT: v_pk_add_u16 v30, v30, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30] ; GFX9-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28] ; GFX9-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26] -; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] ; GFX9-NEXT: v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] -; GFX9-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] +; GFX9-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v16 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v16 -; GFX9-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; GFX9-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v15 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32 -; GFX9-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v32 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v13 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v31 -; GFX9-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v26 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v13 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v31 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v25 +; GFX9-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v25 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v30 -; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v24 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v30 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v24 +; GFX9-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v24 ; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v11 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v29 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v23 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v23 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v28 -; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v10 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v28 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v27 -; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v22 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v9 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v27 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v21 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v21 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v26 -; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v20 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v8 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v26 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v20 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v7 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v25 -; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v20 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v7 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v25 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v19 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v24 -; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[15:16] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v19 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v24 -; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v18 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v24 -; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v18 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v23 -; GFX9-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v18 +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[23:24] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v4 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v23 -; GFX9-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[52:53], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v22 -; GFX9-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[41:42], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v2 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v22 -; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18] -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v22 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v3 -; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v1 -; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v18 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v31 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v31 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v26 +; GFX9-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v17 ; GFX9-NEXT: .LBB98_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v1, v1, v33, s4 -; GFX9-NEXT: v_perm_b32 v33, v62, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v55, v63, v42, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v55, 16, v1 -; GFX9-NEXT: v_perm_b32 v39, v39, v53, s4 -; GFX9-NEXT: v_perm_b32 v2, v2, v45, s4 -; GFX9-NEXT: v_perm_b32 v3, v3, v44, s4 -; GFX9-NEXT: v_perm_b32 v4, v4, v61, s4 -; GFX9-NEXT: v_perm_b32 v5, v5, v60, s4 -; GFX9-NEXT: v_perm_b32 v37, v37, v54, s4 -; GFX9-NEXT: v_perm_b32 v17, v17, v59, s4 -; GFX9-NEXT: v_perm_b32 v18, v18, v58, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v40, v41, v40, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v6, v6, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v52, v41, v52, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v7, v7, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v8, v8, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v51, v41, v51, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v9, v9, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v10, v10, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v50, v41, v50, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v11, v11, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v12, v12, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v49, v41, v49, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v13, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v14, v14, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v48, v41, v48, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v15, v15, v41, s4 -; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v41, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v52, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v56, v56, v58, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v56, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v53, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 +; GFX9-NEXT: v_perm_b32 v1, v2, v49, s4 +; GFX9-NEXT: v_perm_b32 v2, v51, v38, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshl_or_b32 v1, v33, 16, v3 +; GFX9-NEXT: v_perm_b32 v1, v3, v57, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v50, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v4, v61, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v4 +; GFX9-NEXT: v_perm_b32 v2, v60, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_lshl_or_b32 v1, v40, 16, v5 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v5, v48, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v6, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v6 +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_lshl_or_b32 v1, v52, 16, v7 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v7, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v8, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshl_or_b32 v1, v51, 16, v9 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v9, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v10, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v10 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshl_or_b32 v1, v50, 16, v11 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v11, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v12, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v12 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_lshl_or_b32 v1, v49, 16, v13 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v13, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v14, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v14 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_lshl_or_b32 v1, v48, 16, v15 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v15, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v2, v35, v34, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v1, v43, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v16 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_lshl_or_b32 v1, v37, 16, v17 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v17, v37, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: v_perm_b32 v1, v38, v36, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v18 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v18, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: v_perm_b32 v1, v19, v57, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v39, 16, v1 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: v_perm_b32 v1, v20, v56, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v1, v20, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v21, v47, s4 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v46, v2, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v21, v1, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v22, v1, s4 @@ -201148,104 +201600,72 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v1, v23, v1, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_perm_b32 v1, v24, v1, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v25, v1, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v62, v63, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_perm_b32 v1, v26, v1, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v27, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v27, v42, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v41, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v1, v28, v1, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_perm_b32 v1, v28, v47, s4 +; GFX9-NEXT: v_perm_b32 v2, v36, v40, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v29, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v29, v46, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v39, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v1, v30, v1, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_perm_b32 v1, v30, v45, s4 +; GFX9-NEXT: v_perm_b32 v2, v35, v55, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v31, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v31, v54, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v2, v44, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v1, v32, v1, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s4 +; GFX9-NEXT: v_perm_b32 v1, v32, v53, s4 +; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload @@ -201658,54 +202078,52 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-LABEL: bitcast_v64i16_to_v128i8: ; GFX11-FAKE16: ; %bb.0: ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-FAKE16-NEXT: s_clause 0x14 ; 84-byte Folded Spill -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:92 -; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:88 +; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Spill +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32 offset:88 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:84 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:84 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:80 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:76 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s32 offset:72 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v45, s32 offset:68 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v46, s32 offset:64 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v47, s32 offset:60 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v56, s32 offset:56 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v57, s32 offset:52 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v58, s32 offset:48 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v59, s32 offset:44 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v60, s32 offset:40 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v61, s32 offset:36 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v62, s32 offset:32 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v63, s32 offset:28 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v72, s32 offset:24 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v73, s32 offset:20 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v74, s32 offset:16 ; GFX11-FAKE16-NEXT: ; meta instruction -; GFX11-FAKE16-NEXT: scratch_store_b32 off, v76, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_store_b32 off, v75, s32 offset:12 ; GFX11-FAKE16-NEXT: s_clause 0x2 ; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s32 offset:8 ; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:4 ; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr163 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr160 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr64 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr151 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr149 @@ -201718,13 +202136,13 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr131 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr130 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr129 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr128 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr119 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr118 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr117 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr116 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr48 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr115 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr114 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr113 @@ -201751,7 +202169,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr71 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr70 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr69 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr76 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr39 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr75 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr67 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr74 @@ -201789,16 +202207,16 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr167 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr166 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr165 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr164 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr163 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr160 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr162 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr161 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr150 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr148 +; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr37 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr146 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr144 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr135 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr49 -; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr38 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2) ; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v33 ; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr33 @@ -201810,13 +202228,15 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[13:14] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[7:8] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[3:4] +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[31:32] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[21:22] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[5:6] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[29:30] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[19:20] ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 24, v16 @@ -201857,17 +202277,15 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 24, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 8, v2 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 8, v1 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v1 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 24, v32 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v32 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 8, v32 -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v31 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v31 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v30 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 24, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v30 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 8, v30 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v29 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v29 @@ -201900,11 +202318,10 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v18 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v18 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 16, v17 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v17 -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18] +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v17 ; GFX11-FAKE16-NEXT: .LBB98_2: ; %Flow ; GFX11-FAKE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execz .LBB98_4 @@ -201921,41 +202338,41 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] -; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] -; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] +; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] +; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0] -; GFX11-FAKE16-NEXT: v_pk_add_u16 v30, v30, 3 op_sel_hi:[1,0] -; GFX11-FAKE16-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0] -; GFX11-FAKE16-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] -; GFX11-FAKE16-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) +; GFX11-FAKE16-NEXT: v_pk_add_u16 v32, v32, 3 op_sel_hi:[1,0] +; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) +; GFX11-FAKE16-NEXT: v_pk_add_u16 v31, v31, 3 op_sel_hi:[1,0] +; GFX11-FAKE16-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] +; GFX11-FAKE16-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v28, v28, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0] -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1) -; GFX11-FAKE16-NEXT: v_pk_add_u16 v32, v32, 3 op_sel_hi:[1,0] -; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) -; GFX11-FAKE16-NEXT: v_pk_add_u16 v31, v31, 3 op_sel_hi:[1,0] +; GFX11-FAKE16-NEXT: v_pk_add_u16 v30, v30, 3 op_sel_hi:[1,0] +; GFX11-FAKE16-NEXT: v_pk_add_u16 v29, v29, 3 op_sel_hi:[1,0] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[13:14] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[11:12] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[64:65], 24, v[1:2] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[9:10] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[7:8] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[52:53], 24, v[3:4] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[65:66], 24, v[21:22] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[7:8] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[29:30] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[49:50], 24, v[5:6] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[31:32] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[66:67], 24, v[19:20] -; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[31:32] +; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[29:30] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[50:51], 24, v[27:28] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] ; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[67:68], 24, v[17:18] @@ -201997,15 +202414,15 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 24, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v149, 16, v2 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v151, 8, v2 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 16, v1 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 8, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 16, v1 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 8, v1 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 24, v32 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v32 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 8, v32 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v148, 16, v31 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v150, 8, v31 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v160, 24, v30 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v163, 16, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v161, 24, v30 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v162, 16, v30 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v164, 8, v30 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v165, 16, v29 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v166, 8, v29 @@ -202038,48 +202455,48 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v73, 16, v18 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v74, 8, v18 ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v75, 16, v17 -; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v76, 8, v17 +; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 8, v17 ; GFX11-FAKE16-NEXT: .LBB98_4: ; %end ; GFX11-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 -; GFX11-FAKE16-NEXT: v_perm_b32 v39, v161, v64, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v162, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v163, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v51, v160, v64, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v151, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v51, v149, v147, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v55, v149, v147, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v145, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v52, v134, v52, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v39, 16, v1 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v51, 16, v1 ; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v133, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v39, v132, v131, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v51, v132, v131, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v130, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v49, v129, v49, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v7, v7, v117, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v37, v116, v37, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v51, 16, v2 +; GFX11-FAKE16-NEXT: v_perm_b32 v48, v116, v48, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v55, 16, v2 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v52, 16, v3 -; GFX11-FAKE16-NEXT: v_perm_b32 v5, v5, v130, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v48, v129, v48, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v6, v6, v128, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v51, v119, v118, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v52, v119, v118, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v8, v8, v115, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v52, v114, v113, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v4 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v37, 16, v7 +; GFX11-FAKE16-NEXT: v_perm_b32 v55, v114, v113, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v51, 16, v4 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v49, 16, v5 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v48, 16, v7 ; GFX11-FAKE16-NEXT: v_perm_b32 v9, v9, v112, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v36, v103, v36, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v10, v10, v102, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v37, v101, v100, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v48, v101, v100, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v11, v11, v99, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v35, v98, v35, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v12, v12, v97, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v39, v96, v87, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v48, 16, v5 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v51, 16, v6 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v52, 16, v8 +; GFX11-FAKE16-NEXT: v_perm_b32 v49, v96, v87, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v52, 16, v6 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v8, v55, 16, v8 ; GFX11-FAKE16-NEXT: s_clause 0x1 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[5:8], off offset:16 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v1, v36, 16, v9 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v37, 16, v10 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v2, v48, 16, v10 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v3, v35, 16, v11 -; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v39, 16, v12 +; GFX11-FAKE16-NEXT: v_lshl_or_b32 v4, v49, 16, v12 ; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v86, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v6, v85, v34, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v7, v14, v84, 0xc0c0004 @@ -202088,7 +202505,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_perm_b32 v10, v80, v33, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v11, v16, v71, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v12, v70, v69, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v76, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v13, v17, v39, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v14, v75, v67, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v5, v6, 16, v5 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v8, 16, v7 @@ -202128,12 +202545,12 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: v_perm_b32 v21, v176, v167, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v24, 16, v23 ; GFX11-FAKE16-NEXT: v_perm_b32 v22, v29, v166, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v23, v165, v49, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v23, v165, v38, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v24, v30, v164, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v25, v163, v160, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v25, v162, v161, 0xc0c0004 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: v_perm_b32 v26, v31, v150, 0xc0c0004 -; GFX11-FAKE16-NEXT: v_perm_b32 v27, v148, v38, 0xc0c0004 +; GFX11-FAKE16-NEXT: v_perm_b32 v27, v148, v37, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v28, v32, v146, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_perm_b32 v29, v144, v135, 0xc0c0004 ; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v21, 16, v20 @@ -202148,28 +202565,27 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 { ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:80 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[17:20], off offset:96 ; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[21:24], off offset:112 -; GFX11-FAKE16-NEXT: s_clause 0x14 ; 84-byte Folded Reload -; GFX11-FAKE16-NEXT: scratch_load_b32 v76, off, s32 offset:12 -; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:16 -; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:20 -; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:24 -; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:28 -; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:32 -; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:36 -; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:40 -; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:44 -; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:48 -; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:52 -; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:56 -; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:60 -; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:64 -; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:68 -; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:72 -; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:76 -; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:80 -; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:84 -; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:88 -; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:92 +; GFX11-FAKE16-NEXT: s_clause 0x13 ; 80-byte Folded Reload +; GFX11-FAKE16-NEXT: scratch_load_b32 v75, off, s32 offset:12 +; GFX11-FAKE16-NEXT: scratch_load_b32 v74, off, s32 offset:16 +; GFX11-FAKE16-NEXT: scratch_load_b32 v73, off, s32 offset:20 +; GFX11-FAKE16-NEXT: scratch_load_b32 v72, off, s32 offset:24 +; GFX11-FAKE16-NEXT: scratch_load_b32 v63, off, s32 offset:28 +; GFX11-FAKE16-NEXT: scratch_load_b32 v62, off, s32 offset:32 +; GFX11-FAKE16-NEXT: scratch_load_b32 v61, off, s32 offset:36 +; GFX11-FAKE16-NEXT: scratch_load_b32 v60, off, s32 offset:40 +; GFX11-FAKE16-NEXT: scratch_load_b32 v59, off, s32 offset:44 +; GFX11-FAKE16-NEXT: scratch_load_b32 v58, off, s32 offset:48 +; GFX11-FAKE16-NEXT: scratch_load_b32 v57, off, s32 offset:52 +; GFX11-FAKE16-NEXT: scratch_load_b32 v56, off, s32 offset:56 +; GFX11-FAKE16-NEXT: scratch_load_b32 v47, off, s32 offset:60 +; GFX11-FAKE16-NEXT: scratch_load_b32 v46, off, s32 offset:64 +; GFX11-FAKE16-NEXT: scratch_load_b32 v45, off, s32 offset:68 +; GFX11-FAKE16-NEXT: scratch_load_b32 v44, off, s32 offset:72 +; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:76 +; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:80 +; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:84 +; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32 offset:88 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %b, 0 @@ -202237,798 +202653,796 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v20, s30, 34 ; SI-NEXT: v_writelane_b32 v20, s31, 35 ; SI-NEXT: s_lshr_b32 s5, s16, 16 -; SI-NEXT: v_readfirstlane_b32 s49, v18 -; SI-NEXT: v_readfirstlane_b32 s51, v17 -; SI-NEXT: v_readfirstlane_b32 s38, v16 -; SI-NEXT: v_readfirstlane_b32 s48, v15 -; SI-NEXT: v_readfirstlane_b32 s37, v14 -; SI-NEXT: v_readfirstlane_b32 s95, v13 -; SI-NEXT: v_readfirstlane_b32 s96, v12 -; SI-NEXT: v_readfirstlane_b32 s36, v11 -; SI-NEXT: v_readfirstlane_b32 s85, v10 -; SI-NEXT: v_readfirstlane_b32 s87, v9 -; SI-NEXT: v_readfirstlane_b32 s34, v8 -; SI-NEXT: v_readfirstlane_b32 s84, v7 -; SI-NEXT: v_readfirstlane_b32 s71, v6 -; SI-NEXT: v_readfirstlane_b32 s81, v5 -; SI-NEXT: v_readfirstlane_b32 s68, v4 -; SI-NEXT: v_readfirstlane_b32 s70, v3 -; SI-NEXT: v_readfirstlane_b32 s67, v2 -; SI-NEXT: v_readfirstlane_b32 s31, v1 ; SI-NEXT: ; implicit-def: $vgpr21 : SGPR spill to VGPR lane -; SI-NEXT: s_lshr_b32 s75, s29, 16 -; SI-NEXT: s_lshr_b32 s66, s28, 16 -; SI-NEXT: s_lshr_b32 s78, s27, 16 -; SI-NEXT: s_lshr_b32 s55, s26, 16 -; SI-NEXT: s_lshr_b32 s79, s25, 16 -; SI-NEXT: s_lshr_b32 s54, s24, 16 -; SI-NEXT: s_lshr_b32 s90, s23, 16 -; SI-NEXT: s_lshr_b32 s7, s22, 16 -; SI-NEXT: s_lshr_b32 s91, s21, 16 -; SI-NEXT: s_lshr_b32 s53, s20, 16 -; SI-NEXT: s_lshr_b32 s92, s19, 16 ; SI-NEXT: s_lshr_b32 s6, s18, 16 -; SI-NEXT: s_lshr_b32 s93, s17, 16 -; SI-NEXT: s_lshr_b32 s58, s49, 16 -; SI-NEXT: s_lshr_b32 s50, s51, 16 -; SI-NEXT: s_lshr_b32 s59, s38, 16 -; SI-NEXT: s_lshr_b32 s39, s48, 16 -; SI-NEXT: s_lshr_b32 s60, s37, 16 -; SI-NEXT: s_lshr_b32 s94, s95, 16 -; SI-NEXT: s_lshr_b32 s61, s96, 16 -; SI-NEXT: s_lshr_b32 s97, s36, 16 -; SI-NEXT: s_lshr_b32 s62, s85, 16 -; SI-NEXT: s_lshr_b32 s86, s87, 16 -; SI-NEXT: s_lshr_b32 s63, s34, 16 -; SI-NEXT: s_lshr_b32 s35, s84, 16 -; SI-NEXT: s_lshr_b32 s72, s71, 16 -; SI-NEXT: s_lshr_b32 s80, s81, 16 -; SI-NEXT: s_lshr_b32 s73, s68, 16 -; SI-NEXT: s_lshr_b32 s69, s70, 16 -; SI-NEXT: s_lshr_b32 s74, s67, 16 -; SI-NEXT: s_lshr_b32 s30, s31, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v19 ; SI-NEXT: s_waitcnt expcnt(2) ; SI-NEXT: v_writelane_b32 v21, s5, 0 -; SI-NEXT: s_cmp_lg_u32 s4, 0 +; SI-NEXT: s_lshr_b32 s7, s20, 16 ; SI-NEXT: v_writelane_b32 v21, s6, 1 +; SI-NEXT: s_lshr_b32 s8, s22, 16 ; SI-NEXT: v_writelane_b32 v21, s7, 2 +; SI-NEXT: s_lshr_b32 s9, s24, 16 +; SI-NEXT: v_readfirstlane_b32 s37, v18 +; SI-NEXT: v_readfirstlane_b32 s83, v17 +; SI-NEXT: v_readfirstlane_b32 s52, v16 +; SI-NEXT: v_readfirstlane_b32 s54, v15 +; SI-NEXT: v_readfirstlane_b32 s35, v14 +; SI-NEXT: v_readfirstlane_b32 s96, v13 +; SI-NEXT: v_readfirstlane_b32 s82, v12 +; SI-NEXT: v_readfirstlane_b32 s84, v11 +; SI-NEXT: v_readfirstlane_b32 s80, v10 +; SI-NEXT: v_readfirstlane_b32 s65, v9 +; SI-NEXT: v_readfirstlane_b32 s70, v8 +; SI-NEXT: v_readfirstlane_b32 s55, v7 +; SI-NEXT: v_readfirstlane_b32 s67, v6 +; SI-NEXT: v_readfirstlane_b32 s69, v5 +; SI-NEXT: v_readfirstlane_b32 s53, v4 +; SI-NEXT: v_readfirstlane_b32 s66, v3 +; SI-NEXT: v_readfirstlane_b32 s49, v2 +; SI-NEXT: v_readfirstlane_b32 s51, v1 +; SI-NEXT: v_writelane_b32 v21, s8, 3 +; SI-NEXT: s_lshr_b32 s88, s29, 16 +; SI-NEXT: s_lshr_b32 s11, s28, 16 +; SI-NEXT: s_lshr_b32 s89, s27, 16 +; SI-NEXT: s_lshr_b32 s10, s26, 16 +; SI-NEXT: s_lshr_b32 s93, s25, 16 +; SI-NEXT: s_lshr_b32 s94, s23, 16 +; SI-NEXT: s_lshr_b32 s95, s21, 16 +; SI-NEXT: s_lshr_b32 s30, s19, 16 +; SI-NEXT: s_lshr_b32 s31, s17, 16 +; SI-NEXT: s_lshr_b32 s74, s37, 16 +; SI-NEXT: s_lshr_b32 s71, s83, 16 +; SI-NEXT: s_lshr_b32 s75, s52, 16 +; SI-NEXT: s_lshr_b32 s98, s54, 16 +; SI-NEXT: s_lshr_b32 s76, s35, 16 +; SI-NEXT: s_lshr_b32 s86, s96, 16 +; SI-NEXT: s_lshr_b32 s77, s82, 16 +; SI-NEXT: s_lshr_b32 s50, s84, 16 +; SI-NEXT: s_lshr_b32 s78, s80, 16 +; SI-NEXT: s_lshr_b32 s48, s65, 16 +; SI-NEXT: s_lshr_b32 s79, s70, 16 +; SI-NEXT: s_lshr_b32 s36, s55, 16 +; SI-NEXT: s_lshr_b32 s90, s67, 16 +; SI-NEXT: s_lshr_b32 s68, s69, 16 +; SI-NEXT: s_lshr_b32 s91, s53, 16 +; SI-NEXT: s_lshr_b32 s34, s66, 16 +; SI-NEXT: s_lshr_b32 s92, s49, 16 +; SI-NEXT: s_lshr_b32 s64, s51, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v19 +; SI-NEXT: v_writelane_b32 v21, s9, 4 +; SI-NEXT: s_cmp_lg_u32 s4, 0 +; SI-NEXT: v_writelane_b32 v21, s10, 5 +; SI-NEXT: v_writelane_b32 v21, s11, 6 ; SI-NEXT: ; implicit-def: $vgpr22 : SGPR spill to VGPR lane ; SI-NEXT: ; implicit-def: $vgpr23 : SGPR spill to VGPR lane ; SI-NEXT: s_cbranch_scc0 .LBB99_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_or_b32 s98, s4, s5 +; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s17, 0xffff -; SI-NEXT: s_lshl_b32 s5, s93, 16 -; SI-NEXT: s_or_b32 s99, s4, s5 +; SI-NEXT: s_lshl_b32 s5, s31, 16 +; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s6, 16 -; SI-NEXT: s_or_b32 s82, s4, s5 +; SI-NEXT: s_or_b32 s72, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff -; SI-NEXT: s_lshl_b32 s5, s92, 16 -; SI-NEXT: s_or_b32 s83, s4, s5 +; SI-NEXT: s_lshl_b32 s5, s30, 16 +; SI-NEXT: s_or_b32 s73, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s5, s53, 16 -; SI-NEXT: s_or_b32 s64, s4, s5 +; SI-NEXT: s_lshl_b32 s5, s7, 16 +; SI-NEXT: s_or_b32 s62, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff -; SI-NEXT: s_lshl_b32 s5, s91, 16 -; SI-NEXT: s_or_b32 s65, s4, s5 +; SI-NEXT: s_lshl_b32 s5, s95, 16 +; SI-NEXT: s_or_b32 s63, s4, s5 ; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s5, s7, 16 -; SI-NEXT: s_or_b32 s88, s4, s5 +; SI-NEXT: s_lshl_b32 s5, s8, 16 +; SI-NEXT: s_or_b32 s60, s4, s5 ; SI-NEXT: s_and_b32 s4, s23, 0xffff -; SI-NEXT: s_lshl_b32 s5, s90, 16 -; SI-NEXT: s_or_b32 s89, s4, s5 +; SI-NEXT: s_lshl_b32 s5, s94, 16 +; SI-NEXT: s_or_b32 s61, s4, s5 ; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s5, s54, 16 -; SI-NEXT: s_or_b32 s56, s4, s5 +; SI-NEXT: s_lshl_b32 s5, s9, 16 +; SI-NEXT: s_or_b32 s58, s4, s5 ; SI-NEXT: s_and_b32 s4, s25, 0xffff -; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s57, s4, s5 +; SI-NEXT: s_lshl_b32 s5, s93, 16 +; SI-NEXT: s_or_b32 s59, s4, s5 ; SI-NEXT: s_and_b32 s4, s26, 0xffff -; SI-NEXT: s_lshl_b32 s5, s55, 16 -; SI-NEXT: s_or_b32 s76, s4, s5 +; SI-NEXT: s_lshl_b32 s5, s10, 16 +; SI-NEXT: s_or_b32 s56, s4, s5 ; SI-NEXT: s_and_b32 s4, s27, 0xffff -; SI-NEXT: s_lshl_b32 s5, s78, 16 -; SI-NEXT: s_or_b32 s77, s4, s5 +; SI-NEXT: s_lshl_b32 s5, s89, 16 +; SI-NEXT: s_or_b32 s57, s4, s5 ; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s5, s66, 16 +; SI-NEXT: s_lshl_b32 s5, s11, 16 ; SI-NEXT: s_or_b32 s46, s4, s5 ; SI-NEXT: s_and_b32 s4, s29, 0xffff -; SI-NEXT: s_lshl_b32 s5, s75, 16 +; SI-NEXT: s_lshl_b32 s5, s88, 16 ; SI-NEXT: s_or_b32 s47, s4, s5 -; SI-NEXT: s_and_b32 s4, s31, 0xffff -; SI-NEXT: s_lshl_b32 s5, s30, 16 +; SI-NEXT: s_and_b32 s4, s51, 0xffff +; SI-NEXT: s_lshl_b32 s5, s64, 16 ; SI-NEXT: s_or_b32 s44, s4, s5 -; SI-NEXT: s_and_b32 s4, s67, 0xffff -; SI-NEXT: s_lshl_b32 s5, s74, 16 +; SI-NEXT: s_and_b32 s4, s49, 0xffff +; SI-NEXT: s_lshl_b32 s5, s92, 16 ; SI-NEXT: s_or_b32 s45, s4, s5 -; SI-NEXT: s_and_b32 s4, s70, 0xffff -; SI-NEXT: s_lshl_b32 s5, s69, 16 +; SI-NEXT: s_and_b32 s4, s66, 0xffff +; SI-NEXT: s_lshl_b32 s5, s34, 16 ; SI-NEXT: s_or_b32 s42, s4, s5 -; SI-NEXT: s_and_b32 s4, s68, 0xffff -; SI-NEXT: s_lshl_b32 s5, s73, 16 +; SI-NEXT: s_and_b32 s4, s53, 0xffff +; SI-NEXT: s_lshl_b32 s5, s91, 16 ; SI-NEXT: s_or_b32 s43, s4, s5 -; SI-NEXT: s_and_b32 s4, s81, 0xffff -; SI-NEXT: s_lshl_b32 s5, s80, 16 +; SI-NEXT: s_and_b32 s4, s69, 0xffff +; SI-NEXT: s_lshl_b32 s5, s68, 16 ; SI-NEXT: s_or_b32 s40, s4, s5 -; SI-NEXT: s_and_b32 s4, s71, 0xffff -; SI-NEXT: s_lshl_b32 s5, s72, 16 +; SI-NEXT: s_and_b32 s4, s67, 0xffff +; SI-NEXT: s_lshl_b32 s5, s90, 16 ; SI-NEXT: s_or_b32 s41, s4, s5 -; SI-NEXT: s_and_b32 s4, s84, 0xffff -; SI-NEXT: s_lshl_b32 s5, s35, 16 +; SI-NEXT: s_and_b32 s4, s55, 0xffff +; SI-NEXT: s_lshl_b32 s5, s36, 16 ; SI-NEXT: s_or_b32 s14, s4, s5 -; SI-NEXT: s_and_b32 s4, s34, 0xffff -; SI-NEXT: s_lshl_b32 s5, s63, 16 +; SI-NEXT: s_and_b32 s4, s70, 0xffff +; SI-NEXT: s_lshl_b32 s5, s79, 16 ; SI-NEXT: s_or_b32 s15, s4, s5 -; SI-NEXT: s_and_b32 s4, s87, 0xffff -; SI-NEXT: s_lshl_b32 s5, s86, 16 +; SI-NEXT: s_and_b32 s4, s65, 0xffff +; SI-NEXT: s_lshl_b32 s5, s48, 16 ; SI-NEXT: s_or_b32 s12, s4, s5 -; SI-NEXT: s_and_b32 s4, s85, 0xffff -; SI-NEXT: s_lshl_b32 s5, s62, 16 +; SI-NEXT: s_and_b32 s4, s80, 0xffff +; SI-NEXT: s_lshl_b32 s5, s78, 16 ; SI-NEXT: s_or_b32 s13, s4, s5 -; SI-NEXT: s_and_b32 s4, s36, 0xffff -; SI-NEXT: s_lshl_b32 s5, s97, 16 +; SI-NEXT: s_and_b32 s4, s84, 0xffff +; SI-NEXT: s_lshl_b32 s5, s50, 16 ; SI-NEXT: s_or_b32 s10, s4, s5 -; SI-NEXT: s_and_b32 s4, s96, 0xffff -; SI-NEXT: s_lshl_b32 s5, s61, 16 +; SI-NEXT: s_and_b32 s4, s82, 0xffff +; SI-NEXT: s_lshl_b32 s5, s77, 16 ; SI-NEXT: s_or_b32 s11, s4, s5 -; SI-NEXT: s_and_b32 s4, s95, 0xffff -; SI-NEXT: s_lshl_b32 s5, s94, 16 +; SI-NEXT: s_and_b32 s4, s96, 0xffff +; SI-NEXT: s_lshl_b32 s5, s86, 16 ; SI-NEXT: s_or_b32 s8, s4, s5 -; SI-NEXT: s_and_b32 s4, s37, 0xffff -; SI-NEXT: s_lshl_b32 s5, s60, 16 +; SI-NEXT: s_and_b32 s4, s35, 0xffff +; SI-NEXT: s_lshl_b32 s5, s76, 16 ; SI-NEXT: s_or_b32 s9, s4, s5 -; SI-NEXT: s_and_b32 s4, s48, 0xffff -; SI-NEXT: s_lshl_b32 s5, s39, 16 +; SI-NEXT: s_and_b32 s4, s54, 0xffff +; SI-NEXT: s_lshl_b32 s5, s98, 16 ; SI-NEXT: s_or_b32 s6, s4, s5 -; SI-NEXT: s_and_b32 s4, s38, 0xffff -; SI-NEXT: s_lshl_b32 s5, s59, 16 +; SI-NEXT: s_and_b32 s4, s52, 0xffff +; SI-NEXT: s_lshl_b32 s5, s75, 16 ; SI-NEXT: s_or_b32 s7, s4, s5 -; SI-NEXT: s_and_b32 s4, s51, 0xffff -; SI-NEXT: s_lshl_b32 s5, s50, 16 +; SI-NEXT: s_and_b32 s4, s83, 0xffff +; SI-NEXT: s_lshl_b32 s5, s71, 16 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s49, 0xffff -; SI-NEXT: s_lshl_b32 vcc_lo, s58, 16 +; SI-NEXT: s_and_b32 s5, s37, 0xffff +; SI-NEXT: s_lshl_b32 vcc_lo, s74, 16 ; SI-NEXT: s_or_b32 s5, s5, vcc_lo -; SI-NEXT: s_lshr_b32 vcc_lo, s99, 8 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 36 -; SI-NEXT: s_lshr_b32 vcc_lo, s83, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 38 -; SI-NEXT: s_lshr_b32 vcc_lo, s65, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 40 -; SI-NEXT: s_lshr_b32 vcc_lo, s89, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 42 -; SI-NEXT: s_lshr_b32 vcc_lo, s57, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 44 -; SI-NEXT: s_lshr_b32 vcc_lo, s77, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 46 -; SI-NEXT: s_lshr_b32 vcc_lo, s47, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 48 -; SI-NEXT: s_lshr_b32 vcc_lo, s45, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 50 -; SI-NEXT: s_lshr_b32 vcc_lo, s43, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 52 -; SI-NEXT: s_lshr_b32 vcc_lo, s41, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 54 -; SI-NEXT: s_lshr_b32 vcc_lo, s15, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 56 -; SI-NEXT: s_lshr_b32 vcc_lo, s13, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 58 -; SI-NEXT: s_lshr_b32 vcc_lo, s11, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 60 -; SI-NEXT: s_lshr_b32 vcc_lo, s9, 8 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 62 -; SI-NEXT: s_lshr_b32 vcc_lo, s7, 8 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_writelane_b32 v23, vcc_lo, 0 -; SI-NEXT: s_bfe_u32 vcc_lo, s93, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 35 -; SI-NEXT: s_bfe_u32 vcc_lo, s92, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 37 -; SI-NEXT: s_bfe_u32 vcc_lo, s91, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 39 -; SI-NEXT: s_bfe_u32 vcc_lo, s90, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 41 -; SI-NEXT: s_bfe_u32 vcc_lo, s79, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 43 -; SI-NEXT: s_bfe_u32 vcc_lo, s78, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 45 -; SI-NEXT: s_bfe_u32 vcc_lo, s75, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 47 -; SI-NEXT: s_bfe_u32 vcc_lo, s74, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 49 -; SI-NEXT: s_bfe_u32 vcc_lo, s73, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 51 -; SI-NEXT: s_bfe_u32 vcc_lo, s72, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 53 -; SI-NEXT: s_bfe_u32 vcc_lo, s63, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 55 -; SI-NEXT: s_bfe_u32 vcc_lo, s62, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 57 -; SI-NEXT: s_bfe_u32 vcc_lo, s61, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 59 -; SI-NEXT: s_bfe_u32 vcc_lo, s60, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 61 -; SI-NEXT: s_bfe_u32 vcc_lo, s59, 0x80008 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 63 -; SI-NEXT: s_bfe_u32 vcc_lo, s58, 0x80008 -; SI-NEXT: v_writelane_b32 v23, vcc_lo, 1 -; SI-NEXT: s_lshr_b64 vcc, s[98:99], 24 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 7 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 8 -; SI-NEXT: s_lshr_b64 vcc, s[98:99], 16 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 5 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 6 -; SI-NEXT: s_lshr_b64 vcc, s[98:99], 8 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 3 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 4 -; SI-NEXT: s_lshr_b64 vcc, s[82:83], 24 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 13 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 14 -; SI-NEXT: s_lshr_b64 vcc, s[82:83], 16 +; SI-NEXT: s_lshr_b64 vcc, s[38:39], 24 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 11 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 12 -; SI-NEXT: s_lshr_b64 vcc, s[82:83], 8 +; SI-NEXT: s_lshr_b64 vcc, s[38:39], 16 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 9 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 10 -; SI-NEXT: s_lshr_b64 vcc, s[64:65], 24 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 19 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 20 -; SI-NEXT: s_lshr_b64 vcc, s[64:65], 16 +; SI-NEXT: s_lshr_b64 vcc, s[38:39], 8 +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 7 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 8 +; SI-NEXT: s_lshr_b64 vcc, s[72:73], 24 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 17 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 18 -; SI-NEXT: s_lshr_b64 vcc, s[64:65], 8 +; SI-NEXT: s_lshr_b64 vcc, s[72:73], 16 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 15 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 16 -; SI-NEXT: s_lshr_b64 vcc, s[88:89], 24 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 25 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 26 -; SI-NEXT: s_lshr_b64 vcc, s[88:89], 16 +; SI-NEXT: s_lshr_b64 vcc, s[72:73], 8 +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 13 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 14 +; SI-NEXT: s_lshr_b64 vcc, s[62:63], 24 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 23 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 24 -; SI-NEXT: s_lshr_b64 vcc, s[88:89], 8 +; SI-NEXT: s_lshr_b64 vcc, s[62:63], 16 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 21 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 22 -; SI-NEXT: s_lshr_b64 vcc, s[56:57], 24 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 31 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 32 -; SI-NEXT: s_lshr_b64 vcc, s[56:57], 16 +; SI-NEXT: s_lshr_b64 vcc, s[62:63], 8 +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 19 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 20 +; SI-NEXT: s_lshr_b64 vcc, s[60:61], 24 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 29 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 30 -; SI-NEXT: s_lshr_b64 vcc, s[56:57], 8 +; SI-NEXT: s_lshr_b64 vcc, s[60:61], 16 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 27 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 28 -; SI-NEXT: s_lshr_b64 vcc, s[76:77], 24 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 37 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 38 -; SI-NEXT: s_lshr_b64 vcc, s[76:77], 16 +; SI-NEXT: s_lshr_b64 vcc, s[60:61], 8 +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 25 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 26 +; SI-NEXT: s_lshr_b64 vcc, s[58:59], 24 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 35 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 36 -; SI-NEXT: s_lshr_b64 vcc, s[76:77], 8 +; SI-NEXT: s_lshr_b64 vcc, s[58:59], 16 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 33 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 34 -; SI-NEXT: s_lshr_b64 vcc, s[46:47], 24 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 43 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 44 -; SI-NEXT: s_lshr_b64 vcc, s[46:47], 16 +; SI-NEXT: s_lshr_b64 vcc, s[58:59], 8 +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 31 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 32 +; SI-NEXT: s_lshr_b64 vcc, s[56:57], 24 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 41 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 42 -; SI-NEXT: s_lshr_b64 vcc, s[46:47], 8 +; SI-NEXT: s_lshr_b64 vcc, s[56:57], 16 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 39 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 40 -; SI-NEXT: s_lshr_b64 vcc, s[44:45], 24 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 49 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 50 -; SI-NEXT: s_lshr_b64 vcc, s[44:45], 16 +; SI-NEXT: s_lshr_b64 vcc, s[56:57], 8 +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 37 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 38 +; SI-NEXT: s_lshr_b64 vcc, s[46:47], 24 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 47 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 48 -; SI-NEXT: s_lshr_b64 vcc, s[44:45], 8 +; SI-NEXT: s_lshr_b64 vcc, s[46:47], 16 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 45 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 46 -; SI-NEXT: s_lshr_b64 vcc, s[42:43], 24 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 55 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 56 -; SI-NEXT: s_lshr_b64 vcc, s[42:43], 16 +; SI-NEXT: s_lshr_b64 vcc, s[46:47], 8 +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 43 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 44 +; SI-NEXT: s_lshr_b64 vcc, s[44:45], 24 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 53 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 54 -; SI-NEXT: s_lshr_b64 vcc, s[42:43], 8 +; SI-NEXT: s_lshr_b64 vcc, s[44:45], 16 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 51 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 52 -; SI-NEXT: s_lshr_b64 vcc, s[40:41], 24 -; SI-NEXT: v_writelane_b32 v21, vcc_lo, 61 -; SI-NEXT: v_writelane_b32 v21, vcc_hi, 62 -; SI-NEXT: s_lshr_b64 vcc, s[40:41], 16 +; SI-NEXT: s_lshr_b64 vcc, s[44:45], 8 +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 49 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 50 +; SI-NEXT: s_lshr_b64 vcc, s[42:43], 24 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 59 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 60 -; SI-NEXT: s_lshr_b64 vcc, s[40:41], 8 +; SI-NEXT: s_lshr_b64 vcc, s[42:43], 16 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 57 ; SI-NEXT: v_writelane_b32 v21, vcc_hi, 58 -; SI-NEXT: s_lshr_b64 vcc, s[14:15], 24 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 3 -; SI-NEXT: v_writelane_b32 v22, vcc_hi, 4 -; SI-NEXT: s_lshr_b64 vcc, s[14:15], 16 +; SI-NEXT: s_lshr_b64 vcc, s[42:43], 8 +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 55 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 56 +; SI-NEXT: s_lshr_b64 vcc, s[40:41], 24 +; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_writelane_b32 v22, vcc_lo, 1 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 2 -; SI-NEXT: s_lshr_b64 vcc, s[14:15], 8 +; SI-NEXT: s_lshr_b64 vcc, s[40:41], 16 ; SI-NEXT: v_writelane_b32 v21, vcc_lo, 63 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 0 -; SI-NEXT: s_lshr_b64 vcc, s[12:13], 24 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 9 -; SI-NEXT: v_writelane_b32 v22, vcc_hi, 10 -; SI-NEXT: s_lshr_b64 vcc, s[12:13], 16 +; SI-NEXT: s_lshr_b64 vcc, s[40:41], 8 +; SI-NEXT: v_writelane_b32 v21, vcc_lo, 61 +; SI-NEXT: v_writelane_b32 v21, vcc_hi, 62 +; SI-NEXT: s_lshr_b64 vcc, s[14:15], 24 ; SI-NEXT: v_writelane_b32 v22, vcc_lo, 7 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 8 -; SI-NEXT: s_lshr_b64 vcc, s[12:13], 8 +; SI-NEXT: s_lshr_b64 vcc, s[14:15], 16 ; SI-NEXT: v_writelane_b32 v22, vcc_lo, 5 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 6 -; SI-NEXT: s_lshr_b64 vcc, s[10:11], 24 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 15 -; SI-NEXT: v_writelane_b32 v22, vcc_hi, 16 -; SI-NEXT: s_lshr_b64 vcc, s[10:11], 16 +; SI-NEXT: s_lshr_b64 vcc, s[14:15], 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 3 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 4 +; SI-NEXT: s_lshr_b64 vcc, s[12:13], 24 ; SI-NEXT: v_writelane_b32 v22, vcc_lo, 13 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 14 -; SI-NEXT: s_lshr_b64 vcc, s[10:11], 8 +; SI-NEXT: s_lshr_b64 vcc, s[12:13], 16 ; SI-NEXT: v_writelane_b32 v22, vcc_lo, 11 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 12 -; SI-NEXT: s_lshr_b64 vcc, s[8:9], 24 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 21 -; SI-NEXT: v_writelane_b32 v22, vcc_hi, 22 -; SI-NEXT: s_lshr_b64 vcc, s[8:9], 16 +; SI-NEXT: s_lshr_b64 vcc, s[12:13], 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 9 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 10 +; SI-NEXT: s_lshr_b64 vcc, s[10:11], 24 ; SI-NEXT: v_writelane_b32 v22, vcc_lo, 19 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 20 -; SI-NEXT: s_lshr_b64 vcc, s[8:9], 8 +; SI-NEXT: s_lshr_b64 vcc, s[10:11], 16 ; SI-NEXT: v_writelane_b32 v22, vcc_lo, 17 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 18 -; SI-NEXT: s_lshr_b64 vcc, s[6:7], 24 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 27 -; SI-NEXT: v_writelane_b32 v22, vcc_hi, 28 -; SI-NEXT: s_lshr_b64 vcc, s[6:7], 16 +; SI-NEXT: s_lshr_b64 vcc, s[10:11], 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 15 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 16 +; SI-NEXT: s_lshr_b64 vcc, s[8:9], 24 ; SI-NEXT: v_writelane_b32 v22, vcc_lo, 25 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 26 -; SI-NEXT: s_lshr_b64 vcc, s[6:7], 8 +; SI-NEXT: s_lshr_b64 vcc, s[8:9], 16 ; SI-NEXT: v_writelane_b32 v22, vcc_lo, 23 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 24 -; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24 -; SI-NEXT: v_writelane_b32 v22, vcc_lo, 33 -; SI-NEXT: v_writelane_b32 v22, vcc_hi, 34 -; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16 +; SI-NEXT: s_lshr_b64 vcc, s[8:9], 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 21 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 22 +; SI-NEXT: s_lshr_b64 vcc, s[6:7], 24 ; SI-NEXT: v_writelane_b32 v22, vcc_lo, 31 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 32 -; SI-NEXT: s_lshr_b64 vcc, s[4:5], 8 +; SI-NEXT: s_lshr_b64 vcc, s[6:7], 16 ; SI-NEXT: v_writelane_b32 v22, vcc_lo, 29 -; SI-NEXT: s_lshr_b32 s52, s5, 8 ; SI-NEXT: v_writelane_b32 v22, vcc_hi, 30 +; SI-NEXT: s_lshr_b64 vcc, s[6:7], 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 27 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 28 +; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 37 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 38 +; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 35 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 36 +; SI-NEXT: s_lshr_b64 vcc, s[4:5], 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 33 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 34 +; SI-NEXT: s_lshr_b32 vcc_lo, s63, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 39 +; SI-NEXT: s_lshr_b32 vcc_lo, s61, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 41 +; SI-NEXT: s_lshr_b32 vcc_lo, s59, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 43 +; SI-NEXT: s_lshr_b32 vcc_lo, s57, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 45 +; SI-NEXT: s_lshr_b32 vcc_lo, s47, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 47 +; SI-NEXT: s_lshr_b32 vcc_lo, s45, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 49 +; SI-NEXT: s_lshr_b32 vcc_lo, s43, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 51 +; SI-NEXT: s_lshr_b32 vcc_lo, s41, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 53 +; SI-NEXT: s_lshr_b32 vcc_lo, s15, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 55 +; SI-NEXT: s_lshr_b32 vcc_lo, s13, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 57 +; SI-NEXT: s_lshr_b32 vcc_lo, s11, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 59 +; SI-NEXT: s_lshr_b32 vcc_lo, s9, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 61 +; SI-NEXT: s_lshr_b32 vcc_lo, s7, 8 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 63 +; SI-NEXT: s_lshr_b32 vcc_lo, s5, 8 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_writelane_b32 v23, vcc_lo, 1 +; SI-NEXT: s_bfe_u32 vcc_lo, s94, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 40 +; SI-NEXT: s_bfe_u32 vcc_lo, s93, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 42 +; SI-NEXT: s_bfe_u32 vcc_lo, s89, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 44 +; SI-NEXT: s_bfe_u32 vcc_lo, s88, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 46 +; SI-NEXT: s_bfe_u32 vcc_lo, s92, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 48 +; SI-NEXT: s_bfe_u32 vcc_lo, s91, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 50 +; SI-NEXT: s_bfe_u32 vcc_lo, s90, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 52 +; SI-NEXT: s_bfe_u32 vcc_lo, s79, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 54 +; SI-NEXT: s_bfe_u32 vcc_lo, s78, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 56 +; SI-NEXT: s_bfe_u32 vcc_lo, s77, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 58 +; SI-NEXT: s_bfe_u32 vcc_lo, s76, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 60 +; SI-NEXT: s_bfe_u32 vcc_lo, s75, 0x80008 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 62 +; SI-NEXT: s_bfe_u32 vcc_lo, s74, 0x80008 +; SI-NEXT: s_lshr_b32 s99, s39, 8 +; SI-NEXT: s_lshr_b32 s97, s73, 8 +; SI-NEXT: s_bfe_u32 s81, s31, 0x80008 +; SI-NEXT: s_bfe_u32 s87, s30, 0x80008 +; SI-NEXT: s_bfe_u32 s85, s95, 0x80008 +; SI-NEXT: v_writelane_b32 v23, vcc_lo, 0 ; SI-NEXT: s_cbranch_execnz .LBB99_3 ; SI-NEXT: .LBB99_2: ; %cmp.true -; SI-NEXT: s_add_i32 s51, s51, 3 -; SI-NEXT: s_and_b32 s4, s51, 0xffff -; SI-NEXT: s_lshl_b32 s5, s50, 16 -; SI-NEXT: s_add_i32 s49, s49, 3 +; SI-NEXT: s_add_i32 s83, s83, 3 +; SI-NEXT: s_and_b32 s4, s83, 0xffff +; SI-NEXT: s_lshl_b32 s5, s71, 16 +; SI-NEXT: s_add_i32 s37, s37, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s49, 0xffff -; SI-NEXT: s_lshl_b32 s6, s58, 16 -; SI-NEXT: s_add_i32 s48, s48, 3 +; SI-NEXT: s_and_b32 s5, s37, 0xffff +; SI-NEXT: s_lshl_b32 s6, s74, 16 +; SI-NEXT: s_add_i32 s54, s54, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s48, 0xffff -; SI-NEXT: s_lshl_b32 s7, s39, 16 -; SI-NEXT: s_add_i32 s38, s38, 3 +; SI-NEXT: s_and_b32 s6, s54, 0xffff +; SI-NEXT: s_lshl_b32 s7, s98, 16 +; SI-NEXT: s_add_i32 s52, s52, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s38, 0xffff -; SI-NEXT: s_lshl_b32 s8, s59, 16 -; SI-NEXT: s_add_i32 s95, s95, 3 +; SI-NEXT: s_and_b32 s7, s52, 0xffff +; SI-NEXT: s_lshl_b32 s8, s75, 16 +; SI-NEXT: s_add_i32 s96, s96, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s95, 0xffff -; SI-NEXT: s_lshl_b32 s9, s94, 16 -; SI-NEXT: s_add_i32 s37, s37, 3 +; SI-NEXT: s_and_b32 s8, s96, 0xffff +; SI-NEXT: s_lshl_b32 s9, s86, 16 +; SI-NEXT: s_add_i32 s35, s35, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s37, 0xffff -; SI-NEXT: s_lshl_b32 s10, s60, 16 -; SI-NEXT: s_add_i32 s36, s36, 3 +; SI-NEXT: s_and_b32 s9, s35, 0xffff +; SI-NEXT: s_lshl_b32 s10, s76, 16 +; SI-NEXT: s_add_i32 s84, s84, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s36, 0xffff -; SI-NEXT: s_lshl_b32 s11, s97, 16 -; SI-NEXT: s_add_i32 s96, s96, 3 +; SI-NEXT: s_and_b32 s10, s84, 0xffff +; SI-NEXT: s_lshl_b32 s11, s50, 16 +; SI-NEXT: s_add_i32 s82, s82, 3 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s96, 0xffff -; SI-NEXT: s_lshl_b32 s12, s61, 16 -; SI-NEXT: s_add_i32 s87, s87, 3 +; SI-NEXT: s_and_b32 s11, s82, 0xffff +; SI-NEXT: s_lshl_b32 s12, s77, 16 +; SI-NEXT: s_add_i32 s65, s65, 3 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s12, s87, 0xffff -; SI-NEXT: s_lshl_b32 s13, s86, 16 -; SI-NEXT: s_add_i32 s85, s85, 3 +; SI-NEXT: s_and_b32 s12, s65, 0xffff +; SI-NEXT: s_lshl_b32 s13, s48, 16 +; SI-NEXT: s_add_i32 s80, s80, 3 ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s13, s85, 0xffff -; SI-NEXT: s_lshl_b32 s14, s62, 16 -; SI-NEXT: s_add_i32 s84, s84, 3 +; SI-NEXT: s_and_b32 s13, s80, 0xffff +; SI-NEXT: s_lshl_b32 s14, s78, 16 +; SI-NEXT: s_add_i32 s55, s55, 3 ; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: s_and_b32 s14, s84, 0xffff -; SI-NEXT: s_lshl_b32 s15, s35, 16 -; SI-NEXT: s_add_i32 s34, s34, 3 +; SI-NEXT: s_and_b32 s14, s55, 0xffff +; SI-NEXT: s_lshl_b32 s15, s36, 16 +; SI-NEXT: s_add_i32 s70, s70, 3 ; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_and_b32 s15, s34, 0xffff -; SI-NEXT: s_lshl_b32 s40, s63, 16 -; SI-NEXT: s_add_i32 s81, s81, 3 +; SI-NEXT: s_and_b32 s15, s70, 0xffff +; SI-NEXT: s_lshl_b32 s40, s79, 16 +; SI-NEXT: s_add_i32 s69, s69, 3 ; SI-NEXT: s_or_b32 s15, s40, s15 -; SI-NEXT: s_and_b32 s40, s81, 0xffff -; SI-NEXT: s_lshl_b32 s41, s80, 16 -; SI-NEXT: s_add_i32 s71, s71, 3 +; SI-NEXT: s_and_b32 s40, s69, 0xffff +; SI-NEXT: s_lshl_b32 s41, s68, 16 +; SI-NEXT: s_add_i32 s67, s67, 3 ; SI-NEXT: s_or_b32 s40, s41, s40 -; SI-NEXT: s_and_b32 s41, s71, 0xffff -; SI-NEXT: s_lshl_b32 s42, s72, 16 -; SI-NEXT: s_add_i32 s70, s70, 3 +; SI-NEXT: s_and_b32 s41, s67, 0xffff +; SI-NEXT: s_lshl_b32 s42, s90, 16 +; SI-NEXT: s_add_i32 s66, s66, 3 ; SI-NEXT: s_or_b32 s41, s42, s41 -; SI-NEXT: s_and_b32 s42, s70, 0xffff -; SI-NEXT: s_lshl_b32 s43, s69, 16 -; SI-NEXT: s_add_i32 s68, s68, 3 +; SI-NEXT: s_and_b32 s42, s66, 0xffff +; SI-NEXT: s_lshl_b32 s43, s34, 16 +; SI-NEXT: s_add_i32 s53, s53, 3 ; SI-NEXT: s_or_b32 s42, s43, s42 -; SI-NEXT: s_and_b32 s43, s68, 0xffff -; SI-NEXT: s_lshl_b32 s44, s73, 16 -; SI-NEXT: s_add_i32 s31, s31, 3 +; SI-NEXT: s_and_b32 s43, s53, 0xffff +; SI-NEXT: s_lshl_b32 s44, s91, 16 +; SI-NEXT: s_add_i32 s51, s51, 3 ; SI-NEXT: s_or_b32 s43, s44, s43 -; SI-NEXT: s_and_b32 s44, s31, 0xffff -; SI-NEXT: s_lshl_b32 s45, s30, 16 -; SI-NEXT: s_add_i32 s67, s67, 3 +; SI-NEXT: s_and_b32 s44, s51, 0xffff +; SI-NEXT: s_lshl_b32 s45, s64, 16 +; SI-NEXT: s_add_i32 s49, s49, 3 ; SI-NEXT: s_or_b32 s44, s45, s44 -; SI-NEXT: s_and_b32 s45, s67, 0xffff -; SI-NEXT: s_lshl_b32 s46, s74, 16 -; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: s_and_b32 s45, s49, 0xffff +; SI-NEXT: s_lshl_b32 s46, s92, 16 ; SI-NEXT: s_or_b32 s45, s46, s45 +; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: v_readlane_b32 s46, v21, 6 ; SI-NEXT: s_and_b32 s28, s28, 0xffff -; SI-NEXT: s_lshl_b32 s46, s66, 16 +; SI-NEXT: s_lshl_b32 s46, s46, 16 ; SI-NEXT: s_or_b32 s28, s46, s28 ; SI-NEXT: s_add_i32 s29, s29, 3 ; SI-NEXT: s_add_i32 s46, s28, 0x30000 ; SI-NEXT: s_and_b32 s28, s29, 0xffff -; SI-NEXT: s_lshl_b32 s29, s75, 16 +; SI-NEXT: s_lshl_b32 s29, s88, 16 ; SI-NEXT: s_or_b32 s28, s29, s28 -; SI-NEXT: s_add_i32 s26, s26, 3 ; SI-NEXT: s_add_i32 s47, s28, 0x30000 +; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: v_readlane_b32 s28, v21, 5 ; SI-NEXT: s_and_b32 s26, s26, 0xffff -; SI-NEXT: s_lshl_b32 s28, s55, 16 +; SI-NEXT: s_lshl_b32 s28, s28, 16 ; SI-NEXT: s_or_b32 s26, s28, s26 ; SI-NEXT: s_add_i32 s27, s27, 3 -; SI-NEXT: s_add_i32 s76, s26, 0x30000 +; SI-NEXT: s_add_i32 s56, s26, 0x30000 ; SI-NEXT: s_and_b32 s26, s27, 0xffff -; SI-NEXT: s_lshl_b32 s27, s78, 16 +; SI-NEXT: s_lshl_b32 s27, s89, 16 ; SI-NEXT: s_or_b32 s26, s27, s26 +; SI-NEXT: s_add_i32 s57, s26, 0x30000 ; SI-NEXT: s_add_i32 s24, s24, 3 -; SI-NEXT: s_add_i32 s77, s26, 0x30000 +; SI-NEXT: v_readlane_b32 s26, v21, 4 ; SI-NEXT: s_and_b32 s24, s24, 0xffff -; SI-NEXT: s_lshl_b32 s26, s54, 16 +; SI-NEXT: s_lshl_b32 s26, s26, 16 ; SI-NEXT: s_or_b32 s24, s26, s24 ; SI-NEXT: s_add_i32 s25, s25, 3 -; SI-NEXT: s_add_i32 s56, s24, 0x30000 +; SI-NEXT: s_add_i32 s58, s24, 0x30000 ; SI-NEXT: s_and_b32 s24, s25, 0xffff -; SI-NEXT: s_lshl_b32 s25, s79, 16 +; SI-NEXT: s_lshl_b32 s25, s93, 16 ; SI-NEXT: s_or_b32 s24, s25, s24 -; SI-NEXT: s_add_i32 s57, s24, 0x30000 +; SI-NEXT: s_add_i32 s59, s24, 0x30000 ; SI-NEXT: s_add_i32 s22, s22, 3 -; SI-NEXT: v_readlane_b32 s24, v21, 2 +; SI-NEXT: v_readlane_b32 s24, v21, 3 ; SI-NEXT: s_and_b32 s22, s22, 0xffff ; SI-NEXT: s_lshl_b32 s24, s24, 16 ; SI-NEXT: s_or_b32 s22, s24, s22 ; SI-NEXT: s_add_i32 s23, s23, 3 -; SI-NEXT: s_add_i32 s88, s22, 0x30000 +; SI-NEXT: s_add_i32 s60, s22, 0x30000 ; SI-NEXT: s_and_b32 s22, s23, 0xffff -; SI-NEXT: s_lshl_b32 s23, s90, 16 +; SI-NEXT: s_lshl_b32 s23, s94, 16 ; SI-NEXT: s_or_b32 s22, s23, s22 +; SI-NEXT: s_add_i32 s61, s22, 0x30000 ; SI-NEXT: s_add_i32 s20, s20, 3 -; SI-NEXT: s_add_i32 s89, s22, 0x30000 +; SI-NEXT: v_readlane_b32 s22, v21, 2 ; SI-NEXT: s_and_b32 s20, s20, 0xffff -; SI-NEXT: s_lshl_b32 s22, s53, 16 +; SI-NEXT: s_lshl_b32 s22, s22, 16 ; SI-NEXT: s_or_b32 s20, s22, s20 ; SI-NEXT: s_add_i32 s21, s21, 3 -; SI-NEXT: s_add_i32 s64, s20, 0x30000 +; SI-NEXT: s_add_i32 s62, s20, 0x30000 ; SI-NEXT: s_and_b32 s20, s21, 0xffff -; SI-NEXT: s_lshl_b32 s21, s91, 16 +; SI-NEXT: s_lshl_b32 s21, s95, 16 ; SI-NEXT: s_or_b32 s20, s21, s20 -; SI-NEXT: s_add_i32 s65, s20, 0x30000 +; SI-NEXT: s_add_i32 s63, s20, 0x30000 ; SI-NEXT: s_add_i32 s18, s18, 3 ; SI-NEXT: v_readlane_b32 s20, v21, 1 ; SI-NEXT: s_and_b32 s18, s18, 0xffff ; SI-NEXT: s_lshl_b32 s20, s20, 16 ; SI-NEXT: s_or_b32 s18, s20, s18 ; SI-NEXT: s_add_i32 s19, s19, 3 -; SI-NEXT: s_add_i32 s82, s18, 0x30000 +; SI-NEXT: s_add_i32 s72, s18, 0x30000 ; SI-NEXT: s_and_b32 s18, s19, 0xffff -; SI-NEXT: s_lshl_b32 s19, s92, 16 +; SI-NEXT: s_lshl_b32 s19, s30, 16 ; SI-NEXT: s_or_b32 s18, s19, s18 -; SI-NEXT: s_add_i32 s83, s18, 0x30000 +; SI-NEXT: s_add_i32 s73, s18, 0x30000 ; SI-NEXT: s_add_i32 s16, s16, 3 ; SI-NEXT: v_readlane_b32 s18, v21, 0 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_lshl_b32 s18, s18, 16 ; SI-NEXT: s_or_b32 s16, s18, s16 ; SI-NEXT: s_add_i32 s17, s17, 3 -; SI-NEXT: s_add_i32 s98, s16, 0x30000 +; SI-NEXT: s_add_i32 s38, s16, 0x30000 ; SI-NEXT: s_and_b32 s16, s17, 0xffff -; SI-NEXT: s_lshl_b32 s17, s93, 16 +; SI-NEXT: s_lshl_b32 s17, s31, 16 ; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s99, s16, 0x30000 -; SI-NEXT: s_lshr_b64 s[16:17], s[98:99], 24 -; SI-NEXT: v_writelane_b32 v21, s16, 7 -; SI-NEXT: v_writelane_b32 v21, s17, 8 -; SI-NEXT: s_lshr_b64 s[16:17], s[98:99], 16 -; SI-NEXT: v_writelane_b32 v21, s16, 5 -; SI-NEXT: v_writelane_b32 v21, s17, 6 -; SI-NEXT: s_lshr_b64 s[16:17], s[98:99], 8 -; SI-NEXT: v_writelane_b32 v21, s16, 3 -; SI-NEXT: v_writelane_b32 v21, s17, 4 -; SI-NEXT: s_lshr_b64 s[16:17], s[82:83], 24 -; SI-NEXT: v_writelane_b32 v21, s16, 13 -; SI-NEXT: v_writelane_b32 v21, s17, 14 -; SI-NEXT: s_lshr_b64 s[16:17], s[82:83], 16 +; SI-NEXT: s_add_i32 s39, s16, 0x30000 +; SI-NEXT: s_lshr_b64 s[16:17], s[38:39], 24 ; SI-NEXT: v_writelane_b32 v21, s16, 11 ; SI-NEXT: v_writelane_b32 v21, s17, 12 -; SI-NEXT: s_lshr_b64 s[16:17], s[82:83], 8 +; SI-NEXT: s_lshr_b64 s[16:17], s[38:39], 16 ; SI-NEXT: v_writelane_b32 v21, s16, 9 ; SI-NEXT: v_writelane_b32 v21, s17, 10 -; SI-NEXT: s_lshr_b64 s[16:17], s[64:65], 24 -; SI-NEXT: v_writelane_b32 v21, s16, 19 -; SI-NEXT: v_writelane_b32 v21, s17, 20 -; SI-NEXT: s_lshr_b64 s[16:17], s[64:65], 16 +; SI-NEXT: s_lshr_b64 s[16:17], s[38:39], 8 +; SI-NEXT: v_writelane_b32 v21, s16, 7 +; SI-NEXT: v_writelane_b32 v21, s17, 8 +; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 24 ; SI-NEXT: v_writelane_b32 v21, s16, 17 ; SI-NEXT: v_writelane_b32 v21, s17, 18 -; SI-NEXT: s_lshr_b64 s[16:17], s[64:65], 8 +; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 16 ; SI-NEXT: v_writelane_b32 v21, s16, 15 ; SI-NEXT: v_writelane_b32 v21, s17, 16 -; SI-NEXT: s_lshr_b64 s[16:17], s[88:89], 24 -; SI-NEXT: v_writelane_b32 v21, s16, 25 -; SI-NEXT: v_writelane_b32 v21, s17, 26 -; SI-NEXT: s_lshr_b64 s[16:17], s[88:89], 16 +; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 8 +; SI-NEXT: v_writelane_b32 v21, s16, 13 +; SI-NEXT: v_writelane_b32 v21, s17, 14 +; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 24 ; SI-NEXT: v_writelane_b32 v21, s16, 23 ; SI-NEXT: v_writelane_b32 v21, s17, 24 -; SI-NEXT: s_lshr_b64 s[16:17], s[88:89], 8 +; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16 ; SI-NEXT: v_writelane_b32 v21, s16, 21 ; SI-NEXT: v_writelane_b32 v21, s17, 22 -; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 24 -; SI-NEXT: v_writelane_b32 v21, s16, 31 -; SI-NEXT: v_writelane_b32 v21, s17, 32 -; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16 +; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 8 +; SI-NEXT: v_writelane_b32 v21, s16, 19 +; SI-NEXT: v_writelane_b32 v21, s17, 20 +; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 24 ; SI-NEXT: v_writelane_b32 v21, s16, 29 ; SI-NEXT: v_writelane_b32 v21, s17, 30 -; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 8 +; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16 ; SI-NEXT: v_writelane_b32 v21, s16, 27 ; SI-NEXT: v_writelane_b32 v21, s17, 28 -; SI-NEXT: s_lshr_b64 s[16:17], s[76:77], 24 -; SI-NEXT: v_writelane_b32 v21, s16, 37 -; SI-NEXT: v_writelane_b32 v21, s17, 38 -; SI-NEXT: s_lshr_b64 s[16:17], s[76:77], 16 +; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 8 +; SI-NEXT: v_writelane_b32 v21, s16, 25 +; SI-NEXT: v_writelane_b32 v21, s17, 26 +; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 24 ; SI-NEXT: v_writelane_b32 v21, s16, 35 ; SI-NEXT: v_writelane_b32 v21, s17, 36 -; SI-NEXT: s_lshr_b64 s[16:17], s[76:77], 8 +; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 16 ; SI-NEXT: v_writelane_b32 v21, s16, 33 ; SI-NEXT: v_writelane_b32 v21, s17, 34 -; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 24 -; SI-NEXT: v_writelane_b32 v21, s16, 43 -; SI-NEXT: v_writelane_b32 v21, s17, 44 -; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 16 +; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 8 +; SI-NEXT: v_writelane_b32 v21, s16, 31 +; SI-NEXT: v_writelane_b32 v21, s17, 32 +; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 24 ; SI-NEXT: v_writelane_b32 v21, s16, 41 ; SI-NEXT: v_writelane_b32 v21, s17, 42 +; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16 +; SI-NEXT: v_writelane_b32 v21, s16, 39 +; SI-NEXT: v_writelane_b32 v21, s17, 40 +; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 8 +; SI-NEXT: v_writelane_b32 v21, s16, 37 +; SI-NEXT: v_writelane_b32 v21, s17, 38 +; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 24 +; SI-NEXT: v_writelane_b32 v21, s16, 47 +; SI-NEXT: v_writelane_b32 v21, s17, 48 +; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 16 +; SI-NEXT: v_writelane_b32 v21, s16, 45 +; SI-NEXT: v_writelane_b32 v21, s17, 46 ; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 8 ; SI-NEXT: s_add_i32 s44, s44, 0x30000 ; SI-NEXT: s_add_i32 s45, s45, 0x30000 -; SI-NEXT: v_writelane_b32 v21, s16, 39 -; SI-NEXT: v_writelane_b32 v21, s17, 40 +; SI-NEXT: v_writelane_b32 v21, s16, 43 +; SI-NEXT: v_writelane_b32 v21, s17, 44 ; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 24 -; SI-NEXT: v_writelane_b32 v21, s16, 49 -; SI-NEXT: v_writelane_b32 v21, s17, 50 +; SI-NEXT: v_writelane_b32 v21, s16, 53 +; SI-NEXT: v_writelane_b32 v21, s17, 54 ; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 16 -; SI-NEXT: v_writelane_b32 v21, s16, 47 -; SI-NEXT: v_writelane_b32 v21, s17, 48 +; SI-NEXT: v_writelane_b32 v21, s16, 51 +; SI-NEXT: v_writelane_b32 v21, s17, 52 ; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 8 ; SI-NEXT: s_add_i32 s42, s42, 0x30000 ; SI-NEXT: s_add_i32 s43, s43, 0x30000 -; SI-NEXT: v_writelane_b32 v21, s16, 45 -; SI-NEXT: v_writelane_b32 v21, s17, 46 +; SI-NEXT: v_writelane_b32 v21, s16, 49 +; SI-NEXT: v_writelane_b32 v21, s17, 50 ; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 24 -; SI-NEXT: v_writelane_b32 v21, s16, 55 -; SI-NEXT: v_writelane_b32 v21, s17, 56 +; SI-NEXT: v_writelane_b32 v21, s16, 59 +; SI-NEXT: v_writelane_b32 v21, s17, 60 ; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16 -; SI-NEXT: v_writelane_b32 v21, s16, 53 -; SI-NEXT: v_writelane_b32 v21, s17, 54 +; SI-NEXT: v_writelane_b32 v21, s16, 57 +; SI-NEXT: v_writelane_b32 v21, s17, 58 ; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 8 ; SI-NEXT: s_add_i32 s40, s40, 0x30000 ; SI-NEXT: s_add_i32 s41, s41, 0x30000 -; SI-NEXT: v_writelane_b32 v21, s16, 51 -; SI-NEXT: v_writelane_b32 v21, s17, 52 +; SI-NEXT: v_writelane_b32 v21, s16, 55 +; SI-NEXT: v_writelane_b32 v21, s17, 56 ; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 24 -; SI-NEXT: v_writelane_b32 v21, s16, 61 -; SI-NEXT: v_writelane_b32 v21, s17, 62 +; SI-NEXT: v_writelane_b32 v22, s16, 1 +; SI-NEXT: v_writelane_b32 v22, s17, 2 ; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 16 -; SI-NEXT: v_writelane_b32 v21, s16, 59 -; SI-NEXT: v_writelane_b32 v21, s17, 60 +; SI-NEXT: v_writelane_b32 v21, s16, 63 +; SI-NEXT: v_writelane_b32 v22, s17, 0 ; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 8 ; SI-NEXT: s_add_i32 s14, s14, 0x30000 ; SI-NEXT: s_add_i32 s15, s15, 0x30000 -; SI-NEXT: v_writelane_b32 v21, s16, 57 -; SI-NEXT: v_writelane_b32 v21, s17, 58 +; SI-NEXT: v_writelane_b32 v21, s16, 61 +; SI-NEXT: v_writelane_b32 v21, s17, 62 ; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 24 -; SI-NEXT: v_writelane_b32 v22, s16, 3 -; SI-NEXT: v_writelane_b32 v22, s17, 4 +; SI-NEXT: v_writelane_b32 v22, s16, 7 +; SI-NEXT: v_writelane_b32 v22, s17, 8 ; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 16 -; SI-NEXT: v_writelane_b32 v22, s16, 1 -; SI-NEXT: v_writelane_b32 v22, s17, 2 +; SI-NEXT: v_writelane_b32 v22, s16, 5 +; SI-NEXT: v_writelane_b32 v22, s17, 6 ; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 8 ; SI-NEXT: s_add_i32 s12, s12, 0x30000 ; SI-NEXT: s_add_i32 s13, s13, 0x30000 -; SI-NEXT: v_writelane_b32 v21, s16, 63 -; SI-NEXT: v_writelane_b32 v22, s17, 0 +; SI-NEXT: v_writelane_b32 v22, s16, 3 +; SI-NEXT: v_writelane_b32 v22, s17, 4 ; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 24 -; SI-NEXT: v_writelane_b32 v22, s16, 9 -; SI-NEXT: v_writelane_b32 v22, s17, 10 +; SI-NEXT: v_writelane_b32 v22, s16, 13 +; SI-NEXT: v_writelane_b32 v22, s17, 14 ; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 16 -; SI-NEXT: v_writelane_b32 v22, s16, 7 -; SI-NEXT: v_writelane_b32 v22, s17, 8 +; SI-NEXT: v_writelane_b32 v22, s16, 11 +; SI-NEXT: v_writelane_b32 v22, s17, 12 ; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 8 ; SI-NEXT: s_add_i32 s10, s10, 0x30000 ; SI-NEXT: s_add_i32 s11, s11, 0x30000 -; SI-NEXT: v_writelane_b32 v22, s16, 5 -; SI-NEXT: v_writelane_b32 v22, s17, 6 +; SI-NEXT: v_writelane_b32 v22, s16, 9 +; SI-NEXT: v_writelane_b32 v22, s17, 10 ; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 24 -; SI-NEXT: v_writelane_b32 v22, s16, 15 -; SI-NEXT: v_writelane_b32 v22, s17, 16 +; SI-NEXT: v_writelane_b32 v22, s16, 19 +; SI-NEXT: v_writelane_b32 v22, s17, 20 ; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16 -; SI-NEXT: v_writelane_b32 v22, s16, 13 -; SI-NEXT: v_writelane_b32 v22, s17, 14 +; SI-NEXT: v_writelane_b32 v22, s16, 17 +; SI-NEXT: v_writelane_b32 v22, s17, 18 ; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 8 ; SI-NEXT: s_add_i32 s8, s8, 0x30000 ; SI-NEXT: s_add_i32 s9, s9, 0x30000 -; SI-NEXT: v_writelane_b32 v22, s16, 11 -; SI-NEXT: v_writelane_b32 v22, s17, 12 +; SI-NEXT: v_writelane_b32 v22, s16, 15 +; SI-NEXT: v_writelane_b32 v22, s17, 16 ; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 24 -; SI-NEXT: v_writelane_b32 v22, s16, 21 -; SI-NEXT: v_writelane_b32 v22, s17, 22 +; SI-NEXT: v_writelane_b32 v22, s16, 25 +; SI-NEXT: v_writelane_b32 v22, s17, 26 ; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16 -; SI-NEXT: v_writelane_b32 v22, s16, 19 -; SI-NEXT: v_writelane_b32 v22, s17, 20 +; SI-NEXT: v_writelane_b32 v22, s16, 23 +; SI-NEXT: v_writelane_b32 v22, s17, 24 ; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 8 ; SI-NEXT: s_add_i32 s6, s6, 0x30000 ; SI-NEXT: s_add_i32 s7, s7, 0x30000 -; SI-NEXT: v_writelane_b32 v22, s16, 17 -; SI-NEXT: v_writelane_b32 v22, s17, 18 +; SI-NEXT: v_writelane_b32 v22, s16, 21 +; SI-NEXT: v_writelane_b32 v22, s17, 22 ; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 24 -; SI-NEXT: v_writelane_b32 v22, s16, 27 -; SI-NEXT: v_writelane_b32 v22, s17, 28 +; SI-NEXT: v_writelane_b32 v22, s16, 31 +; SI-NEXT: v_writelane_b32 v22, s17, 32 ; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 16 -; SI-NEXT: v_writelane_b32 v22, s16, 25 -; SI-NEXT: v_writelane_b32 v22, s17, 26 +; SI-NEXT: v_writelane_b32 v22, s16, 29 +; SI-NEXT: v_writelane_b32 v22, s17, 30 ; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 8 ; SI-NEXT: s_add_i32 s4, s4, 0x30000 ; SI-NEXT: s_add_i32 s5, s5, 0x30000 -; SI-NEXT: v_writelane_b32 v22, s16, 23 -; SI-NEXT: v_writelane_b32 v22, s17, 24 +; SI-NEXT: v_writelane_b32 v22, s16, 27 +; SI-NEXT: v_writelane_b32 v22, s17, 28 ; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 24 -; SI-NEXT: v_writelane_b32 v22, s16, 33 -; SI-NEXT: v_writelane_b32 v22, s17, 34 +; SI-NEXT: v_writelane_b32 v22, s16, 37 +; SI-NEXT: v_writelane_b32 v22, s17, 38 ; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16 -; SI-NEXT: v_writelane_b32 v22, s16, 31 -; SI-NEXT: v_writelane_b32 v22, s17, 32 -; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 8 -; SI-NEXT: v_writelane_b32 v22, s16, 29 -; SI-NEXT: v_writelane_b32 v22, s17, 30 -; SI-NEXT: s_lshr_b32 s16, s99, 24 ; SI-NEXT: v_writelane_b32 v22, s16, 35 -; SI-NEXT: s_lshr_b32 s16, s99, 8 -; SI-NEXT: v_writelane_b32 v22, s16, 36 -; SI-NEXT: s_lshr_b32 s16, s83, 24 -; SI-NEXT: v_writelane_b32 v22, s16, 37 -; SI-NEXT: s_lshr_b32 s16, s83, 8 -; SI-NEXT: v_writelane_b32 v22, s16, 38 -; SI-NEXT: s_lshr_b32 s16, s65, 24 +; SI-NEXT: v_writelane_b32 v22, s17, 36 +; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 8 +; SI-NEXT: v_writelane_b32 v22, s16, 33 +; SI-NEXT: v_writelane_b32 v22, s17, 34 +; SI-NEXT: s_lshr_b32 s16, s63, 8 ; SI-NEXT: v_writelane_b32 v22, s16, 39 -; SI-NEXT: s_lshr_b32 s16, s65, 8 +; SI-NEXT: s_lshr_b32 s16, s61, 24 ; SI-NEXT: v_writelane_b32 v22, s16, 40 -; SI-NEXT: s_lshr_b32 s16, s89, 24 +; SI-NEXT: s_lshr_b32 s16, s61, 8 ; SI-NEXT: v_writelane_b32 v22, s16, 41 -; SI-NEXT: s_lshr_b32 s16, s89, 8 +; SI-NEXT: s_lshr_b32 s16, s59, 24 ; SI-NEXT: v_writelane_b32 v22, s16, 42 -; SI-NEXT: s_lshr_b32 s16, s57, 24 +; SI-NEXT: s_lshr_b32 s16, s59, 8 ; SI-NEXT: v_writelane_b32 v22, s16, 43 -; SI-NEXT: s_lshr_b32 s16, s57, 8 +; SI-NEXT: s_lshr_b32 s16, s57, 24 ; SI-NEXT: v_writelane_b32 v22, s16, 44 -; SI-NEXT: s_lshr_b32 s16, s77, 24 +; SI-NEXT: s_lshr_b32 s16, s57, 8 ; SI-NEXT: v_writelane_b32 v22, s16, 45 -; SI-NEXT: s_lshr_b32 s16, s77, 8 -; SI-NEXT: v_writelane_b32 v22, s16, 46 ; SI-NEXT: s_lshr_b32 s16, s47, 24 -; SI-NEXT: v_writelane_b32 v22, s16, 47 +; SI-NEXT: v_writelane_b32 v22, s16, 46 ; SI-NEXT: s_lshr_b32 s16, s47, 8 -; SI-NEXT: v_writelane_b32 v22, s16, 48 +; SI-NEXT: v_writelane_b32 v22, s16, 47 ; SI-NEXT: s_lshr_b32 s16, s45, 24 -; SI-NEXT: v_writelane_b32 v22, s16, 49 +; SI-NEXT: v_writelane_b32 v22, s16, 48 ; SI-NEXT: s_lshr_b32 s16, s45, 8 -; SI-NEXT: v_writelane_b32 v22, s16, 50 +; SI-NEXT: v_writelane_b32 v22, s16, 49 ; SI-NEXT: s_lshr_b32 s16, s43, 24 -; SI-NEXT: v_writelane_b32 v22, s16, 51 +; SI-NEXT: v_writelane_b32 v22, s16, 50 ; SI-NEXT: s_lshr_b32 s16, s43, 8 -; SI-NEXT: v_writelane_b32 v22, s16, 52 +; SI-NEXT: v_writelane_b32 v22, s16, 51 ; SI-NEXT: s_lshr_b32 s16, s41, 24 -; SI-NEXT: v_writelane_b32 v22, s16, 53 +; SI-NEXT: v_writelane_b32 v22, s16, 52 ; SI-NEXT: s_lshr_b32 s16, s41, 8 -; SI-NEXT: v_writelane_b32 v22, s16, 54 +; SI-NEXT: v_writelane_b32 v22, s16, 53 ; SI-NEXT: s_lshr_b32 s16, s15, 24 -; SI-NEXT: v_writelane_b32 v22, s16, 55 +; SI-NEXT: v_writelane_b32 v22, s16, 54 ; SI-NEXT: s_lshr_b32 s16, s15, 8 -; SI-NEXT: v_writelane_b32 v22, s16, 56 +; SI-NEXT: v_writelane_b32 v22, s16, 55 ; SI-NEXT: s_lshr_b32 s16, s13, 24 -; SI-NEXT: v_writelane_b32 v22, s16, 57 +; SI-NEXT: v_writelane_b32 v22, s16, 56 ; SI-NEXT: s_lshr_b32 s16, s13, 8 -; SI-NEXT: v_writelane_b32 v22, s16, 58 +; SI-NEXT: v_writelane_b32 v22, s16, 57 ; SI-NEXT: s_lshr_b32 s16, s11, 24 -; SI-NEXT: v_writelane_b32 v22, s16, 59 +; SI-NEXT: v_writelane_b32 v22, s16, 58 ; SI-NEXT: s_lshr_b32 s16, s11, 8 -; SI-NEXT: v_writelane_b32 v22, s16, 60 +; SI-NEXT: v_writelane_b32 v22, s16, 59 ; SI-NEXT: s_lshr_b32 s16, s9, 24 -; SI-NEXT: v_writelane_b32 v22, s16, 61 +; SI-NEXT: v_writelane_b32 v22, s16, 60 ; SI-NEXT: s_lshr_b32 s16, s9, 8 -; SI-NEXT: v_writelane_b32 v22, s16, 62 +; SI-NEXT: v_writelane_b32 v22, s16, 61 ; SI-NEXT: s_lshr_b32 s16, s7, 24 -; SI-NEXT: v_writelane_b32 v22, s16, 63 +; SI-NEXT: v_writelane_b32 v22, s16, 62 ; SI-NEXT: s_lshr_b32 s16, s7, 8 -; SI-NEXT: s_lshr_b32 s93, s99, 16 -; SI-NEXT: s_lshr_b32 s92, s83, 16 -; SI-NEXT: s_lshr_b32 s91, s65, 16 -; SI-NEXT: s_lshr_b32 s90, s89, 16 -; SI-NEXT: s_lshr_b32 s79, s57, 16 -; SI-NEXT: s_lshr_b32 s78, s77, 16 -; SI-NEXT: s_lshr_b32 s75, s47, 16 -; SI-NEXT: s_lshr_b32 s74, s45, 16 -; SI-NEXT: s_lshr_b32 s73, s43, 16 -; SI-NEXT: s_lshr_b32 s72, s41, 16 -; SI-NEXT: s_lshr_b32 s63, s15, 16 -; SI-NEXT: s_lshr_b32 s62, s13, 16 -; SI-NEXT: s_lshr_b32 s61, s11, 16 -; SI-NEXT: s_lshr_b32 s60, s9, 16 -; SI-NEXT: s_lshr_b32 s59, s7, 16 +; SI-NEXT: v_writelane_b32 v22, s16, 63 +; SI-NEXT: s_lshr_b32 s16, s5, 24 +; SI-NEXT: s_lshr_b32 s81, s39, 24 +; SI-NEXT: s_lshr_b32 s31, s39, 16 +; SI-NEXT: s_lshr_b32 s99, s39, 8 +; SI-NEXT: s_lshr_b32 s87, s73, 24 +; SI-NEXT: s_lshr_b32 s30, s73, 16 +; SI-NEXT: s_lshr_b32 s97, s73, 8 +; SI-NEXT: s_lshr_b32 s85, s63, 24 +; SI-NEXT: s_lshr_b32 s95, s63, 16 +; SI-NEXT: s_lshr_b32 s94, s61, 16 +; SI-NEXT: s_lshr_b32 s93, s59, 16 +; SI-NEXT: s_lshr_b32 s89, s57, 16 +; SI-NEXT: s_lshr_b32 s88, s47, 16 +; SI-NEXT: s_lshr_b32 s92, s45, 16 +; SI-NEXT: s_lshr_b32 s91, s43, 16 +; SI-NEXT: s_lshr_b32 s90, s41, 16 +; SI-NEXT: s_lshr_b32 s79, s15, 16 +; SI-NEXT: s_lshr_b32 s78, s13, 16 +; SI-NEXT: s_lshr_b32 s77, s11, 16 +; SI-NEXT: s_lshr_b32 s76, s9, 16 +; SI-NEXT: s_lshr_b32 s75, s7, 16 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_writelane_b32 v23, s16, 0 -; SI-NEXT: s_lshr_b32 s16, s5, 24 -; SI-NEXT: s_lshr_b32 s58, s5, 16 -; SI-NEXT: s_lshr_b32 s52, s5, 8 +; SI-NEXT: s_lshr_b32 s74, s5, 16 +; SI-NEXT: s_lshr_b32 s16, s5, 8 ; SI-NEXT: v_writelane_b32 v23, s16, 1 ; SI-NEXT: .LBB99_3: ; %end -; SI-NEXT: v_readlane_b32 s18, v21, 3 -; SI-NEXT: v_readlane_b32 s19, v21, 4 +; SI-NEXT: v_readlane_b32 s18, v21, 7 +; SI-NEXT: v_readlane_b32 s19, v21, 8 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 5 -; SI-NEXT: s_and_b32 s16, s98, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 6 +; SI-NEXT: v_readlane_b32 s18, v21, 9 +; SI-NEXT: s_and_b32 s16, s38, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 10 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 7 +; SI-NEXT: v_readlane_b32 s18, v21, 11 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s17, v22, 36 ; SI-NEXT: v_mov_b32_e32 v1, s16 -; SI-NEXT: s_and_b32 s16, s99, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 +; SI-NEXT: s_and_b32 s16, s39, 0xff +; SI-NEXT: s_lshl_b32 s17, s99, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s93, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 35 -; SI-NEXT: v_readlane_b32 s19, v21, 8 +; SI-NEXT: s_and_b32 s17, s31, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 12 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s18, 24 +; SI-NEXT: s_lshl_b32 s18, s81, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 9 +; SI-NEXT: v_readlane_b32 s18, v21, 13 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 10 +; SI-NEXT: v_readlane_b32 s19, v21, 14 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 11 +; SI-NEXT: v_readlane_b32 s18, v21, 15 ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: s_and_b32 s16, s82, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 12 +; SI-NEXT: s_and_b32 s16, s72, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 13 +; SI-NEXT: v_readlane_b32 s18, v21, 17 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff @@ -203037,287 +203451,284 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s17, v22, 38 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: s_and_b32 s16, s83, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 +; SI-NEXT: s_and_b32 s16, s73, 0xff +; SI-NEXT: s_lshl_b32 s17, s97, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s92, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 37 -; SI-NEXT: v_readlane_b32 s19, v21, 14 +; SI-NEXT: s_and_b32 s17, s30, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 18 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s18, 24 +; SI-NEXT: s_lshl_b32 s18, s87, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 15 +; SI-NEXT: v_readlane_b32 s18, v21, 19 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 16 +; SI-NEXT: v_readlane_b32 s19, v21, 20 ; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 17 +; SI-NEXT: v_readlane_b32 s18, v21, 21 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: s_and_b32 s16, s64, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 18 +; SI-NEXT: s_and_b32 s16, s62, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 22 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 19 +; SI-NEXT: v_readlane_b32 s18, v21, 23 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s17, v22, 40 +; SI-NEXT: v_readlane_b32 s17, v22, 39 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: s_and_b32 s16, s65, 0xff +; SI-NEXT: s_and_b32 s16, s63, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s91, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 39 -; SI-NEXT: v_readlane_b32 s19, v21, 20 +; SI-NEXT: s_and_b32 s17, s95, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 24 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s18, 24 +; SI-NEXT: s_lshl_b32 s18, s85, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 21 +; SI-NEXT: v_readlane_b32 s18, v21, 25 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 22 +; SI-NEXT: v_readlane_b32 s19, v21, 26 ; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 23 +; SI-NEXT: v_readlane_b32 s18, v21, 27 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: s_and_b32 s16, s88, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 24 +; SI-NEXT: s_and_b32 s16, s60, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 28 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 25 +; SI-NEXT: v_readlane_b32 s18, v21, 29 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s17, v22, 42 +; SI-NEXT: v_readlane_b32 s17, v22, 41 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: s_and_b32 s16, s89, 0xff +; SI-NEXT: s_and_b32 s16, s61, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s90, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 41 -; SI-NEXT: v_readlane_b32 s19, v21, 26 +; SI-NEXT: s_and_b32 s17, s94, 0xff +; SI-NEXT: v_readlane_b32 s18, v22, 40 +; SI-NEXT: v_readlane_b32 s19, v21, 30 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 27 +; SI-NEXT: v_readlane_b32 s18, v21, 31 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 28 +; SI-NEXT: v_readlane_b32 s19, v21, 32 ; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 29 +; SI-NEXT: v_readlane_b32 s18, v21, 33 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: s_and_b32 s16, s56, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 30 +; SI-NEXT: s_and_b32 s16, s58, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 34 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 31 +; SI-NEXT: v_readlane_b32 s18, v21, 35 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s17, v22, 44 +; SI-NEXT: v_readlane_b32 s17, v22, 43 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: s_and_b32 s16, s57, 0xff +; SI-NEXT: s_and_b32 s16, s59, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s79, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 43 -; SI-NEXT: v_readlane_b32 s19, v21, 32 +; SI-NEXT: s_and_b32 s17, s93, 0xff +; SI-NEXT: v_readlane_b32 s18, v22, 42 +; SI-NEXT: v_readlane_b32 s19, v21, 36 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 33 +; SI-NEXT: v_readlane_b32 s18, v21, 37 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 34 +; SI-NEXT: v_readlane_b32 s19, v21, 38 ; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 35 +; SI-NEXT: v_readlane_b32 s18, v21, 39 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: s_and_b32 s16, s76, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 36 +; SI-NEXT: s_and_b32 s16, s56, 0xff +; SI-NEXT: v_readlane_b32 s19, v21, 40 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 37 +; SI-NEXT: v_readlane_b32 s18, v21, 41 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 36, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s17, v22, 46 +; SI-NEXT: v_readlane_b32 s17, v22, 45 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: s_and_b32 s16, s77, 0xff +; SI-NEXT: s_and_b32 s16, s57, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s78, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 45 -; SI-NEXT: v_readlane_b32 s19, v21, 38 +; SI-NEXT: s_and_b32 s17, s89, 0xff +; SI-NEXT: v_readlane_b32 s18, v22, 44 +; SI-NEXT: v_readlane_b32 s19, v21, 42 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 39 +; SI-NEXT: v_readlane_b32 s18, v21, 43 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 40 +; SI-NEXT: v_readlane_b32 s19, v21, 44 ; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 41 +; SI-NEXT: v_readlane_b32 s18, v21, 45 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s46, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 42 +; SI-NEXT: v_readlane_b32 s19, v21, 46 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 43 +; SI-NEXT: v_readlane_b32 s18, v21, 47 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 44, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s17, v22, 48 +; SI-NEXT: v_readlane_b32 s17, v22, 47 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s47, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s75, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 47 -; SI-NEXT: v_readlane_b32 s19, v21, 44 +; SI-NEXT: s_and_b32 s17, s88, 0xff +; SI-NEXT: v_readlane_b32 s18, v22, 46 +; SI-NEXT: v_readlane_b32 s19, v21, 48 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 45 +; SI-NEXT: v_readlane_b32 s18, v21, 49 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 46 +; SI-NEXT: v_readlane_b32 s19, v21, 50 ; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 47 +; SI-NEXT: v_readlane_b32 s18, v21, 51 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s44, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 48 +; SI-NEXT: v_readlane_b32 s19, v21, 52 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 49 +; SI-NEXT: v_readlane_b32 s18, v21, 53 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 52, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s17, v22, 50 +; SI-NEXT: v_readlane_b32 s17, v22, 49 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s45, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s74, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 49 -; SI-NEXT: v_readlane_b32 s19, v21, 50 +; SI-NEXT: s_and_b32 s17, s92, 0xff +; SI-NEXT: v_readlane_b32 s18, v22, 48 +; SI-NEXT: v_readlane_b32 s19, v21, 54 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 51 +; SI-NEXT: v_readlane_b32 s18, v21, 55 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 52 +; SI-NEXT: v_readlane_b32 s19, v21, 56 ; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 53 +; SI-NEXT: v_readlane_b32 s18, v21, 57 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s42, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 54 +; SI-NEXT: v_readlane_b32 s19, v21, 58 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 55 +; SI-NEXT: v_readlane_b32 s18, v21, 59 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 60, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s17, v22, 52 +; SI-NEXT: v_readlane_b32 s17, v22, 51 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s43, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s73, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 51 -; SI-NEXT: v_readlane_b32 s19, v21, 56 +; SI-NEXT: s_and_b32 s17, s91, 0xff +; SI-NEXT: v_readlane_b32 s18, v22, 50 +; SI-NEXT: v_readlane_b32 s19, v21, 60 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_or_b32 s17, s18, s17 -; SI-NEXT: v_readlane_b32 s18, v21, 57 +; SI-NEXT: v_readlane_b32 s18, v21, 61 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: v_readlane_b32 s19, v21, 58 +; SI-NEXT: v_readlane_b32 s19, v21, 62 ; SI-NEXT: v_add_i32_e32 v1, vcc, 64, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_lshl_b32 s17, s18, 8 -; SI-NEXT: v_readlane_b32 s18, v21, 59 +; SI-NEXT: v_readlane_b32 s18, v21, 63 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s40, 0xff -; SI-NEXT: v_readlane_b32 s19, v21, 60 +; SI-NEXT: v_readlane_b32 s19, v22, 0 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s18, 0xff -; SI-NEXT: v_readlane_b32 s18, v21, 61 +; SI-NEXT: v_readlane_b32 s18, v22, 1 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 0x44, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s17, v22, 54 +; SI-NEXT: v_readlane_b32 s17, v22, 53 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s41, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s72, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 53 +; SI-NEXT: s_and_b32 s17, s90, 0xff +; SI-NEXT: v_readlane_b32 s18, v22, 52 ; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_lshl_b32 s18, s18, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff @@ -203327,16 +203738,16 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: v_readlane_b32 s16, v21, 63 +; SI-NEXT: v_readlane_b32 s16, v22, 3 ; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: v_readlane_b32 s17, v22, 0 +; SI-NEXT: v_readlane_b32 s17, v22, 4 ; SI-NEXT: s_lshl_b32 s16, s16, 8 -; SI-NEXT: v_readlane_b32 s19, v21, 62 +; SI-NEXT: v_readlane_b32 s19, v22, 2 ; SI-NEXT: s_or_b32 s14, s14, s16 -; SI-NEXT: v_readlane_b32 s16, v22, 1 -; SI-NEXT: v_readlane_b32 s17, v22, 2 +; SI-NEXT: v_readlane_b32 s16, v22, 5 +; SI-NEXT: v_readlane_b32 s17, v22, 6 ; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: v_readlane_b32 s18, v22, 3 +; SI-NEXT: v_readlane_b32 s18, v22, 7 ; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: s_lshl_b32 s17, s18, 24 ; SI-NEXT: s_and_b32 s14, s14, 0xffff @@ -203347,11 +203758,11 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s14 ; SI-NEXT: s_and_b32 s14, s15, 0xff -; SI-NEXT: v_readlane_b32 s15, v22, 56 +; SI-NEXT: v_readlane_b32 s15, v22, 55 ; SI-NEXT: s_lshl_b32 s15, s15, 8 ; SI-NEXT: s_or_b32 s14, s14, s15 -; SI-NEXT: s_and_b32 s15, s63, 0xff -; SI-NEXT: v_readlane_b32 s16, v22, 55 +; SI-NEXT: s_and_b32 s15, s79, 0xff +; SI-NEXT: v_readlane_b32 s16, v22, 54 ; SI-NEXT: s_lshl_b32 s15, s15, 16 ; SI-NEXT: s_lshl_b32 s16, s16, 24 ; SI-NEXT: s_and_b32 s14, s14, 0xffff @@ -203361,15 +203772,15 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s14 -; SI-NEXT: v_readlane_b32 s14, v22, 5 +; SI-NEXT: v_readlane_b32 s14, v22, 9 ; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s15, v22, 6 +; SI-NEXT: v_readlane_b32 s15, v22, 10 ; SI-NEXT: s_lshl_b32 s14, s14, 8 ; SI-NEXT: s_or_b32 s12, s12, s14 -; SI-NEXT: v_readlane_b32 s14, v22, 7 -; SI-NEXT: v_readlane_b32 s15, v22, 8 +; SI-NEXT: v_readlane_b32 s14, v22, 11 +; SI-NEXT: v_readlane_b32 s15, v22, 12 ; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: v_readlane_b32 s16, v22, 9 +; SI-NEXT: v_readlane_b32 s16, v22, 13 ; SI-NEXT: s_lshl_b32 s14, s14, 16 ; SI-NEXT: s_lshl_b32 s15, s16, 24 ; SI-NEXT: s_and_b32 s12, s12, 0xffff @@ -203380,11 +203791,11 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s12 ; SI-NEXT: s_and_b32 s12, s13, 0xff -; SI-NEXT: v_readlane_b32 s13, v22, 58 +; SI-NEXT: v_readlane_b32 s13, v22, 57 ; SI-NEXT: s_lshl_b32 s13, s13, 8 ; SI-NEXT: s_or_b32 s12, s12, s13 -; SI-NEXT: s_and_b32 s13, s62, 0xff -; SI-NEXT: v_readlane_b32 s14, v22, 57 +; SI-NEXT: s_and_b32 s13, s78, 0xff +; SI-NEXT: v_readlane_b32 s14, v22, 56 ; SI-NEXT: s_lshl_b32 s13, s13, 16 ; SI-NEXT: s_lshl_b32 s14, s14, 24 ; SI-NEXT: s_and_b32 s12, s12, 0xffff @@ -203394,15 +203805,15 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s12 -; SI-NEXT: v_readlane_b32 s12, v22, 11 +; SI-NEXT: v_readlane_b32 s12, v22, 15 ; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s13, v22, 12 +; SI-NEXT: v_readlane_b32 s13, v22, 16 ; SI-NEXT: s_lshl_b32 s12, s12, 8 ; SI-NEXT: s_or_b32 s10, s10, s12 -; SI-NEXT: v_readlane_b32 s12, v22, 13 -; SI-NEXT: v_readlane_b32 s13, v22, 14 +; SI-NEXT: v_readlane_b32 s12, v22, 17 +; SI-NEXT: v_readlane_b32 s13, v22, 18 ; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: v_readlane_b32 s14, v22, 15 +; SI-NEXT: v_readlane_b32 s14, v22, 19 ; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_lshl_b32 s13, s14, 24 ; SI-NEXT: s_and_b32 s10, s10, 0xffff @@ -203413,11 +203824,11 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s10 ; SI-NEXT: s_and_b32 s10, s11, 0xff -; SI-NEXT: v_readlane_b32 s11, v22, 60 +; SI-NEXT: v_readlane_b32 s11, v22, 59 ; SI-NEXT: s_lshl_b32 s11, s11, 8 ; SI-NEXT: s_or_b32 s10, s10, s11 -; SI-NEXT: s_and_b32 s11, s61, 0xff -; SI-NEXT: v_readlane_b32 s12, v22, 59 +; SI-NEXT: s_and_b32 s11, s77, 0xff +; SI-NEXT: v_readlane_b32 s12, v22, 58 ; SI-NEXT: s_lshl_b32 s11, s11, 16 ; SI-NEXT: s_lshl_b32 s12, s12, 24 ; SI-NEXT: s_and_b32 s10, s10, 0xffff @@ -203427,15 +203838,15 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s10 -; SI-NEXT: v_readlane_b32 s10, v22, 17 +; SI-NEXT: v_readlane_b32 s10, v22, 21 ; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s11, v22, 18 +; SI-NEXT: v_readlane_b32 s11, v22, 22 ; SI-NEXT: s_lshl_b32 s10, s10, 8 ; SI-NEXT: s_or_b32 s8, s8, s10 -; SI-NEXT: v_readlane_b32 s10, v22, 19 -; SI-NEXT: v_readlane_b32 s11, v22, 20 +; SI-NEXT: v_readlane_b32 s10, v22, 23 +; SI-NEXT: v_readlane_b32 s11, v22, 24 ; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: v_readlane_b32 s12, v22, 21 +; SI-NEXT: v_readlane_b32 s12, v22, 25 ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_lshl_b32 s11, s12, 24 ; SI-NEXT: s_and_b32 s8, s8, 0xffff @@ -203446,11 +203857,11 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s8 ; SI-NEXT: s_and_b32 s8, s9, 0xff -; SI-NEXT: v_readlane_b32 s9, v22, 62 +; SI-NEXT: v_readlane_b32 s9, v22, 61 ; SI-NEXT: s_lshl_b32 s9, s9, 8 ; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s60, 0xff -; SI-NEXT: v_readlane_b32 s10, v22, 61 +; SI-NEXT: s_and_b32 s9, s76, 0xff +; SI-NEXT: v_readlane_b32 s10, v22, 60 ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_lshl_b32 s10, s10, 24 ; SI-NEXT: s_and_b32 s8, s8, 0xffff @@ -203460,15 +203871,15 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s8 -; SI-NEXT: v_readlane_b32 s8, v22, 23 +; SI-NEXT: v_readlane_b32 s8, v22, 27 ; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: v_readlane_b32 s9, v22, 24 +; SI-NEXT: v_readlane_b32 s9, v22, 28 ; SI-NEXT: s_lshl_b32 s8, s8, 8 ; SI-NEXT: s_or_b32 s6, s6, s8 -; SI-NEXT: v_readlane_b32 s8, v22, 25 -; SI-NEXT: v_readlane_b32 s9, v22, 26 +; SI-NEXT: v_readlane_b32 s8, v22, 29 +; SI-NEXT: v_readlane_b32 s9, v22, 30 ; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: v_readlane_b32 s10, v22, 27 +; SI-NEXT: v_readlane_b32 s10, v22, 31 ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_lshl_b32 s9, s10, 24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff @@ -203479,11 +203890,11 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s6 ; SI-NEXT: s_and_b32 s6, s7, 0xff -; SI-NEXT: v_readlane_b32 s7, v23, 0 +; SI-NEXT: v_readlane_b32 s7, v22, 63 ; SI-NEXT: s_lshl_b32 s7, s7, 8 ; SI-NEXT: s_or_b32 s6, s6, s7 -; SI-NEXT: s_and_b32 s7, s59, 0xff -; SI-NEXT: v_readlane_b32 s8, v22, 63 +; SI-NEXT: s_and_b32 s7, s75, 0xff +; SI-NEXT: v_readlane_b32 s8, v22, 62 ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_lshl_b32 s8, s8, 24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff @@ -203493,15 +203904,15 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s6 -; SI-NEXT: v_readlane_b32 s6, v22, 29 +; SI-NEXT: v_readlane_b32 s6, v22, 33 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: v_readlane_b32 s7, v22, 30 +; SI-NEXT: v_readlane_b32 s7, v22, 34 ; SI-NEXT: s_lshl_b32 s6, s6, 8 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: v_readlane_b32 s6, v22, 31 -; SI-NEXT: v_readlane_b32 s7, v22, 32 +; SI-NEXT: v_readlane_b32 s6, v22, 35 +; SI-NEXT: v_readlane_b32 s7, v22, 36 ; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: v_readlane_b32 s8, v22, 33 +; SI-NEXT: v_readlane_b32 s8, v22, 37 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s7, s8, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff @@ -203512,10 +203923,11 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s4 ; SI-NEXT: s_and_b32 s4, s5, 0xff -; SI-NEXT: s_lshl_b32 s5, s52, 8 +; SI-NEXT: v_readlane_b32 s5, v23, 1 +; SI-NEXT: s_lshl_b32 s5, s5, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s58, 0xff -; SI-NEXT: v_readlane_b32 s6, v23, 1 +; SI-NEXT: s_and_b32 s5, s74, 0xff +; SI-NEXT: v_readlane_b32 s6, v23, 0 ; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s6, s6, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff @@ -203526,12 +203938,12 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0 ; SI-NEXT: v_mov_b32_e32 v1, s4 ; SI-NEXT: v_readlane_b32 s30, v20, 34 -; SI-NEXT: v_readlane_b32 s19, v22, 4 -; SI-NEXT: v_readlane_b32 s17, v22, 10 -; SI-NEXT: v_readlane_b32 s15, v22, 16 -; SI-NEXT: v_readlane_b32 s13, v22, 22 -; SI-NEXT: v_readlane_b32 s11, v22, 28 -; SI-NEXT: v_readlane_b32 s9, v22, 34 +; SI-NEXT: v_readlane_b32 s19, v22, 8 +; SI-NEXT: v_readlane_b32 s17, v22, 14 +; SI-NEXT: v_readlane_b32 s15, v22, 20 +; SI-NEXT: v_readlane_b32 s13, v22, 26 +; SI-NEXT: v_readlane_b32 s11, v22, 32 +; SI-NEXT: v_readlane_b32 s9, v22, 38 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; SI-NEXT: v_readlane_b32 s31, v20, 35 ; SI-NEXT: v_readlane_b32 s99, v20, 33 @@ -203578,16 +203990,18 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB99_4: ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: v_writelane_b32 v21, s4, 3 -; SI-NEXT: v_writelane_b32 v21, s5, 4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr98 -; SI-NEXT: ; implicit-def: $sgpr82 -; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; implicit-def: $sgpr38 +; SI-NEXT: ; implicit-def: $sgpr99 +; SI-NEXT: ; implicit-def: $sgpr81 +; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr97 +; SI-NEXT: ; implicit-def: $sgpr87 +; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr85 +; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr42 @@ -203597,16 +204011,9 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v21, s4, 5 -; SI-NEXT: v_writelane_b32 v21, s5, 6 -; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 7 ; SI-NEXT: v_writelane_b32 v21, s5, 8 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 9 ; SI-NEXT: v_writelane_b32 v21, s5, 10 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203616,10 +204023,6 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v21, s4, 13 ; SI-NEXT: v_writelane_b32 v21, s5, 14 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 15 ; SI-NEXT: v_writelane_b32 v21, s5, 16 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203629,68 +204032,16 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v21, s4, 19 ; SI-NEXT: v_writelane_b32 v21, s5, 20 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 21 ; SI-NEXT: v_writelane_b32 v21, s5, 22 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 23 ; SI-NEXT: v_writelane_b32 v21, s5, 24 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v21, s4, 25 -; SI-NEXT: v_writelane_b32 v21, s5, 26 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: v_writelane_b32 v21, s4, 25 +; SI-NEXT: v_writelane_b32 v21, s5, 26 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 27 ; SI-NEXT: v_writelane_b32 v21, s5, 28 @@ -203698,6 +204049,10 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v21, s4, 29 ; SI-NEXT: v_writelane_b32 v21, s5, 30 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 31 ; SI-NEXT: v_writelane_b32 v21, s5, 32 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203707,6 +204062,10 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v21, s4, 35 ; SI-NEXT: v_writelane_b32 v21, s5, 36 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 37 ; SI-NEXT: v_writelane_b32 v21, s5, 38 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203716,6 +204075,10 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v21, s4, 41 ; SI-NEXT: v_writelane_b32 v21, s5, 42 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 43 ; SI-NEXT: v_writelane_b32 v21, s5, 44 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203725,6 +204088,10 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v21, s4, 47 ; SI-NEXT: v_writelane_b32 v21, s5, 48 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 49 ; SI-NEXT: v_writelane_b32 v21, s5, 50 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203734,6 +204101,10 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v21, s4, 53 ; SI-NEXT: v_writelane_b32 v21, s5, 54 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 55 ; SI-NEXT: v_writelane_b32 v21, s5, 56 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203743,6 +204114,10 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v21, s4, 59 ; SI-NEXT: v_writelane_b32 v21, s5, 60 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v21, s4, 61 ; SI-NEXT: v_writelane_b32 v21, s5, 62 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203753,6 +204128,10 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v22, s4, 1 ; SI-NEXT: v_writelane_b32 v22, s5, 2 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v22, s4, 3 ; SI-NEXT: v_writelane_b32 v22, s5, 4 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203762,6 +204141,10 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v22, s4, 7 ; SI-NEXT: v_writelane_b32 v22, s5, 8 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v22, s4, 9 ; SI-NEXT: v_writelane_b32 v22, s5, 10 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203771,6 +204154,10 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v22, s4, 13 ; SI-NEXT: v_writelane_b32 v22, s5, 14 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v22, s4, 15 ; SI-NEXT: v_writelane_b32 v22, s5, 16 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203780,6 +204167,10 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v22, s4, 19 ; SI-NEXT: v_writelane_b32 v22, s5, 20 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v22, s4, 21 ; SI-NEXT: v_writelane_b32 v22, s5, 22 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -203789,59 +204180,76 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; SI-NEXT: v_writelane_b32 v22, s4, 25 ; SI-NEXT: v_writelane_b32 v22, s5, 26 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v22, s4, 27 ; SI-NEXT: v_writelane_b32 v22, s5, 28 -; SI-NEXT: v_writelane_b32 v22, s52, 29 -; SI-NEXT: v_writelane_b32 v22, s53, 30 -; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v22, s52, 31 -; SI-NEXT: v_writelane_b32 v22, s53, 32 -; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: v_writelane_b32 v22, s52, 33 -; SI-NEXT: v_writelane_b32 v22, s53, 34 -; SI-NEXT: ; implicit-def: $sgpr52 +; SI-NEXT: v_writelane_b32 v22, s4, 29 +; SI-NEXT: v_writelane_b32 v22, s5, 30 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v22, s4, 31 +; SI-NEXT: v_writelane_b32 v22, s5, 32 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 33 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 34 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 35 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 36 +; SI-NEXT: ; implicit-def: $vcc_lo +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: v_writelane_b32 v22, vcc_lo, 37 +; SI-NEXT: v_writelane_b32 v22, vcc_hi, 38 +; SI-NEXT: ; kill: killed $sgpr5 +; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; kill: killed $sgpr5 ; SI-NEXT: s_branch .LBB99_2 ; ; VI-LABEL: bitcast_v64i16_to_v128i8_scalar: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v32, s34, 0 -; VI-NEXT: v_writelane_b32 v32, s35, 1 -; VI-NEXT: v_writelane_b32 v32, s36, 2 -; VI-NEXT: v_writelane_b32 v32, s37, 3 -; VI-NEXT: v_writelane_b32 v32, s38, 4 -; VI-NEXT: v_writelane_b32 v32, s39, 5 -; VI-NEXT: v_writelane_b32 v32, s48, 6 -; VI-NEXT: v_writelane_b32 v32, s49, 7 -; VI-NEXT: v_writelane_b32 v32, s50, 8 -; VI-NEXT: v_writelane_b32 v32, s51, 9 -; VI-NEXT: v_writelane_b32 v32, s52, 10 -; VI-NEXT: v_writelane_b32 v32, s53, 11 -; VI-NEXT: v_writelane_b32 v32, s54, 12 -; VI-NEXT: v_writelane_b32 v32, s55, 13 -; VI-NEXT: v_writelane_b32 v32, s64, 14 -; VI-NEXT: v_writelane_b32 v32, s65, 15 -; VI-NEXT: v_writelane_b32 v32, s66, 16 -; VI-NEXT: v_writelane_b32 v32, s67, 17 -; VI-NEXT: v_writelane_b32 v32, s68, 18 -; VI-NEXT: v_writelane_b32 v32, s69, 19 -; VI-NEXT: v_writelane_b32 v32, s70, 20 -; VI-NEXT: v_writelane_b32 v32, s71, 21 -; VI-NEXT: v_writelane_b32 v32, s80, 22 -; VI-NEXT: v_writelane_b32 v32, s81, 23 -; VI-NEXT: v_writelane_b32 v32, s82, 24 -; VI-NEXT: v_writelane_b32 v32, s83, 25 -; VI-NEXT: v_writelane_b32 v32, s84, 26 -; VI-NEXT: v_writelane_b32 v32, s85, 27 -; VI-NEXT: v_writelane_b32 v32, s86, 28 -; VI-NEXT: v_writelane_b32 v32, s87, 29 -; VI-NEXT: v_writelane_b32 v32, s30, 30 -; VI-NEXT: v_writelane_b32 v32, s31, 31 +; VI-NEXT: v_writelane_b32 v28, s34, 0 +; VI-NEXT: v_writelane_b32 v28, s35, 1 +; VI-NEXT: v_writelane_b32 v28, s36, 2 +; VI-NEXT: v_writelane_b32 v28, s37, 3 +; VI-NEXT: v_writelane_b32 v28, s38, 4 +; VI-NEXT: v_writelane_b32 v28, s39, 5 +; VI-NEXT: v_writelane_b32 v28, s48, 6 +; VI-NEXT: v_writelane_b32 v28, s49, 7 +; VI-NEXT: v_writelane_b32 v28, s50, 8 +; VI-NEXT: v_writelane_b32 v28, s51, 9 +; VI-NEXT: v_writelane_b32 v28, s52, 10 +; VI-NEXT: v_writelane_b32 v28, s53, 11 +; VI-NEXT: v_writelane_b32 v28, s54, 12 +; VI-NEXT: v_writelane_b32 v28, s55, 13 +; VI-NEXT: v_writelane_b32 v28, s64, 14 +; VI-NEXT: v_writelane_b32 v28, s65, 15 +; VI-NEXT: v_writelane_b32 v28, s66, 16 +; VI-NEXT: v_writelane_b32 v28, s67, 17 +; VI-NEXT: v_writelane_b32 v28, s68, 18 +; VI-NEXT: v_writelane_b32 v28, s69, 19 +; VI-NEXT: v_writelane_b32 v28, s70, 20 +; VI-NEXT: v_writelane_b32 v28, s71, 21 +; VI-NEXT: v_writelane_b32 v28, s80, 22 +; VI-NEXT: v_writelane_b32 v28, s81, 23 +; VI-NEXT: v_writelane_b32 v28, s82, 24 +; VI-NEXT: v_writelane_b32 v28, s83, 25 +; VI-NEXT: v_writelane_b32 v28, s84, 26 +; VI-NEXT: v_writelane_b32 v28, s85, 27 +; VI-NEXT: v_writelane_b32 v28, s86, 28 +; VI-NEXT: v_writelane_b32 v28, s87, 29 +; VI-NEXT: v_writelane_b32 v28, s30, 30 +; VI-NEXT: v_writelane_b32 v28, s31, 31 ; VI-NEXT: v_readfirstlane_b32 s44, v19 ; VI-NEXT: v_readfirstlane_b32 s5, v18 ; VI-NEXT: v_readfirstlane_b32 s4, v17 @@ -203862,163 +204270,165 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; VI-NEXT: v_readfirstlane_b32 s45, v2 ; VI-NEXT: s_cmp_lg_u32 s44, 0 ; VI-NEXT: v_readfirstlane_b32 s44, v1 -; VI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane +; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane ; VI-NEXT: s_cbranch_scc0 .LBB99_4 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_lshr_b32 s46, s45, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 0 -; VI-NEXT: s_lshr_b32 s46, s45, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 1 -; VI-NEXT: s_lshr_b32 s46, s45, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 2 -; VI-NEXT: s_lshr_b32 s46, s44, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 3 -; VI-NEXT: s_lshr_b32 s46, s44, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 4 -; VI-NEXT: s_lshr_b32 s46, s29, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 5 -; VI-NEXT: s_lshr_b32 s46, s29, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 6 -; VI-NEXT: s_lshr_b32 s46, s29, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 7 -; VI-NEXT: s_lshr_b32 s46, s28, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 8 -; VI-NEXT: s_lshr_b32 s46, s28, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 9 +; VI-NEXT: v_writelane_b32 v29, s46, 22 ; VI-NEXT: s_lshr_b32 s46, s27, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 10 +; VI-NEXT: v_writelane_b32 v29, s46, 23 ; VI-NEXT: s_lshr_b32 s46, s27, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 11 +; VI-NEXT: v_writelane_b32 v29, s46, 24 ; VI-NEXT: s_lshr_b32 s46, s27, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 12 +; VI-NEXT: v_writelane_b32 v29, s46, 25 ; VI-NEXT: s_lshr_b32 s46, s26, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 13 +; VI-NEXT: v_writelane_b32 v29, s46, 26 ; VI-NEXT: s_lshr_b32 s46, s26, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 14 +; VI-NEXT: v_writelane_b32 v29, s46, 27 ; VI-NEXT: s_lshr_b32 s46, s25, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 15 +; VI-NEXT: v_writelane_b32 v29, s46, 28 ; VI-NEXT: s_lshr_b32 s46, s25, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 29 +; VI-NEXT: s_lshr_b32 s46, s25, 8 +; VI-NEXT: v_writelane_b32 v29, s46, 30 ; VI-NEXT: s_lshr_b32 s46, s24, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 17 -; VI-NEXT: s_lshr_b32 s46, s23, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 18 +; VI-NEXT: v_writelane_b32 v29, s46, 31 +; VI-NEXT: s_lshr_b32 s46, s24, 8 +; VI-NEXT: v_writelane_b32 v29, s46, 32 ; VI-NEXT: s_lshr_b32 s46, s23, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 19 -; VI-NEXT: s_lshr_b32 s46, s22, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 20 -; VI-NEXT: s_lshr_b32 s46, s21, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 21 -; VI-NEXT: s_lshr_b32 s46, s21, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 22 -; VI-NEXT: s_lshr_b32 s46, s20, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 23 -; VI-NEXT: s_lshr_b32 s46, s19, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 24 -; VI-NEXT: s_lshr_b32 s46, s19, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 25 -; VI-NEXT: s_lshr_b32 s46, s18, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 26 -; VI-NEXT: s_lshr_b32 s46, s17, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 27 -; VI-NEXT: s_lshr_b32 s46, s17, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 28 -; VI-NEXT: s_lshr_b32 s46, s16, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 29 -; VI-NEXT: s_lshr_b32 s46, s5, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 30 -; VI-NEXT: s_lshr_b32 s46, s5, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 31 -; VI-NEXT: s_lshr_b32 s46, s5, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 32 -; VI-NEXT: s_lshr_b32 s46, s4, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 33 -; VI-NEXT: s_lshr_b32 s46, s4, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 34 -; VI-NEXT: s_lshr_b32 s46, s7, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 35 -; VI-NEXT: s_lshr_b32 s46, s7, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 36 -; VI-NEXT: s_lshr_b32 s46, s7, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 37 -; VI-NEXT: s_lshr_b32 s46, s6, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 38 -; VI-NEXT: s_lshr_b32 s46, s6, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 39 -; VI-NEXT: s_lshr_b32 s46, s9, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 40 -; VI-NEXT: s_lshr_b32 s46, s9, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 41 -; VI-NEXT: s_lshr_b32 s46, s9, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 42 -; VI-NEXT: s_lshr_b32 s46, s8, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 43 -; VI-NEXT: s_lshr_b32 s46, s8, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 44 -; VI-NEXT: s_lshr_b32 s46, s11, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 45 -; VI-NEXT: s_lshr_b32 s46, s11, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 46 -; VI-NEXT: s_lshr_b32 s46, s11, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 47 -; VI-NEXT: s_lshr_b32 s46, s10, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 48 -; VI-NEXT: s_lshr_b32 s46, s10, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 49 -; VI-NEXT: s_lshr_b32 s46, s13, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 50 -; VI-NEXT: s_lshr_b32 s46, s13, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 51 -; VI-NEXT: s_lshr_b32 s46, s13, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 52 -; VI-NEXT: s_lshr_b32 s46, s12, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 53 -; VI-NEXT: s_lshr_b32 s46, s12, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 54 -; VI-NEXT: s_lshr_b32 s46, s15, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 55 -; VI-NEXT: s_lshr_b32 s46, s15, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 56 -; VI-NEXT: s_lshr_b32 s46, s14, 16 -; VI-NEXT: s_lshr_b32 s71, s25, 8 -; VI-NEXT: s_lshr_b32 s87, s24, 8 -; VI-NEXT: s_lshr_b32 s86, s23, 8 -; VI-NEXT: s_lshr_b32 s64, s22, 8 -; VI-NEXT: s_lshr_b32 s66, s21, 8 -; VI-NEXT: s_lshr_b32 s54, s20, 8 -; VI-NEXT: s_lshr_b32 s82, s19, 8 -; VI-NEXT: s_lshr_b32 s81, s18, 8 -; VI-NEXT: s_lshr_b32 s67, s17, 8 -; VI-NEXT: s_lshr_b32 s68, s16, 8 -; VI-NEXT: s_lshr_b32 s69, s15, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 57 -; VI-NEXT: s_lshr_b32 s83, s14, 8 -; VI-NEXT: s_lshr_b32 s84, s41, 24 -; VI-NEXT: s_lshr_b32 s80, s41, 16 -; VI-NEXT: s_lshr_b32 s51, s41, 8 -; VI-NEXT: s_lshr_b32 s50, s40, 16 -; VI-NEXT: s_lshr_b32 s85, s40, 8 -; VI-NEXT: s_lshr_b32 s55, s43, 24 -; VI-NEXT: s_lshr_b32 s65, s43, 16 -; VI-NEXT: s_lshr_b32 s52, s43, 8 -; VI-NEXT: s_lshr_b32 s53, s42, 16 -; VI-NEXT: s_lshr_b32 s70, s42, 8 -; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 -; VI-NEXT: s_lshr_b64 s[30:31], s[24:25], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 33 +; VI-NEXT: s_lshr_b32 s47, s5, 24 +; VI-NEXT: v_writelane_b32 v29, s47, 34 +; VI-NEXT: s_lshr_b32 s47, s5, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 35 +; VI-NEXT: s_lshr_b32 s47, s5, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 36 +; VI-NEXT: s_lshr_b32 s47, s4, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 37 +; VI-NEXT: s_lshr_b32 s47, s4, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 38 +; VI-NEXT: s_lshr_b32 s47, s7, 24 +; VI-NEXT: v_writelane_b32 v29, s47, 39 +; VI-NEXT: s_lshr_b32 s47, s7, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 40 +; VI-NEXT: s_lshr_b32 s47, s7, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 41 +; VI-NEXT: s_lshr_b32 s47, s6, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 42 +; VI-NEXT: s_lshr_b32 s47, s6, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 43 +; VI-NEXT: s_lshr_b32 s47, s9, 24 +; VI-NEXT: v_writelane_b32 v29, s47, 44 +; VI-NEXT: s_lshr_b32 s47, s9, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 45 +; VI-NEXT: s_lshr_b32 s47, s9, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 46 +; VI-NEXT: s_lshr_b32 s47, s8, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 47 +; VI-NEXT: s_lshr_b32 s47, s8, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 48 +; VI-NEXT: s_lshr_b32 s47, s11, 24 +; VI-NEXT: v_writelane_b32 v29, s47, 49 +; VI-NEXT: s_lshr_b32 s47, s11, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 50 +; VI-NEXT: s_lshr_b32 s47, s11, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 51 +; VI-NEXT: s_lshr_b32 s47, s10, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 52 +; VI-NEXT: s_lshr_b64 s[30:31], s[44:45], 24 +; VI-NEXT: v_writelane_b32 v29, s30, 4 +; VI-NEXT: v_writelane_b32 v29, s31, 5 +; VI-NEXT: s_lshr_b64 s[30:31], s[28:29], 24 +; VI-NEXT: s_lshr_b32 s36, s45, 8 +; VI-NEXT: v_writelane_b32 v29, s30, 2 ; VI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24 +; VI-NEXT: s_lshr_b32 s38, s44, 16 +; VI-NEXT: v_writelane_b32 v29, s31, 3 +; VI-NEXT: s_lshr_b64 s[30:31], s[26:27], 24 +; VI-NEXT: s_mov_b32 s35, s36 ; VI-NEXT: s_lshr_b64 s[36:37], s[20:21], 24 +; VI-NEXT: s_lshr_b32 s48, s44, 8 +; VI-NEXT: s_lshr_b32 s70, s29, 16 +; VI-NEXT: s_lshr_b32 s90, s28, 8 +; VI-NEXT: v_writelane_b32 v29, s30, 0 +; VI-NEXT: s_mov_b32 s37, s38 ; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24 -; VI-NEXT: s_lshr_b64 s[48:49], s[16:17], 24 -; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; VI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; VI-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 +; VI-NEXT: s_lshr_b32 vcc_hi, s45, 16 +; VI-NEXT: s_lshr_b32 vcc_lo, s28, 16 +; VI-NEXT: v_writelane_b32 v29, s31, 1 +; VI-NEXT: s_lshr_b64 s[30:31], s[24:25], 24 +; VI-NEXT: s_mov_b32 s39, s48 +; VI-NEXT: s_mov_b32 s48, s70 +; VI-NEXT: s_mov_b32 s70, s90 +; VI-NEXT: s_lshr_b64 s[90:91], s[16:17], 24 +; VI-NEXT: s_mov_b32 s31, vcc_hi +; VI-NEXT: s_mov_b32 s91, vcc_lo +; VI-NEXT: s_lshr_b64 vcc, s[4:5], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 20 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 21 +; VI-NEXT: s_lshr_b64 vcc, s[6:7], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 18 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 19 +; VI-NEXT: s_lshr_b64 vcc, s[8:9], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 17 +; VI-NEXT: s_lshr_b64 vcc, s[10:11], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 14 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 15 +; VI-NEXT: s_lshr_b64 vcc, s[12:13], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 12 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 13 +; VI-NEXT: s_lshr_b64 vcc, s[14:15], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 10 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 11 +; VI-NEXT: s_lshr_b64 vcc, s[40:41], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 9 +; VI-NEXT: s_lshr_b64 vcc, s[42:43], 24 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 6 +; VI-NEXT: s_lshr_b32 s49, s29, 24 +; VI-NEXT: s_lshr_b32 s71, s29, 8 +; VI-NEXT: s_lshr_b32 s67, s23, 24 +; VI-NEXT: s_lshr_b32 s60, s23, 8 +; VI-NEXT: s_lshr_b32 s59, s22, 16 +; VI-NEXT: s_lshr_b32 s85, s22, 8 +; VI-NEXT: s_lshr_b32 s63, s21, 24 +; VI-NEXT: s_lshr_b32 s83, s21, 16 +; VI-NEXT: s_lshr_b32 s87, s21, 8 +; VI-NEXT: s_lshr_b32 s86, s20, 16 +; VI-NEXT: s_lshr_b32 s74, s20, 8 +; VI-NEXT: s_lshr_b32 s52, s19, 24 +; VI-NEXT: s_lshr_b32 s51, s19, 16 +; VI-NEXT: s_lshr_b32 s77, s19, 8 +; VI-NEXT: s_lshr_b32 s78, s18, 16 +; VI-NEXT: s_lshr_b32 s64, s18, 8 +; VI-NEXT: s_lshr_b32 s54, s17, 24 +; VI-NEXT: s_lshr_b32 s66, s17, 16 +; VI-NEXT: s_lshr_b32 s46, s17, 8 +; VI-NEXT: s_lshr_b32 s89, s16, 16 +; VI-NEXT: s_lshr_b32 s69, s16, 8 +; VI-NEXT: s_lshr_b32 s81, s10, 8 +; VI-NEXT: s_lshr_b32 s61, s13, 24 +; VI-NEXT: s_lshr_b32 s68, s13, 16 +; VI-NEXT: s_lshr_b32 s82, s13, 8 +; VI-NEXT: s_lshr_b32 s62, s12, 16 +; VI-NEXT: s_lshr_b32 s84, s12, 8 +; VI-NEXT: s_lshr_b32 s72, s15, 24 +; VI-NEXT: s_lshr_b32 s73, s15, 16 +; VI-NEXT: s_lshr_b32 s53, s15, 8 +; VI-NEXT: s_lshr_b32 s75, s14, 16 +; VI-NEXT: s_lshr_b32 s76, s14, 8 +; VI-NEXT: s_lshr_b32 s50, s41, 24 +; VI-NEXT: s_lshr_b32 s55, s41, 16 +; VI-NEXT: s_lshr_b32 s79, s41, 8 +; VI-NEXT: s_lshr_b32 s65, s40, 16 +; VI-NEXT: s_lshr_b32 s56, s40, 8 +; VI-NEXT: s_lshr_b32 s57, s43, 24 +; VI-NEXT: s_lshr_b32 s88, s43, 16 +; VI-NEXT: s_lshr_b32 s47, s43, 8 +; VI-NEXT: s_lshr_b32 s80, s42, 16 +; VI-NEXT: s_lshr_b32 s58, s42, 8 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 7 ; VI-NEXT: s_cbranch_execnz .LBB99_3 ; VI-NEXT: .LBB99_2: ; %cmp.true ; VI-NEXT: s_and_b32 s46, s43, 0xffff0000 @@ -204147,710 +204557,695 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; VI-NEXT: s_or_b32 s45, s46, s45 ; VI-NEXT: s_and_b32 s46, s44, 0xffff0000 ; VI-NEXT: s_add_i32 s44, s44, 3 -; VI-NEXT: s_add_i32 s45, s45, 0x30000 ; VI-NEXT: s_and_b32 s44, s44, 0xffff ; VI-NEXT: s_or_b32 s44, s46, s44 -; VI-NEXT: s_lshr_b32 s46, s45, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 0 -; VI-NEXT: s_lshr_b32 s46, s45, 16 +; VI-NEXT: s_add_i32 s45, s45, 0x30000 ; VI-NEXT: s_add_i32 s44, s44, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 1 -; VI-NEXT: s_lshr_b32 s46, s45, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 2 -; VI-NEXT: s_lshr_b32 s46, s44, 16 +; VI-NEXT: s_lshr_b64 s[46:47], s[44:45], 24 ; VI-NEXT: s_add_i32 s29, s29, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 3 -; VI-NEXT: s_lshr_b32 s46, s44, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 4 -; VI-NEXT: s_lshr_b32 s46, s29, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 5 -; VI-NEXT: s_lshr_b32 s46, s29, 16 ; VI-NEXT: s_add_i32 s28, s28, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 6 -; VI-NEXT: s_lshr_b32 s46, s29, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 7 -; VI-NEXT: s_lshr_b32 s46, s28, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 4 +; VI-NEXT: v_writelane_b32 v29, s47, 5 +; VI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24 ; VI-NEXT: s_add_i32 s27, s27, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 8 -; VI-NEXT: s_lshr_b32 s46, s28, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 9 -; VI-NEXT: s_lshr_b32 s46, s27, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 10 -; VI-NEXT: s_lshr_b32 s46, s27, 16 ; VI-NEXT: s_add_i32 s26, s26, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 11 -; VI-NEXT: s_lshr_b32 s46, s27, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 12 -; VI-NEXT: s_lshr_b32 s46, s26, 16 -; VI-NEXT: s_add_i32 s25, s25, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 13 -; VI-NEXT: s_lshr_b32 s46, s26, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 14 -; VI-NEXT: s_lshr_b32 s46, s25, 24 -; VI-NEXT: s_add_i32 s24, s24, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 15 -; VI-NEXT: s_lshr_b32 s46, s25, 16 -; VI-NEXT: s_add_i32 s23, s23, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 16 -; VI-NEXT: s_lshr_b32 s46, s24, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 17 -; VI-NEXT: s_lshr_b32 s46, s23, 24 -; VI-NEXT: s_add_i32 s22, s22, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 18 -; VI-NEXT: s_lshr_b32 s46, s23, 16 -; VI-NEXT: s_add_i32 s21, s21, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 19 -; VI-NEXT: s_lshr_b32 s46, s22, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 20 -; VI-NEXT: s_lshr_b32 s46, s21, 24 -; VI-NEXT: s_add_i32 s20, s20, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 21 -; VI-NEXT: s_lshr_b32 s46, s21, 16 -; VI-NEXT: s_add_i32 s19, s19, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 22 -; VI-NEXT: s_lshr_b32 s46, s20, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 23 -; VI-NEXT: s_lshr_b32 s46, s19, 24 -; VI-NEXT: s_add_i32 s18, s18, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 24 -; VI-NEXT: s_lshr_b32 s46, s19, 16 -; VI-NEXT: s_add_i32 s17, s17, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 25 -; VI-NEXT: s_lshr_b32 s46, s18, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 26 -; VI-NEXT: s_lshr_b32 s46, s17, 24 -; VI-NEXT: s_add_i32 s16, s16, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 27 -; VI-NEXT: s_lshr_b32 s46, s17, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 2 +; VI-NEXT: v_writelane_b32 v29, s47, 3 +; VI-NEXT: s_lshr_b64 s[46:47], s[26:27], 24 ; VI-NEXT: s_add_i32 s5, s5, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 28 -; VI-NEXT: s_lshr_b32 s46, s16, 16 -; VI-NEXT: v_writelane_b32 v33, s46, 29 -; VI-NEXT: s_lshr_b32 s46, s5, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 30 -; VI-NEXT: s_lshr_b32 s46, s5, 16 ; VI-NEXT: s_add_i32 s4, s4, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 31 -; VI-NEXT: s_lshr_b32 s46, s5, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 32 -; VI-NEXT: s_lshr_b32 s46, s4, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 0 +; VI-NEXT: v_writelane_b32 v29, s47, 1 +; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 ; VI-NEXT: s_add_i32 s7, s7, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 33 -; VI-NEXT: s_lshr_b32 s46, s4, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 34 -; VI-NEXT: s_lshr_b32 s46, s7, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 35 -; VI-NEXT: s_lshr_b32 s46, s7, 16 ; VI-NEXT: s_add_i32 s6, s6, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 36 -; VI-NEXT: s_lshr_b32 s46, s7, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 37 -; VI-NEXT: s_lshr_b32 s46, s6, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 20 +; VI-NEXT: v_writelane_b32 v29, s47, 21 +; VI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 ; VI-NEXT: s_add_i32 s9, s9, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 38 -; VI-NEXT: s_lshr_b32 s46, s6, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 39 -; VI-NEXT: s_lshr_b32 s46, s9, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 40 -; VI-NEXT: s_lshr_b32 s46, s9, 16 ; VI-NEXT: s_add_i32 s8, s8, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 41 -; VI-NEXT: s_lshr_b32 s46, s9, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 42 -; VI-NEXT: s_lshr_b32 s46, s8, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 18 +; VI-NEXT: v_writelane_b32 v29, s47, 19 +; VI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24 ; VI-NEXT: s_add_i32 s11, s11, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 43 -; VI-NEXT: s_lshr_b32 s46, s8, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 44 -; VI-NEXT: s_lshr_b32 s46, s11, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 45 -; VI-NEXT: s_lshr_b32 s46, s11, 16 ; VI-NEXT: s_add_i32 s10, s10, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 46 -; VI-NEXT: s_lshr_b32 s46, s11, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 47 -; VI-NEXT: s_lshr_b32 s46, s10, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 17 +; VI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24 ; VI-NEXT: s_add_i32 s13, s13, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 48 -; VI-NEXT: s_lshr_b32 s46, s10, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 49 -; VI-NEXT: s_lshr_b32 s46, s13, 24 -; VI-NEXT: v_writelane_b32 v33, s46, 50 -; VI-NEXT: s_lshr_b32 s46, s13, 16 ; VI-NEXT: s_add_i32 s12, s12, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 51 -; VI-NEXT: s_lshr_b32 s46, s13, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 52 -; VI-NEXT: s_lshr_b32 s46, s12, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 14 +; VI-NEXT: v_writelane_b32 v29, s47, 15 +; VI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24 ; VI-NEXT: s_add_i32 s15, s15, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 53 -; VI-NEXT: s_lshr_b32 s46, s12, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 54 -; VI-NEXT: s_lshr_b32 s46, s15, 24 ; VI-NEXT: s_add_i32 s14, s14, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 55 -; VI-NEXT: s_lshr_b32 s46, s15, 16 -; VI-NEXT: s_add_i32 s43, s43, 0x30000 -; VI-NEXT: s_add_i32 s42, s42, 0x30000 +; VI-NEXT: v_writelane_b32 v29, s46, 12 +; VI-NEXT: v_writelane_b32 v29, s47, 13 +; VI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24 ; VI-NEXT: s_add_i32 s41, s41, 0x30000 ; VI-NEXT: s_add_i32 s40, s40, 0x30000 -; VI-NEXT: v_writelane_b32 v33, s46, 56 -; VI-NEXT: s_lshr_b32 s46, s14, 16 -; VI-NEXT: s_lshr_b32 s71, s25, 8 -; VI-NEXT: s_lshr_b32 s87, s24, 8 -; VI-NEXT: s_lshr_b32 s86, s23, 8 -; VI-NEXT: s_lshr_b32 s64, s22, 8 -; VI-NEXT: s_lshr_b32 s66, s21, 8 -; VI-NEXT: s_lshr_b32 s54, s20, 8 -; VI-NEXT: s_lshr_b32 s82, s19, 8 -; VI-NEXT: s_lshr_b32 s81, s18, 8 -; VI-NEXT: s_lshr_b32 s67, s17, 8 -; VI-NEXT: s_lshr_b32 s68, s16, 8 -; VI-NEXT: s_lshr_b32 s69, s15, 8 -; VI-NEXT: v_writelane_b32 v33, s46, 57 -; VI-NEXT: s_lshr_b32 s83, s14, 8 -; VI-NEXT: s_lshr_b32 s84, s41, 24 -; VI-NEXT: s_lshr_b32 s80, s41, 16 -; VI-NEXT: s_lshr_b32 s51, s41, 8 -; VI-NEXT: s_lshr_b32 s50, s40, 16 -; VI-NEXT: s_lshr_b32 s85, s40, 8 -; VI-NEXT: s_lshr_b32 s55, s43, 24 -; VI-NEXT: s_lshr_b32 s65, s43, 16 -; VI-NEXT: s_lshr_b32 s52, s43, 8 -; VI-NEXT: s_lshr_b32 s53, s42, 16 -; VI-NEXT: s_lshr_b32 s70, s42, 8 -; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 -; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24 -; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 10 +; VI-NEXT: v_writelane_b32 v29, s47, 11 +; VI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24 +; VI-NEXT: s_add_i32 s43, s43, 0x30000 +; VI-NEXT: s_add_i32 s42, s42, 0x30000 +; VI-NEXT: v_writelane_b32 v29, s46, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 9 +; VI-NEXT: s_lshr_b64 s[46:47], s[42:43], 24 +; VI-NEXT: v_writelane_b32 v29, s46, 6 +; VI-NEXT: v_writelane_b32 v29, s47, 7 +; VI-NEXT: s_lshr_b32 s46, s45, 24 +; VI-NEXT: v_writelane_b32 v29, s46, 22 +; VI-NEXT: s_lshr_b32 s46, s27, 24 +; VI-NEXT: v_writelane_b32 v29, s46, 23 +; VI-NEXT: s_lshr_b32 s46, s27, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 24 +; VI-NEXT: s_lshr_b32 s46, s27, 8 +; VI-NEXT: v_writelane_b32 v29, s46, 25 +; VI-NEXT: s_lshr_b32 s46, s26, 16 +; VI-NEXT: s_add_i32 s25, s25, 0x30000 +; VI-NEXT: v_writelane_b32 v29, s46, 26 +; VI-NEXT: s_lshr_b32 s46, s26, 8 +; VI-NEXT: v_writelane_b32 v29, s46, 27 +; VI-NEXT: s_lshr_b32 s46, s25, 24 +; VI-NEXT: v_writelane_b32 v29, s46, 28 +; VI-NEXT: s_lshr_b32 s46, s25, 16 +; VI-NEXT: s_add_i32 s24, s24, 0x30000 +; VI-NEXT: v_writelane_b32 v29, s46, 29 +; VI-NEXT: s_lshr_b32 s46, s25, 8 +; VI-NEXT: v_writelane_b32 v29, s46, 30 +; VI-NEXT: s_lshr_b32 s46, s24, 16 +; VI-NEXT: s_add_i32 s23, s23, 0x30000 +; VI-NEXT: v_writelane_b32 v29, s46, 31 +; VI-NEXT: s_lshr_b32 s46, s24, 8 +; VI-NEXT: v_writelane_b32 v29, s46, 32 +; VI-NEXT: s_lshr_b32 s46, s23, 16 +; VI-NEXT: v_writelane_b32 v29, s46, 33 +; VI-NEXT: s_lshr_b32 s47, s5, 24 +; VI-NEXT: v_writelane_b32 v29, s47, 34 +; VI-NEXT: s_lshr_b32 s47, s5, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 35 +; VI-NEXT: s_lshr_b32 s47, s5, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 36 +; VI-NEXT: s_lshr_b32 s47, s4, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 37 +; VI-NEXT: s_lshr_b32 s47, s4, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 38 +; VI-NEXT: s_lshr_b32 s47, s7, 24 +; VI-NEXT: v_writelane_b32 v29, s47, 39 +; VI-NEXT: s_lshr_b32 s47, s7, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 40 +; VI-NEXT: s_lshr_b32 s47, s7, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 41 +; VI-NEXT: s_lshr_b32 s47, s6, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 42 +; VI-NEXT: s_lshr_b32 s47, s6, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 43 +; VI-NEXT: s_lshr_b32 s47, s9, 24 +; VI-NEXT: v_writelane_b32 v29, s47, 44 +; VI-NEXT: s_lshr_b32 s47, s9, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 45 +; VI-NEXT: s_lshr_b32 s47, s9, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 46 +; VI-NEXT: s_lshr_b32 s47, s8, 16 +; VI-NEXT: v_writelane_b32 v29, s47, 47 +; VI-NEXT: s_lshr_b32 s47, s8, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 48 +; VI-NEXT: s_lshr_b32 s47, s11, 24 +; VI-NEXT: v_writelane_b32 v29, s47, 49 +; VI-NEXT: s_lshr_b32 s47, s11, 16 +; VI-NEXT: s_add_i32 s17, s17, 0x30000 +; VI-NEXT: s_add_i32 s16, s16, 0x30000 +; VI-NEXT: s_add_i32 s19, s19, 0x30000 +; VI-NEXT: s_add_i32 s18, s18, 0x30000 +; VI-NEXT: s_add_i32 s21, s21, 0x30000 +; VI-NEXT: s_add_i32 s20, s20, 0x30000 +; VI-NEXT: s_add_i32 s22, s22, 0x30000 +; VI-NEXT: v_writelane_b32 v29, s47, 50 +; VI-NEXT: s_lshr_b32 s47, s11, 8 ; VI-NEXT: s_lshr_b64 s[30:31], s[24:25], 24 ; VI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24 ; VI-NEXT: s_lshr_b64 s[36:37], s[20:21], 24 ; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24 -; VI-NEXT: s_lshr_b64 s[48:49], s[16:17], 24 -; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24 -; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24 -; VI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24 -; VI-NEXT: s_lshr_b64 s[72:73], s[14:15], 24 -; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24 -; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24 +; VI-NEXT: s_lshr_b64 s[90:91], s[16:17], 24 +; VI-NEXT: v_writelane_b32 v29, s47, 51 +; VI-NEXT: s_lshr_b32 s47, s10, 16 +; VI-NEXT: s_lshr_b32 s31, s45, 16 +; VI-NEXT: s_lshr_b32 s35, s45, 8 +; VI-NEXT: s_lshr_b32 s37, s44, 16 +; VI-NEXT: s_lshr_b32 s39, s44, 8 +; VI-NEXT: s_lshr_b32 s49, s29, 24 +; VI-NEXT: s_lshr_b32 s48, s29, 16 +; VI-NEXT: s_lshr_b32 s71, s29, 8 +; VI-NEXT: s_lshr_b32 s91, s28, 16 +; VI-NEXT: s_lshr_b32 s70, s28, 8 +; VI-NEXT: s_lshr_b32 s67, s23, 24 +; VI-NEXT: s_lshr_b32 s60, s23, 8 +; VI-NEXT: s_lshr_b32 s59, s22, 16 +; VI-NEXT: s_lshr_b32 s85, s22, 8 +; VI-NEXT: s_lshr_b32 s63, s21, 24 +; VI-NEXT: s_lshr_b32 s83, s21, 16 +; VI-NEXT: s_lshr_b32 s87, s21, 8 +; VI-NEXT: s_lshr_b32 s86, s20, 16 +; VI-NEXT: s_lshr_b32 s74, s20, 8 +; VI-NEXT: s_lshr_b32 s52, s19, 24 +; VI-NEXT: s_lshr_b32 s51, s19, 16 +; VI-NEXT: s_lshr_b32 s77, s19, 8 +; VI-NEXT: s_lshr_b32 s78, s18, 16 +; VI-NEXT: s_lshr_b32 s64, s18, 8 +; VI-NEXT: s_lshr_b32 s54, s17, 24 +; VI-NEXT: s_lshr_b32 s66, s17, 16 +; VI-NEXT: s_lshr_b32 s46, s17, 8 +; VI-NEXT: s_lshr_b32 s89, s16, 16 +; VI-NEXT: s_lshr_b32 s69, s16, 8 +; VI-NEXT: v_writelane_b32 v29, s47, 52 +; VI-NEXT: s_lshr_b32 s81, s10, 8 +; VI-NEXT: s_lshr_b32 s61, s13, 24 +; VI-NEXT: s_lshr_b32 s68, s13, 16 +; VI-NEXT: s_lshr_b32 s82, s13, 8 +; VI-NEXT: s_lshr_b32 s62, s12, 16 +; VI-NEXT: s_lshr_b32 s84, s12, 8 +; VI-NEXT: s_lshr_b32 s72, s15, 24 +; VI-NEXT: s_lshr_b32 s73, s15, 16 +; VI-NEXT: s_lshr_b32 s53, s15, 8 +; VI-NEXT: s_lshr_b32 s75, s14, 16 +; VI-NEXT: s_lshr_b32 s76, s14, 8 +; VI-NEXT: s_lshr_b32 s50, s41, 24 +; VI-NEXT: s_lshr_b32 s55, s41, 16 +; VI-NEXT: s_lshr_b32 s79, s41, 8 +; VI-NEXT: s_lshr_b32 s65, s40, 16 +; VI-NEXT: s_lshr_b32 s56, s40, 8 +; VI-NEXT: s_lshr_b32 s57, s43, 24 +; VI-NEXT: s_lshr_b32 s88, s43, 16 +; VI-NEXT: s_lshr_b32 s47, s43, 8 +; VI-NEXT: s_lshr_b32 s80, s42, 16 +; VI-NEXT: s_lshr_b32 s58, s42, 8 ; VI-NEXT: .LBB99_3: ; %end -; VI-NEXT: v_mov_b32_e32 v2, s68 -; VI-NEXT: v_mov_b32_e32 v4, s67 ; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; VI-NEXT: v_perm_b32 v3, s16, v2, v1 -; VI-NEXT: v_perm_b32 v2, s17, v4, v1 -; VI-NEXT: v_mov_b32_e32 v4, s81 -; VI-NEXT: v_mov_b32_e32 v6, s82 -; VI-NEXT: v_perm_b32 v5, s18, v4, v1 -; VI-NEXT: v_perm_b32 v4, s19, v6, v1 -; VI-NEXT: v_mov_b32_e32 v6, s54 -; VI-NEXT: v_mov_b32_e32 v8, s66 -; VI-NEXT: v_perm_b32 v7, s20, v6, v1 -; VI-NEXT: v_perm_b32 v6, s21, v8, v1 -; VI-NEXT: v_mov_b32_e32 v8, s64 -; VI-NEXT: v_mov_b32_e32 v11, s86 -; VI-NEXT: v_perm_b32 v9, s22, v8, v1 -; VI-NEXT: v_perm_b32 v8, s23, v11, v1 -; VI-NEXT: v_mov_b32_e32 v11, s87 -; VI-NEXT: v_mov_b32_e32 v14, s71 -; VI-NEXT: v_readlane_b32 s16, v33, 14 -; VI-NEXT: v_perm_b32 v12, s24, v11, v1 -; VI-NEXT: v_perm_b32 v11, s25, v14, v1 -; VI-NEXT: v_mov_b32_e32 v14, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 12 -; VI-NEXT: v_mov_b32_e32 v17, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 9 -; VI-NEXT: v_perm_b32 v15, s26, v14, v1 -; VI-NEXT: v_perm_b32 v14, s27, v17, v1 -; VI-NEXT: v_mov_b32_e32 v17, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 7 -; VI-NEXT: v_mov_b32_e32 v10, s48 -; VI-NEXT: v_mov_b32_e32 v23, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 29 -; VI-NEXT: v_perm_b32 v10, s16, v10, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 27 -; VI-NEXT: v_mov_b32_e32 v24, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 28 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_perm_b32 v24, s16, v24, v1 -; VI-NEXT: v_or_b32_e32 v3, v3, v10 -; VI-NEXT: v_mov_b32_e32 v13, s38 -; VI-NEXT: v_readlane_b32 s16, v33, 26 -; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24 -; VI-NEXT: v_perm_b32 v13, s16, v13, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 24 +; VI-NEXT: v_mov_b32_e32 v3, s90 +; VI-NEXT: v_mov_b32_e32 v2, s69 +; VI-NEXT: v_perm_b32 v3, s89, v3, v1 +; VI-NEXT: v_perm_b32 v2, s16, v2, v1 +; VI-NEXT: v_mov_b32_e32 v5, s54 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v4, s46 +; VI-NEXT: v_perm_b32 v5, s66, v5, v1 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 +; VI-NEXT: v_perm_b32 v4, s17, v4, v1 +; VI-NEXT: v_mov_b32_e32 v7, s38 +; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v5 +; VI-NEXT: v_mov_b32_e32 v6, s64 +; VI-NEXT: v_perm_b32 v7, s78, v7, v1 +; VI-NEXT: v_or_b32_e32 v2, v4, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0 -; VI-NEXT: v_mov_b32_e32 v25, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 25 +; VI-NEXT: v_perm_b32 v6, s18, v6, v1 +; VI-NEXT: v_mov_b32_e32 v9, s52 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13 -; VI-NEXT: v_perm_b32 v25, s16, v25, v1 -; VI-NEXT: v_or_b32_e32 v2, v5, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v7 +; VI-NEXT: v_mov_b32_e32 v8, s77 +; VI-NEXT: v_perm_b32 v9, s51, v9, v1 +; VI-NEXT: v_or_b32_e32 v2, v6, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0 -; VI-NEXT: v_mov_b32_e32 v16, s36 -; VI-NEXT: v_readlane_b32 s16, v33, 23 +; VI-NEXT: v_perm_b32 v8, s19, v8, v1 +; VI-NEXT: v_mov_b32_e32 v11, s36 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25 -; VI-NEXT: v_perm_b32 v16, s16, v16, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 21 -; VI-NEXT: v_or_b32_e32 v2, v4, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9 +; VI-NEXT: v_mov_b32_e32 v10, s74 +; VI-NEXT: v_perm_b32 v11, s86, v11, v1 +; VI-NEXT: v_or_b32_e32 v2, v8, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 12, v0 -; VI-NEXT: v_mov_b32_e32 v26, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 22 +; VI-NEXT: v_perm_b32 v10, s20, v10, v1 +; VI-NEXT: v_mov_b32_e32 v13, s63 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16 -; VI-NEXT: v_perm_b32 v26, s16, v26, v1 -; VI-NEXT: v_or_b32_e32 v2, v7, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11 +; VI-NEXT: v_mov_b32_e32 v12, s87 +; VI-NEXT: v_perm_b32 v13, s83, v13, v1 +; VI-NEXT: v_mov_b32_e32 v17, s67 +; VI-NEXT: v_readlane_b32 s16, v29, 33 +; VI-NEXT: v_or_b32_e32 v2, v10, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 16, v0 -; VI-NEXT: v_mov_b32_e32 v19, s34 -; VI-NEXT: v_readlane_b32 s16, v33, 20 +; VI-NEXT: v_perm_b32 v12, s21, v12, v1 +; VI-NEXT: v_mov_b32_e32 v15, s34 +; VI-NEXT: v_perm_b32 v17, s16, v17, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 32 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26 -; VI-NEXT: v_perm_b32 v19, s16, v19, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 18 -; VI-NEXT: v_or_b32_e32 v2, v6, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13 +; VI-NEXT: v_mov_b32_e32 v14, s85 +; VI-NEXT: v_perm_b32 v15, s59, v15, v1 +; VI-NEXT: v_mov_b32_e32 v18, s16 +; VI-NEXT: v_mov_b32_e32 v19, s30 +; VI-NEXT: v_readlane_b32 s16, v29, 31 +; VI-NEXT: v_or_b32_e32 v2, v12, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 20, v0 -; VI-NEXT: v_mov_b32_e32 v27, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 19 +; VI-NEXT: v_perm_b32 v14, s22, v14, v1 +; VI-NEXT: v_perm_b32 v19, s16, v19, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 30 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19 -; VI-NEXT: v_perm_b32 v27, s16, v27, v1 -; VI-NEXT: v_or_b32_e32 v2, v9, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v15 +; VI-NEXT: v_mov_b32_e32 v16, s60 +; VI-NEXT: v_mov_b32_e32 v20, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 28 +; VI-NEXT: v_or_b32_e32 v2, v14, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 24, v0 -; VI-NEXT: v_mov_b32_e32 v20, s30 -; VI-NEXT: v_readlane_b32 s16, v33, 17 +; VI-NEXT: v_perm_b32 v16, s23, v16, v1 +; VI-NEXT: v_mov_b32_e32 v21, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 29 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27 -; VI-NEXT: v_perm_b32 v20, s16, v20, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 15 -; VI-NEXT: v_or_b32_e32 v2, v8, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17 +; VI-NEXT: v_perm_b32 v21, s16, v21, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 27 +; VI-NEXT: v_or_b32_e32 v2, v16, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 28, v0 -; VI-NEXT: v_mov_b32_e32 v28, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 16 +; VI-NEXT: v_perm_b32 v18, s24, v18, v1 +; VI-NEXT: v_mov_b32_e32 v22, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 0 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20 -; VI-NEXT: v_perm_b32 v28, s16, v28, v1 -; VI-NEXT: v_or_b32_e32 v2, v12, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19 +; VI-NEXT: v_mov_b32_e32 v23, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 26 +; VI-NEXT: v_or_b32_e32 v2, v18, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0 -; VI-NEXT: v_mov_b32_e32 v21, s90 -; VI-NEXT: v_readlane_b32 s16, v33, 13 +; VI-NEXT: v_perm_b32 v20, s25, v20, v1 +; VI-NEXT: v_perm_b32 v23, s16, v23, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 25 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28 -; VI-NEXT: v_perm_b32 v21, s16, v21, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 10 -; VI-NEXT: v_or_b32_e32 v2, v11, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21 +; VI-NEXT: v_mov_b32_e32 v24, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 23 +; VI-NEXT: v_or_b32_e32 v2, v20, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 36, v0 -; VI-NEXT: v_mov_b32_e32 v29, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 11 +; VI-NEXT: v_perm_b32 v22, s26, v22, v1 +; VI-NEXT: v_mov_b32_e32 v25, s16 +; VI-NEXT: v_readlane_b32 s16, v29, 24 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21 -; VI-NEXT: v_perm_b32 v29, s16, v29, v1 -; VI-NEXT: v_or_b32_e32 v2, v15, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v23 +; VI-NEXT: v_readlane_b32 s17, v29, 1 +; VI-NEXT: v_perm_b32 v25, s16, v25, v1 +; VI-NEXT: v_or_b32_e32 v2, v22, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 40, v0 -; VI-NEXT: v_mov_b32_e32 v22, s88 -; VI-NEXT: v_readlane_b32 s16, v33, 8 +; VI-NEXT: v_perm_b32 v24, s27, v24, v1 +; VI-NEXT: v_readlane_b32 s16, v29, 2 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29 -; VI-NEXT: v_perm_b32 v22, s16, v22, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 5 -; VI-NEXT: v_or_b32_e32 v2, v14, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25 +; VI-NEXT: v_mov_b32_e32 v27, s16 +; VI-NEXT: v_or_b32_e32 v2, v24, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 44, v0 -; VI-NEXT: v_perm_b32 v18, s28, v17, v1 -; VI-NEXT: v_mov_b32_e32 v30, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 6 +; VI-NEXT: v_mov_b32_e32 v26, s70 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22 -; VI-NEXT: v_perm_b32 v30, s16, v30, v1 -; VI-NEXT: v_readlane_b32 s16, v33, 4 -; VI-NEXT: v_or_b32_e32 v2, v18, v2 +; VI-NEXT: v_perm_b32 v2, s91, v27, v1 +; VI-NEXT: v_perm_b32 v26, s28, v26, v1 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v2, v26, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 48, v0 -; VI-NEXT: v_perm_b32 v17, s29, v23, v1 -; VI-NEXT: v_mov_b32_e32 v23, s78 -; VI-NEXT: v_mov_b32_e32 v31, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 3 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30 -; VI-NEXT: v_perm_b32 v23, s16, v23, v1 -; VI-NEXT: v_or_b32_e32 v2, v17, v2 +; VI-NEXT: v_mov_b32_e32 v3, s49 +; VI-NEXT: v_mov_b32_e32 v2, s71 +; VI-NEXT: v_perm_b32 v3, s48, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 3 +; VI-NEXT: v_perm_b32 v2, s29, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 52, v0 +; VI-NEXT: v_readlane_b32 s16, v29, 4 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, s44, v31, v1 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v23 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s39 +; VI-NEXT: v_perm_b32 v3, s37, v3, v1 +; VI-NEXT: v_perm_b32 v2, s44, v2, v1 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0 -; VI-NEXT: v_readlane_b32 s16, v33, 2 +; VI-NEXT: v_readlane_b32 s16, v29, 22 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 0 ; VI-NEXT: v_mov_b32_e32 v3, s16 -; VI-NEXT: v_readlane_b32 s16, v33, 1 -; VI-NEXT: v_perm_b32 v3, s16, v3, v1 +; VI-NEXT: v_mov_b32_e32 v2, s35 +; VI-NEXT: v_perm_b32 v3, s31, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 5 ; VI-NEXT: v_perm_b32 v2, s45, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 60, v0 +; VI-NEXT: v_readlane_b32 s16, v29, 6 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v3, s76 -; VI-NEXT: v_mov_b32_e32 v2, s70 -; VI-NEXT: v_perm_b32 v3, s53, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s58 +; VI-NEXT: v_perm_b32 v3, s80, v3, v1 ; VI-NEXT: v_perm_b32 v2, s42, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 64, v0 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v3, s55 -; VI-NEXT: v_mov_b32_e32 v2, s52 -; VI-NEXT: v_perm_b32 v3, s65, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s57 +; VI-NEXT: v_mov_b32_e32 v2, s47 +; VI-NEXT: v_perm_b32 v3, s88, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 7 ; VI-NEXT: v_perm_b32 v2, s43, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x44, v0 +; VI-NEXT: v_readlane_b32 s16, v29, 8 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v3, s74 -; VI-NEXT: v_mov_b32_e32 v2, s85 -; VI-NEXT: v_perm_b32 v3, s50, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s56 +; VI-NEXT: v_perm_b32 v3, s65, v3, v1 ; VI-NEXT: v_perm_b32 v2, s40, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x48, v0 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v3, s84 -; VI-NEXT: v_mov_b32_e32 v2, s51 -; VI-NEXT: v_perm_b32 v3, s80, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s50 +; VI-NEXT: v_mov_b32_e32 v2, s79 +; VI-NEXT: v_perm_b32 v3, s55, v3, v1 +; VI-NEXT: v_readlane_b32 s17, v29, 9 ; VI-NEXT: v_perm_b32 v2, s41, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x4c, v0 +; VI-NEXT: v_readlane_b32 s16, v29, 10 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s83 +; VI-NEXT: v_mov_b32_e32 v3, s16 +; VI-NEXT: v_mov_b32_e32 v2, s76 +; VI-NEXT: v_perm_b32 v3, s75, v3, v1 ; VI-NEXT: v_perm_b32 v2, s14, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s72 -; VI-NEXT: v_readlane_b32 s14, v33, 57 -; VI-NEXT: v_perm_b32 v3, s14, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x50, v0 -; VI-NEXT: v_readlane_b32 s14, v33, 55 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v3, s14 -; VI-NEXT: v_readlane_b32 s14, v33, 56 -; VI-NEXT: v_mov_b32_e32 v2, s69 -; VI-NEXT: v_perm_b32 v3, s14, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s72 +; VI-NEXT: v_mov_b32_e32 v2, s53 +; VI-NEXT: v_perm_b32 v3, s73, v3, v1 ; VI-NEXT: v_perm_b32 v2, s15, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x54, v0 -; VI-NEXT: v_readlane_b32 s14, v33, 54 +; VI-NEXT: v_readlane_b32 s14, v29, 12 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s14 +; VI-NEXT: v_mov_b32_e32 v3, s14 +; VI-NEXT: v_mov_b32_e32 v2, s84 +; VI-NEXT: v_perm_b32 v3, s62, v3, v1 ; VI-NEXT: v_perm_b32 v2, s12, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s62 -; VI-NEXT: v_readlane_b32 s12, v33, 53 -; VI-NEXT: v_perm_b32 v3, s12, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x58, v0 -; VI-NEXT: v_readlane_b32 s12, v33, 52 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s12 -; VI-NEXT: v_readlane_b32 s12, v33, 50 -; VI-NEXT: v_mov_b32_e32 v3, s12 -; VI-NEXT: v_readlane_b32 s12, v33, 51 -; VI-NEXT: v_perm_b32 v3, s12, v3, v1 +; VI-NEXT: v_mov_b32_e32 v3, s61 +; VI-NEXT: v_mov_b32_e32 v2, s82 +; VI-NEXT: v_perm_b32 v3, s68, v3, v1 ; VI-NEXT: v_perm_b32 v2, s13, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x5c, v0 -; VI-NEXT: v_readlane_b32 s12, v33, 49 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; VI-NEXT: v_mov_b32_e32 v2, s12 +; VI-NEXT: v_mov_b32_e32 v2, s81 +; VI-NEXT: v_readlane_b32 s12, v29, 14 ; VI-NEXT: v_perm_b32 v2, s10, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s60 -; VI-NEXT: v_readlane_b32 s10, v33, 48 +; VI-NEXT: v_mov_b32_e32 v3, s12 +; VI-NEXT: v_readlane_b32 s10, v29, 52 ; VI-NEXT: v_perm_b32 v3, s10, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x60, v0 -; VI-NEXT: v_readlane_b32 s10, v33, 47 +; VI-NEXT: v_readlane_b32 s10, v29, 51 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; VI-NEXT: v_mov_b32_e32 v2, s10 -; VI-NEXT: v_readlane_b32 s10, v33, 45 +; VI-NEXT: v_readlane_b32 s10, v29, 49 ; VI-NEXT: v_mov_b32_e32 v3, s10 -; VI-NEXT: v_readlane_b32 s10, v33, 46 +; VI-NEXT: v_readlane_b32 s10, v29, 50 ; VI-NEXT: v_perm_b32 v3, s10, v3, v1 ; VI-NEXT: v_perm_b32 v2, s11, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x64, v0 -; VI-NEXT: v_readlane_b32 s10, v33, 44 +; VI-NEXT: v_readlane_b32 s10, v29, 48 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; VI-NEXT: v_mov_b32_e32 v2, s10 +; VI-NEXT: v_readlane_b32 s10, v29, 16 ; VI-NEXT: v_perm_b32 v2, s8, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s58 -; VI-NEXT: v_readlane_b32 s8, v33, 43 +; VI-NEXT: v_mov_b32_e32 v3, s10 +; VI-NEXT: v_readlane_b32 s8, v29, 47 ; VI-NEXT: v_perm_b32 v3, s8, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x68, v0 -; VI-NEXT: v_readlane_b32 s8, v33, 42 +; VI-NEXT: v_readlane_b32 s8, v29, 46 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; VI-NEXT: v_mov_b32_e32 v2, s8 -; VI-NEXT: v_readlane_b32 s8, v33, 40 +; VI-NEXT: v_readlane_b32 s8, v29, 44 ; VI-NEXT: v_mov_b32_e32 v3, s8 -; VI-NEXT: v_readlane_b32 s8, v33, 41 +; VI-NEXT: v_readlane_b32 s8, v29, 45 ; VI-NEXT: v_perm_b32 v3, s8, v3, v1 ; VI-NEXT: v_perm_b32 v2, s9, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x6c, v0 -; VI-NEXT: v_readlane_b32 s8, v33, 39 +; VI-NEXT: v_readlane_b32 s8, v29, 43 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; VI-NEXT: v_mov_b32_e32 v2, s8 +; VI-NEXT: v_readlane_b32 s8, v29, 18 ; VI-NEXT: v_perm_b32 v2, s6, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s56 -; VI-NEXT: v_readlane_b32 s6, v33, 38 +; VI-NEXT: v_mov_b32_e32 v3, s8 +; VI-NEXT: v_readlane_b32 s6, v29, 42 ; VI-NEXT: v_perm_b32 v3, s6, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x70, v0 -; VI-NEXT: v_readlane_b32 s6, v33, 37 +; VI-NEXT: v_readlane_b32 s6, v29, 41 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; VI-NEXT: v_mov_b32_e32 v2, s6 -; VI-NEXT: v_readlane_b32 s6, v33, 35 +; VI-NEXT: v_readlane_b32 s6, v29, 39 ; VI-NEXT: v_mov_b32_e32 v3, s6 -; VI-NEXT: v_readlane_b32 s6, v33, 36 +; VI-NEXT: v_readlane_b32 s6, v29, 40 ; VI-NEXT: v_perm_b32 v3, s6, v3, v1 ; VI-NEXT: v_perm_b32 v2, s7, v2, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x74, v0 -; VI-NEXT: v_readlane_b32 s6, v33, 34 +; VI-NEXT: v_readlane_b32 s6, v29, 38 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; VI-NEXT: v_mov_b32_e32 v2, s6 +; VI-NEXT: v_readlane_b32 s6, v29, 20 ; VI-NEXT: v_perm_b32 v2, s4, v2, v1 -; VI-NEXT: v_mov_b32_e32 v3, s46 -; VI-NEXT: v_readlane_b32 s4, v33, 33 +; VI-NEXT: v_mov_b32_e32 v3, s6 +; VI-NEXT: v_readlane_b32 s4, v29, 37 ; VI-NEXT: v_perm_b32 v3, s4, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v2, v2, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x78, v0 -; VI-NEXT: v_readlane_b32 s4, v33, 32 +; VI-NEXT: v_readlane_b32 s4, v29, 36 ; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; VI-NEXT: v_mov_b32_e32 v2, s4 -; VI-NEXT: v_readlane_b32 s4, v33, 30 +; VI-NEXT: v_readlane_b32 s4, v29, 34 ; VI-NEXT: v_mov_b32_e32 v3, s4 -; VI-NEXT: v_readlane_b32 s4, v33, 31 +; VI-NEXT: v_readlane_b32 s4, v29, 35 ; VI-NEXT: v_perm_b32 v2, s5, v2, v1 ; VI-NEXT: v_perm_b32 v1, s4, v3, v1 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0 -; VI-NEXT: v_readlane_b32 s30, v32, 30 +; VI-NEXT: v_readlane_b32 s30, v28, 30 +; VI-NEXT: v_readlane_b32 s17, v29, 11 +; VI-NEXT: v_readlane_b32 s15, v29, 13 +; VI-NEXT: v_readlane_b32 s13, v29, 15 +; VI-NEXT: v_readlane_b32 s11, v29, 17 +; VI-NEXT: v_readlane_b32 s9, v29, 19 +; VI-NEXT: v_readlane_b32 s7, v29, 21 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_readlane_b32 s31, v32, 31 -; VI-NEXT: v_readlane_b32 s87, v32, 29 -; VI-NEXT: v_readlane_b32 s86, v32, 28 -; VI-NEXT: v_readlane_b32 s85, v32, 27 -; VI-NEXT: v_readlane_b32 s84, v32, 26 -; VI-NEXT: v_readlane_b32 s83, v32, 25 -; VI-NEXT: v_readlane_b32 s82, v32, 24 -; VI-NEXT: v_readlane_b32 s81, v32, 23 -; VI-NEXT: v_readlane_b32 s80, v32, 22 -; VI-NEXT: v_readlane_b32 s71, v32, 21 -; VI-NEXT: v_readlane_b32 s70, v32, 20 -; VI-NEXT: v_readlane_b32 s69, v32, 19 -; VI-NEXT: v_readlane_b32 s68, v32, 18 -; VI-NEXT: v_readlane_b32 s67, v32, 17 -; VI-NEXT: v_readlane_b32 s66, v32, 16 -; VI-NEXT: v_readlane_b32 s65, v32, 15 -; VI-NEXT: v_readlane_b32 s64, v32, 14 -; VI-NEXT: v_readlane_b32 s55, v32, 13 -; VI-NEXT: v_readlane_b32 s54, v32, 12 -; VI-NEXT: v_readlane_b32 s53, v32, 11 -; VI-NEXT: v_readlane_b32 s52, v32, 10 -; VI-NEXT: v_readlane_b32 s51, v32, 9 -; VI-NEXT: v_readlane_b32 s50, v32, 8 -; VI-NEXT: v_readlane_b32 s49, v32, 7 -; VI-NEXT: v_readlane_b32 s48, v32, 6 -; VI-NEXT: v_readlane_b32 s39, v32, 5 -; VI-NEXT: v_readlane_b32 s38, v32, 4 -; VI-NEXT: v_readlane_b32 s37, v32, 3 -; VI-NEXT: v_readlane_b32 s36, v32, 2 -; VI-NEXT: v_readlane_b32 s35, v32, 1 -; VI-NEXT: v_readlane_b32 s34, v32, 0 +; VI-NEXT: v_readlane_b32 s31, v28, 31 +; VI-NEXT: v_readlane_b32 s87, v28, 29 +; VI-NEXT: v_readlane_b32 s86, v28, 28 +; VI-NEXT: v_readlane_b32 s85, v28, 27 +; VI-NEXT: v_readlane_b32 s84, v28, 26 +; VI-NEXT: v_readlane_b32 s83, v28, 25 +; VI-NEXT: v_readlane_b32 s82, v28, 24 +; VI-NEXT: v_readlane_b32 s81, v28, 23 +; VI-NEXT: v_readlane_b32 s80, v28, 22 +; VI-NEXT: v_readlane_b32 s71, v28, 21 +; VI-NEXT: v_readlane_b32 s70, v28, 20 +; VI-NEXT: v_readlane_b32 s69, v28, 19 +; VI-NEXT: v_readlane_b32 s68, v28, 18 +; VI-NEXT: v_readlane_b32 s67, v28, 17 +; VI-NEXT: v_readlane_b32 s66, v28, 16 +; VI-NEXT: v_readlane_b32 s65, v28, 15 +; VI-NEXT: v_readlane_b32 s64, v28, 14 +; VI-NEXT: v_readlane_b32 s55, v28, 13 +; VI-NEXT: v_readlane_b32 s54, v28, 12 +; VI-NEXT: v_readlane_b32 s53, v28, 11 +; VI-NEXT: v_readlane_b32 s52, v28, 10 +; VI-NEXT: v_readlane_b32 s51, v28, 9 +; VI-NEXT: v_readlane_b32 s50, v28, 8 +; VI-NEXT: v_readlane_b32 s49, v28, 7 +; VI-NEXT: v_readlane_b32 s48, v28, 6 +; VI-NEXT: v_readlane_b32 s39, v28, 5 +; VI-NEXT: v_readlane_b32 s38, v28, 4 +; VI-NEXT: v_readlane_b32 s37, v28, 3 +; VI-NEXT: v_readlane_b32 s36, v28, 2 +; VI-NEXT: v_readlane_b32 s35, v28, 1 +; VI-NEXT: v_readlane_b32 s34, v28, 0 ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB99_4: +; VI-NEXT: ; implicit-def: $sgpr56 +; VI-NEXT: ; implicit-def: $sgpr63 +; VI-NEXT: ; implicit-def: $sgpr62 +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr69 +; VI-NEXT: ; implicit-def: $sgpr89 +; VI-NEXT: ; implicit-def: $sgpr90 ; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr68 -; VI-NEXT: ; implicit-def: $sgpr67 -; VI-NEXT: ; implicit-def: $sgpr81 -; VI-NEXT: ; implicit-def: $sgpr82 -; VI-NEXT: ; implicit-def: $sgpr54 ; VI-NEXT: ; implicit-def: $sgpr66 +; VI-NEXT: ; implicit-def: $sgpr54 ; VI-NEXT: ; implicit-def: $sgpr64 +; VI-NEXT: ; implicit-def: $sgpr78 +; VI-NEXT: ; implicit-def: $sgpr38 +; VI-NEXT: ; implicit-def: $sgpr77 +; VI-NEXT: ; implicit-def: $sgpr51 +; VI-NEXT: ; implicit-def: $sgpr52 +; VI-NEXT: ; implicit-def: $sgpr74 ; VI-NEXT: ; implicit-def: $sgpr86 +; VI-NEXT: ; implicit-def: $sgpr36 ; VI-NEXT: ; implicit-def: $sgpr87 -; VI-NEXT: ; implicit-def: $sgpr71 -; VI-NEXT: ; implicit-def: $sgpr70 -; VI-NEXT: ; implicit-def: $sgpr53 -; VI-NEXT: ; implicit-def: $sgpr52 -; VI-NEXT: ; implicit-def: $sgpr65 -; VI-NEXT: ; implicit-def: $sgpr55 -; VI-NEXT: ; implicit-def: $sgpr85 -; VI-NEXT: ; implicit-def: $sgpr50 -; VI-NEXT: ; implicit-def: $sgpr51 -; VI-NEXT: ; implicit-def: $sgpr80 -; VI-NEXT: ; implicit-def: $sgpr84 ; VI-NEXT: ; implicit-def: $sgpr83 -; VI-NEXT: ; implicit-def: $sgpr69 -; VI-NEXT: ; implicit-def: $sgpr48 -; VI-NEXT: ; implicit-def: $sgpr38 -; VI-NEXT: ; implicit-def: $sgpr36 +; VI-NEXT: ; implicit-def: $sgpr85 +; VI-NEXT: ; implicit-def: $sgpr59 ; VI-NEXT: ; implicit-def: $sgpr34 +; VI-NEXT: ; implicit-def: $sgpr60 +; VI-NEXT: ; implicit-def: $sgpr67 ; VI-NEXT: ; implicit-def: $sgpr30 -; VI-NEXT: ; implicit-def: $sgpr90 +; VI-NEXT: ; implicit-def: $sgpr70 +; VI-NEXT: ; implicit-def: $sgpr91 +; VI-NEXT: ; implicit-def: $sgpr71 +; VI-NEXT: ; implicit-def: $sgpr48 +; VI-NEXT: ; implicit-def: $sgpr49 +; VI-NEXT: ; implicit-def: $sgpr39 +; VI-NEXT: ; implicit-def: $sgpr37 +; VI-NEXT: ; implicit-def: $sgpr35 +; VI-NEXT: ; implicit-def: $sgpr31 +; VI-NEXT: ; implicit-def: $sgpr58 +; VI-NEXT: ; implicit-def: $sgpr80 ; VI-NEXT: ; implicit-def: $sgpr88 -; VI-NEXT: ; implicit-def: $sgpr78 +; VI-NEXT: ; implicit-def: $sgpr65 +; VI-NEXT: ; implicit-def: $sgpr79 +; VI-NEXT: ; implicit-def: $sgpr55 +; VI-NEXT: ; implicit-def: $sgpr50 ; VI-NEXT: ; implicit-def: $sgpr76 -; VI-NEXT: ; implicit-def: $sgpr74 +; VI-NEXT: ; implicit-def: $sgpr75 +; VI-NEXT: ; implicit-def: $sgpr53 +; VI-NEXT: ; implicit-def: $sgpr73 ; VI-NEXT: ; implicit-def: $sgpr72 +; VI-NEXT: ; implicit-def: $sgpr84 +; VI-NEXT: ; implicit-def: $sgpr82 +; VI-NEXT: ; implicit-def: $sgpr68 +; VI-NEXT: ; implicit-def: $sgpr61 +; VI-NEXT: ; implicit-def: $sgpr81 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: v_writelane_b32 v29, s56, 0 +; VI-NEXT: v_writelane_b32 v29, s57, 1 +; VI-NEXT: ; implicit-def: $sgpr56 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: v_writelane_b32 v29, s56, 2 +; VI-NEXT: v_writelane_b32 v29, s57, 3 +; VI-NEXT: ; implicit-def: $sgpr56 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: v_writelane_b32 v29, s56, 4 +; VI-NEXT: v_writelane_b32 v29, s57, 5 +; VI-NEXT: ; implicit-def: $sgpr56 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: v_writelane_b32 v29, s56, 6 +; VI-NEXT: v_writelane_b32 v29, s57, 7 +; VI-NEXT: v_writelane_b32 v29, s62, 8 +; VI-NEXT: v_writelane_b32 v29, s63, 9 ; VI-NEXT: ; implicit-def: $sgpr62 -; VI-NEXT: ; implicit-def: $sgpr60 -; VI-NEXT: ; implicit-def: $sgpr58 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: v_writelane_b32 v29, s62, 10 +; VI-NEXT: v_writelane_b32 v29, s63, 11 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 12 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 13 +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 14 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 15 +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr47 +; VI-NEXT: ; implicit-def: $sgpr57 ; VI-NEXT: ; implicit-def: $sgpr56 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 -; VI-NEXT: ; kill: killed $sgpr46 -; VI-NEXT: ; implicit-def: $sgpr46 +; VI-NEXT: ; implicit-def: $sgpr62 +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 16 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 17 +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 18 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 19 +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: v_writelane_b32 v29, vcc_lo, 20 +; VI-NEXT: v_writelane_b32 v29, vcc_hi, 21 +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo +; VI-NEXT: ; implicit-def: $vcc_lo +; VI-NEXT: ; kill: killed $vcc_lo ; VI-NEXT: s_branch .LBB99_2 ; ; GFX9-LABEL: bitcast_v64i16_to_v128i8_scalar: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -205005,26 +205400,30 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX9-NEXT: v_writelane_b32 v62, s46, 11 ; GFX9-NEXT: s_lshr_b32 s46, s16, 8 ; GFX9-NEXT: v_writelane_b32 v62, s46, 10 -; GFX9-NEXT: s_lshr_b32 s46, s7, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 9 -; GFX9-NEXT: s_lshr_b32 s46, s7, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 8 -; GFX9-NEXT: s_lshr_b32 s46, s7, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 7 -; GFX9-NEXT: s_lshr_b32 s46, s6, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 6 -; GFX9-NEXT: s_lshr_b32 s46, s6, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 5 -; GFX9-NEXT: s_lshr_b32 s46, s9, 24 -; GFX9-NEXT: v_writelane_b32 v62, s46, 4 -; GFX9-NEXT: s_lshr_b32 s46, s9, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 3 -; GFX9-NEXT: s_lshr_b32 s46, s9, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 2 -; GFX9-NEXT: s_lshr_b32 s46, s8, 16 -; GFX9-NEXT: v_writelane_b32 v62, s46, 1 -; GFX9-NEXT: s_lshr_b32 s46, s8, 8 -; GFX9-NEXT: v_writelane_b32 v62, s46, 0 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[24:25], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 8 +; GFX9-NEXT: v_writelane_b32 v62, s79, 9 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[22:23], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 6 +; GFX9-NEXT: v_writelane_b32 v62, s79, 7 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[20:21], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 4 +; GFX9-NEXT: v_writelane_b32 v62, s79, 5 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[18:19], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 2 +; GFX9-NEXT: v_writelane_b32 v62, s79, 3 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[16:17], 24 +; GFX9-NEXT: v_writelane_b32 v62, s78, 0 +; GFX9-NEXT: s_lshr_b32 s64, s7, 24 +; GFX9-NEXT: s_lshr_b32 s65, s7, 16 +; GFX9-NEXT: s_lshr_b32 s67, s7, 8 +; GFX9-NEXT: s_lshr_b32 s66, s6, 16 +; GFX9-NEXT: s_lshr_b32 s68, s6, 8 +; GFX9-NEXT: s_lshr_b32 s69, s9, 24 +; GFX9-NEXT: s_lshr_b32 s70, s9, 16 +; GFX9-NEXT: s_lshr_b32 s80, s9, 8 +; GFX9-NEXT: s_lshr_b32 s71, s8, 16 +; GFX9-NEXT: s_lshr_b32 s81, s8, 8 ; GFX9-NEXT: s_lshr_b32 s82, s11, 24 ; GFX9-NEXT: s_lshr_b32 s83, s11, 16 ; GFX9-NEXT: s_lshr_b32 s85, s11, 8 @@ -205045,321 +205444,303 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s54, s41, 8 ; GFX9-NEXT: s_lshr_b32 s53, s40, 16 ; GFX9-NEXT: s_lshr_b32 s55, s40, 8 -; GFX9-NEXT: s_lshr_b32 s64, s43, 24 -; GFX9-NEXT: s_lshr_b32 s65, s43, 16 -; GFX9-NEXT: s_lshr_b32 s67, s43, 8 -; GFX9-NEXT: s_lshr_b32 s66, s42, 16 -; GFX9-NEXT: s_lshr_b32 s68, s42, 8 -; GFX9-NEXT: s_lshr_b32 s69, s45, 24 -; GFX9-NEXT: s_lshr_b32 s70, s45, 16 -; GFX9-NEXT: s_lshr_b32 s80, s45, 8 -; GFX9-NEXT: s_lshr_b32 s71, s44, 16 -; GFX9-NEXT: s_lshr_b32 s81, s44, 8 -; GFX9-NEXT: s_lshr_b64 s[46:47], s[4:5], 24 -; GFX9-NEXT: s_lshr_b64 s[56:57], s[28:29], 24 -; GFX9-NEXT: s_lshr_b64 s[58:59], s[26:27], 24 -; GFX9-NEXT: s_lshr_b64 s[60:61], s[24:25], 24 -; GFX9-NEXT: s_lshr_b64 s[62:63], s[22:23], 24 -; GFX9-NEXT: s_lshr_b64 s[72:73], s[20:21], 24 -; GFX9-NEXT: s_lshr_b64 s[74:75], s[18:19], 24 -; GFX9-NEXT: s_lshr_b64 s[76:77], s[16:17], 24 -; GFX9-NEXT: s_lshr_b64 s[78:79], s[6:7], 24 -; GFX9-NEXT: s_lshr_b64 s[88:89], s[8:9], 24 -; GFX9-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 -; GFX9-NEXT: s_lshr_b64 s[92:93], s[12:13], 24 -; GFX9-NEXT: s_lshr_b64 s[94:95], s[14:15], 24 -; GFX9-NEXT: s_lshr_b64 s[30:31], s[40:41], 24 -; GFX9-NEXT: s_lshr_b64 s[34:35], s[42:43], 24 -; GFX9-NEXT: s_lshr_b64 s[36:37], s[44:45], 24 +; GFX9-NEXT: s_lshr_b32 s46, s43, 24 +; GFX9-NEXT: s_lshr_b32 s47, s43, 16 +; GFX9-NEXT: s_lshr_b32 s57, s43, 8 +; GFX9-NEXT: s_lshr_b32 s56, s42, 16 +; GFX9-NEXT: s_lshr_b32 s58, s42, 8 +; GFX9-NEXT: s_lshr_b32 s59, s45, 24 +; GFX9-NEXT: s_lshr_b32 s60, s45, 16 +; GFX9-NEXT: s_lshr_b32 s62, s45, 8 +; GFX9-NEXT: s_lshr_b32 s61, s44, 16 +; GFX9-NEXT: s_lshr_b32 s63, s44, 8 +; GFX9-NEXT: s_lshr_b64 s[76:77], s[4:5], 24 +; GFX9-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX9-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 +; GFX9-NEXT: v_writelane_b32 v62, s79, 1 +; GFX9-NEXT: s_lshr_b64 s[36:37], s[6:7], 24 +; GFX9-NEXT: s_lshr_b64 s[34:35], s[8:9], 24 +; GFX9-NEXT: s_lshr_b64 s[30:31], s[10:11], 24 +; GFX9-NEXT: s_lshr_b64 s[94:95], s[12:13], 24 +; GFX9-NEXT: s_lshr_b64 s[92:93], s[14:15], 24 +; GFX9-NEXT: s_lshr_b64 s[90:91], s[40:41], 24 +; GFX9-NEXT: s_lshr_b64 s[88:89], s[42:43], 24 +; GFX9-NEXT: s_lshr_b64 s[78:79], s[44:45], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB99_4 ; GFX9-NEXT: .LBB99_2: ; %cmp.true -; GFX9-NEXT: v_pk_add_u16 v26, s5, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v25, s4, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[25:26] -; GFX9-NEXT: v_pk_add_u16 v28, s29, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v27, s28, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[27:28] -; GFX9-NEXT: v_pk_add_u16 v30, s27, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v29, s26, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[29:30] -; GFX9-NEXT: v_pk_add_u16 v32, s25, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v31, s24, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[31:32] -; GFX9-NEXT: v_pk_add_u16 v34, s23, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v33, s22, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[33:34] -; GFX9-NEXT: v_pk_add_u16 v38, s19, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v36, s21, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v35, s20, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[35:36] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v38 -; GFX9-NEXT: v_pk_add_u16 v49, s17, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v38 +; GFX9-NEXT: v_pk_add_u16 v18, s5, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v17, s4, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18] +; GFX9-NEXT: v_pk_add_u16 v20, s29, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v19, s28, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20] +; GFX9-NEXT: v_pk_add_u16 v22, s27, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v21, s26, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22] +; GFX9-NEXT: v_pk_add_u16 v24, s25, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v23, s24, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24] ; GFX9-NEXT: v_pk_add_u16 v2, s7, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v1, s6, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v49 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v49 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2] ; GFX9-NEXT: v_pk_add_u16 v4, s9, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v1 ; GFX9-NEXT: v_pk_add_u16 v3, s8, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v4 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v4 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4] ; GFX9-NEXT: v_pk_add_u16 v6, s11, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v5, s10, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v3 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v3 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v6 -; GFX9-NEXT: v_pk_add_u16 v8, s13, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v7, s12, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v6 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v6 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v5 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6] ; GFX9-NEXT: v_pk_add_u16 v10, s15, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v9, s14, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v5 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v8 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10] ; GFX9-NEXT: v_pk_add_u16 v12, s41, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v11, s40, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v8 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v7 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12] ; GFX9-NEXT: v_pk_add_u16 v14, s43, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v13, s42, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v10 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v10 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v10 -; GFX9-NEXT: v_pk_add_u16 v20, s45, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v19, s44, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v9 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[19:20] -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v9 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v12 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v26 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v12 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v26 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v11 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v26 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v11 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v25 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v28 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v28 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v30 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v30 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v32 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 24, v20 -; GFX9-NEXT: v_pk_add_u16 v37, s18, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v32 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v20 -; GFX9-NEXT: v_pk_add_u16 v48, s16, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[37:38] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 24, v36 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v20 -; GFX9-NEXT: v_lshrrev_b64 v[44:45], 24, v[48:49] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v36 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v28 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v18 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v2 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v18 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v2 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v18 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v1 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v17 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v20 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v3 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v20 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v19 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v6 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v19 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v6 +; GFX9-NEXT: v_pk_add_u16 v8, s13, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v22 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v5 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v22 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v8 +; GFX9-NEXT: v_pk_add_u16 v7, s12, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v8 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v21 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v7 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v24 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v24 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v10 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v23 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v9 +; GFX9-NEXT: v_pk_add_u16 v26, s23, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v23 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 +; GFX9-NEXT: v_pk_add_u16 v25, s22, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v26 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v12 +; GFX9-NEXT: v_pk_add_u16 v28, s21, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v27, s20, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[42:43], 24, v[25:26] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v1 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_pk_add_u16 v30, s19, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v29, s18, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[43:44], 24, v[27:28] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v26 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v5 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11 +; GFX9-NEXT: v_pk_add_u16 v16, s45, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v15, s44, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v32, s17, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v31, s16, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[44:45], 24, v[29:30] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v25 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v3 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v9 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v14 +; GFX9-NEXT: v_lshrrev_b64 v[45:46], 24, v[31:32] +; GFX9-NEXT: v_lshrrev_b64 v[53:54], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[40:41], 24, v[15:16] +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v25 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v7 +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v14 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v28 ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v27 ; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v27 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v30 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v29 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v29 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v31 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v31 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v33 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v38 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v37 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v37 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v49 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v48 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v48 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v1 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v19 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v31 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v31 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 8, v15 ; GFX9-NEXT: s_branch .LBB99_5 ; GFX9-NEXT: .LBB99_3: ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr81 -; GFX9-NEXT: ; implicit-def: $sgpr71 -; GFX9-NEXT: ; implicit-def: $sgpr80 -; GFX9-NEXT: ; implicit-def: $sgpr70 -; GFX9-NEXT: ; implicit-def: $sgpr69 -; GFX9-NEXT: ; implicit-def: $sgpr68 -; GFX9-NEXT: ; implicit-def: $sgpr66 -; GFX9-NEXT: ; implicit-def: $sgpr67 -; GFX9-NEXT: ; implicit-def: $sgpr65 -; GFX9-NEXT: ; implicit-def: $sgpr64 +; GFX9-NEXT: ; implicit-def: $sgpr72 +; GFX9-NEXT: ; implicit-def: $sgpr74 +; GFX9-NEXT: ; implicit-def: $sgpr76 +; GFX9-NEXT: ; implicit-def: $sgpr63 +; GFX9-NEXT: ; implicit-def: $sgpr61 +; GFX9-NEXT: ; implicit-def: $sgpr78 +; GFX9-NEXT: ; implicit-def: $sgpr62 +; GFX9-NEXT: ; implicit-def: $sgpr60 +; GFX9-NEXT: ; implicit-def: $sgpr59 +; GFX9-NEXT: ; implicit-def: $sgpr58 +; GFX9-NEXT: ; implicit-def: $sgpr56 +; GFX9-NEXT: ; implicit-def: $sgpr88 +; GFX9-NEXT: ; implicit-def: $sgpr57 ; GFX9-NEXT: ; implicit-def: $sgpr55 ; GFX9-NEXT: ; implicit-def: $sgpr53 +; GFX9-NEXT: ; implicit-def: $sgpr90 ; GFX9-NEXT: ; implicit-def: $sgpr54 ; GFX9-NEXT: ; implicit-def: $sgpr52 ; GFX9-NEXT: ; implicit-def: $sgpr51 ; GFX9-NEXT: ; implicit-def: $sgpr50 ; GFX9-NEXT: ; implicit-def: $sgpr48 +; GFX9-NEXT: ; implicit-def: $sgpr92 ; GFX9-NEXT: ; implicit-def: $sgpr49 ; GFX9-NEXT: ; implicit-def: $sgpr39 ; GFX9-NEXT: ; implicit-def: $sgpr38 ; GFX9-NEXT: ; implicit-def: $sgpr99 ; GFX9-NEXT: ; implicit-def: $sgpr97 +; GFX9-NEXT: ; implicit-def: $sgpr94 ; GFX9-NEXT: ; implicit-def: $sgpr98 ; GFX9-NEXT: ; implicit-def: $sgpr96 ; GFX9-NEXT: ; implicit-def: $sgpr87 ; GFX9-NEXT: ; implicit-def: $sgpr86 ; GFX9-NEXT: ; implicit-def: $sgpr84 +; GFX9-NEXT: ; implicit-def: $sgpr30 ; GFX9-NEXT: ; implicit-def: $sgpr85 ; GFX9-NEXT: ; implicit-def: $sgpr83 ; GFX9-NEXT: ; implicit-def: $sgpr82 -; GFX9-NEXT: ; implicit-def: $sgpr76 -; GFX9-NEXT: ; implicit-def: $sgpr74 -; GFX9-NEXT: ; implicit-def: $sgpr72 -; GFX9-NEXT: ; implicit-def: $sgpr62 -; GFX9-NEXT: ; implicit-def: $sgpr60 -; GFX9-NEXT: ; implicit-def: $sgpr58 -; GFX9-NEXT: ; implicit-def: $sgpr56 -; GFX9-NEXT: ; implicit-def: $sgpr36 +; GFX9-NEXT: ; implicit-def: $sgpr81 +; GFX9-NEXT: ; implicit-def: $sgpr71 ; GFX9-NEXT: ; implicit-def: $sgpr34 -; GFX9-NEXT: ; implicit-def: $sgpr30 -; GFX9-NEXT: ; implicit-def: $sgpr94 -; GFX9-NEXT: ; implicit-def: $sgpr92 -; GFX9-NEXT: ; implicit-def: $sgpr90 -; GFX9-NEXT: ; implicit-def: $sgpr88 -; GFX9-NEXT: ; implicit-def: $sgpr78 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 -; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr80 +; GFX9-NEXT: ; implicit-def: $sgpr70 +; GFX9-NEXT: ; implicit-def: $sgpr69 +; GFX9-NEXT: ; implicit-def: $sgpr68 +; GFX9-NEXT: ; implicit-def: $sgpr66 +; GFX9-NEXT: ; implicit-def: $sgpr36 +; GFX9-NEXT: ; implicit-def: $sgpr67 +; GFX9-NEXT: ; implicit-def: $sgpr65 +; GFX9-NEXT: ; implicit-def: $sgpr64 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 0 +; GFX9-NEXT: v_writelane_b32 v62, s47, 1 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -205371,7 +205752,8 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 2 +; GFX9-NEXT: v_writelane_b32 v62, s47, 3 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -205383,7 +205765,8 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 4 +; GFX9-NEXT: v_writelane_b32 v62, s47, 5 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -205395,7 +205778,8 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 6 +; GFX9-NEXT: v_writelane_b32 v62, s47, 7 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -205407,7 +205791,8 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 -; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: v_writelane_b32 v62, s46, 8 +; GFX9-NEXT: v_writelane_b32 v62, s47, 9 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 @@ -205444,228 +205829,236 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX9-NEXT: ; kill: killed $sgpr46 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: ; kill: killed $sgpr46 +; GFX9-NEXT: ; implicit-def: $sgpr47 ; GFX9-NEXT: ; implicit-def: $sgpr46 ; GFX9-NEXT: s_branch .LBB99_2 ; GFX9-NEXT: .LBB99_4: -; GFX9-NEXT: v_mov_b32_e32 v15, s81 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s71 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s80 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s70 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s69 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s68 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s66 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s67 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s65 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s64 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s55 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s53 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s54 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s52 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s51 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s50 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s48 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s49 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s39 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s38 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s99 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s97 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s98 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s96 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s87 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s86 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s84 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s85 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s83 -; GFX9-NEXT: v_mov_b32_e32 v25, s4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s82 -; GFX9-NEXT: v_readlane_b32 s4, v62, 0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 1 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 2 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 3 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 4 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 5 -; GFX9-NEXT: v_mov_b32_e32 v22, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 6 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 7 -; GFX9-NEXT: v_mov_b32_e32 v45, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 8 -; GFX9-NEXT: v_mov_b32_e32 v41, s4 -; GFX9-NEXT: v_readlane_b32 s4, v62, 9 -; GFX9-NEXT: v_mov_b32_e32 v42, s4 +; GFX9-NEXT: v_mov_b32_e32 v33, s47 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s46 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s55 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s53 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s54 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s52 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s51 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s50 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s48 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s49 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s39 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s38 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s99 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s97 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s98 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s96 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s87 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s86 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s84 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s85 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s83 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s82 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s81 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s71 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s80 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s70 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s69 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s68 +; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s66 ; GFX9-NEXT: v_readlane_b32 s4, v62, 10 -; GFX9-NEXT: v_mov_b32_e32 v55, s4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s67 +; GFX9-NEXT: v_mov_b32_e32 v36, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 11 -; GFX9-NEXT: v_mov_b32_e32 v39, s4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s65 +; GFX9-NEXT: v_mov_b32_e32 v37, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 12 -; GFX9-NEXT: v_mov_b32_e32 v50, s4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s64 +; GFX9-NEXT: v_mov_b32_e32 v60, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 13 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v33, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 14 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v35, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 15 -; GFX9-NEXT: v_mov_b32_e32 v52, s4 +; GFX9-NEXT: v_mov_b32_e32 v58, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 16 -; GFX9-NEXT: v_mov_b32_e32 v54, s4 +; GFX9-NEXT: v_mov_b32_e32 v59, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 17 -; GFX9-NEXT: v_mov_b32_e32 v24, s4 +; GFX9-NEXT: v_mov_b32_e32 v54, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 18 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v56, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 19 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v57, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 20 -; GFX9-NEXT: v_mov_b32_e32 v21, s4 +; GFX9-NEXT: v_mov_b32_e32 v46, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 21 -; GFX9-NEXT: v_mov_b32_e32 v18, s4 +; GFX9-NEXT: v_mov_b32_e32 v47, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 22 -; GFX9-NEXT: v_mov_b32_e32 v16, s4 +; GFX9-NEXT: v_mov_b32_e32 v55, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 23 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v41, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 24 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v34, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 25 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v15, s4 +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 26 -; GFX9-NEXT: v_mov_b32_e32 v61, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 27 -; GFX9-NEXT: v_mov_b32_e32 v23, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 28 -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 29 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 30 -; GFX9-NEXT: v_mov_b32_e32 v53, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 31 -; GFX9-NEXT: v_mov_b32_e32 v60, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 32 -; GFX9-NEXT: v_mov_b32_e32 v59, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 33 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 34 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 35 -; GFX9-NEXT: v_mov_b32_e32 v57, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 36 -; GFX9-NEXT: v_mov_b32_e32 v58, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 37 -; GFX9-NEXT: v_mov_b32_e32 v56, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 38 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 39 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 40 -; GFX9-NEXT: v_mov_b32_e32 v46, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 41 -; GFX9-NEXT: v_mov_b32_e32 v47, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 42 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v17, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 43 -; GFX9-NEXT: v_mov_b32_e32 v51, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 44 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 45 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 46 -; GFX9-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v51, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 47 -; GFX9-NEXT: v_mov_b32_e32 v40, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 48 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s4 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 ; GFX9-NEXT: v_readlane_b32 s4, v62, 49 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s4 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s46 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s56 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s4 +; GFX9-NEXT: v_mov_b32_e32 v49, s59 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s76 +; GFX9-NEXT: v_mov_b32_e32 v40, s36 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s74 +; GFX9-NEXT: v_mov_b32_e32 v40, s30 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s58 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s60 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v48, s72 +; GFX9-NEXT: v_mov_b32_e32 v40, s92 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s62 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s72 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v18, s5 +; GFX9-NEXT: v_readlane_b32 s4, v62, 8 +; GFX9-NEXT: v_mov_b32_e32 v48, s4 +; GFX9-NEXT: v_mov_b32_e32 v40, s90 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v40, s78 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: v_readlane_b32 s5, v62, 9 +; GFX9-NEXT: v_readlane_b32 s4, v62, 6 +; GFX9-NEXT: v_readlane_b32 s5, v62, 7 +; GFX9-NEXT: v_mov_b32_e32 v42, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 4 +; GFX9-NEXT: v_readlane_b32 s5, v62, 5 +; GFX9-NEXT: v_mov_b32_e32 v43, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 2 +; GFX9-NEXT: v_readlane_b32 s5, v62, 3 +; GFX9-NEXT: v_mov_b32_e32 v48, s34 ; GFX9-NEXT: v_mov_b32_e32 v40, s88 -; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v44, s4 +; GFX9-NEXT: v_readlane_b32 s4, v62, 0 +; GFX9-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v19, s44 -; GFX9-NEXT: v_mov_b32_e32 v20, s45 +; GFX9-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v15, s44 +; GFX9-NEXT: v_mov_b32_e32 v16, s45 ; GFX9-NEXT: v_mov_b32_e32 v13, s42 ; GFX9-NEXT: v_mov_b32_e32 v14, s43 ; GFX9-NEXT: v_mov_b32_e32 v11, s40 @@ -205680,78 +206073,66 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v4, s9 ; GFX9-NEXT: v_mov_b32_e32 v1, s6 ; GFX9-NEXT: v_mov_b32_e32 v2, s7 -; GFX9-NEXT: v_mov_b32_e32 v48, s16 -; GFX9-NEXT: v_mov_b32_e32 v49, s17 -; GFX9-NEXT: v_mov_b32_e32 v37, s18 -; GFX9-NEXT: v_mov_b32_e32 v38, s19 -; GFX9-NEXT: v_mov_b32_e32 v35, s20 -; GFX9-NEXT: v_mov_b32_e32 v36, s21 -; GFX9-NEXT: v_mov_b32_e32 v33, s22 -; GFX9-NEXT: v_mov_b32_e32 v34, s23 -; GFX9-NEXT: v_mov_b32_e32 v31, s24 -; GFX9-NEXT: v_mov_b32_e32 v32, s25 -; GFX9-NEXT: v_mov_b32_e32 v29, s26 -; GFX9-NEXT: v_mov_b32_e32 v30, s27 -; GFX9-NEXT: v_mov_b32_e32 v27, s28 -; GFX9-NEXT: v_mov_b32_e32 v28, s29 -; GFX9-NEXT: v_mov_b32_e32 v26, s5 -; GFX9-NEXT: v_mov_b32_e32 v43, s74 -; GFX9-NEXT: v_mov_b32_e32 v44, s76 -; GFX9-NEXT: v_mov_b32_e32 v40, v41 -; GFX9-NEXT: v_mov_b32_e32 v41, v45 -; GFX9-NEXT: v_mov_b32_e32 v45, v22 -; GFX9-NEXT: v_mov_b32_e32 v22, s90 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v22, s92 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v22, s94 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v22, s30 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v22, s34 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v22, s36 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v31, s16 +; GFX9-NEXT: v_mov_b32_e32 v32, s17 +; GFX9-NEXT: v_mov_b32_e32 v29, s18 +; GFX9-NEXT: v_mov_b32_e32 v30, s19 +; GFX9-NEXT: v_mov_b32_e32 v27, s20 +; GFX9-NEXT: v_mov_b32_e32 v28, s21 +; GFX9-NEXT: v_mov_b32_e32 v25, s22 +; GFX9-NEXT: v_mov_b32_e32 v26, s23 +; GFX9-NEXT: v_mov_b32_e32 v23, s24 +; GFX9-NEXT: v_mov_b32_e32 v24, s25 +; GFX9-NEXT: v_mov_b32_e32 v21, s26 +; GFX9-NEXT: v_mov_b32_e32 v22, s27 +; GFX9-NEXT: v_mov_b32_e32 v19, s28 +; GFX9-NEXT: v_mov_b32_e32 v20, s29 +; GFX9-NEXT: v_readlane_b32 s5, v62, 1 +; GFX9-NEXT: v_mov_b32_e32 v45, s4 +; GFX9-NEXT: v_mov_b32_e32 v48, s57 +; GFX9-NEXT: v_mov_b32_e32 v38, s56 +; GFX9-NEXT: v_mov_b32_e32 v39, s58 +; GFX9-NEXT: v_mov_b32_e32 v50, s60 +; GFX9-NEXT: v_mov_b32_e32 v51, s62 +; GFX9-NEXT: v_mov_b32_e32 v61, s61 +; GFX9-NEXT: v_mov_b32_e32 v52, s63 +; GFX9-NEXT: v_mov_b32_e32 v53, s94 +; GFX9-NEXT: v_mov_b32_e32 v40, s78 ; GFX9-NEXT: .LBB99_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v37, v37, v52, s4 -; GFX9-NEXT: v_perm_b32 v31, v31, v53, s4 -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v33, v33, v15, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v21, v35, v21, s4 -; GFX9-NEXT: v_perm_b32 v16, v36, v16, s4 -; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v24, v38, v24, s4 -; GFX9-NEXT: v_perm_b32 v17, v28, v17, s4 -; GFX9-NEXT: v_perm_b32 v48, v48, v55, s4 -; GFX9-NEXT: v_perm_b32 v49, v49, v50, s4 -; GFX9-NEXT: v_perm_b32 v50, v54, v43, s4 -; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v39, v39, v44, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v39 -; GFX9-NEXT: v_or_b32_e32 v39, v48, v39 -; GFX9-NEXT: v_perm_b32 v23, v34, v23, s4 -; GFX9-NEXT: v_perm_b32 v32, v32, v59, s4 -; GFX9-NEXT: v_perm_b32 v29, v29, v57, s4 -; GFX9-NEXT: v_perm_b32 v30, v30, v56, s4 +; GFX9-NEXT: v_perm_b32 v31, v31, v36, s4 +; GFX9-NEXT: v_perm_b32 v36, v37, v45, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v36, 16, v36 +; GFX9-NEXT: v_or_b32_e32 v31, v31, v36 +; GFX9-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen +; GFX9-NEXT: v_perm_b32 v31, v32, v60, s4 +; GFX9-NEXT: v_perm_b32 v32, v33, v35, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; GFX9-NEXT: v_or_b32_e32 v31, v31, v32 +; GFX9-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:4 +; GFX9-NEXT: v_perm_b32 v31, v59, v44, s4 +; GFX9-NEXT: v_perm_b32 v29, v29, v58, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; GFX9-NEXT: v_or_b32_e32 v29, v29, v31 +; GFX9-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:8 +; GFX9-NEXT: v_perm_b32 v29, v30, v54, s4 +; GFX9-NEXT: v_perm_b32 v30, v56, v57, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; GFX9-NEXT: v_or_b32_e32 v29, v29, v30 +; GFX9-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:12 +; GFX9-NEXT: v_perm_b32 v29, v47, v43, s4 ; GFX9-NEXT: v_perm_b32 v27, v27, v46, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v45, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; GFX9-NEXT: v_or_b32_e32 v27, v27, v29 +; GFX9-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:16 +; GFX9-NEXT: v_perm_b32 v27, v28, v55, s4 +; GFX9-NEXT: v_perm_b32 v28, v41, v34, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX9-NEXT: v_or_b32_e32 v27, v27, v28 +; GFX9-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:20 +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v15, v15, v52, s4 +; GFX9-NEXT: v_perm_b32 v13, v13, v39, s4 ; GFX9-NEXT: v_readlane_b32 s30, v63, 34 ; GFX9-NEXT: v_readlane_b32 s31, v63, 35 ; GFX9-NEXT: v_readlane_b32 s99, v63, 33 @@ -205788,272 +206169,254 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX9-NEXT: v_readlane_b32 s36, v63, 2 ; GFX9-NEXT: v_readlane_b32 s35, v63, 1 ; GFX9-NEXT: v_readlane_b32 s34, v63, 0 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v36, v58, v52, s4 -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v22, v25, v15, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v35, v61, v35, s4 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v18, v18, v54, s4 -; GFX9-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: v_or_b32_e32 v18, v21, v18 -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v38, v47, v52, s4 -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_perm_b32 v25, v26, v15, s4 -; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_perm_b32 v34, v60, v54, s4 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v28, v51, v52, s4 -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v26, v15, v51, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v25, v25, v27, s4 +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v19, v19, v15, s4 -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v27, v27, v42, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; GFX9-NEXT: v_or_b32_e32 v25, v25, v27 +; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:24 +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v20, v20, v15, s4 -; GFX9-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4 +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v15, v15, v51, s4 -; GFX9-NEXT: buffer_store_dword v39, v0, s[0:3], 0 offen -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; GFX9-NEXT: v_perm_b32 v26, v26, v27, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX9-NEXT: v_or_b32_e32 v25, v25, v26 +; GFX9-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:28 +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v39, v39, v48, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v39 -; GFX9-NEXT: v_or_b32_e32 v39, v49, v39 -; GFX9-NEXT: buffer_store_dword v39, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_lshlrev_b32_e32 v39, 16, v50 -; GFX9-NEXT: v_or_b32_e32 v37, v37, v39 -; GFX9-NEXT: buffer_store_dword v37, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v23, v23, v25, s4 +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v37, v37, v39, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v37, 16, v37 -; GFX9-NEXT: v_or_b32_e32 v24, v24, v37 -; GFX9-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v25, v26, v25, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; GFX9-NEXT: v_or_b32_e32 v23, v23, v25 +; GFX9-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:32 +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v18, v18, v21, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: v_or_b32_e32 v16, v16, v18 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v35 -; GFX9-NEXT: v_or_b32_e32 v16, v33, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v23, v24, v23, s4 +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v23, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v34 -; GFX9-NEXT: v_or_b32_e32 v16, v31, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v24, v24, v25, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; GFX9-NEXT: v_or_b32_e32 v23, v23, v24 +; GFX9-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:36 +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v32, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v36 -; GFX9-NEXT: v_or_b32_e32 v16, v29, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v21, v23, s4 +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v30, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v38 -; GFX9-NEXT: v_or_b32_e32 v16, v27, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v23, v24, v23, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX9-NEXT: v_or_b32_e32 v21, v21, v23 +; GFX9-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:40 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v17, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v28 -; GFX9-NEXT: v_or_b32_e32 v16, v22, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v21, v22, v21, s4 +; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v25, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v26 -; GFX9-NEXT: v_or_b32_e32 v16, v19, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:64 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v22, v22, v23, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX9-NEXT: v_or_b32_e32 v21, v21, v22 +; GFX9-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:44 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v16, v16, v17, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v16, v20, v16 -; GFX9-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:68 -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v19, v19, v21, s4 +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v21, v22, v21, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX9-NEXT: v_or_b32_e32 v19, v19, v21 +; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:48 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v19, v20, v19, s4 +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v20, v20, v21, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; GFX9-NEXT: v_or_b32_e32 v19, v19, v20 +; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:52 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v17, v17, v19, s4 +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v19, v20, v19, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX9-NEXT: v_or_b32_e32 v17, v17, v19 +; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:56 +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4 +; GFX9-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v13, v16, s4 +; GFX9-NEXT: v_perm_b32 v18, v18, v19, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; GFX9-NEXT: v_or_b32_e32 v17, v17, v18 +; GFX9-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:60 +; GFX9-NEXT: v_perm_b32 v17, v61, v40, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX9-NEXT: v_or_b32_e32 v15, v15, v17 +; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:64 +; GFX9-NEXT: v_perm_b32 v15, v16, v51, s4 +; GFX9-NEXT: v_perm_b32 v16, v50, v49, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX9-NEXT: v_or_b32_e32 v15, v15, v16 +; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:68 +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v15, v38, v15, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v15 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:72 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v13, v14, v48, s4 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v14, v14, v15, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:76 -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v11, v11, v13, s4 ; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v13, v14, v13, s4 +; GFX9-NEXT: v_perm_b32 v11, v11, v13, s4 +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v13, v13, v14, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v13 ; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:80 -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4 -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v12, v12, v13, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 ; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:84 -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v9, v9, v11, s4 -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v11, v12, v11, s4 +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v11, v11, v12, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v11 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:88 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4 -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v10, v10, v11, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:92 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v7, v9, s4 -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v9, v10, v9, s4 +; GFX9-NEXT: v_perm_b32 v9, v9, v53, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v9 ; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:96 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v8, v8, v9, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 ; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:100 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v5, v7, s4 -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v7, v8, v7, s4 +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v7, v7, v8, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v7 ; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:104 ; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v6, v7, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:108 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v3, v5, s4 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v5, v6, v5, s4 +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v5, v5, v6, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 ; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v4, v4, v5, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:116 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v3, s4 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v3, v3, v4, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v3 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120 -; GFX9-NEXT: v_perm_b32 v1, v2, v41, s4 -; GFX9-NEXT: v_perm_b32 v2, v40, v42, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v3, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124 @@ -206072,8 +206435,8 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -206083,88 +206446,86 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_or_saveexec_b32 s4, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill +; GFX11-NEXT: scratch_store_b32 off, v73, s32 offset:68 ; GFX11-NEXT: scratch_store_b32 off, v74, s32 offset:72 ; GFX11-NEXT: scratch_store_b32 off, v75, s32 offset:76 ; GFX11-NEXT: scratch_store_b32 off, v76, s32 offset:80 -; GFX11-NEXT: scratch_store_b32 off, v77, s32 offset:84 ; GFX11-NEXT: s_mov_b32 exec_lo, s4 -; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Spill -; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:68 -; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:64 +; GFX11-NEXT: s_clause 0x10 ; 68-byte Folded Spill +; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:64 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:60 +; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:60 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:56 +; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:56 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:52 +; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:52 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:48 +; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:48 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:44 +; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:44 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:40 +; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:40 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:36 +; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:36 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:32 +; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:32 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:28 +; GFX11-NEXT: scratch_store_b32 off, v57, s32 offset:28 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:24 +; GFX11-NEXT: scratch_store_b32 off, v58, s32 offset:24 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:20 +; GFX11-NEXT: scratch_store_b32 off, v59, s32 offset:20 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:16 +; GFX11-NEXT: scratch_store_b32 off, v60, s32 offset:16 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:12 +; GFX11-NEXT: scratch_store_b32 off, v61, s32 offset:12 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:8 +; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:8 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v72, s32 offset:4 +; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:4 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v73, s32 -; GFX11-NEXT: v_writelane_b32 v74, s34, 0 -; GFX11-NEXT: v_writelane_b32 v74, s35, 1 -; GFX11-NEXT: v_writelane_b32 v74, s36, 2 -; GFX11-NEXT: v_writelane_b32 v74, s37, 3 -; GFX11-NEXT: v_writelane_b32 v74, s38, 4 -; GFX11-NEXT: v_writelane_b32 v74, s39, 5 -; GFX11-NEXT: v_writelane_b32 v74, s48, 6 -; GFX11-NEXT: v_writelane_b32 v74, s49, 7 -; GFX11-NEXT: v_writelane_b32 v74, s50, 8 -; GFX11-NEXT: v_writelane_b32 v74, s51, 9 -; GFX11-NEXT: v_writelane_b32 v74, s52, 10 -; GFX11-NEXT: v_writelane_b32 v74, s53, 11 -; GFX11-NEXT: v_writelane_b32 v74, s54, 12 -; GFX11-NEXT: v_writelane_b32 v74, s55, 13 -; GFX11-NEXT: v_writelane_b32 v74, s64, 14 -; GFX11-NEXT: v_writelane_b32 v74, s65, 15 -; GFX11-NEXT: v_writelane_b32 v74, s66, 16 -; GFX11-NEXT: v_writelane_b32 v74, s67, 17 -; GFX11-NEXT: v_writelane_b32 v74, s68, 18 -; GFX11-NEXT: v_writelane_b32 v74, s69, 19 -; GFX11-NEXT: v_writelane_b32 v74, s70, 20 -; GFX11-NEXT: v_writelane_b32 v74, s71, 21 -; GFX11-NEXT: v_writelane_b32 v74, s80, 22 -; GFX11-NEXT: v_writelane_b32 v74, s81, 23 -; GFX11-NEXT: v_writelane_b32 v74, s82, 24 -; GFX11-NEXT: v_writelane_b32 v74, s83, 25 -; GFX11-NEXT: v_writelane_b32 v74, s84, 26 -; GFX11-NEXT: v_writelane_b32 v74, s85, 27 -; GFX11-NEXT: v_writelane_b32 v74, s86, 28 -; GFX11-NEXT: v_writelane_b32 v74, s87, 29 -; GFX11-NEXT: v_writelane_b32 v74, s96, 30 -; GFX11-NEXT: v_writelane_b32 v74, s97, 31 -; GFX11-NEXT: v_writelane_b32 v75, s98, 0 -; GFX11-NEXT: v_writelane_b32 v75, s99, 1 -; GFX11-NEXT: v_writelane_b32 v75, s100, 2 -; GFX11-NEXT: v_writelane_b32 v75, s101, 3 -; GFX11-NEXT: v_writelane_b32 v75, s102, 4 -; GFX11-NEXT: v_writelane_b32 v75, s103, 5 -; GFX11-NEXT: v_writelane_b32 v75, s104, 6 -; GFX11-NEXT: v_writelane_b32 v75, s30, 7 -; GFX11-NEXT: v_writelane_b32 v75, s31, 8 +; GFX11-NEXT: scratch_store_b32 off, v72, s32 +; GFX11-NEXT: v_writelane_b32 v73, s34, 0 +; GFX11-NEXT: v_writelane_b32 v73, s35, 1 +; GFX11-NEXT: v_writelane_b32 v73, s36, 2 +; GFX11-NEXT: v_writelane_b32 v73, s37, 3 +; GFX11-NEXT: v_writelane_b32 v73, s38, 4 +; GFX11-NEXT: v_writelane_b32 v73, s39, 5 +; GFX11-NEXT: v_writelane_b32 v73, s48, 6 +; GFX11-NEXT: v_writelane_b32 v73, s49, 7 +; GFX11-NEXT: v_writelane_b32 v73, s50, 8 +; GFX11-NEXT: v_writelane_b32 v73, s51, 9 +; GFX11-NEXT: v_writelane_b32 v73, s52, 10 +; GFX11-NEXT: v_writelane_b32 v73, s53, 11 +; GFX11-NEXT: v_writelane_b32 v73, s54, 12 +; GFX11-NEXT: v_writelane_b32 v73, s55, 13 +; GFX11-NEXT: v_writelane_b32 v73, s64, 14 +; GFX11-NEXT: v_writelane_b32 v73, s65, 15 +; GFX11-NEXT: v_writelane_b32 v73, s66, 16 +; GFX11-NEXT: v_writelane_b32 v73, s67, 17 +; GFX11-NEXT: v_writelane_b32 v73, s68, 18 +; GFX11-NEXT: v_writelane_b32 v73, s69, 19 +; GFX11-NEXT: v_writelane_b32 v73, s70, 20 +; GFX11-NEXT: v_writelane_b32 v73, s71, 21 +; GFX11-NEXT: v_writelane_b32 v73, s80, 22 +; GFX11-NEXT: v_writelane_b32 v73, s81, 23 +; GFX11-NEXT: v_writelane_b32 v73, s82, 24 +; GFX11-NEXT: v_writelane_b32 v73, s83, 25 +; GFX11-NEXT: v_writelane_b32 v73, s84, 26 +; GFX11-NEXT: v_writelane_b32 v73, s85, 27 +; GFX11-NEXT: v_writelane_b32 v73, s86, 28 +; GFX11-NEXT: v_writelane_b32 v73, s87, 29 +; GFX11-NEXT: v_writelane_b32 v73, s96, 30 +; GFX11-NEXT: v_writelane_b32 v73, s97, 31 +; GFX11-NEXT: v_writelane_b32 v74, s98, 0 +; GFX11-NEXT: v_writelane_b32 v74, s99, 1 +; GFX11-NEXT: v_writelane_b32 v74, s100, 2 +; GFX11-NEXT: v_writelane_b32 v74, s101, 3 +; GFX11-NEXT: v_writelane_b32 v74, s102, 4 +; GFX11-NEXT: v_writelane_b32 v74, s103, 5 +; GFX11-NEXT: v_writelane_b32 v74, s104, 6 +; GFX11-NEXT: v_writelane_b32 v74, s30, 7 +; GFX11-NEXT: v_writelane_b32 v74, s31, 8 ; GFX11-NEXT: v_readfirstlane_b32 s42, v15 ; GFX11-NEXT: v_readfirstlane_b32 s5, v14 ; GFX11-NEXT: v_readfirstlane_b32 s4, v13 @@ -206182,179 +206543,177 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX11-NEXT: v_readfirstlane_b32 s40, v1 ; GFX11-NEXT: s_cmp_lg_u32 s42, 0 ; GFX11-NEXT: s_mov_b32 vcc_lo, 0 +; GFX11-NEXT: ; implicit-def: $vgpr75 : SGPR spill to VGPR lane ; GFX11-NEXT: ; implicit-def: $vgpr76 : SGPR spill to VGPR lane -; GFX11-NEXT: ; implicit-def: $vgpr77 : SGPR spill to VGPR lane ; GFX11-NEXT: s_cbranch_scc0 .LBB99_3 ; GFX11-NEXT: ; %bb.1: ; %cmp.false ; GFX11-NEXT: s_lshr_b32 s42, s27, 24 ; GFX11-NEXT: s_lshr_b32 vcc_hi, s5, 24 -; GFX11-NEXT: v_writelane_b32 v77, s42, 7 +; GFX11-NEXT: v_writelane_b32 v76, s42, 7 ; GFX11-NEXT: s_lshr_b32 s42, s27, 16 ; GFX11-NEXT: s_lshr_b32 s34, s5, 16 ; GFX11-NEXT: s_lshr_b32 s36, s5, 8 ; GFX11-NEXT: s_lshr_b32 s35, s4, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 6 +; GFX11-NEXT: v_writelane_b32 v76, s42, 6 ; GFX11-NEXT: s_lshr_b32 s42, s27, 8 ; GFX11-NEXT: s_lshr_b32 s37, s4, 8 ; GFX11-NEXT: s_lshr_b32 s38, s7, 24 ; GFX11-NEXT: s_lshr_b32 s39, s7, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 5 +; GFX11-NEXT: v_writelane_b32 v76, s42, 5 ; GFX11-NEXT: s_lshr_b32 s42, s26, 16 ; GFX11-NEXT: s_lshr_b32 s49, s7, 8 ; GFX11-NEXT: s_lshr_b32 s48, s6, 16 ; GFX11-NEXT: s_lshr_b32 s50, s6, 8 -; GFX11-NEXT: v_writelane_b32 v77, s42, 4 +; GFX11-NEXT: v_writelane_b32 v76, s42, 4 ; GFX11-NEXT: s_lshr_b32 s42, s26, 8 ; GFX11-NEXT: s_lshr_b32 s51, s9, 24 ; GFX11-NEXT: s_lshr_b32 s52, s9, 16 ; GFX11-NEXT: s_lshr_b32 s54, s9, 8 -; GFX11-NEXT: v_writelane_b32 v77, s42, 3 +; GFX11-NEXT: v_writelane_b32 v76, s42, 3 ; GFX11-NEXT: s_lshr_b32 s42, s25, 24 ; GFX11-NEXT: s_lshr_b32 s53, s8, 16 ; GFX11-NEXT: s_lshr_b32 s55, s8, 8 ; GFX11-NEXT: s_lshr_b32 s64, s11, 24 -; GFX11-NEXT: v_writelane_b32 v77, s42, 2 +; GFX11-NEXT: v_writelane_b32 v76, s42, 2 ; GFX11-NEXT: s_lshr_b32 s42, s25, 16 ; GFX11-NEXT: s_lshr_b32 s65, s11, 16 ; GFX11-NEXT: s_lshr_b32 s67, s11, 8 ; GFX11-NEXT: s_lshr_b32 s66, s10, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 1 +; GFX11-NEXT: v_writelane_b32 v76, s42, 1 ; GFX11-NEXT: s_lshr_b32 s42, s25, 8 ; GFX11-NEXT: s_lshr_b32 s68, s10, 8 ; GFX11-NEXT: s_lshr_b32 s69, s13, 24 ; GFX11-NEXT: s_lshr_b32 s70, s13, 16 -; GFX11-NEXT: v_writelane_b32 v77, s42, 0 +; GFX11-NEXT: v_writelane_b32 v76, s42, 0 ; GFX11-NEXT: s_lshr_b32 s42, s24, 16 ; GFX11-NEXT: s_lshr_b32 s80, s13, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 31 +; GFX11-NEXT: v_writelane_b32 v75, s42, 31 ; GFX11-NEXT: s_lshr_b32 s42, s24, 8 ; GFX11-NEXT: s_lshr_b32 s71, s12, 16 ; GFX11-NEXT: s_lshr_b32 s81, s12, 8 ; GFX11-NEXT: s_lshr_b32 s82, s15, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 30 +; GFX11-NEXT: v_writelane_b32 v75, s42, 30 ; GFX11-NEXT: s_lshr_b32 s42, s23, 24 ; GFX11-NEXT: s_lshr_b32 s83, s15, 16 ; GFX11-NEXT: s_lshr_b32 s85, s15, 8 ; GFX11-NEXT: s_lshr_b32 s84, s14, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 29 +; GFX11-NEXT: v_writelane_b32 v75, s42, 29 ; GFX11-NEXT: s_lshr_b32 s42, s23, 16 ; GFX11-NEXT: s_lshr_b32 s86, s14, 8 ; GFX11-NEXT: s_lshr_b32 s87, s41, 24 ; GFX11-NEXT: s_lshr_b32 s96, s41, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 28 +; GFX11-NEXT: v_writelane_b32 v75, s42, 28 ; GFX11-NEXT: s_lshr_b32 s42, s23, 8 ; GFX11-NEXT: s_lshr_b32 s98, s41, 8 ; GFX11-NEXT: s_lshr_b32 s97, s40, 16 ; GFX11-NEXT: s_lshr_b32 s99, s40, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 27 +; GFX11-NEXT: v_writelane_b32 v75, s42, 27 ; GFX11-NEXT: s_lshr_b32 s42, s22, 16 ; GFX11-NEXT: s_lshr_b32 s100, s29, 24 ; GFX11-NEXT: s_lshr_b32 s101, s29, 16 ; GFX11-NEXT: s_lshr_b32 s103, s29, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 26 +; GFX11-NEXT: v_writelane_b32 v75, s42, 26 ; GFX11-NEXT: s_lshr_b32 s42, s22, 8 ; GFX11-NEXT: s_lshr_b32 s102, s28, 16 ; GFX11-NEXT: s_lshr_b32 s104, s28, 8 ; GFX11-NEXT: s_lshr_b64 s[72:73], s[26:27], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 25 +; GFX11-NEXT: v_writelane_b32 v75, s42, 25 ; GFX11-NEXT: s_lshr_b32 s42, s21, 24 ; GFX11-NEXT: s_lshr_b64 s[62:63], s[24:25], 24 ; GFX11-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 ; GFX11-NEXT: s_lshr_b64 s[58:59], s[20:21], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 24 ; GFX11-NEXT: s_lshr_b32 s42, s21, 16 ; GFX11-NEXT: s_lshr_b64 s[56:57], s[18:19], 24 ; GFX11-NEXT: s_lshr_b64 s[46:47], s[16:17], 24 ; GFX11-NEXT: s_lshr_b64 s[44:45], s[2:3], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 23 +; GFX11-NEXT: v_writelane_b32 v75, s42, 23 ; GFX11-NEXT: s_lshr_b32 s42, s21, 8 -; GFX11-NEXT: s_lshr_b64 s[74:75], s[4:5], 24 -; GFX11-NEXT: s_lshr_b64 s[76:77], s[6:7], 24 -; GFX11-NEXT: s_lshr_b64 s[78:79], s[8:9], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 22 +; GFX11-NEXT: s_lshr_b64 s[30:31], s[4:5], 24 +; GFX11-NEXT: s_lshr_b64 s[94:95], s[6:7], 24 +; GFX11-NEXT: s_lshr_b64 s[92:93], s[8:9], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 22 ; GFX11-NEXT: s_lshr_b32 s42, s20, 16 -; GFX11-NEXT: s_lshr_b64 s[88:89], s[10:11], 24 -; GFX11-NEXT: s_lshr_b64 s[90:91], s[12:13], 24 -; GFX11-NEXT: s_lshr_b64 s[92:93], s[14:15], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 21 +; GFX11-NEXT: s_lshr_b64 s[90:91], s[10:11], 24 +; GFX11-NEXT: s_lshr_b64 s[88:89], s[12:13], 24 +; GFX11-NEXT: s_lshr_b64 s[78:79], s[14:15], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 21 ; GFX11-NEXT: s_lshr_b32 s42, s20, 8 -; GFX11-NEXT: s_lshr_b64 s[94:95], s[40:41], 24 -; GFX11-NEXT: s_lshr_b64 s[30:31], s[28:29], 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 20 +; GFX11-NEXT: s_lshr_b64 s[76:77], s[40:41], 24 +; GFX11-NEXT: s_lshr_b64 s[74:75], s[28:29], 24 +; GFX11-NEXT: v_writelane_b32 v75, s42, 20 ; GFX11-NEXT: s_lshr_b32 s42, s19, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 19 +; GFX11-NEXT: v_writelane_b32 v75, s42, 19 ; GFX11-NEXT: s_lshr_b32 s42, s19, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 18 +; GFX11-NEXT: v_writelane_b32 v75, s42, 18 ; GFX11-NEXT: s_lshr_b32 s42, s19, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 17 +; GFX11-NEXT: v_writelane_b32 v75, s42, 17 ; GFX11-NEXT: s_lshr_b32 s42, s18, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 16 +; GFX11-NEXT: v_writelane_b32 v75, s42, 16 ; GFX11-NEXT: s_lshr_b32 s42, s18, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 15 +; GFX11-NEXT: v_writelane_b32 v75, s42, 15 ; GFX11-NEXT: s_lshr_b32 s42, s17, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 14 +; GFX11-NEXT: v_writelane_b32 v75, s42, 14 ; GFX11-NEXT: s_lshr_b32 s42, s17, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 13 +; GFX11-NEXT: v_writelane_b32 v75, s42, 13 ; GFX11-NEXT: s_lshr_b32 s42, s17, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 12 +; GFX11-NEXT: v_writelane_b32 v75, s42, 12 ; GFX11-NEXT: s_lshr_b32 s42, s16, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 11 +; GFX11-NEXT: v_writelane_b32 v75, s42, 11 ; GFX11-NEXT: s_lshr_b32 s42, s16, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 10 +; GFX11-NEXT: v_writelane_b32 v75, s42, 10 ; GFX11-NEXT: s_lshr_b32 s42, s3, 24 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 9 +; GFX11-NEXT: v_writelane_b32 v75, s42, 9 ; GFX11-NEXT: s_lshr_b32 s42, s3, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 8 +; GFX11-NEXT: v_writelane_b32 v75, s42, 8 ; GFX11-NEXT: s_lshr_b32 s42, s3, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 7 +; GFX11-NEXT: v_writelane_b32 v75, s42, 7 ; GFX11-NEXT: s_lshr_b32 s42, s2, 16 -; GFX11-NEXT: v_writelane_b32 v76, s42, 6 +; GFX11-NEXT: v_writelane_b32 v75, s42, 6 ; GFX11-NEXT: s_lshr_b32 s42, s2, 8 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 5 +; GFX11-NEXT: v_writelane_b32 v75, s42, 5 ; GFX11-NEXT: s_lshr_b32 s42, s1, 24 -; GFX11-NEXT: v_writelane_b32 v76, s42, 4 +; GFX11-NEXT: v_writelane_b32 v75, s42, 4 ; GFX11-NEXT: s_lshr_b32 s42, s1, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 3 +; GFX11-NEXT: v_writelane_b32 v75, s42, 3 ; GFX11-NEXT: s_lshr_b32 s42, s1, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 2 +; GFX11-NEXT: v_writelane_b32 v75, s42, 2 ; GFX11-NEXT: s_lshr_b32 s42, s0, 16 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: v_writelane_b32 v76, s42, 1 +; GFX11-NEXT: v_writelane_b32 v75, s42, 1 ; GFX11-NEXT: s_lshr_b32 s42, s0, 8 -; GFX11-NEXT: v_writelane_b32 v76, s42, 0 +; GFX11-NEXT: v_writelane_b32 v75, s42, 0 ; GFX11-NEXT: s_lshr_b64 s[42:43], s[0:1], 24 ; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_lo ; GFX11-NEXT: s_cbranch_vccnz .LBB99_4 ; GFX11-NEXT: .LBB99_2: ; %cmp.true +; GFX11-NEXT: v_pk_add_u16 v22, s23, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v21, s22, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v24, s21, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v23, s20, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v28, s19, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v18, s27, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v17, s26, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v27, s18, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v30, s17, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v29, s16, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v20, s25, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v19, s24, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v14, s41, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v13, s40, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v10, s13, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v9, s12, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v6, s9, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v5, s8, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v34, s3, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v33, s2, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v22, s23, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v21, s22, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v30, s17, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v29, s16, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v18, s27, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v17, s26, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v16, s29, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v15, s28, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v14, s41, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v13, s40, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v12, s15, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v11, s14, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v8, s11, 3 op_sel_hi:[1,0] @@ -206365,104 +206724,106 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX11-NEXT: v_pk_add_u16 v1, s4, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v36, s1, 3 op_sel_hi:[1,0] ; GFX11-NEXT: v_pk_add_u16 v35, s0, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v24, s21, 3 op_sel_hi:[1,0] -; GFX11-NEXT: v_pk_add_u16 v23, s20, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v34, s3, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v33, s2, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v20, s25, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_pk_add_u16 v19, s24, 3 op_sel_hi:[1,0] +; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[21:22] +; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[23:24] +; GFX11-NEXT: v_lshrrev_b64 v[68:69], 24, v[27:28] ; GFX11-NEXT: v_lshrrev_b64 v[51:52], 24, v[17:18] -; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[27:28] -; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20] -; GFX11-NEXT: v_lshrrev_b64 v[65:66], 24, v[29:30] -; GFX11-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22] -; GFX11-NEXT: v_lshrrev_b64 v[69:70], 24, v[33:34] +; GFX11-NEXT: v_lshrrev_b64 v[69:70], 24, v[29:30] ; GFX11-NEXT: v_lshrrev_b64 v[37:38], 24, v[5:6] ; GFX11-NEXT: v_lshrrev_b64 v[48:49], 24, v[9:10] -; GFX11-NEXT: v_lshrrev_b64 v[66:67], 24, v[13:14] -; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24] -; GFX11-NEXT: v_lshrrev_b64 v[70:71], 24, v[35:36] +; GFX11-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20] +; GFX11-NEXT: v_lshrrev_b64 v[70:71], 24, v[33:34] +; GFX11-NEXT: v_lshrrev_b64 v[80:81], 24, v[35:36] ; GFX11-NEXT: v_lshrrev_b64 v[25:26], 24, v[1:2] ; GFX11-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4] ; GFX11-NEXT: v_lshrrev_b64 v[38:39], 24, v[7:8] ; GFX11-NEXT: v_lshrrev_b64 v[49:50], 24, v[11:12] -; GFX11-NEXT: v_lshrrev_b64 v[67:68], 24, v[15:16] -; GFX11-NEXT: v_lshrrev_b32_e32 v148, 24, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v147, 16, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v146, 8, v18 -; GFX11-NEXT: v_lshrrev_b32_e32 v160, 16, v17 -; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v17 -; GFX11-NEXT: v_lshrrev_b32_e32 v162, 24, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v161, 16, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v20 -; GFX11-NEXT: v_lshrrev_b32_e32 v163, 16, v19 -; GFX11-NEXT: v_lshrrev_b32_e32 v151, 8, v19 -; GFX11-NEXT: v_lshrrev_b32_e32 v166, 24, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v165, 16, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v164, 8, v22 -; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v21 -; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v21 -; GFX11-NEXT: v_lshrrev_b32_e32 v180, 24, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v179, 16, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v24 -; GFX11-NEXT: v_lshrrev_b32_e32 v181, 16, v23 -; GFX11-NEXT: v_lshrrev_b32_e32 v177, 8, v23 -; GFX11-NEXT: v_lshrrev_b32_e32 v42, 24, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v41, 16, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v28 -; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v27 -; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v27 -; GFX11-NEXT: v_lshrrev_b32_e32 v46, 24, v30 -; GFX11-NEXT: v_lshrrev_b32_e32 v44, 16, v30 -; GFX11-NEXT: v_lshrrev_b32_e32 v40, 8, v30 -; GFX11-NEXT: v_lshrrev_b32_e32 v47, 16, v29 -; GFX11-NEXT: v_lshrrev_b32_e32 v45, 8, v29 -; GFX11-NEXT: v_lshrrev_b32_e32 v59, 24, v34 -; GFX11-NEXT: v_lshrrev_b32_e32 v58, 16, v34 -; GFX11-NEXT: v_lshrrev_b32_e32 v57, 8, v34 +; GFX11-NEXT: v_lshrrev_b64 v[52:53], 24, v[13:14] +; GFX11-NEXT: v_lshrrev_b64 v[64:65], 24, v[15:16] +; GFX11-NEXT: v_lshrrev_b32_e32 v147, 24, v18 +; GFX11-NEXT: v_lshrrev_b32_e32 v146, 16, v18 +; GFX11-NEXT: v_lshrrev_b32_e32 v145, 8, v18 +; GFX11-NEXT: v_lshrrev_b32_e32 v151, 16, v17 +; GFX11-NEXT: v_lshrrev_b32_e32 v149, 8, v17 +; GFX11-NEXT: v_lshrrev_b32_e32 v161, 24, v20 +; GFX11-NEXT: v_lshrrev_b32_e32 v160, 16, v20 +; GFX11-NEXT: v_lshrrev_b32_e32 v148, 8, v20 +; GFX11-NEXT: v_lshrrev_b32_e32 v162, 16, v19 +; GFX11-NEXT: v_lshrrev_b32_e32 v150, 8, v19 +; GFX11-NEXT: v_lshrrev_b32_e32 v165, 24, v22 +; GFX11-NEXT: v_lshrrev_b32_e32 v164, 16, v22 +; GFX11-NEXT: v_lshrrev_b32_e32 v163, 8, v22 +; GFX11-NEXT: v_lshrrev_b32_e32 v177, 16, v21 +; GFX11-NEXT: v_lshrrev_b32_e32 v167, 8, v21 +; GFX11-NEXT: v_lshrrev_b32_e32 v179, 24, v24 +; GFX11-NEXT: v_lshrrev_b32_e32 v178, 16, v24 +; GFX11-NEXT: v_lshrrev_b32_e32 v166, 8, v24 +; GFX11-NEXT: v_lshrrev_b32_e32 v180, 16, v23 +; GFX11-NEXT: v_lshrrev_b32_e32 v176, 8, v23 +; GFX11-NEXT: v_lshrrev_b32_e32 v41, 24, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v40, 16, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v182, 8, v28 +; GFX11-NEXT: v_lshrrev_b32_e32 v42, 16, v27 +; GFX11-NEXT: v_lshrrev_b32_e32 v181, 8, v27 +; GFX11-NEXT: v_lshrrev_b32_e32 v45, 24, v30 +; GFX11-NEXT: v_lshrrev_b32_e32 v43, 16, v30 +; GFX11-NEXT: v_lshrrev_b32_e32 v183, 8, v30 +; GFX11-NEXT: v_lshrrev_b32_e32 v46, 16, v29 +; GFX11-NEXT: v_lshrrev_b32_e32 v44, 8, v29 +; GFX11-NEXT: v_lshrrev_b32_e32 v58, 24, v34 +; GFX11-NEXT: v_lshrrev_b32_e32 v57, 16, v34 +; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v34 ; GFX11-NEXT: v_lshrrev_b32_e32 v60, 16, v33 -; GFX11-NEXT: v_lshrrev_b32_e32 v56, 8, v33 -; GFX11-NEXT: v_lshrrev_b32_e32 v72, 24, v36 -; GFX11-NEXT: v_lshrrev_b32_e32 v62, 16, v36 -; GFX11-NEXT: v_lshrrev_b32_e32 v61, 8, v36 -; GFX11-NEXT: v_lshrrev_b32_e32 v73, 16, v35 -; GFX11-NEXT: v_lshrrev_b32_e32 v63, 8, v35 +; GFX11-NEXT: v_lshrrev_b32_e32 v47, 8, v33 +; GFX11-NEXT: v_lshrrev_b32_e32 v63, 24, v36 +; GFX11-NEXT: v_lshrrev_b32_e32 v61, 16, v36 +; GFX11-NEXT: v_lshrrev_b32_e32 v59, 8, v36 +; GFX11-NEXT: v_lshrrev_b32_e32 v72, 16, v35 +; GFX11-NEXT: v_lshrrev_b32_e32 v62, 8, v35 ; GFX11-NEXT: v_lshrrev_b32_e32 v50, 24, v2 ; GFX11-NEXT: v_lshrrev_b32_e32 v39, 16, v2 ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 8, v2 -; GFX11-NEXT: v_lshrrev_b32_e32 v71, 16, v1 +; GFX11-NEXT: v_lshrrev_b32_e32 v55, 16, v1 ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 8, v1 -; GFX11-NEXT: v_lshrrev_b32_e32 v81, 24, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v80, 16, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v55, 8, v4 -; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v3 -; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v3 -; GFX11-NEXT: v_lshrrev_b32_e32 v86, 24, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v85, 16, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v83, 8, v6 -; GFX11-NEXT: v_lshrrev_b32_e32 v97, 16, v5 -; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v5 -; GFX11-NEXT: v_lshrrev_b32_e32 v100, 24, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v99, 16, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v96, 8, v8 -; GFX11-NEXT: v_lshrrev_b32_e32 v101, 16, v7 -; GFX11-NEXT: v_lshrrev_b32_e32 v98, 8, v7 -; GFX11-NEXT: v_lshrrev_b32_e32 v112, 24, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v103, 16, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v102, 8, v10 -; GFX11-NEXT: v_lshrrev_b32_e32 v115, 16, v9 -; GFX11-NEXT: v_lshrrev_b32_e32 v113, 8, v9 -; GFX11-NEXT: v_lshrrev_b32_e32 v118, 24, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v117, 16, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v114, 8, v12 -; GFX11-NEXT: v_lshrrev_b32_e32 v119, 16, v11 -; GFX11-NEXT: v_lshrrev_b32_e32 v116, 8, v11 -; GFX11-NEXT: v_lshrrev_b32_e32 v130, 24, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v129, 16, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v128, 8, v14 -; GFX11-NEXT: v_lshrrev_b32_e32 v133, 16, v13 -; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v13 -; GFX11-NEXT: v_lshrrev_b32_e32 v144, 24, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v135, 16, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v132, 8, v16 -; GFX11-NEXT: v_lshrrev_b32_e32 v145, 16, v15 -; GFX11-NEXT: v_lshrrev_b32_e32 v134, 8, v15 +; GFX11-NEXT: v_lshrrev_b32_e32 v71, 24, v4 +; GFX11-NEXT: v_lshrrev_b32_e32 v65, 16, v4 +; GFX11-NEXT: v_lshrrev_b32_e32 v53, 8, v4 +; GFX11-NEXT: v_lshrrev_b32_e32 v83, 16, v3 +; GFX11-NEXT: v_lshrrev_b32_e32 v81, 8, v3 +; GFX11-NEXT: v_lshrrev_b32_e32 v85, 24, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v84, 16, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v82, 8, v6 +; GFX11-NEXT: v_lshrrev_b32_e32 v96, 16, v5 +; GFX11-NEXT: v_lshrrev_b32_e32 v86, 8, v5 +; GFX11-NEXT: v_lshrrev_b32_e32 v99, 24, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v98, 16, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v87, 8, v8 +; GFX11-NEXT: v_lshrrev_b32_e32 v100, 16, v7 +; GFX11-NEXT: v_lshrrev_b32_e32 v97, 8, v7 +; GFX11-NEXT: v_lshrrev_b32_e32 v103, 24, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v102, 16, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v101, 8, v10 +; GFX11-NEXT: v_lshrrev_b32_e32 v114, 16, v9 +; GFX11-NEXT: v_lshrrev_b32_e32 v112, 8, v9 +; GFX11-NEXT: v_lshrrev_b32_e32 v117, 24, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v116, 16, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v113, 8, v12 +; GFX11-NEXT: v_lshrrev_b32_e32 v118, 16, v11 +; GFX11-NEXT: v_lshrrev_b32_e32 v115, 8, v11 +; GFX11-NEXT: v_lshrrev_b32_e32 v129, 24, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v128, 16, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v119, 8, v14 +; GFX11-NEXT: v_lshrrev_b32_e32 v132, 16, v13 +; GFX11-NEXT: v_lshrrev_b32_e32 v130, 8, v13 +; GFX11-NEXT: v_lshrrev_b32_e32 v135, 24, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v134, 16, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v131, 8, v16 +; GFX11-NEXT: v_lshrrev_b32_e32 v144, 16, v15 +; GFX11-NEXT: v_lshrrev_b32_e32 v133, 8, v15 ; GFX11-NEXT: s_branch .LBB99_5 ; GFX11-NEXT: .LBB99_3: ; GFX11-NEXT: ; implicit-def: $sgpr43 @@ -206484,55 +206845,55 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX11-NEXT: ; implicit-def: $sgpr58 ; GFX11-NEXT: ; implicit-def: $sgpr60 ; GFX11-NEXT: ; implicit-def: $sgpr62 +; GFX11-NEXT: ; implicit-def: $sgpr72 ; GFX11-NEXT: ; implicit-def: $sgpr104 ; GFX11-NEXT: ; implicit-def: $sgpr102 +; GFX11-NEXT: ; implicit-def: $sgpr74 ; GFX11-NEXT: ; implicit-def: $sgpr103 ; GFX11-NEXT: ; implicit-def: $sgpr101 ; GFX11-NEXT: ; implicit-def: $sgpr100 ; GFX11-NEXT: ; implicit-def: $sgpr99 ; GFX11-NEXT: ; implicit-def: $sgpr97 +; GFX11-NEXT: ; implicit-def: $sgpr76 ; GFX11-NEXT: ; implicit-def: $sgpr98 ; GFX11-NEXT: ; implicit-def: $sgpr96 ; GFX11-NEXT: ; implicit-def: $sgpr87 ; GFX11-NEXT: ; implicit-def: $sgpr86 ; GFX11-NEXT: ; implicit-def: $sgpr84 +; GFX11-NEXT: ; implicit-def: $sgpr78 ; GFX11-NEXT: ; implicit-def: $sgpr85 ; GFX11-NEXT: ; implicit-def: $sgpr83 ; GFX11-NEXT: ; implicit-def: $sgpr82 ; GFX11-NEXT: ; implicit-def: $sgpr81 ; GFX11-NEXT: ; implicit-def: $sgpr71 +; GFX11-NEXT: ; implicit-def: $sgpr88 ; GFX11-NEXT: ; implicit-def: $sgpr80 ; GFX11-NEXT: ; implicit-def: $sgpr70 ; GFX11-NEXT: ; implicit-def: $sgpr69 ; GFX11-NEXT: ; implicit-def: $sgpr68 ; GFX11-NEXT: ; implicit-def: $sgpr66 +; GFX11-NEXT: ; implicit-def: $sgpr90 ; GFX11-NEXT: ; implicit-def: $sgpr67 ; GFX11-NEXT: ; implicit-def: $sgpr65 ; GFX11-NEXT: ; implicit-def: $sgpr64 ; GFX11-NEXT: ; implicit-def: $sgpr55 ; GFX11-NEXT: ; implicit-def: $sgpr53 +; GFX11-NEXT: ; implicit-def: $sgpr92 ; GFX11-NEXT: ; implicit-def: $sgpr54 ; GFX11-NEXT: ; implicit-def: $sgpr52 ; GFX11-NEXT: ; implicit-def: $sgpr51 ; GFX11-NEXT: ; implicit-def: $sgpr50 ; GFX11-NEXT: ; implicit-def: $sgpr48 +; GFX11-NEXT: ; implicit-def: $sgpr94 ; GFX11-NEXT: ; implicit-def: $sgpr49 ; GFX11-NEXT: ; implicit-def: $sgpr39 ; GFX11-NEXT: ; implicit-def: $sgpr38 ; GFX11-NEXT: ; implicit-def: $sgpr37 ; GFX11-NEXT: ; implicit-def: $sgpr35 +; GFX11-NEXT: ; implicit-def: $sgpr30 ; GFX11-NEXT: ; implicit-def: $sgpr36 ; GFX11-NEXT: ; implicit-def: $sgpr34 ; GFX11-NEXT: ; implicit-def: $vcc_hi -; GFX11-NEXT: ; implicit-def: $sgpr72 -; GFX11-NEXT: ; implicit-def: $sgpr30 -; GFX11-NEXT: ; implicit-def: $sgpr94 -; GFX11-NEXT: ; implicit-def: $sgpr92 -; GFX11-NEXT: ; implicit-def: $sgpr90 -; GFX11-NEXT: ; implicit-def: $sgpr88 -; GFX11-NEXT: ; implicit-def: $sgpr78 -; GFX11-NEXT: ; implicit-def: $sgpr76 -; GFX11-NEXT: ; implicit-def: $sgpr74 ; GFX11-NEXT: ; implicit-def: $sgpr43 ; GFX11-NEXT: ; kill: killed $sgpr43 ; GFX11-NEXT: ; implicit-def: $sgpr43 @@ -206604,272 +206965,273 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX11-NEXT: s_branch .LBB99_2 ; GFX11-NEXT: .LBB99_4: ; GFX11-NEXT: v_dual_mov_b32 v35, s0 :: v_dual_mov_b32 v36, s1 -; GFX11-NEXT: v_readlane_b32 s0, v76, 0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 0 +; GFX11-NEXT: v_mov_b32_e32 v55, s35 ; GFX11-NEXT: v_dual_mov_b32 v15, s28 :: v_dual_mov_b32 v16, s29 ; GFX11-NEXT: v_dual_mov_b32 v13, s40 :: v_dual_mov_b32 v14, s41 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v63, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 1 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) +; GFX11-NEXT: v_mov_b32_e32 v62, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 1 +; GFX11-NEXT: v_mov_b32_e32 v39, s34 ; GFX11-NEXT: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15 ; GFX11-NEXT: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13 -; GFX11-NEXT: v_mov_b32_e32 v73, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 2 +; GFX11-NEXT: v_mov_b32_e32 v72, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 2 ; GFX11-NEXT: v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11 ; GFX11-NEXT: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v61, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 3 +; GFX11-NEXT: v_mov_b32_e32 v59, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 3 ; GFX11-NEXT: v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7 ; GFX11-NEXT: v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5 -; GFX11-NEXT: v_mov_b32_e32 v62, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 4 +; GFX11-NEXT: v_mov_b32_e32 v61, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 4 ; GFX11-NEXT: v_dual_mov_b32 v33, s2 :: v_dual_mov_b32 v34, s3 ; GFX11-NEXT: v_dual_mov_b32 v29, s16 :: v_dual_mov_b32 v30, s17 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v72, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 5 +; GFX11-NEXT: v_mov_b32_e32 v63, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 5 ; GFX11-NEXT: v_dual_mov_b32 v27, s18 :: v_dual_mov_b32 v28, s19 ; GFX11-NEXT: v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21 -; GFX11-NEXT: v_mov_b32_e32 v56, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 6 +; GFX11-NEXT: v_mov_b32_e32 v47, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 6 ; GFX11-NEXT: v_dual_mov_b32 v21, s22 :: v_dual_mov_b32 v22, s23 ; GFX11-NEXT: v_dual_mov_b32 v19, s24 :: v_dual_mov_b32 v20, s25 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) ; GFX11-NEXT: v_mov_b32_e32 v60, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 7 +; GFX11-NEXT: v_readlane_b32 s0, v75, 7 ; GFX11-NEXT: v_dual_mov_b32 v17, s26 :: v_dual_mov_b32 v18, s27 -; GFX11-NEXT: v_dual_mov_b32 v134, s104 :: v_dual_mov_b32 v145, s102 -; GFX11-NEXT: v_mov_b32_e32 v57, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 8 -; GFX11-NEXT: v_dual_mov_b32 v132, s103 :: v_dual_mov_b32 v135, s101 -; GFX11-NEXT: v_dual_mov_b32 v144, s100 :: v_dual_mov_b32 v131, s99 +; GFX11-NEXT: v_dual_mov_b32 v133, s104 :: v_dual_mov_b32 v144, s102 +; GFX11-NEXT: v_mov_b32_e32 v56, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 8 +; GFX11-NEXT: v_dual_mov_b32 v131, s103 :: v_dual_mov_b32 v134, s101 +; GFX11-NEXT: v_dual_mov_b32 v135, s100 :: v_dual_mov_b32 v130, s99 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mov_b32_e32 v57, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 9 +; GFX11-NEXT: v_dual_mov_b32 v132, s97 :: v_dual_mov_b32 v119, s98 +; GFX11-NEXT: v_dual_mov_b32 v128, s96 :: v_dual_mov_b32 v129, s87 ; GFX11-NEXT: v_mov_b32_e32 v58, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 9 -; GFX11-NEXT: v_dual_mov_b32 v133, s97 :: v_dual_mov_b32 v128, s98 -; GFX11-NEXT: v_dual_mov_b32 v129, s96 :: v_dual_mov_b32 v130, s87 -; GFX11-NEXT: v_mov_b32_e32 v59, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 10 -; GFX11-NEXT: v_dual_mov_b32 v116, s86 :: v_dual_mov_b32 v119, s84 -; GFX11-NEXT: v_dual_mov_b32 v114, s85 :: v_dual_mov_b32 v117, s83 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v45, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 11 -; GFX11-NEXT: v_dual_mov_b32 v118, s82 :: v_dual_mov_b32 v113, s81 -; GFX11-NEXT: v_dual_mov_b32 v115, s71 :: v_dual_mov_b32 v102, s80 -; GFX11-NEXT: v_mov_b32_e32 v47, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 12 -; GFX11-NEXT: v_dual_mov_b32 v103, s70 :: v_dual_mov_b32 v112, s69 -; GFX11-NEXT: v_dual_mov_b32 v98, s68 :: v_dual_mov_b32 v101, s66 +; GFX11-NEXT: v_readlane_b32 s0, v75, 10 +; GFX11-NEXT: v_dual_mov_b32 v115, s86 :: v_dual_mov_b32 v118, s84 +; GFX11-NEXT: v_dual_mov_b32 v113, s85 :: v_dual_mov_b32 v116, s83 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v40, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 13 -; GFX11-NEXT: v_dual_mov_b32 v96, s67 :: v_dual_mov_b32 v99, s65 -; GFX11-NEXT: v_dual_mov_b32 v100, s64 :: v_dual_mov_b32 v87, s55 ; GFX11-NEXT: v_mov_b32_e32 v44, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 14 -; GFX11-NEXT: v_dual_mov_b32 v97, s53 :: v_dual_mov_b32 v86, s51 -; GFX11-NEXT: v_dual_mov_b32 v83, s54 :: v_dual_mov_b32 v82, s50 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_readlane_b32 s0, v75, 11 +; GFX11-NEXT: v_dual_mov_b32 v117, s82 :: v_dual_mov_b32 v112, s81 +; GFX11-NEXT: v_dual_mov_b32 v114, s71 :: v_dual_mov_b32 v101, s80 ; GFX11-NEXT: v_mov_b32_e32 v46, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 15 -; GFX11-NEXT: v_dual_mov_b32 v85, s52 :: v_dual_mov_b32 v84, s48 -; GFX11-NEXT: v_dual_mov_b32 v55, s49 :: v_dual_mov_b32 v80, s39 -; GFX11-NEXT: v_mov_b32_e32 v182, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 16 -; GFX11-NEXT: v_dual_mov_b32 v81, s38 :: v_dual_mov_b32 v32, s37 -; GFX11-NEXT: v_dual_mov_b32 v71, s35 :: v_dual_mov_b32 v26, s36 +; GFX11-NEXT: v_readlane_b32 s0, v75, 12 +; GFX11-NEXT: v_dual_mov_b32 v102, s70 :: v_dual_mov_b32 v103, s69 +; GFX11-NEXT: v_dual_mov_b32 v97, s68 :: v_dual_mov_b32 v100, s66 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v43, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 17 -; GFX11-NEXT: v_dual_mov_b32 v39, s34 :: v_dual_mov_b32 v50, vcc_hi -; GFX11-NEXT: v_dual_mov_b32 v51, s72 :: v_dual_mov_b32 v52, s62 ; GFX11-NEXT: v_mov_b32_e32 v183, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 18 -; GFX11-NEXT: v_dual_mov_b32 v53, s60 :: v_dual_mov_b32 v54, s58 -; GFX11-NEXT: v_dual_mov_b32 v64, s56 :: v_dual_mov_b32 v65, s46 +; GFX11-NEXT: v_readlane_b32 s0, v75, 13 +; GFX11-NEXT: v_dual_mov_b32 v87, s67 :: v_dual_mov_b32 v98, s65 +; GFX11-NEXT: v_dual_mov_b32 v99, s64 :: v_dual_mov_b32 v86, s55 +; GFX11-NEXT: v_mov_b32_e32 v43, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 14 +; GFX11-NEXT: v_dual_mov_b32 v96, s53 :: v_dual_mov_b32 v85, s51 +; GFX11-NEXT: v_dual_mov_b32 v82, s54 :: v_dual_mov_b32 v81, s50 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mov_b32_e32 v45, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 15 +; GFX11-NEXT: v_dual_mov_b32 v84, s52 :: v_dual_mov_b32 v83, s48 +; GFX11-NEXT: v_dual_mov_b32 v53, s49 :: v_dual_mov_b32 v32, s37 +; GFX11-NEXT: v_mov_b32_e32 v181, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 16 +; GFX11-NEXT: v_dual_mov_b32 v65, s39 :: v_dual_mov_b32 v26, s36 +; GFX11-NEXT: v_dual_mov_b32 v71, s38 :: v_dual_mov_b32 v50, vcc_hi ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v41, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 19 -; GFX11-NEXT: v_dual_mov_b32 v69, s44 :: v_dual_mov_b32 v70, s42 -; GFX11-NEXT: v_dual_mov_b32 v25, s74 :: v_dual_mov_b32 v38, s88 ; GFX11-NEXT: v_mov_b32_e32 v42, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 20 -; GFX11-NEXT: v_dual_mov_b32 v31, s76 :: v_dual_mov_b32 v48, s90 -; GFX11-NEXT: v_dual_mov_b32 v37, s78 :: v_dual_mov_b32 v66, s94 +; GFX11-NEXT: v_readlane_b32 s0, v75, 17 +; GFX11-NEXT: v_dual_mov_b32 v51, s72 :: v_dual_mov_b32 v68, s56 +; GFX11-NEXT: v_dual_mov_b32 v67, s58 :: v_dual_mov_b32 v70, s44 +; GFX11-NEXT: v_mov_b32_e32 v182, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 18 +; GFX11-NEXT: v_dual_mov_b32 v69, s46 :: v_dual_mov_b32 v80, s42 +; GFX11-NEXT: v_dual_mov_b32 v25, s30 :: v_dual_mov_b32 v38, s90 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-NEXT: v_mov_b32_e32 v177, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 21 -; GFX11-NEXT: v_mov_b32_e32 v49, s92 -; GFX11-NEXT: v_mov_b32_e32 v67, s30 -; GFX11-NEXT: v_mov_b32_e32 v181, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 22 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v167, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 23 -; GFX11-NEXT: v_mov_b32_e32 v179, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 24 -; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v180, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 25 +; GFX11-NEXT: v_mov_b32_e32 v40, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 19 +; GFX11-NEXT: v_dual_mov_b32 v31, s94 :: v_dual_mov_b32 v48, s88 +; GFX11-NEXT: v_dual_mov_b32 v37, s92 :: v_dual_mov_b32 v52, s76 +; GFX11-NEXT: v_mov_b32_e32 v41, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 20 +; GFX11-NEXT: v_dual_mov_b32 v49, s78 :: v_dual_mov_b32 v64, s74 +; GFX11-NEXT: v_mov_b32_e32 v54, s62 +; GFX11-NEXT: v_mov_b32_e32 v66, s60 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) ; GFX11-NEXT: v_mov_b32_e32 v176, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 26 +; GFX11-NEXT: v_readlane_b32 s0, v75, 21 +; GFX11-NEXT: v_mov_b32_e32 v180, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 22 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v166, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 23 ; GFX11-NEXT: v_mov_b32_e32 v178, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 27 -; GFX11-NEXT: v_mov_b32_e32 v164, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 28 +; GFX11-NEXT: v_readlane_b32 s0, v75, 24 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v165, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 29 -; GFX11-NEXT: v_mov_b32_e32 v166, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 30 +; GFX11-NEXT: v_mov_b32_e32 v179, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 25 +; GFX11-NEXT: v_mov_b32_e32 v167, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 26 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v151, s0 -; GFX11-NEXT: v_readlane_b32 s0, v76, 31 +; GFX11-NEXT: v_mov_b32_e32 v177, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 27 ; GFX11-NEXT: v_mov_b32_e32 v163, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 28 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v149, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 1 -; GFX11-NEXT: v_mov_b32_e32 v161, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 2 +; GFX11-NEXT: v_mov_b32_e32 v164, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 29 +; GFX11-NEXT: v_mov_b32_e32 v165, s0 +; GFX11-NEXT: v_readlane_b32 s0, v75, 30 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-NEXT: v_mov_b32_e32 v162, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 3 ; GFX11-NEXT: v_mov_b32_e32 v150, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 4 +; GFX11-NEXT: v_readlane_b32 s0, v75, 31 +; GFX11-NEXT: v_mov_b32_e32 v162, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 0 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v148, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 1 ; GFX11-NEXT: v_mov_b32_e32 v160, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 5 -; GFX11-NEXT: v_mov_b32_e32 v146, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 6 +; GFX11-NEXT: v_readlane_b32 s0, v76, 2 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v161, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 3 +; GFX11-NEXT: v_mov_b32_e32 v149, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 4 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v151, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 5 +; GFX11-NEXT: v_mov_b32_e32 v145, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 6 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v146, s0 +; GFX11-NEXT: v_readlane_b32 s0, v76, 7 ; GFX11-NEXT: v_mov_b32_e32 v147, s0 -; GFX11-NEXT: v_readlane_b32 s0, v77, 7 -; GFX11-NEXT: v_mov_b32_e32 v148, s0 ; GFX11-NEXT: .LBB99_5: ; %end -; GFX11-NEXT: v_perm_b32 v68, v73, v70, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v70, v62, v72, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v69, v60, v69, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v36, v36, v61, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v65, v47, v65, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v64, v43, v64, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v80, v72, v80, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v70, v60, v70, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v69, v46, v69, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v68, v42, v68, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v35, v35, v62, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v80, 16, v80 +; GFX11-NEXT: v_perm_b32 v47, v33, v47, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70 -; GFX11-NEXT: v_perm_b32 v35, v35, v63, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68 -; GFX11-NEXT: v_perm_b32 v56, v33, v56, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v61, v61, v63, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v57, v57, v58, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v29, v29, v44, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69 -; GFX11-NEXT: v_perm_b32 v58, v58, v59, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v57, v34, v57, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v34, v36, v70 -; GFX11-NEXT: v_perm_b32 v29, v29, v45, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v65, 16, v65 -; GFX11-NEXT: v_perm_b32 v70, v27, v182, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64 -; GFX11-NEXT: v_or_b32_e32 v33, v35, v68 -; GFX11-NEXT: v_or_b32_e32 v35, v56, v69 -; GFX11-NEXT: v_perm_b32 v68, v44, v46, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v69, v41, v42, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v58 -; GFX11-NEXT: v_or_b32_e32 v27, v29, v65 -; GFX11-NEXT: v_or_b32_e32 v29, v70, v64 -; GFX11-NEXT: v_perm_b32 v54, v181, v54, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v64, v179, v180, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v53, v178, v53, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v30, v30, v40, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v181, v27, v181, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68 -; GFX11-NEXT: v_perm_b32 v182, v28, v183, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v69, 16, v69 -; GFX11-NEXT: v_or_b32_e32 v36, v57, v58 -; GFX11-NEXT: v_perm_b32 v23, v23, v177, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v54, 16, v54 -; GFX11-NEXT: v_perm_b32 v24, v24, v167, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v64, 16, v64 -; GFX11-NEXT: v_perm_b32 v21, v21, v176, 0xc0c0004 -; GFX11-NEXT: v_lshlrev_b32_e32 v53, 16, v53 -; GFX11-NEXT: v_or_b32_e32 v28, v30, v68 -; GFX11-NEXT: v_or_b32_e32 v30, v182, v69 +; GFX11-NEXT: v_or_b32_e32 v33, v35, v80 +; GFX11-NEXT: v_or_b32_e32 v35, v47, v70 +; GFX11-NEXT: v_perm_b32 v70, v43, v45, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v80, v40, v41, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v36, v36, v59, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v58, 16, v61 +; GFX11-NEXT: v_perm_b32 v56, v34, v56, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v57, 16, v57 +; GFX11-NEXT: v_or_b32_e32 v27, v29, v69 +; GFX11-NEXT: v_or_b32_e32 v29, v181, v68 +; GFX11-NEXT: v_perm_b32 v67, v180, v67, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v68, v178, v179, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v66, v177, v66, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v30, v30, v183, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v70, 16, v70 +; GFX11-NEXT: v_perm_b32 v182, v28, v182, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v80, 16, v80 +; GFX11-NEXT: v_or_b32_e32 v34, v36, v58 +; GFX11-NEXT: v_or_b32_e32 v36, v56, v57 +; GFX11-NEXT: v_perm_b32 v23, v23, v176, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v67, 16, v67 +; GFX11-NEXT: v_perm_b32 v24, v24, v166, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v68, 16, v68 +; GFX11-NEXT: v_perm_b32 v21, v21, v167, 0xc0c0004 +; GFX11-NEXT: v_lshlrev_b32_e32 v66, 16, v66 +; GFX11-NEXT: v_or_b32_e32 v28, v30, v70 +; GFX11-NEXT: v_or_b32_e32 v30, v182, v80 ; GFX11-NEXT: s_clause 0x1 ; GFX11-NEXT: scratch_store_b128 v0, v[33:36], off ; GFX11-NEXT: scratch_store_b128 v0, v[27:30], off offset:16 -; GFX11-NEXT: v_or_b32_e32 v27, v23, v54 -; GFX11-NEXT: v_perm_b32 v23, v165, v166, 0xc0c0004 -; GFX11-NEXT: v_or_b32_e32 v28, v24, v64 -; GFX11-NEXT: v_or_b32_e32 v29, v21, v53 -; GFX11-NEXT: v_perm_b32 v21, v22, v164, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v22, v163, v52, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v161, v162, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v30, v160, v51, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v27, v23, v67 +; GFX11-NEXT: v_perm_b32 v23, v164, v165, 0xc0c0004 +; GFX11-NEXT: v_or_b32_e32 v28, v24, v68 +; GFX11-NEXT: v_or_b32_e32 v29, v21, v66 +; GFX11-NEXT: v_perm_b32 v21, v22, v163, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v22, v162, v54, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v24, v160, v161, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v30, v151, v51, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; GFX11-NEXT: v_perm_b32 v19, v19, v151, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v19, v19, v150, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; GFX11-NEXT: v_perm_b32 v20, v20, v149, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v20, v20, v148, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; GFX11-NEXT: v_perm_b32 v17, v17, v150, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v17, v17, v149, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v33, 16, v30 ; GFX11-NEXT: v_or_b32_e32 v30, v21, v23 ; GFX11-NEXT: v_or_b32_e32 v19, v19, v22 -; GFX11-NEXT: v_perm_b32 v22, v147, v148, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v22, v146, v147, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v20, v20, v24 ; GFX11-NEXT: v_or_b32_e32 v21, v17, v33 -; GFX11-NEXT: v_perm_b32 v17, v18, v146, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v18, v145, v67, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v133, v66, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v23, v135, v144, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v17, v18, v145, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v18, v144, v64, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v24, v132, v52, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v23, v134, v135, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; GFX11-NEXT: v_perm_b32 v15, v15, v134, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v15, v15, v133, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-NEXT: v_perm_b32 v13, v13, v131, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v13, v13, v130, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; GFX11-NEXT: v_perm_b32 v16, v16, v132, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v16, v16, v131, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; GFX11-NEXT: v_or_b32_e32 v22, v17, v22 ; GFX11-NEXT: v_or_b32_e32 v15, v15, v18 -; GFX11-NEXT: v_perm_b32 v18, v129, v130, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v18, v128, v129, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v17, v13, v24 -; GFX11-NEXT: v_perm_b32 v24, v115, v48, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v24, v114, v48, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v16, v16, v23 -; GFX11-NEXT: v_perm_b32 v13, v14, v128, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v14, v119, v49, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v23, v117, v118, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v13, v14, v119, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v14, v118, v49, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v23, v116, v117, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-NEXT: v_perm_b32 v9, v9, v113, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v9, v9, v112, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; GFX11-NEXT: v_perm_b32 v11, v11, v116, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v11, v11, v115, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-NEXT: v_perm_b32 v12, v12, v114, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v12, v12, v113, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; GFX11-NEXT: v_or_b32_e32 v18, v13, v18 ; GFX11-NEXT: v_or_b32_e32 v13, v9, v24 -; GFX11-NEXT: v_perm_b32 v9, v10, v102, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v10, v101, v38, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v9, v10, v101, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v10, v100, v38, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v11, v11, v14 -; GFX11-NEXT: v_perm_b32 v14, v103, v112, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v14, v102, v103, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v12, v12, v23 -; GFX11-NEXT: v_perm_b32 v23, v99, v100, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v97, v37, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v7, v7, v98, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v23, v98, v99, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v24, v96, v37, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v7, v7, v97, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX11-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX11-NEXT: v_perm_b32 v8, v8, v96, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v8, v8, v87, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; GFX11-NEXT: v_perm_b32 v5, v5, v87, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v5, v5, v86, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; GFX11-NEXT: v_or_b32_e32 v7, v7, v10 -; GFX11-NEXT: v_perm_b32 v10, v85, v86, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v10, v84, v85, 0xc0c0004 ; GFX11-NEXT: v_or_b32_e32 v14, v9, v14 ; GFX11-NEXT: v_or_b32_e32 v8, v8, v23 ; GFX11-NEXT: v_or_b32_e32 v9, v5, v24 -; GFX11-NEXT: v_perm_b32 v5, v84, v31, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v23, v80, v81, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v24, v71, v25, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v5, v83, v31, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v23, v65, v71, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v24, v55, v25, 0xc0c0004 ; GFX11-NEXT: v_perm_b32 v25, v39, v50, 0xc0c0004 -; GFX11-NEXT: v_perm_b32 v6, v6, v83, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v6, v6, v82, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; GFX11-NEXT: v_perm_b32 v3, v3, v82, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v3, v3, v81, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-NEXT: v_perm_b32 v4, v4, v55, 0xc0c0004 +; GFX11-NEXT: v_perm_b32 v4, v4, v53, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; GFX11-NEXT: v_perm_b32 v31, v1, v32, 0xc0c0004 ; GFX11-NEXT: v_lshlrev_b32_e32 v24, 16, v24 @@ -206887,72 +207249,71 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3 ; GFX11-NEXT: scratch_store_b128 v0, v[11:14], off offset:80 ; GFX11-NEXT: scratch_store_b128 v0, v[7:10], off offset:96 ; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:112 -; GFX11-NEXT: s_clause 0x11 ; 72-byte Folded Reload -; GFX11-NEXT: scratch_load_b32 v73, off, s32 -; GFX11-NEXT: scratch_load_b32 v72, off, s32 offset:4 -; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:8 -; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:12 -; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:16 -; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:20 -; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:24 -; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:28 -; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:32 -; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:36 -; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:40 -; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:44 -; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:48 -; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:52 -; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:56 -; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:60 -; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:64 -; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:68 -; GFX11-NEXT: v_readlane_b32 s30, v75, 7 -; GFX11-NEXT: v_readlane_b32 s31, v75, 8 -; GFX11-NEXT: v_readlane_b32 s104, v75, 6 -; GFX11-NEXT: v_readlane_b32 s103, v75, 5 -; GFX11-NEXT: v_readlane_b32 s102, v75, 4 -; GFX11-NEXT: v_readlane_b32 s101, v75, 3 -; GFX11-NEXT: v_readlane_b32 s100, v75, 2 -; GFX11-NEXT: v_readlane_b32 s99, v75, 1 -; GFX11-NEXT: v_readlane_b32 s98, v75, 0 -; GFX11-NEXT: v_readlane_b32 s97, v74, 31 -; GFX11-NEXT: v_readlane_b32 s96, v74, 30 -; GFX11-NEXT: v_readlane_b32 s87, v74, 29 -; GFX11-NEXT: v_readlane_b32 s86, v74, 28 -; GFX11-NEXT: v_readlane_b32 s85, v74, 27 -; GFX11-NEXT: v_readlane_b32 s84, v74, 26 -; GFX11-NEXT: v_readlane_b32 s83, v74, 25 -; GFX11-NEXT: v_readlane_b32 s82, v74, 24 -; GFX11-NEXT: v_readlane_b32 s81, v74, 23 -; GFX11-NEXT: v_readlane_b32 s80, v74, 22 -; GFX11-NEXT: v_readlane_b32 s71, v74, 21 -; GFX11-NEXT: v_readlane_b32 s70, v74, 20 -; GFX11-NEXT: v_readlane_b32 s69, v74, 19 -; GFX11-NEXT: v_readlane_b32 s68, v74, 18 -; GFX11-NEXT: v_readlane_b32 s67, v74, 17 -; GFX11-NEXT: v_readlane_b32 s66, v74, 16 -; GFX11-NEXT: v_readlane_b32 s65, v74, 15 -; GFX11-NEXT: v_readlane_b32 s64, v74, 14 -; GFX11-NEXT: v_readlane_b32 s55, v74, 13 -; GFX11-NEXT: v_readlane_b32 s54, v74, 12 -; GFX11-NEXT: v_readlane_b32 s53, v74, 11 -; GFX11-NEXT: v_readlane_b32 s52, v74, 10 -; GFX11-NEXT: v_readlane_b32 s51, v74, 9 -; GFX11-NEXT: v_readlane_b32 s50, v74, 8 -; GFX11-NEXT: v_readlane_b32 s49, v74, 7 -; GFX11-NEXT: v_readlane_b32 s48, v74, 6 -; GFX11-NEXT: v_readlane_b32 s39, v74, 5 -; GFX11-NEXT: v_readlane_b32 s38, v74, 4 -; GFX11-NEXT: v_readlane_b32 s37, v74, 3 -; GFX11-NEXT: v_readlane_b32 s36, v74, 2 -; GFX11-NEXT: v_readlane_b32 s35, v74, 1 -; GFX11-NEXT: v_readlane_b32 s34, v74, 0 +; GFX11-NEXT: s_clause 0x10 ; 68-byte Folded Reload +; GFX11-NEXT: scratch_load_b32 v72, off, s32 +; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:4 +; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:8 +; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:12 +; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:16 +; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:20 +; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:24 +; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:28 +; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:32 +; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:36 +; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:40 +; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:44 +; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:48 +; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:52 +; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:56 +; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:60 +; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:64 +; GFX11-NEXT: v_readlane_b32 s30, v74, 7 +; GFX11-NEXT: v_readlane_b32 s31, v74, 8 +; GFX11-NEXT: v_readlane_b32 s104, v74, 6 +; GFX11-NEXT: v_readlane_b32 s103, v74, 5 +; GFX11-NEXT: v_readlane_b32 s102, v74, 4 +; GFX11-NEXT: v_readlane_b32 s101, v74, 3 +; GFX11-NEXT: v_readlane_b32 s100, v74, 2 +; GFX11-NEXT: v_readlane_b32 s99, v74, 1 +; GFX11-NEXT: v_readlane_b32 s98, v74, 0 +; GFX11-NEXT: v_readlane_b32 s97, v73, 31 +; GFX11-NEXT: v_readlane_b32 s96, v73, 30 +; GFX11-NEXT: v_readlane_b32 s87, v73, 29 +; GFX11-NEXT: v_readlane_b32 s86, v73, 28 +; GFX11-NEXT: v_readlane_b32 s85, v73, 27 +; GFX11-NEXT: v_readlane_b32 s84, v73, 26 +; GFX11-NEXT: v_readlane_b32 s83, v73, 25 +; GFX11-NEXT: v_readlane_b32 s82, v73, 24 +; GFX11-NEXT: v_readlane_b32 s81, v73, 23 +; GFX11-NEXT: v_readlane_b32 s80, v73, 22 +; GFX11-NEXT: v_readlane_b32 s71, v73, 21 +; GFX11-NEXT: v_readlane_b32 s70, v73, 20 +; GFX11-NEXT: v_readlane_b32 s69, v73, 19 +; GFX11-NEXT: v_readlane_b32 s68, v73, 18 +; GFX11-NEXT: v_readlane_b32 s67, v73, 17 +; GFX11-NEXT: v_readlane_b32 s66, v73, 16 +; GFX11-NEXT: v_readlane_b32 s65, v73, 15 +; GFX11-NEXT: v_readlane_b32 s64, v73, 14 +; GFX11-NEXT: v_readlane_b32 s55, v73, 13 +; GFX11-NEXT: v_readlane_b32 s54, v73, 12 +; GFX11-NEXT: v_readlane_b32 s53, v73, 11 +; GFX11-NEXT: v_readlane_b32 s52, v73, 10 +; GFX11-NEXT: v_readlane_b32 s51, v73, 9 +; GFX11-NEXT: v_readlane_b32 s50, v73, 8 +; GFX11-NEXT: v_readlane_b32 s49, v73, 7 +; GFX11-NEXT: v_readlane_b32 s48, v73, 6 +; GFX11-NEXT: v_readlane_b32 s39, v73, 5 +; GFX11-NEXT: v_readlane_b32 s38, v73, 4 +; GFX11-NEXT: v_readlane_b32 s37, v73, 3 +; GFX11-NEXT: v_readlane_b32 s36, v73, 2 +; GFX11-NEXT: v_readlane_b32 s35, v73, 1 +; GFX11-NEXT: v_readlane_b32 s34, v73, 0 ; GFX11-NEXT: s_or_saveexec_b32 s0, -1 ; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Reload +; GFX11-NEXT: scratch_load_b32 v73, off, s32 offset:68 ; GFX11-NEXT: scratch_load_b32 v74, off, s32 offset:72 ; GFX11-NEXT: scratch_load_b32 v75, off, s32 offset:76 ; GFX11-NEXT: scratch_load_b32 v76, off, s32 offset:80 -; GFX11-NEXT: scratch_load_b32 v77, off, s32 offset:84 ; GFX11-NEXT: s_mov_b32 exec_lo, s0 ; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_setpc_b64 s[30:31] @@ -210454,7 +210815,7 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg % ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:688 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -210477,1351 +210838,1480 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg % ; SI-NEXT: v_writelane_b32 v63, s30, 3 ; SI-NEXT: v_writelane_b32 v63, s31, 4 ; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 -; SI-NEXT: v_readfirstlane_b32 s92, v4 -; SI-NEXT: v_readfirstlane_b32 s78, v7 -; SI-NEXT: s_and_b32 s93, s92, 0xffff0000 -; SI-NEXT: v_readfirstlane_b32 s34, v0 -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s6 -; SI-NEXT: v_readfirstlane_b32 s76, v8 -; SI-NEXT: s_and_b32 s79, s78, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: s_lshl_b32 s7, s28, 16 +; SI-NEXT: s_and_b32 s28, s19, 0xffff0000 +; SI-NEXT: s_and_b32 s10, s26, 0xffff0000 +; SI-NEXT: s_lshl_b32 s11, s26, 16 +; SI-NEXT: s_and_b32 s26, s21, 0xffff0000 +; SI-NEXT: v_readfirstlane_b32 s30, v1 +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s28 +; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 +; SI-NEXT: s_lshl_b32 s15, s24, 16 +; SI-NEXT: s_and_b32 s24, s23, 0xffff0000 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s93 -; SI-NEXT: v_readfirstlane_b32 s46, v15 -; SI-NEXT: s_and_b32 s77, s76, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s26 +; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s79 -; SI-NEXT: v_readfirstlane_b32 s44, v16 -; SI-NEXT: s_and_b32 s47, s46, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s24 +; SI-NEXT: s_and_b32 s8, s27, 0xffff0000 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s77 -; SI-NEXT: v_readfirstlane_b32 s42, v17 -; SI-NEXT: s_and_b32 s45, s44, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s12 +; SI-NEXT: s_and_b32 s4, s29, 0xffff0000 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s47 -; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s8 +; SI-NEXT: v_readfirstlane_b32 s94, v3 +; SI-NEXT: s_and_b32 s31, s30, 0xffff0000 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45 -; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 -; SI-NEXT: s_lshl_b32 s15, s24, 16 -; SI-NEXT: s_and_b32 s24, s23, 0xffff0000 -; SI-NEXT: s_lshl_b32 s23, s23, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff0000 -; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s4 +; SI-NEXT: v_readfirstlane_b32 s90, v5 +; SI-NEXT: s_and_b32 s95, s94, 0xffff0000 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s43 -; SI-NEXT: v_readfirstlane_b32 s30, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; SI-NEXT: v_mul_f32_e64 v1, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s31 +; SI-NEXT: v_readfirstlane_b32 s78, v7 +; SI-NEXT: s_and_b32 s91, s90, 0xffff0000 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s23 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s15 -; SI-NEXT: s_lshl_b32 s11, s26, 16 -; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2 -; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000 -; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16 -; SI-NEXT: s_lshl_b32 s92, s92, 16 -; SI-NEXT: v_readfirstlane_b32 s72, v10 -; SI-NEXT: s_and_b32 s73, s72, 0xffff0000 -; SI-NEXT: s_lshl_b32 s72, s72, 16 -; SI-NEXT: v_readfirstlane_b32 s60, v12 -; SI-NEXT: s_and_b32 s61, s60, 0xffff0000 -; SI-NEXT: s_lshl_b32 s60, s60, 16 -; SI-NEXT: v_readfirstlane_b32 s56, v14 -; SI-NEXT: s_and_b32 s57, s56, 0xffff0000 -; SI-NEXT: s_lshl_b32 s56, s56, 16 -; SI-NEXT: v_readfirstlane_b32 s58, v13 +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s95 ; SI-NEXT: v_readfirstlane_b32 s62, v11 +; SI-NEXT: s_and_b32 s79, s78, 0xffff0000 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s91 +; SI-NEXT: v_readfirstlane_b32 s58, v13 +; SI-NEXT: s_and_b32 s63, s62, 0xffff0000 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s79 +; SI-NEXT: v_readfirstlane_b32 s46, v15 +; SI-NEXT: s_and_b32 s59, s58, 0xffff0000 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s63 +; SI-NEXT: s_and_b32 s40, s17, 0xffff0000 +; SI-NEXT: v_readfirstlane_b32 s42, v17 +; SI-NEXT: v_readfirstlane_b32 s44, v16 +; SI-NEXT: s_and_b32 s47, s46, 0xffff0000 +; SI-NEXT: v_readfirstlane_b32 s56, v14 +; SI-NEXT: v_readfirstlane_b32 s60, v12 +; SI-NEXT: v_readfirstlane_b32 s72, v10 ; SI-NEXT: v_readfirstlane_b32 s74, v9 +; SI-NEXT: v_readfirstlane_b32 s76, v8 ; SI-NEXT: v_readfirstlane_b32 s88, v6 -; SI-NEXT: v_readfirstlane_b32 s90, v5 -; SI-NEXT: v_readfirstlane_b32 s94, v3 -; SI-NEXT: s_and_b32 s4, s29, 0xffff0000 +; SI-NEXT: v_readfirstlane_b32 s92, v4 +; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2 +; SI-NEXT: v_readfirstlane_b32 s34, v0 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s59 ; SI-NEXT: s_lshl_b32 s5, s29, 16 -; SI-NEXT: s_lshl_b32 s7, s28, 16 -; SI-NEXT: s_and_b32 s8, s27, 0xffff0000 ; SI-NEXT: s_lshl_b32 s9, s27, 16 -; SI-NEXT: s_and_b32 s10, s26, 0xffff0000 -; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 ; SI-NEXT: s_lshl_b32 s13, s25, 16 +; SI-NEXT: s_lshl_b32 s23, s23, 16 ; SI-NEXT: s_and_b32 s25, s22, 0xffff0000 ; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: s_and_b32 s26, s21, 0xffff0000 ; SI-NEXT: s_lshl_b32 s21, s21, 16 ; SI-NEXT: s_and_b32 s27, s20, 0xffff0000 ; SI-NEXT: s_lshl_b32 s20, s20, 16 -; SI-NEXT: s_and_b32 s28, s19, 0xffff0000 ; SI-NEXT: s_lshl_b32 s19, s19, 16 ; SI-NEXT: s_and_b32 s29, s18, 0xffff0000 ; SI-NEXT: s_lshl_b32 s18, s18, 16 +; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_and_b32 s41, s16, 0xffff0000 ; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 ; SI-NEXT: s_lshl_b32 s42, s42, 16 +; SI-NEXT: s_and_b32 s45, s44, 0xffff0000 ; SI-NEXT: s_lshl_b32 s44, s44, 16 ; SI-NEXT: s_lshl_b32 s46, s46, 16 -; SI-NEXT: s_and_b32 s59, s58, 0xffff0000 +; SI-NEXT: s_and_b32 s57, s56, 0xffff0000 +; SI-NEXT: s_lshl_b32 s56, s56, 16 ; SI-NEXT: s_lshl_b32 s58, s58, 16 -; SI-NEXT: s_and_b32 s63, s62, 0xffff0000 +; SI-NEXT: s_and_b32 s61, s60, 0xffff0000 +; SI-NEXT: s_lshl_b32 s60, s60, 16 ; SI-NEXT: s_lshl_b32 s62, s62, 16 +; SI-NEXT: s_and_b32 s73, s72, 0xffff0000 +; SI-NEXT: s_lshl_b32 s72, s72, 16 ; SI-NEXT: s_and_b32 s75, s74, 0xffff0000 ; SI-NEXT: s_lshl_b32 s74, s74, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s11 +; SI-NEXT: s_and_b32 s77, s76, 0xffff0000 ; SI-NEXT: s_lshl_b32 s76, s76, 16 ; SI-NEXT: s_lshl_b32 s78, s78, 16 ; SI-NEXT: s_and_b32 s89, s88, 0xffff0000 ; SI-NEXT: s_lshl_b32 s88, s88, 16 -; SI-NEXT: s_and_b32 s91, s90, 0xffff0000 ; SI-NEXT: s_lshl_b32 s90, s90, 16 -; SI-NEXT: s_and_b32 s95, s94, 0xffff0000 +; SI-NEXT: s_and_b32 s93, s92, 0xffff0000 +; SI-NEXT: s_lshl_b32 s92, s92, 16 ; SI-NEXT: s_lshl_b32 s94, s94, 16 -; SI-NEXT: s_and_b32 s31, s30, 0xffff0000 +; SI-NEXT: s_and_b32 vcc_hi, vcc_lo, 0xffff0000 +; SI-NEXT: s_lshl_b32 vcc_lo, vcc_lo, 16 ; SI-NEXT: s_lshl_b32 s30, s30, 16 ; SI-NEXT: s_and_b32 s35, s34, 0xffff0000 ; SI-NEXT: s_lshl_b32 s34, s34, 16 ; SI-NEXT: v_readfirstlane_b32 s36, v18 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s40 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s47 ; SI-NEXT: s_cmp_lg_u32 s36, 0 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v44, 1.0, s40 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s29 -; SI-NEXT: v_mul_f32_e64 v3, 1.0, s28 -; SI-NEXT: v_mul_f32_e64 v53, 1.0, s27 -; SI-NEXT: v_mul_f32_e64 v5, 1.0, s26 -; SI-NEXT: v_mul_f32_e64 v9, 1.0, s25 -; SI-NEXT: v_mul_f32_e64 v10, 1.0, s24 +; SI-NEXT: v_mul_f32_e64 v4, 1.0, s41 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v29, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v12, 1.0, s19 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v8, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v5, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v6, 1.0, s23 ; SI-NEXT: v_mul_f32_e64 v62, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v14, 1.0, s12 -; SI-NEXT: v_mul_f32_e64 v15, 1.0, s10 -; SI-NEXT: v_mul_f32_e64 v17, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v18, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v51, 1.0, s35 -; SI-NEXT: v_mul_f32_e64 v21, 1.0, s31 -; SI-NEXT: v_mul_f32_e64 v38, 1.0, vcc_hi -; SI-NEXT: v_mul_f32_e64 v29, 1.0, s95 -; SI-NEXT: v_mul_f32_e64 v32, 1.0, s91 -; SI-NEXT: v_mul_f32_e64 v26, 1.0, s89 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s75 -; SI-NEXT: v_mul_f32_e64 v55, 1.0, s73 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s63 -; SI-NEXT: v_mul_f32_e64 v2, 1.0, s61 -; SI-NEXT: v_mul_f32_e64 v37, 1.0, s59 -; SI-NEXT: v_mul_f32_e64 v7, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v4, 1.0, s21 -; SI-NEXT: v_mul_f32_e64 v13, 1.0, s13 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s9 -; SI-NEXT: v_mul_f32_e64 v19, 1.0, s5 -; SI-NEXT: v_mul_f32_e64 v22, 1.0, s30 -; SI-NEXT: v_mul_f32_e64 v35, 1.0, s94 -; SI-NEXT: v_mul_f32_e64 v34, 1.0, s90 -; SI-NEXT: v_mul_f32_e64 v31, 1.0, s78 -; SI-NEXT: v_mul_f32_e64 v28, 1.0, s74 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s62 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, vcc_lo -; SI-NEXT: v_mul_f32_e64 v27, 1.0, s58 -; SI-NEXT: v_mul_f32_e64 v30, 1.0, s46 -; SI-NEXT: v_mul_f32_e64 v33, 1.0, s42 -; SI-NEXT: v_mul_f32_e64 v52, 1.0, s16 -; SI-NEXT: v_mul_f32_e64 v50, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v41, 1.0, s20 -; SI-NEXT: v_mul_f32_e64 v40, 1.0, s22 -; SI-NEXT: v_mul_f32_e64 v45, 1.0, s7 -; SI-NEXT: v_mul_f32_e64 v23, 1.0, s34 -; SI-NEXT: v_mul_f32_e64 v6, 1.0, s88 +; SI-NEXT: v_mul_f32_e64 v11, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v34, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v10, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v43, 1.0, s6 +; SI-NEXT: v_mul_f32_e64 v15, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v60, 1.0, s35 +; SI-NEXT: v_mul_f32_e64 v14, 1.0, s30 +; SI-NEXT: v_mul_f32_e64 v33, 1.0, vcc_hi +; SI-NEXT: v_mul_f32_e64 v19, 1.0, s94 +; SI-NEXT: v_mul_f32_e64 v25, 1.0, s93 +; SI-NEXT: v_mul_f32_e64 v18, 1.0, s90 +; SI-NEXT: v_mul_f32_e64 v21, 1.0, s89 +; SI-NEXT: v_mul_f32_e64 v23, 1.0, s78 +; SI-NEXT: v_mul_f32_e64 v40, 1.0, s77 +; SI-NEXT: v_mul_f32_e64 v38, 1.0, s75 +; SI-NEXT: v_mul_f32_e64 v22, 1.0, s74 +; SI-NEXT: v_mul_f32_e64 v17, 1.0, s73 +; SI-NEXT: v_mul_f32_e64 v27, 1.0, s62 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s61 +; SI-NEXT: v_mul_f32_e64 v26, 1.0, s58 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s57 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v31, 1.0, s46 +; SI-NEXT: v_mul_f32_e64 v32, 1.0, s45 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s43 +; SI-NEXT: v_mul_f32_e64 v30, 1.0, s42 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s18 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s20 +; SI-NEXT: v_mul_f32_e64 v54, 1.0, s22 +; SI-NEXT: v_mul_f32_e64 v53, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v36, 1.0, s11 +; SI-NEXT: v_mul_f32_e64 v52, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v51, 1.0, s34 +; SI-NEXT: v_mul_f32_e64 v49, 1.0, vcc_lo +; SI-NEXT: v_mul_f32_e64 v48, 1.0, s92 +; SI-NEXT: v_mul_f32_e64 v35, 1.0, s88 ; SI-NEXT: v_mul_f32_e64 v61, 1.0, s76 -; SI-NEXT: v_mul_f32_e64 v60, 1.0, s57 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s92 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s72 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s60 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s56 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s44 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:624 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:628 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:632 ; 4-byte Folded Spill -; SI-NEXT: s_cbranch_scc0 .LBB101_4 +; SI-NEXT: v_mul_f32_e64 v59, 1.0, s72 +; SI-NEXT: v_mul_f32_e64 v41, 1.0, s60 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s56 +; SI-NEXT: v_mul_f32_e64 v45, 1.0, s44 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill +; SI-NEXT: s_cbranch_scc0 .LBB101_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_mov_b32_e32 v43, v44 -; SI-NEXT: v_mov_b32_e32 v60, v2 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v43 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v3 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14 -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v18 -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21 -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v29 -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v15 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v42 -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v50 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v29 +; SI-NEXT: s_mov_b64 s[4:5], 0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v10 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v53 -; SI-NEXT: v_mov_b32_e32 v24, v6 -; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v60 -; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v38 -; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[1:2], v[7:8], 16 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v47 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:636 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:640 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:644 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[1:2], v[4:5], 16 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v53 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:648 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:652 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:656 ; 4-byte Folded Spill -; SI-NEXT: v_lshr_b64 v[3:4], v[13:14], 16 +; SI-NEXT: v_lshr_b64 v[1:2], v[0:1], 16 +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v4 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v62 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[2:3], v[0:1], 16 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v2 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v54, v4 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v29 +; SI-NEXT: v_mov_b32_e32 v53, v43 +; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v53 +; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v60 +; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v25 +; SI-NEXT: v_lshr_b64 v[3:4], v[12:13], 16 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[0:1], v[2:3], 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v2 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[3:4], v[19:20], 16 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v1, v52 -; SI-NEXT: v_lshr_b64 v[13:14], v[16:17], 16 -; SI-NEXT: v_mov_b32_e32 v52, v15 -; SI-NEXT: v_lshr_b64 v[15:16], v[22:23], 16 -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v51 -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:660 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:664 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:668 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16 +; SI-NEXT: v_mov_b32_e32 v9, v38 +; SI-NEXT: v_mov_b32_e32 v1, v8 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[45:46], v[35:36], 16 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v32 -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v0 +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[7:8], v[6:7], 16 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v5 +; SI-NEXT: v_lshr_b64 v[37:38], v[6:7], 16 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v0 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v16, v37 -; SI-NEXT: v_mov_b32_e32 v0, v50 -; SI-NEXT: v_mov_b32_e32 v5, v9 -; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v5 -; SI-NEXT: v_mov_b32_e32 v14, v61 -; SI-NEXT: v_mov_b32_e32 v23, v43 -; SI-NEXT: v_lshr_b64 v[10:11], v[48:49], 16 -; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v26 -; SI-NEXT: v_mov_b32_e32 v11, v26 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v8 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[12:13], v[11:12], 16 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v62 +; SI-NEXT: v_mov_b32_e32 v1, v12 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshr_b64 v[0:1], v[11:12], 16 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v4 +; SI-NEXT: v_mov_b32_e32 v4, v16 +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v6 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v19, v8 -; SI-NEXT: v_lshr_b64 v[7:8], v[28:29], 16 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v16 -; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:608 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:612 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[37:38], v[15:16], 16 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v4, v56 -; SI-NEXT: v_mov_b32_e32 v3, v55 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v4 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v20 +; SI-NEXT: v_mov_b32_e32 v1, v37 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshr_b64 v[0:1], v[36:37], 16 +; SI-NEXT: v_lshr_b64 v[11:12], v[10:11], 16 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v34 +; SI-NEXT: v_lshr_b64 v[12:13], v[10:11], 16 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v33 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v2 +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[56:57], v[14:15], 16 +; SI-NEXT: v_mov_b32_e32 v57, v4 +; SI-NEXT: v_lshr_b64 v[1:2], v[55:56], 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v22 -; SI-NEXT: v_lshr_b64 v[58:59], v[34:35], 16 -; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v55 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: v_lshr_b64 v[55:56], v[27:28], 16 -; SI-NEXT: v_mov_b32_e32 v56, v4 -; SI-NEXT: s_waitcnt vmcnt(5) expcnt(4) -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v8 -; SI-NEXT: v_lshr_b64 v[36:37], v[25:26], 16 -; SI-NEXT: v_mov_b32_e32 v37, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v6 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v55, v40 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v55 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v54 +; SI-NEXT: v_mov_b32_e32 v4, v60 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[13:14], v[19:20], 16 +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_mov_b32_e32 v2, v13 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[15:16], v[12:13], 16 +; SI-NEXT: v_mov_b32_e32 v16, v21 +; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v16 ; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v2 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v39 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:672 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:676 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v6 +; SI-NEXT: v_mov_b32_e32 v6, v33 +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v2 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[44:45], v[18:19], 16 +; SI-NEXT: v_lshr_b64 v[12:13], v[43:44], 16 +; SI-NEXT: v_lshr_b64 v[37:38], v[23:24], 16 +; SI-NEXT: v_mov_b32_e32 v38, v9 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v47 -; SI-NEXT: v_mov_b32_e32 v47, v13 -; SI-NEXT: v_mov_b32_e32 v46, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v38 +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[18:19], v[36:37], 16 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:616 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:620 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v50 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v16 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_mov_b32_e32 v24, v35 +; SI-NEXT: v_lshr_b64 v[9:10], v[22:23], 16 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_lshr_b64 v[21:22], v[27:28], 16 +; SI-NEXT: v_mov_b32_e32 v1, v9 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v2, v32 +; SI-NEXT: v_lshr_b64 v[19:20], v[8:9], 16 +; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v17 +; SI-NEXT: v_lshr_b64 v[22:23], v[20:21], 16 +; SI-NEXT: v_mov_b32_e32 v20, v61 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v19 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:680 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:684 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_lshr_b64 v[27:28], v[26:27], 16 +; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v58 +; SI-NEXT: v_lshr_b64 v[8:9], v[26:27], 16 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mov_b32_e32 v8, v34 +; SI-NEXT: v_mov_b32_e32 v28, v48 +; SI-NEXT: v_lshr_b64 v[33:34], v[31:32], 16 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v1 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v57 +; SI-NEXT: v_mov_b32_e32 v34, v8 +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_lshr_b64 v[8:9], v[32:33], 16 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[8:9], v[39:40], 16 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v0, v41 +; SI-NEXT: v_lshr_b64 v[8:9], v[46:47], 16 +; SI-NEXT: v_lshr_b64 v[9:10], v[42:43], 16 +; SI-NEXT: v_mov_b32_e32 v43, v53 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v53 +; SI-NEXT: v_mov_b32_e32 v40, v55 +; SI-NEXT: v_lshr_b64 v[31:32], v[30:31], 16 +; SI-NEXT: v_mov_b32_e32 v32, v2 +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v32 +; SI-NEXT: v_lshr_b64 v[1:2], v[30:31], 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mov_b32_e32 v1, v39 +; SI-NEXT: v_mov_b32_e32 v39, v19 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mov_b32_e32 v1, v46 +; SI-NEXT: v_mov_b32_e32 v46, v22 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_mov_b32_e32 v1, v42 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v5 -; SI-NEXT: v_lshr_b64 v[49:50], v[31:32], 16 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v51 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v2, v8 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v22 -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v62 -; SI-NEXT: v_mov_b32_e32 v17, v16 -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v58 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v5 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v19, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[29:30], v[30:31], 16 -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v21 -; SI-NEXT: v_lshr_b64 v[31:32], v[33:34], 16 -; SI-NEXT: v_mov_b32_e32 v26, v30 -; SI-NEXT: v_mov_b32_e32 v27, v31 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v60 -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[12:13], v[1:2], 16 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v2 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v62 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v55 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v52 -; SI-NEXT: v_mov_b32_e32 v53, v29 -; SI-NEXT: v_mov_b32_e32 v52, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[12:13], v[1:2], 16 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v20 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v38 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[34:35], v[35:36], 16 -; SI-NEXT: v_mov_b32_e32 v51, v4 -; SI-NEXT: v_mov_b32_e32 v50, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v34 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:636 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:640 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:644 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v8, v4 -; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshr_b64 v[13:14], v[1:2], 16 +; SI-NEXT: v_mov_b32_e32 v1, v52 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:648 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v1, v51 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:652 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:656 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mov_b32_e32 v5, v10 -; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[13:14], v[52:53], 16 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v60 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[13:14], v[51:52], 16 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v17 +; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v2, v50 +; SI-NEXT: v_mov_b32_e32 v1, v49 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v6 +; SI-NEXT: v_lshr_b64 v[13:14], v[49:50], 16 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v25 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[9:10], v[50:51], 16 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[13:14], v[48:49], 16 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[9:10], v[46:47], 16 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[13:14], v[35:36], 16 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v22, v4 -; SI-NEXT: v_mov_b32_e32 v21, v3 -; SI-NEXT: v_mov_b32_e32 v3, v47 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v3, v45 -; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16 -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[13:14], v[61:62], 16 +; SI-NEXT: v_mov_b32_e32 v61, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[13:14], v[59:60], 16 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v22, v7 -; SI-NEXT: v_mov_b32_e32 v47, v36 -; SI-NEXT: v_lshr_b64 v[35:36], v[0:1], 16 +; SI-NEXT: v_lshr_b64 v[13:14], v[41:42], 16 +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v57 +; SI-NEXT: v_mov_b32_e32 v60, v4 +; SI-NEXT: v_mov_b32_e32 v4, v54 +; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v48, v15 +; SI-NEXT: v_mov_b32_e32 v35, v21 +; SI-NEXT: v_mov_b32_e32 v21, v16 +; SI-NEXT: v_mov_b32_e32 v16, v57 +; SI-NEXT: v_mov_b32_e32 v42, v18 +; SI-NEXT: v_mov_b32_e32 v15, v56 +; SI-NEXT: v_mov_b32_e32 v50, v2 +; SI-NEXT: v_mov_b32_e32 v2, v59 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:660 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:664 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:668 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v2, v41 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v3, v58 -; SI-NEXT: v_lshr_b64 v[57:58], v[57:58], 16 -; SI-NEXT: v_lshr_b64 v[58:59], v[48:49], 16 -; SI-NEXT: v_mov_b32_e32 v59, v53 -; SI-NEXT: v_mov_b32_e32 v48, v0 -; SI-NEXT: v_lshr_b64 v[0:1], v[40:41], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v2, v0 +; SI-NEXT: v_lshr_b64 v[13:14], v[0:1], 16 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v32 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mov_b32_e32 v2, v0 +; SI-NEXT: v_lshr_b64 v[13:14], v[0:1], 16 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_mov_b32_e32 v49, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v36, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v41, v1 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v45, v0 +; SI-NEXT: s_branch .LBB101_3 +; SI-NEXT: .LBB101_2: +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v28, v48 +; SI-NEXT: v_mov_b32_e32 v24, v35 +; SI-NEXT: v_mov_b32_e32 v20, v61 +; SI-NEXT: s_mov_b64 s[4:5], -1 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr41 +; SI-NEXT: ; implicit-def: $vgpr8 +; SI-NEXT: ; implicit-def: $vgpr45 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr9 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[42:43], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: ; implicit-def: $vgpr12 +; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_mov_b32_e32 v21, v10 -; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[9:10], v[44:45], 16 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[0:1], v[32:33], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr11 +; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v44, v23 -; SI-NEXT: v_mov_b32_e32 v23, v38 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v3, v49 -; SI-NEXT: v_lshr_b64 v[49:50], v[6:7], 16 -; SI-NEXT: v_lshr_b64 v[6:7], v[54:55], 16 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:672 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:676 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[53:54], v[52:53], 16 -; SI-NEXT: v_lshr_b64 v[51:52], v[26:27], 16 -; SI-NEXT: v_mov_b32_e32 v54, v27 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_lshr_b64 v[0:1], v[45:46], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[17:18], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr15 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_mov_b32_e32 v52, v6 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_lshr_b64 v[26:27], v[6:7], 16 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:680 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:684 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[28:29], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr44 +; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[19:20], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[14:15], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[12:13], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill +; SI-NEXT: .LBB101_3: ; %Flow +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[24:25], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v47, v58 +; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v10, v1 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v6, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v14, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_mov_b32_e32 v23, v56 +; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload +; SI-NEXT: s_cbranch_vccnz .LBB101_5 +; SI-NEXT: ; %bb.4: ; %cmp.true +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v4 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_add_f32_e32 v55, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v55 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v14 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[60:61], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v1 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v29 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; SI-NEXT: v_lshr_b64 v[29:30], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v6 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v50 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v2 +; SI-NEXT: v_lshr_b64 v[61:62], v[3:4], 16 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v54 +; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v5 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v3 +; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v53 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[30:31], 16 -; SI-NEXT: v_mov_b32_e32 v46, v9 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v9, v28 -; SI-NEXT: v_mov_b32_e32 v3, v32 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_mov_b32_e32 v50, v6 -; SI-NEXT: v_lshr_b64 v[10:11], v[6:7], 16 -; SI-NEXT: v_mov_b32_e32 v11, v40 -; SI-NEXT: v_lshr_b64 v[40:41], v[38:39], 16 -; SI-NEXT: s_cbranch_execnz .LBB101_3 -; SI-NEXT: .LBB101_2: ; %cmp.true -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v45 -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v23 -; SI-NEXT: s_waitcnt vmcnt(3) expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v50 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v52 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v19 -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v60 -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v3 -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v24 -; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v30 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48 -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v42 -; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 -; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v15 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v16 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v15 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v17 -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v45, 0x40c00000, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v37 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v17 -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v56 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v17 -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:632 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v16 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v16 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 +; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v4 +; SI-NEXT: v_lshr_b64 v[41:42], v[5:6], 16 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v36 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v5 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v34 +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v5 +; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16 +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v13 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v43 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v6 +; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v10 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v60 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v7 +; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v0 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v8 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v8 +; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], 16 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v28 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v9 +; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v25 +; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v9 +; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v21 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v24 +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v11 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v12 +; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v40 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v20 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v11 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v13 +; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:628 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v52, 0x40c00000, v16 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v17 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v11 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v14 +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v13 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v16 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v47 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v11 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v15 +; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v15 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:620 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v56, 0x40c00000, v16 +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v16 +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v11 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v16 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:616 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v32 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v11 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17 +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v17 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshr_b64 v[10:11], v[10:11], 16 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v10 +; SI-NEXT: v_mov_b32_e32 v10, v19 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[31:32], v[18:19], 16 +; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v16 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v58, 0x40c00000, v16 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:612 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v10 +; SI-NEXT: v_mov_b32_e32 v10, v18 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[33:34], v[17:18], 16 +; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v14 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v40, 0x40c00000, v16 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:608 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v10 +; SI-NEXT: v_mov_b32_e32 v10, v17 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[27:28], v[16:17], 16 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v60, 0x40c00000, v16 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v10 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:604 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v10 +; SI-NEXT: v_mov_b32_e32 v10, v16 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[35:36], v[15:16], 16 +; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v12 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v38 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v10 +; SI-NEXT: v_mov_b32_e32 v10, v15 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[23:24], v[14:15], 16 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v10 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v15 -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v16 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:600 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v54, 0x40c00000, v16 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v10 +; SI-NEXT: v_mov_b32_e32 v10, v14 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[37:38], v[13:14], 16 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:596 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v16 +; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v10 +; SI-NEXT: v_mov_b32_e32 v10, v12 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[44:45], v[11:12], 16 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v9 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v9 +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v44 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v17 -; SI-NEXT: v_lshr_b64 v[43:44], v[34:35], 16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 +; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v9 +; SI-NEXT: v_mov_b32_e32 v9, v11 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[49:50], v[10:11], 16 +; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v8 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v16 -; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v24 -; SI-NEXT: v_lshr_b64 v[47:48], v[16:17], 16 +; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v8 +; SI-NEXT: v_mov_b32_e32 v8, v10 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[15:16], v[9:10], 16 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v7 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v30 -; SI-NEXT: v_lshr_b64 v[15:16], v[0:1], 16 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v7 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v62, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v62 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v7 +; SI-NEXT: v_mov_b32_e32 v7, v9 +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[51:52], v[8:9], 16 +; SI-NEXT: v_mov_b32_e32 v9, v61 +; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v6 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v27 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[61:62], v[50:51], 16 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v28 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[28:29], v[36:37], 16 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v5 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v21 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v6 +; SI-NEXT: v_mov_b32_e32 v6, v8 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[11:12], v[7:8], 16 +; SI-NEXT: v_mov_b32_e32 v12, v41 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v5 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v6 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v5 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v5 -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v30 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v7 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v6 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v5 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v5 +; SI-NEXT: v_mov_b32_e32 v5, v7 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[53:54], v[6:7], 16 +; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v4 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v8 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v7 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v9 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v8 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v4 +; SI-NEXT: v_mov_b32_e32 v4, v6 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[7:8], v[5:6], 16 +; SI-NEXT: v_mov_b32_e32 v8, v29 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v3 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v10 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v9 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v11 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v10 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v12 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v11 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v3 +; SI-NEXT: v_mov_b32_e32 v3, v5 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[39:40], v[4:5], 16 +; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v55 +; SI-NEXT: v_lshr_b64 v[55:56], v[26:27], 16 +; SI-NEXT: v_lshr_b64 v[56:57], v[32:33], 16 +; SI-NEXT: v_lshr_b64 v[57:58], v[30:31], 16 +; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v2 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v11 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v13 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v12 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v14 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v13 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v13 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v33 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v14 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v35 -; SI-NEXT: v_lshr_b64 v[34:35], v[22:23], 16 -; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v10 -; SI-NEXT: v_lshr_b64 v[10:11], v[49:50], 16 -; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v8 -; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v7 -; SI-NEXT: v_lshr_b64 v[7:8], v[40:41], 16 -; SI-NEXT: v_and_b32_e32 v42, 0xffff0000, v14 -; SI-NEXT: v_lshr_b64 v[13:14], v[38:39], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v46 -; SI-NEXT: v_lshr_b64 v[45:46], v[45:46], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v23 -; SI-NEXT: v_lshr_b64 v[22:23], v[25:26], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v37 -; SI-NEXT: v_lshr_b64 v[36:37], v[52:53], 16 -; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v21 -; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v39 -; SI-NEXT: v_lshr_b64 v[38:39], v[56:57], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v50 -; SI-NEXT: v_lshr_b64 v[50:51], v[18:19], 16 -; SI-NEXT: v_and_b32_e32 v51, 0xffff0000, v62 -; SI-NEXT: v_lshr_b64 v[17:18], v[58:59], 16 -; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v20 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v53 -; SI-NEXT: v_lshr_b64 v[52:53], v[54:55], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v19 -; SI-NEXT: v_lshr_b64 v[19:20], v[60:61], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v57 -; SI-NEXT: v_lshr_b64 v[57:58], v[35:36], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v59 -; SI-NEXT: v_lshr_b64 v[58:59], v[9:10], 16 -; SI-NEXT: v_mov_b32_e32 v59, v45 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v41 -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v61 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v2 +; SI-NEXT: v_mov_b32_e32 v2, v4 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v26 -; SI-NEXT: v_mov_b32_e32 v26, v47 -; SI-NEXT: v_lshr_b64 v[46:47], v[49:50], 16 -; SI-NEXT: v_mov_b32_e32 v47, v28 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v55 -; SI-NEXT: v_mov_b32_e32 v55, v34 -; SI-NEXT: v_mov_b32_e32 v54, v33 -; SI-NEXT: v_lshr_b64 v[34:35], v[27:28], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v24 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v32 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[1:2], v[31:32], 16 -; SI-NEXT: v_mov_b32_e32 v2, v4 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v1 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[45:46], v[2:3], 16 +; SI-NEXT: v_lshr_b64 v[46:47], v[34:35], 16 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v0 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v1 +; SI-NEXT: v_mov_b32_e32 v1, v5 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v24, v7 -; SI-NEXT: v_mov_b32_e32 v23, v6 -; SI-NEXT: v_lshr_b64 v[6:7], v[3:4], 16 -; SI-NEXT: v_mov_b32_e32 v4, v52 -; SI-NEXT: v_mov_b32_e32 v8, v6 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v2, v1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[5:6], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[51:52], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[21:22], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v19 -; SI-NEXT: v_lshr_b64 v[51:52], v[42:43], 16 -; SI-NEXT: v_mov_b32_e32 v5, v22 -; SI-NEXT: v_mov_b32_e32 v21, v38 -; SI-NEXT: v_mov_b32_e32 v22, v13 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v1, v39 +; SI-NEXT: v_lshr_b64 v[41:42], v[4:5], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshr_b64 v[0:1], v[18:19], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v1, v53 +; SI-NEXT: v_lshr_b64 v[4:5], v[40:41], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v24 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshr_b64 v[0:1], v[23:24], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[4:5], v[38:39], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v17 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshr_b64 v[0:1], v[16:17], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[37:38], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[4:5], v[6:7], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[52:53], v[52:53], 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v50 -; SI-NEXT: v_lshr_b64 v[49:50], v[12:13], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v1, v36 -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v1, v10 -; SI-NEXT: v_mov_b32_e32 v10, v15 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[4:5], v[10:11], 16 +; SI-NEXT: v_lshr_b64 v[39:40], v[22:23], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshr_b64 v[0:1], v[54:55], 16 -; SI-NEXT: v_lshr_b64 v[53:54], v[44:45], 16 -; SI-NEXT: v_mov_b32_e32 v54, v43 +; SI-NEXT: v_mov_b32_e32 v1, v51 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; SI-NEXT: .LBB101_3: ; %end -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v4 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v5 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[0:1], v[14:15], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_mov_b32_e32 v2, v49 +; SI-NEXT: v_lshr_b64 v[48:49], v[48:49], 16 +; SI-NEXT: v_lshr_b64 v[49:50], v[43:44], 16 +; SI-NEXT: v_lshr_b64 v[42:43], v[36:37], 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; SI-NEXT: .LBB101_5: ; %end +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v26 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v8 -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v22 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v58 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v44 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 +; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_readlane_b32 s30, v63, 3 ; SI-NEXT: v_readlane_b32 s31, v63, 4 ; SI-NEXT: v_readlane_b32 s36, v63, 2 ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v12 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v21 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v25 +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v29 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v0, v0, v2 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v14 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v20 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v57 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v25 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v41 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v45 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v5 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v25 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v35 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v9 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v25 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v6, v6, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v7, v7, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v8, v10, v8 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v39 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v9 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v9 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v5, v5, v6 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v8 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_or_b32_e32 v7, v7, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v52 +; SI-NEXT: v_or_b32_e32 v8, v8, v9 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v13 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v13 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v39 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 -; SI-NEXT: v_or_b32_e32 v12, v12, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v25 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v10, v10, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 +; SI-NEXT: v_or_b32_e32 v11, v11, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v61 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_or_b32_e32 v12, v12, v13 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v17 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v17 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v40 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v16 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v46 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v48 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_or_b32_e32 v16, v16, v17 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v21 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v25 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v17, v18, v17 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v21 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v17, v17, v18 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v20 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v49 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v25 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v21 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v20, v20, v22 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v25 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v42 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 +; SI-NEXT: v_or_b32_e32 v20, v20, v21 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v37 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v39 ; SI-NEXT: v_or_b32_e32 v22, v22, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v25 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v34 -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v46 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: v_and_b32_e32 v25, 0xffff, v47 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v35 +; SI-NEXT: v_and_b32_e32 v25, 0xffff, v35 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v27 -; SI-NEXT: v_or_b32_e32 v26, v26, v29 -; SI-NEXT: v_and_b32_e32 v27, 0xffff, v55 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v35 -; SI-NEXT: v_or_b32_e32 v27, v27, v29 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v29, 0xffff, v28 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v53 -; SI-NEXT: v_or_b32_e32 v28, v29, v28 -; SI-NEXT: v_and_b32_e32 v29, 0xffff, v59 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v28 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v55 +; SI-NEXT: v_or_b32_e32 v26, v26, v28 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v29 +; SI-NEXT: v_or_b32_e32 v27, v27, v28 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v56 +; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 +; SI-NEXT: v_or_b32_e32 v28, v28, v29 +; SI-NEXT: v_and_b32_e32 v29, 0xffff, v33 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v33 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v29, v29, v30 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v30, 0xffff, v32 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v57 ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -211837,212 +212327,49 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg % ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v35 -; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v30, v30, v32 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v51 -; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 -; SI-NEXT: v_or_b32_e32 v30, v30, v31 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v54 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33 ; SI-NEXT: v_or_b32_e32 v31, v31, v32 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:688 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:624 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] -; SI-NEXT: .LBB101_4: -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: v_mov_b32_e32 v11, v40 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v48, v41 -; SI-NEXT: v_mov_b32_e32 v14, v61 -; SI-NEXT: v_mov_b32_e32 v19, v6 -; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: ; implicit-def: $vgpr22 -; SI-NEXT: ; implicit-def: $vgpr47 -; SI-NEXT: ; implicit-def: $vgpr55 -; SI-NEXT: ; implicit-def: $vgpr59 -; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr10 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr46 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr8 -; SI-NEXT: ; implicit-def: $vgpr4 -; SI-NEXT: ; implicit-def: $vgpr5 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_mov_b32_e32 v17, v16 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v60, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v9, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_mov_b32_e32 v3, v0 -; SI-NEXT: s_branch .LBB101_2 ; ; VI-LABEL: bitcast_v64bf16_to_v64f16_scalar: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v35, s36, 0 -; VI-NEXT: v_writelane_b32 v35, s37, 1 -; VI-NEXT: v_writelane_b32 v35, s38, 2 -; VI-NEXT: v_writelane_b32 v35, s39, 3 -; VI-NEXT: v_writelane_b32 v35, s48, 4 -; VI-NEXT: v_writelane_b32 v35, s49, 5 -; VI-NEXT: v_writelane_b32 v35, s50, 6 -; VI-NEXT: v_writelane_b32 v35, s51, 7 -; VI-NEXT: v_writelane_b32 v35, s30, 8 -; VI-NEXT: v_writelane_b32 v35, s31, 9 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: v_writelane_b32 v63, s36, 0 +; VI-NEXT: v_writelane_b32 v63, s37, 1 +; VI-NEXT: v_writelane_b32 v63, s38, 2 +; VI-NEXT: v_writelane_b32 v63, s39, 3 +; VI-NEXT: v_writelane_b32 v63, s48, 4 +; VI-NEXT: v_writelane_b32 v63, s49, 5 +; VI-NEXT: v_writelane_b32 v63, s50, 6 +; VI-NEXT: v_writelane_b32 v63, s51, 7 +; VI-NEXT: v_writelane_b32 v63, s30, 8 +; VI-NEXT: v_writelane_b32 v63, s31, 9 ; VI-NEXT: v_readfirstlane_b32 s4, v18 ; VI-NEXT: v_readfirstlane_b32 s51, v17 ; VI-NEXT: v_readfirstlane_b32 s50, v16 @@ -212067,598 +212394,615 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg % ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB101_4 ; VI-NEXT: .LBB101_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v32, 0x40c00000 +; VI-NEXT: s_lshl_b32 s4, s36, 16 +; VI-NEXT: v_mov_b32_e32 v10, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v52, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: s_lshl_b32 s4, s37, 16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: s_lshl_b32 s4, s38, 16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v53, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: s_lshl_b32 s4, s39, 16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v50, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s40, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v51, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v48, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: s_lshl_b32 s4, s41, 16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v20, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s42, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v49, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v21, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s43, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v39, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v22, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s44, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v54, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v23, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s45, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v55, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v24, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s46, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v40, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v25, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s47, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v41, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v26, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 ; VI-NEXT: s_lshl_b32 s4, s48, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v42, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v27, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s49, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v43, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v28, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s50, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v44, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s50, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v29, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s51, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v45, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v30, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s16, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v31, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v16, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s17, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v46, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v33, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s18, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v34, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v17, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s19, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v47, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s20, 16 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v18, v1, v3, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v19, v1, v4, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v4, v1, v4, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v58, v1, v5, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v5, v1, v5, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s23, 16 +; VI-NEXT: v_or_b32_e32 v6, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v59, v1, v6, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v6, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v16, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v6, v1, v6, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: s_lshl_b32 s4, s24, 16 +; VI-NEXT: v_or_b32_e32 v7, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: s_lshl_b32 s5, s28, 16 -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v0 -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v60, v1, v7, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: s_and_b32 s4, s24, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v7, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: s_and_b32 s5, s28, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s5, v32 -; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s5, s30, 16 -; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s5, v32 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s5, s30, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s5, v32 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: s_and_b32 s5, s26, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v7, v1, v7, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: s_lshl_b32 s4, s26, 16 -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[2:3] -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: s_lshl_b32 s4, s25, 16 +; VI-NEXT: v_or_b32_e32 v8, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s24, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v61, v1, v8, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: s_lshl_b32 s4, s24, 16 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: s_and_b32 s4, s25, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v8, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s22, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v8, v1, v8, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: s_lshl_b32 s4, s22, 16 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: s_lshl_b32 s4, s26, 16 +; VI-NEXT: v_or_b32_e32 v9, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s20, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v62, v1, v9, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: s_lshl_b32 s4, s20, 16 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: s_and_b32 s4, s26, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v9, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s18, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v9, v1, v9, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: s_lshl_b32 s4, s18, 16 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: s_lshl_b32 s4, s27, 16 +; VI-NEXT: v_or_b32_e32 v11, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s16, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v32, v1, v11, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: s_lshl_b32 s4, s16, 16 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc -; VI-NEXT: v_bfe_u32 v3, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v0 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v11, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s17, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v1, s5, v32 -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: s_lshl_b32 s4, s17, 16 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: s_and_b32 s5, s19, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s5, v32 -; VI-NEXT: v_cndmask_b32_e32 v18, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: s_lshl_b32 s4, s19, 16 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc -; VI-NEXT: v_add_f32_e32 v5, s4, v32 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: s_and_b32 s5, s21, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s5, v32 -; VI-NEXT: v_mov_b32_e32 v1, v18 -; VI-NEXT: v_cndmask_b32_e32 v18, v7, v9, vcc -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: s_lshl_b32 s4, s21, 16 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc -; VI-NEXT: v_add_f32_e32 v7, s4, v32 -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v3 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: s_and_b32 s5, s23, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s5, v32 -; VI-NEXT: v_mov_b32_e32 v3, v18 -; VI-NEXT: v_cndmask_b32_e32 v18, v9, v11, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: s_lshl_b32 s4, s23, 16 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_cndmask_b32_e32 v7, v9, v11, vcc -; VI-NEXT: v_add_f32_e32 v9, s4, v32 -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v5 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_and_b32 s5, s25, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s5, v32 -; VI-NEXT: v_mov_b32_e32 v5, v18 -; VI-NEXT: v_cndmask_b32_e32 v18, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 +; VI-NEXT: s_and_b32 s4, s27, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v11, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v10 +; VI-NEXT: v_bfe_u32 v11, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v1 ; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_lshl_b32 s4, s25, 16 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc -; VI-NEXT: v_add_f32_e32 v11, s4, v32 -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v7 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: s_and_b32 s5, s27, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 +; VI-NEXT: v_or_b32_e32 v12, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_lshl_b32 s4, s28, 16 +; VI-NEXT: v_cndmask_b32_e32 v1, v11, v12, vcc +; VI-NEXT: v_add_f32_e32 v11, s4, v10 +; VI-NEXT: v_bfe_u32 v12, v11, 16, 1 +; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s5, v32 -; VI-NEXT: v_mov_b32_e32 v7, v18 -; VI-NEXT: v_cndmask_b32_e32 v18, v13, v15, vcc -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 +; VI-NEXT: s_and_b32 s4, s28, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v11, v12, v13, vcc +; VI-NEXT: v_add_f32_e32 v12, s4, v10 +; VI-NEXT: v_bfe_u32 v13, v12, 16, 1 +; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v12 ; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: s_lshl_b32 s4, s27, 16 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_cndmask_b32_e32 v11, v13, v15, vcc -; VI-NEXT: v_add_f32_e32 v13, s4, v32 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v9 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: s_and_b32 s5, s29, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v9, v18 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s5, v32 -; VI-NEXT: v_cndmask_b32_e32 v18, v15, v18, vcc -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v11 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 ; VI-NEXT: s_lshl_b32 s4, s29, 16 -; VI-NEXT: v_mov_b32_e32 v11, v18 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13 +; VI-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; VI-NEXT: v_add_f32_e32 v12, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v38, v13, v14, vcc +; VI-NEXT: v_bfe_u32 v13, v12, 16, 1 +; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v12 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 +; VI-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v12, v13, v14, vcc +; VI-NEXT: v_add_f32_e32 v13, s4, v10 +; VI-NEXT: v_bfe_u32 v14, v13, 16, 1 +; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v13 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x7fff, v14 +; VI-NEXT: s_lshl_b32 s4, s30, 16 +; VI-NEXT: v_or_b32_e32 v15, 0x400000, v13 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v18, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v32 -; VI-NEXT: v_bfe_u32 v18, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v15 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_cndmask_b32_e32 v18, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v13 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: s_and_b32 s5, s31, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v15, s5, v32 -; VI-NEXT: v_mov_b32_e32 v13, v18 -; VI-NEXT: v_bfe_u32 v18, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v15 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 +; VI-NEXT: v_add_f32_e32 v13, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v37, v14, v15, vcc +; VI-NEXT: v_bfe_u32 v14, v13, 16, 1 +; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v13 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x7fff, v14 +; VI-NEXT: v_or_b32_e32 v15, 0x400000, v13 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 +; VI-NEXT: s_and_b32 s4, s30, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v13, v14, v15, vcc +; VI-NEXT: v_add_f32_e32 v14, s4, v10 +; VI-NEXT: v_bfe_u32 v15, v14, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v14 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 ; VI-NEXT: s_lshl_b32 s4, s31, 16 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc -; VI-NEXT: v_add_f32_e32 v18, s4, v32 -; VI-NEXT: v_bfe_u32 v19, v18, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v18 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; VI-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v15 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: s_and_b32 s5, s50, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v15, v18 -; VI-NEXT: v_add_f32_e32 v18, s5, v32 -; VI-NEXT: v_bfe_u32 v19, v18, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v18 -; VI-NEXT: s_lshl_b32 s4, s50, 16 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; VI-NEXT: v_add_f32_e32 v18, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v19, v19, v20, vcc -; VI-NEXT: v_bfe_u32 v20, v18, 16, 1 -; VI-NEXT: v_add_u32_e32 v20, vcc, v20, v18 -; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x7fff, v20 -; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v18 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v18, v20, v21, vcc -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s46, 16 -; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[18:19] -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_bfe_u32 v18, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s44, 16 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_bfe_u32 v18, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s42, 16 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_bfe_u32 v18, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s40, 16 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_bfe_u32 v18, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s38, 16 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_bfe_u32 v18, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s36, 16 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v19, vcc -; VI-NEXT: v_bfe_u32 v19, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v16 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v19, v21, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[16:17] -; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v17, s4, v32 -; VI-NEXT: v_bfe_u32 v19, v17, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; VI-NEXT: s_lshl_b32 s4, s37, 16 -; VI-NEXT: v_cndmask_b32_e32 v17, v19, v21, vcc -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v21, v23, vcc -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: s_lshl_b32 s4, s39, 16 -; VI-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v17 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_mov_b32_e32 v17, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v23, v25, vcc -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: s_lshl_b32 s4, s41, 16 -; VI-NEXT: v_cndmask_b32_e32 v21, v23, v25, vcc -; VI-NEXT: v_add_f32_e32 v23, s4, v32 -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v19 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: v_add_f32_e32 v23, s4, v32 +; VI-NEXT: v_or_b32_e32 v35, 0x400000, v14 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; VI-NEXT: v_add_f32_e32 v14, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v56, v15, v35, vcc +; VI-NEXT: v_bfe_u32 v15, v14, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v14 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 +; VI-NEXT: s_and_b32 s4, s31, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v35, 0x400000, v14 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; VI-NEXT: v_add_f32_e32 v10, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v14, v15, v35, vcc +; VI-NEXT: v_bfe_u32 v15, v10, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v10 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 +; VI-NEXT: v_or_b32_e32 v35, 0x400000, v10 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; VI-NEXT: v_cndmask_b32_e32 v10, v15, v35, vcc +; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v10 +; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[14:15] +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v56 +; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[13:14] +; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v37 +; VI-NEXT: v_lshrrev_b64 v[36:37], 16, v[12:13] +; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v38 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v32 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[11:12] +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[9:10] +; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v62 +; VI-NEXT: v_lshrrev_b64 v[56:57], 16, v[8:9] +; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v61 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[7:8] +; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v60 +; VI-NEXT: v_lshrrev_b64 v[60:61], 16, v[6:7] +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v59 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[5:6] +; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v58 +; VI-NEXT: v_lshrrev_b64 v[57:58], 16, v[4:5] +; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v19 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[3:4] +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v18 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v47 +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_lshrrev_b64 v[58:59], 16, v[2:3] +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[17:18] +; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v46 +; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[0:1] +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[16:17] +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 +; VI-NEXT: v_lshrrev_b64 v[46:47], 16, v[30:31] +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v45 +; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[29:30] +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v44 +; VI-NEXT: v_lshrrev_b64 v[44:45], 16, v[28:29] +; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v43 +; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[27:28] +; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v42 +; VI-NEXT: v_lshrrev_b64 v[42:43], 16, v[26:27] +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v41 +; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[25:26] +; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v40 +; VI-NEXT: v_lshrrev_b64 v[40:41], 16, v[24:25] +; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v55 +; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[23:24] +; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v54 +; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[22:23] +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v39 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[21:22] +; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v49 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v34 +; VI-NEXT: v_lshrrev_b64 v[61:62], 16, v[33:34] +; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[20:21] +; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v51 +; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[50:51] +; VI-NEXT: v_mov_b32_e32 v3, v58 +; VI-NEXT: v_mov_b32_e32 v5, v57 +; VI-NEXT: v_mov_b32_e32 v7, v60 +; VI-NEXT: v_mov_b32_e32 v9, v56 +; VI-NEXT: v_mov_b32_e32 v11, v37 +; VI-NEXT: v_mov_b32_e32 v13, v36 +; VI-NEXT: v_mov_b32_e32 v23, v31 +; VI-NEXT: v_mov_b32_e32 v25, v40 +; VI-NEXT: v_mov_b32_e32 v27, v42 +; VI-NEXT: v_mov_b32_e32 v29, v44 +; VI-NEXT: v_mov_b32_e32 v31, v46 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[48:49] +; VI-NEXT: v_mov_b32_e32 v21, v32 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v1 +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[53:54] ; VI-NEXT: v_mov_b32_e32 v19, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v25, v27, vcc -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: s_lshl_b32 s4, s43, 16 -; VI-NEXT: v_cndmask_b32_e32 v23, v25, v27, vcc -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_mov_b32_e32 v21, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v27, v29, vcc -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: s_lshl_b32 s4, s45, 16 -; VI-NEXT: v_cndmask_b32_e32 v25, v27, v29, vcc -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v23 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_mov_b32_e32 v23, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v29, v31, vcc -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: s_lshl_b32 s4, s47, 16 -; VI-NEXT: v_cndmask_b32_e32 v27, v29, v31, vcc -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v25 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v25, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v31, v33, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v27 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: v_mov_b32_e32 v27, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: s_lshl_b32 s4, s49, 16 -; VI-NEXT: v_cndmask_b32_e32 v29, v31, v33, vcc -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_mov_b32_e32 v29, v33 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: s_lshl_b32 s4, s51, 16 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v32, v31, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_add_u32_e32 v32, vcc, v32, v31 -; VI-NEXT: v_add_u32_e32 v32, vcc, 0x7fff, v32 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v31, v32, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v33 -; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[31:32] +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[15:16] +; VI-NEXT: v_mov_b32_e32 v15, v35 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v1 +; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[52:53] +; VI-NEXT: v_mov_b32_e32 v1, v61 +; VI-NEXT: v_mov_b32_e32 v17, v38 ; VI-NEXT: s_branch .LBB101_5 ; VI-NEXT: .LBB101_3: ; VI-NEXT: s_branch .LBB101_2 @@ -212696,18 +213040,33 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg % ; VI-NEXT: v_mov_b32_e32 v30, s50 ; VI-NEXT: v_mov_b32_e32 v31, s51 ; VI-NEXT: .LBB101_5: ; %end -; VI-NEXT: v_readlane_b32 s30, v35, 8 -; VI-NEXT: v_readlane_b32 s31, v35, 9 -; VI-NEXT: v_readlane_b32 s51, v35, 7 -; VI-NEXT: v_readlane_b32 s50, v35, 6 -; VI-NEXT: v_readlane_b32 s49, v35, 5 -; VI-NEXT: v_readlane_b32 s48, v35, 4 -; VI-NEXT: v_readlane_b32 s39, v35, 3 -; VI-NEXT: v_readlane_b32 s38, v35, 2 -; VI-NEXT: v_readlane_b32 s37, v35, 1 -; VI-NEXT: v_readlane_b32 s36, v35, 0 -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; VI-NEXT: v_readlane_b32 s30, v63, 8 +; VI-NEXT: v_readlane_b32 s31, v63, 9 +; VI-NEXT: v_readlane_b32 s51, v63, 7 +; VI-NEXT: v_readlane_b32 s50, v63, 6 +; VI-NEXT: v_readlane_b32 s49, v63, 5 +; VI-NEXT: v_readlane_b32 s48, v63, 4 +; VI-NEXT: v_readlane_b32 s39, v63, 3 +; VI-NEXT: v_readlane_b32 s38, v63, 2 +; VI-NEXT: v_readlane_b32 s37, v63, 1 +; VI-NEXT: v_readlane_b32 s36, v63, 0 +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -212715,19 +213074,34 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg % ; GFX9-LABEL: bitcast_v64bf16_to_v64f16_scalar: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v36, s36, 0 -; GFX9-NEXT: v_writelane_b32 v36, s37, 1 -; GFX9-NEXT: v_writelane_b32 v36, s38, 2 -; GFX9-NEXT: v_writelane_b32 v36, s39, 3 -; GFX9-NEXT: v_writelane_b32 v36, s48, 4 -; GFX9-NEXT: v_writelane_b32 v36, s49, 5 -; GFX9-NEXT: v_writelane_b32 v36, s50, 6 -; GFX9-NEXT: v_writelane_b32 v36, s51, 7 -; GFX9-NEXT: v_writelane_b32 v36, s30, 8 -; GFX9-NEXT: v_writelane_b32 v36, s31, 9 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX9-NEXT: v_writelane_b32 v63, s36, 0 +; GFX9-NEXT: v_writelane_b32 v63, s37, 1 +; GFX9-NEXT: v_writelane_b32 v63, s38, 2 +; GFX9-NEXT: v_writelane_b32 v63, s39, 3 +; GFX9-NEXT: v_writelane_b32 v63, s48, 4 +; GFX9-NEXT: v_writelane_b32 v63, s49, 5 +; GFX9-NEXT: v_writelane_b32 v63, s50, 6 +; GFX9-NEXT: v_writelane_b32 v63, s51, 7 +; GFX9-NEXT: v_writelane_b32 v63, s30, 8 +; GFX9-NEXT: v_writelane_b32 v63, s31, 9 ; GFX9-NEXT: v_readfirstlane_b32 s4, v18 ; GFX9-NEXT: v_readfirstlane_b32 s51, v17 ; GFX9-NEXT: v_readfirstlane_b32 s50, v16 @@ -212752,615 +213126,624 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg % ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: s_cbranch_execnz .LBB101_4 ; GFX9-NEXT: .LBB101_2: ; %cmp.true +; GFX9-NEXT: s_and_b32 s4, s36, 0xffff0000 ; GFX9-NEXT: v_mov_b32_e32 v16, 0x40c00000 -; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: s_and_b32 s5, s30, 0xffff0000 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: v_add_f32_e32 v0, s5, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v1, v2, vcc -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s5, s30, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; GFX9-NEXT: v_add_f32_e32 v1, s5, v16 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s36, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_and_b32 s5, s31, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s5, v16 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_lshl_b32 s5, s31, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s5, v16 -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 -; GFX9-NEXT: v_mov_b32_e32 v32, 0xffff -; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: v_lshl_or_b32 v14, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_b32_sdwa v3, v32, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_lshl_or_b32 v15, v2, 16, v3 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s29, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s37, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s28, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v13, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s28, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s37, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s27, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v12, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s27, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s38, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s26, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v11, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s26, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v33, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s38, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s25, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v10, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s25, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v32, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s39, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s24, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v9, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s24, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v34, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s39, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v8, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s23, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v19, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s40, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v7, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s22, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v35, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s40, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v6, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s21, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v20, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s41, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v5, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s20, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v36, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s41, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v4, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s19, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v21, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s42, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v3, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s18, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v37, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s42, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v1 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v18, vcc -; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v2, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s17, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v18, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v1 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v22, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s43, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v18, v19, vcc -; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v1, v32, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v1, v0, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v0 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s16, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v38, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s43, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v23, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s44, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v39, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s44, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v24, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s45, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v48, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s45, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v25, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s46, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v49, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s46, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v26, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s47, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v50, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s47, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v27, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s48, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v51, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s48, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v28, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v52, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s49, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v29, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v53, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 ; GFX9-NEXT: s_lshl_b32 s4, s50, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v30, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 ; GFX9-NEXT: s_and_b32 s4, s51, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_add_f32_e32 v19, s4, v16 -; GFX9-NEXT: v_bfe_u32 v20, v19, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v20, v20, v19 -; GFX9-NEXT: v_add_u32_e32 v20, 0x7fff, v20 -; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v19 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v54, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 ; GFX9-NEXT: s_lshl_b32 s4, s51, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v19, v20, v21, vcc -; GFX9-NEXT: v_add_f32_e32 v20, s4, v16 -; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v21, v21, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 -; GFX9-NEXT: v_add_u32_e32 v21, 0x7fff, v21 -; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v55, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v31, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s16, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v40, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v41, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: s_lshl_b32 s4, s17, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v18, v2, v3, vcc +; GFX9-NEXT: v_add_f32_e32 v2, s4, v16 +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: v_add_f32_e32 v2, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v42, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: s_lshl_b32 s4, s18, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v17, v3, v4, vcc +; GFX9-NEXT: v_add_f32_e32 v3, s4, v16 +; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_add_f32_e32 v3, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v43, v4, v5, vcc +; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: s_lshl_b32 s4, s19, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; GFX9-NEXT: v_add_f32_e32 v4, s4, v16 +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 +; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v44, v5, v6, vcc +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 +; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: s_lshl_b32 s4, s20, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc +; GFX9-NEXT: v_add_f32_e32 v5, s4, v16 +; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 +; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 +; GFX9-NEXT: v_add_f32_e32 v5, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v45, v6, v7, vcc +; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 +; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 +; GFX9-NEXT: s_lshl_b32 s4, s21, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc +; GFX9-NEXT: v_add_f32_e32 v6, s4, v16 +; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 +; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: v_add_f32_e32 v6, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v46, v7, v8, vcc +; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: s_lshl_b32 s4, s22, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc +; GFX9-NEXT: v_add_f32_e32 v7, s4, v16 +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 +; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 +; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: v_add_f32_e32 v7, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v47, v8, v9, vcc +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 +; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 +; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: s_lshl_b32 s4, s23, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_f32_e32 v8, s4, v16 +; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v9, v9, v8 +; GFX9-NEXT: s_and_b32 s4, s24, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9 +; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v8 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; GFX9-NEXT: v_add_f32_e32 v8, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v56, v9, v10, vcc +; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v9, v9, v8 +; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9 +; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v8 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; GFX9-NEXT: s_lshl_b32 s4, s24, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v8, v9, v10, vcc +; GFX9-NEXT: v_add_f32_e32 v9, s4, v16 +; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v10, v10, v9 +; GFX9-NEXT: s_and_b32 s4, s25, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10 +; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 +; GFX9-NEXT: v_add_f32_e32 v9, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v57, v10, v11, vcc +; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v10, v10, v9 +; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10 +; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 +; GFX9-NEXT: s_lshl_b32 s4, s25, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc +; GFX9-NEXT: v_add_f32_e32 v10, s4, v16 +; GFX9-NEXT: v_bfe_u32 v11, v10, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v11, v11, v10 +; GFX9-NEXT: s_and_b32 s4, s26, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11 +; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v10 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; GFX9-NEXT: v_add_f32_e32 v10, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v58, v11, v12, vcc +; GFX9-NEXT: v_bfe_u32 v11, v10, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v11, v11, v10 +; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11 +; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v10 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; GFX9-NEXT: s_lshl_b32 s4, s26, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v10, v11, v12, vcc +; GFX9-NEXT: v_add_f32_e32 v11, s4, v16 +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v12, v12, v11 +; GFX9-NEXT: s_and_b32 s4, s27, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 +; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: v_add_f32_e32 v11, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v59, v12, v13, vcc +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v12, v12, v11 +; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 +; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: s_lshl_b32 s4, s27, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v11, v12, v13, vcc +; GFX9-NEXT: v_add_f32_e32 v12, s4, v16 +; GFX9-NEXT: v_bfe_u32 v13, v12, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v13, v13, v12 +; GFX9-NEXT: s_and_b32 s4, s28, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 +; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; GFX9-NEXT: v_add_f32_e32 v12, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v60, v13, v14, vcc +; GFX9-NEXT: v_bfe_u32 v13, v12, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v13, v13, v12 +; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 +; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; GFX9-NEXT: s_lshl_b32 s4, s28, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v12, v13, v14, vcc +; GFX9-NEXT: v_add_f32_e32 v13, s4, v16 +; GFX9-NEXT: v_bfe_u32 v14, v13, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v14, v14, v13 +; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 +; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v13 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 +; GFX9-NEXT: v_add_f32_e32 v13, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v61, v14, v15, vcc +; GFX9-NEXT: v_bfe_u32 v14, v13, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v14, v14, v13 +; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 +; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v13 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 +; GFX9-NEXT: s_lshl_b32 s4, s29, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v13, v14, v15, vcc +; GFX9-NEXT: v_add_f32_e32 v14, s4, v16 +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v62, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_add_f32_e32 v14, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v62, v15, v62, vcc +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: s_lshl_b32 s4, s30, 16 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v0, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_add_f32_e32 v14, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v15, v0, vcc +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: s_and_b32 s4, s31, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v0, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_add_f32_e32 v14, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v15, v0, vcc +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: s_lshl_b32 s4, s31, 16 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v0, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_add_f32_e32 v14, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v15, v0, vcc +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_cndmask_b32_e32 v14, v15, v16, vcc +; GFX9-NEXT: v_mov_b32_e32 v16, 0xffff +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-NEXT: v_and_b32_sdwa v14, v16, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v15, v0, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v2 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v14, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v13 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v62 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v13, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v12 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v61 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v12, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v11 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v60 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v11, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v10 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v10, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v9 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v9, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v8 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v8, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v7 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v7, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v6 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v6, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v5, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v4 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v4, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v3 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v3, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v17 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v2, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v18 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v1, v0, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v40 +; GFX9-NEXT: v_and_b32_sdwa v17, v16, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v55 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v31, v17, 16, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v30 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v30, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v20, v21, v22, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v19 -; GFX9-NEXT: v_and_b32_sdwa v20, v32, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_lshl_or_b32 v31, v19, 16, v20 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s49, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s48, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v29 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v29, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s48, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s47, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v28 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v28, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s47, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s46, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v27 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v27, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s46, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s45, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v26 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v26, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s45, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s44, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v25 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v25, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s44, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s43, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v24 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v24, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s43, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s42, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v23 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v23, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s42, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s41, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v22 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v22, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s41, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s40, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v21 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v21, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s40, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s39, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v20 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v20, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s39, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v33, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s38, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v19 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v19, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s38, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v33, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v33, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v33, v33, v18 -; GFX9-NEXT: v_add_u32_e32 v33, 0x7fff, v33 -; GFX9-NEXT: v_or_b32_e32 v34, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v33, v34, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s37, 0xffff0000 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v32 +; GFX9-NEXT: v_and_b32_sdwa v18, v16, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v18, v17, 16, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v33, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v33, v33, v17 -; GFX9-NEXT: v_add_u32_e32 v33, 0x7fff, v33 -; GFX9-NEXT: v_or_b32_e32 v34, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s37, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v33, v34, vcc -; GFX9-NEXT: v_add_f32_e32 v33, s4, v16 -; GFX9-NEXT: v_bfe_u32 v34, v33, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v34, v34, v33 -; GFX9-NEXT: v_add_u32_e32 v34, 0x7fff, v34 -; GFX9-NEXT: v_or_b32_e32 v35, 0x400000, v33 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v33, v33 -; GFX9-NEXT: v_cndmask_b32_e32 v33, v34, v35, vcc +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; GFX9-NEXT: v_and_b32_sdwa v32, v16, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_b32_sdwa v33, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: s_and_b32 s4, s36, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v17, v17, 16, v33 -; GFX9-NEXT: v_add_f32_e32 v33, s4, v16 -; GFX9-NEXT: v_bfe_u32 v34, v33, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v34, v34, v33 -; GFX9-NEXT: s_lshl_b32 s4, s36, 16 -; GFX9-NEXT: v_add_u32_e32 v34, 0x7fff, v34 -; GFX9-NEXT: v_or_b32_e32 v35, 0x400000, v33 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v33, v33 -; GFX9-NEXT: v_add_f32_e32 v16, s4, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v33, v34, v35, vcc -; GFX9-NEXT: v_bfe_u32 v34, v16, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v34, v34, v16 -; GFX9-NEXT: v_add_u32_e32 v34, 0x7fff, v34 -; GFX9-NEXT: v_or_b32_e32 v35, 0x400000, v16 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v16, v34, v35, vcc -; GFX9-NEXT: v_and_b32_sdwa v16, v32, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v33 +; GFX9-NEXT: v_lshl_or_b32 v17, v17, 16, v32 +; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_and_b32_sdwa v16, v16, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v32 ; GFX9-NEXT: v_lshl_or_b32 v16, v32, 16, v16 ; GFX9-NEXT: s_branch .LBB101_5 ; GFX9-NEXT: .LBB101_3: @@ -213399,18 +213782,33 @@ define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg % ; GFX9-NEXT: v_mov_b32_e32 v30, s50 ; GFX9-NEXT: v_mov_b32_e32 v31, s51 ; GFX9-NEXT: .LBB101_5: ; %end -; GFX9-NEXT: v_readlane_b32 s30, v36, 8 -; GFX9-NEXT: v_readlane_b32 s31, v36, 9 -; GFX9-NEXT: v_readlane_b32 s51, v36, 7 -; GFX9-NEXT: v_readlane_b32 s50, v36, 6 -; GFX9-NEXT: v_readlane_b32 s49, v36, 5 -; GFX9-NEXT: v_readlane_b32 s48, v36, 4 -; GFX9-NEXT: v_readlane_b32 s39, v36, 3 -; GFX9-NEXT: v_readlane_b32 s38, v36, 2 -; GFX9-NEXT: v_readlane_b32 s37, v36, 1 -; GFX9-NEXT: v_readlane_b32 s36, v36, 0 -; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; GFX9-NEXT: v_readlane_b32 s30, v63, 8 +; GFX9-NEXT: v_readlane_b32 s31, v63, 9 +; GFX9-NEXT: v_readlane_b32 s51, v63, 7 +; GFX9-NEXT: v_readlane_b32 s50, v63, 6 +; GFX9-NEXT: v_readlane_b32 s49, v63, 5 +; GFX9-NEXT: v_readlane_b32 s48, v63, 4 +; GFX9-NEXT: v_readlane_b32 s39, v63, 3 +; GFX9-NEXT: v_readlane_b32 s38, v63, 2 +; GFX9-NEXT: v_readlane_b32 s37, v63, 1 +; GFX9-NEXT: v_readlane_b32 s36, v63, 0 +; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -216187,8 +216585,8 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg % ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill @@ -216383,8 +216781,8 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg % ; SI-NEXT: s_lshl_b32 s9, s89, 16 ; SI-NEXT: s_lshl_b32 s82, s90, 16 ; SI-NEXT: s_lshl_b32 s83, s91, 16 -; SI-NEXT: s_lshl_b32 s10, s92, 16 -; SI-NEXT: s_lshl_b32 s84, s93, 16 +; SI-NEXT: s_lshl_b32 s84, s92, 16 +; SI-NEXT: s_lshl_b32 s10, s93, 16 ; SI-NEXT: s_lshl_b32 s85, s94, 16 ; SI-NEXT: s_lshl_b32 s11, s95, 16 ; SI-NEXT: s_lshl_b32 s86, s30, 16 @@ -216404,7 +216802,7 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg % ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s16 +; SI-NEXT: v_cvt_f32_f16_e32 v33, s16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f16_f32_e32 v0, v1 @@ -216417,314 +216815,286 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg % ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v1, s38 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v33, 0x38000000, v33 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v33, v33 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, s35 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v1, s31 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: v_cvt_f16_f32_e32 v34, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s95 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, s30 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v1, s95 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f16_f32_e32 v35, v1 +; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v31, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s94 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v1, s93 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v51, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s91 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f16_f32_e32 v37, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s92 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s89 +; SI-NEXT: v_cvt_f16_f32_e32 v28, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s91 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v48, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s79 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f16_f32_e32 v27, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s90 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s77 +; SI-NEXT: v_cvt_f16_f32_e32 v29, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s89 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v26, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s88 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v53, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s75 +; SI-NEXT: v_cvt_f16_f32_e32 v30, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s79 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v49, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v25, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s78 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v55, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s73 +; SI-NEXT: v_cvt_f16_f32_e32 v39, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s77 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v52, v0 -; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v55 -; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f16_f32_e32 v24, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s76 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v41, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s63 +; SI-NEXT: v_cvt_f16_f32_e32 v36, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s75 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v54, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s74 -; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v41 -; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v48 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v38, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s73 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v40, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s72 -; SI-NEXT: v_cvt_f16_f32_e32 v43, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s61 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v42, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v45, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v48, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s63 +; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s62 -; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v42 -; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v52 -; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v45 -; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v53 -; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v51 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v49, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s61 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v44, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s60 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v50, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s59 -; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v43 -; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v44 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v46, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s58 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v35, v1 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v46 -; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v40 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v49 +; SI-NEXT: v_cvt_f16_f32_e32 v51, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s57 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v34, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s56 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v33, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v52, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s47 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v32, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s46 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v31, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v53, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s45 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v30, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s44 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v29, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v54, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s43 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v28, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s29 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v27, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v55, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s42 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v26, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s28 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v40, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s41 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s27 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v41, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s40 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f16_f32_e32 v12, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s26 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v42, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s15 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s25 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v43, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s4 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s24 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v44, v1 ; SI-NEXT: v_readlane_b32 s4, v62, 7 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s4 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v36, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v45, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s23 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_readlane_b32 s4, v62, 6 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s4 +; SI-NEXT: v_readlane_b32 s4, v62, 6 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v47, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s22 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_readlane_b32 s4, v62, 5 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v46, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s4 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v0 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s21 +; SI-NEXT: v_cvt_f16_f32_e32 v57, v0 +; SI-NEXT: v_readlane_b32 s4, v62, 5 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v56, v1 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v57 +; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v40 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v30 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v1, s4 +; SI-NEXT: v_cvt_f32_f16_e32 v0, s21 ; SI-NEXT: v_readlane_b32 s4, v62, 4 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v1 +; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v56 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s4 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s20 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_readlane_b32 s4, v62, 3 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s4 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v37, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s19 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_readlane_b32 s4, v62, 2 -; SI-NEXT: v_cvt_f16_f32_e32 v38, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s4 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v0 ; SI-NEXT: v_readlane_b32 s4, v62, 1 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v32, v0 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s4 -; SI-NEXT: v_readlane_b32 s4, v62, 0 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s17 +; SI-NEXT: v_readlane_b32 s4, v62, 0 ; SI-NEXT: v_cvt_f32_f16_e32 v2, s4 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v50, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v59, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v58, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v59 +; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v42 +; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v54 +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v34 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v39, v1 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v58 +; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v55 +; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v37 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v45 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v41 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v53 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v49 ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v30 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v39 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v29 ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v34 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v35 -; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v54 -; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v8 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v31 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v30 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; SI-NEXT: s_branch .LBB103_5 ; SI-NEXT: .LBB103_3: -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr99 ; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: ; implicit-def: $sgpr36 @@ -216738,6 +217108,7 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg % ; SI-NEXT: ; implicit-def: $sgpr65 ; SI-NEXT: ; implicit-def: $sgpr66 ; SI-NEXT: ; implicit-def: $sgpr67 +; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr68 ; SI-NEXT: ; implicit-def: $sgpr7 ; SI-NEXT: ; implicit-def: $sgpr69 @@ -216749,8 +217120,8 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg % ; SI-NEXT: ; implicit-def: $sgpr9 ; SI-NEXT: ; implicit-def: $sgpr82 ; SI-NEXT: ; implicit-def: $sgpr83 -; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr84 +; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr85 ; SI-NEXT: ; implicit-def: $sgpr11 ; SI-NEXT: ; implicit-def: $sgpr86 @@ -216761,268 +217132,300 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg % ; SI-NEXT: ; implicit-def: $sgpr97 ; SI-NEXT: ; implicit-def: $sgpr98 ; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: s_branch .LBB103_2 ; SI-NEXT: .LBB103_4: ; SI-NEXT: v_readlane_b32 s4, v62, 9 -; SI-NEXT: v_mov_b32_e32 v26, s4 +; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 10 -; SI-NEXT: v_mov_b32_e32 v25, s4 +; SI-NEXT: v_mov_b32_e32 v44, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 11 -; SI-NEXT: v_mov_b32_e32 v24, s4 +; SI-NEXT: v_mov_b32_e32 v13, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 12 -; SI-NEXT: v_mov_b32_e32 v23, s4 +; SI-NEXT: v_mov_b32_e32 v45, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 13 -; SI-NEXT: v_mov_b32_e32 v22, s4 +; SI-NEXT: v_mov_b32_e32 v12, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 14 -; SI-NEXT: v_mov_b32_e32 v21, s4 +; SI-NEXT: v_mov_b32_e32 v46, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 15 -; SI-NEXT: v_mov_b32_e32 v20, s4 +; SI-NEXT: v_mov_b32_e32 v11, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 16 -; SI-NEXT: v_mov_b32_e32 v19, s4 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: v_mov_b32_e32 v47, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 17 -; SI-NEXT: v_mov_b32_e32 v18, s4 +; SI-NEXT: v_mov_b32_e32 v10, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 18 -; SI-NEXT: v_mov_b32_e32 v17, s4 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_mov_b32_e32 v57, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 19 -; SI-NEXT: v_mov_b32_e32 v50, s4 +; SI-NEXT: v_mov_b32_e32 v56, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 20 -; SI-NEXT: v_mov_b32_e32 v15, s4 +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_mov_b32_e32 v59, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 21 -; SI-NEXT: v_mov_b32_e32 v14, s4 +; SI-NEXT: v_mov_b32_e32 v58, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 22 -; SI-NEXT: v_mov_b32_e32 v13, s4 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v61, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 23 -; SI-NEXT: v_mov_b32_e32 v12, s4 +; SI-NEXT: v_mov_b32_e32 v60, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 24 -; SI-NEXT: v_mov_b32_e32 v11, s4 +; SI-NEXT: v_mov_b32_e32 v7, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 25 -; SI-NEXT: v_mov_b32_e32 v10, s4 +; SI-NEXT: v_mov_b32_e32 v6, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 26 -; SI-NEXT: v_mov_b32_e32 v9, s4 +; SI-NEXT: v_mov_b32_e32 v8, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 27 -; SI-NEXT: v_mov_b32_e32 v38, s4 +; SI-NEXT: v_mov_b32_e32 v5, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 28 -; SI-NEXT: v_mov_b32_e32 v0, s14 -; SI-NEXT: v_mov_b32_e32 v39, s4 +; SI-NEXT: v_mov_b32_e32 v9, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 29 +; SI-NEXT: v_mov_b32_e32 v4, s4 +; SI-NEXT: v_readlane_b32 s4, v62, 30 +; SI-NEXT: v_mov_b32_e32 v0, s14 +; SI-NEXT: v_mov_b32_e32 v32, s4 +; SI-NEXT: v_readlane_b32 s4, v62, 31 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v0, s98 -; SI-NEXT: v_mov_b32_e32 v6, s4 -; SI-NEXT: v_readlane_b32 s4, v62, 30 +; SI-NEXT: v_mov_b32_e32 v3, s4 +; SI-NEXT: v_readlane_b32 s4, v62, 32 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v0, s97 -; SI-NEXT: v_mov_b32_e32 v5, s4 -; SI-NEXT: v_readlane_b32 s4, v62, 31 +; SI-NEXT: v_mov_b32_e32 v33, s4 +; SI-NEXT: v_readlane_b32 s4, v62, 33 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v0, s13 -; SI-NEXT: v_mov_b32_e32 v4, s4 -; SI-NEXT: v_readlane_b32 s4, v62, 32 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v0, s96 -; SI-NEXT: v_mov_b32_e32 v3, s4 -; SI-NEXT: v_readlane_b32 s4, v62, 33 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v0, s12 ; SI-NEXT: v_mov_b32_e32 v2, s4 ; SI-NEXT: v_readlane_b32 s4, v62, 34 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v0, s86 -; SI-NEXT: v_mov_b32_e32 v1, s4 -; SI-NEXT: v_readlane_b32 s4, v62, 35 -; SI-NEXT: v_mov_b32_e32 v49, s87 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v51, s11 -; SI-NEXT: v_mov_b32_e32 v48, s85 -; SI-NEXT: v_mov_b32_e32 v53, s84 -; SI-NEXT: v_mov_b32_e32 v52, s10 -; SI-NEXT: v_mov_b32_e32 v55, s83 -; SI-NEXT: v_mov_b32_e32 v54, s82 -; SI-NEXT: v_mov_b32_e32 v41, s9 -; SI-NEXT: v_mov_b32_e32 v40, s81 -; SI-NEXT: v_mov_b32_e32 v43, s80 -; SI-NEXT: v_mov_b32_e32 v42, s8 -; SI-NEXT: v_mov_b32_e32 v45, s71 -; SI-NEXT: v_mov_b32_e32 v44, s70 -; SI-NEXT: v_mov_b32_e32 v47, s69 -; SI-NEXT: v_mov_b32_e32 v46, s7 -; SI-NEXT: v_mov_b32_e32 v57, s68 -; SI-NEXT: v_mov_b32_e32 v56, s6 -; SI-NEXT: v_mov_b32_e32 v59, s67 -; SI-NEXT: v_mov_b32_e32 v58, s66 -; SI-NEXT: v_mov_b32_e32 v61, s65 -; SI-NEXT: v_mov_b32_e32 v60, s64 -; SI-NEXT: v_mov_b32_e32 v37, s54 -; SI-NEXT: v_mov_b32_e32 v36, s53 -; SI-NEXT: v_mov_b32_e32 v33, s50 -; SI-NEXT: v_mov_b32_e32 v32, s49 -; SI-NEXT: v_mov_b32_e32 v31, s39 -; SI-NEXT: v_mov_b32_e32 v30, s37 -; SI-NEXT: v_mov_b32_e32 v29, s36 -; SI-NEXT: v_mov_b32_e32 v28, s34 -; SI-NEXT: v_mov_b32_e32 v27, s99 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v0, s4 +; SI-NEXT: v_readlane_b32 s4, v62, 35 +; SI-NEXT: v_mov_b32_e32 v35, s96 +; SI-NEXT: v_mov_b32_e32 v34, s12 +; SI-NEXT: v_mov_b32_e32 v36, s87 +; SI-NEXT: v_mov_b32_e32 v29, s86 +; SI-NEXT: v_mov_b32_e32 v37, s11 +; SI-NEXT: v_mov_b32_e32 v28, s85 +; SI-NEXT: v_mov_b32_e32 v38, s10 +; SI-NEXT: v_mov_b32_e32 v27, s84 +; SI-NEXT: v_mov_b32_e32 v39, s83 +; SI-NEXT: v_mov_b32_e32 v26, s82 +; SI-NEXT: v_mov_b32_e32 v48, s9 +; SI-NEXT: v_mov_b32_e32 v25, s81 +; SI-NEXT: v_mov_b32_e32 v49, s80 +; SI-NEXT: v_mov_b32_e32 v24, s8 +; SI-NEXT: v_mov_b32_e32 v50, s71 +; SI-NEXT: v_mov_b32_e32 v23, s70 +; SI-NEXT: v_mov_b32_e32 v51, s69 +; SI-NEXT: v_mov_b32_e32 v22, s7 +; SI-NEXT: v_mov_b32_e32 v52, s68 +; SI-NEXT: v_mov_b32_e32 v21, s6 +; SI-NEXT: v_mov_b32_e32 v53, s67 +; SI-NEXT: v_mov_b32_e32 v20, s66 +; SI-NEXT: v_mov_b32_e32 v54, s65 +; SI-NEXT: v_mov_b32_e32 v19, s64 +; SI-NEXT: v_mov_b32_e32 v55, s54 +; SI-NEXT: v_mov_b32_e32 v18, s53 +; SI-NEXT: v_mov_b32_e32 v40, s50 +; SI-NEXT: v_mov_b32_e32 v17, s49 +; SI-NEXT: v_mov_b32_e32 v41, s39 +; SI-NEXT: v_mov_b32_e32 v16, s37 +; SI-NEXT: v_mov_b32_e32 v42, s36 +; SI-NEXT: v_mov_b32_e32 v15, s34 +; SI-NEXT: v_mov_b32_e32 v43, s99 +; SI-NEXT: v_mov_b32_e32 v1, s4 ; SI-NEXT: .LBB103_5: ; %end -; SI-NEXT: v_mul_f32_e32 v34, 1.0, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v3 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v5 -; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1 -; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v39 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v1 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v6 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v9 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v11 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v10 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v13 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v12 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v15 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v17 -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v19 -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v21 -; SI-NEXT: v_mul_f32_e32 v15, 1.0, v14 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v23 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v25 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v27 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v29 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v31 +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v33 -; SI-NEXT: v_mul_f32_e32 v11, 1.0, v18 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v37 -; SI-NEXT: v_mul_f32_e32 v13, 1.0, v20 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v61 -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v59 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v57 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v47 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v45 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v43 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v41 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v55 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v53 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v51 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v0 -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v49 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_mul_f32_e32 v9, 1.0, v50 -; SI-NEXT: v_mul_f32_e32 v50, 1.0, v48 -; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2 -; SI-NEXT: v_mul_f32_e32 v7, 1.0, v4 -; SI-NEXT: v_lshr_b64 v[33:34], v[34:35], 16 -; SI-NEXT: v_lshr_b64 v[34:35], v[2:3], 16 -; SI-NEXT: v_lshr_b64 v[2:3], v[7:8], 16 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_mul_f32_e32 v5, 1.0, v38 -; SI-NEXT: v_mul_f32_e32 v19, 1.0, v36 -; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22 -; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24 -; SI-NEXT: v_mul_f32_e32 v26, 1.0, v26 -; SI-NEXT: v_mul_f32_e32 v28, 1.0, v28 -; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 -; SI-NEXT: v_mul_f32_e32 v17, 1.0, v32 -; SI-NEXT: v_mul_f32_e32 v60, 1.0, v60 -; SI-NEXT: v_mul_f32_e32 v58, 1.0, v58 -; SI-NEXT: v_mul_f32_e32 v56, 1.0, v56 -; SI-NEXT: v_mul_f32_e32 v46, 1.0, v46 -; SI-NEXT: v_mul_f32_e32 v44, 1.0, v44 -; SI-NEXT: v_mul_f32_e32 v42, 1.0, v42 -; SI-NEXT: v_mul_f32_e32 v40, 1.0, v40 -; SI-NEXT: v_mul_f32_e32 v54, 1.0, v54 -; SI-NEXT: v_mul_f32_e32 v52, 1.0, v52 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v1 +; SI-NEXT: v_lshr_b64 v[0:1], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v1, 1.0, v33 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v1 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v2, 1.0, v32 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v2 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v3 +; SI-NEXT: v_lshr_b64 v[2:3], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v3, 1.0, v9 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v3 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v4 +; SI-NEXT: v_lshr_b64 v[3:4], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v4, 1.0, v8 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v4 +; SI-NEXT: v_mul_f32_e32 v8, 1.0, v5 +; SI-NEXT: v_lshr_b64 v[4:5], v[8:9], 16 +; SI-NEXT: v_mul_f32_e32 v5, 1.0, v7 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v5 +; SI-NEXT: v_mul_f32_e32 v6, 1.0, v6 +; SI-NEXT: v_lshr_b64 v[5:6], v[6:7], 16 +; SI-NEXT: v_mul_f32_e32 v6, 1.0, v61 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6 +; SI-NEXT: v_mul_f32_e32 v6, 1.0, v60 +; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16 +; SI-NEXT: v_mul_f32_e32 v7, 1.0, v59 +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7 +; SI-NEXT: v_mul_f32_e32 v7, 1.0, v58 +; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], 16 +; SI-NEXT: v_mul_f32_e32 v8, 1.0, v57 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8 +; SI-NEXT: v_mul_f32_e32 v8, 1.0, v56 +; SI-NEXT: v_lshr_b64 v[8:9], v[8:9], 16 +; SI-NEXT: v_mul_f32_e32 v9, 1.0, v47 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v9 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v10 +; SI-NEXT: v_lshr_b64 v[9:10], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v10, 1.0, v46 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v10 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v11 +; SI-NEXT: v_lshr_b64 v[10:11], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v11, 1.0, v45 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v12 +; SI-NEXT: v_lshr_b64 v[11:12], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v12, 1.0, v44 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v12 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v13 +; SI-NEXT: v_lshr_b64 v[12:13], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v13, 1.0, v43 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v13 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v14 +; SI-NEXT: v_lshr_b64 v[13:14], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v14, 1.0, v42 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v14 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v15 +; SI-NEXT: v_lshr_b64 v[14:15], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v15, 1.0, v41 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v15 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v16 +; SI-NEXT: v_lshr_b64 v[15:16], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v16, 1.0, v40 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v16 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v17 +; SI-NEXT: v_lshr_b64 v[16:17], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v17, 1.0, v55 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v17 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v18 +; SI-NEXT: v_lshr_b64 v[17:18], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v18, 1.0, v54 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v18 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v19 +; SI-NEXT: v_lshr_b64 v[18:19], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v19, 1.0, v53 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v19 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v20 +; SI-NEXT: v_lshr_b64 v[19:20], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v20, 1.0, v52 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v20 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v21 +; SI-NEXT: v_lshr_b64 v[20:21], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v21, 1.0, v51 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v21 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v22 +; SI-NEXT: v_lshr_b64 v[21:22], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v22, 1.0, v50 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v22 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v23 +; SI-NEXT: v_lshr_b64 v[22:23], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v23, 1.0, v49 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v23 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v24 +; SI-NEXT: v_lshr_b64 v[23:24], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v24, 1.0, v48 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v24 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v25 +; SI-NEXT: v_lshr_b64 v[24:25], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v25, 1.0, v39 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v25 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v26 +; SI-NEXT: v_lshr_b64 v[25:26], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v26, 1.0, v38 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v26 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v27 +; SI-NEXT: v_lshr_b64 v[26:27], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v27, 1.0, v37 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v27 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v28 +; SI-NEXT: v_lshr_b64 v[27:28], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v28, 1.0, v36 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v28 +; SI-NEXT: v_mul_f32_e32 v29, 1.0, v29 +; SI-NEXT: v_lshr_b64 v[28:29], v[29:30], 16 +; SI-NEXT: v_mul_f32_e32 v29, 1.0, v35 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v29 +; SI-NEXT: v_mul_f32_e32 v29, 1.0, v34 +; SI-NEXT: v_lshr_b64 v[29:30], v[29:30], 16 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: v_readlane_b32 s30, v63, 34 ; SI-NEXT: v_readlane_b32 s31, v63, 35 ; SI-NEXT: v_readlane_b32 s99, v63, 33 @@ -217059,85 +217462,24 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg % ; SI-NEXT: v_readlane_b32 s36, v63, 2 ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_mul_f32_e32 v48, 1.0, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 -; SI-NEXT: v_lshr_b64 v[4:5], v[5:6], 16 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_mul_f32_e32 v38, 1.0, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16 -; SI-NEXT: v_lshr_b64 v[7:8], v[15:16], 16 -; SI-NEXT: v_lshr_b64 v[8:9], v[9:10], 16 -; SI-NEXT: v_lshr_b64 v[9:10], v[11:12], 16 -; SI-NEXT: v_lshr_b64 v[10:11], v[13:14], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[22:23], 16 -; SI-NEXT: v_lshr_b64 v[12:13], v[24:25], 16 -; SI-NEXT: v_lshr_b64 v[13:14], v[26:27], 16 -; SI-NEXT: v_lshr_b64 v[14:15], v[28:29], 16 -; SI-NEXT: v_lshr_b64 v[15:16], v[30:31], 16 -; SI-NEXT: v_lshr_b64 v[16:17], v[17:18], 16 -; SI-NEXT: v_lshr_b64 v[17:18], v[19:20], 16 -; SI-NEXT: v_lshr_b64 v[18:19], v[60:61], 16 -; SI-NEXT: v_lshr_b64 v[19:20], v[58:59], 16 -; SI-NEXT: v_lshr_b64 v[20:21], v[56:57], 16 -; SI-NEXT: v_lshr_b64 v[21:22], v[46:47], 16 -; SI-NEXT: v_lshr_b64 v[22:23], v[44:45], 16 -; SI-NEXT: v_lshr_b64 v[23:24], v[42:43], 16 -; SI-NEXT: v_lshr_b64 v[24:25], v[40:41], 16 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[25:26], v[54:55], 16 -; SI-NEXT: v_lshr_b64 v[26:27], v[52:53], 16 -; SI-NEXT: v_lshr_b64 v[27:28], v[50:51], 16 -; SI-NEXT: v_lshr_b64 v[28:29], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[29:30], v[38:39], 16 ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v30 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mul_f32_e32 v36, 1.0, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[30:31], v[36:37], 16 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 +; SI-NEXT: v_lshr_b64 v[30:31], v[30:31], 16 +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v31 +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 -; SI-NEXT: v_lshr_b64 v[31:32], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v0, v33 -; SI-NEXT: v_mov_b32_e32 v1, v34 +; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31 +; SI-NEXT: v_lshr_b64 v[31:32], v[31:32], 16 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -217182,94 +217524,103 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg % ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB103_4 ; VI-NEXT: .LBB103_2: ; %cmp.true -; VI-NEXT: s_lshr_b32 s4, s50, 16 -; VI-NEXT: v_mov_b32_e32 v0, s4 -; VI-NEXT: s_lshr_b32 s4, s30, 16 ; VI-NEXT: v_mov_b32_e32 v16, 0x200 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: s_lshr_b32 s4, s31, 16 -; VI-NEXT: v_add_f16_sdwa v18, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v0, s30, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v3, s4 -; VI-NEXT: s_lshr_b32 s4, s29, 16 -; VI-NEXT: v_or_b32_e32 v14, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s29, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s28, 16 -; VI-NEXT: v_or_b32_e32 v13, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s28, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s27, 16 -; VI-NEXT: v_or_b32_e32 v12, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s27, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s26, 16 -; VI-NEXT: v_or_b32_e32 v11, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s26, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s25, 16 -; VI-NEXT: v_or_b32_e32 v10, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s25, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s24, 16 -; VI-NEXT: v_or_b32_e32 v9, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s24, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s23, 16 -; VI-NEXT: v_or_b32_e32 v8, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s23, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s22, 16 -; VI-NEXT: v_or_b32_e32 v7, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s22, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s21, 16 -; VI-NEXT: v_or_b32_e32 v6, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s21, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s20, 16 -; VI-NEXT: v_or_b32_e32 v5, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s20, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s19, 16 -; VI-NEXT: v_or_b32_e32 v4, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v2, s31, v16 -; VI-NEXT: v_add_f16_sdwa v3, v3, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v0, s19, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s18, 16 -; VI-NEXT: v_or_b32_e32 v15, v2, v3 -; VI-NEXT: v_or_b32_e32 v3, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s18, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s17, 16 -; VI-NEXT: v_or_b32_e32 v2, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: s_lshr_b32 s4, s16, 16 -; VI-NEXT: v_mov_b32_e32 v19, s4 -; VI-NEXT: s_lshr_b32 s4, s51, 16 -; VI-NEXT: v_add_f16_e32 v17, s50, v16 -; VI-NEXT: v_mov_b32_e32 v20, s4 -; VI-NEXT: s_lshr_b32 s4, s49, 16 -; VI-NEXT: v_or_b32_e32 v30, v17, v18 -; VI-NEXT: v_mov_b32_e32 v17, s4 -; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v18, s49, v16 +; VI-NEXT: v_add_f16_e32 v7, s23, v16 +; VI-NEXT: s_lshr_b32 s15, s23, 16 +; VI-NEXT: s_lshr_b32 s23, s31, 16 +; VI-NEXT: v_mov_b32_e32 v20, s23 +; VI-NEXT: v_add_f16_e32 v6, s22, v16 +; VI-NEXT: s_lshr_b32 s14, s22, 16 +; VI-NEXT: s_lshr_b32 s22, s30, 16 +; VI-NEXT: v_add_f16_e32 v15, s31, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v15, v15, v20 +; VI-NEXT: v_mov_b32_e32 v20, s22 +; VI-NEXT: v_add_f16_e32 v5, s21, v16 +; VI-NEXT: s_lshr_b32 s13, s21, 16 +; VI-NEXT: s_lshr_b32 s21, s29, 16 +; VI-NEXT: v_add_f16_e32 v14, s30, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v14, v14, v20 +; VI-NEXT: v_mov_b32_e32 v20, s21 +; VI-NEXT: v_add_f16_e32 v4, s20, v16 +; VI-NEXT: s_lshr_b32 s12, s20, 16 +; VI-NEXT: s_lshr_b32 s20, s28, 16 +; VI-NEXT: v_add_f16_e32 v13, s29, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v13, v13, v20 +; VI-NEXT: v_mov_b32_e32 v20, s20 +; VI-NEXT: v_add_f16_e32 v3, s19, v16 +; VI-NEXT: s_lshr_b32 s11, s19, 16 +; VI-NEXT: s_lshr_b32 s19, s27, 16 +; VI-NEXT: v_add_f16_e32 v12, s28, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v12, v12, v20 +; VI-NEXT: v_mov_b32_e32 v20, s19 +; VI-NEXT: v_add_f16_e32 v2, s18, v16 +; VI-NEXT: s_lshr_b32 s10, s18, 16 +; VI-NEXT: s_lshr_b32 s18, s26, 16 +; VI-NEXT: v_add_f16_e32 v11, s27, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v11, v11, v20 +; VI-NEXT: v_mov_b32_e32 v20, s18 +; VI-NEXT: v_add_f16_e32 v1, s17, v16 +; VI-NEXT: s_lshr_b32 s9, s17, 16 +; VI-NEXT: s_lshr_b32 s17, s25, 16 +; VI-NEXT: v_add_f16_e32 v10, s26, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v10, v10, v20 +; VI-NEXT: v_mov_b32_e32 v20, s17 +; VI-NEXT: v_add_f16_e32 v0, s16, v16 +; VI-NEXT: s_lshr_b32 s8, s16, 16 +; VI-NEXT: s_lshr_b32 s16, s24, 16 +; VI-NEXT: v_add_f16_e32 v9, s25, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v9, v9, v20 +; VI-NEXT: v_mov_b32_e32 v20, s16 +; VI-NEXT: v_add_f16_e32 v8, s24, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v8, v8, v20 +; VI-NEXT: v_mov_b32_e32 v20, s15 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v7, v7, v20 +; VI-NEXT: v_mov_b32_e32 v20, s14 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v6, v6, v20 +; VI-NEXT: v_mov_b32_e32 v20, s13 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v5, v5, v20 +; VI-NEXT: v_mov_b32_e32 v20, s12 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v4, v4, v20 +; VI-NEXT: v_mov_b32_e32 v20, s11 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v3, v3, v20 +; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v2, v2, v20 +; VI-NEXT: v_mov_b32_e32 v20, s9 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v20 +; VI-NEXT: v_mov_b32_e32 v20, s8 +; VI-NEXT: s_lshr_b32 s7, s51, 16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v0, v0, v20 +; VI-NEXT: v_mov_b32_e32 v20, s7 +; VI-NEXT: s_lshr_b32 s6, s50, 16 +; VI-NEXT: v_add_f16_e32 v19, s51, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v31, v19, v20 +; VI-NEXT: v_mov_b32_e32 v19, s6 +; VI-NEXT: s_lshr_b32 s5, s49, 16 +; VI-NEXT: v_add_f16_e32 v18, s50, v16 +; VI-NEXT: v_add_f16_sdwa v19, v19, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v30, v18, v19 +; VI-NEXT: v_mov_b32_e32 v18, s5 ; VI-NEXT: s_lshr_b32 s4, s48, 16 -; VI-NEXT: v_or_b32_e32 v29, v18, v17 +; VI-NEXT: v_add_f16_e32 v17, s49, v16 +; VI-NEXT: v_add_f16_sdwa v18, v18, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v29, v17, v18 ; VI-NEXT: v_mov_b32_e32 v17, s4 ; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v18, s48, v16 @@ -217306,23 +217657,14 @@ define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg % ; VI-NEXT: s_lshr_b32 s4, s41, 16 ; VI-NEXT: v_or_b32_e32 v22, v18, v17 ; VI-NEXT: v_mov_b32_e32 v17, s4 -; VI-NEXT: v_add_f16_e32 v0, s17, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v18, s41, v16 ; VI-NEXT: s_lshr_b32 s4, s40, 16 -; VI-NEXT: v_or_b32_e32 v1, v0, v1 -; VI-NEXT: v_add_f16_e32 v0, s16, v16 -; VI-NEXT: v_add_f16_sdwa v19, v19, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v21, v18, v17 ; VI-NEXT: v_mov_b32_e32 v17, s4 -; VI-NEXT: v_or_b32_e32 v0, v0, v19 -; VI-NEXT: v_add_f16_e32 v19, s51, v16 -; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v18, s40, v16 ; VI-NEXT: s_lshr_b32 s4, s39, 16 -; VI-NEXT: v_or_b32_e32 v31, v19, v20 ; VI-NEXT: v_or_b32_e32 v20, v18, v17 ; VI-NEXT: v_mov_b32_e32 v17, s4 ; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -221001,7 +221343,7 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -221023,17 +221365,14 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_writelane_b32 v63, s36, 2 ; SI-NEXT: v_writelane_b32 v63, s30, 3 ; SI-NEXT: v_writelane_b32 v63, s31, 4 -; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 -; SI-NEXT: s_lshl_b32 s15, s24, 16 -; SI-NEXT: s_and_b32 s24, s23, 0xffff0000 -; SI-NEXT: s_lshl_b32 s23, s23, 16 -; SI-NEXT: s_lshl_b32 s13, s25, 16 +; SI-NEXT: v_readfirstlane_b32 s60, v12 ; SI-NEXT: v_readfirstlane_b32 s42, v17 ; SI-NEXT: v_readfirstlane_b32 s44, v16 ; SI-NEXT: v_readfirstlane_b32 s46, v15 ; SI-NEXT: v_readfirstlane_b32 s56, v14 ; SI-NEXT: v_readfirstlane_b32 s58, v13 -; SI-NEXT: v_readfirstlane_b32 s60, v12 +; SI-NEXT: s_and_b32 s61, s60, 0xffff0000 +; SI-NEXT: s_lshl_b32 s60, s60, 16 ; SI-NEXT: v_readfirstlane_b32 s62, v11 ; SI-NEXT: v_readfirstlane_b32 s72, v10 ; SI-NEXT: v_readfirstlane_b32 s74, v9 @@ -221046,7 +221385,6 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; SI-NEXT: v_readfirstlane_b32 vcc_lo, v2 ; SI-NEXT: v_readfirstlane_b32 s30, v1 ; SI-NEXT: v_readfirstlane_b32 s34, v0 -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s23 ; SI-NEXT: s_and_b32 s4, s29, 0xffff0000 ; SI-NEXT: s_lshl_b32 s5, s29, 16 ; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 @@ -221056,6 +221394,11 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; SI-NEXT: s_and_b32 s10, s26, 0xffff0000 ; SI-NEXT: s_lshl_b32 s11, s26, 16 ; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 +; SI-NEXT: s_lshl_b32 s13, s25, 16 +; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 +; SI-NEXT: s_lshl_b32 s15, s24, 16 +; SI-NEXT: s_and_b32 s24, s23, 0xffff0000 +; SI-NEXT: s_lshl_b32 s23, s23, 16 ; SI-NEXT: s_and_b32 s25, s22, 0xffff0000 ; SI-NEXT: s_lshl_b32 s22, s22, 16 ; SI-NEXT: s_and_b32 s26, s21, 0xffff0000 @@ -221080,8 +221423,6 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; SI-NEXT: s_lshl_b32 s56, s56, 16 ; SI-NEXT: s_and_b32 s59, s58, 0xffff0000 ; SI-NEXT: s_lshl_b32 s58, s58, 16 -; SI-NEXT: s_and_b32 s61, s60, 0xffff0000 -; SI-NEXT: s_lshl_b32 s60, s60, 16 ; SI-NEXT: s_and_b32 s63, s62, 0xffff0000 ; SI-NEXT: s_lshl_b32 s62, s62, 16 ; SI-NEXT: s_and_b32 s73, s72, 0xffff0000 @@ -221107,1067 +221448,1063 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; SI-NEXT: s_and_b32 s35, s34, 0xffff0000 ; SI-NEXT: s_lshl_b32 s34, s34, 16 ; SI-NEXT: v_readfirstlane_b32 s36, v18 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s60 ; SI-NEXT: s_cmp_lg_u32 s36, 0 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s16 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s17 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s40 -; SI-NEXT: v_mul_f32_e64 v38, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v45, 1.0, s29 -; SI-NEXT: v_mul_f32_e64 v58, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s28 -; SI-NEXT: v_mul_f32_e64 v43, 1.0, s20 -; SI-NEXT: v_mul_f32_e64 v44, 1.0, s27 -; SI-NEXT: v_mul_f32_e64 v61, 1.0, s21 -; SI-NEXT: v_mul_f32_e64 v59, 1.0, s26 -; SI-NEXT: v_mul_f32_e64 v55, 1.0, s22 +; SI-NEXT: v_mul_f32_e64 v3, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v20, 1.0, s41 +; SI-NEXT: v_mul_f32_e64 v7, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v5, 1.0, s40 +; SI-NEXT: v_mul_f32_e64 v41, 1.0, s18 +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_mul_f32_e64 v60, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v11, 1.0, s19 +; SI-NEXT: v_mul_f32_e64 v9, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s20 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v15, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v13, 1.0, s26 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s22 ; SI-NEXT: v_mul_f32_e64 v40, 1.0, s25 -; SI-NEXT: v_mul_f32_e64 v32, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v53, 1.0, s15 -; SI-NEXT: v_mul_f32_e64 v54, 1.0, s14 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill -; SI-NEXT: v_mul_f32_e64 v34, 1.0, s12 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s11 -; SI-NEXT: v_mul_f32_e64 v49, 1.0, s10 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s9 -; SI-NEXT: v_mul_f32_e64 v30, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v36, 1.0, s7 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v23, 1.0, s5 -; SI-NEXT: v_mul_f32_e64 v37, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v33, 1.0, s34 -; SI-NEXT: v_mul_f32_e64 v35, 1.0, s35 -; SI-NEXT: v_mul_f32_e64 v51, 1.0, s30 -; SI-NEXT: v_mul_f32_e64 v2, 1.0, s31 -; SI-NEXT: v_mul_f32_e64 v28, 1.0, vcc_lo -; SI-NEXT: v_mul_f32_e64 v31, 1.0, vcc_hi -; SI-NEXT: v_mul_f32_e64 v4, 1.0, s94 -; SI-NEXT: v_mul_f32_e64 v29, 1.0, s95 -; SI-NEXT: v_mul_f32_e64 v22, 1.0, s92 -; SI-NEXT: v_mul_f32_e64 v24, 1.0, s93 -; SI-NEXT: v_mul_f32_e64 v41, 1.0, s90 -; SI-NEXT: v_mul_f32_e64 v8, 1.0, s91 -; SI-NEXT: v_mul_f32_e64 v19, 1.0, s88 -; SI-NEXT: v_mul_f32_e64 v21, 1.0, s89 -; SI-NEXT: v_mul_f32_e64 v10, 1.0, s78 -; SI-NEXT: v_mul_f32_e64 v12, 1.0, s79 -; SI-NEXT: v_mul_f32_e64 v15, 1.0, s76 -; SI-NEXT: v_mul_f32_e64 v17, 1.0, s77 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s74 -; SI-NEXT: v_mul_f32_e64 v18, 1.0, s75 -; SI-NEXT: v_mul_f32_e64 v1, 1.0, s72 -; SI-NEXT: v_mul_f32_e64 v13, 1.0, s73 -; SI-NEXT: v_mul_f32_e64 v50, 1.0, s62 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s63 -; SI-NEXT: v_mul_f32_e64 v27, 1.0, s60 -; SI-NEXT: v_mul_f32_e64 v11, 1.0, s61 -; SI-NEXT: v_mul_f32_e64 v14, 1.0, s58 -; SI-NEXT: v_mul_f32_e64 v26, 1.0, s59 -; SI-NEXT: v_mul_f32_e64 v7, 1.0, s56 -; SI-NEXT: v_mul_f32_e64 v9, 1.0, s57 +; SI-NEXT: v_mul_f32_e64 v19, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v17, 1.0, s24 +; SI-NEXT: v_mul_f32_e64 v4, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v53, 1.0, s14 +; SI-NEXT: v_mul_f32_e64 v23, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v21, 1.0, s12 +; SI-NEXT: v_mul_f32_e64 v32, 1.0, s11 +; SI-NEXT: v_mul_f32_e64 v30, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v27, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v25, 1.0, s8 +; SI-NEXT: v_mul_f32_e64 v55, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v51, 1.0, s6 +; SI-NEXT: v_mul_f32_e64 v31, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v29, 1.0, s4 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, s34 +; SI-NEXT: v_mul_f32_e64 v2, 1.0, s35 +; SI-NEXT: v_mul_f32_e64 v35, 1.0, s30 +; SI-NEXT: v_mul_f32_e64 v33, 1.0, s31 +; SI-NEXT: v_mul_f32_e64 v34, 1.0, vcc_lo +; SI-NEXT: v_mul_f32_e64 v28, 1.0, vcc_hi +; SI-NEXT: v_mul_f32_e64 v49, 1.0, s94 +; SI-NEXT: v_mul_f32_e64 v37, 1.0, s95 +; SI-NEXT: v_mul_f32_e64 v26, 1.0, s92 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s93 +; SI-NEXT: v_mul_f32_e64 v44, 1.0, s90 +; SI-NEXT: v_mul_f32_e64 v43, 1.0, s91 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s88 +; SI-NEXT: v_mul_f32_e64 v36, 1.0, s89 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mul_f32_e64 v61, 1.0, s78 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s79 +; SI-NEXT: v_mul_f32_e64 v24, 1.0, s76 +; SI-NEXT: v_mul_f32_e64 v22, 1.0, s77 +; SI-NEXT: v_mul_f32_e64 v59, 1.0, s74 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v62, 1.0, s75 +; SI-NEXT: v_mul_f32_e64 v45, 1.0, s72 +; SI-NEXT: v_mul_f32_e64 v38, 1.0, s73 +; SI-NEXT: v_mul_f32_e64 v8, 1.0, s62 +; SI-NEXT: v_mul_f32_e64 v6, 1.0, s63 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v10, 1.0, s61 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s58 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s59 +; SI-NEXT: v_mul_f32_e64 v18, 1.0, s56 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s57 ; SI-NEXT: v_mul_f32_e64 v52, 1.0, s46 -; SI-NEXT: v_mul_f32_e64 v20, 1.0, s47 -; SI-NEXT: v_mul_f32_e64 v3, 1.0, s44 -; SI-NEXT: v_mul_f32_e64 v5, 1.0, s45 -; SI-NEXT: v_mul_f32_e64 v62, 1.0, s42 -; SI-NEXT: v_mul_f32_e64 v60, 1.0, s43 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v12, 1.0, s47 +; SI-NEXT: v_mul_f32_e64 v48, 1.0, s44 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s45 +; SI-NEXT: v_mul_f32_e64 v14, 1.0, s42 +; SI-NEXT: v_mul_f32_e64 v54, 1.0, s43 +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill ; SI-NEXT: s_cbranch_scc0 .LBB105_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v42 -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v46 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v2 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v28 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v45 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v31 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v38 -; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v57 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v34 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v20 ; SI-NEXT: s_mov_b64 s[4:5], 0 -; SI-NEXT: v_mov_b32_e32 v31, v38 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v61 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v52 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v43 -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v49 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v0 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v39 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v55 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v51 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v31 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v18 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v62 +; SI-NEXT: v_mov_b32_e32 v18, v50 +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v54 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v22 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v55 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v24 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v56 -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v14 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v44 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v41 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v59 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v40 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v32 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v48 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v58 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v36 -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v53 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v12 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v18 -; SI-NEXT: v_mov_b32_e32 v48, v59 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v50 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v62 -; SI-NEXT: v_mov_b32_e32 v43, v34 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v54 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v33 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v52 +; SI-NEXT: v_mov_b32_e32 v52, v54 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v15 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v37 -; SI-NEXT: v_mov_b32_e32 v37, v57 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v49 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v58 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v30 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v25 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v33 -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v10 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v60 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v9 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v40 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v2 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v13 +; SI-NEXT: v_mov_b32_e32 v2, v34 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v37 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v61 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v11 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v34 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v28 +; SI-NEXT: v_mov_b32_e32 v28, v26 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v35 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v4 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v53 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v42 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v36 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v26 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v8 +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v10 +; SI-NEXT: v_mov_b32_e32 v10, v1 +; SI-NEXT: v_mov_b32_e32 v40, v4 +; SI-NEXT: v_mov_b32_e32 v42, v36 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v16 +; SI-NEXT: v_mov_b32_e32 v16, v14 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v32 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v32, v30 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v35 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v46 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v23 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v48 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v6 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v26 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v6, v25 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v7 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v30 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v24 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v24, v22 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v22 +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v57 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v51 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v4 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v14 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v45 +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(14) expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v0 +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v41 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v59 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v38 +; SI-NEXT: v_mov_b32_e32 v45, v38 +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v59, v6 +; SI-NEXT: v_mov_b32_e32 v6, v0 +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v60 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v33 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v16 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v2 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v0 -; SI-NEXT: v_mov_b32_e32 v34, v2 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v50 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v12 ; SI-NEXT: s_branch .LBB105_3 ; SI-NEXT: .LBB105_2: -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v43, v34 -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: v_mov_b32_e32 v6, v25 +; SI-NEXT: v_mov_b32_e32 v59, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v32, v30 +; SI-NEXT: v_mov_b32_e32 v2, v34 +; SI-NEXT: v_mov_b32_e32 v28, v26 +; SI-NEXT: v_mov_b32_e32 v24, v22 +; SI-NEXT: v_mov_b32_e32 v16, v14 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: v_mov_b32_e32 v40, v4 +; SI-NEXT: v_mov_b32_e32 v42, v36 +; SI-NEXT: v_mov_b32_e32 v45, v38 +; SI-NEXT: v_mov_b32_e32 v18, v50 +; SI-NEXT: v_mov_b32_e32 v10, v1 ; SI-NEXT: s_mov_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr31 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr5 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr22 -; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr60 +; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr53 +; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr9 +; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr40 +; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: ; implicit-def: $vgpr58 +; SI-NEXT: ; implicit-def: $vgpr11 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr53 +; SI-NEXT: ; implicit-def: $vgpr13 +; SI-NEXT: ; implicit-def: $vgpr11 +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr11 +; SI-NEXT: ; implicit-def: $vgpr17 +; SI-NEXT: ; implicit-def: $vgpr15 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: ; implicit-def: $vgpr15 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr15 +; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr25 +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr29 +; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr61 -; SI-NEXT: ; implicit-def: $vgpr17 -; SI-NEXT: ; implicit-def: $vgpr15 -; SI-NEXT: ; implicit-def: $vgpr13 -; SI-NEXT: ; implicit-def: $vgpr11 -; SI-NEXT: ; implicit-def: $vgpr9 -; SI-NEXT: ; implicit-def: $vgpr7 -; SI-NEXT: ; implicit-def: $vgpr5 -; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr44 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr59 -; SI-NEXT: ; implicit-def: $vgpr56 -; SI-NEXT: ; implicit-def: $vgpr46 -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v52, v54 +; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: .LBB105_3: ; %Flow -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload -; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] -; SI-NEXT: s_cbranch_vccnz .LBB105_5 -; SI-NEXT: ; %bb.4: ; %cmp.true +; SI-NEXT: v_mov_b32_e32 v57, v10 +; SI-NEXT: v_mov_b32_e32 v10, v2 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v62 -; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v52 -; SI-NEXT: v_add_f32_e32 v45, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v14 -; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v50 -; SI-NEXT: v_add_f32_e32 v58, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v10 -; SI-NEXT: v_add_f32_e32 v52, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v41 -; SI-NEXT: v_add_f32_e32 v54, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v4 -; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v51 -; SI-NEXT: v_add_f32_e32 v40, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v23 -; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v30 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v43 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v60 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v20 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v26 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v6 -; SI-NEXT: v_add_f32_e32 v47, 0x40c00000, v0 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v34 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_add_f32_e32 v60, 0x40c00000, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v33 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v3 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v18 -; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v12 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v8 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload +; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] +; SI-NEXT: s_cbranch_vccnz .LBB105_5 +; SI-NEXT: ; %bb.4: ; %cmp.true +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v10 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v8, v28 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v8 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v13 +; SI-NEXT: v_mov_b32_e32 v48, v18 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v29 +; SI-NEXT: v_mov_b32_e32 v1, v24 +; SI-NEXT: v_mov_b32_e32 v12, v40 +; SI-NEXT: v_mov_b32_e32 v54, v16 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v0 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v13 +; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16 +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v15 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v8 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v4 +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v5 +; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v14 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v3 +; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v15 +; SI-NEXT: v_lshr_b64 v[16:17], v[17:18], 16 +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v15 +; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v0 +; SI-NEXT: v_lshr_b64 v[39:40], v[39:40], 16 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v8 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v42 +; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v14 +; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16 +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v2 +; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v12 +; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v12 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v8 +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 +; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16 +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v1 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v45 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v1 +; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16 +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v10 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v8 +; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16 +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 ; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v48 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v6 +; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16 +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v10 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v48, 0xffff0000, v13 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v10 +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v10 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16 +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v54 +; SI-NEXT: v_add_f32_e32 v61, 0x40c00000, v16 +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v52 +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v16 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v60, 0x40c00000, v10 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 +; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v32 +; SI-NEXT: v_lshr_b64 v[31:32], v[61:62], 16 +; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v57 +; SI-NEXT: v_add_f32_e32 v43, 0x40c00000, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v7 +; SI-NEXT: v_lshr_b64 v[23:24], v[23:24], 16 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v10 +; SI-NEXT: v_lshr_b64 v[33:34], v[60:61], 16 +; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v7 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v3 +; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16 +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[27:28], v[43:44], 16 +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[23:24], v[28:29], 16 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 +; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v4 +; SI-NEXT: v_lshr_b64 v[25:26], v[25:26], 16 +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v8 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v42, 0x40c00000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 +; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v9 +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[37:38], v[24:25], 16 +; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v5 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v45, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 +; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v11 +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 +; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v11 +; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16 +; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[19:20], v[45:46], 16 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 +; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v9 +; SI-NEXT: v_lshr_b64 v[21:22], v[21:22], 16 +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v12 +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[49:50], v[20:21], 16 +; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v9 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v25 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v55, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v22 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[15:16], v[55:56], 16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v54, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v17 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[51:52], v[54:55], 16 +; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v4 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v15 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v13 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 +; SI-NEXT: v_add_f32_e32 v42, 0x40c00000, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v59 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v6 +; SI-NEXT: v_lshr_b64 v[35:36], v[42:43], 16 +; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v11 +; SI-NEXT: v_lshr_b64 v[11:12], v[16:17], 16 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v3 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v11 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v9 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[53:54], v[12:13], 16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v7 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 +; SI-NEXT: v_add_f32_e32 v57, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[7:8], v[57:58], 16 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[39:40], v[8:9], 16 +; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v0 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v59, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[3:4], v[59:60], 16 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v1 +; SI-NEXT: v_lshr_b64 v[41:42], v[4:5], 16 +; SI-NEXT: v_mov_b32_e32 v1, v41 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshr_b64 v[0:1], v[40:41], 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v5 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 +; SI-NEXT: v_lshr_b64 v[0:1], v[2:3], 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v3 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 +; SI-NEXT: v_lshr_b64 v[0:1], v[38:39], 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v2 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 +; SI-NEXT: v_lshr_b64 v[0:1], v[6:7], 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v4 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 +; SI-NEXT: v_lshr_b64 v[0:1], v[52:53], 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v4 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v6 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[0:1], v[10:11], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v6 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v8 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[0:1], v[50:51], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v8 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v10 -; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v1, v36 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[0:1], v[14:15], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v46 -; SI-NEXT: v_lshr_b64 v[35:36], v[35:36], 16 -; SI-NEXT: v_mov_b32_e32 v36, v60 -; SI-NEXT: v_lshr_b64 v[45:46], v[45:46], 16 -; SI-NEXT: v_mov_b32_e32 v37, v61 -; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v10 -; SI-NEXT: v_lshr_b64 v[61:62], v[42:43], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[0:1], v[48:49], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v28 -; SI-NEXT: v_lshr_b64 v[27:28], v[27:28], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[0:1], v[18:19], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v1, v59 -; SI-NEXT: v_lshr_b64 v[58:59], v[58:59], 16 -; SI-NEXT: v_mov_b32_e32 v60, v48 -; SI-NEXT: v_mov_b32_e32 v59, v47 -; SI-NEXT: v_mov_b32_e32 v47, v41 -; SI-NEXT: v_mov_b32_e32 v46, v40 -; SI-NEXT: v_mov_b32_e32 v40, v32 -; SI-NEXT: v_mov_b32_e32 v39, v31 -; SI-NEXT: v_mov_b32_e32 v42, v21 -; SI-NEXT: v_mov_b32_e32 v41, v20 -; SI-NEXT: v_mov_b32_e32 v31, v30 -; SI-NEXT: v_mov_b32_e32 v30, v29 -; SI-NEXT: v_mov_b32_e32 v48, v19 -; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v22 -; SI-NEXT: v_lshr_b64 v[21:22], v[30:31], 16 -; SI-NEXT: v_lshr_b64 v[28:29], v[57:58], 16 -; SI-NEXT: v_mov_b32_e32 v56, v27 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v2 +; SI-NEXT: v_lshr_b64 v[0:1], v[36:37], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[1:2], v[39:40], 16 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v3 -; SI-NEXT: v_lshr_b64 v[3:4], v[52:53], 16 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v5 -; SI-NEXT: v_lshr_b64 v[5:6], v[54:55], 16 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v7 -; SI-NEXT: v_lshr_b64 v[7:8], v[49:50], 16 -; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v9 -; SI-NEXT: v_lshr_b64 v[9:10], v[46:47], 16 -; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v11 -; SI-NEXT: v_lshr_b64 v[11:12], v[23:24], 16 -; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v13 -; SI-NEXT: v_mov_b32_e32 v13, v60 -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[0:1], v[22:23], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[13:14], v[59:60], 16 -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v15 -; SI-NEXT: v_lshr_b64 v[15:16], v[36:37], 16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v17 -; SI-NEXT: v_lshr_b64 v[17:18], v[18:19], 16 -; SI-NEXT: v_mov_b32_e32 v18, v43 -; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v54, v24 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v25 -; SI-NEXT: v_lshr_b64 v[24:25], v[41:42], 16 -; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v33 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[23:24], 16 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[20:21], 16 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[60:61], 16 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v46, v45 -; SI-NEXT: v_mov_b32_e32 v39, v50 -; SI-NEXT: v_lshr_b64 v[22:23], v[4:5], 16 -; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16 -; SI-NEXT: v_lshr_b64 v[32:33], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v59, v58 -; SI-NEXT: v_mov_b32_e32 v36, v35 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[16:17], 16 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[14:15], 16 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[12:13], 16 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[10:11], 16 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[8:9], 16 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[6:7], 16 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[26:27], 16 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[44:45], 16 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[18:19], v[34:35], 16 -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[0:1], v[34:35], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[0:1], v[26:27], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[0:1], v[32:33], 16 +; SI-NEXT: v_lshr_b64 v[47:48], v[30:31], 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill ; SI-NEXT: .LBB105_5: ; %end -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v1 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v21 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v3 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v5 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v61 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v17 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v7 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v9 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v22 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v49 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v5 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 +; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_readlane_b32 s30, v63, 3 ; SI-NEXT: v_readlane_b32 s31, v63, 4 ; SI-NEXT: v_readlane_b32 s36, v63, 2 ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v42 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v31 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v41 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v60 +; SI-NEXT: v_or_b32_e32 v3, v3, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v9 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v25 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v6, v6, v7 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v48 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v44 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v39 +; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v37 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v10, v10, v11 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v8 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v58 +; SI-NEXT: v_or_b32_e32 v7, v7, v8 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v25 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v11, v12, v11 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v13 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v8, v8, v9 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v53 +; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v12, v12, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v54 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v10, v10, v12 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v17 +; SI-NEXT: v_or_b32_e32 v11, v11, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v55 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_or_b32_e32 v12, v12, v13 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v51 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v16 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v56 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v16, v16, v18 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v39 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v21 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_or_b32_e32 v16, v16, v17 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v49 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v20 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v55 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v46 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v20, v20, v22 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v53 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v25 +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_or_b32_e32 v20, v20, v21 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v37 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32 +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v22, v22, v24 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v40 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v29 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v43 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: v_and_b32_e32 v25, 0xffff, v59 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v29 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v25, 0xffff, v35 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v31 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v36 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v28 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v27 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_or_b32_e32 v26, v26, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v27, 0xffff, v56 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v44 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v61 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_or_b32_e32 v28, v28, v29 -; SI-NEXT: v_and_b32_e32 v29, 0xffff, v46 +; SI-NEXT: v_and_b32_e32 v29, 0xffff, v33 +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v29, v29, v30 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v30, 0xffff, v32 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v47 +; SI-NEXT: v_or_b32_e32 v30, v30, v32 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v62 ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -222183,16 +222520,9 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: v_and_b32_e32 v30, 0xffff, v38 -; SI-NEXT: v_or_b32_e32 v30, v30, v32 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33 ; SI-NEXT: v_or_b32_e32 v31, v31, v32 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -222200,19 +222530,34 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; VI-LABEL: bitcast_v64bf16_to_v64i16_scalar: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v35, s36, 0 -; VI-NEXT: v_writelane_b32 v35, s37, 1 -; VI-NEXT: v_writelane_b32 v35, s38, 2 -; VI-NEXT: v_writelane_b32 v35, s39, 3 -; VI-NEXT: v_writelane_b32 v35, s48, 4 -; VI-NEXT: v_writelane_b32 v35, s49, 5 -; VI-NEXT: v_writelane_b32 v35, s50, 6 -; VI-NEXT: v_writelane_b32 v35, s51, 7 -; VI-NEXT: v_writelane_b32 v35, s30, 8 -; VI-NEXT: v_writelane_b32 v35, s31, 9 +; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: v_writelane_b32 v63, s36, 0 +; VI-NEXT: v_writelane_b32 v63, s37, 1 +; VI-NEXT: v_writelane_b32 v63, s38, 2 +; VI-NEXT: v_writelane_b32 v63, s39, 3 +; VI-NEXT: v_writelane_b32 v63, s48, 4 +; VI-NEXT: v_writelane_b32 v63, s49, 5 +; VI-NEXT: v_writelane_b32 v63, s50, 6 +; VI-NEXT: v_writelane_b32 v63, s51, 7 +; VI-NEXT: v_writelane_b32 v63, s30, 8 +; VI-NEXT: v_writelane_b32 v63, s31, 9 ; VI-NEXT: v_readfirstlane_b32 s4, v18 ; VI-NEXT: v_readfirstlane_b32 s51, v17 ; VI-NEXT: v_readfirstlane_b32 s50, v16 @@ -222237,598 +222582,615 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB105_4 ; VI-NEXT: .LBB105_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v32, 0x40c00000 -; VI-NEXT: s_lshl_b32 s4, s48, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 +; VI-NEXT: s_lshl_b32 s4, s36, 16 +; VI-NEXT: v_mov_b32_e32 v10, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 +; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v16, v1, v2, vcc +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v52, v1, v2, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 ; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: s_lshl_b32 s5, s28, 16 -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v0 -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: s_lshl_b32 s4, s37, 16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e32 v0, s4, v10 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: s_and_b32 s5, s28, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s5, v32 -; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s5, s30, 16 -; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s5, v32 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s5, s30, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s5, v32 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: s_and_b32 s5, s26, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: s_lshl_b32 s4, s26, 16 -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[2:3] ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: s_lshl_b32 s4, s38, 16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s24, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v53, v1, v2, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: s_lshl_b32 s4, s24, 16 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: s_lshl_b32 s4, s39, 16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s22, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v50, v1, v2, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: s_lshl_b32 s4, s22, 16 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s40, 16 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v51, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s20, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v48, v1, v2, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: s_lshl_b32 s4, s20, 16 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: s_lshl_b32 s4, s41, 16 +; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s18, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v20, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s42, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v49, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v21, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s43, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v39, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v22, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s44, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v54, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v23, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s45, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v55, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v24, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s46, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v40, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v25, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s47, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v41, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v26, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s48, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v42, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s48, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v27, v1, v2, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s49, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v43, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v28, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s50, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v44, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s50, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v29, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s51, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v45, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v30, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s16, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v31, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v16, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s17, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v46, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v33, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 ; VI-NEXT: s_lshl_b32 s4, s18, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v34, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 -; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v17, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s19, 16 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v47, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s20, 16 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s16, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v32 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v18, v1, v3, vcc ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: s_lshl_b32 s4, s16, 16 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc -; VI-NEXT: v_bfe_u32 v3, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v0 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v19, v1, v4, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v4, v1, v4, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s22, 16 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s17, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v1, s5, v32 -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: s_lshl_b32 s4, s17, 16 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v32 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: s_and_b32 s5, s19, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s5, v32 -; VI-NEXT: v_cndmask_b32_e32 v18, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: s_lshl_b32 s4, s19, 16 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc -; VI-NEXT: v_add_f32_e32 v5, s4, v32 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: s_and_b32 s5, s21, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s5, v32 -; VI-NEXT: v_mov_b32_e32 v1, v18 -; VI-NEXT: v_cndmask_b32_e32 v18, v7, v9, vcc -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: s_lshl_b32 s4, s21, 16 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc -; VI-NEXT: v_add_f32_e32 v7, s4, v32 -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v3 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: s_and_b32 s5, s23, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s5, v32 -; VI-NEXT: v_mov_b32_e32 v3, v18 -; VI-NEXT: v_cndmask_b32_e32 v18, v9, v11, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v58, v1, v5, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v5, v1, v5, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 ; VI-NEXT: s_lshl_b32 s4, s23, 16 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_cndmask_b32_e32 v7, v9, v11, vcc -; VI-NEXT: v_add_f32_e32 v9, s4, v32 -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v5 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_and_b32 s5, s25, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s5, v32 -; VI-NEXT: v_mov_b32_e32 v5, v18 -; VI-NEXT: v_cndmask_b32_e32 v18, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 +; VI-NEXT: v_or_b32_e32 v6, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v59, v1, v6, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v6, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v6, v1, v6, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s24, 16 +; VI-NEXT: v_or_b32_e32 v7, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v60, v1, v7, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s24, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v7, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v7, v1, v7, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 ; VI-NEXT: s_lshl_b32 s4, s25, 16 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc -; VI-NEXT: v_add_f32_e32 v11, s4, v32 -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v7 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: s_and_b32 s5, s27, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s5, v32 -; VI-NEXT: v_mov_b32_e32 v7, v18 -; VI-NEXT: v_cndmask_b32_e32 v18, v13, v15, vcc -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 +; VI-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v61, v1, v8, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s25, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v8, v1, v8, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_lshl_b32 s4, s26, 16 +; VI-NEXT: v_or_b32_e32 v9, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v62, v1, v9, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: s_and_b32 s4, s26, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v9, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v9, v1, v9, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 ; VI-NEXT: s_lshl_b32 s4, s27, 16 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 +; VI-NEXT: v_or_b32_e32 v11, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v32, v1, v11, vcc +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v11, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: s_and_b32 s4, s27, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v11, vcc +; VI-NEXT: v_add_f32_e32 v1, s4, v10 +; VI-NEXT: v_bfe_u32 v11, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v1 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 +; VI-NEXT: v_or_b32_e32 v12, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_lshl_b32 s4, s28, 16 +; VI-NEXT: v_cndmask_b32_e32 v1, v11, v12, vcc +; VI-NEXT: v_add_f32_e32 v11, s4, v10 +; VI-NEXT: v_bfe_u32 v12, v11, 16, 1 +; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_cndmask_b32_e32 v11, v13, v15, vcc -; VI-NEXT: v_add_f32_e32 v13, s4, v32 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v9 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: s_and_b32 s5, s29, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v9, v18 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s5, v32 -; VI-NEXT: v_cndmask_b32_e32 v18, v15, v18, vcc -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v11 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 +; VI-NEXT: s_and_b32 s4, s28, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v11, v12, v13, vcc +; VI-NEXT: v_add_f32_e32 v12, s4, v10 +; VI-NEXT: v_bfe_u32 v13, v12, 16, 1 +; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v12 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 ; VI-NEXT: s_lshl_b32 s4, s29, 16 -; VI-NEXT: v_mov_b32_e32 v11, v18 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13 +; VI-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; VI-NEXT: v_add_f32_e32 v12, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v38, v13, v14, vcc +; VI-NEXT: v_bfe_u32 v13, v12, 16, 1 +; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v12 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 +; VI-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v12, v13, v14, vcc +; VI-NEXT: v_add_f32_e32 v13, s4, v10 +; VI-NEXT: v_bfe_u32 v14, v13, 16, 1 +; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v13 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x7fff, v14 +; VI-NEXT: s_lshl_b32 s4, s30, 16 +; VI-NEXT: v_or_b32_e32 v15, 0x400000, v13 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v18, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v32 -; VI-NEXT: v_bfe_u32 v18, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v15 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_cndmask_b32_e32 v18, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v13 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: s_and_b32 s5, s31, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v15, s5, v32 -; VI-NEXT: v_mov_b32_e32 v13, v18 -; VI-NEXT: v_bfe_u32 v18, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v15 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 +; VI-NEXT: v_add_f32_e32 v13, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v37, v14, v15, vcc +; VI-NEXT: v_bfe_u32 v14, v13, 16, 1 +; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v13 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x7fff, v14 +; VI-NEXT: v_or_b32_e32 v15, 0x400000, v13 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 +; VI-NEXT: s_and_b32 s4, s30, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v13, v14, v15, vcc +; VI-NEXT: v_add_f32_e32 v14, s4, v10 +; VI-NEXT: v_bfe_u32 v15, v14, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v14 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 ; VI-NEXT: s_lshl_b32 s4, s31, 16 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_cndmask_b32_e32 v15, v18, v19, vcc -; VI-NEXT: v_add_f32_e32 v18, s4, v32 -; VI-NEXT: v_bfe_u32 v19, v18, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v18 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; VI-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v15 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] -; VI-NEXT: s_and_b32 s5, s50, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v15, v18 -; VI-NEXT: v_add_f32_e32 v18, s5, v32 -; VI-NEXT: v_bfe_u32 v19, v18, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v18 -; VI-NEXT: s_lshl_b32 s4, s50, 16 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; VI-NEXT: v_add_f32_e32 v18, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v19, v19, v20, vcc -; VI-NEXT: v_bfe_u32 v20, v18, 16, 1 -; VI-NEXT: v_add_u32_e32 v20, vcc, v20, v18 -; VI-NEXT: s_and_b32 s4, s46, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v20, vcc, 0x7fff, v20 -; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v18 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v18, v20, v21, vcc -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s46, 16 -; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[18:19] -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_bfe_u32 v18, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_and_b32 s4, s44, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s44, 16 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_bfe_u32 v18, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_and_b32 s4, s42, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s42, 16 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_bfe_u32 v18, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_and_b32 s4, s40, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s40, 16 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_bfe_u32 v18, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_and_b32 s4, s38, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s38, 16 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_bfe_u32 v18, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v16 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v18, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: s_and_b32 s4, s36, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[16:17] -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_bfe_u32 v17, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_lshl_b32 s4, s36, 16 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_add_f32_e32 v16, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v19, vcc -; VI-NEXT: v_bfe_u32 v19, v16, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v16 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v16 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; VI-NEXT: v_cndmask_b32_e32 v16, v19, v21, vcc -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[16:17] -; VI-NEXT: s_and_b32 s4, s37, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v17, s4, v32 -; VI-NEXT: v_bfe_u32 v19, v17, 16, 1 -; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v17 -; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19 -; VI-NEXT: v_or_b32_e32 v21, 0x400000, v17 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; VI-NEXT: s_lshl_b32 s4, s37, 16 -; VI-NEXT: v_cndmask_b32_e32 v17, v19, v21, vcc -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: s_and_b32 s4, s39, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: v_add_f32_e32 v19, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v21, v23, vcc -; VI-NEXT: v_bfe_u32 v21, v19, 16, 1 -; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v19 -; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21 -; VI-NEXT: v_or_b32_e32 v23, 0x400000, v19 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 -; VI-NEXT: s_lshl_b32 s4, s39, 16 -; VI-NEXT: v_cndmask_b32_e32 v19, v21, v23, vcc -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v17 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: s_and_b32 s4, s41, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: v_add_f32_e32 v21, s4, v32 -; VI-NEXT: v_mov_b32_e32 v17, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v23, v25, vcc -; VI-NEXT: v_bfe_u32 v23, v21, 16, 1 -; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v21 -; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23 -; VI-NEXT: v_or_b32_e32 v25, 0x400000, v21 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 -; VI-NEXT: s_lshl_b32 s4, s41, 16 -; VI-NEXT: v_cndmask_b32_e32 v21, v23, v25, vcc -; VI-NEXT: v_add_f32_e32 v23, s4, v32 -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v19 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: s_and_b32 s4, s43, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: v_add_f32_e32 v23, s4, v32 +; VI-NEXT: v_or_b32_e32 v35, 0x400000, v14 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; VI-NEXT: v_add_f32_e32 v14, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v56, v15, v35, vcc +; VI-NEXT: v_bfe_u32 v15, v14, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v14 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 +; VI-NEXT: s_and_b32 s4, s31, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v35, 0x400000, v14 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; VI-NEXT: v_add_f32_e32 v10, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v14, v15, v35, vcc +; VI-NEXT: v_bfe_u32 v15, v10, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v10 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 +; VI-NEXT: v_or_b32_e32 v35, 0x400000, v10 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; VI-NEXT: v_cndmask_b32_e32 v10, v15, v35, vcc +; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v10 +; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[14:15] +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v56 +; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[13:14] +; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v37 +; VI-NEXT: v_lshrrev_b64 v[36:37], 16, v[12:13] +; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v38 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v32 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[11:12] +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[9:10] +; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v62 +; VI-NEXT: v_lshrrev_b64 v[56:57], 16, v[8:9] +; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v61 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[7:8] +; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v60 +; VI-NEXT: v_lshrrev_b64 v[60:61], 16, v[6:7] +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v59 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[5:6] +; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v58 +; VI-NEXT: v_lshrrev_b64 v[57:58], 16, v[4:5] +; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v19 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[3:4] +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v18 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v47 +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_lshrrev_b64 v[58:59], 16, v[2:3] +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[17:18] +; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v46 +; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[0:1] +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[16:17] +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 +; VI-NEXT: v_lshrrev_b64 v[46:47], 16, v[30:31] +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v45 +; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[29:30] +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v44 +; VI-NEXT: v_lshrrev_b64 v[44:45], 16, v[28:29] +; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v43 +; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[27:28] +; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v42 +; VI-NEXT: v_lshrrev_b64 v[42:43], 16, v[26:27] +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v41 +; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[25:26] +; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v40 +; VI-NEXT: v_lshrrev_b64 v[40:41], 16, v[24:25] +; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v55 +; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[23:24] +; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v54 +; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[22:23] +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v39 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[21:22] +; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v49 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v34 +; VI-NEXT: v_lshrrev_b64 v[61:62], 16, v[33:34] +; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[20:21] +; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v51 +; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[50:51] +; VI-NEXT: v_mov_b32_e32 v3, v58 +; VI-NEXT: v_mov_b32_e32 v5, v57 +; VI-NEXT: v_mov_b32_e32 v7, v60 +; VI-NEXT: v_mov_b32_e32 v9, v56 +; VI-NEXT: v_mov_b32_e32 v11, v37 +; VI-NEXT: v_mov_b32_e32 v13, v36 +; VI-NEXT: v_mov_b32_e32 v23, v31 +; VI-NEXT: v_mov_b32_e32 v25, v40 +; VI-NEXT: v_mov_b32_e32 v27, v42 +; VI-NEXT: v_mov_b32_e32 v29, v44 +; VI-NEXT: v_mov_b32_e32 v31, v46 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[48:49] +; VI-NEXT: v_mov_b32_e32 v21, v32 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v1 +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[53:54] ; VI-NEXT: v_mov_b32_e32 v19, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v25, v27, vcc -; VI-NEXT: v_bfe_u32 v25, v23, 16, 1 -; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25 -; VI-NEXT: v_or_b32_e32 v27, 0x400000, v23 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 -; VI-NEXT: s_lshl_b32 s4, s43, 16 -; VI-NEXT: v_cndmask_b32_e32 v23, v25, v27, vcc -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: s_and_b32 s4, s45, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: v_add_f32_e32 v25, s4, v32 -; VI-NEXT: v_mov_b32_e32 v21, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v27, v29, vcc -; VI-NEXT: v_bfe_u32 v27, v25, 16, 1 -; VI-NEXT: v_add_u32_e32 v27, vcc, v27, v25 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x7fff, v27 -; VI-NEXT: v_or_b32_e32 v29, 0x400000, v25 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 -; VI-NEXT: s_lshl_b32 s4, s45, 16 -; VI-NEXT: v_cndmask_b32_e32 v25, v27, v29, vcc -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v23 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: s_and_b32 s4, s47, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: v_add_f32_e32 v27, s4, v32 -; VI-NEXT: v_mov_b32_e32 v23, v33 -; VI-NEXT: v_cndmask_b32_e32 v33, v29, v31, vcc -; VI-NEXT: v_bfe_u32 v29, v27, 16, 1 -; VI-NEXT: v_add_u32_e32 v29, vcc, v29, v27 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x7fff, v29 -; VI-NEXT: v_or_b32_e32 v31, 0x400000, v27 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 -; VI-NEXT: s_lshl_b32 s4, s47, 16 -; VI-NEXT: v_cndmask_b32_e32 v27, v29, v31, vcc -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v25 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: s_and_b32 s4, s49, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v25, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: v_add_f32_e32 v29, s4, v32 -; VI-NEXT: v_cndmask_b32_e32 v33, v31, v33, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v27 -; VI-NEXT: v_bfe_u32 v31, v29, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: v_add_u32_e32 v31, vcc, v31, v29 -; VI-NEXT: v_add_u32_e32 v31, vcc, 0x7fff, v31 -; VI-NEXT: v_mov_b32_e32 v27, v33 -; VI-NEXT: v_or_b32_e32 v33, 0x400000, v29 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v29, v29 -; VI-NEXT: s_lshl_b32 s4, s49, 16 -; VI-NEXT: v_cndmask_b32_e32 v29, v31, v33, vcc -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v29 -; VI-NEXT: v_lshrrev_b64 v[33:34], 16, v[33:34] -; VI-NEXT: s_and_b32 s4, s51, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_mov_b32_e32 v29, v33 -; VI-NEXT: v_bfe_u32 v33, v31, 16, 1 -; VI-NEXT: v_add_u32_e32 v33, vcc, v33, v31 -; VI-NEXT: v_add_u32_e32 v33, vcc, 0x7fff, v33 -; VI-NEXT: s_lshl_b32 s4, s51, 16 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_add_f32_e32 v31, s4, v32 -; VI-NEXT: v_bfe_u32 v32, v31, 16, 1 -; VI-NEXT: v_cndmask_b32_e32 v33, v33, v34, vcc -; VI-NEXT: v_add_u32_e32 v32, vcc, v32, v31 -; VI-NEXT: v_add_u32_e32 v32, vcc, 0x7fff, v32 -; VI-NEXT: v_or_b32_e32 v34, 0x400000, v31 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v31, v31 -; VI-NEXT: v_cndmask_b32_e32 v31, v32, v34, vcc -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v33 -; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[31:32] +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[15:16] +; VI-NEXT: v_mov_b32_e32 v15, v35 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v1 +; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[52:53] +; VI-NEXT: v_mov_b32_e32 v1, v61 +; VI-NEXT: v_mov_b32_e32 v17, v38 ; VI-NEXT: s_branch .LBB105_5 ; VI-NEXT: .LBB105_3: ; VI-NEXT: s_branch .LBB105_2 @@ -222866,18 +223228,33 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; VI-NEXT: v_mov_b32_e32 v30, s50 ; VI-NEXT: v_mov_b32_e32 v31, s51 ; VI-NEXT: .LBB105_5: ; %end -; VI-NEXT: v_readlane_b32 s30, v35, 8 -; VI-NEXT: v_readlane_b32 s31, v35, 9 -; VI-NEXT: v_readlane_b32 s51, v35, 7 -; VI-NEXT: v_readlane_b32 s50, v35, 6 -; VI-NEXT: v_readlane_b32 s49, v35, 5 -; VI-NEXT: v_readlane_b32 s48, v35, 4 -; VI-NEXT: v_readlane_b32 s39, v35, 3 -; VI-NEXT: v_readlane_b32 s38, v35, 2 -; VI-NEXT: v_readlane_b32 s37, v35, 1 -; VI-NEXT: v_readlane_b32 s36, v35, 0 -; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; VI-NEXT: v_readlane_b32 s30, v63, 8 +; VI-NEXT: v_readlane_b32 s31, v63, 9 +; VI-NEXT: v_readlane_b32 s51, v63, 7 +; VI-NEXT: v_readlane_b32 s50, v63, 6 +; VI-NEXT: v_readlane_b32 s49, v63, 5 +; VI-NEXT: v_readlane_b32 s48, v63, 4 +; VI-NEXT: v_readlane_b32 s39, v63, 3 +; VI-NEXT: v_readlane_b32 s38, v63, 2 +; VI-NEXT: v_readlane_b32 s37, v63, 1 +; VI-NEXT: v_readlane_b32 s36, v63, 0 +; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 +; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -222885,19 +223262,34 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; GFX9-LABEL: bitcast_v64bf16_to_v64i16_scalar: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v36, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v36, s36, 0 -; GFX9-NEXT: v_writelane_b32 v36, s37, 1 -; GFX9-NEXT: v_writelane_b32 v36, s38, 2 -; GFX9-NEXT: v_writelane_b32 v36, s39, 3 -; GFX9-NEXT: v_writelane_b32 v36, s48, 4 -; GFX9-NEXT: v_writelane_b32 v36, s49, 5 -; GFX9-NEXT: v_writelane_b32 v36, s50, 6 -; GFX9-NEXT: v_writelane_b32 v36, s51, 7 -; GFX9-NEXT: v_writelane_b32 v36, s30, 8 -; GFX9-NEXT: v_writelane_b32 v36, s31, 9 +; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX9-NEXT: v_writelane_b32 v63, s36, 0 +; GFX9-NEXT: v_writelane_b32 v63, s37, 1 +; GFX9-NEXT: v_writelane_b32 v63, s38, 2 +; GFX9-NEXT: v_writelane_b32 v63, s39, 3 +; GFX9-NEXT: v_writelane_b32 v63, s48, 4 +; GFX9-NEXT: v_writelane_b32 v63, s49, 5 +; GFX9-NEXT: v_writelane_b32 v63, s50, 6 +; GFX9-NEXT: v_writelane_b32 v63, s51, 7 +; GFX9-NEXT: v_writelane_b32 v63, s30, 8 +; GFX9-NEXT: v_writelane_b32 v63, s31, 9 ; GFX9-NEXT: v_readfirstlane_b32 s4, v18 ; GFX9-NEXT: v_readfirstlane_b32 s51, v17 ; GFX9-NEXT: v_readfirstlane_b32 s50, v16 @@ -222922,584 +223314,592 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: s_cbranch_execnz .LBB105_4 ; GFX9-NEXT: .LBB105_2: ; %cmp.true +; GFX9-NEXT: s_and_b32 s4, s36, 0xffff0000 ; GFX9-NEXT: v_mov_b32_e32 v16, 0x40c00000 -; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: s_and_b32 s5, s30, 0xffff0000 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: v_add_f32_e32 v0, s5, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v1, v2, vcc -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s5, s30, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; GFX9-NEXT: v_add_f32_e32 v1, s5, v16 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s36, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_and_b32 s5, s31, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s5, v16 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_lshl_b32 s5, s31, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s5, v16 -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 -; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: v_mov_b32_e32 v32, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: v_and_or_b32 v14, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_and_or_b32 v15, v2, v32, v3 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s29, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s37, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s28, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v13, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s28, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s37, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s27, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v12, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s27, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s38, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s26, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v11, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s26, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v33, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s38, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s25, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v10, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s25, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v32, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s39, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s24, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v9, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s24, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v34, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s39, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v8, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s23, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v19, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s40, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v7, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s22, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v35, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s40, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v6, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s21, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v20, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s41, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v5, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s20, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v36, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s41, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v4, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s19, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v21, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s42, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v3, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s18, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v37, v2, v3, vcc ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s42, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v1 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v18, vcc -; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v2, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 -; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 -; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s17, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v18, vcc ; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v1 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v22, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s43, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v18, v19, vcc -; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v1, v0, v32, v1 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v0 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: s_lshl_b32 s4, s16, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v38, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s43, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v23, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s44, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v39, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s44, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v24, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s45, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v48, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s45, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v25, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s46, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v49, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s46, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v26, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s47, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v50, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s47, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v27, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s48, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v51, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s48, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v28, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v52, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s49, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v29, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s50, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v53, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 ; GFX9-NEXT: s_lshl_b32 s4, s50, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: v_and_or_b32 v0, v0, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v30, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 ; GFX9-NEXT: s_and_b32 s4, s51, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_add_f32_e32 v19, s4, v16 -; GFX9-NEXT: v_bfe_u32 v20, v19, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v20, v20, v19 -; GFX9-NEXT: v_add_u32_e32 v20, 0x7fff, v20 -; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v19 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v19, v19 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v54, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 ; GFX9-NEXT: s_lshl_b32 s4, s51, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v19, v20, v21, vcc -; GFX9-NEXT: v_add_f32_e32 v20, s4, v16 -; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v21, v21, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s49, 0xffff0000 -; GFX9-NEXT: v_add_u32_e32 v21, 0x7fff, v21 -; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 -; GFX9-NEXT: v_and_or_b32 v30, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v20, v21, v22, vcc -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v20 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_and_or_b32 v31, v19, v32, v20 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s49, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s48, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v29, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s48, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s47, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v28, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s47, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s46, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v27, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s46, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s45, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v26, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s45, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s44, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v25, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s44, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s43, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v24, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s43, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s42, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v23, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s42, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s41, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v22, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s41, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s40, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v21, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s40, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s39, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v20, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s39, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v19, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v19, v19, v18 -; GFX9-NEXT: v_add_u32_e32 v19, 0x7fff, v19 -; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v19, v33, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s38, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v19, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s38, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v33, vcc -; GFX9-NEXT: v_add_f32_e32 v18, s4, v16 -; GFX9-NEXT: v_bfe_u32 v33, v18, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v33, v33, v18 -; GFX9-NEXT: v_add_u32_e32 v33, 0x7fff, v33 -; GFX9-NEXT: v_or_b32_e32 v34, 0x400000, v18 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v18, v18 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v33, v34, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v18 -; GFX9-NEXT: s_and_b32 s4, s37, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v18, v17, v32, v18 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v16 -; GFX9-NEXT: v_bfe_u32 v33, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v33, v33, v17 -; GFX9-NEXT: v_add_u32_e32 v33, 0x7fff, v33 -; GFX9-NEXT: v_or_b32_e32 v34, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: s_lshl_b32 s4, s37, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v33, v34, vcc -; GFX9-NEXT: v_add_f32_e32 v33, s4, v16 -; GFX9-NEXT: v_bfe_u32 v34, v33, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v34, v34, v33 -; GFX9-NEXT: v_add_u32_e32 v34, 0x7fff, v34 -; GFX9-NEXT: v_or_b32_e32 v35, 0x400000, v33 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v33, v33 -; GFX9-NEXT: v_cndmask_b32_e32 v33, v34, v35, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v33 -; GFX9-NEXT: s_and_b32 s4, s36, 0xffff0000 -; GFX9-NEXT: v_and_or_b32 v17, v17, v32, v33 -; GFX9-NEXT: v_add_f32_e32 v33, s4, v16 -; GFX9-NEXT: v_bfe_u32 v34, v33, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v34, v34, v33 -; GFX9-NEXT: s_lshl_b32 s4, s36, 16 -; GFX9-NEXT: v_add_u32_e32 v34, 0x7fff, v34 -; GFX9-NEXT: v_or_b32_e32 v35, 0x400000, v33 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v33, v33 -; GFX9-NEXT: v_add_f32_e32 v16, s4, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v33, v34, v35, vcc -; GFX9-NEXT: v_bfe_u32 v34, v16, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v34, v34, v16 -; GFX9-NEXT: v_add_u32_e32 v34, 0x7fff, v34 -; GFX9-NEXT: v_or_b32_e32 v35, 0x400000, v16 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v16, v34, v35, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: v_and_or_b32 v16, v33, v32, v16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v31, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v55, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_lshl_b32 s4, s16, 16 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v40, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v41, v2, v3, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: s_lshl_b32 s4, s17, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v18, v2, v3, vcc +; GFX9-NEXT: v_add_f32_e32 v2, s4, v16 +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: v_add_f32_e32 v2, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v42, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: s_lshl_b32 s4, s18, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v17, v3, v4, vcc +; GFX9-NEXT: v_add_f32_e32 v3, s4, v16 +; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_add_f32_e32 v3, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v43, v4, v5, vcc +; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: s_lshl_b32 s4, s19, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; GFX9-NEXT: v_add_f32_e32 v4, s4, v16 +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 +; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v44, v5, v6, vcc +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 +; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: s_lshl_b32 s4, s20, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc +; GFX9-NEXT: v_add_f32_e32 v5, s4, v16 +; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 +; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 +; GFX9-NEXT: v_add_f32_e32 v5, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v45, v6, v7, vcc +; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 +; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 +; GFX9-NEXT: s_lshl_b32 s4, s21, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc +; GFX9-NEXT: v_add_f32_e32 v6, s4, v16 +; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 +; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: v_add_f32_e32 v6, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v46, v7, v8, vcc +; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: s_lshl_b32 s4, s22, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc +; GFX9-NEXT: v_add_f32_e32 v7, s4, v16 +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 +; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 +; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: v_add_f32_e32 v7, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v47, v8, v9, vcc +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 +; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 +; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: s_lshl_b32 s4, s23, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_f32_e32 v8, s4, v16 +; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v9, v9, v8 +; GFX9-NEXT: s_and_b32 s4, s24, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9 +; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v8 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; GFX9-NEXT: v_add_f32_e32 v8, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v56, v9, v10, vcc +; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v9, v9, v8 +; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9 +; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v8 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; GFX9-NEXT: s_lshl_b32 s4, s24, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v8, v9, v10, vcc +; GFX9-NEXT: v_add_f32_e32 v9, s4, v16 +; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v10, v10, v9 +; GFX9-NEXT: s_and_b32 s4, s25, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10 +; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 +; GFX9-NEXT: v_add_f32_e32 v9, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v57, v10, v11, vcc +; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v10, v10, v9 +; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10 +; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 +; GFX9-NEXT: s_lshl_b32 s4, s25, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc +; GFX9-NEXT: v_add_f32_e32 v10, s4, v16 +; GFX9-NEXT: v_bfe_u32 v11, v10, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v11, v11, v10 +; GFX9-NEXT: s_and_b32 s4, s26, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11 +; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v10 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; GFX9-NEXT: v_add_f32_e32 v10, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v58, v11, v12, vcc +; GFX9-NEXT: v_bfe_u32 v11, v10, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v11, v11, v10 +; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11 +; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v10 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; GFX9-NEXT: s_lshl_b32 s4, s26, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v10, v11, v12, vcc +; GFX9-NEXT: v_add_f32_e32 v11, s4, v16 +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v12, v12, v11 +; GFX9-NEXT: s_and_b32 s4, s27, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 +; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: v_add_f32_e32 v11, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v59, v12, v13, vcc +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v12, v12, v11 +; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 +; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: s_lshl_b32 s4, s27, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v11, v12, v13, vcc +; GFX9-NEXT: v_add_f32_e32 v12, s4, v16 +; GFX9-NEXT: v_bfe_u32 v13, v12, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v13, v13, v12 +; GFX9-NEXT: s_and_b32 s4, s28, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 +; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; GFX9-NEXT: v_add_f32_e32 v12, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v60, v13, v14, vcc +; GFX9-NEXT: v_bfe_u32 v13, v12, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v13, v13, v12 +; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 +; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; GFX9-NEXT: s_lshl_b32 s4, s28, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v12, v13, v14, vcc +; GFX9-NEXT: v_add_f32_e32 v13, s4, v16 +; GFX9-NEXT: v_bfe_u32 v14, v13, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v14, v14, v13 +; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 +; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v13 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 +; GFX9-NEXT: v_add_f32_e32 v13, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v61, v14, v15, vcc +; GFX9-NEXT: v_bfe_u32 v14, v13, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v14, v14, v13 +; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 +; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v13 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 +; GFX9-NEXT: s_lshl_b32 s4, s29, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v13, v14, v15, vcc +; GFX9-NEXT: v_add_f32_e32 v14, s4, v16 +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v62, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_add_f32_e32 v14, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v62, v15, v62, vcc +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: s_lshl_b32 s4, s30, 16 +; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v0, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_add_f32_e32 v14, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v15, v0, vcc +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: s_and_b32 s4, s31, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v0, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_add_f32_e32 v14, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v15, v0, vcc +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: s_lshl_b32 s4, s31, 16 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v0, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_add_f32_e32 v14, s4, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v15, v0, vcc +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_cndmask_b32_e32 v14, v15, v16, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v14 +; GFX9-NEXT: v_mov_b32_e32 v16, 0xffff0000 +; GFX9-NEXT: v_and_or_b32 v15, v0, v16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v1 +; GFX9-NEXT: v_and_or_b32 v14, v2, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v62 +; GFX9-NEXT: v_and_or_b32 v13, v13, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v61 +; GFX9-NEXT: v_and_or_b32 v12, v12, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v60 +; GFX9-NEXT: v_and_or_b32 v11, v11, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v59 +; GFX9-NEXT: v_and_or_b32 v10, v10, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v58 +; GFX9-NEXT: v_and_or_b32 v9, v9, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v57 +; GFX9-NEXT: v_and_or_b32 v8, v8, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v56 +; GFX9-NEXT: v_and_or_b32 v7, v7, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v47 +; GFX9-NEXT: v_and_or_b32 v6, v6, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v46 +; GFX9-NEXT: v_and_or_b32 v5, v5, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v45 +; GFX9-NEXT: v_and_or_b32 v4, v4, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44 +; GFX9-NEXT: v_and_or_b32 v3, v3, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v43 +; GFX9-NEXT: v_and_or_b32 v2, v17, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v55 +; GFX9-NEXT: v_and_or_b32 v31, v31, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v54 +; GFX9-NEXT: v_and_or_b32 v30, v30, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v53 +; GFX9-NEXT: v_and_or_b32 v29, v29, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v52 +; GFX9-NEXT: v_and_or_b32 v28, v28, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v51 +; GFX9-NEXT: v_and_or_b32 v27, v27, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v50 +; GFX9-NEXT: v_and_or_b32 v26, v26, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v49 +; GFX9-NEXT: v_and_or_b32 v25, v25, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v48 +; GFX9-NEXT: v_and_or_b32 v24, v24, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v39 +; GFX9-NEXT: v_and_or_b32 v23, v23, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v38 +; GFX9-NEXT: v_and_or_b32 v22, v22, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v37 +; GFX9-NEXT: v_and_or_b32 v21, v21, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v36 +; GFX9-NEXT: v_and_or_b32 v20, v20, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v42 +; GFX9-NEXT: v_and_or_b32 v19, v19, v16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v34 +; GFX9-NEXT: v_and_or_b32 v1, v18, v16, v0 +; GFX9-NEXT: v_and_or_b32 v18, v32, v16, v17 +; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v33 +; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v41 +; GFX9-NEXT: v_and_or_b32 v0, v40, v16, v0 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_and_or_b32 v17, v32, v16, v17 +; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v32 +; GFX9-NEXT: v_and_or_b32 v16, v33, v16, v32 ; GFX9-NEXT: s_branch .LBB105_5 ; GFX9-NEXT: .LBB105_3: ; GFX9-NEXT: s_branch .LBB105_2 @@ -223537,18 +223937,33 @@ define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v30, s50 ; GFX9-NEXT: v_mov_b32_e32 v31, s51 ; GFX9-NEXT: .LBB105_5: ; %end -; GFX9-NEXT: v_readlane_b32 s30, v36, 8 -; GFX9-NEXT: v_readlane_b32 s31, v36, 9 -; GFX9-NEXT: v_readlane_b32 s51, v36, 7 -; GFX9-NEXT: v_readlane_b32 s50, v36, 6 -; GFX9-NEXT: v_readlane_b32 s49, v36, 5 -; GFX9-NEXT: v_readlane_b32 s48, v36, 4 -; GFX9-NEXT: v_readlane_b32 s39, v36, 3 -; GFX9-NEXT: v_readlane_b32 s38, v36, 2 -; GFX9-NEXT: v_readlane_b32 s37, v36, 1 -; GFX9-NEXT: v_readlane_b32 s36, v36, 0 -; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v36, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; GFX9-NEXT: v_readlane_b32 s30, v63, 8 +; GFX9-NEXT: v_readlane_b32 s31, v63, 9 +; GFX9-NEXT: v_readlane_b32 s51, v63, 7 +; GFX9-NEXT: v_readlane_b32 s50, v63, 6 +; GFX9-NEXT: v_readlane_b32 s49, v63, 5 +; GFX9-NEXT: v_readlane_b32 s48, v63, 4 +; GFX9-NEXT: v_readlane_b32 s39, v63, 3 +; GFX9-NEXT: v_readlane_b32 s38, v63, 2 +; GFX9-NEXT: v_readlane_b32 s37, v63, 1 +; GFX9-NEXT: v_readlane_b32 s36, v63, 0 +; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -225995,14 +226410,14 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a ; SI-NEXT: s_lshl_b32 s96, s35, 16 ; SI-NEXT: s_lshl_b32 s71, s9, 16 ; SI-NEXT: s_lshl_b32 s86, s36, 16 -; SI-NEXT: s_lshl_b32 s80, s11, 16 +; SI-NEXT: s_lshl_b32 s69, s11, 16 ; SI-NEXT: s_lshl_b32 s84, s10, 16 -; SI-NEXT: s_lshl_b32 s67, s13, 16 +; SI-NEXT: s_lshl_b32 s70, s13, 16 ; SI-NEXT: s_lshl_b32 s82, s12, 16 ; SI-NEXT: s_lshl_b32 s65, s15, 16 -; SI-NEXT: s_lshl_b32 s69, s14, 16 +; SI-NEXT: s_lshl_b32 s80, s14, 16 ; SI-NEXT: s_lshl_b32 s55, s41, 16 -; SI-NEXT: s_lshl_b32 s70, s40, 16 +; SI-NEXT: s_lshl_b32 s67, s40, 16 ; SI-NEXT: s_lshl_b32 s53, s43, 16 ; SI-NEXT: s_lshl_b32 s68, s42, 16 ; SI-NEXT: s_lshl_b32 s51, s45, 16 @@ -226030,14 +226445,12 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a ; SI-NEXT: s_mov_b64 s[4:5], 0 ; SI-NEXT: s_branch .LBB107_3 ; SI-NEXT: .LBB107_2: -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: s_mov_b64 s[4:5], -1 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr99 ; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr87 +; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr85 ; SI-NEXT: ; implicit-def: $sgpr98 ; SI-NEXT: ; implicit-def: $sgpr83 @@ -226046,14 +226459,14 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a ; SI-NEXT: ; implicit-def: $sgpr96 ; SI-NEXT: ; implicit-def: $sgpr71 ; SI-NEXT: ; implicit-def: $sgpr86 -; SI-NEXT: ; implicit-def: $sgpr80 +; SI-NEXT: ; implicit-def: $sgpr69 ; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: ; implicit-def: $sgpr67 +; SI-NEXT: ; implicit-def: $sgpr70 ; SI-NEXT: ; implicit-def: $sgpr82 ; SI-NEXT: ; implicit-def: $sgpr65 -; SI-NEXT: ; implicit-def: $sgpr69 +; SI-NEXT: ; implicit-def: $sgpr80 ; SI-NEXT: ; implicit-def: $sgpr55 -; SI-NEXT: ; implicit-def: $sgpr70 +; SI-NEXT: ; implicit-def: $sgpr67 ; SI-NEXT: ; implicit-def: $sgpr53 ; SI-NEXT: ; implicit-def: $sgpr68 ; SI-NEXT: ; implicit-def: $sgpr51 @@ -226078,43 +226491,45 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a ; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: ; implicit-def: $sgpr90 ; SI-NEXT: ; implicit-def: $sgpr91 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; kill: killed $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; kill: killed $sgpr4 +; SI-NEXT: s_mov_b64 s[4:5], -1 ; SI-NEXT: .LBB107_3: ; %Flow ; SI-NEXT: s_andn2_b64 vcc, exec, s[4:5] ; SI-NEXT: s_mov_b32 s4, s90 @@ -226139,10 +226554,9 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a ; SI-NEXT: s_mov_b32 s54, s64 ; SI-NEXT: s_mov_b32 s55, s65 ; SI-NEXT: s_mov_b32 s64, s66 -; SI-NEXT: s_mov_b32 s65, s67 +; SI-NEXT: s_mov_b32 s65, s70 ; SI-NEXT: s_mov_b32 s66, s68 -; SI-NEXT: s_mov_b32 s67, s80 -; SI-NEXT: s_mov_b32 s68, s70 +; SI-NEXT: s_mov_b32 s68, s80 ; SI-NEXT: s_mov_b32 s70, s82 ; SI-NEXT: s_mov_b32 s80, s6 ; SI-NEXT: s_mov_b32 s82, s8 @@ -226376,12 +226790,12 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a ; SI-NEXT: s_and_b32 s86, s8, 0xffff0000 ; SI-NEXT: s_lshl_b32 s71, s8, 16 ; SI-NEXT: s_and_b32 s84, s10, 0xffff0000 -; SI-NEXT: s_lshl_b32 s67, s10, 16 +; SI-NEXT: s_lshl_b32 s69, s10, 16 ; SI-NEXT: s_and_b32 s70, s12, 0xffff0000 ; SI-NEXT: s_lshl_b32 s65, s12, 16 -; SI-NEXT: s_and_b32 s69, s14, 0xffff0000 +; SI-NEXT: s_and_b32 s68, s14, 0xffff0000 ; SI-NEXT: s_lshl_b32 s55, s14, 16 -; SI-NEXT: s_and_b32 s68, s40, 0xffff0000 +; SI-NEXT: s_and_b32 s67, s40, 0xffff0000 ; SI-NEXT: s_lshl_b32 s53, s40, 16 ; SI-NEXT: s_and_b32 s66, s42, 0xffff0000 ; SI-NEXT: s_lshl_b32 s51, s42, 16 @@ -226495,17 +226909,17 @@ define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a ; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16 ; SI-NEXT: v_mul_f32_e64 v16, 1.0, s84 ; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v16 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s67 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s69 ; SI-NEXT: v_lshr_b64 v[16:17], v[16:17], 16 ; SI-NEXT: v_mul_f32_e64 v17, 1.0, s70 ; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 ; SI-NEXT: v_mul_f32_e64 v17, 1.0, s65 ; SI-NEXT: v_lshr_b64 v[17:18], v[17:18], 16 -; SI-NEXT: v_mul_f32_e64 v18, 1.0, s69 +; SI-NEXT: v_mul_f32_e64 v18, 1.0, s68 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v18 ; SI-NEXT: v_mul_f32_e64 v18, 1.0, s55 ; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16 -; SI-NEXT: v_mul_f32_e64 v19, 1.0, s68 +; SI-NEXT: v_mul_f32_e64 v19, 1.0, s67 ; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v19 ; SI-NEXT: v_mul_f32_e64 v19, 1.0, s53 ; SI-NEXT: v_lshr_b64 v[19:20], v[19:20], 16 @@ -227817,7 +228231,7 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -227842,56 +228256,56 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_writelane_b32 v63, s39, 5 ; SI-NEXT: v_writelane_b32 v63, s30, 6 ; SI-NEXT: v_writelane_b32 v63, s31, 7 -; SI-NEXT: v_readfirstlane_b32 s10, v17 -; SI-NEXT: v_readfirstlane_b32 s6, v16 -; SI-NEXT: v_readfirstlane_b32 s11, v15 -; SI-NEXT: v_readfirstlane_b32 s7, v14 -; SI-NEXT: v_readfirstlane_b32 s59, v13 -; SI-NEXT: v_readfirstlane_b32 s8, v12 -; SI-NEXT: v_readfirstlane_b32 s57, v11 -; SI-NEXT: v_readfirstlane_b32 s9, v10 +; SI-NEXT: v_readfirstlane_b32 s72, v17 +; SI-NEXT: v_readfirstlane_b32 s8, v16 +; SI-NEXT: v_readfirstlane_b32 s63, v15 +; SI-NEXT: v_readfirstlane_b32 s9, v14 +; SI-NEXT: v_readfirstlane_b32 s60, v13 +; SI-NEXT: v_readfirstlane_b32 s10, v12 +; SI-NEXT: v_readfirstlane_b32 s58, v11 +; SI-NEXT: v_readfirstlane_b32 s75, v10 ; SI-NEXT: v_readfirstlane_b32 s56, v9 -; SI-NEXT: v_readfirstlane_b32 s12, v8 -; SI-NEXT: v_readfirstlane_b32 s47, v7 -; SI-NEXT: v_readfirstlane_b32 s90, v6 -; SI-NEXT: v_readfirstlane_b32 s46, v5 -; SI-NEXT: v_readfirstlane_b32 s92, v4 -; SI-NEXT: v_readfirstlane_b32 s45, v3 +; SI-NEXT: v_readfirstlane_b32 s89, v8 +; SI-NEXT: v_readfirstlane_b32 s46, v7 +; SI-NEXT: v_readfirstlane_b32 s92, v6 +; SI-NEXT: v_readfirstlane_b32 s44, v5 +; SI-NEXT: v_readfirstlane_b32 s93, v4 +; SI-NEXT: v_readfirstlane_b32 s43, v3 ; SI-NEXT: v_readfirstlane_b32 s30, v2 -; SI-NEXT: v_readfirstlane_b32 s44, v1 +; SI-NEXT: v_readfirstlane_b32 s42, v1 ; SI-NEXT: v_readfirstlane_b32 s35, v0 -; SI-NEXT: s_lshr_b32 s43, s29, 16 -; SI-NEXT: s_lshr_b32 s93, s28, 16 -; SI-NEXT: s_lshr_b32 s42, s27, 16 -; SI-NEXT: s_lshr_b32 s31, s26, 16 -; SI-NEXT: s_lshr_b32 s41, s25, 16 -; SI-NEXT: s_lshr_b32 s34, s24, 16 -; SI-NEXT: s_lshr_b32 s40, s23, 16 +; SI-NEXT: s_lshr_b32 s41, s29, 16 +; SI-NEXT: s_lshr_b32 s90, s28, 16 +; SI-NEXT: s_lshr_b32 s40, s27, 16 +; SI-NEXT: s_lshr_b32 s94, s26, 16 +; SI-NEXT: s_lshr_b32 s15, s25, 16 +; SI-NEXT: s_lshr_b32 s31, s24, 16 +; SI-NEXT: s_lshr_b32 s14, s23, 16 ; SI-NEXT: s_lshr_b32 s36, s22, 16 -; SI-NEXT: s_lshr_b32 s15, s21, 16 +; SI-NEXT: s_lshr_b32 s13, s21, 16 ; SI-NEXT: s_lshr_b32 s37, s20, 16 -; SI-NEXT: s_lshr_b32 s14, s19, 16 +; SI-NEXT: s_lshr_b32 s12, s19, 16 ; SI-NEXT: s_lshr_b32 s38, s18, 16 -; SI-NEXT: s_lshr_b32 s13, s17, 16 +; SI-NEXT: s_lshr_b32 s11, s17, 16 ; SI-NEXT: s_lshr_b32 s39, s16, 16 -; SI-NEXT: s_lshr_b32 s88, s10, 16 -; SI-NEXT: s_lshr_b32 s61, s6, 16 -; SI-NEXT: s_lshr_b32 s76, s11, 16 -; SI-NEXT: s_lshr_b32 s63, s7, 16 -; SI-NEXT: s_lshr_b32 s78, s59, 16 -; SI-NEXT: s_lshr_b32 s74, s8, 16 -; SI-NEXT: s_lshr_b32 s75, s57, 16 -; SI-NEXT: s_lshr_b32 s77, s9, 16 -; SI-NEXT: s_lshr_b32 s73, s56, 16 -; SI-NEXT: s_lshr_b32 s79, s12, 16 -; SI-NEXT: s_lshr_b32 s72, s47, 16 -; SI-NEXT: s_lshr_b32 s89, s90, 16 -; SI-NEXT: s_lshr_b32 s62, s46, 16 -; SI-NEXT: s_lshr_b32 s91, s92, 16 -; SI-NEXT: s_lshr_b32 s60, s45, 16 -; SI-NEXT: s_lshr_b32 s94, s30, 16 -; SI-NEXT: s_lshr_b32 s58, s44, 16 -; SI-NEXT: s_lshr_b32 s95, s35, 16 +; SI-NEXT: s_lshr_b32 s77, s72, 16 +; SI-NEXT: s_lshr_b32 s6, s8, 16 +; SI-NEXT: s_lshr_b32 s76, s63, 16 +; SI-NEXT: s_lshr_b32 s7, s9, 16 +; SI-NEXT: s_lshr_b32 s74, s60, 16 +; SI-NEXT: s_lshr_b32 s61, s10, 16 +; SI-NEXT: s_lshr_b32 s73, s58, 16 +; SI-NEXT: s_lshr_b32 s78, s75, 16 +; SI-NEXT: s_lshr_b32 s62, s56, 16 +; SI-NEXT: s_lshr_b32 s79, s89, 16 +; SI-NEXT: s_lshr_b32 s59, s46, 16 +; SI-NEXT: s_lshr_b32 s88, s92, 16 +; SI-NEXT: s_lshr_b32 s57, s44, 16 +; SI-NEXT: s_lshr_b32 s91, s93, 16 +; SI-NEXT: s_lshr_b32 s47, s43, 16 +; SI-NEXT: s_lshr_b32 s95, s30, 16 +; SI-NEXT: s_lshr_b32 s45, s42, 16 +; SI-NEXT: s_lshr_b32 s34, s35, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v18 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB109_3 @@ -227903,467 +228317,440 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_cvt_f32_f16_e32 v2, s38 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v0 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s37 -; SI-NEXT: v_or_b32_e32 v40, v1, v38 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: v_or_b32_e32 v56, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s37 +; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s20 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s20 -; SI-NEXT: v_or_b32_e32 v2, v2, v60 -; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v0 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s36 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v2, s22 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_or_b32_e32 v34, v2, v44 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s36 +; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s22 +; SI-NEXT: v_or_b32_e32 v41, v3, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s31 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_or_b32_e32 v8, v1, v56 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s34 -; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v0 -; SI-NEXT: v_or_b32_e32 v2, v2, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s24 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v2, s31 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s24 +; SI-NEXT: v_or_b32_e32 v40, v1, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s94 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s26 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s26 -; SI-NEXT: v_or_b32_e32 v10, v0, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s93 -; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s28 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_or_b32_e32 v23, v2, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s90 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s28 +; SI-NEXT: v_or_b32_e32 v14, v3, v50 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s34 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_or_b32_e32 v1, v1, v43 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v1, s95 -; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v0 -; SI-NEXT: v_or_b32_e32 v17, v2, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s94 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s35 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v42 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s35 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v1, s95 +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s30 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_or_b32_e32 v2, v2, v54 ; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s30 -; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v2 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v2, s91 -; SI-NEXT: v_or_b32_e32 v21, v0, v52 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s89 +; SI-NEXT: v_or_b32_e32 v1, v3, v52 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v1, s93 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s88 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s74 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s79 +; SI-NEXT: v_or_b32_e32 v1, v1, v18 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v1, s79 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s89 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s76 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v7, s63 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s77 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v2 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v7 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s61 -; SI-NEXT: v_cvt_f16_f32_e32 v28, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s88 -; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s78 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v30, v4 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s59 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s75 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s57 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v1 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v5 +; SI-NEXT: v_or_b32_e32 v1, v3, v36 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v1, s77 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v5 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s72 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: v_cvt_f32_f16_e32 v2, s92 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v59, v2, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s73 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v9 -; SI-NEXT: v_or_b32_e32 v23, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s56 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s72 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v2 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_or_b32_e32 v61, v1, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s74 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v8 +; SI-NEXT: v_or_b32_e32 v39, v5, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s60 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s73 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f16_f32_e32 v9, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s47 -; SI-NEXT: v_or_b32_e32 v16, v2, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s58 +; SI-NEXT: v_or_b32_e32 v27, v1, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, s62 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v7, s46 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s56 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v55, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v31, v4 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v9 -; SI-NEXT: v_or_b32_e32 v37, v5, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s60 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v55 -; SI-NEXT: v_or_b32_e32 v19, v4, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s45 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s58 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v47, v2 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v8 +; SI-NEXT: v_or_b32_e32 v25, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s59 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v31 +; SI-NEXT: v_or_b32_e32 v37, v4, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s46 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s57 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v47 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v20 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s44 -; SI-NEXT: v_or_b32_e32 v50, v2, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s43 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v7 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v7, s29 +; SI-NEXT: v_or_b32_e32 v22, v1, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s47 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s43 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v35, v4 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v4 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v53, v5, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s42 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 -; SI-NEXT: v_or_b32_e32 v42, v4, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s27 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v11 +; SI-NEXT: v_or_b32_e32 v19, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s45 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v16 +; SI-NEXT: v_or_b32_e32 v53, v4, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s42 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s41 -; SI-NEXT: v_cvt_f16_f32_e32 v34, v2 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v34 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s25 -; SI-NEXT: v_or_b32_e32 v44, v2, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v17 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s29 +; SI-NEXT: v_or_b32_e32 v55, v1, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, s40 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s23 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s27 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v4 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v15 +; SI-NEXT: v_or_b32_e32 v43, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s15 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v13 +; SI-NEXT: v_or_b32_e32 v51, v4, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s25 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s14 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f16_f32_e32 v9, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v9 +; SI-NEXT: v_or_b32_e32 v49, v1, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s13 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v5 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v8 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v35, v4 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v7, v10, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s12 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v11 -; SI-NEXT: v_or_b32_e32 v13, v5, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s15 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v9 -; SI-NEXT: v_or_b32_e32 v46, v4, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s21 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v31, s14 -; SI-NEXT: v_cvt_f16_f32_e32 v51, v2 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v31 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v51 -; SI-NEXT: v_cvt_f32_f16_e32 v32, s19 -; SI-NEXT: v_or_b32_e32 v57, v2, v31 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s13 -; SI-NEXT: v_cvt_f32_f16_e32 v33, s17 -; SI-NEXT: v_cvt_f16_f32_e32 v27, v4 -; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v26, s17 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_or_b32_e32 v47, v4, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s11 +; SI-NEXT: v_or_b32_e32 v2, v2, v21 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v28, v10 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v26 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v2, s78 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s75 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v24, s61 +; SI-NEXT: v_or_b32_e32 v45, v28, v26 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v10 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v32, v32 +; SI-NEXT: v_or_b32_e32 v1, v1, v26 +; SI-NEXT: v_cvt_f32_f16_e32 v26, s10 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v33, 0x38000000, v33 -; SI-NEXT: v_cvt_f16_f32_e32 v33, v33 -; SI-NEXT: v_cvt_f32_f16_e32 v29, s76 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v27 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s92 -; SI-NEXT: v_or_b32_e32 v61, v32, v31 -; SI-NEXT: v_cvt_f32_f16_e32 v31, s11 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v2 -; SI-NEXT: v_or_b32_e32 v39, v33, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v32, s10 -; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s90 -; SI-NEXT: v_cvt_f16_f32_e32 v33, v29 -; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v31 -; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 -; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v32 -; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_or_b32_e32 v29, v29, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v31, v31, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v32, s12 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_or_b32_e32 v26, v0, v49 -; SI-NEXT: v_or_b32_e32 v48, v3, v36 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s9 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s7 -; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32 -; SI-NEXT: v_or_b32_e32 v20, v1, v18 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s8 -; SI-NEXT: v_cvt_f16_f32_e32 v32, v32 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 +; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 +; SI-NEXT: v_cvt_f16_f32_e32 v28, v24 +; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v26 +; SI-NEXT: v_cvt_f16_f32_e32 v30, v24 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s7 +; SI-NEXT: v_or_b32_e32 v29, v3, v24 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s9 +; SI-NEXT: v_lshr_b64 v[4:5], v[44:45], 16 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v24, v32, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v32, s6 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_or_b32_e32 v25, v0, v22 -; SI-NEXT: v_or_b32_e32 v0, v3, v28 -; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32 -; SI-NEXT: v_or_b32_e32 v54, v1, v58 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[0:1], v[38:39], 16 -; SI-NEXT: v_mov_b32_e32 v38, v61 +; SI-NEXT: v_mov_b32_e32 v5, v47 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v2 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v33, v3, v38 +; SI-NEXT: v_lshr_b64 v[2:3], v[0:1], 16 +; SI-NEXT: v_mov_b32_e32 v3, v34 +; SI-NEXT: v_mov_b32_e32 v34, v45 +; SI-NEXT: v_lshr_b64 v[44:45], v[50:51], 16 +; SI-NEXT: v_mov_b32_e32 v45, v43 +; SI-NEXT: v_lshr_b64 v[42:43], v[42:43], 16 +; SI-NEXT: v_mov_b32_e32 v0, v56 +; SI-NEXT: v_lshr_b64 v[56:57], v[6:7], 16 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v5, v7 +; SI-NEXT: v_mov_b32_e32 v7, v12 +; SI-NEXT: v_mov_b32_e32 v6, v41 +; SI-NEXT: v_mov_b32_e32 v12, v40 +; SI-NEXT: v_mov_b32_e32 v43, v55 +; SI-NEXT: v_lshr_b64 v[40:41], v[54:55], 16 +; SI-NEXT: v_lshr_b64 v[54:55], v[52:53], 16 +; SI-NEXT: v_mov_b32_e32 v55, v16 +; SI-NEXT: v_mov_b32_e32 v16, v23 +; SI-NEXT: v_mov_b32_e32 v23, v19 +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v28 +; SI-NEXT: v_cvt_f32_f16_e32 v28, s6 +; SI-NEXT: v_or_b32_e32 v62, v30, v26 +; SI-NEXT: v_lshr_b64 v[58:59], v[46:47], 16 +; SI-NEXT: v_mov_b32_e32 v57, v49 +; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28 +; SI-NEXT: v_cvt_f16_f32_e32 v30, v28 +; SI-NEXT: v_cvt_f32_f16_e32 v28, s8 +; SI-NEXT: v_lshr_b64 v[46:47], v[48:49], 16 +; SI-NEXT: v_mov_b32_e32 v59, v37 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v30 +; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28 +; SI-NEXT: v_cvt_f16_f32_e32 v32, v28 +; SI-NEXT: v_lshr_b64 v[48:49], v[36:37], 16 +; SI-NEXT: v_lshr_b64 v[36:37], v[26:27], 16 +; SI-NEXT: v_mov_b32_e32 v47, v51 +; SI-NEXT: v_or_b32_e32 v28, v32, v60 +; SI-NEXT: v_mov_b32_e32 v49, v31 +; SI-NEXT: v_lshr_b64 v[31:32], v[24:25], 16 +; SI-NEXT: v_lshr_b64 v[37:38], v[38:39], 16 +; SI-NEXT: v_mov_b32_e32 v41, v53 +; SI-NEXT: v_lshr_b64 v[52:53], v[18:19], 16 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v32, v28 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v53, v11 +; SI-NEXT: v_mov_b32_e32 v11, v61 +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: v_lshr_b64 v[60:61], v[60:61], 16 -; SI-NEXT: v_cvt_f16_f32_e32 v32, v32 -; SI-NEXT: v_mov_b32_e32 v1, v40 -; SI-NEXT: v_mov_b32_e32 v40, v57 -; SI-NEXT: v_lshr_b64 v[61:62], v[56:57], 16 -; SI-NEXT: v_lshr_b64 v[56:57], v[45:46], 16 -; SI-NEXT: v_lshr_b64 v[4:5], v[52:53], 16 -; SI-NEXT: v_mov_b32_e32 v57, v44 -; SI-NEXT: v_lshr_b64 v[44:45], v[43:44], 16 -; SI-NEXT: v_mov_b32_e32 v45, v42 -; SI-NEXT: v_lshr_b64 v[42:43], v[41:42], 16 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v7, v6 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 -; SI-NEXT: v_mov_b32_e32 v6, v8 -; SI-NEXT: v_mov_b32_e32 v8, v13 -; SI-NEXT: v_lshr_b64 v[13:14], v[12:13], 16 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[4:5], v[49:50], 16 -; SI-NEXT: v_mov_b32_e32 v52, v16 -; SI-NEXT: v_lshr_b64 v[15:16], v[15:16], 16 -; SI-NEXT: v_mov_b32_e32 v43, v23 -; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16 -; SI-NEXT: v_or_b32_e32 v32, v32, v30 -; SI-NEXT: v_mov_b32_e32 v14, v17 -; SI-NEXT: v_mov_b32_e32 v17, v21 -; SI-NEXT: v_mov_b32_e32 v21, v37 -; SI-NEXT: v_lshr_b64 v[36:37], v[36:37], 16 -; SI-NEXT: v_mov_b32_e32 v3, v39 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v39, v32 -; SI-NEXT: v_mov_b32_e32 v37, v33 -; SI-NEXT: v_lshr_b64 v[32:33], v[30:31], 16 -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[4:5], v[18:19], 16 -; SI-NEXT: v_mov_b32_e32 v15, v46 -; SI-NEXT: v_mov_b32_e32 v22, v50 -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[49:50], v[28:29], 16 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v41, v55 -; SI-NEXT: v_mov_b32_e32 v55, v59 -; SI-NEXT: v_lshr_b64 v[58:59], v[58:59], 16 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v50, v7 +; SI-NEXT: v_mov_b32_e32 v11, v5 +; SI-NEXT: v_lshr_b64 v[50:51], v[21:22], 16 +; SI-NEXT: v_mov_b32_e32 v23, v22 +; SI-NEXT: v_mov_b32_e32 v51, v20 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: s_branch .LBB109_5 ; SI-NEXT: .LBB109_3: ; SI-NEXT: s_branch .LBB109_2 ; SI-NEXT: .LBB109_4: -; SI-NEXT: v_mov_b32_e32 v6, s20 -; SI-NEXT: v_mov_b32_e32 v7, s25 -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v8, s22 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v7, s95 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v7, s94 -; SI-NEXT: v_mov_b32_e32 v0, s7 -; SI-NEXT: v_mov_b32_e32 v50, s88 -; SI-NEXT: v_mov_b32_e32 v37, s76 -; SI-NEXT: v_mov_b32_e32 v30, s78 -; SI-NEXT: v_mov_b32_e32 v28, s75 -; SI-NEXT: v_mov_b32_e32 v46, s73 -; SI-NEXT: v_mov_b32_e32 v23, s72 -; SI-NEXT: v_mov_b32_e32 v41, s62 -; SI-NEXT: v_mov_b32_e32 v47, s60 -; SI-NEXT: v_mov_b32_e32 v33, s58 -; SI-NEXT: v_mov_b32_e32 v35, s43 -; SI-NEXT: v_mov_b32_e32 v34, s42 -; SI-NEXT: v_mov_b32_e32 v11, s41 -; SI-NEXT: v_mov_b32_e32 v9, s40 -; SI-NEXT: v_mov_b32_e32 v51, s15 -; SI-NEXT: v_mov_b32_e32 v27, s14 -; SI-NEXT: v_mov_b32_e32 v2, s13 -; SI-NEXT: v_mov_b32_e32 v39, s6 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v54, s8 -; SI-NEXT: v_mov_b32_e32 v25, s9 -; SI-NEXT: v_mov_b32_e32 v24, s12 -; SI-NEXT: v_mov_b32_e32 v48, s90 -; SI-NEXT: v_mov_b32_e32 v20, s92 -; SI-NEXT: v_mov_b32_e32 v26, s30 -; SI-NEXT: v_mov_b32_e32 v17, s35 -; SI-NEXT: v_mov_b32_e32 v14, s28 -; SI-NEXT: v_mov_b32_e32 v12, s26 -; SI-NEXT: v_mov_b32_e32 v10, s24 -; SI-NEXT: v_mov_b32_e32 v18, s18 -; SI-NEXT: v_mov_b32_e32 v1, s16 -; SI-NEXT: v_mov_b32_e32 v3, s17 -; SI-NEXT: v_mov_b32_e32 v38, s19 -; SI-NEXT: v_mov_b32_e32 v40, s21 -; SI-NEXT: v_mov_b32_e32 v15, s23 -; SI-NEXT: v_mov_b32_e32 v57, s27 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v2, s21 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v2, s44 +; SI-NEXT: v_mov_b32_e32 v0, s76 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v0, s73 +; SI-NEXT: v_mov_b32_e32 v38, s77 +; SI-NEXT: v_mov_b32_e32 v30, s74 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v49, s62 +; SI-NEXT: v_mov_b32_e32 v51, s59 +; SI-NEXT: v_mov_b32_e32 v53, s57 +; SI-NEXT: v_mov_b32_e32 v55, s47 +; SI-NEXT: v_mov_b32_e32 v17, s45 +; SI-NEXT: v_mov_b32_e32 v15, s41 +; SI-NEXT: v_mov_b32_e32 v13, s40 +; SI-NEXT: v_mov_b32_e32 v9, s15 +; SI-NEXT: v_mov_b32_e32 v8, s14 +; SI-NEXT: v_mov_b32_e32 v35, s13 +; SI-NEXT: v_mov_b32_e32 v7, s12 +; SI-NEXT: v_mov_b32_e32 v10, s11 +; SI-NEXT: v_mov_b32_e32 v34, s19 +; SI-NEXT: v_mov_b32_e32 v11, s23 +; SI-NEXT: v_mov_b32_e32 v57, s25 +; SI-NEXT: v_mov_b32_e32 v47, s27 ; SI-NEXT: v_mov_b32_e32 v45, s29 -; SI-NEXT: v_mov_b32_e32 v53, s44 -; SI-NEXT: v_mov_b32_e32 v22, s45 -; SI-NEXT: v_mov_b32_e32 v19, s46 -; SI-NEXT: v_mov_b32_e32 v21, s47 -; SI-NEXT: v_mov_b32_e32 v52, s56 -; SI-NEXT: v_mov_b32_e32 v43, s57 -; SI-NEXT: v_mov_b32_e32 v55, s59 -; SI-NEXT: v_mov_b32_e32 v29, s11 -; SI-NEXT: v_mov_b32_e32 v31, s10 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v0, s39 -; SI-NEXT: v_mov_b32_e32 v60, s38 -; SI-NEXT: v_mov_b32_e32 v61, s37 +; SI-NEXT: v_mov_b32_e32 v43, s42 +; SI-NEXT: v_mov_b32_e32 v41, s43 +; SI-NEXT: v_mov_b32_e32 v23, s46 +; SI-NEXT: v_mov_b32_e32 v59, s56 +; SI-NEXT: v_mov_b32_e32 v25, s58 +; SI-NEXT: v_mov_b32_e32 v27, s60 +; SI-NEXT: v_mov_b32_e32 v39, s63 +; SI-NEXT: v_mov_b32_e32 v32, s8 +; SI-NEXT: v_mov_b32_e32 v33, s9 +; SI-NEXT: v_mov_b32_e32 v62, s10 +; SI-NEXT: v_mov_b32_e32 v29, s75 +; SI-NEXT: v_mov_b32_e32 v24, s89 +; SI-NEXT: v_mov_b32_e32 v28, s92 +; SI-NEXT: v_mov_b32_e32 v26, s93 +; SI-NEXT: v_mov_b32_e32 v20, s30 +; SI-NEXT: v_mov_b32_e32 v22, s35 +; SI-NEXT: v_mov_b32_e32 v18, s28 +; SI-NEXT: v_mov_b32_e32 v14, s26 +; SI-NEXT: v_mov_b32_e32 v16, s24 +; SI-NEXT: v_mov_b32_e32 v12, s22 +; SI-NEXT: v_mov_b32_e32 v6, s20 +; SI-NEXT: v_mov_b32_e32 v3, s18 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v4, s38 +; SI-NEXT: v_mov_b32_e32 v58, s37 ; SI-NEXT: v_mov_b32_e32 v56, s36 -; SI-NEXT: v_mov_b32_e32 v13, s34 -; SI-NEXT: v_mov_b32_e32 v44, s31 -; SI-NEXT: v_mov_b32_e32 v42, s93 -; SI-NEXT: v_mov_b32_e32 v36, s89 -; SI-NEXT: v_mov_b32_e32 v58, s74 -; SI-NEXT: v_mov_b32_e32 v49, s63 -; SI-NEXT: v_mov_b32_e32 v32, s61 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v7, s91 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v7, s79 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v7, s77 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v46, s31 +; SI-NEXT: v_mov_b32_e32 v44, s94 +; SI-NEXT: v_mov_b32_e32 v42, s90 +; SI-NEXT: v_mov_b32_e32 v40, s34 +; SI-NEXT: v_mov_b32_e32 v54, s95 +; SI-NEXT: v_mov_b32_e32 v52, s91 +; SI-NEXT: v_mov_b32_e32 v50, s88 +; SI-NEXT: v_mov_b32_e32 v48, s79 +; SI-NEXT: v_mov_b32_e32 v31, s78 +; SI-NEXT: v_mov_b32_e32 v36, s61 +; SI-NEXT: v_mov_b32_e32 v37, s7 +; SI-NEXT: v_mov_b32_e32 v60, s6 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v2, s72 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v2, s39 ; SI-NEXT: .LBB109_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v10 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v60 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v38 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v27 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v34 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v7 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v61 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v40 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v51 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v56 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 -; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v13 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v8, v10, v8 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v45 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v17 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v26 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_and_b32_e32 v27, 0xffff, v55 -; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v58 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v56 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v23 +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v59 +; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 +; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_readlane_b32 s30, v63, 6 ; SI-NEXT: v_readlane_b32 s31, v63, 7 ; SI-NEXT: v_readlane_b32 s39, v63, 5 @@ -228373,65 +228760,82 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i ; SI-NEXT: v_readlane_b32 s35, v63, 1 ; SI-NEXT: v_readlane_b32 s34, v63, 0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 -; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v44 -; SI-NEXT: v_or_b32_e32 v10, v12, v10 -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v57 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v34 -; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v42 -; SI-NEXT: v_or_b32_e32 v12, v14, v12 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v35 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v7 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v12 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v11 +; SI-NEXT: v_or_b32_e32 v6, v6, v10 +; SI-NEXT: v_or_b32_e32 v7, v7, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v16 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v46 +; SI-NEXT: v_or_b32_e32 v8, v8, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v57 +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v14 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v44 +; SI-NEXT: v_or_b32_e32 v10, v10, v12 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v47 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v13 +; SI-NEXT: v_or_b32_e32 v11, v12, v11 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v18 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v42 +; SI-NEXT: v_or_b32_e32 v12, v12, v14 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v45 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v53 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v16, v14 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v33 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v22 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v40 +; SI-NEXT: v_or_b32_e32 v14, v14, v16 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v43 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v22 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v36 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v18, v16 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v47 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v20 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v54 +; SI-NEXT: v_or_b32_e32 v16, v16, v18 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v41 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v55 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v20 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v33 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v26 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v52 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v41 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v31 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v20 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v53 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v48 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v20, v20, v22 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v51 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v24 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v48 ; SI-NEXT: v_or_b32_e32 v22, v22, v24 -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v52 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v49 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v25 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v25 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v29 ; SI-NEXT: v_or_b32_e32 v24, v24, v26 -; SI-NEXT: v_and_b32_e32 v25, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v28 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v58 +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v36 +; SI-NEXT: v_and_b32_e32 v29, 0xffff, v39 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_or_b32_e32 v25, v25, v26 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v62 +; SI-NEXT: v_or_b32_e32 v26, v26, v28 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v30 +; SI-NEXT: v_or_b32_e32 v27, v27, v28 +; SI-NEXT: v_and_b32_e32 v28, 0xffff, v33 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v37 +; SI-NEXT: v_or_b32_e32 v28, v28, v30 +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_or_b32_e32 v29, v29, v30 +; SI-NEXT: v_and_b32_e32 v30, 0xffff, v32 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v60 ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -228447,24 +228851,15 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v54 -; SI-NEXT: v_or_b32_e32 v26, v26, v28 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v30 -; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v49 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 -; SI-NEXT: v_or_b32_e32 v28, v28, v30 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v37 -; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: v_and_b32_e32 v30, 0xffff, v39 ; SI-NEXT: v_or_b32_e32 v30, v30, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v50 +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v32 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v38 ; SI-NEXT: v_or_b32_e32 v31, v31, v32 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -228509,94 +228904,103 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB109_4 ; VI-NEXT: .LBB109_2: ; %cmp.true -; VI-NEXT: s_lshr_b32 s4, s50, 16 -; VI-NEXT: v_mov_b32_e32 v0, s4 -; VI-NEXT: s_lshr_b32 s4, s30, 16 ; VI-NEXT: v_mov_b32_e32 v16, 0x200 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: s_lshr_b32 s4, s31, 16 -; VI-NEXT: v_add_f16_sdwa v18, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v0, s30, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v3, s4 -; VI-NEXT: s_lshr_b32 s4, s29, 16 -; VI-NEXT: v_or_b32_e32 v14, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s29, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s28, 16 -; VI-NEXT: v_or_b32_e32 v13, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s28, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s27, 16 -; VI-NEXT: v_or_b32_e32 v12, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s27, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s26, 16 -; VI-NEXT: v_or_b32_e32 v11, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s26, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s25, 16 -; VI-NEXT: v_or_b32_e32 v10, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s25, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s24, 16 -; VI-NEXT: v_or_b32_e32 v9, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s24, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s23, 16 -; VI-NEXT: v_or_b32_e32 v8, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s23, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s22, 16 -; VI-NEXT: v_or_b32_e32 v7, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s22, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s21, 16 -; VI-NEXT: v_or_b32_e32 v6, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s21, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s20, 16 -; VI-NEXT: v_or_b32_e32 v5, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s20, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s19, 16 -; VI-NEXT: v_or_b32_e32 v4, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v2, s31, v16 -; VI-NEXT: v_add_f16_sdwa v3, v3, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v0, s19, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s18, 16 -; VI-NEXT: v_or_b32_e32 v15, v2, v3 -; VI-NEXT: v_or_b32_e32 v3, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: v_add_f16_e32 v0, s18, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s4, s17, 16 -; VI-NEXT: v_or_b32_e32 v2, v0, v1 -; VI-NEXT: v_mov_b32_e32 v1, s4 -; VI-NEXT: s_lshr_b32 s4, s16, 16 -; VI-NEXT: v_mov_b32_e32 v19, s4 -; VI-NEXT: s_lshr_b32 s4, s51, 16 -; VI-NEXT: v_add_f16_e32 v17, s50, v16 -; VI-NEXT: v_mov_b32_e32 v20, s4 -; VI-NEXT: s_lshr_b32 s4, s49, 16 -; VI-NEXT: v_or_b32_e32 v30, v17, v18 -; VI-NEXT: v_mov_b32_e32 v17, s4 -; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v18, s49, v16 +; VI-NEXT: v_add_f16_e32 v7, s23, v16 +; VI-NEXT: s_lshr_b32 s15, s23, 16 +; VI-NEXT: s_lshr_b32 s23, s31, 16 +; VI-NEXT: v_mov_b32_e32 v20, s23 +; VI-NEXT: v_add_f16_e32 v6, s22, v16 +; VI-NEXT: s_lshr_b32 s14, s22, 16 +; VI-NEXT: s_lshr_b32 s22, s30, 16 +; VI-NEXT: v_add_f16_e32 v15, s31, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v15, v15, v20 +; VI-NEXT: v_mov_b32_e32 v20, s22 +; VI-NEXT: v_add_f16_e32 v5, s21, v16 +; VI-NEXT: s_lshr_b32 s13, s21, 16 +; VI-NEXT: s_lshr_b32 s21, s29, 16 +; VI-NEXT: v_add_f16_e32 v14, s30, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v14, v14, v20 +; VI-NEXT: v_mov_b32_e32 v20, s21 +; VI-NEXT: v_add_f16_e32 v4, s20, v16 +; VI-NEXT: s_lshr_b32 s12, s20, 16 +; VI-NEXT: s_lshr_b32 s20, s28, 16 +; VI-NEXT: v_add_f16_e32 v13, s29, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v13, v13, v20 +; VI-NEXT: v_mov_b32_e32 v20, s20 +; VI-NEXT: v_add_f16_e32 v3, s19, v16 +; VI-NEXT: s_lshr_b32 s11, s19, 16 +; VI-NEXT: s_lshr_b32 s19, s27, 16 +; VI-NEXT: v_add_f16_e32 v12, s28, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v12, v12, v20 +; VI-NEXT: v_mov_b32_e32 v20, s19 +; VI-NEXT: v_add_f16_e32 v2, s18, v16 +; VI-NEXT: s_lshr_b32 s10, s18, 16 +; VI-NEXT: s_lshr_b32 s18, s26, 16 +; VI-NEXT: v_add_f16_e32 v11, s27, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v11, v11, v20 +; VI-NEXT: v_mov_b32_e32 v20, s18 +; VI-NEXT: v_add_f16_e32 v1, s17, v16 +; VI-NEXT: s_lshr_b32 s9, s17, 16 +; VI-NEXT: s_lshr_b32 s17, s25, 16 +; VI-NEXT: v_add_f16_e32 v10, s26, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v10, v10, v20 +; VI-NEXT: v_mov_b32_e32 v20, s17 +; VI-NEXT: v_add_f16_e32 v0, s16, v16 +; VI-NEXT: s_lshr_b32 s8, s16, 16 +; VI-NEXT: s_lshr_b32 s16, s24, 16 +; VI-NEXT: v_add_f16_e32 v9, s25, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v9, v9, v20 +; VI-NEXT: v_mov_b32_e32 v20, s16 +; VI-NEXT: v_add_f16_e32 v8, s24, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v8, v8, v20 +; VI-NEXT: v_mov_b32_e32 v20, s15 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v7, v7, v20 +; VI-NEXT: v_mov_b32_e32 v20, s14 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v6, v6, v20 +; VI-NEXT: v_mov_b32_e32 v20, s13 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v5, v5, v20 +; VI-NEXT: v_mov_b32_e32 v20, s12 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v4, v4, v20 +; VI-NEXT: v_mov_b32_e32 v20, s11 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v3, v3, v20 +; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v2, v2, v20 +; VI-NEXT: v_mov_b32_e32 v20, s9 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v20 +; VI-NEXT: v_mov_b32_e32 v20, s8 +; VI-NEXT: s_lshr_b32 s7, s51, 16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v0, v0, v20 +; VI-NEXT: v_mov_b32_e32 v20, s7 +; VI-NEXT: s_lshr_b32 s6, s50, 16 +; VI-NEXT: v_add_f16_e32 v19, s51, v16 +; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v31, v19, v20 +; VI-NEXT: v_mov_b32_e32 v19, s6 +; VI-NEXT: s_lshr_b32 s5, s49, 16 +; VI-NEXT: v_add_f16_e32 v18, s50, v16 +; VI-NEXT: v_add_f16_sdwa v19, v19, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v30, v18, v19 +; VI-NEXT: v_mov_b32_e32 v18, s5 ; VI-NEXT: s_lshr_b32 s4, s48, 16 -; VI-NEXT: v_or_b32_e32 v29, v18, v17 +; VI-NEXT: v_add_f16_e32 v17, s49, v16 +; VI-NEXT: v_add_f16_sdwa v18, v18, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v29, v17, v18 ; VI-NEXT: v_mov_b32_e32 v17, s4 ; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v18, s48, v16 @@ -228633,23 +229037,14 @@ define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i ; VI-NEXT: s_lshr_b32 s4, s41, 16 ; VI-NEXT: v_or_b32_e32 v22, v18, v17 ; VI-NEXT: v_mov_b32_e32 v17, s4 -; VI-NEXT: v_add_f16_e32 v0, s17, v16 -; VI-NEXT: v_add_f16_sdwa v1, v1, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v18, s41, v16 ; VI-NEXT: s_lshr_b32 s4, s40, 16 -; VI-NEXT: v_or_b32_e32 v1, v0, v1 -; VI-NEXT: v_add_f16_e32 v0, s16, v16 -; VI-NEXT: v_add_f16_sdwa v19, v19, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v21, v18, v17 ; VI-NEXT: v_mov_b32_e32 v17, s4 -; VI-NEXT: v_or_b32_e32 v0, v0, v19 -; VI-NEXT: v_add_f16_e32 v19, s51, v16 -; VI-NEXT: v_add_f16_sdwa v20, v20, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v18, s40, v16 ; VI-NEXT: s_lshr_b32 s4, s39, 16 -; VI-NEXT: v_or_b32_e32 v31, v19, v20 ; VI-NEXT: v_or_b32_e32 v20, v18, v17 ; VI-NEXT: v_mov_b32_e32 v17, s4 ; VI-NEXT: v_add_f16_sdwa v17, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -228994,411 +229389,404 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:4 -; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 +; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v10 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v4 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v2 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v4 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v6 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v49 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v8 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v53 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v6 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v48 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v10 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v52 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v8 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v39 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v51 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v38 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v50 +; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v1 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v3 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v36 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v58 -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v1 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v24 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v3 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v60 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v5 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v63 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v7 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v61 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v5 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v60 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v45 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v7 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v40 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v11 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v63 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v9 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v54 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v13 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v43 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v11 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v51 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v15 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v55 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v13 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v56 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v17 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v60 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v15 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v47 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v30 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v26 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v22 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v18 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v59 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v17 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v58 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v30 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v19 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v57 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v26 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v24 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v22 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v20 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v18 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v16 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v54 ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v52 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v37 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v38 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v46 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v56 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v40 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v33 -; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v31 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v59 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v57 -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v44 -; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v43 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v42 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v33 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v41 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v55 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v53 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v52 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v42 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v41 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v54 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: ; implicit-def: $vgpr57 +; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr59 -; SI-NEXT: ; implicit-def: $vgpr57 +; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; implicit-def: $vgpr55 -; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB110_2 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v58 -; SI-NEXT: v_or_b32_e32 v61, v1, v50 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v61 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_or_b32_e32 v47, v1, v31 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v63 -; SI-NEXT: v_or_b32_e32 v47, v1, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v45 +; SI-NEXT: v_or_b32_e32 v57, v1, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v60 -; SI-NEXT: v_or_b32_e32 v62, v1, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v63 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_or_b32_e32 v41, v1, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v40 -; SI-NEXT: v_or_b32_e32 v59, v1, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v43 +; SI-NEXT: v_or_b32_e32 v62, v1, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v54 -; SI-NEXT: v_or_b32_e32 v57, v1, v3 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v51 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_alignbit_b32 v1, v61, v5, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v55 +; SI-NEXT: v_or_b32_e32 v60, v1, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11 -; SI-NEXT: v_or_b32_e32 v56, v1, v3 +; SI-NEXT: ; implicit-def: $vgpr9 +; SI-NEXT: ; implicit-def: $vgpr11 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_or_b32_e32 v59, v1, v3 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_alignbit_b32 v1, v47, v7, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_or_b32_e32 v46, v1, v3 +; SI-NEXT: ; implicit-def: $vgpr13 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v58, v1, v3 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v62, v9, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_or_b32_e32 v44, v1, v3 +; SI-NEXT: ; implicit-def: $vgpr15 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v56, v1, v3 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v59, v11, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_or_b32_e32 v43, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v57, v13, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: ; implicit-def: $vgpr17 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v46, v1, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19 -; SI-NEXT: v_or_b32_e32 v42, v1, v48 -; SI-NEXT: v_alignbit_b32 v1, v56, v15, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21 -; SI-NEXT: v_or_b32_e32 v41, v1, v49 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_alignbit_b32 v1, v46, v17, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23 -; SI-NEXT: v_or_b32_e32 v55, v1, v39 -; SI-NEXT: v_alignbit_b32 v1, v44, v34, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25 -; SI-NEXT: v_or_b32_e32 v53, v1, v4 -; SI-NEXT: v_alignbit_b32 v1, v43, v35, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v27 -; SI-NEXT: v_or_b32_e32 v4, v1, v6 -; SI-NEXT: v_alignbit_b32 v1, v42, v32, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v29 -; SI-NEXT: v_or_b32_e32 v3, v1, v8 -; SI-NEXT: v_alignbit_b32 v1, v41, v36, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v37 -; SI-NEXT: v_or_b32_e32 v50, v1, v31 -; SI-NEXT: v_alignbit_b32 v1, v55, v45, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v44, v1, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21 +; SI-NEXT: v_or_b32_e32 v42, v1, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v23 +; SI-NEXT: v_or_b32_e32 v5, v0, v2 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v25 +; SI-NEXT: v_or_b32_e32 v3, v0, v33 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v27 +; SI-NEXT: v_or_b32_e32 v2, v0, v51 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v29 +; SI-NEXT: v_or_b32_e32 v31, v0, v52 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v38 +; SI-NEXT: v_or_b32_e32 v1, v0, v53 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr8 -; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr53 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v1, v1, v5 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v53, v38, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v47, v7, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr5 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v1, v1, v7 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v1, v4, v33, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr7 -; SI-NEXT: ; implicit-def: $vgpr4 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v1, v1, v9 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v1, v3, v0, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v57, v7, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr3 -; SI-NEXT: ; implicit-def: $vgpr9 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v1, v1, v11 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v7 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v50, v2, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v41, v7, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr11 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr7 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v1, v1, v13 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v6 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v1, v1, v15 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v62, v6, 16 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v1, v1, v17 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8 +; SI-NEXT: ; implicit-def: $vgpr8 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_or_b32_e32 v0, v0, v6 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v1, v1, v34 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v60, v6, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v1, v1, v35 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10 +; SI-NEXT: v_or_b32_e32 v0, v0, v4 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v1, v1, v32 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v59, v4, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v20 -; SI-NEXT: v_or_b32_e32 v1, v1, v36 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12 +; SI-NEXT: v_or_b32_e32 v0, v0, v34 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v22 -; SI-NEXT: v_or_b32_e32 v1, v1, v45 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v58, v34, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v24 -; SI-NEXT: v_or_b32_e32 v1, v1, v38 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14 +; SI-NEXT: v_or_b32_e32 v0, v0, v35 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v26 -; SI-NEXT: v_or_b32_e32 v1, v1, v33 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v56, v35, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v28 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16 +; SI-NEXT: v_or_b32_e32 v0, v0, v36 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v46, v36, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18 +; SI-NEXT: v_or_b32_e32 v0, v0, v40 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v44, v40, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20 +; SI-NEXT: v_or_b32_e32 v0, v0, v37 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v42, v37, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v22 +; SI-NEXT: v_or_b32_e32 v0, v0, v39 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v5, v39, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24 +; SI-NEXT: v_or_b32_e32 v0, v0, v32 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v3, v32, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v48 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v2, v48, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v28 +; SI-NEXT: v_or_b32_e32 v0, v0, v49 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v31, v49, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v30 -; SI-NEXT: v_or_b32_e32 v0, v0, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: v_or_b32_e32 v0, v0, v50 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v1, v50, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0 ; SI-NEXT: ; kill: killed $vgpr0 ; SI-NEXT: ; implicit-def: $vgpr0 @@ -229435,13 +229823,13 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; kill: killed $vgpr0 ; SI-NEXT: ; implicit-def: $vgpr0 ; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr5 +; SI-NEXT: ; implicit-def: $vgpr6 ; SI-NEXT: ; implicit-def: $vgpr10 ; SI-NEXT: ; implicit-def: $vgpr12 -; SI-NEXT: ; implicit-def: $vgpr13 ; SI-NEXT: ; implicit-def: $vgpr14 -; SI-NEXT: ; implicit-def: $vgpr15 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr22 @@ -229449,156 +229837,153 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; implicit-def: $vgpr30 +; SI-NEXT: ; implicit-def: $vgpr4 ; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; kill: killed $vgpr0 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr45 -; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; kill: killed $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr2 +; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: .LBB110_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB110_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28 -; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_or_b32_e32 v0, v0, v28 +; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29 +; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26 +; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 +; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22 +; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 +; SI-NEXT: v_or_b32_e32 v29, v52, v29 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30 -; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v29 -; SI-NEXT: v_add_i32_e32 v29, vcc, s6, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v26 -; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 -; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v2, v2, v30 -; SI-NEXT: v_or_b32_e32 v8, v8, v28 -; SI-NEXT: v_or_b32_e32 v0, v33, v0 -; SI-NEXT: v_add_i32_e32 v28, vcc, 0x30000, v2 -; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v8 -; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v27 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v6, v0 -; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v24 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v38, v0 -; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v25 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v4, v0 -; SI-NEXT: v_add_i32_e32 v53, vcc, s6, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v22 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v45, v0 -; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v23 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v39, v0 -; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v20 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v36, v0 -; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v0 -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v21 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v49, v0 -; SI-NEXT: v_add_i32_e32 v41, vcc, s6, v0 +; SI-NEXT: v_or_b32_e32 v26, v48, v26 +; SI-NEXT: v_or_b32_e32 v24, v32, v24 +; SI-NEXT: v_or_b32_e32 v22, v39, v22 +; SI-NEXT: v_add_i32_e32 v31, vcc, s6, v29 +; SI-NEXT: v_add_i32_e32 v29, vcc, s6, v26 +; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v27 +; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v24 +; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v25 +; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v22 +; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v23 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 +; SI-NEXT: v_or_b32_e32 v2, v2, v22 +; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v2 +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v20 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v37, v2 +; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v2 +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v21 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_or_b32_e32 v0, v0, v2 +; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v18 +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v32, v0 -; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v0 +; SI-NEXT: v_or_b32_e32 v0, v40, v0 +; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v19 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v48, v0 -; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v0 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 +; SI-NEXT: v_or_b32_e32 v24, v33, v24 +; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v30 +; SI-NEXT: v_add_i32_e32 v38, vcc, 3, v38 +; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 +; SI-NEXT: v_or_b32_e32 v26, v51, v26 +; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 +; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 +; SI-NEXT: v_and_b32_e32 v38, 0xffff, v38 +; SI-NEXT: v_or_b32_e32 v28, v49, v28 +; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v26 +; SI-NEXT: v_or_b32_e32 v30, v50, v30 +; SI-NEXT: v_or_b32_e32 v38, v53, v38 +; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v28 +; SI-NEXT: v_add_i32_e32 v49, vcc, 0x30000, v30 +; SI-NEXT: v_add_i32_e32 v30, vcc, s6, v38 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v30 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v0, v18, v0 +; SI-NEXT: v_add_i32_e32 v44, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v16 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v35, v0 +; SI-NEXT: v_or_b32_e32 v0, v36, v0 ; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v17 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_add_i32_e32 v30, vcc, 3, v37 -; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 -; SI-NEXT: v_or_b32_e32 v30, v31, v30 -; SI-NEXT: v_add_i32_e32 v50, vcc, s6, v30 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v50 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v17, v0 -; SI-NEXT: v_add_i32_e32 v43, vcc, s6, v0 +; SI-NEXT: v_add_i32_e32 v46, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v14 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v34, v0 +; SI-NEXT: v_or_b32_e32 v0, v35, v0 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v15 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v15, v0 -; SI-NEXT: v_add_i32_e32 v44, vcc, s6, v0 +; SI-NEXT: v_add_i32_e32 v56, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v0, v12, v0 +; SI-NEXT: v_or_b32_e32 v0, v34, v0 ; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v13 ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v13, v0 -; SI-NEXT: v_add_i32_e32 v46, vcc, s6, v0 +; SI-NEXT: v_add_i32_e32 v58, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v0, v10, v0 -; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v0 +; SI-NEXT: v_or_b32_e32 v0, v4, v0 +; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v11 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v0, v11, v0 -; SI-NEXT: v_add_i32_e32 v56, vcc, s6, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v56 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_or_b32_e32 v0, v10, v0 +; SI-NEXT: v_add_i32_e32 v59, vcc, s6, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v8 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v0, v11, v0 -; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v0 +; SI-NEXT: v_or_b32_e32 v0, v8, v0 +; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v9, v0 -; SI-NEXT: v_add_i32_e32 v57, vcc, s6, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v57 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 +; SI-NEXT: v_add_i32_e32 v60, vcc, s6, v0 +; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v60 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v0, v9, v0 -; SI-NEXT: v_add_i32_e32 v9, vcc, s6, v0 +; SI-NEXT: v_or_b32_e32 v0, v6, v0 +; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v7, v0 -; SI-NEXT: v_add_i32_e32 v59, vcc, s6, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v59 +; SI-NEXT: v_add_i32_e32 v62, vcc, s6, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v62 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 @@ -229606,14 +229991,14 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v0, v7, v0 ; SI-NEXT: v_add_i32_e32 v7, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v5, v0 -; SI-NEXT: v_add_i32_e32 v62, vcc, s6, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v62 +; SI-NEXT: v_add_i32_e32 v41, vcc, s6, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v41 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 @@ -229621,14 +230006,14 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v0, v5, v0 ; SI-NEXT: v_add_i32_e32 v5, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v3, v0 -; SI-NEXT: v_add_i32_e32 v47, vcc, s6, v0 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v47 +; SI-NEXT: v_add_i32_e32 v57, vcc, s6, v0 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v57 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 @@ -229636,122 +230021,119 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v0, v3, v0 ; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v61, vcc, s6, v0 -; SI-NEXT: v_alignbit_b32 v0, v61, v3, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v47, v5, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v62, v7, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v59, v9, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v57, v11, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v56, v10, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v46, v12, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v44, v14, 16 +; SI-NEXT: v_add_i32_e32 v47, vcc, s6, v0 +; SI-NEXT: v_alignbit_b32 v0, v47, v3, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v43, v16, 16 +; SI-NEXT: v_alignbit_b32 v0, v57, v5, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v41, v7, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v42, v18, 16 +; SI-NEXT: v_alignbit_b32 v0, v62, v6, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v60, v8, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v41, v20, 16 +; SI-NEXT: v_alignbit_b32 v0, v59, v4, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v58, v12, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v55, v4, 16 +; SI-NEXT: v_alignbit_b32 v0, v56, v14, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v46, v16, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v53, v24, 16 +; SI-NEXT: v_alignbit_b32 v0, v44, v2, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v6, v8, 16 +; SI-NEXT: v_alignbit_b32 v0, v42, v20, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v22, v25, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v24, v27, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v2, v29, 16 +; SI-NEXT: v_alignbit_b32 v0, v26, v29, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v50, v28, 16 +; SI-NEXT: v_alignbit_b32 v0, v31, v28, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v30, v49, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v59 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v58 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v56 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v46 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v44 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55 +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53 +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v6 -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v61 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v26 +; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v47 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v2 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v31 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: .LBB110_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v58 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v63 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v60 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v40 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v54 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v51 +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v61 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v55 ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload @@ -229760,121 +230142,128 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v54 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v61 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v47 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v47 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v57 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v62 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v41 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v59 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v62 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v57 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v60 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v56 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v59 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v46 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v58 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v44 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v56 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v43 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v46 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v42 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v44 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v41 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v42 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload @@ -229894,35 +230283,42 @@ define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v55 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: v_and_b32_e32 v25, 0xffff, v53 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v26, v27 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v28, v28, v29 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 +; SI-NEXT: v_and_b32_e32 v29, 0xffff, v31 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_or_b32_e32 v30, v30, v31 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v50 +; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31 ; SI-NEXT: v_or_b32_e32 v31, v31, v32 ; SI-NEXT: s_setpc_b64 s[30:31] ; @@ -230204,663 +230600,702 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i ; SI-NEXT: v_writelane_b32 v32, s99, 33 ; SI-NEXT: v_writelane_b32 v32, s30, 34 ; SI-NEXT: v_writelane_b32 v32, s31, 35 -; SI-NEXT: s_lshr_b32 s4, s21, 16 +; SI-NEXT: s_mov_b32 s58, s21 +; SI-NEXT: s_lshr_b32 s4, s25, 16 ; SI-NEXT: ; implicit-def: $vgpr33 : SGPR spill to VGPR lane -; SI-NEXT: s_lshr_b32 s30, s20, 16 +; SI-NEXT: s_mov_b32 s40, s20 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_writelane_b32 v33, s4, 0 -; SI-NEXT: v_writelane_b32 v33, s20, 1 -; SI-NEXT: v_writelane_b32 v33, s19, 2 -; SI-NEXT: s_lshr_b32 s4, s19, 16 +; SI-NEXT: s_lshr_b32 s4, s58, 16 +; SI-NEXT: v_writelane_b32 v33, s4, 1 +; SI-NEXT: s_lshr_b32 s4, s40, 16 +; SI-NEXT: v_writelane_b32 v33, s4, 2 +; SI-NEXT: s_lshr_b32 s4, s17, 16 ; SI-NEXT: v_writelane_b32 v33, s4, 3 -; SI-NEXT: v_writelane_b32 v33, s18, 4 -; SI-NEXT: v_writelane_b32 v33, s17, 5 -; SI-NEXT: v_writelane_b32 v33, s16, 6 -; SI-NEXT: v_writelane_b32 v33, s22, 7 -; SI-NEXT: v_writelane_b32 v33, s24, 8 -; SI-NEXT: s_lshr_b32 s94, s18, 16 -; SI-NEXT: s_lshr_b32 s34, s17, 16 -; SI-NEXT: s_lshr_b32 s95, s16, 16 -; SI-NEXT: v_readfirstlane_b32 s89, v17 -; SI-NEXT: v_readfirstlane_b32 s20, v16 -; SI-NEXT: v_readfirstlane_b32 s19, v15 -; SI-NEXT: v_readfirstlane_b32 s88, v14 -; SI-NEXT: v_readfirstlane_b32 s79, v13 -; SI-NEXT: v_readfirstlane_b32 s18, v12 -; SI-NEXT: v_readfirstlane_b32 s77, v11 -; SI-NEXT: v_readfirstlane_b32 s78, v10 -; SI-NEXT: v_readfirstlane_b32 s16, v9 -; SI-NEXT: v_readfirstlane_b32 s76, v8 -; SI-NEXT: v_readfirstlane_b32 s17, v7 -; SI-NEXT: v_readfirstlane_b32 s82, v6 -; SI-NEXT: v_readfirstlane_b32 s39, v5 -; SI-NEXT: v_readfirstlane_b32 s81, v4 -; SI-NEXT: v_readfirstlane_b32 s54, v3 -; SI-NEXT: v_readfirstlane_b32 s55, v2 -; SI-NEXT: v_readfirstlane_b32 s52, v1 -; SI-NEXT: v_readfirstlane_b32 s70, v0 -; SI-NEXT: v_writelane_b32 v33, s26, 9 -; SI-NEXT: s_lshr_b32 s93, s29, 16 -; SI-NEXT: s_lshr_b32 s48, s28, 16 -; SI-NEXT: s_lshr_b32 s37, s27, 16 -; SI-NEXT: s_lshr_b32 s38, s26, 16 -; SI-NEXT: s_lshr_b32 s35, s25, 16 -; SI-NEXT: s_lshr_b32 s36, s24, 16 -; SI-NEXT: s_lshr_b32 s31, s23, 16 -; SI-NEXT: s_lshr_b32 s84, s22, 16 -; SI-NEXT: s_lshr_b32 s98, s89, 16 -; SI-NEXT: s_lshr_b32 s72, s20, 16 -; SI-NEXT: s_lshr_b32 s99, s19, 16 -; SI-NEXT: s_lshr_b32 s85, s88, 16 -; SI-NEXT: s_lshr_b32 s87, s79, 16 -; SI-NEXT: s_lshr_b32 s51, s18, 16 -; SI-NEXT: s_lshr_b32 s97, s77, 16 -; SI-NEXT: s_lshr_b32 s49, s78, 16 -; SI-NEXT: s_lshr_b32 s83, s16, 16 -; SI-NEXT: s_lshr_b32 s71, s76, 16 -; SI-NEXT: s_lshr_b32 s67, s17, 16 -; SI-NEXT: s_lshr_b32 s91, s82, 16 -; SI-NEXT: s_lshr_b32 s92, s39, 16 -; SI-NEXT: s_lshr_b32 s69, s81, 16 -; SI-NEXT: s_lshr_b32 s90, s54, 16 -; SI-NEXT: s_lshr_b32 s68, s55, 16 -; SI-NEXT: s_lshr_b32 s65, s52, 16 -; SI-NEXT: s_lshr_b32 s53, s70, 16 +; SI-NEXT: s_lshr_b32 s20, s26, 16 +; SI-NEXT: v_writelane_b32 v33, s28, 4 +; SI-NEXT: s_lshr_b32 s12, s28, 16 +; SI-NEXT: v_readfirstlane_b32 s60, v0 +; SI-NEXT: v_writelane_b32 v33, s20, 5 +; SI-NEXT: s_lshr_b32 s15, s60, 16 +; SI-NEXT: v_writelane_b32 v33, s12, 6 +; SI-NEXT: v_writelane_b32 v33, s15, 7 +; SI-NEXT: v_readfirstlane_b32 s13, v3 +; SI-NEXT: v_readfirstlane_b32 s63, v2 +; SI-NEXT: v_writelane_b32 v33, s60, 8 +; SI-NEXT: s_lshr_b32 s61, s63, 16 +; SI-NEXT: v_writelane_b32 v33, s13, 9 +; SI-NEXT: v_writelane_b32 v33, s61, 10 +; SI-NEXT: v_readfirstlane_b32 s62, v5 +; SI-NEXT: v_writelane_b32 v33, s63, 11 +; SI-NEXT: v_readfirstlane_b32 s72, v7 +; SI-NEXT: v_writelane_b32 v33, s62, 12 +; SI-NEXT: s_mov_b32 s93, s24 +; SI-NEXT: s_lshr_b32 s69, s24, 16 +; SI-NEXT: v_readfirstlane_b32 s24, v9 +; SI-NEXT: v_writelane_b32 v33, s72, 13 +; SI-NEXT: v_readfirstlane_b32 s73, v11 +; SI-NEXT: v_writelane_b32 v33, s24, 14 +; SI-NEXT: s_mov_b32 s99, s19 +; SI-NEXT: v_readfirstlane_b32 s76, v17 +; SI-NEXT: v_readfirstlane_b32 s92, v16 +; SI-NEXT: v_readfirstlane_b32 s75, v15 +; SI-NEXT: v_readfirstlane_b32 s64, v14 +; SI-NEXT: v_readfirstlane_b32 s74, v13 +; SI-NEXT: v_readfirstlane_b32 s54, v12 +; SI-NEXT: v_readfirstlane_b32 s52, v10 +; SI-NEXT: v_readfirstlane_b32 s39, v8 +; SI-NEXT: v_readfirstlane_b32 s50, v6 +; SI-NEXT: v_readfirstlane_b32 s48, v4 +; SI-NEXT: v_readfirstlane_b32 s35, v1 +; SI-NEXT: v_writelane_b32 v33, s73, 15 +; SI-NEXT: s_mov_b32 s91, s25 +; SI-NEXT: s_lshr_b32 s21, s29, 16 +; SI-NEXT: s_lshr_b32 s45, s27, 16 +; SI-NEXT: s_lshr_b32 s43, s23, 16 +; SI-NEXT: s_lshr_b32 s19, s22, 16 +; SI-NEXT: s_lshr_b32 s41, s99, 16 +; SI-NEXT: s_lshr_b32 s59, s18, 16 +; SI-NEXT: s_lshr_b32 s57, s16, 16 +; SI-NEXT: s_lshr_b32 s90, s76, 16 +; SI-NEXT: s_lshr_b32 s53, s92, 16 +; SI-NEXT: s_lshr_b32 s84, s75, 16 +; SI-NEXT: s_lshr_b32 s51, s64, 16 +; SI-NEXT: s_lshr_b32 s98, s74, 16 +; SI-NEXT: s_lshr_b32 s49, s54, 16 +; SI-NEXT: s_lshr_b32 s86, s73, 16 +; SI-NEXT: s_lshr_b32 s25, s52, 16 +; SI-NEXT: s_lshr_b32 s96, s24, 16 +; SI-NEXT: s_lshr_b32 s38, s39, 16 +; SI-NEXT: s_lshr_b32 s44, s72, 16 +; SI-NEXT: s_lshr_b32 s37, s50, 16 +; SI-NEXT: s_lshr_b32 s56, s62, 16 +; SI-NEXT: s_lshr_b32 s36, s48, 16 +; SI-NEXT: s_lshr_b32 s47, s13, 16 +; SI-NEXT: s_lshr_b32 s97, s35, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v18 -; SI-NEXT: v_writelane_b32 v33, s28, 10 +; SI-NEXT: v_writelane_b32 v33, s74, 16 +; SI-NEXT: s_mov_b32 s85, s27 +; SI-NEXT: s_mov_b32 s46, s26 +; SI-NEXT: s_mov_b32 s83, s23 +; SI-NEXT: s_mov_b32 s68, s22 +; SI-NEXT: s_mov_b32 s81, s17 +; SI-NEXT: s_mov_b32 s42, s16 ; SI-NEXT: s_cmp_lg_u32 s4, 0 -; SI-NEXT: v_writelane_b32 v33, s70, 11 -; SI-NEXT: v_writelane_b32 v33, s72, 12 +; SI-NEXT: v_writelane_b32 v33, s75, 17 +; SI-NEXT: v_writelane_b32 v33, s76, 18 ; SI-NEXT: s_cbranch_scc0 .LBB111_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_readlane_b32 s5, v33, 5 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s7, s34, 16 -; SI-NEXT: s_or_b32 s61, s5, s7 +; SI-NEXT: s_and_b32 s4, s42, 0xffff +; SI-NEXT: s_lshl_b32 s16, s57, 16 +; SI-NEXT: s_or_b32 s14, s4, s16 +; SI-NEXT: s_and_b32 s4, s18, 0xffff +; SI-NEXT: s_lshl_b32 s10, s59, 16 +; SI-NEXT: s_or_b32 s4, s4, s10 +; SI-NEXT: v_writelane_b32 v33, s4, 39 +; SI-NEXT: v_writelane_b32 v33, s5, 40 ; SI-NEXT: v_readlane_b32 s5, v33, 2 -; SI-NEXT: v_readlane_b32 s7, v33, 3 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_or_b32 s59, s5, s7 -; SI-NEXT: v_readlane_b32 s7, v33, 0 -; SI-NEXT: s_and_b32 s5, s21, 0xffff -; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_or_b32 s57, s5, s7 -; SI-NEXT: s_and_b32 s5, s23, 0xffff -; SI-NEXT: s_lshl_b32 s7, s31, 16 -; SI-NEXT: s_or_b32 s47, s5, s7 -; SI-NEXT: s_and_b32 s5, s25, 0xffff -; SI-NEXT: s_lshl_b32 s7, s35, 16 -; SI-NEXT: s_or_b32 s45, s5, s7 -; SI-NEXT: s_and_b32 s5, s27, 0xffff -; SI-NEXT: s_lshl_b32 s7, s37, 16 -; SI-NEXT: s_or_b32 s43, s5, s7 -; SI-NEXT: s_and_b32 s5, s29, 0xffff -; SI-NEXT: s_lshl_b32 s7, s93, 16 -; SI-NEXT: s_or_b32 s41, s5, s7 +; SI-NEXT: s_and_b32 s4, s40, 0xffff +; SI-NEXT: s_mov_b32 s55, s49 +; SI-NEXT: s_mov_b32 s49, s36 +; SI-NEXT: s_lshl_b32 s36, s5, 16 +; SI-NEXT: s_or_b32 s8, s4, s36 +; SI-NEXT: s_and_b32 s4, s68, 0xffff +; SI-NEXT: v_writelane_b32 v33, s68, 41 +; SI-NEXT: s_lshl_b32 s68, s19, 16 +; SI-NEXT: s_or_b32 s6, s4, s68 +; SI-NEXT: s_and_b32 s4, s93, 0xffff +; SI-NEXT: s_lshl_b32 vcc_lo, s69, 16 +; SI-NEXT: s_or_b32 s4, s4, vcc_lo +; SI-NEXT: v_writelane_b32 v33, s4, 42 +; SI-NEXT: v_writelane_b32 v33, s5, 43 +; SI-NEXT: v_readlane_b32 s4, v33, 3 +; SI-NEXT: s_and_b32 s7, s81, 0xffff +; SI-NEXT: s_lshl_b32 s9, s4, 16 +; SI-NEXT: s_or_b32 s17, s7, s9 +; SI-NEXT: s_and_b32 s7, s99, 0xffff +; SI-NEXT: s_lshl_b32 s9, s41, 16 +; SI-NEXT: s_or_b32 s11, s7, s9 +; SI-NEXT: v_readlane_b32 s9, v33, 1 +; SI-NEXT: s_and_b32 s7, s58, 0xffff +; SI-NEXT: s_lshl_b32 s9, s9, 16 +; SI-NEXT: v_writelane_b32 v33, s83, 44 +; SI-NEXT: s_mov_b32 s65, s51 +; SI-NEXT: s_mov_b32 s51, s37 +; SI-NEXT: s_or_b32 s37, s7, s9 +; SI-NEXT: s_and_b32 s7, s83, 0xffff +; SI-NEXT: s_lshl_b32 s9, s43, 16 +; SI-NEXT: v_writelane_b32 v33, s69, 45 +; SI-NEXT: s_or_b32 s69, s7, s9 +; SI-NEXT: v_readlane_b32 s9, v33, 0 +; SI-NEXT: s_and_b32 s7, s91, 0xffff +; SI-NEXT: s_lshl_b32 s9, s9, 16 +; SI-NEXT: s_or_b32 vcc_hi, s7, s9 +; SI-NEXT: s_and_b32 s7, s85, 0xffff +; SI-NEXT: s_lshl_b32 s9, s45, 16 +; SI-NEXT: v_writelane_b32 v33, s85, 46 +; SI-NEXT: s_or_b32 s85, s7, s9 +; SI-NEXT: s_and_b32 s7, s29, 0xffff +; SI-NEXT: s_lshl_b32 s9, s21, 16 +; SI-NEXT: s_or_b32 s87, s7, s9 +; SI-NEXT: s_and_b32 s7, s35, 0xffff +; SI-NEXT: s_lshl_b32 s9, s97, 16 +; SI-NEXT: v_writelane_b32 v33, s91, 47 +; SI-NEXT: s_mov_b32 s91, s97 +; SI-NEXT: s_or_b32 s97, s7, s9 +; SI-NEXT: s_and_b32 s7, s13, 0xffff +; SI-NEXT: s_lshl_b32 s9, s47, 16 +; SI-NEXT: v_writelane_b32 v33, s46, 48 +; SI-NEXT: v_writelane_b32 v33, s93, 49 +; SI-NEXT: s_or_b32 s93, s7, s9 +; SI-NEXT: s_and_b32 s7, s62, 0xffff +; SI-NEXT: s_lshl_b32 s9, s56, 16 +; SI-NEXT: s_mov_b32 s67, s59 +; SI-NEXT: s_or_b32 s59, s7, s9 +; SI-NEXT: s_and_b32 s7, s72, 0xffff +; SI-NEXT: s_lshl_b32 s9, s44, 16 +; SI-NEXT: s_mov_b32 s95, s57 +; SI-NEXT: s_or_b32 s57, s7, s9 +; SI-NEXT: s_and_b32 s7, s24, 0xffff +; SI-NEXT: s_lshl_b32 s9, s96, 16 +; SI-NEXT: v_writelane_b32 v33, s40, 50 +; SI-NEXT: s_mov_b32 s31, s47 +; SI-NEXT: s_or_b32 s47, s7, s9 +; SI-NEXT: s_and_b32 s7, s73, 0xffff +; SI-NEXT: s_lshl_b32 s9, s86, 16 +; SI-NEXT: v_writelane_b32 v33, s81, 51 +; SI-NEXT: s_mov_b32 s79, s45 +; SI-NEXT: s_or_b32 s45, s7, s9 +; SI-NEXT: s_and_b32 s7, s74, 0xffff +; SI-NEXT: s_lshl_b32 s9, s98, 16 +; SI-NEXT: v_writelane_b32 v33, s42, 52 +; SI-NEXT: s_mov_b32 s89, s43 +; SI-NEXT: s_or_b32 s43, s7, s9 +; SI-NEXT: s_and_b32 s7, s75, 0xffff +; SI-NEXT: s_mov_b32 s75, s86 +; SI-NEXT: s_lshl_b32 s86, s12, 16 +; SI-NEXT: v_writelane_b32 v33, s35, 53 +; SI-NEXT: s_lshr_b64 s[34:35], s[86:87], 16 +; SI-NEXT: s_lshl_b32 s9, s84, 16 +; SI-NEXT: s_mov_b32 s73, s84 +; SI-NEXT: s_lshl_b32 s84, s20, 16 +; SI-NEXT: s_mov_b32 s77, s96 +; SI-NEXT: s_lshl_b32 s96, s15, 16 +; SI-NEXT: s_mov_b32 s15, s21 +; SI-NEXT: s_lshr_b64 s[20:21], s[68:69], 16 +; SI-NEXT: v_readlane_b32 s68, v33, 41 +; SI-NEXT: v_writelane_b32 v33, s34, 19 +; SI-NEXT: s_and_b32 s5, s46, 0xffff +; SI-NEXT: v_writelane_b32 v33, s35, 20 +; SI-NEXT: s_lshr_b64 s[34:35], s[96:97], 16 +; SI-NEXT: s_or_b32 s74, s5, s84 +; SI-NEXT: s_and_b32 s5, s28, 0xffff +; SI-NEXT: s_mov_b32 s28, s92 +; SI-NEXT: s_lshl_b32 s92, s61, 16 +; SI-NEXT: v_writelane_b32 v33, s34, 21 +; SI-NEXT: s_or_b32 s72, s5, s86 +; SI-NEXT: s_and_b32 s5, s60, 0xffff +; SI-NEXT: v_writelane_b32 v33, s35, 22 +; SI-NEXT: s_lshr_b64 s[34:35], s[92:93], 16 +; SI-NEXT: s_or_b32 s62, s5, s96 +; SI-NEXT: s_and_b32 s5, s63, 0xffff +; SI-NEXT: s_mov_b32 s63, s58 +; SI-NEXT: s_lshl_b32 s58, s49, 16 +; SI-NEXT: v_writelane_b32 v33, s34, 23 +; SI-NEXT: v_writelane_b32 v33, s35, 24 +; SI-NEXT: s_lshr_b64 s[34:35], s[58:59], 16 +; SI-NEXT: s_mov_b32 s61, s56 +; SI-NEXT: s_lshl_b32 s56, s51, 16 +; SI-NEXT: v_writelane_b32 v33, s34, 25 +; SI-NEXT: v_writelane_b32 v33, s35, 26 +; SI-NEXT: s_lshr_b64 s[34:35], s[56:57], 16 +; SI-NEXT: s_lshl_b32 s46, s38, 16 +; SI-NEXT: v_writelane_b32 v33, s34, 27 +; SI-NEXT: v_writelane_b32 v33, s35, 28 +; SI-NEXT: s_lshr_b64 s[34:35], s[46:47], 16 +; SI-NEXT: s_mov_b32 s71, s44 +; SI-NEXT: s_lshl_b32 s44, s25, 16 +; SI-NEXT: v_writelane_b32 v33, s34, 29 +; SI-NEXT: v_writelane_b32 v33, s35, 30 +; SI-NEXT: s_lshr_b64 s[34:35], s[44:45], 16 +; SI-NEXT: s_lshl_b32 s42, s55, 16 +; SI-NEXT: v_writelane_b32 v33, s34, 31 +; SI-NEXT: s_or_b32 s60, s5, s92 +; SI-NEXT: s_and_b32 s5, s48, 0xffff +; SI-NEXT: v_writelane_b32 v33, s35, 32 +; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 16 +; SI-NEXT: s_mov_b32 s24, s41 +; SI-NEXT: s_or_b32 s41, s7, s9 +; SI-NEXT: s_and_b32 s7, s76, 0xffff +; SI-NEXT: s_or_b32 s76, s5, s58 +; SI-NEXT: s_and_b32 s5, s50, 0xffff +; SI-NEXT: s_lshl_b32 s40, s65, 16 +; SI-NEXT: v_writelane_b32 v33, s34, 33 +; SI-NEXT: s_lshl_b32 s9, s90, 16 +; SI-NEXT: s_or_b32 s66, s5, s56 +; SI-NEXT: s_and_b32 s5, s39, 0xffff +; SI-NEXT: v_writelane_b32 v33, s35, 34 +; SI-NEXT: s_lshr_b64 s[34:35], s[40:41], 16 +; SI-NEXT: s_or_b32 s13, s7, s9 +; SI-NEXT: s_or_b32 s94, s5, s46 ; SI-NEXT: s_and_b32 s5, s52, 0xffff -; SI-NEXT: s_lshl_b32 s7, s65, 16 -; SI-NEXT: s_or_b32 s15, s5, s7 +; SI-NEXT: s_lshl_b32 s12, s53, 16 +; SI-NEXT: v_writelane_b32 v33, s34, 35 +; SI-NEXT: s_or_b32 s30, s5, s44 ; SI-NEXT: s_and_b32 s5, s54, 0xffff -; SI-NEXT: s_lshl_b32 s7, s90, 16 -; SI-NEXT: s_or_b32 s13, s5, s7 -; SI-NEXT: s_and_b32 s5, s39, 0xffff -; SI-NEXT: s_lshl_b32 s7, s92, 16 -; SI-NEXT: s_or_b32 s11, s5, s7 -; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s7, s67, 16 -; SI-NEXT: s_or_b32 s9, s5, s7 -; SI-NEXT: s_and_b32 s5, s16, 0xffff -; SI-NEXT: s_lshl_b32 s7, s83, 16 -; SI-NEXT: s_or_b32 s7, s5, s7 -; SI-NEXT: s_and_b32 s5, s77, 0xffff -; SI-NEXT: s_lshl_b32 s62, s97, 16 -; SI-NEXT: s_or_b32 s5, s5, s62 -; SI-NEXT: s_and_b32 s63, s79, 0xffff -; SI-NEXT: s_lshl_b32 s62, s87, 16 -; SI-NEXT: s_or_b32 vcc_hi, s63, s62 -; SI-NEXT: s_and_b32 s63, s19, 0xffff -; SI-NEXT: s_lshl_b32 s62, s99, 16 -; SI-NEXT: s_mov_b32 s96, s83 -; SI-NEXT: s_mov_b32 s83, s21 -; SI-NEXT: s_mov_b32 s86, s92 -; SI-NEXT: s_mov_b32 s92, s90 -; SI-NEXT: s_mov_b32 s90, s65 -; SI-NEXT: s_or_b32 s65, s63, s62 -; SI-NEXT: s_and_b32 s21, s89, 0xffff -; SI-NEXT: s_lshl_b32 s62, s98, 16 -; SI-NEXT: s_lshl_b32 s58, s94, 16 -; SI-NEXT: s_lshl_b32 s56, s30, 16 -; SI-NEXT: s_lshl_b32 s46, s84, 16 -; SI-NEXT: s_lshl_b32 s44, s36, 16 -; SI-NEXT: s_lshl_b32 s42, s38, 16 -; SI-NEXT: s_lshl_b32 s40, s48, 16 -; SI-NEXT: s_mov_b32 s50, s48 -; SI-NEXT: s_mov_b32 s48, s38 -; SI-NEXT: s_mov_b32 s38, s36 -; SI-NEXT: s_mov_b32 s36, s84 -; SI-NEXT: s_mov_b32 s84, s30 -; SI-NEXT: s_mov_b32 s30, s98 -; SI-NEXT: s_mov_b32 s98, s87 -; SI-NEXT: s_mov_b32 s87, s94 -; SI-NEXT: s_mov_b32 s94, s67 -; SI-NEXT: s_or_b32 s67, s21, s62 -; SI-NEXT: v_readlane_b32 s21, v33, 6 -; SI-NEXT: s_lshl_b32 s60, s95, 16 -; SI-NEXT: s_and_b32 s21, s21, 0xffff -; SI-NEXT: s_or_b32 s62, s21, s60 -; SI-NEXT: s_mov_b32 s63, s61 -; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16 -; SI-NEXT: v_writelane_b32 v33, s60, 13 -; SI-NEXT: v_writelane_b32 v33, s61, 14 -; SI-NEXT: v_readlane_b32 s21, v33, 4 -; SI-NEXT: s_and_b32 s21, s21, 0xffff -; SI-NEXT: s_or_b32 s74, s21, s58 -; SI-NEXT: s_mov_b32 s75, s59 -; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16 -; SI-NEXT: v_writelane_b32 v33, s58, 15 -; SI-NEXT: v_writelane_b32 v33, s59, 16 -; SI-NEXT: v_readlane_b32 s21, v33, 1 -; SI-NEXT: s_and_b32 s21, s21, 0xffff -; SI-NEXT: s_lshl_b32 s66, s72, 16 -; SI-NEXT: s_or_b32 s72, s21, s56 -; SI-NEXT: s_mov_b32 s73, s57 -; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16 -; SI-NEXT: v_writelane_b32 v33, s56, 17 -; SI-NEXT: s_and_b32 s21, s22, 0xffff -; SI-NEXT: v_writelane_b32 v33, s57, 18 -; SI-NEXT: s_or_b32 s60, s21, s46 -; SI-NEXT: s_mov_b32 s61, s47 -; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16 -; SI-NEXT: v_writelane_b32 v33, s46, 19 -; SI-NEXT: s_and_b32 s21, s24, 0xffff -; SI-NEXT: v_writelane_b32 v33, s47, 20 -; SI-NEXT: s_or_b32 s58, s21, s44 -; SI-NEXT: s_mov_b32 s59, s45 -; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16 -; SI-NEXT: v_writelane_b32 v33, s44, 21 -; SI-NEXT: s_and_b32 s21, s26, 0xffff -; SI-NEXT: v_writelane_b32 v33, s45, 22 -; SI-NEXT: s_or_b32 s56, s21, s42 -; SI-NEXT: s_mov_b32 s57, s43 -; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 16 -; SI-NEXT: v_writelane_b32 v33, s42, 23 -; SI-NEXT: s_and_b32 s21, s28, 0xffff -; SI-NEXT: v_writelane_b32 v33, s43, 24 -; SI-NEXT: s_or_b32 s46, s21, s40 -; SI-NEXT: s_mov_b32 s47, s41 -; SI-NEXT: s_lshr_b64 s[40:41], s[40:41], 16 -; SI-NEXT: s_lshl_b32 s14, s53, 16 -; SI-NEXT: v_writelane_b32 v33, s40, 25 -; SI-NEXT: s_and_b32 s21, s70, 0xffff -; SI-NEXT: v_writelane_b32 v33, s41, 26 -; SI-NEXT: s_or_b32 s44, s21, s14 -; SI-NEXT: s_mov_b32 s45, s15 -; SI-NEXT: s_lshr_b64 s[14:15], s[14:15], 16 -; SI-NEXT: v_writelane_b32 v33, s14, 27 -; SI-NEXT: s_lshl_b32 s12, s68, 16 -; SI-NEXT: v_writelane_b32 v33, s15, 28 -; SI-NEXT: s_and_b32 s14, s55, 0xffff -; SI-NEXT: s_or_b32 s42, s14, s12 -; SI-NEXT: s_mov_b32 s43, s13 -; SI-NEXT: s_lshr_b64 s[12:13], s[12:13], 16 -; SI-NEXT: v_writelane_b32 v33, s12, 29 -; SI-NEXT: s_lshl_b32 s10, s69, 16 -; SI-NEXT: v_writelane_b32 v33, s13, 30 -; SI-NEXT: s_and_b32 s12, s81, 0xffff -; SI-NEXT: s_or_b32 s40, s12, s10 -; SI-NEXT: s_mov_b32 s41, s11 -; SI-NEXT: s_lshr_b64 s[10:11], s[10:11], 16 -; SI-NEXT: v_writelane_b32 v33, s10, 31 -; SI-NEXT: s_lshl_b32 s8, s91, 16 -; SI-NEXT: v_writelane_b32 v33, s11, 32 -; SI-NEXT: s_and_b32 s10, s82, 0xffff -; SI-NEXT: s_or_b32 s14, s10, s8 -; SI-NEXT: s_mov_b32 s15, s9 -; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 16 -; SI-NEXT: v_writelane_b32 v33, s8, 33 -; SI-NEXT: s_lshl_b32 s6, s71, 16 -; SI-NEXT: v_writelane_b32 v33, s9, 34 -; SI-NEXT: s_and_b32 s8, s76, 0xffff -; SI-NEXT: s_or_b32 s12, s8, s6 -; SI-NEXT: s_mov_b32 s13, s7 -; SI-NEXT: s_lshr_b64 s[6:7], s[6:7], 16 -; SI-NEXT: v_writelane_b32 v33, s6, 35 -; SI-NEXT: s_lshl_b32 s4, s49, 16 -; SI-NEXT: v_writelane_b32 v33, s7, 36 -; SI-NEXT: s_and_b32 s6, s78, 0xffff -; SI-NEXT: s_or_b32 s10, s6, s4 -; SI-NEXT: s_mov_b32 s11, s5 -; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16 -; SI-NEXT: s_lshl_b32 vcc_lo, s51, 16 -; SI-NEXT: v_writelane_b32 v33, s4, 37 -; SI-NEXT: v_writelane_b32 v33, s5, 38 -; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshr_b64 s[6:7], vcc, 16 -; SI-NEXT: s_lshl_b32 s64, s85, 16 -; SI-NEXT: s_or_b32 s8, s4, vcc_lo -; SI-NEXT: v_writelane_b32 v33, s6, 39 -; SI-NEXT: s_and_b32 s4, s88, 0xffff -; SI-NEXT: v_writelane_b32 v33, s7, 40 -; SI-NEXT: s_or_b32 s6, s4, s64 -; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_mov_b32 s7, s65 -; SI-NEXT: s_lshr_b64 s[64:65], s[64:65], 16 -; SI-NEXT: s_or_b32 s4, s4, s66 -; SI-NEXT: s_mov_b32 s5, s67 -; SI-NEXT: s_lshr_b64 s[66:67], s[66:67], 16 -; SI-NEXT: s_mov_b32 s9, vcc_hi -; SI-NEXT: s_mov_b32 s65, s90 -; SI-NEXT: s_mov_b32 s90, s92 -; SI-NEXT: s_mov_b32 s92, s86 -; SI-NEXT: s_mov_b32 s21, s83 -; SI-NEXT: s_mov_b32 s83, s96 -; SI-NEXT: s_mov_b32 s67, s94 -; SI-NEXT: s_mov_b32 s94, s87 -; SI-NEXT: s_mov_b32 s87, s98 -; SI-NEXT: s_mov_b32 s98, s30 -; SI-NEXT: s_mov_b32 s30, s84 -; SI-NEXT: s_mov_b32 s84, s36 -; SI-NEXT: s_mov_b32 s36, s38 -; SI-NEXT: s_mov_b32 s38, s48 -; SI-NEXT: s_mov_b32 s48, s50 +; SI-NEXT: v_writelane_b32 v33, s35, 36 +; SI-NEXT: s_lshr_b64 s[34:35], s[12:13], 16 +; SI-NEXT: s_or_b32 s78, s5, s42 +; SI-NEXT: s_and_b32 s5, s64, 0xffff +; SI-NEXT: v_writelane_b32 v33, s34, 37 +; SI-NEXT: s_or_b32 s88, s5, s40 +; SI-NEXT: s_and_b32 s5, s28, 0xffff +; SI-NEXT: v_writelane_b32 v33, s35, 38 +; SI-NEXT: s_or_b32 s70, s5, s12 +; SI-NEXT: s_lshr_b64 s[4:5], s[16:17], 16 +; SI-NEXT: s_mov_b32 s21, s15 +; SI-NEXT: s_mov_b32 s15, s17 +; SI-NEXT: v_readlane_b32 s16, v33, 42 +; SI-NEXT: v_readlane_b32 s34, v33, 39 +; SI-NEXT: s_lshr_b64 s[80:81], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[82:83], s[36:37], 16 +; SI-NEXT: v_readlane_b32 s17, v33, 43 +; SI-NEXT: v_readlane_b32 s35, v33, 40 +; SI-NEXT: s_mov_b32 s36, s49 +; SI-NEXT: s_mov_b32 s49, s55 +; SI-NEXT: s_lshr_b64 s[22:23], vcc, 16 +; SI-NEXT: s_lshr_b64 s[26:27], s[84:85], 16 +; SI-NEXT: s_mov_b32 s84, s73 +; SI-NEXT: s_mov_b32 s86, s75 +; SI-NEXT: s_mov_b32 s96, s77 +; SI-NEXT: s_mov_b32 s92, s28 +; SI-NEXT: s_mov_b32 s58, s63 +; SI-NEXT: s_mov_b32 s56, s61 +; SI-NEXT: s_mov_b32 s10, s34 +; SI-NEXT: s_mov_b32 s28, s4 +; SI-NEXT: s_mov_b32 s9, s37 +; SI-NEXT: s_mov_b32 s37, s51 +; SI-NEXT: s_mov_b32 s51, s65 +; SI-NEXT: s_mov_b32 s7, s69 +; SI-NEXT: v_readlane_b32 s69, v33, 45 +; SI-NEXT: v_readlane_b32 s83, v33, 44 +; SI-NEXT: s_mov_b32 s17, vcc_hi +; SI-NEXT: s_mov_b32 s75, s85 +; SI-NEXT: v_readlane_b32 s85, v33, 46 +; SI-NEXT: s_mov_b32 s73, s87 +; SI-NEXT: s_mov_b32 s63, s97 +; SI-NEXT: s_mov_b32 s97, s91 +; SI-NEXT: v_readlane_b32 s91, v33, 47 +; SI-NEXT: s_mov_b32 s61, s93 +; SI-NEXT: v_readlane_b32 s93, v33, 49 +; SI-NEXT: v_readlane_b32 s46, v33, 48 +; SI-NEXT: s_mov_b32 s77, s59 +; SI-NEXT: s_mov_b32 s59, s67 +; SI-NEXT: v_readlane_b32 s40, v33, 50 +; SI-NEXT: s_mov_b32 s67, s57 +; SI-NEXT: s_mov_b32 s57, s95 +; SI-NEXT: s_mov_b32 s95, s47 +; SI-NEXT: s_mov_b32 s47, s31 +; SI-NEXT: s_mov_b32 s44, s71 +; SI-NEXT: v_readlane_b32 s42, v33, 52 +; SI-NEXT: v_readlane_b32 s81, v33, 51 +; SI-NEXT: s_mov_b32 s31, s45 +; SI-NEXT: s_mov_b32 s45, s79 +; SI-NEXT: s_mov_b32 s79, s43 +; SI-NEXT: s_mov_b32 s43, s89 +; SI-NEXT: s_mov_b32 s89, s41 +; SI-NEXT: s_mov_b32 s41, s24 +; SI-NEXT: v_readlane_b32 s35, v33, 53 +; SI-NEXT: s_mov_b32 s71, s13 ; SI-NEXT: s_cbranch_execnz .LBB111_3 ; SI-NEXT: .LBB111_2: ; %cmp.true -; SI-NEXT: s_add_i32 s20, s20, 3 -; SI-NEXT: v_readlane_b32 s5, v33, 12 -; SI-NEXT: s_and_b32 s4, s20, 0xffff +; SI-NEXT: s_add_i32 s92, s92, 3 +; SI-NEXT: s_and_b32 s4, s92, 0xffff +; SI-NEXT: s_lshl_b32 s5, s53, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s70, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v33, 18 +; SI-NEXT: s_add_i32 s65, s4, 3 +; SI-NEXT: s_and_b32 s4, s65, 0xffff +; SI-NEXT: s_lshl_b32 s5, s90, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s64, s64, 3 +; SI-NEXT: s_add_i32 s71, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s64, 0xffff +; SI-NEXT: s_lshl_b32 s5, s51, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s88, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v33, 17 +; SI-NEXT: s_add_i32 s55, s4, 3 +; SI-NEXT: s_and_b32 s4, s55, 0xffff +; SI-NEXT: s_lshl_b32 s5, s84, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s54, s54, 3 +; SI-NEXT: s_add_i32 s89, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s54, 0xffff +; SI-NEXT: s_lshl_b32 s5, s49, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s78, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v33, 16 +; SI-NEXT: s_add_i32 s53, s4, 3 +; SI-NEXT: s_and_b32 s4, s53, 0xffff +; SI-NEXT: s_lshl_b32 s5, s98, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s52, s52, 3 +; SI-NEXT: s_add_i32 s79, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s52, 0xffff +; SI-NEXT: s_lshl_b32 s5, s25, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s30, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v33, 15 +; SI-NEXT: s_add_i32 s25, s4, 3 +; SI-NEXT: s_and_b32 s4, s25, 0xffff +; SI-NEXT: s_lshl_b32 s5, s86, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s24, s39, 3 +; SI-NEXT: s_add_i32 s31, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s24, 0xffff +; SI-NEXT: s_lshl_b32 s5, s38, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s94, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v33, 14 +; SI-NEXT: s_add_i32 s51, s4, 3 +; SI-NEXT: s_and_b32 s4, s51, 0xffff +; SI-NEXT: s_lshl_b32 s5, s96, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s50, s50, 3 +; SI-NEXT: s_add_i32 s95, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s50, 0xffff +; SI-NEXT: s_lshl_b32 s5, s37, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s66, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v33, 13 +; SI-NEXT: s_add_i32 s49, s4, 3 +; SI-NEXT: s_and_b32 s4, s49, 0xffff +; SI-NEXT: s_lshl_b32 s5, s44, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s48, s48, 3 +; SI-NEXT: s_add_i32 s67, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s48, 0xffff +; SI-NEXT: s_lshl_b32 s5, s36, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s76, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v33, 12 +; SI-NEXT: s_add_i32 s39, s4, 3 +; SI-NEXT: s_and_b32 s4, s39, 0xffff +; SI-NEXT: s_lshl_b32 s5, s56, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s77, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v33, 11 +; SI-NEXT: s_add_i32 s38, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v33, 10 +; SI-NEXT: s_and_b32 s4, s38, 0xffff ; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_add_i32 s89, s89, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s89, 0xffff -; SI-NEXT: s_lshl_b32 s6, s98, 16 -; SI-NEXT: s_add_i32 s88, s88, 3 +; SI-NEXT: s_add_i32 s60, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v33, 9 +; SI-NEXT: s_add_i32 s37, s4, 3 +; SI-NEXT: s_and_b32 s4, s37, 0xffff +; SI-NEXT: s_lshl_b32 s5, s47, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s61, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v33, 8 +; SI-NEXT: s_add_i32 s36, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v33, 7 +; SI-NEXT: s_and_b32 s4, s36, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s35, s35, 3 +; SI-NEXT: s_add_i32 s62, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s35, 0xffff +; SI-NEXT: s_lshl_b32 s5, s97, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s63, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v33, 4 +; SI-NEXT: s_add_i32 s28, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v33, 6 +; SI-NEXT: s_and_b32 s4, s28, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s29, s29, 3 +; SI-NEXT: s_add_i32 s72, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s29, 0xffff +; SI-NEXT: s_lshl_b32 s5, s21, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s26, s46, 3 +; SI-NEXT: v_readlane_b32 s5, v33, 5 +; SI-NEXT: s_add_i32 s73, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s26, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s74, s4, 0x30000 +; SI-NEXT: s_add_i32 s4, s85, 3 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_lshl_b32 s5, s45, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s75, s4, 0x30000 +; SI-NEXT: s_add_i32 s4, s93, 3 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_lshl_b32 s5, s69, 16 +; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s16, s4, 0x30000 +; SI-NEXT: s_add_i32 s5, s91, 3 +; SI-NEXT: v_readlane_b32 s4, v33, 0 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_lshl_b32 s6, s4, 16 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s88, 0xffff -; SI-NEXT: s_lshl_b32 s7, s85, 16 -; SI-NEXT: s_add_i32 s19, s19, 3 +; SI-NEXT: s_add_i32 s6, s68, 3 +; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_lshl_b32 s7, s19, 16 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s19, 0xffff -; SI-NEXT: s_lshl_b32 s8, s99, 16 -; SI-NEXT: s_add_i32 s18, s18, 3 +; SI-NEXT: s_add_i32 s7, s83, 3 +; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_lshl_b32 s8, s43, 16 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s18, 0xffff -; SI-NEXT: s_lshl_b32 s9, s51, 16 -; SI-NEXT: s_add_i32 s79, s79, 3 +; SI-NEXT: s_add_i32 s8, s40, 3 +; SI-NEXT: v_readlane_b32 s4, v33, 2 +; SI-NEXT: s_and_b32 s8, s8, 0xffff +; SI-NEXT: s_lshl_b32 s9, s4, 16 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s79, 0xffff -; SI-NEXT: s_lshl_b32 s10, s87, 16 -; SI-NEXT: s_add_i32 s78, s78, 3 +; SI-NEXT: s_add_i32 s9, s58, 3 +; SI-NEXT: v_readlane_b32 s4, v33, 1 +; SI-NEXT: s_and_b32 s9, s9, 0xffff +; SI-NEXT: s_lshl_b32 s10, s4, 16 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s78, 0xffff -; SI-NEXT: s_lshl_b32 s11, s49, 16 -; SI-NEXT: s_add_i32 s77, s77, 3 +; SI-NEXT: s_add_i32 s10, s18, 3 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_lshl_b32 s11, s59, 16 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s77, 0xffff -; SI-NEXT: s_lshl_b32 s12, s97, 16 -; SI-NEXT: s_add_i32 s76, s76, 3 +; SI-NEXT: s_add_i32 s11, s99, 3 +; SI-NEXT: s_and_b32 s11, s11, 0xffff +; SI-NEXT: s_lshl_b32 s12, s41, 16 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s12, s76, 0xffff -; SI-NEXT: s_lshl_b32 s13, s71, 16 -; SI-NEXT: s_add_i32 s16, s16, 3 +; SI-NEXT: s_add_i32 s12, s42, 3 +; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: s_lshl_b32 s13, s57, 16 +; SI-NEXT: v_readlane_b32 s4, v33, 3 +; SI-NEXT: s_add_i32 s17, s5, 0x30000 ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s13, s16, 0xffff -; SI-NEXT: s_lshl_b32 s14, s83, 16 -; SI-NEXT: s_add_i32 s82, s82, 3 -; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: s_and_b32 s14, s82, 0xffff -; SI-NEXT: s_lshl_b32 s15, s91, 16 -; SI-NEXT: s_add_i32 s17, s17, 3 -; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_and_b32 s15, s17, 0xffff -; SI-NEXT: s_lshl_b32 s16, s67, 16 -; SI-NEXT: s_add_i32 s81, s81, 3 -; SI-NEXT: s_or_b32 s15, s16, s15 -; SI-NEXT: s_and_b32 s16, s81, 0xffff -; SI-NEXT: s_lshl_b32 s17, s69, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s80, s39, 3 -; SI-NEXT: s_add_i32 s40, s16, 0x30000 -; SI-NEXT: s_and_b32 s16, s80, 0xffff -; SI-NEXT: s_lshl_b32 s17, s92, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s71, s55, 3 -; SI-NEXT: s_add_i32 s41, s16, 0x30000 -; SI-NEXT: s_and_b32 s16, s71, 0xffff -; SI-NEXT: s_lshl_b32 s17, s68, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s70, s54, 3 -; SI-NEXT: s_add_i32 s42, s16, 0x30000 -; SI-NEXT: s_and_b32 s16, s70, 0xffff -; SI-NEXT: s_lshl_b32 s17, s90, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s43, s16, 0x30000 -; SI-NEXT: v_readlane_b32 s16, v33, 11 -; SI-NEXT: s_add_i32 s69, s16, 3 -; SI-NEXT: s_and_b32 s16, s69, 0xffff -; SI-NEXT: s_lshl_b32 s17, s53, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s68, s52, 3 -; SI-NEXT: s_add_i32 s44, s16, 0x30000 -; SI-NEXT: s_and_b32 s16, s68, 0xffff -; SI-NEXT: s_lshl_b32 s17, s65, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s45, s16, 0x30000 -; SI-NEXT: v_readlane_b32 s16, v33, 10 -; SI-NEXT: s_add_i32 s28, s16, 3 -; SI-NEXT: s_and_b32 s16, s28, 0xffff -; SI-NEXT: s_lshl_b32 s17, s48, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s29, s29, 3 -; SI-NEXT: s_add_i32 s46, s16, 0x30000 -; SI-NEXT: s_and_b32 s16, s29, 0xffff -; SI-NEXT: s_lshl_b32 s17, s93, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s47, s16, 0x30000 -; SI-NEXT: v_readlane_b32 s16, v33, 9 -; SI-NEXT: s_add_i32 s26, s16, 3 -; SI-NEXT: s_and_b32 s16, s26, 0xffff -; SI-NEXT: s_lshl_b32 s17, s38, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s27, s27, 3 -; SI-NEXT: s_add_i32 s56, s16, 0x30000 -; SI-NEXT: s_and_b32 s16, s27, 0xffff -; SI-NEXT: s_lshl_b32 s17, s37, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s57, s16, 0x30000 -; SI-NEXT: v_readlane_b32 s16, v33, 8 -; SI-NEXT: s_add_i32 s24, s16, 3 -; SI-NEXT: s_and_b32 s16, s24, 0xffff -; SI-NEXT: s_lshl_b32 s17, s36, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s25, s25, 3 -; SI-NEXT: s_add_i32 s58, s16, 0x30000 -; SI-NEXT: s_and_b32 s16, s25, 0xffff -; SI-NEXT: s_lshl_b32 s17, s35, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s59, s16, 0x30000 -; SI-NEXT: v_readlane_b32 s16, v33, 7 -; SI-NEXT: s_add_i32 s22, s16, 3 -; SI-NEXT: s_and_b32 s16, s22, 0xffff -; SI-NEXT: s_lshl_b32 s17, s84, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s23, s23, 3 -; SI-NEXT: s_add_i32 s60, s16, 0x30000 -; SI-NEXT: s_and_b32 s16, s23, 0xffff -; SI-NEXT: s_lshl_b32 s17, s31, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s61, s16, 0x30000 -; SI-NEXT: v_readlane_b32 s16, v33, 1 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_lshl_b32 s17, s30, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s72, s16, 0x30000 -; SI-NEXT: s_add_i32 s16, s21, 3 -; SI-NEXT: v_readlane_b32 s17, v33, 0 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s73, s16, 0x30000 -; SI-NEXT: v_readlane_b32 s16, v33, 4 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_lshl_b32 s17, s94, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s74, s16, 0x30000 -; SI-NEXT: v_readlane_b32 s16, v33, 2 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v33, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s75, s16, 0x30000 -; SI-NEXT: v_readlane_b32 s16, v33, 6 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_lshl_b32 s17, s95, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s62, s16, 0x30000 -; SI-NEXT: v_readlane_b32 s16, v33, 5 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_lshl_b32 s17, s34, 16 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s63, s16, 0x30000 -; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16 -; SI-NEXT: v_writelane_b32 v33, s16, 13 -; SI-NEXT: v_writelane_b32 v33, s17, 14 -; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 16 -; SI-NEXT: v_writelane_b32 v33, s16, 15 -; SI-NEXT: v_writelane_b32 v33, s17, 16 -; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 16 -; SI-NEXT: v_writelane_b32 v33, s16, 17 -; SI-NEXT: v_writelane_b32 v33, s17, 18 -; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16 -; SI-NEXT: v_writelane_b32 v33, s16, 19 -; SI-NEXT: v_writelane_b32 v33, s17, 20 -; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 16 -; SI-NEXT: v_writelane_b32 v33, s16, 21 -; SI-NEXT: v_writelane_b32 v33, s17, 22 -; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16 -; SI-NEXT: v_writelane_b32 v33, s16, 23 -; SI-NEXT: v_writelane_b32 v33, s17, 24 -; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 16 -; SI-NEXT: v_writelane_b32 v33, s16, 25 -; SI-NEXT: v_writelane_b32 v33, s17, 26 -; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 16 -; SI-NEXT: v_writelane_b32 v33, s16, 27 -; SI-NEXT: v_writelane_b32 v33, s17, 28 -; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16 -; SI-NEXT: v_writelane_b32 v33, s16, 29 -; SI-NEXT: v_writelane_b32 v33, s17, 30 -; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 16 -; SI-NEXT: s_add_i32 s14, s14, 0x30000 -; SI-NEXT: s_add_i32 s15, s15, 0x30000 -; SI-NEXT: v_writelane_b32 v33, s16, 31 -; SI-NEXT: v_writelane_b32 v33, s17, 32 -; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 16 -; SI-NEXT: s_add_i32 s12, s12, 0x30000 -; SI-NEXT: s_add_i32 s13, s13, 0x30000 -; SI-NEXT: v_writelane_b32 v33, s16, 33 -; SI-NEXT: v_writelane_b32 v33, s17, 34 -; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 16 -; SI-NEXT: s_add_i32 s10, s10, 0x30000 -; SI-NEXT: s_add_i32 s11, s11, 0x30000 -; SI-NEXT: v_writelane_b32 v33, s16, 35 -; SI-NEXT: v_writelane_b32 v33, s17, 36 -; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16 -; SI-NEXT: s_add_i32 s8, s8, 0x30000 -; SI-NEXT: s_add_i32 s9, s9, 0x30000 -; SI-NEXT: v_writelane_b32 v33, s16, 37 -; SI-NEXT: v_writelane_b32 v33, s17, 38 -; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16 -; SI-NEXT: s_add_i32 s4, s4, 0x30000 -; SI-NEXT: s_add_i32 s5, s5, 0x30000 +; SI-NEXT: s_lshl_b32 s13, s4, 16 +; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 16 +; SI-NEXT: v_writelane_b32 v33, s4, 19 +; SI-NEXT: v_writelane_b32 v33, s5, 20 +; SI-NEXT: s_lshr_b64 s[4:5], s[62:63], 16 +; SI-NEXT: v_writelane_b32 v33, s4, 21 +; SI-NEXT: v_writelane_b32 v33, s5, 22 +; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 16 +; SI-NEXT: v_writelane_b32 v33, s4, 23 +; SI-NEXT: v_writelane_b32 v33, s5, 24 +; SI-NEXT: s_lshr_b64 s[4:5], s[76:77], 16 +; SI-NEXT: v_writelane_b32 v33, s4, 25 +; SI-NEXT: v_writelane_b32 v33, s5, 26 +; SI-NEXT: s_lshr_b64 s[4:5], s[66:67], 16 +; SI-NEXT: v_writelane_b32 v33, s4, 27 +; SI-NEXT: v_writelane_b32 v33, s5, 28 +; SI-NEXT: s_lshr_b64 s[4:5], s[94:95], 16 +; SI-NEXT: v_writelane_b32 v33, s4, 29 +; SI-NEXT: v_writelane_b32 v33, s5, 30 +; SI-NEXT: s_lshr_b64 s[4:5], s[30:31], 16 +; SI-NEXT: v_writelane_b32 v33, s4, 31 +; SI-NEXT: v_writelane_b32 v33, s5, 32 +; SI-NEXT: s_lshr_b64 s[4:5], s[78:79], 16 +; SI-NEXT: v_writelane_b32 v33, s4, 33 +; SI-NEXT: s_add_i32 s14, s12, 0x30000 +; SI-NEXT: s_add_i32 s12, s81, 3 +; SI-NEXT: v_writelane_b32 v33, s5, 34 +; SI-NEXT: s_lshr_b64 s[4:5], s[88:89], 16 +; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: v_writelane_b32 v33, s4, 35 +; SI-NEXT: s_or_b32 s12, s13, s12 +; SI-NEXT: v_writelane_b32 v33, s5, 36 +; SI-NEXT: s_lshr_b64 s[4:5], s[70:71], 16 +; SI-NEXT: s_add_i32 s15, s12, 0x30000 +; SI-NEXT: v_writelane_b32 v33, s4, 37 ; SI-NEXT: s_add_i32 s6, s6, 0x30000 ; SI-NEXT: s_add_i32 s7, s7, 0x30000 -; SI-NEXT: v_writelane_b32 v33, s16, 39 -; SI-NEXT: v_writelane_b32 v33, s17, 40 -; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[66:67], s[4:5], 16 -; SI-NEXT: s_lshr_b32 s16, s75, 16 -; SI-NEXT: s_lshr_b32 s34, s63, 16 -; SI-NEXT: v_writelane_b32 v33, s16, 3 -; SI-NEXT: s_lshr_b32 s16, s73, 16 -; SI-NEXT: s_lshr_b32 s31, s61, 16 -; SI-NEXT: s_lshr_b32 s35, s59, 16 -; SI-NEXT: s_lshr_b32 s37, s57, 16 -; SI-NEXT: s_lshr_b32 s93, s47, 16 -; SI-NEXT: s_lshr_b32 s65, s45, 16 -; SI-NEXT: s_lshr_b32 s90, s43, 16 -; SI-NEXT: s_lshr_b32 s92, s41, 16 -; SI-NEXT: s_lshr_b32 s67, s15, 16 -; SI-NEXT: s_lshr_b32 s83, s13, 16 -; SI-NEXT: s_lshr_b32 s97, s11, 16 -; SI-NEXT: s_lshr_b32 s87, s9, 16 -; SI-NEXT: s_lshr_b32 s99, s7, 16 -; SI-NEXT: s_lshr_b32 s98, s5, 16 -; SI-NEXT: v_writelane_b32 v33, s16, 0 +; SI-NEXT: s_add_i32 s9, s9, 0x30000 +; SI-NEXT: v_writelane_b32 v33, s5, 38 +; SI-NEXT: s_lshr_b32 s4, s15, 16 +; SI-NEXT: s_add_i32 s8, s8, 0x30000 +; SI-NEXT: s_add_i32 s10, s10, 0x30000 +; SI-NEXT: s_add_i32 s11, s11, 0x30000 +; SI-NEXT: s_lshr_b64 s[20:21], s[6:7], 16 +; SI-NEXT: v_writelane_b32 v33, s4, 3 +; SI-NEXT: s_lshr_b32 s4, s9, 16 +; SI-NEXT: s_lshr_b64 s[28:29], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[80:81], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[82:83], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[22:23], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[26:27], s[74:75], 16 +; SI-NEXT: s_lshr_b32 s41, s11, 16 +; SI-NEXT: v_writelane_b32 v33, s4, 1 +; SI-NEXT: s_lshr_b32 s43, s7, 16 +; SI-NEXT: s_lshr_b32 s4, s17, 16 +; SI-NEXT: s_lshr_b32 s45, s75, 16 +; SI-NEXT: s_lshr_b32 s21, s73, 16 +; SI-NEXT: s_lshr_b32 s97, s63, 16 +; SI-NEXT: s_lshr_b32 s47, s61, 16 +; SI-NEXT: s_lshr_b32 s56, s77, 16 +; SI-NEXT: s_lshr_b32 s44, s67, 16 +; SI-NEXT: s_lshr_b32 s96, s95, 16 +; SI-NEXT: s_lshr_b32 s86, s31, 16 +; SI-NEXT: s_lshr_b32 s98, s79, 16 +; SI-NEXT: s_lshr_b32 s84, s89, 16 +; SI-NEXT: s_lshr_b32 s90, s71, 16 +; SI-NEXT: v_writelane_b32 v33, s4, 0 ; SI-NEXT: .LBB111_3: ; %end -; SI-NEXT: v_readlane_b32 s18, v33, 13 -; SI-NEXT: s_and_b32 s16, s62, 0xffff -; SI-NEXT: s_lshl_b32 s17, s18, 16 -; SI-NEXT: v_readlane_b32 s19, v33, 14 -; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s63, 0xffff -; SI-NEXT: s_lshl_b32 s18, s34, 16 -; SI-NEXT: v_readlane_b32 s20, v33, 15 -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s18, s74, 0xffff -; SI-NEXT: s_lshl_b32 s19, s20, 16 -; SI-NEXT: v_readlane_b32 s20, v33, 3 -; SI-NEXT: v_readlane_b32 s21, v33, 16 -; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_and_b32 s19, s75, 0xffff -; SI-NEXT: s_lshl_b32 s20, s20, 16 -; SI-NEXT: v_readlane_b32 s22, v33, 17 -; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_and_b32 s20, s72, 0xffff -; SI-NEXT: s_lshl_b32 s21, s22, 16 -; SI-NEXT: v_readlane_b32 s22, v33, 0 -; SI-NEXT: v_readlane_b32 s23, v33, 18 -; SI-NEXT: s_or_b32 s20, s20, s21 -; SI-NEXT: s_and_b32 s21, s73, 0xffff -; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: v_readlane_b32 s24, v33, 19 -; SI-NEXT: s_or_b32 s21, s21, s22 -; SI-NEXT: s_and_b32 s22, s60, 0xffff -; SI-NEXT: s_lshl_b32 s23, s24, 16 -; SI-NEXT: v_readlane_b32 s25, v33, 20 -; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_and_b32 s23, s61, 0xffff -; SI-NEXT: s_lshl_b32 s24, s31, 16 -; SI-NEXT: v_readlane_b32 s26, v33, 21 -; SI-NEXT: s_or_b32 s23, s23, s24 -; SI-NEXT: s_and_b32 s24, s58, 0xffff -; SI-NEXT: s_lshl_b32 s25, s26, 16 -; SI-NEXT: v_readlane_b32 s27, v33, 22 -; SI-NEXT: s_or_b32 s24, s24, s25 -; SI-NEXT: s_and_b32 s25, s59, 0xffff -; SI-NEXT: s_lshl_b32 s26, s35, 16 -; SI-NEXT: v_readlane_b32 s28, v33, 23 -; SI-NEXT: s_or_b32 s25, s25, s26 -; SI-NEXT: s_and_b32 s26, s56, 0xffff -; SI-NEXT: s_lshl_b32 s27, s28, 16 -; SI-NEXT: v_readlane_b32 s29, v33, 24 -; SI-NEXT: s_or_b32 s26, s26, s27 -; SI-NEXT: s_and_b32 s27, s57, 0xffff -; SI-NEXT: s_lshl_b32 s28, s37, 16 -; SI-NEXT: v_readlane_b32 s56, v33, 25 -; SI-NEXT: s_or_b32 s27, s27, s28 -; SI-NEXT: s_and_b32 s28, s46, 0xffff -; SI-NEXT: s_lshl_b32 s29, s56, 16 -; SI-NEXT: s_or_b32 s28, s28, s29 -; SI-NEXT: s_and_b32 s29, s47, 0xffff -; SI-NEXT: s_lshl_b32 s46, s93, 16 -; SI-NEXT: s_or_b32 s29, s29, s46 -; SI-NEXT: v_readlane_b32 s46, v33, 27 -; SI-NEXT: s_and_b32 s44, s44, 0xffff -; SI-NEXT: s_lshl_b32 s46, s46, 16 -; SI-NEXT: v_readlane_b32 s47, v33, 28 -; SI-NEXT: s_or_b32 s44, s44, s46 -; SI-NEXT: s_and_b32 s45, s45, 0xffff -; SI-NEXT: s_lshl_b32 s46, s65, 16 -; SI-NEXT: s_or_b32 s45, s45, s46 -; SI-NEXT: v_readlane_b32 s46, v33, 29 -; SI-NEXT: s_and_b32 s42, s42, 0xffff -; SI-NEXT: s_lshl_b32 s46, s46, 16 -; SI-NEXT: v_readlane_b32 s47, v33, 30 -; SI-NEXT: s_or_b32 s42, s42, s46 -; SI-NEXT: s_and_b32 s43, s43, 0xffff -; SI-NEXT: s_lshl_b32 s46, s90, 16 -; SI-NEXT: s_or_b32 s43, s43, s46 -; SI-NEXT: v_readlane_b32 s46, v33, 31 -; SI-NEXT: s_and_b32 s40, s40, 0xffff -; SI-NEXT: s_lshl_b32 s46, s46, 16 -; SI-NEXT: v_readlane_b32 s47, v33, 32 -; SI-NEXT: s_or_b32 s40, s40, s46 -; SI-NEXT: s_and_b32 s41, s41, 0xffff -; SI-NEXT: s_lshl_b32 s46, s92, 16 -; SI-NEXT: s_or_b32 s41, s41, s46 -; SI-NEXT: v_readlane_b32 s46, v33, 33 -; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s46, s46, 16 -; SI-NEXT: v_readlane_b32 s47, v33, 34 -; SI-NEXT: s_or_b32 s14, s14, s46 -; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s46, s67, 16 -; SI-NEXT: s_or_b32 s15, s15, s46 -; SI-NEXT: v_readlane_b32 s46, v33, 35 -; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s46, s46, 16 -; SI-NEXT: v_readlane_b32 s47, v33, 36 -; SI-NEXT: s_or_b32 s12, s12, s46 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s46, s83, 16 -; SI-NEXT: s_or_b32 s13, s13, s46 -; SI-NEXT: v_readlane_b32 s46, v33, 37 +; SI-NEXT: s_and_b32 s12, s14, 0xffff +; SI-NEXT: s_lshl_b32 s13, s28, 16 +; SI-NEXT: v_readlane_b32 s4, v33, 3 +; SI-NEXT: s_or_b32 s12, s12, s13 +; SI-NEXT: s_and_b32 s13, s15, 0xffff +; SI-NEXT: s_lshl_b32 s14, s4, 16 +; SI-NEXT: s_or_b32 s13, s13, s14 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s46, s46, 16 -; SI-NEXT: v_readlane_b32 s47, v33, 38 -; SI-NEXT: s_or_b32 s10, s10, s46 +; SI-NEXT: s_lshl_b32 s14, s80, 16 +; SI-NEXT: s_or_b32 s10, s10, s14 ; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s46, s97, 16 -; SI-NEXT: s_or_b32 s11, s11, s46 -; SI-NEXT: v_readlane_b32 s46, v33, 39 +; SI-NEXT: s_lshl_b32 s14, s41, 16 +; SI-NEXT: s_or_b32 s11, s11, s14 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s46, s46, 16 -; SI-NEXT: s_or_b32 s8, s8, s46 +; SI-NEXT: s_lshl_b32 s14, s82, 16 +; SI-NEXT: v_readlane_b32 s4, v33, 1 +; SI-NEXT: s_or_b32 s8, s8, s14 ; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s46, s87, 16 -; SI-NEXT: s_or_b32 s9, s9, s46 +; SI-NEXT: s_lshl_b32 s14, s4, 16 +; SI-NEXT: s_or_b32 s9, s9, s14 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s46, s64, 16 -; SI-NEXT: s_or_b32 s6, s6, s46 +; SI-NEXT: s_lshl_b32 s14, s20, 16 +; SI-NEXT: s_or_b32 s6, s6, s14 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s46, s99, 16 -; SI-NEXT: s_or_b32 s7, s7, s46 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s46, s66, 16 -; SI-NEXT: s_or_b32 s4, s4, s46 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s46, s98, 16 -; SI-NEXT: s_or_b32 s5, s5, s46 +; SI-NEXT: s_lshl_b32 s14, s43, 16 +; SI-NEXT: s_or_b32 s7, s7, s14 +; SI-NEXT: s_and_b32 s4, s16, 0xffff +; SI-NEXT: s_lshl_b32 s14, s22, 16 +; SI-NEXT: s_or_b32 s4, s4, s14 +; SI-NEXT: v_readlane_b32 s14, v33, 0 +; SI-NEXT: s_and_b32 s5, s17, 0xffff +; SI-NEXT: s_lshl_b32 s14, s14, 16 +; SI-NEXT: s_or_b32 s5, s5, s14 +; SI-NEXT: s_and_b32 s14, s74, 0xffff +; SI-NEXT: s_lshl_b32 s15, s26, 16 +; SI-NEXT: s_or_b32 s14, s14, s15 +; SI-NEXT: s_and_b32 s15, s75, 0xffff +; SI-NEXT: s_lshl_b32 s24, s45, 16 +; SI-NEXT: v_readlane_b32 s16, v33, 19 +; SI-NEXT: s_or_b32 s15, s15, s24 +; SI-NEXT: s_and_b32 s24, s72, 0xffff +; SI-NEXT: v_readlane_b32 s17, v33, 20 +; SI-NEXT: s_lshl_b32 s25, s16, 16 +; SI-NEXT: s_or_b32 s24, s24, s25 +; SI-NEXT: s_and_b32 s25, s73, 0xffff +; SI-NEXT: s_lshl_b32 s26, s21, 16 +; SI-NEXT: v_readlane_b32 s16, v33, 21 +; SI-NEXT: s_or_b32 s25, s25, s26 +; SI-NEXT: s_and_b32 s26, s62, 0xffff +; SI-NEXT: v_readlane_b32 s17, v33, 22 +; SI-NEXT: s_lshl_b32 s28, s16, 16 +; SI-NEXT: s_or_b32 s26, s26, s28 +; SI-NEXT: s_and_b32 s28, s63, 0xffff +; SI-NEXT: s_lshl_b32 s27, s97, 16 +; SI-NEXT: v_readlane_b32 s16, v33, 23 +; SI-NEXT: s_or_b32 s27, s28, s27 +; SI-NEXT: s_and_b32 s28, s60, 0xffff +; SI-NEXT: v_readlane_b32 s17, v33, 24 +; SI-NEXT: s_lshl_b32 s29, s16, 16 +; SI-NEXT: s_or_b32 s28, s28, s29 +; SI-NEXT: s_and_b32 s29, s61, 0xffff +; SI-NEXT: s_lshl_b32 s40, s47, 16 +; SI-NEXT: v_readlane_b32 s16, v33, 25 +; SI-NEXT: s_or_b32 s29, s29, s40 +; SI-NEXT: s_and_b32 s40, s76, 0xffff +; SI-NEXT: s_lshl_b32 s41, s16, 16 +; SI-NEXT: v_readlane_b32 s18, v33, 27 +; SI-NEXT: s_or_b32 s40, s40, s41 +; SI-NEXT: s_and_b32 s41, s77, 0xffff +; SI-NEXT: s_lshl_b32 s42, s56, 16 +; SI-NEXT: v_readlane_b32 s19, v33, 28 +; SI-NEXT: v_readlane_b32 s17, v33, 26 +; SI-NEXT: s_or_b32 s41, s41, s42 +; SI-NEXT: s_and_b32 s16, s66, 0xffff +; SI-NEXT: s_lshl_b32 s42, s18, 16 +; SI-NEXT: s_and_b32 s19, s95, 0xffff +; SI-NEXT: s_lshl_b32 s22, s96, 16 +; SI-NEXT: s_or_b32 s16, s16, s42 +; SI-NEXT: s_and_b32 s17, s67, 0xffff +; SI-NEXT: s_lshl_b32 s42, s44, 16 +; SI-NEXT: v_readlane_b32 s20, v33, 29 +; SI-NEXT: s_or_b32 s19, s19, s22 +; SI-NEXT: v_readlane_b32 s22, v33, 31 +; SI-NEXT: s_or_b32 s17, s17, s42 +; SI-NEXT: s_and_b32 s18, s94, 0xffff +; SI-NEXT: v_readlane_b32 s21, v33, 30 +; SI-NEXT: s_lshl_b32 s42, s20, 16 +; SI-NEXT: s_and_b32 s20, s30, 0xffff +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_or_b32 s18, s18, s42 +; SI-NEXT: v_readlane_b32 s23, v33, 32 +; SI-NEXT: s_or_b32 s20, s20, s22 +; SI-NEXT: s_and_b32 s21, s31, 0xffff +; SI-NEXT: s_lshl_b32 s22, s86, 16 +; SI-NEXT: v_readlane_b32 s42, v33, 33 +; SI-NEXT: s_or_b32 s21, s21, s22 +; SI-NEXT: s_and_b32 s22, s78, 0xffff +; SI-NEXT: s_lshl_b32 s23, s42, 16 +; SI-NEXT: v_readlane_b32 s43, v33, 34 +; SI-NEXT: s_or_b32 s22, s22, s23 +; SI-NEXT: s_and_b32 s23, s79, 0xffff +; SI-NEXT: s_lshl_b32 s42, s98, 16 +; SI-NEXT: v_readlane_b32 s44, v33, 35 +; SI-NEXT: s_or_b32 s23, s23, s42 +; SI-NEXT: s_and_b32 s42, s88, 0xffff +; SI-NEXT: s_lshl_b32 s43, s44, 16 +; SI-NEXT: v_readlane_b32 s45, v33, 36 +; SI-NEXT: s_or_b32 s42, s42, s43 +; SI-NEXT: s_and_b32 s43, s89, 0xffff +; SI-NEXT: s_lshl_b32 s44, s84, 16 +; SI-NEXT: v_readlane_b32 s46, v33, 37 +; SI-NEXT: s_or_b32 s43, s43, s44 +; SI-NEXT: s_and_b32 s44, s70, 0xffff +; SI-NEXT: s_lshl_b32 s45, s46, 16 +; SI-NEXT: s_or_b32 s44, s44, s45 +; SI-NEXT: s_and_b32 s45, s71, 0xffff +; SI-NEXT: s_lshl_b32 s46, s90, 16 +; SI-NEXT: s_or_b32 s45, s45, s46 ; SI-NEXT: v_readlane_b32 s30, v32, 34 -; SI-NEXT: v_readlane_b32 s57, v33, 26 -; SI-NEXT: v_readlane_b32 s47, v33, 40 -; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v6, s22 -; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v9, s25 -; SI-NEXT: v_mov_b32_e32 v10, s26 -; SI-NEXT: v_mov_b32_e32 v11, s27 -; SI-NEXT: v_mov_b32_e32 v12, s28 -; SI-NEXT: v_mov_b32_e32 v13, s29 -; SI-NEXT: v_mov_b32_e32 v14, s44 -; SI-NEXT: v_mov_b32_e32 v15, s45 -; SI-NEXT: v_mov_b32_e32 v16, s42 -; SI-NEXT: v_mov_b32_e32 v17, s43 +; SI-NEXT: v_readlane_b32 s47, v33, 38 +; SI-NEXT: v_mov_b32_e32 v0, s12 +; SI-NEXT: v_mov_b32_e32 v1, s13 +; SI-NEXT: v_mov_b32_e32 v2, s10 +; SI-NEXT: v_mov_b32_e32 v3, s11 +; SI-NEXT: v_mov_b32_e32 v4, s8 +; SI-NEXT: v_mov_b32_e32 v5, s9 +; SI-NEXT: v_mov_b32_e32 v6, s6 +; SI-NEXT: v_mov_b32_e32 v7, s7 +; SI-NEXT: v_mov_b32_e32 v8, s4 +; SI-NEXT: v_mov_b32_e32 v9, s5 +; SI-NEXT: v_mov_b32_e32 v10, s14 +; SI-NEXT: v_mov_b32_e32 v11, s15 +; SI-NEXT: v_mov_b32_e32 v12, s24 +; SI-NEXT: v_mov_b32_e32 v13, s25 +; SI-NEXT: v_mov_b32_e32 v14, s26 +; SI-NEXT: v_mov_b32_e32 v15, s27 +; SI-NEXT: v_mov_b32_e32 v16, s28 +; SI-NEXT: v_mov_b32_e32 v17, s29 ; SI-NEXT: v_mov_b32_e32 v18, s40 ; SI-NEXT: v_mov_b32_e32 v19, s41 -; SI-NEXT: v_mov_b32_e32 v20, s14 -; SI-NEXT: v_mov_b32_e32 v21, s15 -; SI-NEXT: v_mov_b32_e32 v22, s12 -; SI-NEXT: v_mov_b32_e32 v23, s13 -; SI-NEXT: v_mov_b32_e32 v24, s10 -; SI-NEXT: v_mov_b32_e32 v25, s11 -; SI-NEXT: v_mov_b32_e32 v26, s8 -; SI-NEXT: v_mov_b32_e32 v27, s9 -; SI-NEXT: v_mov_b32_e32 v28, s6 -; SI-NEXT: v_mov_b32_e32 v29, s7 -; SI-NEXT: v_mov_b32_e32 v30, s4 -; SI-NEXT: v_mov_b32_e32 v31, s5 +; SI-NEXT: v_mov_b32_e32 v20, s16 +; SI-NEXT: v_mov_b32_e32 v21, s17 +; SI-NEXT: v_mov_b32_e32 v22, s18 +; SI-NEXT: v_mov_b32_e32 v23, s19 +; SI-NEXT: v_mov_b32_e32 v24, s20 +; SI-NEXT: v_mov_b32_e32 v25, s21 +; SI-NEXT: v_mov_b32_e32 v26, s22 +; SI-NEXT: v_mov_b32_e32 v27, s23 +; SI-NEXT: v_mov_b32_e32 v28, s42 +; SI-NEXT: v_mov_b32_e32 v29, s43 +; SI-NEXT: v_mov_b32_e32 v30, s44 +; SI-NEXT: v_mov_b32_e32 v31, s45 ; SI-NEXT: v_readlane_b32 s31, v32, 35 ; SI-NEXT: v_readlane_b32 s99, v32, 33 ; SI-NEXT: v_readlane_b32 s98, v32, 32 @@ -230904,35 +231339,31 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB111_4: ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v33, s4, 13 -; SI-NEXT: v_writelane_b32 v33, s5, 14 +; SI-NEXT: v_writelane_b32 v33, s4, 19 +; SI-NEXT: v_writelane_b32 v33, s5, 20 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr28 ; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr80 ; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr82 ; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr64 +; SI-NEXT: ; implicit-def: $sgpr20 +; SI-NEXT: ; implicit-def: $sgpr16 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr26 +; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr66 -; SI-NEXT: v_writelane_b32 v33, s4, 15 -; SI-NEXT: v_writelane_b32 v33, s5, 16 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v33, s4, 17 -; SI-NEXT: v_writelane_b32 v33, s5, 18 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v33, s4, 19 -; SI-NEXT: v_writelane_b32 v33, s5, 20 -; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr30 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr70 ; SI-NEXT: v_writelane_b32 v33, s4, 21 ; SI-NEXT: v_writelane_b32 v33, s5, 22 ; SI-NEXT: ; implicit-def: $sgpr4 @@ -230959,10 +231390,6 @@ define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: v_writelane_b32 v33, s4, 37 ; SI-NEXT: v_writelane_b32 v33, s5, 38 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v33, s4, 39 -; SI-NEXT: v_writelane_b32 v33, s5, 40 -; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: s_branch .LBB111_2 ; ; VI-LABEL: bitcast_v64i16_to_v64f16_scalar: diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll index 7e231f48de12a..f42e68c1e1aae 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll @@ -8196,15 +8196,15 @@ define inreg <16 x i8> @bitcast_v4f32_to_v16i8_scalar(<4 x float> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[8:9], s[16:17], 8 ; SI-NEXT: s_cbranch_execnz .LBB49_4 ; SI-NEXT: .LBB49_2: ; %cmp.true -; SI-NEXT: v_add_f32_e64 v21, s17, 1.0 -; SI-NEXT: v_add_f32_e64 v20, s16, 1.0 ; SI-NEXT: v_add_f32_e64 v19, s19, 1.0 ; SI-NEXT: v_add_f32_e64 v18, s18, 1.0 -; SI-NEXT: v_lshr_b64 v[0:1], v[20:21], 16 +; SI-NEXT: v_add_f32_e64 v21, s17, 1.0 +; SI-NEXT: v_add_f32_e64 v20, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[11:12], v[18:19], 24 ; SI-NEXT: v_lshr_b64 v[16:17], v[18:19], 16 ; SI-NEXT: v_lshr_b64 v[9:10], v[18:19], 8 ; SI-NEXT: v_lshr_b64 v[3:4], v[20:21], 24 +; SI-NEXT: v_lshr_b64 v[12:13], v[20:21], 16 ; SI-NEXT: v_lshr_b64 v[1:2], v[20:21], 8 ; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v19 ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v19 @@ -8242,11 +8242,11 @@ define inreg <16 x i8> @bitcast_v4f32_to_v16i8_scalar(<4 x float> inreg %a, i32 ; SI-NEXT: v_mov_b32_e32 v16, s12 ; SI-NEXT: v_mov_b32_e32 v9, s14 ; SI-NEXT: v_mov_b32_e32 v3, s4 -; SI-NEXT: v_mov_b32_e32 v0, s6 +; SI-NEXT: v_mov_b32_e32 v12, s6 ; SI-NEXT: v_mov_b32_e32 v1, s8 ; SI-NEXT: .LBB49_5: ; %end -; SI-NEXT: v_mov_b32_e32 v2, v0 ; SI-NEXT: v_mov_b32_e32 v0, v20 +; SI-NEXT: v_mov_b32_e32 v2, v12 ; SI-NEXT: v_mov_b32_e32 v4, v21 ; SI-NEXT: v_mov_b32_e32 v8, v18 ; SI-NEXT: v_mov_b32_e32 v10, v16 @@ -16067,20 +16067,20 @@ define inreg <16 x i8> @bitcast_v2f64_to_v16i8_scalar(<2 x double> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 8 ; SI-NEXT: s_cbranch_execnz .LBB85_4 ; SI-NEXT: .LBB85_2: ; %cmp.true -; SI-NEXT: v_add_f64 v[20:21], s[16:17], 1.0 ; SI-NEXT: v_add_f64 v[18:19], s[18:19], 1.0 -; SI-NEXT: v_lshr_b64 v[0:1], v[20:21], 16 +; SI-NEXT: v_add_f64 v[22:23], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[11:12], v[18:19], 24 ; SI-NEXT: v_lshr_b64 v[16:17], v[18:19], 16 ; SI-NEXT: v_lshr_b64 v[9:10], v[18:19], 8 -; SI-NEXT: v_lshr_b64 v[3:4], v[20:21], 24 -; SI-NEXT: v_lshr_b64 v[1:2], v[20:21], 8 +; SI-NEXT: v_lshr_b64 v[3:4], v[22:23], 24 +; SI-NEXT: v_lshr_b64 v[20:21], v[22:23], 16 +; SI-NEXT: v_lshr_b64 v[1:2], v[22:23], 8 ; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v19 ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v13, 8, v19 -; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v21 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v21 +; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v23 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v23 ; SI-NEXT: s_branch .LBB85_5 ; SI-NEXT: .LBB85_3: ; SI-NEXT: ; implicit-def: $sgpr14 @@ -16098,8 +16098,8 @@ define inreg <16 x i8> @bitcast_v2f64_to_v16i8_scalar(<2 x double> inreg %a, i32 ; SI-NEXT: s_branch .LBB85_2 ; SI-NEXT: .LBB85_4: ; SI-NEXT: v_mov_b32_e32 v19, s19 -; SI-NEXT: v_mov_b32_e32 v21, s17 -; SI-NEXT: v_mov_b32_e32 v20, s16 +; SI-NEXT: v_mov_b32_e32 v23, s17 +; SI-NEXT: v_mov_b32_e32 v22, s16 ; SI-NEXT: v_mov_b32_e32 v18, s18 ; SI-NEXT: v_mov_b32_e32 v15, s27 ; SI-NEXT: v_mov_b32_e32 v14, s26 @@ -16108,15 +16108,15 @@ define inreg <16 x i8> @bitcast_v2f64_to_v16i8_scalar(<2 x double> inreg %a, i32 ; SI-NEXT: v_mov_b32_e32 v6, s23 ; SI-NEXT: v_mov_b32_e32 v5, s22 ; SI-NEXT: v_mov_b32_e32 v1, s14 -; SI-NEXT: v_mov_b32_e32 v0, s12 +; SI-NEXT: v_mov_b32_e32 v20, s12 ; SI-NEXT: v_mov_b32_e32 v3, s10 ; SI-NEXT: v_mov_b32_e32 v9, s8 ; SI-NEXT: v_mov_b32_e32 v16, s6 ; SI-NEXT: v_mov_b32_e32 v11, s4 ; SI-NEXT: .LBB85_5: ; %end -; SI-NEXT: v_mov_b32_e32 v2, v0 -; SI-NEXT: v_mov_b32_e32 v0, v20 -; SI-NEXT: v_mov_b32_e32 v4, v21 +; SI-NEXT: v_mov_b32_e32 v0, v22 +; SI-NEXT: v_mov_b32_e32 v2, v20 +; SI-NEXT: v_mov_b32_e32 v4, v23 ; SI-NEXT: v_mov_b32_e32 v8, v18 ; SI-NEXT: v_mov_b32_e32 v10, v16 ; SI-NEXT: v_mov_b32_e32 v12, v19 @@ -18675,12 +18675,12 @@ define inreg <8 x i16> @bitcast_v8bf16_to_v8i16_scalar(<8 x bfloat> inreg %a, i3 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v10 ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v6 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v14 ; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v2 -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v10 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v2 ; SI-NEXT: s_cbranch_execnz .LBB95_3 ; SI-NEXT: .LBB95_2: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 @@ -19243,10 +19243,10 @@ define <16 x i8> @bitcast_v8i16_to_v16i8(<8 x i16> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr7 ; VI-NEXT: ; implicit-def: $vgpr8 ; VI-NEXT: ; implicit-def: $vgpr9 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr13 ; VI-NEXT: ; implicit-def: $vgpr15 -; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB96_2 @@ -21617,7 +21617,7 @@ define inreg <8 x half> @bitcast_v8bf16_to_v8f16_scalar(<8 x bfloat> inreg %a, i ; SI-NEXT: v_mul_f32_e64 v21, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v7, 1.0, s5 ; SI-NEXT: v_mul_f32_e64 v16, 1.0, s11 -; SI-NEXT: v_mul_f32_e64 v11, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v12, 1.0, s7 ; SI-NEXT: s_cbranch_scc0 .LBB103_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v20 @@ -21626,26 +21626,26 @@ define inreg <8 x half> @bitcast_v8bf16_to_v8f16_scalar(<8 x bfloat> inreg %a, i ; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v21 ; SI-NEXT: v_lshr_b64 v[14:15], v[4:5], 16 ; SI-NEXT: v_lshr_b64 v[3:4], v[7:8], 16 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v22 ; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v22 -; SI-NEXT: v_lshr_b64 v[18:19], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v22 ; SI-NEXT: v_lshr_b64 v[9:10], v[16:17], 16 -; SI-NEXT: v_lshr_b64 v[12:13], v[11:12], 16 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v22 +; SI-NEXT: v_lshr_b64 v[18:19], v[2:3], 16 +; SI-NEXT: v_lshr_b64 v[10:11], v[12:13], 16 ; SI-NEXT: s_cbranch_execnz .LBB103_3 ; SI-NEXT: .LBB103_2: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v23 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v13 ; SI-NEXT: v_lshr_b64 v[9:10], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v22 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v11 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v12 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v5 -; SI-NEXT: v_lshr_b64 v[12:13], v[1:2], 16 +; SI-NEXT: v_lshr_b64 v[10:11], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v7 ; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 @@ -21659,7 +21659,7 @@ define inreg <8 x half> @bitcast_v8bf16_to_v8f16_scalar(<8 x bfloat> inreg %a, i ; SI-NEXT: v_lshr_b64 v[3:4], v[7:8], 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v5 ; SI-NEXT: v_lshr_b64 v[5:6], v[0:1], 16 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v14 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v13 ; SI-NEXT: v_lshr_b64 v[14:15], v[4:5], 16 ; SI-NEXT: v_lshr_b64 v[18:19], v[2:3], 16 ; SI-NEXT: .LBB103_3: ; %end @@ -21669,7 +21669,7 @@ define inreg <8 x half> @bitcast_v8bf16_to_v8f16_scalar(<8 x bfloat> inreg %a, i ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v12 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v18 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 @@ -21680,7 +21680,7 @@ define inreg <8 x half> @bitcast_v8bf16_to_v8f16_scalar(<8 x bfloat> inreg %a, i ; SI-NEXT: ; implicit-def: $vgpr9 ; SI-NEXT: ; implicit-def: $vgpr14 ; SI-NEXT: ; implicit-def: $vgpr5 -; SI-NEXT: ; implicit-def: $vgpr12 +; SI-NEXT: ; implicit-def: $vgpr10 ; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr3 ; SI-NEXT: s_branch .LBB103_2 @@ -22546,9 +22546,9 @@ define inreg <16 x i8> @bitcast_v8f16_to_v16i8_scalar(<8 x half> inreg %a, i32 i ; SI-NEXT: v_or_b32_e32 v19, v1, v0 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 ; SI-NEXT: v_or_b32_e32 v20, v2, v0 -; SI-NEXT: v_lshr_b64 v[0:1], v[19:20], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[17:18], 24 ; SI-NEXT: v_lshr_b64 v[3:4], v[19:20], 24 +; SI-NEXT: v_lshr_b64 v[11:12], v[17:18], 24 +; SI-NEXT: v_lshr_b64 v[4:5], v[19:20], 16 ; SI-NEXT: v_lshr_b64 v[1:2], v[19:20], 8 ; SI-NEXT: v_lshr_b64 v[12:13], v[17:18], 16 ; SI-NEXT: v_lshr_b64 v[9:10], v[17:18], 8 @@ -22583,14 +22583,14 @@ define inreg <16 x i8> @bitcast_v8f16_to_v16i8_scalar(<8 x half> inreg %a, i32 i ; SI-NEXT: v_mov_b32_e32 v5, s7 ; SI-NEXT: v_mov_b32_e32 v13, s9 ; SI-NEXT: v_mov_b32_e32 v3, s6 -; SI-NEXT: v_mov_b32_e32 v0, s8 +; SI-NEXT: v_mov_b32_e32 v4, s8 ; SI-NEXT: v_mov_b32_e32 v1, s10 ; SI-NEXT: v_mov_b32_e32 v11, s14 ; SI-NEXT: v_mov_b32_e32 v12, s20 ; SI-NEXT: v_mov_b32_e32 v9, s22 ; SI-NEXT: .LBB105_5: ; %end -; SI-NEXT: v_mov_b32_e32 v2, v0 ; SI-NEXT: v_mov_b32_e32 v0, v19 +; SI-NEXT: v_mov_b32_e32 v2, v4 ; SI-NEXT: v_mov_b32_e32 v4, v20 ; SI-NEXT: v_mov_b32_e32 v8, v17 ; SI-NEXT: v_mov_b32_e32 v10, v12 @@ -24457,93 +24457,92 @@ define inreg <16 x i8> @bitcast_v8bf16_to_v16i8_scalar(<8 x bfloat> inreg %a, i3 ; SI-NEXT: s_lshl_b32 s11, s16, 16 ; SI-NEXT: s_cmp_lg_u32 s20, 0 ; SI-NEXT: v_mul_f32_e64 v28, 1.0, s10 -; SI-NEXT: v_mul_f32_e64 v8, 1.0, s11 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s11 ; SI-NEXT: v_mul_f32_e64 v27, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v5, 1.0, s9 ; SI-NEXT: v_mul_f32_e64 v30, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v8, 1.0, s7 ; SI-NEXT: v_mul_f32_e64 v29, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v13, 1.0, s5 ; SI-NEXT: s_cbranch_scc0 .LBB109_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v28 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v30 -; SI-NEXT: v_lshr_b64 v[19:20], v[8:9], 16 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v27 -; SI-NEXT: v_lshr_b64 v[22:23], v[25:26], 16 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v30 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v28 +; SI-NEXT: v_lshr_b64 v[24:25], v[8:9], 16 ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v29 -; SI-NEXT: v_lshr_b64 v[20:21], v[5:6], 16 -; SI-NEXT: v_lshr_b64 v[23:24], v[13:14], 16 -; SI-NEXT: v_lshr_b64 v[0:1], v[19:20], 16 -; SI-NEXT: v_lshr_b64 v[10:11], v[22:23], 16 -; SI-NEXT: v_lshr_b64 v[3:4], v[19:20], 24 +; SI-NEXT: v_lshr_b64 v[21:22], v[0:1], 16 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v27 +; SI-NEXT: v_lshr_b64 v[25:26], v[13:14], 16 +; SI-NEXT: v_lshr_b64 v[22:23], v[5:6], 16 +; SI-NEXT: v_lshr_b64 v[9:10], v[24:25], 8 +; SI-NEXT: v_lshr_b64 v[3:4], v[21:22], 24 +; SI-NEXT: v_lshr_b64 v[19:20], v[21:22], 16 +; SI-NEXT: v_lshr_b64 v[1:2], v[21:22], 8 +; SI-NEXT: v_lshr_b64 v[11:12], v[24:25], 24 +; SI-NEXT: v_lshr_b64 v[17:18], v[24:25], 16 ; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v27 ; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v29 -; SI-NEXT: v_lshrrev_b32_e32 v9, 8, v20 -; SI-NEXT: v_lshrrev_b32_e32 v16, 8, v23 -; SI-NEXT: v_lshr_b64 v[1:2], v[19:20], 8 -; SI-NEXT: v_lshr_b64 v[17:18], v[22:23], 24 -; SI-NEXT: v_lshr_b64 v[11:12], v[22:23], 8 +; SI-NEXT: v_lshrrev_b32_e32 v10, 8, v22 +; SI-NEXT: v_lshrrev_b32_e32 v16, 8, v25 ; SI-NEXT: s_cbranch_execnz .LBB109_3 ; SI-NEXT: .LBB109_2: ; %cmp.true -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v30 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v25 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v30 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v8 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_lshr_b64 v[22:23], v[0:1], 16 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v29 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[24:25], v[1:2], 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v1 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v29 +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v28 -; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v8 +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_lshr_b64 v[19:20], v[0:1], 16 +; SI-NEXT: v_lshr_b64 v[21:22], v[0:1], 16 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v5 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v27 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v12 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v7 -; SI-NEXT: v_lshr_b64 v[20:21], v[5:6], 16 -; SI-NEXT: v_lshr_b64 v[23:24], v[13:14], 16 -; SI-NEXT: v_lshr_b64 v[0:1], v[19:20], 16 -; SI-NEXT: v_lshr_b64 v[10:11], v[22:23], 16 -; SI-NEXT: v_lshr_b64 v[3:4], v[19:20], 24 -; SI-NEXT: v_lshr_b64 v[1:2], v[19:20], 8 -; SI-NEXT: v_lshr_b64 v[17:18], v[22:23], 24 -; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v12 -; SI-NEXT: v_lshr_b64 v[11:12], v[22:23], 8 -; SI-NEXT: v_lshrrev_b32_e32 v9, 8, v20 -; SI-NEXT: v_lshrrev_b32_e32 v16, 8, v23 -; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v7 +; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v8 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v0 +; SI-NEXT: v_lshr_b64 v[22:23], v[5:6], 16 +; SI-NEXT: v_lshr_b64 v[25:26], v[13:14], 16 +; SI-NEXT: v_lshr_b64 v[3:4], v[21:22], 24 +; SI-NEXT: v_lshr_b64 v[19:20], v[21:22], 16 +; SI-NEXT: v_lshr_b64 v[1:2], v[21:22], 8 +; SI-NEXT: v_lshr_b64 v[11:12], v[24:25], 24 +; SI-NEXT: v_lshr_b64 v[17:18], v[24:25], 16 +; SI-NEXT: v_lshr_b64 v[9:10], v[24:25], 8 +; SI-NEXT: v_lshrrev_b32_e32 v10, 8, v22 +; SI-NEXT: v_lshrrev_b32_e32 v16, 8, v25 +; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v0 +; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v8 ; SI-NEXT: .LBB109_3: ; %end -; SI-NEXT: v_mov_b32_e32 v2, v0 -; SI-NEXT: v_mov_b32_e32 v0, v19 -; SI-NEXT: v_mov_b32_e32 v4, v20 -; SI-NEXT: v_mov_b32_e32 v5, v9 -; SI-NEXT: v_mov_b32_e32 v8, v22 -; SI-NEXT: v_mov_b32_e32 v9, v11 -; SI-NEXT: v_mov_b32_e32 v11, v17 -; SI-NEXT: v_mov_b32_e32 v12, v23 +; SI-NEXT: v_mov_b32_e32 v0, v21 +; SI-NEXT: v_mov_b32_e32 v2, v19 +; SI-NEXT: v_mov_b32_e32 v4, v22 +; SI-NEXT: v_mov_b32_e32 v5, v10 +; SI-NEXT: v_mov_b32_e32 v8, v24 +; SI-NEXT: v_mov_b32_e32 v10, v17 +; SI-NEXT: v_mov_b32_e32 v12, v25 ; SI-NEXT: v_mov_b32_e32 v13, v16 ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB109_4: -; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: ; implicit-def: $vgpr3 -; SI-NEXT: ; implicit-def: $vgpr9 +; SI-NEXT: ; implicit-def: $vgpr10 ; SI-NEXT: ; implicit-def: $vgpr7 -; SI-NEXT: ; implicit-def: $vgpr22 +; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: ; implicit-def: $vgpr9 +; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr11 -; SI-NEXT: ; implicit-def: $vgpr10 ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr15 -; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: s_branch .LBB109_2 ; ; VI-LABEL: bitcast_v8bf16_to_v16i8_scalar: @@ -24652,7 +24651,7 @@ define inreg <16 x i8> @bitcast_v8bf16_to_v16i8_scalar(<8 x bfloat> inreg %a, i3 ; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v4 ; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4 ; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v0 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; VI-NEXT: s_branch .LBB109_5 ; VI-NEXT: .LBB109_3: ; VI-NEXT: ; implicit-def: $sgpr13 @@ -24679,7 +24678,7 @@ define inreg <16 x i8> @bitcast_v8bf16_to_v16i8_scalar(<8 x bfloat> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v14, s20 ; VI-NEXT: v_mov_b32_e32 v13, s15 ; VI-NEXT: v_mov_b32_e32 v2, s14 -; VI-NEXT: v_mov_b32_e32 v11, s13 +; VI-NEXT: v_mov_b32_e32 v1, s13 ; VI-NEXT: v_mov_b32_e32 v7, s12 ; VI-NEXT: v_mov_b32_e32 v6, s11 ; VI-NEXT: v_mov_b32_e32 v5, s10 @@ -24687,7 +24686,6 @@ define inreg <16 x i8> @bitcast_v8bf16_to_v16i8_scalar(<8 x bfloat> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v17, s4 ; VI-NEXT: .LBB109_5: ; %end ; VI-NEXT: v_mov_b32_e32 v3, v17 -; VI-NEXT: v_mov_b32_e32 v1, v11 ; VI-NEXT: v_mov_b32_e32 v11, v16 ; VI-NEXT: s_setpc_b64 s[30:31] ; diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll index c66f5ea8e6c60..f99972785fad6 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll @@ -4098,9 +4098,9 @@ define inreg <14 x i16> @bitcast_v14f16_to_v14i16_scalar(<14 x half> inreg %a, i ; SI-LABEL: bitcast_v14f16_to_v14i16_scalar: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: s_lshr_b32 s10, s22, 16 +; SI-NEXT: s_lshr_b32 s9, s22, 16 ; SI-NEXT: s_lshr_b32 s8, s21, 16 -; SI-NEXT: s_lshr_b32 s9, s20, 16 +; SI-NEXT: s_lshr_b32 s10, s20, 16 ; SI-NEXT: s_lshr_b32 s7, s19, 16 ; SI-NEXT: s_lshr_b32 s11, s18, 16 ; SI-NEXT: s_lshr_b32 s6, s17, 16 @@ -4115,43 +4115,43 @@ define inreg <14 x i16> @bitcast_v14f16_to_v14i16_scalar(<14 x half> inreg %a, i ; SI-NEXT: v_cvt_f32_f16_e32 v2, s11 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_or_b32_e32 v13, v1, v0 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s9 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v14, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s10 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v13, v3, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s20 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s10 -; SI-NEXT: v_or_b32_e32 v14, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s20 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s9 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s22 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s8 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s21 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v1 +; SI-NEXT: v_or_b32_e32 v15, v3, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s22 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s8 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s21 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s17 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v12 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v5 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 -; SI-NEXT: v_or_b32_e32 v16, v3, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s7 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s17 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v12 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_or_b32_e32 v5, v5, v3 +; SI-NEXT: v_or_b32_e32 v5, v3, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s6 @@ -4168,45 +4168,45 @@ define inreg <14 x i16> @bitcast_v14f16_to_v14i16_scalar(<14 x half> inreg %a, i ; SI-NEXT: v_lshr_b64 v[10:11], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[8:9], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[6:7], v[4:5], 16 -; SI-NEXT: v_or_b32_e32 v4, v19, v4 +; SI-NEXT: v_or_b32_e32 v7, v20, v19 ; SI-NEXT: s_branch .LBB23_5 ; SI-NEXT: .LBB23_3: ; SI-NEXT: s_branch .LBB23_2 ; SI-NEXT: .LBB23_4: -; SI-NEXT: v_mov_b32_e32 v12, s10 -; SI-NEXT: v_mov_b32_e32 v15, s8 +; SI-NEXT: v_mov_b32_e32 v12, s9 +; SI-NEXT: v_mov_b32_e32 v16, s8 ; SI-NEXT: v_mov_b32_e32 v17, s7 ; SI-NEXT: v_mov_b32_e32 v18, s6 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v16, s22 -; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v14, s18 -; SI-NEXT: v_mov_b32_e32 v13, s16 +; SI-NEXT: v_mov_b32_e32 v7, s22 +; SI-NEXT: v_mov_b32_e32 v15, s20 +; SI-NEXT: v_mov_b32_e32 v13, s18 +; SI-NEXT: v_mov_b32_e32 v14, s16 ; SI-NEXT: v_mov_b32_e32 v10, s12 ; SI-NEXT: v_mov_b32_e32 v8, s11 -; SI-NEXT: v_mov_b32_e32 v6, s9 +; SI-NEXT: v_mov_b32_e32 v6, s10 ; SI-NEXT: .LBB23_5: ; %end -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v13 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v10 ; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v18 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v2, v2, v7 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v13 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v8 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v17 +; SI-NEXT: v_or_b32_e32 v3, v3, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v15 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v15 -; SI-NEXT: v_or_b32_e32 v3, v3, v7 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v16 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v16 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v12 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: s_setpc_b64 s[30:31] diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll index a94117fee01a0..f5adec3a37f33 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll @@ -2508,10 +2508,10 @@ define <8 x i32> @bitcast_v16f16_to_v8i32(<16 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB18_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v24 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v14 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v23 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v14 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v23 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v22 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -2550,56 +2550,56 @@ define <8 x i32> @bitcast_v16f16_to_v8i32(<16 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB18_2 ; SI-NEXT: .LBB18_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v24 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v23 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v23 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v14 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v13 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v22 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v21 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v20 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v21 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v20 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v12 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v17 -; SI-NEXT: v_or_b32_e32 v3, v3, v4 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v19 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v10 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v18 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v17 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v16 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 @@ -3454,18 +3454,18 @@ define <8 x i32> @bitcast_v16bf16_to_v8i32(<16 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB22_2 ; SI-NEXT: .LBB22_4: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v22 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v20 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v20 ; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v18 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v19 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 @@ -4148,14 +4148,14 @@ define inreg <8 x i32> @bitcast_v16bf16_to_v8i32_scalar(<16 x bfloat> inreg %a, ; SI-NEXT: v_mul_f32_e64 v27, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v13, 1.0, s9 ; SI-NEXT: v_mul_f32_e64 v26, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v11, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v25, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v9, 1.0, s5 ; SI-NEXT: s_cbranch_scc0 .LBB23_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v32 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_lshr_b64 v[0:1], v[23:24], 16 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_lshr_b64 v[1:2], v[21:22], 16 ; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v30 ; SI-NEXT: v_lshr_b64 v[2:3], v[19:20], 16 @@ -4174,15 +4174,15 @@ define inreg <8 x i32> @bitcast_v16bf16_to_v8i32_scalar(<16 x bfloat> inreg %a, ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v32 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v31 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v31 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v30 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v19 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 @@ -4234,153 +4234,154 @@ define inreg <8 x i32> @bitcast_v16bf16_to_v8i32_scalar(<16 x bfloat> inreg %a, ; VI-NEXT: s_cbranch_execnz .LBB23_4 ; VI-NEXT: .LBB23_2: ; %cmp.true ; VI-NEXT: s_lshl_b32 s4, s23, 16 -; VI-NEXT: v_mov_b32_e32 v8, 0x40c00000 -; VI-NEXT: v_add_f32_e32 v0, s4, v8 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v8 +; VI-NEXT: v_mov_b32_e32 v0, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: s_lshl_b32 s4, s21, 16 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[2:3] -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v9, v3, v4, vcc +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s20, 16 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s19, 16 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[2:3] -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v11, v3, v5, vcc +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s18, 16 -; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[2:3] +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s17, 16 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v13, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_cndmask_b32_e32 v11, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s16, 16 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s16, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v8 -; VI-NEXT: v_bfe_u32 v7, v3, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v7 -; VI-NEXT: v_lshrrev_b64 v[7:8], 16, v[0:1] -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[11:12] -; VI-NEXT: v_cndmask_b32_e32 v1, v16, v17, vcc -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[13:14] -; VI-NEXT: v_cndmask_b32_e64 v0, v5, v15, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_mov_b32_e32 v1, v10 -; VI-NEXT: v_mov_b32_e32 v3, v9 -; VI-NEXT: v_mov_b32_e32 v5, v8 +; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v0 +; VI-NEXT: v_lshrrev_b64 v[11:12], 16, v[11:12] +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_cndmask_b32_e32 v12, v3, v5, vcc +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v0 +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[12:13] +; VI-NEXT: v_mov_b32_e32 v1, v11 +; VI-NEXT: v_mov_b32_e32 v3, v10 +; VI-NEXT: v_mov_b32_e32 v5, v9 +; VI-NEXT: v_mov_b32_e32 v7, v8 ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB23_3: ; VI-NEXT: s_branch .LBB23_2 @@ -5074,221 +5075,225 @@ define <32 x i8> @bitcast_v8i32_to_v32i8(<8 x i32> %a, i32 %b) #0 { ; VI-LABEL: bitcast_v8i32_to_v32i8: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: v_mov_b32_e32 v33, v5 -; VI-NEXT: v_mov_b32_e32 v32, v4 -; VI-NEXT: v_mov_b32_e32 v35, v3 -; VI-NEXT: v_mov_b32_e32 v34, v2 +; VI-NEXT: v_mov_b32_e32 v33, v7 +; VI-NEXT: v_mov_b32_e32 v32, v6 +; VI-NEXT: v_mov_b32_e32 v35, v5 +; VI-NEXT: v_mov_b32_e32 v34, v4 +; VI-NEXT: v_mov_b32_e32 v37, v3 +; VI-NEXT: v_mov_b32_e32 v36, v2 +; VI-NEXT: v_mov_b32_e32 v39, v1 +; VI-NEXT: v_mov_b32_e32 v38, v0 ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr1 ; VI-NEXT: ; implicit-def: $vgpr2 +; VI-NEXT: ; implicit-def: $vgpr3 ; VI-NEXT: ; implicit-def: $vgpr5 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr6 +; VI-NEXT: ; implicit-def: $vgpr7 ; VI-NEXT: ; implicit-def: $vgpr9 ; VI-NEXT: ; implicit-def: $vgpr10 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr13 ; VI-NEXT: ; implicit-def: $vgpr14 ; VI-NEXT: ; implicit-def: $vgpr15 ; VI-NEXT: ; implicit-def: $vgpr17 ; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr25 ; VI-NEXT: ; implicit-def: $vgpr26 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr30 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr3 -; VI-NEXT: ; implicit-def: $vgpr11 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB24_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: .LBB24_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB24_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 +; VI-NEXT: v_add_u32_e32 v39, vcc, 3, v39 +; VI-NEXT: v_add_u32_e32 v38, vcc, 3, v38 +; VI-NEXT: v_add_u32_e32 v37, vcc, 3, v37 +; VI-NEXT: v_add_u32_e32 v36, vcc, 3, v36 ; VI-NEXT: v_add_u32_e32 v35, vcc, 3, v35 ; VI-NEXT: v_add_u32_e32 v34, vcc, 3, v34 ; VI-NEXT: v_add_u32_e32 v33, vcc, 3, v33 ; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v32 -; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7 -; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: .LBB24_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] -; VI-NEXT: v_mov_b32_e32 v4, v1 -; VI-NEXT: v_mov_b32_e32 v8, v34 -; VI-NEXT: v_mov_b32_e32 v12, v35 -; VI-NEXT: v_mov_b32_e32 v16, v32 -; VI-NEXT: v_mov_b32_e32 v20, v33 -; VI-NEXT: v_mov_b32_e32 v24, v6 -; VI-NEXT: v_mov_b32_e32 v28, v7 -; VI-NEXT: v_mov_b32_e32 v1, v38 -; VI-NEXT: v_mov_b32_e32 v6, v37 -; VI-NEXT: v_mov_b32_e32 v7, v36 +; VI-NEXT: v_mov_b32_e32 v0, v38 +; VI-NEXT: v_mov_b32_e32 v4, v39 +; VI-NEXT: v_mov_b32_e32 v8, v36 +; VI-NEXT: v_mov_b32_e32 v12, v37 +; VI-NEXT: v_mov_b32_e32 v16, v34 +; VI-NEXT: v_mov_b32_e32 v20, v35 +; VI-NEXT: v_mov_b32_e32 v24, v32 +; VI-NEXT: v_mov_b32_e32 v28, v33 ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v8i32_to_v32i8: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_mov_b32_e32 v33, v5 -; GFX9-NEXT: v_mov_b32_e32 v32, v4 -; GFX9-NEXT: v_mov_b32_e32 v35, v3 -; GFX9-NEXT: v_mov_b32_e32 v34, v2 +; GFX9-NEXT: v_mov_b32_e32 v33, v7 +; GFX9-NEXT: v_mov_b32_e32 v32, v6 +; GFX9-NEXT: v_mov_b32_e32 v35, v5 +; GFX9-NEXT: v_mov_b32_e32 v34, v4 +; GFX9-NEXT: v_mov_b32_e32 v37, v3 +; GFX9-NEXT: v_mov_b32_e32 v36, v2 +; GFX9-NEXT: v_mov_b32_e32 v39, v1 +; GFX9-NEXT: v_mov_b32_e32 v38, v0 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; GFX9-NEXT: ; implicit-def: $vgpr38 +; GFX9-NEXT: ; implicit-def: $vgpr1 ; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr3 ; GFX9-NEXT: ; implicit-def: $vgpr5 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr6 +; GFX9-NEXT: ; implicit-def: $vgpr7 ; GFX9-NEXT: ; implicit-def: $vgpr9 ; GFX9-NEXT: ; implicit-def: $vgpr10 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr13 ; GFX9-NEXT: ; implicit-def: $vgpr14 ; GFX9-NEXT: ; implicit-def: $vgpr15 ; GFX9-NEXT: ; implicit-def: $vgpr17 ; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr25 ; GFX9-NEXT: ; implicit-def: $vgpr26 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr30 ; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr3 -; GFX9-NEXT: ; implicit-def: $vgpr11 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB24_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB24_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB24_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 +; GFX9-NEXT: v_add_u32_e32 v39, 3, v39 +; GFX9-NEXT: v_add_u32_e32 v38, 3, v38 +; GFX9-NEXT: v_add_u32_e32 v37, 3, v37 +; GFX9-NEXT: v_add_u32_e32 v36, 3, v36 ; GFX9-NEXT: v_add_u32_e32 v35, 3, v35 ; GFX9-NEXT: v_add_u32_e32 v34, 3, v34 ; GFX9-NEXT: v_add_u32_e32 v33, 3, v33 ; GFX9-NEXT: v_add_u32_e32 v32, 3, v32 -; GFX9-NEXT: v_add_u32_e32 v7, 3, v7 -; GFX9-NEXT: v_add_u32_e32 v6, 3, v6 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB24_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] -; GFX9-NEXT: v_mov_b32_e32 v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v8, v34 -; GFX9-NEXT: v_mov_b32_e32 v12, v35 -; GFX9-NEXT: v_mov_b32_e32 v16, v32 -; GFX9-NEXT: v_mov_b32_e32 v20, v33 -; GFX9-NEXT: v_mov_b32_e32 v24, v6 -; GFX9-NEXT: v_mov_b32_e32 v28, v7 -; GFX9-NEXT: v_mov_b32_e32 v1, v38 -; GFX9-NEXT: v_mov_b32_e32 v6, v37 -; GFX9-NEXT: v_mov_b32_e32 v7, v36 +; GFX9-NEXT: v_mov_b32_e32 v0, v38 +; GFX9-NEXT: v_mov_b32_e32 v4, v39 +; GFX9-NEXT: v_mov_b32_e32 v8, v36 +; GFX9-NEXT: v_mov_b32_e32 v12, v37 +; GFX9-NEXT: v_mov_b32_e32 v16, v34 +; GFX9-NEXT: v_mov_b32_e32 v20, v35 +; GFX9-NEXT: v_mov_b32_e32 v24, v32 +; GFX9-NEXT: v_mov_b32_e32 v28, v33 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-TRUE16-LABEL: bitcast_v8i32_to_v32i8: @@ -6342,16 +6347,16 @@ define <8 x i32> @bitcast_v32i8_to_v8i32(<32 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v35 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_mov_b32_e32 v7, 0x300 -; VI-NEXT: v_add_u16_e32 v2, 3, v34 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v33 ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_add_u16_sdwa v1, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_add_u16_e32 v1, 0x300, v2 +; VI-NEXT: v_add_u16_e32 v1, 3, v34 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v33 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v2, 3, v32 ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v31 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 ; VI-NEXT: v_add_u16_sdwa v2, v2, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v8 @@ -8764,8 +8769,8 @@ define inreg <16 x i16> @bitcast_v8f32_to_v16i16_scalar(<8 x float> inreg %a, i3 ; SI-NEXT: v_mov_b32_e32 v10, s8 ; SI-NEXT: v_mov_b32_e32 v11, s10 ; SI-NEXT: .LBB37_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -9546,8 +9551,8 @@ define inreg <16 x half> @bitcast_v8f32_to_v16f16_scalar(<8 x float> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v10, s8 ; SI-NEXT: v_mov_b32_e32 v11, s10 ; SI-NEXT: .LBB41_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -9714,10 +9719,10 @@ define <8 x float> @bitcast_v16f16_to_v8f32(<16 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB42_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v24 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v14 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v23 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v14 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v23 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v22 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -9756,56 +9761,56 @@ define <8 x float> @bitcast_v16f16_to_v8f32(<16 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB42_2 ; SI-NEXT: .LBB42_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v24 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v23 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v23 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v14 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v13 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v22 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v21 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v20 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v21 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v20 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v12 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v17 -; SI-NEXT: v_or_b32_e32 v3, v3, v4 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v19 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v10 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v18 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v17 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v16 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 @@ -10679,18 +10684,18 @@ define <8 x float> @bitcast_v16bf16_to_v8f32(<16 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB46_2 ; SI-NEXT: .LBB46_4: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v22 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v20 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v20 ; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v18 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v19 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 @@ -11373,14 +11378,14 @@ define inreg <8 x float> @bitcast_v16bf16_to_v8f32_scalar(<16 x bfloat> inreg %a ; SI-NEXT: v_mul_f32_e64 v27, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v13, 1.0, s9 ; SI-NEXT: v_mul_f32_e64 v26, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v11, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v25, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v9, 1.0, s5 ; SI-NEXT: s_cbranch_scc0 .LBB47_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v32 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_lshr_b64 v[0:1], v[23:24], 16 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_lshr_b64 v[1:2], v[21:22], 16 ; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v30 ; SI-NEXT: v_lshr_b64 v[2:3], v[19:20], 16 @@ -11399,15 +11404,15 @@ define inreg <8 x float> @bitcast_v16bf16_to_v8f32_scalar(<16 x bfloat> inreg %a ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v32 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v31 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v31 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v30 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v19 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 @@ -11459,153 +11464,154 @@ define inreg <8 x float> @bitcast_v16bf16_to_v8f32_scalar(<16 x bfloat> inreg %a ; VI-NEXT: s_cbranch_execnz .LBB47_4 ; VI-NEXT: .LBB47_2: ; %cmp.true ; VI-NEXT: s_lshl_b32 s4, s23, 16 -; VI-NEXT: v_mov_b32_e32 v8, 0x40c00000 -; VI-NEXT: v_add_f32_e32 v0, s4, v8 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v8 +; VI-NEXT: v_mov_b32_e32 v0, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: s_lshl_b32 s4, s21, 16 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[2:3] -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v9, v3, v4, vcc +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s20, 16 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s19, 16 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[2:3] -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v11, v3, v5, vcc +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s18, 16 -; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[2:3] +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s17, 16 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v13, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_cndmask_b32_e32 v11, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s16, 16 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s16, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v8 -; VI-NEXT: v_bfe_u32 v7, v3, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v7 -; VI-NEXT: v_lshrrev_b64 v[7:8], 16, v[0:1] -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[11:12] -; VI-NEXT: v_cndmask_b32_e32 v1, v16, v17, vcc -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[13:14] -; VI-NEXT: v_cndmask_b32_e64 v0, v5, v15, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_mov_b32_e32 v1, v10 -; VI-NEXT: v_mov_b32_e32 v3, v9 -; VI-NEXT: v_mov_b32_e32 v5, v8 +; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v0 +; VI-NEXT: v_lshrrev_b64 v[11:12], 16, v[11:12] +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_cndmask_b32_e32 v12, v3, v5, vcc +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v0 +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[12:13] +; VI-NEXT: v_mov_b32_e32 v1, v11 +; VI-NEXT: v_mov_b32_e32 v3, v10 +; VI-NEXT: v_mov_b32_e32 v5, v9 +; VI-NEXT: v_mov_b32_e32 v7, v8 ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB47_3: ; VI-NEXT: s_branch .LBB47_2 @@ -12299,221 +12305,225 @@ define <32 x i8> @bitcast_v8f32_to_v32i8(<8 x float> %a, i32 %b) #0 { ; VI-LABEL: bitcast_v8f32_to_v32i8: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: v_mov_b32_e32 v33, v5 -; VI-NEXT: v_mov_b32_e32 v32, v4 -; VI-NEXT: v_mov_b32_e32 v35, v3 -; VI-NEXT: v_mov_b32_e32 v34, v2 +; VI-NEXT: v_mov_b32_e32 v33, v7 +; VI-NEXT: v_mov_b32_e32 v32, v6 +; VI-NEXT: v_mov_b32_e32 v35, v5 +; VI-NEXT: v_mov_b32_e32 v34, v4 +; VI-NEXT: v_mov_b32_e32 v37, v3 +; VI-NEXT: v_mov_b32_e32 v36, v2 +; VI-NEXT: v_mov_b32_e32 v39, v1 +; VI-NEXT: v_mov_b32_e32 v38, v0 ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr1 ; VI-NEXT: ; implicit-def: $vgpr2 +; VI-NEXT: ; implicit-def: $vgpr3 ; VI-NEXT: ; implicit-def: $vgpr5 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr6 +; VI-NEXT: ; implicit-def: $vgpr7 ; VI-NEXT: ; implicit-def: $vgpr9 ; VI-NEXT: ; implicit-def: $vgpr10 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr13 ; VI-NEXT: ; implicit-def: $vgpr14 ; VI-NEXT: ; implicit-def: $vgpr15 ; VI-NEXT: ; implicit-def: $vgpr17 ; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr25 ; VI-NEXT: ; implicit-def: $vgpr26 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr30 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr3 -; VI-NEXT: ; implicit-def: $vgpr11 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB48_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: .LBB48_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB48_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: v_add_f32_e32 v1, 1.0, v1 -; VI-NEXT: v_add_f32_e32 v0, 1.0, v0 +; VI-NEXT: v_add_f32_e32 v39, 1.0, v39 +; VI-NEXT: v_add_f32_e32 v38, 1.0, v38 +; VI-NEXT: v_add_f32_e32 v37, 1.0, v37 +; VI-NEXT: v_add_f32_e32 v36, 1.0, v36 ; VI-NEXT: v_add_f32_e32 v35, 1.0, v35 ; VI-NEXT: v_add_f32_e32 v34, 1.0, v34 ; VI-NEXT: v_add_f32_e32 v33, 1.0, v33 ; VI-NEXT: v_add_f32_e32 v32, 1.0, v32 -; VI-NEXT: v_add_f32_e32 v7, 1.0, v7 -; VI-NEXT: v_add_f32_e32 v6, 1.0, v6 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: .LBB48_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] -; VI-NEXT: v_mov_b32_e32 v4, v1 -; VI-NEXT: v_mov_b32_e32 v8, v34 -; VI-NEXT: v_mov_b32_e32 v12, v35 -; VI-NEXT: v_mov_b32_e32 v16, v32 -; VI-NEXT: v_mov_b32_e32 v20, v33 -; VI-NEXT: v_mov_b32_e32 v24, v6 -; VI-NEXT: v_mov_b32_e32 v28, v7 -; VI-NEXT: v_mov_b32_e32 v1, v38 -; VI-NEXT: v_mov_b32_e32 v6, v37 -; VI-NEXT: v_mov_b32_e32 v7, v36 +; VI-NEXT: v_mov_b32_e32 v0, v38 +; VI-NEXT: v_mov_b32_e32 v4, v39 +; VI-NEXT: v_mov_b32_e32 v8, v36 +; VI-NEXT: v_mov_b32_e32 v12, v37 +; VI-NEXT: v_mov_b32_e32 v16, v34 +; VI-NEXT: v_mov_b32_e32 v20, v35 +; VI-NEXT: v_mov_b32_e32 v24, v32 +; VI-NEXT: v_mov_b32_e32 v28, v33 ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v8f32_to_v32i8: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_mov_b32_e32 v33, v5 -; GFX9-NEXT: v_mov_b32_e32 v32, v4 -; GFX9-NEXT: v_mov_b32_e32 v35, v3 -; GFX9-NEXT: v_mov_b32_e32 v34, v2 +; GFX9-NEXT: v_mov_b32_e32 v33, v7 +; GFX9-NEXT: v_mov_b32_e32 v32, v6 +; GFX9-NEXT: v_mov_b32_e32 v35, v5 +; GFX9-NEXT: v_mov_b32_e32 v34, v4 +; GFX9-NEXT: v_mov_b32_e32 v37, v3 +; GFX9-NEXT: v_mov_b32_e32 v36, v2 +; GFX9-NEXT: v_mov_b32_e32 v39, v1 +; GFX9-NEXT: v_mov_b32_e32 v38, v0 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; GFX9-NEXT: ; implicit-def: $vgpr38 +; GFX9-NEXT: ; implicit-def: $vgpr1 ; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr3 ; GFX9-NEXT: ; implicit-def: $vgpr5 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr6 +; GFX9-NEXT: ; implicit-def: $vgpr7 ; GFX9-NEXT: ; implicit-def: $vgpr9 ; GFX9-NEXT: ; implicit-def: $vgpr10 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr13 ; GFX9-NEXT: ; implicit-def: $vgpr14 ; GFX9-NEXT: ; implicit-def: $vgpr15 ; GFX9-NEXT: ; implicit-def: $vgpr17 ; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr25 ; GFX9-NEXT: ; implicit-def: $vgpr26 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr30 ; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr3 -; GFX9-NEXT: ; implicit-def: $vgpr11 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB48_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB48_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB48_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1 -; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v0 +; GFX9-NEXT: v_add_f32_e32 v39, 1.0, v39 +; GFX9-NEXT: v_add_f32_e32 v38, 1.0, v38 +; GFX9-NEXT: v_add_f32_e32 v37, 1.0, v37 +; GFX9-NEXT: v_add_f32_e32 v36, 1.0, v36 ; GFX9-NEXT: v_add_f32_e32 v35, 1.0, v35 ; GFX9-NEXT: v_add_f32_e32 v34, 1.0, v34 ; GFX9-NEXT: v_add_f32_e32 v33, 1.0, v33 ; GFX9-NEXT: v_add_f32_e32 v32, 1.0, v32 -; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7 -; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB48_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] -; GFX9-NEXT: v_mov_b32_e32 v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v8, v34 -; GFX9-NEXT: v_mov_b32_e32 v12, v35 -; GFX9-NEXT: v_mov_b32_e32 v16, v32 -; GFX9-NEXT: v_mov_b32_e32 v20, v33 -; GFX9-NEXT: v_mov_b32_e32 v24, v6 -; GFX9-NEXT: v_mov_b32_e32 v28, v7 -; GFX9-NEXT: v_mov_b32_e32 v1, v38 -; GFX9-NEXT: v_mov_b32_e32 v6, v37 -; GFX9-NEXT: v_mov_b32_e32 v7, v36 +; GFX9-NEXT: v_mov_b32_e32 v0, v38 +; GFX9-NEXT: v_mov_b32_e32 v4, v39 +; GFX9-NEXT: v_mov_b32_e32 v8, v36 +; GFX9-NEXT: v_mov_b32_e32 v12, v37 +; GFX9-NEXT: v_mov_b32_e32 v16, v34 +; GFX9-NEXT: v_mov_b32_e32 v20, v35 +; GFX9-NEXT: v_mov_b32_e32 v24, v32 +; GFX9-NEXT: v_mov_b32_e32 v28, v33 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-TRUE16-LABEL: bitcast_v8f32_to_v32i8: @@ -12765,38 +12775,38 @@ define inreg <32 x i8> @bitcast_v8f32_to_v32i8_scalar(<8 x float> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[8:9], s[16:17], 8 ; SI-NEXT: s_cbranch_execnz .LBB49_4 ; SI-NEXT: .LBB49_2: ; %cmp.true -; SI-NEXT: v_add_f32_e64 v39, s17, 1.0 -; SI-NEXT: v_add_f32_e64 v38, s16, 1.0 -; SI-NEXT: v_add_f32_e64 v49, s23, 1.0 -; SI-NEXT: v_add_f32_e64 v48, s22, 1.0 -; SI-NEXT: v_add_f32_e64 v35, s19, 1.0 -; SI-NEXT: v_add_f32_e64 v34, s18, 1.0 +; SI-NEXT: v_add_f32_e64 v39, s19, 1.0 +; SI-NEXT: v_add_f32_e64 v38, s18, 1.0 ; SI-NEXT: v_add_f32_e64 v37, s21, 1.0 ; SI-NEXT: v_add_f32_e64 v36, s20, 1.0 -; SI-NEXT: v_lshr_b64 v[27:28], v[48:49], 24 -; SI-NEXT: v_lshr_b64 v[24:25], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[0:1], v[38:39], 16 -; SI-NEXT: v_lshr_b64 v[25:26], v[48:49], 8 +; SI-NEXT: v_add_f32_e64 v35, s23, 1.0 +; SI-NEXT: v_add_f32_e64 v34, s22, 1.0 +; SI-NEXT: v_add_f32_e64 v49, s17, 1.0 +; SI-NEXT: v_add_f32_e64 v48, s16, 1.0 +; SI-NEXT: v_lshr_b64 v[27:28], v[34:35], 24 ; SI-NEXT: v_lshr_b64 v[19:20], v[36:37], 24 +; SI-NEXT: v_lshr_b64 v[11:12], v[38:39], 24 +; SI-NEXT: v_lshr_b64 v[32:33], v[34:35], 16 +; SI-NEXT: v_lshr_b64 v[25:26], v[34:35], 8 ; SI-NEXT: v_lshr_b64 v[28:29], v[36:37], 16 ; SI-NEXT: v_lshr_b64 v[17:18], v[36:37], 8 -; SI-NEXT: v_lshr_b64 v[11:12], v[34:35], 24 -; SI-NEXT: v_lshr_b64 v[32:33], v[34:35], 16 -; SI-NEXT: v_lshr_b64 v[9:10], v[34:35], 8 -; SI-NEXT: v_lshr_b64 v[3:4], v[38:39], 24 -; SI-NEXT: v_lshr_b64 v[1:2], v[38:39], 8 -; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v49 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v49 -; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v49 +; SI-NEXT: v_lshr_b64 v[20:21], v[38:39], 16 +; SI-NEXT: v_lshr_b64 v[9:10], v[38:39], 8 +; SI-NEXT: v_lshr_b64 v[3:4], v[48:49], 24 +; SI-NEXT: v_lshr_b64 v[12:13], v[48:49], 16 +; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 8 +; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v35 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v35 +; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v35 ; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v37 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v37 ; SI-NEXT: v_lshrrev_b32_e32 v21, 8, v37 -; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; SI-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 -; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v39 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v39 +; SI-NEXT: v_lshrrev_b32_e32 v13, 8, v39 +; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v49 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v49 +; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v49 ; SI-NEXT: s_branch .LBB49_5 ; SI-NEXT: .LBB49_3: ; SI-NEXT: ; implicit-def: $sgpr8 @@ -12825,14 +12835,14 @@ define inreg <32 x i8> @bitcast_v8f32_to_v32i8_scalar(<8 x float> inreg %a, i32 ; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: s_branch .LBB49_2 ; SI-NEXT: .LBB49_4: -; SI-NEXT: v_mov_b32_e32 v38, s16 -; SI-NEXT: v_mov_b32_e32 v39, s17 -; SI-NEXT: v_mov_b32_e32 v34, s18 -; SI-NEXT: v_mov_b32_e32 v35, s19 +; SI-NEXT: v_mov_b32_e32 v48, s16 +; SI-NEXT: v_mov_b32_e32 v49, s17 +; SI-NEXT: v_mov_b32_e32 v38, s18 +; SI-NEXT: v_mov_b32_e32 v39, s19 ; SI-NEXT: v_mov_b32_e32 v36, s20 ; SI-NEXT: v_mov_b32_e32 v37, s21 -; SI-NEXT: v_mov_b32_e32 v48, s22 -; SI-NEXT: v_mov_b32_e32 v49, s23 +; SI-NEXT: v_mov_b32_e32 v34, s22 +; SI-NEXT: v_mov_b32_e32 v35, s23 ; SI-NEXT: v_mov_b32_e32 v5, s59 ; SI-NEXT: v_mov_b32_e32 v6, s57 ; SI-NEXT: v_mov_b32_e32 v7, s56 @@ -12846,30 +12856,30 @@ define inreg <32 x i8> @bitcast_v8f32_to_v32i8_scalar(<8 x float> inreg %a, i32 ; SI-NEXT: v_mov_b32_e32 v30, s74 ; SI-NEXT: v_mov_b32_e32 v31, s72 ; SI-NEXT: v_mov_b32_e32 v27, s40 -; SI-NEXT: v_mov_b32_e32 v24, s42 +; SI-NEXT: v_mov_b32_e32 v32, s42 ; SI-NEXT: v_mov_b32_e32 v25, s44 ; SI-NEXT: v_mov_b32_e32 v19, s24 ; SI-NEXT: v_mov_b32_e32 v28, s26 ; SI-NEXT: v_mov_b32_e32 v17, s28 ; SI-NEXT: v_mov_b32_e32 v11, s10 -; SI-NEXT: v_mov_b32_e32 v32, s12 +; SI-NEXT: v_mov_b32_e32 v20, s12 ; SI-NEXT: v_mov_b32_e32 v9, s14 ; SI-NEXT: v_mov_b32_e32 v3, s4 -; SI-NEXT: v_mov_b32_e32 v0, s6 +; SI-NEXT: v_mov_b32_e32 v12, s6 ; SI-NEXT: v_mov_b32_e32 v1, s8 ; SI-NEXT: .LBB49_5: ; %end -; SI-NEXT: v_mov_b32_e32 v2, v0 -; SI-NEXT: v_mov_b32_e32 v0, v38 -; SI-NEXT: v_mov_b32_e32 v4, v39 -; SI-NEXT: v_mov_b32_e32 v10, v32 -; SI-NEXT: v_mov_b32_e32 v8, v34 -; SI-NEXT: v_mov_b32_e32 v12, v35 -; SI-NEXT: v_mov_b32_e32 v18, v28 +; SI-NEXT: v_mov_b32_e32 v0, v48 +; SI-NEXT: v_mov_b32_e32 v2, v12 +; SI-NEXT: v_mov_b32_e32 v4, v49 +; SI-NEXT: v_mov_b32_e32 v8, v38 +; SI-NEXT: v_mov_b32_e32 v10, v20 +; SI-NEXT: v_mov_b32_e32 v12, v39 ; SI-NEXT: v_mov_b32_e32 v16, v36 +; SI-NEXT: v_mov_b32_e32 v18, v28 ; SI-NEXT: v_mov_b32_e32 v20, v37 -; SI-NEXT: v_mov_b32_e32 v26, v24 -; SI-NEXT: v_mov_b32_e32 v24, v48 -; SI-NEXT: v_mov_b32_e32 v28, v49 +; SI-NEXT: v_mov_b32_e32 v24, v34 +; SI-NEXT: v_mov_b32_e32 v26, v32 +; SI-NEXT: v_mov_b32_e32 v28, v35 ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v8f32_to_v32i8_scalar: @@ -12904,38 +12914,38 @@ define inreg <32 x i8> @bitcast_v8f32_to_v32i8_scalar(<8 x float> inreg %a, i32 ; VI-NEXT: s_lshr_b64 s[4:5], s[16:17], 24 ; VI-NEXT: s_cbranch_execnz .LBB49_4 ; VI-NEXT: .LBB49_2: ; %cmp.true -; VI-NEXT: v_add_f32_e64 v1, s17, 1.0 -; VI-NEXT: v_add_f32_e64 v0, s16, 1.0 -; VI-NEXT: v_add_f32_e64 v9, s19, 1.0 -; VI-NEXT: v_add_f32_e64 v8, s18, 1.0 -; VI-NEXT: v_add_f32_e64 v17, s21, 1.0 -; VI-NEXT: v_add_f32_e64 v16, s20, 1.0 -; VI-NEXT: v_add_f32_e64 v25, s23, 1.0 -; VI-NEXT: v_add_f32_e64 v24, s22, 1.0 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[24:25] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[16:17] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v25 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v25 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v25 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v24 -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v24 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v17 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v17 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v17 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v16 -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v9 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v0 +; VI-NEXT: v_add_f32_e64 v39, s17, 1.0 +; VI-NEXT: v_add_f32_e64 v38, s16, 1.0 +; VI-NEXT: v_add_f32_e64 v37, s19, 1.0 +; VI-NEXT: v_add_f32_e64 v36, s18, 1.0 +; VI-NEXT: v_add_f32_e64 v35, s21, 1.0 +; VI-NEXT: v_add_f32_e64 v34, s20, 1.0 +; VI-NEXT: v_add_f32_e64 v33, s23, 1.0 +; VI-NEXT: v_add_f32_e64 v32, s22, 1.0 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: s_branch .LBB49_5 ; VI-NEXT: .LBB49_3: ; VI-NEXT: ; implicit-def: $sgpr59 @@ -12964,30 +12974,30 @@ define inreg <32 x i8> @bitcast_v8f32_to_v32i8_scalar(<8 x float> inreg %a, i32 ; VI-NEXT: ; implicit-def: $sgpr14 ; VI-NEXT: s_branch .LBB49_2 ; VI-NEXT: .LBB49_4: -; VI-NEXT: v_mov_b32_e32 v0, s16 -; VI-NEXT: v_mov_b32_e32 v1, s17 -; VI-NEXT: v_mov_b32_e32 v8, s18 -; VI-NEXT: v_mov_b32_e32 v9, s19 -; VI-NEXT: v_mov_b32_e32 v16, s20 -; VI-NEXT: v_mov_b32_e32 v17, s21 -; VI-NEXT: v_mov_b32_e32 v24, s22 -; VI-NEXT: v_mov_b32_e32 v25, s23 -; VI-NEXT: v_mov_b32_e32 v35, s59 +; VI-NEXT: v_mov_b32_e32 v38, s16 +; VI-NEXT: v_mov_b32_e32 v39, s17 +; VI-NEXT: v_mov_b32_e32 v36, s18 +; VI-NEXT: v_mov_b32_e32 v37, s19 +; VI-NEXT: v_mov_b32_e32 v34, s20 +; VI-NEXT: v_mov_b32_e32 v35, s21 +; VI-NEXT: v_mov_b32_e32 v32, s22 +; VI-NEXT: v_mov_b32_e32 v33, s23 +; VI-NEXT: v_mov_b32_e32 v1, s59 ; VI-NEXT: v_mov_b32_e32 v2, s57 ; VI-NEXT: v_mov_b32_e32 v5, s58 ; VI-NEXT: v_mov_b32_e32 v6, s56 ; VI-NEXT: v_mov_b32_e32 v7, s47 -; VI-NEXT: v_mov_b32_e32 v34, s46 +; VI-NEXT: v_mov_b32_e32 v9, s46 ; VI-NEXT: v_mov_b32_e32 v10, s44 ; VI-NEXT: v_mov_b32_e32 v13, s45 ; VI-NEXT: v_mov_b32_e32 v14, s43 ; VI-NEXT: v_mov_b32_e32 v15, s42 -; VI-NEXT: v_mov_b32_e32 v33, s41 +; VI-NEXT: v_mov_b32_e32 v17, s41 ; VI-NEXT: v_mov_b32_e32 v18, s29 ; VI-NEXT: v_mov_b32_e32 v21, s40 ; VI-NEXT: v_mov_b32_e32 v22, s28 ; VI-NEXT: v_mov_b32_e32 v23, s27 -; VI-NEXT: v_mov_b32_e32 v32, s26 +; VI-NEXT: v_mov_b32_e32 v25, s26 ; VI-NEXT: v_mov_b32_e32 v26, s24 ; VI-NEXT: v_mov_b32_e32 v29, s25 ; VI-NEXT: v_mov_b32_e32 v30, s15 @@ -12997,14 +13007,14 @@ define inreg <32 x i8> @bitcast_v8f32_to_v32i8_scalar(<8 x float> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v11, s6 ; VI-NEXT: v_mov_b32_e32 v3, s4 ; VI-NEXT: .LBB49_5: ; %end -; VI-NEXT: v_mov_b32_e32 v4, v1 -; VI-NEXT: v_mov_b32_e32 v12, v9 -; VI-NEXT: v_mov_b32_e32 v20, v17 -; VI-NEXT: v_mov_b32_e32 v28, v25 -; VI-NEXT: v_mov_b32_e32 v1, v35 -; VI-NEXT: v_mov_b32_e32 v9, v34 -; VI-NEXT: v_mov_b32_e32 v17, v33 -; VI-NEXT: v_mov_b32_e32 v25, v32 +; VI-NEXT: v_mov_b32_e32 v0, v38 +; VI-NEXT: v_mov_b32_e32 v4, v39 +; VI-NEXT: v_mov_b32_e32 v8, v36 +; VI-NEXT: v_mov_b32_e32 v12, v37 +; VI-NEXT: v_mov_b32_e32 v16, v34 +; VI-NEXT: v_mov_b32_e32 v20, v35 +; VI-NEXT: v_mov_b32_e32 v24, v32 +; VI-NEXT: v_mov_b32_e32 v28, v33 ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v8f32_to_v32i8_scalar: @@ -13039,38 +13049,38 @@ define inreg <32 x i8> @bitcast_v8f32_to_v32i8_scalar(<8 x float> inreg %a, i32 ; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB49_4 ; GFX9-NEXT: .LBB49_2: ; %cmp.true -; GFX9-NEXT: v_add_f32_e64 v1, s17, 1.0 -; GFX9-NEXT: v_add_f32_e64 v0, s16, 1.0 -; GFX9-NEXT: v_add_f32_e64 v9, s19, 1.0 -; GFX9-NEXT: v_add_f32_e64 v8, s18, 1.0 -; GFX9-NEXT: v_add_f32_e64 v17, s21, 1.0 -; GFX9-NEXT: v_add_f32_e64 v16, s20, 1.0 -; GFX9-NEXT: v_add_f32_e64 v25, s23, 1.0 -; GFX9-NEXT: v_add_f32_e64 v24, s22, 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[24:25] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[16:17] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v0 +; GFX9-NEXT: v_add_f32_e64 v39, s17, 1.0 +; GFX9-NEXT: v_add_f32_e64 v38, s16, 1.0 +; GFX9-NEXT: v_add_f32_e64 v37, s19, 1.0 +; GFX9-NEXT: v_add_f32_e64 v36, s18, 1.0 +; GFX9-NEXT: v_add_f32_e64 v35, s21, 1.0 +; GFX9-NEXT: v_add_f32_e64 v34, s20, 1.0 +; GFX9-NEXT: v_add_f32_e64 v33, s23, 1.0 +; GFX9-NEXT: v_add_f32_e64 v32, s22, 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: s_branch .LBB49_5 ; GFX9-NEXT: .LBB49_3: ; GFX9-NEXT: ; implicit-def: $sgpr59 @@ -13099,30 +13109,30 @@ define inreg <32 x i8> @bitcast_v8f32_to_v32i8_scalar(<8 x float> inreg %a, i32 ; GFX9-NEXT: ; implicit-def: $sgpr14 ; GFX9-NEXT: s_branch .LBB49_2 ; GFX9-NEXT: .LBB49_4: -; GFX9-NEXT: v_mov_b32_e32 v0, s16 -; GFX9-NEXT: v_mov_b32_e32 v1, s17 -; GFX9-NEXT: v_mov_b32_e32 v8, s18 -; GFX9-NEXT: v_mov_b32_e32 v9, s19 -; GFX9-NEXT: v_mov_b32_e32 v16, s20 -; GFX9-NEXT: v_mov_b32_e32 v17, s21 -; GFX9-NEXT: v_mov_b32_e32 v24, s22 -; GFX9-NEXT: v_mov_b32_e32 v25, s23 -; GFX9-NEXT: v_mov_b32_e32 v35, s59 +; GFX9-NEXT: v_mov_b32_e32 v38, s16 +; GFX9-NEXT: v_mov_b32_e32 v39, s17 +; GFX9-NEXT: v_mov_b32_e32 v36, s18 +; GFX9-NEXT: v_mov_b32_e32 v37, s19 +; GFX9-NEXT: v_mov_b32_e32 v34, s20 +; GFX9-NEXT: v_mov_b32_e32 v35, s21 +; GFX9-NEXT: v_mov_b32_e32 v32, s22 +; GFX9-NEXT: v_mov_b32_e32 v33, s23 +; GFX9-NEXT: v_mov_b32_e32 v1, s59 ; GFX9-NEXT: v_mov_b32_e32 v2, s57 ; GFX9-NEXT: v_mov_b32_e32 v5, s58 ; GFX9-NEXT: v_mov_b32_e32 v6, s56 ; GFX9-NEXT: v_mov_b32_e32 v7, s47 -; GFX9-NEXT: v_mov_b32_e32 v34, s46 +; GFX9-NEXT: v_mov_b32_e32 v9, s46 ; GFX9-NEXT: v_mov_b32_e32 v10, s44 ; GFX9-NEXT: v_mov_b32_e32 v13, s45 ; GFX9-NEXT: v_mov_b32_e32 v14, s43 ; GFX9-NEXT: v_mov_b32_e32 v15, s42 -; GFX9-NEXT: v_mov_b32_e32 v33, s41 +; GFX9-NEXT: v_mov_b32_e32 v17, s41 ; GFX9-NEXT: v_mov_b32_e32 v18, s29 ; GFX9-NEXT: v_mov_b32_e32 v21, s40 ; GFX9-NEXT: v_mov_b32_e32 v22, s28 ; GFX9-NEXT: v_mov_b32_e32 v23, s27 -; GFX9-NEXT: v_mov_b32_e32 v32, s26 +; GFX9-NEXT: v_mov_b32_e32 v25, s26 ; GFX9-NEXT: v_mov_b32_e32 v26, s24 ; GFX9-NEXT: v_mov_b32_e32 v29, s25 ; GFX9-NEXT: v_mov_b32_e32 v30, s15 @@ -13132,14 +13142,14 @@ define inreg <32 x i8> @bitcast_v8f32_to_v32i8_scalar(<8 x float> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v11, s6 ; GFX9-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NEXT: .LBB49_5: ; %end -; GFX9-NEXT: v_mov_b32_e32 v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v12, v9 -; GFX9-NEXT: v_mov_b32_e32 v20, v17 -; GFX9-NEXT: v_mov_b32_e32 v28, v25 -; GFX9-NEXT: v_mov_b32_e32 v1, v35 -; GFX9-NEXT: v_mov_b32_e32 v9, v34 -; GFX9-NEXT: v_mov_b32_e32 v17, v33 -; GFX9-NEXT: v_mov_b32_e32 v25, v32 +; GFX9-NEXT: v_mov_b32_e32 v0, v38 +; GFX9-NEXT: v_mov_b32_e32 v4, v39 +; GFX9-NEXT: v_mov_b32_e32 v8, v36 +; GFX9-NEXT: v_mov_b32_e32 v12, v37 +; GFX9-NEXT: v_mov_b32_e32 v16, v34 +; GFX9-NEXT: v_mov_b32_e32 v20, v35 +; GFX9-NEXT: v_mov_b32_e32 v24, v32 +; GFX9-NEXT: v_mov_b32_e32 v28, v33 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-LABEL: bitcast_v8f32_to_v32i8_scalar: @@ -13610,16 +13620,16 @@ define <8 x float> @bitcast_v32i8_to_v8f32(<32 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v35 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_mov_b32_e32 v7, 0x300 -; VI-NEXT: v_add_u16_e32 v2, 3, v34 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v33 ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_add_u16_sdwa v1, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_add_u16_e32 v1, 0x300, v2 +; VI-NEXT: v_add_u16_e32 v1, 3, v34 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v33 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v2, 3, v32 ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v31 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 ; VI-NEXT: v_add_u16_sdwa v2, v2, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v8 @@ -16497,10 +16507,10 @@ define <4 x i64> @bitcast_v16f16_to_v4i64(<16 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB62_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v24 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v14 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v23 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v14 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v23 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v22 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -16539,56 +16549,56 @@ define <4 x i64> @bitcast_v16f16_to_v4i64(<16 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB62_2 ; SI-NEXT: .LBB62_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v24 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v23 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v23 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v14 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v13 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v22 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v21 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v20 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v21 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v20 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v12 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v17 -; SI-NEXT: v_or_b32_e32 v3, v3, v4 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v19 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v10 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v18 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v17 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v16 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 @@ -17445,18 +17455,18 @@ define <4 x i64> @bitcast_v16bf16_to_v4i64(<16 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB66_2 ; SI-NEXT: .LBB66_4: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v22 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v20 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v20 ; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v18 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v19 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 @@ -18139,14 +18149,14 @@ define inreg <4 x i64> @bitcast_v16bf16_to_v4i64_scalar(<16 x bfloat> inreg %a, ; SI-NEXT: v_mul_f32_e64 v27, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v13, 1.0, s9 ; SI-NEXT: v_mul_f32_e64 v26, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v11, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v25, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v9, 1.0, s5 ; SI-NEXT: s_cbranch_scc0 .LBB67_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v32 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_lshr_b64 v[0:1], v[23:24], 16 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_lshr_b64 v[1:2], v[21:22], 16 ; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v30 ; SI-NEXT: v_lshr_b64 v[2:3], v[19:20], 16 @@ -18165,15 +18175,15 @@ define inreg <4 x i64> @bitcast_v16bf16_to_v4i64_scalar(<16 x bfloat> inreg %a, ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v32 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v31 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v31 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v30 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v19 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 @@ -18225,153 +18235,154 @@ define inreg <4 x i64> @bitcast_v16bf16_to_v4i64_scalar(<16 x bfloat> inreg %a, ; VI-NEXT: s_cbranch_execnz .LBB67_4 ; VI-NEXT: .LBB67_2: ; %cmp.true ; VI-NEXT: s_lshl_b32 s4, s23, 16 -; VI-NEXT: v_mov_b32_e32 v8, 0x40c00000 -; VI-NEXT: v_add_f32_e32 v0, s4, v8 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v8 +; VI-NEXT: v_mov_b32_e32 v0, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: s_lshl_b32 s4, s21, 16 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[2:3] -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v9, v3, v4, vcc +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s20, 16 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s19, 16 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[2:3] -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v11, v3, v5, vcc +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s18, 16 -; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[2:3] +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s17, 16 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v13, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_cndmask_b32_e32 v11, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s16, 16 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s16, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v8 -; VI-NEXT: v_bfe_u32 v7, v3, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v7 -; VI-NEXT: v_lshrrev_b64 v[7:8], 16, v[0:1] -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[11:12] -; VI-NEXT: v_cndmask_b32_e32 v1, v16, v17, vcc -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[13:14] -; VI-NEXT: v_cndmask_b32_e64 v0, v5, v15, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_mov_b32_e32 v1, v10 -; VI-NEXT: v_mov_b32_e32 v3, v9 -; VI-NEXT: v_mov_b32_e32 v5, v8 +; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v0 +; VI-NEXT: v_lshrrev_b64 v[11:12], 16, v[11:12] +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_cndmask_b32_e32 v12, v3, v5, vcc +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v0 +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[12:13] +; VI-NEXT: v_mov_b32_e32 v1, v11 +; VI-NEXT: v_mov_b32_e32 v3, v10 +; VI-NEXT: v_mov_b32_e32 v5, v9 +; VI-NEXT: v_mov_b32_e32 v7, v8 ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB67_3: ; VI-NEXT: s_branch .LBB67_2 @@ -19065,221 +19076,225 @@ define <32 x i8> @bitcast_v4i64_to_v32i8(<4 x i64> %a, i32 %b) #0 { ; VI-LABEL: bitcast_v4i64_to_v32i8: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: v_mov_b32_e32 v33, v5 -; VI-NEXT: v_mov_b32_e32 v32, v4 -; VI-NEXT: v_mov_b32_e32 v35, v3 -; VI-NEXT: v_mov_b32_e32 v34, v2 +; VI-NEXT: v_mov_b32_e32 v33, v7 +; VI-NEXT: v_mov_b32_e32 v32, v6 +; VI-NEXT: v_mov_b32_e32 v35, v5 +; VI-NEXT: v_mov_b32_e32 v34, v4 +; VI-NEXT: v_mov_b32_e32 v37, v3 +; VI-NEXT: v_mov_b32_e32 v36, v2 +; VI-NEXT: v_mov_b32_e32 v39, v1 +; VI-NEXT: v_mov_b32_e32 v38, v0 ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr1 ; VI-NEXT: ; implicit-def: $vgpr2 +; VI-NEXT: ; implicit-def: $vgpr3 ; VI-NEXT: ; implicit-def: $vgpr5 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr6 +; VI-NEXT: ; implicit-def: $vgpr7 ; VI-NEXT: ; implicit-def: $vgpr9 ; VI-NEXT: ; implicit-def: $vgpr10 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr13 ; VI-NEXT: ; implicit-def: $vgpr14 ; VI-NEXT: ; implicit-def: $vgpr15 ; VI-NEXT: ; implicit-def: $vgpr17 ; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr25 ; VI-NEXT: ; implicit-def: $vgpr26 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr30 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr3 -; VI-NEXT: ; implicit-def: $vgpr11 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB68_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: .LBB68_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB68_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 -; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc +; VI-NEXT: v_add_u32_e32 v38, vcc, 3, v38 +; VI-NEXT: v_addc_u32_e32 v39, vcc, 0, v39, vcc +; VI-NEXT: v_add_u32_e32 v36, vcc, 3, v36 +; VI-NEXT: v_addc_u32_e32 v37, vcc, 0, v37, vcc ; VI-NEXT: v_add_u32_e32 v34, vcc, 3, v34 ; VI-NEXT: v_addc_u32_e32 v35, vcc, 0, v35, vcc ; VI-NEXT: v_add_u32_e32 v32, vcc, 3, v32 ; VI-NEXT: v_addc_u32_e32 v33, vcc, 0, v33, vcc -; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 -; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: .LBB68_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] -; VI-NEXT: v_mov_b32_e32 v4, v1 -; VI-NEXT: v_mov_b32_e32 v8, v34 -; VI-NEXT: v_mov_b32_e32 v12, v35 -; VI-NEXT: v_mov_b32_e32 v16, v32 -; VI-NEXT: v_mov_b32_e32 v20, v33 -; VI-NEXT: v_mov_b32_e32 v24, v6 -; VI-NEXT: v_mov_b32_e32 v28, v7 -; VI-NEXT: v_mov_b32_e32 v1, v38 -; VI-NEXT: v_mov_b32_e32 v6, v37 -; VI-NEXT: v_mov_b32_e32 v7, v36 +; VI-NEXT: v_mov_b32_e32 v0, v38 +; VI-NEXT: v_mov_b32_e32 v4, v39 +; VI-NEXT: v_mov_b32_e32 v8, v36 +; VI-NEXT: v_mov_b32_e32 v12, v37 +; VI-NEXT: v_mov_b32_e32 v16, v34 +; VI-NEXT: v_mov_b32_e32 v20, v35 +; VI-NEXT: v_mov_b32_e32 v24, v32 +; VI-NEXT: v_mov_b32_e32 v28, v33 ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v4i64_to_v32i8: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_mov_b32_e32 v33, v5 -; GFX9-NEXT: v_mov_b32_e32 v32, v4 -; GFX9-NEXT: v_mov_b32_e32 v35, v3 -; GFX9-NEXT: v_mov_b32_e32 v34, v2 +; GFX9-NEXT: v_mov_b32_e32 v33, v7 +; GFX9-NEXT: v_mov_b32_e32 v32, v6 +; GFX9-NEXT: v_mov_b32_e32 v35, v5 +; GFX9-NEXT: v_mov_b32_e32 v34, v4 +; GFX9-NEXT: v_mov_b32_e32 v37, v3 +; GFX9-NEXT: v_mov_b32_e32 v36, v2 +; GFX9-NEXT: v_mov_b32_e32 v39, v1 +; GFX9-NEXT: v_mov_b32_e32 v38, v0 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; GFX9-NEXT: ; implicit-def: $vgpr38 +; GFX9-NEXT: ; implicit-def: $vgpr1 ; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr3 ; GFX9-NEXT: ; implicit-def: $vgpr5 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr6 +; GFX9-NEXT: ; implicit-def: $vgpr7 ; GFX9-NEXT: ; implicit-def: $vgpr9 ; GFX9-NEXT: ; implicit-def: $vgpr10 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr13 ; GFX9-NEXT: ; implicit-def: $vgpr14 ; GFX9-NEXT: ; implicit-def: $vgpr15 ; GFX9-NEXT: ; implicit-def: $vgpr17 ; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr25 ; GFX9-NEXT: ; implicit-def: $vgpr26 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr30 ; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr3 -; GFX9-NEXT: ; implicit-def: $vgpr11 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB68_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB68_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB68_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 3, v0 -; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc +; GFX9-NEXT: v_add_co_u32_e32 v38, vcc, 3, v38 +; GFX9-NEXT: v_addc_co_u32_e32 v39, vcc, 0, v39, vcc +; GFX9-NEXT: v_add_co_u32_e32 v36, vcc, 3, v36 +; GFX9-NEXT: v_addc_co_u32_e32 v37, vcc, 0, v37, vcc ; GFX9-NEXT: v_add_co_u32_e32 v34, vcc, 3, v34 ; GFX9-NEXT: v_addc_co_u32_e32 v35, vcc, 0, v35, vcc ; GFX9-NEXT: v_add_co_u32_e32 v32, vcc, 3, v32 ; GFX9-NEXT: v_addc_co_u32_e32 v33, vcc, 0, v33, vcc -; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, 3, v6 -; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v7, vcc -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB68_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] -; GFX9-NEXT: v_mov_b32_e32 v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v8, v34 -; GFX9-NEXT: v_mov_b32_e32 v12, v35 -; GFX9-NEXT: v_mov_b32_e32 v16, v32 -; GFX9-NEXT: v_mov_b32_e32 v20, v33 -; GFX9-NEXT: v_mov_b32_e32 v24, v6 -; GFX9-NEXT: v_mov_b32_e32 v28, v7 -; GFX9-NEXT: v_mov_b32_e32 v1, v38 -; GFX9-NEXT: v_mov_b32_e32 v6, v37 -; GFX9-NEXT: v_mov_b32_e32 v7, v36 +; GFX9-NEXT: v_mov_b32_e32 v0, v38 +; GFX9-NEXT: v_mov_b32_e32 v4, v39 +; GFX9-NEXT: v_mov_b32_e32 v8, v36 +; GFX9-NEXT: v_mov_b32_e32 v12, v37 +; GFX9-NEXT: v_mov_b32_e32 v16, v34 +; GFX9-NEXT: v_mov_b32_e32 v20, v35 +; GFX9-NEXT: v_mov_b32_e32 v24, v32 +; GFX9-NEXT: v_mov_b32_e32 v28, v33 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-TRUE16-LABEL: bitcast_v4i64_to_v32i8: @@ -20339,16 +20354,16 @@ define <4 x i64> @bitcast_v32i8_to_v4i64(<32 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v35 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_mov_b32_e32 v7, 0x300 -; VI-NEXT: v_add_u16_e32 v2, 3, v34 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v33 ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_add_u16_sdwa v1, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_add_u16_e32 v1, 0x300, v2 +; VI-NEXT: v_add_u16_e32 v1, 3, v34 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v33 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v2, 3, v32 ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v31 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 ; VI-NEXT: v_add_u16_sdwa v2, v2, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v8 @@ -21841,8 +21856,8 @@ define inreg <16 x i16> @bitcast_v4f64_to_v16i16_scalar(<4 x double> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v9, s6 ; SI-NEXT: v_mov_b32_e32 v8, s4 ; SI-NEXT: .LBB73_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -22598,8 +22613,8 @@ define inreg <16 x half> @bitcast_v4f64_to_v16f16_scalar(<4 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v9, s6 ; SI-NEXT: v_mov_b32_e32 v8, s4 ; SI-NEXT: .LBB77_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -22754,10 +22769,10 @@ define <4 x double> @bitcast_v16f16_to_v4f64(<16 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB78_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v24 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v14 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v23 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v14 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v23 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v22 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -22796,56 +22811,56 @@ define <4 x double> @bitcast_v16f16_to_v4f64(<16 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB78_2 ; SI-NEXT: .LBB78_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v24 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v23 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v23 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v14 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v13 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v22 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v21 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v20 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v21 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v20 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v12 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v17 -; SI-NEXT: v_or_b32_e32 v3, v3, v4 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v19 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v10 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v18 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v17 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v16 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 @@ -23690,18 +23705,18 @@ define <4 x double> @bitcast_v16bf16_to_v4f64(<16 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB82_2 ; SI-NEXT: .LBB82_4: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v22 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v20 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v20 ; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v18 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v19 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 @@ -24384,14 +24399,14 @@ define inreg <4 x double> @bitcast_v16bf16_to_v4f64_scalar(<16 x bfloat> inreg % ; SI-NEXT: v_mul_f32_e64 v27, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v13, 1.0, s9 ; SI-NEXT: v_mul_f32_e64 v26, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v25, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v11, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v25, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v9, 1.0, s5 ; SI-NEXT: s_cbranch_scc0 .LBB83_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v32 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_lshr_b64 v[0:1], v[23:24], 16 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_lshr_b64 v[1:2], v[21:22], 16 ; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v30 ; SI-NEXT: v_lshr_b64 v[2:3], v[19:20], 16 @@ -24410,15 +24425,15 @@ define inreg <4 x double> @bitcast_v16bf16_to_v4f64_scalar(<16 x bfloat> inreg % ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v32 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v31 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v21 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v31 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v30 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v19 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 @@ -24470,153 +24485,154 @@ define inreg <4 x double> @bitcast_v16bf16_to_v4f64_scalar(<16 x bfloat> inreg % ; VI-NEXT: s_cbranch_execnz .LBB83_4 ; VI-NEXT: .LBB83_2: ; %cmp.true ; VI-NEXT: s_lshl_b32 s4, s23, 16 -; VI-NEXT: v_mov_b32_e32 v8, 0x40c00000 -; VI-NEXT: v_add_f32_e32 v0, s4, v8 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v8 +; VI-NEXT: v_mov_b32_e32 v0, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: s_lshl_b32 s4, s21, 16 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[2:3] -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v9, v3, v4, vcc +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s20, 16 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s19, 16 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[2:3] -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v11, v3, v5, vcc +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s18, 16 -; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v8 +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[2:3] +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s17, 16 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_cndmask_b32_e32 v13, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_cndmask_b32_e32 v11, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s16, 16 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v8 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s16, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v8 -; VI-NEXT: v_bfe_u32 v7, v3, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v7 -; VI-NEXT: v_lshrrev_b64 v[7:8], 16, v[0:1] -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[11:12] -; VI-NEXT: v_cndmask_b32_e32 v1, v16, v17, vcc -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[13:14] -; VI-NEXT: v_cndmask_b32_e64 v0, v5, v15, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_mov_b32_e32 v1, v10 -; VI-NEXT: v_mov_b32_e32 v3, v9 -; VI-NEXT: v_mov_b32_e32 v5, v8 +; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v0 +; VI-NEXT: v_lshrrev_b64 v[11:12], 16, v[11:12] +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_cndmask_b32_e32 v12, v3, v5, vcc +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v0 +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[12:13] +; VI-NEXT: v_mov_b32_e32 v1, v11 +; VI-NEXT: v_mov_b32_e32 v3, v10 +; VI-NEXT: v_mov_b32_e32 v5, v9 +; VI-NEXT: v_mov_b32_e32 v7, v8 ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB83_3: ; VI-NEXT: s_branch .LBB83_2 @@ -25206,15 +25222,21 @@ define <32 x i8> @bitcast_v4f64_to_v32i8(<4 x double> %a, i32 %b) #0 { ; SI-LABEL: bitcast_v4f64_to_v32i8: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; SI-NEXT: v_mov_b32_e32 v33, v7 +; SI-NEXT: v_mov_b32_e32 v32, v6 ; SI-NEXT: v_mov_b32_e32 v35, v5 ; SI-NEXT: v_mov_b32_e32 v34, v4 +; SI-NEXT: v_mov_b32_e32 v37, v3 +; SI-NEXT: v_mov_b32_e32 v36, v2 +; SI-NEXT: v_mov_b32_e32 v39, v1 +; SI-NEXT: v_mov_b32_e32 v38, v0 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr2 +; SI-NEXT: ; implicit-def: $vgpr3 ; SI-NEXT: ; implicit-def: $vgpr5 -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr6 +; SI-NEXT: ; implicit-def: $vgpr7 ; SI-NEXT: ; implicit-def: $vgpr9 ; SI-NEXT: ; implicit-def: $vgpr10 ; SI-NEXT: ; implicit-def: $vgpr11 @@ -25237,288 +25259,288 @@ define <32 x i8> @bitcast_v4f64_to_v32i8(<4 x double> %a, i32 %b) #0 { ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB84_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_alignbit_b32 v27, v7, v6, 24 -; SI-NEXT: v_alignbit_b32 v26, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v25, v7, v6, 8 +; SI-NEXT: v_alignbit_b32 v27, v33, v32, 24 +; SI-NEXT: v_alignbit_b32 v26, v33, v32, 16 +; SI-NEXT: v_alignbit_b32 v25, v33, v32, 8 ; SI-NEXT: v_alignbit_b32 v19, v35, v34, 24 ; SI-NEXT: v_alignbit_b32 v18, v35, v34, 16 ; SI-NEXT: v_alignbit_b32 v17, v35, v34, 8 -; SI-NEXT: v_alignbit_b32 v11, v3, v2, 24 -; SI-NEXT: v_alignbit_b32 v10, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v9, v3, v2, 8 -; SI-NEXT: v_alignbit_b32 v38, v1, v0, 24 -; SI-NEXT: v_alignbit_b32 v32, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v33, v1, v0, 8 -; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 +; SI-NEXT: v_alignbit_b32 v11, v37, v36, 24 +; SI-NEXT: v_alignbit_b32 v10, v37, v36, 16 +; SI-NEXT: v_alignbit_b32 v9, v37, v36, 8 +; SI-NEXT: v_alignbit_b32 v3, v39, v38, 24 +; SI-NEXT: v_alignbit_b32 v2, v39, v38, 16 +; SI-NEXT: v_alignbit_b32 v1, v39, v38, 8 +; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 ; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 ; SI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 -; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v3 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v13, 8, v3 -; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 +; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; SI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 ; SI-NEXT: .LBB84_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB84_4 ; SI-NEXT: ; %bb.3: ; %cmp.true -; SI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 -; SI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 -; SI-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 +; SI-NEXT: v_add_f64 v[38:39], v[38:39], 1.0 +; SI-NEXT: v_add_f64 v[36:37], v[36:37], 1.0 +; SI-NEXT: v_add_f64 v[32:33], v[32:33], 1.0 ; SI-NEXT: v_add_f64 v[34:35], v[34:35], 1.0 -; SI-NEXT: v_alignbit_b32 v27, v7, v6, 24 -; SI-NEXT: v_alignbit_b32 v26, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v25, v7, v6, 8 +; SI-NEXT: v_alignbit_b32 v27, v33, v32, 24 +; SI-NEXT: v_alignbit_b32 v26, v33, v32, 16 +; SI-NEXT: v_alignbit_b32 v25, v33, v32, 8 ; SI-NEXT: v_alignbit_b32 v19, v35, v34, 24 ; SI-NEXT: v_alignbit_b32 v18, v35, v34, 16 ; SI-NEXT: v_alignbit_b32 v17, v35, v34, 8 -; SI-NEXT: v_alignbit_b32 v11, v3, v2, 24 -; SI-NEXT: v_alignbit_b32 v10, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v9, v3, v2, 8 -; SI-NEXT: v_alignbit_b32 v38, v1, v0, 24 -; SI-NEXT: v_alignbit_b32 v32, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v33, v1, v0, 8 -; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 +; SI-NEXT: v_alignbit_b32 v11, v37, v36, 24 +; SI-NEXT: v_alignbit_b32 v10, v37, v36, 16 +; SI-NEXT: v_alignbit_b32 v9, v37, v36, 8 +; SI-NEXT: v_alignbit_b32 v3, v39, v38, 24 +; SI-NEXT: v_alignbit_b32 v2, v39, v38, 16 +; SI-NEXT: v_alignbit_b32 v1, v39, v38, 8 +; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 ; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 ; SI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 -; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v3 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v13, 8, v3 -; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 +; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; SI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 ; SI-NEXT: .LBB84_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_mov_b32_e32 v4, v1 -; SI-NEXT: v_mov_b32_e32 v8, v2 -; SI-NEXT: v_mov_b32_e32 v12, v3 +; SI-NEXT: v_mov_b32_e32 v0, v38 +; SI-NEXT: v_mov_b32_e32 v4, v39 +; SI-NEXT: v_mov_b32_e32 v8, v36 +; SI-NEXT: v_mov_b32_e32 v12, v37 ; SI-NEXT: v_mov_b32_e32 v16, v34 ; SI-NEXT: v_mov_b32_e32 v20, v35 -; SI-NEXT: v_mov_b32_e32 v24, v6 -; SI-NEXT: v_mov_b32_e32 v28, v7 -; SI-NEXT: v_mov_b32_e32 v1, v33 -; SI-NEXT: v_mov_b32_e32 v2, v32 -; SI-NEXT: v_mov_b32_e32 v3, v38 -; SI-NEXT: v_mov_b32_e32 v6, v37 -; SI-NEXT: v_mov_b32_e32 v7, v36 +; SI-NEXT: v_mov_b32_e32 v24, v32 +; SI-NEXT: v_mov_b32_e32 v28, v33 ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v4f64_to_v32i8: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: v_mov_b32_e32 v33, v5 -; VI-NEXT: v_mov_b32_e32 v32, v4 -; VI-NEXT: v_mov_b32_e32 v35, v3 -; VI-NEXT: v_mov_b32_e32 v34, v2 +; VI-NEXT: v_mov_b32_e32 v33, v7 +; VI-NEXT: v_mov_b32_e32 v32, v6 +; VI-NEXT: v_mov_b32_e32 v35, v5 +; VI-NEXT: v_mov_b32_e32 v34, v4 +; VI-NEXT: v_mov_b32_e32 v37, v3 +; VI-NEXT: v_mov_b32_e32 v36, v2 +; VI-NEXT: v_mov_b32_e32 v39, v1 +; VI-NEXT: v_mov_b32_e32 v38, v0 ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr1 ; VI-NEXT: ; implicit-def: $vgpr2 +; VI-NEXT: ; implicit-def: $vgpr3 ; VI-NEXT: ; implicit-def: $vgpr5 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr6 +; VI-NEXT: ; implicit-def: $vgpr7 ; VI-NEXT: ; implicit-def: $vgpr9 ; VI-NEXT: ; implicit-def: $vgpr10 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr13 ; VI-NEXT: ; implicit-def: $vgpr14 ; VI-NEXT: ; implicit-def: $vgpr15 ; VI-NEXT: ; implicit-def: $vgpr17 ; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr25 ; VI-NEXT: ; implicit-def: $vgpr26 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr30 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr3 -; VI-NEXT: ; implicit-def: $vgpr11 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB84_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: .LBB84_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB84_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 ; VI-NEXT: v_add_f64 v[32:33], v[32:33], 1.0 -; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 ; VI-NEXT: v_add_f64 v[34:35], v[34:35], 1.0 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; VI-NEXT: v_add_f64 v[36:37], v[36:37], 1.0 +; VI-NEXT: v_add_f64 v[38:39], v[38:39], 1.0 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: .LBB84_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] -; VI-NEXT: v_mov_b32_e32 v4, v1 -; VI-NEXT: v_mov_b32_e32 v8, v34 -; VI-NEXT: v_mov_b32_e32 v12, v35 -; VI-NEXT: v_mov_b32_e32 v16, v32 -; VI-NEXT: v_mov_b32_e32 v20, v33 -; VI-NEXT: v_mov_b32_e32 v24, v6 -; VI-NEXT: v_mov_b32_e32 v28, v7 -; VI-NEXT: v_mov_b32_e32 v1, v38 -; VI-NEXT: v_mov_b32_e32 v6, v37 -; VI-NEXT: v_mov_b32_e32 v7, v36 +; VI-NEXT: v_mov_b32_e32 v0, v38 +; VI-NEXT: v_mov_b32_e32 v4, v39 +; VI-NEXT: v_mov_b32_e32 v8, v36 +; VI-NEXT: v_mov_b32_e32 v12, v37 +; VI-NEXT: v_mov_b32_e32 v16, v34 +; VI-NEXT: v_mov_b32_e32 v20, v35 +; VI-NEXT: v_mov_b32_e32 v24, v32 +; VI-NEXT: v_mov_b32_e32 v28, v33 ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v4f64_to_v32i8: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_mov_b32_e32 v33, v5 -; GFX9-NEXT: v_mov_b32_e32 v32, v4 -; GFX9-NEXT: v_mov_b32_e32 v35, v3 -; GFX9-NEXT: v_mov_b32_e32 v34, v2 +; GFX9-NEXT: v_mov_b32_e32 v33, v7 +; GFX9-NEXT: v_mov_b32_e32 v32, v6 +; GFX9-NEXT: v_mov_b32_e32 v35, v5 +; GFX9-NEXT: v_mov_b32_e32 v34, v4 +; GFX9-NEXT: v_mov_b32_e32 v37, v3 +; GFX9-NEXT: v_mov_b32_e32 v36, v2 +; GFX9-NEXT: v_mov_b32_e32 v39, v1 +; GFX9-NEXT: v_mov_b32_e32 v38, v0 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; GFX9-NEXT: ; implicit-def: $vgpr38 +; GFX9-NEXT: ; implicit-def: $vgpr1 ; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr3 ; GFX9-NEXT: ; implicit-def: $vgpr5 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr6 +; GFX9-NEXT: ; implicit-def: $vgpr7 ; GFX9-NEXT: ; implicit-def: $vgpr9 ; GFX9-NEXT: ; implicit-def: $vgpr10 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr13 ; GFX9-NEXT: ; implicit-def: $vgpr14 ; GFX9-NEXT: ; implicit-def: $vgpr15 ; GFX9-NEXT: ; implicit-def: $vgpr17 ; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr25 ; GFX9-NEXT: ; implicit-def: $vgpr26 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr30 ; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr3 -; GFX9-NEXT: ; implicit-def: $vgpr11 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB84_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB84_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB84_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 ; GFX9-NEXT: v_add_f64 v[32:33], v[32:33], 1.0 -; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 ; GFX9-NEXT: v_add_f64 v[34:35], v[34:35], 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; GFX9-NEXT: v_add_f64 v[36:37], v[36:37], 1.0 +; GFX9-NEXT: v_add_f64 v[38:39], v[38:39], 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB84_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] -; GFX9-NEXT: v_mov_b32_e32 v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v8, v34 -; GFX9-NEXT: v_mov_b32_e32 v12, v35 -; GFX9-NEXT: v_mov_b32_e32 v16, v32 -; GFX9-NEXT: v_mov_b32_e32 v20, v33 -; GFX9-NEXT: v_mov_b32_e32 v24, v6 -; GFX9-NEXT: v_mov_b32_e32 v28, v7 -; GFX9-NEXT: v_mov_b32_e32 v1, v38 -; GFX9-NEXT: v_mov_b32_e32 v6, v37 -; GFX9-NEXT: v_mov_b32_e32 v7, v36 +; GFX9-NEXT: v_mov_b32_e32 v0, v38 +; GFX9-NEXT: v_mov_b32_e32 v4, v39 +; GFX9-NEXT: v_mov_b32_e32 v8, v36 +; GFX9-NEXT: v_mov_b32_e32 v12, v37 +; GFX9-NEXT: v_mov_b32_e32 v16, v34 +; GFX9-NEXT: v_mov_b32_e32 v20, v35 +; GFX9-NEXT: v_mov_b32_e32 v24, v32 +; GFX9-NEXT: v_mov_b32_e32 v28, v33 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-TRUE16-LABEL: bitcast_v4f64_to_v32i8: @@ -25770,34 +25792,34 @@ define inreg <32 x i8> @bitcast_v4f64_to_v32i8_scalar(<4 x double> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[44:45], s[16:17], 8 ; SI-NEXT: s_cbranch_execnz .LBB85_4 ; SI-NEXT: .LBB85_2: ; %cmp.true -; SI-NEXT: v_add_f64 v[50:51], s[22:23], 1.0 -; SI-NEXT: v_add_f64 v[37:38], s[20:21], 1.0 -; SI-NEXT: v_add_f64 v[48:49], s[16:17], 1.0 -; SI-NEXT: v_add_f64 v[35:36], s[18:19], 1.0 -; SI-NEXT: v_lshr_b64 v[24:25], v[50:51], 16 -; SI-NEXT: v_lshr_b64 v[32:33], v[37:38], 16 -; SI-NEXT: v_lshr_b64 v[0:1], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[27:28], v[50:51], 24 -; SI-NEXT: v_lshr_b64 v[25:26], v[50:51], 8 -; SI-NEXT: v_lshr_b64 v[19:20], v[37:38], 24 -; SI-NEXT: v_lshr_b64 v[17:18], v[37:38], 8 -; SI-NEXT: v_lshr_b64 v[11:12], v[35:36], 24 -; SI-NEXT: v_lshr_b64 v[33:34], v[35:36], 16 -; SI-NEXT: v_lshr_b64 v[9:10], v[35:36], 8 -; SI-NEXT: v_lshr_b64 v[3:4], v[48:49], 24 -; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 8 -; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v51 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v51 -; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v51 -; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v38 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v38 -; SI-NEXT: v_lshrrev_b32_e32 v21, 8, v38 -; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v36 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v36 -; SI-NEXT: v_lshrrev_b32_e32 v13, 8, v36 -; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v49 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v49 -; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v49 +; SI-NEXT: v_add_f64 v[34:35], s[22:23], 1.0 +; SI-NEXT: v_add_f64 v[38:39], s[20:21], 1.0 +; SI-NEXT: v_add_f64 v[50:51], s[18:19], 1.0 +; SI-NEXT: v_add_f64 v[54:55], s[16:17], 1.0 +; SI-NEXT: v_lshr_b64 v[27:28], v[34:35], 24 +; SI-NEXT: v_lshr_b64 v[32:33], v[34:35], 16 +; SI-NEXT: v_lshr_b64 v[25:26], v[34:35], 8 +; SI-NEXT: v_lshr_b64 v[19:20], v[38:39], 24 +; SI-NEXT: v_lshr_b64 v[36:37], v[38:39], 16 +; SI-NEXT: v_lshr_b64 v[17:18], v[38:39], 8 +; SI-NEXT: v_lshr_b64 v[11:12], v[50:51], 24 +; SI-NEXT: v_lshr_b64 v[48:49], v[50:51], 16 +; SI-NEXT: v_lshr_b64 v[9:10], v[50:51], 8 +; SI-NEXT: v_lshr_b64 v[3:4], v[54:55], 24 +; SI-NEXT: v_lshr_b64 v[52:53], v[54:55], 16 +; SI-NEXT: v_lshr_b64 v[1:2], v[54:55], 8 +; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v35 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v35 +; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v35 +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v39 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v39 +; SI-NEXT: v_lshrrev_b32_e32 v21, 8, v39 +; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v51 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v51 +; SI-NEXT: v_lshrrev_b32_e32 v13, 8, v51 +; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v55 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v55 +; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v55 ; SI-NEXT: s_branch .LBB85_5 ; SI-NEXT: .LBB85_3: ; SI-NEXT: ; implicit-def: $sgpr44 @@ -25826,14 +25848,14 @@ define inreg <32 x i8> @bitcast_v4f64_to_v32i8_scalar(<4 x double> inreg %a, i32 ; SI-NEXT: ; implicit-def: $sgpr75 ; SI-NEXT: s_branch .LBB85_2 ; SI-NEXT: .LBB85_4: -; SI-NEXT: v_mov_b32_e32 v51, s23 -; SI-NEXT: v_mov_b32_e32 v38, s21 -; SI-NEXT: v_mov_b32_e32 v36, s19 -; SI-NEXT: v_mov_b32_e32 v49, s17 -; SI-NEXT: v_mov_b32_e32 v48, s16 -; SI-NEXT: v_mov_b32_e32 v35, s18 -; SI-NEXT: v_mov_b32_e32 v37, s20 -; SI-NEXT: v_mov_b32_e32 v50, s22 +; SI-NEXT: v_mov_b32_e32 v35, s23 +; SI-NEXT: v_mov_b32_e32 v39, s21 +; SI-NEXT: v_mov_b32_e32 v51, s19 +; SI-NEXT: v_mov_b32_e32 v55, s17 +; SI-NEXT: v_mov_b32_e32 v54, s16 +; SI-NEXT: v_mov_b32_e32 v50, s18 +; SI-NEXT: v_mov_b32_e32 v38, s20 +; SI-NEXT: v_mov_b32_e32 v34, s22 ; SI-NEXT: v_mov_b32_e32 v31, s75 ; SI-NEXT: v_mov_b32_e32 v30, s74 ; SI-NEXT: v_mov_b32_e32 v29, s73 @@ -25847,30 +25869,30 @@ define inreg <32 x i8> @bitcast_v4f64_to_v32i8_scalar(<4 x double> inreg %a, i32 ; SI-NEXT: v_mov_b32_e32 v6, s57 ; SI-NEXT: v_mov_b32_e32 v5, s56 ; SI-NEXT: v_mov_b32_e32 v1, s44 -; SI-NEXT: v_mov_b32_e32 v0, s42 +; SI-NEXT: v_mov_b32_e32 v52, s42 ; SI-NEXT: v_mov_b32_e32 v3, s40 ; SI-NEXT: v_mov_b32_e32 v9, s28 -; SI-NEXT: v_mov_b32_e32 v33, s26 +; SI-NEXT: v_mov_b32_e32 v48, s26 ; SI-NEXT: v_mov_b32_e32 v11, s24 ; SI-NEXT: v_mov_b32_e32 v17, s14 -; SI-NEXT: v_mov_b32_e32 v32, s12 +; SI-NEXT: v_mov_b32_e32 v36, s12 ; SI-NEXT: v_mov_b32_e32 v19, s10 ; SI-NEXT: v_mov_b32_e32 v25, s8 -; SI-NEXT: v_mov_b32_e32 v24, s6 +; SI-NEXT: v_mov_b32_e32 v32, s6 ; SI-NEXT: v_mov_b32_e32 v27, s4 ; SI-NEXT: .LBB85_5: ; %end -; SI-NEXT: v_mov_b32_e32 v2, v0 -; SI-NEXT: v_mov_b32_e32 v0, v48 -; SI-NEXT: v_mov_b32_e32 v4, v49 -; SI-NEXT: v_mov_b32_e32 v10, v33 -; SI-NEXT: v_mov_b32_e32 v8, v35 -; SI-NEXT: v_mov_b32_e32 v12, v36 -; SI-NEXT: v_mov_b32_e32 v18, v32 -; SI-NEXT: v_mov_b32_e32 v16, v37 -; SI-NEXT: v_mov_b32_e32 v20, v38 -; SI-NEXT: v_mov_b32_e32 v26, v24 -; SI-NEXT: v_mov_b32_e32 v24, v50 -; SI-NEXT: v_mov_b32_e32 v28, v51 +; SI-NEXT: v_mov_b32_e32 v0, v54 +; SI-NEXT: v_mov_b32_e32 v2, v52 +; SI-NEXT: v_mov_b32_e32 v4, v55 +; SI-NEXT: v_mov_b32_e32 v8, v50 +; SI-NEXT: v_mov_b32_e32 v10, v48 +; SI-NEXT: v_mov_b32_e32 v12, v51 +; SI-NEXT: v_mov_b32_e32 v16, v38 +; SI-NEXT: v_mov_b32_e32 v18, v36 +; SI-NEXT: v_mov_b32_e32 v20, v39 +; SI-NEXT: v_mov_b32_e32 v24, v34 +; SI-NEXT: v_mov_b32_e32 v26, v32 +; SI-NEXT: v_mov_b32_e32 v28, v35 ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v4f64_to_v32i8_scalar: @@ -25905,34 +25927,34 @@ define inreg <32 x i8> @bitcast_v4f64_to_v32i8_scalar(<4 x double> inreg %a, i32 ; VI-NEXT: s_lshr_b64 s[4:5], s[16:17], 24 ; VI-NEXT: s_cbranch_execnz .LBB85_4 ; VI-NEXT: .LBB85_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[24:25], s[22:23], 1.0 -; VI-NEXT: v_add_f64 v[16:17], s[20:21], 1.0 -; VI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 -; VI-NEXT: v_add_f64 v[8:9], s[18:19], 1.0 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[24:25] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[16:17] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9] -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v25 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v25 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v25 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v24 -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v24 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v17 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v17 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v17 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v16 -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v9 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v0 +; VI-NEXT: v_add_f64 v[32:33], s[22:23], 1.0 +; VI-NEXT: v_add_f64 v[34:35], s[20:21], 1.0 +; VI-NEXT: v_add_f64 v[36:37], s[18:19], 1.0 +; VI-NEXT: v_add_f64 v[38:39], s[16:17], 1.0 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: s_branch .LBB85_5 ; VI-NEXT: .LBB85_3: ; VI-NEXT: ; implicit-def: $sgpr58 @@ -25961,22 +25983,26 @@ define inreg <32 x i8> @bitcast_v4f64_to_v32i8_scalar(<4 x double> inreg %a, i32 ; VI-NEXT: ; implicit-def: $sgpr43 ; VI-NEXT: s_branch .LBB85_2 ; VI-NEXT: .LBB85_4: -; VI-NEXT: v_mov_b32_e32 v0, s16 -; VI-NEXT: v_mov_b32_e32 v8, s18 -; VI-NEXT: v_mov_b32_e32 v16, s20 -; VI-NEXT: v_mov_b32_e32 v24, s22 -; VI-NEXT: v_mov_b32_e32 v25, s23 -; VI-NEXT: v_mov_b32_e32 v17, s21 -; VI-NEXT: v_mov_b32_e32 v9, s19 -; VI-NEXT: v_mov_b32_e32 v1, s17 +; VI-NEXT: v_mov_b32_e32 v38, s16 +; VI-NEXT: v_mov_b32_e32 v36, s18 +; VI-NEXT: v_mov_b32_e32 v34, s20 +; VI-NEXT: v_mov_b32_e32 v32, s22 +; VI-NEXT: v_mov_b32_e32 v33, s23 +; VI-NEXT: v_mov_b32_e32 v35, s21 +; VI-NEXT: v_mov_b32_e32 v37, s19 +; VI-NEXT: v_mov_b32_e32 v39, s17 ; VI-NEXT: v_mov_b32_e32 v2, s59 -; VI-NEXT: v_mov_b32_e32 v35, s58 +; VI-NEXT: v_mov_b32_e32 v1, s58 ; VI-NEXT: v_mov_b32_e32 v10, s57 -; VI-NEXT: v_mov_b32_e32 v34, s56 +; VI-NEXT: v_mov_b32_e32 v9, s56 ; VI-NEXT: v_mov_b32_e32 v18, s47 -; VI-NEXT: v_mov_b32_e32 v33, s46 +; VI-NEXT: v_mov_b32_e32 v17, s46 ; VI-NEXT: v_mov_b32_e32 v26, s45 -; VI-NEXT: v_mov_b32_e32 v32, s44 +; VI-NEXT: v_mov_b32_e32 v25, s44 +; VI-NEXT: v_mov_b32_e32 v3, s4 +; VI-NEXT: v_mov_b32_e32 v11, s6 +; VI-NEXT: v_mov_b32_e32 v19, s8 +; VI-NEXT: v_mov_b32_e32 v27, s10 ; VI-NEXT: v_mov_b32_e32 v31, s43 ; VI-NEXT: v_mov_b32_e32 v30, s42 ; VI-NEXT: v_mov_b32_e32 v29, s41 @@ -25989,19 +26015,15 @@ define inreg <32 x i8> @bitcast_v4f64_to_v32i8_scalar(<4 x double> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v7, s24 ; VI-NEXT: v_mov_b32_e32 v6, s15 ; VI-NEXT: v_mov_b32_e32 v5, s14 -; VI-NEXT: v_mov_b32_e32 v3, s4 -; VI-NEXT: v_mov_b32_e32 v11, s6 -; VI-NEXT: v_mov_b32_e32 v19, s8 -; VI-NEXT: v_mov_b32_e32 v27, s10 ; VI-NEXT: .LBB85_5: ; %end -; VI-NEXT: v_mov_b32_e32 v4, v1 -; VI-NEXT: v_mov_b32_e32 v12, v9 -; VI-NEXT: v_mov_b32_e32 v20, v17 -; VI-NEXT: v_mov_b32_e32 v28, v25 -; VI-NEXT: v_mov_b32_e32 v1, v35 -; VI-NEXT: v_mov_b32_e32 v9, v34 -; VI-NEXT: v_mov_b32_e32 v17, v33 -; VI-NEXT: v_mov_b32_e32 v25, v32 +; VI-NEXT: v_mov_b32_e32 v0, v38 +; VI-NEXT: v_mov_b32_e32 v4, v39 +; VI-NEXT: v_mov_b32_e32 v8, v36 +; VI-NEXT: v_mov_b32_e32 v12, v37 +; VI-NEXT: v_mov_b32_e32 v16, v34 +; VI-NEXT: v_mov_b32_e32 v20, v35 +; VI-NEXT: v_mov_b32_e32 v24, v32 +; VI-NEXT: v_mov_b32_e32 v28, v33 ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v4f64_to_v32i8_scalar: @@ -26036,34 +26058,34 @@ define inreg <32 x i8> @bitcast_v4f64_to_v32i8_scalar(<4 x double> inreg %a, i32 ; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB85_4 ; GFX9-NEXT: .LBB85_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[24:25], s[22:23], 1.0 -; GFX9-NEXT: v_add_f64 v[16:17], s[20:21], 1.0 -; GFX9-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 -; GFX9-NEXT: v_add_f64 v[8:9], s[18:19], 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[24:25] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[16:17] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9] -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v0 +; GFX9-NEXT: v_add_f64 v[32:33], s[22:23], 1.0 +; GFX9-NEXT: v_add_f64 v[34:35], s[20:21], 1.0 +; GFX9-NEXT: v_add_f64 v[36:37], s[18:19], 1.0 +; GFX9-NEXT: v_add_f64 v[38:39], s[16:17], 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: s_branch .LBB85_5 ; GFX9-NEXT: .LBB85_3: ; GFX9-NEXT: ; implicit-def: $sgpr58 @@ -26092,22 +26114,26 @@ define inreg <32 x i8> @bitcast_v4f64_to_v32i8_scalar(<4 x double> inreg %a, i32 ; GFX9-NEXT: ; implicit-def: $sgpr43 ; GFX9-NEXT: s_branch .LBB85_2 ; GFX9-NEXT: .LBB85_4: -; GFX9-NEXT: v_mov_b32_e32 v0, s16 -; GFX9-NEXT: v_mov_b32_e32 v8, s18 -; GFX9-NEXT: v_mov_b32_e32 v16, s20 -; GFX9-NEXT: v_mov_b32_e32 v24, s22 -; GFX9-NEXT: v_mov_b32_e32 v25, s23 -; GFX9-NEXT: v_mov_b32_e32 v17, s21 -; GFX9-NEXT: v_mov_b32_e32 v9, s19 -; GFX9-NEXT: v_mov_b32_e32 v1, s17 +; GFX9-NEXT: v_mov_b32_e32 v38, s16 +; GFX9-NEXT: v_mov_b32_e32 v36, s18 +; GFX9-NEXT: v_mov_b32_e32 v34, s20 +; GFX9-NEXT: v_mov_b32_e32 v32, s22 +; GFX9-NEXT: v_mov_b32_e32 v33, s23 +; GFX9-NEXT: v_mov_b32_e32 v35, s21 +; GFX9-NEXT: v_mov_b32_e32 v37, s19 +; GFX9-NEXT: v_mov_b32_e32 v39, s17 ; GFX9-NEXT: v_mov_b32_e32 v2, s59 -; GFX9-NEXT: v_mov_b32_e32 v35, s58 +; GFX9-NEXT: v_mov_b32_e32 v1, s58 ; GFX9-NEXT: v_mov_b32_e32 v10, s57 -; GFX9-NEXT: v_mov_b32_e32 v34, s56 +; GFX9-NEXT: v_mov_b32_e32 v9, s56 ; GFX9-NEXT: v_mov_b32_e32 v18, s47 -; GFX9-NEXT: v_mov_b32_e32 v33, s46 +; GFX9-NEXT: v_mov_b32_e32 v17, s46 ; GFX9-NEXT: v_mov_b32_e32 v26, s45 -; GFX9-NEXT: v_mov_b32_e32 v32, s44 +; GFX9-NEXT: v_mov_b32_e32 v25, s44 +; GFX9-NEXT: v_mov_b32_e32 v3, s4 +; GFX9-NEXT: v_mov_b32_e32 v11, s6 +; GFX9-NEXT: v_mov_b32_e32 v19, s8 +; GFX9-NEXT: v_mov_b32_e32 v27, s10 ; GFX9-NEXT: v_mov_b32_e32 v31, s43 ; GFX9-NEXT: v_mov_b32_e32 v30, s42 ; GFX9-NEXT: v_mov_b32_e32 v29, s41 @@ -26120,19 +26146,15 @@ define inreg <32 x i8> @bitcast_v4f64_to_v32i8_scalar(<4 x double> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v7, s24 ; GFX9-NEXT: v_mov_b32_e32 v6, s15 ; GFX9-NEXT: v_mov_b32_e32 v5, s14 -; GFX9-NEXT: v_mov_b32_e32 v3, s4 -; GFX9-NEXT: v_mov_b32_e32 v11, s6 -; GFX9-NEXT: v_mov_b32_e32 v19, s8 -; GFX9-NEXT: v_mov_b32_e32 v27, s10 ; GFX9-NEXT: .LBB85_5: ; %end -; GFX9-NEXT: v_mov_b32_e32 v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v12, v9 -; GFX9-NEXT: v_mov_b32_e32 v20, v17 -; GFX9-NEXT: v_mov_b32_e32 v28, v25 -; GFX9-NEXT: v_mov_b32_e32 v1, v35 -; GFX9-NEXT: v_mov_b32_e32 v9, v34 -; GFX9-NEXT: v_mov_b32_e32 v17, v33 -; GFX9-NEXT: v_mov_b32_e32 v25, v32 +; GFX9-NEXT: v_mov_b32_e32 v0, v38 +; GFX9-NEXT: v_mov_b32_e32 v4, v39 +; GFX9-NEXT: v_mov_b32_e32 v8, v36 +; GFX9-NEXT: v_mov_b32_e32 v12, v37 +; GFX9-NEXT: v_mov_b32_e32 v16, v34 +; GFX9-NEXT: v_mov_b32_e32 v20, v35 +; GFX9-NEXT: v_mov_b32_e32 v24, v32 +; GFX9-NEXT: v_mov_b32_e32 v28, v33 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-LABEL: bitcast_v4f64_to_v32i8_scalar: @@ -26601,16 +26623,16 @@ define <4 x double> @bitcast_v32i8_to_v4f64(<32 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v35 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_mov_b32_e32 v7, 0x300 -; VI-NEXT: v_add_u16_e32 v2, 3, v34 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v33 ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_add_u16_sdwa v1, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_add_u16_e32 v1, 0x300, v2 +; VI-NEXT: v_add_u16_e32 v1, 3, v34 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v33 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v2, 3, v32 ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v31 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 ; VI-NEXT: v_add_u16_sdwa v2, v2, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v8 @@ -28667,111 +28689,111 @@ define inreg <16 x i16> @bitcast_v16f16_to_v16i16_scalar(<16 x half> inreg %a, i ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_or_b32_e32 v16, v1, v0 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_or_b32_e32 v17, v1, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s11 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 -; SI-NEXT: v_or_b32_e32 v19, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s9 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_or_b32_e32 v18, v3, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s9 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s17 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 -; SI-NEXT: v_or_b32_e32 v18, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s22 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s10 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s23 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v5 +; SI-NEXT: v_or_b32_e32 v19, v1, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s22 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s8 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v20, v1, v6 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v17 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v16 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v5 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v7 ; SI-NEXT: v_or_b32_e32 v7, v3, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s7 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v21 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s17 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v20 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_or_b32_e32 v5, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s6 ; SI-NEXT: v_lshr_b64 v[10:11], v[4:5], 16 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v21 ; SI-NEXT: v_or_b32_e32 v3, v3, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v22 ; SI-NEXT: v_or_b32_e32 v1, v1, v8 ; SI-NEXT: v_lshr_b64 v[14:15], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[12:13], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[8:9], v[6:7], 16 +; SI-NEXT: v_or_b32_e32 v6, v23, v6 ; SI-NEXT: s_branch .LBB91_5 ; SI-NEXT: .LBB91_3: ; SI-NEXT: s_branch .LBB91_2 ; SI-NEXT: .LBB91_4: -; SI-NEXT: v_mov_b32_e32 v17, s10 -; SI-NEXT: v_mov_b32_e32 v21, s8 -; SI-NEXT: v_mov_b32_e32 v22, s7 -; SI-NEXT: v_mov_b32_e32 v23, s6 +; SI-NEXT: v_mov_b32_e32 v16, s10 +; SI-NEXT: v_mov_b32_e32 v20, s8 +; SI-NEXT: v_mov_b32_e32 v21, s7 +; SI-NEXT: v_mov_b32_e32 v22, s6 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v20, s22 -; SI-NEXT: v_mov_b32_e32 v18, s20 -; SI-NEXT: v_mov_b32_e32 v19, s18 -; SI-NEXT: v_mov_b32_e32 v16, s16 +; SI-NEXT: v_mov_b32_e32 v6, s22 +; SI-NEXT: v_mov_b32_e32 v19, s20 +; SI-NEXT: v_mov_b32_e32 v18, s18 +; SI-NEXT: v_mov_b32_e32 v17, s16 ; SI-NEXT: v_mov_b32_e32 v14, s13 ; SI-NEXT: v_mov_b32_e32 v12, s12 ; SI-NEXT: v_mov_b32_e32 v10, s11 ; SI-NEXT: v_mov_b32_e32 v8, s9 ; SI-NEXT: .LBB91_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v14 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v17 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v14 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v22 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v19 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v12 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v21 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v18 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v10 -; SI-NEXT: v_or_b32_e32 v4, v4, v6 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v21 -; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v20 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v19 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v4, v4, v9 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v20 ; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v16 +; SI-NEXT: v_or_b32_e32 v5, v5, v9 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 ; SI-NEXT: s_setpc_b64 s[30:31] ; @@ -28788,25 +28810,18 @@ define inreg <16 x i16> @bitcast_v16f16_to_v16i16_scalar(<16 x half> inreg %a, i ; VI-NEXT: s_lshr_b32 s4, s17, 16 ; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: s_lshr_b32 s4, s18, 16 -; VI-NEXT: s_lshr_b32 s5, s22, 16 -; VI-NEXT: v_mov_b32_e32 v0, 0x200 ; VI-NEXT: v_mov_b32_e32 v3, s4 ; VI-NEXT: s_lshr_b32 s4, s19, 16 -; VI-NEXT: v_mov_b32_e32 v6, s5 -; VI-NEXT: s_lshr_b32 s5, s23, 16 ; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: s_lshr_b32 s4, s20, 16 -; VI-NEXT: v_add_f16_e32 v5, s22, v0 -; VI-NEXT: v_add_f16_sdwa v6, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v13, s5 -; VI-NEXT: v_add_f16_e32 v7, s23, v0 -; VI-NEXT: v_add_f16_sdwa v13, v13, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v6, v5, v6 ; VI-NEXT: v_mov_b32_e32 v5, s4 ; VI-NEXT: s_lshr_b32 s4, s21, 16 -; VI-NEXT: v_or_b32_e32 v7, v7, v13 -; VI-NEXT: v_add_f16_sdwa v13, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v5, s4 +; VI-NEXT: v_mov_b32_e32 v6, s4 +; VI-NEXT: s_lshr_b32 s4, s22, 16 +; VI-NEXT: v_mov_b32_e32 v7, s4 +; VI-NEXT: s_lshr_b32 s4, s23, 16 +; VI-NEXT: v_mov_b32_e32 v0, 0x200 +; VI-NEXT: v_mov_b32_e32 v16, s4 ; VI-NEXT: v_add_f16_e32 v8, s16, v0 ; VI-NEXT: v_add_f16_sdwa v9, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s17, v0 @@ -28816,9 +28831,16 @@ define inreg <16 x i16> @bitcast_v16f16_to_v16i16_scalar(<16 x half> inreg %a, i ; VI-NEXT: v_add_f16_e32 v3, s19, v0 ; VI-NEXT: v_add_f16_sdwa v12, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v4, s20, v0 -; VI-NEXT: v_add_f16_sdwa v5, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v0, s21, v0 -; VI-NEXT: v_or_b32_e32 v5, v0, v5 +; VI-NEXT: v_add_f16_sdwa v13, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v5, s21, v0 +; VI-NEXT: v_add_f16_sdwa v14, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v6, s22, v0 +; VI-NEXT: v_add_f16_sdwa v15, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v7, s23, v0 +; VI-NEXT: v_add_f16_sdwa v0, v16, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v7, v7, v0 +; VI-NEXT: v_or_b32_e32 v6, v6, v15 +; VI-NEXT: v_or_b32_e32 v5, v5, v14 ; VI-NEXT: v_or_b32_e32 v4, v4, v13 ; VI-NEXT: v_or_b32_e32 v3, v3, v12 ; VI-NEXT: v_or_b32_e32 v2, v2, v11 @@ -30253,20 +30275,20 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v31 ; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v21 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v12 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v30 ; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v6 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v2 ; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v29 ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v28 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v17 ; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v10 ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v27 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v4 -; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v17 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v8 ; SI-NEXT: s_cbranch_execnz .LBB95_3 ; SI-NEXT: .LBB95_2: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 @@ -30327,9 +30349,9 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; SI-NEXT: v_lshr_b64 v[26:27], v[6:7], 16 ; SI-NEXT: .LBB95_3: ; %end ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v23 +; SI-NEXT: v_or_b32_e32 v0, v0, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11 -; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v22 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v5 @@ -30354,20 +30376,20 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; SI-NEXT: .LBB95_4: ; SI-NEXT: ; implicit-def: $vgpr0 ; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr11 ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr5 ; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: ; implicit-def: $vgpr3 ; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr13 ; SI-NEXT: ; implicit-def: $vgpr25 +; SI-NEXT: ; implicit-def: $vgpr9 ; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr14 ; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr11 -; SI-NEXT: ; implicit-def: $vgpr3 -; SI-NEXT: ; implicit-def: $vgpr9 ; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: s_branch .LBB95_2 ; ; VI-LABEL: bitcast_v16bf16_to_v16i16_scalar: @@ -30379,8 +30401,8 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; VI-NEXT: s_cbranch_execnz .LBB95_4 ; VI-NEXT: .LBB95_2: ; %cmp.true ; VI-NEXT: s_lshl_b32 s4, s16, 16 -; VI-NEXT: v_mov_b32_e32 v10, 0x40c00000 -; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_mov_b32_e32 v15, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v0, s4, v15 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 @@ -30388,7 +30410,7 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 ; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v10 +; VI-NEXT: v_add_f32_e32 v1, s4, v15 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 @@ -30396,14 +30418,14 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: s_lshl_b32 s4, s17, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v10 +; VI-NEXT: v_add_f32_e32 v2, s4, v15 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v10 +; VI-NEXT: v_add_f32_e32 v2, s4, v15 ; VI-NEXT: v_cndmask_b32_e32 v8, v3, v4, vcc ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 @@ -30413,7 +30435,7 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc ; VI-NEXT: s_lshl_b32 s4, s18, 16 ; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v10 +; VI-NEXT: v_add_f32_e32 v2, s4, v15 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 @@ -30421,7 +30443,7 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v10 +; VI-NEXT: v_add_f32_e32 v3, s4, v15 ; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 ; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 @@ -30429,15 +30451,15 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 ; VI-NEXT: s_lshl_b32 s4, s19, 16 ; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_add_f32_e32 v4, s4, v10 +; VI-NEXT: v_add_f32_e32 v4, s4, v15 ; VI-NEXT: v_bfe_u32 v5, v4, 16, 1 ; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v4 ; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 ; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v6, 0x400000, v4 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 -; VI-NEXT: v_add_f32_e32 v4, s4, v10 -; VI-NEXT: v_cndmask_b32_e32 v11, v5, v6, vcc +; VI-NEXT: v_add_f32_e32 v4, s4, v15 +; VI-NEXT: v_cndmask_b32_e32 v10, v5, v6, vcc ; VI-NEXT: v_bfe_u32 v5, v4, 16, 1 ; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v4 ; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 @@ -30445,8 +30467,8 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 ; VI-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc ; VI-NEXT: s_lshl_b32 s4, s20, 16 -; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v4 -; VI-NEXT: v_add_f32_e32 v4, s4, v10 +; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v4 +; VI-NEXT: v_add_f32_e32 v4, s4, v15 ; VI-NEXT: v_bfe_u32 v5, v4, 16, 1 ; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v4 ; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 @@ -30454,79 +30476,79 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 ; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc -; VI-NEXT: v_add_f32_e32 v5, s4, v10 +; VI-NEXT: v_add_f32_e32 v5, s4, v15 ; VI-NEXT: v_bfe_u32 v6, v5, 16, 1 ; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v5 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v6 -; VI-NEXT: s_and_b32 s5, s21, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v7, 0x400000, v5 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v13, s5, v10 -; VI-NEXT: s_lshl_b32 s5, s22, 16 +; VI-NEXT: s_lshl_b32 s4, s21, 16 ; VI-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc -; VI-NEXT: v_add_f32_e32 v6, s5, v10 +; VI-NEXT: v_add_f32_e32 v6, s4, v15 +; VI-NEXT: v_bfe_u32 v7, v6, 16, 1 +; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v6 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v12, 0x400000, v6 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; VI-NEXT: v_add_f32_e32 v6, s4, v15 +; VI-NEXT: v_cndmask_b32_e32 v12, v7, v12, vcc +; VI-NEXT: v_bfe_u32 v7, v6, 16, 1 +; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v6 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v6 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; VI-NEXT: v_cndmask_b32_e32 v6, v7, v13, vcc +; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v6 +; VI-NEXT: v_add_f32_e32 v6, s4, v15 ; VI-NEXT: v_bfe_u32 v7, v6, 16, 1 ; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v6 ; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 ; VI-NEXT: v_or_b32_e32 v14, 0x400000, v6 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 -; VI-NEXT: s_and_b32 s5, s22, 0xffff0000 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v6, v7, v14, vcc -; VI-NEXT: v_add_f32_e32 v7, s5, v10 +; VI-NEXT: v_add_f32_e32 v7, s4, v15 ; VI-NEXT: v_bfe_u32 v14, v7, 16, 1 ; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v7 -; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_add_u32_e32 v14, vcc, 0x7fff, v14 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v7 +; VI-NEXT: v_or_b32_e32 v16, 0x400000, v7 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[4:5] -; VI-NEXT: v_cndmask_b32_e32 v7, v14, v15, vcc -; VI-NEXT: v_bfe_u32 v5, v13, 16, 1 +; VI-NEXT: s_lshl_b32 s4, s23, 16 +; VI-NEXT: v_cndmask_b32_e32 v7, v14, v16, vcc +; VI-NEXT: v_add_f32_e32 v14, s4, v15 +; VI-NEXT: v_bfe_u32 v16, v14, 16, 1 +; VI-NEXT: v_add_u32_e32 v16, vcc, v16, v14 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v16 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v17, 0x400000, v14 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; VI-NEXT: v_add_f32_e32 v15, s4, v15 +; VI-NEXT: v_cndmask_b32_e32 v14, v16, v17, vcc +; VI-NEXT: v_bfe_u32 v16, v15, 16, 1 +; VI-NEXT: v_add_u32_e32 v16, vcc, v16, v15 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v16 +; VI-NEXT: v_or_b32_e32 v17, 0x400000, v15 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 ; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v13 -; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_cndmask_b32_e32 v15, v16, v17, vcc +; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[6:7] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v10 -; VI-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v7, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v13 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v14, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v13, v7, v14, vcc -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v5 -; VI-NEXT: v_add_f32_e32 v5, s4, v10 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: s_lshl_b32 s4, s23, 16 -; VI-NEXT: v_cndmask_b32_e32 v5, v7, v15, vcc -; VI-NEXT: v_add_f32_e32 v7, s4, v10 -; VI-NEXT: v_bfe_u32 v10, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v10, vcc, v10, v7 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x7fff, v10 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_cndmask_b32_e32 v15, v10, v15, vcc -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v5 ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[15:16] -; VI-NEXT: v_lshrrev_b64 v[13:14], 16, v[13:14] -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[11:12] +; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 +; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[14:15] +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[12:13] +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[10:11] ; VI-NEXT: v_lshrrev_b64 v[7:8], 16, v[8:9] +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[4:5] ; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[2:3] ; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] ; VI-NEXT: v_mov_b32_e32 v1, v7 ; VI-NEXT: v_mov_b32_e32 v3, v10 -; VI-NEXT: v_mov_b32_e32 v5, v13 -; VI-NEXT: v_mov_b32_e32 v7, v15 +; VI-NEXT: v_mov_b32_e32 v5, v12 +; VI-NEXT: v_mov_b32_e32 v7, v14 ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB95_3: ; VI-NEXT: s_branch .LBB95_2 @@ -30610,91 +30632,91 @@ define inreg <16 x i16> @bitcast_v16bf16_to_v16i16_scalar(<16 x bfloat> inreg %a ; GFX9-NEXT: v_add_f32_e32 v4, s4, v1 ; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 -; GFX9-NEXT: s_and_b32 s5, s22, 0xffff0000 +; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 ; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 -; GFX9-NEXT: v_add_f32_e32 v4, s5, v1 +; GFX9-NEXT: v_add_f32_e32 v4, s4, v1 ; GFX9-NEXT: v_cndmask_b32_e32 v12, v5, v6, vcc ; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 ; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 ; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 -; GFX9-NEXT: s_lshl_b32 s5, s22, 16 +; GFX9-NEXT: s_lshl_b32 s4, s20, 16 ; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc -; GFX9-NEXT: v_add_f32_e32 v5, s5, v1 +; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 ; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 +; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 ; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: s_and_b32 s5, s23, 0xffff0000 +; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v13, v6, v7, vcc +; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 +; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 +; GFX9-NEXT: s_lshl_b32 s4, s21, 16 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc -; GFX9-NEXT: v_add_f32_e32 v6, s5, v1 +; GFX9-NEXT: v_add_f32_e32 v6, s4, v1 +; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 +; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v6 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: v_add_f32_e32 v6, s4, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v14, v7, v14, vcc ; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 ; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 -; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v6 +; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v6 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 -; GFX9-NEXT: s_lshl_b32 s5, s23, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v13, vcc -; GFX9-NEXT: v_add_f32_e32 v7, s5, v1 -; GFX9-NEXT: v_bfe_u32 v13, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v13, v13, v7 -; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 -; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v7 +; GFX9-NEXT: s_lshl_b32 s4, s22, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v15, vcc +; GFX9-NEXT: v_add_f32_e32 v7, s4, v1 +; GFX9-NEXT: v_bfe_u32 v15, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v7 +; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: v_add_f32_e32 v7, s4, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc +; GFX9-NEXT: v_bfe_u32 v16, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v16, v16, v7 +; GFX9-NEXT: s_lshl_b32 s4, s23, 16 +; GFX9-NEXT: v_add_u32_e32 v16, 0x7fff, v16 +; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v7 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v13, v14, vcc -; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: v_mov_b32_e32 v13, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; GFX9-NEXT: v_and_or_b32 v7, v6, v13, v7 -; GFX9-NEXT: v_and_or_b32 v6, v4, v13, v5 -; GFX9-NEXT: v_add_f32_e32 v4, s4, v1 -; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v4 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 -; GFX9-NEXT: s_lshl_b32 s4, s21, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v14, vcc -; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 -; GFX9-NEXT: v_bfe_u32 v14, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v14, v14, v5 -; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 -; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v14, v15, vcc -; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; GFX9-NEXT: v_and_or_b32 v5, v4, v13, v5 -; GFX9-NEXT: v_add_f32_e32 v4, s4, v1 -; GFX9-NEXT: v_bfe_u32 v14, v4, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v14, v14, v4 -; GFX9-NEXT: s_lshl_b32 s4, s20, 16 -; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 -; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v4 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 ; GFX9-NEXT: v_add_f32_e32 v1, s4, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v4, v14, v15, vcc -; GFX9-NEXT: v_bfe_u32 v14, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v14, v14, v1 -; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 -; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v7, v16, v17, vcc +; GFX9-NEXT: v_bfe_u32 v16, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v16, v16, v1 +; GFX9-NEXT: v_add_u32_e32 v16, 0x7fff, v16 +; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v14, v15, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v1, v16, v17, vcc ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_or_b32 v4, v4, v13, v1 +; GFX9-NEXT: v_mov_b32_e32 v16, 0xffff0000 +; GFX9-NEXT: v_and_or_b32 v7, v7, v16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v15 +; GFX9-NEXT: v_and_or_b32 v6, v6, v16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v14 +; GFX9-NEXT: v_and_or_b32 v5, v5, v16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v13 +; GFX9-NEXT: v_and_or_b32 v4, v4, v16, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v12 -; GFX9-NEXT: v_and_or_b32 v3, v3, v13, v1 +; GFX9-NEXT: v_and_or_b32 v3, v3, v16, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v11 -; GFX9-NEXT: v_and_or_b32 v2, v2, v13, v1 +; GFX9-NEXT: v_and_or_b32 v2, v2, v16, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v10 ; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v8 -; GFX9-NEXT: v_and_or_b32 v1, v9, v13, v1 -; GFX9-NEXT: v_and_or_b32 v0, v0, v13, v8 +; GFX9-NEXT: v_and_or_b32 v1, v9, v16, v1 +; GFX9-NEXT: v_and_or_b32 v0, v0, v16, v8 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: .LBB95_3: ; GFX9-NEXT: s_branch .LBB95_2 @@ -31239,39 +31261,43 @@ define <32 x i8> @bitcast_v16i16_to_v32i8(<16 x i16> %a, i32 %b) #0 { ; VI-LABEL: bitcast_v16i16_to_v32i8: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; VI-NEXT: v_mov_b32_e32 v34, v5 +; VI-NEXT: v_mov_b32_e32 v33, v4 +; VI-NEXT: v_mov_b32_e32 v37, v3 +; VI-NEXT: v_mov_b32_e32 v36, v2 ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v0 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; VI-NEXT: ; implicit-def: $vgpr50 ; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr3 ; VI-NEXT: ; implicit-def: $vgpr48 -; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr5 ; VI-NEXT: ; implicit-def: $vgpr39 ; VI-NEXT: ; implicit-def: $vgpr8 ; VI-NEXT: ; implicit-def: $vgpr9 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: ; implicit-def: $vgpr13 ; VI-NEXT: ; implicit-def: $vgpr15 ; VI-NEXT: ; implicit-def: $vgpr16 ; VI-NEXT: ; implicit-def: $vgpr17 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr49 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: ; implicit-def: $vgpr51 ; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr33 -; VI-NEXT: ; implicit-def: $vgpr11 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB96_2 @@ -31279,93 +31305,90 @@ define <32 x i8> @bitcast_v16i16_to_v32i8(<16 x i16> %a, i32 %b) #0 { ; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 ; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 ; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v5 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v3 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v34 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 ; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v1 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 ; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[4:5] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[2:3] -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[0:1] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[33:34] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] ; VI-NEXT: v_mov_b32_e32 v50, v0 ; VI-NEXT: v_mov_b32_e32 v48, v1 -; VI-NEXT: v_mov_b32_e32 v8, v2 -; VI-NEXT: v_mov_b32_e32 v35, v3 -; VI-NEXT: v_mov_b32_e32 v16, v4 -; VI-NEXT: v_mov_b32_e32 v49, v5 +; VI-NEXT: v_mov_b32_e32 v8, v36 +; VI-NEXT: v_mov_b32_e32 v35, v37 +; VI-NEXT: v_mov_b32_e32 v16, v33 +; VI-NEXT: v_mov_b32_e32 v49, v34 ; VI-NEXT: v_mov_b32_e32 v24, v6 ; VI-NEXT: v_mov_b32_e32 v51, v7 ; VI-NEXT: ; implicit-def: $vgpr1 -; VI-NEXT: ; implicit-def: $vgpr3 -; VI-NEXT: ; implicit-def: $vgpr5 +; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr34 ; VI-NEXT: ; implicit-def: $vgpr7 ; VI-NEXT: .LBB96_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB96_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v9, 3 -; VI-NEXT: v_add_u16_sdwa v36, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v32, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v14, v3, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v10, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v22, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v18, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v30, v7, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v26, v6, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v3, 3 +; VI-NEXT: v_add_u16_sdwa v14, v37, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_e32 v35, 3, v37 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v14 +; VI-NEXT: v_add_u16_sdwa v10, v36, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v37, v35, v4 +; VI-NEXT: v_add_u16_e32 v8, 3, v36 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v10 +; VI-NEXT: v_add_u16_sdwa v22, v34, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v36, v8, v4 +; VI-NEXT: v_add_u16_e32 v49, 3, v34 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v22 +; VI-NEXT: v_add_u16_sdwa v18, v33, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v32, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v2, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v34, v49, v4 +; VI-NEXT: v_add_u16_e32 v16, 3, v33 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v18 +; VI-NEXT: v_add_u16_sdwa v30, v7, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v26, v6, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_u16_e32 v48, 3, v1 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v32 ; VI-NEXT: v_add_u16_e32 v50, 3, v0 -; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v32 -; VI-NEXT: v_add_u16_e32 v35, 3, v3 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v14 -; VI-NEXT: v_add_u16_e32 v8, 3, v2 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10 -; VI-NEXT: v_add_u16_e32 v49, 3, v5 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v22 -; VI-NEXT: v_add_u16_e32 v16, 3, v4 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v18 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 +; VI-NEXT: v_or_b32_e32 v33, v16, v4 ; VI-NEXT: v_add_u16_e32 v51, 3, v7 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v30 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v30 ; VI-NEXT: v_add_u16_e32 v24, 3, v6 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v26 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v26 ; VI-NEXT: v_or_b32_e32 v1, v48, v1 ; VI-NEXT: v_or_b32_e32 v0, v50, v0 -; VI-NEXT: v_or_b32_e32 v3, v35, v3 -; VI-NEXT: v_or_b32_e32 v2, v8, v2 -; VI-NEXT: v_or_b32_e32 v5, v49, v5 -; VI-NEXT: v_or_b32_e32 v4, v16, v4 -; VI-NEXT: v_or_b32_e32 v7, v51, v7 -; VI-NEXT: v_or_b32_e32 v6, v24, v6 +; VI-NEXT: v_or_b32_e32 v7, v51, v4 +; VI-NEXT: v_or_b32_e32 v6, v24, v3 ; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[4:5] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[2:3] -; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[0:1] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[33:34] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] ; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 ; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v1 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 ; VI-NEXT: v_bfe_u32 v31, v30, 8, 8 ; VI-NEXT: v_bfe_u32 v23, v22, 8, 8 ; VI-NEXT: v_bfe_u32 v15, v14, 8, 8 -; VI-NEXT: v_bfe_u32 v39, v36, 8, 8 +; VI-NEXT: v_bfe_u32 v39, v32, 8, 8 ; VI-NEXT: .LBB96_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: v_mov_b32_e32 v0, v50 ; VI-NEXT: v_mov_b32_e32 v1, v38 -; VI-NEXT: v_mov_b32_e32 v2, v32 -; VI-NEXT: v_mov_b32_e32 v3, v33 ; VI-NEXT: v_mov_b32_e32 v4, v48 -; VI-NEXT: v_mov_b32_e32 v5, v37 -; VI-NEXT: v_mov_b32_e32 v6, v36 +; VI-NEXT: v_mov_b32_e32 v6, v32 ; VI-NEXT: v_mov_b32_e32 v7, v39 ; VI-NEXT: v_mov_b32_e32 v12, v35 ; VI-NEXT: v_mov_b32_e32 v20, v49 @@ -31375,111 +31398,113 @@ define <32 x i8> @bitcast_v16i16_to_v32i8(<16 x i16> %a, i32 %b) #0 { ; GFX9-LABEL: bitcast_v16i16_to_v32i8: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_mov_b32_e32 v33, v5 -; GFX9-NEXT: v_mov_b32_e32 v32, v4 -; GFX9-NEXT: v_mov_b32_e32 v35, v3 -; GFX9-NEXT: v_mov_b32_e32 v34, v2 +; GFX9-NEXT: v_mov_b32_e32 v33, v7 +; GFX9-NEXT: v_mov_b32_e32 v32, v6 +; GFX9-NEXT: v_mov_b32_e32 v35, v5 +; GFX9-NEXT: v_mov_b32_e32 v34, v4 +; GFX9-NEXT: v_mov_b32_e32 v37, v3 +; GFX9-NEXT: v_mov_b32_e32 v36, v2 +; GFX9-NEXT: v_mov_b32_e32 v39, v1 +; GFX9-NEXT: v_mov_b32_e32 v38, v0 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; GFX9-NEXT: ; implicit-def: $vgpr38 +; GFX9-NEXT: ; implicit-def: $vgpr1 ; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr3 ; GFX9-NEXT: ; implicit-def: $vgpr5 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr6 +; GFX9-NEXT: ; implicit-def: $vgpr7 ; GFX9-NEXT: ; implicit-def: $vgpr9 ; GFX9-NEXT: ; implicit-def: $vgpr10 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr13 ; GFX9-NEXT: ; implicit-def: $vgpr14 ; GFX9-NEXT: ; implicit-def: $vgpr15 ; GFX9-NEXT: ; implicit-def: $vgpr17 ; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr25 ; GFX9-NEXT: ; implicit-def: $vgpr26 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr30 ; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr3 -; GFX9-NEXT: ; implicit-def: $vgpr11 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB96_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB96_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB96_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v39, v39, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v38, v38, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v37, v37, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v36, v36, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v35, v35, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v34, v34, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v33, v33, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v32, v32, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB96_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] -; GFX9-NEXT: v_mov_b32_e32 v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v8, v34 -; GFX9-NEXT: v_mov_b32_e32 v12, v35 -; GFX9-NEXT: v_mov_b32_e32 v16, v32 -; GFX9-NEXT: v_mov_b32_e32 v20, v33 -; GFX9-NEXT: v_mov_b32_e32 v24, v6 -; GFX9-NEXT: v_mov_b32_e32 v28, v7 -; GFX9-NEXT: v_mov_b32_e32 v1, v38 -; GFX9-NEXT: v_mov_b32_e32 v6, v37 -; GFX9-NEXT: v_mov_b32_e32 v7, v36 +; GFX9-NEXT: v_mov_b32_e32 v0, v38 +; GFX9-NEXT: v_mov_b32_e32 v4, v39 +; GFX9-NEXT: v_mov_b32_e32 v8, v36 +; GFX9-NEXT: v_mov_b32_e32 v12, v37 +; GFX9-NEXT: v_mov_b32_e32 v16, v34 +; GFX9-NEXT: v_mov_b32_e32 v20, v35 +; GFX9-NEXT: v_mov_b32_e32 v24, v32 +; GFX9-NEXT: v_mov_b32_e32 v28, v33 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-TRUE16-LABEL: bitcast_v16i16_to_v32i8: @@ -31746,21 +31771,21 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[26:27], s[6:7], 24 ; SI-NEXT: s_lshr_b64 s[28:29], s[6:7], 16 ; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 8 +; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 24 +; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16 ; SI-NEXT: s_or_b32 s11, s11, s13 +; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 24 +; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 8 ; SI-NEXT: s_lshr_b32 s13, s5, 8 ; SI-NEXT: s_lshr_b32 s25, s7, 8 ; SI-NEXT: s_lshr_b32 s29, s9, 8 -; SI-NEXT: s_lshr_b32 s88, s11, 8 +; SI-NEXT: s_lshr_b32 s43, s11, 8 ; SI-NEXT: s_bfe_u32 s15, s72, 0x80008 ; SI-NEXT: s_bfe_u32 s27, s73, 0x80008 ; SI-NEXT: s_bfe_u32 s41, s74, 0x80008 -; SI-NEXT: s_bfe_u32 s89, s75, 0x80008 -; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 24 -; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8 -; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 24 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 8 +; SI-NEXT: s_bfe_u32 s45, s75, 0x80008 ; SI-NEXT: s_cbranch_execnz .LBB97_3 ; SI-NEXT: .LBB97_2: ; %cmp.true ; SI-NEXT: s_add_i32 s22, s22, 3 @@ -31824,9 +31849,9 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32 ; SI-NEXT: s_lshr_b32 s41, s9, 24 ; SI-NEXT: s_lshr_b32 s74, s9, 16 ; SI-NEXT: s_lshr_b32 s29, s9, 8 -; SI-NEXT: s_lshr_b32 s89, s11, 24 +; SI-NEXT: s_lshr_b32 s45, s11, 24 ; SI-NEXT: s_lshr_b32 s75, s11, 16 -; SI-NEXT: s_lshr_b32 s88, s11, 8 +; SI-NEXT: s_lshr_b32 s43, s11, 8 ; SI-NEXT: .LBB97_3: ; %end ; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: v_mov_b32_e32 v1, s24 @@ -31857,9 +31882,9 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32 ; SI-NEXT: v_mov_b32_e32 v26, s58 ; SI-NEXT: v_mov_b32_e32 v27, s56 ; SI-NEXT: v_mov_b32_e32 v28, s11 -; SI-NEXT: v_mov_b32_e32 v29, s88 +; SI-NEXT: v_mov_b32_e32 v29, s43 ; SI-NEXT: v_mov_b32_e32 v30, s75 -; SI-NEXT: v_mov_b32_e32 v31, s89 +; SI-NEXT: v_mov_b32_e32 v31, s45 ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB97_4: ; SI-NEXT: ; implicit-def: $sgpr4 @@ -31884,8 +31909,8 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32 ; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr88 -; SI-NEXT: ; implicit-def: $sgpr89 +; SI-NEXT: ; implicit-def: $sgpr43 +; SI-NEXT: ; implicit-def: $sgpr45 ; SI-NEXT: s_branch .LBB97_2 ; ; VI-LABEL: bitcast_v16i16_to_v32i8_scalar: @@ -32077,38 +32102,38 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32 ; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB97_4 ; GFX9-NEXT: .LBB97_2: ; %cmp.true -; GFX9-NEXT: v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v9, s19, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v8, s18, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v17, s21, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v16, s20, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v25, s23, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v24, s22, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[24:25] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[16:17] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v0 +; GFX9-NEXT: v_pk_add_u16 v39, s17, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v38, s16, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v37, s19, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v36, s18, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v35, s21, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v34, s20, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v33, s23, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v32, s22, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: s_branch .LBB97_5 ; GFX9-NEXT: .LBB97_3: ; GFX9-NEXT: ; implicit-def: $sgpr59 @@ -32137,30 +32162,30 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32 ; GFX9-NEXT: ; implicit-def: $sgpr14 ; GFX9-NEXT: s_branch .LBB97_2 ; GFX9-NEXT: .LBB97_4: -; GFX9-NEXT: v_mov_b32_e32 v0, s16 -; GFX9-NEXT: v_mov_b32_e32 v1, s17 -; GFX9-NEXT: v_mov_b32_e32 v8, s18 -; GFX9-NEXT: v_mov_b32_e32 v9, s19 -; GFX9-NEXT: v_mov_b32_e32 v16, s20 -; GFX9-NEXT: v_mov_b32_e32 v17, s21 -; GFX9-NEXT: v_mov_b32_e32 v24, s22 -; GFX9-NEXT: v_mov_b32_e32 v25, s23 -; GFX9-NEXT: v_mov_b32_e32 v35, s59 +; GFX9-NEXT: v_mov_b32_e32 v38, s16 +; GFX9-NEXT: v_mov_b32_e32 v39, s17 +; GFX9-NEXT: v_mov_b32_e32 v36, s18 +; GFX9-NEXT: v_mov_b32_e32 v37, s19 +; GFX9-NEXT: v_mov_b32_e32 v34, s20 +; GFX9-NEXT: v_mov_b32_e32 v35, s21 +; GFX9-NEXT: v_mov_b32_e32 v32, s22 +; GFX9-NEXT: v_mov_b32_e32 v33, s23 +; GFX9-NEXT: v_mov_b32_e32 v1, s59 ; GFX9-NEXT: v_mov_b32_e32 v2, s57 ; GFX9-NEXT: v_mov_b32_e32 v5, s58 ; GFX9-NEXT: v_mov_b32_e32 v6, s56 ; GFX9-NEXT: v_mov_b32_e32 v7, s47 -; GFX9-NEXT: v_mov_b32_e32 v34, s46 +; GFX9-NEXT: v_mov_b32_e32 v9, s46 ; GFX9-NEXT: v_mov_b32_e32 v10, s44 ; GFX9-NEXT: v_mov_b32_e32 v13, s45 ; GFX9-NEXT: v_mov_b32_e32 v14, s43 ; GFX9-NEXT: v_mov_b32_e32 v15, s42 -; GFX9-NEXT: v_mov_b32_e32 v33, s41 +; GFX9-NEXT: v_mov_b32_e32 v17, s41 ; GFX9-NEXT: v_mov_b32_e32 v18, s29 ; GFX9-NEXT: v_mov_b32_e32 v21, s40 ; GFX9-NEXT: v_mov_b32_e32 v22, s28 ; GFX9-NEXT: v_mov_b32_e32 v23, s27 -; GFX9-NEXT: v_mov_b32_e32 v32, s26 +; GFX9-NEXT: v_mov_b32_e32 v25, s26 ; GFX9-NEXT: v_mov_b32_e32 v26, s24 ; GFX9-NEXT: v_mov_b32_e32 v29, s25 ; GFX9-NEXT: v_mov_b32_e32 v30, s15 @@ -32170,14 +32195,14 @@ define inreg <32 x i8> @bitcast_v16i16_to_v32i8_scalar(<16 x i16> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v11, s6 ; GFX9-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NEXT: .LBB97_5: ; %end -; GFX9-NEXT: v_mov_b32_e32 v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v12, v9 -; GFX9-NEXT: v_mov_b32_e32 v20, v17 -; GFX9-NEXT: v_mov_b32_e32 v28, v25 -; GFX9-NEXT: v_mov_b32_e32 v1, v35 -; GFX9-NEXT: v_mov_b32_e32 v9, v34 -; GFX9-NEXT: v_mov_b32_e32 v17, v33 -; GFX9-NEXT: v_mov_b32_e32 v25, v32 +; GFX9-NEXT: v_mov_b32_e32 v0, v38 +; GFX9-NEXT: v_mov_b32_e32 v4, v39 +; GFX9-NEXT: v_mov_b32_e32 v8, v36 +; GFX9-NEXT: v_mov_b32_e32 v12, v37 +; GFX9-NEXT: v_mov_b32_e32 v16, v34 +; GFX9-NEXT: v_mov_b32_e32 v20, v35 +; GFX9-NEXT: v_mov_b32_e32 v24, v32 +; GFX9-NEXT: v_mov_b32_e32 v28, v33 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-LABEL: bitcast_v16i16_to_v32i8_scalar: @@ -33342,90 +33367,90 @@ define inreg <16 x i16> @bitcast_v32i8_to_v16i16_scalar(<32 x i8> inreg %a, i32 ; SI-NEXT: v_readfirstlane_b32 s47, v0 ; SI-NEXT: s_cbranch_scc0 .LBB99_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s8, s20, 0xff -; SI-NEXT: s_lshl_b32 s9, s21, 8 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s22, 0xff ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 -; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s23, 24 ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: s_and_b32 s5, s18, 0xff -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_or_b32 s44, s11, s9 ; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s6, s19, 24 -; SI-NEXT: s_or_b32 s13, s8, s44 -; SI-NEXT: s_and_b32 s8, s28, 0xff -; SI-NEXT: s_lshl_b32 s9, s29, 8 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_or_b32 s12, s6, s5 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s47, 0xff -; SI-NEXT: s_or_b32 s10, s4, s12 +; SI-NEXT: s_or_b32 s88, s6, s5 +; SI-NEXT: s_or_b32 s10, s4, s88 ; SI-NEXT: s_and_b32 s4, s24, 0xff ; SI-NEXT: s_lshl_b32 s5, s25, 8 -; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s46, 24 ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: s_and_b32 s5, s26, 0xff -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_or_b32 s45, s11, s9 ; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s6, s27, 24 -; SI-NEXT: s_or_b32 s15, s8, s45 -; SI-NEXT: s_and_b32 s8, s59, 0xff -; SI-NEXT: s_lshl_b32 s9, s58, 8 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_or_b32 s14, s6, s5 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s57, 0xff -; SI-NEXT: s_or_b32 s6, s4, s14 +; SI-NEXT: s_or_b32 s90, s6, s5 +; SI-NEXT: s_or_b32 s8, s4, s90 ; SI-NEXT: s_and_b32 s4, s74, 0xff ; SI-NEXT: s_lshl_b32 s5, s72, 8 -; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s56, 24 ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: s_and_b32 s5, s61, 0xff -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_or_b32 s88, s11, s9 ; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s60, 24 -; SI-NEXT: s_or_b32 s41, s8, s88 -; SI-NEXT: s_and_b32 s8, s75, 0xff -; SI-NEXT: s_lshl_b32 s9, s73, 8 -; SI-NEXT: s_or_b32 s40, s7, s5 -; SI-NEXT: s_and_b32 s5, s79, 0xff -; SI-NEXT: s_lshl_b32 s7, s78, 8 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s63, 0xff +; SI-NEXT: s_lshl_b32 s6, s60, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s92, s6, s5 +; SI-NEXT: s_or_b32 s6, s4, s92 +; SI-NEXT: s_and_b32 s4, s79, 0xff +; SI-NEXT: s_lshl_b32 s5, s78, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s77, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s7, s76, 24 +; SI-NEXT: s_or_b32 s94, s7, s5 +; SI-NEXT: s_and_b32 s5, s20, 0xff +; SI-NEXT: s_lshl_b32 s7, s21, 8 ; SI-NEXT: s_or_b32 s5, s5, s7 -; SI-NEXT: s_and_b32 s7, s77, 0xff -; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s62, 24 +; SI-NEXT: s_and_b32 s7, s22, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_or_b32 s89, s11, s9 -; SI-NEXT: s_lshl_b32 s9, s76, 24 -; SI-NEXT: s_or_b32 s42, s9, s7 -; SI-NEXT: s_and_b32 s7, s8, 0xffff -; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_lshl_b32 s9, s23, 24 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s43, s7, s89 -; SI-NEXT: s_or_b32 s4, s4, s40 -; SI-NEXT: s_or_b32 s8, s5, s42 -; SI-NEXT: s_mov_b32 s11, s13 -; SI-NEXT: s_lshr_b64 s[12:13], s[12:13], 16 -; SI-NEXT: s_mov_b32 s7, s15 -; SI-NEXT: s_lshr_b64 s[14:15], s[14:15], 16 -; SI-NEXT: s_mov_b32 s5, s41 -; SI-NEXT: s_lshr_b64 s[40:41], s[40:41], 16 -; SI-NEXT: s_mov_b32 s9, s43 -; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 16 -; SI-NEXT: s_lshr_b32 s15, s44, 16 -; SI-NEXT: s_lshr_b32 s41, s45, 16 -; SI-NEXT: s_lshr_b32 s43, s88, 16 -; SI-NEXT: s_lshr_b32 s13, s89, 16 +; SI-NEXT: s_or_b32 s7, s9, s7 +; SI-NEXT: s_or_b32 s89, s5, s7 +; SI-NEXT: s_and_b32 s5, s28, 0xff +; SI-NEXT: s_lshl_b32 s9, s29, 8 +; SI-NEXT: s_or_b32 s5, s5, s9 +; SI-NEXT: s_and_b32 s9, s47, 0xff +; SI-NEXT: s_lshl_b32 s9, s9, 16 +; SI-NEXT: s_lshl_b32 s11, s46, 24 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: s_or_b32 s91, s5, s9 +; SI-NEXT: s_and_b32 s5, s59, 0xff +; SI-NEXT: s_lshl_b32 s11, s58, 8 +; SI-NEXT: s_lshr_b64 s[12:13], s[88:89], 16 +; SI-NEXT: s_or_b32 s5, s5, s11 +; SI-NEXT: s_and_b32 s11, s57, 0xff +; SI-NEXT: s_lshl_b32 s11, s11, 16 +; SI-NEXT: s_lshl_b32 s13, s56, 24 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s11, s13, s11 +; SI-NEXT: s_or_b32 s93, s5, s11 +; SI-NEXT: s_and_b32 s5, s75, 0xff +; SI-NEXT: s_lshl_b32 s13, s73, 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[90:91], 16 +; SI-NEXT: s_or_b32 s5, s5, s13 +; SI-NEXT: s_and_b32 s13, s63, 0xff +; SI-NEXT: s_lshl_b32 s13, s13, 16 +; SI-NEXT: s_lshl_b32 s15, s62, 24 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s13, s15, s13 +; SI-NEXT: s_or_b32 s95, s5, s13 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_lshr_b64 s[40:41], s[92:93], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[94:95], 16 +; SI-NEXT: s_or_b32 s4, s4, s94 +; SI-NEXT: s_lshr_b32 s15, s7, 16 +; SI-NEXT: s_lshr_b32 s41, s9, 16 +; SI-NEXT: s_lshr_b32 s43, s11, 16 +; SI-NEXT: s_lshr_b32 s13, s13, 16 +; SI-NEXT: s_mov_b32 s11, s89 +; SI-NEXT: s_mov_b32 s9, s91 +; SI-NEXT: s_mov_b32 s7, s93 +; SI-NEXT: s_mov_b32 s5, s95 ; SI-NEXT: s_cbranch_execnz .LBB99_3 ; SI-NEXT: .LBB99_2: ; %cmp.true ; SI-NEXT: s_add_i32 s79, s79, 3 @@ -33439,70 +33464,68 @@ define inreg <16 x i16> @bitcast_v32i8_to_v16i16_scalar(<32 x i8> inreg %a, i32 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s5, s6 -; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s75, s75, 3 -; SI-NEXT: s_add_i32 s8, s4, 0x3000000 -; SI-NEXT: s_and_b32 s4, s75, 0xff -; SI-NEXT: s_lshl_b32 s5, s73, 8 -; SI-NEXT: s_add_i32 s63, s63, 3 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s6, s63, 0xff -; SI-NEXT: s_addk_i32 s4, 0x300 -; SI-NEXT: s_lshl_b32 s5, s62, 24 -; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_or_b32 s5, s5, s6 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s74, s74, 3 -; SI-NEXT: s_add_i32 s9, s4, 0x3000000 -; SI-NEXT: s_and_b32 s4, s74, 0xff -; SI-NEXT: s_lshl_b32 s5, s72, 8 -; SI-NEXT: s_add_i32 s61, s61, 3 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s6, s61, 0xff -; SI-NEXT: s_addk_i32 s4, 0x300 -; SI-NEXT: s_lshl_b32 s5, s60, 24 -; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_or_b32 s5, s5, s6 -; SI-NEXT: s_add_i32 s59, s59, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s59, 0xff -; SI-NEXT: s_lshl_b32 s6, s58, 8 -; SI-NEXT: s_add_i32 s57, s57, 3 +; SI-NEXT: s_and_b32 s5, s75, 0xff +; SI-NEXT: s_lshl_b32 s6, s73, 8 +; SI-NEXT: s_add_i32 s63, s63, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s7, s57, 0xff +; SI-NEXT: s_and_b32 s7, s63, 0xff ; SI-NEXT: s_addk_i32 s5, 0x300 -; SI-NEXT: s_lshl_b32 s6, s56, 24 +; SI-NEXT: s_lshl_b32 s6, s62, 24 ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_and_b32 s5, s5, 0xffff ; SI-NEXT: s_or_b32 s6, s6, s7 -; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: s_add_i32 s74, s74, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s24, 0xff -; SI-NEXT: s_lshl_b32 s7, s25, 8 -; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: s_and_b32 s6, s74, 0xff +; SI-NEXT: s_lshl_b32 s7, s72, 8 +; SI-NEXT: s_add_i32 s61, s61, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s10, s26, 0xff +; SI-NEXT: s_and_b32 s8, s61, 0xff ; SI-NEXT: s_addk_i32 s6, 0x300 -; SI-NEXT: s_lshl_b32 s7, s27, 24 -; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s7, s60, 24 +; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_or_b32 s7, s7, s10 -; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: s_or_b32 s7, s7, s8 +; SI-NEXT: s_add_i32 s59, s59, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s28, 0xff +; SI-NEXT: s_and_b32 s7, s59, 0xff +; SI-NEXT: s_lshl_b32 s8, s58, 8 +; SI-NEXT: s_add_i32 s57, s57, 3 +; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_and_b32 s9, s57, 0xff +; SI-NEXT: s_addk_i32 s7, 0x300 +; SI-NEXT: s_lshl_b32 s8, s56, 24 +; SI-NEXT: s_lshl_b32 s9, s9, 16 +; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s8, s8, s9 +; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_and_b32 s8, s24, 0xff +; SI-NEXT: s_lshl_b32 s9, s25, 8 +; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_and_b32 s10, s26, 0xff +; SI-NEXT: s_addk_i32 s8, 0x300 +; SI-NEXT: s_lshl_b32 s9, s27, 24 +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_and_b32 s8, s8, 0xffff +; SI-NEXT: s_or_b32 s9, s9, s10 +; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_and_b32 s9, s28, 0xff ; SI-NEXT: s_lshl_b32 s10, s29, 8 ; SI-NEXT: s_add_i32 s47, s47, 3 -; SI-NEXT: s_or_b32 s7, s10, s7 +; SI-NEXT: s_or_b32 s9, s10, s9 ; SI-NEXT: s_and_b32 s11, s47, 0xff -; SI-NEXT: s_addk_i32 s7, 0x300 +; SI-NEXT: s_addk_i32 s9, 0x300 ; SI-NEXT: s_lshl_b32 s10, s46, 24 ; SI-NEXT: s_lshl_b32 s11, s11, 16 -; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_or_b32 s10, s10, s11 ; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_or_b32 s7, s10, s7 +; SI-NEXT: s_or_b32 s9, s10, s9 ; SI-NEXT: s_and_b32 s10, s16, 0xff ; SI-NEXT: s_lshl_b32 s11, s17, 8 ; SI-NEXT: s_add_i32 s18, s18, 3 @@ -33530,16 +33553,18 @@ define inreg <16 x i16> @bitcast_v32i8_to_v16i16_scalar(<32 x i8> inreg %a, i32 ; SI-NEXT: s_add_i32 s5, s5, 0x3000000 ; SI-NEXT: s_add_i32 s6, s6, 0x3000000 ; SI-NEXT: s_add_i32 s7, s7, 0x3000000 +; SI-NEXT: s_add_i32 s8, s8, 0x3000000 +; SI-NEXT: s_add_i32 s9, s9, 0x3000000 ; SI-NEXT: s_add_i32 s10, s10, 0x3000000 ; SI-NEXT: s_add_i32 s11, s11, 0x3000000 ; SI-NEXT: s_lshr_b64 s[12:13], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[14:15], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16 ; SI-NEXT: s_lshr_b32 s15, s11, 16 -; SI-NEXT: s_lshr_b32 s41, s7, 16 -; SI-NEXT: s_lshr_b32 s43, s5, 16 -; SI-NEXT: s_lshr_b32 s13, s9, 16 +; SI-NEXT: s_lshr_b32 s41, s9, 16 +; SI-NEXT: s_lshr_b32 s43, s7, 16 +; SI-NEXT: s_lshr_b32 s13, s5, 16 ; SI-NEXT: .LBB99_3: ; %end ; SI-NEXT: s_and_b32 s10, s10, 0xffff ; SI-NEXT: s_lshl_b32 s12, s12, 16 @@ -33547,44 +33572,44 @@ define inreg <16 x i16> @bitcast_v32i8_to_v16i16_scalar(<32 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_lshl_b32 s12, s15, 16 ; SI-NEXT: s_or_b32 s11, s11, s12 -; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_and_b32 s8, s8, 0xffff ; SI-NEXT: s_lshl_b32 s12, s14, 16 +; SI-NEXT: s_or_b32 s8, s8, s12 +; SI-NEXT: s_and_b32 s9, s9, 0xffff +; SI-NEXT: s_lshl_b32 s12, s41, 16 +; SI-NEXT: s_or_b32 s9, s9, s12 +; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_lshl_b32 s12, s40, 16 ; SI-NEXT: s_or_b32 s6, s6, s12 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s12, s41, 16 +; SI-NEXT: s_lshl_b32 s12, s43, 16 ; SI-NEXT: s_or_b32 s7, s7, s12 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s12, s40, 16 +; SI-NEXT: s_lshl_b32 s12, s42, 16 ; SI-NEXT: s_or_b32 s4, s4, s12 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s12, s43, 16 -; SI-NEXT: s_or_b32 s5, s5, s12 -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s12, s42, 16 -; SI-NEXT: s_or_b32 s8, s8, s12 -; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_lshl_b32 s12, s13, 16 -; SI-NEXT: s_or_b32 s9, s9, s12 +; SI-NEXT: s_or_b32 s5, s5, s12 ; SI-NEXT: v_mov_b32_e32 v0, s10 ; SI-NEXT: v_mov_b32_e32 v1, s11 -; SI-NEXT: v_mov_b32_e32 v2, s6 -; SI-NEXT: v_mov_b32_e32 v3, s7 -; SI-NEXT: v_mov_b32_e32 v4, s4 -; SI-NEXT: v_mov_b32_e32 v5, s5 -; SI-NEXT: v_mov_b32_e32 v6, s8 -; SI-NEXT: v_mov_b32_e32 v7, s9 +; SI-NEXT: v_mov_b32_e32 v2, s8 +; SI-NEXT: v_mov_b32_e32 v3, s9 +; SI-NEXT: v_mov_b32_e32 v4, s6 +; SI-NEXT: v_mov_b32_e32 v5, s7 +; SI-NEXT: v_mov_b32_e32 v6, s4 +; SI-NEXT: v_mov_b32_e32 v7, s5 ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB99_4: ; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr12 ; SI-NEXT: ; implicit-def: $sgpr15 -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr41 -; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr43 -; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr42 ; SI-NEXT: ; implicit-def: $sgpr13 ; SI-NEXT: s_branch .LBB99_2 @@ -33668,78 +33693,78 @@ define inreg <16 x i16> @bitcast_v32i8_to_v16i16_scalar(<32 x i8> inreg %a, i32 ; VI-NEXT: s_add_i32 s47, s47, 3 ; VI-NEXT: v_mov_b32_e32 v0, s46 ; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; VI-NEXT: v_perm_b32 v2, s47, v0, v1 +; VI-NEXT: v_perm_b32 v0, s47, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v0 ; VI-NEXT: s_add_i32 s45, s45, 3 ; VI-NEXT: v_mov_b32_e32 v0, s43 -; VI-NEXT: v_perm_b32 v3, s45, v0, v1 +; VI-NEXT: v_perm_b32 v0, s45, v0, v1 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s44, s44, 3 ; VI-NEXT: v_mov_b32_e32 v0, s41 -; VI-NEXT: v_perm_b32 v4, s44, v0, v1 +; VI-NEXT: v_perm_b32 v0, s44, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v0 ; VI-NEXT: s_add_i32 s42, s42, 3 ; VI-NEXT: v_mov_b32_e32 v0, s15 -; VI-NEXT: v_perm_b32 v5, s42, v0, v1 +; VI-NEXT: v_perm_b32 v0, s42, v0, v1 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s40, s40, 3 ; VI-NEXT: v_mov_b32_e32 v0, s13 -; VI-NEXT: v_perm_b32 v6, s40, v0, v1 +; VI-NEXT: v_perm_b32 v0, s40, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v0 ; VI-NEXT: s_add_i32 s14, s14, 3 ; VI-NEXT: v_mov_b32_e32 v0, s11 -; VI-NEXT: v_perm_b32 v7, s14, v0, v1 +; VI-NEXT: v_perm_b32 v0, s14, v0, v1 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s12, s12, 3 ; VI-NEXT: v_mov_b32_e32 v0, s8 -; VI-NEXT: v_perm_b32 v8, s12, v0, v1 +; VI-NEXT: v_perm_b32 v0, s12, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v0 ; VI-NEXT: s_add_i32 s9, s9, 3 ; VI-NEXT: v_mov_b32_e32 v0, s7 -; VI-NEXT: v_perm_b32 v9, s9, v0, v1 +; VI-NEXT: v_perm_b32 v0, s9, v0, v1 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s10, s10, 3 ; VI-NEXT: v_mov_b32_e32 v0, s6 -; VI-NEXT: v_perm_b32 v10, s10, v0, v1 +; VI-NEXT: v_perm_b32 v0, s10, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v0 ; VI-NEXT: s_add_i32 s28, s28, 3 ; VI-NEXT: v_mov_b32_e32 v0, s29 -; VI-NEXT: v_perm_b32 v11, s28, v0, v1 +; VI-NEXT: v_perm_b32 v0, s28, v0, v1 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s26, s26, 3 ; VI-NEXT: v_mov_b32_e32 v0, s27 -; VI-NEXT: v_perm_b32 v12, s26, v0, v1 +; VI-NEXT: v_perm_b32 v0, s26, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v0 ; VI-NEXT: s_add_i32 s24, s24, 3 ; VI-NEXT: v_mov_b32_e32 v0, s25 -; VI-NEXT: v_perm_b32 v13, s24, v0, v1 +; VI-NEXT: v_perm_b32 v0, s24, v0, v1 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s22, s22, 3 ; VI-NEXT: v_mov_b32_e32 v0, s23 +; VI-NEXT: v_perm_b32 v0, s22, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v0 ; VI-NEXT: s_add_i32 s20, s20, 3 -; VI-NEXT: v_mov_b32_e32 v14, s21 +; VI-NEXT: v_mov_b32_e32 v0, s21 +; VI-NEXT: v_perm_b32 v0, s20, v0, v1 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: v_mov_b32_e32 v15, s19 +; VI-NEXT: v_mov_b32_e32 v0, s19 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v16, s17 -; VI-NEXT: v_perm_b32 v0, s22, v0, v1 -; VI-NEXT: v_perm_b32 v14, s20, v14, v1 -; VI-NEXT: v_perm_b32 v15, s18, v15, v1 +; VI-NEXT: v_perm_b32 v0, s18, v0, v1 ; VI-NEXT: v_perm_b32 v1, s16, v16, v1 ; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1 -; VI-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v14, v0, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v1 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v14 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v2 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v3 -; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v4 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v5 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 -; VI-NEXT: v_add_u32_e32 v6, vcc, 0x300, v7 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v8 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v10 -; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v11 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v12 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v13 -; VI-NEXT: v_or_b32_sdwa v2, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v3, v3, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v6, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v7, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v1, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v2, v2, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v3, v3, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v4, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v5, v5, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v6, v6, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x3000000, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x3000000, v4 @@ -33836,85 +33861,85 @@ define inreg <16 x i16> @bitcast_v32i8_to_v16i16_scalar(<32 x i8> inreg %a, i32 ; GFX9-NEXT: .LBB99_2: ; %cmp.true ; GFX9-NEXT: s_add_i32 s47, s47, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s46 -; GFX9-NEXT: v_mov_b32_e32 v2, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v3, s47, v0, v2 +; GFX9-NEXT: v_mov_b32_e32 v1, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v0, s47, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v0 ; GFX9-NEXT: s_add_i32 s43, s43, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s41 -; GFX9-NEXT: v_perm_b32 v4, s43, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s43, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v0 ; GFX9-NEXT: s_add_i32 s45, s45, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s44 -; GFX9-NEXT: v_perm_b32 v5, s45, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s45, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v0 ; GFX9-NEXT: s_add_i32 s15, s15, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s13 -; GFX9-NEXT: v_perm_b32 v6, s15, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s15, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v0 ; GFX9-NEXT: s_add_i32 s42, s42, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s40 -; GFX9-NEXT: v_perm_b32 v7, s42, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s42, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v0 ; GFX9-NEXT: s_add_i32 s11, s11, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s10 -; GFX9-NEXT: v_perm_b32 v8, s11, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s11, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v0 ; GFX9-NEXT: s_add_i32 s14, s14, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s12 -; GFX9-NEXT: v_perm_b32 v9, s14, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s14, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v0 ; GFX9-NEXT: s_add_i32 s9, s9, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s7 -; GFX9-NEXT: v_perm_b32 v10, s9, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s9, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v0 ; GFX9-NEXT: s_add_i32 s28, s28, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s29 -; GFX9-NEXT: v_perm_b32 v11, s28, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s28, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v0 +; GFX9-NEXT: s_add_i32 s8, s8, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s6 +; GFX9-NEXT: v_perm_b32 v0, s8, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0 +; GFX9-NEXT: s_add_i32 s24, s24, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s25 +; GFX9-NEXT: v_perm_b32 v0, s24, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v0 +; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s27 +; GFX9-NEXT: v_perm_b32 v0, s26, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0 ; GFX9-NEXT: s_add_i32 s20, s20, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s21 -; GFX9-NEXT: v_perm_b32 v0, s20, v0, v2 -; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v0, s20, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0 ; GFX9-NEXT: s_add_i32 s22, s22, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s23 -; GFX9-NEXT: v_perm_b32 v0, s22, v0, v2 -; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v0, s22, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0 ; GFX9-NEXT: s_add_i32 s16, s16, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 -; GFX9-NEXT: v_perm_b32 v0, s16, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s16, v0, v1 ; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: v_mov_b32_e32 v13, s19 +; GFX9-NEXT: v_mov_b32_e32 v16, s19 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_perm_b32 v13, s18, v13, v2 -; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 +; GFX9-NEXT: v_perm_b32 v1, s18, v16, v1 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_lshl_or_b32 v0, v13, 16, v0 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: s_add_i32 s24, s24, 3 -; GFX9-NEXT: v_mov_b32_e32 v13, s25 -; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v5 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v7 -; GFX9-NEXT: s_add_i32 s8, s8, 3 -; GFX9-NEXT: v_lshl_or_b32 v1, v12, 16, v1 -; GFX9-NEXT: v_mov_b32_e32 v12, s6 -; GFX9-NEXT: v_perm_b32 v13, s24, v13, v2 -; GFX9-NEXT: s_add_i32 s26, s26, 3 -; GFX9-NEXT: v_mov_b32_e32 v14, s27 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v8 -; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: v_perm_b32 v12, s8, v12, v2 -; GFX9-NEXT: v_perm_b32 v2, s26, v14, v2 -; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v3 -; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v4 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v9 -; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v10 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v11 -; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v13 -; GFX9-NEXT: v_lshl_or_b32 v5, v7, 16, v5 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v16 -; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v12 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v14 +; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX9-NEXT: v_lshl_or_b32 v6, v6, 16, v7 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v14 -; GFX9-NEXT: v_lshl_or_b32 v2, v2, 16, v10 -; GFX9-NEXT: v_lshl_or_b32 v3, v9, 16, v3 -; GFX9-NEXT: v_lshl_or_b32 v4, v8, 16, v4 -; GFX9-NEXT: v_lshl_or_b32 v7, v15, 16, v7 +; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_lshl_or_b32 v1, v15, 16, v1 +; GFX9-NEXT: v_lshl_or_b32 v2, v13, 16, v2 +; GFX9-NEXT: v_lshl_or_b32 v3, v12, 16, v3 +; GFX9-NEXT: v_lshl_or_b32 v4, v11, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v10, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v9, 16, v6 +; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7 ; GFX9-NEXT: .LBB99_3: ; %end ; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: .LBB99_4: @@ -34655,25 +34680,18 @@ define inreg <16 x bfloat> @bitcast_v16f16_to_v16bf16_scalar(<16 x half> inreg % ; VI-NEXT: s_lshr_b32 s4, s17, 16 ; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: s_lshr_b32 s4, s18, 16 -; VI-NEXT: s_lshr_b32 s5, s22, 16 -; VI-NEXT: v_mov_b32_e32 v0, 0x200 ; VI-NEXT: v_mov_b32_e32 v3, s4 ; VI-NEXT: s_lshr_b32 s4, s19, 16 -; VI-NEXT: v_mov_b32_e32 v6, s5 -; VI-NEXT: s_lshr_b32 s5, s23, 16 ; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: s_lshr_b32 s4, s20, 16 -; VI-NEXT: v_add_f16_e32 v5, s22, v0 -; VI-NEXT: v_add_f16_sdwa v6, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v13, s5 -; VI-NEXT: v_add_f16_e32 v7, s23, v0 -; VI-NEXT: v_add_f16_sdwa v13, v13, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v6, v5, v6 ; VI-NEXT: v_mov_b32_e32 v5, s4 ; VI-NEXT: s_lshr_b32 s4, s21, 16 -; VI-NEXT: v_or_b32_e32 v7, v7, v13 -; VI-NEXT: v_add_f16_sdwa v13, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v5, s4 +; VI-NEXT: v_mov_b32_e32 v6, s4 +; VI-NEXT: s_lshr_b32 s4, s22, 16 +; VI-NEXT: v_mov_b32_e32 v7, s4 +; VI-NEXT: s_lshr_b32 s4, s23, 16 +; VI-NEXT: v_mov_b32_e32 v0, 0x200 +; VI-NEXT: v_mov_b32_e32 v16, s4 ; VI-NEXT: v_add_f16_e32 v8, s16, v0 ; VI-NEXT: v_add_f16_sdwa v9, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s17, v0 @@ -34683,9 +34701,16 @@ define inreg <16 x bfloat> @bitcast_v16f16_to_v16bf16_scalar(<16 x half> inreg % ; VI-NEXT: v_add_f16_e32 v3, s19, v0 ; VI-NEXT: v_add_f16_sdwa v12, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v4, s20, v0 -; VI-NEXT: v_add_f16_sdwa v5, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v0, s21, v0 -; VI-NEXT: v_or_b32_e32 v5, v0, v5 +; VI-NEXT: v_add_f16_sdwa v13, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v5, s21, v0 +; VI-NEXT: v_add_f16_sdwa v14, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v6, s22, v0 +; VI-NEXT: v_add_f16_sdwa v15, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v7, s23, v0 +; VI-NEXT: v_add_f16_sdwa v0, v16, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v7, v7, v0 +; VI-NEXT: v_or_b32_e32 v6, v6, v15 +; VI-NEXT: v_or_b32_e32 v5, v5, v14 ; VI-NEXT: v_or_b32_e32 v4, v4, v13 ; VI-NEXT: v_or_b32_e32 v3, v3, v12 ; VI-NEXT: v_or_b32_e32 v2, v2, v11 @@ -35604,144 +35629,144 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg % ; SI-NEXT: s_and_b32 s19, s16, 0xffff0000 ; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: s_cmp_lg_u32 s24, 0 -; SI-NEXT: v_mul_f32_e64 v51, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v36, 1.0, s18 +; SI-NEXT: v_mul_f32_e64 v54, 1.0, s19 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s18 ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17 -; SI-NEXT: v_mul_f32_e64 v50, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v37, 1.0, s12 -; SI-NEXT: v_mul_f32_e64 v19, 1.0, s13 -; SI-NEXT: v_mul_f32_e64 v49, 1.0, s10 -; SI-NEXT: v_mul_f32_e64 v38, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v17, 1.0, s9 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v15, 1.0, s5 -; SI-NEXT: v_mul_f32_e64 v31, 1.0, s16 -; SI-NEXT: v_mul_f32_e64 v29, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v53, 1.0, s14 +; SI-NEXT: v_mul_f32_e64 v48, 1.0, s12 +; SI-NEXT: v_mul_f32_e64 v17, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v52, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v49, 1.0, s8 +; SI-NEXT: v_mul_f32_e64 v15, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v51, 1.0, s6 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s4 +; SI-NEXT: v_mul_f32_e64 v13, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v35, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v31, 1.0, s15 ; SI-NEXT: v_mul_f32_e64 v27, 1.0, s11 -; SI-NEXT: v_mul_f32_e64 v24, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v23, 1.0, s7 ; SI-NEXT: s_cbranch_scc0 .LBB103_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v37 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v36 -; SI-NEXT: v_lshr_b64 v[3:4], v[19:20], 16 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v38 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v39 -; SI-NEXT: v_lshr_b64 v[13:14], v[0:1], 16 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v50 -; SI-NEXT: v_lshr_b64 v[10:11], v[17:18], 16 -; SI-NEXT: v_lshr_b64 v[7:8], v[15:16], 16 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v50 -; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v51 -; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v49 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v48 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v51 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v49 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v48 -; SI-NEXT: v_lshr_b64 v[33:34], v[2:3], 16 -; SI-NEXT: v_lshr_b64 v[21:22], v[29:30], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[12:13], 16 -; SI-NEXT: v_lshr_b64 v[8:9], v[9:10], 16 -; SI-NEXT: v_lshr_b64 v[34:35], v[6:7], 16 -; SI-NEXT: v_lshr_b64 v[5:6], v[31:32], 16 -; SI-NEXT: v_lshr_b64 v[22:23], v[27:28], 16 -; SI-NEXT: v_lshr_b64 v[25:26], v[24:25], 16 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v39 +; SI-NEXT: v_lshr_b64 v[11:12], v[0:1], 16 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v54 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v49 +; SI-NEXT: v_lshr_b64 v[25:26], v[10:11], 16 +; SI-NEXT: v_lshr_b64 v[9:10], v[15:16], 16 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v48 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v52 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v50 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v53 +; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 16 +; SI-NEXT: v_lshr_b64 v[33:34], v[8:9], 16 +; SI-NEXT: v_lshr_b64 v[7:8], v[13:14], 16 +; SI-NEXT: v_lshr_b64 v[19:20], v[31:32], 16 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v52 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v53 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v51 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v54 +; SI-NEXT: v_lshr_b64 v[20:21], v[27:28], 16 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v51 +; SI-NEXT: v_lshr_b64 v[29:30], v[2:3], 16 +; SI-NEXT: v_lshr_b64 v[37:38], v[6:7], 16 +; SI-NEXT: v_lshr_b64 v[5:6], v[35:36], 16 +; SI-NEXT: v_lshr_b64 v[21:22], v[23:24], 16 ; SI-NEXT: s_cbranch_execnz .LBB103_3 ; SI-NEXT: .LBB103_2: ; %cmp.true -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v51 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v31 -; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v54 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v35 +; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v24 ; SI-NEXT: v_lshr_b64 v[5:6], v[1:2], 16 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v50 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v29 -; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v53 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v31 +; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v13 -; SI-NEXT: v_lshr_b64 v[21:22], v[1:2], 16 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v49 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v11 +; SI-NEXT: v_lshr_b64 v[19:20], v[1:2], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v52 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v27 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v3 -; SI-NEXT: v_lshr_b64 v[22:23], v[1:2], 16 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v24 +; SI-NEXT: v_lshr_b64 v[20:21], v[1:2], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v51 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v23 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v4 -; SI-NEXT: v_lshr_b64 v[25:26], v[1:2], 16 +; SI-NEXT: v_lshr_b64 v[21:22], v[1:2], 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v1 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v50 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v15 ; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v39 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v49 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v17 ; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v38 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v48 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v19 -; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v37 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v39 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v4 -; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v3 -; SI-NEXT: v_lshr_b64 v[3:4], v[19:20], 16 +; SI-NEXT: v_lshr_b64 v[7:8], v[13:14], 16 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_lshr_b64 v[7:8], v[15:16], 16 -; SI-NEXT: v_lshr_b64 v[10:11], v[17:18], 16 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v13 -; SI-NEXT: v_lshr_b64 v[13:14], v[0:1], 16 -; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 -; SI-NEXT: v_lshr_b64 v[33:34], v[2:3], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[12:13], 16 -; SI-NEXT: v_lshr_b64 v[8:9], v[9:10], 16 -; SI-NEXT: v_lshr_b64 v[34:35], v[6:7], 16 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v4 +; SI-NEXT: v_lshr_b64 v[9:10], v[15:16], 16 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v3 +; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v11 +; SI-NEXT: v_lshr_b64 v[11:12], v[0:1], 16 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v24 +; SI-NEXT: v_lshr_b64 v[25:26], v[10:11], 16 +; SI-NEXT: v_lshr_b64 v[29:30], v[2:3], 16 +; SI-NEXT: v_lshr_b64 v[33:34], v[8:9], 16 +; SI-NEXT: v_lshr_b64 v[37:38], v[6:7], 16 ; SI-NEXT: .LBB103_3: ; %end -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v13 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v11 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v25 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v0, v0, v4 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v33 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v19 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v29 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v18 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v22 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v8 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v20 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v18 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v9 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v16 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v25 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v21 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37 ; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v14 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB103_4: ; SI-NEXT: ; implicit-def: $vgpr5 +; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr11 -; SI-NEXT: ; implicit-def: $vgpr13 -; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr3 -; SI-NEXT: ; implicit-def: $vgpr22 -; SI-NEXT: ; implicit-def: $vgpr8 -; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr10 +; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr9 +; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr7 ; SI-NEXT: s_branch .LBB103_2 ; @@ -35754,8 +35779,8 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg % ; VI-NEXT: s_cbranch_execnz .LBB103_4 ; VI-NEXT: .LBB103_2: ; %cmp.true ; VI-NEXT: s_lshl_b32 s4, s16, 16 -; VI-NEXT: v_mov_b32_e32 v10, 0x40c00000 -; VI-NEXT: v_add_f32_e32 v0, s4, v10 +; VI-NEXT: v_mov_b32_e32 v15, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v0, s4, v15 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 @@ -35763,7 +35788,7 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg % ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 ; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v10 +; VI-NEXT: v_add_f32_e32 v1, s4, v15 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 @@ -35771,14 +35796,14 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg % ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: s_lshl_b32 s4, s17, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v10 +; VI-NEXT: v_add_f32_e32 v2, s4, v15 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v10 +; VI-NEXT: v_add_f32_e32 v2, s4, v15 ; VI-NEXT: v_cndmask_b32_e32 v8, v3, v4, vcc ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 @@ -35788,7 +35813,7 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg % ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc ; VI-NEXT: s_lshl_b32 s4, s18, 16 ; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s4, v10 +; VI-NEXT: v_add_f32_e32 v2, s4, v15 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 @@ -35796,7 +35821,7 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg % ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v10 +; VI-NEXT: v_add_f32_e32 v3, s4, v15 ; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 ; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 @@ -35804,15 +35829,15 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg % ; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 ; VI-NEXT: s_lshl_b32 s4, s19, 16 ; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_add_f32_e32 v4, s4, v10 +; VI-NEXT: v_add_f32_e32 v4, s4, v15 ; VI-NEXT: v_bfe_u32 v5, v4, 16, 1 ; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v4 ; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 ; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v6, 0x400000, v4 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 -; VI-NEXT: v_add_f32_e32 v4, s4, v10 -; VI-NEXT: v_cndmask_b32_e32 v11, v5, v6, vcc +; VI-NEXT: v_add_f32_e32 v4, s4, v15 +; VI-NEXT: v_cndmask_b32_e32 v10, v5, v6, vcc ; VI-NEXT: v_bfe_u32 v5, v4, 16, 1 ; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v4 ; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 @@ -35820,8 +35845,8 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg % ; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 ; VI-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc ; VI-NEXT: s_lshl_b32 s4, s20, 16 -; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v4 -; VI-NEXT: v_add_f32_e32 v4, s4, v10 +; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v4 +; VI-NEXT: v_add_f32_e32 v4, s4, v15 ; VI-NEXT: v_bfe_u32 v5, v4, 16, 1 ; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v4 ; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 @@ -35829,79 +35854,79 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg % ; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 ; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc -; VI-NEXT: v_add_f32_e32 v5, s4, v10 +; VI-NEXT: v_add_f32_e32 v5, s4, v15 ; VI-NEXT: v_bfe_u32 v6, v5, 16, 1 ; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v5 ; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v6 -; VI-NEXT: s_and_b32 s5, s21, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v7, 0x400000, v5 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v13, s5, v10 -; VI-NEXT: s_lshl_b32 s5, s22, 16 +; VI-NEXT: s_lshl_b32 s4, s21, 16 ; VI-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc -; VI-NEXT: v_add_f32_e32 v6, s5, v10 +; VI-NEXT: v_add_f32_e32 v6, s4, v15 +; VI-NEXT: v_bfe_u32 v7, v6, 16, 1 +; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v6 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v12, 0x400000, v6 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; VI-NEXT: v_add_f32_e32 v6, s4, v15 +; VI-NEXT: v_cndmask_b32_e32 v12, v7, v12, vcc +; VI-NEXT: v_bfe_u32 v7, v6, 16, 1 +; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v6 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v6 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; VI-NEXT: v_cndmask_b32_e32 v6, v7, v13, vcc +; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v6 +; VI-NEXT: v_add_f32_e32 v6, s4, v15 ; VI-NEXT: v_bfe_u32 v7, v6, 16, 1 ; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v6 ; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 ; VI-NEXT: v_or_b32_e32 v14, 0x400000, v6 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 -; VI-NEXT: s_and_b32 s5, s22, 0xffff0000 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v6, v7, v14, vcc -; VI-NEXT: v_add_f32_e32 v7, s5, v10 +; VI-NEXT: v_add_f32_e32 v7, s4, v15 ; VI-NEXT: v_bfe_u32 v14, v7, 16, 1 ; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v7 -; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_add_u32_e32 v14, vcc, 0x7fff, v14 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v7 +; VI-NEXT: v_or_b32_e32 v16, 0x400000, v7 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[4:5] -; VI-NEXT: v_cndmask_b32_e32 v7, v14, v15, vcc -; VI-NEXT: v_bfe_u32 v5, v13, 16, 1 +; VI-NEXT: s_lshl_b32 s4, s23, 16 +; VI-NEXT: v_cndmask_b32_e32 v7, v14, v16, vcc +; VI-NEXT: v_add_f32_e32 v14, s4, v15 +; VI-NEXT: v_bfe_u32 v16, v14, 16, 1 +; VI-NEXT: v_add_u32_e32 v16, vcc, v16, v14 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v16 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v17, 0x400000, v14 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; VI-NEXT: v_add_f32_e32 v15, s4, v15 +; VI-NEXT: v_cndmask_b32_e32 v14, v16, v17, vcc +; VI-NEXT: v_bfe_u32 v16, v15, 16, 1 +; VI-NEXT: v_add_u32_e32 v16, vcc, v16, v15 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v16 +; VI-NEXT: v_or_b32_e32 v17, 0x400000, v15 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 ; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v13 -; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_cndmask_b32_e32 v15, v16, v17, vcc +; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[6:7] -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v10 -; VI-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v7, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v13 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v14, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v13, v7, v14, vcc -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v5 -; VI-NEXT: v_add_f32_e32 v5, s4, v10 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: s_lshl_b32 s4, s23, 16 -; VI-NEXT: v_cndmask_b32_e32 v5, v7, v15, vcc -; VI-NEXT: v_add_f32_e32 v7, s4, v10 -; VI-NEXT: v_bfe_u32 v10, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v10, vcc, v10, v7 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x7fff, v10 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_cndmask_b32_e32 v15, v10, v15, vcc -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v5 ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[15:16] -; VI-NEXT: v_lshrrev_b64 v[13:14], 16, v[13:14] -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[11:12] +; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 +; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[14:15] +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[12:13] +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[10:11] ; VI-NEXT: v_lshrrev_b64 v[7:8], 16, v[8:9] +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[4:5] ; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[2:3] ; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] ; VI-NEXT: v_mov_b32_e32 v1, v7 ; VI-NEXT: v_mov_b32_e32 v3, v10 -; VI-NEXT: v_mov_b32_e32 v5, v13 -; VI-NEXT: v_mov_b32_e32 v7, v15 +; VI-NEXT: v_mov_b32_e32 v5, v12 +; VI-NEXT: v_mov_b32_e32 v7, v14 ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB103_3: ; VI-NEXT: s_branch .LBB103_2 @@ -35929,155 +35954,155 @@ define inreg <16 x half> @bitcast_v16bf16_to_v16f16_scalar(<16 x bfloat> inreg % ; GFX9-NEXT: v_add_f32_e32 v0, s4, v1 ; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v0 -; GFX9-NEXT: s_lshl_b32 s4, s16, 16 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 ; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v3, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v0 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: s_lshl_b32 s4, s16, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc +; GFX9-NEXT: v_add_f32_e32 v2, s4, v1 +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 ; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: v_add_f32_e32 v2, s4, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v8, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; GFX9-NEXT: s_lshl_b32 s4, s17, 16 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v2 +; GFX9-NEXT: v_add_f32_e32 v2, s4, v1 +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: v_add_f32_e32 v2, s4, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v10, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: s_lshl_b32 s4, s18, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc ; GFX9-NEXT: v_add_f32_e32 v3, s4, v1 ; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 ; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: s_lshl_b32 s4, s17, 16 +; GFX9-NEXT: v_add_f32_e32 v3, s4, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v11, v4, v5, vcc +; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: s_lshl_b32 s4, s19, 16 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; GFX9-NEXT: v_add_f32_e32 v4, s4, v1 ; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 -; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000 +; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 ; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 ; GFX9-NEXT: v_add_f32_e32 v4, s4, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v8, v5, v6, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v12, v5, v6, vcc ; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 ; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 ; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 -; GFX9-NEXT: s_lshl_b32 s4, s18, 16 +; GFX9-NEXT: s_lshl_b32 s4, s20, 16 ; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc ; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 ; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 -; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000 -; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 -; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v9, v6, v7, vcc -; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 -; GFX9-NEXT: s_lshl_b32 s4, s19, 16 +; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 ; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 ; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v10, v6, v7, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v13, v6, v7, vcc ; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 -; GFX9-NEXT: s_and_b32 s5, s22, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 ; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_add_f32_e32 v5, s5, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v11, v6, v7, vcc -; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 -; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 -; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: s_lshl_b32 s5, s22, 16 +; GFX9-NEXT: s_lshl_b32 s4, s21, 16 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc -; GFX9-NEXT: v_add_f32_e32 v6, s5, v1 +; GFX9-NEXT: v_add_f32_e32 v6, s4, v1 +; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 +; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v6 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: v_add_f32_e32 v6, s4, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v14, v7, v14, vcc ; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 ; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 -; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v6 +; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v6 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 -; GFX9-NEXT: s_and_b32 s5, s23, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v12, vcc -; GFX9-NEXT: v_add_f32_e32 v7, s5, v1 -; GFX9-NEXT: v_bfe_u32 v12, v7, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v12, v12, v7 -; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 -; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v7 +; GFX9-NEXT: s_lshl_b32 s4, s22, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v15, vcc +; GFX9-NEXT: v_add_f32_e32 v7, s4, v1 +; GFX9-NEXT: v_bfe_u32 v15, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v7 +; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v16, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: v_add_f32_e32 v7, s4, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v15, v15, v16, vcc +; GFX9-NEXT: v_bfe_u32 v16, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v16, v16, v7 +; GFX9-NEXT: s_lshl_b32 s4, s23, 16 +; GFX9-NEXT: v_add_u32_e32 v16, 0x7fff, v16 +; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v7 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: s_lshl_b32 s5, s23, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v12, v13, vcc -; GFX9-NEXT: v_add_f32_e32 v12, s5, v1 -; GFX9-NEXT: v_bfe_u32 v13, v12, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v13, v13, v12 -; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 -; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v12 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 -; GFX9-NEXT: v_cndmask_b32_e32 v12, v13, v14, vcc -; GFX9-NEXT: v_mov_b32_e32 v13, 0xffff -; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; GFX9-NEXT: v_and_b32_sdwa v6, v13, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NEXT: v_and_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v6, v5, 16, v6 -; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 -; GFX9-NEXT: v_lshl_or_b32 v7, v7, 16, v12 -; GFX9-NEXT: v_bfe_u32 v12, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v12, v12, v5 -; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 -; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: s_lshl_b32 s4, s21, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v12, v14, vcc -; GFX9-NEXT: v_add_f32_e32 v12, s4, v1 -; GFX9-NEXT: v_bfe_u32 v14, v12, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v14, v14, v12 -; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 -; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v12 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 -; GFX9-NEXT: v_cndmask_b32_e32 v12, v14, v15, vcc -; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5 -; GFX9-NEXT: v_and_b32_sdwa v12, v13, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v5, v5, 16, v12 -; GFX9-NEXT: v_add_f32_e32 v12, s4, v1 -; GFX9-NEXT: v_bfe_u32 v14, v12, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v14, v14, v12 -; GFX9-NEXT: s_lshl_b32 s4, s20, 16 -; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 -; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v12 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 ; GFX9-NEXT: v_add_f32_e32 v1, s4, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v12, v14, v15, vcc -; GFX9-NEXT: v_bfe_u32 v14, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v14, v14, v1 -; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 -; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v7, v16, v17, vcc +; GFX9-NEXT: v_bfe_u32 v16, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v16, v16, v1 +; GFX9-NEXT: v_add_u32_e32 v16, 0x7fff, v16 +; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v10 -; GFX9-NEXT: v_cndmask_b32_e32 v10, v14, v15, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v12 -; GFX9-NEXT: v_and_b32_sdwa v10, v13, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v4, v4, 16, v10 -; GFX9-NEXT: v_and_b32_sdwa v10, v13, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_and_b32_sdwa v9, v13, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_and_b32_sdwa v8, v13, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_and_b32_sdwa v0, v13, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v3, v3, 16, v10 -; GFX9-NEXT: v_lshl_or_b32 v2, v2, 16, v9 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v8 -; GFX9-NEXT: v_lshl_or_b32 v0, v16, 16, v0 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v16, v17, vcc +; GFX9-NEXT: v_mov_b32_e32 v16, 0xffff +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v7 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v6 +; GFX9-NEXT: v_lshl_or_b32 v7, v7, 16, v1 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v6, 16, v1 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v5, 16, v1 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_lshl_or_b32 v4, v4, 16, v1 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_lshl_or_b32 v3, v3, 16, v1 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-NEXT: v_lshl_or_b32 v2, v2, 16, v1 +; GFX9-NEXT: v_and_b32_sdwa v1, v16, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_and_b32_sdwa v8, v16, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v1, v9, 16, v1 +; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v8 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: .LBB103_3: ; GFX9-NEXT: s_branch .LBB103_2 @@ -36680,231 +36705,235 @@ define <32 x i8> @bitcast_v16f16_to_v32i8(<16 x half> %a, i32 %b) #0 { ; VI-LABEL: bitcast_v16f16_to_v32i8: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; VI-NEXT: v_mov_b32_e32 v33, v7 +; VI-NEXT: v_mov_b32_e32 v32, v6 ; VI-NEXT: v_mov_b32_e32 v35, v5 ; VI-NEXT: v_mov_b32_e32 v34, v4 -; VI-NEXT: v_mov_b32_e32 v33, v3 -; VI-NEXT: v_mov_b32_e32 v32, v2 +; VI-NEXT: v_mov_b32_e32 v37, v3 +; VI-NEXT: v_mov_b32_e32 v36, v2 +; VI-NEXT: v_mov_b32_e32 v39, v1 +; VI-NEXT: v_mov_b32_e32 v38, v0 ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v33 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: ; implicit-def: $vgpr1 +; VI-NEXT: ; implicit-def: $vgpr3 ; VI-NEXT: ; implicit-def: $vgpr5 -; VI-NEXT: ; implicit-def: $vgpr37 +; VI-NEXT: ; implicit-def: $vgpr7 ; VI-NEXT: ; implicit-def: $vgpr9 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr13 ; VI-NEXT: ; implicit-def: $vgpr15 ; VI-NEXT: ; implicit-def: $vgpr17 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr3 -; VI-NEXT: ; implicit-def: $vgpr11 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB104_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 ; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 ; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 ; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v33 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v33 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[32:33] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: .LBB104_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB104_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v5, 0x200 -; VI-NEXT: v_add_f16_sdwa v14, v33, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_sdwa v36, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v14 -; VI-NEXT: v_add_f16_e32 v33, 0x200, v33 -; VI-NEXT: v_add_f16_sdwa v10, v32, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v36 -; VI-NEXT: v_add_f16_e32 v1, 0x200, v1 -; VI-NEXT: v_or_b32_e32 v12, v33, v8 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v10 -; VI-NEXT: v_add_f16_e32 v32, 0x200, v32 -; VI-NEXT: v_add_f16_sdwa v22, v35, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v4, v1, v2 -; VI-NEXT: v_add_f16_sdwa v2, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v11, v32, v8 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v22 +; VI-NEXT: v_mov_b32_e32 v3, 0x200 +; VI-NEXT: v_add_f16_sdwa v14, v37, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v14 +; VI-NEXT: v_add_f16_e32 v37, 0x200, v37 +; VI-NEXT: v_add_f16_sdwa v10, v36, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v8, v37, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v10 +; VI-NEXT: v_add_f16_e32 v36, 0x200, v36 +; VI-NEXT: v_add_f16_sdwa v22, v35, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_sdwa v6, v39, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v7, v36, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v22 ; VI-NEXT: v_add_f16_e32 v35, 0x200, v35 -; VI-NEXT: v_add_f16_sdwa v18, v34, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_sdwa v30, v7, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_sdwa v26, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v2 -; VI-NEXT: v_add_f16_e32 v0, 0x200, v0 -; VI-NEXT: v_or_b32_e32 v9, v35, v8 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v18 +; VI-NEXT: v_add_f16_sdwa v18, v34, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 +; VI-NEXT: v_add_f16_e32 v39, 0x200, v39 +; VI-NEXT: v_add_f16_sdwa v2, v38, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v16, v35, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v18 ; VI-NEXT: v_add_f16_e32 v34, 0x200, v34 -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v30 -; VI-NEXT: v_add_f16_e32 v7, 0x200, v7 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v26 -; VI-NEXT: v_add_f16_e32 v6, 0x200, v6 -; VI-NEXT: v_or_b32_e32 v3, v0, v3 -; VI-NEXT: v_or_b32_e32 v8, v34, v8 -; VI-NEXT: v_or_b32_e32 v16, v7, v13 -; VI-NEXT: v_or_b32_e32 v15, v6, v5 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[15:16] -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v9 -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[8:9] -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v11 -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12] -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3 -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4] -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v16 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v8 +; VI-NEXT: v_add_f16_sdwa v30, v33, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_sdwa v26, v32, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v39, v0 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v2 +; VI-NEXT: v_add_f16_e32 v38, 0x200, v38 +; VI-NEXT: v_or_b32_e32 v15, v34, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v30 +; VI-NEXT: v_add_f16_e32 v33, 0x200, v33 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v26 +; VI-NEXT: v_add_f16_e32 v32, 0x200, v32 +; VI-NEXT: v_or_b32_e32 v0, v38, v0 +; VI-NEXT: v_or_b32_e32 v24, v33, v4 +; VI-NEXT: v_or_b32_e32 v23, v32, v3 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[23:24] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[15:16] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v23 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; VI-NEXT: v_bfe_u32 v31, v30, 8, 8 ; VI-NEXT: v_bfe_u32 v23, v22, 8, 8 ; VI-NEXT: v_bfe_u32 v15, v14, 8, 8 -; VI-NEXT: v_bfe_u32 v37, v36, 8, 8 +; VI-NEXT: v_bfe_u32 v7, v6, 8, 8 ; VI-NEXT: .LBB104_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] -; VI-NEXT: v_mov_b32_e32 v4, v1 -; VI-NEXT: v_mov_b32_e32 v8, v32 -; VI-NEXT: v_mov_b32_e32 v12, v33 +; VI-NEXT: v_mov_b32_e32 v0, v38 +; VI-NEXT: v_mov_b32_e32 v4, v39 +; VI-NEXT: v_mov_b32_e32 v8, v36 +; VI-NEXT: v_mov_b32_e32 v12, v37 ; VI-NEXT: v_mov_b32_e32 v16, v34 ; VI-NEXT: v_mov_b32_e32 v20, v35 -; VI-NEXT: v_mov_b32_e32 v24, v6 -; VI-NEXT: v_mov_b32_e32 v28, v7 -; VI-NEXT: v_mov_b32_e32 v1, v38 -; VI-NEXT: v_mov_b32_e32 v6, v36 -; VI-NEXT: v_mov_b32_e32 v7, v37 +; VI-NEXT: v_mov_b32_e32 v24, v32 +; VI-NEXT: v_mov_b32_e32 v28, v33 ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v16f16_to_v32i8: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_mov_b32_e32 v33, v5 -; GFX9-NEXT: v_mov_b32_e32 v32, v4 -; GFX9-NEXT: v_mov_b32_e32 v35, v3 -; GFX9-NEXT: v_mov_b32_e32 v34, v2 +; GFX9-NEXT: v_mov_b32_e32 v33, v7 +; GFX9-NEXT: v_mov_b32_e32 v32, v6 +; GFX9-NEXT: v_mov_b32_e32 v35, v5 +; GFX9-NEXT: v_mov_b32_e32 v34, v4 +; GFX9-NEXT: v_mov_b32_e32 v37, v3 +; GFX9-NEXT: v_mov_b32_e32 v36, v2 +; GFX9-NEXT: v_mov_b32_e32 v39, v1 +; GFX9-NEXT: v_mov_b32_e32 v38, v0 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; GFX9-NEXT: ; implicit-def: $vgpr38 +; GFX9-NEXT: ; implicit-def: $vgpr1 ; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr3 ; GFX9-NEXT: ; implicit-def: $vgpr5 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; implicit-def: $vgpr6 +; GFX9-NEXT: ; implicit-def: $vgpr7 ; GFX9-NEXT: ; implicit-def: $vgpr9 ; GFX9-NEXT: ; implicit-def: $vgpr10 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr13 ; GFX9-NEXT: ; implicit-def: $vgpr14 ; GFX9-NEXT: ; implicit-def: $vgpr15 ; GFX9-NEXT: ; implicit-def: $vgpr17 ; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr25 ; GFX9-NEXT: ; implicit-def: $vgpr26 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr30 ; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr3 -; GFX9-NEXT: ; implicit-def: $vgpr11 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB104_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB104_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB104_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true ; GFX9-NEXT: s_movk_i32 s6, 0x200 -; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v0, v0, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v39, v39, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v38, v38, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v37, v37, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v36, v36, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v35, v35, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v34, v34, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v33, v33, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v32, v32, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v7, v7, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v6, v6, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB104_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] -; GFX9-NEXT: v_mov_b32_e32 v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v8, v34 -; GFX9-NEXT: v_mov_b32_e32 v12, v35 -; GFX9-NEXT: v_mov_b32_e32 v16, v32 -; GFX9-NEXT: v_mov_b32_e32 v20, v33 -; GFX9-NEXT: v_mov_b32_e32 v24, v6 -; GFX9-NEXT: v_mov_b32_e32 v28, v7 -; GFX9-NEXT: v_mov_b32_e32 v1, v38 -; GFX9-NEXT: v_mov_b32_e32 v6, v37 -; GFX9-NEXT: v_mov_b32_e32 v7, v36 +; GFX9-NEXT: v_mov_b32_e32 v0, v38 +; GFX9-NEXT: v_mov_b32_e32 v4, v39 +; GFX9-NEXT: v_mov_b32_e32 v8, v36 +; GFX9-NEXT: v_mov_b32_e32 v12, v37 +; GFX9-NEXT: v_mov_b32_e32 v16, v34 +; GFX9-NEXT: v_mov_b32_e32 v20, v35 +; GFX9-NEXT: v_mov_b32_e32 v24, v32 +; GFX9-NEXT: v_mov_b32_e32 v28, v33 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-TRUE16-LABEL: bitcast_v16f16_to_v32i8: @@ -37252,17 +37281,17 @@ define inreg <32 x i8> @bitcast_v16f16_to_v32i8_scalar(<16 x half> inreg %a, i32 ; SI-NEXT: v_or_b32_e32 v48, v1, v0 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 ; SI-NEXT: v_or_b32_e32 v49, v2, v0 -; SI-NEXT: v_lshr_b64 v[0:1], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[37:38], 24 -; SI-NEXT: v_lshr_b64 v[16:17], v[35:36], 16 -; SI-NEXT: v_lshr_b64 v[24:25], v[33:34], 16 ; SI-NEXT: v_lshr_b64 v[3:4], v[48:49], 24 +; SI-NEXT: v_lshr_b64 v[11:12], v[37:38], 24 +; SI-NEXT: v_lshr_b64 v[19:20], v[35:36], 24 +; SI-NEXT: v_lshr_b64 v[27:28], v[33:34], 24 +; SI-NEXT: v_lshr_b64 v[4:5], v[48:49], 16 ; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 8 ; SI-NEXT: v_lshr_b64 v[12:13], v[37:38], 16 ; SI-NEXT: v_lshr_b64 v[9:10], v[37:38], 8 -; SI-NEXT: v_lshr_b64 v[19:20], v[35:36], 24 +; SI-NEXT: v_lshr_b64 v[20:21], v[35:36], 16 ; SI-NEXT: v_lshr_b64 v[17:18], v[35:36], 8 -; SI-NEXT: v_lshr_b64 v[27:28], v[33:34], 24 +; SI-NEXT: v_lshr_b64 v[28:29], v[33:34], 16 ; SI-NEXT: v_lshr_b64 v[25:26], v[33:34], 8 ; SI-NEXT: v_lshrrev_b32_e32 v5, 8, v49 ; SI-NEXT: v_lshrrev_b32_e32 v13, 8, v38 @@ -37321,29 +37350,29 @@ define inreg <32 x i8> @bitcast_v16f16_to_v32i8_scalar(<16 x half> inreg %a, i32 ; SI-NEXT: v_mov_b32_e32 v21, s13 ; SI-NEXT: v_mov_b32_e32 v29, s15 ; SI-NEXT: v_mov_b32_e32 v3, s4 -; SI-NEXT: v_mov_b32_e32 v0, s6 +; SI-NEXT: v_mov_b32_e32 v4, s6 ; SI-NEXT: v_mov_b32_e32 v1, s8 ; SI-NEXT: v_mov_b32_e32 v11, s12 ; SI-NEXT: v_mov_b32_e32 v12, s14 ; SI-NEXT: v_mov_b32_e32 v9, s24 ; SI-NEXT: v_mov_b32_e32 v19, s28 -; SI-NEXT: v_mov_b32_e32 v16, s40 +; SI-NEXT: v_mov_b32_e32 v20, s40 ; SI-NEXT: v_mov_b32_e32 v17, s42 ; SI-NEXT: v_mov_b32_e32 v27, s46 -; SI-NEXT: v_mov_b32_e32 v24, s56 +; SI-NEXT: v_mov_b32_e32 v28, s56 ; SI-NEXT: v_mov_b32_e32 v25, s58 ; SI-NEXT: .LBB105_5: ; %end -; SI-NEXT: v_mov_b32_e32 v2, v0 ; SI-NEXT: v_mov_b32_e32 v0, v48 +; SI-NEXT: v_mov_b32_e32 v2, v4 ; SI-NEXT: v_mov_b32_e32 v4, v49 -; SI-NEXT: v_mov_b32_e32 v10, v12 ; SI-NEXT: v_mov_b32_e32 v8, v37 +; SI-NEXT: v_mov_b32_e32 v10, v12 ; SI-NEXT: v_mov_b32_e32 v12, v38 -; SI-NEXT: v_mov_b32_e32 v18, v16 ; SI-NEXT: v_mov_b32_e32 v16, v35 +; SI-NEXT: v_mov_b32_e32 v18, v20 ; SI-NEXT: v_mov_b32_e32 v20, v36 -; SI-NEXT: v_mov_b32_e32 v26, v24 ; SI-NEXT: v_mov_b32_e32 v24, v33 +; SI-NEXT: v_mov_b32_e32 v26, v28 ; SI-NEXT: v_mov_b32_e32 v28, v34 ; SI-NEXT: s_setpc_b64 s[30:31] ; @@ -37383,55 +37412,55 @@ define inreg <32 x i8> @bitcast_v16f16_to_v32i8_scalar(<16 x half> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v1, 0x200 ; VI-NEXT: v_add_f16_e32 v6, s4, v1 ; VI-NEXT: s_lshr_b32 s4, s16, 16 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 +; VI-NEXT: v_add_f16_e32 v35, s17, v1 ; VI-NEXT: v_add_f16_e32 v2, s4, v1 ; VI-NEXT: s_lshr_b32 s4, s19, 16 +; VI-NEXT: v_or_b32_e32 v37, v35, v0 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v2 +; VI-NEXT: v_add_f16_e32 v0, s16, v1 ; VI-NEXT: v_add_f16_e32 v14, s4, v1 ; VI-NEXT: s_lshr_b32 s4, s18, 16 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v14 +; VI-NEXT: v_or_b32_e32 v36, v0, v3 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v14 ; VI-NEXT: v_add_f16_e32 v34, s19, v1 ; VI-NEXT: v_add_f16_e32 v10, s4, v1 ; VI-NEXT: s_lshr_b32 s4, s21, 16 -; VI-NEXT: v_or_b32_e32 v12, v34, v5 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v10 +; VI-NEXT: v_or_b32_e32 v39, v34, v3 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v10 ; VI-NEXT: v_add_f16_e32 v8, s18, v1 ; VI-NEXT: v_add_f16_e32 v22, s4, v1 ; VI-NEXT: s_lshr_b32 s4, s20, 16 -; VI-NEXT: v_or_b32_e32 v11, v8, v5 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v22 +; VI-NEXT: v_or_b32_e32 v38, v8, v3 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v22 ; VI-NEXT: v_add_f16_e32 v33, s21, v1 ; VI-NEXT: v_add_f16_e32 v18, s4, v1 ; VI-NEXT: s_lshr_b32 s4, s23, 16 -; VI-NEXT: v_or_b32_e32 v20, v33, v5 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v18 +; VI-NEXT: v_or_b32_e32 v49, v33, v3 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v18 ; VI-NEXT: v_add_f16_e32 v16, s20, v1 ; VI-NEXT: v_add_f16_e32 v30, s4, v1 ; VI-NEXT: s_lshr_b32 s4, s22, 16 -; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v6 -; VI-NEXT: v_add_f16_e32 v35, s17, v1 -; VI-NEXT: v_or_b32_e32 v19, v16, v5 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v30 +; VI-NEXT: v_or_b32_e32 v48, v16, v3 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v30 ; VI-NEXT: v_add_f16_e32 v32, s23, v1 ; VI-NEXT: v_add_f16_e32 v26, s4, v1 -; VI-NEXT: v_or_b32_e32 v4, v35, v0 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v2 -; VI-NEXT: v_add_f16_e32 v0, s16, v1 -; VI-NEXT: v_or_b32_e32 v37, v32, v5 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v26 +; VI-NEXT: v_or_b32_e32 v51, v32, v3 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v26 ; VI-NEXT: v_add_f16_e32 v24, s22, v1 -; VI-NEXT: v_or_b32_e32 v3, v0, v3 -; VI-NEXT: v_or_b32_e32 v36, v24, v5 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[36:37] -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v20 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v19 -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[19:20] -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v11 -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12] -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v3 -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4] -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v37 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v36 +; VI-NEXT: v_or_b32_e32 v50, v24, v3 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[50:51] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[48:49] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[38:39] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[36:37] +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v51 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v50 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v49 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v48 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v38 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v36 ; VI-NEXT: v_bfe_u32 v31, v30, 8, 8 ; VI-NEXT: v_bfe_u32 v23, v22, 8, 8 ; VI-NEXT: v_bfe_u32 v15, v14, 8, 8 @@ -37535,39 +37564,39 @@ define inreg <32 x i8> @bitcast_v16f16_to_v32i8_scalar(<16 x half> inreg %a, i32 ; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB105_4 ; GFX9-NEXT: .LBB105_2: ; %cmp.true -; GFX9-NEXT: v_mov_b32_e32 v2, 0x200 -; GFX9-NEXT: v_pk_add_f16 v1, s17, v2 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v0, s16, v2 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v9, s19, v2 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v8, s18, v2 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v17, s21, v2 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v16, s20, v2 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v25, s23, v2 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v24, s22, v2 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[24:25] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[16:17] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[8:9] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v0 +; GFX9-NEXT: v_mov_b32_e32 v0, 0x200 +; GFX9-NEXT: v_pk_add_f16 v39, s17, v0 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v38, s16, v0 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v37, s19, v0 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v36, s18, v0 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v35, s21, v0 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v34, s20, v0 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v33, s23, v0 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v32, s22, v0 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: s_branch .LBB105_5 ; GFX9-NEXT: .LBB105_3: ; GFX9-NEXT: ; implicit-def: $sgpr59 @@ -37596,30 +37625,30 @@ define inreg <32 x i8> @bitcast_v16f16_to_v32i8_scalar(<16 x half> inreg %a, i32 ; GFX9-NEXT: ; implicit-def: $sgpr14 ; GFX9-NEXT: s_branch .LBB105_2 ; GFX9-NEXT: .LBB105_4: -; GFX9-NEXT: v_mov_b32_e32 v0, s16 -; GFX9-NEXT: v_mov_b32_e32 v1, s17 -; GFX9-NEXT: v_mov_b32_e32 v8, s18 -; GFX9-NEXT: v_mov_b32_e32 v9, s19 -; GFX9-NEXT: v_mov_b32_e32 v16, s20 -; GFX9-NEXT: v_mov_b32_e32 v17, s21 -; GFX9-NEXT: v_mov_b32_e32 v24, s22 -; GFX9-NEXT: v_mov_b32_e32 v25, s23 -; GFX9-NEXT: v_mov_b32_e32 v35, s59 +; GFX9-NEXT: v_mov_b32_e32 v38, s16 +; GFX9-NEXT: v_mov_b32_e32 v39, s17 +; GFX9-NEXT: v_mov_b32_e32 v36, s18 +; GFX9-NEXT: v_mov_b32_e32 v37, s19 +; GFX9-NEXT: v_mov_b32_e32 v34, s20 +; GFX9-NEXT: v_mov_b32_e32 v35, s21 +; GFX9-NEXT: v_mov_b32_e32 v32, s22 +; GFX9-NEXT: v_mov_b32_e32 v33, s23 +; GFX9-NEXT: v_mov_b32_e32 v1, s59 ; GFX9-NEXT: v_mov_b32_e32 v2, s57 ; GFX9-NEXT: v_mov_b32_e32 v5, s58 ; GFX9-NEXT: v_mov_b32_e32 v6, s56 ; GFX9-NEXT: v_mov_b32_e32 v7, s47 -; GFX9-NEXT: v_mov_b32_e32 v34, s46 +; GFX9-NEXT: v_mov_b32_e32 v9, s46 ; GFX9-NEXT: v_mov_b32_e32 v10, s44 ; GFX9-NEXT: v_mov_b32_e32 v13, s45 ; GFX9-NEXT: v_mov_b32_e32 v14, s43 ; GFX9-NEXT: v_mov_b32_e32 v15, s42 -; GFX9-NEXT: v_mov_b32_e32 v33, s41 +; GFX9-NEXT: v_mov_b32_e32 v17, s41 ; GFX9-NEXT: v_mov_b32_e32 v18, s29 ; GFX9-NEXT: v_mov_b32_e32 v21, s40 ; GFX9-NEXT: v_mov_b32_e32 v22, s28 ; GFX9-NEXT: v_mov_b32_e32 v23, s27 -; GFX9-NEXT: v_mov_b32_e32 v32, s26 +; GFX9-NEXT: v_mov_b32_e32 v25, s26 ; GFX9-NEXT: v_mov_b32_e32 v26, s24 ; GFX9-NEXT: v_mov_b32_e32 v29, s25 ; GFX9-NEXT: v_mov_b32_e32 v30, s15 @@ -37629,14 +37658,14 @@ define inreg <32 x i8> @bitcast_v16f16_to_v32i8_scalar(<16 x half> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v11, s6 ; GFX9-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NEXT: .LBB105_5: ; %end -; GFX9-NEXT: v_mov_b32_e32 v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v12, v9 -; GFX9-NEXT: v_mov_b32_e32 v20, v17 -; GFX9-NEXT: v_mov_b32_e32 v28, v25 -; GFX9-NEXT: v_mov_b32_e32 v1, v35 -; GFX9-NEXT: v_mov_b32_e32 v9, v34 -; GFX9-NEXT: v_mov_b32_e32 v17, v33 -; GFX9-NEXT: v_mov_b32_e32 v25, v32 +; GFX9-NEXT: v_mov_b32_e32 v0, v38 +; GFX9-NEXT: v_mov_b32_e32 v4, v39 +; GFX9-NEXT: v_mov_b32_e32 v8, v36 +; GFX9-NEXT: v_mov_b32_e32 v12, v37 +; GFX9-NEXT: v_mov_b32_e32 v16, v34 +; GFX9-NEXT: v_mov_b32_e32 v20, v35 +; GFX9-NEXT: v_mov_b32_e32 v24, v32 +; GFX9-NEXT: v_mov_b32_e32 v28, v33 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-LABEL: bitcast_v16f16_to_v32i8_scalar: @@ -38801,90 +38830,90 @@ define inreg <16 x half> @bitcast_v32i8_to_v16f16_scalar(<32 x i8> inreg %a, i32 ; SI-NEXT: v_readfirstlane_b32 s47, v0 ; SI-NEXT: s_cbranch_scc0 .LBB107_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s8, s20, 0xff -; SI-NEXT: s_lshl_b32 s9, s21, 8 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s22, 0xff ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 -; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s23, 24 ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: s_and_b32 s5, s18, 0xff -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_or_b32 s44, s11, s9 ; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s6, s19, 24 -; SI-NEXT: s_or_b32 s13, s8, s44 -; SI-NEXT: s_and_b32 s8, s28, 0xff -; SI-NEXT: s_lshl_b32 s9, s29, 8 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_or_b32 s12, s6, s5 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s47, 0xff -; SI-NEXT: s_or_b32 s10, s4, s12 +; SI-NEXT: s_or_b32 s88, s6, s5 +; SI-NEXT: s_or_b32 s10, s4, s88 ; SI-NEXT: s_and_b32 s4, s24, 0xff ; SI-NEXT: s_lshl_b32 s5, s25, 8 -; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s46, 24 ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: s_and_b32 s5, s26, 0xff -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_or_b32 s45, s11, s9 ; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s6, s27, 24 -; SI-NEXT: s_or_b32 s15, s8, s45 -; SI-NEXT: s_and_b32 s8, s59, 0xff -; SI-NEXT: s_lshl_b32 s9, s58, 8 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_or_b32 s14, s6, s5 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s57, 0xff -; SI-NEXT: s_or_b32 s6, s4, s14 +; SI-NEXT: s_or_b32 s90, s6, s5 +; SI-NEXT: s_or_b32 s8, s4, s90 ; SI-NEXT: s_and_b32 s4, s74, 0xff ; SI-NEXT: s_lshl_b32 s5, s72, 8 -; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s56, 24 ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: s_and_b32 s5, s61, 0xff -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_or_b32 s88, s11, s9 ; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s60, 24 -; SI-NEXT: s_or_b32 s41, s8, s88 -; SI-NEXT: s_and_b32 s8, s75, 0xff -; SI-NEXT: s_lshl_b32 s9, s73, 8 -; SI-NEXT: s_or_b32 s40, s7, s5 -; SI-NEXT: s_and_b32 s5, s79, 0xff -; SI-NEXT: s_lshl_b32 s7, s78, 8 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s63, 0xff +; SI-NEXT: s_lshl_b32 s6, s60, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_or_b32 s92, s6, s5 +; SI-NEXT: s_or_b32 s6, s4, s92 +; SI-NEXT: s_and_b32 s4, s79, 0xff +; SI-NEXT: s_lshl_b32 s5, s78, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s77, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s7, s76, 24 +; SI-NEXT: s_or_b32 s94, s7, s5 +; SI-NEXT: s_and_b32 s5, s20, 0xff +; SI-NEXT: s_lshl_b32 s7, s21, 8 ; SI-NEXT: s_or_b32 s5, s5, s7 -; SI-NEXT: s_and_b32 s7, s77, 0xff -; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s62, 24 +; SI-NEXT: s_and_b32 s7, s22, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_or_b32 s89, s11, s9 -; SI-NEXT: s_lshl_b32 s9, s76, 24 -; SI-NEXT: s_or_b32 s42, s9, s7 -; SI-NEXT: s_and_b32 s7, s8, 0xffff -; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_lshl_b32 s9, s23, 24 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s7, s9, s7 +; SI-NEXT: s_or_b32 s89, s5, s7 +; SI-NEXT: s_and_b32 s5, s28, 0xff +; SI-NEXT: s_lshl_b32 s9, s29, 8 +; SI-NEXT: s_or_b32 s5, s5, s9 +; SI-NEXT: s_and_b32 s9, s47, 0xff +; SI-NEXT: s_lshl_b32 s9, s9, 16 +; SI-NEXT: s_lshl_b32 s11, s46, 24 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: s_or_b32 s91, s5, s9 +; SI-NEXT: s_and_b32 s5, s59, 0xff +; SI-NEXT: s_lshl_b32 s11, s58, 8 +; SI-NEXT: s_lshr_b64 s[12:13], s[88:89], 16 +; SI-NEXT: s_or_b32 s5, s5, s11 +; SI-NEXT: s_and_b32 s11, s57, 0xff +; SI-NEXT: s_lshl_b32 s11, s11, 16 +; SI-NEXT: s_lshl_b32 s13, s56, 24 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s11, s13, s11 +; SI-NEXT: s_or_b32 s93, s5, s11 +; SI-NEXT: s_and_b32 s5, s75, 0xff +; SI-NEXT: s_lshl_b32 s13, s73, 8 +; SI-NEXT: s_lshr_b64 s[14:15], s[90:91], 16 +; SI-NEXT: s_or_b32 s5, s5, s13 +; SI-NEXT: s_and_b32 s13, s63, 0xff +; SI-NEXT: s_lshl_b32 s13, s13, 16 +; SI-NEXT: s_lshl_b32 s15, s62, 24 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_or_b32 s43, s7, s89 -; SI-NEXT: s_or_b32 s4, s4, s40 -; SI-NEXT: s_or_b32 s8, s5, s42 -; SI-NEXT: s_mov_b32 s11, s13 -; SI-NEXT: s_lshr_b64 s[12:13], s[12:13], 16 -; SI-NEXT: s_mov_b32 s7, s15 -; SI-NEXT: s_lshr_b64 s[14:15], s[14:15], 16 -; SI-NEXT: s_mov_b32 s5, s41 -; SI-NEXT: s_lshr_b64 s[40:41], s[40:41], 16 -; SI-NEXT: s_mov_b32 s9, s43 -; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 16 -; SI-NEXT: s_lshr_b32 s15, s44, 16 -; SI-NEXT: s_lshr_b32 s41, s45, 16 -; SI-NEXT: s_lshr_b32 s43, s88, 16 -; SI-NEXT: s_lshr_b32 s13, s89, 16 +; SI-NEXT: s_or_b32 s13, s15, s13 +; SI-NEXT: s_or_b32 s95, s5, s13 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_lshr_b64 s[40:41], s[92:93], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[94:95], 16 +; SI-NEXT: s_or_b32 s4, s4, s94 +; SI-NEXT: s_lshr_b32 s15, s7, 16 +; SI-NEXT: s_lshr_b32 s41, s9, 16 +; SI-NEXT: s_lshr_b32 s43, s11, 16 +; SI-NEXT: s_lshr_b32 s13, s13, 16 +; SI-NEXT: s_mov_b32 s11, s89 +; SI-NEXT: s_mov_b32 s9, s91 +; SI-NEXT: s_mov_b32 s7, s93 +; SI-NEXT: s_mov_b32 s5, s95 ; SI-NEXT: s_cbranch_execnz .LBB107_3 ; SI-NEXT: .LBB107_2: ; %cmp.true ; SI-NEXT: s_add_i32 s79, s79, 3 @@ -38898,70 +38927,68 @@ define inreg <16 x half> @bitcast_v32i8_to_v16f16_scalar(<32 x i8> inreg %a, i32 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s5, s6 -; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s75, s75, 3 -; SI-NEXT: s_add_i32 s8, s4, 0x3000000 -; SI-NEXT: s_and_b32 s4, s75, 0xff -; SI-NEXT: s_lshl_b32 s5, s73, 8 -; SI-NEXT: s_add_i32 s63, s63, 3 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s6, s63, 0xff -; SI-NEXT: s_addk_i32 s4, 0x300 -; SI-NEXT: s_lshl_b32 s5, s62, 24 -; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_or_b32 s5, s5, s6 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s74, s74, 3 -; SI-NEXT: s_add_i32 s9, s4, 0x3000000 -; SI-NEXT: s_and_b32 s4, s74, 0xff -; SI-NEXT: s_lshl_b32 s5, s72, 8 -; SI-NEXT: s_add_i32 s61, s61, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s6, s61, 0xff -; SI-NEXT: s_addk_i32 s4, 0x300 -; SI-NEXT: s_lshl_b32 s5, s60, 24 -; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_or_b32 s5, s5, s6 -; SI-NEXT: s_add_i32 s59, s59, 3 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s59, 0xff -; SI-NEXT: s_lshl_b32 s6, s58, 8 -; SI-NEXT: s_add_i32 s57, s57, 3 +; SI-NEXT: s_and_b32 s5, s75, 0xff +; SI-NEXT: s_lshl_b32 s6, s73, 8 +; SI-NEXT: s_add_i32 s63, s63, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s7, s57, 0xff +; SI-NEXT: s_and_b32 s7, s63, 0xff ; SI-NEXT: s_addk_i32 s5, 0x300 -; SI-NEXT: s_lshl_b32 s6, s56, 24 +; SI-NEXT: s_lshl_b32 s6, s62, 24 ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_and_b32 s5, s5, 0xffff ; SI-NEXT: s_or_b32 s6, s6, s7 -; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: s_add_i32 s74, s74, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s24, 0xff -; SI-NEXT: s_lshl_b32 s7, s25, 8 -; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: s_and_b32 s6, s74, 0xff +; SI-NEXT: s_lshl_b32 s7, s72, 8 +; SI-NEXT: s_add_i32 s61, s61, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s10, s26, 0xff +; SI-NEXT: s_and_b32 s8, s61, 0xff ; SI-NEXT: s_addk_i32 s6, 0x300 -; SI-NEXT: s_lshl_b32 s7, s27, 24 -; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s7, s60, 24 +; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_or_b32 s7, s7, s10 -; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: s_or_b32 s7, s7, s8 +; SI-NEXT: s_add_i32 s59, s59, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s28, 0xff +; SI-NEXT: s_and_b32 s7, s59, 0xff +; SI-NEXT: s_lshl_b32 s8, s58, 8 +; SI-NEXT: s_add_i32 s57, s57, 3 +; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_and_b32 s9, s57, 0xff +; SI-NEXT: s_addk_i32 s7, 0x300 +; SI-NEXT: s_lshl_b32 s8, s56, 24 +; SI-NEXT: s_lshl_b32 s9, s9, 16 +; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s8, s8, s9 +; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_and_b32 s8, s24, 0xff +; SI-NEXT: s_lshl_b32 s9, s25, 8 +; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_and_b32 s10, s26, 0xff +; SI-NEXT: s_addk_i32 s8, 0x300 +; SI-NEXT: s_lshl_b32 s9, s27, 24 +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_and_b32 s8, s8, 0xffff +; SI-NEXT: s_or_b32 s9, s9, s10 +; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_and_b32 s9, s28, 0xff ; SI-NEXT: s_lshl_b32 s10, s29, 8 ; SI-NEXT: s_add_i32 s47, s47, 3 -; SI-NEXT: s_or_b32 s7, s10, s7 +; SI-NEXT: s_or_b32 s9, s10, s9 ; SI-NEXT: s_and_b32 s11, s47, 0xff -; SI-NEXT: s_addk_i32 s7, 0x300 +; SI-NEXT: s_addk_i32 s9, 0x300 ; SI-NEXT: s_lshl_b32 s10, s46, 24 ; SI-NEXT: s_lshl_b32 s11, s11, 16 -; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_or_b32 s10, s10, s11 ; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_or_b32 s7, s10, s7 +; SI-NEXT: s_or_b32 s9, s10, s9 ; SI-NEXT: s_and_b32 s10, s16, 0xff ; SI-NEXT: s_lshl_b32 s11, s17, 8 ; SI-NEXT: s_add_i32 s18, s18, 3 @@ -38989,16 +39016,18 @@ define inreg <16 x half> @bitcast_v32i8_to_v16f16_scalar(<32 x i8> inreg %a, i32 ; SI-NEXT: s_add_i32 s5, s5, 0x3000000 ; SI-NEXT: s_add_i32 s6, s6, 0x3000000 ; SI-NEXT: s_add_i32 s7, s7, 0x3000000 +; SI-NEXT: s_add_i32 s8, s8, 0x3000000 +; SI-NEXT: s_add_i32 s9, s9, 0x3000000 ; SI-NEXT: s_add_i32 s10, s10, 0x3000000 ; SI-NEXT: s_add_i32 s11, s11, 0x3000000 ; SI-NEXT: s_lshr_b64 s[12:13], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[14:15], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[42:43], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16 ; SI-NEXT: s_lshr_b32 s15, s11, 16 -; SI-NEXT: s_lshr_b32 s41, s7, 16 -; SI-NEXT: s_lshr_b32 s43, s5, 16 -; SI-NEXT: s_lshr_b32 s13, s9, 16 +; SI-NEXT: s_lshr_b32 s41, s9, 16 +; SI-NEXT: s_lshr_b32 s43, s7, 16 +; SI-NEXT: s_lshr_b32 s13, s5, 16 ; SI-NEXT: .LBB107_3: ; %end ; SI-NEXT: s_and_b32 s10, s10, 0xffff ; SI-NEXT: s_lshl_b32 s12, s12, 16 @@ -39006,44 +39035,44 @@ define inreg <16 x half> @bitcast_v32i8_to_v16f16_scalar(<32 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_lshl_b32 s12, s15, 16 ; SI-NEXT: s_or_b32 s11, s11, s12 -; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_and_b32 s8, s8, 0xffff ; SI-NEXT: s_lshl_b32 s12, s14, 16 +; SI-NEXT: s_or_b32 s8, s8, s12 +; SI-NEXT: s_and_b32 s9, s9, 0xffff +; SI-NEXT: s_lshl_b32 s12, s41, 16 +; SI-NEXT: s_or_b32 s9, s9, s12 +; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_lshl_b32 s12, s40, 16 ; SI-NEXT: s_or_b32 s6, s6, s12 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s12, s41, 16 +; SI-NEXT: s_lshl_b32 s12, s43, 16 ; SI-NEXT: s_or_b32 s7, s7, s12 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s12, s40, 16 +; SI-NEXT: s_lshl_b32 s12, s42, 16 ; SI-NEXT: s_or_b32 s4, s4, s12 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s12, s43, 16 -; SI-NEXT: s_or_b32 s5, s5, s12 -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s12, s42, 16 -; SI-NEXT: s_or_b32 s8, s8, s12 -; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_lshl_b32 s12, s13, 16 -; SI-NEXT: s_or_b32 s9, s9, s12 +; SI-NEXT: s_or_b32 s5, s5, s12 ; SI-NEXT: v_mov_b32_e32 v0, s10 ; SI-NEXT: v_mov_b32_e32 v1, s11 -; SI-NEXT: v_mov_b32_e32 v2, s6 -; SI-NEXT: v_mov_b32_e32 v3, s7 -; SI-NEXT: v_mov_b32_e32 v4, s4 -; SI-NEXT: v_mov_b32_e32 v5, s5 -; SI-NEXT: v_mov_b32_e32 v6, s8 -; SI-NEXT: v_mov_b32_e32 v7, s9 +; SI-NEXT: v_mov_b32_e32 v2, s8 +; SI-NEXT: v_mov_b32_e32 v3, s9 +; SI-NEXT: v_mov_b32_e32 v4, s6 +; SI-NEXT: v_mov_b32_e32 v5, s7 +; SI-NEXT: v_mov_b32_e32 v6, s4 +; SI-NEXT: v_mov_b32_e32 v7, s5 ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB107_4: ; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr12 ; SI-NEXT: ; implicit-def: $sgpr15 -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr41 -; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr43 -; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr42 ; SI-NEXT: ; implicit-def: $sgpr13 ; SI-NEXT: s_branch .LBB107_2 @@ -39127,78 +39156,78 @@ define inreg <16 x half> @bitcast_v32i8_to_v16f16_scalar(<32 x i8> inreg %a, i32 ; VI-NEXT: s_add_i32 s47, s47, 3 ; VI-NEXT: v_mov_b32_e32 v0, s46 ; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; VI-NEXT: v_perm_b32 v2, s47, v0, v1 +; VI-NEXT: v_perm_b32 v0, s47, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v0 ; VI-NEXT: s_add_i32 s45, s45, 3 ; VI-NEXT: v_mov_b32_e32 v0, s43 -; VI-NEXT: v_perm_b32 v3, s45, v0, v1 +; VI-NEXT: v_perm_b32 v0, s45, v0, v1 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s44, s44, 3 ; VI-NEXT: v_mov_b32_e32 v0, s41 -; VI-NEXT: v_perm_b32 v4, s44, v0, v1 +; VI-NEXT: v_perm_b32 v0, s44, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v0 ; VI-NEXT: s_add_i32 s42, s42, 3 ; VI-NEXT: v_mov_b32_e32 v0, s15 -; VI-NEXT: v_perm_b32 v5, s42, v0, v1 +; VI-NEXT: v_perm_b32 v0, s42, v0, v1 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s40, s40, 3 ; VI-NEXT: v_mov_b32_e32 v0, s13 -; VI-NEXT: v_perm_b32 v6, s40, v0, v1 +; VI-NEXT: v_perm_b32 v0, s40, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v0 ; VI-NEXT: s_add_i32 s14, s14, 3 ; VI-NEXT: v_mov_b32_e32 v0, s11 -; VI-NEXT: v_perm_b32 v7, s14, v0, v1 +; VI-NEXT: v_perm_b32 v0, s14, v0, v1 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s12, s12, 3 ; VI-NEXT: v_mov_b32_e32 v0, s8 -; VI-NEXT: v_perm_b32 v8, s12, v0, v1 +; VI-NEXT: v_perm_b32 v0, s12, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v0 ; VI-NEXT: s_add_i32 s9, s9, 3 ; VI-NEXT: v_mov_b32_e32 v0, s7 -; VI-NEXT: v_perm_b32 v9, s9, v0, v1 +; VI-NEXT: v_perm_b32 v0, s9, v0, v1 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s10, s10, 3 ; VI-NEXT: v_mov_b32_e32 v0, s6 -; VI-NEXT: v_perm_b32 v10, s10, v0, v1 +; VI-NEXT: v_perm_b32 v0, s10, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v0 ; VI-NEXT: s_add_i32 s28, s28, 3 ; VI-NEXT: v_mov_b32_e32 v0, s29 -; VI-NEXT: v_perm_b32 v11, s28, v0, v1 +; VI-NEXT: v_perm_b32 v0, s28, v0, v1 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s26, s26, 3 ; VI-NEXT: v_mov_b32_e32 v0, s27 -; VI-NEXT: v_perm_b32 v12, s26, v0, v1 +; VI-NEXT: v_perm_b32 v0, s26, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v0 ; VI-NEXT: s_add_i32 s24, s24, 3 ; VI-NEXT: v_mov_b32_e32 v0, s25 -; VI-NEXT: v_perm_b32 v13, s24, v0, v1 +; VI-NEXT: v_perm_b32 v0, s24, v0, v1 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s22, s22, 3 ; VI-NEXT: v_mov_b32_e32 v0, s23 +; VI-NEXT: v_perm_b32 v0, s22, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v0 ; VI-NEXT: s_add_i32 s20, s20, 3 -; VI-NEXT: v_mov_b32_e32 v14, s21 +; VI-NEXT: v_mov_b32_e32 v0, s21 +; VI-NEXT: v_perm_b32 v0, s20, v0, v1 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: v_mov_b32_e32 v15, s19 +; VI-NEXT: v_mov_b32_e32 v0, s19 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v16, s17 -; VI-NEXT: v_perm_b32 v0, s22, v0, v1 -; VI-NEXT: v_perm_b32 v14, s20, v14, v1 -; VI-NEXT: v_perm_b32 v15, s18, v15, v1 +; VI-NEXT: v_perm_b32 v0, s18, v0, v1 ; VI-NEXT: v_perm_b32 v1, s16, v16, v1 ; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1 -; VI-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v14, v0, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v1 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v14 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v2 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v3 -; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v4 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v5 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 -; VI-NEXT: v_add_u32_e32 v6, vcc, 0x300, v7 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v8 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v10 -; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v11 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v12 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v13 -; VI-NEXT: v_or_b32_sdwa v2, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v3, v3, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v6, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v7, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v1, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v2, v2, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v3, v3, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v4, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v5, v5, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v6, v6, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x3000000, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x3000000, v4 @@ -39295,85 +39324,85 @@ define inreg <16 x half> @bitcast_v32i8_to_v16f16_scalar(<32 x i8> inreg %a, i32 ; GFX9-NEXT: .LBB107_2: ; %cmp.true ; GFX9-NEXT: s_add_i32 s47, s47, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s46 -; GFX9-NEXT: v_mov_b32_e32 v2, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v3, s47, v0, v2 +; GFX9-NEXT: v_mov_b32_e32 v1, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v0, s47, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v0 ; GFX9-NEXT: s_add_i32 s43, s43, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s41 -; GFX9-NEXT: v_perm_b32 v4, s43, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s43, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v0 ; GFX9-NEXT: s_add_i32 s45, s45, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s44 -; GFX9-NEXT: v_perm_b32 v5, s45, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s45, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v0 ; GFX9-NEXT: s_add_i32 s15, s15, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s13 -; GFX9-NEXT: v_perm_b32 v6, s15, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s15, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v0 ; GFX9-NEXT: s_add_i32 s42, s42, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s40 -; GFX9-NEXT: v_perm_b32 v7, s42, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s42, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v0 ; GFX9-NEXT: s_add_i32 s11, s11, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s10 -; GFX9-NEXT: v_perm_b32 v8, s11, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s11, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v0 ; GFX9-NEXT: s_add_i32 s14, s14, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s12 -; GFX9-NEXT: v_perm_b32 v9, s14, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s14, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v0 ; GFX9-NEXT: s_add_i32 s9, s9, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s7 -; GFX9-NEXT: v_perm_b32 v10, s9, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s9, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v0 ; GFX9-NEXT: s_add_i32 s28, s28, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s29 -; GFX9-NEXT: v_perm_b32 v11, s28, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s28, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v0 +; GFX9-NEXT: s_add_i32 s8, s8, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s6 +; GFX9-NEXT: v_perm_b32 v0, s8, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0 +; GFX9-NEXT: s_add_i32 s24, s24, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s25 +; GFX9-NEXT: v_perm_b32 v0, s24, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v0 +; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s27 +; GFX9-NEXT: v_perm_b32 v0, s26, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0 ; GFX9-NEXT: s_add_i32 s20, s20, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s21 -; GFX9-NEXT: v_perm_b32 v0, s20, v0, v2 -; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v0, s20, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0 ; GFX9-NEXT: s_add_i32 s22, s22, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s23 -; GFX9-NEXT: v_perm_b32 v0, s22, v0, v2 -; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v0, s22, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0 ; GFX9-NEXT: s_add_i32 s16, s16, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 -; GFX9-NEXT: v_perm_b32 v0, s16, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s16, v0, v1 ; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: v_mov_b32_e32 v13, s19 +; GFX9-NEXT: v_mov_b32_e32 v16, s19 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_perm_b32 v13, s18, v13, v2 -; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 +; GFX9-NEXT: v_perm_b32 v1, s18, v16, v1 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_lshl_or_b32 v0, v13, 16, v0 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: s_add_i32 s24, s24, 3 -; GFX9-NEXT: v_mov_b32_e32 v13, s25 -; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v5 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v7 -; GFX9-NEXT: s_add_i32 s8, s8, 3 -; GFX9-NEXT: v_lshl_or_b32 v1, v12, 16, v1 -; GFX9-NEXT: v_mov_b32_e32 v12, s6 -; GFX9-NEXT: v_perm_b32 v13, s24, v13, v2 -; GFX9-NEXT: s_add_i32 s26, s26, 3 -; GFX9-NEXT: v_mov_b32_e32 v14, s27 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v8 -; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: v_perm_b32 v12, s8, v12, v2 -; GFX9-NEXT: v_perm_b32 v2, s26, v14, v2 -; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v3 -; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v4 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v9 -; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v10 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v11 -; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v13 -; GFX9-NEXT: v_lshl_or_b32 v5, v7, 16, v5 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v16 -; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v12 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v14 +; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX9-NEXT: v_lshl_or_b32 v6, v6, 16, v7 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v14 -; GFX9-NEXT: v_lshl_or_b32 v2, v2, 16, v10 -; GFX9-NEXT: v_lshl_or_b32 v3, v9, 16, v3 -; GFX9-NEXT: v_lshl_or_b32 v4, v8, 16, v4 -; GFX9-NEXT: v_lshl_or_b32 v7, v15, 16, v7 +; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_lshl_or_b32 v1, v15, 16, v1 +; GFX9-NEXT: v_lshl_or_b32 v2, v13, 16, v2 +; GFX9-NEXT: v_lshl_or_b32 v3, v12, 16, v3 +; GFX9-NEXT: v_lshl_or_b32 v4, v11, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v10, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v9, 16, v6 +; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7 ; GFX9-NEXT: .LBB107_3: ; %end ; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: .LBB107_4: @@ -39875,480 +39904,484 @@ define <32 x i8> @bitcast_v16bf16_to_v32i8(<16 x bfloat> %a, i32 %b) #0 { ; VI-LABEL: bitcast_v16bf16_to_v32i8: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: v_mov_b32_e32 v33, v5 -; VI-NEXT: v_mov_b32_e32 v32, v4 -; VI-NEXT: v_mov_b32_e32 v35, v3 -; VI-NEXT: v_mov_b32_e32 v34, v2 +; VI-NEXT: v_mov_b32_e32 v33, v7 +; VI-NEXT: v_mov_b32_e32 v32, v6 +; VI-NEXT: v_mov_b32_e32 v35, v5 +; VI-NEXT: v_mov_b32_e32 v34, v4 +; VI-NEXT: v_mov_b32_e32 v37, v3 +; VI-NEXT: v_mov_b32_e32 v36, v2 +; VI-NEXT: v_mov_b32_e32 v39, v1 +; VI-NEXT: v_mov_b32_e32 v38, v0 ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr1 ; VI-NEXT: ; implicit-def: $vgpr2 +; VI-NEXT: ; implicit-def: $vgpr3 ; VI-NEXT: ; implicit-def: $vgpr5 -; VI-NEXT: ; implicit-def: $vgpr37 -; VI-NEXT: ; implicit-def: $vgpr36 +; VI-NEXT: ; implicit-def: $vgpr6 +; VI-NEXT: ; implicit-def: $vgpr7 ; VI-NEXT: ; implicit-def: $vgpr9 ; VI-NEXT: ; implicit-def: $vgpr10 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr13 ; VI-NEXT: ; implicit-def: $vgpr14 ; VI-NEXT: ; implicit-def: $vgpr15 ; VI-NEXT: ; implicit-def: $vgpr17 ; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr25 ; VI-NEXT: ; implicit-def: $vgpr26 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr30 ; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr3 -; VI-NEXT: ; implicit-def: $vgpr11 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB108_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: .LBB108_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB108_4 ; VI-NEXT: ; %bb.3: ; %cmp.true -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v1 -; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v39 +; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v39 ; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: s_movk_i32 s6, 0x7fff -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 -; VI-NEXT: v_add_u32_e32 v3, vcc, s6, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_alignbit_b32 v1, v1, v2, 16 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, s6, v3 -; VI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_alignbit_b32 v39, v1, v0, 16 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v38 ; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_bfe_u32 v3, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v0 -; VI-NEXT: v_add_u32_e32 v3, vcc, s6, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v0 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, s6, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc -; VI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; VI-NEXT: v_alignbit_b32 v0, v0, v2, 16 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v35 -; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, s6, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_and_b32_e32 v3, 0xffff0000, v35 -; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_alignbit_b32 v35, v3, v2, 16 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v34 -; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, s6, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_and_b32_e32 v3, 0xffff0000, v34 -; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_alignbit_b32 v34, v3, v2, 16 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v33 -; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, s6, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_and_b32_e32 v3, 0xffff0000, v33 -; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_alignbit_b32 v33, v3, v2, 16 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v32 -; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, s6, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_and_b32_e32 v3, 0xffff0000, v32 -; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_alignbit_b32 v32, v3, v2, 16 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v7 -; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, s6, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_and_b32_e32 v3, 0xffff0000, v7 -; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_alignbit_b32 v7, v3, v2, 16 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v6 -; VI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, s6, v3 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: v_and_b32_e32 v3, 0xffff0000, v6 -; VI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 -; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v4 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_alignbit_b32 v6, v3, v2, 16 -; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[34:35] -; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] -; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v35 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v35 -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v35 -; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v34 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34 -; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v38 +; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_alignbit_b32 v38, v1, v0, 16 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v37 +; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, s6, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v37 +; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_alignbit_b32 v37, v1, v0, 16 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v36 +; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, s6, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36 +; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_alignbit_b32 v36, v1, v0, 16 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v35 +; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, s6, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v35 +; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_alignbit_b32 v35, v1, v0, 16 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v34 +; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, s6, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v34 +; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_alignbit_b32 v34, v1, v0, 16 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v33 +; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, s6, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v33 +; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_alignbit_b32 v33, v1, v0, 16 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v32 +; VI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 +; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, s6, v1 +; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v32 +; VI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_alignbit_b32 v32, v1, v0, 16 +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; VI-NEXT: .LBB108_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] -; VI-NEXT: v_mov_b32_e32 v4, v1 -; VI-NEXT: v_mov_b32_e32 v8, v34 -; VI-NEXT: v_mov_b32_e32 v12, v35 -; VI-NEXT: v_mov_b32_e32 v16, v32 -; VI-NEXT: v_mov_b32_e32 v20, v33 -; VI-NEXT: v_mov_b32_e32 v24, v6 -; VI-NEXT: v_mov_b32_e32 v28, v7 -; VI-NEXT: v_mov_b32_e32 v1, v38 -; VI-NEXT: v_mov_b32_e32 v6, v37 -; VI-NEXT: v_mov_b32_e32 v7, v36 +; VI-NEXT: v_mov_b32_e32 v0, v38 +; VI-NEXT: v_mov_b32_e32 v4, v39 +; VI-NEXT: v_mov_b32_e32 v8, v36 +; VI-NEXT: v_mov_b32_e32 v12, v37 +; VI-NEXT: v_mov_b32_e32 v16, v34 +; VI-NEXT: v_mov_b32_e32 v20, v35 +; VI-NEXT: v_mov_b32_e32 v24, v32 +; VI-NEXT: v_mov_b32_e32 v28, v33 ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v16bf16_to_v32i8: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_mov_b32_e32 v33, v5 -; GFX9-NEXT: v_mov_b32_e32 v32, v4 -; GFX9-NEXT: v_mov_b32_e32 v36, v3 -; GFX9-NEXT: v_mov_b32_e32 v35, v2 +; GFX9-NEXT: v_mov_b32_e32 v33, v7 +; GFX9-NEXT: v_mov_b32_e32 v32, v6 +; GFX9-NEXT: v_mov_b32_e32 v35, v5 +; GFX9-NEXT: v_mov_b32_e32 v34, v4 +; GFX9-NEXT: v_mov_b32_e32 v37, v3 +; GFX9-NEXT: v_mov_b32_e32 v36, v2 +; GFX9-NEXT: v_mov_b32_e32 v39, v1 +; GFX9-NEXT: v_mov_b32_e32 v38, v0 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 -; GFX9-NEXT: ; implicit-def: $vgpr38 +; GFX9-NEXT: ; implicit-def: $vgpr1 ; GFX9-NEXT: ; implicit-def: $vgpr2 +; GFX9-NEXT: ; implicit-def: $vgpr3 ; GFX9-NEXT: ; implicit-def: $vgpr5 -; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: ; implicit-def: $vgpr6 +; GFX9-NEXT: ; implicit-def: $vgpr7 ; GFX9-NEXT: ; implicit-def: $vgpr9 ; GFX9-NEXT: ; implicit-def: $vgpr10 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr13 ; GFX9-NEXT: ; implicit-def: $vgpr14 ; GFX9-NEXT: ; implicit-def: $vgpr15 ; GFX9-NEXT: ; implicit-def: $vgpr17 ; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr25 ; GFX9-NEXT: ; implicit-def: $vgpr26 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr30 ; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr3 -; GFX9-NEXT: ; implicit-def: $vgpr11 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB108_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v33 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[6:7] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[35:36] -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[0:1] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v38 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[34:35] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39] +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v38 ; GFX9-NEXT: .LBB108_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB108_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v1 -; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: s_movk_i32 s6, 0x7fff -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_add3_u32 v3, v3, v2, s6 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v4, v3, v4, vcc -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v0 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v2, v3, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v39 ; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; GFX9-NEXT: v_add3_u32 v2, v2, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v2, v5, vcc +; GFX9-NEXT: s_movk_i32 s6, 0x7fff ; GFX9-NEXT: v_add3_u32 v1, v1, v0, s6 ; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v36 +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v39 ; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc ; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 ; GFX9-NEXT: v_add3_u32 v1, v1, v0, s6 -; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v38 +; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc +; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 +; GFX9-NEXT: v_add3_u32 v1, v1, v0, s6 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v8, vcc -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v36 -; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_bfe_u32 v8, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v8, v8, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v35 +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v38 +; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v1, v4, vcc +; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 +; GFX9-NEXT: v_add3_u32 v1, v1, v0, s6 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v0 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v37 +; GFX9-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; GFX9-NEXT: v_cndmask_b32_e32 v5, v1, v5, vcc +; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 +; GFX9-NEXT: v_add3_u32 v1, v1, v0, s6 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v0 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v6, vcc +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff0000, v37 ; GFX9-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v10, v8, v9, vcc -; GFX9-NEXT: v_bfe_u32 v8, v1, 16, 1 -; GFX9-NEXT: v_add3_u32 v8, v8, v1, s6 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v1 +; GFX9-NEXT: v_bfe_u32 v6, v1, 16, 1 +; GFX9-NEXT: v_add3_u32 v6, v6, v1, s6 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v8, v9, vcc -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v35 -; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1 -; GFX9-NEXT: v_add3_u32 v9, v9, v8, s6 -; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v8 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v33 -; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX9-NEXT: v_cndmask_b32_e32 v13, v9, v11, vcc -; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1 -; GFX9-NEXT: v_add3_u32 v9, v9, v8, s6 -; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v8 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v33 -; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX9-NEXT: v_cndmask_b32_e32 v14, v9, v11, vcc -; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1 -; GFX9-NEXT: v_add3_u32 v9, v9, v8, s6 -; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v8 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 -; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v32 -; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX9-NEXT: v_cndmask_b32_e32 v15, v9, v11, vcc -; GFX9-NEXT: v_bfe_u32 v11, v8, 16, 1 -; GFX9-NEXT: v_add3_u32 v11, v11, v8, s6 -; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v8 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v32 -; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX9-NEXT: v_cndmask_b32_e32 v16, v11, v12, vcc -; GFX9-NEXT: v_bfe_u32 v11, v8, 16, 1 -; GFX9-NEXT: v_add3_u32 v11, v11, v8, s6 -; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v8 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v11, v12, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v36 ; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; GFX9-NEXT: v_add3_u32 v12, v12, v11, s6 -; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v11 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add3_u32 v8, v8, v7, s6 +; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v36 +; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; GFX9-NEXT: v_cndmask_b32_e32 v9, v8, v9, vcc +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add3_u32 v8, v8, v7, s6 +; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v35 +; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; GFX9-NEXT: v_cndmask_b32_e32 v10, v8, v10, vcc +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add3_u32 v8, v8, v7, s6 +; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v35 +; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; GFX9-NEXT: v_cndmask_b32_e32 v13, v8, v11, vcc +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add3_u32 v8, v8, v7, s6 +; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v34 +; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 +; GFX9-NEXT: v_cndmask_b32_e32 v14, v8, v11, vcc ; GFX9-NEXT: v_bfe_u32 v11, v7, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v18, v12, v18, vcc ; GFX9-NEXT: v_add3_u32 v11, v11, v7, s6 ; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v7 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v6 +; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v34 ; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; GFX9-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 -; GFX9-NEXT: v_cndmask_b32_e32 v19, v11, v12, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v15, v11, v12, vcc ; GFX9-NEXT: v_bfe_u32 v11, v7, 16, 1 -; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; GFX9-NEXT: v_add3_u32 v11, v11, v7, s6 ; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v7 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v20, v11, v12, vcc -; GFX9-NEXT: v_add3_u32 v7, v7, v6, s6 -; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v6 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: v_cndmask_b32_e32 v16, v11, v12, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v33 +; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_add3_u32 v12, v12, v11, s6 +; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: v_and_b32_e32 v11, 0xffff0000, v33 +; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 +; GFX9-NEXT: v_cndmask_b32_e32 v17, v12, v17, vcc +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_add3_u32 v12, v12, v11, s6 +; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v32 +; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 +; GFX9-NEXT: v_bfe_u32 v19, v11, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v18, v12, v18, vcc +; GFX9-NEXT: v_add3_u32 v19, v19, v11, s6 +; GFX9-NEXT: v_or_b32_e32 v20, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: v_and_b32_e32 v11, 0xffff0000, v32 +; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 +; GFX9-NEXT: v_cndmask_b32_e32 v19, v19, v20, vcc +; GFX9-NEXT: v_bfe_u32 v20, v11, 16, 1 +; GFX9-NEXT: v_add3_u32 v20, v20, v11, s6 +; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 ; GFX9-NEXT: s_mov_b32 s7, 0x7060302 -; GFX9-NEXT: v_cndmask_b32_e32 v21, v7, v11, vcc -; GFX9-NEXT: v_perm_b32 v9, v15, v14, s7 -; GFX9-NEXT: v_perm_b32 v8, v17, v16, s7 -; GFX9-NEXT: v_perm_b32 v12, v19, v18, s7 -; GFX9-NEXT: v_perm_b32 v11, v21, v20, s7 -; GFX9-NEXT: v_perm_b32 v38, v10, v0, s7 -; GFX9-NEXT: v_perm_b32 v37, v13, v1, s7 -; GFX9-NEXT: v_perm_b32 v49, v3, v4, s7 -; GFX9-NEXT: v_perm_b32 v48, v2, v5, s7 -; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v20, v20, v21, vcc +; GFX9-NEXT: v_perm_b32 v1, v6, v0, s7 +; GFX9-NEXT: v_perm_b32 v8, v14, v13, s7 +; GFX9-NEXT: v_perm_b32 v7, v16, v15, s7 +; GFX9-NEXT: v_perm_b32 v12, v18, v17, s7 +; GFX9-NEXT: v_perm_b32 v11, v20, v19, s7 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v0 +; GFX9-NEXT: v_perm_b32 v0, v10, v9, s7 +; GFX9-NEXT: v_perm_b32 v49, v3, v2, s7 +; GFX9-NEXT: v_perm_b32 v48, v5, v4, s7 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v19 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v4 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[11:12] ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v12 ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v12 ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v11 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[8:9] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[37:38] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[0:1] ; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[48:49] -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v38 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v38 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v37 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v49 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v49 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v49 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v48 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v48 ; GFX9-NEXT: .LBB108_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] -; GFX9-NEXT: v_mov_b32_e32 v4, v1 -; GFX9-NEXT: v_mov_b32_e32 v8, v35 -; GFX9-NEXT: v_mov_b32_e32 v12, v36 -; GFX9-NEXT: v_mov_b32_e32 v16, v32 -; GFX9-NEXT: v_mov_b32_e32 v20, v33 -; GFX9-NEXT: v_mov_b32_e32 v24, v6 -; GFX9-NEXT: v_mov_b32_e32 v28, v7 -; GFX9-NEXT: v_mov_b32_e32 v1, v38 -; GFX9-NEXT: v_mov_b32_e32 v6, v34 -; GFX9-NEXT: v_mov_b32_e32 v7, v37 +; GFX9-NEXT: v_mov_b32_e32 v0, v38 +; GFX9-NEXT: v_mov_b32_e32 v4, v39 +; GFX9-NEXT: v_mov_b32_e32 v8, v36 +; GFX9-NEXT: v_mov_b32_e32 v12, v37 +; GFX9-NEXT: v_mov_b32_e32 v16, v34 +; GFX9-NEXT: v_mov_b32_e32 v20, v35 +; GFX9-NEXT: v_mov_b32_e32 v24, v32 +; GFX9-NEXT: v_mov_b32_e32 v28, v33 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-TRUE16-LABEL: bitcast_v16bf16_to_v32i8: @@ -40851,18 +40884,17 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a, ; SI-LABEL: bitcast_v16bf16_to_v32i8_scalar: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 ; 4-byte Folded Spill ; SI-NEXT: s_and_b32 s4, s23, 0xffff0000 ; SI-NEXT: s_lshl_b32 s5, s23, 16 ; SI-NEXT: s_and_b32 s6, s22, 0xffff0000 @@ -40880,190 +40912,188 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a, ; SI-NEXT: s_and_b32 s19, s16, 0xffff0000 ; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: s_cmp_lg_u32 s24, 0 -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_mul_f32_e64 v45, 1.0, s19 +; SI-NEXT: v_mul_f32_e64 v54, 1.0, s19 ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s16 ; SI-NEXT: v_mul_f32_e64 v32, 1.0, s18 ; SI-NEXT: v_mul_f32_e64 v5, 1.0, s17 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s14 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s14 ; SI-NEXT: v_mul_f32_e64 v8, 1.0, s15 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s12 +; SI-NEXT: v_mul_f32_e64 v55, 1.0, s12 ; SI-NEXT: v_mul_f32_e64 v13, 1.0, s13 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, s10 ; SI-NEXT: v_mul_f32_e64 v16, 1.0, s11 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s8 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v21, 1.0, s9 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v59, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v58, 1.0, s4 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s6 ; SI-NEXT: v_mul_f32_e64 v24, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v29, 1.0, s5 ; SI-NEXT: s_cbranch_scc0 .LBB109_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v57 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v45 -; SI-NEXT: v_lshr_b64 v[53:54], v[8:9], 16 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v46 -; SI-NEXT: v_lshr_b64 v[39:40], v[16:17], 16 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v56 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v59 -; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v46 +; SI-NEXT: v_lshr_b64 v[51:52], v[8:9], 16 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v55 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v58 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v54 +; SI-NEXT: v_lshr_b64 v[52:53], v[13:14], 16 +; SI-NEXT: v_lshr_b64 v[40:41], v[16:17], 16 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v47 +; SI-NEXT: v_lshr_b64 v[43:44], v[24:25], 16 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v57 +; SI-NEXT: v_lshr_b64 v[48:49], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v32 -; SI-NEXT: v_lshr_b64 v[54:55], v[13:14], 16 -; SI-NEXT: v_lshr_b64 v[40:41], v[21:22], 16 -; SI-NEXT: v_lshr_b64 v[42:43], v[24:25], 16 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v58 -; SI-NEXT: v_lshr_b64 v[51:52], v[5:6], 16 -; SI-NEXT: v_lshr_b64 v[43:44], v[29:30], 16 -; SI-NEXT: v_lshr_b64 v[36:37], v[53:54], 16 -; SI-NEXT: v_lshr_b64 v[9:10], v[53:54], 8 -; SI-NEXT: v_lshr_b64 v[19:20], v[39:40], 24 -; SI-NEXT: v_lshr_b64 v[34:35], v[39:40], 16 -; SI-NEXT: v_lshr_b64 v[3:4], v[50:51], 24 -; SI-NEXT: v_lshr_b64 v[48:49], v[50:51], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[50:51], 8 -; SI-NEXT: v_lshr_b64 v[11:12], v[53:54], 24 +; SI-NEXT: v_lshr_b64 v[41:42], v[21:22], 16 +; SI-NEXT: v_lshr_b64 v[44:45], v[29:30], 16 +; SI-NEXT: v_lshr_b64 v[49:50], v[5:6], 16 +; SI-NEXT: v_lshr_b64 v[34:35], v[51:52], 16 +; SI-NEXT: v_lshr_b64 v[9:10], v[51:52], 8 +; SI-NEXT: v_lshr_b64 v[35:36], v[40:41], 16 +; SI-NEXT: v_lshr_b64 v[17:18], v[40:41], 8 +; SI-NEXT: v_lshr_b64 v[25:26], v[43:44], 8 +; SI-NEXT: v_lshr_b64 v[3:4], v[48:49], 24 +; SI-NEXT: v_lshr_b64 v[38:39], v[48:49], 16 +; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 8 +; SI-NEXT: v_lshr_b64 v[11:12], v[51:52], 24 +; SI-NEXT: v_lshr_b64 v[19:20], v[40:41], 24 +; SI-NEXT: v_lshr_b64 v[27:28], v[43:44], 24 +; SI-NEXT: v_lshr_b64 v[36:37], v[43:44], 16 ; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v32 -; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v46 -; SI-NEXT: v_lshrrev_b32_e32 v10, 8, v51 -; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v56 -; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v54 -; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v58 -; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v40 -; SI-NEXT: v_lshrrev_b32_e32 v35, 8, v43 -; SI-NEXT: v_lshr_b64 v[17:18], v[39:40], 8 -; SI-NEXT: v_lshr_b64 v[27:28], v[42:43], 24 -; SI-NEXT: v_lshr_b64 v[37:38], v[42:43], 16 -; SI-NEXT: v_lshr_b64 v[25:26], v[42:43], 8 +; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v55 +; SI-NEXT: v_lshrrev_b32_e32 v10, 8, v49 +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v47 +; SI-NEXT: v_lshrrev_b32_e32 v18, 8, v52 +; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v57 +; SI-NEXT: v_lshrrev_b32_e32 v26, 8, v41 +; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v44 ; SI-NEXT: s_cbranch_execnz .LBB109_3 ; SI-NEXT: .LBB109_2: ; %cmp.true -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v59 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v58 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v24 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_lshr_b64 v[42:43], v[1:2], 16 +; SI-NEXT: v_lshr_b64 v[43:44], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v29 ; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v58 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v57 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v57 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v56 ; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v16 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_lshr_b64 v[39:40], v[1:2], 16 +; SI-NEXT: v_lshr_b64 v[40:41], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 ; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v56 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v47 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v47 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v46 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v8 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_lshr_b64 v[53:54], v[1:2], 16 +; SI-NEXT: v_lshr_b64 v[51:52], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v13 ; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v46 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v55 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v45 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v54 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16 +; SI-NEXT: v_lshr_b64 v[48:49], v[0:1], 16 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v5 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v8 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v32 -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v8 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v16 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_lshr_b64 v[52:53], v[13:14], 16 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v24 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v16 +; SI-NEXT: v_lshr_b64 v[41:42], v[21:22], 16 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v0 -; SI-NEXT: v_lshr_b64 v[54:55], v[13:14], 16 -; SI-NEXT: v_lshr_b64 v[43:44], v[29:30], 16 -; SI-NEXT: v_lshr_b64 v[40:41], v[21:22], 16 -; SI-NEXT: v_lshr_b64 v[51:52], v[5:6], 16 -; SI-NEXT: v_lshr_b64 v[36:37], v[53:54], 16 -; SI-NEXT: v_lshr_b64 v[3:4], v[50:51], 24 -; SI-NEXT: v_lshr_b64 v[48:49], v[50:51], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[50:51], 8 -; SI-NEXT: v_lshr_b64 v[11:12], v[53:54], 24 -; SI-NEXT: v_lshr_b64 v[9:10], v[53:54], 8 -; SI-NEXT: v_lshr_b64 v[19:20], v[39:40], 24 -; SI-NEXT: v_lshr_b64 v[34:35], v[39:40], 16 -; SI-NEXT: v_lshr_b64 v[17:18], v[39:40], 8 -; SI-NEXT: v_lshr_b64 v[27:28], v[42:43], 24 -; SI-NEXT: v_lshr_b64 v[37:38], v[42:43], 16 -; SI-NEXT: v_lshr_b64 v[25:26], v[42:43], 8 -; SI-NEXT: v_lshrrev_b32_e32 v10, 8, v51 -; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v54 -; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v40 -; SI-NEXT: v_lshrrev_b32_e32 v35, 8, v43 +; SI-NEXT: v_lshr_b64 v[44:45], v[29:30], 16 +; SI-NEXT: v_lshr_b64 v[49:50], v[5:6], 16 +; SI-NEXT: v_lshr_b64 v[34:35], v[51:52], 16 +; SI-NEXT: v_lshr_b64 v[35:36], v[40:41], 16 +; SI-NEXT: v_lshr_b64 v[3:4], v[48:49], 24 +; SI-NEXT: v_lshr_b64 v[38:39], v[48:49], 16 +; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 8 +; SI-NEXT: v_lshr_b64 v[11:12], v[51:52], 24 +; SI-NEXT: v_lshr_b64 v[9:10], v[51:52], 8 +; SI-NEXT: v_lshr_b64 v[19:20], v[40:41], 24 +; SI-NEXT: v_lshr_b64 v[17:18], v[40:41], 8 +; SI-NEXT: v_lshr_b64 v[27:28], v[43:44], 24 +; SI-NEXT: v_lshr_b64 v[36:37], v[43:44], 16 +; SI-NEXT: v_lshr_b64 v[25:26], v[43:44], 8 +; SI-NEXT: v_lshrrev_b32_e32 v10, 8, v49 +; SI-NEXT: v_lshrrev_b32_e32 v18, 8, v52 +; SI-NEXT: v_lshrrev_b32_e32 v26, 8, v41 +; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v44 ; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v0 ; SI-NEXT: v_lshrrev_b32_e32 v15, 24, v8 ; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v16 ; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v24 ; SI-NEXT: .LBB109_3: ; %end -; SI-NEXT: v_mov_b32_e32 v13, v20 -; SI-NEXT: v_mov_b32_e32 v20, v40 -; SI-NEXT: v_mov_b32_e32 v24, v42 -; SI-NEXT: v_mov_b32_e32 v28, v43 -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v0, v50 -; SI-NEXT: v_mov_b32_e32 v2, v48 -; SI-NEXT: v_mov_b32_e32 v4, v51 +; SI-NEXT: v_mov_b32_e32 v16, v40 +; SI-NEXT: v_mov_b32_e32 v20, v41 +; SI-NEXT: v_mov_b32_e32 v24, v43 +; SI-NEXT: v_mov_b32_e32 v28, v44 +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v0, v48 +; SI-NEXT: v_mov_b32_e32 v2, v38 +; SI-NEXT: v_mov_b32_e32 v4, v49 ; SI-NEXT: v_mov_b32_e32 v5, v10 -; SI-NEXT: v_mov_b32_e32 v8, v53 -; SI-NEXT: v_mov_b32_e32 v10, v36 -; SI-NEXT: v_mov_b32_e32 v12, v54 -; SI-NEXT: v_mov_b32_e32 v16, v39 -; SI-NEXT: v_mov_b32_e32 v18, v34 -; SI-NEXT: v_mov_b32_e32 v21, v33 -; SI-NEXT: v_mov_b32_e32 v26, v37 -; SI-NEXT: v_mov_b32_e32 v29, v35 +; SI-NEXT: v_mov_b32_e32 v8, v51 +; SI-NEXT: v_mov_b32_e32 v10, v34 +; SI-NEXT: v_mov_b32_e32 v12, v52 +; SI-NEXT: v_mov_b32_e32 v13, v18 +; SI-NEXT: v_mov_b32_e32 v18, v35 +; SI-NEXT: v_mov_b32_e32 v21, v26 +; SI-NEXT: v_mov_b32_e32 v26, v36 +; SI-NEXT: v_mov_b32_e32 v29, v33 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB109_4: -; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr3 ; SI-NEXT: ; implicit-def: $vgpr10 ; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr9 -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr11 -; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr15 -; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr23 -; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: ; implicit-def: $vgpr17 -; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr26 +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: s_branch .LBB109_2 ; ; VI-LABEL: bitcast_v16bf16_to_v32i8_scalar: @@ -41239,38 +41269,38 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a, ; VI-NEXT: v_or_b32_e32 v6, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v6, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v2 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] ; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[5:6] -; VI-NEXT: v_mov_b32_e32 v1, v4 -; VI-NEXT: v_mov_b32_e32 v9, v12 -; VI-NEXT: v_mov_b32_e32 v17, v20 ; VI-NEXT: v_mov_b32_e32 v25, v28 -; VI-NEXT: v_lshrrev_b64 v[50:51], 24, v[24:25] -; VI-NEXT: v_lshrrev_b64 v[48:49], 24, v[16:17] -; VI-NEXT: v_lshrrev_b64 v[37:38], 24, v[8:9] -; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[0:1] +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_mov_b32_e32 v17, v20 +; VI-NEXT: v_lshrrev_b64 v[32:33], 24, v[24:25] +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] +; VI-NEXT: v_mov_b32_e32 v9, v12 +; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[16:17] +; VI-NEXT: v_mov_b32_e32 v1, v4 +; VI-NEXT: v_lshrrev_b64 v[34:35], 24, v[8:9] +; VI-NEXT: v_lshrrev_b64 v[35:36], 24, v[0:1] ; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v28 ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v28 ; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v28 ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v24 -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v24 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v24 ; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v20 ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v20 ; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v20 ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v16 -; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16 ; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v12 ; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v12 ; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v12 ; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v8 ; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v4 ; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v4 ; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4 ; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v0 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; VI-NEXT: s_branch .LBB109_5 ; VI-NEXT: .LBB109_3: ; VI-NEXT: ; implicit-def: $sgpr25 @@ -41299,47 +41329,43 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a, ; VI-NEXT: ; implicit-def: $sgpr57 ; VI-NEXT: s_branch .LBB109_2 ; VI-NEXT: .LBB109_4: +; VI-NEXT: v_mov_b32_e32 v24, s22 +; VI-NEXT: v_mov_b32_e32 v28, s23 +; VI-NEXT: v_mov_b32_e32 v16, s20 +; VI-NEXT: v_mov_b32_e32 v20, s21 +; VI-NEXT: v_mov_b32_e32 v8, s18 +; VI-NEXT: v_mov_b32_e32 v12, s19 +; VI-NEXT: v_mov_b32_e32 v0, s16 +; VI-NEXT: v_mov_b32_e32 v4, s17 ; VI-NEXT: v_mov_b32_e32 v26, s59 -; VI-NEXT: v_mov_b32_e32 v32, s58 +; VI-NEXT: v_mov_b32_e32 v25, s58 ; VI-NEXT: v_mov_b32_e32 v31, s57 ; VI-NEXT: v_mov_b32_e32 v30, s56 ; VI-NEXT: v_mov_b32_e32 v29, s47 ; VI-NEXT: v_mov_b32_e32 v18, s46 -; VI-NEXT: v_mov_b32_e32 v33, s45 +; VI-NEXT: v_mov_b32_e32 v17, s45 ; VI-NEXT: v_mov_b32_e32 v23, s44 ; VI-NEXT: v_mov_b32_e32 v22, s43 ; VI-NEXT: v_mov_b32_e32 v21, s42 ; VI-NEXT: v_mov_b32_e32 v10, s41 -; VI-NEXT: v_mov_b32_e32 v36, s40 +; VI-NEXT: v_mov_b32_e32 v9, s40 ; VI-NEXT: v_mov_b32_e32 v15, s29 ; VI-NEXT: v_mov_b32_e32 v14, s28 ; VI-NEXT: v_mov_b32_e32 v13, s27 ; VI-NEXT: v_mov_b32_e32 v2, s26 -; VI-NEXT: v_mov_b32_e32 v39, s25 +; VI-NEXT: v_mov_b32_e32 v1, s25 ; VI-NEXT: v_mov_b32_e32 v7, s24 ; VI-NEXT: v_mov_b32_e32 v6, s15 ; VI-NEXT: v_mov_b32_e32 v5, s14 -; VI-NEXT: v_mov_b32_e32 v24, s22 -; VI-NEXT: v_mov_b32_e32 v28, s23 -; VI-NEXT: v_mov_b32_e32 v16, s20 -; VI-NEXT: v_mov_b32_e32 v20, s21 -; VI-NEXT: v_mov_b32_e32 v8, s18 -; VI-NEXT: v_mov_b32_e32 v12, s19 -; VI-NEXT: v_mov_b32_e32 v0, s16 -; VI-NEXT: v_mov_b32_e32 v4, s17 -; VI-NEXT: v_mov_b32_e32 v50, s10 -; VI-NEXT: v_mov_b32_e32 v48, s8 -; VI-NEXT: v_mov_b32_e32 v37, s6 -; VI-NEXT: v_mov_b32_e32 v34, s4 +; VI-NEXT: v_mov_b32_e32 v32, s10 +; VI-NEXT: v_mov_b32_e32 v33, s8 +; VI-NEXT: v_mov_b32_e32 v34, s6 +; VI-NEXT: v_mov_b32_e32 v35, s4 ; VI-NEXT: .LBB109_5: ; %end -; VI-NEXT: v_mov_b32_e32 v3, v34 -; VI-NEXT: v_mov_b32_e32 v11, v37 -; VI-NEXT: v_mov_b32_e32 v19, v48 -; VI-NEXT: v_mov_b32_e32 v27, v50 -; VI-NEXT: v_mov_b32_e32 v1, v39 -; VI-NEXT: v_mov_b32_e32 v9, v36 -; VI-NEXT: v_mov_b32_e32 v17, v33 -; VI-NEXT: v_mov_b32_e32 v25, v32 +; VI-NEXT: v_mov_b32_e32 v3, v35 +; VI-NEXT: v_mov_b32_e32 v11, v34 +; VI-NEXT: v_mov_b32_e32 v19, v33 +; VI-NEXT: v_mov_b32_e32 v27, v32 ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: bitcast_v16bf16_to_v32i8_scalar: @@ -41395,7 +41421,7 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a, ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v35 ; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v4, v6, 16, v0 +; GFX9-NEXT: v_lshl_or_b32 v37, v6, 16, v0 ; GFX9-NEXT: v_add_f32_e32 v0, s4, v1 ; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v0 @@ -41409,50 +41435,50 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a, ; GFX9-NEXT: v_bfe_u32 v3, v0, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v3, v3, v0 ; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v0 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v0 ; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc -; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 -; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v7, v7, v5 -; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 -; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc +; GFX9-NEXT: v_lshl_or_b32 v36, v2, 16, v3 +; GFX9-NEXT: v_add_f32_e32 v3, s4, v1 +; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; GFX9-NEXT: s_lshl_b32 s4, s19, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v5 -; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 -; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v7, v7, v5 -; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 -; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v5 -; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v3 +; GFX9-NEXT: v_add_f32_e32 v3, s4, v1 +; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v3 +; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v34 ; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v12, v14, 16, v5 -; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 -; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v7, v7, v5 -; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 -; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc +; GFX9-NEXT: v_lshl_or_b32 v4, v14, 16, v3 +; GFX9-NEXT: v_add_f32_e32 v3, s4, v1 +; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v3 +; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc ; GFX9-NEXT: s_lshl_b32 s4, s18, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v5 -; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 -; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v7, v7, v5 -; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 -; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v8, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v5 -; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v3 +; GFX9-NEXT: v_add_f32_e32 v3, s4, v1 +; GFX9-NEXT: v_bfe_u32 v5, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v3 +; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 ; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v5 +; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v7, vcc ; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 ; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v7, v7, v5 @@ -41469,88 +41495,88 @@ define inreg <32 x i8> @bitcast_v16bf16_to_v32i8_scalar(<16 x bfloat> inreg %a, ; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v5 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5 -; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v33 ; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v20, v22, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v5 ; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 ; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v7, v7, v5 ; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 ; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v5 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc ; GFX9-NEXT: s_lshl_b32 s4, s20, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v5 -; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 -; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v7, v7, v5 -; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v5 -; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v16 -; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v19, v18, 16, v5 -; GFX9-NEXT: v_add_f32_e32 v5, s4, v1 -; GFX9-NEXT: v_bfe_u32 v7, v5, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v7, v7, v5 -; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 -; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: s_lshl_b32 s4, s23, 16 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v7, v9, vcc ; GFX9-NEXT: v_add_f32_e32 v7, s4, v1 ; GFX9-NEXT: v_bfe_u32 v9, v7, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v9, v9, v7 ; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9 -; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v7 +; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v7 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v13, vcc +; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 +; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v11, vcc ; GFX9-NEXT: v_add_f32_e32 v9, s4, v1 -; GFX9-NEXT: v_bfe_u32 v13, v9, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v13, v13, v9 -; GFX9-NEXT: s_lshl_b32 s4, s22, 16 -; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 -; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v9 +; GFX9-NEXT: v_bfe_u32 v11, v9, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v11, v11, v9 +; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11 +; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v9 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 +; GFX9-NEXT: s_lshl_b32 s4, s23, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v9, v11, v12, vcc +; GFX9-NEXT: v_add_f32_e32 v11, s4, v1 +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v12, v12, v11 +; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 +; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: v_add_f32_e32 v11, s4, v1 +; GFX9-NEXT: s_lshl_b32 s4, s22, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v13, v12, v13, vcc +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v1, s4, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v9, v13, v15, vcc -; GFX9-NEXT: v_bfe_u32 v13, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v13, v13, v1 -; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 -; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v1 +; GFX9-NEXT: v_add_u32_e32 v12, v12, v11 +; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: v_bfe_u32 v11, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 +; GFX9-NEXT: v_add_u32_e32 v11, v11, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v15, v12, v15, vcc +; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11 +; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v13, v15, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v11, v12, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v3 +; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v33 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v5 +; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v13 ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v1 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v32 -; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 -; GFX9-NEXT: v_lshl_or_b32 v28, v30, 16, v1 +; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v12, v22, 16, v11 +; GFX9-NEXT: v_lshl_or_b32 v11, v18, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v9 +; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v32 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v15 ; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v24 -; GFX9-NEXT: v_lshl_or_b32 v3, v2, 16, v3 -; GFX9-NEXT: v_lshl_or_b32 v27, v26, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v28 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v28 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v27 -; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[27:28] -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v19 -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[19:20] -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v11 -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v3 -; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4] +; GFX9-NEXT: v_lshl_or_b32 v3, v10, 16, v3 +; GFX9-NEXT: v_lshl_or_b32 v20, v30, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v19, v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b64 v[27:28], 24, v[19:20] +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v19 +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v11 +; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[3:4] +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v3 +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[36:37] +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v36 ; GFX9-NEXT: s_branch .LBB109_5 ; GFX9-NEXT: .LBB109_3: ; GFX9-NEXT: ; implicit-def: $sgpr27 @@ -43511,78 +43537,78 @@ define inreg <16 x bfloat> @bitcast_v32i8_to_v16bf16_scalar(<32 x i8> inreg %a, ; VI-NEXT: s_add_i32 s47, s47, 3 ; VI-NEXT: v_mov_b32_e32 v0, s46 ; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; VI-NEXT: v_perm_b32 v2, s47, v0, v1 +; VI-NEXT: v_perm_b32 v0, s47, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v0 ; VI-NEXT: s_add_i32 s45, s45, 3 ; VI-NEXT: v_mov_b32_e32 v0, s43 -; VI-NEXT: v_perm_b32 v3, s45, v0, v1 +; VI-NEXT: v_perm_b32 v0, s45, v0, v1 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s44, s44, 3 ; VI-NEXT: v_mov_b32_e32 v0, s41 -; VI-NEXT: v_perm_b32 v4, s44, v0, v1 +; VI-NEXT: v_perm_b32 v0, s44, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v0 ; VI-NEXT: s_add_i32 s42, s42, 3 ; VI-NEXT: v_mov_b32_e32 v0, s15 -; VI-NEXT: v_perm_b32 v5, s42, v0, v1 +; VI-NEXT: v_perm_b32 v0, s42, v0, v1 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s40, s40, 3 ; VI-NEXT: v_mov_b32_e32 v0, s13 -; VI-NEXT: v_perm_b32 v6, s40, v0, v1 +; VI-NEXT: v_perm_b32 v0, s40, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v0 ; VI-NEXT: s_add_i32 s14, s14, 3 ; VI-NEXT: v_mov_b32_e32 v0, s11 -; VI-NEXT: v_perm_b32 v7, s14, v0, v1 +; VI-NEXT: v_perm_b32 v0, s14, v0, v1 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s12, s12, 3 ; VI-NEXT: v_mov_b32_e32 v0, s8 -; VI-NEXT: v_perm_b32 v8, s12, v0, v1 +; VI-NEXT: v_perm_b32 v0, s12, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v0 ; VI-NEXT: s_add_i32 s9, s9, 3 ; VI-NEXT: v_mov_b32_e32 v0, s7 -; VI-NEXT: v_perm_b32 v9, s9, v0, v1 +; VI-NEXT: v_perm_b32 v0, s9, v0, v1 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s10, s10, 3 ; VI-NEXT: v_mov_b32_e32 v0, s6 -; VI-NEXT: v_perm_b32 v10, s10, v0, v1 +; VI-NEXT: v_perm_b32 v0, s10, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v0 ; VI-NEXT: s_add_i32 s28, s28, 3 ; VI-NEXT: v_mov_b32_e32 v0, s29 -; VI-NEXT: v_perm_b32 v11, s28, v0, v1 +; VI-NEXT: v_perm_b32 v0, s28, v0, v1 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s26, s26, 3 ; VI-NEXT: v_mov_b32_e32 v0, s27 -; VI-NEXT: v_perm_b32 v12, s26, v0, v1 +; VI-NEXT: v_perm_b32 v0, s26, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v0 ; VI-NEXT: s_add_i32 s24, s24, 3 ; VI-NEXT: v_mov_b32_e32 v0, s25 -; VI-NEXT: v_perm_b32 v13, s24, v0, v1 +; VI-NEXT: v_perm_b32 v0, s24, v0, v1 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s22, s22, 3 ; VI-NEXT: v_mov_b32_e32 v0, s23 +; VI-NEXT: v_perm_b32 v0, s22, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v0 ; VI-NEXT: s_add_i32 s20, s20, 3 -; VI-NEXT: v_mov_b32_e32 v14, s21 +; VI-NEXT: v_mov_b32_e32 v0, s21 +; VI-NEXT: v_perm_b32 v0, s20, v0, v1 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: v_mov_b32_e32 v15, s19 +; VI-NEXT: v_mov_b32_e32 v0, s19 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v16, s17 -; VI-NEXT: v_perm_b32 v0, s22, v0, v1 -; VI-NEXT: v_perm_b32 v14, s20, v14, v1 -; VI-NEXT: v_perm_b32 v15, s18, v15, v1 +; VI-NEXT: v_perm_b32 v0, s18, v0, v1 ; VI-NEXT: v_perm_b32 v1, s16, v16, v1 ; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1 -; VI-NEXT: v_or_b32_sdwa v1, v15, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v14, v0, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v1 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v14 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v2 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v3 -; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v4 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v5 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 -; VI-NEXT: v_add_u32_e32 v6, vcc, 0x300, v7 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v8 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v10 -; VI-NEXT: v_add_u32_e32 v8, vcc, 0x300, v11 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v12 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v13 -; VI-NEXT: v_or_b32_sdwa v2, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v3, v3, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v6, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v7, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v1, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v2, v2, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v3, v3, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v4, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v5, v5, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v6, v6, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x3000000, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x3000000, v4 @@ -43679,85 +43705,85 @@ define inreg <16 x bfloat> @bitcast_v32i8_to_v16bf16_scalar(<32 x i8> inreg %a, ; GFX9-NEXT: .LBB111_2: ; %cmp.true ; GFX9-NEXT: s_add_i32 s47, s47, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s46 -; GFX9-NEXT: v_mov_b32_e32 v2, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v3, s47, v0, v2 +; GFX9-NEXT: v_mov_b32_e32 v1, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v0, s47, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v0 ; GFX9-NEXT: s_add_i32 s43, s43, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s41 -; GFX9-NEXT: v_perm_b32 v4, s43, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s43, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v0 ; GFX9-NEXT: s_add_i32 s45, s45, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s44 -; GFX9-NEXT: v_perm_b32 v5, s45, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s45, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v0 ; GFX9-NEXT: s_add_i32 s15, s15, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s13 -; GFX9-NEXT: v_perm_b32 v6, s15, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s15, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v0 ; GFX9-NEXT: s_add_i32 s42, s42, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s40 -; GFX9-NEXT: v_perm_b32 v7, s42, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s42, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v0 ; GFX9-NEXT: s_add_i32 s11, s11, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s10 -; GFX9-NEXT: v_perm_b32 v8, s11, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s11, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v0 ; GFX9-NEXT: s_add_i32 s14, s14, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s12 -; GFX9-NEXT: v_perm_b32 v9, s14, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s14, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v0 ; GFX9-NEXT: s_add_i32 s9, s9, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s7 -; GFX9-NEXT: v_perm_b32 v10, s9, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s9, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v0 ; GFX9-NEXT: s_add_i32 s28, s28, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s29 -; GFX9-NEXT: v_perm_b32 v11, s28, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s28, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v0 +; GFX9-NEXT: s_add_i32 s8, s8, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s6 +; GFX9-NEXT: v_perm_b32 v0, s8, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0 +; GFX9-NEXT: s_add_i32 s24, s24, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s25 +; GFX9-NEXT: v_perm_b32 v0, s24, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v0 +; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s27 +; GFX9-NEXT: v_perm_b32 v0, s26, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0 ; GFX9-NEXT: s_add_i32 s20, s20, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s21 -; GFX9-NEXT: v_perm_b32 v0, s20, v0, v2 -; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v0, s20, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0 ; GFX9-NEXT: s_add_i32 s22, s22, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s23 -; GFX9-NEXT: v_perm_b32 v0, s22, v0, v2 -; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v0, s22, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0 ; GFX9-NEXT: s_add_i32 s16, s16, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 -; GFX9-NEXT: v_perm_b32 v0, s16, v0, v2 +; GFX9-NEXT: v_perm_b32 v0, s16, v0, v1 ; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: v_mov_b32_e32 v13, s19 +; GFX9-NEXT: v_mov_b32_e32 v16, s19 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_perm_b32 v13, s18, v13, v2 -; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 +; GFX9-NEXT: v_perm_b32 v1, s18, v16, v1 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_lshl_or_b32 v0, v13, 16, v0 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: s_add_i32 s24, s24, 3 -; GFX9-NEXT: v_mov_b32_e32 v13, s25 -; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v5 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v7 -; GFX9-NEXT: s_add_i32 s8, s8, 3 -; GFX9-NEXT: v_lshl_or_b32 v1, v12, 16, v1 -; GFX9-NEXT: v_mov_b32_e32 v12, s6 -; GFX9-NEXT: v_perm_b32 v13, s24, v13, v2 -; GFX9-NEXT: s_add_i32 s26, s26, 3 -; GFX9-NEXT: v_mov_b32_e32 v14, s27 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v8 -; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: v_perm_b32 v12, s8, v12, v2 -; GFX9-NEXT: v_perm_b32 v2, s26, v14, v2 -; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v3 -; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v4 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v9 -; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v10 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v11 -; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v13 -; GFX9-NEXT: v_lshl_or_b32 v5, v7, 16, v5 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v16 -; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v12 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v14 +; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX9-NEXT: v_lshl_or_b32 v6, v6, 16, v7 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v14 -; GFX9-NEXT: v_lshl_or_b32 v2, v2, 16, v10 -; GFX9-NEXT: v_lshl_or_b32 v3, v9, 16, v3 -; GFX9-NEXT: v_lshl_or_b32 v4, v8, 16, v4 -; GFX9-NEXT: v_lshl_or_b32 v7, v15, 16, v7 +; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_lshl_or_b32 v1, v15, 16, v1 +; GFX9-NEXT: v_lshl_or_b32 v2, v13, 16, v2 +; GFX9-NEXT: v_lshl_or_b32 v3, v12, 16, v3 +; GFX9-NEXT: v_lshl_or_b32 v4, v11, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v10, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v9, 16, v6 +; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7 ; GFX9-NEXT: .LBB111_3: ; %end ; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: .LBB111_4: diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll index ead5d76b2e572..632f785d5b6fa 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll @@ -1715,10 +1715,10 @@ define <9 x i32> @bitcast_v18f16_to_v9i32(<18 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB10_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v17 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v27 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v26 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v16 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v25 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -1762,36 +1762,36 @@ define <9 x i32> @bitcast_v18f16_to_v9i32(<18 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB10_2 ; SI-NEXT: .LBB10_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v27 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v17 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v16 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v25 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v24 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v25 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v14 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v15 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v24 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v23 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v13 @@ -2411,10 +2411,10 @@ define inreg <18 x i16> @bitcast_v9f32_to_v18i16_scalar(<9 x float> inreg %a, i3 ; SI-NEXT: v_lshr_b64 v[13:14], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[14:15], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[10:11], v[8:9], 16 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v1 ; SI-NEXT: s_branch .LBB13_5 ; SI-NEXT: .LBB13_3: ; SI-NEXT: ; implicit-def: $sgpr12 @@ -2437,27 +2437,24 @@ define inreg <18 x i16> @bitcast_v9f32_to_v18i16_scalar(<9 x float> inreg %a, i3 ; SI-NEXT: v_mov_b32_e32 v6, s22 ; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v19, s25 -; SI-NEXT: v_mov_b32_e32 v18, s26 -; SI-NEXT: v_mov_b32_e32 v17, s27 -; SI-NEXT: v_mov_b32_e32 v16, s28 +; SI-NEXT: v_mov_b32_e32 v11, s25 +; SI-NEXT: v_mov_b32_e32 v17, s26 +; SI-NEXT: v_mov_b32_e32 v16, s27 +; SI-NEXT: v_mov_b32_e32 v15, s28 ; SI-NEXT: v_mov_b32_e32 v10, s8 ; SI-NEXT: v_mov_b32_e32 v14, s12 ; SI-NEXT: v_mov_b32_e32 v13, s10 ; SI-NEXT: v_mov_b32_e32 v12, s6 ; SI-NEXT: v_mov_b32_e32 v9, s4 ; SI-NEXT: .LBB13_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v14 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v11 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v1, v1, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v13 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v13 ; SI-NEXT: v_or_b32_e32 v2, v2, v11 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v17 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v3, v3, v11 @@ -2465,13 +2462,16 @@ define inreg <18 x i16> @bitcast_v9f32_to_v18i16_scalar(<9 x float> inreg %a, i3 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 ; SI-NEXT: v_or_b32_e32 v6, v6, v9 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v15 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v4, v4, v11 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v16 ; SI-NEXT: v_or_b32_e32 v7, v7, v9 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 +; SI-NEXT: v_or_b32_e32 v0, v0, v14 ; SI-NEXT: v_or_b32_e32 v5, v5, v11 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: s_setpc_b64 s[30:31] @@ -3271,10 +3271,10 @@ define inreg <18 x half> @bitcast_v9f32_to_v18f16_scalar(<9 x float> inreg %a, i ; SI-NEXT: v_lshr_b64 v[13:14], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[14:15], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[10:11], v[8:9], 16 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v1 ; SI-NEXT: s_branch .LBB17_5 ; SI-NEXT: .LBB17_3: ; SI-NEXT: ; implicit-def: $sgpr12 @@ -3297,27 +3297,24 @@ define inreg <18 x half> @bitcast_v9f32_to_v18f16_scalar(<9 x float> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v6, s22 ; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v19, s25 -; SI-NEXT: v_mov_b32_e32 v18, s26 -; SI-NEXT: v_mov_b32_e32 v17, s27 -; SI-NEXT: v_mov_b32_e32 v16, s28 +; SI-NEXT: v_mov_b32_e32 v11, s25 +; SI-NEXT: v_mov_b32_e32 v17, s26 +; SI-NEXT: v_mov_b32_e32 v16, s27 +; SI-NEXT: v_mov_b32_e32 v15, s28 ; SI-NEXT: v_mov_b32_e32 v10, s8 ; SI-NEXT: v_mov_b32_e32 v14, s12 ; SI-NEXT: v_mov_b32_e32 v13, s10 ; SI-NEXT: v_mov_b32_e32 v12, s6 ; SI-NEXT: v_mov_b32_e32 v9, s4 ; SI-NEXT: .LBB17_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v14 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v11 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v1, v1, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v13 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v13 ; SI-NEXT: v_or_b32_e32 v2, v2, v11 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v17 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v3, v3, v11 @@ -3325,13 +3322,16 @@ define inreg <18 x half> @bitcast_v9f32_to_v18f16_scalar(<9 x float> inreg %a, i ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 ; SI-NEXT: v_or_b32_e32 v6, v6, v9 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v15 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v4, v4, v11 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v16 ; SI-NEXT: v_or_b32_e32 v7, v7, v9 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 +; SI-NEXT: v_or_b32_e32 v0, v0, v14 ; SI-NEXT: v_or_b32_e32 v5, v5, v11 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: s_setpc_b64 s[30:31] @@ -3503,10 +3503,10 @@ define <9 x float> @bitcast_v18f16_to_v9f32(<18 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB18_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v17 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v27 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v26 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v16 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v25 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -3550,36 +3550,36 @@ define <9 x float> @bitcast_v18f16_to_v9f32(<18 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB18_2 ; SI-NEXT: .LBB18_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v27 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v17 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v16 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v25 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v24 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v25 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v14 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v15 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v24 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v23 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v13 @@ -4296,35 +4296,35 @@ define inreg <18 x half> @bitcast_v18i16_to_v18f16_scalar(<18 x i16> inreg %a, i ; SI-NEXT: s_and_b32 s5, s17, 0xffff ; SI-NEXT: s_lshl_b32 s7, s43, 16 ; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s40, s47, 16 -; SI-NEXT: s_or_b32 s41, s5, s7 +; SI-NEXT: s_lshl_b32 s60, s47, 16 +; SI-NEXT: s_or_b32 s61, s5, s7 ; SI-NEXT: s_and_b32 s5, s19, 0xffff ; SI-NEXT: s_lshl_b32 s7, s44, 16 -; SI-NEXT: s_or_b32 s10, s4, s40 +; SI-NEXT: s_or_b32 s10, s4, s60 ; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s60, s56, 16 -; SI-NEXT: s_or_b32 s61, s5, s7 +; SI-NEXT: s_lshl_b32 s62, s56, 16 +; SI-NEXT: s_or_b32 s63, s5, s7 ; SI-NEXT: s_and_b32 s5, s21, 0xffff ; SI-NEXT: s_lshl_b32 s7, s45, 16 -; SI-NEXT: s_or_b32 s8, s4, s60 +; SI-NEXT: s_or_b32 s8, s4, s62 ; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s62, s57, 16 -; SI-NEXT: s_or_b32 s63, s5, s7 +; SI-NEXT: s_lshl_b32 s72, s57, 16 +; SI-NEXT: s_or_b32 s73, s5, s7 ; SI-NEXT: s_and_b32 s5, s23, 0xffff ; SI-NEXT: s_lshl_b32 s7, s46, 16 -; SI-NEXT: s_or_b32 s6, s4, s62 +; SI-NEXT: s_or_b32 s6, s4, s72 ; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s72, s58, 16 -; SI-NEXT: s_or_b32 s73, s5, s7 -; SI-NEXT: s_or_b32 s4, s4, s72 -; SI-NEXT: s_lshr_b64 s[12:13], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[14:15], s[60:61], 16 -; SI-NEXT: s_lshr_b64 s[26:27], s[62:63], 16 -; SI-NEXT: s_lshr_b64 s[28:29], s[72:73], 16 -; SI-NEXT: s_mov_b32 s11, s41 -; SI-NEXT: s_mov_b32 s9, s61 -; SI-NEXT: s_mov_b32 s7, s63 -; SI-NEXT: s_mov_b32 s5, s73 +; SI-NEXT: s_lshl_b32 s74, s58, 16 +; SI-NEXT: s_or_b32 s75, s5, s7 +; SI-NEXT: s_or_b32 s4, s4, s74 +; SI-NEXT: s_lshr_b64 s[12:13], s[60:61], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[62:63], 16 +; SI-NEXT: s_lshr_b64 s[26:27], s[72:73], 16 +; SI-NEXT: s_lshr_b64 s[28:29], s[74:75], 16 +; SI-NEXT: s_mov_b32 s11, s61 +; SI-NEXT: s_mov_b32 s9, s63 +; SI-NEXT: s_mov_b32 s7, s73 +; SI-NEXT: s_mov_b32 s5, s75 ; SI-NEXT: s_cbranch_execnz .LBB21_3 ; SI-NEXT: .LBB21_2: ; %cmp.true ; SI-NEXT: s_add_i32 s22, s22, 3 @@ -4848,120 +4848,120 @@ define inreg <18 x i16> @bitcast_v18f16_to_v18i16_scalar(<18 x half> inreg %a, i ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_or_b32_e32 v16, v1, v0 +; SI-NEXT: v_or_b32_e32 v17, v1, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s12 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 ; SI-NEXT: v_or_b32_e32 v18, v3, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s10 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s10 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s22 +; SI-NEXT: v_or_b32_e32 v19, v1, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s11 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s8 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_or_b32_e32 v20, v3, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s11 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v1 -; SI-NEXT: v_or_b32_e32 v19, v5, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s9 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s9 +; SI-NEXT: v_or_b32_e32 v21, v3, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s24 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s8 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s23 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v5 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_cvt_f16_f32_e32 v26, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v20 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v5 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v21 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s21 -; SI-NEXT: v_or_b32_e32 v7, v3, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s7 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s19 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v5 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v5 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v7, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s7 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v22 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s24 -; SI-NEXT: v_or_b32_e32 v5, v8, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v23 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s6 -; SI-NEXT: v_or_b32_e32 v3, v9, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s17 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s17 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_or_b32_e32 v5, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s6 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v16 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v8 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v17 -; SI-NEXT: v_or_b32_e32 v24, v1, v9 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v25 -; SI-NEXT: v_or_b32_e32 v1, v8, v1 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v23 +; SI-NEXT: v_or_b32_e32 v3, v3, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v24 +; SI-NEXT: v_or_b32_e32 v1, v1, v8 ; SI-NEXT: v_lshr_b64 v[14:15], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[12:13], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[10:11], v[4:5], 16 ; SI-NEXT: v_lshr_b64 v[8:9], v[6:7], 16 +; SI-NEXT: v_or_b32_e32 v9, v26, v25 ; SI-NEXT: s_branch .LBB23_5 ; SI-NEXT: .LBB23_3: ; SI-NEXT: s_branch .LBB23_2 ; SI-NEXT: .LBB23_4: -; SI-NEXT: v_mov_b32_e32 v17, s11 -; SI-NEXT: v_mov_b32_e32 v21, s9 +; SI-NEXT: v_mov_b32_e32 v16, s11 +; SI-NEXT: v_mov_b32_e32 v20, s9 ; SI-NEXT: v_mov_b32_e32 v22, s8 ; SI-NEXT: v_mov_b32_e32 v23, s7 -; SI-NEXT: v_mov_b32_e32 v25, s6 +; SI-NEXT: v_mov_b32_e32 v24, s6 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v24, s24 -; SI-NEXT: v_mov_b32_e32 v19, s22 -; SI-NEXT: v_mov_b32_e32 v20, s20 +; SI-NEXT: v_mov_b32_e32 v9, s24 +; SI-NEXT: v_mov_b32_e32 v21, s22 +; SI-NEXT: v_mov_b32_e32 v19, s20 ; SI-NEXT: v_mov_b32_e32 v18, s18 -; SI-NEXT: v_mov_b32_e32 v16, s16 +; SI-NEXT: v_mov_b32_e32 v17, s16 ; SI-NEXT: v_mov_b32_e32 v14, s14 ; SI-NEXT: v_mov_b32_e32 v12, s13 ; SI-NEXT: v_mov_b32_e32 v10, s12 ; SI-NEXT: v_mov_b32_e32 v8, s10 ; SI-NEXT: .LBB23_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v14 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v17 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v14 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v24 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v12 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v18 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v12 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v23 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v20 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v19 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v10 ; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v22 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v19 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v21 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v20 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v17 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v9 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v16 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: s_setpc_b64 s[30:31] ; @@ -4973,51 +4973,51 @@ define inreg <18 x i16> @bitcast_v18f16_to_v18i16_scalar(<18 x half> inreg %a, i ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB23_4 ; VI-NEXT: .LBB23_2: ; %cmp.true -; VI-NEXT: s_lshr_b32 s5, s23, 16 -; VI-NEXT: v_mov_b32_e32 v0, 0x200 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: s_lshr_b32 s5, s24, 16 -; VI-NEXT: v_add_f16_e32 v1, s23, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v4, s5 -; VI-NEXT: s_lshr_b32 s5, s22, 16 -; VI-NEXT: v_or_b32_e32 v7, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s22, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s21, 16 -; VI-NEXT: v_or_b32_e32 v6, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s21, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s20, 16 -; VI-NEXT: v_or_b32_e32 v5, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v3, s24, v0 -; VI-NEXT: v_add_f16_sdwa v4, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v1, s20, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s19, 16 -; VI-NEXT: v_or_b32_e32 v8, v3, v4 -; VI-NEXT: v_or_b32_e32 v4, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s19, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s18, 16 -; VI-NEXT: v_or_b32_e32 v3, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 ; VI-NEXT: s_lshr_b32 s4, s16, 16 -; VI-NEXT: v_add_f16_e32 v1, s18, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v2, v1, v2 ; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: s_lshr_b32 s4, s17, 16 -; VI-NEXT: v_add_f16_sdwa v10, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_mov_b32_e32 v2, s4 +; VI-NEXT: s_lshr_b32 s4, s18, 16 +; VI-NEXT: v_mov_b32_e32 v3, s4 +; VI-NEXT: s_lshr_b32 s4, s19, 16 +; VI-NEXT: v_mov_b32_e32 v4, s4 +; VI-NEXT: s_lshr_b32 s4, s20, 16 +; VI-NEXT: v_mov_b32_e32 v5, s4 +; VI-NEXT: s_lshr_b32 s4, s21, 16 +; VI-NEXT: v_mov_b32_e32 v6, s4 +; VI-NEXT: s_lshr_b32 s4, s22, 16 +; VI-NEXT: v_mov_b32_e32 v7, s4 +; VI-NEXT: s_lshr_b32 s4, s23, 16 +; VI-NEXT: v_mov_b32_e32 v8, s4 +; VI-NEXT: s_lshr_b32 s4, s24, 16 +; VI-NEXT: v_mov_b32_e32 v0, 0x200 +; VI-NEXT: v_mov_b32_e32 v18, s4 ; VI-NEXT: v_add_f16_e32 v9, s16, v0 -; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v0, s17, v0 -; VI-NEXT: v_or_b32_e32 v1, v0, v1 +; VI-NEXT: v_add_f16_sdwa v10, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, s17, v0 +; VI-NEXT: v_add_f16_sdwa v11, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s18, v0 +; VI-NEXT: v_add_f16_sdwa v12, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v3, s19, v0 +; VI-NEXT: v_add_f16_sdwa v13, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v4, s20, v0 +; VI-NEXT: v_add_f16_sdwa v14, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v5, s21, v0 +; VI-NEXT: v_add_f16_sdwa v15, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v6, s22, v0 +; VI-NEXT: v_add_f16_sdwa v16, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v7, s23, v0 +; VI-NEXT: v_add_f16_sdwa v17, v8, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v8, s24, v0 +; VI-NEXT: v_add_f16_sdwa v0, v18, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v8, v8, v0 +; VI-NEXT: v_or_b32_e32 v7, v7, v17 +; VI-NEXT: v_or_b32_e32 v6, v6, v16 +; VI-NEXT: v_or_b32_e32 v5, v5, v15 +; VI-NEXT: v_or_b32_e32 v4, v4, v14 +; VI-NEXT: v_or_b32_e32 v3, v3, v13 +; VI-NEXT: v_or_b32_e32 v2, v2, v12 +; VI-NEXT: v_or_b32_e32 v1, v1, v11 ; VI-NEXT: v_or_b32_e32 v0, v9, v10 ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB23_3: diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll index aba9755a4f357..53bfb86cb53ed 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll @@ -2647,10 +2647,10 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr20 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr18 ; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB12_2 @@ -2824,10 +2824,10 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr20 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB12_2 @@ -2909,8 +2909,8 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 { ; GFX9-NEXT: .LBB12_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_perm_b32 v1, v1, v16, s4 +; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v15, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; GFX9-NEXT: v_perm_b32 v1, v2, v39, s4 @@ -3310,6 +3310,11 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[28:29], s[20:21], 16 ; SI-NEXT: s_lshr_b64 s[40:41], s[20:21], 8 ; SI-NEXT: s_lshr_b64 s[42:43], s[18:19], 24 +; SI-NEXT: s_lshr_b64 s[44:45], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[18:19], 8 +; SI-NEXT: s_lshr_b64 s[56:57], s[16:17], 24 +; SI-NEXT: s_lshr_b64 s[58:59], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 8 ; SI-NEXT: s_lshr_b32 s72, s25, 24 ; SI-NEXT: s_lshr_b32 s73, s25, 16 ; SI-NEXT: s_lshr_b32 s74, s25, 8 @@ -3325,20 +3330,15 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32 ; SI-NEXT: s_lshr_b32 s92, s17, 24 ; SI-NEXT: s_lshr_b32 s93, s17, 16 ; SI-NEXT: s_lshr_b32 s94, s17, 8 -; SI-NEXT: s_lshr_b64 s[44:45], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[46:47], s[18:19], 8 -; SI-NEXT: s_lshr_b64 s[56:57], s[16:17], 24 -; SI-NEXT: s_lshr_b64 s[58:59], s[16:17], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 8 ; SI-NEXT: .LBB13_3: ; %end -; SI-NEXT: s_lshl_b32 s5, s60, 8 -; SI-NEXT: s_and_b32 s7, s16, 0xff -; SI-NEXT: s_or_b32 s5, s7, s5 +; SI-NEXT: s_and_b32 s5, s16, 0xff +; SI-NEXT: s_lshl_b32 s7, s60, 8 +; SI-NEXT: s_or_b32 s5, s5, s7 ; SI-NEXT: s_and_b32 s7, s58, 0xff -; SI-NEXT: s_lshl_b32 s9, s56, 24 ; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_or_b32 s7, s9, s7 +; SI-NEXT: s_lshl_b32 s9, s56, 24 ; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s7, s9, s7 ; SI-NEXT: s_or_b32 s5, s5, s7 ; SI-NEXT: v_mov_b32_e32 v1, s5 ; SI-NEXT: s_and_b32 s5, s17, 0xff @@ -3347,13 +3347,13 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32 ; SI-NEXT: s_and_b32 s7, s93, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_lshl_b32 s9, s92, 24 -; SI-NEXT: s_or_b32 s7, s9, s7 ; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s7, s9, s7 ; SI-NEXT: s_or_b32 s5, s5, s7 ; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_lshl_b32 s5, s46, 8 -; SI-NEXT: s_and_b32 s7, s18, 0xff -; SI-NEXT: s_or_b32 s5, s7, s5 +; SI-NEXT: s_and_b32 s5, s18, 0xff +; SI-NEXT: s_lshl_b32 s7, s46, 8 +; SI-NEXT: s_or_b32 s5, s5, s7 ; SI-NEXT: s_and_b32 s7, s44, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_lshl_b32 s9, s42, 24 @@ -3487,10 +3487,10 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32 ; SI-NEXT: ; implicit-def: $sgpr75 ; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr73 ; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: s_branch .LBB13_2 ; ; VI-LABEL: bitcast_v10i32_to_v40i8_scalar: @@ -5287,26 +5287,26 @@ define inreg <10 x i32> @bitcast_v40i8_to_v10i32_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s5, s18, 0xff ; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s6, s19, 24 -; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s20, 0xff -; SI-NEXT: s_lshl_b32 s7, s21, 8 -; SI-NEXT: s_or_b32 s6, s6, s7 -; SI-NEXT: s_and_b32 s7, s22, 0xff ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_lshl_b32 s8, s23, 24 -; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_or_b32 s5, s6, s5 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s6, 0xffff -; SI-NEXT: s_or_b32 s5, s5, s7 +; SI-NEXT: s_and_b32 s5, s20, 0xff +; SI-NEXT: s_lshl_b32 s6, s21, 8 +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_and_b32 s6, s22, 0xff +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_lshl_b32 s7, s23, 24 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s6, s7, s6 +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_and_b32 s6, s24, 0xff ; SI-NEXT: s_lshl_b32 s7, s25, 8 ; SI-NEXT: s_or_b32 s6, s6, s7 ; SI-NEXT: s_and_b32 s7, s26, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_lshl_b32 s8, s27, 24 -; SI-NEXT: s_or_b32 s7, s8, s7 ; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_or_b32 s7, s8, s7 ; SI-NEXT: s_or_b32 s6, s6, s7 ; SI-NEXT: s_and_b32 s7, s28, 0xff ; SI-NEXT: s_lshl_b32 s8, s29, 8 @@ -5314,8 +5314,8 @@ define inreg <10 x i32> @bitcast_v40i8_to_v10i32_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s8, s89, 0xff ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_lshl_b32 s9, s88, 24 -; SI-NEXT: s_or_b32 s8, s9, s8 ; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s8, s9, s8 ; SI-NEXT: s_or_b32 s7, s7, s8 ; SI-NEXT: s_and_b32 s8, s79, 0xff ; SI-NEXT: s_lshl_b32 s9, s78, 8 @@ -5323,8 +5323,8 @@ define inreg <10 x i32> @bitcast_v40i8_to_v10i32_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s9, s77, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_lshl_b32 s10, s76, 24 -; SI-NEXT: s_or_b32 s9, s10, s9 ; SI-NEXT: s_and_b32 s8, s8, 0xffff +; SI-NEXT: s_or_b32 s9, s10, s9 ; SI-NEXT: s_or_b32 s8, s8, s9 ; SI-NEXT: s_and_b32 s9, s75, 0xff ; SI-NEXT: s_lshl_b32 s10, s74, 8 @@ -5332,8 +5332,8 @@ define inreg <10 x i32> @bitcast_v40i8_to_v10i32_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s10, s73, 0xff ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_lshl_b32 s11, s72, 24 -; SI-NEXT: s_or_b32 s10, s11, s10 ; SI-NEXT: s_and_b32 s9, s9, 0xffff +; SI-NEXT: s_or_b32 s10, s11, s10 ; SI-NEXT: s_or_b32 s9, s9, s10 ; SI-NEXT: s_and_b32 s10, s63, 0xff ; SI-NEXT: s_lshl_b32 s11, s62, 8 @@ -5341,8 +5341,8 @@ define inreg <10 x i32> @bitcast_v40i8_to_v10i32_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s11, s61, 0xff ; SI-NEXT: s_lshl_b32 s11, s11, 16 ; SI-NEXT: s_lshl_b32 s12, s60, 24 -; SI-NEXT: s_or_b32 s11, s12, s11 ; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s11, s12, s11 ; SI-NEXT: s_or_b32 s10, s10, s11 ; SI-NEXT: s_and_b32 s11, s59, 0xff ; SI-NEXT: s_lshl_b32 s12, s58, 8 @@ -5350,8 +5350,8 @@ define inreg <10 x i32> @bitcast_v40i8_to_v10i32_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s12, s57, 0xff ; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_lshl_b32 s13, s56, 24 -; SI-NEXT: s_or_b32 s12, s13, s12 ; SI-NEXT: s_and_b32 s11, s11, 0xffff +; SI-NEXT: s_or_b32 s12, s13, s12 ; SI-NEXT: s_or_b32 s11, s11, s12 ; SI-NEXT: s_and_b32 s12, s47, 0xff ; SI-NEXT: s_lshl_b32 s13, s46, 8 @@ -5359,8 +5359,8 @@ define inreg <10 x i32> @bitcast_v40i8_to_v10i32_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s13, s45, 0xff ; SI-NEXT: s_lshl_b32 s13, s13, 16 ; SI-NEXT: s_lshl_b32 s14, s44, 24 -; SI-NEXT: s_or_b32 s13, s14, s13 ; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: s_or_b32 s13, s14, s13 ; SI-NEXT: s_or_b32 s12, s12, s13 ; SI-NEXT: s_and_b32 s13, s43, 0xff ; SI-NEXT: s_lshl_b32 s14, s42, 8 @@ -5368,8 +5368,8 @@ define inreg <10 x i32> @bitcast_v40i8_to_v10i32_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s14, s41, 0xff ; SI-NEXT: s_lshl_b32 s14, s14, 16 ; SI-NEXT: s_lshl_b32 s15, s40, 24 -; SI-NEXT: s_or_b32 s14, s15, s14 ; SI-NEXT: s_and_b32 s13, s13, 0xffff +; SI-NEXT: s_or_b32 s14, s15, s14 ; SI-NEXT: s_or_b32 s13, s13, s14 ; SI-NEXT: s_cbranch_execnz .LBB15_3 ; SI-NEXT: .LBB15_2: ; %cmp.true @@ -7303,11 +7303,11 @@ define inreg <20 x i16> @bitcast_v10f32_to_v20i16_scalar(<10 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[13:14], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[14:15], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 ; SI-NEXT: s_branch .LBB25_5 ; SI-NEXT: .LBB25_3: ; SI-NEXT: ; implicit-def: $sgpr12 @@ -7332,21 +7332,21 @@ define inreg <20 x i16> @bitcast_v10f32_to_v20i16_scalar(<10 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v9, s25 -; SI-NEXT: v_mov_b32_e32 v20, s26 -; SI-NEXT: v_mov_b32_e32 v19, s27 -; SI-NEXT: v_mov_b32_e32 v18, s28 -; SI-NEXT: v_mov_b32_e32 v17, s29 -; SI-NEXT: v_mov_b32_e32 v16, s40 +; SI-NEXT: v_mov_b32_e32 v19, s26 +; SI-NEXT: v_mov_b32_e32 v18, s27 +; SI-NEXT: v_mov_b32_e32 v17, s28 +; SI-NEXT: v_mov_b32_e32 v16, s29 +; SI-NEXT: v_mov_b32_e32 v15, s40 ; SI-NEXT: v_mov_b32_e32 v14, s12 ; SI-NEXT: v_mov_b32_e32 v13, s10 ; SI-NEXT: v_mov_b32_e32 v12, s8 ; SI-NEXT: v_mov_b32_e32 v11, s6 ; SI-NEXT: v_mov_b32_e32 v10, s4 ; SI-NEXT: .LBB25_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 @@ -7355,19 +7355,19 @@ define inreg <20 x i16> @bitcast_v10f32_to_v20i16_scalar(<10 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v0, v0, v14 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v19 ; SI-NEXT: v_or_b32_e32 v2, v2, v13 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v18 ; SI-NEXT: v_or_b32_e32 v4, v4, v12 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v17 ; SI-NEXT: v_or_b32_e32 v6, v6, v11 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v16 ; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v15 ; SI-NEXT: v_or_b32_e32 v1, v1, v14 ; SI-NEXT: v_or_b32_e32 v3, v3, v13 ; SI-NEXT: v_or_b32_e32 v5, v5, v12 @@ -8223,11 +8223,11 @@ define inreg <20 x half> @bitcast_v10f32_to_v20f16_scalar(<10 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[13:14], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[14:15], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 ; SI-NEXT: s_branch .LBB29_5 ; SI-NEXT: .LBB29_3: ; SI-NEXT: ; implicit-def: $sgpr12 @@ -8252,21 +8252,21 @@ define inreg <20 x half> @bitcast_v10f32_to_v20f16_scalar(<10 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v9, s25 -; SI-NEXT: v_mov_b32_e32 v20, s26 -; SI-NEXT: v_mov_b32_e32 v19, s27 -; SI-NEXT: v_mov_b32_e32 v18, s28 -; SI-NEXT: v_mov_b32_e32 v17, s29 -; SI-NEXT: v_mov_b32_e32 v16, s40 +; SI-NEXT: v_mov_b32_e32 v19, s26 +; SI-NEXT: v_mov_b32_e32 v18, s27 +; SI-NEXT: v_mov_b32_e32 v17, s28 +; SI-NEXT: v_mov_b32_e32 v16, s29 +; SI-NEXT: v_mov_b32_e32 v15, s40 ; SI-NEXT: v_mov_b32_e32 v14, s12 ; SI-NEXT: v_mov_b32_e32 v13, s10 ; SI-NEXT: v_mov_b32_e32 v12, s8 ; SI-NEXT: v_mov_b32_e32 v11, s6 ; SI-NEXT: v_mov_b32_e32 v10, s4 ; SI-NEXT: .LBB29_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 @@ -8275,19 +8275,19 @@ define inreg <20 x half> @bitcast_v10f32_to_v20f16_scalar(<10 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v0, v0, v14 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v19 ; SI-NEXT: v_or_b32_e32 v2, v2, v13 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v18 ; SI-NEXT: v_or_b32_e32 v4, v4, v12 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v17 ; SI-NEXT: v_or_b32_e32 v6, v6, v11 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v16 ; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v15 ; SI-NEXT: v_or_b32_e32 v1, v1, v14 ; SI-NEXT: v_or_b32_e32 v3, v3, v13 ; SI-NEXT: v_or_b32_e32 v5, v5, v12 @@ -9282,10 +9282,10 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr20 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr18 ; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB32_2 @@ -9459,10 +9459,10 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr20 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB32_2 @@ -9544,8 +9544,8 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 { ; GFX9-NEXT: .LBB32_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_perm_b32 v1, v1, v16, s4 +; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v15, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; GFX9-NEXT: v_perm_b32 v1, v2, v39, s4 @@ -9995,10 +9995,10 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3 ; SI-NEXT: ; implicit-def: $sgpr88 ; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: ; implicit-def: $sgpr93 ; SI-NEXT: ; implicit-def: $sgpr91 -; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: s_branch .LBB33_2 ; SI-NEXT: .LBB33_4: ; SI-NEXT: v_mov_b32_e32 v13, s16 @@ -10224,8 +10224,8 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3 ; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v10 ; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v10 ; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v9 ; VI-NEXT: s_branch .LBB33_5 ; VI-NEXT: .LBB33_3: ; VI-NEXT: ; implicit-def: $sgpr76 @@ -10270,8 +10270,8 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v4, s23 ; VI-NEXT: v_mov_b32_e32 v1, s24 ; VI-NEXT: v_mov_b32_e32 v2, s25 -; VI-NEXT: v_mov_b32_e32 v39, s76 -; VI-NEXT: v_mov_b32_e32 v48, s74 +; VI-NEXT: v_mov_b32_e32 v48, s76 +; VI-NEXT: v_mov_b32_e32 v39, s74 ; VI-NEXT: v_mov_b32_e32 v38, s75 ; VI-NEXT: v_mov_b32_e32 v36, s73 ; VI-NEXT: v_mov_b32_e32 v37, s72 @@ -10302,8 +10302,8 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v11, s12 ; VI-NEXT: .LBB33_5: ; %end ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v15, v48, v15, s4 -; VI-NEXT: v_perm_b32 v9, v9, v39, s4 +; VI-NEXT: v_perm_b32 v15, v39, v15, s4 +; VI-NEXT: v_perm_b32 v9, v9, v48, s4 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_or_b32_e32 v9, v9, v15 ; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen @@ -10440,8 +10440,8 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3 ; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v10 ; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v10 ; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v9 ; GFX9-NEXT: s_branch .LBB33_5 ; GFX9-NEXT: .LBB33_3: ; GFX9-NEXT: ; implicit-def: $sgpr76 @@ -10486,8 +10486,8 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v4, s23 ; GFX9-NEXT: v_mov_b32_e32 v1, s24 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 -; GFX9-NEXT: v_mov_b32_e32 v39, s76 -; GFX9-NEXT: v_mov_b32_e32 v48, s74 +; GFX9-NEXT: v_mov_b32_e32 v48, s76 +; GFX9-NEXT: v_mov_b32_e32 v39, s74 ; GFX9-NEXT: v_mov_b32_e32 v38, s75 ; GFX9-NEXT: v_mov_b32_e32 v36, s73 ; GFX9-NEXT: v_mov_b32_e32 v37, s72 @@ -10518,8 +10518,8 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v11, s12 ; GFX9-NEXT: .LBB33_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 -; GFX9-NEXT: v_perm_b32 v9, v9, v39, s4 +; GFX9-NEXT: v_perm_b32 v15, v39, v15, s4 +; GFX9-NEXT: v_perm_b32 v9, v9, v48, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v15 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen @@ -12007,26 +12007,26 @@ define inreg <10 x float> @bitcast_v40i8_to_v10f32_scalar(<40 x i8> inreg %a, i3 ; SI-NEXT: s_and_b32 s5, s18, 0xff ; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s6, s19, 24 -; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s20, 0xff -; SI-NEXT: s_lshl_b32 s7, s21, 8 -; SI-NEXT: s_or_b32 s6, s6, s7 -; SI-NEXT: s_and_b32 s7, s22, 0xff ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_lshl_b32 s8, s23, 24 -; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_or_b32 s5, s6, s5 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s6, 0xffff -; SI-NEXT: s_or_b32 s5, s5, s7 +; SI-NEXT: s_and_b32 s5, s20, 0xff +; SI-NEXT: s_lshl_b32 s6, s21, 8 +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_and_b32 s6, s22, 0xff +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_lshl_b32 s7, s23, 24 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s6, s7, s6 +; SI-NEXT: s_or_b32 s5, s5, s6 ; SI-NEXT: s_and_b32 s6, s24, 0xff ; SI-NEXT: s_lshl_b32 s7, s25, 8 ; SI-NEXT: s_or_b32 s6, s6, s7 ; SI-NEXT: s_and_b32 s7, s26, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_lshl_b32 s8, s27, 24 -; SI-NEXT: s_or_b32 s7, s8, s7 ; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_or_b32 s7, s8, s7 ; SI-NEXT: s_or_b32 s6, s6, s7 ; SI-NEXT: s_and_b32 s7, s28, 0xff ; SI-NEXT: s_lshl_b32 s8, s29, 8 @@ -12034,8 +12034,8 @@ define inreg <10 x float> @bitcast_v40i8_to_v10f32_scalar(<40 x i8> inreg %a, i3 ; SI-NEXT: s_and_b32 s8, s89, 0xff ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_lshl_b32 s9, s88, 24 -; SI-NEXT: s_or_b32 s8, s9, s8 ; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s8, s9, s8 ; SI-NEXT: s_or_b32 s7, s7, s8 ; SI-NEXT: s_and_b32 s8, s79, 0xff ; SI-NEXT: s_lshl_b32 s9, s78, 8 @@ -12043,8 +12043,8 @@ define inreg <10 x float> @bitcast_v40i8_to_v10f32_scalar(<40 x i8> inreg %a, i3 ; SI-NEXT: s_and_b32 s9, s77, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_lshl_b32 s10, s76, 24 -; SI-NEXT: s_or_b32 s9, s10, s9 ; SI-NEXT: s_and_b32 s8, s8, 0xffff +; SI-NEXT: s_or_b32 s9, s10, s9 ; SI-NEXT: s_or_b32 s8, s8, s9 ; SI-NEXT: s_and_b32 s9, s75, 0xff ; SI-NEXT: s_lshl_b32 s10, s74, 8 @@ -12052,8 +12052,8 @@ define inreg <10 x float> @bitcast_v40i8_to_v10f32_scalar(<40 x i8> inreg %a, i3 ; SI-NEXT: s_and_b32 s10, s73, 0xff ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_lshl_b32 s11, s72, 24 -; SI-NEXT: s_or_b32 s10, s11, s10 ; SI-NEXT: s_and_b32 s9, s9, 0xffff +; SI-NEXT: s_or_b32 s10, s11, s10 ; SI-NEXT: s_or_b32 s9, s9, s10 ; SI-NEXT: s_and_b32 s10, s63, 0xff ; SI-NEXT: s_lshl_b32 s11, s62, 8 @@ -12061,8 +12061,8 @@ define inreg <10 x float> @bitcast_v40i8_to_v10f32_scalar(<40 x i8> inreg %a, i3 ; SI-NEXT: s_and_b32 s11, s61, 0xff ; SI-NEXT: s_lshl_b32 s11, s11, 16 ; SI-NEXT: s_lshl_b32 s12, s60, 24 -; SI-NEXT: s_or_b32 s11, s12, s11 ; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s11, s12, s11 ; SI-NEXT: s_or_b32 s10, s10, s11 ; SI-NEXT: s_and_b32 s11, s59, 0xff ; SI-NEXT: s_lshl_b32 s12, s58, 8 @@ -12070,8 +12070,8 @@ define inreg <10 x float> @bitcast_v40i8_to_v10f32_scalar(<40 x i8> inreg %a, i3 ; SI-NEXT: s_and_b32 s12, s57, 0xff ; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_lshl_b32 s13, s56, 24 -; SI-NEXT: s_or_b32 s12, s13, s12 ; SI-NEXT: s_and_b32 s11, s11, 0xffff +; SI-NEXT: s_or_b32 s12, s13, s12 ; SI-NEXT: s_or_b32 s11, s11, s12 ; SI-NEXT: s_and_b32 s12, s47, 0xff ; SI-NEXT: s_lshl_b32 s13, s46, 8 @@ -12079,8 +12079,8 @@ define inreg <10 x float> @bitcast_v40i8_to_v10f32_scalar(<40 x i8> inreg %a, i3 ; SI-NEXT: s_and_b32 s13, s45, 0xff ; SI-NEXT: s_lshl_b32 s13, s13, 16 ; SI-NEXT: s_lshl_b32 s14, s44, 24 -; SI-NEXT: s_or_b32 s13, s14, s13 ; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: s_or_b32 s13, s14, s13 ; SI-NEXT: s_or_b32 s12, s12, s13 ; SI-NEXT: s_and_b32 s13, s43, 0xff ; SI-NEXT: s_lshl_b32 s14, s42, 8 @@ -12088,8 +12088,8 @@ define inreg <10 x float> @bitcast_v40i8_to_v10f32_scalar(<40 x i8> inreg %a, i3 ; SI-NEXT: s_and_b32 s14, s41, 0xff ; SI-NEXT: s_lshl_b32 s14, s14, 16 ; SI-NEXT: s_lshl_b32 s15, s40, 24 -; SI-NEXT: s_or_b32 s14, s15, s14 ; SI-NEXT: s_and_b32 s13, s13, 0xffff +; SI-NEXT: s_or_b32 s14, s15, s14 ; SI-NEXT: s_or_b32 s13, s13, s14 ; SI-NEXT: s_cbranch_execnz .LBB35_3 ; SI-NEXT: .LBB35_2: ; %cmp.true @@ -14171,43 +14171,43 @@ define inreg <20 x half> @bitcast_v20i16_to_v20f16_scalar(<20 x i16> inreg %a, i ; SI-NEXT: s_and_b32 s5, s17, 0xffff ; SI-NEXT: s_lshl_b32 s7, s46, 16 ; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s28, s59, 16 -; SI-NEXT: s_or_b32 s29, s5, s7 +; SI-NEXT: s_lshl_b32 s72, s59, 16 +; SI-NEXT: s_or_b32 s73, s5, s7 ; SI-NEXT: s_and_b32 s5, s19, 0xffff ; SI-NEXT: s_lshl_b32 s7, s47, 16 -; SI-NEXT: s_or_b32 s12, s4, s28 +; SI-NEXT: s_or_b32 s12, s4, s72 ; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s40, s60, 16 -; SI-NEXT: s_or_b32 s41, s5, s7 +; SI-NEXT: s_lshl_b32 s74, s60, 16 +; SI-NEXT: s_or_b32 s75, s5, s7 ; SI-NEXT: s_and_b32 s5, s21, 0xffff ; SI-NEXT: s_lshl_b32 s7, s56, 16 -; SI-NEXT: s_or_b32 s10, s4, s40 +; SI-NEXT: s_or_b32 s10, s4, s74 ; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s42, s61, 16 -; SI-NEXT: s_or_b32 s43, s5, s7 +; SI-NEXT: s_lshl_b32 s76, s61, 16 +; SI-NEXT: s_or_b32 s77, s5, s7 ; SI-NEXT: s_and_b32 s5, s23, 0xffff ; SI-NEXT: s_lshl_b32 s7, s57, 16 -; SI-NEXT: s_or_b32 s8, s4, s42 +; SI-NEXT: s_or_b32 s8, s4, s76 ; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s44, s62, 16 -; SI-NEXT: s_or_b32 s45, s5, s7 +; SI-NEXT: s_lshl_b32 s78, s62, 16 +; SI-NEXT: s_or_b32 s79, s5, s7 ; SI-NEXT: s_and_b32 s5, s25, 0xffff ; SI-NEXT: s_lshl_b32 s7, s58, 16 -; SI-NEXT: s_or_b32 s6, s4, s44 +; SI-NEXT: s_or_b32 s6, s4, s78 ; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s72, s63, 16 -; SI-NEXT: s_or_b32 s73, s5, s7 -; SI-NEXT: s_or_b32 s4, s4, s72 -; SI-NEXT: s_lshr_b64 s[14:15], s[28:29], 16 -; SI-NEXT: s_lshr_b64 s[26:27], s[40:41], 16 -; SI-NEXT: s_mov_b32 s13, s29 -; SI-NEXT: s_lshr_b64 s[28:29], s[42:43], 16 -; SI-NEXT: s_mov_b32 s11, s41 -; SI-NEXT: s_lshr_b64 s[40:41], s[44:45], 16 -; SI-NEXT: s_mov_b32 s9, s43 -; SI-NEXT: s_lshr_b64 s[42:43], s[72:73], 16 -; SI-NEXT: s_mov_b32 s7, s45 -; SI-NEXT: s_mov_b32 s5, s73 +; SI-NEXT: s_lshl_b32 s88, s63, 16 +; SI-NEXT: s_or_b32 s89, s5, s7 +; SI-NEXT: s_or_b32 s4, s4, s88 +; SI-NEXT: s_lshr_b64 s[14:15], s[72:73], 16 +; SI-NEXT: s_lshr_b64 s[26:27], s[74:75], 16 +; SI-NEXT: s_lshr_b64 s[28:29], s[76:77], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[78:79], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[88:89], 16 +; SI-NEXT: s_mov_b32 s13, s73 +; SI-NEXT: s_mov_b32 s11, s75 +; SI-NEXT: s_mov_b32 s9, s77 +; SI-NEXT: s_mov_b32 s7, s79 +; SI-NEXT: s_mov_b32 s5, s89 ; SI-NEXT: s_cbranch_execnz .LBB45_3 ; SI-NEXT: .LBB45_2: ; %cmp.true ; SI-NEXT: s_add_i32 s24, s24, 3 @@ -14744,8 +14744,8 @@ define inreg <20 x i16> @bitcast_v20f16_to_v20i16_scalar(<20 x half> inreg %a, i ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_lshr_b32 s11, s25, 16 -; SI-NEXT: s_lshr_b32 s10, s24, 16 -; SI-NEXT: s_lshr_b32 s9, s23, 16 +; SI-NEXT: s_lshr_b32 s9, s24, 16 +; SI-NEXT: s_lshr_b32 s10, s23, 16 ; SI-NEXT: s_lshr_b32 s12, s22, 16 ; SI-NEXT: s_lshr_b32 s8, s21, 16 ; SI-NEXT: s_lshr_b32 s13, s20, 16 @@ -14760,84 +14760,84 @@ define inreg <20 x i16> @bitcast_v20f16_to_v20i16_scalar(<20 x half> inreg %a, i ; SI-NEXT: .LBB47_2: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, s15 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s16 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s14 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; SI-NEXT: v_or_b32_e32 v20, v1, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s13 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s12 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s8 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s19 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v22, v3, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s12 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s10 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s22 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s25 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s9 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s25 +; SI-NEXT: v_or_b32_e32 v21, v5, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s10 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s14 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v22 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s21 -; SI-NEXT: v_or_b32_e32 v7, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s7 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v23 +; SI-NEXT: v_or_b32_e32 v9, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s8 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v24 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v25, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v7, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s7 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v25 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s17 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_or_b32_e32 v5, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v26, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s6 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s9 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v5, v5, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v24 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s6 -; SI-NEXT: v_or_b32_e32 v3, v3, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s17 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v21 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v9 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v27, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v25 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_or_b32_e32 v1, v1, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s22 -; SI-NEXT: v_or_b32_e32 v9, v9, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s24 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v26 +; SI-NEXT: v_or_b32_e32 v3, v3, v11 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v27 +; SI-NEXT: v_or_b32_e32 v1, v1, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s24 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v29, v10, v2 -; SI-NEXT: v_or_b32_e32 v28, v11, v4 -; SI-NEXT: v_or_b32_e32 v27, v12, v6 -; SI-NEXT: v_or_b32_e32 v26, v13, v8 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v29, v8, v6 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v10 +; SI-NEXT: v_or_b32_e32 v28, v11, v8 ; SI-NEXT: v_lshr_b64 v[18:19], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[16:17], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[14:15], v[4:5], 16 @@ -14847,56 +14847,56 @@ define inreg <20 x i16> @bitcast_v20f16_to_v20i16_scalar(<20 x half> inreg %a, i ; SI-NEXT: .LBB47_3: ; SI-NEXT: s_branch .LBB47_2 ; SI-NEXT: .LBB47_4: -; SI-NEXT: v_mov_b32_e32 v21, s11 -; SI-NEXT: v_mov_b32_e32 v22, s9 -; SI-NEXT: v_mov_b32_e32 v23, s8 -; SI-NEXT: v_mov_b32_e32 v24, s7 -; SI-NEXT: v_mov_b32_e32 v25, s6 +; SI-NEXT: v_mov_b32_e32 v23, s11 +; SI-NEXT: v_mov_b32_e32 v24, s10 +; SI-NEXT: v_mov_b32_e32 v25, s8 +; SI-NEXT: v_mov_b32_e32 v26, s7 +; SI-NEXT: v_mov_b32_e32 v27, s6 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v9, s25 -; SI-NEXT: v_mov_b32_e32 v26, s24 -; SI-NEXT: v_mov_b32_e32 v27, s22 -; SI-NEXT: v_mov_b32_e32 v28, s20 -; SI-NEXT: v_mov_b32_e32 v29, s18 +; SI-NEXT: v_mov_b32_e32 v28, s24 +; SI-NEXT: v_mov_b32_e32 v29, s22 +; SI-NEXT: v_mov_b32_e32 v21, s20 +; SI-NEXT: v_mov_b32_e32 v22, s18 ; SI-NEXT: v_mov_b32_e32 v20, s16 ; SI-NEXT: v_mov_b32_e32 v18, s15 ; SI-NEXT: v_mov_b32_e32 v16, s14 ; SI-NEXT: v_mov_b32_e32 v14, s13 ; SI-NEXT: v_mov_b32_e32 v12, s12 -; SI-NEXT: v_mov_b32_e32 v10, s10 +; SI-NEXT: v_mov_b32_e32 v10, s9 ; SI-NEXT: .LBB47_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v18 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v20 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v18 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v27 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v16 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v29 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v22 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v16 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v26 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v14 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v28 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v21 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v14 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v25 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v27 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v12 ; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v24 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v26 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v23 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: s_setpc_b64 s[30:31] ; @@ -14908,56 +14908,56 @@ define inreg <20 x i16> @bitcast_v20f16_to_v20i16_scalar(<20 x half> inreg %a, i ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB47_4 ; VI-NEXT: .LBB47_2: ; %cmp.true -; VI-NEXT: s_lshr_b32 s5, s24, 16 -; VI-NEXT: v_mov_b32_e32 v0, 0x200 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: s_lshr_b32 s5, s25, 16 -; VI-NEXT: v_add_f16_e32 v1, s24, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v4, s5 -; VI-NEXT: s_lshr_b32 s5, s23, 16 -; VI-NEXT: v_or_b32_e32 v8, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s23, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s22, 16 -; VI-NEXT: v_or_b32_e32 v7, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s22, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s21, 16 -; VI-NEXT: v_or_b32_e32 v6, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s21, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s20, 16 -; VI-NEXT: v_or_b32_e32 v5, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v3, s25, v0 -; VI-NEXT: v_add_f16_sdwa v4, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v1, s20, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s19, 16 -; VI-NEXT: v_or_b32_e32 v9, v3, v4 -; VI-NEXT: v_or_b32_e32 v4, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s19, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s18, 16 -; VI-NEXT: v_or_b32_e32 v3, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 ; VI-NEXT: s_lshr_b32 s4, s16, 16 -; VI-NEXT: v_add_f16_e32 v1, s18, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v2, v1, v2 ; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: s_lshr_b32 s4, s17, 16 -; VI-NEXT: v_add_f16_sdwa v11, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_mov_b32_e32 v2, s4 +; VI-NEXT: s_lshr_b32 s4, s18, 16 +; VI-NEXT: v_mov_b32_e32 v3, s4 +; VI-NEXT: s_lshr_b32 s4, s19, 16 +; VI-NEXT: v_mov_b32_e32 v4, s4 +; VI-NEXT: s_lshr_b32 s4, s20, 16 +; VI-NEXT: v_mov_b32_e32 v5, s4 +; VI-NEXT: s_lshr_b32 s4, s21, 16 +; VI-NEXT: v_mov_b32_e32 v6, s4 +; VI-NEXT: s_lshr_b32 s4, s22, 16 +; VI-NEXT: v_mov_b32_e32 v7, s4 +; VI-NEXT: s_lshr_b32 s4, s23, 16 +; VI-NEXT: v_mov_b32_e32 v8, s4 +; VI-NEXT: s_lshr_b32 s4, s24, 16 +; VI-NEXT: v_mov_b32_e32 v0, 0x200 +; VI-NEXT: v_mov_b32_e32 v9, s4 +; VI-NEXT: s_lshr_b32 s4, s25, 16 +; VI-NEXT: v_add_f16_sdwa v19, v9, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v9, s4 ; VI-NEXT: v_add_f16_e32 v10, s16, v0 -; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v0, s17, v0 -; VI-NEXT: v_or_b32_e32 v1, v0, v1 +; VI-NEXT: v_add_f16_sdwa v11, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, s17, v0 +; VI-NEXT: v_add_f16_sdwa v12, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s18, v0 +; VI-NEXT: v_add_f16_sdwa v13, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v3, s19, v0 +; VI-NEXT: v_add_f16_sdwa v14, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v4, s20, v0 +; VI-NEXT: v_add_f16_sdwa v15, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v5, s21, v0 +; VI-NEXT: v_add_f16_sdwa v16, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v6, s22, v0 +; VI-NEXT: v_add_f16_sdwa v17, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v7, s23, v0 +; VI-NEXT: v_add_f16_sdwa v18, v8, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v8, s24, v0 +; VI-NEXT: v_add_f16_sdwa v9, v9, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v0, s25, v0 +; VI-NEXT: v_or_b32_e32 v9, v0, v9 +; VI-NEXT: v_or_b32_e32 v8, v8, v19 +; VI-NEXT: v_or_b32_e32 v7, v7, v18 +; VI-NEXT: v_or_b32_e32 v6, v6, v17 +; VI-NEXT: v_or_b32_e32 v5, v5, v16 +; VI-NEXT: v_or_b32_e32 v4, v4, v15 +; VI-NEXT: v_or_b32_e32 v3, v3, v14 +; VI-NEXT: v_or_b32_e32 v2, v2, v13 +; VI-NEXT: v_or_b32_e32 v1, v1, v12 ; VI-NEXT: v_or_b32_e32 v0, v10, v11 ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB47_3: @@ -15684,10 +15684,10 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr20 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB48_2 @@ -15769,8 +15769,8 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: .LBB48_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_perm_b32 v1, v1, v16, s4 +; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v15, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; GFX9-NEXT: v_perm_b32 v1, v2, v39, s4 @@ -16166,6 +16166,7 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: s_and_b32 s5, s25, 0xffff ; SI-NEXT: s_lshl_b32 s15, s90, 16 +; SI-NEXT: s_or_b32 s5, s5, s15 ; SI-NEXT: s_lshr_b64 s[26:27], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[44:45], s[12:13], 8 ; SI-NEXT: s_lshr_b64 s[28:29], s[10:11], 24 @@ -16173,9 +16174,13 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 8 ; SI-NEXT: s_lshr_b64 s[40:41], s[8:9], 24 ; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8 ; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 -; SI-NEXT: s_or_b32 s5, s5, s15 +; SI-NEXT: s_lshr_b64 s[60:61], s[4:5], 24 +; SI-NEXT: s_lshr_b64 s[72:73], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8 +; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 8 ; SI-NEXT: s_lshr_b32 s59, s13, 8 ; SI-NEXT: s_lshr_b32 s47, s11, 8 ; SI-NEXT: s_lshr_b32 s43, s9, 8 @@ -16186,11 +16191,6 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; SI-NEXT: s_bfe_u32 s45, s92, 0x80008 ; SI-NEXT: s_bfe_u32 s41, s91, 0x80008 ; SI-NEXT: s_bfe_u32 s15, s90, 0x80008 -; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8 -; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24 -; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 8 ; SI-NEXT: s_cbranch_execnz .LBB49_3 ; SI-NEXT: .LBB49_2: ; %cmp.true ; SI-NEXT: s_add_i32 s24, s24, 3 @@ -16233,6 +16233,8 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; SI-NEXT: s_and_b32 s13, s17, 0xffff ; SI-NEXT: s_lshl_b32 s14, s94, 16 ; SI-NEXT: s_or_b32 s13, s14, s13 +; SI-NEXT: s_add_i32 s4, s4, 0x30000 +; SI-NEXT: s_add_i32 s5, s5, 0x30000 ; SI-NEXT: s_add_i32 s6, s6, 0x30000 ; SI-NEXT: s_add_i32 s7, s7, 0x30000 ; SI-NEXT: s_add_i32 s8, s8, 0x30000 @@ -16241,8 +16243,6 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; SI-NEXT: s_add_i32 s11, s11, 0x30000 ; SI-NEXT: s_add_i32 s12, s12, 0x30000 ; SI-NEXT: s_add_i32 s13, s13, 0x30000 -; SI-NEXT: s_add_i32 s4, s4, 0x30000 -; SI-NEXT: s_add_i32 s5, s5, 0x30000 ; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 24 ; SI-NEXT: s_lshr_b64 s[26:27], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[44:45], s[12:13], 8 @@ -16251,11 +16251,11 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 8 ; SI-NEXT: s_lshr_b64 s[40:41], s[8:9], 24 ; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8 ; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24 -; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[4:5], 24 +; SI-NEXT: s_lshr_b64 s[72:73], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 16 ; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8 -; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24 ; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 8 ; SI-NEXT: s_lshr_b32 s61, s13, 24 @@ -16323,7 +16323,7 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s10 ; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: s_lshl_b32 s10, s60, 8 +; SI-NEXT: s_lshl_b32 s10, s72, 8 ; SI-NEXT: s_or_b32 s8, s8, s10 ; SI-NEXT: s_and_b32 s10, s56, 0xff ; SI-NEXT: s_lshl_b32 s10, s10, 16 @@ -16351,7 +16351,7 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_lshl_b32 s8, s76, 8 ; SI-NEXT: s_or_b32 s6, s6, s8 -; SI-NEXT: s_and_b32 s8, s72, 0xff +; SI-NEXT: s_and_b32 s8, s62, 0xff ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_lshl_b32 s9, s46, 24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff @@ -16379,7 +16379,7 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; SI-NEXT: s_or_b32 s4, s4, s6 ; SI-NEXT: s_and_b32 s6, s74, 0xff ; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s7, s62, 24 +; SI-NEXT: s_lshl_b32 s7, s60, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s7, s6 ; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0 @@ -16424,23 +16424,23 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: ; implicit-def: $sgpr57 ; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr43 ; SI-NEXT: ; implicit-def: $sgpr45 ; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr29 ; SI-NEXT: ; implicit-def: $sgpr41 -; SI-NEXT: ; implicit-def: $sgpr27 -; SI-NEXT: ; implicit-def: $sgpr15 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr27 +; SI-NEXT: ; implicit-def: $sgpr15 ; SI-NEXT: s_branch .LBB49_2 ; ; VI-LABEL: bitcast_v20i16_to_v40i8_scalar: @@ -16753,8 +16753,8 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v10 ; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v10 ; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v9 ; GFX9-NEXT: s_branch .LBB49_5 ; GFX9-NEXT: .LBB49_3: ; GFX9-NEXT: ; implicit-def: $sgpr76 @@ -16799,8 +16799,8 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v4, s23 ; GFX9-NEXT: v_mov_b32_e32 v1, s24 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 -; GFX9-NEXT: v_mov_b32_e32 v39, s76 -; GFX9-NEXT: v_mov_b32_e32 v48, s74 +; GFX9-NEXT: v_mov_b32_e32 v48, s76 +; GFX9-NEXT: v_mov_b32_e32 v39, s74 ; GFX9-NEXT: v_mov_b32_e32 v38, s75 ; GFX9-NEXT: v_mov_b32_e32 v36, s73 ; GFX9-NEXT: v_mov_b32_e32 v37, s72 @@ -16831,8 +16831,8 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v15, s4 ; GFX9-NEXT: .LBB49_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 -; GFX9-NEXT: v_perm_b32 v9, v9, v39, s4 +; GFX9-NEXT: v_perm_b32 v15, v39, v15, s4 +; GFX9-NEXT: v_perm_b32 v9, v9, v48, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v15 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen @@ -18432,213 +18432,219 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: v_writelane_b32 v27, s37, 3 ; SI-NEXT: v_writelane_b32 v27, s38, 4 ; SI-NEXT: v_writelane_b32 v27, s39, 5 -; SI-NEXT: v_writelane_b32 v27, s30, 6 -; SI-NEXT: v_writelane_b32 v27, s31, 7 +; SI-NEXT: v_writelane_b32 v27, s48, 6 +; SI-NEXT: v_writelane_b32 v27, s49, 7 +; SI-NEXT: v_writelane_b32 v27, s50, 8 +; SI-NEXT: v_writelane_b32 v27, s51, 9 +; SI-NEXT: v_writelane_b32 v27, s52, 10 +; SI-NEXT: v_writelane_b32 v27, s53, 11 +; SI-NEXT: v_writelane_b32 v27, s30, 12 +; SI-NEXT: v_writelane_b32 v27, s31, 13 ; SI-NEXT: v_readfirstlane_b32 s4, v26 -; SI-NEXT: v_readfirstlane_b32 s90, v25 -; SI-NEXT: v_readfirstlane_b32 s91, v24 -; SI-NEXT: v_readfirstlane_b32 s93, v23 -; SI-NEXT: v_readfirstlane_b32 s95, v22 -; SI-NEXT: v_readfirstlane_b32 s30, v21 -; SI-NEXT: v_readfirstlane_b32 s31, v20 -; SI-NEXT: v_readfirstlane_b32 s34, v19 -; SI-NEXT: v_readfirstlane_b32 s35, v18 -; SI-NEXT: v_readfirstlane_b32 s74, v17 -; SI-NEXT: v_readfirstlane_b32 s75, v16 -; SI-NEXT: v_readfirstlane_b32 s77, v15 -; SI-NEXT: v_readfirstlane_b32 s79, v14 -; SI-NEXT: v_readfirstlane_b32 s88, v13 -; SI-NEXT: v_readfirstlane_b32 s89, v12 -; SI-NEXT: v_readfirstlane_b32 s92, v11 -; SI-NEXT: v_readfirstlane_b32 s94, v10 -; SI-NEXT: v_readfirstlane_b32 s60, v9 -; SI-NEXT: v_readfirstlane_b32 s61, v8 -; SI-NEXT: v_readfirstlane_b32 s62, v7 -; SI-NEXT: v_readfirstlane_b32 s63, v6 -; SI-NEXT: v_readfirstlane_b32 s72, v5 -; SI-NEXT: v_readfirstlane_b32 s73, v4 -; SI-NEXT: v_readfirstlane_b32 s76, v3 -; SI-NEXT: v_readfirstlane_b32 s78, v2 -; SI-NEXT: v_readfirstlane_b32 s58, v1 +; SI-NEXT: v_readfirstlane_b32 s34, v25 +; SI-NEXT: v_readfirstlane_b32 s35, v24 +; SI-NEXT: v_readfirstlane_b32 s37, v23 +; SI-NEXT: v_readfirstlane_b32 s39, v22 +; SI-NEXT: v_readfirstlane_b32 s48, v21 +; SI-NEXT: v_readfirstlane_b32 s49, v20 +; SI-NEXT: v_readfirstlane_b32 s50, v19 +; SI-NEXT: v_readfirstlane_b32 s51, v18 +; SI-NEXT: v_readfirstlane_b32 s90, v17 +; SI-NEXT: v_readfirstlane_b32 s91, v16 +; SI-NEXT: v_readfirstlane_b32 s93, v15 +; SI-NEXT: v_readfirstlane_b32 s95, v14 +; SI-NEXT: v_readfirstlane_b32 s30, v13 +; SI-NEXT: v_readfirstlane_b32 s31, v12 +; SI-NEXT: v_readfirstlane_b32 s36, v11 +; SI-NEXT: v_readfirstlane_b32 s38, v10 +; SI-NEXT: v_readfirstlane_b32 s76, v9 +; SI-NEXT: v_readfirstlane_b32 s77, v8 +; SI-NEXT: v_readfirstlane_b32 s78, v7 +; SI-NEXT: v_readfirstlane_b32 s79, v6 +; SI-NEXT: v_readfirstlane_b32 s88, v5 +; SI-NEXT: v_readfirstlane_b32 s89, v4 +; SI-NEXT: v_readfirstlane_b32 s92, v3 +; SI-NEXT: v_readfirstlane_b32 s94, v2 +; SI-NEXT: v_readfirstlane_b32 s74, v1 ; SI-NEXT: s_cmp_lg_u32 s4, 0 -; SI-NEXT: v_readfirstlane_b32 s59, v0 +; SI-NEXT: v_readfirstlane_b32 s75, v0 ; SI-NEXT: s_cbranch_scc0 .LBB51_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 -; SI-NEXT: s_or_b32 s8, s4, s5 -; SI-NEXT: s_and_b32 s4, s18, 0xff -; SI-NEXT: s_lshl_b32 s4, s4, 16 -; SI-NEXT: s_lshl_b32 s5, s19, 24 -; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s18, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s6, s19, 24 +; SI-NEXT: s_or_b32 s56, s6, s5 ; SI-NEXT: s_and_b32 s5, s24, 0xff ; SI-NEXT: s_lshl_b32 s6, s25, 8 -; SI-NEXT: s_or_b32 s9, s5, s6 -; SI-NEXT: s_and_b32 s5, s26, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s6, s27, 24 -; SI-NEXT: s_or_b32 s6, s6, s5 -; SI-NEXT: s_and_b32 s5, s78, 0xff -; SI-NEXT: s_lshl_b32 s7, s76, 8 -; SI-NEXT: s_or_b32 s10, s5, s7 -; SI-NEXT: s_and_b32 s5, s73, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s72, 24 -; SI-NEXT: s_or_b32 s42, s7, s5 -; SI-NEXT: s_and_b32 s5, s94, 0xff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_and_b32 s6, s26, 0xff +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_lshl_b32 s7, s27, 24 +; SI-NEXT: s_or_b32 s58, s7, s6 +; SI-NEXT: s_and_b32 s6, s94, 0xff ; SI-NEXT: s_lshl_b32 s7, s92, 8 -; SI-NEXT: s_or_b32 s11, s5, s7 -; SI-NEXT: s_and_b32 s5, s89, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s88, 24 -; SI-NEXT: s_or_b32 s44, s7, s5 -; SI-NEXT: s_and_b32 s5, s35, 0xff -; SI-NEXT: s_lshl_b32 s7, s34, 8 -; SI-NEXT: s_or_b32 s12, s5, s7 -; SI-NEXT: s_and_b32 s5, s20, 0xff -; SI-NEXT: s_lshl_b32 s7, s21, 8 -; SI-NEXT: s_or_b32 s5, s5, s7 -; SI-NEXT: s_and_b32 s7, s22, 0xff +; SI-NEXT: s_or_b32 s6, s6, s7 +; SI-NEXT: s_and_b32 s7, s89, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_lshl_b32 s13, s23, 24 -; SI-NEXT: s_or_b32 s56, s13, s7 -; SI-NEXT: s_and_b32 s7, s28, 0xff -; SI-NEXT: s_lshl_b32 s13, s29, 8 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s59, 0xff -; SI-NEXT: s_lshl_b32 s13, s13, 16 -; SI-NEXT: s_lshl_b32 s14, s58, 24 -; SI-NEXT: s_or_b32 s57, s14, s13 -; SI-NEXT: s_and_b32 s13, s63, 0xff -; SI-NEXT: s_lshl_b32 s14, s62, 8 -; SI-NEXT: s_or_b32 s13, s13, s14 -; SI-NEXT: s_and_b32 s14, s61, 0xff -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: s_lshl_b32 s15, s60, 24 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_or_b32 vcc_lo, s15, s14 -; SI-NEXT: s_or_b32 s43, s13, vcc_lo -; SI-NEXT: s_and_b32 s13, s79, 0xff -; SI-NEXT: s_lshl_b32 s14, s77, 8 -; SI-NEXT: s_or_b32 s13, s13, s14 -; SI-NEXT: s_and_b32 s14, s75, 0xff -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: s_lshl_b32 s15, s74, 24 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_or_b32 vcc_hi, s15, s14 -; SI-NEXT: s_or_b32 s45, s13, vcc_hi -; SI-NEXT: s_and_b32 s13, s95, 0xff -; SI-NEXT: s_lshl_b32 s14, s93, 8 -; SI-NEXT: s_or_b32 s13, s13, s14 -; SI-NEXT: s_and_b32 s14, s91, 0xff -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: s_lshl_b32 s15, s90, 24 -; SI-NEXT: s_or_b32 s36, s15, s14 -; SI-NEXT: s_and_b32 s14, s31, 0xff -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: s_lshl_b32 s15, s30, 24 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_or_b32 s5, s5, s56 -; SI-NEXT: s_or_b32 s7, s7, s57 -; SI-NEXT: s_or_b32 s46, s15, s14 -; SI-NEXT: s_or_b32 s47, s13, s36 -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_and_b32 s37, s10, 0xffff -; SI-NEXT: s_and_b32 s38, s11, 0xffff -; SI-NEXT: s_and_b32 s39, s12, 0xffff -; SI-NEXT: s_or_b32 s12, s8, s4 -; SI-NEXT: s_mov_b32 s13, s5 -; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16 -; SI-NEXT: s_or_b32 s10, s9, s6 -; SI-NEXT: s_mov_b32 s11, s7 -; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16 -; SI-NEXT: s_or_b32 s8, s37, s42 -; SI-NEXT: s_mov_b32 s9, s43 -; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 16 -; SI-NEXT: s_or_b32 s6, s38, s44 -; SI-NEXT: s_mov_b32 s7, s45 -; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16 -; SI-NEXT: s_or_b32 s4, s39, s46 -; SI-NEXT: s_mov_b32 s5, s47 -; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16 -; SI-NEXT: s_lshr_b32 s41, s56, 16 -; SI-NEXT: s_lshr_b32 s43, s57, 16 -; SI-NEXT: s_lshr_b32 s45, vcc_lo, 16 -; SI-NEXT: s_lshr_b32 s47, vcc_hi, 16 -; SI-NEXT: s_lshr_b32 s15, s36, 16 +; SI-NEXT: s_lshl_b32 s8, s88, 24 +; SI-NEXT: s_or_b32 s60, s8, s7 +; SI-NEXT: s_and_b32 s7, s38, 0xff +; SI-NEXT: s_lshl_b32 s8, s36, 8 +; SI-NEXT: s_or_b32 s7, s7, s8 +; SI-NEXT: s_and_b32 s8, s31, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s9, s30, 24 +; SI-NEXT: s_or_b32 s62, s9, s8 +; SI-NEXT: s_and_b32 s8, s51, 0xff +; SI-NEXT: s_lshl_b32 s9, s50, 8 +; SI-NEXT: s_or_b32 s9, s8, s9 +; SI-NEXT: s_and_b32 s8, s49, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s48, 24 +; SI-NEXT: s_or_b32 s72, s10, s8 +; SI-NEXT: s_and_b32 s8, s20, 0xff +; SI-NEXT: s_lshl_b32 s10, s21, 8 +; SI-NEXT: s_or_b32 s11, s8, s10 +; SI-NEXT: s_and_b32 s8, s22, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s23, 24 +; SI-NEXT: s_or_b32 s13, s10, s8 +; SI-NEXT: s_and_b32 s8, s28, 0xff +; SI-NEXT: s_lshl_b32 s10, s29, 8 +; SI-NEXT: s_or_b32 s40, s8, s10 +; SI-NEXT: s_and_b32 s8, s75, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s74, 24 +; SI-NEXT: s_or_b32 vcc_lo, s10, s8 +; SI-NEXT: s_and_b32 s8, s79, 0xff +; SI-NEXT: s_lshl_b32 s10, s78, 8 +; SI-NEXT: s_or_b32 s42, s8, s10 +; SI-NEXT: s_and_b32 s8, s77, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s76, 24 +; SI-NEXT: s_or_b32 vcc_hi, s10, s8 +; SI-NEXT: s_and_b32 s8, s95, 0xff +; SI-NEXT: s_lshl_b32 s10, s93, 8 +; SI-NEXT: s_or_b32 s44, s8, s10 +; SI-NEXT: s_and_b32 s8, s91, 0xff +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s90, 24 +; SI-NEXT: s_or_b32 s12, s4, s56 +; SI-NEXT: s_and_b32 s4, s5, 0xffff +; SI-NEXT: s_and_b32 s5, s11, 0xffff +; SI-NEXT: s_or_b32 s52, s10, s8 +; SI-NEXT: s_and_b32 s8, s39, 0xff +; SI-NEXT: s_lshl_b32 s10, s37, 8 +; SI-NEXT: s_or_b32 s57, s5, s13 +; SI-NEXT: s_and_b32 s5, s40, 0xffff +; SI-NEXT: s_or_b32 s46, s8, s10 +; SI-NEXT: s_and_b32 s8, s35, 0xff +; SI-NEXT: s_or_b32 s59, s5, vcc_lo +; SI-NEXT: s_and_b32 s5, s42, 0xffff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s34, 24 +; SI-NEXT: s_or_b32 s61, s5, vcc_hi +; SI-NEXT: s_and_b32 s5, s44, 0xffff +; SI-NEXT: s_or_b32 s53, s10, s8 +; SI-NEXT: s_or_b32 s10, s4, s58 +; SI-NEXT: s_and_b32 s4, s6, 0xffff +; SI-NEXT: s_or_b32 s63, s5, s52 +; SI-NEXT: s_and_b32 s5, s46, 0xffff +; SI-NEXT: s_or_b32 s8, s4, s60 +; SI-NEXT: s_and_b32 s4, s7, 0xffff +; SI-NEXT: s_or_b32 s73, s5, s53 +; SI-NEXT: s_or_b32 s6, s4, s62 +; SI-NEXT: s_and_b32 s4, s9, 0xffff +; SI-NEXT: s_lshr_b64 s[14:15], s[56:57], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[58:59], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[60:61], 16 +; SI-NEXT: s_lshr_b64 s[44:45], s[62:63], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[72:73], 16 +; SI-NEXT: s_or_b32 s4, s4, s72 +; SI-NEXT: s_lshr_b32 s41, s13, 16 +; SI-NEXT: s_lshr_b32 s43, vcc_lo, 16 +; SI-NEXT: s_lshr_b32 s45, vcc_hi, 16 +; SI-NEXT: s_lshr_b32 s47, s52, 16 +; SI-NEXT: s_lshr_b32 s15, s53, 16 +; SI-NEXT: s_mov_b32 s13, s57 +; SI-NEXT: s_mov_b32 s11, s59 +; SI-NEXT: s_mov_b32 s9, s61 +; SI-NEXT: s_mov_b32 s7, s63 +; SI-NEXT: s_mov_b32 s5, s73 ; SI-NEXT: s_cbranch_execnz .LBB51_3 ; SI-NEXT: .LBB51_2: ; %cmp.true -; SI-NEXT: s_add_i32 s35, s35, 3 -; SI-NEXT: s_and_b32 s4, s35, 0xff -; SI-NEXT: s_lshl_b32 s5, s34, 8 -; SI-NEXT: s_add_i32 s31, s31, 3 +; SI-NEXT: s_add_i32 s51, s51, 3 +; SI-NEXT: s_and_b32 s4, s51, 0xff +; SI-NEXT: s_lshl_b32 s5, s50, 8 +; SI-NEXT: s_add_i32 s49, s49, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s6, s31, 0xff +; SI-NEXT: s_and_b32 s6, s49, 0xff ; SI-NEXT: s_addk_i32 s4, 0x300 -; SI-NEXT: s_lshl_b32 s5, s30, 24 +; SI-NEXT: s_lshl_b32 s5, s48, 24 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s5, s6 -; SI-NEXT: s_add_i32 s95, s95, 3 +; SI-NEXT: s_add_i32 s39, s39, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s95, 0xff -; SI-NEXT: s_lshl_b32 s6, s93, 8 -; SI-NEXT: s_add_i32 s91, s91, 3 +; SI-NEXT: s_and_b32 s5, s39, 0xff +; SI-NEXT: s_lshl_b32 s6, s37, 8 +; SI-NEXT: s_add_i32 s35, s35, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s7, s91, 0xff +; SI-NEXT: s_and_b32 s7, s35, 0xff ; SI-NEXT: s_addk_i32 s5, 0x300 -; SI-NEXT: s_lshl_b32 s6, s90, 24 +; SI-NEXT: s_lshl_b32 s6, s34, 24 ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_and_b32 s5, s5, 0xffff ; SI-NEXT: s_or_b32 s6, s6, s7 -; SI-NEXT: s_add_i32 s94, s94, 3 +; SI-NEXT: s_add_i32 s38, s38, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s94, 0xff -; SI-NEXT: s_lshl_b32 s7, s92, 8 -; SI-NEXT: s_add_i32 s89, s89, 3 +; SI-NEXT: s_and_b32 s6, s38, 0xff +; SI-NEXT: s_lshl_b32 s7, s36, 8 +; SI-NEXT: s_add_i32 s31, s31, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s8, s89, 0xff +; SI-NEXT: s_and_b32 s8, s31, 0xff ; SI-NEXT: s_addk_i32 s6, 0x300 -; SI-NEXT: s_lshl_b32 s7, s88, 24 +; SI-NEXT: s_lshl_b32 s7, s30, 24 ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_and_b32 s6, s6, 0xffff ; SI-NEXT: s_or_b32 s7, s7, s8 -; SI-NEXT: s_add_i32 s79, s79, 3 +; SI-NEXT: s_add_i32 s95, s95, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s79, 0xff -; SI-NEXT: s_lshl_b32 s8, s77, 8 -; SI-NEXT: s_add_i32 s75, s75, 3 +; SI-NEXT: s_and_b32 s7, s95, 0xff +; SI-NEXT: s_lshl_b32 s8, s93, 8 +; SI-NEXT: s_add_i32 s91, s91, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s9, s75, 0xff +; SI-NEXT: s_and_b32 s9, s91, 0xff ; SI-NEXT: s_addk_i32 s7, 0x300 -; SI-NEXT: s_lshl_b32 s8, s74, 24 +; SI-NEXT: s_lshl_b32 s8, s90, 24 ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_and_b32 s7, s7, 0xffff ; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_add_i32 s78, s78, 3 +; SI-NEXT: s_add_i32 s94, s94, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s78, 0xff -; SI-NEXT: s_lshl_b32 s9, s76, 8 -; SI-NEXT: s_add_i32 s73, s73, 3 +; SI-NEXT: s_and_b32 s8, s94, 0xff +; SI-NEXT: s_lshl_b32 s9, s92, 8 +; SI-NEXT: s_add_i32 s89, s89, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s10, s73, 0xff +; SI-NEXT: s_and_b32 s10, s89, 0xff ; SI-NEXT: s_addk_i32 s8, 0x300 -; SI-NEXT: s_lshl_b32 s9, s72, 24 +; SI-NEXT: s_lshl_b32 s9, s88, 24 ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_and_b32 s8, s8, 0xffff ; SI-NEXT: s_or_b32 s9, s9, s10 -; SI-NEXT: s_add_i32 s63, s63, 3 +; SI-NEXT: s_add_i32 s79, s79, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s63, 0xff -; SI-NEXT: s_lshl_b32 s10, s62, 8 -; SI-NEXT: s_add_i32 s61, s61, 3 +; SI-NEXT: s_and_b32 s9, s79, 0xff +; SI-NEXT: s_lshl_b32 s10, s78, 8 +; SI-NEXT: s_add_i32 s77, s77, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s11, s61, 0xff +; SI-NEXT: s_and_b32 s11, s77, 0xff ; SI-NEXT: s_addk_i32 s9, 0x300 -; SI-NEXT: s_lshl_b32 s10, s60, 24 +; SI-NEXT: s_lshl_b32 s10, s76, 24 ; SI-NEXT: s_lshl_b32 s11, s11, 16 ; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_or_b32 s10, s10, s11 @@ -18658,11 +18664,11 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_or_b32 s10, s11, s10 ; SI-NEXT: s_and_b32 s11, s28, 0xff ; SI-NEXT: s_lshl_b32 s12, s29, 8 -; SI-NEXT: s_add_i32 s59, s59, 3 +; SI-NEXT: s_add_i32 s75, s75, 3 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s13, s59, 0xff +; SI-NEXT: s_and_b32 s13, s75, 0xff ; SI-NEXT: s_addk_i32 s11, 0x300 -; SI-NEXT: s_lshl_b32 s12, s58, 24 +; SI-NEXT: s_lshl_b32 s12, s74, 24 ; SI-NEXT: s_lshl_b32 s13, s13, 16 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_or_b32 s12, s12, s13 @@ -18742,7 +18748,7 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s5, s5, 0xffff ; SI-NEXT: s_lshl_b32 s14, s15, 16 ; SI-NEXT: s_or_b32 s5, s5, s14 -; SI-NEXT: v_readlane_b32 s30, v27, 6 +; SI-NEXT: v_readlane_b32 s30, v27, 12 ; SI-NEXT: v_mov_b32_e32 v0, s12 ; SI-NEXT: v_mov_b32_e32 v1, s13 ; SI-NEXT: v_mov_b32_e32 v2, s10 @@ -18753,7 +18759,13 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: v_mov_b32_e32 v7, s7 ; SI-NEXT: v_mov_b32_e32 v8, s4 ; SI-NEXT: v_mov_b32_e32 v9, s5 -; SI-NEXT: v_readlane_b32 s31, v27, 7 +; SI-NEXT: v_readlane_b32 s31, v27, 13 +; SI-NEXT: v_readlane_b32 s53, v27, 11 +; SI-NEXT: v_readlane_b32 s52, v27, 10 +; SI-NEXT: v_readlane_b32 s51, v27, 9 +; SI-NEXT: v_readlane_b32 s50, v27, 8 +; SI-NEXT: v_readlane_b32 s49, v27, 7 +; SI-NEXT: v_readlane_b32 s48, v27, 6 ; SI-NEXT: v_readlane_b32 s39, v27, 5 ; SI-NEXT: v_readlane_b32 s38, v27, 4 ; SI-NEXT: v_readlane_b32 s37, v27, 3 @@ -18882,96 +18894,96 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32 ; VI-NEXT: s_add_i32 s63, s63, 3 ; VI-NEXT: v_mov_b32_e32 v0, s62 ; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; VI-NEXT: v_perm_b32 v6, s63, v0, v1 +; VI-NEXT: v_perm_b32 v0, s63, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v0 ; VI-NEXT: s_add_i32 s61, s61, 3 ; VI-NEXT: v_mov_b32_e32 v0, s59 -; VI-NEXT: v_perm_b32 v7, s61, v0, v1 +; VI-NEXT: v_perm_b32 v0, s61, v0, v1 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s60, s60, 3 ; VI-NEXT: v_mov_b32_e32 v0, s57 -; VI-NEXT: v_perm_b32 v8, s60, v0, v1 +; VI-NEXT: v_perm_b32 v0, s60, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v0 ; VI-NEXT: s_add_i32 s58, s58, 3 ; VI-NEXT: v_mov_b32_e32 v0, s47 -; VI-NEXT: v_perm_b32 v9, s58, v0, v1 +; VI-NEXT: v_perm_b32 v0, s58, v0, v1 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s56, s56, 3 ; VI-NEXT: v_mov_b32_e32 v0, s45 -; VI-NEXT: v_perm_b32 v10, s56, v0, v1 +; VI-NEXT: v_perm_b32 v0, s56, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v0 ; VI-NEXT: s_add_i32 s46, s46, 3 ; VI-NEXT: v_mov_b32_e32 v0, s43 -; VI-NEXT: v_perm_b32 v11, s46, v0, v1 +; VI-NEXT: v_perm_b32 v0, s46, v0, v1 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s44, s44, 3 ; VI-NEXT: v_mov_b32_e32 v0, s41 -; VI-NEXT: v_perm_b32 v12, s44, v0, v1 +; VI-NEXT: v_perm_b32 v0, s44, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v0 ; VI-NEXT: s_add_i32 s42, s42, 3 ; VI-NEXT: v_mov_b32_e32 v0, s15 -; VI-NEXT: v_perm_b32 v13, s42, v0, v1 +; VI-NEXT: v_perm_b32 v0, s42, v0, v1 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s40, s40, 3 ; VI-NEXT: v_mov_b32_e32 v0, s13 -; VI-NEXT: v_perm_b32 v5, s40, v0, v1 +; VI-NEXT: v_perm_b32 v0, s40, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v0 ; VI-NEXT: s_add_i32 s14, s14, 3 ; VI-NEXT: v_mov_b32_e32 v0, s11 -; VI-NEXT: v_perm_b32 v14, s14, v0, v1 +; VI-NEXT: v_perm_b32 v0, s14, v0, v1 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s12, s12, 3 ; VI-NEXT: v_mov_b32_e32 v0, s8 -; VI-NEXT: v_perm_b32 v4, s12, v0, v1 +; VI-NEXT: v_perm_b32 v0, s12, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v0 ; VI-NEXT: s_add_i32 s9, s9, 3 ; VI-NEXT: v_mov_b32_e32 v0, s7 -; VI-NEXT: v_perm_b32 v15, s9, v0, v1 +; VI-NEXT: v_perm_b32 v0, s9, v0, v1 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s10, s10, 3 ; VI-NEXT: v_mov_b32_e32 v0, s6 -; VI-NEXT: v_perm_b32 v3, s10, v0, v1 +; VI-NEXT: v_perm_b32 v0, s10, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v0 ; VI-NEXT: s_add_i32 s28, s28, 3 ; VI-NEXT: v_mov_b32_e32 v0, s29 -; VI-NEXT: v_perm_b32 v16, s28, v0, v1 +; VI-NEXT: v_perm_b32 v0, s28, v0, v1 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s26, s26, 3 ; VI-NEXT: v_mov_b32_e32 v0, s27 -; VI-NEXT: v_perm_b32 v2, s26, v0, v1 +; VI-NEXT: v_perm_b32 v0, s26, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v0 ; VI-NEXT: s_add_i32 s24, s24, 3 ; VI-NEXT: v_mov_b32_e32 v0, s25 -; VI-NEXT: v_perm_b32 v17, s24, v0, v1 +; VI-NEXT: v_perm_b32 v0, s24, v0, v1 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s22, s22, 3 ; VI-NEXT: v_mov_b32_e32 v0, s23 +; VI-NEXT: v_perm_b32 v0, s22, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v0 ; VI-NEXT: s_add_i32 s20, s20, 3 -; VI-NEXT: v_mov_b32_e32 v18, s21 +; VI-NEXT: v_mov_b32_e32 v0, s21 +; VI-NEXT: v_perm_b32 v0, s20, v0, v1 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: v_mov_b32_e32 v19, s19 +; VI-NEXT: v_mov_b32_e32 v0, s19 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v20, s17 -; VI-NEXT: v_perm_b32 v0, s22, v0, v1 -; VI-NEXT: v_perm_b32 v18, s20, v18, v1 -; VI-NEXT: v_perm_b32 v19, s18, v19, v1 +; VI-NEXT: v_perm_b32 v0, s18, v0, v1 ; VI-NEXT: v_perm_b32 v1, s16, v20, v1 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 ; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18 -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16 -; VI-NEXT: v_or_b32_sdwa v4, v4, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v5, v5, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v6 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v7 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v10 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v11 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v12 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v13 -; VI-NEXT: v_or_b32_sdwa v1, v19, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v18, v0, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v1, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_or_b32_sdwa v2, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_or_b32_sdwa v3, v3, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v6, v6, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v7, v7, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v8, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v9, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v1 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v18 +; VI-NEXT: v_or_b32_sdwa v4, v4, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v5, v5, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v6, v6, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v7, v7, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v8, v8, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v9, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x3000000, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x3000000, v4 @@ -18994,29 +19006,29 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32 ; GFX9-NEXT: v_readfirstlane_b32 s59, v24 ; GFX9-NEXT: v_readfirstlane_b32 s62, v23 ; GFX9-NEXT: v_readfirstlane_b32 s63, v22 -; GFX9-NEXT: v_readfirstlane_b32 s46, v21 +; GFX9-NEXT: v_readfirstlane_b32 s45, v21 ; GFX9-NEXT: v_readfirstlane_b32 s47, v20 ; GFX9-NEXT: v_readfirstlane_b32 s60, v19 ; GFX9-NEXT: v_readfirstlane_b32 s61, v18 -; GFX9-NEXT: v_readfirstlane_b32 s7, v17 -; GFX9-NEXT: v_readfirstlane_b32 s45, v16 +; GFX9-NEXT: v_readfirstlane_b32 s41, v17 +; GFX9-NEXT: v_readfirstlane_b32 s43, v16 ; GFX9-NEXT: v_readfirstlane_b32 s56, v15 ; GFX9-NEXT: v_readfirstlane_b32 s58, v14 -; GFX9-NEXT: v_readfirstlane_b32 s6, v13 -; GFX9-NEXT: v_readfirstlane_b32 s8, v12 -; GFX9-NEXT: v_readfirstlane_b32 s9, v11 -; GFX9-NEXT: v_readfirstlane_b32 s10, v10 -; GFX9-NEXT: v_readfirstlane_b32 s11, v9 -; GFX9-NEXT: v_readfirstlane_b32 s12, v8 -; GFX9-NEXT: v_readfirstlane_b32 s13, v7 -; GFX9-NEXT: v_readfirstlane_b32 s44, v6 -; GFX9-NEXT: v_readfirstlane_b32 s14, v5 -; GFX9-NEXT: v_readfirstlane_b32 s15, v4 -; GFX9-NEXT: v_readfirstlane_b32 s40, v3 -; GFX9-NEXT: v_readfirstlane_b32 s43, v2 -; GFX9-NEXT: v_readfirstlane_b32 s41, v1 +; GFX9-NEXT: v_readfirstlane_b32 s13, v13 +; GFX9-NEXT: v_readfirstlane_b32 s15, v12 +; GFX9-NEXT: v_readfirstlane_b32 s44, v11 +; GFX9-NEXT: v_readfirstlane_b32 s46, v10 +; GFX9-NEXT: v_readfirstlane_b32 s10, v9 +; GFX9-NEXT: v_readfirstlane_b32 s11, v8 +; GFX9-NEXT: v_readfirstlane_b32 s40, v7 +; GFX9-NEXT: v_readfirstlane_b32 s42, v6 +; GFX9-NEXT: v_readfirstlane_b32 s7, v5 +; GFX9-NEXT: v_readfirstlane_b32 s9, v4 +; GFX9-NEXT: v_readfirstlane_b32 s12, v3 +; GFX9-NEXT: v_readfirstlane_b32 s14, v2 +; GFX9-NEXT: v_readfirstlane_b32 s6, v1 ; GFX9-NEXT: s_cmp_lg_u32 s4, 0 -; GFX9-NEXT: v_readfirstlane_b32 s42, v0 +; GFX9-NEXT: v_readfirstlane_b32 s8, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB51_4 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v0, s17 @@ -19040,38 +19052,38 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 ; GFX9-NEXT: v_perm_b32 v3, s28, v3, v8 -; GFX9-NEXT: v_mov_b32_e32 v4, s41 -; GFX9-NEXT: v_perm_b32 v4, s42, v4, v8 +; GFX9-NEXT: v_mov_b32_e32 v4, s6 +; GFX9-NEXT: v_perm_b32 v4, s8, v4, v8 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 -; GFX9-NEXT: v_mov_b32_e32 v4, s40 -; GFX9-NEXT: v_perm_b32 v4, s43, v4, v8 -; GFX9-NEXT: v_mov_b32_e32 v5, s14 -; GFX9-NEXT: v_perm_b32 v5, s15, v5, v8 +; GFX9-NEXT: v_mov_b32_e32 v4, s12 +; GFX9-NEXT: v_perm_b32 v4, s14, v4, v8 +; GFX9-NEXT: v_mov_b32_e32 v5, s7 +; GFX9-NEXT: v_perm_b32 v5, s9, v5, v8 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: v_mov_b32_e32 v5, s13 -; GFX9-NEXT: v_perm_b32 v5, s44, v5, v8 -; GFX9-NEXT: v_mov_b32_e32 v6, s11 -; GFX9-NEXT: v_perm_b32 v6, s12, v6, v8 +; GFX9-NEXT: v_mov_b32_e32 v5, s40 +; GFX9-NEXT: v_perm_b32 v5, s42, v5, v8 +; GFX9-NEXT: v_mov_b32_e32 v6, s10 +; GFX9-NEXT: v_perm_b32 v6, s11, v6, v8 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: v_mov_b32_e32 v6, s9 -; GFX9-NEXT: v_perm_b32 v6, s10, v6, v8 -; GFX9-NEXT: v_mov_b32_e32 v7, s6 -; GFX9-NEXT: v_perm_b32 v7, s8, v7, v8 +; GFX9-NEXT: v_mov_b32_e32 v6, s44 +; GFX9-NEXT: v_perm_b32 v6, s46, v6, v8 +; GFX9-NEXT: v_mov_b32_e32 v7, s13 +; GFX9-NEXT: v_perm_b32 v7, s15, v7, v8 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 ; GFX9-NEXT: v_mov_b32_e32 v7, s56 ; GFX9-NEXT: v_perm_b32 v7, s58, v7, v8 -; GFX9-NEXT: v_mov_b32_e32 v9, s7 +; GFX9-NEXT: v_mov_b32_e32 v9, s41 ; GFX9-NEXT: s_and_b32 s4, s61, 0xff ; GFX9-NEXT: s_lshl_b32 s5, s60, 8 -; GFX9-NEXT: v_perm_b32 v9, s45, v9, v8 +; GFX9-NEXT: v_perm_b32 v9, s43, v9, v8 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; GFX9-NEXT: s_or_b32 s4, s4, s5 ; GFX9-NEXT: s_and_b32 s5, s47, 0xff -; GFX9-NEXT: s_lshl_b32 s72, s46, 8 +; GFX9-NEXT: s_lshl_b32 s72, s45, 8 ; GFX9-NEXT: v_lshl_or_b32 v7, v9, 16, v7 ; GFX9-NEXT: s_or_b32 s5, s5, s72 ; GFX9-NEXT: v_mov_b32_e32 v9, s62 @@ -19087,105 +19099,105 @@ define inreg <20 x i16> @bitcast_v40i8_to_v20i16_scalar(<40 x i8> inreg %a, i32 ; GFX9-NEXT: .LBB51_2: ; %cmp.true ; GFX9-NEXT: s_add_i32 s63, s63, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s62 -; GFX9-NEXT: v_mov_b32_e32 v6, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v7, s63, v0, v6 +; GFX9-NEXT: v_mov_b32_e32 v1, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v0, s63, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v0 ; GFX9-NEXT: s_add_i32 s59, s59, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s57 -; GFX9-NEXT: v_perm_b32 v8, s59, v0, v6 +; GFX9-NEXT: v_perm_b32 v0, s59, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v0 ; GFX9-NEXT: s_add_i32 s61, s61, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s60 -; GFX9-NEXT: v_perm_b32 v9, s61, v0, v6 +; GFX9-NEXT: v_perm_b32 v0, s61, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v0 ; GFX9-NEXT: s_add_i32 s47, s47, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s46 -; GFX9-NEXT: v_perm_b32 v10, s47, v0, v6 +; GFX9-NEXT: v_mov_b32_e32 v0, s45 +; GFX9-NEXT: v_perm_b32 v0, s47, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v0 ; GFX9-NEXT: s_add_i32 s58, s58, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s56 -; GFX9-NEXT: v_perm_b32 v11, s58, v0, v6 +; GFX9-NEXT: v_perm_b32 v0, s58, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v0 +; GFX9-NEXT: s_add_i32 s43, s43, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s41 +; GFX9-NEXT: v_perm_b32 v0, s43, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0 +; GFX9-NEXT: s_add_i32 s46, s46, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s44 +; GFX9-NEXT: v_perm_b32 v0, s46, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v0 +; GFX9-NEXT: s_add_i32 s15, s15, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s13 +; GFX9-NEXT: v_perm_b32 v0, s15, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0 +; GFX9-NEXT: s_add_i32 s42, s42, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s40 +; GFX9-NEXT: v_perm_b32 v0, s42, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v0 +; GFX9-NEXT: s_add_i32 s11, s11, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s10 +; GFX9-NEXT: v_perm_b32 v0, s11, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0 +; GFX9-NEXT: s_add_i32 s14, s14, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s12 +; GFX9-NEXT: v_perm_b32 v0, s14, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v0 +; GFX9-NEXT: s_add_i32 s9, s9, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s7 +; GFX9-NEXT: v_perm_b32 v0, s9, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0 +; GFX9-NEXT: s_add_i32 s28, s28, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s29 +; GFX9-NEXT: v_perm_b32 v0, s28, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v0 +; GFX9-NEXT: s_add_i32 s8, s8, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s6 +; GFX9-NEXT: v_perm_b32 v0, s8, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v0 +; GFX9-NEXT: s_add_i32 s24, s24, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s25 +; GFX9-NEXT: v_perm_b32 v0, s24, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v0 +; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s27 +; GFX9-NEXT: v_perm_b32 v0, s26, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v0 ; GFX9-NEXT: s_add_i32 s20, s20, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s21 -; GFX9-NEXT: v_perm_b32 v0, s20, v0, v6 -; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v0, s20, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0 ; GFX9-NEXT: s_add_i32 s22, s22, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s23 -; GFX9-NEXT: v_perm_b32 v0, s22, v0, v6 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v0, s22, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0 ; GFX9-NEXT: s_add_i32 s16, s16, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 -; GFX9-NEXT: v_perm_b32 v0, s16, v0, v6 +; GFX9-NEXT: v_perm_b32 v0, s16, v0, v1 ; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s19 +; GFX9-NEXT: v_mov_b32_e32 v20, s19 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_perm_b32 v3, s18, v3, v6 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: s_add_i32 s24, s24, 3 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_perm_b32 v1, s18, v20, v1 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 -; GFX9-NEXT: v_mov_b32_e32 v2, s25 -; GFX9-NEXT: v_lshl_or_b32 v0, v3, 16, v0 -; GFX9-NEXT: v_perm_b32 v2, s24, v2, v6 -; GFX9-NEXT: s_add_i32 s26, s26, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s27 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_perm_b32 v3, s26, v3, v6 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v18 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; GFX9-NEXT: s_add_i32 s28, s28, 3 -; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 -; GFX9-NEXT: v_mov_b32_e32 v3, s29 -; GFX9-NEXT: v_perm_b32 v3, s28, v3, v6 -; GFX9-NEXT: s_add_i32 s42, s42, 3 -; GFX9-NEXT: v_mov_b32_e32 v4, s41 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 -; GFX9-NEXT: v_perm_b32 v4, s42, v4, v6 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; GFX9-NEXT: s_add_i32 s43, s43, 3 -; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 -; GFX9-NEXT: v_mov_b32_e32 v4, s40 -; GFX9-NEXT: v_perm_b32 v4, s43, v4, v6 -; GFX9-NEXT: s_add_i32 s15, s15, 3 -; GFX9-NEXT: v_mov_b32_e32 v5, s14 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 -; GFX9-NEXT: v_perm_b32 v5, s15, v5, v6 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX9-NEXT: s_add_i32 s44, s44, 3 -; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: v_mov_b32_e32 v5, s13 -; GFX9-NEXT: v_perm_b32 v5, s44, v5, v6 -; GFX9-NEXT: s_add_i32 s12, s12, 3 -; GFX9-NEXT: v_mov_b32_e32 v12, s11 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 -; GFX9-NEXT: v_perm_b32 v12, s12, v12, v6 -; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: s_add_i32 s10, s10, 3 -; GFX9-NEXT: v_mov_b32_e32 v13, s9 -; GFX9-NEXT: s_add_i32 s45, s45, 3 -; GFX9-NEXT: v_lshl_or_b32 v5, v12, 16, v5 -; GFX9-NEXT: v_mov_b32_e32 v12, s7 -; GFX9-NEXT: v_perm_b32 v13, s10, v13, v6 -; GFX9-NEXT: s_add_i32 s8, s8, 3 -; GFX9-NEXT: v_mov_b32_e32 v14, s6 -; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v8 -; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v9 -; GFX9-NEXT: v_perm_b32 v12, s45, v12, v6 -; GFX9-NEXT: v_perm_b32 v6, s8, v14, v6 -; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v7 -; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v10 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v11 -; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v13 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v12 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8 -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v14 -; GFX9-NEXT: v_lshl_or_b32 v6, v6, 16, v11 -; GFX9-NEXT: v_lshl_or_b32 v7, v10, 16, v7 -; GFX9-NEXT: v_lshl_or_b32 v9, v15, 16, v9 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_lshl_or_b32 v1, v19, 16, v1 +; GFX9-NEXT: v_lshl_or_b32 v2, v17, 16, v2 +; GFX9-NEXT: v_lshl_or_b32 v3, v16, 16, v3 +; GFX9-NEXT: v_lshl_or_b32 v4, v15, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v14, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v13, 16, v6 +; GFX9-NEXT: v_lshl_or_b32 v7, v12, 16, v7 +; GFX9-NEXT: v_lshl_or_b32 v8, v11, 16, v8 +; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 ; GFX9-NEXT: .LBB51_3: ; %end ; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: .LBB51_4: @@ -20120,8 +20132,8 @@ define <20 x i16> @bitcast_v5f64_to_v20i16(<5 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 ; SI-NEXT: .LBB54_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -20256,7 +20268,7 @@ define inreg <20 x i16> @bitcast_v5f64_to_v20i16_scalar(<5 x double> inreg %a, i ; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v1 ; SI-NEXT: s_branch .LBB55_5 ; SI-NEXT: .LBB55_3: ; SI-NEXT: ; implicit-def: $sgpr12 @@ -20285,17 +20297,17 @@ define inreg <20 x i16> @bitcast_v5f64_to_v20i16_scalar(<5 x double> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v17, s29 ; SI-NEXT: v_mov_b32_e32 v18, s28 ; SI-NEXT: v_mov_b32_e32 v19, s27 -; SI-NEXT: v_mov_b32_e32 v20, s26 +; SI-NEXT: v_mov_b32_e32 v15, s26 ; SI-NEXT: v_mov_b32_e32 v14, s12 ; SI-NEXT: v_mov_b32_e32 v13, s10 ; SI-NEXT: v_mov_b32_e32 v12, s8 ; SI-NEXT: v_mov_b32_e32 v11, s6 ; SI-NEXT: v_mov_b32_e32 v10, s4 ; SI-NEXT: .LBB55_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 @@ -20304,7 +20316,7 @@ define inreg <20 x i16> @bitcast_v5f64_to_v20i16_scalar(<5 x double> inreg %a, i ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v0, v0, v14 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 ; SI-NEXT: v_or_b32_e32 v2, v2, v13 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v19 @@ -21776,9 +21788,9 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: ; implicit-def: $vgpr30 -; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB60_2 @@ -21963,10 +21975,10 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr20 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB60_2 @@ -22049,8 +22061,8 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 { ; GFX9-NEXT: .LBB60_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_perm_b32 v1, v1, v16, s4 +; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v15, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; GFX9-NEXT: v_perm_b32 v1, v2, v39, s4 @@ -22453,9 +22465,14 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 8 ; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 24 ; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 +; SI-NEXT: s_lshr_b64 s[60:61], s[6:7], 16 ; SI-NEXT: s_or_b32 s5, s5, s15 +; SI-NEXT: s_lshr_b64 s[72:73], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8 +; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24 +; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 8 ; SI-NEXT: s_lshr_b32 s43, s13, 8 ; SI-NEXT: s_lshr_b32 s41, s11, 8 ; SI-NEXT: s_lshr_b32 s29, s9, 8 @@ -22466,11 +22483,6 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; SI-NEXT: s_bfe_u32 s57, s94, 0x80008 ; SI-NEXT: s_bfe_u32 s59, s30, 0x80008 ; SI-NEXT: s_bfe_u32 s61, s34, 0x80008 -; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8 -; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24 -; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 8 ; SI-NEXT: s_cbranch_execnz .LBB61_4 ; SI-NEXT: .LBB61_2: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v2, s24 @@ -22581,9 +22593,9 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 8 ; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 24 ; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[72:73], s[8:9], 8 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24 -; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[6:7], 16 ; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8 ; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24 ; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 @@ -22613,23 +22625,23 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; SI-NEXT: ; implicit-def: $sgpr41 ; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr29 ; SI-NEXT: ; implicit-def: $sgpr57 ; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr27 ; SI-NEXT: ; implicit-def: $sgpr59 -; SI-NEXT: ; implicit-def: $sgpr15 -; SI-NEXT: ; implicit-def: $sgpr61 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr15 +; SI-NEXT: ; implicit-def: $sgpr61 ; SI-NEXT: s_branch .LBB61_2 ; SI-NEXT: .LBB61_4: ; SI-NEXT: v_mov_b32_e32 v1, s34 @@ -22688,7 +22700,7 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; SI-NEXT: v_or_b32_e32 v4, v7, v4 ; SI-NEXT: v_or_b32_e32 v4, s10, v4 ; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: s_lshl_b32 s10, s60, 8 +; SI-NEXT: s_lshl_b32 s10, s72, 8 ; SI-NEXT: s_or_b32 s8, s8, s10 ; SI-NEXT: s_and_b32 s10, s46, 0xff ; SI-NEXT: s_lshl_b32 s10, s10, 16 @@ -22714,7 +22726,7 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; SI-NEXT: s_and_b32 s6, s6, 0xff ; SI-NEXT: s_lshl_b32 s8, s76, 8 ; SI-NEXT: s_or_b32 s6, s6, s8 -; SI-NEXT: s_and_b32 s8, s72, 0xff +; SI-NEXT: s_and_b32 s8, s60, 0xff ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_lshl_b32 s9, s56, 24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff @@ -22819,10 +22831,10 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; VI-NEXT: s_lshr_b32 s4, s19, 16 ; VI-NEXT: v_or_b32_e32 v39, v14, v2 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v12 -; VI-NEXT: v_add_f16_e32 v21, s16, v1 +; VI-NEXT: v_add_f16_e32 v22, s16, v1 ; VI-NEXT: v_add_f16_e32 v8, s4, v1 ; VI-NEXT: s_lshr_b32 s4, s18, 16 -; VI-NEXT: v_or_b32_e32 v38, v21, v2 +; VI-NEXT: v_or_b32_e32 v38, v22, v2 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v8 ; VI-NEXT: v_add_f16_e32 v16, s19, v1 ; VI-NEXT: v_add_f16_e32 v13, s4, v1 @@ -22854,9 +22866,9 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; VI-NEXT: s_lshr_b32 s4, s24, 16 ; VI-NEXT: v_or_b32_e32 v30, v25, v2 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11 -; VI-NEXT: v_add_f16_e32 v22, s25, v1 +; VI-NEXT: v_add_f16_e32 v21, s25, v1 ; VI-NEXT: v_add_f16_e32 v19, s4, v1 -; VI-NEXT: v_or_b32_e32 v28, v22, v2 +; VI-NEXT: v_or_b32_e32 v28, v21, v2 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19 ; VI-NEXT: v_add_f16_e32 v26, s24, v1 ; VI-NEXT: v_or_b32_e32 v27, v26, v2 @@ -22924,7 +22936,7 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v10, s61 ; VI-NEXT: v_mov_b32_e32 v19, s60 ; VI-NEXT: v_mov_b32_e32 v11, s59 -; VI-NEXT: v_mov_b32_e32 v21, s16 +; VI-NEXT: v_mov_b32_e32 v22, s16 ; VI-NEXT: v_mov_b32_e32 v14, s17 ; VI-NEXT: v_mov_b32_e32 v23, s18 ; VI-NEXT: v_mov_b32_e32 v16, s19 @@ -22933,7 +22945,7 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v25, s22 ; VI-NEXT: v_mov_b32_e32 v20, s23 ; VI-NEXT: v_mov_b32_e32 v26, s24 -; VI-NEXT: v_mov_b32_e32 v22, s25 +; VI-NEXT: v_mov_b32_e32 v21, s25 ; VI-NEXT: v_mov_b32_e32 v27, s46 ; VI-NEXT: v_mov_b32_e32 v30, s47 ; VI-NEXT: v_mov_b32_e32 v32, s56 @@ -22957,9 +22969,9 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; VI-NEXT: .LBB61_5: ; %end ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 ; VI-NEXT: v_perm_b32 v5, v12, v5, s4 -; VI-NEXT: v_perm_b32 v12, v21, v48, s4 +; VI-NEXT: v_perm_b32 v22, v22, v48, s4 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_or_b32_e32 v5, v12, v5 +; VI-NEXT: v_or_b32_e32 v5, v22, v5 ; VI-NEXT: v_perm_b32 v7, v7, v38, s4 ; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen ; VI-NEXT: v_perm_b32 v5, v14, v39, s4 @@ -23010,7 +23022,7 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; VI-NEXT: v_perm_b32 v2, v11, v27, s4 -; VI-NEXT: v_perm_b32 v1, v22, v6, s4 +; VI-NEXT: v_perm_b32 v1, v21, v6, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0 @@ -23095,8 +23107,8 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v10 ; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v10 ; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v9 ; GFX9-NEXT: s_branch .LBB61_5 ; GFX9-NEXT: .LBB61_3: ; GFX9-NEXT: ; implicit-def: $sgpr76 @@ -23141,8 +23153,8 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v4, s23 ; GFX9-NEXT: v_mov_b32_e32 v1, s24 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 -; GFX9-NEXT: v_mov_b32_e32 v39, s76 -; GFX9-NEXT: v_mov_b32_e32 v48, s74 +; GFX9-NEXT: v_mov_b32_e32 v48, s76 +; GFX9-NEXT: v_mov_b32_e32 v39, s74 ; GFX9-NEXT: v_mov_b32_e32 v38, s75 ; GFX9-NEXT: v_mov_b32_e32 v36, s73 ; GFX9-NEXT: v_mov_b32_e32 v37, s72 @@ -23173,8 +23185,8 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v15, s4 ; GFX9-NEXT: .LBB61_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 -; GFX9-NEXT: v_perm_b32 v9, v9, v39, s4 +; GFX9-NEXT: v_perm_b32 v15, v39, v15, s4 +; GFX9-NEXT: v_perm_b32 v9, v9, v48, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v15 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen @@ -24774,213 +24786,219 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: v_writelane_b32 v27, s37, 3 ; SI-NEXT: v_writelane_b32 v27, s38, 4 ; SI-NEXT: v_writelane_b32 v27, s39, 5 -; SI-NEXT: v_writelane_b32 v27, s30, 6 -; SI-NEXT: v_writelane_b32 v27, s31, 7 +; SI-NEXT: v_writelane_b32 v27, s48, 6 +; SI-NEXT: v_writelane_b32 v27, s49, 7 +; SI-NEXT: v_writelane_b32 v27, s50, 8 +; SI-NEXT: v_writelane_b32 v27, s51, 9 +; SI-NEXT: v_writelane_b32 v27, s52, 10 +; SI-NEXT: v_writelane_b32 v27, s53, 11 +; SI-NEXT: v_writelane_b32 v27, s30, 12 +; SI-NEXT: v_writelane_b32 v27, s31, 13 ; SI-NEXT: v_readfirstlane_b32 s4, v26 -; SI-NEXT: v_readfirstlane_b32 s90, v25 -; SI-NEXT: v_readfirstlane_b32 s91, v24 -; SI-NEXT: v_readfirstlane_b32 s93, v23 -; SI-NEXT: v_readfirstlane_b32 s95, v22 -; SI-NEXT: v_readfirstlane_b32 s30, v21 -; SI-NEXT: v_readfirstlane_b32 s31, v20 -; SI-NEXT: v_readfirstlane_b32 s34, v19 -; SI-NEXT: v_readfirstlane_b32 s35, v18 -; SI-NEXT: v_readfirstlane_b32 s74, v17 -; SI-NEXT: v_readfirstlane_b32 s75, v16 -; SI-NEXT: v_readfirstlane_b32 s77, v15 -; SI-NEXT: v_readfirstlane_b32 s79, v14 -; SI-NEXT: v_readfirstlane_b32 s88, v13 -; SI-NEXT: v_readfirstlane_b32 s89, v12 -; SI-NEXT: v_readfirstlane_b32 s92, v11 -; SI-NEXT: v_readfirstlane_b32 s94, v10 -; SI-NEXT: v_readfirstlane_b32 s60, v9 -; SI-NEXT: v_readfirstlane_b32 s61, v8 -; SI-NEXT: v_readfirstlane_b32 s62, v7 -; SI-NEXT: v_readfirstlane_b32 s63, v6 -; SI-NEXT: v_readfirstlane_b32 s72, v5 -; SI-NEXT: v_readfirstlane_b32 s73, v4 -; SI-NEXT: v_readfirstlane_b32 s76, v3 -; SI-NEXT: v_readfirstlane_b32 s78, v2 -; SI-NEXT: v_readfirstlane_b32 s58, v1 +; SI-NEXT: v_readfirstlane_b32 s34, v25 +; SI-NEXT: v_readfirstlane_b32 s35, v24 +; SI-NEXT: v_readfirstlane_b32 s37, v23 +; SI-NEXT: v_readfirstlane_b32 s39, v22 +; SI-NEXT: v_readfirstlane_b32 s48, v21 +; SI-NEXT: v_readfirstlane_b32 s49, v20 +; SI-NEXT: v_readfirstlane_b32 s50, v19 +; SI-NEXT: v_readfirstlane_b32 s51, v18 +; SI-NEXT: v_readfirstlane_b32 s90, v17 +; SI-NEXT: v_readfirstlane_b32 s91, v16 +; SI-NEXT: v_readfirstlane_b32 s93, v15 +; SI-NEXT: v_readfirstlane_b32 s95, v14 +; SI-NEXT: v_readfirstlane_b32 s30, v13 +; SI-NEXT: v_readfirstlane_b32 s31, v12 +; SI-NEXT: v_readfirstlane_b32 s36, v11 +; SI-NEXT: v_readfirstlane_b32 s38, v10 +; SI-NEXT: v_readfirstlane_b32 s76, v9 +; SI-NEXT: v_readfirstlane_b32 s77, v8 +; SI-NEXT: v_readfirstlane_b32 s78, v7 +; SI-NEXT: v_readfirstlane_b32 s79, v6 +; SI-NEXT: v_readfirstlane_b32 s88, v5 +; SI-NEXT: v_readfirstlane_b32 s89, v4 +; SI-NEXT: v_readfirstlane_b32 s92, v3 +; SI-NEXT: v_readfirstlane_b32 s94, v2 +; SI-NEXT: v_readfirstlane_b32 s74, v1 ; SI-NEXT: s_cmp_lg_u32 s4, 0 -; SI-NEXT: v_readfirstlane_b32 s59, v0 +; SI-NEXT: v_readfirstlane_b32 s75, v0 ; SI-NEXT: s_cbranch_scc0 .LBB63_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 -; SI-NEXT: s_or_b32 s8, s4, s5 -; SI-NEXT: s_and_b32 s4, s18, 0xff -; SI-NEXT: s_lshl_b32 s4, s4, 16 -; SI-NEXT: s_lshl_b32 s5, s19, 24 -; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s18, 0xff +; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s6, s19, 24 +; SI-NEXT: s_or_b32 s56, s6, s5 ; SI-NEXT: s_and_b32 s5, s24, 0xff ; SI-NEXT: s_lshl_b32 s6, s25, 8 -; SI-NEXT: s_or_b32 s9, s5, s6 -; SI-NEXT: s_and_b32 s5, s26, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s6, s27, 24 -; SI-NEXT: s_or_b32 s6, s6, s5 -; SI-NEXT: s_and_b32 s5, s78, 0xff -; SI-NEXT: s_lshl_b32 s7, s76, 8 -; SI-NEXT: s_or_b32 s10, s5, s7 -; SI-NEXT: s_and_b32 s5, s73, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s72, 24 -; SI-NEXT: s_or_b32 s42, s7, s5 -; SI-NEXT: s_and_b32 s5, s94, 0xff +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_and_b32 s6, s26, 0xff +; SI-NEXT: s_lshl_b32 s6, s6, 16 +; SI-NEXT: s_lshl_b32 s7, s27, 24 +; SI-NEXT: s_or_b32 s58, s7, s6 +; SI-NEXT: s_and_b32 s6, s94, 0xff ; SI-NEXT: s_lshl_b32 s7, s92, 8 -; SI-NEXT: s_or_b32 s11, s5, s7 -; SI-NEXT: s_and_b32 s5, s89, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s88, 24 -; SI-NEXT: s_or_b32 s44, s7, s5 -; SI-NEXT: s_and_b32 s5, s35, 0xff -; SI-NEXT: s_lshl_b32 s7, s34, 8 -; SI-NEXT: s_or_b32 s12, s5, s7 -; SI-NEXT: s_and_b32 s5, s20, 0xff -; SI-NEXT: s_lshl_b32 s7, s21, 8 -; SI-NEXT: s_or_b32 s5, s5, s7 -; SI-NEXT: s_and_b32 s7, s22, 0xff +; SI-NEXT: s_or_b32 s6, s6, s7 +; SI-NEXT: s_and_b32 s7, s89, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_lshl_b32 s13, s23, 24 -; SI-NEXT: s_or_b32 s56, s13, s7 -; SI-NEXT: s_and_b32 s7, s28, 0xff -; SI-NEXT: s_lshl_b32 s13, s29, 8 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s59, 0xff -; SI-NEXT: s_lshl_b32 s13, s13, 16 -; SI-NEXT: s_lshl_b32 s14, s58, 24 -; SI-NEXT: s_or_b32 s57, s14, s13 -; SI-NEXT: s_and_b32 s13, s63, 0xff -; SI-NEXT: s_lshl_b32 s14, s62, 8 -; SI-NEXT: s_or_b32 s13, s13, s14 -; SI-NEXT: s_and_b32 s14, s61, 0xff -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: s_lshl_b32 s15, s60, 24 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_or_b32 vcc_lo, s15, s14 -; SI-NEXT: s_or_b32 s43, s13, vcc_lo -; SI-NEXT: s_and_b32 s13, s79, 0xff -; SI-NEXT: s_lshl_b32 s14, s77, 8 -; SI-NEXT: s_or_b32 s13, s13, s14 -; SI-NEXT: s_and_b32 s14, s75, 0xff -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: s_lshl_b32 s15, s74, 24 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_or_b32 vcc_hi, s15, s14 -; SI-NEXT: s_or_b32 s45, s13, vcc_hi -; SI-NEXT: s_and_b32 s13, s95, 0xff -; SI-NEXT: s_lshl_b32 s14, s93, 8 -; SI-NEXT: s_or_b32 s13, s13, s14 -; SI-NEXT: s_and_b32 s14, s91, 0xff -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: s_lshl_b32 s15, s90, 24 -; SI-NEXT: s_or_b32 s36, s15, s14 -; SI-NEXT: s_and_b32 s14, s31, 0xff -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: s_lshl_b32 s15, s30, 24 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_or_b32 s5, s5, s56 -; SI-NEXT: s_or_b32 s7, s7, s57 -; SI-NEXT: s_or_b32 s46, s15, s14 -; SI-NEXT: s_or_b32 s47, s13, s36 -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_and_b32 s37, s10, 0xffff -; SI-NEXT: s_and_b32 s38, s11, 0xffff -; SI-NEXT: s_and_b32 s39, s12, 0xffff -; SI-NEXT: s_or_b32 s12, s8, s4 -; SI-NEXT: s_mov_b32 s13, s5 -; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16 -; SI-NEXT: s_or_b32 s10, s9, s6 -; SI-NEXT: s_mov_b32 s11, s7 -; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16 -; SI-NEXT: s_or_b32 s8, s37, s42 -; SI-NEXT: s_mov_b32 s9, s43 -; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 16 -; SI-NEXT: s_or_b32 s6, s38, s44 -; SI-NEXT: s_mov_b32 s7, s45 -; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16 -; SI-NEXT: s_or_b32 s4, s39, s46 -; SI-NEXT: s_mov_b32 s5, s47 -; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16 -; SI-NEXT: s_lshr_b32 s41, s56, 16 -; SI-NEXT: s_lshr_b32 s43, s57, 16 -; SI-NEXT: s_lshr_b32 s45, vcc_lo, 16 -; SI-NEXT: s_lshr_b32 s47, vcc_hi, 16 -; SI-NEXT: s_lshr_b32 s15, s36, 16 +; SI-NEXT: s_lshl_b32 s8, s88, 24 +; SI-NEXT: s_or_b32 s60, s8, s7 +; SI-NEXT: s_and_b32 s7, s38, 0xff +; SI-NEXT: s_lshl_b32 s8, s36, 8 +; SI-NEXT: s_or_b32 s7, s7, s8 +; SI-NEXT: s_and_b32 s8, s31, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s9, s30, 24 +; SI-NEXT: s_or_b32 s62, s9, s8 +; SI-NEXT: s_and_b32 s8, s51, 0xff +; SI-NEXT: s_lshl_b32 s9, s50, 8 +; SI-NEXT: s_or_b32 s9, s8, s9 +; SI-NEXT: s_and_b32 s8, s49, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s48, 24 +; SI-NEXT: s_or_b32 s72, s10, s8 +; SI-NEXT: s_and_b32 s8, s20, 0xff +; SI-NEXT: s_lshl_b32 s10, s21, 8 +; SI-NEXT: s_or_b32 s11, s8, s10 +; SI-NEXT: s_and_b32 s8, s22, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s23, 24 +; SI-NEXT: s_or_b32 s13, s10, s8 +; SI-NEXT: s_and_b32 s8, s28, 0xff +; SI-NEXT: s_lshl_b32 s10, s29, 8 +; SI-NEXT: s_or_b32 s40, s8, s10 +; SI-NEXT: s_and_b32 s8, s75, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s74, 24 +; SI-NEXT: s_or_b32 vcc_lo, s10, s8 +; SI-NEXT: s_and_b32 s8, s79, 0xff +; SI-NEXT: s_lshl_b32 s10, s78, 8 +; SI-NEXT: s_or_b32 s42, s8, s10 +; SI-NEXT: s_and_b32 s8, s77, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s76, 24 +; SI-NEXT: s_or_b32 vcc_hi, s10, s8 +; SI-NEXT: s_and_b32 s8, s95, 0xff +; SI-NEXT: s_lshl_b32 s10, s93, 8 +; SI-NEXT: s_or_b32 s44, s8, s10 +; SI-NEXT: s_and_b32 s8, s91, 0xff +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s90, 24 +; SI-NEXT: s_or_b32 s12, s4, s56 +; SI-NEXT: s_and_b32 s4, s5, 0xffff +; SI-NEXT: s_and_b32 s5, s11, 0xffff +; SI-NEXT: s_or_b32 s52, s10, s8 +; SI-NEXT: s_and_b32 s8, s39, 0xff +; SI-NEXT: s_lshl_b32 s10, s37, 8 +; SI-NEXT: s_or_b32 s57, s5, s13 +; SI-NEXT: s_and_b32 s5, s40, 0xffff +; SI-NEXT: s_or_b32 s46, s8, s10 +; SI-NEXT: s_and_b32 s8, s35, 0xff +; SI-NEXT: s_or_b32 s59, s5, vcc_lo +; SI-NEXT: s_and_b32 s5, s42, 0xffff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s10, s34, 24 +; SI-NEXT: s_or_b32 s61, s5, vcc_hi +; SI-NEXT: s_and_b32 s5, s44, 0xffff +; SI-NEXT: s_or_b32 s53, s10, s8 +; SI-NEXT: s_or_b32 s10, s4, s58 +; SI-NEXT: s_and_b32 s4, s6, 0xffff +; SI-NEXT: s_or_b32 s63, s5, s52 +; SI-NEXT: s_and_b32 s5, s46, 0xffff +; SI-NEXT: s_or_b32 s8, s4, s60 +; SI-NEXT: s_and_b32 s4, s7, 0xffff +; SI-NEXT: s_or_b32 s73, s5, s53 +; SI-NEXT: s_or_b32 s6, s4, s62 +; SI-NEXT: s_and_b32 s4, s9, 0xffff +; SI-NEXT: s_lshr_b64 s[14:15], s[56:57], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[58:59], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[60:61], 16 +; SI-NEXT: s_lshr_b64 s[44:45], s[62:63], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[72:73], 16 +; SI-NEXT: s_or_b32 s4, s4, s72 +; SI-NEXT: s_lshr_b32 s41, s13, 16 +; SI-NEXT: s_lshr_b32 s43, vcc_lo, 16 +; SI-NEXT: s_lshr_b32 s45, vcc_hi, 16 +; SI-NEXT: s_lshr_b32 s47, s52, 16 +; SI-NEXT: s_lshr_b32 s15, s53, 16 +; SI-NEXT: s_mov_b32 s13, s57 +; SI-NEXT: s_mov_b32 s11, s59 +; SI-NEXT: s_mov_b32 s9, s61 +; SI-NEXT: s_mov_b32 s7, s63 +; SI-NEXT: s_mov_b32 s5, s73 ; SI-NEXT: s_cbranch_execnz .LBB63_3 ; SI-NEXT: .LBB63_2: ; %cmp.true -; SI-NEXT: s_add_i32 s35, s35, 3 -; SI-NEXT: s_and_b32 s4, s35, 0xff -; SI-NEXT: s_lshl_b32 s5, s34, 8 -; SI-NEXT: s_add_i32 s31, s31, 3 +; SI-NEXT: s_add_i32 s51, s51, 3 +; SI-NEXT: s_and_b32 s4, s51, 0xff +; SI-NEXT: s_lshl_b32 s5, s50, 8 +; SI-NEXT: s_add_i32 s49, s49, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s6, s31, 0xff +; SI-NEXT: s_and_b32 s6, s49, 0xff ; SI-NEXT: s_addk_i32 s4, 0x300 -; SI-NEXT: s_lshl_b32 s5, s30, 24 +; SI-NEXT: s_lshl_b32 s5, s48, 24 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s5, s6 -; SI-NEXT: s_add_i32 s95, s95, 3 +; SI-NEXT: s_add_i32 s39, s39, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s95, 0xff -; SI-NEXT: s_lshl_b32 s6, s93, 8 -; SI-NEXT: s_add_i32 s91, s91, 3 +; SI-NEXT: s_and_b32 s5, s39, 0xff +; SI-NEXT: s_lshl_b32 s6, s37, 8 +; SI-NEXT: s_add_i32 s35, s35, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s7, s91, 0xff +; SI-NEXT: s_and_b32 s7, s35, 0xff ; SI-NEXT: s_addk_i32 s5, 0x300 -; SI-NEXT: s_lshl_b32 s6, s90, 24 +; SI-NEXT: s_lshl_b32 s6, s34, 24 ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_and_b32 s5, s5, 0xffff ; SI-NEXT: s_or_b32 s6, s6, s7 -; SI-NEXT: s_add_i32 s94, s94, 3 +; SI-NEXT: s_add_i32 s38, s38, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s94, 0xff -; SI-NEXT: s_lshl_b32 s7, s92, 8 -; SI-NEXT: s_add_i32 s89, s89, 3 +; SI-NEXT: s_and_b32 s6, s38, 0xff +; SI-NEXT: s_lshl_b32 s7, s36, 8 +; SI-NEXT: s_add_i32 s31, s31, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s8, s89, 0xff +; SI-NEXT: s_and_b32 s8, s31, 0xff ; SI-NEXT: s_addk_i32 s6, 0x300 -; SI-NEXT: s_lshl_b32 s7, s88, 24 +; SI-NEXT: s_lshl_b32 s7, s30, 24 ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_and_b32 s6, s6, 0xffff ; SI-NEXT: s_or_b32 s7, s7, s8 -; SI-NEXT: s_add_i32 s79, s79, 3 +; SI-NEXT: s_add_i32 s95, s95, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s79, 0xff -; SI-NEXT: s_lshl_b32 s8, s77, 8 -; SI-NEXT: s_add_i32 s75, s75, 3 +; SI-NEXT: s_and_b32 s7, s95, 0xff +; SI-NEXT: s_lshl_b32 s8, s93, 8 +; SI-NEXT: s_add_i32 s91, s91, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s9, s75, 0xff +; SI-NEXT: s_and_b32 s9, s91, 0xff ; SI-NEXT: s_addk_i32 s7, 0x300 -; SI-NEXT: s_lshl_b32 s8, s74, 24 +; SI-NEXT: s_lshl_b32 s8, s90, 24 ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_and_b32 s7, s7, 0xffff ; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_add_i32 s78, s78, 3 +; SI-NEXT: s_add_i32 s94, s94, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s78, 0xff -; SI-NEXT: s_lshl_b32 s9, s76, 8 -; SI-NEXT: s_add_i32 s73, s73, 3 +; SI-NEXT: s_and_b32 s8, s94, 0xff +; SI-NEXT: s_lshl_b32 s9, s92, 8 +; SI-NEXT: s_add_i32 s89, s89, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s10, s73, 0xff +; SI-NEXT: s_and_b32 s10, s89, 0xff ; SI-NEXT: s_addk_i32 s8, 0x300 -; SI-NEXT: s_lshl_b32 s9, s72, 24 +; SI-NEXT: s_lshl_b32 s9, s88, 24 ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_and_b32 s8, s8, 0xffff ; SI-NEXT: s_or_b32 s9, s9, s10 -; SI-NEXT: s_add_i32 s63, s63, 3 +; SI-NEXT: s_add_i32 s79, s79, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s63, 0xff -; SI-NEXT: s_lshl_b32 s10, s62, 8 -; SI-NEXT: s_add_i32 s61, s61, 3 +; SI-NEXT: s_and_b32 s9, s79, 0xff +; SI-NEXT: s_lshl_b32 s10, s78, 8 +; SI-NEXT: s_add_i32 s77, s77, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s11, s61, 0xff +; SI-NEXT: s_and_b32 s11, s77, 0xff ; SI-NEXT: s_addk_i32 s9, 0x300 -; SI-NEXT: s_lshl_b32 s10, s60, 24 +; SI-NEXT: s_lshl_b32 s10, s76, 24 ; SI-NEXT: s_lshl_b32 s11, s11, 16 ; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_or_b32 s10, s10, s11 @@ -25000,11 +25018,11 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_or_b32 s10, s11, s10 ; SI-NEXT: s_and_b32 s11, s28, 0xff ; SI-NEXT: s_lshl_b32 s12, s29, 8 -; SI-NEXT: s_add_i32 s59, s59, 3 +; SI-NEXT: s_add_i32 s75, s75, 3 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s13, s59, 0xff +; SI-NEXT: s_and_b32 s13, s75, 0xff ; SI-NEXT: s_addk_i32 s11, 0x300 -; SI-NEXT: s_lshl_b32 s12, s58, 24 +; SI-NEXT: s_lshl_b32 s12, s74, 24 ; SI-NEXT: s_lshl_b32 s13, s13, 16 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_or_b32 s12, s12, s13 @@ -25084,7 +25102,7 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: s_and_b32 s5, s5, 0xffff ; SI-NEXT: s_lshl_b32 s14, s15, 16 ; SI-NEXT: s_or_b32 s5, s5, s14 -; SI-NEXT: v_readlane_b32 s30, v27, 6 +; SI-NEXT: v_readlane_b32 s30, v27, 12 ; SI-NEXT: v_mov_b32_e32 v0, s12 ; SI-NEXT: v_mov_b32_e32 v1, s13 ; SI-NEXT: v_mov_b32_e32 v2, s10 @@ -25095,7 +25113,13 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32 ; SI-NEXT: v_mov_b32_e32 v7, s7 ; SI-NEXT: v_mov_b32_e32 v8, s4 ; SI-NEXT: v_mov_b32_e32 v9, s5 -; SI-NEXT: v_readlane_b32 s31, v27, 7 +; SI-NEXT: v_readlane_b32 s31, v27, 13 +; SI-NEXT: v_readlane_b32 s53, v27, 11 +; SI-NEXT: v_readlane_b32 s52, v27, 10 +; SI-NEXT: v_readlane_b32 s51, v27, 9 +; SI-NEXT: v_readlane_b32 s50, v27, 8 +; SI-NEXT: v_readlane_b32 s49, v27, 7 +; SI-NEXT: v_readlane_b32 s48, v27, 6 ; SI-NEXT: v_readlane_b32 s39, v27, 5 ; SI-NEXT: v_readlane_b32 s38, v27, 4 ; SI-NEXT: v_readlane_b32 s37, v27, 3 @@ -25224,96 +25248,96 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32 ; VI-NEXT: s_add_i32 s63, s63, 3 ; VI-NEXT: v_mov_b32_e32 v0, s62 ; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004 -; VI-NEXT: v_perm_b32 v6, s63, v0, v1 +; VI-NEXT: v_perm_b32 v0, s63, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v0 ; VI-NEXT: s_add_i32 s61, s61, 3 ; VI-NEXT: v_mov_b32_e32 v0, s59 -; VI-NEXT: v_perm_b32 v7, s61, v0, v1 +; VI-NEXT: v_perm_b32 v0, s61, v0, v1 +; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s60, s60, 3 ; VI-NEXT: v_mov_b32_e32 v0, s57 -; VI-NEXT: v_perm_b32 v8, s60, v0, v1 +; VI-NEXT: v_perm_b32 v0, s60, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v0 ; VI-NEXT: s_add_i32 s58, s58, 3 ; VI-NEXT: v_mov_b32_e32 v0, s47 -; VI-NEXT: v_perm_b32 v9, s58, v0, v1 +; VI-NEXT: v_perm_b32 v0, s58, v0, v1 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s56, s56, 3 ; VI-NEXT: v_mov_b32_e32 v0, s45 -; VI-NEXT: v_perm_b32 v10, s56, v0, v1 +; VI-NEXT: v_perm_b32 v0, s56, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v0 ; VI-NEXT: s_add_i32 s46, s46, 3 ; VI-NEXT: v_mov_b32_e32 v0, s43 -; VI-NEXT: v_perm_b32 v11, s46, v0, v1 +; VI-NEXT: v_perm_b32 v0, s46, v0, v1 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s44, s44, 3 ; VI-NEXT: v_mov_b32_e32 v0, s41 -; VI-NEXT: v_perm_b32 v12, s44, v0, v1 +; VI-NEXT: v_perm_b32 v0, s44, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v0 ; VI-NEXT: s_add_i32 s42, s42, 3 ; VI-NEXT: v_mov_b32_e32 v0, s15 -; VI-NEXT: v_perm_b32 v13, s42, v0, v1 +; VI-NEXT: v_perm_b32 v0, s42, v0, v1 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s40, s40, 3 ; VI-NEXT: v_mov_b32_e32 v0, s13 -; VI-NEXT: v_perm_b32 v5, s40, v0, v1 +; VI-NEXT: v_perm_b32 v0, s40, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v0 ; VI-NEXT: s_add_i32 s14, s14, 3 ; VI-NEXT: v_mov_b32_e32 v0, s11 -; VI-NEXT: v_perm_b32 v14, s14, v0, v1 +; VI-NEXT: v_perm_b32 v0, s14, v0, v1 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s12, s12, 3 ; VI-NEXT: v_mov_b32_e32 v0, s8 -; VI-NEXT: v_perm_b32 v4, s12, v0, v1 +; VI-NEXT: v_perm_b32 v0, s12, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v0 ; VI-NEXT: s_add_i32 s9, s9, 3 ; VI-NEXT: v_mov_b32_e32 v0, s7 -; VI-NEXT: v_perm_b32 v15, s9, v0, v1 +; VI-NEXT: v_perm_b32 v0, s9, v0, v1 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s10, s10, 3 ; VI-NEXT: v_mov_b32_e32 v0, s6 -; VI-NEXT: v_perm_b32 v3, s10, v0, v1 +; VI-NEXT: v_perm_b32 v0, s10, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v0 ; VI-NEXT: s_add_i32 s28, s28, 3 ; VI-NEXT: v_mov_b32_e32 v0, s29 -; VI-NEXT: v_perm_b32 v16, s28, v0, v1 +; VI-NEXT: v_perm_b32 v0, s28, v0, v1 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s26, s26, 3 ; VI-NEXT: v_mov_b32_e32 v0, s27 -; VI-NEXT: v_perm_b32 v2, s26, v0, v1 +; VI-NEXT: v_perm_b32 v0, s26, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v0 ; VI-NEXT: s_add_i32 s24, s24, 3 ; VI-NEXT: v_mov_b32_e32 v0, s25 -; VI-NEXT: v_perm_b32 v17, s24, v0, v1 +; VI-NEXT: v_perm_b32 v0, s24, v0, v1 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s22, s22, 3 ; VI-NEXT: v_mov_b32_e32 v0, s23 +; VI-NEXT: v_perm_b32 v0, s22, v0, v1 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v0 ; VI-NEXT: s_add_i32 s20, s20, 3 -; VI-NEXT: v_mov_b32_e32 v18, s21 +; VI-NEXT: v_mov_b32_e32 v0, s21 +; VI-NEXT: v_perm_b32 v0, s20, v0, v1 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v0 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: v_mov_b32_e32 v19, s19 +; VI-NEXT: v_mov_b32_e32 v0, s19 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v20, s17 -; VI-NEXT: v_perm_b32 v0, s22, v0, v1 -; VI-NEXT: v_perm_b32 v18, s20, v18, v1 -; VI-NEXT: v_perm_b32 v19, s18, v19, v1 +; VI-NEXT: v_perm_b32 v0, s18, v0, v1 ; VI-NEXT: v_perm_b32 v1, s16, v20, v1 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v15 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 ; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v18 -; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x300, v1 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v17 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v16 -; VI-NEXT: v_or_b32_sdwa v4, v4, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v5, v5, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v6 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v7 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v10 -; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v11 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v12 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v13 -; VI-NEXT: v_or_b32_sdwa v1, v19, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v18, v0, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v1, v18, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_or_b32_sdwa v2, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_or_b32_sdwa v3, v3, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v6, v6, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v7, v7, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v8, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v9, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v1 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v18 +; VI-NEXT: v_or_b32_sdwa v4, v4, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v5, v5, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v6, v6, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v7, v7, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v8, v8, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v9, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0 +; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x3000000, v3 ; VI-NEXT: v_add_u32_e32 v4, vcc, 0x3000000, v4 @@ -25336,29 +25360,29 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32 ; GFX9-NEXT: v_readfirstlane_b32 s59, v24 ; GFX9-NEXT: v_readfirstlane_b32 s62, v23 ; GFX9-NEXT: v_readfirstlane_b32 s63, v22 -; GFX9-NEXT: v_readfirstlane_b32 s46, v21 +; GFX9-NEXT: v_readfirstlane_b32 s45, v21 ; GFX9-NEXT: v_readfirstlane_b32 s47, v20 ; GFX9-NEXT: v_readfirstlane_b32 s60, v19 ; GFX9-NEXT: v_readfirstlane_b32 s61, v18 -; GFX9-NEXT: v_readfirstlane_b32 s7, v17 -; GFX9-NEXT: v_readfirstlane_b32 s45, v16 +; GFX9-NEXT: v_readfirstlane_b32 s41, v17 +; GFX9-NEXT: v_readfirstlane_b32 s43, v16 ; GFX9-NEXT: v_readfirstlane_b32 s56, v15 ; GFX9-NEXT: v_readfirstlane_b32 s58, v14 -; GFX9-NEXT: v_readfirstlane_b32 s6, v13 -; GFX9-NEXT: v_readfirstlane_b32 s8, v12 -; GFX9-NEXT: v_readfirstlane_b32 s9, v11 -; GFX9-NEXT: v_readfirstlane_b32 s10, v10 -; GFX9-NEXT: v_readfirstlane_b32 s11, v9 -; GFX9-NEXT: v_readfirstlane_b32 s12, v8 -; GFX9-NEXT: v_readfirstlane_b32 s13, v7 -; GFX9-NEXT: v_readfirstlane_b32 s44, v6 -; GFX9-NEXT: v_readfirstlane_b32 s14, v5 -; GFX9-NEXT: v_readfirstlane_b32 s15, v4 -; GFX9-NEXT: v_readfirstlane_b32 s40, v3 -; GFX9-NEXT: v_readfirstlane_b32 s43, v2 -; GFX9-NEXT: v_readfirstlane_b32 s41, v1 +; GFX9-NEXT: v_readfirstlane_b32 s13, v13 +; GFX9-NEXT: v_readfirstlane_b32 s15, v12 +; GFX9-NEXT: v_readfirstlane_b32 s44, v11 +; GFX9-NEXT: v_readfirstlane_b32 s46, v10 +; GFX9-NEXT: v_readfirstlane_b32 s10, v9 +; GFX9-NEXT: v_readfirstlane_b32 s11, v8 +; GFX9-NEXT: v_readfirstlane_b32 s40, v7 +; GFX9-NEXT: v_readfirstlane_b32 s42, v6 +; GFX9-NEXT: v_readfirstlane_b32 s7, v5 +; GFX9-NEXT: v_readfirstlane_b32 s9, v4 +; GFX9-NEXT: v_readfirstlane_b32 s12, v3 +; GFX9-NEXT: v_readfirstlane_b32 s14, v2 +; GFX9-NEXT: v_readfirstlane_b32 s6, v1 ; GFX9-NEXT: s_cmp_lg_u32 s4, 0 -; GFX9-NEXT: v_readfirstlane_b32 s42, v0 +; GFX9-NEXT: v_readfirstlane_b32 s8, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB63_4 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v0, s17 @@ -25382,38 +25406,38 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 ; GFX9-NEXT: v_perm_b32 v3, s28, v3, v8 -; GFX9-NEXT: v_mov_b32_e32 v4, s41 -; GFX9-NEXT: v_perm_b32 v4, s42, v4, v8 +; GFX9-NEXT: v_mov_b32_e32 v4, s6 +; GFX9-NEXT: v_perm_b32 v4, s8, v4, v8 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 -; GFX9-NEXT: v_mov_b32_e32 v4, s40 -; GFX9-NEXT: v_perm_b32 v4, s43, v4, v8 -; GFX9-NEXT: v_mov_b32_e32 v5, s14 -; GFX9-NEXT: v_perm_b32 v5, s15, v5, v8 +; GFX9-NEXT: v_mov_b32_e32 v4, s12 +; GFX9-NEXT: v_perm_b32 v4, s14, v4, v8 +; GFX9-NEXT: v_mov_b32_e32 v5, s7 +; GFX9-NEXT: v_perm_b32 v5, s9, v5, v8 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: v_mov_b32_e32 v5, s13 -; GFX9-NEXT: v_perm_b32 v5, s44, v5, v8 -; GFX9-NEXT: v_mov_b32_e32 v6, s11 -; GFX9-NEXT: v_perm_b32 v6, s12, v6, v8 +; GFX9-NEXT: v_mov_b32_e32 v5, s40 +; GFX9-NEXT: v_perm_b32 v5, s42, v5, v8 +; GFX9-NEXT: v_mov_b32_e32 v6, s10 +; GFX9-NEXT: v_perm_b32 v6, s11, v6, v8 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: v_mov_b32_e32 v6, s9 -; GFX9-NEXT: v_perm_b32 v6, s10, v6, v8 -; GFX9-NEXT: v_mov_b32_e32 v7, s6 -; GFX9-NEXT: v_perm_b32 v7, s8, v7, v8 +; GFX9-NEXT: v_mov_b32_e32 v6, s44 +; GFX9-NEXT: v_perm_b32 v6, s46, v6, v8 +; GFX9-NEXT: v_mov_b32_e32 v7, s13 +; GFX9-NEXT: v_perm_b32 v7, s15, v7, v8 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 ; GFX9-NEXT: v_mov_b32_e32 v7, s56 ; GFX9-NEXT: v_perm_b32 v7, s58, v7, v8 -; GFX9-NEXT: v_mov_b32_e32 v9, s7 +; GFX9-NEXT: v_mov_b32_e32 v9, s41 ; GFX9-NEXT: s_and_b32 s4, s61, 0xff ; GFX9-NEXT: s_lshl_b32 s5, s60, 8 -; GFX9-NEXT: v_perm_b32 v9, s45, v9, v8 +; GFX9-NEXT: v_perm_b32 v9, s43, v9, v8 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; GFX9-NEXT: s_or_b32 s4, s4, s5 ; GFX9-NEXT: s_and_b32 s5, s47, 0xff -; GFX9-NEXT: s_lshl_b32 s72, s46, 8 +; GFX9-NEXT: s_lshl_b32 s72, s45, 8 ; GFX9-NEXT: v_lshl_or_b32 v7, v9, 16, v7 ; GFX9-NEXT: s_or_b32 s5, s5, s72 ; GFX9-NEXT: v_mov_b32_e32 v9, s62 @@ -25429,105 +25453,105 @@ define inreg <20 x half> @bitcast_v40i8_to_v20f16_scalar(<40 x i8> inreg %a, i32 ; GFX9-NEXT: .LBB63_2: ; %cmp.true ; GFX9-NEXT: s_add_i32 s63, s63, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s62 -; GFX9-NEXT: v_mov_b32_e32 v6, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v7, s63, v0, v6 +; GFX9-NEXT: v_mov_b32_e32 v1, 0xc0c0004 +; GFX9-NEXT: v_perm_b32 v0, s63, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v0 ; GFX9-NEXT: s_add_i32 s59, s59, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s57 -; GFX9-NEXT: v_perm_b32 v8, s59, v0, v6 +; GFX9-NEXT: v_perm_b32 v0, s59, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v0 ; GFX9-NEXT: s_add_i32 s61, s61, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s60 -; GFX9-NEXT: v_perm_b32 v9, s61, v0, v6 +; GFX9-NEXT: v_perm_b32 v0, s61, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v0 ; GFX9-NEXT: s_add_i32 s47, s47, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s46 -; GFX9-NEXT: v_perm_b32 v10, s47, v0, v6 +; GFX9-NEXT: v_mov_b32_e32 v0, s45 +; GFX9-NEXT: v_perm_b32 v0, s47, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v0 ; GFX9-NEXT: s_add_i32 s58, s58, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s56 -; GFX9-NEXT: v_perm_b32 v11, s58, v0, v6 +; GFX9-NEXT: v_perm_b32 v0, s58, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v0 +; GFX9-NEXT: s_add_i32 s43, s43, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s41 +; GFX9-NEXT: v_perm_b32 v0, s43, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v0 +; GFX9-NEXT: s_add_i32 s46, s46, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s44 +; GFX9-NEXT: v_perm_b32 v0, s46, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v0 +; GFX9-NEXT: s_add_i32 s15, s15, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s13 +; GFX9-NEXT: v_perm_b32 v0, s15, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v0 +; GFX9-NEXT: s_add_i32 s42, s42, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s40 +; GFX9-NEXT: v_perm_b32 v0, s42, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v0 +; GFX9-NEXT: s_add_i32 s11, s11, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s10 +; GFX9-NEXT: v_perm_b32 v0, s11, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v0 +; GFX9-NEXT: s_add_i32 s14, s14, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s12 +; GFX9-NEXT: v_perm_b32 v0, s14, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v0 +; GFX9-NEXT: s_add_i32 s9, s9, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s7 +; GFX9-NEXT: v_perm_b32 v0, s9, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v0 +; GFX9-NEXT: s_add_i32 s28, s28, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s29 +; GFX9-NEXT: v_perm_b32 v0, s28, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v0 +; GFX9-NEXT: s_add_i32 s8, s8, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s6 +; GFX9-NEXT: v_perm_b32 v0, s8, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v0 +; GFX9-NEXT: s_add_i32 s24, s24, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s25 +; GFX9-NEXT: v_perm_b32 v0, s24, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v0 +; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: v_mov_b32_e32 v0, s27 +; GFX9-NEXT: v_perm_b32 v0, s26, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v0 ; GFX9-NEXT: s_add_i32 s20, s20, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s21 -; GFX9-NEXT: v_perm_b32 v0, s20, v0, v6 -; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v0, s20, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v0 ; GFX9-NEXT: s_add_i32 s22, s22, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s23 -; GFX9-NEXT: v_perm_b32 v0, s22, v0, v6 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v0 +; GFX9-NEXT: v_perm_b32 v0, s22, v0, v1 +; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v0 ; GFX9-NEXT: s_add_i32 s16, s16, 3 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 -; GFX9-NEXT: v_perm_b32 v0, s16, v0, v6 +; GFX9-NEXT: v_perm_b32 v0, s16, v0, v1 ; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s19 +; GFX9-NEXT: v_mov_b32_e32 v20, s19 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_perm_b32 v3, s18, v3, v6 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: s_add_i32 s24, s24, 3 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_perm_b32 v1, s18, v20, v1 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 -; GFX9-NEXT: v_mov_b32_e32 v2, s25 -; GFX9-NEXT: v_lshl_or_b32 v0, v3, 16, v0 -; GFX9-NEXT: v_perm_b32 v2, s24, v2, v6 -; GFX9-NEXT: s_add_i32 s26, s26, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s27 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_perm_b32 v3, s26, v3, v6 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v18 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; GFX9-NEXT: s_add_i32 s28, s28, 3 -; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 -; GFX9-NEXT: v_mov_b32_e32 v3, s29 -; GFX9-NEXT: v_perm_b32 v3, s28, v3, v6 -; GFX9-NEXT: s_add_i32 s42, s42, 3 -; GFX9-NEXT: v_mov_b32_e32 v4, s41 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 -; GFX9-NEXT: v_perm_b32 v4, s42, v4, v6 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; GFX9-NEXT: s_add_i32 s43, s43, 3 -; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 -; GFX9-NEXT: v_mov_b32_e32 v4, s40 -; GFX9-NEXT: v_perm_b32 v4, s43, v4, v6 -; GFX9-NEXT: s_add_i32 s15, s15, 3 -; GFX9-NEXT: v_mov_b32_e32 v5, s14 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 -; GFX9-NEXT: v_perm_b32 v5, s15, v5, v6 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX9-NEXT: s_add_i32 s44, s44, 3 -; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: v_mov_b32_e32 v5, s13 -; GFX9-NEXT: v_perm_b32 v5, s44, v5, v6 -; GFX9-NEXT: s_add_i32 s12, s12, 3 -; GFX9-NEXT: v_mov_b32_e32 v12, s11 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 -; GFX9-NEXT: v_perm_b32 v12, s12, v12, v6 -; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: s_add_i32 s10, s10, 3 -; GFX9-NEXT: v_mov_b32_e32 v13, s9 -; GFX9-NEXT: s_add_i32 s45, s45, 3 -; GFX9-NEXT: v_lshl_or_b32 v5, v12, 16, v5 -; GFX9-NEXT: v_mov_b32_e32 v12, s7 -; GFX9-NEXT: v_perm_b32 v13, s10, v13, v6 -; GFX9-NEXT: s_add_i32 s8, s8, 3 -; GFX9-NEXT: v_mov_b32_e32 v14, s6 -; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v8 -; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v9 -; GFX9-NEXT: v_perm_b32 v12, s45, v12, v6 -; GFX9-NEXT: v_perm_b32 v6, s8, v14, v6 -; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v7 -; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v10 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v11 -; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v13 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v12 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8 -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v14 -; GFX9-NEXT: v_lshl_or_b32 v6, v6, 16, v11 -; GFX9-NEXT: v_lshl_or_b32 v7, v10, 16, v7 -; GFX9-NEXT: v_lshl_or_b32 v9, v15, 16, v9 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_lshl_or_b32 v1, v19, 16, v1 +; GFX9-NEXT: v_lshl_or_b32 v2, v17, 16, v2 +; GFX9-NEXT: v_lshl_or_b32 v3, v16, 16, v3 +; GFX9-NEXT: v_lshl_or_b32 v4, v15, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v14, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v13, 16, v6 +; GFX9-NEXT: v_lshl_or_b32 v7, v12, 16, v7 +; GFX9-NEXT: v_lshl_or_b32 v8, v11, 16, v8 +; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 ; GFX9-NEXT: .LBB63_3: ; %end ; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: .LBB63_4: @@ -25904,10 +25928,10 @@ define <5 x double> @bitcast_v20f16_to_v5f64(<20 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB64_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v25 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v24 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v34 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v23 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -25956,41 +25980,41 @@ define <5 x double> @bitcast_v20f16_to_v5f64(<20 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB64_2 ; SI-NEXT: .LBB64_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v35 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v25 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v24 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v33 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v33 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v23 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v23 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v22 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v21 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v22 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v31 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v21 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v30 @@ -26549,8 +26573,8 @@ define <20 x half> @bitcast_v5f64_to_v20f16(<5 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 ; SI-NEXT: .LBB66_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -26685,7 +26709,7 @@ define inreg <20 x half> @bitcast_v5f64_to_v20f16_scalar(<5 x double> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v1 ; SI-NEXT: s_branch .LBB67_5 ; SI-NEXT: .LBB67_3: ; SI-NEXT: ; implicit-def: $sgpr12 @@ -26714,17 +26738,17 @@ define inreg <20 x half> @bitcast_v5f64_to_v20f16_scalar(<5 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v17, s29 ; SI-NEXT: v_mov_b32_e32 v18, s28 ; SI-NEXT: v_mov_b32_e32 v19, s27 -; SI-NEXT: v_mov_b32_e32 v20, s26 +; SI-NEXT: v_mov_b32_e32 v15, s26 ; SI-NEXT: v_mov_b32_e32 v14, s12 ; SI-NEXT: v_mov_b32_e32 v13, s10 ; SI-NEXT: v_mov_b32_e32 v12, s8 ; SI-NEXT: v_mov_b32_e32 v11, s6 ; SI-NEXT: v_mov_b32_e32 v10, s4 ; SI-NEXT: .LBB67_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 @@ -26733,7 +26757,7 @@ define inreg <20 x half> @bitcast_v5f64_to_v20f16_scalar(<5 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v0, v0, v14 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 ; SI-NEXT: v_or_b32_e32 v2, v2, v13 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v19 @@ -26910,10 +26934,10 @@ define <5 x i64> @bitcast_v20f16_to_v5i64(<20 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB68_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v25 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v24 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v34 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v23 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -26962,41 +26986,41 @@ define <5 x i64> @bitcast_v20f16_to_v5i64(<20 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB68_2 ; SI-NEXT: .LBB68_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v35 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v25 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v24 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v33 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v33 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v23 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v23 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v22 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v21 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v22 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v31 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v21 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v30 @@ -30285,10 +30309,10 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr20 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr18 ; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB74_2 @@ -30457,10 +30481,10 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr20 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB74_2 @@ -30537,8 +30561,8 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 { ; GFX9-NEXT: .LBB74_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_perm_b32 v1, v1, v16, s4 +; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v15, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; GFX9-NEXT: v_perm_b32 v1, v2, v39, s4 @@ -30891,10 +30915,10 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; SI-NEXT: s_lshr_b32 s92, s17, 24 ; SI-NEXT: s_lshr_b32 s93, s17, 16 ; SI-NEXT: s_lshr_b32 s94, s17, 8 -; SI-NEXT: s_lshr_b64 s[10:11], s[24:25], 24 -; SI-NEXT: s_lshr_b64 s[4:5], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[6:7], s[24:25], 8 -; SI-NEXT: s_lshr_b64 s[8:9], s[22:23], 24 +; SI-NEXT: s_lshr_b64 s[4:5], s[24:25], 24 +; SI-NEXT: s_lshr_b64 s[6:7], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[8:9], s[24:25], 8 +; SI-NEXT: s_lshr_b64 s[10:11], s[22:23], 24 ; SI-NEXT: s_lshr_b64 s[12:13], s[22:23], 16 ; SI-NEXT: s_lshr_b64 s[14:15], s[22:23], 8 ; SI-NEXT: s_lshr_b64 s[26:27], s[20:21], 24 @@ -30910,29 +30934,29 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; SI-NEXT: .LBB75_2: ; %cmp.true ; SI-NEXT: v_add_f64 v[8:9], s[20:21], 1.0 ; SI-NEXT: v_add_f64 v[15:16], s[18:19], 1.0 +; SI-NEXT: v_lshr_b64 v[21:22], v[8:9], 16 ; SI-NEXT: v_lshr_b64 v[22:23], v[8:9], 8 ; SI-NEXT: v_add_f64 v[1:2], s[24:25], 1.0 ; SI-NEXT: v_lshr_b64 v[23:24], v[15:16], 24 ; SI-NEXT: v_add_f64 v[3:4], s[22:23], 1.0 -; SI-NEXT: v_add_f64 v[20:21], s[16:17], 1.0 +; SI-NEXT: v_add_f64 v[19:20], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[24:25], v[15:16], 16 ; SI-NEXT: v_lshr_b64 v[10:11], v[1:2], 8 ; SI-NEXT: v_lshr_b64 v[25:26], v[15:16], 8 ; SI-NEXT: v_lshr_b64 v[11:12], v[3:4], 24 -; SI-NEXT: v_lshr_b64 v[26:27], v[20:21], 24 +; SI-NEXT: v_lshr_b64 v[26:27], v[19:20], 24 ; SI-NEXT: v_lshr_b64 v[5:6], v[1:2], 24 ; SI-NEXT: v_lshr_b64 v[12:13], v[3:4], 16 -; SI-NEXT: v_lshr_b64 v[17:18], v[8:9], 24 -; SI-NEXT: v_lshr_b64 v[27:28], v[20:21], 16 -; SI-NEXT: v_readfirstlane_b32 s17, v21 +; SI-NEXT: v_lshr_b64 v[27:28], v[19:20], 16 +; SI-NEXT: v_readfirstlane_b32 s17, v20 ; SI-NEXT: v_readfirstlane_b32 s19, v16 ; SI-NEXT: v_readfirstlane_b32 s21, v9 ; SI-NEXT: v_readfirstlane_b32 s23, v4 ; SI-NEXT: v_readfirstlane_b32 s25, v2 ; SI-NEXT: v_lshr_b64 v[6:7], v[1:2], 16 ; SI-NEXT: v_lshr_b64 v[13:14], v[3:4], 8 -; SI-NEXT: v_lshr_b64 v[18:19], v[8:9], 16 -; SI-NEXT: v_lshr_b64 v[28:29], v[20:21], 8 +; SI-NEXT: v_lshr_b64 v[17:18], v[8:9], 24 +; SI-NEXT: v_lshr_b64 v[28:29], v[19:20], 8 ; SI-NEXT: s_lshr_b32 s72, s25, 24 ; SI-NEXT: s_lshr_b32 s73, s25, 16 ; SI-NEXT: s_lshr_b32 s74, s25, 8 @@ -30970,19 +30994,19 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr77 ; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr75 +; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr73 ; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: s_branch .LBB75_2 ; SI-NEXT: .LBB75_4: -; SI-NEXT: v_mov_b32_e32 v20, s16 +; SI-NEXT: v_mov_b32_e32 v19, s16 ; SI-NEXT: v_mov_b32_e32 v15, s18 ; SI-NEXT: v_mov_b32_e32 v8, s20 ; SI-NEXT: v_mov_b32_e32 v3, s22 @@ -30994,16 +31018,16 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; SI-NEXT: v_mov_b32_e32 v24, s44 ; SI-NEXT: v_mov_b32_e32 v23, s42 ; SI-NEXT: v_mov_b32_e32 v22, s40 -; SI-NEXT: v_mov_b32_e32 v18, s28 +; SI-NEXT: v_mov_b32_e32 v21, s28 ; SI-NEXT: v_mov_b32_e32 v17, s26 ; SI-NEXT: v_mov_b32_e32 v13, s14 ; SI-NEXT: v_mov_b32_e32 v12, s12 -; SI-NEXT: v_mov_b32_e32 v11, s8 -; SI-NEXT: v_mov_b32_e32 v10, s6 -; SI-NEXT: v_mov_b32_e32 v6, s4 -; SI-NEXT: v_mov_b32_e32 v5, s10 +; SI-NEXT: v_mov_b32_e32 v11, s10 +; SI-NEXT: v_mov_b32_e32 v10, s8 +; SI-NEXT: v_mov_b32_e32 v6, s6 +; SI-NEXT: v_mov_b32_e32 v5, s4 ; SI-NEXT: .LBB75_5: ; %end -; SI-NEXT: v_and_b32_e32 v2, 0xff, v20 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v19 ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v28 ; SI-NEXT: s_and_b32 s4, s17, 0xff ; SI-NEXT: s_lshl_b32 s5, s94, 8 @@ -31011,12 +31035,12 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v27 ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: s_and_b32 s5, s93, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v26 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v26 ; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s6, s92, 24 -; SI-NEXT: v_or_b32_e32 v4, v7, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v7, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s6, s5 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -31035,12 +31059,12 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v24 ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: s_and_b32 s5, s90, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v23 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v23 ; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s6, s89, 24 -; SI-NEXT: v_or_b32_e32 v4, v7, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v7, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s6, s5 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -31057,11 +31081,11 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; SI-NEXT: s_and_b32 s4, s21, 0xff ; SI-NEXT: s_lshl_b32 s5, s88, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v18 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v21 ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: s_and_b32 s5, s79, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v17 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v17 ; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_lshl_b32 s6, s78, 24 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 @@ -31167,17 +31191,17 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; VI-NEXT: s_lshr_b64 s[4:5], s[16:17], 24 ; VI-NEXT: s_cbranch_execnz .LBB75_4 ; VI-NEXT: .LBB75_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[1:2], s[24:25], 1.0 ; VI-NEXT: v_add_f64 v[3:4], s[22:23], 1.0 ; VI-NEXT: v_add_f64 v[5:6], s[20:21], 1.0 ; VI-NEXT: v_add_f64 v[7:8], s[18:19], 1.0 -; VI-NEXT: v_add_f64 v[9:10], s[16:17], 1.0 -; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[1:2] -; VI-NEXT: v_lshrrev_b64 v[12:13], 24, v[3:4] -; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6] -; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[7:8] -; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10] -; VI-NEXT: v_lshrrev_b32_e32 v16, 24, v2 +; VI-NEXT: v_add_f64 v[1:2], s[24:25], 1.0 +; VI-NEXT: v_add_f64 v[11:12], s[16:17], 1.0 +; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[5:6] +; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[9:10], 24, v[1:2] +; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[11:12] +; VI-NEXT: v_lshrrev_b32_e32 v10, 24, v2 ; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v2 ; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v2 ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v1 @@ -31197,11 +31221,11 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v8 ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v7 ; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v11 ; VI-NEXT: s_branch .LBB75_5 ; VI-NEXT: .LBB75_3: ; VI-NEXT: ; implicit-def: $sgpr75 @@ -31236,7 +31260,7 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; VI-NEXT: ; implicit-def: $sgpr58 ; VI-NEXT: s_branch .LBB75_2 ; VI-NEXT: .LBB75_4: -; VI-NEXT: v_mov_b32_e32 v9, s16 +; VI-NEXT: v_mov_b32_e32 v11, s16 ; VI-NEXT: v_mov_b32_e32 v7, s18 ; VI-NEXT: v_mov_b32_e32 v5, s20 ; VI-NEXT: v_mov_b32_e32 v3, s22 @@ -31245,7 +31269,7 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v4, s23 ; VI-NEXT: v_mov_b32_e32 v6, s21 ; VI-NEXT: v_mov_b32_e32 v8, s19 -; VI-NEXT: v_mov_b32_e32 v10, s17 +; VI-NEXT: v_mov_b32_e32 v12, s17 ; VI-NEXT: v_mov_b32_e32 v34, s76 ; VI-NEXT: v_mov_b32_e32 v36, s75 ; VI-NEXT: v_mov_b32_e32 v31, s74 @@ -31256,7 +31280,12 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v22, s61 ; VI-NEXT: v_mov_b32_e32 v18, s60 ; VI-NEXT: v_mov_b32_e32 v19, s59 -; VI-NEXT: v_mov_b32_e32 v16, s58 +; VI-NEXT: v_mov_b32_e32 v16, s4 +; VI-NEXT: v_mov_b32_e32 v15, s6 +; VI-NEXT: v_mov_b32_e32 v14, s8 +; VI-NEXT: v_mov_b32_e32 v13, s10 +; VI-NEXT: v_mov_b32_e32 v9, s12 +; VI-NEXT: v_mov_b32_e32 v10, s58 ; VI-NEXT: v_mov_b32_e32 v17, s57 ; VI-NEXT: v_mov_b32_e32 v20, s56 ; VI-NEXT: v_mov_b32_e32 v23, s47 @@ -31271,37 +31300,32 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v38, s28 ; VI-NEXT: v_mov_b32_e32 v39, s27 ; VI-NEXT: v_mov_b32_e32 v48, s26 -; VI-NEXT: v_mov_b32_e32 v15, s4 -; VI-NEXT: v_mov_b32_e32 v14, s6 -; VI-NEXT: v_mov_b32_e32 v13, s8 -; VI-NEXT: v_mov_b32_e32 v12, s10 -; VI-NEXT: v_mov_b32_e32 v11, s12 ; VI-NEXT: .LBB75_5: ; %end ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v15, v34, v15, s4 -; VI-NEXT: v_perm_b32 v9, v9, v36, s4 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: v_or_b32_e32 v9, v9, v15 -; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v9, v10, v48, s4 -; VI-NEXT: v_perm_b32 v10, v39, v38, s4 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; VI-NEXT: v_or_b32_e32 v9, v9, v10 -; VI-NEXT: v_add_u32_e32 v10, vcc, 4, v0 -; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v9, v31, v14, s4 +; VI-NEXT: v_perm_b32 v16, v34, v16, s4 +; VI-NEXT: v_perm_b32 v11, v11, v36, s4 +; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; VI-NEXT: v_or_b32_e32 v11, v11, v16 +; VI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v11, v12, v48, s4 +; VI-NEXT: v_perm_b32 v12, v39, v38, s4 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_or_b32_e32 v11, v11, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 4, v0 +; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v11, v31, v15, s4 ; VI-NEXT: v_perm_b32 v7, v7, v32, s4 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; VI-NEXT: v_or_b32_e32 v7, v7, v9 -; VI-NEXT: v_add_u32_e32 v9, vcc, 8, v0 -; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; VI-NEXT: v_or_b32_e32 v7, v7, v11 +; VI-NEXT: v_add_u32_e32 v11, vcc, 8, v0 +; VI-NEXT: buffer_store_dword v7, v11, s[0:3], 0 offen ; VI-NEXT: v_perm_b32 v7, v8, v37, s4 ; VI-NEXT: v_perm_b32 v8, v35, v33, s4 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 ; VI-NEXT: v_add_u32_e32 v8, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v7, v26, v13, s4 +; VI-NEXT: v_perm_b32 v7, v26, v14, s4 ; VI-NEXT: v_perm_b32 v5, v5, v27, s4 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v5, v5, v7 @@ -31313,7 +31337,7 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; VI-NEXT: v_or_b32_e32 v5, v5, v6 ; VI-NEXT: v_add_u32_e32 v6, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v5, v21, v12, s4 +; VI-NEXT: v_perm_b32 v5, v21, v13, s4 ; VI-NEXT: v_perm_b32 v3, v3, v22, s4 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_e32 v3, v3, v5 @@ -31325,14 +31349,14 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; VI-NEXT: v_or_b32_e32 v3, v3, v4 ; VI-NEXT: v_add_u32_e32 v4, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v3, v18, v11, s4 +; VI-NEXT: v_perm_b32 v3, v18, v9, s4 ; VI-NEXT: v_perm_b32 v1, v1, v19, s4 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v1, v1, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen ; VI-NEXT: v_perm_b32 v1, v2, v20, s4 -; VI-NEXT: v_perm_b32 v2, v17, v16, s4 +; VI-NEXT: v_perm_b32 v2, v17, v10, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0 @@ -31378,17 +31402,17 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; GFX9-NEXT: s_lshr_b64 s[4:5], s[16:17], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB75_4 ; GFX9-NEXT: .LBB75_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[1:2], s[24:25], 1.0 ; GFX9-NEXT: v_add_f64 v[3:4], s[22:23], 1.0 ; GFX9-NEXT: v_add_f64 v[5:6], s[20:21], 1.0 ; GFX9-NEXT: v_add_f64 v[7:8], s[18:19], 1.0 -; GFX9-NEXT: v_add_f64 v[9:10], s[16:17], 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[11:12], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b64 v[12:13], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6] -; GFX9-NEXT: v_lshrrev_b64 v[14:15], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 24, v2 +; GFX9-NEXT: v_add_f64 v[1:2], s[24:25], 1.0 +; GFX9-NEXT: v_add_f64 v[11:12], s[16:17], 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[13:14], 24, v[3:4] +; GFX9-NEXT: v_lshrrev_b64 v[14:15], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[9:10], 24, v[1:2] +; GFX9-NEXT: v_lshrrev_b64 v[16:17], 24, v[11:12] +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v1 @@ -31408,11 +31432,11 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v8 ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v7 ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v11 ; GFX9-NEXT: s_branch .LBB75_5 ; GFX9-NEXT: .LBB75_3: ; GFX9-NEXT: ; implicit-def: $sgpr75 @@ -31447,7 +31471,7 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; GFX9-NEXT: ; implicit-def: $sgpr58 ; GFX9-NEXT: s_branch .LBB75_2 ; GFX9-NEXT: .LBB75_4: -; GFX9-NEXT: v_mov_b32_e32 v9, s16 +; GFX9-NEXT: v_mov_b32_e32 v11, s16 ; GFX9-NEXT: v_mov_b32_e32 v7, s18 ; GFX9-NEXT: v_mov_b32_e32 v5, s20 ; GFX9-NEXT: v_mov_b32_e32 v3, s22 @@ -31456,7 +31480,7 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v4, s23 ; GFX9-NEXT: v_mov_b32_e32 v6, s21 ; GFX9-NEXT: v_mov_b32_e32 v8, s19 -; GFX9-NEXT: v_mov_b32_e32 v10, s17 +; GFX9-NEXT: v_mov_b32_e32 v12, s17 ; GFX9-NEXT: v_mov_b32_e32 v33, s76 ; GFX9-NEXT: v_mov_b32_e32 v35, s75 ; GFX9-NEXT: v_mov_b32_e32 v30, s74 @@ -31467,7 +31491,12 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v22, s61 ; GFX9-NEXT: v_mov_b32_e32 v17, s60 ; GFX9-NEXT: v_mov_b32_e32 v19, s59 -; GFX9-NEXT: v_mov_b32_e32 v16, s58 +; GFX9-NEXT: v_mov_b32_e32 v16, s4 +; GFX9-NEXT: v_mov_b32_e32 v15, s6 +; GFX9-NEXT: v_mov_b32_e32 v14, s8 +; GFX9-NEXT: v_mov_b32_e32 v13, s10 +; GFX9-NEXT: v_mov_b32_e32 v9, s12 +; GFX9-NEXT: v_mov_b32_e32 v10, s58 ; GFX9-NEXT: v_mov_b32_e32 v18, s57 ; GFX9-NEXT: v_mov_b32_e32 v20, s56 ; GFX9-NEXT: v_mov_b32_e32 v23, s47 @@ -31482,34 +31511,29 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v38, s28 ; GFX9-NEXT: v_mov_b32_e32 v39, s27 ; GFX9-NEXT: v_mov_b32_e32 v48, s26 -; GFX9-NEXT: v_mov_b32_e32 v15, s4 -; GFX9-NEXT: v_mov_b32_e32 v14, s6 -; GFX9-NEXT: v_mov_b32_e32 v13, s8 -; GFX9-NEXT: v_mov_b32_e32 v12, s10 -; GFX9-NEXT: v_mov_b32_e32 v11, s12 ; GFX9-NEXT: .LBB75_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v15, v33, v15, s4 -; GFX9-NEXT: v_perm_b32 v9, v9, v35, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; GFX9-NEXT: v_or_b32_e32 v9, v9, v15 -; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v9, v10, v48, s4 -; GFX9-NEXT: v_perm_b32 v10, v39, v38, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 -; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v9, v30, v14, s4 +; GFX9-NEXT: v_perm_b32 v16, v33, v16, s4 +; GFX9-NEXT: v_perm_b32 v11, v11, v35, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX9-NEXT: v_or_b32_e32 v11, v11, v16 +; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen +; GFX9-NEXT: v_perm_b32 v11, v12, v48, s4 +; GFX9-NEXT: v_perm_b32 v12, v39, v38, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 +; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:4 +; GFX9-NEXT: v_perm_b32 v11, v30, v15, s4 ; GFX9-NEXT: v_perm_b32 v7, v7, v32, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; GFX9-NEXT: v_or_b32_e32 v7, v7, v9 +; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; GFX9-NEXT: v_or_b32_e32 v7, v7, v11 ; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:8 ; GFX9-NEXT: v_perm_b32 v7, v8, v37, s4 ; GFX9-NEXT: v_perm_b32 v8, v36, v34, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 ; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v7, v26, v13, s4 +; GFX9-NEXT: v_perm_b32 v7, v26, v14, s4 ; GFX9-NEXT: v_perm_b32 v5, v5, v27, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v7 @@ -31519,7 +31543,7 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v5, v21, v12, s4 +; GFX9-NEXT: v_perm_b32 v5, v21, v13, s4 ; GFX9-NEXT: v_perm_b32 v3, v3, v22, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 @@ -31529,13 +31553,13 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v3, v17, v11, s4 +; GFX9-NEXT: v_perm_b32 v3, v17, v9, s4 ; GFX9-NEXT: v_perm_b32 v1, v1, v19, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v3 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 ; GFX9-NEXT: v_perm_b32 v1, v2, v20, s4 -; GFX9-NEXT: v_perm_b32 v2, v18, v16, s4 +; GFX9-NEXT: v_perm_b32 v2, v18, v10, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 @@ -34137,10 +34161,10 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr20 +; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr18 ; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr11 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB78_2 @@ -34314,10 +34338,10 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr20 +; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr11 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB78_2 @@ -34399,8 +34423,8 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: .LBB78_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_perm_b32 v1, v1, v16, s4 +; GFX9-NEXT: v_perm_b32 v15, v48, v15, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v15, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; GFX9-NEXT: v_perm_b32 v1, v2, v39, s4 @@ -34827,14 +34851,14 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in ; SI-NEXT: s_lshr_b64 s[58:59], s[16:17], 16 ; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 8 ; SI-NEXT: .LBB79_3: ; %end -; SI-NEXT: s_lshl_b32 s5, s60, 8 -; SI-NEXT: s_and_b32 s7, s16, 0xff -; SI-NEXT: s_or_b32 s5, s7, s5 +; SI-NEXT: s_and_b32 s5, s16, 0xff +; SI-NEXT: s_lshl_b32 s7, s60, 8 +; SI-NEXT: s_or_b32 s5, s5, s7 ; SI-NEXT: s_and_b32 s7, s58, 0xff -; SI-NEXT: s_lshl_b32 s9, s56, 24 ; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_or_b32 s7, s9, s7 +; SI-NEXT: s_lshl_b32 s9, s56, 24 ; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s7, s9, s7 ; SI-NEXT: s_or_b32 s5, s5, s7 ; SI-NEXT: v_mov_b32_e32 v1, s5 ; SI-NEXT: s_and_b32 s5, s17, 0xff @@ -34843,13 +34867,13 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in ; SI-NEXT: s_and_b32 s7, s93, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_lshl_b32 s9, s92, 24 -; SI-NEXT: s_or_b32 s7, s9, s7 ; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_or_b32 s7, s9, s7 ; SI-NEXT: s_or_b32 s5, s5, s7 ; SI-NEXT: v_mov_b32_e32 v2, s5 -; SI-NEXT: s_lshl_b32 s5, s46, 8 -; SI-NEXT: s_and_b32 s7, s18, 0xff -; SI-NEXT: s_or_b32 s5, s7, s5 +; SI-NEXT: s_and_b32 s5, s18, 0xff +; SI-NEXT: s_lshl_b32 s7, s46, 8 +; SI-NEXT: s_or_b32 s5, s5, s7 ; SI-NEXT: s_and_b32 s7, s44, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_lshl_b32 s9, s42, 24 @@ -34983,10 +35007,10 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in ; SI-NEXT: ; implicit-def: $sgpr75 ; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr73 ; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: s_branch .LBB79_2 ; ; VI-LABEL: bitcast_v5i64_to_v40i8_scalar: diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll index 79c9fc7faf339..5e6211c86ed5a 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll @@ -2746,11 +2746,11 @@ define inreg <22 x i16> @bitcast_v11f32_to_v22i16_scalar(<11 x float> inreg %a, ; SI-NEXT: v_lshr_b64 v[16:17], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[17:18], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[13:14], v[10:11], 16 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v1 ; SI-NEXT: s_branch .LBB13_5 ; SI-NEXT: .LBB13_3: ; SI-NEXT: ; implicit-def: $sgpr14 @@ -2777,11 +2777,11 @@ define inreg <22 x i16> @bitcast_v11f32_to_v22i16_scalar(<11 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v10, s26 -; SI-NEXT: v_mov_b32_e32 v23, s27 -; SI-NEXT: v_mov_b32_e32 v22, s40 -; SI-NEXT: v_mov_b32_e32 v21, s41 -; SI-NEXT: v_mov_b32_e32 v20, s42 -; SI-NEXT: v_mov_b32_e32 v19, s43 +; SI-NEXT: v_mov_b32_e32 v14, s27 +; SI-NEXT: v_mov_b32_e32 v21, s40 +; SI-NEXT: v_mov_b32_e32 v20, s41 +; SI-NEXT: v_mov_b32_e32 v19, s42 +; SI-NEXT: v_mov_b32_e32 v18, s43 ; SI-NEXT: v_mov_b32_e32 v13, s8 ; SI-NEXT: v_mov_b32_e32 v17, s14 ; SI-NEXT: v_mov_b32_e32 v16, s12 @@ -2789,36 +2789,36 @@ define inreg <22 x i16> @bitcast_v11f32_to_v22i16_scalar(<11 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v12, s6 ; SI-NEXT: v_mov_b32_e32 v11, s4 ; SI-NEXT: .LBB13_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v17 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v14 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v1, v1, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 ; SI-NEXT: v_or_b32_e32 v2, v2, v14 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v21 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v3, v3, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v8, v8, v11 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v18 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_or_b32_e32 v4, v4, v14 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v20 ; SI-NEXT: v_or_b32_e32 v6, v6, v12 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v19 ; SI-NEXT: v_or_b32_e32 v9, v9, v11 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v13 +; SI-NEXT: v_or_b32_e32 v0, v0, v17 ; SI-NEXT: v_or_b32_e32 v5, v5, v14 ; SI-NEXT: v_or_b32_e32 v7, v7, v12 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 @@ -3724,11 +3724,11 @@ define inreg <22 x half> @bitcast_v11f32_to_v22f16_scalar(<11 x float> inreg %a, ; SI-NEXT: v_lshr_b64 v[16:17], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[17:18], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[13:14], v[10:11], 16 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v1 ; SI-NEXT: s_branch .LBB17_5 ; SI-NEXT: .LBB17_3: ; SI-NEXT: ; implicit-def: $sgpr14 @@ -3755,11 +3755,11 @@ define inreg <22 x half> @bitcast_v11f32_to_v22f16_scalar(<11 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v10, s26 -; SI-NEXT: v_mov_b32_e32 v23, s27 -; SI-NEXT: v_mov_b32_e32 v22, s40 -; SI-NEXT: v_mov_b32_e32 v21, s41 -; SI-NEXT: v_mov_b32_e32 v20, s42 -; SI-NEXT: v_mov_b32_e32 v19, s43 +; SI-NEXT: v_mov_b32_e32 v14, s27 +; SI-NEXT: v_mov_b32_e32 v21, s40 +; SI-NEXT: v_mov_b32_e32 v20, s41 +; SI-NEXT: v_mov_b32_e32 v19, s42 +; SI-NEXT: v_mov_b32_e32 v18, s43 ; SI-NEXT: v_mov_b32_e32 v13, s8 ; SI-NEXT: v_mov_b32_e32 v17, s14 ; SI-NEXT: v_mov_b32_e32 v16, s12 @@ -3767,36 +3767,36 @@ define inreg <22 x half> @bitcast_v11f32_to_v22f16_scalar(<11 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v12, s6 ; SI-NEXT: v_mov_b32_e32 v11, s4 ; SI-NEXT: .LBB17_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v17 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v14 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v1, v1, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 ; SI-NEXT: v_or_b32_e32 v2, v2, v14 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v21 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_or_b32_e32 v3, v3, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v8, v8, v11 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v18 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_or_b32_e32 v4, v4, v14 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v20 ; SI-NEXT: v_or_b32_e32 v6, v6, v12 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v19 ; SI-NEXT: v_or_b32_e32 v9, v9, v11 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v13 +; SI-NEXT: v_or_b32_e32 v0, v0, v17 ; SI-NEXT: v_or_b32_e32 v5, v5, v14 ; SI-NEXT: v_or_b32_e32 v7, v7, v12 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 @@ -4892,49 +4892,49 @@ define inreg <22 x half> @bitcast_v22i16_to_v22f16_scalar(<22 x i16> inreg %a, i ; SI-NEXT: s_cmp_lg_u32 s27, 0 ; SI-NEXT: s_cbranch_scc0 .LBB21_4 ; SI-NEXT: ; %bb.1: ; %cmp.false +; SI-NEXT: s_and_b32 s5, s26, 0xffff +; SI-NEXT: s_lshl_b32 s7, s56, 16 +; SI-NEXT: s_or_b32 s27, s5, s7 ; SI-NEXT: s_and_b32 s5, s17, 0xffff ; SI-NEXT: s_lshl_b32 s7, s57, 16 ; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s14, s62, 16 -; SI-NEXT: s_or_b32 s15, s5, s7 +; SI-NEXT: s_lshl_b32 s76, s62, 16 +; SI-NEXT: s_or_b32 s77, s5, s7 ; SI-NEXT: s_and_b32 s5, s19, 0xffff ; SI-NEXT: s_lshl_b32 s7, s58, 16 -; SI-NEXT: s_or_b32 s12, s4, s14 +; SI-NEXT: s_or_b32 s12, s4, s76 ; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s28, s63, 16 -; SI-NEXT: s_or_b32 s29, s5, s7 +; SI-NEXT: s_lshl_b32 s78, s63, 16 +; SI-NEXT: s_or_b32 s79, s5, s7 ; SI-NEXT: s_and_b32 s5, s21, 0xffff ; SI-NEXT: s_lshl_b32 s7, s59, 16 -; SI-NEXT: s_or_b32 s10, s4, s28 +; SI-NEXT: s_or_b32 s10, s4, s78 ; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s40, s72, 16 -; SI-NEXT: s_or_b32 s41, s5, s7 +; SI-NEXT: s_lshl_b32 s88, s72, 16 +; SI-NEXT: s_or_b32 s89, s5, s7 ; SI-NEXT: s_and_b32 s5, s23, 0xffff ; SI-NEXT: s_lshl_b32 s7, s60, 16 -; SI-NEXT: s_or_b32 s8, s4, s40 +; SI-NEXT: s_or_b32 s8, s4, s88 ; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s42, s73, 16 -; SI-NEXT: s_or_b32 s43, s5, s7 +; SI-NEXT: s_lshl_b32 s90, s73, 16 +; SI-NEXT: s_or_b32 s91, s5, s7 ; SI-NEXT: s_and_b32 s5, s25, 0xffff ; SI-NEXT: s_lshl_b32 s7, s61, 16 -; SI-NEXT: s_or_b32 s6, s4, s42 +; SI-NEXT: s_or_b32 s6, s4, s90 ; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s44, s74, 16 -; SI-NEXT: s_or_b32 s45, s5, s7 -; SI-NEXT: s_and_b32 s5, s26, 0xffff -; SI-NEXT: s_lshl_b32 s7, s56, 16 -; SI-NEXT: s_or_b32 s4, s4, s44 -; SI-NEXT: s_or_b32 s27, s5, s7 -; SI-NEXT: s_mov_b32 s13, s15 -; SI-NEXT: s_lshr_b64 s[14:15], s[14:15], 16 -; SI-NEXT: s_mov_b32 s11, s29 -; SI-NEXT: s_lshr_b64 s[28:29], s[28:29], 16 -; SI-NEXT: s_mov_b32 s9, s41 -; SI-NEXT: s_lshr_b64 s[40:41], s[40:41], 16 -; SI-NEXT: s_mov_b32 s7, s43 -; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 16 -; SI-NEXT: s_mov_b32 s5, s45 -; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16 +; SI-NEXT: s_lshl_b32 s92, s74, 16 +; SI-NEXT: s_or_b32 s93, s5, s7 +; SI-NEXT: s_or_b32 s4, s4, s92 +; SI-NEXT: s_lshr_b64 s[14:15], s[76:77], 16 +; SI-NEXT: s_lshr_b64 s[28:29], s[78:79], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[88:89], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[90:91], 16 +; SI-NEXT: s_lshr_b64 s[44:45], s[92:93], 16 +; SI-NEXT: s_mov_b32 s13, s77 +; SI-NEXT: s_mov_b32 s11, s79 +; SI-NEXT: s_mov_b32 s9, s89 +; SI-NEXT: s_mov_b32 s7, s91 +; SI-NEXT: s_mov_b32 s5, s93 ; SI-NEXT: s_cbranch_execnz .LBB21_3 ; SI-NEXT: .LBB21_2: ; %cmp.true ; SI-NEXT: s_add_i32 s24, s24, 3 @@ -5506,111 +5506,111 @@ define inreg <22 x i16> @bitcast_v22f16_to_v22i16_scalar(<22 x half> inreg %a, i ; SI-LABEL: bitcast_v22f16_to_v22i16_scalar: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: s_lshr_b32 s12, s26, 16 -; SI-NEXT: s_lshr_b32 s9, s25, 16 -; SI-NEXT: s_lshr_b32 s11, s24, 16 -; SI-NEXT: s_lshr_b32 s10, s23, 16 -; SI-NEXT: s_lshr_b32 s13, s22, 16 -; SI-NEXT: s_lshr_b32 s8, s21, 16 +; SI-NEXT: s_lshr_b32 s13, s26, 16 +; SI-NEXT: s_lshr_b32 s12, s25, 16 +; SI-NEXT: s_lshr_b32 s6, s24, 16 +; SI-NEXT: s_lshr_b32 s11, s23, 16 +; SI-NEXT: s_lshr_b32 s10, s22, 16 +; SI-NEXT: s_lshr_b32 s9, s21, 16 ; SI-NEXT: s_lshr_b32 s14, s20, 16 -; SI-NEXT: s_lshr_b32 s7, s19, 16 +; SI-NEXT: s_lshr_b32 s8, s19, 16 ; SI-NEXT: s_lshr_b32 s15, s18, 16 -; SI-NEXT: s_lshr_b32 s6, s17, 16 +; SI-NEXT: s_lshr_b32 s7, s17, 16 ; SI-NEXT: s_lshr_b32 s28, s16, 16 ; SI-NEXT: s_cmp_lg_u32 s27, 0 ; SI-NEXT: s_cbranch_scc0 .LBB23_3 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_cbranch_execnz .LBB23_4 ; SI-NEXT: .LBB23_2: ; %cmp.true +; SI-NEXT: v_cvt_f32_f16_e32 v0, s28 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s16 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s14 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s19 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s15 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 +; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s13 +; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v21, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s14 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s17 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v3 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v22, v3, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v3 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s12 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s10 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s13 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s26 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s12 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s8 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_or_b32_e32 v7, v1, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s21 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s7 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v3 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v3 +; SI-NEXT: v_or_b32_e32 v23, v1, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s25 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s11 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s17 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v22 -; SI-NEXT: v_or_b32_e32 v5, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s6 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s9 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v23 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s28 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v25, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v24 +; SI-NEXT: v_or_b32_e32 v9, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s9 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v25 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v26, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v3 -; SI-NEXT: v_or_b32_e32 v3, v12, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s25 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v26 -; SI-NEXT: v_or_b32_e32 v1, v13, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s26 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v9 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_or_b32_e32 v9, v9, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v20 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s18 -; SI-NEXT: v_or_b32_e32 v25, v12, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s20 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s15 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_or_b32_e32 v30, v10, v0 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v11 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s22 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s24 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v7, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s8 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v26 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s10 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_or_b32_e32 v5, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v27, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s7 +; SI-NEXT: v_or_b32_e32 v29, v6, v4 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v28, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v27 +; SI-NEXT: v_or_b32_e32 v3, v3, v10 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v28 +; SI-NEXT: v_or_b32_e32 v1, v1, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s22 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s24 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s6 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v31, v10, v2 -; SI-NEXT: v_or_b32_e32 v29, v11, v4 -; SI-NEXT: v_or_b32_e32 v28, v12, v6 -; SI-NEXT: v_or_b32_e32 v27, v13, v8 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v31, v8, v6 ; SI-NEXT: v_lshr_b64 v[18:19], v[0:1], 16 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v10 +; SI-NEXT: v_or_b32_e32 v30, v11, v8 ; SI-NEXT: v_lshr_b64 v[16:17], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[14:15], v[4:5], 16 ; SI-NEXT: v_lshr_b64 v[12:13], v[6:7], 16 @@ -5619,60 +5619,60 @@ define inreg <22 x i16> @bitcast_v22f16_to_v22i16_scalar(<22 x half> inreg %a, i ; SI-NEXT: .LBB23_3: ; SI-NEXT: s_branch .LBB23_2 ; SI-NEXT: .LBB23_4: -; SI-NEXT: v_mov_b32_e32 v20, s12 -; SI-NEXT: v_mov_b32_e32 v24, s9 -; SI-NEXT: v_mov_b32_e32 v21, s10 -; SI-NEXT: v_mov_b32_e32 v22, s8 -; SI-NEXT: v_mov_b32_e32 v23, s7 -; SI-NEXT: v_mov_b32_e32 v26, s6 +; SI-NEXT: v_mov_b32_e32 v20, s13 +; SI-NEXT: v_mov_b32_e32 v24, s12 +; SI-NEXT: v_mov_b32_e32 v25, s11 +; SI-NEXT: v_mov_b32_e32 v26, s9 +; SI-NEXT: v_mov_b32_e32 v27, s8 +; SI-NEXT: v_mov_b32_e32 v28, s7 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v25, s26 -; SI-NEXT: v_mov_b32_e32 v27, s24 -; SI-NEXT: v_mov_b32_e32 v28, s22 -; SI-NEXT: v_mov_b32_e32 v29, s20 -; SI-NEXT: v_mov_b32_e32 v31, s18 -; SI-NEXT: v_mov_b32_e32 v30, s16 ; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v23, s26 +; SI-NEXT: v_mov_b32_e32 v30, s24 +; SI-NEXT: v_mov_b32_e32 v31, s22 +; SI-NEXT: v_mov_b32_e32 v29, s20 +; SI-NEXT: v_mov_b32_e32 v22, s18 +; SI-NEXT: v_mov_b32_e32 v21, s16 ; SI-NEXT: v_mov_b32_e32 v18, s28 ; SI-NEXT: v_mov_b32_e32 v16, s15 ; SI-NEXT: v_mov_b32_e32 v14, s14 -; SI-NEXT: v_mov_b32_e32 v12, s13 -; SI-NEXT: v_mov_b32_e32 v10, s11 +; SI-NEXT: v_mov_b32_e32 v12, s10 +; SI-NEXT: v_mov_b32_e32 v10, s6 ; SI-NEXT: .LBB23_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v18 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v30 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v21 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v18 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v28 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v16 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v31 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v22 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v16 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v27 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v14 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v29 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v29 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v14 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v26 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v28 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v12 ; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v25 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v27 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v30 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v24 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v25 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v23 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v20 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: s_setpc_b64 s[30:31] @@ -5685,61 +5685,61 @@ define inreg <22 x i16> @bitcast_v22f16_to_v22i16_scalar(<22 x half> inreg %a, i ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB23_4 ; VI-NEXT: .LBB23_2: ; %cmp.true -; VI-NEXT: s_lshr_b32 s5, s25, 16 -; VI-NEXT: v_mov_b32_e32 v0, 0x200 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: s_lshr_b32 s5, s26, 16 -; VI-NEXT: v_add_f16_e32 v1, s25, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v4, s5 -; VI-NEXT: s_lshr_b32 s5, s24, 16 -; VI-NEXT: v_or_b32_e32 v9, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s24, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s23, 16 -; VI-NEXT: v_or_b32_e32 v8, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s23, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s22, 16 -; VI-NEXT: v_or_b32_e32 v7, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s22, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s21, 16 -; VI-NEXT: v_or_b32_e32 v6, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s21, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s20, 16 -; VI-NEXT: v_or_b32_e32 v5, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v3, s26, v0 -; VI-NEXT: v_add_f16_sdwa v4, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v1, s20, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s19, 16 -; VI-NEXT: v_or_b32_e32 v10, v3, v4 -; VI-NEXT: v_or_b32_e32 v4, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s19, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s18, 16 -; VI-NEXT: v_or_b32_e32 v3, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 ; VI-NEXT: s_lshr_b32 s4, s16, 16 -; VI-NEXT: v_add_f16_e32 v1, s18, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v2, v1, v2 ; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: s_lshr_b32 s4, s17, 16 -; VI-NEXT: v_add_f16_sdwa v12, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_mov_b32_e32 v2, s4 +; VI-NEXT: s_lshr_b32 s4, s18, 16 +; VI-NEXT: v_mov_b32_e32 v3, s4 +; VI-NEXT: s_lshr_b32 s4, s19, 16 +; VI-NEXT: v_mov_b32_e32 v4, s4 +; VI-NEXT: s_lshr_b32 s4, s20, 16 +; VI-NEXT: v_mov_b32_e32 v5, s4 +; VI-NEXT: s_lshr_b32 s4, s21, 16 +; VI-NEXT: s_lshr_b32 s6, s26, 16 +; VI-NEXT: v_mov_b32_e32 v0, 0x200 +; VI-NEXT: v_mov_b32_e32 v6, s4 +; VI-NEXT: s_lshr_b32 s4, s22, 16 +; VI-NEXT: v_mov_b32_e32 v10, s6 +; VI-NEXT: v_mov_b32_e32 v7, s4 +; VI-NEXT: s_lshr_b32 s4, s23, 16 +; VI-NEXT: s_lshr_b32 s5, s25, 16 +; VI-NEXT: v_add_f16_e32 v9, s26, v0 +; VI-NEXT: v_add_f16_sdwa v10, v10, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v8, s4 +; VI-NEXT: v_or_b32_e32 v10, v9, v10 +; VI-NEXT: v_mov_b32_e32 v9, s5 +; VI-NEXT: v_add_f16_sdwa v19, v8, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: s_lshr_b32 s4, s24, 16 +; VI-NEXT: v_add_f16_e32 v8, s25, v0 +; VI-NEXT: v_add_f16_sdwa v9, v9, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v9, v8, v9 +; VI-NEXT: v_mov_b32_e32 v8, s4 ; VI-NEXT: v_add_f16_e32 v11, s16, v0 -; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v0, s17, v0 -; VI-NEXT: v_or_b32_e32 v1, v0, v1 +; VI-NEXT: v_add_f16_sdwa v12, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, s17, v0 +; VI-NEXT: v_add_f16_sdwa v13, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s18, v0 +; VI-NEXT: v_add_f16_sdwa v14, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v3, s19, v0 +; VI-NEXT: v_add_f16_sdwa v15, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v4, s20, v0 +; VI-NEXT: v_add_f16_sdwa v16, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v5, s21, v0 +; VI-NEXT: v_add_f16_sdwa v17, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v6, s22, v0 +; VI-NEXT: v_add_f16_sdwa v18, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v7, s23, v0 +; VI-NEXT: v_add_f16_sdwa v8, v8, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v0, s24, v0 +; VI-NEXT: v_or_b32_e32 v8, v0, v8 +; VI-NEXT: v_or_b32_e32 v7, v7, v19 +; VI-NEXT: v_or_b32_e32 v6, v6, v18 +; VI-NEXT: v_or_b32_e32 v5, v5, v17 +; VI-NEXT: v_or_b32_e32 v4, v4, v16 +; VI-NEXT: v_or_b32_e32 v3, v3, v15 +; VI-NEXT: v_or_b32_e32 v2, v2, v14 +; VI-NEXT: v_or_b32_e32 v1, v1, v13 ; VI-NEXT: v_or_b32_e32 v0, v11, v12 ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB23_3: diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll index 6d91f0ea85573..b5f6981928c91 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll @@ -3128,10 +3128,10 @@ define <12 x i32> @bitcast_v24f16_to_v12i32(<24 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB18_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v23 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v36 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v22 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v22 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v35 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v21 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -3190,36 +3190,36 @@ define <12 x i32> @bitcast_v24f16_to_v12i32(<24 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB18_2 ; SI-NEXT: .LBB18_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v36 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v35 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v35 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v22 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v21 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v33 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v34 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v20 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v21 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v33 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v32 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v19 @@ -5093,12 +5093,12 @@ define inreg <24 x i16> @bitcast_v12f32_to_v24i16_scalar(<12 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[16:17], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[17:18], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v1 ; SI-NEXT: s_branch .LBB29_5 ; SI-NEXT: .LBB29_3: ; SI-NEXT: ; implicit-def: $sgpr14 @@ -5127,12 +5127,12 @@ define inreg <24 x i16> @bitcast_v12f32_to_v24i16_scalar(<12 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v10, s26 ; SI-NEXT: v_mov_b32_e32 v11, s27 -; SI-NEXT: v_mov_b32_e32 v24, s40 -; SI-NEXT: v_mov_b32_e32 v23, s41 -; SI-NEXT: v_mov_b32_e32 v22, s42 -; SI-NEXT: v_mov_b32_e32 v21, s43 -; SI-NEXT: v_mov_b32_e32 v20, s44 -; SI-NEXT: v_mov_b32_e32 v19, s45 +; SI-NEXT: v_mov_b32_e32 v23, s40 +; SI-NEXT: v_mov_b32_e32 v22, s41 +; SI-NEXT: v_mov_b32_e32 v21, s42 +; SI-NEXT: v_mov_b32_e32 v20, s43 +; SI-NEXT: v_mov_b32_e32 v19, s44 +; SI-NEXT: v_mov_b32_e32 v18, s45 ; SI-NEXT: v_mov_b32_e32 v17, s14 ; SI-NEXT: v_mov_b32_e32 v16, s12 ; SI-NEXT: v_mov_b32_e32 v15, s10 @@ -5140,36 +5140,36 @@ define inreg <24 x i16> @bitcast_v12f32_to_v24i16_scalar(<12 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v13, s6 ; SI-NEXT: v_mov_b32_e32 v12, s4 ; SI-NEXT: .LBB29_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v0, v0, v17 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v23 ; SI-NEXT: v_or_b32_e32 v2, v2, v16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v22 ; SI-NEXT: v_or_b32_e32 v4, v4, v15 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v21 ; SI-NEXT: v_or_b32_e32 v6, v6, v14 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v20 ; SI-NEXT: v_or_b32_e32 v8, v8, v13 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v19 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v18 ; SI-NEXT: v_or_b32_e32 v1, v1, v17 ; SI-NEXT: v_or_b32_e32 v3, v3, v16 ; SI-NEXT: v_or_b32_e32 v5, v5, v15 @@ -6127,12 +6127,12 @@ define inreg <24 x half> @bitcast_v12f32_to_v24f16_scalar(<12 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[16:17], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[17:18], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v1 ; SI-NEXT: s_branch .LBB33_5 ; SI-NEXT: .LBB33_3: ; SI-NEXT: ; implicit-def: $sgpr14 @@ -6161,12 +6161,12 @@ define inreg <24 x half> @bitcast_v12f32_to_v24f16_scalar(<12 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v10, s26 ; SI-NEXT: v_mov_b32_e32 v11, s27 -; SI-NEXT: v_mov_b32_e32 v24, s40 -; SI-NEXT: v_mov_b32_e32 v23, s41 -; SI-NEXT: v_mov_b32_e32 v22, s42 -; SI-NEXT: v_mov_b32_e32 v21, s43 -; SI-NEXT: v_mov_b32_e32 v20, s44 -; SI-NEXT: v_mov_b32_e32 v19, s45 +; SI-NEXT: v_mov_b32_e32 v23, s40 +; SI-NEXT: v_mov_b32_e32 v22, s41 +; SI-NEXT: v_mov_b32_e32 v21, s42 +; SI-NEXT: v_mov_b32_e32 v20, s43 +; SI-NEXT: v_mov_b32_e32 v19, s44 +; SI-NEXT: v_mov_b32_e32 v18, s45 ; SI-NEXT: v_mov_b32_e32 v17, s14 ; SI-NEXT: v_mov_b32_e32 v16, s12 ; SI-NEXT: v_mov_b32_e32 v15, s10 @@ -6174,36 +6174,36 @@ define inreg <24 x half> @bitcast_v12f32_to_v24f16_scalar(<12 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v13, s6 ; SI-NEXT: v_mov_b32_e32 v12, s4 ; SI-NEXT: .LBB33_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v0, v0, v17 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v23 ; SI-NEXT: v_or_b32_e32 v2, v2, v16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v22 ; SI-NEXT: v_or_b32_e32 v4, v4, v15 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v21 ; SI-NEXT: v_or_b32_e32 v6, v6, v14 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v20 ; SI-NEXT: v_or_b32_e32 v8, v8, v13 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v19 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v18 ; SI-NEXT: v_or_b32_e32 v1, v1, v17 ; SI-NEXT: v_or_b32_e32 v3, v3, v16 ; SI-NEXT: v_or_b32_e32 v5, v5, v15 @@ -6394,10 +6394,10 @@ define <12 x float> @bitcast_v24f16_to_v12f32(<24 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB34_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v23 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v36 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v22 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v22 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v35 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v21 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -6456,36 +6456,36 @@ define <12 x float> @bitcast_v24f16_to_v12f32(<24 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB34_2 ; SI-NEXT: .LBB34_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v36 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v35 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v35 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v22 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v21 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v33 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v34 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v20 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v21 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v33 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v32 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v19 @@ -7566,14 +7566,14 @@ define <24 x i16> @bitcast_v6f64_to_v24i16(<6 x double> %a, i32 %b) #0 { ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12 ; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr23 -; SI-NEXT: ; implicit-def: $vgpr18 +; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr15 ; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr14 ; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: ; implicit-def: $vgpr13 -; SI-NEXT: ; implicit-def: $vgpr17 +; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr12 ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc @@ -7584,10 +7584,10 @@ define <24 x i16> @bitcast_v6f64_to_v24i16(<6 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v13, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v14, v7, v6, 16 ; SI-NEXT: v_alignbit_b32 v15, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v18, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v17, v3, v2, 16 ; SI-NEXT: v_alignbit_b32 v20, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v3 @@ -7606,34 +7606,34 @@ define <24 x i16> @bitcast_v6f64_to_v24i16(<6 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v13, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v14, v7, v6, 16 ; SI-NEXT: v_alignbit_b32 v15, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v18, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v17, v3, v2, 16 ; SI-NEXT: v_alignbit_b32 v20, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v1 ; SI-NEXT: .LBB40_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v0, v0, v20 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v23 -; SI-NEXT: v_or_b32_e32 v2, v2, v18 +; SI-NEXT: v_or_b32_e32 v2, v2, v17 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v22 ; SI-NEXT: v_or_b32_e32 v4, v4, v15 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v21 @@ -7642,12 +7642,12 @@ define <24 x i16> @bitcast_v6f64_to_v24i16(<6 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v19 ; SI-NEXT: v_or_b32_e32 v8, v8, v13 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v18 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v16 ; SI-NEXT: v_or_b32_e32 v1, v1, v20 -; SI-NEXT: v_or_b32_e32 v3, v3, v18 +; SI-NEXT: v_or_b32_e32 v3, v3, v17 ; SI-NEXT: v_or_b32_e32 v5, v5, v15 ; SI-NEXT: v_or_b32_e32 v7, v7, v14 ; SI-NEXT: v_or_b32_e32 v9, v9, v13 @@ -7757,8 +7757,8 @@ define inreg <24 x i16> @bitcast_v6f64_to_v24i16_scalar(<6 x double> inreg %a, i ; SI-NEXT: v_lshr_b64 v[13:14], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[14:15], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[15:16], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[16:17], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[17:18], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v11 @@ -7766,7 +7766,7 @@ define inreg <24 x i16> @bitcast_v6f64_to_v24i16_scalar(<6 x double> inreg %a, i ; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v1 ; SI-NEXT: s_branch .LBB41_5 ; SI-NEXT: .LBB41_3: ; SI-NEXT: ; implicit-def: $sgpr14 @@ -7800,7 +7800,7 @@ define inreg <24 x i16> @bitcast_v6f64_to_v24i16_scalar(<6 x double> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v21, s43 ; SI-NEXT: v_mov_b32_e32 v22, s42 ; SI-NEXT: v_mov_b32_e32 v23, s41 -; SI-NEXT: v_mov_b32_e32 v24, s40 +; SI-NEXT: v_mov_b32_e32 v18, s40 ; SI-NEXT: v_mov_b32_e32 v17, s14 ; SI-NEXT: v_mov_b32_e32 v16, s12 ; SI-NEXT: v_mov_b32_e32 v15, s10 @@ -7808,12 +7808,12 @@ define inreg <24 x i16> @bitcast_v6f64_to_v24i16_scalar(<6 x double> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v13, s6 ; SI-NEXT: v_mov_b32_e32 v12, s4 ; SI-NEXT: .LBB41_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 @@ -7822,7 +7822,7 @@ define inreg <24 x i16> @bitcast_v6f64_to_v24i16_scalar(<6 x double> inreg %a, i ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v0, v0, v17 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18 ; SI-NEXT: v_or_b32_e32 v2, v2, v16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v23 @@ -8589,14 +8589,14 @@ define <24 x half> @bitcast_v6f64_to_v24f16(<6 x double> %a, i32 %b) #0 { ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12 ; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr23 -; SI-NEXT: ; implicit-def: $vgpr18 +; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr15 ; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr14 ; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: ; implicit-def: $vgpr13 -; SI-NEXT: ; implicit-def: $vgpr17 +; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr12 ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc @@ -8607,10 +8607,10 @@ define <24 x half> @bitcast_v6f64_to_v24f16(<6 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v13, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v14, v7, v6, 16 ; SI-NEXT: v_alignbit_b32 v15, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v18, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v17, v3, v2, 16 ; SI-NEXT: v_alignbit_b32 v20, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v3 @@ -8629,34 +8629,34 @@ define <24 x half> @bitcast_v6f64_to_v24f16(<6 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v13, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v14, v7, v6, 16 ; SI-NEXT: v_alignbit_b32 v15, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v18, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v17, v3, v2, 16 ; SI-NEXT: v_alignbit_b32 v20, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v1 ; SI-NEXT: .LBB44_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v0, v0, v20 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v23 -; SI-NEXT: v_or_b32_e32 v2, v2, v18 +; SI-NEXT: v_or_b32_e32 v2, v2, v17 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v22 ; SI-NEXT: v_or_b32_e32 v4, v4, v15 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v21 @@ -8665,12 +8665,12 @@ define <24 x half> @bitcast_v6f64_to_v24f16(<6 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v19 ; SI-NEXT: v_or_b32_e32 v8, v8, v13 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v18 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v16 ; SI-NEXT: v_or_b32_e32 v1, v1, v20 -; SI-NEXT: v_or_b32_e32 v3, v3, v18 +; SI-NEXT: v_or_b32_e32 v3, v3, v17 ; SI-NEXT: v_or_b32_e32 v5, v5, v15 ; SI-NEXT: v_or_b32_e32 v7, v7, v14 ; SI-NEXT: v_or_b32_e32 v9, v9, v13 @@ -8780,8 +8780,8 @@ define inreg <24 x half> @bitcast_v6f64_to_v24f16_scalar(<6 x double> inreg %a, ; SI-NEXT: v_lshr_b64 v[13:14], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[14:15], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[15:16], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[16:17], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[17:18], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v11 @@ -8789,7 +8789,7 @@ define inreg <24 x half> @bitcast_v6f64_to_v24f16_scalar(<6 x double> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v1 ; SI-NEXT: s_branch .LBB45_5 ; SI-NEXT: .LBB45_3: ; SI-NEXT: ; implicit-def: $sgpr14 @@ -8823,7 +8823,7 @@ define inreg <24 x half> @bitcast_v6f64_to_v24f16_scalar(<6 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v21, s43 ; SI-NEXT: v_mov_b32_e32 v22, s42 ; SI-NEXT: v_mov_b32_e32 v23, s41 -; SI-NEXT: v_mov_b32_e32 v24, s40 +; SI-NEXT: v_mov_b32_e32 v18, s40 ; SI-NEXT: v_mov_b32_e32 v17, s14 ; SI-NEXT: v_mov_b32_e32 v16, s12 ; SI-NEXT: v_mov_b32_e32 v15, s10 @@ -8831,12 +8831,12 @@ define inreg <24 x half> @bitcast_v6f64_to_v24f16_scalar(<6 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v13, s6 ; SI-NEXT: v_mov_b32_e32 v12, s4 ; SI-NEXT: .LBB45_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 @@ -8845,7 +8845,7 @@ define inreg <24 x half> @bitcast_v6f64_to_v24f16_scalar(<6 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v0, v0, v17 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18 ; SI-NEXT: v_or_b32_e32 v2, v2, v16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v23 @@ -9033,10 +9033,10 @@ define <6 x double> @bitcast_v24f16_to_v6f64(<24 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB46_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v27 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v26 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v26 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v38 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v25 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -9095,36 +9095,36 @@ define <6 x double> @bitcast_v24f16_to_v6f64(<24 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB46_2 ; SI-NEXT: .LBB46_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v39 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v38 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v27 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v38 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v26 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v37 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v25 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v36 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v37 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v24 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v25 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v36 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v35 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v23 @@ -11218,10 +11218,10 @@ define <6 x i64> @bitcast_v24f16_to_v6i64(<24 x half> %a, i32 %b) #0 { ; SI-NEXT: .LBB54_3: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v27 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v26 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v26 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v38 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v25 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -11280,36 +11280,36 @@ define <6 x i64> @bitcast_v24f16_to_v6i64(<24 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB54_2 ; SI-NEXT: .LBB54_4: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v39 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v38 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v27 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v38 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v26 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v37 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v25 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v36 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v37 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v24 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v25 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v36 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v35 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v23 @@ -12218,6 +12218,12 @@ define inreg <24 x half> @bitcast_v24i16_to_v24f16_scalar(<24 x i16> inreg %a, i ; SI-LABEL: bitcast_v24i16_to_v24f16_scalar: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: s_mov_b64 exec, s[4:5] +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_writelane_b32 v12, s30, 0 +; SI-NEXT: v_writelane_b32 v12, s31, 1 ; SI-NEXT: s_lshr_b32 s73, s27, 16 ; SI-NEXT: s_lshr_b32 s79, s26, 16 ; SI-NEXT: s_lshr_b32 s72, s25, 16 @@ -12235,106 +12241,102 @@ define inreg <24 x half> @bitcast_v24i16_to_v24f16_scalar(<24 x i16> inreg %a, i ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_and_b32 s5, s17, 0xffff ; SI-NEXT: s_lshl_b32 s7, s60, 16 -; SI-NEXT: s_or_b32 s13, s5, s7 +; SI-NEXT: s_and_b32 s4, s16, 0xffff +; SI-NEXT: s_lshl_b32 s88, s74, 16 +; SI-NEXT: s_or_b32 s89, s5, s7 ; SI-NEXT: s_and_b32 s5, s19, 0xffff ; SI-NEXT: s_lshl_b32 s7, s61, 16 -; SI-NEXT: s_or_b32 s15, s5, s7 +; SI-NEXT: s_or_b32 s14, s4, s88 +; SI-NEXT: s_and_b32 s4, s18, 0xffff +; SI-NEXT: s_lshl_b32 s90, s75, 16 +; SI-NEXT: s_or_b32 s91, s5, s7 ; SI-NEXT: s_and_b32 s5, s21, 0xffff ; SI-NEXT: s_lshl_b32 s7, s62, 16 -; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s12, s74, 16 -; SI-NEXT: s_or_b32 s43, s5, s7 +; SI-NEXT: s_or_b32 s12, s4, s90 +; SI-NEXT: s_and_b32 s4, s20, 0xffff +; SI-NEXT: s_lshl_b32 s92, s76, 16 +; SI-NEXT: s_or_b32 s93, s5, s7 ; SI-NEXT: s_and_b32 s5, s23, 0xffff ; SI-NEXT: s_lshl_b32 s7, s63, 16 -; SI-NEXT: s_or_b32 s10, s4, s12 -; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s14, s75, 16 -; SI-NEXT: s_or_b32 s45, s5, s7 +; SI-NEXT: s_or_b32 s10, s4, s92 +; SI-NEXT: s_and_b32 s4, s22, 0xffff +; SI-NEXT: s_lshl_b32 s94, s77, 16 +; SI-NEXT: s_or_b32 s95, s5, s7 ; SI-NEXT: s_and_b32 s5, s25, 0xffff ; SI-NEXT: s_lshl_b32 s7, s72, 16 -; SI-NEXT: s_or_b32 s8, s4, s14 -; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s42, s76, 16 -; SI-NEXT: s_lshl_b32 s46, s78, 16 -; SI-NEXT: s_or_b32 s47, s5, s7 +; SI-NEXT: s_or_b32 s8, s4, s94 +; SI-NEXT: s_and_b32 s4, s24, 0xffff +; SI-NEXT: s_lshl_b32 vcc_lo, s78, 16 +; SI-NEXT: s_or_b32 vcc_hi, s5, s7 ; SI-NEXT: s_and_b32 s5, s27, 0xffff ; SI-NEXT: s_lshl_b32 s7, s73, 16 -; SI-NEXT: s_lshr_b64 s[28:29], s[12:13], 16 -; SI-NEXT: s_and_b32 s12, s24, 0xffff -; SI-NEXT: s_or_b32 s6, s4, s42 -; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s44, s77, 16 -; SI-NEXT: s_or_b32 s57, s5, s7 -; SI-NEXT: s_lshl_b32 s56, s79, 16 -; SI-NEXT: s_lshr_b64 s[40:41], s[14:15], 16 -; SI-NEXT: s_or_b32 s14, s12, s46 -; SI-NEXT: s_and_b32 s12, s26, 0xffff -; SI-NEXT: s_or_b32 s4, s4, s44 -; SI-NEXT: s_mov_b32 s11, s13 -; SI-NEXT: s_mov_b32 s9, s15 -; SI-NEXT: s_mov_b32 s7, s43 -; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 16 -; SI-NEXT: s_mov_b32 s5, s45 -; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16 -; SI-NEXT: s_mov_b32 s15, s47 -; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16 -; SI-NEXT: s_or_b32 s12, s12, s56 -; SI-NEXT: s_mov_b32 s13, s57 -; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16 +; SI-NEXT: s_or_b32 s6, s4, vcc_lo +; SI-NEXT: s_and_b32 s4, s26, 0xffff +; SI-NEXT: s_lshl_b32 s30, s79, 16 +; SI-NEXT: s_or_b32 s31, s5, s7 +; SI-NEXT: s_or_b32 s4, s4, s30 +; SI-NEXT: s_lshr_b64 s[28:29], s[88:89], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[90:91], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[92:93], 16 +; SI-NEXT: s_lshr_b64 s[44:45], s[94:95], 16 +; SI-NEXT: s_lshr_b64 s[46:47], vcc, 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[30:31], 16 +; SI-NEXT: s_mov_b32 s15, s89 +; SI-NEXT: s_mov_b32 s13, s91 +; SI-NEXT: s_mov_b32 s11, s93 +; SI-NEXT: s_mov_b32 s9, s95 +; SI-NEXT: s_mov_b32 s7, vcc_hi +; SI-NEXT: s_mov_b32 s5, s31 ; SI-NEXT: s_cbranch_execnz .LBB57_3 ; SI-NEXT: .LBB57_2: ; %cmp.true ; SI-NEXT: s_add_i32 s26, s26, 3 ; SI-NEXT: s_and_b32 s4, s26, 0xffff ; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s27, s27, 3 -; SI-NEXT: s_add_i32 s12, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s27, 0xffff -; SI-NEXT: s_lshl_b32 s5, s73, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_and_b32 s5, s27, 0xffff +; SI-NEXT: s_lshl_b32 s6, s73, 16 ; SI-NEXT: s_add_i32 s24, s24, 3 -; SI-NEXT: s_add_i32 s13, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s5, s78, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_or_b32 s5, s6, s5 +; SI-NEXT: s_and_b32 s6, s24, 0xffff +; SI-NEXT: s_lshl_b32 s7, s78, 16 ; SI-NEXT: s_add_i32 s25, s25, 3 -; SI-NEXT: s_add_i32 s14, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s25, 0xffff -; SI-NEXT: s_lshl_b32 s5, s72, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_or_b32 s6, s7, s6 +; SI-NEXT: s_and_b32 s7, s25, 0xffff +; SI-NEXT: s_lshl_b32 s8, s72, 16 ; SI-NEXT: s_add_i32 s22, s22, 3 -; SI-NEXT: s_add_i32 s15, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s5, s77, 16 +; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_and_b32 s8, s22, 0xffff +; SI-NEXT: s_lshl_b32 s9, s77, 16 ; SI-NEXT: s_add_i32 s23, s23, 3 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s23, 0xffff -; SI-NEXT: s_lshl_b32 s6, s63, 16 +; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_and_b32 s9, s23, 0xffff +; SI-NEXT: s_lshl_b32 s10, s63, 16 ; SI-NEXT: s_add_i32 s20, s20, 3 -; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s20, 0xffff -; SI-NEXT: s_lshl_b32 s7, s76, 16 +; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: s_and_b32 s10, s20, 0xffff +; SI-NEXT: s_lshl_b32 s11, s76, 16 ; SI-NEXT: s_add_i32 s21, s21, 3 -; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s21, 0xffff -; SI-NEXT: s_lshl_b32 s8, s62, 16 +; SI-NEXT: s_or_b32 s10, s11, s10 +; SI-NEXT: s_and_b32 s11, s21, 0xffff +; SI-NEXT: s_lshl_b32 s12, s62, 16 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s18, 0xffff -; SI-NEXT: s_lshl_b32 s9, s75, 16 +; SI-NEXT: s_or_b32 s11, s12, s11 +; SI-NEXT: s_and_b32 s12, s18, 0xffff +; SI-NEXT: s_lshl_b32 s13, s75, 16 ; SI-NEXT: s_add_i32 s19, s19, 3 -; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s19, 0xffff -; SI-NEXT: s_lshl_b32 s10, s61, 16 +; SI-NEXT: s_or_b32 s12, s13, s12 +; SI-NEXT: s_and_b32 s13, s19, 0xffff +; SI-NEXT: s_lshl_b32 s14, s61, 16 ; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s16, 0xffff -; SI-NEXT: s_lshl_b32 s11, s74, 16 +; SI-NEXT: s_or_b32 s13, s14, s13 +; SI-NEXT: s_and_b32 s14, s16, 0xffff +; SI-NEXT: s_lshl_b32 s15, s74, 16 ; SI-NEXT: s_add_i32 s17, s17, 3 -; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s17, 0xffff +; SI-NEXT: s_or_b32 s14, s15, s14 +; SI-NEXT: s_and_b32 s15, s17, 0xffff ; SI-NEXT: s_lshl_b32 s16, s60, 16 -; SI-NEXT: s_or_b32 s11, s16, s11 +; SI-NEXT: s_or_b32 s15, s16, s15 ; SI-NEXT: s_add_i32 s4, s4, 0x30000 ; SI-NEXT: s_add_i32 s5, s5, 0x30000 ; SI-NEXT: s_add_i32 s6, s6, 0x30000 @@ -12343,80 +12345,90 @@ define inreg <24 x half> @bitcast_v24i16_to_v24f16_scalar(<24 x i16> inreg %a, i ; SI-NEXT: s_add_i32 s9, s9, 0x30000 ; SI-NEXT: s_add_i32 s10, s10, 0x30000 ; SI-NEXT: s_add_i32 s11, s11, 0x30000 -; SI-NEXT: s_lshr_b64 s[28:29], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[40:41], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16 -; SI-NEXT: s_lshr_b32 s60, s11, 16 -; SI-NEXT: s_lshr_b32 s61, s9, 16 -; SI-NEXT: s_lshr_b32 s62, s7, 16 -; SI-NEXT: s_lshr_b32 s63, s5, 16 -; SI-NEXT: s_lshr_b32 s72, s15, 16 -; SI-NEXT: s_lshr_b32 s73, s13, 16 +; SI-NEXT: s_add_i32 s12, s12, 0x30000 +; SI-NEXT: s_add_i32 s13, s13, 0x30000 +; SI-NEXT: s_add_i32 s14, s14, 0x30000 +; SI-NEXT: s_add_i32 s15, s15, 0x30000 +; SI-NEXT: s_lshr_b64 s[28:29], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[4:5], 16 +; SI-NEXT: s_lshr_b32 s60, s15, 16 +; SI-NEXT: s_lshr_b32 s61, s13, 16 +; SI-NEXT: s_lshr_b32 s62, s11, 16 +; SI-NEXT: s_lshr_b32 s63, s9, 16 +; SI-NEXT: s_lshr_b32 s72, s7, 16 +; SI-NEXT: s_lshr_b32 s73, s5, 16 ; SI-NEXT: .LBB57_3: ; %end -; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_and_b32 s14, s14, 0xffff ; SI-NEXT: s_lshl_b32 s16, s28, 16 +; SI-NEXT: s_or_b32 s14, s14, s16 +; SI-NEXT: s_and_b32 s15, s15, 0xffff +; SI-NEXT: s_lshl_b32 s16, s60, 16 +; SI-NEXT: s_or_b32 s15, s15, s16 +; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: s_lshl_b32 s16, s40, 16 +; SI-NEXT: s_or_b32 s12, s12, s16 +; SI-NEXT: s_and_b32 s13, s13, 0xffff +; SI-NEXT: s_lshl_b32 s16, s61, 16 +; SI-NEXT: s_or_b32 s13, s13, s16 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_lshl_b32 s16, s42, 16 ; SI-NEXT: s_or_b32 s10, s10, s16 ; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s16, s60, 16 +; SI-NEXT: s_lshl_b32 s16, s62, 16 ; SI-NEXT: s_or_b32 s11, s11, s16 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s16, s40, 16 +; SI-NEXT: s_lshl_b32 s16, s44, 16 ; SI-NEXT: s_or_b32 s8, s8, s16 ; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s16, s61, 16 +; SI-NEXT: s_lshl_b32 s16, s63, 16 ; SI-NEXT: s_or_b32 s9, s9, s16 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s16, s42, 16 +; SI-NEXT: s_lshl_b32 s16, s46, 16 ; SI-NEXT: s_or_b32 s6, s6, s16 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s16, s62, 16 +; SI-NEXT: s_lshl_b32 s16, s72, 16 ; SI-NEXT: s_or_b32 s7, s7, s16 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s16, s44, 16 +; SI-NEXT: s_lshl_b32 s16, s56, 16 ; SI-NEXT: s_or_b32 s4, s4, s16 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s16, s63, 16 -; SI-NEXT: s_or_b32 s5, s5, s16 -; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s16, s46, 16 -; SI-NEXT: s_or_b32 s14, s14, s16 -; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s16, s72, 16 -; SI-NEXT: s_or_b32 s15, s15, s16 -; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s16, s56, 16 -; SI-NEXT: s_or_b32 s12, s12, s16 -; SI-NEXT: s_and_b32 s13, s13, 0xffff ; SI-NEXT: s_lshl_b32 s16, s73, 16 -; SI-NEXT: s_or_b32 s13, s13, s16 -; SI-NEXT: v_mov_b32_e32 v0, s10 -; SI-NEXT: v_mov_b32_e32 v1, s11 -; SI-NEXT: v_mov_b32_e32 v2, s8 -; SI-NEXT: v_mov_b32_e32 v3, s9 -; SI-NEXT: v_mov_b32_e32 v4, s6 -; SI-NEXT: v_mov_b32_e32 v5, s7 -; SI-NEXT: v_mov_b32_e32 v6, s4 -; SI-NEXT: v_mov_b32_e32 v7, s5 -; SI-NEXT: v_mov_b32_e32 v8, s14 -; SI-NEXT: v_mov_b32_e32 v9, s15 -; SI-NEXT: v_mov_b32_e32 v10, s12 -; SI-NEXT: v_mov_b32_e32 v11, s13 +; SI-NEXT: s_or_b32 s5, s5, s16 +; SI-NEXT: v_readlane_b32 s30, v12, 0 +; SI-NEXT: v_mov_b32_e32 v0, s14 +; SI-NEXT: v_mov_b32_e32 v1, s15 +; SI-NEXT: v_mov_b32_e32 v2, s12 +; SI-NEXT: v_mov_b32_e32 v3, s13 +; SI-NEXT: v_mov_b32_e32 v4, s10 +; SI-NEXT: v_mov_b32_e32 v5, s11 +; SI-NEXT: v_mov_b32_e32 v6, s8 +; SI-NEXT: v_mov_b32_e32 v7, s9 +; SI-NEXT: v_mov_b32_e32 v8, s6 +; SI-NEXT: v_mov_b32_e32 v9, s7 +; SI-NEXT: v_mov_b32_e32 v10, s4 +; SI-NEXT: v_mov_b32_e32 v11, s5 +; SI-NEXT: v_readlane_b32 s31, v12, 1 +; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: s_mov_b64 exec, s[4:5] +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB57_4: -; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr28 -; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr12 ; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: s_branch .LBB57_2 ; @@ -12889,119 +12901,119 @@ define inreg <24 x i16> @bitcast_v24f16_to_v24i16_scalar(<24 x half> inreg %a, i ; SI-LABEL: bitcast_v24f16_to_v24i16_scalar: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: s_lshr_b32 s13, s27, 16 -; SI-NEXT: s_lshr_b32 s8, s26, 16 -; SI-NEXT: s_lshr_b32 s10, s25, 16 -; SI-NEXT: s_lshr_b32 s9, s24, 16 -; SI-NEXT: s_lshr_b32 s12, s23, 16 -; SI-NEXT: s_lshr_b32 s14, s22, 16 -; SI-NEXT: s_lshr_b32 s11, s21, 16 +; SI-NEXT: s_lshr_b32 s14, s27, 16 +; SI-NEXT: s_lshr_b32 s6, s26, 16 +; SI-NEXT: s_lshr_b32 s13, s25, 16 +; SI-NEXT: s_lshr_b32 s7, s24, 16 +; SI-NEXT: s_lshr_b32 s11, s23, 16 +; SI-NEXT: s_lshr_b32 s12, s22, 16 +; SI-NEXT: s_lshr_b32 s10, s21, 16 ; SI-NEXT: s_lshr_b32 s15, s20, 16 -; SI-NEXT: s_lshr_b32 s7, s19, 16 +; SI-NEXT: s_lshr_b32 s9, s19, 16 ; SI-NEXT: s_lshr_b32 s29, s18, 16 -; SI-NEXT: s_lshr_b32 s6, s17, 16 +; SI-NEXT: s_lshr_b32 s8, s17, 16 ; SI-NEXT: s_lshr_b32 s40, s16, 16 ; SI-NEXT: s_cmp_lg_u32 s28, 0 ; SI-NEXT: s_cbranch_scc0 .LBB59_3 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_cbranch_execnz .LBB59_4 ; SI-NEXT: .LBB59_2: ; %cmp.true -; SI-NEXT: v_cvt_f32_f16_e32 v1, s29 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s15 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s14 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v0, s40 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s29 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s16 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 +; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v2 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s9 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s19 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s8 +; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s13 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s12 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s15 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v25, v1, v0 +; SI-NEXT: v_or_b32_e32 v24, v3, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s20 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s14 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s27 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v26, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s17 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s11 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v25 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_or_b32_e32 v7, v1, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s21 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s13 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v26 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_or_b32_e32 v11, v1, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s25 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s11 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s7 -; SI-NEXT: v_cvt_f16_f32_e32 v26, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v27, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v27, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v26 -; SI-NEXT: v_or_b32_e32 v5, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s6 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s10 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v27 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v28, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v27 +; SI-NEXT: v_or_b32_e32 v9, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s10 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v28 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v29, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v3 -; SI-NEXT: v_or_b32_e32 v3, v11, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s25 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v29 -; SI-NEXT: v_or_b32_e32 v1, v13, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s27 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v28, v9 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s40 -; SI-NEXT: v_cvt_f32_f16_e32 v10, s16 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s18 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v28 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_or_b32_e32 v9, v9, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v24 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v7, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s9 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v29 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s17 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_or_b32_e32 v5, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v30, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s12 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v31, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v30 +; SI-NEXT: v_or_b32_e32 v3, v3, v10 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v31 +; SI-NEXT: v_or_b32_e32 v1, v1, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s22 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_or_b32_e32 v11, v11, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v10 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v10 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s20 -; SI-NEXT: v_or_b32_e32 v34, v13, v0 -; SI-NEXT: v_or_b32_e32 v32, v14, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s22 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s24 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s26 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s7 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v35, v12, v4 -; SI-NEXT: v_or_b32_e32 v33, v13, v6 -; SI-NEXT: v_or_b32_e32 v31, v14, v8 -; SI-NEXT: v_or_b32_e32 v30, v15, v10 +; SI-NEXT: v_or_b32_e32 v33, v6, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s24 +; SI-NEXT: v_or_b32_e32 v32, v10, v6 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s6 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s26 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v8 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v8 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v10 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v12 +; SI-NEXT: v_or_b32_e32 v35, v14, v8 +; SI-NEXT: v_or_b32_e32 v34, v13, v10 ; SI-NEXT: v_lshr_b64 v[22:23], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[20:21], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[18:19], v[4:5], 16 @@ -13012,66 +13024,66 @@ define inreg <24 x i16> @bitcast_v24f16_to_v24i16_scalar(<24 x half> inreg %a, i ; SI-NEXT: .LBB59_3: ; SI-NEXT: s_branch .LBB59_2 ; SI-NEXT: .LBB59_4: -; SI-NEXT: v_mov_b32_e32 v24, s13 -; SI-NEXT: v_mov_b32_e32 v28, s10 -; SI-NEXT: v_mov_b32_e32 v25, s12 -; SI-NEXT: v_mov_b32_e32 v26, s11 -; SI-NEXT: v_mov_b32_e32 v27, s7 -; SI-NEXT: v_mov_b32_e32 v29, s6 +; SI-NEXT: v_mov_b32_e32 v26, s14 +; SI-NEXT: v_mov_b32_e32 v27, s13 +; SI-NEXT: v_mov_b32_e32 v28, s11 +; SI-NEXT: v_mov_b32_e32 v29, s10 +; SI-NEXT: v_mov_b32_e32 v30, s9 +; SI-NEXT: v_mov_b32_e32 v31, s8 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v30, s26 -; SI-NEXT: v_mov_b32_e32 v31, s24 -; SI-NEXT: v_mov_b32_e32 v33, s22 -; SI-NEXT: v_mov_b32_e32 v35, s20 -; SI-NEXT: v_mov_b32_e32 v32, s18 -; SI-NEXT: v_mov_b32_e32 v34, s16 ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v34, s26 +; SI-NEXT: v_mov_b32_e32 v35, s24 +; SI-NEXT: v_mov_b32_e32 v32, s22 +; SI-NEXT: v_mov_b32_e32 v33, s20 +; SI-NEXT: v_mov_b32_e32 v24, s18 +; SI-NEXT: v_mov_b32_e32 v25, s16 ; SI-NEXT: v_mov_b32_e32 v22, s40 ; SI-NEXT: v_mov_b32_e32 v20, s29 ; SI-NEXT: v_mov_b32_e32 v18, s15 -; SI-NEXT: v_mov_b32_e32 v16, s14 -; SI-NEXT: v_mov_b32_e32 v14, s9 -; SI-NEXT: v_mov_b32_e32 v12, s8 +; SI-NEXT: v_mov_b32_e32 v16, s12 +; SI-NEXT: v_mov_b32_e32 v14, s7 +; SI-NEXT: v_mov_b32_e32 v12, s6 ; SI-NEXT: .LBB59_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v22 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v34 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v25 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v22 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v31 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v20 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v32 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v24 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v20 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v30 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v18 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v35 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v33 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v18 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v29 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v33 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v32 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v16 ; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v28 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v31 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v35 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v14 ; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v27 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v30 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v34 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v26 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: s_setpc_b64 s[30:31] ; @@ -13083,66 +13095,66 @@ define inreg <24 x i16> @bitcast_v24f16_to_v24i16_scalar(<24 x half> inreg %a, i ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB59_4 ; VI-NEXT: .LBB59_2: ; %cmp.true -; VI-NEXT: s_lshr_b32 s5, s26, 16 -; VI-NEXT: v_mov_b32_e32 v0, 0x200 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: s_lshr_b32 s5, s27, 16 -; VI-NEXT: v_add_f16_e32 v1, s26, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v4, s5 -; VI-NEXT: s_lshr_b32 s5, s25, 16 -; VI-NEXT: v_or_b32_e32 v10, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s25, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s24, 16 -; VI-NEXT: v_or_b32_e32 v9, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s24, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s23, 16 -; VI-NEXT: v_or_b32_e32 v8, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s23, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s22, 16 -; VI-NEXT: v_or_b32_e32 v7, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s22, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s21, 16 -; VI-NEXT: v_or_b32_e32 v6, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s21, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s20, 16 -; VI-NEXT: v_or_b32_e32 v5, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v3, s27, v0 -; VI-NEXT: v_add_f16_sdwa v4, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v1, s20, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s19, 16 -; VI-NEXT: v_or_b32_e32 v11, v3, v4 -; VI-NEXT: v_or_b32_e32 v4, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s19, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s18, 16 -; VI-NEXT: v_or_b32_e32 v3, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 ; VI-NEXT: s_lshr_b32 s4, s16, 16 -; VI-NEXT: v_add_f16_e32 v1, s18, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v2, v1, v2 +; VI-NEXT: s_lshr_b32 s8, s27, 16 +; VI-NEXT: v_mov_b32_e32 v0, 0x200 ; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: s_lshr_b32 s4, s17, 16 -; VI-NEXT: v_add_f16_sdwa v13, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_mov_b32_e32 v11, s8 +; VI-NEXT: v_mov_b32_e32 v2, s4 +; VI-NEXT: s_lshr_b32 s4, s18, 16 +; VI-NEXT: s_lshr_b32 s7, s26, 16 +; VI-NEXT: v_add_f16_e32 v10, s27, v0 +; VI-NEXT: v_add_f16_sdwa v11, v11, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v3, s4 +; VI-NEXT: s_lshr_b32 s4, s19, 16 +; VI-NEXT: v_or_b32_e32 v11, v10, v11 +; VI-NEXT: v_mov_b32_e32 v10, s7 +; VI-NEXT: v_mov_b32_e32 v4, s4 +; VI-NEXT: s_lshr_b32 s4, s20, 16 +; VI-NEXT: s_lshr_b32 s6, s25, 16 +; VI-NEXT: v_add_f16_e32 v9, s26, v0 +; VI-NEXT: v_add_f16_sdwa v10, v10, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v5, s4 +; VI-NEXT: s_lshr_b32 s4, s21, 16 +; VI-NEXT: v_or_b32_e32 v10, v9, v10 +; VI-NEXT: v_mov_b32_e32 v9, s6 +; VI-NEXT: v_mov_b32_e32 v6, s4 +; VI-NEXT: s_lshr_b32 s4, s22, 16 +; VI-NEXT: s_lshr_b32 s5, s24, 16 +; VI-NEXT: v_add_f16_e32 v8, s25, v0 +; VI-NEXT: v_add_f16_sdwa v9, v9, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v7, s4 +; VI-NEXT: v_or_b32_e32 v9, v8, v9 +; VI-NEXT: v_mov_b32_e32 v8, s5 +; VI-NEXT: v_add_f16_sdwa v19, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: s_lshr_b32 s4, s23, 16 +; VI-NEXT: v_add_f16_e32 v7, s24, v0 +; VI-NEXT: v_add_f16_sdwa v8, v8, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v8, v7, v8 +; VI-NEXT: v_mov_b32_e32 v7, s4 ; VI-NEXT: v_add_f16_e32 v12, s16, v0 -; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v0, s17, v0 -; VI-NEXT: v_or_b32_e32 v1, v0, v1 +; VI-NEXT: v_add_f16_sdwa v13, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, s17, v0 +; VI-NEXT: v_add_f16_sdwa v14, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s18, v0 +; VI-NEXT: v_add_f16_sdwa v15, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v3, s19, v0 +; VI-NEXT: v_add_f16_sdwa v16, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v4, s20, v0 +; VI-NEXT: v_add_f16_sdwa v17, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v5, s21, v0 +; VI-NEXT: v_add_f16_sdwa v18, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v6, s22, v0 +; VI-NEXT: v_add_f16_sdwa v7, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v0, s23, v0 +; VI-NEXT: v_or_b32_e32 v7, v0, v7 +; VI-NEXT: v_or_b32_e32 v6, v6, v19 +; VI-NEXT: v_or_b32_e32 v5, v5, v18 +; VI-NEXT: v_or_b32_e32 v4, v4, v17 +; VI-NEXT: v_or_b32_e32 v3, v3, v16 +; VI-NEXT: v_or_b32_e32 v2, v2, v15 +; VI-NEXT: v_or_b32_e32 v1, v1, v14 ; VI-NEXT: v_or_b32_e32 v0, v12, v13 ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB59_3: diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll index 04ccab7cc4b61..f8bbf29215833 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll @@ -2629,17 +2629,17 @@ define inreg <14 x i32> @bitcast_v28i16_to_v14i32_scalar(<28 x i16> inreg %a, i3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s59, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s58, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s57, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s56, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s58, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s15, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s14, 16 @@ -3847,17 +3847,17 @@ define inreg <14 x i32> @bitcast_v28f16_to_v14i32_scalar(<28 x half> inreg %a, i ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s59, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s58, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s57, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s56, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s58, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s15, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s14, 16 @@ -5693,13 +5693,13 @@ define inreg <28 x i16> @bitcast_v14f32_to_v28i16_scalar(<14 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[19:20], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[20:21], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v1 ; SI-NEXT: s_branch .LBB29_5 ; SI-NEXT: .LBB29_3: ; SI-NEXT: ; implicit-def: $sgpr40 @@ -5732,13 +5732,13 @@ define inreg <28 x i16> @bitcast_v14f32_to_v28i16_scalar(<14 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v12, s28 ; SI-NEXT: v_mov_b32_e32 v13, s29 -; SI-NEXT: v_mov_b32_e32 v28, s44 -; SI-NEXT: v_mov_b32_e32 v27, s45 -; SI-NEXT: v_mov_b32_e32 v26, s46 -; SI-NEXT: v_mov_b32_e32 v25, s47 -; SI-NEXT: v_mov_b32_e32 v24, s56 -; SI-NEXT: v_mov_b32_e32 v23, s57 -; SI-NEXT: v_mov_b32_e32 v22, s58 +; SI-NEXT: v_mov_b32_e32 v27, s44 +; SI-NEXT: v_mov_b32_e32 v26, s45 +; SI-NEXT: v_mov_b32_e32 v25, s46 +; SI-NEXT: v_mov_b32_e32 v24, s47 +; SI-NEXT: v_mov_b32_e32 v23, s56 +; SI-NEXT: v_mov_b32_e32 v22, s57 +; SI-NEXT: v_mov_b32_e32 v21, s58 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: v_mov_b32_e32 v15, s6 ; SI-NEXT: v_mov_b32_e32 v16, s8 @@ -5747,41 +5747,41 @@ define inreg <28 x i16> @bitcast_v14f32_to_v28i16_scalar(<14 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v19, s14 ; SI-NEXT: v_mov_b32_e32 v20, s40 ; SI-NEXT: .LBB29_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v0, v0, v20 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v27 ; SI-NEXT: v_or_b32_e32 v2, v2, v19 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v26 ; SI-NEXT: v_or_b32_e32 v4, v4, v18 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v25 ; SI-NEXT: v_or_b32_e32 v6, v6, v17 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v24 ; SI-NEXT: v_or_b32_e32 v8, v8, v16 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v23 ; SI-NEXT: v_or_b32_e32 v10, v10, v15 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v22 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v21 ; SI-NEXT: v_or_b32_e32 v1, v1, v20 ; SI-NEXT: v_or_b32_e32 v3, v3, v19 ; SI-NEXT: v_or_b32_e32 v5, v5, v18 @@ -6280,17 +6280,17 @@ define inreg <14 x float> @bitcast_v28i16_to_v14f32_scalar(<28 x i16> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s59, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s58, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s57, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s56, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s58, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s15, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s14, 16 @@ -6875,13 +6875,13 @@ define inreg <28 x half> @bitcast_v14f32_to_v28f16_scalar(<14 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[19:20], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[20:21], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v1 ; SI-NEXT: s_branch .LBB33_5 ; SI-NEXT: .LBB33_3: ; SI-NEXT: ; implicit-def: $sgpr40 @@ -6914,13 +6914,13 @@ define inreg <28 x half> @bitcast_v14f32_to_v28f16_scalar(<14 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v12, s28 ; SI-NEXT: v_mov_b32_e32 v13, s29 -; SI-NEXT: v_mov_b32_e32 v28, s44 -; SI-NEXT: v_mov_b32_e32 v27, s45 -; SI-NEXT: v_mov_b32_e32 v26, s46 -; SI-NEXT: v_mov_b32_e32 v25, s47 -; SI-NEXT: v_mov_b32_e32 v24, s56 -; SI-NEXT: v_mov_b32_e32 v23, s57 -; SI-NEXT: v_mov_b32_e32 v22, s58 +; SI-NEXT: v_mov_b32_e32 v27, s44 +; SI-NEXT: v_mov_b32_e32 v26, s45 +; SI-NEXT: v_mov_b32_e32 v25, s46 +; SI-NEXT: v_mov_b32_e32 v24, s47 +; SI-NEXT: v_mov_b32_e32 v23, s56 +; SI-NEXT: v_mov_b32_e32 v22, s57 +; SI-NEXT: v_mov_b32_e32 v21, s58 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: v_mov_b32_e32 v15, s6 ; SI-NEXT: v_mov_b32_e32 v16, s8 @@ -6929,41 +6929,41 @@ define inreg <28 x half> @bitcast_v14f32_to_v28f16_scalar(<14 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v19, s14 ; SI-NEXT: v_mov_b32_e32 v20, s40 ; SI-NEXT: .LBB33_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v0, v0, v20 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v27 ; SI-NEXT: v_or_b32_e32 v2, v2, v19 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v26 ; SI-NEXT: v_or_b32_e32 v4, v4, v18 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v25 ; SI-NEXT: v_or_b32_e32 v6, v6, v17 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v24 ; SI-NEXT: v_or_b32_e32 v8, v8, v16 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v23 ; SI-NEXT: v_or_b32_e32 v10, v10, v15 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v22 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v21 ; SI-NEXT: v_or_b32_e32 v1, v1, v20 ; SI-NEXT: v_or_b32_e32 v3, v3, v19 ; SI-NEXT: v_or_b32_e32 v5, v5, v18 @@ -7518,17 +7518,17 @@ define inreg <14 x float> @bitcast_v28f16_to_v14f32_scalar(<28 x half> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s59, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s58, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s57, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s56, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s58, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s15, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s14, 16 @@ -9308,17 +9308,17 @@ define inreg <7 x i64> @bitcast_v28i16_to_v7i64_scalar(<28 x i16> inreg %a, i32 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s59, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s58, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s57, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s56, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s58, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s15, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s14, 16 @@ -10530,17 +10530,17 @@ define inreg <7 x i64> @bitcast_v28f16_to_v7i64_scalar(<28 x half> inreg %a, i32 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s59, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s58, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s57, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s56, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s58, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s15, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s14, 16 @@ -10930,20 +10930,20 @@ define <28 x i16> @bitcast_v7f64_to_v28i16(<7 x double> %a, i32 %b) #0 { ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v14 -; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr17 -; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr15 -; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr14 -; SI-NEXT: ; implicit-def: $vgpr18 +; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB48_2 @@ -10952,13 +10952,13 @@ define <28 x i16> @bitcast_v7f64_to_v28i16(<7 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v15, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v16, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v17, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v19, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v21, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v24, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v11 +; SI-NEXT: v_alignbit_b32 v18, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v20, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v23, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v1 @@ -10977,56 +10977,56 @@ define <28 x i16> @bitcast_v7f64_to_v28i16(<7 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v15, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v16, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v17, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v19, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v21, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v24, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v11 +; SI-NEXT: v_alignbit_b32 v18, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v20, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v23, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v1 ; SI-NEXT: .LBB48_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v0, v0, v24 +; SI-NEXT: v_or_b32_e32 v0, v0, v23 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v27 -; SI-NEXT: v_or_b32_e32 v2, v2, v21 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v27 +; SI-NEXT: v_or_b32_e32 v2, v2, v20 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v26 -; SI-NEXT: v_or_b32_e32 v4, v4, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v26 +; SI-NEXT: v_or_b32_e32 v4, v4, v18 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v25 ; SI-NEXT: v_or_b32_e32 v6, v6, v17 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v24 ; SI-NEXT: v_or_b32_e32 v8, v8, v16 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v22 ; SI-NEXT: v_or_b32_e32 v10, v10, v15 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v21 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v18 -; SI-NEXT: v_or_b32_e32 v1, v1, v24 -; SI-NEXT: v_or_b32_e32 v3, v3, v21 -; SI-NEXT: v_or_b32_e32 v5, v5, v19 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v19 +; SI-NEXT: v_or_b32_e32 v1, v1, v23 +; SI-NEXT: v_or_b32_e32 v3, v3, v20 +; SI-NEXT: v_or_b32_e32 v5, v5, v18 ; SI-NEXT: v_or_b32_e32 v7, v7, v17 ; SI-NEXT: v_or_b32_e32 v9, v9, v16 ; SI-NEXT: v_or_b32_e32 v11, v11, v15 @@ -11144,8 +11144,8 @@ define inreg <28 x i16> @bitcast_v7f64_to_v28i16_scalar(<7 x double> inreg %a, i ; SI-NEXT: v_lshr_b64 v[16:17], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[17:18], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[18:19], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[19:20], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[20:21], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 @@ -11154,7 +11154,7 @@ define inreg <28 x i16> @bitcast_v7f64_to_v28i16_scalar(<7 x double> inreg %a, i ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v1 ; SI-NEXT: s_branch .LBB49_5 ; SI-NEXT: .LBB49_3: ; SI-NEXT: ; implicit-def: $sgpr40 @@ -11193,7 +11193,7 @@ define inreg <28 x i16> @bitcast_v7f64_to_v28i16_scalar(<7 x double> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v25, s47 ; SI-NEXT: v_mov_b32_e32 v26, s46 ; SI-NEXT: v_mov_b32_e32 v27, s45 -; SI-NEXT: v_mov_b32_e32 v28, s44 +; SI-NEXT: v_mov_b32_e32 v21, s44 ; SI-NEXT: v_mov_b32_e32 v20, s40 ; SI-NEXT: v_mov_b32_e32 v19, s14 ; SI-NEXT: v_mov_b32_e32 v18, s12 @@ -11202,12 +11202,12 @@ define inreg <28 x i16> @bitcast_v7f64_to_v28i16_scalar(<7 x double> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v15, s6 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: .LBB49_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 @@ -11218,7 +11218,7 @@ define inreg <28 x i16> @bitcast_v7f64_to_v28i16_scalar(<7 x double> inreg %a, i ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v0, v0, v20 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v21 ; SI-NEXT: v_or_b32_e32 v2, v2, v19 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v27 @@ -11714,17 +11714,17 @@ define inreg <7 x double> @bitcast_v28i16_to_v7f64_scalar(<28 x i16> inreg %a, i ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s59, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s58, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s57, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s56, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s58, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s15, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s14, 16 @@ -12063,20 +12063,20 @@ define <28 x half> @bitcast_v7f64_to_v28f16(<7 x double> %a, i32 %b) #0 { ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v14 -; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr17 -; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr15 -; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr14 -; SI-NEXT: ; implicit-def: $vgpr18 +; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB52_2 @@ -12085,13 +12085,13 @@ define <28 x half> @bitcast_v7f64_to_v28f16(<7 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v15, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v16, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v17, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v19, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v21, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v24, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v11 +; SI-NEXT: v_alignbit_b32 v18, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v20, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v23, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v1 @@ -12110,56 +12110,56 @@ define <28 x half> @bitcast_v7f64_to_v28f16(<7 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v15, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v16, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v17, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v19, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v21, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v24, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v11 +; SI-NEXT: v_alignbit_b32 v18, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v20, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v23, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v1 ; SI-NEXT: .LBB52_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v0, v0, v24 +; SI-NEXT: v_or_b32_e32 v0, v0, v23 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v27 -; SI-NEXT: v_or_b32_e32 v2, v2, v21 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v27 +; SI-NEXT: v_or_b32_e32 v2, v2, v20 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v26 -; SI-NEXT: v_or_b32_e32 v4, v4, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v26 +; SI-NEXT: v_or_b32_e32 v4, v4, v18 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v25 ; SI-NEXT: v_or_b32_e32 v6, v6, v17 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v24 ; SI-NEXT: v_or_b32_e32 v8, v8, v16 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v22 ; SI-NEXT: v_or_b32_e32 v10, v10, v15 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v21 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v18 -; SI-NEXT: v_or_b32_e32 v1, v1, v24 -; SI-NEXT: v_or_b32_e32 v3, v3, v21 -; SI-NEXT: v_or_b32_e32 v5, v5, v19 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v19 +; SI-NEXT: v_or_b32_e32 v1, v1, v23 +; SI-NEXT: v_or_b32_e32 v3, v3, v20 +; SI-NEXT: v_or_b32_e32 v5, v5, v18 ; SI-NEXT: v_or_b32_e32 v7, v7, v17 ; SI-NEXT: v_or_b32_e32 v9, v9, v16 ; SI-NEXT: v_or_b32_e32 v11, v11, v15 @@ -12277,8 +12277,8 @@ define inreg <28 x half> @bitcast_v7f64_to_v28f16_scalar(<7 x double> inreg %a, ; SI-NEXT: v_lshr_b64 v[16:17], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[17:18], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[18:19], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[19:20], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[20:21], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 @@ -12287,7 +12287,7 @@ define inreg <28 x half> @bitcast_v7f64_to_v28f16_scalar(<7 x double> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v1 ; SI-NEXT: s_branch .LBB53_5 ; SI-NEXT: .LBB53_3: ; SI-NEXT: ; implicit-def: $sgpr40 @@ -12326,7 +12326,7 @@ define inreg <28 x half> @bitcast_v7f64_to_v28f16_scalar(<7 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v25, s47 ; SI-NEXT: v_mov_b32_e32 v26, s46 ; SI-NEXT: v_mov_b32_e32 v27, s45 -; SI-NEXT: v_mov_b32_e32 v28, s44 +; SI-NEXT: v_mov_b32_e32 v21, s44 ; SI-NEXT: v_mov_b32_e32 v20, s40 ; SI-NEXT: v_mov_b32_e32 v19, s14 ; SI-NEXT: v_mov_b32_e32 v18, s12 @@ -12335,12 +12335,12 @@ define inreg <28 x half> @bitcast_v7f64_to_v28f16_scalar(<7 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v15, s6 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: .LBB53_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 @@ -12351,7 +12351,7 @@ define inreg <28 x half> @bitcast_v7f64_to_v28f16_scalar(<7 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v0, v0, v20 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v21 ; SI-NEXT: v_or_b32_e32 v2, v2, v19 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v27 @@ -12903,17 +12903,17 @@ define inreg <7 x double> @bitcast_v28f16_to_v7f64_scalar(<28 x half> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s59, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s58, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s57, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s56, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s58, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s15, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s14, 16 @@ -13692,6 +13692,22 @@ define inreg <28 x half> @bitcast_v28i16_to_v28f16_scalar(<28 x i16> inreg %a, i ; SI-LABEL: bitcast_v28i16_to_v28f16_scalar: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1 +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: s_mov_b64 exec, s[4:5] +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_writelane_b32 v14, s34, 0 +; SI-NEXT: v_writelane_b32 v14, s35, 1 +; SI-NEXT: v_writelane_b32 v14, s36, 2 +; SI-NEXT: v_writelane_b32 v14, s37, 3 +; SI-NEXT: v_writelane_b32 v14, s38, 4 +; SI-NEXT: v_writelane_b32 v14, s39, 5 +; SI-NEXT: v_writelane_b32 v14, s48, 6 +; SI-NEXT: v_writelane_b32 v14, s49, 7 +; SI-NEXT: v_writelane_b32 v14, s50, 8 +; SI-NEXT: v_writelane_b32 v14, s51, 9 +; SI-NEXT: v_writelane_b32 v14, s30, 10 +; SI-NEXT: v_writelane_b32 v14, s31, 11 ; SI-NEXT: s_lshr_b32 s88, s29, 16 ; SI-NEXT: s_lshr_b32 s95, s28, 16 ; SI-NEXT: s_lshr_b32 s79, s27, 16 @@ -13712,122 +13728,119 @@ define inreg <28 x half> @bitcast_v28i16_to_v28f16_scalar(<28 x i16> inreg %a, i ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_and_b32 s5, s17, 0xffff ; SI-NEXT: s_lshl_b32 s7, s74, 16 -; SI-NEXT: s_or_b32 s15, s5, s7 +; SI-NEXT: s_and_b32 s4, s16, 0xffff +; SI-NEXT: s_lshl_b32 vcc_lo, s89, 16 +; SI-NEXT: s_or_b32 vcc_hi, s5, s7 ; SI-NEXT: s_and_b32 s5, s19, 0xffff ; SI-NEXT: s_lshl_b32 s7, s75, 16 -; SI-NEXT: s_or_b32 s41, s5, s7 +; SI-NEXT: s_or_b32 s40, s4, vcc_lo +; SI-NEXT: s_and_b32 s4, s18, 0xffff +; SI-NEXT: s_lshl_b32 s30, s90, 16 +; SI-NEXT: s_or_b32 s31, s5, s7 ; SI-NEXT: s_and_b32 s5, s21, 0xffff ; SI-NEXT: s_lshl_b32 s7, s76, 16 -; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s14, s89, 16 -; SI-NEXT: s_or_b32 s47, s5, s7 +; SI-NEXT: s_or_b32 s14, s4, s30 +; SI-NEXT: s_and_b32 s4, s20, 0xffff +; SI-NEXT: s_lshl_b32 s34, s91, 16 +; SI-NEXT: s_or_b32 s35, s5, s7 ; SI-NEXT: s_and_b32 s5, s23, 0xffff ; SI-NEXT: s_lshl_b32 s7, s77, 16 -; SI-NEXT: s_or_b32 s12, s4, s14 -; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s40, s90, 16 -; SI-NEXT: s_or_b32 s57, s5, s7 +; SI-NEXT: s_or_b32 s12, s4, s34 +; SI-NEXT: s_and_b32 s4, s22, 0xffff +; SI-NEXT: s_lshl_b32 s36, s92, 16 +; SI-NEXT: s_or_b32 s37, s5, s7 ; SI-NEXT: s_and_b32 s5, s25, 0xffff ; SI-NEXT: s_lshl_b32 s7, s78, 16 -; SI-NEXT: s_or_b32 s10, s4, s40 -; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s46, s91, 16 -; SI-NEXT: s_or_b32 s59, s5, s7 +; SI-NEXT: s_or_b32 s10, s4, s36 +; SI-NEXT: s_and_b32 s4, s24, 0xffff +; SI-NEXT: s_lshl_b32 s38, s93, 16 +; SI-NEXT: s_or_b32 s39, s5, s7 ; SI-NEXT: s_and_b32 s5, s27, 0xffff ; SI-NEXT: s_lshl_b32 s7, s79, 16 -; SI-NEXT: s_or_b32 s8, s4, s46 -; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s56, s92, 16 -; SI-NEXT: s_lshl_b32 s60, s94, 16 -; SI-NEXT: s_or_b32 s61, s5, s7 +; SI-NEXT: s_or_b32 s8, s4, s38 +; SI-NEXT: s_and_b32 s4, s26, 0xffff +; SI-NEXT: s_lshl_b32 s48, s94, 16 +; SI-NEXT: s_or_b32 s49, s5, s7 ; SI-NEXT: s_and_b32 s5, s29, 0xffff ; SI-NEXT: s_lshl_b32 s7, s88, 16 -; SI-NEXT: s_lshr_b64 s[42:43], s[14:15], 16 -; SI-NEXT: s_and_b32 s14, s26, 0xffff -; SI-NEXT: s_or_b32 s6, s4, s56 -; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s58, s93, 16 -; SI-NEXT: s_or_b32 s63, s5, s7 -; SI-NEXT: s_lshl_b32 s62, s95, 16 -; SI-NEXT: s_lshr_b64 s[44:45], s[40:41], 16 -; SI-NEXT: s_or_b32 s40, s14, s60 -; SI-NEXT: s_and_b32 s14, s28, 0xffff -; SI-NEXT: s_or_b32 s4, s4, s58 -; SI-NEXT: s_mov_b32 s13, s15 -; SI-NEXT: s_mov_b32 s11, s41 -; SI-NEXT: s_mov_b32 s9, s47 -; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16 -; SI-NEXT: s_mov_b32 s7, s57 -; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16 -; SI-NEXT: s_mov_b32 s5, s59 -; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16 -; SI-NEXT: s_mov_b32 s41, s61 -; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16 -; SI-NEXT: s_or_b32 s14, s14, s62 -; SI-NEXT: s_mov_b32 s15, s63 -; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16 +; SI-NEXT: s_or_b32 s6, s4, s48 +; SI-NEXT: s_and_b32 s4, s28, 0xffff +; SI-NEXT: s_lshl_b32 s50, s95, 16 +; SI-NEXT: s_or_b32 s51, s5, s7 +; SI-NEXT: s_or_b32 s4, s4, s50 +; SI-NEXT: s_lshr_b64 s[42:43], vcc, 16 +; SI-NEXT: s_lshr_b64 s[44:45], s[30:31], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[34:35], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[36:37], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[38:39], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[48:49], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[50:51], 16 +; SI-NEXT: s_mov_b32 s41, vcc_hi +; SI-NEXT: s_mov_b32 s15, s31 +; SI-NEXT: s_mov_b32 s13, s35 +; SI-NEXT: s_mov_b32 s11, s37 +; SI-NEXT: s_mov_b32 s9, s39 +; SI-NEXT: s_mov_b32 s7, s49 +; SI-NEXT: s_mov_b32 s5, s51 ; SI-NEXT: s_cbranch_execnz .LBB57_3 ; SI-NEXT: .LBB57_2: ; %cmp.true ; SI-NEXT: s_add_i32 s28, s28, 3 ; SI-NEXT: s_and_b32 s4, s28, 0xffff ; SI-NEXT: s_lshl_b32 s5, s95, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s29, s29, 3 -; SI-NEXT: s_add_i32 s14, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s29, 0xffff -; SI-NEXT: s_lshl_b32 s5, s88, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_and_b32 s5, s29, 0xffff +; SI-NEXT: s_lshl_b32 s6, s88, 16 ; SI-NEXT: s_add_i32 s26, s26, 3 -; SI-NEXT: s_add_i32 s15, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s26, 0xffff -; SI-NEXT: s_lshl_b32 s5, s94, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_or_b32 s5, s6, s5 +; SI-NEXT: s_and_b32 s6, s26, 0xffff +; SI-NEXT: s_lshl_b32 s7, s94, 16 ; SI-NEXT: s_add_i32 s27, s27, 3 -; SI-NEXT: s_add_i32 s40, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s27, 0xffff -; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_or_b32 s6, s7, s6 +; SI-NEXT: s_and_b32 s7, s27, 0xffff +; SI-NEXT: s_lshl_b32 s8, s79, 16 ; SI-NEXT: s_add_i32 s24, s24, 3 -; SI-NEXT: s_add_i32 s41, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s5, s93, 16 +; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_and_b32 s8, s24, 0xffff +; SI-NEXT: s_lshl_b32 s9, s93, 16 ; SI-NEXT: s_add_i32 s25, s25, 3 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s25, 0xffff -; SI-NEXT: s_lshl_b32 s6, s78, 16 +; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_and_b32 s9, s25, 0xffff +; SI-NEXT: s_lshl_b32 s10, s78, 16 ; SI-NEXT: s_add_i32 s22, s22, 3 -; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s22, 0xffff -; SI-NEXT: s_lshl_b32 s7, s92, 16 +; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: s_and_b32 s10, s22, 0xffff +; SI-NEXT: s_lshl_b32 s11, s92, 16 ; SI-NEXT: s_add_i32 s23, s23, 3 -; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s23, 0xffff -; SI-NEXT: s_lshl_b32 s8, s77, 16 +; SI-NEXT: s_or_b32 s10, s11, s10 +; SI-NEXT: s_and_b32 s11, s23, 0xffff +; SI-NEXT: s_lshl_b32 s12, s77, 16 ; SI-NEXT: s_add_i32 s20, s20, 3 -; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s20, 0xffff -; SI-NEXT: s_lshl_b32 s9, s91, 16 +; SI-NEXT: s_or_b32 s11, s12, s11 +; SI-NEXT: s_and_b32 s12, s20, 0xffff +; SI-NEXT: s_lshl_b32 s13, s91, 16 ; SI-NEXT: s_add_i32 s21, s21, 3 -; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s21, 0xffff -; SI-NEXT: s_lshl_b32 s10, s76, 16 +; SI-NEXT: s_or_b32 s12, s13, s12 +; SI-NEXT: s_and_b32 s13, s21, 0xffff +; SI-NEXT: s_lshl_b32 s14, s76, 16 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s18, 0xffff -; SI-NEXT: s_lshl_b32 s11, s90, 16 +; SI-NEXT: s_or_b32 s13, s14, s13 +; SI-NEXT: s_and_b32 s14, s18, 0xffff +; SI-NEXT: s_lshl_b32 s15, s90, 16 ; SI-NEXT: s_add_i32 s19, s19, 3 -; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s19, 0xffff -; SI-NEXT: s_lshl_b32 s12, s75, 16 +; SI-NEXT: s_or_b32 s14, s15, s14 +; SI-NEXT: s_and_b32 s15, s19, 0xffff +; SI-NEXT: s_lshl_b32 s18, s75, 16 ; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s12, s16, 0xffff -; SI-NEXT: s_lshl_b32 s13, s89, 16 +; SI-NEXT: s_or_b32 s15, s18, s15 +; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s18, s89, 16 +; SI-NEXT: s_or_b32 s16, s18, s16 ; SI-NEXT: s_add_i32 s17, s17, 3 -; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s13, s17, 0xffff -; SI-NEXT: s_lshl_b32 s16, s74, 16 -; SI-NEXT: s_or_b32 s13, s16, s13 +; SI-NEXT: s_add_i32 s40, s16, 0x30000 +; SI-NEXT: s_and_b32 s16, s17, 0xffff +; SI-NEXT: s_lshl_b32 s17, s74, 16 +; SI-NEXT: s_or_b32 s16, s17, s16 ; SI-NEXT: s_add_i32 s4, s4, 0x30000 ; SI-NEXT: s_add_i32 s5, s5, 0x30000 ; SI-NEXT: s_add_i32 s6, s6, 0x30000 @@ -13838,92 +13851,111 @@ define inreg <28 x half> @bitcast_v28i16_to_v28f16_scalar(<28 x i16> inreg %a, i ; SI-NEXT: s_add_i32 s11, s11, 0x30000 ; SI-NEXT: s_add_i32 s12, s12, 0x30000 ; SI-NEXT: s_add_i32 s13, s13, 0x30000 -; SI-NEXT: s_lshr_b64 s[42:43], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16 -; SI-NEXT: s_lshr_b32 s74, s13, 16 -; SI-NEXT: s_lshr_b32 s75, s11, 16 -; SI-NEXT: s_lshr_b32 s76, s9, 16 -; SI-NEXT: s_lshr_b32 s77, s7, 16 -; SI-NEXT: s_lshr_b32 s78, s5, 16 -; SI-NEXT: s_lshr_b32 s79, s41, 16 -; SI-NEXT: s_lshr_b32 s88, s15, 16 +; SI-NEXT: s_add_i32 s14, s14, 0x30000 +; SI-NEXT: s_add_i32 s15, s15, 0x30000 +; SI-NEXT: s_add_i32 s41, s16, 0x30000 +; SI-NEXT: s_lshr_b64 s[42:43], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[44:45], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 16 +; SI-NEXT: s_lshr_b32 s74, s41, 16 +; SI-NEXT: s_lshr_b32 s75, s15, 16 +; SI-NEXT: s_lshr_b32 s76, s13, 16 +; SI-NEXT: s_lshr_b32 s77, s11, 16 +; SI-NEXT: s_lshr_b32 s78, s9, 16 +; SI-NEXT: s_lshr_b32 s79, s7, 16 +; SI-NEXT: s_lshr_b32 s88, s5, 16 ; SI-NEXT: .LBB57_3: ; %end +; SI-NEXT: s_and_b32 s16, s40, 0xffff +; SI-NEXT: s_lshl_b32 s17, s42, 16 +; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_and_b32 s17, s41, 0xffff +; SI-NEXT: s_lshl_b32 s18, s74, 16 +; SI-NEXT: s_or_b32 s17, s17, s18 +; SI-NEXT: s_and_b32 s14, s14, 0xffff +; SI-NEXT: s_lshl_b32 s18, s44, 16 +; SI-NEXT: s_or_b32 s14, s14, s18 +; SI-NEXT: s_and_b32 s15, s15, 0xffff +; SI-NEXT: s_lshl_b32 s18, s75, 16 +; SI-NEXT: s_or_b32 s15, s15, s18 ; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s16, s42, 16 -; SI-NEXT: s_or_b32 s12, s12, s16 +; SI-NEXT: s_lshl_b32 s18, s46, 16 +; SI-NEXT: s_or_b32 s12, s12, s18 ; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s16, s74, 16 -; SI-NEXT: s_or_b32 s13, s13, s16 +; SI-NEXT: s_lshl_b32 s18, s76, 16 +; SI-NEXT: s_or_b32 s13, s13, s18 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s16, s44, 16 -; SI-NEXT: s_or_b32 s10, s10, s16 +; SI-NEXT: s_lshl_b32 s18, s56, 16 +; SI-NEXT: s_or_b32 s10, s10, s18 ; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s16, s75, 16 -; SI-NEXT: s_or_b32 s11, s11, s16 +; SI-NEXT: s_lshl_b32 s18, s77, 16 +; SI-NEXT: s_or_b32 s11, s11, s18 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s16, s46, 16 -; SI-NEXT: s_or_b32 s8, s8, s16 +; SI-NEXT: s_lshl_b32 s18, s58, 16 +; SI-NEXT: s_or_b32 s8, s8, s18 ; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s16, s76, 16 -; SI-NEXT: s_or_b32 s9, s9, s16 +; SI-NEXT: s_lshl_b32 s18, s78, 16 +; SI-NEXT: s_or_b32 s9, s9, s18 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s16, s56, 16 -; SI-NEXT: s_or_b32 s6, s6, s16 +; SI-NEXT: s_lshl_b32 s18, s60, 16 +; SI-NEXT: s_or_b32 s6, s6, s18 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s16, s77, 16 -; SI-NEXT: s_or_b32 s7, s7, s16 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s16, s58, 16 -; SI-NEXT: s_or_b32 s4, s4, s16 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s16, s78, 16 -; SI-NEXT: s_or_b32 s5, s5, s16 -; SI-NEXT: s_and_b32 s16, s40, 0xffff -; SI-NEXT: s_lshl_b32 s17, s60, 16 -; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s41, 0xffff ; SI-NEXT: s_lshl_b32 s18, s79, 16 -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s14, s14, 0xffff +; SI-NEXT: s_or_b32 s7, s7, s18 +; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_lshl_b32 s18, s62, 16 -; SI-NEXT: s_or_b32 s14, s14, s18 -; SI-NEXT: s_and_b32 s15, s15, 0xffff +; SI-NEXT: s_or_b32 s4, s4, s18 +; SI-NEXT: s_and_b32 s5, s5, 0xffff ; SI-NEXT: s_lshl_b32 s18, s88, 16 -; SI-NEXT: s_or_b32 s15, s15, s18 -; SI-NEXT: v_mov_b32_e32 v0, s12 -; SI-NEXT: v_mov_b32_e32 v1, s13 -; SI-NEXT: v_mov_b32_e32 v2, s10 -; SI-NEXT: v_mov_b32_e32 v3, s11 -; SI-NEXT: v_mov_b32_e32 v4, s8 -; SI-NEXT: v_mov_b32_e32 v5, s9 -; SI-NEXT: v_mov_b32_e32 v6, s6 -; SI-NEXT: v_mov_b32_e32 v7, s7 -; SI-NEXT: v_mov_b32_e32 v8, s4 -; SI-NEXT: v_mov_b32_e32 v9, s5 -; SI-NEXT: v_mov_b32_e32 v10, s16 -; SI-NEXT: v_mov_b32_e32 v11, s17 -; SI-NEXT: v_mov_b32_e32 v12, s14 -; SI-NEXT: v_mov_b32_e32 v13, s15 +; SI-NEXT: s_or_b32 s5, s5, s18 +; SI-NEXT: v_readlane_b32 s30, v14, 10 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v2, s14 +; SI-NEXT: v_mov_b32_e32 v3, s15 +; SI-NEXT: v_mov_b32_e32 v4, s12 +; SI-NEXT: v_mov_b32_e32 v5, s13 +; SI-NEXT: v_mov_b32_e32 v6, s10 +; SI-NEXT: v_mov_b32_e32 v7, s11 +; SI-NEXT: v_mov_b32_e32 v8, s8 +; SI-NEXT: v_mov_b32_e32 v9, s9 +; SI-NEXT: v_mov_b32_e32 v10, s6 +; SI-NEXT: v_mov_b32_e32 v11, s7 +; SI-NEXT: v_mov_b32_e32 v12, s4 +; SI-NEXT: v_mov_b32_e32 v13, s5 +; SI-NEXT: v_readlane_b32 s31, v14, 11 +; SI-NEXT: v_readlane_b32 s51, v14, 9 +; SI-NEXT: v_readlane_b32 s50, v14, 8 +; SI-NEXT: v_readlane_b32 s49, v14, 7 +; SI-NEXT: v_readlane_b32 s48, v14, 6 +; SI-NEXT: v_readlane_b32 s39, v14, 5 +; SI-NEXT: v_readlane_b32 s38, v14, 4 +; SI-NEXT: v_readlane_b32 s37, v14, 3 +; SI-NEXT: v_readlane_b32 s36, v14, 2 +; SI-NEXT: v_readlane_b32 s35, v14, 1 +; SI-NEXT: v_readlane_b32 s34, v14, 0 +; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: s_mov_b64 exec, s[4:5] +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB57_4: -; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr12 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: s_branch .LBB57_2 ; @@ -14450,18 +14482,18 @@ define inreg <28 x i16> @bitcast_v28f16_to_v28i16_scalar(<28 x half> inreg %a, i ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_lshr_b32 s15, s29, 16 -; SI-NEXT: s_lshr_b32 s12, s28, 16 -; SI-NEXT: s_lshr_b32 s10, s27, 16 -; SI-NEXT: s_lshr_b32 s13, s26, 16 -; SI-NEXT: s_lshr_b32 s11, s25, 16 -; SI-NEXT: s_lshr_b32 s14, s24, 16 -; SI-NEXT: s_lshr_b32 s9, s23, 16 +; SI-NEXT: s_lshr_b32 s6, s28, 16 +; SI-NEXT: s_lshr_b32 s14, s27, 16 +; SI-NEXT: s_lshr_b32 s7, s26, 16 +; SI-NEXT: s_lshr_b32 s12, s25, 16 +; SI-NEXT: s_lshr_b32 s13, s24, 16 +; SI-NEXT: s_lshr_b32 s11, s23, 16 ; SI-NEXT: s_lshr_b32 s40, s22, 16 -; SI-NEXT: s_lshr_b32 s8, s21, 16 +; SI-NEXT: s_lshr_b32 s10, s21, 16 ; SI-NEXT: s_lshr_b32 s41, s20, 16 -; SI-NEXT: s_lshr_b32 s7, s19, 16 +; SI-NEXT: s_lshr_b32 s9, s19, 16 ; SI-NEXT: s_lshr_b32 s42, s18, 16 -; SI-NEXT: s_lshr_b32 s6, s17, 16 +; SI-NEXT: s_lshr_b32 s8, s17, 16 ; SI-NEXT: s_lshr_b32 s43, s16, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v0 ; SI-NEXT: s_cmp_lg_u32 s4, 0 @@ -14469,118 +14501,118 @@ define inreg <28 x i16> @bitcast_v28f16_to_v28i16_scalar(<28 x half> inreg %a, i ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_cbranch_execnz .LBB59_4 ; SI-NEXT: .LBB59_2: ; %cmp.true -; SI-NEXT: v_cvt_f32_f16_e32 v1, s42 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s16 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s41 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s14 +; SI-NEXT: v_cvt_f32_f16_e32 v0, s43 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s16 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s42 +; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s13 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s40 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v4 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v29, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s41 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s12 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s15 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s11 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s27 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s15 +; SI-NEXT: v_or_b32_e32 v28, v5, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s22 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v28, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s25 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s9 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s23 -; SI-NEXT: v_cvt_f16_f32_e32 v29, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v31, v1 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s29 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s14 +; SI-NEXT: v_or_b32_e32 v30, v3, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s40 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v30, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v32, v5 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v29 -; SI-NEXT: v_or_b32_e32 v9, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s8 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v30 -; SI-NEXT: v_or_b32_e32 v7, v5, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s21 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v31 +; SI-NEXT: v_or_b32_e32 v13, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s12 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 +; SI-NEXT: v_or_b32_e32 v11, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s25 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s11 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s7 -; SI-NEXT: v_cvt_f16_f32_e32 v31, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v33, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v32, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v31 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s19 -; SI-NEXT: v_or_b32_e32 v5, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s6 -; SI-NEXT: v_cvt_f32_f16_e32 v16, s17 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 ; SI-NEXT: v_cvt_f16_f32_e32 v34, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s10 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v32 -; SI-NEXT: v_or_b32_e32 v3, v13, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s27 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33 +; SI-NEXT: v_or_b32_e32 v9, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s10 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v34 -; SI-NEXT: v_or_b32_e32 v1, v16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v16, s29 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v33, v11 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v33 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s43 -; SI-NEXT: v_or_b32_e32 v11, v11, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v28 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s18 -; SI-NEXT: v_or_b32_e32 v13, v13, v16 -; SI-NEXT: v_cvt_f32_f16_e32 v16, s20 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_or_b32_e32 v49, v14, v0 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s22 -; SI-NEXT: v_or_b32_e32 v39, v15, v2 -; SI-NEXT: v_or_b32_e32 v37, v16, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s24 -; SI-NEXT: v_cvt_f32_f16_e32 v16, s26 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s28 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v48, v14, v6 -; SI-NEXT: v_or_b32_e32 v38, v15, v8 -; SI-NEXT: v_or_b32_e32 v36, v16, v10 -; SI-NEXT: v_or_b32_e32 v35, v17, v12 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v35, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v7, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s9 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s17 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_or_b32_e32 v5, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v36, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s13 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v37, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v36 +; SI-NEXT: v_or_b32_e32 v3, v3, v12 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v37 +; SI-NEXT: v_or_b32_e32 v1, v1, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s24 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s7 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v39, v8, v6 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s26 +; SI-NEXT: v_or_b32_e32 v38, v12, v8 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s6 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s28 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v10 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v10 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v14 +; SI-NEXT: v_or_b32_e32 v49, v16, v10 +; SI-NEXT: v_or_b32_e32 v48, v15, v12 ; SI-NEXT: v_lshr_b64 v[26:27], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[24:25], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[22:23], v[4:5], 16 @@ -14592,76 +14624,76 @@ define inreg <28 x i16> @bitcast_v28f16_to_v28i16_scalar(<28 x half> inreg %a, i ; SI-NEXT: .LBB59_3: ; SI-NEXT: s_branch .LBB59_2 ; SI-NEXT: .LBB59_4: -; SI-NEXT: v_mov_b32_e32 v28, s15 -; SI-NEXT: v_mov_b32_e32 v33, s10 -; SI-NEXT: v_mov_b32_e32 v29, s11 -; SI-NEXT: v_mov_b32_e32 v30, s9 -; SI-NEXT: v_mov_b32_e32 v31, s8 -; SI-NEXT: v_mov_b32_e32 v32, s7 -; SI-NEXT: v_mov_b32_e32 v34, s6 +; SI-NEXT: v_mov_b32_e32 v31, s15 +; SI-NEXT: v_mov_b32_e32 v32, s14 +; SI-NEXT: v_mov_b32_e32 v33, s12 +; SI-NEXT: v_mov_b32_e32 v34, s11 +; SI-NEXT: v_mov_b32_e32 v35, s10 +; SI-NEXT: v_mov_b32_e32 v36, s9 +; SI-NEXT: v_mov_b32_e32 v37, s8 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v35, s28 -; SI-NEXT: v_mov_b32_e32 v36, s26 -; SI-NEXT: v_mov_b32_e32 v38, s24 -; SI-NEXT: v_mov_b32_e32 v48, s22 -; SI-NEXT: v_mov_b32_e32 v37, s20 -; SI-NEXT: v_mov_b32_e32 v39, s18 -; SI-NEXT: v_mov_b32_e32 v49, s16 ; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v13, s29 +; SI-NEXT: v_mov_b32_e32 v48, s28 +; SI-NEXT: v_mov_b32_e32 v49, s26 +; SI-NEXT: v_mov_b32_e32 v38, s24 +; SI-NEXT: v_mov_b32_e32 v39, s22 +; SI-NEXT: v_mov_b32_e32 v28, s20 +; SI-NEXT: v_mov_b32_e32 v30, s18 +; SI-NEXT: v_mov_b32_e32 v29, s16 ; SI-NEXT: v_mov_b32_e32 v26, s43 ; SI-NEXT: v_mov_b32_e32 v24, s42 ; SI-NEXT: v_mov_b32_e32 v22, s41 ; SI-NEXT: v_mov_b32_e32 v20, s40 -; SI-NEXT: v_mov_b32_e32 v18, s14 -; SI-NEXT: v_mov_b32_e32 v16, s13 -; SI-NEXT: v_mov_b32_e32 v14, s12 +; SI-NEXT: v_mov_b32_e32 v18, s13 +; SI-NEXT: v_mov_b32_e32 v16, s7 +; SI-NEXT: v_mov_b32_e32 v14, s6 ; SI-NEXT: .LBB59_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v26 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v49 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v29 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v37 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v24 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v39 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v30 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v24 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v22 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v37 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v28 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v22 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v35 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v20 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v48 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v39 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v20 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v38 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v18 ; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v33 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v36 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v49 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v16 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v32 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v35 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v48 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v31 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 ; SI-NEXT: s_setpc_b64 s[30:31] ; @@ -14674,76 +14706,76 @@ define inreg <28 x i16> @bitcast_v28f16_to_v28i16_scalar(<28 x half> inreg %a, i ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB59_4 ; VI-NEXT: .LBB59_2: ; %cmp.true -; VI-NEXT: s_lshr_b32 s5, s28, 16 +; VI-NEXT: s_lshr_b32 s12, s29, 16 ; VI-NEXT: v_mov_b32_e32 v0, 0x200 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: s_lshr_b32 s5, s29, 16 -; VI-NEXT: v_add_f16_e32 v1, s28, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v4, s5 -; VI-NEXT: s_lshr_b32 s5, s27, 16 -; VI-NEXT: v_or_b32_e32 v12, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s27, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s26, 16 -; VI-NEXT: v_or_b32_e32 v11, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s26, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s25, 16 -; VI-NEXT: v_or_b32_e32 v10, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s25, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s24, 16 -; VI-NEXT: v_or_b32_e32 v9, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s24, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s23, 16 -; VI-NEXT: v_or_b32_e32 v8, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s23, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s22, 16 -; VI-NEXT: v_or_b32_e32 v7, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s22, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s21, 16 -; VI-NEXT: v_or_b32_e32 v6, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s21, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s20, 16 -; VI-NEXT: v_or_b32_e32 v5, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v3, s29, v0 -; VI-NEXT: v_add_f16_sdwa v4, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v1, s20, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s19, 16 -; VI-NEXT: v_or_b32_e32 v13, v3, v4 -; VI-NEXT: v_or_b32_e32 v4, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_add_f16_e32 v1, s19, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s18, 16 -; VI-NEXT: v_or_b32_e32 v3, v1, v2 -; VI-NEXT: v_mov_b32_e32 v2, s5 +; VI-NEXT: v_mov_b32_e32 v13, s12 +; VI-NEXT: s_lshr_b32 s11, s28, 16 +; VI-NEXT: v_add_f16_e32 v12, s29, v0 +; VI-NEXT: v_add_f16_sdwa v13, v13, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v13, v12, v13 +; VI-NEXT: v_mov_b32_e32 v12, s11 +; VI-NEXT: s_lshr_b32 s10, s27, 16 +; VI-NEXT: v_add_f16_e32 v11, s28, v0 +; VI-NEXT: v_add_f16_sdwa v12, v12, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v12, v11, v12 +; VI-NEXT: v_mov_b32_e32 v11, s10 +; VI-NEXT: s_lshr_b32 s9, s26, 16 +; VI-NEXT: v_add_f16_e32 v10, s27, v0 +; VI-NEXT: v_add_f16_sdwa v11, v11, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v11, v10, v11 +; VI-NEXT: v_mov_b32_e32 v10, s9 +; VI-NEXT: s_lshr_b32 s8, s25, 16 +; VI-NEXT: v_add_f16_e32 v9, s26, v0 +; VI-NEXT: v_add_f16_sdwa v10, v10, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v10, v9, v10 +; VI-NEXT: v_mov_b32_e32 v9, s8 ; VI-NEXT: s_lshr_b32 s4, s16, 16 -; VI-NEXT: v_add_f16_e32 v1, s18, v0 -; VI-NEXT: v_add_f16_sdwa v2, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v2, v1, v2 +; VI-NEXT: s_lshr_b32 s7, s24, 16 +; VI-NEXT: v_add_f16_e32 v8, s25, v0 +; VI-NEXT: v_add_f16_sdwa v9, v9, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: s_lshr_b32 s4, s17, 16 -; VI-NEXT: v_add_f16_sdwa v15, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_or_b32_e32 v9, v8, v9 +; VI-NEXT: v_mov_b32_e32 v8, s7 +; VI-NEXT: v_mov_b32_e32 v2, s4 +; VI-NEXT: s_lshr_b32 s4, s18, 16 +; VI-NEXT: s_lshr_b32 s6, s23, 16 +; VI-NEXT: v_add_f16_e32 v7, s24, v0 +; VI-NEXT: v_add_f16_sdwa v8, v8, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v3, s4 +; VI-NEXT: s_lshr_b32 s4, s19, 16 +; VI-NEXT: v_or_b32_e32 v8, v7, v8 +; VI-NEXT: v_mov_b32_e32 v7, s6 +; VI-NEXT: v_mov_b32_e32 v4, s4 +; VI-NEXT: s_lshr_b32 s4, s20, 16 +; VI-NEXT: s_lshr_b32 s5, s22, 16 +; VI-NEXT: v_add_f16_e32 v6, s23, v0 +; VI-NEXT: v_add_f16_sdwa v7, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v5, s4 +; VI-NEXT: v_or_b32_e32 v7, v6, v7 +; VI-NEXT: v_mov_b32_e32 v6, s5 +; VI-NEXT: v_add_f16_sdwa v19, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: s_lshr_b32 s4, s21, 16 +; VI-NEXT: v_add_f16_e32 v5, s22, v0 +; VI-NEXT: v_add_f16_sdwa v6, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v6, v5, v6 +; VI-NEXT: v_mov_b32_e32 v5, s4 ; VI-NEXT: v_add_f16_e32 v14, s16, v0 -; VI-NEXT: v_add_f16_sdwa v1, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v0, s17, v0 -; VI-NEXT: v_or_b32_e32 v1, v0, v1 +; VI-NEXT: v_add_f16_sdwa v15, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, s17, v0 +; VI-NEXT: v_add_f16_sdwa v16, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s18, v0 +; VI-NEXT: v_add_f16_sdwa v17, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v3, s19, v0 +; VI-NEXT: v_add_f16_sdwa v18, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v4, s20, v0 +; VI-NEXT: v_add_f16_sdwa v5, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v0, s21, v0 +; VI-NEXT: v_or_b32_e32 v5, v0, v5 +; VI-NEXT: v_or_b32_e32 v4, v4, v19 +; VI-NEXT: v_or_b32_e32 v3, v3, v18 +; VI-NEXT: v_or_b32_e32 v2, v2, v17 +; VI-NEXT: v_or_b32_e32 v1, v1, v16 ; VI-NEXT: v_or_b32_e32 v0, v14, v15 ; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: .LBB59_3: diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll index 092528a4feb1e..b8e888f713a29 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll @@ -3913,10 +3913,10 @@ define <16 x i32> @bitcast_v32f16_to_v16i32(<32 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v40 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v30 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v55 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v30 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v55 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v54 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -3996,41 +3996,41 @@ define <16 x i32> @bitcast_v32f16_to_v16i32(<32 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB18_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v31 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v30 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v54 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v54 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v29 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v29 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v53 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v28 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v27 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v28 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v52 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v27 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v51 @@ -5573,18 +5573,18 @@ define <16 x i32> @bitcast_v32bf16_to_v16i32(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB22_2 ; SI-NEXT: .LBB22_4: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v54 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v52 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v55 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v53 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v52 ; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v53 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v50 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v51 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 @@ -6888,50 +6888,50 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a ; SI-NEXT: v_readfirstlane_b32 s46, v2 ; SI-NEXT: s_cmp_lg_u32 s46, 0 ; SI-NEXT: v_mul_f32_e64 v41, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v52, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s16 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v63, 1.0, s40 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v54, 1.0, s17 ; SI-NEXT: v_mul_f32_e64 v62, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v52, 1.0, s18 ; SI-NEXT: v_mul_f32_e64 v61, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s19 ; SI-NEXT: v_mul_f32_e64 v60, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v48, 1.0, s20 ; SI-NEXT: v_mul_f32_e64 v59, 1.0, s26 -; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25 -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10 -; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v54, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v50, 1.0, s20 ; SI-NEXT: v_mul_f32_e64 v37, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25 ; SI-NEXT: v_mul_f32_e64 v35, 1.0, s22 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24 ; SI-NEXT: v_mul_f32_e64 v33, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14 ; SI-NEXT: v_mul_f32_e64 v31, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12 ; SI-NEXT: v_mul_f32_e64 v29, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10 ; SI-NEXT: v_mul_f32_e64 v27, 1.0, s11 +; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v25, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6 ; SI-NEXT: v_mul_f32_e64 v23, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v21, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45 ; SI-NEXT: v_mul_f32_e64 v19, 1.0, s44 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43 ; SI-NEXT: v_mul_f32_e64 v17, 1.0, s42 ; SI-NEXT: s_cbranch_scc0 .LBB23_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v63 -; SI-NEXT: v_lshr_b64 v[0:1], v[52:53], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 16 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v62 -; SI-NEXT: v_lshr_b64 v[2:3], v[39:40], 16 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v61 -; SI-NEXT: v_lshr_b64 v[3:4], v[54:55], 16 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v60 -; SI-NEXT: v_lshr_b64 v[4:5], v[50:51], 16 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v41 +; SI-NEXT: v_lshr_b64 v[0:1], v[39:40], 16 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v63 +; SI-NEXT: v_lshr_b64 v[1:2], v[54:55], 16 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v62 +; SI-NEXT: v_lshr_b64 v[2:3], v[52:53], 16 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v61 +; SI-NEXT: v_lshr_b64 v[3:4], v[50:51], 16 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60 +; SI-NEXT: v_lshr_b64 v[4:5], v[48:49], 16 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59 ; SI-NEXT: v_lshr_b64 v[5:6], v[37:38], 16 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v58 @@ -6959,31 +6959,31 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a ; SI-NEXT: s_cbranch_execnz .LBB23_3 ; SI-NEXT: .LBB23_2: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v41 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v52 +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v63 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v63 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v54 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v62 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v52 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v61 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v54 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v50 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 ; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v60 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v50 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v48 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 @@ -7081,10 +7081,10 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v20, s30, 0 -; VI-NEXT: v_writelane_b32 v20, s31, 1 +; VI-NEXT: v_writelane_b32 v26, s30, 0 +; VI-NEXT: v_writelane_b32 v26, s31, 1 ; VI-NEXT: v_readfirstlane_b32 s4, v2 ; VI-NEXT: v_readfirstlane_b32 s31, v1 ; VI-NEXT: s_cmp_lg_u32 s4, 0 @@ -7093,302 +7093,302 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB23_4 ; VI-NEXT: .LBB23_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v16, 0x40c00000 +; VI-NEXT: s_lshl_b32 s4, s31, 16 +; VI-NEXT: v_mov_b32_e32 v0, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s31, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s30, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: s_and_b32 s4, s30, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v16 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s29, 16 +; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s28, 16 +; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s28, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v16 +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s28, 0xffff0000 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_bfe_u32 v5, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s27, 16 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s27, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v6, 0x400000, v2 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[0:1] -; VI-NEXT: v_cndmask_b32_e64 v0, v3, v4, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: s_and_b32 s5, s26, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s26, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s24, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s26, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s25, 16 +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s25, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s24, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[19:20], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s22, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s24, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s23, 16 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s22, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s20, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s20, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[21:22], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s18, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s19, 16 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s18, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s17, 16 +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_cndmask_b32_e32 v23, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s16, 16 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v16 +; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v0 +; VI-NEXT: v_lshrrev_b64 v[23:24], 16, v[23:24] +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: s_and_b32 s6, s16, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v24, v3, v5, vcc ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s6, v16 -; VI-NEXT: v_bfe_u32 v5, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc -; VI-NEXT: s_lshl_b32 s6, s17, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v1, v3, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v5 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v1, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s17, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_bfe_u32 v7, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v3 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v7, v9, vcc -; VI-NEXT: s_lshl_b32 s6, s19, 16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_cndmask_b32_e64 v17, v1, v5, s[4:5] -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s19, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v9, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v3 -; VI-NEXT: s_lshl_b32 s6, s21, 16 -; VI-NEXT: v_mov_b32_e32 v1, v17 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_cndmask_b32_e64 v17, v5, v7, s[4:5] -; VI-NEXT: v_add_f32_e32 v5, s6, v16 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: s_and_b32 s6, s21, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v3, v9, v11, vcc -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s6, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 -; VI-NEXT: v_bfe_u32 v11, v5, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_lshl_b32 s6, s23, 16 -; VI-NEXT: v_mov_b32_e32 v3, v17 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_cndmask_b32_e64 v17, v7, v9, s[4:5] -; VI-NEXT: v_add_f32_e32 v7, s6, v16 -; VI-NEXT: v_cndmask_b32_e32 v5, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: s_and_b32 s6, s23, 0xffff0000 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v13, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v7 -; VI-NEXT: s_lshl_b32 s6, s25, 16 -; VI-NEXT: v_mov_b32_e32 v5, v17 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_cndmask_b32_e64 v17, v9, v11, s[4:5] -; VI-NEXT: v_add_f32_e32 v9, s6, v16 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: s_and_b32 s6, s25, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v7, v13, v15, vcc -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s6, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v7 -; VI-NEXT: v_bfe_u32 v15, v9, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v9 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_mov_b32_e32 v7, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_cndmask_b32_e32 v9, v15, v17, vcc -; VI-NEXT: s_lshl_b32 s6, s27, 16 -; VI-NEXT: v_cndmask_b32_e64 v17, v11, v13, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 -; VI-NEXT: v_add_f32_e32 v11, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: s_and_b32 s6, s27, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s6, v16 -; VI-NEXT: v_mov_b32_e32 v9, v17 -; VI-NEXT: v_bfe_u32 v17, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v11 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: s_and_b32 s7, s31, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v11, v17, v18, vcc -; VI-NEXT: v_cndmask_b32_e64 v17, v13, v15, s[4:5] -; VI-NEXT: v_add_f32_e32 v13, s7, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v11 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: s_lshl_b32 s6, s31, 16 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_mov_b32_e32 v11, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s6, v16 -; VI-NEXT: v_cndmask_b32_e32 v15, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v17, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v13 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v15 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: s_lshl_b32 s4, s29, 16 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v19, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v16 -; VI-NEXT: v_bfe_u32 v16, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v16, vcc, v16, v15 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v16 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_cndmask_b32_e32 v15, v16, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v13 -; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[15:16] -; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[17:18] -; VI-NEXT: v_mov_b32_e32 v13, v15 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v0 +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[24:25] +; VI-NEXT: v_mov_b32_e32 v1, v23 +; VI-NEXT: v_mov_b32_e32 v3, v22 +; VI-NEXT: v_mov_b32_e32 v5, v21 +; VI-NEXT: v_mov_b32_e32 v7, v20 +; VI-NEXT: v_mov_b32_e32 v9, v19 +; VI-NEXT: v_mov_b32_e32 v11, v18 +; VI-NEXT: v_mov_b32_e32 v13, v17 ; VI-NEXT: v_mov_b32_e32 v15, v16 ; VI-NEXT: s_branch .LBB23_5 ; VI-NEXT: .LBB23_3: @@ -7411,10 +7411,10 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a ; VI-NEXT: v_mov_b32_e32 v14, s30 ; VI-NEXT: v_mov_b32_e32 v15, s31 ; VI-NEXT: .LBB23_5: ; %end -; VI-NEXT: v_readlane_b32 s30, v20, 0 -; VI-NEXT: v_readlane_b32 s31, v20, 1 +; VI-NEXT: v_readlane_b32 s30, v26, 0 +; VI-NEXT: v_readlane_b32 s31, v26, 1 ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -7451,29 +7451,29 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a ; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 ; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s4, v0 -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: s_lshl_b32 s4, s30, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; GFX9-NEXT: v_add_f32_e32 v4, s4, v0 -; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 ; GFX9-NEXT: v_mov_b32_e32 v16, 0xffff -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc +; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v15, v1, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v3 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: s_lshl_b32 s4, s30, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v14, v1, 16, v2 ; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 @@ -7737,10 +7737,10 @@ define inreg <16 x i32> @bitcast_v32bf16_to_v16i32_scalar(<32 x bfloat> inreg %a ; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 ; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_and_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; GFX9-NEXT: v_and_b32_sdwa v0, v16, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v0, v17, 16, v0 ; GFX9-NEXT: s_branch .LBB23_5 ; GFX9-NEXT: .LBB23_3: ; GFX9-NEXT: s_branch .LBB23_2 @@ -8917,111 +8917,108 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr30 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr29 -; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; implicit-def: $vgpr27 +; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; implicit-def: $vgpr26 +; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: ; implicit-def: $vgpr60 ; VI-NEXT: ; implicit-def: $vgpr59 +; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr45 ; VI-NEXT: ; implicit-def: $vgpr44 ; VI-NEXT: ; implicit-def: $vgpr43 ; VI-NEXT: ; implicit-def: $vgpr42 ; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr40 ; VI-NEXT: ; implicit-def: $vgpr55 ; VI-NEXT: ; implicit-def: $vgpr54 ; VI-NEXT: ; implicit-def: $vgpr53 ; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: ; implicit-def: $vgpr51 ; VI-NEXT: ; implicit-def: $vgpr50 ; VI-NEXT: ; implicit-def: $vgpr49 ; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 ; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr18 ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr27 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr26 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr22 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr30 +; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr17 +; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; kill: killed $vgpr27 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB24_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16 ; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8] -; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v16 ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; VI-NEXT: v_mov_b32_e32 v27, v21 -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4] -; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; VI-NEXT: .LBB24_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB24_4 @@ -9034,164 +9031,161 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 { ; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12 ; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11 ; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] -; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 -; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3 -; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 -; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7 ; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10 ; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 -; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1 +; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 +; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] ; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 ; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5 -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8] -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4] -; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v16 -; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16 +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 +; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3 +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 +; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1 +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15 -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; VI-NEXT: .LBB24_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v21, v30, v23, s4 -; VI-NEXT: v_perm_b32 v1, v1, v31, s4 -; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_or_b32_e32 v1, v1, v21 +; VI-NEXT: v_perm_b32 v24, v26, v24, s4 +; VI-NEXT: v_perm_b32 v1, v1, v25, s4 +; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; VI-NEXT: v_or_b32_e32 v1, v1, v24 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v28, v63, s4 -; VI-NEXT: v_perm_b32 v2, v2, v29, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v2, v63, s4 +; VI-NEXT: v_perm_b32 v2, v62, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v61, v20, s4 -; VI-NEXT: v_perm_b32 v2, v3, v62, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v59, v23, s4 +; VI-NEXT: v_perm_b32 v1, v3, v60, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v59, v58, s4 -; VI-NEXT: v_perm_b32 v1, v4, v60, s4 +; VI-NEXT: v_perm_b32 v2, v57, v56, s4 +; VI-NEXT: v_perm_b32 v1, v4, v58, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v56, v26, s4 -; VI-NEXT: v_perm_b32 v1, v5, v57, s4 +; VI-NEXT: v_perm_b32 v2, v46, v22, s4 +; VI-NEXT: v_perm_b32 v1, v5, v47, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v46, v45, s4 -; VI-NEXT: v_perm_b32 v1, v6, v47, s4 +; VI-NEXT: v_perm_b32 v2, v44, v43, s4 +; VI-NEXT: v_perm_b32 v1, v6, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v43, v25, s4 -; VI-NEXT: v_perm_b32 v1, v7, v44, s4 +; VI-NEXT: v_perm_b32 v2, v41, v21, s4 +; VI-NEXT: v_perm_b32 v1, v7, v42, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v41, v40, s4 -; VI-NEXT: v_perm_b32 v1, v8, v42, s4 +; VI-NEXT: v_perm_b32 v2, v55, v54, s4 +; VI-NEXT: v_perm_b32 v1, v8, v40, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v54, v22, s4 -; VI-NEXT: v_perm_b32 v1, v9, v55, s4 +; VI-NEXT: v_perm_b32 v2, v52, v20, s4 +; VI-NEXT: v_perm_b32 v1, v9, v53, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v52, v51, s4 -; VI-NEXT: v_perm_b32 v1, v10, v53, s4 +; VI-NEXT: v_perm_b32 v2, v50, v49, s4 +; VI-NEXT: v_perm_b32 v1, v10, v51, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v49, v19, s4 -; VI-NEXT: v_perm_b32 v1, v11, v50, s4 +; VI-NEXT: v_perm_b32 v2, v39, v19, s4 +; VI-NEXT: v_perm_b32 v1, v11, v48, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v39, v38, s4 -; VI-NEXT: v_perm_b32 v1, v12, v48, s4 +; VI-NEXT: v_perm_b32 v2, v37, v36, s4 +; VI-NEXT: v_perm_b32 v1, v12, v38, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v36, v18, s4 -; VI-NEXT: v_perm_b32 v1, v13, v37, s4 +; VI-NEXT: v_perm_b32 v2, v34, v18, s4 +; VI-NEXT: v_perm_b32 v1, v13, v35, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v34, v33, s4 -; VI-NEXT: v_perm_b32 v1, v14, v35, s4 +; VI-NEXT: v_perm_b32 v2, v32, v31, s4 +; VI-NEXT: v_perm_b32 v1, v14, v33, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v15, v32, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v17, s4 +; VI-NEXT: v_perm_b32 v2, v29, v17, s4 +; VI-NEXT: v_perm_b32 v1, v15, v30, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v27, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v16, v28, s4 ; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v16, v1, s4 +; VI-NEXT: v_perm_b32 v2, v27, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -9233,111 +9227,108 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr25 +; GFX9-NEXT: ; implicit-def: $vgpr26 ; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr29 -; GFX9-NEXT: ; implicit-def: $vgpr28 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr21 +; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr58 ; GFX9-NEXT: ; implicit-def: $vgpr57 ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr44 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr40 ; GFX9-NEXT: ; implicit-def: $vgpr55 ; GFX9-NEXT: ; implicit-def: $vgpr54 ; GFX9-NEXT: ; implicit-def: $vgpr53 ; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr20 ; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr50 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr27 -; GFX9-NEXT: ; implicit-def: $vgpr25 -; GFX9-NEXT: ; implicit-def: $vgpr26 -; GFX9-NEXT: ; implicit-def: $vgpr23 -; GFX9-NEXT: ; implicit-def: $vgpr20 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr31 +; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr17 +; GFX9-NEXT: ; implicit-def: $vgpr28 +; GFX9-NEXT: ; kill: killed $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB24_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16 ; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16 ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: v_mov_b32_e32 v27, v22 -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB24_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB24_4 @@ -9353,130 +9344,127 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u32_e32 v10, 3, v10 ; GFX9-NEXT: v_add_u32_e32 v9, 3, v9 ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; GFX9-NEXT: v_add_u32_e32 v4, 3, v4 -; GFX9-NEXT: v_add_u32_e32 v3, 3, v3 ; GFX9-NEXT: v_add_u32_e32 v8, 3, v8 ; GFX9-NEXT: v_add_u32_e32 v7, 3, v7 ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_add_u32_e32 v2, 3, v2 -; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 ; GFX9-NEXT: v_add_u32_e32 v6, 3, v6 ; GFX9-NEXT: v_add_u32_e32 v5, 3, v5 -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_add_u32_e32 v4, 3, v4 +; GFX9-NEXT: v_add_u32_e32 v3, 3, v3 +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_add_u32_e32 v2, 3, v2 +; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16 ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB24_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v25, s4 +; GFX9-NEXT: v_perm_b32 v24, v26, v24, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 -; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4 +; GFX9-NEXT: v_perm_b32 v1, v2, v63, s4 +; GFX9-NEXT: v_perm_b32 v2, v62, v61, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1 +; GFX9-NEXT: v_perm_b32 v1, v3, v60, s4 +; GFX9-NEXT: v_perm_b32 v2, v59, v23, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4 -; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4 +; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4 +; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4 -; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4 +; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4 +; GFX9-NEXT: v_perm_b32 v2, v46, v22, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4 -; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4 +; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4 +; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4 -; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4 +; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v41, v21, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4 -; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4 +; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4 +; GFX9-NEXT: v_perm_b32 v2, v55, v54, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4 -; GFX9-NEXT: v_perm_b32 v2, v54, v20, s4 +; GFX9-NEXT: v_perm_b32 v1, v9, v53, s4 +; GFX9-NEXT: v_perm_b32 v2, v52, v20, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: v_perm_b32 v1, v10, v53, s4 -; GFX9-NEXT: v_perm_b32 v2, v52, v51, s4 +; GFX9-NEXT: v_perm_b32 v1, v10, v51, s4 +; GFX9-NEXT: v_perm_b32 v2, v50, v49, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_perm_b32 v1, v11, v50, s4 -; GFX9-NEXT: v_perm_b32 v2, v49, v19, s4 +; GFX9-NEXT: v_perm_b32 v1, v11, v48, s4 +; GFX9-NEXT: v_perm_b32 v2, v39, v19, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: v_perm_b32 v1, v12, v48, s4 -; GFX9-NEXT: v_perm_b32 v2, v39, v38, s4 +; GFX9-NEXT: v_perm_b32 v1, v12, v38, s4 +; GFX9-NEXT: v_perm_b32 v2, v37, v36, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_perm_b32 v1, v13, v37, s4 -; GFX9-NEXT: v_perm_b32 v2, v36, v18, s4 +; GFX9-NEXT: v_perm_b32 v1, v13, v35, s4 +; GFX9-NEXT: v_perm_b32 v2, v34, v18, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v1, v14, v35, s4 -; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4 +; GFX9-NEXT: v_perm_b32 v1, v14, v33, s4 +; GFX9-NEXT: v_perm_b32 v2, v32, v31, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4 +; GFX9-NEXT: v_perm_b32 v1, v15, v30, s4 +; GFX9-NEXT: v_perm_b32 v2, v29, v17, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v16, v28, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4 +; GFX9-NEXT: v_perm_b32 v2, v27, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -10026,10 +10014,10 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 8 ; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24 ; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 8 -; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 24 -; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 8 +; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 8 +; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 24 +; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 8 ; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 ; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8 @@ -10068,6 +10056,16 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 8 ; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24 ; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 8 +; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 24 +; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 8 +; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 +; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8 +; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 24 +; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 8 ; SI-NEXT: s_lshr_b32 s38, s5, 24 ; SI-NEXT: s_lshr_b32 s39, s5, 16 ; SI-NEXT: s_lshr_b32 s48, s5, 8 @@ -10092,25 +10090,15 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32 ; SI-NEXT: s_lshr_b32 s83, s17, 24 ; SI-NEXT: s_lshr_b32 s84, s17, 16 ; SI-NEXT: s_lshr_b32 s85, s17, 8 -; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 8 -; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 24 -; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 8 -; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 -; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8 -; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 24 -; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 8 ; SI-NEXT: .LBB25_3: ; %end -; SI-NEXT: s_lshl_b32 s7, s36, 8 -; SI-NEXT: s_and_b32 s9, s16, 0xff -; SI-NEXT: s_or_b32 s7, s9, s7 +; SI-NEXT: s_and_b32 s7, s16, 0xff +; SI-NEXT: s_lshl_b32 s9, s36, 8 +; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: s_and_b32 s9, s34, 0xff -; SI-NEXT: s_lshl_b32 s11, s30, 24 ; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: s_lshl_b32 s11, s30, 24 ; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s9, s11, s9 ; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: v_mov_b32_e32 v1, s7 ; SI-NEXT: s_and_b32 s7, s17, 0xff @@ -10119,45 +10107,46 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32 ; SI-NEXT: s_and_b32 s9, s84, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_lshl_b32 s11, s83, 24 -; SI-NEXT: s_or_b32 s9, s11, s9 ; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s9, s11, s9 ; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: v_mov_b32_e32 v2, s7 -; SI-NEXT: s_lshl_b32 s7, s94, 8 -; SI-NEXT: s_and_b32 s9, s18, 0xff -; SI-NEXT: s_or_b32 s7, s9, s7 +; SI-NEXT: s_and_b32 s7, s18, 0xff +; SI-NEXT: s_lshl_b32 s9, s94, 8 +; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: s_and_b32 s9, s92, 0xff -; SI-NEXT: s_lshl_b32 s11, s90, 24 ; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: s_lshl_b32 s11, s90, 24 ; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0 ; SI-NEXT: s_or_b32 s7, s7, s9 -; SI-NEXT: v_mov_b32_e32 v3, s7 +; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v2, s7 ; SI-NEXT: s_and_b32 s7, s19, 0xff ; SI-NEXT: s_lshl_b32 s9, s82, 8 ; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: s_and_b32 s9, s81, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_lshl_b32 s11, s80, 24 -; SI-NEXT: s_or_b32 s9, s11, s9 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0 +; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0 ; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s7 ; SI-NEXT: s_and_b32 s7, s20, 0xff -; SI-NEXT: s_lshl_b32 s9, s78, 8 +; SI-NEXT: s_lshl_b32 s9, s88, 8 ; SI-NEXT: s_or_b32 s7, s7, s9 -; SI-NEXT: s_and_b32 s9, s76, 0xff +; SI-NEXT: s_and_b32 s9, s78, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s74, 24 -; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0 +; SI-NEXT: s_lshl_b32 s11, s76, 24 ; SI-NEXT: s_and_b32 s7, s7, 0xffff ; SI-NEXT: s_or_b32 s9, s11, s9 -; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen ; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0 ; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen @@ -10177,7 +10166,7 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s7 ; SI-NEXT: s_and_b32 s7, s22, 0xff -; SI-NEXT: s_lshl_b32 s9, s88, 8 +; SI-NEXT: s_lshl_b32 s9, s74, 8 ; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: s_and_b32 s9, s72, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 @@ -10355,42 +10344,42 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32 ; SI-NEXT: ; implicit-def: $sgpr82 ; SI-NEXT: ; implicit-def: $sgpr81 ; SI-NEXT: ; implicit-def: $sgpr80 +; SI-NEXT: ; implicit-def: $sgpr88 ; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr71 ; SI-NEXT: ; implicit-def: $sgpr70 ; SI-NEXT: ; implicit-def: $sgpr69 +; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr68 ; SI-NEXT: ; implicit-def: $sgpr67 ; SI-NEXT: ; implicit-def: $sgpr66 -; SI-NEXT: ; implicit-def: $sgpr65 -; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr55 -; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr51 -; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr49 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr88 -; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr65 +; SI-NEXT: ; implicit-def: $sgpr64 +; SI-NEXT: ; implicit-def: $sgpr55 ; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr54 +; SI-NEXT: ; implicit-def: $sgpr53 +; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr51 +; SI-NEXT: ; implicit-def: $sgpr50 +; SI-NEXT: ; implicit-def: $sgpr49 ; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; implicit-def: $sgpr39 +; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: s_branch .LBB25_2 ; ; VI-LABEL: bitcast_v16i32_to_v64i8_scalar: @@ -11387,19 +11376,19 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v34, v6 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: v_mov_b32_e32 v33, v4 ; SI-NEXT: v_mov_b32_e32 v32, v2 ; SI-NEXT: v_mov_b32_e32 v31, v0 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:8 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:16 ; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:16 ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:24 ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:32 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:40 @@ -11414,24 +11403,24 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:112 ; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:120 ; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:128 -; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v19 +; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v17 ; SI-NEXT: v_lshlrev_b32_e32 v26, 8, v25 +; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v19 ; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v21 ; SI-NEXT: v_lshlrev_b32_e32 v24, 24, v23 ; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27 ; SI-NEXT: v_lshlrev_b32_e32 v30, 8, v29 ; SI-NEXT: v_lshlrev_b32_e32 v49, 8, v1 ; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v3 -; SI-NEXT: v_lshlrev_b32_e32 v39, 8, v5 -; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v7 -; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v9 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v11 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v13 +; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v5 +; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v7 +; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v9 +; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v11 +; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v13 ; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v15 -; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v17 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; SI-NEXT: v_lshlrev_b32_e32 v17, 24, v2 +; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v2 ; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v4 ; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v6 ; SI-NEXT: s_waitcnt vmcnt(13) @@ -11449,9 +11438,9 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v52 ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v53 +; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v53 ; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v55 +; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v55 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v40 ; SI-NEXT: s_waitcnt vmcnt(3) @@ -11467,47 +11456,43 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 +; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v47 ; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_lshlrev_b32_e32 v50, 24, v58 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v47 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:108 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:92 ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:76 ; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:68 ; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:60 ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB26_2 ; SI-NEXT: ; %bb.1: ; %cmp.false +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v31 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v32 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v33 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v34 ; SI-NEXT: v_or_b32_e32 v0, v0, v49 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v2, v2, v39 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v1, v48, v1 -; SI-NEXT: v_or_b32_e32 v3, v35, v3 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xff, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v34 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v29 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v62, v9 @@ -11522,16 +11507,13 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v12, v54, v12 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v44 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v21, v13 +; SI-NEXT: v_or_b32_e32 v13, v19, v13 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v53 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v27, v14 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v29 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr52 @@ -11541,67 +11523,79 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v39, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v2, v2, v36 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v3, v36, v3 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_or_b32_e32 v4, v16, v4 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v20, v5 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v24, v6 -; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v35 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_or_b32_e32 v7, v28, v7 ; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v3, v38 +; SI-NEXT: v_or_b32_e32 v3, v3, v37 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v17, v8 -; SI-NEXT: ; implicit-def: $vgpr17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v8, v38, v8 +; SI-NEXT: v_or_b32_e32 v16, v50, v16 +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v18 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -11648,10 +11642,10 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v40 -; SI-NEXT: v_or_b32_e32 v13, v13, v19 +; SI-NEXT: v_or_b32_e32 v13, v13, v17 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v23 +; SI-NEXT: v_and_b32_e32 v14, 0xff, v21 ; SI-NEXT: v_or_b32_e32 v14, v14, v25 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 @@ -11662,24 +11656,19 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr47 ; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v15, v23 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v50, v16 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; kill: killed $vgpr16 @@ -11706,19 +11695,20 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; kill: killed $vgpr16 +; SI-NEXT: ; implicit-def: $vgpr16 +; SI-NEXT: ; kill: killed $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: .LBB26_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB26_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v31 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 @@ -11732,17 +11722,13 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v34 -; SI-NEXT: v_or_b32_e32 v1, v39, v1 +; SI-NEXT: v_or_b32_e32 v1, v34, v1 ; SI-NEXT: s_movk_i32 s6, 0x300 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v2, v35, v2 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v29 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v57 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 @@ -11762,75 +11748,85 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v21, v13 +; SI-NEXT: v_or_b32_e32 v13, v19, v13 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v53 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v27, v14 -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v29 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: s_mov_b32 s7, 0x3000000 ; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v39, v2 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 -; SI-NEXT: v_or_b32_e32 v2, v36, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v3, v36, v3 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_or_b32_e32 v4, v16, v4 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v20, v5 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v24, v6 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v35, v2 +; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_or_b32_e32 v7, v28, v7 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v38, v3 +; SI-NEXT: v_or_b32_e32 v3, v37, v3 ; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v3, vcc, s7, v3 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v17, v8 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v8, v38, v8 +; SI-NEXT: v_or_b32_e32 v16, v50, v16 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_or_b32_e32 v4, v18, v4 @@ -11896,11 +11892,11 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v40 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 -; SI-NEXT: v_or_b32_e32 v13, v19, v13 +; SI-NEXT: v_or_b32_e32 v13, v17, v13 ; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v23 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v21 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_or_b32_e32 v14, v25, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 @@ -11918,15 +11914,9 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v23, v15 ; SI-NEXT: v_add_i32_e32 v15, vcc, 0x300, v15 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v50, v16 ; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v15 ; SI-NEXT: .LBB26_4: ; %end @@ -11972,8 +11962,8 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v53, v1 @@ -12002,7 +11992,7 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:16 ; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:12 ; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:4 ; VI-NEXT: v_mov_b32_e32 v31, v15 ; VI-NEXT: v_mov_b32_e32 v32, v14 ; VI-NEXT: v_mov_b32_e32 v33, v13 @@ -12020,7 +12010,7 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:124 +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:124 ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:120 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill @@ -12035,10 +12025,10 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:104 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:100 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:96 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill @@ -12052,14 +12042,14 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_mov_b32 s6, 0xc0c0004 ; VI-NEXT: v_perm_b32 v1, v52, v51, s6 -; VI-NEXT: v_perm_b32 v3, v48, v39, s6 ; VI-NEXT: v_perm_b32 v0, v54, v53, s6 -; VI-NEXT: v_perm_b32 v2, v50, v49, s6 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_perm_b32 v2, v48, v39, s6 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_perm_b32 v1, v50, v49, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_perm_b32 v3, v36, v35, s6 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_perm_b32 v2, v38, v37, s6 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_perm_b32 v4, v32, v31, s6 @@ -12124,8 +12114,8 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr59 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v14, v15, v14, s6 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 @@ -12142,7 +12132,7 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v8, v8, v30, s6 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_perm_b32 v8, v57, v56, s6 +; VI-NEXT: v_perm_b32 v8, v25, v56, s6 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 ; VI-NEXT: v_perm_b32 v9, v47, v46, s6 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 @@ -12154,8 +12144,8 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v12, v12, v13 ; VI-NEXT: v_perm_b32 v13, v58, v24, s6 ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; kill: killed $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr24 @@ -12171,7 +12161,7 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; kill: killed $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr30 -; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr25 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr46 @@ -12197,29 +12187,29 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v15, v16, v15, s6 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v16, v25, v16, s6 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: v_perm_b32 v16, v57, v16, s6 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: v_or_b32_e32 v15, v15, v16 ; VI-NEXT: ; implicit-def: $vgpr16 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: .LBB26_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB26_4 @@ -12230,19 +12220,19 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_e32 v1, 3, v52 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v51 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v2, 3, v50 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v49 -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v3, 3, v48 -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v39 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_mov_b32_e32 v15, 0x300 ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_add_u16_sdwa v1, v1, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 -; VI-NEXT: v_add_u16_sdwa v3, v3, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v50 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v49 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v2, 3, v48 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v39 +; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 +; VI-NEXT: v_add_u16_sdwa v2, v2, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v38 ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v37 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -12287,7 +12277,7 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v42 ; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v63 ; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v59 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload @@ -12296,7 +12286,7 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v6, 0x300, v6 ; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 @@ -12325,7 +12315,7 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v8, v8, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_add_u16_e32 v8, 3, v57 +; VI-NEXT: v_add_u16_e32 v8, 3, v25 ; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v56 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 3, v26 @@ -12375,8 +12365,8 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v14, v16, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v14, v14, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v14, 3, v14 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -12396,7 +12386,7 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v17, 3, v25 +; VI-NEXT: v_add_u16_e32 v17, 3, v57 ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v16, 0x300, v16 ; VI-NEXT: v_add_u16_sdwa v15, v17, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -12448,11 +12438,13 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v53, v1 ; GFX9-NEXT: v_mov_b32_e32 v54, v0 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:128 +; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:92 ; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:88 ; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:84 ; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:80 @@ -12468,12 +12460,12 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40 ; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 ; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:32 -; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:28 -; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:24 +; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28 +; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:24 ; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:20 ; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:16 -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:12 -; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:8 +; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:12 +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:4 ; GFX9-NEXT: v_mov_b32_e32 v31, v15 ; GFX9-NEXT: v_mov_b32_e32 v32, v14 @@ -12489,9 +12481,9 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_mov_b32_e32 v50, v4 ; GFX9-NEXT: v_mov_b32_e32 v51, v3 ; GFX9-NEXT: v_mov_b32_e32 v52, v2 -; GFX9-NEXT: s_waitcnt vmcnt(24) +; GFX9-NEXT: s_waitcnt vmcnt(25) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; GFX9-NEXT: s_waitcnt vmcnt(22) +; GFX9-NEXT: s_waitcnt vmcnt(23) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124 ; GFX9-NEXT: s_nop 0 @@ -12515,22 +12507,20 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:96 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:92 -; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB26_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004 ; GFX9-NEXT: v_perm_b32 v0, v54, v53, s6 ; GFX9-NEXT: v_perm_b32 v1, v52, v51, s6 -; GFX9-NEXT: v_perm_b32 v2, v50, v49, s6 -; GFX9-NEXT: v_perm_b32 v3, v48, v39, s6 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_perm_b32 v1, v50, v49, s6 +; GFX9-NEXT: v_perm_b32 v2, v48, v39, s6 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: v_perm_b32 v2, v38, v37, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v35, s6 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 @@ -12541,14 +12531,8 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v5, v18, v19, s6 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 ; GFX9-NEXT: v_perm_b32 v5, v20, v21, s6 -; GFX9-NEXT: v_perm_b32 v6, v22, v23, s6 -; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v9, v47, v46, s6 -; GFX9-NEXT: v_perm_b32 v10, v45, v44, s6 +; GFX9-NEXT: v_perm_b32 v9, v25, v46, s6 +; GFX9-NEXT: v_perm_b32 v10, v27, v44, s6 ; GFX9-NEXT: v_perm_b32 v11, v42, v30, s6 ; GFX9-NEXT: v_perm_b32 v12, v55, v63, s6 ; GFX9-NEXT: v_perm_b32 v13, v60, v59, s6 @@ -12573,11 +12557,9 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr20 ; GFX9-NEXT: ; implicit-def: $vgpr21 -; GFX9-NEXT: ; implicit-def: $vgpr22 -; GFX9-NEXT: ; implicit-def: $vgpr23 -; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr25 ; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: ; implicit-def: $vgpr44 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr30 @@ -12585,12 +12567,34 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v6, v22, v6, s6 +; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v14, v23, v14, s6 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v14, v15, v14, s6 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 @@ -12602,9 +12606,9 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6 ; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7 -; GFX9-NEXT: v_perm_b32 v8, v24, v25, s6 +; GFX9-NEXT: v_perm_b32 v8, v24, v47, s6 ; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8 -; GFX9-NEXT: v_perm_b32 v9, v26, v27, s6 +; GFX9-NEXT: v_perm_b32 v9, v26, v45, s6 ; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 ; GFX9-NEXT: v_perm_b32 v10, v28, v29, s6 ; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10 @@ -12618,23 +12622,11 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; GFX9-NEXT: ; implicit-def: $vgpr24 ; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr25 +; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr26 -; GFX9-NEXT: ; implicit-def: $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr28 ; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr41 @@ -12672,8 +12664,6 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; kill: killed $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; kill: killed $vgpr56 -; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15 ; GFX9-NEXT: ; implicit-def: $vgpr16 ; GFX9-NEXT: ; kill: killed $vgpr56 @@ -12682,25 +12672,26 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB26_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v0, 3, v54 ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v53 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v1, 3, v52 ; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v51 ; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v2, 3, v50 -; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v49 -; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v3, 3, v48 -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v39 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: s_movk_i32 s6, 0x300 ; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0 ; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_add_u16_e32 v1, 3, v50 +; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v49 +; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v2, 3, v48 +; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v39 +; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_add_u16_e32 v2, 3, v38 ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v37 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -12732,36 +12723,39 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v21 ; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v6, 3, v22 -; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v23 -; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 -; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v43 ; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v46 ; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v44 ; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v30 ; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v63 ; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v59 +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(5) -; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 +; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v16 ; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 +; GFX9-NEXT: s_waitcnt vmcnt(3) +; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v15 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v15 -; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v16 -; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v7, 3, v7 ; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -12782,17 +12776,17 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v8, v8, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 ; GFX9-NEXT: v_add_u16_e32 v8, 3, v24 -; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v25 +; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v47 ; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v9, 3, v47 +; GFX9-NEXT: v_add_u16_e32 v9, 3, v25 ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 ; GFX9-NEXT: v_add_u16_sdwa v9, v9, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v8, v8, v9 ; GFX9-NEXT: v_add_u16_e32 v9, 3, v26 -; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v27 +; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v45 ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v45 +; GFX9-NEXT: v_add_u16_e32 v10, 3, v27 ; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 ; GFX9-NEXT: v_add_u16_sdwa v10, v10, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -12824,11 +12818,9 @@ define <16 x i32> @bitcast_v64i8_to_v16i32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_e32 v13, 3, v58 ; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v57 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v14, 3, v14 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v23 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 ; GFX9-NEXT: v_add_u16_sdwa v14, v14, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload @@ -13711,8 +13703,6 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; SI-NEXT: v_lshlrev_b32_e32 v27, 8, v27 ; SI-NEXT: s_cbranch_scc0 .LBB27_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s4, s6, 0xff -; SI-NEXT: v_or_b32_e32 v0, s4, v34 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 @@ -13787,65 +13777,66 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; SI-NEXT: s_or_b32 s90, s90, s91 ; SI-NEXT: s_and_b32 s91, s42, 0xff ; SI-NEXT: s_lshl_b32 s92, s41, 8 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 ; SI-NEXT: s_or_b32 s91, s91, s92 ; SI-NEXT: s_and_b32 s92, s40, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_lshl_b32 s92, s92, 16 ; SI-NEXT: s_lshl_b32 s93, s15, 24 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v33, v1 ; SI-NEXT: s_and_b32 s91, s91, 0xffff ; SI-NEXT: s_or_b32 s92, s93, s92 -; SI-NEXT: v_or_b32_e32 v11, v0, v1 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v23 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 ; SI-NEXT: s_or_b32 s91, s91, s92 ; SI-NEXT: s_and_b32 s92, s14, 0xff ; SI-NEXT: s_lshl_b32 s93, s13, 8 -; SI-NEXT: v_or_b32_e32 v0, v0, v30 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_or_b32 s92, s92, s93 ; SI-NEXT: s_and_b32 s93, s12, 0xff -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v29, v1 ; SI-NEXT: s_lshl_b32 s93, s93, 16 ; SI-NEXT: s_lshl_b32 s94, s11, 24 -; SI-NEXT: v_or_b32_e32 v13, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v19 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 ; SI-NEXT: s_and_b32 s92, s92, 0xffff ; SI-NEXT: s_or_b32 s93, s94, s93 -; SI-NEXT: v_or_b32_e32 v0, v0, v27 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_or_b32 s92, s92, s93 ; SI-NEXT: s_and_b32 s93, s10, 0xff ; SI-NEXT: s_lshl_b32 s94, s9, 8 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v25, v1 ; SI-NEXT: s_or_b32 s93, s93, s94 ; SI-NEXT: s_and_b32 s94, s8, 0xff +; SI-NEXT: s_lshl_b32 s94, s94, 16 +; SI-NEXT: s_lshl_b32 s95, s7, 24 +; SI-NEXT: s_and_b32 s93, s93, 0xffff +; SI-NEXT: s_or_b32 s94, s95, s94 +; SI-NEXT: s_or_b32 s93, s93, s94 +; SI-NEXT: s_and_b32 s94, s6, 0xff +; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 +; SI-NEXT: v_or_b32_e32 v0, s94, v34 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 +; SI-NEXT: v_or_b32_e32 v11, v0, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xff, v28 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v26 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v28 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v32 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v31, v1 +; SI-NEXT: v_or_b32_e32 v12, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v23 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 +; SI-NEXT: v_or_b32_e32 v0, v0, v30 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v29, v1 +; SI-NEXT: v_or_b32_e32 v13, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v19 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 +; SI-NEXT: v_or_b32_e32 v0, v0, v27 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v25, v1 ; SI-NEXT: v_or_b32_e32 v14, v0, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v17 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v16 -; SI-NEXT: s_lshl_b32 s94, s94, 16 -; SI-NEXT: s_lshl_b32 s95, s7, 24 -; SI-NEXT: v_or_b32_e32 v2, v2, v32 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v0, v0, v24 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_and_b32 s93, s93, 0xffff -; SI-NEXT: s_or_b32 s94, s95, s94 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v3, v31, v3 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v22, v1 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: v_or_b32_e32 v12, v2, v3 ; SI-NEXT: v_or_b32_e32 v15, v0, v1 ; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: v_mov_b32_e32 v1, s5 @@ -14097,7 +14088,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: v_readfirstlane_b32 s44, v16 ; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:76 ; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:4 ; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 ; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72 ; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:68 @@ -14105,7 +14096,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60 ; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:56 ; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:48 +; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:48 ; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:44 ; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:40 ; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 @@ -14138,18 +14129,18 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -14204,7 +14195,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 ; VI-NEXT: v_or_b32_e32 v10, v10, v12 -; VI-NEXT: v_perm_b32 v12, v24, v22, s4 +; VI-NEXT: v_perm_b32 v12, v23, v22, s4 ; VI-NEXT: v_perm_b32 v11, s6, v26, v11 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 @@ -14220,7 +14211,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: v_or_b32_e32 v13, v14, v13 ; VI-NEXT: v_perm_b32 v14, v21, v20, s4 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; VI-NEXT: v_perm_b32 v15, v25, v23, s4 +; VI-NEXT: v_perm_b32 v15, v25, v24, s4 ; VI-NEXT: v_or_b32_e32 v14, v15, v14 ; VI-NEXT: v_perm_b32 v15, v17, v16, s4 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -14327,10 +14318,10 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: v_perm_b32 v12, s8, v12, v11 ; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: s_mov_b32 s4, 0xc0c0004 ; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s6, s6, 3 -; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v24 +; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v23 ; VI-NEXT: v_perm_b32 v11, s6, v26, v11 ; VI-NEXT: v_perm_b32 v12, v12, v22, s4 ; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 @@ -14353,7 +14344,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v25 ; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v21 -; VI-NEXT: v_perm_b32 v14, v14, v23, s4 +; VI-NEXT: v_perm_b32 v14, v14, v24, s4 ; VI-NEXT: v_perm_b32 v15, v15, v20, s4 ; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -14407,16 +14398,16 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_readfirstlane_b32 s43, v17 ; GFX9-NEXT: v_readfirstlane_b32 s44, v16 ; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:76 -; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:8 -; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:4 -; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 +; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:8 +; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:4 +; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72 ; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:68 ; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:64 ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60 -; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:56 -; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:52 -; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:48 +; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:56 +; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:52 +; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:48 ; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:44 ; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:40 ; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 @@ -14449,18 +14440,18 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s27 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -14516,9 +14507,9 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 ; GFX9-NEXT: v_or_b32_e32 v10, v10, v12 ; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_perm_b32 v12, v23, v21, s4 +; GFX9-NEXT: v_perm_b32 v12, v22, v20, s4 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_perm_b32 v11, s6, v25, v11 +; GFX9-NEXT: v_perm_b32 v11, s6, v24, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 ; GFX9-NEXT: s_waitcnt vmcnt(2) @@ -14531,9 +14522,9 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; GFX9-NEXT: v_perm_b32 v14, v30, v29, s4 ; GFX9-NEXT: v_or_b32_e32 v13, v14, v13 -; GFX9-NEXT: v_perm_b32 v14, v22, v20, s4 +; GFX9-NEXT: v_perm_b32 v14, v23, v21, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX9-NEXT: v_perm_b32 v15, v26, v24, s4 +; GFX9-NEXT: v_perm_b32 v15, v26, v25, s4 ; GFX9-NEXT: v_or_b32_e32 v14, v15, v14 ; GFX9-NEXT: v_perm_b32 v15, v17, v16, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -14546,21 +14537,21 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: s_add_i32 s18, s18, 3 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 -; GFX9-NEXT: s_movk_i32 s4, 0x300 +; GFX9-NEXT: s_movk_i32 s5, 0x300 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v1, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; GFX9-NEXT: v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; GFX9-NEXT: s_add_i32 s20, s20, 3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: s_add_i32 s22, s22, 3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u32_sdwa v2, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s24, s24, 3 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: s_add_i32 s26, s26, 3 @@ -14568,7 +14559,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v3, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s28, s28, 3 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 @@ -14577,7 +14568,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11 ; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11 ; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 -; GFX9-NEXT: v_add_u32_sdwa v4, v4, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v4, v4, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s74, s74, 3 ; GFX9-NEXT: v_mov_b32_e32 v4, s73 @@ -14586,7 +14577,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11 ; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11 ; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 -; GFX9-NEXT: v_add_u32_sdwa v5, v5, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v5, v5, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s62, s62, 3 ; GFX9-NEXT: v_mov_b32_e32 v5, s61 @@ -14595,7 +14586,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11 ; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11 ; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 -; GFX9-NEXT: v_add_u32_sdwa v6, v6, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v6, v6, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s58, s58, 3 ; GFX9-NEXT: v_mov_b32_e32 v6, s57 @@ -14604,7 +14595,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11 ; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11 ; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_add_u32_sdwa v7, v7, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v7, v7, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v6, v6, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s46, s46, 3 ; GFX9-NEXT: v_mov_b32_e32 v7, s45 @@ -14613,7 +14604,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11 ; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11 ; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 -; GFX9-NEXT: v_add_u32_sdwa v8, v8, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v8, v8, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s42, s42, 3 ; GFX9-NEXT: v_mov_b32_e32 v8, s41 @@ -14622,7 +14613,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11 ; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11 ; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v8 -; GFX9-NEXT: v_add_u32_sdwa v9, v9, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v9, v9, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v8, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s14, s14, 3 ; GFX9-NEXT: v_mov_b32_e32 v9, s13 @@ -14631,7 +14622,7 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11 ; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11 ; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v9 -; GFX9-NEXT: v_add_u32_sdwa v10, v10, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v10, v10, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v9, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s10, s10, 3 ; GFX9-NEXT: v_mov_b32_e32 v10, s9 @@ -14640,46 +14631,46 @@ define inreg <16 x i32> @bitcast_v64i8_to_v16i32_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11 ; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11 ; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v10 -; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v12, v12, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 ; GFX9-NEXT: v_or_b32_sdwa v10, v10, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s6, s6, 3 -; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004 ; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_add_u32_e32 v12, 3, v23 +; GFX9-NEXT: v_add_u32_e32 v12, 3, v22 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_perm_b32 v11, s6, v25, v11 -; GFX9-NEXT: v_perm_b32 v12, v12, v21, s5 +; GFX9-NEXT: v_perm_b32 v11, s6, v24, v11 +; GFX9-NEXT: v_perm_b32 v12, v12, v20, s4 ; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v11 -; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v12, v12, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u32_e32 v12, 3, v34 ; GFX9-NEXT: v_add_u32_e32 v13, 3, v32 -; GFX9-NEXT: v_perm_b32 v12, v12, v33, s5 -; GFX9-NEXT: v_perm_b32 v13, v13, v31, s5 +; GFX9-NEXT: v_perm_b32 v12, v12, v33, s4 +; GFX9-NEXT: v_perm_b32 v13, v13, v31, s4 ; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12 -; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v13, v13, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v13, 3, v30 ; GFX9-NEXT: v_add_u32_e32 v14, 3, v28 -; GFX9-NEXT: v_perm_b32 v13, v13, v29, s5 -; GFX9-NEXT: v_perm_b32 v14, v14, v27, s5 +; GFX9-NEXT: v_perm_b32 v13, v13, v29, s4 +; GFX9-NEXT: v_perm_b32 v14, v14, v27, s4 ; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 -; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v14, v14, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v14, 3, v26 -; GFX9-NEXT: v_add_u32_e32 v15, 3, v22 -; GFX9-NEXT: v_perm_b32 v14, v14, v24, s5 -; GFX9-NEXT: v_perm_b32 v15, v15, v20, s5 +; GFX9-NEXT: v_add_u32_e32 v15, 3, v23 +; GFX9-NEXT: v_perm_b32 v14, v14, v25, s4 +; GFX9-NEXT: v_perm_b32 v15, v15, v21, s4 ; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v14 -; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v15, v15, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v15, 3, v19 ; GFX9-NEXT: v_add_u32_e32 v17, 3, v17 -; GFX9-NEXT: v_perm_b32 v15, v15, v18, s5 -; GFX9-NEXT: v_perm_b32 v16, v17, v16, s5 +; GFX9-NEXT: v_perm_b32 v15, v15, v18, s4 +; GFX9-NEXT: v_perm_b32 v16, v17, v16, s4 ; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v15 -; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v16, v16, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: .LBB27_3: ; %end ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -16945,14 +16936,14 @@ define inreg <32 x i16> @bitcast_v16f32_to_v32i16_scalar(<16 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[22:23], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[23:24], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v1 ; SI-NEXT: s_branch .LBB37_5 ; SI-NEXT: .LBB37_3: ; SI-NEXT: ; implicit-def: $sgpr44 @@ -16989,14 +16980,14 @@ define inreg <32 x i16> @bitcast_v16f32_to_v32i16_scalar(<16 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: v_mov_b32_e32 v15, s5 -; SI-NEXT: v_mov_b32_e32 v32, s56 -; SI-NEXT: v_mov_b32_e32 v31, s57 -; SI-NEXT: v_mov_b32_e32 v30, s58 -; SI-NEXT: v_mov_b32_e32 v29, s59 -; SI-NEXT: v_mov_b32_e32 v28, s60 -; SI-NEXT: v_mov_b32_e32 v27, s61 -; SI-NEXT: v_mov_b32_e32 v26, s62 -; SI-NEXT: v_mov_b32_e32 v25, s63 +; SI-NEXT: v_mov_b32_e32 v31, s56 +; SI-NEXT: v_mov_b32_e32 v30, s57 +; SI-NEXT: v_mov_b32_e32 v29, s58 +; SI-NEXT: v_mov_b32_e32 v28, s59 +; SI-NEXT: v_mov_b32_e32 v27, s60 +; SI-NEXT: v_mov_b32_e32 v26, s61 +; SI-NEXT: v_mov_b32_e32 v25, s62 +; SI-NEXT: v_mov_b32_e32 v24, s63 ; SI-NEXT: v_mov_b32_e32 v16, s6 ; SI-NEXT: v_mov_b32_e32 v17, s8 ; SI-NEXT: v_mov_b32_e32 v18, s10 @@ -17006,46 +16997,46 @@ define inreg <32 x i16> @bitcast_v16f32_to_v32i16_scalar(<16 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v22, s42 ; SI-NEXT: v_mov_b32_e32 v23, s44 ; SI-NEXT: .LBB37_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_or_b32_e32 v0, v0, v23 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v31 ; SI-NEXT: v_or_b32_e32 v2, v2, v22 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v30 ; SI-NEXT: v_or_b32_e32 v4, v4, v21 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v29 ; SI-NEXT: v_or_b32_e32 v6, v6, v20 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 ; SI-NEXT: v_or_b32_e32 v8, v8, v19 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v27 ; SI-NEXT: v_or_b32_e32 v10, v10, v18 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v26 ; SI-NEXT: v_or_b32_e32 v12, v12, v17 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v25 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v24 ; SI-NEXT: v_or_b32_e32 v1, v1, v23 ; SI-NEXT: v_or_b32_e32 v3, v3, v22 ; SI-NEXT: v_or_b32_e32 v5, v5, v21 @@ -18286,14 +18277,14 @@ define inreg <32 x half> @bitcast_v16f32_to_v32f16_scalar(<16 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[22:23], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[23:24], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v1 ; SI-NEXT: s_branch .LBB41_5 ; SI-NEXT: .LBB41_3: ; SI-NEXT: ; implicit-def: $sgpr44 @@ -18330,14 +18321,14 @@ define inreg <32 x half> @bitcast_v16f32_to_v32f16_scalar(<16 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: v_mov_b32_e32 v15, s5 -; SI-NEXT: v_mov_b32_e32 v32, s56 -; SI-NEXT: v_mov_b32_e32 v31, s57 -; SI-NEXT: v_mov_b32_e32 v30, s58 -; SI-NEXT: v_mov_b32_e32 v29, s59 -; SI-NEXT: v_mov_b32_e32 v28, s60 -; SI-NEXT: v_mov_b32_e32 v27, s61 -; SI-NEXT: v_mov_b32_e32 v26, s62 -; SI-NEXT: v_mov_b32_e32 v25, s63 +; SI-NEXT: v_mov_b32_e32 v31, s56 +; SI-NEXT: v_mov_b32_e32 v30, s57 +; SI-NEXT: v_mov_b32_e32 v29, s58 +; SI-NEXT: v_mov_b32_e32 v28, s59 +; SI-NEXT: v_mov_b32_e32 v27, s60 +; SI-NEXT: v_mov_b32_e32 v26, s61 +; SI-NEXT: v_mov_b32_e32 v25, s62 +; SI-NEXT: v_mov_b32_e32 v24, s63 ; SI-NEXT: v_mov_b32_e32 v16, s6 ; SI-NEXT: v_mov_b32_e32 v17, s8 ; SI-NEXT: v_mov_b32_e32 v18, s10 @@ -18347,46 +18338,46 @@ define inreg <32 x half> @bitcast_v16f32_to_v32f16_scalar(<16 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v22, s42 ; SI-NEXT: v_mov_b32_e32 v23, s44 ; SI-NEXT: .LBB41_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_or_b32_e32 v0, v0, v23 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v31 ; SI-NEXT: v_or_b32_e32 v2, v2, v22 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v30 ; SI-NEXT: v_or_b32_e32 v4, v4, v21 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v29 ; SI-NEXT: v_or_b32_e32 v6, v6, v20 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 ; SI-NEXT: v_or_b32_e32 v8, v8, v19 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v27 ; SI-NEXT: v_or_b32_e32 v10, v10, v18 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v26 ; SI-NEXT: v_or_b32_e32 v12, v12, v17 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v25 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v24 ; SI-NEXT: v_or_b32_e32 v1, v1, v23 ; SI-NEXT: v_or_b32_e32 v3, v3, v22 ; SI-NEXT: v_or_b32_e32 v5, v5, v21 @@ -18625,10 +18616,10 @@ define <16 x float> @bitcast_v32f16_to_v16f32(<32 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v40 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v30 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v55 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v30 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v55 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v54 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -18708,41 +18699,41 @@ define <16 x float> @bitcast_v32f16_to_v16f32(<32 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB42_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v31 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v30 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v54 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v54 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v29 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v29 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v53 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v28 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v27 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v28 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v52 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v27 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v51 @@ -19828,54 +19819,54 @@ define inreg <32 x bfloat> @bitcast_v16f32_to_v32bf16_scalar(<16 x float> inreg ; SI-NEXT: s_lshl_b32 s79, s16, 16 ; SI-NEXT: s_cbranch_execnz .LBB45_4 ; SI-NEXT: .LBB45_2: ; %cmp.true -; SI-NEXT: v_add_f32_e64 v20, s21, 1.0 -; SI-NEXT: v_add_f32_e64 v18, s22, 1.0 -; SI-NEXT: v_add_f32_e64 v16, s23, 1.0 -; SI-NEXT: v_add_f32_e64 v14, s24, 1.0 -; SI-NEXT: v_add_f32_e64 v12, s25, 1.0 -; SI-NEXT: v_add_f32_e64 v10, s26, 1.0 -; SI-NEXT: v_add_f32_e64 v8, s27, 1.0 -; SI-NEXT: v_add_f32_e64 v6, s28, 1.0 -; SI-NEXT: v_add_f32_e64 v4, s29, 1.0 -; SI-NEXT: v_add_f32_e64 v2, s7, 1.0 -; SI-NEXT: v_add_f32_e64 v0, s6, 1.0 -; SI-NEXT: v_add_f32_e64 v22, s20, 1.0 -; SI-NEXT: v_add_f32_e64 v24, s19, 1.0 -; SI-NEXT: v_add_f32_e64 v26, s18, 1.0 -; SI-NEXT: v_add_f32_e64 v28, s17, 1.0 -; SI-NEXT: v_add_f32_e64 v30, s16, 1.0 +; SI-NEXT: v_add_f32_e64 v0, s21, 1.0 +; SI-NEXT: v_add_f32_e64 v6, s27, 1.0 +; SI-NEXT: v_add_f32_e64 v5, s26, 1.0 +; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v6 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v6 +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v0 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v0 +; SI-NEXT: v_add_f32_e64 v0, s20, 1.0 +; SI-NEXT: v_add_f32_e64 v4, s25, 1.0 +; SI-NEXT: v_add_f32_e64 v10, s6, 1.0 +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v5 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v5 +; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v0 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v0 +; SI-NEXT: v_add_f32_e64 v0, s19, 1.0 +; SI-NEXT: v_add_f32_e64 v3, s24, 1.0 +; SI-NEXT: v_add_f32_e64 v9, s7, 1.0 +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v10 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v10 +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v4 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v4 +; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v0 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v0 +; SI-NEXT: v_add_f32_e64 v0, s18, 1.0 +; SI-NEXT: v_add_f32_e64 v2, s23, 1.0 +; SI-NEXT: v_add_f32_e64 v8, s29, 1.0 +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v9 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v9 +; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v3 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v3 +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v0 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v0 +; SI-NEXT: v_add_f32_e64 v0, s17, 1.0 +; SI-NEXT: v_add_f32_e64 v1, s22, 1.0 +; SI-NEXT: v_add_f32_e64 v7, s28, 1.0 +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v8 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v8 +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v2 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v2 +; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v0 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v0 +; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 +; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v7 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v7 +; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v1 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v0 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v18 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v20 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v22 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v24 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v26 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v28 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v30 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: s_branch .LBB45_5 ; SI-NEXT: .LBB45_3: ; SI-NEXT: ; implicit-def: $sgpr79 @@ -19912,103 +19903,103 @@ define inreg <32 x bfloat> @bitcast_v16f32_to_v32bf16_scalar(<16 x float> inreg ; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: s_branch .LBB45_2 ; SI-NEXT: .LBB45_4: -; SI-NEXT: v_mov_b32_e32 v30, s79 -; SI-NEXT: v_mov_b32_e32 v31, s78 -; SI-NEXT: v_mov_b32_e32 v28, s77 -; SI-NEXT: v_mov_b32_e32 v29, s76 -; SI-NEXT: v_mov_b32_e32 v26, s75 -; SI-NEXT: v_mov_b32_e32 v27, s74 -; SI-NEXT: v_mov_b32_e32 v24, s73 -; SI-NEXT: v_mov_b32_e32 v25, s72 -; SI-NEXT: v_mov_b32_e32 v22, s63 -; SI-NEXT: v_mov_b32_e32 v23, s62 -; SI-NEXT: v_mov_b32_e32 v20, s61 -; SI-NEXT: v_mov_b32_e32 v21, s60 -; SI-NEXT: v_mov_b32_e32 v18, s59 -; SI-NEXT: v_mov_b32_e32 v19, s58 -; SI-NEXT: v_mov_b32_e32 v16, s57 -; SI-NEXT: v_mov_b32_e32 v17, s56 -; SI-NEXT: v_mov_b32_e32 v14, s47 -; SI-NEXT: v_mov_b32_e32 v15, s46 -; SI-NEXT: v_mov_b32_e32 v12, s45 -; SI-NEXT: v_mov_b32_e32 v13, s44 -; SI-NEXT: v_mov_b32_e32 v10, s43 -; SI-NEXT: v_mov_b32_e32 v11, s42 -; SI-NEXT: v_mov_b32_e32 v8, s41 -; SI-NEXT: v_mov_b32_e32 v9, s40 -; SI-NEXT: v_mov_b32_e32 v6, s15 -; SI-NEXT: v_mov_b32_e32 v7, s14 -; SI-NEXT: v_mov_b32_e32 v4, s13 -; SI-NEXT: v_mov_b32_e32 v5, s12 -; SI-NEXT: v_mov_b32_e32 v2, s11 -; SI-NEXT: v_mov_b32_e32 v3, s10 -; SI-NEXT: v_mov_b32_e32 v0, s9 -; SI-NEXT: v_mov_b32_e32 v1, s8 +; SI-NEXT: v_mov_b32_e32 v0, s79 +; SI-NEXT: v_mov_b32_e32 v1, s78 +; SI-NEXT: v_mov_b32_e32 v2, s77 +; SI-NEXT: v_mov_b32_e32 v31, s76 +; SI-NEXT: v_mov_b32_e32 v3, s75 +; SI-NEXT: v_mov_b32_e32 v30, s74 +; SI-NEXT: v_mov_b32_e32 v4, s73 +; SI-NEXT: v_mov_b32_e32 v29, s72 +; SI-NEXT: v_mov_b32_e32 v5, s63 +; SI-NEXT: v_mov_b32_e32 v28, s62 +; SI-NEXT: v_mov_b32_e32 v6, s61 +; SI-NEXT: v_mov_b32_e32 v27, s60 +; SI-NEXT: v_mov_b32_e32 v7, s59 +; SI-NEXT: v_mov_b32_e32 v26, s58 +; SI-NEXT: v_mov_b32_e32 v8, s57 +; SI-NEXT: v_mov_b32_e32 v25, s56 +; SI-NEXT: v_mov_b32_e32 v9, s47 +; SI-NEXT: v_mov_b32_e32 v24, s46 +; SI-NEXT: v_mov_b32_e32 v10, s45 +; SI-NEXT: v_mov_b32_e32 v23, s44 +; SI-NEXT: v_mov_b32_e32 v11, s43 +; SI-NEXT: v_mov_b32_e32 v22, s42 +; SI-NEXT: v_mov_b32_e32 v12, s41 +; SI-NEXT: v_mov_b32_e32 v21, s40 +; SI-NEXT: v_mov_b32_e32 v13, s15 +; SI-NEXT: v_mov_b32_e32 v20, s14 +; SI-NEXT: v_mov_b32_e32 v14, s13 +; SI-NEXT: v_mov_b32_e32 v19, s12 +; SI-NEXT: v_mov_b32_e32 v15, s11 +; SI-NEXT: v_mov_b32_e32 v18, s10 +; SI-NEXT: v_mov_b32_e32 v16, s9 +; SI-NEXT: v_mov_b32_e32 v17, s8 ; SI-NEXT: .LBB45_5: ; %end -; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 -; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 -; SI-NEXT: v_mul_f32_e32 v29, 1.0, v29 ; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 -; SI-NEXT: v_mul_f32_e32 v28, 1.0, v28 -; SI-NEXT: v_mul_f32_e32 v27, 1.0, v27 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v1 -; SI-NEXT: v_mul_f32_e32 v50, 1.0, v0 -; SI-NEXT: v_lshr_b64 v[0:1], v[30:31], 16 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_mul_f32_e32 v26, 1.0, v26 -; SI-NEXT: v_mul_f32_e32 v25, 1.0, v25 -; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3 -; SI-NEXT: v_mul_f32_e32 v48, 1.0, v2 -; SI-NEXT: v_lshr_b64 v[1:2], v[28:29], 16 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 -; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24 -; SI-NEXT: v_mul_f32_e32 v23, 1.0, v23 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v3 -; SI-NEXT: v_lshr_b64 v[2:3], v[26:27], 16 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23 -; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22 -; SI-NEXT: v_mul_f32_e32 v21, 1.0, v21 -; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5 -; SI-NEXT: v_mul_f32_e32 v38, 1.0, v4 -; SI-NEXT: v_lshr_b64 v[3:4], v[24:25], 16 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21 -; SI-NEXT: v_mul_f32_e32 v20, 1.0, v20 -; SI-NEXT: v_mul_f32_e32 v19, 1.0, v19 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v5 -; SI-NEXT: v_lshr_b64 v[4:5], v[22:23], 16 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 -; SI-NEXT: v_mul_f32_e32 v18, 1.0, v18 -; SI-NEXT: v_mul_f32_e32 v17, 1.0, v17 -; SI-NEXT: v_mul_f32_e32 v7, 1.0, v7 -; SI-NEXT: v_mul_f32_e32 v36, 1.0, v6 -; SI-NEXT: v_lshr_b64 v[5:6], v[20:21], 16 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 +; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 +; SI-NEXT: v_mul_f32_e32 v1, 1.0, v31 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 +; SI-NEXT: v_mul_f32_e32 v31, 1.0, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[31:32], 16 +; SI-NEXT: v_mul_f32_e32 v2, 1.0, v30 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v2 +; SI-NEXT: v_mul_f32_e32 v30, 1.0, v3 +; SI-NEXT: v_lshr_b64 v[2:3], v[30:31], 16 +; SI-NEXT: v_mul_f32_e32 v3, 1.0, v29 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v3 +; SI-NEXT: v_mul_f32_e32 v29, 1.0, v4 +; SI-NEXT: v_lshr_b64 v[3:4], v[29:30], 16 +; SI-NEXT: v_mul_f32_e32 v4, 1.0, v28 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v4 +; SI-NEXT: v_mul_f32_e32 v28, 1.0, v5 +; SI-NEXT: v_lshr_b64 v[4:5], v[28:29], 16 +; SI-NEXT: v_mul_f32_e32 v5, 1.0, v27 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v5 +; SI-NEXT: v_mul_f32_e32 v27, 1.0, v6 +; SI-NEXT: v_lshr_b64 v[5:6], v[27:28], 16 +; SI-NEXT: v_mul_f32_e32 v6, 1.0, v26 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v6 +; SI-NEXT: v_mul_f32_e32 v26, 1.0, v7 +; SI-NEXT: v_lshr_b64 v[6:7], v[26:27], 16 +; SI-NEXT: v_mul_f32_e32 v7, 1.0, v25 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v7 +; SI-NEXT: v_mul_f32_e32 v25, 1.0, v8 +; SI-NEXT: v_lshr_b64 v[7:8], v[25:26], 16 +; SI-NEXT: v_mul_f32_e32 v8, 1.0, v24 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v8 +; SI-NEXT: v_mul_f32_e32 v24, 1.0, v9 +; SI-NEXT: v_lshr_b64 v[8:9], v[24:25], 16 +; SI-NEXT: v_mul_f32_e32 v9, 1.0, v23 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9 +; SI-NEXT: v_mul_f32_e32 v23, 1.0, v10 +; SI-NEXT: v_lshr_b64 v[9:10], v[23:24], 16 +; SI-NEXT: v_mul_f32_e32 v10, 1.0, v22 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v10 +; SI-NEXT: v_mul_f32_e32 v22, 1.0, v11 +; SI-NEXT: v_lshr_b64 v[10:11], v[22:23], 16 +; SI-NEXT: v_mul_f32_e32 v11, 1.0, v21 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v11 +; SI-NEXT: v_mul_f32_e32 v21, 1.0, v12 +; SI-NEXT: v_lshr_b64 v[11:12], v[21:22], 16 +; SI-NEXT: v_mul_f32_e32 v12, 1.0, v20 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v12 +; SI-NEXT: v_mul_f32_e32 v20, 1.0, v13 +; SI-NEXT: v_lshr_b64 v[12:13], v[20:21], 16 +; SI-NEXT: v_mul_f32_e32 v13, 1.0, v19 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v13 +; SI-NEXT: v_mul_f32_e32 v19, 1.0, v14 +; SI-NEXT: v_lshr_b64 v[13:14], v[19:20], 16 +; SI-NEXT: v_mul_f32_e32 v14, 1.0, v18 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v14 +; SI-NEXT: v_mul_f32_e32 v18, 1.0, v15 +; SI-NEXT: v_lshr_b64 v[14:15], v[18:19], 16 +; SI-NEXT: v_mul_f32_e32 v15, 1.0, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v15 ; SI-NEXT: v_mul_f32_e32 v16, 1.0, v16 -; SI-NEXT: v_mul_f32_e32 v15, 1.0, v15 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7 -; SI-NEXT: v_lshr_b64 v[6:7], v[18:19], 16 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_mul_f32_e32 v14, 1.0, v14 -; SI-NEXT: v_mul_f32_e32 v13, 1.0, v13 -; SI-NEXT: v_mul_f32_e32 v9, 1.0, v9 -; SI-NEXT: v_mul_f32_e32 v34, 1.0, v8 -; SI-NEXT: v_lshr_b64 v[7:8], v[16:17], 16 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_mul_f32_e32 v12, 1.0, v12 -; SI-NEXT: v_mul_f32_e32 v11, 1.0, v11 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v9 -; SI-NEXT: v_lshr_b64 v[8:9], v[14:15], 16 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; SI-NEXT: v_mul_f32_e32 v32, 1.0, v10 -; SI-NEXT: v_lshr_b64 v[9:10], v[12:13], 16 -; SI-NEXT: v_lshr_b64 v[10:11], v[32:33], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[34:35], 16 -; SI-NEXT: v_lshr_b64 v[12:13], v[36:37], 16 -; SI-NEXT: v_lshr_b64 v[13:14], v[38:39], 16 -; SI-NEXT: v_lshr_b64 v[14:15], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[15:16], v[50:51], 16 +; SI-NEXT: v_lshr_b64 v[15:16], v[16:17], 16 ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v16f32_to_v32bf16_scalar: @@ -20341,18 +20332,18 @@ define <16 x float> @bitcast_v32bf16_to_v16f32(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB46_2 ; SI-NEXT: .LBB46_4: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v54 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v52 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v55 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v53 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v52 ; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v53 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v50 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v51 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 @@ -21656,50 +21647,50 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg ; SI-NEXT: v_readfirstlane_b32 s46, v2 ; SI-NEXT: s_cmp_lg_u32 s46, 0 ; SI-NEXT: v_mul_f32_e64 v41, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v52, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s16 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v63, 1.0, s40 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v54, 1.0, s17 ; SI-NEXT: v_mul_f32_e64 v62, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v52, 1.0, s18 ; SI-NEXT: v_mul_f32_e64 v61, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s19 ; SI-NEXT: v_mul_f32_e64 v60, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v48, 1.0, s20 ; SI-NEXT: v_mul_f32_e64 v59, 1.0, s26 -; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25 -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10 -; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v54, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v50, 1.0, s20 ; SI-NEXT: v_mul_f32_e64 v37, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25 ; SI-NEXT: v_mul_f32_e64 v35, 1.0, s22 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24 ; SI-NEXT: v_mul_f32_e64 v33, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14 ; SI-NEXT: v_mul_f32_e64 v31, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12 ; SI-NEXT: v_mul_f32_e64 v29, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10 ; SI-NEXT: v_mul_f32_e64 v27, 1.0, s11 +; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v25, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6 ; SI-NEXT: v_mul_f32_e64 v23, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v21, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45 ; SI-NEXT: v_mul_f32_e64 v19, 1.0, s44 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43 ; SI-NEXT: v_mul_f32_e64 v17, 1.0, s42 ; SI-NEXT: s_cbranch_scc0 .LBB47_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v63 -; SI-NEXT: v_lshr_b64 v[0:1], v[52:53], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 16 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v62 -; SI-NEXT: v_lshr_b64 v[2:3], v[39:40], 16 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v61 -; SI-NEXT: v_lshr_b64 v[3:4], v[54:55], 16 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v60 -; SI-NEXT: v_lshr_b64 v[4:5], v[50:51], 16 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v41 +; SI-NEXT: v_lshr_b64 v[0:1], v[39:40], 16 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v63 +; SI-NEXT: v_lshr_b64 v[1:2], v[54:55], 16 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v62 +; SI-NEXT: v_lshr_b64 v[2:3], v[52:53], 16 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v61 +; SI-NEXT: v_lshr_b64 v[3:4], v[50:51], 16 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60 +; SI-NEXT: v_lshr_b64 v[4:5], v[48:49], 16 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59 ; SI-NEXT: v_lshr_b64 v[5:6], v[37:38], 16 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v58 @@ -21727,31 +21718,31 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg ; SI-NEXT: s_cbranch_execnz .LBB47_3 ; SI-NEXT: .LBB47_2: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v41 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v52 +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v63 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v63 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v54 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v62 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v52 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v61 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v54 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v50 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 ; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v60 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v50 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v48 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 @@ -21849,10 +21840,10 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v20, s30, 0 -; VI-NEXT: v_writelane_b32 v20, s31, 1 +; VI-NEXT: v_writelane_b32 v26, s30, 0 +; VI-NEXT: v_writelane_b32 v26, s31, 1 ; VI-NEXT: v_readfirstlane_b32 s4, v2 ; VI-NEXT: v_readfirstlane_b32 s31, v1 ; VI-NEXT: s_cmp_lg_u32 s4, 0 @@ -21861,302 +21852,302 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB47_4 ; VI-NEXT: .LBB47_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v16, 0x40c00000 +; VI-NEXT: s_lshl_b32 s4, s31, 16 +; VI-NEXT: v_mov_b32_e32 v0, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s31, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s30, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: s_and_b32 s4, s30, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v16 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s29, 16 +; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s28, 16 +; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s28, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v16 +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s28, 0xffff0000 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_bfe_u32 v5, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s27, 16 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s27, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v6, 0x400000, v2 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[0:1] -; VI-NEXT: v_cndmask_b32_e64 v0, v3, v4, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: s_and_b32 s5, s26, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s26, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s24, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s26, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s25, 16 +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s25, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s24, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[19:20], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s22, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s24, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s23, 16 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s22, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s20, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s20, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[21:22], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s18, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s19, 16 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s18, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s17, 16 +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_cndmask_b32_e32 v23, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s16, 16 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v16 +; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v0 +; VI-NEXT: v_lshrrev_b64 v[23:24], 16, v[23:24] +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: s_and_b32 s6, s16, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v24, v3, v5, vcc ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s6, v16 -; VI-NEXT: v_bfe_u32 v5, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc -; VI-NEXT: s_lshl_b32 s6, s17, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v1, v3, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v5 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v1, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s17, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_bfe_u32 v7, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v3 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v7, v9, vcc -; VI-NEXT: s_lshl_b32 s6, s19, 16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_cndmask_b32_e64 v17, v1, v5, s[4:5] -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s19, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v9, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v3 -; VI-NEXT: s_lshl_b32 s6, s21, 16 -; VI-NEXT: v_mov_b32_e32 v1, v17 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_cndmask_b32_e64 v17, v5, v7, s[4:5] -; VI-NEXT: v_add_f32_e32 v5, s6, v16 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: s_and_b32 s6, s21, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v3, v9, v11, vcc -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s6, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 -; VI-NEXT: v_bfe_u32 v11, v5, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_lshl_b32 s6, s23, 16 -; VI-NEXT: v_mov_b32_e32 v3, v17 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_cndmask_b32_e64 v17, v7, v9, s[4:5] -; VI-NEXT: v_add_f32_e32 v7, s6, v16 -; VI-NEXT: v_cndmask_b32_e32 v5, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: s_and_b32 s6, s23, 0xffff0000 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v13, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v7 -; VI-NEXT: s_lshl_b32 s6, s25, 16 -; VI-NEXT: v_mov_b32_e32 v5, v17 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_cndmask_b32_e64 v17, v9, v11, s[4:5] -; VI-NEXT: v_add_f32_e32 v9, s6, v16 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: s_and_b32 s6, s25, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v7, v13, v15, vcc -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s6, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v7 -; VI-NEXT: v_bfe_u32 v15, v9, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v9 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_mov_b32_e32 v7, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_cndmask_b32_e32 v9, v15, v17, vcc -; VI-NEXT: s_lshl_b32 s6, s27, 16 -; VI-NEXT: v_cndmask_b32_e64 v17, v11, v13, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 -; VI-NEXT: v_add_f32_e32 v11, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: s_and_b32 s6, s27, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s6, v16 -; VI-NEXT: v_mov_b32_e32 v9, v17 -; VI-NEXT: v_bfe_u32 v17, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v11 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: s_and_b32 s7, s31, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v11, v17, v18, vcc -; VI-NEXT: v_cndmask_b32_e64 v17, v13, v15, s[4:5] -; VI-NEXT: v_add_f32_e32 v13, s7, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v11 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: s_lshl_b32 s6, s31, 16 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_mov_b32_e32 v11, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s6, v16 -; VI-NEXT: v_cndmask_b32_e32 v15, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v17, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v13 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v15 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: s_lshl_b32 s4, s29, 16 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v19, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v16 -; VI-NEXT: v_bfe_u32 v16, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v16, vcc, v16, v15 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v16 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_cndmask_b32_e32 v15, v16, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v13 -; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[15:16] -; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[17:18] -; VI-NEXT: v_mov_b32_e32 v13, v15 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v0 +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[24:25] +; VI-NEXT: v_mov_b32_e32 v1, v23 +; VI-NEXT: v_mov_b32_e32 v3, v22 +; VI-NEXT: v_mov_b32_e32 v5, v21 +; VI-NEXT: v_mov_b32_e32 v7, v20 +; VI-NEXT: v_mov_b32_e32 v9, v19 +; VI-NEXT: v_mov_b32_e32 v11, v18 +; VI-NEXT: v_mov_b32_e32 v13, v17 ; VI-NEXT: v_mov_b32_e32 v15, v16 ; VI-NEXT: s_branch .LBB47_5 ; VI-NEXT: .LBB47_3: @@ -22179,10 +22170,10 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg ; VI-NEXT: v_mov_b32_e32 v14, s30 ; VI-NEXT: v_mov_b32_e32 v15, s31 ; VI-NEXT: .LBB47_5: ; %end -; VI-NEXT: v_readlane_b32 s30, v20, 0 -; VI-NEXT: v_readlane_b32 s31, v20, 1 +; VI-NEXT: v_readlane_b32 s30, v26, 0 +; VI-NEXT: v_readlane_b32 s31, v26, 1 ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -22219,29 +22210,29 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg ; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 ; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s4, v0 -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: s_lshl_b32 s4, s30, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; GFX9-NEXT: v_add_f32_e32 v4, s4, v0 -; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 ; GFX9-NEXT: v_mov_b32_e32 v16, 0xffff -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc +; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v15, v1, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v3 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: s_lshl_b32 s4, s30, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v14, v1, 16, v2 ; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 @@ -22505,10 +22496,10 @@ define inreg <16 x float> @bitcast_v32bf16_to_v16f32_scalar(<32 x bfloat> inreg ; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 ; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_and_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; GFX9-NEXT: v_and_b32_sdwa v0, v16, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v0, v17, 16, v0 ; GFX9-NEXT: s_branch .LBB47_5 ; GFX9-NEXT: .LBB47_3: ; GFX9-NEXT: s_branch .LBB47_2 @@ -23685,111 +23676,108 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr30 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr29 -; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; implicit-def: $vgpr27 +; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; implicit-def: $vgpr26 +; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: ; implicit-def: $vgpr60 ; VI-NEXT: ; implicit-def: $vgpr59 +; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr45 ; VI-NEXT: ; implicit-def: $vgpr44 ; VI-NEXT: ; implicit-def: $vgpr43 ; VI-NEXT: ; implicit-def: $vgpr42 ; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr40 ; VI-NEXT: ; implicit-def: $vgpr55 ; VI-NEXT: ; implicit-def: $vgpr54 ; VI-NEXT: ; implicit-def: $vgpr53 ; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: ; implicit-def: $vgpr51 ; VI-NEXT: ; implicit-def: $vgpr50 ; VI-NEXT: ; implicit-def: $vgpr49 ; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 ; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr18 ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr27 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr26 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr22 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr30 +; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr17 +; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; kill: killed $vgpr27 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB48_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16 ; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8] -; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v16 ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; VI-NEXT: v_mov_b32_e32 v27, v21 -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4] -; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; VI-NEXT: .LBB48_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB48_4 @@ -23802,164 +23790,161 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 { ; VI-NEXT: v_add_f32_e32 v12, 1.0, v12 ; VI-NEXT: v_add_f32_e32 v11, 1.0, v11 ; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] -; VI-NEXT: v_add_f32_e32 v4, 1.0, v4 -; VI-NEXT: v_add_f32_e32 v3, 1.0, v3 -; VI-NEXT: v_add_f32_e32 v8, 1.0, v8 -; VI-NEXT: v_add_f32_e32 v7, 1.0, v7 ; VI-NEXT: v_add_f32_e32 v10, 1.0, v10 ; VI-NEXT: v_add_f32_e32 v9, 1.0, v9 ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: v_add_f32_e32 v2, 1.0, v2 -; VI-NEXT: v_add_f32_e32 v1, 1.0, v1 +; VI-NEXT: v_add_f32_e32 v8, 1.0, v8 +; VI-NEXT: v_add_f32_e32 v7, 1.0, v7 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] ; VI-NEXT: v_add_f32_e32 v6, 1.0, v6 ; VI-NEXT: v_add_f32_e32 v5, 1.0, v5 -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8] -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4] -; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v16 -; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16 +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; VI-NEXT: v_add_f32_e32 v4, 1.0, v4 +; VI-NEXT: v_add_f32_e32 v3, 1.0, v3 +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; VI-NEXT: v_add_f32_e32 v2, 1.0, v2 +; VI-NEXT: v_add_f32_e32 v1, 1.0, v1 +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15 -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; VI-NEXT: .LBB48_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v21, v30, v23, s4 -; VI-NEXT: v_perm_b32 v1, v1, v31, s4 -; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_or_b32_e32 v1, v1, v21 +; VI-NEXT: v_perm_b32 v24, v26, v24, s4 +; VI-NEXT: v_perm_b32 v1, v1, v25, s4 +; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; VI-NEXT: v_or_b32_e32 v1, v1, v24 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v28, v63, s4 -; VI-NEXT: v_perm_b32 v2, v2, v29, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v2, v63, s4 +; VI-NEXT: v_perm_b32 v2, v62, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v61, v20, s4 -; VI-NEXT: v_perm_b32 v2, v3, v62, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v59, v23, s4 +; VI-NEXT: v_perm_b32 v1, v3, v60, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v59, v58, s4 -; VI-NEXT: v_perm_b32 v1, v4, v60, s4 +; VI-NEXT: v_perm_b32 v2, v57, v56, s4 +; VI-NEXT: v_perm_b32 v1, v4, v58, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v56, v26, s4 -; VI-NEXT: v_perm_b32 v1, v5, v57, s4 +; VI-NEXT: v_perm_b32 v2, v46, v22, s4 +; VI-NEXT: v_perm_b32 v1, v5, v47, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v46, v45, s4 -; VI-NEXT: v_perm_b32 v1, v6, v47, s4 +; VI-NEXT: v_perm_b32 v2, v44, v43, s4 +; VI-NEXT: v_perm_b32 v1, v6, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v43, v25, s4 -; VI-NEXT: v_perm_b32 v1, v7, v44, s4 +; VI-NEXT: v_perm_b32 v2, v41, v21, s4 +; VI-NEXT: v_perm_b32 v1, v7, v42, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v41, v40, s4 -; VI-NEXT: v_perm_b32 v1, v8, v42, s4 +; VI-NEXT: v_perm_b32 v2, v55, v54, s4 +; VI-NEXT: v_perm_b32 v1, v8, v40, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v54, v22, s4 -; VI-NEXT: v_perm_b32 v1, v9, v55, s4 +; VI-NEXT: v_perm_b32 v2, v52, v20, s4 +; VI-NEXT: v_perm_b32 v1, v9, v53, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v52, v51, s4 -; VI-NEXT: v_perm_b32 v1, v10, v53, s4 +; VI-NEXT: v_perm_b32 v2, v50, v49, s4 +; VI-NEXT: v_perm_b32 v1, v10, v51, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v49, v19, s4 -; VI-NEXT: v_perm_b32 v1, v11, v50, s4 +; VI-NEXT: v_perm_b32 v2, v39, v19, s4 +; VI-NEXT: v_perm_b32 v1, v11, v48, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v39, v38, s4 -; VI-NEXT: v_perm_b32 v1, v12, v48, s4 +; VI-NEXT: v_perm_b32 v2, v37, v36, s4 +; VI-NEXT: v_perm_b32 v1, v12, v38, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v36, v18, s4 -; VI-NEXT: v_perm_b32 v1, v13, v37, s4 +; VI-NEXT: v_perm_b32 v2, v34, v18, s4 +; VI-NEXT: v_perm_b32 v1, v13, v35, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v34, v33, s4 -; VI-NEXT: v_perm_b32 v1, v14, v35, s4 +; VI-NEXT: v_perm_b32 v2, v32, v31, s4 +; VI-NEXT: v_perm_b32 v1, v14, v33, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v15, v32, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v17, s4 +; VI-NEXT: v_perm_b32 v2, v29, v17, s4 +; VI-NEXT: v_perm_b32 v1, v15, v30, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v27, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v16, v28, s4 ; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v16, v1, s4 +; VI-NEXT: v_perm_b32 v2, v27, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -24001,111 +23986,108 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr25 +; GFX9-NEXT: ; implicit-def: $vgpr26 ; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr29 -; GFX9-NEXT: ; implicit-def: $vgpr28 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr21 +; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr58 ; GFX9-NEXT: ; implicit-def: $vgpr57 ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr44 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr40 ; GFX9-NEXT: ; implicit-def: $vgpr55 ; GFX9-NEXT: ; implicit-def: $vgpr54 ; GFX9-NEXT: ; implicit-def: $vgpr53 ; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr20 ; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr50 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr27 -; GFX9-NEXT: ; implicit-def: $vgpr25 -; GFX9-NEXT: ; implicit-def: $vgpr26 -; GFX9-NEXT: ; implicit-def: $vgpr23 -; GFX9-NEXT: ; implicit-def: $vgpr20 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr31 +; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr17 +; GFX9-NEXT: ; implicit-def: $vgpr28 +; GFX9-NEXT: ; kill: killed $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB48_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16 ; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16 ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: v_mov_b32_e32 v27, v22 -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB48_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB48_4 @@ -24121,130 +24103,127 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10 ; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v9 ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4 -; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3 ; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8 ; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7 ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2 -; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1 ; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6 ; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5 -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4 +; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3 +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2 +; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1 +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16 ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB48_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v25, s4 +; GFX9-NEXT: v_perm_b32 v24, v26, v24, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 -; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4 +; GFX9-NEXT: v_perm_b32 v1, v2, v63, s4 +; GFX9-NEXT: v_perm_b32 v2, v62, v61, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1 +; GFX9-NEXT: v_perm_b32 v1, v3, v60, s4 +; GFX9-NEXT: v_perm_b32 v2, v59, v23, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4 -; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4 +; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4 +; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4 -; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4 +; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4 +; GFX9-NEXT: v_perm_b32 v2, v46, v22, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4 -; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4 +; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4 +; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4 -; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4 +; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v41, v21, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4 -; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4 +; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4 +; GFX9-NEXT: v_perm_b32 v2, v55, v54, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4 -; GFX9-NEXT: v_perm_b32 v2, v54, v20, s4 +; GFX9-NEXT: v_perm_b32 v1, v9, v53, s4 +; GFX9-NEXT: v_perm_b32 v2, v52, v20, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: v_perm_b32 v1, v10, v53, s4 -; GFX9-NEXT: v_perm_b32 v2, v52, v51, s4 +; GFX9-NEXT: v_perm_b32 v1, v10, v51, s4 +; GFX9-NEXT: v_perm_b32 v2, v50, v49, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_perm_b32 v1, v11, v50, s4 -; GFX9-NEXT: v_perm_b32 v2, v49, v19, s4 +; GFX9-NEXT: v_perm_b32 v1, v11, v48, s4 +; GFX9-NEXT: v_perm_b32 v2, v39, v19, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: v_perm_b32 v1, v12, v48, s4 -; GFX9-NEXT: v_perm_b32 v2, v39, v38, s4 +; GFX9-NEXT: v_perm_b32 v1, v12, v38, s4 +; GFX9-NEXT: v_perm_b32 v2, v37, v36, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_perm_b32 v1, v13, v37, s4 -; GFX9-NEXT: v_perm_b32 v2, v36, v18, s4 +; GFX9-NEXT: v_perm_b32 v1, v13, v35, s4 +; GFX9-NEXT: v_perm_b32 v2, v34, v18, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v1, v14, v35, s4 -; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4 +; GFX9-NEXT: v_perm_b32 v1, v14, v33, s4 +; GFX9-NEXT: v_perm_b32 v2, v32, v31, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4 +; GFX9-NEXT: v_perm_b32 v1, v15, v30, s4 +; GFX9-NEXT: v_perm_b32 v2, v29, v17, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v16, v28, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4 +; GFX9-NEXT: v_perm_b32 v2, v27, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -24776,12 +24755,12 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24 ; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 16 ; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 8 -; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 24 -; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 8 -; SI-NEXT: s_lshr_b64 s[60:61], s[20:21], 24 -; SI-NEXT: s_lshr_b64 s[62:63], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 8 +; SI-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 +; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 8 +; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 24 +; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 8 ; SI-NEXT: s_lshr_b64 s[88:89], s[18:19], 24 ; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 8 @@ -24834,12 +24813,12 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24 ; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 16 ; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 8 -; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 24 -; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 8 -; SI-NEXT: s_lshr_b64 s[60:61], s[20:21], 24 -; SI-NEXT: s_lshr_b64 s[62:63], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 8 +; SI-NEXT: s_lshr_b64 s[60:61], s[22:23], 24 +; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 8 +; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 24 +; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 8 ; SI-NEXT: s_lshr_b64 s[88:89], s[18:19], 24 ; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 8 @@ -24884,42 +24863,42 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr50 ; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr55 ; SI-NEXT: ; implicit-def: $sgpr53 ; SI-NEXT: ; implicit-def: $sgpr51 +; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr66 ; SI-NEXT: ; implicit-def: $sgpr64 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr69 -; SI-NEXT: ; implicit-def: $sgpr67 -; SI-NEXT: ; implicit-def: $sgpr65 -; SI-NEXT: ; implicit-def: $sgpr80 -; SI-NEXT: ; implicit-def: $sgpr70 -; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; implicit-def: $sgpr83 -; SI-NEXT: ; implicit-def: $sgpr81 -; SI-NEXT: ; implicit-def: $sgpr71 -; SI-NEXT: ; implicit-def: $sgpr85 -; SI-NEXT: ; implicit-def: $sgpr84 -; SI-NEXT: ; implicit-def: $sgpr82 -; SI-NEXT: ; implicit-def: $sgpr78 -; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr69 +; SI-NEXT: ; implicit-def: $sgpr67 +; SI-NEXT: ; implicit-def: $sgpr65 ; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr42 ; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr80 +; SI-NEXT: ; implicit-def: $sgpr70 +; SI-NEXT: ; implicit-def: $sgpr68 ; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr12 ; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr83 +; SI-NEXT: ; implicit-def: $sgpr81 +; SI-NEXT: ; implicit-def: $sgpr71 ; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr85 +; SI-NEXT: ; implicit-def: $sgpr84 +; SI-NEXT: ; implicit-def: $sgpr82 ; SI-NEXT: s_branch .LBB49_2 ; SI-NEXT: .LBB49_4: ; SI-NEXT: v_mov_b32_e32 v22, s16 @@ -25003,15 +24982,15 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 ; SI-NEXT: v_and_b32_e32 v18, 0xff, v36 ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: s_lshl_b32 s5, s74, 8 +; SI-NEXT: s_lshl_b32 s5, s78, 8 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v35 ; SI-NEXT: v_or_b32_e32 v15, s5, v15 -; SI-NEXT: s_and_b32 s5, s62, 0xff +; SI-NEXT: s_and_b32 s5, s76, 0xff ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_or_b32_e32 v18, v20, v18 ; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s60, 24 +; SI-NEXT: s_lshl_b32 s7, s74, 24 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 ; SI-NEXT: v_add_i32_e32 v18, vcc, 12, v0 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 @@ -25027,15 +25006,15 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; SI-NEXT: v_or_b32_e32 v11, v11, v15 ; SI-NEXT: v_and_b32_e32 v15, 0xff, v33 ; SI-NEXT: v_and_b32_e32 v10, 0xff, v10 -; SI-NEXT: s_lshl_b32 s5, s78, 8 +; SI-NEXT: s_lshl_b32 s5, s72, 8 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v32 ; SI-NEXT: v_or_b32_e32 v10, s5, v10 -; SI-NEXT: s_and_b32 s5, s76, 0xff +; SI-NEXT: s_and_b32 s5, s62, 0xff ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s72, 24 +; SI-NEXT: s_lshl_b32 s7, s60, 24 ; SI-NEXT: v_or_b32_e32 v11, v11, v15 ; SI-NEXT: v_add_i32_e32 v15, vcc, 20, v0 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -25193,7 +25172,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -25286,36 +25265,35 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; VI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24 ; VI-NEXT: s_cbranch_execnz .LBB49_4 ; VI-NEXT: .LBB49_2: ; %cmp.true -; VI-NEXT: v_add_f32_e64 v6, s27, 1.0 -; VI-NEXT: v_add_f32_e64 v5, s26, 1.0 ; VI-NEXT: v_add_f32_e64 v2, s5, 1.0 ; VI-NEXT: v_add_f32_e64 v1, s4, 1.0 +; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2] +; VI-NEXT: v_add_f32_e64 v4, s29, 1.0 +; VI-NEXT: v_add_f32_e64 v3, s28, 1.0 +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: v_add_f32_e64 v6, s27, 1.0 +; VI-NEXT: v_add_f32_e64 v5, s26, 1.0 +; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[3:4] ; VI-NEXT: v_add_f32_e64 v8, s25, 1.0 ; VI-NEXT: v_add_f32_e64 v7, s24, 1.0 -; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2] ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[5:6] ; VI-NEXT: v_add_f32_e64 v10, s23, 1.0 ; VI-NEXT: v_add_f32_e64 v9, s22, 1.0 ; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8] ; VI-NEXT: v_add_f32_e64 v12, s21, 1.0 ; VI-NEXT: v_add_f32_e64 v11, s20, 1.0 -; VI-NEXT: v_add_f32_e64 v4, s29, 1.0 -; VI-NEXT: v_add_f32_e64 v3, s28, 1.0 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[9:10] ; VI-NEXT: v_add_f32_e64 v14, s19, 1.0 ; VI-NEXT: v_add_f32_e64 v13, s18, 1.0 -; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4] ; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[11:12] ; VI-NEXT: v_add_f32_e64 v16, s17, 1.0 ; VI-NEXT: v_add_f32_e64 v15, s16, 1.0 ; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[13:14] -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[15:16] +; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v2 ; VI-NEXT: v_lshrrev_b32_e32 v26, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v2 +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2 ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1 ; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1 @@ -25347,13 +25325,13 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v14 ; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v14 ; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v13 ; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v16 ; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v16 ; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v15 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v15 ; VI-NEXT: s_branch .LBB49_5 ; VI-NEXT: .LBB49_3: ; VI-NEXT: ; implicit-def: $sgpr67 @@ -25406,10 +25384,11 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; VI-NEXT: ; implicit-def: $sgpr56 ; VI-NEXT: s_branch .LBB49_2 ; VI-NEXT: .LBB49_4: -; VI-NEXT: v_mov_b32_e32 v19, s44 -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v19, s42 +; VI-NEXT: v_mov_b32_e32 v18, s57 +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v18, s44 +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v15, s16 ; VI-NEXT: v_mov_b32_e32 v16, s17 ; VI-NEXT: v_mov_b32_e32 v13, s18 @@ -25426,13 +25405,13 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v4, s29 ; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: v_mov_b32_e32 v2, s5 -; VI-NEXT: v_mov_b32_e32 v17, s67 -; VI-NEXT: v_mov_b32_e32 v18, s65 +; VI-NEXT: v_mov_b32_e32 v25, s67 +; VI-NEXT: v_mov_b32_e32 v17, s65 ; VI-NEXT: v_mov_b32_e32 v62, s66 ; VI-NEXT: v_mov_b32_e32 v60, s64 ; VI-NEXT: v_mov_b32_e32 v61, s55 -; VI-NEXT: v_mov_b32_e32 v58, s54 -; VI-NEXT: v_mov_b32_e32 v59, s52 +; VI-NEXT: v_mov_b32_e32 v59, s54 +; VI-NEXT: v_mov_b32_e32 v58, s52 ; VI-NEXT: v_mov_b32_e32 v57, s53 ; VI-NEXT: v_mov_b32_e32 v47, s51 ; VI-NEXT: v_mov_b32_e32 v56, s50 @@ -25464,31 +25443,29 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; VI-NEXT: v_mov_b32_e32 v29, s60 ; VI-NEXT: v_mov_b32_e32 v28, s58 ; VI-NEXT: v_mov_b32_e32 v27, s59 -; VI-NEXT: v_mov_b32_e32 v25, s57 ; VI-NEXT: v_mov_b32_e32 v26, s56 +; VI-NEXT: v_mov_b32_e32 v18, s42 +; VI-NEXT: v_mov_b32_e32 v19, s40 +; VI-NEXT: v_mov_b32_e32 v20, s14 ; VI-NEXT: v_mov_b32_e32 v21, s12 ; VI-NEXT: v_mov_b32_e32 v22, s10 ; VI-NEXT: v_mov_b32_e32 v23, s8 ; VI-NEXT: v_mov_b32_e32 v24, s6 -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v19, s40 -; VI-NEXT: v_mov_b32_e32 v20, s14 ; VI-NEXT: .LBB49_5: ; %end ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v18, v18, v24, s4 -; VI-NEXT: v_perm_b32 v15, v15, v17, s4 -; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v18 +; VI-NEXT: v_perm_b32 v17, v17, v24, s4 +; VI-NEXT: v_perm_b32 v15, v15, v25, s4 +; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; VI-NEXT: v_or_b32_e32 v15, v15, v17 ; VI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v15, v60, v61, s4 -; VI-NEXT: v_perm_b32 v16, v16, v62, s4 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: v_or_b32_e32 v15, v16, v15 +; VI-NEXT: v_perm_b32 v15, v16, v62, s4 +; VI-NEXT: v_perm_b32 v16, v60, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; VI-NEXT: v_or_b32_e32 v15, v15, v16 ; VI-NEXT: v_add_u32_e32 v16, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v15, v59, v23, s4 -; VI-NEXT: v_perm_b32 v13, v13, v58, s4 +; VI-NEXT: v_perm_b32 v15, v58, v23, s4 +; VI-NEXT: v_perm_b32 v13, v13, v59, s4 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_or_b32_e32 v13, v13, v15 ; VI-NEXT: v_add_u32_e32 v15, vcc, 8, v0 @@ -25547,9 +25524,20 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; VI-NEXT: v_or_b32_e32 v5, v5, v6 ; VI-NEXT: v_add_u32_e32 v6, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v5, v33, v18, s4 ; VI-NEXT: v_perm_b32 v3, v3, v34, s4 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; VI-NEXT: v_or_b32_e32 v3, v3, v5 +; VI-NEXT: v_add_u32_e32 v5, vcc, 48, v0 +; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v3, v4, v32, s4 +; VI-NEXT: v_perm_b32 v4, v30, v31, s4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; VI-NEXT: v_or_b32_e32 v3, v3, v4 +; VI-NEXT: v_add_u32_e32 v4, vcc, 52, v0 +; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; VI-NEXT: v_perm_b32 v1, v1, v29, s4 ; VI-NEXT: v_readlane_b32 s30, v63, 18 ; VI-NEXT: v_readlane_b32 s31, v63, 19 @@ -25572,30 +25560,18 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; VI-NEXT: v_readlane_b32 s35, v63, 1 ; VI-NEXT: v_readlane_b32 s34, v63, 0 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v5, v33, v5, s4 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_or_b32_e32 v3, v3, v5 -; VI-NEXT: v_add_u32_e32 v5, vcc, 48, v0 -; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v3, v4, v32, s4 -; VI-NEXT: v_perm_b32 v4, v30, v31, s4 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_or_b32_e32 v3, v3, v4 -; VI-NEXT: v_add_u32_e32 v4, vcc, 52, v0 -; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_perm_b32 v3, v28, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v1, v1, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen ; VI-NEXT: v_perm_b32 v1, v2, v27, s4 -; VI-NEXT: v_perm_b32 v2, v25, v26, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v2, v2, v26, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload @@ -25613,7 +25589,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -25622,7 +25598,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -25711,38 +25687,36 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB49_4 ; GFX9-NEXT: .LBB49_2: ; %cmp.true -; GFX9-NEXT: v_add_f32_e64 v6, s27, 1.0 -; GFX9-NEXT: v_add_f32_e64 v5, s26, 1.0 ; GFX9-NEXT: v_add_f32_e64 v2, s5, 1.0 ; GFX9-NEXT: v_add_f32_e64 v1, s4, 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2] +; GFX9-NEXT: v_add_f32_e64 v4, s29, 1.0 +; GFX9-NEXT: v_add_f32_e64 v3, s28, 1.0 +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_f32_e64 v6, s27, 1.0 +; GFX9-NEXT: v_add_f32_e64 v5, s26, 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[3:4] ; GFX9-NEXT: v_add_f32_e64 v8, s25, 1.0 ; GFX9-NEXT: v_add_f32_e64 v7, s24, 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[5:6] ; GFX9-NEXT: v_add_f32_e64 v10, s23, 1.0 ; GFX9-NEXT: v_add_f32_e64 v9, s22, 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8] ; GFX9-NEXT: v_add_f32_e64 v12, s21, 1.0 ; GFX9-NEXT: v_add_f32_e64 v11, s20, 1.0 -; GFX9-NEXT: v_add_f32_e64 v4, s29, 1.0 -; GFX9-NEXT: v_add_f32_e64 v3, s28, 1.0 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[9:10] ; GFX9-NEXT: v_add_f32_e64 v14, s19, 1.0 ; GFX9-NEXT: v_add_f32_e64 v13, s18, 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12] -; GFX9-NEXT: v_add_f32_e64 v19, s17, 1.0 -; GFX9-NEXT: v_add_f32_e64 v18, s16, 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[18:19] -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 24, v2 +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[11:12] +; GFX9-NEXT: v_add_f32_e64 v16, s17, 1.0 +; GFX9-NEXT: v_add_f32_e64 v15, s16, 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[13:14] +; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[15:16] ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 24, v2 +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v1 @@ -25774,13 +25748,13 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v14 ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v14 ; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v15 ; GFX9-NEXT: s_branch .LBB49_5 ; GFX9-NEXT: .LBB49_3: ; GFX9-NEXT: ; implicit-def: $sgpr55 @@ -25833,13 +25807,14 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: ; implicit-def: $sgpr56 ; GFX9-NEXT: s_branch .LBB49_2 ; GFX9-NEXT: .LBB49_4: -; GFX9-NEXT: v_mov_b32_e32 v20, s44 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v18, s57 +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v18, s44 +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v20, s42 -; GFX9-NEXT: v_mov_b32_e32 v18, s16 -; GFX9-NEXT: v_mov_b32_e32 v19, s17 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v15, s16 +; GFX9-NEXT: v_mov_b32_e32 v16, s17 ; GFX9-NEXT: v_mov_b32_e32 v13, s18 ; GFX9-NEXT: v_mov_b32_e32 v14, s19 ; GFX9-NEXT: v_mov_b32_e32 v11, s20 @@ -25854,13 +25829,13 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v4, s29 ; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_mov_b32_e32 v2, s5 -; GFX9-NEXT: v_mov_b32_e32 v15, s55 -; GFX9-NEXT: v_mov_b32_e32 v16, s53 +; GFX9-NEXT: v_mov_b32_e32 v25, s55 +; GFX9-NEXT: v_mov_b32_e32 v17, s53 ; GFX9-NEXT: v_mov_b32_e32 v62, s54 -; GFX9-NEXT: v_mov_b32_e32 v59, s52 -; GFX9-NEXT: v_mov_b32_e32 v60, s51 -; GFX9-NEXT: v_mov_b32_e32 v58, s50 -; GFX9-NEXT: v_mov_b32_e32 v61, s48 +; GFX9-NEXT: v_mov_b32_e32 v60, s52 +; GFX9-NEXT: v_mov_b32_e32 v61, s51 +; GFX9-NEXT: v_mov_b32_e32 v59, s50 +; GFX9-NEXT: v_mov_b32_e32 v58, s48 ; GFX9-NEXT: v_mov_b32_e32 v57, s49 ; GFX9-NEXT: v_mov_b32_e32 v47, s39 ; GFX9-NEXT: v_mov_b32_e32 v56, s38 @@ -25892,32 +25867,29 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v29, s60 ; GFX9-NEXT: v_mov_b32_e32 v28, s58 ; GFX9-NEXT: v_mov_b32_e32 v27, s59 -; GFX9-NEXT: v_mov_b32_e32 v17, s57 ; GFX9-NEXT: v_mov_b32_e32 v26, s56 -; GFX9-NEXT: v_mov_b32_e32 v22, s12 -; GFX9-NEXT: v_mov_b32_e32 v23, s10 -; GFX9-NEXT: v_mov_b32_e32 v24, s8 -; GFX9-NEXT: v_mov_b32_e32 v25, s6 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v20, s40 -; GFX9-NEXT: v_mov_b32_e32 v21, s14 +; GFX9-NEXT: v_mov_b32_e32 v18, s42 +; GFX9-NEXT: v_mov_b32_e32 v19, s40 +; GFX9-NEXT: v_mov_b32_e32 v20, s14 +; GFX9-NEXT: v_mov_b32_e32 v21, s12 +; GFX9-NEXT: v_mov_b32_e32 v22, s10 +; GFX9-NEXT: v_mov_b32_e32 v23, s8 +; GFX9-NEXT: v_mov_b32_e32 v24, s6 ; GFX9-NEXT: .LBB49_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v16, v16, v25, s4 -; GFX9-NEXT: v_perm_b32 v15, v18, v15, s4 +; GFX9-NEXT: v_perm_b32 v17, v17, v24, s4 +; GFX9-NEXT: v_perm_b32 v15, v15, v25, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX9-NEXT: v_or_b32_e32 v15, v15, v17 +; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen +; GFX9-NEXT: v_perm_b32 v15, v16, v62, s4 +; GFX9-NEXT: v_perm_b32 v16, v60, v61, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; GFX9-NEXT: v_or_b32_e32 v15, v15, v16 -; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v15, v59, v60, s4 -; GFX9-NEXT: v_perm_b32 v18, v19, v62, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; GFX9-NEXT: v_perm_b32 v19, v61, v24, s4 -; GFX9-NEXT: v_or_b32_e32 v15, v18, v15 ; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v13, v13, v58, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v19 +; GFX9-NEXT: v_perm_b32 v15, v58, v23, s4 +; GFX9-NEXT: v_perm_b32 v13, v13, v59, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v15 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:8 ; GFX9-NEXT: v_perm_b32 v13, v14, v57, s4 @@ -25925,7 +25897,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v13, v45, v23, s4 +; GFX9-NEXT: v_perm_b32 v13, v45, v22, s4 ; GFX9-NEXT: v_perm_b32 v11, v11, v46, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v13 @@ -25935,7 +25907,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 ; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v11, v40, v22, s4 +; GFX9-NEXT: v_perm_b32 v11, v40, v21, s4 ; GFX9-NEXT: v_perm_b32 v9, v9, v41, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v11 @@ -25945,7 +25917,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v9, v51, v21, s4 +; GFX9-NEXT: v_perm_b32 v9, v51, v20, s4 ; GFX9-NEXT: v_perm_b32 v7, v7, v52, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v9 @@ -25955,7 +25927,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 ; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_perm_b32 v7, v38, v20, s4 +; GFX9-NEXT: v_perm_b32 v7, v38, v19, s4 ; GFX9-NEXT: v_perm_b32 v5, v5, v39, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v7 @@ -25965,10 +25937,19 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v5, v33, v18, s4 ; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 +; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48 +; GFX9-NEXT: v_perm_b32 v3, v4, v32, s4 +; GFX9-NEXT: v_perm_b32 v4, v30, v31, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 +; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v1, v1, v29, s4 ; GFX9-NEXT: v_readlane_b32 s30, v63, 14 ; GFX9-NEXT: v_readlane_b32 s31, v63, 15 @@ -25987,25 +25968,14 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: v_readlane_b32 s35, v63, 1 ; GFX9-NEXT: v_readlane_b32 s34, v63, 0 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v5, v33, v5, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v3, v4, v32, s4 -; GFX9-NEXT: v_perm_b32 v4, v30, v31, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v3, v28, v3, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v3 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 ; GFX9-NEXT: v_perm_b32 v1, v2, v27, s4 -; GFX9-NEXT: v_perm_b32 v2, v17, v26, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v26, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 @@ -26025,7 +25995,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3 ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -26380,19 +26350,19 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v34, v6 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: v_mov_b32_e32 v33, v4 ; SI-NEXT: v_mov_b32_e32 v32, v2 ; SI-NEXT: v_mov_b32_e32 v31, v0 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:8 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:16 ; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:16 ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:24 ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:32 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:40 @@ -26407,24 +26377,24 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:112 ; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:120 ; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:128 -; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v19 +; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v17 ; SI-NEXT: v_lshlrev_b32_e32 v26, 8, v25 +; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v19 ; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v21 ; SI-NEXT: v_lshlrev_b32_e32 v24, 24, v23 ; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27 ; SI-NEXT: v_lshlrev_b32_e32 v30, 8, v29 ; SI-NEXT: v_lshlrev_b32_e32 v49, 8, v1 ; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v3 -; SI-NEXT: v_lshlrev_b32_e32 v39, 8, v5 -; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v7 -; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v9 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v11 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v13 +; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v5 +; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v7 +; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v9 +; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v11 +; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v13 ; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v15 -; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v17 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; SI-NEXT: v_lshlrev_b32_e32 v17, 24, v2 +; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v2 ; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v4 ; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v6 ; SI-NEXT: s_waitcnt vmcnt(13) @@ -26442,9 +26412,9 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v52 ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v53 +; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v53 ; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v55 +; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v55 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v40 ; SI-NEXT: s_waitcnt vmcnt(3) @@ -26460,47 +26430,43 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 +; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v47 ; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_lshlrev_b32_e32 v50, 24, v58 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v47 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:108 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:92 ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:76 ; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:68 ; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:60 ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB50_2 ; SI-NEXT: ; %bb.1: ; %cmp.false +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v31 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v32 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v33 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v34 ; SI-NEXT: v_or_b32_e32 v0, v0, v49 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v2, v2, v39 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v1, v48, v1 -; SI-NEXT: v_or_b32_e32 v3, v35, v3 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xff, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v34 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v29 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v62, v9 @@ -26515,16 +26481,13 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v12, v54, v12 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v44 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v21, v13 +; SI-NEXT: v_or_b32_e32 v13, v19, v13 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v53 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v27, v14 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v29 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr52 @@ -26534,67 +26497,79 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v39, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v2, v2, v36 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v3, v36, v3 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_or_b32_e32 v4, v16, v4 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v20, v5 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v24, v6 -; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v35 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_or_b32_e32 v7, v28, v7 ; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v3, v38 +; SI-NEXT: v_or_b32_e32 v3, v3, v37 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v17, v8 -; SI-NEXT: ; implicit-def: $vgpr17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v8, v38, v8 +; SI-NEXT: v_or_b32_e32 v16, v50, v16 +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v18 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -26641,10 +26616,10 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v40 -; SI-NEXT: v_or_b32_e32 v13, v13, v19 +; SI-NEXT: v_or_b32_e32 v13, v13, v17 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v23 +; SI-NEXT: v_and_b32_e32 v14, 0xff, v21 ; SI-NEXT: v_or_b32_e32 v14, v14, v25 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 @@ -26655,24 +26630,19 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr47 ; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v15, v23 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v50, v16 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; kill: killed $vgpr16 @@ -26699,19 +26669,20 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; kill: killed $vgpr16 +; SI-NEXT: ; implicit-def: $vgpr16 +; SI-NEXT: ; kill: killed $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: .LBB50_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB50_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v31 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 @@ -26725,17 +26696,13 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v34 -; SI-NEXT: v_or_b32_e32 v1, v39, v1 +; SI-NEXT: v_or_b32_e32 v1, v34, v1 ; SI-NEXT: s_movk_i32 s6, 0x300 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v2, v35, v2 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v29 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v57 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 @@ -26755,75 +26722,85 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v21, v13 +; SI-NEXT: v_or_b32_e32 v13, v19, v13 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v53 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v27, v14 -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v29 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: s_mov_b32 s7, 0x3000000 ; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v39, v2 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 -; SI-NEXT: v_or_b32_e32 v2, v36, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v3, v36, v3 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_or_b32_e32 v4, v16, v4 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v20, v5 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v24, v6 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v35, v2 +; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_or_b32_e32 v7, v28, v7 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v38, v3 +; SI-NEXT: v_or_b32_e32 v3, v37, v3 ; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v3, vcc, s7, v3 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v17, v8 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v8, v38, v8 +; SI-NEXT: v_or_b32_e32 v16, v50, v16 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_or_b32_e32 v4, v18, v4 @@ -26889,11 +26866,11 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v40 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 -; SI-NEXT: v_or_b32_e32 v13, v19, v13 +; SI-NEXT: v_or_b32_e32 v13, v17, v13 ; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v23 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v21 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_or_b32_e32 v14, v25, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 @@ -26911,15 +26888,9 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v23, v15 ; SI-NEXT: v_add_i32_e32 v15, vcc, 0x300, v15 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v50, v16 ; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v15 ; SI-NEXT: .LBB50_4: ; %end @@ -26965,8 +26936,8 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v53, v1 @@ -26995,7 +26966,7 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:16 ; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:12 ; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:4 ; VI-NEXT: v_mov_b32_e32 v31, v15 ; VI-NEXT: v_mov_b32_e32 v32, v14 ; VI-NEXT: v_mov_b32_e32 v33, v13 @@ -27013,7 +26984,7 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:124 +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:124 ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:120 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill @@ -27028,10 +26999,10 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:104 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:100 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:96 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill @@ -27045,14 +27016,14 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_mov_b32 s6, 0xc0c0004 ; VI-NEXT: v_perm_b32 v1, v52, v51, s6 -; VI-NEXT: v_perm_b32 v3, v48, v39, s6 ; VI-NEXT: v_perm_b32 v0, v54, v53, s6 -; VI-NEXT: v_perm_b32 v2, v50, v49, s6 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_perm_b32 v2, v48, v39, s6 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_perm_b32 v1, v50, v49, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_perm_b32 v3, v36, v35, s6 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_perm_b32 v2, v38, v37, s6 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_perm_b32 v4, v32, v31, s6 @@ -27117,8 +27088,8 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr59 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v14, v15, v14, s6 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 @@ -27135,7 +27106,7 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v8, v8, v30, s6 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_perm_b32 v8, v57, v56, s6 +; VI-NEXT: v_perm_b32 v8, v25, v56, s6 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 ; VI-NEXT: v_perm_b32 v9, v47, v46, s6 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 @@ -27147,8 +27118,8 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v12, v12, v13 ; VI-NEXT: v_perm_b32 v13, v58, v24, s6 ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; kill: killed $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr24 @@ -27164,7 +27135,7 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; kill: killed $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr30 -; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr25 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr46 @@ -27190,29 +27161,29 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v15, v16, v15, s6 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v16, v25, v16, s6 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: v_perm_b32 v16, v57, v16, s6 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: v_or_b32_e32 v15, v15, v16 ; VI-NEXT: ; implicit-def: $vgpr16 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: .LBB50_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB50_4 @@ -27223,19 +27194,19 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_e32 v1, 3, v52 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v51 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v2, 3, v50 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v49 -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v3, 3, v48 -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v39 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_mov_b32_e32 v15, 0x300 ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_add_u16_sdwa v1, v1, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 -; VI-NEXT: v_add_u16_sdwa v3, v3, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v50 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v49 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v2, 3, v48 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v39 +; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 +; VI-NEXT: v_add_u16_sdwa v2, v2, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v38 ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v37 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -27280,7 +27251,7 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v42 ; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v63 ; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v59 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload @@ -27289,7 +27260,7 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v6, 0x300, v6 ; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 @@ -27318,7 +27289,7 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v8, v8, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_add_u16_e32 v8, 3, v57 +; VI-NEXT: v_add_u16_e32 v8, 3, v25 ; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v56 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 3, v26 @@ -27368,8 +27339,8 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v14, v16, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v14, v14, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v14, 3, v14 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -27389,7 +27360,7 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v17, 3, v25 +; VI-NEXT: v_add_u16_e32 v17, 3, v57 ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v16, 0x300, v16 ; VI-NEXT: v_add_u16_sdwa v15, v17, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -27441,11 +27412,13 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v53, v1 ; GFX9-NEXT: v_mov_b32_e32 v54, v0 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:128 +; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:92 ; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:88 ; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:84 ; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:80 @@ -27461,12 +27434,12 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40 ; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 ; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:32 -; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:28 -; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:24 +; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28 +; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:24 ; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:20 ; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:16 -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:12 -; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:8 +; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:12 +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:4 ; GFX9-NEXT: v_mov_b32_e32 v31, v15 ; GFX9-NEXT: v_mov_b32_e32 v32, v14 @@ -27482,9 +27455,9 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_mov_b32_e32 v50, v4 ; GFX9-NEXT: v_mov_b32_e32 v51, v3 ; GFX9-NEXT: v_mov_b32_e32 v52, v2 -; GFX9-NEXT: s_waitcnt vmcnt(24) +; GFX9-NEXT: s_waitcnt vmcnt(25) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; GFX9-NEXT: s_waitcnt vmcnt(22) +; GFX9-NEXT: s_waitcnt vmcnt(23) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124 ; GFX9-NEXT: s_nop 0 @@ -27508,22 +27481,20 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:96 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:92 -; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB50_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004 ; GFX9-NEXT: v_perm_b32 v0, v54, v53, s6 ; GFX9-NEXT: v_perm_b32 v1, v52, v51, s6 -; GFX9-NEXT: v_perm_b32 v2, v50, v49, s6 -; GFX9-NEXT: v_perm_b32 v3, v48, v39, s6 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_perm_b32 v1, v50, v49, s6 +; GFX9-NEXT: v_perm_b32 v2, v48, v39, s6 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: v_perm_b32 v2, v38, v37, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v35, s6 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 @@ -27534,14 +27505,8 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v5, v18, v19, s6 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 ; GFX9-NEXT: v_perm_b32 v5, v20, v21, s6 -; GFX9-NEXT: v_perm_b32 v6, v22, v23, s6 -; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v9, v47, v46, s6 -; GFX9-NEXT: v_perm_b32 v10, v45, v44, s6 +; GFX9-NEXT: v_perm_b32 v9, v25, v46, s6 +; GFX9-NEXT: v_perm_b32 v10, v27, v44, s6 ; GFX9-NEXT: v_perm_b32 v11, v42, v30, s6 ; GFX9-NEXT: v_perm_b32 v12, v55, v63, s6 ; GFX9-NEXT: v_perm_b32 v13, v60, v59, s6 @@ -27566,11 +27531,9 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr20 ; GFX9-NEXT: ; implicit-def: $vgpr21 -; GFX9-NEXT: ; implicit-def: $vgpr22 -; GFX9-NEXT: ; implicit-def: $vgpr23 -; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr25 ; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: ; implicit-def: $vgpr44 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr30 @@ -27578,12 +27541,34 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v6, v22, v6, s6 +; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v14, v23, v14, s6 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v14, v15, v14, s6 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 @@ -27595,9 +27580,9 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6 ; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7 -; GFX9-NEXT: v_perm_b32 v8, v24, v25, s6 +; GFX9-NEXT: v_perm_b32 v8, v24, v47, s6 ; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8 -; GFX9-NEXT: v_perm_b32 v9, v26, v27, s6 +; GFX9-NEXT: v_perm_b32 v9, v26, v45, s6 ; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 ; GFX9-NEXT: v_perm_b32 v10, v28, v29, s6 ; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10 @@ -27611,23 +27596,11 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; GFX9-NEXT: ; implicit-def: $vgpr24 ; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr25 +; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr26 -; GFX9-NEXT: ; implicit-def: $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr28 ; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr41 @@ -27665,8 +27638,6 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; kill: killed $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; kill: killed $vgpr56 -; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15 ; GFX9-NEXT: ; implicit-def: $vgpr16 ; GFX9-NEXT: ; kill: killed $vgpr56 @@ -27675,25 +27646,26 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB50_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v0, 3, v54 ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v53 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v1, 3, v52 ; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v51 ; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v2, 3, v50 -; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v49 -; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v3, 3, v48 -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v39 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: s_movk_i32 s6, 0x300 ; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0 ; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_add_u16_e32 v1, 3, v50 +; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v49 +; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v2, 3, v48 +; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v39 +; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_add_u16_e32 v2, 3, v38 ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v37 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -27725,36 +27697,39 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v21 ; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v6, 3, v22 -; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v23 -; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 -; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v43 ; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v46 ; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v44 ; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v30 ; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v63 ; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v59 +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(5) -; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 +; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v16 ; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 +; GFX9-NEXT: s_waitcnt vmcnt(3) +; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v15 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v15 -; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v16 -; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v7, 3, v7 ; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -27775,17 +27750,17 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v8, v8, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 ; GFX9-NEXT: v_add_u16_e32 v8, 3, v24 -; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v25 +; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v47 ; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v9, 3, v47 +; GFX9-NEXT: v_add_u16_e32 v9, 3, v25 ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 ; GFX9-NEXT: v_add_u16_sdwa v9, v9, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v8, v8, v9 ; GFX9-NEXT: v_add_u16_e32 v9, 3, v26 -; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v27 +; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v45 ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v45 +; GFX9-NEXT: v_add_u16_e32 v10, 3, v27 ; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 ; GFX9-NEXT: v_add_u16_sdwa v10, v10, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -27817,11 +27792,9 @@ define <16 x float> @bitcast_v64i8_to_v16f32(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_e32 v13, 3, v58 ; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v57 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v14, 3, v14 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v23 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 ; GFX9-NEXT: v_add_u16_sdwa v14, v14, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload @@ -28704,8 +28677,6 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; SI-NEXT: v_lshlrev_b32_e32 v27, 8, v27 ; SI-NEXT: s_cbranch_scc0 .LBB51_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s4, s6, 0xff -; SI-NEXT: v_or_b32_e32 v0, s4, v34 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 @@ -28780,65 +28751,66 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; SI-NEXT: s_or_b32 s90, s90, s91 ; SI-NEXT: s_and_b32 s91, s42, 0xff ; SI-NEXT: s_lshl_b32 s92, s41, 8 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 ; SI-NEXT: s_or_b32 s91, s91, s92 ; SI-NEXT: s_and_b32 s92, s40, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_lshl_b32 s92, s92, 16 ; SI-NEXT: s_lshl_b32 s93, s15, 24 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v33, v1 ; SI-NEXT: s_and_b32 s91, s91, 0xffff ; SI-NEXT: s_or_b32 s92, s93, s92 -; SI-NEXT: v_or_b32_e32 v11, v0, v1 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v23 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 ; SI-NEXT: s_or_b32 s91, s91, s92 ; SI-NEXT: s_and_b32 s92, s14, 0xff ; SI-NEXT: s_lshl_b32 s93, s13, 8 -; SI-NEXT: v_or_b32_e32 v0, v0, v30 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_or_b32 s92, s92, s93 ; SI-NEXT: s_and_b32 s93, s12, 0xff -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v29, v1 ; SI-NEXT: s_lshl_b32 s93, s93, 16 ; SI-NEXT: s_lshl_b32 s94, s11, 24 -; SI-NEXT: v_or_b32_e32 v13, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v19 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 ; SI-NEXT: s_and_b32 s92, s92, 0xffff ; SI-NEXT: s_or_b32 s93, s94, s93 -; SI-NEXT: v_or_b32_e32 v0, v0, v27 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_or_b32 s92, s92, s93 ; SI-NEXT: s_and_b32 s93, s10, 0xff ; SI-NEXT: s_lshl_b32 s94, s9, 8 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v25, v1 ; SI-NEXT: s_or_b32 s93, s93, s94 ; SI-NEXT: s_and_b32 s94, s8, 0xff +; SI-NEXT: s_lshl_b32 s94, s94, 16 +; SI-NEXT: s_lshl_b32 s95, s7, 24 +; SI-NEXT: s_and_b32 s93, s93, 0xffff +; SI-NEXT: s_or_b32 s94, s95, s94 +; SI-NEXT: s_or_b32 s93, s93, s94 +; SI-NEXT: s_and_b32 s94, s6, 0xff +; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 +; SI-NEXT: v_or_b32_e32 v0, s94, v34 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 +; SI-NEXT: v_or_b32_e32 v11, v0, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xff, v28 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v26 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v28 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v32 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v31, v1 +; SI-NEXT: v_or_b32_e32 v12, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v23 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 +; SI-NEXT: v_or_b32_e32 v0, v0, v30 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v29, v1 +; SI-NEXT: v_or_b32_e32 v13, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v19 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 +; SI-NEXT: v_or_b32_e32 v0, v0, v27 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v25, v1 ; SI-NEXT: v_or_b32_e32 v14, v0, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v17 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v16 -; SI-NEXT: s_lshl_b32 s94, s94, 16 -; SI-NEXT: s_lshl_b32 s95, s7, 24 -; SI-NEXT: v_or_b32_e32 v2, v2, v32 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v0, v0, v24 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_and_b32 s93, s93, 0xffff -; SI-NEXT: s_or_b32 s94, s95, s94 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v3, v31, v3 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v22, v1 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: v_or_b32_e32 v12, v2, v3 ; SI-NEXT: v_or_b32_e32 v15, v0, v1 ; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: v_mov_b32_e32 v1, s5 @@ -29090,7 +29062,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; VI-NEXT: v_readfirstlane_b32 s44, v16 ; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:76 ; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:4 ; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 ; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72 ; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:68 @@ -29098,7 +29070,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60 ; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:56 ; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:48 +; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:48 ; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:44 ; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:40 ; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 @@ -29131,18 +29103,18 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -29197,7 +29169,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 ; VI-NEXT: v_or_b32_e32 v10, v10, v12 -; VI-NEXT: v_perm_b32 v12, v24, v22, s4 +; VI-NEXT: v_perm_b32 v12, v23, v22, s4 ; VI-NEXT: v_perm_b32 v11, s6, v26, v11 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 @@ -29213,7 +29185,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; VI-NEXT: v_or_b32_e32 v13, v14, v13 ; VI-NEXT: v_perm_b32 v14, v21, v20, s4 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; VI-NEXT: v_perm_b32 v15, v25, v23, s4 +; VI-NEXT: v_perm_b32 v15, v25, v24, s4 ; VI-NEXT: v_or_b32_e32 v14, v15, v14 ; VI-NEXT: v_perm_b32 v15, v17, v16, s4 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -29320,10 +29292,10 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; VI-NEXT: v_perm_b32 v12, s8, v12, v11 ; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: s_mov_b32 s4, 0xc0c0004 ; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s6, s6, 3 -; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v24 +; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v23 ; VI-NEXT: v_perm_b32 v11, s6, v26, v11 ; VI-NEXT: v_perm_b32 v12, v12, v22, s4 ; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 @@ -29346,7 +29318,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v25 ; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v21 -; VI-NEXT: v_perm_b32 v14, v14, v23, s4 +; VI-NEXT: v_perm_b32 v14, v14, v24, s4 ; VI-NEXT: v_perm_b32 v15, v15, v20, s4 ; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -29400,16 +29372,16 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s43, v17 ; GFX9-NEXT: v_readfirstlane_b32 s44, v16 ; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:76 -; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:8 -; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:4 -; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 +; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:8 +; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:4 +; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72 ; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:68 ; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:64 ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60 -; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:56 -; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:52 -; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:48 +; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:56 +; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:52 +; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:48 ; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:44 ; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:40 ; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 @@ -29442,18 +29414,18 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s27 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -29509,9 +29481,9 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 ; GFX9-NEXT: v_or_b32_e32 v10, v10, v12 ; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_perm_b32 v12, v23, v21, s4 +; GFX9-NEXT: v_perm_b32 v12, v22, v20, s4 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_perm_b32 v11, s6, v25, v11 +; GFX9-NEXT: v_perm_b32 v11, s6, v24, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 ; GFX9-NEXT: s_waitcnt vmcnt(2) @@ -29524,9 +29496,9 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; GFX9-NEXT: v_perm_b32 v14, v30, v29, s4 ; GFX9-NEXT: v_or_b32_e32 v13, v14, v13 -; GFX9-NEXT: v_perm_b32 v14, v22, v20, s4 +; GFX9-NEXT: v_perm_b32 v14, v23, v21, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX9-NEXT: v_perm_b32 v15, v26, v24, s4 +; GFX9-NEXT: v_perm_b32 v15, v26, v25, s4 ; GFX9-NEXT: v_or_b32_e32 v14, v15, v14 ; GFX9-NEXT: v_perm_b32 v15, v17, v16, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -29539,21 +29511,21 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: s_add_i32 s18, s18, 3 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 -; GFX9-NEXT: s_movk_i32 s4, 0x300 +; GFX9-NEXT: s_movk_i32 s5, 0x300 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v1, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; GFX9-NEXT: v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; GFX9-NEXT: s_add_i32 s20, s20, 3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: s_add_i32 s22, s22, 3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u32_sdwa v2, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s24, s24, 3 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: s_add_i32 s26, s26, 3 @@ -29561,7 +29533,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v3, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s28, s28, 3 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 @@ -29570,7 +29542,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11 ; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11 ; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 -; GFX9-NEXT: v_add_u32_sdwa v4, v4, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v4, v4, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s74, s74, 3 ; GFX9-NEXT: v_mov_b32_e32 v4, s73 @@ -29579,7 +29551,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11 ; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11 ; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 -; GFX9-NEXT: v_add_u32_sdwa v5, v5, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v5, v5, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s62, s62, 3 ; GFX9-NEXT: v_mov_b32_e32 v5, s61 @@ -29588,7 +29560,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11 ; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11 ; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 -; GFX9-NEXT: v_add_u32_sdwa v6, v6, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v6, v6, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s58, s58, 3 ; GFX9-NEXT: v_mov_b32_e32 v6, s57 @@ -29597,7 +29569,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11 ; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11 ; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_add_u32_sdwa v7, v7, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v7, v7, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v6, v6, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s46, s46, 3 ; GFX9-NEXT: v_mov_b32_e32 v7, s45 @@ -29606,7 +29578,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11 ; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11 ; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 -; GFX9-NEXT: v_add_u32_sdwa v8, v8, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v8, v8, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s42, s42, 3 ; GFX9-NEXT: v_mov_b32_e32 v8, s41 @@ -29615,7 +29587,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11 ; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11 ; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v8 -; GFX9-NEXT: v_add_u32_sdwa v9, v9, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v9, v9, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v8, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s14, s14, 3 ; GFX9-NEXT: v_mov_b32_e32 v9, s13 @@ -29624,7 +29596,7 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11 ; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11 ; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v9 -; GFX9-NEXT: v_add_u32_sdwa v10, v10, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v10, v10, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v9, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s10, s10, 3 ; GFX9-NEXT: v_mov_b32_e32 v10, s9 @@ -29633,46 +29605,46 @@ define inreg <16 x float> @bitcast_v64i8_to_v16f32_scalar(<64 x i8> inreg %a, i3 ; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11 ; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11 ; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v10 -; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v12, v12, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 ; GFX9-NEXT: v_or_b32_sdwa v10, v10, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s6, s6, 3 -; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004 ; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_add_u32_e32 v12, 3, v23 +; GFX9-NEXT: v_add_u32_e32 v12, 3, v22 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_perm_b32 v11, s6, v25, v11 -; GFX9-NEXT: v_perm_b32 v12, v12, v21, s5 +; GFX9-NEXT: v_perm_b32 v11, s6, v24, v11 +; GFX9-NEXT: v_perm_b32 v12, v12, v20, s4 ; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v11 -; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v12, v12, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u32_e32 v12, 3, v34 ; GFX9-NEXT: v_add_u32_e32 v13, 3, v32 -; GFX9-NEXT: v_perm_b32 v12, v12, v33, s5 -; GFX9-NEXT: v_perm_b32 v13, v13, v31, s5 +; GFX9-NEXT: v_perm_b32 v12, v12, v33, s4 +; GFX9-NEXT: v_perm_b32 v13, v13, v31, s4 ; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12 -; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v13, v13, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v13, 3, v30 ; GFX9-NEXT: v_add_u32_e32 v14, 3, v28 -; GFX9-NEXT: v_perm_b32 v13, v13, v29, s5 -; GFX9-NEXT: v_perm_b32 v14, v14, v27, s5 +; GFX9-NEXT: v_perm_b32 v13, v13, v29, s4 +; GFX9-NEXT: v_perm_b32 v14, v14, v27, s4 ; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 -; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v14, v14, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v14, 3, v26 -; GFX9-NEXT: v_add_u32_e32 v15, 3, v22 -; GFX9-NEXT: v_perm_b32 v14, v14, v24, s5 -; GFX9-NEXT: v_perm_b32 v15, v15, v20, s5 +; GFX9-NEXT: v_add_u32_e32 v15, 3, v23 +; GFX9-NEXT: v_perm_b32 v14, v14, v25, s4 +; GFX9-NEXT: v_perm_b32 v15, v15, v21, s4 ; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v14 -; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v15, v15, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v15, 3, v19 ; GFX9-NEXT: v_add_u32_e32 v17, 3, v17 -; GFX9-NEXT: v_perm_b32 v15, v15, v18, s5 -; GFX9-NEXT: v_perm_b32 v16, v17, v16, s5 +; GFX9-NEXT: v_perm_b32 v15, v15, v18, s4 +; GFX9-NEXT: v_perm_b32 v16, v17, v16, s4 ; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v15 -; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v16, v16, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: .LBB51_3: ; %end ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -32803,10 +32775,10 @@ define <8 x i64> @bitcast_v32f16_to_v8i64(<32 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v40 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v30 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v55 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v30 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v55 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v54 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -32886,41 +32858,41 @@ define <8 x i64> @bitcast_v32f16_to_v8i64(<32 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB62_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v31 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v30 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v54 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v54 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v29 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v29 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v53 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v28 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v27 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v28 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v52 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v27 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v51 @@ -34467,18 +34439,18 @@ define <8 x i64> @bitcast_v32bf16_to_v8i64(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB66_2 ; SI-NEXT: .LBB66_4: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v54 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v52 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v55 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v53 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v52 ; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v53 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v50 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v51 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 @@ -35782,50 +35754,50 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a, ; SI-NEXT: v_readfirstlane_b32 s46, v2 ; SI-NEXT: s_cmp_lg_u32 s46, 0 ; SI-NEXT: v_mul_f32_e64 v41, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v52, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s16 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v63, 1.0, s40 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v54, 1.0, s17 ; SI-NEXT: v_mul_f32_e64 v62, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v52, 1.0, s18 ; SI-NEXT: v_mul_f32_e64 v61, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s19 ; SI-NEXT: v_mul_f32_e64 v60, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v48, 1.0, s20 ; SI-NEXT: v_mul_f32_e64 v59, 1.0, s26 -; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25 -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10 -; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v54, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v50, 1.0, s20 ; SI-NEXT: v_mul_f32_e64 v37, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25 ; SI-NEXT: v_mul_f32_e64 v35, 1.0, s22 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24 ; SI-NEXT: v_mul_f32_e64 v33, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14 ; SI-NEXT: v_mul_f32_e64 v31, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12 ; SI-NEXT: v_mul_f32_e64 v29, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10 ; SI-NEXT: v_mul_f32_e64 v27, 1.0, s11 +; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v25, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6 ; SI-NEXT: v_mul_f32_e64 v23, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v21, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45 ; SI-NEXT: v_mul_f32_e64 v19, 1.0, s44 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43 ; SI-NEXT: v_mul_f32_e64 v17, 1.0, s42 ; SI-NEXT: s_cbranch_scc0 .LBB67_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v63 -; SI-NEXT: v_lshr_b64 v[0:1], v[52:53], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 16 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v62 -; SI-NEXT: v_lshr_b64 v[2:3], v[39:40], 16 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v61 -; SI-NEXT: v_lshr_b64 v[3:4], v[54:55], 16 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v60 -; SI-NEXT: v_lshr_b64 v[4:5], v[50:51], 16 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v41 +; SI-NEXT: v_lshr_b64 v[0:1], v[39:40], 16 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v63 +; SI-NEXT: v_lshr_b64 v[1:2], v[54:55], 16 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v62 +; SI-NEXT: v_lshr_b64 v[2:3], v[52:53], 16 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v61 +; SI-NEXT: v_lshr_b64 v[3:4], v[50:51], 16 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60 +; SI-NEXT: v_lshr_b64 v[4:5], v[48:49], 16 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59 ; SI-NEXT: v_lshr_b64 v[5:6], v[37:38], 16 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v58 @@ -35853,31 +35825,31 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a, ; SI-NEXT: s_cbranch_execnz .LBB67_3 ; SI-NEXT: .LBB67_2: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v41 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v52 +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v63 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v63 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v54 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v62 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v52 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v61 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v54 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v50 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 ; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v60 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v50 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v48 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 @@ -35975,10 +35947,10 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a, ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v20, s30, 0 -; VI-NEXT: v_writelane_b32 v20, s31, 1 +; VI-NEXT: v_writelane_b32 v26, s30, 0 +; VI-NEXT: v_writelane_b32 v26, s31, 1 ; VI-NEXT: v_readfirstlane_b32 s4, v2 ; VI-NEXT: v_readfirstlane_b32 s31, v1 ; VI-NEXT: s_cmp_lg_u32 s4, 0 @@ -35987,302 +35959,302 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a, ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB67_4 ; VI-NEXT: .LBB67_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v16, 0x40c00000 +; VI-NEXT: s_lshl_b32 s4, s31, 16 +; VI-NEXT: v_mov_b32_e32 v0, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s31, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s30, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: s_and_b32 s4, s30, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v16 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s29, 16 +; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s28, 16 +; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s28, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v16 +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s28, 0xffff0000 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_bfe_u32 v5, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s27, 16 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s27, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v6, 0x400000, v2 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[0:1] -; VI-NEXT: v_cndmask_b32_e64 v0, v3, v4, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: s_and_b32 s5, s26, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s26, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s24, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s26, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s25, 16 +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s25, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s24, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[19:20], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s22, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s24, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s23, 16 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s22, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s20, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s20, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[21:22], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s18, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s19, 16 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s18, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s17, 16 +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_cndmask_b32_e32 v23, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s16, 16 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v16 +; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v0 +; VI-NEXT: v_lshrrev_b64 v[23:24], 16, v[23:24] +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: s_and_b32 s6, s16, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v24, v3, v5, vcc ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s6, v16 -; VI-NEXT: v_bfe_u32 v5, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc -; VI-NEXT: s_lshl_b32 s6, s17, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v1, v3, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v5 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v1, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s17, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_bfe_u32 v7, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v3 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v7, v9, vcc -; VI-NEXT: s_lshl_b32 s6, s19, 16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_cndmask_b32_e64 v17, v1, v5, s[4:5] -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s19, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v9, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v3 -; VI-NEXT: s_lshl_b32 s6, s21, 16 -; VI-NEXT: v_mov_b32_e32 v1, v17 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_cndmask_b32_e64 v17, v5, v7, s[4:5] -; VI-NEXT: v_add_f32_e32 v5, s6, v16 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: s_and_b32 s6, s21, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v3, v9, v11, vcc -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s6, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 -; VI-NEXT: v_bfe_u32 v11, v5, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_lshl_b32 s6, s23, 16 -; VI-NEXT: v_mov_b32_e32 v3, v17 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_cndmask_b32_e64 v17, v7, v9, s[4:5] -; VI-NEXT: v_add_f32_e32 v7, s6, v16 -; VI-NEXT: v_cndmask_b32_e32 v5, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: s_and_b32 s6, s23, 0xffff0000 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v13, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v7 -; VI-NEXT: s_lshl_b32 s6, s25, 16 -; VI-NEXT: v_mov_b32_e32 v5, v17 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_cndmask_b32_e64 v17, v9, v11, s[4:5] -; VI-NEXT: v_add_f32_e32 v9, s6, v16 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: s_and_b32 s6, s25, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v7, v13, v15, vcc -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s6, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v7 -; VI-NEXT: v_bfe_u32 v15, v9, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v9 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_mov_b32_e32 v7, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_cndmask_b32_e32 v9, v15, v17, vcc -; VI-NEXT: s_lshl_b32 s6, s27, 16 -; VI-NEXT: v_cndmask_b32_e64 v17, v11, v13, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 -; VI-NEXT: v_add_f32_e32 v11, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: s_and_b32 s6, s27, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s6, v16 -; VI-NEXT: v_mov_b32_e32 v9, v17 -; VI-NEXT: v_bfe_u32 v17, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v11 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: s_and_b32 s7, s31, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v11, v17, v18, vcc -; VI-NEXT: v_cndmask_b32_e64 v17, v13, v15, s[4:5] -; VI-NEXT: v_add_f32_e32 v13, s7, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v11 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: s_lshl_b32 s6, s31, 16 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_mov_b32_e32 v11, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s6, v16 -; VI-NEXT: v_cndmask_b32_e32 v15, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v17, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v13 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v15 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: s_lshl_b32 s4, s29, 16 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v19, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v16 -; VI-NEXT: v_bfe_u32 v16, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v16, vcc, v16, v15 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v16 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_cndmask_b32_e32 v15, v16, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v13 -; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[15:16] -; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[17:18] -; VI-NEXT: v_mov_b32_e32 v13, v15 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v0 +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[24:25] +; VI-NEXT: v_mov_b32_e32 v1, v23 +; VI-NEXT: v_mov_b32_e32 v3, v22 +; VI-NEXT: v_mov_b32_e32 v5, v21 +; VI-NEXT: v_mov_b32_e32 v7, v20 +; VI-NEXT: v_mov_b32_e32 v9, v19 +; VI-NEXT: v_mov_b32_e32 v11, v18 +; VI-NEXT: v_mov_b32_e32 v13, v17 ; VI-NEXT: v_mov_b32_e32 v15, v16 ; VI-NEXT: s_branch .LBB67_5 ; VI-NEXT: .LBB67_3: @@ -36305,10 +36277,10 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a, ; VI-NEXT: v_mov_b32_e32 v14, s30 ; VI-NEXT: v_mov_b32_e32 v15, s31 ; VI-NEXT: .LBB67_5: ; %end -; VI-NEXT: v_readlane_b32 s30, v20, 0 -; VI-NEXT: v_readlane_b32 s31, v20, 1 +; VI-NEXT: v_readlane_b32 s30, v26, 0 +; VI-NEXT: v_readlane_b32 s31, v26, 1 ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -36345,29 +36317,29 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a, ; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 ; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s4, v0 -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: s_lshl_b32 s4, s30, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; GFX9-NEXT: v_add_f32_e32 v4, s4, v0 -; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 ; GFX9-NEXT: v_mov_b32_e32 v16, 0xffff -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc +; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v15, v1, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v3 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: s_lshl_b32 s4, s30, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v14, v1, 16, v2 ; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 @@ -36631,10 +36603,10 @@ define inreg <8 x i64> @bitcast_v32bf16_to_v8i64_scalar(<32 x bfloat> inreg %a, ; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 ; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_and_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; GFX9-NEXT: v_and_b32_sdwa v0, v16, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v0, v17, 16, v0 ; GFX9-NEXT: s_branch .LBB67_5 ; GFX9-NEXT: .LBB67_3: ; GFX9-NEXT: s_branch .LBB67_2 @@ -37811,111 +37783,108 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr30 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr29 -; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; implicit-def: $vgpr27 +; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; implicit-def: $vgpr26 +; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: ; implicit-def: $vgpr60 ; VI-NEXT: ; implicit-def: $vgpr59 +; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr45 ; VI-NEXT: ; implicit-def: $vgpr44 ; VI-NEXT: ; implicit-def: $vgpr43 ; VI-NEXT: ; implicit-def: $vgpr42 ; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr40 ; VI-NEXT: ; implicit-def: $vgpr55 ; VI-NEXT: ; implicit-def: $vgpr54 ; VI-NEXT: ; implicit-def: $vgpr53 ; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: ; implicit-def: $vgpr51 ; VI-NEXT: ; implicit-def: $vgpr50 ; VI-NEXT: ; implicit-def: $vgpr49 ; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 ; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr18 ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr27 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr26 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr22 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr30 +; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr17 +; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; kill: killed $vgpr27 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB68_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16 ; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8] -; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v16 ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; VI-NEXT: v_mov_b32_e32 v27, v21 -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4] -; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; VI-NEXT: .LBB68_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB68_4 @@ -37939,153 +37908,150 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 { ; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8] -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4] -; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v16 -; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15 -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; VI-NEXT: .LBB68_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v21, v30, v23, s4 -; VI-NEXT: v_perm_b32 v1, v1, v31, s4 -; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_or_b32_e32 v1, v1, v21 +; VI-NEXT: v_perm_b32 v24, v26, v24, s4 +; VI-NEXT: v_perm_b32 v1, v1, v25, s4 +; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; VI-NEXT: v_or_b32_e32 v1, v1, v24 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v28, v63, s4 -; VI-NEXT: v_perm_b32 v2, v2, v29, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v2, v63, s4 +; VI-NEXT: v_perm_b32 v2, v62, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v61, v20, s4 -; VI-NEXT: v_perm_b32 v2, v3, v62, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v59, v23, s4 +; VI-NEXT: v_perm_b32 v1, v3, v60, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v59, v58, s4 -; VI-NEXT: v_perm_b32 v1, v4, v60, s4 +; VI-NEXT: v_perm_b32 v2, v57, v56, s4 +; VI-NEXT: v_perm_b32 v1, v4, v58, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v56, v26, s4 -; VI-NEXT: v_perm_b32 v1, v5, v57, s4 +; VI-NEXT: v_perm_b32 v2, v46, v22, s4 +; VI-NEXT: v_perm_b32 v1, v5, v47, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v46, v45, s4 -; VI-NEXT: v_perm_b32 v1, v6, v47, s4 +; VI-NEXT: v_perm_b32 v2, v44, v43, s4 +; VI-NEXT: v_perm_b32 v1, v6, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v43, v25, s4 -; VI-NEXT: v_perm_b32 v1, v7, v44, s4 +; VI-NEXT: v_perm_b32 v2, v41, v21, s4 +; VI-NEXT: v_perm_b32 v1, v7, v42, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v41, v40, s4 -; VI-NEXT: v_perm_b32 v1, v8, v42, s4 +; VI-NEXT: v_perm_b32 v2, v55, v54, s4 +; VI-NEXT: v_perm_b32 v1, v8, v40, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v54, v22, s4 -; VI-NEXT: v_perm_b32 v1, v9, v55, s4 +; VI-NEXT: v_perm_b32 v2, v52, v20, s4 +; VI-NEXT: v_perm_b32 v1, v9, v53, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v52, v51, s4 -; VI-NEXT: v_perm_b32 v1, v10, v53, s4 +; VI-NEXT: v_perm_b32 v2, v50, v49, s4 +; VI-NEXT: v_perm_b32 v1, v10, v51, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v49, v19, s4 -; VI-NEXT: v_perm_b32 v1, v11, v50, s4 +; VI-NEXT: v_perm_b32 v2, v39, v19, s4 +; VI-NEXT: v_perm_b32 v1, v11, v48, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v39, v38, s4 -; VI-NEXT: v_perm_b32 v1, v12, v48, s4 +; VI-NEXT: v_perm_b32 v2, v37, v36, s4 +; VI-NEXT: v_perm_b32 v1, v12, v38, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v36, v18, s4 -; VI-NEXT: v_perm_b32 v1, v13, v37, s4 +; VI-NEXT: v_perm_b32 v2, v34, v18, s4 +; VI-NEXT: v_perm_b32 v1, v13, v35, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v34, v33, s4 -; VI-NEXT: v_perm_b32 v1, v14, v35, s4 +; VI-NEXT: v_perm_b32 v2, v32, v31, s4 +; VI-NEXT: v_perm_b32 v1, v14, v33, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v15, v32, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v17, s4 +; VI-NEXT: v_perm_b32 v2, v29, v17, s4 +; VI-NEXT: v_perm_b32 v1, v15, v30, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v27, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v16, v28, s4 ; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v16, v1, s4 +; VI-NEXT: v_perm_b32 v2, v27, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -38127,111 +38093,108 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr25 +; GFX9-NEXT: ; implicit-def: $vgpr26 ; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr29 -; GFX9-NEXT: ; implicit-def: $vgpr28 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr21 +; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr58 ; GFX9-NEXT: ; implicit-def: $vgpr57 ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr44 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr40 ; GFX9-NEXT: ; implicit-def: $vgpr55 ; GFX9-NEXT: ; implicit-def: $vgpr54 ; GFX9-NEXT: ; implicit-def: $vgpr53 ; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr20 ; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr50 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr27 -; GFX9-NEXT: ; implicit-def: $vgpr25 -; GFX9-NEXT: ; implicit-def: $vgpr26 -; GFX9-NEXT: ; implicit-def: $vgpr23 -; GFX9-NEXT: ; implicit-def: $vgpr20 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr31 +; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr17 +; GFX9-NEXT: ; implicit-def: $vgpr28 +; GFX9-NEXT: ; kill: killed $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB68_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16 ; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16 ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: v_mov_b32_e32 v27, v22 -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB68_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB68_4 @@ -38256,121 +38219,118 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16 ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB68_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v25, s4 +; GFX9-NEXT: v_perm_b32 v24, v26, v24, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 -; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4 +; GFX9-NEXT: v_perm_b32 v1, v2, v63, s4 +; GFX9-NEXT: v_perm_b32 v2, v62, v61, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1 +; GFX9-NEXT: v_perm_b32 v1, v3, v60, s4 +; GFX9-NEXT: v_perm_b32 v2, v59, v23, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4 -; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4 +; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4 +; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4 -; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4 +; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4 +; GFX9-NEXT: v_perm_b32 v2, v46, v22, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4 -; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4 +; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4 +; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4 -; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4 +; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v41, v21, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4 -; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4 +; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4 +; GFX9-NEXT: v_perm_b32 v2, v55, v54, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4 -; GFX9-NEXT: v_perm_b32 v2, v54, v20, s4 +; GFX9-NEXT: v_perm_b32 v1, v9, v53, s4 +; GFX9-NEXT: v_perm_b32 v2, v52, v20, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: v_perm_b32 v1, v10, v53, s4 -; GFX9-NEXT: v_perm_b32 v2, v52, v51, s4 +; GFX9-NEXT: v_perm_b32 v1, v10, v51, s4 +; GFX9-NEXT: v_perm_b32 v2, v50, v49, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_perm_b32 v1, v11, v50, s4 -; GFX9-NEXT: v_perm_b32 v2, v49, v19, s4 +; GFX9-NEXT: v_perm_b32 v1, v11, v48, s4 +; GFX9-NEXT: v_perm_b32 v2, v39, v19, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: v_perm_b32 v1, v12, v48, s4 -; GFX9-NEXT: v_perm_b32 v2, v39, v38, s4 +; GFX9-NEXT: v_perm_b32 v1, v12, v38, s4 +; GFX9-NEXT: v_perm_b32 v2, v37, v36, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_perm_b32 v1, v13, v37, s4 -; GFX9-NEXT: v_perm_b32 v2, v36, v18, s4 +; GFX9-NEXT: v_perm_b32 v1, v13, v35, s4 +; GFX9-NEXT: v_perm_b32 v2, v34, v18, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v1, v14, v35, s4 -; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4 +; GFX9-NEXT: v_perm_b32 v1, v14, v33, s4 +; GFX9-NEXT: v_perm_b32 v2, v32, v31, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4 +; GFX9-NEXT: v_perm_b32 v1, v15, v30, s4 +; GFX9-NEXT: v_perm_b32 v2, v29, v17, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v16, v28, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4 +; GFX9-NEXT: v_perm_b32 v2, v27, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -38928,12 +38888,12 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in ; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 24 ; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 16 ; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 8 -; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 24 -; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 8 -; SI-NEXT: s_lshr_b64 s[62:63], s[20:21], 24 -; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 8 +; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24 +; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 8 +; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 24 +; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 8 ; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 ; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8 @@ -38994,12 +38954,12 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in ; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 24 ; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 16 ; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 8 -; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 24 -; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 8 -; SI-NEXT: s_lshr_b64 s[62:63], s[20:21], 24 -; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 8 +; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24 +; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 8 +; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 24 +; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 8 ; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 ; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8 @@ -39007,14 +38967,14 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in ; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 16 ; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 8 ; SI-NEXT: .LBB69_3: ; %end -; SI-NEXT: s_lshl_b32 s7, s36, 8 -; SI-NEXT: s_and_b32 s9, s16, 0xff -; SI-NEXT: s_or_b32 s7, s9, s7 +; SI-NEXT: s_and_b32 s7, s16, 0xff +; SI-NEXT: s_lshl_b32 s9, s36, 8 +; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: s_and_b32 s9, s34, 0xff -; SI-NEXT: s_lshl_b32 s11, s30, 24 ; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: s_lshl_b32 s11, s30, 24 ; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s9, s11, s9 ; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: v_mov_b32_e32 v1, s7 ; SI-NEXT: s_and_b32 s7, s17, 0xff @@ -39023,45 +38983,46 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in ; SI-NEXT: s_and_b32 s9, s84, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_lshl_b32 s11, s83, 24 -; SI-NEXT: s_or_b32 s9, s11, s9 ; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s9, s11, s9 ; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: v_mov_b32_e32 v2, s7 -; SI-NEXT: s_lshl_b32 s7, s94, 8 -; SI-NEXT: s_and_b32 s9, s18, 0xff -; SI-NEXT: s_or_b32 s7, s9, s7 +; SI-NEXT: s_and_b32 s7, s18, 0xff +; SI-NEXT: s_lshl_b32 s9, s94, 8 +; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: s_and_b32 s9, s92, 0xff -; SI-NEXT: s_lshl_b32 s11, s90, 24 ; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: s_lshl_b32 s11, s90, 24 ; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0 ; SI-NEXT: s_or_b32 s7, s7, s9 -; SI-NEXT: v_mov_b32_e32 v3, s7 +; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v2, s7 ; SI-NEXT: s_and_b32 s7, s19, 0xff ; SI-NEXT: s_lshl_b32 s9, s82, 8 ; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: s_and_b32 s9, s81, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_lshl_b32 s11, s80, 24 -; SI-NEXT: s_or_b32 s9, s11, s9 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0 +; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0 ; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s7 ; SI-NEXT: s_and_b32 s7, s20, 0xff -; SI-NEXT: s_lshl_b32 s9, s76, 8 +; SI-NEXT: s_lshl_b32 s9, s88, 8 ; SI-NEXT: s_or_b32 s7, s7, s9 -; SI-NEXT: s_and_b32 s9, s72, 0xff +; SI-NEXT: s_and_b32 s9, s78, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s62, 24 -; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0 +; SI-NEXT: s_lshl_b32 s11, s76, 24 ; SI-NEXT: s_and_b32 s7, s7, 0xffff ; SI-NEXT: s_or_b32 s9, s11, s9 -; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen ; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0 ; SI-NEXT: s_or_b32 s7, s7, s9 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen @@ -39081,11 +39042,11 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s7 ; SI-NEXT: s_and_b32 s7, s22, 0xff -; SI-NEXT: s_lshl_b32 s9, s88, 8 +; SI-NEXT: s_lshl_b32 s9, s74, 8 ; SI-NEXT: s_or_b32 s7, s7, s9 -; SI-NEXT: s_and_b32 s9, s78, 0xff +; SI-NEXT: s_and_b32 s9, s72, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s74, 24 +; SI-NEXT: s_lshl_b32 s11, s62, 24 ; SI-NEXT: s_and_b32 s7, s7, 0xffff ; SI-NEXT: s_or_b32 s9, s11, s9 ; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0 @@ -39259,42 +39220,42 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in ; SI-NEXT: ; implicit-def: $sgpr82 ; SI-NEXT: ; implicit-def: $sgpr81 ; SI-NEXT: ; implicit-def: $sgpr80 +; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr71 ; SI-NEXT: ; implicit-def: $sgpr70 ; SI-NEXT: ; implicit-def: $sgpr69 +; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr68 ; SI-NEXT: ; implicit-def: $sgpr67 ; SI-NEXT: ; implicit-def: $sgpr66 -; SI-NEXT: ; implicit-def: $sgpr65 -; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr55 -; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr51 -; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr49 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr88 -; SI-NEXT: ; implicit-def: $sgpr78 -; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr65 +; SI-NEXT: ; implicit-def: $sgpr64 +; SI-NEXT: ; implicit-def: $sgpr55 ; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr54 +; SI-NEXT: ; implicit-def: $sgpr53 +; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr51 +; SI-NEXT: ; implicit-def: $sgpr50 +; SI-NEXT: ; implicit-def: $sgpr49 ; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; implicit-def: $sgpr39 +; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: s_branch .LBB69_2 ; ; VI-LABEL: bitcast_v8i64_to_v64i8_scalar: @@ -40291,19 +40252,19 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v34, v6 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: v_mov_b32_e32 v33, v4 ; SI-NEXT: v_mov_b32_e32 v32, v2 ; SI-NEXT: v_mov_b32_e32 v31, v0 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:8 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:16 ; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:16 ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:24 ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:32 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:40 @@ -40318,24 +40279,24 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:112 ; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:120 ; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:128 -; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v19 +; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v17 ; SI-NEXT: v_lshlrev_b32_e32 v26, 8, v25 +; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v19 ; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v21 ; SI-NEXT: v_lshlrev_b32_e32 v24, 24, v23 ; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27 ; SI-NEXT: v_lshlrev_b32_e32 v30, 8, v29 ; SI-NEXT: v_lshlrev_b32_e32 v49, 8, v1 ; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v3 -; SI-NEXT: v_lshlrev_b32_e32 v39, 8, v5 -; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v7 -; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v9 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v11 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v13 +; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v5 +; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v7 +; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v9 +; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v11 +; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v13 ; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v15 -; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v17 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; SI-NEXT: v_lshlrev_b32_e32 v17, 24, v2 +; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v2 ; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v4 ; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v6 ; SI-NEXT: s_waitcnt vmcnt(13) @@ -40353,9 +40314,9 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v52 ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v53 +; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v53 ; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v55 +; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v55 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v40 ; SI-NEXT: s_waitcnt vmcnt(3) @@ -40371,47 +40332,43 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 +; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v47 ; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_lshlrev_b32_e32 v50, 24, v58 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v47 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:108 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:92 ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:76 ; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:68 ; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:60 ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB70_2 ; SI-NEXT: ; %bb.1: ; %cmp.false +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v31 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v32 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v33 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v34 ; SI-NEXT: v_or_b32_e32 v0, v0, v49 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v2, v2, v39 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v1, v48, v1 -; SI-NEXT: v_or_b32_e32 v3, v35, v3 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xff, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v34 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v29 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v62, v9 @@ -40426,16 +40383,13 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v12, v54, v12 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v44 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v21, v13 +; SI-NEXT: v_or_b32_e32 v13, v19, v13 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v53 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v27, v14 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v29 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr52 @@ -40445,67 +40399,79 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v39, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v2, v2, v36 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v3, v36, v3 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_or_b32_e32 v4, v16, v4 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v20, v5 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v24, v6 -; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v35 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_or_b32_e32 v7, v28, v7 ; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v3, v38 +; SI-NEXT: v_or_b32_e32 v3, v3, v37 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v17, v8 -; SI-NEXT: ; implicit-def: $vgpr17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v8, v38, v8 +; SI-NEXT: v_or_b32_e32 v16, v50, v16 +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v18 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -40552,10 +40518,10 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v40 -; SI-NEXT: v_or_b32_e32 v13, v13, v19 +; SI-NEXT: v_or_b32_e32 v13, v13, v17 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v23 +; SI-NEXT: v_and_b32_e32 v14, 0xff, v21 ; SI-NEXT: v_or_b32_e32 v14, v14, v25 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 @@ -40566,24 +40532,19 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr47 ; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v15, v23 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v50, v16 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; kill: killed $vgpr16 @@ -40610,19 +40571,20 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; kill: killed $vgpr16 +; SI-NEXT: ; implicit-def: $vgpr16 +; SI-NEXT: ; kill: killed $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: .LBB70_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB70_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v31 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 @@ -40636,17 +40598,13 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v34 -; SI-NEXT: v_or_b32_e32 v1, v39, v1 +; SI-NEXT: v_or_b32_e32 v1, v34, v1 ; SI-NEXT: s_movk_i32 s6, 0x300 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v2, v35, v2 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v29 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v57 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 @@ -40666,75 +40624,85 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v21, v13 +; SI-NEXT: v_or_b32_e32 v13, v19, v13 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v53 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v27, v14 -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v29 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: s_mov_b32 s7, 0x3000000 ; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v39, v2 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 -; SI-NEXT: v_or_b32_e32 v2, v36, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v3, v36, v3 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_or_b32_e32 v4, v16, v4 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v20, v5 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v24, v6 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v35, v2 +; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_or_b32_e32 v7, v28, v7 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v38, v3 +; SI-NEXT: v_or_b32_e32 v3, v37, v3 ; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v3, vcc, s7, v3 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v17, v8 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v8, v38, v8 +; SI-NEXT: v_or_b32_e32 v16, v50, v16 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_or_b32_e32 v4, v18, v4 @@ -40800,11 +40768,11 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v40 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 -; SI-NEXT: v_or_b32_e32 v13, v19, v13 +; SI-NEXT: v_or_b32_e32 v13, v17, v13 ; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v23 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v21 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_or_b32_e32 v14, v25, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 @@ -40822,15 +40790,9 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v23, v15 ; SI-NEXT: v_add_i32_e32 v15, vcc, 0x300, v15 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v50, v16 ; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v15 ; SI-NEXT: .LBB70_4: ; %end @@ -40876,8 +40838,8 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v53, v1 @@ -40906,7 +40868,7 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:16 ; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:12 ; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:4 ; VI-NEXT: v_mov_b32_e32 v31, v15 ; VI-NEXT: v_mov_b32_e32 v32, v14 ; VI-NEXT: v_mov_b32_e32 v33, v13 @@ -40924,7 +40886,7 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:124 +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:124 ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:120 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill @@ -40939,10 +40901,10 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:104 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:100 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:96 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill @@ -40956,14 +40918,14 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_mov_b32 s6, 0xc0c0004 ; VI-NEXT: v_perm_b32 v1, v52, v51, s6 -; VI-NEXT: v_perm_b32 v3, v48, v39, s6 ; VI-NEXT: v_perm_b32 v0, v54, v53, s6 -; VI-NEXT: v_perm_b32 v2, v50, v49, s6 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_perm_b32 v2, v48, v39, s6 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_perm_b32 v1, v50, v49, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_perm_b32 v3, v36, v35, s6 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_perm_b32 v2, v38, v37, s6 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_perm_b32 v4, v32, v31, s6 @@ -41028,8 +40990,8 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr59 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v14, v15, v14, s6 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 @@ -41046,7 +41008,7 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v8, v8, v30, s6 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_perm_b32 v8, v57, v56, s6 +; VI-NEXT: v_perm_b32 v8, v25, v56, s6 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 ; VI-NEXT: v_perm_b32 v9, v47, v46, s6 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 @@ -41058,8 +41020,8 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v12, v12, v13 ; VI-NEXT: v_perm_b32 v13, v58, v24, s6 ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; kill: killed $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr24 @@ -41075,7 +41037,7 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; kill: killed $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr30 -; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr25 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr46 @@ -41101,29 +41063,29 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v15, v16, v15, s6 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v16, v25, v16, s6 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: v_perm_b32 v16, v57, v16, s6 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: v_or_b32_e32 v15, v15, v16 ; VI-NEXT: ; implicit-def: $vgpr16 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: .LBB70_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB70_4 @@ -41134,19 +41096,19 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_e32 v1, 3, v52 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v51 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v2, 3, v50 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v49 -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v3, 3, v48 -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v39 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_mov_b32_e32 v15, 0x300 ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_add_u16_sdwa v1, v1, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 -; VI-NEXT: v_add_u16_sdwa v3, v3, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v50 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v49 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v2, 3, v48 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v39 +; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 +; VI-NEXT: v_add_u16_sdwa v2, v2, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v38 ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v37 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -41191,7 +41153,7 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v42 ; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v63 ; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v59 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload @@ -41200,7 +41162,7 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v6, 0x300, v6 ; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 @@ -41229,7 +41191,7 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v8, v8, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_add_u16_e32 v8, 3, v57 +; VI-NEXT: v_add_u16_e32 v8, 3, v25 ; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v56 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 3, v26 @@ -41279,8 +41241,8 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v14, v16, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v14, v14, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v14, 3, v14 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -41300,7 +41262,7 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v17, 3, v25 +; VI-NEXT: v_add_u16_e32 v17, 3, v57 ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v16, 0x300, v16 ; VI-NEXT: v_add_u16_sdwa v15, v17, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -41352,11 +41314,13 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v53, v1 ; GFX9-NEXT: v_mov_b32_e32 v54, v0 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:128 +; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:92 ; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:88 ; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:84 ; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:80 @@ -41372,12 +41336,12 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40 ; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 ; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:32 -; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:28 -; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:24 +; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28 +; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:24 ; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:20 ; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:16 -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:12 -; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:8 +; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:12 +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:4 ; GFX9-NEXT: v_mov_b32_e32 v31, v15 ; GFX9-NEXT: v_mov_b32_e32 v32, v14 @@ -41393,9 +41357,9 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_mov_b32_e32 v50, v4 ; GFX9-NEXT: v_mov_b32_e32 v51, v3 ; GFX9-NEXT: v_mov_b32_e32 v52, v2 -; GFX9-NEXT: s_waitcnt vmcnt(24) +; GFX9-NEXT: s_waitcnt vmcnt(25) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; GFX9-NEXT: s_waitcnt vmcnt(22) +; GFX9-NEXT: s_waitcnt vmcnt(23) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124 ; GFX9-NEXT: s_nop 0 @@ -41419,22 +41383,20 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:96 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:92 -; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB70_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004 ; GFX9-NEXT: v_perm_b32 v0, v54, v53, s6 ; GFX9-NEXT: v_perm_b32 v1, v52, v51, s6 -; GFX9-NEXT: v_perm_b32 v2, v50, v49, s6 -; GFX9-NEXT: v_perm_b32 v3, v48, v39, s6 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_perm_b32 v1, v50, v49, s6 +; GFX9-NEXT: v_perm_b32 v2, v48, v39, s6 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: v_perm_b32 v2, v38, v37, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v35, s6 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 @@ -41445,14 +41407,8 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v5, v18, v19, s6 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 ; GFX9-NEXT: v_perm_b32 v5, v20, v21, s6 -; GFX9-NEXT: v_perm_b32 v6, v22, v23, s6 -; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v9, v47, v46, s6 -; GFX9-NEXT: v_perm_b32 v10, v45, v44, s6 +; GFX9-NEXT: v_perm_b32 v9, v25, v46, s6 +; GFX9-NEXT: v_perm_b32 v10, v27, v44, s6 ; GFX9-NEXT: v_perm_b32 v11, v42, v30, s6 ; GFX9-NEXT: v_perm_b32 v12, v55, v63, s6 ; GFX9-NEXT: v_perm_b32 v13, v60, v59, s6 @@ -41477,11 +41433,9 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr20 ; GFX9-NEXT: ; implicit-def: $vgpr21 -; GFX9-NEXT: ; implicit-def: $vgpr22 -; GFX9-NEXT: ; implicit-def: $vgpr23 -; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr25 ; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: ; implicit-def: $vgpr44 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr30 @@ -41489,12 +41443,34 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v6, v22, v6, s6 +; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v14, v23, v14, s6 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v14, v15, v14, s6 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 @@ -41506,9 +41482,9 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6 ; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7 -; GFX9-NEXT: v_perm_b32 v8, v24, v25, s6 +; GFX9-NEXT: v_perm_b32 v8, v24, v47, s6 ; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8 -; GFX9-NEXT: v_perm_b32 v9, v26, v27, s6 +; GFX9-NEXT: v_perm_b32 v9, v26, v45, s6 ; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 ; GFX9-NEXT: v_perm_b32 v10, v28, v29, s6 ; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10 @@ -41522,23 +41498,11 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; GFX9-NEXT: ; implicit-def: $vgpr24 ; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr25 +; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr26 -; GFX9-NEXT: ; implicit-def: $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr28 ; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr41 @@ -41576,8 +41540,6 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; kill: killed $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; kill: killed $vgpr56 -; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15 ; GFX9-NEXT: ; implicit-def: $vgpr16 ; GFX9-NEXT: ; kill: killed $vgpr56 @@ -41586,25 +41548,26 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB70_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v0, 3, v54 ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v53 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v1, 3, v52 ; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v51 ; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v2, 3, v50 -; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v49 -; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v3, 3, v48 -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v39 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: s_movk_i32 s6, 0x300 ; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0 ; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_add_u16_e32 v1, 3, v50 +; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v49 +; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v2, 3, v48 +; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v39 +; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_add_u16_e32 v2, 3, v38 ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v37 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -41636,36 +41599,39 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v21 ; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v6, 3, v22 -; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v23 -; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 -; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v43 ; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v46 ; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v44 ; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v30 ; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v63 ; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v59 +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(5) -; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 +; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v16 ; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 +; GFX9-NEXT: s_waitcnt vmcnt(3) +; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v15 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v15 -; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v16 -; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v7, 3, v7 ; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -41686,17 +41652,17 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v8, v8, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 ; GFX9-NEXT: v_add_u16_e32 v8, 3, v24 -; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v25 +; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v47 ; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v9, 3, v47 +; GFX9-NEXT: v_add_u16_e32 v9, 3, v25 ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 ; GFX9-NEXT: v_add_u16_sdwa v9, v9, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v8, v8, v9 ; GFX9-NEXT: v_add_u16_e32 v9, 3, v26 -; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v27 +; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v45 ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v45 +; GFX9-NEXT: v_add_u16_e32 v10, 3, v27 ; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 ; GFX9-NEXT: v_add_u16_sdwa v10, v10, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -41728,11 +41694,9 @@ define <8 x i64> @bitcast_v64i8_to_v8i64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_e32 v13, 3, v58 ; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v57 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v14, 3, v14 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v23 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 ; GFX9-NEXT: v_add_u16_sdwa v14, v14, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload @@ -42615,8 +42579,6 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; SI-NEXT: v_lshlrev_b32_e32 v27, 8, v27 ; SI-NEXT: s_cbranch_scc0 .LBB71_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s4, s6, 0xff -; SI-NEXT: v_or_b32_e32 v0, s4, v34 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 @@ -42691,65 +42653,66 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; SI-NEXT: s_or_b32 s90, s90, s91 ; SI-NEXT: s_and_b32 s91, s42, 0xff ; SI-NEXT: s_lshl_b32 s92, s41, 8 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 ; SI-NEXT: s_or_b32 s91, s91, s92 ; SI-NEXT: s_and_b32 s92, s40, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_lshl_b32 s92, s92, 16 ; SI-NEXT: s_lshl_b32 s93, s15, 24 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v33, v1 ; SI-NEXT: s_and_b32 s91, s91, 0xffff ; SI-NEXT: s_or_b32 s92, s93, s92 -; SI-NEXT: v_or_b32_e32 v11, v0, v1 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v23 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 ; SI-NEXT: s_or_b32 s91, s91, s92 ; SI-NEXT: s_and_b32 s92, s14, 0xff ; SI-NEXT: s_lshl_b32 s93, s13, 8 -; SI-NEXT: v_or_b32_e32 v0, v0, v30 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_or_b32 s92, s92, s93 ; SI-NEXT: s_and_b32 s93, s12, 0xff -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v29, v1 ; SI-NEXT: s_lshl_b32 s93, s93, 16 ; SI-NEXT: s_lshl_b32 s94, s11, 24 -; SI-NEXT: v_or_b32_e32 v13, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v19 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 ; SI-NEXT: s_and_b32 s92, s92, 0xffff ; SI-NEXT: s_or_b32 s93, s94, s93 -; SI-NEXT: v_or_b32_e32 v0, v0, v27 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_or_b32 s92, s92, s93 ; SI-NEXT: s_and_b32 s93, s10, 0xff ; SI-NEXT: s_lshl_b32 s94, s9, 8 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v25, v1 ; SI-NEXT: s_or_b32 s93, s93, s94 ; SI-NEXT: s_and_b32 s94, s8, 0xff +; SI-NEXT: s_lshl_b32 s94, s94, 16 +; SI-NEXT: s_lshl_b32 s95, s7, 24 +; SI-NEXT: s_and_b32 s93, s93, 0xffff +; SI-NEXT: s_or_b32 s94, s95, s94 +; SI-NEXT: s_or_b32 s93, s93, s94 +; SI-NEXT: s_and_b32 s94, s6, 0xff +; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 +; SI-NEXT: v_or_b32_e32 v0, s94, v34 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 +; SI-NEXT: v_or_b32_e32 v11, v0, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xff, v28 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v26 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v28 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v32 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v31, v1 +; SI-NEXT: v_or_b32_e32 v12, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v23 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 +; SI-NEXT: v_or_b32_e32 v0, v0, v30 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v29, v1 +; SI-NEXT: v_or_b32_e32 v13, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v19 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 +; SI-NEXT: v_or_b32_e32 v0, v0, v27 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v25, v1 ; SI-NEXT: v_or_b32_e32 v14, v0, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v17 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v16 -; SI-NEXT: s_lshl_b32 s94, s94, 16 -; SI-NEXT: s_lshl_b32 s95, s7, 24 -; SI-NEXT: v_or_b32_e32 v2, v2, v32 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v0, v0, v24 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_and_b32 s93, s93, 0xffff -; SI-NEXT: s_or_b32 s94, s95, s94 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v3, v31, v3 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v22, v1 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: v_or_b32_e32 v12, v2, v3 ; SI-NEXT: v_or_b32_e32 v15, v0, v1 ; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: v_mov_b32_e32 v1, s5 @@ -43001,7 +42964,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; VI-NEXT: v_readfirstlane_b32 s44, v16 ; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:76 ; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:4 ; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 ; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72 ; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:68 @@ -43009,7 +42972,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60 ; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:56 ; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:48 +; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:48 ; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:44 ; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:40 ; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 @@ -43042,18 +43005,18 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -43108,7 +43071,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 ; VI-NEXT: v_or_b32_e32 v10, v10, v12 -; VI-NEXT: v_perm_b32 v12, v24, v22, s4 +; VI-NEXT: v_perm_b32 v12, v23, v22, s4 ; VI-NEXT: v_perm_b32 v11, s6, v26, v11 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 @@ -43124,7 +43087,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; VI-NEXT: v_or_b32_e32 v13, v14, v13 ; VI-NEXT: v_perm_b32 v14, v21, v20, s4 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; VI-NEXT: v_perm_b32 v15, v25, v23, s4 +; VI-NEXT: v_perm_b32 v15, v25, v24, s4 ; VI-NEXT: v_or_b32_e32 v14, v15, v14 ; VI-NEXT: v_perm_b32 v15, v17, v16, s4 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -43231,10 +43194,10 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; VI-NEXT: v_perm_b32 v12, s8, v12, v11 ; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: s_mov_b32 s4, 0xc0c0004 ; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s6, s6, 3 -; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v24 +; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v23 ; VI-NEXT: v_perm_b32 v11, s6, v26, v11 ; VI-NEXT: v_perm_b32 v12, v12, v22, s4 ; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 @@ -43257,7 +43220,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v25 ; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v21 -; VI-NEXT: v_perm_b32 v14, v14, v23, s4 +; VI-NEXT: v_perm_b32 v14, v14, v24, s4 ; VI-NEXT: v_perm_b32 v15, v15, v20, s4 ; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -43311,16 +43274,16 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_readfirstlane_b32 s43, v17 ; GFX9-NEXT: v_readfirstlane_b32 s44, v16 ; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:76 -; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:8 -; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:4 -; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 +; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:8 +; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:4 +; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72 ; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:68 ; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:64 ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60 -; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:56 -; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:52 -; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:48 +; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:56 +; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:52 +; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:48 ; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:44 ; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:40 ; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 @@ -43353,18 +43316,18 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s27 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -43420,9 +43383,9 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 ; GFX9-NEXT: v_or_b32_e32 v10, v10, v12 ; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_perm_b32 v12, v23, v21, s4 +; GFX9-NEXT: v_perm_b32 v12, v22, v20, s4 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_perm_b32 v11, s6, v25, v11 +; GFX9-NEXT: v_perm_b32 v11, s6, v24, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 ; GFX9-NEXT: s_waitcnt vmcnt(2) @@ -43435,9 +43398,9 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; GFX9-NEXT: v_perm_b32 v14, v30, v29, s4 ; GFX9-NEXT: v_or_b32_e32 v13, v14, v13 -; GFX9-NEXT: v_perm_b32 v14, v22, v20, s4 +; GFX9-NEXT: v_perm_b32 v14, v23, v21, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX9-NEXT: v_perm_b32 v15, v26, v24, s4 +; GFX9-NEXT: v_perm_b32 v15, v26, v25, s4 ; GFX9-NEXT: v_or_b32_e32 v14, v15, v14 ; GFX9-NEXT: v_perm_b32 v15, v17, v16, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -43450,21 +43413,21 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: s_add_i32 s18, s18, 3 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 -; GFX9-NEXT: s_movk_i32 s4, 0x300 +; GFX9-NEXT: s_movk_i32 s5, 0x300 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v1, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; GFX9-NEXT: v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; GFX9-NEXT: s_add_i32 s20, s20, 3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: s_add_i32 s22, s22, 3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u32_sdwa v2, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s24, s24, 3 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: s_add_i32 s26, s26, 3 @@ -43472,7 +43435,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v3, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s28, s28, 3 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 @@ -43481,7 +43444,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11 ; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11 ; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 -; GFX9-NEXT: v_add_u32_sdwa v4, v4, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v4, v4, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s74, s74, 3 ; GFX9-NEXT: v_mov_b32_e32 v4, s73 @@ -43490,7 +43453,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11 ; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11 ; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 -; GFX9-NEXT: v_add_u32_sdwa v5, v5, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v5, v5, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s62, s62, 3 ; GFX9-NEXT: v_mov_b32_e32 v5, s61 @@ -43499,7 +43462,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11 ; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11 ; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 -; GFX9-NEXT: v_add_u32_sdwa v6, v6, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v6, v6, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s58, s58, 3 ; GFX9-NEXT: v_mov_b32_e32 v6, s57 @@ -43508,7 +43471,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11 ; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11 ; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_add_u32_sdwa v7, v7, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v7, v7, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v6, v6, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s46, s46, 3 ; GFX9-NEXT: v_mov_b32_e32 v7, s45 @@ -43517,7 +43480,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11 ; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11 ; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 -; GFX9-NEXT: v_add_u32_sdwa v8, v8, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v8, v8, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s42, s42, 3 ; GFX9-NEXT: v_mov_b32_e32 v8, s41 @@ -43526,7 +43489,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11 ; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11 ; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v8 -; GFX9-NEXT: v_add_u32_sdwa v9, v9, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v9, v9, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v8, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s14, s14, 3 ; GFX9-NEXT: v_mov_b32_e32 v9, s13 @@ -43535,7 +43498,7 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11 ; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11 ; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v9 -; GFX9-NEXT: v_add_u32_sdwa v10, v10, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v10, v10, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v9, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s10, s10, 3 ; GFX9-NEXT: v_mov_b32_e32 v10, s9 @@ -43544,46 +43507,46 @@ define inreg <8 x i64> @bitcast_v64i8_to_v8i64_scalar(<64 x i8> inreg %a, i32 in ; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11 ; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11 ; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v10 -; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v12, v12, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 ; GFX9-NEXT: v_or_b32_sdwa v10, v10, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s6, s6, 3 -; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004 ; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_add_u32_e32 v12, 3, v23 +; GFX9-NEXT: v_add_u32_e32 v12, 3, v22 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_perm_b32 v11, s6, v25, v11 -; GFX9-NEXT: v_perm_b32 v12, v12, v21, s5 +; GFX9-NEXT: v_perm_b32 v11, s6, v24, v11 +; GFX9-NEXT: v_perm_b32 v12, v12, v20, s4 ; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v11 -; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v12, v12, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u32_e32 v12, 3, v34 ; GFX9-NEXT: v_add_u32_e32 v13, 3, v32 -; GFX9-NEXT: v_perm_b32 v12, v12, v33, s5 -; GFX9-NEXT: v_perm_b32 v13, v13, v31, s5 +; GFX9-NEXT: v_perm_b32 v12, v12, v33, s4 +; GFX9-NEXT: v_perm_b32 v13, v13, v31, s4 ; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12 -; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v13, v13, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v13, 3, v30 ; GFX9-NEXT: v_add_u32_e32 v14, 3, v28 -; GFX9-NEXT: v_perm_b32 v13, v13, v29, s5 -; GFX9-NEXT: v_perm_b32 v14, v14, v27, s5 +; GFX9-NEXT: v_perm_b32 v13, v13, v29, s4 +; GFX9-NEXT: v_perm_b32 v14, v14, v27, s4 ; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 -; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v14, v14, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v14, 3, v26 -; GFX9-NEXT: v_add_u32_e32 v15, 3, v22 -; GFX9-NEXT: v_perm_b32 v14, v14, v24, s5 -; GFX9-NEXT: v_perm_b32 v15, v15, v20, s5 +; GFX9-NEXT: v_add_u32_e32 v15, 3, v23 +; GFX9-NEXT: v_perm_b32 v14, v14, v25, s4 +; GFX9-NEXT: v_perm_b32 v15, v15, v21, s4 ; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v14 -; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v15, v15, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v15, 3, v19 ; GFX9-NEXT: v_add_u32_e32 v17, 3, v17 -; GFX9-NEXT: v_perm_b32 v15, v15, v18, s5 -; GFX9-NEXT: v_perm_b32 v16, v17, v16, s5 +; GFX9-NEXT: v_perm_b32 v15, v15, v18, s4 +; GFX9-NEXT: v_perm_b32 v16, v17, v16, s4 ; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v15 -; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v16, v16, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: .LBB71_3: ; %end ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -44181,22 +44144,22 @@ define <32 x i16> @bitcast_v8f64_to_v32i16(<8 x double> %a, i32 %b) #0 { ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16 -; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr31 -; SI-NEXT: ; implicit-def: $vgpr25 +; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: ; implicit-def: $vgpr22 +; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr20 -; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr18 -; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB72_2 @@ -44206,14 +44169,14 @@ define <32 x i16> @bitcast_v8f64_to_v32i16(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v18, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v19, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v20, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v22, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v25, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v28, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v15 +; SI-NEXT: v_alignbit_b32 v21, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v24, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v27, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v1 @@ -44234,62 +44197,62 @@ define <32 x i16> @bitcast_v8f64_to_v32i16(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v18, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v19, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v20, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v22, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v25, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v28, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v15 +; SI-NEXT: v_alignbit_b32 v21, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v24, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v27, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v1 ; SI-NEXT: .LBB72_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v0, v0, v28 +; SI-NEXT: v_or_b32_e32 v0, v0, v27 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v31 -; SI-NEXT: v_or_b32_e32 v2, v2, v25 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v31 +; SI-NEXT: v_or_b32_e32 v2, v2, v24 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v30 -; SI-NEXT: v_or_b32_e32 v4, v4, v22 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v30 +; SI-NEXT: v_or_b32_e32 v4, v4, v21 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v29 ; SI-NEXT: v_or_b32_e32 v6, v6, v20 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 ; SI-NEXT: v_or_b32_e32 v8, v8, v19 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v26 ; SI-NEXT: v_or_b32_e32 v10, v10, v18 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v25 ; SI-NEXT: v_or_b32_e32 v12, v12, v17 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v23 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v21 -; SI-NEXT: v_or_b32_e32 v1, v1, v28 -; SI-NEXT: v_or_b32_e32 v3, v3, v25 -; SI-NEXT: v_or_b32_e32 v5, v5, v22 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v22 +; SI-NEXT: v_or_b32_e32 v1, v1, v27 +; SI-NEXT: v_or_b32_e32 v3, v3, v24 +; SI-NEXT: v_or_b32_e32 v5, v5, v21 ; SI-NEXT: v_or_b32_e32 v7, v7, v20 ; SI-NEXT: v_or_b32_e32 v9, v9, v19 ; SI-NEXT: v_or_b32_e32 v11, v11, v18 @@ -44417,8 +44380,8 @@ define inreg <32 x i16> @bitcast_v8f64_to_v32i16_scalar(<8 x double> inreg %a, i ; SI-NEXT: v_lshr_b64 v[19:20], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[20:21], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[21:22], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[22:23], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[23:24], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v15 @@ -44428,7 +44391,7 @@ define inreg <32 x i16> @bitcast_v8f64_to_v32i16_scalar(<8 x double> inreg %a, i ; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v1 ; SI-NEXT: s_branch .LBB73_5 ; SI-NEXT: .LBB73_3: ; SI-NEXT: ; implicit-def: $sgpr44 @@ -44472,7 +44435,7 @@ define inreg <32 x i16> @bitcast_v8f64_to_v32i16_scalar(<8 x double> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v29, s59 ; SI-NEXT: v_mov_b32_e32 v30, s58 ; SI-NEXT: v_mov_b32_e32 v31, s57 -; SI-NEXT: v_mov_b32_e32 v32, s56 +; SI-NEXT: v_mov_b32_e32 v24, s56 ; SI-NEXT: v_mov_b32_e32 v23, s44 ; SI-NEXT: v_mov_b32_e32 v22, s42 ; SI-NEXT: v_mov_b32_e32 v21, s40 @@ -44482,12 +44445,12 @@ define inreg <32 x i16> @bitcast_v8f64_to_v32i16_scalar(<8 x double> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v17, s8 ; SI-NEXT: v_mov_b32_e32 v16, s6 ; SI-NEXT: .LBB73_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 @@ -44500,7 +44463,7 @@ define inreg <32 x i16> @bitcast_v8f64_to_v32i16_scalar(<8 x double> inreg %a, i ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_or_b32_e32 v0, v0, v23 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24 ; SI-NEXT: v_or_b32_e32 v2, v2, v22 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v31 @@ -45466,22 +45429,22 @@ define <32 x half> @bitcast_v8f64_to_v32f16(<8 x double> %a, i32 %b) #0 { ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v16 -; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr31 -; SI-NEXT: ; implicit-def: $vgpr25 +; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: ; implicit-def: $vgpr22 +; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr20 -; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr18 -; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB76_2 @@ -45491,14 +45454,14 @@ define <32 x half> @bitcast_v8f64_to_v32f16(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v18, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v19, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v20, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v22, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v25, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v28, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v15 +; SI-NEXT: v_alignbit_b32 v21, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v24, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v27, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v1 @@ -45519,62 +45482,62 @@ define <32 x half> @bitcast_v8f64_to_v32f16(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v18, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v19, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v20, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v22, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v25, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v28, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v15 +; SI-NEXT: v_alignbit_b32 v21, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v24, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v27, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v1 ; SI-NEXT: .LBB76_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v0, v0, v28 +; SI-NEXT: v_or_b32_e32 v0, v0, v27 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v31 -; SI-NEXT: v_or_b32_e32 v2, v2, v25 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v31 +; SI-NEXT: v_or_b32_e32 v2, v2, v24 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v30 -; SI-NEXT: v_or_b32_e32 v4, v4, v22 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v30 +; SI-NEXT: v_or_b32_e32 v4, v4, v21 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v29 ; SI-NEXT: v_or_b32_e32 v6, v6, v20 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 ; SI-NEXT: v_or_b32_e32 v8, v8, v19 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v26 ; SI-NEXT: v_or_b32_e32 v10, v10, v18 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v25 ; SI-NEXT: v_or_b32_e32 v12, v12, v17 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v23 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v21 -; SI-NEXT: v_or_b32_e32 v1, v1, v28 -; SI-NEXT: v_or_b32_e32 v3, v3, v25 -; SI-NEXT: v_or_b32_e32 v5, v5, v22 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v22 +; SI-NEXT: v_or_b32_e32 v1, v1, v27 +; SI-NEXT: v_or_b32_e32 v3, v3, v24 +; SI-NEXT: v_or_b32_e32 v5, v5, v21 ; SI-NEXT: v_or_b32_e32 v7, v7, v20 ; SI-NEXT: v_or_b32_e32 v9, v9, v19 ; SI-NEXT: v_or_b32_e32 v11, v11, v18 @@ -45702,8 +45665,8 @@ define inreg <32 x half> @bitcast_v8f64_to_v32f16_scalar(<8 x double> inreg %a, ; SI-NEXT: v_lshr_b64 v[19:20], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[20:21], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[21:22], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[22:23], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[23:24], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v15 @@ -45713,7 +45676,7 @@ define inreg <32 x half> @bitcast_v8f64_to_v32f16_scalar(<8 x double> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v1 ; SI-NEXT: s_branch .LBB77_5 ; SI-NEXT: .LBB77_3: ; SI-NEXT: ; implicit-def: $sgpr44 @@ -45757,7 +45720,7 @@ define inreg <32 x half> @bitcast_v8f64_to_v32f16_scalar(<8 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v29, s59 ; SI-NEXT: v_mov_b32_e32 v30, s58 ; SI-NEXT: v_mov_b32_e32 v31, s57 -; SI-NEXT: v_mov_b32_e32 v32, s56 +; SI-NEXT: v_mov_b32_e32 v24, s56 ; SI-NEXT: v_mov_b32_e32 v23, s44 ; SI-NEXT: v_mov_b32_e32 v22, s42 ; SI-NEXT: v_mov_b32_e32 v21, s40 @@ -45767,12 +45730,12 @@ define inreg <32 x half> @bitcast_v8f64_to_v32f16_scalar(<8 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v17, s8 ; SI-NEXT: v_mov_b32_e32 v16, s6 ; SI-NEXT: .LBB77_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 @@ -45785,7 +45748,7 @@ define inreg <32 x half> @bitcast_v8f64_to_v32f16_scalar(<8 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_or_b32_e32 v0, v0, v23 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v24 ; SI-NEXT: v_or_b32_e32 v2, v2, v22 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v31 @@ -46021,10 +45984,10 @@ define <8 x double> @bitcast_v32f16_to_v8f64(<32 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v40 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v30 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v55 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v30 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v55 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v54 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -46104,41 +46067,41 @@ define <8 x double> @bitcast_v32f16_to_v8f64(<32 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB78_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v31 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v30 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v54 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v54 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v29 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v29 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v53 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v28 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v27 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v28 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v52 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v27 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v51 @@ -47192,46 +47155,46 @@ define inreg <32 x bfloat> @bitcast_v8f64_to_v32bf16_scalar(<8 x double> inreg % ; SI-NEXT: s_lshl_b32 s8, s16, 16 ; SI-NEXT: s_cbranch_execnz .LBB81_4 ; SI-NEXT: .LBB81_2: ; %cmp.true -; SI-NEXT: v_add_f64 v[19:20], s[22:23], 1.0 -; SI-NEXT: v_add_f64 v[14:15], s[24:25], 1.0 -; SI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0 -; SI-NEXT: v_add_f64 v[2:3], s[4:5], 1.0 -; SI-NEXT: v_add_f64 v[6:7], s[28:29], 1.0 -; SI-NEXT: v_add_f64 v[23:24], s[20:21], 1.0 -; SI-NEXT: v_add_f64 v[27:28], s[18:19], 1.0 -; SI-NEXT: v_add_f64 v[30:31], s[16:17], 1.0 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v3 +; SI-NEXT: v_add_f64 v[0:1], s[22:23], 1.0 +; SI-NEXT: v_add_f64 v[2:3], s[24:25], 1.0 +; SI-NEXT: v_add_f64 v[8:9], s[28:29], 1.0 +; SI-NEXT: v_add_f64 v[4:5], s[26:27], 1.0 +; SI-NEXT: v_add_f64 v[6:7], s[4:5], 1.0 +; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v9 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v9 +; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v8 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v8 +; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v2 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v2 +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v1 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v1 +; SI-NEXT: v_add_f64 v[1:2], s[20:21], 1.0 +; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v7 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v7 +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v6 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v6 +; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v5 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v5 +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v3 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v3 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v0 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v0 +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v2 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v2 +; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v1 +; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v1 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v4 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v4 +; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v7 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v7 -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v11 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v15 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v20 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v20 -; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v19 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 -; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v24 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v24 -; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v23 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v28 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v28 -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v27 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v31 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v31 -; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v30 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v2 +; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v1 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v1 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v0 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; SI-NEXT: s_branch .LBB81_5 ; SI-NEXT: .LBB81_3: ; SI-NEXT: ; implicit-def: $sgpr8 @@ -47268,103 +47231,103 @@ define inreg <32 x bfloat> @bitcast_v8f64_to_v32bf16_scalar(<8 x double> inreg % ; SI-NEXT: ; implicit-def: $sgpr79 ; SI-NEXT: s_branch .LBB81_2 ; SI-NEXT: .LBB81_4: -; SI-NEXT: v_mov_b32_e32 v1, s79 -; SI-NEXT: v_mov_b32_e32 v0, s78 -; SI-NEXT: v_mov_b32_e32 v3, s77 -; SI-NEXT: v_mov_b32_e32 v2, s76 -; SI-NEXT: v_mov_b32_e32 v5, s75 -; SI-NEXT: v_mov_b32_e32 v4, s74 -; SI-NEXT: v_mov_b32_e32 v7, s73 -; SI-NEXT: v_mov_b32_e32 v6, s72 -; SI-NEXT: v_mov_b32_e32 v9, s63 -; SI-NEXT: v_mov_b32_e32 v8, s62 -; SI-NEXT: v_mov_b32_e32 v11, s61 -; SI-NEXT: v_mov_b32_e32 v10, s60 -; SI-NEXT: v_mov_b32_e32 v13, s59 -; SI-NEXT: v_mov_b32_e32 v12, s58 -; SI-NEXT: v_mov_b32_e32 v15, s57 -; SI-NEXT: v_mov_b32_e32 v14, s56 -; SI-NEXT: v_mov_b32_e32 v17, s47 -; SI-NEXT: v_mov_b32_e32 v16, s46 -; SI-NEXT: v_mov_b32_e32 v18, s45 -; SI-NEXT: v_mov_b32_e32 v19, s44 -; SI-NEXT: v_mov_b32_e32 v21, s43 -; SI-NEXT: v_mov_b32_e32 v20, s42 -; SI-NEXT: v_mov_b32_e32 v22, s41 -; SI-NEXT: v_mov_b32_e32 v23, s40 -; SI-NEXT: v_mov_b32_e32 v25, s15 -; SI-NEXT: v_mov_b32_e32 v24, s14 -; SI-NEXT: v_mov_b32_e32 v26, s13 -; SI-NEXT: v_mov_b32_e32 v27, s12 -; SI-NEXT: v_mov_b32_e32 v29, s11 -; SI-NEXT: v_mov_b32_e32 v28, s10 -; SI-NEXT: v_mov_b32_e32 v31, s9 -; SI-NEXT: v_mov_b32_e32 v30, s8 +; SI-NEXT: v_mov_b32_e32 v17, s79 +; SI-NEXT: v_mov_b32_e32 v16, s78 +; SI-NEXT: v_mov_b32_e32 v18, s77 +; SI-NEXT: v_mov_b32_e32 v15, s76 +; SI-NEXT: v_mov_b32_e32 v19, s75 +; SI-NEXT: v_mov_b32_e32 v14, s74 +; SI-NEXT: v_mov_b32_e32 v20, s73 +; SI-NEXT: v_mov_b32_e32 v13, s72 +; SI-NEXT: v_mov_b32_e32 v21, s63 +; SI-NEXT: v_mov_b32_e32 v12, s62 +; SI-NEXT: v_mov_b32_e32 v22, s61 +; SI-NEXT: v_mov_b32_e32 v11, s60 +; SI-NEXT: v_mov_b32_e32 v23, s59 +; SI-NEXT: v_mov_b32_e32 v10, s58 +; SI-NEXT: v_mov_b32_e32 v24, s57 +; SI-NEXT: v_mov_b32_e32 v9, s56 +; SI-NEXT: v_mov_b32_e32 v25, s47 +; SI-NEXT: v_mov_b32_e32 v8, s46 +; SI-NEXT: v_mov_b32_e32 v7, s45 +; SI-NEXT: v_mov_b32_e32 v26, s44 +; SI-NEXT: v_mov_b32_e32 v27, s43 +; SI-NEXT: v_mov_b32_e32 v6, s42 +; SI-NEXT: v_mov_b32_e32 v5, s41 +; SI-NEXT: v_mov_b32_e32 v28, s40 +; SI-NEXT: v_mov_b32_e32 v29, s15 +; SI-NEXT: v_mov_b32_e32 v4, s14 +; SI-NEXT: v_mov_b32_e32 v3, s13 +; SI-NEXT: v_mov_b32_e32 v30, s12 +; SI-NEXT: v_mov_b32_e32 v31, s11 +; SI-NEXT: v_mov_b32_e32 v2, s10 +; SI-NEXT: v_mov_b32_e32 v1, s9 +; SI-NEXT: v_mov_b32_e32 v0, s8 ; SI-NEXT: .LBB81_5: ; %end -; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 -; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 -; SI-NEXT: v_mul_f32_e32 v29, 1.0, v29 ; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 -; SI-NEXT: v_mul_f32_e32 v28, 1.0, v28 -; SI-NEXT: v_mul_f32_e32 v26, 1.0, v26 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v1 -; SI-NEXT: v_mul_f32_e32 v50, 1.0, v0 -; SI-NEXT: v_lshr_b64 v[0:1], v[30:31], 16 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; SI-NEXT: v_mul_f32_e32 v32, 1.0, v27 -; SI-NEXT: v_mul_f32_e32 v25, 1.0, v25 -; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3 -; SI-NEXT: v_mul_f32_e32 v48, 1.0, v2 -; SI-NEXT: v_lshr_b64 v[1:2], v[28:29], 16 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 -; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24 -; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v3 -; SI-NEXT: v_lshr_b64 v[2:3], v[32:33], 16 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v22 -; SI-NEXT: v_mul_f32_e32 v26, 1.0, v23 -; SI-NEXT: v_mul_f32_e32 v21, 1.0, v21 -; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5 -; SI-NEXT: v_mul_f32_e32 v38, 1.0, v4 -; SI-NEXT: v_lshr_b64 v[3:4], v[24:25], 16 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21 -; SI-NEXT: v_mul_f32_e32 v20, 1.0, v20 -; SI-NEXT: v_mul_f32_e32 v18, 1.0, v18 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v5 -; SI-NEXT: v_lshr_b64 v[4:5], v[26:27], 16 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v18 -; SI-NEXT: v_mul_f32_e32 v22, 1.0, v19 -; SI-NEXT: v_mul_f32_e32 v17, 1.0, v17 -; SI-NEXT: v_mul_f32_e32 v7, 1.0, v7 -; SI-NEXT: v_mul_f32_e32 v36, 1.0, v6 -; SI-NEXT: v_lshr_b64 v[5:6], v[20:21], 16 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0 +; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 +; SI-NEXT: v_mul_f32_e32 v1, 1.0, v31 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v1 +; SI-NEXT: v_mul_f32_e32 v31, 1.0, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[31:32], 16 +; SI-NEXT: v_mul_f32_e32 v2, 1.0, v3 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2 +; SI-NEXT: v_mul_f32_e32 v2, 1.0, v30 +; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 +; SI-NEXT: v_mul_f32_e32 v3, 1.0, v29 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v3 +; SI-NEXT: v_mul_f32_e32 v29, 1.0, v4 +; SI-NEXT: v_lshr_b64 v[3:4], v[29:30], 16 +; SI-NEXT: v_mul_f32_e32 v4, 1.0, v5 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4 +; SI-NEXT: v_mul_f32_e32 v4, 1.0, v28 +; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], 16 +; SI-NEXT: v_mul_f32_e32 v5, 1.0, v27 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v5 +; SI-NEXT: v_mul_f32_e32 v27, 1.0, v6 +; SI-NEXT: v_lshr_b64 v[5:6], v[27:28], 16 +; SI-NEXT: v_mul_f32_e32 v6, 1.0, v7 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6 +; SI-NEXT: v_mul_f32_e32 v6, 1.0, v26 +; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], 16 +; SI-NEXT: v_mul_f32_e32 v7, 1.0, v25 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v7 +; SI-NEXT: v_mul_f32_e32 v25, 1.0, v8 +; SI-NEXT: v_lshr_b64 v[7:8], v[25:26], 16 +; SI-NEXT: v_mul_f32_e32 v8, 1.0, v24 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v8 +; SI-NEXT: v_mul_f32_e32 v24, 1.0, v9 +; SI-NEXT: v_lshr_b64 v[8:9], v[24:25], 16 +; SI-NEXT: v_mul_f32_e32 v9, 1.0, v23 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9 +; SI-NEXT: v_mul_f32_e32 v23, 1.0, v10 +; SI-NEXT: v_lshr_b64 v[9:10], v[23:24], 16 +; SI-NEXT: v_mul_f32_e32 v10, 1.0, v22 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v10 +; SI-NEXT: v_mul_f32_e32 v22, 1.0, v11 +; SI-NEXT: v_lshr_b64 v[10:11], v[22:23], 16 +; SI-NEXT: v_mul_f32_e32 v11, 1.0, v21 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v11 +; SI-NEXT: v_mul_f32_e32 v21, 1.0, v12 +; SI-NEXT: v_lshr_b64 v[11:12], v[21:22], 16 +; SI-NEXT: v_mul_f32_e32 v12, 1.0, v20 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v12 +; SI-NEXT: v_mul_f32_e32 v20, 1.0, v13 +; SI-NEXT: v_lshr_b64 v[12:13], v[20:21], 16 +; SI-NEXT: v_mul_f32_e32 v13, 1.0, v19 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v13 +; SI-NEXT: v_mul_f32_e32 v19, 1.0, v14 +; SI-NEXT: v_lshr_b64 v[13:14], v[19:20], 16 +; SI-NEXT: v_mul_f32_e32 v14, 1.0, v18 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v14 +; SI-NEXT: v_mul_f32_e32 v18, 1.0, v15 +; SI-NEXT: v_lshr_b64 v[14:15], v[18:19], 16 +; SI-NEXT: v_mul_f32_e32 v15, 1.0, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v15 ; SI-NEXT: v_mul_f32_e32 v16, 1.0, v16 -; SI-NEXT: v_mul_f32_e32 v15, 1.0, v15 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7 -; SI-NEXT: v_lshr_b64 v[6:7], v[22:23], 16 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_mul_f32_e32 v14, 1.0, v14 -; SI-NEXT: v_mul_f32_e32 v13, 1.0, v13 -; SI-NEXT: v_mul_f32_e32 v9, 1.0, v9 -; SI-NEXT: v_mul_f32_e32 v34, 1.0, v8 -; SI-NEXT: v_lshr_b64 v[7:8], v[16:17], 16 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_mul_f32_e32 v12, 1.0, v12 -; SI-NEXT: v_mul_f32_e32 v11, 1.0, v11 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v9 -; SI-NEXT: v_lshr_b64 v[8:9], v[14:15], 16 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v11 -; SI-NEXT: v_mul_f32_e32 v18, 1.0, v10 -; SI-NEXT: v_lshr_b64 v[9:10], v[12:13], 16 -; SI-NEXT: v_lshr_b64 v[10:11], v[18:19], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[34:35], 16 -; SI-NEXT: v_lshr_b64 v[12:13], v[36:37], 16 -; SI-NEXT: v_lshr_b64 v[13:14], v[38:39], 16 -; SI-NEXT: v_lshr_b64 v[14:15], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[15:16], v[50:51], 16 +; SI-NEXT: v_lshr_b64 v[15:16], v[16:17], 16 ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: bitcast_v8f64_to_v32bf16_scalar: @@ -47673,18 +47636,18 @@ define <8 x double> @bitcast_v32bf16_to_v8f64(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB82_2 ; SI-NEXT: .LBB82_4: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v54 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v52 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v55 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v53 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v52 ; SI-NEXT: v_alignbit_b32 v0, v1, v0, 16 -; SI-NEXT: v_alignbit_b32 v1, v3, v2, 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v53 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v50 +; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v51 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 @@ -48988,50 +48951,50 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg % ; SI-NEXT: v_readfirstlane_b32 s46, v2 ; SI-NEXT: s_cmp_lg_u32 s46, 0 ; SI-NEXT: v_mul_f32_e64 v41, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v52, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s16 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v63, 1.0, s40 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v54, 1.0, s17 ; SI-NEXT: v_mul_f32_e64 v62, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v52, 1.0, s18 ; SI-NEXT: v_mul_f32_e64 v61, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s19 ; SI-NEXT: v_mul_f32_e64 v60, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v48, 1.0, s20 ; SI-NEXT: v_mul_f32_e64 v59, 1.0, s26 -; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25 -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10 -; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45 -; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43 -; SI-NEXT: v_mul_f32_e64 v39, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v54, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v50, 1.0, s20 ; SI-NEXT: v_mul_f32_e64 v37, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s25 ; SI-NEXT: v_mul_f32_e64 v35, 1.0, s22 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s24 ; SI-NEXT: v_mul_f32_e64 v33, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, s14 ; SI-NEXT: v_mul_f32_e64 v31, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s12 ; SI-NEXT: v_mul_f32_e64 v29, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s10 ; SI-NEXT: v_mul_f32_e64 v27, 1.0, s11 +; SI-NEXT: v_mul_f32_e64 v45, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v25, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v44, 1.0, s6 ; SI-NEXT: v_mul_f32_e64 v23, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v43, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v21, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s45 ; SI-NEXT: v_mul_f32_e64 v19, 1.0, s44 +; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43 ; SI-NEXT: v_mul_f32_e64 v17, 1.0, s42 ; SI-NEXT: s_cbranch_scc0 .LBB83_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v63 -; SI-NEXT: v_lshr_b64 v[0:1], v[52:53], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 16 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v62 -; SI-NEXT: v_lshr_b64 v[2:3], v[39:40], 16 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v61 -; SI-NEXT: v_lshr_b64 v[3:4], v[54:55], 16 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v60 -; SI-NEXT: v_lshr_b64 v[4:5], v[50:51], 16 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v41 +; SI-NEXT: v_lshr_b64 v[0:1], v[39:40], 16 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v63 +; SI-NEXT: v_lshr_b64 v[1:2], v[54:55], 16 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v62 +; SI-NEXT: v_lshr_b64 v[2:3], v[52:53], 16 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v61 +; SI-NEXT: v_lshr_b64 v[3:4], v[50:51], 16 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v60 +; SI-NEXT: v_lshr_b64 v[4:5], v[48:49], 16 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v59 ; SI-NEXT: v_lshr_b64 v[5:6], v[37:38], 16 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v58 @@ -49059,31 +49022,31 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg % ; SI-NEXT: s_cbranch_execnz .LBB83_3 ; SI-NEXT: .LBB83_2: ; %cmp.true ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v41 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v52 +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v63 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v48 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v63 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v54 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v62 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v52 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v61 -; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v54 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v50 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 ; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v60 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v50 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v48 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5 @@ -49181,10 +49144,10 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg % ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v20, s30, 0 -; VI-NEXT: v_writelane_b32 v20, s31, 1 +; VI-NEXT: v_writelane_b32 v26, s30, 0 +; VI-NEXT: v_writelane_b32 v26, s31, 1 ; VI-NEXT: v_readfirstlane_b32 s4, v2 ; VI-NEXT: v_readfirstlane_b32 s31, v1 ; VI-NEXT: s_cmp_lg_u32 s4, 0 @@ -49193,302 +49156,302 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg % ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB83_4 ; VI-NEXT: .LBB83_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v16, 0x40c00000 +; VI-NEXT: s_lshl_b32 s4, s31, 16 +; VI-NEXT: v_mov_b32_e32 v0, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s31, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s30, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: s_and_b32 s4, s30, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v16 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s29, 16 +; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s28, 16 +; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s28, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v16 +; VI-NEXT: v_add_f32_e32 v2, s4, v0 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s28, 0xffff0000 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_bfe_u32 v5, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s27, 16 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s27, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v6, 0x400000, v2 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[0:1] -; VI-NEXT: v_cndmask_b32_e64 v0, v3, v4, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: s_and_b32 s5, s26, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s26, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s24, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s26, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s25, 16 +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s25, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s24, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[19:20], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s22, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s24, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s23, 16 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s22, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s20, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s21, 16 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s20, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[21:22], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s18, 0xffff0000 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s5, v16 -; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s19, 16 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 +; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_lshl_b32 s4, s18, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; VI-NEXT: v_bfe_u32 v2, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v0 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; VI-NEXT: v_add_f32_e32 v2, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; VI-NEXT: s_lshl_b32 s4, s17, 16 +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[1:2] +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_cndmask_b32_e32 v23, v3, v5, vcc +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; VI-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc ; VI-NEXT: s_lshl_b32 s4, s16, 16 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_add_f32_e32 v0, s4, v16 +; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v1 +; VI-NEXT: v_add_f32_e32 v1, s4, v0 +; VI-NEXT: v_bfe_u32 v3, v1, 16, 1 +; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 +; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: v_add_f32_e32 v0, s4, v0 +; VI-NEXT: v_lshrrev_b64 v[23:24], 16, v[23:24] +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 -; VI-NEXT: s_and_b32 s6, s16, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v24, v3, v5, vcc ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 -; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v0, v0 -; VI-NEXT: v_add_f32_e32 v0, s6, v16 -; VI-NEXT: v_bfe_u32 v5, v0, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v0 +; VI-NEXT: v_or_b32_e32 v3, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc -; VI-NEXT: s_lshl_b32 s6, s17, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v1, v3, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v5 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v1, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s17, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_bfe_u32 v7, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v3 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v7, v9, vcc -; VI-NEXT: s_lshl_b32 s6, s19, 16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_cndmask_b32_e64 v17, v1, v5, s[4:5] -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: s_and_b32 s6, s19, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v9, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v3 -; VI-NEXT: s_lshl_b32 s6, s21, 16 -; VI-NEXT: v_mov_b32_e32 v1, v17 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_cndmask_b32_e64 v17, v5, v7, s[4:5] -; VI-NEXT: v_add_f32_e32 v5, s6, v16 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: s_and_b32 s6, s21, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v3, v9, v11, vcc -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s6, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 -; VI-NEXT: v_bfe_u32 v11, v5, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v5 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_lshl_b32 s6, s23, 16 -; VI-NEXT: v_mov_b32_e32 v3, v17 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_cndmask_b32_e64 v17, v7, v9, s[4:5] -; VI-NEXT: v_add_f32_e32 v7, s6, v16 -; VI-NEXT: v_cndmask_b32_e32 v5, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: s_and_b32 s6, s23, 0xffff0000 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v13, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v7 -; VI-NEXT: s_lshl_b32 s6, s25, 16 -; VI-NEXT: v_mov_b32_e32 v5, v17 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_cndmask_b32_e64 v17, v9, v11, s[4:5] -; VI-NEXT: v_add_f32_e32 v9, s6, v16 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v7 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 -; VI-NEXT: s_and_b32 s6, s25, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v7, v13, v15, vcc -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s6, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v7 -; VI-NEXT: v_bfe_u32 v15, v9, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v9 -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_mov_b32_e32 v7, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v9 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_cndmask_b32_e32 v9, v15, v17, vcc -; VI-NEXT: s_lshl_b32 s6, s27, 16 -; VI-NEXT: v_cndmask_b32_e64 v17, v11, v13, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 -; VI-NEXT: v_add_f32_e32 v11, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: s_and_b32 s6, s27, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s6, v16 -; VI-NEXT: v_mov_b32_e32 v9, v17 -; VI-NEXT: v_bfe_u32 v17, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v11 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v11 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: s_and_b32 s7, s31, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v11, v17, v18, vcc -; VI-NEXT: v_cndmask_b32_e64 v17, v13, v15, s[4:5] -; VI-NEXT: v_add_f32_e32 v13, s7, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v11 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: s_lshl_b32 s6, s31, 16 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_mov_b32_e32 v11, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s6, v16 -; VI-NEXT: v_cndmask_b32_e32 v15, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v17, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v13 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v15 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: s_lshl_b32 s4, s29, 16 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v19, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v16 -; VI-NEXT: v_bfe_u32 v16, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v16, vcc, v16, v15 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v16 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_cndmask_b32_e32 v15, v16, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v13 -; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[15:16] -; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[17:18] -; VI-NEXT: v_mov_b32_e32 v13, v15 +; VI-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v0 +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[24:25] +; VI-NEXT: v_mov_b32_e32 v1, v23 +; VI-NEXT: v_mov_b32_e32 v3, v22 +; VI-NEXT: v_mov_b32_e32 v5, v21 +; VI-NEXT: v_mov_b32_e32 v7, v20 +; VI-NEXT: v_mov_b32_e32 v9, v19 +; VI-NEXT: v_mov_b32_e32 v11, v18 +; VI-NEXT: v_mov_b32_e32 v13, v17 ; VI-NEXT: v_mov_b32_e32 v15, v16 ; VI-NEXT: s_branch .LBB83_5 ; VI-NEXT: .LBB83_3: @@ -49511,10 +49474,10 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg % ; VI-NEXT: v_mov_b32_e32 v14, s30 ; VI-NEXT: v_mov_b32_e32 v15, s31 ; VI-NEXT: .LBB83_5: ; %end -; VI-NEXT: v_readlane_b32 s30, v20, 0 -; VI-NEXT: v_readlane_b32 s31, v20, 1 +; VI-NEXT: v_readlane_b32 s30, v26, 0 +; VI-NEXT: v_readlane_b32 s31, v26, 1 ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -49551,29 +49514,29 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg % ; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 ; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s4, v0 -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 -; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: s_lshl_b32 s4, s30, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; GFX9-NEXT: v_add_f32_e32 v4, s4, v0 -; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 ; GFX9-NEXT: v_mov_b32_e32 v16, 0xffff -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc +; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v15, v1, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v3 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: s_lshl_b32 s4, s30, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc +; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 +; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 ; GFX9-NEXT: v_lshl_or_b32 v14, v1, 16, v2 ; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 @@ -49837,10 +49800,10 @@ define inreg <8 x double> @bitcast_v32bf16_to_v8f64_scalar(<32 x bfloat> inreg % ; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 ; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v0 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_and_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; GFX9-NEXT: v_and_b32_sdwa v0, v16, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v0, v17, 16, v0 ; GFX9-NEXT: s_branch .LBB83_5 ; GFX9-NEXT: .LBB83_3: ; GFX9-NEXT: s_branch .LBB83_2 @@ -50600,8 +50563,8 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 ; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr62 @@ -50614,8 +50577,8 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; implicit-def: $vgpr49 -; SI-NEXT: ; implicit-def: $vgpr56 -; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr57 +; SI-NEXT: ; implicit-def: $vgpr47 ; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr36 @@ -50673,8 +50636,8 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v55, v4, v3, 24 ; SI-NEXT: v_alignbit_b32 v40, v4, v3, 16 ; SI-NEXT: v_alignbit_b32 v43, v4, v3, 8 -; SI-NEXT: v_alignbit_b32 v47, v2, v1, 24 -; SI-NEXT: v_alignbit_b32 v57, v2, v1, 16 +; SI-NEXT: v_alignbit_b32 v46, v2, v1, 24 +; SI-NEXT: v_alignbit_b32 v56, v2, v1, 16 ; SI-NEXT: s_waitcnt expcnt(6) ; SI-NEXT: v_alignbit_b32 v58, v2, v1, 8 ; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v16 @@ -50693,8 +50656,8 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v8 ; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v8 ; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; SI-NEXT: v_lshrrev_b32_e32 v56, 8, v6 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v6 +; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v6 ; SI-NEXT: s_waitcnt expcnt(5) ; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v4 ; SI-NEXT: s_waitcnt expcnt(4) @@ -50741,8 +50704,8 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v55, v4, v3, 24 ; SI-NEXT: v_alignbit_b32 v40, v4, v3, 16 ; SI-NEXT: v_alignbit_b32 v43, v4, v3, 8 -; SI-NEXT: v_alignbit_b32 v47, v2, v1, 24 -; SI-NEXT: v_alignbit_b32 v57, v2, v1, 16 +; SI-NEXT: v_alignbit_b32 v46, v2, v1, 24 +; SI-NEXT: v_alignbit_b32 v56, v2, v1, 16 ; SI-NEXT: s_waitcnt expcnt(6) ; SI-NEXT: v_alignbit_b32 v58, v2, v1, 8 ; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v16 @@ -50761,8 +50724,8 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v8 ; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v8 ; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; SI-NEXT: v_lshrrev_b32_e32 v56, 8, v6 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v6 +; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v6 ; SI-NEXT: s_waitcnt expcnt(5) ; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v4 ; SI-NEXT: s_waitcnt expcnt(4) @@ -50777,16 +50740,16 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v17, 8, v2 ; SI-NEXT: .LBB84_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] +; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: s_waitcnt expcnt(5) ; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v58 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_and_b32_e32 v57, 0xff, v57 +; SI-NEXT: v_and_b32_e32 v56, 0xff, v56 ; SI-NEXT: v_or_b32_e32 v1, v1, v58 -; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v57 -; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v47 -; SI-NEXT: v_or_b32_e32 v47, v47, v57 +; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v56 +; SI-NEXT: v_lshlrev_b32_e32 v46, 24, v46 +; SI-NEXT: v_or_b32_e32 v46, v46, v56 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v1, v1, v47 +; SI-NEXT: v_or_b32_e32 v1, v1, v46 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v2 @@ -50838,9 +50801,9 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v56 +; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v57 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v46 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v47 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v45 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 @@ -51009,111 +50972,108 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr30 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr29 -; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; implicit-def: $vgpr27 +; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; implicit-def: $vgpr26 +; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: ; implicit-def: $vgpr60 ; VI-NEXT: ; implicit-def: $vgpr59 +; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr45 ; VI-NEXT: ; implicit-def: $vgpr44 ; VI-NEXT: ; implicit-def: $vgpr43 ; VI-NEXT: ; implicit-def: $vgpr42 ; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr40 ; VI-NEXT: ; implicit-def: $vgpr55 ; VI-NEXT: ; implicit-def: $vgpr54 ; VI-NEXT: ; implicit-def: $vgpr53 ; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: ; implicit-def: $vgpr51 ; VI-NEXT: ; implicit-def: $vgpr50 ; VI-NEXT: ; implicit-def: $vgpr49 ; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 ; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr18 ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr27 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr26 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr22 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr30 +; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr17 +; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; kill: killed $vgpr27 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB84_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16 ; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8] -; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v16 ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; VI-NEXT: v_mov_b32_e32 v27, v21 -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4] -; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; VI-NEXT: .LBB84_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB84_4 @@ -51121,161 +51081,158 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; VI-NEXT: v_add_f64 v[15:16], v[15:16], 1.0 ; VI-NEXT: v_add_f64 v[13:14], v[13:14], 1.0 ; VI-NEXT: v_add_f64 v[11:12], v[11:12], 1.0 -; VI-NEXT: v_add_f64 v[3:4], v[3:4], 1.0 -; VI-NEXT: v_add_f64 v[7:8], v[7:8], 1.0 ; VI-NEXT: v_add_f64 v[9:10], v[9:10], 1.0 -; VI-NEXT: v_add_f64 v[1:2], v[1:2], 1.0 +; VI-NEXT: v_add_f64 v[7:8], v[7:8], 1.0 ; VI-NEXT: v_add_f64 v[5:6], v[5:6], 1.0 +; VI-NEXT: v_add_f64 v[3:4], v[3:4], 1.0 +; VI-NEXT: v_add_f64 v[1:2], v[1:2], 1.0 ; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8] -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] -; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v16 -; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15 -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; VI-NEXT: .LBB84_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v21, v30, v23, s4 -; VI-NEXT: v_perm_b32 v1, v1, v31, s4 -; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_or_b32_e32 v1, v1, v21 +; VI-NEXT: v_perm_b32 v24, v26, v24, s4 +; VI-NEXT: v_perm_b32 v1, v1, v25, s4 +; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; VI-NEXT: v_or_b32_e32 v1, v1, v24 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v28, v63, s4 -; VI-NEXT: v_perm_b32 v2, v2, v29, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v2, v63, s4 +; VI-NEXT: v_perm_b32 v2, v62, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v61, v20, s4 -; VI-NEXT: v_perm_b32 v2, v3, v62, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v59, v23, s4 +; VI-NEXT: v_perm_b32 v1, v3, v60, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v59, v58, s4 -; VI-NEXT: v_perm_b32 v1, v4, v60, s4 +; VI-NEXT: v_perm_b32 v2, v57, v56, s4 +; VI-NEXT: v_perm_b32 v1, v4, v58, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v56, v26, s4 -; VI-NEXT: v_perm_b32 v1, v5, v57, s4 +; VI-NEXT: v_perm_b32 v2, v46, v22, s4 +; VI-NEXT: v_perm_b32 v1, v5, v47, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v46, v45, s4 -; VI-NEXT: v_perm_b32 v1, v6, v47, s4 +; VI-NEXT: v_perm_b32 v2, v44, v43, s4 +; VI-NEXT: v_perm_b32 v1, v6, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v43, v25, s4 -; VI-NEXT: v_perm_b32 v1, v7, v44, s4 +; VI-NEXT: v_perm_b32 v2, v41, v21, s4 +; VI-NEXT: v_perm_b32 v1, v7, v42, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v41, v40, s4 -; VI-NEXT: v_perm_b32 v1, v8, v42, s4 +; VI-NEXT: v_perm_b32 v2, v55, v54, s4 +; VI-NEXT: v_perm_b32 v1, v8, v40, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v54, v22, s4 -; VI-NEXT: v_perm_b32 v1, v9, v55, s4 +; VI-NEXT: v_perm_b32 v2, v52, v20, s4 +; VI-NEXT: v_perm_b32 v1, v9, v53, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v52, v51, s4 -; VI-NEXT: v_perm_b32 v1, v10, v53, s4 +; VI-NEXT: v_perm_b32 v2, v50, v49, s4 +; VI-NEXT: v_perm_b32 v1, v10, v51, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v49, v19, s4 -; VI-NEXT: v_perm_b32 v1, v11, v50, s4 +; VI-NEXT: v_perm_b32 v2, v39, v19, s4 +; VI-NEXT: v_perm_b32 v1, v11, v48, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v39, v38, s4 -; VI-NEXT: v_perm_b32 v1, v12, v48, s4 +; VI-NEXT: v_perm_b32 v2, v37, v36, s4 +; VI-NEXT: v_perm_b32 v1, v12, v38, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v36, v18, s4 -; VI-NEXT: v_perm_b32 v1, v13, v37, s4 +; VI-NEXT: v_perm_b32 v2, v34, v18, s4 +; VI-NEXT: v_perm_b32 v1, v13, v35, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v34, v33, s4 -; VI-NEXT: v_perm_b32 v1, v14, v35, s4 +; VI-NEXT: v_perm_b32 v2, v32, v31, s4 +; VI-NEXT: v_perm_b32 v1, v14, v33, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v15, v32, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v17, s4 +; VI-NEXT: v_perm_b32 v2, v29, v17, s4 +; VI-NEXT: v_perm_b32 v1, v15, v30, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v27, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v16, v28, s4 ; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v16, v1, s4 +; VI-NEXT: v_perm_b32 v2, v27, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -51317,111 +51274,108 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr25 +; GFX9-NEXT: ; implicit-def: $vgpr26 ; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr29 -; GFX9-NEXT: ; implicit-def: $vgpr28 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr21 +; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr58 ; GFX9-NEXT: ; implicit-def: $vgpr57 ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr44 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr40 ; GFX9-NEXT: ; implicit-def: $vgpr55 ; GFX9-NEXT: ; implicit-def: $vgpr54 ; GFX9-NEXT: ; implicit-def: $vgpr53 ; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr20 ; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr50 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr27 -; GFX9-NEXT: ; implicit-def: $vgpr25 -; GFX9-NEXT: ; implicit-def: $vgpr26 -; GFX9-NEXT: ; implicit-def: $vgpr23 -; GFX9-NEXT: ; implicit-def: $vgpr20 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr31 +; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr17 +; GFX9-NEXT: ; implicit-def: $vgpr28 +; GFX9-NEXT: ; kill: killed $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB84_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16 ; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16 ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: v_mov_b32_e32 v27, v22 -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB84_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB84_4 @@ -51430,129 +51384,126 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_f64 v[13:14], v[13:14], 1.0 ; GFX9-NEXT: v_add_f64 v[11:12], v[11:12], 1.0 ; GFX9-NEXT: v_add_f64 v[9:10], v[9:10], 1.0 -; GFX9-NEXT: v_add_f64 v[3:4], v[3:4], 1.0 ; GFX9-NEXT: v_add_f64 v[7:8], v[7:8], 1.0 -; GFX9-NEXT: v_add_f64 v[1:2], v[1:2], 1.0 ; GFX9-NEXT: v_add_f64 v[5:6], v[5:6], 1.0 +; GFX9-NEXT: v_add_f64 v[3:4], v[3:4], 1.0 +; GFX9-NEXT: v_add_f64 v[1:2], v[1:2], 1.0 ; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16 ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB84_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v25, s4 +; GFX9-NEXT: v_perm_b32 v24, v26, v24, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 -; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4 +; GFX9-NEXT: v_perm_b32 v1, v2, v63, s4 +; GFX9-NEXT: v_perm_b32 v2, v62, v61, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1 +; GFX9-NEXT: v_perm_b32 v1, v3, v60, s4 +; GFX9-NEXT: v_perm_b32 v2, v59, v23, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4 -; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4 +; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4 +; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4 -; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4 +; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4 +; GFX9-NEXT: v_perm_b32 v2, v46, v22, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4 -; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4 +; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4 +; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4 -; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4 +; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v41, v21, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4 -; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4 +; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4 +; GFX9-NEXT: v_perm_b32 v2, v55, v54, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4 -; GFX9-NEXT: v_perm_b32 v2, v54, v20, s4 +; GFX9-NEXT: v_perm_b32 v1, v9, v53, s4 +; GFX9-NEXT: v_perm_b32 v2, v52, v20, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: v_perm_b32 v1, v10, v53, s4 -; GFX9-NEXT: v_perm_b32 v2, v52, v51, s4 +; GFX9-NEXT: v_perm_b32 v1, v10, v51, s4 +; GFX9-NEXT: v_perm_b32 v2, v50, v49, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_perm_b32 v1, v11, v50, s4 -; GFX9-NEXT: v_perm_b32 v2, v49, v19, s4 +; GFX9-NEXT: v_perm_b32 v1, v11, v48, s4 +; GFX9-NEXT: v_perm_b32 v2, v39, v19, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: v_perm_b32 v1, v12, v48, s4 -; GFX9-NEXT: v_perm_b32 v2, v39, v38, s4 +; GFX9-NEXT: v_perm_b32 v1, v12, v38, s4 +; GFX9-NEXT: v_perm_b32 v2, v37, v36, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_perm_b32 v1, v13, v37, s4 -; GFX9-NEXT: v_perm_b32 v2, v36, v18, s4 +; GFX9-NEXT: v_perm_b32 v1, v13, v35, s4 +; GFX9-NEXT: v_perm_b32 v2, v34, v18, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v1, v14, v35, s4 -; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4 +; GFX9-NEXT: v_perm_b32 v1, v14, v33, s4 +; GFX9-NEXT: v_perm_b32 v2, v32, v31, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4 +; GFX9-NEXT: v_perm_b32 v1, v15, v30, s4 +; GFX9-NEXT: v_perm_b32 v2, v29, v17, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v16, v28, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4 +; GFX9-NEXT: v_perm_b32 v2, v27, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -52040,229 +51991,227 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; SI-NEXT: v_writelane_b32 v40, s83, 25 ; SI-NEXT: v_writelane_b32 v40, s84, 26 ; SI-NEXT: v_writelane_b32 v40, s85, 27 -; SI-NEXT: v_writelane_b32 v40, s86, 28 -; SI-NEXT: v_writelane_b32 v40, s87, 29 -; SI-NEXT: v_writelane_b32 v40, s30, 30 -; SI-NEXT: v_writelane_b32 v40, s31, 31 +; SI-NEXT: v_writelane_b32 v40, s30, 28 +; SI-NEXT: v_writelane_b32 v40, s31, 29 ; SI-NEXT: v_readfirstlane_b32 s4, v3 ; SI-NEXT: v_readfirstlane_b32 s5, v2 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: v_readfirstlane_b32 s4, v1 ; SI-NEXT: s_cbranch_scc0 .LBB85_3 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_lshr_b32 s48, s5, 24 -; SI-NEXT: s_lshr_b32 s49, s5, 16 -; SI-NEXT: s_lshr_b32 s50, s5, 8 -; SI-NEXT: s_lshr_b32 s51, s29, 24 -; SI-NEXT: s_lshr_b32 s52, s29, 16 -; SI-NEXT: s_lshr_b32 s53, s29, 8 -; SI-NEXT: s_lshr_b32 s54, s27, 24 -; SI-NEXT: s_lshr_b32 s55, s27, 16 -; SI-NEXT: s_lshr_b32 s64, s27, 8 -; SI-NEXT: s_lshr_b32 s65, s25, 24 -; SI-NEXT: s_lshr_b32 s66, s25, 16 -; SI-NEXT: s_lshr_b32 s67, s25, 8 -; SI-NEXT: s_lshr_b32 s68, s23, 24 -; SI-NEXT: s_lshr_b32 s69, s23, 16 -; SI-NEXT: s_lshr_b32 s70, s23, 8 -; SI-NEXT: s_lshr_b32 s71, s21, 24 -; SI-NEXT: s_lshr_b32 s80, s21, 16 -; SI-NEXT: s_lshr_b32 s81, s21, 8 -; SI-NEXT: s_lshr_b32 s82, s19, 24 -; SI-NEXT: s_lshr_b32 s83, s19, 16 -; SI-NEXT: s_lshr_b32 s84, s19, 8 -; SI-NEXT: s_lshr_b32 s85, s17, 24 -; SI-NEXT: s_lshr_b32 s86, s17, 16 -; SI-NEXT: s_lshr_b32 s87, s17, 8 +; SI-NEXT: s_lshr_b32 s38, s5, 24 +; SI-NEXT: s_lshr_b32 s39, s5, 16 +; SI-NEXT: s_lshr_b32 s48, s5, 8 +; SI-NEXT: s_lshr_b32 s49, s29, 24 +; SI-NEXT: s_lshr_b32 s50, s29, 16 +; SI-NEXT: s_lshr_b32 s51, s29, 8 +; SI-NEXT: s_lshr_b32 s52, s27, 24 +; SI-NEXT: s_lshr_b32 s53, s27, 16 +; SI-NEXT: s_lshr_b32 s54, s27, 8 +; SI-NEXT: s_lshr_b32 s55, s25, 24 +; SI-NEXT: s_lshr_b32 s64, s25, 16 +; SI-NEXT: s_lshr_b32 s65, s25, 8 +; SI-NEXT: s_lshr_b32 s66, s23, 24 +; SI-NEXT: s_lshr_b32 s67, s23, 16 +; SI-NEXT: s_lshr_b32 s68, s23, 8 +; SI-NEXT: s_lshr_b32 s69, s21, 24 +; SI-NEXT: s_lshr_b32 s70, s21, 16 +; SI-NEXT: s_lshr_b32 s71, s21, 8 +; SI-NEXT: s_lshr_b32 s80, s19, 24 +; SI-NEXT: s_lshr_b32 s81, s19, 16 +; SI-NEXT: s_lshr_b32 s82, s19, 8 +; SI-NEXT: s_lshr_b32 s83, s17, 24 +; SI-NEXT: s_lshr_b32 s84, s17, 16 +; SI-NEXT: s_lshr_b32 s85, s17, 8 ; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 24 -; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 8 -; SI-NEXT: s_lshr_b64 s[46:47], s[28:29], 24 -; SI-NEXT: s_lshr_b64 s[60:61], s[28:29], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[28:29], 8 -; SI-NEXT: s_lshr_b64 s[76:77], s[26:27], 24 -; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[26:27], 8 -; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 24 -; SI-NEXT: s_lshr_b64 s[94:95], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[24:25], 8 -; SI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24 -; SI-NEXT: s_lshr_b64 s[36:37], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[38:39], s[22:23], 8 -; SI-NEXT: s_lshr_b64 s[8:9], s[20:21], 24 -; SI-NEXT: s_lshr_b64 s[12:13], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[40:41], s[20:21], 8 -; SI-NEXT: s_lshr_b64 s[42:43], s[18:19], 24 -; SI-NEXT: s_lshr_b64 s[44:45], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[18:19], 8 -; SI-NEXT: s_lshr_b64 s[58:59], s[16:17], 24 -; SI-NEXT: s_lshr_b64 s[62:63], s[16:17], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[16:17], 8 +; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 8 +; SI-NEXT: s_lshr_b64 s[12:13], s[28:29], 24 +; SI-NEXT: s_lshr_b64 s[14:15], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[28:29], 8 +; SI-NEXT: s_lshr_b64 s[42:43], s[26:27], 24 +; SI-NEXT: s_lshr_b64 s[44:45], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 8 +; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 24 +; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 8 +; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 24 +; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 8 +; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 24 +; SI-NEXT: s_lshr_b64 s[78:79], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 8 +; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 24 +; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 8 +; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 24 +; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[36:37], s[16:17], 8 ; SI-NEXT: s_cbranch_execnz .LBB85_4 ; SI-NEXT: .LBB85_2: ; %cmp.true -; SI-NEXT: v_add_f64 v[28:29], s[18:19], 1.0 -; SI-NEXT: v_add_f64 v[5:6], s[26:27], 1.0 ; SI-NEXT: v_add_f64 v[13:14], s[22:23], 1.0 -; SI-NEXT: v_add_f64 v[3:4], s[28:29], 1.0 -; SI-NEXT: v_lshr_b64 v[48:49], v[28:29], 24 +; SI-NEXT: v_add_f64 v[26:27], s[18:19], 1.0 +; SI-NEXT: v_add_f64 v[5:6], s[26:27], 1.0 +; SI-NEXT: v_lshr_b64 v[33:34], v[13:14], 24 +; SI-NEXT: v_lshr_b64 v[48:49], v[26:27], 24 ; SI-NEXT: v_add_f64 v[1:2], s[4:5], 1.0 -; SI-NEXT: v_add_f64 v[7:8], s[24:25], 1.0 -; SI-NEXT: v_add_f64 v[20:21], s[20:21], 1.0 -; SI-NEXT: v_add_f64 v[32:33], s[16:17], 1.0 -; SI-NEXT: v_lshr_b64 v[22:23], v[5:6], 16 +; SI-NEXT: v_add_f64 v[3:4], s[28:29], 1.0 +; SI-NEXT: v_add_f64 v[19:20], s[20:21], 1.0 +; SI-NEXT: v_add_f64 v[31:32], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[34:35], v[13:14], 16 -; SI-NEXT: v_lshr_b64 v[49:50], v[28:29], 16 -; SI-NEXT: v_lshr_b64 v[15:16], v[3:4], 24 -; SI-NEXT: v_lshr_b64 v[23:24], v[5:6], 8 +; SI-NEXT: v_lshr_b64 v[49:50], v[26:27], 16 +; SI-NEXT: v_add_f64 v[7:8], s[24:25], 1.0 +; SI-NEXT: v_lshr_b64 v[21:22], v[5:6], 24 ; SI-NEXT: v_lshr_b64 v[35:36], v[13:14], 8 -; SI-NEXT: v_lshr_b64 v[50:51], v[28:29], 8 +; SI-NEXT: v_lshr_b64 v[50:51], v[26:27], 8 ; SI-NEXT: v_lshr_b64 v[9:10], v[1:2], 24 -; SI-NEXT: v_lshr_b64 v[16:17], v[3:4], 16 -; SI-NEXT: v_lshr_b64 v[24:25], v[7:8], 24 -; SI-NEXT: v_lshr_b64 v[36:37], v[20:21], 24 -; SI-NEXT: v_lshr_b64 v[51:52], v[32:33], 24 +; SI-NEXT: v_lshr_b64 v[15:16], v[3:4], 24 +; SI-NEXT: v_lshr_b64 v[22:23], v[5:6], 16 +; SI-NEXT: v_lshr_b64 v[36:37], v[19:20], 24 +; SI-NEXT: v_lshr_b64 v[51:52], v[31:32], 24 ; SI-NEXT: v_lshr_b64 v[10:11], v[1:2], 16 -; SI-NEXT: v_lshr_b64 v[17:18], v[3:4], 8 -; SI-NEXT: v_lshr_b64 v[25:26], v[7:8], 16 -; SI-NEXT: v_lshr_b64 v[37:38], v[20:21], 16 -; SI-NEXT: v_lshr_b64 v[52:53], v[32:33], 16 -; SI-NEXT: v_readfirstlane_b32 s17, v33 -; SI-NEXT: v_readfirstlane_b32 s19, v29 -; SI-NEXT: v_readfirstlane_b32 s21, v21 +; SI-NEXT: v_lshr_b64 v[16:17], v[3:4], 16 +; SI-NEXT: v_lshr_b64 v[23:24], v[5:6], 8 +; SI-NEXT: v_lshr_b64 v[28:29], v[7:8], 16 +; SI-NEXT: v_lshr_b64 v[37:38], v[19:20], 16 +; SI-NEXT: v_lshr_b64 v[52:53], v[31:32], 16 +; SI-NEXT: v_readfirstlane_b32 s17, v32 +; SI-NEXT: v_readfirstlane_b32 s19, v27 +; SI-NEXT: v_readfirstlane_b32 s21, v20 ; SI-NEXT: v_readfirstlane_b32 s23, v14 ; SI-NEXT: v_readfirstlane_b32 s25, v8 ; SI-NEXT: v_readfirstlane_b32 s27, v6 ; SI-NEXT: v_readfirstlane_b32 s29, v4 ; SI-NEXT: v_readfirstlane_b32 s5, v2 ; SI-NEXT: v_lshr_b64 v[11:12], v[1:2], 8 -; SI-NEXT: v_lshr_b64 v[18:19], v[5:6], 24 -; SI-NEXT: v_lshr_b64 v[26:27], v[7:8], 8 -; SI-NEXT: v_lshr_b64 v[30:31], v[13:14], 24 -; SI-NEXT: v_lshr_b64 v[38:39], v[20:21], 8 -; SI-NEXT: v_lshr_b64 v[53:54], v[32:33], 8 -; SI-NEXT: s_lshr_b32 s48, s5, 24 -; SI-NEXT: s_lshr_b32 s49, s5, 16 -; SI-NEXT: s_lshr_b32 s50, s5, 8 -; SI-NEXT: s_lshr_b32 s51, s29, 24 -; SI-NEXT: s_lshr_b32 s52, s29, 16 -; SI-NEXT: s_lshr_b32 s53, s29, 8 -; SI-NEXT: s_lshr_b32 s54, s27, 24 -; SI-NEXT: s_lshr_b32 s55, s27, 16 -; SI-NEXT: s_lshr_b32 s64, s27, 8 -; SI-NEXT: s_lshr_b32 s65, s25, 24 -; SI-NEXT: s_lshr_b32 s66, s25, 16 -; SI-NEXT: s_lshr_b32 s67, s25, 8 -; SI-NEXT: s_lshr_b32 s68, s23, 24 -; SI-NEXT: s_lshr_b32 s69, s23, 16 -; SI-NEXT: s_lshr_b32 s70, s23, 8 -; SI-NEXT: s_lshr_b32 s71, s21, 24 -; SI-NEXT: s_lshr_b32 s80, s21, 16 -; SI-NEXT: s_lshr_b32 s81, s21, 8 -; SI-NEXT: s_lshr_b32 s82, s19, 24 -; SI-NEXT: s_lshr_b32 s83, s19, 16 -; SI-NEXT: s_lshr_b32 s84, s19, 8 -; SI-NEXT: s_lshr_b32 s85, s17, 24 -; SI-NEXT: s_lshr_b32 s86, s17, 16 -; SI-NEXT: s_lshr_b32 s87, s17, 8 +; SI-NEXT: v_lshr_b64 v[17:18], v[3:4], 8 +; SI-NEXT: v_lshr_b64 v[24:25], v[7:8], 24 +; SI-NEXT: v_lshr_b64 v[29:30], v[7:8], 8 +; SI-NEXT: v_lshr_b64 v[38:39], v[19:20], 8 +; SI-NEXT: v_lshr_b64 v[53:54], v[31:32], 8 +; SI-NEXT: s_lshr_b32 s38, s5, 24 +; SI-NEXT: s_lshr_b32 s39, s5, 16 +; SI-NEXT: s_lshr_b32 s48, s5, 8 +; SI-NEXT: s_lshr_b32 s49, s29, 24 +; SI-NEXT: s_lshr_b32 s50, s29, 16 +; SI-NEXT: s_lshr_b32 s51, s29, 8 +; SI-NEXT: s_lshr_b32 s52, s27, 24 +; SI-NEXT: s_lshr_b32 s53, s27, 16 +; SI-NEXT: s_lshr_b32 s54, s27, 8 +; SI-NEXT: s_lshr_b32 s55, s25, 24 +; SI-NEXT: s_lshr_b32 s64, s25, 16 +; SI-NEXT: s_lshr_b32 s65, s25, 8 +; SI-NEXT: s_lshr_b32 s66, s23, 24 +; SI-NEXT: s_lshr_b32 s67, s23, 16 +; SI-NEXT: s_lshr_b32 s68, s23, 8 +; SI-NEXT: s_lshr_b32 s69, s21, 24 +; SI-NEXT: s_lshr_b32 s70, s21, 16 +; SI-NEXT: s_lshr_b32 s71, s21, 8 +; SI-NEXT: s_lshr_b32 s80, s19, 24 +; SI-NEXT: s_lshr_b32 s81, s19, 16 +; SI-NEXT: s_lshr_b32 s82, s19, 8 +; SI-NEXT: s_lshr_b32 s83, s17, 24 +; SI-NEXT: s_lshr_b32 s84, s17, 16 +; SI-NEXT: s_lshr_b32 s85, s17, 8 ; SI-NEXT: s_branch .LBB85_5 ; SI-NEXT: .LBB85_3: -; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr87 -; SI-NEXT: ; implicit-def: $sgpr86 +; SI-NEXT: ; implicit-def: $sgpr36 +; SI-NEXT: ; implicit-def: $sgpr34 +; SI-NEXT: ; implicit-def: $sgpr30 ; SI-NEXT: ; implicit-def: $sgpr85 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr42 ; SI-NEXT: ; implicit-def: $sgpr84 ; SI-NEXT: ; implicit-def: $sgpr83 +; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr90 ; SI-NEXT: ; implicit-def: $sgpr82 -; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr81 ; SI-NEXT: ; implicit-def: $sgpr80 +; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr71 ; SI-NEXT: ; implicit-def: $sgpr70 ; SI-NEXT: ; implicit-def: $sgpr69 +; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr68 ; SI-NEXT: ; implicit-def: $sgpr67 ; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr65 ; SI-NEXT: ; implicit-def: $sgpr64 ; SI-NEXT: ; implicit-def: $sgpr55 +; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr42 ; SI-NEXT: ; implicit-def: $sgpr54 ; SI-NEXT: ; implicit-def: $sgpr53 ; SI-NEXT: ; implicit-def: $sgpr52 +; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr12 ; SI-NEXT: ; implicit-def: $sgpr51 ; SI-NEXT: ; implicit-def: $sgpr50 ; SI-NEXT: ; implicit-def: $sgpr49 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr30 -; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr92 -; SI-NEXT: ; implicit-def: $sgpr88 -; SI-NEXT: ; implicit-def: $sgpr78 -; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr48 +; SI-NEXT: ; implicit-def: $sgpr39 +; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: s_branch .LBB85_2 ; SI-NEXT: .LBB85_4: -; SI-NEXT: v_mov_b32_e32 v32, s16 -; SI-NEXT: v_mov_b32_e32 v28, s18 -; SI-NEXT: v_mov_b32_e32 v20, s20 +; SI-NEXT: v_mov_b32_e32 v31, s16 +; SI-NEXT: v_mov_b32_e32 v26, s18 +; SI-NEXT: v_mov_b32_e32 v19, s20 ; SI-NEXT: v_mov_b32_e32 v13, s22 ; SI-NEXT: v_mov_b32_e32 v7, s24 ; SI-NEXT: v_mov_b32_e32 v5, s26 ; SI-NEXT: v_mov_b32_e32 v3, s28 ; SI-NEXT: v_mov_b32_e32 v1, s4 -; SI-NEXT: v_mov_b32_e32 v53, s74 -; SI-NEXT: v_mov_b32_e32 v52, s62 -; SI-NEXT: v_mov_b32_e32 v51, s58 -; SI-NEXT: v_mov_b32_e32 v50, s56 -; SI-NEXT: v_mov_b32_e32 v49, s44 -; SI-NEXT: v_mov_b32_e32 v48, s42 -; SI-NEXT: v_mov_b32_e32 v38, s40 -; SI-NEXT: v_mov_b32_e32 v37, s12 -; SI-NEXT: v_mov_b32_e32 v36, s8 -; SI-NEXT: v_mov_b32_e32 v35, s38 -; SI-NEXT: v_mov_b32_e32 v34, s36 -; SI-NEXT: v_mov_b32_e32 v30, s34 -; SI-NEXT: v_mov_b32_e32 v26, s30 -; SI-NEXT: v_mov_b32_e32 v25, s94 -; SI-NEXT: v_mov_b32_e32 v24, s92 -; SI-NEXT: v_mov_b32_e32 v23, s88 -; SI-NEXT: v_mov_b32_e32 v22, s78 -; SI-NEXT: v_mov_b32_e32 v18, s76 -; SI-NEXT: v_mov_b32_e32 v17, s72 -; SI-NEXT: v_mov_b32_e32 v16, s60 -; SI-NEXT: v_mov_b32_e32 v15, s46 -; SI-NEXT: v_mov_b32_e32 v11, s14 -; SI-NEXT: v_mov_b32_e32 v10, s10 +; SI-NEXT: v_mov_b32_e32 v53, s36 +; SI-NEXT: v_mov_b32_e32 v52, s34 +; SI-NEXT: v_mov_b32_e32 v51, s30 +; SI-NEXT: v_mov_b32_e32 v50, s94 +; SI-NEXT: v_mov_b32_e32 v49, s92 +; SI-NEXT: v_mov_b32_e32 v48, s90 +; SI-NEXT: v_mov_b32_e32 v38, s88 +; SI-NEXT: v_mov_b32_e32 v37, s78 +; SI-NEXT: v_mov_b32_e32 v36, s76 +; SI-NEXT: v_mov_b32_e32 v35, s74 +; SI-NEXT: v_mov_b32_e32 v34, s72 +; SI-NEXT: v_mov_b32_e32 v33, s62 +; SI-NEXT: v_mov_b32_e32 v29, s60 +; SI-NEXT: v_mov_b32_e32 v28, s58 +; SI-NEXT: v_mov_b32_e32 v24, s56 +; SI-NEXT: v_mov_b32_e32 v23, s46 +; SI-NEXT: v_mov_b32_e32 v22, s44 +; SI-NEXT: v_mov_b32_e32 v21, s42 +; SI-NEXT: v_mov_b32_e32 v17, s40 +; SI-NEXT: v_mov_b32_e32 v16, s14 +; SI-NEXT: v_mov_b32_e32 v15, s12 +; SI-NEXT: v_mov_b32_e32 v11, s10 +; SI-NEXT: v_mov_b32_e32 v10, s8 ; SI-NEXT: v_mov_b32_e32 v9, s6 ; SI-NEXT: .LBB85_5: ; %end -; SI-NEXT: v_and_b32_e32 v2, 0xff, v32 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v31 ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v53 ; SI-NEXT: s_and_b32 s4, s17, 0xff -; SI-NEXT: s_lshl_b32 s6, s87, 8 +; SI-NEXT: s_lshl_b32 s6, s85, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v52 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_and_b32 s6, s86, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v51 +; SI-NEXT: s_and_b32 s6, s84, 0xff ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v51 ; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s7, s85, 24 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: s_lshl_b32 s7, s83, 24 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s7, s6 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -52272,21 +52221,21 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0 ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen -; SI-NEXT: v_and_b32_e32 v2, 0xff, v28 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v26 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v50 ; SI-NEXT: s_and_b32 s4, s19, 0xff -; SI-NEXT: s_lshl_b32 s6, s84, 8 +; SI-NEXT: s_lshl_b32 s6, s82, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v49 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_and_b32 s6, s83, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v48 +; SI-NEXT: s_and_b32 s6, s81, 0xff ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v48 ; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s7, s82, 24 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: s_lshl_b32 s7, s80, 24 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s7, s6 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -52297,21 +52246,21 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0 ; SI-NEXT: v_mov_b32_e32 v4, s4 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen -; SI-NEXT: v_and_b32_e32 v2, 0xff, v20 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v19 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v38 ; SI-NEXT: s_and_b32 s4, s21, 0xff -; SI-NEXT: s_lshl_b32 s6, s81, 8 +; SI-NEXT: s_lshl_b32 s6, s71, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v37 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_and_b32 s6, s80, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v36 +; SI-NEXT: s_and_b32 s6, s70, 0xff ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v36 ; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s7, s71, 24 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: s_lshl_b32 s7, s69, 24 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s7, s6 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -52326,17 +52275,17 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v35 ; SI-NEXT: s_and_b32 s4, s23, 0xff -; SI-NEXT: s_lshl_b32 s6, s70, 8 +; SI-NEXT: s_lshl_b32 s6, s68, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v34 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_and_b32 s6, s69, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v30 +; SI-NEXT: s_and_b32 s6, s67, 0xff ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v33 ; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s7, s68, 24 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: s_lshl_b32 s7, s66, 24 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s7, s6 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 @@ -52349,17 +52298,17 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen ; SI-NEXT: v_and_b32_e32 v2, 0xff, v7 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v26 +; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v29 ; SI-NEXT: s_and_b32 s4, s25, 0xff -; SI-NEXT: s_lshl_b32 s6, s67, 8 +; SI-NEXT: s_lshl_b32 s6, s65, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xff, v25 +; SI-NEXT: v_and_b32_e32 v4, 0xff, v28 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_and_b32 s6, s66, 0xff +; SI-NEXT: s_and_b32 s6, s64, 0xff ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v24 ; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s7, s65, 24 +; SI-NEXT: s_lshl_b32 s7, s55, 24 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff @@ -52376,15 +52325,15 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v23 ; SI-NEXT: s_and_b32 s4, s27, 0xff -; SI-NEXT: s_lshl_b32 s6, s64, 8 +; SI-NEXT: s_lshl_b32 s6, s54, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v22 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_and_b32 s6, s55, 0xff +; SI-NEXT: s_and_b32 s6, s53, 0xff ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v18 +; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v21 ; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s7, s54, 24 +; SI-NEXT: s_lshl_b32 s7, s52, 24 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v4, v5, v4 ; SI-NEXT: s_and_b32 s4, s4, 0xffff @@ -52400,16 +52349,16 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v17 ; SI-NEXT: s_and_b32 s4, s29, 0xff -; SI-NEXT: s_lshl_b32 s6, s53, 8 +; SI-NEXT: s_lshl_b32 s6, s51, 8 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v16 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_and_b32 s6, s52, 0xff +; SI-NEXT: s_and_b32 s6, s50, 0xff ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v15 ; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s7, s51, 24 +; SI-NEXT: s_lshl_b32 s7, s49, 24 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: s_and_b32 s4, s4, 0xffff @@ -52425,16 +52374,16 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v11 ; SI-NEXT: s_and_b32 s4, s5, 0xff -; SI-NEXT: s_lshl_b32 s5, s50, 8 +; SI-NEXT: s_lshl_b32 s5, s48, 8 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v10 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s49, 0xff +; SI-NEXT: s_and_b32 s5, s39, 0xff ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v9 ; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s6, s48, 24 +; SI-NEXT: s_lshl_b32 s6, s38, 24 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 ; SI-NEXT: s_and_b32 s4, s4, 0xffff @@ -52446,11 +52395,9 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v1, s4 -; SI-NEXT: v_readlane_b32 s30, v40, 30 +; SI-NEXT: v_readlane_b32 s30, v40, 28 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; SI-NEXT: v_readlane_b32 s31, v40, 31 -; SI-NEXT: v_readlane_b32 s87, v40, 29 -; SI-NEXT: v_readlane_b32 s86, v40, 28 +; SI-NEXT: v_readlane_b32 s31, v40, 29 ; SI-NEXT: v_readlane_b32 s85, v40, 27 ; SI-NEXT: v_readlane_b32 s84, v40, 26 ; SI-NEXT: v_readlane_b32 s83, v40, 25 @@ -52489,7 +52436,7 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -52582,68 +52529,65 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; VI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24 ; VI-NEXT: s_cbranch_execnz .LBB85_4 ; VI-NEXT: .LBB85_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[9:10], s[4:5], 1.0 -; VI-NEXT: v_add_f64 v[1:2], s[28:29], 1.0 -; VI-NEXT: v_add_f64 v[5:6], s[24:25], 1.0 -; VI-NEXT: v_add_f64 v[7:8], s[22:23], 1.0 -; VI-NEXT: v_add_f64 v[11:12], s[20:21], 1.0 -; VI-NEXT: v_add_f64 v[3:4], s[26:27], 1.0 -; VI-NEXT: v_add_f64 v[13:14], s[18:19], 1.0 -; VI-NEXT: v_add_f64 v[15:16], s[16:17], 1.0 -; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[9:10] -; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v10 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2] -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6] -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] -; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4] -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[11:12] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[13:14] -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[15:16] -; VI-NEXT: v_lshrrev_b32_e32 v25, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v41, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v16 -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v16 -; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v16 -; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v15 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v15 +; VI-NEXT: v_add_f64 v[7:8], s[24:25], 1.0 +; VI-NEXT: v_add_f64 v[1:2], s[4:5], 1.0 +; VI-NEXT: v_add_f64 v[9:10], s[22:23], 1.0 +; VI-NEXT: v_add_f64 v[13:14], s[20:21], 1.0 +; VI-NEXT: v_add_f64 v[17:18], s[18:19], 1.0 +; VI-NEXT: v_add_f64 v[3:4], s[28:29], 1.0 +; VI-NEXT: v_add_f64 v[5:6], s[26:27], 1.0 +; VI-NEXT: v_add_f64 v[21:22], s[16:17], 1.0 +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[1:2] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[9:10] +; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[13:14] +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[17:18] +; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[5:6] +; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[21:22] +; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v16, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2 +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v1 +; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v41, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v18 +; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v18 +; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v18 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v17 +; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v22 +; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v22 +; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v22 +; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v21 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v21 ; VI-NEXT: s_branch .LBB85_5 ; VI-NEXT: .LBB85_3: ; VI-NEXT: ; implicit-def: $sgpr66 @@ -52696,28 +52640,28 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; VI-NEXT: ; implicit-def: $sgpr35 ; VI-NEXT: s_branch .LBB85_2 ; VI-NEXT: .LBB85_4: -; VI-NEXT: v_mov_b32_e32 v26, s35 -; VI-NEXT: v_mov_b32_e32 v25, s40 -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v25, s42 -; VI-NEXT: v_mov_b32_e32 v15, s16 -; VI-NEXT: v_mov_b32_e32 v13, s18 -; VI-NEXT: v_mov_b32_e32 v11, s20 -; VI-NEXT: v_mov_b32_e32 v7, s22 -; VI-NEXT: v_mov_b32_e32 v5, s24 -; VI-NEXT: v_mov_b32_e32 v3, s26 -; VI-NEXT: v_mov_b32_e32 v1, s28 -; VI-NEXT: v_mov_b32_e32 v9, s4 -; VI-NEXT: v_mov_b32_e32 v10, s5 -; VI-NEXT: v_mov_b32_e32 v2, s29 -; VI-NEXT: v_mov_b32_e32 v4, s27 -; VI-NEXT: v_mov_b32_e32 v6, s25 -; VI-NEXT: v_mov_b32_e32 v8, s23 -; VI-NEXT: v_mov_b32_e32 v12, s21 -; VI-NEXT: v_mov_b32_e32 v14, s19 -; VI-NEXT: v_mov_b32_e32 v16, s17 -; VI-NEXT: v_mov_b32_e32 v57, s67 +; VI-NEXT: v_mov_b32_e32 v11, s37 +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v11, s44 +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v21, s16 +; VI-NEXT: v_mov_b32_e32 v17, s18 +; VI-NEXT: v_mov_b32_e32 v13, s20 +; VI-NEXT: v_mov_b32_e32 v9, s22 +; VI-NEXT: v_mov_b32_e32 v7, s24 +; VI-NEXT: v_mov_b32_e32 v5, s26 +; VI-NEXT: v_mov_b32_e32 v3, s28 +; VI-NEXT: v_mov_b32_e32 v1, s4 +; VI-NEXT: v_mov_b32_e32 v2, s5 +; VI-NEXT: v_mov_b32_e32 v4, s29 +; VI-NEXT: v_mov_b32_e32 v6, s27 +; VI-NEXT: v_mov_b32_e32 v8, s25 +; VI-NEXT: v_mov_b32_e32 v10, s23 +; VI-NEXT: v_mov_b32_e32 v14, s21 +; VI-NEXT: v_mov_b32_e32 v18, s19 +; VI-NEXT: v_mov_b32_e32 v22, s17 +; VI-NEXT: v_mov_b32_e32 v56, s67 ; VI-NEXT: v_mov_b32_e32 v58, s66 ; VI-NEXT: v_mov_b32_e32 v44, s65 ; VI-NEXT: v_mov_b32_e32 v45, s64 @@ -52731,9 +52675,16 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v36, s48 ; VI-NEXT: v_mov_b32_e32 v30, s39 ; VI-NEXT: v_mov_b32_e32 v31, s38 -; VI-NEXT: v_mov_b32_e32 v19, s37 ; VI-NEXT: v_mov_b32_e32 v28, s36 -; VI-NEXT: v_mov_b32_e32 v27, s34 +; VI-NEXT: v_mov_b32_e32 v27, s6 +; VI-NEXT: v_mov_b32_e32 v26, s8 +; VI-NEXT: v_mov_b32_e32 v25, s10 +; VI-NEXT: v_mov_b32_e32 v24, s12 +; VI-NEXT: v_mov_b32_e32 v23, s14 +; VI-NEXT: v_mov_b32_e32 v19, s40 +; VI-NEXT: v_mov_b32_e32 v15, s42 +; VI-NEXT: v_mov_b32_e32 v16, s35 +; VI-NEXT: v_mov_b32_e32 v20, s34 ; VI-NEXT: v_mov_b32_e32 v29, s31 ; VI-NEXT: v_mov_b32_e32 v32, s30 ; VI-NEXT: v_mov_b32_e32 v33, s91 @@ -52749,89 +52700,102 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v43, s73 ; VI-NEXT: v_mov_b32_e32 v46, s72 ; VI-NEXT: v_mov_b32_e32 v47, s63 -; VI-NEXT: v_mov_b32_e32 v56, s62 +; VI-NEXT: v_mov_b32_e32 v57, s62 ; VI-NEXT: v_mov_b32_e32 v59, s61 ; VI-NEXT: v_mov_b32_e32 v60, s60 ; VI-NEXT: v_mov_b32_e32 v61, s59 ; VI-NEXT: v_mov_b32_e32 v62, s58 -; VI-NEXT: v_mov_b32_e32 v17, s57 -; VI-NEXT: v_mov_b32_e32 v18, s56 -; VI-NEXT: v_mov_b32_e32 v24, s6 -; VI-NEXT: v_mov_b32_e32 v23, s8 -; VI-NEXT: v_mov_b32_e32 v22, s10 -; VI-NEXT: v_mov_b32_e32 v21, s12 -; VI-NEXT: v_mov_b32_e32 v20, s14 -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v25, s44 -; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v25, s35 +; VI-NEXT: v_mov_b32_e32 v11, s57 +; VI-NEXT: v_mov_b32_e32 v12, s56 ; VI-NEXT: .LBB85_5: ; %end ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v24, v57, v24, s4 -; VI-NEXT: v_perm_b32 v15, v15, v58, s4 -; VI-NEXT: v_perm_b32 v16, v16, v18, s4 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v24 -; VI-NEXT: v_or_b32_e32 v15, v15, v18 -; VI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v15, v17, v62, s4 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: v_or_b32_e32 v15, v16, v15 -; VI-NEXT: v_add_u32_e32 v16, vcc, 4, v0 -; VI-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v15, v44, v23, s4 -; VI-NEXT: v_perm_b32 v13, v13, v45, s4 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; VI-NEXT: v_or_b32_e32 v13, v13, v15 -; VI-NEXT: v_add_u32_e32 v15, vcc, 8, v0 -; VI-NEXT: buffer_store_dword v13, v15, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v13, v14, v61, s4 -; VI-NEXT: v_perm_b32 v14, v60, v59, s4 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: v_add_u32_e32 v14, vcc, 12, v0 -; VI-NEXT: buffer_store_dword v13, v14, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v13, v55, v22, s4 -; VI-NEXT: v_perm_b32 v11, v11, v40, s4 -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_or_b32_e32 v11, v11, v13 -; VI-NEXT: v_add_u32_e32 v13, vcc, 16, v0 -; VI-NEXT: buffer_store_dword v11, v13, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v11, v12, v56, s4 +; VI-NEXT: v_perm_b32 v27, v56, v27, s4 +; VI-NEXT: v_perm_b32 v11, v11, v62, s4 +; VI-NEXT: v_perm_b32 v21, v21, v58, s4 +; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; VI-NEXT: v_perm_b32 v12, v22, v12, s4 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; VI-NEXT: v_or_b32_e32 v21, v21, v27 +; VI-NEXT: v_or_b32_e32 v11, v12, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 4, v0 +; VI-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen +; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v12, v44, v26, s4 +; VI-NEXT: v_perm_b32 v11, v17, v45, s4 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_or_b32_e32 v11, v11, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 8, v0 +; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v12, v60, v59, s4 +; VI-NEXT: v_perm_b32 v11, v18, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_or_b32_e32 v11, v11, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 12, v0 +; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v12, v55, v25, s4 +; VI-NEXT: v_perm_b32 v11, v13, v40, s4 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: v_or_b32_e32 v11, v11, v12 +; VI-NEXT: v_add_u32_e32 v12, vcc, 16, v0 +; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen ; VI-NEXT: v_perm_b32 v12, v47, v46, s4 +; VI-NEXT: v_perm_b32 v11, v14, v57, s4 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 ; VI-NEXT: v_add_u32_e32 v12, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v11, v50, v21, s4 -; VI-NEXT: v_perm_b32 v7, v7, v52, s4 +; VI-NEXT: v_perm_b32 v11, v50, v24, s4 +; VI-NEXT: v_perm_b32 v9, v9, v52, s4 ; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; VI-NEXT: v_or_b32_e32 v7, v7, v11 +; VI-NEXT: v_or_b32_e32 v9, v9, v11 ; VI-NEXT: v_add_u32_e32 v11, vcc, 24, v0 -; VI-NEXT: buffer_store_dword v7, v11, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v7, v8, v43, s4 -; VI-NEXT: v_perm_b32 v8, v42, v41, s4 +; VI-NEXT: buffer_store_dword v9, v11, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v9, v10, v43, s4 +; VI-NEXT: v_perm_b32 v10, v42, v41, s4 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; VI-NEXT: v_or_b32_e32 v9, v9, v10 +; VI-NEXT: v_add_u32_e32 v10, vcc, 28, v0 +; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v9, v39, v23, s4 +; VI-NEXT: v_perm_b32 v7, v7, v49, s4 +; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; VI-NEXT: v_or_b32_e32 v7, v7, v9 +; VI-NEXT: v_add_u32_e32 v9, vcc, 32, v0 +; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v7, v8, v54, s4 +; VI-NEXT: v_perm_b32 v8, v53, v51, s4 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_add_u32_e32 v8, vcc, 28, v0 +; VI-NEXT: v_add_u32_e32 v8, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v7, v39, v20, s4 -; VI-NEXT: v_perm_b32 v5, v5, v49, s4 +; VI-NEXT: v_perm_b32 v7, v35, v19, s4 +; VI-NEXT: v_perm_b32 v5, v5, v36, s4 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v5, v5, v7 -; VI-NEXT: v_add_u32_e32 v7, vcc, 32, v0 +; VI-NEXT: v_add_u32_e32 v7, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v5, v6, v54, s4 -; VI-NEXT: v_perm_b32 v6, v53, v51, s4 +; VI-NEXT: v_perm_b32 v5, v6, v48, s4 +; VI-NEXT: v_perm_b32 v6, v38, v37, s4 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_e32 v5, v5, v6 -; VI-NEXT: v_add_u32_e32 v6, vcc, 36, v0 +; VI-NEXT: v_add_u32_e32 v6, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v3, v3, v36, s4 -; VI-NEXT: v_perm_b32 v1, v1, v31, s4 +; VI-NEXT: v_perm_b32 v5, v30, v15, s4 +; VI-NEXT: v_perm_b32 v3, v3, v31, s4 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; VI-NEXT: v_or_b32_e32 v3, v3, v5 +; VI-NEXT: v_add_u32_e32 v5, vcc, 48, v0 +; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen +; VI-NEXT: v_perm_b32 v3, v4, v34, s4 +; VI-NEXT: v_perm_b32 v4, v33, v32, s4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; VI-NEXT: v_or_b32_e32 v3, v3, v4 +; VI-NEXT: v_add_u32_e32 v4, vcc, 52, v0 +; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v1, v28, s4 ; VI-NEXT: v_readlane_b32 s30, v63, 18 ; VI-NEXT: v_readlane_b32 s31, v63, 19 ; VI-NEXT: v_readlane_b32 s67, v63, 17 @@ -52852,43 +52816,14 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; VI-NEXT: v_readlane_b32 s36, v63, 2 ; VI-NEXT: v_readlane_b32 s35, v63, 1 ; VI-NEXT: v_readlane_b32 s34, v63, 0 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v5, v35, v5, s4 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_or_b32_e32 v3, v3, v5 -; VI-NEXT: v_add_u32_e32 v5, vcc, 40, v0 -; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v3, v4, v48, s4 -; VI-NEXT: v_perm_b32 v4, v38, v37, s4 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_or_b32_e32 v3, v3, v4 -; VI-NEXT: v_add_u32_e32 v4, vcc, 44, v0 -; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v3, v30, v3, s4 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v3, v4, v3, s4 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v1, v1, v3 -; VI-NEXT: v_add_u32_e32 v3, vcc, 48, v0 +; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v2, v34, s4 -; VI-NEXT: v_perm_b32 v2, v33, v32, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v9, v28, s4 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v19, v2, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 -; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 -; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v27, v25, s4 -; VI-NEXT: v_perm_b32 v1, v10, v29, s4 +; VI-NEXT: v_perm_b32 v1, v2, v29, s4 +; VI-NEXT: v_perm_b32 v2, v20, v16, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 @@ -52909,7 +52844,7 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; VI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -52918,7 +52853,7 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -53007,71 +52942,66 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB85_4 ; GFX9-NEXT: .LBB85_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[11:12], s[4:5], 1.0 -; GFX9-NEXT: v_add_f64 v[1:2], s[28:29], 1.0 -; GFX9-NEXT: v_add_f64 v[5:6], s[24:25], 1.0 -; GFX9-NEXT: v_add_f64 v[7:8], s[22:23], 1.0 -; GFX9-NEXT: v_add_f64 v[9:10], s[20:21], 1.0 -; GFX9-NEXT: v_add_f64 v[3:4], s[26:27], 1.0 -; GFX9-NEXT: v_add_f64 v[13:14], s[18:19], 1.0 -; GFX9-NEXT: v_add_f64 v[15:16], s[16:17], 1.0 -; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b32_e32 v19, 24, v12 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_add_f64 v[5:6], s[26:27], 1.0 +; GFX9-NEXT: v_add_f64 v[7:8], s[24:25], 1.0 +; GFX9-NEXT: v_add_f64 v[1:2], s[4:5], 1.0 +; GFX9-NEXT: v_add_f64 v[9:10], s[22:23], 1.0 +; GFX9-NEXT: v_add_f64 v[11:12], s[20:21], 1.0 +; GFX9-NEXT: v_add_f64 v[15:16], s[18:19], 1.0 +; GFX9-NEXT: v_add_f64 v[3:4], s[28:29], 1.0 +; GFX9-NEXT: v_add_f64 v[19:20], s[16:17], 1.0 +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[13:14], 24, v[1:2] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[9:10] +; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[11:12] +; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6] -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[15:16] ; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[15:16] -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v15 +; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[19:20] +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 +; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 8, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v19 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v19 ; GFX9-NEXT: s_branch .LBB85_5 ; GFX9-NEXT: .LBB85_3: ; GFX9-NEXT: ; implicit-def: $sgpr54 @@ -53124,34 +53054,34 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; GFX9-NEXT: ; implicit-def: $sgpr95 ; GFX9-NEXT: s_branch .LBB85_2 ; GFX9-NEXT: .LBB85_4: -; GFX9-NEXT: v_mov_b32_e32 v26, s31 -; GFX9-NEXT: v_mov_b32_e32 v25, s40 -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v13, s31 +; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v13, s44 +; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v25, s42 -; GFX9-NEXT: v_mov_b32_e32 v15, s16 -; GFX9-NEXT: v_mov_b32_e32 v13, s18 -; GFX9-NEXT: v_mov_b32_e32 v9, s20 -; GFX9-NEXT: v_mov_b32_e32 v7, s22 -; GFX9-NEXT: v_mov_b32_e32 v5, s24 -; GFX9-NEXT: v_mov_b32_e32 v3, s26 -; GFX9-NEXT: v_mov_b32_e32 v1, s28 -; GFX9-NEXT: v_mov_b32_e32 v11, s4 -; GFX9-NEXT: v_mov_b32_e32 v12, s5 -; GFX9-NEXT: v_mov_b32_e32 v2, s29 -; GFX9-NEXT: v_mov_b32_e32 v4, s27 -; GFX9-NEXT: v_mov_b32_e32 v6, s25 -; GFX9-NEXT: v_mov_b32_e32 v8, s23 -; GFX9-NEXT: v_mov_b32_e32 v10, s21 -; GFX9-NEXT: v_mov_b32_e32 v14, s19 -; GFX9-NEXT: v_mov_b32_e32 v16, s17 -; GFX9-NEXT: v_mov_b32_e32 v57, s55 -; GFX9-NEXT: v_mov_b32_e32 v59, s54 -; GFX9-NEXT: v_mov_b32_e32 v56, s53 -; GFX9-NEXT: v_mov_b32_e32 v47, s52 -; GFX9-NEXT: v_mov_b32_e32 v42, s51 -; GFX9-NEXT: v_mov_b32_e32 v43, s50 +; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v19, s16 +; GFX9-NEXT: v_mov_b32_e32 v15, s18 +; GFX9-NEXT: v_mov_b32_e32 v11, s20 +; GFX9-NEXT: v_mov_b32_e32 v9, s22 +; GFX9-NEXT: v_mov_b32_e32 v7, s24 +; GFX9-NEXT: v_mov_b32_e32 v5, s26 +; GFX9-NEXT: v_mov_b32_e32 v3, s28 +; GFX9-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-NEXT: v_mov_b32_e32 v2, s5 +; GFX9-NEXT: v_mov_b32_e32 v4, s29 +; GFX9-NEXT: v_mov_b32_e32 v6, s27 +; GFX9-NEXT: v_mov_b32_e32 v8, s25 +; GFX9-NEXT: v_mov_b32_e32 v10, s23 +; GFX9-NEXT: v_mov_b32_e32 v12, s21 +; GFX9-NEXT: v_mov_b32_e32 v16, s19 +; GFX9-NEXT: v_mov_b32_e32 v20, s17 +; GFX9-NEXT: v_mov_b32_e32 v46, s55 +; GFX9-NEXT: v_mov_b32_e32 v56, s54 +; GFX9-NEXT: v_mov_b32_e32 v43, s53 +; GFX9-NEXT: v_mov_b32_e32 v45, s52 +; GFX9-NEXT: v_mov_b32_e32 v55, s51 +; GFX9-NEXT: v_mov_b32_e32 v40, s50 ; GFX9-NEXT: v_mov_b32_e32 v50, s49 ; GFX9-NEXT: v_mov_b32_e32 v51, s48 ; GFX9-NEXT: v_mov_b32_e32 v38, s39 @@ -53161,7 +53091,14 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v30, s35 ; GFX9-NEXT: v_mov_b32_e32 v31, s34 ; GFX9-NEXT: v_mov_b32_e32 v27, s30 -; GFX9-NEXT: v_mov_b32_e32 v19, s95 +; GFX9-NEXT: v_mov_b32_e32 v26, s6 +; GFX9-NEXT: v_mov_b32_e32 v25, s8 +; GFX9-NEXT: v_mov_b32_e32 v24, s10 +; GFX9-NEXT: v_mov_b32_e32 v23, s12 +; GFX9-NEXT: v_mov_b32_e32 v22, s14 +; GFX9-NEXT: v_mov_b32_e32 v21, s40 +; GFX9-NEXT: v_mov_b32_e32 v17, s42 +; GFX9-NEXT: v_mov_b32_e32 v18, s95 ; GFX9-NEXT: v_mov_b32_e32 v28, s94 ; GFX9-NEXT: v_mov_b32_e32 v29, s93 ; GFX9-NEXT: v_mov_b32_e32 v32, s92 @@ -53173,87 +53110,95 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v52, s78 ; GFX9-NEXT: v_mov_b32_e32 v53, s77 ; GFX9-NEXT: v_mov_b32_e32 v54, s76 -; GFX9-NEXT: v_mov_b32_e32 v55, s75 -; GFX9-NEXT: v_mov_b32_e32 v40, s74 -; GFX9-NEXT: v_mov_b32_e32 v41, s73 -; GFX9-NEXT: v_mov_b32_e32 v44, s72 -; GFX9-NEXT: v_mov_b32_e32 v45, s63 -; GFX9-NEXT: v_mov_b32_e32 v46, s62 -; GFX9-NEXT: v_mov_b32_e32 v58, s61 +; GFX9-NEXT: v_mov_b32_e32 v41, s75 +; GFX9-NEXT: v_mov_b32_e32 v42, s74 +; GFX9-NEXT: v_mov_b32_e32 v44, s73 +; GFX9-NEXT: v_mov_b32_e32 v47, s72 +; GFX9-NEXT: v_mov_b32_e32 v57, s63 +; GFX9-NEXT: v_mov_b32_e32 v58, s62 +; GFX9-NEXT: v_mov_b32_e32 v59, s61 ; GFX9-NEXT: v_mov_b32_e32 v60, s60 ; GFX9-NEXT: v_mov_b32_e32 v61, s59 ; GFX9-NEXT: v_mov_b32_e32 v62, s58 -; GFX9-NEXT: v_mov_b32_e32 v17, s57 -; GFX9-NEXT: v_mov_b32_e32 v18, s56 -; GFX9-NEXT: v_mov_b32_e32 v24, s6 -; GFX9-NEXT: v_mov_b32_e32 v23, s8 -; GFX9-NEXT: v_mov_b32_e32 v22, s10 -; GFX9-NEXT: v_mov_b32_e32 v21, s12 -; GFX9-NEXT: v_mov_b32_e32 v20, s14 -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v25, s44 -; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v13, s57 +; GFX9-NEXT: v_mov_b32_e32 v14, s56 ; GFX9-NEXT: .LBB85_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v24, v57, v24, s4 -; GFX9-NEXT: v_perm_b32 v15, v15, v59, s4 -; GFX9-NEXT: v_perm_b32 v16, v16, v18, s4 -; GFX9-NEXT: v_perm_b32 v18, v56, v23, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v24 -; GFX9-NEXT: v_or_b32_e32 v15, v15, v23 -; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v15, v17, v62, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; GFX9-NEXT: v_or_b32_e32 v15, v16, v15 -; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v13, v13, v47, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v18 -; GFX9-NEXT: v_or_b32_e32 v13, v13, v15 +; GFX9-NEXT: v_perm_b32 v13, v13, v62, s4 +; GFX9-NEXT: v_perm_b32 v14, v20, v14, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX9-NEXT: v_or_b32_e32 v13, v14, v13 +; GFX9-NEXT: v_perm_b32 v14, v43, v25, s4 +; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:4 +; GFX9-NEXT: v_perm_b32 v13, v15, v45, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 +; GFX9-NEXT: v_perm_b32 v14, v60, v59, s4 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v13, v14, v61, s4 -; GFX9-NEXT: v_perm_b32 v14, v60, v58, s4 +; GFX9-NEXT: v_perm_b32 v13, v16, v61, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v13, v42, v22, s4 -; GFX9-NEXT: v_perm_b32 v9, v9, v43, s4 +; GFX9-NEXT: v_perm_b32 v13, v55, v24, s4 +; GFX9-NEXT: v_perm_b32 v11, v11, v40, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; GFX9-NEXT: v_or_b32_e32 v9, v9, v13 -; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_perm_b32 v9, v10, v46, s4 -; GFX9-NEXT: v_perm_b32 v10, v45, v44, s4 +; GFX9-NEXT: v_or_b32_e32 v11, v11, v13 +; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:16 +; GFX9-NEXT: v_perm_b32 v11, v12, v58, s4 +; GFX9-NEXT: v_perm_b32 v12, v57, v47, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 +; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:20 +; GFX9-NEXT: v_perm_b32 v11, v50, v23, s4 +; GFX9-NEXT: v_perm_b32 v9, v9, v51, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; GFX9-NEXT: v_or_b32_e32 v9, v9, v11 +; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:24 +; GFX9-NEXT: v_perm_b32 v9, v10, v44, s4 +; GFX9-NEXT: v_perm_b32 v10, v42, v41, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 -; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v9, v50, v21, s4 -; GFX9-NEXT: v_perm_b32 v7, v7, v51, s4 +; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:28 +; GFX9-NEXT: v_perm_b32 v9, v38, v22, s4 +; GFX9-NEXT: v_perm_b32 v7, v7, v48, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v9 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_perm_b32 v7, v8, v41, s4 -; GFX9-NEXT: v_perm_b32 v8, v40, v55, s4 +; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:32 +; GFX9-NEXT: v_perm_b32 v7, v8, v54, s4 +; GFX9-NEXT: v_perm_b32 v8, v53, v52, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 -; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v7, v38, v20, s4 -; GFX9-NEXT: v_perm_b32 v5, v5, v48, s4 +; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36 +; GFX9-NEXT: v_perm_b32 v7, v35, v21, s4 +; GFX9-NEXT: v_perm_b32 v5, v5, v36, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v7 -; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: v_perm_b32 v5, v6, v54, s4 -; GFX9-NEXT: v_perm_b32 v6, v53, v52, s4 +; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:40 +; GFX9-NEXT: v_perm_b32 v5, v6, v49, s4 +; GFX9-NEXT: v_perm_b32 v6, v39, v37, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 -; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44 +; GFX9-NEXT: v_perm_b32 v5, v30, v17, s4 +; GFX9-NEXT: v_perm_b32 v3, v3, v31, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 +; GFX9-NEXT: v_perm_b32 v26, v46, v26, s4 +; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48 +; GFX9-NEXT: v_perm_b32 v3, v4, v34, s4 +; GFX9-NEXT: v_perm_b32 v4, v33, v32, s4 +; GFX9-NEXT: v_perm_b32 v19, v19, v56, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX9-NEXT: v_or_b32_e32 v19, v19, v26 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 +; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen +; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v3, v3, v36, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4 +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v1, v27, s4 ; GFX9-NEXT: v_readlane_b32 s30, v63, 14 ; GFX9-NEXT: v_readlane_b32 s31, v63, 15 ; GFX9-NEXT: v_readlane_b32 s55, v63, 13 @@ -53270,39 +53215,13 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; GFX9-NEXT: v_readlane_b32 s36, v63, 2 ; GFX9-NEXT: v_readlane_b32 s35, v63, 1 ; GFX9-NEXT: v_readlane_b32 s34, v63, 0 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v5, v35, v5, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: v_perm_b32 v3, v4, v49, s4 -; GFX9-NEXT: v_perm_b32 v4, v39, v37, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v3, v30, v3, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v3, v4, v3, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v3 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v1, v2, v34, s4 -; GFX9-NEXT: v_perm_b32 v2, v33, v32, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v11, v27, s4 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v2, v26, v2, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 -; GFX9-NEXT: v_perm_b32 v2, v28, v19, s4 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: v_perm_b32 v1, v12, v29, s4 +; GFX9-NEXT: v_perm_b32 v1, v2, v29, s4 +; GFX9-NEXT: v_perm_b32 v2, v28, v18, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 @@ -53322,7 +53241,7 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32 ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -53669,19 +53588,19 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v34, v6 +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: v_mov_b32_e32 v33, v4 ; SI-NEXT: v_mov_b32_e32 v32, v2 ; SI-NEXT: v_mov_b32_e32 v31, v0 ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:8 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:16 ; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:16 ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:24 ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:32 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:40 @@ -53696,24 +53615,24 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:112 ; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:120 ; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:128 -; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v19 +; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v17 ; SI-NEXT: v_lshlrev_b32_e32 v26, 8, v25 +; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v19 ; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v21 ; SI-NEXT: v_lshlrev_b32_e32 v24, 24, v23 ; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v27 ; SI-NEXT: v_lshlrev_b32_e32 v30, 8, v29 ; SI-NEXT: v_lshlrev_b32_e32 v49, 8, v1 ; SI-NEXT: v_lshlrev_b32_e32 v48, 24, v3 -; SI-NEXT: v_lshlrev_b32_e32 v39, 8, v5 -; SI-NEXT: v_lshlrev_b32_e32 v35, 24, v7 -; SI-NEXT: v_lshlrev_b32_e32 v36, 8, v9 -; SI-NEXT: v_lshlrev_b32_e32 v37, 24, v11 -; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v13 +; SI-NEXT: v_lshlrev_b32_e32 v34, 8, v5 +; SI-NEXT: v_lshlrev_b32_e32 v39, 24, v7 +; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v9 +; SI-NEXT: v_lshlrev_b32_e32 v36, 24, v11 +; SI-NEXT: v_lshlrev_b32_e32 v37, 8, v13 ; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v15 -; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v17 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; SI-NEXT: v_lshlrev_b32_e32 v17, 24, v2 +; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v2 ; SI-NEXT: v_lshlrev_b32_e32 v63, 8, v4 ; SI-NEXT: v_lshlrev_b32_e32 v62, 24, v6 ; SI-NEXT: s_waitcnt vmcnt(13) @@ -53731,9 +53650,9 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_lshlrev_b32_e32 v51, 8, v52 ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v53 +; SI-NEXT: v_lshlrev_b32_e32 v19, 24, v53 ; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v55 +; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v55 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v27, 24, v40 ; SI-NEXT: s_waitcnt vmcnt(3) @@ -53749,47 +53668,43 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:116 +; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: v_lshlrev_b32_e32 v23, 8, v47 ; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_lshlrev_b32_e32 v50, 24, v58 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v0, 8, v47 ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:108 -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:92 ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:76 ; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:68 ; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:60 ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:124 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB86_2 ; SI-NEXT: ; %bb.1: ; %cmp.false +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xff, v31 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v32 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v33 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v34 ; SI-NEXT: v_or_b32_e32 v0, v0, v49 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_or_b32_e32 v2, v2, v39 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v1, v48, v1 -; SI-NEXT: v_or_b32_e32 v3, v35, v3 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xff, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v34 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v29 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v62, v9 @@ -53804,16 +53719,13 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v12, v54, v12 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v44 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v21, v13 +; SI-NEXT: v_or_b32_e32 v13, v19, v13 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v53 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v27, v14 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v29 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr52 @@ -53823,67 +53735,79 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v39, v2 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v2, v2, v36 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v3, v36, v3 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_or_b32_e32 v4, v16, v4 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v20, v5 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v24, v6 -; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v35 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_or_b32_e32 v7, v28, v7 ; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v3, v38 +; SI-NEXT: v_or_b32_e32 v3, v3, v37 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v17, v8 -; SI-NEXT: ; implicit-def: $vgpr17 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v8, v38, v8 +; SI-NEXT: v_or_b32_e32 v16, v50, v16 +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v18 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -53930,10 +53854,10 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v40 -; SI-NEXT: v_or_b32_e32 v13, v13, v19 +; SI-NEXT: v_or_b32_e32 v13, v13, v17 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xff, v23 +; SI-NEXT: v_and_b32_e32 v14, 0xff, v21 ; SI-NEXT: v_or_b32_e32 v14, v14, v25 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 @@ -53944,24 +53868,19 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr47 ; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v15, v23 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v50, v16 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; kill: killed $vgpr16 @@ -53988,19 +53907,20 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; kill: killed $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; kill: killed $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; kill: killed $vgpr16 +; SI-NEXT: ; implicit-def: $vgpr16 +; SI-NEXT: ; kill: killed $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: .LBB86_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB86_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v31 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v0 @@ -54014,17 +53934,13 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v0, v1, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v33 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v1 -; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v34 -; SI-NEXT: v_or_b32_e32 v1, v39, v1 +; SI-NEXT: v_or_b32_e32 v1, v34, v1 ; SI-NEXT: s_movk_i32 s6, 0x300 -; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_or_b32_e32 v2, v35, v2 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v29 +; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v57 ; SI-NEXT: v_and_b32_e32 v9, 0xff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 @@ -54044,75 +53960,85 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v44 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v21, v13 +; SI-NEXT: v_or_b32_e32 v13, v19, v13 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v53 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_or_b32_e32 v14, v27, v14 -; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v29 -; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: s_mov_b32 s7, 0x3000000 ; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v0 -; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v39, v2 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v1, vcc, s7, v1 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 -; SI-NEXT: v_or_b32_e32 v2, v36, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_or_b32_e32 v3, v36, v3 +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_or_b32_e32 v4, v16, v4 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v5, v20, v5 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v24, v6 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xff, v2 +; SI-NEXT: v_or_b32_e32 v2, v35, v2 +; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_or_b32_e32 v2, v3, v2 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v2, vcc, s7, v2 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_or_b32_e32 v7, v28, v7 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xff, v3 -; SI-NEXT: v_or_b32_e32 v3, v38, v3 +; SI-NEXT: v_or_b32_e32 v3, v37, v3 ; SI-NEXT: v_add_i32_e32 v3, vcc, s6, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v3, vcc, s7, v3 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xff, v8 +; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v17, v8 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v8, v38, v8 +; SI-NEXT: v_or_b32_e32 v16, v50, v16 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xff, v4 ; SI-NEXT: v_or_b32_e32 v4, v18, v4 @@ -54178,11 +54104,11 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v40 ; SI-NEXT: v_and_b32_e32 v13, 0xff, v13 -; SI-NEXT: v_or_b32_e32 v13, v19, v13 +; SI-NEXT: v_or_b32_e32 v13, v17, v13 ; SI-NEXT: v_add_i32_e32 v13, vcc, s6, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v23 +; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v21 ; SI-NEXT: v_and_b32_e32 v14, 0xff, v14 ; SI-NEXT: v_or_b32_e32 v14, v25, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v14 @@ -54200,15 +54126,9 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15 ; SI-NEXT: v_and_b32_e32 v15, 0xff, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v23, v15 ; SI-NEXT: v_add_i32_e32 v15, vcc, 0x300, v15 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v50, v16 ; SI-NEXT: v_or_b32_e32 v15, v16, v15 ; SI-NEXT: v_add_i32_e32 v15, vcc, 0x3000000, v15 ; SI-NEXT: .LBB86_4: ; %end @@ -54254,8 +54174,8 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v53, v1 @@ -54284,7 +54204,7 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:16 ; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:12 ; VI-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:4 ; VI-NEXT: v_mov_b32_e32 v31, v15 ; VI-NEXT: v_mov_b32_e32 v32, v14 ; VI-NEXT: v_mov_b32_e32 v33, v13 @@ -54302,7 +54222,7 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(14) ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:124 +; VI-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:124 ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:120 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill @@ -54317,10 +54237,10 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:104 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:100 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; VI-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:96 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill @@ -54334,14 +54254,14 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_mov_b32 s6, 0xc0c0004 ; VI-NEXT: v_perm_b32 v1, v52, v51, s6 -; VI-NEXT: v_perm_b32 v3, v48, v39, s6 ; VI-NEXT: v_perm_b32 v0, v54, v53, s6 -; VI-NEXT: v_perm_b32 v2, v50, v49, s6 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_perm_b32 v2, v48, v39, s6 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_perm_b32 v1, v50, v49, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_perm_b32 v3, v36, v35, s6 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_perm_b32 v2, v38, v37, s6 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_perm_b32 v4, v32, v31, s6 @@ -54406,8 +54326,8 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr59 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v6, v7, v6, s6 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_perm_b32 v14, v15, v14, s6 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 @@ -54424,7 +54344,7 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v8, v8, v30, s6 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_perm_b32 v8, v57, v56, s6 +; VI-NEXT: v_perm_b32 v8, v25, v56, s6 ; VI-NEXT: v_or_b32_e32 v8, v8, v9 ; VI-NEXT: v_perm_b32 v9, v47, v46, s6 ; VI-NEXT: v_or_b32_e32 v9, v9, v10 @@ -54436,8 +54356,8 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v12, v12, v13 ; VI-NEXT: v_perm_b32 v13, v58, v24, s6 ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; kill: killed $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr24 @@ -54453,7 +54373,7 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; kill: killed $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr30 -; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr25 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr46 @@ -54479,29 +54399,29 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_perm_b32 v15, v16, v15, s6 ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v16, v25, v16, s6 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: v_perm_b32 v16, v57, v16, s6 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: v_or_b32_e32 v15, v15, v16 ; VI-NEXT: ; implicit-def: $vgpr16 -; VI-NEXT: ; kill: killed $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; kill: killed $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: .LBB86_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB86_4 @@ -54512,19 +54432,19 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_e32 v1, 3, v52 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v51 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v2, 3, v50 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v49 -; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v3, 3, v48 -; VI-NEXT: v_lshlrev_b16_e32 v4, 8, v39 -; VI-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_mov_b32_e32 v15, 0x300 ; VI-NEXT: v_add_u16_e32 v0, 0x300, v0 ; VI-NEXT: v_add_u16_sdwa v1, v1, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 0x300, v2 -; VI-NEXT: v_add_u16_sdwa v3, v3, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v50 +; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v49 +; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v2, 3, v48 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v39 +; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: v_add_u16_e32 v1, 0x300, v1 +; VI-NEXT: v_add_u16_sdwa v2, v2, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v38 ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v37 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -54569,7 +54489,7 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b16_e32 v12, 8, v42 ; VI-NEXT: v_lshlrev_b16_e32 v13, 8, v63 ; VI-NEXT: v_lshlrev_b16_e32 v14, 8, v59 -; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload @@ -54578,7 +54498,7 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; VI-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; VI-NEXT: v_add_u16_e32 v6, 0x300, v6 ; VI-NEXT: s_waitcnt vmcnt(4) ; VI-NEXT: v_lshlrev_b16_e32 v8, 8, v8 @@ -54607,7 +54527,7 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v8, v8, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v7, v7, v8 -; VI-NEXT: v_add_u16_e32 v8, 3, v57 +; VI-NEXT: v_add_u16_e32 v8, 3, v25 ; VI-NEXT: v_lshlrev_b16_e32 v9, 8, v56 ; VI-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v9, 3, v26 @@ -54657,8 +54577,8 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_sdwa v14, v16, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v14, v14, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v14, 3, v14 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -54678,7 +54598,7 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; VI-NEXT: v_or_b32_sdwa v16, v17, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v17, 3, v25 +; VI-NEXT: v_add_u16_e32 v17, 3, v57 ; VI-NEXT: v_or_b32_sdwa v17, v18, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_e32 v16, 0x300, v16 ; VI-NEXT: v_add_u16_sdwa v15, v17, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -54730,11 +54650,13 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v53, v1 ; GFX9-NEXT: v_mov_b32_e32 v54, v0 ; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:132 ; GFX9-NEXT: buffer_load_ushort v43, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:128 +; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:92 ; GFX9-NEXT: buffer_load_ushort v57, off, s[0:3], s32 offset:88 ; GFX9-NEXT: buffer_load_ushort v58, off, s[0:3], s32 offset:84 ; GFX9-NEXT: buffer_load_ushort v59, off, s[0:3], s32 offset:80 @@ -54750,12 +54672,12 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:40 ; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 ; GFX9-NEXT: buffer_load_ushort v44, off, s[0:3], s32 offset:32 -; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:28 -; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:24 +; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:28 +; GFX9-NEXT: buffer_load_ushort v45, off, s[0:3], s32 offset:24 ; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:20 ; GFX9-NEXT: buffer_load_ushort v46, off, s[0:3], s32 offset:16 -; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:12 -; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:8 +; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:12 +; GFX9-NEXT: buffer_load_ushort v47, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:4 ; GFX9-NEXT: v_mov_b32_e32 v31, v15 ; GFX9-NEXT: v_mov_b32_e32 v32, v14 @@ -54771,9 +54693,9 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_mov_b32_e32 v50, v4 ; GFX9-NEXT: v_mov_b32_e32 v51, v3 ; GFX9-NEXT: v_mov_b32_e32 v52, v2 -; GFX9-NEXT: s_waitcnt vmcnt(24) +; GFX9-NEXT: s_waitcnt vmcnt(25) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 -; GFX9-NEXT: s_waitcnt vmcnt(22) +; GFX9-NEXT: s_waitcnt vmcnt(23) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v56, off, s[0:3], s32 offset:124 ; GFX9-NEXT: s_nop 0 @@ -54797,22 +54719,20 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:96 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:92 -; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB86_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b32 s6, 0xc0c0004 ; GFX9-NEXT: v_perm_b32 v0, v54, v53, s6 ; GFX9-NEXT: v_perm_b32 v1, v52, v51, s6 -; GFX9-NEXT: v_perm_b32 v2, v50, v49, s6 -; GFX9-NEXT: v_perm_b32 v3, v48, v39, s6 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_perm_b32 v1, v50, v49, s6 +; GFX9-NEXT: v_perm_b32 v2, v48, v39, s6 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: v_perm_b32 v2, v38, v37, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v35, s6 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 @@ -54823,14 +54743,8 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v5, v18, v19, s6 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 ; GFX9-NEXT: v_perm_b32 v5, v20, v21, s6 -; GFX9-NEXT: v_perm_b32 v6, v22, v23, s6 -; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v9, v47, v46, s6 -; GFX9-NEXT: v_perm_b32 v10, v45, v44, s6 +; GFX9-NEXT: v_perm_b32 v9, v25, v46, s6 +; GFX9-NEXT: v_perm_b32 v10, v27, v44, s6 ; GFX9-NEXT: v_perm_b32 v11, v42, v30, s6 ; GFX9-NEXT: v_perm_b32 v12, v55, v63, s6 ; GFX9-NEXT: v_perm_b32 v13, v60, v59, s6 @@ -54855,11 +54769,9 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr20 ; GFX9-NEXT: ; implicit-def: $vgpr21 -; GFX9-NEXT: ; implicit-def: $vgpr22 -; GFX9-NEXT: ; implicit-def: $vgpr23 -; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr25 ; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: ; implicit-def: $vgpr44 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr30 @@ -54867,12 +54779,34 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_perm_b32 v6, v22, v6, s6 +; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_perm_b32 v14, v23, v14, s6 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: ; kill: killed $vgpr23 +; GFX9-NEXT: ; implicit-def: $vgpr23 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v6, v7, v6, s6 ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_perm_b32 v14, v15, v14, s6 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v7, v8, v7, s6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 @@ -54884,9 +54818,9 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v8, v8, v43, s6 ; GFX9-NEXT: v_lshl_or_b32 v7, v8, 16, v7 -; GFX9-NEXT: v_perm_b32 v8, v24, v25, s6 +; GFX9-NEXT: v_perm_b32 v8, v24, v47, s6 ; GFX9-NEXT: v_lshl_or_b32 v8, v9, 16, v8 -; GFX9-NEXT: v_perm_b32 v9, v26, v27, s6 +; GFX9-NEXT: v_perm_b32 v9, v26, v45, s6 ; GFX9-NEXT: v_lshl_or_b32 v9, v10, 16, v9 ; GFX9-NEXT: v_perm_b32 v10, v28, v29, s6 ; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10 @@ -54900,23 +54834,11 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; GFX9-NEXT: ; implicit-def: $vgpr24 ; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; kill: killed $vgpr24 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr25 +; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr26 -; GFX9-NEXT: ; implicit-def: $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr28 ; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr41 @@ -54954,8 +54876,6 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; kill: killed $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; kill: killed $vgpr56 -; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: v_lshl_or_b32 v15, v16, 16, v15 ; GFX9-NEXT: ; implicit-def: $vgpr16 ; GFX9-NEXT: ; kill: killed $vgpr56 @@ -54964,25 +54884,26 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB86_4 ; GFX9-NEXT: ; %bb.3: ; %cmp.true +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: v_add_u16_e32 v0, 3, v54 ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v53 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v1, 3, v52 ; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v51 ; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v2, 3, v50 -; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v49 -; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v3, 3, v48 -; GFX9-NEXT: v_lshlrev_b16_e32 v4, 8, v39 -; GFX9-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: s_movk_i32 s6, 0x300 ; GFX9-NEXT: v_add_u16_e32 v0, 0x300, v0 ; GFX9-NEXT: v_add_u16_sdwa v1, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u16_sdwa v3, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_add_u16_e32 v1, 3, v50 +; GFX9-NEXT: v_lshlrev_b16_e32 v2, 8, v49 +; GFX9-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v2, 3, v48 +; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v39 +; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u16_sdwa v2, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_add_u16_e32 v2, 3, v38 ; GFX9-NEXT: v_lshlrev_b16_e32 v3, 8, v37 ; GFX9-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -55014,36 +54935,39 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshlrev_b16_e32 v6, 8, v21 ; GFX9-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v6, 3, v22 -; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v23 -; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v5, 0x300, v5 -; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v43 ; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v46 ; GFX9-NEXT: v_lshlrev_b16_e32 v11, 8, v44 ; GFX9-NEXT: v_lshlrev_b16_e32 v12, 8, v30 ; GFX9-NEXT: v_lshlrev_b16_e32 v13, 8, v63 ; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v59 +; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 +; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_sdwa v6, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 +; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(5) -; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 +; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v16 ; GFX9-NEXT: s_waitcnt vmcnt(4) +; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 +; GFX9-NEXT: s_waitcnt vmcnt(3) +; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 +; GFX9-NEXT: s_waitcnt vmcnt(2) +; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v15 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_add_u16_e32 v6, 3, v6 +; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v7, 8, v7 ; GFX9-NEXT: v_or_b32_sdwa v6, v7, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_lshlrev_b16_e32 v8, 8, v8 ; GFX9-NEXT: v_add_u16_e32 v6, 0x300, v6 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b16_e32 v15, 8, v15 -; GFX9-NEXT: v_lshlrev_b16_e32 v16, 8, v16 -; GFX9-NEXT: v_lshlrev_b16_e32 v17, 8, v17 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u16_e32 v7, 3, v7 ; GFX9-NEXT: v_or_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 @@ -55064,17 +54988,17 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_sdwa v8, v8, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 ; GFX9-NEXT: v_add_u16_e32 v8, 3, v24 -; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v25 +; GFX9-NEXT: v_lshlrev_b16_e32 v9, 8, v47 ; GFX9-NEXT: v_or_b32_sdwa v8, v9, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v9, 3, v47 +; GFX9-NEXT: v_add_u16_e32 v9, 3, v25 ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v8, 0x300, v8 ; GFX9-NEXT: v_add_u16_sdwa v9, v9, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v8, v8, v9 ; GFX9-NEXT: v_add_u16_e32 v9, 3, v26 -; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v27 +; GFX9-NEXT: v_lshlrev_b16_e32 v10, 8, v45 ; GFX9-NEXT: v_or_b32_sdwa v9, v10, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v10, 3, v45 +; GFX9-NEXT: v_add_u16_e32 v10, 3, v27 ; GFX9-NEXT: v_or_b32_sdwa v10, v11, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v9, 0x300, v9 ; GFX9-NEXT: v_add_u16_sdwa v10, v10, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -55106,11 +55030,9 @@ define <8 x double> @bitcast_v64i8_to_v8f64(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_add_u16_e32 v13, 3, v58 ; GFX9-NEXT: v_lshlrev_b16_e32 v14, 8, v57 ; GFX9-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u16_e32 v14, 3, v14 +; GFX9-NEXT: v_add_u16_e32 v14, 3, v23 ; GFX9-NEXT: v_or_b32_sdwa v14, v15, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v13 ; GFX9-NEXT: v_add_u16_sdwa v14, v14, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload @@ -55993,8 +55915,6 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; SI-NEXT: v_lshlrev_b32_e32 v27, 8, v27 ; SI-NEXT: s_cbranch_scc0 .LBB87_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s4, s6, 0xff -; SI-NEXT: v_or_b32_e32 v0, s4, v34 ; SI-NEXT: s_and_b32 s4, s16, 0xff ; SI-NEXT: s_lshl_b32 s5, s17, 8 ; SI-NEXT: s_or_b32 s4, s4, s5 @@ -56069,65 +55989,66 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; SI-NEXT: s_or_b32 s90, s90, s91 ; SI-NEXT: s_and_b32 s91, s42, 0xff ; SI-NEXT: s_lshl_b32 s92, s41, 8 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 ; SI-NEXT: s_or_b32 s91, s91, s92 ; SI-NEXT: s_and_b32 s92, s40, 0xff -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_lshl_b32 s92, s92, 16 ; SI-NEXT: s_lshl_b32 s93, s15, 24 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v33, v1 ; SI-NEXT: s_and_b32 s91, s91, 0xffff ; SI-NEXT: s_or_b32 s92, s93, s92 -; SI-NEXT: v_or_b32_e32 v11, v0, v1 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v0, 0xff, v23 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 ; SI-NEXT: s_or_b32 s91, s91, s92 ; SI-NEXT: s_and_b32 s92, s14, 0xff ; SI-NEXT: s_lshl_b32 s93, s13, 8 -; SI-NEXT: v_or_b32_e32 v0, v0, v30 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_or_b32 s92, s92, s93 ; SI-NEXT: s_and_b32 s93, s12, 0xff -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v29, v1 ; SI-NEXT: s_lshl_b32 s93, s93, 16 ; SI-NEXT: s_lshl_b32 s94, s11, 24 -; SI-NEXT: v_or_b32_e32 v13, v0, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xff, v19 -; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 ; SI-NEXT: s_and_b32 s92, s92, 0xffff ; SI-NEXT: s_or_b32 s93, s94, s93 -; SI-NEXT: v_or_b32_e32 v0, v0, v27 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: s_or_b32 s92, s92, s93 ; SI-NEXT: s_and_b32 s93, s10, 0xff ; SI-NEXT: s_lshl_b32 s94, s9, 8 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v1, v25, v1 ; SI-NEXT: s_or_b32 s93, s93, s94 ; SI-NEXT: s_and_b32 s94, s8, 0xff +; SI-NEXT: s_lshl_b32 s94, s94, 16 +; SI-NEXT: s_lshl_b32 s95, s7, 24 +; SI-NEXT: s_and_b32 s93, s93, 0xffff +; SI-NEXT: s_or_b32 s94, s95, s94 +; SI-NEXT: s_or_b32 s93, s93, s94 +; SI-NEXT: s_and_b32 s94, s6, 0xff +; SI-NEXT: v_and_b32_e32 v1, 0xff, v20 +; SI-NEXT: v_or_b32_e32 v0, s94, v34 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 +; SI-NEXT: v_or_b32_e32 v11, v0, v1 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xff, v28 -; SI-NEXT: v_and_b32_e32 v3, 0xff, v26 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v28 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v32 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v31, v1 +; SI-NEXT: v_or_b32_e32 v12, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v23 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v21 +; SI-NEXT: v_or_b32_e32 v0, v0, v30 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v29, v1 +; SI-NEXT: v_or_b32_e32 v13, v0, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xff, v19 +; SI-NEXT: v_and_b32_e32 v1, 0xff, v18 +; SI-NEXT: v_or_b32_e32 v0, v0, v27 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v1, v25, v1 ; SI-NEXT: v_or_b32_e32 v14, v0, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xff, v17 ; SI-NEXT: v_and_b32_e32 v1, 0xff, v16 -; SI-NEXT: s_lshl_b32 s94, s94, 16 -; SI-NEXT: s_lshl_b32 s95, s7, 24 -; SI-NEXT: v_or_b32_e32 v2, v2, v32 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_or_b32_e32 v0, v0, v24 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: s_and_b32 s93, s93, 0xffff -; SI-NEXT: s_or_b32 s94, s95, s94 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v3, v31, v3 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v1, v22, v1 -; SI-NEXT: s_or_b32 s93, s93, s94 -; SI-NEXT: v_or_b32_e32 v12, v2, v3 ; SI-NEXT: v_or_b32_e32 v15, v0, v1 ; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: v_mov_b32_e32 v1, s5 @@ -56379,7 +56300,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: v_readfirstlane_b32 s44, v16 ; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:76 ; VI-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:8 -; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:4 ; VI-NEXT: buffer_load_ushort v26, off, s[0:3], s32 ; VI-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72 ; VI-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:68 @@ -56387,7 +56308,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60 ; VI-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:56 ; VI-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:52 -; VI-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:48 +; VI-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:48 ; VI-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:44 ; VI-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:40 ; VI-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 @@ -56420,18 +56341,18 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -56486,7 +56407,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 ; VI-NEXT: v_or_b32_e32 v10, v10, v12 -; VI-NEXT: v_perm_b32 v12, v24, v22, s4 +; VI-NEXT: v_perm_b32 v12, v23, v22, s4 ; VI-NEXT: v_perm_b32 v11, s6, v26, v11 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_or_b32_e32 v11, v11, v12 @@ -56502,7 +56423,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: v_or_b32_e32 v13, v14, v13 ; VI-NEXT: v_perm_b32 v14, v21, v20, s4 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; VI-NEXT: v_perm_b32 v15, v25, v23, s4 +; VI-NEXT: v_perm_b32 v15, v25, v24, s4 ; VI-NEXT: v_or_b32_e32 v14, v15, v14 ; VI-NEXT: v_perm_b32 v15, v17, v16, s4 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -56609,10 +56530,10 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: v_perm_b32 v12, s8, v12, v11 ; VI-NEXT: v_add_u32_e32 v10, vcc, 0x300, v10 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; VI-NEXT: s_mov_b32 s4, 0xc0c0004 ; VI-NEXT: v_or_b32_sdwa v10, v12, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: s_add_i32 s6, s6, 3 -; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v24 +; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v23 ; VI-NEXT: v_perm_b32 v11, s6, v26, v11 ; VI-NEXT: v_perm_b32 v12, v12, v22, s4 ; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v11 @@ -56635,7 +56556,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: v_or_b32_sdwa v13, v14, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v25 ; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v21 -; VI-NEXT: v_perm_b32 v14, v14, v23, s4 +; VI-NEXT: v_perm_b32 v14, v14, v24, s4 ; VI-NEXT: v_perm_b32 v15, v15, v20, s4 ; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v14 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -56689,16 +56610,16 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_readfirstlane_b32 s43, v17 ; GFX9-NEXT: v_readfirstlane_b32 s44, v16 ; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:76 -; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:8 -; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:4 -; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 +; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:8 +; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:4 +; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:72 ; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:68 ; GFX9-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:64 ; GFX9-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:60 -; GFX9-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:56 -; GFX9-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:52 -; GFX9-NEXT: buffer_load_ushort v24, off, s[0:3], s32 offset:48 +; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:56 +; GFX9-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:52 +; GFX9-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:48 ; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:44 ; GFX9-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:40 ; GFX9-NEXT: buffer_load_ushort v28, off, s[0:3], s32 offset:36 @@ -56731,18 +56652,18 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_mov_b32_e32 v0, s17 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 ; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 -; GFX9-NEXT: v_or_b32_e32 v1, v2, v3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s27 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -56798,9 +56719,9 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 ; GFX9-NEXT: v_or_b32_e32 v10, v10, v12 ; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_perm_b32 v12, v23, v21, s4 +; GFX9-NEXT: v_perm_b32 v12, v22, v20, s4 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_perm_b32 v11, s6, v25, v11 +; GFX9-NEXT: v_perm_b32 v11, s6, v24, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 ; GFX9-NEXT: s_waitcnt vmcnt(2) @@ -56813,9 +56734,9 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; GFX9-NEXT: v_perm_b32 v14, v30, v29, s4 ; GFX9-NEXT: v_or_b32_e32 v13, v14, v13 -; GFX9-NEXT: v_perm_b32 v14, v22, v20, s4 +; GFX9-NEXT: v_perm_b32 v14, v23, v21, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; GFX9-NEXT: v_perm_b32 v15, v26, v24, s4 +; GFX9-NEXT: v_perm_b32 v15, v26, v25, s4 ; GFX9-NEXT: v_or_b32_e32 v14, v15, v14 ; GFX9-NEXT: v_perm_b32 v15, v17, v16, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -56828,21 +56749,21 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; GFX9-NEXT: s_add_i32 s18, s18, 3 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 -; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v11 -; GFX9-NEXT: s_movk_i32 s4, 0x300 +; GFX9-NEXT: s_movk_i32 s5, 0x300 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v11 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v11 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_add_u32_sdwa v1, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v1, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; GFX9-NEXT: v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; GFX9-NEXT: s_add_i32 s20, s20, 3 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: s_add_i32 s22, s22, 3 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v11 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v11 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v1 +; GFX9-NEXT: v_add_u32_sdwa v2, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s24, s24, 3 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: s_add_i32 s26, s26, 3 @@ -56850,7 +56771,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v11 ; GFX9-NEXT: v_perm_b32 v3, s26, v3, v11 ; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_add_u32_sdwa v3, v3, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v3, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s28, s28, 3 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 @@ -56859,7 +56780,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v3, s28, v3, v11 ; GFX9-NEXT: v_perm_b32 v4, s76, v4, v11 ; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 -; GFX9-NEXT: v_add_u32_sdwa v4, v4, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v4, v4, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s74, s74, 3 ; GFX9-NEXT: v_mov_b32_e32 v4, s73 @@ -56868,7 +56789,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v4, s74, v4, v11 ; GFX9-NEXT: v_perm_b32 v5, s72, v5, v11 ; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 -; GFX9-NEXT: v_add_u32_sdwa v5, v5, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v5, v5, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s62, s62, 3 ; GFX9-NEXT: v_mov_b32_e32 v5, s61 @@ -56877,7 +56798,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v5, s62, v5, v11 ; GFX9-NEXT: v_perm_b32 v6, s60, v6, v11 ; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 -; GFX9-NEXT: v_add_u32_sdwa v6, v6, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v6, v6, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s58, s58, 3 ; GFX9-NEXT: v_mov_b32_e32 v6, s57 @@ -56886,7 +56807,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v6, s58, v6, v11 ; GFX9-NEXT: v_perm_b32 v7, s56, v7, v11 ; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_add_u32_sdwa v7, v7, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v7, v7, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v6, v6, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s46, s46, 3 ; GFX9-NEXT: v_mov_b32_e32 v7, s45 @@ -56895,7 +56816,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v7, s46, v7, v11 ; GFX9-NEXT: v_perm_b32 v8, s44, v8, v11 ; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 -; GFX9-NEXT: v_add_u32_sdwa v8, v8, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v8, v8, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s42, s42, 3 ; GFX9-NEXT: v_mov_b32_e32 v8, s41 @@ -56904,7 +56825,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v8, s42, v8, v11 ; GFX9-NEXT: v_perm_b32 v9, s40, v9, v11 ; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v8 -; GFX9-NEXT: v_add_u32_sdwa v9, v9, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v9, v9, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v8, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s14, s14, 3 ; GFX9-NEXT: v_mov_b32_e32 v9, s13 @@ -56913,7 +56834,7 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v9, s14, v9, v11 ; GFX9-NEXT: v_perm_b32 v10, s12, v10, v11 ; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v9 -; GFX9-NEXT: v_add_u32_sdwa v10, v10, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v10, v10, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v9, v9, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s10, s10, 3 ; GFX9-NEXT: v_mov_b32_e32 v10, s9 @@ -56922,46 +56843,46 @@ define inreg <8 x double> @bitcast_v64i8_to_v8f64_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_perm_b32 v10, s10, v10, v11 ; GFX9-NEXT: v_perm_b32 v12, s8, v12, v11 ; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v10 -; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v12, v12, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 ; GFX9-NEXT: v_or_b32_sdwa v10, v10, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_add_i32 s6, s6, 3 -; GFX9-NEXT: s_mov_b32 s5, 0xc0c0004 ; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_add_u32_e32 v12, 3, v23 +; GFX9-NEXT: v_add_u32_e32 v12, 3, v22 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_perm_b32 v11, s6, v25, v11 -; GFX9-NEXT: v_perm_b32 v12, v12, v21, s5 +; GFX9-NEXT: v_perm_b32 v11, s6, v24, v11 +; GFX9-NEXT: v_perm_b32 v12, v12, v20, s4 ; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v11 -; GFX9-NEXT: v_add_u32_sdwa v12, v12, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v12, v12, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v11, v11, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_add_u32_e32 v12, 3, v34 ; GFX9-NEXT: v_add_u32_e32 v13, 3, v32 -; GFX9-NEXT: v_perm_b32 v12, v12, v33, s5 -; GFX9-NEXT: v_perm_b32 v13, v13, v31, s5 +; GFX9-NEXT: v_perm_b32 v12, v12, v33, s4 +; GFX9-NEXT: v_perm_b32 v13, v13, v31, s4 ; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v12 -; GFX9-NEXT: v_add_u32_sdwa v13, v13, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v13, v13, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v12, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v13, 3, v30 ; GFX9-NEXT: v_add_u32_e32 v14, 3, v28 -; GFX9-NEXT: v_perm_b32 v13, v13, v29, s5 -; GFX9-NEXT: v_perm_b32 v14, v14, v27, s5 +; GFX9-NEXT: v_perm_b32 v13, v13, v29, s4 +; GFX9-NEXT: v_perm_b32 v14, v14, v27, s4 ; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 -; GFX9-NEXT: v_add_u32_sdwa v14, v14, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v14, v14, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v13, v13, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v14, 3, v26 -; GFX9-NEXT: v_add_u32_e32 v15, 3, v22 -; GFX9-NEXT: v_perm_b32 v14, v14, v24, s5 -; GFX9-NEXT: v_perm_b32 v15, v15, v20, s5 +; GFX9-NEXT: v_add_u32_e32 v15, 3, v23 +; GFX9-NEXT: v_perm_b32 v14, v14, v25, s4 +; GFX9-NEXT: v_perm_b32 v15, v15, v21, s4 ; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v14 -; GFX9-NEXT: v_add_u32_sdwa v15, v15, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v15, v15, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v14, v14, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: v_add_u32_e32 v15, 3, v19 ; GFX9-NEXT: v_add_u32_e32 v17, 3, v17 -; GFX9-NEXT: v_perm_b32 v15, v15, v18, s5 -; GFX9-NEXT: v_perm_b32 v16, v17, v16, s5 +; GFX9-NEXT: v_perm_b32 v15, v15, v18, s4 +; GFX9-NEXT: v_perm_b32 v16, v17, v16, s4 ; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v15 -; GFX9-NEXT: v_add_u32_sdwa v16, v16, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX9-NEXT: v_add_u32_sdwa v16, v16, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; GFX9-NEXT: .LBB87_3: ; %end ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -58016,164 +57937,177 @@ define inreg <32 x half> @bitcast_v32i16_to_v32f16_scalar(<32 x i16> inreg %a, i ; SI-NEXT: v_writelane_b32 v16, s37, 3 ; SI-NEXT: v_writelane_b32 v16, s38, 4 ; SI-NEXT: v_writelane_b32 v16, s39, 5 -; SI-NEXT: v_writelane_b32 v16, s30, 6 -; SI-NEXT: v_writelane_b32 v16, s31, 7 -; SI-NEXT: v_readfirstlane_b32 s37, v1 -; SI-NEXT: v_readfirstlane_b32 s39, v0 -; SI-NEXT: s_lshr_b32 s92, s29, 16 -; SI-NEXT: s_lshr_b32 s36, s28, 16 -; SI-NEXT: s_lshr_b32 s91, s27, 16 -; SI-NEXT: s_lshr_b32 s35, s26, 16 -; SI-NEXT: s_lshr_b32 s90, s25, 16 -; SI-NEXT: s_lshr_b32 s34, s24, 16 -; SI-NEXT: s_lshr_b32 s89, s23, 16 -; SI-NEXT: s_lshr_b32 s31, s22, 16 -; SI-NEXT: s_lshr_b32 s88, s21, 16 -; SI-NEXT: s_lshr_b32 s30, s20, 16 -; SI-NEXT: s_lshr_b32 s79, s19, 16 -; SI-NEXT: s_lshr_b32 s95, s18, 16 -; SI-NEXT: s_lshr_b32 s78, s17, 16 -; SI-NEXT: s_lshr_b32 s94, s16, 16 -; SI-NEXT: s_lshr_b32 s93, s37, 16 -; SI-NEXT: s_lshr_b32 s38, s39, 16 +; SI-NEXT: v_writelane_b32 v16, s48, 6 +; SI-NEXT: v_writelane_b32 v16, s49, 7 +; SI-NEXT: v_writelane_b32 v16, s50, 8 +; SI-NEXT: v_writelane_b32 v16, s51, 9 +; SI-NEXT: v_writelane_b32 v16, s52, 10 +; SI-NEXT: v_writelane_b32 v16, s53, 11 +; SI-NEXT: v_writelane_b32 v16, s54, 12 +; SI-NEXT: v_writelane_b32 v16, s55, 13 +; SI-NEXT: v_writelane_b32 v16, s64, 14 +; SI-NEXT: v_writelane_b32 v16, s65, 15 +; SI-NEXT: v_writelane_b32 v16, s66, 16 +; SI-NEXT: v_writelane_b32 v16, s67, 17 +; SI-NEXT: v_writelane_b32 v16, s68, 18 +; SI-NEXT: v_writelane_b32 v16, s69, 19 +; SI-NEXT: v_writelane_b32 v16, s30, 20 +; SI-NEXT: v_writelane_b32 v16, s31, 21 +; SI-NEXT: v_readfirstlane_b32 s39, v1 +; SI-NEXT: v_readfirstlane_b32 s49, v0 +; SI-NEXT: s_lshr_b32 s94, s29, 16 +; SI-NEXT: s_lshr_b32 s38, s28, 16 +; SI-NEXT: s_lshr_b32 s93, s27, 16 +; SI-NEXT: s_lshr_b32 s37, s26, 16 +; SI-NEXT: s_lshr_b32 s92, s25, 16 +; SI-NEXT: s_lshr_b32 s36, s24, 16 +; SI-NEXT: s_lshr_b32 s91, s23, 16 +; SI-NEXT: s_lshr_b32 s35, s22, 16 +; SI-NEXT: s_lshr_b32 s90, s21, 16 +; SI-NEXT: s_lshr_b32 s34, s20, 16 +; SI-NEXT: s_lshr_b32 s89, s19, 16 +; SI-NEXT: s_lshr_b32 s31, s18, 16 +; SI-NEXT: s_lshr_b32 s88, s17, 16 +; SI-NEXT: s_lshr_b32 s30, s16, 16 +; SI-NEXT: s_lshr_b32 s95, s39, 16 +; SI-NEXT: s_lshr_b32 s48, s49, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v2 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB89_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s7, s78, 16 +; SI-NEXT: s_lshl_b32 s7, s88, 16 ; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s44, s94, 16 -; SI-NEXT: s_or_b32 s45, s5, s7 +; SI-NEXT: s_lshl_b32 vcc_lo, s30, 16 +; SI-NEXT: s_or_b32 vcc_hi, s5, s7 ; SI-NEXT: s_and_b32 s5, s19, 0xffff -; SI-NEXT: s_lshl_b32 s7, s79, 16 -; SI-NEXT: s_or_b32 s14, s4, s44 +; SI-NEXT: s_lshl_b32 s7, s89, 16 +; SI-NEXT: s_or_b32 s42, s4, vcc_lo ; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s46, s95, 16 -; SI-NEXT: s_or_b32 s47, s5, s7 +; SI-NEXT: s_lshl_b32 s50, s31, 16 +; SI-NEXT: s_or_b32 s51, s5, s7 ; SI-NEXT: s_and_b32 s5, s21, 0xffff -; SI-NEXT: s_lshl_b32 s7, s88, 16 -; SI-NEXT: s_or_b32 s12, s4, s46 +; SI-NEXT: s_lshl_b32 s7, s90, 16 +; SI-NEXT: s_or_b32 s40, s4, s50 ; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s56, s30, 16 -; SI-NEXT: s_or_b32 s57, s5, s7 +; SI-NEXT: s_lshl_b32 s52, s34, 16 +; SI-NEXT: s_or_b32 s53, s5, s7 ; SI-NEXT: s_and_b32 s5, s23, 0xffff -; SI-NEXT: s_lshl_b32 s7, s89, 16 -; SI-NEXT: s_or_b32 s10, s4, s56 +; SI-NEXT: s_lshl_b32 s7, s91, 16 +; SI-NEXT: s_or_b32 s14, s4, s52 ; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s58, s31, 16 -; SI-NEXT: s_or_b32 s59, s5, s7 +; SI-NEXT: s_lshl_b32 s54, s35, 16 +; SI-NEXT: s_or_b32 s55, s5, s7 ; SI-NEXT: s_and_b32 s5, s25, 0xffff -; SI-NEXT: s_lshl_b32 s7, s90, 16 -; SI-NEXT: s_or_b32 s8, s4, s58 +; SI-NEXT: s_lshl_b32 s7, s92, 16 +; SI-NEXT: s_or_b32 s12, s4, s54 ; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s60, s34, 16 -; SI-NEXT: s_or_b32 s61, s5, s7 +; SI-NEXT: s_lshl_b32 s64, s36, 16 +; SI-NEXT: s_or_b32 s65, s5, s7 ; SI-NEXT: s_and_b32 s5, s27, 0xffff -; SI-NEXT: s_lshl_b32 s7, s91, 16 -; SI-NEXT: s_or_b32 s6, s4, s60 +; SI-NEXT: s_lshl_b32 s7, s93, 16 +; SI-NEXT: s_or_b32 s10, s4, s64 ; SI-NEXT: s_and_b32 s4, s26, 0xffff -; SI-NEXT: s_lshl_b32 s42, s35, 16 -; SI-NEXT: s_or_b32 s43, s5, s7 +; SI-NEXT: s_lshl_b32 s66, s37, 16 +; SI-NEXT: s_or_b32 s67, s5, s7 ; SI-NEXT: s_and_b32 s5, s29, 0xffff -; SI-NEXT: s_lshl_b32 s7, s92, 16 -; SI-NEXT: s_or_b32 s4, s4, s42 -; SI-NEXT: s_lshl_b32 s40, s36, 16 -; SI-NEXT: s_or_b32 s41, s5, s7 -; SI-NEXT: s_and_b32 s5, s37, 0xffff -; SI-NEXT: s_lshl_b32 s7, s93, 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 16 -; SI-NEXT: s_and_b32 s42, s28, 0xffff -; SI-NEXT: s_or_b32 s75, s5, s7 -; SI-NEXT: s_lshl_b32 s74, s38, 16 -; SI-NEXT: s_or_b32 s42, s42, s40 -; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16 -; SI-NEXT: s_and_b32 s40, s39, 0xffff -; SI-NEXT: s_mov_b32 s15, s45 -; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16 -; SI-NEXT: s_mov_b32 s13, s47 -; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16 -; SI-NEXT: s_mov_b32 s11, s57 -; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16 -; SI-NEXT: s_mov_b32 s9, s59 -; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16 -; SI-NEXT: s_mov_b32 s7, s61 -; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16 -; SI-NEXT: s_mov_b32 s5, s43 -; SI-NEXT: s_mov_b32 s43, s41 -; SI-NEXT: s_or_b32 s40, s40, s74 -; SI-NEXT: s_mov_b32 s41, s75 -; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16 +; SI-NEXT: s_lshl_b32 s7, s94, 16 +; SI-NEXT: s_or_b32 s8, s4, s66 +; SI-NEXT: s_and_b32 s4, s28, 0xffff +; SI-NEXT: s_lshl_b32 s68, s38, 16 +; SI-NEXT: s_or_b32 s69, s5, s7 +; SI-NEXT: s_and_b32 s5, s39, 0xffff +; SI-NEXT: s_lshl_b32 s7, s95, 16 +; SI-NEXT: s_or_b32 s6, s4, s68 +; SI-NEXT: s_and_b32 s4, s49, 0xffff +; SI-NEXT: s_lshl_b32 s76, s48, 16 +; SI-NEXT: s_or_b32 s77, s5, s7 +; SI-NEXT: s_or_b32 s4, s4, s76 +; SI-NEXT: s_lshr_b64 s[44:45], vcc, 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[50:51], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[52:53], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[54:55], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[64:65], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[66:67], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[68:69], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[76:77], 16 +; SI-NEXT: s_mov_b32 s43, vcc_hi +; SI-NEXT: s_mov_b32 s41, s51 +; SI-NEXT: s_mov_b32 s15, s53 +; SI-NEXT: s_mov_b32 s13, s55 +; SI-NEXT: s_mov_b32 s11, s65 +; SI-NEXT: s_mov_b32 s9, s67 +; SI-NEXT: s_mov_b32 s7, s69 +; SI-NEXT: s_mov_b32 s5, s77 ; SI-NEXT: s_cbranch_execnz .LBB89_3 ; SI-NEXT: .LBB89_2: ; %cmp.true +; SI-NEXT: s_add_i32 s49, s49, 3 +; SI-NEXT: s_and_b32 s4, s49, 0xffff +; SI-NEXT: s_lshl_b32 s5, s48, 16 ; SI-NEXT: s_add_i32 s39, s39, 3 -; SI-NEXT: s_and_b32 s4, s39, 0xffff -; SI-NEXT: s_lshl_b32 s5, s38, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s37, s37, 3 -; SI-NEXT: s_add_i32 s40, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s37, 0xffff -; SI-NEXT: s_lshl_b32 s5, s93, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_and_b32 s5, s39, 0xffff +; SI-NEXT: s_lshl_b32 s6, s95, 16 ; SI-NEXT: s_add_i32 s28, s28, 3 -; SI-NEXT: s_add_i32 s41, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s5, s36, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_or_b32 s5, s6, s5 +; SI-NEXT: s_and_b32 s6, s28, 0xffff +; SI-NEXT: s_lshl_b32 s7, s38, 16 ; SI-NEXT: s_add_i32 s29, s29, 3 -; SI-NEXT: s_add_i32 s42, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s29, 0xffff -; SI-NEXT: s_lshl_b32 s5, s92, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_or_b32 s6, s7, s6 +; SI-NEXT: s_and_b32 s7, s29, 0xffff +; SI-NEXT: s_lshl_b32 s8, s94, 16 ; SI-NEXT: s_add_i32 s26, s26, 3 -; SI-NEXT: s_add_i32 s43, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s26, 0xffff -; SI-NEXT: s_lshl_b32 s5, s35, 16 +; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_and_b32 s8, s26, 0xffff +; SI-NEXT: s_lshl_b32 s9, s37, 16 ; SI-NEXT: s_add_i32 s27, s27, 3 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s27, 0xffff -; SI-NEXT: s_lshl_b32 s6, s91, 16 +; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_and_b32 s9, s27, 0xffff +; SI-NEXT: s_lshl_b32 s10, s93, 16 ; SI-NEXT: s_add_i32 s24, s24, 3 -; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s24, 0xffff -; SI-NEXT: s_lshl_b32 s7, s34, 16 +; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: s_and_b32 s10, s24, 0xffff +; SI-NEXT: s_lshl_b32 s11, s36, 16 ; SI-NEXT: s_add_i32 s25, s25, 3 -; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s25, 0xffff -; SI-NEXT: s_lshl_b32 s8, s90, 16 +; SI-NEXT: s_or_b32 s10, s11, s10 +; SI-NEXT: s_and_b32 s11, s25, 0xffff +; SI-NEXT: s_lshl_b32 s12, s92, 16 ; SI-NEXT: s_add_i32 s22, s22, 3 -; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s22, 0xffff -; SI-NEXT: s_lshl_b32 s9, s31, 16 +; SI-NEXT: s_or_b32 s11, s12, s11 +; SI-NEXT: s_and_b32 s12, s22, 0xffff +; SI-NEXT: s_lshl_b32 s13, s35, 16 ; SI-NEXT: s_add_i32 s23, s23, 3 -; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s23, 0xffff -; SI-NEXT: s_lshl_b32 s10, s89, 16 +; SI-NEXT: s_or_b32 s12, s13, s12 +; SI-NEXT: s_and_b32 s13, s23, 0xffff +; SI-NEXT: s_lshl_b32 s14, s91, 16 ; SI-NEXT: s_add_i32 s20, s20, 3 -; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s20, 0xffff -; SI-NEXT: s_lshl_b32 s11, s30, 16 +; SI-NEXT: s_or_b32 s13, s14, s13 +; SI-NEXT: s_and_b32 s14, s20, 0xffff +; SI-NEXT: s_lshl_b32 s15, s34, 16 ; SI-NEXT: s_add_i32 s21, s21, 3 -; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s21, 0xffff -; SI-NEXT: s_lshl_b32 s12, s88, 16 +; SI-NEXT: s_or_b32 s14, s15, s14 +; SI-NEXT: s_and_b32 s15, s21, 0xffff +; SI-NEXT: s_lshl_b32 s20, s90, 16 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s12, s18, 0xffff -; SI-NEXT: s_lshl_b32 s13, s95, 16 +; SI-NEXT: s_or_b32 s15, s20, s15 +; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s20, s31, 16 +; SI-NEXT: s_or_b32 s18, s20, s18 ; SI-NEXT: s_add_i32 s19, s19, 3 -; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s13, s19, 0xffff -; SI-NEXT: s_lshl_b32 s14, s79, 16 +; SI-NEXT: s_add_i32 s40, s18, 0x30000 +; SI-NEXT: s_and_b32 s18, s19, 0xffff +; SI-NEXT: s_lshl_b32 s19, s89, 16 +; SI-NEXT: s_or_b32 s18, s19, s18 ; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: s_and_b32 s14, s16, 0xffff -; SI-NEXT: s_lshl_b32 s15, s94, 16 +; SI-NEXT: s_add_i32 s41, s18, 0x30000 +; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s18, s30, 16 +; SI-NEXT: s_or_b32 s16, s18, s16 ; SI-NEXT: s_add_i32 s17, s17, 3 -; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_and_b32 s15, s17, 0xffff -; SI-NEXT: s_lshl_b32 s16, s78, 16 -; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_add_i32 s42, s16, 0x30000 +; SI-NEXT: s_and_b32 s16, s17, 0xffff +; SI-NEXT: s_lshl_b32 s17, s88, 16 +; SI-NEXT: s_or_b32 s16, s17, s16 ; SI-NEXT: s_add_i32 s4, s4, 0x30000 ; SI-NEXT: s_add_i32 s5, s5, 0x30000 ; SI-NEXT: s_add_i32 s6, s6, 0x30000 @@ -58186,89 +58120,104 @@ define inreg <32 x half> @bitcast_v32i16_to_v32f16_scalar(<32 x i16> inreg %a, i ; SI-NEXT: s_add_i32 s13, s13, 0x30000 ; SI-NEXT: s_add_i32 s14, s14, 0x30000 ; SI-NEXT: s_add_i32 s15, s15, 0x30000 -; SI-NEXT: s_lshr_b64 s[44:45], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 -; SI-NEXT: s_lshr_b32 s78, s15, 16 -; SI-NEXT: s_lshr_b32 s79, s13, 16 -; SI-NEXT: s_lshr_b32 s88, s11, 16 -; SI-NEXT: s_lshr_b32 s89, s9, 16 -; SI-NEXT: s_lshr_b32 s90, s7, 16 -; SI-NEXT: s_lshr_b32 s91, s5, 16 -; SI-NEXT: s_lshr_b32 s92, s43, 16 -; SI-NEXT: s_lshr_b32 s93, s41, 16 +; SI-NEXT: s_add_i32 s43, s16, 0x30000 +; SI-NEXT: s_lshr_b64 s[44:45], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 +; SI-NEXT: s_lshr_b32 s88, s43, 16 +; SI-NEXT: s_lshr_b32 s89, s41, 16 +; SI-NEXT: s_lshr_b32 s90, s15, 16 +; SI-NEXT: s_lshr_b32 s91, s13, 16 +; SI-NEXT: s_lshr_b32 s92, s11, 16 +; SI-NEXT: s_lshr_b32 s93, s9, 16 +; SI-NEXT: s_lshr_b32 s94, s7, 16 +; SI-NEXT: s_lshr_b32 s95, s5, 16 ; SI-NEXT: .LBB89_3: ; %end +; SI-NEXT: s_and_b32 s16, s42, 0xffff +; SI-NEXT: s_lshl_b32 s17, s44, 16 +; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_and_b32 s17, s43, 0xffff +; SI-NEXT: s_lshl_b32 s18, s88, 16 +; SI-NEXT: s_or_b32 s17, s17, s18 +; SI-NEXT: s_and_b32 s18, s40, 0xffff +; SI-NEXT: s_lshl_b32 s19, s46, 16 +; SI-NEXT: s_or_b32 s18, s18, s19 +; SI-NEXT: s_and_b32 s19, s41, 0xffff +; SI-NEXT: s_lshl_b32 s20, s89, 16 +; SI-NEXT: s_or_b32 s19, s19, s20 ; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s16, s44, 16 -; SI-NEXT: s_or_b32 s14, s14, s16 +; SI-NEXT: s_lshl_b32 s20, s56, 16 +; SI-NEXT: s_or_b32 s14, s14, s20 ; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s16, s78, 16 -; SI-NEXT: s_or_b32 s15, s15, s16 +; SI-NEXT: s_lshl_b32 s20, s90, 16 +; SI-NEXT: s_or_b32 s15, s15, s20 ; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s16, s46, 16 -; SI-NEXT: s_or_b32 s12, s12, s16 +; SI-NEXT: s_lshl_b32 s20, s58, 16 +; SI-NEXT: s_or_b32 s12, s12, s20 ; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s16, s79, 16 -; SI-NEXT: s_or_b32 s13, s13, s16 +; SI-NEXT: s_lshl_b32 s20, s91, 16 +; SI-NEXT: s_or_b32 s13, s13, s20 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s16, s56, 16 -; SI-NEXT: s_or_b32 s10, s10, s16 +; SI-NEXT: s_lshl_b32 s20, s60, 16 +; SI-NEXT: s_or_b32 s10, s10, s20 ; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s16, s88, 16 -; SI-NEXT: s_or_b32 s11, s11, s16 +; SI-NEXT: s_lshl_b32 s20, s92, 16 +; SI-NEXT: s_or_b32 s11, s11, s20 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s16, s58, 16 -; SI-NEXT: s_or_b32 s8, s8, s16 +; SI-NEXT: s_lshl_b32 s20, s62, 16 +; SI-NEXT: s_or_b32 s8, s8, s20 ; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s16, s89, 16 -; SI-NEXT: s_or_b32 s9, s9, s16 +; SI-NEXT: s_lshl_b32 s20, s93, 16 +; SI-NEXT: s_or_b32 s9, s9, s20 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s16, s60, 16 -; SI-NEXT: s_or_b32 s6, s6, s16 +; SI-NEXT: s_lshl_b32 s20, s72, 16 +; SI-NEXT: s_or_b32 s6, s6, s20 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s16, s90, 16 -; SI-NEXT: s_or_b32 s7, s7, s16 +; SI-NEXT: s_lshl_b32 s20, s94, 16 +; SI-NEXT: s_or_b32 s7, s7, s20 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s16, s62, 16 -; SI-NEXT: s_or_b32 s4, s4, s16 +; SI-NEXT: s_lshl_b32 s20, s74, 16 +; SI-NEXT: s_or_b32 s4, s4, s20 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s16, s91, 16 -; SI-NEXT: s_or_b32 s5, s5, s16 -; SI-NEXT: s_and_b32 s16, s42, 0xffff -; SI-NEXT: s_lshl_b32 s17, s72, 16 -; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s43, 0xffff -; SI-NEXT: s_lshl_b32 s18, s92, 16 -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s18, s40, 0xffff -; SI-NEXT: s_lshl_b32 s19, s74, 16 -; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_and_b32 s19, s41, 0xffff -; SI-NEXT: s_lshl_b32 s20, s93, 16 -; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: v_readlane_b32 s30, v16, 6 -; SI-NEXT: v_mov_b32_e32 v0, s14 -; SI-NEXT: v_mov_b32_e32 v1, s15 -; SI-NEXT: v_mov_b32_e32 v2, s12 -; SI-NEXT: v_mov_b32_e32 v3, s13 -; SI-NEXT: v_mov_b32_e32 v4, s10 -; SI-NEXT: v_mov_b32_e32 v5, s11 -; SI-NEXT: v_mov_b32_e32 v6, s8 -; SI-NEXT: v_mov_b32_e32 v7, s9 -; SI-NEXT: v_mov_b32_e32 v8, s6 -; SI-NEXT: v_mov_b32_e32 v9, s7 -; SI-NEXT: v_mov_b32_e32 v10, s4 -; SI-NEXT: v_mov_b32_e32 v11, s5 -; SI-NEXT: v_mov_b32_e32 v12, s16 -; SI-NEXT: v_mov_b32_e32 v13, s17 -; SI-NEXT: v_mov_b32_e32 v14, s18 -; SI-NEXT: v_mov_b32_e32 v15, s19 -; SI-NEXT: v_readlane_b32 s31, v16, 7 +; SI-NEXT: s_lshl_b32 s20, s95, 16 +; SI-NEXT: s_or_b32 s5, s5, s20 +; SI-NEXT: v_readlane_b32 s30, v16, 20 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v4, s14 +; SI-NEXT: v_mov_b32_e32 v5, s15 +; SI-NEXT: v_mov_b32_e32 v6, s12 +; SI-NEXT: v_mov_b32_e32 v7, s13 +; SI-NEXT: v_mov_b32_e32 v8, s10 +; SI-NEXT: v_mov_b32_e32 v9, s11 +; SI-NEXT: v_mov_b32_e32 v10, s8 +; SI-NEXT: v_mov_b32_e32 v11, s9 +; SI-NEXT: v_mov_b32_e32 v12, s6 +; SI-NEXT: v_mov_b32_e32 v13, s7 +; SI-NEXT: v_mov_b32_e32 v14, s4 +; SI-NEXT: v_mov_b32_e32 v15, s5 +; SI-NEXT: v_readlane_b32 s31, v16, 21 +; SI-NEXT: v_readlane_b32 s69, v16, 19 +; SI-NEXT: v_readlane_b32 s68, v16, 18 +; SI-NEXT: v_readlane_b32 s67, v16, 17 +; SI-NEXT: v_readlane_b32 s66, v16, 16 +; SI-NEXT: v_readlane_b32 s65, v16, 15 +; SI-NEXT: v_readlane_b32 s64, v16, 14 +; SI-NEXT: v_readlane_b32 s55, v16, 13 +; SI-NEXT: v_readlane_b32 s54, v16, 12 +; SI-NEXT: v_readlane_b32 s53, v16, 11 +; SI-NEXT: v_readlane_b32 s52, v16, 10 +; SI-NEXT: v_readlane_b32 s51, v16, 9 +; SI-NEXT: v_readlane_b32 s50, v16, 8 +; SI-NEXT: v_readlane_b32 s49, v16, 7 +; SI-NEXT: v_readlane_b32 s48, v16, 6 ; SI-NEXT: v_readlane_b32 s39, v16, 5 ; SI-NEXT: v_readlane_b32 s38, v16, 4 ; SI-NEXT: v_readlane_b32 s37, v16, 3 @@ -58281,21 +58230,21 @@ define inreg <32 x half> @bitcast_v32i16_to_v32f16_scalar(<32 x i16> inreg %a, i ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB89_4: -; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr42 ; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr12 ; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: s_branch .LBB89_2 ; @@ -58888,158 +58837,158 @@ define inreg <32 x i16> @bitcast_v32f16_to_v32i16_scalar(<32 x half> inreg %a, i ; SI-LABEL: bitcast_v32f16_to_v32i16_scalar: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: v_readfirstlane_b32 s7, v1 -; SI-NEXT: v_readfirstlane_b32 s6, v0 -; SI-NEXT: s_lshr_b32 s41, s29, 16 -; SI-NEXT: s_lshr_b32 s13, s28, 16 -; SI-NEXT: s_lshr_b32 s42, s27, 16 -; SI-NEXT: s_lshr_b32 s14, s26, 16 -; SI-NEXT: s_lshr_b32 s12, s25, 16 -; SI-NEXT: s_lshr_b32 s40, s24, 16 -; SI-NEXT: s_lshr_b32 s11, s23, 16 -; SI-NEXT: s_lshr_b32 s43, s22, 16 -; SI-NEXT: s_lshr_b32 s10, s21, 16 +; SI-NEXT: v_readfirstlane_b32 s41, v1 +; SI-NEXT: v_readfirstlane_b32 s8, v0 +; SI-NEXT: s_lshr_b32 s40, s29, 16 +; SI-NEXT: s_lshr_b32 s6, s28, 16 +; SI-NEXT: s_lshr_b32 s14, s27, 16 +; SI-NEXT: s_lshr_b32 s15, s26, 16 +; SI-NEXT: s_lshr_b32 s13, s25, 16 +; SI-NEXT: s_lshr_b32 s43, s24, 16 +; SI-NEXT: s_lshr_b32 s12, s23, 16 +; SI-NEXT: s_lshr_b32 s44, s22, 16 +; SI-NEXT: s_lshr_b32 s11, s21, 16 ; SI-NEXT: s_lshr_b32 s45, s20, 16 -; SI-NEXT: s_lshr_b32 s9, s19, 16 +; SI-NEXT: s_lshr_b32 s10, s19, 16 ; SI-NEXT: s_lshr_b32 s46, s18, 16 -; SI-NEXT: s_lshr_b32 s8, s17, 16 +; SI-NEXT: s_lshr_b32 s9, s17, 16 ; SI-NEXT: s_lshr_b32 s47, s16, 16 -; SI-NEXT: s_lshr_b32 s44, s7, 16 -; SI-NEXT: s_lshr_b32 s15, s6, 16 +; SI-NEXT: s_lshr_b32 s42, s41, 16 +; SI-NEXT: s_lshr_b32 s7, s8, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v2 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB91_3 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_cbranch_execnz .LBB91_4 ; SI-NEXT: .LBB91_2: ; %cmp.true +; SI-NEXT: v_cvt_f32_f16_e32 v0, s47 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s16 ; SI-NEXT: v_cvt_f32_f16_e32 v2, s46 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s45 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s18 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 +; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v2 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v2 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s43 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s40 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s14 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v32, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s45 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v34, v3, v2 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s44 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s22 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s27 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_or_b32_e32 v35, v3, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s43 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s13 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s15 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s44 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s24 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s42 -; SI-NEXT: v_cvt_f16_f32_e32 v32, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s27 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s12 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s41 +; SI-NEXT: v_or_b32_e32 v33, v5, v6 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v33, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s40 +; SI-NEXT: v_cvt_f16_f32_e32 v36, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v34, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s25 -; SI-NEXT: v_or_b32_e32 v11, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s11 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v37, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s29 +; SI-NEXT: v_or_b32_e32 v15, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s14 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v37 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v35, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v38, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v34 -; SI-NEXT: v_or_b32_e32 v9, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 -; SI-NEXT: v_or_b32_e32 v7, v3, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s21 +; SI-NEXT: v_or_b32_e32 v13, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s13 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v38 +; SI-NEXT: v_or_b32_e32 v11, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s25 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s12 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s9 -; SI-NEXT: v_cvt_f16_f32_e32 v36, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v39, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v37, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s19 -; SI-NEXT: v_or_b32_e32 v5, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s8 -; SI-NEXT: v_cvt_f32_f16_e32 v19, s17 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v48, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v39 +; SI-NEXT: v_or_b32_e32 v9, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s11 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v48 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v39, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s41 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v37 -; SI-NEXT: v_or_b32_e32 v3, v15, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s29 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39 -; SI-NEXT: v_or_b32_e32 v1, v19, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v19, s7 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v38, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s47 -; SI-NEXT: v_or_b32_e32 v13, v13, v19 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v18, s20 -; SI-NEXT: v_or_b32_e32 v15, v15, v19 -; SI-NEXT: v_cvt_f32_f16_e32 v19, s22 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_or_b32_e32 v55, v16, v0 -; SI-NEXT: v_or_b32_e32 v53, v17, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v16, s24 -; SI-NEXT: v_or_b32_e32 v52, v18, v4 -; SI-NEXT: v_or_b32_e32 v49, v19, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s26 -; SI-NEXT: v_cvt_f32_f16_e32 v18, s28 -; SI-NEXT: v_cvt_f32_f16_e32 v19, s6 +; SI-NEXT: v_cvt_f16_f32_e32 v49, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v7, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s10 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v49 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s17 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_or_b32_e32 v5, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v50, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s9 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s15 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v51, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v50 +; SI-NEXT: v_or_b32_e32 v3, v3, v14 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v51 +; SI-NEXT: v_or_b32_e32 v1, v1, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s26 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v53, v12, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s6 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_or_b32_e32 v52, v14, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s28 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s7 +; SI-NEXT: v_cvt_f32_f16_e32 v17, s8 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v54, v16, v8 -; SI-NEXT: v_or_b32_e32 v51, v17, v10 -; SI-NEXT: v_or_b32_e32 v50, v18, v12 -; SI-NEXT: v_or_b32_e32 v48, v19, v14 +; SI-NEXT: v_or_b32_e32 v55, v14, v12 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 +; SI-NEXT: v_or_b32_e32 v54, v17, v14 ; SI-NEXT: v_lshr_b64 v[30:31], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[28:29], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[26:27], v[4:5], 16 @@ -59052,86 +59001,86 @@ define inreg <32 x i16> @bitcast_v32f16_to_v32i16_scalar(<32 x half> inreg %a, i ; SI-NEXT: .LBB91_3: ; SI-NEXT: s_branch .LBB91_2 ; SI-NEXT: .LBB91_4: -; SI-NEXT: v_mov_b32_e32 v32, s44 -; SI-NEXT: v_mov_b32_e32 v38, s41 -; SI-NEXT: v_mov_b32_e32 v33, s42 -; SI-NEXT: v_mov_b32_e32 v34, s12 -; SI-NEXT: v_mov_b32_e32 v35, s11 -; SI-NEXT: v_mov_b32_e32 v36, s10 -; SI-NEXT: v_mov_b32_e32 v37, s9 -; SI-NEXT: v_mov_b32_e32 v39, s8 +; SI-NEXT: v_mov_b32_e32 v36, s42 +; SI-NEXT: v_mov_b32_e32 v37, s40 +; SI-NEXT: v_mov_b32_e32 v38, s14 +; SI-NEXT: v_mov_b32_e32 v39, s13 +; SI-NEXT: v_mov_b32_e32 v48, s12 +; SI-NEXT: v_mov_b32_e32 v49, s11 +; SI-NEXT: v_mov_b32_e32 v50, s10 +; SI-NEXT: v_mov_b32_e32 v51, s9 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v48, s6 -; SI-NEXT: v_mov_b32_e32 v50, s28 -; SI-NEXT: v_mov_b32_e32 v51, s26 -; SI-NEXT: v_mov_b32_e32 v54, s24 -; SI-NEXT: v_mov_b32_e32 v49, s22 -; SI-NEXT: v_mov_b32_e32 v52, s20 -; SI-NEXT: v_mov_b32_e32 v53, s18 -; SI-NEXT: v_mov_b32_e32 v55, s16 ; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v13, s29 -; SI-NEXT: v_mov_b32_e32 v15, s7 +; SI-NEXT: v_mov_b32_e32 v15, s41 +; SI-NEXT: v_mov_b32_e32 v54, s8 +; SI-NEXT: v_mov_b32_e32 v55, s28 +; SI-NEXT: v_mov_b32_e32 v52, s26 +; SI-NEXT: v_mov_b32_e32 v53, s24 +; SI-NEXT: v_mov_b32_e32 v33, s22 +; SI-NEXT: v_mov_b32_e32 v35, s20 +; SI-NEXT: v_mov_b32_e32 v34, s18 +; SI-NEXT: v_mov_b32_e32 v32, s16 ; SI-NEXT: v_mov_b32_e32 v30, s47 ; SI-NEXT: v_mov_b32_e32 v28, s46 ; SI-NEXT: v_mov_b32_e32 v26, s45 -; SI-NEXT: v_mov_b32_e32 v24, s43 -; SI-NEXT: v_mov_b32_e32 v22, s40 -; SI-NEXT: v_mov_b32_e32 v20, s14 -; SI-NEXT: v_mov_b32_e32 v18, s13 -; SI-NEXT: v_mov_b32_e32 v16, s15 +; SI-NEXT: v_mov_b32_e32 v24, s44 +; SI-NEXT: v_mov_b32_e32 v22, s43 +; SI-NEXT: v_mov_b32_e32 v20, s15 +; SI-NEXT: v_mov_b32_e32 v18, s6 +; SI-NEXT: v_mov_b32_e32 v16, s7 ; SI-NEXT: .LBB91_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v30 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v55 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v32 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v30 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v51 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v28 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v53 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v34 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v28 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v50 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v26 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v52 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v35 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v26 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v49 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v24 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v49 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v33 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v24 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v48 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v54 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v53 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v22 ; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v39 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v51 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v52 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v20 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v38 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v50 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v18 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v37 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v48 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v54 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v36 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 ; SI-NEXT: s_setpc_b64 s[30:31] ; @@ -59139,10 +59088,10 @@ define inreg <32 x i16> @bitcast_v32f16_to_v32i16_scalar(<32 x half> inreg %a, i ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v18, s30, 0 -; VI-NEXT: v_writelane_b32 v18, s31, 1 +; VI-NEXT: v_writelane_b32 v20, s30, 0 +; VI-NEXT: v_writelane_b32 v20, s31, 1 ; VI-NEXT: v_readfirstlane_b32 s4, v2 ; VI-NEXT: v_readfirstlane_b32 s31, v1 ; VI-NEXT: s_cmp_lg_u32 s4, 0 @@ -59151,87 +59100,87 @@ define inreg <32 x i16> @bitcast_v32f16_to_v32i16_scalar(<32 x half> inreg %a, i ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB91_4 ; VI-NEXT: .LBB91_2: ; %cmp.true -; VI-NEXT: s_lshr_b32 s5, s30, 16 -; VI-NEXT: v_mov_b32_e32 v1, 0x200 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: s_lshr_b32 s5, s31, 16 -; VI-NEXT: v_add_f16_e32 v2, s30, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v5, s5 -; VI-NEXT: s_lshr_b32 s5, s29, 16 -; VI-NEXT: v_or_b32_e32 v14, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s29, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s28, 16 -; VI-NEXT: v_or_b32_e32 v13, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s28, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s27, 16 -; VI-NEXT: v_or_b32_e32 v12, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s27, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s26, 16 -; VI-NEXT: v_or_b32_e32 v11, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s26, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s25, 16 -; VI-NEXT: v_or_b32_e32 v10, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s25, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s24, 16 -; VI-NEXT: v_or_b32_e32 v9, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s24, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s23, 16 -; VI-NEXT: v_or_b32_e32 v8, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s23, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s22, 16 -; VI-NEXT: v_or_b32_e32 v7, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s22, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s21, 16 -; VI-NEXT: v_or_b32_e32 v6, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v4, s31, v1 -; VI-NEXT: v_add_f16_sdwa v5, v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v2, s21, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s20, 16 -; VI-NEXT: v_or_b32_e32 v15, v4, v5 -; VI-NEXT: v_or_b32_e32 v5, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s20, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s19, 16 -; VI-NEXT: v_or_b32_e32 v4, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: s_lshr_b32 s5, s18, 16 -; VI-NEXT: v_add_f16_e32 v2, s19, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v16, s5 +; VI-NEXT: v_mov_b32_e32 v0, 0x200 +; VI-NEXT: v_add_f16_e32 v16, s16, v0 ; VI-NEXT: s_lshr_b32 s4, s16, 16 -; VI-NEXT: v_or_b32_e32 v3, v2, v3 -; VI-NEXT: v_add_f16_e32 v2, s18, v1 -; VI-NEXT: v_add_f16_sdwa v16, v16, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v2, v2, v16 -; VI-NEXT: v_mov_b32_e32 v16, s4 +; VI-NEXT: s_lshr_b32 s16, s31, 16 +; VI-NEXT: v_mov_b32_e32 v15, s16 +; VI-NEXT: s_lshr_b32 s15, s30, 16 +; VI-NEXT: v_add_f16_e32 v14, s31, v0 +; VI-NEXT: v_add_f16_sdwa v15, v15, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v15, v14, v15 +; VI-NEXT: v_mov_b32_e32 v14, s15 +; VI-NEXT: s_lshr_b32 s14, s29, 16 +; VI-NEXT: v_add_f16_e32 v13, s30, v0 +; VI-NEXT: v_add_f16_sdwa v14, v14, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v14, v13, v14 +; VI-NEXT: v_mov_b32_e32 v13, s14 +; VI-NEXT: s_lshr_b32 s13, s28, 16 +; VI-NEXT: v_add_f16_e32 v12, s29, v0 +; VI-NEXT: v_add_f16_sdwa v13, v13, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v13, v12, v13 +; VI-NEXT: v_mov_b32_e32 v12, s13 +; VI-NEXT: s_lshr_b32 s12, s27, 16 +; VI-NEXT: v_add_f16_e32 v11, s28, v0 +; VI-NEXT: v_add_f16_sdwa v12, v12, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v12, v11, v12 +; VI-NEXT: v_mov_b32_e32 v11, s12 +; VI-NEXT: s_lshr_b32 s11, s26, 16 +; VI-NEXT: v_add_f16_e32 v10, s27, v0 +; VI-NEXT: v_add_f16_sdwa v11, v11, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v11, v10, v11 +; VI-NEXT: v_mov_b32_e32 v10, s11 +; VI-NEXT: s_lshr_b32 s10, s25, 16 +; VI-NEXT: v_add_f16_e32 v9, s26, v0 +; VI-NEXT: v_add_f16_sdwa v10, v10, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v10, v9, v10 +; VI-NEXT: v_mov_b32_e32 v9, s10 +; VI-NEXT: s_lshr_b32 s9, s24, 16 +; VI-NEXT: v_add_f16_e32 v8, s25, v0 +; VI-NEXT: v_add_f16_sdwa v9, v9, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v9, v8, v9 +; VI-NEXT: v_mov_b32_e32 v8, s9 +; VI-NEXT: s_lshr_b32 s8, s23, 16 +; VI-NEXT: v_add_f16_e32 v7, s24, v0 +; VI-NEXT: v_add_f16_sdwa v8, v8, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v8, v7, v8 +; VI-NEXT: v_mov_b32_e32 v7, s8 +; VI-NEXT: s_lshr_b32 s7, s22, 16 +; VI-NEXT: v_add_f16_e32 v6, s23, v0 +; VI-NEXT: v_add_f16_sdwa v7, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v7, v6, v7 +; VI-NEXT: v_mov_b32_e32 v6, s7 +; VI-NEXT: s_lshr_b32 s6, s21, 16 +; VI-NEXT: v_add_f16_e32 v5, s22, v0 +; VI-NEXT: v_add_f16_sdwa v6, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: s_lshr_b32 s4, s17, 16 -; VI-NEXT: v_mov_b32_e32 v17, s4 -; VI-NEXT: v_add_f16_e32 v0, s16, v1 -; VI-NEXT: v_add_f16_sdwa v16, v16, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_sdwa v17, v17, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v1, s17, v1 -; VI-NEXT: v_or_b32_e32 v1, v1, v17 -; VI-NEXT: v_or_b32_e32 v0, v0, v16 +; VI-NEXT: v_or_b32_e32 v6, v5, v6 +; VI-NEXT: v_mov_b32_e32 v5, s6 +; VI-NEXT: v_mov_b32_e32 v2, s4 +; VI-NEXT: s_lshr_b32 s4, s18, 16 +; VI-NEXT: s_lshr_b32 s5, s20, 16 +; VI-NEXT: v_add_f16_e32 v4, s21, v0 +; VI-NEXT: v_add_f16_sdwa v5, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v3, s4 +; VI-NEXT: v_or_b32_e32 v5, v4, v5 +; VI-NEXT: v_mov_b32_e32 v4, s5 +; VI-NEXT: v_add_f16_sdwa v19, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: s_lshr_b32 s4, s19, 16 +; VI-NEXT: v_add_f16_e32 v3, s20, v0 +; VI-NEXT: v_add_f16_sdwa v4, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v4, v3, v4 +; VI-NEXT: v_mov_b32_e32 v3, s4 +; VI-NEXT: v_add_f16_sdwa v17, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, s17, v0 +; VI-NEXT: v_add_f16_sdwa v18, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s18, v0 +; VI-NEXT: v_add_f16_sdwa v3, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v0, s19, v0 +; VI-NEXT: v_or_b32_e32 v3, v0, v3 +; VI-NEXT: v_or_b32_e32 v2, v2, v19 +; VI-NEXT: v_or_b32_e32 v1, v1, v18 +; VI-NEXT: v_or_b32_e32 v0, v16, v17 ; VI-NEXT: s_branch .LBB91_5 ; VI-NEXT: .LBB91_3: ; VI-NEXT: s_branch .LBB91_2 @@ -59253,10 +59202,10 @@ define inreg <32 x i16> @bitcast_v32f16_to_v32i16_scalar(<32 x half> inreg %a, i ; VI-NEXT: v_mov_b32_e32 v14, s30 ; VI-NEXT: v_mov_b32_e32 v15, s31 ; VI-NEXT: .LBB91_5: ; %end -; VI-NEXT: v_readlane_b32 s30, v18, 0 -; VI-NEXT: v_readlane_b32 s31, v18, 1 +; VI-NEXT: v_readlane_b32 s30, v20, 0 +; VI-NEXT: v_readlane_b32 s31, v20, 1 ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -61840,203 +61789,210 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a ; SI-NEXT: s_cmp_lg_u32 s46, 0 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mul_f32_e64 v63, 1.0, s16 -; SI-NEXT: v_mul_f32_e64 v6, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v50, 1.0, s17 -; SI-NEXT: v_mul_f32_e64 v4, 1.0, s40 +; SI-NEXT: v_mul_f32_e64 v1, 1.0, s41 +; SI-NEXT: v_mul_f32_e64 v52, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v24, 1.0, s40 ; SI-NEXT: v_mul_f32_e64 v62, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v10, 1.0, s29 -; SI-NEXT: v_mul_f32_e64 v2, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v6, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v4, 1.0, s19 +; SI-NEXT: v_mul_f32_e64 v2, 1.0, s28 ; SI-NEXT: v_mul_f32_e64 v61, 1.0, s20 -; SI-NEXT: v_mul_f32_e64 v14, 1.0, s27 -; SI-NEXT: v_mul_f32_e64 v37, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v10, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v48, 1.0, s21 ; SI-NEXT: v_mul_f32_e64 v22, 1.0, s26 ; SI-NEXT: v_mul_f32_e64 v60, 1.0, s22 -; SI-NEXT: v_mul_f32_e64 v59, 1.0, s25 -; SI-NEXT: v_mul_f32_e64 v34, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v14, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v37, 1.0, s23 ; SI-NEXT: v_mul_f32_e64 v8, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v58, 1.0, s15 -; SI-NEXT: v_mul_f32_e64 v57, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v59, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s14 +; SI-NEXT: v_mul_f32_e64 v35, 1.0, s13 ; SI-NEXT: v_mul_f32_e64 v20, 1.0, s12 -; SI-NEXT: v_mul_f32_e64 v56, 1.0, s11 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s10 -; SI-NEXT: v_mul_f32_e64 v32, 1.0, s9 +; SI-NEXT: v_mul_f32_e64 v57, 1.0, s11 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v33, 1.0, s9 ; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8 -; SI-NEXT: v_mul_f32_e64 v46, 1.0, s7 -; SI-NEXT: v_mul_f32_e64 v45, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v30, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s6 +; SI-NEXT: v_mul_f32_e64 v31, 1.0, s5 ; SI-NEXT: v_mul_f32_e64 v18, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v44, 1.0, s44 -; SI-NEXT: v_mul_f32_e64 v28, 1.0, s45 -; SI-NEXT: v_mul_f32_e64 v55, 1.0, s42 +; SI-NEXT: v_mul_f32_e64 v55, 1.0, s44 +; SI-NEXT: v_mul_f32_e64 v29, 1.0, s45 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s42 ; SI-NEXT: v_mul_f32_e64 v16, 1.0, s43 ; SI-NEXT: s_cbranch_scc0 .LBB95_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v63 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v6 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v4 -; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v62 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v0 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v61 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v14 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v60 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v58 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v63 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v52 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v24 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v62 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v6 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v2 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v61 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v10 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v48 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v22 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v60 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v37 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v8 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v59 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v58 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v35 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v20 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v56 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v45 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v18 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v44 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v16 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v50 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v37 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v34 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v48 -; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v32 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v30 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v55 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v33 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v31 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v18 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v55 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v50 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v16 ; SI-NEXT: s_cbranch_execnz .LBB95_3 ; SI-NEXT: .LBB95_2: ; %cmp.true -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v63 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v63 +; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v1 +; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v39 +; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v62 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v6 -; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v39 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v1 ; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], 16 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v62 -; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v10 -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v1 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v61 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v10 +; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v3 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v61 ; SI-NEXT: v_lshr_b64 v[9:10], v[6:7], 16 -; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v14 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v1 -; SI-NEXT: v_lshr_b64 v[13:14], v[6:7], 16 -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v59 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v14 ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v60 ; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v21 -; SI-NEXT: v_lshr_b64 v[23:24], v[6:7], 16 -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v57 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v58 -; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v7 +; SI-NEXT: v_lshr_b64 v[13:14], v[6:7], 16 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v58 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v59 +; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v38 -; SI-NEXT: v_lshr_b64 v[24:25], v[6:7], 16 -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v47 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v56 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v23 +; SI-NEXT: v_lshr_b64 v[25:26], v[6:7], 16 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v56 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v57 ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v10 -; SI-NEXT: v_lshr_b64 v[25:26], v[6:7], 16 -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v45 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v46 +; SI-NEXT: v_lshr_b64 v[26:27], v[6:7], 16 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v46 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v47 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v11 -; SI-NEXT: v_lshr_b64 v[26:27], v[6:7], 16 -; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v28 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v44 +; SI-NEXT: v_lshr_b64 v[27:28], v[6:7], 16 +; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v29 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v55 ; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v14 -; SI-NEXT: v_lshr_b64 v[27:28], v[6:7], 16 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v55 -; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v6 +; SI-NEXT: v_lshr_b64 v[28:29], v[6:7], 16 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v50 +; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v16 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v30 -; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v6 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v31 +; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v18 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v32 -; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v6 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v33 +; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v12 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v48 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v35 ; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v20 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v6 -; SI-NEXT: v_lshr_b64 v[19:20], v[35:36], 16 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v34 -; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v2 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v37 +; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v8 -; SI-NEXT: v_add_f32_e32 v48, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v0 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 -; SI-NEXT: v_lshr_b64 v[1:2], v[48:49], 16 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v6 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v50 -; SI-NEXT: v_lshr_b64 v[7:8], v[34:35], 16 -; SI-NEXT: v_add_f32_e32 v50, 0x40c00000, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v4 -; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v37 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshr_b64 v[15:16], v[28:29], 16 -; SI-NEXT: v_lshr_b64 v[17:18], v[30:31], 16 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v21 -; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v8 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v6 +; SI-NEXT: v_lshr_b64 v[7:8], v[37:38], 16 +; SI-NEXT: v_lshr_b64 v[19:20], v[35:36], 16 +; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v48 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 +; SI-NEXT: v_add_f32_e32 v48, 0x40c00000, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v22 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v2 -; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v11 -; SI-NEXT: v_lshr_b64 v[11:12], v[32:33], 16 -; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v38 +; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v4 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v3 +; SI-NEXT: v_add_f32_e32 v50, 0x40c00000, v3 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v2 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v8 ; SI-NEXT: v_lshr_b64 v[3:4], v[50:51], 16 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39 -; SI-NEXT: v_lshr_b64 v[39:40], v[6:7], 16 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v21 +; SI-NEXT: v_lshr_b64 v[21:22], v[48:49], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v1 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v52 +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v39 +; SI-NEXT: v_lshr_b64 v[39:40], v[2:3], 16 +; SI-NEXT: v_lshr_b64 v[15:16], v[29:30], 16 +; SI-NEXT: v_lshr_b64 v[17:18], v[31:32], 16 +; SI-NEXT: v_add_f32_e32 v52, 0x40c00000, v1 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v24 +; SI-NEXT: v_lshr_b64 v[40:41], v[20:21], 16 +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v11 +; SI-NEXT: v_lshr_b64 v[11:12], v[33:34], 16 +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v23 +; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_lshr_b64 v[41:42], v[6:7], 16 ; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v8 -; SI-NEXT: v_lshr_b64 v[40:41], v[18:19], 16 -; SI-NEXT: v_lshr_b64 v[21:22], v[37:38], 16 -; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16 -; SI-NEXT: v_lshr_b64 v[41:42], v[10:11], 16 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v1 +; SI-NEXT: v_lshr_b64 v[42:43], v[18:19], 16 +; SI-NEXT: v_lshr_b64 v[23:24], v[52:53], 16 +; SI-NEXT: v_lshr_b64 v[43:44], v[10:11], 16 ; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 -; SI-NEXT: v_lshr_b64 v[53:54], v[0:1], 16 -; SI-NEXT: v_lshr_b64 v[42:43], v[16:17], 16 -; SI-NEXT: v_lshr_b64 v[54:55], v[20:21], 16 -; SI-NEXT: v_lshr_b64 v[43:44], v[14:15], 16 +; SI-NEXT: v_lshr_b64 v[44:45], v[16:17], 16 +; SI-NEXT: v_lshr_b64 v[54:55], v[22:23], 16 +; SI-NEXT: v_lshr_b64 v[45:46], v[14:15], 16 ; SI-NEXT: .LBB95_3: ; %end -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v1 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v52 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v54 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v51 -; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v53 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v53 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v5 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v39 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v49 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v51 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v40 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v41 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v42 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v43 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v9 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v40 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v21 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v49 +; SI-NEXT: v_or_b32_e32 v5, v5, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v13 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v41 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v42 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v45 ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -62053,82 +62009,75 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v54 -; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38 -; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v23 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v39 ; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v38 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v24 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v19 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v36 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v25 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v34 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v26 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v32 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v27 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v30 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB95_4: +; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr53 ; SI-NEXT: ; implicit-def: $vgpr5 -; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr3 ; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr9 -; SI-NEXT: ; implicit-def: $vgpr53 +; SI-NEXT: ; implicit-def: $vgpr40 +; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr13 -; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr41 +; SI-NEXT: ; implicit-def: $vgpr7 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr23 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr31 -; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr3 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr7 ; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr26 +; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr11 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr44 ; SI-NEXT: ; implicit-def: $vgpr17 +; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr15 +; SI-NEXT: ; implicit-def: $vgpr30 ; SI-NEXT: s_branch .LBB95_2 ; ; VI-LABEL: bitcast_v32bf16_to_v32i16_scalar: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v20, s30, 0 -; VI-NEXT: v_writelane_b32 v20, s31, 1 +; VI-NEXT: v_writelane_b32 v35, s30, 0 +; VI-NEXT: v_writelane_b32 v35, s31, 1 ; VI-NEXT: v_readfirstlane_b32 s4, v2 ; VI-NEXT: v_readfirstlane_b32 s31, v1 ; VI-NEXT: s_cmp_lg_u32 s4, 0 @@ -62137,302 +62086,303 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB95_4 ; VI-NEXT: .LBB95_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v16, 0x40c00000 -; VI-NEXT: s_lshl_b32 s4, s26, 16 -; VI-NEXT: v_add_f32_e32 v4, s4, v16 -; VI-NEXT: s_lshl_b32 s4, s28, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 +; VI-NEXT: s_lshl_b32 s4, s16, 16 +; VI-NEXT: v_mov_b32_e32 v10, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: s_and_b32 s4, s28, 0xffff0000 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v16 +; VI-NEXT: v_add_f32_e32 v1, s4, v10 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s30, 16 +; VI-NEXT: s_lshl_b32 s4, s17, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v16 +; VI-NEXT: v_add_f32_e32 v2, s4, v10 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s30, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v16 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v6, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: s_and_b32 s6, s26, 0xffff0000 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[2:3] -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v4, 16, 1 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v4 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v4 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v4, v4 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: s_lshl_b32 s6, s24, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s24, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: s_lshl_b32 s6, s22, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s22, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 +; VI-NEXT: v_add_f32_e32 v2, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v16, v3, v4, vcc ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_lshl_b32 s4, s18, 16 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: s_lshl_b32 s6, s20, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s20, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 +; VI-NEXT: v_add_f32_e32 v2, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v17, v3, v4, vcc ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: s_lshl_b32 s6, s18, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s18, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc -; VI-NEXT: s_and_b32 s7, s16, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: v_add_f32_e32 v5, s7, v16 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v5 -; VI-NEXT: s_lshl_b32 s6, s16, 16 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc -; VI-NEXT: v_bfe_u32 v0, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v3 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 +; VI-NEXT: v_add_f32_e32 v3, s4, v10 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 +; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: s_lshl_b32 s4, s19, 16 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s17, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v3, s5, v16 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v1, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v3 -; VI-NEXT: s_lshl_b32 s4, s17, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_add_f32_e32 v3, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v19, v4, v5, vcc +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 +; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: s_and_b32 s5, s19, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s5, v16 -; VI-NEXT: v_cndmask_b32_e32 v17, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_lshl_b32 s4, s19, 16 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 +; VI-NEXT: v_add_f32_e32 v3, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v18, v4, v5, vcc +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 +; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: s_lshl_b32 s4, s20, 16 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v7, v3, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v3 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: s_and_b32 s5, s21, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v3 +; VI-NEXT: v_add_f32_e32 v3, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v20, v4, v5, vcc +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 +; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 -; VI-NEXT: v_add_f32_e32 v5, s5, v16 -; VI-NEXT: v_mov_b32_e32 v1, v17 -; VI-NEXT: v_cndmask_b32_e32 v17, v7, v9, vcc -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_add_f32_e32 v4, s4, v10 +; VI-NEXT: v_bfe_u32 v5, v4, 16, 1 +; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v4 +; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 ; VI-NEXT: s_lshl_b32 s4, s21, 16 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 +; VI-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; VI-NEXT: v_add_f32_e32 v4, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v21, v5, v6, vcc +; VI-NEXT: v_bfe_u32 v5, v4, 16, 1 +; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v4 +; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 +; VI-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc +; VI-NEXT: v_add_f32_e32 v5, s4, v10 +; VI-NEXT: v_bfe_u32 v6, v5, 16, 1 +; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v5 +; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v6 +; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: v_or_b32_e32 v7, 0x400000, v5 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc -; VI-NEXT: v_bfe_u32 v9, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v5 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: s_and_b32 s5, s23, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v5 +; VI-NEXT: v_add_f32_e32 v5, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v22, v6, v7, vcc +; VI-NEXT: v_bfe_u32 v6, v5, 16, 1 +; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v5 +; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v6 +; VI-NEXT: v_or_b32_e32 v7, 0x400000, v5 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v7 -; VI-NEXT: v_add_f32_e32 v7, s5, v16 -; VI-NEXT: v_mov_b32_e32 v3, v17 -; VI-NEXT: v_cndmask_b32_e32 v17, v9, v11, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc +; VI-NEXT: v_add_f32_e32 v6, s4, v10 +; VI-NEXT: v_bfe_u32 v7, v6, 16, 1 +; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v6 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 ; VI-NEXT: s_lshl_b32 s4, s23, 16 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 +; VI-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; VI-NEXT: v_add_f32_e32 v6, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v23, v7, v8, vcc +; VI-NEXT: v_bfe_u32 v7, v6, 16, 1 +; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v6 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 +; VI-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc +; VI-NEXT: v_add_f32_e32 v7, s4, v10 +; VI-NEXT: v_bfe_u32 v8, v7, 16, 1 +; VI-NEXT: v_add_u32_e32 v8, vcc, v8, v7 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x7fff, v8 +; VI-NEXT: s_lshl_b32 s4, s24, 16 +; VI-NEXT: v_or_b32_e32 v9, 0x400000, v7 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v9, v9, v11, vcc -; VI-NEXT: v_bfe_u32 v11, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v7 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_and_b32 s5, s25, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v7 +; VI-NEXT: v_add_f32_e32 v7, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v24, v8, v9, vcc +; VI-NEXT: v_bfe_u32 v8, v7, 16, 1 +; VI-NEXT: v_add_u32_e32 v8, vcc, v8, v7 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x7fff, v8 +; VI-NEXT: v_or_b32_e32 v9, 0x400000, v7 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 -; VI-NEXT: v_add_f32_e32 v9, s5, v16 -; VI-NEXT: v_mov_b32_e32 v5, v17 -; VI-NEXT: v_cndmask_b32_e32 v17, v11, v13, vcc +; VI-NEXT: s_and_b32 s4, s24, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; VI-NEXT: v_add_f32_e32 v8, s4, v10 +; VI-NEXT: v_bfe_u32 v9, v8, 16, 1 +; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v8 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 +; VI-NEXT: s_lshl_b32 s4, s25, 16 +; VI-NEXT: v_or_b32_e32 v11, 0x400000, v8 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; VI-NEXT: v_add_f32_e32 v8, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v25, v9, v11, vcc +; VI-NEXT: v_bfe_u32 v9, v8, 16, 1 +; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v8 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 +; VI-NEXT: v_or_b32_e32 v11, 0x400000, v8 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; VI-NEXT: s_and_b32 s4, s25, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v8, v9, v11, vcc +; VI-NEXT: v_add_f32_e32 v9, s4, v10 ; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 ; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: s_lshl_b32 s4, s25, 16 ; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 +; VI-NEXT: s_lshl_b32 s4, s26, 16 +; VI-NEXT: v_or_b32_e32 v12, 0x400000, v9 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v11, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v13, v9, 16, 1 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v9 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: s_and_b32 s5, s27, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v9 +; VI-NEXT: v_add_f32_e32 v9, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v26, v11, v12, vcc +; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 +; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 +; VI-NEXT: v_or_b32_e32 v12, 0x400000, v9 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v11 -; VI-NEXT: v_add_f32_e32 v11, s5, v16 -; VI-NEXT: v_mov_b32_e32 v7, v17 -; VI-NEXT: v_cndmask_b32_e32 v17, v13, v15, vcc -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 +; VI-NEXT: s_and_b32 s4, s26, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v9, v11, v12, vcc +; VI-NEXT: v_add_f32_e32 v11, s4, v10 +; VI-NEXT: v_bfe_u32 v12, v11, 16, 1 +; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12 ; VI-NEXT: s_lshl_b32 s4, s27, 16 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc -; VI-NEXT: v_bfe_u32 v15, v11, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v11 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: s_and_b32 s5, s29, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v9, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v11 +; VI-NEXT: v_add_f32_e32 v11, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v32, v12, v13, vcc +; VI-NEXT: v_bfe_u32 v12, v11, 16, 1 +; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12 +; VI-NEXT: s_and_b32 s4, s27, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v13 -; VI-NEXT: v_add_f32_e32 v13, s5, v16 -; VI-NEXT: v_cndmask_b32_e32 v17, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 +; VI-NEXT: v_add_f32_e32 v11, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v27, v12, v13, vcc +; VI-NEXT: v_bfe_u32 v12, v11, 16, 1 +; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12 +; VI-NEXT: s_lshl_b32 s4, s28, 16 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; VI-NEXT: v_add_f32_e32 v11, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v28, v12, v13, vcc +; VI-NEXT: v_bfe_u32 v12, v11, 16, 1 +; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; VI-NEXT: s_and_b32 s4, s28, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v11, v12, v13, vcc +; VI-NEXT: v_add_f32_e32 v12, s4, v10 +; VI-NEXT: v_bfe_u32 v13, v12, 16, 1 +; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v12 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 ; VI-NEXT: s_lshl_b32 s4, s29, 16 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_mov_b32_e32 v11, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 +; VI-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; VI-NEXT: v_add_f32_e32 v12, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v33, v13, v14, vcc +; VI-NEXT: v_bfe_u32 v13, v12, 16, 1 +; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v12 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 +; VI-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v12, v13, v14, vcc +; VI-NEXT: v_add_f32_e32 v13, s4, v10 +; VI-NEXT: v_bfe_u32 v14, v13, 16, 1 +; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v13 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x7fff, v14 +; VI-NEXT: s_lshl_b32 s4, s30, 16 +; VI-NEXT: v_or_b32_e32 v15, 0x400000, v13 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v15, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v17, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v13 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_and_b32 s4, s31, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13 +; VI-NEXT: v_add_f32_e32 v13, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v31, v14, v15, vcc +; VI-NEXT: v_bfe_u32 v14, v13, 16, 1 +; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v13 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x7fff, v14 +; VI-NEXT: v_or_b32_e32 v15, 0x400000, v13 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v15 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 +; VI-NEXT: s_and_b32 s4, s30, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v13, v14, v15, vcc +; VI-NEXT: v_add_f32_e32 v14, s4, v10 +; VI-NEXT: v_bfe_u32 v15, v14, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v14 ; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 ; VI-NEXT: s_lshl_b32 s4, s31, 16 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v19, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v16 -; VI-NEXT: v_bfe_u32 v16, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v16, vcc, v16, v15 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v16 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_cndmask_b32_e32 v15, v16, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v13 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[15:16] -; VI-NEXT: v_mov_b32_e32 v13, v17 +; VI-NEXT: v_or_b32_e32 v29, 0x400000, v14 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; VI-NEXT: v_add_f32_e32 v14, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v34, v15, v29, vcc +; VI-NEXT: v_bfe_u32 v15, v14, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v14 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 +; VI-NEXT: s_and_b32 s4, s31, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v29, 0x400000, v14 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; VI-NEXT: v_add_f32_e32 v10, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v14, v15, v29, vcc +; VI-NEXT: v_bfe_u32 v15, v10, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v10 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 +; VI-NEXT: v_or_b32_e32 v29, 0x400000, v10 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; VI-NEXT: v_cndmask_b32_e32 v10, v15, v29, vcc +; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v10 +; VI-NEXT: v_lshrrev_b64 v[29:30], 16, v[14:15] +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v34 +; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[13:14] +; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v31 +; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[12:13] +; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v32 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[11:12] +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[9:10] +; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v26 +; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[8:9] +; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v25 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[7:8] +; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v24 +; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[6:7] +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v23 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[5:6] +; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v22 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[4:5] +; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v21 +; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v28 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[3:4] +; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v20 +; VI-NEXT: v_lshrrev_b64 v[27:28], 16, v[27:28] +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] +; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[16:17] +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[2:3] +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] +; VI-NEXT: v_mov_b32_e32 v1, v15 +; VI-NEXT: v_mov_b32_e32 v3, v18 +; VI-NEXT: v_mov_b32_e32 v5, v22 +; VI-NEXT: v_mov_b32_e32 v7, v24 +; VI-NEXT: v_mov_b32_e32 v9, v31 +; VI-NEXT: v_mov_b32_e32 v11, v27 +; VI-NEXT: v_mov_b32_e32 v13, v30 +; VI-NEXT: v_mov_b32_e32 v15, v29 ; VI-NEXT: s_branch .LBB95_5 ; VI-NEXT: .LBB95_3: ; VI-NEXT: s_branch .LBB95_2 @@ -62454,10 +62404,10 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a ; VI-NEXT: v_mov_b32_e32 v14, s30 ; VI-NEXT: v_mov_b32_e32 v15, s31 ; VI-NEXT: .LBB95_5: ; %end -; VI-NEXT: v_readlane_b32 s30, v20, 0 -; VI-NEXT: v_readlane_b32 s31, v20, 1 +; VI-NEXT: v_readlane_b32 s30, v35, 0 +; VI-NEXT: v_readlane_b32 s31, v35, 1 ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -62466,10 +62416,10 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v20, s30, 0 -; GFX9-NEXT: v_writelane_b32 v20, s31, 1 +; GFX9-NEXT: v_writelane_b32 v34, s30, 0 +; GFX9-NEXT: v_writelane_b32 v34, s31, 1 ; GFX9-NEXT: v_readfirstlane_b32 s4, v2 ; GFX9-NEXT: v_readfirstlane_b32 s31, v1 ; GFX9-NEXT: s_cmp_lg_u32 s4, 0 @@ -62478,296 +62428,296 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: s_cbranch_execnz .LBB95_4 ; GFX9-NEXT: .LBB95_2: ; %cmp.true -; GFX9-NEXT: v_mov_b32_e32 v0, 0x40c00000 -; GFX9-NEXT: s_and_b32 s5, s30, 0xffff0000 -; GFX9-NEXT: v_add_f32_e32 v1, s5, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000 +; GFX9-NEXT: v_mov_b32_e32 v2, 0x40c00000 +; GFX9-NEXT: v_add_f32_e32 v0, s4, v2 +; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 +; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 +; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: s_lshl_b32 s4, s16, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc +; GFX9-NEXT: v_add_f32_e32 v1, s4, v2 +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 +; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s5, s30, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s5, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v16, v3, v4, vcc +; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v3, v3, v1 ; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_and_b32 s5, s31, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s5, v0 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: s_lshl_b32 s4, s17, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc +; GFX9-NEXT: v_add_f32_e32 v3, s4, v2 +; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_add_f32_e32 v3, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v17, v4, v5, vcc +; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: s_lshl_b32 s4, s18, 16 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_add_f32_e32 v3, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v18, v4, v5, vcc +; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_add_f32_e32 v3, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v19, v4, v5, vcc ; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 ; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 ; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: s_lshl_b32 s5, s31, 16 +; GFX9-NEXT: s_lshl_b32 s4, s19, 16 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; GFX9-NEXT: v_add_f32_e32 v4, s5, v0 +; GFX9-NEXT: v_add_f32_e32 v4, s4, v2 ; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 -; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 -; GFX9-NEXT: v_mov_b32_e32 v16, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 ; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 -; GFX9-NEXT: v_and_or_b32 v14, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 +; GFX9-NEXT: v_add_f32_e32 v4, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v20, v5, v6, vcc +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 +; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: s_lshl_b32 s4, s20, 16 ; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_and_or_b32 v15, v3, v16, v4 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s29, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s28, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v13, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s28, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s27, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v12, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s27, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s26, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v11, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s26, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s25, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v10, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s25, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s24, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v9, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s24, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v8, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s23, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v7, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s22, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; GFX9-NEXT: v_add_f32_e32 v5, s4, v2 +; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 ; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v6, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 +; GFX9-NEXT: v_add_f32_e32 v5, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v21, v6, v7, vcc +; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 +; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 ; GFX9-NEXT: s_lshl_b32 s4, s21, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v5, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s20, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v4, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s19, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v17, vcc -; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v3, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s18, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v17, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v17, v17, v2 -; GFX9-NEXT: v_add_u32_e32 v17, 0x7fff, v17 -; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc +; GFX9-NEXT: v_add_f32_e32 v6, s4, v2 +; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 +; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: v_add_f32_e32 v6, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v22, v7, v8, vcc +; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: s_lshl_b32 s4, s22, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc +; GFX9-NEXT: v_add_f32_e32 v7, s4, v2 +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 +; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 +; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: v_add_f32_e32 v7, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v23, v8, v9, vcc +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 +; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 +; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: s_lshl_b32 s4, s23, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_f32_e32 v8, s4, v2 +; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v9, v9, v8 +; GFX9-NEXT: s_and_b32 s4, s24, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9 +; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v8 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; GFX9-NEXT: v_add_f32_e32 v8, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v24, v9, v10, vcc +; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v9, v9, v8 +; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9 +; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v8 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; GFX9-NEXT: s_lshl_b32 s4, s24, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v8, v9, v10, vcc +; GFX9-NEXT: v_add_f32_e32 v9, s4, v2 +; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v10, v10, v9 +; GFX9-NEXT: s_and_b32 s4, s25, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10 +; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 +; GFX9-NEXT: v_add_f32_e32 v9, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v25, v10, v11, vcc +; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v10, v10, v9 +; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10 +; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 +; GFX9-NEXT: s_lshl_b32 s4, s25, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc +; GFX9-NEXT: v_add_f32_e32 v10, s4, v2 +; GFX9-NEXT: v_bfe_u32 v11, v10, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v11, v11, v10 +; GFX9-NEXT: s_and_b32 s4, s26, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11 +; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v10 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; GFX9-NEXT: v_add_f32_e32 v10, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v26, v11, v12, vcc +; GFX9-NEXT: v_bfe_u32 v11, v10, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v11, v11, v10 +; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11 +; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v10 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; GFX9-NEXT: s_lshl_b32 s4, s26, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v10, v11, v12, vcc +; GFX9-NEXT: v_add_f32_e32 v11, s4, v2 +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v12, v12, v11 +; GFX9-NEXT: s_and_b32 s4, s27, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 +; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: v_add_f32_e32 v11, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v27, v12, v13, vcc +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v12, v12, v11 +; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 +; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: s_lshl_b32 s4, s27, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v11, v12, v13, vcc +; GFX9-NEXT: v_add_f32_e32 v12, s4, v2 +; GFX9-NEXT: v_bfe_u32 v13, v12, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v13, v13, v12 +; GFX9-NEXT: s_and_b32 s4, s28, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 +; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; GFX9-NEXT: v_add_f32_e32 v12, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v28, v13, v14, vcc +; GFX9-NEXT: v_bfe_u32 v13, v12, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v13, v13, v12 +; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 +; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; GFX9-NEXT: s_lshl_b32 s4, s28, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v12, v13, v14, vcc +; GFX9-NEXT: v_add_f32_e32 v13, s4, v2 +; GFX9-NEXT: v_bfe_u32 v14, v13, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v14, v14, v13 +; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 +; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v13 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 +; GFX9-NEXT: v_add_f32_e32 v13, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v29, v14, v15, vcc +; GFX9-NEXT: v_bfe_u32 v14, v13, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v14, v14, v13 +; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 +; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v13 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 +; GFX9-NEXT: s_lshl_b32 s4, s29, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v13, v14, v15, vcc +; GFX9-NEXT: v_add_f32_e32 v14, s4, v2 +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v30, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_add_f32_e32 v14, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v30, v15, v30, vcc +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: s_lshl_b32 s4, s30, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v14, v15, v31, vcc +; GFX9-NEXT: v_add_f32_e32 v15, s4, v2 +; GFX9-NEXT: v_bfe_u32 v31, v15, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v31, v31, v15 +; GFX9-NEXT: s_and_b32 s4, s31, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v31, 0x7fff, v31 +; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v15 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 +; GFX9-NEXT: v_add_f32_e32 v15, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v31, v31, v32, vcc +; GFX9-NEXT: v_bfe_u32 v32, v15, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v32, v32, v15 +; GFX9-NEXT: s_lshl_b32 s4, s31, 16 +; GFX9-NEXT: v_add_u32_e32 v32, 0x7fff, v32 +; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v15 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 +; GFX9-NEXT: v_add_f32_e32 v2, s4, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v15, v32, v33, vcc +; GFX9-NEXT: v_bfe_u32 v32, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v32, v32, v2 +; GFX9-NEXT: v_add_u32_e32 v32, 0x7fff, v32 +; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v2 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v17, v18, vcc -; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v32, v33, vcc ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_and_or_b32 v2, v1, v16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v17, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v17, v17, v1 -; GFX9-NEXT: v_add_u32_e32 v17, 0x7fff, v17 -; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s17, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v17, v18, vcc -; GFX9-NEXT: v_add_f32_e32 v17, s4, v0 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000 +; GFX9-NEXT: v_mov_b32_e32 v32, 0xffff0000 +; GFX9-NEXT: v_and_or_b32 v15, v15, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v31 +; GFX9-NEXT: v_and_or_b32 v14, v14, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v30 +; GFX9-NEXT: v_and_or_b32 v13, v13, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v29 +; GFX9-NEXT: v_and_or_b32 v12, v12, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v28 +; GFX9-NEXT: v_and_or_b32 v11, v11, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v27 +; GFX9-NEXT: v_and_or_b32 v10, v10, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v26 +; GFX9-NEXT: v_and_or_b32 v9, v9, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v25 +; GFX9-NEXT: v_and_or_b32 v8, v8, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v24 +; GFX9-NEXT: v_and_or_b32 v7, v7, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v23 +; GFX9-NEXT: v_and_or_b32 v6, v6, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v22 +; GFX9-NEXT: v_and_or_b32 v5, v5, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v21 +; GFX9-NEXT: v_and_or_b32 v4, v4, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v20 +; GFX9-NEXT: v_and_or_b32 v3, v3, v32, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v19 ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_and_or_b32 v1, v1, v16, v17 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v0 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: s_lshl_b32 s4, s16, 16 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v0 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v0 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v18, v19, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_and_or_b32 v0, v17, v16, v0 +; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v16 +; GFX9-NEXT: v_and_or_b32 v2, v18, v32, v2 +; GFX9-NEXT: v_and_or_b32 v1, v1, v32, v17 +; GFX9-NEXT: v_and_or_b32 v0, v0, v32, v16 ; GFX9-NEXT: s_branch .LBB95_5 ; GFX9-NEXT: .LBB95_3: ; GFX9-NEXT: s_branch .LBB95_2 @@ -62789,10 +62739,10 @@ define inreg <32 x i16> @bitcast_v32bf16_to_v32i16_scalar(<32 x bfloat> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v14, s30 ; GFX9-NEXT: v_mov_b32_e32 v15, s31 ; GFX9-NEXT: .LBB95_5: ; %end -; GFX9-NEXT: v_readlane_b32 s30, v20, 0 -; GFX9-NEXT: v_readlane_b32 s31, v20, 1 +; GFX9-NEXT: v_readlane_b32 s30, v34, 0 +; GFX9-NEXT: v_readlane_b32 s31, v34, 1 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -64226,162 +64176,163 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr19 +; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; kill: killed $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 +; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; kill: killed $vgpr18 +; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; kill: killed $vgpr18 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15 +; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; kill: killed $vgpr18 +; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v14 +; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; kill: killed $vgpr18 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v13 +; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; kill: killed $vgpr18 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v12 +; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v1 ; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; kill: killed $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; kill: killed $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; kill: killed $vgpr19 +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; kill: killed $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; kill: killed $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr43 +; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; kill: killed $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr18 ; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr17 ; VI-NEXT: ; kill: killed $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr17 ; VI-NEXT: ; kill: killed $vgpr19 +; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr17 ; VI-NEXT: ; kill: killed $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: ; implicit-def: $vgpr24 +; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr23 +; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr47 +; VI-NEXT: ; implicit-def: $vgpr45 +; VI-NEXT: ; implicit-def: $vgpr55 +; VI-NEXT: ; implicit-def: $vgpr22 +; VI-NEXT: ; implicit-def: $vgpr44 ; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; kill: killed $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16 -; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 -; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v1 -; VI-NEXT: ; kill: killed $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: ; implicit-def: $vgpr55 ; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr21 +; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr44 +; VI-NEXT: ; implicit-def: $vgpr62 +; VI-NEXT: ; implicit-def: $vgpr60 +; VI-NEXT: ; implicit-def: $vgpr54 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr63 -; VI-NEXT: ; implicit-def: $vgpr56 -; VI-NEXT: ; implicit-def: $vgpr42 -; VI-NEXT: ; implicit-def: $vgpr46 -; VI-NEXT: ; implicit-def: $vgpr61 +; VI-NEXT: ; kill: killed $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr59 -; VI-NEXT: ; implicit-def: $vgpr40 -; VI-NEXT: ; implicit-def: $vgpr52 -; VI-NEXT: ; implicit-def: $vgpr50 -; VI-NEXT: ; implicit-def: $vgpr43 -; VI-NEXT: ; implicit-def: $vgpr41 -; VI-NEXT: ; implicit-def: $vgpr47 -; VI-NEXT: ; implicit-def: $vgpr45 -; VI-NEXT: ; implicit-def: $vgpr54 -; VI-NEXT: ; implicit-def: $vgpr60 -; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr51 -; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; kill: killed $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; implicit-def: $vgpr61 +; VI-NEXT: ; implicit-def: $vgpr26 ; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr22 -; VI-NEXT: ; implicit-def: $vgpr21 -; VI-NEXT: ; implicit-def: $vgpr20 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr17 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB96_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v4 -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[15:16] -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15 -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v14 -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[13:14] -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v14 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v13 -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v12 +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v12 -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v4 +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v11 -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v10 -; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v7 -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v9 -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v6 -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] -; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v16 +; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[11:12] ; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v8 -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v5 -; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v12 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v6 -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v18, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v1 -; VI-NEXT: v_mov_b32_e32 v25, v50 -; VI-NEXT: v_mov_b32_e32 v55, v1 -; VI-NEXT: v_mov_b32_e32 v53, v2 -; VI-NEXT: v_mov_b32_e32 v56, v3 -; VI-NEXT: v_mov_b32_e32 v46, v4 -; VI-NEXT: v_mov_b32_e32 v61, v5 -; VI-NEXT: v_mov_b32_e32 v59, v6 -; VI-NEXT: v_mov_b32_e32 v52, v7 -; VI-NEXT: v_mov_b32_e32 v50, v8 -; VI-NEXT: v_mov_b32_e32 v43, v9 -; VI-NEXT: v_mov_b32_e32 v41, v10 -; VI-NEXT: v_mov_b32_e32 v47, v11 -; VI-NEXT: v_mov_b32_e32 v45, v12 -; VI-NEXT: v_mov_b32_e32 v60, v13 -; VI-NEXT: v_mov_b32_e32 v58, v14 -; VI-NEXT: v_mov_b32_e32 v51, v15 -; VI-NEXT: v_mov_b32_e32 v62, v16 +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8] +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v7 +; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[9:10] +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[5:6] +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v6 +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4] +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v5 +; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] +; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[15:16] +; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v6 +; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v1 +; VI-NEXT: v_mov_b32_e32 v41, v1 +; VI-NEXT: v_mov_b32_e32 v40, v2 +; VI-NEXT: v_mov_b32_e32 v45, v3 +; VI-NEXT: v_mov_b32_e32 v44, v4 +; VI-NEXT: v_mov_b32_e32 v57, v5 +; VI-NEXT: v_mov_b32_e32 v56, v6 +; VI-NEXT: v_mov_b32_e32 v62, v7 +; VI-NEXT: v_mov_b32_e32 v60, v8 +; VI-NEXT: v_mov_b32_e32 v54, v9 +; VI-NEXT: v_mov_b32_e32 v52, v10 +; VI-NEXT: v_mov_b32_e32 v43, v11 +; VI-NEXT: v_mov_b32_e32 v18, v12 +; VI-NEXT: v_mov_b32_e32 v58, v13 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v14 +; VI-NEXT: v_mov_b32_e32 v19, v14 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v15 +; VI-NEXT: v_mov_b32_e32 v59, v15 +; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16 +; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v16 +; VI-NEXT: v_mov_b32_e32 v61, v16 ; VI-NEXT: ; implicit-def: $vgpr1 ; VI-NEXT: ; implicit-def: $vgpr3 ; VI-NEXT: ; implicit-def: $vgpr5 @@ -64395,252 +64346,253 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 { ; VI-NEXT: s_cbranch_execz .LBB96_4 ; VI-NEXT: ; %bb.3: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v17, 3 -; VI-NEXT: v_add_u16_sdwa v28, v12, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v33, v11, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v26, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v29, v15, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v30, v10, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v35, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v45, 3, v12 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v28 -; VI-NEXT: v_add_u16_e32 v47, 3, v11 -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v33 -; VI-NEXT: v_add_u16_e32 v62, 3, v16 -; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v26 -; VI-NEXT: v_add_u16_e32 v51, 3, v15 -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v29 -; VI-NEXT: v_add_u16_sdwa v32, v8, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v37, v7, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v41, 3, v10 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v30 -; VI-NEXT: v_add_u16_e32 v43, 3, v9 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v35 -; VI-NEXT: v_or_b32_e32 v12, v45, v12 -; VI-NEXT: v_or_b32_e32 v11, v47, v11 -; VI-NEXT: v_or_b32_e32 v16, v62, v16 -; VI-NEXT: v_or_b32_e32 v15, v51, v15 -; VI-NEXT: v_add_u16_sdwa v38, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v49, v1, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v36, v4, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v48, v3, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v34, v6, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v39, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v50, 3, v8 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v32 -; VI-NEXT: v_add_u16_e32 v52, 3, v7 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v37 -; VI-NEXT: v_or_b32_e32 v10, v41, v10 -; VI-NEXT: v_or_b32_e32 v9, v43, v9 -; VI-NEXT: v_add_u16_sdwa v27, v14, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_sdwa v31, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: v_add_u16_e32 v59, 3, v6 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v34 -; VI-NEXT: v_add_u16_e32 v61, 3, v5 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v39 -; VI-NEXT: v_or_b32_e32 v8, v50, v8 -; VI-NEXT: v_or_b32_e32 v7, v52, v7 -; VI-NEXT: v_add_u16_e32 v58, 3, v14 -; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v27 -; VI-NEXT: v_add_u16_e32 v60, 3, v13 -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v31 +; VI-NEXT: v_add_u16_sdwa v28, v14, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v32, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_e32 v19, 3, v14 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v28 +; VI-NEXT: v_add_u16_e32 v58, 3, v13 +; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v32 +; VI-NEXT: v_or_b32_e32 v14, v19, v14 +; VI-NEXT: v_or_b32_e32 v13, v58, v13 +; VI-NEXT: v_add_u16_sdwa v29, v12, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v34, v11, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[13:14] +; VI-NEXT: v_add_u16_e32 v18, 3, v12 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v29 +; VI-NEXT: v_add_u16_e32 v43, 3, v11 +; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v34 +; VI-NEXT: v_or_b32_e32 v12, v18, v12 +; VI-NEXT: v_or_b32_e32 v11, v43, v11 +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_sdwa v31, v10, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v36, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[11:12] +; VI-NEXT: v_add_u16_e32 v52, 3, v10 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v31 +; VI-NEXT: v_add_u16_e32 v54, 3, v9 +; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v36 +; VI-NEXT: v_or_b32_e32 v10, v52, v10 +; VI-NEXT: v_or_b32_e32 v9, v54, v9 +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_sdwa v33, v8, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v38, v7, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; VI-NEXT: v_add_u16_e32 v46, 3, v4 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v36 -; VI-NEXT: v_add_u16_e32 v56, 3, v3 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v48 -; VI-NEXT: v_or_b32_e32 v6, v59, v6 -; VI-NEXT: v_or_b32_e32 v5, v61, v5 -; VI-NEXT: v_or_b32_e32 v14, v58, v14 -; VI-NEXT: v_or_b32_e32 v13, v60, v13 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] -; VI-NEXT: v_add_u16_e32 v53, 3, v2 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v38 -; VI-NEXT: v_add_u16_e32 v55, 3, v1 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49 -; VI-NEXT: v_or_b32_e32 v4, v46, v4 -; VI-NEXT: v_or_b32_e32 v3, v56, v3 -; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[13:14] +; VI-NEXT: v_add_u16_sdwa v35, v6, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v48, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_e32 v60, 3, v8 +; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v33 +; VI-NEXT: v_add_u16_e32 v62, 3, v7 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v38 +; VI-NEXT: v_add_u16_sdwa v37, v4, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v49, v3, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_e32 v56, 3, v6 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v35 +; VI-NEXT: v_add_u16_e32 v57, 3, v5 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v48 +; VI-NEXT: v_or_b32_e32 v8, v60, v8 +; VI-NEXT: v_or_b32_e32 v7, v62, v7 +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; VI-NEXT: v_add_u16_sdwa v39, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v50, v1, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_e32 v44, 3, v4 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v37 +; VI-NEXT: v_add_u16_e32 v45, 3, v3 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v49 +; VI-NEXT: v_or_b32_e32 v6, v56, v6 +; VI-NEXT: v_or_b32_e32 v5, v57, v5 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8] +; VI-NEXT: v_add_u16_e32 v40, 3, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v39 +; VI-NEXT: v_add_u16_e32 v41, 3, v1 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50 +; VI-NEXT: v_or_b32_e32 v4, v44, v4 +; VI-NEXT: v_or_b32_e32 v3, v45, v3 +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[5:6] +; VI-NEXT: v_or_b32_e32 v2, v40, v2 +; VI-NEXT: v_or_b32_e32 v1, v41, v1 +; VI-NEXT: v_add_u16_sdwa v27, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_u16_sdwa v30, v15, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4] +; VI-NEXT: v_add_u16_e32 v61, 3, v16 +; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v27 +; VI-NEXT: v_add_u16_e32 v59, 3, v15 +; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v30 +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v1 +; VI-NEXT: v_bfe_u32 v1, v28, 8, 8 +; VI-NEXT: v_or_b32_e32 v16, v61, v16 +; VI-NEXT: v_or_b32_e32 v15, v59, v15 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v1, v29, 8, 8 +; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[15:16] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v1, v31, 8, 8 +; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v14 ; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v13 -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] -; VI-NEXT: v_or_b32_e32 v2, v53, v2 -; VI-NEXT: v_or_b32_e32 v1, v55, v1 -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v12 -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v1 -; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; VI-NEXT: v_bfe_u32 v1, v27, 8, 8 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v6 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v30, 8, 8 -; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v16 -; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v8 -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v2 -; VI-NEXT: v_bfe_u32 v25, v26, 8, 8 -; VI-NEXT: v_bfe_u32 v54, v28, 8, 8 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; VI-NEXT: v_bfe_u32 v1, v32, 8, 8 -; VI-NEXT: v_bfe_u32 v40, v34, 8, 8 -; VI-NEXT: v_bfe_u32 v18, v36, 8, 8 -; VI-NEXT: v_bfe_u32 v63, v38, 8, 8 -; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v12, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v10, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v4, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v2 +; VI-NEXT: v_bfe_u32 v24, v27, 8, 8 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; VI-NEXT: v_bfe_u32 v1, v33, 8, 8 +; VI-NEXT: v_bfe_u32 v53, v35, 8, 8 +; VI-NEXT: v_bfe_u32 v17, v37, 8, 8 +; VI-NEXT: v_bfe_u32 v47, v39, 8, 8 +; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; VI-NEXT: .LBB96_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v1, v49, v24, s4 -; VI-NEXT: v_perm_b32 v2, v55, v57, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 -; VI-NEXT: v_perm_b32 v2, v38, v63, s4 +; VI-NEXT: v_perm_b32 v2, v50, v23, s4 +; VI-NEXT: v_perm_b32 v1, v41, v46, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_perm_b32 v2, v39, v47, s4 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v53, v44, s4 +; VI-NEXT: v_perm_b32 v1, v40, v42, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v48, v23, s4 -; VI-NEXT: v_perm_b32 v2, v56, v42, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v49, v22, s4 +; VI-NEXT: v_perm_b32 v1, v45, v55, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v36, v18, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v37, v17, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v46, v1, s4 +; VI-NEXT: v_perm_b32 v1, v44, v1, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v39, v22, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v48, v21, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v61, v1, s4 +; VI-NEXT: v_perm_b32 v1, v57, v1, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v34, v40, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v35, v53, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v59, v1, s4 +; VI-NEXT: v_perm_b32 v1, v56, v1, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v37, v21, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v38, v20, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v52, v1, s4 +; VI-NEXT: v_perm_b32 v1, v62, v1, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v50, v17, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v60, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v32, v2, s4 +; VI-NEXT: v_perm_b32 v2, v33, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v35, v20, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v36, v2, s4 +; VI-NEXT: v_perm_b32 v1, v54, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v43, v1, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v41, v1, s4 +; VI-NEXT: v_perm_b32 v1, v52, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v30, v2, s4 +; VI-NEXT: v_perm_b32 v2, v31, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v33, v19, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v2, v34, v2, s4 +; VI-NEXT: v_perm_b32 v1, v43, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v47, v1, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v28, v54, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_perm_b32 v1, v18, v1, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v45, v1, s4 +; VI-NEXT: v_perm_b32 v2, v29, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v31, v2, s4 -; VI-NEXT: v_perm_b32 v1, v60, v1, s4 +; VI-NEXT: v_perm_b32 v2, v32, v2, s4 +; VI-NEXT: v_perm_b32 v1, v58, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v1, v58, v1, s4 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v19, v63, s4 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v27, v2, s4 +; VI-NEXT: v_perm_b32 v2, v28, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v29, v2, s4 -; VI-NEXT: v_perm_b32 v1, v51, v1, s4 +; VI-NEXT: v_perm_b32 v2, v30, v25, s4 +; VI-NEXT: v_perm_b32 v1, v59, v51, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v26, v25, s4 +; VI-NEXT: v_perm_b32 v2, v27, v24, s4 +; VI-NEXT: v_perm_b32 v1, v61, v26, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v62, v1, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload @@ -64681,111 +64633,108 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr25 +; GFX9-NEXT: ; implicit-def: $vgpr26 ; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr29 -; GFX9-NEXT: ; implicit-def: $vgpr28 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr21 +; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr58 ; GFX9-NEXT: ; implicit-def: $vgpr57 ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr44 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr40 ; GFX9-NEXT: ; implicit-def: $vgpr55 ; GFX9-NEXT: ; implicit-def: $vgpr54 ; GFX9-NEXT: ; implicit-def: $vgpr53 ; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr20 ; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr50 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr27 -; GFX9-NEXT: ; implicit-def: $vgpr25 -; GFX9-NEXT: ; implicit-def: $vgpr26 -; GFX9-NEXT: ; implicit-def: $vgpr23 -; GFX9-NEXT: ; implicit-def: $vgpr20 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr31 +; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr17 +; GFX9-NEXT: ; implicit-def: $vgpr28 +; GFX9-NEXT: ; kill: killed $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB96_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16 ; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16 ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: v_mov_b32_e32 v27, v22 -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB96_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB96_4 @@ -64801,130 +64750,127 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16 ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB96_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v25, s4 +; GFX9-NEXT: v_perm_b32 v24, v26, v24, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 -; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4 +; GFX9-NEXT: v_perm_b32 v1, v2, v63, s4 +; GFX9-NEXT: v_perm_b32 v2, v62, v61, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1 +; GFX9-NEXT: v_perm_b32 v1, v3, v60, s4 +; GFX9-NEXT: v_perm_b32 v2, v59, v23, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4 -; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4 +; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4 +; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4 -; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4 +; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4 +; GFX9-NEXT: v_perm_b32 v2, v46, v22, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4 -; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4 +; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4 +; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4 -; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4 +; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v41, v21, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4 -; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4 +; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4 +; GFX9-NEXT: v_perm_b32 v2, v55, v54, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4 -; GFX9-NEXT: v_perm_b32 v2, v54, v20, s4 +; GFX9-NEXT: v_perm_b32 v1, v9, v53, s4 +; GFX9-NEXT: v_perm_b32 v2, v52, v20, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: v_perm_b32 v1, v10, v53, s4 -; GFX9-NEXT: v_perm_b32 v2, v52, v51, s4 +; GFX9-NEXT: v_perm_b32 v1, v10, v51, s4 +; GFX9-NEXT: v_perm_b32 v2, v50, v49, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_perm_b32 v1, v11, v50, s4 -; GFX9-NEXT: v_perm_b32 v2, v49, v19, s4 +; GFX9-NEXT: v_perm_b32 v1, v11, v48, s4 +; GFX9-NEXT: v_perm_b32 v2, v39, v19, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: v_perm_b32 v1, v12, v48, s4 -; GFX9-NEXT: v_perm_b32 v2, v39, v38, s4 +; GFX9-NEXT: v_perm_b32 v1, v12, v38, s4 +; GFX9-NEXT: v_perm_b32 v2, v37, v36, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_perm_b32 v1, v13, v37, s4 -; GFX9-NEXT: v_perm_b32 v2, v36, v18, s4 +; GFX9-NEXT: v_perm_b32 v1, v13, v35, s4 +; GFX9-NEXT: v_perm_b32 v2, v34, v18, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v1, v14, v35, s4 -; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4 +; GFX9-NEXT: v_perm_b32 v1, v14, v33, s4 +; GFX9-NEXT: v_perm_b32 v2, v32, v31, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4 +; GFX9-NEXT: v_perm_b32 v1, v15, v30, s4 +; GFX9-NEXT: v_perm_b32 v2, v29, v17, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v16, v28, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4 +; GFX9-NEXT: v_perm_b32 v2, v27, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -65437,10 +65383,10 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: v_writelane_b32 v4, s99, 33 ; SI-NEXT: v_writelane_b32 v4, s30, 34 ; SI-NEXT: v_writelane_b32 v4, s31, 35 -; SI-NEXT: v_readfirstlane_b32 s46, v2 -; SI-NEXT: v_readfirstlane_b32 s58, v1 +; SI-NEXT: v_readfirstlane_b32 s99, v2 +; SI-NEXT: v_readfirstlane_b32 s46, v1 ; SI-NEXT: s_lshr_b32 s68, s29, 16 -; SI-NEXT: s_lshr_b32 s44, s28, 16 +; SI-NEXT: s_lshr_b32 s98, s28, 16 ; SI-NEXT: s_lshr_b32 s70, s27, 16 ; SI-NEXT: s_lshr_b32 s97, s26, 16 ; SI-NEXT: s_lshr_b32 s71, s25, 16 @@ -65453,8 +65399,8 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: s_lshr_b32 s85, s18, 16 ; SI-NEXT: s_lshr_b32 s83, s17, 16 ; SI-NEXT: s_lshr_b32 s84, s16, 16 -; SI-NEXT: s_lshr_b32 s69, s46, 16 -; SI-NEXT: s_lshr_b32 s56, s58, 16 +; SI-NEXT: s_lshr_b32 s69, s99, 16 +; SI-NEXT: s_lshr_b32 s44, s46, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v3 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: ; implicit-def: $vgpr5 : SGPR spill to VGPR lane @@ -65479,67 +65425,73 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s82, 16 ; SI-NEXT: s_or_b32 s41, s4, s5 -; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 24 -; SI-NEXT: v_writelane_b32 v5, s4, 4 -; SI-NEXT: v_writelane_b32 v5, s5, 5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s86, 16 -; SI-NEXT: s_or_b32 s12, s4, s5 +; SI-NEXT: s_or_b32 s14, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s81, 16 -; SI-NEXT: s_or_b32 s13, s4, s5 -; SI-NEXT: s_lshr_b64 s[4:5], s[12:13], 24 -; SI-NEXT: v_writelane_b32 v5, s4, 6 -; SI-NEXT: v_writelane_b32 v5, s5, 7 +; SI-NEXT: s_or_b32 s15, s4, s5 ; SI-NEXT: s_and_b32 s4, s22, 0xffff ; SI-NEXT: s_lshl_b32 s5, s87, 16 -; SI-NEXT: s_or_b32 s8, s4, s5 +; SI-NEXT: s_or_b32 s12, s4, s5 ; SI-NEXT: s_and_b32 s4, s23, 0xffff ; SI-NEXT: s_lshl_b32 s5, s80, 16 -; SI-NEXT: s_or_b32 s9, s4, s5 +; SI-NEXT: s_or_b32 s13, s4, s5 ; SI-NEXT: s_and_b32 s4, s24, 0xffff ; SI-NEXT: s_lshl_b32 s5, s96, 16 -; SI-NEXT: s_or_b32 s14, s4, s5 +; SI-NEXT: s_or_b32 s10, s4, s5 ; SI-NEXT: s_and_b32 s4, s25, 0xffff ; SI-NEXT: s_lshl_b32 s5, s71, 16 -; SI-NEXT: s_or_b32 s15, s4, s5 +; SI-NEXT: s_or_b32 s11, s4, s5 ; SI-NEXT: s_and_b32 s4, s26, 0xffff ; SI-NEXT: s_lshl_b32 s5, s97, 16 -; SI-NEXT: s_or_b32 s10, s4, s5 +; SI-NEXT: s_or_b32 s8, s4, s5 ; SI-NEXT: s_and_b32 s4, s27, 0xffff ; SI-NEXT: s_lshl_b32 s5, s70, 16 -; SI-NEXT: s_or_b32 s11, s4, s5 +; SI-NEXT: s_or_b32 s9, s4, s5 ; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s5, s44, 16 +; SI-NEXT: s_lshl_b32 s5, s98, 16 ; SI-NEXT: s_or_b32 s6, s4, s5 ; SI-NEXT: s_and_b32 s4, s29, 0xffff ; SI-NEXT: s_lshl_b32 s5, s68, 16 ; SI-NEXT: s_or_b32 s7, s4, s5 -; SI-NEXT: s_and_b32 s4, s58, 0xffff -; SI-NEXT: s_lshl_b32 s5, s56, 16 +; SI-NEXT: s_and_b32 s4, s46, 0xffff +; SI-NEXT: s_lshl_b32 s5, s44, 16 ; SI-NEXT: s_or_b32 s4, s4, s5 -; SI-NEXT: s_and_b32 s5, s46, 0xffff +; SI-NEXT: s_and_b32 s5, s99, 0xffff ; SI-NEXT: s_lshl_b32 s45, s69, 16 ; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 8 +; SI-NEXT: s_lshr_b64 s[56:57], s[40:41], 24 ; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8 -; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8 -; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 24 -; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 8 -; SI-NEXT: s_lshr_b64 s[88:89], s[14:15], 24 -; SI-NEXT: s_lshr_b64 s[92:93], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 8 +; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 24 +; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[14:15], 8 +; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 24 +; SI-NEXT: s_lshr_b64 s[88:89], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[12:13], 8 +; SI-NEXT: s_lshr_b64 s[78:79], s[10:11], 24 +; SI-NEXT: s_lshr_b64 s[94:95], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[8:9], 24 +; SI-NEXT: s_lshr_b64 s[34:35], s[6:7], 24 ; SI-NEXT: s_or_b32 s5, s5, s45 -; SI-NEXT: s_lshr_b32 s98, s43, 8 +; SI-NEXT: s_lshr_b64 s[38:39], s[10:11], 8 +; SI-NEXT: s_lshr_b64 s[36:37], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 8 +; SI-NEXT: s_lshr_b64 s[48:49], s[4:5], 24 +; SI-NEXT: s_lshr_b64 s[54:55], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[4:5], 8 +; SI-NEXT: s_lshr_b32 s31, s43, 8 ; SI-NEXT: s_lshr_b32 s93, s41, 8 -; SI-NEXT: s_lshr_b32 s89, s13, 8 -; SI-NEXT: s_lshr_b32 s77, s9, 8 -; SI-NEXT: s_lshr_b32 s73, s15, 8 -; SI-NEXT: s_lshr_b32 s61, s11, 8 +; SI-NEXT: s_lshr_b32 s89, s15, 8 +; SI-NEXT: s_lshr_b32 s77, s13, 8 +; SI-NEXT: s_lshr_b32 s73, s11, 8 +; SI-NEXT: s_lshr_b32 s61, s9, 8 ; SI-NEXT: s_lshr_b32 s57, s7, 8 ; SI-NEXT: s_lshr_b32 s45, s5, 8 -; SI-NEXT: s_bfe_u32 s99, s83, 0x80008 +; SI-NEXT: s_bfe_u32 s35, s83, 0x80008 ; SI-NEXT: s_bfe_u32 s95, s82, 0x80008 ; SI-NEXT: s_bfe_u32 s91, s81, 0x80008 ; SI-NEXT: s_bfe_u32 s79, s80, 0x80008 @@ -65547,29 +65499,19 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: s_bfe_u32 s63, s70, 0x80008 ; SI-NEXT: s_bfe_u32 s59, s68, 0x80008 ; SI-NEXT: s_bfe_u32 s47, s69, 0x80008 -; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 8 -; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 24 -; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 8 -; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 24 -; SI-NEXT: s_lshr_b64 s[48:49], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8 -; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 24 -; SI-NEXT: s_lshr_b64 s[34:35], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8 ; SI-NEXT: s_cbranch_execnz .LBB97_3 ; SI-NEXT: .LBB97_2: ; %cmp.true -; SI-NEXT: s_add_i32 s58, s58, 3 -; SI-NEXT: s_and_b32 s4, s58, 0xffff -; SI-NEXT: s_lshl_b32 s5, s56, 16 ; SI-NEXT: s_add_i32 s46, s46, 3 +; SI-NEXT: s_and_b32 s4, s46, 0xffff +; SI-NEXT: s_lshl_b32 s5, s44, 16 +; SI-NEXT: s_add_i32 s99, s99, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s46, 0xffff +; SI-NEXT: s_and_b32 s5, s99, 0xffff ; SI-NEXT: s_lshl_b32 s6, s69, 16 ; SI-NEXT: s_add_i32 s28, s28, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 ; SI-NEXT: s_and_b32 s6, s28, 0xffff -; SI-NEXT: s_lshl_b32 s7, s44, 16 +; SI-NEXT: s_lshl_b32 s7, s98, 16 ; SI-NEXT: s_add_i32 s29, s29, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 ; SI-NEXT: s_and_b32 s7, s29, 0xffff @@ -65578,40 +65520,36 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: s_or_b32 s7, s8, s7 ; SI-NEXT: s_and_b32 s8, s26, 0xffff ; SI-NEXT: s_lshl_b32 s9, s97, 16 -; SI-NEXT: s_or_b32 s8, s9, s8 ; SI-NEXT: s_add_i32 s27, s27, 3 -; SI-NEXT: s_add_i32 s10, s8, 0x30000 -; SI-NEXT: s_and_b32 s8, s27, 0xffff -; SI-NEXT: s_lshl_b32 s9, s70, 16 ; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_and_b32 s9, s27, 0xffff +; SI-NEXT: s_lshl_b32 s10, s70, 16 ; SI-NEXT: s_add_i32 s24, s24, 3 -; SI-NEXT: s_add_i32 s11, s8, 0x30000 -; SI-NEXT: s_and_b32 s8, s24, 0xffff -; SI-NEXT: s_lshl_b32 s9, s96, 16 -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: s_and_b32 s10, s24, 0xffff +; SI-NEXT: s_lshl_b32 s11, s96, 16 ; SI-NEXT: s_add_i32 s25, s25, 3 -; SI-NEXT: s_add_i32 s14, s8, 0x30000 -; SI-NEXT: s_and_b32 s8, s25, 0xffff -; SI-NEXT: s_lshl_b32 s9, s71, 16 -; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_or_b32 s10, s11, s10 +; SI-NEXT: s_and_b32 s11, s25, 0xffff +; SI-NEXT: s_lshl_b32 s12, s71, 16 ; SI-NEXT: s_add_i32 s22, s22, 3 -; SI-NEXT: s_add_i32 s15, s8, 0x30000 -; SI-NEXT: s_and_b32 s8, s22, 0xffff -; SI-NEXT: s_lshl_b32 s9, s87, 16 +; SI-NEXT: s_or_b32 s11, s12, s11 +; SI-NEXT: s_and_b32 s12, s22, 0xffff +; SI-NEXT: s_lshl_b32 s13, s87, 16 ; SI-NEXT: s_add_i32 s23, s23, 3 -; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s23, 0xffff -; SI-NEXT: s_lshl_b32 s12, s80, 16 +; SI-NEXT: s_or_b32 s12, s13, s12 +; SI-NEXT: s_and_b32 s13, s23, 0xffff +; SI-NEXT: s_lshl_b32 s14, s80, 16 ; SI-NEXT: s_add_i32 s20, s20, 3 -; SI-NEXT: s_or_b32 s9, s12, s9 -; SI-NEXT: s_and_b32 s12, s20, 0xffff -; SI-NEXT: s_lshl_b32 s13, s86, 16 +; SI-NEXT: s_or_b32 s13, s14, s13 +; SI-NEXT: s_and_b32 s14, s20, 0xffff +; SI-NEXT: s_lshl_b32 s15, s86, 16 ; SI-NEXT: s_add_i32 s21, s21, 3 -; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s13, s21, 0xffff +; SI-NEXT: s_or_b32 s14, s15, s14 +; SI-NEXT: s_and_b32 s15, s21, 0xffff ; SI-NEXT: s_lshl_b32 s20, s81, 16 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s13, s20, s13 +; SI-NEXT: s_or_b32 s15, s20, s15 ; SI-NEXT: s_and_b32 s18, s18, 0xffff ; SI-NEXT: s_lshl_b32 s20, s85, 16 ; SI-NEXT: s_or_b32 s18, s20, s18 @@ -65632,69 +65570,69 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: s_or_b32 s16, s17, s16 ; SI-NEXT: s_add_i32 s43, s16, 0x30000 ; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 24 -; SI-NEXT: v_writelane_b32 v5, s16, 2 -; SI-NEXT: v_writelane_b32 v5, s17, 3 -; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16 -; SI-NEXT: v_writelane_b32 v5, s16, 0 -; SI-NEXT: v_writelane_b32 v5, s17, 1 -; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 24 +; SI-NEXT: s_add_i32 s6, s6, 0x30000 +; SI-NEXT: s_add_i32 s7, s7, 0x30000 ; SI-NEXT: s_add_i32 s8, s8, 0x30000 ; SI-NEXT: s_add_i32 s9, s9, 0x30000 +; SI-NEXT: s_add_i32 s10, s10, 0x30000 +; SI-NEXT: s_add_i32 s11, s11, 0x30000 ; SI-NEXT: s_add_i32 s12, s12, 0x30000 ; SI-NEXT: s_add_i32 s13, s13, 0x30000 -; SI-NEXT: v_writelane_b32 v5, s16, 4 +; SI-NEXT: s_add_i32 s14, s14, 0x30000 +; SI-NEXT: s_add_i32 s15, s15, 0x30000 +; SI-NEXT: v_writelane_b32 v5, s16, 2 ; SI-NEXT: s_add_i32 s4, s4, 0x30000 ; SI-NEXT: s_add_i32 s5, s5, 0x30000 -; SI-NEXT: s_add_i32 s6, s6, 0x30000 -; SI-NEXT: s_add_i32 s7, s7, 0x30000 +; SI-NEXT: v_writelane_b32 v5, s17, 3 +; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16 ; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 8 -; SI-NEXT: v_writelane_b32 v5, s17, 5 +; SI-NEXT: s_lshr_b64 s[56:57], s[40:41], 24 ; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8 -; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 24 -; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8 -; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 24 -; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 8 -; SI-NEXT: s_lshr_b64 s[88:89], s[14:15], 24 -; SI-NEXT: s_lshr_b64 s[92:93], s[14:15], 16 -; SI-NEXT: v_writelane_b32 v5, s16, 6 -; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 8 -; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 24 -; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 8 -; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 24 -; SI-NEXT: s_lshr_b64 s[48:49], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8 -; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 24 -; SI-NEXT: s_lshr_b64 s[34:35], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8 -; SI-NEXT: s_lshr_b32 s99, s43, 24 +; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 8 +; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 24 +; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[14:15], 8 +; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 24 +; SI-NEXT: s_lshr_b64 s[88:89], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[12:13], 8 +; SI-NEXT: s_lshr_b64 s[78:79], s[10:11], 24 +; SI-NEXT: s_lshr_b64 s[94:95], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[8:9], 24 +; SI-NEXT: s_lshr_b64 s[34:35], s[6:7], 24 +; SI-NEXT: v_writelane_b32 v5, s16, 0 +; SI-NEXT: s_lshr_b64 s[38:39], s[10:11], 8 +; SI-NEXT: s_lshr_b64 s[36:37], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 8 +; SI-NEXT: s_lshr_b64 s[48:49], s[4:5], 24 +; SI-NEXT: s_lshr_b64 s[54:55], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[4:5], 8 +; SI-NEXT: s_lshr_b32 s35, s43, 24 ; SI-NEXT: s_lshr_b32 s83, s43, 16 -; SI-NEXT: s_lshr_b32 s98, s43, 8 +; SI-NEXT: s_lshr_b32 s31, s43, 8 ; SI-NEXT: s_lshr_b32 s95, s41, 24 ; SI-NEXT: s_lshr_b32 s82, s41, 16 ; SI-NEXT: s_lshr_b32 s93, s41, 8 -; SI-NEXT: s_lshr_b32 s91, s13, 24 -; SI-NEXT: s_lshr_b32 s81, s13, 16 -; SI-NEXT: s_lshr_b32 s89, s13, 8 -; SI-NEXT: s_lshr_b32 s79, s9, 24 -; SI-NEXT: s_lshr_b32 s80, s9, 16 -; SI-NEXT: s_lshr_b32 s77, s9, 8 -; SI-NEXT: s_lshr_b32 s75, s15, 24 -; SI-NEXT: s_lshr_b32 s71, s15, 16 -; SI-NEXT: s_lshr_b32 s73, s15, 8 -; SI-NEXT: s_lshr_b32 s63, s11, 24 -; SI-NEXT: s_lshr_b32 s70, s11, 16 -; SI-NEXT: s_lshr_b32 s61, s11, 8 +; SI-NEXT: s_lshr_b32 s91, s15, 24 +; SI-NEXT: s_lshr_b32 s81, s15, 16 +; SI-NEXT: s_lshr_b32 s89, s15, 8 +; SI-NEXT: s_lshr_b32 s79, s13, 24 +; SI-NEXT: s_lshr_b32 s80, s13, 16 +; SI-NEXT: s_lshr_b32 s77, s13, 8 +; SI-NEXT: s_lshr_b32 s75, s11, 24 +; SI-NEXT: s_lshr_b32 s71, s11, 16 +; SI-NEXT: s_lshr_b32 s73, s11, 8 +; SI-NEXT: s_lshr_b32 s63, s9, 24 +; SI-NEXT: s_lshr_b32 s70, s9, 16 +; SI-NEXT: s_lshr_b32 s61, s9, 8 ; SI-NEXT: s_lshr_b32 s59, s7, 24 ; SI-NEXT: s_lshr_b32 s68, s7, 16 ; SI-NEXT: s_lshr_b32 s57, s7, 8 ; SI-NEXT: s_lshr_b32 s47, s5, 24 ; SI-NEXT: s_lshr_b32 s69, s5, 16 ; SI-NEXT: s_lshr_b32 s45, s5, 8 -; SI-NEXT: v_writelane_b32 v5, s17, 7 +; SI-NEXT: v_writelane_b32 v5, s17, 1 ; SI-NEXT: .LBB97_3: ; %end ; SI-NEXT: v_readlane_b32 s18, v5, 0 ; SI-NEXT: s_and_b32 s16, s42, 0xff @@ -65710,23 +65648,21 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: v_mov_b32_e32 v1, s16 ; SI-NEXT: s_and_b32 s16, s43, 0xff -; SI-NEXT: s_lshl_b32 s17, s98, 8 +; SI-NEXT: s_lshl_b32 s17, s31, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s83, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s99, 24 +; SI-NEXT: s_lshl_b32 s18, s35, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s19, v5, 3 ; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: s_and_b32 s16, s40, 0xff -; SI-NEXT: s_lshl_b32 s17, s74, 8 +; SI-NEXT: s_lshl_b32 s17, s76, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s60, 0xff -; SI-NEXT: v_readlane_b32 s18, v5, 4 ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s18, 24 +; SI-NEXT: s_lshl_b32 s18, s56, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen @@ -65746,103 +65682,101 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: v_readlane_b32 s19, v5, 5 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: s_lshl_b32 s16, s76, 8 -; SI-NEXT: s_or_b32 s12, s12, s16 -; SI-NEXT: s_and_b32 s16, s72, 0xff -; SI-NEXT: v_readlane_b32 s18, v5, 6 +; SI-NEXT: s_and_b32 s14, s14, 0xff +; SI-NEXT: s_lshl_b32 s16, s90, 8 +; SI-NEXT: s_or_b32 s14, s14, s16 +; SI-NEXT: s_and_b32 s16, s74, 0xff ; SI-NEXT: s_lshl_b32 s16, s16, 16 -; SI-NEXT: s_lshl_b32 s17, s18, 24 -; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: s_lshl_b32 s17, s58, 24 +; SI-NEXT: s_and_b32 s14, s14, 0xffff ; SI-NEXT: s_or_b32 s16, s17, s16 ; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0 -; SI-NEXT: s_or_b32 s12, s12, s16 +; SI-NEXT: s_or_b32 s14, s14, s16 +; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v2, s14 +; SI-NEXT: s_and_b32 s14, s15, 0xff +; SI-NEXT: s_lshl_b32 s15, s89, 8 +; SI-NEXT: s_or_b32 s14, s14, s15 +; SI-NEXT: s_and_b32 s15, s81, 0xff +; SI-NEXT: s_lshl_b32 s15, s15, 16 +; SI-NEXT: s_lshl_b32 s16, s91, 24 +; SI-NEXT: s_and_b32 s14, s14, 0xffff +; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0 +; SI-NEXT: s_or_b32 s14, s14, s15 +; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v2, s14 +; SI-NEXT: s_and_b32 s12, s12, 0xff +; SI-NEXT: s_lshl_b32 s14, s30, 8 +; SI-NEXT: s_or_b32 s12, s12, s14 +; SI-NEXT: s_and_b32 s14, s88, 0xff +; SI-NEXT: s_lshl_b32 s14, s14, 16 +; SI-NEXT: s_lshl_b32 s15, s72, 24 +; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: s_or_b32 s14, s15, s14 +; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0 +; SI-NEXT: s_or_b32 s12, s12, s14 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s12 ; SI-NEXT: s_and_b32 s12, s13, 0xff -; SI-NEXT: s_lshl_b32 s13, s89, 8 +; SI-NEXT: s_lshl_b32 s13, s77, 8 ; SI-NEXT: s_or_b32 s12, s12, s13 -; SI-NEXT: s_and_b32 s13, s81, 0xff +; SI-NEXT: s_and_b32 s13, s80, 0xff ; SI-NEXT: s_lshl_b32 s13, s13, 16 -; SI-NEXT: s_lshl_b32 s16, s91, 24 +; SI-NEXT: s_lshl_b32 s14, s79, 24 ; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_or_b32 s13, s16, s13 -; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0 +; SI-NEXT: s_or_b32 s13, s14, s13 +; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0 ; SI-NEXT: s_or_b32 s12, s12, s13 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s12 -; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: s_lshl_b32 s12, s94, 8 -; SI-NEXT: s_or_b32 s8, s8, s12 -; SI-NEXT: s_and_b32 s12, s90, 0xff +; SI-NEXT: s_and_b32 s10, s10, 0xff +; SI-NEXT: s_lshl_b32 s12, s38, 8 +; SI-NEXT: s_or_b32 s10, s10, s12 +; SI-NEXT: s_and_b32 s12, s94, 0xff ; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_lshl_b32 s13, s78, 24 -; SI-NEXT: s_and_b32 s8, s8, 0xffff +; SI-NEXT: s_and_b32 s10, s10, 0xffff ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0 -; SI-NEXT: s_or_b32 s8, s8, s12 -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v2, s8 -; SI-NEXT: s_and_b32 s8, s9, 0xff -; SI-NEXT: s_lshl_b32 s9, s77, 8 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s80, 0xff -; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s12, s79, 24 -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_or_b32 s9, s12, s9 -; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v2, s8 -; SI-NEXT: s_and_b32 s8, s14, 0xff -; SI-NEXT: s_lshl_b32 s9, s66, 8 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s92, 0xff -; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s12, s88, 24 -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_or_b32 s9, s12, s9 ; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0 -; SI-NEXT: s_or_b32 s8, s8, s9 +; SI-NEXT: s_or_b32 s10, s10, s12 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v2, s8 -; SI-NEXT: s_and_b32 s8, s15, 0xff -; SI-NEXT: s_lshl_b32 s9, s73, 8 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s71, 0xff -; SI-NEXT: s_lshl_b32 s9, s9, 16 +; SI-NEXT: v_mov_b32_e32 v2, s10 +; SI-NEXT: s_and_b32 s10, s11, 0xff +; SI-NEXT: s_lshl_b32 s11, s73, 8 +; SI-NEXT: s_or_b32 s10, s10, s11 +; SI-NEXT: s_and_b32 s11, s71, 0xff +; SI-NEXT: s_lshl_b32 s11, s11, 16 ; SI-NEXT: s_lshl_b32 s12, s75, 24 -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_or_b32 s9, s12, s9 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_or_b32 s11, s12, s11 ; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0 -; SI-NEXT: s_or_b32 s8, s8, s9 +; SI-NEXT: s_or_b32 s10, s10, s11 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v2, s8 -; SI-NEXT: s_and_b32 s8, s10, 0xff -; SI-NEXT: s_lshl_b32 s9, s64, 8 -; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_and_b32 s9, s54, 0xff -; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s10, s52, 24 +; SI-NEXT: v_mov_b32_e32 v2, s10 +; SI-NEXT: s_and_b32 s8, s8, 0xff +; SI-NEXT: s_lshl_b32 s10, s52, 8 +; SI-NEXT: s_or_b32 s8, s8, s10 +; SI-NEXT: s_and_b32 s10, s36, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s11, s92, 24 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: s_or_b32 s10, s11, s10 ; SI-NEXT: v_add_i32_e32 v1, vcc, 36, v0 -; SI-NEXT: s_or_b32 s8, s8, s9 +; SI-NEXT: s_or_b32 s8, s8, s10 ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s8 -; SI-NEXT: s_and_b32 s8, s11, 0xff +; SI-NEXT: s_and_b32 s8, s9, 0xff ; SI-NEXT: s_lshl_b32 s9, s61, 8 ; SI-NEXT: s_or_b32 s8, s8, s9 ; SI-NEXT: s_and_b32 s9, s70, 0xff @@ -65856,11 +65790,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s8 ; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: s_lshl_b32 s8, s50, 8 +; SI-NEXT: s_lshl_b32 s8, s64, 8 ; SI-NEXT: s_or_b32 s6, s6, s8 -; SI-NEXT: s_and_b32 s8, s48, 0xff +; SI-NEXT: s_and_b32 s8, s50, 0xff ; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s38, 24 +; SI-NEXT: s_lshl_b32 s9, s34, 24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff ; SI-NEXT: s_or_b32 s8, s9, s8 ; SI-NEXT: v_add_i32_e32 v1, vcc, 44, v0 @@ -65882,11 +65816,11 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_mov_b32_e32 v2, s6 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s6, s36, 8 +; SI-NEXT: s_lshl_b32 s6, s66, 8 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_and_b32 s6, s34, 0xff +; SI-NEXT: s_and_b32 s6, s54, 0xff ; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s7, s30, 24 +; SI-NEXT: s_lshl_b32 s7, s48, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s7, s6 ; SI-NEXT: v_add_i32_e32 v1, vcc, 52, v0 @@ -65908,7 +65842,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0 ; SI-NEXT: v_mov_b32_e32 v1, s4 ; SI-NEXT: v_readlane_b32 s30, v4, 34 -; SI-NEXT: v_readlane_b32 s19, v5, 7 +; SI-NEXT: v_readlane_b32 s19, v5, 3 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; SI-NEXT: v_readlane_b32 s31, v4, 35 ; SI-NEXT: v_readlane_b32 s99, v4, 33 @@ -65959,56 +65893,52 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr42 ; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr98 -; SI-NEXT: ; implicit-def: $sgpr99 +; SI-NEXT: ; implicit-def: $sgpr31 +; SI-NEXT: ; implicit-def: $sgpr35 ; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr93 ; SI-NEXT: ; implicit-def: $sgpr95 -; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr89 ; SI-NEXT: ; implicit-def: $sgpr91 -; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr30 +; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr77 ; SI-NEXT: ; implicit-def: $sgpr79 +; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr38 +; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr73 ; SI-NEXT: ; implicit-def: $sgpr75 +; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr52 +; SI-NEXT: ; implicit-def: $sgpr36 +; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: ; implicit-def: $sgpr61 ; SI-NEXT: ; implicit-def: $sgpr63 +; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr64 +; SI-NEXT: ; implicit-def: $sgpr50 +; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: ; implicit-def: $sgpr57 ; SI-NEXT: ; implicit-def: $sgpr59 -; SI-NEXT: ; implicit-def: $sgpr45 -; SI-NEXT: ; implicit-def: $sgpr47 -; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; implicit-def: $sgpr78 -; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr66 -; SI-NEXT: ; implicit-def: $sgpr92 -; SI-NEXT: ; implicit-def: $sgpr88 -; SI-NEXT: ; implicit-def: $sgpr10 -; SI-NEXT: ; implicit-def: $sgpr64 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr50 ; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr30 +; SI-NEXT: ; implicit-def: $sgpr45 +; SI-NEXT: ; implicit-def: $sgpr47 ; SI-NEXT: v_writelane_b32 v5, s4, 2 ; SI-NEXT: v_writelane_b32 v5, s5, 3 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v5, s4, 4 -; SI-NEXT: v_writelane_b32 v5, s5, 5 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v5, s4, 6 -; SI-NEXT: v_writelane_b32 v5, s5, 7 -; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: s_branch .LBB97_2 ; ; VI-LABEL: bitcast_v32i16_to_v64i8_scalar: @@ -66430,7 +66360,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -66519,38 +66449,36 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: s_lshr_b64 s[6:7], s[16:17], 24 ; GFX9-NEXT: s_cbranch_execnz .LBB97_4 ; GFX9-NEXT: .LBB97_2: ; %cmp.true -; GFX9-NEXT: v_pk_add_u16 v6, s27, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v5, s26, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v2, s5, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v1, s4, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2] +; GFX9-NEXT: v_pk_add_u16 v4, s29, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v3, s28, 3 op_sel_hi:[1,0] +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_pk_add_u16 v6, s27, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v5, s26, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[3:4] ; GFX9-NEXT: v_pk_add_u16 v8, s25, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v7, s24, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[5:6] ; GFX9-NEXT: v_pk_add_u16 v10, s23, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v9, s22, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8] ; GFX9-NEXT: v_pk_add_u16 v12, s21, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v11, s20, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v4, s29, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v3, s28, 3 op_sel_hi:[1,0] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[9:10] ; GFX9-NEXT: v_pk_add_u16 v14, s19, 3 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_u16 v13, s18, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12] -; GFX9-NEXT: v_pk_add_u16 v19, s17, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_u16 v18, s16, 3 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[18:19] -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 24, v2 +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[11:12] +; GFX9-NEXT: v_pk_add_u16 v16, s17, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_u16 v15, s16, 3 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[13:14] +; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[15:16] ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 24, v2 +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v1 @@ -66582,13 +66510,13 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v14 ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v14 ; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v15 ; GFX9-NEXT: s_branch .LBB97_5 ; GFX9-NEXT: .LBB97_3: ; GFX9-NEXT: ; implicit-def: $sgpr55 @@ -66641,13 +66569,14 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: ; implicit-def: $sgpr56 ; GFX9-NEXT: s_branch .LBB97_2 ; GFX9-NEXT: .LBB97_4: -; GFX9-NEXT: v_mov_b32_e32 v20, s44 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v18, s57 +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v18, s44 +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v20, s42 -; GFX9-NEXT: v_mov_b32_e32 v18, s16 -; GFX9-NEXT: v_mov_b32_e32 v19, s17 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v15, s16 +; GFX9-NEXT: v_mov_b32_e32 v16, s17 ; GFX9-NEXT: v_mov_b32_e32 v13, s18 ; GFX9-NEXT: v_mov_b32_e32 v14, s19 ; GFX9-NEXT: v_mov_b32_e32 v11, s20 @@ -66662,13 +66591,13 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v4, s29 ; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_mov_b32_e32 v2, s5 -; GFX9-NEXT: v_mov_b32_e32 v15, s55 -; GFX9-NEXT: v_mov_b32_e32 v16, s53 +; GFX9-NEXT: v_mov_b32_e32 v25, s55 +; GFX9-NEXT: v_mov_b32_e32 v17, s53 ; GFX9-NEXT: v_mov_b32_e32 v62, s54 -; GFX9-NEXT: v_mov_b32_e32 v59, s52 -; GFX9-NEXT: v_mov_b32_e32 v60, s51 -; GFX9-NEXT: v_mov_b32_e32 v58, s50 -; GFX9-NEXT: v_mov_b32_e32 v61, s48 +; GFX9-NEXT: v_mov_b32_e32 v60, s52 +; GFX9-NEXT: v_mov_b32_e32 v61, s51 +; GFX9-NEXT: v_mov_b32_e32 v59, s50 +; GFX9-NEXT: v_mov_b32_e32 v58, s48 ; GFX9-NEXT: v_mov_b32_e32 v57, s49 ; GFX9-NEXT: v_mov_b32_e32 v47, s39 ; GFX9-NEXT: v_mov_b32_e32 v56, s38 @@ -66700,32 +66629,29 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v29, s60 ; GFX9-NEXT: v_mov_b32_e32 v28, s58 ; GFX9-NEXT: v_mov_b32_e32 v27, s59 -; GFX9-NEXT: v_mov_b32_e32 v17, s57 ; GFX9-NEXT: v_mov_b32_e32 v26, s56 -; GFX9-NEXT: v_mov_b32_e32 v22, s12 -; GFX9-NEXT: v_mov_b32_e32 v23, s10 -; GFX9-NEXT: v_mov_b32_e32 v24, s8 -; GFX9-NEXT: v_mov_b32_e32 v25, s6 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v20, s40 -; GFX9-NEXT: v_mov_b32_e32 v21, s14 +; GFX9-NEXT: v_mov_b32_e32 v18, s42 +; GFX9-NEXT: v_mov_b32_e32 v19, s40 +; GFX9-NEXT: v_mov_b32_e32 v20, s14 +; GFX9-NEXT: v_mov_b32_e32 v21, s12 +; GFX9-NEXT: v_mov_b32_e32 v22, s10 +; GFX9-NEXT: v_mov_b32_e32 v23, s8 +; GFX9-NEXT: v_mov_b32_e32 v24, s6 ; GFX9-NEXT: .LBB97_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v16, v16, v25, s4 -; GFX9-NEXT: v_perm_b32 v15, v18, v15, s4 +; GFX9-NEXT: v_perm_b32 v17, v17, v24, s4 +; GFX9-NEXT: v_perm_b32 v15, v15, v25, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX9-NEXT: v_or_b32_e32 v15, v15, v17 +; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen +; GFX9-NEXT: v_perm_b32 v15, v16, v62, s4 +; GFX9-NEXT: v_perm_b32 v16, v60, v61, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; GFX9-NEXT: v_or_b32_e32 v15, v15, v16 -; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v15, v59, v60, s4 -; GFX9-NEXT: v_perm_b32 v18, v19, v62, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; GFX9-NEXT: v_perm_b32 v19, v61, v24, s4 -; GFX9-NEXT: v_or_b32_e32 v15, v18, v15 ; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v13, v13, v58, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v19 +; GFX9-NEXT: v_perm_b32 v15, v58, v23, s4 +; GFX9-NEXT: v_perm_b32 v13, v13, v59, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v15 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:8 ; GFX9-NEXT: v_perm_b32 v13, v14, v57, s4 @@ -66733,7 +66659,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v13, v45, v23, s4 +; GFX9-NEXT: v_perm_b32 v13, v45, v22, s4 ; GFX9-NEXT: v_perm_b32 v11, v11, v46, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v13 @@ -66743,7 +66669,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 ; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v11, v40, v22, s4 +; GFX9-NEXT: v_perm_b32 v11, v40, v21, s4 ; GFX9-NEXT: v_perm_b32 v9, v9, v41, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v11 @@ -66753,7 +66679,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v9, v51, v21, s4 +; GFX9-NEXT: v_perm_b32 v9, v51, v20, s4 ; GFX9-NEXT: v_perm_b32 v7, v7, v52, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v9 @@ -66763,7 +66689,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 ; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_perm_b32 v7, v38, v20, s4 +; GFX9-NEXT: v_perm_b32 v7, v38, v19, s4 ; GFX9-NEXT: v_perm_b32 v5, v5, v39, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v7 @@ -66773,10 +66699,19 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v5, v33, v18, s4 ; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 +; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48 +; GFX9-NEXT: v_perm_b32 v3, v4, v32, s4 +; GFX9-NEXT: v_perm_b32 v4, v30, v31, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 +; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v1, v1, v29, s4 ; GFX9-NEXT: v_readlane_b32 s30, v63, 14 ; GFX9-NEXT: v_readlane_b32 s31, v63, 15 @@ -66795,25 +66730,14 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: v_readlane_b32 s35, v63, 1 ; GFX9-NEXT: v_readlane_b32 s34, v63, 0 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v5, v33, v5, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v3, v4, v32, s4 -; GFX9-NEXT: v_perm_b32 v4, v30, v31, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v3, v28, v3, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v3 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 ; GFX9-NEXT: v_perm_b32 v1, v2, v27, s4 -; GFX9-NEXT: v_perm_b32 v2, v17, v26, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v26, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 @@ -66833,7 +66757,7 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32 ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -67983,10 +67907,10 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill @@ -68001,10 +67925,10 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:116 ; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112 ; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:108 -; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:104 -; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:100 -; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:96 -; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:92 +; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:104 +; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:100 +; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:96 +; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:92 ; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:88 ; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:84 ; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:80 @@ -68047,7 +67971,7 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_perm_b32 v13, v35, v34, s6 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_perm_b32 v14, v49, v48, s6 +; VI-NEXT: v_perm_b32 v14, v39, v38, s6 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_perm_b32 v15, v51, v50, s6 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -68071,8 +67995,8 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr49 -; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr51 ; VI-NEXT: ; implicit-def: $vgpr50 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -68081,20 +68005,20 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s6 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_perm_b32 v1, v2, v1, s6 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s6 ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload @@ -68135,7 +68059,7 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v12, v12, v13 ; VI-NEXT: v_perm_b32 v13, v37, v36, s6 ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: v_perm_b32 v14, v39, v38, s6 +; VI-NEXT: v_perm_b32 v14, v49, v48, s6 ; VI-NEXT: v_perm_b32 v16, v32, v54, s6 ; VI-NEXT: v_or_b32_e32 v14, v14, v15 ; VI-NEXT: v_perm_b32 v15, v53, v52, s6 @@ -68190,8 +68114,8 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; implicit-def: $vgpr53 ; VI-NEXT: ; implicit-def: $vgpr52 ; VI-NEXT: ; implicit-def: $vgpr32 @@ -68209,12 +68133,12 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_e32 v1, 3, v51 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v50 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v2, 3, v39 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v38 -; VI-NEXT: v_or_b32_sdwa v14, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: s_waitcnt vmcnt(12) ; VI-NEXT: v_add_u16_e32 v2, 3, v49 ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v48 +; VI-NEXT: v_or_b32_sdwa v14, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(12) +; VI-NEXT: v_add_u16_e32 v2, 3, v39 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v38 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_mov_b32_e32 v3, 0x300 ; VI-NEXT: v_add_u16_sdwa v32, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -68345,15 +68269,15 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v2, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v0, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; VI-NEXT: v_or_b32_sdwa v19, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v0, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -68439,14 +68363,14 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:116 ; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 ; GFX9-NEXT: v_mov_b32_e32 v19, v12 -; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill @@ -68489,13 +68413,13 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(18) ; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v5 ; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_lshlrev_b16_e32 v37, 8, v6 +; GFX9-NEXT: v_lshlrev_b16_e32 v35, 8, v6 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_lshlrev_b16_e32 v51, 8, v7 +; GFX9-NEXT: v_lshlrev_b16_e32 v50, 8, v7 ; GFX9-NEXT: s_waitcnt vmcnt(15) -; GFX9-NEXT: v_lshlrev_b16_e32 v35, 8, v8 +; GFX9-NEXT: v_lshlrev_b16_e32 v37, 8, v8 ; GFX9-NEXT: s_waitcnt vmcnt(14) -; GFX9-NEXT: v_lshlrev_b16_e32 v50, 8, v9 +; GFX9-NEXT: v_lshlrev_b16_e32 v51, 8, v9 ; GFX9-NEXT: s_waitcnt vmcnt(13) ; GFX9-NEXT: v_lshlrev_b16_e32 v49, 8, v10 ; GFX9-NEXT: s_waitcnt vmcnt(12) @@ -68519,7 +68443,7 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_or_b32_sdwa v11, v55, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v12, v42, v41, s6 -; GFX9-NEXT: v_or_b32_sdwa v13, v43, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v13, v43, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v14, v58, v57, s6 ; GFX9-NEXT: v_or_b32_sdwa v15, v34, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: ; implicit-def: $vgpr22 @@ -68540,7 +68464,7 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr34 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v0, v1, v0, s6 @@ -68548,22 +68472,22 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v0, v1, v0, s7 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: v_perm_b32 v1, v3, v2, s7 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s7 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload @@ -68597,11 +68521,11 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v9, v9, v10, s7 ; GFX9-NEXT: v_or_b32_sdwa v10, v48, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v10, v11, v10, s7 -; GFX9-NEXT: v_or_b32_sdwa v11, v40, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v11, v40, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v11, v11, v12, s7 -; GFX9-NEXT: v_or_b32_sdwa v12, v44, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v12, v44, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v12, v13, v12, s7 -; GFX9-NEXT: v_or_b32_sdwa v13, v46, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v13, v46, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v13, v13, v14, s7 ; GFX9-NEXT: v_or_b32_sdwa v14, v31, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v14, v15, v14, s7 @@ -68658,9 +68582,9 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: .LBB98_2: ; %Flow @@ -68682,24 +68606,24 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v46 -; GFX9-NEXT: v_or_b32_sdwa v0, v50, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_or_b32_sdwa v0, v51, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v3, 3, v34 ; GFX9-NEXT: v_add_u16_e32 v34, 0x300, v0 ; GFX9-NEXT: s_waitcnt vmcnt(4) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v44 -; GFX9-NEXT: v_or_b32_sdwa v0, v51, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_or_b32_sdwa v0, v50, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v43 -; GFX9-NEXT: v_or_b32_sdwa v0, v35, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v0 +; GFX9-NEXT: v_or_b32_sdwa v0, v37, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v0 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v42 ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v41 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v40 -; GFX9-NEXT: v_or_b32_sdwa v0, v37, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v0 +; GFX9-NEXT: v_or_b32_sdwa v0, v35, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v48 ; GFX9-NEXT: v_or_b32_sdwa v0, v38, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v0 @@ -68761,8 +68685,8 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v8, v39, v8, s6 ; GFX9-NEXT: v_perm_b32 v9, v38, v9, s6 ; GFX9-NEXT: v_perm_b32 v10, v33, v10, s6 -; GFX9-NEXT: v_perm_b32 v11, v37, v11, s6 -; GFX9-NEXT: v_perm_b32 v12, v35, v12, s6 +; GFX9-NEXT: v_perm_b32 v11, v35, v11, s6 +; GFX9-NEXT: v_perm_b32 v12, v37, v12, s6 ; GFX9-NEXT: v_perm_b32 v13, v34, v13, s6 ; GFX9-NEXT: v_perm_b32 v14, v32, v14, s6 ; GFX9-NEXT: v_perm_b32 v15, v31, v15, s6 @@ -68803,16 +68727,16 @@ define <32 x i16> @bitcast_v64i8_to_v32i16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v2, v18, v2, s6 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 @@ -69711,660 +69635,701 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 ; SI-NEXT: ; implicit-def: $vgpr44 : SGPR spill to VGPR lane -; SI-NEXT: v_readfirstlane_b32 s4, v16 -; SI-NEXT: v_writelane_b32 v44, s23, 0 -; SI-NEXT: v_writelane_b32 v44, s22, 1 -; SI-NEXT: v_writelane_b32 v44, s21, 2 -; SI-NEXT: v_writelane_b32 v44, s20, 3 -; SI-NEXT: v_writelane_b32 v44, s4, 4 -; SI-NEXT: s_mov_b32 s82, s29 -; SI-NEXT: s_mov_b32 s85, s25 -; SI-NEXT: s_mov_b32 s29, s24 -; SI-NEXT: s_mov_b32 s44, s16 -; SI-NEXT: v_readfirstlane_b32 s64, v30 -; SI-NEXT: v_readfirstlane_b32 s55, v29 -; SI-NEXT: v_readfirstlane_b32 s66, v28 -; SI-NEXT: v_readfirstlane_b32 s69, v27 -; SI-NEXT: v_readfirstlane_b32 s68, v26 -; SI-NEXT: v_readfirstlane_b32 s39, v25 -; SI-NEXT: v_readfirstlane_b32 s50, v24 -; SI-NEXT: v_readfirstlane_b32 s65, v23 -; SI-NEXT: v_readfirstlane_b32 s51, v22 -; SI-NEXT: v_readfirstlane_b32 s37, v21 -; SI-NEXT: v_readfirstlane_b32 s53, v20 -; SI-NEXT: v_readfirstlane_b32 s88, v19 -; SI-NEXT: v_readfirstlane_b32 s31, v18 -; SI-NEXT: v_readfirstlane_b32 s95, v17 -; SI-NEXT: v_readfirstlane_b32 s48, v15 -; SI-NEXT: v_readfirstlane_b32 s35, v14 -; SI-NEXT: v_readfirstlane_b32 s34, v13 -; SI-NEXT: v_readfirstlane_b32 s52, v12 -; SI-NEXT: v_readfirstlane_b32 s16, v11 -; SI-NEXT: v_readfirstlane_b32 s96, v10 -; SI-NEXT: v_readfirstlane_b32 s20, v9 -; SI-NEXT: v_readfirstlane_b32 s89, v8 -; SI-NEXT: v_readfirstlane_b32 s92, v7 -; SI-NEXT: v_readfirstlane_b32 s91, v6 -; SI-NEXT: v_readfirstlane_b32 s93, v5 -; SI-NEXT: v_readfirstlane_b32 s30, v4 -; SI-NEXT: v_readfirstlane_b32 s38, v3 -; SI-NEXT: v_readfirstlane_b32 s49, v2 -; SI-NEXT: v_readfirstlane_b32 s54, v1 -; SI-NEXT: v_readfirstlane_b32 s90, v0 +; SI-NEXT: s_mov_b32 s92, s26 +; SI-NEXT: v_writelane_b32 v44, s25, 0 +; SI-NEXT: v_writelane_b32 v44, s24, 1 +; SI-NEXT: v_writelane_b32 v44, s19, 2 +; SI-NEXT: s_mov_b32 s93, s27 +; SI-NEXT: s_mov_b32 s79, s21 +; SI-NEXT: s_mov_b32 s89, s20 +; SI-NEXT: s_mov_b32 s78, s18 +; SI-NEXT: s_mov_b32 s88, s17 +; SI-NEXT: s_mov_b32 s90, s16 +; SI-NEXT: v_readfirstlane_b32 s84, v30 +; SI-NEXT: v_readfirstlane_b32 s38, v29 +; SI-NEXT: v_readfirstlane_b32 s74, v28 +; SI-NEXT: v_readfirstlane_b32 s44, v27 +; SI-NEXT: v_readfirstlane_b32 s96, v26 +; SI-NEXT: v_readfirstlane_b32 s67, v25 +; SI-NEXT: v_readfirstlane_b32 s68, v24 +; SI-NEXT: v_readfirstlane_b32 s70, v23 +; SI-NEXT: v_readfirstlane_b32 s71, v22 +; SI-NEXT: v_readfirstlane_b32 s53, v21 +; SI-NEXT: v_readfirstlane_b32 s55, v20 +; SI-NEXT: v_readfirstlane_b32 s51, v19 +; SI-NEXT: v_readfirstlane_b32 s83, v18 +; SI-NEXT: v_readfirstlane_b32 s48, v17 +; SI-NEXT: v_readfirstlane_b32 s50, v16 +; SI-NEXT: v_readfirstlane_b32 s69, v15 +; SI-NEXT: v_readfirstlane_b32 s82, v14 +; SI-NEXT: v_readfirstlane_b32 s65, v13 +; SI-NEXT: v_readfirstlane_b32 s98, v12 +; SI-NEXT: v_readfirstlane_b32 s85, v11 +; SI-NEXT: v_readfirstlane_b32 s52, v10 +; SI-NEXT: v_readfirstlane_b32 s37, v9 +; SI-NEXT: v_readfirstlane_b32 s25, v8 +; SI-NEXT: v_readfirstlane_b32 s94, v7 +; SI-NEXT: v_readfirstlane_b32 s39, v6 +; SI-NEXT: v_readfirstlane_b32 s30, v5 +; SI-NEXT: v_readfirstlane_b32 s49, v4 +; SI-NEXT: v_readfirstlane_b32 s36, v3 +; SI-NEXT: v_readfirstlane_b32 s66, v2 +; SI-NEXT: v_readfirstlane_b32 s95, v1 +; SI-NEXT: v_readfirstlane_b32 s31, v0 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 +; SI-NEXT: v_readfirstlane_b32 s14, v32 +; SI-NEXT: v_writelane_b32 v44, s14, 3 +; SI-NEXT: v_readfirstlane_b32 s26, v34 ; SI-NEXT: s_and_b64 s[4:5], vcc, exec -; SI-NEXT: v_readfirstlane_b32 s56, v32 -; SI-NEXT: v_readfirstlane_b32 s86, v33 -; SI-NEXT: v_readfirstlane_b32 s58, v34 -; SI-NEXT: v_readfirstlane_b32 s99, v35 -; SI-NEXT: v_readfirstlane_b32 s24, v36 +; SI-NEXT: v_readfirstlane_b32 s61, v33 +; SI-NEXT: v_readfirstlane_b32 s40, v35 +; SI-NEXT: v_readfirstlane_b32 s18, v36 ; SI-NEXT: s_waitcnt vmcnt(13) -; SI-NEXT: v_readfirstlane_b32 s78, v37 +; SI-NEXT: v_readfirstlane_b32 s58, v37 ; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_readfirstlane_b32 s25, v38 +; SI-NEXT: v_readfirstlane_b32 s19, v38 ; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_readfirstlane_b32 s21, v39 +; SI-NEXT: v_readfirstlane_b32 s35, v39 ; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_readfirstlane_b32 s22, v48 +; SI-NEXT: v_readfirstlane_b32 s57, v48 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_readfirstlane_b32 s23, v49 +; SI-NEXT: v_readfirstlane_b32 s81, v49 ; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_readfirstlane_b32 s87, v50 +; SI-NEXT: v_readfirstlane_b32 s45, v50 +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_readfirstlane_b32 s47, v51 ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_readfirstlane_b32 s47, v52 -; SI-NEXT: v_readfirstlane_b32 s83, v51 +; SI-NEXT: v_readfirstlane_b32 s59, v52 ; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_readfirstlane_b32 s84, v53 +; SI-NEXT: v_readfirstlane_b32 s80, v53 ; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_readfirstlane_b32 s36, v54 +; SI-NEXT: v_readfirstlane_b32 s34, v54 ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_readfirstlane_b32 s79, v55 +; SI-NEXT: v_readfirstlane_b32 s64, v55 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_readfirstlane_b32 s71, v40 +; SI-NEXT: v_readfirstlane_b32 s54, v40 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_readfirstlane_b32 s98, v41 +; SI-NEXT: v_readfirstlane_b32 s97, v41 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_readfirstlane_b32 s81, v42 -; SI-NEXT: v_writelane_b32 v44, s47, 5 -; SI-NEXT: v_writelane_b32 v44, s58, 6 +; SI-NEXT: v_readfirstlane_b32 s99, v42 +; SI-NEXT: v_writelane_b32 v44, s26, 4 +; SI-NEXT: v_writelane_b32 v44, s40, 5 ; SI-NEXT: s_cbranch_scc0 .LBB99_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s4, s44, 0xff -; SI-NEXT: s_lshl_b32 s5, s17, 8 -; SI-NEXT: s_or_b32 s12, s4, s5 -; SI-NEXT: s_and_b32 s4, s18, 0xff -; SI-NEXT: s_lshl_b32 s4, s4, 16 -; SI-NEXT: s_lshl_b32 s5, s19, 24 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s29, 0xff -; SI-NEXT: s_lshl_b32 s6, s85, 8 -; SI-NEXT: s_or_b32 s13, s5, s6 -; SI-NEXT: s_and_b32 s5, s26, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s6, s27, 24 -; SI-NEXT: s_or_b32 s6, s6, s5 -; SI-NEXT: s_and_b32 s5, s49, 0xff -; SI-NEXT: s_lshl_b32 s7, s38, 8 -; SI-NEXT: s_or_b32 s14, s5, s7 -; SI-NEXT: s_and_b32 s5, s30, 0xff +; SI-NEXT: s_and_b32 s4, s90, 0xff +; SI-NEXT: s_lshl_b32 s5, s88, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s78, 0xff +; SI-NEXT: v_readlane_b32 s6, v44, 2 ; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s6, s6, 24 +; SI-NEXT: s_or_b32 s76, s6, s5 +; SI-NEXT: v_readlane_b32 s5, v44, 1 +; SI-NEXT: v_readlane_b32 s6, v44, 0 +; SI-NEXT: s_and_b32 s5, s5, 0xff +; SI-NEXT: s_lshl_b32 s6, s6, 8 +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_and_b32 s6, s92, 0xff +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s7, s93, 24 -; SI-NEXT: s_or_b32 s8, s7, s5 -; SI-NEXT: s_and_b32 s5, s96, 0xff -; SI-NEXT: s_lshl_b32 s7, s16, 8 -; SI-NEXT: s_or_b32 s15, s5, s7 -; SI-NEXT: s_and_b32 s5, s52, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s34, 24 -; SI-NEXT: s_or_b32 s10, s7, s5 -; SI-NEXT: s_and_b32 s5, s31, 0xff -; SI-NEXT: s_lshl_b32 s7, s88, 8 -; SI-NEXT: s_or_b32 s40, s5, s7 -; SI-NEXT: s_and_b32 s5, s53, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s37, 24 -; SI-NEXT: s_or_b32 s60, s7, s5 -; SI-NEXT: s_and_b32 s5, s68, 0xff -; SI-NEXT: s_lshl_b32 s7, s69, 8 -; SI-NEXT: s_or_b32 s41, s5, s7 -; SI-NEXT: s_and_b32 s5, s66, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s55, 24 -; SI-NEXT: s_or_b32 s62, s7, s5 -; SI-NEXT: s_and_b32 s5, s79, 0xff +; SI-NEXT: s_mov_b32 s17, s78 +; SI-NEXT: s_or_b32 s78, s7, s6 +; SI-NEXT: s_and_b32 s6, s66, 0xff ; SI-NEXT: s_lshl_b32 s7, s36, 8 -; SI-NEXT: s_or_b32 s42, s5, s7 -; SI-NEXT: s_and_b32 s5, s21, 0xff -; SI-NEXT: s_lshl_b32 s7, s25, 8 -; SI-NEXT: s_or_b32 s43, s5, s7 -; SI-NEXT: v_readlane_b32 s5, v44, 3 -; SI-NEXT: v_readlane_b32 s7, v44, 2 -; SI-NEXT: s_and_b32 s5, s5, 0xff -; SI-NEXT: s_lshl_b32 s7, s7, 8 -; SI-NEXT: s_or_b32 s5, s5, s7 -; SI-NEXT: v_readlane_b32 s7, v44, 1 -; SI-NEXT: s_and_b32 s7, s7, 0xff -; SI-NEXT: v_readlane_b32 s9, v44, 0 +; SI-NEXT: s_or_b32 s6, s6, s7 +; SI-NEXT: s_and_b32 s7, s49, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_lshl_b32 s9, s9, 24 -; SI-NEXT: s_or_b32 s57, s9, s7 -; SI-NEXT: s_and_b32 s7, s28, 0xff -; SI-NEXT: s_lshl_b32 s9, s82, 8 -; SI-NEXT: s_or_b32 s7, s7, s9 -; SI-NEXT: s_and_b32 s9, s90, 0xff +; SI-NEXT: s_lshl_b32 s8, s30, 24 +; SI-NEXT: s_mov_b32 s91, s88 +; SI-NEXT: s_or_b32 s88, s8, s7 +; SI-NEXT: s_and_b32 s7, s52, 0xff +; SI-NEXT: s_lshl_b32 s8, s85, 8 +; SI-NEXT: s_or_b32 s7, s7, s8 +; SI-NEXT: s_and_b32 s8, s98, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s9, s65, 24 +; SI-NEXT: s_mov_b32 s63, s90 +; SI-NEXT: s_or_b32 s90, s9, s8 +; SI-NEXT: s_and_b32 s8, s83, 0xff +; SI-NEXT: s_lshl_b32 s9, s51, 8 +; SI-NEXT: s_or_b32 s8, s8, s9 +; SI-NEXT: s_and_b32 s9, s55, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s54, 24 -; SI-NEXT: s_or_b32 s77, s11, s9 -; SI-NEXT: s_and_b32 s9, s91, 0xff -; SI-NEXT: s_lshl_b32 s11, s92, 8 -; SI-NEXT: s_or_b32 s9, s9, s11 -; SI-NEXT: s_and_b32 s11, s89, 0xff -; SI-NEXT: s_mov_b32 s72, s44 -; SI-NEXT: s_lshl_b32 s11, s11, 16 -; SI-NEXT: s_lshl_b32 s44, s20, 24 -; SI-NEXT: s_mov_b32 s59, s16 -; SI-NEXT: s_or_b32 vcc_lo, s44, s11 -; SI-NEXT: s_and_b32 s11, s35, 0xff -; SI-NEXT: s_lshl_b32 s44, s48, 8 -; SI-NEXT: v_readlane_b32 s16, v44, 4 -; SI-NEXT: s_or_b32 s11, s11, s44 -; SI-NEXT: s_and_b32 s44, s16, 0xff -; SI-NEXT: s_lshl_b32 s44, s44, 16 -; SI-NEXT: s_lshl_b32 s45, s95, 24 -; SI-NEXT: s_or_b32 vcc_hi, s45, s44 -; SI-NEXT: s_and_b32 s44, s51, 0xff -; SI-NEXT: s_lshl_b32 s45, s65, 8 -; SI-NEXT: s_or_b32 s44, s44, s45 -; SI-NEXT: s_and_b32 s45, s50, 0xff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s39, 24 -; SI-NEXT: s_and_b32 s44, s44, 0xffff -; SI-NEXT: s_mov_b32 s67, s20 -; SI-NEXT: s_or_b32 s20, s46, s45 -; SI-NEXT: s_or_b32 s61, s44, s20 -; SI-NEXT: s_and_b32 s44, s64, 0xff -; SI-NEXT: s_lshl_b32 s45, s81, 8 -; SI-NEXT: s_or_b32 s44, s44, s45 -; SI-NEXT: s_and_b32 s45, s98, 0xff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s71, 24 -; SI-NEXT: s_and_b32 s44, s44, 0xffff -; SI-NEXT: s_mov_b32 s70, s39 -; SI-NEXT: s_mov_b32 s39, s91 -; SI-NEXT: s_mov_b32 s91, s82 -; SI-NEXT: s_mov_b32 s82, s88 -; SI-NEXT: s_mov_b32 s88, s18 -; SI-NEXT: s_or_b32 s18, s46, s45 -; SI-NEXT: s_or_b32 s63, s44, s18 -; SI-NEXT: s_and_b32 s44, s83, 0xff -; SI-NEXT: s_lshl_b32 s45, s87, 8 -; SI-NEXT: s_or_b32 s44, s44, s45 -; SI-NEXT: s_and_b32 s45, s23, 0xff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s22, 24 -; SI-NEXT: s_mov_b32 s80, s31 -; SI-NEXT: s_mov_b32 s31, s53 -; SI-NEXT: s_mov_b32 s53, s38 -; SI-NEXT: s_mov_b32 s38, s90 -; SI-NEXT: s_mov_b32 s90, s19 -; SI-NEXT: s_or_b32 s19, s46, s45 -; SI-NEXT: s_and_b32 s45, s84, 0xff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s47, 24 -; SI-NEXT: s_and_b32 s44, s44, 0xffff -; SI-NEXT: s_mov_b32 s97, s22 -; SI-NEXT: s_mov_b32 s22, s55 -; SI-NEXT: s_mov_b32 s55, s49 -; SI-NEXT: s_mov_b32 s49, s92 -; SI-NEXT: s_mov_b32 s92, s72 -; SI-NEXT: s_or_b32 s72, s46, s45 -; SI-NEXT: s_or_b32 s73, s44, s19 -; SI-NEXT: s_and_b32 s44, s99, 0xff -; SI-NEXT: s_lshl_b32 s45, s58, 8 -; SI-NEXT: s_or_b32 s44, s44, s45 -; SI-NEXT: s_and_b32 s45, s86, 0xff -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s56, 24 -; SI-NEXT: s_or_b32 s5, s5, s57 -; SI-NEXT: s_mov_b32 s76, s56 -; SI-NEXT: s_mov_b32 s56, s86 -; SI-NEXT: s_mov_b32 s86, s81 -; SI-NEXT: s_mov_b32 s81, s65 -; SI-NEXT: s_mov_b32 s65, s48 -; SI-NEXT: s_mov_b32 s48, s89 -; SI-NEXT: s_mov_b32 s89, s17 -; SI-NEXT: s_or_b32 s17, s46, s45 -; SI-NEXT: s_and_b32 s44, s44, 0xffff -; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: v_writelane_b32 v44, s68, 11 -; SI-NEXT: s_mov_b32 s94, s51 -; SI-NEXT: s_mov_b32 s51, s95 -; SI-NEXT: s_mov_b32 s95, s27 -; SI-NEXT: s_or_b32 s75, s44, s17 -; SI-NEXT: s_mov_b32 s44, s93 -; SI-NEXT: s_mov_b32 s93, s28 -; SI-NEXT: s_and_b32 s28, s42, 0xffff -; SI-NEXT: s_and_b32 s27, s43, 0xffff -; SI-NEXT: s_or_b32 s42, s12, s4 -; SI-NEXT: s_mov_b32 s43, s5 -; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16 -; SI-NEXT: s_or_b32 s9, s9, vcc_lo -; SI-NEXT: s_and_b32 s45, s78, 0xff -; SI-NEXT: v_writelane_b32 v44, s4, 7 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s24, 24 -; SI-NEXT: v_writelane_b32 v44, s5, 8 -; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 16 -; SI-NEXT: s_or_b32 s7, s7, s77 -; SI-NEXT: s_or_b32 s11, s11, vcc_hi -; SI-NEXT: s_mov_b32 s68, s34 -; SI-NEXT: s_or_b32 s74, s46, s45 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_and_b32 s58, s15, 0xffff -; SI-NEXT: s_and_b32 s16, s40, 0xffff -; SI-NEXT: s_mov_b32 s34, s29 -; SI-NEXT: s_and_b32 s29, s41, 0xffff -; SI-NEXT: v_writelane_b32 v44, s4, 9 -; SI-NEXT: s_mov_b32 s45, s78 -; SI-NEXT: s_mov_b32 s78, s84 -; SI-NEXT: s_mov_b32 s84, s69 -; SI-NEXT: s_mov_b32 s69, s59 -; SI-NEXT: s_or_b32 s40, s13, s6 -; SI-NEXT: s_mov_b32 s41, s7 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 -; SI-NEXT: s_or_b32 s14, s14, s8 -; SI-NEXT: s_mov_b32 s15, s9 -; SI-NEXT: v_writelane_b32 v44, s5, 10 -; SI-NEXT: s_or_b32 s12, s58, s10 -; SI-NEXT: s_mov_b32 s13, s11 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 -; SI-NEXT: s_or_b32 s10, s16, s60 -; SI-NEXT: s_mov_b32 s11, s61 -; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16 -; SI-NEXT: s_or_b32 s8, s29, s62 -; SI-NEXT: s_mov_b32 s9, s63 -; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16 -; SI-NEXT: s_or_b32 s6, s28, s72 -; SI-NEXT: s_mov_b32 s7, s73 -; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16 -; SI-NEXT: s_or_b32 s4, s27, s74 -; SI-NEXT: s_mov_b32 s5, s75 -; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16 -; SI-NEXT: s_mov_b32 s29, s34 -; SI-NEXT: s_mov_b32 s16, s69 -; SI-NEXT: s_mov_b32 s69, s84 -; SI-NEXT: s_mov_b32 s84, s78 -; SI-NEXT: s_mov_b32 s78, s45 -; SI-NEXT: s_mov_b32 s28, s93 -; SI-NEXT: s_mov_b32 s93, s44 -; SI-NEXT: s_lshr_b32 s47, s57, 16 -; SI-NEXT: s_lshr_b32 s57, s77, 16 -; SI-NEXT: s_lshr_b32 s59, vcc_lo, 16 -; SI-NEXT: s_lshr_b32 s61, vcc_hi, 16 -; SI-NEXT: s_lshr_b32 s63, s20, 16 -; SI-NEXT: s_mov_b32 s20, s67 -; SI-NEXT: s_mov_b32 s34, s68 -; SI-NEXT: v_readlane_b32 s68, v44, 11 -; SI-NEXT: s_lshr_b32 s73, s18, 16 -; SI-NEXT: s_mov_b32 s18, s88 -; SI-NEXT: s_mov_b32 s27, s95 -; SI-NEXT: s_mov_b32 s95, s51 -; SI-NEXT: s_mov_b32 s51, s94 -; SI-NEXT: s_mov_b32 s88, s82 -; SI-NEXT: s_mov_b32 s82, s91 -; SI-NEXT: s_mov_b32 s91, s39 -; SI-NEXT: s_mov_b32 s39, s70 -; SI-NEXT: s_lshr_b32 s75, s19, 16 -; SI-NEXT: s_mov_b32 s19, s90 -; SI-NEXT: s_mov_b32 s90, s38 -; SI-NEXT: s_mov_b32 s38, s53 -; SI-NEXT: s_mov_b32 s53, s31 -; SI-NEXT: s_mov_b32 s44, s92 -; SI-NEXT: s_mov_b32 s92, s49 -; SI-NEXT: s_mov_b32 s49, s55 -; SI-NEXT: s_mov_b32 s55, s22 -; SI-NEXT: s_mov_b32 s31, s80 -; SI-NEXT: s_mov_b32 s22, s97 -; SI-NEXT: s_lshr_b32 s45, s17, 16 -; SI-NEXT: s_mov_b32 s17, s89 -; SI-NEXT: s_mov_b32 s89, s48 -; SI-NEXT: s_mov_b32 s48, s65 -; SI-NEXT: s_mov_b32 s65, s81 -; SI-NEXT: s_mov_b32 s81, s86 -; SI-NEXT: s_mov_b32 s86, s56 -; SI-NEXT: s_mov_b32 s56, s76 +; SI-NEXT: s_lshl_b32 s10, s53, 24 +; SI-NEXT: s_mov_b32 vcc_hi, s92 +; SI-NEXT: s_or_b32 s92, s10, s9 +; SI-NEXT: s_and_b32 s9, s96, 0xff +; SI-NEXT: s_lshl_b32 s10, s44, 8 +; SI-NEXT: s_or_b32 s9, s9, s10 +; SI-NEXT: s_and_b32 s10, s74, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s11, s38, 24 +; SI-NEXT: s_or_b32 s16, s11, s10 +; SI-NEXT: s_and_b32 s10, s64, 0xff +; SI-NEXT: s_lshl_b32 s11, s34, 8 +; SI-NEXT: s_or_b32 s77, s10, s11 +; SI-NEXT: s_and_b32 s10, s80, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s59, 24 +; SI-NEXT: s_or_b32 vcc_lo, s12, s10 +; SI-NEXT: s_and_b32 s10, s35, 0xff +; SI-NEXT: s_lshl_b32 s12, s19, 8 +; SI-NEXT: s_or_b32 s87, s10, s12 +; SI-NEXT: s_and_b32 s10, s58, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s18, 24 +; SI-NEXT: s_mov_b32 s46, s98 +; SI-NEXT: s_mov_b32 s98, s30 +; SI-NEXT: s_or_b32 s30, s12, s10 +; SI-NEXT: s_and_b32 s10, s89, 0xff +; SI-NEXT: s_lshl_b32 s12, s79, 8 +; SI-NEXT: s_or_b32 s15, s10, s12 +; SI-NEXT: s_and_b32 s10, s22, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s23, 24 +; SI-NEXT: s_or_b32 s41, s12, s10 +; SI-NEXT: s_and_b32 s10, s28, 0xff +; SI-NEXT: s_lshl_b32 s12, s29, 8 +; SI-NEXT: s_or_b32 s43, s10, s12 +; SI-NEXT: s_and_b32 s10, s31, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s95, 24 +; SI-NEXT: s_mov_b32 s21, s51 +; SI-NEXT: s_mov_b32 s51, s55 +; SI-NEXT: s_mov_b32 s55, s36 +; SI-NEXT: s_or_b32 s36, s12, s10 +; SI-NEXT: s_and_b32 s10, s39, 0xff +; SI-NEXT: s_lshl_b32 s12, s94, 8 +; SI-NEXT: s_or_b32 s24, s10, s12 +; SI-NEXT: s_and_b32 s10, s25, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s37, 24 +; SI-NEXT: s_mov_b32 s27, s38 +; SI-NEXT: s_or_b32 s38, s12, s10 +; SI-NEXT: s_and_b32 s10, s82, 0xff +; SI-NEXT: s_lshl_b32 s12, s69, 8 +; SI-NEXT: s_mov_b32 s60, s83 +; SI-NEXT: s_mov_b32 s83, s66 +; SI-NEXT: s_mov_b32 s66, s94 +; SI-NEXT: s_mov_b32 s94, s25 +; SI-NEXT: s_or_b32 s25, s10, s12 +; SI-NEXT: s_and_b32 s10, s50, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s48, 24 +; SI-NEXT: s_mov_b32 s13, s65 +; SI-NEXT: s_mov_b32 s65, s37 +; SI-NEXT: s_or_b32 s37, s12, s10 +; SI-NEXT: s_and_b32 s10, s71, 0xff +; SI-NEXT: s_lshl_b32 s12, s70, 8 +; SI-NEXT: s_mov_b32 s75, s19 +; SI-NEXT: s_mov_b32 s19, s44 +; SI-NEXT: s_or_b32 s44, s10, s12 +; SI-NEXT: s_and_b32 s10, s68, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s67, 24 +; SI-NEXT: s_mov_b32 s73, s18 +; SI-NEXT: s_mov_b32 s18, s34 +; SI-NEXT: s_mov_b32 s34, s53 +; SI-NEXT: s_mov_b32 s53, s71 +; SI-NEXT: s_mov_b32 s71, s48 +; SI-NEXT: s_or_b32 s48, s12, s10 +; SI-NEXT: s_and_b32 s10, s84, 0xff +; SI-NEXT: s_lshl_b32 s12, s99, 8 +; SI-NEXT: s_or_b32 s62, s10, s12 +; SI-NEXT: s_and_b32 s10, s97, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s54, 24 +; SI-NEXT: s_mov_b32 s11, s29 +; SI-NEXT: s_mov_b32 s29, s97 +; SI-NEXT: s_mov_b32 s97, s85 +; SI-NEXT: s_mov_b32 s85, s68 +; SI-NEXT: s_mov_b32 s68, s67 +; SI-NEXT: s_mov_b32 s67, s39 +; SI-NEXT: s_or_b32 s39, s12, s10 +; SI-NEXT: s_and_b32 s10, s47, 0xff +; SI-NEXT: s_lshl_b32 s12, s45, 8 +; SI-NEXT: s_or_b32 s72, s10, s12 +; SI-NEXT: s_and_b32 s10, s81, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s57, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_mov_b32 s20, s84 +; SI-NEXT: s_mov_b32 s84, s82 +; SI-NEXT: s_mov_b32 s82, s50 +; SI-NEXT: s_or_b32 s50, s12, s10 +; SI-NEXT: s_and_b32 s10, s40, 0xff +; SI-NEXT: s_lshl_b32 s12, s26, 8 +; SI-NEXT: s_or_b32 s42, s4, s76 +; SI-NEXT: s_and_b32 s4, s5, 0xffff +; SI-NEXT: s_mov_b32 s56, s74 +; SI-NEXT: s_or_b32 s74, s10, s12 +; SI-NEXT: s_and_b32 s10, s61, 0xff +; SI-NEXT: s_or_b32 s40, s4, s78 +; SI-NEXT: s_and_b32 s4, s6, 0xffff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s14, 24 +; SI-NEXT: s_or_b32 s14, s4, s88 +; SI-NEXT: s_and_b32 s4, s7, 0xffff +; SI-NEXT: s_mov_b32 s26, s54 +; SI-NEXT: s_mov_b32 s54, s96 +; SI-NEXT: s_mov_b32 s96, s52 +; SI-NEXT: s_mov_b32 s52, s70 +; SI-NEXT: s_mov_b32 s70, s49 +; SI-NEXT: s_or_b32 s49, s12, s10 +; SI-NEXT: s_or_b32 s12, s4, s90 +; SI-NEXT: s_and_b32 s4, s8, 0xffff +; SI-NEXT: s_or_b32 s10, s4, s92 +; SI-NEXT: s_and_b32 s4, s9, 0xffff +; SI-NEXT: s_and_b32 s5, s15, 0xffff +; SI-NEXT: s_or_b32 s8, s4, s16 +; SI-NEXT: s_and_b32 s4, s77, 0xffff +; SI-NEXT: s_or_b32 s77, s5, s41 +; SI-NEXT: s_or_b32 s6, s4, vcc_lo +; SI-NEXT: s_and_b32 s4, s87, 0xffff +; SI-NEXT: s_lshr_b64 s[86:87], s[76:77], 16 +; SI-NEXT: s_and_b32 s5, s43, 0xffff +; SI-NEXT: v_writelane_b32 v44, s86, 6 +; SI-NEXT: s_mov_b32 s7, s79 +; SI-NEXT: s_or_b32 s79, s5, s36 +; SI-NEXT: v_writelane_b32 v44, s87, 7 +; SI-NEXT: s_lshr_b64 s[86:87], s[78:79], 16 +; SI-NEXT: s_and_b32 s5, s24, 0xffff +; SI-NEXT: v_writelane_b32 v44, s86, 8 +; SI-NEXT: s_mov_b32 s9, s89 +; SI-NEXT: s_or_b32 s89, s5, s38 +; SI-NEXT: s_and_b32 s5, s25, 0xffff +; SI-NEXT: v_writelane_b32 v44, s87, 9 +; SI-NEXT: s_lshr_b64 s[86:87], s[88:89], 16 +; SI-NEXT: s_mov_b32 s88, s91 +; SI-NEXT: s_or_b32 s91, s5, s37 +; SI-NEXT: s_and_b32 s5, s44, 0xffff +; SI-NEXT: s_mov_b32 s76, s93 +; SI-NEXT: s_or_b32 s93, s5, s48 +; SI-NEXT: s_and_b32 s5, s62, 0xffff +; SI-NEXT: s_mov_b32 s78, s17 +; SI-NEXT: v_writelane_b32 v44, s86, 10 +; SI-NEXT: s_or_b32 s17, s5, s39 +; SI-NEXT: v_writelane_b32 v44, s87, 11 +; SI-NEXT: s_lshr_b64 s[24:25], s[90:91], 16 +; SI-NEXT: s_mov_b32 s90, s63 +; SI-NEXT: s_lshr_b64 s[62:63], s[16:17], 16 +; SI-NEXT: s_and_b32 s5, s72, 0xffff +; SI-NEXT: s_lshr_b64 s[86:87], s[92:93], 16 +; SI-NEXT: s_mov_b32 s92, vcc_hi +; SI-NEXT: v_writelane_b32 v44, s62, 12 +; SI-NEXT: s_or_b32 vcc_hi, s5, s50 +; SI-NEXT: v_writelane_b32 v44, s63, 13 +; SI-NEXT: s_lshr_b64 s[62:63], vcc, 16 +; SI-NEXT: s_and_b32 s5, s74, 0xffff +; SI-NEXT: v_writelane_b32 v44, s62, 14 +; SI-NEXT: s_mov_b32 vcc_lo, s31 +; SI-NEXT: s_or_b32 s31, s5, s49 +; SI-NEXT: v_writelane_b32 v44, s63, 15 +; SI-NEXT: s_lshr_b64 s[62:63], s[30:31], 16 +; SI-NEXT: v_writelane_b32 v44, s62, 16 +; SI-NEXT: s_or_b32 s4, s4, s30 +; SI-NEXT: v_writelane_b32 v44, s63, 17 +; SI-NEXT: s_mov_b32 s30, s98 +; SI-NEXT: s_mov_b32 s98, s46 +; SI-NEXT: s_mov_b32 s74, s56 +; SI-NEXT: s_lshr_b32 s46, s41, 16 +; SI-NEXT: s_lshr_b32 s56, s36, 16 +; SI-NEXT: s_mov_b32 s36, s55 +; SI-NEXT: s_mov_b32 s55, s51 +; SI-NEXT: s_mov_b32 s51, s21 +; SI-NEXT: s_lshr_b32 s87, s38, 16 +; SI-NEXT: s_mov_b32 s25, s94 +; SI-NEXT: s_mov_b32 s94, s66 +; SI-NEXT: s_mov_b32 s66, s83 +; SI-NEXT: s_mov_b32 s83, s60 +; SI-NEXT: s_mov_b32 s38, s27 +; SI-NEXT: s_mov_b32 s44, s19 +; SI-NEXT: s_mov_b32 s19, s75 +; SI-NEXT: s_lshr_b32 s60, s37, 16 +; SI-NEXT: s_mov_b32 s37, s65 +; SI-NEXT: s_mov_b32 s65, s13 +; SI-NEXT: s_lshr_b32 s63, s48, 16 +; SI-NEXT: s_mov_b32 s48, s71 +; SI-NEXT: s_mov_b32 s71, s53 +; SI-NEXT: s_mov_b32 s53, s34 +; SI-NEXT: s_mov_b32 s34, s18 +; SI-NEXT: s_mov_b32 s18, s73 +; SI-NEXT: s_lshr_b32 s73, s39, 16 +; SI-NEXT: s_mov_b32 s39, s67 +; SI-NEXT: s_mov_b32 s67, s68 +; SI-NEXT: s_mov_b32 s68, s85 +; SI-NEXT: s_mov_b32 s85, s97 +; SI-NEXT: s_mov_b32 s97, s29 +; SI-NEXT: s_lshr_b32 s75, s50, 16 +; SI-NEXT: s_mov_b32 s50, s82 +; SI-NEXT: s_mov_b32 s82, s84 +; SI-NEXT: s_mov_b32 s84, s20 +; SI-NEXT: s_lshr_b32 s21, s49, 16 +; SI-NEXT: s_mov_b32 s49, s70 +; SI-NEXT: s_mov_b32 s70, s52 +; SI-NEXT: s_mov_b32 s52, s96 +; SI-NEXT: s_mov_b32 s96, s54 +; SI-NEXT: s_mov_b32 s54, s26 +; SI-NEXT: s_mov_b32 s43, s77 +; SI-NEXT: s_mov_b32 s41, s79 +; SI-NEXT: s_mov_b32 s79, s7 +; SI-NEXT: s_mov_b32 s15, s89 +; SI-NEXT: s_mov_b32 s89, s9 +; SI-NEXT: s_mov_b32 s13, s91 +; SI-NEXT: s_mov_b32 s29, s11 +; SI-NEXT: s_mov_b32 s11, s93 +; SI-NEXT: s_mov_b32 s93, s76 +; SI-NEXT: s_mov_b32 s9, s17 +; SI-NEXT: s_mov_b32 s7, vcc_hi +; SI-NEXT: s_mov_b32 s5, s31 +; SI-NEXT: s_mov_b32 s31, vcc_lo ; SI-NEXT: s_mov_b64 s[76:77], 0 ; SI-NEXT: s_branch .LBB99_3 ; SI-NEXT: .LBB99_2: ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr16 ; SI-NEXT: s_mov_b64 s[76:77], -1 -; SI-NEXT: v_writelane_b32 v44, s4, 7 -; SI-NEXT: v_writelane_b32 v44, s5, 8 +; SI-NEXT: v_writelane_b32 v44, s4, 6 +; SI-NEXT: v_writelane_b32 v44, s5, 7 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr47 -; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr57 +; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr59 +; SI-NEXT: ; implicit-def: $sgpr87 ; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr61 -; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr24 ; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr86 ; SI-NEXT: ; implicit-def: $sgpr63 ; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr73 ; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr75 -; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr45 -; SI-NEXT: v_writelane_b32 v44, s4, 9 -; SI-NEXT: v_writelane_b32 v44, s5, 10 +; SI-NEXT: ; implicit-def: $sgpr21 +; SI-NEXT: v_writelane_b32 v44, s4, 8 +; SI-NEXT: v_writelane_b32 v44, s5, 9 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v44, s4, 10 +; SI-NEXT: v_writelane_b32 v44, s5, 11 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v44, s4, 12 +; SI-NEXT: v_writelane_b32 v44, s5, 13 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v44, s4, 14 +; SI-NEXT: v_writelane_b32 v44, s5, 15 +; SI-NEXT: v_writelane_b32 v44, s16, 16 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v44, s17, 17 ; SI-NEXT: .LBB99_3: ; %Flow +; SI-NEXT: v_readlane_b32 s16, v44, 6 +; SI-NEXT: v_readlane_b32 s17, v44, 7 +; SI-NEXT: s_mov_b32 s26, s16 +; SI-NEXT: v_readlane_b32 s16, v44, 8 +; SI-NEXT: v_readlane_b32 s17, v44, 9 +; SI-NEXT: s_mov_b32 s62, s16 +; SI-NEXT: v_readlane_b32 s16, v44, 10 ; SI-NEXT: s_andn2_b64 vcc, exec, s[76:77] -; SI-NEXT: v_readlane_b32 s76, v44, 7 -; SI-NEXT: v_readlane_b32 s77, v44, 8 +; SI-NEXT: s_mov_b32 s72, s16 +; SI-NEXT: v_readlane_b32 s76, v44, 12 +; SI-NEXT: v_readlane_b32 s17, v44, 11 +; SI-NEXT: v_readlane_b32 s77, v44, 13 ; SI-NEXT: s_cbranch_vccnz .LBB99_5 ; SI-NEXT: ; %bb.4: ; %cmp.true -; SI-NEXT: s_add_i32 s21, s21, 3 -; SI-NEXT: s_and_b32 s4, s21, 0xff -; SI-NEXT: s_lshl_b32 s5, s25, 8 -; SI-NEXT: s_add_i32 s78, s78, 3 +; SI-NEXT: s_add_i32 s35, s35, 3 +; SI-NEXT: s_and_b32 s4, s35, 0xff +; SI-NEXT: s_lshl_b32 s5, s19, 8 +; SI-NEXT: s_add_i32 s27, s58, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s6, s78, 0xff +; SI-NEXT: s_and_b32 s6, s27, 0xff ; SI-NEXT: s_addk_i32 s4, 0x300 -; SI-NEXT: s_lshl_b32 s5, s24, 24 +; SI-NEXT: s_lshl_b32 s5, s18, 24 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s5, s6 -; SI-NEXT: s_add_i32 s99, s99, 3 -; SI-NEXT: v_readlane_b32 s6, v44, 6 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s99, 0xff +; SI-NEXT: v_readlane_b32 s5, v44, 5 +; SI-NEXT: s_add_i32 s26, s5, 3 +; SI-NEXT: v_readlane_b32 s6, v44, 4 +; SI-NEXT: s_and_b32 s5, s26, 0xff ; SI-NEXT: s_lshl_b32 s6, s6, 8 -; SI-NEXT: s_add_i32 s86, s86, 3 +; SI-NEXT: s_add_i32 s19, s61, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s7, s86, 0xff +; SI-NEXT: v_readlane_b32 s6, v44, 3 +; SI-NEXT: s_and_b32 s7, s19, 0xff ; SI-NEXT: s_addk_i32 s5, 0x300 -; SI-NEXT: s_lshl_b32 s6, s56, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 24 ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_and_b32 s5, s5, 0xffff ; SI-NEXT: s_or_b32 s6, s6, s7 -; SI-NEXT: s_add_i32 s97, s79, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s97, 0xff -; SI-NEXT: s_lshl_b32 s7, s36, 8 -; SI-NEXT: s_add_i32 s84, s84, 3 +; SI-NEXT: s_add_i32 s6, s64, 3 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_lshl_b32 s7, s34, 8 +; SI-NEXT: s_add_i32 s20, s80, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: v_readlane_b32 s7, v44, 5 -; SI-NEXT: s_and_b32 s8, s84, 0xff +; SI-NEXT: s_and_b32 s8, s20, 0xff ; SI-NEXT: s_addk_i32 s6, 0x300 -; SI-NEXT: s_lshl_b32 s7, s7, 24 +; SI-NEXT: s_lshl_b32 s7, s59, 24 ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_and_b32 s6, s6, 0xffff ; SI-NEXT: s_or_b32 s7, s7, s8 -; SI-NEXT: s_add_i32 s83, s83, 3 +; SI-NEXT: s_add_i32 s21, s47, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s83, 0xff -; SI-NEXT: s_lshl_b32 s8, s87, 8 -; SI-NEXT: s_add_i32 s80, s23, 3 +; SI-NEXT: s_and_b32 s7, s21, 0xff +; SI-NEXT: s_lshl_b32 s8, s45, 8 +; SI-NEXT: s_add_i32 s34, s81, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s9, s80, 0xff +; SI-NEXT: s_and_b32 s9, s34, 0xff ; SI-NEXT: s_addk_i32 s7, 0x300 -; SI-NEXT: s_lshl_b32 s8, s22, 24 +; SI-NEXT: s_lshl_b32 s8, s57, 24 ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_and_b32 s7, s7, 0xffff ; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_add_i32 s68, s68, 3 +; SI-NEXT: s_add_i32 s96, s96, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s68, 0xff -; SI-NEXT: s_lshl_b32 s9, s69, 8 -; SI-NEXT: s_add_i32 s66, s66, 3 +; SI-NEXT: s_and_b32 s8, s96, 0xff +; SI-NEXT: s_lshl_b32 s9, s44, 8 +; SI-NEXT: s_add_i32 s86, s74, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s10, s66, 0xff +; SI-NEXT: s_and_b32 s10, s86, 0xff ; SI-NEXT: s_addk_i32 s8, 0x300 -; SI-NEXT: s_lshl_b32 s9, s55, 24 +; SI-NEXT: s_lshl_b32 s9, s38, 24 ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_and_b32 s8, s8, 0xffff ; SI-NEXT: s_or_b32 s9, s9, s10 -; SI-NEXT: s_add_i32 s64, s64, 3 +; SI-NEXT: s_add_i32 s84, s84, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s64, 0xff -; SI-NEXT: s_lshl_b32 s10, s81, 8 -; SI-NEXT: s_add_i32 s69, s98, 3 +; SI-NEXT: s_and_b32 s9, s84, 0xff +; SI-NEXT: s_lshl_b32 s10, s99, 8 +; SI-NEXT: s_add_i32 s97, s97, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s11, s69, 0xff +; SI-NEXT: s_and_b32 s11, s97, 0xff ; SI-NEXT: s_addk_i32 s9, 0x300 -; SI-NEXT: s_lshl_b32 s10, s71, 24 +; SI-NEXT: s_lshl_b32 s10, s54, 24 ; SI-NEXT: s_lshl_b32 s11, s11, 16 ; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_or_b32 s10, s10, s11 -; SI-NEXT: s_add_i32 s55, s31, 3 +; SI-NEXT: s_add_i32 s83, s83, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s55, 0xff -; SI-NEXT: s_lshl_b32 s11, s88, 8 -; SI-NEXT: s_add_i32 s53, s53, 3 +; SI-NEXT: s_and_b32 s10, s83, 0xff +; SI-NEXT: s_lshl_b32 s11, s51, 8 +; SI-NEXT: s_add_i32 s81, s55, 3 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s12, s53, 0xff +; SI-NEXT: s_and_b32 s12, s81, 0xff ; SI-NEXT: s_addk_i32 s10, 0x300 -; SI-NEXT: s_lshl_b32 s11, s37, 24 +; SI-NEXT: s_lshl_b32 s11, s53, 24 ; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_and_b32 s10, s10, 0xffff ; SI-NEXT: s_or_b32 s11, s11, s12 -; SI-NEXT: s_add_i32 s51, s51, 3 +; SI-NEXT: s_add_i32 s71, s71, 3 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s51, 0xff -; SI-NEXT: s_lshl_b32 s12, s65, 8 +; SI-NEXT: s_and_b32 s11, s71, 0xff +; SI-NEXT: s_lshl_b32 s12, s70, 8 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_lshl_b32 s12, s39, 24 -; SI-NEXT: s_add_i32 s39, s50, 3 -; SI-NEXT: s_and_b32 s13, s39, 0xff +; SI-NEXT: s_lshl_b32 s12, s67, 24 +; SI-NEXT: s_add_i32 s67, s68, 3 +; SI-NEXT: s_and_b32 s13, s67, 0xff ; SI-NEXT: s_addk_i32 s11, 0x300 ; SI-NEXT: s_lshl_b32 s13, s13, 16 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_or_b32 s12, s12, s13 -; SI-NEXT: s_add_i32 s50, s96, 3 +; SI-NEXT: s_add_i32 s70, s52, 3 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s12, s50, 0xff -; SI-NEXT: s_lshl_b32 s13, s16, 8 -; SI-NEXT: s_add_i32 s37, s52, 3 +; SI-NEXT: s_and_b32 s12, s70, 0xff +; SI-NEXT: s_lshl_b32 s13, s85, 8 ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s14, s37, 0xff +; SI-NEXT: s_lshl_b32 s13, s65, 24 +; SI-NEXT: s_add_i32 s65, s98, 3 +; SI-NEXT: s_and_b32 s14, s65, 0xff ; SI-NEXT: s_addk_i32 s12, 0x300 -; SI-NEXT: s_lshl_b32 s13, s34, 24 ; SI-NEXT: s_lshl_b32 s14, s14, 16 ; SI-NEXT: s_and_b32 s12, s12, 0xffff ; SI-NEXT: s_or_b32 s13, s13, s14 -; SI-NEXT: s_add_i32 s35, s35, 3 +; SI-NEXT: s_add_i32 s55, s82, 3 ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s13, s35, 0xff -; SI-NEXT: s_lshl_b32 s14, s48, 8 -; SI-NEXT: v_readlane_b32 s15, v44, 4 +; SI-NEXT: s_and_b32 s13, s55, 0xff +; SI-NEXT: s_lshl_b32 s14, s69, 8 +; SI-NEXT: s_add_i32 s51, s50, 3 ; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: s_lshl_b32 s14, s95, 24 -; SI-NEXT: s_add_i32 s95, s15, 3 -; SI-NEXT: s_and_b32 s15, s95, 0xff +; SI-NEXT: s_and_b32 s15, s51, 0xff ; SI-NEXT: s_addk_i32 s13, 0x300 +; SI-NEXT: s_lshl_b32 s14, s48, 24 ; SI-NEXT: s_lshl_b32 s15, s15, 16 ; SI-NEXT: s_and_b32 s13, s13, 0xffff ; SI-NEXT: s_or_b32 s14, s14, s15 -; SI-NEXT: s_add_i32 s34, s49, 3 +; SI-NEXT: s_add_i32 s54, s66, 3 ; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: s_and_b32 s14, s34, 0xff -; SI-NEXT: s_lshl_b32 s15, s38, 8 +; SI-NEXT: s_and_b32 s14, s54, 0xff +; SI-NEXT: s_lshl_b32 s15, s36, 8 +; SI-NEXT: s_add_i32 s49, s49, 3 ; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_lshl_b32 s15, s93, 24 -; SI-NEXT: s_add_i32 s93, s30, 3 -; SI-NEXT: s_and_b32 s21, s93, 0xff +; SI-NEXT: s_and_b32 s16, s49, 0xff ; SI-NEXT: s_addk_i32 s14, 0x300 -; SI-NEXT: s_lshl_b32 s21, s21, 16 +; SI-NEXT: s_lshl_b32 s15, s30, 24 +; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_or_b32 s15, s15, s21 -; SI-NEXT: s_add_i32 s91, s91, 3 +; SI-NEXT: s_or_b32 s15, s15, s16 +; SI-NEXT: s_add_i32 s39, s39, 3 ; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_and_b32 s15, s91, 0xff -; SI-NEXT: s_lshl_b32 s21, s92, 8 -; SI-NEXT: s_add_i32 s89, s89, 3 -; SI-NEXT: s_or_b32 s15, s21, s15 -; SI-NEXT: s_and_b32 s22, s89, 0xff +; SI-NEXT: s_and_b32 s15, s39, 0xff +; SI-NEXT: s_lshl_b32 s16, s94, 8 +; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_lshl_b32 s16, s37, 24 +; SI-NEXT: s_add_i32 s37, s25, 3 +; SI-NEXT: s_and_b32 s17, s37, 0xff ; SI-NEXT: s_addk_i32 s15, 0x300 -; SI-NEXT: s_lshl_b32 s21, s20, 24 -; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: s_add_i32 s16, s44, 3 +; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_or_b32 s21, s21, s22 -; SI-NEXT: s_add_i32 s24, s29, 3 +; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: v_readlane_b32 s16, v44, 1 +; SI-NEXT: s_add_i32 s16, s16, 3 +; SI-NEXT: v_readlane_b32 s17, v44, 0 ; SI-NEXT: s_and_b32 s16, s16, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s15, s21, s15 -; SI-NEXT: s_and_b32 s21, s24, 0xff -; SI-NEXT: s_lshl_b32 s22, s85, 8 -; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: s_add_i32 s19, s92, 3 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_and_b32 s19, s19, 0xff +; SI-NEXT: s_addk_i32 s16, 0x300 +; SI-NEXT: s_lshl_b32 s17, s93, 24 +; SI-NEXT: s_lshl_b32 s19, s19, 16 +; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_or_b32 s17, s17, s19 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_add_i32 s40, s16, 0x3000000 +; SI-NEXT: s_add_i32 s16, s28, 3 +; SI-NEXT: s_and_b32 s16, s16, 0xff +; SI-NEXT: s_lshl_b32 s17, s29, 8 +; SI-NEXT: s_add_i32 s19, s31, 3 ; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_and_b32 s19, s19, 0xff +; SI-NEXT: s_addk_i32 s16, 0x300 +; SI-NEXT: s_lshl_b32 s17, s95, 24 +; SI-NEXT: s_lshl_b32 s19, s19, 16 +; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_or_b32 s17, s17, s19 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_add_i32 s41, s16, 0x3000000 +; SI-NEXT: s_add_i32 s16, s90, 3 +; SI-NEXT: s_and_b32 s16, s16, 0xff +; SI-NEXT: s_lshl_b32 s17, s88, 8 +; SI-NEXT: s_add_i32 s18, s78, 3 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: v_readlane_b32 s17, v44, 2 ; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: s_and_b32 s20, s26, 0xff ; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s19, 24 +; SI-NEXT: s_lshl_b32 s17, s17, 24 ; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_addk_i32 s21, 0x300 -; SI-NEXT: s_lshl_b32 s22, s27, 24 -; SI-NEXT: s_lshl_b32 s20, s20, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s21, s21, 0xffff -; SI-NEXT: s_or_b32 s22, s22, s20 ; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: s_add_i32 s28, s28, 3 ; SI-NEXT: s_add_i32 s42, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v44, 3 -; SI-NEXT: s_add_i32 s40, s21, 0x3000000 -; SI-NEXT: s_and_b32 s21, s28, 0xff -; SI-NEXT: s_lshl_b32 s22, s82, 8 -; SI-NEXT: s_add_i32 s79, s90, 3 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v44, 2 -; SI-NEXT: v_readlane_b32 s18, v44, 1 -; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: s_and_b32 s22, s79, 0xff +; SI-NEXT: s_add_i32 s16, s89, 3 ; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_addk_i32 s21, 0x300 -; SI-NEXT: s_lshl_b32 s20, s54, 24 -; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s17, s79, 8 +; SI-NEXT: s_add_i32 s18, s22, 3 ; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v44, 0 ; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_and_b32 s21, s21, 0xffff -; SI-NEXT: s_or_b32 s20, s20, s22 ; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 +; SI-NEXT: s_lshl_b32 s17, s23, 24 ; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_or_b32 s20, s20, s21 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_add_i32 s4, s4, 0x3000000 -; SI-NEXT: s_add_i32 s5, s5, 0x3000000 ; SI-NEXT: s_add_i32 s6, s6, 0x3000000 ; SI-NEXT: s_add_i32 s7, s7, 0x3000000 -; SI-NEXT: s_add_i32 s8, s8, 0x3000000 -; SI-NEXT: s_add_i32 s9, s9, 0x3000000 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_add_i32 s43, s16, 0x3000000 +; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 16 +; SI-NEXT: s_add_i32 s4, s4, 0x3000000 +; SI-NEXT: s_add_i32 s5, s5, 0x3000000 ; SI-NEXT: s_add_i32 s10, s10, 0x3000000 ; SI-NEXT: s_add_i32 s11, s11, 0x3000000 -; SI-NEXT: s_add_i32 s12, s12, 0x3000000 -; SI-NEXT: s_add_i32 s13, s13, 0x3000000 ; SI-NEXT: s_add_i32 s14, s14, 0x3000000 ; SI-NEXT: s_add_i32 s15, s15, 0x3000000 -; SI-NEXT: s_add_i32 s41, s20, 0x3000000 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s43, s16, 0x3000000 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16 -; SI-NEXT: v_writelane_b32 v44, s16, 9 -; SI-NEXT: s_lshr_b32 s47, s43, 16 -; SI-NEXT: s_lshr_b32 s57, s41, 16 -; SI-NEXT: s_lshr_b32 s59, s15, 16 -; SI-NEXT: s_lshr_b32 s61, s13, 16 +; SI-NEXT: v_writelane_b32 v44, s16, 14 +; SI-NEXT: s_add_i32 s8, s8, 0x3000000 +; SI-NEXT: s_add_i32 s9, s9, 0x3000000 +; SI-NEXT: s_add_i32 s12, s12, 0x3000000 +; SI-NEXT: s_add_i32 s13, s13, 0x3000000 +; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[86:87], s[10:11], 16 +; SI-NEXT: v_writelane_b32 v44, s17, 15 +; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[26:27], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[24:25], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 16 +; SI-NEXT: v_writelane_b32 v44, s16, 16 +; SI-NEXT: s_lshr_b32 s46, s43, 16 +; SI-NEXT: s_lshr_b32 s56, s41, 16 +; SI-NEXT: s_lshr_b32 s87, s15, 16 +; SI-NEXT: s_lshr_b32 s60, s13, 16 ; SI-NEXT: s_lshr_b32 s63, s11, 16 ; SI-NEXT: s_lshr_b32 s73, s9, 16 ; SI-NEXT: s_lshr_b32 s75, s7, 16 -; SI-NEXT: s_lshr_b32 s45, s5, 16 -; SI-NEXT: v_writelane_b32 v44, s17, 10 +; SI-NEXT: s_lshr_b32 s21, s5, 16 +; SI-NEXT: v_writelane_b32 v44, s17, 17 ; SI-NEXT: .LBB99_5: ; %end ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: s_and_b32 s16, s42, 0xffff -; SI-NEXT: s_lshl_b32 s17, s76, 16 +; SI-NEXT: s_lshl_b32 s17, s26, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s43, 0xffff -; SI-NEXT: s_lshl_b32 s18, s47, 16 +; SI-NEXT: s_lshl_b32 s18, s46, 16 ; SI-NEXT: s_or_b32 s17, s17, s18 ; SI-NEXT: s_and_b32 s18, s40, 0xffff -; SI-NEXT: s_lshl_b32 s19, s46, 16 +; SI-NEXT: s_lshl_b32 s19, s62, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 ; SI-NEXT: s_and_b32 s19, s41, 0xffff -; SI-NEXT: s_lshl_b32 s20, s57, 16 +; SI-NEXT: s_lshl_b32 s20, s56, 16 ; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: v_readlane_b32 s20, v44, 9 ; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s20, s20, 16 +; SI-NEXT: s_lshl_b32 s20, s72, 16 ; SI-NEXT: s_or_b32 s14, s14, s20 ; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s20, s59, 16 +; SI-NEXT: s_lshl_b32 s20, s87, 16 ; SI-NEXT: s_or_b32 s15, s15, s20 ; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s20, s58, 16 +; SI-NEXT: s_lshl_b32 s20, s24, 16 ; SI-NEXT: s_or_b32 s12, s12, s20 ; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s20, s61, 16 +; SI-NEXT: s_lshl_b32 s20, s60, 16 ; SI-NEXT: s_or_b32 s13, s13, s20 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s20, s60, 16 +; SI-NEXT: s_lshl_b32 s20, s86, 16 ; SI-NEXT: s_or_b32 s10, s10, s20 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_lshl_b32 s20, s63, 16 ; SI-NEXT: s_or_b32 s11, s11, s20 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s20, s62, 16 +; SI-NEXT: s_lshl_b32 s20, s76, 16 ; SI-NEXT: s_or_b32 s8, s8, s20 ; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_lshl_b32 s20, s73, 16 +; SI-NEXT: v_readlane_b32 s22, v44, 14 ; SI-NEXT: s_or_b32 s9, s9, s20 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s20, s72, 16 +; SI-NEXT: v_readlane_b32 s23, v44, 15 +; SI-NEXT: s_lshl_b32 s20, s22, 16 ; SI-NEXT: s_or_b32 s6, s6, s20 ; SI-NEXT: s_and_b32 s7, s7, 0xffff ; SI-NEXT: s_lshl_b32 s20, s75, 16 +; SI-NEXT: v_readlane_b32 s22, v44, 16 ; SI-NEXT: s_or_b32 s7, s7, s20 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s20, s74, 16 +; SI-NEXT: s_lshl_b32 s20, s22, 16 ; SI-NEXT: s_or_b32 s4, s4, s20 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s20, s45, 16 +; SI-NEXT: s_lshl_b32 s20, s21, 16 ; SI-NEXT: s_or_b32 s5, s5, s20 ; SI-NEXT: v_readlane_b32 s30, v43, 34 -; SI-NEXT: v_readlane_b32 s21, v44, 10 +; SI-NEXT: v_readlane_b32 s23, v44, 17 ; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v2, s18 @@ -70484,18 +70449,18 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -70576,147 +70541,147 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: .LBB99_2: ; %cmp.true ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34 ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v8, v0, v31, s4 ; VI-NEXT: s_waitcnt vmcnt(12) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33 -; VI-NEXT: v_perm_b32 v9, v0, v28, s4 +; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v33 ; VI-NEXT: s_waitcnt vmcnt(10) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v32 -; VI-NEXT: v_perm_b32 v10, v0, v26, s4 +; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v32 ; VI-NEXT: s_waitcnt vmcnt(8) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v29 -; VI-NEXT: v_perm_b32 v11, v0, v23, s4 +; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v29 ; VI-NEXT: s_waitcnt vmcnt(6) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v30 -; VI-NEXT: v_perm_b32 v12, v0, v24, s4 +; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v30 ; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v27 -; VI-NEXT: v_perm_b32 v13, v0, v21, s4 +; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v27 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v25 -; VI-NEXT: v_perm_b32 v14, v0, v20, s4 +; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v25 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v22 -; VI-NEXT: v_perm_b32 v15, v0, v19, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v18 -; VI-NEXT: v_perm_b32 v17, v0, v17, s4 -; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004 +; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v22 +; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v18 +; VI-NEXT: s_add_i32 s41, s41, 3 +; VI-NEXT: v_mov_b32_e32 v9, 0xc0c0004 +; VI-NEXT: v_perm_b32 v0, v0, v31, s4 +; VI-NEXT: v_perm_b32 v1, v1, v28, s4 +; VI-NEXT: v_perm_b32 v2, v2, v26, s4 +; VI-NEXT: v_perm_b32 v3, v3, v23, s4 +; VI-NEXT: v_perm_b32 v4, v4, v24, s4 +; VI-NEXT: v_perm_b32 v5, v5, v21, s4 +; VI-NEXT: v_perm_b32 v6, v6, v20, s4 +; VI-NEXT: v_perm_b32 v7, v7, v19, s4 +; VI-NEXT: v_perm_b32 v8, v8, v17, s4 +; VI-NEXT: v_perm_b32 v10, s41, v16, v9 ; VI-NEXT: s_add_i32 s40, s40, 3 -; VI-NEXT: v_mov_b32_e32 v1, s14 -; VI-NEXT: v_perm_b32 v18, s40, v1, v0 +; VI-NEXT: v_mov_b32_e32 v11, s14 ; VI-NEXT: s_add_i32 s15, s15, 3 -; VI-NEXT: v_mov_b32_e32 v1, s12 -; VI-NEXT: v_perm_b32 v19, s15, v1, v0 +; VI-NEXT: v_mov_b32_e32 v12, s12 ; VI-NEXT: s_add_i32 s13, s13, 3 -; VI-NEXT: v_mov_b32_e32 v1, s10 -; VI-NEXT: v_perm_b32 v20, s13, v1, v0 +; VI-NEXT: v_mov_b32_e32 v13, s10 ; VI-NEXT: s_add_i32 s11, s11, 3 -; VI-NEXT: v_mov_b32_e32 v1, s8 -; VI-NEXT: v_perm_b32 v21, s11, v1, v0 +; VI-NEXT: v_mov_b32_e32 v14, s8 ; VI-NEXT: s_add_i32 s9, s9, 3 -; VI-NEXT: v_mov_b32_e32 v1, s7 -; VI-NEXT: v_perm_b32 v22, s9, v1, v0 +; VI-NEXT: v_mov_b32_e32 v15, s7 ; VI-NEXT: s_add_i32 s44, s44, 3 -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: v_perm_b32 v23, s44, v1, v0 +; VI-NEXT: v_mov_b32_e32 v16, s6 ; VI-NEXT: s_add_i32 s43, s43, 3 -; VI-NEXT: v_mov_b32_e32 v1, s42 -; VI-NEXT: v_perm_b32 v7, s43, v1, v0 +; VI-NEXT: v_mov_b32_e32 v17, s42 ; VI-NEXT: s_add_i32 s76, s76, 3 -; VI-NEXT: v_mov_b32_e32 v1, s74 -; VI-NEXT: v_perm_b32 v24, s76, v1, v0 +; VI-NEXT: v_mov_b32_e32 v18, s74 ; VI-NEXT: s_add_i32 s75, s75, 3 -; VI-NEXT: v_mov_b32_e32 v1, s72 -; VI-NEXT: v_perm_b32 v6, s75, v1, v0 +; VI-NEXT: v_mov_b32_e32 v19, s72 ; VI-NEXT: s_add_i32 s73, s73, 3 -; VI-NEXT: v_mov_b32_e32 v1, s62 -; VI-NEXT: v_perm_b32 v25, s73, v1, v0 +; VI-NEXT: v_mov_b32_e32 v20, s62 ; VI-NEXT: s_add_i32 s63, s63, 3 -; VI-NEXT: v_mov_b32_e32 v1, s60 -; VI-NEXT: v_perm_b32 v5, s63, v1, v0 +; VI-NEXT: v_mov_b32_e32 v21, s60 ; VI-NEXT: s_add_i32 s61, s61, 3 -; VI-NEXT: v_mov_b32_e32 v1, s58 -; VI-NEXT: v_perm_b32 v26, s61, v1, v0 +; VI-NEXT: v_mov_b32_e32 v22, s58 ; VI-NEXT: s_add_i32 s59, s59, 3 -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_perm_b32 v4, s59, v1, v0 +; VI-NEXT: v_mov_b32_e32 v23, s47 ; VI-NEXT: s_add_i32 s56, s56, 3 -; VI-NEXT: v_mov_b32_e32 v1, s46 -; VI-NEXT: v_perm_b32 v27, s56, v1, v0 +; VI-NEXT: v_mov_b32_e32 v24, s46 ; VI-NEXT: s_add_i32 s57, s57, 3 -; VI-NEXT: v_mov_b32_e32 v1, s45 -; VI-NEXT: v_perm_b32 v3, s57, v1, v0 +; VI-NEXT: v_mov_b32_e32 v25, s45 ; VI-NEXT: s_add_i32 s28, s28, 3 -; VI-NEXT: v_mov_b32_e32 v1, s29 -; VI-NEXT: v_perm_b32 v28, s28, v1, v0 +; VI-NEXT: v_mov_b32_e32 v26, s29 ; VI-NEXT: s_add_i32 s26, s26, 3 -; VI-NEXT: v_mov_b32_e32 v1, s27 -; VI-NEXT: v_perm_b32 v2, s26, v1, v0 +; VI-NEXT: v_mov_b32_e32 v27, s27 ; VI-NEXT: s_add_i32 s24, s24, 3 -; VI-NEXT: v_mov_b32_e32 v1, s25 -; VI-NEXT: s_add_i32 s41, s41, 3 -; VI-NEXT: v_perm_b32 v29, s24, v1, v0 +; VI-NEXT: v_mov_b32_e32 v28, s25 ; VI-NEXT: s_add_i32 s22, s22, 3 -; VI-NEXT: v_mov_b32_e32 v1, s23 +; VI-NEXT: v_mov_b32_e32 v29, s23 ; VI-NEXT: s_add_i32 s20, s20, 3 ; VI-NEXT: v_mov_b32_e32 v30, s21 ; VI-NEXT: s_add_i32 s18, s18, 3 ; VI-NEXT: v_mov_b32_e32 v31, s19 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v32, s17 -; VI-NEXT: v_perm_b32 v16, s41, v16, v0 -; VI-NEXT: v_perm_b32 v1, s22, v1, v0 -; VI-NEXT: v_perm_b32 v30, s20, v30, v0 -; VI-NEXT: v_perm_b32 v31, s18, v31, v0 -; VI-NEXT: v_perm_b32 v0, s16, v32, v0 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_add_u32_e32 v26, vcc, 0x300, v26 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x300, v25 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; VI-NEXT: v_add_u32_e32 v24, vcc, 0x300, v24 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30 -; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29 -; VI-NEXT: v_or_b32_sdwa v3, v3, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v4, v4, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v5, v5, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v6, v6, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v7, v7, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v8 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v10 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v11 -; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v12 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v14 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v15 -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v17 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v16 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v18 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v19 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v20 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v21 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v22 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v23 -; VI-NEXT: v_or_b32_sdwa v0, v31, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v1, v1, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v2, v2, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v8, v8, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v9, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v10, v10, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v11, v11, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v12, v12, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v13, v28, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v14, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v15, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_perm_b32 v11, s40, v11, v9 +; VI-NEXT: v_perm_b32 v12, s15, v12, v9 +; VI-NEXT: v_perm_b32 v13, s13, v13, v9 +; VI-NEXT: v_perm_b32 v14, s11, v14, v9 +; VI-NEXT: v_perm_b32 v15, s9, v15, v9 +; VI-NEXT: v_perm_b32 v16, s44, v16, v9 +; VI-NEXT: v_perm_b32 v17, s43, v17, v9 +; VI-NEXT: v_perm_b32 v18, s76, v18, v9 +; VI-NEXT: v_perm_b32 v19, s75, v19, v9 +; VI-NEXT: v_perm_b32 v20, s73, v20, v9 +; VI-NEXT: v_perm_b32 v21, s63, v21, v9 +; VI-NEXT: v_perm_b32 v22, s61, v22, v9 +; VI-NEXT: v_perm_b32 v23, s59, v23, v9 +; VI-NEXT: v_perm_b32 v24, s56, v24, v9 +; VI-NEXT: v_perm_b32 v25, s57, v25, v9 +; VI-NEXT: v_perm_b32 v26, s28, v26, v9 +; VI-NEXT: v_perm_b32 v27, s26, v27, v9 +; VI-NEXT: v_perm_b32 v28, s24, v28, v9 +; VI-NEXT: v_perm_b32 v29, s22, v29, v9 +; VI-NEXT: v_perm_b32 v30, s20, v30, v9 +; VI-NEXT: v_perm_b32 v31, s18, v31, v9 +; VI-NEXT: v_perm_b32 v9, s16, v32, v9 +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v0 +; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v1 +; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v2 +; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v3 +; VI-NEXT: v_lshlrev_b32_e32 v36, 16, v4 +; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v5 +; VI-NEXT: v_lshlrev_b32_e32 v38, 16, v6 +; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v7 +; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v8 +; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v10 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v12 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v14 +; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v15 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v16 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v17 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v18 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v19 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v20 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v21 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v22 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v23 +; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v24 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v25 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v26 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27 +; VI-NEXT: v_add_u32_e32 v20, vcc, 0x300, v28 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v29 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v30 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v31 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v0, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v1, v1, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v2, v2, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v3, v3, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v4, v4, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v5, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v6, v6, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v7, v7, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v8, v8, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v9, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v10, v10, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v11, v48, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v12, v38, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v13, v36, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v14, v34, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v15, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2 @@ -70743,22 +70708,22 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32 ; GFX9-LABEL: bitcast_v64i8_to_v32i16_scalar: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_readfirstlane_b32 s72, v30 -; GFX9-NEXT: v_readfirstlane_b32 s56, v29 -; GFX9-NEXT: v_readfirstlane_b32 s57, v28 -; GFX9-NEXT: v_readfirstlane_b32 s61, v27 -; GFX9-NEXT: v_readfirstlane_b32 s63, v26 -; GFX9-NEXT: v_readfirstlane_b32 s7, v25 -; GFX9-NEXT: v_readfirstlane_b32 s47, v24 -; GFX9-NEXT: v_readfirstlane_b32 s58, v23 -; GFX9-NEXT: v_readfirstlane_b32 s60, v22 +; GFX9-NEXT: v_readfirstlane_b32 s41, v30 +; GFX9-NEXT: v_readfirstlane_b32 s11, v29 +; GFX9-NEXT: v_readfirstlane_b32 s12, v28 +; GFX9-NEXT: v_readfirstlane_b32 s15, v27 +; GFX9-NEXT: v_readfirstlane_b32 s40, v26 +; GFX9-NEXT: v_readfirstlane_b32 s8, v25 +; GFX9-NEXT: v_readfirstlane_b32 s9, v24 +; GFX9-NEXT: v_readfirstlane_b32 s13, v23 +; GFX9-NEXT: v_readfirstlane_b32 s14, v22 ; GFX9-NEXT: v_readfirstlane_b32 s6, v21 -; GFX9-NEXT: v_readfirstlane_b32 s8, v20 -; GFX9-NEXT: v_readfirstlane_b32 s9, v19 -; GFX9-NEXT: v_readfirstlane_b32 s10, v18 -; GFX9-NEXT: v_readfirstlane_b32 s11, v17 -; GFX9-NEXT: v_readfirstlane_b32 s12, v16 -; GFX9-NEXT: v_readfirstlane_b32 s15, v12 +; GFX9-NEXT: v_readfirstlane_b32 s7, v20 +; GFX9-NEXT: v_readfirstlane_b32 s10, v19 +; GFX9-NEXT: v_readfirstlane_b32 s56, v18 +; GFX9-NEXT: v_readfirstlane_b32 s43, v17 +; GFX9-NEXT: v_readfirstlane_b32 s45, v16 +; GFX9-NEXT: v_readfirstlane_b32 s44, v12 ; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:76 ; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:4 @@ -70779,21 +70744,21 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20 ; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:16 ; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:12 -; GFX9-NEXT: v_readfirstlane_b32 s13, v15 -; GFX9-NEXT: v_readfirstlane_b32 s73, v14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v13 -; GFX9-NEXT: v_readfirstlane_b32 s40, v11 +; GFX9-NEXT: v_readfirstlane_b32 s46, v15 +; GFX9-NEXT: v_readfirstlane_b32 s47, v14 +; GFX9-NEXT: v_readfirstlane_b32 s42, v13 +; GFX9-NEXT: v_readfirstlane_b32 s75, v11 ; GFX9-NEXT: v_readfirstlane_b32 s76, v10 -; GFX9-NEXT: v_readfirstlane_b32 s41, v9 -; GFX9-NEXT: v_readfirstlane_b32 s42, v8 -; GFX9-NEXT: v_readfirstlane_b32 s43, v7 -; GFX9-NEXT: v_readfirstlane_b32 s75, v6 -; GFX9-NEXT: v_readfirstlane_b32 s44, v5 -; GFX9-NEXT: v_readfirstlane_b32 s45, v4 -; GFX9-NEXT: v_readfirstlane_b32 s46, v3 -; GFX9-NEXT: v_readfirstlane_b32 s74, v2 -; GFX9-NEXT: v_readfirstlane_b32 s59, v1 -; GFX9-NEXT: v_readfirstlane_b32 s62, v0 +; GFX9-NEXT: v_readfirstlane_b32 s61, v9 +; GFX9-NEXT: v_readfirstlane_b32 s62, v8 +; GFX9-NEXT: v_readfirstlane_b32 s73, v7 +; GFX9-NEXT: v_readfirstlane_b32 s74, v6 +; GFX9-NEXT: v_readfirstlane_b32 s58, v5 +; GFX9-NEXT: v_readfirstlane_b32 s60, v4 +; GFX9-NEXT: v_readfirstlane_b32 s63, v3 +; GFX9-NEXT: v_readfirstlane_b32 s72, v2 +; GFX9-NEXT: v_readfirstlane_b32 s57, v1 +; GFX9-NEXT: v_readfirstlane_b32 s59, v0 ; GFX9-NEXT: s_waitcnt vmcnt(19) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12 ; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec @@ -70801,17 +70766,17 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v0, s17 ; GFX9-NEXT: v_mov_b32_e32 v8, 0xc0c0004 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v8 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v8 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v8 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v8 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v8 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v8 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v8 ; GFX9-NEXT: v_mov_b32_e32 v3, s27 @@ -70820,247 +70785,246 @@ define inreg <32 x i16> @bitcast_v64i8_to_v32i16_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 ; GFX9-NEXT: v_perm_b32 v3, s28, v3, v8 -; GFX9-NEXT: v_mov_b32_e32 v4, s59 -; GFX9-NEXT: v_perm_b32 v4, s62, v4, v8 +; GFX9-NEXT: v_mov_b32_e32 v4, s57 +; GFX9-NEXT: v_perm_b32 v4, s59, v4, v8 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 -; GFX9-NEXT: v_mov_b32_e32 v4, s46 -; GFX9-NEXT: v_perm_b32 v4, s74, v4, v8 -; GFX9-NEXT: v_mov_b32_e32 v5, s44 -; GFX9-NEXT: v_perm_b32 v5, s45, v5, v8 +; GFX9-NEXT: v_mov_b32_e32 v4, s63 +; GFX9-NEXT: v_perm_b32 v4, s72, v4, v8 +; GFX9-NEXT: v_mov_b32_e32 v5, s58 +; GFX9-NEXT: v_perm_b32 v5, s60, v5, v8 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: v_mov_b32_e32 v5, s43 -; GFX9-NEXT: v_perm_b32 v5, s75, v5, v8 -; GFX9-NEXT: v_mov_b32_e32 v6, s41 -; GFX9-NEXT: v_perm_b32 v6, s42, v6, v8 +; GFX9-NEXT: v_mov_b32_e32 v5, s73 +; GFX9-NEXT: v_perm_b32 v5, s74, v5, v8 +; GFX9-NEXT: v_mov_b32_e32 v6, s61 +; GFX9-NEXT: v_perm_b32 v6, s62, v6, v8 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: v_mov_b32_e32 v6, s40 +; GFX9-NEXT: v_mov_b32_e32 v6, s75 ; GFX9-NEXT: v_perm_b32 v6, s76, v6, v8 -; GFX9-NEXT: v_mov_b32_e32 v7, s14 -; GFX9-NEXT: v_perm_b32 v7, s15, v7, v8 +; GFX9-NEXT: v_mov_b32_e32 v7, s42 +; GFX9-NEXT: v_perm_b32 v7, s44, v7, v8 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 -; GFX9-NEXT: v_mov_b32_e32 v7, s13 -; GFX9-NEXT: v_perm_b32 v7, s73, v7, v8 -; GFX9-NEXT: v_mov_b32_e32 v9, s11 -; GFX9-NEXT: v_perm_b32 v9, s12, v9, v8 +; GFX9-NEXT: v_mov_b32_e32 v7, s46 +; GFX9-NEXT: v_perm_b32 v7, s47, v7, v8 +; GFX9-NEXT: v_mov_b32_e32 v9, s43 +; GFX9-NEXT: v_perm_b32 v9, s45, v9, v8 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; GFX9-NEXT: v_lshl_or_b32 v7, v9, 16, v7 -; GFX9-NEXT: s_waitcnt vmcnt(18) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v16 +; GFX9-NEXT: v_mov_b32_e32 v9, s13 +; GFX9-NEXT: v_perm_b32 v9, s14, v9, v8 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_perm_b32 v10, s72, v18, v8 -; GFX9-NEXT: v_or_b32_sdwa v9, v17, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v9, 16, v10 +; GFX9-NEXT: v_perm_b32 v8, s41, v18, v8 +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v16 +; GFX9-NEXT: v_or_b32_sdwa v10, v17, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v8 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v26 +; GFX9-NEXT: v_lshlrev_b32_e32 v8, 8, v26 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v9, v29, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v8, v29, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v19 -; GFX9-NEXT: v_or_b32_sdwa v10, v21, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_lshl_or_b32 v12, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v20 -; GFX9-NEXT: v_perm_b32 v10, v31, v28, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v23, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v13, v9, 16, v10 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v30 -; GFX9-NEXT: v_or_b32_sdwa v9, v33, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v10, v21, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v12, v10, 16, v8 +; GFX9-NEXT: v_perm_b32 v8, v31, v28, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v20 +; GFX9-NEXT: v_or_b32_sdwa v10, v23, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v13, v10, 16, v8 +; GFX9-NEXT: v_lshlrev_b32_e32 v8, 8, v30 +; GFX9-NEXT: v_or_b32_sdwa v8, v33, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v22 ; GFX9-NEXT: v_or_b32_sdwa v10, v25, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_lshl_or_b32 v14, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v24 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v14, v10, 16, v8 ; GFX9-NEXT: v_perm_b32 v10, v34, v32, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v27, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: s_and_b32 s4, s56, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s10, 8 +; GFX9-NEXT: s_or_b32 s4, s4, s5 +; GFX9-NEXT: s_and_b32 s5, s7, 0xff +; GFX9-NEXT: s_lshl_b32 s77, s6, 8 +; GFX9-NEXT: v_lshlrev_b32_e32 v8, 8, v24 +; GFX9-NEXT: s_or_b32 s5, s5, s77 +; GFX9-NEXT: v_or_b32_sdwa v8, v27, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v15, v9, 16, v10 -; GFX9-NEXT: v_mov_b32_e32 v9, s58 -; GFX9-NEXT: v_perm_b32 v8, s60, v9, v8 -; GFX9-NEXT: s_and_b32 s4, s47, 0xff -; GFX9-NEXT: s_lshl_b32 s5, s7, 8 +; GFX9-NEXT: s_pack_ll_b32_b16 s77, s4, s5 +; GFX9-NEXT: s_and_b32 s4, s9, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s8, 8 +; GFX9-NEXT: v_lshl_or_b32 v15, v8, 16, v10 ; GFX9-NEXT: s_or_b32 s4, s4, s5 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v9, s4, 16, v8 -; GFX9-NEXT: s_and_b32 s4, s10, 0xff -; GFX9-NEXT: s_lshl_b32 s5, s9, 8 +; GFX9-NEXT: s_and_b32 s4, s40, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s15, 8 ; GFX9-NEXT: s_or_b32 s4, s4, s5 -; GFX9-NEXT: s_and_b32 s5, s8, 0xff -; GFX9-NEXT: s_lshl_b32 s77, s6, 8 -; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_pack_ll_b32_b16 s4, s4, s5 -; GFX9-NEXT: s_and_b32 s5, s63, 0xff -; GFX9-NEXT: s_lshl_b32 s77, s61, 8 -; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_and_b32 s77, s57, 0xff -; GFX9-NEXT: s_lshl_b32 s78, s56, 8 -; GFX9-NEXT: s_or_b32 s77, s77, s78 -; GFX9-NEXT: s_pack_ll_b32_b16 s5, s5, s77 -; GFX9-NEXT: v_mov_b32_e32 v8, s4 -; GFX9-NEXT: v_mov_b32_e32 v10, s5 +; GFX9-NEXT: s_and_b32 s5, s12, 0xff +; GFX9-NEXT: s_lshl_b32 s78, s11, 8 +; GFX9-NEXT: s_or_b32 s5, s5, s78 +; GFX9-NEXT: s_pack_ll_b32_b16 s78, s4, s5 +; GFX9-NEXT: v_mov_b32_e32 v8, s77 +; GFX9-NEXT: v_mov_b32_e32 v10, s78 ; GFX9-NEXT: s_cbranch_execnz .LBB99_3 ; GFX9-NEXT: .LBB99_2: ; %cmp.true ; GFX9-NEXT: s_waitcnt vmcnt(12) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v34 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v8, v0, v32, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v27 -; GFX9-NEXT: v_perm_b32 v9, v0, v24, s4 +; GFX9-NEXT: v_add_u32_e32 v1, 3, v27 ; GFX9-NEXT: s_waitcnt vmcnt(8) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v33 -; GFX9-NEXT: v_perm_b32 v10, v0, v30, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v25 -; GFX9-NEXT: v_perm_b32 v11, v0, v22, s4 +; GFX9-NEXT: v_add_u32_e32 v2, 3, v33 +; GFX9-NEXT: v_add_u32_e32 v3, 3, v25 ; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v31 -; GFX9-NEXT: v_perm_b32 v12, v0, v28, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v23 -; GFX9-NEXT: v_perm_b32 v13, v0, v20, s4 +; GFX9-NEXT: v_add_u32_e32 v4, 3, v31 +; GFX9-NEXT: v_add_u32_e32 v5, 3, v23 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v29 -; GFX9-NEXT: v_perm_b32 v14, v0, v26, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v21 -; GFX9-NEXT: v_perm_b32 v15, v0, v19, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v17 -; GFX9-NEXT: v_mov_b32_e32 v19, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v16, v0, v16, s4 -; GFX9-NEXT: s_add_i32 s63, s63, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s61 -; GFX9-NEXT: v_perm_b32 v17, s63, v0, v19 -; GFX9-NEXT: s_add_i32 s57, s57, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s56 -; GFX9-NEXT: v_perm_b32 v20, s57, v0, v19 +; GFX9-NEXT: v_add_u32_e32 v6, 3, v29 +; GFX9-NEXT: v_add_u32_e32 v7, 3, v21 +; GFX9-NEXT: s_add_i32 s41, s41, 3 +; GFX9-NEXT: v_mov_b32_e32 v8, 0xc0c0004 +; GFX9-NEXT: v_add_u32_e32 v10, 3, v17 +; GFX9-NEXT: s_add_i32 s16, s16, 3 +; GFX9-NEXT: v_mov_b32_e32 v31, s17 +; GFX9-NEXT: v_perm_b32 v0, v0, v32, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v24, s4 +; GFX9-NEXT: v_perm_b32 v2, v2, v30, s4 +; GFX9-NEXT: v_perm_b32 v3, v3, v22, s4 +; GFX9-NEXT: v_perm_b32 v4, v4, v28, s4 +; GFX9-NEXT: v_perm_b32 v5, v5, v20, s4 +; GFX9-NEXT: v_perm_b32 v6, v6, v26, s4 +; GFX9-NEXT: v_perm_b32 v7, v7, v19, s4 +; GFX9-NEXT: v_perm_b32 v9, s41, v18, v8 +; GFX9-NEXT: v_perm_b32 v10, v10, v16, s4 +; GFX9-NEXT: s_add_i32 s40, s40, 3 +; GFX9-NEXT: v_mov_b32_e32 v11, s15 +; GFX9-NEXT: s_add_i32 s12, s12, 3 +; GFX9-NEXT: v_mov_b32_e32 v12, s11 +; GFX9-NEXT: s_add_i32 s14, s14, 3 +; GFX9-NEXT: v_mov_b32_e32 v13, s13 +; GFX9-NEXT: s_add_i32 s9, s9, 3 +; GFX9-NEXT: v_mov_b32_e32 v14, s8 +; GFX9-NEXT: s_add_i32 s56, s56, 3 +; GFX9-NEXT: v_mov_b32_e32 v15, s10 +; GFX9-NEXT: s_add_i32 s7, s7, 3 +; GFX9-NEXT: v_mov_b32_e32 v16, s6 +; GFX9-NEXT: s_add_i32 s47, s47, 3 +; GFX9-NEXT: v_mov_b32_e32 v17, s46 +; GFX9-NEXT: s_add_i32 s45, s45, 3 +; GFX9-NEXT: v_mov_b32_e32 v18, s43 +; GFX9-NEXT: s_add_i32 s76, s76, 3 +; GFX9-NEXT: v_mov_b32_e32 v19, s75 +; GFX9-NEXT: s_add_i32 s44, s44, 3 +; GFX9-NEXT: v_mov_b32_e32 v20, s42 +; GFX9-NEXT: s_add_i32 s74, s74, 3 +; GFX9-NEXT: v_mov_b32_e32 v21, s73 +; GFX9-NEXT: s_add_i32 s62, s62, 3 +; GFX9-NEXT: v_mov_b32_e32 v22, s61 +; GFX9-NEXT: s_add_i32 s72, s72, 3 +; GFX9-NEXT: v_mov_b32_e32 v23, s63 ; GFX9-NEXT: s_add_i32 s60, s60, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s58 -; GFX9-NEXT: v_perm_b32 v21, s60, v0, v19 +; GFX9-NEXT: v_mov_b32_e32 v24, s58 +; GFX9-NEXT: s_add_i32 s28, s28, 3 +; GFX9-NEXT: v_mov_b32_e32 v25, s29 +; GFX9-NEXT: s_add_i32 s59, s59, 3 +; GFX9-NEXT: v_mov_b32_e32 v26, s57 +; GFX9-NEXT: s_add_i32 s24, s24, 3 +; GFX9-NEXT: v_mov_b32_e32 v27, s25 +; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: v_mov_b32_e32 v28, s27 ; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s21 -; GFX9-NEXT: v_perm_b32 v0, s20, v0, v19 -; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v0 +; GFX9-NEXT: v_mov_b32_e32 v29, s21 ; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s23 -; GFX9-NEXT: v_perm_b32 v0, s22, v0, v19 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v0 -; GFX9-NEXT: s_add_i32 s16, s16, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s17 -; GFX9-NEXT: v_perm_b32 v0, s16, v0, v19 +; GFX9-NEXT: v_mov_b32_e32 v30, s23 +; GFX9-NEXT: v_perm_b32 v31, s16, v31, v8 ; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s19 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_perm_b32 v3, s18, v3, v19 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: s_add_i32 s24, s24, 3 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_mov_b32_e32 v32, s19 +; GFX9-NEXT: v_perm_b32 v11, s40, v11, v8 +; GFX9-NEXT: v_perm_b32 v12, s12, v12, v8 +; GFX9-NEXT: v_perm_b32 v13, s14, v13, v8 +; GFX9-NEXT: v_perm_b32 v14, s9, v14, v8 +; GFX9-NEXT: v_perm_b32 v15, s56, v15, v8 +; GFX9-NEXT: v_perm_b32 v16, s7, v16, v8 +; GFX9-NEXT: v_perm_b32 v17, s47, v17, v8 +; GFX9-NEXT: v_perm_b32 v18, s45, v18, v8 +; GFX9-NEXT: v_perm_b32 v19, s76, v19, v8 +; GFX9-NEXT: v_perm_b32 v20, s44, v20, v8 +; GFX9-NEXT: v_perm_b32 v21, s74, v21, v8 +; GFX9-NEXT: v_perm_b32 v22, s62, v22, v8 +; GFX9-NEXT: v_perm_b32 v23, s72, v23, v8 +; GFX9-NEXT: v_perm_b32 v24, s60, v24, v8 +; GFX9-NEXT: v_perm_b32 v25, s28, v25, v8 +; GFX9-NEXT: v_perm_b32 v26, s59, v26, v8 +; GFX9-NEXT: v_perm_b32 v27, s24, v27, v8 +; GFX9-NEXT: v_perm_b32 v28, s26, v28, v8 +; GFX9-NEXT: v_perm_b32 v29, s20, v29, v8 +; GFX9-NEXT: v_perm_b32 v30, s22, v30, v8 +; GFX9-NEXT: v_perm_b32 v8, s18, v32, v8 +; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v0 +; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v31 +; GFX9-NEXT: v_add_u32_e32 v39, 0x300, v7 +; GFX9-NEXT: v_add_u32_e32 v48, 0x300, v9 +; GFX9-NEXT: v_add_u32_e32 v49, 0x300, v10 +; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v11 +; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v13 +; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v15 +; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v17 +; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v8 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 -; GFX9-NEXT: v_mov_b32_e32 v2, s25 -; GFX9-NEXT: v_lshl_or_b32 v0, v3, 16, v0 -; GFX9-NEXT: v_perm_b32 v2, s24, v2, v19 -; GFX9-NEXT: s_add_i32 s26, s26, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s27 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_perm_b32 v3, s26, v3, v19 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v1 +; GFX9-NEXT: v_add_u32_e32 v34, 0x300, v2 +; GFX9-NEXT: v_add_u32_e32 v35, 0x300, v3 +; GFX9-NEXT: v_add_u32_e32 v36, 0x300, v4 +; GFX9-NEXT: v_add_u32_e32 v37, 0x300, v5 +; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v6 +; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v12 +; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v14 +; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v16 +; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v18 +; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v19 +; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v21 +; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v23 +; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v25 +; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v27 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v29 +; GFX9-NEXT: v_lshl_or_b32 v0, v8, 16, v0 +; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v13 +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v20 +; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v22 +; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v24 +; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v26 +; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v28 +; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v30 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; GFX9-NEXT: s_add_i32 s28, s28, 3 -; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 -; GFX9-NEXT: v_mov_b32_e32 v3, s29 -; GFX9-NEXT: v_perm_b32 v3, s28, v3, v19 -; GFX9-NEXT: s_add_i32 s62, s62, 3 -; GFX9-NEXT: v_mov_b32_e32 v4, s59 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 -; GFX9-NEXT: v_perm_b32 v4, s62, v4, v19 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; GFX9-NEXT: s_add_i32 s74, s74, 3 -; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 -; GFX9-NEXT: v_mov_b32_e32 v4, s46 -; GFX9-NEXT: v_perm_b32 v4, s74, v4, v19 -; GFX9-NEXT: s_add_i32 s45, s45, 3 -; GFX9-NEXT: v_mov_b32_e32 v5, s44 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 -; GFX9-NEXT: v_perm_b32 v5, s45, v5, v19 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX9-NEXT: s_add_i32 s75, s75, 3 -; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: v_mov_b32_e32 v5, s43 -; GFX9-NEXT: v_perm_b32 v5, s75, v5, v19 -; GFX9-NEXT: s_add_i32 s42, s42, 3 -; GFX9-NEXT: v_mov_b32_e32 v6, s41 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 -; GFX9-NEXT: v_perm_b32 v6, s42, v6, v19 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: s_add_i32 s76, s76, 3 -; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: v_mov_b32_e32 v6, s40 -; GFX9-NEXT: v_perm_b32 v6, s76, v6, v19 -; GFX9-NEXT: s_add_i32 s15, s15, 3 -; GFX9-NEXT: v_mov_b32_e32 v7, s14 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_perm_b32 v7, s15, v7, v19 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX9-NEXT: s_add_i32 s73, s73, 3 -; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 -; GFX9-NEXT: v_mov_b32_e32 v7, s13 -; GFX9-NEXT: v_perm_b32 v7, s73, v7, v19 -; GFX9-NEXT: s_add_i32 s12, s12, 3 -; GFX9-NEXT: v_mov_b32_e32 v22, s11 -; GFX9-NEXT: s_add_i32 s72, s72, 3 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 -; GFX9-NEXT: v_perm_b32 v22, s12, v22, v19 -; GFX9-NEXT: v_perm_b32 v18, s72, v18, v19 -; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v22 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; GFX9-NEXT: s_add_i32 s10, s10, 3 -; GFX9-NEXT: v_mov_b32_e32 v23, s9 -; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v12 -; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v14 -; GFX9-NEXT: s_add_i32 s47, s47, 3 -; GFX9-NEXT: v_lshl_or_b32 v7, v22, 16, v7 -; GFX9-NEXT: v_mov_b32_e32 v22, s7 -; GFX9-NEXT: v_perm_b32 v23, s10, v23, v19 -; GFX9-NEXT: s_add_i32 s8, s8, 3 -; GFX9-NEXT: v_mov_b32_e32 v24, s6 -; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v11 -; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v15 -; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v18 -; GFX9-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; GFX9-NEXT: v_perm_b32 v22, s47, v22, v19 -; GFX9-NEXT: v_perm_b32 v19, s8, v24, v19 -; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v8 -; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v9 -; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v10 -; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 -; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v16 -; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v17 -; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v21 -; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v23 -; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX9-NEXT: v_lshl_or_b32 v12, v14, 16, v12 -; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v28 -; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v20 -; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v22 -; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v19 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v15, 16, v11 -; GFX9-NEXT: v_lshl_or_b32 v13, v13, 16, v14 -; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v26 -; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v24 -; GFX9-NEXT: v_lshl_or_b32 v8, v18, 16, v8 -; GFX9-NEXT: v_lshl_or_b32 v9, v17, 16, v9 -; GFX9-NEXT: v_lshl_or_b32 v10, v16, 16, v10 -; GFX9-NEXT: v_lshl_or_b32 v14, v27, 16, v14 -; GFX9-NEXT: v_lshl_or_b32 v15, v25, 16, v15 +; GFX9-NEXT: v_lshl_or_b32 v7, v15, 16, v7 +; GFX9-NEXT: v_lshl_or_b32 v8, v14, 16, v8 +; GFX9-NEXT: v_lshl_or_b32 v9, v12, 16, v9 +; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10 +; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v48 +; GFX9-NEXT: v_and_b32_e32 v12, 0xffff, v38 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v36 +; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v34 +; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v32 +; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1 +; GFX9-NEXT: v_lshl_or_b32 v2, v20, 16, v2 +; GFX9-NEXT: v_lshl_or_b32 v3, v19, 16, v3 +; GFX9-NEXT: v_lshl_or_b32 v4, v18, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v17, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v16, 16, v6 +; GFX9-NEXT: v_lshl_or_b32 v11, v49, 16, v11 +; GFX9-NEXT: v_lshl_or_b32 v12, v39, 16, v12 +; GFX9-NEXT: v_lshl_or_b32 v13, v37, 16, v13 +; GFX9-NEXT: v_lshl_or_b32 v14, v35, 16, v14 +; GFX9-NEXT: v_lshl_or_b32 v15, v33, 16, v15 ; GFX9-NEXT: .LBB99_3: ; %end ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -72131,18 +72095,18 @@ define inreg <32 x bfloat> @bitcast_v32f16_to_v32bf16_scalar(<32 x half> inreg % ; SI-LABEL: bitcast_v32f16_to_v32bf16_scalar: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1 +; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_writelane_b32 v40, s34, 0 -; SI-NEXT: v_writelane_b32 v40, s35, 1 -; SI-NEXT: v_writelane_b32 v40, s36, 2 -; SI-NEXT: v_writelane_b32 v40, s37, 3 -; SI-NEXT: v_writelane_b32 v40, s38, 4 -; SI-NEXT: v_writelane_b32 v40, s39, 5 -; SI-NEXT: v_writelane_b32 v40, s30, 6 -; SI-NEXT: v_writelane_b32 v40, s31, 7 +; SI-NEXT: v_writelane_b32 v37, s34, 0 +; SI-NEXT: v_writelane_b32 v37, s35, 1 +; SI-NEXT: v_writelane_b32 v37, s36, 2 +; SI-NEXT: v_writelane_b32 v37, s37, 3 +; SI-NEXT: v_writelane_b32 v37, s38, 4 +; SI-NEXT: v_writelane_b32 v37, s39, 5 +; SI-NEXT: v_writelane_b32 v37, s30, 6 +; SI-NEXT: v_writelane_b32 v37, s31, 7 ; SI-NEXT: v_readfirstlane_b32 s60, v1 ; SI-NEXT: v_readfirstlane_b32 s56, v0 ; SI-NEXT: s_lshr_b32 s43, s29, 16 @@ -72199,68 +72163,79 @@ define inreg <32 x bfloat> @bitcast_v32f16_to_v32bf16_scalar(<32 x half> inreg % ; SI-NEXT: s_lshl_b32 s39, s63, 16 ; SI-NEXT: s_cbranch_execnz .LBB101_4 ; SI-NEXT: .LBB101_2: ; %cmp.true +; SI-NEXT: v_cvt_f32_f16_e32 v5, s29 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s42 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s63 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s60 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s28 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s41 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s27 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s40 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s26 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s15 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s25 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s14 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s24 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s13 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s12 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s22 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s11 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s21 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v2, s59 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s42 -; SI-NEXT: v_cvt_f32_f16_e32 v10, s40 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s56 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s28 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s56 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s43 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s10 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 +; SI-NEXT: v_cvt_f32_f16_e32 v24, s9 +; SI-NEXT: v_cvt_f32_f16_e32 v25, s19 +; SI-NEXT: v_cvt_f32_f16_e32 v26, s8 +; SI-NEXT: v_cvt_f32_f16_e32 v27, s18 +; SI-NEXT: v_cvt_f32_f16_e32 v28, s7 +; SI-NEXT: v_cvt_f32_f16_e32 v29, s17 +; SI-NEXT: v_cvt_f32_f16_e32 v30, s6 +; SI-NEXT: v_cvt_f32_f16_e32 v31, s16 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s43 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s29 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s41 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s27 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s26 -; SI-NEXT: v_cvt_f16_f32_e32 v32, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v10, s15 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s25 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s14 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s24 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s13 -; SI-NEXT: v_cvt_f32_f16_e32 v16, s23 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s12 -; SI-NEXT: v_cvt_f32_f16_e32 v18, s22 -; SI-NEXT: v_cvt_f32_f16_e32 v19, s11 -; SI-NEXT: v_cvt_f32_f16_e32 v20, s21 -; SI-NEXT: v_cvt_f32_f16_e32 v21, s10 -; SI-NEXT: v_cvt_f32_f16_e32 v22, s20 -; SI-NEXT: v_cvt_f32_f16_e32 v23, s9 -; SI-NEXT: v_cvt_f32_f16_e32 v24, s19 -; SI-NEXT: v_cvt_f32_f16_e32 v25, s8 -; SI-NEXT: v_cvt_f32_f16_e32 v26, s18 -; SI-NEXT: v_cvt_f32_f16_e32 v27, s7 -; SI-NEXT: v_cvt_f32_f16_e32 v28, s17 -; SI-NEXT: v_cvt_f32_f16_e32 v29, s6 -; SI-NEXT: v_cvt_f32_f16_e32 v30, s16 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 ; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 @@ -72268,65 +72243,54 @@ define inreg <32 x bfloat> @bitcast_v32f16_to_v32bf16_scalar(<32 x half> inreg % ; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28 ; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 ; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30 +; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 +; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 ; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 ; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 +; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 +; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 ; SI-NEXT: v_cvt_f16_f32_e32 v30, v30 ; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 ; SI-NEXT: v_cvt_f16_f32_e32 v28, v28 -; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v29 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v25 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v23 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v21 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v19 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v17 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v15 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v13 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v21 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v20 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v3 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v2 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v1 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v0 ; SI-NEXT: s_branch .LBB101_5 ; SI-NEXT: .LBB101_3: ; SI-NEXT: ; implicit-def: $sgpr44 @@ -72363,113 +72327,113 @@ define inreg <32 x bfloat> @bitcast_v32f16_to_v32bf16_scalar(<32 x half> inreg % ; SI-NEXT: ; implicit-def: $sgpr39 ; SI-NEXT: s_branch .LBB101_2 ; SI-NEXT: .LBB101_4: -; SI-NEXT: v_mov_b32_e32 v1, s39 -; SI-NEXT: v_mov_b32_e32 v0, s38 -; SI-NEXT: v_mov_b32_e32 v3, s37 -; SI-NEXT: v_mov_b32_e32 v2, s36 -; SI-NEXT: v_mov_b32_e32 v5, s35 -; SI-NEXT: v_mov_b32_e32 v4, s34 -; SI-NEXT: v_mov_b32_e32 v7, s31 -; SI-NEXT: v_mov_b32_e32 v6, s30 -; SI-NEXT: v_mov_b32_e32 v9, s95 -; SI-NEXT: v_mov_b32_e32 v8, s94 -; SI-NEXT: v_mov_b32_e32 v11, s93 -; SI-NEXT: v_mov_b32_e32 v10, s92 -; SI-NEXT: v_mov_b32_e32 v13, s91 -; SI-NEXT: v_mov_b32_e32 v12, s90 -; SI-NEXT: v_mov_b32_e32 v15, s89 -; SI-NEXT: v_mov_b32_e32 v14, s88 -; SI-NEXT: v_mov_b32_e32 v17, s79 -; SI-NEXT: v_mov_b32_e32 v16, s78 -; SI-NEXT: v_mov_b32_e32 v19, s77 -; SI-NEXT: v_mov_b32_e32 v18, s76 -; SI-NEXT: v_mov_b32_e32 v21, s75 -; SI-NEXT: v_mov_b32_e32 v20, s74 -; SI-NEXT: v_mov_b32_e32 v23, s73 -; SI-NEXT: v_mov_b32_e32 v22, s72 -; SI-NEXT: v_mov_b32_e32 v25, s62 -; SI-NEXT: v_mov_b32_e32 v24, s61 -; SI-NEXT: v_mov_b32_e32 v27, s58 -; SI-NEXT: v_mov_b32_e32 v26, s57 -; SI-NEXT: v_mov_b32_e32 v29, s47 -; SI-NEXT: v_mov_b32_e32 v28, s46 -; SI-NEXT: v_mov_b32_e32 v31, s45 -; SI-NEXT: v_mov_b32_e32 v30, s44 +; SI-NEXT: v_mov_b32_e32 v17, s39 +; SI-NEXT: v_mov_b32_e32 v16, s38 +; SI-NEXT: v_mov_b32_e32 v18, s37 +; SI-NEXT: v_mov_b32_e32 v15, s36 +; SI-NEXT: v_mov_b32_e32 v19, s35 +; SI-NEXT: v_mov_b32_e32 v14, s34 +; SI-NEXT: v_mov_b32_e32 v20, s31 +; SI-NEXT: v_mov_b32_e32 v13, s30 +; SI-NEXT: v_mov_b32_e32 v21, s95 +; SI-NEXT: v_mov_b32_e32 v12, s94 +; SI-NEXT: v_mov_b32_e32 v22, s93 +; SI-NEXT: v_mov_b32_e32 v11, s92 +; SI-NEXT: v_mov_b32_e32 v23, s91 +; SI-NEXT: v_mov_b32_e32 v10, s90 +; SI-NEXT: v_mov_b32_e32 v24, s89 +; SI-NEXT: v_mov_b32_e32 v9, s88 +; SI-NEXT: v_mov_b32_e32 v25, s79 +; SI-NEXT: v_mov_b32_e32 v8, s78 +; SI-NEXT: v_mov_b32_e32 v26, s77 +; SI-NEXT: v_mov_b32_e32 v7, s76 +; SI-NEXT: v_mov_b32_e32 v27, s75 +; SI-NEXT: v_mov_b32_e32 v6, s74 +; SI-NEXT: v_mov_b32_e32 v28, s73 +; SI-NEXT: v_mov_b32_e32 v5, s72 +; SI-NEXT: v_mov_b32_e32 v30, s62 +; SI-NEXT: v_mov_b32_e32 v29, s61 +; SI-NEXT: v_mov_b32_e32 v32, s58 +; SI-NEXT: v_mov_b32_e32 v31, s57 +; SI-NEXT: v_mov_b32_e32 v34, s47 +; SI-NEXT: v_mov_b32_e32 v33, s46 +; SI-NEXT: v_mov_b32_e32 v36, s45 +; SI-NEXT: v_mov_b32_e32 v35, s44 ; SI-NEXT: .LBB101_5: ; %end -; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v31 -; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30 -; SI-NEXT: v_mul_f32_e32 v29, 1.0, v29 -; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v29 -; SI-NEXT: v_mul_f32_e32 v28, 1.0, v28 -; SI-NEXT: v_mul_f32_e32 v27, 1.0, v27 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v1 -; SI-NEXT: v_mul_f32_e32 v50, 1.0, v0 -; SI-NEXT: v_lshr_b64 v[0:1], v[30:31], 16 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_mul_f32_e32 v26, 1.0, v26 -; SI-NEXT: v_mul_f32_e32 v25, 1.0, v25 -; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3 -; SI-NEXT: v_mul_f32_e32 v48, 1.0, v2 -; SI-NEXT: v_lshr_b64 v[1:2], v[28:29], 16 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v25 -; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24 -; SI-NEXT: v_mul_f32_e32 v23, 1.0, v23 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v3 -; SI-NEXT: v_lshr_b64 v[2:3], v[26:27], 16 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23 -; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22 -; SI-NEXT: v_mul_f32_e32 v21, 1.0, v21 -; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5 -; SI-NEXT: v_mul_f32_e32 v38, 1.0, v4 -; SI-NEXT: v_lshr_b64 v[3:4], v[24:25], 16 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21 -; SI-NEXT: v_mul_f32_e32 v20, 1.0, v20 -; SI-NEXT: v_mul_f32_e32 v19, 1.0, v19 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v5 -; SI-NEXT: v_lshr_b64 v[4:5], v[22:23], 16 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19 -; SI-NEXT: v_mul_f32_e32 v18, 1.0, v18 -; SI-NEXT: v_mul_f32_e32 v17, 1.0, v17 -; SI-NEXT: v_mul_f32_e32 v7, 1.0, v7 -; SI-NEXT: v_mul_f32_e32 v36, 1.0, v6 -; SI-NEXT: v_lshr_b64 v[5:6], v[20:21], 16 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v36 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; SI-NEXT: v_mul_f32_e32 v0, 1.0, v35 +; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 +; SI-NEXT: v_mul_f32_e32 v1, 1.0, v34 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1 +; SI-NEXT: v_mul_f32_e32 v1, 1.0, v33 +; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 +; SI-NEXT: v_mul_f32_e32 v2, 1.0, v32 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2 +; SI-NEXT: v_mul_f32_e32 v2, 1.0, v31 +; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 +; SI-NEXT: v_mul_f32_e32 v3, 1.0, v30 +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3 +; SI-NEXT: v_mul_f32_e32 v3, 1.0, v29 +; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], 16 +; SI-NEXT: v_mul_f32_e32 v4, 1.0, v28 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v4 +; SI-NEXT: v_mul_f32_e32 v28, 1.0, v5 +; SI-NEXT: v_lshr_b64 v[4:5], v[28:29], 16 +; SI-NEXT: v_mul_f32_e32 v5, 1.0, v27 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v5 +; SI-NEXT: v_mul_f32_e32 v27, 1.0, v6 +; SI-NEXT: v_lshr_b64 v[5:6], v[27:28], 16 +; SI-NEXT: v_mul_f32_e32 v6, 1.0, v26 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v6 +; SI-NEXT: v_mul_f32_e32 v26, 1.0, v7 +; SI-NEXT: v_lshr_b64 v[6:7], v[26:27], 16 +; SI-NEXT: v_mul_f32_e32 v7, 1.0, v25 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v7 +; SI-NEXT: v_mul_f32_e32 v25, 1.0, v8 +; SI-NEXT: v_lshr_b64 v[7:8], v[25:26], 16 +; SI-NEXT: v_mul_f32_e32 v8, 1.0, v24 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v8 +; SI-NEXT: v_mul_f32_e32 v24, 1.0, v9 +; SI-NEXT: v_lshr_b64 v[8:9], v[24:25], 16 +; SI-NEXT: v_mul_f32_e32 v9, 1.0, v23 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v9 +; SI-NEXT: v_mul_f32_e32 v23, 1.0, v10 +; SI-NEXT: v_lshr_b64 v[9:10], v[23:24], 16 +; SI-NEXT: v_mul_f32_e32 v10, 1.0, v22 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v10 +; SI-NEXT: v_mul_f32_e32 v22, 1.0, v11 +; SI-NEXT: v_lshr_b64 v[10:11], v[22:23], 16 +; SI-NEXT: v_mul_f32_e32 v11, 1.0, v21 +; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v11 +; SI-NEXT: v_mul_f32_e32 v21, 1.0, v12 +; SI-NEXT: v_lshr_b64 v[11:12], v[21:22], 16 +; SI-NEXT: v_mul_f32_e32 v12, 1.0, v20 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v12 +; SI-NEXT: v_mul_f32_e32 v20, 1.0, v13 +; SI-NEXT: v_lshr_b64 v[12:13], v[20:21], 16 +; SI-NEXT: v_mul_f32_e32 v13, 1.0, v19 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v13 +; SI-NEXT: v_mul_f32_e32 v19, 1.0, v14 +; SI-NEXT: v_lshr_b64 v[13:14], v[19:20], 16 +; SI-NEXT: v_mul_f32_e32 v14, 1.0, v18 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v14 +; SI-NEXT: v_mul_f32_e32 v18, 1.0, v15 +; SI-NEXT: v_lshr_b64 v[14:15], v[18:19], 16 +; SI-NEXT: v_mul_f32_e32 v15, 1.0, v17 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v15 ; SI-NEXT: v_mul_f32_e32 v16, 1.0, v16 -; SI-NEXT: v_mul_f32_e32 v15, 1.0, v15 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7 -; SI-NEXT: v_lshr_b64 v[6:7], v[18:19], 16 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_mul_f32_e32 v14, 1.0, v14 -; SI-NEXT: v_mul_f32_e32 v13, 1.0, v13 -; SI-NEXT: v_mul_f32_e32 v9, 1.0, v9 -; SI-NEXT: v_mul_f32_e32 v34, 1.0, v8 -; SI-NEXT: v_lshr_b64 v[7:8], v[16:17], 16 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_mul_f32_e32 v12, 1.0, v12 -; SI-NEXT: v_mul_f32_e32 v11, 1.0, v11 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v9 -; SI-NEXT: v_lshr_b64 v[8:9], v[14:15], 16 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; SI-NEXT: v_mul_f32_e32 v32, 1.0, v10 -; SI-NEXT: v_lshr_b64 v[9:10], v[12:13], 16 -; SI-NEXT: v_lshr_b64 v[10:11], v[32:33], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[34:35], 16 -; SI-NEXT: v_lshr_b64 v[12:13], v[36:37], 16 -; SI-NEXT: v_lshr_b64 v[13:14], v[38:39], 16 -; SI-NEXT: v_lshr_b64 v[14:15], v[48:49], 16 -; SI-NEXT: v_readlane_b32 s30, v40, 6 -; SI-NEXT: v_lshr_b64 v[15:16], v[50:51], 16 -; SI-NEXT: v_readlane_b32 s31, v40, 7 -; SI-NEXT: v_readlane_b32 s39, v40, 5 -; SI-NEXT: v_readlane_b32 s38, v40, 4 -; SI-NEXT: v_readlane_b32 s37, v40, 3 -; SI-NEXT: v_readlane_b32 s36, v40, 2 -; SI-NEXT: v_readlane_b32 s35, v40, 1 -; SI-NEXT: v_readlane_b32 s34, v40, 0 -; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: v_readlane_b32 s30, v37, 6 +; SI-NEXT: v_lshr_b64 v[15:16], v[16:17], 16 +; SI-NEXT: v_readlane_b32 s31, v37, 7 +; SI-NEXT: v_readlane_b32 s39, v37, 5 +; SI-NEXT: v_readlane_b32 s38, v37, 4 +; SI-NEXT: v_readlane_b32 s37, v37, 3 +; SI-NEXT: v_readlane_b32 s36, v37, 2 +; SI-NEXT: v_readlane_b32 s35, v37, 1 +; SI-NEXT: v_readlane_b32 s34, v37, 0 +; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1 +; SI-NEXT: buffer_load_dword v37, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -72478,10 +72442,10 @@ define inreg <32 x bfloat> @bitcast_v32f16_to_v32bf16_scalar(<32 x half> inreg % ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v18, s30, 0 -; VI-NEXT: v_writelane_b32 v18, s31, 1 +; VI-NEXT: v_writelane_b32 v20, s30, 0 +; VI-NEXT: v_writelane_b32 v20, s31, 1 ; VI-NEXT: v_readfirstlane_b32 s4, v2 ; VI-NEXT: v_readfirstlane_b32 s31, v1 ; VI-NEXT: s_cmp_lg_u32 s4, 0 @@ -72490,87 +72454,87 @@ define inreg <32 x bfloat> @bitcast_v32f16_to_v32bf16_scalar(<32 x half> inreg % ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB101_4 ; VI-NEXT: .LBB101_2: ; %cmp.true -; VI-NEXT: s_lshr_b32 s5, s30, 16 -; VI-NEXT: v_mov_b32_e32 v1, 0x200 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: s_lshr_b32 s5, s31, 16 -; VI-NEXT: v_add_f16_e32 v2, s30, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v5, s5 -; VI-NEXT: s_lshr_b32 s5, s29, 16 -; VI-NEXT: v_or_b32_e32 v14, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s29, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s28, 16 -; VI-NEXT: v_or_b32_e32 v13, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s28, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s27, 16 -; VI-NEXT: v_or_b32_e32 v12, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s27, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s26, 16 -; VI-NEXT: v_or_b32_e32 v11, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s26, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s25, 16 -; VI-NEXT: v_or_b32_e32 v10, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s25, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s24, 16 -; VI-NEXT: v_or_b32_e32 v9, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s24, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s23, 16 -; VI-NEXT: v_or_b32_e32 v8, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s23, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s22, 16 -; VI-NEXT: v_or_b32_e32 v7, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s22, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s21, 16 -; VI-NEXT: v_or_b32_e32 v6, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v4, s31, v1 -; VI-NEXT: v_add_f16_sdwa v5, v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v2, s21, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s20, 16 -; VI-NEXT: v_or_b32_e32 v15, v4, v5 -; VI-NEXT: v_or_b32_e32 v5, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: v_add_f16_e32 v2, s20, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: s_lshr_b32 s5, s19, 16 -; VI-NEXT: v_or_b32_e32 v4, v2, v3 -; VI-NEXT: v_mov_b32_e32 v3, s5 -; VI-NEXT: s_lshr_b32 s5, s18, 16 -; VI-NEXT: v_add_f16_e32 v2, s19, v1 -; VI-NEXT: v_add_f16_sdwa v3, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_mov_b32_e32 v16, s5 +; VI-NEXT: v_mov_b32_e32 v0, 0x200 +; VI-NEXT: v_add_f16_e32 v16, s16, v0 ; VI-NEXT: s_lshr_b32 s4, s16, 16 -; VI-NEXT: v_or_b32_e32 v3, v2, v3 -; VI-NEXT: v_add_f16_e32 v2, s18, v1 -; VI-NEXT: v_add_f16_sdwa v16, v16, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v2, v2, v16 -; VI-NEXT: v_mov_b32_e32 v16, s4 +; VI-NEXT: s_lshr_b32 s16, s31, 16 +; VI-NEXT: v_mov_b32_e32 v15, s16 +; VI-NEXT: s_lshr_b32 s15, s30, 16 +; VI-NEXT: v_add_f16_e32 v14, s31, v0 +; VI-NEXT: v_add_f16_sdwa v15, v15, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v15, v14, v15 +; VI-NEXT: v_mov_b32_e32 v14, s15 +; VI-NEXT: s_lshr_b32 s14, s29, 16 +; VI-NEXT: v_add_f16_e32 v13, s30, v0 +; VI-NEXT: v_add_f16_sdwa v14, v14, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v14, v13, v14 +; VI-NEXT: v_mov_b32_e32 v13, s14 +; VI-NEXT: s_lshr_b32 s13, s28, 16 +; VI-NEXT: v_add_f16_e32 v12, s29, v0 +; VI-NEXT: v_add_f16_sdwa v13, v13, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v13, v12, v13 +; VI-NEXT: v_mov_b32_e32 v12, s13 +; VI-NEXT: s_lshr_b32 s12, s27, 16 +; VI-NEXT: v_add_f16_e32 v11, s28, v0 +; VI-NEXT: v_add_f16_sdwa v12, v12, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v12, v11, v12 +; VI-NEXT: v_mov_b32_e32 v11, s12 +; VI-NEXT: s_lshr_b32 s11, s26, 16 +; VI-NEXT: v_add_f16_e32 v10, s27, v0 +; VI-NEXT: v_add_f16_sdwa v11, v11, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v11, v10, v11 +; VI-NEXT: v_mov_b32_e32 v10, s11 +; VI-NEXT: s_lshr_b32 s10, s25, 16 +; VI-NEXT: v_add_f16_e32 v9, s26, v0 +; VI-NEXT: v_add_f16_sdwa v10, v10, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v10, v9, v10 +; VI-NEXT: v_mov_b32_e32 v9, s10 +; VI-NEXT: s_lshr_b32 s9, s24, 16 +; VI-NEXT: v_add_f16_e32 v8, s25, v0 +; VI-NEXT: v_add_f16_sdwa v9, v9, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v9, v8, v9 +; VI-NEXT: v_mov_b32_e32 v8, s9 +; VI-NEXT: s_lshr_b32 s8, s23, 16 +; VI-NEXT: v_add_f16_e32 v7, s24, v0 +; VI-NEXT: v_add_f16_sdwa v8, v8, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v8, v7, v8 +; VI-NEXT: v_mov_b32_e32 v7, s8 +; VI-NEXT: s_lshr_b32 s7, s22, 16 +; VI-NEXT: v_add_f16_e32 v6, s23, v0 +; VI-NEXT: v_add_f16_sdwa v7, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v7, v6, v7 +; VI-NEXT: v_mov_b32_e32 v6, s7 +; VI-NEXT: s_lshr_b32 s6, s21, 16 +; VI-NEXT: v_add_f16_e32 v5, s22, v0 +; VI-NEXT: v_add_f16_sdwa v6, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v1, s4 ; VI-NEXT: s_lshr_b32 s4, s17, 16 -; VI-NEXT: v_mov_b32_e32 v17, s4 -; VI-NEXT: v_add_f16_e32 v0, s16, v1 -; VI-NEXT: v_add_f16_sdwa v16, v16, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_sdwa v17, v17, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v1, s17, v1 -; VI-NEXT: v_or_b32_e32 v1, v1, v17 -; VI-NEXT: v_or_b32_e32 v0, v0, v16 +; VI-NEXT: v_or_b32_e32 v6, v5, v6 +; VI-NEXT: v_mov_b32_e32 v5, s6 +; VI-NEXT: v_mov_b32_e32 v2, s4 +; VI-NEXT: s_lshr_b32 s4, s18, 16 +; VI-NEXT: s_lshr_b32 s5, s20, 16 +; VI-NEXT: v_add_f16_e32 v4, s21, v0 +; VI-NEXT: v_add_f16_sdwa v5, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_mov_b32_e32 v3, s4 +; VI-NEXT: v_or_b32_e32 v5, v4, v5 +; VI-NEXT: v_mov_b32_e32 v4, s5 +; VI-NEXT: v_add_f16_sdwa v19, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: s_lshr_b32 s4, s19, 16 +; VI-NEXT: v_add_f16_e32 v3, s20, v0 +; VI-NEXT: v_add_f16_sdwa v4, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v4, v3, v4 +; VI-NEXT: v_mov_b32_e32 v3, s4 +; VI-NEXT: v_add_f16_sdwa v17, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v1, s17, v0 +; VI-NEXT: v_add_f16_sdwa v18, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s18, v0 +; VI-NEXT: v_add_f16_sdwa v3, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v0, s19, v0 +; VI-NEXT: v_or_b32_e32 v3, v0, v3 +; VI-NEXT: v_or_b32_e32 v2, v2, v19 +; VI-NEXT: v_or_b32_e32 v1, v1, v18 +; VI-NEXT: v_or_b32_e32 v0, v16, v17 ; VI-NEXT: s_branch .LBB101_5 ; VI-NEXT: .LBB101_3: ; VI-NEXT: s_branch .LBB101_2 @@ -72592,10 +72556,10 @@ define inreg <32 x bfloat> @bitcast_v32f16_to_v32bf16_scalar(<32 x half> inreg % ; VI-NEXT: v_mov_b32_e32 v14, s30 ; VI-NEXT: v_mov_b32_e32 v15, s31 ; VI-NEXT: .LBB101_5: ; %end -; VI-NEXT: v_readlane_b32 s30, v18, 0 -; VI-NEXT: v_readlane_b32 s31, v18, 1 +; VI-NEXT: v_readlane_b32 s30, v20, 0 +; VI-NEXT: v_readlane_b32 s31, v20, 1 ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -74256,25 +74220,16 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg % ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; SI-NEXT: s_and_b32 s40, s17, 0xffff0000 -; SI-NEXT: s_and_b32 s10, s26, 0xffff0000 -; SI-NEXT: s_lshl_b32 s11, s26, 16 -; SI-NEXT: s_and_b32 s26, s21, 0xffff0000 -; SI-NEXT: v_readfirstlane_b32 s44, v0 -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s40 -; SI-NEXT: s_and_b32 s8, s27, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s26 ; SI-NEXT: v_readfirstlane_b32 s42, v1 -; SI-NEXT: s_and_b32 s45, s44, 0xffff0000 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s8 +; SI-NEXT: v_readfirstlane_b32 s44, v0 ; SI-NEXT: s_and_b32 s4, s29, 0xffff0000 ; SI-NEXT: s_lshl_b32 s5, s29, 16 ; SI-NEXT: s_and_b32 s6, s28, 0xffff0000 ; SI-NEXT: s_lshl_b32 s7, s28, 16 +; SI-NEXT: s_and_b32 s8, s27, 0xffff0000 ; SI-NEXT: s_lshl_b32 s9, s27, 16 +; SI-NEXT: s_and_b32 s10, s26, 0xffff0000 +; SI-NEXT: s_lshl_b32 s11, s26, 16 ; SI-NEXT: s_and_b32 s12, s25, 0xffff0000 ; SI-NEXT: s_lshl_b32 s13, s25, 16 ; SI-NEXT: s_and_b32 s14, s24, 0xffff0000 @@ -74283,6 +74238,7 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg % ; SI-NEXT: s_lshl_b32 s23, s23, 16 ; SI-NEXT: s_and_b32 s25, s22, 0xffff0000 ; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_and_b32 s26, s21, 0xffff0000 ; SI-NEXT: s_lshl_b32 s21, s21, 16 ; SI-NEXT: s_and_b32 s27, s20, 0xffff0000 ; SI-NEXT: s_lshl_b32 s20, s20, 16 @@ -74295,431 +74251,359 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg % ; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: s_and_b32 s43, s42, 0xffff0000 ; SI-NEXT: s_lshl_b32 s42, s42, 16 +; SI-NEXT: s_and_b32 s45, s44, 0xffff0000 ; SI-NEXT: s_lshl_b32 s44, s44, 16 ; SI-NEXT: v_readfirstlane_b32 s46, v2 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s45 +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s40 ; SI-NEXT: s_cmp_lg_u32 s46, 0 -; SI-NEXT: v_mul_f32_e64 v43, 1.0, s41 -; SI-NEXT: v_mul_f32_e64 v34, 1.0, s17 -; SI-NEXT: v_mul_f32_e64 v40, 1.0, s29 -; SI-NEXT: v_mul_f32_e64 v13, 1.0, s28 -; SI-NEXT: v_mul_f32_e64 v60, 1.0, s19 -; SI-NEXT: v_mul_f32_e64 v47, 1.0, s27 -; SI-NEXT: v_mul_f32_e64 v17, 1.0, s25 -; SI-NEXT: v_mul_f32_e64 v44, 1.0, s24 -; SI-NEXT: v_mul_f32_e64 v28, 1.0, s14 -; SI-NEXT: v_mul_f32_e64 v20, 1.0, s12 -; SI-NEXT: v_mul_f32_e64 v12, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v9, 1.0, s41 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mul_f32_e64 v0, 1.0, s17 +; SI-NEXT: v_mul_f32_e64 v59, 1.0, s29 +; SI-NEXT: v_mul_f32_e64 v24, 1.0, s28 +; SI-NEXT: v_mul_f32_e64 v37, 1.0, s19 +; SI-NEXT: v_mul_f32_e64 v58, 1.0, s27 +; SI-NEXT: v_mul_f32_e64 v49, 1.0, s26 +; SI-NEXT: v_mul_f32_e64 v35, 1.0, s21 +; SI-NEXT: v_mul_f32_e64 v47, 1.0, s25 +; SI-NEXT: v_mul_f32_e64 v13, 1.0, s24 +; SI-NEXT: v_mul_f32_e64 v33, 1.0, s23 +; SI-NEXT: v_mul_f32_e64 v46, 1.0, s14 +; SI-NEXT: v_mul_f32_e64 v22, 1.0, s12 +; SI-NEXT: v_mul_f32_e64 v31, 1.0, s13 +; SI-NEXT: v_mul_f32_e64 v5, 1.0, s10 +; SI-NEXT: v_mul_f32_e64 v12, 1.0, s8 +; SI-NEXT: v_mul_f32_e64 v29, 1.0, s9 ; SI-NEXT: v_mul_f32_e64 v41, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v10, 1.0, s4 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v20, 1.0, s4 +; SI-NEXT: v_mul_f32_e64 v27, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v10, 1.0, s45 ; SI-NEXT: v_mul_f32_e64 v14, 1.0, s43 -; SI-NEXT: v_mul_f32_e64 v48, 1.0, s21 -; SI-NEXT: v_mul_f32_e64 v38, 1.0, s23 -; SI-NEXT: v_mul_f32_e64 v36, 1.0, s13 -; SI-NEXT: v_mul_f32_e64 v62, 1.0, s9 -; SI-NEXT: v_mul_f32_e64 v15, 1.0, s5 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mul_f32_e64 v0, 1.0, s42 -; SI-NEXT: v_mul_f32_e64 v2, 1.0, s16 -; SI-NEXT: v_mul_f32_e64 v32, 1.0, s18 -; SI-NEXT: v_mul_f32_e64 v21, 1.0, s20 -; SI-NEXT: v_mul_f32_e64 v45, 1.0, s22 -; SI-NEXT: v_mul_f32_e64 v42, 1.0, s15 -; SI-NEXT: v_mul_f32_e64 v7, 1.0, s11 -; SI-NEXT: v_mul_f32_e64 v18, 1.0, s7 -; SI-NEXT: v_mul_f32_e64 v53, 1.0, s44 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: v_mul_f32_e64 v25, 1.0, s42 +; SI-NEXT: v_mul_f32_e64 v50, 1.0, s16 +; SI-NEXT: v_mul_f32_e64 v48, 1.0, s18 +; SI-NEXT: v_mul_f32_e64 v62, 1.0, s20 +; SI-NEXT: v_mul_f32_e64 v60, 1.0, s22 +; SI-NEXT: v_mul_f32_e64 v56, 1.0, s15 +; SI-NEXT: v_mul_f32_e64 v44, 1.0, s11 +; SI-NEXT: v_mul_f32_e64 v42, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v39, 1.0, s44 ; SI-NEXT: s_cbranch_scc0 .LBB103_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v8, v13 -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v8 -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v62, v2 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v43 -; SI-NEXT: v_mov_b32_e32 v13, v10 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v13 -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v28 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v44 -; SI-NEXT: v_lshr_b64 v[24:25], v[38:39], 16 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v14 -; SI-NEXT: v_mov_b32_e32 v55, v14 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v20 -; SI-NEXT: v_lshr_b64 v[51:52], v[36:37], 16 -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v43 -; SI-NEXT: v_mov_b32_e32 v25, v8 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v17 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v41 -; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v47 -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v41 -; SI-NEXT: v_mov_b32_e32 v29, v20 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v40 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v17 -; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 -; SI-NEXT: v_lshr_b64 v[2:3], v[34:35], 16 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v40 -; SI-NEXT: v_mov_b32_e32 v31, v2 -; SI-NEXT: v_mov_b32_e32 v30, v1 -; SI-NEXT: v_lshr_b64 v[1:2], v[60:61], 16 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[9:10], v[0:1], 16 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[57:58], v[48:49], 16 -; SI-NEXT: v_and_b32_e32 v58, 0xffff0000, v12 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v2 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshr_b64 v[59:60], v[2:3], 16 -; SI-NEXT: v_mov_b32_e32 v2, v28 -; SI-NEXT: v_lshr_b64 v[27:28], v[15:16], 16 -; SI-NEXT: v_mov_b32_e32 v28, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v3, v13 -; SI-NEXT: v_lshr_b64 v[15:16], v[5:6], 16 -; SI-NEXT: v_mov_b32_e32 v6, v43 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v28 -; SI-NEXT: v_mov_b32_e32 v16, v12 -; SI-NEXT: v_mov_b32_e32 v61, v49 -; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v16 -; SI-NEXT: v_mov_b32_e32 v60, v48 -; SI-NEXT: v_mov_b32_e32 v49, v39 -; SI-NEXT: v_mov_b32_e32 v48, v38 -; SI-NEXT: v_mov_b32_e32 v39, v37 -; SI-NEXT: v_mov_b32_e32 v38, v36 -; SI-NEXT: v_lshr_b64 v[36:37], v[30:31], 16 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[4:5], v[23:24], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[56:57], 16 -; SI-NEXT: v_lshr_b64 v[12:13], v[26:27], 16 -; SI-NEXT: v_mov_b32_e32 v30, v40 -; SI-NEXT: v_mov_b32_e32 v40, v17 -; SI-NEXT: v_mov_b32_e32 v5, v32 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v2 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: v_mov_b32_e32 v2, v24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v6, v22 +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v9 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v49 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v46 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v41 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v58 +; SI-NEXT: v_lshr_b64 v[54:55], v[62:63], 16 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v46 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_lshr_b64 v[23:24], v[0:1], 16 +; SI-NEXT: v_mov_b32_e32 v24, v2 +; SI-NEXT: v_lshr_b64 v[2:3], v[22:23], 16 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v24 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[3:4], v[37:38], 16 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v59 +; SI-NEXT: v_lshr_b64 v[7:8], v[2:3], 16 +; SI-NEXT: v_lshr_b64 v[21:22], v[35:36], 16 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v2, v20 +; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v58 +; SI-NEXT: v_mov_b32_e32 v22, v6 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v2, v51 -; SI-NEXT: v_mov_b32_e32 v24, v19 -; SI-NEXT: v_mov_b32_e32 v23, v18 -; SI-NEXT: v_lshr_b64 v[19:20], v[50:51], 16 -; SI-NEXT: v_lshr_b64 v[50:51], v[58:59], 16 -; SI-NEXT: v_lshr_b64 v[51:52], v[14:15], 16 -; SI-NEXT: v_lshr_b64 v[13:14], v[62:63], 16 -; SI-NEXT: v_mov_b32_e32 v17, v53 -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v18, v54 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v14, v55 -; SI-NEXT: v_lshr_b64 v[54:55], v[21:22], 16 -; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: v_lshr_b64 v[52:53], v[32:33], 16 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[54:55], v[45:46], 16 -; SI-NEXT: v_mov_b32_e32 v20, v29 -; SI-NEXT: v_mov_b32_e32 v13, v25 -; SI-NEXT: v_mov_b32_e32 v25, v12 -; SI-NEXT: v_mov_b32_e32 v12, v16 -; SI-NEXT: v_mov_b32_e32 v16, v17 -; SI-NEXT: v_lshr_b64 v[55:56], v[17:18], 16 -; SI-NEXT: v_mov_b32_e32 v29, v59 -; SI-NEXT: v_mov_b32_e32 v53, v51 -; SI-NEXT: v_mov_b32_e32 v17, v40 -; SI-NEXT: v_mov_b32_e32 v40, v30 -; SI-NEXT: v_mov_b32_e32 v22, v4 -; SI-NEXT: v_mov_b32_e32 v18, v19 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v10, v3 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[2:3], v[42:43], 16 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[6:7], v[20:21], 16 +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[2:3], v[7:8], 16 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[2:3], v[23:24], 16 -; SI-NEXT: v_mov_b32_e32 v24, v36 -; SI-NEXT: v_mov_b32_e32 v36, v38 -; SI-NEXT: v_mov_b32_e32 v37, v39 -; SI-NEXT: v_mov_b32_e32 v38, v48 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v39, v49 -; SI-NEXT: v_mov_b32_e32 v48, v60 +; SI-NEXT: v_lshr_b64 v[7:8], v[33:34], 16 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v47 +; SI-NEXT: v_lshr_b64 v[15:16], v[6:7], 16 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v22 +; SI-NEXT: v_lshr_b64 v[19:20], v[31:32], 16 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[15:16], v[18:19], 16 +; SI-NEXT: v_mov_b32_e32 v4, v12 +; SI-NEXT: v_lshr_b64 v[11:12], v[29:30], 16 +; SI-NEXT: v_mov_b32_e32 v20, v2 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v2, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v5 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[15:16], v[10:11], 16 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v20 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: v_lshr_b64 v[17:18], v[27:28], 16 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v41 +; SI-NEXT: v_lshr_b64 v[15:16], v[16:17], 16 +; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v10, v2 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[15:16], v[25:26], 16 +; SI-NEXT: v_mov_b32_e32 v2, v14 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v10 +; SI-NEXT: v_lshr_b64 v[51:52], v[14:15], 16 +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v2, v62 -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v49, v61 -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v43, v6 -; SI-NEXT: v_mov_b32_e32 v8, v23 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v9 +; SI-NEXT: v_mov_b32_e32 v14, v2 +; SI-NEXT: v_mov_b32_e32 v2, v13 +; SI-NEXT: v_lshr_b64 v[12:13], v[50:51], 16 +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v13, v2 +; SI-NEXT: v_mov_b32_e32 v2, v49 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v59 +; SI-NEXT: v_lshr_b64 v[51:52], v[48:49], 16 +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[51:52], v[60:61], 16 +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[51:52], v[44:45], 16 +; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[51:52], v[42:43], 16 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v10 +; SI-NEXT: v_lshr_b64 v[52:53], v[39:40], 16 +; SI-NEXT: v_mov_b32_e32 v12, v4 +; SI-NEXT: v_mov_b32_e32 v49, v2 +; SI-NEXT: v_mov_b32_e32 v61, v54 +; SI-NEXT: v_lshr_b64 v[54:55], v[56:57], 16 +; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_cbranch_execnz .LBB103_3 ; SI-NEXT: .LBB103_2: ; %cmp.true -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v43 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v2 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v1 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v3 -; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v40 -; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; SI-NEXT: v_lshr_b64 v[52:53], v[1:2], 16 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v47 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v9 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v50 +; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v4 +; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v9 ; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v48 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v17 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v45 -; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v5 -; SI-NEXT: v_lshr_b64 v[17:18], v[1:2], 16 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v28 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v42 -; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v2 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v1 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v59 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v6 -; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v12 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v7 -; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v7 -; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v58 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v62 +; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_lshr_b64 v[61:62], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v47 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v60 +; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v6 +; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v41 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v8 -; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v8 -; SI-NEXT: v_lshr_b64 v[1:2], v[1:2], 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v46 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v56 +; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v7 +; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v5 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v44 +; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v5 +; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v16 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v8 -; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v5 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 -; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v9 -; SI-NEXT: v_lshr_b64 v[55:56], v[1:2], 16 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v4 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v14 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v9 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_lshr_b64 v[15:16], v[11:12], 16 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v41 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v42 +; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v8 +; SI-NEXT: v_lshr_b64 v[50:51], v[2:3], 16 +; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v10 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v39 +; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v10 +; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], 16 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v10 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v1 -; SI-NEXT: v_mov_b32_e32 v1, v12 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v62 -; SI-NEXT: v_add_f32_e32 v62, 0x40c00000, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[27:28], v[11:12], 16 -; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v7 -; SI-NEXT: v_lshr_b64 v[53:54], v[14:15], 16 -; SI-NEXT: v_mov_b32_e32 v54, v17 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v25 +; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v14 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v27 +; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v20 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v29 +; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v12 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v31 +; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v22 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v33 +; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v13 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v35 +; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v49 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v37 +; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v24 +; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v1 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 +; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 +; SI-NEXT: v_lshr_b64 v[19:20], v[31:32], 16 +; SI-NEXT: v_lshr_b64 v[21:22], v[35:36], 16 +; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v4 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[3:4], v[37:38], 16 +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v9 +; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v5 +; SI-NEXT: v_lshr_b64 v[15:16], v[25:26], 16 +; SI-NEXT: v_lshr_b64 v[17:18], v[27:28], 16 +; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v8 +; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v7 +; SI-NEXT: v_lshr_b64 v[7:8], v[33:34], 16 +; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 +; SI-NEXT: v_lshr_b64 v[11:12], v[29:30], 16 +; SI-NEXT: v_mov_b32_e32 v54, v52 +; SI-NEXT: v_mov_b32_e32 v51, v50 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v36 -; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v20 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v38 -; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v44 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v48 -; SI-NEXT: v_add_f32_e32 v48, 0x40c00000, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[7:8], v[38:39], 16 -; SI-NEXT: v_lshr_b64 v[29:30], v[62:63], 16 -; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v3 -; SI-NEXT: v_lshr_b64 v[19:20], v[36:37], 16 -; SI-NEXT: v_lshr_b64 v[22:23], v[6:7], 16 -; SI-NEXT: v_lshr_b64 v[50:51], v[28:29], 16 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v60 -; SI-NEXT: v_add_f32_e32 v60, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v13 -; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v1 -; SI-NEXT: v_lshr_b64 v[1:2], v[60:61], 16 -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v34 -; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[9:10], v[0:1], 16 -; SI-NEXT: v_lshr_b64 v[57:58], v[48:49], 16 -; SI-NEXT: v_lshr_b64 v[11:12], v[56:57], 16 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 -; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v2 -; SI-NEXT: v_mov_b32_e32 v2, v7 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: v_lshr_b64 v[31:32], v[34:35], 16 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v2, v19 -; SI-NEXT: v_lshr_b64 v[24:25], v[30:31], 16 -; SI-NEXT: v_lshr_b64 v[18:19], v[18:19], 16 -; SI-NEXT: v_lshr_b64 v[25:26], v[26:27], 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_lshr_b64 v[23:24], v[0:1], 16 +; SI-NEXT: v_lshr_b64 v[4:5], v[22:23], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[4:5], v[2:3], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[4:5], v[20:21], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[4:5], v[6:7], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[4:5], v[18:19], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[4:5], v[10:11], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[4:5], v[16:17], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshr_b64 v[4:5], v[14:15], 16 +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: .LBB103_3: ; %end +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v1 -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v24 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v31 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v52 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v49 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v22 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v53 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35 -; SI-NEXT: v_or_b32_e32 v1, v3, v1 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v9 -; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v61 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v0, v0, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v23 +; SI-NEXT: v_or_b32_e32 v1, v2, v1 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v11 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v17 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38 +; SI-NEXT: v_or_b32_e32 v3, v3, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v61 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v21 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v54 -; SI-NEXT: v_or_b32_e32 v6, v6, v8 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v8 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v39 -; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v18 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v29 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v37 -; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v50 -; SI-NEXT: v_or_b32_e32 v10, v10, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63 -; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32 ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -74736,66 +74620,94 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg % ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v25 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34 +; SI-NEXT: v_or_b32_e32 v7, v7, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v54 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v8, v8, v9 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v19 +; SI-NEXT: v_or_b32_e32 v9, v9, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v10, v10, v12 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v30 +; SI-NEXT: v_or_b32_e32 v11, v11, v12 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v51 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v27 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v17 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v55 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v16 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v26 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB103_4: -; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v5, v32 -; SI-NEXT: v_mov_b32_e32 v8, v18 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v16, v53 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: ; implicit-def: $vgpr52 -; SI-NEXT: ; implicit-def: $vgpr9 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr11 -; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr22 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr18 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $vgpr55 -; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr3 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr11 +; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr17 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr15 ; SI-NEXT: s_branch .LBB103_2 ; @@ -74803,10 +74715,10 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg % ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: s_mov_b64 exec, s[4:5] -; VI-NEXT: v_writelane_b32 v20, s30, 0 -; VI-NEXT: v_writelane_b32 v20, s31, 1 +; VI-NEXT: v_writelane_b32 v35, s30, 0 +; VI-NEXT: v_writelane_b32 v35, s31, 1 ; VI-NEXT: v_readfirstlane_b32 s4, v2 ; VI-NEXT: v_readfirstlane_b32 s31, v1 ; VI-NEXT: s_cmp_lg_u32 s4, 0 @@ -74815,302 +74727,303 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg % ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: s_cbranch_execnz .LBB103_4 ; VI-NEXT: .LBB103_2: ; %cmp.true -; VI-NEXT: v_mov_b32_e32 v16, 0x40c00000 -; VI-NEXT: s_lshl_b32 s4, s26, 16 -; VI-NEXT: v_add_f32_e32 v4, s4, v16 -; VI-NEXT: s_lshl_b32 s4, s28, 16 -; VI-NEXT: v_add_f32_e32 v0, s4, v16 +; VI-NEXT: s_lshl_b32 s4, s16, 16 +; VI-NEXT: v_mov_b32_e32 v10, 0x40c00000 +; VI-NEXT: v_add_f32_e32 v0, s4, v10 ; VI-NEXT: v_bfe_u32 v1, v0, 16, 1 ; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 ; VI-NEXT: v_or_b32_e32 v2, 0x400000, v0 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; VI-NEXT: s_and_b32 s4, s28, 0xffff0000 +; VI-NEXT: s_and_b32 s4, s16, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc -; VI-NEXT: v_add_f32_e32 v1, s4, v16 +; VI-NEXT: v_add_f32_e32 v1, s4, v10 ; VI-NEXT: v_bfe_u32 v2, v1, 16, 1 ; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2 ; VI-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; VI-NEXT: s_lshl_b32 s4, s30, 16 +; VI-NEXT: s_lshl_b32 s4, s17, 16 ; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; VI-NEXT: v_add_f32_e32 v2, s4, v16 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: s_and_b32 s4, s30, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc -; VI-NEXT: v_add_f32_e32 v3, s4, v16 -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v6, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v3, v5, v6, vcc -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: s_and_b32 s6, s26, 0xffff0000 -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[2:3] -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v4, 16, 1 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v4 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v4 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v4, v4 -; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: s_lshl_b32 s6, s24, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s24, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 +; VI-NEXT: v_add_f32_e32 v2, s4, v10 ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_and_b32 s4, s17, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: s_lshl_b32 s6, s22, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s22, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 +; VI-NEXT: v_add_f32_e32 v2, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v16, v3, v4, vcc ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 +; VI-NEXT: s_lshl_b32 s4, s18, 16 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: s_lshl_b32 s6, s20, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s20, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 +; VI-NEXT: v_add_f32_e32 v2, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v17, v3, v4, vcc ; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 ; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 ; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 ; VI-NEXT: v_or_b32_e32 v4, 0x400000, v2 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; VI-NEXT: s_and_b32 s4, s18, 0xffff0000 ; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; VI-NEXT: s_lshl_b32 s6, s18, 16 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v2, 16, 1 -; VI-NEXT: s_and_b32 s6, s18, 0xffff0000 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e64 s[4:5], v2, v2 -; VI-NEXT: v_add_f32_e32 v2, s6, v16 -; VI-NEXT: v_bfe_u32 v3, v2, 16, 1 -; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 -; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3 -; VI-NEXT: v_or_b32_e32 v5, 0x400000, v2 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; VI-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc -; VI-NEXT: s_and_b32 s7, s16, 0xffff0000 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5] -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; VI-NEXT: v_add_f32_e32 v5, s7, v16 -; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v0, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v5 -; VI-NEXT: s_lshl_b32 s6, s16, 16 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 -; VI-NEXT: v_or_b32_e32 v1, 0x400000, v5 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v3, s6, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc -; VI-NEXT: v_bfe_u32 v0, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v3 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7fff, v0 +; VI-NEXT: v_add_f32_e32 v3, s4, v10 +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 +; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: s_lshl_b32 s4, s19, 16 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc -; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NEXT: s_and_b32 s5, s17, 0xffff0000 -; VI-NEXT: v_add_f32_e32 v3, s5, v16 -; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] -; VI-NEXT: v_bfe_u32 v1, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v3 -; VI-NEXT: s_lshl_b32 s4, s17, 16 -; VI-NEXT: v_add_u32_e32 v1, vcc, 0x7fff, v1 +; VI-NEXT: v_add_f32_e32 v3, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v19, v4, v5, vcc +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 +; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: s_and_b32 s4, s19, 0xffff0000 ; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: s_and_b32 s5, s19, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s5, v16 -; VI-NEXT: v_cndmask_b32_e32 v17, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v5, v3, 16, 1 -; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v3 -; VI-NEXT: s_lshl_b32 s4, s19, 16 -; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 -; VI-NEXT: v_or_b32_e32 v7, 0x400000, v3 +; VI-NEXT: v_add_f32_e32 v3, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v18, v4, v5, vcc +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 +; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: s_lshl_b32 s4, s20, 16 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_add_f32_e32 v3, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc -; VI-NEXT: v_bfe_u32 v7, v3, 16, 1 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v3 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: s_and_b32 s5, s21, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v3 +; VI-NEXT: v_add_f32_e32 v3, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v20, v4, v5, vcc +; VI-NEXT: v_bfe_u32 v4, v3, 16, 1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3 +; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4 +; VI-NEXT: v_or_b32_e32 v5, 0x400000, v3 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 -; VI-NEXT: v_add_f32_e32 v5, s5, v16 -; VI-NEXT: v_mov_b32_e32 v1, v17 -; VI-NEXT: v_cndmask_b32_e32 v17, v7, v9, vcc -; VI-NEXT: v_bfe_u32 v7, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v5 +; VI-NEXT: s_and_b32 s4, s20, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc +; VI-NEXT: v_add_f32_e32 v4, s4, v10 +; VI-NEXT: v_bfe_u32 v5, v4, 16, 1 +; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v4 +; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 ; VI-NEXT: s_lshl_b32 s4, s21, 16 -; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 -; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5 +; VI-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; VI-NEXT: v_add_f32_e32 v4, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v21, v5, v6, vcc +; VI-NEXT: v_bfe_u32 v5, v4, 16, 1 +; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v4 +; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5 +; VI-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; VI-NEXT: s_and_b32 s4, s21, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc +; VI-NEXT: v_add_f32_e32 v5, s4, v10 +; VI-NEXT: v_bfe_u32 v6, v5, 16, 1 +; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v5 +; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v6 +; VI-NEXT: s_lshl_b32 s4, s22, 16 +; VI-NEXT: v_or_b32_e32 v7, 0x400000, v5 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_add_f32_e32 v5, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc -; VI-NEXT: v_bfe_u32 v9, v5, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v5 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: s_and_b32 s5, s23, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v5 +; VI-NEXT: v_add_f32_e32 v5, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v22, v6, v7, vcc +; VI-NEXT: v_bfe_u32 v6, v5, 16, 1 +; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v5 +; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v6 +; VI-NEXT: v_or_b32_e32 v7, 0x400000, v5 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v7 -; VI-NEXT: v_add_f32_e32 v7, s5, v16 -; VI-NEXT: v_mov_b32_e32 v3, v17 -; VI-NEXT: v_cndmask_b32_e32 v17, v9, v11, vcc -; VI-NEXT: v_bfe_u32 v9, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v7 +; VI-NEXT: s_and_b32 s4, s22, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc +; VI-NEXT: v_add_f32_e32 v6, s4, v10 +; VI-NEXT: v_bfe_u32 v7, v6, 16, 1 +; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v6 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 ; VI-NEXT: s_lshl_b32 s4, s23, 16 -; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 -; VI-NEXT: v_or_b32_e32 v11, 0x400000, v7 +; VI-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; VI-NEXT: v_add_f32_e32 v6, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v23, v7, v8, vcc +; VI-NEXT: v_bfe_u32 v7, v6, 16, 1 +; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v6 +; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7 +; VI-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; VI-NEXT: s_and_b32 s4, s23, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc +; VI-NEXT: v_add_f32_e32 v7, s4, v10 +; VI-NEXT: v_bfe_u32 v8, v7, 16, 1 +; VI-NEXT: v_add_u32_e32 v8, vcc, v8, v7 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x7fff, v8 +; VI-NEXT: s_lshl_b32 s4, s24, 16 +; VI-NEXT: v_or_b32_e32 v9, 0x400000, v7 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_add_f32_e32 v7, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v9, v9, v11, vcc -; VI-NEXT: v_bfe_u32 v11, v7, 16, 1 -; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v7 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: s_and_b32 s5, s25, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v7 +; VI-NEXT: v_add_f32_e32 v7, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v24, v8, v9, vcc +; VI-NEXT: v_bfe_u32 v8, v7, 16, 1 +; VI-NEXT: v_add_u32_e32 v8, vcc, v8, v7 +; VI-NEXT: v_add_u32_e32 v8, vcc, 0x7fff, v8 +; VI-NEXT: v_or_b32_e32 v9, 0x400000, v7 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 -; VI-NEXT: v_add_f32_e32 v9, s5, v16 -; VI-NEXT: v_mov_b32_e32 v5, v17 -; VI-NEXT: v_cndmask_b32_e32 v17, v11, v13, vcc +; VI-NEXT: s_and_b32 s4, s24, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; VI-NEXT: v_add_f32_e32 v8, s4, v10 +; VI-NEXT: v_bfe_u32 v9, v8, 16, 1 +; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v8 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 +; VI-NEXT: s_lshl_b32 s4, s25, 16 +; VI-NEXT: v_or_b32_e32 v11, 0x400000, v8 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; VI-NEXT: v_add_f32_e32 v8, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v25, v9, v11, vcc +; VI-NEXT: v_bfe_u32 v9, v8, 16, 1 +; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v8 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9 +; VI-NEXT: v_or_b32_e32 v11, 0x400000, v8 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; VI-NEXT: s_and_b32 s4, s25, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v8, v9, v11, vcc +; VI-NEXT: v_add_f32_e32 v9, s4, v10 ; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 ; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 -; VI-NEXT: s_lshl_b32 s4, s25, 16 ; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 -; VI-NEXT: v_or_b32_e32 v13, 0x400000, v9 +; VI-NEXT: s_lshl_b32 s4, s26, 16 +; VI-NEXT: v_or_b32_e32 v12, 0x400000, v9 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_add_f32_e32 v9, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v11, v11, v13, vcc -; VI-NEXT: v_bfe_u32 v13, v9, 16, 1 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v9 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: s_and_b32 s5, s27, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v9 +; VI-NEXT: v_add_f32_e32 v9, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v26, v11, v12, vcc +; VI-NEXT: v_bfe_u32 v11, v9, 16, 1 +; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v9 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11 +; VI-NEXT: v_or_b32_e32 v12, 0x400000, v9 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v11 -; VI-NEXT: v_add_f32_e32 v11, s5, v16 -; VI-NEXT: v_mov_b32_e32 v7, v17 -; VI-NEXT: v_cndmask_b32_e32 v17, v13, v15, vcc -; VI-NEXT: v_bfe_u32 v13, v11, 16, 1 -; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v11 +; VI-NEXT: s_and_b32 s4, s26, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v9, v11, v12, vcc +; VI-NEXT: v_add_f32_e32 v11, s4, v10 +; VI-NEXT: v_bfe_u32 v12, v11, 16, 1 +; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12 ; VI-NEXT: s_lshl_b32 s4, s27, 16 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 -; VI-NEXT: v_or_b32_e32 v15, 0x400000, v11 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_add_f32_e32 v11, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc -; VI-NEXT: v_bfe_u32 v15, v11, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v11 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: s_and_b32 s5, s29, 0xffff0000 -; VI-NEXT: v_mov_b32_e32 v9, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v11 +; VI-NEXT: v_add_f32_e32 v11, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v32, v12, v13, vcc +; VI-NEXT: v_bfe_u32 v12, v11, 16, 1 +; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12 +; VI-NEXT: s_and_b32 s4, s27, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v13 -; VI-NEXT: v_add_f32_e32 v13, s5, v16 -; VI-NEXT: v_cndmask_b32_e32 v17, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 +; VI-NEXT: v_add_f32_e32 v11, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v27, v12, v13, vcc +; VI-NEXT: v_bfe_u32 v12, v11, 16, 1 +; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12 +; VI-NEXT: s_lshl_b32 s4, s28, 16 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; VI-NEXT: v_add_f32_e32 v11, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v28, v12, v13, vcc +; VI-NEXT: v_bfe_u32 v12, v11, 16, 1 +; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11 +; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12 +; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; VI-NEXT: s_and_b32 s4, s28, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v11, v12, v13, vcc +; VI-NEXT: v_add_f32_e32 v12, s4, v10 +; VI-NEXT: v_bfe_u32 v13, v12, 16, 1 +; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v12 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 ; VI-NEXT: s_lshl_b32 s4, s29, 16 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_mov_b32_e32 v11, v17 -; VI-NEXT: v_or_b32_e32 v17, 0x400000, v13 +; VI-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; VI-NEXT: v_add_f32_e32 v12, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v33, v13, v14, vcc +; VI-NEXT: v_bfe_u32 v13, v12, 16, 1 +; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v12 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13 +; VI-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; VI-NEXT: s_and_b32 s4, s29, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v12, v13, v14, vcc +; VI-NEXT: v_add_f32_e32 v13, s4, v10 +; VI-NEXT: v_bfe_u32 v14, v13, 16, 1 +; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v13 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x7fff, v14 +; VI-NEXT: s_lshl_b32 s4, s30, 16 +; VI-NEXT: v_or_b32_e32 v15, 0x400000, v13 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v15, v15, v17, vcc -; VI-NEXT: v_bfe_u32 v17, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v13 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17 -; VI-NEXT: s_and_b32 s4, s31, 0xffff0000 -; VI-NEXT: v_or_b32_e32 v18, 0x400000, v13 +; VI-NEXT: v_add_f32_e32 v13, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v31, v14, v15, vcc +; VI-NEXT: v_bfe_u32 v14, v13, 16, 1 +; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v13 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x7fff, v14 +; VI-NEXT: v_or_b32_e32 v15, 0x400000, v13 ; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; VI-NEXT: v_add_f32_e32 v13, s4, v16 -; VI-NEXT: v_cndmask_b32_e32 v17, v17, v18, vcc -; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v15 -; VI-NEXT: v_bfe_u32 v15, v13, 16, 1 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v13 +; VI-NEXT: s_and_b32 s4, s30, 0xffff0000 +; VI-NEXT: v_cndmask_b32_e32 v13, v14, v15, vcc +; VI-NEXT: v_add_f32_e32 v14, s4, v10 +; VI-NEXT: v_bfe_u32 v15, v14, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v14 ; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v13 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 ; VI-NEXT: s_lshl_b32 s4, s31, 16 -; VI-NEXT: v_cndmask_b32_e32 v13, v15, v19, vcc -; VI-NEXT: v_add_f32_e32 v15, s4, v16 -; VI-NEXT: v_bfe_u32 v16, v15, 16, 1 -; VI-NEXT: v_add_u32_e32 v16, vcc, v16, v15 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v16 -; VI-NEXT: v_or_b32_e32 v19, 0x400000, v15 -; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 -; VI-NEXT: v_cndmask_b32_e32 v15, v16, v19, vcc -; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v13 -; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18] -; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[15:16] -; VI-NEXT: v_mov_b32_e32 v13, v17 +; VI-NEXT: v_or_b32_e32 v29, 0x400000, v14 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; VI-NEXT: v_add_f32_e32 v14, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v34, v15, v29, vcc +; VI-NEXT: v_bfe_u32 v15, v14, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v14 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 +; VI-NEXT: s_and_b32 s4, s31, 0xffff0000 +; VI-NEXT: v_or_b32_e32 v29, 0x400000, v14 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; VI-NEXT: v_add_f32_e32 v10, s4, v10 +; VI-NEXT: v_cndmask_b32_e32 v14, v15, v29, vcc +; VI-NEXT: v_bfe_u32 v15, v10, 16, 1 +; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v10 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15 +; VI-NEXT: v_or_b32_e32 v29, 0x400000, v10 +; VI-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; VI-NEXT: v_cndmask_b32_e32 v10, v15, v29, vcc +; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v10 +; VI-NEXT: v_lshrrev_b64 v[29:30], 16, v[14:15] +; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v34 +; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[13:14] +; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v31 +; VI-NEXT: v_lshrrev_b64 v[30:31], 16, v[12:13] +; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v33 +; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v32 +; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[11:12] +; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[9:10] +; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v26 +; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[8:9] +; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v25 +; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[7:8] +; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v24 +; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[6:7] +; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v23 +; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[5:6] +; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v22 +; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[4:5] +; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v21 +; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v28 +; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[3:4] +; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17 +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v19 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v20 +; VI-NEXT: v_lshrrev_b64 v[27:28], 16, v[27:28] +; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19] +; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[16:17] +; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[2:3] +; VI-NEXT: v_lshrrev_b64 v[0:1], 16, v[0:1] +; VI-NEXT: v_mov_b32_e32 v1, v15 +; VI-NEXT: v_mov_b32_e32 v3, v18 +; VI-NEXT: v_mov_b32_e32 v5, v22 +; VI-NEXT: v_mov_b32_e32 v7, v24 +; VI-NEXT: v_mov_b32_e32 v9, v31 +; VI-NEXT: v_mov_b32_e32 v11, v27 +; VI-NEXT: v_mov_b32_e32 v13, v30 +; VI-NEXT: v_mov_b32_e32 v15, v29 ; VI-NEXT: s_branch .LBB103_5 ; VI-NEXT: .LBB103_3: ; VI-NEXT: s_branch .LBB103_2 @@ -75132,10 +75045,10 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg % ; VI-NEXT: v_mov_b32_e32 v14, s30 ; VI-NEXT: v_mov_b32_e32 v15, s31 ; VI-NEXT: .LBB103_5: ; %end -; VI-NEXT: v_readlane_b32 s30, v20, 0 -; VI-NEXT: v_readlane_b32 s31, v20, 1 +; VI-NEXT: v_readlane_b32 s30, v35, 0 +; VI-NEXT: v_readlane_b32 s31, v35, 1 ; VI-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: s_mov_b64 exec, s[4:5] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_setpc_b64 s[30:31] @@ -75144,10 +75057,10 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg % ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v34, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v20, s30, 0 -; GFX9-NEXT: v_writelane_b32 v20, s31, 1 +; GFX9-NEXT: v_writelane_b32 v34, s30, 0 +; GFX9-NEXT: v_writelane_b32 v34, s31, 1 ; GFX9-NEXT: v_readfirstlane_b32 s4, v2 ; GFX9-NEXT: v_readfirstlane_b32 s31, v1 ; GFX9-NEXT: s_cmp_lg_u32 s4, 0 @@ -75156,311 +75069,311 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg % ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: s_cbranch_execnz .LBB103_4 ; GFX9-NEXT: .LBB103_2: ; %cmp.true -; GFX9-NEXT: v_mov_b32_e32 v0, 0x40c00000 -; GFX9-NEXT: s_and_b32 s5, s30, 0xffff0000 -; GFX9-NEXT: v_add_f32_e32 v1, s5, v0 +; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000 +; GFX9-NEXT: v_mov_b32_e32 v3, 0x40c00000 +; GFX9-NEXT: v_add_f32_e32 v0, s4, v3 +; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v1, v1, v0 +; GFX9-NEXT: v_add_u32_e32 v1, 0x7fff, v1 +; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 +; GFX9-NEXT: s_lshl_b32 s4, s16, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc +; GFX9-NEXT: v_add_f32_e32 v1, s4, v3 ; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s5, s30, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s5, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 +; GFX9-NEXT: v_add_f32_e32 v1, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v16, v2, v4, vcc +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: s_lshl_b32 s4, s17, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc +; GFX9-NEXT: v_add_f32_e32 v2, s4, v3 +; GFX9-NEXT: v_bfe_u32 v4, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v2 +; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: s_and_b32 s5, s31, 0xffff0000 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_add_f32_e32 v3, s5, v0 -; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: v_add_f32_e32 v2, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v17, v4, v5, vcc +; GFX9-NEXT: v_bfe_u32 v4, v2, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v2 ; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v3 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: s_lshl_b32 s5, s31, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc -; GFX9-NEXT: v_add_f32_e32 v4, s5, v0 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v2 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: s_lshl_b32 s4, s18, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc +; GFX9-NEXT: v_add_f32_e32 v4, s4, v3 ; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 -; GFX9-NEXT: v_mov_b32_e32 v16, 0xffff -; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000 ; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 ; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 -; GFX9-NEXT: v_lshl_or_b32 v14, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 +; GFX9-NEXT: v_add_f32_e32 v4, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v18, v5, v6, vcc +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 +; GFX9-NEXT: s_lshl_b32 s4, s19, 16 +; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v19, v5, v6, vcc +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 +; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v20, v5, v6, vcc +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 +; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: s_lshl_b32 s4, s20, 16 ; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; GFX9-NEXT: v_and_b32_sdwa v4, v16, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_lshl_or_b32 v15, v3, 16, v4 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s29, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s28, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v13, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s28, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s27, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v12, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s27, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s26, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v11, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s26, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s25, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v10, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s25, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s24, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v9, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s24, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v8, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s23, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v7, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s22, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; GFX9-NEXT: v_add_f32_e32 v5, s4, v3 +; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 ; GFX9-NEXT: s_and_b32 s4, s21, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v6, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 +; GFX9-NEXT: v_add_f32_e32 v5, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v21, v6, v7, vcc +; GFX9-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v6, v6, v5 +; GFX9-NEXT: v_add_u32_e32 v6, 0x7fff, v6 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v5 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 ; GFX9-NEXT: s_lshl_b32 s4, s21, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s20, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v5, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s20, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: s_and_b32 s4, s19, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v4, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s19, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v17, vcc -; GFX9-NEXT: s_and_b32 s4, s18, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v3, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v17, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s18, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v17, vcc -; GFX9-NEXT: v_add_f32_e32 v2, s4, v0 -; GFX9-NEXT: v_bfe_u32 v17, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v17, v17, v2 -; GFX9-NEXT: v_add_u32_e32 v17, 0x7fff, v17 -; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v17, v18, vcc -; GFX9-NEXT: s_and_b32 s4, s17, 0xffff0000 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v2, v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; GFX9-NEXT: v_lshl_or_b32 v2, v1, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v1, s4, v0 -; GFX9-NEXT: v_bfe_u32 v17, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v17, v17, v1 -; GFX9-NEXT: v_add_u32_e32 v17, 0x7fff, v17 -; GFX9-NEXT: v_or_b32_e32 v18, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: s_lshl_b32 s4, s17, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v17, v18, vcc -; GFX9-NEXT: v_add_f32_e32 v17, s4, v0 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: s_and_b32 s4, s16, 0xffff0000 +; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc +; GFX9-NEXT: v_add_f32_e32 v6, s4, v3 +; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 +; GFX9-NEXT: s_and_b32 s4, s22, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: v_add_f32_e32 v6, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v22, v7, v8, vcc +; GFX9-NEXT: v_bfe_u32 v7, v6, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v6 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v6 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 +; GFX9-NEXT: s_lshl_b32 s4, s22, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc +; GFX9-NEXT: v_add_f32_e32 v7, s4, v3 +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 +; GFX9-NEXT: s_and_b32 s4, s23, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 +; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: v_add_f32_e32 v7, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v23, v8, v9, vcc +; GFX9-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v8, v8, v7 +; GFX9-NEXT: v_add_u32_e32 v8, 0x7fff, v8 +; GFX9-NEXT: v_or_b32_e32 v9, 0x400000, v7 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 +; GFX9-NEXT: s_lshl_b32 s4, s23, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc +; GFX9-NEXT: v_add_f32_e32 v8, s4, v3 +; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v9, v9, v8 +; GFX9-NEXT: s_and_b32 s4, s24, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9 +; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v8 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; GFX9-NEXT: v_add_f32_e32 v8, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v24, v9, v10, vcc +; GFX9-NEXT: v_bfe_u32 v9, v8, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v9, v9, v8 +; GFX9-NEXT: v_add_u32_e32 v9, 0x7fff, v9 +; GFX9-NEXT: v_or_b32_e32 v10, 0x400000, v8 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 +; GFX9-NEXT: s_lshl_b32 s4, s24, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v8, v9, v10, vcc +; GFX9-NEXT: v_add_f32_e32 v9, s4, v3 +; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v10, v10, v9 +; GFX9-NEXT: s_and_b32 s4, s25, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10 +; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 +; GFX9-NEXT: v_add_f32_e32 v9, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v25, v10, v11, vcc +; GFX9-NEXT: v_bfe_u32 v10, v9, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v10, v10, v9 +; GFX9-NEXT: v_add_u32_e32 v10, 0x7fff, v10 +; GFX9-NEXT: v_or_b32_e32 v11, 0x400000, v9 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 +; GFX9-NEXT: s_lshl_b32 s4, s25, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc +; GFX9-NEXT: v_add_f32_e32 v10, s4, v3 +; GFX9-NEXT: v_bfe_u32 v11, v10, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v11, v11, v10 +; GFX9-NEXT: s_and_b32 s4, s26, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11 +; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v10 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; GFX9-NEXT: v_add_f32_e32 v10, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v26, v11, v12, vcc +; GFX9-NEXT: v_bfe_u32 v11, v10, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v11, v11, v10 +; GFX9-NEXT: v_add_u32_e32 v11, 0x7fff, v11 +; GFX9-NEXT: v_or_b32_e32 v12, 0x400000, v10 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 +; GFX9-NEXT: s_lshl_b32 s4, s26, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v10, v11, v12, vcc +; GFX9-NEXT: v_add_f32_e32 v11, s4, v3 +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v12, v12, v11 +; GFX9-NEXT: s_and_b32 s4, s27, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 +; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: v_add_f32_e32 v11, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v27, v12, v13, vcc +; GFX9-NEXT: v_bfe_u32 v12, v11, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v12, v12, v11 +; GFX9-NEXT: v_add_u32_e32 v12, 0x7fff, v12 +; GFX9-NEXT: v_or_b32_e32 v13, 0x400000, v11 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 +; GFX9-NEXT: s_lshl_b32 s4, s27, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v11, v12, v13, vcc +; GFX9-NEXT: v_add_f32_e32 v12, s4, v3 +; GFX9-NEXT: v_bfe_u32 v13, v12, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v13, v13, v12 +; GFX9-NEXT: s_and_b32 s4, s28, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 +; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; GFX9-NEXT: v_add_f32_e32 v12, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v28, v13, v14, vcc +; GFX9-NEXT: v_bfe_u32 v13, v12, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v13, v13, v12 +; GFX9-NEXT: v_add_u32_e32 v13, 0x7fff, v13 +; GFX9-NEXT: v_or_b32_e32 v14, 0x400000, v12 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 +; GFX9-NEXT: s_lshl_b32 s4, s28, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v12, v13, v14, vcc +; GFX9-NEXT: v_add_f32_e32 v13, s4, v3 +; GFX9-NEXT: v_bfe_u32 v14, v13, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v14, v14, v13 +; GFX9-NEXT: s_and_b32 s4, s29, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 +; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v13 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 +; GFX9-NEXT: v_add_f32_e32 v13, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v29, v14, v15, vcc +; GFX9-NEXT: v_bfe_u32 v14, v13, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v14, v14, v13 +; GFX9-NEXT: v_add_u32_e32 v14, 0x7fff, v14 +; GFX9-NEXT: v_or_b32_e32 v15, 0x400000, v13 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 +; GFX9-NEXT: s_lshl_b32 s4, s29, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v13, v14, v15, vcc +; GFX9-NEXT: v_add_f32_e32 v14, s4, v3 +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: s_and_b32 s4, s30, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v30, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: v_add_f32_e32 v14, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v30, v15, v30, vcc +; GFX9-NEXT: v_bfe_u32 v15, v14, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v15, v15, v14 +; GFX9-NEXT: v_add_u32_e32 v15, 0x7fff, v15 +; GFX9-NEXT: v_or_b32_e32 v31, 0x400000, v14 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 +; GFX9-NEXT: s_lshl_b32 s4, s30, 16 +; GFX9-NEXT: v_cndmask_b32_e32 v14, v15, v31, vcc +; GFX9-NEXT: v_add_f32_e32 v15, s4, v3 +; GFX9-NEXT: v_bfe_u32 v31, v15, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v31, v31, v15 +; GFX9-NEXT: s_and_b32 s4, s31, 0xffff0000 +; GFX9-NEXT: v_add_u32_e32 v31, 0x7fff, v31 +; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v15 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 +; GFX9-NEXT: v_add_f32_e32 v15, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v31, v31, v32, vcc +; GFX9-NEXT: v_bfe_u32 v32, v15, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v32, v32, v15 +; GFX9-NEXT: s_lshl_b32 s4, s31, 16 +; GFX9-NEXT: v_add_u32_e32 v32, 0x7fff, v32 +; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v15 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 +; GFX9-NEXT: v_add_f32_e32 v3, s4, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v15, v32, v33, vcc +; GFX9-NEXT: v_bfe_u32 v32, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v32, v32, v3 +; GFX9-NEXT: v_add_u32_e32 v32, 0x7fff, v32 +; GFX9-NEXT: v_or_b32_e32 v33, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v3, v32, v33, vcc +; GFX9-NEXT: v_mov_b32_e32 v32, 0xffff +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v15 +; GFX9-NEXT: v_and_b32_sdwa v3, v32, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v15, v15, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v14 +; GFX9-NEXT: v_and_b32_sdwa v14, v32, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v14, v3, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v13 +; GFX9-NEXT: v_and_b32_sdwa v13, v32, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v13, v3, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v12 +; GFX9-NEXT: v_and_b32_sdwa v12, v32, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v12, v3, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v11 +; GFX9-NEXT: v_and_b32_sdwa v11, v32, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v11, v3, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v10 +; GFX9-NEXT: v_and_b32_sdwa v10, v32, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v10, v3, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v9 +; GFX9-NEXT: v_and_b32_sdwa v9, v32, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v9, v3, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v8 +; GFX9-NEXT: v_and_b32_sdwa v8, v32, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v8, v3, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v7 +; GFX9-NEXT: v_and_b32_sdwa v7, v32, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v7, v3, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v6 +; GFX9-NEXT: v_and_b32_sdwa v6, v32, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v6, v3, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v5 +; GFX9-NEXT: v_and_b32_sdwa v5, v32, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v5, v3, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v4 +; GFX9-NEXT: v_and_b32_sdwa v4, v32, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v4, v3, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v19 +; GFX9-NEXT: v_and_b32_sdwa v19, v32, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_and_b32_sdwa v17, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_and_b32_sdwa v18, v32, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_and_b32_sdwa v17, v32, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_and_b32_sdwa v16, v32, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_lshl_or_b32 v3, v3, 16, v19 +; GFX9-NEXT: v_lshl_or_b32 v2, v2, 16, v18 ; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v17 -; GFX9-NEXT: v_add_f32_e32 v17, s4, v0 -; GFX9-NEXT: v_bfe_u32 v18, v17, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v17 -; GFX9-NEXT: s_lshl_b32 s4, s16, 16 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 -; GFX9-NEXT: v_add_f32_e32 v0, s4, v0 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_bfe_u32 v18, v0, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v18, v18, v0 -; GFX9-NEXT: v_add_u32_e32 v18, 0x7fff, v18 -; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v0 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v17 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc -; GFX9-NEXT: v_and_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v16 ; GFX9-NEXT: s_branch .LBB103_5 ; GFX9-NEXT: .LBB103_3: @@ -75483,10 +75396,10 @@ define inreg <32 x half> @bitcast_v32bf16_to_v32f16_scalar(<32 x bfloat> inreg % ; GFX9-NEXT: v_mov_b32_e32 v14, s30 ; GFX9-NEXT: v_mov_b32_e32 v15, s31 ; GFX9-NEXT: .LBB103_5: ; %end -; GFX9-NEXT: v_readlane_b32 s30, v20, 0 -; GFX9-NEXT: v_readlane_b32 s31, v20, 1 +; GFX9-NEXT: v_readlane_b32 s30, v34, 0 +; GFX9-NEXT: v_readlane_b32 s31, v34, 1 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v20, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -76977,293 +76890,288 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16 -; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v15 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v1 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr17 +; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v1 ; VI-NEXT: ; implicit-def: $vgpr26 -; VI-NEXT: ; implicit-def: $vgpr22 -; VI-NEXT: ; implicit-def: $vgpr63 -; VI-NEXT: ; implicit-def: $vgpr54 +; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr62 -; VI-NEXT: ; implicit-def: $vgpr21 -; VI-NEXT: ; implicit-def: $vgpr60 -; VI-NEXT: ; implicit-def: $vgpr53 -; VI-NEXT: ; implicit-def: $vgpr58 -; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr52 ; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr47 -; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr59 -; VI-NEXT: ; implicit-def: $vgpr44 -; VI-NEXT: ; implicit-def: $vgpr43 +; VI-NEXT: ; implicit-def: $vgpr63 +; VI-NEXT: ; implicit-def: $vgpr57 +; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr56 +; VI-NEXT: ; implicit-def: $vgpr60 +; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr21 +; VI-NEXT: ; implicit-def: $vgpr45 +; VI-NEXT: ; implicit-def: $vgpr58 +; VI-NEXT: ; implicit-def: $vgpr43 +; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: ; implicit-def: $vgpr42 +; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr41 -; VI-NEXT: ; implicit-def: $vgpr45 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr40 +; VI-NEXT: ; implicit-def: $vgpr44 ; VI-NEXT: ; implicit-def: $vgpr55 -; VI-NEXT: ; implicit-def: $vgpr28 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr27 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr20 -; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr54 +; VI-NEXT: ; implicit-def: $vgpr27 +; VI-NEXT: ; implicit-def: $vgpr53 ; VI-NEXT: ; implicit-def: $vgpr17 +; VI-NEXT: ; kill: killed $vgpr26 +; VI-NEXT: ; implicit-def: $vgpr26 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB104_2 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16 ; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] ; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[7:8] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6] -; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; VI-NEXT: v_lshrrev_b32_e32 v27, 24, v16 -; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2 -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v1 +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v26, 24, v16 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v27, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v60, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v52, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; VI-NEXT: .LBB104_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB104_4 ; VI-NEXT: ; %bb.3: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v17, 0x200 -; VI-NEXT: v_add_f16_sdwa v49, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v49 +; VI-NEXT: v_add_f16_sdwa v48, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v48 ; VI-NEXT: v_add_f16_e32 v2, 0x200, v2 -; VI-NEXT: v_add_f16_sdwa v52, v1, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v28, v2, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v52 +; VI-NEXT: v_add_f16_sdwa v51, v1, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v27, v2, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v51 ; VI-NEXT: v_add_f16_e32 v1, 0x200, v1 -; VI-NEXT: v_add_f16_sdwa v39, v4, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v27, v1, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v39 +; VI-NEXT: v_add_f16_sdwa v38, v4, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v26, v1, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v38 ; VI-NEXT: v_add_f16_e32 v4, 0x200, v4 -; VI-NEXT: v_add_f16_sdwa v51, v3, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v23, v4, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v51 +; VI-NEXT: v_add_f16_sdwa v50, v3, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v59, v4, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v50 ; VI-NEXT: v_add_f16_e32 v3, 0x200, v3 -; VI-NEXT: v_add_f16_sdwa v37, v6, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v22, v3, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v37 +; VI-NEXT: v_add_f16_sdwa v36, v6, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v58, v3, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v36 ; VI-NEXT: v_add_f16_e32 v6, 0x200, v6 -; VI-NEXT: v_add_f16_sdwa v50, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v54, v6, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v50 +; VI-NEXT: v_add_f16_sdwa v49, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v25, v6, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v49 ; VI-NEXT: v_add_f16_e32 v5, 0x200, v5 -; VI-NEXT: v_add_f16_sdwa v35, v8, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v53, v5, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v35 +; VI-NEXT: v_add_f16_sdwa v34, v8, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v24, v5, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v34 ; VI-NEXT: v_add_f16_e32 v8, 0x200, v8 -; VI-NEXT: v_add_f16_sdwa v48, v7, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v25, v8, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v48 +; VI-NEXT: v_add_f16_sdwa v39, v7, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v45, v8, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v39 ; VI-NEXT: v_add_f16_e32 v7, 0x200, v7 -; VI-NEXT: v_add_f16_sdwa v33, v10, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v24, v7, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v33 +; VI-NEXT: v_add_f16_sdwa v32, v10, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v44, v7, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v32 ; VI-NEXT: v_add_f16_e32 v10, 0x200, v10 -; VI-NEXT: v_add_f16_sdwa v38, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v46, v10, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v38 +; VI-NEXT: v_add_f16_sdwa v37, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v23, v10, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v37 ; VI-NEXT: v_add_f16_e32 v9, 0x200, v9 -; VI-NEXT: v_add_f16_sdwa v31, v12, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v45, v9, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v31 +; VI-NEXT: v_add_f16_sdwa v30, v12, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v22, v9, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v30 ; VI-NEXT: v_add_f16_e32 v12, 0x200, v12 -; VI-NEXT: v_add_f16_sdwa v36, v11, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v21, v12, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v36 +; VI-NEXT: v_add_f16_sdwa v35, v11, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v42, v12, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v35 ; VI-NEXT: v_add_f16_e32 v11, 0x200, v11 -; VI-NEXT: v_add_f16_sdwa v30, v14, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v20, v11, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v30 +; VI-NEXT: v_add_f16_sdwa v29, v14, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v41, v11, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v29 ; VI-NEXT: v_add_f16_e32 v14, 0x200, v14 -; VI-NEXT: v_add_f16_sdwa v34, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v41, v14, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v34 +; VI-NEXT: v_add_f16_sdwa v33, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v47, v14, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v33 ; VI-NEXT: v_add_f16_e32 v13, 0x200, v13 -; VI-NEXT: v_add_f16_sdwa v29, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_sdwa v32, v15, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v40, v13, v18 -; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v29 +; VI-NEXT: v_add_f16_sdwa v28, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_sdwa v31, v15, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v46, v13, v18 +; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v28 ; VI-NEXT: v_add_f16_e32 v16, 0x200, v16 -; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v32 +; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v31 ; VI-NEXT: v_add_f16_e32 v15, 0x200, v15 -; VI-NEXT: v_or_b32_e32 v43, v16, v18 -; VI-NEXT: v_or_b32_e32 v42, v15, v17 -; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[42:43] -; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[40:41] -; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v43 -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v42 -; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v20 -; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[20:21] -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v41 -; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v21 -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[45:46] -; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v46 -; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v25 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v24 -; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[24:25] -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v22 -; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[22:23] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[53:54] -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v23 -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[27:28] -; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v40 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v45 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v54 -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v53 -; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v28 -; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v27 +; VI-NEXT: v_or_b32_e32 v53, v16, v18 +; VI-NEXT: v_or_b32_e32 v52, v15, v17 +; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[52:53] +; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[46:47] +; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[41:42] +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[22:23] +; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v53 +; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v22 +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[44:45] +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v42 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v23 +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[24:25] +; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v24 +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[58:59] +; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v25 +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[26:27] +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v52 +; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v47 +; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v46 +; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v41 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v45 +; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v44 +; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v59 +; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v58 +; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v27 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v26 +; VI-NEXT: v_bfe_u32 v26, v28, 8, 8 ; VI-NEXT: v_bfe_u32 v27, v29, 8, 8 -; VI-NEXT: v_bfe_u32 v28, v30, 8, 8 -; VI-NEXT: v_bfe_u32 v45, v31, 8, 8 -; VI-NEXT: v_bfe_u32 v56, v33, 8, 8 -; VI-NEXT: v_bfe_u32 v59, v35, 8, 8 -; VI-NEXT: v_bfe_u32 v61, v37, 8, 8 -; VI-NEXT: v_bfe_u32 v53, v39, 8, 8 -; VI-NEXT: v_bfe_u32 v54, v49, 8, 8 +; VI-NEXT: v_bfe_u32 v44, v30, 8, 8 +; VI-NEXT: v_bfe_u32 v47, v32, 8, 8 +; VI-NEXT: v_bfe_u32 v58, v34, 8, 8 +; VI-NEXT: v_bfe_u32 v60, v36, 8, 8 +; VI-NEXT: v_bfe_u32 v63, v38, 8, 8 +; VI-NEXT: v_bfe_u32 v52, v48, 8, 8 ; VI-NEXT: .LBB104_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v22, v52, v22, s4 -; VI-NEXT: v_perm_b32 v1, v1, v26, s4 -; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; VI-NEXT: v_or_b32_e32 v1, v1, v22 +; VI-NEXT: v_perm_b32 v24, v51, v24, s4 +; VI-NEXT: v_perm_b32 v1, v1, v25, s4 +; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; VI-NEXT: v_or_b32_e32 v1, v1, v24 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v49, v54, s4 -; VI-NEXT: v_perm_b32 v2, v2, v63, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v2, v62, s4 +; VI-NEXT: v_perm_b32 v2, v48, v52, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v51, v21, s4 -; VI-NEXT: v_perm_b32 v2, v3, v62, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v50, v23, s4 +; VI-NEXT: v_perm_b32 v1, v3, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v39, v53, s4 -; VI-NEXT: v_perm_b32 v1, v4, v60, s4 +; VI-NEXT: v_perm_b32 v2, v38, v63, s4 +; VI-NEXT: v_perm_b32 v1, v4, v59, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v50, v25, s4 -; VI-NEXT: v_perm_b32 v1, v5, v58, s4 +; VI-NEXT: v_perm_b32 v2, v49, v22, s4 +; VI-NEXT: v_perm_b32 v1, v5, v57, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v37, v61, s4 -; VI-NEXT: v_perm_b32 v1, v6, v57, s4 +; VI-NEXT: v_perm_b32 v2, v36, v60, s4 +; VI-NEXT: v_perm_b32 v1, v6, v56, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v48, v24, s4 -; VI-NEXT: v_perm_b32 v1, v7, v47, s4 +; VI-NEXT: v_perm_b32 v2, v39, v21, s4 +; VI-NEXT: v_perm_b32 v1, v7, v46, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v35, v59, s4 -; VI-NEXT: v_perm_b32 v1, v8, v46, s4 +; VI-NEXT: v_perm_b32 v2, v34, v58, s4 +; VI-NEXT: v_perm_b32 v1, v8, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v38, v20, s4 -; VI-NEXT: v_perm_b32 v1, v9, v44, s4 +; VI-NEXT: v_perm_b32 v2, v37, v20, s4 +; VI-NEXT: v_perm_b32 v1, v9, v43, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v33, v56, s4 -; VI-NEXT: v_perm_b32 v1, v10, v43, s4 +; VI-NEXT: v_perm_b32 v2, v32, v47, s4 +; VI-NEXT: v_perm_b32 v1, v10, v42, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v36, v19, s4 -; VI-NEXT: v_perm_b32 v1, v11, v42, s4 +; VI-NEXT: v_perm_b32 v2, v35, v19, s4 +; VI-NEXT: v_perm_b32 v1, v11, v41, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v31, v45, s4 -; VI-NEXT: v_perm_b32 v1, v12, v41, s4 +; VI-NEXT: v_perm_b32 v2, v30, v44, s4 +; VI-NEXT: v_perm_b32 v1, v12, v40, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v34, v18, s4 -; VI-NEXT: v_perm_b32 v1, v13, v40, s4 +; VI-NEXT: v_perm_b32 v2, v33, v18, s4 +; VI-NEXT: v_perm_b32 v1, v13, v55, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v30, v28, s4 -; VI-NEXT: v_perm_b32 v1, v14, v55, s4 +; VI-NEXT: v_perm_b32 v2, v29, v27, s4 +; VI-NEXT: v_perm_b32 v1, v14, v54, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v32, v17, s4 +; VI-NEXT: v_perm_b32 v2, v31, v17, s4 +; VI-NEXT: v_perm_b32 v1, v15, v53, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v15, v1, s4 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v29, v27, s4 +; VI-NEXT: v_perm_b32 v2, v28, v26, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -77309,111 +77217,108 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr25 +; GFX9-NEXT: ; implicit-def: $vgpr26 ; GFX9-NEXT: ; implicit-def: $vgpr24 -; GFX9-NEXT: ; implicit-def: $vgpr29 -; GFX9-NEXT: ; implicit-def: $vgpr28 ; GFX9-NEXT: ; implicit-def: $vgpr63 -; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr21 +; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr60 ; GFX9-NEXT: ; implicit-def: $vgpr59 +; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr58 ; GFX9-NEXT: ; implicit-def: $vgpr57 ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr47 ; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr22 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr44 ; GFX9-NEXT: ; implicit-def: $vgpr43 ; GFX9-NEXT: ; implicit-def: $vgpr42 ; GFX9-NEXT: ; implicit-def: $vgpr41 +; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr40 ; GFX9-NEXT: ; implicit-def: $vgpr55 ; GFX9-NEXT: ; implicit-def: $vgpr54 ; GFX9-NEXT: ; implicit-def: $vgpr53 ; GFX9-NEXT: ; implicit-def: $vgpr52 +; GFX9-NEXT: ; implicit-def: $vgpr20 ; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr50 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr48 ; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr18 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr32 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr27 -; GFX9-NEXT: ; implicit-def: $vgpr25 -; GFX9-NEXT: ; implicit-def: $vgpr26 -; GFX9-NEXT: ; implicit-def: $vgpr23 -; GFX9-NEXT: ; implicit-def: $vgpr20 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr31 +; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr29 ; GFX9-NEXT: ; implicit-def: $vgpr17 +; GFX9-NEXT: ; implicit-def: $vgpr28 +; GFX9-NEXT: ; kill: killed $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr27 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB104_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 24, v16 ; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v16 ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: v_mov_b32_e32 v27, v22 -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB104_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB104_4 @@ -77430,130 +77335,127 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 { ; GFX9-NEXT: v_pk_add_f16 v10, v10, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v9, v9, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v8, v8, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v7, v7, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v6, v6, s6 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v5, v5, s6 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_pk_add_f16 v4, v4, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v3, v3, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_pk_add_f16 v2, v2, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v1, v1, s6 op_sel_hi:[1,0] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v16 ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; GFX9-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; GFX9-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB104_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v22, v30, v24, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v31, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v25, s4 +; GFX9-NEXT: v_perm_b32 v24, v26, v24, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v1, v28, v63, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 -; GFX9-NEXT: v_perm_b32 v21, v62, v21, s4 +; GFX9-NEXT: v_perm_b32 v1, v2, v63, s4 +; GFX9-NEXT: v_perm_b32 v2, v62, v61, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v1, v3, v61, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1 +; GFX9-NEXT: v_perm_b32 v1, v3, v60, s4 +; GFX9-NEXT: v_perm_b32 v2, v59, v23, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v1, v4, v60, s4 -; GFX9-NEXT: v_perm_b32 v2, v59, v58, s4 +; GFX9-NEXT: v_perm_b32 v1, v4, v58, s4 +; GFX9-NEXT: v_perm_b32 v2, v57, v56, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v1, v5, v57, s4 -; GFX9-NEXT: v_perm_b32 v2, v56, v26, s4 +; GFX9-NEXT: v_perm_b32 v1, v5, v47, s4 +; GFX9-NEXT: v_perm_b32 v2, v46, v22, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_perm_b32 v1, v6, v47, s4 -; GFX9-NEXT: v_perm_b32 v2, v46, v45, s4 +; GFX9-NEXT: v_perm_b32 v1, v6, v45, s4 +; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v1, v7, v44, s4 -; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4 +; GFX9-NEXT: v_perm_b32 v1, v7, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v41, v21, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_perm_b32 v1, v8, v42, s4 -; GFX9-NEXT: v_perm_b32 v2, v41, v40, s4 +; GFX9-NEXT: v_perm_b32 v1, v8, v40, s4 +; GFX9-NEXT: v_perm_b32 v2, v55, v54, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v1, v9, v55, s4 -; GFX9-NEXT: v_perm_b32 v2, v54, v20, s4 +; GFX9-NEXT: v_perm_b32 v1, v9, v53, s4 +; GFX9-NEXT: v_perm_b32 v2, v52, v20, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: v_perm_b32 v1, v10, v53, s4 -; GFX9-NEXT: v_perm_b32 v2, v52, v51, s4 +; GFX9-NEXT: v_perm_b32 v1, v10, v51, s4 +; GFX9-NEXT: v_perm_b32 v2, v50, v49, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_perm_b32 v1, v11, v50, s4 -; GFX9-NEXT: v_perm_b32 v2, v49, v19, s4 +; GFX9-NEXT: v_perm_b32 v1, v11, v48, s4 +; GFX9-NEXT: v_perm_b32 v2, v39, v19, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: v_perm_b32 v1, v12, v48, s4 -; GFX9-NEXT: v_perm_b32 v2, v39, v38, s4 +; GFX9-NEXT: v_perm_b32 v1, v12, v38, s4 +; GFX9-NEXT: v_perm_b32 v2, v37, v36, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_perm_b32 v1, v13, v37, s4 -; GFX9-NEXT: v_perm_b32 v2, v36, v18, s4 +; GFX9-NEXT: v_perm_b32 v1, v13, v35, s4 +; GFX9-NEXT: v_perm_b32 v2, v34, v18, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v1, v14, v35, s4 -; GFX9-NEXT: v_perm_b32 v2, v34, v33, s4 +; GFX9-NEXT: v_perm_b32 v1, v14, v33, s4 +; GFX9-NEXT: v_perm_b32 v2, v32, v31, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v15, v32, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4 +; GFX9-NEXT: v_perm_b32 v1, v15, v30, s4 +; GFX9-NEXT: v_perm_b32 v2, v29, v17, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v2, v27, v25, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v16, v28, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v1, v16, v1, s4 +; GFX9-NEXT: v_perm_b32 v2, v27, v2, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -78097,12 +77999,9 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: s_or_b32 s43, s4, s5 ; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 24 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_writelane_b32 v19, s4, 4 -; SI-NEXT: v_writelane_b32 v19, s5, 5 -; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 16 ; SI-NEXT: v_writelane_b32 v19, s4, 2 ; SI-NEXT: v_writelane_b32 v19, s5, 3 -; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 8 +; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 16 ; SI-NEXT: v_writelane_b32 v19, s4, 0 ; SI-NEXT: v_writelane_b32 v19, s5, 1 ; SI-NEXT: s_and_b32 s4, s18, 0xffff @@ -78111,9 +78010,6 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s70, 16 ; SI-NEXT: s_or_b32 s41, s4, s5 -; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 24 -; SI-NEXT: v_writelane_b32 v19, s4, 6 -; SI-NEXT: v_writelane_b32 v19, s5, 7 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s81, 16 ; SI-NEXT: s_or_b32 s14, s4, s5 @@ -78149,17 +78045,29 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: s_or_b32 s4, s4, s5 ; SI-NEXT: s_and_b32 s5, s98, 0xffff ; SI-NEXT: s_lshl_b32 s45, s99, 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 8 +; SI-NEXT: s_lshr_b64 s[56:57], s[40:41], 24 ; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8 +; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 8 ; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 24 ; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 8 -; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 24 -; SI-NEXT: s_lshr_b64 s[90:91], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[12:13], 8 +; SI-NEXT: s_lshr_b64 s[90:91], s[14:15], 8 +; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 24 +; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[12:13], 8 ; SI-NEXT: s_lshr_b64 s[88:89], s[10:11], 24 ; SI-NEXT: s_lshr_b64 s[92:93], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 24 +; SI-NEXT: s_lshr_b64 s[34:35], s[8:9], 16 ; SI-NEXT: s_or_b32 s5, s5, s45 +; SI-NEXT: s_lshr_b64 s[38:39], s[10:11], 8 +; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[36:37], s[6:7], 24 +; SI-NEXT: s_lshr_b64 s[48:49], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 8 +; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 24 +; SI-NEXT: s_lshr_b64 s[54:55], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[4:5], 8 ; SI-NEXT: s_lshr_b32 s75, s43, 8 ; SI-NEXT: s_lshr_b32 s73, s41, 8 ; SI-NEXT: s_lshr_b32 s63, s15, 8 @@ -78174,18 +78082,8 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: s_bfe_u32 s91, s82, 0x80008 ; SI-NEXT: s_bfe_u32 s93, s84, 0x80008 ; SI-NEXT: s_bfe_u32 s95, s86, 0x80008 -; SI-NEXT: s_bfe_u32 s56, s96, 0x80008 -; SI-NEXT: s_bfe_u32 s58, s99, 0x80008 -; SI-NEXT: s_lshr_b64 s[66:67], s[10:11], 8 -; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 24 -; SI-NEXT: s_lshr_b64 s[54:55], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 8 -; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 24 -; SI-NEXT: s_lshr_b64 s[48:49], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8 -; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 24 -; SI-NEXT: s_lshr_b64 s[34:35], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8 +; SI-NEXT: s_bfe_u32 s31, s96, 0x80008 +; SI-NEXT: s_bfe_u32 s35, s99, 0x80008 ; SI-NEXT: s_cbranch_execnz .LBB105_4 ; SI-NEXT: .LBB105_2: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v2, s44 @@ -78348,30 +78246,30 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: v_readfirstlane_b32 s17, v7 ; SI-NEXT: s_or_b32 s43, s17, s16 +; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 8 +; SI-NEXT: s_lshr_b64 s[56:57], s[40:41], 24 ; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8 ; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 24 ; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 24 ; SI-NEXT: s_lshr_b64 s[18:19], s[42:43], 24 ; SI-NEXT: s_lshr_b64 s[20:21], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[24:25], s[42:43], 8 -; SI-NEXT: s_lshr_b64 s[22:23], s[40:41], 24 -; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 8 -; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 24 -; SI-NEXT: s_lshr_b64 s[90:91], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[12:13], 8 +; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 8 +; SI-NEXT: s_lshr_b64 s[90:91], s[14:15], 8 +; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[12:13], 8 ; SI-NEXT: s_lshr_b64 s[88:89], s[10:11], 24 ; SI-NEXT: s_lshr_b64 s[92:93], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[66:67], s[10:11], 8 -; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 24 -; SI-NEXT: s_lshr_b64 s[54:55], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 8 -; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 24 +; SI-NEXT: s_lshr_b64 s[38:39], s[10:11], 8 +; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 24 +; SI-NEXT: s_lshr_b64 s[34:35], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 8 +; SI-NEXT: s_lshr_b64 s[36:37], s[6:7], 24 ; SI-NEXT: s_lshr_b64 s[48:49], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8 -; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 24 -; SI-NEXT: s_lshr_b64 s[34:35], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8 +; SI-NEXT: s_lshr_b64 s[64:65], s[6:7], 8 +; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 24 +; SI-NEXT: s_lshr_b64 s[54:55], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[4:5], 8 ; SI-NEXT: s_lshr_b32 s75, s43, 8 ; SI-NEXT: s_lshr_b32 s73, s41, 8 ; SI-NEXT: s_lshr_b32 s63, s15, 8 @@ -78396,63 +78294,57 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: v_writelane_b32 v19, s5, 1 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr75 ; SI-NEXT: ; implicit-def: $sgpr77 ; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr73 ; SI-NEXT: ; implicit-def: $sgpr79 ; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: ; implicit-def: $sgpr90 ; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr63 ; SI-NEXT: ; implicit-def: $sgpr89 ; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr30 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr61 ; SI-NEXT: ; implicit-def: $sgpr91 -; SI-NEXT: ; implicit-def: $sgpr59 -; SI-NEXT: ; implicit-def: $sgpr93 -; SI-NEXT: ; implicit-def: $sgpr57 -; SI-NEXT: ; implicit-def: $sgpr95 -; SI-NEXT: ; implicit-def: $sgpr47 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr45 -; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr10 -; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr59 +; SI-NEXT: ; implicit-def: $sgpr93 ; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr54 ; SI-NEXT: ; implicit-def: $sgpr52 +; SI-NEXT: ; implicit-def: $sgpr34 +; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr57 +; SI-NEXT: ; implicit-def: $sgpr95 ; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr50 +; SI-NEXT: ; implicit-def: $sgpr64 ; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr30 +; SI-NEXT: ; implicit-def: $sgpr47 +; SI-NEXT: ; implicit-def: $sgpr31 +; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr54 +; SI-NEXT: ; implicit-def: $sgpr50 +; SI-NEXT: ; implicit-def: $sgpr45 +; SI-NEXT: ; implicit-def: $sgpr35 ; SI-NEXT: v_writelane_b32 v19, s4, 2 ; SI-NEXT: v_writelane_b32 v19, s5, 3 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v19, s4, 4 -; SI-NEXT: v_writelane_b32 v19, s5, 5 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: v_writelane_b32 v19, s4, 6 -; SI-NEXT: v_writelane_b32 v19, s5, 7 -; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: s_branch .LBB105_2 ; SI-NEXT: .LBB105_4: -; SI-NEXT: v_readlane_b32 s18, v19, 4 -; SI-NEXT: v_readlane_b32 s20, v19, 2 -; SI-NEXT: v_readlane_b32 s22, v19, 6 -; SI-NEXT: v_readlane_b32 s24, v19, 0 +; SI-NEXT: v_readlane_b32 s18, v19, 2 +; SI-NEXT: v_readlane_b32 s20, v19, 0 ; SI-NEXT: v_mov_b32_e32 v1, s99 ; SI-NEXT: v_mov_b32_e32 v2, s96 ; SI-NEXT: v_mov_b32_e32 v3, s86 @@ -78461,21 +78353,19 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: v_mov_b32_e32 v6, s80 ; SI-NEXT: v_mov_b32_e32 v9, s70 ; SI-NEXT: v_mov_b32_e32 v12, s68 -; SI-NEXT: v_mov_b32_e32 v7, s58 -; SI-NEXT: v_mov_b32_e32 v8, s56 +; SI-NEXT: v_mov_b32_e32 v7, s35 +; SI-NEXT: v_mov_b32_e32 v8, s31 ; SI-NEXT: v_mov_b32_e32 v10, s95 ; SI-NEXT: v_mov_b32_e32 v11, s93 ; SI-NEXT: v_mov_b32_e32 v13, s91 ; SI-NEXT: v_mov_b32_e32 v14, s89 ; SI-NEXT: v_mov_b32_e32 v15, s79 ; SI-NEXT: v_mov_b32_e32 v16, s77 -; SI-NEXT: v_readlane_b32 s19, v19, 5 -; SI-NEXT: v_readlane_b32 s21, v19, 3 -; SI-NEXT: v_readlane_b32 s23, v19, 7 -; SI-NEXT: v_readlane_b32 s25, v19, 1 +; SI-NEXT: v_readlane_b32 s19, v19, 3 +; SI-NEXT: v_readlane_b32 s21, v19, 1 ; SI-NEXT: .LBB105_5: ; %end ; SI-NEXT: s_and_b32 s16, s42, 0xff -; SI-NEXT: s_lshl_b32 s17, s24, 8 +; SI-NEXT: s_lshl_b32 s17, s58, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s20, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 @@ -78494,11 +78384,11 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: v_or_b32_e32 v12, v16, v12 ; SI-NEXT: v_or_b32_e32 v12, s16, v12 ; SI-NEXT: s_and_b32 s16, s40, 0xff -; SI-NEXT: s_lshl_b32 s17, s74, 8 +; SI-NEXT: s_lshl_b32 s17, s76, 8 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s60, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 16 -; SI-NEXT: s_lshl_b32 s18, s22, 24 +; SI-NEXT: s_lshl_b32 s18, s56, 24 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s18, s17 ; SI-NEXT: v_add_i32_e32 v16, vcc, 4, v0 @@ -78519,7 +78409,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: v_or_b32_e32 v9, v12, v9 ; SI-NEXT: v_or_b32_e32 v9, s16, v9 ; SI-NEXT: s_and_b32 s14, s14, 0xff -; SI-NEXT: s_lshl_b32 s16, s76, 8 +; SI-NEXT: s_lshl_b32 s16, s90, 8 ; SI-NEXT: s_or_b32 s14, s14, s16 ; SI-NEXT: s_and_b32 s16, s72, 0xff ; SI-NEXT: s_lshl_b32 s16, s16, 16 @@ -78543,11 +78433,11 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: v_or_b32_e32 v6, v9, v6 ; SI-NEXT: v_or_b32_e32 v6, s14, v6 ; SI-NEXT: s_and_b32 s12, s12, 0xff -; SI-NEXT: s_lshl_b32 s14, s94, 8 +; SI-NEXT: s_lshl_b32 s14, s30, 8 ; SI-NEXT: s_or_b32 s12, s12, s14 -; SI-NEXT: s_and_b32 s14, s90, 0xff +; SI-NEXT: s_and_b32 s14, s78, 0xff ; SI-NEXT: s_lshl_b32 s14, s14, 16 -; SI-NEXT: s_lshl_b32 s15, s78, 24 +; SI-NEXT: s_lshl_b32 s15, s74, 24 ; SI-NEXT: s_and_b32 s12, s12, 0xffff ; SI-NEXT: s_or_b32 s14, s15, s14 ; SI-NEXT: v_add_i32_e32 v9, vcc, 20, v0 @@ -78567,7 +78457,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: v_or_b32_e32 v5, v6, v5 ; SI-NEXT: v_or_b32_e32 v5, s12, v5 ; SI-NEXT: s_and_b32 s10, s10, 0xff -; SI-NEXT: s_lshl_b32 s12, s66, 8 +; SI-NEXT: s_lshl_b32 s12, s38, 8 ; SI-NEXT: s_or_b32 s10, s10, s12 ; SI-NEXT: s_and_b32 s12, s92, 0xff ; SI-NEXT: s_lshl_b32 s12, s12, 16 @@ -78591,11 +78481,11 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: v_or_b32_e32 v4, v5, v4 ; SI-NEXT: v_or_b32_e32 v4, s10, v4 ; SI-NEXT: s_and_b32 s8, s8, 0xff -; SI-NEXT: s_lshl_b32 s10, s64, 8 +; SI-NEXT: s_lshl_b32 s10, s52, 8 ; SI-NEXT: s_or_b32 s8, s8, s10 -; SI-NEXT: s_and_b32 s10, s54, 0xff +; SI-NEXT: s_and_b32 s10, s34, 0xff ; SI-NEXT: s_lshl_b32 s10, s10, 16 -; SI-NEXT: s_lshl_b32 s11, s52, 24 +; SI-NEXT: s_lshl_b32 s11, s94, 24 ; SI-NEXT: s_and_b32 s8, s8, 0xffff ; SI-NEXT: s_or_b32 s10, s11, s10 ; SI-NEXT: v_add_i32_e32 v5, vcc, 36, v0 @@ -78615,11 +78505,11 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: v_or_b32_e32 v3, v4, v3 ; SI-NEXT: v_or_b32_e32 v3, s8, v3 ; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: s_lshl_b32 s8, s50, 8 +; SI-NEXT: s_lshl_b32 s8, s64, 8 ; SI-NEXT: s_or_b32 s6, s6, s8 ; SI-NEXT: s_and_b32 s8, s48, 0xff ; SI-NEXT: s_lshl_b32 s8, s8, 16 -; SI-NEXT: s_lshl_b32 s9, s38, 24 +; SI-NEXT: s_lshl_b32 s9, s36, 24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff ; SI-NEXT: s_or_b32 s8, s9, s8 ; SI-NEXT: v_add_i32_e32 v4, vcc, 44, v0 @@ -78639,11 +78529,11 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; SI-NEXT: v_or_b32_e32 v2, v3, v2 ; SI-NEXT: v_or_b32_e32 v2, s6, v2 ; SI-NEXT: s_and_b32 s4, s4, 0xff -; SI-NEXT: s_lshl_b32 s6, s36, 8 +; SI-NEXT: s_lshl_b32 s6, s66, 8 ; SI-NEXT: s_or_b32 s4, s4, s6 -; SI-NEXT: s_and_b32 s6, s34, 0xff +; SI-NEXT: s_and_b32 s6, s54, 0xff ; SI-NEXT: s_lshl_b32 s6, s6, 16 -; SI-NEXT: s_lshl_b32 s7, s30, 24 +; SI-NEXT: s_lshl_b32 s7, s50, 24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s6, s7, s6 ; SI-NEXT: v_add_i32_e32 v3, vcc, 52, v0 @@ -78806,121 +78696,120 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; VI-NEXT: .LBB105_2: ; %cmp.true ; VI-NEXT: s_lshr_b32 s6, s17, 16 ; VI-NEXT: v_mov_b32_e32 v1, 0x200 -; VI-NEXT: v_add_f16_e32 v11, s6, v1 +; VI-NEXT: v_add_f16_e32 v12, s6, v1 ; VI-NEXT: s_lshr_b32 s6, s16, 16 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v12 ; VI-NEXT: v_add_f16_e32 v25, s17, v1 -; VI-NEXT: v_add_f16_e32 v18, s6, v1 +; VI-NEXT: v_add_f16_e32 v17, s6, v1 ; VI-NEXT: s_lshr_b32 s6, s19, 16 -; VI-NEXT: v_or_b32_e32 v10, v25, v2 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v18 +; VI-NEXT: v_or_b32_e32 v11, v25, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17 ; VI-NEXT: v_add_f16_e32 v33, s16, v1 -; VI-NEXT: v_add_f16_e32 v12, s6, v1 +; VI-NEXT: v_add_f16_e32 v13, s6, v1 ; VI-NEXT: s_lshr_b32 s6, s18, 16 -; VI-NEXT: v_or_b32_e32 v9, v33, v2 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v12 +; VI-NEXT: v_or_b32_e32 v10, v33, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13 ; VI-NEXT: v_add_f16_e32 v27, s19, v1 -; VI-NEXT: v_add_f16_e32 v20, s6, v1 +; VI-NEXT: v_add_f16_e32 v19, s6, v1 ; VI-NEXT: s_lshr_b32 s6, s21, 16 -; VI-NEXT: v_or_b32_e32 v52, v27, v2 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20 +; VI-NEXT: v_or_b32_e32 v60, v27, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19 ; VI-NEXT: v_add_f16_e32 v35, s18, v1 -; VI-NEXT: v_add_f16_e32 v13, s6, v1 -; VI-NEXT: s_lshr_b32 s6, s20, 16 -; VI-NEXT: v_or_b32_e32 v51, v35, v2 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13 -; VI-NEXT: v_add_f16_e32 v28, s21, v1 -; VI-NEXT: v_add_f16_e32 v21, s6, v1 -; VI-NEXT: s_lshr_b32 s6, s23, 16 -; VI-NEXT: v_or_b32_e32 v8, v28, v2 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21 -; VI-NEXT: v_add_f16_e32 v37, s20, v1 ; VI-NEXT: v_add_f16_e32 v14, s6, v1 -; VI-NEXT: s_lshr_b32 s6, s22, 16 -; VI-NEXT: v_or_b32_e32 v7, v37, v2 +; VI-NEXT: s_lshr_b32 s6, s20, 16 +; VI-NEXT: v_or_b32_e32 v59, v35, v2 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v14 -; VI-NEXT: v_add_f16_e32 v30, s23, v1 +; VI-NEXT: v_add_f16_e32 v29, s21, v1 ; VI-NEXT: v_add_f16_e32 v22, s6, v1 -; VI-NEXT: s_lshr_b32 s6, s25, 16 -; VI-NEXT: v_or_b32_e32 v57, v30, v2 +; VI-NEXT: s_lshr_b32 s6, s23, 16 +; VI-NEXT: v_or_b32_e32 v9, v29, v2 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22 -; VI-NEXT: v_add_f16_e32 v38, s22, v1 +; VI-NEXT: v_add_f16_e32 v37, s20, v1 ; VI-NEXT: v_add_f16_e32 v15, s6, v1 -; VI-NEXT: s_lshr_b32 s6, s24, 16 -; VI-NEXT: v_or_b32_e32 v56, v38, v2 +; VI-NEXT: s_lshr_b32 s6, s22, 16 +; VI-NEXT: v_or_b32_e32 v8, v37, v2 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v15 -; VI-NEXT: v_add_f16_e32 v31, s25, v1 +; VI-NEXT: v_add_f16_e32 v31, s23, v1 ; VI-NEXT: v_add_f16_e32 v23, s6, v1 -; VI-NEXT: s_lshr_b32 s6, s27, 16 -; VI-NEXT: v_or_b32_e32 v6, v31, v2 +; VI-NEXT: s_lshr_b32 s6, s25, 16 +; VI-NEXT: v_or_b32_e32 v47, v31, v2 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v23 -; VI-NEXT: v_add_f16_e32 v39, s24, v1 +; VI-NEXT: v_add_f16_e32 v39, s22, v1 ; VI-NEXT: v_add_f16_e32 v16, s6, v1 -; VI-NEXT: s_lshr_b32 s6, s26, 16 -; VI-NEXT: v_or_b32_e32 v5, v39, v2 +; VI-NEXT: s_lshr_b32 s6, s24, 16 +; VI-NEXT: v_or_b32_e32 v46, v39, v2 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16 -; VI-NEXT: v_add_f16_e32 v32, s27, v1 +; VI-NEXT: v_add_f16_e32 v32, s25, v1 ; VI-NEXT: v_add_f16_e32 v24, s6, v1 -; VI-NEXT: s_lshr_b32 s6, s29, 16 -; VI-NEXT: v_or_b32_e32 v42, v32, v2 +; VI-NEXT: s_lshr_b32 s6, s27, 16 +; VI-NEXT: v_or_b32_e32 v7, v32, v2 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v24 -; VI-NEXT: v_add_f16_e32 v48, s26, v1 -; VI-NEXT: v_add_f16_e32 v17, s6, v1 -; VI-NEXT: s_lshr_b32 s6, s28, 16 -; VI-NEXT: v_or_b32_e32 v41, v48, v2 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17 -; VI-NEXT: v_add_f16_e32 v34, s29, v1 +; VI-NEXT: v_add_f16_e32 v48, s24, v1 +; VI-NEXT: v_add_f16_e32 v18, s6, v1 +; VI-NEXT: s_lshr_b32 s6, s26, 16 +; VI-NEXT: v_or_b32_e32 v6, v48, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v18 +; VI-NEXT: v_add_f16_e32 v34, s27, v1 ; VI-NEXT: v_add_f16_e32 v26, s6, v1 -; VI-NEXT: s_lshr_b32 s6, s5, 16 -; VI-NEXT: v_or_b32_e32 v55, v34, v2 +; VI-NEXT: s_lshr_b32 s6, s29, 16 +; VI-NEXT: v_or_b32_e32 v42, v34, v2 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26 -; VI-NEXT: v_add_f16_e32 v49, s28, v1 -; VI-NEXT: v_add_f16_e32 v19, s6, v1 -; VI-NEXT: v_add_f16_e32 v36, s5, v1 -; VI-NEXT: s_lshr_b32 s5, s4, 16 -; VI-NEXT: v_or_b32_e32 v54, v49, v2 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19 -; VI-NEXT: v_add_f16_e32 v29, s5, v1 +; VI-NEXT: v_add_f16_e32 v49, s26, v1 +; VI-NEXT: v_add_f16_e32 v20, s6, v1 +; VI-NEXT: s_lshr_b32 s6, s28, 16 +; VI-NEXT: v_or_b32_e32 v41, v49, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20 +; VI-NEXT: v_add_f16_e32 v36, s29, v1 +; VI-NEXT: v_add_f16_e32 v28, s6, v1 +; VI-NEXT: s_lshr_b32 s6, s5, 16 ; VI-NEXT: v_or_b32_e32 v44, v36, v2 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29 -; VI-NEXT: v_add_f16_e32 v50, s4, v1 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28 +; VI-NEXT: v_add_f16_e32 v50, s28, v1 +; VI-NEXT: v_add_f16_e32 v21, s6, v1 +; VI-NEXT: v_add_f16_e32 v38, s5, v1 +; VI-NEXT: s_lshr_b32 s5, s4, 16 ; VI-NEXT: v_or_b32_e32 v43, v50, v2 -; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[43:44] -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[54:55] -; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v43 -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21 +; VI-NEXT: v_add_f16_e32 v30, s5, v1 +; VI-NEXT: v_or_b32_e32 v53, v38, v2 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30 +; VI-NEXT: v_add_f16_e32 v51, s4, v1 +; VI-NEXT: v_or_b32_e32 v52, v51, v2 +; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[52:53] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[43:44] ; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[41:42] -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v44 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v5 -; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[5:6] -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v55 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v42 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v6 -; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[56:57] -; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v7 -; VI-NEXT: v_lshrrev_b64 v[6:7], 24, v[7:8] -; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v57 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v8 -; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[51:52] -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v52 -; VI-NEXT: v_mov_b32_e32 v52, v1 -; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v9 -; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[9:10] -; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v54 -; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v41 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v56 -; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v51 -; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10 -; VI-NEXT: v_bfe_u32 v9, v19, 8, 8 -; VI-NEXT: v_bfe_u32 v10, v17, 8, 8 -; VI-NEXT: v_bfe_u32 v41, v16, 8, 8 -; VI-NEXT: v_bfe_u32 v43, v15, 8, 8 -; VI-NEXT: v_bfe_u32 v46, v14, 8, 8 -; VI-NEXT: v_bfe_u32 v56, v13, 8, 8 -; VI-NEXT: v_bfe_u32 v59, v12, 8, 8 -; VI-NEXT: v_bfe_u32 v62, v11, 8, 8 +; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[6:7] +; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v44 +; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v6 +; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[46:47] +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v42 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; VI-NEXT: v_lshrrev_b64 v[6:7], 24, v[8:9] +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v8 +; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[59:60] +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v53 +; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v9 +; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[10:11] +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v52 +; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v43 +; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v41 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v47 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v46 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v60 +; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v59 +; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v10 +; VI-NEXT: v_bfe_u32 v9, v21, 8, 8 +; VI-NEXT: v_bfe_u32 v10, v20, 8, 8 +; VI-NEXT: v_bfe_u32 v11, v18, 8, 8 +; VI-NEXT: v_bfe_u32 v43, v16, 8, 8 +; VI-NEXT: v_bfe_u32 v46, v15, 8, 8 +; VI-NEXT: v_bfe_u32 v56, v14, 8, 8 +; VI-NEXT: v_bfe_u32 v59, v13, 8, 8 +; VI-NEXT: v_bfe_u32 v62, v12, 8, 8 ; VI-NEXT: s_branch .LBB105_5 ; VI-NEXT: .LBB105_3: ; VI-NEXT: ; implicit-def: $sgpr72 @@ -78974,55 +78863,55 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; VI-NEXT: s_branch .LBB105_2 ; VI-NEXT: .LBB105_4: ; VI-NEXT: v_mov_b32_e32 v2, s44 -; VI-NEXT: v_mov_b32_e32 v1, s79 -; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v18, s67 -; VI-NEXT: v_mov_b32_e32 v11, s66 -; VI-NEXT: v_mov_b32_e32 v20, s65 -; VI-NEXT: v_mov_b32_e32 v12, s64 -; VI-NEXT: v_mov_b32_e32 v21, s55 -; VI-NEXT: v_mov_b32_e32 v13, s54 -; VI-NEXT: v_mov_b32_e32 v22, s53 -; VI-NEXT: v_mov_b32_e32 v14, s52 -; VI-NEXT: v_mov_b32_e32 v23, s51 -; VI-NEXT: v_mov_b32_e32 v15, s50 -; VI-NEXT: v_mov_b32_e32 v24, s49 -; VI-NEXT: v_mov_b32_e32 v16, s48 -; VI-NEXT: v_mov_b32_e32 v26, s39 -; VI-NEXT: v_mov_b32_e32 v17, s38 -; VI-NEXT: v_mov_b32_e32 v29, s37 -; VI-NEXT: v_mov_b32_e32 v19, s36 +; VI-NEXT: v_mov_b32_e32 v1, s63 +; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v17, s67 +; VI-NEXT: v_mov_b32_e32 v12, s66 +; VI-NEXT: v_mov_b32_e32 v19, s65 +; VI-NEXT: v_mov_b32_e32 v13, s64 +; VI-NEXT: v_mov_b32_e32 v22, s55 +; VI-NEXT: v_mov_b32_e32 v14, s54 +; VI-NEXT: v_mov_b32_e32 v23, s53 +; VI-NEXT: v_mov_b32_e32 v15, s52 +; VI-NEXT: v_mov_b32_e32 v24, s51 +; VI-NEXT: v_mov_b32_e32 v16, s50 +; VI-NEXT: v_mov_b32_e32 v26, s49 +; VI-NEXT: v_mov_b32_e32 v18, s48 +; VI-NEXT: v_mov_b32_e32 v28, s39 +; VI-NEXT: v_mov_b32_e32 v20, s38 +; VI-NEXT: v_mov_b32_e32 v30, s37 +; VI-NEXT: v_mov_b32_e32 v21, s36 ; VI-NEXT: v_mov_b32_e32 v33, s16 ; VI-NEXT: v_mov_b32_e32 v25, s17 ; VI-NEXT: v_mov_b32_e32 v35, s18 ; VI-NEXT: v_mov_b32_e32 v27, s19 ; VI-NEXT: v_mov_b32_e32 v37, s20 -; VI-NEXT: v_mov_b32_e32 v28, s21 -; VI-NEXT: v_mov_b32_e32 v38, s22 -; VI-NEXT: v_mov_b32_e32 v30, s23 -; VI-NEXT: v_mov_b32_e32 v39, s24 -; VI-NEXT: v_mov_b32_e32 v31, s25 -; VI-NEXT: v_mov_b32_e32 v48, s26 -; VI-NEXT: v_mov_b32_e32 v32, s27 -; VI-NEXT: v_mov_b32_e32 v49, s28 -; VI-NEXT: v_mov_b32_e32 v34, s29 -; VI-NEXT: v_mov_b32_e32 v50, s4 -; VI-NEXT: v_mov_b32_e32 v36, s5 +; VI-NEXT: v_mov_b32_e32 v29, s21 +; VI-NEXT: v_mov_b32_e32 v39, s22 +; VI-NEXT: v_mov_b32_e32 v31, s23 +; VI-NEXT: v_mov_b32_e32 v48, s24 +; VI-NEXT: v_mov_b32_e32 v32, s25 +; VI-NEXT: v_mov_b32_e32 v49, s26 +; VI-NEXT: v_mov_b32_e32 v34, s27 +; VI-NEXT: v_mov_b32_e32 v50, s28 +; VI-NEXT: v_mov_b32_e32 v36, s29 +; VI-NEXT: v_mov_b32_e32 v51, s4 +; VI-NEXT: v_mov_b32_e32 v38, s5 ; VI-NEXT: v_mov_b32_e32 v9, s88 ; VI-NEXT: v_mov_b32_e32 v10, s89 -; VI-NEXT: v_mov_b32_e32 v41, s90 +; VI-NEXT: v_mov_b32_e32 v11, s90 ; VI-NEXT: v_mov_b32_e32 v43, s91 ; VI-NEXT: v_mov_b32_e32 v46, s30 ; VI-NEXT: v_mov_b32_e32 v56, s31 ; VI-NEXT: v_mov_b32_e32 v59, s34 ; VI-NEXT: v_mov_b32_e32 v62, s35 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v52, s63 -; VI-NEXT: v_mov_b32_e32 v54, s78 -; VI-NEXT: v_mov_b32_e32 v53, s62 -; VI-NEXT: v_mov_b32_e32 v40, s77 -; VI-NEXT: v_mov_b32_e32 v55, s61 +; VI-NEXT: v_mov_b32_e32 v53, s79 +; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v55, s78 +; VI-NEXT: v_mov_b32_e32 v54, s62 +; VI-NEXT: v_mov_b32_e32 v41, s77 +; VI-NEXT: v_mov_b32_e32 v40, s61 ; VI-NEXT: v_mov_b32_e32 v44, s76 ; VI-NEXT: v_mov_b32_e32 v42, s60 ; VI-NEXT: v_mov_b32_e32 v47, s75 @@ -79032,7 +78921,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v61, s73 ; VI-NEXT: v_mov_b32_e32 v60, s57 ; VI-NEXT: v_mov_b32_e32 v1, s72 -; VI-NEXT: v_mov_b32_e32 v51, s56 +; VI-NEXT: v_mov_b32_e32 v52, s56 ; VI-NEXT: v_mov_b32_e32 v2, s42 ; VI-NEXT: v_mov_b32_e32 v3, s40 ; VI-NEXT: v_mov_b32_e32 v4, s14 @@ -79042,92 +78931,92 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; VI-NEXT: v_mov_b32_e32 v8, s6 ; VI-NEXT: .LBB105_5: ; %end ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v8, v18, v8, s4 +; VI-NEXT: v_perm_b32 v8, v17, v8, s4 ; VI-NEXT: v_perm_b32 v1, v33, v1, s4 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v1, v1, v8 -; VI-NEXT: v_perm_b32 v8, v11, v62, s4 +; VI-NEXT: v_perm_b32 v8, v12, v62, s4 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v25, v51, s4 +; VI-NEXT: v_perm_b32 v1, v25, v52, s4 ; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; VI-NEXT: v_or_b32_e32 v1, v1, v8 ; VI-NEXT: v_add_u32_e32 v8, vcc, 4, v0 +; VI-NEXT: v_perm_b32 v7, v19, v7, s4 ; VI-NEXT: buffer_store_dword v1, v8, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v20, v7, s4 -; VI-NEXT: v_perm_b32 v7, v35, v61, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v7, v1 +; VI-NEXT: v_perm_b32 v1, v35, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; VI-NEXT: v_or_b32_e32 v1, v1, v7 ; VI-NEXT: v_add_u32_e32 v7, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v7, v12, v59, s4 +; VI-NEXT: v_perm_b32 v7, v13, v59, s4 ; VI-NEXT: v_perm_b32 v1, v27, v60, s4 ; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; VI-NEXT: v_or_b32_e32 v1, v1, v7 ; VI-NEXT: v_add_u32_e32 v7, vcc, 12, v0 -; VI-NEXT: v_perm_b32 v6, v21, v6, s4 +; VI-NEXT: v_perm_b32 v6, v22, v6, s4 ; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen ; VI-NEXT: v_perm_b32 v1, v37, v58, s4 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_e32 v1, v1, v6 ; VI-NEXT: v_add_u32_e32 v6, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v6, v13, v56, s4 -; VI-NEXT: v_perm_b32 v1, v28, v57, s4 +; VI-NEXT: v_perm_b32 v6, v14, v56, s4 +; VI-NEXT: v_perm_b32 v1, v29, v57, s4 ; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; VI-NEXT: v_or_b32_e32 v1, v1, v6 ; VI-NEXT: v_add_u32_e32 v6, vcc, 20, v0 -; VI-NEXT: v_perm_b32 v5, v22, v5, s4 +; VI-NEXT: v_perm_b32 v5, v23, v5, s4 ; VI-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v38, v47, s4 +; VI-NEXT: v_perm_b32 v1, v39, v47, s4 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_e32 v1, v1, v5 ; VI-NEXT: v_add_u32_e32 v5, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v5, v14, v46, s4 -; VI-NEXT: v_perm_b32 v1, v30, v45, s4 +; VI-NEXT: v_perm_b32 v5, v15, v46, s4 +; VI-NEXT: v_perm_b32 v1, v31, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; VI-NEXT: v_or_b32_e32 v1, v1, v5 ; VI-NEXT: v_add_u32_e32 v5, vcc, 28, v0 -; VI-NEXT: v_perm_b32 v4, v23, v4, s4 +; VI-NEXT: v_perm_b32 v4, v24, v4, s4 ; VI-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v39, v44, s4 +; VI-NEXT: v_perm_b32 v1, v48, v44, s4 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; VI-NEXT: v_or_b32_e32 v1, v1, v4 ; VI-NEXT: v_add_u32_e32 v4, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v4, v15, v43, s4 -; VI-NEXT: v_perm_b32 v1, v31, v42, s4 +; VI-NEXT: v_perm_b32 v4, v16, v43, s4 +; VI-NEXT: v_perm_b32 v1, v32, v42, s4 ; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; VI-NEXT: v_or_b32_e32 v1, v1, v4 ; VI-NEXT: v_add_u32_e32 v4, vcc, 36, v0 -; VI-NEXT: v_perm_b32 v3, v24, v3, s4 +; VI-NEXT: v_perm_b32 v3, v26, v3, s4 ; VI-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v48, v40, s4 +; VI-NEXT: v_perm_b32 v1, v49, v41, s4 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v1, v1, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v3, v16, v41, s4 -; VI-NEXT: v_perm_b32 v1, v32, v55, s4 +; VI-NEXT: v_perm_b32 v3, v18, v11, s4 +; VI-NEXT: v_perm_b32 v1, v34, v40, s4 ; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; VI-NEXT: v_or_b32_e32 v1, v1, v3 ; VI-NEXT: v_add_u32_e32 v3, vcc, 44, v0 -; VI-NEXT: v_perm_b32 v2, v26, v2, s4 +; VI-NEXT: v_perm_b32 v2, v28, v2, s4 ; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v49, v54, s4 +; VI-NEXT: v_perm_b32 v1, v50, v55, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v17, v10, s4 -; VI-NEXT: v_perm_b32 v1, v34, v53, s4 +; VI-NEXT: v_perm_b32 v2, v20, v10, s4 +; VI-NEXT: v_perm_b32 v1, v36, v54, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v51, v53, s4 ; VI-NEXT: v_readlane_b32 s30, v63, 18 ; VI-NEXT: v_readlane_b32 s31, v63, 19 ; VI-NEXT: v_readlane_b32 s67, v63, 17 @@ -79149,17 +79038,18 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; VI-NEXT: v_readlane_b32 s35, v63, 1 ; VI-NEXT: v_readlane_b32 s34, v63, 0 ; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_perm_b32 v2, v29, v2, s4 -; VI-NEXT: v_perm_b32 v1, v50, v1, s4 +; VI-NEXT: v_perm_b32 v2, v30, v2, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v19, v9, s4 -; VI-NEXT: v_perm_b32 v1, v36, v52, s4 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v21, v9, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 +; VI-NEXT: s_waitcnt vmcnt(0) +; VI-NEXT: v_perm_b32 v1, v38, v1, s4 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload @@ -79186,7 +79076,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -79276,8 +79166,8 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: s_cbranch_execnz .LBB105_4 ; GFX9-NEXT: .LBB105_2: ; %cmp.true ; GFX9-NEXT: v_mov_b32_e32 v1, 0x200 -; GFX9-NEXT: v_pk_add_f16 v19, s17, v1 op_sel_hi:[1,0] -; GFX9-NEXT: v_pk_add_f16 v18, s16, v1 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v16, s17, v1 op_sel_hi:[1,0] +; GFX9-NEXT: v_pk_add_f16 v15, s16, v1 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v14, s19, v1 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v13, s18, v1 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v12, s21, v1 op_sel_hi:[1,0] @@ -79292,22 +79182,20 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: v_pk_add_f16 v3, s28, v1 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v2, s5, v1 op_sel_hi:[1,0] ; GFX9-NEXT: v_pk_add_f16 v1, s4, v1 op_sel_hi:[1,0] -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2] -; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6] -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12] -; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[13:14] -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2] +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[25:26], 24, v[18:19] -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 24, v2 +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[3:4] +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[9:10] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[11:12] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[13:14] +; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[15:16] ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 24, v2 +; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v1 @@ -79339,13 +79227,13 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 24, v14 ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v14 ; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v15 ; GFX9-NEXT: s_branch .LBB105_5 ; GFX9-NEXT: .LBB105_3: ; GFX9-NEXT: ; implicit-def: $sgpr55 @@ -79398,13 +79286,14 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: ; implicit-def: $sgpr56 ; GFX9-NEXT: s_branch .LBB105_2 ; GFX9-NEXT: .LBB105_4: -; GFX9-NEXT: v_mov_b32_e32 v20, s44 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v18, s57 +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v18, s44 +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill ; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v20, s42 -; GFX9-NEXT: v_mov_b32_e32 v18, s16 -; GFX9-NEXT: v_mov_b32_e32 v19, s17 +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_mov_b32_e32 v15, s16 +; GFX9-NEXT: v_mov_b32_e32 v16, s17 ; GFX9-NEXT: v_mov_b32_e32 v13, s18 ; GFX9-NEXT: v_mov_b32_e32 v14, s19 ; GFX9-NEXT: v_mov_b32_e32 v11, s20 @@ -79419,13 +79308,13 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v4, s29 ; GFX9-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NEXT: v_mov_b32_e32 v2, s5 -; GFX9-NEXT: v_mov_b32_e32 v15, s55 -; GFX9-NEXT: v_mov_b32_e32 v16, s53 +; GFX9-NEXT: v_mov_b32_e32 v25, s55 +; GFX9-NEXT: v_mov_b32_e32 v17, s53 ; GFX9-NEXT: v_mov_b32_e32 v62, s54 -; GFX9-NEXT: v_mov_b32_e32 v59, s52 -; GFX9-NEXT: v_mov_b32_e32 v60, s51 -; GFX9-NEXT: v_mov_b32_e32 v58, s50 -; GFX9-NEXT: v_mov_b32_e32 v61, s48 +; GFX9-NEXT: v_mov_b32_e32 v60, s52 +; GFX9-NEXT: v_mov_b32_e32 v61, s51 +; GFX9-NEXT: v_mov_b32_e32 v59, s50 +; GFX9-NEXT: v_mov_b32_e32 v58, s48 ; GFX9-NEXT: v_mov_b32_e32 v57, s49 ; GFX9-NEXT: v_mov_b32_e32 v47, s39 ; GFX9-NEXT: v_mov_b32_e32 v56, s38 @@ -79457,32 +79346,29 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: v_mov_b32_e32 v29, s60 ; GFX9-NEXT: v_mov_b32_e32 v28, s58 ; GFX9-NEXT: v_mov_b32_e32 v27, s59 -; GFX9-NEXT: v_mov_b32_e32 v17, s57 ; GFX9-NEXT: v_mov_b32_e32 v26, s56 -; GFX9-NEXT: v_mov_b32_e32 v22, s12 -; GFX9-NEXT: v_mov_b32_e32 v23, s10 -; GFX9-NEXT: v_mov_b32_e32 v24, s8 -; GFX9-NEXT: v_mov_b32_e32 v25, s6 -; GFX9-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v20, s40 -; GFX9-NEXT: v_mov_b32_e32 v21, s14 +; GFX9-NEXT: v_mov_b32_e32 v18, s42 +; GFX9-NEXT: v_mov_b32_e32 v19, s40 +; GFX9-NEXT: v_mov_b32_e32 v20, s14 +; GFX9-NEXT: v_mov_b32_e32 v21, s12 +; GFX9-NEXT: v_mov_b32_e32 v22, s10 +; GFX9-NEXT: v_mov_b32_e32 v23, s8 +; GFX9-NEXT: v_mov_b32_e32 v24, s6 ; GFX9-NEXT: .LBB105_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v16, v16, v25, s4 -; GFX9-NEXT: v_perm_b32 v15, v18, v15, s4 +; GFX9-NEXT: v_perm_b32 v17, v17, v24, s4 +; GFX9-NEXT: v_perm_b32 v15, v15, v25, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; GFX9-NEXT: v_or_b32_e32 v15, v15, v17 +; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen +; GFX9-NEXT: v_perm_b32 v15, v16, v62, s4 +; GFX9-NEXT: v_perm_b32 v16, v60, v61, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; GFX9-NEXT: v_or_b32_e32 v15, v15, v16 -; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v15, v59, v60, s4 -; GFX9-NEXT: v_perm_b32 v18, v19, v62, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; GFX9-NEXT: v_perm_b32 v19, v61, v24, s4 -; GFX9-NEXT: v_or_b32_e32 v15, v18, v15 ; GFX9-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v13, v13, v58, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v19 +; GFX9-NEXT: v_perm_b32 v15, v58, v23, s4 +; GFX9-NEXT: v_perm_b32 v13, v13, v59, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v15 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:8 ; GFX9-NEXT: v_perm_b32 v13, v14, v57, s4 @@ -79490,7 +79376,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GFX9-NEXT: v_or_b32_e32 v13, v13, v14 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v13, v45, v23, s4 +; GFX9-NEXT: v_perm_b32 v13, v45, v22, s4 ; GFX9-NEXT: v_perm_b32 v11, v11, v46, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v13 @@ -79500,7 +79386,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX9-NEXT: v_or_b32_e32 v11, v11, v12 ; GFX9-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v11, v40, v22, s4 +; GFX9-NEXT: v_perm_b32 v11, v40, v21, s4 ; GFX9-NEXT: v_perm_b32 v9, v9, v41, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v11 @@ -79510,7 +79396,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX9-NEXT: v_or_b32_e32 v9, v9, v10 ; GFX9-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v9, v51, v21, s4 +; GFX9-NEXT: v_perm_b32 v9, v51, v20, s4 ; GFX9-NEXT: v_perm_b32 v7, v7, v52, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v9 @@ -79520,7 +79406,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v8 ; GFX9-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_perm_b32 v7, v38, v20, s4 +; GFX9-NEXT: v_perm_b32 v7, v38, v19, s4 ; GFX9-NEXT: v_perm_b32 v5, v5, v39, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v7 @@ -79530,10 +79416,19 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX9-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX9-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v5, v33, v18, s4 ; GFX9-NEXT: v_perm_b32 v3, v3, v34, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 +; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48 +; GFX9-NEXT: v_perm_b32 v3, v4, v32, s4 +; GFX9-NEXT: v_perm_b32 v4, v30, v31, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 +; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52 +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX9-NEXT: s_nop 0 +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v1, v1, v29, s4 ; GFX9-NEXT: v_readlane_b32 s30, v63, 14 ; GFX9-NEXT: v_readlane_b32 s31, v63, 15 @@ -79552,25 +79447,14 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: v_readlane_b32 s35, v63, 1 ; GFX9-NEXT: v_readlane_b32 s34, v63, 0 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_perm_b32 v5, v33, v5, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v5 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v3, v4, v32, s4 -; GFX9-NEXT: v_perm_b32 v4, v30, v31, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; GFX9-NEXT: s_nop 0 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_perm_b32 v3, v28, v3, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v3 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 ; GFX9-NEXT: v_perm_b32 v1, v2, v27, s4 -; GFX9-NEXT: v_perm_b32 v2, v17, v26, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v26, s4 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 @@ -79590,7 +79474,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32 ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; GFX9-NEXT: s_or_saveexec_b64 s[4:5], -1 -; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -80740,10 +80624,10 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill @@ -80758,10 +80642,10 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:116 ; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112 ; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:108 -; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:104 -; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:100 -; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:96 -; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:92 +; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:104 +; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:100 +; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:96 +; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:92 ; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:88 ; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:84 ; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:80 @@ -80804,7 +80688,7 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_perm_b32 v13, v35, v34, s6 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_perm_b32 v14, v49, v48, s6 +; VI-NEXT: v_perm_b32 v14, v39, v38, s6 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_perm_b32 v15, v51, v50, s6 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -80828,8 +80712,8 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr49 -; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr51 ; VI-NEXT: ; implicit-def: $vgpr50 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -80838,20 +80722,20 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s6 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_perm_b32 v1, v2, v1, s6 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s6 ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload @@ -80892,7 +80776,7 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v12, v12, v13 ; VI-NEXT: v_perm_b32 v13, v37, v36, s6 ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: v_perm_b32 v14, v39, v38, s6 +; VI-NEXT: v_perm_b32 v14, v49, v48, s6 ; VI-NEXT: v_perm_b32 v16, v32, v54, s6 ; VI-NEXT: v_or_b32_e32 v14, v14, v15 ; VI-NEXT: v_perm_b32 v15, v53, v52, s6 @@ -80947,8 +80831,8 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; implicit-def: $vgpr53 ; VI-NEXT: ; implicit-def: $vgpr52 ; VI-NEXT: ; implicit-def: $vgpr32 @@ -80966,12 +80850,12 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_e32 v1, 3, v51 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v50 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v2, 3, v39 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v38 -; VI-NEXT: v_or_b32_sdwa v14, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: s_waitcnt vmcnt(12) ; VI-NEXT: v_add_u16_e32 v2, 3, v49 ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v48 +; VI-NEXT: v_or_b32_sdwa v14, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(12) +; VI-NEXT: v_add_u16_e32 v2, 3, v39 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v38 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_mov_b32_e32 v3, 0x300 ; VI-NEXT: v_add_u16_sdwa v32, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -81102,15 +80986,15 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v2, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v0, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; VI-NEXT: v_or_b32_sdwa v19, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v0, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -81196,14 +81080,14 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:116 ; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 ; GFX9-NEXT: v_mov_b32_e32 v19, v12 -; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill @@ -81246,13 +81130,13 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(18) ; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v5 ; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_lshlrev_b16_e32 v37, 8, v6 +; GFX9-NEXT: v_lshlrev_b16_e32 v35, 8, v6 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_lshlrev_b16_e32 v51, 8, v7 +; GFX9-NEXT: v_lshlrev_b16_e32 v50, 8, v7 ; GFX9-NEXT: s_waitcnt vmcnt(15) -; GFX9-NEXT: v_lshlrev_b16_e32 v35, 8, v8 +; GFX9-NEXT: v_lshlrev_b16_e32 v37, 8, v8 ; GFX9-NEXT: s_waitcnt vmcnt(14) -; GFX9-NEXT: v_lshlrev_b16_e32 v50, 8, v9 +; GFX9-NEXT: v_lshlrev_b16_e32 v51, 8, v9 ; GFX9-NEXT: s_waitcnt vmcnt(13) ; GFX9-NEXT: v_lshlrev_b16_e32 v49, 8, v10 ; GFX9-NEXT: s_waitcnt vmcnt(12) @@ -81276,7 +81160,7 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_or_b32_sdwa v11, v55, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v12, v42, v41, s6 -; GFX9-NEXT: v_or_b32_sdwa v13, v43, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v13, v43, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v14, v58, v57, s6 ; GFX9-NEXT: v_or_b32_sdwa v15, v34, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: ; implicit-def: $vgpr22 @@ -81297,7 +81181,7 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr34 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v0, v1, v0, s6 @@ -81305,22 +81189,22 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v0, v1, v0, s7 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: v_perm_b32 v1, v3, v2, s7 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s7 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload @@ -81354,11 +81238,11 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v9, v9, v10, s7 ; GFX9-NEXT: v_or_b32_sdwa v10, v48, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v10, v11, v10, s7 -; GFX9-NEXT: v_or_b32_sdwa v11, v40, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v11, v40, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v11, v11, v12, s7 -; GFX9-NEXT: v_or_b32_sdwa v12, v44, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v12, v44, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v12, v13, v12, s7 -; GFX9-NEXT: v_or_b32_sdwa v13, v46, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v13, v46, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v13, v13, v14, s7 ; GFX9-NEXT: v_or_b32_sdwa v14, v31, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v14, v15, v14, s7 @@ -81415,9 +81299,9 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: .LBB106_2: ; %Flow @@ -81439,24 +81323,24 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v46 -; GFX9-NEXT: v_or_b32_sdwa v0, v50, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_or_b32_sdwa v0, v51, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v3, 3, v34 ; GFX9-NEXT: v_add_u16_e32 v34, 0x300, v0 ; GFX9-NEXT: s_waitcnt vmcnt(4) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v44 -; GFX9-NEXT: v_or_b32_sdwa v0, v51, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_or_b32_sdwa v0, v50, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v43 -; GFX9-NEXT: v_or_b32_sdwa v0, v35, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v0 +; GFX9-NEXT: v_or_b32_sdwa v0, v37, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v0 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v42 ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v41 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v40 -; GFX9-NEXT: v_or_b32_sdwa v0, v37, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v0 +; GFX9-NEXT: v_or_b32_sdwa v0, v35, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v48 ; GFX9-NEXT: v_or_b32_sdwa v0, v38, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v0 @@ -81518,8 +81402,8 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v8, v39, v8, s6 ; GFX9-NEXT: v_perm_b32 v9, v38, v9, s6 ; GFX9-NEXT: v_perm_b32 v10, v33, v10, s6 -; GFX9-NEXT: v_perm_b32 v11, v37, v11, s6 -; GFX9-NEXT: v_perm_b32 v12, v35, v12, s6 +; GFX9-NEXT: v_perm_b32 v11, v35, v11, s6 +; GFX9-NEXT: v_perm_b32 v12, v37, v12, s6 ; GFX9-NEXT: v_perm_b32 v13, v34, v13, s6 ; GFX9-NEXT: v_perm_b32 v14, v32, v14, s6 ; GFX9-NEXT: v_perm_b32 v15, v31, v15, s6 @@ -81560,16 +81444,16 @@ define <32 x half> @bitcast_v64i8_to_v32f16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v2, v18, v2, s6 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 @@ -82468,660 +82352,701 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 ; SI-NEXT: ; implicit-def: $vgpr44 : SGPR spill to VGPR lane -; SI-NEXT: v_readfirstlane_b32 s4, v16 -; SI-NEXT: v_writelane_b32 v44, s23, 0 -; SI-NEXT: v_writelane_b32 v44, s22, 1 -; SI-NEXT: v_writelane_b32 v44, s21, 2 -; SI-NEXT: v_writelane_b32 v44, s20, 3 -; SI-NEXT: v_writelane_b32 v44, s4, 4 -; SI-NEXT: s_mov_b32 s82, s29 -; SI-NEXT: s_mov_b32 s85, s25 -; SI-NEXT: s_mov_b32 s29, s24 -; SI-NEXT: s_mov_b32 s44, s16 -; SI-NEXT: v_readfirstlane_b32 s64, v30 -; SI-NEXT: v_readfirstlane_b32 s55, v29 -; SI-NEXT: v_readfirstlane_b32 s66, v28 -; SI-NEXT: v_readfirstlane_b32 s69, v27 -; SI-NEXT: v_readfirstlane_b32 s68, v26 -; SI-NEXT: v_readfirstlane_b32 s39, v25 -; SI-NEXT: v_readfirstlane_b32 s50, v24 -; SI-NEXT: v_readfirstlane_b32 s65, v23 -; SI-NEXT: v_readfirstlane_b32 s51, v22 -; SI-NEXT: v_readfirstlane_b32 s37, v21 -; SI-NEXT: v_readfirstlane_b32 s53, v20 -; SI-NEXT: v_readfirstlane_b32 s88, v19 -; SI-NEXT: v_readfirstlane_b32 s31, v18 -; SI-NEXT: v_readfirstlane_b32 s95, v17 -; SI-NEXT: v_readfirstlane_b32 s48, v15 -; SI-NEXT: v_readfirstlane_b32 s35, v14 -; SI-NEXT: v_readfirstlane_b32 s34, v13 -; SI-NEXT: v_readfirstlane_b32 s52, v12 -; SI-NEXT: v_readfirstlane_b32 s16, v11 -; SI-NEXT: v_readfirstlane_b32 s96, v10 -; SI-NEXT: v_readfirstlane_b32 s20, v9 -; SI-NEXT: v_readfirstlane_b32 s89, v8 -; SI-NEXT: v_readfirstlane_b32 s92, v7 -; SI-NEXT: v_readfirstlane_b32 s91, v6 -; SI-NEXT: v_readfirstlane_b32 s93, v5 -; SI-NEXT: v_readfirstlane_b32 s30, v4 -; SI-NEXT: v_readfirstlane_b32 s38, v3 -; SI-NEXT: v_readfirstlane_b32 s49, v2 -; SI-NEXT: v_readfirstlane_b32 s54, v1 -; SI-NEXT: v_readfirstlane_b32 s90, v0 +; SI-NEXT: s_mov_b32 s92, s26 +; SI-NEXT: v_writelane_b32 v44, s25, 0 +; SI-NEXT: v_writelane_b32 v44, s24, 1 +; SI-NEXT: v_writelane_b32 v44, s19, 2 +; SI-NEXT: s_mov_b32 s93, s27 +; SI-NEXT: s_mov_b32 s79, s21 +; SI-NEXT: s_mov_b32 s89, s20 +; SI-NEXT: s_mov_b32 s78, s18 +; SI-NEXT: s_mov_b32 s88, s17 +; SI-NEXT: s_mov_b32 s90, s16 +; SI-NEXT: v_readfirstlane_b32 s84, v30 +; SI-NEXT: v_readfirstlane_b32 s38, v29 +; SI-NEXT: v_readfirstlane_b32 s74, v28 +; SI-NEXT: v_readfirstlane_b32 s44, v27 +; SI-NEXT: v_readfirstlane_b32 s96, v26 +; SI-NEXT: v_readfirstlane_b32 s67, v25 +; SI-NEXT: v_readfirstlane_b32 s68, v24 +; SI-NEXT: v_readfirstlane_b32 s70, v23 +; SI-NEXT: v_readfirstlane_b32 s71, v22 +; SI-NEXT: v_readfirstlane_b32 s53, v21 +; SI-NEXT: v_readfirstlane_b32 s55, v20 +; SI-NEXT: v_readfirstlane_b32 s51, v19 +; SI-NEXT: v_readfirstlane_b32 s83, v18 +; SI-NEXT: v_readfirstlane_b32 s48, v17 +; SI-NEXT: v_readfirstlane_b32 s50, v16 +; SI-NEXT: v_readfirstlane_b32 s69, v15 +; SI-NEXT: v_readfirstlane_b32 s82, v14 +; SI-NEXT: v_readfirstlane_b32 s65, v13 +; SI-NEXT: v_readfirstlane_b32 s98, v12 +; SI-NEXT: v_readfirstlane_b32 s85, v11 +; SI-NEXT: v_readfirstlane_b32 s52, v10 +; SI-NEXT: v_readfirstlane_b32 s37, v9 +; SI-NEXT: v_readfirstlane_b32 s25, v8 +; SI-NEXT: v_readfirstlane_b32 s94, v7 +; SI-NEXT: v_readfirstlane_b32 s39, v6 +; SI-NEXT: v_readfirstlane_b32 s30, v5 +; SI-NEXT: v_readfirstlane_b32 s49, v4 +; SI-NEXT: v_readfirstlane_b32 s36, v3 +; SI-NEXT: v_readfirstlane_b32 s66, v2 +; SI-NEXT: v_readfirstlane_b32 s95, v1 +; SI-NEXT: v_readfirstlane_b32 s31, v0 ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 +; SI-NEXT: v_readfirstlane_b32 s14, v32 +; SI-NEXT: v_writelane_b32 v44, s14, 3 +; SI-NEXT: v_readfirstlane_b32 s26, v34 ; SI-NEXT: s_and_b64 s[4:5], vcc, exec -; SI-NEXT: v_readfirstlane_b32 s56, v32 -; SI-NEXT: v_readfirstlane_b32 s86, v33 -; SI-NEXT: v_readfirstlane_b32 s58, v34 -; SI-NEXT: v_readfirstlane_b32 s99, v35 -; SI-NEXT: v_readfirstlane_b32 s24, v36 +; SI-NEXT: v_readfirstlane_b32 s61, v33 +; SI-NEXT: v_readfirstlane_b32 s40, v35 +; SI-NEXT: v_readfirstlane_b32 s18, v36 ; SI-NEXT: s_waitcnt vmcnt(13) -; SI-NEXT: v_readfirstlane_b32 s78, v37 +; SI-NEXT: v_readfirstlane_b32 s58, v37 ; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_readfirstlane_b32 s25, v38 +; SI-NEXT: v_readfirstlane_b32 s19, v38 ; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_readfirstlane_b32 s21, v39 +; SI-NEXT: v_readfirstlane_b32 s35, v39 ; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_readfirstlane_b32 s22, v48 +; SI-NEXT: v_readfirstlane_b32 s57, v48 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_readfirstlane_b32 s23, v49 +; SI-NEXT: v_readfirstlane_b32 s81, v49 ; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_readfirstlane_b32 s87, v50 +; SI-NEXT: v_readfirstlane_b32 s45, v50 +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_readfirstlane_b32 s47, v51 ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_readfirstlane_b32 s47, v52 -; SI-NEXT: v_readfirstlane_b32 s83, v51 +; SI-NEXT: v_readfirstlane_b32 s59, v52 ; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_readfirstlane_b32 s84, v53 +; SI-NEXT: v_readfirstlane_b32 s80, v53 ; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_readfirstlane_b32 s36, v54 +; SI-NEXT: v_readfirstlane_b32 s34, v54 ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_readfirstlane_b32 s79, v55 +; SI-NEXT: v_readfirstlane_b32 s64, v55 ; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_readfirstlane_b32 s71, v40 +; SI-NEXT: v_readfirstlane_b32 s54, v40 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_readfirstlane_b32 s98, v41 +; SI-NEXT: v_readfirstlane_b32 s97, v41 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_readfirstlane_b32 s81, v42 -; SI-NEXT: v_writelane_b32 v44, s47, 5 -; SI-NEXT: v_writelane_b32 v44, s58, 6 +; SI-NEXT: v_readfirstlane_b32 s99, v42 +; SI-NEXT: v_writelane_b32 v44, s26, 4 +; SI-NEXT: v_writelane_b32 v44, s40, 5 ; SI-NEXT: s_cbranch_scc0 .LBB107_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s4, s44, 0xff -; SI-NEXT: s_lshl_b32 s5, s17, 8 -; SI-NEXT: s_or_b32 s12, s4, s5 -; SI-NEXT: s_and_b32 s4, s18, 0xff -; SI-NEXT: s_lshl_b32 s4, s4, 16 -; SI-NEXT: s_lshl_b32 s5, s19, 24 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s29, 0xff -; SI-NEXT: s_lshl_b32 s6, s85, 8 -; SI-NEXT: s_or_b32 s13, s5, s6 -; SI-NEXT: s_and_b32 s5, s26, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s6, s27, 24 -; SI-NEXT: s_or_b32 s6, s6, s5 -; SI-NEXT: s_and_b32 s5, s49, 0xff -; SI-NEXT: s_lshl_b32 s7, s38, 8 -; SI-NEXT: s_or_b32 s14, s5, s7 -; SI-NEXT: s_and_b32 s5, s30, 0xff +; SI-NEXT: s_and_b32 s4, s90, 0xff +; SI-NEXT: s_lshl_b32 s5, s88, 8 +; SI-NEXT: s_or_b32 s4, s4, s5 +; SI-NEXT: s_and_b32 s5, s78, 0xff +; SI-NEXT: v_readlane_b32 s6, v44, 2 ; SI-NEXT: s_lshl_b32 s5, s5, 16 +; SI-NEXT: s_lshl_b32 s6, s6, 24 +; SI-NEXT: s_or_b32 s76, s6, s5 +; SI-NEXT: v_readlane_b32 s5, v44, 1 +; SI-NEXT: v_readlane_b32 s6, v44, 0 +; SI-NEXT: s_and_b32 s5, s5, 0xff +; SI-NEXT: s_lshl_b32 s6, s6, 8 +; SI-NEXT: s_or_b32 s5, s5, s6 +; SI-NEXT: s_and_b32 s6, s92, 0xff +; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_lshl_b32 s7, s93, 24 -; SI-NEXT: s_or_b32 s8, s7, s5 -; SI-NEXT: s_and_b32 s5, s96, 0xff -; SI-NEXT: s_lshl_b32 s7, s16, 8 -; SI-NEXT: s_or_b32 s15, s5, s7 -; SI-NEXT: s_and_b32 s5, s52, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s34, 24 -; SI-NEXT: s_or_b32 s10, s7, s5 -; SI-NEXT: s_and_b32 s5, s31, 0xff -; SI-NEXT: s_lshl_b32 s7, s88, 8 -; SI-NEXT: s_or_b32 s40, s5, s7 -; SI-NEXT: s_and_b32 s5, s53, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s37, 24 -; SI-NEXT: s_or_b32 s60, s7, s5 -; SI-NEXT: s_and_b32 s5, s68, 0xff -; SI-NEXT: s_lshl_b32 s7, s69, 8 -; SI-NEXT: s_or_b32 s41, s5, s7 -; SI-NEXT: s_and_b32 s5, s66, 0xff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_lshl_b32 s7, s55, 24 -; SI-NEXT: s_or_b32 s62, s7, s5 -; SI-NEXT: s_and_b32 s5, s79, 0xff +; SI-NEXT: s_mov_b32 s17, s78 +; SI-NEXT: s_or_b32 s78, s7, s6 +; SI-NEXT: s_and_b32 s6, s66, 0xff ; SI-NEXT: s_lshl_b32 s7, s36, 8 -; SI-NEXT: s_or_b32 s42, s5, s7 -; SI-NEXT: s_and_b32 s5, s21, 0xff -; SI-NEXT: s_lshl_b32 s7, s25, 8 -; SI-NEXT: s_or_b32 s43, s5, s7 -; SI-NEXT: v_readlane_b32 s5, v44, 3 -; SI-NEXT: v_readlane_b32 s7, v44, 2 -; SI-NEXT: s_and_b32 s5, s5, 0xff -; SI-NEXT: s_lshl_b32 s7, s7, 8 -; SI-NEXT: s_or_b32 s5, s5, s7 -; SI-NEXT: v_readlane_b32 s7, v44, 1 -; SI-NEXT: s_and_b32 s7, s7, 0xff -; SI-NEXT: v_readlane_b32 s9, v44, 0 +; SI-NEXT: s_or_b32 s6, s6, s7 +; SI-NEXT: s_and_b32 s7, s49, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_lshl_b32 s9, s9, 24 -; SI-NEXT: s_or_b32 s57, s9, s7 -; SI-NEXT: s_and_b32 s7, s28, 0xff -; SI-NEXT: s_lshl_b32 s9, s82, 8 -; SI-NEXT: s_or_b32 s7, s7, s9 -; SI-NEXT: s_and_b32 s9, s90, 0xff +; SI-NEXT: s_lshl_b32 s8, s30, 24 +; SI-NEXT: s_mov_b32 s91, s88 +; SI-NEXT: s_or_b32 s88, s8, s7 +; SI-NEXT: s_and_b32 s7, s52, 0xff +; SI-NEXT: s_lshl_b32 s8, s85, 8 +; SI-NEXT: s_or_b32 s7, s7, s8 +; SI-NEXT: s_and_b32 s8, s98, 0xff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_lshl_b32 s9, s65, 24 +; SI-NEXT: s_mov_b32 s63, s90 +; SI-NEXT: s_or_b32 s90, s9, s8 +; SI-NEXT: s_and_b32 s8, s83, 0xff +; SI-NEXT: s_lshl_b32 s9, s51, 8 +; SI-NEXT: s_or_b32 s8, s8, s9 +; SI-NEXT: s_and_b32 s9, s55, 0xff ; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: s_lshl_b32 s11, s54, 24 -; SI-NEXT: s_or_b32 s77, s11, s9 -; SI-NEXT: s_and_b32 s9, s91, 0xff -; SI-NEXT: s_lshl_b32 s11, s92, 8 -; SI-NEXT: s_or_b32 s9, s9, s11 -; SI-NEXT: s_and_b32 s11, s89, 0xff -; SI-NEXT: s_mov_b32 s72, s44 -; SI-NEXT: s_lshl_b32 s11, s11, 16 -; SI-NEXT: s_lshl_b32 s44, s20, 24 -; SI-NEXT: s_mov_b32 s59, s16 -; SI-NEXT: s_or_b32 vcc_lo, s44, s11 -; SI-NEXT: s_and_b32 s11, s35, 0xff -; SI-NEXT: s_lshl_b32 s44, s48, 8 -; SI-NEXT: v_readlane_b32 s16, v44, 4 -; SI-NEXT: s_or_b32 s11, s11, s44 -; SI-NEXT: s_and_b32 s44, s16, 0xff -; SI-NEXT: s_lshl_b32 s44, s44, 16 -; SI-NEXT: s_lshl_b32 s45, s95, 24 -; SI-NEXT: s_or_b32 vcc_hi, s45, s44 -; SI-NEXT: s_and_b32 s44, s51, 0xff -; SI-NEXT: s_lshl_b32 s45, s65, 8 -; SI-NEXT: s_or_b32 s44, s44, s45 -; SI-NEXT: s_and_b32 s45, s50, 0xff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s39, 24 -; SI-NEXT: s_and_b32 s44, s44, 0xffff -; SI-NEXT: s_mov_b32 s67, s20 -; SI-NEXT: s_or_b32 s20, s46, s45 -; SI-NEXT: s_or_b32 s61, s44, s20 -; SI-NEXT: s_and_b32 s44, s64, 0xff -; SI-NEXT: s_lshl_b32 s45, s81, 8 -; SI-NEXT: s_or_b32 s44, s44, s45 -; SI-NEXT: s_and_b32 s45, s98, 0xff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s71, 24 -; SI-NEXT: s_and_b32 s44, s44, 0xffff -; SI-NEXT: s_mov_b32 s70, s39 -; SI-NEXT: s_mov_b32 s39, s91 -; SI-NEXT: s_mov_b32 s91, s82 -; SI-NEXT: s_mov_b32 s82, s88 -; SI-NEXT: s_mov_b32 s88, s18 -; SI-NEXT: s_or_b32 s18, s46, s45 -; SI-NEXT: s_or_b32 s63, s44, s18 -; SI-NEXT: s_and_b32 s44, s83, 0xff -; SI-NEXT: s_lshl_b32 s45, s87, 8 -; SI-NEXT: s_or_b32 s44, s44, s45 -; SI-NEXT: s_and_b32 s45, s23, 0xff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s22, 24 -; SI-NEXT: s_mov_b32 s80, s31 -; SI-NEXT: s_mov_b32 s31, s53 -; SI-NEXT: s_mov_b32 s53, s38 -; SI-NEXT: s_mov_b32 s38, s90 -; SI-NEXT: s_mov_b32 s90, s19 -; SI-NEXT: s_or_b32 s19, s46, s45 -; SI-NEXT: s_and_b32 s45, s84, 0xff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s47, 24 -; SI-NEXT: s_and_b32 s44, s44, 0xffff -; SI-NEXT: s_mov_b32 s97, s22 -; SI-NEXT: s_mov_b32 s22, s55 -; SI-NEXT: s_mov_b32 s55, s49 -; SI-NEXT: s_mov_b32 s49, s92 -; SI-NEXT: s_mov_b32 s92, s72 -; SI-NEXT: s_or_b32 s72, s46, s45 -; SI-NEXT: s_or_b32 s73, s44, s19 -; SI-NEXT: s_and_b32 s44, s99, 0xff -; SI-NEXT: s_lshl_b32 s45, s58, 8 -; SI-NEXT: s_or_b32 s44, s44, s45 -; SI-NEXT: s_and_b32 s45, s86, 0xff -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s56, 24 -; SI-NEXT: s_or_b32 s5, s5, s57 -; SI-NEXT: s_mov_b32 s76, s56 -; SI-NEXT: s_mov_b32 s56, s86 -; SI-NEXT: s_mov_b32 s86, s81 -; SI-NEXT: s_mov_b32 s81, s65 -; SI-NEXT: s_mov_b32 s65, s48 -; SI-NEXT: s_mov_b32 s48, s89 -; SI-NEXT: s_mov_b32 s89, s17 -; SI-NEXT: s_or_b32 s17, s46, s45 -; SI-NEXT: s_and_b32 s44, s44, 0xffff -; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: v_writelane_b32 v44, s68, 11 -; SI-NEXT: s_mov_b32 s94, s51 -; SI-NEXT: s_mov_b32 s51, s95 -; SI-NEXT: s_mov_b32 s95, s27 -; SI-NEXT: s_or_b32 s75, s44, s17 -; SI-NEXT: s_mov_b32 s44, s93 -; SI-NEXT: s_mov_b32 s93, s28 -; SI-NEXT: s_and_b32 s28, s42, 0xffff -; SI-NEXT: s_and_b32 s27, s43, 0xffff -; SI-NEXT: s_or_b32 s42, s12, s4 -; SI-NEXT: s_mov_b32 s43, s5 -; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16 -; SI-NEXT: s_or_b32 s9, s9, vcc_lo -; SI-NEXT: s_and_b32 s45, s78, 0xff -; SI-NEXT: v_writelane_b32 v44, s4, 7 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s45, s45, 16 -; SI-NEXT: s_lshl_b32 s46, s24, 24 -; SI-NEXT: v_writelane_b32 v44, s5, 8 -; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 16 -; SI-NEXT: s_or_b32 s7, s7, s77 -; SI-NEXT: s_or_b32 s11, s11, vcc_hi -; SI-NEXT: s_mov_b32 s68, s34 -; SI-NEXT: s_or_b32 s74, s46, s45 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_and_b32 s58, s15, 0xffff -; SI-NEXT: s_and_b32 s16, s40, 0xffff -; SI-NEXT: s_mov_b32 s34, s29 -; SI-NEXT: s_and_b32 s29, s41, 0xffff -; SI-NEXT: v_writelane_b32 v44, s4, 9 -; SI-NEXT: s_mov_b32 s45, s78 -; SI-NEXT: s_mov_b32 s78, s84 -; SI-NEXT: s_mov_b32 s84, s69 -; SI-NEXT: s_mov_b32 s69, s59 -; SI-NEXT: s_or_b32 s40, s13, s6 -; SI-NEXT: s_mov_b32 s41, s7 -; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 -; SI-NEXT: s_or_b32 s14, s14, s8 -; SI-NEXT: s_mov_b32 s15, s9 -; SI-NEXT: v_writelane_b32 v44, s5, 10 -; SI-NEXT: s_or_b32 s12, s58, s10 -; SI-NEXT: s_mov_b32 s13, s11 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 -; SI-NEXT: s_or_b32 s10, s16, s60 -; SI-NEXT: s_mov_b32 s11, s61 -; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16 -; SI-NEXT: s_or_b32 s8, s29, s62 -; SI-NEXT: s_mov_b32 s9, s63 -; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16 -; SI-NEXT: s_or_b32 s6, s28, s72 -; SI-NEXT: s_mov_b32 s7, s73 -; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16 -; SI-NEXT: s_or_b32 s4, s27, s74 -; SI-NEXT: s_mov_b32 s5, s75 -; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16 -; SI-NEXT: s_mov_b32 s29, s34 -; SI-NEXT: s_mov_b32 s16, s69 -; SI-NEXT: s_mov_b32 s69, s84 -; SI-NEXT: s_mov_b32 s84, s78 -; SI-NEXT: s_mov_b32 s78, s45 -; SI-NEXT: s_mov_b32 s28, s93 -; SI-NEXT: s_mov_b32 s93, s44 -; SI-NEXT: s_lshr_b32 s47, s57, 16 -; SI-NEXT: s_lshr_b32 s57, s77, 16 -; SI-NEXT: s_lshr_b32 s59, vcc_lo, 16 -; SI-NEXT: s_lshr_b32 s61, vcc_hi, 16 -; SI-NEXT: s_lshr_b32 s63, s20, 16 -; SI-NEXT: s_mov_b32 s20, s67 -; SI-NEXT: s_mov_b32 s34, s68 -; SI-NEXT: v_readlane_b32 s68, v44, 11 -; SI-NEXT: s_lshr_b32 s73, s18, 16 -; SI-NEXT: s_mov_b32 s18, s88 -; SI-NEXT: s_mov_b32 s27, s95 -; SI-NEXT: s_mov_b32 s95, s51 -; SI-NEXT: s_mov_b32 s51, s94 -; SI-NEXT: s_mov_b32 s88, s82 -; SI-NEXT: s_mov_b32 s82, s91 -; SI-NEXT: s_mov_b32 s91, s39 -; SI-NEXT: s_mov_b32 s39, s70 -; SI-NEXT: s_lshr_b32 s75, s19, 16 -; SI-NEXT: s_mov_b32 s19, s90 -; SI-NEXT: s_mov_b32 s90, s38 -; SI-NEXT: s_mov_b32 s38, s53 -; SI-NEXT: s_mov_b32 s53, s31 -; SI-NEXT: s_mov_b32 s44, s92 -; SI-NEXT: s_mov_b32 s92, s49 -; SI-NEXT: s_mov_b32 s49, s55 -; SI-NEXT: s_mov_b32 s55, s22 -; SI-NEXT: s_mov_b32 s31, s80 -; SI-NEXT: s_mov_b32 s22, s97 -; SI-NEXT: s_lshr_b32 s45, s17, 16 -; SI-NEXT: s_mov_b32 s17, s89 -; SI-NEXT: s_mov_b32 s89, s48 -; SI-NEXT: s_mov_b32 s48, s65 -; SI-NEXT: s_mov_b32 s65, s81 -; SI-NEXT: s_mov_b32 s81, s86 -; SI-NEXT: s_mov_b32 s86, s56 -; SI-NEXT: s_mov_b32 s56, s76 +; SI-NEXT: s_lshl_b32 s10, s53, 24 +; SI-NEXT: s_mov_b32 vcc_hi, s92 +; SI-NEXT: s_or_b32 s92, s10, s9 +; SI-NEXT: s_and_b32 s9, s96, 0xff +; SI-NEXT: s_lshl_b32 s10, s44, 8 +; SI-NEXT: s_or_b32 s9, s9, s10 +; SI-NEXT: s_and_b32 s10, s74, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s11, s38, 24 +; SI-NEXT: s_or_b32 s16, s11, s10 +; SI-NEXT: s_and_b32 s10, s64, 0xff +; SI-NEXT: s_lshl_b32 s11, s34, 8 +; SI-NEXT: s_or_b32 s77, s10, s11 +; SI-NEXT: s_and_b32 s10, s80, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s59, 24 +; SI-NEXT: s_or_b32 vcc_lo, s12, s10 +; SI-NEXT: s_and_b32 s10, s35, 0xff +; SI-NEXT: s_lshl_b32 s12, s19, 8 +; SI-NEXT: s_or_b32 s87, s10, s12 +; SI-NEXT: s_and_b32 s10, s58, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s18, 24 +; SI-NEXT: s_mov_b32 s46, s98 +; SI-NEXT: s_mov_b32 s98, s30 +; SI-NEXT: s_or_b32 s30, s12, s10 +; SI-NEXT: s_and_b32 s10, s89, 0xff +; SI-NEXT: s_lshl_b32 s12, s79, 8 +; SI-NEXT: s_or_b32 s15, s10, s12 +; SI-NEXT: s_and_b32 s10, s22, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s23, 24 +; SI-NEXT: s_or_b32 s41, s12, s10 +; SI-NEXT: s_and_b32 s10, s28, 0xff +; SI-NEXT: s_lshl_b32 s12, s29, 8 +; SI-NEXT: s_or_b32 s43, s10, s12 +; SI-NEXT: s_and_b32 s10, s31, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s95, 24 +; SI-NEXT: s_mov_b32 s21, s51 +; SI-NEXT: s_mov_b32 s51, s55 +; SI-NEXT: s_mov_b32 s55, s36 +; SI-NEXT: s_or_b32 s36, s12, s10 +; SI-NEXT: s_and_b32 s10, s39, 0xff +; SI-NEXT: s_lshl_b32 s12, s94, 8 +; SI-NEXT: s_or_b32 s24, s10, s12 +; SI-NEXT: s_and_b32 s10, s25, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s37, 24 +; SI-NEXT: s_mov_b32 s27, s38 +; SI-NEXT: s_or_b32 s38, s12, s10 +; SI-NEXT: s_and_b32 s10, s82, 0xff +; SI-NEXT: s_lshl_b32 s12, s69, 8 +; SI-NEXT: s_mov_b32 s60, s83 +; SI-NEXT: s_mov_b32 s83, s66 +; SI-NEXT: s_mov_b32 s66, s94 +; SI-NEXT: s_mov_b32 s94, s25 +; SI-NEXT: s_or_b32 s25, s10, s12 +; SI-NEXT: s_and_b32 s10, s50, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s48, 24 +; SI-NEXT: s_mov_b32 s13, s65 +; SI-NEXT: s_mov_b32 s65, s37 +; SI-NEXT: s_or_b32 s37, s12, s10 +; SI-NEXT: s_and_b32 s10, s71, 0xff +; SI-NEXT: s_lshl_b32 s12, s70, 8 +; SI-NEXT: s_mov_b32 s75, s19 +; SI-NEXT: s_mov_b32 s19, s44 +; SI-NEXT: s_or_b32 s44, s10, s12 +; SI-NEXT: s_and_b32 s10, s68, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s67, 24 +; SI-NEXT: s_mov_b32 s73, s18 +; SI-NEXT: s_mov_b32 s18, s34 +; SI-NEXT: s_mov_b32 s34, s53 +; SI-NEXT: s_mov_b32 s53, s71 +; SI-NEXT: s_mov_b32 s71, s48 +; SI-NEXT: s_or_b32 s48, s12, s10 +; SI-NEXT: s_and_b32 s10, s84, 0xff +; SI-NEXT: s_lshl_b32 s12, s99, 8 +; SI-NEXT: s_or_b32 s62, s10, s12 +; SI-NEXT: s_and_b32 s10, s97, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s54, 24 +; SI-NEXT: s_mov_b32 s11, s29 +; SI-NEXT: s_mov_b32 s29, s97 +; SI-NEXT: s_mov_b32 s97, s85 +; SI-NEXT: s_mov_b32 s85, s68 +; SI-NEXT: s_mov_b32 s68, s67 +; SI-NEXT: s_mov_b32 s67, s39 +; SI-NEXT: s_or_b32 s39, s12, s10 +; SI-NEXT: s_and_b32 s10, s47, 0xff +; SI-NEXT: s_lshl_b32 s12, s45, 8 +; SI-NEXT: s_or_b32 s72, s10, s12 +; SI-NEXT: s_and_b32 s10, s81, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s57, 24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_mov_b32 s20, s84 +; SI-NEXT: s_mov_b32 s84, s82 +; SI-NEXT: s_mov_b32 s82, s50 +; SI-NEXT: s_or_b32 s50, s12, s10 +; SI-NEXT: s_and_b32 s10, s40, 0xff +; SI-NEXT: s_lshl_b32 s12, s26, 8 +; SI-NEXT: s_or_b32 s42, s4, s76 +; SI-NEXT: s_and_b32 s4, s5, 0xffff +; SI-NEXT: s_mov_b32 s56, s74 +; SI-NEXT: s_or_b32 s74, s10, s12 +; SI-NEXT: s_and_b32 s10, s61, 0xff +; SI-NEXT: s_or_b32 s40, s4, s78 +; SI-NEXT: s_and_b32 s4, s6, 0xffff +; SI-NEXT: s_lshl_b32 s10, s10, 16 +; SI-NEXT: s_lshl_b32 s12, s14, 24 +; SI-NEXT: s_or_b32 s14, s4, s88 +; SI-NEXT: s_and_b32 s4, s7, 0xffff +; SI-NEXT: s_mov_b32 s26, s54 +; SI-NEXT: s_mov_b32 s54, s96 +; SI-NEXT: s_mov_b32 s96, s52 +; SI-NEXT: s_mov_b32 s52, s70 +; SI-NEXT: s_mov_b32 s70, s49 +; SI-NEXT: s_or_b32 s49, s12, s10 +; SI-NEXT: s_or_b32 s12, s4, s90 +; SI-NEXT: s_and_b32 s4, s8, 0xffff +; SI-NEXT: s_or_b32 s10, s4, s92 +; SI-NEXT: s_and_b32 s4, s9, 0xffff +; SI-NEXT: s_and_b32 s5, s15, 0xffff +; SI-NEXT: s_or_b32 s8, s4, s16 +; SI-NEXT: s_and_b32 s4, s77, 0xffff +; SI-NEXT: s_or_b32 s77, s5, s41 +; SI-NEXT: s_or_b32 s6, s4, vcc_lo +; SI-NEXT: s_and_b32 s4, s87, 0xffff +; SI-NEXT: s_lshr_b64 s[86:87], s[76:77], 16 +; SI-NEXT: s_and_b32 s5, s43, 0xffff +; SI-NEXT: v_writelane_b32 v44, s86, 6 +; SI-NEXT: s_mov_b32 s7, s79 +; SI-NEXT: s_or_b32 s79, s5, s36 +; SI-NEXT: v_writelane_b32 v44, s87, 7 +; SI-NEXT: s_lshr_b64 s[86:87], s[78:79], 16 +; SI-NEXT: s_and_b32 s5, s24, 0xffff +; SI-NEXT: v_writelane_b32 v44, s86, 8 +; SI-NEXT: s_mov_b32 s9, s89 +; SI-NEXT: s_or_b32 s89, s5, s38 +; SI-NEXT: s_and_b32 s5, s25, 0xffff +; SI-NEXT: v_writelane_b32 v44, s87, 9 +; SI-NEXT: s_lshr_b64 s[86:87], s[88:89], 16 +; SI-NEXT: s_mov_b32 s88, s91 +; SI-NEXT: s_or_b32 s91, s5, s37 +; SI-NEXT: s_and_b32 s5, s44, 0xffff +; SI-NEXT: s_mov_b32 s76, s93 +; SI-NEXT: s_or_b32 s93, s5, s48 +; SI-NEXT: s_and_b32 s5, s62, 0xffff +; SI-NEXT: s_mov_b32 s78, s17 +; SI-NEXT: v_writelane_b32 v44, s86, 10 +; SI-NEXT: s_or_b32 s17, s5, s39 +; SI-NEXT: v_writelane_b32 v44, s87, 11 +; SI-NEXT: s_lshr_b64 s[24:25], s[90:91], 16 +; SI-NEXT: s_mov_b32 s90, s63 +; SI-NEXT: s_lshr_b64 s[62:63], s[16:17], 16 +; SI-NEXT: s_and_b32 s5, s72, 0xffff +; SI-NEXT: s_lshr_b64 s[86:87], s[92:93], 16 +; SI-NEXT: s_mov_b32 s92, vcc_hi +; SI-NEXT: v_writelane_b32 v44, s62, 12 +; SI-NEXT: s_or_b32 vcc_hi, s5, s50 +; SI-NEXT: v_writelane_b32 v44, s63, 13 +; SI-NEXT: s_lshr_b64 s[62:63], vcc, 16 +; SI-NEXT: s_and_b32 s5, s74, 0xffff +; SI-NEXT: v_writelane_b32 v44, s62, 14 +; SI-NEXT: s_mov_b32 vcc_lo, s31 +; SI-NEXT: s_or_b32 s31, s5, s49 +; SI-NEXT: v_writelane_b32 v44, s63, 15 +; SI-NEXT: s_lshr_b64 s[62:63], s[30:31], 16 +; SI-NEXT: v_writelane_b32 v44, s62, 16 +; SI-NEXT: s_or_b32 s4, s4, s30 +; SI-NEXT: v_writelane_b32 v44, s63, 17 +; SI-NEXT: s_mov_b32 s30, s98 +; SI-NEXT: s_mov_b32 s98, s46 +; SI-NEXT: s_mov_b32 s74, s56 +; SI-NEXT: s_lshr_b32 s46, s41, 16 +; SI-NEXT: s_lshr_b32 s56, s36, 16 +; SI-NEXT: s_mov_b32 s36, s55 +; SI-NEXT: s_mov_b32 s55, s51 +; SI-NEXT: s_mov_b32 s51, s21 +; SI-NEXT: s_lshr_b32 s87, s38, 16 +; SI-NEXT: s_mov_b32 s25, s94 +; SI-NEXT: s_mov_b32 s94, s66 +; SI-NEXT: s_mov_b32 s66, s83 +; SI-NEXT: s_mov_b32 s83, s60 +; SI-NEXT: s_mov_b32 s38, s27 +; SI-NEXT: s_mov_b32 s44, s19 +; SI-NEXT: s_mov_b32 s19, s75 +; SI-NEXT: s_lshr_b32 s60, s37, 16 +; SI-NEXT: s_mov_b32 s37, s65 +; SI-NEXT: s_mov_b32 s65, s13 +; SI-NEXT: s_lshr_b32 s63, s48, 16 +; SI-NEXT: s_mov_b32 s48, s71 +; SI-NEXT: s_mov_b32 s71, s53 +; SI-NEXT: s_mov_b32 s53, s34 +; SI-NEXT: s_mov_b32 s34, s18 +; SI-NEXT: s_mov_b32 s18, s73 +; SI-NEXT: s_lshr_b32 s73, s39, 16 +; SI-NEXT: s_mov_b32 s39, s67 +; SI-NEXT: s_mov_b32 s67, s68 +; SI-NEXT: s_mov_b32 s68, s85 +; SI-NEXT: s_mov_b32 s85, s97 +; SI-NEXT: s_mov_b32 s97, s29 +; SI-NEXT: s_lshr_b32 s75, s50, 16 +; SI-NEXT: s_mov_b32 s50, s82 +; SI-NEXT: s_mov_b32 s82, s84 +; SI-NEXT: s_mov_b32 s84, s20 +; SI-NEXT: s_lshr_b32 s21, s49, 16 +; SI-NEXT: s_mov_b32 s49, s70 +; SI-NEXT: s_mov_b32 s70, s52 +; SI-NEXT: s_mov_b32 s52, s96 +; SI-NEXT: s_mov_b32 s96, s54 +; SI-NEXT: s_mov_b32 s54, s26 +; SI-NEXT: s_mov_b32 s43, s77 +; SI-NEXT: s_mov_b32 s41, s79 +; SI-NEXT: s_mov_b32 s79, s7 +; SI-NEXT: s_mov_b32 s15, s89 +; SI-NEXT: s_mov_b32 s89, s9 +; SI-NEXT: s_mov_b32 s13, s91 +; SI-NEXT: s_mov_b32 s29, s11 +; SI-NEXT: s_mov_b32 s11, s93 +; SI-NEXT: s_mov_b32 s93, s76 +; SI-NEXT: s_mov_b32 s9, s17 +; SI-NEXT: s_mov_b32 s7, vcc_hi +; SI-NEXT: s_mov_b32 s5, s31 +; SI-NEXT: s_mov_b32 s31, vcc_lo ; SI-NEXT: s_mov_b64 s[76:77], 0 ; SI-NEXT: s_branch .LBB107_3 ; SI-NEXT: .LBB107_2: ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr16 ; SI-NEXT: s_mov_b64 s[76:77], -1 -; SI-NEXT: v_writelane_b32 v44, s4, 7 -; SI-NEXT: v_writelane_b32 v44, s5, 8 +; SI-NEXT: v_writelane_b32 v44, s4, 6 +; SI-NEXT: v_writelane_b32 v44, s5, 7 ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr47 -; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr57 +; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr59 +; SI-NEXT: ; implicit-def: $sgpr87 ; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr61 -; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr24 ; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr86 ; SI-NEXT: ; implicit-def: $sgpr63 ; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr73 ; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr75 -; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr45 -; SI-NEXT: v_writelane_b32 v44, s4, 9 -; SI-NEXT: v_writelane_b32 v44, s5, 10 +; SI-NEXT: ; implicit-def: $sgpr21 +; SI-NEXT: v_writelane_b32 v44, s4, 8 +; SI-NEXT: v_writelane_b32 v44, s5, 9 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v44, s4, 10 +; SI-NEXT: v_writelane_b32 v44, s5, 11 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v44, s4, 12 +; SI-NEXT: v_writelane_b32 v44, s5, 13 ; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v44, s4, 14 +; SI-NEXT: v_writelane_b32 v44, s5, 15 +; SI-NEXT: v_writelane_b32 v44, s16, 16 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v44, s17, 17 ; SI-NEXT: .LBB107_3: ; %Flow +; SI-NEXT: v_readlane_b32 s16, v44, 6 +; SI-NEXT: v_readlane_b32 s17, v44, 7 +; SI-NEXT: s_mov_b32 s26, s16 +; SI-NEXT: v_readlane_b32 s16, v44, 8 +; SI-NEXT: v_readlane_b32 s17, v44, 9 +; SI-NEXT: s_mov_b32 s62, s16 +; SI-NEXT: v_readlane_b32 s16, v44, 10 ; SI-NEXT: s_andn2_b64 vcc, exec, s[76:77] -; SI-NEXT: v_readlane_b32 s76, v44, 7 -; SI-NEXT: v_readlane_b32 s77, v44, 8 +; SI-NEXT: s_mov_b32 s72, s16 +; SI-NEXT: v_readlane_b32 s76, v44, 12 +; SI-NEXT: v_readlane_b32 s17, v44, 11 +; SI-NEXT: v_readlane_b32 s77, v44, 13 ; SI-NEXT: s_cbranch_vccnz .LBB107_5 ; SI-NEXT: ; %bb.4: ; %cmp.true -; SI-NEXT: s_add_i32 s21, s21, 3 -; SI-NEXT: s_and_b32 s4, s21, 0xff -; SI-NEXT: s_lshl_b32 s5, s25, 8 -; SI-NEXT: s_add_i32 s78, s78, 3 +; SI-NEXT: s_add_i32 s35, s35, 3 +; SI-NEXT: s_and_b32 s4, s35, 0xff +; SI-NEXT: s_lshl_b32 s5, s19, 8 +; SI-NEXT: s_add_i32 s27, s58, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s6, s78, 0xff +; SI-NEXT: s_and_b32 s6, s27, 0xff ; SI-NEXT: s_addk_i32 s4, 0x300 -; SI-NEXT: s_lshl_b32 s5, s24, 24 +; SI-NEXT: s_lshl_b32 s5, s18, 24 ; SI-NEXT: s_lshl_b32 s6, s6, 16 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: s_or_b32 s5, s5, s6 -; SI-NEXT: s_add_i32 s99, s99, 3 -; SI-NEXT: v_readlane_b32 s6, v44, 6 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s99, 0xff +; SI-NEXT: v_readlane_b32 s5, v44, 5 +; SI-NEXT: s_add_i32 s26, s5, 3 +; SI-NEXT: v_readlane_b32 s6, v44, 4 +; SI-NEXT: s_and_b32 s5, s26, 0xff ; SI-NEXT: s_lshl_b32 s6, s6, 8 -; SI-NEXT: s_add_i32 s86, s86, 3 +; SI-NEXT: s_add_i32 s19, s61, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s7, s86, 0xff +; SI-NEXT: v_readlane_b32 s6, v44, 3 +; SI-NEXT: s_and_b32 s7, s19, 0xff ; SI-NEXT: s_addk_i32 s5, 0x300 -; SI-NEXT: s_lshl_b32 s6, s56, 24 +; SI-NEXT: s_lshl_b32 s6, s6, 24 ; SI-NEXT: s_lshl_b32 s7, s7, 16 ; SI-NEXT: s_and_b32 s5, s5, 0xffff ; SI-NEXT: s_or_b32 s6, s6, s7 -; SI-NEXT: s_add_i32 s97, s79, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s97, 0xff -; SI-NEXT: s_lshl_b32 s7, s36, 8 -; SI-NEXT: s_add_i32 s84, s84, 3 +; SI-NEXT: s_add_i32 s6, s64, 3 +; SI-NEXT: s_and_b32 s6, s6, 0xff +; SI-NEXT: s_lshl_b32 s7, s34, 8 +; SI-NEXT: s_add_i32 s20, s80, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: v_readlane_b32 s7, v44, 5 -; SI-NEXT: s_and_b32 s8, s84, 0xff +; SI-NEXT: s_and_b32 s8, s20, 0xff ; SI-NEXT: s_addk_i32 s6, 0x300 -; SI-NEXT: s_lshl_b32 s7, s7, 24 +; SI-NEXT: s_lshl_b32 s7, s59, 24 ; SI-NEXT: s_lshl_b32 s8, s8, 16 ; SI-NEXT: s_and_b32 s6, s6, 0xffff ; SI-NEXT: s_or_b32 s7, s7, s8 -; SI-NEXT: s_add_i32 s83, s83, 3 +; SI-NEXT: s_add_i32 s21, s47, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s83, 0xff -; SI-NEXT: s_lshl_b32 s8, s87, 8 -; SI-NEXT: s_add_i32 s80, s23, 3 +; SI-NEXT: s_and_b32 s7, s21, 0xff +; SI-NEXT: s_lshl_b32 s8, s45, 8 +; SI-NEXT: s_add_i32 s34, s81, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s9, s80, 0xff +; SI-NEXT: s_and_b32 s9, s34, 0xff ; SI-NEXT: s_addk_i32 s7, 0x300 -; SI-NEXT: s_lshl_b32 s8, s22, 24 +; SI-NEXT: s_lshl_b32 s8, s57, 24 ; SI-NEXT: s_lshl_b32 s9, s9, 16 ; SI-NEXT: s_and_b32 s7, s7, 0xffff ; SI-NEXT: s_or_b32 s8, s8, s9 -; SI-NEXT: s_add_i32 s68, s68, 3 +; SI-NEXT: s_add_i32 s96, s96, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s68, 0xff -; SI-NEXT: s_lshl_b32 s9, s69, 8 -; SI-NEXT: s_add_i32 s66, s66, 3 +; SI-NEXT: s_and_b32 s8, s96, 0xff +; SI-NEXT: s_lshl_b32 s9, s44, 8 +; SI-NEXT: s_add_i32 s86, s74, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s10, s66, 0xff +; SI-NEXT: s_and_b32 s10, s86, 0xff ; SI-NEXT: s_addk_i32 s8, 0x300 -; SI-NEXT: s_lshl_b32 s9, s55, 24 +; SI-NEXT: s_lshl_b32 s9, s38, 24 ; SI-NEXT: s_lshl_b32 s10, s10, 16 ; SI-NEXT: s_and_b32 s8, s8, 0xffff ; SI-NEXT: s_or_b32 s9, s9, s10 -; SI-NEXT: s_add_i32 s64, s64, 3 +; SI-NEXT: s_add_i32 s84, s84, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s64, 0xff -; SI-NEXT: s_lshl_b32 s10, s81, 8 -; SI-NEXT: s_add_i32 s69, s98, 3 +; SI-NEXT: s_and_b32 s9, s84, 0xff +; SI-NEXT: s_lshl_b32 s10, s99, 8 +; SI-NEXT: s_add_i32 s97, s97, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s11, s69, 0xff +; SI-NEXT: s_and_b32 s11, s97, 0xff ; SI-NEXT: s_addk_i32 s9, 0x300 -; SI-NEXT: s_lshl_b32 s10, s71, 24 +; SI-NEXT: s_lshl_b32 s10, s54, 24 ; SI-NEXT: s_lshl_b32 s11, s11, 16 ; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_or_b32 s10, s10, s11 -; SI-NEXT: s_add_i32 s55, s31, 3 +; SI-NEXT: s_add_i32 s83, s83, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s55, 0xff -; SI-NEXT: s_lshl_b32 s11, s88, 8 -; SI-NEXT: s_add_i32 s53, s53, 3 +; SI-NEXT: s_and_b32 s10, s83, 0xff +; SI-NEXT: s_lshl_b32 s11, s51, 8 +; SI-NEXT: s_add_i32 s81, s55, 3 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s12, s53, 0xff +; SI-NEXT: s_and_b32 s12, s81, 0xff ; SI-NEXT: s_addk_i32 s10, 0x300 -; SI-NEXT: s_lshl_b32 s11, s37, 24 +; SI-NEXT: s_lshl_b32 s11, s53, 24 ; SI-NEXT: s_lshl_b32 s12, s12, 16 ; SI-NEXT: s_and_b32 s10, s10, 0xffff ; SI-NEXT: s_or_b32 s11, s11, s12 -; SI-NEXT: s_add_i32 s51, s51, 3 +; SI-NEXT: s_add_i32 s71, s71, 3 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s51, 0xff -; SI-NEXT: s_lshl_b32 s12, s65, 8 +; SI-NEXT: s_and_b32 s11, s71, 0xff +; SI-NEXT: s_lshl_b32 s12, s70, 8 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_lshl_b32 s12, s39, 24 -; SI-NEXT: s_add_i32 s39, s50, 3 -; SI-NEXT: s_and_b32 s13, s39, 0xff +; SI-NEXT: s_lshl_b32 s12, s67, 24 +; SI-NEXT: s_add_i32 s67, s68, 3 +; SI-NEXT: s_and_b32 s13, s67, 0xff ; SI-NEXT: s_addk_i32 s11, 0x300 ; SI-NEXT: s_lshl_b32 s13, s13, 16 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_or_b32 s12, s12, s13 -; SI-NEXT: s_add_i32 s50, s96, 3 +; SI-NEXT: s_add_i32 s70, s52, 3 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s12, s50, 0xff -; SI-NEXT: s_lshl_b32 s13, s16, 8 -; SI-NEXT: s_add_i32 s37, s52, 3 +; SI-NEXT: s_and_b32 s12, s70, 0xff +; SI-NEXT: s_lshl_b32 s13, s85, 8 ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s14, s37, 0xff +; SI-NEXT: s_lshl_b32 s13, s65, 24 +; SI-NEXT: s_add_i32 s65, s98, 3 +; SI-NEXT: s_and_b32 s14, s65, 0xff ; SI-NEXT: s_addk_i32 s12, 0x300 -; SI-NEXT: s_lshl_b32 s13, s34, 24 ; SI-NEXT: s_lshl_b32 s14, s14, 16 ; SI-NEXT: s_and_b32 s12, s12, 0xffff ; SI-NEXT: s_or_b32 s13, s13, s14 -; SI-NEXT: s_add_i32 s35, s35, 3 +; SI-NEXT: s_add_i32 s55, s82, 3 ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s13, s35, 0xff -; SI-NEXT: s_lshl_b32 s14, s48, 8 -; SI-NEXT: v_readlane_b32 s15, v44, 4 +; SI-NEXT: s_and_b32 s13, s55, 0xff +; SI-NEXT: s_lshl_b32 s14, s69, 8 +; SI-NEXT: s_add_i32 s51, s50, 3 ; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: s_lshl_b32 s14, s95, 24 -; SI-NEXT: s_add_i32 s95, s15, 3 -; SI-NEXT: s_and_b32 s15, s95, 0xff +; SI-NEXT: s_and_b32 s15, s51, 0xff ; SI-NEXT: s_addk_i32 s13, 0x300 +; SI-NEXT: s_lshl_b32 s14, s48, 24 ; SI-NEXT: s_lshl_b32 s15, s15, 16 ; SI-NEXT: s_and_b32 s13, s13, 0xffff ; SI-NEXT: s_or_b32 s14, s14, s15 -; SI-NEXT: s_add_i32 s34, s49, 3 +; SI-NEXT: s_add_i32 s54, s66, 3 ; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: s_and_b32 s14, s34, 0xff -; SI-NEXT: s_lshl_b32 s15, s38, 8 +; SI-NEXT: s_and_b32 s14, s54, 0xff +; SI-NEXT: s_lshl_b32 s15, s36, 8 +; SI-NEXT: s_add_i32 s49, s49, 3 ; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_lshl_b32 s15, s93, 24 -; SI-NEXT: s_add_i32 s93, s30, 3 -; SI-NEXT: s_and_b32 s21, s93, 0xff +; SI-NEXT: s_and_b32 s16, s49, 0xff ; SI-NEXT: s_addk_i32 s14, 0x300 -; SI-NEXT: s_lshl_b32 s21, s21, 16 +; SI-NEXT: s_lshl_b32 s15, s30, 24 +; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_or_b32 s15, s15, s21 -; SI-NEXT: s_add_i32 s91, s91, 3 +; SI-NEXT: s_or_b32 s15, s15, s16 +; SI-NEXT: s_add_i32 s39, s39, 3 ; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_and_b32 s15, s91, 0xff -; SI-NEXT: s_lshl_b32 s21, s92, 8 -; SI-NEXT: s_add_i32 s89, s89, 3 -; SI-NEXT: s_or_b32 s15, s21, s15 -; SI-NEXT: s_and_b32 s22, s89, 0xff +; SI-NEXT: s_and_b32 s15, s39, 0xff +; SI-NEXT: s_lshl_b32 s16, s94, 8 +; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_lshl_b32 s16, s37, 24 +; SI-NEXT: s_add_i32 s37, s25, 3 +; SI-NEXT: s_and_b32 s17, s37, 0xff ; SI-NEXT: s_addk_i32 s15, 0x300 -; SI-NEXT: s_lshl_b32 s21, s20, 24 -; SI-NEXT: s_lshl_b32 s22, s22, 16 -; SI-NEXT: s_add_i32 s16, s44, 3 +; SI-NEXT: s_lshl_b32 s17, s17, 16 ; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_or_b32 s21, s21, s22 -; SI-NEXT: s_add_i32 s24, s29, 3 +; SI-NEXT: s_or_b32 s16, s16, s17 +; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: v_readlane_b32 s16, v44, 1 +; SI-NEXT: s_add_i32 s16, s16, 3 +; SI-NEXT: v_readlane_b32 s17, v44, 0 ; SI-NEXT: s_and_b32 s16, s16, 0xff ; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s15, s21, s15 -; SI-NEXT: s_and_b32 s21, s24, 0xff -; SI-NEXT: s_lshl_b32 s22, s85, 8 -; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: s_add_i32 s19, s92, 3 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_and_b32 s19, s19, 0xff +; SI-NEXT: s_addk_i32 s16, 0x300 +; SI-NEXT: s_lshl_b32 s17, s93, 24 +; SI-NEXT: s_lshl_b32 s19, s19, 16 +; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_or_b32 s17, s17, s19 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_add_i32 s40, s16, 0x3000000 +; SI-NEXT: s_add_i32 s16, s28, 3 +; SI-NEXT: s_and_b32 s16, s16, 0xff +; SI-NEXT: s_lshl_b32 s17, s29, 8 +; SI-NEXT: s_add_i32 s19, s31, 3 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_and_b32 s19, s19, 0xff +; SI-NEXT: s_addk_i32 s16, 0x300 +; SI-NEXT: s_lshl_b32 s17, s95, 24 +; SI-NEXT: s_lshl_b32 s19, s19, 16 +; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_or_b32 s17, s17, s19 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_add_i32 s41, s16, 0x3000000 +; SI-NEXT: s_add_i32 s16, s90, 3 +; SI-NEXT: s_and_b32 s16, s16, 0xff +; SI-NEXT: s_lshl_b32 s17, s88, 8 +; SI-NEXT: s_add_i32 s18, s78, 3 ; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: v_readlane_b32 s17, v44, 2 ; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: s_and_b32 s20, s26, 0xff ; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s19, 24 +; SI-NEXT: s_lshl_b32 s17, s17, 24 ; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_addk_i32 s21, 0x300 -; SI-NEXT: s_lshl_b32 s22, s27, 24 -; SI-NEXT: s_lshl_b32 s20, s20, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s21, s21, 0xffff -; SI-NEXT: s_or_b32 s22, s22, s20 ; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: s_add_i32 s28, s28, 3 ; SI-NEXT: s_add_i32 s42, s16, 0x3000000 -; SI-NEXT: v_readlane_b32 s16, v44, 3 -; SI-NEXT: s_add_i32 s40, s21, 0x3000000 -; SI-NEXT: s_and_b32 s21, s28, 0xff -; SI-NEXT: s_lshl_b32 s22, s82, 8 -; SI-NEXT: s_add_i32 s79, s90, 3 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: v_readlane_b32 s17, v44, 2 -; SI-NEXT: v_readlane_b32 s18, v44, 1 -; SI-NEXT: s_or_b32 s21, s22, s21 -; SI-NEXT: s_and_b32 s22, s79, 0xff +; SI-NEXT: s_add_i32 s16, s89, 3 ; SI-NEXT: s_and_b32 s16, s16, 0xff -; SI-NEXT: s_lshl_b32 s17, s17, 8 -; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_addk_i32 s21, 0x300 -; SI-NEXT: s_lshl_b32 s20, s54, 24 -; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s17, s79, 8 +; SI-NEXT: s_add_i32 s18, s22, 3 ; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: v_readlane_b32 s17, v44, 0 ; SI-NEXT: s_and_b32 s18, s18, 0xff -; SI-NEXT: s_and_b32 s21, s21, 0xffff -; SI-NEXT: s_or_b32 s20, s20, s22 ; SI-NEXT: s_addk_i32 s16, 0x300 -; SI-NEXT: s_lshl_b32 s17, s17, 24 +; SI-NEXT: s_lshl_b32 s17, s23, 24 ; SI-NEXT: s_lshl_b32 s18, s18, 16 -; SI-NEXT: s_or_b32 s20, s20, s21 ; SI-NEXT: s_and_b32 s16, s16, 0xffff ; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_add_i32 s4, s4, 0x3000000 -; SI-NEXT: s_add_i32 s5, s5, 0x3000000 ; SI-NEXT: s_add_i32 s6, s6, 0x3000000 ; SI-NEXT: s_add_i32 s7, s7, 0x3000000 -; SI-NEXT: s_add_i32 s8, s8, 0x3000000 -; SI-NEXT: s_add_i32 s9, s9, 0x3000000 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_add_i32 s43, s16, 0x3000000 +; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 16 +; SI-NEXT: s_add_i32 s4, s4, 0x3000000 +; SI-NEXT: s_add_i32 s5, s5, 0x3000000 ; SI-NEXT: s_add_i32 s10, s10, 0x3000000 ; SI-NEXT: s_add_i32 s11, s11, 0x3000000 -; SI-NEXT: s_add_i32 s12, s12, 0x3000000 -; SI-NEXT: s_add_i32 s13, s13, 0x3000000 ; SI-NEXT: s_add_i32 s14, s14, 0x3000000 ; SI-NEXT: s_add_i32 s15, s15, 0x3000000 -; SI-NEXT: s_add_i32 s41, s20, 0x3000000 -; SI-NEXT: s_or_b32 s16, s17, s16 -; SI-NEXT: s_add_i32 s43, s16, 0x3000000 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16 -; SI-NEXT: v_writelane_b32 v44, s16, 9 -; SI-NEXT: s_lshr_b32 s47, s43, 16 -; SI-NEXT: s_lshr_b32 s57, s41, 16 -; SI-NEXT: s_lshr_b32 s59, s15, 16 -; SI-NEXT: s_lshr_b32 s61, s13, 16 +; SI-NEXT: v_writelane_b32 v44, s16, 14 +; SI-NEXT: s_add_i32 s8, s8, 0x3000000 +; SI-NEXT: s_add_i32 s9, s9, 0x3000000 +; SI-NEXT: s_add_i32 s12, s12, 0x3000000 +; SI-NEXT: s_add_i32 s13, s13, 0x3000000 +; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[86:87], s[10:11], 16 +; SI-NEXT: v_writelane_b32 v44, s17, 15 +; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[26:27], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[24:25], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 16 +; SI-NEXT: v_writelane_b32 v44, s16, 16 +; SI-NEXT: s_lshr_b32 s46, s43, 16 +; SI-NEXT: s_lshr_b32 s56, s41, 16 +; SI-NEXT: s_lshr_b32 s87, s15, 16 +; SI-NEXT: s_lshr_b32 s60, s13, 16 ; SI-NEXT: s_lshr_b32 s63, s11, 16 ; SI-NEXT: s_lshr_b32 s73, s9, 16 ; SI-NEXT: s_lshr_b32 s75, s7, 16 -; SI-NEXT: s_lshr_b32 s45, s5, 16 -; SI-NEXT: v_writelane_b32 v44, s17, 10 +; SI-NEXT: s_lshr_b32 s21, s5, 16 +; SI-NEXT: v_writelane_b32 v44, s17, 17 ; SI-NEXT: .LBB107_5: ; %end ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: s_and_b32 s16, s42, 0xffff -; SI-NEXT: s_lshl_b32 s17, s76, 16 +; SI-NEXT: s_lshl_b32 s17, s26, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s43, 0xffff -; SI-NEXT: s_lshl_b32 s18, s47, 16 +; SI-NEXT: s_lshl_b32 s18, s46, 16 ; SI-NEXT: s_or_b32 s17, s17, s18 ; SI-NEXT: s_and_b32 s18, s40, 0xffff -; SI-NEXT: s_lshl_b32 s19, s46, 16 +; SI-NEXT: s_lshl_b32 s19, s62, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 ; SI-NEXT: s_and_b32 s19, s41, 0xffff -; SI-NEXT: s_lshl_b32 s20, s57, 16 +; SI-NEXT: s_lshl_b32 s20, s56, 16 ; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: v_readlane_b32 s20, v44, 9 ; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s20, s20, 16 +; SI-NEXT: s_lshl_b32 s20, s72, 16 ; SI-NEXT: s_or_b32 s14, s14, s20 ; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s20, s59, 16 +; SI-NEXT: s_lshl_b32 s20, s87, 16 ; SI-NEXT: s_or_b32 s15, s15, s20 ; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s20, s58, 16 +; SI-NEXT: s_lshl_b32 s20, s24, 16 ; SI-NEXT: s_or_b32 s12, s12, s20 ; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s20, s61, 16 +; SI-NEXT: s_lshl_b32 s20, s60, 16 ; SI-NEXT: s_or_b32 s13, s13, s20 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s20, s60, 16 +; SI-NEXT: s_lshl_b32 s20, s86, 16 ; SI-NEXT: s_or_b32 s10, s10, s20 ; SI-NEXT: s_and_b32 s11, s11, 0xffff ; SI-NEXT: s_lshl_b32 s20, s63, 16 ; SI-NEXT: s_or_b32 s11, s11, s20 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s20, s62, 16 +; SI-NEXT: s_lshl_b32 s20, s76, 16 ; SI-NEXT: s_or_b32 s8, s8, s20 ; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_lshl_b32 s20, s73, 16 +; SI-NEXT: v_readlane_b32 s22, v44, 14 ; SI-NEXT: s_or_b32 s9, s9, s20 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s20, s72, 16 +; SI-NEXT: v_readlane_b32 s23, v44, 15 +; SI-NEXT: s_lshl_b32 s20, s22, 16 ; SI-NEXT: s_or_b32 s6, s6, s20 ; SI-NEXT: s_and_b32 s7, s7, 0xffff ; SI-NEXT: s_lshl_b32 s20, s75, 16 +; SI-NEXT: v_readlane_b32 s22, v44, 16 ; SI-NEXT: s_or_b32 s7, s7, s20 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s20, s74, 16 +; SI-NEXT: s_lshl_b32 s20, s22, 16 ; SI-NEXT: s_or_b32 s4, s4, s20 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s20, s45, 16 +; SI-NEXT: s_lshl_b32 s20, s21, 16 ; SI-NEXT: s_or_b32 s5, s5, s20 ; SI-NEXT: v_readlane_b32 s30, v43, 34 -; SI-NEXT: v_readlane_b32 s21, v44, 10 +; SI-NEXT: v_readlane_b32 s23, v44, 17 ; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v2, s18 @@ -83241,18 +83166,18 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -83333,147 +83258,147 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32 ; VI-NEXT: .LBB107_2: ; %cmp.true ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34 ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v8, v0, v31, s4 ; VI-NEXT: s_waitcnt vmcnt(12) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33 -; VI-NEXT: v_perm_b32 v9, v0, v28, s4 +; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v33 ; VI-NEXT: s_waitcnt vmcnt(10) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v32 -; VI-NEXT: v_perm_b32 v10, v0, v26, s4 +; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v32 ; VI-NEXT: s_waitcnt vmcnt(8) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v29 -; VI-NEXT: v_perm_b32 v11, v0, v23, s4 +; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v29 ; VI-NEXT: s_waitcnt vmcnt(6) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v30 -; VI-NEXT: v_perm_b32 v12, v0, v24, s4 +; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v30 ; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v27 -; VI-NEXT: v_perm_b32 v13, v0, v21, s4 +; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v27 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v25 -; VI-NEXT: v_perm_b32 v14, v0, v20, s4 +; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v25 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v22 -; VI-NEXT: v_perm_b32 v15, v0, v19, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v18 -; VI-NEXT: v_perm_b32 v17, v0, v17, s4 -; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004 +; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v22 +; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v18 +; VI-NEXT: s_add_i32 s41, s41, 3 +; VI-NEXT: v_mov_b32_e32 v9, 0xc0c0004 +; VI-NEXT: v_perm_b32 v0, v0, v31, s4 +; VI-NEXT: v_perm_b32 v1, v1, v28, s4 +; VI-NEXT: v_perm_b32 v2, v2, v26, s4 +; VI-NEXT: v_perm_b32 v3, v3, v23, s4 +; VI-NEXT: v_perm_b32 v4, v4, v24, s4 +; VI-NEXT: v_perm_b32 v5, v5, v21, s4 +; VI-NEXT: v_perm_b32 v6, v6, v20, s4 +; VI-NEXT: v_perm_b32 v7, v7, v19, s4 +; VI-NEXT: v_perm_b32 v8, v8, v17, s4 +; VI-NEXT: v_perm_b32 v10, s41, v16, v9 ; VI-NEXT: s_add_i32 s40, s40, 3 -; VI-NEXT: v_mov_b32_e32 v1, s14 -; VI-NEXT: v_perm_b32 v18, s40, v1, v0 +; VI-NEXT: v_mov_b32_e32 v11, s14 ; VI-NEXT: s_add_i32 s15, s15, 3 -; VI-NEXT: v_mov_b32_e32 v1, s12 -; VI-NEXT: v_perm_b32 v19, s15, v1, v0 +; VI-NEXT: v_mov_b32_e32 v12, s12 ; VI-NEXT: s_add_i32 s13, s13, 3 -; VI-NEXT: v_mov_b32_e32 v1, s10 -; VI-NEXT: v_perm_b32 v20, s13, v1, v0 +; VI-NEXT: v_mov_b32_e32 v13, s10 ; VI-NEXT: s_add_i32 s11, s11, 3 -; VI-NEXT: v_mov_b32_e32 v1, s8 -; VI-NEXT: v_perm_b32 v21, s11, v1, v0 +; VI-NEXT: v_mov_b32_e32 v14, s8 ; VI-NEXT: s_add_i32 s9, s9, 3 -; VI-NEXT: v_mov_b32_e32 v1, s7 -; VI-NEXT: v_perm_b32 v22, s9, v1, v0 +; VI-NEXT: v_mov_b32_e32 v15, s7 ; VI-NEXT: s_add_i32 s44, s44, 3 -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: v_perm_b32 v23, s44, v1, v0 +; VI-NEXT: v_mov_b32_e32 v16, s6 ; VI-NEXT: s_add_i32 s43, s43, 3 -; VI-NEXT: v_mov_b32_e32 v1, s42 -; VI-NEXT: v_perm_b32 v7, s43, v1, v0 +; VI-NEXT: v_mov_b32_e32 v17, s42 ; VI-NEXT: s_add_i32 s76, s76, 3 -; VI-NEXT: v_mov_b32_e32 v1, s74 -; VI-NEXT: v_perm_b32 v24, s76, v1, v0 +; VI-NEXT: v_mov_b32_e32 v18, s74 ; VI-NEXT: s_add_i32 s75, s75, 3 -; VI-NEXT: v_mov_b32_e32 v1, s72 -; VI-NEXT: v_perm_b32 v6, s75, v1, v0 +; VI-NEXT: v_mov_b32_e32 v19, s72 ; VI-NEXT: s_add_i32 s73, s73, 3 -; VI-NEXT: v_mov_b32_e32 v1, s62 -; VI-NEXT: v_perm_b32 v25, s73, v1, v0 +; VI-NEXT: v_mov_b32_e32 v20, s62 ; VI-NEXT: s_add_i32 s63, s63, 3 -; VI-NEXT: v_mov_b32_e32 v1, s60 -; VI-NEXT: v_perm_b32 v5, s63, v1, v0 +; VI-NEXT: v_mov_b32_e32 v21, s60 ; VI-NEXT: s_add_i32 s61, s61, 3 -; VI-NEXT: v_mov_b32_e32 v1, s58 -; VI-NEXT: v_perm_b32 v26, s61, v1, v0 +; VI-NEXT: v_mov_b32_e32 v22, s58 ; VI-NEXT: s_add_i32 s59, s59, 3 -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_perm_b32 v4, s59, v1, v0 +; VI-NEXT: v_mov_b32_e32 v23, s47 ; VI-NEXT: s_add_i32 s56, s56, 3 -; VI-NEXT: v_mov_b32_e32 v1, s46 -; VI-NEXT: v_perm_b32 v27, s56, v1, v0 +; VI-NEXT: v_mov_b32_e32 v24, s46 ; VI-NEXT: s_add_i32 s57, s57, 3 -; VI-NEXT: v_mov_b32_e32 v1, s45 -; VI-NEXT: v_perm_b32 v3, s57, v1, v0 +; VI-NEXT: v_mov_b32_e32 v25, s45 ; VI-NEXT: s_add_i32 s28, s28, 3 -; VI-NEXT: v_mov_b32_e32 v1, s29 -; VI-NEXT: v_perm_b32 v28, s28, v1, v0 +; VI-NEXT: v_mov_b32_e32 v26, s29 ; VI-NEXT: s_add_i32 s26, s26, 3 -; VI-NEXT: v_mov_b32_e32 v1, s27 -; VI-NEXT: v_perm_b32 v2, s26, v1, v0 +; VI-NEXT: v_mov_b32_e32 v27, s27 ; VI-NEXT: s_add_i32 s24, s24, 3 -; VI-NEXT: v_mov_b32_e32 v1, s25 -; VI-NEXT: s_add_i32 s41, s41, 3 -; VI-NEXT: v_perm_b32 v29, s24, v1, v0 +; VI-NEXT: v_mov_b32_e32 v28, s25 ; VI-NEXT: s_add_i32 s22, s22, 3 -; VI-NEXT: v_mov_b32_e32 v1, s23 +; VI-NEXT: v_mov_b32_e32 v29, s23 ; VI-NEXT: s_add_i32 s20, s20, 3 ; VI-NEXT: v_mov_b32_e32 v30, s21 ; VI-NEXT: s_add_i32 s18, s18, 3 ; VI-NEXT: v_mov_b32_e32 v31, s19 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v32, s17 -; VI-NEXT: v_perm_b32 v16, s41, v16, v0 -; VI-NEXT: v_perm_b32 v1, s22, v1, v0 -; VI-NEXT: v_perm_b32 v30, s20, v30, v0 -; VI-NEXT: v_perm_b32 v31, s18, v31, v0 -; VI-NEXT: v_perm_b32 v0, s16, v32, v0 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_add_u32_e32 v26, vcc, 0x300, v26 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x300, v25 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; VI-NEXT: v_add_u32_e32 v24, vcc, 0x300, v24 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30 -; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29 -; VI-NEXT: v_or_b32_sdwa v3, v3, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v4, v4, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v5, v5, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v6, v6, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v7, v7, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v8 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v10 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v11 -; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v12 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v14 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v15 -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v17 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v16 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v18 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v19 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v20 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v21 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v22 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v23 -; VI-NEXT: v_or_b32_sdwa v0, v31, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v1, v1, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v2, v2, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v8, v8, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v9, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v10, v10, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v11, v11, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v12, v12, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v13, v28, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v14, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v15, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_perm_b32 v11, s40, v11, v9 +; VI-NEXT: v_perm_b32 v12, s15, v12, v9 +; VI-NEXT: v_perm_b32 v13, s13, v13, v9 +; VI-NEXT: v_perm_b32 v14, s11, v14, v9 +; VI-NEXT: v_perm_b32 v15, s9, v15, v9 +; VI-NEXT: v_perm_b32 v16, s44, v16, v9 +; VI-NEXT: v_perm_b32 v17, s43, v17, v9 +; VI-NEXT: v_perm_b32 v18, s76, v18, v9 +; VI-NEXT: v_perm_b32 v19, s75, v19, v9 +; VI-NEXT: v_perm_b32 v20, s73, v20, v9 +; VI-NEXT: v_perm_b32 v21, s63, v21, v9 +; VI-NEXT: v_perm_b32 v22, s61, v22, v9 +; VI-NEXT: v_perm_b32 v23, s59, v23, v9 +; VI-NEXT: v_perm_b32 v24, s56, v24, v9 +; VI-NEXT: v_perm_b32 v25, s57, v25, v9 +; VI-NEXT: v_perm_b32 v26, s28, v26, v9 +; VI-NEXT: v_perm_b32 v27, s26, v27, v9 +; VI-NEXT: v_perm_b32 v28, s24, v28, v9 +; VI-NEXT: v_perm_b32 v29, s22, v29, v9 +; VI-NEXT: v_perm_b32 v30, s20, v30, v9 +; VI-NEXT: v_perm_b32 v31, s18, v31, v9 +; VI-NEXT: v_perm_b32 v9, s16, v32, v9 +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v0 +; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v1 +; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v2 +; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v3 +; VI-NEXT: v_lshlrev_b32_e32 v36, 16, v4 +; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v5 +; VI-NEXT: v_lshlrev_b32_e32 v38, 16, v6 +; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v7 +; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v8 +; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v10 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v12 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v14 +; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v15 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v16 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v17 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v18 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v19 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v20 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v21 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v22 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v23 +; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v24 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v25 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v26 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27 +; VI-NEXT: v_add_u32_e32 v20, vcc, 0x300, v28 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v29 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v30 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v31 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v0, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v1, v1, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v2, v2, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v3, v3, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v4, v4, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v5, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v6, v6, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v7, v7, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v8, v8, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v9, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v10, v10, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v11, v48, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v12, v38, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v13, v36, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v14, v34, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v15, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2 @@ -83500,22 +83425,22 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32 ; GFX9-LABEL: bitcast_v64i8_to_v32f16_scalar: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_readfirstlane_b32 s72, v30 -; GFX9-NEXT: v_readfirstlane_b32 s56, v29 -; GFX9-NEXT: v_readfirstlane_b32 s57, v28 -; GFX9-NEXT: v_readfirstlane_b32 s61, v27 -; GFX9-NEXT: v_readfirstlane_b32 s63, v26 -; GFX9-NEXT: v_readfirstlane_b32 s7, v25 -; GFX9-NEXT: v_readfirstlane_b32 s47, v24 -; GFX9-NEXT: v_readfirstlane_b32 s58, v23 -; GFX9-NEXT: v_readfirstlane_b32 s60, v22 +; GFX9-NEXT: v_readfirstlane_b32 s41, v30 +; GFX9-NEXT: v_readfirstlane_b32 s11, v29 +; GFX9-NEXT: v_readfirstlane_b32 s12, v28 +; GFX9-NEXT: v_readfirstlane_b32 s15, v27 +; GFX9-NEXT: v_readfirstlane_b32 s40, v26 +; GFX9-NEXT: v_readfirstlane_b32 s8, v25 +; GFX9-NEXT: v_readfirstlane_b32 s9, v24 +; GFX9-NEXT: v_readfirstlane_b32 s13, v23 +; GFX9-NEXT: v_readfirstlane_b32 s14, v22 ; GFX9-NEXT: v_readfirstlane_b32 s6, v21 -; GFX9-NEXT: v_readfirstlane_b32 s8, v20 -; GFX9-NEXT: v_readfirstlane_b32 s9, v19 -; GFX9-NEXT: v_readfirstlane_b32 s10, v18 -; GFX9-NEXT: v_readfirstlane_b32 s11, v17 -; GFX9-NEXT: v_readfirstlane_b32 s12, v16 -; GFX9-NEXT: v_readfirstlane_b32 s15, v12 +; GFX9-NEXT: v_readfirstlane_b32 s7, v20 +; GFX9-NEXT: v_readfirstlane_b32 s10, v19 +; GFX9-NEXT: v_readfirstlane_b32 s56, v18 +; GFX9-NEXT: v_readfirstlane_b32 s43, v17 +; GFX9-NEXT: v_readfirstlane_b32 s45, v16 +; GFX9-NEXT: v_readfirstlane_b32 s44, v12 ; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:76 ; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:4 @@ -83536,21 +83461,21 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20 ; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:16 ; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:12 -; GFX9-NEXT: v_readfirstlane_b32 s13, v15 -; GFX9-NEXT: v_readfirstlane_b32 s73, v14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v13 -; GFX9-NEXT: v_readfirstlane_b32 s40, v11 +; GFX9-NEXT: v_readfirstlane_b32 s46, v15 +; GFX9-NEXT: v_readfirstlane_b32 s47, v14 +; GFX9-NEXT: v_readfirstlane_b32 s42, v13 +; GFX9-NEXT: v_readfirstlane_b32 s75, v11 ; GFX9-NEXT: v_readfirstlane_b32 s76, v10 -; GFX9-NEXT: v_readfirstlane_b32 s41, v9 -; GFX9-NEXT: v_readfirstlane_b32 s42, v8 -; GFX9-NEXT: v_readfirstlane_b32 s43, v7 -; GFX9-NEXT: v_readfirstlane_b32 s75, v6 -; GFX9-NEXT: v_readfirstlane_b32 s44, v5 -; GFX9-NEXT: v_readfirstlane_b32 s45, v4 -; GFX9-NEXT: v_readfirstlane_b32 s46, v3 -; GFX9-NEXT: v_readfirstlane_b32 s74, v2 -; GFX9-NEXT: v_readfirstlane_b32 s59, v1 -; GFX9-NEXT: v_readfirstlane_b32 s62, v0 +; GFX9-NEXT: v_readfirstlane_b32 s61, v9 +; GFX9-NEXT: v_readfirstlane_b32 s62, v8 +; GFX9-NEXT: v_readfirstlane_b32 s73, v7 +; GFX9-NEXT: v_readfirstlane_b32 s74, v6 +; GFX9-NEXT: v_readfirstlane_b32 s58, v5 +; GFX9-NEXT: v_readfirstlane_b32 s60, v4 +; GFX9-NEXT: v_readfirstlane_b32 s63, v3 +; GFX9-NEXT: v_readfirstlane_b32 s72, v2 +; GFX9-NEXT: v_readfirstlane_b32 s57, v1 +; GFX9-NEXT: v_readfirstlane_b32 s59, v0 ; GFX9-NEXT: s_waitcnt vmcnt(19) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12 ; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec @@ -83558,17 +83483,17 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v0, s17 ; GFX9-NEXT: v_mov_b32_e32 v8, 0xc0c0004 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v8 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v8 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v8 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v8 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v8 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v8 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v8 ; GFX9-NEXT: v_mov_b32_e32 v3, s27 @@ -83577,247 +83502,246 @@ define inreg <32 x half> @bitcast_v64i8_to_v32f16_scalar(<64 x i8> inreg %a, i32 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 ; GFX9-NEXT: v_perm_b32 v3, s28, v3, v8 -; GFX9-NEXT: v_mov_b32_e32 v4, s59 -; GFX9-NEXT: v_perm_b32 v4, s62, v4, v8 +; GFX9-NEXT: v_mov_b32_e32 v4, s57 +; GFX9-NEXT: v_perm_b32 v4, s59, v4, v8 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 -; GFX9-NEXT: v_mov_b32_e32 v4, s46 -; GFX9-NEXT: v_perm_b32 v4, s74, v4, v8 -; GFX9-NEXT: v_mov_b32_e32 v5, s44 -; GFX9-NEXT: v_perm_b32 v5, s45, v5, v8 +; GFX9-NEXT: v_mov_b32_e32 v4, s63 +; GFX9-NEXT: v_perm_b32 v4, s72, v4, v8 +; GFX9-NEXT: v_mov_b32_e32 v5, s58 +; GFX9-NEXT: v_perm_b32 v5, s60, v5, v8 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: v_mov_b32_e32 v5, s43 -; GFX9-NEXT: v_perm_b32 v5, s75, v5, v8 -; GFX9-NEXT: v_mov_b32_e32 v6, s41 -; GFX9-NEXT: v_perm_b32 v6, s42, v6, v8 +; GFX9-NEXT: v_mov_b32_e32 v5, s73 +; GFX9-NEXT: v_perm_b32 v5, s74, v5, v8 +; GFX9-NEXT: v_mov_b32_e32 v6, s61 +; GFX9-NEXT: v_perm_b32 v6, s62, v6, v8 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: v_mov_b32_e32 v6, s40 +; GFX9-NEXT: v_mov_b32_e32 v6, s75 ; GFX9-NEXT: v_perm_b32 v6, s76, v6, v8 -; GFX9-NEXT: v_mov_b32_e32 v7, s14 -; GFX9-NEXT: v_perm_b32 v7, s15, v7, v8 +; GFX9-NEXT: v_mov_b32_e32 v7, s42 +; GFX9-NEXT: v_perm_b32 v7, s44, v7, v8 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 -; GFX9-NEXT: v_mov_b32_e32 v7, s13 -; GFX9-NEXT: v_perm_b32 v7, s73, v7, v8 -; GFX9-NEXT: v_mov_b32_e32 v9, s11 -; GFX9-NEXT: v_perm_b32 v9, s12, v9, v8 +; GFX9-NEXT: v_mov_b32_e32 v7, s46 +; GFX9-NEXT: v_perm_b32 v7, s47, v7, v8 +; GFX9-NEXT: v_mov_b32_e32 v9, s43 +; GFX9-NEXT: v_perm_b32 v9, s45, v9, v8 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; GFX9-NEXT: v_lshl_or_b32 v7, v9, 16, v7 -; GFX9-NEXT: s_waitcnt vmcnt(18) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v16 +; GFX9-NEXT: v_mov_b32_e32 v9, s13 +; GFX9-NEXT: v_perm_b32 v9, s14, v9, v8 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_perm_b32 v10, s72, v18, v8 -; GFX9-NEXT: v_or_b32_sdwa v9, v17, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v9, 16, v10 +; GFX9-NEXT: v_perm_b32 v8, s41, v18, v8 +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v16 +; GFX9-NEXT: v_or_b32_sdwa v10, v17, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v8 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v26 +; GFX9-NEXT: v_lshlrev_b32_e32 v8, 8, v26 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v9, v29, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v8, v29, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v19 -; GFX9-NEXT: v_or_b32_sdwa v10, v21, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_lshl_or_b32 v12, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v20 -; GFX9-NEXT: v_perm_b32 v10, v31, v28, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v23, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v13, v9, 16, v10 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v30 -; GFX9-NEXT: v_or_b32_sdwa v9, v33, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v10, v21, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v12, v10, 16, v8 +; GFX9-NEXT: v_perm_b32 v8, v31, v28, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v20 +; GFX9-NEXT: v_or_b32_sdwa v10, v23, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v13, v10, 16, v8 +; GFX9-NEXT: v_lshlrev_b32_e32 v8, 8, v30 +; GFX9-NEXT: v_or_b32_sdwa v8, v33, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v22 ; GFX9-NEXT: v_or_b32_sdwa v10, v25, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_lshl_or_b32 v14, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v24 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v14, v10, 16, v8 ; GFX9-NEXT: v_perm_b32 v10, v34, v32, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v27, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: s_and_b32 s4, s56, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s10, 8 +; GFX9-NEXT: s_or_b32 s4, s4, s5 +; GFX9-NEXT: s_and_b32 s5, s7, 0xff +; GFX9-NEXT: s_lshl_b32 s77, s6, 8 +; GFX9-NEXT: v_lshlrev_b32_e32 v8, 8, v24 +; GFX9-NEXT: s_or_b32 s5, s5, s77 +; GFX9-NEXT: v_or_b32_sdwa v8, v27, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v15, v9, 16, v10 -; GFX9-NEXT: v_mov_b32_e32 v9, s58 -; GFX9-NEXT: v_perm_b32 v8, s60, v9, v8 -; GFX9-NEXT: s_and_b32 s4, s47, 0xff -; GFX9-NEXT: s_lshl_b32 s5, s7, 8 +; GFX9-NEXT: s_pack_ll_b32_b16 s77, s4, s5 +; GFX9-NEXT: s_and_b32 s4, s9, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s8, 8 +; GFX9-NEXT: v_lshl_or_b32 v15, v8, 16, v10 ; GFX9-NEXT: s_or_b32 s4, s4, s5 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v9, s4, 16, v8 -; GFX9-NEXT: s_and_b32 s4, s10, 0xff -; GFX9-NEXT: s_lshl_b32 s5, s9, 8 +; GFX9-NEXT: s_and_b32 s4, s40, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s15, 8 ; GFX9-NEXT: s_or_b32 s4, s4, s5 -; GFX9-NEXT: s_and_b32 s5, s8, 0xff -; GFX9-NEXT: s_lshl_b32 s77, s6, 8 -; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_pack_ll_b32_b16 s4, s4, s5 -; GFX9-NEXT: s_and_b32 s5, s63, 0xff -; GFX9-NEXT: s_lshl_b32 s77, s61, 8 -; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_and_b32 s77, s57, 0xff -; GFX9-NEXT: s_lshl_b32 s78, s56, 8 -; GFX9-NEXT: s_or_b32 s77, s77, s78 -; GFX9-NEXT: s_pack_ll_b32_b16 s5, s5, s77 -; GFX9-NEXT: v_mov_b32_e32 v8, s4 -; GFX9-NEXT: v_mov_b32_e32 v10, s5 +; GFX9-NEXT: s_and_b32 s5, s12, 0xff +; GFX9-NEXT: s_lshl_b32 s78, s11, 8 +; GFX9-NEXT: s_or_b32 s5, s5, s78 +; GFX9-NEXT: s_pack_ll_b32_b16 s78, s4, s5 +; GFX9-NEXT: v_mov_b32_e32 v8, s77 +; GFX9-NEXT: v_mov_b32_e32 v10, s78 ; GFX9-NEXT: s_cbranch_execnz .LBB107_3 ; GFX9-NEXT: .LBB107_2: ; %cmp.true ; GFX9-NEXT: s_waitcnt vmcnt(12) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v34 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v8, v0, v32, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v27 -; GFX9-NEXT: v_perm_b32 v9, v0, v24, s4 +; GFX9-NEXT: v_add_u32_e32 v1, 3, v27 ; GFX9-NEXT: s_waitcnt vmcnt(8) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v33 -; GFX9-NEXT: v_perm_b32 v10, v0, v30, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v25 -; GFX9-NEXT: v_perm_b32 v11, v0, v22, s4 +; GFX9-NEXT: v_add_u32_e32 v2, 3, v33 +; GFX9-NEXT: v_add_u32_e32 v3, 3, v25 ; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v31 -; GFX9-NEXT: v_perm_b32 v12, v0, v28, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v23 -; GFX9-NEXT: v_perm_b32 v13, v0, v20, s4 +; GFX9-NEXT: v_add_u32_e32 v4, 3, v31 +; GFX9-NEXT: v_add_u32_e32 v5, 3, v23 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v29 -; GFX9-NEXT: v_perm_b32 v14, v0, v26, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v21 -; GFX9-NEXT: v_perm_b32 v15, v0, v19, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v17 -; GFX9-NEXT: v_mov_b32_e32 v19, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v16, v0, v16, s4 -; GFX9-NEXT: s_add_i32 s63, s63, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s61 -; GFX9-NEXT: v_perm_b32 v17, s63, v0, v19 -; GFX9-NEXT: s_add_i32 s57, s57, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s56 -; GFX9-NEXT: v_perm_b32 v20, s57, v0, v19 +; GFX9-NEXT: v_add_u32_e32 v6, 3, v29 +; GFX9-NEXT: v_add_u32_e32 v7, 3, v21 +; GFX9-NEXT: s_add_i32 s41, s41, 3 +; GFX9-NEXT: v_mov_b32_e32 v8, 0xc0c0004 +; GFX9-NEXT: v_add_u32_e32 v10, 3, v17 +; GFX9-NEXT: s_add_i32 s16, s16, 3 +; GFX9-NEXT: v_mov_b32_e32 v31, s17 +; GFX9-NEXT: v_perm_b32 v0, v0, v32, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v24, s4 +; GFX9-NEXT: v_perm_b32 v2, v2, v30, s4 +; GFX9-NEXT: v_perm_b32 v3, v3, v22, s4 +; GFX9-NEXT: v_perm_b32 v4, v4, v28, s4 +; GFX9-NEXT: v_perm_b32 v5, v5, v20, s4 +; GFX9-NEXT: v_perm_b32 v6, v6, v26, s4 +; GFX9-NEXT: v_perm_b32 v7, v7, v19, s4 +; GFX9-NEXT: v_perm_b32 v9, s41, v18, v8 +; GFX9-NEXT: v_perm_b32 v10, v10, v16, s4 +; GFX9-NEXT: s_add_i32 s40, s40, 3 +; GFX9-NEXT: v_mov_b32_e32 v11, s15 +; GFX9-NEXT: s_add_i32 s12, s12, 3 +; GFX9-NEXT: v_mov_b32_e32 v12, s11 +; GFX9-NEXT: s_add_i32 s14, s14, 3 +; GFX9-NEXT: v_mov_b32_e32 v13, s13 +; GFX9-NEXT: s_add_i32 s9, s9, 3 +; GFX9-NEXT: v_mov_b32_e32 v14, s8 +; GFX9-NEXT: s_add_i32 s56, s56, 3 +; GFX9-NEXT: v_mov_b32_e32 v15, s10 +; GFX9-NEXT: s_add_i32 s7, s7, 3 +; GFX9-NEXT: v_mov_b32_e32 v16, s6 +; GFX9-NEXT: s_add_i32 s47, s47, 3 +; GFX9-NEXT: v_mov_b32_e32 v17, s46 +; GFX9-NEXT: s_add_i32 s45, s45, 3 +; GFX9-NEXT: v_mov_b32_e32 v18, s43 +; GFX9-NEXT: s_add_i32 s76, s76, 3 +; GFX9-NEXT: v_mov_b32_e32 v19, s75 +; GFX9-NEXT: s_add_i32 s44, s44, 3 +; GFX9-NEXT: v_mov_b32_e32 v20, s42 +; GFX9-NEXT: s_add_i32 s74, s74, 3 +; GFX9-NEXT: v_mov_b32_e32 v21, s73 +; GFX9-NEXT: s_add_i32 s62, s62, 3 +; GFX9-NEXT: v_mov_b32_e32 v22, s61 +; GFX9-NEXT: s_add_i32 s72, s72, 3 +; GFX9-NEXT: v_mov_b32_e32 v23, s63 ; GFX9-NEXT: s_add_i32 s60, s60, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s58 -; GFX9-NEXT: v_perm_b32 v21, s60, v0, v19 +; GFX9-NEXT: v_mov_b32_e32 v24, s58 +; GFX9-NEXT: s_add_i32 s28, s28, 3 +; GFX9-NEXT: v_mov_b32_e32 v25, s29 +; GFX9-NEXT: s_add_i32 s59, s59, 3 +; GFX9-NEXT: v_mov_b32_e32 v26, s57 +; GFX9-NEXT: s_add_i32 s24, s24, 3 +; GFX9-NEXT: v_mov_b32_e32 v27, s25 +; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: v_mov_b32_e32 v28, s27 ; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s21 -; GFX9-NEXT: v_perm_b32 v0, s20, v0, v19 -; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v0 +; GFX9-NEXT: v_mov_b32_e32 v29, s21 ; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s23 -; GFX9-NEXT: v_perm_b32 v0, s22, v0, v19 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v0 -; GFX9-NEXT: s_add_i32 s16, s16, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s17 -; GFX9-NEXT: v_perm_b32 v0, s16, v0, v19 +; GFX9-NEXT: v_mov_b32_e32 v30, s23 +; GFX9-NEXT: v_perm_b32 v31, s16, v31, v8 ; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s19 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_perm_b32 v3, s18, v3, v19 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: s_add_i32 s24, s24, 3 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_mov_b32_e32 v32, s19 +; GFX9-NEXT: v_perm_b32 v11, s40, v11, v8 +; GFX9-NEXT: v_perm_b32 v12, s12, v12, v8 +; GFX9-NEXT: v_perm_b32 v13, s14, v13, v8 +; GFX9-NEXT: v_perm_b32 v14, s9, v14, v8 +; GFX9-NEXT: v_perm_b32 v15, s56, v15, v8 +; GFX9-NEXT: v_perm_b32 v16, s7, v16, v8 +; GFX9-NEXT: v_perm_b32 v17, s47, v17, v8 +; GFX9-NEXT: v_perm_b32 v18, s45, v18, v8 +; GFX9-NEXT: v_perm_b32 v19, s76, v19, v8 +; GFX9-NEXT: v_perm_b32 v20, s44, v20, v8 +; GFX9-NEXT: v_perm_b32 v21, s74, v21, v8 +; GFX9-NEXT: v_perm_b32 v22, s62, v22, v8 +; GFX9-NEXT: v_perm_b32 v23, s72, v23, v8 +; GFX9-NEXT: v_perm_b32 v24, s60, v24, v8 +; GFX9-NEXT: v_perm_b32 v25, s28, v25, v8 +; GFX9-NEXT: v_perm_b32 v26, s59, v26, v8 +; GFX9-NEXT: v_perm_b32 v27, s24, v27, v8 +; GFX9-NEXT: v_perm_b32 v28, s26, v28, v8 +; GFX9-NEXT: v_perm_b32 v29, s20, v29, v8 +; GFX9-NEXT: v_perm_b32 v30, s22, v30, v8 +; GFX9-NEXT: v_perm_b32 v8, s18, v32, v8 +; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v0 +; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v31 +; GFX9-NEXT: v_add_u32_e32 v39, 0x300, v7 +; GFX9-NEXT: v_add_u32_e32 v48, 0x300, v9 +; GFX9-NEXT: v_add_u32_e32 v49, 0x300, v10 +; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v11 +; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v13 +; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v15 +; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v17 +; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v8 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 -; GFX9-NEXT: v_mov_b32_e32 v2, s25 -; GFX9-NEXT: v_lshl_or_b32 v0, v3, 16, v0 -; GFX9-NEXT: v_perm_b32 v2, s24, v2, v19 -; GFX9-NEXT: s_add_i32 s26, s26, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s27 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_perm_b32 v3, s26, v3, v19 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v1 +; GFX9-NEXT: v_add_u32_e32 v34, 0x300, v2 +; GFX9-NEXT: v_add_u32_e32 v35, 0x300, v3 +; GFX9-NEXT: v_add_u32_e32 v36, 0x300, v4 +; GFX9-NEXT: v_add_u32_e32 v37, 0x300, v5 +; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v6 +; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v12 +; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v14 +; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v16 +; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v18 +; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v19 +; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v21 +; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v23 +; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v25 +; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v27 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v29 +; GFX9-NEXT: v_lshl_or_b32 v0, v8, 16, v0 +; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v13 +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v20 +; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v22 +; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v24 +; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v26 +; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v28 +; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v30 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; GFX9-NEXT: s_add_i32 s28, s28, 3 -; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 -; GFX9-NEXT: v_mov_b32_e32 v3, s29 -; GFX9-NEXT: v_perm_b32 v3, s28, v3, v19 -; GFX9-NEXT: s_add_i32 s62, s62, 3 -; GFX9-NEXT: v_mov_b32_e32 v4, s59 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 -; GFX9-NEXT: v_perm_b32 v4, s62, v4, v19 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; GFX9-NEXT: s_add_i32 s74, s74, 3 -; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 -; GFX9-NEXT: v_mov_b32_e32 v4, s46 -; GFX9-NEXT: v_perm_b32 v4, s74, v4, v19 -; GFX9-NEXT: s_add_i32 s45, s45, 3 -; GFX9-NEXT: v_mov_b32_e32 v5, s44 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 -; GFX9-NEXT: v_perm_b32 v5, s45, v5, v19 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX9-NEXT: s_add_i32 s75, s75, 3 -; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: v_mov_b32_e32 v5, s43 -; GFX9-NEXT: v_perm_b32 v5, s75, v5, v19 -; GFX9-NEXT: s_add_i32 s42, s42, 3 -; GFX9-NEXT: v_mov_b32_e32 v6, s41 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 -; GFX9-NEXT: v_perm_b32 v6, s42, v6, v19 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: s_add_i32 s76, s76, 3 -; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: v_mov_b32_e32 v6, s40 -; GFX9-NEXT: v_perm_b32 v6, s76, v6, v19 -; GFX9-NEXT: s_add_i32 s15, s15, 3 -; GFX9-NEXT: v_mov_b32_e32 v7, s14 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_perm_b32 v7, s15, v7, v19 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX9-NEXT: s_add_i32 s73, s73, 3 -; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 -; GFX9-NEXT: v_mov_b32_e32 v7, s13 -; GFX9-NEXT: v_perm_b32 v7, s73, v7, v19 -; GFX9-NEXT: s_add_i32 s12, s12, 3 -; GFX9-NEXT: v_mov_b32_e32 v22, s11 -; GFX9-NEXT: s_add_i32 s72, s72, 3 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 -; GFX9-NEXT: v_perm_b32 v22, s12, v22, v19 -; GFX9-NEXT: v_perm_b32 v18, s72, v18, v19 -; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v22 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; GFX9-NEXT: s_add_i32 s10, s10, 3 -; GFX9-NEXT: v_mov_b32_e32 v23, s9 -; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v12 -; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v14 -; GFX9-NEXT: s_add_i32 s47, s47, 3 -; GFX9-NEXT: v_lshl_or_b32 v7, v22, 16, v7 -; GFX9-NEXT: v_mov_b32_e32 v22, s7 -; GFX9-NEXT: v_perm_b32 v23, s10, v23, v19 -; GFX9-NEXT: s_add_i32 s8, s8, 3 -; GFX9-NEXT: v_mov_b32_e32 v24, s6 -; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v11 -; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v15 -; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v18 -; GFX9-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; GFX9-NEXT: v_perm_b32 v22, s47, v22, v19 -; GFX9-NEXT: v_perm_b32 v19, s8, v24, v19 -; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v8 -; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v9 -; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v10 -; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 -; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v16 -; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v17 -; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v21 -; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v23 -; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX9-NEXT: v_lshl_or_b32 v12, v14, 16, v12 -; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v28 -; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v20 -; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v22 -; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v19 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v15, 16, v11 -; GFX9-NEXT: v_lshl_or_b32 v13, v13, 16, v14 -; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v26 -; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v24 -; GFX9-NEXT: v_lshl_or_b32 v8, v18, 16, v8 -; GFX9-NEXT: v_lshl_or_b32 v9, v17, 16, v9 -; GFX9-NEXT: v_lshl_or_b32 v10, v16, 16, v10 -; GFX9-NEXT: v_lshl_or_b32 v14, v27, 16, v14 -; GFX9-NEXT: v_lshl_or_b32 v15, v25, 16, v15 +; GFX9-NEXT: v_lshl_or_b32 v7, v15, 16, v7 +; GFX9-NEXT: v_lshl_or_b32 v8, v14, 16, v8 +; GFX9-NEXT: v_lshl_or_b32 v9, v12, 16, v9 +; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10 +; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v48 +; GFX9-NEXT: v_and_b32_e32 v12, 0xffff, v38 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v36 +; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v34 +; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v32 +; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1 +; GFX9-NEXT: v_lshl_or_b32 v2, v20, 16, v2 +; GFX9-NEXT: v_lshl_or_b32 v3, v19, 16, v3 +; GFX9-NEXT: v_lshl_or_b32 v4, v18, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v17, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v16, 16, v6 +; GFX9-NEXT: v_lshl_or_b32 v11, v49, 16, v11 +; GFX9-NEXT: v_lshl_or_b32 v12, v39, 16, v12 +; GFX9-NEXT: v_lshl_or_b32 v13, v37, 16, v13 +; GFX9-NEXT: v_lshl_or_b32 v14, v35, 16, v14 +; GFX9-NEXT: v_lshl_or_b32 v15, v33, 16, v15 ; GFX9-NEXT: .LBB107_3: ; %end ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -84481,7 +84405,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v13 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v12 +; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v12 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v11 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 @@ -84501,13 +84425,13 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v2 +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: ; kill: killed $vgpr1 ; SI-NEXT: ; implicit-def: $vgpr1 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 ; SI-NEXT: v_mul_f32_e32 v28, 1.0, v27 -; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22 +; SI-NEXT: v_mul_f32_e32 v23, 1.0, v23 ; SI-NEXT: v_mul_f32_e32 v27, 1.0, v2 ; SI-NEXT: v_mul_f32_e32 v32, 1.0, v31 ; SI-NEXT: v_mul_f32_e32 v33, 1.0, v3 @@ -84527,7 +84451,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_mul_f32_e32 v53, 1.0, v10 ; SI-NEXT: v_mul_f32_e32 v42, 1.0, v35 ; SI-NEXT: v_mul_f32_e32 v43, 1.0, v11 -; SI-NEXT: v_mul_f32_e32 v35, 1.0, v23 +; SI-NEXT: v_mul_f32_e32 v35, 1.0, v22 ; SI-NEXT: v_mul_f32_e32 v41, 1.0, v12 ; SI-NEXT: v_mul_f32_e32 v45, 1.0, v21 ; SI-NEXT: v_mul_f32_e32 v46, 1.0, v13 @@ -84543,24 +84467,24 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr20 -; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr19 -; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr60 +; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr14 ; SI-NEXT: ; implicit-def: $vgpr15 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr13 ; SI-NEXT: ; implicit-def: $vgpr11 ; SI-NEXT: ; implicit-def: $vgpr12 -; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr10 ; SI-NEXT: ; implicit-def: $vgpr8 ; SI-NEXT: ; implicit-def: $vgpr9 @@ -84579,7 +84503,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB108_2 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v28 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v22 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v23 ; SI-NEXT: v_alignbit_b32 v48, v1, v29, 16 ; SI-NEXT: v_alignbit_b32 v50, v37, v27, 16 ; SI-NEXT: v_alignbit_b32 v1, v50, v48, 24 @@ -84593,15 +84517,15 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v32 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v24 -; SI-NEXT: v_alignbit_b32 v23, v1, v33, 16 +; SI-NEXT: v_alignbit_b32 v22, v1, v33, 16 ; SI-NEXT: v_alignbit_b32 v21, v19, v31, 16 -; SI-NEXT: v_alignbit_b32 v1, v21, v23, 24 +; SI-NEXT: v_alignbit_b32 v1, v21, v22, 24 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v21, v23, 16 +; SI-NEXT: v_alignbit_b32 v1, v21, v22, 16 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v21, v23, 8 +; SI-NEXT: v_alignbit_b32 v1, v21, v22, 8 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v36 @@ -84648,7 +84572,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v8, v1, v43, 16 ; SI-NEXT: v_alignbit_b32 v9, v7, v41, 16 ; SI-NEXT: v_alignbit_b32 v1, v9, v8, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v9, v8, 16 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill @@ -84661,7 +84585,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v5, v1, v46, 16 ; SI-NEXT: v_alignbit_b32 v6, v4, v44, 16 ; SI-NEXT: v_alignbit_b32 v1, v6, v5, 24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v1, v6, v5, 16 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill @@ -84677,47 +84601,47 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v20, v3, v2, 16 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v20, v3, v2, 8 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v20, 24, v22 -; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v18 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v20, 24, v23 +; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v21 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v26 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v18 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v15 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v26 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v30 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v30 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v35 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v40 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v40 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v9 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v9 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v6 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v6 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v3 -; SI-NEXT: v_lshrrev_b32_e32 v63, 8, v50 -; SI-NEXT: v_lshrrev_b32_e32 v62, 24, v24 -; SI-NEXT: v_lshrrev_b32_e32 v59, 8, v21 -; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v25 +; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v3 +; SI-NEXT: v_lshrrev_b32_e32 v62, 8, v50 +; SI-NEXT: v_lshrrev_b32_e32 v61, 24, v24 +; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v25 ; SI-NEXT: v_lshrrev_b32_e32 v58, 24, v52 -; SI-NEXT: v_lshrrev_b32_e32 v61, 8, v12 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v63, 8, v15 +; SI-NEXT: v_lshrrev_b32_e32 v60, 8, v12 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr22 +; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr33 @@ -84756,7 +84680,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 ; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_alignbit_b32 v23, v20, v19, 16 +; SI-NEXT: v_alignbit_b32 v22, v20, v19, 16 ; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v31 ; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v19 ; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v24 @@ -84769,13 +84693,13 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22 +; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 ; SI-NEXT: v_alignbit_b32 v48, v28, v20, 16 ; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v27 -; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 +; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 ; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v36 ; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v22 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v23 ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v38 ; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 ; SI-NEXT: v_alignbit_b32 v50, v37, v20, 16 @@ -84800,14 +84724,14 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v16 ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v20, v21, v23, 24 +; SI-NEXT: v_alignbit_b32 v20, v21, v22, 24 ; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v54 ; SI-NEXT: v_alignbit_b32 v14, v14, v13, 16 ; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v39 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v25 ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v20, v21, v23, 16 +; SI-NEXT: v_alignbit_b32 v20, v21, v22, 16 ; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v55 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 ; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v13 @@ -84815,7 +84739,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v18, v16, v18, 16 ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v20, v21, v23, 8 +; SI-NEXT: v_alignbit_b32 v20, v21, v22, 8 ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v13 @@ -84888,7 +84812,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v2, v2, v1, 16 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v47 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v52 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v20, v9, v8, 16 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v1 @@ -84902,7 +84826,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v20, v6, v5, 24 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v40 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v20, v6, v5, 16 ; SI-NEXT: v_alignbit_b32 v3, v1, v3, 16 @@ -84915,49 +84839,49 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v20, v3, v2, 16 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_alignbit_b32 v20, v3, v2, 8 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v18 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v21 +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v15 -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v18 +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v20, 24, v22 -; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v26 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v20, 24, v23 +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v26 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v30 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v30 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v35 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v40 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v40 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v9 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v9 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v6 -; SI-NEXT: v_lshrrev_b32_e32 v63, 8, v50 -; SI-NEXT: v_lshrrev_b32_e32 v59, 8, v21 -; SI-NEXT: v_lshrrev_b32_e32 v62, 24, v24 -; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v25 +; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v6 +; SI-NEXT: v_lshrrev_b32_e32 v62, 8, v50 +; SI-NEXT: v_lshrrev_b32_e32 v61, 24, v24 +; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v25 ; SI-NEXT: v_lshrrev_b32_e32 v58, 24, v52 -; SI-NEXT: v_lshrrev_b32_e32 v61, 8, v12 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v63, 8, v15 +; SI-NEXT: v_lshrrev_b32_e32 v60, 8, v12 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v3 -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v3 +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: .LBB108_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v22, 0xff, v48 +; SI-NEXT: v_and_b32_e32 v23, 0xff, v48 ; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v20 ; SI-NEXT: v_and_b32_e32 v19, 0xff, v19 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 @@ -84982,31 +84906,31 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v24, 8, v24 -; SI-NEXT: v_or_b32_e32 v22, v22, v24 +; SI-NEXT: v_or_b32_e32 v23, v23, v24 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v25, 24, v25 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v24, v25, v24 -; SI-NEXT: v_or_b32_e32 v22, v22, v24 -; SI-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen +; SI-NEXT: v_or_b32_e32 v23, v23, v24 +; SI-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v22, 0xff, v50 -; SI-NEXT: v_lshlrev_b32_e32 v24, 8, v63 -; SI-NEXT: v_or_b32_e32 v22, v22, v24 +; SI-NEXT: v_and_b32_e32 v23, 0xff, v50 +; SI-NEXT: v_lshlrev_b32_e32 v24, 8, v62 +; SI-NEXT: v_or_b32_e32 v23, v23, v24 ; SI-NEXT: v_and_b32_e32 v24, 0xff, v37 ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v20, v20, v24 -; SI-NEXT: v_or_b32_e32 v20, v22, v20 -; SI-NEXT: v_add_i32_e32 v22, vcc, 4, v0 -; SI-NEXT: buffer_store_dword v20, v22, s[0:3], 0 offen -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v20, v23, v20 +; SI-NEXT: v_add_i32_e32 v23, vcc, 4, v0 +; SI-NEXT: buffer_store_dword v20, v23, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v20, 0xff, v23 +; SI-NEXT: v_and_b32_e32 v20, 0xff, v22 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v22 @@ -85024,9 +84948,11 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v20, v22, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v21, 8, v59 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v21, 8, v21 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v62 +; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v61 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v19, v21, v19 ; SI-NEXT: v_or_b32_e32 v19, v20, v19 @@ -85051,11 +84977,11 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v17, v19, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v17, 0xff, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v18 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v60 +; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v59 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: v_or_b32_e32 v16, v18, v16 ; SI-NEXT: v_or_b32_e32 v16, v17, v16 @@ -85080,11 +85006,9 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v14, v16, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v14, 0xff, v15 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v15, 8, v15 +; SI-NEXT: v_lshlrev_b32_e32 v15, 8, v63 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v15 @@ -85111,9 +85035,9 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v11, v13, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v11, 0xff, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v61 +; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v60 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12 @@ -85123,7 +85047,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v10, v11, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10 ; SI-NEXT: v_or_b32_e32 v8, v8, v10 @@ -85140,7 +85064,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v8, v10, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v8, 0xff, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 @@ -85154,7 +85078,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7 ; SI-NEXT: v_or_b32_e32 v5, v5, v7 @@ -85171,7 +85095,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v5, 0xff, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 @@ -85182,12 +85106,12 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v5, vcc, 52, v0 ; SI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; SI-NEXT: v_or_b32_e32 v2, v2, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5 @@ -85251,111 +85175,108 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr31 -; VI-NEXT: ; implicit-def: $vgpr30 -; VI-NEXT: ; implicit-def: $vgpr23 -; VI-NEXT: ; implicit-def: $vgpr29 -; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; implicit-def: $vgpr27 +; VI-NEXT: ; implicit-def: $vgpr25 +; VI-NEXT: ; implicit-def: $vgpr26 +; VI-NEXT: ; implicit-def: $vgpr24 ; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr61 -; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: ; implicit-def: $vgpr60 ; VI-NEXT: ; implicit-def: $vgpr59 +; VI-NEXT: ; implicit-def: $vgpr23 ; VI-NEXT: ; implicit-def: $vgpr58 ; VI-NEXT: ; implicit-def: $vgpr57 ; VI-NEXT: ; implicit-def: $vgpr56 ; VI-NEXT: ; implicit-def: $vgpr47 ; VI-NEXT: ; implicit-def: $vgpr46 +; VI-NEXT: ; implicit-def: $vgpr22 ; VI-NEXT: ; implicit-def: $vgpr45 ; VI-NEXT: ; implicit-def: $vgpr44 ; VI-NEXT: ; implicit-def: $vgpr43 ; VI-NEXT: ; implicit-def: $vgpr42 ; VI-NEXT: ; implicit-def: $vgpr41 +; VI-NEXT: ; implicit-def: $vgpr21 ; VI-NEXT: ; implicit-def: $vgpr40 ; VI-NEXT: ; implicit-def: $vgpr55 ; VI-NEXT: ; implicit-def: $vgpr54 ; VI-NEXT: ; implicit-def: $vgpr53 ; VI-NEXT: ; implicit-def: $vgpr52 +; VI-NEXT: ; implicit-def: $vgpr20 ; VI-NEXT: ; implicit-def: $vgpr51 ; VI-NEXT: ; implicit-def: $vgpr50 ; VI-NEXT: ; implicit-def: $vgpr49 ; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr19 ; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 ; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: ; implicit-def: $vgpr34 +; VI-NEXT: ; implicit-def: $vgpr18 ; VI-NEXT: ; implicit-def: $vgpr33 ; VI-NEXT: ; implicit-def: $vgpr32 -; VI-NEXT: ; kill: killed $vgpr17 -; VI-NEXT: ; implicit-def: $vgpr27 -; VI-NEXT: ; implicit-def: $vgpr24 -; VI-NEXT: ; implicit-def: $vgpr26 -; VI-NEXT: ; implicit-def: $vgpr25 -; VI-NEXT: ; implicit-def: $vgpr22 -; VI-NEXT: ; implicit-def: $vgpr19 -; VI-NEXT: ; implicit-def: $vgpr18 +; VI-NEXT: ; implicit-def: $vgpr31 +; VI-NEXT: ; implicit-def: $vgpr30 +; VI-NEXT: ; implicit-def: $vgpr29 ; VI-NEXT: ; implicit-def: $vgpr17 +; VI-NEXT: ; implicit-def: $vgpr28 +; VI-NEXT: ; kill: killed $vgpr27 +; VI-NEXT: ; implicit-def: $vgpr27 ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; VI-NEXT: s_cbranch_execz .LBB108_2 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16 ; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8] -; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v16 ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; VI-NEXT: v_mov_b32_e32 v27, v21 -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4] -; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 +; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; VI-NEXT: .LBB108_2: ; %Flow ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; VI-NEXT: s_cbranch_execz .LBB108_4 @@ -85652,153 +85573,150 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] ; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] -; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10] -; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8] -; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4] -; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2] -; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v16 -; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16 +; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] +; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] +; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; VI-NEXT: v_lshrrev_b32_e32 v25, 24, v16 +; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15 -; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15 -; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14 -; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14 -; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13 -; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13 -; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12 -; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12 -; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12 -; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 -; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11 -; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10 -; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10 -; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10 -; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9 -; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9 -; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8 -; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8 -; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8 -; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7 -; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6 -; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6 -; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6 -; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5 -; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5 -; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4 -; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4 -; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4 -; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3 -; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3 -; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2 -; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 -; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1 -; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v16 +; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 +; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v15 +; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14 +; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v14 +; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14 +; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 +; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13 +; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v12 +; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v12 +; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 +; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11 +; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10 +; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v10 +; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10 +; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v9 +; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v9 +; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v8 +; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v8 +; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v7 +; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6 +; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6 +; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v6 +; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 +; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v4 +; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v4 +; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v4 +; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3 +; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2 +; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v2 +; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2 +; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1 +; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; VI-NEXT: .LBB108_4: ; %end ; VI-NEXT: s_or_b64 exec, exec, s[4:5] ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v21, v30, v23, s4 -; VI-NEXT: v_perm_b32 v1, v1, v31, s4 -; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 -; VI-NEXT: v_or_b32_e32 v1, v1, v21 +; VI-NEXT: v_perm_b32 v24, v26, v24, s4 +; VI-NEXT: v_perm_b32 v1, v1, v25, s4 +; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; VI-NEXT: v_or_b32_e32 v1, v1, v24 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v28, v63, s4 -; VI-NEXT: v_perm_b32 v2, v2, v29, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v1, v2, v63, s4 +; VI-NEXT: v_perm_b32 v2, v62, v61, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v1, v61, v20, s4 -; VI-NEXT: v_perm_b32 v2, v3, v62, s4 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v1 +; VI-NEXT: v_perm_b32 v2, v59, v23, s4 +; VI-NEXT: v_perm_b32 v1, v3, v60, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v59, v58, s4 -; VI-NEXT: v_perm_b32 v1, v4, v60, s4 +; VI-NEXT: v_perm_b32 v2, v57, v56, s4 +; VI-NEXT: v_perm_b32 v1, v4, v58, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v56, v26, s4 -; VI-NEXT: v_perm_b32 v1, v5, v57, s4 +; VI-NEXT: v_perm_b32 v2, v46, v22, s4 +; VI-NEXT: v_perm_b32 v1, v5, v47, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v46, v45, s4 -; VI-NEXT: v_perm_b32 v1, v6, v47, s4 +; VI-NEXT: v_perm_b32 v2, v44, v43, s4 +; VI-NEXT: v_perm_b32 v1, v6, v45, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v43, v25, s4 -; VI-NEXT: v_perm_b32 v1, v7, v44, s4 +; VI-NEXT: v_perm_b32 v2, v41, v21, s4 +; VI-NEXT: v_perm_b32 v1, v7, v42, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v41, v40, s4 -; VI-NEXT: v_perm_b32 v1, v8, v42, s4 +; VI-NEXT: v_perm_b32 v2, v55, v54, s4 +; VI-NEXT: v_perm_b32 v1, v8, v40, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v54, v22, s4 -; VI-NEXT: v_perm_b32 v1, v9, v55, s4 +; VI-NEXT: v_perm_b32 v2, v52, v20, s4 +; VI-NEXT: v_perm_b32 v1, v9, v53, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v52, v51, s4 -; VI-NEXT: v_perm_b32 v1, v10, v53, s4 +; VI-NEXT: v_perm_b32 v2, v50, v49, s4 +; VI-NEXT: v_perm_b32 v1, v10, v51, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v49, v19, s4 -; VI-NEXT: v_perm_b32 v1, v11, v50, s4 +; VI-NEXT: v_perm_b32 v2, v39, v19, s4 +; VI-NEXT: v_perm_b32 v1, v11, v48, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v39, v38, s4 -; VI-NEXT: v_perm_b32 v1, v12, v48, s4 +; VI-NEXT: v_perm_b32 v2, v37, v36, s4 +; VI-NEXT: v_perm_b32 v1, v12, v38, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v36, v18, s4 -; VI-NEXT: v_perm_b32 v1, v13, v37, s4 +; VI-NEXT: v_perm_b32 v2, v34, v18, s4 +; VI-NEXT: v_perm_b32 v1, v13, v35, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: v_perm_b32 v2, v34, v33, s4 -; VI-NEXT: v_perm_b32 v1, v14, v35, s4 +; VI-NEXT: v_perm_b32 v2, v32, v31, s4 +; VI-NEXT: v_perm_b32 v1, v14, v33, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v1, v15, v32, s4 -; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v2, v17, s4 +; VI-NEXT: v_perm_b32 v2, v29, v17, s4 +; VI-NEXT: v_perm_b32 v1, v15, v30, s4 ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0 ; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; VI-NEXT: v_perm_b32 v2, v27, v24, s4 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v1, v16, v28, s4 ; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v1, v16, v1, s4 +; VI-NEXT: v_perm_b32 v2, v27, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -85843,111 +85761,107 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr17 ; GFX9-NEXT: ; kill: killed $vgpr17 ; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr28 -; GFX9-NEXT: ; implicit-def: $vgpr63 +; GFX9-NEXT: ; implicit-def: $vgpr25 +; GFX9-NEXT: ; implicit-def: $vgpr52 ; GFX9-NEXT: ; implicit-def: $vgpr24 +; GFX9-NEXT: ; implicit-def: $vgpr27 +; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr28 +; GFX9-NEXT: ; implicit-def: $vgpr39 +; GFX9-NEXT: ; implicit-def: $vgpr23 ; GFX9-NEXT: ; implicit-def: $vgpr29 -; GFX9-NEXT: ; implicit-def: $vgpr61 -; GFX9-NEXT: ; implicit-def: $vgpr53 -; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr42 +; GFX9-NEXT: ; implicit-def: $vgpr63 +; GFX9-NEXT: ; implicit-def: $vgpr22 +; GFX9-NEXT: ; implicit-def: $vgpr38 ; GFX9-NEXT: ; implicit-def: $vgpr60 +; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: ; implicit-def: $vgpr30 +; GFX9-NEXT: ; implicit-def: $vgpr57 ; GFX9-NEXT: ; implicit-def: $vgpr21 ; GFX9-NEXT: ; implicit-def: $vgpr31 -; GFX9-NEXT: ; implicit-def: $vgpr58 -; GFX9-NEXT: ; implicit-def: $vgpr52 -; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr56 +; GFX9-NEXT: ; implicit-def: $vgpr54 +; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr47 +; GFX9-NEXT: ; implicit-def: $vgpr20 +; GFX9-NEXT: ; implicit-def: $vgpr53 +; GFX9-NEXT: ; implicit-def: $vgpr46 +; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr32 +; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr19 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr44 -; GFX9-NEXT: ; implicit-def: $vgpr51 -; GFX9-NEXT: ; implicit-def: $vgpr34 ; GFX9-NEXT: ; implicit-def: $vgpr43 -; GFX9-NEXT: ; implicit-def: $vgpr35 -; GFX9-NEXT: ; implicit-def: $vgpr42 -; GFX9-NEXT: ; implicit-def: $vgpr50 -; GFX9-NEXT: ; implicit-def: $vgpr36 +; GFX9-NEXT: ; kill: killed $vgpr17 ; GFX9-NEXT: ; implicit-def: $vgpr41 -; GFX9-NEXT: ; implicit-def: $vgpr37 +; GFX9-NEXT: ; implicit-def: $vgpr18 +; GFX9-NEXT: ; implicit-def: $vgpr17 ; GFX9-NEXT: ; implicit-def: $vgpr40 ; GFX9-NEXT: ; implicit-def: $vgpr62 -; GFX9-NEXT: ; implicit-def: $vgpr38 +; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr55 -; GFX9-NEXT: ; implicit-def: $vgpr39 -; GFX9-NEXT: ; implicit-def: $vgpr54 -; GFX9-NEXT: ; implicit-def: $vgpr59 ; GFX9-NEXT: ; implicit-def: $vgpr48 -; GFX9-NEXT: ; implicit-def: $vgpr49 -; GFX9-NEXT: ; implicit-def: $vgpr57 -; GFX9-NEXT: ; implicit-def: $vgpr56 -; GFX9-NEXT: ; implicit-def: $vgpr46 -; GFX9-NEXT: ; kill: killed $vgpr17 -; GFX9-NEXT: ; implicit-def: $vgpr45 +; GFX9-NEXT: ; implicit-def: $vgpr59 ; GFX9-NEXT: ; implicit-def: $vgpr26 -; GFX9-NEXT: ; implicit-def: $vgpr23 -; GFX9-NEXT: ; implicit-def: $vgpr20 -; GFX9-NEXT: ; implicit-def: $vgpr19 -; GFX9-NEXT: ; implicit-def: $vgpr18 -; GFX9-NEXT: ; implicit-def: $vgpr17 +; GFX9-NEXT: ; implicit-def: $vgpr58 ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB108_2 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v16 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v14 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v13 -; GFX9-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16] +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v13 +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v4 +; GFX9-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14] ; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12] ; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8] -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v1 -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6] -; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4] +; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8] +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4] ; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2] +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v4 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v1 +; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[15:16] +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v1 ; GFX9-NEXT: .LBB108_2: ; %Flow ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB108_4 @@ -85961,7 +85875,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v17 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v17, v17 ; GFX9-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v58, v18, v19, vcc ; GFX9-NEXT: v_bfe_u32 v18, v2, 16, 1 ; GFX9-NEXT: v_add3_u32 v18, v18, v2, s6 ; GFX9-NEXT: v_or_b32_e32 v19, 0x400000, v2 @@ -85997,344 +85911,340 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 { ; GFX9-NEXT: v_cndmask_b32_e32 v4, v20, v21, vcc ; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v3 ; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 -; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 +; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 +; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6 ; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 -; GFX9-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; GFX9-NEXT: v_cndmask_b32_e32 v20, v21, v22, vcc -; GFX9-NEXT: v_bfe_u32 v21, v3, 16, 1 -; GFX9-NEXT: v_add3_u32 v21, v21, v3, s6 -; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v3 +; GFX9-NEXT: v_bfe_u32 v20, v3, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v34, v21, v22, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v3, s6 +; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v3 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v21, v22, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v21, 16, v6 -; GFX9-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 -; GFX9-NEXT: v_bfe_u32 v22, v21, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v3, v20, v21, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v6 +; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 -; GFX9-NEXT: v_add3_u32 v22, v22, v21, s6 -; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v21 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v21, v21 +; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 -; GFX9-NEXT: v_cndmask_b32_e32 v21, v22, v23, vcc -; GFX9-NEXT: v_bfe_u32 v22, v6, 16, 1 -; GFX9-NEXT: v_add3_u32 v22, v22, v6, s6 -; GFX9-NEXT: v_or_b32_e32 v23, 0x400000, v6 +; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6 +; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 +; GFX9-NEXT: v_bfe_u32 v20, v6, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v35, v21, v22, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v6, s6 +; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v6 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v6, v6 -; GFX9-NEXT: v_cndmask_b32_e32 v6, v22, v23, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v22, 16, v5 -; GFX9-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 -; GFX9-NEXT: v_bfe_u32 v23, v22, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v6, v20, v21, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v5 +; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff0000, v5 -; GFX9-NEXT: v_add3_u32 v23, v23, v22, s6 -; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v22 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v22, v22 +; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v22, v23, v24, vcc -; GFX9-NEXT: v_bfe_u32 v23, v5, 16, 1 -; GFX9-NEXT: v_add3_u32 v23, v23, v5, s6 -; GFX9-NEXT: v_or_b32_e32 v24, 0x400000, v5 +; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6 +; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 +; GFX9-NEXT: v_bfe_u32 v20, v5, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v51, v21, v22, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v5, s6 +; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v5 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v5, v5 -; GFX9-NEXT: v_cndmask_b32_e32 v5, v23, v24, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v23, 16, v8 -; GFX9-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 -; GFX9-NEXT: v_bfe_u32 v24, v23, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v5, v20, v21, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v8 +; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX9-NEXT: v_and_b32_e32 v8, 0xffff0000, v8 -; GFX9-NEXT: v_add3_u32 v24, v24, v23, s6 -; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v23 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v23, v23 +; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX9-NEXT: v_cndmask_b32_e32 v23, v24, v25, vcc -; GFX9-NEXT: v_bfe_u32 v24, v8, 16, 1 -; GFX9-NEXT: v_add3_u32 v24, v24, v8, s6 -; GFX9-NEXT: v_or_b32_e32 v25, 0x400000, v8 +; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6 +; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 +; GFX9-NEXT: v_bfe_u32 v20, v8, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v52, v21, v22, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v8, s6 +; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v8 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v8, v8 -; GFX9-NEXT: v_cndmask_b32_e32 v8, v24, v25, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v24, 16, v7 -; GFX9-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 -; GFX9-NEXT: v_bfe_u32 v25, v24, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v8, v20, v21, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v7 +; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; GFX9-NEXT: v_add3_u32 v25, v25, v24, s6 -; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v24 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v24, v24 +; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v7, 0x40c00000, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v24, v25, v26, vcc -; GFX9-NEXT: v_bfe_u32 v25, v7, 16, 1 -; GFX9-NEXT: v_add3_u32 v25, v25, v7, s6 -; GFX9-NEXT: v_or_b32_e32 v26, 0x400000, v7 +; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6 +; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 +; GFX9-NEXT: v_bfe_u32 v20, v7, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v53, v21, v22, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v7, s6 +; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v7 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v7, v7 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v25, v26, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v25, 16, v10 -; GFX9-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 -; GFX9-NEXT: v_bfe_u32 v26, v25, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v7, v20, v21, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v10 +; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 -; GFX9-NEXT: v_add3_u32 v26, v26, v25, s6 -; GFX9-NEXT: v_or_b32_e32 v27, 0x400000, v25 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v25, v25 +; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 -; GFX9-NEXT: v_cndmask_b32_e32 v25, v26, v27, vcc -; GFX9-NEXT: v_bfe_u32 v26, v10, 16, 1 -; GFX9-NEXT: v_add3_u32 v26, v26, v10, s6 -; GFX9-NEXT: v_or_b32_e32 v27, 0x400000, v10 +; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6 +; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 +; GFX9-NEXT: v_bfe_u32 v20, v10, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v49, v21, v22, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v10, s6 +; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v10 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v10, v10 -; GFX9-NEXT: v_cndmask_b32_e32 v10, v26, v27, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v26, 16, v9 -; GFX9-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 -; GFX9-NEXT: v_bfe_u32 v27, v26, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v10, v20, v21, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v9 +; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX9-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 -; GFX9-NEXT: v_add3_u32 v27, v27, v26, s6 -; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v26 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v26, v26 +; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 -; GFX9-NEXT: v_cndmask_b32_e32 v26, v27, v36, vcc -; GFX9-NEXT: v_bfe_u32 v27, v9, 16, 1 -; GFX9-NEXT: v_add3_u32 v27, v27, v9, s6 -; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v9 +; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6 +; GFX9-NEXT: v_or_b32_e32 v22, 0x400000, v20 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 +; GFX9-NEXT: v_bfe_u32 v20, v9, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v50, v21, v22, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v9, s6 +; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v9 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v9, v9 -; GFX9-NEXT: v_cndmask_b32_e32 v9, v27, v36, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v27, 16, v12 -; GFX9-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 -; GFX9-NEXT: v_bfe_u32 v38, v27, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v9, v20, v21, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v12 +; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX9-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 -; GFX9-NEXT: v_add3_u32 v38, v38, v27, s6 -; GFX9-NEXT: v_or_b32_e32 v39, 0x400000, v27 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v27, v27 +; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 -; GFX9-NEXT: v_cndmask_b32_e32 v27, v38, v39, vcc -; GFX9-NEXT: v_bfe_u32 v38, v12, 16, 1 -; GFX9-NEXT: v_add3_u32 v38, v38, v12, s6 -; GFX9-NEXT: v_or_b32_e32 v39, 0x400000, v12 +; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6 +; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v20 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 +; GFX9-NEXT: v_bfe_u32 v20, v12, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v39, v21, v32, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v12, s6 +; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v12 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v12, v12 -; GFX9-NEXT: v_cndmask_b32_e32 v12, v38, v39, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v38, 16, v11 -; GFX9-NEXT: v_add_f32_e32 v38, 0x40c00000, v38 +; GFX9-NEXT: v_cndmask_b32_e32 v12, v20, v21, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v11 +; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX9-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 -; GFX9-NEXT: v_bfe_u32 v48, v38, 16, 1 +; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 -; GFX9-NEXT: v_add3_u32 v48, v48, v38, s6 -; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v38 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v38, v38 -; GFX9-NEXT: v_bfe_u32 v38, v11, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v52, v48, v49, vcc -; GFX9-NEXT: v_add3_u32 v38, v38, v11, s6 -; GFX9-NEXT: v_or_b32_e32 v48, 0x400000, v11 +; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6 +; GFX9-NEXT: v_or_b32_e32 v32, 0x400000, v20 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 +; GFX9-NEXT: v_bfe_u32 v20, v11, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v48, v21, v32, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v11, s6 +; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v11 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v11, v11 -; GFX9-NEXT: v_cndmask_b32_e32 v11, v38, v48, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v14 -; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48 +; GFX9-NEXT: v_cndmask_b32_e32 v11, v20, v21, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v14 +; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX9-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 -; GFX9-NEXT: v_bfe_u32 v49, v48, 16, 1 +; GFX9-NEXT: v_bfe_u32 v21, v20, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 -; GFX9-NEXT: v_add3_u32 v49, v49, v48, s6 -; GFX9-NEXT: v_or_b32_e32 v50, 0x400000, v48 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48 -; GFX9-NEXT: v_bfe_u32 v48, v14, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v53, v49, v50, vcc -; GFX9-NEXT: v_add3_u32 v48, v48, v14, s6 -; GFX9-NEXT: v_or_b32_e32 v49, 0x400000, v14 +; GFX9-NEXT: v_add3_u32 v21, v21, v20, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v20 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 +; GFX9-NEXT: v_bfe_u32 v20, v14, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v37, v21, v36, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v14, s6 +; GFX9-NEXT: v_or_b32_e32 v21, 0x400000, v14 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v14, v14 -; GFX9-NEXT: v_cndmask_b32_e32 v14, v48, v49, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v48, 16, v13 -; GFX9-NEXT: v_add_f32_e32 v48, 0x40c00000, v48 +; GFX9-NEXT: v_cndmask_b32_e32 v14, v20, v21, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v20, 16, v13 +; GFX9-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; GFX9-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 -; GFX9-NEXT: v_bfe_u32 v50, v48, 16, 1 +; GFX9-NEXT: v_bfe_u32 v36, v20, 16, 1 ; GFX9-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; GFX9-NEXT: v_add3_u32 v50, v50, v48, s6 -; GFX9-NEXT: v_or_b32_e32 v51, 0x400000, v48 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v48, v48 -; GFX9-NEXT: v_bfe_u32 v48, v13, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v54, v50, v51, vcc -; GFX9-NEXT: v_add3_u32 v48, v48, v13, s6 -; GFX9-NEXT: v_or_b32_e32 v50, 0x400000, v13 +; GFX9-NEXT: v_add3_u32 v36, v36, v20, s6 +; GFX9-NEXT: v_or_b32_e32 v38, 0x400000, v20 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v20, v20 +; GFX9-NEXT: v_bfe_u32 v20, v13, 16, 1 +; GFX9-NEXT: v_cndmask_b32_e32 v38, v36, v38, vcc +; GFX9-NEXT: v_add3_u32 v20, v20, v13, s6 +; GFX9-NEXT: v_or_b32_e32 v36, 0x400000, v13 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v13, v13 -; GFX9-NEXT: v_cndmask_b32_e32 v13, v48, v50, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v50, 16, v16 -; GFX9-NEXT: v_add_f32_e32 v50, 0x40c00000, v50 +; GFX9-NEXT: v_cndmask_b32_e32 v13, v20, v36, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v36, 16, v16 +; GFX9-NEXT: v_add_f32_e32 v36, 0x40c00000, v36 +; GFX9-NEXT: v_bfe_u32 v54, v36, 16, 1 ; GFX9-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 -; GFX9-NEXT: v_bfe_u32 v51, v50, 16, 1 +; GFX9-NEXT: v_add3_u32 v54, v54, v36, s6 +; GFX9-NEXT: v_or_b32_e32 v55, 0x400000, v36 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v36, v36 ; GFX9-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 -; GFX9-NEXT: v_add3_u32 v51, v51, v50, s6 -; GFX9-NEXT: v_or_b32_e32 v55, 0x400000, v50 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v50, v50 -; GFX9-NEXT: v_bfe_u32 v50, v16, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v55, v51, v55, vcc -; GFX9-NEXT: v_add3_u32 v50, v50, v16, s6 -; GFX9-NEXT: v_or_b32_e32 v51, 0x400000, v16 +; GFX9-NEXT: v_cndmask_b32_e32 v36, v54, v55, vcc +; GFX9-NEXT: v_bfe_u32 v54, v16, 16, 1 +; GFX9-NEXT: v_add3_u32 v54, v54, v16, s6 +; GFX9-NEXT: v_or_b32_e32 v55, 0x400000, v16 ; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v16, v16 -; GFX9-NEXT: v_cndmask_b32_e32 v16, v50, v51, vcc -; GFX9-NEXT: v_lshlrev_b32_e32 v50, 16, v15 -; GFX9-NEXT: v_add_f32_e32 v50, 0x40c00000, v50 +; GFX9-NEXT: v_cndmask_b32_e32 v16, v54, v55, vcc +; GFX9-NEXT: v_lshlrev_b32_e32 v54, 16, v15 +; GFX9-NEXT: v_add_f32_e32 v54, 0x40c00000, v54 +; GFX9-NEXT: v_bfe_u32 v55, v54, 16, 1 ; GFX9-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 -; GFX9-NEXT: v_bfe_u32 v40, v50, 16, 1 +; GFX9-NEXT: v_add3_u32 v55, v55, v54, s6 +; GFX9-NEXT: v_or_b32_e32 v40, 0x400000, v54 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v54, v54 ; GFX9-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 -; GFX9-NEXT: v_add3_u32 v40, v40, v50, s6 -; GFX9-NEXT: v_or_b32_e32 v41, 0x400000, v50 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v50, v50 -; GFX9-NEXT: v_bfe_u32 v50, v15, 16, 1 -; GFX9-NEXT: v_cndmask_b32_e32 v40, v40, v41, vcc -; GFX9-NEXT: v_add3_u32 v50, v50, v15, s6 -; GFX9-NEXT: v_or_b32_e32 v41, 0x400000, v15 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 ; GFX9-NEXT: s_mov_b32 s7, 0x7060302 -; GFX9-NEXT: v_cndmask_b32_e32 v15, v50, v41, vcc -; GFX9-NEXT: v_perm_b32 v51, v16, v55, s7 -; GFX9-NEXT: v_perm_b32 v50, v15, v40, s7 -; GFX9-NEXT: v_perm_b32 v29, v2, v17, s7 -; GFX9-NEXT: v_perm_b32 v28, v1, v18, s7 -; GFX9-NEXT: v_perm_b32 v49, v14, v53, s7 -; GFX9-NEXT: v_perm_b32 v48, v13, v54, s7 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v2 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v17 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v18 -; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[50:51] -; GFX9-NEXT: v_perm_b32 v31, v4, v19, s7 -; GFX9-NEXT: v_perm_b32 v39, v12, v27, s7 -; GFX9-NEXT: v_perm_b32 v38, v11, v52, s7 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v54, v55, v40, vcc +; GFX9-NEXT: v_bfe_u32 v55, v15, 16, 1 +; GFX9-NEXT: v_perm_b32 v29, v4, v19, s7 +; GFX9-NEXT: v_perm_b32 v21, v14, v37, s7 +; GFX9-NEXT: v_perm_b32 v20, v13, v38, s7 +; GFX9-NEXT: v_add3_u32 v55, v55, v15, s6 +; GFX9-NEXT: v_or_b32_e32 v40, 0x400000, v15 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v15, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v4 +; GFX9-NEXT: v_perm_b32 v26, v1, v18, s7 +; GFX9-NEXT: v_perm_b32 v31, v8, v52, s7 +; GFX9-NEXT: v_cndmask_b32_e32 v15, v55, v40, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v52 +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v19 -; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[48:49] -; GFX9-NEXT: v_perm_b32 v30, v3, v20, s7 -; GFX9-NEXT: v_perm_b32 v35, v8, v23, s7 -; GFX9-NEXT: v_perm_b32 v34, v7, v24, s7 -; GFX9-NEXT: v_perm_b32 v37, v10, v25, s7 -; GFX9-NEXT: v_perm_b32 v36, v9, v26, s7 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v20 -; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[38:39] -; GFX9-NEXT: v_perm_b32 v33, v6, v21, s7 -; GFX9-NEXT: v_perm_b32 v32, v5, v22, s7 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v13 -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v8 -; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v23 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v21 -; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[36:37] -; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[34:35] -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v16 -; GFX9-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v40 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v14 -; GFX9-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v54 -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v12 -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v27 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v9 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v26 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v5 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v22 -; GFX9-NEXT: v_lshrrev_b64 v[26:27], 24, v[32:33] +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v1 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v18 +; GFX9-NEXT: v_lshrrev_b64 v[18:19], 24, v[20:21] +; GFX9-NEXT: v_perm_b32 v33, v12, v39, s7 +; GFX9-NEXT: v_perm_b32 v32, v11, v48, s7 +; GFX9-NEXT: v_perm_b32 v43, v16, v36, s7 +; GFX9-NEXT: v_perm_b32 v42, v15, v54, s7 +; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v20 +; GFX9-NEXT: v_perm_b32 v23, v10, v49, s7 +; GFX9-NEXT: v_perm_b32 v22, v9, v50, s7 +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v11 +; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v48 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 16, v49 +; GFX9-NEXT: v_lshrrev_b64 v[48:49], 24, v[42:43] +; GFX9-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_lshrrev_b64 v[19:20], 24, v[32:33] +; GFX9-NEXT: v_perm_b32 v30, v7, v53, s7 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v21 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v21 +; GFX9-NEXT: v_lshrrev_b64 v[20:21], 24, v[22:23] +; GFX9-NEXT: v_perm_b32 v25, v6, v35, s7 +; GFX9-NEXT: v_perm_b32 v24, v5, v51, s7 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v36 +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v22 ; GFX9-NEXT: v_lshrrev_b64 v[21:22], 24, v[30:31] -; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[28:29] -; GFX9-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v55 -; GFX9-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v53 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v11, 16, v52 -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 24, v51 -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 8, v51 -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v50 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v49 -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 8, v49 -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 8, v48 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v39 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 8, v39 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v38 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v37 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 8, v37 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 8, v36 -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 24, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 8, v35 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 8, v34 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v33 +; GFX9-NEXT: v_perm_b32 v28, v3, v34, s7 +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v53 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v5 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v51 +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 24, v23 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 8, v23 +; GFX9-NEXT: v_lshrrev_b64 v[22:23], 24, v[24:25] +; GFX9-NEXT: v_perm_b32 v27, v2, v58, s7 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 8, v42 +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 8, v24 +; GFX9-NEXT: v_lshrrev_b64 v[23:24], 24, v[28:29] +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v37 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v13, 16, v38 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 24, v25 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 8, v25 +; GFX9-NEXT: v_lshrrev_b64 v[24:25], 24, v[26:27] +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v15 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v54 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v12, 16, v39 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v9 +; GFX9-NEXT: v_lshrrev_b32_e32 v9, 16, v50 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 16, v35 +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v58 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 24, v43 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v43 +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v33 ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 8, v33 ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 8, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 24, v31 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 24, v31 ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 8, v31 ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 8, v30 -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 24, v29 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 24, v29 ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 8, v29 ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 8, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 24, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v27, 8, v27 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 8, v26 +; GFX9-NEXT: v_mov_b32_e32 v26, v17 +; GFX9-NEXT: v_mov_b32_e32 v17, v49 ; GFX9-NEXT: .LBB108_4: ; %end ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v22, v63, v24, s4 -; GFX9-NEXT: v_perm_b32 v1, v1, v28, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v22, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v2, v29, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v25, s4 +; GFX9-NEXT: v_perm_b32 v24, v52, v24, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v24, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen -; GFX9-NEXT: v_perm_b32 v1, v61, v53, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 -; GFX9-NEXT: v_perm_b32 v21, v60, v21, s4 +; GFX9-NEXT: v_perm_b32 v1, v2, v27, s4 +; GFX9-NEXT: v_perm_b32 v2, v50, v35, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v1, v3, v30, s4 -; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1 +; GFX9-NEXT: v_perm_b32 v1, v3, v28, s4 +; GFX9-NEXT: v_perm_b32 v2, v39, v23, s4 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v1, v4, v31, s4 -; GFX9-NEXT: v_perm_b32 v2, v58, v52, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v4, v29, s4 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_perm_b32 v2, v2, v34, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v1, v5, v32, s4 -; GFX9-NEXT: v_perm_b32 v2, v47, v26, s4 +; GFX9-NEXT: v_perm_b32 v1, v5, v42, s4 +; GFX9-NEXT: v_perm_b32 v2, v63, v22, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_perm_b32 v1, v6, v33, s4 -; GFX9-NEXT: v_perm_b32 v2, v44, v51, s4 +; GFX9-NEXT: v_perm_b32 v1, v6, v38, s4 +; GFX9-NEXT: v_perm_b32 v2, v60, v37, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v1, v7, v34, s4 -; GFX9-NEXT: v_perm_b32 v2, v43, v23, s4 +; GFX9-NEXT: v_perm_b32 v1, v7, v30, s4 +; GFX9-NEXT: v_perm_b32 v2, v57, v21, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_perm_b32 v1, v8, v35, s4 -; GFX9-NEXT: v_perm_b32 v2, v42, v50, s4 +; GFX9-NEXT: v_perm_b32 v1, v8, v31, s4 +; GFX9-NEXT: v_perm_b32 v2, v56, v54, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 ; GFX9-NEXT: v_perm_b32 v1, v9, v36, s4 -; GFX9-NEXT: v_perm_b32 v2, v41, v20, s4 +; GFX9-NEXT: v_perm_b32 v2, v47, v20, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: v_perm_b32 v1, v10, v37, s4 -; GFX9-NEXT: v_perm_b32 v2, v40, v62, s4 +; GFX9-NEXT: v_perm_b32 v1, v10, v53, s4 +; GFX9-NEXT: v_perm_b32 v2, v46, v51, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_perm_b32 v1, v11, v38, s4 -; GFX9-NEXT: v_perm_b32 v2, v55, v19, s4 +; GFX9-NEXT: v_perm_b32 v1, v11, v32, s4 +; GFX9-NEXT: v_perm_b32 v2, v45, v19, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: v_perm_b32 v1, v12, v39, s4 -; GFX9-NEXT: v_perm_b32 v2, v54, v59, s4 +; GFX9-NEXT: v_perm_b32 v1, v12, v33, s4 +; GFX9-NEXT: v_perm_b32 v2, v44, v43, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v13, v48, s4 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v2, v41, v18, s4 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v18, s4 +; GFX9-NEXT: v_perm_b32 v1, v13, v1, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v14, v49, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v57, s4 +; GFX9-NEXT: v_perm_b32 v1, v14, v17, s4 +; GFX9-NEXT: v_perm_b32 v2, v40, v62, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v15, v56, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v17, s4 +; GFX9-NEXT: v_perm_b32 v1, v15, v61, s4 +; GFX9-NEXT: v_perm_b32 v2, v55, v48, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v1, v16, v46, s4 -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v2, v45, s4 +; GFX9-NEXT: v_perm_b32 v1, v16, v59, s4 +; GFX9-NEXT: v_perm_b32 v2, v26, v58, s4 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload @@ -87481,27 +87391,27 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a, ; SI-NEXT: v_mul_f32_e64 v24, 1.0, s11 ; SI-NEXT: v_mul_f32_e64 v21, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v22, 1.0, s9 -; SI-NEXT: v_mul_f32_e64 v29, 1.0, s6 -; SI-NEXT: v_mul_f32_e64 v31, 1.0, s7 -; SI-NEXT: v_mul_f32_e64 v27, 1.0, s4 -; SI-NEXT: v_mul_f32_e64 v28, 1.0, s5 -; SI-NEXT: v_mul_f32_e64 v36, 1.0, s45 -; SI-NEXT: v_mul_f32_e64 v37, 1.0, s44 -; SI-NEXT: v_mul_f32_e64 v33, 1.0, s43 -; SI-NEXT: v_mul_f32_e64 v34, 1.0, s42 +; SI-NEXT: v_mul_f32_e64 v28, 1.0, s6 +; SI-NEXT: v_mul_f32_e64 v29, 1.0, s7 +; SI-NEXT: v_mul_f32_e64 v25, 1.0, s4 +; SI-NEXT: v_mul_f32_e64 v27, 1.0, s5 +; SI-NEXT: v_mul_f32_e64 v33, 1.0, s45 +; SI-NEXT: v_mul_f32_e64 v34, 1.0, s44 +; SI-NEXT: v_mul_f32_e64 v31, 1.0, s43 +; SI-NEXT: v_mul_f32_e64 v32, 1.0, s42 ; SI-NEXT: ; implicit-def: $vgpr41 : SGPR spill to VGPR lane ; SI-NEXT: s_cbranch_scc0 .LBB109_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_readfirstlane_b32 s4, v3 ; SI-NEXT: s_lshr_b32 s5, s4, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v4 -; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 16 ; SI-NEXT: v_readfirstlane_b32 s4, v1 -; SI-NEXT: s_lshr_b32 s73, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s72, v2 -; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16 -; SI-NEXT: s_mov_b32 s75, s76 -; SI-NEXT: s_lshr_b64 s[4:5], s[74:75], 24 +; SI-NEXT: s_lshr_b32 s75, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s74, v2 +; SI-NEXT: s_lshr_b64 s[76:77], s[74:75], 16 +; SI-NEXT: s_mov_b32 s73, s76 +; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 24 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_writelane_b32 v41, s4, 0 ; SI-NEXT: v_writelane_b32 v41, s5, 1 @@ -87520,161 +87430,163 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a, ; SI-NEXT: v_readfirstlane_b32 s4, v15 ; SI-NEXT: s_lshr_b32 s5, s4, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v16 -; SI-NEXT: s_lshr_b64 s[26:27], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16 ; SI-NEXT: v_readfirstlane_b32 s4, v13 -; SI-NEXT: s_lshr_b32 s25, s4, 16 +; SI-NEXT: s_lshr_b32 s29, s4, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v19 ; SI-NEXT: s_lshr_b32 s5, s4, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v20 -; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[24:25], s[4:5], 16 ; SI-NEXT: v_readfirstlane_b32 s4, v17 -; SI-NEXT: s_lshr_b32 s41, s4, 16 +; SI-NEXT: s_lshr_b32 s23, s4, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v23 ; SI-NEXT: s_lshr_b32 s5, s4, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v24 -; SI-NEXT: s_lshr_b64 s[20:21], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[18:19], s[4:5], 16 ; SI-NEXT: v_readfirstlane_b32 s4, v21 -; SI-NEXT: s_lshr_b32 s19, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v29 +; SI-NEXT: s_lshr_b32 s17, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v28 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v31 +; SI-NEXT: v_readfirstlane_b32 s4, v29 ; SI-NEXT: s_lshr_b64 s[12:13], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v27 +; SI-NEXT: v_readfirstlane_b32 s4, v25 ; SI-NEXT: s_lshr_b32 s11, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v36 +; SI-NEXT: v_readfirstlane_b32 s4, v33 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v37 +; SI-NEXT: v_readfirstlane_b32 s4, v34 ; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v33 +; SI-NEXT: v_readfirstlane_b32 s4, v31 ; SI-NEXT: v_readfirstlane_b32 s58, v6 ; SI-NEXT: v_readfirstlane_b32 s44, v10 -; SI-NEXT: v_readfirstlane_b32 s24, v14 -; SI-NEXT: v_readfirstlane_b32 s40, v18 -; SI-NEXT: v_readfirstlane_b32 s18, v22 -; SI-NEXT: v_readfirstlane_b32 s10, v28 +; SI-NEXT: v_readfirstlane_b32 s28, v14 +; SI-NEXT: v_readfirstlane_b32 s22, v18 +; SI-NEXT: v_readfirstlane_b32 s16, v22 +; SI-NEXT: v_readfirstlane_b32 s10, v27 ; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v34 +; SI-NEXT: v_readfirstlane_b32 s4, v32 ; SI-NEXT: s_lshr_b64 s[62:63], s[58:59], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[44:45], 16 -; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[22:23], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[28:29], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[26:27], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[20:21], s[16:17], 16 ; SI-NEXT: s_lshr_b64 s[14:15], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16 ; SI-NEXT: s_mov_b32 s61, s62 ; SI-NEXT: s_mov_b32 s47, s56 -; SI-NEXT: s_mov_b32 s27, s42 -; SI-NEXT: s_mov_b32 s17, s22 -; SI-NEXT: s_mov_b32 s21, s28 +; SI-NEXT: s_mov_b32 s41, s42 +; SI-NEXT: s_mov_b32 s25, s26 +; SI-NEXT: s_mov_b32 s19, s20 ; SI-NEXT: s_mov_b32 s13, s14 ; SI-NEXT: s_mov_b32 s7, s8 -; SI-NEXT: s_lshr_b64 s[88:89], s[74:75], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[74:75], 8 -; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 24 +; SI-NEXT: s_lshr_b64 s[88:89], s[72:73], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[72:73], 8 +; SI-NEXT: s_lshr_b64 s[92:93], s[60:61], 24 ; SI-NEXT: s_lshr_b64 s[94:95], s[60:61], 16 ; SI-NEXT: s_lshr_b64 s[30:31], s[60:61], 8 ; SI-NEXT: s_lshr_b64 s[34:35], s[46:47], 24 ; SI-NEXT: s_lshr_b64 s[36:37], s[46:47], 16 ; SI-NEXT: s_lshr_b64 s[38:39], s[46:47], 8 -; SI-NEXT: s_lshr_b64 s[48:49], s[26:27], 24 -; SI-NEXT: s_lshr_b64 s[50:51], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[52:53], s[26:27], 8 -; SI-NEXT: s_lshr_b64 s[54:55], s[16:17], 24 -; SI-NEXT: s_lshr_b64 s[64:65], s[16:17], 16 -; SI-NEXT: s_lshr_b64 s[66:67], s[16:17], 8 -; SI-NEXT: s_lshr_b64 s[68:69], s[20:21], 24 -; SI-NEXT: s_lshr_b64 s[70:71], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[80:81], s[20:21], 8 +; SI-NEXT: s_lshr_b64 s[48:49], s[40:41], 24 +; SI-NEXT: s_lshr_b64 s[50:51], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[52:53], s[40:41], 8 +; SI-NEXT: s_lshr_b64 s[54:55], s[24:25], 24 +; SI-NEXT: s_lshr_b64 s[64:65], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[24:25], 8 +; SI-NEXT: s_lshr_b64 s[68:69], s[18:19], 24 +; SI-NEXT: s_lshr_b64 s[70:71], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[80:81], s[18:19], 8 +; SI-NEXT: s_lshr_b64 s[82:83], s[12:13], 24 +; SI-NEXT: s_lshr_b64 s[84:85], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[86:87], s[12:13], 8 +; SI-NEXT: s_lshr_b64 s[96:97], s[6:7], 24 +; SI-NEXT: s_lshr_b64 s[98:99], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[6:7], 8 ; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v1 ; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v5 -; SI-NEXT: s_lshr_b32 s23, s76, 8 +; SI-NEXT: s_lshr_b32 s19, s76, 8 ; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v9 -; SI-NEXT: s_lshr_b32 s21, s62, 8 -; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v13 -; SI-NEXT: s_lshr_b32 s18, s56, 8 -; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v17 -; SI-NEXT: s_lshr_b32 s17, s42, 8 -; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v21 -; SI-NEXT: s_lshr_b32 s15, s22, 8 -; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v27 -; SI-NEXT: s_lshr_b32 s10, s28, 8 -; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v33 -; SI-NEXT: s_lshr_b32 s9, s14, 8 +; SI-NEXT: s_lshr_b32 s16, s62, 8 +; SI-NEXT: v_lshrrev_b32_e32 v37, 24, v13 +; SI-NEXT: s_lshr_b32 s15, s56, 8 +; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v17 +; SI-NEXT: s_lshr_b32 s13, s42, 8 +; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v21 +; SI-NEXT: s_lshr_b32 s10, s26, 8 +; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v25 +; SI-NEXT: s_lshr_b32 s9, s20, 8 +; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v31 +; SI-NEXT: s_lshr_b32 s7, s14, 8 ; SI-NEXT: s_lshr_b32 s4, s8, 8 -; SI-NEXT: s_lshr_b64 s[96:97], s[12:13], 24 -; SI-NEXT: s_lshr_b64 s[98:99], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 8 -; SI-NEXT: s_lshr_b64 s[82:83], s[6:7], 24 -; SI-NEXT: s_lshr_b64 s[84:85], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[86:87], s[6:7], 8 ; SI-NEXT: s_cbranch_execnz .LBB109_3 ; SI-NEXT: .LBB109_2: ; %cmp.true -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v36 -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v37 +; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v33 +; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v34 +; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30 ; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 -; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 -; SI-NEXT: v_readfirstlane_b32 s4, v26 -; SI-NEXT: s_lshr_b32 s5, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v25 -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v34 -; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v25 -; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v33 -; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 -; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v25 +; SI-NEXT: v_readfirstlane_b32 s4, v30 ; SI-NEXT: s_lshr_b32 s5, s4, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v26 +; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v32 +; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v26 ; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v31 ; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 +; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 16 +; SI-NEXT: v_readfirstlane_b32 s4, v26 +; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28 +; SI-NEXT: s_lshr_b32 s5, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v30 ; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29 -; SI-NEXT: v_readfirstlane_b32 s10, v26 -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v28 -; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 -; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v26 -; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v27 +; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28 +; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25 ; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16 -; SI-NEXT: v_readfirstlane_b32 s4, v29 -; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26 +; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29 +; SI-NEXT: v_readfirstlane_b32 s4, v28 +; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25 ; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23 ; SI-NEXT: s_lshr_b32 s11, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s4, v26 +; SI-NEXT: v_readfirstlane_b32 s10, v29 +; SI-NEXT: v_readfirstlane_b32 s4, v25 +; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24 ; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23 ; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21 ; SI-NEXT: s_lshr_b64 s[12:13], s[10:11], 16 ; SI-NEXT: s_lshr_b32 s11, s4, 16 -; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24 +; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 ; SI-NEXT: v_readfirstlane_b32 s4, v23 ; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21 ; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19 -; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24 ; SI-NEXT: s_lshr_b32 s17, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s16, v24 ; SI-NEXT: v_readfirstlane_b32 s4, v21 +; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 ; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19 ; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17 -; SI-NEXT: v_readfirstlane_b32 s16, v24 -; SI-NEXT: s_lshr_b32 s19, s4, 16 +; SI-NEXT: s_lshr_b64 s[18:19], s[16:17], 16 +; SI-NEXT: s_lshr_b32 s17, s4, 16 +; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; SI-NEXT: v_readfirstlane_b32 s4, v19 ; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17 ; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15 -; SI-NEXT: s_lshr_b64 s[20:21], s[16:17], 16 -; SI-NEXT: s_lshr_b32 s17, s4, 16 +; SI-NEXT: s_lshr_b32 s23, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s22, v20 ; SI-NEXT: v_readfirstlane_b32 s4, v17 ; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16 ; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15 ; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13 -; SI-NEXT: s_lshr_b32 s41, s4, 16 +; SI-NEXT: s_lshr_b64 s[24:25], s[22:23], 16 +; SI-NEXT: s_lshr_b32 s23, s4, 16 ; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 ; SI-NEXT: v_readfirstlane_b32 s4, v15 ; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 ; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11 -; SI-NEXT: s_lshr_b32 s25, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s24, v16 +; SI-NEXT: s_lshr_b32 s29, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s28, v16 ; SI-NEXT: v_readfirstlane_b32 s4, v13 ; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12 ; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11 ; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9 -; SI-NEXT: s_lshr_b64 s[26:27], s[24:25], 16 -; SI-NEXT: s_lshr_b32 s25, s4, 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[28:29], 16 +; SI-NEXT: s_lshr_b32 s29, s4, 16 ; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 ; SI-NEXT: v_readfirstlane_b32 s4, v11 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9 @@ -87694,277 +87606,275 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a, ; SI-NEXT: s_lshr_b32 s59, s4, 16 ; SI-NEXT: v_readfirstlane_b32 s58, v8 ; SI-NEXT: v_readfirstlane_b32 s4, v5 -; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 ; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 ; SI-NEXT: s_lshr_b64 s[60:61], s[58:59], 16 ; SI-NEXT: s_lshr_b32 s59, s4, 16 -; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4 ; SI-NEXT: v_readfirstlane_b32 s4, v3 ; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; SI-NEXT: s_lshr_b32 s73, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s72, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 ; SI-NEXT: v_readfirstlane_b32 s4, v1 +; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27 ; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22 -; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20 ; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18 ; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14 ; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 ; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 -; SI-NEXT: s_lshr_b64 s[74:75], s[72:73], 16 -; SI-NEXT: s_lshr_b32 s73, s4, 16 -; SI-NEXT: v_readfirstlane_b32 s72, v2 +; SI-NEXT: v_readfirstlane_b32 s72, v4 +; SI-NEXT: s_lshr_b32 s75, s4, 16 +; SI-NEXT: v_readfirstlane_b32 s74, v2 +; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27 ; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22 -; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20 ; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18 ; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 ; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 ; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 -; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16 -; SI-NEXT: v_readfirstlane_b32 s10, v28 -; SI-NEXT: v_readfirstlane_b32 s18, v22 -; SI-NEXT: v_readfirstlane_b32 s16, v20 -; SI-NEXT: v_readfirstlane_b32 s40, v18 -; SI-NEXT: v_readfirstlane_b32 s24, v14 +; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[74:75], 16 +; SI-NEXT: v_readfirstlane_b32 s10, v27 +; SI-NEXT: v_readfirstlane_b32 s16, v22 +; SI-NEXT: v_readfirstlane_b32 s22, v18 +; SI-NEXT: v_readfirstlane_b32 s28, v14 ; SI-NEXT: v_readfirstlane_b32 s44, v10 ; SI-NEXT: v_readfirstlane_b32 s58, v6 -; SI-NEXT: s_mov_b32 s75, s76 +; SI-NEXT: s_mov_b32 s73, s76 ; SI-NEXT: s_lshr_b64 s[14:15], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[28:29], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[16:17], s[16:17], 16 -; SI-NEXT: s_lshr_b64 s[22:23], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[20:21], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[26:27], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[28:29], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[44:45], 16 ; SI-NEXT: s_lshr_b64 s[62:63], s[58:59], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[74:75], 24 +; SI-NEXT: s_lshr_b64 s[78:79], s[72:73], 24 ; SI-NEXT: s_mov_b32 s7, s8 ; SI-NEXT: s_mov_b32 s13, s14 -; SI-NEXT: s_mov_b32 s21, s28 -; SI-NEXT: s_mov_b32 s17, s22 -; SI-NEXT: s_mov_b32 s27, s42 +; SI-NEXT: s_mov_b32 s19, s20 +; SI-NEXT: s_mov_b32 s25, s26 +; SI-NEXT: s_mov_b32 s41, s42 ; SI-NEXT: s_mov_b32 s47, s56 ; SI-NEXT: s_mov_b32 s61, s62 ; SI-NEXT: v_writelane_b32 v41, s78, 0 ; SI-NEXT: v_writelane_b32 v41, s79, 1 -; SI-NEXT: s_lshr_b64 s[88:89], s[74:75], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[74:75], 8 -; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 24 +; SI-NEXT: s_lshr_b64 s[88:89], s[72:73], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[72:73], 8 +; SI-NEXT: s_lshr_b64 s[92:93], s[60:61], 24 ; SI-NEXT: s_lshr_b64 s[94:95], s[60:61], 16 ; SI-NEXT: s_lshr_b64 s[30:31], s[60:61], 8 ; SI-NEXT: s_lshr_b64 s[34:35], s[46:47], 24 ; SI-NEXT: s_lshr_b64 s[36:37], s[46:47], 16 ; SI-NEXT: s_lshr_b64 s[38:39], s[46:47], 8 -; SI-NEXT: s_lshr_b64 s[48:49], s[26:27], 24 -; SI-NEXT: s_lshr_b64 s[50:51], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[52:53], s[26:27], 8 -; SI-NEXT: s_lshr_b64 s[54:55], s[16:17], 24 -; SI-NEXT: s_lshr_b64 s[64:65], s[16:17], 16 -; SI-NEXT: s_lshr_b64 s[66:67], s[16:17], 8 -; SI-NEXT: s_lshr_b64 s[68:69], s[20:21], 24 -; SI-NEXT: s_lshr_b64 s[70:71], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[80:81], s[20:21], 8 -; SI-NEXT: s_lshr_b32 s23, s76, 8 -; SI-NEXT: s_lshr_b32 s21, s62, 8 -; SI-NEXT: s_lshr_b32 s18, s56, 8 -; SI-NEXT: s_lshr_b32 s17, s42, 8 -; SI-NEXT: s_lshr_b32 s15, s22, 8 -; SI-NEXT: s_lshr_b32 s10, s28, 8 -; SI-NEXT: s_lshr_b32 s9, s14, 8 +; SI-NEXT: s_lshr_b64 s[48:49], s[40:41], 24 +; SI-NEXT: s_lshr_b64 s[50:51], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[52:53], s[40:41], 8 +; SI-NEXT: s_lshr_b64 s[54:55], s[24:25], 24 +; SI-NEXT: s_lshr_b64 s[64:65], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[24:25], 8 +; SI-NEXT: s_lshr_b64 s[68:69], s[18:19], 24 +; SI-NEXT: s_lshr_b64 s[70:71], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[80:81], s[18:19], 8 +; SI-NEXT: s_lshr_b64 s[82:83], s[12:13], 24 +; SI-NEXT: s_lshr_b64 s[84:85], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[86:87], s[12:13], 8 +; SI-NEXT: s_lshr_b64 s[96:97], s[6:7], 24 +; SI-NEXT: s_lshr_b64 s[98:99], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[6:7], 8 +; SI-NEXT: s_lshr_b32 s19, s76, 8 +; SI-NEXT: s_lshr_b32 s16, s62, 8 +; SI-NEXT: s_lshr_b32 s15, s56, 8 +; SI-NEXT: s_lshr_b32 s13, s42, 8 +; SI-NEXT: s_lshr_b32 s10, s26, 8 +; SI-NEXT: s_lshr_b32 s9, s20, 8 +; SI-NEXT: s_lshr_b32 s7, s14, 8 ; SI-NEXT: s_lshr_b32 s4, s8, 8 ; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v1 ; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v5 ; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v9 -; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v13 -; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v17 -; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v21 +; SI-NEXT: v_lshrrev_b32_e32 v37, 24, v13 +; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v17 +; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v21 +; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v25 ; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v26 -; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v25 -; SI-NEXT: s_lshr_b64 s[96:97], s[12:13], 24 -; SI-NEXT: s_lshr_b64 s[98:99], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 8 -; SI-NEXT: s_lshr_b64 s[82:83], s[6:7], 24 -; SI-NEXT: s_lshr_b64 s[84:85], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[86:87], s[6:7], 8 ; SI-NEXT: .LBB109_3: ; %end -; SI-NEXT: s_and_b32 s7, s74, 0xff -; SI-NEXT: s_lshl_b32 s13, s92, 8 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s88, 0xff -; SI-NEXT: v_readlane_b32 s74, v41, 0 -; SI-NEXT: s_lshl_b32 s24, s74, 24 -; SI-NEXT: s_lshl_b32 s13, s13, 16 -; SI-NEXT: s_or_b32 s13, s24, s13 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: v_mov_b32_e32 v1, s7 -; SI-NEXT: s_and_b32 s7, s76, 0xff -; SI-NEXT: s_lshl_b32 s13, s23, 8 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s73, 0xff -; SI-NEXT: s_lshl_b32 s13, s13, 16 -; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v48 -; SI-NEXT: v_or_b32_e32 v2, s13, v2 -; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_and_b32 s21, s72, 0xff +; SI-NEXT: s_lshl_b32 s22, s90, 8 +; SI-NEXT: s_or_b32 s21, s21, s22 +; SI-NEXT: s_and_b32 s22, s88, 0xff +; SI-NEXT: v_readlane_b32 s72, v41, 0 +; SI-NEXT: s_lshl_b32 s22, s22, 16 +; SI-NEXT: s_lshl_b32 s25, s72, 24 +; SI-NEXT: s_and_b32 s21, s21, 0xffff +; SI-NEXT: s_or_b32 s22, s25, s22 +; SI-NEXT: s_or_b32 s21, s21, s22 +; SI-NEXT: v_mov_b32_e32 v1, s21 +; SI-NEXT: s_and_b32 s21, s76, 0xff +; SI-NEXT: s_lshl_b32 s19, s19, 8 +; SI-NEXT: s_or_b32 s19, s21, s19 +; SI-NEXT: s_and_b32 s21, s75, 0xff ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen +; SI-NEXT: s_lshl_b32 s21, s21, 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_or_b32_e32 v1, s7, v2 -; SI-NEXT: s_and_b32 s7, s60, 0xff -; SI-NEXT: s_lshl_b32 s13, s30, 8 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s94, 0xff -; SI-NEXT: s_lshl_b32 s13, s13, 16 -; SI-NEXT: s_lshl_b32 s23, s90, 24 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_or_b32 s13, s23, s13 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v48 +; SI-NEXT: s_and_b32 s19, s19, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s21, v1 +; SI-NEXT: v_or_b32_e32 v1, s19, v1 +; SI-NEXT: s_and_b32 s19, s60, 0xff +; SI-NEXT: s_lshl_b32 s21, s30, 8 +; SI-NEXT: s_or_b32 s19, s19, s21 +; SI-NEXT: s_and_b32 s21, s94, 0xff +; SI-NEXT: s_lshl_b32 s21, s21, 16 +; SI-NEXT: s_lshl_b32 s22, s92, 24 +; SI-NEXT: s_and_b32 s19, s19, 0xffff +; SI-NEXT: s_or_b32 s21, s22, s21 ; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0 -; SI-NEXT: s_or_b32 s7, s7, s13 +; SI-NEXT: s_or_b32 s19, s19, s21 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s7 -; SI-NEXT: s_and_b32 s7, s62, 0xff -; SI-NEXT: s_lshl_b32 s13, s21, 8 +; SI-NEXT: v_mov_b32_e32 v2, s19 +; SI-NEXT: s_and_b32 s19, s62, 0xff +; SI-NEXT: s_lshl_b32 s16, s16, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s59, 0xff +; SI-NEXT: s_or_b32 s16, s19, s16 +; SI-NEXT: s_and_b32 s19, s59, 0xff ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s13, s13, 16 +; SI-NEXT: s_lshl_b32 s19, s19, 16 ; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v39 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s13, v1 -; SI-NEXT: v_or_b32_e32 v1, s7, v1 -; SI-NEXT: s_and_b32 s7, s46, 0xff -; SI-NEXT: s_lshl_b32 s13, s38, 8 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s36, 0xff -; SI-NEXT: s_lshl_b32 s13, s13, 16 +; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s19, v1 +; SI-NEXT: v_or_b32_e32 v1, s16, v1 +; SI-NEXT: s_and_b32 s16, s46, 0xff +; SI-NEXT: s_lshl_b32 s19, s38, 8 +; SI-NEXT: s_or_b32 s16, s16, s19 +; SI-NEXT: s_and_b32 s19, s36, 0xff +; SI-NEXT: s_lshl_b32 s19, s19, 16 ; SI-NEXT: s_lshl_b32 s21, s34, 24 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_or_b32 s13, s21, s13 +; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_or_b32 s19, s21, s19 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0 -; SI-NEXT: s_or_b32 s7, s7, s13 +; SI-NEXT: s_or_b32 s16, s16, s19 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s7 -; SI-NEXT: s_and_b32 s7, s56, 0xff -; SI-NEXT: s_lshl_b32 s13, s18, 8 +; SI-NEXT: v_mov_b32_e32 v2, s16 +; SI-NEXT: s_and_b32 s16, s56, 0xff +; SI-NEXT: s_lshl_b32 s15, s15, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s45, 0xff +; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_and_b32 s16, s45, 0xff ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s13, s13, 16 +; SI-NEXT: s_lshl_b32 s16, s16, 16 ; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v38 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: v_or_b32_e32 v1, s13, v1 -; SI-NEXT: v_or_b32_e32 v1, s7, v1 -; SI-NEXT: s_and_b32 s7, s26, 0xff -; SI-NEXT: s_lshl_b32 s13, s52, 8 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s50, 0xff -; SI-NEXT: s_lshl_b32 s13, s13, 16 -; SI-NEXT: s_lshl_b32 s18, s48, 24 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_or_b32 s13, s18, s13 +; SI-NEXT: s_and_b32 s15, s15, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s16, v1 +; SI-NEXT: v_or_b32_e32 v1, s15, v1 +; SI-NEXT: s_and_b32 s15, s40, 0xff +; SI-NEXT: s_lshl_b32 s16, s52, 8 +; SI-NEXT: s_or_b32 s15, s15, s16 +; SI-NEXT: s_and_b32 s16, s50, 0xff +; SI-NEXT: s_lshl_b32 s16, s16, 16 +; SI-NEXT: s_lshl_b32 s19, s48, 24 +; SI-NEXT: s_and_b32 s15, s15, 0xffff +; SI-NEXT: s_or_b32 s16, s19, s16 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0 -; SI-NEXT: s_or_b32 s7, s7, s13 +; SI-NEXT: s_or_b32 s15, s15, s16 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s7 -; SI-NEXT: s_and_b32 s7, s42, 0xff -; SI-NEXT: s_lshl_b32 s13, s17, 8 +; SI-NEXT: v_mov_b32_e32 v2, s15 +; SI-NEXT: s_and_b32 s15, s42, 0xff +; SI-NEXT: s_lshl_b32 s13, s13, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s25, 0xff +; SI-NEXT: s_or_b32 s13, s15, s13 +; SI-NEXT: s_and_b32 s15, s29, 0xff ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen -; SI-NEXT: s_lshl_b32 s13, s13, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v35 -; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_lshl_b32 s15, s15, 16 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v37 +; SI-NEXT: s_and_b32 s13, s13, 0xffff +; SI-NEXT: v_or_b32_e32 v1, s15, v1 ; SI-NEXT: v_or_b32_e32 v1, s13, v1 -; SI-NEXT: v_or_b32_e32 v1, s7, v1 -; SI-NEXT: s_and_b32 s7, s16, 0xff -; SI-NEXT: s_lshl_b32 s13, s66, 8 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s64, 0xff -; SI-NEXT: s_lshl_b32 s13, s13, 16 +; SI-NEXT: s_and_b32 s13, s24, 0xff +; SI-NEXT: s_lshl_b32 s15, s66, 8 +; SI-NEXT: s_or_b32 s13, s13, s15 +; SI-NEXT: s_and_b32 s15, s64, 0xff +; SI-NEXT: s_lshl_b32 s15, s15, 16 ; SI-NEXT: s_lshl_b32 s16, s54, 24 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_or_b32 s13, s16, s13 +; SI-NEXT: s_and_b32 s13, s13, 0xffff +; SI-NEXT: s_or_b32 s15, s16, s15 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0 -; SI-NEXT: s_or_b32 s7, s7, s13 +; SI-NEXT: s_or_b32 s13, s13, s15 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s7 -; SI-NEXT: s_and_b32 s7, s22, 0xff -; SI-NEXT: s_lshl_b32 s13, s15, 8 +; SI-NEXT: v_mov_b32_e32 v2, s13 +; SI-NEXT: s_and_b32 s13, s26, 0xff +; SI-NEXT: s_lshl_b32 s10, s10, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0 -; SI-NEXT: s_or_b32 s7, s7, s13 -; SI-NEXT: s_and_b32 s13, s41, 0xff +; SI-NEXT: s_or_b32 s10, s13, s10 +; SI-NEXT: s_and_b32 s13, s23, 0xff ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_lshl_b32 s13, s13, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v32 -; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v36 +; SI-NEXT: s_and_b32 s10, s10, 0xffff ; SI-NEXT: v_or_b32_e32 v1, s13, v1 -; SI-NEXT: v_or_b32_e32 v1, s7, v1 -; SI-NEXT: s_and_b32 s7, s20, 0xff +; SI-NEXT: v_or_b32_e32 v1, s10, v1 +; SI-NEXT: s_and_b32 s10, s18, 0xff ; SI-NEXT: s_lshl_b32 s13, s80, 8 -; SI-NEXT: s_or_b32 s7, s7, s13 +; SI-NEXT: s_or_b32 s10, s10, s13 ; SI-NEXT: s_and_b32 s13, s70, 0xff ; SI-NEXT: s_lshl_b32 s13, s13, 16 ; SI-NEXT: s_lshl_b32 s15, s68, 24 -; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_and_b32 s10, s10, 0xffff ; SI-NEXT: s_or_b32 s13, s15, s13 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0 -; SI-NEXT: s_or_b32 s7, s7, s13 +; SI-NEXT: s_or_b32 s10, s10, s13 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s7 -; SI-NEXT: s_and_b32 s7, s28, 0xff -; SI-NEXT: s_lshl_b32 s10, s10, 8 +; SI-NEXT: v_mov_b32_e32 v2, s10 +; SI-NEXT: s_and_b32 s10, s20, 0xff +; SI-NEXT: s_lshl_b32 s9, s9, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0 -; SI-NEXT: s_or_b32 s7, s7, s10 -; SI-NEXT: s_and_b32 s10, s19, 0xff +; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: s_and_b32 s10, s17, 0xff ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_lshl_b32 s10, s10, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v30 -; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v35 +; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: v_or_b32_e32 v1, s10, v1 -; SI-NEXT: v_or_b32_e32 v1, s7, v1 -; SI-NEXT: s_and_b32 s7, s12, 0xff -; SI-NEXT: s_lshl_b32 s10, s78, 8 -; SI-NEXT: s_or_b32 s7, s7, s10 -; SI-NEXT: s_and_b32 s10, s98, 0xff +; SI-NEXT: v_or_b32_e32 v1, s9, v1 +; SI-NEXT: s_and_b32 s9, s12, 0xff +; SI-NEXT: s_lshl_b32 s10, s86, 8 +; SI-NEXT: s_or_b32 s9, s9, s10 +; SI-NEXT: s_and_b32 s10, s84, 0xff ; SI-NEXT: s_lshl_b32 s10, s10, 16 -; SI-NEXT: s_lshl_b32 s12, s96, 24 -; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_lshl_b32 s12, s82, 24 +; SI-NEXT: s_and_b32 s9, s9, 0xffff ; SI-NEXT: s_or_b32 s10, s12, s10 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0 -; SI-NEXT: s_or_b32 s7, s7, s10 +; SI-NEXT: s_or_b32 s9, s9, s10 ; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; SI-NEXT: v_mov_b32_e32 v2, s7 -; SI-NEXT: s_and_b32 s7, s14, 0xff -; SI-NEXT: s_lshl_b32 s9, s9, 8 +; SI-NEXT: v_mov_b32_e32 v2, s9 +; SI-NEXT: s_and_b32 s9, s14, 0xff +; SI-NEXT: s_lshl_b32 s7, s7, 8 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0 -; SI-NEXT: s_or_b32 s7, s7, s9 +; SI-NEXT: s_or_b32 s7, s9, s7 ; SI-NEXT: s_and_b32 s9, s11, 0xff ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_lshl_b32 s9, s9, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v26 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v30 ; SI-NEXT: s_and_b32 s7, s7, 0xffff ; SI-NEXT: v_or_b32_e32 v1, s9, v1 ; SI-NEXT: v_or_b32_e32 v1, s7, v1 ; SI-NEXT: s_and_b32 s6, s6, 0xff -; SI-NEXT: s_lshl_b32 s7, s86, 8 +; SI-NEXT: s_lshl_b32 s7, s78, 8 ; SI-NEXT: s_or_b32 s6, s6, s7 -; SI-NEXT: s_and_b32 s7, s84, 0xff +; SI-NEXT: s_and_b32 s7, s98, 0xff ; SI-NEXT: s_lshl_b32 s7, s7, 16 -; SI-NEXT: s_lshl_b32 s9, s82, 24 +; SI-NEXT: s_lshl_b32 s9, s96, 24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff ; SI-NEXT: s_or_b32 s7, s9, s7 ; SI-NEXT: s_waitcnt expcnt(0) @@ -87980,13 +87890,13 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a, ; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; SI-NEXT: s_or_b32 s4, s6, s4 ; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v25 +; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v26 ; SI-NEXT: s_and_b32 s4, s4, 0xffff ; SI-NEXT: v_or_b32_e32 v1, s5, v1 ; SI-NEXT: v_or_b32_e32 v1, s4, v1 ; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0 ; SI-NEXT: v_readlane_b32 s30, v40, 34 -; SI-NEXT: v_readlane_b32 s75, v41, 1 +; SI-NEXT: v_readlane_b32 s73, v41, 1 ; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen ; SI-NEXT: v_readlane_b32 s31, v40, 35 ; SI-NEXT: v_readlane_b32 s99, v40, 33 @@ -88033,70 +87943,70 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a, ; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_writelane_b32 v41, s4, 0 -; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr90 ; SI-NEXT: ; implicit-def: $sgpr88 ; SI-NEXT: v_writelane_b32 v41, s5, 1 ; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr23 -; SI-NEXT: ; implicit-def: $sgpr73 -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; implicit-def: $sgpr19 +; SI-NEXT: ; implicit-def: $sgpr75 ; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr30 ; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr21 +; SI-NEXT: ; implicit-def: $sgpr16 ; SI-NEXT: ; implicit-def: $sgpr59 -; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr38 ; SI-NEXT: ; implicit-def: $sgpr36 ; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr18 +; SI-NEXT: ; implicit-def: $sgpr15 ; SI-NEXT: ; implicit-def: $sgpr45 -; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $sgpr26 +; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr50 ; SI-NEXT: ; implicit-def: $sgpr48 ; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr17 -; SI-NEXT: ; implicit-def: $sgpr25 -; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $sgpr16 +; SI-NEXT: ; implicit-def: $sgpr13 +; SI-NEXT: ; implicit-def: $sgpr29 +; SI-NEXT: ; implicit-def: $sgpr24 ; SI-NEXT: ; implicit-def: $sgpr66 ; SI-NEXT: ; implicit-def: $sgpr64 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr22 -; SI-NEXT: ; implicit-def: $sgpr15 -; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $sgpr26 ; SI-NEXT: ; implicit-def: $sgpr10 -; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: ; implicit-def: $sgpr9 -; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $sgpr41 -; SI-NEXT: ; implicit-def: $sgpr20 +; SI-NEXT: ; implicit-def: $sgpr23 +; SI-NEXT: ; implicit-def: $sgpr18 ; SI-NEXT: ; implicit-def: $sgpr80 ; SI-NEXT: ; implicit-def: $sgpr70 ; SI-NEXT: ; implicit-def: $sgpr68 -; SI-NEXT: ; implicit-def: $sgpr28 -; SI-NEXT: ; implicit-def: $sgpr19 +; SI-NEXT: ; implicit-def: $sgpr20 +; SI-NEXT: ; implicit-def: $sgpr9 +; SI-NEXT: ; implicit-def: $sgpr17 ; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr78 -; SI-NEXT: ; implicit-def: $sgpr98 -; SI-NEXT: ; implicit-def: $sgpr96 -; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr11 -; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr86 ; SI-NEXT: ; implicit-def: $sgpr84 ; SI-NEXT: ; implicit-def: $sgpr82 +; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr7 +; SI-NEXT: ; implicit-def: $sgpr11 +; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr98 +; SI-NEXT: ; implicit-def: $sgpr96 ; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr5 +; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr30 +; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: s_branch .LBB109_2 ; ; VI-LABEL: bitcast_v32bf16_to_v64i8_scalar: @@ -88595,12 +88505,28 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a, ; VI-NEXT: ; implicit-def: $sgpr65 ; VI-NEXT: s_branch .LBB109_2 ; VI-NEXT: .LBB109_4: -; VI-NEXT: v_mov_b32_e32 v1, s65 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; VI-NEXT: v_mov_b32_e32 v1, s64 +; VI-NEXT: v_mov_b32_e32 v3, s65 +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; VI-NEXT: v_mov_b32_e32 v3, s64 +; VI-NEXT: v_mov_b32_e32 v23, s4 +; VI-NEXT: v_mov_b32_e32 v22, s5 +; VI-NEXT: v_mov_b32_e32 v20, s28 +; VI-NEXT: v_mov_b32_e32 v19, s29 +; VI-NEXT: v_mov_b32_e32 v17, s26 +; VI-NEXT: v_mov_b32_e32 v16, s27 +; VI-NEXT: v_mov_b32_e32 v14, s24 +; VI-NEXT: v_mov_b32_e32 v13, s25 +; VI-NEXT: v_mov_b32_e32 v11, s22 +; VI-NEXT: v_mov_b32_e32 v10, s23 +; VI-NEXT: v_mov_b32_e32 v8, s20 +; VI-NEXT: v_mov_b32_e32 v7, s21 +; VI-NEXT: v_mov_b32_e32 v5, s18 +; VI-NEXT: v_mov_b32_e32 v4, s19 +; VI-NEXT: v_mov_b32_e32 v2, s16 +; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v12, s67 ; VI-NEXT: v_mov_b32_e32 v15, s66 -; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; VI-NEXT: v_mov_b32_e32 v9, s55 ; VI-NEXT: v_mov_b32_e32 v33, s54 ; VI-NEXT: v_mov_b32_e32 v34, s53 @@ -88637,22 +88563,6 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a, ; VI-NEXT: v_mov_b32_e32 v60, s58 ; VI-NEXT: v_mov_b32_e32 v61, s57 ; VI-NEXT: v_mov_b32_e32 v62, s56 -; VI-NEXT: v_mov_b32_e32 v23, s4 -; VI-NEXT: v_mov_b32_e32 v22, s5 -; VI-NEXT: v_mov_b32_e32 v20, s28 -; VI-NEXT: v_mov_b32_e32 v19, s29 -; VI-NEXT: v_mov_b32_e32 v17, s26 -; VI-NEXT: v_mov_b32_e32 v16, s27 -; VI-NEXT: v_mov_b32_e32 v14, s24 -; VI-NEXT: v_mov_b32_e32 v13, s25 -; VI-NEXT: v_mov_b32_e32 v11, s22 -; VI-NEXT: v_mov_b32_e32 v10, s23 -; VI-NEXT: v_mov_b32_e32 v8, s20 -; VI-NEXT: v_mov_b32_e32 v7, s21 -; VI-NEXT: v_mov_b32_e32 v5, s18 -; VI-NEXT: v_mov_b32_e32 v4, s19 -; VI-NEXT: v_mov_b32_e32 v2, s16 -; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v24, s44 ; VI-NEXT: v_mov_b32_e32 v25, s42 ; VI-NEXT: v_mov_b32_e32 v26, s40 @@ -88896,360 +88806,360 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a, ; GFX9-NEXT: s_cbranch_execnz .LBB109_4 ; GFX9-NEXT: .LBB109_2: ; %cmp.true ; GFX9-NEXT: s_and_b32 s6, s17, 0xffff0000 -; GFX9-NEXT: v_mov_b32_e32 v1, 0x40c00000 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc +; GFX9-NEXT: v_mov_b32_e32 v3, 0x40c00000 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v3 +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc ; GFX9-NEXT: s_lshl_b32 s6, s17, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 16, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v3 +; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 +; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 +; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; GFX9-NEXT: s_and_b32 s6, s16, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 +; GFX9-NEXT: v_lshl_or_b32 v2, v5, 16, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v3 +; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v1 ; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc ; GFX9-NEXT: s_lshl_b32 s6, s16, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v3, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v3, v3, v2 -; GFX9-NEXT: v_add_u32_e32 v3, 0x7fff, v3 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v30 +; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v1 +; GFX9-NEXT: v_add_f32_e32 v1, s6, v3 +; GFX9-NEXT: v_bfe_u32 v4, v1, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v1 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 ; GFX9-NEXT: s_and_b32 s6, s19, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v3, v31, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 ; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc ; GFX9-NEXT: s_lshl_b32 s6, s19, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 ; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v32 +; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v24 ; GFX9-NEXT: s_and_b32 s6, s18, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v11, v29, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 +; GFX9-NEXT: v_lshl_or_b32 v6, v22, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 ; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc ; GFX9-NEXT: s_lshl_b32 s6, s18, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v5, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v5, v5, v4 ; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v35 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v7, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v27 ; GFX9-NEXT: s_and_b32 s6, s21, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v10, v37, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_lshl_or_b32 v5, v25, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc ; GFX9-NEXT: s_lshl_b32 s6, s21, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v28 +; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v28 ; GFX9-NEXT: s_and_b32 s6, s20, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v15, v27, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_lshl_or_b32 v11, v26, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc ; GFX9-NEXT: s_lshl_b32 s6, s20, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v50 +; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v31 ; GFX9-NEXT: s_and_b32 s6, s23, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v14, v36, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_lshl_or_b32 v10, v29, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc ; GFX9-NEXT: s_lshl_b32 s6, s23, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v34 +; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v32 ; GFX9-NEXT: s_and_b32 s6, s22, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v20, v33, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_lshl_or_b32 v16, v30, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc ; GFX9-NEXT: s_lshl_b32 s6, s22, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v48 +; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v35 ; GFX9-NEXT: s_and_b32 s6, s25, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v19, v38, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_lshl_or_b32 v15, v33, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc ; GFX9-NEXT: s_lshl_b32 s6, s25, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v49 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v36 ; GFX9-NEXT: s_and_b32 s6, s24, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v22, v39, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_lshl_or_b32 v18, v34, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc ; GFX9-NEXT: s_lshl_b32 s6, s24, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v53 +; GFX9-NEXT: v_lshrrev_b32_e32 v37, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v39, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v39 ; GFX9-NEXT: s_and_b32 s6, s27, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v21, v51, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_lshl_or_b32 v17, v37, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc ; GFX9-NEXT: s_lshl_b32 s6, s27, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v54 +; GFX9-NEXT: v_lshrrev_b32_e32 v38, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v48, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v48 ; GFX9-NEXT: s_and_b32 s6, s26, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v24, v52, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_lshl_or_b32 v13, v38, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc ; GFX9-NEXT: s_lshl_b32 s6, s26, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v41 +; GFX9-NEXT: v_lshrrev_b32_e32 v49, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v51, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v51 ; GFX9-NEXT: s_and_b32 s6, s29, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v23, v55, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_lshl_or_b32 v12, v49, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc ; GFX9-NEXT: s_lshl_b32 s6, s29, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v42 +; GFX9-NEXT: v_lshrrev_b32_e32 v50, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v52, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v52 ; GFX9-NEXT: s_and_b32 s6, s28, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v26, v40, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_lshl_or_b32 v20, v50, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc ; GFX9-NEXT: s_lshl_b32 s6, s28, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v45 +; GFX9-NEXT: v_lshrrev_b32_e32 v53, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v55, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v55 ; GFX9-NEXT: s_and_b32 s6, s5, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v25, v43, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s6, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc +; GFX9-NEXT: v_lshl_or_b32 v19, v53, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s6, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc ; GFX9-NEXT: s_lshl_b32 s5, s5, 16 -; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s5, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v46 +; GFX9-NEXT: v_lshrrev_b32_e32 v54, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s5, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v40, 16, v4 +; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v40 ; GFX9-NEXT: s_and_b32 s5, s4, 0xffff0000 -; GFX9-NEXT: v_lshl_or_b32 v58, v44, 16, v2 -; GFX9-NEXT: v_add_f32_e32 v2, s5, v1 -; GFX9-NEXT: v_bfe_u32 v5, v2, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v5, v5, v2 -; GFX9-NEXT: v_add_u32_e32 v5, 0x7fff, v5 -; GFX9-NEXT: v_or_b32_e32 v6, 0x400000, v2 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v2, v2 +; GFX9-NEXT: v_lshl_or_b32 v46, v54, 16, v4 +; GFX9-NEXT: v_add_f32_e32 v4, s5, v3 +; GFX9-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v7, v7, v4 +; GFX9-NEXT: v_add_u32_e32 v7, 0x7fff, v7 +; GFX9-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v4, v4 ; GFX9-NEXT: s_lshl_b32 s4, s4, 16 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc -; GFX9-NEXT: v_add_f32_e32 v1, s4, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v2 -; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 1 -; GFX9-NEXT: v_add_u32_e32 v2, v2, v1 -; GFX9-NEXT: v_add_u32_e32 v2, 0x7fff, v2 -; GFX9-NEXT: v_or_b32_e32 v5, 0x400000, v1 -; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v5, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v1 -; GFX9-NEXT: v_lshrrev_b64 v[5:6], 24, v[25:26] -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v56 -; GFX9-NEXT: v_lshrrev_b64 v[6:7], 24, v[23:24] -; GFX9-NEXT: v_lshl_or_b32 v57, v47, 16, v1 -; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[21:22] -; GFX9-NEXT: v_lshrrev_b64 v[16:17], 24, v[10:11] -; GFX9-NEXT: v_lshrrev_b64 v[1:2], 24, v[57:58] -; GFX9-NEXT: v_lshrrev_b64 v[8:9], 24, v[19:20] -; GFX9-NEXT: v_lshrrev_b64 v[12:13], 24, v[14:15] -; GFX9-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4] -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v58 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v58 -; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v57 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 24, v26 -; GFX9-NEXT: v_lshrrev_b32_e32 v57, 8, v26 -; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v25 -; GFX9-NEXT: v_lshrrev_b32_e32 v59, 24, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v24, 8, v24 -; GFX9-NEXT: v_lshrrev_b32_e32 v23, 8, v23 -; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v22 -; GFX9-NEXT: v_lshrrev_b32_e32 v22, 8, v22 -; GFX9-NEXT: v_lshrrev_b32_e32 v21, 8, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v19 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 24, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 8, v14 -; GFX9-NEXT: v_lshrrev_b32_e32 v25, 24, v11 +; GFX9-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc +; GFX9-NEXT: v_add_f32_e32 v3, s4, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v41, 16, v4 +; GFX9-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX9-NEXT: v_add_u32_e32 v4, v4, v3 +; GFX9-NEXT: v_add_u32_e32 v4, 0x7fff, v4 +; GFX9-NEXT: v_or_b32_e32 v7, 0x400000, v3 +; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v3, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v7, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v1 +; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v42 +; GFX9-NEXT: v_lshrrev_b64 v[7:8], 24, v[19:20] +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v23 +; GFX9-NEXT: v_lshl_or_b32 v45, v41, 16, v3 +; GFX9-NEXT: v_lshrrev_b64 v[8:9], 24, v[12:13] +; GFX9-NEXT: v_lshrrev_b32_e32 v57, 24, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v58, 8, v13 +; GFX9-NEXT: v_lshrrev_b32_e32 v59, 8, v12 +; GFX9-NEXT: v_lshrrev_b64 v[12:13], 24, v[17:18] +; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1 +; GFX9-NEXT: v_lshrrev_b64 v[3:4], 24, v[45:46] +; GFX9-NEXT: v_lshrrev_b64 v[13:14], 24, v[15:16] +; GFX9-NEXT: v_lshrrev_b32_e32 v43, 24, v46 +; GFX9-NEXT: v_lshrrev_b32_e32 v44, 8, v46 +; GFX9-NEXT: v_lshrrev_b32_e32 v46, 24, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v47, 8, v20 +; GFX9-NEXT: v_lshrrev_b32_e32 v56, 8, v19 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 8, v15 +; GFX9-NEXT: v_lshrrev_b64 v[14:15], 24, v[10:11] +; GFX9-NEXT: v_lshrrev_b32_e32 v19, 8, v10 +; GFX9-NEXT: v_lshrrev_b64 v[9:10], 24, v[5:6] +; GFX9-NEXT: v_lshrrev_b32_e32 v20, 8, v5 +; GFX9-NEXT: v_lshrrev_b64 v[4:5], 24, v[1:2] +; GFX9-NEXT: v_lshrrev_b32_e32 v45, 8, v45 +; GFX9-NEXT: v_lshrrev_b32_e32 v60, 24, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 8, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v17, 8, v17 +; GFX9-NEXT: v_lshrrev_b32_e32 v61, 24, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v16, 8, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v11 ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v11 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v26, 24, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v3 +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v2 +; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v1 ; GFX9-NEXT: s_branch .LBB109_5 ; GFX9-NEXT: .LBB109_3: ; GFX9-NEXT: ; implicit-def: $sgpr61 @@ -89305,82 +89215,77 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; GFX9-NEXT: v_mov_b32_e32 v1, s30 -; GFX9-NEXT: v_mov_b32_e32 v56, s4 -; GFX9-NEXT: v_mov_b32_e32 v47, s55 -; GFX9-NEXT: v_mov_b32_e32 v46, s5 -; GFX9-NEXT: v_mov_b32_e32 v44, s54 -; GFX9-NEXT: v_mov_b32_e32 v45, s28 -; GFX9-NEXT: v_mov_b32_e32 v43, s53 -; GFX9-NEXT: v_mov_b32_e32 v42, s29 -; GFX9-NEXT: v_mov_b32_e32 v40, s52 -; GFX9-NEXT: v_mov_b32_e32 v41, s26 -; GFX9-NEXT: v_mov_b32_e32 v55, s51 -; GFX9-NEXT: v_mov_b32_e32 v54, s27 -; GFX9-NEXT: v_mov_b32_e32 v52, s50 -; GFX9-NEXT: v_mov_b32_e32 v53, s24 -; GFX9-NEXT: v_mov_b32_e32 v51, s49 -; GFX9-NEXT: v_mov_b32_e32 v49, s25 -; GFX9-NEXT: v_mov_b32_e32 v39, s48 -; GFX9-NEXT: v_mov_b32_e32 v48, s22 -; GFX9-NEXT: v_mov_b32_e32 v38, s39 -; GFX9-NEXT: v_mov_b32_e32 v34, s23 -; GFX9-NEXT: v_mov_b32_e32 v33, s38 -; GFX9-NEXT: v_mov_b32_e32 v50, s20 -; GFX9-NEXT: v_mov_b32_e32 v36, s37 +; GFX9-NEXT: v_mov_b32_e32 v42, s4 +; GFX9-NEXT: v_mov_b32_e32 v41, s55 +; GFX9-NEXT: v_mov_b32_e32 v40, s5 +; GFX9-NEXT: v_mov_b32_e32 v54, s54 +; GFX9-NEXT: v_mov_b32_e32 v55, s28 +; GFX9-NEXT: v_mov_b32_e32 v53, s53 +; GFX9-NEXT: v_mov_b32_e32 v52, s29 +; GFX9-NEXT: v_mov_b32_e32 v50, s52 +; GFX9-NEXT: v_mov_b32_e32 v51, s26 +; GFX9-NEXT: v_mov_b32_e32 v49, s51 +; GFX9-NEXT: v_mov_b32_e32 v48, s27 +; GFX9-NEXT: v_mov_b32_e32 v38, s50 +; GFX9-NEXT: v_mov_b32_e32 v39, s24 +; GFX9-NEXT: v_mov_b32_e32 v37, s49 +; GFX9-NEXT: v_mov_b32_e32 v36, s25 +; GFX9-NEXT: v_mov_b32_e32 v34, s48 +; GFX9-NEXT: v_mov_b32_e32 v35, s22 +; GFX9-NEXT: v_mov_b32_e32 v33, s39 +; GFX9-NEXT: v_mov_b32_e32 v32, s23 +; GFX9-NEXT: v_mov_b32_e32 v30, s38 +; GFX9-NEXT: v_mov_b32_e32 v31, s20 +; GFX9-NEXT: v_mov_b32_e32 v29, s37 ; GFX9-NEXT: v_mov_b32_e32 v28, s21 -; GFX9-NEXT: v_mov_b32_e32 v27, s36 -; GFX9-NEXT: v_mov_b32_e32 v35, s18 -; GFX9-NEXT: v_mov_b32_e32 v37, s35 -; GFX9-NEXT: v_mov_b32_e32 v32, s19 -; GFX9-NEXT: v_mov_b32_e32 v29, s34 -; GFX9-NEXT: v_mov_b32_e32 v30, s16 -; GFX9-NEXT: v_mov_b32_e32 v31, s31 +; GFX9-NEXT: v_mov_b32_e32 v26, s36 +; GFX9-NEXT: v_mov_b32_e32 v27, s18 +; GFX9-NEXT: v_mov_b32_e32 v25, s35 +; GFX9-NEXT: v_mov_b32_e32 v24, s19 +; GFX9-NEXT: v_mov_b32_e32 v22, s34 +; GFX9-NEXT: v_mov_b32_e32 v23, s16 +; GFX9-NEXT: v_mov_b32_e32 v21, s31 ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; GFX9-NEXT: v_mov_b32_e32 v13, s95 -; GFX9-NEXT: v_mov_b32_e32 v2, s91 -; GFX9-NEXT: v_mov_b32_e32 v9, s93 -; GFX9-NEXT: v_mov_b32_e32 v58, s94 -; GFX9-NEXT: v_mov_b32_e32 v18, s88 -; GFX9-NEXT: v_mov_b32_e32 v57, s90 -; GFX9-NEXT: v_mov_b32_e32 v23, s92 -; GFX9-NEXT: v_mov_b32_e32 v59, s77 -; GFX9-NEXT: v_mov_b32_e32 v24, s79 -; GFX9-NEXT: v_mov_b32_e32 v21, s89 +; GFX9-NEXT: v_mov_b32_e32 v45, s95 +; GFX9-NEXT: v_mov_b32_e32 v43, s91 +; GFX9-NEXT: v_mov_b32_e32 v44, s93 +; GFX9-NEXT: v_mov_b32_e32 v56, s94 +; GFX9-NEXT: v_mov_b32_e32 v46, s88 +; GFX9-NEXT: v_mov_b32_e32 v47, s90 +; GFX9-NEXT: v_mov_b32_e32 v59, s92 +; GFX9-NEXT: v_mov_b32_e32 v57, s77 +; GFX9-NEXT: v_mov_b32_e32 v58, s79 +; GFX9-NEXT: v_mov_b32_e32 v17, s89 ; GFX9-NEXT: v_mov_b32_e32 v60, s74 -; GFX9-NEXT: v_mov_b32_e32 v22, s76 -; GFX9-NEXT: v_mov_b32_e32 v19, s78 +; GFX9-NEXT: v_mov_b32_e32 v18, s76 +; GFX9-NEXT: v_mov_b32_e32 v62, s78 ; GFX9-NEXT: v_mov_b32_e32 v61, s63 -; GFX9-NEXT: v_mov_b32_e32 v20, s73 -; GFX9-NEXT: v_mov_b32_e32 v14, s75 -; GFX9-NEXT: v_mov_b32_e32 v62, s60 -; GFX9-NEXT: v_mov_b32_e32 v15, s62 -; GFX9-NEXT: v_mov_b32_e32 v10, s72 -; GFX9-NEXT: v_mov_b32_e32 v25, s58 -; GFX9-NEXT: v_mov_b32_e32 v11, s59 -; GFX9-NEXT: v_mov_b32_e32 v3, s61 -; GFX9-NEXT: v_mov_b32_e32 v26, s56 -; GFX9-NEXT: v_mov_b32_e32 v4, s57 -; GFX9-NEXT: v_mov_b32_e32 v1, s44 -; GFX9-NEXT: v_mov_b32_e32 v5, s42 -; GFX9-NEXT: v_mov_b32_e32 v6, s40 -; GFX9-NEXT: v_mov_b32_e32 v7, s14 -; GFX9-NEXT: v_mov_b32_e32 v8, s12 -; GFX9-NEXT: v_mov_b32_e32 v12, s10 -; GFX9-NEXT: v_mov_b32_e32 v16, s8 -; GFX9-NEXT: v_mov_b32_e32 v17, s6 +; GFX9-NEXT: v_mov_b32_e32 v16, s73 +; GFX9-NEXT: v_mov_b32_e32 v19, s75 +; GFX9-NEXT: v_mov_b32_e32 v15, s60 +; GFX9-NEXT: v_mov_b32_e32 v11, s62 +; GFX9-NEXT: v_mov_b32_e32 v20, s72 +; GFX9-NEXT: v_mov_b32_e32 v10, s58 +; GFX9-NEXT: v_mov_b32_e32 v6, s59 +; GFX9-NEXT: v_mov_b32_e32 v1, s61 +; GFX9-NEXT: v_mov_b32_e32 v5, s56 +; GFX9-NEXT: v_mov_b32_e32 v2, s57 +; GFX9-NEXT: v_mov_b32_e32 v3, s44 +; GFX9-NEXT: v_mov_b32_e32 v7, s42 +; GFX9-NEXT: v_mov_b32_e32 v8, s40 +; GFX9-NEXT: v_mov_b32_e32 v12, s14 +; GFX9-NEXT: v_mov_b32_e32 v13, s12 +; GFX9-NEXT: v_mov_b32_e32 v14, s10 +; GFX9-NEXT: v_mov_b32_e32 v9, s8 +; GFX9-NEXT: v_mov_b32_e32 v4, s6 ; GFX9-NEXT: .LBB109_5: ; %end ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v17, v31, v17, s4 -; GFX9-NEXT: v_perm_b32 v3, v30, v3, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v17 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; GFX9-NEXT: v_perm_b32 v16, v37, v16, s4 -; GFX9-NEXT: v_perm_b32 v1, v47, v1, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_perm_b32 v2, v44, v2, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_perm_b32 v4, v21, v4, s4 +; GFX9-NEXT: v_perm_b32 v1, v23, v1, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; GFX9-NEXT: v_readlane_b32 s30, v63, 14 ; GFX9-NEXT: v_readlane_b32 s31, v63, 15 ; GFX9-NEXT: v_readlane_b32 s55, v63, 13 @@ -89398,76 +89303,81 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a, ; GFX9-NEXT: v_readlane_b32 s35, v63, 1 ; GFX9-NEXT: v_readlane_b32 s34, v63, 0 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v3, v4, s4 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v1, v2, s4 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v4, v4, v26, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:4 -; GFX9-NEXT: v_perm_b32 v3, v35, v10, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v16 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: v_perm_b32 v4, v29, v25, s4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:8 -; GFX9-NEXT: v_perm_b32 v3, v32, v11, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: v_perm_b32 v4, v36, v12, s4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:12 -; GFX9-NEXT: v_perm_b32 v3, v50, v14, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: v_perm_b32 v4, v27, v62, s4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:16 -; GFX9-NEXT: v_perm_b32 v3, v28, v15, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: v_perm_b32 v4, v38, v8, s4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:20 -; GFX9-NEXT: v_perm_b32 v3, v48, v19, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: v_perm_b32 v4, v33, v61, s4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:24 -; GFX9-NEXT: v_perm_b32 v3, v34, v20, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: v_perm_b32 v4, v51, v7, s4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:28 -; GFX9-NEXT: v_perm_b32 v3, v53, v21, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: v_perm_b32 v4, v39, v60, s4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:32 -; GFX9-NEXT: v_perm_b32 v3, v49, v22, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: v_perm_b32 v4, v55, v6, s4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:36 -; GFX9-NEXT: v_perm_b32 v3, v41, v23, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: v_perm_b32 v4, v52, v59, s4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:40 -; GFX9-NEXT: v_perm_b32 v3, v54, v24, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: v_perm_b32 v4, v43, v5, s4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:44 -; GFX9-NEXT: v_perm_b32 v3, v45, v58, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: v_perm_b32 v4, v40, v18, s4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48 -; GFX9-NEXT: v_perm_b32 v3, v42, v57, s4 -; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX9-NEXT: v_or_b32_e32 v3, v3, v4 -; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52 -; GFX9-NEXT: v_perm_b32 v3, v56, v13, s4 -; GFX9-NEXT: v_or_b32_e32 v1, v3, v1 +; GFX9-NEXT: v_perm_b32 v2, v2, v5, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v25, v9, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4 +; GFX9-NEXT: v_perm_b32 v1, v27, v20, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v22, v10, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8 +; GFX9-NEXT: v_perm_b32 v1, v24, v6, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v29, v14, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12 +; GFX9-NEXT: v_perm_b32 v1, v31, v19, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v26, v15, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16 +; GFX9-NEXT: v_perm_b32 v1, v28, v11, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v33, v13, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20 +; GFX9-NEXT: v_perm_b32 v1, v35, v62, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v30, v61, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24 +; GFX9-NEXT: v_perm_b32 v1, v32, v16, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v37, v12, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28 +; GFX9-NEXT: v_perm_b32 v1, v39, v17, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v34, v60, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32 +; GFX9-NEXT: v_perm_b32 v1, v36, v18, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v49, v8, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36 +; GFX9-NEXT: v_perm_b32 v1, v51, v59, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v38, v57, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 +; GFX9-NEXT: v_perm_b32 v1, v48, v58, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v53, v7, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44 +; GFX9-NEXT: v_perm_b32 v1, v55, v56, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v50, v46, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 +; GFX9-NEXT: v_perm_b32 v1, v52, v47, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v41, v3, s4 +; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52 +; GFX9-NEXT: v_perm_b32 v1, v42, v45, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX9-NEXT: v_perm_b32 v2, v54, v43, s4 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56 -; GFX9-NEXT: v_perm_b32 v1, v46, v9, s4 +; GFX9-NEXT: v_perm_b32 v1, v40, v44, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX9-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60 ; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload @@ -91535,10 +91445,10 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill @@ -91553,10 +91463,10 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_ushort v53, off, s[0:3], s32 offset:116 ; VI-NEXT: buffer_load_ushort v50, off, s[0:3], s32 offset:112 ; VI-NEXT: buffer_load_ushort v51, off, s[0:3], s32 offset:108 -; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:104 -; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:100 -; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:96 -; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:92 +; VI-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:104 +; VI-NEXT: buffer_load_ushort v49, off, s[0:3], s32 offset:100 +; VI-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:96 +; VI-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:92 ; VI-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:88 ; VI-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:84 ; VI-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:80 @@ -91599,7 +91509,7 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; VI-NEXT: v_perm_b32 v13, v35, v34, s6 ; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_perm_b32 v14, v49, v48, s6 +; VI-NEXT: v_perm_b32 v14, v39, v38, s6 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_perm_b32 v15, v51, v50, s6 ; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 @@ -91623,8 +91533,8 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr62 ; VI-NEXT: ; implicit-def: $vgpr35 ; VI-NEXT: ; implicit-def: $vgpr34 -; VI-NEXT: ; implicit-def: $vgpr49 -; VI-NEXT: ; implicit-def: $vgpr48 +; VI-NEXT: ; implicit-def: $vgpr39 +; VI-NEXT: ; implicit-def: $vgpr38 ; VI-NEXT: ; implicit-def: $vgpr51 ; VI-NEXT: ; implicit-def: $vgpr50 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -91633,20 +91543,20 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v1, v2, v1, s6 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_perm_b32 v1, v2, v1, s6 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_perm_b32 v3, v4, v3, s6 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 -; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: v_perm_b32 v2, v3, v2, s6 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 +; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_perm_b32 v2, v3, v2, s6 ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload @@ -91687,7 +91597,7 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_or_b32_e32 v12, v12, v13 ; VI-NEXT: v_perm_b32 v13, v37, v36, s6 ; VI-NEXT: v_or_b32_e32 v13, v13, v14 -; VI-NEXT: v_perm_b32 v14, v39, v38, s6 +; VI-NEXT: v_perm_b32 v14, v49, v48, s6 ; VI-NEXT: v_perm_b32 v16, v32, v54, s6 ; VI-NEXT: v_or_b32_e32 v14, v14, v15 ; VI-NEXT: v_perm_b32 v15, v53, v52, s6 @@ -91742,8 +91652,8 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: ; implicit-def: $vgpr63 ; VI-NEXT: ; implicit-def: $vgpr37 ; VI-NEXT: ; implicit-def: $vgpr36 -; VI-NEXT: ; implicit-def: $vgpr39 -; VI-NEXT: ; implicit-def: $vgpr38 +; VI-NEXT: ; implicit-def: $vgpr49 +; VI-NEXT: ; implicit-def: $vgpr48 ; VI-NEXT: ; implicit-def: $vgpr53 ; VI-NEXT: ; implicit-def: $vgpr52 ; VI-NEXT: ; implicit-def: $vgpr32 @@ -91761,12 +91671,12 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_add_u16_e32 v1, 3, v51 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v50 ; VI-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: v_add_u16_e32 v2, 3, v39 -; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v38 -; VI-NEXT: v_or_b32_sdwa v14, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: s_waitcnt vmcnt(12) ; VI-NEXT: v_add_u16_e32 v2, 3, v49 ; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v48 +; VI-NEXT: v_or_b32_sdwa v14, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; VI-NEXT: s_waitcnt vmcnt(12) +; VI-NEXT: v_add_u16_e32 v2, 3, v39 +; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v38 ; VI-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_mov_b32_e32 v3, 0x300 ; VI-NEXT: v_add_u16_sdwa v32, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD @@ -91897,15 +91807,15 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; VI-NEXT: v_add_u16_sdwa v2, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v0, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; VI-NEXT: v_or_b32_sdwa v19, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_add_u16_e32 v0, 3, v0 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -91991,14 +91901,14 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_ushort v52, off, s[0:3], s32 offset:116 ; GFX9-NEXT: buffer_load_ushort v36, off, s[0:3], s32 ; GFX9-NEXT: v_mov_b32_e32 v19, v12 -; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill @@ -92041,13 +91951,13 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(18) ; GFX9-NEXT: v_lshlrev_b16_e32 v33, 8, v5 ; GFX9-NEXT: s_waitcnt vmcnt(17) -; GFX9-NEXT: v_lshlrev_b16_e32 v37, 8, v6 +; GFX9-NEXT: v_lshlrev_b16_e32 v35, 8, v6 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_lshlrev_b16_e32 v51, 8, v7 +; GFX9-NEXT: v_lshlrev_b16_e32 v50, 8, v7 ; GFX9-NEXT: s_waitcnt vmcnt(15) -; GFX9-NEXT: v_lshlrev_b16_e32 v35, 8, v8 +; GFX9-NEXT: v_lshlrev_b16_e32 v37, 8, v8 ; GFX9-NEXT: s_waitcnt vmcnt(14) -; GFX9-NEXT: v_lshlrev_b16_e32 v50, 8, v9 +; GFX9-NEXT: v_lshlrev_b16_e32 v51, 8, v9 ; GFX9-NEXT: s_waitcnt vmcnt(13) ; GFX9-NEXT: v_lshlrev_b16_e32 v49, 8, v10 ; GFX9-NEXT: s_waitcnt vmcnt(12) @@ -92071,7 +91981,7 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: s_waitcnt vmcnt(2) ; GFX9-NEXT: v_or_b32_sdwa v11, v55, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v12, v42, v41, s6 -; GFX9-NEXT: v_or_b32_sdwa v13, v43, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v13, v43, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v14, v58, v57, s6 ; GFX9-NEXT: v_or_b32_sdwa v15, v34, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: ; implicit-def: $vgpr22 @@ -92092,7 +92002,7 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr34 ; GFX9-NEXT: ; implicit-def: $vgpr45 ; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr37 ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v0, v1, v0, s6 @@ -92100,22 +92010,22 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 -; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v0, v1, v0, s7 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s6 +; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 -; GFX9-NEXT: v_perm_b32 v1, v3, v2, s7 +; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 +; GFX9-NEXT: v_perm_b32 v1, v2, v1, s7 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v2, v3, v2, s6 -; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v3, v4, v3, s6 ; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload @@ -92149,11 +92059,11 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v9, v9, v10, s7 ; GFX9-NEXT: v_or_b32_sdwa v10, v48, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v10, v11, v10, s7 -; GFX9-NEXT: v_or_b32_sdwa v11, v40, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v11, v40, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v11, v11, v12, s7 -; GFX9-NEXT: v_or_b32_sdwa v12, v44, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v12, v44, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v12, v13, v12, s7 -; GFX9-NEXT: v_or_b32_sdwa v13, v46, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v13, v46, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v13, v13, v14, s7 ; GFX9-NEXT: v_or_b32_sdwa v14, v31, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v14, v15, v14, s7 @@ -92210,9 +92120,9 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr56 ; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr38 -; GFX9-NEXT: ; implicit-def: $vgpr37 -; GFX9-NEXT: ; implicit-def: $vgpr51 +; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr50 +; GFX9-NEXT: ; implicit-def: $vgpr51 ; GFX9-NEXT: ; implicit-def: $vgpr49 ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: .LBB110_2: ; %Flow @@ -92234,24 +92144,24 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v13, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v46 -; GFX9-NEXT: v_or_b32_sdwa v0, v50, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_or_b32_sdwa v0, v51, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v3, 3, v34 ; GFX9-NEXT: v_add_u16_e32 v34, 0x300, v0 ; GFX9-NEXT: s_waitcnt vmcnt(4) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v44 -; GFX9-NEXT: v_or_b32_sdwa v0, v51, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_or_b32_sdwa v0, v50, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v12, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v43 -; GFX9-NEXT: v_or_b32_sdwa v0, v35, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v0 +; GFX9-NEXT: v_or_b32_sdwa v0, v37, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v0 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v42 ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v41 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v11, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v40 -; GFX9-NEXT: v_or_b32_sdwa v0, v37, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX9-NEXT: v_add_u16_e32 v37, 0x300, v0 +; GFX9-NEXT: v_or_b32_sdwa v0, v35, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GFX9-NEXT: v_add_u16_e32 v35, 0x300, v0 ; GFX9-NEXT: v_add_u16_e32 v0, 3, v48 ; GFX9-NEXT: v_or_b32_sdwa v0, v38, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v10, 0x300, v0 @@ -92313,8 +92223,8 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v8, v39, v8, s6 ; GFX9-NEXT: v_perm_b32 v9, v38, v9, s6 ; GFX9-NEXT: v_perm_b32 v10, v33, v10, s6 -; GFX9-NEXT: v_perm_b32 v11, v37, v11, s6 -; GFX9-NEXT: v_perm_b32 v12, v35, v12, s6 +; GFX9-NEXT: v_perm_b32 v11, v35, v11, s6 +; GFX9-NEXT: v_perm_b32 v12, v37, v12, s6 ; GFX9-NEXT: v_perm_b32 v13, v34, v13, s6 ; GFX9-NEXT: v_perm_b32 v14, v32, v14, s6 ; GFX9-NEXT: v_perm_b32 v15, v31, v15, s6 @@ -92355,16 +92265,16 @@ define <32 x bfloat> @bitcast_v64i8_to_v32bf16(<64 x i8> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v2, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX9-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u16_e32 v18, 0x300, v0 -; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v2, v18, v2, s6 ; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: v_add_u16_e32 v0, 3, v0 @@ -93942,18 +93852,18 @@ define inreg <32 x bfloat> @bitcast_v64i8_to_v32bf16_scalar(<64 x i8> inreg %a, ; VI-NEXT: ; %bb.1: ; %cmp.false ; VI-NEXT: v_mov_b32_e32 v11, 0xc0c0004 ; VI-NEXT: v_mov_b32_e32 v1, s19 -; VI-NEXT: v_mov_b32_e32 v3, s23 ; VI-NEXT: v_mov_b32_e32 v0, s17 ; VI-NEXT: v_perm_b32 v1, s18, v1, v11 -; VI-NEXT: v_mov_b32_e32 v2, s21 -; VI-NEXT: v_perm_b32 v3, s22, v3, v11 ; VI-NEXT: v_perm_b32 v0, s16, v0, v11 ; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_perm_b32 v2, s20, v2, v11 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_mov_b32_e32 v2, s23 ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_mov_b32_e32 v1, s21 +; VI-NEXT: v_perm_b32 v2, s22, v2, v11 +; VI-NEXT: v_perm_b32 v1, s20, v1, v11 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_mov_b32_e32 v3, s27 +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_mov_b32_e32 v2, s25 ; VI-NEXT: v_perm_b32 v3, s26, v3, v11 ; VI-NEXT: v_perm_b32 v2, s24, v2, v11 @@ -94034,147 +93944,147 @@ define inreg <32 x bfloat> @bitcast_v64i8_to_v32bf16_scalar(<64 x i8> inreg %a, ; VI-NEXT: .LBB111_2: ; %cmp.true ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v34 ; VI-NEXT: s_mov_b32 s4, 0xc0c0004 -; VI-NEXT: v_perm_b32 v8, v0, v31, s4 ; VI-NEXT: s_waitcnt vmcnt(12) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v33 -; VI-NEXT: v_perm_b32 v9, v0, v28, s4 +; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v33 ; VI-NEXT: s_waitcnt vmcnt(10) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v32 -; VI-NEXT: v_perm_b32 v10, v0, v26, s4 +; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v32 ; VI-NEXT: s_waitcnt vmcnt(8) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v29 -; VI-NEXT: v_perm_b32 v11, v0, v23, s4 +; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v29 ; VI-NEXT: s_waitcnt vmcnt(6) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v30 -; VI-NEXT: v_perm_b32 v12, v0, v24, s4 +; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v30 ; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v27 -; VI-NEXT: v_perm_b32 v13, v0, v21, s4 +; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v27 ; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v25 -; VI-NEXT: v_perm_b32 v14, v0, v20, s4 +; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v25 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v22 -; VI-NEXT: v_perm_b32 v15, v0, v19, s4 -; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v18 -; VI-NEXT: v_perm_b32 v17, v0, v17, s4 -; VI-NEXT: v_mov_b32_e32 v0, 0xc0c0004 +; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v22 +; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v18 +; VI-NEXT: s_add_i32 s41, s41, 3 +; VI-NEXT: v_mov_b32_e32 v9, 0xc0c0004 +; VI-NEXT: v_perm_b32 v0, v0, v31, s4 +; VI-NEXT: v_perm_b32 v1, v1, v28, s4 +; VI-NEXT: v_perm_b32 v2, v2, v26, s4 +; VI-NEXT: v_perm_b32 v3, v3, v23, s4 +; VI-NEXT: v_perm_b32 v4, v4, v24, s4 +; VI-NEXT: v_perm_b32 v5, v5, v21, s4 +; VI-NEXT: v_perm_b32 v6, v6, v20, s4 +; VI-NEXT: v_perm_b32 v7, v7, v19, s4 +; VI-NEXT: v_perm_b32 v8, v8, v17, s4 +; VI-NEXT: v_perm_b32 v10, s41, v16, v9 ; VI-NEXT: s_add_i32 s40, s40, 3 -; VI-NEXT: v_mov_b32_e32 v1, s14 -; VI-NEXT: v_perm_b32 v18, s40, v1, v0 +; VI-NEXT: v_mov_b32_e32 v11, s14 ; VI-NEXT: s_add_i32 s15, s15, 3 -; VI-NEXT: v_mov_b32_e32 v1, s12 -; VI-NEXT: v_perm_b32 v19, s15, v1, v0 +; VI-NEXT: v_mov_b32_e32 v12, s12 ; VI-NEXT: s_add_i32 s13, s13, 3 -; VI-NEXT: v_mov_b32_e32 v1, s10 -; VI-NEXT: v_perm_b32 v20, s13, v1, v0 +; VI-NEXT: v_mov_b32_e32 v13, s10 ; VI-NEXT: s_add_i32 s11, s11, 3 -; VI-NEXT: v_mov_b32_e32 v1, s8 -; VI-NEXT: v_perm_b32 v21, s11, v1, v0 +; VI-NEXT: v_mov_b32_e32 v14, s8 ; VI-NEXT: s_add_i32 s9, s9, 3 -; VI-NEXT: v_mov_b32_e32 v1, s7 -; VI-NEXT: v_perm_b32 v22, s9, v1, v0 +; VI-NEXT: v_mov_b32_e32 v15, s7 ; VI-NEXT: s_add_i32 s44, s44, 3 -; VI-NEXT: v_mov_b32_e32 v1, s6 -; VI-NEXT: v_perm_b32 v23, s44, v1, v0 +; VI-NEXT: v_mov_b32_e32 v16, s6 ; VI-NEXT: s_add_i32 s43, s43, 3 -; VI-NEXT: v_mov_b32_e32 v1, s42 -; VI-NEXT: v_perm_b32 v7, s43, v1, v0 +; VI-NEXT: v_mov_b32_e32 v17, s42 ; VI-NEXT: s_add_i32 s76, s76, 3 -; VI-NEXT: v_mov_b32_e32 v1, s74 -; VI-NEXT: v_perm_b32 v24, s76, v1, v0 +; VI-NEXT: v_mov_b32_e32 v18, s74 ; VI-NEXT: s_add_i32 s75, s75, 3 -; VI-NEXT: v_mov_b32_e32 v1, s72 -; VI-NEXT: v_perm_b32 v6, s75, v1, v0 +; VI-NEXT: v_mov_b32_e32 v19, s72 ; VI-NEXT: s_add_i32 s73, s73, 3 -; VI-NEXT: v_mov_b32_e32 v1, s62 -; VI-NEXT: v_perm_b32 v25, s73, v1, v0 +; VI-NEXT: v_mov_b32_e32 v20, s62 ; VI-NEXT: s_add_i32 s63, s63, 3 -; VI-NEXT: v_mov_b32_e32 v1, s60 -; VI-NEXT: v_perm_b32 v5, s63, v1, v0 +; VI-NEXT: v_mov_b32_e32 v21, s60 ; VI-NEXT: s_add_i32 s61, s61, 3 -; VI-NEXT: v_mov_b32_e32 v1, s58 -; VI-NEXT: v_perm_b32 v26, s61, v1, v0 +; VI-NEXT: v_mov_b32_e32 v22, s58 ; VI-NEXT: s_add_i32 s59, s59, 3 -; VI-NEXT: v_mov_b32_e32 v1, s47 -; VI-NEXT: v_perm_b32 v4, s59, v1, v0 +; VI-NEXT: v_mov_b32_e32 v23, s47 ; VI-NEXT: s_add_i32 s56, s56, 3 -; VI-NEXT: v_mov_b32_e32 v1, s46 -; VI-NEXT: v_perm_b32 v27, s56, v1, v0 +; VI-NEXT: v_mov_b32_e32 v24, s46 ; VI-NEXT: s_add_i32 s57, s57, 3 -; VI-NEXT: v_mov_b32_e32 v1, s45 -; VI-NEXT: v_perm_b32 v3, s57, v1, v0 +; VI-NEXT: v_mov_b32_e32 v25, s45 ; VI-NEXT: s_add_i32 s28, s28, 3 -; VI-NEXT: v_mov_b32_e32 v1, s29 -; VI-NEXT: v_perm_b32 v28, s28, v1, v0 +; VI-NEXT: v_mov_b32_e32 v26, s29 ; VI-NEXT: s_add_i32 s26, s26, 3 -; VI-NEXT: v_mov_b32_e32 v1, s27 -; VI-NEXT: v_perm_b32 v2, s26, v1, v0 +; VI-NEXT: v_mov_b32_e32 v27, s27 ; VI-NEXT: s_add_i32 s24, s24, 3 -; VI-NEXT: v_mov_b32_e32 v1, s25 -; VI-NEXT: s_add_i32 s41, s41, 3 -; VI-NEXT: v_perm_b32 v29, s24, v1, v0 +; VI-NEXT: v_mov_b32_e32 v28, s25 ; VI-NEXT: s_add_i32 s22, s22, 3 -; VI-NEXT: v_mov_b32_e32 v1, s23 +; VI-NEXT: v_mov_b32_e32 v29, s23 ; VI-NEXT: s_add_i32 s20, s20, 3 ; VI-NEXT: v_mov_b32_e32 v30, s21 ; VI-NEXT: s_add_i32 s18, s18, 3 ; VI-NEXT: v_mov_b32_e32 v31, s19 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: v_mov_b32_e32 v32, s17 -; VI-NEXT: v_perm_b32 v16, s41, v16, v0 -; VI-NEXT: v_perm_b32 v1, s22, v1, v0 -; VI-NEXT: v_perm_b32 v30, s20, v30, v0 -; VI-NEXT: v_perm_b32 v31, s18, v31, v0 -; VI-NEXT: v_perm_b32 v0, s16, v32, v0 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_add_u32_e32 v28, vcc, 0x300, v28 -; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v27 -; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; VI-NEXT: v_add_u32_e32 v26, vcc, 0x300, v26 -; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x300, v25 -; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; VI-NEXT: v_add_u32_e32 v24, vcc, 0x300, v24 -; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; VI-NEXT: v_add_u32_e32 v30, vcc, 0x300, v30 -; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; VI-NEXT: v_add_u32_e32 v0, vcc, 0x300, v0 -; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; VI-NEXT: v_add_u32_e32 v29, vcc, 0x300, v29 -; VI-NEXT: v_or_b32_sdwa v3, v3, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v4, v4, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v5, v5, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v6, v6, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v7, v7, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v8 -; VI-NEXT: v_add_u32_e32 v25, vcc, 0x300, v9 -; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v10 -; VI-NEXT: v_add_u32_e32 v27, vcc, 0x300, v11 -; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v12 -; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v13 -; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v14 -; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v15 -; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v17 -; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v16 -; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v18 -; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v19 -; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v20 -; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v21 -; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v22 -; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v23 -; VI-NEXT: v_or_b32_sdwa v0, v31, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v1, v1, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v2, v2, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v8, v8, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v9, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v10, v10, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v11, v11, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v12, v12, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v13, v28, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v14, v26, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 -; VI-NEXT: v_or_b32_sdwa v15, v24, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_perm_b32 v11, s40, v11, v9 +; VI-NEXT: v_perm_b32 v12, s15, v12, v9 +; VI-NEXT: v_perm_b32 v13, s13, v13, v9 +; VI-NEXT: v_perm_b32 v14, s11, v14, v9 +; VI-NEXT: v_perm_b32 v15, s9, v15, v9 +; VI-NEXT: v_perm_b32 v16, s44, v16, v9 +; VI-NEXT: v_perm_b32 v17, s43, v17, v9 +; VI-NEXT: v_perm_b32 v18, s76, v18, v9 +; VI-NEXT: v_perm_b32 v19, s75, v19, v9 +; VI-NEXT: v_perm_b32 v20, s73, v20, v9 +; VI-NEXT: v_perm_b32 v21, s63, v21, v9 +; VI-NEXT: v_perm_b32 v22, s61, v22, v9 +; VI-NEXT: v_perm_b32 v23, s59, v23, v9 +; VI-NEXT: v_perm_b32 v24, s56, v24, v9 +; VI-NEXT: v_perm_b32 v25, s57, v25, v9 +; VI-NEXT: v_perm_b32 v26, s28, v26, v9 +; VI-NEXT: v_perm_b32 v27, s26, v27, v9 +; VI-NEXT: v_perm_b32 v28, s24, v28, v9 +; VI-NEXT: v_perm_b32 v29, s22, v29, v9 +; VI-NEXT: v_perm_b32 v30, s20, v30, v9 +; VI-NEXT: v_perm_b32 v31, s18, v31, v9 +; VI-NEXT: v_perm_b32 v9, s16, v32, v9 +; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v0 +; VI-NEXT: v_add_u32_e32 v33, vcc, 0x300, v1 +; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v2 +; VI-NEXT: v_add_u32_e32 v35, vcc, 0x300, v3 +; VI-NEXT: v_lshlrev_b32_e32 v36, 16, v4 +; VI-NEXT: v_add_u32_e32 v37, vcc, 0x300, v5 +; VI-NEXT: v_lshlrev_b32_e32 v38, 16, v6 +; VI-NEXT: v_add_u32_e32 v39, vcc, 0x300, v7 +; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v8 +; VI-NEXT: v_add_u32_e32 v49, vcc, 0x300, v10 +; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; VI-NEXT: v_add_u32_e32 v11, vcc, 0x300, v12 +; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 +; VI-NEXT: v_add_u32_e32 v13, vcc, 0x300, v14 +; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v15 +; VI-NEXT: v_add_u32_e32 v14, vcc, 0x300, v16 +; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v17 +; VI-NEXT: v_add_u32_e32 v15, vcc, 0x300, v18 +; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v19 +; VI-NEXT: v_add_u32_e32 v16, vcc, 0x300, v20 +; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v21 +; VI-NEXT: v_add_u32_e32 v17, vcc, 0x300, v22 +; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v23 +; VI-NEXT: v_add_u32_e32 v18, vcc, 0x300, v24 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v25 +; VI-NEXT: v_add_u32_e32 v19, vcc, 0x300, v26 +; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27 +; VI-NEXT: v_add_u32_e32 v20, vcc, 0x300, v28 +; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v29 +; VI-NEXT: v_add_u32_e32 v21, vcc, 0x300, v30 +; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v31 +; VI-NEXT: v_add_u32_e32 v9, vcc, 0x300, v9 +; VI-NEXT: v_or_b32_sdwa v0, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v1, v1, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v2, v2, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v3, v3, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v4, v4, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v5, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v6, v6, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v7, v7, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v8, v8, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v9, v12, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v10, v10, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v11, v48, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v12, v38, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v13, v36, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v14, v34, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 +; VI-NEXT: v_or_b32_sdwa v15, v32, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; VI-NEXT: v_add_u32_e32 v0, vcc, 0x3000000, v0 ; VI-NEXT: v_add_u32_e32 v1, vcc, 0x3000000, v1 ; VI-NEXT: v_add_u32_e32 v2, vcc, 0x3000000, v2 @@ -94201,22 +94111,22 @@ define inreg <32 x bfloat> @bitcast_v64i8_to_v32bf16_scalar(<64 x i8> inreg %a, ; GFX9-LABEL: bitcast_v64i8_to_v32bf16_scalar: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_readfirstlane_b32 s72, v30 -; GFX9-NEXT: v_readfirstlane_b32 s56, v29 -; GFX9-NEXT: v_readfirstlane_b32 s57, v28 -; GFX9-NEXT: v_readfirstlane_b32 s61, v27 -; GFX9-NEXT: v_readfirstlane_b32 s63, v26 -; GFX9-NEXT: v_readfirstlane_b32 s7, v25 -; GFX9-NEXT: v_readfirstlane_b32 s47, v24 -; GFX9-NEXT: v_readfirstlane_b32 s58, v23 -; GFX9-NEXT: v_readfirstlane_b32 s60, v22 +; GFX9-NEXT: v_readfirstlane_b32 s41, v30 +; GFX9-NEXT: v_readfirstlane_b32 s11, v29 +; GFX9-NEXT: v_readfirstlane_b32 s12, v28 +; GFX9-NEXT: v_readfirstlane_b32 s15, v27 +; GFX9-NEXT: v_readfirstlane_b32 s40, v26 +; GFX9-NEXT: v_readfirstlane_b32 s8, v25 +; GFX9-NEXT: v_readfirstlane_b32 s9, v24 +; GFX9-NEXT: v_readfirstlane_b32 s13, v23 +; GFX9-NEXT: v_readfirstlane_b32 s14, v22 ; GFX9-NEXT: v_readfirstlane_b32 s6, v21 -; GFX9-NEXT: v_readfirstlane_b32 s8, v20 -; GFX9-NEXT: v_readfirstlane_b32 s9, v19 -; GFX9-NEXT: v_readfirstlane_b32 s10, v18 -; GFX9-NEXT: v_readfirstlane_b32 s11, v17 -; GFX9-NEXT: v_readfirstlane_b32 s12, v16 -; GFX9-NEXT: v_readfirstlane_b32 s15, v12 +; GFX9-NEXT: v_readfirstlane_b32 s7, v20 +; GFX9-NEXT: v_readfirstlane_b32 s10, v19 +; GFX9-NEXT: v_readfirstlane_b32 s56, v18 +; GFX9-NEXT: v_readfirstlane_b32 s43, v17 +; GFX9-NEXT: v_readfirstlane_b32 s45, v16 +; GFX9-NEXT: v_readfirstlane_b32 s44, v12 ; GFX9-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:76 ; GFX9-NEXT: buffer_load_ushort v16, off, s[0:3], s32 offset:8 ; GFX9-NEXT: buffer_load_ushort v17, off, s[0:3], s32 offset:4 @@ -94237,21 +94147,21 @@ define inreg <32 x bfloat> @bitcast_v64i8_to_v32bf16_scalar(<64 x i8> inreg %a, ; GFX9-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:20 ; GFX9-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:16 ; GFX9-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:12 -; GFX9-NEXT: v_readfirstlane_b32 s13, v15 -; GFX9-NEXT: v_readfirstlane_b32 s73, v14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v13 -; GFX9-NEXT: v_readfirstlane_b32 s40, v11 +; GFX9-NEXT: v_readfirstlane_b32 s46, v15 +; GFX9-NEXT: v_readfirstlane_b32 s47, v14 +; GFX9-NEXT: v_readfirstlane_b32 s42, v13 +; GFX9-NEXT: v_readfirstlane_b32 s75, v11 ; GFX9-NEXT: v_readfirstlane_b32 s76, v10 -; GFX9-NEXT: v_readfirstlane_b32 s41, v9 -; GFX9-NEXT: v_readfirstlane_b32 s42, v8 -; GFX9-NEXT: v_readfirstlane_b32 s43, v7 -; GFX9-NEXT: v_readfirstlane_b32 s75, v6 -; GFX9-NEXT: v_readfirstlane_b32 s44, v5 -; GFX9-NEXT: v_readfirstlane_b32 s45, v4 -; GFX9-NEXT: v_readfirstlane_b32 s46, v3 -; GFX9-NEXT: v_readfirstlane_b32 s74, v2 -; GFX9-NEXT: v_readfirstlane_b32 s59, v1 -; GFX9-NEXT: v_readfirstlane_b32 s62, v0 +; GFX9-NEXT: v_readfirstlane_b32 s61, v9 +; GFX9-NEXT: v_readfirstlane_b32 s62, v8 +; GFX9-NEXT: v_readfirstlane_b32 s73, v7 +; GFX9-NEXT: v_readfirstlane_b32 s74, v6 +; GFX9-NEXT: v_readfirstlane_b32 s58, v5 +; GFX9-NEXT: v_readfirstlane_b32 s60, v4 +; GFX9-NEXT: v_readfirstlane_b32 s63, v3 +; GFX9-NEXT: v_readfirstlane_b32 s72, v2 +; GFX9-NEXT: v_readfirstlane_b32 s57, v1 +; GFX9-NEXT: v_readfirstlane_b32 s59, v0 ; GFX9-NEXT: s_waitcnt vmcnt(19) ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v12 ; GFX9-NEXT: s_and_b64 s[4:5], vcc, exec @@ -94259,17 +94169,17 @@ define inreg <32 x bfloat> @bitcast_v64i8_to_v32bf16_scalar(<64 x i8> inreg %a, ; GFX9-NEXT: ; %bb.1: ; %cmp.false ; GFX9-NEXT: v_mov_b32_e32 v0, s17 ; GFX9-NEXT: v_mov_b32_e32 v8, 0xc0c0004 -; GFX9-NEXT: v_mov_b32_e32 v2, s21 ; GFX9-NEXT: v_perm_b32 v0, s16, v0, v8 ; GFX9-NEXT: v_mov_b32_e32 v1, s19 -; GFX9-NEXT: v_perm_b32 v2, s20, v2, v8 -; GFX9-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-NEXT: v_perm_b32 v1, s18, v1, v8 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_perm_b32 v3, s22, v3, v8 -; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v2 +; GFX9-NEXT: v_mov_b32_e32 v1, s21 +; GFX9-NEXT: v_perm_b32 v1, s20, v1, v8 +; GFX9-NEXT: v_mov_b32_e32 v2, s23 +; GFX9-NEXT: v_perm_b32 v2, s22, v2, v8 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 ; GFX9-NEXT: v_mov_b32_e32 v2, s25 ; GFX9-NEXT: v_perm_b32 v2, s24, v2, v8 ; GFX9-NEXT: v_mov_b32_e32 v3, s27 @@ -94278,247 +94188,246 @@ define inreg <32 x bfloat> @bitcast_v64i8_to_v32bf16_scalar(<64 x i8> inreg %a, ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 ; GFX9-NEXT: v_mov_b32_e32 v3, s29 ; GFX9-NEXT: v_perm_b32 v3, s28, v3, v8 -; GFX9-NEXT: v_mov_b32_e32 v4, s59 -; GFX9-NEXT: v_perm_b32 v4, s62, v4, v8 +; GFX9-NEXT: v_mov_b32_e32 v4, s57 +; GFX9-NEXT: v_perm_b32 v4, s59, v4, v8 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 -; GFX9-NEXT: v_mov_b32_e32 v4, s46 -; GFX9-NEXT: v_perm_b32 v4, s74, v4, v8 -; GFX9-NEXT: v_mov_b32_e32 v5, s44 -; GFX9-NEXT: v_perm_b32 v5, s45, v5, v8 +; GFX9-NEXT: v_mov_b32_e32 v4, s63 +; GFX9-NEXT: v_perm_b32 v4, s72, v4, v8 +; GFX9-NEXT: v_mov_b32_e32 v5, s58 +; GFX9-NEXT: v_perm_b32 v5, s60, v5, v8 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: v_mov_b32_e32 v5, s43 -; GFX9-NEXT: v_perm_b32 v5, s75, v5, v8 -; GFX9-NEXT: v_mov_b32_e32 v6, s41 -; GFX9-NEXT: v_perm_b32 v6, s42, v6, v8 +; GFX9-NEXT: v_mov_b32_e32 v5, s73 +; GFX9-NEXT: v_perm_b32 v5, s74, v5, v8 +; GFX9-NEXT: v_mov_b32_e32 v6, s61 +; GFX9-NEXT: v_perm_b32 v6, s62, v6, v8 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: v_mov_b32_e32 v6, s40 +; GFX9-NEXT: v_mov_b32_e32 v6, s75 ; GFX9-NEXT: v_perm_b32 v6, s76, v6, v8 -; GFX9-NEXT: v_mov_b32_e32 v7, s14 -; GFX9-NEXT: v_perm_b32 v7, s15, v7, v8 +; GFX9-NEXT: v_mov_b32_e32 v7, s42 +; GFX9-NEXT: v_perm_b32 v7, s44, v7, v8 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 -; GFX9-NEXT: v_mov_b32_e32 v7, s13 -; GFX9-NEXT: v_perm_b32 v7, s73, v7, v8 -; GFX9-NEXT: v_mov_b32_e32 v9, s11 -; GFX9-NEXT: v_perm_b32 v9, s12, v9, v8 +; GFX9-NEXT: v_mov_b32_e32 v7, s46 +; GFX9-NEXT: v_perm_b32 v7, s47, v7, v8 +; GFX9-NEXT: v_mov_b32_e32 v9, s43 +; GFX9-NEXT: v_perm_b32 v9, s45, v9, v8 ; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; GFX9-NEXT: v_lshl_or_b32 v7, v9, 16, v7 -; GFX9-NEXT: s_waitcnt vmcnt(18) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v16 +; GFX9-NEXT: v_mov_b32_e32 v9, s13 +; GFX9-NEXT: v_perm_b32 v9, s14, v9, v8 ; GFX9-NEXT: s_waitcnt vmcnt(16) -; GFX9-NEXT: v_perm_b32 v10, s72, v18, v8 -; GFX9-NEXT: v_or_b32_sdwa v9, v17, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v9, 16, v10 +; GFX9-NEXT: v_perm_b32 v8, s41, v18, v8 +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v16 +; GFX9-NEXT: v_or_b32_sdwa v10, v17, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v11, v10, 16, v8 ; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v26 +; GFX9-NEXT: v_lshlrev_b32_e32 v8, 8, v26 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_or_b32_sdwa v9, v29, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v8, v29, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v19 -; GFX9-NEXT: v_or_b32_sdwa v10, v21, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_lshl_or_b32 v12, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v20 -; GFX9-NEXT: v_perm_b32 v10, v31, v28, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v23, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v13, v9, 16, v10 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v30 -; GFX9-NEXT: v_or_b32_sdwa v9, v33, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_or_b32_sdwa v10, v21, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v12, v10, 16, v8 +; GFX9-NEXT: v_perm_b32 v8, v31, v28, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v20 +; GFX9-NEXT: v_or_b32_sdwa v10, v23, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v13, v10, 16, v8 +; GFX9-NEXT: v_lshlrev_b32_e32 v8, 8, v30 +; GFX9-NEXT: v_or_b32_sdwa v8, v33, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 8, v22 ; GFX9-NEXT: v_or_b32_sdwa v10, v25, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_lshl_or_b32 v14, v10, 16, v9 -; GFX9-NEXT: v_lshlrev_b32_e32 v9, 8, v24 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_lshl_or_b32 v14, v10, 16, v8 ; GFX9-NEXT: v_perm_b32 v10, v34, v32, s4 -; GFX9-NEXT: v_or_b32_sdwa v9, v27, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD +; GFX9-NEXT: s_and_b32 s4, s56, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s10, 8 +; GFX9-NEXT: s_or_b32 s4, s4, s5 +; GFX9-NEXT: s_and_b32 s5, s7, 0xff +; GFX9-NEXT: s_lshl_b32 s77, s6, 8 +; GFX9-NEXT: v_lshlrev_b32_e32 v8, 8, v24 +; GFX9-NEXT: s_or_b32 s5, s5, s77 +; GFX9-NEXT: v_or_b32_sdwa v8, v27, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v15, v9, 16, v10 -; GFX9-NEXT: v_mov_b32_e32 v9, s58 -; GFX9-NEXT: v_perm_b32 v8, s60, v9, v8 -; GFX9-NEXT: s_and_b32 s4, s47, 0xff -; GFX9-NEXT: s_lshl_b32 s5, s7, 8 +; GFX9-NEXT: s_pack_ll_b32_b16 s77, s4, s5 +; GFX9-NEXT: s_and_b32 s4, s9, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s8, 8 +; GFX9-NEXT: v_lshl_or_b32 v15, v8, 16, v10 ; GFX9-NEXT: s_or_b32 s4, s4, s5 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v9 ; GFX9-NEXT: v_lshl_or_b32 v9, s4, 16, v8 -; GFX9-NEXT: s_and_b32 s4, s10, 0xff -; GFX9-NEXT: s_lshl_b32 s5, s9, 8 +; GFX9-NEXT: s_and_b32 s4, s40, 0xff +; GFX9-NEXT: s_lshl_b32 s5, s15, 8 ; GFX9-NEXT: s_or_b32 s4, s4, s5 -; GFX9-NEXT: s_and_b32 s5, s8, 0xff -; GFX9-NEXT: s_lshl_b32 s77, s6, 8 -; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_pack_ll_b32_b16 s4, s4, s5 -; GFX9-NEXT: s_and_b32 s5, s63, 0xff -; GFX9-NEXT: s_lshl_b32 s77, s61, 8 -; GFX9-NEXT: s_or_b32 s5, s5, s77 -; GFX9-NEXT: s_and_b32 s77, s57, 0xff -; GFX9-NEXT: s_lshl_b32 s78, s56, 8 -; GFX9-NEXT: s_or_b32 s77, s77, s78 -; GFX9-NEXT: s_pack_ll_b32_b16 s5, s5, s77 -; GFX9-NEXT: v_mov_b32_e32 v8, s4 -; GFX9-NEXT: v_mov_b32_e32 v10, s5 +; GFX9-NEXT: s_and_b32 s5, s12, 0xff +; GFX9-NEXT: s_lshl_b32 s78, s11, 8 +; GFX9-NEXT: s_or_b32 s5, s5, s78 +; GFX9-NEXT: s_pack_ll_b32_b16 s78, s4, s5 +; GFX9-NEXT: v_mov_b32_e32 v8, s77 +; GFX9-NEXT: v_mov_b32_e32 v10, s78 ; GFX9-NEXT: s_cbranch_execnz .LBB111_3 ; GFX9-NEXT: .LBB111_2: ; %cmp.true ; GFX9-NEXT: s_waitcnt vmcnt(12) ; GFX9-NEXT: v_add_u32_e32 v0, 3, v34 ; GFX9-NEXT: s_mov_b32 s4, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v8, v0, v32, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v27 -; GFX9-NEXT: v_perm_b32 v9, v0, v24, s4 +; GFX9-NEXT: v_add_u32_e32 v1, 3, v27 ; GFX9-NEXT: s_waitcnt vmcnt(8) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v33 -; GFX9-NEXT: v_perm_b32 v10, v0, v30, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v25 -; GFX9-NEXT: v_perm_b32 v11, v0, v22, s4 +; GFX9-NEXT: v_add_u32_e32 v2, 3, v33 +; GFX9-NEXT: v_add_u32_e32 v3, 3, v25 ; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v31 -; GFX9-NEXT: v_perm_b32 v12, v0, v28, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v23 -; GFX9-NEXT: v_perm_b32 v13, v0, v20, s4 +; GFX9-NEXT: v_add_u32_e32 v4, 3, v31 +; GFX9-NEXT: v_add_u32_e32 v5, 3, v23 ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_add_u32_e32 v0, 3, v29 -; GFX9-NEXT: v_perm_b32 v14, v0, v26, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v21 -; GFX9-NEXT: v_perm_b32 v15, v0, v19, s4 -; GFX9-NEXT: v_add_u32_e32 v0, 3, v17 -; GFX9-NEXT: v_mov_b32_e32 v19, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v16, v0, v16, s4 -; GFX9-NEXT: s_add_i32 s63, s63, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s61 -; GFX9-NEXT: v_perm_b32 v17, s63, v0, v19 -; GFX9-NEXT: s_add_i32 s57, s57, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s56 -; GFX9-NEXT: v_perm_b32 v20, s57, v0, v19 +; GFX9-NEXT: v_add_u32_e32 v6, 3, v29 +; GFX9-NEXT: v_add_u32_e32 v7, 3, v21 +; GFX9-NEXT: s_add_i32 s41, s41, 3 +; GFX9-NEXT: v_mov_b32_e32 v8, 0xc0c0004 +; GFX9-NEXT: v_add_u32_e32 v10, 3, v17 +; GFX9-NEXT: s_add_i32 s16, s16, 3 +; GFX9-NEXT: v_mov_b32_e32 v31, s17 +; GFX9-NEXT: v_perm_b32 v0, v0, v32, s4 +; GFX9-NEXT: v_perm_b32 v1, v1, v24, s4 +; GFX9-NEXT: v_perm_b32 v2, v2, v30, s4 +; GFX9-NEXT: v_perm_b32 v3, v3, v22, s4 +; GFX9-NEXT: v_perm_b32 v4, v4, v28, s4 +; GFX9-NEXT: v_perm_b32 v5, v5, v20, s4 +; GFX9-NEXT: v_perm_b32 v6, v6, v26, s4 +; GFX9-NEXT: v_perm_b32 v7, v7, v19, s4 +; GFX9-NEXT: v_perm_b32 v9, s41, v18, v8 +; GFX9-NEXT: v_perm_b32 v10, v10, v16, s4 +; GFX9-NEXT: s_add_i32 s40, s40, 3 +; GFX9-NEXT: v_mov_b32_e32 v11, s15 +; GFX9-NEXT: s_add_i32 s12, s12, 3 +; GFX9-NEXT: v_mov_b32_e32 v12, s11 +; GFX9-NEXT: s_add_i32 s14, s14, 3 +; GFX9-NEXT: v_mov_b32_e32 v13, s13 +; GFX9-NEXT: s_add_i32 s9, s9, 3 +; GFX9-NEXT: v_mov_b32_e32 v14, s8 +; GFX9-NEXT: s_add_i32 s56, s56, 3 +; GFX9-NEXT: v_mov_b32_e32 v15, s10 +; GFX9-NEXT: s_add_i32 s7, s7, 3 +; GFX9-NEXT: v_mov_b32_e32 v16, s6 +; GFX9-NEXT: s_add_i32 s47, s47, 3 +; GFX9-NEXT: v_mov_b32_e32 v17, s46 +; GFX9-NEXT: s_add_i32 s45, s45, 3 +; GFX9-NEXT: v_mov_b32_e32 v18, s43 +; GFX9-NEXT: s_add_i32 s76, s76, 3 +; GFX9-NEXT: v_mov_b32_e32 v19, s75 +; GFX9-NEXT: s_add_i32 s44, s44, 3 +; GFX9-NEXT: v_mov_b32_e32 v20, s42 +; GFX9-NEXT: s_add_i32 s74, s74, 3 +; GFX9-NEXT: v_mov_b32_e32 v21, s73 +; GFX9-NEXT: s_add_i32 s62, s62, 3 +; GFX9-NEXT: v_mov_b32_e32 v22, s61 +; GFX9-NEXT: s_add_i32 s72, s72, 3 +; GFX9-NEXT: v_mov_b32_e32 v23, s63 ; GFX9-NEXT: s_add_i32 s60, s60, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s58 -; GFX9-NEXT: v_perm_b32 v21, s60, v0, v19 +; GFX9-NEXT: v_mov_b32_e32 v24, s58 +; GFX9-NEXT: s_add_i32 s28, s28, 3 +; GFX9-NEXT: v_mov_b32_e32 v25, s29 +; GFX9-NEXT: s_add_i32 s59, s59, 3 +; GFX9-NEXT: v_mov_b32_e32 v26, s57 +; GFX9-NEXT: s_add_i32 s24, s24, 3 +; GFX9-NEXT: v_mov_b32_e32 v27, s25 +; GFX9-NEXT: s_add_i32 s26, s26, 3 +; GFX9-NEXT: v_mov_b32_e32 v28, s27 ; GFX9-NEXT: s_add_i32 s20, s20, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s21 -; GFX9-NEXT: v_perm_b32 v0, s20, v0, v19 -; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v0 +; GFX9-NEXT: v_mov_b32_e32 v29, s21 ; GFX9-NEXT: s_add_i32 s22, s22, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s23 -; GFX9-NEXT: v_perm_b32 v0, s22, v0, v19 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v0 -; GFX9-NEXT: s_add_i32 s16, s16, 3 -; GFX9-NEXT: v_mov_b32_e32 v0, s17 -; GFX9-NEXT: v_perm_b32 v0, s16, v0, v19 +; GFX9-NEXT: v_mov_b32_e32 v30, s23 +; GFX9-NEXT: v_perm_b32 v31, s16, v31, v8 ; GFX9-NEXT: s_add_i32 s18, s18, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s19 -; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v0 -; GFX9-NEXT: v_perm_b32 v3, s18, v3, v19 -; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NEXT: s_add_i32 s24, s24, 3 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_mov_b32_e32 v32, s19 +; GFX9-NEXT: v_perm_b32 v11, s40, v11, v8 +; GFX9-NEXT: v_perm_b32 v12, s12, v12, v8 +; GFX9-NEXT: v_perm_b32 v13, s14, v13, v8 +; GFX9-NEXT: v_perm_b32 v14, s9, v14, v8 +; GFX9-NEXT: v_perm_b32 v15, s56, v15, v8 +; GFX9-NEXT: v_perm_b32 v16, s7, v16, v8 +; GFX9-NEXT: v_perm_b32 v17, s47, v17, v8 +; GFX9-NEXT: v_perm_b32 v18, s45, v18, v8 +; GFX9-NEXT: v_perm_b32 v19, s76, v19, v8 +; GFX9-NEXT: v_perm_b32 v20, s44, v20, v8 +; GFX9-NEXT: v_perm_b32 v21, s74, v21, v8 +; GFX9-NEXT: v_perm_b32 v22, s62, v22, v8 +; GFX9-NEXT: v_perm_b32 v23, s72, v23, v8 +; GFX9-NEXT: v_perm_b32 v24, s60, v24, v8 +; GFX9-NEXT: v_perm_b32 v25, s28, v25, v8 +; GFX9-NEXT: v_perm_b32 v26, s59, v26, v8 +; GFX9-NEXT: v_perm_b32 v27, s24, v27, v8 +; GFX9-NEXT: v_perm_b32 v28, s26, v28, v8 +; GFX9-NEXT: v_perm_b32 v29, s20, v29, v8 +; GFX9-NEXT: v_perm_b32 v30, s22, v30, v8 +; GFX9-NEXT: v_perm_b32 v8, s18, v32, v8 +; GFX9-NEXT: v_add_u32_e32 v32, 0x300, v0 +; GFX9-NEXT: v_add_u32_e32 v0, 0x300, v31 +; GFX9-NEXT: v_add_u32_e32 v39, 0x300, v7 +; GFX9-NEXT: v_add_u32_e32 v48, 0x300, v9 +; GFX9-NEXT: v_add_u32_e32 v49, 0x300, v10 +; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v11 +; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v13 +; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v15 +; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v17 +; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v8 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1 -; GFX9-NEXT: v_mov_b32_e32 v2, s25 -; GFX9-NEXT: v_lshl_or_b32 v0, v3, 16, v0 -; GFX9-NEXT: v_perm_b32 v2, s24, v2, v19 -; GFX9-NEXT: s_add_i32 s26, s26, 3 -; GFX9-NEXT: v_mov_b32_e32 v3, s27 -; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v2 -; GFX9-NEXT: v_perm_b32 v3, s26, v3, v19 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 +; GFX9-NEXT: v_add_u32_e32 v33, 0x300, v1 +; GFX9-NEXT: v_add_u32_e32 v34, 0x300, v2 +; GFX9-NEXT: v_add_u32_e32 v35, 0x300, v3 +; GFX9-NEXT: v_add_u32_e32 v36, 0x300, v4 +; GFX9-NEXT: v_add_u32_e32 v37, 0x300, v5 +; GFX9-NEXT: v_add_u32_e32 v38, 0x300, v6 +; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v12 +; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v14 +; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v16 +; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v18 +; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v19 +; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v21 +; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v23 +; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v25 +; GFX9-NEXT: v_add_u32_e32 v2, 0x300, v27 +; GFX9-NEXT: v_add_u32_e32 v1, 0x300, v29 +; GFX9-NEXT: v_lshl_or_b32 v0, v8, 16, v0 +; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v13 +; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v20 +; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v22 +; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v24 +; GFX9-NEXT: v_add_u32_e32 v19, 0x300, v26 +; GFX9-NEXT: v_add_u32_e32 v20, 0x300, v28 +; GFX9-NEXT: v_add_u32_e32 v21, 0x300, v30 +; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; GFX9-NEXT: s_add_i32 s28, s28, 3 -; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2 -; GFX9-NEXT: v_mov_b32_e32 v3, s29 -; GFX9-NEXT: v_perm_b32 v3, s28, v3, v19 -; GFX9-NEXT: s_add_i32 s62, s62, 3 -; GFX9-NEXT: v_mov_b32_e32 v4, s59 -; GFX9-NEXT: v_add_u32_e32 v3, 0x300, v3 -; GFX9-NEXT: v_perm_b32 v4, s62, v4, v19 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; GFX9-NEXT: s_add_i32 s74, s74, 3 -; GFX9-NEXT: v_lshl_or_b32 v3, v4, 16, v3 -; GFX9-NEXT: v_mov_b32_e32 v4, s46 -; GFX9-NEXT: v_perm_b32 v4, s74, v4, v19 -; GFX9-NEXT: s_add_i32 s45, s45, 3 -; GFX9-NEXT: v_mov_b32_e32 v5, s44 -; GFX9-NEXT: v_add_u32_e32 v4, 0x300, v4 -; GFX9-NEXT: v_perm_b32 v5, s45, v5, v19 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 ; GFX9-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX9-NEXT: s_add_i32 s75, s75, 3 -; GFX9-NEXT: v_lshl_or_b32 v4, v5, 16, v4 -; GFX9-NEXT: v_mov_b32_e32 v5, s43 -; GFX9-NEXT: v_perm_b32 v5, s75, v5, v19 -; GFX9-NEXT: s_add_i32 s42, s42, 3 -; GFX9-NEXT: v_mov_b32_e32 v6, s41 -; GFX9-NEXT: v_add_u32_e32 v5, 0x300, v5 -; GFX9-NEXT: v_perm_b32 v6, s42, v6, v19 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 ; GFX9-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; GFX9-NEXT: s_add_i32 s76, s76, 3 -; GFX9-NEXT: v_lshl_or_b32 v5, v6, 16, v5 -; GFX9-NEXT: v_mov_b32_e32 v6, s40 -; GFX9-NEXT: v_perm_b32 v6, s76, v6, v19 -; GFX9-NEXT: s_add_i32 s15, s15, 3 -; GFX9-NEXT: v_mov_b32_e32 v7, s14 -; GFX9-NEXT: v_add_u32_e32 v6, 0x300, v6 -; GFX9-NEXT: v_perm_b32 v7, s15, v7, v19 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 ; GFX9-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX9-NEXT: s_add_i32 s73, s73, 3 -; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 -; GFX9-NEXT: v_mov_b32_e32 v7, s13 -; GFX9-NEXT: v_perm_b32 v7, s73, v7, v19 -; GFX9-NEXT: s_add_i32 s12, s12, 3 -; GFX9-NEXT: v_mov_b32_e32 v22, s11 -; GFX9-NEXT: s_add_i32 s72, s72, 3 -; GFX9-NEXT: v_add_u32_e32 v7, 0x300, v7 -; GFX9-NEXT: v_perm_b32 v22, s12, v22, v19 -; GFX9-NEXT: v_perm_b32 v18, s72, v18, v19 -; GFX9-NEXT: v_add_u32_e32 v22, 0x300, v22 -; GFX9-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; GFX9-NEXT: s_add_i32 s10, s10, 3 -; GFX9-NEXT: v_mov_b32_e32 v23, s9 -; GFX9-NEXT: v_add_u32_e32 v28, 0x300, v12 -; GFX9-NEXT: v_add_u32_e32 v12, 0x300, v14 -; GFX9-NEXT: s_add_i32 s47, s47, 3 -; GFX9-NEXT: v_lshl_or_b32 v7, v22, 16, v7 -; GFX9-NEXT: v_mov_b32_e32 v22, s7 -; GFX9-NEXT: v_perm_b32 v23, s10, v23, v19 -; GFX9-NEXT: s_add_i32 s8, s8, 3 -; GFX9-NEXT: v_mov_b32_e32 v24, s6 -; GFX9-NEXT: v_add_u32_e32 v27, 0x300, v11 -; GFX9-NEXT: v_add_u32_e32 v14, 0x300, v15 -; GFX9-NEXT: v_add_u32_e32 v11, 0x300, v18 -; GFX9-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; GFX9-NEXT: v_perm_b32 v22, s47, v22, v19 -; GFX9-NEXT: v_perm_b32 v19, s8, v24, v19 -; GFX9-NEXT: v_add_u32_e32 v24, 0x300, v8 -; GFX9-NEXT: v_add_u32_e32 v25, 0x300, v9 -; GFX9-NEXT: v_add_u32_e32 v26, 0x300, v10 -; GFX9-NEXT: v_add_u32_e32 v13, 0x300, v13 -; GFX9-NEXT: v_add_u32_e32 v15, 0x300, v16 -; GFX9-NEXT: v_add_u32_e32 v10, 0x300, v17 -; GFX9-NEXT: v_add_u32_e32 v9, 0x300, v21 -; GFX9-NEXT: v_add_u32_e32 v8, 0x300, v23 -; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; GFX9-NEXT: v_lshl_or_b32 v12, v14, 16, v12 -; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v28 -; GFX9-NEXT: v_add_u32_e32 v16, 0x300, v20 -; GFX9-NEXT: v_add_u32_e32 v17, 0x300, v22 -; GFX9-NEXT: v_add_u32_e32 v18, 0x300, v19 -; GFX9-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GFX9-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; GFX9-NEXT: v_lshl_or_b32 v11, v15, 16, v11 -; GFX9-NEXT: v_lshl_or_b32 v13, v13, 16, v14 -; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v26 -; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v24 -; GFX9-NEXT: v_lshl_or_b32 v8, v18, 16, v8 -; GFX9-NEXT: v_lshl_or_b32 v9, v17, 16, v9 -; GFX9-NEXT: v_lshl_or_b32 v10, v16, 16, v10 -; GFX9-NEXT: v_lshl_or_b32 v14, v27, 16, v14 -; GFX9-NEXT: v_lshl_or_b32 v15, v25, 16, v15 +; GFX9-NEXT: v_lshl_or_b32 v7, v15, 16, v7 +; GFX9-NEXT: v_lshl_or_b32 v8, v14, 16, v8 +; GFX9-NEXT: v_lshl_or_b32 v9, v12, 16, v9 +; GFX9-NEXT: v_lshl_or_b32 v10, v11, 16, v10 +; GFX9-NEXT: v_and_b32_e32 v11, 0xffff, v48 +; GFX9-NEXT: v_and_b32_e32 v12, 0xffff, v38 +; GFX9-NEXT: v_and_b32_e32 v13, 0xffff, v36 +; GFX9-NEXT: v_and_b32_e32 v14, 0xffff, v34 +; GFX9-NEXT: v_and_b32_e32 v15, 0xffff, v32 +; GFX9-NEXT: v_lshl_or_b32 v1, v21, 16, v1 +; GFX9-NEXT: v_lshl_or_b32 v2, v20, 16, v2 +; GFX9-NEXT: v_lshl_or_b32 v3, v19, 16, v3 +; GFX9-NEXT: v_lshl_or_b32 v4, v18, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v5, v17, 16, v5 +; GFX9-NEXT: v_lshl_or_b32 v6, v16, 16, v6 +; GFX9-NEXT: v_lshl_or_b32 v11, v49, 16, v11 +; GFX9-NEXT: v_lshl_or_b32 v12, v39, 16, v12 +; GFX9-NEXT: v_lshl_or_b32 v13, v37, 16, v13 +; GFX9-NEXT: v_lshl_or_b32 v14, v35, 16, v14 +; GFX9-NEXT: v_lshl_or_b32 v15, v33, 16, v15 ; GFX9-NEXT: .LBB111_3: ; %end ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_setpc_b64 s[30:31] diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll index 9a74ac7e2b943..443c7b2dd290d 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll @@ -3169,9 +3169,9 @@ define inreg <36 x i16> @bitcast_v18i32_to_v36i16_scalar(<18 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b32 s75, s19, 16 ; SI-NEXT: s_lshr_b32 s76, s17, 16 ; SI-NEXT: .LBB13_3: ; %end -; SI-NEXT: s_lshl_b32 s9, s56, 16 -; SI-NEXT: s_and_b32 s11, s16, 0xffff -; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: s_and_b32 s9, s16, 0xffff +; SI-NEXT: s_lshl_b32 s11, s56, 16 +; SI-NEXT: s_or_b32 s9, s9, s11 ; SI-NEXT: s_and_b32 s11, s17, 0xffff ; SI-NEXT: s_lshl_b32 s13, s76, 16 ; SI-NEXT: s_or_b32 s11, s11, s13 @@ -4477,17 +4477,17 @@ define inreg <18 x i32> @bitcast_v36i16_to_v18i32_scalar(<36 x i16> inreg %a, i3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s91, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s90, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s89, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s88, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s90, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s78, 16 @@ -5737,9 +5737,9 @@ define inreg <36 x half> @bitcast_v18i32_to_v36f16_scalar(<18 x i32> inreg %a, i ; SI-NEXT: s_lshr_b32 s75, s19, 16 ; SI-NEXT: s_lshr_b32 s76, s17, 16 ; SI-NEXT: .LBB17_3: ; %end -; SI-NEXT: s_lshl_b32 s9, s56, 16 -; SI-NEXT: s_and_b32 s11, s16, 0xffff -; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: s_and_b32 s9, s16, 0xffff +; SI-NEXT: s_lshl_b32 s11, s56, 16 +; SI-NEXT: s_or_b32 s9, s9, s11 ; SI-NEXT: s_and_b32 s11, s17, 0xffff ; SI-NEXT: s_lshl_b32 s13, s76, 16 ; SI-NEXT: s_or_b32 s11, s11, s13 @@ -6327,10 +6327,10 @@ define <18 x i32> @bitcast_v36f16_to_v18i32(<36 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v41 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v45 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v40 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v44 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v40 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v44 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v55 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v43 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -6429,118 +6429,118 @@ define <18 x i32> @bitcast_v36f16_to_v18i32(<36 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v44 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v40 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v2, v44 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v3, v40 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v43 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v55 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v54 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v53 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v43 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v42 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v54 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v42 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v63 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v53 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v52 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v63 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v51 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v59 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 ; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v60 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v50 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v59 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v49 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v48 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v58 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_or_b32_e32 v8, v10, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v57 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v56 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v56 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v37 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v12, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v37 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_or_b32_e32 v11, v13, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v46 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v36 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -7094,8 +7094,8 @@ define inreg <18 x i32> @bitcast_v36f16_to_v18i32_scalar(<36 x half> inreg %a, i ; SI-NEXT: v_readfirstlane_b32 s8, v2 ; SI-NEXT: v_readfirstlane_b32 s10, v1 ; SI-NEXT: v_readfirstlane_b32 s13, v0 -; SI-NEXT: s_lshr_b32 s11, s29, 16 -; SI-NEXT: s_lshr_b32 s14, s28, 16 +; SI-NEXT: s_lshr_b32 s12, s29, 16 +; SI-NEXT: s_lshr_b32 s15, s28, 16 ; SI-NEXT: s_lshr_b32 s72, s27, 16 ; SI-NEXT: s_lshr_b32 s73, s26, 16 ; SI-NEXT: s_lshr_b32 s74, s25, 16 @@ -7110,8 +7110,8 @@ define inreg <18 x i32> @bitcast_v36f16_to_v18i32_scalar(<36 x half> inreg %a, i ; SI-NEXT: s_lshr_b32 s91, s16, 16 ; SI-NEXT: s_lshr_b32 s7, s6, 16 ; SI-NEXT: s_lshr_b32 s9, s8, 16 -; SI-NEXT: s_lshr_b32 s12, s10, 16 -; SI-NEXT: s_lshr_b32 s15, s13, 16 +; SI-NEXT: s_lshr_b32 s11, s10, 16 +; SI-NEXT: s_lshr_b32 s14, s13, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v4 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB19_3 @@ -7119,17 +7119,17 @@ define inreg <18 x i32> @bitcast_v36f16_to_v18i32_scalar(<36 x half> inreg %a, i ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s91, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s90, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s89, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s88, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s90, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s78, 16 @@ -7153,16 +7153,16 @@ define inreg <18 x i32> @bitcast_v36f16_to_v18i32_scalar(<36 x half> inreg %a, i ; SI-NEXT: s_lshl_b32 s5, s72, 16 ; SI-NEXT: s_or_b32 s47, s4, s5 ; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s5, s14, 16 +; SI-NEXT: s_lshl_b32 s5, s15, 16 ; SI-NEXT: s_or_b32 s48, s4, s5 ; SI-NEXT: s_and_b32 s4, s29, 0xffff -; SI-NEXT: s_lshl_b32 s5, s11, 16 +; SI-NEXT: s_lshl_b32 s5, s12, 16 ; SI-NEXT: s_or_b32 s49, s4, s5 ; SI-NEXT: s_and_b32 s4, s13, 0xffff -; SI-NEXT: s_lshl_b32 s5, s15, 16 +; SI-NEXT: s_lshl_b32 s5, s14, 16 ; SI-NEXT: s_or_b32 s50, s4, s5 ; SI-NEXT: s_and_b32 s4, s10, 0xffff -; SI-NEXT: s_lshl_b32 s5, s12, 16 +; SI-NEXT: s_lshl_b32 s5, s11, 16 ; SI-NEXT: s_or_b32 s51, s4, s5 ; SI-NEXT: s_and_b32 s4, s8, 0xffff ; SI-NEXT: s_lshl_b32 s5, s9, 16 @@ -7173,149 +7173,149 @@ define inreg <18 x i32> @bitcast_v36f16_to_v18i32_scalar(<36 x half> inreg %a, i ; SI-NEXT: s_cbranch_execnz .LBB19_4 ; SI-NEXT: .LBB19_2: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, s91 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s90 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s16 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s90 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s17 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s89 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s19 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s89 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s19 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s18 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s88 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s88 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s21 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s22 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s79 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s23 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s79 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s78 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s24 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s78 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, s25 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s26 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v6, s77 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s27 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s22 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s28 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, s76 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s29 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s23 +; SI-NEXT: v_cvt_f32_f16_e32 v9, s75 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s75 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, s10 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s8 -; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s24 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v9, s74 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_cvt_f32_f16_e32 v18, s6 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s25 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v10, s73 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s26 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s72 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s72 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s14 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s27 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s15 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s28 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s12 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s11 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s29 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s14 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s15 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s12 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s13 +; SI-NEXT: v_or_b32_e32 v13, v14, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s11 +; SI-NEXT: v_cvt_f32_f16_e32 v17, s10 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 +; SI-NEXT: v_or_b32_e32 v14, v16, v14 ; SI-NEXT: v_cvt_f32_f16_e32 v16, s9 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v17, s8 +; SI-NEXT: v_cvt_f32_f16_e32 v18, s7 +; SI-NEXT: v_cvt_f32_f16_e32 v19, s6 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s7 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; SI-NEXT: v_or_b32_e32 v17, v18, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v16, v17, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18 +; SI-NEXT: v_or_b32_e32 v17, v19, v17 ; SI-NEXT: s_branch .LBB19_5 ; SI-NEXT: .LBB19_3: ; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67 @@ -7482,13 +7482,13 @@ define inreg <18 x i32> @bitcast_v36f16_to_v18i32_scalar(<36 x half> inreg %a, i ; VI-NEXT: .LBB19_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v17, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s91 -; VI-NEXT: v_mov_b32_e32 v2, s90 ; VI-NEXT: v_add_f16_sdwa v0, v0, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v17 -; VI-NEXT: v_add_f16_sdwa v2, v2, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v17 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s90 +; VI-NEXT: v_add_f16_sdwa v1, v1, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v17 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s89 ; VI-NEXT: v_add_f16_sdwa v2, v2, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v17 @@ -10471,15 +10471,15 @@ define inreg <36 x i16> @bitcast_v18f32_to_v36i16_scalar(<18 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[25:26], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[26:27], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v1 ; SI-NEXT: s_branch .LBB29_5 ; SI-NEXT: .LBB29_3: ; SI-NEXT: ; implicit-def: $sgpr56 @@ -10520,15 +10520,15 @@ define inreg <36 x i16> @bitcast_v18f32_to_v36i16_scalar(<18 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v15, s7 ; SI-NEXT: v_mov_b32_e32 v16, s4 ; SI-NEXT: v_mov_b32_e32 v17, s5 -; SI-NEXT: v_mov_b32_e32 v36, s60 -; SI-NEXT: v_mov_b32_e32 v35, s61 -; SI-NEXT: v_mov_b32_e32 v34, s62 -; SI-NEXT: v_mov_b32_e32 v33, s63 -; SI-NEXT: v_mov_b32_e32 v32, s72 -; SI-NEXT: v_mov_b32_e32 v31, s73 -; SI-NEXT: v_mov_b32_e32 v30, s74 -; SI-NEXT: v_mov_b32_e32 v29, s75 -; SI-NEXT: v_mov_b32_e32 v28, s76 +; SI-NEXT: v_mov_b32_e32 v35, s60 +; SI-NEXT: v_mov_b32_e32 v34, s61 +; SI-NEXT: v_mov_b32_e32 v33, s62 +; SI-NEXT: v_mov_b32_e32 v32, s63 +; SI-NEXT: v_mov_b32_e32 v31, s72 +; SI-NEXT: v_mov_b32_e32 v30, s73 +; SI-NEXT: v_mov_b32_e32 v29, s74 +; SI-NEXT: v_mov_b32_e32 v28, s75 +; SI-NEXT: v_mov_b32_e32 v27, s76 ; SI-NEXT: v_mov_b32_e32 v18, s8 ; SI-NEXT: v_mov_b32_e32 v19, s10 ; SI-NEXT: v_mov_b32_e32 v20, s12 @@ -10539,51 +10539,51 @@ define inreg <36 x i16> @bitcast_v18f32_to_v36i16_scalar(<18 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v25, s46 ; SI-NEXT: v_mov_b32_e32 v26, s56 ; SI-NEXT: .LBB29_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v0, v0, v26 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v35 ; SI-NEXT: v_or_b32_e32 v2, v2, v25 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v34 ; SI-NEXT: v_or_b32_e32 v4, v4, v24 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v33 ; SI-NEXT: v_or_b32_e32 v6, v6, v23 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v32 ; SI-NEXT: v_or_b32_e32 v8, v8, v22 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_or_b32_e32 v10, v10, v21 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v30 ; SI-NEXT: v_or_b32_e32 v12, v12, v20 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v29 ; SI-NEXT: v_or_b32_e32 v14, v14, v19 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v28 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v27 ; SI-NEXT: v_or_b32_e32 v1, v1, v26 ; SI-NEXT: v_or_b32_e32 v3, v3, v25 ; SI-NEXT: v_or_b32_e32 v5, v5, v24 @@ -12004,17 +12004,17 @@ define inreg <18 x float> @bitcast_v36i16_to_v18f32_scalar(<36 x i16> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s91, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s90, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s89, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s88, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s90, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s78, 16 @@ -13236,15 +13236,15 @@ define inreg <36 x half> @bitcast_v18f32_to_v36f16_scalar(<18 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[25:26], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[26:27], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v1 ; SI-NEXT: s_branch .LBB33_5 ; SI-NEXT: .LBB33_3: ; SI-NEXT: ; implicit-def: $sgpr56 @@ -13285,15 +13285,15 @@ define inreg <36 x half> @bitcast_v18f32_to_v36f16_scalar(<18 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v15, s7 ; SI-NEXT: v_mov_b32_e32 v16, s4 ; SI-NEXT: v_mov_b32_e32 v17, s5 -; SI-NEXT: v_mov_b32_e32 v36, s60 -; SI-NEXT: v_mov_b32_e32 v35, s61 -; SI-NEXT: v_mov_b32_e32 v34, s62 -; SI-NEXT: v_mov_b32_e32 v33, s63 -; SI-NEXT: v_mov_b32_e32 v32, s72 -; SI-NEXT: v_mov_b32_e32 v31, s73 -; SI-NEXT: v_mov_b32_e32 v30, s74 -; SI-NEXT: v_mov_b32_e32 v29, s75 -; SI-NEXT: v_mov_b32_e32 v28, s76 +; SI-NEXT: v_mov_b32_e32 v35, s60 +; SI-NEXT: v_mov_b32_e32 v34, s61 +; SI-NEXT: v_mov_b32_e32 v33, s62 +; SI-NEXT: v_mov_b32_e32 v32, s63 +; SI-NEXT: v_mov_b32_e32 v31, s72 +; SI-NEXT: v_mov_b32_e32 v30, s73 +; SI-NEXT: v_mov_b32_e32 v29, s74 +; SI-NEXT: v_mov_b32_e32 v28, s75 +; SI-NEXT: v_mov_b32_e32 v27, s76 ; SI-NEXT: v_mov_b32_e32 v18, s8 ; SI-NEXT: v_mov_b32_e32 v19, s10 ; SI-NEXT: v_mov_b32_e32 v20, s12 @@ -13304,51 +13304,51 @@ define inreg <36 x half> @bitcast_v18f32_to_v36f16_scalar(<18 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v25, s46 ; SI-NEXT: v_mov_b32_e32 v26, s56 ; SI-NEXT: .LBB33_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v0, v0, v26 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v35 ; SI-NEXT: v_or_b32_e32 v2, v2, v25 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v34 ; SI-NEXT: v_or_b32_e32 v4, v4, v24 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v33 ; SI-NEXT: v_or_b32_e32 v6, v6, v23 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v32 ; SI-NEXT: v_or_b32_e32 v8, v8, v22 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_or_b32_e32 v10, v10, v21 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v30 ; SI-NEXT: v_or_b32_e32 v12, v12, v20 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v29 ; SI-NEXT: v_or_b32_e32 v14, v14, v19 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v28 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v27 ; SI-NEXT: v_or_b32_e32 v1, v1, v26 ; SI-NEXT: v_or_b32_e32 v3, v3, v25 ; SI-NEXT: v_or_b32_e32 v5, v5, v24 @@ -14051,10 +14051,10 @@ define <18 x float> @bitcast_v36f16_to_v18f32(<36 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v41 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v45 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v40 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v44 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v40 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v44 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v55 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v43 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -14153,118 +14153,118 @@ define <18 x float> @bitcast_v36f16_to_v18f32(<36 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v44 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v40 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v2, v44 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v3, v40 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v43 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v55 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v54 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v53 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v43 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v42 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v54 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v42 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v63 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v53 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v52 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v63 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v51 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v59 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 ; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v60 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v50 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v59 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v49 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v48 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v58 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_or_b32_e32 v8, v10, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v57 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v56 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v56 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v37 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v12, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v37 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_or_b32_e32 v11, v13, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v46 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v36 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -14818,8 +14818,8 @@ define inreg <18 x float> @bitcast_v36f16_to_v18f32_scalar(<36 x half> inreg %a, ; SI-NEXT: v_readfirstlane_b32 s8, v2 ; SI-NEXT: v_readfirstlane_b32 s10, v1 ; SI-NEXT: v_readfirstlane_b32 s13, v0 -; SI-NEXT: s_lshr_b32 s11, s29, 16 -; SI-NEXT: s_lshr_b32 s14, s28, 16 +; SI-NEXT: s_lshr_b32 s12, s29, 16 +; SI-NEXT: s_lshr_b32 s15, s28, 16 ; SI-NEXT: s_lshr_b32 s72, s27, 16 ; SI-NEXT: s_lshr_b32 s73, s26, 16 ; SI-NEXT: s_lshr_b32 s74, s25, 16 @@ -14834,8 +14834,8 @@ define inreg <18 x float> @bitcast_v36f16_to_v18f32_scalar(<36 x half> inreg %a, ; SI-NEXT: s_lshr_b32 s91, s16, 16 ; SI-NEXT: s_lshr_b32 s7, s6, 16 ; SI-NEXT: s_lshr_b32 s9, s8, 16 -; SI-NEXT: s_lshr_b32 s12, s10, 16 -; SI-NEXT: s_lshr_b32 s15, s13, 16 +; SI-NEXT: s_lshr_b32 s11, s10, 16 +; SI-NEXT: s_lshr_b32 s14, s13, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v4 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB35_3 @@ -14843,17 +14843,17 @@ define inreg <18 x float> @bitcast_v36f16_to_v18f32_scalar(<36 x half> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s91, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s90, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s89, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s88, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s90, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s78, 16 @@ -14877,16 +14877,16 @@ define inreg <18 x float> @bitcast_v36f16_to_v18f32_scalar(<36 x half> inreg %a, ; SI-NEXT: s_lshl_b32 s5, s72, 16 ; SI-NEXT: s_or_b32 s47, s4, s5 ; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s5, s14, 16 +; SI-NEXT: s_lshl_b32 s5, s15, 16 ; SI-NEXT: s_or_b32 s48, s4, s5 ; SI-NEXT: s_and_b32 s4, s29, 0xffff -; SI-NEXT: s_lshl_b32 s5, s11, 16 +; SI-NEXT: s_lshl_b32 s5, s12, 16 ; SI-NEXT: s_or_b32 s49, s4, s5 ; SI-NEXT: s_and_b32 s4, s13, 0xffff -; SI-NEXT: s_lshl_b32 s5, s15, 16 +; SI-NEXT: s_lshl_b32 s5, s14, 16 ; SI-NEXT: s_or_b32 s50, s4, s5 ; SI-NEXT: s_and_b32 s4, s10, 0xffff -; SI-NEXT: s_lshl_b32 s5, s12, 16 +; SI-NEXT: s_lshl_b32 s5, s11, 16 ; SI-NEXT: s_or_b32 s51, s4, s5 ; SI-NEXT: s_and_b32 s4, s8, 0xffff ; SI-NEXT: s_lshl_b32 s5, s9, 16 @@ -14897,149 +14897,149 @@ define inreg <18 x float> @bitcast_v36f16_to_v18f32_scalar(<36 x half> inreg %a, ; SI-NEXT: s_cbranch_execnz .LBB35_4 ; SI-NEXT: .LBB35_2: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, s91 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s90 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s16 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s90 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s17 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s89 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s19 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s89 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s19 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s18 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s88 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s88 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s21 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s22 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s79 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s78 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s79 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s77 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s22 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s76 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, s23 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s24 +; SI-NEXT: v_cvt_f32_f16_e32 v9, s75 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s78 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s24 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, s74 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s25 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, s25 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s73 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, s26 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s72 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s77 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s27 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s28 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s76 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s27 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s15 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s28 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s29 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s13 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s75 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s12 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s29 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s14 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, s10 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s8 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s13 +; SI-NEXT: v_or_b32_e32 v13, v14, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s11 +; SI-NEXT: v_cvt_f32_f16_e32 v17, s10 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s74 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_cvt_f32_f16_e32 v18, s6 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, s73 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s72 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s14 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s11 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s15 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s12 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_or_b32_e32 v14, v16, v14 ; SI-NEXT: v_cvt_f32_f16_e32 v16, s9 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v17, s8 +; SI-NEXT: v_cvt_f32_f16_e32 v18, s7 +; SI-NEXT: v_cvt_f32_f16_e32 v19, s6 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s7 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; SI-NEXT: v_or_b32_e32 v17, v18, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v16, v17, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18 +; SI-NEXT: v_or_b32_e32 v17, v19, v17 ; SI-NEXT: s_branch .LBB35_5 ; SI-NEXT: .LBB35_3: ; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67 @@ -15206,13 +15206,13 @@ define inreg <18 x float> @bitcast_v36f16_to_v18f32_scalar(<36 x half> inreg %a, ; VI-NEXT: .LBB35_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v17, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s91 -; VI-NEXT: v_mov_b32_e32 v2, s90 ; VI-NEXT: v_add_f16_sdwa v0, v0, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v17 -; VI-NEXT: v_add_f16_sdwa v2, v2, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v17 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s90 +; VI-NEXT: v_add_f16_sdwa v1, v1, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v17 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s89 ; VI-NEXT: v_add_f16_sdwa v2, v2, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v17 @@ -17070,9 +17070,9 @@ define inreg <36 x i16> @bitcast_v9i64_to_v36i16_scalar(<9 x i64> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[46:47], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[16:17], 16 ; SI-NEXT: .LBB41_3: ; %end -; SI-NEXT: s_lshl_b32 s9, s56, 16 -; SI-NEXT: s_and_b32 s11, s16, 0xffff -; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: s_and_b32 s9, s16, 0xffff +; SI-NEXT: s_lshl_b32 s11, s56, 16 +; SI-NEXT: s_or_b32 s9, s9, s11 ; SI-NEXT: s_and_b32 s11, s17, 0xffff ; SI-NEXT: s_lshl_b32 s13, s76, 16 ; SI-NEXT: s_or_b32 s11, s11, s13 @@ -18378,17 +18378,17 @@ define inreg <9 x i64> @bitcast_v36i16_to_v9i64_scalar(<36 x i16> inreg %a, i32 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s91, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s90, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s89, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s88, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s90, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s78, 16 @@ -19648,9 +19648,9 @@ define inreg <36 x half> @bitcast_v9i64_to_v36f16_scalar(<9 x i64> inreg %a, i32 ; SI-NEXT: s_lshr_b64 s[46:47], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[16:17], 16 ; SI-NEXT: .LBB45_3: ; %end -; SI-NEXT: s_lshl_b32 s9, s56, 16 -; SI-NEXT: s_and_b32 s11, s16, 0xffff -; SI-NEXT: s_or_b32 s9, s11, s9 +; SI-NEXT: s_and_b32 s9, s16, 0xffff +; SI-NEXT: s_lshl_b32 s11, s56, 16 +; SI-NEXT: s_or_b32 s9, s9, s11 ; SI-NEXT: s_and_b32 s11, s17, 0xffff ; SI-NEXT: s_lshl_b32 s13, s76, 16 ; SI-NEXT: s_or_b32 s11, s11, s13 @@ -20238,10 +20238,10 @@ define <9 x i64> @bitcast_v36f16_to_v9i64(<36 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v41 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v45 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v40 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v44 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v40 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v44 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v55 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v43 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -20340,118 +20340,118 @@ define <9 x i64> @bitcast_v36f16_to_v9i64(<36 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v44 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v40 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v2, v44 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v3, v40 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v43 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v55 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v54 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v53 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v43 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v42 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v54 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v42 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v63 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v53 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v52 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v63 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v51 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v59 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 ; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v60 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v50 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v59 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v49 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v48 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v58 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_or_b32_e32 v8, v10, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v57 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v56 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v56 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v37 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v12, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v37 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_or_b32_e32 v11, v13, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v46 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v36 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -21005,8 +21005,8 @@ define inreg <9 x i64> @bitcast_v36f16_to_v9i64_scalar(<36 x half> inreg %a, i32 ; SI-NEXT: v_readfirstlane_b32 s8, v2 ; SI-NEXT: v_readfirstlane_b32 s10, v1 ; SI-NEXT: v_readfirstlane_b32 s13, v0 -; SI-NEXT: s_lshr_b32 s11, s29, 16 -; SI-NEXT: s_lshr_b32 s14, s28, 16 +; SI-NEXT: s_lshr_b32 s12, s29, 16 +; SI-NEXT: s_lshr_b32 s15, s28, 16 ; SI-NEXT: s_lshr_b32 s72, s27, 16 ; SI-NEXT: s_lshr_b32 s73, s26, 16 ; SI-NEXT: s_lshr_b32 s74, s25, 16 @@ -21021,8 +21021,8 @@ define inreg <9 x i64> @bitcast_v36f16_to_v9i64_scalar(<36 x half> inreg %a, i32 ; SI-NEXT: s_lshr_b32 s91, s16, 16 ; SI-NEXT: s_lshr_b32 s7, s6, 16 ; SI-NEXT: s_lshr_b32 s9, s8, 16 -; SI-NEXT: s_lshr_b32 s12, s10, 16 -; SI-NEXT: s_lshr_b32 s15, s13, 16 +; SI-NEXT: s_lshr_b32 s11, s10, 16 +; SI-NEXT: s_lshr_b32 s14, s13, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v4 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB47_3 @@ -21030,17 +21030,17 @@ define inreg <9 x i64> @bitcast_v36f16_to_v9i64_scalar(<36 x half> inreg %a, i32 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s91, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s90, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s89, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s88, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s90, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s78, 16 @@ -21064,16 +21064,16 @@ define inreg <9 x i64> @bitcast_v36f16_to_v9i64_scalar(<36 x half> inreg %a, i32 ; SI-NEXT: s_lshl_b32 s5, s72, 16 ; SI-NEXT: s_or_b32 s47, s4, s5 ; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s5, s14, 16 +; SI-NEXT: s_lshl_b32 s5, s15, 16 ; SI-NEXT: s_or_b32 s48, s4, s5 ; SI-NEXT: s_and_b32 s4, s29, 0xffff -; SI-NEXT: s_lshl_b32 s5, s11, 16 +; SI-NEXT: s_lshl_b32 s5, s12, 16 ; SI-NEXT: s_or_b32 s49, s4, s5 ; SI-NEXT: s_and_b32 s4, s13, 0xffff -; SI-NEXT: s_lshl_b32 s5, s15, 16 +; SI-NEXT: s_lshl_b32 s5, s14, 16 ; SI-NEXT: s_or_b32 s50, s4, s5 ; SI-NEXT: s_and_b32 s4, s10, 0xffff -; SI-NEXT: s_lshl_b32 s5, s12, 16 +; SI-NEXT: s_lshl_b32 s5, s11, 16 ; SI-NEXT: s_or_b32 s51, s4, s5 ; SI-NEXT: s_and_b32 s4, s8, 0xffff ; SI-NEXT: s_lshl_b32 s5, s9, 16 @@ -21084,150 +21084,150 @@ define inreg <9 x i64> @bitcast_v36f16_to_v9i64_scalar(<36 x half> inreg %a, i32 ; SI-NEXT: s_cbranch_execnz .LBB47_4 ; SI-NEXT: .LBB47_2: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, s91 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s90 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s16 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s90 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s17 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s89 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s19 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s89 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s19 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s18 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s88 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s88 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s21 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s22 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s79 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s23 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s79 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s78 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s24 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s78 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, s25 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s26 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v6, s77 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s27 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s22 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s28 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, s76 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s29 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s23 +; SI-NEXT: v_cvt_f32_f16_e32 v9, s75 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s75 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, s10 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s8 -; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s24 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v9, s74 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_cvt_f32_f16_e32 v18, s6 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s25 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v10, s73 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s26 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s72 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s72 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s14 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s27 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s15 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s28 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s12 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s11 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s29 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s14 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s15 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s12 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, s9 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s13 +; SI-NEXT: v_or_b32_e32 v13, v14, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s11 +; SI-NEXT: v_cvt_f32_f16_e32 v17, s10 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s7 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; SI-NEXT: v_or_b32_e32 v17, v18, v17 -; SI-NEXT: s_branch .LBB47_5 +; SI-NEXT: v_or_b32_e32 v14, v16, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s9 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v17, s8 +; SI-NEXT: v_cvt_f32_f16_e32 v18, s7 +; SI-NEXT: v_cvt_f32_f16_e32 v19, s6 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v16, v17, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18 +; SI-NEXT: v_or_b32_e32 v17, v19, v17 +; SI-NEXT: s_branch .LBB47_5 ; SI-NEXT: .LBB47_3: ; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67 ; SI-NEXT: s_branch .LBB47_2 @@ -21393,13 +21393,13 @@ define inreg <9 x i64> @bitcast_v36f16_to_v9i64_scalar(<36 x half> inreg %a, i32 ; VI-NEXT: .LBB47_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v17, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s91 -; VI-NEXT: v_mov_b32_e32 v2, s90 ; VI-NEXT: v_add_f16_sdwa v0, v0, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v17 -; VI-NEXT: v_add_f16_sdwa v2, v2, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v17 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s90 +; VI-NEXT: v_add_f16_sdwa v1, v1, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v17 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s89 ; VI-NEXT: v_add_f16_sdwa v2, v2, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v17 @@ -21766,22 +21766,22 @@ define <36 x i16> @bitcast_v9f64_to_v36i16(<9 x double> %a, i32 %b) #0 { ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 -; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr29 +; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr26 +; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr22 -; SI-NEXT: ; implicit-def: $vgpr30 +; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr20 -; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; implicit-def: $vgpr19 -; SI-NEXT: ; implicit-def: $vgpr25 +; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc @@ -21794,14 +21794,14 @@ define <36 x i16> @bitcast_v9f64_to_v36i16(<9 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v21, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v22, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v23, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v26, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v29, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v31, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v25, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v27, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v30, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v3 @@ -21825,68 +21825,68 @@ define <36 x i16> @bitcast_v9f64_to_v36i16(<9 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v21, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v22, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v23, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v26, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v29, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v31, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v25, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v27, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v30, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v1 ; SI-NEXT: .LBB48_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; SI-NEXT: v_or_b32_e32 v0, v0, v31 +; SI-NEXT: v_or_b32_e32 v0, v0, v30 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v35 -; SI-NEXT: v_or_b32_e32 v2, v2, v29 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v35 +; SI-NEXT: v_or_b32_e32 v2, v2, v27 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v34 -; SI-NEXT: v_or_b32_e32 v4, v4, v26 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v34 +; SI-NEXT: v_or_b32_e32 v4, v4, v25 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v33 ; SI-NEXT: v_or_b32_e32 v6, v6, v23 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v32 ; SI-NEXT: v_or_b32_e32 v8, v8, v22 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_or_b32_e32 v10, v10, v21 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v29 ; SI-NEXT: v_or_b32_e32 v12, v12, v20 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 ; SI-NEXT: v_or_b32_e32 v14, v14, v19 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v26 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v24 -; SI-NEXT: v_or_b32_e32 v1, v1, v31 -; SI-NEXT: v_or_b32_e32 v3, v3, v29 -; SI-NEXT: v_or_b32_e32 v5, v5, v26 +; SI-NEXT: v_or_b32_e32 v1, v1, v30 +; SI-NEXT: v_or_b32_e32 v3, v3, v27 +; SI-NEXT: v_or_b32_e32 v5, v5, v25 ; SI-NEXT: v_or_b32_e32 v7, v7, v23 ; SI-NEXT: v_or_b32_e32 v9, v9, v22 ; SI-NEXT: v_or_b32_e32 v11, v11, v21 @@ -22292,8 +22292,8 @@ define inreg <36 x i16> @bitcast_v9f64_to_v36i16_scalar(<9 x double> inreg %a, i ; SI-NEXT: v_lshr_b64 v[22:23], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[23:24], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[24:25], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[25:26], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[26:27], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v17 @@ -22304,7 +22304,7 @@ define inreg <36 x i16> @bitcast_v9f64_to_v36i16_scalar(<9 x double> inreg %a, i ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v1 ; SI-NEXT: s_branch .LBB49_5 ; SI-NEXT: .LBB49_3: ; SI-NEXT: ; implicit-def: $sgpr56 @@ -22327,8 +22327,6 @@ define inreg <36 x i16> @bitcast_v9f64_to_v36i16_scalar(<9 x double> inreg %a, i ; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: s_branch .LBB49_2 ; SI-NEXT: .LBB49_4: -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v17, s7 ; SI-NEXT: v_mov_b32_e32 v15, s5 ; SI-NEXT: v_mov_b32_e32 v13, s29 @@ -22337,6 +22335,8 @@ define inreg <36 x i16> @bitcast_v9f64_to_v36i16_scalar(<9 x double> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v2, s18 ; SI-NEXT: v_mov_b32_e32 v4, s20 ; SI-NEXT: v_mov_b32_e32 v6, s22 @@ -22353,7 +22353,7 @@ define inreg <36 x i16> @bitcast_v9f64_to_v36i16_scalar(<9 x double> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v33, s63 ; SI-NEXT: v_mov_b32_e32 v34, s62 ; SI-NEXT: v_mov_b32_e32 v35, s61 -; SI-NEXT: v_mov_b32_e32 v36, s60 +; SI-NEXT: v_mov_b32_e32 v27, s60 ; SI-NEXT: v_mov_b32_e32 v26, s56 ; SI-NEXT: v_mov_b32_e32 v25, s46 ; SI-NEXT: v_mov_b32_e32 v24, s44 @@ -22364,14 +22364,14 @@ define inreg <36 x i16> @bitcast_v9f64_to_v36i16_scalar(<9 x double> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v19, s10 ; SI-NEXT: v_mov_b32_e32 v18, s8 ; SI-NEXT: .LBB49_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -22384,7 +22384,7 @@ define inreg <36 x i16> @bitcast_v9f64_to_v36i16_scalar(<9 x double> inreg %a, i ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v0, v0, v26 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v27 ; SI-NEXT: v_or_b32_e32 v2, v2, v25 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v35 @@ -23793,17 +23793,17 @@ define inreg <9 x double> @bitcast_v36i16_to_v9f64_scalar(<36 x i16> inreg %a, i ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s91, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s90, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s89, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s88, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s90, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s78, 16 @@ -24459,22 +24459,22 @@ define <36 x half> @bitcast_v9f64_to_v36f16(<9 x double> %a, i32 %b) #0 { ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 -; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr29 +; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr26 +; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr22 -; SI-NEXT: ; implicit-def: $vgpr30 +; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr20 -; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; implicit-def: $vgpr19 -; SI-NEXT: ; implicit-def: $vgpr25 +; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc @@ -24487,14 +24487,14 @@ define <36 x half> @bitcast_v9f64_to_v36f16(<9 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v21, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v22, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v23, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v26, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v29, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v31, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v25, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v27, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v30, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v3 @@ -24518,68 +24518,68 @@ define <36 x half> @bitcast_v9f64_to_v36f16(<9 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v21, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v22, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v23, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v26, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v29, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v31, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v25, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v27, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v30, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v1 ; SI-NEXT: .LBB52_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; SI-NEXT: v_or_b32_e32 v0, v0, v31 +; SI-NEXT: v_or_b32_e32 v0, v0, v30 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v35 -; SI-NEXT: v_or_b32_e32 v2, v2, v29 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v35 +; SI-NEXT: v_or_b32_e32 v2, v2, v27 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v34 -; SI-NEXT: v_or_b32_e32 v4, v4, v26 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v34 +; SI-NEXT: v_or_b32_e32 v4, v4, v25 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v33 ; SI-NEXT: v_or_b32_e32 v6, v6, v23 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v32 ; SI-NEXT: v_or_b32_e32 v8, v8, v22 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v31 ; SI-NEXT: v_or_b32_e32 v10, v10, v21 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v29 ; SI-NEXT: v_or_b32_e32 v12, v12, v20 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 ; SI-NEXT: v_or_b32_e32 v14, v14, v19 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v26 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v24 -; SI-NEXT: v_or_b32_e32 v1, v1, v31 -; SI-NEXT: v_or_b32_e32 v3, v3, v29 -; SI-NEXT: v_or_b32_e32 v5, v5, v26 +; SI-NEXT: v_or_b32_e32 v1, v1, v30 +; SI-NEXT: v_or_b32_e32 v3, v3, v27 +; SI-NEXT: v_or_b32_e32 v5, v5, v25 ; SI-NEXT: v_or_b32_e32 v7, v7, v23 ; SI-NEXT: v_or_b32_e32 v9, v9, v22 ; SI-NEXT: v_or_b32_e32 v11, v11, v21 @@ -24985,8 +24985,8 @@ define inreg <36 x half> @bitcast_v9f64_to_v36f16_scalar(<9 x double> inreg %a, ; SI-NEXT: v_lshr_b64 v[22:23], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[23:24], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[24:25], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[25:26], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[26:27], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v17 @@ -24997,7 +24997,7 @@ define inreg <36 x half> @bitcast_v9f64_to_v36f16_scalar(<9 x double> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v1 ; SI-NEXT: s_branch .LBB53_5 ; SI-NEXT: .LBB53_3: ; SI-NEXT: ; implicit-def: $sgpr56 @@ -25020,8 +25020,6 @@ define inreg <36 x half> @bitcast_v9f64_to_v36f16_scalar(<9 x double> inreg %a, ; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: s_branch .LBB53_2 ; SI-NEXT: .LBB53_4: -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v17, s7 ; SI-NEXT: v_mov_b32_e32 v15, s5 ; SI-NEXT: v_mov_b32_e32 v13, s29 @@ -25030,6 +25028,8 @@ define inreg <36 x half> @bitcast_v9f64_to_v36f16_scalar(<9 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v2, s18 ; SI-NEXT: v_mov_b32_e32 v4, s20 ; SI-NEXT: v_mov_b32_e32 v6, s22 @@ -25046,7 +25046,7 @@ define inreg <36 x half> @bitcast_v9f64_to_v36f16_scalar(<9 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v33, s63 ; SI-NEXT: v_mov_b32_e32 v34, s62 ; SI-NEXT: v_mov_b32_e32 v35, s61 -; SI-NEXT: v_mov_b32_e32 v36, s60 +; SI-NEXT: v_mov_b32_e32 v27, s60 ; SI-NEXT: v_mov_b32_e32 v26, s56 ; SI-NEXT: v_mov_b32_e32 v25, s46 ; SI-NEXT: v_mov_b32_e32 v24, s44 @@ -25057,14 +25057,14 @@ define inreg <36 x half> @bitcast_v9f64_to_v36f16_scalar(<9 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v19, s10 ; SI-NEXT: v_mov_b32_e32 v18, s8 ; SI-NEXT: .LBB53_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -25077,7 +25077,7 @@ define inreg <36 x half> @bitcast_v9f64_to_v36f16_scalar(<9 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v0, v0, v26 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v27 ; SI-NEXT: v_or_b32_e32 v2, v2, v25 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v35 @@ -25768,10 +25768,10 @@ define <9 x double> @bitcast_v36f16_to_v9f64(<36 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v41 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v45 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v40 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v44 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v40 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v44 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v55 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v43 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -25870,118 +25870,118 @@ define <9 x double> @bitcast_v36f16_to_v9f64(<36 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v44 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v40 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v2, v44 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v3, v40 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v43 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v55 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v54 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v53 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v43 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v55 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v42 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v54 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v42 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v63 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v53 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v52 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v63 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v51 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v59 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 ; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v60 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v50 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v59 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v49 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v48 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v58 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_or_b32_e32 v8, v10, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v57 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v56 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v56 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v37 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v12, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v37 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_or_b32_e32 v11, v13, v11 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v46 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v36 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -26535,8 +26535,8 @@ define inreg <9 x double> @bitcast_v36f16_to_v9f64_scalar(<36 x half> inreg %a, ; SI-NEXT: v_readfirstlane_b32 s8, v2 ; SI-NEXT: v_readfirstlane_b32 s10, v1 ; SI-NEXT: v_readfirstlane_b32 s13, v0 -; SI-NEXT: s_lshr_b32 s11, s29, 16 -; SI-NEXT: s_lshr_b32 s14, s28, 16 +; SI-NEXT: s_lshr_b32 s12, s29, 16 +; SI-NEXT: s_lshr_b32 s15, s28, 16 ; SI-NEXT: s_lshr_b32 s72, s27, 16 ; SI-NEXT: s_lshr_b32 s73, s26, 16 ; SI-NEXT: s_lshr_b32 s74, s25, 16 @@ -26551,8 +26551,8 @@ define inreg <9 x double> @bitcast_v36f16_to_v9f64_scalar(<36 x half> inreg %a, ; SI-NEXT: s_lshr_b32 s91, s16, 16 ; SI-NEXT: s_lshr_b32 s7, s6, 16 ; SI-NEXT: s_lshr_b32 s9, s8, 16 -; SI-NEXT: s_lshr_b32 s12, s10, 16 -; SI-NEXT: s_lshr_b32 s15, s13, 16 +; SI-NEXT: s_lshr_b32 s11, s10, 16 +; SI-NEXT: s_lshr_b32 s14, s13, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v4 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB55_3 @@ -26560,17 +26560,17 @@ define inreg <9 x double> @bitcast_v36f16_to_v9f64_scalar(<36 x half> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s91, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s90, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s89, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s88, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s90, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s79, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s78, 16 @@ -26594,16 +26594,16 @@ define inreg <9 x double> @bitcast_v36f16_to_v9f64_scalar(<36 x half> inreg %a, ; SI-NEXT: s_lshl_b32 s5, s72, 16 ; SI-NEXT: s_or_b32 s47, s4, s5 ; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s5, s14, 16 +; SI-NEXT: s_lshl_b32 s5, s15, 16 ; SI-NEXT: s_or_b32 s48, s4, s5 ; SI-NEXT: s_and_b32 s4, s29, 0xffff -; SI-NEXT: s_lshl_b32 s5, s11, 16 +; SI-NEXT: s_lshl_b32 s5, s12, 16 ; SI-NEXT: s_or_b32 s49, s4, s5 ; SI-NEXT: s_and_b32 s4, s13, 0xffff -; SI-NEXT: s_lshl_b32 s5, s15, 16 +; SI-NEXT: s_lshl_b32 s5, s14, 16 ; SI-NEXT: s_or_b32 s50, s4, s5 ; SI-NEXT: s_and_b32 s4, s10, 0xffff -; SI-NEXT: s_lshl_b32 s5, s12, 16 +; SI-NEXT: s_lshl_b32 s5, s11, 16 ; SI-NEXT: s_or_b32 s51, s4, s5 ; SI-NEXT: s_and_b32 s4, s8, 0xffff ; SI-NEXT: s_lshl_b32 s5, s9, 16 @@ -26614,149 +26614,149 @@ define inreg <9 x double> @bitcast_v36f16_to_v9f64_scalar(<36 x half> inreg %a, ; SI-NEXT: s_cbranch_execnz .LBB55_4 ; SI-NEXT: .LBB55_2: ; %cmp.true ; SI-NEXT: v_cvt_f32_f16_e32 v0, s91 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s90 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s16 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s90 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s17 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s89 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s19 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s89 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s19 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s18 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s88 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s88 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, s21 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s22 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s79 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s23 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s79 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s78 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, s24 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s78 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, s25 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s26 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v6, s77 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s27 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s22 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s28 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, s76 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s29 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s23 +; SI-NEXT: v_cvt_f32_f16_e32 v9, s75 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, s75 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, s10 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s8 -; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s24 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v9, s74 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_cvt_f32_f16_e32 v18, s6 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s25 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v10, s73 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v11, s26 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s72 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, s72 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, s14 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s27 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s15 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s28 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, s12 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v13, s11 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s29 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s14 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, s15 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s12 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s13 +; SI-NEXT: v_or_b32_e32 v13, v14, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v15, s11 +; SI-NEXT: v_cvt_f32_f16_e32 v17, s10 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 +; SI-NEXT: v_or_b32_e32 v14, v16, v14 ; SI-NEXT: v_cvt_f32_f16_e32 v16, s9 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v17, s8 +; SI-NEXT: v_cvt_f32_f16_e32 v18, s7 +; SI-NEXT: v_cvt_f32_f16_e32 v19, s6 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v16, v17, v16 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s7 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 -; SI-NEXT: v_or_b32_e32 v17, v18, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v16, v17, v16 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18 +; SI-NEXT: v_or_b32_e32 v17, v19, v17 ; SI-NEXT: s_branch .LBB55_5 ; SI-NEXT: .LBB55_3: ; SI-NEXT: ; implicit-def: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67 @@ -26923,13 +26923,13 @@ define inreg <9 x double> @bitcast_v36f16_to_v9f64_scalar(<36 x half> inreg %a, ; VI-NEXT: .LBB55_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v17, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s91 -; VI-NEXT: v_mov_b32_e32 v2, s90 ; VI-NEXT: v_add_f16_sdwa v0, v0, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v17 -; VI-NEXT: v_add_f16_sdwa v2, v2, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v17 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s90 +; VI-NEXT: v_add_f16_sdwa v1, v1, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v17 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s89 ; VI-NEXT: v_add_f16_sdwa v2, v2, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v17 @@ -28067,184 +28067,201 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i ; SI-NEXT: v_writelane_b32 v18, s53, 11 ; SI-NEXT: v_writelane_b32 v18, s54, 12 ; SI-NEXT: v_writelane_b32 v18, s55, 13 -; SI-NEXT: v_writelane_b32 v18, s30, 14 -; SI-NEXT: v_writelane_b32 v18, s31, 15 -; SI-NEXT: v_readfirstlane_b32 s53, v3 -; SI-NEXT: v_readfirstlane_b32 s55, v2 -; SI-NEXT: v_readfirstlane_b32 s50, v1 -; SI-NEXT: v_readfirstlane_b32 s52, v0 -; SI-NEXT: s_lshr_b32 s30, s29, 16 -; SI-NEXT: s_lshr_b32 s49, s28, 16 -; SI-NEXT: s_lshr_b32 s95, s27, 16 -; SI-NEXT: s_lshr_b32 s48, s26, 16 -; SI-NEXT: s_lshr_b32 s94, s25, 16 -; SI-NEXT: s_lshr_b32 s39, s24, 16 -; SI-NEXT: s_lshr_b32 s93, s23, 16 -; SI-NEXT: s_lshr_b32 s38, s22, 16 -; SI-NEXT: s_lshr_b32 s92, s21, 16 -; SI-NEXT: s_lshr_b32 s37, s20, 16 -; SI-NEXT: s_lshr_b32 s91, s19, 16 -; SI-NEXT: s_lshr_b32 s36, s18, 16 -; SI-NEXT: s_lshr_b32 s90, s17, 16 -; SI-NEXT: s_lshr_b32 s35, s16, 16 -; SI-NEXT: s_lshr_b32 s34, s53, 16 -; SI-NEXT: s_lshr_b32 s54, s55, 16 -; SI-NEXT: s_lshr_b32 s31, s50, 16 -; SI-NEXT: s_lshr_b32 s51, s52, 16 +; SI-NEXT: v_writelane_b32 v18, s64, 14 +; SI-NEXT: v_writelane_b32 v18, s65, 15 +; SI-NEXT: v_writelane_b32 v18, s66, 16 +; SI-NEXT: v_writelane_b32 v18, s67, 17 +; SI-NEXT: v_writelane_b32 v18, s68, 18 +; SI-NEXT: v_writelane_b32 v18, s69, 19 +; SI-NEXT: v_writelane_b32 v18, s70, 20 +; SI-NEXT: v_writelane_b32 v18, s71, 21 +; SI-NEXT: v_writelane_b32 v18, s80, 22 +; SI-NEXT: v_writelane_b32 v18, s81, 23 +; SI-NEXT: v_writelane_b32 v18, s82, 24 +; SI-NEXT: v_writelane_b32 v18, s83, 25 +; SI-NEXT: v_writelane_b32 v18, s84, 26 +; SI-NEXT: v_writelane_b32 v18, s85, 27 +; SI-NEXT: v_writelane_b32 v18, s86, 28 +; SI-NEXT: v_writelane_b32 v18, s87, 29 +; SI-NEXT: v_writelane_b32 v18, s30, 30 +; SI-NEXT: v_writelane_b32 v18, s31, 31 +; SI-NEXT: v_readfirstlane_b32 s85, v3 +; SI-NEXT: v_readfirstlane_b32 s87, v2 +; SI-NEXT: v_readfirstlane_b32 s82, v1 +; SI-NEXT: v_readfirstlane_b32 s84, v0 +; SI-NEXT: s_lshr_b32 s64, s29, 16 +; SI-NEXT: s_lshr_b32 s81, s28, 16 +; SI-NEXT: s_lshr_b32 s55, s27, 16 +; SI-NEXT: s_lshr_b32 s80, s26, 16 +; SI-NEXT: s_lshr_b32 s54, s25, 16 +; SI-NEXT: s_lshr_b32 s71, s24, 16 +; SI-NEXT: s_lshr_b32 s53, s23, 16 +; SI-NEXT: s_lshr_b32 s70, s22, 16 +; SI-NEXT: s_lshr_b32 s52, s21, 16 +; SI-NEXT: s_lshr_b32 s69, s20, 16 +; SI-NEXT: s_lshr_b32 s51, s19, 16 +; SI-NEXT: s_lshr_b32 s68, s18, 16 +; SI-NEXT: s_lshr_b32 s50, s17, 16 +; SI-NEXT: s_lshr_b32 s67, s16, 16 +; SI-NEXT: s_lshr_b32 s66, s85, 16 +; SI-NEXT: s_lshr_b32 s86, s87, 16 +; SI-NEXT: s_lshr_b32 s65, s82, 16 +; SI-NEXT: s_lshr_b32 s83, s84, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v4 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB57_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s7, s90, 16 +; SI-NEXT: s_lshl_b32 s7, s50, 16 ; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s46, s35, 16 -; SI-NEXT: s_or_b32 s47, s5, s7 +; SI-NEXT: s_lshl_b32 s38, s67, 16 +; SI-NEXT: s_or_b32 s39, s5, s7 ; SI-NEXT: s_and_b32 s5, s19, 0xffff -; SI-NEXT: s_lshl_b32 s7, s91, 16 -; SI-NEXT: s_or_b32 s40, s4, s46 +; SI-NEXT: s_lshl_b32 s7, s51, 16 +; SI-NEXT: s_or_b32 s44, s4, s38 ; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s56, s36, 16 -; SI-NEXT: s_or_b32 s57, s5, s7 +; SI-NEXT: s_lshl_b32 s36, s68, 16 +; SI-NEXT: s_or_b32 s37, s5, s7 ; SI-NEXT: s_and_b32 s5, s21, 0xffff -; SI-NEXT: s_lshl_b32 s7, s92, 16 -; SI-NEXT: s_or_b32 s14, s4, s56 +; SI-NEXT: s_lshl_b32 s7, s52, 16 +; SI-NEXT: s_or_b32 s42, s4, s36 ; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s58, s37, 16 -; SI-NEXT: s_or_b32 s59, s5, s7 +; SI-NEXT: s_lshl_b32 s34, s69, 16 +; SI-NEXT: s_or_b32 s35, s5, s7 ; SI-NEXT: s_and_b32 s5, s23, 0xffff -; SI-NEXT: s_lshl_b32 s7, s93, 16 -; SI-NEXT: s_or_b32 s12, s4, s58 +; SI-NEXT: s_lshl_b32 s7, s53, 16 +; SI-NEXT: s_or_b32 s40, s4, s34 ; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s60, s38, 16 -; SI-NEXT: s_or_b32 s61, s5, s7 +; SI-NEXT: s_lshl_b32 s30, s70, 16 +; SI-NEXT: s_or_b32 s31, s5, s7 ; SI-NEXT: s_and_b32 s5, s25, 0xffff -; SI-NEXT: s_lshl_b32 s7, s94, 16 -; SI-NEXT: s_or_b32 s10, s4, s60 +; SI-NEXT: s_lshl_b32 s7, s54, 16 +; SI-NEXT: s_or_b32 s14, s4, s30 ; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s62, s39, 16 -; SI-NEXT: s_or_b32 s63, s5, s7 +; SI-NEXT: s_lshl_b32 vcc_lo, s71, 16 +; SI-NEXT: s_or_b32 vcc_hi, s5, s7 ; SI-NEXT: s_and_b32 s5, s27, 0xffff -; SI-NEXT: s_lshl_b32 s7, s95, 16 -; SI-NEXT: s_or_b32 s8, s4, s62 +; SI-NEXT: s_lshl_b32 s7, s55, 16 +; SI-NEXT: s_or_b32 s12, s4, vcc_lo ; SI-NEXT: s_and_b32 s4, s26, 0xffff -; SI-NEXT: s_lshl_b32 s72, s48, 16 -; SI-NEXT: s_or_b32 s73, s5, s7 +; SI-NEXT: s_lshl_b32 s94, s80, 16 +; SI-NEXT: s_or_b32 s95, s5, s7 ; SI-NEXT: s_and_b32 s5, s29, 0xffff -; SI-NEXT: s_lshl_b32 s7, s30, 16 -; SI-NEXT: s_or_b32 s6, s4, s72 +; SI-NEXT: s_lshl_b32 s7, s64, 16 +; SI-NEXT: s_or_b32 s10, s4, s94 ; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s44, s49, 16 -; SI-NEXT: s_or_b32 s45, s5, s7 -; SI-NEXT: s_and_b32 s5, s50, 0xffff -; SI-NEXT: s_lshl_b32 s7, s31, 16 -; SI-NEXT: s_or_b32 s4, s4, s44 -; SI-NEXT: s_lshl_b32 s42, s51, 16 -; SI-NEXT: s_or_b32 s43, s5, s7 -; SI-NEXT: s_and_b32 s5, s53, 0xffff -; SI-NEXT: s_lshl_b32 s7, s34, 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[44:45], 16 -; SI-NEXT: s_and_b32 s44, s52, 0xffff -; SI-NEXT: s_or_b32 s79, s5, s7 -; SI-NEXT: s_lshl_b32 s78, s54, 16 -; SI-NEXT: s_or_b32 s44, s44, s42 -; SI-NEXT: s_lshr_b64 s[76:77], s[42:43], 16 -; SI-NEXT: s_and_b32 s42, s55, 0xffff -; SI-NEXT: s_mov_b32 s41, s47 -; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16 -; SI-NEXT: s_mov_b32 s15, s57 -; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16 -; SI-NEXT: s_mov_b32 s13, s59 -; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16 -; SI-NEXT: s_mov_b32 s11, s61 -; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16 -; SI-NEXT: s_mov_b32 s9, s63 -; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16 -; SI-NEXT: s_mov_b32 s7, s73 -; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16 -; SI-NEXT: s_mov_b32 s5, s45 -; SI-NEXT: s_mov_b32 s45, s43 -; SI-NEXT: s_or_b32 s42, s42, s78 -; SI-NEXT: s_mov_b32 s43, s79 -; SI-NEXT: s_lshr_b64 s[78:79], s[78:79], 16 +; SI-NEXT: s_lshl_b32 s92, s81, 16 +; SI-NEXT: s_or_b32 s93, s5, s7 +; SI-NEXT: s_and_b32 s5, s82, 0xffff +; SI-NEXT: s_lshl_b32 s7, s65, 16 +; SI-NEXT: s_or_b32 s8, s4, s92 +; SI-NEXT: s_and_b32 s4, s84, 0xffff +; SI-NEXT: s_lshl_b32 s90, s83, 16 +; SI-NEXT: s_or_b32 s91, s5, s7 +; SI-NEXT: s_and_b32 s5, s85, 0xffff +; SI-NEXT: s_lshl_b32 s7, s66, 16 +; SI-NEXT: s_or_b32 s6, s4, s90 +; SI-NEXT: s_and_b32 s4, s87, 0xffff +; SI-NEXT: s_lshl_b32 s88, s86, 16 +; SI-NEXT: s_or_b32 s89, s5, s7 +; SI-NEXT: s_or_b32 s4, s4, s88 +; SI-NEXT: s_lshr_b64 s[46:47], s[38:39], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[36:37], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[34:35], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[30:31], 16 +; SI-NEXT: s_lshr_b64 s[62:63], vcc, 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[94:95], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[92:93], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[90:91], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[88:89], 16 +; SI-NEXT: s_mov_b64 s[48:49], 0 +; SI-NEXT: s_mov_b32 s45, s39 +; SI-NEXT: s_mov_b32 s43, s37 +; SI-NEXT: s_mov_b32 s41, s35 +; SI-NEXT: s_mov_b32 s15, s31 +; SI-NEXT: s_mov_b32 s13, vcc_hi +; SI-NEXT: s_mov_b32 s11, s95 +; SI-NEXT: s_mov_b32 s9, s93 +; SI-NEXT: s_mov_b32 s7, s91 +; SI-NEXT: s_mov_b32 s5, s89 ; SI-NEXT: s_cbranch_execnz .LBB57_3 ; SI-NEXT: .LBB57_2: ; %cmp.true -; SI-NEXT: s_add_i32 s55, s55, 3 -; SI-NEXT: s_and_b32 s4, s55, 0xffff -; SI-NEXT: s_lshl_b32 s5, s54, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s53, s53, 3 -; SI-NEXT: s_add_i32 s42, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s53, 0xffff -; SI-NEXT: s_lshl_b32 s5, s34, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s52, s52, 3 -; SI-NEXT: s_add_i32 s43, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s52, 0xffff -; SI-NEXT: s_lshl_b32 s5, s51, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s50, s50, 3 -; SI-NEXT: s_add_i32 s44, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s50, 0xffff -; SI-NEXT: s_lshl_b32 s5, s31, 16 +; SI-NEXT: s_add_i32 s87, s87, 3 +; SI-NEXT: s_and_b32 s4, s87, 0xffff +; SI-NEXT: s_lshl_b32 s5, s86, 16 +; SI-NEXT: s_add_i32 s85, s85, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_and_b32 s5, s85, 0xffff +; SI-NEXT: s_lshl_b32 s6, s66, 16 +; SI-NEXT: s_add_i32 s84, s84, 3 +; SI-NEXT: s_or_b32 s5, s6, s5 +; SI-NEXT: s_and_b32 s6, s84, 0xffff +; SI-NEXT: s_lshl_b32 s7, s83, 16 +; SI-NEXT: s_add_i32 s82, s82, 3 +; SI-NEXT: s_or_b32 s6, s7, s6 +; SI-NEXT: s_and_b32 s7, s82, 0xffff +; SI-NEXT: s_lshl_b32 s8, s65, 16 ; SI-NEXT: s_add_i32 s28, s28, 3 -; SI-NEXT: s_add_i32 s45, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s5, s49, 16 +; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_and_b32 s8, s28, 0xffff +; SI-NEXT: s_lshl_b32 s9, s81, 16 ; SI-NEXT: s_add_i32 s29, s29, 3 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s29, 0xffff -; SI-NEXT: s_lshl_b32 s6, s30, 16 +; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_and_b32 s9, s29, 0xffff +; SI-NEXT: s_lshl_b32 s10, s64, 16 ; SI-NEXT: s_add_i32 s26, s26, 3 -; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s26, 0xffff -; SI-NEXT: s_lshl_b32 s7, s48, 16 +; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: s_and_b32 s10, s26, 0xffff +; SI-NEXT: s_lshl_b32 s11, s80, 16 ; SI-NEXT: s_add_i32 s27, s27, 3 -; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s27, 0xffff -; SI-NEXT: s_lshl_b32 s8, s95, 16 +; SI-NEXT: s_or_b32 s10, s11, s10 +; SI-NEXT: s_and_b32 s11, s27, 0xffff +; SI-NEXT: s_lshl_b32 s12, s55, 16 ; SI-NEXT: s_add_i32 s24, s24, 3 -; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s24, 0xffff -; SI-NEXT: s_lshl_b32 s9, s39, 16 +; SI-NEXT: s_or_b32 s11, s12, s11 +; SI-NEXT: s_and_b32 s12, s24, 0xffff +; SI-NEXT: s_lshl_b32 s13, s71, 16 ; SI-NEXT: s_add_i32 s25, s25, 3 -; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s25, 0xffff -; SI-NEXT: s_lshl_b32 s10, s94, 16 +; SI-NEXT: s_or_b32 s12, s13, s12 +; SI-NEXT: s_and_b32 s13, s25, 0xffff +; SI-NEXT: s_lshl_b32 s14, s54, 16 ; SI-NEXT: s_add_i32 s22, s22, 3 -; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s22, 0xffff -; SI-NEXT: s_lshl_b32 s11, s38, 16 +; SI-NEXT: s_or_b32 s13, s14, s13 +; SI-NEXT: s_and_b32 s14, s22, 0xffff +; SI-NEXT: s_lshl_b32 s15, s70, 16 ; SI-NEXT: s_add_i32 s23, s23, 3 -; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s23, 0xffff -; SI-NEXT: s_lshl_b32 s12, s93, 16 +; SI-NEXT: s_or_b32 s14, s15, s14 +; SI-NEXT: s_and_b32 s15, s23, 0xffff +; SI-NEXT: s_lshl_b32 s22, s53, 16 ; SI-NEXT: s_add_i32 s20, s20, 3 -; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s12, s20, 0xffff -; SI-NEXT: s_lshl_b32 s13, s37, 16 +; SI-NEXT: s_or_b32 s15, s22, s15 +; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s22, s69, 16 +; SI-NEXT: s_or_b32 s20, s22, s20 ; SI-NEXT: s_add_i32 s21, s21, 3 -; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s13, s21, 0xffff -; SI-NEXT: s_lshl_b32 s14, s92, 16 +; SI-NEXT: s_add_i32 s40, s20, 0x30000 +; SI-NEXT: s_and_b32 s20, s21, 0xffff +; SI-NEXT: s_lshl_b32 s21, s52, 16 +; SI-NEXT: s_or_b32 s20, s21, s20 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: s_and_b32 s14, s18, 0xffff -; SI-NEXT: s_lshl_b32 s15, s36, 16 +; SI-NEXT: s_add_i32 s41, s20, 0x30000 +; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s20, s68, 16 +; SI-NEXT: s_or_b32 s18, s20, s18 ; SI-NEXT: s_add_i32 s19, s19, 3 -; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_and_b32 s15, s19, 0xffff -; SI-NEXT: s_lshl_b32 s18, s91, 16 +; SI-NEXT: s_add_i32 s42, s18, 0x30000 +; SI-NEXT: s_and_b32 s18, s19, 0xffff +; SI-NEXT: s_lshl_b32 s19, s51, 16 +; SI-NEXT: s_or_b32 s18, s19, s18 ; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_or_b32 s15, s18, s15 +; SI-NEXT: s_add_i32 s43, s18, 0x30000 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_lshl_b32 s18, s35, 16 +; SI-NEXT: s_lshl_b32 s18, s67, 16 ; SI-NEXT: s_or_b32 s16, s18, s16 ; SI-NEXT: s_add_i32 s17, s17, 3 -; SI-NEXT: s_add_i32 s40, s16, 0x30000 +; SI-NEXT: s_add_i32 s44, s16, 0x30000 ; SI-NEXT: s_and_b32 s16, s17, 0xffff -; SI-NEXT: s_lshl_b32 s17, s90, 16 +; SI-NEXT: s_lshl_b32 s17, s50, 16 ; SI-NEXT: s_or_b32 s16, s17, s16 ; SI-NEXT: s_add_i32 s4, s4, 0x30000 ; SI-NEXT: s_add_i32 s5, s5, 0x30000 @@ -28258,100 +28275,116 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i ; SI-NEXT: s_add_i32 s13, s13, 0x30000 ; SI-NEXT: s_add_i32 s14, s14, 0x30000 ; SI-NEXT: s_add_i32 s15, s15, 0x30000 -; SI-NEXT: s_add_i32 s41, s16, 0x30000 -; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[42:43], 16 -; SI-NEXT: s_lshr_b32 s90, s41, 16 -; SI-NEXT: s_lshr_b32 s91, s15, 16 -; SI-NEXT: s_lshr_b32 s92, s13, 16 -; SI-NEXT: s_lshr_b32 s93, s11, 16 -; SI-NEXT: s_lshr_b32 s94, s9, 16 -; SI-NEXT: s_lshr_b32 s95, s7, 16 -; SI-NEXT: s_lshr_b32 s30, s5, 16 -; SI-NEXT: s_lshr_b32 s31, s45, 16 -; SI-NEXT: s_lshr_b32 s34, s43, 16 +; SI-NEXT: s_add_i32 s45, s16, 0x30000 +; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16 +; SI-NEXT: s_lshr_b32 s50, s45, 16 +; SI-NEXT: s_lshr_b32 s51, s43, 16 +; SI-NEXT: s_lshr_b32 s52, s41, 16 +; SI-NEXT: s_lshr_b32 s53, s15, 16 +; SI-NEXT: s_lshr_b32 s54, s13, 16 +; SI-NEXT: s_lshr_b32 s55, s11, 16 +; SI-NEXT: s_lshr_b32 s64, s9, 16 +; SI-NEXT: s_lshr_b32 s65, s7, 16 +; SI-NEXT: s_lshr_b32 s66, s5, 16 ; SI-NEXT: .LBB57_3: ; %end -; SI-NEXT: s_and_b32 s16, s40, 0xffff +; SI-NEXT: s_and_b32 s16, s44, 0xffff ; SI-NEXT: s_lshl_b32 s17, s46, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s41, 0xffff -; SI-NEXT: s_lshl_b32 s18, s90, 16 +; SI-NEXT: s_and_b32 s17, s45, 0xffff +; SI-NEXT: s_lshl_b32 s18, s50, 16 ; SI-NEXT: s_or_b32 s17, s17, s18 +; SI-NEXT: s_and_b32 s18, s42, 0xffff +; SI-NEXT: s_lshl_b32 s19, s56, 16 +; SI-NEXT: s_or_b32 s18, s18, s19 +; SI-NEXT: s_and_b32 s19, s43, 0xffff +; SI-NEXT: s_lshl_b32 s20, s51, 16 +; SI-NEXT: s_or_b32 s19, s19, s20 +; SI-NEXT: s_and_b32 s20, s40, 0xffff +; SI-NEXT: s_lshl_b32 s21, s58, 16 +; SI-NEXT: s_or_b32 s20, s20, s21 +; SI-NEXT: s_and_b32 s21, s41, 0xffff +; SI-NEXT: s_lshl_b32 s22, s52, 16 +; SI-NEXT: s_or_b32 s21, s21, s22 ; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s18, s56, 16 -; SI-NEXT: s_or_b32 s14, s14, s18 +; SI-NEXT: s_lshl_b32 s22, s60, 16 +; SI-NEXT: s_or_b32 s14, s14, s22 ; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s18, s91, 16 -; SI-NEXT: s_or_b32 s15, s15, s18 +; SI-NEXT: s_lshl_b32 s22, s53, 16 +; SI-NEXT: s_or_b32 s15, s15, s22 ; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s18, s58, 16 -; SI-NEXT: s_or_b32 s12, s12, s18 +; SI-NEXT: s_lshl_b32 s22, s62, 16 +; SI-NEXT: s_or_b32 s12, s12, s22 ; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s18, s92, 16 -; SI-NEXT: s_or_b32 s13, s13, s18 +; SI-NEXT: s_lshl_b32 s22, s54, 16 +; SI-NEXT: s_or_b32 s13, s13, s22 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s18, s60, 16 -; SI-NEXT: s_or_b32 s10, s10, s18 +; SI-NEXT: s_lshl_b32 s22, s72, 16 +; SI-NEXT: s_or_b32 s10, s10, s22 ; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s18, s93, 16 -; SI-NEXT: s_or_b32 s11, s11, s18 +; SI-NEXT: s_lshl_b32 s22, s55, 16 +; SI-NEXT: s_or_b32 s11, s11, s22 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s18, s62, 16 -; SI-NEXT: s_or_b32 s8, s8, s18 +; SI-NEXT: s_lshl_b32 s22, s74, 16 +; SI-NEXT: s_or_b32 s8, s8, s22 ; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s18, s94, 16 -; SI-NEXT: s_or_b32 s9, s9, s18 +; SI-NEXT: s_lshl_b32 s22, s64, 16 +; SI-NEXT: s_or_b32 s9, s9, s22 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s18, s72, 16 -; SI-NEXT: s_or_b32 s6, s6, s18 +; SI-NEXT: s_lshl_b32 s22, s76, 16 +; SI-NEXT: s_or_b32 s6, s6, s22 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s18, s95, 16 -; SI-NEXT: s_or_b32 s7, s7, s18 +; SI-NEXT: s_lshl_b32 s22, s65, 16 +; SI-NEXT: s_or_b32 s7, s7, s22 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s18, s74, 16 -; SI-NEXT: s_or_b32 s4, s4, s18 +; SI-NEXT: s_lshl_b32 s22, s78, 16 +; SI-NEXT: s_or_b32 s4, s4, s22 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s18, s30, 16 -; SI-NEXT: s_or_b32 s5, s5, s18 -; SI-NEXT: s_and_b32 s18, s44, 0xffff -; SI-NEXT: s_lshl_b32 s19, s76, 16 -; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_and_b32 s19, s45, 0xffff -; SI-NEXT: s_lshl_b32 s20, s31, 16 -; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_and_b32 s20, s42, 0xffff -; SI-NEXT: s_lshl_b32 s21, s78, 16 -; SI-NEXT: s_or_b32 s20, s20, s21 -; SI-NEXT: s_and_b32 s21, s43, 0xffff -; SI-NEXT: s_lshl_b32 s22, s34, 16 -; SI-NEXT: s_or_b32 s21, s21, s22 -; SI-NEXT: v_readlane_b32 s30, v18, 14 +; SI-NEXT: s_lshl_b32 s22, s66, 16 +; SI-NEXT: s_or_b32 s5, s5, s22 +; SI-NEXT: v_readlane_b32 s30, v18, 30 ; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v2, s14 -; SI-NEXT: v_mov_b32_e32 v3, s15 -; SI-NEXT: v_mov_b32_e32 v4, s12 -; SI-NEXT: v_mov_b32_e32 v5, s13 -; SI-NEXT: v_mov_b32_e32 v6, s10 -; SI-NEXT: v_mov_b32_e32 v7, s11 -; SI-NEXT: v_mov_b32_e32 v8, s8 -; SI-NEXT: v_mov_b32_e32 v9, s9 -; SI-NEXT: v_mov_b32_e32 v10, s6 -; SI-NEXT: v_mov_b32_e32 v11, s7 -; SI-NEXT: v_mov_b32_e32 v12, s4 -; SI-NEXT: v_mov_b32_e32 v13, s5 -; SI-NEXT: v_mov_b32_e32 v14, s18 -; SI-NEXT: v_mov_b32_e32 v15, s19 -; SI-NEXT: v_mov_b32_e32 v16, s20 -; SI-NEXT: v_mov_b32_e32 v17, s21 -; SI-NEXT: v_readlane_b32 s31, v18, 15 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v4, s20 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v6, s14 +; SI-NEXT: v_mov_b32_e32 v7, s15 +; SI-NEXT: v_mov_b32_e32 v8, s12 +; SI-NEXT: v_mov_b32_e32 v9, s13 +; SI-NEXT: v_mov_b32_e32 v10, s10 +; SI-NEXT: v_mov_b32_e32 v11, s11 +; SI-NEXT: v_mov_b32_e32 v12, s8 +; SI-NEXT: v_mov_b32_e32 v13, s9 +; SI-NEXT: v_mov_b32_e32 v14, s6 +; SI-NEXT: v_mov_b32_e32 v15, s7 +; SI-NEXT: v_mov_b32_e32 v16, s4 +; SI-NEXT: v_mov_b32_e32 v17, s5 +; SI-NEXT: v_readlane_b32 s31, v18, 31 +; SI-NEXT: v_readlane_b32 s87, v18, 29 +; SI-NEXT: v_readlane_b32 s86, v18, 28 +; SI-NEXT: v_readlane_b32 s85, v18, 27 +; SI-NEXT: v_readlane_b32 s84, v18, 26 +; SI-NEXT: v_readlane_b32 s83, v18, 25 +; SI-NEXT: v_readlane_b32 s82, v18, 24 +; SI-NEXT: v_readlane_b32 s81, v18, 23 +; SI-NEXT: v_readlane_b32 s80, v18, 22 +; SI-NEXT: v_readlane_b32 s71, v18, 21 +; SI-NEXT: v_readlane_b32 s70, v18, 20 +; SI-NEXT: v_readlane_b32 s69, v18, 19 +; SI-NEXT: v_readlane_b32 s68, v18, 18 +; SI-NEXT: v_readlane_b32 s67, v18, 17 +; SI-NEXT: v_readlane_b32 s66, v18, 16 +; SI-NEXT: v_readlane_b32 s65, v18, 15 +; SI-NEXT: v_readlane_b32 s64, v18, 14 ; SI-NEXT: v_readlane_b32 s55, v18, 13 ; SI-NEXT: v_readlane_b32 s54, v18, 12 ; SI-NEXT: v_readlane_b32 s53, v18, 11 @@ -28372,23 +28405,24 @@ define inreg <36 x half> @bitcast_v36i16_to_v36f16_scalar(<36 x i16> inreg %a, i ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB57_4: -; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: s_mov_b64 s[48:49], -1 +; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr42 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr12 ; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: s_branch .LBB57_2 ; @@ -29598,179 +29632,181 @@ define inreg <36 x i16> @bitcast_v36f16_to_v36i16_scalar(<36 x half> inreg %a, i ; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_readfirstlane_b32 s8, v3 -; SI-NEXT: v_readfirstlane_b32 s6, v2 -; SI-NEXT: v_readfirstlane_b32 s9, v1 -; SI-NEXT: v_readfirstlane_b32 s7, v0 -; SI-NEXT: s_lshr_b32 s40, s29, 16 -; SI-NEXT: s_lshr_b32 s43, s28, 16 -; SI-NEXT: s_lshr_b32 s15, s27, 16 -; SI-NEXT: s_lshr_b32 s45, s26, 16 -; SI-NEXT: s_lshr_b32 s14, s25, 16 -; SI-NEXT: s_lshr_b32 s46, s24, 16 -; SI-NEXT: s_lshr_b32 s13, s23, 16 -; SI-NEXT: s_lshr_b32 s56, s22, 16 -; SI-NEXT: s_lshr_b32 s12, s21, 16 +; SI-NEXT: v_readfirstlane_b32 s46, v3 +; SI-NEXT: v_readfirstlane_b32 s8, v2 +; SI-NEXT: v_readfirstlane_b32 s45, v1 +; SI-NEXT: v_readfirstlane_b32 s11, v0 +; SI-NEXT: s_lshr_b32 s44, s29, 16 +; SI-NEXT: s_lshr_b32 s7, s28, 16 +; SI-NEXT: s_lshr_b32 s43, s27, 16 +; SI-NEXT: s_lshr_b32 s10, s26, 16 +; SI-NEXT: s_lshr_b32 s42, s25, 16 +; SI-NEXT: s_lshr_b32 s12, s24, 16 +; SI-NEXT: s_lshr_b32 s41, s23, 16 +; SI-NEXT: s_lshr_b32 s13, s22, 16 +; SI-NEXT: s_lshr_b32 s40, s21, 16 ; SI-NEXT: s_lshr_b32 s57, s20, 16 -; SI-NEXT: s_lshr_b32 s11, s19, 16 +; SI-NEXT: s_lshr_b32 s15, s19, 16 ; SI-NEXT: s_lshr_b32 s58, s18, 16 -; SI-NEXT: s_lshr_b32 s10, s17, 16 +; SI-NEXT: s_lshr_b32 s14, s17, 16 ; SI-NEXT: s_lshr_b32 s59, s16, 16 -; SI-NEXT: s_lshr_b32 s47, s8, 16 -; SI-NEXT: s_lshr_b32 s42, s6, 16 -; SI-NEXT: s_lshr_b32 s41, s9, 16 -; SI-NEXT: s_lshr_b32 s44, s7, 16 +; SI-NEXT: s_lshr_b32 s56, s46, 16 +; SI-NEXT: s_lshr_b32 s6, s8, 16 +; SI-NEXT: s_lshr_b32 s47, s45, 16 +; SI-NEXT: s_lshr_b32 s9, s11, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v4 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB59_3 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_cbranch_execnz .LBB59_4 ; SI-NEXT: .LBB59_2: ; %cmp.true +; SI-NEXT: v_cvt_f32_f16_e32 v2, s58 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s59 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s16 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s56 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v3 +; SI-NEXT: v_or_b32_e32 v48, v3, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s46 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_or_b32_e32 v36, v1, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s57 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s56 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s43 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v37, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s46 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s45 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v5 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s44 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s42 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s29 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v1 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s47 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s40 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v37 +; SI-NEXT: v_or_b32_e32 v17, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s45 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v37, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s23 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s44 ; SI-NEXT: v_cvt_f16_f32_e32 v38, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s15 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s19 -; SI-NEXT: v_or_b32_e32 v13, v1, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s27 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s14 -; SI-NEXT: v_cvt_f16_f32_e32 v39, v3 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v48, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v39 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s25 -; SI-NEXT: v_or_b32_e32 v11, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s13 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v48 +; SI-NEXT: v_cvt_f16_f32_e32 v39, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s29 +; SI-NEXT: v_or_b32_e32 v15, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s43 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s27 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v49, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v9, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s12 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39 +; SI-NEXT: v_or_b32_e32 v13, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s42 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v49 -; SI-NEXT: v_or_b32_e32 v7, v3, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s21 +; SI-NEXT: v_or_b32_e32 v11, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s25 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s41 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s11 ; SI-NEXT: v_cvt_f16_f32_e32 v50, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v52, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v51, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50 -; SI-NEXT: v_or_b32_e32 v5, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s10 -; SI-NEXT: v_cvt_f32_f16_e32 v21, s17 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 +; SI-NEXT: v_or_b32_e32 v9, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s40 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v51 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v53, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v15, s41 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v52 -; SI-NEXT: v_or_b32_e32 v3, v17, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s9 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v53 -; SI-NEXT: v_or_b32_e32 v1, v21, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v21, s8 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v51, v15 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v51 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s58 -; SI-NEXT: v_or_b32_e32 v15, v15, v21 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v37 -; SI-NEXT: v_cvt_f32_f16_e32 v20, s22 -; SI-NEXT: v_or_b32_e32 v17, v17, v21 -; SI-NEXT: v_cvt_f32_f16_e32 v21, s24 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v52, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v7, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s15 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v52 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s17 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_or_b32_e32 v5, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v53, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s14 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v54, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v53 +; SI-NEXT: v_or_b32_e32 v3, v3, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v54 +; SI-NEXT: v_or_b32_e32 v1, v1, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s13 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s22 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s12 +; SI-NEXT: v_or_b32_e32 v55, v10, v4 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s24 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v6 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v8 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_or_b32_e32 v41, v10, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s10 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v14 +; SI-NEXT: v_or_b32_e32 v40, v12, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s26 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s7 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s28 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_cvt_f32_f16_e32 v18, s9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_or_b32_e32 v43, v12, v10 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s11 +; SI-NEXT: v_or_b32_e32 v42, v16, v12 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v18 +; SI-NEXT: v_cvt_f32_f16_e32 v18, s6 +; SI-NEXT: v_cvt_f32_f16_e32 v19, s8 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v14 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v14 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v14 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v18 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_or_b32_e32 v45, v18, v2 -; SI-NEXT: v_or_b32_e32 v43, v19, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v18, s26 -; SI-NEXT: v_or_b32_e32 v42, v20, v6 -; SI-NEXT: v_or_b32_e32 v55, v21, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v19, s28 -; SI-NEXT: v_cvt_f32_f16_e32 v20, s7 -; SI-NEXT: v_cvt_f32_f16_e32 v21, s6 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_or_b32_e32 v44, v18, v10 -; SI-NEXT: v_or_b32_e32 v41, v19, v12 -; SI-NEXT: v_or_b32_e32 v40, v20, v14 -; SI-NEXT: v_or_b32_e32 v54, v21, v16 +; SI-NEXT: v_or_b32_e32 v45, v20, v14 +; SI-NEXT: v_or_b32_e32 v44, v19, v16 ; SI-NEXT: v_lshr_b64 v[34:35], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[32:33], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[30:31], v[4:5], 16 @@ -29784,102 +29820,100 @@ define inreg <36 x i16> @bitcast_v36f16_to_v36i16_scalar(<36 x half> inreg %a, i ; SI-NEXT: .LBB59_3: ; SI-NEXT: s_branch .LBB59_2 ; SI-NEXT: .LBB59_4: -; SI-NEXT: v_mov_b32_e32 v37, s47 +; SI-NEXT: v_mov_b32_e32 v37, s56 +; SI-NEXT: v_mov_b32_e32 v38, s47 +; SI-NEXT: v_mov_b32_e32 v39, s44 +; SI-NEXT: v_mov_b32_e32 v49, s43 +; SI-NEXT: v_mov_b32_e32 v50, s42 ; SI-NEXT: v_mov_b32_e32 v51, s41 -; SI-NEXT: v_mov_b32_e32 v38, s40 -; SI-NEXT: v_mov_b32_e32 v39, s15 -; SI-NEXT: v_mov_b32_e32 v48, s14 -; SI-NEXT: v_mov_b32_e32 v49, s13 -; SI-NEXT: v_mov_b32_e32 v50, s12 -; SI-NEXT: v_mov_b32_e32 v52, s11 -; SI-NEXT: v_mov_b32_e32 v53, s10 +; SI-NEXT: v_mov_b32_e32 v52, s40 +; SI-NEXT: v_mov_b32_e32 v53, s15 +; SI-NEXT: v_mov_b32_e32 v54, s14 ; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v54, s6 -; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_mov_b32_e32 v40, s7 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v41, s28 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v44, s26 -; SI-NEXT: v_mov_b32_e32 v55, s24 -; SI-NEXT: v_mov_b32_e32 v42, s22 -; SI-NEXT: v_mov_b32_e32 v43, s20 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v45, s18 -; SI-NEXT: v_mov_b32_e32 v36, s16 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v13, s29 -; SI-NEXT: v_mov_b32_e32 v15, s9 -; SI-NEXT: v_mov_b32_e32 v17, s8 +; SI-NEXT: v_mov_b32_e32 v15, s45 +; SI-NEXT: v_mov_b32_e32 v17, s46 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mov_b32_e32 v44, s8 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v45, s11 +; SI-NEXT: v_mov_b32_e32 v42, s28 +; SI-NEXT: v_mov_b32_e32 v43, s26 +; SI-NEXT: v_mov_b32_e32 v40, s24 +; SI-NEXT: v_mov_b32_e32 v41, s22 +; SI-NEXT: v_mov_b32_e32 v55, s20 +; SI-NEXT: v_mov_b32_e32 v48, s18 +; SI-NEXT: v_mov_b32_e32 v36, s16 ; SI-NEXT: v_mov_b32_e32 v34, s59 ; SI-NEXT: v_mov_b32_e32 v32, s58 ; SI-NEXT: v_mov_b32_e32 v30, s57 -; SI-NEXT: v_mov_b32_e32 v28, s56 -; SI-NEXT: v_mov_b32_e32 v26, s46 -; SI-NEXT: v_mov_b32_e32 v24, s45 -; SI-NEXT: v_mov_b32_e32 v22, s43 -; SI-NEXT: v_mov_b32_e32 v20, s44 -; SI-NEXT: v_mov_b32_e32 v18, s42 +; SI-NEXT: v_mov_b32_e32 v28, s13 +; SI-NEXT: v_mov_b32_e32 v26, s12 +; SI-NEXT: v_mov_b32_e32 v24, s10 +; SI-NEXT: v_mov_b32_e32 v22, s7 +; SI-NEXT: v_mov_b32_e32 v20, s9 +; SI-NEXT: v_mov_b32_e32 v18, s6 ; SI-NEXT: .LBB59_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v34 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v36 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v36 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v34 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v54 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v32 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v45 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v48 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v32 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v53 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v30 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v55 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v30 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v52 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v28 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v42 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v28 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v51 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v26 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v55 -; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v40 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v26 +; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v50 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v44 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v24 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v49 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v42 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v22 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v39 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v40 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v45 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v20 +; SI-NEXT: v_or_b32_e32 v14, v14, v16 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v38 +; SI-NEXT: v_or_b32_e32 v15, v15, v16 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v44 ; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v20 -; SI-NEXT: v_or_b32_e32 v14, v14, v16 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v51 -; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v54 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll index 8a8d3ae036a5c..77d392ad7db42 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll @@ -3406,6 +3406,9 @@ define inreg <40 x i16> @bitcast_v20i32_to_v40i16_scalar(<20 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[42:43], s[26:27], 16 ; SI-NEXT: s_lshr_b64 s[44:45], s[24:25], 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s72, s5, 16 ; SI-NEXT: s_lshr_b32 s73, s7, 16 ; SI-NEXT: s_lshr_b32 s74, s9, 16 @@ -3416,25 +3419,22 @@ define inreg <40 x i16> @bitcast_v20i32_to_v40i16_scalar(<20 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b32 s79, s21, 16 ; SI-NEXT: s_lshr_b32 s88, s19, 16 ; SI-NEXT: s_lshr_b32 s89, s17, 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 16 ; SI-NEXT: .LBB13_3: ; %end -; SI-NEXT: s_lshl_b32 s11, s60, 16 -; SI-NEXT: s_and_b32 s13, s16, 0xffff -; SI-NEXT: s_or_b32 s11, s13, s11 +; SI-NEXT: s_and_b32 s11, s16, 0xffff +; SI-NEXT: s_lshl_b32 s13, s60, 16 +; SI-NEXT: s_or_b32 s11, s11, s13 ; SI-NEXT: s_and_b32 s13, s17, 0xffff ; SI-NEXT: s_lshl_b32 s15, s89, 16 ; SI-NEXT: s_or_b32 s13, s13, s15 -; SI-NEXT: s_lshl_b32 s15, s58, 16 -; SI-NEXT: s_and_b32 s16, s18, 0xffff -; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_and_b32 s15, s18, 0xffff +; SI-NEXT: s_lshl_b32 s16, s58, 16 +; SI-NEXT: s_or_b32 s15, s15, s16 ; SI-NEXT: s_and_b32 s16, s19, 0xffff ; SI-NEXT: s_lshl_b32 s17, s88, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_lshl_b32 s17, s56, 16 -; SI-NEXT: s_and_b32 s18, s20, 0xffff -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_and_b32 s17, s20, 0xffff +; SI-NEXT: s_lshl_b32 s18, s56, 16 +; SI-NEXT: s_or_b32 s17, s17, s18 ; SI-NEXT: s_and_b32 s18, s21, 0xffff ; SI-NEXT: s_lshl_b32 s19, s79, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 @@ -6264,6 +6264,9 @@ define inreg <40 x half> @bitcast_v20i32_to_v40f16_scalar(<20 x i32> inreg %a, i ; SI-NEXT: s_lshr_b64 s[42:43], s[26:27], 16 ; SI-NEXT: s_lshr_b64 s[44:45], s[24:25], 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s72, s5, 16 ; SI-NEXT: s_lshr_b32 s73, s7, 16 ; SI-NEXT: s_lshr_b32 s74, s9, 16 @@ -6274,25 +6277,22 @@ define inreg <40 x half> @bitcast_v20i32_to_v40f16_scalar(<20 x i32> inreg %a, i ; SI-NEXT: s_lshr_b32 s79, s21, 16 ; SI-NEXT: s_lshr_b32 s88, s19, 16 ; SI-NEXT: s_lshr_b32 s89, s17, 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 16 ; SI-NEXT: .LBB17_3: ; %end -; SI-NEXT: s_lshl_b32 s11, s60, 16 -; SI-NEXT: s_and_b32 s13, s16, 0xffff -; SI-NEXT: s_or_b32 s11, s13, s11 +; SI-NEXT: s_and_b32 s11, s16, 0xffff +; SI-NEXT: s_lshl_b32 s13, s60, 16 +; SI-NEXT: s_or_b32 s11, s11, s13 ; SI-NEXT: s_and_b32 s13, s17, 0xffff ; SI-NEXT: s_lshl_b32 s15, s89, 16 ; SI-NEXT: s_or_b32 s13, s13, s15 -; SI-NEXT: s_lshl_b32 s15, s58, 16 -; SI-NEXT: s_and_b32 s16, s18, 0xffff -; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_and_b32 s15, s18, 0xffff +; SI-NEXT: s_lshl_b32 s16, s58, 16 +; SI-NEXT: s_or_b32 s15, s15, s16 ; SI-NEXT: s_and_b32 s16, s19, 0xffff ; SI-NEXT: s_lshl_b32 s17, s88, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_lshl_b32 s17, s56, 16 -; SI-NEXT: s_and_b32 s18, s20, 0xffff -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_and_b32 s17, s20, 0xffff +; SI-NEXT: s_lshl_b32 s18, s56, 16 +; SI-NEXT: s_or_b32 s17, s17, s18 ; SI-NEXT: s_and_b32 s18, s21, 0xffff ; SI-NEXT: s_lshl_b32 s19, s79, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 @@ -6939,10 +6939,10 @@ define <20 x i32> @bitcast_v40f16_to_v20i32(<40 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v43 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v58 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v42 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v58 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v41 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v57 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -7059,131 +7059,131 @@ define <20 x i32> @bitcast_v40f16_to_v20i32(<40 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v42 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v41 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v57 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v55 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v40 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v47 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v55 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v54 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v54 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v53 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v47 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v52 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v46 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v51 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v49 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v48 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_or_b32_e32 v7, v9, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_or_b32_e32 v8, v10, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v50 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v49 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v37 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 ; SI-NEXT: v_or_b32_e32 v10, v12, v10 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v37 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v39 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v35 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v34 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v13, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v32 ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_cvt_f32_f16_e32 v21, v32 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 @@ -8236,13 +8236,13 @@ define inreg <20 x i32> @bitcast_v40f16_to_v20i32_scalar(<40 x half> inreg %a, i ; VI-NEXT: .LBB19_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v19, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s35 -; VI-NEXT: v_mov_b32_e32 v2, s34 ; VI-NEXT: v_add_f16_sdwa v0, v0, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v19 -; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v19 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s34 +; VI-NEXT: v_add_f16_sdwa v1, v1, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v19 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s31 ; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v19 @@ -11451,16 +11451,16 @@ define inreg <40 x i16> @bitcast_v20f32_to_v40i16_scalar(<20 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[28:29], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[29:30], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 ; SI-NEXT: s_branch .LBB29_5 ; SI-NEXT: .LBB29_3: ; SI-NEXT: ; implicit-def: $sgpr60 @@ -11505,16 +11505,16 @@ define inreg <40 x i16> @bitcast_v20f32_to_v40i16_scalar(<20 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v17, s7 ; SI-NEXT: v_mov_b32_e32 v18, s4 ; SI-NEXT: v_mov_b32_e32 v19, s5 -; SI-NEXT: v_mov_b32_e32 v48, s72 -; SI-NEXT: v_mov_b32_e32 v39, s73 -; SI-NEXT: v_mov_b32_e32 v38, s74 -; SI-NEXT: v_mov_b32_e32 v37, s75 -; SI-NEXT: v_mov_b32_e32 v36, s76 -; SI-NEXT: v_mov_b32_e32 v35, s77 -; SI-NEXT: v_mov_b32_e32 v34, s78 -; SI-NEXT: v_mov_b32_e32 v33, s79 -; SI-NEXT: v_mov_b32_e32 v32, s88 -; SI-NEXT: v_mov_b32_e32 v31, s89 +; SI-NEXT: v_mov_b32_e32 v39, s72 +; SI-NEXT: v_mov_b32_e32 v38, s73 +; SI-NEXT: v_mov_b32_e32 v37, s74 +; SI-NEXT: v_mov_b32_e32 v36, s75 +; SI-NEXT: v_mov_b32_e32 v35, s76 +; SI-NEXT: v_mov_b32_e32 v34, s77 +; SI-NEXT: v_mov_b32_e32 v33, s78 +; SI-NEXT: v_mov_b32_e32 v32, s79 +; SI-NEXT: v_mov_b32_e32 v31, s88 +; SI-NEXT: v_mov_b32_e32 v30, s89 ; SI-NEXT: v_mov_b32_e32 v20, s10 ; SI-NEXT: v_mov_b32_e32 v21, s12 ; SI-NEXT: v_mov_b32_e32 v22, s14 @@ -11526,56 +11526,56 @@ define inreg <40 x i16> @bitcast_v20f32_to_v40i16_scalar(<20 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v28, s58 ; SI-NEXT: v_mov_b32_e32 v29, s60 ; SI-NEXT: .LBB29_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v0, v0, v29 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v39 ; SI-NEXT: v_or_b32_e32 v2, v2, v28 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v38 ; SI-NEXT: v_or_b32_e32 v4, v4, v27 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v37 ; SI-NEXT: v_or_b32_e32 v6, v6, v26 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v36 ; SI-NEXT: v_or_b32_e32 v8, v8, v25 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v35 ; SI-NEXT: v_or_b32_e32 v10, v10, v24 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v34 ; SI-NEXT: v_or_b32_e32 v12, v12, v23 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v33 ; SI-NEXT: v_or_b32_e32 v14, v14, v22 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v32 ; SI-NEXT: v_or_b32_e32 v16, v16, v21 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v31 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v30 ; SI-NEXT: v_or_b32_e32 v1, v1, v29 ; SI-NEXT: v_or_b32_e32 v3, v3, v28 ; SI-NEXT: v_or_b32_e32 v5, v5, v27 @@ -14527,16 +14527,16 @@ define inreg <40 x half> @bitcast_v20f32_to_v40f16_scalar(<20 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[28:29], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[29:30], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 ; SI-NEXT: s_branch .LBB33_5 ; SI-NEXT: .LBB33_3: ; SI-NEXT: ; implicit-def: $sgpr60 @@ -14581,16 +14581,16 @@ define inreg <40 x half> @bitcast_v20f32_to_v40f16_scalar(<20 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v17, s7 ; SI-NEXT: v_mov_b32_e32 v18, s4 ; SI-NEXT: v_mov_b32_e32 v19, s5 -; SI-NEXT: v_mov_b32_e32 v48, s72 -; SI-NEXT: v_mov_b32_e32 v39, s73 -; SI-NEXT: v_mov_b32_e32 v38, s74 -; SI-NEXT: v_mov_b32_e32 v37, s75 -; SI-NEXT: v_mov_b32_e32 v36, s76 -; SI-NEXT: v_mov_b32_e32 v35, s77 -; SI-NEXT: v_mov_b32_e32 v34, s78 -; SI-NEXT: v_mov_b32_e32 v33, s79 -; SI-NEXT: v_mov_b32_e32 v32, s88 -; SI-NEXT: v_mov_b32_e32 v31, s89 +; SI-NEXT: v_mov_b32_e32 v39, s72 +; SI-NEXT: v_mov_b32_e32 v38, s73 +; SI-NEXT: v_mov_b32_e32 v37, s74 +; SI-NEXT: v_mov_b32_e32 v36, s75 +; SI-NEXT: v_mov_b32_e32 v35, s76 +; SI-NEXT: v_mov_b32_e32 v34, s77 +; SI-NEXT: v_mov_b32_e32 v33, s78 +; SI-NEXT: v_mov_b32_e32 v32, s79 +; SI-NEXT: v_mov_b32_e32 v31, s88 +; SI-NEXT: v_mov_b32_e32 v30, s89 ; SI-NEXT: v_mov_b32_e32 v20, s10 ; SI-NEXT: v_mov_b32_e32 v21, s12 ; SI-NEXT: v_mov_b32_e32 v22, s14 @@ -14602,56 +14602,56 @@ define inreg <40 x half> @bitcast_v20f32_to_v40f16_scalar(<20 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v28, s58 ; SI-NEXT: v_mov_b32_e32 v29, s60 ; SI-NEXT: .LBB33_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v0, v0, v29 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v39 ; SI-NEXT: v_or_b32_e32 v2, v2, v28 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v38 ; SI-NEXT: v_or_b32_e32 v4, v4, v27 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v37 ; SI-NEXT: v_or_b32_e32 v6, v6, v26 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v36 ; SI-NEXT: v_or_b32_e32 v8, v8, v25 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v35 ; SI-NEXT: v_or_b32_e32 v10, v10, v24 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v34 ; SI-NEXT: v_or_b32_e32 v12, v12, v23 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v33 ; SI-NEXT: v_or_b32_e32 v14, v14, v22 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v32 ; SI-NEXT: v_or_b32_e32 v16, v16, v21 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v31 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v30 ; SI-NEXT: v_or_b32_e32 v1, v1, v29 ; SI-NEXT: v_or_b32_e32 v3, v3, v28 ; SI-NEXT: v_or_b32_e32 v5, v5, v27 @@ -15437,10 +15437,10 @@ define <20 x float> @bitcast_v40f16_to_v20f32(<40 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v43 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v58 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v42 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v58 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v41 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v57 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -15557,131 +15557,131 @@ define <20 x float> @bitcast_v40f16_to_v20f32(<40 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v42 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v41 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v57 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v55 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v40 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v47 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v55 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v54 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v54 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v53 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v47 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v52 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v46 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v51 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v49 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v48 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_or_b32_e32 v7, v9, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_or_b32_e32 v8, v10, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v50 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v49 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v37 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 ; SI-NEXT: v_or_b32_e32 v10, v12, v10 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v37 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v39 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v35 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v34 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v13, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v32 ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_cvt_f32_f16_e32 v21, v32 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 @@ -16734,13 +16734,13 @@ define inreg <20 x float> @bitcast_v40f16_to_v20f32_scalar(<40 x half> inreg %a, ; VI-NEXT: .LBB35_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v19, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s35 -; VI-NEXT: v_mov_b32_e32 v2, s34 ; VI-NEXT: v_add_f16_sdwa v0, v0, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v19 -; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v19 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s34 +; VI-NEXT: v_add_f16_sdwa v1, v1, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v19 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s31 ; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v19 @@ -18749,21 +18749,21 @@ define inreg <40 x i16> @bitcast_v10i64_to_v40i16_scalar(<10 x i64> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[58:59], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 16 ; SI-NEXT: .LBB41_3: ; %end -; SI-NEXT: s_lshl_b32 s11, s60, 16 -; SI-NEXT: s_and_b32 s13, s16, 0xffff -; SI-NEXT: s_or_b32 s11, s13, s11 +; SI-NEXT: s_and_b32 s11, s16, 0xffff +; SI-NEXT: s_lshl_b32 s13, s60, 16 +; SI-NEXT: s_or_b32 s11, s11, s13 ; SI-NEXT: s_and_b32 s13, s17, 0xffff ; SI-NEXT: s_lshl_b32 s15, s89, 16 ; SI-NEXT: s_or_b32 s13, s13, s15 -; SI-NEXT: s_lshl_b32 s15, s58, 16 -; SI-NEXT: s_and_b32 s16, s18, 0xffff -; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_and_b32 s15, s18, 0xffff +; SI-NEXT: s_lshl_b32 s16, s58, 16 +; SI-NEXT: s_or_b32 s15, s15, s16 ; SI-NEXT: s_and_b32 s16, s19, 0xffff ; SI-NEXT: s_lshl_b32 s17, s88, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_lshl_b32 s17, s56, 16 -; SI-NEXT: s_and_b32 s18, s20, 0xffff -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_and_b32 s17, s20, 0xffff +; SI-NEXT: s_lshl_b32 s18, s56, 16 +; SI-NEXT: s_or_b32 s17, s17, s18 ; SI-NEXT: s_and_b32 s18, s21, 0xffff ; SI-NEXT: s_lshl_b32 s19, s79, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 @@ -21617,21 +21617,21 @@ define inreg <40 x half> @bitcast_v10i64_to_v40f16_scalar(<10 x i64> inreg %a, i ; SI-NEXT: s_lshr_b64 s[58:59], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 16 ; SI-NEXT: .LBB45_3: ; %end -; SI-NEXT: s_lshl_b32 s11, s60, 16 -; SI-NEXT: s_and_b32 s13, s16, 0xffff -; SI-NEXT: s_or_b32 s11, s13, s11 +; SI-NEXT: s_and_b32 s11, s16, 0xffff +; SI-NEXT: s_lshl_b32 s13, s60, 16 +; SI-NEXT: s_or_b32 s11, s11, s13 ; SI-NEXT: s_and_b32 s13, s17, 0xffff ; SI-NEXT: s_lshl_b32 s15, s89, 16 ; SI-NEXT: s_or_b32 s13, s13, s15 -; SI-NEXT: s_lshl_b32 s15, s58, 16 -; SI-NEXT: s_and_b32 s16, s18, 0xffff -; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_and_b32 s15, s18, 0xffff +; SI-NEXT: s_lshl_b32 s16, s58, 16 +; SI-NEXT: s_or_b32 s15, s15, s16 ; SI-NEXT: s_and_b32 s16, s19, 0xffff ; SI-NEXT: s_lshl_b32 s17, s88, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_lshl_b32 s17, s56, 16 -; SI-NEXT: s_and_b32 s18, s20, 0xffff -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_and_b32 s17, s20, 0xffff +; SI-NEXT: s_lshl_b32 s18, s56, 16 +; SI-NEXT: s_or_b32 s17, s17, s18 ; SI-NEXT: s_and_b32 s18, s21, 0xffff ; SI-NEXT: s_lshl_b32 s19, s79, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 @@ -22278,10 +22278,10 @@ define <10 x i64> @bitcast_v40f16_to_v10i64(<40 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v43 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v58 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v42 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v58 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v41 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v57 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -22398,131 +22398,131 @@ define <10 x i64> @bitcast_v40f16_to_v10i64(<40 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v42 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v41 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v57 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v55 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v40 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v47 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v55 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v54 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v54 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v53 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v47 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v52 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v46 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v51 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v49 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v48 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_or_b32_e32 v7, v9, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_or_b32_e32 v8, v10, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v50 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v49 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v37 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 ; SI-NEXT: v_or_b32_e32 v10, v12, v10 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v37 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v39 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v35 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v34 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v13, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v32 ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_cvt_f32_f16_e32 v21, v32 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 @@ -23575,13 +23575,13 @@ define inreg <10 x i64> @bitcast_v40f16_to_v10i64_scalar(<40 x half> inreg %a, i ; VI-NEXT: .LBB47_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v19, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s35 -; VI-NEXT: v_mov_b32_e32 v2, s34 ; VI-NEXT: v_add_f16_sdwa v0, v0, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v19 -; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v19 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s34 +; VI-NEXT: v_add_f16_sdwa v1, v1, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v19 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s31 ; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v19 @@ -23980,24 +23980,24 @@ define <40 x i16> @bitcast_v10f64_to_v40i16(<10 x double> %a, i32 %b) #0 { ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v20 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr29 +; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr23 -; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc @@ -24011,15 +24011,15 @@ define <40 x i16> @bitcast_v10f64_to_v40i16(<10 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v24, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v25, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v26, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v29, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v32, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v35, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v28, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v31, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v34, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v17 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v13 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v3 @@ -24045,33 +24045,33 @@ define <40 x i16> @bitcast_v10f64_to_v40i16(<10 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v24, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v25, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v26, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v29, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v32, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v35, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v28, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v31, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v34, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v17 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v13 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 ; SI-NEXT: .LBB48_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 @@ -24080,39 +24080,39 @@ define <40 x i16> @bitcast_v10f64_to_v40i16(<10 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_or_b32_e32 v0, v0, v35 +; SI-NEXT: v_or_b32_e32 v0, v0, v34 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v39 -; SI-NEXT: v_or_b32_e32 v2, v2, v32 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v39 +; SI-NEXT: v_or_b32_e32 v2, v2, v31 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v38 -; SI-NEXT: v_or_b32_e32 v4, v4, v29 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v38 +; SI-NEXT: v_or_b32_e32 v4, v4, v28 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v37 ; SI-NEXT: v_or_b32_e32 v6, v6, v26 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v36 ; SI-NEXT: v_or_b32_e32 v8, v8, v25 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v35 ; SI-NEXT: v_or_b32_e32 v10, v10, v24 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v33 ; SI-NEXT: v_or_b32_e32 v12, v12, v23 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v32 ; SI-NEXT: v_or_b32_e32 v14, v14, v22 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v30 ; SI-NEXT: v_or_b32_e32 v16, v16, v21 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v29 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v27 -; SI-NEXT: v_or_b32_e32 v1, v1, v35 -; SI-NEXT: v_or_b32_e32 v3, v3, v32 -; SI-NEXT: v_or_b32_e32 v5, v5, v29 +; SI-NEXT: v_or_b32_e32 v1, v1, v34 +; SI-NEXT: v_or_b32_e32 v3, v3, v31 +; SI-NEXT: v_or_b32_e32 v5, v5, v28 ; SI-NEXT: v_or_b32_e32 v7, v7, v26 ; SI-NEXT: v_or_b32_e32 v9, v9, v25 ; SI-NEXT: v_or_b32_e32 v11, v11, v24 @@ -24555,8 +24555,8 @@ define inreg <40 x i16> @bitcast_v10f64_to_v40i16_scalar(<10 x double> inreg %a, ; SI-NEXT: v_lshr_b64 v[25:26], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[26:27], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[27:28], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[28:29], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[29:30], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v19 @@ -24568,7 +24568,7 @@ define inreg <40 x i16> @bitcast_v10f64_to_v40i16_scalar(<10 x double> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 ; SI-NEXT: s_branch .LBB49_5 ; SI-NEXT: .LBB49_3: ; SI-NEXT: ; implicit-def: $sgpr60 @@ -24593,12 +24593,6 @@ define inreg <40 x i16> @bitcast_v10f64_to_v40i16_scalar(<10 x double> inreg %a, ; SI-NEXT: ; implicit-def: $sgpr89 ; SI-NEXT: s_branch .LBB49_2 ; SI-NEXT: .LBB49_4: -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v4, s20 ; SI-NEXT: v_mov_b32_e32 v19, s9 ; SI-NEXT: v_mov_b32_e32 v17, s7 ; SI-NEXT: v_mov_b32_e32 v15, s5 @@ -24606,6 +24600,12 @@ define inreg <40 x i16> @bitcast_v10f64_to_v40i16_scalar(<10 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v4, s20 ; SI-NEXT: v_mov_b32_e32 v6, s22 ; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v10, s26 @@ -24622,7 +24622,7 @@ define inreg <40 x i16> @bitcast_v10f64_to_v40i16_scalar(<10 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v37, s75 ; SI-NEXT: v_mov_b32_e32 v38, s74 ; SI-NEXT: v_mov_b32_e32 v39, s73 -; SI-NEXT: v_mov_b32_e32 v48, s72 +; SI-NEXT: v_mov_b32_e32 v30, s72 ; SI-NEXT: v_mov_b32_e32 v29, s60 ; SI-NEXT: v_mov_b32_e32 v28, s58 ; SI-NEXT: v_mov_b32_e32 v27, s56 @@ -24634,12 +24634,12 @@ define inreg <40 x i16> @bitcast_v10f64_to_v40i16_scalar(<10 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v21, s12 ; SI-NEXT: v_mov_b32_e32 v20, s10 ; SI-NEXT: .LBB49_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 @@ -24656,7 +24656,7 @@ define inreg <40 x i16> @bitcast_v10f64_to_v40i16_scalar(<10 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v0, v0, v29 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v30 ; SI-NEXT: v_or_b32_e32 v2, v2, v28 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39 @@ -26976,24 +26976,24 @@ define <40 x half> @bitcast_v10f64_to_v40f16(<10 x double> %a, i32 %b) #0 { ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v20 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr29 +; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr23 -; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc @@ -27007,15 +27007,15 @@ define <40 x half> @bitcast_v10f64_to_v40f16(<10 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v24, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v25, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v26, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v29, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v32, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v35, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v28, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v31, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v34, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v17 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v13 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v3 @@ -27041,33 +27041,33 @@ define <40 x half> @bitcast_v10f64_to_v40f16(<10 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v24, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v25, v9, v8, 16 ; SI-NEXT: v_alignbit_b32 v26, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v29, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v32, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v35, v1, v0, 16 +; SI-NEXT: v_alignbit_b32 v28, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v31, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v34, v1, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v17 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v13 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 ; SI-NEXT: .LBB52_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 @@ -27076,39 +27076,39 @@ define <40 x half> @bitcast_v10f64_to_v40f16(<10 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_or_b32_e32 v0, v0, v35 +; SI-NEXT: v_or_b32_e32 v0, v0, v34 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v39 -; SI-NEXT: v_or_b32_e32 v2, v2, v32 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v39 +; SI-NEXT: v_or_b32_e32 v2, v2, v31 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v38 -; SI-NEXT: v_or_b32_e32 v4, v4, v29 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v38 +; SI-NEXT: v_or_b32_e32 v4, v4, v28 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v37 ; SI-NEXT: v_or_b32_e32 v6, v6, v26 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v36 ; SI-NEXT: v_or_b32_e32 v8, v8, v25 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v35 ; SI-NEXT: v_or_b32_e32 v10, v10, v24 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v33 ; SI-NEXT: v_or_b32_e32 v12, v12, v23 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v32 ; SI-NEXT: v_or_b32_e32 v14, v14, v22 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v30 ; SI-NEXT: v_or_b32_e32 v16, v16, v21 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v29 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v27 -; SI-NEXT: v_or_b32_e32 v1, v1, v35 -; SI-NEXT: v_or_b32_e32 v3, v3, v32 -; SI-NEXT: v_or_b32_e32 v5, v5, v29 +; SI-NEXT: v_or_b32_e32 v1, v1, v34 +; SI-NEXT: v_or_b32_e32 v3, v3, v31 +; SI-NEXT: v_or_b32_e32 v5, v5, v28 ; SI-NEXT: v_or_b32_e32 v7, v7, v26 ; SI-NEXT: v_or_b32_e32 v9, v9, v25 ; SI-NEXT: v_or_b32_e32 v11, v11, v24 @@ -27551,8 +27551,8 @@ define inreg <40 x half> @bitcast_v10f64_to_v40f16_scalar(<10 x double> inreg %a ; SI-NEXT: v_lshr_b64 v[25:26], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[26:27], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[27:28], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[28:29], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[29:30], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v19 @@ -27564,7 +27564,7 @@ define inreg <40 x half> @bitcast_v10f64_to_v40f16_scalar(<10 x double> inreg %a ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 ; SI-NEXT: s_branch .LBB53_5 ; SI-NEXT: .LBB53_3: ; SI-NEXT: ; implicit-def: $sgpr60 @@ -27589,12 +27589,6 @@ define inreg <40 x half> @bitcast_v10f64_to_v40f16_scalar(<10 x double> inreg %a ; SI-NEXT: ; implicit-def: $sgpr89 ; SI-NEXT: s_branch .LBB53_2 ; SI-NEXT: .LBB53_4: -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v4, s20 ; SI-NEXT: v_mov_b32_e32 v19, s9 ; SI-NEXT: v_mov_b32_e32 v17, s7 ; SI-NEXT: v_mov_b32_e32 v15, s5 @@ -27602,6 +27596,12 @@ define inreg <40 x half> @bitcast_v10f64_to_v40f16_scalar(<10 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v4, s20 ; SI-NEXT: v_mov_b32_e32 v6, s22 ; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v10, s26 @@ -27618,7 +27618,7 @@ define inreg <40 x half> @bitcast_v10f64_to_v40f16_scalar(<10 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v37, s75 ; SI-NEXT: v_mov_b32_e32 v38, s74 ; SI-NEXT: v_mov_b32_e32 v39, s73 -; SI-NEXT: v_mov_b32_e32 v48, s72 +; SI-NEXT: v_mov_b32_e32 v30, s72 ; SI-NEXT: v_mov_b32_e32 v29, s60 ; SI-NEXT: v_mov_b32_e32 v28, s58 ; SI-NEXT: v_mov_b32_e32 v27, s56 @@ -27630,12 +27630,12 @@ define inreg <40 x half> @bitcast_v10f64_to_v40f16_scalar(<10 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v21, s12 ; SI-NEXT: v_mov_b32_e32 v20, s10 ; SI-NEXT: .LBB53_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 @@ -27652,7 +27652,7 @@ define inreg <40 x half> @bitcast_v10f64_to_v40f16_scalar(<10 x double> inreg %a ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: v_or_b32_e32 v0, v0, v29 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v30 ; SI-NEXT: v_or_b32_e32 v2, v2, v28 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39 @@ -28425,10 +28425,10 @@ define <10 x double> @bitcast_v40f16_to_v10f64(<40 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v43 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v58 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v42 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v58 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v41 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v57 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -28545,131 +28545,131 @@ define <10 x double> @bitcast_v40f16_to_v10f64(<40 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v58 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v42 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v41 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v57 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v55 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v40 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v47 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v55 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v54 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v54 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v53 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v47 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v52 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v46 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v51 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v49 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v48 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_or_b32_e32 v7, v9, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_or_b32_e32 v8, v10, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v50 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v49 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v37 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_or_b32_e32 v9, v10, v9 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 ; SI-NEXT: v_or_b32_e32 v10, v12, v10 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v37 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v39 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v35 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v34 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v13, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v39 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v32 ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_cvt_f32_f16_e32 v21, v32 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v13, v12 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 @@ -29722,13 +29722,13 @@ define inreg <10 x double> @bitcast_v40f16_to_v10f64_scalar(<40 x half> inreg %a ; VI-NEXT: .LBB55_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v19, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s35 -; VI-NEXT: v_mov_b32_e32 v2, s34 ; VI-NEXT: v_add_f16_sdwa v0, v0, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v19 -; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v19 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s34 +; VI-NEXT: v_add_f16_sdwa v1, v1, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v19 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s31 ; VI-NEXT: v_add_f16_sdwa v2, v2, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v19 @@ -31020,206 +31020,231 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i ; SI-NEXT: v_writelane_b32 v20, s69, 19 ; SI-NEXT: v_writelane_b32 v20, s70, 20 ; SI-NEXT: v_writelane_b32 v20, s71, 21 -; SI-NEXT: v_writelane_b32 v20, s30, 22 -; SI-NEXT: v_writelane_b32 v20, s31, 23 -; SI-NEXT: v_readfirstlane_b32 s69, v5 -; SI-NEXT: v_readfirstlane_b32 s71, v4 -; SI-NEXT: v_readfirstlane_b32 s66, v3 -; SI-NEXT: v_readfirstlane_b32 s68, v2 -; SI-NEXT: v_readfirstlane_b32 s55, v1 -; SI-NEXT: v_readfirstlane_b32 s65, v0 -; SI-NEXT: s_lshr_b32 s36, s29, 16 -; SI-NEXT: s_lshr_b32 s54, s28, 16 -; SI-NEXT: s_lshr_b32 s35, s27, 16 -; SI-NEXT: s_lshr_b32 s53, s26, 16 -; SI-NEXT: s_lshr_b32 s34, s25, 16 -; SI-NEXT: s_lshr_b32 s52, s24, 16 -; SI-NEXT: s_lshr_b32 s31, s23, 16 -; SI-NEXT: s_lshr_b32 s51, s22, 16 -; SI-NEXT: s_lshr_b32 s30, s21, 16 -; SI-NEXT: s_lshr_b32 s50, s20, 16 -; SI-NEXT: s_lshr_b32 s95, s19, 16 -; SI-NEXT: s_lshr_b32 s49, s18, 16 -; SI-NEXT: s_lshr_b32 s94, s17, 16 -; SI-NEXT: s_lshr_b32 s48, s16, 16 -; SI-NEXT: s_lshr_b32 s39, s69, 16 -; SI-NEXT: s_lshr_b32 s70, s71, 16 -; SI-NEXT: s_lshr_b32 s38, s66, 16 -; SI-NEXT: s_lshr_b32 s67, s68, 16 -; SI-NEXT: s_lshr_b32 s37, s55, 16 -; SI-NEXT: s_lshr_b32 s64, s65, 16 +; SI-NEXT: v_writelane_b32 v20, s80, 22 +; SI-NEXT: v_writelane_b32 v20, s81, 23 +; SI-NEXT: v_writelane_b32 v20, s82, 24 +; SI-NEXT: v_writelane_b32 v20, s83, 25 +; SI-NEXT: v_writelane_b32 v20, s84, 26 +; SI-NEXT: v_writelane_b32 v20, s85, 27 +; SI-NEXT: v_writelane_b32 v20, s86, 28 +; SI-NEXT: v_writelane_b32 v20, s87, 29 +; SI-NEXT: v_writelane_b32 v20, s96, 30 +; SI-NEXT: v_writelane_b32 v20, s97, 31 +; SI-NEXT: v_writelane_b32 v20, s98, 32 +; SI-NEXT: v_writelane_b32 v20, s99, 33 +; SI-NEXT: v_writelane_b32 v20, s30, 34 +; SI-NEXT: v_writelane_b32 v20, s31, 35 +; SI-NEXT: v_readfirstlane_b32 s85, v5 +; SI-NEXT: v_readfirstlane_b32 s87, v4 +; SI-NEXT: v_readfirstlane_b32 s82, v3 +; SI-NEXT: v_readfirstlane_b32 s84, v2 +; SI-NEXT: v_readfirstlane_b32 s97, v1 +; SI-NEXT: v_readfirstlane_b32 s99, v0 +; SI-NEXT: s_lshr_b32 s70, s29, 16 +; SI-NEXT: s_lshr_b32 s96, s28, 16 +; SI-NEXT: s_lshr_b32 s69, s27, 16 +; SI-NEXT: s_lshr_b32 s75, s26, 16 +; SI-NEXT: s_lshr_b32 s68, s25, 16 +; SI-NEXT: s_lshr_b32 s73, s24, 16 +; SI-NEXT: s_lshr_b32 s67, s23, 16 +; SI-NEXT: s_lshr_b32 s63, s22, 16 +; SI-NEXT: s_lshr_b32 s66, s21, 16 +; SI-NEXT: s_lshr_b32 s61, s20, 16 +; SI-NEXT: s_lshr_b32 s65, s19, 16 +; SI-NEXT: s_lshr_b32 s59, s18, 16 +; SI-NEXT: s_lshr_b32 s64, s17, 16 +; SI-NEXT: s_lshr_b32 s57, s16, 16 +; SI-NEXT: s_lshr_b32 s81, s85, 16 +; SI-NEXT: s_lshr_b32 s86, s87, 16 +; SI-NEXT: s_lshr_b32 s80, s82, 16 +; SI-NEXT: s_lshr_b32 s83, s84, 16 +; SI-NEXT: s_lshr_b32 s71, s97, 16 +; SI-NEXT: s_lshr_b32 s98, s99, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v6 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB57_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s7, s94, 16 -; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s56, s48, 16 -; SI-NEXT: s_or_b32 s57, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s64, 16 +; SI-NEXT: s_lshl_b32 s52, s57, 16 +; SI-NEXT: s_or_b32 s53, s5, s7 +; SI-NEXT: s_mov_b32 s5, s57 +; SI-NEXT: s_lshr_b64 s[56:57], s[52:53], 16 +; SI-NEXT: s_mov_b32 s57, s5 ; SI-NEXT: s_and_b32 s5, s19, 0xffff -; SI-NEXT: s_lshl_b32 s7, s95, 16 -; SI-NEXT: s_or_b32 s42, s4, s56 -; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s58, s49, 16 -; SI-NEXT: s_or_b32 s59, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s65, 16 +; SI-NEXT: s_lshl_b32 s50, s59, 16 +; SI-NEXT: s_or_b32 s51, s5, s7 +; SI-NEXT: s_mov_b32 s5, s59 +; SI-NEXT: s_lshr_b64 s[58:59], s[50:51], 16 +; SI-NEXT: s_mov_b32 s59, s5 ; SI-NEXT: s_and_b32 s5, s21, 0xffff -; SI-NEXT: s_lshl_b32 s7, s30, 16 -; SI-NEXT: s_or_b32 s40, s4, s58 -; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s60, s50, 16 -; SI-NEXT: s_or_b32 s61, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s66, 16 +; SI-NEXT: s_lshl_b32 s48, s61, 16 +; SI-NEXT: s_or_b32 s49, s5, s7 +; SI-NEXT: s_mov_b32 s5, s61 +; SI-NEXT: s_lshr_b64 s[60:61], s[48:49], 16 +; SI-NEXT: s_mov_b32 s61, s5 ; SI-NEXT: s_and_b32 s5, s23, 0xffff -; SI-NEXT: s_lshl_b32 s7, s31, 16 -; SI-NEXT: s_or_b32 s14, s4, s60 -; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s62, s51, 16 -; SI-NEXT: s_or_b32 s63, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s67, 16 +; SI-NEXT: s_lshl_b32 s38, s63, 16 +; SI-NEXT: s_or_b32 s39, s5, s7 +; SI-NEXT: s_mov_b32 s5, s63 +; SI-NEXT: s_lshr_b64 s[62:63], s[38:39], 16 +; SI-NEXT: s_mov_b32 s63, s5 ; SI-NEXT: s_and_b32 s5, s25, 0xffff -; SI-NEXT: s_lshl_b32 s7, s34, 16 -; SI-NEXT: s_or_b32 s12, s4, s62 -; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s72, s52, 16 -; SI-NEXT: s_or_b32 s73, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s68, 16 +; SI-NEXT: s_and_b32 s4, s16, 0xffff +; SI-NEXT: s_lshl_b32 s36, s73, 16 +; SI-NEXT: s_or_b32 s37, s5, s7 +; SI-NEXT: s_or_b32 s46, s4, s52 +; SI-NEXT: s_and_b32 s4, s18, 0xffff +; SI-NEXT: s_mov_b32 s5, s73 +; SI-NEXT: s_lshr_b64 s[72:73], s[36:37], 16 +; SI-NEXT: s_or_b32 s44, s4, s50 +; SI-NEXT: s_and_b32 s4, s20, 0xffff +; SI-NEXT: s_mov_b32 s73, s5 ; SI-NEXT: s_and_b32 s5, s27, 0xffff -; SI-NEXT: s_lshl_b32 s7, s35, 16 -; SI-NEXT: s_or_b32 s10, s4, s72 +; SI-NEXT: s_lshl_b32 s7, s69, 16 +; SI-NEXT: s_or_b32 s42, s4, s48 +; SI-NEXT: s_and_b32 s4, s22, 0xffff +; SI-NEXT: s_lshl_b32 s34, s75, 16 +; SI-NEXT: s_or_b32 s35, s5, s7 +; SI-NEXT: s_or_b32 s40, s4, s38 +; SI-NEXT: s_and_b32 s4, s24, 0xffff +; SI-NEXT: s_mov_b32 s5, s75 +; SI-NEXT: s_lshr_b64 s[74:75], s[34:35], 16 +; SI-NEXT: s_or_b32 s14, s4, s36 ; SI-NEXT: s_and_b32 s4, s26, 0xffff -; SI-NEXT: s_lshl_b32 s74, s53, 16 -; SI-NEXT: s_or_b32 s75, s5, s7 +; SI-NEXT: s_mov_b32 s75, s5 ; SI-NEXT: s_and_b32 s5, s29, 0xffff -; SI-NEXT: s_lshl_b32 s7, s36, 16 -; SI-NEXT: s_or_b32 s8, s4, s74 +; SI-NEXT: s_lshl_b32 s7, s70, 16 +; SI-NEXT: s_or_b32 s12, s4, s34 ; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s76, s54, 16 -; SI-NEXT: s_or_b32 s77, s5, s7 -; SI-NEXT: s_and_b32 s5, s55, 0xffff -; SI-NEXT: s_lshl_b32 s7, s37, 16 -; SI-NEXT: s_or_b32 s6, s4, s76 -; SI-NEXT: s_and_b32 s4, s65, 0xffff -; SI-NEXT: s_lshl_b32 s46, s64, 16 -; SI-NEXT: s_or_b32 s47, s5, s7 -; SI-NEXT: s_and_b32 s5, s66, 0xffff -; SI-NEXT: s_lshl_b32 s7, s38, 16 -; SI-NEXT: s_or_b32 s4, s4, s46 -; SI-NEXT: s_lshl_b32 s44, s67, 16 -; SI-NEXT: s_or_b32 s45, s5, s7 -; SI-NEXT: s_and_b32 s5, s69, 0xffff -; SI-NEXT: s_lshl_b32 s7, s39, 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[46:47], 16 -; SI-NEXT: s_and_b32 s46, s68, 0xffff -; SI-NEXT: s_or_b32 s91, s5, s7 -; SI-NEXT: s_lshl_b32 s90, s70, 16 -; SI-NEXT: s_or_b32 s46, s46, s44 -; SI-NEXT: s_lshr_b64 s[88:89], s[44:45], 16 -; SI-NEXT: s_and_b32 s44, s71, 0xffff -; SI-NEXT: s_mov_b32 s43, s57 -; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16 -; SI-NEXT: s_mov_b32 s41, s59 -; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16 -; SI-NEXT: s_mov_b32 s15, s61 -; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16 -; SI-NEXT: s_mov_b32 s13, s63 -; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16 -; SI-NEXT: s_mov_b32 s11, s73 -; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16 -; SI-NEXT: s_mov_b32 s9, s75 -; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16 -; SI-NEXT: s_mov_b32 s7, s77 -; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16 -; SI-NEXT: s_mov_b32 s5, s47 -; SI-NEXT: s_mov_b32 s47, s45 -; SI-NEXT: s_or_b32 s44, s44, s90 -; SI-NEXT: s_mov_b32 s45, s91 -; SI-NEXT: s_lshr_b64 s[90:91], s[90:91], 16 +; SI-NEXT: s_lshl_b32 s30, s96, 16 +; SI-NEXT: s_or_b32 s31, s5, s7 +; SI-NEXT: s_and_b32 s5, s97, 0xffff +; SI-NEXT: s_lshl_b32 s7, s71, 16 +; SI-NEXT: s_or_b32 s10, s4, s30 +; SI-NEXT: s_and_b32 s4, s99, 0xffff +; SI-NEXT: s_lshl_b32 vcc_lo, s98, 16 +; SI-NEXT: s_or_b32 vcc_hi, s5, s7 +; SI-NEXT: s_and_b32 s5, s82, 0xffff +; SI-NEXT: s_lshl_b32 s7, s80, 16 +; SI-NEXT: s_or_b32 s8, s4, vcc_lo +; SI-NEXT: s_and_b32 s4, s84, 0xffff +; SI-NEXT: s_lshl_b32 s94, s83, 16 +; SI-NEXT: s_or_b32 s95, s5, s7 +; SI-NEXT: s_and_b32 s5, s85, 0xffff +; SI-NEXT: s_lshl_b32 s7, s81, 16 +; SI-NEXT: s_or_b32 s6, s4, s94 +; SI-NEXT: s_and_b32 s4, s87, 0xffff +; SI-NEXT: s_lshl_b32 s92, s86, 16 +; SI-NEXT: s_or_b32 s93, s5, s7 +; SI-NEXT: s_or_b32 s4, s4, s92 +; SI-NEXT: s_lshr_b64 s[76:77], s[30:31], 16 +; SI-NEXT: s_lshr_b64 s[78:79], vcc, 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[94:95], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[92:93], 16 +; SI-NEXT: s_mov_b64 s[54:55], 0 +; SI-NEXT: s_mov_b32 s47, s53 +; SI-NEXT: s_mov_b32 s45, s51 +; SI-NEXT: s_mov_b32 s43, s49 +; SI-NEXT: s_mov_b32 s41, s39 +; SI-NEXT: s_mov_b32 s15, s37 +; SI-NEXT: s_mov_b32 s13, s35 +; SI-NEXT: s_mov_b32 s11, s31 +; SI-NEXT: s_mov_b32 s9, vcc_hi +; SI-NEXT: s_mov_b32 s7, s95 +; SI-NEXT: s_mov_b32 s5, s93 ; SI-NEXT: s_cbranch_execnz .LBB57_3 ; SI-NEXT: .LBB57_2: ; %cmp.true -; SI-NEXT: s_add_i32 s71, s71, 3 -; SI-NEXT: s_and_b32 s4, s71, 0xffff -; SI-NEXT: s_lshl_b32 s5, s70, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s69, s69, 3 -; SI-NEXT: s_add_i32 s44, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s69, 0xffff -; SI-NEXT: s_lshl_b32 s5, s39, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s68, s68, 3 -; SI-NEXT: s_add_i32 s45, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s68, 0xffff -; SI-NEXT: s_lshl_b32 s5, s67, 16 +; SI-NEXT: s_add_i32 s87, s87, 3 +; SI-NEXT: s_and_b32 s4, s87, 0xffff +; SI-NEXT: s_lshl_b32 s5, s86, 16 +; SI-NEXT: s_add_i32 s85, s85, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s66, s66, 3 -; SI-NEXT: s_add_i32 s46, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s66, 0xffff -; SI-NEXT: s_lshl_b32 s5, s38, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s65, s65, 3 -; SI-NEXT: s_add_i32 s47, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s65, 0xffff -; SI-NEXT: s_lshl_b32 s5, s64, 16 -; SI-NEXT: s_add_i32 s55, s55, 3 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s55, 0xffff -; SI-NEXT: s_lshl_b32 s6, s37, 16 -; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: s_and_b32 s5, s85, 0xffff +; SI-NEXT: s_lshl_b32 s6, s81, 16 +; SI-NEXT: s_add_i32 s84, s84, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s28, 0xffff -; SI-NEXT: s_lshl_b32 s7, s54, 16 -; SI-NEXT: s_add_i32 s29, s29, 3 +; SI-NEXT: s_and_b32 s6, s84, 0xffff +; SI-NEXT: s_lshl_b32 s7, s83, 16 +; SI-NEXT: s_add_i32 s82, s82, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s29, 0xffff -; SI-NEXT: s_lshl_b32 s8, s36, 16 -; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: s_and_b32 s7, s82, 0xffff +; SI-NEXT: s_lshl_b32 s8, s80, 16 +; SI-NEXT: s_add_i32 s99, s99, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s26, 0xffff -; SI-NEXT: s_lshl_b32 s9, s53, 16 -; SI-NEXT: s_add_i32 s27, s27, 3 +; SI-NEXT: s_and_b32 s8, s99, 0xffff +; SI-NEXT: s_lshl_b32 s9, s98, 16 +; SI-NEXT: s_add_i32 s97, s97, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s27, 0xffff -; SI-NEXT: s_lshl_b32 s10, s35, 16 -; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: s_and_b32 s9, s97, 0xffff +; SI-NEXT: s_lshl_b32 s10, s71, 16 +; SI-NEXT: s_add_i32 s28, s28, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s24, 0xffff -; SI-NEXT: s_lshl_b32 s11, s52, 16 -; SI-NEXT: s_add_i32 s25, s25, 3 +; SI-NEXT: s_and_b32 s10, s28, 0xffff +; SI-NEXT: s_lshl_b32 s11, s96, 16 +; SI-NEXT: s_add_i32 s29, s29, 3 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s25, 0xffff -; SI-NEXT: s_lshl_b32 s12, s34, 16 -; SI-NEXT: s_add_i32 s22, s22, 3 +; SI-NEXT: s_and_b32 s11, s29, 0xffff +; SI-NEXT: s_lshl_b32 s12, s70, 16 +; SI-NEXT: s_add_i32 s26, s26, 3 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s12, s22, 0xffff -; SI-NEXT: s_lshl_b32 s13, s51, 16 -; SI-NEXT: s_add_i32 s23, s23, 3 +; SI-NEXT: s_and_b32 s12, s26, 0xffff +; SI-NEXT: s_lshl_b32 s13, s75, 16 +; SI-NEXT: s_add_i32 s27, s27, 3 ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s13, s23, 0xffff -; SI-NEXT: s_lshl_b32 s14, s31, 16 -; SI-NEXT: s_add_i32 s20, s20, 3 +; SI-NEXT: s_and_b32 s13, s27, 0xffff +; SI-NEXT: s_lshl_b32 s14, s69, 16 +; SI-NEXT: s_add_i32 s24, s24, 3 ; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: s_and_b32 s14, s20, 0xffff -; SI-NEXT: s_lshl_b32 s15, s50, 16 -; SI-NEXT: s_add_i32 s21, s21, 3 +; SI-NEXT: s_and_b32 s14, s24, 0xffff +; SI-NEXT: s_lshl_b32 s15, s73, 16 +; SI-NEXT: s_add_i32 s25, s25, 3 ; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_and_b32 s15, s21, 0xffff -; SI-NEXT: s_lshl_b32 s20, s30, 16 +; SI-NEXT: s_and_b32 s15, s25, 0xffff +; SI-NEXT: s_lshl_b32 s24, s68, 16 +; SI-NEXT: s_add_i32 s22, s22, 3 +; SI-NEXT: s_or_b32 s15, s24, s15 +; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s24, s63, 16 +; SI-NEXT: s_or_b32 s22, s24, s22 +; SI-NEXT: s_add_i32 s23, s23, 3 +; SI-NEXT: s_add_i32 s40, s22, 0x30000 +; SI-NEXT: s_and_b32 s22, s23, 0xffff +; SI-NEXT: s_lshl_b32 s23, s67, 16 +; SI-NEXT: s_or_b32 s22, s23, s22 +; SI-NEXT: s_add_i32 s20, s20, 3 +; SI-NEXT: s_add_i32 s41, s22, 0x30000 +; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s22, s61, 16 +; SI-NEXT: s_or_b32 s20, s22, s20 +; SI-NEXT: s_add_i32 s21, s21, 3 +; SI-NEXT: s_add_i32 s42, s20, 0x30000 +; SI-NEXT: s_and_b32 s20, s21, 0xffff +; SI-NEXT: s_lshl_b32 s21, s66, 16 +; SI-NEXT: s_or_b32 s20, s21, s20 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s15, s20, s15 +; SI-NEXT: s_add_i32 s43, s20, 0x30000 ; SI-NEXT: s_and_b32 s18, s18, 0xffff -; SI-NEXT: s_lshl_b32 s20, s49, 16 +; SI-NEXT: s_lshl_b32 s20, s59, 16 ; SI-NEXT: s_or_b32 s18, s20, s18 ; SI-NEXT: s_add_i32 s19, s19, 3 -; SI-NEXT: s_add_i32 s40, s18, 0x30000 +; SI-NEXT: s_add_i32 s44, s18, 0x30000 ; SI-NEXT: s_and_b32 s18, s19, 0xffff -; SI-NEXT: s_lshl_b32 s19, s95, 16 +; SI-NEXT: s_lshl_b32 s19, s65, 16 ; SI-NEXT: s_or_b32 s18, s19, s18 ; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_add_i32 s41, s18, 0x30000 +; SI-NEXT: s_add_i32 s45, s18, 0x30000 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_lshl_b32 s18, s48, 16 +; SI-NEXT: s_lshl_b32 s18, s57, 16 ; SI-NEXT: s_or_b32 s16, s18, s16 ; SI-NEXT: s_add_i32 s17, s17, 3 -; SI-NEXT: s_add_i32 s42, s16, 0x30000 +; SI-NEXT: s_add_i32 s46, s16, 0x30000 ; SI-NEXT: s_and_b32 s16, s17, 0xffff -; SI-NEXT: s_lshl_b32 s17, s94, 16 +; SI-NEXT: s_lshl_b32 s17, s64, 16 ; SI-NEXT: s_or_b32 s16, s17, s16 ; SI-NEXT: s_add_i32 s4, s4, 0x30000 ; SI-NEXT: s_add_i32 s5, s5, 0x30000 @@ -31233,110 +31258,122 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i ; SI-NEXT: s_add_i32 s13, s13, 0x30000 ; SI-NEXT: s_add_i32 s14, s14, 0x30000 ; SI-NEXT: s_add_i32 s15, s15, 0x30000 -; SI-NEXT: s_add_i32 s43, s16, 0x30000 -; SI-NEXT: s_lshr_b64 s[56:57], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[46:47], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[44:45], 16 -; SI-NEXT: s_lshr_b32 s94, s43, 16 -; SI-NEXT: s_lshr_b32 s95, s41, 16 -; SI-NEXT: s_lshr_b32 s30, s15, 16 -; SI-NEXT: s_lshr_b32 s31, s13, 16 -; SI-NEXT: s_lshr_b32 s34, s11, 16 -; SI-NEXT: s_lshr_b32 s35, s9, 16 -; SI-NEXT: s_lshr_b32 s36, s7, 16 -; SI-NEXT: s_lshr_b32 s37, s5, 16 -; SI-NEXT: s_lshr_b32 s38, s47, 16 -; SI-NEXT: s_lshr_b32 s39, s45, 16 +; SI-NEXT: s_add_i32 s47, s16, 0x30000 +; SI-NEXT: s_lshr_b64 s[56:57], s[46:47], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[4:5], 16 +; SI-NEXT: s_lshr_b32 s64, s47, 16 +; SI-NEXT: s_lshr_b32 s65, s45, 16 +; SI-NEXT: s_lshr_b32 s66, s43, 16 +; SI-NEXT: s_lshr_b32 s67, s41, 16 +; SI-NEXT: s_lshr_b32 s68, s15, 16 +; SI-NEXT: s_lshr_b32 s69, s13, 16 +; SI-NEXT: s_lshr_b32 s70, s11, 16 +; SI-NEXT: s_lshr_b32 s71, s9, 16 +; SI-NEXT: s_lshr_b32 s80, s7, 16 +; SI-NEXT: s_lshr_b32 s81, s5, 16 ; SI-NEXT: .LBB57_3: ; %end -; SI-NEXT: s_and_b32 s16, s42, 0xffff +; SI-NEXT: s_and_b32 s16, s46, 0xffff ; SI-NEXT: s_lshl_b32 s17, s56, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s43, 0xffff -; SI-NEXT: s_lshl_b32 s18, s94, 16 +; SI-NEXT: s_and_b32 s17, s47, 0xffff +; SI-NEXT: s_lshl_b32 s18, s64, 16 ; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s18, s40, 0xffff +; SI-NEXT: s_and_b32 s18, s44, 0xffff ; SI-NEXT: s_lshl_b32 s19, s58, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_and_b32 s19, s41, 0xffff -; SI-NEXT: s_lshl_b32 s20, s95, 16 +; SI-NEXT: s_and_b32 s19, s45, 0xffff +; SI-NEXT: s_lshl_b32 s20, s65, 16 ; SI-NEXT: s_or_b32 s19, s19, s20 +; SI-NEXT: s_and_b32 s20, s42, 0xffff +; SI-NEXT: s_lshl_b32 s21, s60, 16 +; SI-NEXT: s_or_b32 s20, s20, s21 +; SI-NEXT: s_and_b32 s21, s43, 0xffff +; SI-NEXT: s_lshl_b32 s22, s66, 16 +; SI-NEXT: s_or_b32 s21, s21, s22 +; SI-NEXT: s_and_b32 s22, s40, 0xffff +; SI-NEXT: s_lshl_b32 s23, s62, 16 +; SI-NEXT: s_or_b32 s22, s22, s23 +; SI-NEXT: s_and_b32 s23, s41, 0xffff +; SI-NEXT: s_lshl_b32 s24, s67, 16 +; SI-NEXT: s_or_b32 s23, s23, s24 ; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s20, s60, 16 -; SI-NEXT: s_or_b32 s14, s14, s20 +; SI-NEXT: s_lshl_b32 s24, s72, 16 +; SI-NEXT: s_or_b32 s14, s14, s24 ; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s20, s30, 16 -; SI-NEXT: s_or_b32 s15, s15, s20 +; SI-NEXT: s_lshl_b32 s24, s68, 16 +; SI-NEXT: s_or_b32 s15, s15, s24 ; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s20, s62, 16 -; SI-NEXT: s_or_b32 s12, s12, s20 +; SI-NEXT: s_lshl_b32 s24, s74, 16 +; SI-NEXT: s_or_b32 s12, s12, s24 ; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s20, s31, 16 -; SI-NEXT: s_or_b32 s13, s13, s20 +; SI-NEXT: s_lshl_b32 s24, s69, 16 +; SI-NEXT: s_or_b32 s13, s13, s24 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s20, s72, 16 -; SI-NEXT: s_or_b32 s10, s10, s20 +; SI-NEXT: s_lshl_b32 s24, s76, 16 +; SI-NEXT: s_or_b32 s10, s10, s24 ; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s20, s34, 16 -; SI-NEXT: s_or_b32 s11, s11, s20 +; SI-NEXT: s_lshl_b32 s24, s70, 16 +; SI-NEXT: s_or_b32 s11, s11, s24 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s20, s74, 16 -; SI-NEXT: s_or_b32 s8, s8, s20 +; SI-NEXT: s_lshl_b32 s24, s78, 16 +; SI-NEXT: s_or_b32 s8, s8, s24 ; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s20, s35, 16 -; SI-NEXT: s_or_b32 s9, s9, s20 +; SI-NEXT: s_lshl_b32 s24, s71, 16 +; SI-NEXT: s_or_b32 s9, s9, s24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s20, s76, 16 -; SI-NEXT: s_or_b32 s6, s6, s20 +; SI-NEXT: s_lshl_b32 s24, s88, 16 +; SI-NEXT: s_or_b32 s6, s6, s24 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s20, s36, 16 -; SI-NEXT: s_or_b32 s7, s7, s20 +; SI-NEXT: s_lshl_b32 s24, s80, 16 +; SI-NEXT: s_or_b32 s7, s7, s24 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s20, s78, 16 -; SI-NEXT: s_or_b32 s4, s4, s20 +; SI-NEXT: s_lshl_b32 s24, s90, 16 +; SI-NEXT: s_or_b32 s4, s4, s24 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s20, s37, 16 -; SI-NEXT: s_or_b32 s5, s5, s20 -; SI-NEXT: s_and_b32 s20, s46, 0xffff -; SI-NEXT: s_lshl_b32 s21, s88, 16 -; SI-NEXT: s_or_b32 s20, s20, s21 -; SI-NEXT: s_and_b32 s21, s47, 0xffff -; SI-NEXT: s_lshl_b32 s22, s38, 16 -; SI-NEXT: s_or_b32 s21, s21, s22 -; SI-NEXT: s_and_b32 s22, s44, 0xffff -; SI-NEXT: s_lshl_b32 s23, s90, 16 -; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_and_b32 s23, s45, 0xffff -; SI-NEXT: s_lshl_b32 s24, s39, 16 -; SI-NEXT: s_or_b32 s23, s23, s24 -; SI-NEXT: v_readlane_b32 s30, v20, 22 +; SI-NEXT: s_lshl_b32 s24, s81, 16 +; SI-NEXT: s_or_b32 s5, s5, s24 +; SI-NEXT: v_readlane_b32 s30, v20, 34 ; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v2, s18 ; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v4, s14 -; SI-NEXT: v_mov_b32_e32 v5, s15 -; SI-NEXT: v_mov_b32_e32 v6, s12 -; SI-NEXT: v_mov_b32_e32 v7, s13 -; SI-NEXT: v_mov_b32_e32 v8, s10 -; SI-NEXT: v_mov_b32_e32 v9, s11 -; SI-NEXT: v_mov_b32_e32 v10, s8 -; SI-NEXT: v_mov_b32_e32 v11, s9 -; SI-NEXT: v_mov_b32_e32 v12, s6 -; SI-NEXT: v_mov_b32_e32 v13, s7 -; SI-NEXT: v_mov_b32_e32 v14, s4 -; SI-NEXT: v_mov_b32_e32 v15, s5 -; SI-NEXT: v_mov_b32_e32 v16, s20 -; SI-NEXT: v_mov_b32_e32 v17, s21 -; SI-NEXT: v_mov_b32_e32 v18, s22 -; SI-NEXT: v_mov_b32_e32 v19, s23 -; SI-NEXT: v_readlane_b32 s31, v20, 23 +; SI-NEXT: v_mov_b32_e32 v4, s20 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v6, s22 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v8, s14 +; SI-NEXT: v_mov_b32_e32 v9, s15 +; SI-NEXT: v_mov_b32_e32 v10, s12 +; SI-NEXT: v_mov_b32_e32 v11, s13 +; SI-NEXT: v_mov_b32_e32 v12, s10 +; SI-NEXT: v_mov_b32_e32 v13, s11 +; SI-NEXT: v_mov_b32_e32 v14, s8 +; SI-NEXT: v_mov_b32_e32 v15, s9 +; SI-NEXT: v_mov_b32_e32 v16, s6 +; SI-NEXT: v_mov_b32_e32 v17, s7 +; SI-NEXT: v_mov_b32_e32 v18, s4 +; SI-NEXT: v_mov_b32_e32 v19, s5 +; SI-NEXT: v_readlane_b32 s31, v20, 35 +; SI-NEXT: v_readlane_b32 s99, v20, 33 +; SI-NEXT: v_readlane_b32 s98, v20, 32 +; SI-NEXT: v_readlane_b32 s97, v20, 31 +; SI-NEXT: v_readlane_b32 s96, v20, 30 +; SI-NEXT: v_readlane_b32 s87, v20, 29 +; SI-NEXT: v_readlane_b32 s86, v20, 28 +; SI-NEXT: v_readlane_b32 s85, v20, 27 +; SI-NEXT: v_readlane_b32 s84, v20, 26 +; SI-NEXT: v_readlane_b32 s83, v20, 25 +; SI-NEXT: v_readlane_b32 s82, v20, 24 +; SI-NEXT: v_readlane_b32 s81, v20, 23 +; SI-NEXT: v_readlane_b32 s80, v20, 22 ; SI-NEXT: v_readlane_b32 s71, v20, 21 ; SI-NEXT: v_readlane_b32 s70, v20, 20 ; SI-NEXT: v_readlane_b32 s69, v20, 19 @@ -31365,25 +31402,26 @@ define inreg <40 x half> @bitcast_v40i16_to_v40f16_scalar(<40 x i16> inreg %a, i ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB57_4: -; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: s_mov_b64 s[54:55], -1 +; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr42 ; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr40 ; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr14 ; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr12 ; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr10 ; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr78 -; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr6 ; SI-NEXT: ; implicit-def: $sgpr88 -; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: ; implicit-def: $sgpr90 ; SI-NEXT: s_branch .LBB57_2 ; @@ -32720,32 +32758,32 @@ define inreg <40 x i16> @bitcast_v40f16_to_v40i16_scalar(<40 x half> inreg %a, i ; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_readfirstlane_b32 s9, v5 -; SI-NEXT: v_readfirstlane_b32 s6, v4 -; SI-NEXT: v_readfirstlane_b32 s10, v3 -; SI-NEXT: v_readfirstlane_b32 s7, v2 -; SI-NEXT: v_readfirstlane_b32 s41, v1 -; SI-NEXT: v_readfirstlane_b32 s8, v0 -; SI-NEXT: s_lshr_b32 s42, s29, 16 -; SI-NEXT: s_lshr_b32 s46, s28, 16 -; SI-NEXT: s_lshr_b32 s40, s27, 16 -; SI-NEXT: s_lshr_b32 s57, s26, 16 -; SI-NEXT: s_lshr_b32 s15, s25, 16 -; SI-NEXT: s_lshr_b32 s59, s24, 16 -; SI-NEXT: s_lshr_b32 s14, s23, 16 -; SI-NEXT: s_lshr_b32 s60, s22, 16 -; SI-NEXT: s_lshr_b32 s13, s21, 16 +; SI-NEXT: v_readfirstlane_b32 s57, v5 +; SI-NEXT: v_readfirstlane_b32 s7, v4 +; SI-NEXT: v_readfirstlane_b32 s56, v3 +; SI-NEXT: v_readfirstlane_b32 s10, v2 +; SI-NEXT: v_readfirstlane_b32 s46, v1 +; SI-NEXT: v_readfirstlane_b32 s13, v0 +; SI-NEXT: s_lshr_b32 s45, s29, 16 +; SI-NEXT: s_lshr_b32 s9, s28, 16 +; SI-NEXT: s_lshr_b32 s44, s27, 16 +; SI-NEXT: s_lshr_b32 s12, s26, 16 +; SI-NEXT: s_lshr_b32 s43, s25, 16 +; SI-NEXT: s_lshr_b32 s14, s24, 16 +; SI-NEXT: s_lshr_b32 s42, s23, 16 +; SI-NEXT: s_lshr_b32 s47, s22, 16 +; SI-NEXT: s_lshr_b32 s41, s21, 16 ; SI-NEXT: s_lshr_b32 s61, s20, 16 -; SI-NEXT: s_lshr_b32 s12, s19, 16 +; SI-NEXT: s_lshr_b32 s40, s19, 16 ; SI-NEXT: s_lshr_b32 s62, s18, 16 -; SI-NEXT: s_lshr_b32 s11, s17, 16 +; SI-NEXT: s_lshr_b32 s15, s17, 16 ; SI-NEXT: s_lshr_b32 s63, s16, 16 -; SI-NEXT: s_lshr_b32 s58, s9, 16 -; SI-NEXT: s_lshr_b32 s44, s6, 16 -; SI-NEXT: s_lshr_b32 s43, s10, 16 -; SI-NEXT: s_lshr_b32 s45, s7, 16 -; SI-NEXT: s_lshr_b32 s47, s41, 16 -; SI-NEXT: s_lshr_b32 s56, s8, 16 +; SI-NEXT: s_lshr_b32 s60, s57, 16 +; SI-NEXT: s_lshr_b32 s6, s7, 16 +; SI-NEXT: s_lshr_b32 s59, s56, 16 +; SI-NEXT: s_lshr_b32 s8, s10, 16 +; SI-NEXT: s_lshr_b32 s58, s46, 16 +; SI-NEXT: s_lshr_b32 s11, s13, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v6 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB59_3 @@ -32766,153 +32804,155 @@ define inreg <40 x i16> @bitcast_v40f16_to_v40i16_scalar(<40 x half> inreg %a, i ; SI-NEXT: v_or_b32_e32 v48, v1, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s61 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_or_b32_e32 v49, v3, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s60 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s47 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s60 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s59 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s22 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s57 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s46 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s56 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s45 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v7 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s44 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s58 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s47 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 +; SI-NEXT: v_or_b32_e32 v54, v5, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v50, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s41 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s42 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s29 -; SI-NEXT: v_cvt_f16_f32_e32 v51, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s57 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s59 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s56 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v52, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v51, v5 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50 +; SI-NEXT: v_or_b32_e32 v19, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s58 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v51 -; SI-NEXT: v_or_b32_e32 v15, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s40 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v52 -; SI-NEXT: v_or_b32_e32 v13, v5, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s27 +; SI-NEXT: v_or_b32_e32 v17, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s46 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s15 -; SI-NEXT: v_cvt_f16_f32_e32 v53, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s45 +; SI-NEXT: v_cvt_f16_f32_e32 v52, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v54, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v53 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s25 -; SI-NEXT: v_or_b32_e32 v11, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s14 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v53, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v52 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s29 +; SI-NEXT: v_or_b32_e32 v15, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s44 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s27 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v55, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v54 -; SI-NEXT: v_or_b32_e32 v9, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s13 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v53 +; SI-NEXT: v_or_b32_e32 v13, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s43 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v55 -; SI-NEXT: v_or_b32_e32 v7, v3, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s21 +; SI-NEXT: v_or_b32_e32 v11, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s25 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s42 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s12 -; SI-NEXT: v_cvt_f16_f32_e32 v41, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v40, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v41, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v40 +; SI-NEXT: v_or_b32_e32 v9, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s41 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v41 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v42, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v19, s19 -; SI-NEXT: v_or_b32_e32 v5, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s11 -; SI-NEXT: v_cvt_f32_f16_e32 v23, s17 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v7, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s40 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v42 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s17 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_or_b32_e32 v5, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v43, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s15 +; SI-NEXT: v_cvt_f32_f16_e32 v6, s22 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v43, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v17, s43 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v42 -; SI-NEXT: v_or_b32_e32 v3, v19, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v19, s10 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v43 -; SI-NEXT: v_or_b32_e32 v1, v23, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v23, s9 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v40, v17 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v40 -; SI-NEXT: v_or_b32_e32 v17, v17, v23 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v50 -; SI-NEXT: v_cvt_f32_f16_e32 v22, s24 -; SI-NEXT: v_or_b32_e32 v19, v19, v23 -; SI-NEXT: v_cvt_f32_f16_e32 v23, s26 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v44, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v43 +; SI-NEXT: v_or_b32_e32 v3, v3, v10 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v44 +; SI-NEXT: v_or_b32_e32 v1, v1, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s14 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s24 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, s12 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: v_or_b32_e32 v45, v12, v6 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s26 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v8 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v10 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_or_b32_e32 v47, v12, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v16 +; SI-NEXT: v_or_b32_e32 v46, v14, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s28 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s11 +; SI-NEXT: v_cvt_f32_f16_e32 v18, s13 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f32_f16_e32 v20, s8 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_or_b32_e32 v57, v14, v12 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s10 +; SI-NEXT: v_or_b32_e32 v56, v18, v14 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v20 +; SI-NEXT: v_cvt_f32_f16_e32 v20, s6 +; SI-NEXT: v_cvt_f32_f16_e32 v21, s7 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v16 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v16 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v21 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_or_b32_e32 v59, v20, v4 -; SI-NEXT: v_or_b32_e32 v57, v21, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v20, s28 -; SI-NEXT: v_or_b32_e32 v56, v22, v8 -; SI-NEXT: v_or_b32_e32 v46, v23, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v21, s8 -; SI-NEXT: v_cvt_f32_f16_e32 v22, s7 -; SI-NEXT: v_cvt_f32_f16_e32 v23, s6 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; SI-NEXT: v_or_b32_e32 v58, v20, v12 -; SI-NEXT: v_or_b32_e32 v47, v21, v14 -; SI-NEXT: v_or_b32_e32 v45, v22, v16 -; SI-NEXT: v_or_b32_e32 v44, v23, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v59, v16 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v20 +; SI-NEXT: v_or_b32_e32 v58, v22, v16 ; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16 ; SI-NEXT: v_lshr_b64 v[36:37], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[34:35], v[4:5], 16 @@ -32923,34 +32963,21 @@ define inreg <40 x i16> @bitcast_v40f16_to_v40i16_scalar(<40 x half> inreg %a, i ; SI-NEXT: v_lshr_b64 v[24:25], v[14:15], 16 ; SI-NEXT: v_lshr_b64 v[22:23], v[16:17], 16 ; SI-NEXT: v_lshr_b64 v[20:21], v[18:19], 16 +; SI-NEXT: v_or_b32_e32 v18, v59, v18 ; SI-NEXT: s_branch .LBB59_5 ; SI-NEXT: .LBB59_3: ; SI-NEXT: s_branch .LBB59_2 ; SI-NEXT: .LBB59_4: -; SI-NEXT: v_mov_b32_e32 v50, s58 +; SI-NEXT: v_mov_b32_e32 v50, s60 +; SI-NEXT: v_mov_b32_e32 v51, s59 +; SI-NEXT: v_mov_b32_e32 v52, s58 +; SI-NEXT: v_mov_b32_e32 v53, s45 +; SI-NEXT: v_mov_b32_e32 v55, s44 ; SI-NEXT: v_mov_b32_e32 v40, s43 -; SI-NEXT: v_mov_b32_e32 v51, s47 -; SI-NEXT: v_mov_b32_e32 v52, s42 -; SI-NEXT: v_mov_b32_e32 v53, s40 -; SI-NEXT: v_mov_b32_e32 v54, s15 -; SI-NEXT: v_mov_b32_e32 v55, s14 -; SI-NEXT: v_mov_b32_e32 v41, s13 -; SI-NEXT: v_mov_b32_e32 v42, s12 -; SI-NEXT: v_mov_b32_e32 v43, s11 -; SI-NEXT: v_mov_b32_e32 v44, s6 -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_mov_b32_e32 v45, s7 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v47, s8 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v58, s28 -; SI-NEXT: v_mov_b32_e32 v46, s26 -; SI-NEXT: v_mov_b32_e32 v56, s24 -; SI-NEXT: v_mov_b32_e32 v57, s22 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v59, s20 -; SI-NEXT: v_mov_b32_e32 v49, s18 -; SI-NEXT: v_mov_b32_e32 v48, s16 +; SI-NEXT: v_mov_b32_e32 v41, s42 +; SI-NEXT: v_mov_b32_e32 v42, s41 +; SI-NEXT: v_mov_b32_e32 v43, s40 +; SI-NEXT: v_mov_b32_e32 v44, s15 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 @@ -32958,75 +32985,81 @@ define inreg <40 x i16> @bitcast_v40f16_to_v40i16_scalar(<40 x half> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v13, s29 -; SI-NEXT: v_mov_b32_e32 v15, s41 -; SI-NEXT: v_mov_b32_e32 v17, s10 -; SI-NEXT: v_mov_b32_e32 v19, s9 +; SI-NEXT: v_mov_b32_e32 v15, s46 +; SI-NEXT: v_mov_b32_e32 v17, s56 +; SI-NEXT: v_mov_b32_e32 v19, s57 +; SI-NEXT: v_mov_b32_e32 v18, s7 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_mov_b32_e32 v58, s10 +; SI-NEXT: v_mov_b32_e32 v56, s13 +; SI-NEXT: v_mov_b32_e32 v57, s28 +; SI-NEXT: v_mov_b32_e32 v46, s26 +; SI-NEXT: v_mov_b32_e32 v47, s24 +; SI-NEXT: v_mov_b32_e32 v45, s22 +; SI-NEXT: v_mov_b32_e32 v54, s20 +; SI-NEXT: v_mov_b32_e32 v49, s18 +; SI-NEXT: v_mov_b32_e32 v48, s16 ; SI-NEXT: v_mov_b32_e32 v38, s63 ; SI-NEXT: v_mov_b32_e32 v36, s62 ; SI-NEXT: v_mov_b32_e32 v34, s61 -; SI-NEXT: v_mov_b32_e32 v32, s60 -; SI-NEXT: v_mov_b32_e32 v30, s59 -; SI-NEXT: v_mov_b32_e32 v28, s57 -; SI-NEXT: v_mov_b32_e32 v26, s46 -; SI-NEXT: v_mov_b32_e32 v24, s56 -; SI-NEXT: v_mov_b32_e32 v22, s45 -; SI-NEXT: v_mov_b32_e32 v20, s44 +; SI-NEXT: v_mov_b32_e32 v32, s47 +; SI-NEXT: v_mov_b32_e32 v30, s14 +; SI-NEXT: v_mov_b32_e32 v28, s12 +; SI-NEXT: v_mov_b32_e32 v26, s9 +; SI-NEXT: v_mov_b32_e32 v24, s11 +; SI-NEXT: v_mov_b32_e32 v22, s8 +; SI-NEXT: v_mov_b32_e32 v20, s6 ; SI-NEXT: .LBB59_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v38 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v48 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v48 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v38 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v44 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v36 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v49 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v49 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v42 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v43 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v34 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v59 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v54 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v41 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v42 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v32 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v57 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v45 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v32 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v55 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v41 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v56 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v47 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v30 ; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v54 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v40 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v46 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v28 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v55 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v58 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v26 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v53 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v47 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v56 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v24 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v52 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v45 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v22 -; SI-NEXT: v_or_b32_e32 v16, v16, v18 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v40 -; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v44 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v58 +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -33039,10 +33072,16 @@ define inreg <40 x i16> @bitcast_v40f16_to_v40i16_scalar(<40 x half> inreg %a, i ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v22 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_or_b32_e32 v16, v16, v21 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v51 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v50 +; SI-NEXT: v_or_b32_e32 v17, v17, v21 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll index debe8a1aff295..0e10ef2f8fcf6 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll @@ -3623,6 +3623,11 @@ define inreg <44 x i16> @bitcast_v22i32_to_v44i16_scalar(<22 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[42:43], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s76, s5, 16 ; SI-NEXT: s_lshr_b32 s77, s7, 16 ; SI-NEXT: s_lshr_b32 s78, s9, 16 @@ -3634,33 +3639,28 @@ define inreg <44 x i16> @bitcast_v22i32_to_v44i16_scalar(<22 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b32 s92, s21, 16 ; SI-NEXT: s_lshr_b32 s93, s19, 16 ; SI-NEXT: s_lshr_b32 s94, s17, 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[16:17], 16 ; SI-NEXT: .LBB13_3: ; %end -; SI-NEXT: s_lshl_b32 s13, s72, 16 -; SI-NEXT: s_and_b32 s15, s16, 0xffff -; SI-NEXT: s_or_b32 s13, s15, s13 +; SI-NEXT: s_and_b32 s13, s16, 0xffff +; SI-NEXT: s_lshl_b32 s15, s72, 16 +; SI-NEXT: s_or_b32 s13, s13, s15 ; SI-NEXT: s_and_b32 s15, s17, 0xffff ; SI-NEXT: s_lshl_b32 s16, s94, 16 ; SI-NEXT: s_or_b32 s15, s15, s16 -; SI-NEXT: s_lshl_b32 s16, s62, 16 -; SI-NEXT: s_and_b32 s17, s18, 0xffff -; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_and_b32 s16, s18, 0xffff +; SI-NEXT: s_lshl_b32 s17, s62, 16 +; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s19, 0xffff ; SI-NEXT: s_lshl_b32 s18, s93, 16 ; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_lshl_b32 s18, s60, 16 -; SI-NEXT: s_and_b32 s19, s20, 0xffff -; SI-NEXT: s_or_b32 s18, s19, s18 +; SI-NEXT: s_and_b32 s18, s20, 0xffff +; SI-NEXT: s_lshl_b32 s19, s60, 16 +; SI-NEXT: s_or_b32 s18, s18, s19 ; SI-NEXT: s_and_b32 s19, s21, 0xffff ; SI-NEXT: s_lshl_b32 s20, s92, 16 ; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_lshl_b32 s20, s58, 16 -; SI-NEXT: s_and_b32 s21, s22, 0xffff -; SI-NEXT: s_or_b32 s20, s21, s20 +; SI-NEXT: s_and_b32 s20, s22, 0xffff +; SI-NEXT: s_lshl_b32 s21, s58, 16 +; SI-NEXT: s_or_b32 s20, s20, s21 ; SI-NEXT: s_and_b32 s21, s23, 0xffff ; SI-NEXT: s_lshl_b32 s22, s91, 16 ; SI-NEXT: s_or_b32 s21, s21, s22 @@ -5277,17 +5277,17 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s35, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s34, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s31, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s30, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s34, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s95, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s94, 16 @@ -5571,17 +5571,17 @@ define inreg <22 x i32> @bitcast_v44i16_to_v22i32_scalar(<44 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s71, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s70, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s69, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s68, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s70, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s35, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s34, 16 @@ -6768,6 +6768,11 @@ define inreg <44 x half> @bitcast_v22i32_to_v44f16_scalar(<22 x i32> inreg %a, i ; SI-NEXT: s_lshr_b64 s[42:43], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s76, s5, 16 ; SI-NEXT: s_lshr_b32 s77, s7, 16 ; SI-NEXT: s_lshr_b32 s78, s9, 16 @@ -6779,33 +6784,28 @@ define inreg <44 x half> @bitcast_v22i32_to_v44f16_scalar(<22 x i32> inreg %a, i ; SI-NEXT: s_lshr_b32 s92, s21, 16 ; SI-NEXT: s_lshr_b32 s93, s19, 16 ; SI-NEXT: s_lshr_b32 s94, s17, 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[16:17], 16 ; SI-NEXT: .LBB17_3: ; %end -; SI-NEXT: s_lshl_b32 s13, s72, 16 -; SI-NEXT: s_and_b32 s15, s16, 0xffff -; SI-NEXT: s_or_b32 s13, s15, s13 +; SI-NEXT: s_and_b32 s13, s16, 0xffff +; SI-NEXT: s_lshl_b32 s15, s72, 16 +; SI-NEXT: s_or_b32 s13, s13, s15 ; SI-NEXT: s_and_b32 s15, s17, 0xffff ; SI-NEXT: s_lshl_b32 s16, s94, 16 ; SI-NEXT: s_or_b32 s15, s15, s16 -; SI-NEXT: s_lshl_b32 s16, s62, 16 -; SI-NEXT: s_and_b32 s17, s18, 0xffff -; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_and_b32 s16, s18, 0xffff +; SI-NEXT: s_lshl_b32 s17, s62, 16 +; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s19, 0xffff ; SI-NEXT: s_lshl_b32 s18, s93, 16 ; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_lshl_b32 s18, s60, 16 -; SI-NEXT: s_and_b32 s19, s20, 0xffff -; SI-NEXT: s_or_b32 s18, s19, s18 +; SI-NEXT: s_and_b32 s18, s20, 0xffff +; SI-NEXT: s_lshl_b32 s19, s60, 16 +; SI-NEXT: s_or_b32 s18, s18, s19 ; SI-NEXT: s_and_b32 s19, s21, 0xffff ; SI-NEXT: s_lshl_b32 s20, s92, 16 ; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_lshl_b32 s20, s58, 16 -; SI-NEXT: s_and_b32 s21, s22, 0xffff -; SI-NEXT: s_or_b32 s20, s21, s20 +; SI-NEXT: s_and_b32 s20, s22, 0xffff +; SI-NEXT: s_lshl_b32 s21, s58, 16 +; SI-NEXT: s_or_b32 s20, s20, s21 ; SI-NEXT: s_and_b32 s21, s23, 0xffff ; SI-NEXT: s_lshl_b32 s22, s91, 16 ; SI-NEXT: s_or_b32 s21, s21, s22 @@ -7509,10 +7509,10 @@ define <22 x i32> @bitcast_v44f16_to_v22i32(<44 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v44 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v43 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -7649,168 +7649,168 @@ define <22 x i32> @bitcast_v44f16_to_v22i32(<44 x half> %a, i32 %b) #0 { ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB18_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v63 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v33 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v33 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v44 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v32 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: v_cvt_f32_f16_e32 v3, v43 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v42 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v43 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v62 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v41 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v42 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v41 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v60 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v55 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v59 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v61 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v55 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v58 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v54 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v54 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v57 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v53 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v56 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v60 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v59 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v52 +; SI-NEXT: v_or_b32_e32 v8, v9, v8 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v47 ; SI-NEXT: v_cvt_f32_f16_e32 v12, v51 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v49 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v58 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v48 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v18, v37 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v57 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v47 ; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v46 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v50 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v12, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v50 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v20, v35 -; SI-NEXT: v_cvt_f32_f16_e32 v21, v34 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v14, v49 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v18, v37 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f32_f16_e32 v20, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v34 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v15, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v15, v39 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v15, v17, v15 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 @@ -8521,17 +8521,17 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s35, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s34, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s31, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s30, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s34, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s95, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s94, 16 @@ -8893,17 +8893,17 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s71, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s70, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s69, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s68, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s70, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s35, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s34, 16 @@ -8960,13 +8960,13 @@ define inreg <22 x i32> @bitcast_v44f16_to_v22i32_scalar(<44 x half> inreg %a, i ; VI-NEXT: .LBB19_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v21, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s71 -; VI-NEXT: v_mov_b32_e32 v2, s70 ; VI-NEXT: v_add_f16_sdwa v0, v0, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v21 -; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v21 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s70 +; VI-NEXT: v_add_f16_sdwa v1, v1, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v21 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s69 ; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v21 @@ -12350,17 +12350,17 @@ define inreg <44 x i16> @bitcast_v22f32_to_v44i16_scalar(<22 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[31:32], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[32:33], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v1 ; SI-NEXT: s_branch .LBB29_5 ; SI-NEXT: .LBB29_3: ; SI-NEXT: ; implicit-def: $sgpr72 @@ -12409,17 +12409,17 @@ define inreg <44 x i16> @bitcast_v22f32_to_v44i16_scalar(<22 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v19, s7 ; SI-NEXT: v_mov_b32_e32 v20, s4 ; SI-NEXT: v_mov_b32_e32 v21, s5 -; SI-NEXT: v_mov_b32_e32 v52, s76 -; SI-NEXT: v_mov_b32_e32 v51, s77 -; SI-NEXT: v_mov_b32_e32 v50, s78 -; SI-NEXT: v_mov_b32_e32 v49, s79 -; SI-NEXT: v_mov_b32_e32 v48, s88 -; SI-NEXT: v_mov_b32_e32 v39, s89 -; SI-NEXT: v_mov_b32_e32 v38, s90 -; SI-NEXT: v_mov_b32_e32 v37, s91 -; SI-NEXT: v_mov_b32_e32 v36, s92 -; SI-NEXT: v_mov_b32_e32 v35, s93 -; SI-NEXT: v_mov_b32_e32 v34, s94 +; SI-NEXT: v_mov_b32_e32 v51, s76 +; SI-NEXT: v_mov_b32_e32 v50, s77 +; SI-NEXT: v_mov_b32_e32 v49, s78 +; SI-NEXT: v_mov_b32_e32 v48, s79 +; SI-NEXT: v_mov_b32_e32 v39, s88 +; SI-NEXT: v_mov_b32_e32 v38, s89 +; SI-NEXT: v_mov_b32_e32 v37, s90 +; SI-NEXT: v_mov_b32_e32 v36, s91 +; SI-NEXT: v_mov_b32_e32 v35, s92 +; SI-NEXT: v_mov_b32_e32 v34, s93 +; SI-NEXT: v_mov_b32_e32 v33, s94 ; SI-NEXT: v_mov_b32_e32 v22, s12 ; SI-NEXT: v_mov_b32_e32 v23, s14 ; SI-NEXT: v_mov_b32_e32 v24, s40 @@ -12432,14 +12432,14 @@ define inreg <44 x i16> @bitcast_v22f32_to_v44i16_scalar(<22 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v31, s62 ; SI-NEXT: v_mov_b32_e32 v32, s72 ; SI-NEXT: .LBB29_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -12456,37 +12456,37 @@ define inreg <44 x i16> @bitcast_v22f32_to_v44i16_scalar(<22 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v0, v0, v32 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v51 ; SI-NEXT: v_or_b32_e32 v2, v2, v31 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v50 ; SI-NEXT: v_or_b32_e32 v4, v4, v30 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v49 ; SI-NEXT: v_or_b32_e32 v6, v6, v29 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v48 ; SI-NEXT: v_or_b32_e32 v8, v8, v28 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39 ; SI-NEXT: v_or_b32_e32 v10, v10, v27 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v38 ; SI-NEXT: v_or_b32_e32 v12, v12, v26 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v37 ; SI-NEXT: v_or_b32_e32 v14, v14, v25 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v36 ; SI-NEXT: v_or_b32_e32 v16, v16, v24 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v35 ; SI-NEXT: v_or_b32_e32 v18, v18, v23 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v34 ; SI-NEXT: v_or_b32_e32 v20, v20, v22 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v33 ; SI-NEXT: v_or_b32_e32 v1, v1, v32 ; SI-NEXT: v_or_b32_e32 v3, v3, v31 ; SI-NEXT: v_or_b32_e32 v5, v5, v30 @@ -14260,17 +14260,17 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s35, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s34, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s31, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s30, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s34, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s95, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s94, 16 @@ -14554,17 +14554,17 @@ define inreg <22 x float> @bitcast_v44i16_to_v22f32_scalar(<44 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s71, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s70, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s69, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s68, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s70, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s35, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s34, 16 @@ -15734,17 +15734,17 @@ define inreg <44 x half> @bitcast_v22f32_to_v44f16_scalar(<22 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[31:32], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[32:33], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v9 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v1 ; SI-NEXT: s_branch .LBB33_5 ; SI-NEXT: .LBB33_3: ; SI-NEXT: ; implicit-def: $sgpr72 @@ -15793,17 +15793,17 @@ define inreg <44 x half> @bitcast_v22f32_to_v44f16_scalar(<22 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v19, s7 ; SI-NEXT: v_mov_b32_e32 v20, s4 ; SI-NEXT: v_mov_b32_e32 v21, s5 -; SI-NEXT: v_mov_b32_e32 v52, s76 -; SI-NEXT: v_mov_b32_e32 v51, s77 -; SI-NEXT: v_mov_b32_e32 v50, s78 -; SI-NEXT: v_mov_b32_e32 v49, s79 -; SI-NEXT: v_mov_b32_e32 v48, s88 -; SI-NEXT: v_mov_b32_e32 v39, s89 -; SI-NEXT: v_mov_b32_e32 v38, s90 -; SI-NEXT: v_mov_b32_e32 v37, s91 -; SI-NEXT: v_mov_b32_e32 v36, s92 -; SI-NEXT: v_mov_b32_e32 v35, s93 -; SI-NEXT: v_mov_b32_e32 v34, s94 +; SI-NEXT: v_mov_b32_e32 v51, s76 +; SI-NEXT: v_mov_b32_e32 v50, s77 +; SI-NEXT: v_mov_b32_e32 v49, s78 +; SI-NEXT: v_mov_b32_e32 v48, s79 +; SI-NEXT: v_mov_b32_e32 v39, s88 +; SI-NEXT: v_mov_b32_e32 v38, s89 +; SI-NEXT: v_mov_b32_e32 v37, s90 +; SI-NEXT: v_mov_b32_e32 v36, s91 +; SI-NEXT: v_mov_b32_e32 v35, s92 +; SI-NEXT: v_mov_b32_e32 v34, s93 +; SI-NEXT: v_mov_b32_e32 v33, s94 ; SI-NEXT: v_mov_b32_e32 v22, s12 ; SI-NEXT: v_mov_b32_e32 v23, s14 ; SI-NEXT: v_mov_b32_e32 v24, s40 @@ -15816,14 +15816,14 @@ define inreg <44 x half> @bitcast_v22f32_to_v44f16_scalar(<22 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v31, s62 ; SI-NEXT: v_mov_b32_e32 v32, s72 ; SI-NEXT: .LBB33_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -15840,37 +15840,37 @@ define inreg <44 x half> @bitcast_v22f32_to_v44f16_scalar(<22 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v0, v0, v32 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v51 ; SI-NEXT: v_or_b32_e32 v2, v2, v31 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v50 ; SI-NEXT: v_or_b32_e32 v4, v4, v30 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v49 ; SI-NEXT: v_or_b32_e32 v6, v6, v29 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v48 ; SI-NEXT: v_or_b32_e32 v8, v8, v28 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39 ; SI-NEXT: v_or_b32_e32 v10, v10, v27 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v38 ; SI-NEXT: v_or_b32_e32 v12, v12, v26 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v37 ; SI-NEXT: v_or_b32_e32 v14, v14, v25 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v36 ; SI-NEXT: v_or_b32_e32 v16, v16, v24 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v35 ; SI-NEXT: v_or_b32_e32 v18, v18, v23 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v34 ; SI-NEXT: v_or_b32_e32 v20, v20, v22 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v33 ; SI-NEXT: v_or_b32_e32 v1, v1, v32 ; SI-NEXT: v_or_b32_e32 v3, v3, v31 ; SI-NEXT: v_or_b32_e32 v5, v5, v30 @@ -16731,10 +16731,10 @@ define <22 x float> @bitcast_v44f16_to_v22f32(<44 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v44 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v43 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -16871,168 +16871,168 @@ define <22 x float> @bitcast_v44f16_to_v22f32(<44 x half> %a, i32 %b) #0 { ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB34_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v63 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v33 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v33 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v44 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v32 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: v_cvt_f32_f16_e32 v3, v43 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v42 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v43 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v62 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v41 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v42 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v41 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v60 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v55 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v59 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v61 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v55 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v58 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v54 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v54 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v57 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v53 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v56 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v60 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v59 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v52 +; SI-NEXT: v_or_b32_e32 v8, v9, v8 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v47 ; SI-NEXT: v_cvt_f32_f16_e32 v12, v51 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v49 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v58 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v48 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v18, v37 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v57 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v47 ; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v46 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v50 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v12, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v50 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v20, v35 -; SI-NEXT: v_cvt_f32_f16_e32 v21, v34 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v14, v49 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v18, v37 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f32_f16_e32 v20, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v34 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v15, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v15, v39 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v15, v17, v15 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 @@ -17743,17 +17743,17 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s35, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s34, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s31, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s30, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s34, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s95, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s94, 16 @@ -18115,17 +18115,17 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s71, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s70, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s69, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s68, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s70, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s35, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s34, 16 @@ -18182,13 +18182,13 @@ define inreg <22 x float> @bitcast_v44f16_to_v22f32_scalar(<44 x half> inreg %a, ; VI-NEXT: .LBB35_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v21, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s71 -; VI-NEXT: v_mov_b32_e32 v2, s70 ; VI-NEXT: v_add_f16_sdwa v0, v0, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v21 -; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v21 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s70 +; VI-NEXT: v_add_f16_sdwa v1, v1, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v21 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s69 ; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v21 @@ -20331,27 +20331,27 @@ define inreg <44 x i16> @bitcast_v11i64_to_v44i16_scalar(<11 x i64> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[62:63], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[16:17], 16 ; SI-NEXT: .LBB41_3: ; %end -; SI-NEXT: s_lshl_b32 s13, s72, 16 -; SI-NEXT: s_and_b32 s15, s16, 0xffff -; SI-NEXT: s_or_b32 s13, s15, s13 +; SI-NEXT: s_and_b32 s13, s16, 0xffff +; SI-NEXT: s_lshl_b32 s15, s72, 16 +; SI-NEXT: s_or_b32 s13, s13, s15 ; SI-NEXT: s_and_b32 s15, s17, 0xffff ; SI-NEXT: s_lshl_b32 s16, s94, 16 ; SI-NEXT: s_or_b32 s15, s15, s16 -; SI-NEXT: s_lshl_b32 s16, s62, 16 -; SI-NEXT: s_and_b32 s17, s18, 0xffff -; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_and_b32 s16, s18, 0xffff +; SI-NEXT: s_lshl_b32 s17, s62, 16 +; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s19, 0xffff ; SI-NEXT: s_lshl_b32 s18, s93, 16 ; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_lshl_b32 s18, s60, 16 -; SI-NEXT: s_and_b32 s19, s20, 0xffff -; SI-NEXT: s_or_b32 s18, s19, s18 +; SI-NEXT: s_and_b32 s18, s20, 0xffff +; SI-NEXT: s_lshl_b32 s19, s60, 16 +; SI-NEXT: s_or_b32 s18, s18, s19 ; SI-NEXT: s_and_b32 s19, s21, 0xffff ; SI-NEXT: s_lshl_b32 s20, s92, 16 ; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_lshl_b32 s20, s58, 16 -; SI-NEXT: s_and_b32 s21, s22, 0xffff -; SI-NEXT: s_or_b32 s20, s21, s20 +; SI-NEXT: s_and_b32 s20, s22, 0xffff +; SI-NEXT: s_lshl_b32 s21, s58, 16 +; SI-NEXT: s_or_b32 s20, s20, s21 ; SI-NEXT: s_and_b32 s21, s23, 0xffff ; SI-NEXT: s_lshl_b32 s22, s91, 16 ; SI-NEXT: s_or_b32 s21, s21, s22 @@ -21968,17 +21968,17 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s35, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s34, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s31, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s30, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s34, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s95, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s94, 16 @@ -22262,17 +22262,17 @@ define inreg <11 x i64> @bitcast_v44i16_to_v11i64_scalar(<44 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s71, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s70, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s69, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s68, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s70, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s35, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s34, 16 @@ -23488,27 +23488,27 @@ define inreg <44 x half> @bitcast_v11i64_to_v44f16_scalar(<11 x i64> inreg %a, i ; SI-NEXT: s_lshr_b64 s[62:63], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[16:17], 16 ; SI-NEXT: .LBB45_3: ; %end -; SI-NEXT: s_lshl_b32 s13, s72, 16 -; SI-NEXT: s_and_b32 s15, s16, 0xffff -; SI-NEXT: s_or_b32 s13, s15, s13 +; SI-NEXT: s_and_b32 s13, s16, 0xffff +; SI-NEXT: s_lshl_b32 s15, s72, 16 +; SI-NEXT: s_or_b32 s13, s13, s15 ; SI-NEXT: s_and_b32 s15, s17, 0xffff ; SI-NEXT: s_lshl_b32 s16, s94, 16 ; SI-NEXT: s_or_b32 s15, s15, s16 -; SI-NEXT: s_lshl_b32 s16, s62, 16 -; SI-NEXT: s_and_b32 s17, s18, 0xffff -; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_and_b32 s16, s18, 0xffff +; SI-NEXT: s_lshl_b32 s17, s62, 16 +; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s19, 0xffff ; SI-NEXT: s_lshl_b32 s18, s93, 16 ; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_lshl_b32 s18, s60, 16 -; SI-NEXT: s_and_b32 s19, s20, 0xffff -; SI-NEXT: s_or_b32 s18, s19, s18 +; SI-NEXT: s_and_b32 s18, s20, 0xffff +; SI-NEXT: s_lshl_b32 s19, s60, 16 +; SI-NEXT: s_or_b32 s18, s18, s19 ; SI-NEXT: s_and_b32 s19, s21, 0xffff ; SI-NEXT: s_lshl_b32 s20, s92, 16 ; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_lshl_b32 s20, s58, 16 -; SI-NEXT: s_and_b32 s21, s22, 0xffff -; SI-NEXT: s_or_b32 s20, s21, s20 +; SI-NEXT: s_and_b32 s20, s22, 0xffff +; SI-NEXT: s_lshl_b32 s21, s58, 16 +; SI-NEXT: s_or_b32 s20, s20, s21 ; SI-NEXT: s_and_b32 s21, s23, 0xffff ; SI-NEXT: s_lshl_b32 s22, s91, 16 ; SI-NEXT: s_or_b32 s21, s21, s22 @@ -24212,10 +24212,10 @@ define <11 x i64> @bitcast_v44f16_to_v11i64(<44 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v44 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v43 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -24352,168 +24352,168 @@ define <11 x i64> @bitcast_v44f16_to_v11i64(<44 x half> %a, i32 %b) #0 { ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB46_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v63 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v33 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v33 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v44 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v32 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: v_cvt_f32_f16_e32 v3, v43 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v42 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v43 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v62 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v55 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v42 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v41 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v61 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v60 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v40 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v59 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v55 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v58 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v54 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v54 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v57 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v53 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v56 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v60 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v59 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v52 +; SI-NEXT: v_or_b32_e32 v8, v9, v8 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v47 ; SI-NEXT: v_cvt_f32_f16_e32 v12, v51 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v49 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v58 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v48 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v18, v37 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v57 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v47 ; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v46 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v50 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v12, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v50 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v20, v35 -; SI-NEXT: v_cvt_f32_f16_e32 v21, v34 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v14, v49 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v18, v37 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f32_f16_e32 v20, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v34 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v15, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v15, v39 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v15, v17, v15 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 @@ -25224,17 +25224,17 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s35, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s34, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s31, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s30, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s34, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s95, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s94, 16 @@ -25596,17 +25596,17 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s71, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s70, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s69, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s68, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s70, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s35, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s34, 16 @@ -25663,13 +25663,13 @@ define inreg <11 x i64> @bitcast_v44f16_to_v11i64_scalar(<44 x half> inreg %a, i ; VI-NEXT: .LBB47_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v21, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s71 -; VI-NEXT: v_mov_b32_e32 v2, s70 ; VI-NEXT: v_add_f16_sdwa v0, v0, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v21 -; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v21 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s70 +; VI-NEXT: v_add_f16_sdwa v1, v1, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v21 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s69 ; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v21 @@ -26183,8 +26183,8 @@ define <44 x i16> @bitcast_v11f64_to_v44i16(<11 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v1 ; SI-NEXT: .LBB48_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -26667,10 +26667,10 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_readfirstlane_b32 s4, v8 -; SI-NEXT: v_readfirstlane_b32 s9, v7 -; SI-NEXT: v_readfirstlane_b32 s8, v6 -; SI-NEXT: v_readfirstlane_b32 s11, v5 -; SI-NEXT: v_readfirstlane_b32 s10, v4 +; SI-NEXT: v_readfirstlane_b32 s11, v7 +; SI-NEXT: v_readfirstlane_b32 s10, v6 +; SI-NEXT: v_readfirstlane_b32 s9, v5 +; SI-NEXT: v_readfirstlane_b32 s8, v4 ; SI-NEXT: v_readfirstlane_b32 s7, v3 ; SI-NEXT: v_readfirstlane_b32 s6, v2 ; SI-NEXT: v_readfirstlane_b32 s5, v1 @@ -26678,8 +26678,8 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; SI-NEXT: v_readfirstlane_b32 s4, v0 ; SI-NEXT: s_cbranch_scc0 .LBB49_3 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_lshr_b32 s94, s9, 16 -; SI-NEXT: s_lshr_b32 s93, s11, 16 +; SI-NEXT: s_lshr_b32 s94, s11, 16 +; SI-NEXT: s_lshr_b32 s93, s9, 16 ; SI-NEXT: s_lshr_b32 s92, s7, 16 ; SI-NEXT: s_lshr_b32 s91, s5, 16 ; SI-NEXT: s_lshr_b32 s90, s29, 16 @@ -26689,8 +26689,8 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; SI-NEXT: s_lshr_b32 s78, s21, 16 ; SI-NEXT: s_lshr_b32 s77, s19, 16 ; SI-NEXT: s_lshr_b32 s76, s17, 16 -; SI-NEXT: s_lshr_b64 s[12:13], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[14:15], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[12:13], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 16 ; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16 ; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16 @@ -26702,8 +26702,8 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; SI-NEXT: s_lshr_b64 s[72:73], s[16:17], 16 ; SI-NEXT: s_cbranch_execnz .LBB49_4 ; SI-NEXT: .LBB49_2: ; %cmp.true -; SI-NEXT: v_add_f64 v[20:21], s[8:9], 1.0 -; SI-NEXT: v_add_f64 v[18:19], s[10:11], 1.0 +; SI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; SI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; SI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; SI-NEXT: v_lshr_b64 v[22:23], v[20:21], 16 ; SI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 @@ -26734,7 +26734,7 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v1 ; SI-NEXT: s_branch .LBB49_5 ; SI-NEXT: .LBB49_3: ; SI-NEXT: ; implicit-def: $sgpr72 @@ -26761,28 +26761,28 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: s_branch .LBB49_2 ; SI-NEXT: .LBB49_4: +; SI-NEXT: v_mov_b32_e32 v21, s11 +; SI-NEXT: v_mov_b32_e32 v19, s9 +; SI-NEXT: v_mov_b32_e32 v17, s7 +; SI-NEXT: v_mov_b32_e32 v15, s5 +; SI-NEXT: v_mov_b32_e32 v13, s29 +; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v6, s22 -; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v10, s26 -; SI-NEXT: v_mov_b32_e32 v19, s11 -; SI-NEXT: v_mov_b32_e32 v17, s7 -; SI-NEXT: v_mov_b32_e32 v15, s5 -; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v12, s28 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: v_mov_b32_e32 v16, s6 -; SI-NEXT: v_mov_b32_e32 v18, s10 -; SI-NEXT: v_mov_b32_e32 v21, s9 -; SI-NEXT: v_mov_b32_e32 v20, s8 +; SI-NEXT: v_mov_b32_e32 v18, s8 +; SI-NEXT: v_mov_b32_e32 v20, s10 ; SI-NEXT: v_mov_b32_e32 v34, s94 ; SI-NEXT: v_mov_b32_e32 v35, s93 ; SI-NEXT: v_mov_b32_e32 v36, s92 @@ -26793,7 +26793,7 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v49, s79 ; SI-NEXT: v_mov_b32_e32 v50, s78 ; SI-NEXT: v_mov_b32_e32 v51, s77 -; SI-NEXT: v_mov_b32_e32 v52, s76 +; SI-NEXT: v_mov_b32_e32 v33, s76 ; SI-NEXT: v_mov_b32_e32 v32, s72 ; SI-NEXT: v_mov_b32_e32 v31, s62 ; SI-NEXT: v_mov_b32_e32 v30, s60 @@ -26806,14 +26806,14 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v23, s14 ; SI-NEXT: v_mov_b32_e32 v22, s12 ; SI-NEXT: .LBB49_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -26830,7 +26830,7 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v0, v0, v32 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33 ; SI-NEXT: v_or_b32_e32 v2, v2, v31 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v51 @@ -26878,10 +26878,10 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: v_readfirstlane_b32 s4, v8 -; VI-NEXT: v_readfirstlane_b32 s9, v7 -; VI-NEXT: v_readfirstlane_b32 s8, v6 -; VI-NEXT: v_readfirstlane_b32 s11, v5 -; VI-NEXT: v_readfirstlane_b32 s10, v4 +; VI-NEXT: v_readfirstlane_b32 s11, v7 +; VI-NEXT: v_readfirstlane_b32 s10, v6 +; VI-NEXT: v_readfirstlane_b32 s9, v5 +; VI-NEXT: v_readfirstlane_b32 s8, v4 ; VI-NEXT: v_readfirstlane_b32 s7, v3 ; VI-NEXT: v_readfirstlane_b32 s6, v2 ; VI-NEXT: v_readfirstlane_b32 s5, v1 @@ -26889,10 +26889,10 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; VI-NEXT: v_readfirstlane_b32 s4, v0 ; VI-NEXT: s_cbranch_scc0 .LBB49_3 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: s_lshr_b32 s14, s9, 16 -; VI-NEXT: s_lshr_b32 s57, s8, 16 -; VI-NEXT: s_lshr_b32 s15, s11, 16 -; VI-NEXT: s_lshr_b32 s58, s10, 16 +; VI-NEXT: s_lshr_b32 s14, s11, 16 +; VI-NEXT: s_lshr_b32 s57, s10, 16 +; VI-NEXT: s_lshr_b32 s15, s9, 16 +; VI-NEXT: s_lshr_b32 s58, s8, 16 ; VI-NEXT: s_lshr_b32 s40, s7, 16 ; VI-NEXT: s_lshr_b32 s59, s6, 16 ; VI-NEXT: s_lshr_b32 s41, s5, 16 @@ -26913,8 +26913,8 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; VI-NEXT: s_lshr_b32 s75, s16, 16 ; VI-NEXT: s_cbranch_execnz .LBB49_4 ; VI-NEXT: .LBB49_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[20:21], s[8:9], 1.0 -; VI-NEXT: v_add_f64 v[18:19], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; VI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; VI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -26981,7 +26981,8 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; VI-NEXT: v_mov_b32_e32 v12, s28 ; VI-NEXT: v_mov_b32_e32 v14, s4 ; VI-NEXT: v_mov_b32_e32 v16, s6 -; VI-NEXT: v_mov_b32_e32 v18, s10 +; VI-NEXT: v_mov_b32_e32 v18, s8 +; VI-NEXT: v_mov_b32_e32 v20, s10 ; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v3, s19 ; VI-NEXT: v_mov_b32_e32 v5, s21 @@ -26991,9 +26992,8 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; VI-NEXT: v_mov_b32_e32 v13, s29 ; VI-NEXT: v_mov_b32_e32 v15, s5 ; VI-NEXT: v_mov_b32_e32 v17, s7 -; VI-NEXT: v_mov_b32_e32 v19, s11 -; VI-NEXT: v_mov_b32_e32 v20, s8 -; VI-NEXT: v_mov_b32_e32 v21, s9 +; VI-NEXT: v_mov_b32_e32 v19, s9 +; VI-NEXT: v_mov_b32_e32 v21, s11 ; VI-NEXT: v_mov_b32_e32 v49, s75 ; VI-NEXT: v_mov_b32_e32 v39, s74 ; VI-NEXT: v_mov_b32_e32 v37, s73 @@ -27067,10 +27067,10 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: v_readfirstlane_b32 s4, v8 -; GFX9-NEXT: v_readfirstlane_b32 s9, v7 -; GFX9-NEXT: v_readfirstlane_b32 s8, v6 -; GFX9-NEXT: v_readfirstlane_b32 s11, v5 -; GFX9-NEXT: v_readfirstlane_b32 s10, v4 +; GFX9-NEXT: v_readfirstlane_b32 s11, v7 +; GFX9-NEXT: v_readfirstlane_b32 s10, v6 +; GFX9-NEXT: v_readfirstlane_b32 s9, v5 +; GFX9-NEXT: v_readfirstlane_b32 s8, v4 ; GFX9-NEXT: v_readfirstlane_b32 s7, v3 ; GFX9-NEXT: v_readfirstlane_b32 s6, v2 ; GFX9-NEXT: v_readfirstlane_b32 s5, v1 @@ -27078,10 +27078,10 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s4, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB49_3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: s_lshr_b32 s14, s9, 16 -; GFX9-NEXT: s_lshr_b32 s57, s8, 16 -; GFX9-NEXT: s_lshr_b32 s15, s11, 16 -; GFX9-NEXT: s_lshr_b32 s58, s10, 16 +; GFX9-NEXT: s_lshr_b32 s14, s11, 16 +; GFX9-NEXT: s_lshr_b32 s57, s10, 16 +; GFX9-NEXT: s_lshr_b32 s15, s9, 16 +; GFX9-NEXT: s_lshr_b32 s58, s8, 16 ; GFX9-NEXT: s_lshr_b32 s40, s7, 16 ; GFX9-NEXT: s_lshr_b32 s59, s6, 16 ; GFX9-NEXT: s_lshr_b32 s41, s5, 16 @@ -27102,8 +27102,8 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; GFX9-NEXT: s_lshr_b32 s75, s16, 16 ; GFX9-NEXT: s_cbranch_execnz .LBB49_4 ; GFX9-NEXT: .LBB49_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[20:21], s[8:9], 1.0 -; GFX9-NEXT: v_add_f64 v[18:19], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; GFX9-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; GFX9-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -27170,7 +27170,8 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v12, s28 ; GFX9-NEXT: v_mov_b32_e32 v14, s4 ; GFX9-NEXT: v_mov_b32_e32 v16, s6 -; GFX9-NEXT: v_mov_b32_e32 v18, s10 +; GFX9-NEXT: v_mov_b32_e32 v18, s8 +; GFX9-NEXT: v_mov_b32_e32 v20, s10 ; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: v_mov_b32_e32 v5, s21 @@ -27180,9 +27181,8 @@ define inreg <44 x i16> @bitcast_v11f64_to_v44i16_scalar(<11 x double> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v13, s29 ; GFX9-NEXT: v_mov_b32_e32 v15, s5 ; GFX9-NEXT: v_mov_b32_e32 v17, s7 -; GFX9-NEXT: v_mov_b32_e32 v19, s11 -; GFX9-NEXT: v_mov_b32_e32 v20, s8 -; GFX9-NEXT: v_mov_b32_e32 v21, s9 +; GFX9-NEXT: v_mov_b32_e32 v19, s9 +; GFX9-NEXT: v_mov_b32_e32 v21, s11 ; GFX9-NEXT: v_mov_b32_e32 v49, s75 ; GFX9-NEXT: v_mov_b32_e32 v39, s74 ; GFX9-NEXT: v_mov_b32_e32 v37, s73 @@ -28590,17 +28590,17 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s35, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s34, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s31, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s30, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s34, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s95, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s94, 16 @@ -28884,17 +28884,17 @@ define inreg <11 x double> @bitcast_v44i16_to_v11f64_scalar(<44 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s71, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s70, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s69, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s68, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s70, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s35, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s34, 16 @@ -29479,8 +29479,8 @@ define <44 x half> @bitcast_v11f64_to_v44f16(<11 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v1 ; SI-NEXT: .LBB52_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -29963,10 +29963,10 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_readfirstlane_b32 s4, v8 -; SI-NEXT: v_readfirstlane_b32 s9, v7 -; SI-NEXT: v_readfirstlane_b32 s8, v6 -; SI-NEXT: v_readfirstlane_b32 s11, v5 -; SI-NEXT: v_readfirstlane_b32 s10, v4 +; SI-NEXT: v_readfirstlane_b32 s11, v7 +; SI-NEXT: v_readfirstlane_b32 s10, v6 +; SI-NEXT: v_readfirstlane_b32 s9, v5 +; SI-NEXT: v_readfirstlane_b32 s8, v4 ; SI-NEXT: v_readfirstlane_b32 s7, v3 ; SI-NEXT: v_readfirstlane_b32 s6, v2 ; SI-NEXT: v_readfirstlane_b32 s5, v1 @@ -29974,8 +29974,8 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; SI-NEXT: v_readfirstlane_b32 s4, v0 ; SI-NEXT: s_cbranch_scc0 .LBB53_3 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_lshr_b32 s94, s9, 16 -; SI-NEXT: s_lshr_b32 s93, s11, 16 +; SI-NEXT: s_lshr_b32 s94, s11, 16 +; SI-NEXT: s_lshr_b32 s93, s9, 16 ; SI-NEXT: s_lshr_b32 s92, s7, 16 ; SI-NEXT: s_lshr_b32 s91, s5, 16 ; SI-NEXT: s_lshr_b32 s90, s29, 16 @@ -29985,8 +29985,8 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; SI-NEXT: s_lshr_b32 s78, s21, 16 ; SI-NEXT: s_lshr_b32 s77, s19, 16 ; SI-NEXT: s_lshr_b32 s76, s17, 16 -; SI-NEXT: s_lshr_b64 s[12:13], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[14:15], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[12:13], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 16 ; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 16 ; SI-NEXT: s_lshr_b64 s[42:43], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[44:45], s[28:29], 16 @@ -29998,8 +29998,8 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; SI-NEXT: s_lshr_b64 s[72:73], s[16:17], 16 ; SI-NEXT: s_cbranch_execnz .LBB53_4 ; SI-NEXT: .LBB53_2: ; %cmp.true -; SI-NEXT: v_add_f64 v[20:21], s[8:9], 1.0 -; SI-NEXT: v_add_f64 v[18:19], s[10:11], 1.0 +; SI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; SI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; SI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; SI-NEXT: v_lshr_b64 v[22:23], v[20:21], 16 ; SI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 @@ -30030,7 +30030,7 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v1 ; SI-NEXT: s_branch .LBB53_5 ; SI-NEXT: .LBB53_3: ; SI-NEXT: ; implicit-def: $sgpr72 @@ -30057,28 +30057,28 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: s_branch .LBB53_2 ; SI-NEXT: .LBB53_4: +; SI-NEXT: v_mov_b32_e32 v21, s11 +; SI-NEXT: v_mov_b32_e32 v19, s9 +; SI-NEXT: v_mov_b32_e32 v17, s7 +; SI-NEXT: v_mov_b32_e32 v15, s5 +; SI-NEXT: v_mov_b32_e32 v13, s29 +; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v6, s22 -; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v10, s26 -; SI-NEXT: v_mov_b32_e32 v19, s11 -; SI-NEXT: v_mov_b32_e32 v17, s7 -; SI-NEXT: v_mov_b32_e32 v15, s5 -; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v12, s28 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: v_mov_b32_e32 v16, s6 -; SI-NEXT: v_mov_b32_e32 v18, s10 -; SI-NEXT: v_mov_b32_e32 v21, s9 -; SI-NEXT: v_mov_b32_e32 v20, s8 +; SI-NEXT: v_mov_b32_e32 v18, s8 +; SI-NEXT: v_mov_b32_e32 v20, s10 ; SI-NEXT: v_mov_b32_e32 v34, s94 ; SI-NEXT: v_mov_b32_e32 v35, s93 ; SI-NEXT: v_mov_b32_e32 v36, s92 @@ -30089,7 +30089,7 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v49, s79 ; SI-NEXT: v_mov_b32_e32 v50, s78 ; SI-NEXT: v_mov_b32_e32 v51, s77 -; SI-NEXT: v_mov_b32_e32 v52, s76 +; SI-NEXT: v_mov_b32_e32 v33, s76 ; SI-NEXT: v_mov_b32_e32 v32, s72 ; SI-NEXT: v_mov_b32_e32 v31, s62 ; SI-NEXT: v_mov_b32_e32 v30, s60 @@ -30102,14 +30102,14 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v23, s14 ; SI-NEXT: v_mov_b32_e32 v22, s12 ; SI-NEXT: .LBB53_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -30126,7 +30126,7 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v0, v0, v32 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v33 ; SI-NEXT: v_or_b32_e32 v2, v2, v31 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v51 @@ -30174,10 +30174,10 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: v_readfirstlane_b32 s4, v8 -; VI-NEXT: v_readfirstlane_b32 s9, v7 -; VI-NEXT: v_readfirstlane_b32 s8, v6 -; VI-NEXT: v_readfirstlane_b32 s11, v5 -; VI-NEXT: v_readfirstlane_b32 s10, v4 +; VI-NEXT: v_readfirstlane_b32 s11, v7 +; VI-NEXT: v_readfirstlane_b32 s10, v6 +; VI-NEXT: v_readfirstlane_b32 s9, v5 +; VI-NEXT: v_readfirstlane_b32 s8, v4 ; VI-NEXT: v_readfirstlane_b32 s7, v3 ; VI-NEXT: v_readfirstlane_b32 s6, v2 ; VI-NEXT: v_readfirstlane_b32 s5, v1 @@ -30185,10 +30185,10 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; VI-NEXT: v_readfirstlane_b32 s4, v0 ; VI-NEXT: s_cbranch_scc0 .LBB53_3 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: s_lshr_b32 s14, s9, 16 -; VI-NEXT: s_lshr_b32 s57, s8, 16 -; VI-NEXT: s_lshr_b32 s15, s11, 16 -; VI-NEXT: s_lshr_b32 s58, s10, 16 +; VI-NEXT: s_lshr_b32 s14, s11, 16 +; VI-NEXT: s_lshr_b32 s57, s10, 16 +; VI-NEXT: s_lshr_b32 s15, s9, 16 +; VI-NEXT: s_lshr_b32 s58, s8, 16 ; VI-NEXT: s_lshr_b32 s40, s7, 16 ; VI-NEXT: s_lshr_b32 s59, s6, 16 ; VI-NEXT: s_lshr_b32 s41, s5, 16 @@ -30209,8 +30209,8 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; VI-NEXT: s_lshr_b32 s75, s16, 16 ; VI-NEXT: s_cbranch_execnz .LBB53_4 ; VI-NEXT: .LBB53_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[20:21], s[8:9], 1.0 -; VI-NEXT: v_add_f64 v[18:19], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; VI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; VI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -30277,7 +30277,8 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; VI-NEXT: v_mov_b32_e32 v12, s28 ; VI-NEXT: v_mov_b32_e32 v14, s4 ; VI-NEXT: v_mov_b32_e32 v16, s6 -; VI-NEXT: v_mov_b32_e32 v18, s10 +; VI-NEXT: v_mov_b32_e32 v18, s8 +; VI-NEXT: v_mov_b32_e32 v20, s10 ; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v3, s19 ; VI-NEXT: v_mov_b32_e32 v5, s21 @@ -30287,9 +30288,8 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; VI-NEXT: v_mov_b32_e32 v13, s29 ; VI-NEXT: v_mov_b32_e32 v15, s5 ; VI-NEXT: v_mov_b32_e32 v17, s7 -; VI-NEXT: v_mov_b32_e32 v19, s11 -; VI-NEXT: v_mov_b32_e32 v20, s8 -; VI-NEXT: v_mov_b32_e32 v21, s9 +; VI-NEXT: v_mov_b32_e32 v19, s9 +; VI-NEXT: v_mov_b32_e32 v21, s11 ; VI-NEXT: v_mov_b32_e32 v49, s75 ; VI-NEXT: v_mov_b32_e32 v39, s74 ; VI-NEXT: v_mov_b32_e32 v37, s73 @@ -30363,10 +30363,10 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: v_readfirstlane_b32 s4, v8 -; GFX9-NEXT: v_readfirstlane_b32 s9, v7 -; GFX9-NEXT: v_readfirstlane_b32 s8, v6 -; GFX9-NEXT: v_readfirstlane_b32 s11, v5 -; GFX9-NEXT: v_readfirstlane_b32 s10, v4 +; GFX9-NEXT: v_readfirstlane_b32 s11, v7 +; GFX9-NEXT: v_readfirstlane_b32 s10, v6 +; GFX9-NEXT: v_readfirstlane_b32 s9, v5 +; GFX9-NEXT: v_readfirstlane_b32 s8, v4 ; GFX9-NEXT: v_readfirstlane_b32 s7, v3 ; GFX9-NEXT: v_readfirstlane_b32 s6, v2 ; GFX9-NEXT: v_readfirstlane_b32 s5, v1 @@ -30374,10 +30374,10 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; GFX9-NEXT: v_readfirstlane_b32 s4, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB53_3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: s_lshr_b32 s14, s9, 16 -; GFX9-NEXT: s_lshr_b32 s57, s8, 16 -; GFX9-NEXT: s_lshr_b32 s15, s11, 16 -; GFX9-NEXT: s_lshr_b32 s58, s10, 16 +; GFX9-NEXT: s_lshr_b32 s14, s11, 16 +; GFX9-NEXT: s_lshr_b32 s57, s10, 16 +; GFX9-NEXT: s_lshr_b32 s15, s9, 16 +; GFX9-NEXT: s_lshr_b32 s58, s8, 16 ; GFX9-NEXT: s_lshr_b32 s40, s7, 16 ; GFX9-NEXT: s_lshr_b32 s59, s6, 16 ; GFX9-NEXT: s_lshr_b32 s41, s5, 16 @@ -30398,8 +30398,8 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; GFX9-NEXT: s_lshr_b32 s75, s16, 16 ; GFX9-NEXT: s_cbranch_execnz .LBB53_4 ; GFX9-NEXT: .LBB53_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[20:21], s[8:9], 1.0 -; GFX9-NEXT: v_add_f64 v[18:19], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; GFX9-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; GFX9-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -30466,7 +30466,8 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v12, s28 ; GFX9-NEXT: v_mov_b32_e32 v14, s4 ; GFX9-NEXT: v_mov_b32_e32 v16, s6 -; GFX9-NEXT: v_mov_b32_e32 v18, s10 +; GFX9-NEXT: v_mov_b32_e32 v18, s8 +; GFX9-NEXT: v_mov_b32_e32 v20, s10 ; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: v_mov_b32_e32 v5, s21 @@ -30476,9 +30477,8 @@ define inreg <44 x half> @bitcast_v11f64_to_v44f16_scalar(<11 x double> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v13, s29 ; GFX9-NEXT: v_mov_b32_e32 v15, s5 ; GFX9-NEXT: v_mov_b32_e32 v17, s7 -; GFX9-NEXT: v_mov_b32_e32 v19, s11 -; GFX9-NEXT: v_mov_b32_e32 v20, s8 -; GFX9-NEXT: v_mov_b32_e32 v21, s9 +; GFX9-NEXT: v_mov_b32_e32 v19, s9 +; GFX9-NEXT: v_mov_b32_e32 v21, s11 ; GFX9-NEXT: v_mov_b32_e32 v49, s75 ; GFX9-NEXT: v_mov_b32_e32 v39, s74 ; GFX9-NEXT: v_mov_b32_e32 v37, s73 @@ -30973,10 +30973,10 @@ define <11 x double> @bitcast_v44f16_to_v11f64(<44 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v45 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v44 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v43 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -31113,168 +31113,168 @@ define <11 x double> @bitcast_v44f16_to_v11f64(<44 x half> %a, i32 %b) #0 { ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB54_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v63 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v33 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v33 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v44 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v32 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: v_cvt_f32_f16_e32 v3, v43 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v42 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v43 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v62 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v41 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v40 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v55 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v42 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, v61 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v41 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v54 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v53 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v56 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, v60 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v40 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v59 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v52 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v51 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v49 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v55 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v58 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v54 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v48 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v18, v37 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v57 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v53 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v56 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v52 ; SI-NEXT: v_or_b32_e32 v8, v9, v8 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v51 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v46 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v50 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v12, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v50 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v20, v35 -; SI-NEXT: v_cvt_f32_f16_e32 v21, v34 -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v14, v49 ; SI-NEXT: v_or_b32_e32 v11, v12, v11 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 ; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v48 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v18, v37 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f32_f16_e32 v20, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v34 +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: v_or_b32_e32 v13, v15, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v15, v39 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 ; SI-NEXT: v_or_b32_e32 v14, v15, v14 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v15, v17, v15 ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 @@ -31985,17 +31985,17 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s35, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s34, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s31, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s30, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s34, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s95, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s94, 16 @@ -32357,17 +32357,17 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s71, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s70, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s69, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s68, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s70, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s35, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s34, 16 @@ -32424,13 +32424,13 @@ define inreg <11 x double> @bitcast_v44f16_to_v11f64_scalar(<44 x half> inreg %a ; VI-NEXT: .LBB55_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v21, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s71 -; VI-NEXT: v_mov_b32_e32 v2, s70 ; VI-NEXT: v_add_f16_sdwa v0, v0, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v21 -; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v21 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s70 +; VI-NEXT: v_add_f16_sdwa v1, v1, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v21 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s69 ; VI-NEXT: v_add_f16_sdwa v2, v2, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v21 @@ -32872,13 +32872,13 @@ define <44 x half> @bitcast_v44i16_to_v44f16(<44 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v1 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v3 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v22 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v39 ; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v36 ; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; kill: killed $vgpr22 @@ -32920,59 +32920,59 @@ define <44 x half> @bitcast_v44i16_to_v44f16(<44 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; kill: killed $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v20 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v20 ; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v18 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v18 ; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v17 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v14 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v12 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v10 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v10 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v6 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v5 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v4 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v2 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v6 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v4 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v2 ; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v0 ; SI-NEXT: ; kill: killed $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr22 -; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v52 -; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v50 -; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v37 -; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v34 -; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v31 -; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v49 -; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v29 -; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v38 -; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 -; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v26 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v35 -; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v25 -; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v33 -; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v24 -; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v30 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v49 ; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v30 ; SI-NEXT: ; kill: killed $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr22 -; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr52 -; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: ; implicit-def: $vgpr53 +; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; kill: killed $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc @@ -32981,106 +32981,106 @@ define <44 x half> @bitcast_v44i16_to_v44f16(<44 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v51 -; SI-NEXT: v_or_b32_e32 v42, v1, v22 -; SI-NEXT: v_alignbit_b32 v1, v42, v46, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v39 +; SI-NEXT: v_or_b32_e32 v55, v1, v22 +; SI-NEXT: v_alignbit_b32 v1, v55, v43, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48 -; SI-NEXT: v_or_b32_e32 v40, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v40, v47, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36 +; SI-NEXT: v_or_b32_e32 v53, v1, v3 +; SI-NEXT: v_alignbit_b32 v1, v53, v45, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5 -; SI-NEXT: v_or_b32_e32 v54, v1, v62 -; SI-NEXT: v_alignbit_b32 v1, v54, v56, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v51, v1, v37 +; SI-NEXT: v_alignbit_b32 v1, v51, v46, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7 -; SI-NEXT: v_or_b32_e32 v52, v1, v32 -; SI-NEXT: v_alignbit_b32 v1, v52, v59, 16 +; SI-NEXT: v_or_b32_e32 v50, v1, v52 +; SI-NEXT: v_alignbit_b32 v1, v50, v56, 16 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9 -; SI-NEXT: v_or_b32_e32 v0, v0, v46 -; SI-NEXT: v_or_b32_e32 v49, v1, v39 +; SI-NEXT: v_or_b32_e32 v0, v0, v43 +; SI-NEXT: v_or_b32_e32 v48, v1, v54 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2 -; SI-NEXT: v_alignbit_b32 v1, v49, v61, 16 -; SI-NEXT: v_or_b32_e32 v0, v0, v47 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v48, v57, 16 +; SI-NEXT: v_or_b32_e32 v0, v0, v45 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4 -; SI-NEXT: v_or_b32_e32 v38, v1, v53 -; SI-NEXT: v_or_b32_e32 v0, v0, v56 -; SI-NEXT: v_alignbit_b32 v1, v38, v43, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v38, v1, v44 +; SI-NEXT: v_or_b32_e32 v0, v0, v46 +; SI-NEXT: v_alignbit_b32 v1, v38, v60, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13 -; SI-NEXT: v_or_b32_e32 v0, v0, v59 -; SI-NEXT: v_or_b32_e32 v35, v1, v41 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v56 +; SI-NEXT: v_or_b32_e32 v35, v1, v58 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8 -; SI-NEXT: v_alignbit_b32 v1, v35, v36, 16 -; SI-NEXT: v_or_b32_e32 v0, v0, v61 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v35, v63, 16 +; SI-NEXT: v_or_b32_e32 v0, v0, v57 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v33, v1, v45 -; SI-NEXT: v_or_b32_e32 v0, v0, v43 -; SI-NEXT: v_alignbit_b32 v1, v33, v50, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v33, v1, v61 +; SI-NEXT: v_or_b32_e32 v0, v0, v60 +; SI-NEXT: v_alignbit_b32 v1, v33, v49, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v0, v0, v36 -; SI-NEXT: v_or_b32_e32 v30, v1, v63 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v63 +; SI-NEXT: v_or_b32_e32 v32, v1, v42 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14 -; SI-NEXT: v_alignbit_b32 v1, v30, v55, 16 -; SI-NEXT: v_or_b32_e32 v0, v0, v50 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v32, v41, 16 +; SI-NEXT: v_or_b32_e32 v0, v0, v49 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v28, v1, v57 -; SI-NEXT: v_or_b32_e32 v0, v0, v55 -; SI-NEXT: v_alignbit_b32 v1, v28, v58, 16 +; SI-NEXT: v_or_b32_e32 v30, v1, v59 +; SI-NEXT: v_or_b32_e32 v0, v0, v41 +; SI-NEXT: v_alignbit_b32 v1, v30, v47, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21 -; SI-NEXT: v_or_b32_e32 v0, v0, v58 -; SI-NEXT: v_or_b32_e32 v22, v1, v60 +; SI-NEXT: v_or_b32_e32 v0, v0, v47 +; SI-NEXT: v_or_b32_e32 v22, v1, v62 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: v_alignbit_b32 v1, v22, v44, 16 -; SI-NEXT: v_or_b32_e32 v0, v0, v44 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: v_alignbit_b32 v1, v22, v40, 16 +; SI-NEXT: v_or_b32_e32 v0, v0, v40 +; SI-NEXT: ; kill: killed $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0 ; SI-NEXT: ; implicit-def: $vgpr1 @@ -33104,42 +33104,42 @@ define <44 x half> @bitcast_v44i16_to_v44f16(<44 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr19 ; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr46 -; SI-NEXT: ; kill: killed $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr47 -; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr56 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: ; implicit-def: $vgpr59 -; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr61 -; SI-NEXT: ; implicit-def: $vgpr53 ; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; kill: killed $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr45 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr63 -; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr44 +; SI-NEXT: ; implicit-def: $vgpr60 +; SI-NEXT: ; implicit-def: $vgpr58 +; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr41 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr47 +; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: .LBB56_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB56_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; SI-NEXT: v_or_b32_e32 v20, v44, v20 +; SI-NEXT: v_or_b32_e32 v20, v40, v20 ; SI-NEXT: v_add_i32_e32 v23, vcc, 0x30000, v20 ; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v21 ; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v20, v60, v20 -; SI-NEXT: v_or_b32_e32 v18, v58, v18 +; SI-NEXT: v_or_b32_e32 v20, v62, v20 +; SI-NEXT: v_or_b32_e32 v18, v47, v18 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v20 ; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v18 @@ -33147,177 +33147,188 @@ define <44 x half> @bitcast_v44i16_to_v44f16(<44 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v18, v57, v18 -; SI-NEXT: v_or_b32_e32 v16, v55, v16 -; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v18 +; SI-NEXT: v_or_b32_e32 v18, v59, v18 +; SI-NEXT: v_or_b32_e32 v16, v41, v16 +; SI-NEXT: v_add_i32_e32 v30, vcc, s6, v18 ; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v17 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v16, v63, v16 -; SI-NEXT: v_or_b32_e32 v14, v50, v14 -; SI-NEXT: v_add_i32_e32 v30, vcc, s6, v16 +; SI-NEXT: v_or_b32_e32 v16, v42, v16 +; SI-NEXT: v_or_b32_e32 v14, v49, v14 +; SI-NEXT: v_add_i32_e32 v32, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v15 ; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v14, v45, v14 -; SI-NEXT: v_or_b32_e32 v12, v36, v12 +; SI-NEXT: v_or_b32_e32 v14, v61, v14 +; SI-NEXT: v_or_b32_e32 v12, v63, v12 ; SI-NEXT: v_add_i32_e32 v33, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v12 ; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v13 ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v12, v41, v12 -; SI-NEXT: v_or_b32_e32 v10, v43, v10 +; SI-NEXT: v_or_b32_e32 v12, v58, v12 +; SI-NEXT: v_or_b32_e32 v10, v60, v10 ; SI-NEXT: v_add_i32_e32 v35, vcc, s6, v12 ; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v10 ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11 ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v10, v53, v10 -; SI-NEXT: v_or_b32_e32 v8, v61, v8 +; SI-NEXT: v_or_b32_e32 v10, v44, v10 +; SI-NEXT: v_or_b32_e32 v8, v57, v8 ; SI-NEXT: v_add_i32_e32 v38, vcc, s6, v10 ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v9 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v8, v39, v8 -; SI-NEXT: v_or_b32_e32 v6, v59, v6 -; SI-NEXT: v_add_i32_e32 v49, vcc, s6, v8 +; SI-NEXT: v_or_b32_e32 v8, v54, v8 +; SI-NEXT: v_or_b32_e32 v6, v56, v6 +; SI-NEXT: v_add_i32_e32 v48, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v7 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_or_b32_e32 v6, v32, v6 -; SI-NEXT: v_or_b32_e32 v4, v56, v4 -; SI-NEXT: v_add_i32_e32 v52, vcc, s6, v6 +; SI-NEXT: v_or_b32_e32 v6, v52, v6 +; SI-NEXT: v_or_b32_e32 v4, v46, v4 +; SI-NEXT: v_add_i32_e32 v50, vcc, s6, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v5 ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v4, v62, v4 -; SI-NEXT: v_or_b32_e32 v2, v47, v2 -; SI-NEXT: v_add_i32_e32 v54, vcc, s6, v4 +; SI-NEXT: v_or_b32_e32 v4, v37, v4 +; SI-NEXT: v_or_b32_e32 v2, v45, v2 +; SI-NEXT: v_add_i32_e32 v51, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v3 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v46, v0 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v54 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v52 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v49 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v38 +; SI-NEXT: v_or_b32_e32 v0, v43, v0 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v51 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v50 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v48 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v38 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v35 ; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v33 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v30 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v28 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v32 +; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v30 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_add_i32_e32 v40, vcc, s6, v2 +; SI-NEXT: v_add_i32_e32 v53, vcc, s6, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v40 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v53 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v0 -; SI-NEXT: v_alignbit_b32 v0, v42, v2, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v0 +; SI-NEXT: v_alignbit_b32 v0, v55, v2, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v40, v4, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v53, v4, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v54, v6, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v51, v6, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v52, v8, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v50, v8, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v49, v10, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v48, v10, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_alignbit_b32 v0, v38, v12, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_alignbit_b32 v0, v35, v14, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_alignbit_b32 v0, v33, v16, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v30, v18, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v32, v18, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v28, v20, 16 +; SI-NEXT: v_alignbit_b32 v0, v30, v20, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_alignbit_b32 v0, v22, v23, 16 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v55 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v22 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: .LBB56_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v51 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v48 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v37 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v31 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v29 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v28 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v27 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v26 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v25 +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v24 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v42 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v55 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: s_waitcnt vmcnt(6) ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 @@ -33334,49 +33345,33 @@ define <44 x half> @bitcast_v44i16_to_v44f16(<44 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v40 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v53 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v54 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v51 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v52 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v50 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v49 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v48 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v38 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 @@ -33392,13 +33387,13 @@ define <44 x half> @bitcast_v44i16_to_v44f16(<44 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v30 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v32 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v28 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v30 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) @@ -33871,229 +33866,270 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i ; SI-NEXT: v_writelane_b32 v22, s85, 27 ; SI-NEXT: v_writelane_b32 v22, s86, 28 ; SI-NEXT: v_writelane_b32 v22, s87, 29 -; SI-NEXT: v_writelane_b32 v22, s30, 30 -; SI-NEXT: v_writelane_b32 v22, s31, 31 -; SI-NEXT: v_readfirstlane_b32 s85, v7 -; SI-NEXT: v_readfirstlane_b32 s87, v6 -; SI-NEXT: v_readfirstlane_b32 s82, v5 -; SI-NEXT: v_readfirstlane_b32 s84, v4 -; SI-NEXT: v_readfirstlane_b32 s71, v3 -; SI-NEXT: v_readfirstlane_b32 s81, v2 -; SI-NEXT: v_readfirstlane_b32 s68, v1 -; SI-NEXT: v_readfirstlane_b32 s70, v0 -; SI-NEXT: s_lshr_b32 s48, s29, 16 -; SI-NEXT: s_lshr_b32 s67, s28, 16 -; SI-NEXT: s_lshr_b32 s39, s27, 16 -; SI-NEXT: s_lshr_b32 s66, s26, 16 -; SI-NEXT: s_lshr_b32 s38, s25, 16 -; SI-NEXT: s_lshr_b32 s65, s24, 16 -; SI-NEXT: s_lshr_b32 s37, s23, 16 -; SI-NEXT: s_lshr_b32 s64, s22, 16 -; SI-NEXT: s_lshr_b32 s36, s21, 16 -; SI-NEXT: s_lshr_b32 s55, s20, 16 -; SI-NEXT: s_lshr_b32 s35, s19, 16 -; SI-NEXT: s_lshr_b32 s54, s18, 16 -; SI-NEXT: s_lshr_b32 s34, s17, 16 -; SI-NEXT: s_lshr_b32 s53, s16, 16 -; SI-NEXT: s_lshr_b32 s52, s85, 16 -; SI-NEXT: s_lshr_b32 s86, s87, 16 -; SI-NEXT: s_lshr_b32 s51, s82, 16 -; SI-NEXT: s_lshr_b32 s83, s84, 16 -; SI-NEXT: s_lshr_b32 s50, s71, 16 -; SI-NEXT: s_lshr_b32 s80, s81, 16 -; SI-NEXT: s_lshr_b32 s49, s68, 16 -; SI-NEXT: s_lshr_b32 s69, s70, 16 +; SI-NEXT: v_writelane_b32 v22, s96, 30 +; SI-NEXT: v_writelane_b32 v22, s97, 31 +; SI-NEXT: v_writelane_b32 v22, s98, 32 +; SI-NEXT: v_writelane_b32 v22, s99, 33 +; SI-NEXT: v_writelane_b32 v22, s30, 34 +; SI-NEXT: v_writelane_b32 v22, s31, 35 +; SI-NEXT: v_readfirstlane_b32 s72, v7 +; SI-NEXT: v_readfirstlane_b32 s74, v6 +; SI-NEXT: v_readfirstlane_b32 s61, v5 +; SI-NEXT: v_readfirstlane_b32 s63, v4 +; SI-NEXT: v_readfirstlane_b32 s58, v3 +; SI-NEXT: v_readfirstlane_b32 s60, v2 +; SI-NEXT: v_readfirstlane_b32 s98, v1 +; SI-NEXT: v_readfirstlane_b32 s97, v0 +; SI-NEXT: s_lshr_b32 s62, s29, 16 +; SI-NEXT: s_lshr_b32 s71, s28, 16 +; SI-NEXT: s_lshr_b32 s59, s27, 16 +; SI-NEXT: s_lshr_b32 s93, s26, 16 +; SI-NEXT: s_lshr_b32 s49, s25, 16 +; SI-NEXT: s_lshr_b32 s91, s24, 16 +; SI-NEXT: s_lshr_b32 s92, s23, 16 +; SI-NEXT: s_lshr_b32 s89, s22, 16 +; SI-NEXT: s_lshr_b32 s90, s21, 16 +; SI-NEXT: s_lshr_b32 s79, s20, 16 +; SI-NEXT: s_lshr_b32 s88, s19, 16 +; SI-NEXT: s_lshr_b32 s77, s18, 16 +; SI-NEXT: s_lshr_b32 s78, s17, 16 +; SI-NEXT: s_lshr_b32 s31, s16, 16 +; SI-NEXT: s_lshr_b32 s96, s72, 16 +; SI-NEXT: s_lshr_b32 s39, s74, 16 +; SI-NEXT: s_lshr_b32 s75, s61, 16 +; SI-NEXT: s_lshr_b32 s37, s63, 16 +; SI-NEXT: s_lshr_b32 s73, s58, 16 +; SI-NEXT: s_lshr_b32 s35, s60, 16 +; SI-NEXT: s_lshr_b32 s99, s98, 16 +; SI-NEXT: s_lshr_b32 s76, s97, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v8 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB57_4 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s7, s34, 16 -; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s62, s53, 16 -; SI-NEXT: s_or_b32 s63, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s78, 16 +; SI-NEXT: s_or_b32 s67, s5, s7 ; SI-NEXT: s_and_b32 s5, s19, 0xffff -; SI-NEXT: s_lshl_b32 s7, s35, 16 -; SI-NEXT: s_or_b32 s56, s4, s62 -; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s72, s54, 16 -; SI-NEXT: s_or_b32 s73, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s88, 16 +; SI-NEXT: s_or_b32 s65, s5, s7 ; SI-NEXT: s_and_b32 s5, s21, 0xffff -; SI-NEXT: s_lshl_b32 s7, s36, 16 -; SI-NEXT: s_or_b32 s46, s4, s72 -; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s74, s55, 16 -; SI-NEXT: s_or_b32 s75, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s90, 16 +; SI-NEXT: s_or_b32 s55, s5, s7 ; SI-NEXT: s_and_b32 s5, s23, 0xffff -; SI-NEXT: s_lshl_b32 s7, s37, 16 -; SI-NEXT: s_or_b32 s44, s4, s74 -; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s76, s64, 16 -; SI-NEXT: s_or_b32 s77, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s92, 16 +; SI-NEXT: s_or_b32 s53, s5, s7 ; SI-NEXT: s_and_b32 s5, s25, 0xffff -; SI-NEXT: s_lshl_b32 s7, s38, 16 -; SI-NEXT: s_or_b32 s42, s4, s76 -; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s78, s65, 16 -; SI-NEXT: s_or_b32 s79, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s49, 16 +; SI-NEXT: s_or_b32 s51, s5, s7 ; SI-NEXT: s_and_b32 s5, s27, 0xffff -; SI-NEXT: s_lshl_b32 s7, s39, 16 -; SI-NEXT: s_or_b32 s40, s4, s78 -; SI-NEXT: s_and_b32 s4, s26, 0xffff -; SI-NEXT: s_lshl_b32 s88, s66, 16 -; SI-NEXT: s_or_b32 s89, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s59, 16 +; SI-NEXT: s_lshl_b32 s48, s93, 16 +; SI-NEXT: s_mov_b32 s13, s49 +; SI-NEXT: s_or_b32 s49, s5, s7 +; SI-NEXT: s_lshl_b32 s64, s77, 16 +; SI-NEXT: s_lshl_b32 s36, s76, 16 +; SI-NEXT: s_mov_b32 s5, s77 +; SI-NEXT: s_mov_b32 s9, s76 +; SI-NEXT: s_lshr_b64 s[76:77], s[48:49], 16 +; SI-NEXT: s_lshr_b64 s[80:81], s[64:65], 16 +; SI-NEXT: s_mov_b32 s77, s5 ; SI-NEXT: s_and_b32 s5, s29, 0xffff -; SI-NEXT: s_lshl_b32 s7, s48, 16 -; SI-NEXT: s_or_b32 s14, s4, s88 +; SI-NEXT: s_lshl_b32 s7, s62, 16 +; SI-NEXT: s_and_b32 s4, s16, 0xffff +; SI-NEXT: s_lshl_b32 s66, s31, 16 +; SI-NEXT: s_lshl_b32 s38, s71, 16 +; SI-NEXT: s_lshl_b32 vcc_lo, s39, 16 +; SI-NEXT: s_mov_b32 s81, s39 +; SI-NEXT: s_or_b32 s39, s5, s7 +; SI-NEXT: s_or_b32 s56, s4, s66 +; SI-NEXT: s_and_b32 s4, s18, 0xffff +; SI-NEXT: s_lshl_b32 s54, s79, 16 +; SI-NEXT: s_mov_b32 s5, s79 +; SI-NEXT: s_mov_b32 s11, s78 +; SI-NEXT: s_lshr_b64 s[78:79], s[38:39], 16 +; SI-NEXT: s_or_b32 s46, s4, s64 +; SI-NEXT: s_and_b32 s4, s20, 0xffff +; SI-NEXT: s_mov_b32 s79, s5 +; SI-NEXT: s_and_b32 s5, s98, 0xffff +; SI-NEXT: s_lshl_b32 s7, s99, 16 +; SI-NEXT: s_or_b32 s44, s4, s54 +; SI-NEXT: s_and_b32 s4, s22, 0xffff +; SI-NEXT: s_lshl_b32 s52, s89, 16 +; SI-NEXT: s_lshl_b32 s30, s37, 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[66:67], 16 +; SI-NEXT: s_mov_b32 s66, s37 +; SI-NEXT: s_or_b32 s37, s5, s7 +; SI-NEXT: s_or_b32 s42, s4, s52 +; SI-NEXT: s_and_b32 s4, s24, 0xffff +; SI-NEXT: s_lshl_b32 s50, s91, 16 +; SI-NEXT: s_mov_b32 s5, s89 +; SI-NEXT: s_mov_b32 s64, s88 +; SI-NEXT: s_lshr_b64 s[88:89], s[36:37], 16 +; SI-NEXT: s_or_b32 s40, s4, s50 +; SI-NEXT: s_and_b32 s4, s26, 0xffff +; SI-NEXT: s_mov_b32 s89, s5 +; SI-NEXT: s_and_b32 s5, s58, 0xffff +; SI-NEXT: s_lshl_b32 s7, s73, 16 +; SI-NEXT: s_or_b32 s14, s4, s48 ; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s90, s67, 16 -; SI-NEXT: s_or_b32 s91, s5, s7 -; SI-NEXT: s_and_b32 s5, s68, 0xffff -; SI-NEXT: s_lshl_b32 s7, s49, 16 -; SI-NEXT: s_or_b32 s12, s4, s90 -; SI-NEXT: s_and_b32 s4, s70, 0xffff -; SI-NEXT: s_lshl_b32 s92, s69, 16 -; SI-NEXT: s_or_b32 s93, s5, s7 -; SI-NEXT: s_and_b32 s5, s71, 0xffff -; SI-NEXT: s_lshl_b32 s7, s50, 16 -; SI-NEXT: s_or_b32 s10, s4, s92 -; SI-NEXT: s_and_b32 s4, s81, 0xffff -; SI-NEXT: s_lshl_b32 s94, s80, 16 -; SI-NEXT: s_or_b32 s95, s5, s7 -; SI-NEXT: s_and_b32 s5, s82, 0xffff -; SI-NEXT: s_lshl_b32 s7, s51, 16 -; SI-NEXT: s_or_b32 s8, s4, s94 -; SI-NEXT: s_and_b32 s4, s84, 0xffff -; SI-NEXT: s_lshl_b32 s30, s83, 16 +; SI-NEXT: s_lshl_b32 s34, s35, 16 +; SI-NEXT: s_lshr_b64 s[82:83], s[54:55], 16 +; SI-NEXT: s_mov_b32 s54, s35 +; SI-NEXT: s_or_b32 s35, s5, s7 +; SI-NEXT: s_or_b32 s12, s4, s38 +; SI-NEXT: s_and_b32 s4, s97, 0xffff +; SI-NEXT: s_mov_b32 s5, s91 +; SI-NEXT: s_mov_b32 s95, s90 +; SI-NEXT: s_lshr_b64 s[90:91], s[34:35], 16 +; SI-NEXT: s_or_b32 s10, s4, s36 +; SI-NEXT: s_and_b32 s4, s60, 0xffff +; SI-NEXT: s_mov_b32 s91, s5 +; SI-NEXT: s_and_b32 s5, s61, 0xffff +; SI-NEXT: s_lshl_b32 s7, s75, 16 +; SI-NEXT: s_or_b32 s8, s4, s34 +; SI-NEXT: s_mov_b32 s34, s31 ; SI-NEXT: s_or_b32 s31, s5, s7 -; SI-NEXT: s_and_b32 s5, s85, 0xffff -; SI-NEXT: s_lshl_b32 s7, s52, 16 -; SI-NEXT: s_or_b32 s6, s4, s30 -; SI-NEXT: s_and_b32 s4, s87, 0xffff -; SI-NEXT: s_lshl_b32 vcc_lo, s86, 16 +; SI-NEXT: s_mov_b32 s5, s93 +; SI-NEXT: s_mov_b32 s36, s92 +; SI-NEXT: s_lshr_b64 s[92:93], s[30:31], 16 +; SI-NEXT: s_mov_b32 s93, s5 +; SI-NEXT: s_and_b32 s5, s72, 0xffff +; SI-NEXT: s_lshl_b32 s7, s96, 16 +; SI-NEXT: s_and_b32 s4, s63, 0xffff ; SI-NEXT: s_or_b32 vcc_hi, s5, s7 +; SI-NEXT: s_or_b32 s6, s4, s30 +; SI-NEXT: s_and_b32 s4, s74, 0xffff +; SI-NEXT: s_mov_b32 s5, s71 +; SI-NEXT: s_lshr_b64 s[70:71], vcc, 16 ; SI-NEXT: s_or_b32 s4, s4, vcc_lo -; SI-NEXT: s_lshr_b64 s[58:59], s[62:63], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[72:73], 16 -; SI-NEXT: s_mov_b32 s57, s63 -; SI-NEXT: s_lshr_b64 s[62:63], s[74:75], 16 -; SI-NEXT: s_mov_b32 s47, s73 -; SI-NEXT: s_lshr_b64 s[72:73], s[76:77], 16 -; SI-NEXT: s_mov_b32 s45, s75 -; SI-NEXT: s_lshr_b64 s[74:75], s[78:79], 16 -; SI-NEXT: s_mov_b32 s43, s77 -; SI-NEXT: s_lshr_b64 s[76:77], s[88:89], 16 -; SI-NEXT: s_mov_b32 s41, s79 -; SI-NEXT: s_lshr_b64 s[78:79], s[90:91], 16 -; SI-NEXT: s_mov_b32 s15, s89 -; SI-NEXT: s_lshr_b64 s[88:89], s[92:93], 16 -; SI-NEXT: s_mov_b32 s13, s91 -; SI-NEXT: s_lshr_b64 s[90:91], s[94:95], 16 -; SI-NEXT: s_mov_b32 s11, s93 -; SI-NEXT: s_lshr_b64 s[92:93], s[30:31], 16 -; SI-NEXT: s_mov_b32 s9, s95 -; SI-NEXT: s_lshr_b64 s[94:95], vcc, 16 +; SI-NEXT: s_lshr_b64 s[84:85], s[52:53], 16 +; SI-NEXT: s_lshr_b64 s[86:87], s[50:51], 16 +; SI-NEXT: s_mov_b32 s71, s5 +; SI-NEXT: s_mov_b64 s[68:69], 0 +; SI-NEXT: s_mov_b32 s57, s67 +; SI-NEXT: s_mov_b32 s47, s65 +; SI-NEXT: s_mov_b32 s45, s55 +; SI-NEXT: s_mov_b32 s43, s53 +; SI-NEXT: s_mov_b32 s52, s78 +; SI-NEXT: s_mov_b32 s78, s11 +; SI-NEXT: s_mov_b32 s41, s51 +; SI-NEXT: s_mov_b32 s50, s76 +; SI-NEXT: s_mov_b32 s76, s9 +; SI-NEXT: s_mov_b32 s15, s49 +; SI-NEXT: s_mov_b32 s49, s13 +; SI-NEXT: s_mov_b32 s13, s39 +; SI-NEXT: s_mov_b32 s39, s81 +; SI-NEXT: s_mov_b32 s11, s37 +; SI-NEXT: s_mov_b32 s37, s66 +; SI-NEXT: s_mov_b32 s66, s92 +; SI-NEXT: s_mov_b32 s92, s36 +; SI-NEXT: s_mov_b32 s9, s35 +; SI-NEXT: s_mov_b32 s35, s54 +; SI-NEXT: s_mov_b32 s54, s88 +; SI-NEXT: s_mov_b32 s88, s64 +; SI-NEXT: s_mov_b32 s64, s90 +; SI-NEXT: s_mov_b32 s90, s95 ; SI-NEXT: s_mov_b32 s7, s31 -; SI-NEXT: s_mov_b64 s[30:31], 0 +; SI-NEXT: s_mov_b32 s31, s34 ; SI-NEXT: s_mov_b32 s5, vcc_hi ; SI-NEXT: s_cbranch_execnz .LBB57_3 ; SI-NEXT: .LBB57_2: ; %cmp.true -; SI-NEXT: s_add_i32 s87, s87, 3 -; SI-NEXT: s_and_b32 s4, s87, 0xffff -; SI-NEXT: s_lshl_b32 s5, s86, 16 -; SI-NEXT: s_add_i32 s85, s85, 3 +; SI-NEXT: s_add_i32 s74, s74, 3 +; SI-NEXT: s_and_b32 s4, s74, 0xffff +; SI-NEXT: s_lshl_b32 s5, s39, 16 +; SI-NEXT: s_add_i32 s72, s72, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s85, 0xffff -; SI-NEXT: s_lshl_b32 s6, s52, 16 -; SI-NEXT: s_add_i32 s84, s84, 3 +; SI-NEXT: s_and_b32 s5, s72, 0xffff +; SI-NEXT: s_lshl_b32 s6, s96, 16 +; SI-NEXT: s_add_i32 s63, s63, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s84, 0xffff -; SI-NEXT: s_lshl_b32 s7, s83, 16 -; SI-NEXT: s_add_i32 s82, s82, 3 +; SI-NEXT: s_and_b32 s6, s63, 0xffff +; SI-NEXT: s_lshl_b32 s7, s37, 16 +; SI-NEXT: s_add_i32 s61, s61, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s82, 0xffff -; SI-NEXT: s_lshl_b32 s8, s51, 16 -; SI-NEXT: s_add_i32 s81, s81, 3 +; SI-NEXT: s_and_b32 s7, s61, 0xffff +; SI-NEXT: s_lshl_b32 s8, s75, 16 +; SI-NEXT: s_add_i32 s60, s60, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s81, 0xffff -; SI-NEXT: s_lshl_b32 s9, s80, 16 -; SI-NEXT: s_add_i32 s71, s71, 3 +; SI-NEXT: s_and_b32 s8, s60, 0xffff +; SI-NEXT: s_lshl_b32 s9, s35, 16 +; SI-NEXT: s_add_i32 s58, s58, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s71, 0xffff -; SI-NEXT: s_lshl_b32 s10, s50, 16 -; SI-NEXT: s_add_i32 s70, s70, 3 +; SI-NEXT: s_and_b32 s9, s58, 0xffff +; SI-NEXT: s_lshl_b32 s10, s73, 16 +; SI-NEXT: s_add_i32 s97, s97, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s70, 0xffff -; SI-NEXT: s_lshl_b32 s11, s69, 16 -; SI-NEXT: s_add_i32 s68, s68, 3 +; SI-NEXT: s_and_b32 s10, s97, 0xffff +; SI-NEXT: s_lshl_b32 s11, s76, 16 +; SI-NEXT: s_add_i32 s98, s98, 3 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s68, 0xffff -; SI-NEXT: s_lshl_b32 s12, s49, 16 +; SI-NEXT: s_and_b32 s11, s98, 0xffff +; SI-NEXT: s_lshl_b32 s12, s99, 16 ; SI-NEXT: s_add_i32 s28, s28, 3 ; SI-NEXT: s_or_b32 s11, s12, s11 ; SI-NEXT: s_and_b32 s12, s28, 0xffff -; SI-NEXT: s_lshl_b32 s13, s67, 16 +; SI-NEXT: s_lshl_b32 s13, s71, 16 ; SI-NEXT: s_add_i32 s29, s29, 3 ; SI-NEXT: s_or_b32 s12, s13, s12 ; SI-NEXT: s_and_b32 s13, s29, 0xffff -; SI-NEXT: s_lshl_b32 s14, s48, 16 +; SI-NEXT: s_lshl_b32 s14, s62, 16 ; SI-NEXT: s_add_i32 s26, s26, 3 ; SI-NEXT: s_or_b32 s13, s14, s13 ; SI-NEXT: s_and_b32 s14, s26, 0xffff -; SI-NEXT: s_lshl_b32 s15, s66, 16 +; SI-NEXT: s_lshl_b32 s15, s93, 16 ; SI-NEXT: s_add_i32 s27, s27, 3 ; SI-NEXT: s_or_b32 s14, s15, s14 ; SI-NEXT: s_and_b32 s15, s27, 0xffff -; SI-NEXT: s_lshl_b32 s26, s39, 16 +; SI-NEXT: s_lshl_b32 s26, s59, 16 ; SI-NEXT: s_add_i32 s24, s24, 3 ; SI-NEXT: s_or_b32 s15, s26, s15 ; SI-NEXT: s_and_b32 s24, s24, 0xffff -; SI-NEXT: s_lshl_b32 s26, s65, 16 +; SI-NEXT: s_lshl_b32 s26, s91, 16 ; SI-NEXT: s_or_b32 s24, s26, s24 ; SI-NEXT: s_add_i32 s25, s25, 3 ; SI-NEXT: s_add_i32 s40, s24, 0x30000 ; SI-NEXT: s_and_b32 s24, s25, 0xffff -; SI-NEXT: s_lshl_b32 s25, s38, 16 +; SI-NEXT: s_lshl_b32 s25, s49, 16 ; SI-NEXT: s_or_b32 s24, s25, s24 ; SI-NEXT: s_add_i32 s22, s22, 3 ; SI-NEXT: s_add_i32 s41, s24, 0x30000 ; SI-NEXT: s_and_b32 s22, s22, 0xffff -; SI-NEXT: s_lshl_b32 s24, s64, 16 +; SI-NEXT: s_lshl_b32 s24, s89, 16 ; SI-NEXT: s_or_b32 s22, s24, s22 ; SI-NEXT: s_add_i32 s23, s23, 3 ; SI-NEXT: s_add_i32 s42, s22, 0x30000 ; SI-NEXT: s_and_b32 s22, s23, 0xffff -; SI-NEXT: s_lshl_b32 s23, s37, 16 +; SI-NEXT: s_lshl_b32 s23, s92, 16 ; SI-NEXT: s_or_b32 s22, s23, s22 ; SI-NEXT: s_add_i32 s20, s20, 3 ; SI-NEXT: s_add_i32 s43, s22, 0x30000 ; SI-NEXT: s_and_b32 s20, s20, 0xffff -; SI-NEXT: s_lshl_b32 s22, s55, 16 +; SI-NEXT: s_lshl_b32 s22, s79, 16 ; SI-NEXT: s_or_b32 s20, s22, s20 ; SI-NEXT: s_add_i32 s21, s21, 3 ; SI-NEXT: s_add_i32 s44, s20, 0x30000 ; SI-NEXT: s_and_b32 s20, s21, 0xffff -; SI-NEXT: s_lshl_b32 s21, s36, 16 +; SI-NEXT: s_lshl_b32 s21, s90, 16 ; SI-NEXT: s_or_b32 s20, s21, s20 ; SI-NEXT: s_add_i32 s18, s18, 3 ; SI-NEXT: s_add_i32 s45, s20, 0x30000 ; SI-NEXT: s_and_b32 s18, s18, 0xffff -; SI-NEXT: s_lshl_b32 s20, s54, 16 +; SI-NEXT: s_lshl_b32 s20, s77, 16 ; SI-NEXT: s_or_b32 s18, s20, s18 ; SI-NEXT: s_add_i32 s19, s19, 3 ; SI-NEXT: s_add_i32 s46, s18, 0x30000 ; SI-NEXT: s_and_b32 s18, s19, 0xffff -; SI-NEXT: s_lshl_b32 s19, s35, 16 +; SI-NEXT: s_lshl_b32 s19, s88, 16 ; SI-NEXT: s_or_b32 s18, s19, s18 ; SI-NEXT: s_add_i32 s16, s16, 3 ; SI-NEXT: s_add_i32 s47, s18, 0x30000 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_lshl_b32 s18, s53, 16 +; SI-NEXT: s_lshl_b32 s18, s31, 16 ; SI-NEXT: s_or_b32 s16, s18, s16 ; SI-NEXT: s_add_i32 s17, s17, 3 ; SI-NEXT: s_add_i32 s56, s16, 0x30000 ; SI-NEXT: s_and_b32 s16, s17, 0xffff -; SI-NEXT: s_lshl_b32 s17, s34, 16 +; SI-NEXT: s_lshl_b32 s17, s78, 16 ; SI-NEXT: s_or_b32 s16, s17, s16 ; SI-NEXT: s_add_i32 s4, s4, 0x30000 ; SI-NEXT: s_add_i32 s5, s5, 0x30000 @@ -34108,96 +34144,96 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i ; SI-NEXT: s_add_i32 s14, s14, 0x30000 ; SI-NEXT: s_add_i32 s15, s15, 0x30000 ; SI-NEXT: s_add_i32 s57, s16, 0x30000 -; SI-NEXT: s_lshr_b64 s[58:59], s[56:57], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[46:47], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[44:45], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[4:5], 16 -; SI-NEXT: s_lshr_b32 s34, s57, 16 -; SI-NEXT: s_lshr_b32 s35, s47, 16 -; SI-NEXT: s_lshr_b32 s36, s45, 16 -; SI-NEXT: s_lshr_b32 s37, s43, 16 -; SI-NEXT: s_lshr_b32 s38, s41, 16 -; SI-NEXT: s_lshr_b32 s39, s15, 16 -; SI-NEXT: s_lshr_b32 s48, s13, 16 -; SI-NEXT: s_lshr_b32 s49, s11, 16 -; SI-NEXT: s_lshr_b32 s50, s9, 16 -; SI-NEXT: s_lshr_b32 s51, s7, 16 -; SI-NEXT: s_lshr_b32 s52, s5, 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[56:57], 16 +; SI-NEXT: s_lshr_b64 s[80:81], s[46:47], 16 +; SI-NEXT: s_lshr_b64 s[82:83], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[84:85], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[86:87], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[50:51], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[52:53], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[70:71], s[4:5], 16 +; SI-NEXT: s_lshr_b32 s78, s57, 16 +; SI-NEXT: s_lshr_b32 s88, s47, 16 +; SI-NEXT: s_lshr_b32 s90, s45, 16 +; SI-NEXT: s_lshr_b32 s92, s43, 16 +; SI-NEXT: s_lshr_b32 s49, s41, 16 +; SI-NEXT: s_lshr_b32 s59, s15, 16 +; SI-NEXT: s_lshr_b32 s62, s13, 16 +; SI-NEXT: s_lshr_b32 s99, s11, 16 +; SI-NEXT: s_lshr_b32 s73, s9, 16 +; SI-NEXT: s_lshr_b32 s75, s7, 16 +; SI-NEXT: s_lshr_b32 s96, s5, 16 ; SI-NEXT: .LBB57_3: ; %end ; SI-NEXT: s_and_b32 s16, s56, 0xffff -; SI-NEXT: s_lshl_b32 s17, s58, 16 +; SI-NEXT: s_lshl_b32 s17, s94, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s57, 0xffff -; SI-NEXT: s_lshl_b32 s18, s34, 16 +; SI-NEXT: s_lshl_b32 s18, s78, 16 ; SI-NEXT: s_or_b32 s17, s17, s18 ; SI-NEXT: s_and_b32 s18, s46, 0xffff -; SI-NEXT: s_lshl_b32 s19, s60, 16 +; SI-NEXT: s_lshl_b32 s19, s80, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 ; SI-NEXT: s_and_b32 s19, s47, 0xffff -; SI-NEXT: s_lshl_b32 s20, s35, 16 +; SI-NEXT: s_lshl_b32 s20, s88, 16 ; SI-NEXT: s_or_b32 s19, s19, s20 ; SI-NEXT: s_and_b32 s20, s44, 0xffff -; SI-NEXT: s_lshl_b32 s21, s62, 16 +; SI-NEXT: s_lshl_b32 s21, s82, 16 ; SI-NEXT: s_or_b32 s20, s20, s21 ; SI-NEXT: s_and_b32 s21, s45, 0xffff -; SI-NEXT: s_lshl_b32 s22, s36, 16 +; SI-NEXT: s_lshl_b32 s22, s90, 16 ; SI-NEXT: s_or_b32 s21, s21, s22 ; SI-NEXT: s_and_b32 s22, s42, 0xffff -; SI-NEXT: s_lshl_b32 s23, s72, 16 +; SI-NEXT: s_lshl_b32 s23, s84, 16 ; SI-NEXT: s_or_b32 s22, s22, s23 ; SI-NEXT: s_and_b32 s23, s43, 0xffff -; SI-NEXT: s_lshl_b32 s24, s37, 16 +; SI-NEXT: s_lshl_b32 s24, s92, 16 ; SI-NEXT: s_or_b32 s23, s23, s24 ; SI-NEXT: s_and_b32 s24, s40, 0xffff -; SI-NEXT: s_lshl_b32 s25, s74, 16 +; SI-NEXT: s_lshl_b32 s25, s86, 16 ; SI-NEXT: s_or_b32 s24, s24, s25 ; SI-NEXT: s_and_b32 s25, s41, 0xffff -; SI-NEXT: s_lshl_b32 s26, s38, 16 +; SI-NEXT: s_lshl_b32 s26, s49, 16 ; SI-NEXT: s_or_b32 s25, s25, s26 ; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s26, s76, 16 +; SI-NEXT: s_lshl_b32 s26, s50, 16 ; SI-NEXT: s_or_b32 s14, s14, s26 ; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s26, s39, 16 +; SI-NEXT: s_lshl_b32 s26, s59, 16 ; SI-NEXT: s_or_b32 s15, s15, s26 ; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s26, s78, 16 +; SI-NEXT: s_lshl_b32 s26, s52, 16 ; SI-NEXT: s_or_b32 s12, s12, s26 ; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s26, s48, 16 +; SI-NEXT: s_lshl_b32 s26, s62, 16 ; SI-NEXT: s_or_b32 s13, s13, s26 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s26, s88, 16 +; SI-NEXT: s_lshl_b32 s26, s54, 16 ; SI-NEXT: s_or_b32 s10, s10, s26 ; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s26, s49, 16 +; SI-NEXT: s_lshl_b32 s26, s99, 16 ; SI-NEXT: s_or_b32 s11, s11, s26 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s26, s90, 16 +; SI-NEXT: s_lshl_b32 s26, s64, 16 ; SI-NEXT: s_or_b32 s8, s8, s26 ; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s26, s50, 16 +; SI-NEXT: s_lshl_b32 s26, s73, 16 ; SI-NEXT: s_or_b32 s9, s9, s26 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s26, s92, 16 +; SI-NEXT: s_lshl_b32 s26, s66, 16 ; SI-NEXT: s_or_b32 s6, s6, s26 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s26, s51, 16 +; SI-NEXT: s_lshl_b32 s26, s75, 16 ; SI-NEXT: s_or_b32 s7, s7, s26 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s26, s94, 16 +; SI-NEXT: s_lshl_b32 s26, s70, 16 ; SI-NEXT: s_or_b32 s4, s4, s26 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s26, s52, 16 +; SI-NEXT: s_lshl_b32 s26, s96, 16 ; SI-NEXT: s_or_b32 s5, s5, s26 -; SI-NEXT: v_readlane_b32 s30, v22, 30 +; SI-NEXT: v_readlane_b32 s30, v22, 34 ; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v2, s18 @@ -34220,7 +34256,11 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v19, s7 ; SI-NEXT: v_mov_b32_e32 v20, s4 ; SI-NEXT: v_mov_b32_e32 v21, s5 -; SI-NEXT: v_readlane_b32 s31, v22, 31 +; SI-NEXT: v_readlane_b32 s31, v22, 35 +; SI-NEXT: v_readlane_b32 s99, v22, 33 +; SI-NEXT: v_readlane_b32 s98, v22, 32 +; SI-NEXT: v_readlane_b32 s97, v22, 31 +; SI-NEXT: v_readlane_b32 s96, v22, 30 ; SI-NEXT: v_readlane_b32 s87, v22, 29 ; SI-NEXT: v_readlane_b32 s86, v22, 28 ; SI-NEXT: v_readlane_b32 s85, v22, 27 @@ -34257,29 +34297,29 @@ define inreg <44 x half> @bitcast_v44i16_to_v44f16_scalar(<44 x i16> inreg %a, i ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB57_4: -; SI-NEXT: s_mov_b64 s[30:31], -1 +; SI-NEXT: s_mov_b64 s[68:69], -1 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr80 ; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr82 ; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr84 ; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr86 ; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: ; implicit-def: $sgpr50 ; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr10 -; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr54 ; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr64 ; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr66 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr70 ; SI-NEXT: s_branch .LBB57_2 ; ; VI-LABEL: bitcast_v44i16_to_v44f16_scalar: @@ -35740,36 +35780,36 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_readfirstlane_b32 s6, v7 -; SI-NEXT: v_readfirstlane_b32 s7, v6 -; SI-NEXT: v_readfirstlane_b32 s42, v5 -; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: v_readfirstlane_b32 s41, v3 +; SI-NEXT: v_readfirstlane_b32 s43, v7 +; SI-NEXT: v_readfirstlane_b32 s6, v6 +; SI-NEXT: v_readfirstlane_b32 s41, v5 +; SI-NEXT: v_readfirstlane_b32 s47, v4 +; SI-NEXT: v_readfirstlane_b32 s15, v3 ; SI-NEXT: v_readfirstlane_b32 s59, v2 -; SI-NEXT: v_readfirstlane_b32 s40, v1 -; SI-NEXT: v_readfirstlane_b32 s63, v0 -; SI-NEXT: s_lshr_b32 s15, s29, 16 -; SI-NEXT: s_lshr_b32 s57, s28, 16 -; SI-NEXT: s_lshr_b32 s14, s27, 16 +; SI-NEXT: v_readfirstlane_b32 s14, v1 +; SI-NEXT: v_readfirstlane_b32 s62, v0 +; SI-NEXT: s_lshr_b32 s13, s29, 16 +; SI-NEXT: s_lshr_b32 s58, s28, 16 +; SI-NEXT: s_lshr_b32 s12, s27, 16 ; SI-NEXT: s_lshr_b32 s60, s26, 16 -; SI-NEXT: s_lshr_b32 s13, s25, 16 -; SI-NEXT: s_lshr_b32 s62, s24, 16 -; SI-NEXT: s_lshr_b32 s12, s23, 16 +; SI-NEXT: s_lshr_b32 s11, s25, 16 +; SI-NEXT: s_lshr_b32 s63, s24, 16 +; SI-NEXT: s_lshr_b32 s10, s23, 16 ; SI-NEXT: s_lshr_b32 s72, s22, 16 -; SI-NEXT: s_lshr_b32 s11, s21, 16 +; SI-NEXT: s_lshr_b32 s9, s21, 16 ; SI-NEXT: s_lshr_b32 s73, s20, 16 -; SI-NEXT: s_lshr_b32 s10, s19, 16 +; SI-NEXT: s_lshr_b32 s8, s19, 16 ; SI-NEXT: s_lshr_b32 s74, s18, 16 -; SI-NEXT: s_lshr_b32 s9, s17, 16 +; SI-NEXT: s_lshr_b32 s7, s17, 16 ; SI-NEXT: s_lshr_b32 s75, s16, 16 -; SI-NEXT: s_lshr_b32 s58, s6, 16 -; SI-NEXT: s_lshr_b32 s43, s7, 16 -; SI-NEXT: s_lshr_b32 s56, s42, 16 -; SI-NEXT: s_lshr_b32 s45, s8, 16 +; SI-NEXT: s_lshr_b32 s56, s43, 16 +; SI-NEXT: s_lshr_b32 s40, s6, 16 ; SI-NEXT: s_lshr_b32 s46, s41, 16 -; SI-NEXT: s_lshr_b32 s47, s59, 16 -; SI-NEXT: s_lshr_b32 s44, s40, 16 -; SI-NEXT: s_lshr_b32 s61, s63, 16 +; SI-NEXT: s_lshr_b32 s45, s47, 16 +; SI-NEXT: s_lshr_b32 s44, s15, 16 +; SI-NEXT: s_lshr_b32 s57, s59, 16 +; SI-NEXT: s_lshr_b32 s42, s14, 16 +; SI-NEXT: s_lshr_b32 s61, s62, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v8 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB59_3 @@ -35787,14 +35827,14 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_or_b32_e32 v26, v1, v0 +; SI-NEXT: v_or_b32_e32 v24, v1, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s73 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v54, v3, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s72 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 @@ -35803,166 +35843,167 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i ; SI-NEXT: v_cvt_f32_f16_e32 v1, s22 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v27, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s62 +; SI-NEXT: v_or_b32_e32 v25, v5, v4 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s63 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s24 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_or_b32_e32 v55, v1, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s60 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v5 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_or_b32_e32 v41, v3, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s57 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s26 +; SI-NEXT: v_or_b32_e32 v41, v3, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s58 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s28 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s63 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_or_b32_e32 v43, v1, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s47 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s45 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_or_b32_e32 v40, v5, v10 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s61 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s62 +; SI-NEXT: v_or_b32_e32 v43, v1, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s57 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s43 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s58 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s59 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s56 +; SI-NEXT: v_or_b32_e32 v45, v3, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s45 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s47 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s56 +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s43 +; SI-NEXT: v_or_b32_e32 v44, v5, v16 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s46 ; SI-NEXT: v_cvt_f16_f32_e32 v42, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s42 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s46 -; SI-NEXT: v_cvt_f16_f32_e32 v44, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v45, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v44 +; SI-NEXT: v_cvt_f16_f32_e32 v46, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v42 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s41 -; SI-NEXT: v_or_b32_e32 v19, v1, v3 +; SI-NEXT: v_or_b32_e32 v21, v1, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s44 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s40 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s15 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v46, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v47, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v45 -; SI-NEXT: v_or_b32_e32 v17, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s15 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v46 -; SI-NEXT: v_or_b32_e32 v15, v3, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s29 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v46 +; SI-NEXT: v_or_b32_e32 v19, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s42 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v47 +; SI-NEXT: v_or_b32_e32 v17, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s14 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s14 -; SI-NEXT: v_cvt_f16_f32_e32 v47, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s13 +; SI-NEXT: v_cvt_f16_f32_e32 v56, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v56, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v47 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s27 -; SI-NEXT: v_or_b32_e32 v13, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s13 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s25 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: v_cvt_f16_f32_e32 v57, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v56 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s29 +; SI-NEXT: v_or_b32_e32 v15, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s12 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s27 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_cvt_f16_f32_e32 v57, v3 +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: v_cvt_f16_f32_e32 v58, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v56 -; SI-NEXT: v_or_b32_e32 v11, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s12 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v57 -; SI-NEXT: v_or_b32_e32 v9, v3, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s23 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v57 +; SI-NEXT: v_or_b32_e32 v13, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s11 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v58 +; SI-NEXT: v_or_b32_e32 v11, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s25 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s10 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s11 -; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_cvt_f16_f32_e32 v58, v1 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_cvt_f16_f32_e32 v59, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_cvt_f16_f32_e32 v59, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v58 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s21 -; SI-NEXT: v_or_b32_e32 v7, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s10 -; SI-NEXT: v_cvt_f32_f16_e32 v21, s19 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_cvt_f16_f32_e32 v60, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59 +; SI-NEXT: v_or_b32_e32 v9, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s9 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v60 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: s_waitcnt expcnt(2) ; SI-NEXT: v_cvt_f16_f32_e32 v61, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v21 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v7, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s8 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 -; SI-NEXT: v_or_b32_e32 v5, v5, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v61 -; SI-NEXT: v_cvt_f32_f16_e32 v21, s9 -; SI-NEXT: v_or_b32_e32 v3, v3, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s17 -; SI-NEXT: v_cvt_f32_f16_e32 v24, s6 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v53, v21 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v23, s17 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v24 +; SI-NEXT: v_or_b32_e32 v5, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v52, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s7 +; SI-NEXT: v_cvt_f32_f16_e32 v22, s40 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v53, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v53 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v42 -; SI-NEXT: v_or_b32_e32 v1, v1, v24 -; SI-NEXT: v_cvt_f32_f16_e32 v24, s8 -; SI-NEXT: v_or_b32_e32 v21, v21, v25 -; SI-NEXT: v_cvt_f32_f16_e32 v25, s7 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v52 +; SI-NEXT: v_or_b32_e32 v3, v3, v23 +; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v53 +; SI-NEXT: v_or_b32_e32 v1, v1, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v23, s6 +; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_or_b32_e32 v52, v22, v14 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_or_b32_e32 v63, v23, v16 -; SI-NEXT: v_or_b32_e32 v62, v24, v18 -; SI-NEXT: v_or_b32_e32 v60, v25, v20 +; SI-NEXT: v_or_b32_e32 v63, v20, v18 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v22 +; SI-NEXT: v_or_b32_e32 v62, v23, v20 ; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16 +; SI-NEXT: v_mov_b32_e32 v0, v24 ; SI-NEXT: v_lshr_b64 v[48:49], v[2:3], 16 -; SI-NEXT: v_mov_b32_e32 v2, v26 ; SI-NEXT: v_lshr_b64 v[38:39], v[4:5], 16 ; SI-NEXT: v_lshr_b64 v[36:37], v[6:7], 16 -; SI-NEXT: v_mov_b32_e32 v6, v27 +; SI-NEXT: v_mov_b32_e32 v6, v25 ; SI-NEXT: v_lshr_b64 v[34:35], v[8:9], 16 ; SI-NEXT: v_lshr_b64 v[32:33], v[10:11], 16 ; SI-NEXT: v_lshr_b64 v[30:31], v[12:13], 16 @@ -35974,118 +36015,119 @@ define inreg <44 x i16> @bitcast_v44f16_to_v44i16_scalar(<44 x half> inreg %a, i ; SI-NEXT: .LBB59_3: ; SI-NEXT: s_branch .LBB59_2 ; SI-NEXT: .LBB59_4: -; SI-NEXT: v_mov_b32_e32 v42, s58 -; SI-NEXT: v_mov_b32_e32 v44, s56 -; SI-NEXT: v_mov_b32_e32 v45, s46 -; SI-NEXT: v_mov_b32_e32 v46, s44 -; SI-NEXT: v_mov_b32_e32 v47, s15 -; SI-NEXT: v_mov_b32_e32 v56, s14 +; SI-NEXT: v_mov_b32_e32 v42, s56 +; SI-NEXT: v_mov_b32_e32 v46, s46 +; SI-NEXT: v_mov_b32_e32 v47, s44 +; SI-NEXT: v_mov_b32_e32 v56, s42 ; SI-NEXT: s_waitcnt expcnt(6) ; SI-NEXT: v_mov_b32_e32 v57, s13 ; SI-NEXT: s_waitcnt expcnt(5) ; SI-NEXT: v_mov_b32_e32 v58, s12 ; SI-NEXT: s_waitcnt expcnt(4) ; SI-NEXT: v_mov_b32_e32 v59, s11 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_mov_b32_e32 v60, s10 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v61, s10 -; SI-NEXT: v_mov_b32_e32 v53, s9 -; SI-NEXT: v_mov_b32_e32 v60, s7 +; SI-NEXT: v_mov_b32_e32 v61, s9 +; SI-NEXT: v_mov_b32_e32 v52, s8 +; SI-NEXT: v_mov_b32_e32 v53, s7 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v13, s29 +; SI-NEXT: v_mov_b32_e32 v15, s14 +; SI-NEXT: v_mov_b32_e32 v17, s15 +; SI-NEXT: v_mov_b32_e32 v19, s41 +; SI-NEXT: v_mov_b32_e32 v21, s43 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v62, s8 +; SI-NEXT: v_mov_b32_e32 v62, s6 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v63, s59 -; SI-NEXT: v_mov_b32_e32 v52, s63 +; SI-NEXT: v_mov_b32_e32 v63, s47 +; SI-NEXT: v_mov_b32_e32 v44, s59 +; SI-NEXT: v_mov_b32_e32 v45, s62 ; SI-NEXT: v_mov_b32_e32 v43, s28 ; SI-NEXT: v_mov_b32_e32 v40, s26 ; SI-NEXT: v_mov_b32_e32 v41, s24 ; SI-NEXT: v_mov_b32_e32 v55, s22 ; SI-NEXT: v_mov_b32_e32 v6, s20 ; SI-NEXT: v_mov_b32_e32 v54, s18 -; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v9, s25 -; SI-NEXT: v_mov_b32_e32 v11, s27 -; SI-NEXT: v_mov_b32_e32 v13, s29 -; SI-NEXT: v_mov_b32_e32 v15, s40 -; SI-NEXT: v_mov_b32_e32 v17, s41 -; SI-NEXT: v_mov_b32_e32 v19, s42 -; SI-NEXT: v_mov_b32_e32 v21, s6 +; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v50, s75 ; SI-NEXT: v_mov_b32_e32 v48, s74 ; SI-NEXT: v_mov_b32_e32 v38, s73 ; SI-NEXT: v_mov_b32_e32 v36, s72 -; SI-NEXT: v_mov_b32_e32 v34, s62 +; SI-NEXT: v_mov_b32_e32 v34, s63 ; SI-NEXT: v_mov_b32_e32 v32, s60 -; SI-NEXT: v_mov_b32_e32 v30, s57 +; SI-NEXT: v_mov_b32_e32 v30, s58 ; SI-NEXT: v_mov_b32_e32 v28, s61 -; SI-NEXT: v_mov_b32_e32 v26, s47 +; SI-NEXT: v_mov_b32_e32 v26, s57 ; SI-NEXT: v_mov_b32_e32 v24, s45 -; SI-NEXT: v_mov_b32_e32 v22, s43 +; SI-NEXT: v_mov_b32_e32 v22, s40 ; SI-NEXT: .LBB59_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v50 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v50 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v53 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v48 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v54 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v54 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v48 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v61 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v52 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v59 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v61 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v55 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v55 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v36 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v58 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v60 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41 -; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v41 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34 +; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v57 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v59 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v40 -; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v40 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v32 +; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v56 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v58 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v43 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v30 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v57 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v52 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v45 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v28 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v56 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v63 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v44 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v26 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v47 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v62 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v63 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v24 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v46 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v60 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v62 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 ; SI-NEXT: v_or_b32_e32 v20, v20, v22 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v42 diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll index 332c550eaaccf..cf982af7b17cf 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll @@ -3850,6 +3850,10 @@ define inreg <48 x i16> @bitcast_v24i32_to_v48i16_scalar(<24 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16 ; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16 ; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s88, s5, 16 ; SI-NEXT: s_lshr_b32 s89, s7, 16 ; SI-NEXT: s_lshr_b32 s90, s9, 16 @@ -3862,26 +3866,22 @@ define inreg <48 x i16> @bitcast_v24i32_to_v48i16_scalar(<24 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b32 s31, s21, 16 ; SI-NEXT: s_lshr_b32 s34, s19, 16 ; SI-NEXT: s_lshr_b32 s35, s17, 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[16:17], 16 ; SI-NEXT: .LBB13_3: ; %end -; SI-NEXT: s_lshl_b32 s15, s76, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_and_b32 s15, s16, 0xffff +; SI-NEXT: s_lshl_b32 s16, s76, 16 +; SI-NEXT: s_or_b32 s15, s15, s16 ; SI-NEXT: s_and_b32 s16, s17, 0xffff ; SI-NEXT: s_lshl_b32 s17, s35, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_lshl_b32 s17, s74, 16 -; SI-NEXT: s_and_b32 s18, s18, 0xffff -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_and_b32 s17, s18, 0xffff +; SI-NEXT: s_lshl_b32 s18, s74, 16 +; SI-NEXT: s_or_b32 s17, s17, s18 ; SI-NEXT: s_and_b32 s18, s19, 0xffff ; SI-NEXT: s_lshl_b32 s19, s34, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_lshl_b32 s19, s72, 16 -; SI-NEXT: s_and_b32 s20, s20, 0xffff -; SI-NEXT: s_or_b32 s19, s20, s19 +; SI-NEXT: s_and_b32 s19, s20, 0xffff +; SI-NEXT: s_lshl_b32 s20, s72, 16 +; SI-NEXT: s_or_b32 s19, s19, s20 ; SI-NEXT: s_and_b32 s20, s21, 0xffff ; SI-NEXT: s_lshl_b32 s21, s31, 16 ; SI-NEXT: s_or_b32 s20, s20, s21 @@ -6269,8 +6269,6 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3 ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 @@ -6280,8 +6278,7 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s76, v3 ; GFX9-NEXT: v_readfirstlane_b32 s78, v2 ; GFX9-NEXT: v_readfirstlane_b32 s88, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -6294,6 +6291,8 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 ; GFX9-NEXT: s_lshr_b32 s14, s19, 16 ; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s60, s59, 16 ; GFX9-NEXT: s_lshr_b32 s61, s58, 16 ; GFX9-NEXT: s_lshr_b32 s62, s57, 16 @@ -6303,10 +6302,11 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v10 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v10 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 ; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 ; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 @@ -6319,7 +6319,7 @@ define inreg <24 x i32> @bitcast_v48i16_to_v24i32_scalar(<48 x i16> inreg %a, i3 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s51, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s52, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s76, s77 @@ -7297,6 +7297,10 @@ define inreg <48 x half> @bitcast_v24i32_to_v48f16_scalar(<24 x i32> inreg %a, i ; SI-NEXT: s_lshr_b64 s[56:57], s[28:29], 16 ; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16 ; SI-NEXT: s_lshr_b64 s[60:61], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s88, s5, 16 ; SI-NEXT: s_lshr_b32 s89, s7, 16 ; SI-NEXT: s_lshr_b32 s90, s9, 16 @@ -7309,26 +7313,22 @@ define inreg <48 x half> @bitcast_v24i32_to_v48f16_scalar(<24 x i32> inreg %a, i ; SI-NEXT: s_lshr_b32 s31, s21, 16 ; SI-NEXT: s_lshr_b32 s34, s19, 16 ; SI-NEXT: s_lshr_b32 s35, s17, 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[16:17], 16 ; SI-NEXT: .LBB17_3: ; %end -; SI-NEXT: s_lshl_b32 s15, s76, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_and_b32 s15, s16, 0xffff +; SI-NEXT: s_lshl_b32 s16, s76, 16 +; SI-NEXT: s_or_b32 s15, s15, s16 ; SI-NEXT: s_and_b32 s16, s17, 0xffff ; SI-NEXT: s_lshl_b32 s17, s35, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_lshl_b32 s17, s74, 16 -; SI-NEXT: s_and_b32 s18, s18, 0xffff -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_and_b32 s17, s18, 0xffff +; SI-NEXT: s_lshl_b32 s18, s74, 16 +; SI-NEXT: s_or_b32 s17, s17, s18 ; SI-NEXT: s_and_b32 s18, s19, 0xffff ; SI-NEXT: s_lshl_b32 s19, s34, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_lshl_b32 s19, s72, 16 -; SI-NEXT: s_and_b32 s20, s20, 0xffff -; SI-NEXT: s_or_b32 s19, s20, s19 +; SI-NEXT: s_and_b32 s19, s20, 0xffff +; SI-NEXT: s_lshl_b32 s20, s72, 16 +; SI-NEXT: s_or_b32 s19, s19, s20 ; SI-NEXT: s_and_b32 s20, s21, 0xffff ; SI-NEXT: s_lshl_b32 s21, s31, 16 ; SI-NEXT: s_or_b32 s20, s20, s21 @@ -8083,13 +8083,13 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v54 ; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v55 ; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v40 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v41 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24 ; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill @@ -8108,11 +8108,11 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v46 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v46 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v45 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -8123,10 +8123,10 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v57 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v32 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v57 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v56 @@ -8157,13 +8157,13 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr53 ; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr62 @@ -8272,169 +8272,167 @@ define <24 x i32> @bitcast_v48f16_to_v24i32(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB18_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v0, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v0, v35 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v46 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v44 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v43 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v34 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v44 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v45 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v58 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v42 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v41 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v43 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v32 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v33 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v42 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v57 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v41 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v40 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v63 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v57 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v55 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v54 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v54 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v53 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v60 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v60 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v52 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v51 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v16, v49 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v48 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v48 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v19, v38 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_cvt_f32_f16_e32 v19, v38 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v37 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v11, v13, v11 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(6) ; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v50 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 +; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v14, v16, v14 ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 +; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 +; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -9712,13 +9710,13 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i ; VI-NEXT: .LBB19_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v23, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s83 -; VI-NEXT: v_mov_b32_e32 v2, s82 ; VI-NEXT: v_add_f16_sdwa v0, v0, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v23 -; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v23 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s82 +; VI-NEXT: v_add_f16_sdwa v1, v1, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v23 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s81 ; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v23 @@ -9897,8 +9895,6 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 @@ -9908,8 +9904,7 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i ; GFX9-NEXT: v_readfirstlane_b32 s76, v3 ; GFX9-NEXT: v_readfirstlane_b32 s78, v2 ; GFX9-NEXT: v_readfirstlane_b32 s88, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -9922,6 +9917,8 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 ; GFX9-NEXT: s_lshr_b32 s14, s19, 16 ; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s60, s59, 16 ; GFX9-NEXT: s_lshr_b32 s61, s58, 16 ; GFX9-NEXT: s_lshr_b32 s62, s57, 16 @@ -9931,10 +9928,11 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v10 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v10 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 ; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 ; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 @@ -9947,7 +9945,7 @@ define inreg <24 x i32> @bitcast_v48f16_to_v24i32_scalar(<48 x half> inreg %a, i ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s51, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s52, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s76, s77 @@ -13373,22 +13371,22 @@ define inreg <48 x i16> @bitcast_v24f32_to_v48i16_scalar(<24 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v34, s74 ; SI-NEXT: v_mov_b32_e32 v35, s76 ; SI-NEXT: .LBB29_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 @@ -15983,8 +15981,6 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a, ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 @@ -15994,8 +15990,7 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s76, v3 ; GFX9-NEXT: v_readfirstlane_b32 s78, v2 ; GFX9-NEXT: v_readfirstlane_b32 s88, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -16008,6 +16003,8 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 ; GFX9-NEXT: s_lshr_b32 s14, s19, 16 ; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s60, s59, 16 ; GFX9-NEXT: s_lshr_b32 s61, s58, 16 ; GFX9-NEXT: s_lshr_b32 s62, s57, 16 @@ -16017,10 +16014,11 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v10 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v10 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 ; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 ; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 @@ -16033,7 +16031,7 @@ define inreg <24 x float> @bitcast_v48i16_to_v24f32_scalar(<48 x i16> inreg %a, ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s51, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s52, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s76, s77 @@ -17080,22 +17078,22 @@ define inreg <48 x half> @bitcast_v24f32_to_v48f16_scalar(<24 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v34, s74 ; SI-NEXT: v_mov_b32_e32 v35, s76 ; SI-NEXT: .LBB33_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 @@ -18057,13 +18055,13 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v54 ; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v55 ; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v40 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v41 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24 ; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill @@ -18082,11 +18080,11 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v46 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v46 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v45 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -18097,10 +18095,10 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v57 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v32 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v57 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v56 @@ -18131,13 +18129,13 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr53 ; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr62 @@ -18246,169 +18244,167 @@ define <24 x float> @bitcast_v48f16_to_v24f32(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB34_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v0, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v0, v35 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v46 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v44 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v43 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v34 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v44 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v45 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v58 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v42 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v41 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v43 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v32 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v33 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v42 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v57 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v41 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v40 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v63 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v57 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v55 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v54 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v54 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v53 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v60 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v60 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v52 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v51 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v16, v49 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v48 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v48 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v19, v38 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_cvt_f32_f16_e32 v19, v38 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v37 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v11, v13, v11 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(6) ; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v50 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 +; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v14, v16, v14 ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 +; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 +; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -19686,13 +19682,13 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a, ; VI-NEXT: .LBB35_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v23, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s83 -; VI-NEXT: v_mov_b32_e32 v2, s82 ; VI-NEXT: v_add_f16_sdwa v0, v0, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v23 -; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v23 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s82 +; VI-NEXT: v_add_f16_sdwa v1, v1, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v23 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s81 ; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v23 @@ -19871,8 +19867,6 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a, ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 @@ -19882,8 +19876,7 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s76, v3 ; GFX9-NEXT: v_readfirstlane_b32 s78, v2 ; GFX9-NEXT: v_readfirstlane_b32 s88, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -19896,6 +19889,8 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a, ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 ; GFX9-NEXT: s_lshr_b32 s14, s19, 16 ; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s60, s59, 16 ; GFX9-NEXT: s_lshr_b32 s61, s58, 16 ; GFX9-NEXT: s_lshr_b32 s62, s57, 16 @@ -19905,10 +19900,11 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a, ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v10 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v10 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 ; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 ; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 @@ -19921,7 +19917,7 @@ define inreg <24 x float> @bitcast_v48f16_to_v24f32_scalar(<48 x half> inreg %a, ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s51, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s52, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s76, s77 @@ -21974,21 +21970,21 @@ define inreg <48 x i16> @bitcast_v12i64_to_v48i16_scalar(<12 x i64> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[76:77], s[16:17], 16 ; SI-NEXT: .LBB41_3: ; %end -; SI-NEXT: s_lshl_b32 s15, s76, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_and_b32 s15, s16, 0xffff +; SI-NEXT: s_lshl_b32 s16, s76, 16 +; SI-NEXT: s_or_b32 s15, s15, s16 ; SI-NEXT: s_and_b32 s16, s17, 0xffff ; SI-NEXT: s_lshl_b32 s17, s35, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_lshl_b32 s17, s74, 16 -; SI-NEXT: s_and_b32 s18, s18, 0xffff -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_and_b32 s17, s18, 0xffff +; SI-NEXT: s_lshl_b32 s18, s74, 16 +; SI-NEXT: s_or_b32 s17, s17, s18 ; SI-NEXT: s_and_b32 s18, s19, 0xffff ; SI-NEXT: s_lshl_b32 s19, s34, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_lshl_b32 s19, s72, 16 -; SI-NEXT: s_and_b32 s20, s20, 0xffff -; SI-NEXT: s_or_b32 s19, s20, s19 +; SI-NEXT: s_and_b32 s19, s20, 0xffff +; SI-NEXT: s_lshl_b32 s20, s72, 16 +; SI-NEXT: s_or_b32 s19, s19, s20 ; SI-NEXT: s_and_b32 s20, s21, 0xffff ; SI-NEXT: s_lshl_b32 s21, s31, 16 ; SI-NEXT: s_or_b32 s20, s20, s21 @@ -24376,8 +24372,6 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3 ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 @@ -24387,8 +24381,7 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s76, v3 ; GFX9-NEXT: v_readfirstlane_b32 s78, v2 ; GFX9-NEXT: v_readfirstlane_b32 s88, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -24401,6 +24394,8 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 ; GFX9-NEXT: s_lshr_b32 s14, s19, 16 ; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s60, s59, 16 ; GFX9-NEXT: s_lshr_b32 s61, s58, 16 ; GFX9-NEXT: s_lshr_b32 s62, s57, 16 @@ -24410,10 +24405,11 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v10 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v10 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 ; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 ; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 @@ -24426,7 +24422,7 @@ define inreg <12 x i64> @bitcast_v48i16_to_v12i64_scalar(<48 x i16> inreg %a, i3 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s51, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s52, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s76, s77 @@ -25433,21 +25429,21 @@ define inreg <48 x half> @bitcast_v12i64_to_v48f16_scalar(<12 x i64> inreg %a, i ; SI-NEXT: s_lshr_b64 s[74:75], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[76:77], s[16:17], 16 ; SI-NEXT: .LBB45_3: ; %end -; SI-NEXT: s_lshl_b32 s15, s76, 16 -; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_or_b32 s15, s16, s15 +; SI-NEXT: s_and_b32 s15, s16, 0xffff +; SI-NEXT: s_lshl_b32 s16, s76, 16 +; SI-NEXT: s_or_b32 s15, s15, s16 ; SI-NEXT: s_and_b32 s16, s17, 0xffff ; SI-NEXT: s_lshl_b32 s17, s35, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_lshl_b32 s17, s74, 16 -; SI-NEXT: s_and_b32 s18, s18, 0xffff -; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_and_b32 s17, s18, 0xffff +; SI-NEXT: s_lshl_b32 s18, s74, 16 +; SI-NEXT: s_or_b32 s17, s17, s18 ; SI-NEXT: s_and_b32 s18, s19, 0xffff ; SI-NEXT: s_lshl_b32 s19, s34, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_lshl_b32 s19, s72, 16 -; SI-NEXT: s_and_b32 s20, s20, 0xffff -; SI-NEXT: s_or_b32 s19, s20, s19 +; SI-NEXT: s_and_b32 s19, s20, 0xffff +; SI-NEXT: s_lshl_b32 s20, s72, 16 +; SI-NEXT: s_or_b32 s19, s19, s20 ; SI-NEXT: s_and_b32 s20, s21, 0xffff ; SI-NEXT: s_lshl_b32 s21, s31, 16 ; SI-NEXT: s_or_b32 s20, s20, s21 @@ -26202,13 +26198,13 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v54 ; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v55 ; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v40 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v41 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24 ; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill @@ -26227,11 +26223,11 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v46 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v46 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v45 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -26242,10 +26238,10 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v57 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v32 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v57 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v56 @@ -26276,13 +26272,13 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr53 ; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr62 @@ -26391,169 +26387,167 @@ define <12 x i64> @bitcast_v48f16_to_v12i64(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB46_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v0, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v0, v35 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v46 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v44 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v43 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v34 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v44 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v45 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v58 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v42 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v41 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v43 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v32 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v33 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v42 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v57 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v41 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v40 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v63 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v57 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v55 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v54 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v54 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v53 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v60 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v60 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v52 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v51 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v16, v49 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v48 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v48 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v19, v38 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_cvt_f32_f16_e32 v19, v38 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v37 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v11, v13, v11 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(6) ; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v50 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 +; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v14, v16, v14 ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 +; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 +; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -27831,13 +27825,13 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i ; VI-NEXT: .LBB47_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v23, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s83 -; VI-NEXT: v_mov_b32_e32 v2, s82 ; VI-NEXT: v_add_f16_sdwa v0, v0, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v23 -; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v23 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s82 +; VI-NEXT: v_add_f16_sdwa v1, v1, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v23 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s81 ; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v23 @@ -28016,8 +28010,6 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 @@ -28027,8 +28019,7 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i ; GFX9-NEXT: v_readfirstlane_b32 s76, v3 ; GFX9-NEXT: v_readfirstlane_b32 s78, v2 ; GFX9-NEXT: v_readfirstlane_b32 s88, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -28041,6 +28032,8 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 ; GFX9-NEXT: s_lshr_b32 s14, s19, 16 ; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s60, s59, 16 ; GFX9-NEXT: s_lshr_b32 s61, s58, 16 ; GFX9-NEXT: s_lshr_b32 s62, s57, 16 @@ -28050,10 +28043,11 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v10 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v10 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 ; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 ; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 @@ -28066,7 +28060,7 @@ define inreg <12 x i64> @bitcast_v48f16_to_v12i64_scalar(<48 x half> inreg %a, i ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s51, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s52, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s76, s77 @@ -28292,30 +28286,30 @@ define <48 x i16> @bitcast_v12f64_to_v48i16(<12 x double> %a, i32 %b) #0 { ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24 -; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr55 -; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB48_2 @@ -28328,17 +28322,17 @@ define <48 x i16> @bitcast_v12f64_to_v48i16(<12 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v29, v13, v12, 16 ; SI-NEXT: v_alignbit_b32 v30, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v31, v9, v8, 16 -; SI-NEXT: v_alignbit_b32 v33, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v36, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v39, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v50, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v23 +; SI-NEXT: v_alignbit_b32 v32, v7, v6, 16 +; SI-NEXT: v_alignbit_b32 v35, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v38, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v49, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v5 @@ -28368,17 +28362,17 @@ define <48 x i16> @bitcast_v12f64_to_v48i16(<12 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v29, v13, v12, 16 ; SI-NEXT: v_alignbit_b32 v30, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v31, v9, v8, 16 -; SI-NEXT: v_alignbit_b32 v33, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v36, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v39, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v50, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v23 +; SI-NEXT: v_alignbit_b32 v32, v7, v6, 16 +; SI-NEXT: v_alignbit_b32 v35, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v38, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v49, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v5 @@ -28386,18 +28380,18 @@ define <48 x i16> @bitcast_v12f64_to_v48i16(<12 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v1 ; SI-NEXT: .LBB48_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 @@ -28410,46 +28404,46 @@ define <48 x i16> @bitcast_v12f64_to_v48i16(<12 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; SI-NEXT: v_or_b32_e32 v0, v0, v50 +; SI-NEXT: v_or_b32_e32 v0, v0, v49 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v55 -; SI-NEXT: v_or_b32_e32 v2, v2, v39 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v55 +; SI-NEXT: v_or_b32_e32 v2, v2, v38 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v54 -; SI-NEXT: v_or_b32_e32 v4, v4, v36 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v54 +; SI-NEXT: v_or_b32_e32 v4, v4, v35 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v53 -; SI-NEXT: v_or_b32_e32 v6, v6, v33 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v53 +; SI-NEXT: v_or_b32_e32 v6, v6, v32 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52 ; SI-NEXT: v_or_b32_e32 v8, v8, v31 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v51 ; SI-NEXT: v_or_b32_e32 v10, v10, v30 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v50 ; SI-NEXT: v_or_b32_e32 v12, v12, v29 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v48 ; SI-NEXT: v_or_b32_e32 v14, v14, v28 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39 ; SI-NEXT: v_or_b32_e32 v16, v16, v27 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v37 ; SI-NEXT: v_or_b32_e32 v18, v18, v26 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v36 ; SI-NEXT: v_or_b32_e32 v20, v20, v25 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v34 ; SI-NEXT: v_or_b32_e32 v22, v22, v24 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32 -; SI-NEXT: v_or_b32_e32 v1, v1, v50 -; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_or_b32_e32 v5, v5, v36 -; SI-NEXT: v_or_b32_e32 v7, v7, v33 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v49 +; SI-NEXT: v_or_b32_e32 v3, v3, v38 +; SI-NEXT: v_or_b32_e32 v5, v5, v35 +; SI-NEXT: v_or_b32_e32 v7, v7, v32 ; SI-NEXT: v_or_b32_e32 v9, v9, v31 ; SI-NEXT: v_or_b32_e32 v11, v11, v30 ; SI-NEXT: v_or_b32_e32 v13, v13, v29 @@ -28973,8 +28967,8 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; SI-NEXT: v_lshr_b64 v[31:32], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[32:33], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[33:34], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[34:35], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[35:36], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v23 @@ -29017,14 +29011,6 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; SI-NEXT: ; implicit-def: $sgpr35 ; SI-NEXT: s_branch .LBB49_2 ; SI-NEXT: .LBB49_4: -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v6, s22 ; SI-NEXT: v_mov_b32_e32 v23, s13 ; SI-NEXT: v_mov_b32_e32 v21, s11 ; SI-NEXT: v_mov_b32_e32 v19, s9 @@ -29033,6 +29019,14 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v4, s20 +; SI-NEXT: v_mov_b32_e32 v6, s22 ; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v10, s26 ; SI-NEXT: v_mov_b32_e32 v12, s28 @@ -29066,8 +29060,8 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v25, s40 ; SI-NEXT: v_mov_b32_e32 v24, s14 ; SI-NEXT: .LBB49_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -29152,12 +29146,12 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: v_readfirstlane_b32 s4, v10 -; VI-NEXT: v_readfirstlane_b32 s9, v9 -; VI-NEXT: v_readfirstlane_b32 s8, v8 +; VI-NEXT: v_readfirstlane_b32 s13, v9 +; VI-NEXT: v_readfirstlane_b32 s12, v8 ; VI-NEXT: v_readfirstlane_b32 s11, v7 ; VI-NEXT: v_readfirstlane_b32 s10, v6 -; VI-NEXT: v_readfirstlane_b32 s13, v5 -; VI-NEXT: v_readfirstlane_b32 s12, v4 +; VI-NEXT: v_readfirstlane_b32 s9, v5 +; VI-NEXT: v_readfirstlane_b32 s8, v4 ; VI-NEXT: v_readfirstlane_b32 s7, v3 ; VI-NEXT: v_readfirstlane_b32 s6, v2 ; VI-NEXT: v_readfirstlane_b32 s5, v1 @@ -29165,12 +29159,12 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; VI-NEXT: v_readfirstlane_b32 s4, v0 ; VI-NEXT: s_cbranch_scc0 .LBB49_3 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: s_lshr_b32 s40, s9, 16 -; VI-NEXT: s_lshr_b32 s60, s8, 16 +; VI-NEXT: s_lshr_b32 s40, s13, 16 +; VI-NEXT: s_lshr_b32 s60, s12, 16 ; VI-NEXT: s_lshr_b32 s41, s11, 16 ; VI-NEXT: s_lshr_b32 s61, s10, 16 -; VI-NEXT: s_lshr_b32 s42, s13, 16 -; VI-NEXT: s_lshr_b32 s62, s12, 16 +; VI-NEXT: s_lshr_b32 s42, s9, 16 +; VI-NEXT: s_lshr_b32 s62, s8, 16 ; VI-NEXT: s_lshr_b32 s43, s7, 16 ; VI-NEXT: s_lshr_b32 s63, s6, 16 ; VI-NEXT: s_lshr_b32 s44, s5, 16 @@ -29191,9 +29185,9 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; VI-NEXT: s_lshr_b32 s79, s16, 16 ; VI-NEXT: s_cbranch_execnz .LBB49_4 ; VI-NEXT: .LBB49_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[22:23], s[8:9], 1.0 +; VI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 ; VI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 -; VI-NEXT: v_add_f64 v[18:19], s[12:13], 1.0 +; VI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; VI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; VI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -29264,7 +29258,9 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; VI-NEXT: v_mov_b32_e32 v12, s28 ; VI-NEXT: v_mov_b32_e32 v14, s4 ; VI-NEXT: v_mov_b32_e32 v16, s6 -; VI-NEXT: v_mov_b32_e32 v18, s12 +; VI-NEXT: v_mov_b32_e32 v18, s8 +; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_mov_b32_e32 v22, s12 ; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v3, s19 ; VI-NEXT: v_mov_b32_e32 v5, s21 @@ -29274,11 +29270,9 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; VI-NEXT: v_mov_b32_e32 v13, s29 ; VI-NEXT: v_mov_b32_e32 v15, s5 ; VI-NEXT: v_mov_b32_e32 v17, s7 -; VI-NEXT: v_mov_b32_e32 v19, s13 -; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_mov_b32_e32 v19, s9 ; VI-NEXT: v_mov_b32_e32 v21, s11 -; VI-NEXT: v_mov_b32_e32 v22, s8 -; VI-NEXT: v_mov_b32_e32 v23, s9 +; VI-NEXT: v_mov_b32_e32 v23, s13 ; VI-NEXT: v_mov_b32_e32 v53, s79 ; VI-NEXT: v_mov_b32_e32 v51, s78 ; VI-NEXT: v_mov_b32_e32 v49, s77 @@ -29358,12 +29352,12 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: v_readfirstlane_b32 s4, v10 -; GFX9-NEXT: v_readfirstlane_b32 s9, v9 -; GFX9-NEXT: v_readfirstlane_b32 s8, v8 +; GFX9-NEXT: v_readfirstlane_b32 s13, v9 +; GFX9-NEXT: v_readfirstlane_b32 s12, v8 ; GFX9-NEXT: v_readfirstlane_b32 s11, v7 ; GFX9-NEXT: v_readfirstlane_b32 s10, v6 -; GFX9-NEXT: v_readfirstlane_b32 s13, v5 -; GFX9-NEXT: v_readfirstlane_b32 s12, v4 +; GFX9-NEXT: v_readfirstlane_b32 s9, v5 +; GFX9-NEXT: v_readfirstlane_b32 s8, v4 ; GFX9-NEXT: v_readfirstlane_b32 s7, v3 ; GFX9-NEXT: v_readfirstlane_b32 s6, v2 ; GFX9-NEXT: v_readfirstlane_b32 s5, v1 @@ -29371,12 +29365,12 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s4, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB49_3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: s_lshr_b32 s40, s9, 16 -; GFX9-NEXT: s_lshr_b32 s60, s8, 16 +; GFX9-NEXT: s_lshr_b32 s40, s13, 16 +; GFX9-NEXT: s_lshr_b32 s60, s12, 16 ; GFX9-NEXT: s_lshr_b32 s41, s11, 16 ; GFX9-NEXT: s_lshr_b32 s61, s10, 16 -; GFX9-NEXT: s_lshr_b32 s42, s13, 16 -; GFX9-NEXT: s_lshr_b32 s62, s12, 16 +; GFX9-NEXT: s_lshr_b32 s42, s9, 16 +; GFX9-NEXT: s_lshr_b32 s62, s8, 16 ; GFX9-NEXT: s_lshr_b32 s43, s7, 16 ; GFX9-NEXT: s_lshr_b32 s63, s6, 16 ; GFX9-NEXT: s_lshr_b32 s44, s5, 16 @@ -29397,9 +29391,9 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; GFX9-NEXT: s_lshr_b32 s79, s16, 16 ; GFX9-NEXT: s_cbranch_execnz .LBB49_4 ; GFX9-NEXT: .LBB49_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[22:23], s[8:9], 1.0 +; GFX9-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 ; GFX9-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 -; GFX9-NEXT: v_add_f64 v[18:19], s[12:13], 1.0 +; GFX9-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; GFX9-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; GFX9-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -29470,7 +29464,9 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v12, s28 ; GFX9-NEXT: v_mov_b32_e32 v14, s4 ; GFX9-NEXT: v_mov_b32_e32 v16, s6 -; GFX9-NEXT: v_mov_b32_e32 v18, s12 +; GFX9-NEXT: v_mov_b32_e32 v18, s8 +; GFX9-NEXT: v_mov_b32_e32 v20, s10 +; GFX9-NEXT: v_mov_b32_e32 v22, s12 ; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: v_mov_b32_e32 v5, s21 @@ -29480,11 +29476,9 @@ define inreg <48 x i16> @bitcast_v12f64_to_v48i16_scalar(<12 x double> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v13, s29 ; GFX9-NEXT: v_mov_b32_e32 v15, s5 ; GFX9-NEXT: v_mov_b32_e32 v17, s7 -; GFX9-NEXT: v_mov_b32_e32 v19, s13 -; GFX9-NEXT: v_mov_b32_e32 v20, s10 +; GFX9-NEXT: v_mov_b32_e32 v19, s9 ; GFX9-NEXT: v_mov_b32_e32 v21, s11 -; GFX9-NEXT: v_mov_b32_e32 v22, s8 -; GFX9-NEXT: v_mov_b32_e32 v23, s9 +; GFX9-NEXT: v_mov_b32_e32 v23, s13 ; GFX9-NEXT: v_mov_b32_e32 v53, s79 ; GFX9-NEXT: v_mov_b32_e32 v51, s78 ; GFX9-NEXT: v_mov_b32_e32 v49, s77 @@ -31628,8 +31622,6 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a, ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 @@ -31639,8 +31631,7 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s76, v3 ; GFX9-NEXT: v_readfirstlane_b32 s78, v2 ; GFX9-NEXT: v_readfirstlane_b32 s88, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -31653,6 +31644,8 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 ; GFX9-NEXT: s_lshr_b32 s14, s19, 16 ; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s60, s59, 16 ; GFX9-NEXT: s_lshr_b32 s61, s58, 16 ; GFX9-NEXT: s_lshr_b32 s62, s57, 16 @@ -31662,10 +31655,11 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v10 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v10 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 ; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 ; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 @@ -31678,7 +31672,7 @@ define inreg <12 x double> @bitcast_v48i16_to_v12f64_scalar(<48 x i16> inreg %a, ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s51, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s52, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s76, s77 @@ -31903,30 +31897,30 @@ define <48 x half> @bitcast_v12f64_to_v48f16(<12 x double> %a, i32 %b) #0 { ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24 -; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr55 -; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; implicit-def: $vgpr29 ; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB52_2 @@ -31939,17 +31933,17 @@ define <48 x half> @bitcast_v12f64_to_v48f16(<12 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v29, v13, v12, 16 ; SI-NEXT: v_alignbit_b32 v30, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v31, v9, v8, 16 -; SI-NEXT: v_alignbit_b32 v33, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v36, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v39, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v50, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v23 +; SI-NEXT: v_alignbit_b32 v32, v7, v6, 16 +; SI-NEXT: v_alignbit_b32 v35, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v38, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v49, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v5 @@ -31979,17 +31973,17 @@ define <48 x half> @bitcast_v12f64_to_v48f16(<12 x double> %a, i32 %b) #0 { ; SI-NEXT: v_alignbit_b32 v29, v13, v12, 16 ; SI-NEXT: v_alignbit_b32 v30, v11, v10, 16 ; SI-NEXT: v_alignbit_b32 v31, v9, v8, 16 -; SI-NEXT: v_alignbit_b32 v33, v7, v6, 16 -; SI-NEXT: v_alignbit_b32 v36, v5, v4, 16 -; SI-NEXT: v_alignbit_b32 v39, v3, v2, 16 -; SI-NEXT: v_alignbit_b32 v50, v1, v0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v23 +; SI-NEXT: v_alignbit_b32 v32, v7, v6, 16 +; SI-NEXT: v_alignbit_b32 v35, v5, v4, 16 +; SI-NEXT: v_alignbit_b32 v38, v3, v2, 16 +; SI-NEXT: v_alignbit_b32 v49, v1, v0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v23 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v11 ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v9 ; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v5 @@ -31997,18 +31991,18 @@ define <48 x half> @bitcast_v12f64_to_v48f16(<12 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v1 ; SI-NEXT: .LBB52_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 @@ -32021,46 +32015,46 @@ define <48 x half> @bitcast_v12f64_to_v48f16(<12 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; SI-NEXT: v_or_b32_e32 v0, v0, v50 +; SI-NEXT: v_or_b32_e32 v0, v0, v49 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v55 -; SI-NEXT: v_or_b32_e32 v2, v2, v39 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v55 +; SI-NEXT: v_or_b32_e32 v2, v2, v38 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v54 -; SI-NEXT: v_or_b32_e32 v4, v4, v36 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v54 +; SI-NEXT: v_or_b32_e32 v4, v4, v35 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v53 -; SI-NEXT: v_or_b32_e32 v6, v6, v33 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v53 +; SI-NEXT: v_or_b32_e32 v6, v6, v32 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v52 ; SI-NEXT: v_or_b32_e32 v8, v8, v31 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v51 ; SI-NEXT: v_or_b32_e32 v10, v10, v30 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v50 ; SI-NEXT: v_or_b32_e32 v12, v12, v29 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v48 ; SI-NEXT: v_or_b32_e32 v14, v14, v28 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39 ; SI-NEXT: v_or_b32_e32 v16, v16, v27 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v37 ; SI-NEXT: v_or_b32_e32 v18, v18, v26 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v36 ; SI-NEXT: v_or_b32_e32 v20, v20, v25 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v34 ; SI-NEXT: v_or_b32_e32 v22, v22, v24 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32 -; SI-NEXT: v_or_b32_e32 v1, v1, v50 -; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_or_b32_e32 v5, v5, v36 -; SI-NEXT: v_or_b32_e32 v7, v7, v33 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v49 +; SI-NEXT: v_or_b32_e32 v3, v3, v38 +; SI-NEXT: v_or_b32_e32 v5, v5, v35 +; SI-NEXT: v_or_b32_e32 v7, v7, v32 ; SI-NEXT: v_or_b32_e32 v9, v9, v31 ; SI-NEXT: v_or_b32_e32 v11, v11, v30 ; SI-NEXT: v_or_b32_e32 v13, v13, v29 @@ -32584,8 +32578,8 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; SI-NEXT: v_lshr_b64 v[31:32], v[8:9], 16 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[32:33], v[6:7], 16 -; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[33:34], v[4:5], 16 +; SI-NEXT: v_add_f64 v[0:1], s[16:17], 1.0 ; SI-NEXT: v_lshr_b64 v[34:35], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[35:36], v[0:1], 16 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v23 @@ -32628,14 +32622,6 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; SI-NEXT: ; implicit-def: $sgpr35 ; SI-NEXT: s_branch .LBB53_2 ; SI-NEXT: .LBB53_4: -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v6, s22 ; SI-NEXT: v_mov_b32_e32 v23, s13 ; SI-NEXT: v_mov_b32_e32 v21, s11 ; SI-NEXT: v_mov_b32_e32 v19, s9 @@ -32644,6 +32630,14 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v4, s20 +; SI-NEXT: v_mov_b32_e32 v6, s22 ; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v10, s26 ; SI-NEXT: v_mov_b32_e32 v12, s28 @@ -32677,8 +32671,8 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v25, s40 ; SI-NEXT: v_mov_b32_e32 v24, s14 ; SI-NEXT: .LBB53_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 @@ -32763,12 +32757,12 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: v_readfirstlane_b32 s4, v10 -; VI-NEXT: v_readfirstlane_b32 s9, v9 -; VI-NEXT: v_readfirstlane_b32 s8, v8 +; VI-NEXT: v_readfirstlane_b32 s13, v9 +; VI-NEXT: v_readfirstlane_b32 s12, v8 ; VI-NEXT: v_readfirstlane_b32 s11, v7 ; VI-NEXT: v_readfirstlane_b32 s10, v6 -; VI-NEXT: v_readfirstlane_b32 s13, v5 -; VI-NEXT: v_readfirstlane_b32 s12, v4 +; VI-NEXT: v_readfirstlane_b32 s9, v5 +; VI-NEXT: v_readfirstlane_b32 s8, v4 ; VI-NEXT: v_readfirstlane_b32 s7, v3 ; VI-NEXT: v_readfirstlane_b32 s6, v2 ; VI-NEXT: v_readfirstlane_b32 s5, v1 @@ -32776,12 +32770,12 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; VI-NEXT: v_readfirstlane_b32 s4, v0 ; VI-NEXT: s_cbranch_scc0 .LBB53_3 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: s_lshr_b32 s40, s9, 16 -; VI-NEXT: s_lshr_b32 s60, s8, 16 +; VI-NEXT: s_lshr_b32 s40, s13, 16 +; VI-NEXT: s_lshr_b32 s60, s12, 16 ; VI-NEXT: s_lshr_b32 s41, s11, 16 ; VI-NEXT: s_lshr_b32 s61, s10, 16 -; VI-NEXT: s_lshr_b32 s42, s13, 16 -; VI-NEXT: s_lshr_b32 s62, s12, 16 +; VI-NEXT: s_lshr_b32 s42, s9, 16 +; VI-NEXT: s_lshr_b32 s62, s8, 16 ; VI-NEXT: s_lshr_b32 s43, s7, 16 ; VI-NEXT: s_lshr_b32 s63, s6, 16 ; VI-NEXT: s_lshr_b32 s44, s5, 16 @@ -32802,9 +32796,9 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; VI-NEXT: s_lshr_b32 s79, s16, 16 ; VI-NEXT: s_cbranch_execnz .LBB53_4 ; VI-NEXT: .LBB53_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[22:23], s[8:9], 1.0 +; VI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 ; VI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 -; VI-NEXT: v_add_f64 v[18:19], s[12:13], 1.0 +; VI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; VI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; VI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -32875,7 +32869,9 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; VI-NEXT: v_mov_b32_e32 v12, s28 ; VI-NEXT: v_mov_b32_e32 v14, s4 ; VI-NEXT: v_mov_b32_e32 v16, s6 -; VI-NEXT: v_mov_b32_e32 v18, s12 +; VI-NEXT: v_mov_b32_e32 v18, s8 +; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_mov_b32_e32 v22, s12 ; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v3, s19 ; VI-NEXT: v_mov_b32_e32 v5, s21 @@ -32885,11 +32881,9 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; VI-NEXT: v_mov_b32_e32 v13, s29 ; VI-NEXT: v_mov_b32_e32 v15, s5 ; VI-NEXT: v_mov_b32_e32 v17, s7 -; VI-NEXT: v_mov_b32_e32 v19, s13 -; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_mov_b32_e32 v19, s9 ; VI-NEXT: v_mov_b32_e32 v21, s11 -; VI-NEXT: v_mov_b32_e32 v22, s8 -; VI-NEXT: v_mov_b32_e32 v23, s9 +; VI-NEXT: v_mov_b32_e32 v23, s13 ; VI-NEXT: v_mov_b32_e32 v53, s79 ; VI-NEXT: v_mov_b32_e32 v51, s78 ; VI-NEXT: v_mov_b32_e32 v49, s77 @@ -32969,12 +32963,12 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: v_readfirstlane_b32 s4, v10 -; GFX9-NEXT: v_readfirstlane_b32 s9, v9 -; GFX9-NEXT: v_readfirstlane_b32 s8, v8 +; GFX9-NEXT: v_readfirstlane_b32 s13, v9 +; GFX9-NEXT: v_readfirstlane_b32 s12, v8 ; GFX9-NEXT: v_readfirstlane_b32 s11, v7 ; GFX9-NEXT: v_readfirstlane_b32 s10, v6 -; GFX9-NEXT: v_readfirstlane_b32 s13, v5 -; GFX9-NEXT: v_readfirstlane_b32 s12, v4 +; GFX9-NEXT: v_readfirstlane_b32 s9, v5 +; GFX9-NEXT: v_readfirstlane_b32 s8, v4 ; GFX9-NEXT: v_readfirstlane_b32 s7, v3 ; GFX9-NEXT: v_readfirstlane_b32 s6, v2 ; GFX9-NEXT: v_readfirstlane_b32 s5, v1 @@ -32982,12 +32976,12 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; GFX9-NEXT: v_readfirstlane_b32 s4, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB53_3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: s_lshr_b32 s40, s9, 16 -; GFX9-NEXT: s_lshr_b32 s60, s8, 16 +; GFX9-NEXT: s_lshr_b32 s40, s13, 16 +; GFX9-NEXT: s_lshr_b32 s60, s12, 16 ; GFX9-NEXT: s_lshr_b32 s41, s11, 16 ; GFX9-NEXT: s_lshr_b32 s61, s10, 16 -; GFX9-NEXT: s_lshr_b32 s42, s13, 16 -; GFX9-NEXT: s_lshr_b32 s62, s12, 16 +; GFX9-NEXT: s_lshr_b32 s42, s9, 16 +; GFX9-NEXT: s_lshr_b32 s62, s8, 16 ; GFX9-NEXT: s_lshr_b32 s43, s7, 16 ; GFX9-NEXT: s_lshr_b32 s63, s6, 16 ; GFX9-NEXT: s_lshr_b32 s44, s5, 16 @@ -33008,9 +33002,9 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; GFX9-NEXT: s_lshr_b32 s79, s16, 16 ; GFX9-NEXT: s_cbranch_execnz .LBB53_4 ; GFX9-NEXT: .LBB53_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[22:23], s[8:9], 1.0 +; GFX9-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 ; GFX9-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 -; GFX9-NEXT: v_add_f64 v[18:19], s[12:13], 1.0 +; GFX9-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; GFX9-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; GFX9-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -33081,7 +33075,9 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v12, s28 ; GFX9-NEXT: v_mov_b32_e32 v14, s4 ; GFX9-NEXT: v_mov_b32_e32 v16, s6 -; GFX9-NEXT: v_mov_b32_e32 v18, s12 +; GFX9-NEXT: v_mov_b32_e32 v18, s8 +; GFX9-NEXT: v_mov_b32_e32 v20, s10 +; GFX9-NEXT: v_mov_b32_e32 v22, s12 ; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: v_mov_b32_e32 v5, s21 @@ -33091,11 +33087,9 @@ define inreg <48 x half> @bitcast_v12f64_to_v48f16_scalar(<12 x double> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v13, s29 ; GFX9-NEXT: v_mov_b32_e32 v15, s5 ; GFX9-NEXT: v_mov_b32_e32 v17, s7 -; GFX9-NEXT: v_mov_b32_e32 v19, s13 -; GFX9-NEXT: v_mov_b32_e32 v20, s10 +; GFX9-NEXT: v_mov_b32_e32 v19, s9 ; GFX9-NEXT: v_mov_b32_e32 v21, s11 -; GFX9-NEXT: v_mov_b32_e32 v22, s8 -; GFX9-NEXT: v_mov_b32_e32 v23, s9 +; GFX9-NEXT: v_mov_b32_e32 v23, s13 ; GFX9-NEXT: v_mov_b32_e32 v53, s79 ; GFX9-NEXT: v_mov_b32_e32 v51, s78 ; GFX9-NEXT: v_mov_b32_e32 v49, s77 @@ -33606,13 +33600,13 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v54 ; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v55 ; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v40 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v41 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v45 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v47 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24 ; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill @@ -33631,11 +33625,11 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v46 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v35 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v46 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v45 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -33646,10 +33640,10 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v57 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v32 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v41 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v57 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v56 @@ -33680,13 +33674,13 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr53 ; SI-NEXT: ; implicit-def: $vgpr52 ; SI-NEXT: ; implicit-def: $vgpr51 -; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr35 +; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr62 @@ -33795,169 +33789,167 @@ define <12 x double> @bitcast_v48f16_to_v12f64(<48 x half> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB54_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v0, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v0, v35 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v46 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v45 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v44 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v43 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v34 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v44 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v45 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v58 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v42 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v41 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v43 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v32 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v33 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v42 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v57 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v41 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v40 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v63 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v57 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v55 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v54 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v54 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v53 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v60 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v32 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v60 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v52 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v51 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v16, v49 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v48 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v63 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v48 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v19, v38 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v62 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_cvt_f32_f16_e32 v19, v38 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v37 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v11, v13, v11 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(6) ; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_or_b32_e32 v12, v14, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v14, v50 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 +; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 ; SI-NEXT: v_or_b32_e32 v13, v14, v13 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 ; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: v_or_b32_e32 v14, v16, v14 ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 +; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 +; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -35235,13 +35227,13 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a ; VI-NEXT: .LBB55_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v23, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s83 -; VI-NEXT: v_mov_b32_e32 v2, s82 ; VI-NEXT: v_add_f16_sdwa v0, v0, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v23 -; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v23 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s82 +; VI-NEXT: v_add_f16_sdwa v1, v1, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v23 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s81 ; VI-NEXT: v_add_f16_sdwa v2, v2, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v23 @@ -35420,8 +35412,6 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 @@ -35431,8 +35421,7 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a ; GFX9-NEXT: v_readfirstlane_b32 s76, v3 ; GFX9-NEXT: v_readfirstlane_b32 s78, v2 ; GFX9-NEXT: v_readfirstlane_b32 s88, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -35445,6 +35434,8 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 ; GFX9-NEXT: s_lshr_b32 s14, s19, 16 ; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s60, s59, 16 ; GFX9-NEXT: s_lshr_b32 s61, s58, 16 ; GFX9-NEXT: s_lshr_b32 s62, s57, 16 @@ -35454,10 +35445,11 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v10 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v10 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 ; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 ; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 @@ -35470,7 +35462,7 @@ define inreg <12 x double> @bitcast_v48f16_to_v12f64_scalar(<48 x half> inreg %a ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s51, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s52, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s76, s77 @@ -35711,29 +35703,29 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v1 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v3 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v24 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v53 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v5 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v49 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v5 ; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v50 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v39 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 ; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v39 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v9 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v36 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v9 ; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v37 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v11 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v34 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v11 ; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32 ; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v31 ; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: ; kill: killed $vgpr24 @@ -35778,59 +35770,60 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: ; kill: killed $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v22 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 ; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v20 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v20 ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v18 +; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v18 ; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v16 ; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v14 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v13 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v12 ; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v10 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v6 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v4 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v2 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v8 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v6 +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v4 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v2 ; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v0 ; SI-NEXT: ; kill: killed $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v54 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v52 -; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v51 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 -; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v49 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v48 -; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v30 -; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v38 -; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v29 -; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v35 -; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v28 -; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v33 -; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v25 -; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v41 -; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v26 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v55 -; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v31 +; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v54 +; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v26 +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v41 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v40 +; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v33 ; SI-NEXT: ; kill: killed $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr46 -; SI-NEXT: ; implicit-def: $vgpr44 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr40 +; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr52 -; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr31 ; SI-NEXT: ; kill: killed $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc @@ -35838,106 +35831,105 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB56_2 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v53 -; SI-NEXT: v_or_b32_e32 v46, v1, v24 -; SI-NEXT: v_alignbit_b32 v1, v46, v58, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v49 +; SI-NEXT: v_or_b32_e32 v43, v1, v24 +; SI-NEXT: v_alignbit_b32 v1, v43, v45, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50 -; SI-NEXT: v_or_b32_e32 v44, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v44, v60, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v39 +; SI-NEXT: v_or_b32_e32 v42, v1, v3 +; SI-NEXT: v_alignbit_b32 v1, v42, v56, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v39 -; SI-NEXT: v_or_b32_e32 v43, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v43, v61, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36 +; SI-NEXT: v_or_b32_e32 v40, v1, v3 +; SI-NEXT: v_alignbit_b32 v1, v40, v58, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37 -; SI-NEXT: v_or_b32_e32 v41, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v41, v36, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 -; SI-NEXT: v_or_b32_e32 v55, v1, v3 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_alignbit_b32 v1, v55, v51, 16 -; SI-NEXT: v_or_b32_e32 v0, v0, v58 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v54, v1, v3 +; SI-NEXT: v_alignbit_b32 v1, v54, v60, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_or_b32_e32 v52, v1, v3 +; SI-NEXT: v_or_b32_e32 v0, v0, v45 +; SI-NEXT: v_alignbit_b32 v1, v52, v50, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v52, v1, v3 -; SI-NEXT: v_or_b32_e32 v0, v0, v60 -; SI-NEXT: v_alignbit_b32 v1, v52, v40, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v31 +; SI-NEXT: v_or_b32_e32 v0, v0, v56 +; SI-NEXT: v_or_b32_e32 v51, v1, v3 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v51, v53, 16 +; SI-NEXT: v_or_b32_e32 v0, v0, v58 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13 -; SI-NEXT: v_or_b32_e32 v0, v0, v61 -; SI-NEXT: v_or_b32_e32 v49, v1, v62 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6 -; SI-NEXT: v_alignbit_b32 v1, v49, v45, 16 -; SI-NEXT: v_or_b32_e32 v0, v0, v36 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v48, v1, v63 +; SI-NEXT: v_or_b32_e32 v0, v0, v60 +; SI-NEXT: v_alignbit_b32 v1, v48, v44, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v38, v1, v57 -; SI-NEXT: v_or_b32_e32 v0, v0, v51 -; SI-NEXT: v_alignbit_b32 v1, v38, v59, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v0, v0, v50 +; SI-NEXT: v_or_b32_e32 v38, v1, v47 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v38, v59, 16 +; SI-NEXT: v_or_b32_e32 v0, v0, v53 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v0, v0, v40 -; SI-NEXT: v_or_b32_e32 v35, v1, v54 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12 -; SI-NEXT: v_alignbit_b32 v1, v35, v63, 16 -; SI-NEXT: v_or_b32_e32 v0, v0, v45 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v37, v1, v57 +; SI-NEXT: v_or_b32_e32 v0, v0, v44 +; SI-NEXT: v_alignbit_b32 v1, v37, v46, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v33, v1, v47 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19 ; SI-NEXT: v_or_b32_e32 v0, v0, v59 -; SI-NEXT: v_alignbit_b32 v1, v33, v48, 16 +; SI-NEXT: v_or_b32_e32 v35, v1, v25 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v35, v55, 16 +; SI-NEXT: v_or_b32_e32 v0, v0, v46 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21 -; SI-NEXT: v_or_b32_e32 v0, v0, v63 -; SI-NEXT: v_or_b32_e32 v31, v1, v25 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18 ; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: v_or_b32_e32 v0, v0, v48 +; SI-NEXT: v_or_b32_e32 v33, v1, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v55 ; SI-NEXT: ; kill: killed $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: v_alignbit_b32 v1, v31, v42, 16 +; SI-NEXT: v_alignbit_b32 v1, v33, v41, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20 @@ -35946,20 +35938,20 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23 -; SI-NEXT: v_or_b32_e32 v0, v0, v42 +; SI-NEXT: v_or_b32_e32 v0, v0, v41 ; SI-NEXT: ; kill: killed $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: v_or_b32_e32 v24, v1, v26 +; SI-NEXT: v_or_b32_e32 v24, v1, v61 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v22 ; SI-NEXT: ; kill: killed $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: v_alignbit_b32 v1, v24, v56, 16 -; SI-NEXT: v_or_b32_e32 v0, v0, v56 +; SI-NEXT: v_alignbit_b32 v1, v24, v62, 16 +; SI-NEXT: v_or_b32_e32 v0, v0, v62 ; SI-NEXT: ; kill: killed $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0 ; SI-NEXT: ; implicit-def: $vgpr1 @@ -35985,199 +35977,198 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr21 ; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr45 +; SI-NEXT: ; implicit-def: $vgpr56 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr60 -; SI-NEXT: ; implicit-def: $vgpr61 -; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: ; implicit-def: $vgpr50 ; SI-NEXT: ; kill: killed $vgpr25 -; SI-NEXT: ; implicit-def: $vgpr40 -; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr45 -; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr59 -; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr53 ; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr44 ; SI-NEXT: ; implicit-def: $vgpr47 -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; implicit-def: $vgpr59 +; SI-NEXT: ; implicit-def: $vgpr57 +; SI-NEXT: ; implicit-def: $vgpr46 ; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr55 ; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: ; implicit-def: $vgpr41 +; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: .LBB56_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB56_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 -; SI-NEXT: v_or_b32_e32 v22, v56, v22 +; SI-NEXT: v_or_b32_e32 v22, v62, v22 ; SI-NEXT: v_add_i32_e32 v27, vcc, 0x30000, v22 ; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v23 ; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v22, v26, v22 -; SI-NEXT: v_or_b32_e32 v20, v42, v20 -; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_or_b32_e32 v22, v61, v22 +; SI-NEXT: v_or_b32_e32 v20, v41, v20 ; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v22 ; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v20 ; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v21 ; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v20, v25, v20 -; SI-NEXT: v_or_b32_e32 v18, v48, v18 -; SI-NEXT: v_add_i32_e32 v31, vcc, s6, v20 +; SI-NEXT: v_or_b32_e32 v20, v26, v20 +; SI-NEXT: v_or_b32_e32 v18, v55, v18 +; SI-NEXT: v_add_i32_e32 v33, vcc, s6, v20 ; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v18 ; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v19 ; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v18, v47, v18 -; SI-NEXT: v_or_b32_e32 v16, v63, v16 -; SI-NEXT: v_add_i32_e32 v33, vcc, s6, v18 +; SI-NEXT: v_or_b32_e32 v18, v25, v18 +; SI-NEXT: v_or_b32_e32 v16, v46, v16 +; SI-NEXT: v_add_i32_e32 v35, vcc, s6, v18 ; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v17 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v16, v54, v16 +; SI-NEXT: v_or_b32_e32 v16, v57, v16 ; SI-NEXT: v_or_b32_e32 v14, v59, v14 -; SI-NEXT: v_add_i32_e32 v35, vcc, s6, v16 +; SI-NEXT: v_add_i32_e32 v37, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v15 ; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v14, v57, v14 -; SI-NEXT: v_or_b32_e32 v12, v45, v12 +; SI-NEXT: v_or_b32_e32 v14, v47, v14 +; SI-NEXT: v_or_b32_e32 v12, v44, v12 ; SI-NEXT: v_add_i32_e32 v38, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v12 ; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v13 ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v12, v62, v12 -; SI-NEXT: v_or_b32_e32 v10, v40, v10 -; SI-NEXT: v_add_i32_e32 v49, vcc, s6, v12 +; SI-NEXT: v_or_b32_e32 v12, v63, v12 +; SI-NEXT: v_or_b32_e32 v10, v53, v10 +; SI-NEXT: v_add_i32_e32 v48, vcc, s6, v12 ; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v10 ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11 ; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v8, v51, v8 +; SI-NEXT: v_or_b32_e32 v8, v50, v8 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v6, v36, v6 +; SI-NEXT: v_or_b32_e32 v6, v60, v6 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_or_b32_e32 v4, v61, v4 +; SI-NEXT: v_or_b32_e32 v4, v58, v4 ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v60, v2 +; SI-NEXT: v_or_b32_e32 v2, v56, v2 ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v58, v0 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v49 +; SI-NEXT: v_or_b32_e32 v0, v45, v0 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v48 ; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v38 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v35 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v37 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v52, vcc, s6, v10 +; SI-NEXT: v_add_i32_e32 v51, vcc, s6, v10 ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v9 ; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v52 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v51 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v8 +; SI-NEXT: v_add_i32_e32 v52, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v7 ; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v55 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v52 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_add_i32_e32 v41, vcc, s6, v6 +; SI-NEXT: v_add_i32_e32 v54, vcc, s6, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v5 ; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v41 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v54 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_add_i32_e32 v43, vcc, s6, v4 +; SI-NEXT: v_add_i32_e32 v40, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v3 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v40 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_add_i32_e32 v44, vcc, s6, v2 +; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v42 ; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v46, vcc, s6, v0 -; SI-NEXT: v_alignbit_b32 v0, v46, v2, 16 +; SI-NEXT: v_add_i32_e32 v43, vcc, s6, v0 +; SI-NEXT: v_alignbit_b32 v0, v43, v2, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v42, v4, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v40, v6, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v44, v4, 16 +; SI-NEXT: v_alignbit_b32 v0, v54, v8, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v43, v6, 16 +; SI-NEXT: v_alignbit_b32 v0, v52, v10, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v41, v8, 16 +; SI-NEXT: v_alignbit_b32 v0, v51, v12, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v55, v10, 16 +; SI-NEXT: v_alignbit_b32 v0, v48, v14, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v52, v12, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v49, v14, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_alignbit_b32 v0, v38, v16, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v35, v18, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v37, v18, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v33, v20, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v35, v20, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v31, v22, 16 +; SI-NEXT: v_alignbit_b32 v0, v33, v22, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_alignbit_b32 v0, v24, v27, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v31 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v33 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v33 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v35 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24 @@ -36186,37 +36177,37 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_or_b64 exec, exec, s[4:5] ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v53 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v50 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v39 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v32 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v31 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v30 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v29 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v28 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v27 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v46 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v43 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: s_waitcnt vmcnt(11) @@ -36244,21 +36235,15 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v44 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v42 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v43 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v40 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v6, v6, v7 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v41 -; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -36276,21 +36261,27 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_or_b32_e32 v6, v6, v7 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v54 +; SI-NEXT: v_or_b32_e32 v7, v7, v8 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v55 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v52 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v52 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v51 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v49 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v48 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) @@ -36302,19 +36293,19 @@ define <48 x half> @bitcast_v48i16_to_v48f16(<48 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v35 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v37 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v33 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v35 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v31 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v33 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) @@ -36789,8 +36780,9 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_writelane_b32 v24, s34, 0 ; SI-NEXT: v_writelane_b32 v24, s35, 1 ; SI-NEXT: v_writelane_b32 v24, s36, 2 @@ -36827,252 +36819,327 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i ; SI-NEXT: v_writelane_b32 v24, s99, 33 ; SI-NEXT: v_writelane_b32 v24, s30, 34 ; SI-NEXT: v_writelane_b32 v24, s31, 35 -; SI-NEXT: v_readfirstlane_b32 s99, v9 -; SI-NEXT: v_readfirstlane_b32 s65, v8 -; SI-NEXT: v_readfirstlane_b32 s96, v7 -; SI-NEXT: v_readfirstlane_b32 s98, v6 -; SI-NEXT: v_readfirstlane_b32 s85, v5 -; SI-NEXT: v_readfirstlane_b32 s87, v4 -; SI-NEXT: v_readfirstlane_b32 s82, v3 -; SI-NEXT: v_readfirstlane_b32 s84, v2 -; SI-NEXT: v_readfirstlane_b32 s71, v1 -; SI-NEXT: v_readfirstlane_b32 s81, v0 -; SI-NEXT: s_lshr_b32 s50, s29, 16 -; SI-NEXT: s_lshr_b32 s70, s28, 16 -; SI-NEXT: s_lshr_b32 s49, s27, 16 -; SI-NEXT: s_lshr_b32 s69, s26, 16 -; SI-NEXT: s_lshr_b32 s48, s25, 16 -; SI-NEXT: s_lshr_b32 s68, s24, 16 -; SI-NEXT: s_lshr_b32 s39, s23, 16 -; SI-NEXT: s_lshr_b32 s67, s22, 16 -; SI-NEXT: s_lshr_b32 s38, s21, 16 -; SI-NEXT: s_lshr_b32 s66, s20, 16 -; SI-NEXT: s_lshr_b32 s37, s19, 16 -; SI-NEXT: s_lshr_b32 s63, s18, 16 -; SI-NEXT: s_lshr_b32 s36, s17, 16 -; SI-NEXT: s_lshr_b32 s61, s16, 16 -; SI-NEXT: s_lshr_b32 s55, s99, 16 -; SI-NEXT: s_lshr_b32 s64, s65, 16 -; SI-NEXT: s_lshr_b32 s54, s96, 16 -; SI-NEXT: s_lshr_b32 s97, s98, 16 -; SI-NEXT: s_lshr_b32 s53, s85, 16 -; SI-NEXT: s_lshr_b32 s86, s87, 16 -; SI-NEXT: s_lshr_b32 s52, s82, 16 -; SI-NEXT: s_lshr_b32 s83, s84, 16 -; SI-NEXT: s_lshr_b32 s51, s71, 16 -; SI-NEXT: s_lshr_b32 s80, s81, 16 +; SI-NEXT: v_readfirstlane_b32 s75, v9 +; SI-NEXT: v_readfirstlane_b32 s73, v8 +; SI-NEXT: v_readfirstlane_b32 s85, v7 +; SI-NEXT: v_readfirstlane_b32 s76, v6 +; SI-NEXT: v_readfirstlane_b32 s57, v5 +; SI-NEXT: v_readfirstlane_b32 s77, v4 +; SI-NEXT: v_readfirstlane_b32 s35, v3 +; SI-NEXT: v_readfirstlane_b32 s74, v2 +; SI-NEXT: v_readfirstlane_b32 s47, v1 +; SI-NEXT: v_readfirstlane_b32 s93, v0 +; SI-NEXT: ; implicit-def: $vgpr25 : SGPR spill to VGPR lane +; SI-NEXT: s_lshr_b32 s63, s29, 16 +; SI-NEXT: s_lshr_b32 s38, s28, 16 +; SI-NEXT: s_lshr_b32 s53, s27, 16 +; SI-NEXT: s_lshr_b32 s37, s26, 16 +; SI-NEXT: s_lshr_b32 s61, s25, 16 +; SI-NEXT: s_lshr_b32 s36, s24, 16 +; SI-NEXT: s_lshr_b32 s60, s23, 16 +; SI-NEXT: s_lshr_b32 s91, s22, 16 +; SI-NEXT: s_lshr_b32 s51, s21, 16 +; SI-NEXT: s_lshr_b32 s97, s20, 16 +; SI-NEXT: s_lshr_b32 s49, s19, 16 +; SI-NEXT: s_lshr_b32 s87, s18, 16 +; SI-NEXT: s_lshr_b32 s39, s17, 16 +; SI-NEXT: s_lshr_b32 s99, s16, 16 +; SI-NEXT: s_lshr_b32 s31, s75, 16 +; SI-NEXT: s_lshr_b32 s89, s73, 16 +; SI-NEXT: s_lshr_b32 s95, s85, 16 +; SI-NEXT: s_lshr_b32 s88, s76, 16 +; SI-NEXT: s_lshr_b32 s80, s57, 16 +; SI-NEXT: s_lshr_b32 s30, s77, 16 +; SI-NEXT: s_lshr_b32 s72, s35, 16 +; SI-NEXT: s_lshr_b32 s62, s74, 16 +; SI-NEXT: s_lshr_b32 s68, s47, 16 +; SI-NEXT: s_lshr_b32 s92, s93, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v10 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_writelane_b32 v25, s29, 0 ; SI-NEXT: s_cmp_lg_u32 s4, 0 +; SI-NEXT: v_writelane_b32 v25, s47, 1 +; SI-NEXT: v_writelane_b32 v25, s57, 2 ; SI-NEXT: s_cbranch_scc0 .LBB57_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s7, s36, 16 ; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s60, s61, 16 -; SI-NEXT: s_mov_b32 s9, s61 -; SI-NEXT: s_or_b32 s61, s5, s7 -; SI-NEXT: s_and_b32 s5, s19, 0xffff -; SI-NEXT: s_lshl_b32 s7, s37, 16 -; SI-NEXT: s_or_b32 s46, s4, s60 +; SI-NEXT: s_mov_b32 s13, s80 +; SI-NEXT: s_lshl_b32 s80, s99, 16 +; SI-NEXT: s_and_b32 s5, s17, 0xffff +; SI-NEXT: s_lshl_b32 s7, s39, 16 +; SI-NEXT: s_or_b32 s58, s4, s80 ; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s62, s63, 16 -; SI-NEXT: s_mov_b32 s11, s63 -; SI-NEXT: s_or_b32 s63, s5, s7 -; SI-NEXT: s_and_b32 s5, s21, 0xffff -; SI-NEXT: s_lshl_b32 s7, s38, 16 -; SI-NEXT: s_or_b32 s44, s4, s62 +; SI-NEXT: s_lshl_b32 s70, s87, 16 +; SI-NEXT: s_or_b32 s81, s5, s7 +; SI-NEXT: s_and_b32 s5, s19, 0xffff +; SI-NEXT: s_lshl_b32 s7, s49, 16 +; SI-NEXT: s_or_b32 s56, s4, s70 ; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s72, s66, 16 -; SI-NEXT: s_or_b32 s73, s5, s7 -; SI-NEXT: s_and_b32 s5, s23, 0xffff -; SI-NEXT: s_lshl_b32 s7, s39, 16 -; SI-NEXT: s_or_b32 s42, s4, s72 +; SI-NEXT: s_mov_b32 s11, s68 +; SI-NEXT: s_lshl_b32 s68, s97, 16 +; SI-NEXT: s_or_b32 s71, s5, s7 +; SI-NEXT: s_and_b32 s5, s21, 0xffff +; SI-NEXT: s_lshl_b32 s7, s51, 16 +; SI-NEXT: s_or_b32 s46, s4, s68 ; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s74, s67, 16 -; SI-NEXT: s_or_b32 s75, s5, s7 -; SI-NEXT: s_and_b32 s5, s25, 0xffff -; SI-NEXT: s_lshl_b32 s7, s48, 16 -; SI-NEXT: s_or_b32 s40, s4, s74 +; SI-NEXT: s_lshl_b32 s66, s91, 16 +; SI-NEXT: s_or_b32 s69, s5, s7 +; SI-NEXT: s_and_b32 s5, s23, 0xffff +; SI-NEXT: s_lshl_b32 s7, s60, 16 +; SI-NEXT: s_or_b32 s44, s4, s66 ; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s76, s68, 16 -; SI-NEXT: s_or_b32 s77, s5, s7 -; SI-NEXT: s_and_b32 s5, s27, 0xffff -; SI-NEXT: s_lshl_b32 s7, s49, 16 -; SI-NEXT: s_or_b32 s14, s4, s76 +; SI-NEXT: s_lshl_b32 s64, s36, 16 +; SI-NEXT: s_or_b32 s67, s5, s7 +; SI-NEXT: s_and_b32 s5, s25, 0xffff +; SI-NEXT: s_lshl_b32 s7, s61, 16 +; SI-NEXT: s_or_b32 s42, s4, s64 ; SI-NEXT: s_and_b32 s4, s26, 0xffff -; SI-NEXT: s_lshl_b32 s78, s69, 16 -; SI-NEXT: s_or_b32 s79, s5, s7 -; SI-NEXT: s_and_b32 s5, s29, 0xffff -; SI-NEXT: s_lshl_b32 s7, s50, 16 -; SI-NEXT: s_or_b32 s12, s4, s78 +; SI-NEXT: s_lshl_b32 s54, s37, 16 +; SI-NEXT: s_or_b32 s65, s5, s7 +; SI-NEXT: s_mov_b32 s15, s99 +; SI-NEXT: s_or_b32 s40, s4, s54 ; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s88, s70, 16 -; SI-NEXT: s_or_b32 s89, s5, s7 -; SI-NEXT: s_and_b32 s5, s71, 0xffff -; SI-NEXT: s_lshl_b32 s7, s51, 16 -; SI-NEXT: s_or_b32 s10, s4, s88 -; SI-NEXT: s_and_b32 s4, s81, 0xffff -; SI-NEXT: s_lshl_b32 s90, s80, 16 -; SI-NEXT: s_or_b32 s91, s5, s7 -; SI-NEXT: s_and_b32 s5, s82, 0xffff -; SI-NEXT: s_lshl_b32 s7, s52, 16 -; SI-NEXT: s_or_b32 s8, s4, s90 -; SI-NEXT: s_and_b32 s4, s84, 0xffff -; SI-NEXT: s_lshl_b32 s92, s83, 16 -; SI-NEXT: s_or_b32 s93, s5, s7 -; SI-NEXT: s_and_b32 s5, s85, 0xffff +; SI-NEXT: s_lshl_b32 s52, s38, 16 +; SI-NEXT: s_lshr_b64 s[98:99], s[66:67], 16 +; SI-NEXT: s_mov_b32 s66, s60 +; SI-NEXT: s_mov_b32 s5, s61 +; SI-NEXT: s_lshr_b64 s[60:61], s[64:65], 16 +; SI-NEXT: s_or_b32 s14, s4, s52 +; SI-NEXT: s_and_b32 s4, s93, 0xffff +; SI-NEXT: s_lshl_b32 s50, s92, 16 +; SI-NEXT: s_mov_b32 s61, s5 +; SI-NEXT: s_and_b32 s5, s27, 0xffff ; SI-NEXT: s_lshl_b32 s7, s53, 16 -; SI-NEXT: s_or_b32 s6, s4, s92 -; SI-NEXT: s_and_b32 s4, s87, 0xffff -; SI-NEXT: s_lshl_b32 s58, s86, 16 -; SI-NEXT: s_or_b32 s59, s5, s7 -; SI-NEXT: s_and_b32 s5, s96, 0xffff -; SI-NEXT: s_lshl_b32 s7, s54, 16 -; SI-NEXT: s_or_b32 s4, s4, s58 -; SI-NEXT: s_lshl_b32 s56, s97, 16 -; SI-NEXT: s_or_b32 s57, s5, s7 -; SI-NEXT: s_and_b32 s5, s99, 0xffff -; SI-NEXT: s_lshl_b32 s7, s55, 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[58:59], 16 -; SI-NEXT: s_and_b32 s58, s98, 0xffff +; SI-NEXT: s_or_b32 s12, s4, s50 +; SI-NEXT: s_and_b32 s4, s74, 0xffff +; SI-NEXT: s_lshl_b32 s48, s62, 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[80:81], 16 +; SI-NEXT: s_or_b32 s55, s5, s7 +; SI-NEXT: s_or_b32 s10, s4, s48 +; SI-NEXT: s_and_b32 s4, s77, 0xffff +; SI-NEXT: v_writelane_b32 v25, s28, 3 +; SI-NEXT: s_mov_b32 s28, s26 +; SI-NEXT: s_mov_b32 s26, s22 +; SI-NEXT: s_mov_b32 s9, s36 +; SI-NEXT: s_lshl_b32 s36, s88, 16 +; SI-NEXT: s_lshl_b32 vcc_lo, s89, 16 +; SI-NEXT: s_mov_b32 s22, s77 +; SI-NEXT: s_mov_b32 s79, s88 +; SI-NEXT: s_mov_b32 s77, s74 +; SI-NEXT: s_mov_b32 s74, s93 +; SI-NEXT: s_mov_b32 s93, s89 +; SI-NEXT: s_lshr_b64 s[88:89], s[70:71], 16 +; SI-NEXT: s_mov_b32 s5, s63 +; SI-NEXT: s_mov_b32 s70, s62 +; SI-NEXT: s_lshr_b64 s[62:63], s[54:55], 16 +; SI-NEXT: s_mov_b32 s63, s5 +; SI-NEXT: s_and_b32 s5, s29, 0xffff +; SI-NEXT: s_lshl_b32 s7, s63, 16 +; SI-NEXT: s_mov_b32 s80, s13 +; SI-NEXT: s_mov_b32 s13, s53 +; SI-NEXT: s_or_b32 s53, s5, s7 +; SI-NEXT: v_writelane_b32 v25, s24, 4 +; SI-NEXT: s_mov_b32 s24, s92 +; SI-NEXT: s_mov_b32 s92, s38 +; SI-NEXT: s_lshl_b32 s38, s30, 16 +; SI-NEXT: s_mov_b32 s7, s31 +; SI-NEXT: s_mov_b32 s89, s30 +; SI-NEXT: s_lshr_b64 s[30:31], s[52:53], 16 +; SI-NEXT: s_mov_b32 s31, s7 +; SI-NEXT: s_and_b32 s5, s47, 0xffff +; SI-NEXT: s_lshl_b32 s7, s11, 16 +; SI-NEXT: s_mov_b32 s43, s97 +; SI-NEXT: s_lshr_b64 s[96:97], s[68:69], 16 +; SI-NEXT: s_mov_b32 s68, s11 +; SI-NEXT: s_mov_b32 s11, s51 +; SI-NEXT: s_or_b32 s51, s5, s7 +; SI-NEXT: s_mov_b32 s5, s95 +; SI-NEXT: s_lshr_b64 s[94:95], s[50:51], 16 +; SI-NEXT: s_mov_b32 s95, s5 +; SI-NEXT: s_and_b32 s5, s35, 0xffff +; SI-NEXT: s_lshl_b32 s7, s72, 16 +; SI-NEXT: s_mov_b32 s64, s49 +; SI-NEXT: s_or_b32 s49, s5, s7 +; SI-NEXT: s_and_b32 s5, s57, 0xffff +; SI-NEXT: s_lshl_b32 s7, s80, 16 +; SI-NEXT: s_mov_b32 s54, s39 +; SI-NEXT: s_or_b32 s39, s5, s7 +; SI-NEXT: s_and_b32 s5, s85, 0xffff +; SI-NEXT: s_lshl_b32 s7, s95, 16 +; SI-NEXT: s_mov_b32 s45, s91 +; SI-NEXT: s_or_b32 s8, s4, s38 +; SI-NEXT: s_lshr_b64 s[90:91], s[38:39], 16 +; SI-NEXT: s_mov_b32 s38, s37 +; SI-NEXT: s_or_b32 s37, s5, s7 +; SI-NEXT: s_mov_b32 s7, s35 +; SI-NEXT: s_lshr_b64 s[34:35], s[36:37], 16 +; SI-NEXT: s_mov_b32 s35, s7 +; SI-NEXT: s_and_b32 s5, s75, 0xffff +; SI-NEXT: s_lshl_b32 s7, s31, 16 +; SI-NEXT: s_and_b32 s4, s76, 0xffff ; SI-NEXT: s_or_b32 vcc_hi, s5, s7 -; SI-NEXT: s_lshl_b32 vcc_lo, s64, 16 -; SI-NEXT: s_mov_b32 s47, s61 -; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16 -; SI-NEXT: s_mov_b32 s45, s63 -; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16 -; SI-NEXT: s_or_b32 s58, s58, s56 -; SI-NEXT: s_lshr_b64 s[30:31], s[56:57], 16 -; SI-NEXT: s_and_b32 s56, s65, 0xffff -; SI-NEXT: s_mov_b32 s61, s9 -; SI-NEXT: s_mov_b32 s63, s11 -; SI-NEXT: s_mov_b32 s43, s73 -; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16 -; SI-NEXT: s_mov_b32 s41, s75 -; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16 -; SI-NEXT: s_mov_b32 s15, s77 -; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16 -; SI-NEXT: s_mov_b32 s13, s79 -; SI-NEXT: s_lshr_b64 s[78:79], s[78:79], 16 -; SI-NEXT: s_mov_b32 s11, s89 -; SI-NEXT: s_lshr_b64 s[88:89], s[88:89], 16 -; SI-NEXT: s_mov_b32 s9, s91 -; SI-NEXT: s_lshr_b64 s[90:91], s[90:91], 16 -; SI-NEXT: s_mov_b32 s7, s93 -; SI-NEXT: s_lshr_b64 s[92:93], s[92:93], 16 -; SI-NEXT: s_mov_b32 s5, s59 -; SI-NEXT: s_mov_b32 s59, s57 -; SI-NEXT: s_or_b32 s56, s56, vcc_lo -; SI-NEXT: s_mov_b32 s57, vcc_hi -; SI-NEXT: s_lshr_b64 s[34:35], vcc, 16 +; SI-NEXT: s_mov_b32 s41, s87 +; SI-NEXT: s_or_b32 s6, s4, s36 +; SI-NEXT: s_and_b32 s4, s73, 0xffff +; SI-NEXT: s_lshr_b64 s[86:87], s[48:49], 16 +; SI-NEXT: s_mov_b32 s7, s85 +; SI-NEXT: s_lshr_b64 s[84:85], vcc, 16 +; SI-NEXT: s_or_b32 s4, s4, vcc_lo +; SI-NEXT: s_mov_b32 s99, s15 +; SI-NEXT: s_mov_b32 s87, s41 +; SI-NEXT: s_mov_b32 s36, s9 +; SI-NEXT: s_mov_b32 s97, s43 +; SI-NEXT: s_mov_b32 s85, s7 +; SI-NEXT: s_mov_b32 s91, s45 +; SI-NEXT: s_mov_b64 s[82:83], 0 +; SI-NEXT: s_mov_b32 s59, s81 +; SI-NEXT: s_mov_b32 s57, s71 +; SI-NEXT: s_mov_b32 s47, s69 +; SI-NEXT: s_mov_b32 s45, s67 +; SI-NEXT: s_mov_b32 s43, s65 +; SI-NEXT: s_mov_b32 s41, s55 +; SI-NEXT: s_mov_b32 s15, s53 +; SI-NEXT: s_mov_b32 s53, s13 +; SI-NEXT: s_mov_b32 s13, s51 +; SI-NEXT: s_mov_b32 s51, s11 +; SI-NEXT: s_mov_b32 s50, s88 +; SI-NEXT: s_mov_b32 s11, s49 +; SI-NEXT: s_mov_b32 s49, s64 +; SI-NEXT: s_mov_b32 s64, s60 +; SI-NEXT: s_mov_b32 s60, s66 +; SI-NEXT: s_mov_b32 s66, s62 +; SI-NEXT: s_mov_b32 s62, s70 +; SI-NEXT: s_mov_b32 s70, s30 +; SI-NEXT: s_mov_b32 s30, s89 +; SI-NEXT: s_mov_b32 s89, s93 +; SI-NEXT: s_mov_b32 s93, s74 +; SI-NEXT: s_mov_b32 s74, s77 +; SI-NEXT: s_mov_b32 s88, s79 +; SI-NEXT: s_mov_b32 s77, s22 +; SI-NEXT: s_mov_b32 s9, s39 +; SI-NEXT: s_mov_b32 s39, s54 +; SI-NEXT: s_mov_b32 s7, s37 +; SI-NEXT: s_mov_b32 s37, s38 +; SI-NEXT: s_mov_b32 s38, s92 +; SI-NEXT: s_mov_b32 s92, s24 +; SI-NEXT: s_mov_b32 s22, s26 +; SI-NEXT: v_readlane_b32 s24, v25, 4 +; SI-NEXT: s_mov_b32 s26, s28 +; SI-NEXT: v_readlane_b32 s28, v25, 3 +; SI-NEXT: s_mov_b32 s5, vcc_hi ; SI-NEXT: s_cbranch_execnz .LBB57_3 ; SI-NEXT: .LBB57_2: ; %cmp.true -; SI-NEXT: s_add_i32 s65, s65, 3 -; SI-NEXT: s_and_b32 s4, s65, 0xffff -; SI-NEXT: s_lshl_b32 s5, s64, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s99, s99, 3 -; SI-NEXT: s_add_i32 s56, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s99, 0xffff -; SI-NEXT: s_lshl_b32 s5, s55, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s98, s98, 3 -; SI-NEXT: s_add_i32 s57, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s98, 0xffff -; SI-NEXT: s_lshl_b32 s5, s97, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s96, s96, 3 -; SI-NEXT: s_add_i32 s58, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s96, 0xffff -; SI-NEXT: s_lshl_b32 s5, s54, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s87, s87, 3 -; SI-NEXT: s_add_i32 s59, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s87, 0xffff -; SI-NEXT: s_lshl_b32 s5, s86, 16 -; SI-NEXT: s_add_i32 s85, s85, 3 +; SI-NEXT: s_add_i32 s78, s73, 3 +; SI-NEXT: s_and_b32 s4, s78, 0xffff +; SI-NEXT: s_lshl_b32 s5, s89, 16 +; SI-NEXT: s_add_i32 s90, s75, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s85, 0xffff -; SI-NEXT: s_lshl_b32 s6, s53, 16 -; SI-NEXT: s_add_i32 s84, s84, 3 +; SI-NEXT: s_and_b32 s5, s90, 0xffff +; SI-NEXT: s_lshl_b32 s6, s31, 16 +; SI-NEXT: s_add_i32 s89, s76, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s84, 0xffff -; SI-NEXT: s_lshl_b32 s7, s83, 16 -; SI-NEXT: s_add_i32 s82, s82, 3 +; SI-NEXT: s_and_b32 s6, s89, 0xffff +; SI-NEXT: s_lshl_b32 s7, s88, 16 +; SI-NEXT: s_add_i32 s76, s85, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s82, 0xffff -; SI-NEXT: s_lshl_b32 s8, s52, 16 -; SI-NEXT: s_add_i32 s81, s81, 3 +; SI-NEXT: s_and_b32 s7, s76, 0xffff +; SI-NEXT: s_lshl_b32 s8, s95, 16 +; SI-NEXT: s_add_i32 s79, s77, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s81, 0xffff -; SI-NEXT: s_lshl_b32 s9, s80, 16 -; SI-NEXT: s_add_i32 s71, s71, 3 +; SI-NEXT: s_and_b32 s8, s79, 0xffff +; SI-NEXT: s_lshl_b32 s9, s30, 16 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s71, 0xffff -; SI-NEXT: s_lshl_b32 s10, s51, 16 -; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: v_readlane_b32 s9, v25, 2 +; SI-NEXT: s_add_i32 s73, s9, 3 +; SI-NEXT: s_and_b32 s9, s73, 0xffff +; SI-NEXT: s_lshl_b32 s10, s80, 16 +; SI-NEXT: s_add_i32 s77, s74, 3 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s28, 0xffff -; SI-NEXT: s_lshl_b32 s11, s70, 16 -; SI-NEXT: s_add_i32 s29, s29, 3 +; SI-NEXT: s_and_b32 s10, s77, 0xffff +; SI-NEXT: s_lshl_b32 s11, s62, 16 +; SI-NEXT: s_add_i32 s75, s35, 3 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s29, 0xffff -; SI-NEXT: s_lshl_b32 s12, s50, 16 -; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: s_and_b32 s11, s75, 0xffff +; SI-NEXT: s_lshl_b32 s12, s72, 16 +; SI-NEXT: s_add_i32 s74, s93, 3 ; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s12, s26, 0xffff -; SI-NEXT: s_lshl_b32 s13, s69, 16 -; SI-NEXT: s_add_i32 s27, s27, 3 +; SI-NEXT: s_and_b32 s12, s74, 0xffff +; SI-NEXT: s_lshl_b32 s13, s92, 16 ; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s13, s27, 0xffff -; SI-NEXT: s_lshl_b32 s14, s49, 16 -; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: v_readlane_b32 s13, v25, 1 +; SI-NEXT: s_add_i32 s72, s13, 3 +; SI-NEXT: s_and_b32 s13, s72, 0xffff +; SI-NEXT: s_lshl_b32 s14, s68, 16 +; SI-NEXT: s_add_i32 s28, s28, 3 ; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: s_and_b32 s14, s24, 0xffff -; SI-NEXT: s_lshl_b32 s15, s68, 16 -; SI-NEXT: s_add_i32 s25, s25, 3 +; SI-NEXT: s_and_b32 s14, s28, 0xffff +; SI-NEXT: s_lshl_b32 s15, s38, 16 ; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_and_b32 s15, s25, 0xffff -; SI-NEXT: s_lshl_b32 s24, s48, 16 +; SI-NEXT: v_readlane_b32 s15, v25, 0 +; SI-NEXT: s_add_i32 s29, s15, 3 +; SI-NEXT: s_and_b32 s15, s29, 0xffff +; SI-NEXT: s_lshl_b32 s28, s63, 16 +; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: s_or_b32 s15, s28, s15 +; SI-NEXT: s_and_b32 s26, s26, 0xffff +; SI-NEXT: s_lshl_b32 s28, s37, 16 +; SI-NEXT: s_or_b32 s26, s28, s26 +; SI-NEXT: s_add_i32 s27, s27, 3 +; SI-NEXT: s_add_i32 s40, s26, 0x30000 +; SI-NEXT: s_and_b32 s26, s27, 0xffff +; SI-NEXT: s_lshl_b32 s27, s53, 16 +; SI-NEXT: s_or_b32 s26, s27, s26 +; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: s_add_i32 s41, s26, 0x30000 +; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s26, s36, 16 +; SI-NEXT: s_or_b32 s24, s26, s24 +; SI-NEXT: s_add_i32 s25, s25, 3 +; SI-NEXT: s_add_i32 s42, s24, 0x30000 +; SI-NEXT: s_and_b32 s24, s25, 0xffff +; SI-NEXT: s_lshl_b32 s25, s61, 16 +; SI-NEXT: s_or_b32 s24, s25, s24 ; SI-NEXT: s_add_i32 s22, s22, 3 -; SI-NEXT: s_or_b32 s15, s24, s15 +; SI-NEXT: s_add_i32 s43, s24, 0x30000 ; SI-NEXT: s_and_b32 s22, s22, 0xffff -; SI-NEXT: s_lshl_b32 s24, s67, 16 +; SI-NEXT: s_lshl_b32 s24, s91, 16 ; SI-NEXT: s_or_b32 s22, s24, s22 ; SI-NEXT: s_add_i32 s23, s23, 3 -; SI-NEXT: s_add_i32 s40, s22, 0x30000 +; SI-NEXT: s_add_i32 s44, s22, 0x30000 ; SI-NEXT: s_and_b32 s22, s23, 0xffff -; SI-NEXT: s_lshl_b32 s23, s39, 16 +; SI-NEXT: s_lshl_b32 s23, s60, 16 ; SI-NEXT: s_or_b32 s22, s23, s22 ; SI-NEXT: s_add_i32 s20, s20, 3 -; SI-NEXT: s_add_i32 s41, s22, 0x30000 +; SI-NEXT: s_add_i32 s45, s22, 0x30000 ; SI-NEXT: s_and_b32 s20, s20, 0xffff -; SI-NEXT: s_lshl_b32 s22, s66, 16 +; SI-NEXT: s_lshl_b32 s22, s97, 16 ; SI-NEXT: s_or_b32 s20, s22, s20 ; SI-NEXT: s_add_i32 s21, s21, 3 -; SI-NEXT: s_add_i32 s42, s20, 0x30000 +; SI-NEXT: s_add_i32 s46, s20, 0x30000 ; SI-NEXT: s_and_b32 s20, s21, 0xffff -; SI-NEXT: s_lshl_b32 s21, s38, 16 +; SI-NEXT: s_lshl_b32 s21, s51, 16 ; SI-NEXT: s_or_b32 s20, s21, s20 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_add_i32 s43, s20, 0x30000 +; SI-NEXT: s_add_i32 s47, s20, 0x30000 ; SI-NEXT: s_and_b32 s18, s18, 0xffff -; SI-NEXT: s_lshl_b32 s20, s63, 16 +; SI-NEXT: s_lshl_b32 s20, s87, 16 ; SI-NEXT: s_or_b32 s18, s20, s18 ; SI-NEXT: s_add_i32 s19, s19, 3 -; SI-NEXT: s_add_i32 s44, s18, 0x30000 +; SI-NEXT: s_add_i32 s56, s18, 0x30000 ; SI-NEXT: s_and_b32 s18, s19, 0xffff -; SI-NEXT: s_lshl_b32 s19, s37, 16 +; SI-NEXT: s_lshl_b32 s19, s49, 16 ; SI-NEXT: s_or_b32 s18, s19, s18 ; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_add_i32 s45, s18, 0x30000 +; SI-NEXT: s_add_i32 s57, s18, 0x30000 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_lshl_b32 s18, s61, 16 +; SI-NEXT: s_lshl_b32 s18, s99, 16 ; SI-NEXT: s_or_b32 s16, s18, s16 ; SI-NEXT: s_add_i32 s17, s17, 3 -; SI-NEXT: s_add_i32 s46, s16, 0x30000 +; SI-NEXT: s_add_i32 s58, s16, 0x30000 ; SI-NEXT: s_and_b32 s16, s17, 0xffff -; SI-NEXT: s_lshl_b32 s17, s36, 16 +; SI-NEXT: s_lshl_b32 s17, s39, 16 +; SI-NEXT: s_add_i32 s12, s12, 0x30000 +; SI-NEXT: s_add_i32 s13, s13, 0x30000 ; SI-NEXT: s_or_b32 s16, s17, s16 ; SI-NEXT: s_add_i32 s4, s4, 0x30000 ; SI-NEXT: s_add_i32 s5, s5, 0x30000 @@ -37082,108 +37149,106 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i ; SI-NEXT: s_add_i32 s9, s9, 0x30000 ; SI-NEXT: s_add_i32 s10, s10, 0x30000 ; SI-NEXT: s_add_i32 s11, s11, 0x30000 -; SI-NEXT: s_add_i32 s12, s12, 0x30000 -; SI-NEXT: s_add_i32 s13, s13, 0x30000 ; SI-NEXT: s_add_i32 s14, s14, 0x30000 ; SI-NEXT: s_add_i32 s15, s15, 0x30000 -; SI-NEXT: s_add_i32 s47, s16, 0x30000 -; SI-NEXT: s_lshr_b64 s[60:61], s[46:47], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[44:45], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[10:11], 16 +; SI-NEXT: s_add_i32 s59, s16, 0x30000 +; SI-NEXT: s_lshr_b64 s[50:51], s[56:57], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[58:59], 16 +; SI-NEXT: s_lshr_b64 s[96:97], s[46:47], 16 +; SI-NEXT: s_lshr_b64 s[98:99], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[64:65], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[70:71], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[86:87], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[58:59], 16 -; SI-NEXT: s_lshr_b64 s[34:35], s[56:57], 16 -; SI-NEXT: s_lshr_b32 s36, s47, 16 -; SI-NEXT: s_lshr_b32 s37, s45, 16 -; SI-NEXT: s_lshr_b32 s38, s43, 16 -; SI-NEXT: s_lshr_b32 s39, s41, 16 -; SI-NEXT: s_lshr_b32 s48, s15, 16 -; SI-NEXT: s_lshr_b32 s49, s13, 16 -; SI-NEXT: s_lshr_b32 s50, s11, 16 -; SI-NEXT: s_lshr_b32 s51, s9, 16 -; SI-NEXT: s_lshr_b32 s52, s7, 16 -; SI-NEXT: s_lshr_b32 s53, s5, 16 -; SI-NEXT: s_lshr_b32 s54, s59, 16 -; SI-NEXT: s_lshr_b32 s55, s57, 16 +; SI-NEXT: s_lshr_b64 s[34:35], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[84:85], s[4:5], 16 +; SI-NEXT: s_lshr_b32 s39, s59, 16 +; SI-NEXT: s_lshr_b32 s49, s57, 16 +; SI-NEXT: s_lshr_b32 s51, s47, 16 +; SI-NEXT: s_lshr_b32 s60, s45, 16 +; SI-NEXT: s_lshr_b32 s61, s43, 16 +; SI-NEXT: s_lshr_b32 s53, s41, 16 +; SI-NEXT: s_lshr_b32 s63, s15, 16 +; SI-NEXT: s_lshr_b32 s68, s13, 16 +; SI-NEXT: s_lshr_b32 s72, s11, 16 +; SI-NEXT: s_lshr_b32 s80, s9, 16 +; SI-NEXT: s_lshr_b32 s95, s7, 16 +; SI-NEXT: s_lshr_b32 s31, s5, 16 ; SI-NEXT: .LBB57_3: ; %end -; SI-NEXT: s_and_b32 s16, s46, 0xffff -; SI-NEXT: s_lshl_b32 s17, s60, 16 +; SI-NEXT: s_and_b32 s16, s58, 0xffff +; SI-NEXT: s_lshl_b32 s17, s78, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s47, 0xffff -; SI-NEXT: s_lshl_b32 s18, s36, 16 +; SI-NEXT: s_and_b32 s17, s59, 0xffff +; SI-NEXT: s_lshl_b32 s18, s39, 16 ; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s18, s44, 0xffff -; SI-NEXT: s_lshl_b32 s19, s62, 16 +; SI-NEXT: s_and_b32 s18, s56, 0xffff +; SI-NEXT: s_lshl_b32 s19, s50, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_and_b32 s19, s45, 0xffff -; SI-NEXT: s_lshl_b32 s20, s37, 16 +; SI-NEXT: s_and_b32 s19, s57, 0xffff +; SI-NEXT: s_lshl_b32 s20, s49, 16 ; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_and_b32 s20, s42, 0xffff -; SI-NEXT: s_lshl_b32 s21, s72, 16 +; SI-NEXT: s_and_b32 s20, s46, 0xffff +; SI-NEXT: s_lshl_b32 s21, s96, 16 ; SI-NEXT: s_or_b32 s20, s20, s21 -; SI-NEXT: s_and_b32 s21, s43, 0xffff -; SI-NEXT: s_lshl_b32 s22, s38, 16 +; SI-NEXT: s_and_b32 s21, s47, 0xffff +; SI-NEXT: s_lshl_b32 s22, s51, 16 ; SI-NEXT: s_or_b32 s21, s21, s22 -; SI-NEXT: s_and_b32 s22, s40, 0xffff -; SI-NEXT: s_lshl_b32 s23, s74, 16 +; SI-NEXT: s_and_b32 s22, s44, 0xffff +; SI-NEXT: s_lshl_b32 s23, s98, 16 ; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_and_b32 s23, s41, 0xffff -; SI-NEXT: s_lshl_b32 s24, s39, 16 +; SI-NEXT: s_and_b32 s23, s45, 0xffff +; SI-NEXT: s_lshl_b32 s24, s60, 16 ; SI-NEXT: s_or_b32 s23, s23, s24 +; SI-NEXT: s_and_b32 s24, s42, 0xffff +; SI-NEXT: s_lshl_b32 s25, s64, 16 +; SI-NEXT: s_or_b32 s24, s24, s25 +; SI-NEXT: s_and_b32 s25, s43, 0xffff +; SI-NEXT: s_lshl_b32 s26, s61, 16 +; SI-NEXT: s_or_b32 s25, s25, s26 +; SI-NEXT: s_and_b32 s26, s40, 0xffff +; SI-NEXT: s_lshl_b32 s27, s66, 16 +; SI-NEXT: s_or_b32 s26, s26, s27 +; SI-NEXT: s_and_b32 s27, s41, 0xffff +; SI-NEXT: s_lshl_b32 s28, s53, 16 +; SI-NEXT: s_or_b32 s27, s27, s28 ; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s24, s76, 16 -; SI-NEXT: s_or_b32 s14, s14, s24 +; SI-NEXT: s_lshl_b32 s28, s70, 16 +; SI-NEXT: s_or_b32 s14, s14, s28 ; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s24, s48, 16 -; SI-NEXT: s_or_b32 s15, s15, s24 +; SI-NEXT: s_lshl_b32 s28, s63, 16 +; SI-NEXT: s_or_b32 s15, s15, s28 ; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s24, s78, 16 -; SI-NEXT: s_or_b32 s12, s12, s24 +; SI-NEXT: s_lshl_b32 s28, s94, 16 +; SI-NEXT: s_or_b32 s12, s12, s28 ; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s24, s49, 16 -; SI-NEXT: s_or_b32 s13, s13, s24 +; SI-NEXT: s_lshl_b32 s28, s68, 16 +; SI-NEXT: s_or_b32 s13, s13, s28 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s24, s88, 16 -; SI-NEXT: s_or_b32 s10, s10, s24 +; SI-NEXT: s_lshl_b32 s28, s86, 16 +; SI-NEXT: s_or_b32 s10, s10, s28 ; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s24, s50, 16 -; SI-NEXT: s_or_b32 s11, s11, s24 +; SI-NEXT: s_lshl_b32 s28, s72, 16 +; SI-NEXT: s_or_b32 s11, s11, s28 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s24, s90, 16 -; SI-NEXT: s_or_b32 s8, s8, s24 +; SI-NEXT: s_lshl_b32 s28, s90, 16 +; SI-NEXT: s_or_b32 s8, s8, s28 ; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s24, s51, 16 -; SI-NEXT: s_or_b32 s9, s9, s24 +; SI-NEXT: s_lshl_b32 s28, s80, 16 +; SI-NEXT: s_or_b32 s9, s9, s28 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s24, s92, 16 -; SI-NEXT: s_or_b32 s6, s6, s24 +; SI-NEXT: s_lshl_b32 s28, s34, 16 +; SI-NEXT: s_or_b32 s6, s6, s28 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s24, s52, 16 -; SI-NEXT: s_or_b32 s7, s7, s24 +; SI-NEXT: s_lshl_b32 s28, s95, 16 +; SI-NEXT: s_or_b32 s7, s7, s28 ; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s24, s94, 16 -; SI-NEXT: s_or_b32 s4, s4, s24 +; SI-NEXT: s_lshl_b32 s28, s84, 16 +; SI-NEXT: s_or_b32 s4, s4, s28 ; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s24, s53, 16 -; SI-NEXT: s_or_b32 s5, s5, s24 -; SI-NEXT: s_and_b32 s24, s58, 0xffff -; SI-NEXT: s_lshl_b32 s25, s30, 16 -; SI-NEXT: s_or_b32 s24, s24, s25 -; SI-NEXT: s_and_b32 s25, s59, 0xffff -; SI-NEXT: s_lshl_b32 s26, s54, 16 -; SI-NEXT: s_or_b32 s25, s25, s26 -; SI-NEXT: s_and_b32 s26, s56, 0xffff -; SI-NEXT: s_lshl_b32 s27, s34, 16 -; SI-NEXT: s_or_b32 s26, s26, s27 -; SI-NEXT: s_and_b32 s27, s57, 0xffff -; SI-NEXT: s_lshl_b32 s28, s55, 16 -; SI-NEXT: s_or_b32 s27, s27, s28 +; SI-NEXT: s_lshl_b32 s28, s31, 16 +; SI-NEXT: s_or_b32 s5, s5, s28 ; SI-NEXT: v_readlane_b32 s30, v24, 34 ; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v1, s17 @@ -37193,22 +37258,22 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v6, s22 ; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v8, s14 -; SI-NEXT: v_mov_b32_e32 v9, s15 -; SI-NEXT: v_mov_b32_e32 v10, s12 -; SI-NEXT: v_mov_b32_e32 v11, s13 -; SI-NEXT: v_mov_b32_e32 v12, s10 -; SI-NEXT: v_mov_b32_e32 v13, s11 -; SI-NEXT: v_mov_b32_e32 v14, s8 -; SI-NEXT: v_mov_b32_e32 v15, s9 -; SI-NEXT: v_mov_b32_e32 v16, s6 -; SI-NEXT: v_mov_b32_e32 v17, s7 -; SI-NEXT: v_mov_b32_e32 v18, s4 -; SI-NEXT: v_mov_b32_e32 v19, s5 -; SI-NEXT: v_mov_b32_e32 v20, s24 -; SI-NEXT: v_mov_b32_e32 v21, s25 -; SI-NEXT: v_mov_b32_e32 v22, s26 -; SI-NEXT: v_mov_b32_e32 v23, s27 +; SI-NEXT: v_mov_b32_e32 v8, s24 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v10, s26 +; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v12, s14 +; SI-NEXT: v_mov_b32_e32 v13, s15 +; SI-NEXT: v_mov_b32_e32 v14, s12 +; SI-NEXT: v_mov_b32_e32 v15, s13 +; SI-NEXT: v_mov_b32_e32 v16, s10 +; SI-NEXT: v_mov_b32_e32 v17, s11 +; SI-NEXT: v_mov_b32_e32 v18, s8 +; SI-NEXT: v_mov_b32_e32 v19, s9 +; SI-NEXT: v_mov_b32_e32 v20, s6 +; SI-NEXT: v_mov_b32_e32 v21, s7 +; SI-NEXT: v_mov_b32_e32 v22, s4 +; SI-NEXT: v_mov_b32_e32 v23, s5 ; SI-NEXT: v_readlane_b32 s31, v24, 35 ; SI-NEXT: v_readlane_b32 s99, v24, 33 ; SI-NEXT: v_readlane_b32 s98, v24, 32 @@ -37246,34 +37311,36 @@ define inreg <48 x half> @bitcast_v48i16_to_v48f16_scalar(<48 x i16> inreg %a, i ; SI-NEXT: v_readlane_b32 s34, v24, 0 ; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB57_4: +; SI-NEXT: s_mov_b64 s[82:83], -1 +; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr50 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr96 ; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr98 ; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr64 ; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr66 ; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: ; implicit-def: $sgpr70 ; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: ; implicit-def: $sgpr10 -; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr86 ; SI-NEXT: ; implicit-def: $sgpr8 ; SI-NEXT: ; implicit-def: $sgpr90 ; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr92 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr30 -; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr34 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr84 ; SI-NEXT: s_branch .LBB57_2 ; ; VI-LABEL: bitcast_v48i16_to_v48f16_scalar: @@ -38860,301 +38927,284 @@ define inreg <48 x i16> @bitcast_v48f16_to_v48i16_scalar(<48 x half> inreg %a, i ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_readfirstlane_b32 s11, v9 -; SI-NEXT: v_readfirstlane_b32 s6, v8 -; SI-NEXT: v_readfirstlane_b32 s12, v7 -; SI-NEXT: v_readfirstlane_b32 s7, v6 -; SI-NEXT: v_readfirstlane_b32 s46, v5 -; SI-NEXT: v_readfirstlane_b32 s8, v4 -; SI-NEXT: v_readfirstlane_b32 s45, v3 -; SI-NEXT: v_readfirstlane_b32 s9, v2 -; SI-NEXT: v_readfirstlane_b32 s44, v1 -; SI-NEXT: v_readfirstlane_b32 s10, v0 -; SI-NEXT: s_lshr_b32 s43, s29, 16 -; SI-NEXT: s_lshr_b32 s62, s28, 16 -; SI-NEXT: s_lshr_b32 s42, s27, 16 -; SI-NEXT: s_lshr_b32 s73, s26, 16 -; SI-NEXT: s_lshr_b32 s41, s25, 16 +; SI-NEXT: v_readfirstlane_b32 s62, v9 +; SI-NEXT: v_readfirstlane_b32 s8, v8 +; SI-NEXT: v_readfirstlane_b32 s60, v7 +; SI-NEXT: v_readfirstlane_b32 s9, v6 +; SI-NEXT: v_readfirstlane_b32 s58, v5 +; SI-NEXT: v_readfirstlane_b32 s11, v4 +; SI-NEXT: v_readfirstlane_b32 s57, v3 +; SI-NEXT: v_readfirstlane_b32 s14, v2 +; SI-NEXT: v_readfirstlane_b32 s56, v1 +; SI-NEXT: v_readfirstlane_b32 s40, v0 +; SI-NEXT: s_lshr_b32 s47, s29, 16 +; SI-NEXT: s_lshr_b32 s13, s28, 16 +; SI-NEXT: s_lshr_b32 s46, s27, 16 +; SI-NEXT: s_lshr_b32 s74, s26, 16 +; SI-NEXT: s_lshr_b32 s45, s25, 16 ; SI-NEXT: s_lshr_b32 s75, s24, 16 -; SI-NEXT: s_lshr_b32 s40, s23, 16 +; SI-NEXT: s_lshr_b32 s44, s23, 16 ; SI-NEXT: s_lshr_b32 s76, s22, 16 -; SI-NEXT: s_lshr_b32 s15, s21, 16 +; SI-NEXT: s_lshr_b32 s43, s21, 16 ; SI-NEXT: s_lshr_b32 s77, s20, 16 -; SI-NEXT: s_lshr_b32 s14, s19, 16 +; SI-NEXT: s_lshr_b32 s42, s19, 16 ; SI-NEXT: s_lshr_b32 s78, s18, 16 -; SI-NEXT: s_lshr_b32 s13, s17, 16 +; SI-NEXT: s_lshr_b32 s41, s17, 16 ; SI-NEXT: s_lshr_b32 s79, s16, 16 -; SI-NEXT: s_lshr_b32 s72, s11, 16 -; SI-NEXT: s_lshr_b32 s47, s6, 16 -; SI-NEXT: s_lshr_b32 s58, s12, 16 -; SI-NEXT: s_lshr_b32 s57, s7, 16 -; SI-NEXT: s_lshr_b32 s60, s46, 16 -; SI-NEXT: s_lshr_b32 s61, s8, 16 -; SI-NEXT: s_lshr_b32 s59, s45, 16 -; SI-NEXT: s_lshr_b32 s63, s9, 16 -; SI-NEXT: s_lshr_b32 s56, s44, 16 -; SI-NEXT: s_lshr_b32 s74, s10, 16 +; SI-NEXT: s_lshr_b32 s73, s62, 16 +; SI-NEXT: s_lshr_b32 s6, s8, 16 +; SI-NEXT: s_lshr_b32 s72, s60, 16 +; SI-NEXT: s_lshr_b32 s7, s9, 16 +; SI-NEXT: s_lshr_b32 s63, s58, 16 +; SI-NEXT: s_lshr_b32 s10, s11, 16 +; SI-NEXT: s_lshr_b32 s61, s57, 16 +; SI-NEXT: s_lshr_b32 s12, s14, 16 +; SI-NEXT: s_lshr_b32 s59, s56, 16 +; SI-NEXT: s_lshr_b32 s15, s40, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v10 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB59_3 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: s_cbranch_execnz .LBB59_4 ; SI-NEXT: .LBB59_2: ; %cmp.true -; SI-NEXT: v_cvt_f32_f16_e32 v1, s78 -; SI-NEXT: v_cvt_f32_f16_e32 v2, s77 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s76 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s62 +; SI-NEXT: v_cvt_f32_f16_e32 v0, s79 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s16 +; SI-NEXT: v_cvt_f32_f16_e32 v2, s78 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 +; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v23, s19 -; SI-NEXT: v_cvt_f32_f16_e32 v24, s17 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s75 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s73 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v33, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s77 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v32, v3, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s20 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s76 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s74 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v7 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s63 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 +; SI-NEXT: v_or_b32_e32 v29, v3, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s75 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s24 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s22 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s61 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s57 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s47 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s72 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v22, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s60 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s46 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s73 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s59 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v7 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_or_b32_e32 v19, v1, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s45 +; SI-NEXT: v_or_b32_e32 v31, v5, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s62 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s56 -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_or_b32_e32 v30, v1, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s74 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s72 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v7 +; SI-NEXT: v_or_b32_e32 v23, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s60 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s63 +; SI-NEXT: v_cvt_f16_f32_e32 v47, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s44 -; SI-NEXT: v_or_b32_e32 v17, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s43 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: v_cvt_f16_f32_e32 v58, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s58 +; SI-NEXT: v_or_b32_e32 v21, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s61 +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v7, s29 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s57 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v28, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v59, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v9 -; SI-NEXT: v_or_b32_e32 v15, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s42 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v28 -; SI-NEXT: v_or_b32_e32 v13, v3, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s27 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v58 +; SI-NEXT: v_or_b32_e32 v19, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s59 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v59 +; SI-NEXT: v_or_b32_e32 v17, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s56 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s41 -; SI-NEXT: v_cvt_f16_f32_e32 v29, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s47 +; SI-NEXT: v_cvt_f16_f32_e32 v27, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v30, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v29 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s25 -; SI-NEXT: v_or_b32_e32 v11, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s40 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v28, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v27 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s29 +; SI-NEXT: v_or_b32_e32 v15, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s46 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s27 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v31, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v57, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v30 -; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_or_b32_e32 v9, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s15 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v31 -; SI-NEXT: v_or_b32_e32 v7, v3, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s21 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v28 +; SI-NEXT: v_or_b32_e32 v13, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s45 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v57 +; SI-NEXT: v_or_b32_e32 v11, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s25 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s44 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s14 -; SI-NEXT: v_cvt_f16_f32_e32 v56, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v60, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v58, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v56 -; SI-NEXT: v_or_b32_e32 v5, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s13 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: v_cvt_f32_f16_e32 v21, s58 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v61, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v60 +; SI-NEXT: v_or_b32_e32 v9, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s43 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v61 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v59, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v58 -; SI-NEXT: v_or_b32_e32 v3, v23, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v23, s12 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 -; SI-NEXT: v_or_b32_e32 v1, v24, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v24, s11 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v57, v21 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v57 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s79 -; SI-NEXT: v_or_b32_e32 v21, v21, v24 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v25 -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v25, s16 -; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: v_cvt_f32_f16_e32 v24, s18 -; SI-NEXT: v_cvt_f32_f16_e32 v26, s20 -; SI-NEXT: v_cvt_f32_f16_e32 v27, s22 -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 -; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 -; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 -; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_or_b32_e32 v47, v25, v0 -; SI-NEXT: v_or_b32_e32 v45, v24, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v24, s24 -; SI-NEXT: v_cvt_f32_f16_e32 v25, s26 -; SI-NEXT: v_or_b32_e32 v42, v26, v4 -; SI-NEXT: v_or_b32_e32 v63, v27, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v26, s28 -; SI-NEXT: v_cvt_f32_f16_e32 v27, s10 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 -; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 -; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 -; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: v_or_b32_e32 v46, v24, v8 -; SI-NEXT: v_or_b32_e32 v43, v25, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v24, s9 +; SI-NEXT: v_cvt_f16_f32_e32 v62, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v7, v5, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s42 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s17 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_or_b32_e32 v5, v3, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v63, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s41 +; SI-NEXT: v_cvt_f32_f16_e32 v10, s26 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v40, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v63 +; SI-NEXT: v_or_b32_e32 v3, v3, v14 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v40 +; SI-NEXT: v_or_b32_e32 v1, v1, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v14, s13 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v18, s28 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v10 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v12, s15 +; SI-NEXT: v_or_b32_e32 v41, v16, v10 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v18 +; SI-NEXT: v_cvt_f32_f16_e32 v18, s40 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v12 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v12 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v14 +; SI-NEXT: v_or_b32_e32 v44, v16, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v16, s12 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v20 +; SI-NEXT: v_or_b32_e32 v42, v18, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v18, s14 +; SI-NEXT: v_cvt_f32_f16_e32 v20, s10 +; SI-NEXT: v_cvt_f32_f16_e32 v22, s11 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 +; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 +; SI-NEXT: v_cvt_f32_f16_e32 v24, s7 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_or_b32_e32 v43, v18, v16 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v20 +; SI-NEXT: v_cvt_f32_f16_e32 v20, s9 +; SI-NEXT: v_or_b32_e32 v56, v22, v18 +; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v24 +; SI-NEXT: v_cvt_f32_f16_e32 v24, s6 ; SI-NEXT: v_cvt_f32_f16_e32 v25, s8 -; SI-NEXT: v_or_b32_e32 v41, v26, v12 -; SI-NEXT: v_or_b32_e32 v62, v27, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v26, s7 -; SI-NEXT: v_cvt_f32_f16_e32 v27, s6 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 -; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 -; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 -; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; SI-NEXT: v_or_b32_e32 v44, v24, v16 -; SI-NEXT: v_or_b32_e32 v40, v25, v18 -; SI-NEXT: v_lshr_b64 v[24:25], v[22:23], 16 -; SI-NEXT: v_or_b32_e32 v61, v26, v20 -; SI-NEXT: v_or_b32_e32 v60, v27, v22 +; SI-NEXT: v_cvt_f16_f32_e32 v22, v22 +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v26, v20 +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v24 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v20 +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v25 +; SI-NEXT: v_cvt_f16_f32_e32 v46, v20 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v22 +; SI-NEXT: v_or_b32_e32 v45, v26, v20 +; SI-NEXT: v_lshr_b64 v[48:49], v[6:7], 16 +; SI-NEXT: v_mov_b32_e32 v6, v29 +; SI-NEXT: v_lshr_b64 v[38:39], v[8:9], 16 +; SI-NEXT: v_mov_b32_e32 v8, v30 ; SI-NEXT: v_lshr_b64 v[36:37], v[10:11], 16 ; SI-NEXT: v_mov_b32_e32 v10, v31 -; SI-NEXT: v_lshr_b64 v[34:35], v[12:13], 16 -; SI-NEXT: v_mov_b32_e32 v12, v30 -; SI-NEXT: v_lshr_b64 v[32:33], v[14:15], 16 -; SI-NEXT: v_mov_b32_e32 v14, v29 ; SI-NEXT: v_lshr_b64 v[30:31], v[16:17], 16 ; SI-NEXT: v_mov_b32_e32 v16, v28 ; SI-NEXT: v_lshr_b64 v[28:29], v[18:19], 16 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v18, v27 ; SI-NEXT: v_lshr_b64 v[26:27], v[20:21], 16 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v27, v47 +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v24 ; SI-NEXT: v_lshr_b64 v[54:55], v[0:1], 16 +; SI-NEXT: v_mov_b32_e32 v0, v33 ; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[50:51], v[4:5], 16 -; SI-NEXT: v_lshr_b64 v[48:49], v[6:7], 16 -; SI-NEXT: v_lshr_b64 v[38:39], v[8:9], 16 +; SI-NEXT: v_mov_b32_e32 v4, v32 +; SI-NEXT: v_lshr_b64 v[34:35], v[12:13], 16 +; SI-NEXT: v_lshr_b64 v[32:33], v[14:15], 16 +; SI-NEXT: v_lshr_b64 v[24:25], v[22:23], 16 +; SI-NEXT: v_or_b32_e32 v22, v46, v22 ; SI-NEXT: s_branch .LBB59_5 ; SI-NEXT: .LBB59_3: ; SI-NEXT: s_branch .LBB59_2 ; SI-NEXT: .LBB59_4: -; SI-NEXT: v_mov_b32_e32 v25, s72 -; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_mov_b32_e32 v57, s58 -; SI-NEXT: v_mov_b32_e32 v22, s60 -; SI-NEXT: v_mov_b32_e32 v20, s59 -; SI-NEXT: v_mov_b32_e32 v18, s56 -; SI-NEXT: v_mov_b32_e32 v16, s43 -; SI-NEXT: v_mov_b32_e32 v14, s42 -; SI-NEXT: v_mov_b32_e32 v12, s41 -; SI-NEXT: v_mov_b32_e32 v10, s40 -; SI-NEXT: v_mov_b32_e32 v56, s15 +; SI-NEXT: v_mov_b32_e32 v47, s73 +; SI-NEXT: v_mov_b32_e32 v27, s72 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_mov_b32_e32 v58, s14 +; SI-NEXT: v_mov_b32_e32 v58, s63 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v59, s13 +; SI-NEXT: v_mov_b32_e32 v59, s61 +; SI-NEXT: v_mov_b32_e32 v18, s59 +; SI-NEXT: v_mov_b32_e32 v16, s47 +; SI-NEXT: v_mov_b32_e32 v57, s46 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_mov_b32_e32 v60, s6 +; SI-NEXT: v_mov_b32_e32 v60, s45 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v61, s7 -; SI-NEXT: v_mov_b32_e32 v40, s8 -; SI-NEXT: v_mov_b32_e32 v44, s9 +; SI-NEXT: v_mov_b32_e32 v61, s44 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v62, s10 -; SI-NEXT: v_mov_b32_e32 v41, s28 -; SI-NEXT: v_mov_b32_e32 v43, s26 -; SI-NEXT: v_mov_b32_e32 v46, s24 +; SI-NEXT: v_mov_b32_e32 v62, s43 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v63, s22 -; SI-NEXT: v_mov_b32_e32 v42, s20 -; SI-NEXT: v_mov_b32_e32 v45, s18 -; SI-NEXT: v_mov_b32_e32 v47, s16 +; SI-NEXT: v_mov_b32_e32 v63, s42 +; SI-NEXT: v_mov_b32_e32 v40, s41 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 @@ -39162,94 +39212,102 @@ define inreg <48 x i16> @bitcast_v48f16_to_v48i16_scalar(<48 x half> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v13, s29 -; SI-NEXT: v_mov_b32_e32 v15, s44 -; SI-NEXT: v_mov_b32_e32 v17, s45 -; SI-NEXT: v_mov_b32_e32 v19, s46 -; SI-NEXT: v_mov_b32_e32 v21, s12 -; SI-NEXT: v_mov_b32_e32 v23, s11 +; SI-NEXT: v_mov_b32_e32 v15, s56 +; SI-NEXT: v_mov_b32_e32 v17, s57 +; SI-NEXT: v_mov_b32_e32 v19, s58 +; SI-NEXT: v_mov_b32_e32 v21, s60 +; SI-NEXT: v_mov_b32_e32 v23, s62 +; SI-NEXT: v_mov_b32_e32 v22, s8 +; SI-NEXT: v_mov_b32_e32 v45, s9 +; SI-NEXT: v_mov_b32_e32 v56, s11 +; SI-NEXT: v_mov_b32_e32 v43, s14 +; SI-NEXT: v_mov_b32_e32 v42, s40 +; SI-NEXT: v_mov_b32_e32 v44, s28 +; SI-NEXT: v_mov_b32_e32 v41, s26 +; SI-NEXT: v_mov_b32_e32 v10, s24 +; SI-NEXT: v_mov_b32_e32 v8, s22 +; SI-NEXT: v_mov_b32_e32 v6, s20 +; SI-NEXT: v_mov_b32_e32 v4, s18 +; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v54, s79 ; SI-NEXT: v_mov_b32_e32 v52, s78 ; SI-NEXT: v_mov_b32_e32 v50, s77 ; SI-NEXT: v_mov_b32_e32 v48, s76 ; SI-NEXT: v_mov_b32_e32 v38, s75 -; SI-NEXT: v_mov_b32_e32 v36, s73 -; SI-NEXT: v_mov_b32_e32 v34, s62 -; SI-NEXT: v_mov_b32_e32 v32, s74 -; SI-NEXT: v_mov_b32_e32 v30, s63 -; SI-NEXT: v_mov_b32_e32 v28, s61 -; SI-NEXT: v_mov_b32_e32 v26, s57 -; SI-NEXT: v_mov_b32_e32 v24, s47 +; SI-NEXT: v_mov_b32_e32 v36, s74 +; SI-NEXT: v_mov_b32_e32 v34, s13 +; SI-NEXT: v_mov_b32_e32 v32, s15 +; SI-NEXT: v_mov_b32_e32 v30, s12 +; SI-NEXT: v_mov_b32_e32 v28, s10 +; SI-NEXT: v_mov_b32_e32 v26, s7 +; SI-NEXT: v_mov_b32_e32 v24, s6 ; SI-NEXT: .LBB59_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v54 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v47 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v54 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v40 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v52 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v45 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v52 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v63 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v50 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v42 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v50 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v56 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v62 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v63 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v48 ; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v10 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v61 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v46 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v38 ; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v60 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v43 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v36 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v57 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v44 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v34 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v62 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v42 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v32 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v18 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v44 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v43 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v30 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v59 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v40 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v56 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v58 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v61 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v26 -; SI-NEXT: v_or_b32_e32 v20, v20, v22 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v57 -; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: v_and_b32_e32 v22, 0xffff, v60 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v45 +; SI-NEXT: v_or_b32_e32 v22, v22, v24 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v47 ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -39266,11 +39324,12 @@ define inreg <48 x i16> @bitcast_v48f16_to_v48i16_scalar(<48 x half> inreg %a, i ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; SI-NEXT: v_or_b32_e32 v22, v22, v24 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v26 +; SI-NEXT: v_or_b32_e32 v20, v20, v25 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 +; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v27 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v25 +; SI-NEXT: v_or_b32_e32 v21, v21, v25 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll index bae36084f83f9..6ce3a44036251 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll @@ -4108,6 +4108,12 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[60:61], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s92, s5, 16 ; SI-NEXT: s_lshr_b32 s93, s7, 16 ; SI-NEXT: s_lshr_b32 s94, s9, 16 @@ -4121,39 +4127,33 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b32 s38, s21, 16 ; SI-NEXT: s_lshr_b32 s39, s19, 16 ; SI-NEXT: s_lshr_b32 s48, s17, 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16 ; SI-NEXT: .LBB13_3: ; %end -; SI-NEXT: s_lshl_b32 s41, s88, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s41, s88, 16 ; SI-NEXT: s_or_b32 s16, s16, s41 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s41, s48, 16 ; SI-NEXT: s_or_b32 s17, s17, s41 -; SI-NEXT: s_lshl_b32 s41, s78, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s41, s78, 16 ; SI-NEXT: s_or_b32 s18, s18, s41 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s41, s39, 16 ; SI-NEXT: s_or_b32 s19, s19, s41 -; SI-NEXT: s_lshl_b32 s41, s76, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s41, s76, 16 ; SI-NEXT: s_or_b32 s20, s20, s41 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s41, s38, 16 ; SI-NEXT: s_or_b32 s21, s21, s41 -; SI-NEXT: s_lshl_b32 s41, s74, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s41, s74, 16 ; SI-NEXT: s_or_b32 s22, s22, s41 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s41, s37, 16 ; SI-NEXT: s_or_b32 s23, s23, s41 -; SI-NEXT: s_lshl_b32 s41, s72, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s41, s72, 16 ; SI-NEXT: s_or_b32 s24, s24, s41 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s41, s36, 16 @@ -4269,10 +4269,10 @@ define inreg <52 x i16> @bitcast_v26i32_to_v52i16_scalar(<26 x i32> inreg %a, i3 ; SI-NEXT: ; implicit-def: $sgpr95 ; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr93 -; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr93 ; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: s_branch .LBB13_2 ; ; VI-LABEL: bitcast_v26i32_to_v52i16_scalar: @@ -6459,17 +6459,17 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s86, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s85, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s84, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s86, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s83, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s82, 16 @@ -6752,10 +6752,6 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3 ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 ; GFX9-NEXT: v_readfirstlane_b32 s60, v10 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 @@ -6765,12 +6761,9 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s76, v5 ; GFX9-NEXT: v_readfirstlane_b32 s78, v4 ; GFX9-NEXT: v_readfirstlane_b32 s88, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v2 +; GFX9-NEXT: v_readfirstlane_b32 s92, v1 +; GFX9-NEXT: v_readfirstlane_b32 s94, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -6781,6 +6774,10 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 ; GFX9-NEXT: s_lshr_b32 s12, s21, 16 ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s62, s61, 16 ; GFX9-NEXT: s_lshr_b32 s63, s60, 16 ; GFX9-NEXT: s_lshr_b32 s72, s59, 16 @@ -6790,12 +6787,15 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v12 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v12 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 ; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 @@ -6806,9 +6806,9 @@ define inreg <26 x i32> @bitcast_v52i16_to_v26i32_scalar(<52 x i16> inreg %a, i3 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s54, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s76, s77 @@ -7890,6 +7890,12 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i ; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[58:59], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[60:61], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s92, s5, 16 ; SI-NEXT: s_lshr_b32 s93, s7, 16 ; SI-NEXT: s_lshr_b32 s94, s9, 16 @@ -7903,39 +7909,33 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i ; SI-NEXT: s_lshr_b32 s38, s21, 16 ; SI-NEXT: s_lshr_b32 s39, s19, 16 ; SI-NEXT: s_lshr_b32 s48, s17, 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16 ; SI-NEXT: .LBB17_3: ; %end -; SI-NEXT: s_lshl_b32 s41, s88, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s41, s88, 16 ; SI-NEXT: s_or_b32 s16, s16, s41 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s41, s48, 16 ; SI-NEXT: s_or_b32 s17, s17, s41 -; SI-NEXT: s_lshl_b32 s41, s78, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s41, s78, 16 ; SI-NEXT: s_or_b32 s18, s18, s41 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s41, s39, 16 ; SI-NEXT: s_or_b32 s19, s19, s41 -; SI-NEXT: s_lshl_b32 s41, s76, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s41, s76, 16 ; SI-NEXT: s_or_b32 s20, s20, s41 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s41, s38, 16 ; SI-NEXT: s_or_b32 s21, s21, s41 -; SI-NEXT: s_lshl_b32 s41, s74, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s41, s74, 16 ; SI-NEXT: s_or_b32 s22, s22, s41 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s41, s37, 16 ; SI-NEXT: s_or_b32 s23, s23, s41 -; SI-NEXT: s_lshl_b32 s41, s72, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s41, s72, 16 ; SI-NEXT: s_or_b32 s24, s24, s41 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s41, s36, 16 @@ -8051,10 +8051,10 @@ define inreg <52 x half> @bitcast_v26i32_to_v52f16_scalar(<26 x i32> inreg %a, i ; SI-NEXT: ; implicit-def: $sgpr95 ; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr93 -; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr93 ; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: s_branch .LBB17_2 ; ; VI-LABEL: bitcast_v26i32_to_v52f16_scalar: @@ -8748,8 +8748,8 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v40 ; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v41 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v46 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47 @@ -8774,10 +8774,10 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v37 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v56 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v47 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -8788,10 +8788,10 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v63 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33 @@ -8827,8 +8827,8 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr32 @@ -8960,158 +8960,158 @@ define <26 x i32> @bitcast_v52f16_to_v26i32(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v37 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v57 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v47 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v36 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v47 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v46 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v45 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v35 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v34 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v44 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v44 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v63 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v33 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v35 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v42 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v41 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v63 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v42 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v41 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v40 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v55 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v34 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v40 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v55 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v54 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v53 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v33 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v54 ; SI-NEXT: v_cvt_f32_f16_e32 v15, v52 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v16, v51 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v62 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v49 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v48 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_cvt_f32_f16_e32 v21, v38 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v13, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v20, v20 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v13, v15, v13 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -10448,17 +10448,17 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s86, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s85, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s84, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s86, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s83, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s82, 16 @@ -10527,13 +10527,13 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i ; VI-NEXT: .LBB19_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v25, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s87 -; VI-NEXT: v_mov_b32_e32 v2, s86 ; VI-NEXT: v_add_f16_sdwa v0, v0, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v25 -; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v25 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s86 +; VI-NEXT: v_add_f16_sdwa v1, v1, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v25 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s85 ; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v25 @@ -10724,10 +10724,6 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 ; GFX9-NEXT: v_readfirstlane_b32 s60, v10 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 @@ -10737,12 +10733,9 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i ; GFX9-NEXT: v_readfirstlane_b32 s76, v5 ; GFX9-NEXT: v_readfirstlane_b32 s78, v4 ; GFX9-NEXT: v_readfirstlane_b32 s88, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v2 +; GFX9-NEXT: v_readfirstlane_b32 s92, v1 +; GFX9-NEXT: v_readfirstlane_b32 s94, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -10753,6 +10746,10 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 ; GFX9-NEXT: s_lshr_b32 s12, s21, 16 ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s62, s61, 16 ; GFX9-NEXT: s_lshr_b32 s63, s60, 16 ; GFX9-NEXT: s_lshr_b32 s72, s59, 16 @@ -10762,12 +10759,15 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v12 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v12 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 ; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 @@ -10778,9 +10778,9 @@ define inreg <26 x i32> @bitcast_v52f16_to_v26i32_scalar(<52 x half> inreg %a, i ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s54, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s76, s77 @@ -14220,23 +14220,22 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_writelane_b32 v45, s34, 0 -; SI-NEXT: v_writelane_b32 v45, s35, 1 -; SI-NEXT: v_writelane_b32 v45, s36, 2 -; SI-NEXT: v_writelane_b32 v45, s37, 3 -; SI-NEXT: v_writelane_b32 v45, s38, 4 -; SI-NEXT: v_writelane_b32 v45, s39, 5 -; SI-NEXT: v_writelane_b32 v45, s48, 6 -; SI-NEXT: v_writelane_b32 v45, s30, 7 -; SI-NEXT: v_writelane_b32 v45, s31, 8 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_writelane_b32 v44, s34, 0 +; SI-NEXT: v_writelane_b32 v44, s35, 1 +; SI-NEXT: v_writelane_b32 v44, s36, 2 +; SI-NEXT: v_writelane_b32 v44, s37, 3 +; SI-NEXT: v_writelane_b32 v44, s38, 4 +; SI-NEXT: v_writelane_b32 v44, s39, 5 +; SI-NEXT: v_writelane_b32 v44, s48, 6 +; SI-NEXT: v_writelane_b32 v44, s30, 7 +; SI-NEXT: v_writelane_b32 v44, s31, 8 ; SI-NEXT: v_readfirstlane_b32 s14, v12 ; SI-NEXT: v_readfirstlane_b32 s5, v11 ; SI-NEXT: v_readfirstlane_b32 s4, v10 @@ -14320,24 +14319,23 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[37:38], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v11 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v9 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v7 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v5 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v3 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1 ; SI-NEXT: s_branch .LBB29_5 ; SI-NEXT: .LBB29_3: ; SI-NEXT: ; implicit-def: $sgpr88 @@ -14395,19 +14393,19 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v24, s4 ; SI-NEXT: v_mov_b32_e32 v25, s5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v44, s92 -; SI-NEXT: v_mov_b32_e32 v43, s93 -; SI-NEXT: v_mov_b32_e32 v42, s94 -; SI-NEXT: v_mov_b32_e32 v41, s95 -; SI-NEXT: v_mov_b32_e32 v40, s30 -; SI-NEXT: v_mov_b32_e32 v55, s31 -; SI-NEXT: v_mov_b32_e32 v54, s34 -; SI-NEXT: v_mov_b32_e32 v53, s35 -; SI-NEXT: v_mov_b32_e32 v52, s36 -; SI-NEXT: v_mov_b32_e32 v51, s37 -; SI-NEXT: v_mov_b32_e32 v50, s38 -; SI-NEXT: v_mov_b32_e32 v49, s39 -; SI-NEXT: v_mov_b32_e32 v48, s48 +; SI-NEXT: v_mov_b32_e32 v43, s92 +; SI-NEXT: v_mov_b32_e32 v42, s93 +; SI-NEXT: v_mov_b32_e32 v41, s94 +; SI-NEXT: v_mov_b32_e32 v40, s95 +; SI-NEXT: v_mov_b32_e32 v55, s30 +; SI-NEXT: v_mov_b32_e32 v54, s31 +; SI-NEXT: v_mov_b32_e32 v53, s34 +; SI-NEXT: v_mov_b32_e32 v52, s35 +; SI-NEXT: v_mov_b32_e32 v51, s36 +; SI-NEXT: v_mov_b32_e32 v50, s37 +; SI-NEXT: v_mov_b32_e32 v49, s38 +; SI-NEXT: v_mov_b32_e32 v48, s39 +; SI-NEXT: v_mov_b32_e32 v39, s48 ; SI-NEXT: v_mov_b32_e32 v26, s40 ; SI-NEXT: v_mov_b32_e32 v27, s42 ; SI-NEXT: v_mov_b32_e32 v28, s44 @@ -14422,31 +14420,28 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v37, s78 ; SI-NEXT: v_mov_b32_e32 v38, s88 ; SI-NEXT: .LBB29_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_or_b32_e32 v0, v0, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v43 ; SI-NEXT: v_or_b32_e32 v2, v2, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v42 ; SI-NEXT: v_or_b32_e32 v4, v4, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v41 ; SI-NEXT: v_or_b32_e32 v6, v6, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41 -; SI-NEXT: v_or_b32_e32 v8, v8, v34 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v40 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40 +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 @@ -14467,32 +14462,34 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a, ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_or_b32_e32 v8, v8, v34 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v55 ; SI-NEXT: v_or_b32_e32 v10, v10, v33 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v55 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v54 ; SI-NEXT: v_or_b32_e32 v12, v12, v32 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v54 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v53 ; SI-NEXT: v_or_b32_e32 v14, v14, v31 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v52 ; SI-NEXT: v_or_b32_e32 v16, v16, v30 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v51 ; SI-NEXT: v_or_b32_e32 v18, v18, v29 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v50 ; SI-NEXT: v_or_b32_e32 v20, v20, v28 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v49 ; SI-NEXT: v_or_b32_e32 v22, v22, v27 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v48 ; SI-NEXT: v_or_b32_e32 v24, v24, v26 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v48 -; SI-NEXT: v_readlane_b32 s30, v45, 7 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v39 +; SI-NEXT: v_readlane_b32 s30, v44, 7 ; SI-NEXT: v_or_b32_e32 v1, v1, v38 ; SI-NEXT: v_or_b32_e32 v3, v3, v37 ; SI-NEXT: v_or_b32_e32 v5, v5, v36 @@ -14506,16 +14503,16 @@ define inreg <52 x i16> @bitcast_v26f32_to_v52i16_scalar(<26 x float> inreg %a, ; SI-NEXT: v_or_b32_e32 v21, v21, v28 ; SI-NEXT: v_or_b32_e32 v23, v23, v27 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: v_readlane_b32 s31, v45, 8 -; SI-NEXT: v_readlane_b32 s48, v45, 6 -; SI-NEXT: v_readlane_b32 s39, v45, 5 -; SI-NEXT: v_readlane_b32 s38, v45, 4 -; SI-NEXT: v_readlane_b32 s37, v45, 3 -; SI-NEXT: v_readlane_b32 s36, v45, 2 -; SI-NEXT: v_readlane_b32 s35, v45, 1 -; SI-NEXT: v_readlane_b32 s34, v45, 0 +; SI-NEXT: v_readlane_b32 s31, v44, 8 +; SI-NEXT: v_readlane_b32 s48, v44, 6 +; SI-NEXT: v_readlane_b32 s39, v44, 5 +; SI-NEXT: v_readlane_b32 s38, v44, 4 +; SI-NEXT: v_readlane_b32 s37, v44, 3 +; SI-NEXT: v_readlane_b32 s36, v44, 2 +; SI-NEXT: v_readlane_b32 s35, v44, 1 +; SI-NEXT: v_readlane_b32 s34, v44, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -17001,17 +16998,17 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s86, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s85, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s84, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s86, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s83, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s82, 16 @@ -17294,10 +17291,6 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a, ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 ; GFX9-NEXT: v_readfirstlane_b32 s60, v10 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 @@ -17307,12 +17300,9 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s76, v5 ; GFX9-NEXT: v_readfirstlane_b32 s78, v4 ; GFX9-NEXT: v_readfirstlane_b32 s88, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v2 +; GFX9-NEXT: v_readfirstlane_b32 s92, v1 +; GFX9-NEXT: v_readfirstlane_b32 s94, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -17323,6 +17313,10 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 ; GFX9-NEXT: s_lshr_b32 s12, s21, 16 ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s62, s61, 16 ; GFX9-NEXT: s_lshr_b32 s63, s60, 16 ; GFX9-NEXT: s_lshr_b32 s72, s59, 16 @@ -17332,12 +17326,15 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v12 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v12 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 ; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 @@ -17348,9 +17345,9 @@ define inreg <26 x float> @bitcast_v52i16_to_v26f32_scalar(<52 x i16> inreg %a, ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s54, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s76, s77 @@ -18317,23 +18314,22 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_writelane_b32 v45, s34, 0 -; SI-NEXT: v_writelane_b32 v45, s35, 1 -; SI-NEXT: v_writelane_b32 v45, s36, 2 -; SI-NEXT: v_writelane_b32 v45, s37, 3 -; SI-NEXT: v_writelane_b32 v45, s38, 4 -; SI-NEXT: v_writelane_b32 v45, s39, 5 -; SI-NEXT: v_writelane_b32 v45, s48, 6 -; SI-NEXT: v_writelane_b32 v45, s30, 7 -; SI-NEXT: v_writelane_b32 v45, s31, 8 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_writelane_b32 v44, s34, 0 +; SI-NEXT: v_writelane_b32 v44, s35, 1 +; SI-NEXT: v_writelane_b32 v44, s36, 2 +; SI-NEXT: v_writelane_b32 v44, s37, 3 +; SI-NEXT: v_writelane_b32 v44, s38, 4 +; SI-NEXT: v_writelane_b32 v44, s39, 5 +; SI-NEXT: v_writelane_b32 v44, s48, 6 +; SI-NEXT: v_writelane_b32 v44, s30, 7 +; SI-NEXT: v_writelane_b32 v44, s31, 8 ; SI-NEXT: v_readfirstlane_b32 s14, v12 ; SI-NEXT: v_readfirstlane_b32 s5, v11 ; SI-NEXT: v_readfirstlane_b32 s4, v10 @@ -18417,24 +18413,23 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a, ; SI-NEXT: v_add_f32_e64 v0, s16, 1.0 ; SI-NEXT: v_lshr_b64 v[37:38], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[38:39], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v15 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v11 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v9 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v7 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v5 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v3 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1 ; SI-NEXT: s_branch .LBB33_5 ; SI-NEXT: .LBB33_3: ; SI-NEXT: ; implicit-def: $sgpr88 @@ -18492,19 +18487,19 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v24, s4 ; SI-NEXT: v_mov_b32_e32 v25, s5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v44, s92 -; SI-NEXT: v_mov_b32_e32 v43, s93 -; SI-NEXT: v_mov_b32_e32 v42, s94 -; SI-NEXT: v_mov_b32_e32 v41, s95 -; SI-NEXT: v_mov_b32_e32 v40, s30 -; SI-NEXT: v_mov_b32_e32 v55, s31 -; SI-NEXT: v_mov_b32_e32 v54, s34 -; SI-NEXT: v_mov_b32_e32 v53, s35 -; SI-NEXT: v_mov_b32_e32 v52, s36 -; SI-NEXT: v_mov_b32_e32 v51, s37 -; SI-NEXT: v_mov_b32_e32 v50, s38 -; SI-NEXT: v_mov_b32_e32 v49, s39 -; SI-NEXT: v_mov_b32_e32 v48, s48 +; SI-NEXT: v_mov_b32_e32 v43, s92 +; SI-NEXT: v_mov_b32_e32 v42, s93 +; SI-NEXT: v_mov_b32_e32 v41, s94 +; SI-NEXT: v_mov_b32_e32 v40, s95 +; SI-NEXT: v_mov_b32_e32 v55, s30 +; SI-NEXT: v_mov_b32_e32 v54, s31 +; SI-NEXT: v_mov_b32_e32 v53, s34 +; SI-NEXT: v_mov_b32_e32 v52, s35 +; SI-NEXT: v_mov_b32_e32 v51, s36 +; SI-NEXT: v_mov_b32_e32 v50, s37 +; SI-NEXT: v_mov_b32_e32 v49, s38 +; SI-NEXT: v_mov_b32_e32 v48, s39 +; SI-NEXT: v_mov_b32_e32 v39, s48 ; SI-NEXT: v_mov_b32_e32 v26, s40 ; SI-NEXT: v_mov_b32_e32 v27, s42 ; SI-NEXT: v_mov_b32_e32 v28, s44 @@ -18519,31 +18514,28 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v37, s78 ; SI-NEXT: v_mov_b32_e32 v38, s88 ; SI-NEXT: .LBB33_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_or_b32_e32 v0, v0, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v43 ; SI-NEXT: v_or_b32_e32 v2, v2, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v42 ; SI-NEXT: v_or_b32_e32 v4, v4, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v41 ; SI-NEXT: v_or_b32_e32 v6, v6, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41 -; SI-NEXT: v_or_b32_e32 v8, v8, v34 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v40 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v40 +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 @@ -18564,32 +18556,34 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a, ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_or_b32_e32 v8, v8, v34 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v55 ; SI-NEXT: v_or_b32_e32 v10, v10, v33 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v55 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v54 ; SI-NEXT: v_or_b32_e32 v12, v12, v32 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v54 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v53 ; SI-NEXT: v_or_b32_e32 v14, v14, v31 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v52 ; SI-NEXT: v_or_b32_e32 v16, v16, v30 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v51 ; SI-NEXT: v_or_b32_e32 v18, v18, v29 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v50 ; SI-NEXT: v_or_b32_e32 v20, v20, v28 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v49 ; SI-NEXT: v_or_b32_e32 v22, v22, v27 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v48 ; SI-NEXT: v_or_b32_e32 v24, v24, v26 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v48 -; SI-NEXT: v_readlane_b32 s30, v45, 7 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v39 +; SI-NEXT: v_readlane_b32 s30, v44, 7 ; SI-NEXT: v_or_b32_e32 v1, v1, v38 ; SI-NEXT: v_or_b32_e32 v3, v3, v37 ; SI-NEXT: v_or_b32_e32 v5, v5, v36 @@ -18603,16 +18597,16 @@ define inreg <52 x half> @bitcast_v26f32_to_v52f16_scalar(<26 x float> inreg %a, ; SI-NEXT: v_or_b32_e32 v21, v21, v28 ; SI-NEXT: v_or_b32_e32 v23, v23, v27 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: v_readlane_b32 s31, v45, 8 -; SI-NEXT: v_readlane_b32 s48, v45, 6 -; SI-NEXT: v_readlane_b32 s39, v45, 5 -; SI-NEXT: v_readlane_b32 s38, v45, 4 -; SI-NEXT: v_readlane_b32 s37, v45, 3 -; SI-NEXT: v_readlane_b32 s36, v45, 2 -; SI-NEXT: v_readlane_b32 s35, v45, 1 -; SI-NEXT: v_readlane_b32 s34, v45, 0 +; SI-NEXT: v_readlane_b32 s31, v44, 8 +; SI-NEXT: v_readlane_b32 s48, v44, 6 +; SI-NEXT: v_readlane_b32 s39, v44, 5 +; SI-NEXT: v_readlane_b32 s38, v44, 4 +; SI-NEXT: v_readlane_b32 s37, v44, 3 +; SI-NEXT: v_readlane_b32 s36, v44, 2 +; SI-NEXT: v_readlane_b32 s35, v44, 1 +; SI-NEXT: v_readlane_b32 s34, v44, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -19605,8 +19599,8 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v40 ; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v41 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v46 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47 @@ -19631,10 +19625,10 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v37 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v56 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v47 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -19645,10 +19639,10 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v63 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33 @@ -19684,8 +19678,8 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr32 @@ -19817,158 +19811,158 @@ define <26 x float> @bitcast_v52f16_to_v26f32(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v37 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v57 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v47 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v36 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v47 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v46 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v45 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v35 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v34 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v44 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v44 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v63 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v33 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v35 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v42 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v41 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v63 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v42 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v41 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v40 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v55 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v34 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v40 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v55 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v54 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v53 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v33 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v54 ; SI-NEXT: v_cvt_f32_f16_e32 v15, v52 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v16, v51 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v62 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v49 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v48 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_cvt_f32_f16_e32 v21, v38 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v13, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v20, v20 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v13, v15, v13 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -21305,17 +21299,17 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s86, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s85, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s84, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s86, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s83, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s82, 16 @@ -21384,13 +21378,13 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a, ; VI-NEXT: .LBB35_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v25, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s87 -; VI-NEXT: v_mov_b32_e32 v2, s86 ; VI-NEXT: v_add_f16_sdwa v0, v0, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v25 -; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v25 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s86 +; VI-NEXT: v_add_f16_sdwa v1, v1, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v25 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s85 ; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v25 @@ -21581,10 +21575,6 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a, ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 ; GFX9-NEXT: v_readfirstlane_b32 s60, v10 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 @@ -21594,12 +21584,9 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s76, v5 ; GFX9-NEXT: v_readfirstlane_b32 s78, v4 ; GFX9-NEXT: v_readfirstlane_b32 s88, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v2 +; GFX9-NEXT: v_readfirstlane_b32 s92, v1 +; GFX9-NEXT: v_readfirstlane_b32 s94, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -21610,6 +21597,10 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a, ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 ; GFX9-NEXT: s_lshr_b32 s12, s21, 16 ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s62, s61, 16 ; GFX9-NEXT: s_lshr_b32 s63, s60, 16 ; GFX9-NEXT: s_lshr_b32 s72, s59, 16 @@ -21619,12 +21610,15 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a, ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v12 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v12 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 ; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 @@ -21635,9 +21629,9 @@ define inreg <26 x float> @bitcast_v52f16_to_v26f32_scalar(<52 x half> inreg %a, ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s54, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s76, s77 @@ -23847,32 +23841,32 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16 ; SI-NEXT: .LBB41_3: ; %end -; SI-NEXT: s_lshl_b32 s41, s88, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s41, s88, 16 ; SI-NEXT: s_or_b32 s16, s16, s41 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s41, s48, 16 ; SI-NEXT: s_or_b32 s17, s17, s41 -; SI-NEXT: s_lshl_b32 s41, s78, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s41, s78, 16 ; SI-NEXT: s_or_b32 s18, s18, s41 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s41, s39, 16 ; SI-NEXT: s_or_b32 s19, s19, s41 -; SI-NEXT: s_lshl_b32 s41, s76, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s41, s76, 16 ; SI-NEXT: s_or_b32 s20, s20, s41 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s41, s38, 16 ; SI-NEXT: s_or_b32 s21, s21, s41 -; SI-NEXT: s_lshl_b32 s41, s74, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s41, s74, 16 ; SI-NEXT: s_or_b32 s22, s22, s41 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s41, s37, 16 ; SI-NEXT: s_or_b32 s23, s23, s41 -; SI-NEXT: s_lshl_b32 s41, s72, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s41, s72, 16 ; SI-NEXT: s_or_b32 s24, s24, s41 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s41, s36, 16 @@ -23988,10 +23982,10 @@ define inreg <52 x i16> @bitcast_v13i64_to_v52i16_scalar(<13 x i64> inreg %a, i3 ; SI-NEXT: ; implicit-def: $sgpr95 ; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr93 -; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr93 ; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: s_branch .LBB41_2 ; ; VI-LABEL: bitcast_v13i64_to_v52i16_scalar: @@ -26178,17 +26172,17 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s86, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s85, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s84, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s86, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s83, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s82, 16 @@ -26471,10 +26465,6 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3 ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 ; GFX9-NEXT: v_readfirstlane_b32 s60, v10 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 @@ -26484,12 +26474,9 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s76, v5 ; GFX9-NEXT: v_readfirstlane_b32 s78, v4 ; GFX9-NEXT: v_readfirstlane_b32 s88, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v2 +; GFX9-NEXT: v_readfirstlane_b32 s92, v1 +; GFX9-NEXT: v_readfirstlane_b32 s94, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -26500,6 +26487,10 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 ; GFX9-NEXT: s_lshr_b32 s12, s21, 16 ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s62, s61, 16 ; GFX9-NEXT: s_lshr_b32 s63, s60, 16 ; GFX9-NEXT: s_lshr_b32 s72, s59, 16 @@ -26509,12 +26500,15 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v12 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v12 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 ; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 @@ -26525,9 +26519,9 @@ define inreg <13 x i64> @bitcast_v52i16_to_v13i64_scalar(<52 x i16> inreg %a, i3 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s54, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s76, s77 @@ -27643,32 +27637,32 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i ; SI-NEXT: s_lshr_b64 s[78:79], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16 ; SI-NEXT: .LBB45_3: ; %end -; SI-NEXT: s_lshl_b32 s41, s88, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s41, s88, 16 ; SI-NEXT: s_or_b32 s16, s16, s41 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s41, s48, 16 ; SI-NEXT: s_or_b32 s17, s17, s41 -; SI-NEXT: s_lshl_b32 s41, s78, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s41, s78, 16 ; SI-NEXT: s_or_b32 s18, s18, s41 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s41, s39, 16 ; SI-NEXT: s_or_b32 s19, s19, s41 -; SI-NEXT: s_lshl_b32 s41, s76, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s41, s76, 16 ; SI-NEXT: s_or_b32 s20, s20, s41 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s41, s38, 16 ; SI-NEXT: s_or_b32 s21, s21, s41 -; SI-NEXT: s_lshl_b32 s41, s74, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s41, s74, 16 ; SI-NEXT: s_or_b32 s22, s22, s41 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s41, s37, 16 ; SI-NEXT: s_or_b32 s23, s23, s41 -; SI-NEXT: s_lshl_b32 s41, s72, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s41, s72, 16 ; SI-NEXT: s_or_b32 s24, s24, s41 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s41, s36, 16 @@ -27784,10 +27778,10 @@ define inreg <52 x half> @bitcast_v13i64_to_v52f16_scalar(<13 x i64> inreg %a, i ; SI-NEXT: ; implicit-def: $sgpr95 ; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr93 -; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr93 ; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: s_branch .LBB45_2 ; ; VI-LABEL: bitcast_v13i64_to_v52f16_scalar: @@ -28481,8 +28475,8 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v40 ; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v41 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v46 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47 @@ -28507,10 +28501,10 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v37 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v56 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v47 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -28521,10 +28515,10 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v63 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33 @@ -28560,8 +28554,8 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr32 @@ -28693,158 +28687,158 @@ define <13 x i64> @bitcast_v52f16_to_v13i64(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v37 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v57 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v47 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v36 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v47 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v46 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v45 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v35 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v34 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v44 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v44 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v63 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v33 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v35 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v42 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v41 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v63 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v42 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v41 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v40 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v55 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v34 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v40 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v55 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v54 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v53 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v33 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v54 ; SI-NEXT: v_cvt_f32_f16_e32 v15, v52 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v16, v51 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v62 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v49 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v48 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_cvt_f32_f16_e32 v21, v38 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v13, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v20, v20 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v13, v15, v13 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -30181,17 +30175,17 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s86, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s85, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s84, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s86, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s83, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s82, 16 @@ -30260,13 +30254,13 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i ; VI-NEXT: .LBB47_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v25, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s87 -; VI-NEXT: v_mov_b32_e32 v2, s86 ; VI-NEXT: v_add_f16_sdwa v0, v0, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v25 -; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v25 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s86 +; VI-NEXT: v_add_f16_sdwa v1, v1, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v25 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s85 ; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v25 @@ -30457,10 +30451,6 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 ; GFX9-NEXT: v_readfirstlane_b32 s60, v10 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 @@ -30470,12 +30460,9 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i ; GFX9-NEXT: v_readfirstlane_b32 s76, v5 ; GFX9-NEXT: v_readfirstlane_b32 s78, v4 ; GFX9-NEXT: v_readfirstlane_b32 s88, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v2 +; GFX9-NEXT: v_readfirstlane_b32 s92, v1 +; GFX9-NEXT: v_readfirstlane_b32 s94, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -30486,6 +30473,10 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 ; GFX9-NEXT: s_lshr_b32 s12, s21, 16 ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s62, s61, 16 ; GFX9-NEXT: s_lshr_b32 s63, s60, 16 ; GFX9-NEXT: s_lshr_b32 s72, s59, 16 @@ -30495,12 +30486,15 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v12 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v12 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 ; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 @@ -30511,9 +30505,9 @@ define inreg <13 x i64> @bitcast_v52f16_to_v13i64_scalar(<52 x half> inreg %a, i ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s54, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s76, s77 @@ -31442,28 +31436,27 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_writelane_b32 v45, s34, 0 -; SI-NEXT: v_writelane_b32 v45, s35, 1 -; SI-NEXT: v_writelane_b32 v45, s36, 2 -; SI-NEXT: v_writelane_b32 v45, s37, 3 -; SI-NEXT: v_writelane_b32 v45, s38, 4 -; SI-NEXT: v_writelane_b32 v45, s39, 5 -; SI-NEXT: v_writelane_b32 v45, s48, 6 -; SI-NEXT: v_writelane_b32 v45, s30, 7 -; SI-NEXT: v_writelane_b32 v45, s31, 8 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_writelane_b32 v44, s34, 0 +; SI-NEXT: v_writelane_b32 v44, s35, 1 +; SI-NEXT: v_writelane_b32 v44, s36, 2 +; SI-NEXT: v_writelane_b32 v44, s37, 3 +; SI-NEXT: v_writelane_b32 v44, s38, 4 +; SI-NEXT: v_writelane_b32 v44, s39, 5 +; SI-NEXT: v_writelane_b32 v44, s48, 6 +; SI-NEXT: v_writelane_b32 v44, s30, 7 +; SI-NEXT: v_writelane_b32 v44, s31, 8 ; SI-NEXT: v_readfirstlane_b32 s4, v12 -; SI-NEXT: v_readfirstlane_b32 s13, v11 -; SI-NEXT: v_readfirstlane_b32 s12, v10 -; SI-NEXT: v_readfirstlane_b32 s15, v9 -; SI-NEXT: v_readfirstlane_b32 s14, v8 +; SI-NEXT: v_readfirstlane_b32 s15, v11 +; SI-NEXT: v_readfirstlane_b32 s14, v10 +; SI-NEXT: v_readfirstlane_b32 s13, v9 +; SI-NEXT: v_readfirstlane_b32 s12, v8 ; SI-NEXT: v_readfirstlane_b32 s11, v7 ; SI-NEXT: v_readfirstlane_b32 s10, v6 ; SI-NEXT: v_readfirstlane_b32 s9, v5 @@ -31475,8 +31468,8 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI-NEXT: v_readfirstlane_b32 s4, v0 ; SI-NEXT: s_cbranch_scc0 .LBB49_3 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_lshr_b32 s48, s13, 16 -; SI-NEXT: s_lshr_b32 s39, s15, 16 +; SI-NEXT: s_lshr_b32 s48, s15, 16 +; SI-NEXT: s_lshr_b32 s39, s13, 16 ; SI-NEXT: s_lshr_b32 s38, s11, 16 ; SI-NEXT: s_lshr_b32 s37, s9, 16 ; SI-NEXT: s_lshr_b32 s36, s7, 16 @@ -31488,8 +31481,8 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI-NEXT: s_lshr_b32 s94, s21, 16 ; SI-NEXT: s_lshr_b32 s93, s19, 16 ; SI-NEXT: s_lshr_b32 s92, s17, 16 -; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[42:43], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 @@ -31503,8 +31496,8 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16 ; SI-NEXT: s_cbranch_execnz .LBB49_4 ; SI-NEXT: .LBB49_2: ; %cmp.true -; SI-NEXT: v_add_f64 v[24:25], s[12:13], 1.0 -; SI-NEXT: v_add_f64 v[22:23], s[14:15], 1.0 +; SI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 +; SI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 ; SI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 ; SI-NEXT: v_lshr_b64 v[26:27], v[24:25], 16 ; SI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 @@ -31537,16 +31530,15 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v13 ; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v11 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v9 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v9 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 ; SI-NEXT: s_branch .LBB49_5 ; SI-NEXT: .LBB49_3: ; SI-NEXT: ; implicit-def: $sgpr88 @@ -31577,32 +31569,32 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI-NEXT: ; implicit-def: $sgpr48 ; SI-NEXT: s_branch .LBB49_2 ; SI-NEXT: .LBB49_4: +; SI-NEXT: v_mov_b32_e32 v25, s15 +; SI-NEXT: v_mov_b32_e32 v23, s13 +; SI-NEXT: v_mov_b32_e32 v21, s11 +; SI-NEXT: v_mov_b32_e32 v19, s9 +; SI-NEXT: v_mov_b32_e32 v17, s7 +; SI-NEXT: v_mov_b32_e32 v15, s5 +; SI-NEXT: v_mov_b32_e32 v13, s29 +; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v6, s22 -; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v10, s26 -; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v12, s28 -; SI-NEXT: v_mov_b32_e32 v23, s15 -; SI-NEXT: v_mov_b32_e32 v21, s11 -; SI-NEXT: v_mov_b32_e32 v19, s9 -; SI-NEXT: v_mov_b32_e32 v17, s7 -; SI-NEXT: v_mov_b32_e32 v15, s5 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: v_mov_b32_e32 v16, s6 ; SI-NEXT: v_mov_b32_e32 v18, s8 ; SI-NEXT: v_mov_b32_e32 v20, s10 -; SI-NEXT: v_mov_b32_e32 v22, s14 -; SI-NEXT: v_mov_b32_e32 v25, s13 -; SI-NEXT: v_mov_b32_e32 v24, s12 +; SI-NEXT: v_mov_b32_e32 v22, s12 +; SI-NEXT: v_mov_b32_e32 v24, s14 ; SI-NEXT: v_mov_b32_e32 v48, s48 ; SI-NEXT: v_mov_b32_e32 v49, s39 ; SI-NEXT: v_mov_b32_e32 v50, s38 @@ -31611,16 +31603,15 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v53, s35 ; SI-NEXT: v_mov_b32_e32 v54, s34 ; SI-NEXT: v_mov_b32_e32 v55, s31 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v40, s30 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_mov_b32_e32 v41, s95 +; SI-NEXT: v_mov_b32_e32 v40, s30 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v42, s94 +; SI-NEXT: v_mov_b32_e32 v41, s95 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v43, s93 +; SI-NEXT: v_mov_b32_e32 v42, s94 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v44, s92 +; SI-NEXT: v_mov_b32_e32 v43, s93 +; SI-NEXT: v_mov_b32_e32 v39, s92 ; SI-NEXT: v_mov_b32_e32 v38, s88 ; SI-NEXT: v_mov_b32_e32 v37, s78 ; SI-NEXT: v_mov_b32_e32 v36, s76 @@ -31635,18 +31626,14 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v27, s42 ; SI-NEXT: v_mov_b32_e32 v26, s40 ; SI-NEXT: .LBB49_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 -; SI-NEXT: v_or_b32_e32 v0, v0, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44 ; SI-NEXT: v_or_b32_e32 v2, v2, v37 ; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43 ; SI-NEXT: v_or_b32_e32 v4, v4, v36 @@ -31655,11 +31642,12 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41 ; SI-NEXT: v_or_b32_e32 v8, v8, v34 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v40 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 @@ -31676,7 +31664,9 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v38 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v39 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 @@ -31705,7 +31695,7 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI-NEXT: v_or_b32_e32 v24, v24, v26 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v48 -; SI-NEXT: v_readlane_b32 s30, v45, 7 +; SI-NEXT: v_readlane_b32 s30, v44, 7 ; SI-NEXT: v_or_b32_e32 v1, v1, v38 ; SI-NEXT: v_or_b32_e32 v3, v3, v37 ; SI-NEXT: v_or_b32_e32 v5, v5, v36 @@ -31719,16 +31709,16 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; SI-NEXT: v_or_b32_e32 v21, v21, v28 ; SI-NEXT: v_or_b32_e32 v23, v23, v27 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: v_readlane_b32 s31, v45, 8 -; SI-NEXT: v_readlane_b32 s48, v45, 6 -; SI-NEXT: v_readlane_b32 s39, v45, 5 -; SI-NEXT: v_readlane_b32 s38, v45, 4 -; SI-NEXT: v_readlane_b32 s37, v45, 3 -; SI-NEXT: v_readlane_b32 s36, v45, 2 -; SI-NEXT: v_readlane_b32 s35, v45, 1 -; SI-NEXT: v_readlane_b32 s34, v45, 0 +; SI-NEXT: v_readlane_b32 s31, v44, 8 +; SI-NEXT: v_readlane_b32 s48, v44, 6 +; SI-NEXT: v_readlane_b32 s39, v44, 5 +; SI-NEXT: v_readlane_b32 s38, v44, 4 +; SI-NEXT: v_readlane_b32 s37, v44, 3 +; SI-NEXT: v_readlane_b32 s36, v44, 2 +; SI-NEXT: v_readlane_b32 s35, v44, 1 +; SI-NEXT: v_readlane_b32 s34, v44, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -31741,14 +31731,14 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: v_readfirstlane_b32 s4, v12 -; VI-NEXT: v_readfirstlane_b32 s9, v11 -; VI-NEXT: v_readfirstlane_b32 s8, v10 -; VI-NEXT: v_readfirstlane_b32 s11, v9 -; VI-NEXT: v_readfirstlane_b32 s10, v8 -; VI-NEXT: v_readfirstlane_b32 s13, v7 -; VI-NEXT: v_readfirstlane_b32 s12, v6 -; VI-NEXT: v_readfirstlane_b32 s15, v5 -; VI-NEXT: v_readfirstlane_b32 s14, v4 +; VI-NEXT: v_readfirstlane_b32 s15, v11 +; VI-NEXT: v_readfirstlane_b32 s14, v10 +; VI-NEXT: v_readfirstlane_b32 s13, v9 +; VI-NEXT: v_readfirstlane_b32 s12, v8 +; VI-NEXT: v_readfirstlane_b32 s11, v7 +; VI-NEXT: v_readfirstlane_b32 s10, v6 +; VI-NEXT: v_readfirstlane_b32 s9, v5 +; VI-NEXT: v_readfirstlane_b32 s8, v4 ; VI-NEXT: v_readfirstlane_b32 s7, v3 ; VI-NEXT: v_readfirstlane_b32 s6, v2 ; VI-NEXT: v_readfirstlane_b32 s5, v1 @@ -31756,14 +31746,14 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; VI-NEXT: v_readfirstlane_b32 s4, v0 ; VI-NEXT: s_cbranch_scc0 .LBB49_3 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: s_lshr_b32 s42, s9, 16 -; VI-NEXT: s_lshr_b32 s63, s8, 16 -; VI-NEXT: s_lshr_b32 s43, s11, 16 -; VI-NEXT: s_lshr_b32 s72, s10, 16 -; VI-NEXT: s_lshr_b32 s44, s13, 16 -; VI-NEXT: s_lshr_b32 s73, s12, 16 -; VI-NEXT: s_lshr_b32 s45, s15, 16 -; VI-NEXT: s_lshr_b32 s74, s14, 16 +; VI-NEXT: s_lshr_b32 s42, s15, 16 +; VI-NEXT: s_lshr_b32 s63, s14, 16 +; VI-NEXT: s_lshr_b32 s43, s13, 16 +; VI-NEXT: s_lshr_b32 s72, s12, 16 +; VI-NEXT: s_lshr_b32 s44, s11, 16 +; VI-NEXT: s_lshr_b32 s73, s10, 16 +; VI-NEXT: s_lshr_b32 s45, s9, 16 +; VI-NEXT: s_lshr_b32 s74, s8, 16 ; VI-NEXT: s_lshr_b32 s46, s7, 16 ; VI-NEXT: s_lshr_b32 s75, s6, 16 ; VI-NEXT: s_lshr_b32 s47, s5, 16 @@ -31784,10 +31774,10 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; VI-NEXT: s_lshr_b32 s91, s16, 16 ; VI-NEXT: s_cbranch_execnz .LBB49_4 ; VI-NEXT: .LBB49_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[24:25], s[8:9], 1.0 -; VI-NEXT: v_add_f64 v[22:23], s[10:11], 1.0 -; VI-NEXT: v_add_f64 v[20:21], s[12:13], 1.0 -; VI-NEXT: v_add_f64 v[18:19], s[14:15], 1.0 +; VI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 +; VI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 +; VI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; VI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; VI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -31862,7 +31852,10 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; VI-NEXT: v_mov_b32_e32 v12, s28 ; VI-NEXT: v_mov_b32_e32 v14, s4 ; VI-NEXT: v_mov_b32_e32 v16, s6 -; VI-NEXT: v_mov_b32_e32 v18, s14 +; VI-NEXT: v_mov_b32_e32 v18, s8 +; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_mov_b32_e32 v22, s12 +; VI-NEXT: v_mov_b32_e32 v24, s14 ; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v3, s19 ; VI-NEXT: v_mov_b32_e32 v5, s21 @@ -31872,13 +31865,10 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; VI-NEXT: v_mov_b32_e32 v13, s29 ; VI-NEXT: v_mov_b32_e32 v15, s5 ; VI-NEXT: v_mov_b32_e32 v17, s7 -; VI-NEXT: v_mov_b32_e32 v19, s15 -; VI-NEXT: v_mov_b32_e32 v20, s12 -; VI-NEXT: v_mov_b32_e32 v21, s13 -; VI-NEXT: v_mov_b32_e32 v22, s10 -; VI-NEXT: v_mov_b32_e32 v23, s11 -; VI-NEXT: v_mov_b32_e32 v24, s8 -; VI-NEXT: v_mov_b32_e32 v25, s9 +; VI-NEXT: v_mov_b32_e32 v19, s9 +; VI-NEXT: v_mov_b32_e32 v21, s11 +; VI-NEXT: v_mov_b32_e32 v23, s13 +; VI-NEXT: v_mov_b32_e32 v25, s15 ; VI-NEXT: v_mov_b32_e32 v40, s91 ; VI-NEXT: v_mov_b32_e32 v54, s90 ; VI-NEXT: v_mov_b32_e32 v52, s89 @@ -31973,14 +31963,14 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: v_readfirstlane_b32 s4, v12 -; GFX9-NEXT: v_readfirstlane_b32 s9, v11 -; GFX9-NEXT: v_readfirstlane_b32 s8, v10 -; GFX9-NEXT: v_readfirstlane_b32 s11, v9 -; GFX9-NEXT: v_readfirstlane_b32 s10, v8 -; GFX9-NEXT: v_readfirstlane_b32 s13, v7 -; GFX9-NEXT: v_readfirstlane_b32 s12, v6 -; GFX9-NEXT: v_readfirstlane_b32 s15, v5 -; GFX9-NEXT: v_readfirstlane_b32 s14, v4 +; GFX9-NEXT: v_readfirstlane_b32 s15, v11 +; GFX9-NEXT: v_readfirstlane_b32 s14, v10 +; GFX9-NEXT: v_readfirstlane_b32 s13, v9 +; GFX9-NEXT: v_readfirstlane_b32 s12, v8 +; GFX9-NEXT: v_readfirstlane_b32 s11, v7 +; GFX9-NEXT: v_readfirstlane_b32 s10, v6 +; GFX9-NEXT: v_readfirstlane_b32 s9, v5 +; GFX9-NEXT: v_readfirstlane_b32 s8, v4 ; GFX9-NEXT: v_readfirstlane_b32 s7, v3 ; GFX9-NEXT: v_readfirstlane_b32 s6, v2 ; GFX9-NEXT: v_readfirstlane_b32 s5, v1 @@ -31988,14 +31978,14 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s4, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB49_3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: s_lshr_b32 s42, s9, 16 -; GFX9-NEXT: s_lshr_b32 s63, s8, 16 -; GFX9-NEXT: s_lshr_b32 s43, s11, 16 -; GFX9-NEXT: s_lshr_b32 s72, s10, 16 -; GFX9-NEXT: s_lshr_b32 s44, s13, 16 -; GFX9-NEXT: s_lshr_b32 s73, s12, 16 -; GFX9-NEXT: s_lshr_b32 s45, s15, 16 -; GFX9-NEXT: s_lshr_b32 s74, s14, 16 +; GFX9-NEXT: s_lshr_b32 s42, s15, 16 +; GFX9-NEXT: s_lshr_b32 s63, s14, 16 +; GFX9-NEXT: s_lshr_b32 s43, s13, 16 +; GFX9-NEXT: s_lshr_b32 s72, s12, 16 +; GFX9-NEXT: s_lshr_b32 s44, s11, 16 +; GFX9-NEXT: s_lshr_b32 s73, s10, 16 +; GFX9-NEXT: s_lshr_b32 s45, s9, 16 +; GFX9-NEXT: s_lshr_b32 s74, s8, 16 ; GFX9-NEXT: s_lshr_b32 s46, s7, 16 ; GFX9-NEXT: s_lshr_b32 s75, s6, 16 ; GFX9-NEXT: s_lshr_b32 s47, s5, 16 @@ -32016,10 +32006,10 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; GFX9-NEXT: s_lshr_b32 s91, s16, 16 ; GFX9-NEXT: s_cbranch_execnz .LBB49_4 ; GFX9-NEXT: .LBB49_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[24:25], s[8:9], 1.0 -; GFX9-NEXT: v_add_f64 v[22:23], s[10:11], 1.0 -; GFX9-NEXT: v_add_f64 v[20:21], s[12:13], 1.0 -; GFX9-NEXT: v_add_f64 v[18:19], s[14:15], 1.0 +; GFX9-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 +; GFX9-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 +; GFX9-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; GFX9-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; GFX9-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -32094,7 +32084,10 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v12, s28 ; GFX9-NEXT: v_mov_b32_e32 v14, s4 ; GFX9-NEXT: v_mov_b32_e32 v16, s6 -; GFX9-NEXT: v_mov_b32_e32 v18, s14 +; GFX9-NEXT: v_mov_b32_e32 v18, s8 +; GFX9-NEXT: v_mov_b32_e32 v20, s10 +; GFX9-NEXT: v_mov_b32_e32 v22, s12 +; GFX9-NEXT: v_mov_b32_e32 v24, s14 ; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: v_mov_b32_e32 v5, s21 @@ -32104,13 +32097,10 @@ define inreg <52 x i16> @bitcast_v13f64_to_v52i16_scalar(<13 x double> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v13, s29 ; GFX9-NEXT: v_mov_b32_e32 v15, s5 ; GFX9-NEXT: v_mov_b32_e32 v17, s7 -; GFX9-NEXT: v_mov_b32_e32 v19, s15 -; GFX9-NEXT: v_mov_b32_e32 v20, s12 -; GFX9-NEXT: v_mov_b32_e32 v21, s13 -; GFX9-NEXT: v_mov_b32_e32 v22, s10 -; GFX9-NEXT: v_mov_b32_e32 v23, s11 -; GFX9-NEXT: v_mov_b32_e32 v24, s8 -; GFX9-NEXT: v_mov_b32_e32 v25, s9 +; GFX9-NEXT: v_mov_b32_e32 v19, s9 +; GFX9-NEXT: v_mov_b32_e32 v21, s11 +; GFX9-NEXT: v_mov_b32_e32 v23, s13 +; GFX9-NEXT: v_mov_b32_e32 v25, s15 ; GFX9-NEXT: v_mov_b32_e32 v40, s91 ; GFX9-NEXT: v_mov_b32_e32 v54, s90 ; GFX9-NEXT: v_mov_b32_e32 v52, s89 @@ -34162,17 +34152,17 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s86, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s85, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s84, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s86, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s83, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s82, 16 @@ -34455,10 +34445,6 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a, ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 ; GFX9-NEXT: v_readfirstlane_b32 s60, v10 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 @@ -34468,12 +34454,9 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s76, v5 ; GFX9-NEXT: v_readfirstlane_b32 s78, v4 ; GFX9-NEXT: v_readfirstlane_b32 s88, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v2 +; GFX9-NEXT: v_readfirstlane_b32 s92, v1 +; GFX9-NEXT: v_readfirstlane_b32 s94, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -34484,6 +34467,10 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 ; GFX9-NEXT: s_lshr_b32 s12, s21, 16 ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s62, s61, 16 ; GFX9-NEXT: s_lshr_b32 s63, s60, 16 ; GFX9-NEXT: s_lshr_b32 s72, s59, 16 @@ -34493,12 +34480,15 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v12 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v12 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 ; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 @@ -34509,9 +34499,9 @@ define inreg <13 x double> @bitcast_v52i16_to_v13f64_scalar(<52 x i16> inreg %a, ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s54, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s76, s77 @@ -35439,28 +35429,27 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_writelane_b32 v45, s34, 0 -; SI-NEXT: v_writelane_b32 v45, s35, 1 -; SI-NEXT: v_writelane_b32 v45, s36, 2 -; SI-NEXT: v_writelane_b32 v45, s37, 3 -; SI-NEXT: v_writelane_b32 v45, s38, 4 -; SI-NEXT: v_writelane_b32 v45, s39, 5 -; SI-NEXT: v_writelane_b32 v45, s48, 6 -; SI-NEXT: v_writelane_b32 v45, s30, 7 -; SI-NEXT: v_writelane_b32 v45, s31, 8 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_writelane_b32 v44, s34, 0 +; SI-NEXT: v_writelane_b32 v44, s35, 1 +; SI-NEXT: v_writelane_b32 v44, s36, 2 +; SI-NEXT: v_writelane_b32 v44, s37, 3 +; SI-NEXT: v_writelane_b32 v44, s38, 4 +; SI-NEXT: v_writelane_b32 v44, s39, 5 +; SI-NEXT: v_writelane_b32 v44, s48, 6 +; SI-NEXT: v_writelane_b32 v44, s30, 7 +; SI-NEXT: v_writelane_b32 v44, s31, 8 ; SI-NEXT: v_readfirstlane_b32 s4, v12 -; SI-NEXT: v_readfirstlane_b32 s13, v11 -; SI-NEXT: v_readfirstlane_b32 s12, v10 -; SI-NEXT: v_readfirstlane_b32 s15, v9 -; SI-NEXT: v_readfirstlane_b32 s14, v8 +; SI-NEXT: v_readfirstlane_b32 s15, v11 +; SI-NEXT: v_readfirstlane_b32 s14, v10 +; SI-NEXT: v_readfirstlane_b32 s13, v9 +; SI-NEXT: v_readfirstlane_b32 s12, v8 ; SI-NEXT: v_readfirstlane_b32 s11, v7 ; SI-NEXT: v_readfirstlane_b32 s10, v6 ; SI-NEXT: v_readfirstlane_b32 s9, v5 @@ -35472,8 +35461,8 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI-NEXT: v_readfirstlane_b32 s4, v0 ; SI-NEXT: s_cbranch_scc0 .LBB53_3 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_lshr_b32 s48, s13, 16 -; SI-NEXT: s_lshr_b32 s39, s15, 16 +; SI-NEXT: s_lshr_b32 s48, s15, 16 +; SI-NEXT: s_lshr_b32 s39, s13, 16 ; SI-NEXT: s_lshr_b32 s38, s11, 16 ; SI-NEXT: s_lshr_b32 s37, s9, 16 ; SI-NEXT: s_lshr_b32 s36, s7, 16 @@ -35485,8 +35474,8 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI-NEXT: s_lshr_b32 s94, s21, 16 ; SI-NEXT: s_lshr_b32 s93, s19, 16 ; SI-NEXT: s_lshr_b32 s92, s17, 16 -; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[42:43], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[12:13], 16 ; SI-NEXT: s_lshr_b64 s[44:45], s[10:11], 16 ; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 ; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 16 @@ -35500,8 +35489,8 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI-NEXT: s_lshr_b64 s[88:89], s[16:17], 16 ; SI-NEXT: s_cbranch_execnz .LBB53_4 ; SI-NEXT: .LBB53_2: ; %cmp.true -; SI-NEXT: v_add_f64 v[24:25], s[12:13], 1.0 -; SI-NEXT: v_add_f64 v[22:23], s[14:15], 1.0 +; SI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 +; SI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 ; SI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 ; SI-NEXT: v_lshr_b64 v[26:27], v[24:25], 16 ; SI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 @@ -35534,16 +35523,15 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v13 ; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v11 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v9 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v9 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v7 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 ; SI-NEXT: s_branch .LBB53_5 ; SI-NEXT: .LBB53_3: ; SI-NEXT: ; implicit-def: $sgpr88 @@ -35574,32 +35562,32 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI-NEXT: ; implicit-def: $sgpr48 ; SI-NEXT: s_branch .LBB53_2 ; SI-NEXT: .LBB53_4: +; SI-NEXT: v_mov_b32_e32 v25, s15 +; SI-NEXT: v_mov_b32_e32 v23, s13 +; SI-NEXT: v_mov_b32_e32 v21, s11 +; SI-NEXT: v_mov_b32_e32 v19, s9 +; SI-NEXT: v_mov_b32_e32 v17, s7 +; SI-NEXT: v_mov_b32_e32 v15, s5 +; SI-NEXT: v_mov_b32_e32 v13, s29 +; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v6, s22 -; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v10, s26 -; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v12, s28 -; SI-NEXT: v_mov_b32_e32 v23, s15 -; SI-NEXT: v_mov_b32_e32 v21, s11 -; SI-NEXT: v_mov_b32_e32 v19, s9 -; SI-NEXT: v_mov_b32_e32 v17, s7 -; SI-NEXT: v_mov_b32_e32 v15, s5 ; SI-NEXT: v_mov_b32_e32 v14, s4 ; SI-NEXT: v_mov_b32_e32 v16, s6 ; SI-NEXT: v_mov_b32_e32 v18, s8 ; SI-NEXT: v_mov_b32_e32 v20, s10 -; SI-NEXT: v_mov_b32_e32 v22, s14 -; SI-NEXT: v_mov_b32_e32 v25, s13 -; SI-NEXT: v_mov_b32_e32 v24, s12 +; SI-NEXT: v_mov_b32_e32 v22, s12 +; SI-NEXT: v_mov_b32_e32 v24, s14 ; SI-NEXT: v_mov_b32_e32 v48, s48 ; SI-NEXT: v_mov_b32_e32 v49, s39 ; SI-NEXT: v_mov_b32_e32 v50, s38 @@ -35608,16 +35596,15 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v53, s35 ; SI-NEXT: v_mov_b32_e32 v54, s34 ; SI-NEXT: v_mov_b32_e32 v55, s31 -; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v40, s30 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_mov_b32_e32 v41, s95 +; SI-NEXT: v_mov_b32_e32 v40, s30 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v42, s94 +; SI-NEXT: v_mov_b32_e32 v41, s95 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v43, s93 +; SI-NEXT: v_mov_b32_e32 v42, s94 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v44, s92 +; SI-NEXT: v_mov_b32_e32 v43, s93 +; SI-NEXT: v_mov_b32_e32 v39, s92 ; SI-NEXT: v_mov_b32_e32 v38, s88 ; SI-NEXT: v_mov_b32_e32 v37, s78 ; SI-NEXT: v_mov_b32_e32 v36, s76 @@ -35632,18 +35619,14 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v27, s42 ; SI-NEXT: v_mov_b32_e32 v26, s40 ; SI-NEXT: .LBB53_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 -; SI-NEXT: v_or_b32_e32 v0, v0, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44 ; SI-NEXT: v_or_b32_e32 v2, v2, v37 ; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43 ; SI-NEXT: v_or_b32_e32 v4, v4, v36 @@ -35652,11 +35635,12 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41 ; SI-NEXT: v_or_b32_e32 v8, v8, v34 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v40 -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 @@ -35673,7 +35657,9 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_or_b32_e32 v0, v0, v38 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v39 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 @@ -35702,7 +35688,7 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI-NEXT: v_or_b32_e32 v24, v24, v26 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v48 -; SI-NEXT: v_readlane_b32 s30, v45, 7 +; SI-NEXT: v_readlane_b32 s30, v44, 7 ; SI-NEXT: v_or_b32_e32 v1, v1, v38 ; SI-NEXT: v_or_b32_e32 v3, v3, v37 ; SI-NEXT: v_or_b32_e32 v5, v5, v36 @@ -35716,16 +35702,16 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; SI-NEXT: v_or_b32_e32 v21, v21, v28 ; SI-NEXT: v_or_b32_e32 v23, v23, v27 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: v_readlane_b32 s31, v45, 8 -; SI-NEXT: v_readlane_b32 s48, v45, 6 -; SI-NEXT: v_readlane_b32 s39, v45, 5 -; SI-NEXT: v_readlane_b32 s38, v45, 4 -; SI-NEXT: v_readlane_b32 s37, v45, 3 -; SI-NEXT: v_readlane_b32 s36, v45, 2 -; SI-NEXT: v_readlane_b32 s35, v45, 1 -; SI-NEXT: v_readlane_b32 s34, v45, 0 +; SI-NEXT: v_readlane_b32 s31, v44, 8 +; SI-NEXT: v_readlane_b32 s48, v44, 6 +; SI-NEXT: v_readlane_b32 s39, v44, 5 +; SI-NEXT: v_readlane_b32 s38, v44, 4 +; SI-NEXT: v_readlane_b32 s37, v44, 3 +; SI-NEXT: v_readlane_b32 s36, v44, 2 +; SI-NEXT: v_readlane_b32 s35, v44, 1 +; SI-NEXT: v_readlane_b32 s34, v44, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -35738,14 +35724,14 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill ; VI-NEXT: v_readfirstlane_b32 s4, v12 -; VI-NEXT: v_readfirstlane_b32 s9, v11 -; VI-NEXT: v_readfirstlane_b32 s8, v10 -; VI-NEXT: v_readfirstlane_b32 s11, v9 -; VI-NEXT: v_readfirstlane_b32 s10, v8 -; VI-NEXT: v_readfirstlane_b32 s13, v7 -; VI-NEXT: v_readfirstlane_b32 s12, v6 -; VI-NEXT: v_readfirstlane_b32 s15, v5 -; VI-NEXT: v_readfirstlane_b32 s14, v4 +; VI-NEXT: v_readfirstlane_b32 s15, v11 +; VI-NEXT: v_readfirstlane_b32 s14, v10 +; VI-NEXT: v_readfirstlane_b32 s13, v9 +; VI-NEXT: v_readfirstlane_b32 s12, v8 +; VI-NEXT: v_readfirstlane_b32 s11, v7 +; VI-NEXT: v_readfirstlane_b32 s10, v6 +; VI-NEXT: v_readfirstlane_b32 s9, v5 +; VI-NEXT: v_readfirstlane_b32 s8, v4 ; VI-NEXT: v_readfirstlane_b32 s7, v3 ; VI-NEXT: v_readfirstlane_b32 s6, v2 ; VI-NEXT: v_readfirstlane_b32 s5, v1 @@ -35753,14 +35739,14 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; VI-NEXT: v_readfirstlane_b32 s4, v0 ; VI-NEXT: s_cbranch_scc0 .LBB53_3 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: s_lshr_b32 s42, s9, 16 -; VI-NEXT: s_lshr_b32 s63, s8, 16 -; VI-NEXT: s_lshr_b32 s43, s11, 16 -; VI-NEXT: s_lshr_b32 s72, s10, 16 -; VI-NEXT: s_lshr_b32 s44, s13, 16 -; VI-NEXT: s_lshr_b32 s73, s12, 16 -; VI-NEXT: s_lshr_b32 s45, s15, 16 -; VI-NEXT: s_lshr_b32 s74, s14, 16 +; VI-NEXT: s_lshr_b32 s42, s15, 16 +; VI-NEXT: s_lshr_b32 s63, s14, 16 +; VI-NEXT: s_lshr_b32 s43, s13, 16 +; VI-NEXT: s_lshr_b32 s72, s12, 16 +; VI-NEXT: s_lshr_b32 s44, s11, 16 +; VI-NEXT: s_lshr_b32 s73, s10, 16 +; VI-NEXT: s_lshr_b32 s45, s9, 16 +; VI-NEXT: s_lshr_b32 s74, s8, 16 ; VI-NEXT: s_lshr_b32 s46, s7, 16 ; VI-NEXT: s_lshr_b32 s75, s6, 16 ; VI-NEXT: s_lshr_b32 s47, s5, 16 @@ -35781,10 +35767,10 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; VI-NEXT: s_lshr_b32 s91, s16, 16 ; VI-NEXT: s_cbranch_execnz .LBB53_4 ; VI-NEXT: .LBB53_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[24:25], s[8:9], 1.0 -; VI-NEXT: v_add_f64 v[22:23], s[10:11], 1.0 -; VI-NEXT: v_add_f64 v[20:21], s[12:13], 1.0 -; VI-NEXT: v_add_f64 v[18:19], s[14:15], 1.0 +; VI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 +; VI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 +; VI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; VI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; VI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -35859,7 +35845,10 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; VI-NEXT: v_mov_b32_e32 v12, s28 ; VI-NEXT: v_mov_b32_e32 v14, s4 ; VI-NEXT: v_mov_b32_e32 v16, s6 -; VI-NEXT: v_mov_b32_e32 v18, s14 +; VI-NEXT: v_mov_b32_e32 v18, s8 +; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_mov_b32_e32 v22, s12 +; VI-NEXT: v_mov_b32_e32 v24, s14 ; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v3, s19 ; VI-NEXT: v_mov_b32_e32 v5, s21 @@ -35869,13 +35858,10 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; VI-NEXT: v_mov_b32_e32 v13, s29 ; VI-NEXT: v_mov_b32_e32 v15, s5 ; VI-NEXT: v_mov_b32_e32 v17, s7 -; VI-NEXT: v_mov_b32_e32 v19, s15 -; VI-NEXT: v_mov_b32_e32 v20, s12 -; VI-NEXT: v_mov_b32_e32 v21, s13 -; VI-NEXT: v_mov_b32_e32 v22, s10 -; VI-NEXT: v_mov_b32_e32 v23, s11 -; VI-NEXT: v_mov_b32_e32 v24, s8 -; VI-NEXT: v_mov_b32_e32 v25, s9 +; VI-NEXT: v_mov_b32_e32 v19, s9 +; VI-NEXT: v_mov_b32_e32 v21, s11 +; VI-NEXT: v_mov_b32_e32 v23, s13 +; VI-NEXT: v_mov_b32_e32 v25, s15 ; VI-NEXT: v_mov_b32_e32 v40, s91 ; VI-NEXT: v_mov_b32_e32 v54, s90 ; VI-NEXT: v_mov_b32_e32 v52, s89 @@ -35970,14 +35956,14 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: v_readfirstlane_b32 s4, v12 -; GFX9-NEXT: v_readfirstlane_b32 s9, v11 -; GFX9-NEXT: v_readfirstlane_b32 s8, v10 -; GFX9-NEXT: v_readfirstlane_b32 s11, v9 -; GFX9-NEXT: v_readfirstlane_b32 s10, v8 -; GFX9-NEXT: v_readfirstlane_b32 s13, v7 -; GFX9-NEXT: v_readfirstlane_b32 s12, v6 -; GFX9-NEXT: v_readfirstlane_b32 s15, v5 -; GFX9-NEXT: v_readfirstlane_b32 s14, v4 +; GFX9-NEXT: v_readfirstlane_b32 s15, v11 +; GFX9-NEXT: v_readfirstlane_b32 s14, v10 +; GFX9-NEXT: v_readfirstlane_b32 s13, v9 +; GFX9-NEXT: v_readfirstlane_b32 s12, v8 +; GFX9-NEXT: v_readfirstlane_b32 s11, v7 +; GFX9-NEXT: v_readfirstlane_b32 s10, v6 +; GFX9-NEXT: v_readfirstlane_b32 s9, v5 +; GFX9-NEXT: v_readfirstlane_b32 s8, v4 ; GFX9-NEXT: v_readfirstlane_b32 s7, v3 ; GFX9-NEXT: v_readfirstlane_b32 s6, v2 ; GFX9-NEXT: v_readfirstlane_b32 s5, v1 @@ -35985,14 +35971,14 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; GFX9-NEXT: v_readfirstlane_b32 s4, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB53_3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: s_lshr_b32 s42, s9, 16 -; GFX9-NEXT: s_lshr_b32 s63, s8, 16 -; GFX9-NEXT: s_lshr_b32 s43, s11, 16 -; GFX9-NEXT: s_lshr_b32 s72, s10, 16 -; GFX9-NEXT: s_lshr_b32 s44, s13, 16 -; GFX9-NEXT: s_lshr_b32 s73, s12, 16 -; GFX9-NEXT: s_lshr_b32 s45, s15, 16 -; GFX9-NEXT: s_lshr_b32 s74, s14, 16 +; GFX9-NEXT: s_lshr_b32 s42, s15, 16 +; GFX9-NEXT: s_lshr_b32 s63, s14, 16 +; GFX9-NEXT: s_lshr_b32 s43, s13, 16 +; GFX9-NEXT: s_lshr_b32 s72, s12, 16 +; GFX9-NEXT: s_lshr_b32 s44, s11, 16 +; GFX9-NEXT: s_lshr_b32 s73, s10, 16 +; GFX9-NEXT: s_lshr_b32 s45, s9, 16 +; GFX9-NEXT: s_lshr_b32 s74, s8, 16 ; GFX9-NEXT: s_lshr_b32 s46, s7, 16 ; GFX9-NEXT: s_lshr_b32 s75, s6, 16 ; GFX9-NEXT: s_lshr_b32 s47, s5, 16 @@ -36013,10 +35999,10 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; GFX9-NEXT: s_lshr_b32 s91, s16, 16 ; GFX9-NEXT: s_cbranch_execnz .LBB53_4 ; GFX9-NEXT: .LBB53_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[24:25], s[8:9], 1.0 -; GFX9-NEXT: v_add_f64 v[22:23], s[10:11], 1.0 -; GFX9-NEXT: v_add_f64 v[20:21], s[12:13], 1.0 -; GFX9-NEXT: v_add_f64 v[18:19], s[14:15], 1.0 +; GFX9-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 +; GFX9-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 +; GFX9-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; GFX9-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; GFX9-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -36091,7 +36077,10 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v12, s28 ; GFX9-NEXT: v_mov_b32_e32 v14, s4 ; GFX9-NEXT: v_mov_b32_e32 v16, s6 -; GFX9-NEXT: v_mov_b32_e32 v18, s14 +; GFX9-NEXT: v_mov_b32_e32 v18, s8 +; GFX9-NEXT: v_mov_b32_e32 v20, s10 +; GFX9-NEXT: v_mov_b32_e32 v22, s12 +; GFX9-NEXT: v_mov_b32_e32 v24, s14 ; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: v_mov_b32_e32 v5, s21 @@ -36101,13 +36090,10 @@ define inreg <52 x half> @bitcast_v13f64_to_v52f16_scalar(<13 x double> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v13, s29 ; GFX9-NEXT: v_mov_b32_e32 v15, s5 ; GFX9-NEXT: v_mov_b32_e32 v17, s7 -; GFX9-NEXT: v_mov_b32_e32 v19, s15 -; GFX9-NEXT: v_mov_b32_e32 v20, s12 -; GFX9-NEXT: v_mov_b32_e32 v21, s13 -; GFX9-NEXT: v_mov_b32_e32 v22, s10 -; GFX9-NEXT: v_mov_b32_e32 v23, s11 -; GFX9-NEXT: v_mov_b32_e32 v24, s8 -; GFX9-NEXT: v_mov_b32_e32 v25, s9 +; GFX9-NEXT: v_mov_b32_e32 v19, s9 +; GFX9-NEXT: v_mov_b32_e32 v21, s11 +; GFX9-NEXT: v_mov_b32_e32 v23, s13 +; GFX9-NEXT: v_mov_b32_e32 v25, s15 ; GFX9-NEXT: v_mov_b32_e32 v40, s91 ; GFX9-NEXT: v_mov_b32_e32 v54, s90 ; GFX9-NEXT: v_mov_b32_e32 v52, s89 @@ -36666,8 +36652,8 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v40 ; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v41 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v46 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v47 @@ -36692,10 +36678,10 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v37 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v56 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v47 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -36706,10 +36692,10 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v35 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v44 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v34 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v63 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v42 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v33 @@ -36745,8 +36731,8 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr32 @@ -36878,158 +36864,158 @@ define <13 x double> @bitcast_v52f16_to_v13f64(<52 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v37 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v57 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v56 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v47 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v36 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v47 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v46 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v45 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v46 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v35 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v45 +; SI-NEXT: v_or_b32_e32 v3, v4, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v34 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v44 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v44 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v63 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v33 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v35 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v42 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v41 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v63 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v42 +; SI-NEXT: v_or_b32_e32 v6, v7, v6 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v41 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v40 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v55 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v34 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v40 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v55 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v54 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v53 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v33 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v10, v9 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v54 ; SI-NEXT: v_cvt_f32_f16_e32 v15, v52 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v16, v51 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v62 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v49 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v48 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_cvt_f32_f16_e32 v21, v38 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v61 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v60 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 +; SI-NEXT: s_waitcnt vmcnt(8) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(7) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 -; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v13, v12 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(6) +; SI-NEXT: v_cvt_f32_f16_e32 v17, v17 +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v20, v20 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 ; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v13, v15, v13 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -38366,17 +38352,17 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s86, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s85, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s84, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s86, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s83, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s82, 16 @@ -38445,13 +38431,13 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a ; VI-NEXT: .LBB55_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v25, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s87 -; VI-NEXT: v_mov_b32_e32 v2, s86 ; VI-NEXT: v_add_f16_sdwa v0, v0, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v25 -; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v25 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s86 +; VI-NEXT: v_add_f16_sdwa v1, v1, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v25 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s85 ; VI-NEXT: v_add_f16_sdwa v2, v2, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v25 @@ -38642,10 +38628,6 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 ; GFX9-NEXT: v_readfirstlane_b32 s60, v10 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 @@ -38655,12 +38637,9 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a ; GFX9-NEXT: v_readfirstlane_b32 s76, v5 ; GFX9-NEXT: v_readfirstlane_b32 s78, v4 ; GFX9-NEXT: v_readfirstlane_b32 s88, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: v_readfirstlane_b32 s16, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v2 +; GFX9-NEXT: v_readfirstlane_b32 s92, v1 +; GFX9-NEXT: v_readfirstlane_b32 s94, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -38671,6 +38650,10 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 ; GFX9-NEXT: s_lshr_b32 s12, s21, 16 ; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s62, s61, 16 ; GFX9-NEXT: s_lshr_b32 s63, s60, 16 ; GFX9-NEXT: s_lshr_b32 s72, s59, 16 @@ -38680,12 +38663,15 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a ; GFX9-NEXT: s_lshr_b32 s77, s76, 16 ; GFX9-NEXT: s_lshr_b32 s79, s78, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v12 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 ; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: v_readfirstlane_b32 s40, v12 -; GFX9-NEXT: s_cmp_lg_u32 s40, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 ; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 ; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 @@ -38696,9 +38682,9 @@ define inreg <13 x double> @bitcast_v52f16_to_v13f64_scalar(<52 x half> inreg %a ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s53, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s54, s78, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s76, s77 @@ -38949,42 +38935,34 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v1 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v0 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v0 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v26 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v40 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v3 -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v54 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v5 -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v53 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v3 ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v52 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v5 +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v50 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v7 ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v39 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v11 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v48 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v9 ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v37 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v11 ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v35 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v15 ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v34 ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v32 -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; kill: killed $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr26 @@ -39032,61 +39010,69 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: ; kill: killed $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v24 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v22 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v20 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v18 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v16 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v12 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v10 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v6 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v4 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v2 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v24 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v22 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v20 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v18 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v14 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v10 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v8 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v6 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v4 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v2 ; SI-NEXT: ; kill: killed $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v52 -; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v51 -; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v49 -; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v48 -; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v38 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v36 -; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v34 -; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v31 -; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v30 +; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v30 +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v41 +; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v36 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v32 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v31 ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v29 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v47 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v45 -; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v43 -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v42 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v55 +; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v28 +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v42 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v55 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v54 ; SI-NEXT: ; kill: killed $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr59 -; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr47 -; SI-NEXT: ; implicit-def: $vgpr45 -; SI-NEXT: ; implicit-def: $vgpr43 +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr44 ; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; kill: killed $vgpr26 ; SI-NEXT: ; implicit-def: $vgpr26 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc @@ -39094,395 +39080,390 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_cbranch_execz .LBB56_2 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v40 -; SI-NEXT: v_or_b32_e32 v59, v1, v26 -; SI-NEXT: v_mov_b32_e32 v26, v32 -; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v53 +; SI-NEXT: v_or_b32_e32 v46, v1, v26 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50 +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_or_b32_e32 v44, v1, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_or_b32_e32 v42, v1, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37 +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_or_b32_e32 v40, v1, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_or_b32_e32 v55, v1, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_or_b32_e32 v54, v1, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: ; implicit-def: $vgpr5 +; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: ; implicit-def: $vgpr9 +; SI-NEXT: ; implicit-def: $vgpr11 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v59, v32, 16 +; SI-NEXT: v_alignbit_b32 v1, v46, v3, 16 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v53 -; SI-NEXT: v_or_b32_e32 v57, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v57, v54, 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13 +; SI-NEXT: v_or_b32_e32 v52, v1, v29 +; SI-NEXT: v_alignbit_b32 v1, v44, v45, 16 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v50 -; SI-NEXT: v_or_b32_e32 v47, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v47, v41, 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v51, v1, v30 +; SI-NEXT: v_alignbit_b32 v1, v42, v47, 16 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v39 -; SI-NEXT: v_or_b32_e32 v45, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v45, v46, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17 +; SI-NEXT: v_or_b32_e32 v49, v1, v31 +; SI-NEXT: v_or_b32_e32 v0, v0, v3 +; SI-NEXT: v_alignbit_b32 v1, v40, v56, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37 -; SI-NEXT: v_or_b32_e32 v43, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v43, v58, 16 +; SI-NEXT: v_alignbit_b32 v0, v49, v41, 16 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v35 -; SI-NEXT: v_or_b32_e32 v42, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v42, v63, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v33 -; SI-NEXT: v_or_b32_e32 v55, v1, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v0, v0, v32 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v0, v0, v54 +; SI-NEXT: v_or_b32_e32 v39, v1, v28 +; SI-NEXT: v_or_b32_e32 v0, v0, v45 +; SI-NEXT: v_alignbit_b32 v1, v55, v57, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v39, v62, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4 -; SI-NEXT: v_or_b32_e32 v0, v0, v41 +; SI-NEXT: v_or_b32_e32 v38, v1, v32 +; SI-NEXT: v_or_b32_e32 v0, v0, v47 +; SI-NEXT: v_alignbit_b32 v1, v54, v59, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v38, v60, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v0, v0, v46 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v36, v1, v43 +; SI-NEXT: v_or_b32_e32 v0, v0, v56 +; SI-NEXT: v_alignbit_b32 v1, v52, v58, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v36, v27, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8 -; SI-NEXT: v_alignbit_b32 v1, v55, v60, 16 -; SI-NEXT: v_or_b32_e32 v0, v0, v58 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v26, v1, v33 +; SI-NEXT: v_or_b32_e32 v0, v0, v57 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v26, v61, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v0, v0, v63 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v59 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v0, v0, v60 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v58 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v0, v0, v56 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v63 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v0, v0, v61 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v41 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18 ; SI-NEXT: v_or_b32_e32 v0, v0, v62 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20 -; SI-NEXT: v_or_b32_e32 v0, v0, v27 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v60 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v22 -; SI-NEXT: v_or_b32_e32 v0, v0, v28 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24 -; SI-NEXT: v_or_b32_e32 v0, v0, v44 -; SI-NEXT: v_mov_b32_e32 v32, v26 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr2 -; SI-NEXT: ; implicit-def: $vgpr4 -; SI-NEXT: ; implicit-def: $vgpr5 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: ; implicit-def: $vgpr7 -; SI-NEXT: ; implicit-def: $vgpr8 -; SI-NEXT: ; implicit-def: $vgpr9 -; SI-NEXT: ; implicit-def: $vgpr10 -; SI-NEXT: ; implicit-def: $vgpr11 -; SI-NEXT: ; implicit-def: $vgpr12 -; SI-NEXT: ; implicit-def: $vgpr13 -; SI-NEXT: ; implicit-def: $vgpr14 -; SI-NEXT: ; implicit-def: $vgpr15 -; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr18 -; SI-NEXT: ; implicit-def: $vgpr20 -; SI-NEXT: ; implicit-def: $vgpr22 -; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; implicit-def: $vgpr41 -; SI-NEXT: ; implicit-def: $vgpr46 -; SI-NEXT: ; implicit-def: $vgpr58 -; SI-NEXT: ; implicit-def: $vgpr63 -; SI-NEXT: ; implicit-def: $vgpr60 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_or_b32_e32 v52, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v52, v56, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v49, v1, v29 -; SI-NEXT: v_alignbit_b32 v1, v49, v61, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19 -; SI-NEXT: v_or_b32_e32 v38, v1, v30 -; SI-NEXT: v_alignbit_b32 v1, v38, v62, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21 -; SI-NEXT: v_or_b32_e32 v36, v1, v51 -; SI-NEXT: v_alignbit_b32 v1, v36, v27, 16 -; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: ; kill: killed $vgpr27 +; SI-NEXT: v_or_b32_e32 v0, v0, v27 ; SI-NEXT: ; implicit-def: $vgpr27 ; SI-NEXT: ; kill: killed $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23 ; SI-NEXT: ; kill: killed $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: v_or_b32_e32 v34, v1, v48 ; SI-NEXT: ; kill: killed $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: v_alignbit_b32 v1, v34, v28, 16 ; SI-NEXT: ; kill: killed $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25 -; SI-NEXT: ; kill: killed $vgpr27 -; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: v_or_b32_e32 v3, v1, v31 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24 ; SI-NEXT: ; kill: killed $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: v_alignbit_b32 v1, v3, v44, 16 +; SI-NEXT: v_alignbit_b32 v1, v51, v63, 16 +; SI-NEXT: v_or_b32_e32 v0, v0, v61 ; SI-NEXT: ; kill: killed $vgpr27 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v26, v3 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr0 ; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr2 ; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr6 +; SI-NEXT: ; implicit-def: $vgpr8 +; SI-NEXT: ; implicit-def: $vgpr10 +; SI-NEXT: ; implicit-def: $vgpr12 +; SI-NEXT: ; implicit-def: $vgpr13 +; SI-NEXT: ; implicit-def: $vgpr14 +; SI-NEXT: ; implicit-def: $vgpr15 +; SI-NEXT: ; implicit-def: $vgpr16 ; SI-NEXT: ; implicit-def: $vgpr17 +; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr22 ; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr24 ; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; kill: killed $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr45 +; SI-NEXT: ; implicit-def: $vgpr47 ; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: ; implicit-def: $vgpr57 +; SI-NEXT: ; kill: killed $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr30 +; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr41 +; SI-NEXT: ; implicit-def: $vgpr28 ; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr60 +; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr31 -; SI-NEXT: ; implicit-def: $vgpr44 +; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: .LBB56_2: ; %Flow ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB56_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: v_or_b32_e32 v24, v44, v24 -; SI-NEXT: v_add_i32_e32 v32, vcc, 0x30000, v24 +; SI-NEXT: v_or_b32_e32 v24, v61, v24 +; SI-NEXT: v_add_i32_e32 v34, vcc, 0x30000, v24 ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v25 ; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v24, v31, v24 -; SI-NEXT: v_or_b32_e32 v22, v28, v22 -; SI-NEXT: s_waitcnt expcnt(5) +; SI-NEXT: v_or_b32_e32 v24, v33, v24 +; SI-NEXT: v_or_b32_e32 v22, v27, v22 ; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v24 ; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v22 ; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v23 ; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; SI-NEXT: v_or_b32_e32 v22, v48, v22 -; SI-NEXT: v_or_b32_e32 v20, v27, v20 -; SI-NEXT: v_add_i32_e32 v34, vcc, s6, v22 +; SI-NEXT: v_or_b32_e32 v22, v43, v22 +; SI-NEXT: v_or_b32_e32 v20, v60, v20 +; SI-NEXT: v_add_i32_e32 v36, vcc, s6, v22 ; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v20 ; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v21 ; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v20, v51, v20 +; SI-NEXT: v_or_b32_e32 v20, v32, v20 ; SI-NEXT: v_or_b32_e32 v18, v62, v18 -; SI-NEXT: v_add_i32_e32 v36, vcc, s6, v20 +; SI-NEXT: v_add_i32_e32 v38, vcc, s6, v20 ; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v18 ; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v19 ; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v18, v30, v18 -; SI-NEXT: v_or_b32_e32 v16, v61, v16 -; SI-NEXT: v_add_i32_e32 v38, vcc, s6, v18 +; SI-NEXT: v_or_b32_e32 v18, v28, v18 +; SI-NEXT: v_or_b32_e32 v16, v41, v16 +; SI-NEXT: v_add_i32_e32 v39, vcc, s6, v18 ; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v17 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v16, v29, v16 -; SI-NEXT: v_or_b32_e32 v14, v56, v14 +; SI-NEXT: v_or_b32_e32 v16, v31, v16 +; SI-NEXT: v_or_b32_e32 v14, v63, v14 ; SI-NEXT: v_add_i32_e32 v49, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v15 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v12, v60, v12 +; SI-NEXT: v_or_b32_e32 v14, v30, v14 +; SI-NEXT: v_or_b32_e32 v12, v58, v12 +; SI-NEXT: v_add_i32_e32 v51, vcc, s6, v14 +; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v12 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v13 ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v10, v63, v10 +; SI-NEXT: v_or_b32_e32 v12, v29, v12 +; SI-NEXT: v_or_b32_e32 v10, v59, v10 +; SI-NEXT: v_add_i32_e32 v52, vcc, s6, v12 +; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v10 +; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11 +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v8, v58, v8 +; SI-NEXT: v_or_b32_e32 v8, v57, v8 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v6, v46, v6 +; SI-NEXT: v_or_b32_e32 v6, v56, v6 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_or_b32_e32 v4, v41, v4 +; SI-NEXT: v_or_b32_e32 v4, v47, v4 ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v54, v2 +; SI-NEXT: v_or_b32_e32 v2, v45, v2 +; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_add_i32_e32 v52, vcc, s6, v14 -; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v12 -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v13 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v12 -; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v10 -; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v55 -; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v10 +; SI-NEXT: v_add_i32_e32 v54, vcc, s6, v10 ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v42 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_add_i32_e32 v43, vcc, s6, v8 +; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v55 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_add_i32_e32 v45, vcc, s6, v6 +; SI-NEXT: v_add_i32_e32 v40, vcc, s6, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v45 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v40 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_add_i32_e32 v47, vcc, s6, v4 +; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v42 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_add_i32_e32 v57, vcc, s6, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v57 +; SI-NEXT: v_add_i32_e32 v44, vcc, s6, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v44 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v2, v0 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v59, vcc, s6, v0 -; SI-NEXT: v_alignbit_b32 v0, v59, v2, 16 +; SI-NEXT: v_add_i32_e32 v46, vcc, s6, v0 +; SI-NEXT: v_alignbit_b32 v0, v46, v2, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v57, v4, 16 +; SI-NEXT: v_alignbit_b32 v0, v44, v4, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v47, v6, 16 +; SI-NEXT: v_alignbit_b32 v0, v42, v6, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v45, v8, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v43, v10, 16 +; SI-NEXT: v_alignbit_b32 v0, v40, v8, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v42, v12, 16 +; SI-NEXT: v_alignbit_b32 v0, v55, v10, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v55, v14, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v52, v16, 16 +; SI-NEXT: v_alignbit_b32 v0, v54, v12, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v49, v18, 16 +; SI-NEXT: v_alignbit_b32 v0, v52, v14, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v38, v20, 16 +; SI-NEXT: v_alignbit_b32 v0, v51, v16, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v36, v22, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v34, v24, 16 +; SI-NEXT: v_alignbit_b32 v0, v49, v18, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v26, v32, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v39, v20, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v38, v22, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v36, v24, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v26, v34, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v38 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v36 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v38 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v34 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v59 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v52 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v36 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v54 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v26 @@ -39490,61 +39471,61 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 { ; SI-NEXT: .LBB56_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v40 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v53 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v50 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v39 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v37 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v35 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v33 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v32 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v50 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v35 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v34 +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v59 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v46 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 ; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: s_waitcnt vmcnt(13) -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 ; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 ; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; SI-NEXT: s_waitcnt vmcnt(3) @@ -39556,33 +39537,21 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v57 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v44 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v47 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v42 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v45 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v40 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v43 -; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42 -; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -39600,41 +39569,53 @@ define <52 x half> @bitcast_v52i16_to_v52f16(<52 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; SI-NEXT: v_or_b32_e32 v8, v8, v9 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v55 +; SI-NEXT: v_or_b32_e32 v9, v9, v10 +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_or_b32_e32 v10, v10, v11 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v54 +; SI-NEXT: v_or_b32_e32 v11, v11, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v55 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v52 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v52 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v51 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_or_b32_e32 v16, v16, v17 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v49 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v38 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v39 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v36 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v38 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v34 +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v36 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 @@ -40161,8 +40142,9 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_writelane_b32 v26, s34, 0 ; SI-NEXT: v_writelane_b32 v26, s35, 1 ; SI-NEXT: v_writelane_b32 v26, s36, 2 @@ -40199,436 +40181,509 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i ; SI-NEXT: v_writelane_b32 v26, s99, 33 ; SI-NEXT: v_writelane_b32 v26, s30, 34 ; SI-NEXT: v_writelane_b32 v26, s31, 35 -; SI-NEXT: v_readfirstlane_b32 s85, v11 -; SI-NEXT: v_readfirstlane_b32 s99, v10 -; SI-NEXT: v_readfirstlane_b32 s81, v9 -; SI-NEXT: v_readfirstlane_b32 s83, v8 -; SI-NEXT: v_readfirstlane_b32 s70, v7 -; SI-NEXT: v_readfirstlane_b32 s80, v6 -; SI-NEXT: v_readfirstlane_b32 s98, v5 -; SI-NEXT: v_readfirstlane_b32 s69, v4 -; SI-NEXT: v_readfirstlane_b32 s87, v3 -; SI-NEXT: v_readfirstlane_b32 s97, v2 -; SI-NEXT: v_readfirstlane_b32 s84, v1 -; SI-NEXT: v_readfirstlane_b32 s86, v0 -; SI-NEXT: s_lshr_b32 s54, s29, 16 -; SI-NEXT: s_lshr_b32 s91, s28, 16 -; SI-NEXT: s_lshr_b32 s53, s27, 16 -; SI-NEXT: s_lshr_b32 s89, s26, 16 -; SI-NEXT: s_lshr_b32 s52, s25, 16 -; SI-NEXT: s_lshr_b32 s79, s24, 16 -; SI-NEXT: s_lshr_b32 s51, s23, 16 -; SI-NEXT: s_lshr_b32 s77, s22, 16 -; SI-NEXT: s_lshr_b32 s50, s21, 16 -; SI-NEXT: s_lshr_b32 s75, s20, 16 -; SI-NEXT: s_lshr_b32 s49, s19, 16 -; SI-NEXT: s_lshr_b32 s73, s18, 16 -; SI-NEXT: s_lshr_b32 s48, s17, 16 -; SI-NEXT: s_lshr_b32 s63, s16, 16 -; SI-NEXT: s_lshr_b32 s68, s85, 16 -; SI-NEXT: s_lshr_b32 s96, s99, 16 -; SI-NEXT: s_lshr_b32 s67, s81, 16 -; SI-NEXT: s_lshr_b32 s82, s83, 16 -; SI-NEXT: s_lshr_b32 s66, s70, 16 -; SI-NEXT: s_lshr_b32 s71, s80, 16 -; SI-NEXT: s_lshr_b32 s65, s98, 16 -; SI-NEXT: s_lshr_b32 s31, s69, 16 -; SI-NEXT: s_lshr_b32 s64, s87, 16 -; SI-NEXT: s_lshr_b32 s95, s97, 16 -; SI-NEXT: s_lshr_b32 s55, s84, 16 -; SI-NEXT: s_lshr_b32 s93, s86, 16 +; SI-NEXT: v_readfirstlane_b32 s31, v11 +; SI-NEXT: v_readfirstlane_b32 s34, v10 +; SI-NEXT: v_readfirstlane_b32 s95, v9 +; SI-NEXT: v_readfirstlane_b32 s30, v8 +; SI-NEXT: v_readfirstlane_b32 s47, v7 +; SI-NEXT: v_readfirstlane_b32 s94, v6 +; SI-NEXT: v_readfirstlane_b32 s15, v5 +; SI-NEXT: v_readfirstlane_b32 s91, v4 +; SI-NEXT: v_readfirstlane_b32 s89, v3 +; SI-NEXT: v_readfirstlane_b32 s88, v2 +; SI-NEXT: v_readfirstlane_b32 s98, v1 +; SI-NEXT: v_readfirstlane_b32 s78, v0 +; SI-NEXT: s_lshr_b32 s37, s29, 16 +; SI-NEXT: s_lshr_b32 s36, s28, 16 +; SI-NEXT: s_lshr_b32 s65, s27, 16 +; SI-NEXT: s_lshr_b32 s50, s26, 16 +; SI-NEXT: s_lshr_b32 s73, s25, 16 +; SI-NEXT: s_lshr_b32 s49, s24, 16 +; SI-NEXT: s_lshr_b32 s55, s23, 16 +; SI-NEXT: s_lshr_b32 s48, s22, 16 +; SI-NEXT: s_lshr_b32 s63, s21, 16 +; SI-NEXT: s_lshr_b32 s70, s20, 16 +; SI-NEXT: s_lshr_b32 s53, s19, 16 +; SI-NEXT: s_lshr_b32 s82, s18, 16 +; SI-NEXT: s_lshr_b32 s51, s17, 16 +; SI-NEXT: s_lshr_b32 s35, s16, 16 +; SI-NEXT: s_lshr_b32 s75, s31, 16 +; SI-NEXT: s_lshr_b32 s93, s34, 16 +; SI-NEXT: s_lshr_b32 s84, s95, 16 +; SI-NEXT: s_lshr_b32 s90, s30, 16 +; SI-NEXT: s_lshr_b32 s39, s47, 16 +; SI-NEXT: s_lshr_b32 s14, s94, 16 +; SI-NEXT: s_lshr_b32 s80, s15, 16 +; SI-NEXT: s_lshr_b32 s79, s91, 16 +; SI-NEXT: s_lshr_b32 s77, s89, 16 +; SI-NEXT: s_lshr_b32 s72, s88, 16 +; SI-NEXT: s_lshr_b32 s68, s98, 16 +; SI-NEXT: s_lshr_b32 s62, s78, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v12 ; SI-NEXT: s_cmp_lg_u32 s4, 0 +; SI-NEXT: ; implicit-def: $vgpr27 : SGPR spill to VGPR lane +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_writelane_b32 v27, s47, 0 ; SI-NEXT: s_cbranch_scc0 .LBB57_4 ; SI-NEXT: ; %bb.1: ; %cmp.false +; SI-NEXT: s_and_b32 s4, s16, 0xffff +; SI-NEXT: s_lshl_b32 s86, s35, 16 +; SI-NEXT: s_or_b32 s60, s4, s86 +; SI-NEXT: s_and_b32 s4, s18, 0xffff +; SI-NEXT: s_mov_b32 s45, s15 +; SI-NEXT: s_mov_b32 s15, s84 +; SI-NEXT: s_lshl_b32 s84, s82, 16 +; SI-NEXT: s_mov_b32 s41, s82 +; SI-NEXT: s_or_b32 s58, s4, s84 +; SI-NEXT: s_and_b32 s4, s20, 0xffff +; SI-NEXT: s_lshl_b32 s82, s70, 16 +; SI-NEXT: s_or_b32 s56, s4, s82 +; SI-NEXT: s_and_b32 s4, s22, 0xffff +; SI-NEXT: s_mov_b32 s13, s80 +; SI-NEXT: s_lshl_b32 s80, s48, 16 +; SI-NEXT: s_mov_b32 s43, s70 +; SI-NEXT: s_or_b32 s46, s4, s80 +; SI-NEXT: s_and_b32 s4, s24, 0xffff +; SI-NEXT: s_lshl_b32 s70, s49, 16 +; SI-NEXT: s_or_b32 s44, s4, s70 +; SI-NEXT: s_and_b32 s4, s26, 0xffff +; SI-NEXT: s_mov_b32 s11, s68 +; SI-NEXT: s_lshl_b32 s68, s50, 16 +; SI-NEXT: v_writelane_b32 v27, s36, 9 +; SI-NEXT: s_or_b32 s42, s4, s68 +; SI-NEXT: s_and_b32 s4, s28, 0xffff +; SI-NEXT: s_lshl_b32 s66, s36, 16 +; SI-NEXT: v_writelane_b32 v27, s35, 10 ; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s7, s48, 16 -; SI-NEXT: s_lshl_b32 s62, s63, 16 -; SI-NEXT: s_mov_b32 s9, s63 -; SI-NEXT: s_or_b32 s63, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s51, 16 +; SI-NEXT: s_or_b32 s40, s4, s66 +; SI-NEXT: s_and_b32 s4, s78, 0xffff +; SI-NEXT: s_lshl_b32 s64, s62, 16 +; SI-NEXT: v_writelane_b32 v27, s50, 11 +; SI-NEXT: s_or_b32 s87, s5, s7 +; SI-NEXT: s_or_b32 s96, s4, s64 +; SI-NEXT: s_and_b32 s4, s88, 0xffff +; SI-NEXT: v_writelane_b32 v27, s88, 12 +; SI-NEXT: s_mov_b32 s5, s89 +; SI-NEXT: s_lshr_b64 s[88:89], s[86:87], 16 +; SI-NEXT: s_mov_b32 s89, s5 ; SI-NEXT: s_and_b32 s5, s19, 0xffff -; SI-NEXT: s_lshl_b32 s7, s49, 16 -; SI-NEXT: s_lshl_b32 s72, s73, 16 -; SI-NEXT: s_mov_b32 s11, s73 -; SI-NEXT: s_or_b32 s73, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s53, 16 +; SI-NEXT: s_or_b32 s85, s5, s7 +; SI-NEXT: s_mov_b32 s5, s63 +; SI-NEXT: s_mov_b32 s86, s62 +; SI-NEXT: s_lshr_b64 s[62:63], s[84:85], 16 +; SI-NEXT: s_mov_b32 s63, s5 ; SI-NEXT: s_and_b32 s5, s21, 0xffff -; SI-NEXT: s_lshl_b32 s7, s50, 16 -; SI-NEXT: s_lshl_b32 s74, s75, 16 -; SI-NEXT: s_mov_b32 s90, s75 -; SI-NEXT: s_or_b32 s75, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s63, 16 +; SI-NEXT: s_or_b32 s83, s5, s7 +; SI-NEXT: s_lshl_b32 s54, s72, 16 +; SI-NEXT: s_mov_b32 s5, s73 +; SI-NEXT: s_mov_b32 s99, s72 +; SI-NEXT: s_lshr_b64 s[72:73], s[82:83], 16 +; SI-NEXT: s_mov_b32 s73, s5 ; SI-NEXT: s_and_b32 s5, s23, 0xffff -; SI-NEXT: s_lshl_b32 s7, s51, 16 -; SI-NEXT: s_lshl_b32 s76, s77, 16 -; SI-NEXT: s_lshl_b32 s60, s91, 16 -; SI-NEXT: s_mov_b32 s94, s91 -; SI-NEXT: s_mov_b32 s91, s77 -; SI-NEXT: s_or_b32 s77, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s55, 16 +; SI-NEXT: s_or_b32 s81, s5, s7 ; SI-NEXT: s_and_b32 s5, s25, 0xffff -; SI-NEXT: s_lshl_b32 s7, s52, 16 -; SI-NEXT: s_lshl_b32 s78, s79, 16 -; SI-NEXT: s_mov_b32 s92, s79 -; SI-NEXT: s_or_b32 s79, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s73, 16 +; SI-NEXT: s_or_b32 s71, s5, s7 +; SI-NEXT: s_mov_b32 s5, s77 +; SI-NEXT: s_lshr_b64 s[76:77], s[70:71], 16 +; SI-NEXT: s_mov_b32 s77, s5 ; SI-NEXT: s_and_b32 s5, s27, 0xffff -; SI-NEXT: s_lshl_b32 s7, s53, 16 -; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s88, s89, 16 -; SI-NEXT: s_lshl_b32 s58, s93, 16 -; SI-NEXT: s_lshl_b32 s56, s95, 16 -; SI-NEXT: s_mov_b32 s30, s95 -; SI-NEXT: s_mov_b32 s95, s93 -; SI-NEXT: s_mov_b32 s93, s89 -; SI-NEXT: s_or_b32 s89, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s65, 16 +; SI-NEXT: s_or_b32 s69, s5, s7 +; SI-NEXT: s_mov_b32 s5, s39 +; SI-NEXT: s_lshr_b64 s[38:39], s[68:69], 16 +; SI-NEXT: s_mov_b32 s39, s5 ; SI-NEXT: s_and_b32 s5, s29, 0xffff -; SI-NEXT: s_lshl_b32 s7, s54, 16 -; SI-NEXT: s_or_b32 s40, s4, s62 -; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_or_b32 s61, s5, s7 -; SI-NEXT: s_and_b32 s5, s84, 0xffff -; SI-NEXT: s_lshl_b32 s7, s55, 16 -; SI-NEXT: s_or_b32 s14, s4, s72 -; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_or_b32 s59, s5, s7 -; SI-NEXT: s_and_b32 s5, s87, 0xffff -; SI-NEXT: s_lshl_b32 s7, s64, 16 -; SI-NEXT: s_or_b32 s12, s4, s74 -; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_or_b32 s57, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s37, 16 +; SI-NEXT: s_or_b32 s67, s5, s7 +; SI-NEXT: s_mov_b32 s5, s75 +; SI-NEXT: s_lshr_b64 s[74:75], s[66:67], 16 +; SI-NEXT: s_mov_b32 s75, s5 ; SI-NEXT: s_and_b32 s5, s98, 0xffff -; SI-NEXT: s_lshl_b32 s7, s65, 16 -; SI-NEXT: s_or_b32 s10, s4, s76 -; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_or_b32 s47, s5, s7 -; SI-NEXT: s_and_b32 s5, s70, 0xffff -; SI-NEXT: s_lshl_b32 s7, s66, 16 -; SI-NEXT: s_or_b32 s8, s4, s78 -; SI-NEXT: s_and_b32 s4, s26, 0xffff -; SI-NEXT: s_or_b32 s45, s5, s7 -; SI-NEXT: s_and_b32 s5, s81, 0xffff -; SI-NEXT: s_lshl_b32 s7, s67, 16 -; SI-NEXT: s_mov_b32 s15, s73 -; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16 -; SI-NEXT: s_or_b32 s6, s4, s88 -; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_or_b32 s43, s5, s7 -; SI-NEXT: s_and_b32 s5, s85, 0xffff -; SI-NEXT: s_lshl_b32 s7, s68, 16 -; SI-NEXT: s_mov_b32 s41, s63 -; SI-NEXT: s_lshr_b64 s[62:63], s[62:63], 16 -; SI-NEXT: s_mov_b32 s73, s11 -; SI-NEXT: s_mov_b32 s13, s75 -; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16 -; SI-NEXT: s_mov_b32 s11, s77 -; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16 -; SI-NEXT: s_or_b32 s4, s4, s60 +; SI-NEXT: s_lshl_b32 s7, s11, 16 +; SI-NEXT: s_lshl_b32 s52, s79, 16 +; SI-NEXT: v_writelane_b32 v27, s78, 13 +; SI-NEXT: s_mov_b32 s97, s79 +; SI-NEXT: s_lshr_b64 s[78:79], s[80:81], 16 +; SI-NEXT: s_mov_b32 s80, s13 +; SI-NEXT: s_mov_b32 s13, s65 +; SI-NEXT: s_or_b32 s65, s5, s7 +; SI-NEXT: s_and_b32 s5, s89, 0xffff +; SI-NEXT: s_lshl_b32 s7, s77, 16 +; SI-NEXT: v_writelane_b32 v27, s78, 1 +; SI-NEXT: s_mov_b32 s68, s11 +; SI-NEXT: s_mov_b32 s11, s55 +; SI-NEXT: s_or_b32 s55, s5, s7 +; SI-NEXT: s_and_b32 s5, s45, 0xffff +; SI-NEXT: s_lshl_b32 s7, s80, 16 +; SI-NEXT: s_or_b32 s12, s4, s54 +; SI-NEXT: v_writelane_b32 v27, s79, 2 +; SI-NEXT: s_lshr_b64 s[78:79], s[54:55], 16 +; SI-NEXT: s_mov_b32 s54, s53 +; SI-NEXT: s_or_b32 s53, s5, s7 +; SI-NEXT: s_lshl_b32 vcc_lo, s93, 16 +; SI-NEXT: s_mov_b32 s5, s93 +; SI-NEXT: s_lshr_b64 s[92:93], s[52:53], 16 +; SI-NEXT: s_and_b32 s4, s91, 0xffff +; SI-NEXT: s_mov_b32 s93, s5 +; SI-NEXT: s_and_b32 s5, s47, 0xffff +; SI-NEXT: s_lshl_b32 s7, s39, 16 +; SI-NEXT: s_or_b32 s10, s4, s52 +; SI-NEXT: s_lshl_b32 s50, s14, 16 +; SI-NEXT: s_mov_b32 s84, s15 +; SI-NEXT: s_mov_b32 s52, s51 +; SI-NEXT: s_or_b32 s51, s5, s7 +; SI-NEXT: s_and_b32 s4, s94, 0xffff +; SI-NEXT: s_mov_b32 s9, s48 +; SI-NEXT: s_lshl_b32 s48, s90, 16 +; SI-NEXT: s_mov_b32 s36, s91 +; SI-NEXT: s_mov_b32 s35, s90 +; SI-NEXT: s_lshr_b64 s[90:91], s[50:51], 16 +; SI-NEXT: s_and_b32 s5, s95, 0xffff +; SI-NEXT: s_lshl_b32 s7, s84, 16 +; SI-NEXT: s_or_b32 s8, s4, s50 +; SI-NEXT: v_writelane_b32 v27, s90, 3 +; SI-NEXT: s_mov_b32 s50, s49 +; SI-NEXT: s_or_b32 s49, s5, s7 +; SI-NEXT: v_writelane_b32 v27, s91, 4 +; SI-NEXT: s_lshr_b64 s[90:91], s[48:49], 16 +; SI-NEXT: s_and_b32 s5, s31, 0xffff +; SI-NEXT: s_lshl_b32 s7, s75, 16 +; SI-NEXT: v_writelane_b32 v27, s90, 5 ; SI-NEXT: s_or_b32 vcc_hi, s5, s7 -; SI-NEXT: s_mov_b32 s63, s9 -; SI-NEXT: s_mov_b32 s75, s90 -; SI-NEXT: s_mov_b32 s77, s91 -; SI-NEXT: s_mov_b32 s9, s79 -; SI-NEXT: s_lshr_b64 s[78:79], s[78:79], 16 -; SI-NEXT: s_mov_b32 s7, s89 -; SI-NEXT: s_lshr_b64 s[88:89], s[88:89], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 16 -; SI-NEXT: s_and_b32 s60, s86, 0xffff -; SI-NEXT: s_mov_b32 s79, s92 -; SI-NEXT: s_mov_b32 s89, s93 -; SI-NEXT: s_or_b32 s60, s60, s58 -; SI-NEXT: s_lshr_b64 s[92:93], s[58:59], 16 -; SI-NEXT: s_and_b32 s58, s97, 0xffff -; SI-NEXT: s_lshl_b32 s46, s31, 16 -; SI-NEXT: s_mov_b32 s91, s94 -; SI-NEXT: s_mov_b32 s93, s95 -; SI-NEXT: s_or_b32 s58, s58, s56 -; SI-NEXT: s_lshr_b64 s[94:95], s[56:57], 16 -; SI-NEXT: s_and_b32 s56, s69, 0xffff -; SI-NEXT: s_lshl_b32 s44, s71, 16 -; SI-NEXT: s_mov_b32 s95, s30 -; SI-NEXT: s_or_b32 s56, s56, s46 -; SI-NEXT: s_mov_b32 s34, s31 -; SI-NEXT: s_lshr_b64 s[30:31], s[46:47], 16 -; SI-NEXT: s_and_b32 s46, s80, 0xffff -; SI-NEXT: s_lshl_b32 s42, s82, 16 -; SI-NEXT: s_mov_b32 s31, s34 -; SI-NEXT: s_or_b32 s46, s46, s44 -; SI-NEXT: s_lshr_b64 s[34:35], s[44:45], 16 -; SI-NEXT: s_and_b32 s44, s83, 0xffff -; SI-NEXT: s_lshl_b32 vcc_lo, s96, 16 -; SI-NEXT: s_or_b32 s44, s44, s42 -; SI-NEXT: s_lshr_b64 s[36:37], s[42:43], 16 -; SI-NEXT: s_and_b32 s42, s99, 0xffff -; SI-NEXT: s_mov_b32 s5, s61 -; SI-NEXT: s_mov_b32 s61, s59 -; SI-NEXT: s_mov_b32 s59, s57 -; SI-NEXT: s_mov_b32 s57, s47 -; SI-NEXT: s_mov_b32 s47, s45 -; SI-NEXT: s_mov_b32 s45, s43 -; SI-NEXT: s_or_b32 s42, s42, vcc_lo -; SI-NEXT: s_mov_b32 s43, vcc_hi -; SI-NEXT: s_lshr_b64 s[38:39], vcc, 16 +; SI-NEXT: v_writelane_b32 v27, s91, 6 +; SI-NEXT: s_lshr_b64 s[90:91], vcc, 16 +; SI-NEXT: s_and_b32 s4, s30, 0xffff +; SI-NEXT: v_writelane_b32 v27, s90, 7 +; SI-NEXT: s_or_b32 s6, s4, s48 +; SI-NEXT: s_and_b32 s4, s34, 0xffff +; SI-NEXT: s_mov_b32 s66, s14 +; SI-NEXT: s_lshr_b64 s[14:15], s[64:65], 16 +; SI-NEXT: v_writelane_b32 v27, s91, 8 +; SI-NEXT: s_or_b32 s4, s4, vcc_lo +; SI-NEXT: s_mov_b32 s15, s45 +; SI-NEXT: s_mov_b32 s82, s41 +; SI-NEXT: s_mov_b32 s48, s9 +; SI-NEXT: s_mov_b32 s70, s43 +; SI-NEXT: s_mov_b32 s61, s87 +; SI-NEXT: s_mov_b32 s59, s85 +; SI-NEXT: s_mov_b32 s57, s83 +; SI-NEXT: s_mov_b32 s47, s81 +; SI-NEXT: s_mov_b32 s45, s71 +; SI-NEXT: s_mov_b32 s43, s69 +; SI-NEXT: s_mov_b32 s41, s67 +; SI-NEXT: s_mov_b32 s79, s97 +; SI-NEXT: s_mov_b32 s97, s65 +; SI-NEXT: s_mov_b32 s65, s13 +; SI-NEXT: s_mov_b32 s64, s72 +; SI-NEXT: s_mov_b32 s72, s99 +; SI-NEXT: s_mov_b32 s13, s55 +; SI-NEXT: s_mov_b32 s55, s11 +; SI-NEXT: s_mov_b32 s11, s53 +; SI-NEXT: s_mov_b32 s53, s54 +; SI-NEXT: s_mov_b32 s54, s62 +; SI-NEXT: s_mov_b32 s62, s86 +; SI-NEXT: s_mov_b32 s86, s14 +; SI-NEXT: s_mov_b32 s14, s66 +; SI-NEXT: s_mov_b32 s66, s78 +; SI-NEXT: s_mov_b32 s9, s51 +; SI-NEXT: s_mov_b32 s51, s52 +; SI-NEXT: s_mov_b32 s52, s88 +; SI-NEXT: v_readlane_b32 s78, v27, 13 +; SI-NEXT: s_mov_b32 s90, s35 +; SI-NEXT: v_readlane_b32 s88, v27, 12 +; SI-NEXT: s_mov_b32 s91, s36 +; SI-NEXT: s_mov_b32 s7, s49 +; SI-NEXT: s_mov_b32 s49, s50 +; SI-NEXT: v_readlane_b32 s50, v27, 11 +; SI-NEXT: v_readlane_b32 s35, v27, 10 +; SI-NEXT: v_readlane_b32 s36, v27, 9 +; SI-NEXT: s_mov_b32 s5, vcc_hi ; SI-NEXT: s_cbranch_execnz .LBB57_3 ; SI-NEXT: .LBB57_2: ; %cmp.true -; SI-NEXT: s_add_i32 s99, s99, 3 -; SI-NEXT: s_and_b32 s4, s99, 0xffff -; SI-NEXT: s_lshl_b32 s5, s96, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s85, s85, 3 -; SI-NEXT: s_add_i32 s42, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s85, 0xffff -; SI-NEXT: s_lshl_b32 s5, s68, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s83, s83, 3 -; SI-NEXT: s_add_i32 s43, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s83, 0xffff -; SI-NEXT: s_lshl_b32 s5, s82, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s81, s81, 3 -; SI-NEXT: s_add_i32 s44, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s81, 0xffff -; SI-NEXT: s_lshl_b32 s5, s67, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s80, s80, 3 -; SI-NEXT: s_add_i32 s45, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s80, 0xffff -; SI-NEXT: s_lshl_b32 s5, s71, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s70, s70, 3 -; SI-NEXT: s_add_i32 s46, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s70, 0xffff -; SI-NEXT: s_lshl_b32 s5, s66, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s69, s69, 3 -; SI-NEXT: s_add_i32 s47, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s69, 0xffff -; SI-NEXT: s_lshl_b32 s5, s31, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s98, s98, 3 -; SI-NEXT: s_add_i32 s56, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s98, 0xffff -; SI-NEXT: s_lshl_b32 s5, s65, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s97, s97, 3 -; SI-NEXT: s_add_i32 s57, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s97, 0xffff -; SI-NEXT: s_lshl_b32 s5, s95, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s87, s87, 3 -; SI-NEXT: s_add_i32 s58, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s87, 0xffff -; SI-NEXT: s_lshl_b32 s5, s64, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s86, s86, 3 -; SI-NEXT: s_add_i32 s59, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s86, 0xffff +; SI-NEXT: s_add_i32 s34, s34, 3 +; SI-NEXT: s_and_b32 s4, s34, 0xffff ; SI-NEXT: s_lshl_b32 s5, s93, 16 +; SI-NEXT: s_add_i32 s31, s31, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s84, s84, 3 -; SI-NEXT: s_add_i32 s60, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s84, 0xffff -; SI-NEXT: s_lshl_b32 s5, s55, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_and_b32 s5, s31, 0xffff +; SI-NEXT: s_lshl_b32 s6, s75, 16 +; SI-NEXT: s_add_i32 s30, s30, 3 +; SI-NEXT: s_or_b32 s5, s6, s5 +; SI-NEXT: s_and_b32 s6, s30, 0xffff +; SI-NEXT: s_lshl_b32 s7, s90, 16 +; SI-NEXT: s_add_i32 s95, s95, 3 +; SI-NEXT: s_or_b32 s6, s7, s6 +; SI-NEXT: s_and_b32 s7, s95, 0xffff +; SI-NEXT: s_lshl_b32 s8, s84, 16 +; SI-NEXT: s_add_i32 s94, s94, 3 +; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_and_b32 s8, s94, 0xffff +; SI-NEXT: s_lshl_b32 s9, s14, 16 +; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: v_readlane_b32 s9, v27, 0 +; SI-NEXT: s_add_i32 s93, s9, 3 +; SI-NEXT: s_and_b32 s9, s93, 0xffff +; SI-NEXT: s_lshl_b32 s10, s39, 16 +; SI-NEXT: s_add_i32 s92, s91, 3 +; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: s_and_b32 s10, s92, 0xffff +; SI-NEXT: s_lshl_b32 s11, s79, 16 +; SI-NEXT: s_add_i32 s91, s15, 3 +; SI-NEXT: s_or_b32 s10, s11, s10 +; SI-NEXT: s_and_b32 s11, s91, 0xffff +; SI-NEXT: s_lshl_b32 s12, s80, 16 +; SI-NEXT: s_add_i32 s90, s88, 3 +; SI-NEXT: s_or_b32 s11, s12, s11 +; SI-NEXT: s_and_b32 s12, s90, 0xffff +; SI-NEXT: s_lshl_b32 s13, s72, 16 +; SI-NEXT: s_add_i32 s89, s89, 3 +; SI-NEXT: s_or_b32 s12, s13, s12 +; SI-NEXT: s_and_b32 s13, s89, 0xffff +; SI-NEXT: s_lshl_b32 s14, s77, 16 +; SI-NEXT: s_add_i32 s88, s78, 3 +; SI-NEXT: s_or_b32 s13, s14, s13 +; SI-NEXT: s_and_b32 s14, s88, 0xffff +; SI-NEXT: s_lshl_b32 s15, s62, 16 +; SI-NEXT: s_add_i32 s79, s98, 3 +; SI-NEXT: s_or_b32 s14, s15, s14 +; SI-NEXT: s_and_b32 s15, s79, 0xffff +; SI-NEXT: s_lshl_b32 s40, s68, 16 ; SI-NEXT: s_add_i32 s28, s28, 3 -; SI-NEXT: s_add_i32 s61, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s5, s91, 16 +; SI-NEXT: s_or_b32 s15, s40, s15 +; SI-NEXT: s_and_b32 s28, s28, 0xffff +; SI-NEXT: s_lshl_b32 s40, s36, 16 +; SI-NEXT: s_or_b32 s28, s40, s28 ; SI-NEXT: s_add_i32 s29, s29, 3 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s29, 0xffff -; SI-NEXT: s_lshl_b32 s6, s54, 16 +; SI-NEXT: s_add_i32 s40, s28, 0x30000 +; SI-NEXT: s_and_b32 s28, s29, 0xffff +; SI-NEXT: s_lshl_b32 s29, s37, 16 +; SI-NEXT: s_or_b32 s28, s29, s28 ; SI-NEXT: s_add_i32 s26, s26, 3 -; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s26, 0xffff -; SI-NEXT: s_lshl_b32 s7, s89, 16 +; SI-NEXT: s_add_i32 s41, s28, 0x30000 +; SI-NEXT: s_and_b32 s26, s26, 0xffff +; SI-NEXT: s_lshl_b32 s28, s50, 16 +; SI-NEXT: s_or_b32 s26, s28, s26 ; SI-NEXT: s_add_i32 s27, s27, 3 -; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s27, 0xffff -; SI-NEXT: s_lshl_b32 s8, s53, 16 +; SI-NEXT: s_add_i32 s42, s26, 0x30000 +; SI-NEXT: s_and_b32 s26, s27, 0xffff +; SI-NEXT: s_lshl_b32 s27, s65, 16 +; SI-NEXT: s_or_b32 s26, s27, s26 ; SI-NEXT: s_add_i32 s24, s24, 3 -; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s24, 0xffff -; SI-NEXT: s_lshl_b32 s9, s79, 16 +; SI-NEXT: s_add_i32 s43, s26, 0x30000 +; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s26, s49, 16 +; SI-NEXT: s_or_b32 s24, s26, s24 ; SI-NEXT: s_add_i32 s25, s25, 3 -; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s25, 0xffff -; SI-NEXT: s_lshl_b32 s10, s52, 16 +; SI-NEXT: s_add_i32 s44, s24, 0x30000 +; SI-NEXT: s_and_b32 s24, s25, 0xffff +; SI-NEXT: s_lshl_b32 s25, s73, 16 +; SI-NEXT: s_or_b32 s24, s25, s24 ; SI-NEXT: s_add_i32 s22, s22, 3 -; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s22, 0xffff -; SI-NEXT: s_lshl_b32 s11, s77, 16 +; SI-NEXT: s_add_i32 s45, s24, 0x30000 +; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s24, s48, 16 +; SI-NEXT: s_or_b32 s22, s24, s22 ; SI-NEXT: s_add_i32 s23, s23, 3 -; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s23, 0xffff -; SI-NEXT: s_lshl_b32 s12, s51, 16 +; SI-NEXT: s_add_i32 s46, s22, 0x30000 +; SI-NEXT: s_and_b32 s22, s23, 0xffff +; SI-NEXT: s_lshl_b32 s23, s55, 16 +; SI-NEXT: s_or_b32 s22, s23, s22 ; SI-NEXT: s_add_i32 s20, s20, 3 -; SI-NEXT: s_or_b32 s11, s12, s11 -; SI-NEXT: s_and_b32 s12, s20, 0xffff -; SI-NEXT: s_lshl_b32 s13, s75, 16 +; SI-NEXT: s_add_i32 s47, s22, 0x30000 +; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s22, s70, 16 +; SI-NEXT: s_or_b32 s20, s22, s20 ; SI-NEXT: s_add_i32 s21, s21, 3 -; SI-NEXT: s_or_b32 s12, s13, s12 -; SI-NEXT: s_and_b32 s13, s21, 0xffff -; SI-NEXT: s_lshl_b32 s14, s50, 16 +; SI-NEXT: s_add_i32 s56, s20, 0x30000 +; SI-NEXT: s_and_b32 s20, s21, 0xffff +; SI-NEXT: s_lshl_b32 s21, s63, 16 +; SI-NEXT: s_or_b32 s20, s21, s20 ; SI-NEXT: s_add_i32 s18, s18, 3 -; SI-NEXT: s_or_b32 s13, s14, s13 -; SI-NEXT: s_and_b32 s14, s18, 0xffff -; SI-NEXT: s_lshl_b32 s15, s73, 16 +; SI-NEXT: s_add_i32 s57, s20, 0x30000 +; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s20, s82, 16 +; SI-NEXT: s_or_b32 s18, s20, s18 ; SI-NEXT: s_add_i32 s19, s19, 3 -; SI-NEXT: s_or_b32 s14, s15, s14 -; SI-NEXT: s_and_b32 s15, s19, 0xffff -; SI-NEXT: s_lshl_b32 s18, s49, 16 +; SI-NEXT: s_add_i32 s58, s18, 0x30000 +; SI-NEXT: s_and_b32 s18, s19, 0xffff +; SI-NEXT: s_lshl_b32 s19, s53, 16 +; SI-NEXT: s_add_i32 s96, s14, 0x30000 +; SI-NEXT: s_add_i32 s97, s15, 0x30000 +; SI-NEXT: s_or_b32 s18, s19, s18 ; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_or_b32 s15, s18, s15 +; SI-NEXT: s_lshr_b64 s[14:15], s[46:47], 16 +; SI-NEXT: s_add_i32 s8, s8, 0x30000 +; SI-NEXT: s_add_i32 s9, s9, 0x30000 +; SI-NEXT: s_add_i32 s59, s18, 0x30000 ; SI-NEXT: s_and_b32 s16, s16, 0xffff -; SI-NEXT: s_lshl_b32 s18, s63, 16 +; SI-NEXT: s_lshl_b32 s18, s35, 16 +; SI-NEXT: v_writelane_b32 v27, s14, 1 ; SI-NEXT: s_or_b32 s16, s18, s16 ; SI-NEXT: s_add_i32 s17, s17, 3 -; SI-NEXT: s_add_i32 s40, s16, 0x30000 +; SI-NEXT: v_writelane_b32 v27, s15, 2 +; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 16 +; SI-NEXT: s_add_i32 s6, s6, 0x30000 +; SI-NEXT: s_add_i32 s7, s7, 0x30000 +; SI-NEXT: s_add_i32 s60, s16, 0x30000 ; SI-NEXT: s_and_b32 s16, s17, 0xffff -; SI-NEXT: s_lshl_b32 s17, s48, 16 +; SI-NEXT: s_lshl_b32 s17, s51, 16 +; SI-NEXT: v_writelane_b32 v27, s14, 3 ; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: v_writelane_b32 v27, s15, 4 +; SI-NEXT: s_lshr_b64 s[14:15], s[6:7], 16 ; SI-NEXT: s_add_i32 s4, s4, 0x30000 ; SI-NEXT: s_add_i32 s5, s5, 0x30000 -; SI-NEXT: s_add_i32 s6, s6, 0x30000 -; SI-NEXT: s_add_i32 s7, s7, 0x30000 -; SI-NEXT: s_add_i32 s8, s8, 0x30000 -; SI-NEXT: s_add_i32 s9, s9, 0x30000 +; SI-NEXT: s_add_i32 s61, s16, 0x30000 +; SI-NEXT: v_writelane_b32 v27, s14, 5 ; SI-NEXT: s_add_i32 s10, s10, 0x30000 ; SI-NEXT: s_add_i32 s11, s11, 0x30000 ; SI-NEXT: s_add_i32 s12, s12, 0x30000 ; SI-NEXT: s_add_i32 s13, s13, 0x30000 -; SI-NEXT: s_add_i32 s14, s14, 0x30000 -; SI-NEXT: s_add_i32 s15, s15, 0x30000 -; SI-NEXT: s_add_i32 s41, s16, 0x30000 -; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[60:61], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[58:59], 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[56:57], 16 -; SI-NEXT: s_lshr_b64 s[34:35], s[46:47], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[52:53], s[60:61], 16 +; SI-NEXT: s_lshr_b64 s[54:55], s[58:59], 16 +; SI-NEXT: s_lshr_b64 s[64:65], s[56:57], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[44:45], 16 ; SI-NEXT: s_lshr_b64 s[38:39], s[42:43], 16 -; SI-NEXT: s_lshr_b32 s48, s41, 16 -; SI-NEXT: s_lshr_b32 s49, s15, 16 -; SI-NEXT: s_lshr_b32 s50, s13, 16 -; SI-NEXT: s_lshr_b32 s51, s11, 16 -; SI-NEXT: s_lshr_b32 s52, s9, 16 -; SI-NEXT: s_lshr_b32 s53, s7, 16 -; SI-NEXT: s_lshr_b32 s54, s5, 16 -; SI-NEXT: s_lshr_b32 s55, s61, 16 -; SI-NEXT: s_lshr_b32 s64, s59, 16 -; SI-NEXT: s_lshr_b32 s65, s57, 16 -; SI-NEXT: s_lshr_b32 s66, s47, 16 -; SI-NEXT: s_lshr_b32 s67, s45, 16 -; SI-NEXT: s_lshr_b32 s68, s43, 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16 +; SI-NEXT: v_writelane_b32 v27, s15, 6 +; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[86:87], s[96:97], 16 +; SI-NEXT: s_lshr_b64 s[66:67], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[10:11], 16 +; SI-NEXT: v_writelane_b32 v27, s14, 7 +; SI-NEXT: s_lshr_b32 s51, s61, 16 +; SI-NEXT: s_lshr_b32 s53, s59, 16 +; SI-NEXT: s_lshr_b32 s63, s57, 16 +; SI-NEXT: s_lshr_b32 s55, s47, 16 +; SI-NEXT: s_lshr_b32 s73, s45, 16 +; SI-NEXT: s_lshr_b32 s65, s43, 16 +; SI-NEXT: s_lshr_b32 s37, s41, 16 +; SI-NEXT: s_lshr_b32 s68, s97, 16 +; SI-NEXT: s_lshr_b32 s77, s13, 16 +; SI-NEXT: s_lshr_b32 s80, s11, 16 +; SI-NEXT: s_lshr_b32 s39, s9, 16 +; SI-NEXT: s_lshr_b32 s84, s7, 16 +; SI-NEXT: s_lshr_b32 s75, s5, 16 +; SI-NEXT: v_writelane_b32 v27, s15, 8 ; SI-NEXT: .LBB57_3: ; %end -; SI-NEXT: s_and_b32 s16, s40, 0xffff -; SI-NEXT: s_lshl_b32 s17, s62, 16 +; SI-NEXT: s_and_b32 s16, s60, 0xffff +; SI-NEXT: s_lshl_b32 s17, s52, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s41, 0xffff -; SI-NEXT: s_lshl_b32 s18, s48, 16 -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s18, s72, 16 -; SI-NEXT: s_or_b32 s14, s14, s18 -; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s18, s49, 16 -; SI-NEXT: s_or_b32 s15, s15, s18 -; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s18, s74, 16 -; SI-NEXT: s_or_b32 s12, s12, s18 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s18, s50, 16 -; SI-NEXT: s_or_b32 s13, s13, s18 -; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s18, s76, 16 -; SI-NEXT: s_or_b32 s10, s10, s18 -; SI-NEXT: s_and_b32 s11, s11, 0xffff +; SI-NEXT: s_and_b32 s17, s61, 0xffff ; SI-NEXT: s_lshl_b32 s18, s51, 16 -; SI-NEXT: s_or_b32 s11, s11, s18 -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s18, s78, 16 -; SI-NEXT: s_or_b32 s8, s8, s18 -; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s18, s52, 16 -; SI-NEXT: s_or_b32 s9, s9, s18 -; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s18, s88, 16 -; SI-NEXT: s_or_b32 s6, s6, s18 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s18, s53, 16 -; SI-NEXT: s_or_b32 s7, s7, s18 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s18, s90, 16 -; SI-NEXT: s_or_b32 s4, s4, s18 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s18, s54, 16 -; SI-NEXT: s_or_b32 s5, s5, s18 -; SI-NEXT: s_and_b32 s18, s60, 0xffff -; SI-NEXT: s_lshl_b32 s19, s92, 16 +; SI-NEXT: s_or_b32 s17, s17, s18 +; SI-NEXT: s_and_b32 s18, s58, 0xffff +; SI-NEXT: s_lshl_b32 s19, s54, 16 ; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_and_b32 s19, s61, 0xffff -; SI-NEXT: s_lshl_b32 s20, s55, 16 +; SI-NEXT: s_and_b32 s19, s59, 0xffff +; SI-NEXT: s_lshl_b32 s20, s53, 16 ; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_and_b32 s20, s58, 0xffff -; SI-NEXT: s_lshl_b32 s21, s94, 16 +; SI-NEXT: s_and_b32 s20, s56, 0xffff +; SI-NEXT: s_lshl_b32 s21, s64, 16 ; SI-NEXT: s_or_b32 s20, s20, s21 -; SI-NEXT: s_and_b32 s21, s59, 0xffff -; SI-NEXT: s_lshl_b32 s22, s64, 16 +; SI-NEXT: s_and_b32 s21, s57, 0xffff +; SI-NEXT: s_lshl_b32 s22, s63, 16 +; SI-NEXT: v_readlane_b32 s14, v27, 1 ; SI-NEXT: s_or_b32 s21, s21, s22 -; SI-NEXT: s_and_b32 s22, s56, 0xffff -; SI-NEXT: s_lshl_b32 s23, s30, 16 +; SI-NEXT: s_and_b32 s22, s46, 0xffff +; SI-NEXT: s_lshl_b32 s23, s14, 16 ; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_and_b32 s23, s57, 0xffff -; SI-NEXT: s_lshl_b32 s24, s65, 16 +; SI-NEXT: s_and_b32 s23, s47, 0xffff +; SI-NEXT: s_lshl_b32 s24, s55, 16 ; SI-NEXT: s_or_b32 s23, s23, s24 -; SI-NEXT: s_and_b32 s24, s46, 0xffff -; SI-NEXT: s_lshl_b32 s25, s34, 16 +; SI-NEXT: s_and_b32 s24, s44, 0xffff +; SI-NEXT: s_lshl_b32 s25, s76, 16 ; SI-NEXT: s_or_b32 s24, s24, s25 -; SI-NEXT: s_and_b32 s25, s47, 0xffff -; SI-NEXT: s_lshl_b32 s26, s66, 16 +; SI-NEXT: s_and_b32 s25, s45, 0xffff +; SI-NEXT: s_lshl_b32 s26, s73, 16 ; SI-NEXT: s_or_b32 s25, s25, s26 -; SI-NEXT: s_and_b32 s26, s44, 0xffff -; SI-NEXT: s_lshl_b32 s27, s36, 16 +; SI-NEXT: s_and_b32 s26, s42, 0xffff +; SI-NEXT: s_lshl_b32 s27, s38, 16 ; SI-NEXT: s_or_b32 s26, s26, s27 -; SI-NEXT: s_and_b32 s27, s45, 0xffff -; SI-NEXT: s_lshl_b32 s28, s67, 16 +; SI-NEXT: s_and_b32 s27, s43, 0xffff +; SI-NEXT: s_lshl_b32 s28, s65, 16 ; SI-NEXT: s_or_b32 s27, s27, s28 -; SI-NEXT: s_and_b32 s28, s42, 0xffff -; SI-NEXT: s_lshl_b32 s29, s38, 16 +; SI-NEXT: s_and_b32 s28, s40, 0xffff +; SI-NEXT: s_lshl_b32 s29, s74, 16 ; SI-NEXT: s_or_b32 s28, s28, s29 -; SI-NEXT: s_and_b32 s29, s43, 0xffff -; SI-NEXT: s_lshl_b32 s40, s68, 16 +; SI-NEXT: s_and_b32 s29, s41, 0xffff +; SI-NEXT: s_lshl_b32 s40, s37, 16 +; SI-NEXT: v_readlane_b32 s15, v27, 2 ; SI-NEXT: s_or_b32 s29, s29, s40 +; SI-NEXT: s_and_b32 s14, s96, 0xffff +; SI-NEXT: s_lshl_b32 s40, s86, 16 +; SI-NEXT: s_or_b32 s14, s14, s40 +; SI-NEXT: s_and_b32 s15, s97, 0xffff +; SI-NEXT: s_lshl_b32 s40, s68, 16 +; SI-NEXT: s_or_b32 s15, s15, s40 +; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: s_lshl_b32 s40, s66, 16 +; SI-NEXT: s_or_b32 s12, s12, s40 +; SI-NEXT: s_and_b32 s13, s13, 0xffff +; SI-NEXT: s_lshl_b32 s40, s77, 16 +; SI-NEXT: s_or_b32 s13, s13, s40 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_lshl_b32 s40, s92, 16 +; SI-NEXT: s_or_b32 s10, s10, s40 +; SI-NEXT: s_and_b32 s11, s11, 0xffff +; SI-NEXT: s_lshl_b32 s40, s80, 16 +; SI-NEXT: s_or_b32 s11, s11, s40 +; SI-NEXT: v_readlane_b32 s40, v27, 3 +; SI-NEXT: s_and_b32 s8, s8, 0xffff +; SI-NEXT: s_lshl_b32 s40, s40, 16 +; SI-NEXT: v_readlane_b32 s41, v27, 4 +; SI-NEXT: s_or_b32 s8, s8, s40 +; SI-NEXT: s_and_b32 s9, s9, 0xffff +; SI-NEXT: s_lshl_b32 s40, s39, 16 +; SI-NEXT: s_or_b32 s9, s9, s40 +; SI-NEXT: v_readlane_b32 s40, v27, 5 +; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_lshl_b32 s40, s40, 16 +; SI-NEXT: v_readlane_b32 s41, v27, 6 +; SI-NEXT: s_or_b32 s6, s6, s40 +; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_lshl_b32 s40, s84, 16 +; SI-NEXT: s_or_b32 s7, s7, s40 +; SI-NEXT: v_readlane_b32 s40, v27, 7 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: s_lshl_b32 s40, s40, 16 +; SI-NEXT: s_or_b32 s4, s4, s40 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_lshl_b32 s40, s75, 16 +; SI-NEXT: s_or_b32 s5, s5, s40 ; SI-NEXT: v_readlane_b32 s30, v26, 34 +; SI-NEXT: v_readlane_b32 s41, v27, 8 ; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v2, s14 -; SI-NEXT: v_mov_b32_e32 v3, s15 -; SI-NEXT: v_mov_b32_e32 v4, s12 -; SI-NEXT: v_mov_b32_e32 v5, s13 -; SI-NEXT: v_mov_b32_e32 v6, s10 -; SI-NEXT: v_mov_b32_e32 v7, s11 -; SI-NEXT: v_mov_b32_e32 v8, s8 -; SI-NEXT: v_mov_b32_e32 v9, s9 -; SI-NEXT: v_mov_b32_e32 v10, s6 -; SI-NEXT: v_mov_b32_e32 v11, s7 -; SI-NEXT: v_mov_b32_e32 v12, s4 -; SI-NEXT: v_mov_b32_e32 v13, s5 -; SI-NEXT: v_mov_b32_e32 v14, s18 -; SI-NEXT: v_mov_b32_e32 v15, s19 -; SI-NEXT: v_mov_b32_e32 v16, s20 -; SI-NEXT: v_mov_b32_e32 v17, s21 -; SI-NEXT: v_mov_b32_e32 v18, s22 -; SI-NEXT: v_mov_b32_e32 v19, s23 -; SI-NEXT: v_mov_b32_e32 v20, s24 -; SI-NEXT: v_mov_b32_e32 v21, s25 -; SI-NEXT: v_mov_b32_e32 v22, s26 -; SI-NEXT: v_mov_b32_e32 v23, s27 -; SI-NEXT: v_mov_b32_e32 v24, s28 -; SI-NEXT: v_mov_b32_e32 v25, s29 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v4, s20 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v6, s22 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v8, s24 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v10, s26 +; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v12, s28 +; SI-NEXT: v_mov_b32_e32 v13, s29 +; SI-NEXT: v_mov_b32_e32 v14, s14 +; SI-NEXT: v_mov_b32_e32 v15, s15 +; SI-NEXT: v_mov_b32_e32 v16, s12 +; SI-NEXT: v_mov_b32_e32 v17, s13 +; SI-NEXT: v_mov_b32_e32 v18, s10 +; SI-NEXT: v_mov_b32_e32 v19, s11 +; SI-NEXT: v_mov_b32_e32 v20, s8 +; SI-NEXT: v_mov_b32_e32 v21, s9 +; SI-NEXT: v_mov_b32_e32 v22, s6 +; SI-NEXT: v_mov_b32_e32 v23, s7 +; SI-NEXT: v_mov_b32_e32 v24, s4 +; SI-NEXT: v_mov_b32_e32 v25, s5 ; SI-NEXT: v_readlane_b32 s31, v26, 35 ; SI-NEXT: v_readlane_b32 s99, v26, 33 ; SI-NEXT: v_readlane_b32 s98, v26, 32 @@ -40666,36 +40721,45 @@ define inreg <52 x half> @bitcast_v52i16_to_v52f16_scalar(<52 x i16> inreg %a, i ; SI-NEXT: v_readlane_b32 s34, v26, 0 ; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB57_4: -; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr10 -; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr78 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr88 ; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $vcc_lo ; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr52 ; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr54 ; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr30 +; SI-NEXT: ; implicit-def: $sgpr64 ; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr36 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr42 ; SI-NEXT: ; implicit-def: $sgpr38 +; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr96 +; SI-NEXT: ; implicit-def: $sgpr86 +; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr66 +; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: v_writelane_b32 v27, s4, 1 +; SI-NEXT: v_writelane_b32 v27, s5, 2 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v27, s4, 3 +; SI-NEXT: v_writelane_b32 v27, s5, 4 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v27, s4, 5 +; SI-NEXT: v_writelane_b32 v27, s5, 6 +; SI-NEXT: v_writelane_b32 v27, vcc_lo, 7 +; SI-NEXT: v_writelane_b32 v27, vcc_hi, 8 +; SI-NEXT: ; implicit-def: $sgpr4 ; SI-NEXT: s_branch .LBB57_2 ; ; VI-LABEL: bitcast_v52i16_to_v52f16_scalar: @@ -42453,16 +42517,16 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_readfirstlane_b32 s43, v11 -; SI-NEXT: v_readfirstlane_b32 s57, v10 -; SI-NEXT: v_readfirstlane_b32 s41, v9 -; SI-NEXT: v_readfirstlane_b32 s60, v8 -; SI-NEXT: v_readfirstlane_b32 s40, v7 -; SI-NEXT: v_readfirstlane_b32 s63, v6 +; SI-NEXT: v_readfirstlane_b32 s46, v11 +; SI-NEXT: v_readfirstlane_b32 s47, v10 +; SI-NEXT: v_readfirstlane_b32 s43, v9 +; SI-NEXT: v_readfirstlane_b32 s59, v8 +; SI-NEXT: v_readfirstlane_b32 s41, v7 +; SI-NEXT: v_readfirstlane_b32 s62, v6 ; SI-NEXT: v_readfirstlane_b32 s15, v5 -; SI-NEXT: v_readfirstlane_b32 s74, v4 +; SI-NEXT: v_readfirstlane_b32 s73, v4 ; SI-NEXT: v_readfirstlane_b32 s14, v3 -; SI-NEXT: v_readfirstlane_b32 s77, v2 +; SI-NEXT: v_readfirstlane_b32 s76, v2 ; SI-NEXT: v_readfirstlane_b32 s13, v1 ; SI-NEXT: v_readfirstlane_b32 s79, v0 ; SI-NEXT: s_lshr_b32 s12, s29, 16 @@ -42479,18 +42543,18 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i ; SI-NEXT: s_lshr_b32 s90, s18, 16 ; SI-NEXT: s_lshr_b32 s6, s17, 16 ; SI-NEXT: s_lshr_b32 s91, s16, 16 -; SI-NEXT: s_lshr_b32 s61, s43, 16 -; SI-NEXT: s_lshr_b32 s44, s57, 16 -; SI-NEXT: s_lshr_b32 s59, s41, 16 -; SI-NEXT: s_lshr_b32 s47, s60, 16 -; SI-NEXT: s_lshr_b32 s56, s40, 16 -; SI-NEXT: s_lshr_b32 s58, s63, 16 -; SI-NEXT: s_lshr_b32 s46, s15, 16 -; SI-NEXT: s_lshr_b32 s62, s74, 16 -; SI-NEXT: s_lshr_b32 s45, s14, 16 -; SI-NEXT: s_lshr_b32 s73, s77, 16 -; SI-NEXT: s_lshr_b32 s42, s13, 16 -; SI-NEXT: s_lshr_b32 s76, s79, 16 +; SI-NEXT: s_lshr_b32 s61, s46, 16 +; SI-NEXT: s_lshr_b32 s44, s47, 16 +; SI-NEXT: s_lshr_b32 s58, s43, 16 +; SI-NEXT: s_lshr_b32 s57, s59, 16 +; SI-NEXT: s_lshr_b32 s56, s41, 16 +; SI-NEXT: s_lshr_b32 s60, s62, 16 +; SI-NEXT: s_lshr_b32 s45, s15, 16 +; SI-NEXT: s_lshr_b32 s63, s73, 16 +; SI-NEXT: s_lshr_b32 s42, s14, 16 +; SI-NEXT: s_lshr_b32 s74, s76, 16 +; SI-NEXT: s_lshr_b32 s40, s13, 16 +; SI-NEXT: s_lshr_b32 s77, s79, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v12 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB59_3 @@ -42508,153 +42572,154 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_or_b32_e32 v34, v1, v0 +; SI-NEXT: v_or_b32_e32 v35, v1, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s89 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v4 -; SI-NEXT: v_or_b32_e32 v35, v3, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s20 +; SI-NEXT: v_or_b32_e32 v36, v3, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s88 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s22 -; SI-NEXT: v_or_b32_e32 v36, v5, v4 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s78 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s22 +; SI-NEXT: v_or_b32_e32 v37, v1, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s78 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s24 -; SI-NEXT: v_or_b32_e32 v37, v1, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s75 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v5 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s26 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_or_b32_e32 v38, v3, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s72 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s28 -; SI-NEXT: v_or_b32_e32 v31, v5, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s24 +; SI-NEXT: v_or_b32_e32 v30, v3, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s75 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s76 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s26 +; SI-NEXT: v_or_b32_e32 v31, v1, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s72 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s79 -; SI-NEXT: v_or_b32_e32 v33, v1, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s73 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s28 +; SI-NEXT: v_or_b32_e32 v32, v3, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s77 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s77 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_or_b32_e32 v32, v3, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s62 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s79 +; SI-NEXT: v_or_b32_e32 v34, v1, v12 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s74 -; SI-NEXT: v_or_b32_e32 v30, v5, v16 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s58 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s76 +; SI-NEXT: v_or_b32_e32 v33, v3, v14 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s63 -; SI-NEXT: v_or_b32_e32 v56, v1, v18 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s47 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v5 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s60 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s73 +; SI-NEXT: v_or_b32_e32 v28, v1, v16 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s60 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_or_b32_e32 v27, v3, v20 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s44 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v1 -; SI-NEXT: v_or_b32_e32 v1, v5, v22 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s61 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s62 +; SI-NEXT: v_or_b32_e32 v29, v3, v18 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s57 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s59 +; SI-NEXT: v_or_b32_e32 v1, v1, v20 ; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v1, s57 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v45, v5 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s43 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s59 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s41 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s44 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s61 +; SI-NEXT: v_or_b32_e32 v3, v3, v22 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v3, s47 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v27, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s46 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s58 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s43 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v47, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v44, v5 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_or_b32_e32 v1, v1, v24 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v27 ; SI-NEXT: v_or_b32_e32 v25, v3, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s56 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v44 ; SI-NEXT: v_or_b32_e32 v23, v5, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s40 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s41 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s46 -; SI-NEXT: v_cvt_f16_f32_e32 v29, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s45 +; SI-NEXT: v_cvt_f16_f32_e32 v46, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v28, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v29 +; SI-NEXT: v_cvt_f16_f32_e32 v47, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v46 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s15 ; SI-NEXT: v_or_b32_e32 v21, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s45 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s42 ; SI-NEXT: v_cvt_f32_f16_e32 v7, s14 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v57, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v56, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v47 ; SI-NEXT: v_or_b32_e32 v19, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s42 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v57 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s40 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v56 ; SI-NEXT: v_or_b32_e32 v17, v3, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s13 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s12 -; SI-NEXT: v_cvt_f16_f32_e32 v59, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v57, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v60, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v59 +; SI-NEXT: v_cvt_f16_f32_e32 v59, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v57 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s29 ; SI-NEXT: v_or_b32_e32 v15, v1, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s11 @@ -42662,42 +42727,42 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v61, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v60, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v60 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v59 ; SI-NEXT: v_or_b32_e32 v13, v5, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v61 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v60 ; SI-NEXT: v_or_b32_e32 v11, v3, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s25 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s9 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v62, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v61, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 -; SI-NEXT: v_cvt_f16_f32_e32 v63, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v62 +; SI-NEXT: v_cvt_f16_f32_e32 v62, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v61 ; SI-NEXT: v_or_b32_e32 v9, v1, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s8 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v62 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v44, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v63, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_or_b32_e32 v7, v5, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v63 ; SI-NEXT: v_cvt_f32_f16_e32 v26, s17 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_or_b32_e32 v5, v3, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 -; SI-NEXT: v_cvt_f16_f32_e32 v46, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v45, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s6 ; SI-NEXT: v_lshr_b64 v[54:55], v[4:5], 16 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 @@ -42706,71 +42771,61 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i ; SI-NEXT: v_cvt_f16_f32_e32 v58, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v26 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v45 ; SI-NEXT: v_or_b32_e32 v3, v3, v26 ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v58 ; SI-NEXT: v_or_b32_e32 v1, v1, v26 -; SI-NEXT: v_lshr_b64 v[40:41], v[2:3], 16 -; SI-NEXT: v_mov_b32_e32 v2, v34 -; SI-NEXT: v_mov_b32_e32 v4, v35 +; SI-NEXT: v_lshr_b64 v[42:43], v[0:1], 16 +; SI-NEXT: v_mov_b32_e32 v0, v35 +; SI-NEXT: v_mov_b32_e32 v4, v36 ; SI-NEXT: v_lshr_b64 v[52:53], v[6:7], 16 -; SI-NEXT: v_mov_b32_e32 v6, v36 +; SI-NEXT: v_mov_b32_e32 v6, v37 ; SI-NEXT: v_lshr_b64 v[50:51], v[8:9], 16 -; SI-NEXT: v_mov_b32_e32 v8, v37 +; SI-NEXT: v_mov_b32_e32 v8, v30 ; SI-NEXT: v_lshr_b64 v[48:49], v[10:11], 16 -; SI-NEXT: v_mov_b32_e32 v10, v38 +; SI-NEXT: v_mov_b32_e32 v10, v31 ; SI-NEXT: v_lshr_b64 v[38:39], v[12:13], 16 -; SI-NEXT: v_mov_b32_e32 v12, v31 +; SI-NEXT: v_mov_b32_e32 v12, v32 ; SI-NEXT: v_lshr_b64 v[36:37], v[14:15], 16 -; SI-NEXT: v_mov_b32_e32 v14, v33 +; SI-NEXT: v_mov_b32_e32 v14, v34 ; SI-NEXT: v_lshr_b64 v[34:35], v[16:17], 16 -; SI-NEXT: v_mov_b32_e32 v16, v32 +; SI-NEXT: v_mov_b32_e32 v16, v33 ; SI-NEXT: v_lshr_b64 v[32:33], v[18:19], 16 -; SI-NEXT: v_mov_b32_e32 v18, v30 +; SI-NEXT: v_mov_b32_e32 v18, v28 ; SI-NEXT: v_lshr_b64 v[30:31], v[20:21], 16 -; SI-NEXT: v_mov_b32_e32 v20, v56 -; SI-NEXT: v_lshr_b64 v[55:56], v[22:23], 16 -; SI-NEXT: v_mov_b32_e32 v22, v27 +; SI-NEXT: v_mov_b32_e32 v20, v29 +; SI-NEXT: v_lshr_b64 v[28:29], v[22:23], 16 +; SI-NEXT: v_mov_b32_e32 v29, v27 ; SI-NEXT: v_lshr_b64 v[26:27], v[24:25], 16 +; SI-NEXT: v_lshr_b64 v[40:41], v[2:3], 16 ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshr_b64 v[42:43], v[0:1], 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_or_b32_e32 v24, v2, v24 ; SI-NEXT: s_branch .LBB59_5 ; SI-NEXT: .LBB59_3: ; SI-NEXT: s_branch .LBB59_2 ; SI-NEXT: .LBB59_4: -; SI-NEXT: v_mov_b32_e32 v45, s61 -; SI-NEXT: v_mov_b32_e32 v47, s59 -; SI-NEXT: v_mov_b32_e32 v29, s56 -; SI-NEXT: v_mov_b32_e32 v28, s46 +; SI-NEXT: v_mov_b32_e32 v29, s61 +; SI-NEXT: v_mov_b32_e32 v44, s58 +; SI-NEXT: v_mov_b32_e32 v46, s56 +; SI-NEXT: v_mov_b32_e32 v47, s45 +; SI-NEXT: v_mov_b32_e32 v56, s42 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_mov_b32_e32 v57, s45 +; SI-NEXT: v_mov_b32_e32 v57, s40 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v59, s42 +; SI-NEXT: v_mov_b32_e32 v59, s12 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_mov_b32_e32 v60, s12 +; SI-NEXT: v_mov_b32_e32 v60, s11 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v61, s11 +; SI-NEXT: v_mov_b32_e32 v61, s10 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v62, s10 +; SI-NEXT: v_mov_b32_e32 v62, s9 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v63, s9 -; SI-NEXT: v_mov_b32_e32 v44, s8 -; SI-NEXT: v_mov_b32_e32 v46, s7 +; SI-NEXT: v_mov_b32_e32 v63, s8 +; SI-NEXT: v_mov_b32_e32 v45, s7 ; SI-NEXT: v_mov_b32_e32 v58, s6 -; SI-NEXT: v_mov_b32_e32 v27, s57 -; SI-NEXT: v_mov_b32_e32 v24, s60 -; SI-NEXT: v_mov_b32_e32 v22, s63 -; SI-NEXT: v_mov_b32_e32 v20, s74 -; SI-NEXT: v_mov_b32_e32 v18, s77 -; SI-NEXT: v_mov_b32_e32 v16, s79 -; SI-NEXT: v_mov_b32_e32 v14, s28 -; SI-NEXT: v_mov_b32_e32 v12, s26 -; SI-NEXT: v_mov_b32_e32 v10, s24 -; SI-NEXT: v_mov_b32_e32 v8, s22 -; SI-NEXT: v_mov_b32_e32 v6, s20 -; SI-NEXT: v_mov_b32_e32 v4, s18 -; SI-NEXT: v_mov_b32_e32 v2, s16 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 @@ -42781,9 +42836,22 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v15, s13 ; SI-NEXT: v_mov_b32_e32 v17, s14 ; SI-NEXT: v_mov_b32_e32 v19, s15 -; SI-NEXT: v_mov_b32_e32 v21, s40 -; SI-NEXT: v_mov_b32_e32 v23, s41 -; SI-NEXT: v_mov_b32_e32 v25, s43 +; SI-NEXT: v_mov_b32_e32 v21, s41 +; SI-NEXT: v_mov_b32_e32 v23, s43 +; SI-NEXT: v_mov_b32_e32 v25, s46 +; SI-NEXT: v_mov_b32_e32 v24, s47 +; SI-NEXT: v_mov_b32_e32 v27, s59 +; SI-NEXT: v_mov_b32_e32 v22, s62 +; SI-NEXT: v_mov_b32_e32 v20, s73 +; SI-NEXT: v_mov_b32_e32 v18, s76 +; SI-NEXT: v_mov_b32_e32 v16, s79 +; SI-NEXT: v_mov_b32_e32 v14, s28 +; SI-NEXT: v_mov_b32_e32 v12, s26 +; SI-NEXT: v_mov_b32_e32 v10, s24 +; SI-NEXT: v_mov_b32_e32 v8, s22 +; SI-NEXT: v_mov_b32_e32 v6, s20 +; SI-NEXT: v_mov_b32_e32 v4, s18 +; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v42, s91 ; SI-NEXT: v_mov_b32_e32 v40, s90 ; SI-NEXT: v_mov_b32_e32 v54, s89 @@ -42791,90 +42859,84 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v50, s78 ; SI-NEXT: v_mov_b32_e32 v48, s75 ; SI-NEXT: v_mov_b32_e32 v38, s72 -; SI-NEXT: v_mov_b32_e32 v36, s76 -; SI-NEXT: v_mov_b32_e32 v34, s73 -; SI-NEXT: v_mov_b32_e32 v32, s62 -; SI-NEXT: v_mov_b32_e32 v30, s58 -; SI-NEXT: v_mov_b32_e32 v55, s47 +; SI-NEXT: v_mov_b32_e32 v36, s77 +; SI-NEXT: v_mov_b32_e32 v34, s74 +; SI-NEXT: v_mov_b32_e32 v32, s63 +; SI-NEXT: v_mov_b32_e32 v30, s60 +; SI-NEXT: v_mov_b32_e32 v28, s57 ; SI-NEXT: v_mov_b32_e32 v26, s44 ; SI-NEXT: .LBB59_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v42 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v42 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v58 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v40 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v40 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v45 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v54 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v54 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v63 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v52 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v52 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v62 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v50 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v50 +; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v62 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v61 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v48 ; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v61 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v60 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v38 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v60 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v59 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v16 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v36 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v59 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v57 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v18 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v34 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v57 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v56 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v20 ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v32 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v47 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v30 ; SI-NEXT: v_or_b32_e32 v20, v20, v22 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v46 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v22, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v55 -; SI-NEXT: v_or_b32_e32 v22, v22, v24 -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v47 -; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v27 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; SI-NEXT: v_or_b32_e32 v24, v24, v26 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v45 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v27 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v28 +; SI-NEXT: v_or_b32_e32 v22, v22, v27 +; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v44 ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -42891,7 +42953,13 @@ define inreg <52 x i16> @bitcast_v52f16_to_v52i16_scalar(<52 x half> inreg %a, i ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 +; SI-NEXT: v_or_b32_e32 v24, v24, v26 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v29 +; SI-NEXT: v_or_b32_e32 v23, v23, v27 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll index 22b1bc3ed9468..315d695001ae2 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll @@ -4362,6 +4362,11 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[28:29], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s30, s5, 16 ; SI-NEXT: s_lshr_b32 s31, s7, 16 ; SI-NEXT: s_lshr_b32 s34, s9, 16 @@ -4376,32 +4381,27 @@ define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b32 s51, s21, 16 ; SI-NEXT: s_lshr_b32 s52, s19, 16 ; SI-NEXT: s_lshr_b32 s53, s17, 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16 ; SI-NEXT: .LBB13_3: ; %end -; SI-NEXT: s_lshl_b32 s43, s92, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s43, s92, 16 ; SI-NEXT: s_or_b32 s16, s16, s43 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s43, s53, 16 ; SI-NEXT: s_or_b32 s17, s17, s43 -; SI-NEXT: s_lshl_b32 s43, s90, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s43, s90, 16 ; SI-NEXT: s_or_b32 s18, s18, s43 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s43, s52, 16 ; SI-NEXT: s_or_b32 s19, s19, s43 -; SI-NEXT: s_lshl_b32 s43, s88, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s43, s88, 16 ; SI-NEXT: s_or_b32 s20, s20, s43 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s43, s51, 16 ; SI-NEXT: s_or_b32 s21, s21, s43 -; SI-NEXT: s_lshl_b32 s43, s78, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s43, s78, 16 ; SI-NEXT: s_or_b32 s22, s22, s43 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s43, s50, 16 @@ -5286,17 +5286,17 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v59 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v26 -; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v25 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v24 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v23 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v22 -; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v21 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v20 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v19 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v18 -; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v17 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v16 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -5357,17 +5357,17 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40 ; SI-NEXT: v_or_b32_e32 v0, v0, v39 -; SI-NEXT: v_or_b32_e32 v1, v1, v38 -; SI-NEXT: v_or_b32_e32 v2, v2, v62 -; SI-NEXT: v_or_b32_e32 v3, v3, v37 -; SI-NEXT: v_or_b32_e32 v4, v4, v32 -; SI-NEXT: v_or_b32_e32 v5, v5, v36 -; SI-NEXT: v_or_b32_e32 v6, v6, v61 -; SI-NEXT: v_or_b32_e32 v7, v7, v35 -; SI-NEXT: v_or_b32_e32 v8, v8, v60 -; SI-NEXT: v_or_b32_e32 v9, v9, v34 -; SI-NEXT: v_or_b32_e32 v10, v10, v63 -; SI-NEXT: v_or_b32_e32 v11, v11, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v38 +; SI-NEXT: v_or_b32_e32 v3, v3, v61 +; SI-NEXT: v_or_b32_e32 v4, v4, v37 +; SI-NEXT: v_or_b32_e32 v5, v5, v32 +; SI-NEXT: v_or_b32_e32 v6, v6, v36 +; SI-NEXT: v_or_b32_e32 v7, v7, v60 +; SI-NEXT: v_or_b32_e32 v8, v8, v35 +; SI-NEXT: v_or_b32_e32 v9, v9, v63 +; SI-NEXT: v_or_b32_e32 v10, v10, v34 +; SI-NEXT: v_or_b32_e32 v11, v11, v62 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr57 @@ -5382,17 +5382,17 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: ; implicit-def: $vgpr55 ; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr61 -; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr60 -; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr63 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload @@ -5551,17 +5551,17 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v0, v39, v0 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v1, v38, v1 -; SI-NEXT: v_or_b32_e32 v2, v62, v2 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 -; SI-NEXT: v_or_b32_e32 v5, v36, v5 -; SI-NEXT: v_or_b32_e32 v6, v61, v6 -; SI-NEXT: v_or_b32_e32 v7, v35, v7 -; SI-NEXT: v_or_b32_e32 v8, v60, v8 -; SI-NEXT: v_or_b32_e32 v9, v34, v9 -; SI-NEXT: v_or_b32_e32 v10, v63, v10 -; SI-NEXT: v_or_b32_e32 v11, v33, v11 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 +; SI-NEXT: v_or_b32_e32 v2, v38, v2 +; SI-NEXT: v_or_b32_e32 v3, v61, v3 +; SI-NEXT: v_or_b32_e32 v4, v37, v4 +; SI-NEXT: v_or_b32_e32 v5, v32, v5 +; SI-NEXT: v_or_b32_e32 v6, v36, v6 +; SI-NEXT: v_or_b32_e32 v7, v60, v7 +; SI-NEXT: v_or_b32_e32 v8, v35, v8 +; SI-NEXT: v_or_b32_e32 v9, v63, v9 +; SI-NEXT: v_or_b32_e32 v10, v34, v10 +; SI-NEXT: v_or_b32_e32 v11, v62, v11 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 @@ -5831,10 +5831,10 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v27, 3 ; VI-NEXT: v_add_u16_e32 v0, 3, v59 ; VI-NEXT: v_add_u16_sdwa v1, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 3, v58 -; VI-NEXT: v_add_u16_sdwa v3, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v58 +; VI-NEXT: v_add_u16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v57 ; VI-NEXT: v_add_u16_sdwa v3, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -6019,8 +6019,8 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46 ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47 ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v58 ; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28 ; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill @@ -6048,8 +6048,8 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38 ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37 ; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6 -; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6 -; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6 +; GFX9-NEXT: v_perm_b32 v1, v62, v58, s6 +; GFX9-NEXT: v_perm_b32 v2, v35, v57, s6 ; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6 ; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6 ; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6 @@ -6099,8 +6099,8 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 @@ -6190,8 +6190,8 @@ define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6 -; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6 -; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6 +; GFX9-NEXT: v_perm_b32 v1, v62, v58, s6 +; GFX9-NEXT: v_perm_b32 v2, v35, v57, s6 ; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6 ; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6 ; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6 @@ -6874,7 +6874,7 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: v_readfirstlane_b32 s6, v12 ; VI-NEXT: v_readfirstlane_b32 s9, v11 ; VI-NEXT: v_readfirstlane_b32 s8, v10 -; VI-NEXT: v_readfirstlane_b32 s87, v9 +; VI-NEXT: v_readfirstlane_b32 s10, v9 ; VI-NEXT: v_readfirstlane_b32 s12, v8 ; VI-NEXT: v_readfirstlane_b32 s73, v7 ; VI-NEXT: v_readfirstlane_b32 s77, v6 @@ -6896,13 +6896,13 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_lshr_b32 s11, s20, 16 ; VI-NEXT: s_lshr_b32 s13, s19, 16 ; VI-NEXT: s_lshr_b32 s15, s18, 16 -; VI-NEXT: s_lshr_b32 s10, s17, 16 +; VI-NEXT: s_lshr_b32 s87, s17, 16 ; VI-NEXT: s_lshr_b32 s75, s16, 16 ; VI-NEXT: s_lshr_b32 s64, s86, 16 ; VI-NEXT: s_lshr_b32 s65, s6, 16 ; VI-NEXT: s_lshr_b32 s66, s9, 16 ; VI-NEXT: s_lshr_b32 s14, s8, 16 -; VI-NEXT: s_lshr_b32 s72, s87, 16 +; VI-NEXT: s_lshr_b32 s72, s10, 16 ; VI-NEXT: s_lshr_b32 s74, s12, 16 ; VI-NEXT: s_lshr_b32 s76, s73, 16 ; VI-NEXT: s_lshr_b32 s78, s77, 16 @@ -6919,17 +6919,17 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s75, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s87, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s15, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s13, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s10, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s11, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s7, 16 @@ -6985,7 +6985,7 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, 0xffff, s12 ; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s58, s4, s5 -; VI-NEXT: s_and_b32 s4, 0xffff, s87 +; VI-NEXT: s_and_b32 s4, 0xffff, s10 ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s59, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s8 @@ -7005,14 +7005,14 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: s_and_b32 s4, s16, 0xffff ; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_or_b32 s4, s5, s4 ; VI-NEXT: s_add_i32 s17, s17, 3 +; VI-NEXT: s_add_i32 s36, s4, 0x30000 +; VI-NEXT: s_and_b32 s4, s17, 0xffff +; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_and_b32 s5, s17, 0xffff -; VI-NEXT: s_lshl_b32 s10, s10, 16 -; VI-NEXT: s_or_b32 s5, s10, s5 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s36, s4, 0x30000 -; VI-NEXT: s_add_i32 s37, s5, 0x30000 +; VI-NEXT: s_add_i32 s37, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s18, 0xffff ; VI-NEXT: s_lshl_b32 s5, s15, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 @@ -7116,7 +7116,7 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, s73, 0xffff ; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_add_i32 s15, s87, 3 +; VI-NEXT: s_add_i32 s15, s10, 3 ; VI-NEXT: s_add_i32 s58, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s15, 0xffff ; VI-NEXT: s_lshl_b32 s5, s72, 16 @@ -7212,20 +7212,8 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: .LBB15_4: ; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane ; VI-NEXT: s_mov_b32 vcc_lo, s64 -; VI-NEXT: v_writelane_b32 v29, s75, 0 +; VI-NEXT: v_writelane_b32 v29, s87, 0 ; VI-NEXT: s_mov_b32 vcc_hi, s65 -; VI-NEXT: s_mov_b32 s75, s73 -; VI-NEXT: s_mov_b32 s73, s12 -; VI-NEXT: v_writelane_b32 v29, s25, 1 -; VI-NEXT: s_mov_b32 s25, s91 -; VI-NEXT: s_mov_b32 s91, s26 -; VI-NEXT: s_mov_b32 s26, s27 -; VI-NEXT: s_mov_b32 s27, s88 -; VI-NEXT: s_mov_b32 s88, s28 -; VI-NEXT: s_mov_b32 s28, s77 -; VI-NEXT: s_mov_b32 s77, s29 -; VI-NEXT: s_mov_b32 s29, s15 -; VI-NEXT: s_mov_b32 s15, s87 ; VI-NEXT: s_mov_b32 s87, s85 ; VI-NEXT: s_mov_b32 s85, s82 ; VI-NEXT: s_mov_b32 s82, s71 @@ -7242,7 +7230,26 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_mov_b32 s74, s72 ; VI-NEXT: s_mov_b32 s72, s14 ; VI-NEXT: s_mov_b32 s14, s66 -; VI-NEXT: s_mov_b32 s12, s10 +; VI-NEXT: v_writelane_b32 v29, s84, 1 +; VI-NEXT: s_mov_b32 s84, s22 +; VI-NEXT: s_mov_b32 s22, s81 +; VI-NEXT: s_mov_b32 s81, s23 +; VI-NEXT: s_mov_b32 s23, s69 +; VI-NEXT: s_mov_b32 s69, s24 +; VI-NEXT: s_mov_b32 s24, s34 +; VI-NEXT: s_mov_b32 s34, s25 +; VI-NEXT: s_mov_b32 s25, s91 +; VI-NEXT: s_mov_b32 s91, s26 +; VI-NEXT: s_mov_b32 s26, s27 +; VI-NEXT: s_mov_b32 s27, s88 +; VI-NEXT: s_mov_b32 s88, s28 +; VI-NEXT: s_mov_b32 s28, s77 +; VI-NEXT: s_mov_b32 s77, s29 +; VI-NEXT: s_mov_b32 s29, s75 +; VI-NEXT: s_mov_b32 s75, s73 +; VI-NEXT: s_mov_b32 s73, s12 +; VI-NEXT: s_mov_b32 s12, s15 +; VI-NEXT: s_mov_b32 s15, s10 ; VI-NEXT: s_mov_b32 s10, s13 ; VI-NEXT: s_mov_b32 s13, s8 ; VI-NEXT: s_mov_b32 s8, s11 @@ -7266,7 +7273,26 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_mov_b32 s11, s8 ; VI-NEXT: s_mov_b32 s8, s13 ; VI-NEXT: s_mov_b32 s13, s10 -; VI-NEXT: s_mov_b32 s10, s12 +; VI-NEXT: s_mov_b32 s10, s15 +; VI-NEXT: s_mov_b32 s15, s12 +; VI-NEXT: s_mov_b32 s12, s73 +; VI-NEXT: s_mov_b32 s73, s75 +; VI-NEXT: s_mov_b32 s75, s29 +; VI-NEXT: s_mov_b32 s29, s77 +; VI-NEXT: s_mov_b32 s77, s28 +; VI-NEXT: s_mov_b32 s28, s88 +; VI-NEXT: s_mov_b32 s88, s27 +; VI-NEXT: s_mov_b32 s27, s26 +; VI-NEXT: s_mov_b32 s26, s91 +; VI-NEXT: s_mov_b32 s91, s25 +; VI-NEXT: s_mov_b32 s25, s34 +; VI-NEXT: s_mov_b32 s34, s24 +; VI-NEXT: s_mov_b32 s24, s69 +; VI-NEXT: s_mov_b32 s69, s23 +; VI-NEXT: s_mov_b32 s23, s81 +; VI-NEXT: s_mov_b32 s81, s22 +; VI-NEXT: s_mov_b32 s22, s84 +; VI-NEXT: v_readlane_b32 s84, v29, 1 ; VI-NEXT: s_mov_b32 s66, s14 ; VI-NEXT: s_mov_b32 s14, s72 ; VI-NEXT: s_mov_b32 s72, s74 @@ -7283,19 +7309,7 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_mov_b32 s71, s82 ; VI-NEXT: s_mov_b32 s82, s85 ; VI-NEXT: s_mov_b32 s85, s87 -; VI-NEXT: s_mov_b32 s87, s15 -; VI-NEXT: s_mov_b32 s15, s29 -; VI-NEXT: s_mov_b32 s29, s77 -; VI-NEXT: s_mov_b32 s77, s28 -; VI-NEXT: s_mov_b32 s28, s88 -; VI-NEXT: s_mov_b32 s88, s27 -; VI-NEXT: s_mov_b32 s27, s26 -; VI-NEXT: s_mov_b32 s26, s91 -; VI-NEXT: s_mov_b32 s91, s25 -; VI-NEXT: v_readlane_b32 s25, v29, 1 -; VI-NEXT: s_mov_b32 s12, s73 -; VI-NEXT: s_mov_b32 s73, s75 -; VI-NEXT: v_readlane_b32 s75, v29, 0 +; VI-NEXT: v_readlane_b32 s87, v29, 0 ; VI-NEXT: s_mov_b32 s65, vcc_hi ; VI-NEXT: s_mov_b32 s64, vcc_lo ; VI-NEXT: s_branch .LBB15_2 @@ -7318,12 +7332,8 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s30, 12 +; GFX9-NEXT: v_writelane_b32 v32, s31, 13 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 ; GFX9-NEXT: v_readfirstlane_b32 s62, v12 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 @@ -7333,17 +7343,11 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 ; GFX9-NEXT: v_readfirstlane_b32 s56, v6 ; GFX9-NEXT: v_readfirstlane_b32 s88, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v4 +; GFX9-NEXT: v_readfirstlane_b32 s92, v3 +; GFX9-NEXT: v_readfirstlane_b32 s94, v2 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v1 +; GFX9-NEXT: v_readfirstlane_b32 s30, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -7352,6 +7356,12 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 ; GFX9-NEXT: s_lshr_b32 s10, s23, 16 ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s72, s63, 16 ; GFX9-NEXT: s_lshr_b32 s73, s62, 16 ; GFX9-NEXT: s_lshr_b32 s74, s61, 16 @@ -7361,13 +7371,19 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s78, s57, 16 ; GFX9-NEXT: s_lshr_b32 s79, s56, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 ; GFX9-NEXT: v_readfirstlane_b32 s42, v14 ; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 ; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 @@ -7376,11 +7392,11 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s78 @@ -7459,6 +7475,8 @@ define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB15_5: ; %end +; GFX9-NEXT: v_readlane_b32 s30, v32, 12 +; GFX9-NEXT: v_readlane_b32 s31, v32, 13 ; GFX9-NEXT: v_readlane_b32 s55, v32, 11 ; GFX9-NEXT: v_readlane_b32 s54, v32, 10 ; GFX9-NEXT: v_readlane_b32 s53, v32, 9 @@ -8563,6 +8581,11 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i ; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[28:29], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s30, s5, 16 ; SI-NEXT: s_lshr_b32 s31, s7, 16 ; SI-NEXT: s_lshr_b32 s34, s9, 16 @@ -8577,32 +8600,27 @@ define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i ; SI-NEXT: s_lshr_b32 s51, s21, 16 ; SI-NEXT: s_lshr_b32 s52, s19, 16 ; SI-NEXT: s_lshr_b32 s53, s17, 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16 ; SI-NEXT: .LBB17_3: ; %end -; SI-NEXT: s_lshl_b32 s43, s92, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s43, s92, 16 ; SI-NEXT: s_or_b32 s16, s16, s43 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s43, s53, 16 ; SI-NEXT: s_or_b32 s17, s17, s43 -; SI-NEXT: s_lshl_b32 s43, s90, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s43, s90, 16 ; SI-NEXT: s_or_b32 s18, s18, s43 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s43, s52, 16 ; SI-NEXT: s_or_b32 s19, s19, s43 -; SI-NEXT: s_lshl_b32 s43, s88, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s43, s88, 16 ; SI-NEXT: s_or_b32 s20, s20, s43 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s43, s51, 16 ; SI-NEXT: s_or_b32 s21, s21, s43 -; SI-NEXT: s_lshl_b32 s43, s78, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s43, s78, 16 ; SI-NEXT: s_or_b32 s22, s22, s43 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s43, s50, 16 @@ -9499,15 +9517,15 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v40 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v40 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v41 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v56 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v57 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v58 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59 @@ -9530,18 +9548,18 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v58 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v58 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v32 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v37 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v46 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36 @@ -9553,16 +9571,16 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v60 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v34 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v60 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v33 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55 ; SI-NEXT: ; implicit-def: $vgpr59 @@ -9581,15 +9599,15 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload @@ -9735,150 +9753,172 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB18_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v39 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v59 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v38 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v57 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v56 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v47 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v57 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v37 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v62 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v56 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v47 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v36 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v46 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v61 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v37 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v45 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v44 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v34 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v60 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v36 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v42 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v41 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v42 +; SI-NEXT: v_or_b32_e32 v8, v9, v8 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v33 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v41 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v40 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v55 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v63 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v40 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v54 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v53 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v55 +; SI-NEXT: v_or_b32_e32 v11, v12, v11 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v60 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v54 ; SI-NEXT: v_cvt_f32_f16_e32 v17, v52 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v51 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v34 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v49 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v21, v48 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v63 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v33 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v53 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 +; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_or_b32_e32 v14, v15, v14 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 -; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 @@ -9886,40 +9926,17 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 ; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 ; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v28, v28 -; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 -; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 +; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28 ; SI-NEXT: v_cvt_f16_f32_e32 v28, v28 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v15, v17, v15 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 +; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -10168,10 +10185,10 @@ define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v27, 0x200 ; VI-NEXT: v_add_f16_sdwa v0, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, 0x200, v59 -; VI-NEXT: v_add_f16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, 0x200, v58 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_add_f16_sdwa v1, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, 0x200, v58 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_add_f16_sdwa v2, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, 0x200, v57 ; VI-NEXT: v_or_b32_e32 v2, v3, v2 @@ -11317,7 +11334,7 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; VI-NEXT: v_readfirstlane_b32 s83, v0 ; VI-NEXT: v_writelane_b32 v33, s15, 0 ; VI-NEXT: s_lshr_b32 s56, s29, 16 -; VI-NEXT: s_lshr_b32 s75, s28, 16 +; VI-NEXT: s_lshr_b32 s88, s28, 16 ; VI-NEXT: s_lshr_b32 s90, s27, 16 ; VI-NEXT: s_lshr_b32 s31, s26, 16 ; VI-NEXT: s_lshr_b32 s68, s25, 16 @@ -11352,17 +11369,17 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s13, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s11, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s9, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s7, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s11, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s87, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s86, 16 @@ -11386,7 +11403,7 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; VI-NEXT: s_lshl_b32 s5, s90, 16 ; VI-NEXT: s_or_b32 s47, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s28 -; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_lshl_b32 s5, s88, 16 ; VI-NEXT: s_or_b32 s48, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s29 ; VI-NEXT: s_lshl_b32 s5, s56, 16 @@ -11415,7 +11432,6 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; VI-NEXT: s_or_b32 s56, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s74 ; VI-NEXT: s_lshl_b32 s5, s57, 16 -; VI-NEXT: s_mov_b32 s73, s75 ; VI-NEXT: s_mov_b32 s75, s57 ; VI-NEXT: s_or_b32 s57, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s72 @@ -11433,7 +11449,7 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; VI-NEXT: s_or_b32 s61, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s8 ; VI-NEXT: s_lshl_b32 s5, s15, 16 -; VI-NEXT: s_mov_b32 s88, s62 +; VI-NEXT: s_mov_b32 s73, s62 ; VI-NEXT: s_or_b32 s62, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s6 ; VI-NEXT: s_lshl_b32 s5, s63, 16 @@ -11443,13 +11459,13 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; VI-NEXT: .LBB19_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v27, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s13 -; VI-NEXT: v_mov_b32_e32 v2, s11 ; VI-NEXT: v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v27 -; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v27 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s11 +; VI-NEXT: v_add_f16_sdwa v1, v1, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v27 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s9 ; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v27 @@ -11490,7 +11506,7 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; VI-NEXT: v_add_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v12, s27, v27 ; VI-NEXT: v_or_b32_e32 v11, v12, v11 -; VI-NEXT: v_mov_b32_e32 v12, s73 +; VI-NEXT: v_mov_b32_e32 v12, s88 ; VI-NEXT: v_add_f16_sdwa v12, v12, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v13, s28, v27 ; VI-NEXT: v_or_b32_e32 v12, v13, v12 @@ -11522,7 +11538,7 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; VI-NEXT: v_add_f16_sdwa v19, v19, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v20, s79, v27 ; VI-NEXT: v_or_b32_e32 v19, v20, v19 -; VI-NEXT: v_mov_b32_e32 v20, s88 +; VI-NEXT: v_mov_b32_e32 v20, s73 ; VI-NEXT: v_add_f16_sdwa v20, v20, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v21, s76, v27 ; VI-NEXT: v_or_b32_e32 v20, v21, v20 @@ -11560,8 +11576,7 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; VI-NEXT: v_or_b32_e32 v27, v27, v28 ; VI-NEXT: s_branch .LBB19_5 ; VI-NEXT: .LBB19_3: -; VI-NEXT: s_mov_b32 s73, s75 -; VI-NEXT: s_mov_b32 s88, s62 +; VI-NEXT: s_mov_b32 s73, s62 ; VI-NEXT: s_mov_b32 s77, s56 ; VI-NEXT: s_mov_b32 s75, s57 ; VI-NEXT: s_mov_b32 s78, s58 @@ -11659,12 +11674,8 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s30, 12 +; GFX9-NEXT: v_writelane_b32 v32, s31, 13 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 ; GFX9-NEXT: v_readfirstlane_b32 s62, v12 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 @@ -11674,17 +11685,11 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 ; GFX9-NEXT: v_readfirstlane_b32 s56, v6 ; GFX9-NEXT: v_readfirstlane_b32 s88, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v4 +; GFX9-NEXT: v_readfirstlane_b32 s92, v3 +; GFX9-NEXT: v_readfirstlane_b32 s94, v2 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v1 +; GFX9-NEXT: v_readfirstlane_b32 s30, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -11693,6 +11698,12 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 ; GFX9-NEXT: s_lshr_b32 s10, s23, 16 ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s72, s63, 16 ; GFX9-NEXT: s_lshr_b32 s73, s62, 16 ; GFX9-NEXT: s_lshr_b32 s74, s61, 16 @@ -11702,13 +11713,19 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s78, s57, 16 ; GFX9-NEXT: s_lshr_b32 s79, s56, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 ; GFX9-NEXT: v_readfirstlane_b32 s42, v14 ; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 ; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 @@ -11717,11 +11734,11 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s78 @@ -11801,6 +11818,8 @@ define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB19_5: ; %end +; GFX9-NEXT: v_readlane_b32 s30, v32, 12 +; GFX9-NEXT: v_readlane_b32 s31, v32, 13 ; GFX9-NEXT: v_readlane_b32 s55, v32, 11 ; GFX9-NEXT: v_readlane_b32 s54, v32, 10 ; GFX9-NEXT: v_readlane_b32 s53, v32, 9 @@ -15340,32 +15359,30 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_writelane_b32 v58, s34, 0 -; SI-NEXT: v_writelane_b32 v58, s35, 1 -; SI-NEXT: v_writelane_b32 v58, s36, 2 -; SI-NEXT: v_writelane_b32 v58, s37, 3 -; SI-NEXT: v_writelane_b32 v58, s38, 4 -; SI-NEXT: v_writelane_b32 v58, s39, 5 -; SI-NEXT: v_writelane_b32 v58, s48, 6 -; SI-NEXT: v_writelane_b32 v58, s49, 7 -; SI-NEXT: v_writelane_b32 v58, s50, 8 -; SI-NEXT: v_writelane_b32 v58, s51, 9 -; SI-NEXT: v_writelane_b32 v58, s52, 10 -; SI-NEXT: v_writelane_b32 v58, s53, 11 -; SI-NEXT: v_writelane_b32 v58, s30, 12 -; SI-NEXT: v_writelane_b32 v58, s31, 13 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: v_writelane_b32 v56, s34, 0 +; SI-NEXT: v_writelane_b32 v56, s35, 1 +; SI-NEXT: v_writelane_b32 v56, s36, 2 +; SI-NEXT: v_writelane_b32 v56, s37, 3 +; SI-NEXT: v_writelane_b32 v56, s38, 4 +; SI-NEXT: v_writelane_b32 v56, s39, 5 +; SI-NEXT: v_writelane_b32 v56, s48, 6 +; SI-NEXT: v_writelane_b32 v56, s49, 7 +; SI-NEXT: v_writelane_b32 v56, s50, 8 +; SI-NEXT: v_writelane_b32 v56, s51, 9 +; SI-NEXT: v_writelane_b32 v56, s52, 10 +; SI-NEXT: v_writelane_b32 v56, s53, 11 +; SI-NEXT: v_writelane_b32 v56, s30, 12 +; SI-NEXT: v_writelane_b32 v56, s31, 13 ; SI-NEXT: v_readfirstlane_b32 s40, v14 ; SI-NEXT: v_readfirstlane_b32 s5, v13 ; SI-NEXT: v_readfirstlane_b32 s4, v12 @@ -15456,27 +15473,27 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[38:39], v[6:7], 16 ; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v15 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v13 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v11 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v9 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v7 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v5 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v3 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v1 ; SI-NEXT: s_branch .LBB29_5 ; SI-NEXT: .LBB29_3: ; SI-NEXT: ; implicit-def: $sgpr92 @@ -15538,20 +15555,20 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v26, s4 ; SI-NEXT: v_mov_b32_e32 v27, s5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v57, s30 -; SI-NEXT: v_mov_b32_e32 v56, s31 -; SI-NEXT: v_mov_b32_e32 v47, s34 -; SI-NEXT: v_mov_b32_e32 v46, s35 -; SI-NEXT: v_mov_b32_e32 v45, s36 -; SI-NEXT: v_mov_b32_e32 v44, s37 -; SI-NEXT: v_mov_b32_e32 v43, s38 -; SI-NEXT: v_mov_b32_e32 v42, s39 -; SI-NEXT: v_mov_b32_e32 v41, s48 -; SI-NEXT: v_mov_b32_e32 v40, s49 -; SI-NEXT: v_mov_b32_e32 v55, s50 -; SI-NEXT: v_mov_b32_e32 v54, s51 -; SI-NEXT: v_mov_b32_e32 v53, s52 -; SI-NEXT: v_mov_b32_e32 v52, s53 +; SI-NEXT: v_mov_b32_e32 v47, s30 +; SI-NEXT: v_mov_b32_e32 v46, s31 +; SI-NEXT: v_mov_b32_e32 v45, s34 +; SI-NEXT: v_mov_b32_e32 v44, s35 +; SI-NEXT: v_mov_b32_e32 v43, s36 +; SI-NEXT: v_mov_b32_e32 v42, s37 +; SI-NEXT: v_mov_b32_e32 v41, s38 +; SI-NEXT: v_mov_b32_e32 v40, s39 +; SI-NEXT: v_mov_b32_e32 v55, s48 +; SI-NEXT: v_mov_b32_e32 v54, s49 +; SI-NEXT: v_mov_b32_e32 v53, s50 +; SI-NEXT: v_mov_b32_e32 v52, s51 +; SI-NEXT: v_mov_b32_e32 v51, s52 +; SI-NEXT: v_mov_b32_e32 v39, s53 ; SI-NEXT: v_mov_b32_e32 v28, s42 ; SI-NEXT: v_mov_b32_e32 v29, s44 ; SI-NEXT: v_mov_b32_e32 v30, s46 @@ -15567,22 +15584,14 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v49, s90 ; SI-NEXT: v_mov_b32_e32 v50, s92 ; SI-NEXT: .LBB29_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v39 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57 -; SI-NEXT: v_or_b32_e32 v1, v1, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v2, v39 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56 -; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -15591,36 +15600,34 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_or_b32_e32 v4, v4, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v47 +; SI-NEXT: v_or_b32_e32 v0, v0, v50 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v47 +; SI-NEXT: v_or_b32_e32 v2, v2, v49 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v46 +; SI-NEXT: v_or_b32_e32 v4, v4, v48 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v45 ; SI-NEXT: v_or_b32_e32 v6, v6, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44 ; SI-NEXT: v_or_b32_e32 v8, v8, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43 ; SI-NEXT: v_or_b32_e32 v10, v10, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42 ; SI-NEXT: v_or_b32_e32 v12, v12, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41 ; SI-NEXT: v_or_b32_e32 v14, v14, v34 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v42 -; SI-NEXT: v_or_b32_e32 v16, v16, v33 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v41 -; SI-NEXT: v_or_b32_e32 v18, v18, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v40 +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 @@ -15629,28 +15636,36 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v16, v16, v33 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v55 +; SI-NEXT: v_or_b32_e32 v18, v18, v32 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v54 ; SI-NEXT: v_or_b32_e32 v20, v20, v31 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v55 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v53 ; SI-NEXT: v_or_b32_e32 v22, v22, v30 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v54 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v52 ; SI-NEXT: v_or_b32_e32 v24, v24, v29 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51 ; SI-NEXT: v_or_b32_e32 v26, v26, v28 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52 -; SI-NEXT: v_readlane_b32 s30, v58, 12 -; SI-NEXT: v_or_b32_e32 v5, v5, v39 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39 +; SI-NEXT: v_readlane_b32 s30, v56, 12 +; SI-NEXT: v_or_b32_e32 v1, v1, v50 +; SI-NEXT: v_or_b32_e32 v3, v3, v49 +; SI-NEXT: v_or_b32_e32 v5, v5, v48 ; SI-NEXT: v_or_b32_e32 v7, v7, v38 ; SI-NEXT: v_or_b32_e32 v9, v9, v37 ; SI-NEXT: v_or_b32_e32 v11, v11, v36 @@ -15662,21 +15677,21 @@ define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_or_b32_e32 v23, v23, v30 ; SI-NEXT: v_or_b32_e32 v25, v25, v29 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: v_readlane_b32 s31, v58, 13 -; SI-NEXT: v_readlane_b32 s53, v58, 11 -; SI-NEXT: v_readlane_b32 s52, v58, 10 -; SI-NEXT: v_readlane_b32 s51, v58, 9 -; SI-NEXT: v_readlane_b32 s50, v58, 8 -; SI-NEXT: v_readlane_b32 s49, v58, 7 -; SI-NEXT: v_readlane_b32 s48, v58, 6 -; SI-NEXT: v_readlane_b32 s39, v58, 5 -; SI-NEXT: v_readlane_b32 s38, v58, 4 -; SI-NEXT: v_readlane_b32 s37, v58, 3 -; SI-NEXT: v_readlane_b32 s36, v58, 2 -; SI-NEXT: v_readlane_b32 s35, v58, 1 -; SI-NEXT: v_readlane_b32 s34, v58, 0 +; SI-NEXT: v_readlane_b32 s31, v56, 13 +; SI-NEXT: v_readlane_b32 s53, v56, 11 +; SI-NEXT: v_readlane_b32 s52, v56, 10 +; SI-NEXT: v_readlane_b32 s51, v56, 9 +; SI-NEXT: v_readlane_b32 s50, v56, 8 +; SI-NEXT: v_readlane_b32 s49, v56, 7 +; SI-NEXT: v_readlane_b32 s48, v56, 6 +; SI-NEXT: v_readlane_b32 s39, v56, 5 +; SI-NEXT: v_readlane_b32 s38, v56, 4 +; SI-NEXT: v_readlane_b32 s37, v56, 3 +; SI-NEXT: v_readlane_b32 s36, v56, 2 +; SI-NEXT: v_readlane_b32 s35, v56, 1 +; SI-NEXT: v_readlane_b32 s34, v56, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -16756,17 +16771,17 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v59 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v26 -; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v25 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v24 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v23 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v22 -; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v21 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v20 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v19 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v18 -; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v17 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v16 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -16827,17 +16842,17 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40 ; SI-NEXT: v_or_b32_e32 v0, v0, v39 -; SI-NEXT: v_or_b32_e32 v1, v1, v38 -; SI-NEXT: v_or_b32_e32 v2, v2, v62 -; SI-NEXT: v_or_b32_e32 v3, v3, v37 -; SI-NEXT: v_or_b32_e32 v4, v4, v32 -; SI-NEXT: v_or_b32_e32 v5, v5, v36 -; SI-NEXT: v_or_b32_e32 v6, v6, v61 -; SI-NEXT: v_or_b32_e32 v7, v7, v35 -; SI-NEXT: v_or_b32_e32 v8, v8, v60 -; SI-NEXT: v_or_b32_e32 v9, v9, v34 -; SI-NEXT: v_or_b32_e32 v10, v10, v63 -; SI-NEXT: v_or_b32_e32 v11, v11, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v38 +; SI-NEXT: v_or_b32_e32 v3, v3, v61 +; SI-NEXT: v_or_b32_e32 v4, v4, v37 +; SI-NEXT: v_or_b32_e32 v5, v5, v32 +; SI-NEXT: v_or_b32_e32 v6, v6, v36 +; SI-NEXT: v_or_b32_e32 v7, v7, v60 +; SI-NEXT: v_or_b32_e32 v8, v8, v35 +; SI-NEXT: v_or_b32_e32 v9, v9, v63 +; SI-NEXT: v_or_b32_e32 v10, v10, v34 +; SI-NEXT: v_or_b32_e32 v11, v11, v62 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr57 @@ -16852,17 +16867,17 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: ; implicit-def: $vgpr55 ; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr61 -; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr60 -; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr63 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload @@ -17021,17 +17036,17 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v0, v39, v0 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v1, v38, v1 -; SI-NEXT: v_or_b32_e32 v2, v62, v2 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 -; SI-NEXT: v_or_b32_e32 v5, v36, v5 -; SI-NEXT: v_or_b32_e32 v6, v61, v6 -; SI-NEXT: v_or_b32_e32 v7, v35, v7 -; SI-NEXT: v_or_b32_e32 v8, v60, v8 -; SI-NEXT: v_or_b32_e32 v9, v34, v9 -; SI-NEXT: v_or_b32_e32 v10, v63, v10 -; SI-NEXT: v_or_b32_e32 v11, v33, v11 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 +; SI-NEXT: v_or_b32_e32 v2, v38, v2 +; SI-NEXT: v_or_b32_e32 v3, v61, v3 +; SI-NEXT: v_or_b32_e32 v4, v37, v4 +; SI-NEXT: v_or_b32_e32 v5, v32, v5 +; SI-NEXT: v_or_b32_e32 v6, v36, v6 +; SI-NEXT: v_or_b32_e32 v7, v60, v7 +; SI-NEXT: v_or_b32_e32 v8, v35, v8 +; SI-NEXT: v_or_b32_e32 v9, v63, v9 +; SI-NEXT: v_or_b32_e32 v10, v34, v10 +; SI-NEXT: v_or_b32_e32 v11, v62, v11 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 @@ -17301,10 +17316,10 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v27, 3 ; VI-NEXT: v_add_u16_e32 v0, 3, v59 ; VI-NEXT: v_add_u16_sdwa v1, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 3, v58 -; VI-NEXT: v_add_u16_sdwa v3, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v58 +; VI-NEXT: v_add_u16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v57 ; VI-NEXT: v_add_u16_sdwa v3, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -17489,8 +17504,8 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46 ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47 ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v58 ; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28 ; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill @@ -17518,8 +17533,8 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38 ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37 ; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6 -; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6 -; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6 +; GFX9-NEXT: v_perm_b32 v1, v62, v58, s6 +; GFX9-NEXT: v_perm_b32 v2, v35, v57, s6 ; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6 ; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6 ; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6 @@ -17569,8 +17584,8 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 @@ -17660,8 +17675,8 @@ define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6 -; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6 -; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6 +; GFX9-NEXT: v_perm_b32 v1, v62, v58, s6 +; GFX9-NEXT: v_perm_b32 v2, v35, v57, s6 ; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6 ; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6 ; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6 @@ -18344,7 +18359,7 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; VI-NEXT: v_readfirstlane_b32 s6, v12 ; VI-NEXT: v_readfirstlane_b32 s9, v11 ; VI-NEXT: v_readfirstlane_b32 s8, v10 -; VI-NEXT: v_readfirstlane_b32 s87, v9 +; VI-NEXT: v_readfirstlane_b32 s10, v9 ; VI-NEXT: v_readfirstlane_b32 s12, v8 ; VI-NEXT: v_readfirstlane_b32 s73, v7 ; VI-NEXT: v_readfirstlane_b32 s77, v6 @@ -18366,13 +18381,13 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_lshr_b32 s11, s20, 16 ; VI-NEXT: s_lshr_b32 s13, s19, 16 ; VI-NEXT: s_lshr_b32 s15, s18, 16 -; VI-NEXT: s_lshr_b32 s10, s17, 16 +; VI-NEXT: s_lshr_b32 s87, s17, 16 ; VI-NEXT: s_lshr_b32 s75, s16, 16 ; VI-NEXT: s_lshr_b32 s64, s86, 16 ; VI-NEXT: s_lshr_b32 s65, s6, 16 ; VI-NEXT: s_lshr_b32 s66, s9, 16 ; VI-NEXT: s_lshr_b32 s14, s8, 16 -; VI-NEXT: s_lshr_b32 s72, s87, 16 +; VI-NEXT: s_lshr_b32 s72, s10, 16 ; VI-NEXT: s_lshr_b32 s74, s12, 16 ; VI-NEXT: s_lshr_b32 s76, s73, 16 ; VI-NEXT: s_lshr_b32 s78, s77, 16 @@ -18389,17 +18404,17 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s75, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s87, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s15, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s13, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s10, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s11, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s7, 16 @@ -18455,7 +18470,7 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s12 ; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s58, s4, s5 -; VI-NEXT: s_and_b32 s4, 0xffff, s87 +; VI-NEXT: s_and_b32 s4, 0xffff, s10 ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s59, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s8 @@ -18475,14 +18490,14 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: s_and_b32 s4, s16, 0xffff ; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_or_b32 s4, s5, s4 ; VI-NEXT: s_add_i32 s17, s17, 3 +; VI-NEXT: s_add_i32 s36, s4, 0x30000 +; VI-NEXT: s_and_b32 s4, s17, 0xffff +; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_and_b32 s5, s17, 0xffff -; VI-NEXT: s_lshl_b32 s10, s10, 16 -; VI-NEXT: s_or_b32 s5, s10, s5 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s36, s4, 0x30000 -; VI-NEXT: s_add_i32 s37, s5, 0x30000 +; VI-NEXT: s_add_i32 s37, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s18, 0xffff ; VI-NEXT: s_lshl_b32 s5, s15, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 @@ -18586,7 +18601,7 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, s73, 0xffff ; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_add_i32 s15, s87, 3 +; VI-NEXT: s_add_i32 s15, s10, 3 ; VI-NEXT: s_add_i32 s58, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s15, 0xffff ; VI-NEXT: s_lshl_b32 s5, s72, 16 @@ -18682,20 +18697,8 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; VI-NEXT: .LBB31_4: ; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane ; VI-NEXT: s_mov_b32 vcc_lo, s64 -; VI-NEXT: v_writelane_b32 v29, s75, 0 +; VI-NEXT: v_writelane_b32 v29, s87, 0 ; VI-NEXT: s_mov_b32 vcc_hi, s65 -; VI-NEXT: s_mov_b32 s75, s73 -; VI-NEXT: s_mov_b32 s73, s12 -; VI-NEXT: v_writelane_b32 v29, s25, 1 -; VI-NEXT: s_mov_b32 s25, s91 -; VI-NEXT: s_mov_b32 s91, s26 -; VI-NEXT: s_mov_b32 s26, s27 -; VI-NEXT: s_mov_b32 s27, s88 -; VI-NEXT: s_mov_b32 s88, s28 -; VI-NEXT: s_mov_b32 s28, s77 -; VI-NEXT: s_mov_b32 s77, s29 -; VI-NEXT: s_mov_b32 s29, s15 -; VI-NEXT: s_mov_b32 s15, s87 ; VI-NEXT: s_mov_b32 s87, s85 ; VI-NEXT: s_mov_b32 s85, s82 ; VI-NEXT: s_mov_b32 s82, s71 @@ -18712,7 +18715,26 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_mov_b32 s74, s72 ; VI-NEXT: s_mov_b32 s72, s14 ; VI-NEXT: s_mov_b32 s14, s66 -; VI-NEXT: s_mov_b32 s12, s10 +; VI-NEXT: v_writelane_b32 v29, s84, 1 +; VI-NEXT: s_mov_b32 s84, s22 +; VI-NEXT: s_mov_b32 s22, s81 +; VI-NEXT: s_mov_b32 s81, s23 +; VI-NEXT: s_mov_b32 s23, s69 +; VI-NEXT: s_mov_b32 s69, s24 +; VI-NEXT: s_mov_b32 s24, s34 +; VI-NEXT: s_mov_b32 s34, s25 +; VI-NEXT: s_mov_b32 s25, s91 +; VI-NEXT: s_mov_b32 s91, s26 +; VI-NEXT: s_mov_b32 s26, s27 +; VI-NEXT: s_mov_b32 s27, s88 +; VI-NEXT: s_mov_b32 s88, s28 +; VI-NEXT: s_mov_b32 s28, s77 +; VI-NEXT: s_mov_b32 s77, s29 +; VI-NEXT: s_mov_b32 s29, s75 +; VI-NEXT: s_mov_b32 s75, s73 +; VI-NEXT: s_mov_b32 s73, s12 +; VI-NEXT: s_mov_b32 s12, s15 +; VI-NEXT: s_mov_b32 s15, s10 ; VI-NEXT: s_mov_b32 s10, s13 ; VI-NEXT: s_mov_b32 s13, s8 ; VI-NEXT: s_mov_b32 s8, s11 @@ -18736,7 +18758,26 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_mov_b32 s11, s8 ; VI-NEXT: s_mov_b32 s8, s13 ; VI-NEXT: s_mov_b32 s13, s10 -; VI-NEXT: s_mov_b32 s10, s12 +; VI-NEXT: s_mov_b32 s10, s15 +; VI-NEXT: s_mov_b32 s15, s12 +; VI-NEXT: s_mov_b32 s12, s73 +; VI-NEXT: s_mov_b32 s73, s75 +; VI-NEXT: s_mov_b32 s75, s29 +; VI-NEXT: s_mov_b32 s29, s77 +; VI-NEXT: s_mov_b32 s77, s28 +; VI-NEXT: s_mov_b32 s28, s88 +; VI-NEXT: s_mov_b32 s88, s27 +; VI-NEXT: s_mov_b32 s27, s26 +; VI-NEXT: s_mov_b32 s26, s91 +; VI-NEXT: s_mov_b32 s91, s25 +; VI-NEXT: s_mov_b32 s25, s34 +; VI-NEXT: s_mov_b32 s34, s24 +; VI-NEXT: s_mov_b32 s24, s69 +; VI-NEXT: s_mov_b32 s69, s23 +; VI-NEXT: s_mov_b32 s23, s81 +; VI-NEXT: s_mov_b32 s81, s22 +; VI-NEXT: s_mov_b32 s22, s84 +; VI-NEXT: v_readlane_b32 s84, v29, 1 ; VI-NEXT: s_mov_b32 s66, s14 ; VI-NEXT: s_mov_b32 s14, s72 ; VI-NEXT: s_mov_b32 s72, s74 @@ -18753,19 +18794,7 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_mov_b32 s71, s82 ; VI-NEXT: s_mov_b32 s82, s85 ; VI-NEXT: s_mov_b32 s85, s87 -; VI-NEXT: s_mov_b32 s87, s15 -; VI-NEXT: s_mov_b32 s15, s29 -; VI-NEXT: s_mov_b32 s29, s77 -; VI-NEXT: s_mov_b32 s77, s28 -; VI-NEXT: s_mov_b32 s28, s88 -; VI-NEXT: s_mov_b32 s88, s27 -; VI-NEXT: s_mov_b32 s27, s26 -; VI-NEXT: s_mov_b32 s26, s91 -; VI-NEXT: s_mov_b32 s91, s25 -; VI-NEXT: v_readlane_b32 s25, v29, 1 -; VI-NEXT: s_mov_b32 s12, s73 -; VI-NEXT: s_mov_b32 s73, s75 -; VI-NEXT: v_readlane_b32 s75, v29, 0 +; VI-NEXT: v_readlane_b32 s87, v29, 0 ; VI-NEXT: s_mov_b32 s65, vcc_hi ; VI-NEXT: s_mov_b32 s64, vcc_lo ; VI-NEXT: s_branch .LBB31_2 @@ -18788,12 +18817,8 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s30, 12 +; GFX9-NEXT: v_writelane_b32 v32, s31, 13 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 ; GFX9-NEXT: v_readfirstlane_b32 s62, v12 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 @@ -18803,17 +18828,11 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 ; GFX9-NEXT: v_readfirstlane_b32 s56, v6 ; GFX9-NEXT: v_readfirstlane_b32 s88, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v4 +; GFX9-NEXT: v_readfirstlane_b32 s92, v3 +; GFX9-NEXT: v_readfirstlane_b32 s94, v2 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v1 +; GFX9-NEXT: v_readfirstlane_b32 s30, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -18822,6 +18841,12 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 ; GFX9-NEXT: s_lshr_b32 s10, s23, 16 ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s72, s63, 16 ; GFX9-NEXT: s_lshr_b32 s73, s62, 16 ; GFX9-NEXT: s_lshr_b32 s74, s61, 16 @@ -18831,13 +18856,19 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s78, s57, 16 ; GFX9-NEXT: s_lshr_b32 s79, s56, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 ; GFX9-NEXT: v_readfirstlane_b32 s42, v14 ; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 ; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 @@ -18846,11 +18877,11 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s78 @@ -18929,6 +18960,8 @@ define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB31_5: ; %end +; GFX9-NEXT: v_readlane_b32 s30, v32, 12 +; GFX9-NEXT: v_readlane_b32 s31, v32, 13 ; GFX9-NEXT: v_readlane_b32 s55, v32, 11 ; GFX9-NEXT: v_readlane_b32 s54, v32, 10 ; GFX9-NEXT: v_readlane_b32 s53, v32, 9 @@ -19903,32 +19936,30 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_writelane_b32 v58, s34, 0 -; SI-NEXT: v_writelane_b32 v58, s35, 1 -; SI-NEXT: v_writelane_b32 v58, s36, 2 -; SI-NEXT: v_writelane_b32 v58, s37, 3 -; SI-NEXT: v_writelane_b32 v58, s38, 4 -; SI-NEXT: v_writelane_b32 v58, s39, 5 -; SI-NEXT: v_writelane_b32 v58, s48, 6 -; SI-NEXT: v_writelane_b32 v58, s49, 7 -; SI-NEXT: v_writelane_b32 v58, s50, 8 -; SI-NEXT: v_writelane_b32 v58, s51, 9 -; SI-NEXT: v_writelane_b32 v58, s52, 10 -; SI-NEXT: v_writelane_b32 v58, s53, 11 -; SI-NEXT: v_writelane_b32 v58, s30, 12 -; SI-NEXT: v_writelane_b32 v58, s31, 13 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: v_writelane_b32 v56, s34, 0 +; SI-NEXT: v_writelane_b32 v56, s35, 1 +; SI-NEXT: v_writelane_b32 v56, s36, 2 +; SI-NEXT: v_writelane_b32 v56, s37, 3 +; SI-NEXT: v_writelane_b32 v56, s38, 4 +; SI-NEXT: v_writelane_b32 v56, s39, 5 +; SI-NEXT: v_writelane_b32 v56, s48, 6 +; SI-NEXT: v_writelane_b32 v56, s49, 7 +; SI-NEXT: v_writelane_b32 v56, s50, 8 +; SI-NEXT: v_writelane_b32 v56, s51, 9 +; SI-NEXT: v_writelane_b32 v56, s52, 10 +; SI-NEXT: v_writelane_b32 v56, s53, 11 +; SI-NEXT: v_writelane_b32 v56, s30, 12 +; SI-NEXT: v_writelane_b32 v56, s31, 13 ; SI-NEXT: v_readfirstlane_b32 s40, v14 ; SI-NEXT: v_readfirstlane_b32 s5, v13 ; SI-NEXT: v_readfirstlane_b32 s4, v12 @@ -20019,27 +20050,27 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_lshr_b64 v[49:50], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[38:39], v[6:7], 16 ; SI-NEXT: v_lshr_b64 v[50:51], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v15 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v13 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v11 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v9 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v7 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v5 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v3 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v1 ; SI-NEXT: s_branch .LBB33_5 ; SI-NEXT: .LBB33_3: ; SI-NEXT: ; implicit-def: $sgpr92 @@ -20101,20 +20132,20 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v26, s4 ; SI-NEXT: v_mov_b32_e32 v27, s5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v57, s30 -; SI-NEXT: v_mov_b32_e32 v56, s31 -; SI-NEXT: v_mov_b32_e32 v47, s34 -; SI-NEXT: v_mov_b32_e32 v46, s35 -; SI-NEXT: v_mov_b32_e32 v45, s36 -; SI-NEXT: v_mov_b32_e32 v44, s37 -; SI-NEXT: v_mov_b32_e32 v43, s38 -; SI-NEXT: v_mov_b32_e32 v42, s39 -; SI-NEXT: v_mov_b32_e32 v41, s48 -; SI-NEXT: v_mov_b32_e32 v40, s49 -; SI-NEXT: v_mov_b32_e32 v55, s50 -; SI-NEXT: v_mov_b32_e32 v54, s51 -; SI-NEXT: v_mov_b32_e32 v53, s52 -; SI-NEXT: v_mov_b32_e32 v52, s53 +; SI-NEXT: v_mov_b32_e32 v47, s30 +; SI-NEXT: v_mov_b32_e32 v46, s31 +; SI-NEXT: v_mov_b32_e32 v45, s34 +; SI-NEXT: v_mov_b32_e32 v44, s35 +; SI-NEXT: v_mov_b32_e32 v43, s36 +; SI-NEXT: v_mov_b32_e32 v42, s37 +; SI-NEXT: v_mov_b32_e32 v41, s38 +; SI-NEXT: v_mov_b32_e32 v40, s39 +; SI-NEXT: v_mov_b32_e32 v55, s48 +; SI-NEXT: v_mov_b32_e32 v54, s49 +; SI-NEXT: v_mov_b32_e32 v53, s50 +; SI-NEXT: v_mov_b32_e32 v52, s51 +; SI-NEXT: v_mov_b32_e32 v51, s52 +; SI-NEXT: v_mov_b32_e32 v39, s53 ; SI-NEXT: v_mov_b32_e32 v28, s42 ; SI-NEXT: v_mov_b32_e32 v29, s44 ; SI-NEXT: v_mov_b32_e32 v30, s46 @@ -20130,22 +20161,14 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v49, s90 ; SI-NEXT: v_mov_b32_e32 v50, s92 ; SI-NEXT: .LBB33_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v39 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57 -; SI-NEXT: v_or_b32_e32 v1, v1, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v2, v39 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56 -; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -20154,36 +20177,34 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_or_b32_e32 v4, v4, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v47 +; SI-NEXT: v_or_b32_e32 v0, v0, v50 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v47 +; SI-NEXT: v_or_b32_e32 v2, v2, v49 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v46 +; SI-NEXT: v_or_b32_e32 v4, v4, v48 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v45 ; SI-NEXT: v_or_b32_e32 v6, v6, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v44 ; SI-NEXT: v_or_b32_e32 v8, v8, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v43 ; SI-NEXT: v_or_b32_e32 v10, v10, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v42 ; SI-NEXT: v_or_b32_e32 v12, v12, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41 ; SI-NEXT: v_or_b32_e32 v14, v14, v34 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v42 -; SI-NEXT: v_or_b32_e32 v16, v16, v33 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v41 -; SI-NEXT: v_or_b32_e32 v18, v18, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v40 +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 @@ -20192,28 +20213,36 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v16, v16, v33 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v55 +; SI-NEXT: v_or_b32_e32 v18, v18, v32 ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v54 ; SI-NEXT: v_or_b32_e32 v20, v20, v31 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v55 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v53 ; SI-NEXT: v_or_b32_e32 v22, v22, v30 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v54 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v52 ; SI-NEXT: v_or_b32_e32 v24, v24, v29 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v51 ; SI-NEXT: v_or_b32_e32 v26, v26, v28 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52 -; SI-NEXT: v_readlane_b32 s30, v58, 12 -; SI-NEXT: v_or_b32_e32 v5, v5, v39 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39 +; SI-NEXT: v_readlane_b32 s30, v56, 12 +; SI-NEXT: v_or_b32_e32 v1, v1, v50 +; SI-NEXT: v_or_b32_e32 v3, v3, v49 +; SI-NEXT: v_or_b32_e32 v5, v5, v48 ; SI-NEXT: v_or_b32_e32 v7, v7, v38 ; SI-NEXT: v_or_b32_e32 v9, v9, v37 ; SI-NEXT: v_or_b32_e32 v11, v11, v36 @@ -20225,21 +20254,21 @@ define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a, ; SI-NEXT: v_or_b32_e32 v23, v23, v30 ; SI-NEXT: v_or_b32_e32 v25, v25, v29 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: v_readlane_b32 s31, v58, 13 -; SI-NEXT: v_readlane_b32 s53, v58, 11 -; SI-NEXT: v_readlane_b32 s52, v58, 10 -; SI-NEXT: v_readlane_b32 s51, v58, 9 -; SI-NEXT: v_readlane_b32 s50, v58, 8 -; SI-NEXT: v_readlane_b32 s49, v58, 7 -; SI-NEXT: v_readlane_b32 s48, v58, 6 -; SI-NEXT: v_readlane_b32 s39, v58, 5 -; SI-NEXT: v_readlane_b32 s38, v58, 4 -; SI-NEXT: v_readlane_b32 s37, v58, 3 -; SI-NEXT: v_readlane_b32 s36, v58, 2 -; SI-NEXT: v_readlane_b32 s35, v58, 1 -; SI-NEXT: v_readlane_b32 s34, v58, 0 +; SI-NEXT: v_readlane_b32 s31, v56, 13 +; SI-NEXT: v_readlane_b32 s53, v56, 11 +; SI-NEXT: v_readlane_b32 s52, v56, 10 +; SI-NEXT: v_readlane_b32 s51, v56, 9 +; SI-NEXT: v_readlane_b32 s50, v56, 8 +; SI-NEXT: v_readlane_b32 s49, v56, 7 +; SI-NEXT: v_readlane_b32 s48, v56, 6 +; SI-NEXT: v_readlane_b32 s39, v56, 5 +; SI-NEXT: v_readlane_b32 s38, v56, 4 +; SI-NEXT: v_readlane_b32 s37, v56, 3 +; SI-NEXT: v_readlane_b32 s36, v56, 2 +; SI-NEXT: v_readlane_b32 s35, v56, 1 +; SI-NEXT: v_readlane_b32 s34, v56, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -21331,15 +21360,15 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v40 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v40 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v41 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v56 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v57 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v58 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59 @@ -21362,18 +21391,18 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v58 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v58 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v32 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v37 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v46 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36 @@ -21385,16 +21414,16 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v60 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v34 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v60 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v33 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55 ; SI-NEXT: ; implicit-def: $vgpr59 @@ -21413,15 +21442,15 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload @@ -21567,150 +21596,172 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB34_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v39 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v59 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v38 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v57 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v56 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v47 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v57 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v37 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v62 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v56 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v47 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v36 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v46 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v61 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v37 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v45 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v44 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v34 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v60 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v36 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v42 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v41 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v42 +; SI-NEXT: v_or_b32_e32 v8, v9, v8 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v33 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v41 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v40 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v55 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v63 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v40 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v54 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v53 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v55 +; SI-NEXT: v_or_b32_e32 v11, v12, v11 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v60 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v54 ; SI-NEXT: v_cvt_f32_f16_e32 v17, v52 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v51 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v34 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v49 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v21, v48 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v63 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v33 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v53 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 +; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_or_b32_e32 v14, v15, v14 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 -; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 @@ -21718,40 +21769,17 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 ; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 ; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v28, v28 -; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 -; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 +; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28 ; SI-NEXT: v_cvt_f16_f32_e32 v28, v28 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v15, v17, v15 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 +; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -22000,10 +22028,10 @@ define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v27, 0x200 ; VI-NEXT: v_add_f16_sdwa v0, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, 0x200, v59 -; VI-NEXT: v_add_f16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, 0x200, v58 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_add_f16_sdwa v1, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, 0x200, v58 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_add_f16_sdwa v2, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, 0x200, v57 ; VI-NEXT: v_or_b32_e32 v2, v3, v2 @@ -23149,7 +23177,7 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; VI-NEXT: v_readfirstlane_b32 s83, v0 ; VI-NEXT: v_writelane_b32 v33, s15, 0 ; VI-NEXT: s_lshr_b32 s56, s29, 16 -; VI-NEXT: s_lshr_b32 s75, s28, 16 +; VI-NEXT: s_lshr_b32 s88, s28, 16 ; VI-NEXT: s_lshr_b32 s90, s27, 16 ; VI-NEXT: s_lshr_b32 s31, s26, 16 ; VI-NEXT: s_lshr_b32 s68, s25, 16 @@ -23184,17 +23212,17 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s13, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s11, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s9, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s7, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s11, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s87, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s86, 16 @@ -23218,7 +23246,7 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; VI-NEXT: s_lshl_b32 s5, s90, 16 ; VI-NEXT: s_or_b32 s47, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s28 -; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_lshl_b32 s5, s88, 16 ; VI-NEXT: s_or_b32 s48, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s29 ; VI-NEXT: s_lshl_b32 s5, s56, 16 @@ -23247,7 +23275,6 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; VI-NEXT: s_or_b32 s56, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s74 ; VI-NEXT: s_lshl_b32 s5, s57, 16 -; VI-NEXT: s_mov_b32 s73, s75 ; VI-NEXT: s_mov_b32 s75, s57 ; VI-NEXT: s_or_b32 s57, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s72 @@ -23265,7 +23292,7 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; VI-NEXT: s_or_b32 s61, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s8 ; VI-NEXT: s_lshl_b32 s5, s15, 16 -; VI-NEXT: s_mov_b32 s88, s62 +; VI-NEXT: s_mov_b32 s73, s62 ; VI-NEXT: s_or_b32 s62, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s6 ; VI-NEXT: s_lshl_b32 s5, s63, 16 @@ -23275,13 +23302,13 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; VI-NEXT: .LBB35_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v27, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s13 -; VI-NEXT: v_mov_b32_e32 v2, s11 ; VI-NEXT: v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v27 -; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v27 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s11 +; VI-NEXT: v_add_f16_sdwa v1, v1, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v27 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s9 ; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v27 @@ -23322,7 +23349,7 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; VI-NEXT: v_add_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v12, s27, v27 ; VI-NEXT: v_or_b32_e32 v11, v12, v11 -; VI-NEXT: v_mov_b32_e32 v12, s73 +; VI-NEXT: v_mov_b32_e32 v12, s88 ; VI-NEXT: v_add_f16_sdwa v12, v12, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v13, s28, v27 ; VI-NEXT: v_or_b32_e32 v12, v13, v12 @@ -23354,7 +23381,7 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; VI-NEXT: v_add_f16_sdwa v19, v19, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v20, s79, v27 ; VI-NEXT: v_or_b32_e32 v19, v20, v19 -; VI-NEXT: v_mov_b32_e32 v20, s88 +; VI-NEXT: v_mov_b32_e32 v20, s73 ; VI-NEXT: v_add_f16_sdwa v20, v20, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v21, s76, v27 ; VI-NEXT: v_or_b32_e32 v20, v21, v20 @@ -23392,8 +23419,7 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; VI-NEXT: v_or_b32_e32 v27, v27, v28 ; VI-NEXT: s_branch .LBB35_5 ; VI-NEXT: .LBB35_3: -; VI-NEXT: s_mov_b32 s73, s75 -; VI-NEXT: s_mov_b32 s88, s62 +; VI-NEXT: s_mov_b32 s73, s62 ; VI-NEXT: s_mov_b32 s77, s56 ; VI-NEXT: s_mov_b32 s75, s57 ; VI-NEXT: s_mov_b32 s78, s58 @@ -23491,12 +23517,8 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s30, 12 +; GFX9-NEXT: v_writelane_b32 v32, s31, 13 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 ; GFX9-NEXT: v_readfirstlane_b32 s62, v12 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 @@ -23506,17 +23528,11 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 ; GFX9-NEXT: v_readfirstlane_b32 s56, v6 ; GFX9-NEXT: v_readfirstlane_b32 s88, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v4 +; GFX9-NEXT: v_readfirstlane_b32 s92, v3 +; GFX9-NEXT: v_readfirstlane_b32 s94, v2 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v1 +; GFX9-NEXT: v_readfirstlane_b32 s30, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -23525,6 +23541,12 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 ; GFX9-NEXT: s_lshr_b32 s10, s23, 16 ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s72, s63, 16 ; GFX9-NEXT: s_lshr_b32 s73, s62, 16 ; GFX9-NEXT: s_lshr_b32 s74, s61, 16 @@ -23534,13 +23556,19 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; GFX9-NEXT: s_lshr_b32 s78, s57, 16 ; GFX9-NEXT: s_lshr_b32 s79, s56, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 ; GFX9-NEXT: v_readfirstlane_b32 s42, v14 ; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 ; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 @@ -23549,11 +23577,11 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s78 @@ -23633,6 +23661,8 @@ define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB35_5: ; %end +; GFX9-NEXT: v_readlane_b32 s30, v32, 12 +; GFX9-NEXT: v_readlane_b32 s31, v32, 13 ; GFX9-NEXT: v_readlane_b32 s55, v32, 11 ; GFX9-NEXT: v_readlane_b32 s54, v32, 10 ; GFX9-NEXT: v_readlane_b32 s53, v32, 9 @@ -25911,26 +25941,26 @@ define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16 ; SI-NEXT: .LBB41_3: ; %end -; SI-NEXT: s_lshl_b32 s43, s92, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s43, s92, 16 ; SI-NEXT: s_or_b32 s16, s16, s43 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s43, s53, 16 ; SI-NEXT: s_or_b32 s17, s17, s43 -; SI-NEXT: s_lshl_b32 s43, s90, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s43, s90, 16 ; SI-NEXT: s_or_b32 s18, s18, s43 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s43, s52, 16 ; SI-NEXT: s_or_b32 s19, s19, s43 -; SI-NEXT: s_lshl_b32 s43, s88, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s43, s88, 16 ; SI-NEXT: s_or_b32 s20, s20, s43 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s43, s51, 16 ; SI-NEXT: s_or_b32 s21, s21, s43 -; SI-NEXT: s_lshl_b32 s43, s78, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s43, s78, 16 ; SI-NEXT: s_or_b32 s22, s22, s43 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s43, s50, 16 @@ -26815,17 +26845,17 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v59 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v26 -; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v25 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v24 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v23 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v22 -; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v21 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v20 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v19 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v18 -; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v17 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v16 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -26886,17 +26916,17 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40 ; SI-NEXT: v_or_b32_e32 v0, v0, v39 -; SI-NEXT: v_or_b32_e32 v1, v1, v38 -; SI-NEXT: v_or_b32_e32 v2, v2, v62 -; SI-NEXT: v_or_b32_e32 v3, v3, v37 -; SI-NEXT: v_or_b32_e32 v4, v4, v32 -; SI-NEXT: v_or_b32_e32 v5, v5, v36 -; SI-NEXT: v_or_b32_e32 v6, v6, v61 -; SI-NEXT: v_or_b32_e32 v7, v7, v35 -; SI-NEXT: v_or_b32_e32 v8, v8, v60 -; SI-NEXT: v_or_b32_e32 v9, v9, v34 -; SI-NEXT: v_or_b32_e32 v10, v10, v63 -; SI-NEXT: v_or_b32_e32 v11, v11, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v38 +; SI-NEXT: v_or_b32_e32 v3, v3, v61 +; SI-NEXT: v_or_b32_e32 v4, v4, v37 +; SI-NEXT: v_or_b32_e32 v5, v5, v32 +; SI-NEXT: v_or_b32_e32 v6, v6, v36 +; SI-NEXT: v_or_b32_e32 v7, v7, v60 +; SI-NEXT: v_or_b32_e32 v8, v8, v35 +; SI-NEXT: v_or_b32_e32 v9, v9, v63 +; SI-NEXT: v_or_b32_e32 v10, v10, v34 +; SI-NEXT: v_or_b32_e32 v11, v11, v62 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr57 @@ -26911,17 +26941,17 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: ; implicit-def: $vgpr55 ; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr61 -; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr60 -; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr63 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload @@ -27080,17 +27110,17 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v0, v39, v0 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v1, v38, v1 -; SI-NEXT: v_or_b32_e32 v2, v62, v2 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 -; SI-NEXT: v_or_b32_e32 v5, v36, v5 -; SI-NEXT: v_or_b32_e32 v6, v61, v6 -; SI-NEXT: v_or_b32_e32 v7, v35, v7 -; SI-NEXT: v_or_b32_e32 v8, v60, v8 -; SI-NEXT: v_or_b32_e32 v9, v34, v9 -; SI-NEXT: v_or_b32_e32 v10, v63, v10 -; SI-NEXT: v_or_b32_e32 v11, v33, v11 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 +; SI-NEXT: v_or_b32_e32 v2, v38, v2 +; SI-NEXT: v_or_b32_e32 v3, v61, v3 +; SI-NEXT: v_or_b32_e32 v4, v37, v4 +; SI-NEXT: v_or_b32_e32 v5, v32, v5 +; SI-NEXT: v_or_b32_e32 v6, v36, v6 +; SI-NEXT: v_or_b32_e32 v7, v60, v7 +; SI-NEXT: v_or_b32_e32 v8, v35, v8 +; SI-NEXT: v_or_b32_e32 v9, v63, v9 +; SI-NEXT: v_or_b32_e32 v10, v34, v10 +; SI-NEXT: v_or_b32_e32 v11, v62, v11 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 @@ -27360,10 +27390,10 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v27, 3 ; VI-NEXT: v_add_u16_e32 v0, 3, v59 ; VI-NEXT: v_add_u16_sdwa v1, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 3, v58 -; VI-NEXT: v_add_u16_sdwa v3, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v58 +; VI-NEXT: v_add_u16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v57 ; VI-NEXT: v_add_u16_sdwa v3, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -27548,8 +27578,8 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46 ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47 ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v58 ; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28 ; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill @@ -27577,8 +27607,8 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38 ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37 ; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6 -; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6 -; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6 +; GFX9-NEXT: v_perm_b32 v1, v62, v58, s6 +; GFX9-NEXT: v_perm_b32 v2, v35, v57, s6 ; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6 ; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6 ; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6 @@ -27628,8 +27658,8 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 @@ -27719,8 +27749,8 @@ define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6 -; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6 -; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6 +; GFX9-NEXT: v_perm_b32 v1, v62, v58, s6 +; GFX9-NEXT: v_perm_b32 v2, v35, v57, s6 ; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6 ; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6 ; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6 @@ -28403,7 +28433,7 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: v_readfirstlane_b32 s6, v12 ; VI-NEXT: v_readfirstlane_b32 s9, v11 ; VI-NEXT: v_readfirstlane_b32 s8, v10 -; VI-NEXT: v_readfirstlane_b32 s87, v9 +; VI-NEXT: v_readfirstlane_b32 s10, v9 ; VI-NEXT: v_readfirstlane_b32 s12, v8 ; VI-NEXT: v_readfirstlane_b32 s73, v7 ; VI-NEXT: v_readfirstlane_b32 s77, v6 @@ -28425,13 +28455,13 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_lshr_b32 s11, s20, 16 ; VI-NEXT: s_lshr_b32 s13, s19, 16 ; VI-NEXT: s_lshr_b32 s15, s18, 16 -; VI-NEXT: s_lshr_b32 s10, s17, 16 +; VI-NEXT: s_lshr_b32 s87, s17, 16 ; VI-NEXT: s_lshr_b32 s75, s16, 16 ; VI-NEXT: s_lshr_b32 s64, s86, 16 ; VI-NEXT: s_lshr_b32 s65, s6, 16 ; VI-NEXT: s_lshr_b32 s66, s9, 16 ; VI-NEXT: s_lshr_b32 s14, s8, 16 -; VI-NEXT: s_lshr_b32 s72, s87, 16 +; VI-NEXT: s_lshr_b32 s72, s10, 16 ; VI-NEXT: s_lshr_b32 s74, s12, 16 ; VI-NEXT: s_lshr_b32 s76, s73, 16 ; VI-NEXT: s_lshr_b32 s78, s77, 16 @@ -28448,17 +28478,17 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s75, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s87, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s15, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s13, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s10, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s11, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s7, 16 @@ -28514,7 +28544,7 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, 0xffff, s12 ; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s58, s4, s5 -; VI-NEXT: s_and_b32 s4, 0xffff, s87 +; VI-NEXT: s_and_b32 s4, 0xffff, s10 ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s59, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s8 @@ -28534,14 +28564,14 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: s_and_b32 s4, s16, 0xffff ; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_or_b32 s4, s5, s4 ; VI-NEXT: s_add_i32 s17, s17, 3 +; VI-NEXT: s_add_i32 s36, s4, 0x30000 +; VI-NEXT: s_and_b32 s4, s17, 0xffff +; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_and_b32 s5, s17, 0xffff -; VI-NEXT: s_lshl_b32 s10, s10, 16 -; VI-NEXT: s_or_b32 s5, s10, s5 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s36, s4, 0x30000 -; VI-NEXT: s_add_i32 s37, s5, 0x30000 +; VI-NEXT: s_add_i32 s37, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s18, 0xffff ; VI-NEXT: s_lshl_b32 s5, s15, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 @@ -28645,7 +28675,7 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, s73, 0xffff ; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_add_i32 s15, s87, 3 +; VI-NEXT: s_add_i32 s15, s10, 3 ; VI-NEXT: s_add_i32 s58, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s15, 0xffff ; VI-NEXT: s_lshl_b32 s5, s72, 16 @@ -28741,20 +28771,8 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: .LBB43_4: ; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane ; VI-NEXT: s_mov_b32 vcc_lo, s64 -; VI-NEXT: v_writelane_b32 v29, s75, 0 +; VI-NEXT: v_writelane_b32 v29, s87, 0 ; VI-NEXT: s_mov_b32 vcc_hi, s65 -; VI-NEXT: s_mov_b32 s75, s73 -; VI-NEXT: s_mov_b32 s73, s12 -; VI-NEXT: v_writelane_b32 v29, s25, 1 -; VI-NEXT: s_mov_b32 s25, s91 -; VI-NEXT: s_mov_b32 s91, s26 -; VI-NEXT: s_mov_b32 s26, s27 -; VI-NEXT: s_mov_b32 s27, s88 -; VI-NEXT: s_mov_b32 s88, s28 -; VI-NEXT: s_mov_b32 s28, s77 -; VI-NEXT: s_mov_b32 s77, s29 -; VI-NEXT: s_mov_b32 s29, s15 -; VI-NEXT: s_mov_b32 s15, s87 ; VI-NEXT: s_mov_b32 s87, s85 ; VI-NEXT: s_mov_b32 s85, s82 ; VI-NEXT: s_mov_b32 s82, s71 @@ -28771,7 +28789,26 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_mov_b32 s74, s72 ; VI-NEXT: s_mov_b32 s72, s14 ; VI-NEXT: s_mov_b32 s14, s66 -; VI-NEXT: s_mov_b32 s12, s10 +; VI-NEXT: v_writelane_b32 v29, s84, 1 +; VI-NEXT: s_mov_b32 s84, s22 +; VI-NEXT: s_mov_b32 s22, s81 +; VI-NEXT: s_mov_b32 s81, s23 +; VI-NEXT: s_mov_b32 s23, s69 +; VI-NEXT: s_mov_b32 s69, s24 +; VI-NEXT: s_mov_b32 s24, s34 +; VI-NEXT: s_mov_b32 s34, s25 +; VI-NEXT: s_mov_b32 s25, s91 +; VI-NEXT: s_mov_b32 s91, s26 +; VI-NEXT: s_mov_b32 s26, s27 +; VI-NEXT: s_mov_b32 s27, s88 +; VI-NEXT: s_mov_b32 s88, s28 +; VI-NEXT: s_mov_b32 s28, s77 +; VI-NEXT: s_mov_b32 s77, s29 +; VI-NEXT: s_mov_b32 s29, s75 +; VI-NEXT: s_mov_b32 s75, s73 +; VI-NEXT: s_mov_b32 s73, s12 +; VI-NEXT: s_mov_b32 s12, s15 +; VI-NEXT: s_mov_b32 s15, s10 ; VI-NEXT: s_mov_b32 s10, s13 ; VI-NEXT: s_mov_b32 s13, s8 ; VI-NEXT: s_mov_b32 s8, s11 @@ -28795,7 +28832,26 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_mov_b32 s11, s8 ; VI-NEXT: s_mov_b32 s8, s13 ; VI-NEXT: s_mov_b32 s13, s10 -; VI-NEXT: s_mov_b32 s10, s12 +; VI-NEXT: s_mov_b32 s10, s15 +; VI-NEXT: s_mov_b32 s15, s12 +; VI-NEXT: s_mov_b32 s12, s73 +; VI-NEXT: s_mov_b32 s73, s75 +; VI-NEXT: s_mov_b32 s75, s29 +; VI-NEXT: s_mov_b32 s29, s77 +; VI-NEXT: s_mov_b32 s77, s28 +; VI-NEXT: s_mov_b32 s28, s88 +; VI-NEXT: s_mov_b32 s88, s27 +; VI-NEXT: s_mov_b32 s27, s26 +; VI-NEXT: s_mov_b32 s26, s91 +; VI-NEXT: s_mov_b32 s91, s25 +; VI-NEXT: s_mov_b32 s25, s34 +; VI-NEXT: s_mov_b32 s34, s24 +; VI-NEXT: s_mov_b32 s24, s69 +; VI-NEXT: s_mov_b32 s69, s23 +; VI-NEXT: s_mov_b32 s23, s81 +; VI-NEXT: s_mov_b32 s81, s22 +; VI-NEXT: s_mov_b32 s22, s84 +; VI-NEXT: v_readlane_b32 s84, v29, 1 ; VI-NEXT: s_mov_b32 s66, s14 ; VI-NEXT: s_mov_b32 s14, s72 ; VI-NEXT: s_mov_b32 s72, s74 @@ -28812,19 +28868,7 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; VI-NEXT: s_mov_b32 s71, s82 ; VI-NEXT: s_mov_b32 s82, s85 ; VI-NEXT: s_mov_b32 s85, s87 -; VI-NEXT: s_mov_b32 s87, s15 -; VI-NEXT: s_mov_b32 s15, s29 -; VI-NEXT: s_mov_b32 s29, s77 -; VI-NEXT: s_mov_b32 s77, s28 -; VI-NEXT: s_mov_b32 s28, s88 -; VI-NEXT: s_mov_b32 s88, s27 -; VI-NEXT: s_mov_b32 s27, s26 -; VI-NEXT: s_mov_b32 s26, s91 -; VI-NEXT: s_mov_b32 s91, s25 -; VI-NEXT: v_readlane_b32 s25, v29, 1 -; VI-NEXT: s_mov_b32 s12, s73 -; VI-NEXT: s_mov_b32 s73, s75 -; VI-NEXT: v_readlane_b32 s75, v29, 0 +; VI-NEXT: v_readlane_b32 s87, v29, 0 ; VI-NEXT: s_mov_b32 s65, vcc_hi ; VI-NEXT: s_mov_b32 s64, vcc_lo ; VI-NEXT: s_branch .LBB43_2 @@ -28847,12 +28891,8 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s30, 12 +; GFX9-NEXT: v_writelane_b32 v32, s31, 13 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 ; GFX9-NEXT: v_readfirstlane_b32 s62, v12 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 @@ -28862,17 +28902,11 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 ; GFX9-NEXT: v_readfirstlane_b32 s56, v6 ; GFX9-NEXT: v_readfirstlane_b32 s88, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v4 +; GFX9-NEXT: v_readfirstlane_b32 s92, v3 +; GFX9-NEXT: v_readfirstlane_b32 s94, v2 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v1 +; GFX9-NEXT: v_readfirstlane_b32 s30, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -28881,6 +28915,12 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 ; GFX9-NEXT: s_lshr_b32 s10, s23, 16 ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s72, s63, 16 ; GFX9-NEXT: s_lshr_b32 s73, s62, 16 ; GFX9-NEXT: s_lshr_b32 s74, s61, 16 @@ -28890,13 +28930,19 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s78, s57, 16 ; GFX9-NEXT: s_lshr_b32 s79, s56, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 ; GFX9-NEXT: v_readfirstlane_b32 s42, v14 ; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 ; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 @@ -28905,11 +28951,11 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s78 @@ -28988,6 +29034,8 @@ define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB43_5: ; %end +; GFX9-NEXT: v_readlane_b32 s30, v32, 12 +; GFX9-NEXT: v_readlane_b32 s31, v32, 13 ; GFX9-NEXT: v_readlane_b32 s55, v32, 11 ; GFX9-NEXT: v_readlane_b32 s54, v32, 10 ; GFX9-NEXT: v_readlane_b32 s53, v32, 9 @@ -30126,26 +30174,26 @@ define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i ; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[92:93], s[16:17], 16 ; SI-NEXT: .LBB45_3: ; %end -; SI-NEXT: s_lshl_b32 s43, s92, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s43, s92, 16 ; SI-NEXT: s_or_b32 s16, s16, s43 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s43, s53, 16 ; SI-NEXT: s_or_b32 s17, s17, s43 -; SI-NEXT: s_lshl_b32 s43, s90, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s43, s90, 16 ; SI-NEXT: s_or_b32 s18, s18, s43 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s43, s52, 16 ; SI-NEXT: s_or_b32 s19, s19, s43 -; SI-NEXT: s_lshl_b32 s43, s88, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s43, s88, 16 ; SI-NEXT: s_or_b32 s20, s20, s43 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s43, s51, 16 ; SI-NEXT: s_or_b32 s21, s21, s43 -; SI-NEXT: s_lshl_b32 s43, s78, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s43, s78, 16 ; SI-NEXT: s_or_b32 s22, s22, s43 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s43, s50, 16 @@ -31042,15 +31090,15 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v40 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v40 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v41 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v56 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v57 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v58 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59 @@ -31073,18 +31121,18 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v58 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v58 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v32 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v37 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v46 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36 @@ -31096,16 +31144,16 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v60 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v34 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v60 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v33 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55 ; SI-NEXT: ; implicit-def: $vgpr59 @@ -31124,15 +31172,15 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload @@ -31278,150 +31326,172 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB46_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v39 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v59 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v38 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v57 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v56 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v47 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v57 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v37 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v62 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v56 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v47 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v36 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v46 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v61 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v37 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v45 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v44 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v34 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v60 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v36 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v42 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v41 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v42 +; SI-NEXT: v_or_b32_e32 v8, v9, v8 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v33 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v41 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v40 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v55 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v63 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v40 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v54 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v53 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v55 +; SI-NEXT: v_or_b32_e32 v11, v12, v11 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v60 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v54 ; SI-NEXT: v_cvt_f32_f16_e32 v17, v52 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v51 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v34 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v49 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v21, v48 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v63 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v33 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v53 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 +; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_or_b32_e32 v14, v15, v14 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 -; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 @@ -31429,40 +31499,17 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 ; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 ; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v28, v28 -; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 -; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 +; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28 ; SI-NEXT: v_cvt_f16_f32_e32 v28, v28 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v15, v17, v15 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 +; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -31711,10 +31758,10 @@ define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v27, 0x200 ; VI-NEXT: v_add_f16_sdwa v0, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, 0x200, v59 -; VI-NEXT: v_add_f16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, 0x200, v58 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_add_f16_sdwa v1, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, 0x200, v58 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_add_f16_sdwa v2, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, 0x200, v57 ; VI-NEXT: v_or_b32_e32 v2, v3, v2 @@ -32860,7 +32907,7 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; VI-NEXT: v_readfirstlane_b32 s83, v0 ; VI-NEXT: v_writelane_b32 v33, s15, 0 ; VI-NEXT: s_lshr_b32 s56, s29, 16 -; VI-NEXT: s_lshr_b32 s75, s28, 16 +; VI-NEXT: s_lshr_b32 s88, s28, 16 ; VI-NEXT: s_lshr_b32 s90, s27, 16 ; VI-NEXT: s_lshr_b32 s31, s26, 16 ; VI-NEXT: s_lshr_b32 s68, s25, 16 @@ -32895,17 +32942,17 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s13, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s11, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s9, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s7, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s11, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s87, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s86, 16 @@ -32929,7 +32976,7 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; VI-NEXT: s_lshl_b32 s5, s90, 16 ; VI-NEXT: s_or_b32 s47, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s28 -; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_lshl_b32 s5, s88, 16 ; VI-NEXT: s_or_b32 s48, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s29 ; VI-NEXT: s_lshl_b32 s5, s56, 16 @@ -32958,7 +33005,6 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; VI-NEXT: s_or_b32 s56, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s74 ; VI-NEXT: s_lshl_b32 s5, s57, 16 -; VI-NEXT: s_mov_b32 s73, s75 ; VI-NEXT: s_mov_b32 s75, s57 ; VI-NEXT: s_or_b32 s57, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s72 @@ -32976,7 +33022,7 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; VI-NEXT: s_or_b32 s61, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s8 ; VI-NEXT: s_lshl_b32 s5, s15, 16 -; VI-NEXT: s_mov_b32 s88, s62 +; VI-NEXT: s_mov_b32 s73, s62 ; VI-NEXT: s_or_b32 s62, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s6 ; VI-NEXT: s_lshl_b32 s5, s63, 16 @@ -32986,13 +33032,13 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; VI-NEXT: .LBB47_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v27, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s13 -; VI-NEXT: v_mov_b32_e32 v2, s11 ; VI-NEXT: v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v27 -; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v27 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s11 +; VI-NEXT: v_add_f16_sdwa v1, v1, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v27 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s9 ; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v27 @@ -33033,7 +33079,7 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; VI-NEXT: v_add_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v12, s27, v27 ; VI-NEXT: v_or_b32_e32 v11, v12, v11 -; VI-NEXT: v_mov_b32_e32 v12, s73 +; VI-NEXT: v_mov_b32_e32 v12, s88 ; VI-NEXT: v_add_f16_sdwa v12, v12, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v13, s28, v27 ; VI-NEXT: v_or_b32_e32 v12, v13, v12 @@ -33065,7 +33111,7 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; VI-NEXT: v_add_f16_sdwa v19, v19, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v20, s79, v27 ; VI-NEXT: v_or_b32_e32 v19, v20, v19 -; VI-NEXT: v_mov_b32_e32 v20, s88 +; VI-NEXT: v_mov_b32_e32 v20, s73 ; VI-NEXT: v_add_f16_sdwa v20, v20, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v21, s76, v27 ; VI-NEXT: v_or_b32_e32 v20, v21, v20 @@ -33103,8 +33149,7 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; VI-NEXT: v_or_b32_e32 v27, v27, v28 ; VI-NEXT: s_branch .LBB47_5 ; VI-NEXT: .LBB47_3: -; VI-NEXT: s_mov_b32 s73, s75 -; VI-NEXT: s_mov_b32 s88, s62 +; VI-NEXT: s_mov_b32 s73, s62 ; VI-NEXT: s_mov_b32 s77, s56 ; VI-NEXT: s_mov_b32 s75, s57 ; VI-NEXT: s_mov_b32 s78, s58 @@ -33202,12 +33247,8 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s30, 12 +; GFX9-NEXT: v_writelane_b32 v32, s31, 13 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 ; GFX9-NEXT: v_readfirstlane_b32 s62, v12 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 @@ -33217,17 +33258,11 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 ; GFX9-NEXT: v_readfirstlane_b32 s56, v6 ; GFX9-NEXT: v_readfirstlane_b32 s88, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v4 +; GFX9-NEXT: v_readfirstlane_b32 s92, v3 +; GFX9-NEXT: v_readfirstlane_b32 s94, v2 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v1 +; GFX9-NEXT: v_readfirstlane_b32 s30, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -33236,6 +33271,12 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 ; GFX9-NEXT: s_lshr_b32 s10, s23, 16 ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s72, s63, 16 ; GFX9-NEXT: s_lshr_b32 s73, s62, 16 ; GFX9-NEXT: s_lshr_b32 s74, s61, 16 @@ -33245,13 +33286,19 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s78, s57, 16 ; GFX9-NEXT: s_lshr_b32 s79, s56, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 ; GFX9-NEXT: v_readfirstlane_b32 s42, v14 ; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 ; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 @@ -33260,11 +33307,11 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s78 @@ -33344,6 +33391,8 @@ define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB47_5: ; %end +; GFX9-NEXT: v_readlane_b32 s30, v32, 12 +; GFX9-NEXT: v_readlane_b32 s31, v32, 13 ; GFX9-NEXT: v_readlane_b32 s55, v32, 11 ; GFX9-NEXT: v_readlane_b32 s54, v32, 10 ; GFX9-NEXT: v_readlane_b32 s53, v32, 9 @@ -34276,32 +34325,31 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_writelane_b32 v58, s34, 0 -; SI-NEXT: v_writelane_b32 v58, s35, 1 -; SI-NEXT: v_writelane_b32 v58, s36, 2 -; SI-NEXT: v_writelane_b32 v58, s37, 3 -; SI-NEXT: v_writelane_b32 v58, s38, 4 -; SI-NEXT: v_writelane_b32 v58, s39, 5 -; SI-NEXT: v_writelane_b32 v58, s48, 6 -; SI-NEXT: v_writelane_b32 v58, s49, 7 -; SI-NEXT: v_writelane_b32 v58, s50, 8 -; SI-NEXT: v_writelane_b32 v58, s51, 9 -; SI-NEXT: v_writelane_b32 v58, s52, 10 -; SI-NEXT: v_writelane_b32 v58, s53, 11 -; SI-NEXT: v_writelane_b32 v58, s30, 12 -; SI-NEXT: v_writelane_b32 v58, s31, 13 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: v_writelane_b32 v57, s34, 0 +; SI-NEXT: v_writelane_b32 v57, s35, 1 +; SI-NEXT: v_writelane_b32 v57, s36, 2 +; SI-NEXT: v_writelane_b32 v57, s37, 3 +; SI-NEXT: v_writelane_b32 v57, s38, 4 +; SI-NEXT: v_writelane_b32 v57, s39, 5 +; SI-NEXT: v_writelane_b32 v57, s48, 6 +; SI-NEXT: v_writelane_b32 v57, s49, 7 +; SI-NEXT: v_writelane_b32 v57, s50, 8 +; SI-NEXT: v_writelane_b32 v57, s51, 9 +; SI-NEXT: v_writelane_b32 v57, s52, 10 +; SI-NEXT: v_writelane_b32 v57, s53, 11 +; SI-NEXT: v_writelane_b32 v57, s30, 12 +; SI-NEXT: v_writelane_b32 v57, s31, 13 ; SI-NEXT: v_readfirstlane_b32 s4, v14 ; SI-NEXT: v_readfirstlane_b32 s41, v13 ; SI-NEXT: v_readfirstlane_b32 s40, v12 @@ -34384,21 +34432,21 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v21 ; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v15 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v15 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v13 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v11 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v9 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 ; SI-NEXT: s_branch .LBB49_5 ; SI-NEXT: .LBB49_3: ; SI-NEXT: ; implicit-def: $sgpr92 @@ -34431,16 +34479,6 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; SI-NEXT: ; implicit-def: $sgpr53 ; SI-NEXT: s_branch .LBB49_2 ; SI-NEXT: .LBB49_4: -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v6, s22 -; SI-NEXT: v_mov_b32_e32 v9, s25 -; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v27, s41 ; SI-NEXT: v_mov_b32_e32 v25, s15 ; SI-NEXT: v_mov_b32_e32 v23, s13 @@ -34450,6 +34488,16 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v15, s5 ; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v4, s20 +; SI-NEXT: v_mov_b32_e32 v6, s22 +; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v10, s26 ; SI-NEXT: v_mov_b32_e32 v12, s28 ; SI-NEXT: v_mov_b32_e32 v14, s4 @@ -34465,21 +34513,21 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v55, s50 ; SI-NEXT: v_mov_b32_e32 v40, s49 ; SI-NEXT: v_mov_b32_e32 v41, s48 -; SI-NEXT: v_mov_b32_e32 v42, s39 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_mov_b32_e32 v43, s38 +; SI-NEXT: v_mov_b32_e32 v42, s39 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_mov_b32_e32 v44, s37 +; SI-NEXT: v_mov_b32_e32 v43, s38 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v45, s36 +; SI-NEXT: v_mov_b32_e32 v44, s37 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_mov_b32_e32 v46, s35 +; SI-NEXT: v_mov_b32_e32 v45, s36 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v47, s34 +; SI-NEXT: v_mov_b32_e32 v46, s35 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v56, s31 +; SI-NEXT: v_mov_b32_e32 v47, s34 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v57, s30 +; SI-NEXT: v_mov_b32_e32 v56, s31 +; SI-NEXT: v_mov_b32_e32 v39, s30 ; SI-NEXT: v_mov_b32_e32 v50, s92 ; SI-NEXT: v_mov_b32_e32 v49, s90 ; SI-NEXT: v_mov_b32_e32 v48, s88 @@ -34495,22 +34543,19 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v29, s44 ; SI-NEXT: v_mov_b32_e32 v28, s42 ; SI-NEXT: .LBB49_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v39 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 ; SI-NEXT: v_or_b32_e32 v1, v1, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 ; SI-NEXT: v_or_b32_e32 v2, v2, v39 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56 ; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -34539,16 +34584,15 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v41 ; SI-NEXT: v_or_b32_e32 v18, v18, v32 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 @@ -34557,6 +34601,8 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 @@ -34577,7 +34623,8 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; SI-NEXT: v_or_b32_e32 v26, v26, v28 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52 -; SI-NEXT: v_readlane_b32 s30, v58, 12 +; SI-NEXT: v_readlane_b32 s30, v57, 12 +; SI-NEXT: v_or_b32_e32 v0, v0, v50 ; SI-NEXT: v_or_b32_e32 v5, v5, v39 ; SI-NEXT: v_or_b32_e32 v7, v7, v38 ; SI-NEXT: v_or_b32_e32 v9, v9, v37 @@ -34590,21 +34637,21 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; SI-NEXT: v_or_b32_e32 v23, v23, v30 ; SI-NEXT: v_or_b32_e32 v25, v25, v29 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: v_readlane_b32 s31, v58, 13 -; SI-NEXT: v_readlane_b32 s53, v58, 11 -; SI-NEXT: v_readlane_b32 s52, v58, 10 -; SI-NEXT: v_readlane_b32 s51, v58, 9 -; SI-NEXT: v_readlane_b32 s50, v58, 8 -; SI-NEXT: v_readlane_b32 s49, v58, 7 -; SI-NEXT: v_readlane_b32 s48, v58, 6 -; SI-NEXT: v_readlane_b32 s39, v58, 5 -; SI-NEXT: v_readlane_b32 s38, v58, 4 -; SI-NEXT: v_readlane_b32 s37, v58, 3 -; SI-NEXT: v_readlane_b32 s36, v58, 2 -; SI-NEXT: v_readlane_b32 s35, v58, 1 -; SI-NEXT: v_readlane_b32 s34, v58, 0 +; SI-NEXT: v_readlane_b32 s31, v57, 13 +; SI-NEXT: v_readlane_b32 s53, v57, 11 +; SI-NEXT: v_readlane_b32 s52, v57, 10 +; SI-NEXT: v_readlane_b32 s51, v57, 9 +; SI-NEXT: v_readlane_b32 s50, v57, 8 +; SI-NEXT: v_readlane_b32 s49, v57, 7 +; SI-NEXT: v_readlane_b32 s48, v57, 6 +; SI-NEXT: v_readlane_b32 s39, v57, 5 +; SI-NEXT: v_readlane_b32 s38, v57, 4 +; SI-NEXT: v_readlane_b32 s37, v57, 3 +; SI-NEXT: v_readlane_b32 s36, v57, 2 +; SI-NEXT: v_readlane_b32 s35, v57, 1 +; SI-NEXT: v_readlane_b32 s34, v57, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -34628,16 +34675,16 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; VI-NEXT: v_writelane_b32 v56, s30, 2 ; VI-NEXT: v_writelane_b32 v56, s31, 3 ; VI-NEXT: v_readfirstlane_b32 s4, v14 -; VI-NEXT: v_readfirstlane_b32 s9, v13 -; VI-NEXT: v_readfirstlane_b32 s8, v12 -; VI-NEXT: v_readfirstlane_b32 s11, v11 -; VI-NEXT: v_readfirstlane_b32 s10, v10 +; VI-NEXT: v_readfirstlane_b32 s41, v13 +; VI-NEXT: v_readfirstlane_b32 s40, v12 +; VI-NEXT: v_readfirstlane_b32 s15, v11 +; VI-NEXT: v_readfirstlane_b32 s14, v10 ; VI-NEXT: v_readfirstlane_b32 s13, v9 ; VI-NEXT: v_readfirstlane_b32 s12, v8 -; VI-NEXT: v_readfirstlane_b32 s15, v7 -; VI-NEXT: v_readfirstlane_b32 s14, v6 -; VI-NEXT: v_readfirstlane_b32 s41, v5 -; VI-NEXT: v_readfirstlane_b32 s40, v4 +; VI-NEXT: v_readfirstlane_b32 s11, v7 +; VI-NEXT: v_readfirstlane_b32 s10, v6 +; VI-NEXT: v_readfirstlane_b32 s9, v5 +; VI-NEXT: v_readfirstlane_b32 s8, v4 ; VI-NEXT: v_readfirstlane_b32 s7, v3 ; VI-NEXT: v_readfirstlane_b32 s6, v2 ; VI-NEXT: v_readfirstlane_b32 s5, v1 @@ -34645,16 +34692,16 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; VI-NEXT: v_readfirstlane_b32 s4, v0 ; VI-NEXT: s_cbranch_scc0 .LBB49_3 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: s_lshr_b32 s44, s9, 16 -; VI-NEXT: s_lshr_b32 s74, s8, 16 -; VI-NEXT: s_lshr_b32 s45, s11, 16 -; VI-NEXT: s_lshr_b32 s75, s10, 16 +; VI-NEXT: s_lshr_b32 s44, s41, 16 +; VI-NEXT: s_lshr_b32 s74, s40, 16 +; VI-NEXT: s_lshr_b32 s45, s15, 16 +; VI-NEXT: s_lshr_b32 s75, s14, 16 ; VI-NEXT: s_lshr_b32 s46, s13, 16 ; VI-NEXT: s_lshr_b32 s76, s12, 16 -; VI-NEXT: s_lshr_b32 s47, s15, 16 -; VI-NEXT: s_lshr_b32 s77, s14, 16 -; VI-NEXT: s_lshr_b32 s56, s41, 16 -; VI-NEXT: s_lshr_b32 s78, s40, 16 +; VI-NEXT: s_lshr_b32 s47, s11, 16 +; VI-NEXT: s_lshr_b32 s77, s10, 16 +; VI-NEXT: s_lshr_b32 s56, s9, 16 +; VI-NEXT: s_lshr_b32 s78, s8, 16 ; VI-NEXT: s_lshr_b32 s57, s7, 16 ; VI-NEXT: s_lshr_b32 s79, s6, 16 ; VI-NEXT: s_lshr_b32 s58, s5, 16 @@ -34675,11 +34722,11 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; VI-NEXT: s_lshr_b32 s35, s16, 16 ; VI-NEXT: s_cbranch_execnz .LBB49_4 ; VI-NEXT: .LBB49_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[26:27], s[8:9], 1.0 -; VI-NEXT: v_add_f64 v[24:25], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 +; VI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 ; VI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 -; VI-NEXT: v_add_f64 v[20:21], s[14:15], 1.0 -; VI-NEXT: v_add_f64 v[18:19], s[40:41], 1.0 +; VI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; VI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; VI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -34758,7 +34805,11 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; VI-NEXT: v_mov_b32_e32 v12, s28 ; VI-NEXT: v_mov_b32_e32 v14, s4 ; VI-NEXT: v_mov_b32_e32 v16, s6 -; VI-NEXT: v_mov_b32_e32 v18, s40 +; VI-NEXT: v_mov_b32_e32 v18, s8 +; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_mov_b32_e32 v22, s12 +; VI-NEXT: v_mov_b32_e32 v24, s14 +; VI-NEXT: v_mov_b32_e32 v26, s40 ; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v3, s19 ; VI-NEXT: v_mov_b32_e32 v5, s21 @@ -34768,15 +34819,11 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; VI-NEXT: v_mov_b32_e32 v13, s29 ; VI-NEXT: v_mov_b32_e32 v15, s5 ; VI-NEXT: v_mov_b32_e32 v17, s7 -; VI-NEXT: v_mov_b32_e32 v19, s41 -; VI-NEXT: v_mov_b32_e32 v20, s14 -; VI-NEXT: v_mov_b32_e32 v21, s15 -; VI-NEXT: v_mov_b32_e32 v22, s12 +; VI-NEXT: v_mov_b32_e32 v19, s9 +; VI-NEXT: v_mov_b32_e32 v21, s11 ; VI-NEXT: v_mov_b32_e32 v23, s13 -; VI-NEXT: v_mov_b32_e32 v24, s10 -; VI-NEXT: v_mov_b32_e32 v25, s11 -; VI-NEXT: v_mov_b32_e32 v26, s8 -; VI-NEXT: v_mov_b32_e32 v27, s9 +; VI-NEXT: v_mov_b32_e32 v25, s15 +; VI-NEXT: v_mov_b32_e32 v27, s41 ; VI-NEXT: v_mov_b32_e32 v44, s35 ; VI-NEXT: v_mov_b32_e32 v42, s34 ; VI-NEXT: v_mov_b32_e32 v40, s31 @@ -34892,16 +34939,16 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: v_readfirstlane_b32 s4, v14 -; GFX9-NEXT: v_readfirstlane_b32 s9, v13 -; GFX9-NEXT: v_readfirstlane_b32 s8, v12 -; GFX9-NEXT: v_readfirstlane_b32 s11, v11 -; GFX9-NEXT: v_readfirstlane_b32 s10, v10 +; GFX9-NEXT: v_readfirstlane_b32 s41, v13 +; GFX9-NEXT: v_readfirstlane_b32 s40, v12 +; GFX9-NEXT: v_readfirstlane_b32 s15, v11 +; GFX9-NEXT: v_readfirstlane_b32 s14, v10 ; GFX9-NEXT: v_readfirstlane_b32 s13, v9 ; GFX9-NEXT: v_readfirstlane_b32 s12, v8 -; GFX9-NEXT: v_readfirstlane_b32 s15, v7 -; GFX9-NEXT: v_readfirstlane_b32 s14, v6 -; GFX9-NEXT: v_readfirstlane_b32 s41, v5 -; GFX9-NEXT: v_readfirstlane_b32 s40, v4 +; GFX9-NEXT: v_readfirstlane_b32 s11, v7 +; GFX9-NEXT: v_readfirstlane_b32 s10, v6 +; GFX9-NEXT: v_readfirstlane_b32 s9, v5 +; GFX9-NEXT: v_readfirstlane_b32 s8, v4 ; GFX9-NEXT: v_readfirstlane_b32 s7, v3 ; GFX9-NEXT: v_readfirstlane_b32 s6, v2 ; GFX9-NEXT: v_readfirstlane_b32 s5, v1 @@ -34909,16 +34956,16 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s4, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB49_3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: s_lshr_b32 s44, s9, 16 -; GFX9-NEXT: s_lshr_b32 s74, s8, 16 -; GFX9-NEXT: s_lshr_b32 s45, s11, 16 -; GFX9-NEXT: s_lshr_b32 s75, s10, 16 +; GFX9-NEXT: s_lshr_b32 s44, s41, 16 +; GFX9-NEXT: s_lshr_b32 s74, s40, 16 +; GFX9-NEXT: s_lshr_b32 s45, s15, 16 +; GFX9-NEXT: s_lshr_b32 s75, s14, 16 ; GFX9-NEXT: s_lshr_b32 s46, s13, 16 ; GFX9-NEXT: s_lshr_b32 s76, s12, 16 -; GFX9-NEXT: s_lshr_b32 s47, s15, 16 -; GFX9-NEXT: s_lshr_b32 s77, s14, 16 -; GFX9-NEXT: s_lshr_b32 s56, s41, 16 -; GFX9-NEXT: s_lshr_b32 s78, s40, 16 +; GFX9-NEXT: s_lshr_b32 s47, s11, 16 +; GFX9-NEXT: s_lshr_b32 s77, s10, 16 +; GFX9-NEXT: s_lshr_b32 s56, s9, 16 +; GFX9-NEXT: s_lshr_b32 s78, s8, 16 ; GFX9-NEXT: s_lshr_b32 s57, s7, 16 ; GFX9-NEXT: s_lshr_b32 s79, s6, 16 ; GFX9-NEXT: s_lshr_b32 s58, s5, 16 @@ -34939,11 +34986,11 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; GFX9-NEXT: s_lshr_b32 s95, s16, 16 ; GFX9-NEXT: s_cbranch_execnz .LBB49_4 ; GFX9-NEXT: .LBB49_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[26:27], s[8:9], 1.0 -; GFX9-NEXT: v_add_f64 v[24:25], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 +; GFX9-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 ; GFX9-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 -; GFX9-NEXT: v_add_f64 v[20:21], s[14:15], 1.0 -; GFX9-NEXT: v_add_f64 v[18:19], s[40:41], 1.0 +; GFX9-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; GFX9-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; GFX9-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -35022,7 +35069,11 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v12, s28 ; GFX9-NEXT: v_mov_b32_e32 v14, s4 ; GFX9-NEXT: v_mov_b32_e32 v16, s6 -; GFX9-NEXT: v_mov_b32_e32 v18, s40 +; GFX9-NEXT: v_mov_b32_e32 v18, s8 +; GFX9-NEXT: v_mov_b32_e32 v20, s10 +; GFX9-NEXT: v_mov_b32_e32 v22, s12 +; GFX9-NEXT: v_mov_b32_e32 v24, s14 +; GFX9-NEXT: v_mov_b32_e32 v26, s40 ; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: v_mov_b32_e32 v5, s21 @@ -35032,15 +35083,11 @@ define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v13, s29 ; GFX9-NEXT: v_mov_b32_e32 v15, s5 ; GFX9-NEXT: v_mov_b32_e32 v17, s7 -; GFX9-NEXT: v_mov_b32_e32 v19, s41 -; GFX9-NEXT: v_mov_b32_e32 v20, s14 -; GFX9-NEXT: v_mov_b32_e32 v21, s15 -; GFX9-NEXT: v_mov_b32_e32 v22, s12 +; GFX9-NEXT: v_mov_b32_e32 v19, s9 +; GFX9-NEXT: v_mov_b32_e32 v21, s11 ; GFX9-NEXT: v_mov_b32_e32 v23, s13 -; GFX9-NEXT: v_mov_b32_e32 v24, s10 -; GFX9-NEXT: v_mov_b32_e32 v25, s11 -; GFX9-NEXT: v_mov_b32_e32 v26, s8 -; GFX9-NEXT: v_mov_b32_e32 v27, s9 +; GFX9-NEXT: v_mov_b32_e32 v25, s15 +; GFX9-NEXT: v_mov_b32_e32 v27, s41 ; GFX9-NEXT: v_mov_b32_e32 v44, s95 ; GFX9-NEXT: v_mov_b32_e32 v42, s94 ; GFX9-NEXT: v_mov_b32_e32 v40, s93 @@ -35629,17 +35676,17 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v59 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v26 -; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v25 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v24 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v23 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v22 -; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v21 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v20 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v19 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v18 -; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v17 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v25 +; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v21 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v19 +; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v17 +; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v16 ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 @@ -35700,17 +35747,17 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40 ; SI-NEXT: v_or_b32_e32 v0, v0, v39 -; SI-NEXT: v_or_b32_e32 v1, v1, v38 -; SI-NEXT: v_or_b32_e32 v2, v2, v62 -; SI-NEXT: v_or_b32_e32 v3, v3, v37 -; SI-NEXT: v_or_b32_e32 v4, v4, v32 -; SI-NEXT: v_or_b32_e32 v5, v5, v36 -; SI-NEXT: v_or_b32_e32 v6, v6, v61 -; SI-NEXT: v_or_b32_e32 v7, v7, v35 -; SI-NEXT: v_or_b32_e32 v8, v8, v60 -; SI-NEXT: v_or_b32_e32 v9, v9, v34 -; SI-NEXT: v_or_b32_e32 v10, v10, v63 -; SI-NEXT: v_or_b32_e32 v11, v11, v33 +; SI-NEXT: v_or_b32_e32 v1, v1, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v38 +; SI-NEXT: v_or_b32_e32 v3, v3, v61 +; SI-NEXT: v_or_b32_e32 v4, v4, v37 +; SI-NEXT: v_or_b32_e32 v5, v5, v32 +; SI-NEXT: v_or_b32_e32 v6, v6, v36 +; SI-NEXT: v_or_b32_e32 v7, v7, v60 +; SI-NEXT: v_or_b32_e32 v8, v8, v35 +; SI-NEXT: v_or_b32_e32 v9, v9, v63 +; SI-NEXT: v_or_b32_e32 v10, v10, v34 +; SI-NEXT: v_or_b32_e32 v11, v11, v62 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr57 @@ -35725,17 +35772,17 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr40 ; SI-NEXT: ; implicit-def: $vgpr55 ; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr61 -; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr60 -; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr63 -; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr34 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload @@ -35894,17 +35941,17 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_or_b32_e32 v0, v39, v0 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v1, v38, v1 -; SI-NEXT: v_or_b32_e32 v2, v62, v2 -; SI-NEXT: v_or_b32_e32 v3, v37, v3 -; SI-NEXT: v_or_b32_e32 v4, v32, v4 -; SI-NEXT: v_or_b32_e32 v5, v36, v5 -; SI-NEXT: v_or_b32_e32 v6, v61, v6 -; SI-NEXT: v_or_b32_e32 v7, v35, v7 -; SI-NEXT: v_or_b32_e32 v8, v60, v8 -; SI-NEXT: v_or_b32_e32 v9, v34, v9 -; SI-NEXT: v_or_b32_e32 v10, v63, v10 -; SI-NEXT: v_or_b32_e32 v11, v33, v11 +; SI-NEXT: v_or_b32_e32 v1, v33, v1 +; SI-NEXT: v_or_b32_e32 v2, v38, v2 +; SI-NEXT: v_or_b32_e32 v3, v61, v3 +; SI-NEXT: v_or_b32_e32 v4, v37, v4 +; SI-NEXT: v_or_b32_e32 v5, v32, v5 +; SI-NEXT: v_or_b32_e32 v6, v36, v6 +; SI-NEXT: v_or_b32_e32 v7, v60, v7 +; SI-NEXT: v_or_b32_e32 v8, v35, v8 +; SI-NEXT: v_or_b32_e32 v9, v63, v9 +; SI-NEXT: v_or_b32_e32 v10, v34, v10 +; SI-NEXT: v_or_b32_e32 v11, v62, v11 ; SI-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 ; SI-NEXT: v_add_i32_e32 v1, vcc, s6, v1 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v2 @@ -36174,10 +36221,10 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v27, 3 ; VI-NEXT: v_add_u16_e32 v0, 3, v59 ; VI-NEXT: v_add_u16_sdwa v1, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 3, v58 -; VI-NEXT: v_add_u16_sdwa v3, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v58 +; VI-NEXT: v_add_u16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v57 ; VI-NEXT: v_add_u16_sdwa v3, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -36362,8 +36409,8 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v46 ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v47 ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56 -; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v57 -; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v58 +; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57 +; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v58 ; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v59 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28 ; GFX9-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill @@ -36391,8 +36438,8 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v38 ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v37 ; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6 -; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6 -; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6 +; GFX9-NEXT: v_perm_b32 v1, v62, v58, s6 +; GFX9-NEXT: v_perm_b32 v2, v35, v57, s6 ; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6 ; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6 ; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6 @@ -36442,8 +36489,8 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr61 ; GFX9-NEXT: ; implicit-def: $vgpr33 ; GFX9-NEXT: ; implicit-def: $vgpr34 -; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr35 +; GFX9-NEXT: ; implicit-def: $vgpr62 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_perm_b32 v23, v24, v23, s6 @@ -36533,8 +36580,8 @@ define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; GFX9-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; GFX9-NEXT: v_perm_b32 v0, v36, v59, s6 -; GFX9-NEXT: v_perm_b32 v1, v35, v58, s6 -; GFX9-NEXT: v_perm_b32 v2, v62, v57, s6 +; GFX9-NEXT: v_perm_b32 v1, v62, v58, s6 +; GFX9-NEXT: v_perm_b32 v2, v35, v57, s6 ; GFX9-NEXT: v_perm_b32 v3, v34, v56, s6 ; GFX9-NEXT: v_perm_b32 v4, v33, v47, s6 ; GFX9-NEXT: v_perm_b32 v5, v61, v46, s6 @@ -37217,7 +37264,7 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; VI-NEXT: v_readfirstlane_b32 s6, v12 ; VI-NEXT: v_readfirstlane_b32 s9, v11 ; VI-NEXT: v_readfirstlane_b32 s8, v10 -; VI-NEXT: v_readfirstlane_b32 s87, v9 +; VI-NEXT: v_readfirstlane_b32 s10, v9 ; VI-NEXT: v_readfirstlane_b32 s12, v8 ; VI-NEXT: v_readfirstlane_b32 s73, v7 ; VI-NEXT: v_readfirstlane_b32 s77, v6 @@ -37239,13 +37286,13 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_lshr_b32 s11, s20, 16 ; VI-NEXT: s_lshr_b32 s13, s19, 16 ; VI-NEXT: s_lshr_b32 s15, s18, 16 -; VI-NEXT: s_lshr_b32 s10, s17, 16 +; VI-NEXT: s_lshr_b32 s87, s17, 16 ; VI-NEXT: s_lshr_b32 s75, s16, 16 ; VI-NEXT: s_lshr_b32 s64, s86, 16 ; VI-NEXT: s_lshr_b32 s65, s6, 16 ; VI-NEXT: s_lshr_b32 s66, s9, 16 ; VI-NEXT: s_lshr_b32 s14, s8, 16 -; VI-NEXT: s_lshr_b32 s72, s87, 16 +; VI-NEXT: s_lshr_b32 s72, s10, 16 ; VI-NEXT: s_lshr_b32 s74, s12, 16 ; VI-NEXT: s_lshr_b32 s76, s73, 16 ; VI-NEXT: s_lshr_b32 s78, s77, 16 @@ -37262,17 +37309,17 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s75, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s87, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s15, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s13, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s10, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s11, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s7, 16 @@ -37328,7 +37375,7 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s12 ; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s58, s4, s5 -; VI-NEXT: s_and_b32 s4, 0xffff, s87 +; VI-NEXT: s_and_b32 s4, 0xffff, s10 ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s59, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s8 @@ -37348,14 +37395,14 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: s_and_b32 s4, s16, 0xffff ; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_or_b32 s4, s5, s4 ; VI-NEXT: s_add_i32 s17, s17, 3 +; VI-NEXT: s_add_i32 s36, s4, 0x30000 +; VI-NEXT: s_and_b32 s4, s17, 0xffff +; VI-NEXT: s_lshl_b32 s5, s87, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_and_b32 s5, s17, 0xffff -; VI-NEXT: s_lshl_b32 s10, s10, 16 -; VI-NEXT: s_or_b32 s5, s10, s5 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s36, s4, 0x30000 -; VI-NEXT: s_add_i32 s37, s5, 0x30000 +; VI-NEXT: s_add_i32 s37, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s18, 0xffff ; VI-NEXT: s_lshl_b32 s5, s15, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 @@ -37459,7 +37506,7 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, s73, 0xffff ; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_add_i32 s15, s87, 3 +; VI-NEXT: s_add_i32 s15, s10, 3 ; VI-NEXT: s_add_i32 s58, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s15, 0xffff ; VI-NEXT: s_lshl_b32 s5, s72, 16 @@ -37555,20 +37602,8 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; VI-NEXT: .LBB51_4: ; VI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane ; VI-NEXT: s_mov_b32 vcc_lo, s64 -; VI-NEXT: v_writelane_b32 v29, s75, 0 +; VI-NEXT: v_writelane_b32 v29, s87, 0 ; VI-NEXT: s_mov_b32 vcc_hi, s65 -; VI-NEXT: s_mov_b32 s75, s73 -; VI-NEXT: s_mov_b32 s73, s12 -; VI-NEXT: v_writelane_b32 v29, s25, 1 -; VI-NEXT: s_mov_b32 s25, s91 -; VI-NEXT: s_mov_b32 s91, s26 -; VI-NEXT: s_mov_b32 s26, s27 -; VI-NEXT: s_mov_b32 s27, s88 -; VI-NEXT: s_mov_b32 s88, s28 -; VI-NEXT: s_mov_b32 s28, s77 -; VI-NEXT: s_mov_b32 s77, s29 -; VI-NEXT: s_mov_b32 s29, s15 -; VI-NEXT: s_mov_b32 s15, s87 ; VI-NEXT: s_mov_b32 s87, s85 ; VI-NEXT: s_mov_b32 s85, s82 ; VI-NEXT: s_mov_b32 s82, s71 @@ -37585,7 +37620,26 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_mov_b32 s74, s72 ; VI-NEXT: s_mov_b32 s72, s14 ; VI-NEXT: s_mov_b32 s14, s66 -; VI-NEXT: s_mov_b32 s12, s10 +; VI-NEXT: v_writelane_b32 v29, s84, 1 +; VI-NEXT: s_mov_b32 s84, s22 +; VI-NEXT: s_mov_b32 s22, s81 +; VI-NEXT: s_mov_b32 s81, s23 +; VI-NEXT: s_mov_b32 s23, s69 +; VI-NEXT: s_mov_b32 s69, s24 +; VI-NEXT: s_mov_b32 s24, s34 +; VI-NEXT: s_mov_b32 s34, s25 +; VI-NEXT: s_mov_b32 s25, s91 +; VI-NEXT: s_mov_b32 s91, s26 +; VI-NEXT: s_mov_b32 s26, s27 +; VI-NEXT: s_mov_b32 s27, s88 +; VI-NEXT: s_mov_b32 s88, s28 +; VI-NEXT: s_mov_b32 s28, s77 +; VI-NEXT: s_mov_b32 s77, s29 +; VI-NEXT: s_mov_b32 s29, s75 +; VI-NEXT: s_mov_b32 s75, s73 +; VI-NEXT: s_mov_b32 s73, s12 +; VI-NEXT: s_mov_b32 s12, s15 +; VI-NEXT: s_mov_b32 s15, s10 ; VI-NEXT: s_mov_b32 s10, s13 ; VI-NEXT: s_mov_b32 s13, s8 ; VI-NEXT: s_mov_b32 s8, s11 @@ -37609,7 +37663,26 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_mov_b32 s11, s8 ; VI-NEXT: s_mov_b32 s8, s13 ; VI-NEXT: s_mov_b32 s13, s10 -; VI-NEXT: s_mov_b32 s10, s12 +; VI-NEXT: s_mov_b32 s10, s15 +; VI-NEXT: s_mov_b32 s15, s12 +; VI-NEXT: s_mov_b32 s12, s73 +; VI-NEXT: s_mov_b32 s73, s75 +; VI-NEXT: s_mov_b32 s75, s29 +; VI-NEXT: s_mov_b32 s29, s77 +; VI-NEXT: s_mov_b32 s77, s28 +; VI-NEXT: s_mov_b32 s28, s88 +; VI-NEXT: s_mov_b32 s88, s27 +; VI-NEXT: s_mov_b32 s27, s26 +; VI-NEXT: s_mov_b32 s26, s91 +; VI-NEXT: s_mov_b32 s91, s25 +; VI-NEXT: s_mov_b32 s25, s34 +; VI-NEXT: s_mov_b32 s34, s24 +; VI-NEXT: s_mov_b32 s24, s69 +; VI-NEXT: s_mov_b32 s69, s23 +; VI-NEXT: s_mov_b32 s23, s81 +; VI-NEXT: s_mov_b32 s81, s22 +; VI-NEXT: s_mov_b32 s22, s84 +; VI-NEXT: v_readlane_b32 s84, v29, 1 ; VI-NEXT: s_mov_b32 s66, s14 ; VI-NEXT: s_mov_b32 s14, s72 ; VI-NEXT: s_mov_b32 s72, s74 @@ -37626,19 +37699,7 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; VI-NEXT: s_mov_b32 s71, s82 ; VI-NEXT: s_mov_b32 s82, s85 ; VI-NEXT: s_mov_b32 s85, s87 -; VI-NEXT: s_mov_b32 s87, s15 -; VI-NEXT: s_mov_b32 s15, s29 -; VI-NEXT: s_mov_b32 s29, s77 -; VI-NEXT: s_mov_b32 s77, s28 -; VI-NEXT: s_mov_b32 s28, s88 -; VI-NEXT: s_mov_b32 s88, s27 -; VI-NEXT: s_mov_b32 s27, s26 -; VI-NEXT: s_mov_b32 s26, s91 -; VI-NEXT: s_mov_b32 s91, s25 -; VI-NEXT: v_readlane_b32 s25, v29, 1 -; VI-NEXT: s_mov_b32 s12, s73 -; VI-NEXT: s_mov_b32 s73, s75 -; VI-NEXT: v_readlane_b32 s75, v29, 0 +; VI-NEXT: v_readlane_b32 s87, v29, 0 ; VI-NEXT: s_mov_b32 s65, vcc_hi ; VI-NEXT: s_mov_b32 s64, vcc_lo ; VI-NEXT: s_branch .LBB51_2 @@ -37661,12 +37722,8 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s30, 12 +; GFX9-NEXT: v_writelane_b32 v32, s31, 13 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 ; GFX9-NEXT: v_readfirstlane_b32 s62, v12 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 @@ -37676,17 +37733,11 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 ; GFX9-NEXT: v_readfirstlane_b32 s56, v6 ; GFX9-NEXT: v_readfirstlane_b32 s88, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v4 +; GFX9-NEXT: v_readfirstlane_b32 s92, v3 +; GFX9-NEXT: v_readfirstlane_b32 s94, v2 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v1 +; GFX9-NEXT: v_readfirstlane_b32 s30, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -37695,6 +37746,12 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 ; GFX9-NEXT: s_lshr_b32 s10, s23, 16 ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s72, s63, 16 ; GFX9-NEXT: s_lshr_b32 s73, s62, 16 ; GFX9-NEXT: s_lshr_b32 s74, s61, 16 @@ -37704,13 +37761,19 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s78, s57, 16 ; GFX9-NEXT: s_lshr_b32 s79, s56, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 ; GFX9-NEXT: v_readfirstlane_b32 s42, v14 ; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 ; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 @@ -37719,11 +37782,11 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s78 @@ -37802,6 +37865,8 @@ define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB51_5: ; %end +; GFX9-NEXT: v_readlane_b32 s30, v32, 12 +; GFX9-NEXT: v_readlane_b32 s31, v32, 13 ; GFX9-NEXT: v_readlane_b32 s55, v32, 11 ; GFX9-NEXT: v_readlane_b32 s54, v32, 10 ; GFX9-NEXT: v_readlane_b32 s53, v32, 9 @@ -38734,32 +38799,31 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_writelane_b32 v58, s34, 0 -; SI-NEXT: v_writelane_b32 v58, s35, 1 -; SI-NEXT: v_writelane_b32 v58, s36, 2 -; SI-NEXT: v_writelane_b32 v58, s37, 3 -; SI-NEXT: v_writelane_b32 v58, s38, 4 -; SI-NEXT: v_writelane_b32 v58, s39, 5 -; SI-NEXT: v_writelane_b32 v58, s48, 6 -; SI-NEXT: v_writelane_b32 v58, s49, 7 -; SI-NEXT: v_writelane_b32 v58, s50, 8 -; SI-NEXT: v_writelane_b32 v58, s51, 9 -; SI-NEXT: v_writelane_b32 v58, s52, 10 -; SI-NEXT: v_writelane_b32 v58, s53, 11 -; SI-NEXT: v_writelane_b32 v58, s30, 12 -; SI-NEXT: v_writelane_b32 v58, s31, 13 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: v_writelane_b32 v57, s34, 0 +; SI-NEXT: v_writelane_b32 v57, s35, 1 +; SI-NEXT: v_writelane_b32 v57, s36, 2 +; SI-NEXT: v_writelane_b32 v57, s37, 3 +; SI-NEXT: v_writelane_b32 v57, s38, 4 +; SI-NEXT: v_writelane_b32 v57, s39, 5 +; SI-NEXT: v_writelane_b32 v57, s48, 6 +; SI-NEXT: v_writelane_b32 v57, s49, 7 +; SI-NEXT: v_writelane_b32 v57, s50, 8 +; SI-NEXT: v_writelane_b32 v57, s51, 9 +; SI-NEXT: v_writelane_b32 v57, s52, 10 +; SI-NEXT: v_writelane_b32 v57, s53, 11 +; SI-NEXT: v_writelane_b32 v57, s30, 12 +; SI-NEXT: v_writelane_b32 v57, s31, 13 ; SI-NEXT: v_readfirstlane_b32 s4, v14 ; SI-NEXT: v_readfirstlane_b32 s41, v13 ; SI-NEXT: v_readfirstlane_b32 s40, v12 @@ -38842,21 +38906,21 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v21 ; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v15 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v15 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v13 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v11 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v9 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 ; SI-NEXT: s_branch .LBB53_5 ; SI-NEXT: .LBB53_3: ; SI-NEXT: ; implicit-def: $sgpr92 @@ -38889,16 +38953,6 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; SI-NEXT: ; implicit-def: $sgpr53 ; SI-NEXT: s_branch .LBB53_2 ; SI-NEXT: .LBB53_4: -; SI-NEXT: v_mov_b32_e32 v1, s17 -; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 -; SI-NEXT: v_mov_b32_e32 v6, s22 -; SI-NEXT: v_mov_b32_e32 v9, s25 -; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v27, s41 ; SI-NEXT: v_mov_b32_e32 v25, s15 ; SI-NEXT: v_mov_b32_e32 v23, s13 @@ -38908,6 +38962,16 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v15, s5 ; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v4, s20 +; SI-NEXT: v_mov_b32_e32 v6, s22 +; SI-NEXT: v_mov_b32_e32 v8, s24 ; SI-NEXT: v_mov_b32_e32 v10, s26 ; SI-NEXT: v_mov_b32_e32 v12, s28 ; SI-NEXT: v_mov_b32_e32 v14, s4 @@ -38923,21 +38987,21 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v55, s50 ; SI-NEXT: v_mov_b32_e32 v40, s49 ; SI-NEXT: v_mov_b32_e32 v41, s48 -; SI-NEXT: v_mov_b32_e32 v42, s39 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_mov_b32_e32 v43, s38 +; SI-NEXT: v_mov_b32_e32 v42, s39 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_mov_b32_e32 v44, s37 +; SI-NEXT: v_mov_b32_e32 v43, s38 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v45, s36 +; SI-NEXT: v_mov_b32_e32 v44, s37 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_mov_b32_e32 v46, s35 +; SI-NEXT: v_mov_b32_e32 v45, s36 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v47, s34 +; SI-NEXT: v_mov_b32_e32 v46, s35 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v56, s31 +; SI-NEXT: v_mov_b32_e32 v47, s34 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v57, s30 +; SI-NEXT: v_mov_b32_e32 v56, s31 +; SI-NEXT: v_mov_b32_e32 v39, s30 ; SI-NEXT: v_mov_b32_e32 v50, s92 ; SI-NEXT: v_mov_b32_e32 v49, s90 ; SI-NEXT: v_mov_b32_e32 v48, s88 @@ -38953,22 +39017,19 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v29, s44 ; SI-NEXT: v_mov_b32_e32 v28, s42 ; SI-NEXT: .LBB53_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v39 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 ; SI-NEXT: v_or_b32_e32 v1, v1, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 ; SI-NEXT: v_or_b32_e32 v2, v2, v39 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56 ; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 @@ -38997,16 +39058,15 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v41 ; SI-NEXT: v_or_b32_e32 v18, v18, v32 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 @@ -39015,6 +39075,8 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 @@ -39035,7 +39097,8 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; SI-NEXT: v_or_b32_e32 v26, v26, v28 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52 -; SI-NEXT: v_readlane_b32 s30, v58, 12 +; SI-NEXT: v_readlane_b32 s30, v57, 12 +; SI-NEXT: v_or_b32_e32 v0, v0, v50 ; SI-NEXT: v_or_b32_e32 v5, v5, v39 ; SI-NEXT: v_or_b32_e32 v7, v7, v38 ; SI-NEXT: v_or_b32_e32 v9, v9, v37 @@ -39048,21 +39111,21 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; SI-NEXT: v_or_b32_e32 v23, v23, v30 ; SI-NEXT: v_or_b32_e32 v25, v25, v29 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: v_readlane_b32 s31, v58, 13 -; SI-NEXT: v_readlane_b32 s53, v58, 11 -; SI-NEXT: v_readlane_b32 s52, v58, 10 -; SI-NEXT: v_readlane_b32 s51, v58, 9 -; SI-NEXT: v_readlane_b32 s50, v58, 8 -; SI-NEXT: v_readlane_b32 s49, v58, 7 -; SI-NEXT: v_readlane_b32 s48, v58, 6 -; SI-NEXT: v_readlane_b32 s39, v58, 5 -; SI-NEXT: v_readlane_b32 s38, v58, 4 -; SI-NEXT: v_readlane_b32 s37, v58, 3 -; SI-NEXT: v_readlane_b32 s36, v58, 2 -; SI-NEXT: v_readlane_b32 s35, v58, 1 -; SI-NEXT: v_readlane_b32 s34, v58, 0 +; SI-NEXT: v_readlane_b32 s31, v57, 13 +; SI-NEXT: v_readlane_b32 s53, v57, 11 +; SI-NEXT: v_readlane_b32 s52, v57, 10 +; SI-NEXT: v_readlane_b32 s51, v57, 9 +; SI-NEXT: v_readlane_b32 s50, v57, 8 +; SI-NEXT: v_readlane_b32 s49, v57, 7 +; SI-NEXT: v_readlane_b32 s48, v57, 6 +; SI-NEXT: v_readlane_b32 s39, v57, 5 +; SI-NEXT: v_readlane_b32 s38, v57, 4 +; SI-NEXT: v_readlane_b32 s37, v57, 3 +; SI-NEXT: v_readlane_b32 s36, v57, 2 +; SI-NEXT: v_readlane_b32 s35, v57, 1 +; SI-NEXT: v_readlane_b32 s34, v57, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -39086,16 +39149,16 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; VI-NEXT: v_writelane_b32 v56, s30, 2 ; VI-NEXT: v_writelane_b32 v56, s31, 3 ; VI-NEXT: v_readfirstlane_b32 s4, v14 -; VI-NEXT: v_readfirstlane_b32 s9, v13 -; VI-NEXT: v_readfirstlane_b32 s8, v12 -; VI-NEXT: v_readfirstlane_b32 s11, v11 -; VI-NEXT: v_readfirstlane_b32 s10, v10 +; VI-NEXT: v_readfirstlane_b32 s41, v13 +; VI-NEXT: v_readfirstlane_b32 s40, v12 +; VI-NEXT: v_readfirstlane_b32 s15, v11 +; VI-NEXT: v_readfirstlane_b32 s14, v10 ; VI-NEXT: v_readfirstlane_b32 s13, v9 ; VI-NEXT: v_readfirstlane_b32 s12, v8 -; VI-NEXT: v_readfirstlane_b32 s15, v7 -; VI-NEXT: v_readfirstlane_b32 s14, v6 -; VI-NEXT: v_readfirstlane_b32 s41, v5 -; VI-NEXT: v_readfirstlane_b32 s40, v4 +; VI-NEXT: v_readfirstlane_b32 s11, v7 +; VI-NEXT: v_readfirstlane_b32 s10, v6 +; VI-NEXT: v_readfirstlane_b32 s9, v5 +; VI-NEXT: v_readfirstlane_b32 s8, v4 ; VI-NEXT: v_readfirstlane_b32 s7, v3 ; VI-NEXT: v_readfirstlane_b32 s6, v2 ; VI-NEXT: v_readfirstlane_b32 s5, v1 @@ -39103,16 +39166,16 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; VI-NEXT: v_readfirstlane_b32 s4, v0 ; VI-NEXT: s_cbranch_scc0 .LBB53_3 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: s_lshr_b32 s44, s9, 16 -; VI-NEXT: s_lshr_b32 s74, s8, 16 -; VI-NEXT: s_lshr_b32 s45, s11, 16 -; VI-NEXT: s_lshr_b32 s75, s10, 16 +; VI-NEXT: s_lshr_b32 s44, s41, 16 +; VI-NEXT: s_lshr_b32 s74, s40, 16 +; VI-NEXT: s_lshr_b32 s45, s15, 16 +; VI-NEXT: s_lshr_b32 s75, s14, 16 ; VI-NEXT: s_lshr_b32 s46, s13, 16 ; VI-NEXT: s_lshr_b32 s76, s12, 16 -; VI-NEXT: s_lshr_b32 s47, s15, 16 -; VI-NEXT: s_lshr_b32 s77, s14, 16 -; VI-NEXT: s_lshr_b32 s56, s41, 16 -; VI-NEXT: s_lshr_b32 s78, s40, 16 +; VI-NEXT: s_lshr_b32 s47, s11, 16 +; VI-NEXT: s_lshr_b32 s77, s10, 16 +; VI-NEXT: s_lshr_b32 s56, s9, 16 +; VI-NEXT: s_lshr_b32 s78, s8, 16 ; VI-NEXT: s_lshr_b32 s57, s7, 16 ; VI-NEXT: s_lshr_b32 s79, s6, 16 ; VI-NEXT: s_lshr_b32 s58, s5, 16 @@ -39133,11 +39196,11 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; VI-NEXT: s_lshr_b32 s35, s16, 16 ; VI-NEXT: s_cbranch_execnz .LBB53_4 ; VI-NEXT: .LBB53_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[26:27], s[8:9], 1.0 -; VI-NEXT: v_add_f64 v[24:25], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 +; VI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 ; VI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 -; VI-NEXT: v_add_f64 v[20:21], s[14:15], 1.0 -; VI-NEXT: v_add_f64 v[18:19], s[40:41], 1.0 +; VI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; VI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; VI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -39216,7 +39279,11 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; VI-NEXT: v_mov_b32_e32 v12, s28 ; VI-NEXT: v_mov_b32_e32 v14, s4 ; VI-NEXT: v_mov_b32_e32 v16, s6 -; VI-NEXT: v_mov_b32_e32 v18, s40 +; VI-NEXT: v_mov_b32_e32 v18, s8 +; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_mov_b32_e32 v22, s12 +; VI-NEXT: v_mov_b32_e32 v24, s14 +; VI-NEXT: v_mov_b32_e32 v26, s40 ; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v3, s19 ; VI-NEXT: v_mov_b32_e32 v5, s21 @@ -39226,15 +39293,11 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; VI-NEXT: v_mov_b32_e32 v13, s29 ; VI-NEXT: v_mov_b32_e32 v15, s5 ; VI-NEXT: v_mov_b32_e32 v17, s7 -; VI-NEXT: v_mov_b32_e32 v19, s41 -; VI-NEXT: v_mov_b32_e32 v20, s14 -; VI-NEXT: v_mov_b32_e32 v21, s15 -; VI-NEXT: v_mov_b32_e32 v22, s12 +; VI-NEXT: v_mov_b32_e32 v19, s9 +; VI-NEXT: v_mov_b32_e32 v21, s11 ; VI-NEXT: v_mov_b32_e32 v23, s13 -; VI-NEXT: v_mov_b32_e32 v24, s10 -; VI-NEXT: v_mov_b32_e32 v25, s11 -; VI-NEXT: v_mov_b32_e32 v26, s8 -; VI-NEXT: v_mov_b32_e32 v27, s9 +; VI-NEXT: v_mov_b32_e32 v25, s15 +; VI-NEXT: v_mov_b32_e32 v27, s41 ; VI-NEXT: v_mov_b32_e32 v44, s35 ; VI-NEXT: v_mov_b32_e32 v42, s34 ; VI-NEXT: v_mov_b32_e32 v40, s31 @@ -39350,16 +39413,16 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: v_readfirstlane_b32 s4, v14 -; GFX9-NEXT: v_readfirstlane_b32 s9, v13 -; GFX9-NEXT: v_readfirstlane_b32 s8, v12 -; GFX9-NEXT: v_readfirstlane_b32 s11, v11 -; GFX9-NEXT: v_readfirstlane_b32 s10, v10 +; GFX9-NEXT: v_readfirstlane_b32 s41, v13 +; GFX9-NEXT: v_readfirstlane_b32 s40, v12 +; GFX9-NEXT: v_readfirstlane_b32 s15, v11 +; GFX9-NEXT: v_readfirstlane_b32 s14, v10 ; GFX9-NEXT: v_readfirstlane_b32 s13, v9 ; GFX9-NEXT: v_readfirstlane_b32 s12, v8 -; GFX9-NEXT: v_readfirstlane_b32 s15, v7 -; GFX9-NEXT: v_readfirstlane_b32 s14, v6 -; GFX9-NEXT: v_readfirstlane_b32 s41, v5 -; GFX9-NEXT: v_readfirstlane_b32 s40, v4 +; GFX9-NEXT: v_readfirstlane_b32 s11, v7 +; GFX9-NEXT: v_readfirstlane_b32 s10, v6 +; GFX9-NEXT: v_readfirstlane_b32 s9, v5 +; GFX9-NEXT: v_readfirstlane_b32 s8, v4 ; GFX9-NEXT: v_readfirstlane_b32 s7, v3 ; GFX9-NEXT: v_readfirstlane_b32 s6, v2 ; GFX9-NEXT: v_readfirstlane_b32 s5, v1 @@ -39367,16 +39430,16 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; GFX9-NEXT: v_readfirstlane_b32 s4, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB53_3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: s_lshr_b32 s44, s9, 16 -; GFX9-NEXT: s_lshr_b32 s74, s8, 16 -; GFX9-NEXT: s_lshr_b32 s45, s11, 16 -; GFX9-NEXT: s_lshr_b32 s75, s10, 16 +; GFX9-NEXT: s_lshr_b32 s44, s41, 16 +; GFX9-NEXT: s_lshr_b32 s74, s40, 16 +; GFX9-NEXT: s_lshr_b32 s45, s15, 16 +; GFX9-NEXT: s_lshr_b32 s75, s14, 16 ; GFX9-NEXT: s_lshr_b32 s46, s13, 16 ; GFX9-NEXT: s_lshr_b32 s76, s12, 16 -; GFX9-NEXT: s_lshr_b32 s47, s15, 16 -; GFX9-NEXT: s_lshr_b32 s77, s14, 16 -; GFX9-NEXT: s_lshr_b32 s56, s41, 16 -; GFX9-NEXT: s_lshr_b32 s78, s40, 16 +; GFX9-NEXT: s_lshr_b32 s47, s11, 16 +; GFX9-NEXT: s_lshr_b32 s77, s10, 16 +; GFX9-NEXT: s_lshr_b32 s56, s9, 16 +; GFX9-NEXT: s_lshr_b32 s78, s8, 16 ; GFX9-NEXT: s_lshr_b32 s57, s7, 16 ; GFX9-NEXT: s_lshr_b32 s79, s6, 16 ; GFX9-NEXT: s_lshr_b32 s58, s5, 16 @@ -39397,11 +39460,11 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; GFX9-NEXT: s_lshr_b32 s95, s16, 16 ; GFX9-NEXT: s_cbranch_execnz .LBB53_4 ; GFX9-NEXT: .LBB53_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[26:27], s[8:9], 1.0 -; GFX9-NEXT: v_add_f64 v[24:25], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 +; GFX9-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 ; GFX9-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 -; GFX9-NEXT: v_add_f64 v[20:21], s[14:15], 1.0 -; GFX9-NEXT: v_add_f64 v[18:19], s[40:41], 1.0 +; GFX9-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; GFX9-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; GFX9-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -39480,7 +39543,11 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v12, s28 ; GFX9-NEXT: v_mov_b32_e32 v14, s4 ; GFX9-NEXT: v_mov_b32_e32 v16, s6 -; GFX9-NEXT: v_mov_b32_e32 v18, s40 +; GFX9-NEXT: v_mov_b32_e32 v18, s8 +; GFX9-NEXT: v_mov_b32_e32 v20, s10 +; GFX9-NEXT: v_mov_b32_e32 v22, s12 +; GFX9-NEXT: v_mov_b32_e32 v24, s14 +; GFX9-NEXT: v_mov_b32_e32 v26, s40 ; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: v_mov_b32_e32 v5, s21 @@ -39490,15 +39557,11 @@ define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v13, s29 ; GFX9-NEXT: v_mov_b32_e32 v15, s5 ; GFX9-NEXT: v_mov_b32_e32 v17, s7 -; GFX9-NEXT: v_mov_b32_e32 v19, s41 -; GFX9-NEXT: v_mov_b32_e32 v20, s14 -; GFX9-NEXT: v_mov_b32_e32 v21, s15 -; GFX9-NEXT: v_mov_b32_e32 v22, s12 +; GFX9-NEXT: v_mov_b32_e32 v19, s9 +; GFX9-NEXT: v_mov_b32_e32 v21, s11 ; GFX9-NEXT: v_mov_b32_e32 v23, s13 -; GFX9-NEXT: v_mov_b32_e32 v24, s10 -; GFX9-NEXT: v_mov_b32_e32 v25, s11 -; GFX9-NEXT: v_mov_b32_e32 v26, s8 -; GFX9-NEXT: v_mov_b32_e32 v27, s9 +; GFX9-NEXT: v_mov_b32_e32 v25, s15 +; GFX9-NEXT: v_mov_b32_e32 v27, s41 ; GFX9-NEXT: v_mov_b32_e32 v44, s95 ; GFX9-NEXT: v_mov_b32_e32 v42, s94 ; GFX9-NEXT: v_mov_b32_e32 v40, s93 @@ -40099,15 +40162,15 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v40 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v43 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v40 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v41 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v47 -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v56 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v57 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v58 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v59 @@ -40130,18 +40193,18 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v59 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v58 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v58 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v32 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v57 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v38 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v56 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v62 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v37 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v46 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v36 @@ -40153,16 +40216,16 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v35 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v60 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v34 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v60 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v41 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v33 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v40 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v55 ; SI-NEXT: ; implicit-def: $vgpr59 @@ -40181,15 +40244,15 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr39 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload @@ -40335,150 +40398,172 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] ; SI-NEXT: s_cbranch_execz .LBB54_4 ; SI-NEXT: ; %bb.3: ; %cmp.true +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v39 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v59 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v32 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v58 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v38 ; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v38 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v57 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v56 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v47 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v57 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v37 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v62 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v56 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v47 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v36 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v46 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v61 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v37 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v45 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v44 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v44 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v34 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_or_b32_e32 v7, v9, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v60 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v36 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v42 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v41 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v61 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v42 +; SI-NEXT: v_or_b32_e32 v8, v9, v8 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v33 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v41 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v40 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v55 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v35 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v63 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v40 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v54 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v53 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v55 +; SI-NEXT: v_or_b32_e32 v11, v12, v11 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v13 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v60 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v54 ; SI-NEXT: v_cvt_f32_f16_e32 v17, v52 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v18, v51 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v34 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v49 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v21, v48 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v63 -; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 -; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 +; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 +; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v33 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 +; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: v_or_b32_e32 v13, v15, v13 +; SI-NEXT: v_cvt_f32_f16_e32 v15, v53 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 -; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 +; SI-NEXT: v_cvt_f32_f16_e32 v25, v25 +; SI-NEXT: v_or_b32_e32 v14, v15, v14 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 -; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v19, v19 -; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: s_waitcnt vmcnt(5) ; SI-NEXT: v_cvt_f32_f16_e32 v22, v22 -; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: s_waitcnt vmcnt(4) ; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 -; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v25, 0x38000000, v25 ; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 ; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 ; SI-NEXT: v_add_f32_e32 v22, 0x38000000, v22 @@ -40486,40 +40571,17 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 { ; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 ; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 ; SI-NEXT: v_cvt_f16_f32_e32 v25, v25 -; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: s_waitcnt vmcnt(3) ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v28, v28 -; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 -; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 +; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v28, 0x38000000, v28 ; SI-NEXT: v_cvt_f16_f32_e32 v28, v28 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v15, v17, v15 -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 +; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 ; SI-NEXT: s_waitcnt vmcnt(0) @@ -40768,10 +40830,10 @@ define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v27, 0x200 ; VI-NEXT: v_add_f16_sdwa v0, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, 0x200, v59 -; VI-NEXT: v_add_f16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, 0x200, v58 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_add_f16_sdwa v1, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, 0x200, v58 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_add_f16_sdwa v2, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, 0x200, v57 ; VI-NEXT: v_or_b32_e32 v2, v3, v2 @@ -41917,7 +41979,7 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; VI-NEXT: v_readfirstlane_b32 s83, v0 ; VI-NEXT: v_writelane_b32 v33, s15, 0 ; VI-NEXT: s_lshr_b32 s56, s29, 16 -; VI-NEXT: s_lshr_b32 s75, s28, 16 +; VI-NEXT: s_lshr_b32 s88, s28, 16 ; VI-NEXT: s_lshr_b32 s90, s27, 16 ; VI-NEXT: s_lshr_b32 s31, s26, 16 ; VI-NEXT: s_lshr_b32 s68, s25, 16 @@ -41952,17 +42014,17 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s13, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s11, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s9, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s7, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s11, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s87, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s86, 16 @@ -41986,7 +42048,7 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; VI-NEXT: s_lshl_b32 s5, s90, 16 ; VI-NEXT: s_or_b32 s47, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s28 -; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_lshl_b32 s5, s88, 16 ; VI-NEXT: s_or_b32 s48, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s29 ; VI-NEXT: s_lshl_b32 s5, s56, 16 @@ -42015,7 +42077,6 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; VI-NEXT: s_or_b32 s56, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s74 ; VI-NEXT: s_lshl_b32 s5, s57, 16 -; VI-NEXT: s_mov_b32 s73, s75 ; VI-NEXT: s_mov_b32 s75, s57 ; VI-NEXT: s_or_b32 s57, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s72 @@ -42033,7 +42094,7 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; VI-NEXT: s_or_b32 s61, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s8 ; VI-NEXT: s_lshl_b32 s5, s15, 16 -; VI-NEXT: s_mov_b32 s88, s62 +; VI-NEXT: s_mov_b32 s73, s62 ; VI-NEXT: s_or_b32 s62, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s6 ; VI-NEXT: s_lshl_b32 s5, s63, 16 @@ -42043,13 +42104,13 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; VI-NEXT: .LBB55_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v27, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s13 -; VI-NEXT: v_mov_b32_e32 v2, s11 ; VI-NEXT: v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v27 -; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v27 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s11 +; VI-NEXT: v_add_f16_sdwa v1, v1, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v27 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s9 ; VI-NEXT: v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v27 @@ -42090,7 +42151,7 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; VI-NEXT: v_add_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v12, s27, v27 ; VI-NEXT: v_or_b32_e32 v11, v12, v11 -; VI-NEXT: v_mov_b32_e32 v12, s73 +; VI-NEXT: v_mov_b32_e32 v12, s88 ; VI-NEXT: v_add_f16_sdwa v12, v12, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v13, s28, v27 ; VI-NEXT: v_or_b32_e32 v12, v13, v12 @@ -42122,7 +42183,7 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; VI-NEXT: v_add_f16_sdwa v19, v19, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v20, s79, v27 ; VI-NEXT: v_or_b32_e32 v19, v20, v19 -; VI-NEXT: v_mov_b32_e32 v20, s88 +; VI-NEXT: v_mov_b32_e32 v20, s73 ; VI-NEXT: v_add_f16_sdwa v20, v20, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v21, s76, v27 ; VI-NEXT: v_or_b32_e32 v20, v21, v20 @@ -42160,8 +42221,7 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; VI-NEXT: v_or_b32_e32 v27, v27, v28 ; VI-NEXT: s_branch .LBB55_5 ; VI-NEXT: .LBB55_3: -; VI-NEXT: s_mov_b32 s73, s75 -; VI-NEXT: s_mov_b32 s88, s62 +; VI-NEXT: s_mov_b32 s73, s62 ; VI-NEXT: s_mov_b32 s77, s56 ; VI-NEXT: s_mov_b32 s75, s57 ; VI-NEXT: s_mov_b32 s78, s58 @@ -42259,12 +42319,8 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; GFX9-NEXT: v_writelane_b32 v32, s53, 9 ; GFX9-NEXT: v_writelane_b32 v32, s54, 10 ; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s30, 12 +; GFX9-NEXT: v_writelane_b32 v32, s31, 13 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 ; GFX9-NEXT: v_readfirstlane_b32 s62, v12 ; GFX9-NEXT: v_readfirstlane_b32 s61, v11 @@ -42274,17 +42330,11 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 ; GFX9-NEXT: v_readfirstlane_b32 s56, v6 ; GFX9-NEXT: v_readfirstlane_b32 s88, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v0 +; GFX9-NEXT: v_readfirstlane_b32 s90, v4 +; GFX9-NEXT: v_readfirstlane_b32 s92, v3 +; GFX9-NEXT: v_readfirstlane_b32 s94, v2 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v1 +; GFX9-NEXT: v_readfirstlane_b32 s30, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 @@ -42293,6 +42343,12 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 ; GFX9-NEXT: s_lshr_b32 s10, s23, 16 ; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s72, s63, 16 ; GFX9-NEXT: s_lshr_b32 s73, s62, 16 ; GFX9-NEXT: s_lshr_b32 s74, s61, 16 @@ -42302,13 +42358,19 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; GFX9-NEXT: s_lshr_b32 s78, s57, 16 ; GFX9-NEXT: s_lshr_b32 s79, s56, 16 ; GFX9-NEXT: s_lshr_b32 s89, s88, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 +; GFX9-NEXT: s_lshr_b32 s91, s90, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 ; GFX9-NEXT: v_readfirstlane_b32 s42, v14 ; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 ; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 ; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 @@ -42317,11 +42379,11 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s90, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s55, s88, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s79 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s78 @@ -42401,6 +42463,8 @@ define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB55_5: ; %end +; GFX9-NEXT: v_readlane_b32 s30, v32, 12 +; GFX9-NEXT: v_readlane_b32 s31, v32, 13 ; GFX9-NEXT: v_readlane_b32 s55, v32, 11 ; GFX9-NEXT: v_readlane_b32 s54, v32, 10 ; GFX9-NEXT: v_readlane_b32 s53, v32, 9 @@ -42582,275 +42646,339 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v1 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v0 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v0 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v28 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v54 -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v3 -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v53 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v5 -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v40 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v3 +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v51 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v4 -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v5 +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v49 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v7 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v54 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v7 ; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v50 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v6 -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v39 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v9 -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v48 -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v11 -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52 +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v9 +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v60 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v13 -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v58 -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v57 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v15 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v11 ; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v24 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v59 +; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v36 +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v26 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v23 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v22 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v21 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v20 -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v18 ; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17 ; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v16 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v14 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v13 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v10 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v2 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v52 -; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v38 -; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v37 -; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v36 -; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v35 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v6 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v4 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v2 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v48 +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v35 ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v34 -; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v33 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v47 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v45 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v44 -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v41, 16, v41 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v42 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v40 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v55 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v57 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v42 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v41 +; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v55 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v53 +; SI-NEXT: ; kill: killed $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr60 -; SI-NEXT: ; implicit-def: $vgpr58 +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr57 ; SI-NEXT: ; implicit-def: $vgpr47 ; SI-NEXT: ; implicit-def: $vgpr45 -; SI-NEXT: ; implicit-def: $vgpr44 +; SI-NEXT: ; implicit-def: $vgpr43 ; SI-NEXT: ; implicit-def: $vgpr42 -; SI-NEXT: ; implicit-def: $vgpr40 +; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr55 ; SI-NEXT: ; implicit-def: $vgpr53 -; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: ; kill: killed $vgpr50 ; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr28 -; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; kill: killed $vgpr50 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB56_2 ; SI-NEXT: ; %bb.1: ; %cmp.false ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v54 -; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_or_b32_e32 v60, v1, v28 -; SI-NEXT: v_mov_b32_e32 v28, v39 -; SI-NEXT: v_mov_b32_e32 v39, v43 -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v40 +; SI-NEXT: v_or_b32_e32 v59, v1, v50 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v54 +; SI-NEXT: v_or_b32_e32 v57, v1, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v52 +; SI-NEXT: s_waitcnt expcnt(6) +; SI-NEXT: v_or_b32_e32 v47, v1, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: s_waitcnt vmcnt(0) expcnt(5) +; SI-NEXT: v_or_b32_e32 v45, v1, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9 +; SI-NEXT: v_alignbit_b32 v9, v45, v46, 16 +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr9 +; SI-NEXT: s_waitcnt vmcnt(1) expcnt(5) +; SI-NEXT: v_or_b32_e32 v43, v1, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11 +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt expcnt(4) +; SI-NEXT: v_or_b32_e32 v42, v1, v36 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_or_b32_e32 v41, v1, v28 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15 +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_or_b32_e32 v55, v1, v37 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_or_b32_e32 v53, v1, v38 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19 +; SI-NEXT: v_or_b32_e32 v51, v1, v39 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21 +; SI-NEXT: v_or_b32_e32 v7, v1, v48 +; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; kill: killed $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; kill: killed $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; kill: killed $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; kill: killed $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; kill: killed $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr13 +; SI-NEXT: ; implicit-def: $vgpr15 +; SI-NEXT: ; implicit-def: $vgpr17 +; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; kill: killed $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v60, v43, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v51 -; SI-NEXT: v_or_b32_e32 v58, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v58, v39, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v11 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49 -; SI-NEXT: v_or_b32_e32 v57, v1, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v0, v0, v43 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v43, v56, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v0, v0, v39 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v63 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v42, v58, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4 -; SI-NEXT: v_mov_b32_e32 v39, v28 -; SI-NEXT: ; implicit-def: $vgpr2 -; SI-NEXT: ; implicit-def: $vgpr4 -; SI-NEXT: ; implicit-def: $vgpr43 -; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_alignbit_b32 v1, v57, v5, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v44 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_or_b32_e32 v47, v1, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v0, v0, v5 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v41, v61, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6 -; SI-NEXT: ; implicit-def: $vgpr5 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_alignbit_b32 v1, v47, v7, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_or_b32_e32 v45, v1, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v45, v46, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v46 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11 -; SI-NEXT: v_or_b32_e32 v0, v0, v7 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v55, v60, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v0, v0, v46 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v56 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v53, v29, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v0, v0, v56 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v58 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v51, v30, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v0, v0, v59 +; SI-NEXT: v_or_b32_e32 v0, v0, v61 +; SI-NEXT: v_alignbit_b32 v1, v59, v11, 16 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v7, v31, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v0, v0, v62 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v5, v1, v35 +; SI-NEXT: v_or_b32_e32 v0, v0, v60 +; SI-NEXT: v_alignbit_b32 v1, v57, v63, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v5, v32, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16 +; SI-NEXT: v_or_b32_e32 v3, v1, v62 ; SI-NEXT: v_or_b32_e32 v0, v0, v29 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v1, v47, v44, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v3, v33, 16 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v27 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18 +; SI-NEXT: v_or_b32_e32 v1, v1, v49 ; SI-NEXT: v_or_b32_e32 v0, v0, v30 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v1, v34, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v0, v0, v31 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v22 ; SI-NEXT: v_or_b32_e32 v0, v0, v32 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24 -; SI-NEXT: v_or_b32_e32 v0, v0, v63 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v33 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v26 -; SI-NEXT: v_or_b32_e32 v0, v0, v61 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v34 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: ; implicit-def: $vgpr0 +; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr2 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr5 +; SI-NEXT: ; implicit-def: $vgpr6 ; SI-NEXT: ; implicit-def: $vgpr7 ; SI-NEXT: ; implicit-def: $vgpr8 -; SI-NEXT: ; implicit-def: $vgpr9 ; SI-NEXT: ; implicit-def: $vgpr10 ; SI-NEXT: ; implicit-def: $vgpr11 ; SI-NEXT: ; implicit-def: $vgpr12 @@ -42859,345 +42987,265 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr18 ; SI-NEXT: ; implicit-def: $vgpr20 ; SI-NEXT: ; implicit-def: $vgpr22 +; SI-NEXT: ; implicit-def: $vgpr23 ; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: ; implicit-def: $vgpr25 ; SI-NEXT: ; implicit-def: $vgpr26 +; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr44 ; SI-NEXT: ; implicit-def: $vgpr46 -; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_or_b32_e32 v44, v1, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v44, v56, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13 -; SI-NEXT: ; implicit-def: $vgpr13 ; SI-NEXT: ; implicit-def: $vgpr56 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v42, v1, v3 -; SI-NEXT: v_alignbit_b32 v1, v42, v59, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15 -; SI-NEXT: v_or_b32_e32 v40, v1, v35 -; SI-NEXT: v_alignbit_b32 v1, v40, v62, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v55, v1, v36 -; SI-NEXT: v_alignbit_b32 v1, v55, v29, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19 -; SI-NEXT: v_or_b32_e32 v53, v1, v34 -; SI-NEXT: v_alignbit_b32 v1, v53, v30, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21 -; SI-NEXT: v_or_b32_e32 v52, v1, v41 -; SI-NEXT: v_alignbit_b32 v1, v52, v31, 16 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23 -; SI-NEXT: ; kill: killed $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: v_or_b32_e32 v50, v1, v37 -; SI-NEXT: ; kill: killed $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: v_alignbit_b32 v1, v50, v32, 16 -; SI-NEXT: ; kill: killed $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25 -; SI-NEXT: ; kill: killed $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: v_or_b32_e32 v48, v1, v33 -; SI-NEXT: ; kill: killed $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: v_alignbit_b32 v1, v48, v63, 16 -; SI-NEXT: ; kill: killed $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v27 -; SI-NEXT: ; kill: killed $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: v_or_b32_e32 v3, v1, v38 -; SI-NEXT: ; kill: killed $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: v_alignbit_b32 v1, v3, v61, 16 -; SI-NEXT: ; kill: killed $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v28, v3 -; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr3 -; SI-NEXT: ; implicit-def: $vgpr15 -; SI-NEXT: ; implicit-def: $vgpr17 -; SI-NEXT: ; implicit-def: $vgpr19 -; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr23 -; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: ; kill: killed $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr59 -; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr36 +; SI-NEXT: ; implicit-def: $vgpr58 +; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: ; implicit-def: $vgpr60 ; SI-NEXT: ; implicit-def: $vgpr29 -; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr31 -; SI-NEXT: ; implicit-def: $vgpr37 +; SI-NEXT: ; implicit-def: $vgpr35 ; SI-NEXT: ; implicit-def: $vgpr32 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: ; implicit-def: $vgpr63 -; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr61 +; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: .LBB56_2: ; %Flow -; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] +; SI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5] +; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: s_xor_b64 exec, exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB56_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26 -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; SI-NEXT: v_or_b32_e32 v26, v61, v26 -; SI-NEXT: v_add_i32_e32 v39, vcc, 0x30000, v26 -; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v27 ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v26, v38, v26 -; SI-NEXT: v_or_b32_e32 v24, v63, v24 -; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v26 -; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v24 -; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v25 ; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22 +; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20 +; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: v_or_b32_e32 v26, v34, v26 +; SI-NEXT: s_mov_b32 s6, 0x30000 ; SI-NEXT: v_or_b32_e32 v24, v33, v24 ; SI-NEXT: v_or_b32_e32 v22, v32, v22 -; SI-NEXT: v_add_i32_e32 v48, vcc, s6, v24 -; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v22 -; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v23 -; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20 -; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; SI-NEXT: v_or_b32_e32 v22, v37, v22 ; SI-NEXT: v_or_b32_e32 v20, v31, v20 -; SI-NEXT: v_add_i32_e32 v50, vcc, s6, v22 -; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v20 -; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v21 -; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v20, v41, v20 ; SI-NEXT: v_or_b32_e32 v18, v30, v18 -; SI-NEXT: v_add_i32_e32 v52, vcc, s6, v20 -; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v18 +; SI-NEXT: v_add_i32_e32 v34, vcc, 0x30000, v26 +; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v27 +; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v24 +; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v25 +; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v22 +; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v23 +; SI-NEXT: v_add_i32_e32 v23, vcc, s6, v20 +; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v21 +; SI-NEXT: v_add_i32_e32 v21, vcc, s6, v18 ; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v19 ; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v18, v34, v18 +; SI-NEXT: v_or_b32_e32 v18, v39, v18 ; SI-NEXT: v_or_b32_e32 v16, v29, v16 -; SI-NEXT: v_add_i32_e32 v53, vcc, s6, v18 +; SI-NEXT: v_add_i32_e32 v51, vcc, s6, v18 ; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v17 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v16, v36, v16 -; SI-NEXT: v_or_b32_e32 v14, v62, v14 +; SI-NEXT: v_or_b32_e32 v16, v38, v16 +; SI-NEXT: v_or_b32_e32 v14, v60, v14 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v16 +; SI-NEXT: v_add_i32_e32 v53, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v15 ; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v14, v35, v14 -; SI-NEXT: v_or_b32_e32 v12, v59, v12 -; SI-NEXT: v_add_i32_e32 v40, vcc, s6, v14 +; SI-NEXT: v_or_b32_e32 v14, v37, v14 +; SI-NEXT: v_or_b32_e32 v12, v61, v12 +; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v12 ; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v13 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v10, v56, v10 +; SI-NEXT: v_or_b32_e32 v12, v28, v12 +; SI-NEXT: v_or_b32_e32 v10, v58, v10 +; SI-NEXT: v_add_i32_e32 v41, vcc, s6, v12 +; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v10 +; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11 ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v8, v46, v8 +; SI-NEXT: v_or_b32_e32 v10, v36, v10 +; SI-NEXT: v_or_b32_e32 v8, v56, v8 +; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v10 +; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v8 +; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v9 +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_or_b32_e32 v6, v46, v6 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_or_b32_e32 v4, v44, v4 ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v43, v2 +; SI-NEXT: v_or_b32_e32 v2, v63, v2 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v12 -; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v10 -; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v44, vcc, s6, v10 -; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v8 -; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 +; SI-NEXT: v_or_b32_e32 v20, v48, v20 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; SI-NEXT: v_or_b32_e32 v22, v35, v22 +; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v20 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 +; SI-NEXT: v_or_b32_e32 v24, v62, v24 +; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v22 +; SI-NEXT: v_or_b32_e32 v26, v49, v26 +; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 +; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v26 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v42 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_add_i32_e32 v45, vcc, s6, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_add_i32_e32 v43, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_add_i32_e32 v47, vcc, s6, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_add_i32_e32 v45, vcc, s6, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_add_i32_e32 v57, vcc, s6, v4 +; SI-NEXT: v_add_i32_e32 v47, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v2 ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v47 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_add_i32_e32 v58, vcc, s6, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v58 +; SI-NEXT: v_add_i32_e32 v57, vcc, s6, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v57 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v2, v0 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1 -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v60, vcc, s6, v0 -; SI-NEXT: v_alignbit_b32 v0, v60, v2, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: v_add_i32_e32 v59, vcc, s6, v0 +; SI-NEXT: v_alignbit_b32 v0, v59, v2, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v58, v4, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v57, v4, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v57, v6, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v47, v6, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v47, v8, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v45, v8, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v45, v10, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v43, v10, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v44, v12, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v42, v12, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v42, v14, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v41, v14, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v40, v16, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v55, v16, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v55, v18, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v53, v18, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v53, v20, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v51, v21, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v52, v22, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v20, v23, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v50, v24, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v22, v25, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v48, v26, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v24, v27, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v28, v39, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v26, v34, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v45 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v44 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v43 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v40 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v51 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v52 +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v50 +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v60 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v47 +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v59 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28 +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v26 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: .LBB56_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v54 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v51 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v49 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v39 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v40 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v54 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v52 +; SI-NEXT: s_waitcnt vmcnt(4) +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v50 ; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload @@ -43205,41 +43253,48 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v59 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: s_waitcnt vmcnt(11) +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: s_waitcnt vmcnt(10) +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; SI-NEXT: s_waitcnt vmcnt(7) @@ -43259,45 +43314,39 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v58 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v57 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v57 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v47 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v47 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v45 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v45 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v43 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v44 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v42 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v41 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v14, v14, v15 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v40 -; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -43315,42 +43364,53 @@ define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; SI-NEXT: v_or_b32_e32 v14, v14, v15 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v55 +; SI-NEXT: v_or_b32_e32 v15, v15, v16 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v55 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v53 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v53 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v51 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v52 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v50 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: v_and_b32_e32 v25, 0xffff, v48 +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v26, v27 -; SI-NEXT: v_and_b32_e32 v27, 0xffff, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 ; SI-NEXT: s_setpc_b64 s[30:31] ; @@ -43957,512 +44017,666 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i ; SI-NEXT: v_writelane_b32 v28, s99, 33 ; SI-NEXT: v_writelane_b32 v28, s30, 34 ; SI-NEXT: v_writelane_b32 v28, s31, 35 -; SI-NEXT: v_readfirstlane_b32 s54, v13 -; SI-NEXT: v_readfirstlane_b32 s55, v12 -; SI-NEXT: v_readfirstlane_b32 s52, v11 -; SI-NEXT: v_readfirstlane_b32 s53, v10 -; SI-NEXT: v_readfirstlane_b32 s86, v9 -; SI-NEXT: v_readfirstlane_b32 s98, v8 -; SI-NEXT: v_readfirstlane_b32 s96, v7 -; SI-NEXT: v_readfirstlane_b32 s83, v6 -; SI-NEXT: v_readfirstlane_b32 s85, v5 -; SI-NEXT: v_readfirstlane_b32 s87, v4 -; SI-NEXT: v_readfirstlane_b32 s82, v3 -; SI-NEXT: v_readfirstlane_b32 s84, v2 -; SI-NEXT: v_readfirstlane_b32 s97, v1 -; SI-NEXT: v_readfirstlane_b32 s99, v0 -; SI-NEXT: s_lshr_b32 s64, s29, 16 -; SI-NEXT: s_lshr_b32 s37, s28, 16 +; SI-NEXT: s_lshr_b32 s4, s29, 16 +; SI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane +; SI-NEXT: v_readfirstlane_b32 s31, v9 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_writelane_b32 v29, s4, 0 +; SI-NEXT: s_lshr_b32 s4, s21, 16 +; SI-NEXT: v_writelane_b32 v29, s4, 1 +; SI-NEXT: s_lshr_b32 s4, s19, 16 +; SI-NEXT: v_writelane_b32 v29, s4, 2 +; SI-NEXT: s_lshr_b32 s4, s31, 16 +; SI-NEXT: v_readfirstlane_b32 s34, v6 +; SI-NEXT: v_writelane_b32 v29, s4, 3 +; SI-NEXT: v_readfirstlane_b32 s44, v8 +; SI-NEXT: s_lshr_b32 s4, s34, 16 +; SI-NEXT: v_readfirstlane_b32 s76, v13 +; SI-NEXT: v_readfirstlane_b32 s5, v12 +; SI-NEXT: v_readfirstlane_b32 s36, v11 +; SI-NEXT: v_readfirstlane_b32 s63, v10 +; SI-NEXT: s_lshr_b32 s40, s44, 16 +; SI-NEXT: v_readfirstlane_b32 s30, v7 +; SI-NEXT: v_writelane_b32 v29, s4, 4 +; SI-NEXT: v_readfirstlane_b32 s74, v5 +; SI-NEXT: v_readfirstlane_b32 s49, v4 +; SI-NEXT: v_readfirstlane_b32 s48, v3 +; SI-NEXT: v_readfirstlane_b32 s93, v2 +; SI-NEXT: v_readfirstlane_b32 s91, v1 +; SI-NEXT: v_readfirstlane_b32 s92, v0 +; SI-NEXT: s_lshr_b32 s71, s28, 16 ; SI-NEXT: s_lshr_b32 s65, s27, 16 -; SI-NEXT: s_lshr_b32 s35, s26, 16 -; SI-NEXT: s_lshr_b32 s50, s25, 16 -; SI-NEXT: s_lshr_b32 s31, s24, 16 -; SI-NEXT: s_lshr_b32 s89, s23, 16 -; SI-NEXT: s_lshr_b32 s95, s22, 16 -; SI-NEXT: s_lshr_b32 s77, s21, 16 -; SI-NEXT: s_lshr_b32 s93, s20, 16 -; SI-NEXT: s_lshr_b32 s75, s19, 16 -; SI-NEXT: s_lshr_b32 s92, s18, 16 -; SI-NEXT: s_lshr_b32 s73, s17, 16 -; SI-NEXT: s_lshr_b32 s79, s16, 16 -; SI-NEXT: s_lshr_b32 s81, s54, 16 -; SI-NEXT: s_lshr_b32 s11, s55, 16 -; SI-NEXT: s_lshr_b32 s88, s52, 16 -; SI-NEXT: s_lshr_b32 s80, s53, 16 -; SI-NEXT: s_lshr_b32 s68, s86, 16 -; SI-NEXT: s_lshr_b32 s91, s98, 16 -; SI-NEXT: s_lshr_b32 s70, s96, 16 -; SI-NEXT: s_lshr_b32 s67, s83, 16 -; SI-NEXT: s_lshr_b32 s66, s85, 16 -; SI-NEXT: s_lshr_b32 s51, s87, 16 -; SI-NEXT: s_lshr_b32 s71, s82, 16 -; SI-NEXT: s_lshr_b32 s49, s84, 16 -; SI-NEXT: s_lshr_b32 s69, s97, 16 -; SI-NEXT: s_lshr_b32 s39, s99, 16 +; SI-NEXT: s_lshr_b32 s69, s26, 16 +; SI-NEXT: s_lshr_b32 s55, s25, 16 +; SI-NEXT: s_lshr_b32 s68, s24, 16 +; SI-NEXT: s_lshr_b32 s53, s23, 16 +; SI-NEXT: s_lshr_b32 s66, s22, 16 +; SI-NEXT: s_lshr_b32 s64, s20, 16 +; SI-NEXT: s_lshr_b32 s70, s18, 16 +; SI-NEXT: s_lshr_b32 s84, s17, 16 +; SI-NEXT: s_lshr_b32 s52, s16, 16 +; SI-NEXT: s_lshr_b32 s78, s76, 16 +; SI-NEXT: s_lshr_b32 s90, s5, 16 +; SI-NEXT: s_lshr_b32 s99, s36, 16 +; SI-NEXT: s_lshr_b32 s75, s63, 16 +; SI-NEXT: s_lshr_b32 s98, s30, 16 +; SI-NEXT: s_lshr_b32 s96, s74, 16 +; SI-NEXT: s_lshr_b32 s81, s49, 16 +; SI-NEXT: s_lshr_b32 s79, s48, 16 +; SI-NEXT: s_lshr_b32 s77, s93, 16 +; SI-NEXT: s_lshr_b32 s87, s91, 16 +; SI-NEXT: s_lshr_b32 s86, s92, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v14 +; SI-NEXT: v_writelane_b32 v29, s40, 5 +; SI-NEXT: s_mov_b32 s89, s27 +; SI-NEXT: s_mov_b32 s85, s26 +; SI-NEXT: s_mov_b32 s59, s20 +; SI-NEXT: s_mov_b32 s54, s18 +; SI-NEXT: s_mov_b32 s67, s17 +; SI-NEXT: s_mov_b32 s83, s16 ; SI-NEXT: s_cmp_lg_u32 s4, 0 -; SI-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_writelane_b32 v29, s11, 0 -; SI-NEXT: s_cbranch_scc0 .LBB57_4 +; SI-NEXT: v_writelane_b32 v29, s44, 6 +; SI-NEXT: v_writelane_b32 v29, s63, 7 +; SI-NEXT: s_cbranch_scc0 .LBB57_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s5, s17, 0xffff -; SI-NEXT: s_lshl_b32 s7, s73, 16 -; SI-NEXT: s_mov_b32 s9, s73 -; SI-NEXT: s_or_b32 s73, s5, s7 -; SI-NEXT: s_and_b32 s5, s19, 0xffff -; SI-NEXT: s_lshl_b32 s7, s75, 16 -; SI-NEXT: s_mov_b32 s78, s75 -; SI-NEXT: s_or_b32 s75, s5, s7 -; SI-NEXT: s_and_b32 s5, s21, 0xffff -; SI-NEXT: s_lshl_b32 s7, s77, 16 -; SI-NEXT: s_lshl_b32 s72, s79, 16 -; SI-NEXT: s_mov_b32 s90, s79 -; SI-NEXT: s_mov_b32 s79, s77 -; SI-NEXT: s_or_b32 s77, s5, s7 -; SI-NEXT: s_and_b32 s5, s23, 0xffff -; SI-NEXT: s_lshl_b32 s7, s89, 16 -; SI-NEXT: s_or_b32 s63, s5, s7 -; SI-NEXT: s_and_b32 s5, s25, 0xffff -; SI-NEXT: s_lshl_b32 s7, s50, 16 -; SI-NEXT: s_or_b32 s61, s5, s7 -; SI-NEXT: s_and_b32 s5, s27, 0xffff -; SI-NEXT: s_lshl_b32 s7, s65, 16 -; SI-NEXT: s_or_b32 s59, s5, s7 -; SI-NEXT: s_and_b32 s5, s29, 0xffff -; SI-NEXT: s_lshl_b32 s7, s64, 16 -; SI-NEXT: s_or_b32 s57, s5, s7 -; SI-NEXT: s_and_b32 s5, s97, 0xffff -; SI-NEXT: s_lshl_b32 s7, s69, 16 -; SI-NEXT: s_or_b32 s47, s5, s7 -; SI-NEXT: s_and_b32 s5, s82, 0xffff -; SI-NEXT: s_lshl_b32 s7, s71, 16 -; SI-NEXT: s_or_b32 s45, s5, s7 -; SI-NEXT: s_and_b32 s5, s85, 0xffff -; SI-NEXT: s_lshl_b32 s7, s66, 16 -; SI-NEXT: s_or_b32 s43, s5, s7 -; SI-NEXT: s_and_b32 s5, s96, 0xffff -; SI-NEXT: s_lshl_b32 s7, s70, 16 -; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_or_b32 s41, s5, s7 -; SI-NEXT: s_and_b32 s5, s86, 0xffff -; SI-NEXT: s_lshl_b32 s7, s68, 16 -; SI-NEXT: s_or_b32 s10, s4, s72 -; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s74, s92, 16 -; SI-NEXT: s_or_b32 s15, s5, s7 -; SI-NEXT: s_and_b32 s5, s52, 0xffff -; SI-NEXT: s_lshl_b32 s7, s88, 16 -; SI-NEXT: s_lshl_b32 vcc_lo, s11, 16 -; SI-NEXT: s_mov_b32 s11, s73 -; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16 -; SI-NEXT: s_or_b32 s8, s4, s74 -; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s76, s93, 16 -; SI-NEXT: s_or_b32 s13, s5, s7 -; SI-NEXT: s_and_b32 s5, s54, 0xffff -; SI-NEXT: s_lshl_b32 s7, s81, 16 -; SI-NEXT: v_writelane_b32 v29, s72, 1 -; SI-NEXT: s_or_b32 s6, s4, s76 -; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s62, s95, 16 -; SI-NEXT: s_or_b32 vcc_hi, s5, s7 -; SI-NEXT: v_writelane_b32 v29, s73, 2 -; SI-NEXT: s_mov_b32 s73, s9 -; SI-NEXT: s_mov_b32 s9, s75 -; SI-NEXT: s_lshr_b64 s[74:75], s[74:75], 16 -; SI-NEXT: s_mov_b32 s7, s77 -; SI-NEXT: s_lshr_b64 s[76:77], s[76:77], 16 -; SI-NEXT: s_or_b32 s4, s4, s62 -; SI-NEXT: s_lshl_b32 s60, s31, 16 -; SI-NEXT: s_mov_b32 s75, s78 -; SI-NEXT: s_mov_b32 s77, s79 -; SI-NEXT: s_lshr_b64 s[78:79], s[62:63], 16 -; SI-NEXT: s_and_b32 s62, s24, 0xffff -; SI-NEXT: s_mov_b32 s5, s63 -; SI-NEXT: s_or_b32 s62, s62, s60 -; SI-NEXT: s_mov_b32 s63, s61 -; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16 -; SI-NEXT: v_writelane_b32 v29, s60, 3 -; SI-NEXT: s_lshl_b32 s58, s35, 16 -; SI-NEXT: v_writelane_b32 v29, s61, 4 -; SI-NEXT: s_and_b32 s60, s26, 0xffff -; SI-NEXT: s_or_b32 s60, s60, s58 -; SI-NEXT: s_mov_b32 s61, s59 -; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16 -; SI-NEXT: v_writelane_b32 v29, s58, 5 -; SI-NEXT: s_lshl_b32 s56, s37, 16 -; SI-NEXT: v_writelane_b32 v29, s59, 6 -; SI-NEXT: s_and_b32 s58, s28, 0xffff -; SI-NEXT: s_or_b32 s58, s58, s56 -; SI-NEXT: s_mov_b32 s59, s57 -; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16 -; SI-NEXT: s_lshl_b32 s46, s39, 16 -; SI-NEXT: v_writelane_b32 v29, s56, 7 -; SI-NEXT: s_lshl_b32 s44, s49, 16 -; SI-NEXT: v_writelane_b32 v29, s57, 8 -; SI-NEXT: s_and_b32 s56, s99, 0xffff -; SI-NEXT: s_mov_b32 s30, s95 -; SI-NEXT: s_lshr_b64 s[94:95], s[46:47], 16 -; SI-NEXT: s_lshl_b32 s42, s51, 16 -; SI-NEXT: s_or_b32 s56, s56, s46 -; SI-NEXT: s_mov_b32 s95, s30 -; SI-NEXT: s_and_b32 s46, s84, 0xffff -; SI-NEXT: s_mov_b32 s34, s31 -; SI-NEXT: s_lshr_b64 s[30:31], s[44:45], 16 -; SI-NEXT: s_lshl_b32 s40, s67, 16 -; SI-NEXT: s_or_b32 s46, s46, s44 -; SI-NEXT: s_mov_b32 s31, s34 -; SI-NEXT: s_and_b32 s44, s87, 0xffff -; SI-NEXT: s_mov_b32 s36, s35 -; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 16 -; SI-NEXT: s_lshl_b32 s14, s91, 16 -; SI-NEXT: s_or_b32 s44, s44, s42 -; SI-NEXT: s_mov_b32 s35, s36 -; SI-NEXT: s_and_b32 s42, s83, 0xffff -; SI-NEXT: s_mov_b32 s38, s37 -; SI-NEXT: s_lshr_b64 s[36:37], s[40:41], 16 -; SI-NEXT: s_lshl_b32 s12, s80, 16 -; SI-NEXT: s_or_b32 s42, s42, s40 -; SI-NEXT: s_mov_b32 s37, s38 -; SI-NEXT: s_and_b32 s40, s98, 0xffff -; SI-NEXT: s_mov_b32 s48, s39 -; SI-NEXT: s_lshr_b64 s[38:39], s[14:15], 16 -; SI-NEXT: s_mov_b32 s72, s80 -; SI-NEXT: s_mov_b32 s80, s70 -; SI-NEXT: s_mov_b32 s70, s68 -; SI-NEXT: s_mov_b32 s68, s66 -; SI-NEXT: s_mov_b32 s66, s19 -; SI-NEXT: s_or_b32 s40, s40, s14 -; SI-NEXT: s_mov_b32 s39, s48 -; SI-NEXT: s_and_b32 s14, s53, 0xffff -; SI-NEXT: s_mov_b32 s19, s64 -; SI-NEXT: s_mov_b32 s64, s50 -; SI-NEXT: s_mov_b32 s50, s49 -; SI-NEXT: s_lshr_b64 s[48:49], s[12:13], 16 -; SI-NEXT: s_mov_b32 s79, s90 -; SI-NEXT: s_or_b32 s14, s14, s12 -; SI-NEXT: s_mov_b32 s49, s50 -; SI-NEXT: s_mov_b32 s50, s64 -; SI-NEXT: s_mov_b32 s64, s19 -; SI-NEXT: s_mov_b32 s19, s66 -; SI-NEXT: s_mov_b32 s66, s68 -; SI-NEXT: s_mov_b32 s68, s70 -; SI-NEXT: s_mov_b32 s70, s80 -; SI-NEXT: s_and_b32 s12, s55, 0xffff -; SI-NEXT: s_mov_b32 s80, s91 -; SI-NEXT: s_lshr_b64 s[90:91], vcc, 16 -; SI-NEXT: s_mov_b32 s57, s47 -; SI-NEXT: s_mov_b32 s47, s45 -; SI-NEXT: s_mov_b32 s45, s43 -; SI-NEXT: s_mov_b32 s43, s41 -; SI-NEXT: s_mov_b32 s41, s15 -; SI-NEXT: s_mov_b32 s15, s13 -; SI-NEXT: s_or_b32 s12, s12, vcc_lo -; SI-NEXT: s_mov_b32 s13, vcc_hi -; SI-NEXT: s_mov_b32 s91, s80 -; SI-NEXT: s_mov_b32 s80, s72 -; SI-NEXT: s_cbranch_execnz .LBB57_3 -; SI-NEXT: .LBB57_2: ; %cmp.true -; SI-NEXT: s_add_i32 s55, s55, 3 -; SI-NEXT: v_readlane_b32 s5, v29, 0 -; SI-NEXT: s_and_b32 s4, s55, 0xffff -; SI-NEXT: s_lshl_b32 s5, s5, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s54, s54, 3 -; SI-NEXT: s_add_i32 s12, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s54, 0xffff -; SI-NEXT: s_lshl_b32 s5, s81, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s53, s53, 3 -; SI-NEXT: s_add_i32 s13, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s53, 0xffff -; SI-NEXT: s_lshl_b32 s5, s80, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s52, s52, 3 -; SI-NEXT: s_add_i32 s14, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s52, 0xffff -; SI-NEXT: s_lshl_b32 s5, s88, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s98, s98, 3 -; SI-NEXT: s_add_i32 s15, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s98, 0xffff -; SI-NEXT: s_lshl_b32 s5, s91, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s86, s86, 3 -; SI-NEXT: s_add_i32 s40, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s86, 0xffff -; SI-NEXT: s_lshl_b32 s5, s68, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s83, s83, 3 -; SI-NEXT: s_add_i32 s41, s4, 0x30000 ; SI-NEXT: s_and_b32 s4, s83, 0xffff -; SI-NEXT: s_lshl_b32 s5, s67, 16 +; SI-NEXT: s_lshl_b32 s10, s52, 16 +; SI-NEXT: s_or_b32 s62, s4, s10 +; SI-NEXT: s_and_b32 s4, s54, 0xffff +; SI-NEXT: s_lshl_b32 s50, s70, 16 +; SI-NEXT: s_or_b32 s14, s4, s50 +; SI-NEXT: s_and_b32 s4, s59, 0xffff +; SI-NEXT: s_lshl_b32 s46, s64, 16 +; SI-NEXT: s_mov_b32 s6, s70 +; SI-NEXT: s_or_b32 s38, s4, s46 +; SI-NEXT: s_and_b32 s4, s22, 0xffff +; SI-NEXT: s_lshl_b32 s70, s66, 16 +; SI-NEXT: s_or_b32 s42, s4, s70 +; SI-NEXT: s_and_b32 s4, s24, 0xffff +; SI-NEXT: s_mov_b32 s15, s68 +; SI-NEXT: s_lshl_b32 s68, s68, 16 +; SI-NEXT: s_or_b32 s26, s4, s68 +; SI-NEXT: s_and_b32 s4, s85, 0xffff +; SI-NEXT: v_writelane_b32 v29, s66, 28 +; SI-NEXT: s_lshl_b32 s66, s69, 16 +; SI-NEXT: s_or_b32 s88, s4, s66 +; SI-NEXT: s_and_b32 s4, s28, 0xffff +; SI-NEXT: s_mov_b32 s39, s64 +; SI-NEXT: s_lshl_b32 s64, s71, 16 +; SI-NEXT: v_writelane_b32 v29, s92, 29 +; SI-NEXT: s_or_b32 s12, s4, s64 +; SI-NEXT: s_and_b32 s4, s92, 0xffff +; SI-NEXT: v_writelane_b32 v29, s28, 30 +; SI-NEXT: s_mov_b32 s28, s54 +; SI-NEXT: s_lshl_b32 s54, s86, 16 +; SI-NEXT: s_or_b32 s8, s4, s54 +; SI-NEXT: s_and_b32 s4, s93, 0xffff +; SI-NEXT: s_mov_b32 s27, s52 +; SI-NEXT: s_lshl_b32 s52, s77, 16 +; SI-NEXT: v_writelane_b32 v29, s24, 31 +; SI-NEXT: s_mov_b32 s92, s6 +; SI-NEXT: s_or_b32 s6, s4, s52 +; SI-NEXT: s_and_b32 s4, s49, 0xffff +; SI-NEXT: s_lshl_b32 vcc_lo, s81, 16 +; SI-NEXT: v_writelane_b32 v29, s22, 32 +; SI-NEXT: s_or_b32 s4, s4, vcc_lo +; SI-NEXT: v_writelane_b32 v29, s4, 33 +; SI-NEXT: v_writelane_b32 v29, s5, 34 +; SI-NEXT: s_and_b32 s7, s67, 0xffff +; SI-NEXT: s_lshl_b32 s9, s84, 16 +; SI-NEXT: s_or_b32 s11, s7, s9 +; SI-NEXT: v_readlane_b32 s9, v29, 2 +; SI-NEXT: s_and_b32 s7, s19, 0xffff +; SI-NEXT: s_lshl_b32 s9, s9, 16 +; SI-NEXT: s_or_b32 s51, s7, s9 +; SI-NEXT: v_readlane_b32 s9, v29, 1 +; SI-NEXT: v_writelane_b32 v29, s34, 35 +; SI-NEXT: v_writelane_b32 v29, s49, 36 +; SI-NEXT: s_and_b32 s7, s21, 0xffff +; SI-NEXT: s_lshl_b32 s9, s9, 16 +; SI-NEXT: v_writelane_b32 v29, s81, 37 +; SI-NEXT: s_or_b32 s47, s7, s9 +; SI-NEXT: s_and_b32 s7, s23, 0xffff +; SI-NEXT: s_lshl_b32 s9, s53, 16 +; SI-NEXT: v_writelane_b32 v29, s77, 38 +; SI-NEXT: v_writelane_b32 v29, s84, 39 +; SI-NEXT: s_mov_b32 s77, s71 +; SI-NEXT: s_or_b32 s71, s7, s9 +; SI-NEXT: s_and_b32 s7, s25, 0xffff +; SI-NEXT: s_lshl_b32 s9, s55, 16 +; SI-NEXT: s_mov_b32 s13, s69 +; SI-NEXT: s_or_b32 s69, s7, s9 +; SI-NEXT: s_and_b32 s7, s89, 0xffff +; SI-NEXT: s_lshl_b32 s9, s65, 16 +; SI-NEXT: v_readlane_b32 s4, v29, 0 +; SI-NEXT: s_mov_b32 s73, s67 +; SI-NEXT: s_or_b32 s67, s7, s9 +; SI-NEXT: s_and_b32 s7, s29, 0xffff +; SI-NEXT: s_lshl_b32 s9, s4, 16 +; SI-NEXT: s_mov_b32 s61, s65 +; SI-NEXT: s_or_b32 s65, s7, s9 +; SI-NEXT: s_and_b32 s7, s91, 0xffff +; SI-NEXT: s_lshl_b32 s9, s87, 16 +; SI-NEXT: s_mov_b32 s57, s55 +; SI-NEXT: s_or_b32 s55, s7, s9 +; SI-NEXT: s_and_b32 s7, s48, 0xffff +; SI-NEXT: s_lshl_b32 s9, s79, 16 +; SI-NEXT: s_mov_b32 s45, s53 +; SI-NEXT: s_or_b32 s53, s7, s9 +; SI-NEXT: s_and_b32 s7, s74, 0xffff +; SI-NEXT: s_lshl_b32 s9, s96, 16 +; SI-NEXT: s_or_b32 vcc_hi, s7, s9 +; SI-NEXT: s_and_b32 s7, s30, 0xffff +; SI-NEXT: s_lshl_b32 s9, s98, 16 +; SI-NEXT: v_readlane_b32 s4, v29, 3 +; SI-NEXT: s_mov_b32 s16, s79 +; SI-NEXT: s_mov_b32 s79, s87 +; SI-NEXT: s_or_b32 s87, s7, s9 +; SI-NEXT: s_lshl_b32 s9, s4, 16 +; SI-NEXT: v_readlane_b32 s4, v29, 4 +; SI-NEXT: s_mov_b32 s94, s5 +; SI-NEXT: s_and_b32 s5, s34, 0xffff +; SI-NEXT: s_mov_b32 s49, s86 +; SI-NEXT: s_lshl_b32 s86, s4, 16 +; SI-NEXT: s_mov_b32 s18, s96 +; SI-NEXT: s_or_b32 s60, s5, s86 +; SI-NEXT: s_and_b32 s5, s44, 0xffff +; SI-NEXT: s_lshl_b32 s96, s40, 16 +; SI-NEXT: s_mov_b32 s20, s98 +; SI-NEXT: s_or_b32 s56, s5, s96 +; SI-NEXT: s_and_b32 s5, s63, 0xffff +; SI-NEXT: s_lshl_b32 s98, s75, 16 +; SI-NEXT: s_or_b32 s44, s5, s98 +; SI-NEXT: s_and_b32 s5, s94, 0xffff +; SI-NEXT: s_lshl_b32 s40, s90, 16 +; SI-NEXT: s_or_b32 s72, s5, s40 +; SI-NEXT: s_lshr_b64 s[4:5], s[10:11], 16 +; SI-NEXT: v_writelane_b32 v29, s4, 8 +; SI-NEXT: s_mov_b32 s24, s85 +; SI-NEXT: v_writelane_b32 v29, s5, 9 +; SI-NEXT: s_lshr_b64 s[84:85], s[66:67], 16 +; SI-NEXT: v_writelane_b32 v29, s84, 10 +; SI-NEXT: v_writelane_b32 v29, s85, 11 +; SI-NEXT: s_lshr_b64 s[84:85], s[64:65], 16 +; SI-NEXT: v_readlane_b32 s66, v29, 28 +; SI-NEXT: v_writelane_b32 v29, s84, 12 +; SI-NEXT: v_writelane_b32 v29, s85, 13 +; SI-NEXT: s_lshr_b64 s[84:85], s[54:55], 16 +; SI-NEXT: v_writelane_b32 v29, s84, 14 +; SI-NEXT: s_mov_b32 s22, s83 +; SI-NEXT: s_lshr_b64 s[82:83], s[70:71], 16 +; SI-NEXT: v_writelane_b32 v29, s85, 15 +; SI-NEXT: s_lshr_b64 s[34:35], s[52:53], 16 +; SI-NEXT: s_mov_b32 s70, s92 +; SI-NEXT: s_mov_b32 s83, s22 +; SI-NEXT: s_mov_b32 s85, s24 +; SI-NEXT: s_mov_b32 s54, s28 +; SI-NEXT: v_readlane_b32 s22, v29, 32 +; SI-NEXT: v_readlane_b32 s24, v29, 31 +; SI-NEXT: v_readlane_b32 s28, v29, 30 +; SI-NEXT: v_readlane_b32 s92, v29, 29 +; SI-NEXT: v_writelane_b32 v29, s34, 16 +; SI-NEXT: v_writelane_b32 v29, s35, 17 +; SI-NEXT: s_lshr_b64 s[34:35], vcc, 16 +; SI-NEXT: v_writelane_b32 v29, s34, 18 +; SI-NEXT: s_and_b32 s7, s31, 0xffff +; SI-NEXT: v_writelane_b32 v29, s35, 19 +; SI-NEXT: s_lshr_b64 s[34:35], s[86:87], 16 +; SI-NEXT: s_or_b32 s97, s7, s9 +; SI-NEXT: v_writelane_b32 v29, s34, 20 +; SI-NEXT: s_and_b32 s7, s36, 0xffff +; SI-NEXT: s_lshl_b32 s9, s99, 16 +; SI-NEXT: v_writelane_b32 v29, s35, 21 +; SI-NEXT: s_lshr_b64 s[34:35], s[96:97], 16 +; SI-NEXT: s_mov_b32 s37, s99 +; SI-NEXT: s_or_b32 s99, s7, s9 +; SI-NEXT: v_writelane_b32 v29, s34, 22 +; SI-NEXT: s_and_b32 s7, s76, 0xffff +; SI-NEXT: s_lshl_b32 s9, s78, 16 +; SI-NEXT: v_writelane_b32 v29, s35, 23 +; SI-NEXT: s_lshr_b64 s[34:35], s[98:99], 16 +; SI-NEXT: s_or_b32 s41, s7, s9 +; SI-NEXT: v_writelane_b32 v29, s34, 24 +; SI-NEXT: v_writelane_b32 v29, s35, 25 +; SI-NEXT: s_lshr_b64 s[34:35], s[40:41], 16 +; SI-NEXT: v_writelane_b32 v29, s34, 26 +; SI-NEXT: v_writelane_b32 v29, s35, 27 +; SI-NEXT: s_lshr_b64 s[80:81], s[46:47], 16 +; SI-NEXT: s_mov_b32 s64, s39 +; SI-NEXT: s_mov_b32 s39, s47 +; SI-NEXT: v_readlane_b32 s46, v29, 33 +; SI-NEXT: s_mov_b32 s43, s59 +; SI-NEXT: s_mov_b32 s17, s89 +; SI-NEXT: s_lshr_b64 s[58:59], s[68:69], 16 +; SI-NEXT: s_mov_b32 s52, s27 +; SI-NEXT: v_readlane_b32 s47, v29, 34 +; SI-NEXT: s_mov_b32 s27, s69 +; SI-NEXT: s_mov_b32 s69, s13 +; SI-NEXT: s_mov_b32 s89, s67 +; SI-NEXT: s_mov_b32 s13, s65 +; SI-NEXT: s_mov_b32 s5, s94 +; SI-NEXT: s_lshr_b64 s[94:95], s[50:51], 16 +; SI-NEXT: s_mov_b32 s68, s15 +; SI-NEXT: s_mov_b32 s59, s43 +; SI-NEXT: s_mov_b32 s63, s11 +; SI-NEXT: s_mov_b32 s15, s51 +; SI-NEXT: s_mov_b32 s43, s71 +; SI-NEXT: s_mov_b32 s71, s77 +; SI-NEXT: v_readlane_b32 s84, v29, 39 +; SI-NEXT: s_mov_b32 s86, s49 +; SI-NEXT: v_readlane_b32 s77, v29, 38 +; SI-NEXT: v_readlane_b32 s81, v29, 37 +; SI-NEXT: v_readlane_b32 s49, v29, 36 +; SI-NEXT: v_readlane_b32 s34, v29, 35 +; SI-NEXT: s_mov_b64 s[50:51], s[88:89] +; SI-NEXT: s_mov_b32 s67, s73 +; SI-NEXT: s_mov_b64 s[10:11], s[12:13] +; SI-NEXT: s_mov_b32 s65, s61 +; SI-NEXT: s_mov_b32 s9, s55 +; SI-NEXT: s_mov_b32 s55, s57 +; SI-NEXT: s_mov_b32 s7, s53 +; SI-NEXT: s_mov_b32 s53, s45 +; SI-NEXT: s_mov_b32 s47, vcc_hi +; SI-NEXT: s_mov_b32 s61, s87 +; SI-NEXT: s_mov_b32 s87, s79 +; SI-NEXT: s_mov_b32 s79, s16 +; SI-NEXT: s_mov_b32 s96, s18 +; SI-NEXT: s_mov_b32 s98, s20 +; SI-NEXT: s_mov_b32 s89, s17 +; SI-NEXT: s_mov_b32 s57, s97 +; SI-NEXT: s_mov_b32 s45, s99 +; SI-NEXT: s_mov_b32 s99, s37 +; SI-NEXT: s_mov_b32 s73, s41 +; SI-NEXT: s_mov_b64 s[40:41], 0 +; SI-NEXT: s_branch .LBB57_3 +; SI-NEXT: .LBB57_2: +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: s_mov_b64 s[40:41], -1 +; SI-NEXT: v_writelane_b32 v29, s4, 8 +; SI-NEXT: v_writelane_b32 v29, s5, 9 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr38 +; SI-NEXT: ; implicit-def: $sgpr80 +; SI-NEXT: ; implicit-def: $sgpr42 +; SI-NEXT: ; implicit-def: $sgpr82 +; SI-NEXT: ; implicit-def: $sgpr26 +; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr50 +; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: v_writelane_b32 v29, s4, 10 +; SI-NEXT: v_writelane_b32 v29, s5, 11 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v29, s4, 12 +; SI-NEXT: v_writelane_b32 v29, s5, 13 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v29, s4, 14 +; SI-NEXT: v_writelane_b32 v29, s5, 15 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v29, s4, 16 +; SI-NEXT: v_writelane_b32 v29, s5, 17 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v29, s4, 18 +; SI-NEXT: v_writelane_b32 v29, s5, 19 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v29, s4, 20 +; SI-NEXT: v_writelane_b32 v29, s5, 21 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v29, s4, 22 +; SI-NEXT: v_writelane_b32 v29, s5, 23 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v29, s4, 24 +; SI-NEXT: v_writelane_b32 v29, s5, 25 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v29, s4, 26 +; SI-NEXT: v_writelane_b32 v29, s5, 27 +; SI-NEXT: .LBB57_3: ; %Flow +; SI-NEXT: v_readlane_b32 s16, v29, 14 +; SI-NEXT: s_andn2_b64 vcc, exec, s[40:41] +; SI-NEXT: s_mov_b64 s[12:13], s[50:51] +; SI-NEXT: v_readlane_b32 s40, v29, 12 +; SI-NEXT: s_mov_b32 s88, s16 +; SI-NEXT: v_readlane_b32 s50, v29, 16 +; SI-NEXT: v_readlane_b32 s41, v29, 13 +; SI-NEXT: v_readlane_b32 s17, v29, 15 +; SI-NEXT: v_readlane_b32 s51, v29, 17 +; SI-NEXT: s_cbranch_vccnz .LBB57_5 +; SI-NEXT: ; %bb.4: ; %cmp.true +; SI-NEXT: s_add_i32 s38, s5, 3 +; SI-NEXT: s_and_b32 s4, s38, 0xffff +; SI-NEXT: s_lshl_b32 s5, s90, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s96, s96, 3 -; SI-NEXT: s_add_i32 s42, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s96, 0xffff -; SI-NEXT: s_lshl_b32 s5, s70, 16 +; SI-NEXT: s_add_i32 s17, s76, 3 +; SI-NEXT: s_add_i32 s72, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s78, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s87, s87, 3 -; SI-NEXT: s_add_i32 s43, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s87, 0xffff -; SI-NEXT: s_lshl_b32 s5, s51, 16 +; SI-NEXT: s_add_i32 s73, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v29, 7 +; SI-NEXT: s_add_i32 s76, s4, 3 +; SI-NEXT: s_and_b32 s4, s76, 0xffff +; SI-NEXT: s_lshl_b32 s5, s75, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s85, s85, 3 +; SI-NEXT: s_add_i32 s37, s36, 3 ; SI-NEXT: s_add_i32 s44, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s85, 0xffff -; SI-NEXT: s_lshl_b32 s5, s66, 16 +; SI-NEXT: s_and_b32 s4, s37, 0xffff +; SI-NEXT: s_lshl_b32 s5, s99, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s84, s84, 3 ; SI-NEXT: s_add_i32 s45, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s84, 0xffff -; SI-NEXT: s_lshl_b32 s5, s49, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s82, s82, 3 -; SI-NEXT: s_add_i32 s46, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s82, 0xffff -; SI-NEXT: s_lshl_b32 s5, s71, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s99, s99, 3 -; SI-NEXT: s_add_i32 s47, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s99, 0xffff -; SI-NEXT: s_lshl_b32 s5, s39, 16 +; SI-NEXT: v_readlane_b32 s4, v29, 6 +; SI-NEXT: s_add_i32 s36, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v29, 5 +; SI-NEXT: s_and_b32 s4, s36, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s97, s97, 3 +; SI-NEXT: s_add_i32 s35, s31, 3 +; SI-NEXT: v_readlane_b32 s5, v29, 3 ; SI-NEXT: s_add_i32 s56, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s97, 0xffff -; SI-NEXT: s_lshl_b32 s5, s69, 16 +; SI-NEXT: s_and_b32 s4, s35, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: s_add_i32 s34, s34, 3 +; SI-NEXT: v_readlane_b32 s5, v29, 4 ; SI-NEXT: s_add_i32 s57, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s5, s37, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s29, s29, 3 -; SI-NEXT: s_add_i32 s58, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s29, 0xffff -; SI-NEXT: s_lshl_b32 s5, s64, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s26, s26, 3 -; SI-NEXT: s_add_i32 s59, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s26, 0xffff -; SI-NEXT: s_lshl_b32 s5, s35, 16 +; SI-NEXT: s_and_b32 s4, s34, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s27, s27, 3 +; SI-NEXT: s_add_i32 s31, s30, 3 ; SI-NEXT: s_add_i32 s60, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s27, 0xffff -; SI-NEXT: s_lshl_b32 s5, s65, 16 +; SI-NEXT: s_and_b32 s4, s31, 0xffff +; SI-NEXT: s_lshl_b32 s5, s98, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: s_add_i32 s30, s49, 3 ; SI-NEXT: s_add_i32 s61, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s5, s31, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s25, s25, 3 -; SI-NEXT: s_add_i32 s62, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s25, 0xffff -; SI-NEXT: s_lshl_b32 s5, s50, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s22, s22, 3 -; SI-NEXT: s_add_i32 s63, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s5, s95, 16 -; SI-NEXT: s_add_i32 s23, s23, 3 +; SI-NEXT: s_and_b32 s4, s30, 0xffff +; SI-NEXT: s_lshl_b32 s5, s81, 16 +; SI-NEXT: s_add_i32 s74, s74, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_and_b32 s5, s23, 0xffff -; SI-NEXT: s_lshl_b32 s6, s89, 16 -; SI-NEXT: s_add_i32 s20, s20, 3 +; SI-NEXT: s_and_b32 s5, s74, 0xffff +; SI-NEXT: s_lshl_b32 s6, s96, 16 +; SI-NEXT: s_add_i32 s95, s93, 3 ; SI-NEXT: s_or_b32 s5, s6, s5 -; SI-NEXT: s_and_b32 s6, s20, 0xffff -; SI-NEXT: s_lshl_b32 s7, s93, 16 -; SI-NEXT: s_add_i32 s21, s21, 3 +; SI-NEXT: s_and_b32 s6, s95, 0xffff +; SI-NEXT: s_lshl_b32 s7, s77, 16 +; SI-NEXT: s_add_i32 s94, s48, 3 ; SI-NEXT: s_or_b32 s6, s7, s6 -; SI-NEXT: s_and_b32 s7, s21, 0xffff -; SI-NEXT: s_lshl_b32 s8, s77, 16 -; SI-NEXT: s_add_i32 s18, s18, 3 +; SI-NEXT: s_and_b32 s7, s94, 0xffff +; SI-NEXT: s_lshl_b32 s8, s79, 16 +; SI-NEXT: s_add_i32 s93, s92, 3 ; SI-NEXT: s_or_b32 s7, s8, s7 -; SI-NEXT: s_and_b32 s8, s18, 0xffff -; SI-NEXT: s_lshl_b32 s9, s92, 16 -; SI-NEXT: s_add_i32 s19, s19, 3 +; SI-NEXT: s_and_b32 s8, s93, 0xffff +; SI-NEXT: s_lshl_b32 s9, s86, 16 +; SI-NEXT: s_add_i32 s92, s91, 3 ; SI-NEXT: s_or_b32 s8, s9, s8 -; SI-NEXT: s_and_b32 s9, s19, 0xffff -; SI-NEXT: s_lshl_b32 s10, s75, 16 -; SI-NEXT: s_add_i32 s16, s16, 3 +; SI-NEXT: s_and_b32 s9, s92, 0xffff +; SI-NEXT: s_lshl_b32 s10, s87, 16 +; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: s_add_i32 s46, s4, 0x30000 ; SI-NEXT: s_or_b32 s9, s10, s9 -; SI-NEXT: s_and_b32 s10, s16, 0xffff -; SI-NEXT: s_lshl_b32 s11, s79, 16 -; SI-NEXT: s_add_i32 s17, s17, 3 +; SI-NEXT: s_and_b32 s10, s28, 0xffff +; SI-NEXT: s_lshl_b32 s11, s71, 16 +; SI-NEXT: s_add_i32 s29, s29, 3 +; SI-NEXT: v_readlane_b32 s4, v29, 0 ; SI-NEXT: s_or_b32 s10, s11, s10 -; SI-NEXT: s_and_b32 s11, s17, 0xffff -; SI-NEXT: s_lshl_b32 s16, s73, 16 -; SI-NEXT: s_or_b32 s11, s16, s11 -; SI-NEXT: s_add_i32 s10, s10, 0x30000 +; SI-NEXT: s_and_b32 s11, s29, 0xffff +; SI-NEXT: s_lshl_b32 s12, s4, 16 +; SI-NEXT: s_add_i32 s26, s85, 3 +; SI-NEXT: s_or_b32 s11, s12, s11 +; SI-NEXT: s_and_b32 s12, s26, 0xffff +; SI-NEXT: s_lshl_b32 s13, s69, 16 +; SI-NEXT: s_add_i32 s27, s89, 3 +; SI-NEXT: s_or_b32 s12, s13, s12 +; SI-NEXT: s_and_b32 s13, s27, 0xffff +; SI-NEXT: s_lshl_b32 s14, s65, 16 +; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: s_or_b32 s13, s14, s13 +; SI-NEXT: s_and_b32 s14, s24, 0xffff +; SI-NEXT: s_lshl_b32 s15, s68, 16 +; SI-NEXT: s_add_i32 s25, s25, 3 +; SI-NEXT: s_or_b32 s14, s15, s14 +; SI-NEXT: s_and_b32 s15, s25, 0xffff +; SI-NEXT: s_lshl_b32 s17, s55, 16 +; SI-NEXT: s_add_i32 s22, s22, 3 +; SI-NEXT: s_or_b32 s15, s17, s15 +; SI-NEXT: s_and_b32 s17, s22, 0xffff +; SI-NEXT: s_lshl_b32 s22, s66, 16 +; SI-NEXT: s_or_b32 s17, s22, s17 +; SI-NEXT: s_add_i32 s23, s23, 3 +; SI-NEXT: s_add_i32 s42, s17, 0x30000 +; SI-NEXT: s_and_b32 s17, s23, 0xffff +; SI-NEXT: s_lshl_b32 s22, s53, 16 +; SI-NEXT: s_or_b32 s17, s22, s17 +; SI-NEXT: s_add_i32 s20, s59, 3 +; SI-NEXT: s_add_i32 s43, s17, 0x30000 +; SI-NEXT: s_and_b32 s17, s20, 0xffff +; SI-NEXT: s_lshl_b32 s20, s64, 16 +; SI-NEXT: s_or_b32 s17, s20, s17 +; SI-NEXT: s_add_i32 s21, s21, 3 +; SI-NEXT: v_readlane_b32 s20, v29, 1 +; SI-NEXT: s_add_i32 s38, s17, 0x30000 +; SI-NEXT: s_and_b32 s17, s21, 0xffff +; SI-NEXT: s_lshl_b32 s20, s20, 16 +; SI-NEXT: s_or_b32 s17, s20, s17 +; SI-NEXT: s_add_i32 s18, s54, 3 +; SI-NEXT: s_add_i32 s39, s17, 0x30000 +; SI-NEXT: s_and_b32 s17, s18, 0xffff +; SI-NEXT: s_lshl_b32 s18, s70, 16 +; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_add_i32 s19, s19, 3 +; SI-NEXT: v_readlane_b32 s18, v29, 2 +; SI-NEXT: s_add_i32 s26, s14, 0x30000 +; SI-NEXT: s_add_i32 s14, s17, 0x30000 +; SI-NEXT: s_and_b32 s17, s19, 0xffff +; SI-NEXT: s_lshl_b32 s18, s18, 16 +; SI-NEXT: s_or_b32 s17, s18, s17 +; SI-NEXT: s_add_i32 s16, s83, 3 +; SI-NEXT: s_add_i32 s27, s15, 0x30000 +; SI-NEXT: s_add_i32 s15, s17, 0x30000 +; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s17, s52, 16 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_add_i32 s62, s16, 0x30000 +; SI-NEXT: s_add_i32 s16, s67, 3 +; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s17, s84, 16 +; SI-NEXT: s_or_b32 s16, s17, s16 +; SI-NEXT: s_add_i32 s63, s16, 0x30000 +; SI-NEXT: s_add_i32 s47, s5, 0x30000 +; SI-NEXT: s_lshr_b64 s[4:5], s[62:63], 16 +; SI-NEXT: s_add_i32 s12, s12, 0x30000 +; SI-NEXT: s_add_i32 s13, s13, 0x30000 +; SI-NEXT: v_writelane_b32 v29, s4, 8 +; SI-NEXT: v_writelane_b32 v29, s5, 9 +; SI-NEXT: s_lshr_b64 s[4:5], s[12:13], 16 +; SI-NEXT: v_writelane_b32 v29, s4, 10 +; SI-NEXT: v_writelane_b32 v29, s5, 11 +; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 16 +; SI-NEXT: v_writelane_b32 v29, s4, 18 +; SI-NEXT: v_writelane_b32 v29, s5, 19 +; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 16 +; SI-NEXT: v_writelane_b32 v29, s4, 20 +; SI-NEXT: v_writelane_b32 v29, s5, 21 +; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 16 +; SI-NEXT: v_writelane_b32 v29, s4, 22 +; SI-NEXT: v_writelane_b32 v29, s5, 23 +; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 16 +; SI-NEXT: v_writelane_b32 v29, s4, 24 +; SI-NEXT: v_writelane_b32 v29, s5, 25 +; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 16 +; SI-NEXT: v_writelane_b32 v29, s4, 26 +; SI-NEXT: v_writelane_b32 v29, s5, 27 +; SI-NEXT: s_lshr_b32 s16, s15, 16 ; SI-NEXT: s_add_i32 s11, s11, 0x30000 -; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16 -; SI-NEXT: v_writelane_b32 v29, s16, 1 -; SI-NEXT: v_writelane_b32 v29, s17, 2 -; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16 -; SI-NEXT: v_writelane_b32 v29, s16, 3 -; SI-NEXT: v_writelane_b32 v29, s17, 4 -; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16 +; SI-NEXT: v_writelane_b32 v29, s16, 2 +; SI-NEXT: s_lshr_b32 s16, s39, 16 ; SI-NEXT: s_add_i32 s6, s6, 0x30000 ; SI-NEXT: s_add_i32 s7, s7, 0x30000 ; SI-NEXT: s_add_i32 s8, s8, 0x30000 ; SI-NEXT: s_add_i32 s9, s9, 0x30000 -; SI-NEXT: v_writelane_b32 v29, s16, 5 -; SI-NEXT: s_add_i32 s4, s4, 0x30000 -; SI-NEXT: s_add_i32 s5, s5, 0x30000 -; SI-NEXT: s_lshr_b64 s[74:75], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 16 -; SI-NEXT: v_writelane_b32 v29, s17, 6 -; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16 -; SI-NEXT: v_writelane_b32 v29, s16, 7 -; SI-NEXT: s_lshr_b64 s[94:95], s[56:57], 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[46:47], 16 -; SI-NEXT: s_lshr_b64 s[34:35], s[44:45], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[38:39], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[48:49], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[12:13], 16 -; SI-NEXT: s_lshr_b32 s73, s11, 16 -; SI-NEXT: s_lshr_b32 s75, s9, 16 -; SI-NEXT: s_lshr_b32 s77, s7, 16 -; SI-NEXT: s_lshr_b32 s89, s5, 16 -; SI-NEXT: s_lshr_b32 s50, s63, 16 -; SI-NEXT: s_lshr_b32 s65, s61, 16 -; SI-NEXT: s_lshr_b32 s64, s59, 16 -; SI-NEXT: s_lshr_b32 s69, s57, 16 -; SI-NEXT: s_lshr_b32 s71, s47, 16 -; SI-NEXT: s_lshr_b32 s66, s45, 16 -; SI-NEXT: s_lshr_b32 s70, s43, 16 -; SI-NEXT: s_lshr_b32 s68, s41, 16 -; SI-NEXT: s_lshr_b32 s88, s15, 16 -; SI-NEXT: s_lshr_b32 s81, s13, 16 -; SI-NEXT: v_writelane_b32 v29, s17, 8 -; SI-NEXT: .LBB57_3: ; %end -; SI-NEXT: v_readlane_b32 s16, v29, 1 -; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s16, s16, 16 -; SI-NEXT: s_or_b32 s10, s10, s16 -; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s16, s73, 16 -; SI-NEXT: s_or_b32 s11, s11, s16 -; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s16, s74, 16 -; SI-NEXT: s_or_b32 s8, s8, s16 -; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s16, s75, 16 -; SI-NEXT: s_or_b32 s9, s9, s16 -; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s16, s76, 16 -; SI-NEXT: s_or_b32 s6, s6, s16 -; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s16, s77, 16 -; SI-NEXT: s_or_b32 s7, s7, s16 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s16, s78, 16 -; SI-NEXT: v_readlane_b32 s17, v29, 2 -; SI-NEXT: s_or_b32 s4, s4, s16 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s16, s89, 16 -; SI-NEXT: v_readlane_b32 s18, v29, 3 -; SI-NEXT: s_or_b32 s5, s5, s16 +; SI-NEXT: s_add_i32 s10, s10, 0x30000 +; SI-NEXT: v_writelane_b32 v29, s16, 1 +; SI-NEXT: s_lshr_b32 s4, s11, 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[80:81], s[38:39], 16 +; SI-NEXT: s_lshr_b64 s[82:83], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 16 +; SI-NEXT: s_lshr_b32 s84, s63, 16 +; SI-NEXT: s_lshr_b32 s53, s43, 16 +; SI-NEXT: s_lshr_b32 s55, s27, 16 +; SI-NEXT: s_lshr_b32 s65, s13, 16 +; SI-NEXT: v_writelane_b32 v29, s4, 0 +; SI-NEXT: s_lshr_b32 s87, s9, 16 +; SI-NEXT: s_lshr_b32 s79, s7, 16 +; SI-NEXT: s_lshr_b32 s96, s47, 16 +; SI-NEXT: s_lshr_b32 s98, s61, 16 +; SI-NEXT: s_lshr_b32 s4, s57, 16 +; SI-NEXT: s_lshr_b32 s99, s45, 16 +; SI-NEXT: s_lshr_b32 s78, s73, 16 +; SI-NEXT: v_writelane_b32 v29, s4, 3 +; SI-NEXT: .LBB57_5: ; %end +; SI-NEXT: v_readlane_b32 s4, v29, 8 ; SI-NEXT: s_and_b32 s16, s62, 0xffff -; SI-NEXT: s_lshl_b32 s17, s18, 16 -; SI-NEXT: v_readlane_b32 s19, v29, 4 +; SI-NEXT: s_lshl_b32 s17, s4, 16 ; SI-NEXT: s_or_b32 s16, s16, s17 ; SI-NEXT: s_and_b32 s17, s63, 0xffff -; SI-NEXT: s_lshl_b32 s18, s50, 16 -; SI-NEXT: v_readlane_b32 s20, v29, 5 +; SI-NEXT: s_lshl_b32 s18, s84, 16 ; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s18, s60, 0xffff -; SI-NEXT: s_lshl_b32 s19, s20, 16 -; SI-NEXT: v_readlane_b32 s21, v29, 6 +; SI-NEXT: s_and_b32 s18, s14, 0xffff +; SI-NEXT: s_lshl_b32 s19, s94, 16 +; SI-NEXT: v_readlane_b32 s20, v29, 2 ; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_and_b32 s19, s61, 0xffff -; SI-NEXT: s_lshl_b32 s20, s65, 16 -; SI-NEXT: v_readlane_b32 s22, v29, 7 +; SI-NEXT: s_and_b32 s19, s15, 0xffff +; SI-NEXT: s_lshl_b32 s20, s20, 16 ; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_and_b32 s20, s58, 0xffff -; SI-NEXT: s_lshl_b32 s21, s22, 16 -; SI-NEXT: v_readlane_b32 s23, v29, 8 +; SI-NEXT: s_and_b32 s20, s38, 0xffff +; SI-NEXT: s_lshl_b32 s21, s80, 16 +; SI-NEXT: v_readlane_b32 s22, v29, 1 ; SI-NEXT: s_or_b32 s20, s20, s21 -; SI-NEXT: s_and_b32 s21, s59, 0xffff -; SI-NEXT: s_lshl_b32 s22, s64, 16 +; SI-NEXT: s_and_b32 s21, s39, 0xffff +; SI-NEXT: s_lshl_b32 s22, s22, 16 ; SI-NEXT: s_or_b32 s21, s21, s22 -; SI-NEXT: s_and_b32 s22, s56, 0xffff -; SI-NEXT: s_lshl_b32 s23, s94, 16 +; SI-NEXT: s_and_b32 s22, s42, 0xffff +; SI-NEXT: s_lshl_b32 s23, s82, 16 ; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_and_b32 s23, s57, 0xffff -; SI-NEXT: s_lshl_b32 s24, s69, 16 +; SI-NEXT: s_and_b32 s23, s43, 0xffff +; SI-NEXT: s_lshl_b32 s24, s53, 16 +; SI-NEXT: v_readlane_b32 s5, v29, 9 ; SI-NEXT: s_or_b32 s23, s23, s24 -; SI-NEXT: s_and_b32 s24, s46, 0xffff -; SI-NEXT: s_lshl_b32 s25, s30, 16 +; SI-NEXT: s_and_b32 s14, s26, 0xffff +; SI-NEXT: s_lshl_b32 s24, s58, 16 +; SI-NEXT: s_or_b32 s14, s14, s24 +; SI-NEXT: s_and_b32 s15, s27, 0xffff +; SI-NEXT: s_lshl_b32 s24, s55, 16 +; SI-NEXT: v_readlane_b32 s4, v29, 10 +; SI-NEXT: s_or_b32 s15, s15, s24 +; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: s_lshl_b32 s24, s4, 16 +; SI-NEXT: s_or_b32 s12, s12, s24 +; SI-NEXT: s_and_b32 s13, s13, 0xffff +; SI-NEXT: s_lshl_b32 s24, s65, 16 +; SI-NEXT: s_or_b32 s13, s13, s24 +; SI-NEXT: s_and_b32 s10, s10, 0xffff +; SI-NEXT: s_lshl_b32 s24, s40, 16 +; SI-NEXT: v_readlane_b32 s4, v29, 0 +; SI-NEXT: s_or_b32 s10, s10, s24 +; SI-NEXT: s_and_b32 s11, s11, 0xffff +; SI-NEXT: s_lshl_b32 s24, s4, 16 +; SI-NEXT: s_or_b32 s11, s11, s24 +; SI-NEXT: s_and_b32 s8, s8, 0xffff +; SI-NEXT: s_lshl_b32 s24, s88, 16 +; SI-NEXT: s_or_b32 s8, s8, s24 +; SI-NEXT: s_and_b32 s9, s9, 0xffff +; SI-NEXT: s_lshl_b32 s24, s87, 16 +; SI-NEXT: s_or_b32 s9, s9, s24 +; SI-NEXT: s_and_b32 s6, s6, 0xffff +; SI-NEXT: s_lshl_b32 s24, s50, 16 +; SI-NEXT: s_or_b32 s6, s6, s24 +; SI-NEXT: s_and_b32 s7, s7, 0xffff +; SI-NEXT: s_lshl_b32 s24, s79, 16 +; SI-NEXT: s_or_b32 s7, s7, s24 +; SI-NEXT: v_readlane_b32 s24, v29, 18 +; SI-NEXT: v_readlane_b32 s5, v29, 11 +; SI-NEXT: s_and_b32 s4, s46, 0xffff +; SI-NEXT: s_lshl_b32 s24, s24, 16 +; SI-NEXT: v_readlane_b32 s25, v29, 19 +; SI-NEXT: s_or_b32 s4, s4, s24 +; SI-NEXT: s_and_b32 s5, s47, 0xffff +; SI-NEXT: s_lshl_b32 s24, s96, 16 +; SI-NEXT: v_readlane_b32 s26, v29, 20 +; SI-NEXT: s_or_b32 s5, s5, s24 +; SI-NEXT: s_and_b32 s24, s60, 0xffff +; SI-NEXT: s_lshl_b32 s25, s26, 16 +; SI-NEXT: v_readlane_b32 s27, v29, 21 ; SI-NEXT: s_or_b32 s24, s24, s25 -; SI-NEXT: s_and_b32 s25, s47, 0xffff -; SI-NEXT: s_lshl_b32 s26, s71, 16 +; SI-NEXT: s_and_b32 s25, s61, 0xffff +; SI-NEXT: s_lshl_b32 s26, s98, 16 +; SI-NEXT: v_readlane_b32 s28, v29, 22 ; SI-NEXT: s_or_b32 s25, s25, s26 -; SI-NEXT: s_and_b32 s26, s44, 0xffff -; SI-NEXT: s_lshl_b32 s27, s34, 16 +; SI-NEXT: s_and_b32 s26, s56, 0xffff +; SI-NEXT: s_lshl_b32 s27, s28, 16 +; SI-NEXT: v_readlane_b32 s28, v29, 3 +; SI-NEXT: v_readlane_b32 s29, v29, 23 ; SI-NEXT: s_or_b32 s26, s26, s27 -; SI-NEXT: s_and_b32 s27, s45, 0xffff -; SI-NEXT: s_lshl_b32 s28, s66, 16 +; SI-NEXT: s_and_b32 s27, s57, 0xffff +; SI-NEXT: s_lshl_b32 s28, s28, 16 +; SI-NEXT: v_readlane_b32 s40, v29, 24 ; SI-NEXT: s_or_b32 s27, s27, s28 -; SI-NEXT: s_and_b32 s28, s42, 0xffff -; SI-NEXT: s_lshl_b32 s29, s36, 16 +; SI-NEXT: s_and_b32 s28, s44, 0xffff +; SI-NEXT: s_lshl_b32 s29, s40, 16 +; SI-NEXT: v_readlane_b32 s41, v29, 25 ; SI-NEXT: s_or_b32 s28, s28, s29 -; SI-NEXT: s_and_b32 s29, s43, 0xffff -; SI-NEXT: s_lshl_b32 s42, s70, 16 -; SI-NEXT: s_or_b32 s29, s29, s42 -; SI-NEXT: s_and_b32 s40, s40, 0xffff -; SI-NEXT: s_lshl_b32 s42, s38, 16 -; SI-NEXT: s_or_b32 s40, s40, s42 -; SI-NEXT: s_and_b32 s41, s41, 0xffff -; SI-NEXT: s_lshl_b32 s42, s68, 16 +; SI-NEXT: s_and_b32 s29, s45, 0xffff +; SI-NEXT: s_lshl_b32 s40, s99, 16 +; SI-NEXT: v_readlane_b32 s42, v29, 26 +; SI-NEXT: s_or_b32 s29, s29, s40 +; SI-NEXT: s_and_b32 s40, s72, 0xffff +; SI-NEXT: s_lshl_b32 s41, s42, 16 +; SI-NEXT: s_or_b32 s40, s40, s41 +; SI-NEXT: s_and_b32 s41, s73, 0xffff +; SI-NEXT: s_lshl_b32 s42, s78, 16 ; SI-NEXT: s_or_b32 s41, s41, s42 -; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s42, s48, 16 -; SI-NEXT: s_or_b32 s14, s14, s42 -; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s42, s88, 16 -; SI-NEXT: s_or_b32 s15, s15, s42 -; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s42, s90, 16 -; SI-NEXT: s_or_b32 s12, s12, s42 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s42, s81, 16 -; SI-NEXT: s_or_b32 s13, s13, s42 ; SI-NEXT: v_readlane_b32 s30, v28, 34 -; SI-NEXT: v_mov_b32_e32 v0, s10 -; SI-NEXT: v_mov_b32_e32 v1, s11 -; SI-NEXT: v_mov_b32_e32 v2, s8 -; SI-NEXT: v_mov_b32_e32 v3, s9 -; SI-NEXT: v_mov_b32_e32 v4, s6 -; SI-NEXT: v_mov_b32_e32 v5, s7 -; SI-NEXT: v_mov_b32_e32 v6, s4 -; SI-NEXT: v_mov_b32_e32 v7, s5 -; SI-NEXT: v_mov_b32_e32 v8, s16 -; SI-NEXT: v_mov_b32_e32 v9, s17 -; SI-NEXT: v_mov_b32_e32 v10, s18 -; SI-NEXT: v_mov_b32_e32 v11, s19 -; SI-NEXT: v_mov_b32_e32 v12, s20 -; SI-NEXT: v_mov_b32_e32 v13, s21 -; SI-NEXT: v_mov_b32_e32 v14, s22 -; SI-NEXT: v_mov_b32_e32 v15, s23 -; SI-NEXT: v_mov_b32_e32 v16, s24 -; SI-NEXT: v_mov_b32_e32 v17, s25 -; SI-NEXT: v_mov_b32_e32 v18, s26 -; SI-NEXT: v_mov_b32_e32 v19, s27 -; SI-NEXT: v_mov_b32_e32 v20, s28 -; SI-NEXT: v_mov_b32_e32 v21, s29 -; SI-NEXT: v_mov_b32_e32 v22, s40 -; SI-NEXT: v_mov_b32_e32 v23, s41 -; SI-NEXT: v_mov_b32_e32 v24, s14 -; SI-NEXT: v_mov_b32_e32 v25, s15 -; SI-NEXT: v_mov_b32_e32 v26, s12 -; SI-NEXT: v_mov_b32_e32 v27, s13 +; SI-NEXT: v_readlane_b32 s43, v29, 27 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_mov_b32_e32 v2, s18 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v4, s20 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v6, s22 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v8, s14 +; SI-NEXT: v_mov_b32_e32 v9, s15 +; SI-NEXT: v_mov_b32_e32 v10, s12 +; SI-NEXT: v_mov_b32_e32 v11, s13 +; SI-NEXT: v_mov_b32_e32 v12, s10 +; SI-NEXT: v_mov_b32_e32 v13, s11 +; SI-NEXT: v_mov_b32_e32 v14, s8 +; SI-NEXT: v_mov_b32_e32 v15, s9 +; SI-NEXT: v_mov_b32_e32 v16, s6 +; SI-NEXT: v_mov_b32_e32 v17, s7 +; SI-NEXT: v_mov_b32_e32 v18, s4 +; SI-NEXT: v_mov_b32_e32 v19, s5 +; SI-NEXT: v_mov_b32_e32 v20, s24 +; SI-NEXT: v_mov_b32_e32 v21, s25 +; SI-NEXT: v_mov_b32_e32 v22, s26 +; SI-NEXT: v_mov_b32_e32 v23, s27 +; SI-NEXT: v_mov_b32_e32 v24, s28 +; SI-NEXT: v_mov_b32_e32 v25, s29 +; SI-NEXT: v_mov_b32_e32 v26, s40 +; SI-NEXT: v_mov_b32_e32 v27, s41 ; SI-NEXT: v_readlane_b32 s31, v28, 35 ; SI-NEXT: v_readlane_b32 s99, v28, 33 ; SI-NEXT: v_readlane_b32 s98, v28, 32 @@ -44504,44 +44718,6 @@ define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] -; SI-NEXT: .LBB57_4: -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: v_writelane_b32 v29, s4, 1 -; SI-NEXT: v_writelane_b32 v29, s5, 2 -; SI-NEXT: v_writelane_b32 v29, s12, 3 -; SI-NEXT: v_writelane_b32 v29, s13, 4 -; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr10 -; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr74 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr76 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr78 -; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr94 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr30 -; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr90 -; SI-NEXT: v_writelane_b32 v29, s12, 5 -; SI-NEXT: v_writelane_b32 v29, s13, 6 -; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: v_writelane_b32 v29, s12, 7 -; SI-NEXT: v_writelane_b32 v29, s13, 8 -; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: s_branch .LBB57_2 ; ; VI-LABEL: bitcast_v56i16_to_v56f16_scalar: ; VI: ; %bb.0: @@ -46469,48 +46645,48 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_readfirstlane_b32 s44, v13 -; SI-NEXT: v_readfirstlane_b32 s60, v12 -; SI-NEXT: v_readfirstlane_b32 s42, v11 +; SI-NEXT: v_readfirstlane_b32 s56, v13 +; SI-NEXT: v_readfirstlane_b32 s59, v12 +; SI-NEXT: v_readfirstlane_b32 s45, v11 ; SI-NEXT: v_readfirstlane_b32 s62, v10 -; SI-NEXT: v_readfirstlane_b32 s41, v9 -; SI-NEXT: v_readfirstlane_b32 s73, v8 -; SI-NEXT: v_readfirstlane_b32 s40, v7 -; SI-NEXT: v_readfirstlane_b32 s76, v6 +; SI-NEXT: v_readfirstlane_b32 s43, v9 +; SI-NEXT: v_readfirstlane_b32 s72, v8 +; SI-NEXT: v_readfirstlane_b32 s41, v7 +; SI-NEXT: v_readfirstlane_b32 s74, v6 ; SI-NEXT: v_readfirstlane_b32 s15, v5 -; SI-NEXT: v_readfirstlane_b32 s79, v4 +; SI-NEXT: v_readfirstlane_b32 s77, v4 ; SI-NEXT: v_readfirstlane_b32 s14, v3 -; SI-NEXT: v_readfirstlane_b32 s90, v2 +; SI-NEXT: v_readfirstlane_b32 s88, v2 ; SI-NEXT: v_readfirstlane_b32 s13, v1 -; SI-NEXT: v_readfirstlane_b32 s92, v0 +; SI-NEXT: v_readfirstlane_b32 s91, v0 ; SI-NEXT: s_lshr_b32 s12, s29, 16 -; SI-NEXT: s_lshr_b32 s75, s28, 16 +; SI-NEXT: s_lshr_b32 s76, s28, 16 ; SI-NEXT: s_lshr_b32 s11, s27, 16 -; SI-NEXT: s_lshr_b32 s78, s26, 16 +; SI-NEXT: s_lshr_b32 s79, s26, 16 ; SI-NEXT: s_lshr_b32 s10, s25, 16 -; SI-NEXT: s_lshr_b32 s89, s24, 16 +; SI-NEXT: s_lshr_b32 s90, s24, 16 ; SI-NEXT: s_lshr_b32 s9, s23, 16 -; SI-NEXT: s_lshr_b32 s91, s22, 16 +; SI-NEXT: s_lshr_b32 s92, s22, 16 ; SI-NEXT: s_lshr_b32 s8, s21, 16 ; SI-NEXT: s_lshr_b32 s93, s20, 16 ; SI-NEXT: s_lshr_b32 s7, s19, 16 ; SI-NEXT: s_lshr_b32 s94, s18, 16 ; SI-NEXT: s_lshr_b32 s6, s17, 16 ; SI-NEXT: s_lshr_b32 s95, s16, 16 -; SI-NEXT: s_lshr_b32 s72, s44, 16 -; SI-NEXT: s_lshr_b32 s46, s60, 16 -; SI-NEXT: s_lshr_b32 s61, s42, 16 -; SI-NEXT: s_lshr_b32 s57, s62, 16 -; SI-NEXT: s_lshr_b32 s58, s41, 16 -; SI-NEXT: s_lshr_b32 s59, s73, 16 -; SI-NEXT: s_lshr_b32 s56, s40, 16 -; SI-NEXT: s_lshr_b32 s63, s76, 16 -; SI-NEXT: s_lshr_b32 s47, s15, 16 -; SI-NEXT: s_lshr_b32 s74, s79, 16 -; SI-NEXT: s_lshr_b32 s45, s14, 16 -; SI-NEXT: s_lshr_b32 s77, s90, 16 -; SI-NEXT: s_lshr_b32 s43, s13, 16 -; SI-NEXT: s_lshr_b32 s88, s92, 16 +; SI-NEXT: s_lshr_b32 s63, s56, 16 +; SI-NEXT: s_lshr_b32 s46, s59, 16 +; SI-NEXT: s_lshr_b32 s60, s45, 16 +; SI-NEXT: s_lshr_b32 s58, s62, 16 +; SI-NEXT: s_lshr_b32 s57, s43, 16 +; SI-NEXT: s_lshr_b32 s61, s72, 16 +; SI-NEXT: s_lshr_b32 s47, s41, 16 +; SI-NEXT: s_lshr_b32 s73, s74, 16 +; SI-NEXT: s_lshr_b32 s44, s15, 16 +; SI-NEXT: s_lshr_b32 s75, s77, 16 +; SI-NEXT: s_lshr_b32 s42, s14, 16 +; SI-NEXT: s_lshr_b32 s78, s88, 16 +; SI-NEXT: s_lshr_b32 s40, s13, 16 +; SI-NEXT: s_lshr_b32 s89, s91, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v14 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB59_3 @@ -46522,175 +46698,176 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i ; SI-NEXT: v_cvt_f32_f16_e32 v2, s94 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s18 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s20 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v54, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s93 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_or_b32_e32 v50, v1, v0 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s93 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v54, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s20 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v4, s91 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v4 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v2 +; SI-NEXT: v_or_b32_e32 v53, v3, v51 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s92 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s22 -; SI-NEXT: v_or_b32_e32 v51, v3, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s89 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v5 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s24 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_or_b32_e32 v39, v5, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s90 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_or_b32_e32 v48, v1, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s78 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s26 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_or_b32_e32 v49, v5, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s75 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s24 +; SI-NEXT: v_or_b32_e32 v50, v1, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s79 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s26 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_or_b32_e32 v29, v3, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s76 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s28 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_or_b32_e32 v34, v3, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s88 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s92 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_or_b32_e32 v38, v5, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s89 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_or_b32_e32 v56, v1, v12 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s77 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s90 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_or_b32_e32 v35, v5, v14 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s74 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s79 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_or_b32_e32 v33, v3, v16 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s63 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s76 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s91 +; SI-NEXT: v_or_b32_e32 v35, v1, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s78 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s88 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_or_b32_e32 v32, v1, v18 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s59 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s73 +; SI-NEXT: v_or_b32_e32 v34, v3, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s75 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s77 +; SI-NEXT: v_or_b32_e32 v31, v5, v16 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s73 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_or_b32_e32 v31, v5, v20 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s57 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s74 +; SI-NEXT: v_or_b32_e32 v32, v1, v18 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s61 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s72 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s62 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_or_b32_e32 v3, v3, v22 -; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v30, v3, v20 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s58 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v1 +; SI-NEXT: v_or_b32_e32 v1, v5, v22 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v3, s46 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s60 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s62 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s46 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s59 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_or_b32_e32 v1, v1, v24 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v1, s72 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s44 -; SI-NEXT: v_or_b32_e32 v30, v5, v26 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s63 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s56 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v5 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s61 -; SI-NEXT: v_cvt_f16_f32_e32 v52, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s60 +; SI-NEXT: v_cvt_f16_f32_e32 v36, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v29, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v52 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s42 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f16_f32_e32 v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v36 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s45 ; SI-NEXT: v_or_b32_e32 v27, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s58 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s41 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s57 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s43 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v57, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v33, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v29 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 ; SI-NEXT: v_or_b32_e32 v25, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s56 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v57 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s47 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33 ; SI-NEXT: v_or_b32_e32 v23, v3, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s40 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s41 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s47 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s44 ; SI-NEXT: v_cvt_f16_f32_e32 v37, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v39, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v61, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s15 ; SI-NEXT: v_or_b32_e32 v21, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s45 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s42 ; SI-NEXT: v_cvt_f32_f16_e32 v7, s14 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v38, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v62, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v61 ; SI-NEXT: v_or_b32_e32 v19, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s43 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v38 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s40 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62 ; SI-NEXT: v_or_b32_e32 v17, v3, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s13 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s12 -; SI-NEXT: v_cvt_f16_f32_e32 v62, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v49, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v63, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v62 +; SI-NEXT: v_cvt_f16_f32_e32 v48, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s29 ; SI-NEXT: v_or_b32_e32 v15, v1, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s11 @@ -46698,13 +46875,13 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v53, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v57, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v48 ; SI-NEXT: v_or_b32_e32 v13, v5, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v57 ; SI-NEXT: v_or_b32_e32 v11, v3, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s25 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s9 @@ -46714,103 +46891,94 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s23 -; SI-NEXT: v_cvt_f16_f32_e32 v36, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v63, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v60 ; SI-NEXT: v_or_b32_e32 v9, v1, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s8 ; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v63 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v58, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v56, v3 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 ; SI-NEXT: v_or_b32_e32 v7, v5, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s7 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v58 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v56 ; SI-NEXT: v_cvt_f32_f16_e32 v28, s17 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_or_b32_e32 v5, v3, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 -; SI-NEXT: v_cvt_f16_f32_e32 v59, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v58, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s6 ; SI-NEXT: v_lshr_b64 v[42:43], v[4:5], 16 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v61, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v59, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v28 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v58 +; SI-NEXT: v_or_b32_e32 v52, v3, v28 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v59 -; SI-NEXT: v_or_b32_e32 v3, v3, v28 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v61 ; SI-NEXT: v_or_b32_e32 v1, v1, v28 ; SI-NEXT: v_lshr_b64 v[46:47], v[0:1], 16 -; SI-NEXT: v_mov_b32_e32 v4, v54 -; SI-NEXT: v_lshr_b64 v[54:55], v[8:9], 16 -; SI-NEXT: v_mov_b32_e32 v8, v48 -; SI-NEXT: v_lshr_b64 v[47:48], v[10:11], 16 -; SI-NEXT: v_lshr_b64 v[44:45], v[2:3], 16 -; SI-NEXT: v_mov_b32_e32 v2, v50 +; SI-NEXT: v_mov_b32_e32 v0, v54 +; SI-NEXT: v_mov_b32_e32 v3, v52 +; SI-NEXT: v_lshr_b64 v[44:45], v[51:52], 16 +; SI-NEXT: v_mov_b32_e32 v4, v53 ; SI-NEXT: v_lshr_b64 v[40:41], v[6:7], 16 -; SI-NEXT: v_mov_b32_e32 v6, v51 -; SI-NEXT: v_mov_b32_e32 v10, v49 +; SI-NEXT: v_mov_b32_e32 v6, v39 +; SI-NEXT: v_lshr_b64 v[54:55], v[8:9], 16 +; SI-NEXT: v_mov_b32_e32 v8, v50 +; SI-NEXT: v_lshr_b64 v[52:53], v[10:11], 16 +; SI-NEXT: v_mov_b32_e32 v10, v29 ; SI-NEXT: v_lshr_b64 v[50:51], v[12:13], 16 -; SI-NEXT: v_lshr_b64 v[48:49], v[14:15], 16 -; SI-NEXT: v_mov_b32_e32 v51, v63 -; SI-NEXT: v_mov_b32_e32 v12, v34 -; SI-NEXT: v_mov_b32_e32 v49, v62 -; SI-NEXT: v_mov_b32_e32 v14, v56 -; SI-NEXT: v_lshr_b64 v[62:63], v[16:17], 16 -; SI-NEXT: v_mov_b32_e32 v16, v35 -; SI-NEXT: v_lshr_b64 v[55:56], v[18:19], 16 -; SI-NEXT: v_mov_b32_e32 v18, v33 +; SI-NEXT: v_mov_b32_e32 v12, v38 +; SI-NEXT: v_lshr_b64 v[28:29], v[14:15], 16 +; SI-NEXT: v_lshr_b64 v[38:39], v[16:17], 16 +; SI-NEXT: v_mov_b32_e32 v14, v35 +; SI-NEXT: v_mov_b32_e32 v39, v62 +; SI-NEXT: v_mov_b32_e32 v16, v34 +; SI-NEXT: v_mov_b32_e32 v51, v61 +; SI-NEXT: v_lshr_b64 v[61:62], v[18:19], 16 +; SI-NEXT: v_mov_b32_e32 v18, v31 ; SI-NEXT: v_lshr_b64 v[34:35], v[20:21], 16 +; SI-NEXT: v_mov_b32_e32 v29, v33 ; SI-NEXT: v_mov_b32_e32 v20, v32 ; SI-NEXT: v_lshr_b64 v[32:33], v[22:23], 16 -; SI-NEXT: v_mov_b32_e32 v33, v30 -; SI-NEXT: v_mov_b32_e32 v22, v31 +; SI-NEXT: v_mov_b32_e32 v22, v30 ; SI-NEXT: v_lshr_b64 v[30:31], v[24:25], 16 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v31, v29 -; SI-NEXT: v_lshr_b64 v[28:29], v[26:27], 16 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v31, v36 +; SI-NEXT: v_lshr_b64 v[35:36], v[26:27], 16 +; SI-NEXT: v_mov_b32_e32 v33, v2 +; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_or_b32_e32 v26, v2, v26 ; SI-NEXT: s_branch .LBB59_5 ; SI-NEXT: .LBB59_3: ; SI-NEXT: s_branch .LBB59_2 ; SI-NEXT: .LBB59_4: -; SI-NEXT: v_mov_b32_e32 v52, s72 -; SI-NEXT: v_mov_b32_e32 v31, s61 +; SI-NEXT: v_mov_b32_e32 v31, s63 +; SI-NEXT: v_mov_b32_e32 v33, s60 +; SI-NEXT: v_mov_b32_e32 v29, s57 +; SI-NEXT: v_mov_b32_e32 v37, s47 +; SI-NEXT: v_mov_b32_e32 v51, s44 +; SI-NEXT: v_mov_b32_e32 v39, s42 +; SI-NEXT: v_mov_b32_e32 v49, s40 +; SI-NEXT: v_mov_b32_e32 v48, s12 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_mov_b32_e32 v57, s58 -; SI-NEXT: v_mov_b32_e32 v37, s56 -; SI-NEXT: v_mov_b32_e32 v39, s47 -; SI-NEXT: v_mov_b32_e32 v38, s45 -; SI-NEXT: v_mov_b32_e32 v49, s43 -; SI-NEXT: v_mov_b32_e32 v51, s12 -; SI-NEXT: v_mov_b32_e32 v53, s11 +; SI-NEXT: v_mov_b32_e32 v57, s11 ; SI-NEXT: s_waitcnt expcnt(3) ; SI-NEXT: v_mov_b32_e32 v60, s10 -; SI-NEXT: v_mov_b32_e32 v36, s9 -; SI-NEXT: v_mov_b32_e32 v58, s8 -; SI-NEXT: v_mov_b32_e32 v59, s7 -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v61, s6 -; SI-NEXT: v_mov_b32_e32 v33, s60 -; SI-NEXT: v_mov_b32_e32 v26, s62 -; SI-NEXT: v_mov_b32_e32 v24, s73 -; SI-NEXT: v_mov_b32_e32 v22, s76 -; SI-NEXT: v_mov_b32_e32 v20, s79 -; SI-NEXT: v_mov_b32_e32 v18, s90 -; SI-NEXT: v_mov_b32_e32 v16, s92 -; SI-NEXT: v_mov_b32_e32 v14, s28 -; SI-NEXT: v_mov_b32_e32 v12, s26 -; SI-NEXT: v_mov_b32_e32 v10, s24 -; SI-NEXT: v_mov_b32_e32 v8, s22 -; SI-NEXT: v_mov_b32_e32 v6, s20 -; SI-NEXT: v_mov_b32_e32 v4, s18 -; SI-NEXT: v_mov_b32_e32 v2, s16 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_mov_b32_e32 v63, s9 +; SI-NEXT: v_mov_b32_e32 v56, s8 +; SI-NEXT: v_mov_b32_e32 v58, s7 +; SI-NEXT: v_mov_b32_e32 v59, s6 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v5, s21 @@ -46821,98 +46989,95 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i ; SI-NEXT: v_mov_b32_e32 v15, s13 ; SI-NEXT: v_mov_b32_e32 v17, s14 ; SI-NEXT: v_mov_b32_e32 v19, s15 -; SI-NEXT: v_mov_b32_e32 v21, s40 -; SI-NEXT: v_mov_b32_e32 v23, s41 -; SI-NEXT: v_mov_b32_e32 v25, s42 -; SI-NEXT: v_mov_b32_e32 v27, s44 +; SI-NEXT: v_mov_b32_e32 v21, s41 +; SI-NEXT: v_mov_b32_e32 v23, s43 +; SI-NEXT: v_mov_b32_e32 v25, s45 +; SI-NEXT: v_mov_b32_e32 v27, s56 +; SI-NEXT: v_mov_b32_e32 v26, s59 +; SI-NEXT: v_mov_b32_e32 v36, s62 +; SI-NEXT: v_mov_b32_e32 v24, s72 +; SI-NEXT: v_mov_b32_e32 v22, s74 +; SI-NEXT: v_mov_b32_e32 v20, s77 +; SI-NEXT: v_mov_b32_e32 v18, s88 +; SI-NEXT: v_mov_b32_e32 v16, s91 +; SI-NEXT: v_mov_b32_e32 v14, s28 +; SI-NEXT: v_mov_b32_e32 v12, s26 +; SI-NEXT: v_mov_b32_e32 v10, s24 +; SI-NEXT: v_mov_b32_e32 v8, s22 +; SI-NEXT: v_mov_b32_e32 v6, s20 +; SI-NEXT: v_mov_b32_e32 v4, s18 +; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v46, s95 ; SI-NEXT: v_mov_b32_e32 v44, s94 ; SI-NEXT: v_mov_b32_e32 v42, s93 -; SI-NEXT: v_mov_b32_e32 v40, s91 -; SI-NEXT: v_mov_b32_e32 v54, s89 -; SI-NEXT: v_mov_b32_e32 v47, s78 -; SI-NEXT: v_mov_b32_e32 v50, s75 -; SI-NEXT: v_mov_b32_e32 v48, s88 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v62, s77 -; SI-NEXT: v_mov_b32_e32 v55, s74 -; SI-NEXT: v_mov_b32_e32 v34, s63 -; SI-NEXT: v_mov_b32_e32 v32, s59 -; SI-NEXT: v_mov_b32_e32 v30, s57 -; SI-NEXT: v_mov_b32_e32 v28, s46 +; SI-NEXT: v_mov_b32_e32 v40, s92 +; SI-NEXT: v_mov_b32_e32 v54, s90 +; SI-NEXT: v_mov_b32_e32 v52, s79 +; SI-NEXT: v_mov_b32_e32 v50, s76 +; SI-NEXT: v_mov_b32_e32 v28, s89 +; SI-NEXT: v_mov_b32_e32 v38, s78 +; SI-NEXT: v_mov_b32_e32 v61, s75 +; SI-NEXT: v_mov_b32_e32 v34, s73 +; SI-NEXT: v_mov_b32_e32 v32, s61 +; SI-NEXT: v_mov_b32_e32 v30, s58 +; SI-NEXT: v_mov_b32_e32 v35, s46 ; SI-NEXT: .LBB59_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v46 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v46 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v61 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v44 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v44 +; SI-NEXT: v_or_b32_e32 v2, v2, v4 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v59 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v58 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v42 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v42 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v58 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v56 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v40 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v40 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v36 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v63 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v54 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v54 +; SI-NEXT: v_or_b32_e32 v8, v8, v10 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v60 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v47 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: v_or_b32_e32 v10, v12, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v52 +; SI-NEXT: v_or_b32_e32 v10, v10, v12 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v57 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v14 ; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v50 ; SI-NEXT: v_or_b32_e32 v12, v12, v14 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v48 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v16 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v28 ; SI-NEXT: v_or_b32_e32 v14, v14, v16 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v49 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v18 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v62 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v38 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 ; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v39 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v20 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v55 -; SI-NEXT: v_or_b32_e32 v18, v18, v20 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v39 -; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v22 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v34 -; SI-NEXT: v_or_b32_e32 v20, v20, v22 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v37 -; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_and_b32_e32 v22, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32 -; SI-NEXT: v_or_b32_e32 v22, v22, v24 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v57 -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v61 ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -46929,20 +47094,34 @@ define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v18, v18, v20 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v51 +; SI-NEXT: v_or_b32_e32 v19, v19, v20 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v22 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v34 +; SI-NEXT: v_or_b32_e32 v20, v20, v22 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v37 +; SI-NEXT: v_or_b32_e32 v21, v21, v22 +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v24 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v32 +; SI-NEXT: v_or_b32_e32 v22, v22, v24 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v29 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v26 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v30 -; SI-NEXT: v_or_b32_e32 v24, v24, v26 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v36 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v30 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v35 +; SI-NEXT: v_or_b32_e32 v24, v24, v29 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v31 -; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v33 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v33 ; SI-NEXT: v_or_b32_e32 v26, v26, v28 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v31 +; SI-NEXT: v_or_b32_e32 v25, v25, v29 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll index 47a80c7161aae..4ede995f01d69 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll @@ -4638,6 +4638,13 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s34, s5, 16 ; SI-NEXT: s_lshr_b32 s35, s7, 16 ; SI-NEXT: s_lshr_b32 s36, s9, 16 @@ -4653,46 +4660,39 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3 ; SI-NEXT: s_lshr_b32 s54, s21, 16 ; SI-NEXT: s_lshr_b32 s55, s19, 16 ; SI-NEXT: s_lshr_b32 s64, s17, 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16 ; SI-NEXT: .LBB13_3: ; %end -; SI-NEXT: s_lshl_b32 s45, s30, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s45, s30, 16 ; SI-NEXT: s_or_b32 s16, s16, s45 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s45, s64, 16 ; SI-NEXT: s_or_b32 s17, s17, s45 -; SI-NEXT: s_lshl_b32 s45, s94, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s45, s94, 16 ; SI-NEXT: s_or_b32 s18, s18, s45 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s45, s55, 16 ; SI-NEXT: s_or_b32 s19, s19, s45 -; SI-NEXT: s_lshl_b32 s45, s92, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s45, s92, 16 ; SI-NEXT: s_or_b32 s20, s20, s45 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s45, s54, 16 ; SI-NEXT: s_or_b32 s21, s21, s45 -; SI-NEXT: s_lshl_b32 s45, s90, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s45, s90, 16 ; SI-NEXT: s_or_b32 s22, s22, s45 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s45, s53, 16 ; SI-NEXT: s_or_b32 s23, s23, s45 -; SI-NEXT: s_lshl_b32 s45, s88, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s45, s88, 16 ; SI-NEXT: s_or_b32 s24, s24, s45 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s45, s52, 16 ; SI-NEXT: s_or_b32 s25, s25, s45 -; SI-NEXT: s_lshl_b32 s45, s78, 16 ; SI-NEXT: s_and_b32 s26, s26, 0xffff +; SI-NEXT: s_lshl_b32 s45, s78, 16 ; SI-NEXT: s_or_b32 s26, s26, s45 ; SI-NEXT: s_and_b32 s27, s27, 0xffff ; SI-NEXT: s_lshl_b32 s45, s51, 16 @@ -4832,8 +4832,8 @@ define inreg <60 x i16> @bitcast_v30i32_to_v60i16_scalar(<30 x i32> inreg %a, i3 ; SI-NEXT: ; implicit-def: $sgpr36 ; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr35 -; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: s_branch .LBB13_2 ; ; VI-LABEL: bitcast_v30i32_to_v60i16_scalar: @@ -6243,10 +6243,10 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v29, 3 ; VI-NEXT: v_add_u16_e32 v0, 3, v61 ; VI-NEXT: v_add_u16_sdwa v1, v61, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 3, v60 -; VI-NEXT: v_add_u16_sdwa v3, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v60 +; VI-NEXT: v_add_u16_sdwa v2, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v59 ; VI-NEXT: v_add_u16_sdwa v3, v59, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -6441,8 +6441,8 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44 ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45 ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v47 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v56 ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57 ; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58 ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59 @@ -6478,8 +6478,8 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6 ; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6 -; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6 -; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6 +; GFX9-NEXT: v_perm_b32 v5, v63, v56, s6 +; GFX9-NEXT: v_perm_b32 v6, v34, v47, s6 ; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6 ; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6 ; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6 @@ -6521,8 +6521,8 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr62 @@ -6636,8 +6636,8 @@ define <30 x i32> @bitcast_v60i16_to_v30i32(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6 ; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6 -; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6 -; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6 +; GFX9-NEXT: v_perm_b32 v5, v63, v56, s6 +; GFX9-NEXT: v_perm_b32 v6, v34, v47, s6 ; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6 ; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6 ; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] @@ -7006,17 +7006,17 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s98, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s97, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s96, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s98, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s87, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s86, 16 @@ -7420,17 +7420,17 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s76, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s74, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s14, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s74, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s12, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s10, 16 @@ -7512,14 +7512,14 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: s_and_b32 s4, s16, 0xffff ; VI-NEXT: s_lshl_b32 s5, s76, 16 +; VI-NEXT: s_or_b32 s4, s5, s4 ; VI-NEXT: s_add_i32 s17, s17, 3 +; VI-NEXT: s_add_i32 s36, s4, 0x30000 +; VI-NEXT: s_and_b32 s4, s17, 0xffff +; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_and_b32 s5, s17, 0xffff -; VI-NEXT: s_lshl_b32 s16, s74, 16 -; VI-NEXT: s_or_b32 s5, s16, s5 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s36, s4, 0x30000 -; VI-NEXT: s_add_i32 s37, s5, 0x30000 +; VI-NEXT: s_add_i32 s37, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s18, 0xffff ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 @@ -7748,28 +7748,24 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v32, s36, 0 -; GFX9-NEXT: v_writelane_b32 v32, s37, 1 -; GFX9-NEXT: v_writelane_b32 v32, s38, 2 -; GFX9-NEXT: v_writelane_b32 v32, s39, 3 -; GFX9-NEXT: v_writelane_b32 v32, s48, 4 -; GFX9-NEXT: v_writelane_b32 v32, s49, 5 -; GFX9-NEXT: v_writelane_b32 v32, s50, 6 -; GFX9-NEXT: v_writelane_b32 v32, s51, 7 -; GFX9-NEXT: v_writelane_b32 v32, s52, 8 -; GFX9-NEXT: v_writelane_b32 v32, s53, 9 -; GFX9-NEXT: v_writelane_b32 v32, s54, 10 -; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: v_writelane_b32 v32, s64, 12 -; GFX9-NEXT: v_writelane_b32 v32, s65, 13 -; GFX9-NEXT: s_lshr_b32 s10, s23, 16 -; GFX9-NEXT: s_lshr_b32 s11, s22, 16 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s34, 0 +; GFX9-NEXT: v_writelane_b32 v32, s35, 1 +; GFX9-NEXT: v_writelane_b32 v32, s36, 2 +; GFX9-NEXT: v_writelane_b32 v32, s37, 3 +; GFX9-NEXT: v_writelane_b32 v32, s38, 4 +; GFX9-NEXT: v_writelane_b32 v32, s39, 5 +; GFX9-NEXT: v_writelane_b32 v32, s48, 6 +; GFX9-NEXT: v_writelane_b32 v32, s49, 7 +; GFX9-NEXT: v_writelane_b32 v32, s50, 8 +; GFX9-NEXT: v_writelane_b32 v32, s51, 9 +; GFX9-NEXT: v_writelane_b32 v32, s52, 10 +; GFX9-NEXT: v_writelane_b32 v32, s53, 11 +; GFX9-NEXT: v_writelane_b32 v32, s54, 12 +; GFX9-NEXT: v_writelane_b32 v32, s55, 13 +; GFX9-NEXT: v_writelane_b32 v32, s64, 14 +; GFX9-NEXT: v_writelane_b32 v32, s65, 15 +; GFX9-NEXT: v_writelane_b32 v32, s30, 16 +; GFX9-NEXT: v_writelane_b32 v32, s31, 17 ; GFX9-NEXT: v_readfirstlane_b32 s72, v15 ; GFX9-NEXT: v_readfirstlane_b32 s74, v14 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 @@ -7779,27 +7775,27 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v6 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 -; GFX9-NEXT: v_readfirstlane_b32 s11, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 -; GFX9-NEXT: v_readfirstlane_b32 s10, v0 +; GFX9-NEXT: v_readfirstlane_b32 s56, v6 +; GFX9-NEXT: v_readfirstlane_b32 s92, v5 +; GFX9-NEXT: v_readfirstlane_b32 s94, v4 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v3 +; GFX9-NEXT: v_readfirstlane_b32 s30, v2 +; GFX9-NEXT: v_readfirstlane_b32 s34, v1 +; GFX9-NEXT: v_readfirstlane_b32 s50, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 ; GFX9-NEXT: s_lshr_b32 s7, s26, 16 ; GFX9-NEXT: s_lshr_b32 s8, s25, 16 ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 +; GFX9-NEXT: s_lshr_b32 s10, s23, 16 +; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s73, s72, 16 ; GFX9-NEXT: s_lshr_b32 s75, s74, 16 ; GFX9-NEXT: s_lshr_b32 s76, s63, 16 @@ -7809,28 +7805,36 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s88, s59, 16 ; GFX9-NEXT: s_lshr_b32 s89, s58, 16 ; GFX9-NEXT: s_lshr_b32 s90, s57, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 -; GFX9-NEXT: s_lshr_b32 s22, s11, 16 -; GFX9-NEXT: s_lshr_b32 s23, s10, 16 -; GFX9-NEXT: v_readfirstlane_b32 s44, v16 -; GFX9-NEXT: s_cmp_lg_u32 s44, 0 +; GFX9-NEXT: s_lshr_b32 s91, s56, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 +; GFX9-NEXT: s_lshr_b32 s35, s34, 16 +; GFX9-NEXT: s_lshr_b32 s51, s50, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v16 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 +; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 +; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 ; GFX9-NEXT: s_pack_ll_b32_b16 s45, s25, s8 ; GFX9-NEXT: s_pack_ll_b32_b16 s46, s26, s7 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s10, s23 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s11, s22 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s55, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s56, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s50, s51 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s34, s35 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s55, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s90 ; GFX9-NEXT: s_pack_ll_b32_b16 s58, s58, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s59, s59, s88 @@ -7911,20 +7915,24 @@ define inreg <30 x i32> @bitcast_v60i16_to_v30i32_scalar(<60 x i16> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB15_5: ; %end -; GFX9-NEXT: v_readlane_b32 s65, v32, 13 -; GFX9-NEXT: v_readlane_b32 s64, v32, 12 -; GFX9-NEXT: v_readlane_b32 s55, v32, 11 -; GFX9-NEXT: v_readlane_b32 s54, v32, 10 -; GFX9-NEXT: v_readlane_b32 s53, v32, 9 -; GFX9-NEXT: v_readlane_b32 s52, v32, 8 -; GFX9-NEXT: v_readlane_b32 s51, v32, 7 -; GFX9-NEXT: v_readlane_b32 s50, v32, 6 -; GFX9-NEXT: v_readlane_b32 s49, v32, 5 -; GFX9-NEXT: v_readlane_b32 s48, v32, 4 -; GFX9-NEXT: v_readlane_b32 s39, v32, 3 -; GFX9-NEXT: v_readlane_b32 s38, v32, 2 -; GFX9-NEXT: v_readlane_b32 s37, v32, 1 -; GFX9-NEXT: v_readlane_b32 s36, v32, 0 +; GFX9-NEXT: v_readlane_b32 s30, v32, 16 +; GFX9-NEXT: v_readlane_b32 s31, v32, 17 +; GFX9-NEXT: v_readlane_b32 s65, v32, 15 +; GFX9-NEXT: v_readlane_b32 s64, v32, 14 +; GFX9-NEXT: v_readlane_b32 s55, v32, 13 +; GFX9-NEXT: v_readlane_b32 s54, v32, 12 +; GFX9-NEXT: v_readlane_b32 s53, v32, 11 +; GFX9-NEXT: v_readlane_b32 s52, v32, 10 +; GFX9-NEXT: v_readlane_b32 s51, v32, 9 +; GFX9-NEXT: v_readlane_b32 s50, v32, 8 +; GFX9-NEXT: v_readlane_b32 s49, v32, 7 +; GFX9-NEXT: v_readlane_b32 s48, v32, 6 +; GFX9-NEXT: v_readlane_b32 s39, v32, 5 +; GFX9-NEXT: v_readlane_b32 s38, v32, 4 +; GFX9-NEXT: v_readlane_b32 s37, v32, 3 +; GFX9-NEXT: v_readlane_b32 s36, v32, 2 +; GFX9-NEXT: v_readlane_b32 s35, v32, 1 +; GFX9-NEXT: v_readlane_b32 s34, v32, 0 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] @@ -9105,6 +9113,13 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i ; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16 ; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16 ; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16 ; SI-NEXT: s_lshr_b32 s34, s5, 16 ; SI-NEXT: s_lshr_b32 s35, s7, 16 ; SI-NEXT: s_lshr_b32 s36, s9, 16 @@ -9120,46 +9135,39 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i ; SI-NEXT: s_lshr_b32 s54, s21, 16 ; SI-NEXT: s_lshr_b32 s55, s19, 16 ; SI-NEXT: s_lshr_b32 s64, s17, 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16 ; SI-NEXT: .LBB17_3: ; %end -; SI-NEXT: s_lshl_b32 s45, s30, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s45, s30, 16 ; SI-NEXT: s_or_b32 s16, s16, s45 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s45, s64, 16 ; SI-NEXT: s_or_b32 s17, s17, s45 -; SI-NEXT: s_lshl_b32 s45, s94, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s45, s94, 16 ; SI-NEXT: s_or_b32 s18, s18, s45 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s45, s55, 16 ; SI-NEXT: s_or_b32 s19, s19, s45 -; SI-NEXT: s_lshl_b32 s45, s92, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s45, s92, 16 ; SI-NEXT: s_or_b32 s20, s20, s45 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s45, s54, 16 ; SI-NEXT: s_or_b32 s21, s21, s45 -; SI-NEXT: s_lshl_b32 s45, s90, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s45, s90, 16 ; SI-NEXT: s_or_b32 s22, s22, s45 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s45, s53, 16 ; SI-NEXT: s_or_b32 s23, s23, s45 -; SI-NEXT: s_lshl_b32 s45, s88, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s45, s88, 16 ; SI-NEXT: s_or_b32 s24, s24, s45 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s45, s52, 16 ; SI-NEXT: s_or_b32 s25, s25, s45 -; SI-NEXT: s_lshl_b32 s45, s78, 16 ; SI-NEXT: s_and_b32 s26, s26, 0xffff +; SI-NEXT: s_lshl_b32 s45, s78, 16 ; SI-NEXT: s_or_b32 s26, s26, s45 ; SI-NEXT: s_and_b32 s27, s27, 0xffff ; SI-NEXT: s_lshl_b32 s45, s51, 16 @@ -9299,8 +9307,8 @@ define inreg <60 x half> @bitcast_v30i32_to_v60f16_scalar(<30 x i32> inreg %a, i ; SI-NEXT: ; implicit-def: $sgpr36 ; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr35 -; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: s_branch .LBB17_2 ; ; VI-LABEL: bitcast_v30i32_to_v60f16_scalar: @@ -10133,17 +10141,17 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v47 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v56 -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v58 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v59 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v60 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v59 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v60 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30 ; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v61 ; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill @@ -10164,24 +10172,24 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v49 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v63 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v59 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v58 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v39 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v57 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v56 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v62 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37 @@ -10196,7 +10204,7 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v35 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v34 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41 ; SI-NEXT: ; implicit-def: $vgpr61 @@ -10213,17 +10221,17 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload @@ -10391,202 +10399,201 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v49 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v48 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v63 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v58 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v57 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v48 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v39 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v39 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v56 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v57 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v47 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v37 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v46 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v36 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v44 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v44 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v35 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v34 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v42 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v41 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v37 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v40 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v41 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v54 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v36 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v54 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v51 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v35 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v63 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v40 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 +; SI-NEXT: v_or_b32_e32 v13, v14, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v14, v16, v14 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 +; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 +; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 ; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 -; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_cvt_f32_f16_e32 v30, v30 ; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 ; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_cvt_f32_f16_e32 v30, v30 +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30 ; SI-NEXT: v_cvt_f16_f32_e32 v30, v30 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 ; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v53 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_or_b32_e32 v16, v17, v16 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload @@ -10853,10 +10860,10 @@ define <30 x i32> @bitcast_v60f16_to_v30i32(<60 x half> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v29, 0x200 ; VI-NEXT: v_add_f16_sdwa v0, v61, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, 0x200, v61 -; VI-NEXT: v_add_f16_sdwa v2, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, 0x200, v60 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_add_f16_sdwa v1, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, 0x200, v60 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_add_f16_sdwa v2, v59, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, 0x200, v59 ; VI-NEXT: v_or_b32_e32 v2, v3, v2 @@ -11617,17 +11624,17 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s98, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s97, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s96, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s98, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s87, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s86, 16 @@ -12127,17 +12134,17 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s77, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s73, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s15, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s75, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s13, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s9, 16 @@ -12222,13 +12229,13 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i ; VI-NEXT: .LBB19_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v29, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s77 -; VI-NEXT: v_mov_b32_e32 v2, s75 ; VI-NEXT: v_add_f16_sdwa v0, v0, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v29 -; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v29 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s75 +; VI-NEXT: v_add_f16_sdwa v1, v1, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v29 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s73 ; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v29 @@ -12436,28 +12443,24 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v32, s36, 0 -; GFX9-NEXT: v_writelane_b32 v32, s37, 1 -; GFX9-NEXT: v_writelane_b32 v32, s38, 2 -; GFX9-NEXT: v_writelane_b32 v32, s39, 3 -; GFX9-NEXT: v_writelane_b32 v32, s48, 4 -; GFX9-NEXT: v_writelane_b32 v32, s49, 5 -; GFX9-NEXT: v_writelane_b32 v32, s50, 6 -; GFX9-NEXT: v_writelane_b32 v32, s51, 7 -; GFX9-NEXT: v_writelane_b32 v32, s52, 8 -; GFX9-NEXT: v_writelane_b32 v32, s53, 9 -; GFX9-NEXT: v_writelane_b32 v32, s54, 10 -; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: v_writelane_b32 v32, s64, 12 -; GFX9-NEXT: v_writelane_b32 v32, s65, 13 -; GFX9-NEXT: s_lshr_b32 s10, s23, 16 -; GFX9-NEXT: s_lshr_b32 s11, s22, 16 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s34, 0 +; GFX9-NEXT: v_writelane_b32 v32, s35, 1 +; GFX9-NEXT: v_writelane_b32 v32, s36, 2 +; GFX9-NEXT: v_writelane_b32 v32, s37, 3 +; GFX9-NEXT: v_writelane_b32 v32, s38, 4 +; GFX9-NEXT: v_writelane_b32 v32, s39, 5 +; GFX9-NEXT: v_writelane_b32 v32, s48, 6 +; GFX9-NEXT: v_writelane_b32 v32, s49, 7 +; GFX9-NEXT: v_writelane_b32 v32, s50, 8 +; GFX9-NEXT: v_writelane_b32 v32, s51, 9 +; GFX9-NEXT: v_writelane_b32 v32, s52, 10 +; GFX9-NEXT: v_writelane_b32 v32, s53, 11 +; GFX9-NEXT: v_writelane_b32 v32, s54, 12 +; GFX9-NEXT: v_writelane_b32 v32, s55, 13 +; GFX9-NEXT: v_writelane_b32 v32, s64, 14 +; GFX9-NEXT: v_writelane_b32 v32, s65, 15 +; GFX9-NEXT: v_writelane_b32 v32, s30, 16 +; GFX9-NEXT: v_writelane_b32 v32, s31, 17 ; GFX9-NEXT: v_readfirstlane_b32 s72, v15 ; GFX9-NEXT: v_readfirstlane_b32 s74, v14 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 @@ -12467,27 +12470,27 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v6 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 -; GFX9-NEXT: v_readfirstlane_b32 s11, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 -; GFX9-NEXT: v_readfirstlane_b32 s10, v0 +; GFX9-NEXT: v_readfirstlane_b32 s56, v6 +; GFX9-NEXT: v_readfirstlane_b32 s92, v5 +; GFX9-NEXT: v_readfirstlane_b32 s94, v4 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v3 +; GFX9-NEXT: v_readfirstlane_b32 s30, v2 +; GFX9-NEXT: v_readfirstlane_b32 s34, v1 +; GFX9-NEXT: v_readfirstlane_b32 s50, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 ; GFX9-NEXT: s_lshr_b32 s7, s26, 16 ; GFX9-NEXT: s_lshr_b32 s8, s25, 16 ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 +; GFX9-NEXT: s_lshr_b32 s10, s23, 16 +; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s73, s72, 16 ; GFX9-NEXT: s_lshr_b32 s75, s74, 16 ; GFX9-NEXT: s_lshr_b32 s76, s63, 16 @@ -12497,28 +12500,36 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s88, s59, 16 ; GFX9-NEXT: s_lshr_b32 s89, s58, 16 ; GFX9-NEXT: s_lshr_b32 s90, s57, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 -; GFX9-NEXT: s_lshr_b32 s22, s11, 16 -; GFX9-NEXT: s_lshr_b32 s23, s10, 16 -; GFX9-NEXT: v_readfirstlane_b32 s44, v16 -; GFX9-NEXT: s_cmp_lg_u32 s44, 0 +; GFX9-NEXT: s_lshr_b32 s91, s56, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 +; GFX9-NEXT: s_lshr_b32 s35, s34, 16 +; GFX9-NEXT: s_lshr_b32 s51, s50, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v16 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 +; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 +; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 ; GFX9-NEXT: s_pack_ll_b32_b16 s45, s25, s8 ; GFX9-NEXT: s_pack_ll_b32_b16 s46, s26, s7 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s10, s23 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s11, s22 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s55, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s56, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s50, s51 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s34, s35 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s55, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s90 ; GFX9-NEXT: s_pack_ll_b32_b16 s58, s58, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s59, s59, s88 @@ -12600,20 +12611,24 @@ define inreg <30 x i32> @bitcast_v60f16_to_v30i32_scalar(<60 x half> inreg %a, i ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB19_5: ; %end -; GFX9-NEXT: v_readlane_b32 s65, v32, 13 -; GFX9-NEXT: v_readlane_b32 s64, v32, 12 -; GFX9-NEXT: v_readlane_b32 s55, v32, 11 -; GFX9-NEXT: v_readlane_b32 s54, v32, 10 -; GFX9-NEXT: v_readlane_b32 s53, v32, 9 -; GFX9-NEXT: v_readlane_b32 s52, v32, 8 -; GFX9-NEXT: v_readlane_b32 s51, v32, 7 -; GFX9-NEXT: v_readlane_b32 s50, v32, 6 -; GFX9-NEXT: v_readlane_b32 s49, v32, 5 -; GFX9-NEXT: v_readlane_b32 s48, v32, 4 -; GFX9-NEXT: v_readlane_b32 s39, v32, 3 -; GFX9-NEXT: v_readlane_b32 s38, v32, 2 -; GFX9-NEXT: v_readlane_b32 s37, v32, 1 -; GFX9-NEXT: v_readlane_b32 s36, v32, 0 +; GFX9-NEXT: v_readlane_b32 s30, v32, 16 +; GFX9-NEXT: v_readlane_b32 s31, v32, 17 +; GFX9-NEXT: v_readlane_b32 s65, v32, 15 +; GFX9-NEXT: v_readlane_b32 s64, v32, 14 +; GFX9-NEXT: v_readlane_b32 s55, v32, 13 +; GFX9-NEXT: v_readlane_b32 s54, v32, 12 +; GFX9-NEXT: v_readlane_b32 s53, v32, 11 +; GFX9-NEXT: v_readlane_b32 s52, v32, 10 +; GFX9-NEXT: v_readlane_b32 s51, v32, 9 +; GFX9-NEXT: v_readlane_b32 s50, v32, 8 +; GFX9-NEXT: v_readlane_b32 s49, v32, 7 +; GFX9-NEXT: v_readlane_b32 s48, v32, 6 +; GFX9-NEXT: v_readlane_b32 s39, v32, 5 +; GFX9-NEXT: v_readlane_b32 s38, v32, 4 +; GFX9-NEXT: v_readlane_b32 s37, v32, 3 +; GFX9-NEXT: v_readlane_b32 s36, v32, 2 +; GFX9-NEXT: v_readlane_b32 s35, v32, 1 +; GFX9-NEXT: v_readlane_b32 s34, v32, 0 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] @@ -16361,39 +16376,37 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_writelane_b32 v62, s34, 0 -; SI-NEXT: v_writelane_b32 v62, s35, 1 -; SI-NEXT: v_writelane_b32 v62, s36, 2 -; SI-NEXT: v_writelane_b32 v62, s37, 3 -; SI-NEXT: v_writelane_b32 v62, s38, 4 -; SI-NEXT: v_writelane_b32 v62, s39, 5 -; SI-NEXT: v_writelane_b32 v62, s48, 6 -; SI-NEXT: v_writelane_b32 v62, s49, 7 -; SI-NEXT: v_writelane_b32 v62, s50, 8 -; SI-NEXT: v_writelane_b32 v62, s51, 9 -; SI-NEXT: v_writelane_b32 v62, s52, 10 -; SI-NEXT: v_writelane_b32 v62, s53, 11 -; SI-NEXT: v_writelane_b32 v62, s54, 12 -; SI-NEXT: v_writelane_b32 v62, s55, 13 -; SI-NEXT: v_writelane_b32 v62, s64, 14 -; SI-NEXT: v_writelane_b32 v62, s30, 15 -; SI-NEXT: v_writelane_b32 v62, s31, 16 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: v_writelane_b32 v60, s34, 0 +; SI-NEXT: v_writelane_b32 v60, s35, 1 +; SI-NEXT: v_writelane_b32 v60, s36, 2 +; SI-NEXT: v_writelane_b32 v60, s37, 3 +; SI-NEXT: v_writelane_b32 v60, s38, 4 +; SI-NEXT: v_writelane_b32 v60, s39, 5 +; SI-NEXT: v_writelane_b32 v60, s48, 6 +; SI-NEXT: v_writelane_b32 v60, s49, 7 +; SI-NEXT: v_writelane_b32 v60, s50, 8 +; SI-NEXT: v_writelane_b32 v60, s51, 9 +; SI-NEXT: v_writelane_b32 v60, s52, 10 +; SI-NEXT: v_writelane_b32 v60, s53, 11 +; SI-NEXT: v_writelane_b32 v60, s54, 12 +; SI-NEXT: v_writelane_b32 v60, s55, 13 +; SI-NEXT: v_writelane_b32 v60, s64, 14 +; SI-NEXT: v_writelane_b32 v60, s30, 15 +; SI-NEXT: v_writelane_b32 v60, s31, 16 ; SI-NEXT: v_readfirstlane_b32 s42, v16 ; SI-NEXT: v_readfirstlane_b32 s5, v15 ; SI-NEXT: v_readfirstlane_b32 s4, v14 @@ -16429,21 +16442,21 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a, ; SI-NEXT: s_lshr_b32 s36, s21, 16 ; SI-NEXT: s_lshr_b32 s35, s19, 16 ; SI-NEXT: s_lshr_b32 s34, s17, 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16 ; SI-NEXT: s_cbranch_execnz .LBB29_4 ; SI-NEXT: .LBB29_2: ; %cmp.true ; SI-NEXT: v_add_f32_e64 v29, s5, 1.0 @@ -16491,60 +16504,60 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a, ; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[38:39], v[12:13], 16 ; SI-NEXT: v_lshr_b64 v[53:54], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v15 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v13 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v11 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v9 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v7 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v5 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v3 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v1 ; SI-NEXT: s_branch .LBB29_5 ; SI-NEXT: .LBB29_3: -; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr30 ; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: ; implicit-def: $sgpr35 -; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr90 ; SI-NEXT: ; implicit-def: $sgpr37 -; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr88 ; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr49 -; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr51 -; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr55 +; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr30 ; SI-NEXT: s_branch .LBB29_2 ; SI-NEXT: .LBB29_4: ; SI-NEXT: v_mov_b32_e32 v0, s16 @@ -16578,69 +16591,49 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v28, s4 ; SI-NEXT: v_mov_b32_e32 v29, s5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v61, s34 -; SI-NEXT: v_mov_b32_e32 v60, s35 -; SI-NEXT: v_mov_b32_e32 v59, s36 -; SI-NEXT: v_mov_b32_e32 v58, s37 -; SI-NEXT: v_mov_b32_e32 v57, s38 -; SI-NEXT: v_mov_b32_e32 v56, s39 -; SI-NEXT: v_mov_b32_e32 v47, s48 -; SI-NEXT: v_mov_b32_e32 v46, s49 -; SI-NEXT: v_mov_b32_e32 v45, s50 -; SI-NEXT: v_mov_b32_e32 v44, s51 -; SI-NEXT: v_mov_b32_e32 v43, s52 -; SI-NEXT: v_mov_b32_e32 v42, s53 -; SI-NEXT: v_mov_b32_e32 v41, s54 -; SI-NEXT: v_mov_b32_e32 v40, s55 -; SI-NEXT: v_mov_b32_e32 v55, s64 -; SI-NEXT: v_mov_b32_e32 v30, s30 -; SI-NEXT: v_mov_b32_e32 v31, s44 -; SI-NEXT: v_mov_b32_e32 v32, s46 -; SI-NEXT: v_mov_b32_e32 v33, s56 -; SI-NEXT: v_mov_b32_e32 v34, s58 -; SI-NEXT: v_mov_b32_e32 v35, s60 -; SI-NEXT: v_mov_b32_e32 v36, s62 -; SI-NEXT: v_mov_b32_e32 v37, s72 -; SI-NEXT: v_mov_b32_e32 v38, s74 -; SI-NEXT: v_mov_b32_e32 v48, s76 -; SI-NEXT: v_mov_b32_e32 v49, s78 -; SI-NEXT: v_mov_b32_e32 v50, s88 -; SI-NEXT: v_mov_b32_e32 v51, s90 -; SI-NEXT: v_mov_b32_e32 v52, s92 -; SI-NEXT: v_mov_b32_e32 v53, s94 +; SI-NEXT: v_mov_b32_e32 v59, s34 +; SI-NEXT: v_mov_b32_e32 v58, s35 +; SI-NEXT: v_mov_b32_e32 v57, s36 +; SI-NEXT: v_mov_b32_e32 v56, s37 +; SI-NEXT: v_mov_b32_e32 v47, s38 +; SI-NEXT: v_mov_b32_e32 v46, s39 +; SI-NEXT: v_mov_b32_e32 v45, s48 +; SI-NEXT: v_mov_b32_e32 v44, s49 +; SI-NEXT: v_mov_b32_e32 v43, s50 +; SI-NEXT: v_mov_b32_e32 v42, s51 +; SI-NEXT: v_mov_b32_e32 v41, s52 +; SI-NEXT: v_mov_b32_e32 v40, s53 +; SI-NEXT: v_mov_b32_e32 v55, s54 +; SI-NEXT: v_mov_b32_e32 v54, s55 +; SI-NEXT: v_mov_b32_e32 v39, s64 +; SI-NEXT: v_mov_b32_e32 v30, s44 +; SI-NEXT: v_mov_b32_e32 v31, s46 +; SI-NEXT: v_mov_b32_e32 v32, s56 +; SI-NEXT: v_mov_b32_e32 v33, s58 +; SI-NEXT: v_mov_b32_e32 v34, s60 +; SI-NEXT: v_mov_b32_e32 v35, s62 +; SI-NEXT: v_mov_b32_e32 v36, s72 +; SI-NEXT: v_mov_b32_e32 v37, s74 +; SI-NEXT: v_mov_b32_e32 v38, s76 +; SI-NEXT: v_mov_b32_e32 v48, s78 +; SI-NEXT: v_mov_b32_e32 v49, s88 +; SI-NEXT: v_mov_b32_e32 v50, s90 +; SI-NEXT: v_mov_b32_e32 v51, s92 +; SI-NEXT: v_mov_b32_e32 v52, s94 +; SI-NEXT: v_mov_b32_e32 v53, s30 ; SI-NEXT: .LBB29_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v39 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61 -; SI-NEXT: v_or_b32_e32 v1, v1, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v53 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v2, v39 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60 -; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v52 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_or_b32_e32 v4, v4, v39 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59 -; SI-NEXT: v_or_b32_e32 v5, v5, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v6, v6, v39 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58 -; SI-NEXT: v_or_b32_e32 v7, v7, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v8, v8, v39 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57 -; SI-NEXT: v_or_b32_e32 v9, v9, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 @@ -16653,44 +16646,53 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; SI-NEXT: v_or_b32_e32 v10, v10, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56 +; SI-NEXT: v_or_b32_e32 v0, v0, v53 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v59 +; SI-NEXT: v_or_b32_e32 v2, v2, v52 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v58 +; SI-NEXT: v_or_b32_e32 v4, v4, v51 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v57 +; SI-NEXT: v_or_b32_e32 v6, v6, v50 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v56 +; SI-NEXT: v_or_b32_e32 v8, v8, v49 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v47 +; SI-NEXT: v_or_b32_e32 v10, v10, v48 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v46 ; SI-NEXT: v_or_b32_e32 v12, v12, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v45 ; SI-NEXT: v_or_b32_e32 v14, v14, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v44 ; SI-NEXT: v_or_b32_e32 v16, v16, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v43 ; SI-NEXT: v_or_b32_e32 v18, v18, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v42 ; SI-NEXT: v_or_b32_e32 v20, v20, v34 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v41 ; SI-NEXT: v_or_b32_e32 v22, v22, v33 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v42 -; SI-NEXT: v_or_b32_e32 v24, v24, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v41 -; SI-NEXT: v_or_b32_e32 v26, v26, v31 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v40 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v40 +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 @@ -16698,13 +16700,22 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a, ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 +; SI-NEXT: v_or_b32_e32 v24, v24, v32 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v55 +; SI-NEXT: v_or_b32_e32 v26, v26, v31 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v54 ; SI-NEXT: v_or_b32_e32 v28, v28, v30 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v55 -; SI-NEXT: v_readlane_b32 s30, v62, 15 -; SI-NEXT: v_or_b32_e32 v11, v11, v39 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v39 +; SI-NEXT: v_readlane_b32 s30, v60, 15 +; SI-NEXT: v_or_b32_e32 v1, v1, v53 +; SI-NEXT: v_or_b32_e32 v3, v3, v52 +; SI-NEXT: v_or_b32_e32 v5, v5, v51 +; SI-NEXT: v_or_b32_e32 v7, v7, v50 +; SI-NEXT: v_or_b32_e32 v9, v9, v49 +; SI-NEXT: v_or_b32_e32 v11, v11, v48 ; SI-NEXT: v_or_b32_e32 v13, v13, v38 ; SI-NEXT: v_or_b32_e32 v15, v15, v37 ; SI-NEXT: v_or_b32_e32 v17, v17, v36 @@ -16714,24 +16725,24 @@ define inreg <60 x i16> @bitcast_v30f32_to_v60i16_scalar(<30 x float> inreg %a, ; SI-NEXT: v_or_b32_e32 v25, v25, v32 ; SI-NEXT: v_or_b32_e32 v27, v27, v31 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: v_readlane_b32 s31, v62, 16 -; SI-NEXT: v_readlane_b32 s64, v62, 14 -; SI-NEXT: v_readlane_b32 s55, v62, 13 -; SI-NEXT: v_readlane_b32 s54, v62, 12 -; SI-NEXT: v_readlane_b32 s53, v62, 11 -; SI-NEXT: v_readlane_b32 s52, v62, 10 -; SI-NEXT: v_readlane_b32 s51, v62, 9 -; SI-NEXT: v_readlane_b32 s50, v62, 8 -; SI-NEXT: v_readlane_b32 s49, v62, 7 -; SI-NEXT: v_readlane_b32 s48, v62, 6 -; SI-NEXT: v_readlane_b32 s39, v62, 5 -; SI-NEXT: v_readlane_b32 s38, v62, 4 -; SI-NEXT: v_readlane_b32 s37, v62, 3 -; SI-NEXT: v_readlane_b32 s36, v62, 2 -; SI-NEXT: v_readlane_b32 s35, v62, 1 -; SI-NEXT: v_readlane_b32 s34, v62, 0 +; SI-NEXT: v_readlane_b32 s31, v60, 16 +; SI-NEXT: v_readlane_b32 s64, v60, 14 +; SI-NEXT: v_readlane_b32 s55, v60, 13 +; SI-NEXT: v_readlane_b32 s54, v60, 12 +; SI-NEXT: v_readlane_b32 s53, v60, 11 +; SI-NEXT: v_readlane_b32 s52, v60, 10 +; SI-NEXT: v_readlane_b32 s51, v60, 9 +; SI-NEXT: v_readlane_b32 s50, v60, 8 +; SI-NEXT: v_readlane_b32 s49, v60, 7 +; SI-NEXT: v_readlane_b32 s48, v60, 6 +; SI-NEXT: v_readlane_b32 s39, v60, 5 +; SI-NEXT: v_readlane_b32 s38, v60, 4 +; SI-NEXT: v_readlane_b32 s37, v60, 3 +; SI-NEXT: v_readlane_b32 s36, v60, 2 +; SI-NEXT: v_readlane_b32 s35, v60, 1 +; SI-NEXT: v_readlane_b32 s34, v60, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -18512,10 +18523,10 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v29, 3 ; VI-NEXT: v_add_u16_e32 v0, 3, v61 ; VI-NEXT: v_add_u16_sdwa v1, v61, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 3, v60 -; VI-NEXT: v_add_u16_sdwa v3, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v60 +; VI-NEXT: v_add_u16_sdwa v2, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v59 ; VI-NEXT: v_add_u16_sdwa v3, v59, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -18710,8 +18721,8 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44 ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45 ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v47 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v56 ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57 ; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58 ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59 @@ -18747,8 +18758,8 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6 ; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6 -; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6 -; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6 +; GFX9-NEXT: v_perm_b32 v5, v63, v56, s6 +; GFX9-NEXT: v_perm_b32 v6, v34, v47, s6 ; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6 ; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6 ; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6 @@ -18790,8 +18801,8 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr62 @@ -18905,8 +18916,8 @@ define <30 x float> @bitcast_v60i16_to_v30f32(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6 ; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6 -; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6 -; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6 +; GFX9-NEXT: v_perm_b32 v5, v63, v56, s6 +; GFX9-NEXT: v_perm_b32 v6, v34, v47, s6 ; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6 ; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6 ; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] @@ -19275,17 +19286,17 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s98, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s97, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s96, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s98, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s87, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s86, 16 @@ -19689,17 +19700,17 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s76, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s74, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s14, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s74, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s12, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s10, 16 @@ -19781,14 +19792,14 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a, ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: s_and_b32 s4, s16, 0xffff ; VI-NEXT: s_lshl_b32 s5, s76, 16 +; VI-NEXT: s_or_b32 s4, s5, s4 ; VI-NEXT: s_add_i32 s17, s17, 3 +; VI-NEXT: s_add_i32 s36, s4, 0x30000 +; VI-NEXT: s_and_b32 s4, s17, 0xffff +; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_and_b32 s5, s17, 0xffff -; VI-NEXT: s_lshl_b32 s16, s74, 16 -; VI-NEXT: s_or_b32 s5, s16, s5 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s36, s4, 0x30000 -; VI-NEXT: s_add_i32 s37, s5, 0x30000 +; VI-NEXT: s_add_i32 s37, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s18, 0xffff ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 @@ -20017,28 +20028,24 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a, ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v32, s36, 0 -; GFX9-NEXT: v_writelane_b32 v32, s37, 1 -; GFX9-NEXT: v_writelane_b32 v32, s38, 2 -; GFX9-NEXT: v_writelane_b32 v32, s39, 3 -; GFX9-NEXT: v_writelane_b32 v32, s48, 4 -; GFX9-NEXT: v_writelane_b32 v32, s49, 5 -; GFX9-NEXT: v_writelane_b32 v32, s50, 6 -; GFX9-NEXT: v_writelane_b32 v32, s51, 7 -; GFX9-NEXT: v_writelane_b32 v32, s52, 8 -; GFX9-NEXT: v_writelane_b32 v32, s53, 9 -; GFX9-NEXT: v_writelane_b32 v32, s54, 10 -; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: v_writelane_b32 v32, s64, 12 -; GFX9-NEXT: v_writelane_b32 v32, s65, 13 -; GFX9-NEXT: s_lshr_b32 s10, s23, 16 -; GFX9-NEXT: s_lshr_b32 s11, s22, 16 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s34, 0 +; GFX9-NEXT: v_writelane_b32 v32, s35, 1 +; GFX9-NEXT: v_writelane_b32 v32, s36, 2 +; GFX9-NEXT: v_writelane_b32 v32, s37, 3 +; GFX9-NEXT: v_writelane_b32 v32, s38, 4 +; GFX9-NEXT: v_writelane_b32 v32, s39, 5 +; GFX9-NEXT: v_writelane_b32 v32, s48, 6 +; GFX9-NEXT: v_writelane_b32 v32, s49, 7 +; GFX9-NEXT: v_writelane_b32 v32, s50, 8 +; GFX9-NEXT: v_writelane_b32 v32, s51, 9 +; GFX9-NEXT: v_writelane_b32 v32, s52, 10 +; GFX9-NEXT: v_writelane_b32 v32, s53, 11 +; GFX9-NEXT: v_writelane_b32 v32, s54, 12 +; GFX9-NEXT: v_writelane_b32 v32, s55, 13 +; GFX9-NEXT: v_writelane_b32 v32, s64, 14 +; GFX9-NEXT: v_writelane_b32 v32, s65, 15 +; GFX9-NEXT: v_writelane_b32 v32, s30, 16 +; GFX9-NEXT: v_writelane_b32 v32, s31, 17 ; GFX9-NEXT: v_readfirstlane_b32 s72, v15 ; GFX9-NEXT: v_readfirstlane_b32 s74, v14 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 @@ -20048,27 +20055,27 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v6 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 -; GFX9-NEXT: v_readfirstlane_b32 s11, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 -; GFX9-NEXT: v_readfirstlane_b32 s10, v0 +; GFX9-NEXT: v_readfirstlane_b32 s56, v6 +; GFX9-NEXT: v_readfirstlane_b32 s92, v5 +; GFX9-NEXT: v_readfirstlane_b32 s94, v4 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v3 +; GFX9-NEXT: v_readfirstlane_b32 s30, v2 +; GFX9-NEXT: v_readfirstlane_b32 s34, v1 +; GFX9-NEXT: v_readfirstlane_b32 s50, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 ; GFX9-NEXT: s_lshr_b32 s7, s26, 16 ; GFX9-NEXT: s_lshr_b32 s8, s25, 16 ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 +; GFX9-NEXT: s_lshr_b32 s10, s23, 16 +; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s73, s72, 16 ; GFX9-NEXT: s_lshr_b32 s75, s74, 16 ; GFX9-NEXT: s_lshr_b32 s76, s63, 16 @@ -20078,28 +20085,36 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s88, s59, 16 ; GFX9-NEXT: s_lshr_b32 s89, s58, 16 ; GFX9-NEXT: s_lshr_b32 s90, s57, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 -; GFX9-NEXT: s_lshr_b32 s22, s11, 16 -; GFX9-NEXT: s_lshr_b32 s23, s10, 16 -; GFX9-NEXT: v_readfirstlane_b32 s44, v16 -; GFX9-NEXT: s_cmp_lg_u32 s44, 0 +; GFX9-NEXT: s_lshr_b32 s91, s56, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 +; GFX9-NEXT: s_lshr_b32 s35, s34, 16 +; GFX9-NEXT: s_lshr_b32 s51, s50, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v16 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 +; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 +; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 ; GFX9-NEXT: s_pack_ll_b32_b16 s45, s25, s8 ; GFX9-NEXT: s_pack_ll_b32_b16 s46, s26, s7 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s10, s23 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s11, s22 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s55, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s56, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s50, s51 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s34, s35 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s55, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s90 ; GFX9-NEXT: s_pack_ll_b32_b16 s58, s58, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s59, s59, s88 @@ -20180,20 +20195,24 @@ define inreg <30 x float> @bitcast_v60i16_to_v30f32_scalar(<60 x i16> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB31_5: ; %end -; GFX9-NEXT: v_readlane_b32 s65, v32, 13 -; GFX9-NEXT: v_readlane_b32 s64, v32, 12 -; GFX9-NEXT: v_readlane_b32 s55, v32, 11 -; GFX9-NEXT: v_readlane_b32 s54, v32, 10 -; GFX9-NEXT: v_readlane_b32 s53, v32, 9 -; GFX9-NEXT: v_readlane_b32 s52, v32, 8 -; GFX9-NEXT: v_readlane_b32 s51, v32, 7 -; GFX9-NEXT: v_readlane_b32 s50, v32, 6 -; GFX9-NEXT: v_readlane_b32 s49, v32, 5 -; GFX9-NEXT: v_readlane_b32 s48, v32, 4 -; GFX9-NEXT: v_readlane_b32 s39, v32, 3 -; GFX9-NEXT: v_readlane_b32 s38, v32, 2 -; GFX9-NEXT: v_readlane_b32 s37, v32, 1 -; GFX9-NEXT: v_readlane_b32 s36, v32, 0 +; GFX9-NEXT: v_readlane_b32 s30, v32, 16 +; GFX9-NEXT: v_readlane_b32 s31, v32, 17 +; GFX9-NEXT: v_readlane_b32 s65, v32, 15 +; GFX9-NEXT: v_readlane_b32 s64, v32, 14 +; GFX9-NEXT: v_readlane_b32 s55, v32, 13 +; GFX9-NEXT: v_readlane_b32 s54, v32, 12 +; GFX9-NEXT: v_readlane_b32 s53, v32, 11 +; GFX9-NEXT: v_readlane_b32 s52, v32, 10 +; GFX9-NEXT: v_readlane_b32 s51, v32, 9 +; GFX9-NEXT: v_readlane_b32 s50, v32, 8 +; GFX9-NEXT: v_readlane_b32 s49, v32, 7 +; GFX9-NEXT: v_readlane_b32 s48, v32, 6 +; GFX9-NEXT: v_readlane_b32 s39, v32, 5 +; GFX9-NEXT: v_readlane_b32 s38, v32, 4 +; GFX9-NEXT: v_readlane_b32 s37, v32, 3 +; GFX9-NEXT: v_readlane_b32 s36, v32, 2 +; GFX9-NEXT: v_readlane_b32 s35, v32, 1 +; GFX9-NEXT: v_readlane_b32 s34, v32, 0 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] @@ -21234,39 +21253,37 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_writelane_b32 v62, s34, 0 -; SI-NEXT: v_writelane_b32 v62, s35, 1 -; SI-NEXT: v_writelane_b32 v62, s36, 2 -; SI-NEXT: v_writelane_b32 v62, s37, 3 -; SI-NEXT: v_writelane_b32 v62, s38, 4 -; SI-NEXT: v_writelane_b32 v62, s39, 5 -; SI-NEXT: v_writelane_b32 v62, s48, 6 -; SI-NEXT: v_writelane_b32 v62, s49, 7 -; SI-NEXT: v_writelane_b32 v62, s50, 8 -; SI-NEXT: v_writelane_b32 v62, s51, 9 -; SI-NEXT: v_writelane_b32 v62, s52, 10 -; SI-NEXT: v_writelane_b32 v62, s53, 11 -; SI-NEXT: v_writelane_b32 v62, s54, 12 -; SI-NEXT: v_writelane_b32 v62, s55, 13 -; SI-NEXT: v_writelane_b32 v62, s64, 14 -; SI-NEXT: v_writelane_b32 v62, s30, 15 -; SI-NEXT: v_writelane_b32 v62, s31, 16 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: v_writelane_b32 v60, s34, 0 +; SI-NEXT: v_writelane_b32 v60, s35, 1 +; SI-NEXT: v_writelane_b32 v60, s36, 2 +; SI-NEXT: v_writelane_b32 v60, s37, 3 +; SI-NEXT: v_writelane_b32 v60, s38, 4 +; SI-NEXT: v_writelane_b32 v60, s39, 5 +; SI-NEXT: v_writelane_b32 v60, s48, 6 +; SI-NEXT: v_writelane_b32 v60, s49, 7 +; SI-NEXT: v_writelane_b32 v60, s50, 8 +; SI-NEXT: v_writelane_b32 v60, s51, 9 +; SI-NEXT: v_writelane_b32 v60, s52, 10 +; SI-NEXT: v_writelane_b32 v60, s53, 11 +; SI-NEXT: v_writelane_b32 v60, s54, 12 +; SI-NEXT: v_writelane_b32 v60, s55, 13 +; SI-NEXT: v_writelane_b32 v60, s64, 14 +; SI-NEXT: v_writelane_b32 v60, s30, 15 +; SI-NEXT: v_writelane_b32 v60, s31, 16 ; SI-NEXT: v_readfirstlane_b32 s42, v16 ; SI-NEXT: v_readfirstlane_b32 s5, v15 ; SI-NEXT: v_readfirstlane_b32 s4, v14 @@ -21302,21 +21319,21 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a, ; SI-NEXT: s_lshr_b32 s36, s21, 16 ; SI-NEXT: s_lshr_b32 s35, s19, 16 ; SI-NEXT: s_lshr_b32 s34, s17, 16 -; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[44:45], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[28:29], 16 -; SI-NEXT: s_lshr_b64 s[76:77], s[26:27], 16 -; SI-NEXT: s_lshr_b64 s[78:79], s[24:25], 16 -; SI-NEXT: s_lshr_b64 s[88:89], s[22:23], 16 -; SI-NEXT: s_lshr_b64 s[90:91], s[20:21], 16 -; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 16 -; SI-NEXT: s_lshr_b64 s[94:95], s[16:17], 16 +; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16 +; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16 +; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16 +; SI-NEXT: s_lshr_b64 s[90:91], s[22:23], 16 +; SI-NEXT: s_lshr_b64 s[92:93], s[20:21], 16 +; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 +; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16 ; SI-NEXT: s_cbranch_execnz .LBB33_4 ; SI-NEXT: .LBB33_2: ; %cmp.true ; SI-NEXT: v_add_f32_e64 v29, s5, 1.0 @@ -21364,60 +21381,60 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a, ; SI-NEXT: v_lshr_b64 v[52:53], v[2:3], 16 ; SI-NEXT: v_lshr_b64 v[38:39], v[12:13], 16 ; SI-NEXT: v_lshr_b64 v[53:54], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 -; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v27 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v19 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v15 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v13 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v11 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v9 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v7 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v5 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v3 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v1 ; SI-NEXT: s_branch .LBB33_5 ; SI-NEXT: .LBB33_3: -; SI-NEXT: ; implicit-def: $sgpr94 +; SI-NEXT: ; implicit-def: $sgpr30 ; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr94 ; SI-NEXT: ; implicit-def: $sgpr35 -; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr92 ; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr90 ; SI-NEXT: ; implicit-def: $sgpr37 -; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr88 ; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: ; implicit-def: $sgpr78 ; SI-NEXT: ; implicit-def: $sgpr39 -; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr76 ; SI-NEXT: ; implicit-def: $sgpr48 -; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr74 ; SI-NEXT: ; implicit-def: $sgpr49 -; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr72 ; SI-NEXT: ; implicit-def: $sgpr50 -; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr62 ; SI-NEXT: ; implicit-def: $sgpr51 -; SI-NEXT: ; implicit-def: $sgpr58 +; SI-NEXT: ; implicit-def: $sgpr60 ; SI-NEXT: ; implicit-def: $sgpr52 -; SI-NEXT: ; implicit-def: $sgpr56 +; SI-NEXT: ; implicit-def: $sgpr58 ; SI-NEXT: ; implicit-def: $sgpr53 -; SI-NEXT: ; implicit-def: $sgpr46 +; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr55 +; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr30 ; SI-NEXT: s_branch .LBB33_2 ; SI-NEXT: .LBB33_4: ; SI-NEXT: v_mov_b32_e32 v0, s16 @@ -21451,69 +21468,49 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a, ; SI-NEXT: v_mov_b32_e32 v28, s4 ; SI-NEXT: v_mov_b32_e32 v29, s5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v61, s34 -; SI-NEXT: v_mov_b32_e32 v60, s35 -; SI-NEXT: v_mov_b32_e32 v59, s36 -; SI-NEXT: v_mov_b32_e32 v58, s37 -; SI-NEXT: v_mov_b32_e32 v57, s38 -; SI-NEXT: v_mov_b32_e32 v56, s39 -; SI-NEXT: v_mov_b32_e32 v47, s48 -; SI-NEXT: v_mov_b32_e32 v46, s49 -; SI-NEXT: v_mov_b32_e32 v45, s50 -; SI-NEXT: v_mov_b32_e32 v44, s51 -; SI-NEXT: v_mov_b32_e32 v43, s52 -; SI-NEXT: v_mov_b32_e32 v42, s53 -; SI-NEXT: v_mov_b32_e32 v41, s54 -; SI-NEXT: v_mov_b32_e32 v40, s55 -; SI-NEXT: v_mov_b32_e32 v55, s64 -; SI-NEXT: v_mov_b32_e32 v30, s30 -; SI-NEXT: v_mov_b32_e32 v31, s44 -; SI-NEXT: v_mov_b32_e32 v32, s46 -; SI-NEXT: v_mov_b32_e32 v33, s56 -; SI-NEXT: v_mov_b32_e32 v34, s58 -; SI-NEXT: v_mov_b32_e32 v35, s60 -; SI-NEXT: v_mov_b32_e32 v36, s62 -; SI-NEXT: v_mov_b32_e32 v37, s72 -; SI-NEXT: v_mov_b32_e32 v38, s74 -; SI-NEXT: v_mov_b32_e32 v48, s76 -; SI-NEXT: v_mov_b32_e32 v49, s78 -; SI-NEXT: v_mov_b32_e32 v50, s88 -; SI-NEXT: v_mov_b32_e32 v51, s90 -; SI-NEXT: v_mov_b32_e32 v52, s92 -; SI-NEXT: v_mov_b32_e32 v53, s94 +; SI-NEXT: v_mov_b32_e32 v59, s34 +; SI-NEXT: v_mov_b32_e32 v58, s35 +; SI-NEXT: v_mov_b32_e32 v57, s36 +; SI-NEXT: v_mov_b32_e32 v56, s37 +; SI-NEXT: v_mov_b32_e32 v47, s38 +; SI-NEXT: v_mov_b32_e32 v46, s39 +; SI-NEXT: v_mov_b32_e32 v45, s48 +; SI-NEXT: v_mov_b32_e32 v44, s49 +; SI-NEXT: v_mov_b32_e32 v43, s50 +; SI-NEXT: v_mov_b32_e32 v42, s51 +; SI-NEXT: v_mov_b32_e32 v41, s52 +; SI-NEXT: v_mov_b32_e32 v40, s53 +; SI-NEXT: v_mov_b32_e32 v55, s54 +; SI-NEXT: v_mov_b32_e32 v54, s55 +; SI-NEXT: v_mov_b32_e32 v39, s64 +; SI-NEXT: v_mov_b32_e32 v30, s44 +; SI-NEXT: v_mov_b32_e32 v31, s46 +; SI-NEXT: v_mov_b32_e32 v32, s56 +; SI-NEXT: v_mov_b32_e32 v33, s58 +; SI-NEXT: v_mov_b32_e32 v34, s60 +; SI-NEXT: v_mov_b32_e32 v35, s62 +; SI-NEXT: v_mov_b32_e32 v36, s72 +; SI-NEXT: v_mov_b32_e32 v37, s74 +; SI-NEXT: v_mov_b32_e32 v38, s76 +; SI-NEXT: v_mov_b32_e32 v48, s78 +; SI-NEXT: v_mov_b32_e32 v49, s88 +; SI-NEXT: v_mov_b32_e32 v50, s90 +; SI-NEXT: v_mov_b32_e32 v51, s92 +; SI-NEXT: v_mov_b32_e32 v52, s94 +; SI-NEXT: v_mov_b32_e32 v53, s30 ; SI-NEXT: .LBB33_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v39 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61 -; SI-NEXT: v_or_b32_e32 v1, v1, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v53 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v2, v2, v39 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60 -; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v52 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_or_b32_e32 v4, v4, v39 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59 -; SI-NEXT: v_or_b32_e32 v5, v5, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v6, v6, v39 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58 -; SI-NEXT: v_or_b32_e32 v7, v7, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v8, v8, v39 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57 -; SI-NEXT: v_or_b32_e32 v9, v9, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 @@ -21526,44 +21523,53 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 -; SI-NEXT: v_or_b32_e32 v10, v10, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v56 +; SI-NEXT: v_or_b32_e32 v0, v0, v53 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v59 +; SI-NEXT: v_or_b32_e32 v2, v2, v52 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v58 +; SI-NEXT: v_or_b32_e32 v4, v4, v51 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v57 +; SI-NEXT: v_or_b32_e32 v6, v6, v50 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v56 +; SI-NEXT: v_or_b32_e32 v8, v8, v49 +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v47 +; SI-NEXT: v_or_b32_e32 v10, v10, v48 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v46 ; SI-NEXT: v_or_b32_e32 v12, v12, v38 -; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v45 ; SI-NEXT: v_or_b32_e32 v14, v14, v37 -; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v44 ; SI-NEXT: v_or_b32_e32 v16, v16, v36 -; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v43 ; SI-NEXT: v_or_b32_e32 v18, v18, v35 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v42 ; SI-NEXT: v_or_b32_e32 v20, v20, v34 -; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v41 ; SI-NEXT: v_or_b32_e32 v22, v22, v33 -; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v42 -; SI-NEXT: v_or_b32_e32 v24, v24, v32 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v41 -; SI-NEXT: v_or_b32_e32 v26, v26, v31 -; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v40 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v40 +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 @@ -21571,13 +21577,22 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a, ; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 ; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 +; SI-NEXT: v_or_b32_e32 v24, v24, v32 ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v55 +; SI-NEXT: v_or_b32_e32 v26, v26, v31 ; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v54 ; SI-NEXT: v_or_b32_e32 v28, v28, v30 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v55 -; SI-NEXT: v_readlane_b32 s30, v62, 15 -; SI-NEXT: v_or_b32_e32 v11, v11, v39 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v39 +; SI-NEXT: v_readlane_b32 s30, v60, 15 +; SI-NEXT: v_or_b32_e32 v1, v1, v53 +; SI-NEXT: v_or_b32_e32 v3, v3, v52 +; SI-NEXT: v_or_b32_e32 v5, v5, v51 +; SI-NEXT: v_or_b32_e32 v7, v7, v50 +; SI-NEXT: v_or_b32_e32 v9, v9, v49 +; SI-NEXT: v_or_b32_e32 v11, v11, v48 ; SI-NEXT: v_or_b32_e32 v13, v13, v38 ; SI-NEXT: v_or_b32_e32 v15, v15, v37 ; SI-NEXT: v_or_b32_e32 v17, v17, v36 @@ -21587,24 +21602,24 @@ define inreg <60 x half> @bitcast_v30f32_to_v60f16_scalar(<30 x float> inreg %a, ; SI-NEXT: v_or_b32_e32 v25, v25, v32 ; SI-NEXT: v_or_b32_e32 v27, v27, v31 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: v_readlane_b32 s31, v62, 16 -; SI-NEXT: v_readlane_b32 s64, v62, 14 -; SI-NEXT: v_readlane_b32 s55, v62, 13 -; SI-NEXT: v_readlane_b32 s54, v62, 12 -; SI-NEXT: v_readlane_b32 s53, v62, 11 -; SI-NEXT: v_readlane_b32 s52, v62, 10 -; SI-NEXT: v_readlane_b32 s51, v62, 9 -; SI-NEXT: v_readlane_b32 s50, v62, 8 -; SI-NEXT: v_readlane_b32 s49, v62, 7 -; SI-NEXT: v_readlane_b32 s48, v62, 6 -; SI-NEXT: v_readlane_b32 s39, v62, 5 -; SI-NEXT: v_readlane_b32 s38, v62, 4 -; SI-NEXT: v_readlane_b32 s37, v62, 3 -; SI-NEXT: v_readlane_b32 s36, v62, 2 -; SI-NEXT: v_readlane_b32 s35, v62, 1 -; SI-NEXT: v_readlane_b32 s34, v62, 0 +; SI-NEXT: v_readlane_b32 s31, v60, 16 +; SI-NEXT: v_readlane_b32 s64, v60, 14 +; SI-NEXT: v_readlane_b32 s55, v60, 13 +; SI-NEXT: v_readlane_b32 s54, v60, 12 +; SI-NEXT: v_readlane_b32 s53, v60, 11 +; SI-NEXT: v_readlane_b32 s52, v60, 10 +; SI-NEXT: v_readlane_b32 s51, v60, 9 +; SI-NEXT: v_readlane_b32 s50, v60, 8 +; SI-NEXT: v_readlane_b32 s49, v60, 7 +; SI-NEXT: v_readlane_b32 s48, v60, 6 +; SI-NEXT: v_readlane_b32 s39, v60, 5 +; SI-NEXT: v_readlane_b32 s38, v60, 4 +; SI-NEXT: v_readlane_b32 s37, v60, 3 +; SI-NEXT: v_readlane_b32 s36, v60, 2 +; SI-NEXT: v_readlane_b32 s35, v60, 1 +; SI-NEXT: v_readlane_b32 s34, v60, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -22808,17 +22823,17 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v47 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v56 -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v58 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v59 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v60 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v59 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v60 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30 ; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v61 ; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill @@ -22839,24 +22854,24 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v49 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v63 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v59 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v58 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v39 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v57 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v56 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v62 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37 @@ -22871,7 +22886,7 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v35 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v34 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41 ; SI-NEXT: ; implicit-def: $vgpr61 @@ -22888,17 +22903,17 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload @@ -23066,202 +23081,201 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v49 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v48 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v63 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v58 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v57 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v48 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v39 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v39 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v56 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v57 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v47 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v37 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v46 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v36 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v44 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v44 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v35 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v34 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v42 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v41 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v37 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v40 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v41 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v54 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v36 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v54 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v51 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v35 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v63 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v40 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 +; SI-NEXT: v_or_b32_e32 v13, v14, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v14, v16, v14 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 +; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 +; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 ; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 -; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_cvt_f32_f16_e32 v30, v30 ; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 ; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_cvt_f32_f16_e32 v30, v30 +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30 ; SI-NEXT: v_cvt_f16_f32_e32 v30, v30 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 ; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v53 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_or_b32_e32 v16, v17, v16 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload @@ -23528,10 +23542,10 @@ define <30 x float> @bitcast_v60f16_to_v30f32(<60 x half> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v29, 0x200 ; VI-NEXT: v_add_f16_sdwa v0, v61, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, 0x200, v61 -; VI-NEXT: v_add_f16_sdwa v2, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, 0x200, v60 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_add_f16_sdwa v1, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, 0x200, v60 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_add_f16_sdwa v2, v59, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, 0x200, v59 ; VI-NEXT: v_or_b32_e32 v2, v3, v2 @@ -24292,17 +24306,17 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s98, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s97, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s96, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s98, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s87, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s86, 16 @@ -24802,17 +24816,17 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s77, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s73, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s15, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s75, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s13, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s9, 16 @@ -24897,13 +24911,13 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a, ; VI-NEXT: .LBB35_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v29, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s77 -; VI-NEXT: v_mov_b32_e32 v2, s75 ; VI-NEXT: v_add_f16_sdwa v0, v0, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v29 -; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v29 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s75 +; VI-NEXT: v_add_f16_sdwa v1, v1, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v29 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s73 ; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v29 @@ -25111,28 +25125,24 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a, ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v32, s36, 0 -; GFX9-NEXT: v_writelane_b32 v32, s37, 1 -; GFX9-NEXT: v_writelane_b32 v32, s38, 2 -; GFX9-NEXT: v_writelane_b32 v32, s39, 3 -; GFX9-NEXT: v_writelane_b32 v32, s48, 4 -; GFX9-NEXT: v_writelane_b32 v32, s49, 5 -; GFX9-NEXT: v_writelane_b32 v32, s50, 6 -; GFX9-NEXT: v_writelane_b32 v32, s51, 7 -; GFX9-NEXT: v_writelane_b32 v32, s52, 8 -; GFX9-NEXT: v_writelane_b32 v32, s53, 9 -; GFX9-NEXT: v_writelane_b32 v32, s54, 10 -; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: v_writelane_b32 v32, s64, 12 -; GFX9-NEXT: v_writelane_b32 v32, s65, 13 -; GFX9-NEXT: s_lshr_b32 s10, s23, 16 -; GFX9-NEXT: s_lshr_b32 s11, s22, 16 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s34, 0 +; GFX9-NEXT: v_writelane_b32 v32, s35, 1 +; GFX9-NEXT: v_writelane_b32 v32, s36, 2 +; GFX9-NEXT: v_writelane_b32 v32, s37, 3 +; GFX9-NEXT: v_writelane_b32 v32, s38, 4 +; GFX9-NEXT: v_writelane_b32 v32, s39, 5 +; GFX9-NEXT: v_writelane_b32 v32, s48, 6 +; GFX9-NEXT: v_writelane_b32 v32, s49, 7 +; GFX9-NEXT: v_writelane_b32 v32, s50, 8 +; GFX9-NEXT: v_writelane_b32 v32, s51, 9 +; GFX9-NEXT: v_writelane_b32 v32, s52, 10 +; GFX9-NEXT: v_writelane_b32 v32, s53, 11 +; GFX9-NEXT: v_writelane_b32 v32, s54, 12 +; GFX9-NEXT: v_writelane_b32 v32, s55, 13 +; GFX9-NEXT: v_writelane_b32 v32, s64, 14 +; GFX9-NEXT: v_writelane_b32 v32, s65, 15 +; GFX9-NEXT: v_writelane_b32 v32, s30, 16 +; GFX9-NEXT: v_writelane_b32 v32, s31, 17 ; GFX9-NEXT: v_readfirstlane_b32 s72, v15 ; GFX9-NEXT: v_readfirstlane_b32 s74, v14 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 @@ -25142,27 +25152,27 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v6 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 -; GFX9-NEXT: v_readfirstlane_b32 s11, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 -; GFX9-NEXT: v_readfirstlane_b32 s10, v0 +; GFX9-NEXT: v_readfirstlane_b32 s56, v6 +; GFX9-NEXT: v_readfirstlane_b32 s92, v5 +; GFX9-NEXT: v_readfirstlane_b32 s94, v4 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v3 +; GFX9-NEXT: v_readfirstlane_b32 s30, v2 +; GFX9-NEXT: v_readfirstlane_b32 s34, v1 +; GFX9-NEXT: v_readfirstlane_b32 s50, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 ; GFX9-NEXT: s_lshr_b32 s7, s26, 16 ; GFX9-NEXT: s_lshr_b32 s8, s25, 16 ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 +; GFX9-NEXT: s_lshr_b32 s10, s23, 16 +; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s73, s72, 16 ; GFX9-NEXT: s_lshr_b32 s75, s74, 16 ; GFX9-NEXT: s_lshr_b32 s76, s63, 16 @@ -25172,28 +25182,36 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a, ; GFX9-NEXT: s_lshr_b32 s88, s59, 16 ; GFX9-NEXT: s_lshr_b32 s89, s58, 16 ; GFX9-NEXT: s_lshr_b32 s90, s57, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 -; GFX9-NEXT: s_lshr_b32 s22, s11, 16 -; GFX9-NEXT: s_lshr_b32 s23, s10, 16 -; GFX9-NEXT: v_readfirstlane_b32 s44, v16 -; GFX9-NEXT: s_cmp_lg_u32 s44, 0 +; GFX9-NEXT: s_lshr_b32 s91, s56, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 +; GFX9-NEXT: s_lshr_b32 s35, s34, 16 +; GFX9-NEXT: s_lshr_b32 s51, s50, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v16 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 +; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 +; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 ; GFX9-NEXT: s_pack_ll_b32_b16 s45, s25, s8 ; GFX9-NEXT: s_pack_ll_b32_b16 s46, s26, s7 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s10, s23 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s11, s22 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s55, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s56, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s50, s51 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s34, s35 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s55, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s90 ; GFX9-NEXT: s_pack_ll_b32_b16 s58, s58, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s59, s59, s88 @@ -25275,20 +25293,24 @@ define inreg <30 x float> @bitcast_v60f16_to_v30f32_scalar(<60 x half> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB35_5: ; %end -; GFX9-NEXT: v_readlane_b32 s65, v32, 13 -; GFX9-NEXT: v_readlane_b32 s64, v32, 12 -; GFX9-NEXT: v_readlane_b32 s55, v32, 11 -; GFX9-NEXT: v_readlane_b32 s54, v32, 10 -; GFX9-NEXT: v_readlane_b32 s53, v32, 9 -; GFX9-NEXT: v_readlane_b32 s52, v32, 8 -; GFX9-NEXT: v_readlane_b32 s51, v32, 7 -; GFX9-NEXT: v_readlane_b32 s50, v32, 6 -; GFX9-NEXT: v_readlane_b32 s49, v32, 5 -; GFX9-NEXT: v_readlane_b32 s48, v32, 4 -; GFX9-NEXT: v_readlane_b32 s39, v32, 3 -; GFX9-NEXT: v_readlane_b32 s38, v32, 2 -; GFX9-NEXT: v_readlane_b32 s37, v32, 1 -; GFX9-NEXT: v_readlane_b32 s36, v32, 0 +; GFX9-NEXT: v_readlane_b32 s30, v32, 16 +; GFX9-NEXT: v_readlane_b32 s31, v32, 17 +; GFX9-NEXT: v_readlane_b32 s65, v32, 15 +; GFX9-NEXT: v_readlane_b32 s64, v32, 14 +; GFX9-NEXT: v_readlane_b32 s55, v32, 13 +; GFX9-NEXT: v_readlane_b32 s54, v32, 12 +; GFX9-NEXT: v_readlane_b32 s53, v32, 11 +; GFX9-NEXT: v_readlane_b32 s52, v32, 10 +; GFX9-NEXT: v_readlane_b32 s51, v32, 9 +; GFX9-NEXT: v_readlane_b32 s50, v32, 8 +; GFX9-NEXT: v_readlane_b32 s49, v32, 7 +; GFX9-NEXT: v_readlane_b32 s48, v32, 6 +; GFX9-NEXT: v_readlane_b32 s39, v32, 5 +; GFX9-NEXT: v_readlane_b32 s38, v32, 4 +; GFX9-NEXT: v_readlane_b32 s37, v32, 3 +; GFX9-NEXT: v_readlane_b32 s36, v32, 2 +; GFX9-NEXT: v_readlane_b32 s35, v32, 1 +; GFX9-NEXT: v_readlane_b32 s34, v32, 0 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] @@ -27712,38 +27734,38 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3 ; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16 ; SI-NEXT: .LBB41_3: ; %end -; SI-NEXT: s_lshl_b32 s45, s30, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s45, s30, 16 ; SI-NEXT: s_or_b32 s16, s16, s45 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s45, s64, 16 ; SI-NEXT: s_or_b32 s17, s17, s45 -; SI-NEXT: s_lshl_b32 s45, s94, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s45, s94, 16 ; SI-NEXT: s_or_b32 s18, s18, s45 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s45, s55, 16 ; SI-NEXT: s_or_b32 s19, s19, s45 -; SI-NEXT: s_lshl_b32 s45, s92, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s45, s92, 16 ; SI-NEXT: s_or_b32 s20, s20, s45 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s45, s54, 16 ; SI-NEXT: s_or_b32 s21, s21, s45 -; SI-NEXT: s_lshl_b32 s45, s90, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s45, s90, 16 ; SI-NEXT: s_or_b32 s22, s22, s45 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s45, s53, 16 ; SI-NEXT: s_or_b32 s23, s23, s45 -; SI-NEXT: s_lshl_b32 s45, s88, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s45, s88, 16 ; SI-NEXT: s_or_b32 s24, s24, s45 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s45, s52, 16 ; SI-NEXT: s_or_b32 s25, s25, s45 -; SI-NEXT: s_lshl_b32 s45, s78, 16 ; SI-NEXT: s_and_b32 s26, s26, 0xffff +; SI-NEXT: s_lshl_b32 s45, s78, 16 ; SI-NEXT: s_or_b32 s26, s26, s45 ; SI-NEXT: s_and_b32 s27, s27, 0xffff ; SI-NEXT: s_lshl_b32 s45, s51, 16 @@ -27883,8 +27905,8 @@ define inreg <60 x i16> @bitcast_v15i64_to_v60i16_scalar(<15 x i64> inreg %a, i3 ; SI-NEXT: ; implicit-def: $sgpr36 ; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr35 -; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: s_branch .LBB41_2 ; ; VI-LABEL: bitcast_v15i64_to_v60i16_scalar: @@ -29294,10 +29316,10 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v29, 3 ; VI-NEXT: v_add_u16_e32 v0, 3, v61 ; VI-NEXT: v_add_u16_sdwa v1, v61, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 3, v60 -; VI-NEXT: v_add_u16_sdwa v3, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v60 +; VI-NEXT: v_add_u16_sdwa v2, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v59 ; VI-NEXT: v_add_u16_sdwa v3, v59, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -29492,8 +29514,8 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44 ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45 ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v47 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v56 ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57 ; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58 ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59 @@ -29529,8 +29551,8 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6 ; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6 -; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6 -; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6 +; GFX9-NEXT: v_perm_b32 v5, v63, v56, s6 +; GFX9-NEXT: v_perm_b32 v6, v34, v47, s6 ; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6 ; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6 ; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6 @@ -29572,8 +29594,8 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr62 @@ -29687,8 +29709,8 @@ define <15 x i64> @bitcast_v60i16_to_v15i64(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6 ; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6 -; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6 -; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6 +; GFX9-NEXT: v_perm_b32 v5, v63, v56, s6 +; GFX9-NEXT: v_perm_b32 v6, v34, v47, s6 ; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6 ; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6 ; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] @@ -30057,17 +30079,17 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3 ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s98, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s97, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s96, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s98, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s87, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s86, 16 @@ -30471,17 +30493,17 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3 ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s76, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s74, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s14, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s74, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s12, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s10, 16 @@ -30563,14 +30585,14 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3 ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: s_and_b32 s4, s16, 0xffff ; VI-NEXT: s_lshl_b32 s5, s76, 16 +; VI-NEXT: s_or_b32 s4, s5, s4 ; VI-NEXT: s_add_i32 s17, s17, 3 +; VI-NEXT: s_add_i32 s36, s4, 0x30000 +; VI-NEXT: s_and_b32 s4, s17, 0xffff +; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_and_b32 s5, s17, 0xffff -; VI-NEXT: s_lshl_b32 s16, s74, 16 -; VI-NEXT: s_or_b32 s5, s16, s5 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s36, s4, 0x30000 -; VI-NEXT: s_add_i32 s37, s5, 0x30000 +; VI-NEXT: s_add_i32 s37, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s18, 0xffff ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 @@ -30799,28 +30821,24 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v32, s36, 0 -; GFX9-NEXT: v_writelane_b32 v32, s37, 1 -; GFX9-NEXT: v_writelane_b32 v32, s38, 2 -; GFX9-NEXT: v_writelane_b32 v32, s39, 3 -; GFX9-NEXT: v_writelane_b32 v32, s48, 4 -; GFX9-NEXT: v_writelane_b32 v32, s49, 5 -; GFX9-NEXT: v_writelane_b32 v32, s50, 6 -; GFX9-NEXT: v_writelane_b32 v32, s51, 7 -; GFX9-NEXT: v_writelane_b32 v32, s52, 8 -; GFX9-NEXT: v_writelane_b32 v32, s53, 9 -; GFX9-NEXT: v_writelane_b32 v32, s54, 10 -; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: v_writelane_b32 v32, s64, 12 -; GFX9-NEXT: v_writelane_b32 v32, s65, 13 -; GFX9-NEXT: s_lshr_b32 s10, s23, 16 -; GFX9-NEXT: s_lshr_b32 s11, s22, 16 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s34, 0 +; GFX9-NEXT: v_writelane_b32 v32, s35, 1 +; GFX9-NEXT: v_writelane_b32 v32, s36, 2 +; GFX9-NEXT: v_writelane_b32 v32, s37, 3 +; GFX9-NEXT: v_writelane_b32 v32, s38, 4 +; GFX9-NEXT: v_writelane_b32 v32, s39, 5 +; GFX9-NEXT: v_writelane_b32 v32, s48, 6 +; GFX9-NEXT: v_writelane_b32 v32, s49, 7 +; GFX9-NEXT: v_writelane_b32 v32, s50, 8 +; GFX9-NEXT: v_writelane_b32 v32, s51, 9 +; GFX9-NEXT: v_writelane_b32 v32, s52, 10 +; GFX9-NEXT: v_writelane_b32 v32, s53, 11 +; GFX9-NEXT: v_writelane_b32 v32, s54, 12 +; GFX9-NEXT: v_writelane_b32 v32, s55, 13 +; GFX9-NEXT: v_writelane_b32 v32, s64, 14 +; GFX9-NEXT: v_writelane_b32 v32, s65, 15 +; GFX9-NEXT: v_writelane_b32 v32, s30, 16 +; GFX9-NEXT: v_writelane_b32 v32, s31, 17 ; GFX9-NEXT: v_readfirstlane_b32 s72, v15 ; GFX9-NEXT: v_readfirstlane_b32 s74, v14 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 @@ -30830,27 +30848,27 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3 ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v6 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 -; GFX9-NEXT: v_readfirstlane_b32 s11, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 -; GFX9-NEXT: v_readfirstlane_b32 s10, v0 +; GFX9-NEXT: v_readfirstlane_b32 s56, v6 +; GFX9-NEXT: v_readfirstlane_b32 s92, v5 +; GFX9-NEXT: v_readfirstlane_b32 s94, v4 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v3 +; GFX9-NEXT: v_readfirstlane_b32 s30, v2 +; GFX9-NEXT: v_readfirstlane_b32 s34, v1 +; GFX9-NEXT: v_readfirstlane_b32 s50, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 ; GFX9-NEXT: s_lshr_b32 s7, s26, 16 ; GFX9-NEXT: s_lshr_b32 s8, s25, 16 ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 +; GFX9-NEXT: s_lshr_b32 s10, s23, 16 +; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s73, s72, 16 ; GFX9-NEXT: s_lshr_b32 s75, s74, 16 ; GFX9-NEXT: s_lshr_b32 s76, s63, 16 @@ -30860,28 +30878,36 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3 ; GFX9-NEXT: s_lshr_b32 s88, s59, 16 ; GFX9-NEXT: s_lshr_b32 s89, s58, 16 ; GFX9-NEXT: s_lshr_b32 s90, s57, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 -; GFX9-NEXT: s_lshr_b32 s22, s11, 16 -; GFX9-NEXT: s_lshr_b32 s23, s10, 16 -; GFX9-NEXT: v_readfirstlane_b32 s44, v16 -; GFX9-NEXT: s_cmp_lg_u32 s44, 0 +; GFX9-NEXT: s_lshr_b32 s91, s56, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 +; GFX9-NEXT: s_lshr_b32 s35, s34, 16 +; GFX9-NEXT: s_lshr_b32 s51, s50, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v16 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 +; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 +; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 ; GFX9-NEXT: s_pack_ll_b32_b16 s45, s25, s8 ; GFX9-NEXT: s_pack_ll_b32_b16 s46, s26, s7 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s10, s23 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s11, s22 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s55, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s56, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s50, s51 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s34, s35 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s55, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s90 ; GFX9-NEXT: s_pack_ll_b32_b16 s58, s58, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s59, s59, s88 @@ -30962,20 +30988,24 @@ define inreg <15 x i64> @bitcast_v60i16_to_v15i64_scalar(<60 x i16> inreg %a, i3 ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB43_5: ; %end -; GFX9-NEXT: v_readlane_b32 s65, v32, 13 -; GFX9-NEXT: v_readlane_b32 s64, v32, 12 -; GFX9-NEXT: v_readlane_b32 s55, v32, 11 -; GFX9-NEXT: v_readlane_b32 s54, v32, 10 -; GFX9-NEXT: v_readlane_b32 s53, v32, 9 -; GFX9-NEXT: v_readlane_b32 s52, v32, 8 -; GFX9-NEXT: v_readlane_b32 s51, v32, 7 -; GFX9-NEXT: v_readlane_b32 s50, v32, 6 -; GFX9-NEXT: v_readlane_b32 s49, v32, 5 -; GFX9-NEXT: v_readlane_b32 s48, v32, 4 -; GFX9-NEXT: v_readlane_b32 s39, v32, 3 -; GFX9-NEXT: v_readlane_b32 s38, v32, 2 -; GFX9-NEXT: v_readlane_b32 s37, v32, 1 -; GFX9-NEXT: v_readlane_b32 s36, v32, 0 +; GFX9-NEXT: v_readlane_b32 s30, v32, 16 +; GFX9-NEXT: v_readlane_b32 s31, v32, 17 +; GFX9-NEXT: v_readlane_b32 s65, v32, 15 +; GFX9-NEXT: v_readlane_b32 s64, v32, 14 +; GFX9-NEXT: v_readlane_b32 s55, v32, 13 +; GFX9-NEXT: v_readlane_b32 s54, v32, 12 +; GFX9-NEXT: v_readlane_b32 s53, v32, 11 +; GFX9-NEXT: v_readlane_b32 s52, v32, 10 +; GFX9-NEXT: v_readlane_b32 s51, v32, 9 +; GFX9-NEXT: v_readlane_b32 s50, v32, 8 +; GFX9-NEXT: v_readlane_b32 s49, v32, 7 +; GFX9-NEXT: v_readlane_b32 s48, v32, 6 +; GFX9-NEXT: v_readlane_b32 s39, v32, 5 +; GFX9-NEXT: v_readlane_b32 s38, v32, 4 +; GFX9-NEXT: v_readlane_b32 s37, v32, 3 +; GFX9-NEXT: v_readlane_b32 s36, v32, 2 +; GFX9-NEXT: v_readlane_b32 s35, v32, 1 +; GFX9-NEXT: v_readlane_b32 s34, v32, 0 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] @@ -32195,38 +32225,38 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i ; SI-NEXT: s_lshr_b64 s[94:95], s[18:19], 16 ; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16 ; SI-NEXT: .LBB45_3: ; %end -; SI-NEXT: s_lshl_b32 s45, s30, 16 ; SI-NEXT: s_and_b32 s16, s16, 0xffff +; SI-NEXT: s_lshl_b32 s45, s30, 16 ; SI-NEXT: s_or_b32 s16, s16, s45 ; SI-NEXT: s_and_b32 s17, s17, 0xffff ; SI-NEXT: s_lshl_b32 s45, s64, 16 ; SI-NEXT: s_or_b32 s17, s17, s45 -; SI-NEXT: s_lshl_b32 s45, s94, 16 ; SI-NEXT: s_and_b32 s18, s18, 0xffff +; SI-NEXT: s_lshl_b32 s45, s94, 16 ; SI-NEXT: s_or_b32 s18, s18, s45 ; SI-NEXT: s_and_b32 s19, s19, 0xffff ; SI-NEXT: s_lshl_b32 s45, s55, 16 ; SI-NEXT: s_or_b32 s19, s19, s45 -; SI-NEXT: s_lshl_b32 s45, s92, 16 ; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s45, s92, 16 ; SI-NEXT: s_or_b32 s20, s20, s45 ; SI-NEXT: s_and_b32 s21, s21, 0xffff ; SI-NEXT: s_lshl_b32 s45, s54, 16 ; SI-NEXT: s_or_b32 s21, s21, s45 -; SI-NEXT: s_lshl_b32 s45, s90, 16 ; SI-NEXT: s_and_b32 s22, s22, 0xffff +; SI-NEXT: s_lshl_b32 s45, s90, 16 ; SI-NEXT: s_or_b32 s22, s22, s45 ; SI-NEXT: s_and_b32 s23, s23, 0xffff ; SI-NEXT: s_lshl_b32 s45, s53, 16 ; SI-NEXT: s_or_b32 s23, s23, s45 -; SI-NEXT: s_lshl_b32 s45, s88, 16 ; SI-NEXT: s_and_b32 s24, s24, 0xffff +; SI-NEXT: s_lshl_b32 s45, s88, 16 ; SI-NEXT: s_or_b32 s24, s24, s45 ; SI-NEXT: s_and_b32 s25, s25, 0xffff ; SI-NEXT: s_lshl_b32 s45, s52, 16 ; SI-NEXT: s_or_b32 s25, s25, s45 -; SI-NEXT: s_lshl_b32 s45, s78, 16 ; SI-NEXT: s_and_b32 s26, s26, 0xffff +; SI-NEXT: s_lshl_b32 s45, s78, 16 ; SI-NEXT: s_or_b32 s26, s26, s45 ; SI-NEXT: s_and_b32 s27, s27, 0xffff ; SI-NEXT: s_lshl_b32 s45, s51, 16 @@ -32366,8 +32396,8 @@ define inreg <60 x half> @bitcast_v15i64_to_v60f16_scalar(<15 x i64> inreg %a, i ; SI-NEXT: ; implicit-def: $sgpr36 ; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr35 -; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr34 ; SI-NEXT: s_branch .LBB45_2 ; ; VI-LABEL: bitcast_v15i64_to_v60f16_scalar: @@ -33200,17 +33230,17 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v47 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v56 -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v58 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v59 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v60 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v59 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v60 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30 ; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v61 ; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill @@ -33231,24 +33261,24 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v49 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v63 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v59 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v58 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v39 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v57 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v56 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v62 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37 @@ -33263,7 +33293,7 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v35 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v34 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41 ; SI-NEXT: ; implicit-def: $vgpr61 @@ -33280,17 +33310,17 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload @@ -33458,202 +33488,201 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v49 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v48 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v63 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v58 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v57 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v48 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v39 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v39 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v56 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v57 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v47 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v37 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v46 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v36 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v44 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v44 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v35 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v34 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v42 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v41 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v37 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v40 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v41 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v54 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v36 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v54 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v51 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v35 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v63 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v40 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 +; SI-NEXT: v_or_b32_e32 v13, v14, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v14, v16, v14 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 +; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 +; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 ; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 -; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_cvt_f32_f16_e32 v30, v30 ; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 ; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_cvt_f32_f16_e32 v30, v30 +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30 ; SI-NEXT: v_cvt_f16_f32_e32 v30, v30 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 ; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v53 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_or_b32_e32 v16, v17, v16 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload @@ -33920,10 +33949,10 @@ define <15 x i64> @bitcast_v60f16_to_v15i64(<60 x half> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v29, 0x200 ; VI-NEXT: v_add_f16_sdwa v0, v61, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, 0x200, v61 -; VI-NEXT: v_add_f16_sdwa v2, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, 0x200, v60 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_add_f16_sdwa v1, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, 0x200, v60 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_add_f16_sdwa v2, v59, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, 0x200, v59 ; VI-NEXT: v_or_b32_e32 v2, v3, v2 @@ -34684,17 +34713,17 @@ define inreg <15 x i64> @bitcast_v60f16_to_v15i64_scalar(<60 x half> inreg %a, i ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s98, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s97, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s96, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s98, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s87, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s86, 16 @@ -35194,17 +35223,17 @@ define inreg <15 x i64> @bitcast_v60f16_to_v15i64_scalar(<60 x half> inreg %a, i ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s77, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s73, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s15, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s75, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s13, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s9, 16 @@ -35289,13 +35318,13 @@ define inreg <15 x i64> @bitcast_v60f16_to_v15i64_scalar(<60 x half> inreg %a, i ; VI-NEXT: .LBB47_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v29, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s77 -; VI-NEXT: v_mov_b32_e32 v2, s75 ; VI-NEXT: v_add_f16_sdwa v0, v0, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v29 -; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v29 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s75 +; VI-NEXT: v_add_f16_sdwa v1, v1, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v29 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s73 ; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v29 @@ -35503,28 +35532,24 @@ define inreg <15 x i64> @bitcast_v60f16_to_v15i64_scalar(<60 x half> inreg %a, i ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v32, s36, 0 -; GFX9-NEXT: v_writelane_b32 v32, s37, 1 -; GFX9-NEXT: v_writelane_b32 v32, s38, 2 -; GFX9-NEXT: v_writelane_b32 v32, s39, 3 -; GFX9-NEXT: v_writelane_b32 v32, s48, 4 -; GFX9-NEXT: v_writelane_b32 v32, s49, 5 -; GFX9-NEXT: v_writelane_b32 v32, s50, 6 -; GFX9-NEXT: v_writelane_b32 v32, s51, 7 -; GFX9-NEXT: v_writelane_b32 v32, s52, 8 -; GFX9-NEXT: v_writelane_b32 v32, s53, 9 -; GFX9-NEXT: v_writelane_b32 v32, s54, 10 -; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: v_writelane_b32 v32, s64, 12 -; GFX9-NEXT: v_writelane_b32 v32, s65, 13 -; GFX9-NEXT: s_lshr_b32 s10, s23, 16 -; GFX9-NEXT: s_lshr_b32 s11, s22, 16 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s34, 0 +; GFX9-NEXT: v_writelane_b32 v32, s35, 1 +; GFX9-NEXT: v_writelane_b32 v32, s36, 2 +; GFX9-NEXT: v_writelane_b32 v32, s37, 3 +; GFX9-NEXT: v_writelane_b32 v32, s38, 4 +; GFX9-NEXT: v_writelane_b32 v32, s39, 5 +; GFX9-NEXT: v_writelane_b32 v32, s48, 6 +; GFX9-NEXT: v_writelane_b32 v32, s49, 7 +; GFX9-NEXT: v_writelane_b32 v32, s50, 8 +; GFX9-NEXT: v_writelane_b32 v32, s51, 9 +; GFX9-NEXT: v_writelane_b32 v32, s52, 10 +; GFX9-NEXT: v_writelane_b32 v32, s53, 11 +; GFX9-NEXT: v_writelane_b32 v32, s54, 12 +; GFX9-NEXT: v_writelane_b32 v32, s55, 13 +; GFX9-NEXT: v_writelane_b32 v32, s64, 14 +; GFX9-NEXT: v_writelane_b32 v32, s65, 15 +; GFX9-NEXT: v_writelane_b32 v32, s30, 16 +; GFX9-NEXT: v_writelane_b32 v32, s31, 17 ; GFX9-NEXT: v_readfirstlane_b32 s72, v15 ; GFX9-NEXT: v_readfirstlane_b32 s74, v14 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 @@ -35534,27 +35559,27 @@ define inreg <15 x i64> @bitcast_v60f16_to_v15i64_scalar(<60 x half> inreg %a, i ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v6 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 -; GFX9-NEXT: v_readfirstlane_b32 s11, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 -; GFX9-NEXT: v_readfirstlane_b32 s10, v0 +; GFX9-NEXT: v_readfirstlane_b32 s56, v6 +; GFX9-NEXT: v_readfirstlane_b32 s92, v5 +; GFX9-NEXT: v_readfirstlane_b32 s94, v4 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v3 +; GFX9-NEXT: v_readfirstlane_b32 s30, v2 +; GFX9-NEXT: v_readfirstlane_b32 s34, v1 +; GFX9-NEXT: v_readfirstlane_b32 s50, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 ; GFX9-NEXT: s_lshr_b32 s7, s26, 16 ; GFX9-NEXT: s_lshr_b32 s8, s25, 16 ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 +; GFX9-NEXT: s_lshr_b32 s10, s23, 16 +; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s73, s72, 16 ; GFX9-NEXT: s_lshr_b32 s75, s74, 16 ; GFX9-NEXT: s_lshr_b32 s76, s63, 16 @@ -35564,28 +35589,36 @@ define inreg <15 x i64> @bitcast_v60f16_to_v15i64_scalar(<60 x half> inreg %a, i ; GFX9-NEXT: s_lshr_b32 s88, s59, 16 ; GFX9-NEXT: s_lshr_b32 s89, s58, 16 ; GFX9-NEXT: s_lshr_b32 s90, s57, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 -; GFX9-NEXT: s_lshr_b32 s22, s11, 16 -; GFX9-NEXT: s_lshr_b32 s23, s10, 16 -; GFX9-NEXT: v_readfirstlane_b32 s44, v16 -; GFX9-NEXT: s_cmp_lg_u32 s44, 0 +; GFX9-NEXT: s_lshr_b32 s91, s56, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 +; GFX9-NEXT: s_lshr_b32 s35, s34, 16 +; GFX9-NEXT: s_lshr_b32 s51, s50, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v16 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 +; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 +; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 ; GFX9-NEXT: s_pack_ll_b32_b16 s45, s25, s8 ; GFX9-NEXT: s_pack_ll_b32_b16 s46, s26, s7 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s10, s23 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s11, s22 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s55, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s56, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s50, s51 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s34, s35 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s55, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s90 ; GFX9-NEXT: s_pack_ll_b32_b16 s58, s58, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s59, s59, s88 @@ -35667,20 +35700,24 @@ define inreg <15 x i64> @bitcast_v60f16_to_v15i64_scalar(<60 x half> inreg %a, i ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB47_5: ; %end -; GFX9-NEXT: v_readlane_b32 s65, v32, 13 -; GFX9-NEXT: v_readlane_b32 s64, v32, 12 -; GFX9-NEXT: v_readlane_b32 s55, v32, 11 -; GFX9-NEXT: v_readlane_b32 s54, v32, 10 -; GFX9-NEXT: v_readlane_b32 s53, v32, 9 -; GFX9-NEXT: v_readlane_b32 s52, v32, 8 -; GFX9-NEXT: v_readlane_b32 s51, v32, 7 -; GFX9-NEXT: v_readlane_b32 s50, v32, 6 -; GFX9-NEXT: v_readlane_b32 s49, v32, 5 -; GFX9-NEXT: v_readlane_b32 s48, v32, 4 -; GFX9-NEXT: v_readlane_b32 s39, v32, 3 -; GFX9-NEXT: v_readlane_b32 s38, v32, 2 -; GFX9-NEXT: v_readlane_b32 s37, v32, 1 -; GFX9-NEXT: v_readlane_b32 s36, v32, 0 +; GFX9-NEXT: v_readlane_b32 s30, v32, 16 +; GFX9-NEXT: v_readlane_b32 s31, v32, 17 +; GFX9-NEXT: v_readlane_b32 s65, v32, 15 +; GFX9-NEXT: v_readlane_b32 s64, v32, 14 +; GFX9-NEXT: v_readlane_b32 s55, v32, 13 +; GFX9-NEXT: v_readlane_b32 s54, v32, 12 +; GFX9-NEXT: v_readlane_b32 s53, v32, 11 +; GFX9-NEXT: v_readlane_b32 s52, v32, 10 +; GFX9-NEXT: v_readlane_b32 s51, v32, 9 +; GFX9-NEXT: v_readlane_b32 s50, v32, 8 +; GFX9-NEXT: v_readlane_b32 s49, v32, 7 +; GFX9-NEXT: v_readlane_b32 s48, v32, 6 +; GFX9-NEXT: v_readlane_b32 s39, v32, 5 +; GFX9-NEXT: v_readlane_b32 s38, v32, 4 +; GFX9-NEXT: v_readlane_b32 s37, v32, 3 +; GFX9-NEXT: v_readlane_b32 s36, v32, 2 +; GFX9-NEXT: v_readlane_b32 s35, v32, 1 +; GFX9-NEXT: v_readlane_b32 s34, v32, 0 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] @@ -35984,8 +36021,8 @@ define <60 x i16> @bitcast_v15f64_to_v60i16(<15 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v1 ; SI-NEXT: .LBB48_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40 ; SI-NEXT: v_or_b32_e32 v0, v0, v43 @@ -36676,67 +36713,66 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_writelane_b32 v62, s34, 0 -; SI-NEXT: v_writelane_b32 v62, s35, 1 -; SI-NEXT: v_writelane_b32 v62, s36, 2 -; SI-NEXT: v_writelane_b32 v62, s37, 3 -; SI-NEXT: v_writelane_b32 v62, s38, 4 -; SI-NEXT: v_writelane_b32 v62, s39, 5 -; SI-NEXT: v_writelane_b32 v62, s48, 6 -; SI-NEXT: v_writelane_b32 v62, s49, 7 -; SI-NEXT: v_writelane_b32 v62, s50, 8 -; SI-NEXT: v_writelane_b32 v62, s51, 9 -; SI-NEXT: v_writelane_b32 v62, s52, 10 -; SI-NEXT: v_writelane_b32 v62, s53, 11 -; SI-NEXT: v_writelane_b32 v62, s54, 12 -; SI-NEXT: v_writelane_b32 v62, s55, 13 -; SI-NEXT: v_writelane_b32 v62, s64, 14 -; SI-NEXT: v_writelane_b32 v62, s30, 15 -; SI-NEXT: v_writelane_b32 v62, s31, 16 -; SI-NEXT: v_readfirstlane_b32 s42, v16 -; SI-NEXT: v_readfirstlane_b32 s15, v15 -; SI-NEXT: v_readfirstlane_b32 s14, v14 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: v_writelane_b32 v61, s34, 0 +; SI-NEXT: v_writelane_b32 v61, s35, 1 +; SI-NEXT: v_writelane_b32 v61, s36, 2 +; SI-NEXT: v_writelane_b32 v61, s37, 3 +; SI-NEXT: v_writelane_b32 v61, s38, 4 +; SI-NEXT: v_writelane_b32 v61, s39, 5 +; SI-NEXT: v_writelane_b32 v61, s48, 6 +; SI-NEXT: v_writelane_b32 v61, s49, 7 +; SI-NEXT: v_writelane_b32 v61, s50, 8 +; SI-NEXT: v_writelane_b32 v61, s51, 9 +; SI-NEXT: v_writelane_b32 v61, s52, 10 +; SI-NEXT: v_writelane_b32 v61, s53, 11 +; SI-NEXT: v_writelane_b32 v61, s54, 12 +; SI-NEXT: v_writelane_b32 v61, s55, 13 +; SI-NEXT: v_writelane_b32 v61, s64, 14 +; SI-NEXT: v_writelane_b32 v61, s30, 15 +; SI-NEXT: v_writelane_b32 v61, s31, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v16 +; SI-NEXT: v_readfirstlane_b32 s43, v15 +; SI-NEXT: v_readfirstlane_b32 s42, v14 ; SI-NEXT: v_readfirstlane_b32 s41, v13 ; SI-NEXT: v_readfirstlane_b32 s40, v12 -; SI-NEXT: v_readfirstlane_b32 s13, v11 -; SI-NEXT: v_readfirstlane_b32 s12, v10 -; SI-NEXT: v_readfirstlane_b32 s11, v9 -; SI-NEXT: v_readfirstlane_b32 s10, v8 -; SI-NEXT: v_readfirstlane_b32 s9, v7 -; SI-NEXT: v_readfirstlane_b32 s8, v6 -; SI-NEXT: v_readfirstlane_b32 s7, v5 -; SI-NEXT: v_readfirstlane_b32 s6, v4 -; SI-NEXT: v_readfirstlane_b32 s5, v3 -; SI-NEXT: v_readfirstlane_b32 s4, v2 -; SI-NEXT: v_readfirstlane_b32 s43, v1 -; SI-NEXT: s_cmp_lg_u32 s42, 0 -; SI-NEXT: v_readfirstlane_b32 s42, v0 +; SI-NEXT: v_readfirstlane_b32 s15, v11 +; SI-NEXT: v_readfirstlane_b32 s14, v10 +; SI-NEXT: v_readfirstlane_b32 s13, v9 +; SI-NEXT: v_readfirstlane_b32 s12, v8 +; SI-NEXT: v_readfirstlane_b32 s11, v7 +; SI-NEXT: v_readfirstlane_b32 s10, v6 +; SI-NEXT: v_readfirstlane_b32 s9, v5 +; SI-NEXT: v_readfirstlane_b32 s8, v4 +; SI-NEXT: v_readfirstlane_b32 s7, v3 +; SI-NEXT: v_readfirstlane_b32 s6, v2 +; SI-NEXT: v_readfirstlane_b32 s5, v1 +; SI-NEXT: s_cmp_lg_u32 s4, 0 +; SI-NEXT: v_readfirstlane_b32 s4, v0 ; SI-NEXT: s_cbranch_scc0 .LBB49_3 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_lshr_b32 s64, s15, 16 +; SI-NEXT: s_lshr_b32 s64, s43, 16 ; SI-NEXT: s_lshr_b32 s55, s41, 16 -; SI-NEXT: s_lshr_b32 s54, s13, 16 -; SI-NEXT: s_lshr_b32 s53, s11, 16 -; SI-NEXT: s_lshr_b32 s52, s9, 16 -; SI-NEXT: s_lshr_b32 s51, s7, 16 -; SI-NEXT: s_lshr_b32 s50, s5, 16 -; SI-NEXT: s_lshr_b32 s49, s43, 16 +; SI-NEXT: s_lshr_b32 s54, s15, 16 +; SI-NEXT: s_lshr_b32 s53, s13, 16 +; SI-NEXT: s_lshr_b32 s52, s11, 16 +; SI-NEXT: s_lshr_b32 s51, s9, 16 +; SI-NEXT: s_lshr_b32 s50, s7, 16 +; SI-NEXT: s_lshr_b32 s49, s5, 16 ; SI-NEXT: s_lshr_b32 s48, s29, 16 ; SI-NEXT: s_lshr_b32 s39, s27, 16 ; SI-NEXT: s_lshr_b32 s38, s25, 16 @@ -36744,14 +36780,14 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; SI-NEXT: s_lshr_b32 s36, s21, 16 ; SI-NEXT: s_lshr_b32 s35, s19, 16 ; SI-NEXT: s_lshr_b32 s34, s17, 16 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[44:45], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[44:45], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16 ; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16 ; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16 @@ -36761,25 +36797,25 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16 ; SI-NEXT: s_cbranch_execnz .LBB49_4 ; SI-NEXT: .LBB49_2: ; %cmp.true -; SI-NEXT: v_add_f64 v[28:29], s[14:15], 1.0 +; SI-NEXT: v_add_f64 v[28:29], s[42:43], 1.0 ; SI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 -; SI-NEXT: v_add_f64 v[24:25], s[12:13], 1.0 +; SI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 ; SI-NEXT: v_lshr_b64 v[30:31], v[28:29], 16 -; SI-NEXT: v_add_f64 v[22:23], s[10:11], 1.0 +; SI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 ; SI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0 ; SI-NEXT: v_lshr_b64 v[31:32], v[26:27], 16 -; SI-NEXT: v_add_f64 v[20:21], s[8:9], 1.0 +; SI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 ; SI-NEXT: v_add_f64 v[8:9], s[24:25], 1.0 ; SI-NEXT: v_lshr_b64 v[32:33], v[24:25], 16 -; SI-NEXT: v_add_f64 v[18:19], s[6:7], 1.0 +; SI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; SI-NEXT: v_add_f64 v[6:7], s[22:23], 1.0 ; SI-NEXT: v_lshr_b64 v[33:34], v[22:23], 16 ; SI-NEXT: v_lshr_b64 v[48:49], v[10:11], 16 -; SI-NEXT: v_add_f64 v[16:17], s[4:5], 1.0 +; SI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0 ; SI-NEXT: v_lshr_b64 v[34:35], v[20:21], 16 ; SI-NEXT: v_lshr_b64 v[49:50], v[8:9], 16 -; SI-NEXT: v_add_f64 v[14:15], s[42:43], 1.0 +; SI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[35:36], v[18:19], 16 ; SI-NEXT: v_lshr_b64 v[50:51], v[6:7], 16 @@ -36798,21 +36834,21 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21 ; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v15 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v15 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v13 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v11 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v9 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v7 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 ; SI-NEXT: s_branch .LBB49_5 ; SI-NEXT: .LBB49_3: ; SI-NEXT: ; implicit-def: $sgpr30 @@ -36841,42 +36877,42 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; SI-NEXT: ; implicit-def: $sgpr53 ; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr55 +; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: s_branch .LBB49_2 ; SI-NEXT: .LBB49_4: +; SI-NEXT: v_mov_b32_e32 v29, s43 +; SI-NEXT: v_mov_b32_e32 v27, s41 +; SI-NEXT: v_mov_b32_e32 v25, s15 +; SI-NEXT: v_mov_b32_e32 v23, s13 +; SI-NEXT: v_mov_b32_e32 v21, s11 +; SI-NEXT: v_mov_b32_e32 v19, s9 +; SI-NEXT: v_mov_b32_e32 v17, s7 +; SI-NEXT: v_mov_b32_e32 v15, s5 +; SI-NEXT: v_mov_b32_e32 v13, s29 +; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v6, s22 -; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v10, s26 -; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v12, s28 -; SI-NEXT: v_mov_b32_e32 v15, s43 -; SI-NEXT: v_mov_b32_e32 v14, s42 -; SI-NEXT: v_mov_b32_e32 v27, s41 -; SI-NEXT: v_mov_b32_e32 v25, s13 -; SI-NEXT: v_mov_b32_e32 v23, s11 -; SI-NEXT: v_mov_b32_e32 v21, s9 -; SI-NEXT: v_mov_b32_e32 v19, s7 -; SI-NEXT: v_mov_b32_e32 v17, s5 -; SI-NEXT: v_mov_b32_e32 v16, s4 -; SI-NEXT: v_mov_b32_e32 v18, s6 -; SI-NEXT: v_mov_b32_e32 v20, s8 -; SI-NEXT: v_mov_b32_e32 v22, s10 -; SI-NEXT: v_mov_b32_e32 v24, s12 +; SI-NEXT: v_mov_b32_e32 v14, s4 +; SI-NEXT: v_mov_b32_e32 v16, s6 +; SI-NEXT: v_mov_b32_e32 v18, s8 +; SI-NEXT: v_mov_b32_e32 v20, s10 +; SI-NEXT: v_mov_b32_e32 v22, s12 +; SI-NEXT: v_mov_b32_e32 v24, s14 ; SI-NEXT: v_mov_b32_e32 v26, s40 -; SI-NEXT: v_mov_b32_e32 v29, s15 -; SI-NEXT: v_mov_b32_e32 v28, s14 +; SI-NEXT: v_mov_b32_e32 v28, s42 ; SI-NEXT: v_mov_b32_e32 v55, s64 ; SI-NEXT: v_mov_b32_e32 v40, s55 ; SI-NEXT: v_mov_b32_e32 v41, s54 @@ -36884,21 +36920,21 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v43, s52 ; SI-NEXT: v_mov_b32_e32 v44, s51 ; SI-NEXT: v_mov_b32_e32 v45, s50 -; SI-NEXT: v_mov_b32_e32 v46, s49 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_mov_b32_e32 v47, s48 +; SI-NEXT: v_mov_b32_e32 v46, s49 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_mov_b32_e32 v56, s39 +; SI-NEXT: v_mov_b32_e32 v47, s48 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v57, s38 +; SI-NEXT: v_mov_b32_e32 v56, s39 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_mov_b32_e32 v58, s37 +; SI-NEXT: v_mov_b32_e32 v57, s38 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v59, s36 +; SI-NEXT: v_mov_b32_e32 v58, s37 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v60, s35 +; SI-NEXT: v_mov_b32_e32 v59, s36 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v61, s34 +; SI-NEXT: v_mov_b32_e32 v60, s35 +; SI-NEXT: v_mov_b32_e32 v39, s34 ; SI-NEXT: v_mov_b32_e32 v53, s30 ; SI-NEXT: v_mov_b32_e32 v52, s94 ; SI-NEXT: v_mov_b32_e32 v51, s92 @@ -36912,41 +36948,38 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; SI-NEXT: v_mov_b32_e32 v34, s60 ; SI-NEXT: v_mov_b32_e32 v33, s58 ; SI-NEXT: v_mov_b32_e32 v32, s56 -; SI-NEXT: v_mov_b32_e32 v31, s44 -; SI-NEXT: v_mov_b32_e32 v30, s46 +; SI-NEXT: v_mov_b32_e32 v31, s46 +; SI-NEXT: v_mov_b32_e32 v30, s44 ; SI-NEXT: .LBB49_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v39 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 ; SI-NEXT: v_or_b32_e32 v1, v1, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52 ; SI-NEXT: v_or_b32_e32 v2, v2, v39 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60 ; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51 ; SI-NEXT: v_or_b32_e32 v4, v4, v39 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59 ; SI-NEXT: v_or_b32_e32 v5, v5, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 ; SI-NEXT: v_or_b32_e32 v6, v6, v39 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58 ; SI-NEXT: v_or_b32_e32 v7, v7, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 ; SI-NEXT: v_or_b32_e32 v8, v8, v39 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57 ; SI-NEXT: v_or_b32_e32 v9, v9, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 @@ -36981,22 +37014,23 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v41 ; SI-NEXT: v_or_b32_e32 v26, v26, v31 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v40 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v53 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 @@ -37009,7 +37043,8 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; SI-NEXT: v_or_b32_e32 v28, v28, v30 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v55 -; SI-NEXT: v_readlane_b32 s30, v62, 15 +; SI-NEXT: v_readlane_b32 s30, v61, 15 +; SI-NEXT: v_or_b32_e32 v0, v0, v53 ; SI-NEXT: v_or_b32_e32 v11, v11, v39 ; SI-NEXT: v_or_b32_e32 v13, v13, v38 ; SI-NEXT: v_or_b32_e32 v15, v15, v37 @@ -37020,24 +37055,24 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; SI-NEXT: v_or_b32_e32 v25, v25, v32 ; SI-NEXT: v_or_b32_e32 v27, v27, v31 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: v_readlane_b32 s31, v62, 16 -; SI-NEXT: v_readlane_b32 s64, v62, 14 -; SI-NEXT: v_readlane_b32 s55, v62, 13 -; SI-NEXT: v_readlane_b32 s54, v62, 12 -; SI-NEXT: v_readlane_b32 s53, v62, 11 -; SI-NEXT: v_readlane_b32 s52, v62, 10 -; SI-NEXT: v_readlane_b32 s51, v62, 9 -; SI-NEXT: v_readlane_b32 s50, v62, 8 -; SI-NEXT: v_readlane_b32 s49, v62, 7 -; SI-NEXT: v_readlane_b32 s48, v62, 6 -; SI-NEXT: v_readlane_b32 s39, v62, 5 -; SI-NEXT: v_readlane_b32 s38, v62, 4 -; SI-NEXT: v_readlane_b32 s37, v62, 3 -; SI-NEXT: v_readlane_b32 s36, v62, 2 -; SI-NEXT: v_readlane_b32 s35, v62, 1 -; SI-NEXT: v_readlane_b32 s34, v62, 0 +; SI-NEXT: v_readlane_b32 s31, v61, 16 +; SI-NEXT: v_readlane_b32 s64, v61, 14 +; SI-NEXT: v_readlane_b32 s55, v61, 13 +; SI-NEXT: v_readlane_b32 s54, v61, 12 +; SI-NEXT: v_readlane_b32 s53, v61, 11 +; SI-NEXT: v_readlane_b32 s52, v61, 10 +; SI-NEXT: v_readlane_b32 s51, v61, 9 +; SI-NEXT: v_readlane_b32 s50, v61, 8 +; SI-NEXT: v_readlane_b32 s49, v61, 7 +; SI-NEXT: v_readlane_b32 s48, v61, 6 +; SI-NEXT: v_readlane_b32 s39, v61, 5 +; SI-NEXT: v_readlane_b32 s38, v61, 4 +; SI-NEXT: v_readlane_b32 s37, v61, 3 +; SI-NEXT: v_readlane_b32 s36, v61, 2 +; SI-NEXT: v_readlane_b32 s35, v61, 1 +; SI-NEXT: v_readlane_b32 s34, v61, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -37069,18 +37104,18 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; VI-NEXT: v_writelane_b32 v60, s30, 6 ; VI-NEXT: v_writelane_b32 v60, s31, 7 ; VI-NEXT: v_readfirstlane_b32 s4, v16 -; VI-NEXT: v_readfirstlane_b32 s9, v15 -; VI-NEXT: v_readfirstlane_b32 s8, v14 -; VI-NEXT: v_readfirstlane_b32 s11, v13 -; VI-NEXT: v_readfirstlane_b32 s10, v12 -; VI-NEXT: v_readfirstlane_b32 s13, v11 -; VI-NEXT: v_readfirstlane_b32 s12, v10 -; VI-NEXT: v_readfirstlane_b32 s15, v9 -; VI-NEXT: v_readfirstlane_b32 s14, v8 -; VI-NEXT: v_readfirstlane_b32 s41, v7 -; VI-NEXT: v_readfirstlane_b32 s40, v6 -; VI-NEXT: v_readfirstlane_b32 s43, v5 -; VI-NEXT: v_readfirstlane_b32 s42, v4 +; VI-NEXT: v_readfirstlane_b32 s43, v15 +; VI-NEXT: v_readfirstlane_b32 s42, v14 +; VI-NEXT: v_readfirstlane_b32 s41, v13 +; VI-NEXT: v_readfirstlane_b32 s40, v12 +; VI-NEXT: v_readfirstlane_b32 s15, v11 +; VI-NEXT: v_readfirstlane_b32 s14, v10 +; VI-NEXT: v_readfirstlane_b32 s13, v9 +; VI-NEXT: v_readfirstlane_b32 s12, v8 +; VI-NEXT: v_readfirstlane_b32 s11, v7 +; VI-NEXT: v_readfirstlane_b32 s10, v6 +; VI-NEXT: v_readfirstlane_b32 s9, v5 +; VI-NEXT: v_readfirstlane_b32 s8, v4 ; VI-NEXT: v_readfirstlane_b32 s7, v3 ; VI-NEXT: v_readfirstlane_b32 s6, v2 ; VI-NEXT: v_readfirstlane_b32 s5, v1 @@ -37088,18 +37123,18 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; VI-NEXT: v_readfirstlane_b32 s4, v0 ; VI-NEXT: s_cbranch_scc0 .LBB49_3 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: s_lshr_b32 s46, s9, 16 -; VI-NEXT: s_lshr_b32 s77, s8, 16 -; VI-NEXT: s_lshr_b32 s47, s11, 16 -; VI-NEXT: s_lshr_b32 s78, s10, 16 -; VI-NEXT: s_lshr_b32 s56, s13, 16 -; VI-NEXT: s_lshr_b32 s79, s12, 16 -; VI-NEXT: s_lshr_b32 s57, s15, 16 -; VI-NEXT: s_lshr_b32 s88, s14, 16 -; VI-NEXT: s_lshr_b32 s58, s41, 16 -; VI-NEXT: s_lshr_b32 s89, s40, 16 -; VI-NEXT: s_lshr_b32 s59, s43, 16 -; VI-NEXT: s_lshr_b32 s90, s42, 16 +; VI-NEXT: s_lshr_b32 s46, s43, 16 +; VI-NEXT: s_lshr_b32 s77, s42, 16 +; VI-NEXT: s_lshr_b32 s47, s41, 16 +; VI-NEXT: s_lshr_b32 s78, s40, 16 +; VI-NEXT: s_lshr_b32 s56, s15, 16 +; VI-NEXT: s_lshr_b32 s79, s14, 16 +; VI-NEXT: s_lshr_b32 s57, s13, 16 +; VI-NEXT: s_lshr_b32 s88, s12, 16 +; VI-NEXT: s_lshr_b32 s58, s11, 16 +; VI-NEXT: s_lshr_b32 s89, s10, 16 +; VI-NEXT: s_lshr_b32 s59, s9, 16 +; VI-NEXT: s_lshr_b32 s90, s8, 16 ; VI-NEXT: s_lshr_b32 s60, s7, 16 ; VI-NEXT: s_lshr_b32 s91, s6, 16 ; VI-NEXT: s_lshr_b32 s61, s5, 16 @@ -37120,12 +37155,12 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; VI-NEXT: s_lshr_b32 s39, s16, 16 ; VI-NEXT: s_cbranch_execnz .LBB49_4 ; VI-NEXT: .LBB49_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[28:29], s[8:9], 1.0 -; VI-NEXT: v_add_f64 v[26:27], s[10:11], 1.0 -; VI-NEXT: v_add_f64 v[24:25], s[12:13], 1.0 -; VI-NEXT: v_add_f64 v[22:23], s[14:15], 1.0 -; VI-NEXT: v_add_f64 v[20:21], s[40:41], 1.0 -; VI-NEXT: v_add_f64 v[18:19], s[42:43], 1.0 +; VI-NEXT: v_add_f64 v[28:29], s[42:43], 1.0 +; VI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 +; VI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 +; VI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 +; VI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; VI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; VI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -37208,7 +37243,12 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; VI-NEXT: v_mov_b32_e32 v12, s28 ; VI-NEXT: v_mov_b32_e32 v14, s4 ; VI-NEXT: v_mov_b32_e32 v16, s6 -; VI-NEXT: v_mov_b32_e32 v18, s42 +; VI-NEXT: v_mov_b32_e32 v18, s8 +; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_mov_b32_e32 v22, s12 +; VI-NEXT: v_mov_b32_e32 v24, s14 +; VI-NEXT: v_mov_b32_e32 v26, s40 +; VI-NEXT: v_mov_b32_e32 v28, s42 ; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v3, s19 ; VI-NEXT: v_mov_b32_e32 v5, s21 @@ -37218,17 +37258,12 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; VI-NEXT: v_mov_b32_e32 v13, s29 ; VI-NEXT: v_mov_b32_e32 v15, s5 ; VI-NEXT: v_mov_b32_e32 v17, s7 -; VI-NEXT: v_mov_b32_e32 v19, s43 -; VI-NEXT: v_mov_b32_e32 v20, s40 -; VI-NEXT: v_mov_b32_e32 v21, s41 -; VI-NEXT: v_mov_b32_e32 v22, s14 -; VI-NEXT: v_mov_b32_e32 v23, s15 -; VI-NEXT: v_mov_b32_e32 v24, s12 -; VI-NEXT: v_mov_b32_e32 v25, s13 -; VI-NEXT: v_mov_b32_e32 v26, s10 -; VI-NEXT: v_mov_b32_e32 v27, s11 -; VI-NEXT: v_mov_b32_e32 v28, s8 -; VI-NEXT: v_mov_b32_e32 v29, s9 +; VI-NEXT: v_mov_b32_e32 v19, s9 +; VI-NEXT: v_mov_b32_e32 v21, s11 +; VI-NEXT: v_mov_b32_e32 v23, s13 +; VI-NEXT: v_mov_b32_e32 v25, s15 +; VI-NEXT: v_mov_b32_e32 v27, s41 +; VI-NEXT: v_mov_b32_e32 v29, s43 ; VI-NEXT: v_mov_b32_e32 v56, s39 ; VI-NEXT: v_mov_b32_e32 v46, s38 ; VI-NEXT: v_mov_b32_e32 v44, s37 @@ -37369,18 +37404,18 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; GFX9-NEXT: v_writelane_b32 v60, s30, 2 ; GFX9-NEXT: v_writelane_b32 v60, s31, 3 ; GFX9-NEXT: v_readfirstlane_b32 s4, v16 -; GFX9-NEXT: v_readfirstlane_b32 s9, v15 -; GFX9-NEXT: v_readfirstlane_b32 s8, v14 -; GFX9-NEXT: v_readfirstlane_b32 s11, v13 -; GFX9-NEXT: v_readfirstlane_b32 s10, v12 -; GFX9-NEXT: v_readfirstlane_b32 s13, v11 -; GFX9-NEXT: v_readfirstlane_b32 s12, v10 -; GFX9-NEXT: v_readfirstlane_b32 s15, v9 -; GFX9-NEXT: v_readfirstlane_b32 s14, v8 -; GFX9-NEXT: v_readfirstlane_b32 s41, v7 -; GFX9-NEXT: v_readfirstlane_b32 s40, v6 -; GFX9-NEXT: v_readfirstlane_b32 s43, v5 -; GFX9-NEXT: v_readfirstlane_b32 s42, v4 +; GFX9-NEXT: v_readfirstlane_b32 s43, v15 +; GFX9-NEXT: v_readfirstlane_b32 s42, v14 +; GFX9-NEXT: v_readfirstlane_b32 s41, v13 +; GFX9-NEXT: v_readfirstlane_b32 s40, v12 +; GFX9-NEXT: v_readfirstlane_b32 s15, v11 +; GFX9-NEXT: v_readfirstlane_b32 s14, v10 +; GFX9-NEXT: v_readfirstlane_b32 s13, v9 +; GFX9-NEXT: v_readfirstlane_b32 s12, v8 +; GFX9-NEXT: v_readfirstlane_b32 s11, v7 +; GFX9-NEXT: v_readfirstlane_b32 s10, v6 +; GFX9-NEXT: v_readfirstlane_b32 s9, v5 +; GFX9-NEXT: v_readfirstlane_b32 s8, v4 ; GFX9-NEXT: v_readfirstlane_b32 s7, v3 ; GFX9-NEXT: v_readfirstlane_b32 s6, v2 ; GFX9-NEXT: v_readfirstlane_b32 s5, v1 @@ -37388,18 +37423,18 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s4, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB49_3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: s_lshr_b32 s46, s9, 16 -; GFX9-NEXT: s_lshr_b32 s77, s8, 16 -; GFX9-NEXT: s_lshr_b32 s47, s11, 16 -; GFX9-NEXT: s_lshr_b32 s78, s10, 16 -; GFX9-NEXT: s_lshr_b32 s56, s13, 16 -; GFX9-NEXT: s_lshr_b32 s79, s12, 16 -; GFX9-NEXT: s_lshr_b32 s57, s15, 16 -; GFX9-NEXT: s_lshr_b32 s88, s14, 16 -; GFX9-NEXT: s_lshr_b32 s58, s41, 16 -; GFX9-NEXT: s_lshr_b32 s89, s40, 16 -; GFX9-NEXT: s_lshr_b32 s59, s43, 16 -; GFX9-NEXT: s_lshr_b32 s90, s42, 16 +; GFX9-NEXT: s_lshr_b32 s46, s43, 16 +; GFX9-NEXT: s_lshr_b32 s77, s42, 16 +; GFX9-NEXT: s_lshr_b32 s47, s41, 16 +; GFX9-NEXT: s_lshr_b32 s78, s40, 16 +; GFX9-NEXT: s_lshr_b32 s56, s15, 16 +; GFX9-NEXT: s_lshr_b32 s79, s14, 16 +; GFX9-NEXT: s_lshr_b32 s57, s13, 16 +; GFX9-NEXT: s_lshr_b32 s88, s12, 16 +; GFX9-NEXT: s_lshr_b32 s58, s11, 16 +; GFX9-NEXT: s_lshr_b32 s89, s10, 16 +; GFX9-NEXT: s_lshr_b32 s59, s9, 16 +; GFX9-NEXT: s_lshr_b32 s90, s8, 16 ; GFX9-NEXT: s_lshr_b32 s60, s7, 16 ; GFX9-NEXT: s_lshr_b32 s91, s6, 16 ; GFX9-NEXT: s_lshr_b32 s61, s5, 16 @@ -37420,12 +37455,12 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; GFX9-NEXT: s_lshr_b32 s35, s16, 16 ; GFX9-NEXT: s_cbranch_execnz .LBB49_4 ; GFX9-NEXT: .LBB49_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[28:29], s[8:9], 1.0 -; GFX9-NEXT: v_add_f64 v[26:27], s[10:11], 1.0 -; GFX9-NEXT: v_add_f64 v[24:25], s[12:13], 1.0 -; GFX9-NEXT: v_add_f64 v[22:23], s[14:15], 1.0 -; GFX9-NEXT: v_add_f64 v[20:21], s[40:41], 1.0 -; GFX9-NEXT: v_add_f64 v[18:19], s[42:43], 1.0 +; GFX9-NEXT: v_add_f64 v[28:29], s[42:43], 1.0 +; GFX9-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 +; GFX9-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 +; GFX9-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 +; GFX9-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; GFX9-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; GFX9-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -37508,7 +37543,12 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v12, s28 ; GFX9-NEXT: v_mov_b32_e32 v14, s4 ; GFX9-NEXT: v_mov_b32_e32 v16, s6 -; GFX9-NEXT: v_mov_b32_e32 v18, s42 +; GFX9-NEXT: v_mov_b32_e32 v18, s8 +; GFX9-NEXT: v_mov_b32_e32 v20, s10 +; GFX9-NEXT: v_mov_b32_e32 v22, s12 +; GFX9-NEXT: v_mov_b32_e32 v24, s14 +; GFX9-NEXT: v_mov_b32_e32 v26, s40 +; GFX9-NEXT: v_mov_b32_e32 v28, s42 ; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: v_mov_b32_e32 v5, s21 @@ -37518,17 +37558,12 @@ define inreg <60 x i16> @bitcast_v15f64_to_v60i16_scalar(<15 x double> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v13, s29 ; GFX9-NEXT: v_mov_b32_e32 v15, s5 ; GFX9-NEXT: v_mov_b32_e32 v17, s7 -; GFX9-NEXT: v_mov_b32_e32 v19, s43 -; GFX9-NEXT: v_mov_b32_e32 v20, s40 -; GFX9-NEXT: v_mov_b32_e32 v21, s41 -; GFX9-NEXT: v_mov_b32_e32 v22, s14 -; GFX9-NEXT: v_mov_b32_e32 v23, s15 -; GFX9-NEXT: v_mov_b32_e32 v24, s12 -; GFX9-NEXT: v_mov_b32_e32 v25, s13 -; GFX9-NEXT: v_mov_b32_e32 v26, s10 -; GFX9-NEXT: v_mov_b32_e32 v27, s11 -; GFX9-NEXT: v_mov_b32_e32 v28, s8 -; GFX9-NEXT: v_mov_b32_e32 v29, s9 +; GFX9-NEXT: v_mov_b32_e32 v19, s9 +; GFX9-NEXT: v_mov_b32_e32 v21, s11 +; GFX9-NEXT: v_mov_b32_e32 v23, s13 +; GFX9-NEXT: v_mov_b32_e32 v25, s15 +; GFX9-NEXT: v_mov_b32_e32 v27, s41 +; GFX9-NEXT: v_mov_b32_e32 v29, s43 ; GFX9-NEXT: v_mov_b32_e32 v56, s35 ; GFX9-NEXT: v_mov_b32_e32 v46, s34 ; GFX9-NEXT: v_mov_b32_e32 v44, s31 @@ -38759,10 +38794,10 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v29, 3 ; VI-NEXT: v_add_u16_e32 v0, 3, v61 ; VI-NEXT: v_add_u16_sdwa v1, v61, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_u16_e32 v2, 3, v60 -; VI-NEXT: v_add_u16_sdwa v3, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v0, v0, v1 -; VI-NEXT: v_or_b32_e32 v1, v2, v3 +; VI-NEXT: v_add_u16_e32 v1, 3, v60 +; VI-NEXT: v_add_u16_sdwa v2, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_or_b32_e32 v1, v1, v2 ; VI-NEXT: v_add_u16_e32 v2, 3, v59 ; VI-NEXT: v_add_u16_sdwa v3, v59, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_or_b32_e32 v2, v2, v3 @@ -38957,8 +38992,8 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v44 ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v45 ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v46 -; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v47 -; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v56 +; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v47 +; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v56 ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v57 ; GFX9-NEXT: v_lshrrev_b32_e32 v36, 16, v58 ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v59 @@ -38994,8 +39029,8 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6 ; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6 -; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6 -; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6 +; GFX9-NEXT: v_perm_b32 v5, v63, v56, s6 +; GFX9-NEXT: v_perm_b32 v6, v34, v47, s6 ; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6 ; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6 ; GFX9-NEXT: v_perm_b32 v9, v9, v44, s6 @@ -39037,8 +39072,8 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: ; implicit-def: $vgpr39 ; GFX9-NEXT: ; implicit-def: $vgpr32 ; GFX9-NEXT: ; implicit-def: $vgpr33 -; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr34 +; GFX9-NEXT: ; implicit-def: $vgpr63 ; GFX9-NEXT: ; implicit-def: $vgpr35 ; GFX9-NEXT: ; implicit-def: $vgpr36 ; GFX9-NEXT: ; implicit-def: $vgpr62 @@ -39152,8 +39187,8 @@ define <15 x double> @bitcast_v60i16_to_v15f64(<60 x i16> %a, i32 %b) #0 { ; GFX9-NEXT: v_perm_b32 v2, v62, v59, s6 ; GFX9-NEXT: v_perm_b32 v3, v36, v58, s6 ; GFX9-NEXT: v_perm_b32 v4, v35, v57, s6 -; GFX9-NEXT: v_perm_b32 v5, v34, v56, s6 -; GFX9-NEXT: v_perm_b32 v6, v63, v47, s6 +; GFX9-NEXT: v_perm_b32 v5, v63, v56, s6 +; GFX9-NEXT: v_perm_b32 v6, v34, v47, s6 ; GFX9-NEXT: v_perm_b32 v7, v33, v46, s6 ; GFX9-NEXT: v_perm_b32 v8, v32, v45, s6 ; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] @@ -39522,17 +39557,17 @@ define inreg <15 x double> @bitcast_v60i16_to_v15f64_scalar(<60 x i16> inreg %a, ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s98, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s97, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s96, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s98, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s87, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s86, 16 @@ -39936,17 +39971,17 @@ define inreg <15 x double> @bitcast_v60i16_to_v15f64_scalar(<60 x i16> inreg %a, ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s76, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s74, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s14, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s74, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s12, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s10, 16 @@ -40028,14 +40063,14 @@ define inreg <15 x double> @bitcast_v60i16_to_v15f64_scalar(<60 x i16> inreg %a, ; VI-NEXT: s_add_i32 s16, s16, 3 ; VI-NEXT: s_and_b32 s4, s16, 0xffff ; VI-NEXT: s_lshl_b32 s5, s76, 16 +; VI-NEXT: s_or_b32 s4, s5, s4 ; VI-NEXT: s_add_i32 s17, s17, 3 +; VI-NEXT: s_add_i32 s36, s4, 0x30000 +; VI-NEXT: s_and_b32 s4, s17, 0xffff +; VI-NEXT: s_lshl_b32 s5, s74, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 -; VI-NEXT: s_and_b32 s5, s17, 0xffff -; VI-NEXT: s_lshl_b32 s16, s74, 16 -; VI-NEXT: s_or_b32 s5, s16, s5 ; VI-NEXT: s_add_i32 s18, s18, 3 -; VI-NEXT: s_add_i32 s36, s4, 0x30000 -; VI-NEXT: s_add_i32 s37, s5, 0x30000 +; VI-NEXT: s_add_i32 s37, s4, 0x30000 ; VI-NEXT: s_and_b32 s4, s18, 0xffff ; VI-NEXT: s_lshl_b32 s5, s72, 16 ; VI-NEXT: s_or_b32 s4, s5, s4 @@ -40264,28 +40299,24 @@ define inreg <15 x double> @bitcast_v60i16_to_v15f64_scalar(<60 x i16> inreg %a, ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v32, s36, 0 -; GFX9-NEXT: v_writelane_b32 v32, s37, 1 -; GFX9-NEXT: v_writelane_b32 v32, s38, 2 -; GFX9-NEXT: v_writelane_b32 v32, s39, 3 -; GFX9-NEXT: v_writelane_b32 v32, s48, 4 -; GFX9-NEXT: v_writelane_b32 v32, s49, 5 -; GFX9-NEXT: v_writelane_b32 v32, s50, 6 -; GFX9-NEXT: v_writelane_b32 v32, s51, 7 -; GFX9-NEXT: v_writelane_b32 v32, s52, 8 -; GFX9-NEXT: v_writelane_b32 v32, s53, 9 -; GFX9-NEXT: v_writelane_b32 v32, s54, 10 -; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: v_writelane_b32 v32, s64, 12 -; GFX9-NEXT: v_writelane_b32 v32, s65, 13 -; GFX9-NEXT: s_lshr_b32 s10, s23, 16 -; GFX9-NEXT: s_lshr_b32 s11, s22, 16 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s34, 0 +; GFX9-NEXT: v_writelane_b32 v32, s35, 1 +; GFX9-NEXT: v_writelane_b32 v32, s36, 2 +; GFX9-NEXT: v_writelane_b32 v32, s37, 3 +; GFX9-NEXT: v_writelane_b32 v32, s38, 4 +; GFX9-NEXT: v_writelane_b32 v32, s39, 5 +; GFX9-NEXT: v_writelane_b32 v32, s48, 6 +; GFX9-NEXT: v_writelane_b32 v32, s49, 7 +; GFX9-NEXT: v_writelane_b32 v32, s50, 8 +; GFX9-NEXT: v_writelane_b32 v32, s51, 9 +; GFX9-NEXT: v_writelane_b32 v32, s52, 10 +; GFX9-NEXT: v_writelane_b32 v32, s53, 11 +; GFX9-NEXT: v_writelane_b32 v32, s54, 12 +; GFX9-NEXT: v_writelane_b32 v32, s55, 13 +; GFX9-NEXT: v_writelane_b32 v32, s64, 14 +; GFX9-NEXT: v_writelane_b32 v32, s65, 15 +; GFX9-NEXT: v_writelane_b32 v32, s30, 16 +; GFX9-NEXT: v_writelane_b32 v32, s31, 17 ; GFX9-NEXT: v_readfirstlane_b32 s72, v15 ; GFX9-NEXT: v_readfirstlane_b32 s74, v14 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 @@ -40295,27 +40326,27 @@ define inreg <15 x double> @bitcast_v60i16_to_v15f64_scalar(<60 x i16> inreg %a, ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v6 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 -; GFX9-NEXT: v_readfirstlane_b32 s11, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 -; GFX9-NEXT: v_readfirstlane_b32 s10, v0 +; GFX9-NEXT: v_readfirstlane_b32 s56, v6 +; GFX9-NEXT: v_readfirstlane_b32 s92, v5 +; GFX9-NEXT: v_readfirstlane_b32 s94, v4 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v3 +; GFX9-NEXT: v_readfirstlane_b32 s30, v2 +; GFX9-NEXT: v_readfirstlane_b32 s34, v1 +; GFX9-NEXT: v_readfirstlane_b32 s50, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 ; GFX9-NEXT: s_lshr_b32 s7, s26, 16 ; GFX9-NEXT: s_lshr_b32 s8, s25, 16 ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 +; GFX9-NEXT: s_lshr_b32 s10, s23, 16 +; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s73, s72, 16 ; GFX9-NEXT: s_lshr_b32 s75, s74, 16 ; GFX9-NEXT: s_lshr_b32 s76, s63, 16 @@ -40325,28 +40356,36 @@ define inreg <15 x double> @bitcast_v60i16_to_v15f64_scalar(<60 x i16> inreg %a, ; GFX9-NEXT: s_lshr_b32 s88, s59, 16 ; GFX9-NEXT: s_lshr_b32 s89, s58, 16 ; GFX9-NEXT: s_lshr_b32 s90, s57, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 -; GFX9-NEXT: s_lshr_b32 s22, s11, 16 -; GFX9-NEXT: s_lshr_b32 s23, s10, 16 -; GFX9-NEXT: v_readfirstlane_b32 s44, v16 -; GFX9-NEXT: s_cmp_lg_u32 s44, 0 +; GFX9-NEXT: s_lshr_b32 s91, s56, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 +; GFX9-NEXT: s_lshr_b32 s35, s34, 16 +; GFX9-NEXT: s_lshr_b32 s51, s50, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v16 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 +; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 +; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 ; GFX9-NEXT: s_pack_ll_b32_b16 s45, s25, s8 ; GFX9-NEXT: s_pack_ll_b32_b16 s46, s26, s7 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s10, s23 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s11, s22 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s55, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s56, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s50, s51 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s34, s35 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s55, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s90 ; GFX9-NEXT: s_pack_ll_b32_b16 s58, s58, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s59, s59, s88 @@ -40427,20 +40466,24 @@ define inreg <15 x double> @bitcast_v60i16_to_v15f64_scalar(<60 x i16> inreg %a, ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB51_5: ; %end -; GFX9-NEXT: v_readlane_b32 s65, v32, 13 -; GFX9-NEXT: v_readlane_b32 s64, v32, 12 -; GFX9-NEXT: v_readlane_b32 s55, v32, 11 -; GFX9-NEXT: v_readlane_b32 s54, v32, 10 -; GFX9-NEXT: v_readlane_b32 s53, v32, 9 -; GFX9-NEXT: v_readlane_b32 s52, v32, 8 -; GFX9-NEXT: v_readlane_b32 s51, v32, 7 -; GFX9-NEXT: v_readlane_b32 s50, v32, 6 -; GFX9-NEXT: v_readlane_b32 s49, v32, 5 -; GFX9-NEXT: v_readlane_b32 s48, v32, 4 -; GFX9-NEXT: v_readlane_b32 s39, v32, 3 -; GFX9-NEXT: v_readlane_b32 s38, v32, 2 -; GFX9-NEXT: v_readlane_b32 s37, v32, 1 -; GFX9-NEXT: v_readlane_b32 s36, v32, 0 +; GFX9-NEXT: v_readlane_b32 s30, v32, 16 +; GFX9-NEXT: v_readlane_b32 s31, v32, 17 +; GFX9-NEXT: v_readlane_b32 s65, v32, 15 +; GFX9-NEXT: v_readlane_b32 s64, v32, 14 +; GFX9-NEXT: v_readlane_b32 s55, v32, 13 +; GFX9-NEXT: v_readlane_b32 s54, v32, 12 +; GFX9-NEXT: v_readlane_b32 s53, v32, 11 +; GFX9-NEXT: v_readlane_b32 s52, v32, 10 +; GFX9-NEXT: v_readlane_b32 s51, v32, 9 +; GFX9-NEXT: v_readlane_b32 s50, v32, 8 +; GFX9-NEXT: v_readlane_b32 s49, v32, 7 +; GFX9-NEXT: v_readlane_b32 s48, v32, 6 +; GFX9-NEXT: v_readlane_b32 s39, v32, 5 +; GFX9-NEXT: v_readlane_b32 s38, v32, 4 +; GFX9-NEXT: v_readlane_b32 s37, v32, 3 +; GFX9-NEXT: v_readlane_b32 s36, v32, 2 +; GFX9-NEXT: v_readlane_b32 s35, v32, 1 +; GFX9-NEXT: v_readlane_b32 s34, v32, 0 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] @@ -40744,8 +40787,8 @@ define <60 x half> @bitcast_v15f64_to_v60f16(<15 x double> %a, i32 %b) #0 { ; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v1 ; SI-NEXT: .LBB52_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] -; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v40 ; SI-NEXT: v_or_b32_e32 v0, v0, v43 @@ -41436,67 +41479,66 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] -; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_writelane_b32 v62, s34, 0 -; SI-NEXT: v_writelane_b32 v62, s35, 1 -; SI-NEXT: v_writelane_b32 v62, s36, 2 -; SI-NEXT: v_writelane_b32 v62, s37, 3 -; SI-NEXT: v_writelane_b32 v62, s38, 4 -; SI-NEXT: v_writelane_b32 v62, s39, 5 -; SI-NEXT: v_writelane_b32 v62, s48, 6 -; SI-NEXT: v_writelane_b32 v62, s49, 7 -; SI-NEXT: v_writelane_b32 v62, s50, 8 -; SI-NEXT: v_writelane_b32 v62, s51, 9 -; SI-NEXT: v_writelane_b32 v62, s52, 10 -; SI-NEXT: v_writelane_b32 v62, s53, 11 -; SI-NEXT: v_writelane_b32 v62, s54, 12 -; SI-NEXT: v_writelane_b32 v62, s55, 13 -; SI-NEXT: v_writelane_b32 v62, s64, 14 -; SI-NEXT: v_writelane_b32 v62, s30, 15 -; SI-NEXT: v_writelane_b32 v62, s31, 16 -; SI-NEXT: v_readfirstlane_b32 s42, v16 -; SI-NEXT: v_readfirstlane_b32 s15, v15 -; SI-NEXT: v_readfirstlane_b32 s14, v14 +; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-NEXT: v_writelane_b32 v61, s34, 0 +; SI-NEXT: v_writelane_b32 v61, s35, 1 +; SI-NEXT: v_writelane_b32 v61, s36, 2 +; SI-NEXT: v_writelane_b32 v61, s37, 3 +; SI-NEXT: v_writelane_b32 v61, s38, 4 +; SI-NEXT: v_writelane_b32 v61, s39, 5 +; SI-NEXT: v_writelane_b32 v61, s48, 6 +; SI-NEXT: v_writelane_b32 v61, s49, 7 +; SI-NEXT: v_writelane_b32 v61, s50, 8 +; SI-NEXT: v_writelane_b32 v61, s51, 9 +; SI-NEXT: v_writelane_b32 v61, s52, 10 +; SI-NEXT: v_writelane_b32 v61, s53, 11 +; SI-NEXT: v_writelane_b32 v61, s54, 12 +; SI-NEXT: v_writelane_b32 v61, s55, 13 +; SI-NEXT: v_writelane_b32 v61, s64, 14 +; SI-NEXT: v_writelane_b32 v61, s30, 15 +; SI-NEXT: v_writelane_b32 v61, s31, 16 +; SI-NEXT: v_readfirstlane_b32 s4, v16 +; SI-NEXT: v_readfirstlane_b32 s43, v15 +; SI-NEXT: v_readfirstlane_b32 s42, v14 ; SI-NEXT: v_readfirstlane_b32 s41, v13 ; SI-NEXT: v_readfirstlane_b32 s40, v12 -; SI-NEXT: v_readfirstlane_b32 s13, v11 -; SI-NEXT: v_readfirstlane_b32 s12, v10 -; SI-NEXT: v_readfirstlane_b32 s11, v9 -; SI-NEXT: v_readfirstlane_b32 s10, v8 -; SI-NEXT: v_readfirstlane_b32 s9, v7 -; SI-NEXT: v_readfirstlane_b32 s8, v6 -; SI-NEXT: v_readfirstlane_b32 s7, v5 -; SI-NEXT: v_readfirstlane_b32 s6, v4 -; SI-NEXT: v_readfirstlane_b32 s5, v3 -; SI-NEXT: v_readfirstlane_b32 s4, v2 -; SI-NEXT: v_readfirstlane_b32 s43, v1 -; SI-NEXT: s_cmp_lg_u32 s42, 0 -; SI-NEXT: v_readfirstlane_b32 s42, v0 +; SI-NEXT: v_readfirstlane_b32 s15, v11 +; SI-NEXT: v_readfirstlane_b32 s14, v10 +; SI-NEXT: v_readfirstlane_b32 s13, v9 +; SI-NEXT: v_readfirstlane_b32 s12, v8 +; SI-NEXT: v_readfirstlane_b32 s11, v7 +; SI-NEXT: v_readfirstlane_b32 s10, v6 +; SI-NEXT: v_readfirstlane_b32 s9, v5 +; SI-NEXT: v_readfirstlane_b32 s8, v4 +; SI-NEXT: v_readfirstlane_b32 s7, v3 +; SI-NEXT: v_readfirstlane_b32 s6, v2 +; SI-NEXT: v_readfirstlane_b32 s5, v1 +; SI-NEXT: s_cmp_lg_u32 s4, 0 +; SI-NEXT: v_readfirstlane_b32 s4, v0 ; SI-NEXT: s_cbranch_scc0 .LBB53_3 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_lshr_b32 s64, s15, 16 +; SI-NEXT: s_lshr_b32 s64, s43, 16 ; SI-NEXT: s_lshr_b32 s55, s41, 16 -; SI-NEXT: s_lshr_b32 s54, s13, 16 -; SI-NEXT: s_lshr_b32 s53, s11, 16 -; SI-NEXT: s_lshr_b32 s52, s9, 16 -; SI-NEXT: s_lshr_b32 s51, s7, 16 -; SI-NEXT: s_lshr_b32 s50, s5, 16 -; SI-NEXT: s_lshr_b32 s49, s43, 16 +; SI-NEXT: s_lshr_b32 s54, s15, 16 +; SI-NEXT: s_lshr_b32 s53, s13, 16 +; SI-NEXT: s_lshr_b32 s52, s11, 16 +; SI-NEXT: s_lshr_b32 s51, s9, 16 +; SI-NEXT: s_lshr_b32 s50, s7, 16 +; SI-NEXT: s_lshr_b32 s49, s5, 16 ; SI-NEXT: s_lshr_b32 s48, s29, 16 ; SI-NEXT: s_lshr_b32 s39, s27, 16 ; SI-NEXT: s_lshr_b32 s38, s25, 16 @@ -41504,14 +41546,14 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; SI-NEXT: s_lshr_b32 s36, s21, 16 ; SI-NEXT: s_lshr_b32 s35, s19, 16 ; SI-NEXT: s_lshr_b32 s34, s17, 16 -; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16 -; SI-NEXT: s_lshr_b64 s[44:45], s[40:41], 16 -; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 16 -; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 16 -; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 16 -; SI-NEXT: s_lshr_b64 s[74:75], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[44:45], s[42:43], 16 +; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[56:57], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[58:59], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[60:61], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16 +; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16 +; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16 ; SI-NEXT: s_lshr_b64 s[76:77], s[28:29], 16 ; SI-NEXT: s_lshr_b64 s[78:79], s[26:27], 16 ; SI-NEXT: s_lshr_b64 s[88:89], s[24:25], 16 @@ -41521,25 +41563,25 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16 ; SI-NEXT: s_cbranch_execnz .LBB53_4 ; SI-NEXT: .LBB53_2: ; %cmp.true -; SI-NEXT: v_add_f64 v[28:29], s[14:15], 1.0 +; SI-NEXT: v_add_f64 v[28:29], s[42:43], 1.0 ; SI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 -; SI-NEXT: v_add_f64 v[24:25], s[12:13], 1.0 +; SI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 ; SI-NEXT: v_lshr_b64 v[30:31], v[28:29], 16 -; SI-NEXT: v_add_f64 v[22:23], s[10:11], 1.0 +; SI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 ; SI-NEXT: v_add_f64 v[10:11], s[26:27], 1.0 ; SI-NEXT: v_lshr_b64 v[31:32], v[26:27], 16 -; SI-NEXT: v_add_f64 v[20:21], s[8:9], 1.0 +; SI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 ; SI-NEXT: v_add_f64 v[8:9], s[24:25], 1.0 ; SI-NEXT: v_lshr_b64 v[32:33], v[24:25], 16 -; SI-NEXT: v_add_f64 v[18:19], s[6:7], 1.0 +; SI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; SI-NEXT: v_add_f64 v[6:7], s[22:23], 1.0 ; SI-NEXT: v_lshr_b64 v[33:34], v[22:23], 16 ; SI-NEXT: v_lshr_b64 v[48:49], v[10:11], 16 -; SI-NEXT: v_add_f64 v[16:17], s[4:5], 1.0 +; SI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; SI-NEXT: v_add_f64 v[4:5], s[20:21], 1.0 ; SI-NEXT: v_lshr_b64 v[34:35], v[20:21], 16 ; SI-NEXT: v_lshr_b64 v[49:50], v[8:9], 16 -; SI-NEXT: v_add_f64 v[14:15], s[42:43], 1.0 +; SI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; SI-NEXT: v_add_f64 v[2:3], s[18:19], 1.0 ; SI-NEXT: v_lshr_b64 v[35:36], v[18:19], 16 ; SI-NEXT: v_lshr_b64 v[50:51], v[6:7], 16 @@ -41558,21 +41600,21 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v21 ; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v15 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v15 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v13 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v11 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v9 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v7 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v5 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v1 ; SI-NEXT: s_branch .LBB53_5 ; SI-NEXT: .LBB53_3: ; SI-NEXT: ; implicit-def: $sgpr30 @@ -41601,42 +41643,42 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; SI-NEXT: ; implicit-def: $sgpr53 ; SI-NEXT: ; implicit-def: $sgpr56 ; SI-NEXT: ; implicit-def: $sgpr54 -; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: ; implicit-def: $sgpr55 +; SI-NEXT: ; implicit-def: $sgpr44 ; SI-NEXT: ; implicit-def: $sgpr64 -; SI-NEXT: ; implicit-def: $sgpr46 ; SI-NEXT: s_branch .LBB53_2 ; SI-NEXT: .LBB53_4: +; SI-NEXT: v_mov_b32_e32 v29, s43 +; SI-NEXT: v_mov_b32_e32 v27, s41 +; SI-NEXT: v_mov_b32_e32 v25, s15 +; SI-NEXT: v_mov_b32_e32 v23, s13 +; SI-NEXT: v_mov_b32_e32 v21, s11 +; SI-NEXT: v_mov_b32_e32 v19, s9 +; SI-NEXT: v_mov_b32_e32 v17, s7 +; SI-NEXT: v_mov_b32_e32 v15, s5 +; SI-NEXT: v_mov_b32_e32 v13, s29 +; SI-NEXT: v_mov_b32_e32 v11, s27 +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v7, s23 +; SI-NEXT: v_mov_b32_e32 v5, s21 +; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v1, s17 ; SI-NEXT: v_mov_b32_e32 v0, s16 -; SI-NEXT: v_mov_b32_e32 v3, s19 ; SI-NEXT: v_mov_b32_e32 v2, s18 -; SI-NEXT: v_mov_b32_e32 v5, s21 ; SI-NEXT: v_mov_b32_e32 v4, s20 -; SI-NEXT: v_mov_b32_e32 v7, s23 ; SI-NEXT: v_mov_b32_e32 v6, s22 -; SI-NEXT: v_mov_b32_e32 v9, s25 ; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v11, s27 ; SI-NEXT: v_mov_b32_e32 v10, s26 -; SI-NEXT: v_mov_b32_e32 v13, s29 ; SI-NEXT: v_mov_b32_e32 v12, s28 -; SI-NEXT: v_mov_b32_e32 v15, s43 -; SI-NEXT: v_mov_b32_e32 v14, s42 -; SI-NEXT: v_mov_b32_e32 v27, s41 -; SI-NEXT: v_mov_b32_e32 v25, s13 -; SI-NEXT: v_mov_b32_e32 v23, s11 -; SI-NEXT: v_mov_b32_e32 v21, s9 -; SI-NEXT: v_mov_b32_e32 v19, s7 -; SI-NEXT: v_mov_b32_e32 v17, s5 -; SI-NEXT: v_mov_b32_e32 v16, s4 -; SI-NEXT: v_mov_b32_e32 v18, s6 -; SI-NEXT: v_mov_b32_e32 v20, s8 -; SI-NEXT: v_mov_b32_e32 v22, s10 -; SI-NEXT: v_mov_b32_e32 v24, s12 +; SI-NEXT: v_mov_b32_e32 v14, s4 +; SI-NEXT: v_mov_b32_e32 v16, s6 +; SI-NEXT: v_mov_b32_e32 v18, s8 +; SI-NEXT: v_mov_b32_e32 v20, s10 +; SI-NEXT: v_mov_b32_e32 v22, s12 +; SI-NEXT: v_mov_b32_e32 v24, s14 ; SI-NEXT: v_mov_b32_e32 v26, s40 -; SI-NEXT: v_mov_b32_e32 v29, s15 -; SI-NEXT: v_mov_b32_e32 v28, s14 +; SI-NEXT: v_mov_b32_e32 v28, s42 ; SI-NEXT: v_mov_b32_e32 v55, s64 ; SI-NEXT: v_mov_b32_e32 v40, s55 ; SI-NEXT: v_mov_b32_e32 v41, s54 @@ -41644,21 +41686,21 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v43, s52 ; SI-NEXT: v_mov_b32_e32 v44, s51 ; SI-NEXT: v_mov_b32_e32 v45, s50 -; SI-NEXT: v_mov_b32_e32 v46, s49 ; SI-NEXT: s_waitcnt expcnt(6) -; SI-NEXT: v_mov_b32_e32 v47, s48 +; SI-NEXT: v_mov_b32_e32 v46, s49 ; SI-NEXT: s_waitcnt expcnt(5) -; SI-NEXT: v_mov_b32_e32 v56, s39 +; SI-NEXT: v_mov_b32_e32 v47, s48 ; SI-NEXT: s_waitcnt expcnt(4) -; SI-NEXT: v_mov_b32_e32 v57, s38 +; SI-NEXT: v_mov_b32_e32 v56, s39 ; SI-NEXT: s_waitcnt expcnt(3) -; SI-NEXT: v_mov_b32_e32 v58, s37 +; SI-NEXT: v_mov_b32_e32 v57, s38 ; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_mov_b32_e32 v59, s36 +; SI-NEXT: v_mov_b32_e32 v58, s37 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_mov_b32_e32 v60, s35 +; SI-NEXT: v_mov_b32_e32 v59, s36 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v61, s34 +; SI-NEXT: v_mov_b32_e32 v60, s35 +; SI-NEXT: v_mov_b32_e32 v39, s34 ; SI-NEXT: v_mov_b32_e32 v53, s30 ; SI-NEXT: v_mov_b32_e32 v52, s94 ; SI-NEXT: v_mov_b32_e32 v51, s92 @@ -41672,41 +41714,38 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; SI-NEXT: v_mov_b32_e32 v34, s60 ; SI-NEXT: v_mov_b32_e32 v33, s58 ; SI-NEXT: v_mov_b32_e32 v32, s56 -; SI-NEXT: v_mov_b32_e32 v31, s44 -; SI-NEXT: v_mov_b32_e32 v30, s46 +; SI-NEXT: v_mov_b32_e32 v31, s46 +; SI-NEXT: v_mov_b32_e32 v30, s44 ; SI-NEXT: .LBB53_5: ; %end -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v53 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_or_b32_e32 v0, v0, v39 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 ; SI-NEXT: v_or_b32_e32 v1, v1, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v52 ; SI-NEXT: v_or_b32_e32 v2, v2, v39 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60 ; SI-NEXT: v_or_b32_e32 v3, v3, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v51 ; SI-NEXT: v_or_b32_e32 v4, v4, v39 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59 ; SI-NEXT: v_or_b32_e32 v5, v5, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v50 ; SI-NEXT: v_or_b32_e32 v6, v6, v39 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58 ; SI-NEXT: v_or_b32_e32 v7, v7, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v49 ; SI-NEXT: v_or_b32_e32 v8, v8, v39 ; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v57 ; SI-NEXT: v_or_b32_e32 v9, v9, v39 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v48 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 @@ -41741,22 +41780,23 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v41 ; SI-NEXT: v_or_b32_e32 v26, v26, v31 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v40 -; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v53 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 @@ -41769,7 +41809,8 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; SI-NEXT: v_or_b32_e32 v28, v28, v30 ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v55 -; SI-NEXT: v_readlane_b32 s30, v62, 15 +; SI-NEXT: v_readlane_b32 s30, v61, 15 +; SI-NEXT: v_or_b32_e32 v0, v0, v53 ; SI-NEXT: v_or_b32_e32 v11, v11, v39 ; SI-NEXT: v_or_b32_e32 v13, v13, v38 ; SI-NEXT: v_or_b32_e32 v15, v15, v37 @@ -41780,24 +41821,24 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; SI-NEXT: v_or_b32_e32 v25, v25, v32 ; SI-NEXT: v_or_b32_e32 v27, v27, v31 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 -; SI-NEXT: v_readlane_b32 s31, v62, 16 -; SI-NEXT: v_readlane_b32 s64, v62, 14 -; SI-NEXT: v_readlane_b32 s55, v62, 13 -; SI-NEXT: v_readlane_b32 s54, v62, 12 -; SI-NEXT: v_readlane_b32 s53, v62, 11 -; SI-NEXT: v_readlane_b32 s52, v62, 10 -; SI-NEXT: v_readlane_b32 s51, v62, 9 -; SI-NEXT: v_readlane_b32 s50, v62, 8 -; SI-NEXT: v_readlane_b32 s49, v62, 7 -; SI-NEXT: v_readlane_b32 s48, v62, 6 -; SI-NEXT: v_readlane_b32 s39, v62, 5 -; SI-NEXT: v_readlane_b32 s38, v62, 4 -; SI-NEXT: v_readlane_b32 s37, v62, 3 -; SI-NEXT: v_readlane_b32 s36, v62, 2 -; SI-NEXT: v_readlane_b32 s35, v62, 1 -; SI-NEXT: v_readlane_b32 s34, v62, 0 +; SI-NEXT: v_readlane_b32 s31, v61, 16 +; SI-NEXT: v_readlane_b32 s64, v61, 14 +; SI-NEXT: v_readlane_b32 s55, v61, 13 +; SI-NEXT: v_readlane_b32 s54, v61, 12 +; SI-NEXT: v_readlane_b32 s53, v61, 11 +; SI-NEXT: v_readlane_b32 s52, v61, 10 +; SI-NEXT: v_readlane_b32 s51, v61, 9 +; SI-NEXT: v_readlane_b32 s50, v61, 8 +; SI-NEXT: v_readlane_b32 s49, v61, 7 +; SI-NEXT: v_readlane_b32 s48, v61, 6 +; SI-NEXT: v_readlane_b32 s39, v61, 5 +; SI-NEXT: v_readlane_b32 s38, v61, 4 +; SI-NEXT: v_readlane_b32 s37, v61, 3 +; SI-NEXT: v_readlane_b32 s36, v61, 2 +; SI-NEXT: v_readlane_b32 s35, v61, 1 +; SI-NEXT: v_readlane_b32 s34, v61, 0 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] @@ -41829,18 +41870,18 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; VI-NEXT: v_writelane_b32 v60, s30, 6 ; VI-NEXT: v_writelane_b32 v60, s31, 7 ; VI-NEXT: v_readfirstlane_b32 s4, v16 -; VI-NEXT: v_readfirstlane_b32 s9, v15 -; VI-NEXT: v_readfirstlane_b32 s8, v14 -; VI-NEXT: v_readfirstlane_b32 s11, v13 -; VI-NEXT: v_readfirstlane_b32 s10, v12 -; VI-NEXT: v_readfirstlane_b32 s13, v11 -; VI-NEXT: v_readfirstlane_b32 s12, v10 -; VI-NEXT: v_readfirstlane_b32 s15, v9 -; VI-NEXT: v_readfirstlane_b32 s14, v8 -; VI-NEXT: v_readfirstlane_b32 s41, v7 -; VI-NEXT: v_readfirstlane_b32 s40, v6 -; VI-NEXT: v_readfirstlane_b32 s43, v5 -; VI-NEXT: v_readfirstlane_b32 s42, v4 +; VI-NEXT: v_readfirstlane_b32 s43, v15 +; VI-NEXT: v_readfirstlane_b32 s42, v14 +; VI-NEXT: v_readfirstlane_b32 s41, v13 +; VI-NEXT: v_readfirstlane_b32 s40, v12 +; VI-NEXT: v_readfirstlane_b32 s15, v11 +; VI-NEXT: v_readfirstlane_b32 s14, v10 +; VI-NEXT: v_readfirstlane_b32 s13, v9 +; VI-NEXT: v_readfirstlane_b32 s12, v8 +; VI-NEXT: v_readfirstlane_b32 s11, v7 +; VI-NEXT: v_readfirstlane_b32 s10, v6 +; VI-NEXT: v_readfirstlane_b32 s9, v5 +; VI-NEXT: v_readfirstlane_b32 s8, v4 ; VI-NEXT: v_readfirstlane_b32 s7, v3 ; VI-NEXT: v_readfirstlane_b32 s6, v2 ; VI-NEXT: v_readfirstlane_b32 s5, v1 @@ -41848,18 +41889,18 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; VI-NEXT: v_readfirstlane_b32 s4, v0 ; VI-NEXT: s_cbranch_scc0 .LBB53_3 ; VI-NEXT: ; %bb.1: ; %cmp.false -; VI-NEXT: s_lshr_b32 s46, s9, 16 -; VI-NEXT: s_lshr_b32 s77, s8, 16 -; VI-NEXT: s_lshr_b32 s47, s11, 16 -; VI-NEXT: s_lshr_b32 s78, s10, 16 -; VI-NEXT: s_lshr_b32 s56, s13, 16 -; VI-NEXT: s_lshr_b32 s79, s12, 16 -; VI-NEXT: s_lshr_b32 s57, s15, 16 -; VI-NEXT: s_lshr_b32 s88, s14, 16 -; VI-NEXT: s_lshr_b32 s58, s41, 16 -; VI-NEXT: s_lshr_b32 s89, s40, 16 -; VI-NEXT: s_lshr_b32 s59, s43, 16 -; VI-NEXT: s_lshr_b32 s90, s42, 16 +; VI-NEXT: s_lshr_b32 s46, s43, 16 +; VI-NEXT: s_lshr_b32 s77, s42, 16 +; VI-NEXT: s_lshr_b32 s47, s41, 16 +; VI-NEXT: s_lshr_b32 s78, s40, 16 +; VI-NEXT: s_lshr_b32 s56, s15, 16 +; VI-NEXT: s_lshr_b32 s79, s14, 16 +; VI-NEXT: s_lshr_b32 s57, s13, 16 +; VI-NEXT: s_lshr_b32 s88, s12, 16 +; VI-NEXT: s_lshr_b32 s58, s11, 16 +; VI-NEXT: s_lshr_b32 s89, s10, 16 +; VI-NEXT: s_lshr_b32 s59, s9, 16 +; VI-NEXT: s_lshr_b32 s90, s8, 16 ; VI-NEXT: s_lshr_b32 s60, s7, 16 ; VI-NEXT: s_lshr_b32 s91, s6, 16 ; VI-NEXT: s_lshr_b32 s61, s5, 16 @@ -41880,12 +41921,12 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; VI-NEXT: s_lshr_b32 s39, s16, 16 ; VI-NEXT: s_cbranch_execnz .LBB53_4 ; VI-NEXT: .LBB53_2: ; %cmp.true -; VI-NEXT: v_add_f64 v[28:29], s[8:9], 1.0 -; VI-NEXT: v_add_f64 v[26:27], s[10:11], 1.0 -; VI-NEXT: v_add_f64 v[24:25], s[12:13], 1.0 -; VI-NEXT: v_add_f64 v[22:23], s[14:15], 1.0 -; VI-NEXT: v_add_f64 v[20:21], s[40:41], 1.0 -; VI-NEXT: v_add_f64 v[18:19], s[42:43], 1.0 +; VI-NEXT: v_add_f64 v[28:29], s[42:43], 1.0 +; VI-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 +; VI-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 +; VI-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 +; VI-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; VI-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; VI-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; VI-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; VI-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -41968,7 +42009,12 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; VI-NEXT: v_mov_b32_e32 v12, s28 ; VI-NEXT: v_mov_b32_e32 v14, s4 ; VI-NEXT: v_mov_b32_e32 v16, s6 -; VI-NEXT: v_mov_b32_e32 v18, s42 +; VI-NEXT: v_mov_b32_e32 v18, s8 +; VI-NEXT: v_mov_b32_e32 v20, s10 +; VI-NEXT: v_mov_b32_e32 v22, s12 +; VI-NEXT: v_mov_b32_e32 v24, s14 +; VI-NEXT: v_mov_b32_e32 v26, s40 +; VI-NEXT: v_mov_b32_e32 v28, s42 ; VI-NEXT: v_mov_b32_e32 v1, s17 ; VI-NEXT: v_mov_b32_e32 v3, s19 ; VI-NEXT: v_mov_b32_e32 v5, s21 @@ -41978,17 +42024,12 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; VI-NEXT: v_mov_b32_e32 v13, s29 ; VI-NEXT: v_mov_b32_e32 v15, s5 ; VI-NEXT: v_mov_b32_e32 v17, s7 -; VI-NEXT: v_mov_b32_e32 v19, s43 -; VI-NEXT: v_mov_b32_e32 v20, s40 -; VI-NEXT: v_mov_b32_e32 v21, s41 -; VI-NEXT: v_mov_b32_e32 v22, s14 -; VI-NEXT: v_mov_b32_e32 v23, s15 -; VI-NEXT: v_mov_b32_e32 v24, s12 -; VI-NEXT: v_mov_b32_e32 v25, s13 -; VI-NEXT: v_mov_b32_e32 v26, s10 -; VI-NEXT: v_mov_b32_e32 v27, s11 -; VI-NEXT: v_mov_b32_e32 v28, s8 -; VI-NEXT: v_mov_b32_e32 v29, s9 +; VI-NEXT: v_mov_b32_e32 v19, s9 +; VI-NEXT: v_mov_b32_e32 v21, s11 +; VI-NEXT: v_mov_b32_e32 v23, s13 +; VI-NEXT: v_mov_b32_e32 v25, s15 +; VI-NEXT: v_mov_b32_e32 v27, s41 +; VI-NEXT: v_mov_b32_e32 v29, s43 ; VI-NEXT: v_mov_b32_e32 v56, s39 ; VI-NEXT: v_mov_b32_e32 v46, s38 ; VI-NEXT: v_mov_b32_e32 v44, s37 @@ -42129,18 +42170,18 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; GFX9-NEXT: v_writelane_b32 v60, s30, 2 ; GFX9-NEXT: v_writelane_b32 v60, s31, 3 ; GFX9-NEXT: v_readfirstlane_b32 s4, v16 -; GFX9-NEXT: v_readfirstlane_b32 s9, v15 -; GFX9-NEXT: v_readfirstlane_b32 s8, v14 -; GFX9-NEXT: v_readfirstlane_b32 s11, v13 -; GFX9-NEXT: v_readfirstlane_b32 s10, v12 -; GFX9-NEXT: v_readfirstlane_b32 s13, v11 -; GFX9-NEXT: v_readfirstlane_b32 s12, v10 -; GFX9-NEXT: v_readfirstlane_b32 s15, v9 -; GFX9-NEXT: v_readfirstlane_b32 s14, v8 -; GFX9-NEXT: v_readfirstlane_b32 s41, v7 -; GFX9-NEXT: v_readfirstlane_b32 s40, v6 -; GFX9-NEXT: v_readfirstlane_b32 s43, v5 -; GFX9-NEXT: v_readfirstlane_b32 s42, v4 +; GFX9-NEXT: v_readfirstlane_b32 s43, v15 +; GFX9-NEXT: v_readfirstlane_b32 s42, v14 +; GFX9-NEXT: v_readfirstlane_b32 s41, v13 +; GFX9-NEXT: v_readfirstlane_b32 s40, v12 +; GFX9-NEXT: v_readfirstlane_b32 s15, v11 +; GFX9-NEXT: v_readfirstlane_b32 s14, v10 +; GFX9-NEXT: v_readfirstlane_b32 s13, v9 +; GFX9-NEXT: v_readfirstlane_b32 s12, v8 +; GFX9-NEXT: v_readfirstlane_b32 s11, v7 +; GFX9-NEXT: v_readfirstlane_b32 s10, v6 +; GFX9-NEXT: v_readfirstlane_b32 s9, v5 +; GFX9-NEXT: v_readfirstlane_b32 s8, v4 ; GFX9-NEXT: v_readfirstlane_b32 s7, v3 ; GFX9-NEXT: v_readfirstlane_b32 s6, v2 ; GFX9-NEXT: v_readfirstlane_b32 s5, v1 @@ -42148,18 +42189,18 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; GFX9-NEXT: v_readfirstlane_b32 s4, v0 ; GFX9-NEXT: s_cbranch_scc0 .LBB53_3 ; GFX9-NEXT: ; %bb.1: ; %cmp.false -; GFX9-NEXT: s_lshr_b32 s46, s9, 16 -; GFX9-NEXT: s_lshr_b32 s77, s8, 16 -; GFX9-NEXT: s_lshr_b32 s47, s11, 16 -; GFX9-NEXT: s_lshr_b32 s78, s10, 16 -; GFX9-NEXT: s_lshr_b32 s56, s13, 16 -; GFX9-NEXT: s_lshr_b32 s79, s12, 16 -; GFX9-NEXT: s_lshr_b32 s57, s15, 16 -; GFX9-NEXT: s_lshr_b32 s88, s14, 16 -; GFX9-NEXT: s_lshr_b32 s58, s41, 16 -; GFX9-NEXT: s_lshr_b32 s89, s40, 16 -; GFX9-NEXT: s_lshr_b32 s59, s43, 16 -; GFX9-NEXT: s_lshr_b32 s90, s42, 16 +; GFX9-NEXT: s_lshr_b32 s46, s43, 16 +; GFX9-NEXT: s_lshr_b32 s77, s42, 16 +; GFX9-NEXT: s_lshr_b32 s47, s41, 16 +; GFX9-NEXT: s_lshr_b32 s78, s40, 16 +; GFX9-NEXT: s_lshr_b32 s56, s15, 16 +; GFX9-NEXT: s_lshr_b32 s79, s14, 16 +; GFX9-NEXT: s_lshr_b32 s57, s13, 16 +; GFX9-NEXT: s_lshr_b32 s88, s12, 16 +; GFX9-NEXT: s_lshr_b32 s58, s11, 16 +; GFX9-NEXT: s_lshr_b32 s89, s10, 16 +; GFX9-NEXT: s_lshr_b32 s59, s9, 16 +; GFX9-NEXT: s_lshr_b32 s90, s8, 16 ; GFX9-NEXT: s_lshr_b32 s60, s7, 16 ; GFX9-NEXT: s_lshr_b32 s91, s6, 16 ; GFX9-NEXT: s_lshr_b32 s61, s5, 16 @@ -42180,12 +42221,12 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; GFX9-NEXT: s_lshr_b32 s35, s16, 16 ; GFX9-NEXT: s_cbranch_execnz .LBB53_4 ; GFX9-NEXT: .LBB53_2: ; %cmp.true -; GFX9-NEXT: v_add_f64 v[28:29], s[8:9], 1.0 -; GFX9-NEXT: v_add_f64 v[26:27], s[10:11], 1.0 -; GFX9-NEXT: v_add_f64 v[24:25], s[12:13], 1.0 -; GFX9-NEXT: v_add_f64 v[22:23], s[14:15], 1.0 -; GFX9-NEXT: v_add_f64 v[20:21], s[40:41], 1.0 -; GFX9-NEXT: v_add_f64 v[18:19], s[42:43], 1.0 +; GFX9-NEXT: v_add_f64 v[28:29], s[42:43], 1.0 +; GFX9-NEXT: v_add_f64 v[26:27], s[40:41], 1.0 +; GFX9-NEXT: v_add_f64 v[24:25], s[14:15], 1.0 +; GFX9-NEXT: v_add_f64 v[22:23], s[12:13], 1.0 +; GFX9-NEXT: v_add_f64 v[20:21], s[10:11], 1.0 +; GFX9-NEXT: v_add_f64 v[18:19], s[8:9], 1.0 ; GFX9-NEXT: v_add_f64 v[16:17], s[6:7], 1.0 ; GFX9-NEXT: v_add_f64 v[14:15], s[4:5], 1.0 ; GFX9-NEXT: v_add_f64 v[12:13], s[28:29], 1.0 @@ -42268,7 +42309,12 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v12, s28 ; GFX9-NEXT: v_mov_b32_e32 v14, s4 ; GFX9-NEXT: v_mov_b32_e32 v16, s6 -; GFX9-NEXT: v_mov_b32_e32 v18, s42 +; GFX9-NEXT: v_mov_b32_e32 v18, s8 +; GFX9-NEXT: v_mov_b32_e32 v20, s10 +; GFX9-NEXT: v_mov_b32_e32 v22, s12 +; GFX9-NEXT: v_mov_b32_e32 v24, s14 +; GFX9-NEXT: v_mov_b32_e32 v26, s40 +; GFX9-NEXT: v_mov_b32_e32 v28, s42 ; GFX9-NEXT: v_mov_b32_e32 v1, s17 ; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: v_mov_b32_e32 v5, s21 @@ -42278,17 +42324,12 @@ define inreg <60 x half> @bitcast_v15f64_to_v60f16_scalar(<15 x double> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v13, s29 ; GFX9-NEXT: v_mov_b32_e32 v15, s5 ; GFX9-NEXT: v_mov_b32_e32 v17, s7 -; GFX9-NEXT: v_mov_b32_e32 v19, s43 -; GFX9-NEXT: v_mov_b32_e32 v20, s40 -; GFX9-NEXT: v_mov_b32_e32 v21, s41 -; GFX9-NEXT: v_mov_b32_e32 v22, s14 -; GFX9-NEXT: v_mov_b32_e32 v23, s15 -; GFX9-NEXT: v_mov_b32_e32 v24, s12 -; GFX9-NEXT: v_mov_b32_e32 v25, s13 -; GFX9-NEXT: v_mov_b32_e32 v26, s10 -; GFX9-NEXT: v_mov_b32_e32 v27, s11 -; GFX9-NEXT: v_mov_b32_e32 v28, s8 -; GFX9-NEXT: v_mov_b32_e32 v29, s9 +; GFX9-NEXT: v_mov_b32_e32 v19, s9 +; GFX9-NEXT: v_mov_b32_e32 v21, s11 +; GFX9-NEXT: v_mov_b32_e32 v23, s13 +; GFX9-NEXT: v_mov_b32_e32 v25, s15 +; GFX9-NEXT: v_mov_b32_e32 v27, s41 +; GFX9-NEXT: v_mov_b32_e32 v29, s43 ; GFX9-NEXT: v_mov_b32_e32 v56, s35 ; GFX9-NEXT: v_mov_b32_e32 v46, s34 ; GFX9-NEXT: v_mov_b32_e32 v44, s31 @@ -42942,17 +42983,17 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41 -; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v42 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v42 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v43 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v44 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v45 ; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v46 -; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v47 +; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v47 ; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v56 -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v57 ; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v58 -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v59 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v60 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v59 +; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v60 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30 ; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v61 ; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill @@ -42973,24 +43014,24 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v61 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v49 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v60 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_or_b32_e32 v1, v2, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v63 +; SI-NEXT: v_or_b32_e32 v1, v1, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v59 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v34 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v48 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v58 ; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v39 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v57 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v62 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v33 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 ; SI-NEXT: v_and_b32_e32 v5, 0xffff, v56 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v38 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v33 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v62 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v46 ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v37 @@ -43005,7 +43046,7 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v35 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v42 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v63 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v34 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v41 ; SI-NEXT: ; implicit-def: $vgpr61 @@ -43022,17 +43063,17 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: ; implicit-def: $vgpr39 -; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr38 ; SI-NEXT: ; implicit-def: $vgpr33 +; SI-NEXT: ; implicit-def: $vgpr38 +; SI-NEXT: ; implicit-def: $vgpr62 ; SI-NEXT: ; implicit-def: $vgpr37 ; SI-NEXT: ; implicit-def: $vgpr36 ; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr63 +; SI-NEXT: ; implicit-def: $vgpr34 ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload @@ -43200,202 +43241,201 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 { ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v0, v49 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v48 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v61 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v63 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v60 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 -; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_or_b32_e32 v1, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v2, v34 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v59 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v58 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v57 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; SI-NEXT: v_or_b32_e32 v0, v1, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v1, v48 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v5, v58 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v2, v59 +; SI-NEXT: v_or_b32_e32 v1, v3, v1 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v39 +; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_cvt_f32_f16_e32 v3, v39 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v56 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v47 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 +; SI-NEXT: v_or_b32_e32 v2, v2, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4 +; SI-NEXT: v_or_b32_e32 v3, v5, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v4, v57 +; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_or_b32_e32 v3, v4, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v4, v62 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v56 +; SI-NEXT: v_or_b32_e32 v4, v4, v5 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v6 +; SI-NEXT: v_cvt_f32_f16_e32 v6, v62 +; SI-NEXT: v_cvt_f32_f16_e32 v8, v47 ; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 +; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 +; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 +; SI-NEXT: v_or_b32_e32 v5, v7, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v7, v37 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_or_b32_e32 v6, v8, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v46 -; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 -; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v45 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v36 +; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 +; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v5, v38 +; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v45 +; SI-NEXT: v_or_b32_e32 v7, v8, v7 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 +; SI-NEXT: v_cvt_f32_f16_e32 v11, v44 +; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 +; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v44 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 +; SI-NEXT: v_or_b32_e32 v8, v10, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v10, v35 +; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: v_or_b32_e32 v9, v11, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v43 +; SI-NEXT: v_cvt_f32_f16_e32 v12, v34 ; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; SI-NEXT: v_or_b32_e32 v5, v6, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v6, v33 ; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_cvt_f32_f16_e32 v12, v42 -; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6 -; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v13, v41 ; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_cvt_f32_f16_e32 v7, v37 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: v_cvt_f32_f16_e32 v13, v42 +; SI-NEXT: v_or_b32_e32 v10, v11, v10 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_cvt_f32_f16_e32 v14, v40 -; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v15, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v41 +; SI-NEXT: v_cvt_f32_f16_e32 v16, v55 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v54 +; SI-NEXT: v_or_b32_e32 v11, v13, v11 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; SI-NEXT: v_or_b32_e32 v7, v8, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v8, v36 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_cvt_f32_f16_e32 v16, v54 -; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8 -; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v17, v53 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v9, v32 ; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 ; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v52 -; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f32_f16_e32 v20, v51 -; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 -; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 -; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; SI-NEXT: v_or_b32_e32 v9, v10, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v10, v35 -; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 -; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10 -; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: v_add_f32_e32 v19, 0x38000000, v19 +; SI-NEXT: v_cvt_f16_f32_e32 v19, v19 +; SI-NEXT: v_add_f32_e32 v20, 0x38000000, v20 +; SI-NEXT: v_cvt_f16_f32_e32 v20, v20 ; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_cvt_f32_f16_e32 v11, v63 -; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 -; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; SI-NEXT: v_or_b32_e32 v11, v12, v11 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 +; SI-NEXT: s_waitcnt vmcnt(13) +; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 +; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 +; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: s_waitcnt vmcnt(12) +; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_or_b32_e32 v12, v14, v12 +; SI-NEXT: v_cvt_f32_f16_e32 v14, v40 +; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 +; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 +; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 +; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_cvt_f32_f16_e32 v23, v23 -; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 ; SI-NEXT: s_waitcnt vmcnt(9) -; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 -; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 -; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v21 +; SI-NEXT: v_or_b32_e32 v13, v14, v13 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v15 +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload +; SI-NEXT: v_or_b32_e32 v14, v16, v14 +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(7) +; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 ; SI-NEXT: v_add_f32_e32 v21, 0x38000000, v21 ; SI-NEXT: v_cvt_f16_f32_e32 v21, v21 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_cvt_f32_f16_e32 v18, v18 -; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 -; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 +; SI-NEXT: v_add_f32_e32 v23, 0x38000000, v23 ; SI-NEXT: v_add_f32_e32 v18, 0x38000000, v18 ; SI-NEXT: v_cvt_f16_f32_e32 v18, v18 +; SI-NEXT: v_cvt_f16_f32_e32 v23, v23 +; SI-NEXT: v_cvt_f32_f16_e32 v24, v24 +; SI-NEXT: s_waitcnt vmcnt(5) +; SI-NEXT: v_cvt_f32_f16_e32 v26, v26 ; SI-NEXT: v_cvt_f32_f16_e32 v27, v27 +; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 +; SI-NEXT: v_add_f32_e32 v24, 0x38000000, v24 +; SI-NEXT: v_cvt_f16_f32_e32 v24, v24 ; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v26 ; SI-NEXT: v_cvt_f16_f32_e32 v26, v26 -; SI-NEXT: v_cvt_f32_f16_e32 v29, v29 ; SI-NEXT: v_add_f32_e32 v27, 0x38000000, v27 ; SI-NEXT: v_cvt_f16_f32_e32 v27, v27 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_cvt_f32_f16_e32 v30, v30 ; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v29 ; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 -; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: s_waitcnt vmcnt(3) +; SI-NEXT: v_cvt_f32_f16_e32 v30, v30 +; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_cvt_f32_f16_e32 v31, v31 ; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30 ; SI-NEXT: v_cvt_f16_f32_e32 v30, v30 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v12, v12 ; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 ; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 -; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12 -; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13 -; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_or_b32_e32 v13, v14, v13 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v14, v14 -; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cvt_f32_f16_e32 v15, v15 -; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 -; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; SI-NEXT: v_or_b32_e32 v15, v16, v15 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_cvt_f32_f16_e32 v16, v16 +; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15 +; SI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16 ; SI-NEXT: v_cvt_f16_f32_e32 v16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; SI-NEXT: v_or_b32_e32 v15, v17, v15 +; SI-NEXT: v_cvt_f32_f16_e32 v17, v53 ; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_add_f32_e32 v17, 0x38000000, v17 +; SI-NEXT: v_cvt_f16_f32_e32 v17, v17 ; SI-NEXT: v_or_b32_e32 v16, v17, v16 ; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v18 ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload @@ -43662,10 +43702,10 @@ define <15 x double> @bitcast_v60f16_to_v15f64(<60 x half> %a, i32 %b) #0 { ; VI-NEXT: v_mov_b32_e32 v29, 0x200 ; VI-NEXT: v_add_f16_sdwa v0, v61, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, 0x200, v61 -; VI-NEXT: v_add_f16_sdwa v2, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, 0x200, v60 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_add_f16_sdwa v1, v60, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, 0x200, v60 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_add_f16_sdwa v2, v59, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, 0x200, v59 ; VI-NEXT: v_or_b32_e32 v2, v3, v2 @@ -44426,17 +44466,17 @@ define inreg <15 x double> @bitcast_v60f16_to_v15f64_scalar(<60 x half> inreg %a ; SI-NEXT: s_and_b32 s4, s16, 0xffff ; SI-NEXT: s_lshl_b32 s5, s99, 16 ; SI-NEXT: s_or_b32 s36, s4, s5 +; SI-NEXT: s_and_b32 s4, s17, 0xffff +; SI-NEXT: s_lshl_b32 s5, s98, 16 +; SI-NEXT: s_or_b32 s37, s4, s5 ; SI-NEXT: s_and_b32 s4, s18, 0xffff ; SI-NEXT: s_lshl_b32 s5, s97, 16 ; SI-NEXT: s_or_b32 s38, s4, s5 ; SI-NEXT: s_and_b32 s4, s19, 0xffff ; SI-NEXT: s_lshl_b32 s5, s96, 16 -; SI-NEXT: s_and_b32 s40, s17, 0xffff -; SI-NEXT: s_lshl_b32 s41, s98, 16 ; SI-NEXT: s_or_b32 s39, s4, s5 ; SI-NEXT: s_and_b32 s4, s20, 0xffff ; SI-NEXT: s_lshl_b32 s5, s87, 16 -; SI-NEXT: s_or_b32 s37, s40, s41 ; SI-NEXT: s_or_b32 s40, s4, s5 ; SI-NEXT: s_and_b32 s4, s21, 0xffff ; SI-NEXT: s_lshl_b32 s5, s86, 16 @@ -44936,17 +44976,17 @@ define inreg <15 x double> @bitcast_v60f16_to_v15f64_scalar(<60 x half> inreg %a ; VI-NEXT: s_and_b32 s4, 0xffff, s16 ; VI-NEXT: s_lshl_b32 s5, s77, 16 ; VI-NEXT: s_or_b32 s36, s4, s5 +; VI-NEXT: s_and_b32 s4, 0xffff, s17 +; VI-NEXT: s_lshl_b32 s5, s75, 16 +; VI-NEXT: s_or_b32 s37, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s18 ; VI-NEXT: s_lshl_b32 s5, s73, 16 ; VI-NEXT: s_or_b32 s38, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s19 ; VI-NEXT: s_lshl_b32 s5, s15, 16 -; VI-NEXT: s_and_b32 s40, 0xffff, s17 -; VI-NEXT: s_lshl_b32 s41, s75, 16 ; VI-NEXT: s_or_b32 s39, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s20 ; VI-NEXT: s_lshl_b32 s5, s13, 16 -; VI-NEXT: s_or_b32 s37, s40, s41 ; VI-NEXT: s_or_b32 s40, s4, s5 ; VI-NEXT: s_and_b32 s4, 0xffff, s21 ; VI-NEXT: s_lshl_b32 s5, s9, 16 @@ -45031,13 +45071,13 @@ define inreg <15 x double> @bitcast_v60f16_to_v15f64_scalar(<60 x half> inreg %a ; VI-NEXT: .LBB55_2: ; %cmp.true ; VI-NEXT: v_mov_b32_e32 v29, 0x200 ; VI-NEXT: v_mov_b32_e32 v0, s77 -; VI-NEXT: v_mov_b32_e32 v2, s75 ; VI-NEXT: v_add_f16_sdwa v0, v0, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v1, s16, v29 -; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_add_f16_e32 v3, s17, v29 ; VI-NEXT: v_or_b32_e32 v0, v1, v0 -; VI-NEXT: v_or_b32_e32 v1, v3, v2 +; VI-NEXT: v_mov_b32_e32 v1, s75 +; VI-NEXT: v_add_f16_sdwa v1, v1, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; VI-NEXT: v_add_f16_e32 v2, s17, v29 +; VI-NEXT: v_or_b32_e32 v1, v2, v1 ; VI-NEXT: v_mov_b32_e32 v2, s73 ; VI-NEXT: v_add_f16_sdwa v2, v2, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_e32 v3, s18, v29 @@ -45245,28 +45285,24 @@ define inreg <15 x double> @bitcast_v60f16_to_v15f64_scalar(<60 x half> inreg %a ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX9-NEXT: s_mov_b64 exec, s[4:5] -; GFX9-NEXT: v_writelane_b32 v32, s36, 0 -; GFX9-NEXT: v_writelane_b32 v32, s37, 1 -; GFX9-NEXT: v_writelane_b32 v32, s38, 2 -; GFX9-NEXT: v_writelane_b32 v32, s39, 3 -; GFX9-NEXT: v_writelane_b32 v32, s48, 4 -; GFX9-NEXT: v_writelane_b32 v32, s49, 5 -; GFX9-NEXT: v_writelane_b32 v32, s50, 6 -; GFX9-NEXT: v_writelane_b32 v32, s51, 7 -; GFX9-NEXT: v_writelane_b32 v32, s52, 8 -; GFX9-NEXT: v_writelane_b32 v32, s53, 9 -; GFX9-NEXT: v_writelane_b32 v32, s54, 10 -; GFX9-NEXT: v_writelane_b32 v32, s55, 11 -; GFX9-NEXT: v_writelane_b32 v32, s64, 12 -; GFX9-NEXT: v_writelane_b32 v32, s65, 13 -; GFX9-NEXT: s_lshr_b32 s10, s23, 16 -; GFX9-NEXT: s_lshr_b32 s11, s22, 16 -; GFX9-NEXT: s_lshr_b32 s12, s21, 16 -; GFX9-NEXT: s_lshr_b32 s13, s20, 16 -; GFX9-NEXT: s_lshr_b32 s14, s19, 16 -; GFX9-NEXT: s_lshr_b32 s15, s18, 16 -; GFX9-NEXT: s_lshr_b32 s40, s17, 16 -; GFX9-NEXT: s_lshr_b32 s41, s16, 16 +; GFX9-NEXT: v_writelane_b32 v32, s34, 0 +; GFX9-NEXT: v_writelane_b32 v32, s35, 1 +; GFX9-NEXT: v_writelane_b32 v32, s36, 2 +; GFX9-NEXT: v_writelane_b32 v32, s37, 3 +; GFX9-NEXT: v_writelane_b32 v32, s38, 4 +; GFX9-NEXT: v_writelane_b32 v32, s39, 5 +; GFX9-NEXT: v_writelane_b32 v32, s48, 6 +; GFX9-NEXT: v_writelane_b32 v32, s49, 7 +; GFX9-NEXT: v_writelane_b32 v32, s50, 8 +; GFX9-NEXT: v_writelane_b32 v32, s51, 9 +; GFX9-NEXT: v_writelane_b32 v32, s52, 10 +; GFX9-NEXT: v_writelane_b32 v32, s53, 11 +; GFX9-NEXT: v_writelane_b32 v32, s54, 12 +; GFX9-NEXT: v_writelane_b32 v32, s55, 13 +; GFX9-NEXT: v_writelane_b32 v32, s64, 14 +; GFX9-NEXT: v_writelane_b32 v32, s65, 15 +; GFX9-NEXT: v_writelane_b32 v32, s30, 16 +; GFX9-NEXT: v_writelane_b32 v32, s31, 17 ; GFX9-NEXT: v_readfirstlane_b32 s72, v15 ; GFX9-NEXT: v_readfirstlane_b32 s74, v14 ; GFX9-NEXT: v_readfirstlane_b32 s63, v13 @@ -45276,27 +45312,27 @@ define inreg <15 x double> @bitcast_v60f16_to_v15f64_scalar(<60 x half> inreg %a ; GFX9-NEXT: v_readfirstlane_b32 s59, v9 ; GFX9-NEXT: v_readfirstlane_b32 s58, v8 ; GFX9-NEXT: v_readfirstlane_b32 s57, v7 -; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 -; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 -; GFX9-NEXT: v_readfirstlane_b32 s16, v6 -; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 -; GFX9-NEXT: v_readfirstlane_b32 s15, v5 -; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 -; GFX9-NEXT: v_readfirstlane_b32 s14, v4 -; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 -; GFX9-NEXT: v_readfirstlane_b32 s13, v3 -; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 -; GFX9-NEXT: v_readfirstlane_b32 s12, v2 -; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 -; GFX9-NEXT: v_readfirstlane_b32 s11, v1 -; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 -; GFX9-NEXT: v_readfirstlane_b32 s10, v0 +; GFX9-NEXT: v_readfirstlane_b32 s56, v6 +; GFX9-NEXT: v_readfirstlane_b32 s92, v5 +; GFX9-NEXT: v_readfirstlane_b32 s94, v4 +; GFX9-NEXT: v_readfirstlane_b32 vcc_lo, v3 +; GFX9-NEXT: v_readfirstlane_b32 s30, v2 +; GFX9-NEXT: v_readfirstlane_b32 s34, v1 +; GFX9-NEXT: v_readfirstlane_b32 s50, v0 ; GFX9-NEXT: s_lshr_b32 s4, s29, 16 ; GFX9-NEXT: s_lshr_b32 s5, s28, 16 ; GFX9-NEXT: s_lshr_b32 s6, s27, 16 ; GFX9-NEXT: s_lshr_b32 s7, s26, 16 ; GFX9-NEXT: s_lshr_b32 s8, s25, 16 ; GFX9-NEXT: s_lshr_b32 s9, s24, 16 +; GFX9-NEXT: s_lshr_b32 s10, s23, 16 +; GFX9-NEXT: s_lshr_b32 s11, s22, 16 +; GFX9-NEXT: s_lshr_b32 s12, s21, 16 +; GFX9-NEXT: s_lshr_b32 s13, s20, 16 +; GFX9-NEXT: s_lshr_b32 s14, s19, 16 +; GFX9-NEXT: s_lshr_b32 s15, s18, 16 +; GFX9-NEXT: s_lshr_b32 s40, s17, 16 +; GFX9-NEXT: s_lshr_b32 s41, s16, 16 ; GFX9-NEXT: s_lshr_b32 s73, s72, 16 ; GFX9-NEXT: s_lshr_b32 s75, s74, 16 ; GFX9-NEXT: s_lshr_b32 s76, s63, 16 @@ -45306,28 +45342,36 @@ define inreg <15 x double> @bitcast_v60f16_to_v15f64_scalar(<60 x half> inreg %a ; GFX9-NEXT: s_lshr_b32 s88, s59, 16 ; GFX9-NEXT: s_lshr_b32 s89, s58, 16 ; GFX9-NEXT: s_lshr_b32 s90, s57, 16 -; GFX9-NEXT: s_lshr_b32 s17, s16, 16 -; GFX9-NEXT: s_lshr_b32 s18, s15, 16 -; GFX9-NEXT: s_lshr_b32 s19, s14, 16 -; GFX9-NEXT: s_lshr_b32 s20, s13, 16 -; GFX9-NEXT: s_lshr_b32 s21, s12, 16 -; GFX9-NEXT: s_lshr_b32 s22, s11, 16 -; GFX9-NEXT: s_lshr_b32 s23, s10, 16 -; GFX9-NEXT: v_readfirstlane_b32 s44, v16 -; GFX9-NEXT: s_cmp_lg_u32 s44, 0 +; GFX9-NEXT: s_lshr_b32 s91, s56, 16 +; GFX9-NEXT: s_lshr_b32 s93, s92, 16 +; GFX9-NEXT: s_lshr_b32 s95, s94, 16 +; GFX9-NEXT: s_lshr_b32 vcc_hi, vcc_lo, 16 +; GFX9-NEXT: s_lshr_b32 s31, s30, 16 +; GFX9-NEXT: s_lshr_b32 s35, s34, 16 +; GFX9-NEXT: s_lshr_b32 s51, s50, 16 +; GFX9-NEXT: v_readfirstlane_b32 s42, v16 +; GFX9-NEXT: s_cmp_lg_u32 s42, 0 +; GFX9-NEXT: s_pack_ll_b32_b16 s36, s16, s41 +; GFX9-NEXT: s_pack_ll_b32_b16 s37, s17, s40 +; GFX9-NEXT: s_pack_ll_b32_b16 s38, s18, s15 +; GFX9-NEXT: s_pack_ll_b32_b16 s39, s19, s14 +; GFX9-NEXT: s_pack_ll_b32_b16 s40, s20, s13 +; GFX9-NEXT: s_pack_ll_b32_b16 s41, s21, s12 +; GFX9-NEXT: s_pack_ll_b32_b16 s42, s22, s11 +; GFX9-NEXT: s_pack_ll_b32_b16 s43, s23, s10 ; GFX9-NEXT: s_pack_ll_b32_b16 s44, s24, s9 ; GFX9-NEXT: s_pack_ll_b32_b16 s45, s25, s8 ; GFX9-NEXT: s_pack_ll_b32_b16 s46, s26, s7 ; GFX9-NEXT: s_pack_ll_b32_b16 s47, s27, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s48, s28, s5 ; GFX9-NEXT: s_pack_ll_b32_b16 s49, s29, s4 -; GFX9-NEXT: s_pack_ll_b32_b16 s50, s10, s23 -; GFX9-NEXT: s_pack_ll_b32_b16 s51, s11, s22 -; GFX9-NEXT: s_pack_ll_b32_b16 s52, s12, s21 -; GFX9-NEXT: s_pack_ll_b32_b16 s53, s13, s20 -; GFX9-NEXT: s_pack_ll_b32_b16 s54, s14, s19 -; GFX9-NEXT: s_pack_ll_b32_b16 s55, s15, s18 -; GFX9-NEXT: s_pack_ll_b32_b16 s56, s16, s17 +; GFX9-NEXT: s_pack_ll_b32_b16 s50, s50, s51 +; GFX9-NEXT: s_pack_ll_b32_b16 s51, s34, s35 +; GFX9-NEXT: s_pack_ll_b32_b16 s52, s30, s31 +; GFX9-NEXT: s_pack_ll_b32_b16 s53, vcc_lo, vcc_hi +; GFX9-NEXT: s_pack_ll_b32_b16 s54, s94, s95 +; GFX9-NEXT: s_pack_ll_b32_b16 s55, s92, s93 +; GFX9-NEXT: s_pack_ll_b32_b16 s56, s56, s91 ; GFX9-NEXT: s_pack_ll_b32_b16 s57, s57, s90 ; GFX9-NEXT: s_pack_ll_b32_b16 s58, s58, s89 ; GFX9-NEXT: s_pack_ll_b32_b16 s59, s59, s88 @@ -45409,20 +45453,24 @@ define inreg <15 x double> @bitcast_v60f16_to_v15f64_scalar(<60 x half> inreg %a ; GFX9-NEXT: v_mov_b32_e32 v30, s66 ; GFX9-NEXT: v_mov_b32_e32 v31, s67 ; GFX9-NEXT: .LBB55_5: ; %end -; GFX9-NEXT: v_readlane_b32 s65, v32, 13 -; GFX9-NEXT: v_readlane_b32 s64, v32, 12 -; GFX9-NEXT: v_readlane_b32 s55, v32, 11 -; GFX9-NEXT: v_readlane_b32 s54, v32, 10 -; GFX9-NEXT: v_readlane_b32 s53, v32, 9 -; GFX9-NEXT: v_readlane_b32 s52, v32, 8 -; GFX9-NEXT: v_readlane_b32 s51, v32, 7 -; GFX9-NEXT: v_readlane_b32 s50, v32, 6 -; GFX9-NEXT: v_readlane_b32 s49, v32, 5 -; GFX9-NEXT: v_readlane_b32 s48, v32, 4 -; GFX9-NEXT: v_readlane_b32 s39, v32, 3 -; GFX9-NEXT: v_readlane_b32 s38, v32, 2 -; GFX9-NEXT: v_readlane_b32 s37, v32, 1 -; GFX9-NEXT: v_readlane_b32 s36, v32, 0 +; GFX9-NEXT: v_readlane_b32 s30, v32, 16 +; GFX9-NEXT: v_readlane_b32 s31, v32, 17 +; GFX9-NEXT: v_readlane_b32 s65, v32, 15 +; GFX9-NEXT: v_readlane_b32 s64, v32, 14 +; GFX9-NEXT: v_readlane_b32 s55, v32, 13 +; GFX9-NEXT: v_readlane_b32 s54, v32, 12 +; GFX9-NEXT: v_readlane_b32 s53, v32, 11 +; GFX9-NEXT: v_readlane_b32 s52, v32, 10 +; GFX9-NEXT: v_readlane_b32 s51, v32, 9 +; GFX9-NEXT: v_readlane_b32 s50, v32, 8 +; GFX9-NEXT: v_readlane_b32 s49, v32, 7 +; GFX9-NEXT: v_readlane_b32 s48, v32, 6 +; GFX9-NEXT: v_readlane_b32 s39, v32, 5 +; GFX9-NEXT: v_readlane_b32 s38, v32, 4 +; GFX9-NEXT: v_readlane_b32 s37, v32, 3 +; GFX9-NEXT: v_readlane_b32 s36, v32, 2 +; GFX9-NEXT: v_readlane_b32 s35, v32, 1 +; GFX9-NEXT: v_readlane_b32 s34, v32, 0 ; GFX9-NEXT: s_xor_saveexec_b64 s[4:5], -1 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-NEXT: s_mov_b64 exec, s[4:5] @@ -45600,489 +45648,477 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v24 -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v27 +; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v30 ; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v0 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v2 ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 ; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v4 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v52 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v6 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v28 +; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v26 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v1 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v51 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v50 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v3 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v3 +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v43 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v5 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v48 +; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v46 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v5 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v40 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v7 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v43 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: v_lshrrev_b32_e32 v61, 16, v7 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v53 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v9 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v59 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v11 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v40 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v9 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v58 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v13 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v61 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v11 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v57 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v15 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v60 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v13 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v56 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v29 -; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v28 -; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v27 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v26 -; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v25 -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v23 -; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v59 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v29 +; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v25 +; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v24 +; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v23 +; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v22 ; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v21 -; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v20 +; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v20 ; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v19 ; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v18 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v17 +; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v17 ; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v16 +; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v15 ; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v14 ; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 ; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v10 ; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v8 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v6 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v47 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v58 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v50 ; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 ; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 ; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 ; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 ; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 ; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v49 ; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37 ; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38 -; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39 -; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(2) -; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v46 -; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v49 +; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v57 +; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v47 +; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v45 ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v44 -; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v42 -; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v41 -; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v55 -; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v54 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v44 +; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v41 +; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v55 +; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v53 +; SI-NEXT: ; kill: killed $vgpr54 +; SI-NEXT: ; implicit-def: $vgpr54 +; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr45 ; SI-NEXT: ; implicit-def: $vgpr63 ; SI-NEXT: ; implicit-def: $vgpr61 ; SI-NEXT: ; implicit-def: $vgpr59 ; SI-NEXT: ; implicit-def: $vgpr57 -; SI-NEXT: ; implicit-def: $vgpr56 -; SI-NEXT: ; implicit-def: $vgpr46 +; SI-NEXT: ; implicit-def: $vgpr47 ; SI-NEXT: ; implicit-def: $vgpr44 -; SI-NEXT: ; implicit-def: $vgpr42 ; SI-NEXT: ; implicit-def: $vgpr41 ; SI-NEXT: ; implicit-def: $vgpr55 +; SI-NEXT: ; kill: killed $vgpr54 ; SI-NEXT: ; implicit-def: $vgpr54 -; SI-NEXT: ; kill: killed $vgpr48 -; SI-NEXT: ; implicit-def: $vgpr48 +; SI-NEXT: ; kill: killed $vgpr54 ; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB56_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v54, v53 -; SI-NEXT: v_mov_b32_e32 v53, v31 -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v43 -; SI-NEXT: v_or_b32_e32 v45, v1, v48 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v45, v31, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v46 +; SI-NEXT: v_or_b32_e32 v58, v1, v54 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v43 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_or_b32_e32 v45, v1, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v40 ; SI-NEXT: v_or_b32_e32 v63, v1, v3 -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v0, v0, v31 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v61, v1, v3 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v59, v1, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_or_b32_e32 v57, v1, v3 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v0, v0, v11 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v58, v11, 16 +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v2 -; SI-NEXT: ; implicit-def: $vgpr2 -; SI-NEXT: ; implicit-def: $vgpr31 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_alignbit_b32 v1, v63, v3, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13 +; SI-NEXT: ; implicit-def: $vgpr11 +; SI-NEXT: ; implicit-def: $vgpr13 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_or_b32_e32 v47, v1, v3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15 +; SI-NEXT: v_or_b32_e32 v44, v1, v49 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_or_b32_e32 v0, v0, v2 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v0, v0, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v45, v2, 16 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v4 -; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17 +; SI-NEXT: v_or_b32_e32 v41, v1, v60 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19 +; SI-NEXT: v_or_b32_e32 v55, v1, v50 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21 +; SI-NEXT: v_or_b32_e32 v9, v1, v39 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23 +; SI-NEXT: v_or_b32_e32 v7, v1, v51 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25 +; SI-NEXT: v_or_b32_e32 v5, v1, v52 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v27 +; SI-NEXT: v_or_b32_e32 v3, v1, v62 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v29 +; SI-NEXT: v_or_b32_e32 v1, v1, v53 ; SI-NEXT: ; implicit-def: $vgpr4 +; SI-NEXT: ; implicit-def: $vgpr15 +; SI-NEXT: ; implicit-def: $vgpr17 +; SI-NEXT: ; implicit-def: $vgpr19 +; SI-NEXT: ; implicit-def: $vgpr21 +; SI-NEXT: ; implicit-def: $vgpr23 +; SI-NEXT: ; implicit-def: $vgpr25 +; SI-NEXT: ; implicit-def: $vgpr27 +; SI-NEXT: ; implicit-def: $vgpr29 +; SI-NEXT: ; implicit-def: $vgpr49 +; SI-NEXT: ; implicit-def: $vgpr60 +; SI-NEXT: ; implicit-def: $vgpr50 +; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr51 +; SI-NEXT: ; implicit-def: $vgpr52 +; SI-NEXT: ; implicit-def: $vgpr62 +; SI-NEXT: ; implicit-def: $vgpr53 ; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v61, v1, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v61, v5, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v2 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v0, v0, v5 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v63, v2, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v6 -; SI-NEXT: ; implicit-def: $vgpr5 -; SI-NEXT: ; implicit-def: $vgpr6 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v59, v1, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v59, v7, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v42 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v0, v0, v7 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v61, v42, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v0, v0, v53 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v31 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v59, v31, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v0, v0, v32 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v57, v32, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v0, v0, v33 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v47, v33, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v0, v0, v34 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v44, v34, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v16 ; SI-NEXT: v_or_b32_e32 v0, v0, v35 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v41, v35, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18 ; SI-NEXT: v_or_b32_e32 v0, v0, v36 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_alignbit_b32 v0, v55, v36, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v20 -; SI-NEXT: v_or_b32_e32 v0, v0, v60 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v37 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v9, v37, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v22 -; SI-NEXT: v_or_b32_e32 v0, v0, v37 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v38 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v7, v38, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v24 -; SI-NEXT: v_or_b32_e32 v0, v0, v62 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v0, v56 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v5, v56, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v26 -; SI-NEXT: v_or_b32_e32 v0, v0, v38 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v28 -; SI-NEXT: v_or_b32_e32 v0, v0, v39 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill -; SI-NEXT: ; implicit-def: $vgpr0 -; SI-NEXT: ; implicit-def: $vgpr7 -; SI-NEXT: ; implicit-def: $vgpr8 -; SI-NEXT: ; implicit-def: $vgpr10 -; SI-NEXT: ; implicit-def: $vgpr12 -; SI-NEXT: ; implicit-def: $vgpr14 -; SI-NEXT: ; implicit-def: $vgpr16 -; SI-NEXT: ; implicit-def: $vgpr18 -; SI-NEXT: ; implicit-def: $vgpr20 -; SI-NEXT: ; implicit-def: $vgpr22 -; SI-NEXT: ; implicit-def: $vgpr24 -; SI-NEXT: ; implicit-def: $vgpr26 -; SI-NEXT: ; implicit-def: $vgpr28 -; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_or_b32_e32 v57, v1, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v57, v53, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11 -; SI-NEXT: v_mov_b32_e32 v53, v54 -; SI-NEXT: ; implicit-def: $vgpr11 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v56, v1, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v56, v32, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13 -; SI-NEXT: ; implicit-def: $vgpr13 -; SI-NEXT: ; implicit-def: $vgpr32 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v46, v1, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload -; SI-NEXT: v_alignbit_b32 v1, v46, v33, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15 -; SI-NEXT: ; implicit-def: $vgpr15 -; SI-NEXT: ; implicit-def: $vgpr33 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_or_b32_e32 v44, v1, v9 -; SI-NEXT: v_alignbit_b32 v1, v44, v34, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17 -; SI-NEXT: v_or_b32_e32 v42, v1, v47 -; SI-NEXT: v_alignbit_b32 v1, v42, v35, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v19 -; SI-NEXT: v_or_b32_e32 v41, v1, v49 -; SI-NEXT: v_alignbit_b32 v1, v41, v36, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21 -; SI-NEXT: v_or_b32_e32 v55, v1, v30 -; SI-NEXT: v_alignbit_b32 v1, v55, v60, 16 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23 -; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: v_or_b32_e32 v9, v1, v58 -; SI-NEXT: ; kill: killed $vgpr30 -; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: v_alignbit_b32 v1, v9, v37, 16 -; SI-NEXT: ; kill: killed $vgpr30 +; SI-NEXT: v_or_b32_e32 v0, v0, v30 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v3, v30, 16 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25 ; SI-NEXT: ; kill: killed $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: v_or_b32_e32 v1, v1, v50 ; SI-NEXT: ; kill: killed $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v1, v62, 16 ; SI-NEXT: ; kill: killed $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v27 ; SI-NEXT: ; kill: killed $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: v_or_b32_e32 v48, v1, v51 ; SI-NEXT: ; kill: killed $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: v_alignbit_b32 v1, v48, v38, 16 ; SI-NEXT: ; kill: killed $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v29 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v28 ; SI-NEXT: ; kill: killed $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: v_or_b32_e32 v1, v1, v52 +; SI-NEXT: v_or_b32_e32 v0, v0, v48 ; SI-NEXT: ; kill: killed $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_alignbit_b32 v1, v1, v39, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_alignbit_b32 v0, v1, v48, 16 ; SI-NEXT: ; kill: killed $vgpr30 ; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v54, v9 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill +; SI-NEXT: ; implicit-def: $vgpr0 ; SI-NEXT: ; implicit-def: $vgpr1 +; SI-NEXT: ; implicit-def: $vgpr2 +; SI-NEXT: ; implicit-def: $vgpr3 +; SI-NEXT: ; implicit-def: $vgpr5 +; SI-NEXT: ; implicit-def: $vgpr6 +; SI-NEXT: ; implicit-def: $vgpr7 +; SI-NEXT: ; implicit-def: $vgpr8 ; SI-NEXT: ; implicit-def: $vgpr9 -; SI-NEXT: ; implicit-def: $vgpr17 -; SI-NEXT: ; implicit-def: $vgpr19 -; SI-NEXT: ; implicit-def: $vgpr21 -; SI-NEXT: ; implicit-def: $vgpr23 -; SI-NEXT: ; implicit-def: $vgpr25 -; SI-NEXT: ; implicit-def: $vgpr27 -; SI-NEXT: ; implicit-def: $vgpr29 +; SI-NEXT: ; implicit-def: $vgpr10 +; SI-NEXT: ; implicit-def: $vgpr12 +; SI-NEXT: ; implicit-def: $vgpr14 +; SI-NEXT: ; implicit-def: $vgpr16 +; SI-NEXT: ; implicit-def: $vgpr18 +; SI-NEXT: ; implicit-def: $vgpr20 +; SI-NEXT: ; implicit-def: $vgpr22 +; SI-NEXT: ; implicit-def: $vgpr24 +; SI-NEXT: ; implicit-def: $vgpr26 +; SI-NEXT: ; implicit-def: $vgpr28 +; SI-NEXT: ; implicit-def: $vgpr42 +; SI-NEXT: ; implicit-def: $vgpr31 +; SI-NEXT: ; implicit-def: $vgpr32 ; SI-NEXT: ; kill: killed $vgpr30 +; SI-NEXT: ; implicit-def: $vgpr33 ; SI-NEXT: ; implicit-def: $vgpr34 -; SI-NEXT: ; implicit-def: $vgpr47 ; SI-NEXT: ; implicit-def: $vgpr35 -; SI-NEXT: ; implicit-def: $vgpr49 ; SI-NEXT: ; implicit-def: $vgpr36 -; SI-NEXT: ; implicit-def: $vgpr30 -; SI-NEXT: ; implicit-def: $vgpr60 -; SI-NEXT: ; implicit-def: $vgpr58 ; SI-NEXT: ; implicit-def: $vgpr37 -; SI-NEXT: ; implicit-def: $vgpr50 -; SI-NEXT: ; implicit-def: $vgpr62 -; SI-NEXT: ; implicit-def: $vgpr51 ; SI-NEXT: ; implicit-def: $vgpr38 -; SI-NEXT: ; implicit-def: $vgpr52 -; SI-NEXT: ; implicit-def: $vgpr39 +; SI-NEXT: ; implicit-def: $vgpr56 +; SI-NEXT: ; implicit-def: $vgpr30 +; SI-NEXT: ; implicit-def: $vgpr48 ; SI-NEXT: .LBB56_2: ; %Flow -; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] +; SI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5] +; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: s_xor_b64 exec, exec, s[4:5] ; SI-NEXT: s_cbranch_execz .LBB56_4 ; SI-NEXT: ; %bb.3: ; %cmp.true ; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v28 ; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v26 +; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 +; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22 +; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20 +; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; SI-NEXT: v_or_b32_e32 v28, v39, v28 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: v_or_b32_e32 v28, v48, v28 ; SI-NEXT: s_mov_b32 s6, 0x30000 -; SI-NEXT: v_or_b32_e32 v26, v38, v26 -; SI-NEXT: v_add_i32_e32 v39, vcc, 0x30000, v28 +; SI-NEXT: v_or_b32_e32 v26, v30, v26 +; SI-NEXT: v_or_b32_e32 v24, v56, v24 +; SI-NEXT: v_or_b32_e32 v22, v38, v22 +; SI-NEXT: v_or_b32_e32 v20, v37, v20 +; SI-NEXT: v_or_b32_e32 v18, v36, v18 +; SI-NEXT: v_add_i32_e32 v48, vcc, 0x30000, v28 ; SI-NEXT: v_add_i32_e32 v28, vcc, 3, v29 ; SI-NEXT: v_add_i32_e32 v29, vcc, s6, v26 ; SI-NEXT: v_add_i32_e32 v26, vcc, 3, v27 -; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v24 -; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v22 -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 -; SI-NEXT: v_or_b32_e32 v26, v51, v26 -; SI-NEXT: v_or_b32_e32 v24, v62, v24 -; SI-NEXT: v_or_b32_e32 v22, v37, v22 -; SI-NEXT: v_add_i32_e32 v48, vcc, s6, v26 -; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v24 +; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v24 ; SI-NEXT: v_add_i32_e32 v24, vcc, 3, v25 ; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v22 ; SI-NEXT: v_add_i32_e32 v22, vcc, 3, v23 -; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v20 -; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; SI-NEXT: v_or_b32_e32 v22, v58, v22 -; SI-NEXT: v_or_b32_e32 v20, v60, v20 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_i32_e32 v54, vcc, s6, v22 -; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v20 +; SI-NEXT: v_add_i32_e32 v23, vcc, s6, v20 ; SI-NEXT: v_add_i32_e32 v20, vcc, 3, v21 -; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18 -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v20, v30, v20 -; SI-NEXT: v_or_b32_e32 v18, v36, v18 -; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v20 -; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v18 +; SI-NEXT: v_add_i32_e32 v21, vcc, s6, v18 ; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v19 ; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16 ; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: v_or_b32_e32 v18, v49, v18 +; SI-NEXT: v_or_b32_e32 v18, v50, v18 ; SI-NEXT: v_or_b32_e32 v16, v35, v16 -; SI-NEXT: v_add_i32_e32 v41, vcc, s6, v18 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v18 ; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v17 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 -; SI-NEXT: v_or_b32_e32 v16, v47, v16 +; SI-NEXT: v_or_b32_e32 v16, v60, v16 ; SI-NEXT: v_or_b32_e32 v14, v34, v14 -; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v16 +; SI-NEXT: v_add_i32_e32 v41, vcc, s6, v16 ; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v14 ; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v15 -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; SI-NEXT: v_or_b32_e32 v14, v49, v14 ; SI-NEXT: v_or_b32_e32 v12, v33, v12 +; SI-NEXT: v_add_i32_e32 v44, vcc, s6, v14 +; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v12 +; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v13 +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v32, v10 ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8 @@ -46090,64 +46126,65 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_or_b32_e32 v8, v31, v8 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6 ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: v_or_b32_e32 v6, v42, v6 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4 ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 +; SI-NEXT: v_or_b32_e32 v20, v39, v20 ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 -; SI-NEXT: v_or_b32_e32 v24, v50, v24 +; SI-NEXT: v_or_b32_e32 v22, v51, v22 +; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v20 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 +; SI-NEXT: v_or_b32_e32 v24, v52, v24 +; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v22 ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 +; SI-NEXT: v_or_b32_e32 v26, v62, v26 ; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v24 -; SI-NEXT: v_or_b32_e32 v28, v52, v28 +; SI-NEXT: v_or_b32_e32 v28, v53, v28 +; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v26 ; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v28 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v14, v15, v14 -; SI-NEXT: v_add_i32_e32 v44, vcc, s6, v14 -; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v12 -; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v13 -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v12, v13, v12 -; SI-NEXT: v_add_i32_e32 v46, vcc, s6, v12 +; SI-NEXT: v_add_i32_e32 v47, vcc, s6, v12 ; SI-NEXT: v_add_i32_e32 v12, vcc, s6, v10 ; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v11 -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v47 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v10, v11, v10 -; SI-NEXT: v_add_i32_e32 v56, vcc, s6, v10 +; SI-NEXT: v_add_i32_e32 v57, vcc, s6, v10 ; SI-NEXT: v_add_i32_e32 v10, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v9 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v8, v9, v8 -; SI-NEXT: v_add_i32_e32 v57, vcc, s6, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_or_b32_e32 v6, v8, v6 +; SI-NEXT: v_add_i32_e32 v59, vcc, s6, v8 ; SI-NEXT: v_add_i32_e32 v8, vcc, s6, v6 ; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v7 -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v6, v7, v6 -; SI-NEXT: v_add_i32_e32 v59, vcc, s6, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload +; SI-NEXT: v_add_i32_e32 v61, vcc, s6, v6 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v4, v6, v4 ; SI-NEXT: v_add_i32_e32 v6, vcc, s6, v4 ; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v5 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v4, v5, v4 -; SI-NEXT: v_add_i32_e32 v61, vcc, s6, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v61 +; SI-NEXT: v_add_i32_e32 v63, vcc, s6, v4 +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v63 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v2, v4, v2 ; SI-NEXT: v_add_i32_e32 v4, vcc, s6, v2 @@ -46156,134 +46193,126 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v2, v3, v2 -; SI-NEXT: v_add_i32_e32 v63, vcc, s6, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v63 +; SI-NEXT: v_add_i32_e32 v45, vcc, s6, v2 +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload +; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v45 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_or_b32_e32 v0, v2, v0 ; SI-NEXT: v_add_i32_e32 v2, vcc, s6, v0 ; SI-NEXT: v_add_i32_e32 v0, vcc, 3, v1 ; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_or_b32_e32 v0, v1, v0 -; SI-NEXT: v_add_i32_e32 v45, vcc, s6, v0 -; SI-NEXT: v_alignbit_b32 v0, v45, v2, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: v_add_i32_e32 v58, vcc, s6, v0 +; SI-NEXT: v_alignbit_b32 v0, v58, v2, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v63, v4, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v45, v4, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v61, v6, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v63, v6, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v59, v8, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v61, v8, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v57, v10, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v59, v10, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v56, v12, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v57, v12, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v46, v14, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v47, v14, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_alignbit_b32 v0, v44, v16, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v42, v18, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v41, v18, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v41, v20, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v55, v21, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v55, v22, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v20, v23, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v54, v25, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v22, v25, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v24, v26, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v24, v27, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v48, v29, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v26, v29, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_alignbit_b32 v0, v28, v39, 16 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v59 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill +; SI-NEXT: v_alignbit_b32 v0, v28, v48, 16 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v57 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v61 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v56 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v59 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v46 +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v57 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v44 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v20 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v54 +; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v22 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v48 -; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v45 +; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v26 +; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v58 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(1) ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v28 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill ; SI-NEXT: .LBB56_4: ; %end ; SI-NEXT: s_or_b64 exec, exec, s[4:5] ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v43 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v40 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v53 -; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v46 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v43 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v40 +; SI-NEXT: s_waitcnt vmcnt(2) +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v54 ; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload @@ -46292,43 +46321,53 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff, v45 +; SI-NEXT: v_and_b32_e32 v1, 0xffff, v58 ; SI-NEXT: v_or_b32_e32 v1, v1, v2 -; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: s_waitcnt vmcnt(14) ; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8 +; SI-NEXT: s_waitcnt vmcnt(13) ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; SI-NEXT: s_waitcnt vmcnt(12) ; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: s_waitcnt vmcnt(11) ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; SI-NEXT: s_waitcnt vmcnt(10) ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: s_waitcnt vmcnt(9) ; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 -; SI-NEXT: s_waitcnt vmcnt(13) -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 -; SI-NEXT: s_waitcnt vmcnt(12) -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; SI-NEXT: s_waitcnt vmcnt(11) -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 -; SI-NEXT: s_waitcnt vmcnt(10) -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 ; SI-NEXT: s_waitcnt vmcnt(8) ; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; SI-NEXT: s_waitcnt vmcnt(7) @@ -46343,63 +46382,56 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 { ; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 ; SI-NEXT: s_waitcnt vmcnt(2) ; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v63 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v45 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 ; SI-NEXT: v_or_b32_e32 v4, v4, v5 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v61 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v63 ; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 ; SI-NEXT: v_or_b32_e32 v6, v6, v7 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v59 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v61 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 ; SI-NEXT: v_or_b32_e32 v8, v8, v9 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v57 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v59 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 ; SI-NEXT: v_or_b32_e32 v10, v10, v11 -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v56 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v57 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12 ; SI-NEXT: v_or_b32_e32 v12, v12, v13 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v46 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v47 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14 ; SI-NEXT: v_or_b32_e32 v14, v14, v15 ; SI-NEXT: v_and_b32_e32 v15, 0xffff, v44 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 ; SI-NEXT: v_or_b32_e32 v16, v16, v17 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v42 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v41 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; SI-NEXT: v_or_b32_e32 v18, v18, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v41 -; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -46417,35 +46449,47 @@ define <60 x half> @bitcast_v60i16_to_v60f16(<60 x i16> %a, i32 %b) #0 { ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(14) +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18 +; SI-NEXT: v_or_b32_e32 v18, v18, v19 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v55 +; SI-NEXT: v_or_b32_e32 v19, v19, v20 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20 ; SI-NEXT: v_or_b32_e32 v20, v20, v21 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v55 +; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; SI-NEXT: v_or_b32_e32 v22, v22, v23 -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v54 +; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; SI-NEXT: v_or_b32_e32 v24, v24, v25 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v26, v27 -; SI-NEXT: v_and_b32_e32 v27, 0xffff, v48 +; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 ; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v28, 0xffff, v28 ; SI-NEXT: v_or_b32_e32 v28, v28, v29 -; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 @@ -47098,576 +47142,715 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i ; SI-NEXT: v_writelane_b32 v30, s99, 33 ; SI-NEXT: v_writelane_b32 v30, s30, 34 ; SI-NEXT: v_writelane_b32 v30, s31, 35 +; SI-NEXT: s_lshr_b32 s4, s29, 16 ; SI-NEXT: ; implicit-def: $vgpr31 : SGPR spill to VGPR lane -; SI-NEXT: s_mov_b32 s35, s17 +; SI-NEXT: v_readfirstlane_b32 s9, v2 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_writelane_b32 v31, s18, 0 -; SI-NEXT: v_writelane_b32 v31, s20, 1 -; SI-NEXT: s_mov_b32 s37, s16 -; SI-NEXT: s_lshr_b32 s78, s17, 16 -; SI-NEXT: s_lshr_b32 s48, s16, 16 -; SI-NEXT: v_readfirstlane_b32 s74, v15 -; SI-NEXT: v_readfirstlane_b32 s75, v14 -; SI-NEXT: v_readfirstlane_b32 s70, v13 -; SI-NEXT: v_readfirstlane_b32 s16, v12 -; SI-NEXT: v_readfirstlane_b32 s69, v11 -; SI-NEXT: v_readfirstlane_b32 s17, v10 -; SI-NEXT: v_readfirstlane_b32 s67, v9 -; SI-NEXT: v_readfirstlane_b32 s68, v8 -; SI-NEXT: v_readfirstlane_b32 s65, v7 -; SI-NEXT: v_readfirstlane_b32 s66, v6 -; SI-NEXT: v_readfirstlane_b32 s96, v5 -; SI-NEXT: v_readfirstlane_b32 s64, v4 -; SI-NEXT: v_readfirstlane_b32 s97, v3 -; SI-NEXT: v_readfirstlane_b32 s87, v2 -; SI-NEXT: v_readfirstlane_b32 s51, v1 -; SI-NEXT: v_readfirstlane_b32 s99, v0 -; SI-NEXT: v_writelane_b32 v31, s22, 2 -; SI-NEXT: s_lshr_b32 s31, s29, 16 -; SI-NEXT: s_lshr_b32 s76, s28, 16 -; SI-NEXT: s_lshr_b32 s30, s27, 16 -; SI-NEXT: s_lshr_b32 s84, s26, 16 -; SI-NEXT: s_lshr_b32 s94, s25, 16 -; SI-NEXT: s_lshr_b32 s55, s24, 16 -; SI-NEXT: s_lshr_b32 s92, s23, 16 -; SI-NEXT: s_lshr_b32 s54, s22, 16 -; SI-NEXT: s_lshr_b32 s90, s21, 16 -; SI-NEXT: s_lshr_b32 s52, s20, 16 -; SI-NEXT: s_lshr_b32 s88, s19, 16 -; SI-NEXT: s_lshr_b32 s50, s18, 16 -; SI-NEXT: s_lshr_b32 s86, s74, 16 -; SI-NEXT: s_lshr_b32 s93, s75, 16 -; SI-NEXT: s_lshr_b32 s85, s70, 16 -; SI-NEXT: s_lshr_b32 s91, s16, 16 -; SI-NEXT: s_lshr_b32 s39, s69, 16 -; SI-NEXT: s_lshr_b32 s89, s17, 16 -; SI-NEXT: s_lshr_b32 s83, s67, 16 -; SI-NEXT: s_lshr_b32 s79, s68, 16 -; SI-NEXT: s_lshr_b32 s82, s65, 16 -; SI-NEXT: s_lshr_b32 s77, s66, 16 -; SI-NEXT: s_lshr_b32 s81, s96, 16 -; SI-NEXT: s_lshr_b32 s98, s64, 16 -; SI-NEXT: s_lshr_b32 s80, s97, 16 -; SI-NEXT: s_lshr_b32 s95, s87, 16 -; SI-NEXT: s_lshr_b32 s53, s51, 16 -; SI-NEXT: s_lshr_b32 s71, s99, 16 +; SI-NEXT: v_writelane_b32 v31, s4, 0 +; SI-NEXT: v_writelane_b32 v31, s17, 1 +; SI-NEXT: s_lshr_b32 s11, s9, 16 +; SI-NEXT: v_writelane_b32 v31, s9, 2 +; SI-NEXT: v_readfirstlane_b32 s42, v4 +; SI-NEXT: v_writelane_b32 v31, s11, 3 +; SI-NEXT: v_readfirstlane_b32 s35, v6 +; SI-NEXT: s_lshr_b32 s60, s42, 16 +; SI-NEXT: v_writelane_b32 v31, s42, 4 +; SI-NEXT: v_readfirstlane_b32 s37, v8 +; SI-NEXT: s_lshr_b32 s74, s35, 16 +; SI-NEXT: v_writelane_b32 v31, s60, 5 +; SI-NEXT: v_readfirstlane_b32 s39, v10 +; SI-NEXT: s_lshr_b32 s76, s37, 16 +; SI-NEXT: v_writelane_b32 v31, s74, 6 +; SI-NEXT: v_readfirstlane_b32 s49, v12 +; SI-NEXT: s_lshr_b32 s78, s39, 16 +; SI-NEXT: v_writelane_b32 v31, s76, 7 +; SI-NEXT: s_mov_b32 s81, s23 +; SI-NEXT: s_mov_b32 s67, s21 +; SI-NEXT: s_mov_b32 s64, s20 +; SI-NEXT: s_lshr_b32 s57, s23, 16 +; SI-NEXT: s_lshr_b32 s56, s21, 16 +; SI-NEXT: s_lshr_b32 s68, s20, 16 +; SI-NEXT: v_readfirstlane_b32 s45, v15 +; SI-NEXT: v_readfirstlane_b32 s23, v14 +; SI-NEXT: v_readfirstlane_b32 s43, v13 +; SI-NEXT: s_lshr_b32 s93, s49, 16 +; SI-NEXT: v_readfirstlane_b32 s38, v11 +; SI-NEXT: v_readfirstlane_b32 s36, v9 +; SI-NEXT: v_readfirstlane_b32 s34, v7 +; SI-NEXT: v_readfirstlane_b32 s95, v5 +; SI-NEXT: v_readfirstlane_b32 s94, v3 +; SI-NEXT: v_readfirstlane_b32 s20, v1 +; SI-NEXT: v_readfirstlane_b32 s21, v0 +; SI-NEXT: v_writelane_b32 v31, s78, 8 +; SI-NEXT: s_mov_b32 s65, s19 +; SI-NEXT: s_lshr_b32 s53, s28, 16 +; SI-NEXT: s_lshr_b32 s59, s27, 16 +; SI-NEXT: s_lshr_b32 s70, s26, 16 +; SI-NEXT: s_lshr_b32 s58, s25, 16 +; SI-NEXT: s_lshr_b32 s82, s24, 16 +; SI-NEXT: s_lshr_b32 s85, s22, 16 +; SI-NEXT: s_lshr_b32 s47, s19, 16 +; SI-NEXT: s_lshr_b32 s19, s18, 16 +; SI-NEXT: s_lshr_b32 s46, s17, 16 +; SI-NEXT: s_lshr_b32 s84, s16, 16 +; SI-NEXT: s_lshr_b32 s96, s45, 16 +; SI-NEXT: s_lshr_b32 s30, s23, 16 +; SI-NEXT: s_lshr_b32 s86, s43, 16 +; SI-NEXT: s_lshr_b32 s83, s38, 16 +; SI-NEXT: s_lshr_b32 s80, s36, 16 +; SI-NEXT: s_lshr_b32 s71, s34, 16 +; SI-NEXT: s_lshr_b32 s17, s95, 16 +; SI-NEXT: s_lshr_b32 s52, s94, 16 +; SI-NEXT: s_lshr_b32 s98, s20, 16 +; SI-NEXT: s_lshr_b32 s69, s21, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v16 -; SI-NEXT: v_writelane_b32 v31, s24, 3 +; SI-NEXT: v_writelane_b32 v31, s93, 9 +; SI-NEXT: s_mov_b32 s66, s22 ; SI-NEXT: s_cmp_lg_u32 s4, 0 -; SI-NEXT: v_writelane_b32 v31, s26, 4 -; SI-NEXT: v_writelane_b32 v31, s28, 5 -; SI-NEXT: s_cbranch_scc0 .LBB57_4 +; SI-NEXT: v_writelane_b32 v31, s43, 10 +; SI-NEXT: v_writelane_b32 v31, s45, 11 +; SI-NEXT: s_cbranch_scc0 .LBB57_2 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: s_and_b32 s5, s35, 0xffff -; SI-NEXT: s_lshl_b32 s7, s78, 16 -; SI-NEXT: s_or_b32 s73, s5, s7 -; SI-NEXT: s_and_b32 s5, s19, 0xffff -; SI-NEXT: s_lshl_b32 s7, s88, 16 -; SI-NEXT: s_or_b32 s63, s5, s7 -; SI-NEXT: s_and_b32 s5, s21, 0xffff -; SI-NEXT: s_lshl_b32 s7, s90, 16 -; SI-NEXT: s_or_b32 s61, s5, s7 -; SI-NEXT: s_and_b32 s5, s23, 0xffff -; SI-NEXT: s_lshl_b32 s7, s92, 16 -; SI-NEXT: s_or_b32 s59, s5, s7 +; SI-NEXT: v_readlane_b32 s5, v31, 1 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_lshl_b32 s7, s46, 16 +; SI-NEXT: s_or_b32 s55, s5, s7 +; SI-NEXT: s_and_b32 s5, s65, 0xffff +; SI-NEXT: s_lshl_b32 s7, s47, 16 +; SI-NEXT: s_or_b32 s41, s5, s7 +; SI-NEXT: s_and_b32 s5, s67, 0xffff +; SI-NEXT: s_lshl_b32 s7, s56, 16 +; SI-NEXT: s_or_b32 s15, s5, s7 +; SI-NEXT: s_and_b32 s5, s81, 0xffff +; SI-NEXT: s_lshl_b32 s7, s57, 16 +; SI-NEXT: s_or_b32 s13, s5, s7 ; SI-NEXT: s_and_b32 s5, s25, 0xffff -; SI-NEXT: s_lshl_b32 s7, s94, 16 -; SI-NEXT: s_or_b32 s57, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s58, 16 +; SI-NEXT: s_lshl_b32 vcc_lo, s69, 16 +; SI-NEXT: s_mov_b32 s75, s69 +; SI-NEXT: s_or_b32 s69, s5, s7 ; SI-NEXT: s_and_b32 s5, s27, 0xffff -; SI-NEXT: s_lshl_b32 s7, s30, 16 -; SI-NEXT: s_or_b32 s47, s5, s7 +; SI-NEXT: s_lshl_b32 s7, s59, 16 +; SI-NEXT: s_mov_b32 s63, s67 +; SI-NEXT: s_or_b32 s67, s5, s7 +; SI-NEXT: v_readlane_b32 s7, v31, 0 +; SI-NEXT: v_writelane_b32 v31, s95, 34 +; SI-NEXT: v_writelane_b32 v31, s38, 35 +; SI-NEXT: v_writelane_b32 v31, s36, 36 +; SI-NEXT: v_writelane_b32 v31, s34, 37 +; SI-NEXT: v_writelane_b32 v31, s94, 38 ; SI-NEXT: s_and_b32 s5, s29, 0xffff -; SI-NEXT: s_lshl_b32 s7, s31, 16 -; SI-NEXT: s_or_b32 s45, s5, s7 -; SI-NEXT: s_and_b32 s5, s51, 0xffff -; SI-NEXT: s_lshl_b32 s7, s53, 16 -; SI-NEXT: s_or_b32 s43, s5, s7 -; SI-NEXT: s_and_b32 s5, s97, 0xffff +; SI-NEXT: s_lshl_b32 s7, s7, 16 +; SI-NEXT: v_writelane_b32 v31, s28, 39 +; SI-NEXT: s_and_b32 s4, s16, 0xffff +; SI-NEXT: s_lshl_b32 s54, s84, 16 +; SI-NEXT: s_mov_b32 s61, s65 +; SI-NEXT: s_or_b32 s65, s5, s7 +; SI-NEXT: s_and_b32 s5, s20, 0xffff +; SI-NEXT: s_lshl_b32 s7, s98, 16 +; SI-NEXT: v_writelane_b32 v31, s29, 40 +; SI-NEXT: s_or_b32 s44, s4, s54 +; SI-NEXT: s_and_b32 s4, s18, 0xffff +; SI-NEXT: s_lshl_b32 s40, s19, 16 +; SI-NEXT: s_lshl_b32 s14, s68, 16 +; SI-NEXT: s_mov_b32 s91, s68 +; SI-NEXT: s_lshl_b32 s68, s82, 16 +; SI-NEXT: s_or_b32 vcc_hi, s5, s7 +; SI-NEXT: s_and_b32 s5, s94, 0xffff +; SI-NEXT: s_lshl_b32 s7, s52, 16 +; SI-NEXT: v_writelane_b32 v31, s24, 41 +; SI-NEXT: s_or_b32 s90, s4, s40 +; SI-NEXT: s_and_b32 s4, s64, 0xffff +; SI-NEXT: s_or_b32 s87, s5, s7 +; SI-NEXT: s_and_b32 s5, s95, 0xffff +; SI-NEXT: v_writelane_b32 v31, s26, 42 +; SI-NEXT: s_lshr_b64 s[94:95], s[68:69], 16 +; SI-NEXT: s_or_b32 s50, s4, s14 +; SI-NEXT: s_and_b32 s4, s66, 0xffff +; SI-NEXT: s_mov_b32 s51, s66 +; SI-NEXT: s_lshl_b32 s66, s70, 16 +; SI-NEXT: v_writelane_b32 v31, s94, 12 +; SI-NEXT: s_lshl_b32 s7, s17, 16 +; SI-NEXT: v_writelane_b32 v31, s95, 13 +; SI-NEXT: s_lshr_b64 s[94:95], s[66:67], 16 +; SI-NEXT: s_mov_b32 s89, s64 +; SI-NEXT: s_lshl_b32 s64, s53, 16 +; SI-NEXT: s_or_b32 s97, s5, s7 +; SI-NEXT: s_and_b32 s5, s34, 0xffff +; SI-NEXT: s_lshl_b32 s7, s71, 16 +; SI-NEXT: v_writelane_b32 v31, s94, 14 +; SI-NEXT: s_lshl_b32 s12, s85, 16 +; SI-NEXT: s_or_b32 s99, s5, s7 +; SI-NEXT: s_and_b32 s5, s36, 0xffff ; SI-NEXT: s_lshl_b32 s7, s80, 16 -; SI-NEXT: s_or_b32 s41, s5, s7 -; SI-NEXT: s_and_b32 s5, s96, 0xffff -; SI-NEXT: s_lshl_b32 s7, s81, 16 -; SI-NEXT: s_or_b32 s15, s5, s7 -; SI-NEXT: s_and_b32 s5, s65, 0xffff -; SI-NEXT: s_lshl_b32 s7, s82, 16 -; SI-NEXT: s_or_b32 s13, s5, s7 -; SI-NEXT: s_and_b32 s5, s67, 0xffff +; SI-NEXT: v_writelane_b32 v31, s95, 15 +; SI-NEXT: s_lshr_b64 s[94:95], s[64:65], 16 +; SI-NEXT: s_or_b32 s92, s4, s12 +; SI-NEXT: s_and_b32 s4, s24, 0xffff +; SI-NEXT: s_mov_b32 s79, s59 +; SI-NEXT: s_or_b32 s59, s5, s7 +; SI-NEXT: s_and_b32 s5, s38, 0xffff ; SI-NEXT: s_lshl_b32 s7, s83, 16 -; SI-NEXT: s_or_b32 s11, s5, s7 -; SI-NEXT: s_and_b32 s5, s69, 0xffff -; SI-NEXT: s_lshl_b32 s7, s39, 16 -; SI-NEXT: s_or_b32 s9, s5, s7 -; SI-NEXT: s_and_b32 s5, s70, 0xffff -; SI-NEXT: s_lshl_b32 s7, s85, 16 -; SI-NEXT: s_and_b32 s4, s37, 0xffff -; SI-NEXT: s_lshl_b32 s72, s48, 16 -; SI-NEXT: s_lshl_b32 s44, s76, 16 -; SI-NEXT: s_lshl_b32 s42, s71, 16 -; SI-NEXT: s_or_b32 s7, s5, s7 -; SI-NEXT: s_and_b32 s5, s74, 0xffff -; SI-NEXT: s_mov_b32 s49, s71 -; SI-NEXT: s_mov_b32 s71, s76 -; SI-NEXT: s_lshl_b32 s76, s86, 16 -; SI-NEXT: s_or_b32 s4, s4, s72 -; SI-NEXT: s_or_b32 vcc_hi, s5, s76 -; SI-NEXT: s_mov_b32 s5, s73 -; SI-NEXT: s_lshr_b64 s[72:73], s[72:73], 16 -; SI-NEXT: v_writelane_b32 v31, s72, 6 -; SI-NEXT: s_lshl_b32 s62, s50, 16 -; SI-NEXT: v_writelane_b32 v31, s73, 7 -; SI-NEXT: s_and_b32 s72, s18, 0xffff -; SI-NEXT: s_lshl_b32 s60, s52, 16 -; SI-NEXT: s_or_b32 s72, s72, s62 -; SI-NEXT: s_mov_b32 s76, s19 -; SI-NEXT: s_lshr_b64 s[18:19], s[62:63], 16 -; SI-NEXT: s_and_b32 s62, s20, 0xffff -; SI-NEXT: s_mov_b32 s73, s63 -; SI-NEXT: s_or_b32 s62, s62, s60 -; SI-NEXT: s_mov_b32 s63, s61 -; SI-NEXT: s_lshr_b64 s[60:61], s[60:61], 16 -; SI-NEXT: v_writelane_b32 v31, s60, 8 -; SI-NEXT: s_lshl_b32 s58, s54, 16 -; SI-NEXT: v_writelane_b32 v31, s61, 9 -; SI-NEXT: s_and_b32 s60, s22, 0xffff -; SI-NEXT: s_or_b32 s60, s60, s58 -; SI-NEXT: s_mov_b32 s61, s59 -; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16 -; SI-NEXT: v_writelane_b32 v31, s58, 10 -; SI-NEXT: s_lshl_b32 s56, s55, 16 -; SI-NEXT: v_writelane_b32 v31, s59, 11 -; SI-NEXT: s_and_b32 s58, s24, 0xffff -; SI-NEXT: s_or_b32 s58, s58, s56 -; SI-NEXT: s_mov_b32 s59, s57 -; SI-NEXT: s_lshr_b64 s[56:57], s[56:57], 16 -; SI-NEXT: v_writelane_b32 v31, s56, 12 -; SI-NEXT: s_lshl_b32 s46, s84, 16 -; SI-NEXT: v_writelane_b32 v31, s57, 13 -; SI-NEXT: s_and_b32 s56, s26, 0xffff -; SI-NEXT: s_or_b32 s56, s56, s46 -; SI-NEXT: s_mov_b32 s57, s47 -; SI-NEXT: s_lshr_b64 s[46:47], s[46:47], 16 -; SI-NEXT: v_writelane_b32 v31, s46, 14 -; SI-NEXT: v_writelane_b32 v31, s47, 15 -; SI-NEXT: s_and_b32 s46, s28, 0xffff -; SI-NEXT: s_or_b32 s46, s46, s44 -; SI-NEXT: s_mov_b32 s47, s45 -; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16 -; SI-NEXT: v_writelane_b32 v31, s44, 16 -; SI-NEXT: v_writelane_b32 v31, s45, 17 -; SI-NEXT: s_and_b32 s44, s99, 0xffff -; SI-NEXT: s_or_b32 s44, s44, s42 -; SI-NEXT: s_mov_b32 s45, s43 -; SI-NEXT: s_lshr_b64 s[42:43], s[42:43], 16 -; SI-NEXT: v_writelane_b32 v31, s42, 18 -; SI-NEXT: s_lshl_b32 s40, s95, 16 -; SI-NEXT: v_writelane_b32 v31, s43, 19 -; SI-NEXT: s_and_b32 s42, s87, 0xffff -; SI-NEXT: s_lshl_b32 s14, s98, 16 -; SI-NEXT: s_or_b32 s42, s42, s40 -; SI-NEXT: s_mov_b32 s36, s35 -; SI-NEXT: s_lshr_b64 s[34:35], s[40:41], 16 -; SI-NEXT: s_and_b32 s40, s64, 0xffff -; SI-NEXT: s_lshl_b32 s12, s77, 16 -; SI-NEXT: s_mov_b32 s35, s36 -; SI-NEXT: s_or_b32 s40, s40, s14 -; SI-NEXT: s_mov_b32 s38, s37 -; SI-NEXT: s_lshr_b64 s[36:37], s[14:15], 16 -; SI-NEXT: s_and_b32 s14, s66, 0xffff -; SI-NEXT: s_mov_b32 s43, s41 -; SI-NEXT: s_mov_b32 s41, s15 -; SI-NEXT: s_or_b32 s14, s14, s12 -; SI-NEXT: s_mov_b32 s15, s13 -; SI-NEXT: s_lshr_b64 s[12:13], s[12:13], 16 -; SI-NEXT: v_writelane_b32 v31, s12, 20 -; SI-NEXT: s_lshl_b32 s10, s79, 16 -; SI-NEXT: v_writelane_b32 v31, s13, 21 -; SI-NEXT: s_and_b32 s12, s68, 0xffff -; SI-NEXT: s_or_b32 s12, s12, s10 -; SI-NEXT: s_mov_b32 s13, s11 -; SI-NEXT: s_lshr_b64 s[10:11], s[10:11], 16 -; SI-NEXT: v_writelane_b32 v31, s10, 22 -; SI-NEXT: s_lshl_b32 s8, s89, 16 -; SI-NEXT: v_writelane_b32 v31, s11, 23 -; SI-NEXT: s_and_b32 s10, s17, 0xffff -; SI-NEXT: s_or_b32 s10, s10, s8 -; SI-NEXT: s_mov_b32 s11, s9 -; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 16 -; SI-NEXT: v_writelane_b32 v31, s8, 24 -; SI-NEXT: s_lshl_b32 s6, s91, 16 -; SI-NEXT: v_writelane_b32 v31, s9, 25 -; SI-NEXT: s_and_b32 s8, s16, 0xffff -; SI-NEXT: s_or_b32 s8, s8, s6 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: s_lshr_b64 s[6:7], s[6:7], 16 -; SI-NEXT: s_lshl_b32 vcc_lo, s93, 16 -; SI-NEXT: v_writelane_b32 v31, s6, 26 -; SI-NEXT: s_mov_b32 s19, s76 -; SI-NEXT: s_mov_b32 s37, s38 -; SI-NEXT: s_mov_b32 s76, s84 -; SI-NEXT: v_writelane_b32 v31, s7, 27 -; SI-NEXT: s_and_b32 s6, s75, 0xffff -; SI-NEXT: s_mov_b32 s84, s39 -; SI-NEXT: s_lshr_b64 s[38:39], vcc, 16 -; SI-NEXT: s_or_b32 s6, s6, vcc_lo -; SI-NEXT: s_mov_b32 s7, vcc_hi -; SI-NEXT: s_mov_b32 s39, s84 -; SI-NEXT: s_mov_b32 s84, s76 -; SI-NEXT: s_mov_b32 s76, s71 -; SI-NEXT: s_mov_b32 s71, s49 -; SI-NEXT: s_cbranch_execnz .LBB57_3 -; SI-NEXT: .LBB57_2: ; %cmp.true -; SI-NEXT: s_add_i32 s75, s75, 3 -; SI-NEXT: s_and_b32 s4, s75, 0xffff -; SI-NEXT: s_lshl_b32 s5, s93, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s74, s74, 3 -; SI-NEXT: s_add_i32 s6, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s74, 0xffff -; SI-NEXT: s_lshl_b32 s5, s86, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s16, s16, 3 -; SI-NEXT: s_add_i32 s7, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s16, 0xffff -; SI-NEXT: s_lshl_b32 s5, s91, 16 +; SI-NEXT: v_writelane_b32 v31, s94, 16 +; SI-NEXT: s_or_b32 s10, s4, s68 +; SI-NEXT: s_and_b32 s4, s26, 0xffff +; SI-NEXT: s_mov_b32 s26, s17 +; SI-NEXT: s_mov_b32 s17, s19 +; SI-NEXT: s_mov_b32 s19, s57 +; SI-NEXT: s_or_b32 s57, s5, s7 +; SI-NEXT: s_and_b32 s5, s43, 0xffff +; SI-NEXT: s_lshl_b32 s7, s86, 16 +; SI-NEXT: v_writelane_b32 v31, s95, 17 +; SI-NEXT: s_lshr_b64 s[94:95], vcc, 16 +; SI-NEXT: s_mov_b32 s77, s47 +; SI-NEXT: s_or_b32 s47, s5, s7 +; SI-NEXT: s_and_b32 s5, s45, 0xffff +; SI-NEXT: s_mov_b32 s45, s86 +; SI-NEXT: s_lshl_b32 s86, s11, 16 +; SI-NEXT: v_writelane_b32 v31, s94, 18 +; SI-NEXT: v_writelane_b32 v31, s95, 19 +; SI-NEXT: s_lshr_b64 s[94:95], s[86:87], 16 +; SI-NEXT: s_lshl_b32 s7, s96, 16 +; SI-NEXT: s_mov_b32 s73, s96 +; SI-NEXT: s_lshl_b32 s96, s60, 16 +; SI-NEXT: v_writelane_b32 v31, s94, 20 +; SI-NEXT: v_writelane_b32 v31, s95, 21 +; SI-NEXT: s_lshr_b64 s[94:95], s[96:97], 16 +; SI-NEXT: s_mov_b32 s22, s52 +; SI-NEXT: s_mov_b32 s52, s98 +; SI-NEXT: s_lshl_b32 s98, s74, 16 +; SI-NEXT: v_writelane_b32 v31, s94, 22 +; SI-NEXT: v_writelane_b32 v31, s95, 23 +; SI-NEXT: s_lshr_b64 s[94:95], s[98:99], 16 +; SI-NEXT: s_mov_b32 s11, s58 +; SI-NEXT: s_lshl_b32 s58, s76, 16 +; SI-NEXT: v_writelane_b32 v31, s94, 24 +; SI-NEXT: v_writelane_b32 v31, s95, 25 +; SI-NEXT: s_lshr_b64 s[94:95], s[58:59], 16 +; SI-NEXT: s_or_b32 s43, s5, s7 +; SI-NEXT: s_and_b32 s5, s9, 0xffff +; SI-NEXT: s_mov_b32 s9, s56 +; SI-NEXT: s_lshl_b32 s56, s78, 16 +; SI-NEXT: v_writelane_b32 v31, s94, 26 +; SI-NEXT: v_writelane_b32 v31, s95, 27 +; SI-NEXT: s_lshr_b64 s[94:95], s[56:57], 16 +; SI-NEXT: s_or_b32 s72, s5, s86 +; SI-NEXT: s_and_b32 s5, s42, 0xffff +; SI-NEXT: s_mov_b32 s7, s46 +; SI-NEXT: s_lshl_b32 s46, s93, 16 +; SI-NEXT: v_writelane_b32 v31, s94, 28 +; SI-NEXT: s_or_b32 s62, s5, s96 +; SI-NEXT: s_and_b32 s5, s35, 0xffff +; SI-NEXT: v_writelane_b32 v31, s95, 29 +; SI-NEXT: s_lshr_b64 s[94:95], s[46:47], 16 +; SI-NEXT: s_or_b32 s60, s5, s98 +; SI-NEXT: s_and_b32 s5, s37, 0xffff +; SI-NEXT: s_lshl_b32 s42, s30, 16 +; SI-NEXT: v_writelane_b32 v31, s94, 30 +; SI-NEXT: s_or_b32 s74, s5, s58 +; SI-NEXT: s_and_b32 s5, s39, 0xffff +; SI-NEXT: v_writelane_b32 v31, s95, 31 +; SI-NEXT: s_lshr_b64 s[94:95], s[42:43], 16 +; SI-NEXT: s_or_b32 s8, s4, s66 +; SI-NEXT: s_and_b32 s4, s28, 0xffff +; SI-NEXT: s_or_b32 s88, s5, s56 +; SI-NEXT: s_and_b32 s5, s49, 0xffff +; SI-NEXT: v_writelane_b32 v31, s94, 32 +; SI-NEXT: s_or_b32 s6, s4, s64 +; SI-NEXT: s_and_b32 s4, s21, 0xffff +; SI-NEXT: s_mov_b32 s31, s84 +; SI-NEXT: s_mov_b32 s38, s70 +; SI-NEXT: s_mov_b32 s34, s27 +; SI-NEXT: s_mov_b32 s36, s82 +; SI-NEXT: s_mov_b32 s48, s85 +; SI-NEXT: s_mov_b32 s28, s83 +; SI-NEXT: s_mov_b32 s29, s80 +; SI-NEXT: s_mov_b32 s24, s71 +; SI-NEXT: s_mov_b32 s27, s25 +; SI-NEXT: s_mov_b32 s25, s81 +; SI-NEXT: s_or_b32 s78, s5, s46 +; SI-NEXT: s_and_b32 s5, s23, 0xffff +; SI-NEXT: s_lshr_b64 s[70:71], s[54:55], 16 +; SI-NEXT: s_lshr_b64 s[80:81], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[82:83], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[84:85], s[12:13], 16 +; SI-NEXT: v_writelane_b32 v31, s95, 33 +; SI-NEXT: s_or_b32 s4, s4, vcc_lo +; SI-NEXT: s_or_b32 s76, s5, s42 +; SI-NEXT: s_mov_b32 s68, s91 +; SI-NEXT: s_mov_b32 s66, s51 +; SI-NEXT: s_mov_b32 s64, s89 +; SI-NEXT: s_mov_b32 s86, s45 +; SI-NEXT: s_mov_b32 s96, s73 +; SI-NEXT: s_mov_b32 s58, s11 +; SI-NEXT: s_mov_b32 s56, s9 +; SI-NEXT: s_mov_b32 s46, s7 +; SI-NEXT: s_mov_b32 s45, s55 +; SI-NEXT: s_mov_b32 s54, s84 +; SI-NEXT: s_mov_b32 s91, s41 +; SI-NEXT: s_mov_b32 s40, s82 +; SI-NEXT: s_mov_b32 s51, s15 +; SI-NEXT: s_mov_b32 s14, s80 +; SI-NEXT: s_mov_b32 s93, s13 +; SI-NEXT: s_mov_b32 s12, s70 +; SI-NEXT: s_mov_b32 s11, s69 +; SI-NEXT: s_mov_b32 s69, s75 +; SI-NEXT: s_mov_b32 s9, s67 +; SI-NEXT: s_mov_b32 s67, s63 +; SI-NEXT: s_mov_b32 s7, s65 +; SI-NEXT: s_mov_b32 s65, s61 +; SI-NEXT: s_mov_b32 s5, vcc_hi +; SI-NEXT: s_mov_b32 s73, s87 +; SI-NEXT: s_mov_b32 s63, s97 +; SI-NEXT: s_mov_b32 s61, s99 +; SI-NEXT: s_mov_b32 s75, s59 +; SI-NEXT: s_mov_b32 s59, s79 +; SI-NEXT: s_mov_b32 s84, s31 +; SI-NEXT: s_mov_b32 s89, s57 +; SI-NEXT: s_mov_b32 s57, s19 +; SI-NEXT: s_mov_b32 s19, s17 +; SI-NEXT: s_mov_b32 s81, s25 +; SI-NEXT: s_mov_b32 s25, s27 +; SI-NEXT: s_mov_b32 s98, s52 +; SI-NEXT: s_mov_b32 s52, s22 +; SI-NEXT: s_mov_b32 s17, s26 +; SI-NEXT: s_mov_b32 s71, s24 +; SI-NEXT: s_mov_b32 s80, s29 +; SI-NEXT: s_mov_b32 s83, s28 +; SI-NEXT: s_mov_b32 s85, s48 +; SI-NEXT: s_mov_b32 s82, s36 +; SI-NEXT: v_readlane_b32 s26, v31, 42 +; SI-NEXT: s_mov_b32 s27, s34 +; SI-NEXT: s_mov_b32 s70, s38 +; SI-NEXT: v_readlane_b32 s24, v31, 41 +; SI-NEXT: v_readlane_b32 s29, v31, 40 +; SI-NEXT: v_readlane_b32 s28, v31, 39 +; SI-NEXT: v_readlane_b32 s94, v31, 38 +; SI-NEXT: v_readlane_b32 s34, v31, 37 +; SI-NEXT: v_readlane_b32 s36, v31, 36 +; SI-NEXT: v_readlane_b32 s38, v31, 35 +; SI-NEXT: v_readlane_b32 s95, v31, 34 +; SI-NEXT: s_mov_b32 s79, s47 +; SI-NEXT: s_mov_b32 s47, s77 +; SI-NEXT: s_mov_b32 s77, s43 +; SI-NEXT: s_mov_b64 s[42:43], 0 +; SI-NEXT: s_branch .LBB57_3 +; SI-NEXT: .LBB57_2: +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: s_mov_b64 s[42:43], -1 +; SI-NEXT: v_writelane_b32 v31, s4, 12 +; SI-NEXT: v_writelane_b32 v31, s5, 13 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: ; implicit-def: $sgpr44 +; SI-NEXT: ; implicit-def: $sgpr12 +; SI-NEXT: ; implicit-def: $sgpr90 +; SI-NEXT: ; implicit-def: $sgpr14 +; SI-NEXT: ; implicit-def: $sgpr50 +; SI-NEXT: ; implicit-def: $sgpr40 +; SI-NEXT: ; implicit-def: $sgpr92 +; SI-NEXT: ; implicit-def: $sgpr54 +; SI-NEXT: ; implicit-def: $sgpr10 +; SI-NEXT: ; implicit-def: $sgpr8 +; SI-NEXT: ; implicit-def: $sgpr6 +; SI-NEXT: ; implicit-def: $sgpr72 +; SI-NEXT: ; implicit-def: $sgpr62 +; SI-NEXT: ; implicit-def: $sgpr60 +; SI-NEXT: ; implicit-def: $sgpr74 +; SI-NEXT: ; implicit-def: $sgpr88 +; SI-NEXT: ; implicit-def: $sgpr78 +; SI-NEXT: ; implicit-def: $sgpr76 +; SI-NEXT: v_writelane_b32 v31, s4, 14 +; SI-NEXT: v_writelane_b32 v31, s5, 15 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v31, s4, 16 +; SI-NEXT: v_writelane_b32 v31, s5, 17 +; SI-NEXT: v_writelane_b32 v31, s22, 18 +; SI-NEXT: v_writelane_b32 v31, s23, 19 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: ; implicit-def: $sgpr4 +; SI-NEXT: v_writelane_b32 v31, s22, 20 +; SI-NEXT: v_writelane_b32 v31, s23, 21 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: v_writelane_b32 v31, s22, 22 +; SI-NEXT: v_writelane_b32 v31, s23, 23 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: v_writelane_b32 v31, s22, 24 +; SI-NEXT: v_writelane_b32 v31, s23, 25 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: v_writelane_b32 v31, s22, 26 +; SI-NEXT: v_writelane_b32 v31, s23, 27 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: v_writelane_b32 v31, s22, 28 +; SI-NEXT: v_writelane_b32 v31, s23, 29 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: v_writelane_b32 v31, s22, 30 +; SI-NEXT: v_writelane_b32 v31, s23, 31 +; SI-NEXT: ; implicit-def: $sgpr22 +; SI-NEXT: v_writelane_b32 v31, s22, 32 +; SI-NEXT: v_writelane_b32 v31, s23, 33 +; SI-NEXT: .LBB57_3: ; %Flow +; SI-NEXT: s_andn2_b64 vcc, exec, s[42:43] +; SI-NEXT: v_readlane_b32 s42, v31, 12 +; SI-NEXT: v_readlane_b32 s43, v31, 13 +; SI-NEXT: s_cbranch_vccnz .LBB57_5 +; SI-NEXT: ; %bb.4: ; %cmp.true +; SI-NEXT: s_add_i32 s23, s23, 3 +; SI-NEXT: s_and_b32 s4, s23, 0xffff +; SI-NEXT: s_lshl_b32 s5, s30, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s70, s70, 3 -; SI-NEXT: s_add_i32 s8, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s70, 0xffff -; SI-NEXT: s_lshl_b32 s5, s85, 16 +; SI-NEXT: s_add_i32 s76, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v31, 11 +; SI-NEXT: s_add_i32 s22, s4, 3 +; SI-NEXT: s_and_b32 s4, s22, 0xffff +; SI-NEXT: s_lshl_b32 s5, s96, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s17, s17, 3 -; SI-NEXT: s_add_i32 s9, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s17, 0xffff -; SI-NEXT: s_lshl_b32 s5, s89, 16 +; SI-NEXT: s_add_i32 s49, s49, 3 +; SI-NEXT: v_readlane_b32 s5, v31, 9 +; SI-NEXT: s_add_i32 s77, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s49, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s69, s69, 3 -; SI-NEXT: s_add_i32 s10, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s69, 0xffff -; SI-NEXT: s_lshl_b32 s5, s39, 16 +; SI-NEXT: s_add_i32 s78, s4, 0x30000 +; SI-NEXT: v_readlane_b32 s4, v31, 10 +; SI-NEXT: s_add_i32 s48, s4, 3 +; SI-NEXT: s_and_b32 s4, s48, 0xffff +; SI-NEXT: s_lshl_b32 s5, s86, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s68, s68, 3 -; SI-NEXT: s_add_i32 s11, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s68, 0xffff -; SI-NEXT: s_lshl_b32 s5, s79, 16 +; SI-NEXT: s_add_i32 s39, s39, 3 +; SI-NEXT: v_readlane_b32 s5, v31, 8 +; SI-NEXT: s_add_i32 s79, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s39, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s67, s67, 3 -; SI-NEXT: s_add_i32 s12, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s67, 0xffff +; SI-NEXT: s_add_i32 s38, s38, 3 +; SI-NEXT: s_add_i32 s88, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s38, 0xffff ; SI-NEXT: s_lshl_b32 s5, s83, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s66, s66, 3 -; SI-NEXT: s_add_i32 s13, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s66, 0xffff -; SI-NEXT: s_lshl_b32 s5, s77, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s65, s65, 3 -; SI-NEXT: s_add_i32 s14, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s65, 0xffff -; SI-NEXT: s_lshl_b32 s5, s82, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s64, s64, 3 -; SI-NEXT: s_add_i32 s15, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s64, 0xffff -; SI-NEXT: s_lshl_b32 s5, s98, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s96, s96, 3 -; SI-NEXT: s_add_i32 s40, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s96, 0xffff -; SI-NEXT: s_lshl_b32 s5, s81, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s98, s87, 3 -; SI-NEXT: s_add_i32 s41, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s98, 0xffff -; SI-NEXT: s_lshl_b32 s5, s95, 16 +; SI-NEXT: s_add_i32 s37, s37, 3 +; SI-NEXT: v_readlane_b32 s5, v31, 7 +; SI-NEXT: s_add_i32 s89, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s37, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s87, s97, 3 -; SI-NEXT: s_add_i32 s42, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s87, 0xffff +; SI-NEXT: s_add_i32 s36, s36, 3 +; SI-NEXT: s_add_i32 s74, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s36, 0xffff ; SI-NEXT: s_lshl_b32 s5, s80, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s99, s99, 3 -; SI-NEXT: s_add_i32 s43, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s99, 0xffff -; SI-NEXT: s_lshl_b32 s5, s71, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s97, s51, 3 -; SI-NEXT: s_add_i32 s44, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s97, 0xffff -; SI-NEXT: s_lshl_b32 s5, s53, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s45, s4, 0x30000 -; SI-NEXT: v_readlane_b32 s4, v31, 5 -; SI-NEXT: s_add_i32 s28, s4, 3 -; SI-NEXT: s_and_b32 s4, s28, 0xffff -; SI-NEXT: s_lshl_b32 s5, s76, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s29, s29, 3 -; SI-NEXT: s_add_i32 s46, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s29, 0xffff -; SI-NEXT: s_lshl_b32 s5, s31, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s47, s4, 0x30000 -; SI-NEXT: v_readlane_b32 s4, v31, 4 -; SI-NEXT: s_add_i32 s26, s4, 3 -; SI-NEXT: s_and_b32 s4, s26, 0xffff -; SI-NEXT: s_lshl_b32 s5, s84, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s27, s27, 3 -; SI-NEXT: s_add_i32 s56, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s27, 0xffff -; SI-NEXT: s_lshl_b32 s5, s30, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s57, s4, 0x30000 -; SI-NEXT: v_readlane_b32 s4, v31, 3 -; SI-NEXT: s_add_i32 s24, s4, 3 -; SI-NEXT: s_and_b32 s4, s24, 0xffff -; SI-NEXT: s_lshl_b32 s5, s55, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s25, s25, 3 -; SI-NEXT: s_add_i32 s58, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s25, 0xffff -; SI-NEXT: s_lshl_b32 s5, s94, 16 -; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s59, s4, 0x30000 -; SI-NEXT: v_readlane_b32 s4, v31, 2 -; SI-NEXT: s_add_i32 s22, s4, 3 -; SI-NEXT: s_and_b32 s4, s22, 0xffff -; SI-NEXT: s_lshl_b32 s5, s54, 16 +; SI-NEXT: s_add_i32 s35, s35, 3 +; SI-NEXT: v_readlane_b32 s5, v31, 6 +; SI-NEXT: s_add_i32 s75, s4, 0x30000 +; SI-NEXT: s_and_b32 s4, s35, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s23, s23, 3 +; SI-NEXT: s_add_i32 s34, s34, 3 ; SI-NEXT: s_add_i32 s60, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s23, 0xffff -; SI-NEXT: s_lshl_b32 s5, s92, 16 +; SI-NEXT: s_and_b32 s4, s34, 0xffff +; SI-NEXT: s_lshl_b32 s5, s71, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s61, s4, 0x30000 -; SI-NEXT: v_readlane_b32 s4, v31, 1 -; SI-NEXT: s_add_i32 s20, s4, 3 -; SI-NEXT: s_and_b32 s4, s20, 0xffff -; SI-NEXT: s_lshl_b32 s5, s52, 16 +; SI-NEXT: v_readlane_b32 s4, v31, 4 +; SI-NEXT: s_add_i32 s31, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v31, 5 +; SI-NEXT: s_and_b32 s4, s31, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s21, s21, 3 +; SI-NEXT: s_add_i32 s30, s95, 3 ; SI-NEXT: s_add_i32 s62, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s21, 0xffff -; SI-NEXT: s_lshl_b32 s5, s90, 16 +; SI-NEXT: s_and_b32 s4, s30, 0xffff +; SI-NEXT: s_lshl_b32 s5, s17, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 ; SI-NEXT: s_add_i32 s63, s4, 0x30000 -; SI-NEXT: v_readlane_b32 s4, v31, 0 -; SI-NEXT: s_add_i32 s18, s4, 3 -; SI-NEXT: s_and_b32 s4, s18, 0xffff -; SI-NEXT: s_lshl_b32 s5, s50, 16 +; SI-NEXT: v_readlane_b32 s4, v31, 2 +; SI-NEXT: s_add_i32 s95, s4, 3 +; SI-NEXT: v_readlane_b32 s5, v31, 3 +; SI-NEXT: s_and_b32 s4, s95, 0xffff +; SI-NEXT: s_lshl_b32 s5, s5, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s19, s19, 3 +; SI-NEXT: s_add_i32 s94, s94, 3 ; SI-NEXT: s_add_i32 s72, s4, 0x30000 -; SI-NEXT: s_and_b32 s4, s19, 0xffff -; SI-NEXT: s_lshl_b32 s5, s88, 16 +; SI-NEXT: s_and_b32 s4, s94, 0xffff +; SI-NEXT: s_lshl_b32 s5, s52, 16 ; SI-NEXT: s_or_b32 s4, s5, s4 +; SI-NEXT: s_add_i32 s21, s21, 3 ; SI-NEXT: s_add_i32 s73, s4, 0x30000 -; SI-NEXT: s_add_i32 s4, s37, 3 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s5, s48, 16 +; SI-NEXT: s_and_b32 s4, s21, 0xffff +; SI-NEXT: s_lshl_b32 s5, s69, 16 +; SI-NEXT: s_add_i32 s20, s20, 3 ; SI-NEXT: s_or_b32 s4, s5, s4 -; SI-NEXT: s_add_i32 s5, s35, 3 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s16, s78, 16 -; SI-NEXT: s_or_b32 s5, s16, s5 -; SI-NEXT: s_add_i32 s4, s4, 0x30000 -; SI-NEXT: s_add_i32 s5, s5, 0x30000 -; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16 -; SI-NEXT: v_writelane_b32 v31, s16, 6 -; SI-NEXT: v_writelane_b32 v31, s17, 7 -; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16 -; SI-NEXT: v_writelane_b32 v31, s16, 8 -; SI-NEXT: v_writelane_b32 v31, s17, 9 -; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16 -; SI-NEXT: v_writelane_b32 v31, s16, 10 -; SI-NEXT: v_writelane_b32 v31, s17, 11 -; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 16 -; SI-NEXT: v_writelane_b32 v31, s16, 12 -; SI-NEXT: v_writelane_b32 v31, s17, 13 -; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16 +; SI-NEXT: s_and_b32 s5, s20, 0xffff +; SI-NEXT: s_lshl_b32 s6, s98, 16 +; SI-NEXT: s_add_i32 s28, s28, 3 +; SI-NEXT: s_or_b32 s5, s6, s5 +; SI-NEXT: s_and_b32 s6, s28, 0xffff +; SI-NEXT: s_lshl_b32 s7, s53, 16 +; SI-NEXT: s_add_i32 s29, s29, 3 +; SI-NEXT: v_readlane_b32 s8, v31, 0 +; SI-NEXT: s_or_b32 s6, s7, s6 +; SI-NEXT: s_and_b32 s7, s29, 0xffff +; SI-NEXT: s_lshl_b32 s8, s8, 16 +; SI-NEXT: s_add_i32 s26, s26, 3 +; SI-NEXT: s_or_b32 s7, s8, s7 +; SI-NEXT: s_and_b32 s8, s26, 0xffff +; SI-NEXT: s_lshl_b32 s9, s70, 16 +; SI-NEXT: s_add_i32 s27, s27, 3 +; SI-NEXT: s_or_b32 s8, s9, s8 +; SI-NEXT: s_and_b32 s9, s27, 0xffff +; SI-NEXT: s_lshl_b32 s10, s59, 16 +; SI-NEXT: s_add_i32 s24, s24, 3 +; SI-NEXT: s_or_b32 s9, s10, s9 +; SI-NEXT: s_and_b32 s10, s24, 0xffff +; SI-NEXT: s_lshl_b32 s11, s82, 16 +; SI-NEXT: s_add_i32 s25, s25, 3 +; SI-NEXT: s_or_b32 s10, s11, s10 +; SI-NEXT: s_and_b32 s11, s25, 0xffff +; SI-NEXT: s_lshl_b32 s12, s58, 16 +; SI-NEXT: s_or_b32 s11, s12, s11 +; SI-NEXT: s_add_i32 s12, s66, 3 +; SI-NEXT: s_and_b32 s12, s12, 0xffff +; SI-NEXT: s_lshl_b32 s13, s85, 16 +; SI-NEXT: s_or_b32 s12, s13, s12 +; SI-NEXT: s_add_i32 s13, s81, 3 +; SI-NEXT: s_and_b32 s13, s13, 0xffff +; SI-NEXT: s_lshl_b32 s14, s57, 16 +; SI-NEXT: s_or_b32 s13, s14, s13 +; SI-NEXT: s_add_i32 s14, s64, 3 +; SI-NEXT: s_and_b32 s14, s14, 0xffff +; SI-NEXT: s_lshl_b32 s15, s68, 16 +; SI-NEXT: s_or_b32 s14, s15, s14 +; SI-NEXT: s_add_i32 s15, s67, 3 +; SI-NEXT: s_and_b32 s15, s15, 0xffff +; SI-NEXT: s_lshl_b32 s20, s56, 16 +; SI-NEXT: s_or_b32 s15, s20, s15 +; SI-NEXT: s_add_i32 s20, s18, 3 +; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s21, s19, 16 +; SI-NEXT: s_or_b32 s20, s21, s20 +; SI-NEXT: s_add_i32 s90, s20, 0x30000 +; SI-NEXT: s_add_i32 s20, s65, 3 +; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s21, s47, 16 +; SI-NEXT: s_or_b32 s20, s21, s20 +; SI-NEXT: s_add_i32 s91, s20, 0x30000 +; SI-NEXT: s_add_i32 s20, s16, 3 +; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s21, s84, 16 +; SI-NEXT: s_add_i32 s8, s8, 0x30000 +; SI-NEXT: s_add_i32 s9, s9, 0x30000 +; SI-NEXT: s_or_b32 s20, s21, s20 +; SI-NEXT: v_readlane_b32 s16, v31, 1 +; SI-NEXT: s_add_i32 s44, s20, 0x30000 +; SI-NEXT: s_add_i32 s20, s16, 3 +; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16 +; SI-NEXT: s_add_i32 s6, s6, 0x30000 +; SI-NEXT: s_add_i32 s7, s7, 0x30000 ; SI-NEXT: v_writelane_b32 v31, s16, 14 ; SI-NEXT: v_writelane_b32 v31, s17, 15 -; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 16 +; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 16 +; SI-NEXT: s_add_i32 s4, s4, 0x30000 +; SI-NEXT: s_add_i32 s5, s5, 0x30000 ; SI-NEXT: v_writelane_b32 v31, s16, 16 ; SI-NEXT: v_writelane_b32 v31, s17, 17 -; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16 ; SI-NEXT: v_writelane_b32 v31, s16, 18 ; SI-NEXT: v_writelane_b32 v31, s17, 19 -; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 16 +; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 16 ; SI-NEXT: v_writelane_b32 v31, s16, 20 ; SI-NEXT: v_writelane_b32 v31, s17, 21 -; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 16 +; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16 ; SI-NEXT: v_writelane_b32 v31, s16, 22 ; SI-NEXT: v_writelane_b32 v31, s17, 23 -; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16 +; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16 ; SI-NEXT: v_writelane_b32 v31, s16, 24 ; SI-NEXT: v_writelane_b32 v31, s17, 25 -; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16 -; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 16 -; SI-NEXT: s_lshr_b64 s[18:19], s[72:73], 16 -; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 16 -; SI-NEXT: s_lshr_b64 s[36:37], s[40:41], 16 +; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 16 ; SI-NEXT: v_writelane_b32 v31, s16, 26 -; SI-NEXT: s_lshr_b32 s78, s5, 16 -; SI-NEXT: s_lshr_b32 s88, s73, 16 -; SI-NEXT: s_lshr_b32 s90, s63, 16 -; SI-NEXT: s_lshr_b32 s92, s61, 16 -; SI-NEXT: s_lshr_b32 s94, s59, 16 -; SI-NEXT: s_lshr_b32 s30, s57, 16 -; SI-NEXT: s_lshr_b32 s31, s47, 16 -; SI-NEXT: s_lshr_b32 s53, s45, 16 -; SI-NEXT: s_lshr_b32 s80, s43, 16 -; SI-NEXT: s_lshr_b32 s81, s41, 16 -; SI-NEXT: s_lshr_b32 s82, s15, 16 -; SI-NEXT: s_lshr_b32 s83, s13, 16 -; SI-NEXT: s_lshr_b32 s39, s11, 16 -; SI-NEXT: s_lshr_b32 s85, s9, 16 -; SI-NEXT: s_lshr_b32 s86, s7, 16 ; SI-NEXT: v_writelane_b32 v31, s17, 27 -; SI-NEXT: .LBB57_3: ; %end -; SI-NEXT: v_readlane_b32 s16, v31, 6 -; SI-NEXT: s_and_b32 s4, s4, 0xffff -; SI-NEXT: s_lshl_b32 s16, s16, 16 -; SI-NEXT: v_readlane_b32 s17, v31, 7 -; SI-NEXT: s_or_b32 s4, s4, s16 -; SI-NEXT: s_and_b32 s5, s5, 0xffff -; SI-NEXT: s_lshl_b32 s16, s78, 16 -; SI-NEXT: s_or_b32 s5, s5, s16 -; SI-NEXT: s_and_b32 s16, s72, 0xffff -; SI-NEXT: s_lshl_b32 s17, s18, 16 -; SI-NEXT: s_or_b32 s16, s16, s17 -; SI-NEXT: s_and_b32 s17, s73, 0xffff -; SI-NEXT: s_lshl_b32 s18, s88, 16 -; SI-NEXT: v_readlane_b32 s20, v31, 8 -; SI-NEXT: s_or_b32 s17, s17, s18 -; SI-NEXT: s_and_b32 s18, s62, 0xffff -; SI-NEXT: s_lshl_b32 s19, s20, 16 -; SI-NEXT: v_readlane_b32 s21, v31, 9 -; SI-NEXT: s_or_b32 s18, s18, s19 -; SI-NEXT: s_and_b32 s19, s63, 0xffff -; SI-NEXT: s_lshl_b32 s20, s90, 16 -; SI-NEXT: v_readlane_b32 s22, v31, 10 -; SI-NEXT: s_or_b32 s19, s19, s20 -; SI-NEXT: s_and_b32 s20, s60, 0xffff -; SI-NEXT: s_lshl_b32 s21, s22, 16 -; SI-NEXT: v_readlane_b32 s23, v31, 11 +; SI-NEXT: s_lshr_b64 s[16:17], s[88:89], 16 +; SI-NEXT: v_writelane_b32 v31, s16, 28 +; SI-NEXT: v_writelane_b32 v31, s17, 29 +; SI-NEXT: s_lshr_b64 s[16:17], s[78:79], 16 +; SI-NEXT: s_and_b32 s20, s20, 0xffff +; SI-NEXT: s_lshl_b32 s21, s46, 16 +; SI-NEXT: v_writelane_b32 v31, s16, 30 +; SI-NEXT: s_or_b32 s20, s21, s20 +; SI-NEXT: v_writelane_b32 v31, s17, 31 +; SI-NEXT: s_lshr_b64 s[16:17], s[76:77], 16 +; SI-NEXT: s_add_i32 s10, s10, 0x30000 +; SI-NEXT: s_add_i32 s11, s11, 0x30000 +; SI-NEXT: s_add_i32 s92, s12, 0x30000 +; SI-NEXT: s_add_i32 s93, s13, 0x30000 +; SI-NEXT: s_add_i32 s50, s14, 0x30000 +; SI-NEXT: s_add_i32 s51, s15, 0x30000 +; SI-NEXT: s_add_i32 s45, s20, 0x30000 +; SI-NEXT: v_writelane_b32 v31, s16, 32 +; SI-NEXT: s_lshr_b64 s[12:13], s[44:45], 16 +; SI-NEXT: s_lshr_b64 s[14:15], s[90:91], 16 +; SI-NEXT: s_lshr_b64 s[40:41], s[50:51], 16 +; SI-NEXT: s_lshr_b64 s[54:55], s[92:93], 16 +; SI-NEXT: s_lshr_b64 s[42:43], s[10:11], 16 +; SI-NEXT: v_writelane_b32 v31, s17, 33 +; SI-NEXT: s_lshr_b32 s46, s45, 16 +; SI-NEXT: s_lshr_b32 s47, s91, 16 +; SI-NEXT: s_lshr_b32 s56, s51, 16 +; SI-NEXT: s_lshr_b32 s57, s93, 16 +; SI-NEXT: s_lshr_b32 s58, s11, 16 +; SI-NEXT: s_lshr_b32 s59, s9, 16 +; SI-NEXT: s_lshr_b32 s16, s7, 16 +; SI-NEXT: s_lshr_b32 s98, s5, 16 +; SI-NEXT: s_lshr_b32 s52, s73, 16 +; SI-NEXT: s_lshr_b32 s17, s63, 16 +; SI-NEXT: s_lshr_b32 s71, s61, 16 +; SI-NEXT: s_lshr_b32 s80, s75, 16 +; SI-NEXT: s_lshr_b32 s83, s89, 16 +; SI-NEXT: s_lshr_b32 s86, s79, 16 +; SI-NEXT: s_lshr_b32 s96, s77, 16 +; SI-NEXT: v_writelane_b32 v31, s16, 0 +; SI-NEXT: .LBB57_5: ; %end +; SI-NEXT: s_and_b32 s20, s44, 0xffff +; SI-NEXT: s_lshl_b32 s21, s12, 16 ; SI-NEXT: s_or_b32 s20, s20, s21 -; SI-NEXT: s_and_b32 s21, s61, 0xffff -; SI-NEXT: s_lshl_b32 s22, s92, 16 -; SI-NEXT: v_readlane_b32 s24, v31, 12 +; SI-NEXT: s_and_b32 s21, s45, 0xffff +; SI-NEXT: s_lshl_b32 s22, s46, 16 ; SI-NEXT: s_or_b32 s21, s21, s22 -; SI-NEXT: s_and_b32 s22, s58, 0xffff -; SI-NEXT: s_lshl_b32 s23, s24, 16 -; SI-NEXT: v_readlane_b32 s25, v31, 13 +; SI-NEXT: s_and_b32 s22, s90, 0xffff +; SI-NEXT: s_lshl_b32 s23, s14, 16 ; SI-NEXT: s_or_b32 s22, s22, s23 -; SI-NEXT: s_and_b32 s23, s59, 0xffff -; SI-NEXT: s_lshl_b32 s24, s94, 16 -; SI-NEXT: v_readlane_b32 s26, v31, 14 +; SI-NEXT: s_and_b32 s23, s91, 0xffff +; SI-NEXT: s_lshl_b32 s24, s47, 16 ; SI-NEXT: s_or_b32 s23, s23, s24 -; SI-NEXT: s_and_b32 s24, s56, 0xffff -; SI-NEXT: s_lshl_b32 s25, s26, 16 -; SI-NEXT: v_readlane_b32 s27, v31, 15 -; SI-NEXT: s_or_b32 s24, s24, s25 -; SI-NEXT: s_and_b32 s25, s57, 0xffff -; SI-NEXT: s_lshl_b32 s26, s30, 16 -; SI-NEXT: v_readlane_b32 s28, v31, 16 -; SI-NEXT: s_or_b32 s25, s25, s26 -; SI-NEXT: s_and_b32 s26, s46, 0xffff -; SI-NEXT: s_lshl_b32 s27, s28, 16 -; SI-NEXT: v_readlane_b32 s29, v31, 17 -; SI-NEXT: s_or_b32 s26, s26, s27 -; SI-NEXT: s_and_b32 s27, s47, 0xffff -; SI-NEXT: s_lshl_b32 s28, s31, 16 -; SI-NEXT: v_readlane_b32 s46, v31, 18 -; SI-NEXT: s_or_b32 s27, s27, s28 -; SI-NEXT: s_and_b32 s28, s44, 0xffff -; SI-NEXT: s_lshl_b32 s29, s46, 16 -; SI-NEXT: s_or_b32 s28, s28, s29 -; SI-NEXT: s_and_b32 s29, s45, 0xffff -; SI-NEXT: s_lshl_b32 s44, s53, 16 -; SI-NEXT: s_or_b32 s29, s29, s44 -; SI-NEXT: s_and_b32 s42, s42, 0xffff -; SI-NEXT: s_lshl_b32 s44, s34, 16 -; SI-NEXT: s_or_b32 s42, s42, s44 -; SI-NEXT: s_and_b32 s43, s43, 0xffff -; SI-NEXT: s_lshl_b32 s44, s80, 16 -; SI-NEXT: s_or_b32 s43, s43, s44 -; SI-NEXT: s_and_b32 s40, s40, 0xffff -; SI-NEXT: s_lshl_b32 s44, s36, 16 -; SI-NEXT: s_or_b32 s40, s40, s44 -; SI-NEXT: s_and_b32 s41, s41, 0xffff -; SI-NEXT: s_lshl_b32 s44, s81, 16 -; SI-NEXT: s_or_b32 s41, s41, s44 -; SI-NEXT: v_readlane_b32 s44, v31, 20 -; SI-NEXT: s_and_b32 s14, s14, 0xffff -; SI-NEXT: s_lshl_b32 s44, s44, 16 -; SI-NEXT: v_readlane_b32 s45, v31, 21 -; SI-NEXT: s_or_b32 s14, s14, s44 -; SI-NEXT: s_and_b32 s15, s15, 0xffff -; SI-NEXT: s_lshl_b32 s44, s82, 16 -; SI-NEXT: s_or_b32 s15, s15, s44 -; SI-NEXT: v_readlane_b32 s44, v31, 22 -; SI-NEXT: s_and_b32 s12, s12, 0xffff -; SI-NEXT: s_lshl_b32 s44, s44, 16 -; SI-NEXT: v_readlane_b32 s45, v31, 23 -; SI-NEXT: s_or_b32 s12, s12, s44 -; SI-NEXT: s_and_b32 s13, s13, 0xffff -; SI-NEXT: s_lshl_b32 s44, s83, 16 -; SI-NEXT: s_or_b32 s13, s13, s44 -; SI-NEXT: v_readlane_b32 s44, v31, 24 +; SI-NEXT: s_and_b32 s14, s50, 0xffff +; SI-NEXT: s_lshl_b32 s24, s40, 16 +; SI-NEXT: s_or_b32 s14, s14, s24 +; SI-NEXT: s_and_b32 s15, s51, 0xffff +; SI-NEXT: s_lshl_b32 s24, s56, 16 +; SI-NEXT: s_or_b32 s15, s15, s24 +; SI-NEXT: s_and_b32 s12, s92, 0xffff +; SI-NEXT: s_lshl_b32 s24, s54, 16 +; SI-NEXT: s_or_b32 s12, s12, s24 +; SI-NEXT: s_and_b32 s13, s93, 0xffff +; SI-NEXT: s_lshl_b32 s24, s57, 16 +; SI-NEXT: s_or_b32 s13, s13, s24 ; SI-NEXT: s_and_b32 s10, s10, 0xffff -; SI-NEXT: s_lshl_b32 s44, s44, 16 -; SI-NEXT: v_readlane_b32 s45, v31, 25 -; SI-NEXT: s_or_b32 s10, s10, s44 +; SI-NEXT: s_lshl_b32 s24, s42, 16 +; SI-NEXT: s_or_b32 s10, s10, s24 ; SI-NEXT: s_and_b32 s11, s11, 0xffff -; SI-NEXT: s_lshl_b32 s44, s39, 16 -; SI-NEXT: s_or_b32 s11, s11, s44 -; SI-NEXT: v_readlane_b32 s44, v31, 26 +; SI-NEXT: s_lshl_b32 s24, s58, 16 +; SI-NEXT: v_readlane_b32 s18, v31, 14 +; SI-NEXT: s_or_b32 s11, s11, s24 ; SI-NEXT: s_and_b32 s8, s8, 0xffff -; SI-NEXT: s_lshl_b32 s44, s44, 16 -; SI-NEXT: s_or_b32 s8, s8, s44 +; SI-NEXT: v_readlane_b32 s19, v31, 15 +; SI-NEXT: s_lshl_b32 s24, s18, 16 +; SI-NEXT: s_or_b32 s8, s8, s24 ; SI-NEXT: s_and_b32 s9, s9, 0xffff -; SI-NEXT: s_lshl_b32 s44, s85, 16 -; SI-NEXT: s_or_b32 s9, s9, s44 +; SI-NEXT: s_lshl_b32 s24, s59, 16 +; SI-NEXT: v_readlane_b32 s18, v31, 16 +; SI-NEXT: s_or_b32 s9, s9, s24 ; SI-NEXT: s_and_b32 s6, s6, 0xffff -; SI-NEXT: s_lshl_b32 s44, s38, 16 -; SI-NEXT: s_or_b32 s6, s6, s44 +; SI-NEXT: v_readlane_b32 s19, v31, 17 +; SI-NEXT: s_lshl_b32 s24, s18, 16 +; SI-NEXT: v_readlane_b32 s16, v31, 0 +; SI-NEXT: s_or_b32 s6, s6, s24 ; SI-NEXT: s_and_b32 s7, s7, 0xffff -; SI-NEXT: s_lshl_b32 s44, s86, 16 -; SI-NEXT: s_or_b32 s7, s7, s44 +; SI-NEXT: s_lshl_b32 s24, s16, 16 +; SI-NEXT: v_readlane_b32 s18, v31, 18 +; SI-NEXT: s_or_b32 s7, s7, s24 +; SI-NEXT: s_and_b32 s4, s4, 0xffff +; SI-NEXT: v_readlane_b32 s19, v31, 19 +; SI-NEXT: s_lshl_b32 s24, s18, 16 +; SI-NEXT: s_or_b32 s4, s4, s24 +; SI-NEXT: s_and_b32 s5, s5, 0xffff +; SI-NEXT: s_lshl_b32 s24, s98, 16 +; SI-NEXT: v_readlane_b32 s18, v31, 20 +; SI-NEXT: s_or_b32 s5, s5, s24 +; SI-NEXT: s_and_b32 s24, s72, 0xffff +; SI-NEXT: v_readlane_b32 s19, v31, 21 +; SI-NEXT: s_lshl_b32 s25, s18, 16 +; SI-NEXT: s_or_b32 s24, s24, s25 +; SI-NEXT: s_and_b32 s25, s73, 0xffff +; SI-NEXT: s_lshl_b32 s26, s52, 16 +; SI-NEXT: v_readlane_b32 s18, v31, 22 +; SI-NEXT: s_or_b32 s25, s25, s26 +; SI-NEXT: s_and_b32 s26, s62, 0xffff +; SI-NEXT: s_lshl_b32 s27, s18, 16 +; SI-NEXT: s_or_b32 s26, s26, s27 +; SI-NEXT: s_and_b32 s27, s63, 0xffff +; SI-NEXT: s_lshl_b32 s28, s17, 16 +; SI-NEXT: v_readlane_b32 s16, v31, 24 +; SI-NEXT: s_or_b32 s27, s27, s28 +; SI-NEXT: s_and_b32 s28, s60, 0xffff +; SI-NEXT: v_readlane_b32 s17, v31, 25 +; SI-NEXT: s_lshl_b32 s29, s16, 16 +; SI-NEXT: s_or_b32 s28, s28, s29 +; SI-NEXT: s_and_b32 s29, s61, 0xffff +; SI-NEXT: s_lshl_b32 s40, s71, 16 +; SI-NEXT: v_readlane_b32 s16, v31, 26 +; SI-NEXT: v_readlane_b32 s19, v31, 23 +; SI-NEXT: s_or_b32 s29, s29, s40 +; SI-NEXT: s_and_b32 s40, s74, 0xffff +; SI-NEXT: s_lshl_b32 s41, s16, 16 +; SI-NEXT: s_or_b32 s40, s40, s41 +; SI-NEXT: s_and_b32 s41, s75, 0xffff +; SI-NEXT: s_lshl_b32 s42, s80, 16 +; SI-NEXT: v_readlane_b32 s18, v31, 28 +; SI-NEXT: v_readlane_b32 s17, v31, 27 +; SI-NEXT: s_or_b32 s41, s41, s42 +; SI-NEXT: s_and_b32 s16, s88, 0xffff +; SI-NEXT: s_lshl_b32 s42, s18, 16 +; SI-NEXT: s_or_b32 s16, s16, s42 +; SI-NEXT: s_and_b32 s17, s89, 0xffff +; SI-NEXT: s_lshl_b32 s42, s83, 16 +; SI-NEXT: s_or_b32 s17, s17, s42 +; SI-NEXT: v_readlane_b32 s42, v31, 30 +; SI-NEXT: v_readlane_b32 s19, v31, 29 +; SI-NEXT: s_and_b32 s18, s78, 0xffff +; SI-NEXT: s_lshl_b32 s42, s42, 16 +; SI-NEXT: v_readlane_b32 s43, v31, 31 +; SI-NEXT: s_or_b32 s18, s18, s42 +; SI-NEXT: s_and_b32 s19, s79, 0xffff +; SI-NEXT: s_lshl_b32 s42, s86, 16 +; SI-NEXT: v_readlane_b32 s44, v31, 32 +; SI-NEXT: s_or_b32 s19, s19, s42 +; SI-NEXT: s_and_b32 s42, s76, 0xffff +; SI-NEXT: s_lshl_b32 s43, s44, 16 +; SI-NEXT: s_or_b32 s42, s42, s43 +; SI-NEXT: s_and_b32 s43, s77, 0xffff +; SI-NEXT: s_lshl_b32 s44, s96, 16 +; SI-NEXT: s_or_b32 s43, s43, s44 ; SI-NEXT: v_readlane_b32 s30, v30, 34 -; SI-NEXT: v_readlane_b32 s47, v31, 19 -; SI-NEXT: v_readlane_b32 s45, v31, 27 -; SI-NEXT: v_mov_b32_e32 v0, s4 -; SI-NEXT: v_mov_b32_e32 v1, s5 -; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: v_mov_b32_e32 v3, s17 -; SI-NEXT: v_mov_b32_e32 v4, s18 -; SI-NEXT: v_mov_b32_e32 v5, s19 -; SI-NEXT: v_mov_b32_e32 v6, s20 -; SI-NEXT: v_mov_b32_e32 v7, s21 -; SI-NEXT: v_mov_b32_e32 v8, s22 -; SI-NEXT: v_mov_b32_e32 v9, s23 -; SI-NEXT: v_mov_b32_e32 v10, s24 -; SI-NEXT: v_mov_b32_e32 v11, s25 -; SI-NEXT: v_mov_b32_e32 v12, s26 -; SI-NEXT: v_mov_b32_e32 v13, s27 -; SI-NEXT: v_mov_b32_e32 v14, s28 -; SI-NEXT: v_mov_b32_e32 v15, s29 -; SI-NEXT: v_mov_b32_e32 v16, s42 -; SI-NEXT: v_mov_b32_e32 v17, s43 -; SI-NEXT: v_mov_b32_e32 v18, s40 -; SI-NEXT: v_mov_b32_e32 v19, s41 -; SI-NEXT: v_mov_b32_e32 v20, s14 -; SI-NEXT: v_mov_b32_e32 v21, s15 -; SI-NEXT: v_mov_b32_e32 v22, s12 -; SI-NEXT: v_mov_b32_e32 v23, s13 -; SI-NEXT: v_mov_b32_e32 v24, s10 -; SI-NEXT: v_mov_b32_e32 v25, s11 -; SI-NEXT: v_mov_b32_e32 v26, s8 -; SI-NEXT: v_mov_b32_e32 v27, s9 -; SI-NEXT: v_mov_b32_e32 v28, s6 -; SI-NEXT: v_mov_b32_e32 v29, s7 +; SI-NEXT: v_readlane_b32 s45, v31, 33 +; SI-NEXT: v_mov_b32_e32 v0, s20 +; SI-NEXT: v_mov_b32_e32 v1, s21 +; SI-NEXT: v_mov_b32_e32 v2, s22 +; SI-NEXT: v_mov_b32_e32 v3, s23 +; SI-NEXT: v_mov_b32_e32 v4, s14 +; SI-NEXT: v_mov_b32_e32 v5, s15 +; SI-NEXT: v_mov_b32_e32 v6, s12 +; SI-NEXT: v_mov_b32_e32 v7, s13 +; SI-NEXT: v_mov_b32_e32 v8, s10 +; SI-NEXT: v_mov_b32_e32 v9, s11 +; SI-NEXT: v_mov_b32_e32 v10, s8 +; SI-NEXT: v_mov_b32_e32 v11, s9 +; SI-NEXT: v_mov_b32_e32 v12, s6 +; SI-NEXT: v_mov_b32_e32 v13, s7 +; SI-NEXT: v_mov_b32_e32 v14, s4 +; SI-NEXT: v_mov_b32_e32 v15, s5 +; SI-NEXT: v_mov_b32_e32 v16, s24 +; SI-NEXT: v_mov_b32_e32 v17, s25 +; SI-NEXT: v_mov_b32_e32 v18, s26 +; SI-NEXT: v_mov_b32_e32 v19, s27 +; SI-NEXT: v_mov_b32_e32 v20, s28 +; SI-NEXT: v_mov_b32_e32 v21, s29 +; SI-NEXT: v_mov_b32_e32 v22, s40 +; SI-NEXT: v_mov_b32_e32 v23, s41 +; SI-NEXT: v_mov_b32_e32 v24, s16 +; SI-NEXT: v_mov_b32_e32 v25, s17 +; SI-NEXT: v_mov_b32_e32 v26, s18 +; SI-NEXT: v_mov_b32_e32 v27, s19 +; SI-NEXT: v_mov_b32_e32 v28, s42 +; SI-NEXT: v_mov_b32_e32 v29, s43 ; SI-NEXT: v_readlane_b32 s31, v30, 35 ; SI-NEXT: v_readlane_b32 s99, v30, 33 ; SI-NEXT: v_readlane_b32 s98, v30, 32 @@ -47709,60 +47892,6 @@ define inreg <60 x half> @bitcast_v60i16_to_v60f16_scalar(<60 x i16> inreg %a, i ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] -; SI-NEXT: .LBB57_4: -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v31, s6, 6 -; SI-NEXT: v_writelane_b32 v31, s7, 7 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: ; implicit-def: $sgpr4 -; SI-NEXT: ; implicit-def: $sgpr72 -; SI-NEXT: ; implicit-def: $sgpr18 -; SI-NEXT: ; implicit-def: $sgpr62 -; SI-NEXT: ; implicit-def: $sgpr60 -; SI-NEXT: ; implicit-def: $sgpr58 -; SI-NEXT: ; implicit-def: $sgpr56 -; SI-NEXT: ; implicit-def: $sgpr46 -; SI-NEXT: ; implicit-def: $sgpr44 -; SI-NEXT: ; implicit-def: $sgpr42 -; SI-NEXT: ; implicit-def: $sgpr34 -; SI-NEXT: ; implicit-def: $sgpr40 -; SI-NEXT: ; implicit-def: $sgpr36 -; SI-NEXT: ; implicit-def: $sgpr14 -; SI-NEXT: ; implicit-def: $sgpr12 -; SI-NEXT: ; implicit-def: $sgpr10 -; SI-NEXT: ; implicit-def: $sgpr8 -; SI-NEXT: ; implicit-def: $sgpr38 -; SI-NEXT: v_writelane_b32 v31, s6, 8 -; SI-NEXT: v_writelane_b32 v31, s7, 9 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v31, s6, 10 -; SI-NEXT: v_writelane_b32 v31, s7, 11 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v31, s6, 12 -; SI-NEXT: v_writelane_b32 v31, s7, 13 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v31, s6, 14 -; SI-NEXT: v_writelane_b32 v31, s7, 15 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v31, s6, 16 -; SI-NEXT: v_writelane_b32 v31, s7, 17 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v31, s6, 18 -; SI-NEXT: v_writelane_b32 v31, s7, 19 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v31, s6, 20 -; SI-NEXT: v_writelane_b32 v31, s7, 21 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v31, s6, 22 -; SI-NEXT: v_writelane_b32 v31, s7, 23 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v31, s6, 24 -; SI-NEXT: v_writelane_b32 v31, s7, 25 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: v_writelane_b32 v31, s6, 26 -; SI-NEXT: v_writelane_b32 v31, s7, 27 -; SI-NEXT: ; implicit-def: $sgpr6 -; SI-NEXT: s_branch .LBB57_2 ; ; VI-LABEL: bitcast_v60i16_to_v60f16_scalar: ; VI: ; %bb.0: @@ -49838,7 +49967,7 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill ; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill @@ -49859,52 +49988,52 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i ; SI-NEXT: v_writelane_b32 v63, s35, 1 ; SI-NEXT: v_writelane_b32 v63, s30, 2 ; SI-NEXT: v_writelane_b32 v63, s31, 3 -; SI-NEXT: v_readfirstlane_b32 s6, v15 -; SI-NEXT: v_readfirstlane_b32 s7, v14 -; SI-NEXT: v_readfirstlane_b32 s47, v13 -; SI-NEXT: v_readfirstlane_b32 s8, v12 -; SI-NEXT: v_readfirstlane_b32 s45, v11 -; SI-NEXT: v_readfirstlane_b32 s74, v10 -; SI-NEXT: v_readfirstlane_b32 s44, v9 -; SI-NEXT: v_readfirstlane_b32 s77, v8 -; SI-NEXT: v_readfirstlane_b32 s43, v7 -; SI-NEXT: v_readfirstlane_b32 s88, v6 -; SI-NEXT: v_readfirstlane_b32 s42, v5 -; SI-NEXT: v_readfirstlane_b32 s91, v4 -; SI-NEXT: v_readfirstlane_b32 s41, v3 -; SI-NEXT: v_readfirstlane_b32 s94, v2 -; SI-NEXT: v_readfirstlane_b32 s40, v1 -; SI-NEXT: v_readfirstlane_b32 s30, v0 -; SI-NEXT: s_lshr_b32 s15, s29, 16 -; SI-NEXT: s_lshr_b32 s79, s28, 16 -; SI-NEXT: s_lshr_b32 s14, s27, 16 -; SI-NEXT: s_lshr_b32 s90, s26, 16 -; SI-NEXT: s_lshr_b32 s13, s25, 16 -; SI-NEXT: s_lshr_b32 s93, s24, 16 -; SI-NEXT: s_lshr_b32 s12, s23, 16 -; SI-NEXT: s_lshr_b32 s95, s22, 16 -; SI-NEXT: s_lshr_b32 s11, s21, 16 +; SI-NEXT: v_readfirstlane_b32 s59, v15 +; SI-NEXT: v_readfirstlane_b32 s6, v14 +; SI-NEXT: v_readfirstlane_b32 s57, v13 +; SI-NEXT: v_readfirstlane_b32 s63, v12 +; SI-NEXT: v_readfirstlane_b32 s47, v11 +; SI-NEXT: v_readfirstlane_b32 s75, v10 +; SI-NEXT: v_readfirstlane_b32 s45, v9 +; SI-NEXT: v_readfirstlane_b32 s76, v8 +; SI-NEXT: v_readfirstlane_b32 s42, v7 +; SI-NEXT: v_readfirstlane_b32 s78, v6 +; SI-NEXT: v_readfirstlane_b32 s40, v5 +; SI-NEXT: v_readfirstlane_b32 s89, v4 +; SI-NEXT: v_readfirstlane_b32 s15, v3 +; SI-NEXT: v_readfirstlane_b32 s92, v2 +; SI-NEXT: v_readfirstlane_b32 s14, v1 +; SI-NEXT: v_readfirstlane_b32 s95, v0 +; SI-NEXT: s_lshr_b32 s13, s29, 16 +; SI-NEXT: s_lshr_b32 s88, s28, 16 +; SI-NEXT: s_lshr_b32 s12, s27, 16 +; SI-NEXT: s_lshr_b32 s91, s26, 16 +; SI-NEXT: s_lshr_b32 s11, s25, 16 +; SI-NEXT: s_lshr_b32 s94, s24, 16 +; SI-NEXT: s_lshr_b32 s10, s23, 16 +; SI-NEXT: s_lshr_b32 s30, s22, 16 +; SI-NEXT: s_lshr_b32 s9, s21, 16 ; SI-NEXT: s_lshr_b32 s31, s20, 16 -; SI-NEXT: s_lshr_b32 s10, s19, 16 +; SI-NEXT: s_lshr_b32 s8, s19, 16 ; SI-NEXT: s_lshr_b32 s34, s18, 16 -; SI-NEXT: s_lshr_b32 s9, s17, 16 +; SI-NEXT: s_lshr_b32 s7, s17, 16 ; SI-NEXT: s_lshr_b32 s35, s16, 16 -; SI-NEXT: s_lshr_b32 s75, s6, 16 -; SI-NEXT: s_lshr_b32 s57, s7, 16 -; SI-NEXT: s_lshr_b32 s73, s47, 16 -; SI-NEXT: s_lshr_b32 s59, s8, 16 -; SI-NEXT: s_lshr_b32 s63, s45, 16 -; SI-NEXT: s_lshr_b32 s61, s74, 16 -; SI-NEXT: s_lshr_b32 s62, s44, 16 -; SI-NEXT: s_lshr_b32 s72, s77, 16 -; SI-NEXT: s_lshr_b32 s60, s43, 16 -; SI-NEXT: s_lshr_b32 s76, s88, 16 -; SI-NEXT: s_lshr_b32 s58, s42, 16 -; SI-NEXT: s_lshr_b32 s78, s91, 16 -; SI-NEXT: s_lshr_b32 s56, s41, 16 -; SI-NEXT: s_lshr_b32 s89, s94, 16 +; SI-NEXT: s_lshr_b32 s73, s59, 16 +; SI-NEXT: s_lshr_b32 s44, s6, 16 +; SI-NEXT: s_lshr_b32 s72, s57, 16 +; SI-NEXT: s_lshr_b32 s60, s63, 16 +; SI-NEXT: s_lshr_b32 s61, s47, 16 +; SI-NEXT: s_lshr_b32 s62, s75, 16 +; SI-NEXT: s_lshr_b32 s58, s45, 16 +; SI-NEXT: s_lshr_b32 s74, s76, 16 +; SI-NEXT: s_lshr_b32 s56, s42, 16 +; SI-NEXT: s_lshr_b32 s77, s78, 16 ; SI-NEXT: s_lshr_b32 s46, s40, 16 -; SI-NEXT: s_lshr_b32 s92, s30, 16 +; SI-NEXT: s_lshr_b32 s79, s89, 16 +; SI-NEXT: s_lshr_b32 s43, s15, 16 +; SI-NEXT: s_lshr_b32 s90, s92, 16 +; SI-NEXT: s_lshr_b32 s41, s14, 16 +; SI-NEXT: s_lshr_b32 s93, s95, 16 ; SI-NEXT: v_readfirstlane_b32 s4, v16 ; SI-NEXT: s_cmp_lg_u32 s4, 0 ; SI-NEXT: s_cbranch_scc0 .LBB59_3 @@ -49920,19 +50049,19 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2 -; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v0 +; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s31 -; SI-NEXT: v_or_b32_e32 v25, v1, v46 +; SI-NEXT: v_or_b32_e32 v52, v1, v32 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v2 ; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v2 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v1 +; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s20 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v0 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s95 -; SI-NEXT: v_or_b32_e32 v24, v3, v2 +; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v0, s30 +; SI-NEXT: v_or_b32_e32 v2, v3, v53 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s22 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 @@ -49940,23 +50069,24 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v6, v1, v4 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s93 -; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v0 +; SI-NEXT: v_or_b32_e32 v12, v1, v34 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s94 +; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s24 -; SI-NEXT: v_or_b32_e32 v8, v3, v35 +; SI-NEXT: v_or_b32_e32 v10, v3, v36 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s90 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s91 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v1 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s26 -; SI-NEXT: v_or_b32_e32 v10, v0, v16 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s79 -; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v3 +; SI-NEXT: s_waitcnt expcnt(1) +; SI-NEXT: v_or_b32_e32 v61, v0, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v0, s88 +; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s28 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 @@ -49964,422 +50094,427 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v1, v1, v40 -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v1, v1, v39 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v1, s92 -; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v0 -; SI-NEXT: v_cvt_f32_f16_e32 v0, s30 -; SI-NEXT: v_or_b32_e32 v21, v3, v54 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s89 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s93 +; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v0 +; SI-NEXT: v_cvt_f32_f16_e32 v0, s95 +; SI-NEXT: v_or_b32_e32 v38, v3, v42 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s90 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s94 -; SI-NEXT: v_or_b32_e32 v0, v0, v19 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v1 +; SI-NEXT: v_or_b32_e32 v0, v0, v14 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s92 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v0, s78 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s91 +; SI-NEXT: v_cvt_f32_f16_e32 v0, s79 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s89 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 +; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v50, v1, v22 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s76 -; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v0 -; SI-NEXT: v_or_b32_e32 v0, v3, v42 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v1, v1, v16 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v0 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v0, s88 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s77 +; SI-NEXT: v_or_b32_e32 v0, v3, v18 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v0, s78 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s74 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s72 ; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s77 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_or_b32_e32 v0, v0, v26 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v1 +; SI-NEXT: v_or_b32_e32 v0, v0, v20 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s76 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s59 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s61 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s74 +; SI-NEXT: v_cvt_f32_f16_e32 v0, s62 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s75 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s57 +; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v5 -; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s73 -; SI-NEXT: v_cvt_f16_f32_e32 v28, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s47 -; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s75 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v34, v0 -; SI-NEXT: v_cvt_f16_f32_e32 v0, v5 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s60 +; SI-NEXT: v_or_b32_e32 v1, v1, v22 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v0 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v0, v3, v24 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f32_f16_e32 v1, s63 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s73 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s59 +; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f16_f32_e32 v2, v1 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v4 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s72 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v2 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill +; SI-NEXT: v_or_b32_e32 v29, v1, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s57 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v53, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s63 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v0 -; SI-NEXT: v_or_b32_e32 v61, v1, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s45 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s62 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill +; SI-NEXT: v_cvt_f32_f16_e32 v4, s61 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f16_f32_e32 v0, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v2, v3 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v0 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s44 -; SI-NEXT: v_or_b32_e32 v45, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s60 -; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v7 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f32_f16_e32 v7, s43 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v6, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v2 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s47 +; SI-NEXT: v_or_b32_e32 v27, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s58 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s45 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v14, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_cvt_f16_f32_e32 v2, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_or_b32_e32 v13, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s58 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v14 -; SI-NEXT: v_or_b32_e32 v27, v3, v5 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v6 +; SI-NEXT: v_or_b32_e32 v25, v4, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s56 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v2 +; SI-NEXT: v_or_b32_e32 v23, v3, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s42 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s56 -; SI-NEXT: v_cvt_f16_f32_e32 v37, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s46 +; SI-NEXT: v_cvt_f16_f32_e32 v49, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v39, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v37 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s41 -; SI-NEXT: v_or_b32_e32 v43, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s46 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s40 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v51, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v49 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s40 +; SI-NEXT: v_or_b32_e32 v21, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s43 +; SI-NEXT: v_cvt_f32_f16_e32 v5, s15 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_cvt_f16_f32_e32 v0, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v50, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v39 -; SI-NEXT: v_or_b32_e32 v23, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s15 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v0 -; SI-NEXT: v_or_b32_e32 v20, v3, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s29 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v51 +; SI-NEXT: v_or_b32_e32 v19, v4, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s41 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v50 +; SI-NEXT: v_or_b32_e32 v17, v3, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s14 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s14 -; SI-NEXT: v_cvt_f16_f32_e32 v18, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s13 +; SI-NEXT: v_cvt_f16_f32_e32 v60, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v15, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v18 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v55, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v60 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s29 +; SI-NEXT: v_or_b32_e32 v15, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s12 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s27 -; SI-NEXT: v_or_b32_e32 v55, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s13 -; SI-NEXT: v_cvt_f32_f16_e32 v7, s25 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v11, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_cvt_f16_f32_e32 v41, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v15 -; SI-NEXT: v_or_b32_e32 v41, v5, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v1, s12 -; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v11 -; SI-NEXT: v_or_b32_e32 v17, v3, v5 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s23 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v55 +; SI-NEXT: v_or_b32_e32 v43, v4, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s11 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v41 +; SI-NEXT: v_or_b32_e32 v40, v3, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s25 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s10 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s11 -; SI-NEXT: v_cvt_f16_f32_e32 v9, v1 +; SI-NEXT: v_cvt_f16_f32_e32 v13, v1 ; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v7, v3 -; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v5, s21 -; SI-NEXT: v_or_b32_e32 v36, v1, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v3, s10 -; SI-NEXT: v_cvt_f32_f16_e32 v29, s19 -; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5 -; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v4, s23 +; SI-NEXT: v_cvt_f16_f32_e32 v11, v3 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v13 +; SI-NEXT: v_or_b32_e32 v9, v1, v3 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s9 +; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v7, s21 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v11 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 +; SI-NEXT: v_cvt_f16_f32_e32 v5, v3 +; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v7 +; SI-NEXT: v_or_b32_e32 v37, v4, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s8 +; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5 +; SI-NEXT: v_cvt_f32_f16_e32 v30, s17 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 +; SI-NEXT: v_or_b32_e32 v35, v3, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v3, s19 +; SI-NEXT: v_cvt_f16_f32_e32 v4, v1 +; SI-NEXT: v_cvt_f32_f16_e32 v1, s7 +; SI-NEXT: v_add_f32_e32 v30, 0x38000000, v30 ; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3 -; SI-NEXT: v_cvt_f16_f32_e32 v38, v3 -; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v29 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 -; SI-NEXT: v_cvt_f32_f16_e32 v29, s9 -; SI-NEXT: v_cvt_f32_f16_e32 v31, s17 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v7 -; SI-NEXT: v_cvt_f32_f16_e32 v32, s6 -; SI-NEXT: v_or_b32_e32 v5, v5, v1 -; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v38 -; SI-NEXT: v_or_b32_e32 v3, v3, v1 -; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v29 +; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 -; SI-NEXT: v_add_f32_e32 v29, 0x38000000, v31 -; SI-NEXT: v_cvt_f16_f32_e32 v29, v29 -; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v32 -; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 -; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v1 -; SI-NEXT: v_or_b32_e32 v47, v29, v32 -; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v53 -; SI-NEXT: v_cvt_f32_f16_e32 v32, s8 -; SI-NEXT: v_or_b32_e32 v29, v31, v29 -; SI-NEXT: v_cvt_f32_f16_e32 v31, s7 ; SI-NEXT: v_cvt_f16_f32_e32 v30, v30 -; SI-NEXT: v_add_f32_e32 v32, 0x38000000, v32 -; SI-NEXT: v_cvt_f16_f32_e32 v32, v32 -; SI-NEXT: v_add_f32_e32 v31, 0x38000000, v31 -; SI-NEXT: v_cvt_f16_f32_e32 v31, v31 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v4 +; SI-NEXT: v_cvt_f32_f16_e32 v28, s44 +; SI-NEXT: v_or_b32_e32 v54, v3, v31 +; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v1 +; SI-NEXT: v_or_b32_e32 v33, v30, v31 +; SI-NEXT: v_cvt_f32_f16_e32 v30, s6 +; SI-NEXT: v_cvt_f16_f32_e32 v31, v26 +; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v28 +; SI-NEXT: v_cvt_f16_f32_e32 v28, v26 +; SI-NEXT: v_add_f32_e32 v26, 0x38000000, v30 +; SI-NEXT: v_cvt_f16_f32_e32 v30, v26 +; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 -; SI-NEXT: v_or_b32_e32 v62, v34, v12 -; SI-NEXT: v_mov_b32_e32 v34, v47 -; SI-NEXT: v_lshr_b64 v[58:59], v[46:47], 16 -; SI-NEXT: v_lshr_b64 v[56:57], v[2:3], 16 -; SI-NEXT: v_mov_b32_e32 v2, v25 -; SI-NEXT: v_lshr_b64 v[46:47], v[4:5], 16 -; SI-NEXT: v_mov_b32_e32 v4, v24 -; SI-NEXT: v_lshr_b64 v[24:25], v[35:36], 16 -; SI-NEXT: v_mov_b32_e32 v35, v41 -; SI-NEXT: v_lshr_b64 v[40:41], v[40:41], 16 -; SI-NEXT: v_or_b32_e32 v48, v32, v60 -; SI-NEXT: v_or_b32_e32 v49, v31, v28 -; SI-NEXT: v_mov_b32_e32 v52, v36 -; SI-NEXT: v_mov_b32_e32 v31, v17 -; SI-NEXT: v_lshr_b64 v[32:33], v[16:17], 16 -; SI-NEXT: v_mov_b32_e32 v41, v20 -; SI-NEXT: v_lshr_b64 v[16:17], v[19:20], 16 -; SI-NEXT: v_mov_b32_e32 v59, v21 -; SI-NEXT: v_mov_b32_e32 v36, v43 -; SI-NEXT: v_lshr_b64 v[20:21], v[42:43], 16 -; SI-NEXT: v_lshr_b64 v[25:26], v[26:27], 16 -; SI-NEXT: v_lshr_b64 v[42:43], v[12:13], 16 -; SI-NEXT: v_mov_b32_e32 v12, v45 -; SI-NEXT: v_mov_b32_e32 v47, v55 -; SI-NEXT: v_lshr_b64 v[54:55], v[54:55], 16 -; SI-NEXT: v_mov_b32_e32 v33, v50 -; SI-NEXT: v_mov_b32_e32 v50, v27 -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_lshr_b64 v[26:27], v[44:45], 16 -; SI-NEXT: v_or_b32_e32 v51, v30, v44 -; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v30, v13 -; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[56:57], v[53:54], 16 +; SI-NEXT: v_or_b32_e32 v62, v30, v28 +; SI-NEXT: v_mov_b32_e32 v30, v37 +; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v0 +; SI-NEXT: v_mov_b32_e32 v0, v52 +; SI-NEXT: v_or_b32_e32 v3, v31, v26 +; SI-NEXT: v_lshr_b64 v[52:53], v[14:15], 16 +; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v7, v33 +; SI-NEXT: v_lshr_b64 v[58:59], v[32:33], 16 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshr_b64 v[12:13], v[28:29], 16 -; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload -; SI-NEXT: v_mov_b32_e32 v19, v23 -; SI-NEXT: v_lshr_b64 v[22:23], v[22:23], 16 -; SI-NEXT: v_mov_b32_e32 v44, v61 -; SI-NEXT: v_lshr_b64 v[60:61], v[60:61], 16 -; SI-NEXT: v_mov_b32_e32 v17, v0 -; SI-NEXT: v_mov_b32_e32 v23, v14 -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v3, v54 +; SI-NEXT: v_lshr_b64 v[32:33], v[39:40], 16 +; SI-NEXT: v_lshr_b64 v[30:31], v[42:43], 16 +; SI-NEXT: v_lshr_b64 v[53:54], v[26:27], 16 +; SI-NEXT: v_mov_b32_e32 v57, v35 +; SI-NEXT: v_lshr_b64 v[46:47], v[34:35], 16 +; SI-NEXT: v_lshr_b64 v[44:45], v[36:37], 16 +; SI-NEXT: v_mov_b32_e32 v33, v55 +; SI-NEXT: v_mov_b32_e32 v31, v60 +; SI-NEXT: v_lshr_b64 v[59:60], v[18:19], 16 +; SI-NEXT: v_lshr_b64 v[34:35], v[24:25], 16 +; SI-NEXT: v_lshr_b64 v[47:48], v[8:9], 16 +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v45, v43 +; SI-NEXT: v_lshr_b64 v[42:43], v[16:17], 16 +; SI-NEXT: v_mov_b32_e32 v16, v38 +; SI-NEXT: v_lshr_b64 v[38:39], v[20:21], 16 +; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload +; SI-NEXT: v_lshr_b64 v[36:37], v[22:23], 16 +; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload +; SI-NEXT: v_mov_b32_e32 v48, v40 +; SI-NEXT: v_mov_b32_e32 v14, v61 +; SI-NEXT: v_mov_b32_e32 v61, v17 +; SI-NEXT: v_mov_b32_e32 v43, v19 +; SI-NEXT: v_mov_b32_e32 v39, v2 +; SI-NEXT: v_mov_b32_e32 v40, v23 +; SI-NEXT: v_mov_b32_e32 v37, v6 +; SI-NEXT: v_lshr_b64 v[54:55], v[28:29], 16 +; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload ; SI-NEXT: s_branch .LBB59_5 ; SI-NEXT: .LBB59_3: ; SI-NEXT: s_branch .LBB59_2 ; SI-NEXT: .LBB59_4: -; SI-NEXT: v_mov_b32_e32 v11, s13 -; SI-NEXT: v_mov_b32_e32 v1, s9 -; SI-NEXT: v_mov_b32_e32 v12, s45 -; SI-NEXT: v_mov_b32_e32 v0, s57 -; SI-NEXT: v_mov_b32_e32 v53, s75 -; SI-NEXT: v_mov_b32_e32 v45, s73 -; SI-NEXT: v_mov_b32_e32 v28, s63 -; SI-NEXT: v_mov_b32_e32 v27, s62 -; SI-NEXT: v_mov_b32_e32 v23, s60 -; SI-NEXT: v_mov_b32_e32 v37, s58 -; SI-NEXT: v_mov_b32_e32 v39, s56 -; SI-NEXT: v_mov_b32_e32 v17, s46 -; SI-NEXT: v_mov_b32_e32 v18, s15 +; SI-NEXT: v_mov_b32_e32 v1, s7 +; SI-NEXT: v_mov_b32_e32 v2, s23 +; SI-NEXT: v_mov_b32_e32 v0, s63 +; SI-NEXT: v_mov_b32_e32 v55, s73 +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_mov_b32_e32 v60, s72 +; SI-NEXT: v_mov_b32_e32 v37, s61 +; SI-NEXT: v_mov_b32_e32 v39, s58 +; SI-NEXT: v_mov_b32_e32 v49, s56 +; SI-NEXT: v_mov_b32_e32 v51, s46 +; SI-NEXT: v_mov_b32_e32 v50, s43 +; SI-NEXT: v_mov_b32_e32 v31, s41 +; SI-NEXT: v_mov_b32_e32 v33, s13 +; SI-NEXT: v_mov_b32_e32 v41, s12 +; SI-NEXT: v_mov_b32_e32 v13, s11 +; SI-NEXT: v_mov_b32_e32 v11, s10 +; SI-NEXT: v_mov_b32_e32 v5, s9 +; SI-NEXT: v_mov_b32_e32 v4, s8 +; SI-NEXT: v_mov_b32_e32 v7, s17 +; SI-NEXT: v_mov_b32_e32 v3, s19 +; SI-NEXT: v_mov_b32_e32 v57, s21 +; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill +; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v9, s25 +; SI-NEXT: v_mov_b32_e32 v48, s27 +; SI-NEXT: v_mov_b32_e32 v45, s29 ; SI-NEXT: v_mov_b32_e32 v15, s14 -; SI-NEXT: v_mov_b32_e32 v9, s12 -; SI-NEXT: v_mov_b32_e32 v7, s11 -; SI-NEXT: v_mov_b32_e32 v38, s10 -; SI-NEXT: v_mov_b32_e32 v49, s7 -; SI-NEXT: v_mov_b32_e32 v48, s8 -; SI-NEXT: v_mov_b32_e32 v51, s74 +; SI-NEXT: s_waitcnt expcnt(3) +; SI-NEXT: v_mov_b32_e32 v61, s15 +; SI-NEXT: v_mov_b32_e32 v43, s40 +; SI-NEXT: v_mov_b32_e32 v21, s42 +; SI-NEXT: v_mov_b32_e32 v40, s45 +; SI-NEXT: v_mov_b32_e32 v25, s47 +; SI-NEXT: v_mov_b32_e32 v27, s57 +; SI-NEXT: v_mov_b32_e32 v29, s59 +; SI-NEXT: s_waitcnt expcnt(2) +; SI-NEXT: v_mov_b32_e32 v62, s6 +; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v28, s75 +; SI-NEXT: v_mov_b32_e32 v35, s76 +; SI-NEXT: v_mov_b32_e32 v26, s78 +; SI-NEXT: v_mov_b32_e32 v22, s89 +; SI-NEXT: v_mov_b32_e32 v24, s92 +; SI-NEXT: v_mov_b32_e32 v20, s95 +; SI-NEXT: v_mov_b32_e32 v16, s28 +; SI-NEXT: v_mov_b32_e32 v18, s26 +; SI-NEXT: v_mov_b32_e32 v14, s24 +; SI-NEXT: v_mov_b32_e32 v10, s22 +; SI-NEXT: v_mov_b32_e32 v12, s20 +; SI-NEXT: v_mov_b32_e32 v8, s18 ; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_mov_b32_e32 v62, s77 -; SI-NEXT: v_mov_b32_e32 v43, s88 -; SI-NEXT: v_mov_b32_e32 v21, s91 -; SI-NEXT: v_mov_b32_e32 v33, s94 -; SI-NEXT: v_mov_b32_e32 v55, s30 -; SI-NEXT: v_mov_b32_e32 v59, s28 -; SI-NEXT: v_mov_b32_e32 v57, s26 -; SI-NEXT: v_mov_b32_e32 v10, s24 -; SI-NEXT: v_mov_b32_e32 v8, s22 -; SI-NEXT: v_mov_b32_e32 v6, s20 -; SI-NEXT: v_mov_b32_e32 v4, s18 -; SI-NEXT: v_mov_b32_e32 v2, s16 -; SI-NEXT: v_mov_b32_e32 v34, s17 -; SI-NEXT: v_mov_b32_e32 v3, s19 -; SI-NEXT: v_mov_b32_e32 v5, s21 -; SI-NEXT: v_mov_b32_e32 v52, s23 -; SI-NEXT: v_mov_b32_e32 v31, s25 -; SI-NEXT: v_mov_b32_e32 v35, s27 -; SI-NEXT: v_mov_b32_e32 v47, s29 -; SI-NEXT: v_mov_b32_e32 v41, s40 -; SI-NEXT: v_mov_b32_e32 v19, s41 -; SI-NEXT: v_mov_b32_e32 v36, s42 -; SI-NEXT: v_mov_b32_e32 v50, s43 -; SI-NEXT: v_mov_b32_e32 v30, s44 -; SI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill -; SI-NEXT: v_mov_b32_e32 v44, s47 -; SI-NEXT: v_mov_b32_e32 v29, s6 +; SI-NEXT: v_mov_b32_e32 v0, s16 ; SI-NEXT: v_mov_b32_e32 v58, s35 ; SI-NEXT: v_mov_b32_e32 v56, s34 ; SI-NEXT: v_mov_b32_e32 v46, s31 -; SI-NEXT: v_mov_b32_e32 v24, s95 -; SI-NEXT: v_mov_b32_e32 v32, s93 -; SI-NEXT: v_mov_b32_e32 v40, s90 -; SI-NEXT: v_mov_b32_e32 v54, s79 -; SI-NEXT: v_mov_b32_e32 v16, s92 -; SI-NEXT: v_mov_b32_e32 v22, s89 -; SI-NEXT: v_mov_b32_e32 v20, s78 -; SI-NEXT: v_mov_b32_e32 v25, s76 -; SI-NEXT: v_mov_b32_e32 v42, s72 -; SI-NEXT: v_mov_b32_e32 v26, s61 -; SI-NEXT: v_mov_b32_e32 v60, s59 -; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill +; SI-NEXT: v_mov_b32_e32 v44, s30 +; SI-NEXT: v_mov_b32_e32 v47, s94 +; SI-NEXT: v_mov_b32_e32 v32, s91 +; SI-NEXT: v_mov_b32_e32 v30, s88 +; SI-NEXT: v_mov_b32_e32 v52, s93 +; SI-NEXT: v_mov_b32_e32 v42, s90 +; SI-NEXT: v_mov_b32_e32 v59, s79 +; SI-NEXT: v_mov_b32_e32 v38, s77 +; SI-NEXT: v_mov_b32_e32 v36, s74 +; SI-NEXT: v_mov_b32_e32 v34, s62 +; SI-NEXT: v_mov_b32_e32 v53, s60 +; SI-NEXT: v_mov_b32_e32 v54, s44 ; SI-NEXT: .LBB59_5: ; %end -; SI-NEXT: s_waitcnt expcnt(1) -; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v58 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_or_b32_e32 v0, v2, v0 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v34 -; SI-NEXT: s_waitcnt expcnt(0) +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v58 +; SI-NEXT: v_or_b32_e32 v0, v0, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v7 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_or_b32_e32 v1, v2, v1 -; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v56 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: v_or_b32_e32 v2, v4, v2 +; SI-NEXT: s_waitcnt vmcnt(9) +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v56 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v38 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_or_b32_e32 v2, v2, v6 ; SI-NEXT: v_or_b32_e32 v3, v3, v4 -; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v46 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_or_b32_e32 v4, v6, v4 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v7 -; SI-NEXT: v_or_b32_e32 v5, v5, v6 -; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v24 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_or_b32_e32 v6, v8, v6 -; SI-NEXT: v_and_b32_e32 v7, 0xffff, v52 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v9 +; SI-NEXT: v_and_b32_e32 v4, 0xffff, v12 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v46 +; SI-NEXT: v_or_b32_e32 v4, v4, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v57 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_or_b32_e32 v5, v6, v5 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v10 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v44 +; SI-NEXT: v_or_b32_e32 v6, v6, v8 +; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v47 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v32 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v61 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v43 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v40 +; SI-NEXT: v_and_b32_e32 v25, 0xffff, v25 +; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27 +; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 +; SI-NEXT: v_readlane_b32 s30, v63, 2 +; SI-NEXT: v_readlane_b32 s31, v63, 3 +; SI-NEXT: v_readlane_b32 s35, v63, 1 +; SI-NEXT: v_readlane_b32 s34, v63, 0 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v8 +; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v11 ; SI-NEXT: v_or_b32_e32 v7, v7, v8 -; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v32 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 -; SI-NEXT: v_or_b32_e32 v8, v10, v8 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v31 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v11 +; SI-NEXT: v_and_b32_e32 v8, 0xffff, v14 +; SI-NEXT: v_or_b32_e32 v8, v8, v10 +; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v13 ; SI-NEXT: v_or_b32_e32 v9, v9, v10 -; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v40 -; SI-NEXT: s_waitcnt vmcnt(8) -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v57 -; SI-NEXT: v_or_b32_e32 v10, v12, v10 -; SI-NEXT: v_and_b32_e32 v11, 0xffff, v35 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v15 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v18 +; SI-NEXT: v_or_b32_e32 v10, v10, v12 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v48 +; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v41 ; SI-NEXT: v_or_b32_e32 v11, v11, v12 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v54 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v59 -; SI-NEXT: v_or_b32_e32 v12, v14, v12 -; SI-NEXT: v_and_b32_e32 v13, 0xffff, v47 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v18 +; SI-NEXT: v_and_b32_e32 v12, 0xffff, v16 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v30 +; SI-NEXT: v_or_b32_e32 v12, v12, v14 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v45 +; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v33 ; SI-NEXT: v_or_b32_e32 v13, v13, v14 -; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v16 -; SI-NEXT: s_waitcnt vmcnt(7) -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v55 -; SI-NEXT: v_or_b32_e32 v14, v16, v14 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v41 -; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v17 +; SI-NEXT: v_and_b32_e32 v14, 0xffff, v20 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v52 +; SI-NEXT: v_or_b32_e32 v14, v14, v16 +; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v31 ; SI-NEXT: v_or_b32_e32 v15, v15, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v33 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v22 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v24 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v42 ; SI-NEXT: v_or_b32_e32 v16, v16, v18 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v19 -; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v39 +; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v50 ; SI-NEXT: v_or_b32_e32 v17, v17, v18 -; SI-NEXT: s_waitcnt vmcnt(6) -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v21 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v22 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v59 ; SI-NEXT: v_or_b32_e32 v18, v18, v20 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v36 -; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v37 +; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v51 ; SI-NEXT: v_or_b32_e32 v19, v19, v20 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v43 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v25 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v26 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v38 ; SI-NEXT: v_or_b32_e32 v20, v20, v22 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v50 -; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v23 +; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v49 ; SI-NEXT: v_or_b32_e32 v21, v21, v22 -; SI-NEXT: v_and_b32_e32 v22, 0xffff, v62 -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v42 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v35 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v36 ; SI-NEXT: v_or_b32_e32 v22, v22, v24 -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v30 -; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v27 +; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v39 ; SI-NEXT: v_or_b32_e32 v23, v23, v24 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v51 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v28 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v34 ; SI-NEXT: v_or_b32_e32 v24, v24, v26 -; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v27, 0xffff, v44 -; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload -; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29 -; SI-NEXT: v_readlane_b32 s30, v63, 2 -; SI-NEXT: v_readlane_b32 s31, v63, 3 -; SI-NEXT: v_readlane_b32 s35, v63, 1 -; SI-NEXT: v_readlane_b32 s34, v63, 0 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v25, 0xffff, v26 -; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v28 +; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v37 ; SI-NEXT: v_or_b32_e32 v25, v25, v26 -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v48 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v60 +; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v54 +; SI-NEXT: s_waitcnt vmcnt(0) +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v26 ; SI-NEXT: v_or_b32_e32 v26, v26, v28 -; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v45 +; SI-NEXT: v_lshlrev_b32_e32 v28, 16, v60 +; SI-NEXT: v_or_b32_e32 v27, v27, v28 +; SI-NEXT: v_and_b32_e32 v28, 0xffff, v62 ; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload @@ -50395,15 +50530,11 @@ define inreg <60 x i16> @bitcast_v60f16_to_v60i16_scalar(<60 x half> inreg %a, i ; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload ; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload -; SI-NEXT: v_or_b32_e32 v27, v27, v28 -; SI-NEXT: v_and_b32_e32 v28, 0xffff, v49 -; SI-NEXT: s_waitcnt vmcnt(14) -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 ; SI-NEXT: v_or_b32_e32 v28, v28, v30 -; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v53 +; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v55 ; SI-NEXT: v_or_b32_e32 v29, v29, v30 ; SI-NEXT: s_or_saveexec_b64 s[4:5], -1 -; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload +; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload ; SI-NEXT: s_mov_b64 exec, s[4:5] ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_setpc_b64 s[30:31] diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll index a1c0db086bf3c..b433031693b87 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll @@ -7972,66 +7972,66 @@ define inreg <12 x i8> @bitcast_v6bf16_to_v12i8_scalar(<6 x bfloat> inreg %a, i3 ; SI-NEXT: s_and_b32 s8, s16, 0xffff0000 ; SI-NEXT: s_lshl_b32 s9, s16, 16 ; SI-NEXT: s_cmp_lg_u32 s19, 0 -; SI-NEXT: v_mul_f32_e64 v21, 1.0, s8 +; SI-NEXT: v_mul_f32_e64 v22, 1.0, s8 ; SI-NEXT: v_mul_f32_e64 v0, 1.0, s9 -; SI-NEXT: v_mul_f32_e64 v20, 1.0, s6 +; SI-NEXT: v_mul_f32_e64 v21, 1.0, s6 ; SI-NEXT: v_mul_f32_e64 v5, 1.0, s7 -; SI-NEXT: v_mul_f32_e64 v19, 1.0, s4 +; SI-NEXT: v_mul_f32_e64 v20, 1.0, s4 ; SI-NEXT: v_mul_f32_e64 v9, 1.0, s5 ; SI-NEXT: s_cbranch_scc0 .LBB39_4 ; SI-NEXT: ; %bb.1: ; %cmp.false -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v21 -; SI-NEXT: v_lshr_b64 v[16:17], v[0:1], 16 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v20 -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v19 -; SI-NEXT: v_lshr_b64 v[17:18], v[5:6], 16 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v22 +; SI-NEXT: v_lshr_b64 v[17:18], v[0:1], 16 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v21 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v20 +; SI-NEXT: v_lshr_b64 v[18:19], v[5:6], 16 ; SI-NEXT: v_lshr_b64 v[13:14], v[9:10], 16 -; SI-NEXT: v_lshr_b64 v[3:4], v[16:17], 24 -; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v20 -; SI-NEXT: v_lshrrev_b32_e32 v11, 24, v19 -; SI-NEXT: v_lshrrev_b32_e32 v8, 8, v17 +; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 24 +; SI-NEXT: v_lshr_b64 v[15:16], v[17:18], 16 +; SI-NEXT: v_lshr_b64 v[1:2], v[17:18], 8 +; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v21 +; SI-NEXT: v_lshrrev_b32_e32 v11, 24, v20 +; SI-NEXT: v_lshrrev_b32_e32 v8, 8, v18 ; SI-NEXT: v_lshrrev_b32_e32 v12, 8, v13 -; SI-NEXT: v_lshr_b64 v[14:15], v[16:17], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[16:17], 8 ; SI-NEXT: s_cbranch_execnz .LBB39_3 ; SI-NEXT: .LBB39_2: ; %cmp.true -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v21 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v22 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 ; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_lshr_b64 v[16:17], v[0:1], 16 +; SI-NEXT: v_lshr_b64 v[17:18], v[0:1], 16 ; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v5 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v20 +; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v21 ; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v9 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v0 ; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v1 -; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v19 -; SI-NEXT: v_lshr_b64 v[17:18], v[5:6], 16 +; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v20 +; SI-NEXT: v_lshr_b64 v[18:19], v[5:6], 16 ; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v1 ; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v5 ; SI-NEXT: v_lshr_b64 v[13:14], v[9:10], 16 -; SI-NEXT: v_lshr_b64 v[3:4], v[16:17], 24 -; SI-NEXT: v_lshr_b64 v[14:15], v[16:17], 16 -; SI-NEXT: v_lshr_b64 v[1:2], v[16:17], 8 -; SI-NEXT: v_lshrrev_b32_e32 v8, 8, v17 +; SI-NEXT: v_lshr_b64 v[3:4], v[17:18], 24 +; SI-NEXT: v_lshr_b64 v[15:16], v[17:18], 16 +; SI-NEXT: v_lshr_b64 v[1:2], v[17:18], 8 +; SI-NEXT: v_lshrrev_b32_e32 v8, 8, v18 ; SI-NEXT: v_lshrrev_b32_e32 v12, 8, v13 ; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v0 ; SI-NEXT: v_lshrrev_b32_e32 v11, 24, v5 ; SI-NEXT: .LBB39_3: ; %end -; SI-NEXT: v_mov_b32_e32 v0, v16 -; SI-NEXT: v_mov_b32_e32 v2, v14 -; SI-NEXT: v_mov_b32_e32 v4, v17 +; SI-NEXT: v_mov_b32_e32 v0, v17 +; SI-NEXT: v_mov_b32_e32 v2, v15 +; SI-NEXT: v_mov_b32_e32 v4, v18 ; SI-NEXT: v_mov_b32_e32 v5, v8 ; SI-NEXT: v_mov_b32_e32 v8, v13 ; SI-NEXT: v_mov_b32_e32 v9, v12 ; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: .LBB39_4: -; SI-NEXT: ; implicit-def: $vgpr16 +; SI-NEXT: ; implicit-def: $vgpr17 ; SI-NEXT: ; implicit-def: $vgpr1 -; SI-NEXT: ; implicit-def: $vgpr14 +; SI-NEXT: ; implicit-def: $vgpr15 ; SI-NEXT: ; implicit-def: $vgpr3 ; SI-NEXT: ; implicit-def: $vgpr8 ; SI-NEXT: ; implicit-def: $vgpr7 diff --git a/llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll b/llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll index 8d2e1c8b89ffd..0a1d33cbb50be 100644 --- a/llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll +++ b/llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll @@ -7,8 +7,8 @@ define amdgpu_kernel void @vgpr_mfma_pass_av_split_crash(double %arg1, i1 %arg2, ; CHECK-NEXT: s_load_dword s0, s[4:5], 0x8 ; CHECK-NEXT: s_load_dwordx2 s[10:11], s[4:5], 0x0 ; CHECK-NEXT: s_load_dwordx4 s[12:15], s[4:5], 0x10 -; CHECK-NEXT: v_mov_b32_e32 v30, 0x9037ab78 -; CHECK-NEXT: v_mov_b32_e32 v31, 0x3e21eeb6 +; CHECK-NEXT: v_mov_b32_e32 v20, 0x9037ab78 +; CHECK-NEXT: v_mov_b32_e32 v21, 0x3e21eeb6 ; CHECK-NEXT: s_waitcnt lgkmcnt(0) ; CHECK-NEXT: s_bitcmp1_b32 s0, 0 ; CHECK-NEXT: s_cselect_b64 s[16:17], -1, 0 @@ -30,19 +30,18 @@ define amdgpu_kernel void @vgpr_mfma_pass_av_split_crash(double %arg1, i1 %arg2, ; CHECK-NEXT: v_mov_b32_e32 v10, 0xa57d9582 ; CHECK-NEXT: v_mov_b32_e32 v11, 0xbf8c6ea4 ; CHECK-NEXT: v_mov_b32_e32 v12, 0xe82d3ff0 +; CHECK-NEXT: s_mov_b64 s[22:23], 0 +; CHECK-NEXT: s_and_b64 s[4:5], exec, s[16:17] +; CHECK-NEXT: s_and_b64 s[6:7], exec, s[18:19] ; CHECK-NEXT: v_mov_b32_e32 v13, 0xbfa59976 ; CHECK-NEXT: v_mov_b32_e32 v14, 0x8427b883 ; CHECK-NEXT: v_mov_b32_e32 v15, 0x3fae1bb4 -; CHECK-NEXT: s_mov_b64 s[22:23], 0 ; CHECK-NEXT: v_mov_b32_e32 v16, 0x57b87036 ; CHECK-NEXT: v_mov_b32_e32 v17, 0x3fb3b136 -; CHECK-NEXT: s_and_b64 s[4:5], exec, s[16:17] ; CHECK-NEXT: v_mov_b32_e32 v18, 0x55555523 ; CHECK-NEXT: v_mov_b32_e32 v19, 0xbfd55555 -; CHECK-NEXT: s_and_b64 s[6:7], exec, s[18:19] -; CHECK-NEXT: v_mov_b32_e32 v0, 0 -; CHECK-NEXT: v_mov_b64_e32 v[20:21], 0 -; CHECK-NEXT: ; implicit-def: $agpr0_agpr1 +; CHECK-NEXT: v_mov_b64_e32 v[26:27], 0 +; CHECK-NEXT: ; implicit-def: $vgpr30_vgpr31 ; CHECK-NEXT: ; implicit-def: $vgpr22_vgpr23 ; CHECK-NEXT: s_branch .LBB0_2 ; CHECK-NEXT: .LBB0_1: ; %Flow9 @@ -62,10 +61,10 @@ define amdgpu_kernel void @vgpr_mfma_pass_av_split_crash(double %arg1, i1 %arg2, ; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=1 ; CHECK-NEXT: v_mov_b64_e32 v[24:25], s[14:15] ; CHECK-NEXT: flat_load_dwordx2 v[24:25], v[24:25] -; CHECK-NEXT: v_mov_b64_e32 v[26:27], v[30:31] +; CHECK-NEXT: v_mov_b64_e32 v[26:27], v[20:21] ; CHECK-NEXT: v_mov_b64_e32 v[28:29], v[2:3] -; CHECK-NEXT: v_accvgpr_write_b32 a2, 0 -; CHECK-NEXT: v_accvgpr_write_b32 a3, 0 +; CHECK-NEXT: v_accvgpr_write_b32 a0, 0 +; CHECK-NEXT: v_accvgpr_write_b32 a1, 0 ; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; CHECK-NEXT: v_fmac_f64_e32 v[26:27], 0, v[24:25] ; CHECK-NEXT: v_fmac_f64_e32 v[28:29], 0, v[26:27] @@ -93,32 +92,30 @@ define amdgpu_kernel void @vgpr_mfma_pass_av_split_crash(double %arg1, i1 %arg2, ; CHECK-NEXT: .LBB0_6: ; %.preheader1855.i.i.i3329 ; CHECK-NEXT: ; Parent Loop BB0_2 Depth=1 ; CHECK-NEXT: ; => This Inner Loop Header: Depth=2 -; CHECK-NEXT: v_accvgpr_read_b32 v27, a3 -; CHECK-NEXT: v_accvgpr_read_b32 v26, a2 +; CHECK-NEXT: v_accvgpr_read_b32 v27, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v26, a0 ; CHECK-NEXT: s_mov_b64 s[24:25], -1 ; CHECK-NEXT: s_mov_b64 s[8:9], -1 ; CHECK-NEXT: s_mov_b64 vcc, s[2:3] -; CHECK-NEXT: ; implicit-def: $agpr2_agpr3 +; CHECK-NEXT: ; implicit-def: $agpr0_agpr1 ; CHECK-NEXT: s_cbranch_vccz .LBB0_5 ; CHECK-NEXT: ; %bb.7: ; %.lr.ph2070.i.i.i3291 ; CHECK-NEXT: ; in Loop: Header=BB0_6 Depth=2 -; CHECK-NEXT: v_accvgpr_mov_b32 a3, a1 -; CHECK-NEXT: v_accvgpr_mov_b32 a2, a0 +; CHECK-NEXT: v_accvgpr_write_b32 a0, v30 ; CHECK-NEXT: s_mov_b64 s[8:9], s[18:19] +; CHECK-NEXT: v_accvgpr_write_b32 a1, v31 ; CHECK-NEXT: s_mov_b64 vcc, s[6:7] ; CHECK-NEXT: s_cbranch_vccz .LBB0_5 ; CHECK-NEXT: ; %bb.8: ; %.preheader1856.preheader.i.i.i3325 ; CHECK-NEXT: ; in Loop: Header=BB0_6 Depth=2 -; CHECK-NEXT: v_accvgpr_write_b32 a2, v28 +; CHECK-NEXT: v_accvgpr_write_b32 a0, v28 ; CHECK-NEXT: s_mov_b64 s[24:25], 0 -; CHECK-NEXT: v_accvgpr_write_b32 a3, v29 ; CHECK-NEXT: s_mov_b64 s[8:9], 0 +; CHECK-NEXT: v_accvgpr_write_b32 a1, v29 ; CHECK-NEXT: s_branch .LBB0_5 ; CHECK-NEXT: .LBB0_9: ; in Loop: Header=BB0_2 Depth=1 -; CHECK-NEXT: v_mov_b64_e32 v[24:25], s[10:11] -; CHECK-NEXT: v_accvgpr_write_b32 a0, v24 ; CHECK-NEXT: s_mov_b64 s[22:23], 0 -; CHECK-NEXT: v_accvgpr_write_b32 a1, v25 +; CHECK-NEXT: v_mov_b64_e32 v[30:31], s[10:11] ; CHECK-NEXT: s_mov_b64 s[8:9], s[20:21] ; CHECK-NEXT: s_branch .LBB0_15 ; CHECK-NEXT: .LBB0_10: ; in Loop: Header=BB0_2 Depth=1 @@ -132,24 +129,24 @@ define amdgpu_kernel void @vgpr_mfma_pass_av_split_crash(double %arg1, i1 %arg2, ; CHECK-NEXT: ; %bb.12: ; %._crit_edge2105.i.i.i2330.loopexit ; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=1 ; CHECK-NEXT: v_cmp_nlg_f64_e64 s[8:9], 0, v[26:27] -; CHECK-NEXT: v_accvgpr_write_b32 a0, v24 +; CHECK-NEXT: v_mov_b32_e32 v0, 0 ; CHECK-NEXT: v_cndmask_b32_e64 v23, v23, 0, s[16:17] ; CHECK-NEXT: v_cndmask_b32_e64 v26, 0, 1, s[8:9] -; CHECK-NEXT: v_mov_b32_e32 v27, v26 ; CHECK-NEXT: s_and_b64 s[8:9], exec, s[16:17] +; CHECK-NEXT: v_mov_b32_e32 v27, v26 ; CHECK-NEXT: v_cndmask_b32_e64 v22, v22, 0, s[16:17] -; CHECK-NEXT: global_store_dwordx2 v0, v[26:27], s[12:13] ; CHECK-NEXT: s_cselect_b32 s23, s23, 0 ; CHECK-NEXT: s_cselect_b32 s22, s22, 0 ; CHECK-NEXT: s_mov_b64 s[8:9], -1 +; CHECK-NEXT: global_store_dwordx2 v0, v[26:27], s[12:13] ; CHECK-NEXT: s_branch .LBB0_14 ; CHECK-NEXT: .LBB0_13: ; in Loop: Header=BB0_2 Depth=1 -; CHECK-NEXT: v_accvgpr_write_b32 a0, v24 ; CHECK-NEXT: s_mov_b64 s[8:9], 0 ; CHECK-NEXT: v_mov_b64_e32 v[22:23], 0 -; CHECK-NEXT: .LBB0_14: ; %Flow6 +; CHECK-NEXT: .LBB0_14: ; %Flow8 ; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=1 -; CHECK-NEXT: v_accvgpr_write_b32 a1, v25 +; CHECK-NEXT: v_mov_b64_e32 v[26:27], 0 +; CHECK-NEXT: v_mov_b64_e32 v[30:31], v[24:25] ; CHECK-NEXT: .LBB0_15: ; %Flow6 ; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=1 ; CHECK-NEXT: s_mov_b64 s[24:25], -1 @@ -157,8 +154,9 @@ define amdgpu_kernel void @vgpr_mfma_pass_av_split_crash(double %arg1, i1 %arg2, ; CHECK-NEXT: s_cbranch_vccz .LBB0_1 ; CHECK-NEXT: ; %bb.16: ; %._crit_edge2105.i.i.i2330 ; CHECK-NEXT: ; in Loop: Header=BB0_2 Depth=1 +; CHECK-NEXT: v_mov_b32_e32 v0, 0 ; CHECK-NEXT: s_mov_b64 s[24:25], 0 -; CHECK-NEXT: global_store_dwordx2 v0, v[20:21], s[12:13] +; CHECK-NEXT: global_store_dwordx2 v0, v[26:27], s[12:13] ; CHECK-NEXT: s_branch .LBB0_1 ; CHECK-NEXT: .LBB0_17: ; %DummyReturnBlock ; CHECK-NEXT: s_endpgm diff --git a/llvm/test/CodeGen/AMDGPU/bf16.ll b/llvm/test/CodeGen/AMDGPU/bf16.ll index aa165abe785d6..1a9ff9e672d94 100644 --- a/llvm/test/CodeGen/AMDGPU/bf16.ll +++ b/llvm/test/CodeGen/AMDGPU/bf16.ll @@ -7621,34 +7621,34 @@ define <16 x double> @global_extload_v16bf16_to_v16f64(ptr addrspace(1) %ptr) #0 ; GFX8-NEXT: flat_load_dwordx4 v[2:5], v[0:1] ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 16, v0 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc -; GFX8-NEXT: flat_load_dwordx4 v[6:9], v[0:1] +; GFX8-NEXT: flat_load_dwordx4 v[10:13], v[0:1] ; GFX8-NEXT: s_waitcnt vmcnt(1) ; GFX8-NEXT: v_lshlrev_b32_e32 v0, 16, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 -; GFX8-NEXT: v_lshlrev_b32_e32 v10, 16, v3 -; GFX8-NEXT: v_and_b32_e32 v11, 0xffff0000, v3 -; GFX8-NEXT: v_lshlrev_b32_e32 v12, 16, v4 -; GFX8-NEXT: v_and_b32_e32 v13, 0xffff0000, v4 -; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v5 -; GFX8-NEXT: v_and_b32_e32 v15, 0xffff0000, v5 +; GFX8-NEXT: v_lshlrev_b32_e32 v6, 16, v3 +; GFX8-NEXT: v_and_b32_e32 v7, 0xffff0000, v3 +; GFX8-NEXT: v_lshlrev_b32_e32 v8, 16, v4 +; GFX8-NEXT: v_and_b32_e32 v14, 0xffff0000, v4 +; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v5 +; GFX8-NEXT: v_and_b32_e32 v16, 0xffff0000, v5 ; GFX8-NEXT: s_waitcnt vmcnt(0) -; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v6 -; GFX8-NEXT: v_and_b32_e32 v18, 0xffff0000, v6 -; GFX8-NEXT: v_lshlrev_b32_e32 v20, 16, v7 -; GFX8-NEXT: v_and_b32_e32 v22, 0xffff0000, v7 -; GFX8-NEXT: v_lshlrev_b32_e32 v24, 16, v8 -; GFX8-NEXT: v_and_b32_e32 v26, 0xffff0000, v8 -; GFX8-NEXT: v_lshlrev_b32_e32 v28, 16, v9 -; GFX8-NEXT: v_and_b32_e32 v30, 0xffff0000, v9 +; GFX8-NEXT: v_lshlrev_b32_e32 v17, 16, v10 +; GFX8-NEXT: v_and_b32_e32 v18, 0xffff0000, v10 +; GFX8-NEXT: v_lshlrev_b32_e32 v20, 16, v11 +; GFX8-NEXT: v_and_b32_e32 v22, 0xffff0000, v11 +; GFX8-NEXT: v_lshlrev_b32_e32 v24, 16, v12 +; GFX8-NEXT: v_and_b32_e32 v26, 0xffff0000, v12 +; GFX8-NEXT: v_lshlrev_b32_e32 v28, 16, v13 +; GFX8-NEXT: v_and_b32_e32 v30, 0xffff0000, v13 ; GFX8-NEXT: v_cvt_f64_f32_e32 v[0:1], v0 ; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[4:5], v10 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[6:7], v11 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[8:9], v12 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[10:11], v13 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[12:13], v14 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v15 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[4:5], v6 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[6:7], v7 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[8:9], v8 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[10:11], v14 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[12:13], v15 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v16 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v17 ; GFX8-NEXT: v_cvt_f64_f32_e32 v[18:19], v18 ; GFX8-NEXT: v_cvt_f64_f32_e32 v[20:21], v20 ; GFX8-NEXT: v_cvt_f64_f32_e32 v[22:23], v22 @@ -7835,15 +7835,15 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GCN-NEXT: s_mov_b32 s7, 0xf000 ; GCN-NEXT: s_mov_b32 s4, s6 ; GCN-NEXT: s_mov_b32 s5, s6 -; GCN-NEXT: buffer_load_ushort v17, v[1:2], s[4:7], 0 addr64 offset:62 -; GCN-NEXT: buffer_load_ushort v18, v[1:2], s[4:7], 0 addr64 offset:60 -; GCN-NEXT: buffer_load_ushort v19, v[1:2], s[4:7], 0 addr64 offset:58 -; GCN-NEXT: buffer_load_ushort v20, v[1:2], s[4:7], 0 addr64 offset:56 -; GCN-NEXT: buffer_load_ushort v21, v[1:2], s[4:7], 0 addr64 offset:54 -; GCN-NEXT: buffer_load_ushort v22, v[1:2], s[4:7], 0 addr64 offset:52 -; GCN-NEXT: buffer_load_ushort v23, v[1:2], s[4:7], 0 addr64 offset:50 -; GCN-NEXT: buffer_load_ushort v24, v[1:2], s[4:7], 0 addr64 offset:48 -; GCN-NEXT: buffer_load_ushort v16, v[1:2], s[4:7], 0 addr64 offset:32 +; GCN-NEXT: buffer_load_ushort v16, v[1:2], s[4:7], 0 addr64 offset:62 +; GCN-NEXT: buffer_load_ushort v17, v[1:2], s[4:7], 0 addr64 offset:60 +; GCN-NEXT: buffer_load_ushort v18, v[1:2], s[4:7], 0 addr64 offset:58 +; GCN-NEXT: buffer_load_ushort v19, v[1:2], s[4:7], 0 addr64 offset:56 +; GCN-NEXT: buffer_load_ushort v20, v[1:2], s[4:7], 0 addr64 offset:54 +; GCN-NEXT: buffer_load_ushort v21, v[1:2], s[4:7], 0 addr64 offset:52 +; GCN-NEXT: buffer_load_ushort v22, v[1:2], s[4:7], 0 addr64 offset:50 +; GCN-NEXT: buffer_load_ushort v23, v[1:2], s[4:7], 0 addr64 offset:48 +; GCN-NEXT: buffer_load_ushort v24, v[1:2], s[4:7], 0 addr64 offset:32 ; GCN-NEXT: buffer_load_ushort v25, v[1:2], s[4:7], 0 addr64 offset:34 ; GCN-NEXT: buffer_load_ushort v26, v[1:2], s[4:7], 0 addr64 offset:36 ; GCN-NEXT: buffer_load_ushort v27, v[1:2], s[4:7], 0 addr64 offset:38 @@ -7852,258 +7852,256 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GCN-NEXT: buffer_load_ushort v30, v[1:2], s[4:7], 0 addr64 offset:44 ; GCN-NEXT: buffer_load_ushort v31, v[1:2], s[4:7], 0 addr64 offset:46 ; GCN-NEXT: buffer_load_ushort v32, v[1:2], s[4:7], 0 addr64 -; GCN-NEXT: buffer_load_ushort v15, v[1:2], s[4:7], 0 addr64 offset:2 +; GCN-NEXT: buffer_load_ushort v14, v[1:2], s[4:7], 0 addr64 offset:2 ; GCN-NEXT: buffer_load_ushort v13, v[1:2], s[4:7], 0 addr64 offset:4 ; GCN-NEXT: buffer_load_ushort v11, v[1:2], s[4:7], 0 addr64 offset:6 ; GCN-NEXT: buffer_load_ushort v9, v[1:2], s[4:7], 0 addr64 offset:8 -; GCN-NEXT: buffer_load_ushort v8, v[1:2], s[4:7], 0 addr64 offset:10 +; GCN-NEXT: buffer_load_ushort v7, v[1:2], s[4:7], 0 addr64 offset:10 ; GCN-NEXT: buffer_load_ushort v6, v[1:2], s[4:7], 0 addr64 offset:12 ; GCN-NEXT: buffer_load_ushort v4, v[1:2], s[4:7], 0 addr64 offset:14 ; GCN-NEXT: buffer_load_ushort v3, v[1:2], s[4:7], 0 addr64 offset:16 ; GCN-NEXT: buffer_load_ushort v5, v[1:2], s[4:7], 0 addr64 offset:18 -; GCN-NEXT: buffer_load_ushort v7, v[1:2], s[4:7], 0 addr64 offset:20 +; GCN-NEXT: buffer_load_ushort v8, v[1:2], s[4:7], 0 addr64 offset:20 ; GCN-NEXT: buffer_load_ushort v10, v[1:2], s[4:7], 0 addr64 offset:22 ; GCN-NEXT: buffer_load_ushort v12, v[1:2], s[4:7], 0 addr64 offset:24 -; GCN-NEXT: buffer_load_ushort v14, v[1:2], s[4:7], 0 addr64 offset:26 +; GCN-NEXT: buffer_load_ushort v15, v[1:2], s[4:7], 0 addr64 offset:26 ; GCN-NEXT: buffer_load_ushort v33, v[1:2], s[4:7], 0 addr64 offset:28 ; GCN-NEXT: buffer_load_ushort v34, v[1:2], s[4:7], 0 addr64 offset:30 ; GCN-NEXT: s_waitcnt vmcnt(14) -; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v17 +; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v16 ; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GCN-NEXT: v_add_i32_e32 v17, vcc, 0xfc, v0 -; GCN-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v16, vcc, 0xfc, v0 +; GCN-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v2, vcc, 0xf8, v0 ; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v18 +; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v17 ; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GCN-NEXT: v_add_i32_e32 v17, vcc, 0xf4, v0 -; GCN-NEXT: v_add_i32_e32 v18, vcc, 0xd8, v0 -; GCN-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v16, vcc, 0xf4, v0 +; GCN-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v2, vcc, 0xf0, v0 ; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v19 +; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v18 ; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GCN-NEXT: v_add_i32_e32 v17, vcc, 0xec, v0 -; GCN-NEXT: v_add_i32_e32 v19, vcc, 0xd4, v0 -; GCN-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v16, vcc, 0xec, v0 +; GCN-NEXT: v_add_i32_e32 v18, vcc, 0xd8, v0 +; GCN-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v2, vcc, 0xe8, v0 +; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v19 ; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v20 -; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GCN-NEXT: v_add_i32_e32 v17, vcc, 0xe4, v0 -; GCN-NEXT: v_add_i32_e32 v20, vcc, 0xd0, v0 -; GCN-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen +; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v16 +; GCN-NEXT: v_add_i32_e32 v16, vcc, 0xe4, v0 +; GCN-NEXT: v_add_i32_e32 v19, vcc, 0xd4, v0 +; GCN-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen +; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v20 +; GCN-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v2, vcc, 0xe0, v0 -; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v21 ; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v17 -; GCN-NEXT: v_add_i32_e32 v17, vcc, 0xdc, v0 -; GCN-NEXT: s_waitcnt vmcnt(14) -; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; GCN-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen -; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v22 -; GCN-NEXT: buffer_store_dword v1, v18, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 0xdc, v0 +; GCN-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen +; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v21 +; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GCN-NEXT: buffer_store_dword v16, v18, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 -; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v23 -; GCN-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v22 +; GCN-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 +; GCN-NEXT: v_add_i32_e32 v18, vcc, 0xd0, v0 ; GCN-NEXT: buffer_store_dword v2, v19, s[0:3], 0 offen -; GCN-NEXT: buffer_store_dword v1, v20, s[0:3], 0 offen +; GCN-NEXT: buffer_store_dword v1, v18, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v1, vcc, 0xcc, v0 -; GCN-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen -; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v24 +; GCN-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen +; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v23 ; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v18, vcc, 0xc8, v0 -; GCN-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v17, vcc, 0xc8, v0 +; GCN-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v17, vcc, 0xc4, v0 -; GCN-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen -; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v31 -; GCN-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GCN-NEXT: v_add_i32_e32 v16, vcc, 0xc4, v0 +; GCN-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen +; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v31 +; GCN-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v2, vcc, 0xc0, v0 ; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v1, vcc, 0xbc, v0 -; GCN-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen +; GCN-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v30 ; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v18, vcc, 0xb8, v0 -; GCN-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v17, vcc, 0xb8, v0 +; GCN-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v17, vcc, 0xb4, v0 -; GCN-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen -; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v29 -; GCN-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GCN-NEXT: v_add_i32_e32 v16, vcc, 0xb4, v0 +; GCN-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen +; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v29 +; GCN-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v2, vcc, 0xb0, v0 ; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v1, vcc, 0xac, v0 -; GCN-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen +; GCN-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v28 ; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v18, vcc, 0xa8, v0 -; GCN-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v17, vcc, 0xa8, v0 +; GCN-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v17, vcc, 0xa4, v0 -; GCN-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen -; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v27 -; GCN-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GCN-NEXT: v_add_i32_e32 v16, vcc, 0xa4, v0 +; GCN-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen +; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v27 +; GCN-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v2, vcc, 0xa0, v0 ; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v1, vcc, 0x9c, v0 -; GCN-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen +; GCN-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v26 ; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v18, vcc, 0x98, v0 -; GCN-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v17, vcc, 0x98, v0 +; GCN-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v17, vcc, 0x94, v0 -; GCN-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen -; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v25 -; GCN-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GCN-NEXT: v_add_i32_e32 v16, vcc, 0x94, v0 +; GCN-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen +; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v25 +; GCN-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v2, vcc, 0x90, v0 ; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: v_add_i32_e32 v1, vcc, 0x8c, v0 -; GCN-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v1, vcc, 0x88, v0 ; GCN-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen -; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v16 +; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v24 +; GCN-NEXT: v_add_i32_e32 v2, vcc, 0x88, v0 +; GCN-NEXT: buffer_store_dword v16, v2, s[0:3], 0 offen ; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GCN-NEXT: s_waitcnt expcnt(0) +; GCN-NEXT: s_waitcnt expcnt(1) ; GCN-NEXT: v_add_i32_e32 v17, vcc, 0x84, v0 -; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v32 +; GCN-NEXT: v_add_i32_e32 v18, vcc, 0x80, v0 ; GCN-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen +; GCN-NEXT: s_waitcnt vmcnt(14) expcnt(0) +; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v34 +; GCN-NEXT: buffer_store_dword v1, v18, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v2, vcc, 0x80, v0 -; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v16 -; GCN-NEXT: s_waitcnt vmcnt(14) -; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v34 -; GCN-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 +; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GCN-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GCN-NEXT: v_add_i32_e32 v18, vcc, 0x7c, v0 -; GCN-NEXT: v_add_i32_e32 v19, vcc, 0x74, v0 -; GCN-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen +; GCN-NEXT: buffer_store_dword v2, v18, s[0:3], 0 offen +; GCN-NEXT: v_cvt_f64_f32_e32 v[18:19], v14 ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v17, vcc, 0x78, v0 -; GCN-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen -; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v33 -; GCN-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v33 +; GCN-NEXT: v_add_i32_e32 v14, vcc, 0x78, v0 +; GCN-NEXT: buffer_store_dword v1, v14, s[0:3], 0 offen +; GCN-NEXT: s_waitcnt expcnt(0) +; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GCN-NEXT: v_add_i32_e32 v14, vcc, 0x74, v0 ; GCN-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GCN-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; GCN-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GCN-NEXT: buffer_store_dword v18, v19, s[0:3], 0 offen +; GCN-NEXT: buffer_store_dword v2, v14, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v18, vcc, 0x70, v0 -; GCN-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen +; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v15 +; GCN-NEXT: v_add_i32_e32 v15, vcc, 0x70, v0 +; GCN-NEXT: buffer_store_dword v1, v15, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_cvt_f64_f32_e32 v[17:18], v13 -; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v14 -; GCN-NEXT: v_cvt_f64_f32_e32 v[13:14], v13 -; GCN-NEXT: v_add_i32_e32 v19, vcc, 0x6c, v0 -; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GCN-NEXT: buffer_store_dword v14, v19, s[0:3], 0 offen +; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GCN-NEXT: v_add_i32_e32 v15, vcc, 0x6c, v0 +; GCN-NEXT: v_cvt_f64_f32_e32 v[20:21], v11 +; GCN-NEXT: buffer_store_dword v2, v15, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v14, vcc, 0x68, v0 -; GCN-NEXT: buffer_store_dword v13, v14, s[0:3], 0 offen +; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v12 +; GCN-NEXT: v_add_i32_e32 v11, vcc, 0x68, v0 +; GCN-NEXT: buffer_store_dword v1, v11, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_cvt_f64_f32_e32 v[13:14], v11 -; GCN-NEXT: v_lshlrev_b32_e32 v11, 16, v12 -; GCN-NEXT: v_cvt_f64_f32_e32 v[11:12], v11 -; GCN-NEXT: v_add_i32_e32 v19, vcc, 0x64, v0 -; GCN-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GCN-NEXT: buffer_store_dword v12, v19, s[0:3], 0 offen +; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GCN-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GCN-NEXT: v_add_i32_e32 v11, vcc, 0x64, v0 +; GCN-NEXT: buffer_store_dword v2, v11, s[0:3], 0 offen +; GCN-NEXT: v_cvt_f64_f32_e32 v[11:12], v9 ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v12, vcc, 0x60, v0 -; GCN-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen +; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v10 +; GCN-NEXT: v_add_i32_e32 v9, vcc, 0x60, v0 +; GCN-NEXT: buffer_store_dword v1, v9, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_cvt_f64_f32_e32 v[11:12], v9 -; GCN-NEXT: v_lshlrev_b32_e32 v9, 16, v10 -; GCN-NEXT: v_cvt_f64_f32_e32 v[9:10], v9 -; GCN-NEXT: v_add_i32_e32 v19, vcc, 0x5c, v0 -; GCN-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GCN-NEXT: buffer_store_dword v10, v19, s[0:3], 0 offen +; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GCN-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GCN-NEXT: v_add_i32_e32 v9, vcc, 0x5c, v0 +; GCN-NEXT: buffer_store_dword v2, v9, s[0:3], 0 offen +; GCN-NEXT: v_cvt_f64_f32_e32 v[9:10], v7 ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v10, vcc, 0x58, v0 -; GCN-NEXT: v_cvt_f64_f32_e32 v[19:20], v7 -; GCN-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen -; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v4 -; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v5 -; GCN-NEXT: v_cvt_f64_f32_e32 v[4:5], v4 +; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v8 +; GCN-NEXT: v_add_i32_e32 v7, vcc, 0x58, v0 +; GCN-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen +; GCN-NEXT: s_waitcnt expcnt(0) +; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 ; GCN-NEXT: v_add_i32_e32 v7, vcc, 0x54, v0 -; GCN-NEXT: buffer_store_dword v20, v7, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v7, vcc, 0x50, v0 -; GCN-NEXT: buffer_store_dword v19, v7, s[0:3], 0 offen +; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GCN-NEXT: buffer_store_dword v2, v7, s[0:3], 0 offen +; GCN-NEXT: s_waitcnt expcnt(0) +; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v5 +; GCN-NEXT: v_add_i32_e32 v5, vcc, 0x50, v0 +; GCN-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v19, vcc, 0x4c, v0 -; GCN-NEXT: buffer_store_dword v5, v19, s[0:3], 0 offen +; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GCN-NEXT: v_add_i32_e32 v5, vcc, 0x4c, v0 +; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GCN-NEXT: buffer_store_dword v2, v5, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt expcnt(0) +; GCN-NEXT: v_cvt_f64_f32_e32 v[2:3], v3 ; GCN-NEXT: v_add_i32_e32 v5, vcc, 0x48, v0 -; GCN-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen +; GCN-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen +; GCN-NEXT: v_cvt_f64_f32_e32 v[4:5], v4 +; GCN-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_cvt_f64_f32_e32 v[3:4], v3 -; GCN-NEXT: v_cvt_f64_f32_e32 v[19:20], v10 -; GCN-NEXT: v_add_i32_e32 v5, vcc, 0x44, v0 +; GCN-NEXT: v_add_i32_e32 v1, vcc, 0x44, v0 ; GCN-NEXT: v_cvt_f64_f32_e32 v[6:7], v6 -; GCN-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen -; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v4, vcc, 64, v0 -; GCN-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen -; GCN-NEXT: s_waitcnt expcnt(0) -; GCN-NEXT: v_add_i32_e32 v3, vcc, 60, v0 -; GCN-NEXT: v_cvt_f64_f32_e32 v[8:9], v8 -; GCN-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 56, v0 -; GCN-NEXT: buffer_store_dword v19, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 52, v0 -; GCN-NEXT: buffer_store_dword v7, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 48, v0 -; GCN-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 44, v0 -; GCN-NEXT: buffer_store_dword v9, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 40, v0 -; GCN-NEXT: buffer_store_dword v8, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 36, v0 -; GCN-NEXT: buffer_store_dword v12, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 32, v0 -; GCN-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; GCN-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 28, v0 -; GCN-NEXT: v_cvt_f64_f32_e32 v[15:16], v15 -; GCN-NEXT: buffer_store_dword v14, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 24, v0 -; GCN-NEXT: buffer_store_dword v13, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 20, v0 -; GCN-NEXT: buffer_store_dword v18, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 16, v0 -; GCN-NEXT: buffer_store_dword v17, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 12, v0 -; GCN-NEXT: buffer_store_dword v16, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 8, v0 -; GCN-NEXT: buffer_store_dword v15, v3, s[0:3], 0 offen -; GCN-NEXT: v_add_i32_e32 v3, vcc, 4, v0 -; GCN-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen +; GCN-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 64, v0 +; GCN-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 60, v0 +; GCN-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 56, v0 +; GCN-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 52, v0 +; GCN-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 48, v0 +; GCN-NEXT: buffer_store_dword v6, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 44, v0 +; GCN-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 40, v0 +; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GCN-NEXT: buffer_store_dword v9, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 36, v0 +; GCN-NEXT: v_cvt_f64_f32_e32 v[13:14], v13 +; GCN-NEXT: buffer_store_dword v12, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 32, v0 +; GCN-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 28, v0 +; GCN-NEXT: buffer_store_dword v21, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 24, v0 +; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v32 +; GCN-NEXT: buffer_store_dword v20, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 20, v0 +; GCN-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 +; GCN-NEXT: buffer_store_dword v14, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 16, v0 +; GCN-NEXT: buffer_store_dword v13, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 12, v0 +; GCN-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 8, v0 +; GCN-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen +; GCN-NEXT: v_add_i32_e32 v1, vcc, 4, v0 +; GCN-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen +; GCN-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) ; GCN-NEXT: s_setpc_b64 s[30:31] ; @@ -8114,15 +8112,15 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s4, s6 ; GFX7-NEXT: s_mov_b32 s5, s6 -; GFX7-NEXT: buffer_load_ushort v17, v[1:2], s[4:7], 0 addr64 offset:62 -; GFX7-NEXT: buffer_load_ushort v18, v[1:2], s[4:7], 0 addr64 offset:60 -; GFX7-NEXT: buffer_load_ushort v19, v[1:2], s[4:7], 0 addr64 offset:58 -; GFX7-NEXT: buffer_load_ushort v20, v[1:2], s[4:7], 0 addr64 offset:56 -; GFX7-NEXT: buffer_load_ushort v21, v[1:2], s[4:7], 0 addr64 offset:54 -; GFX7-NEXT: buffer_load_ushort v22, v[1:2], s[4:7], 0 addr64 offset:52 -; GFX7-NEXT: buffer_load_ushort v23, v[1:2], s[4:7], 0 addr64 offset:50 -; GFX7-NEXT: buffer_load_ushort v24, v[1:2], s[4:7], 0 addr64 offset:48 -; GFX7-NEXT: buffer_load_ushort v16, v[1:2], s[4:7], 0 addr64 offset:32 +; GFX7-NEXT: buffer_load_ushort v16, v[1:2], s[4:7], 0 addr64 offset:62 +; GFX7-NEXT: buffer_load_ushort v17, v[1:2], s[4:7], 0 addr64 offset:60 +; GFX7-NEXT: buffer_load_ushort v18, v[1:2], s[4:7], 0 addr64 offset:58 +; GFX7-NEXT: buffer_load_ushort v19, v[1:2], s[4:7], 0 addr64 offset:56 +; GFX7-NEXT: buffer_load_ushort v20, v[1:2], s[4:7], 0 addr64 offset:54 +; GFX7-NEXT: buffer_load_ushort v21, v[1:2], s[4:7], 0 addr64 offset:52 +; GFX7-NEXT: buffer_load_ushort v22, v[1:2], s[4:7], 0 addr64 offset:50 +; GFX7-NEXT: buffer_load_ushort v23, v[1:2], s[4:7], 0 addr64 offset:48 +; GFX7-NEXT: buffer_load_ushort v24, v[1:2], s[4:7], 0 addr64 offset:32 ; GFX7-NEXT: buffer_load_ushort v25, v[1:2], s[4:7], 0 addr64 offset:34 ; GFX7-NEXT: buffer_load_ushort v26, v[1:2], s[4:7], 0 addr64 offset:36 ; GFX7-NEXT: buffer_load_ushort v27, v[1:2], s[4:7], 0 addr64 offset:38 @@ -8131,530 +8129,509 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GFX7-NEXT: buffer_load_ushort v30, v[1:2], s[4:7], 0 addr64 offset:44 ; GFX7-NEXT: buffer_load_ushort v31, v[1:2], s[4:7], 0 addr64 offset:46 ; GFX7-NEXT: buffer_load_ushort v32, v[1:2], s[4:7], 0 addr64 -; GFX7-NEXT: buffer_load_ushort v15, v[1:2], s[4:7], 0 addr64 offset:2 +; GFX7-NEXT: buffer_load_ushort v14, v[1:2], s[4:7], 0 addr64 offset:2 ; GFX7-NEXT: buffer_load_ushort v13, v[1:2], s[4:7], 0 addr64 offset:4 ; GFX7-NEXT: buffer_load_ushort v11, v[1:2], s[4:7], 0 addr64 offset:6 ; GFX7-NEXT: buffer_load_ushort v9, v[1:2], s[4:7], 0 addr64 offset:8 -; GFX7-NEXT: buffer_load_ushort v8, v[1:2], s[4:7], 0 addr64 offset:10 +; GFX7-NEXT: buffer_load_ushort v7, v[1:2], s[4:7], 0 addr64 offset:10 ; GFX7-NEXT: buffer_load_ushort v6, v[1:2], s[4:7], 0 addr64 offset:12 ; GFX7-NEXT: buffer_load_ushort v4, v[1:2], s[4:7], 0 addr64 offset:14 ; GFX7-NEXT: buffer_load_ushort v3, v[1:2], s[4:7], 0 addr64 offset:16 ; GFX7-NEXT: buffer_load_ushort v5, v[1:2], s[4:7], 0 addr64 offset:18 -; GFX7-NEXT: buffer_load_ushort v7, v[1:2], s[4:7], 0 addr64 offset:20 +; GFX7-NEXT: buffer_load_ushort v8, v[1:2], s[4:7], 0 addr64 offset:20 ; GFX7-NEXT: buffer_load_ushort v10, v[1:2], s[4:7], 0 addr64 offset:22 ; GFX7-NEXT: buffer_load_ushort v12, v[1:2], s[4:7], 0 addr64 offset:24 -; GFX7-NEXT: buffer_load_ushort v14, v[1:2], s[4:7], 0 addr64 offset:26 +; GFX7-NEXT: buffer_load_ushort v15, v[1:2], s[4:7], 0 addr64 offset:26 ; GFX7-NEXT: buffer_load_ushort v33, v[1:2], s[4:7], 0 addr64 offset:28 ; GFX7-NEXT: buffer_load_ushort v34, v[1:2], s[4:7], 0 addr64 offset:30 ; GFX7-NEXT: s_waitcnt vmcnt(14) -; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v17 +; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v16 ; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xfc, v0 -; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v16, vcc, 0xfc, v0 +; GFX7-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen ; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xf8, v0 ; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v18 +; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v17 ; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xf4, v0 -; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0xd8, v0 -; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v16, vcc, 0xf4, v0 +; GFX7-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen ; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xf0, v0 ; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v19 +; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v18 ; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xec, v0 -; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0xd4, v0 -; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v16, vcc, 0xec, v0 +; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0xd8, v0 +; GFX7-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen ; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xe8, v0 +; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v19 ; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v20 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xe4, v0 -; GFX7-NEXT: v_add_i32_e32 v20, vcc, 0xd0, v0 -; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v16 +; GFX7-NEXT: v_add_i32_e32 v16, vcc, 0xe4, v0 +; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0xd4, v0 +; GFX7-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v20 +; GFX7-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 ; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xe0, v0 -; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v21 ; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v17 -; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xdc, v0 -; GFX7-NEXT: s_waitcnt vmcnt(14) -; GFX7-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v22 -; GFX7-NEXT: buffer_store_dword v1, v18, s[0:3], 0 offen -; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 -; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v23 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0xdc, v0 +; GFX7-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v21 +; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX7-NEXT: buffer_store_dword v16, v18, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v22 +; GFX7-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 +; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0xd0, v0 ; GFX7-NEXT: buffer_store_dword v2, v19, s[0:3], 0 offen -; GFX7-NEXT: buffer_store_dword v1, v20, s[0:3], 0 offen +; GFX7-NEXT: buffer_store_dword v1, v18, s[0:3], 0 offen ; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0xcc, v0 -; GFX7-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v24 +; GFX7-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v23 ; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0xc8, v0 -; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xc4, v0 -; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v31 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xc8, v0 +; GFX7-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v16, vcc, 0xc4, v0 +; GFX7-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v31 +; GFX7-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 ; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xc0, v0 ; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0xbc, v0 -; GFX7-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen +; GFX7-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v30 ; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0xb8, v0 -; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xb4, v0 -; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v29 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xb8, v0 +; GFX7-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v16, vcc, 0xb4, v0 +; GFX7-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v29 +; GFX7-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 ; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xb0, v0 ; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0xac, v0 -; GFX7-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen +; GFX7-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v28 ; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0xa8, v0 -; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xa4, v0 -; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v27 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xa8, v0 +; GFX7-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v16, vcc, 0xa4, v0 +; GFX7-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v27 +; GFX7-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 ; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xa0, v0 ; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0x9c, v0 -; GFX7-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen +; GFX7-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v26 ; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0x98, v0 -; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0x94, v0 -; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v25 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0x98, v0 +; GFX7-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v16, vcc, 0x94, v0 +; GFX7-NEXT: buffer_store_dword v2, v16, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v25 +; GFX7-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 ; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x90, v0 ; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen ; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0x8c, v0 -; GFX7-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0x88, v0 ; GFX7-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v16 +; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v24 +; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x88, v0 +; GFX7-NEXT: buffer_store_dword v16, v2, s[0:3], 0 offen ; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 ; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0x84, v0 -; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v32 +; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0x80, v0 ; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x80, v0 -; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v16 ; GFX7-NEXT: s_waitcnt vmcnt(14) -; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v34 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 +; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v34 +; GFX7-NEXT: buffer_store_dword v1, v18, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX7-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0x7c, v0 -; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0x74, v0 -; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0x78, v0 -; GFX7-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v33 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; GFX7-NEXT: buffer_store_dword v2, v18, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[18:19], v14 +; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v33 +; GFX7-NEXT: v_add_i32_e32 v14, vcc, 0x78, v0 +; GFX7-NEXT: buffer_store_dword v1, v14, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX7-NEXT: v_add_i32_e32 v14, vcc, 0x74, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; GFX7-NEXT: buffer_store_dword v2, v14, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v15 +; GFX7-NEXT: v_add_i32_e32 v15, vcc, 0x70, v0 +; GFX7-NEXT: buffer_store_dword v1, v15, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX7-NEXT: v_add_i32_e32 v15, vcc, 0x6c, v0 +; GFX7-NEXT: v_cvt_f64_f32_e32 v[20:21], v11 +; GFX7-NEXT: buffer_store_dword v2, v15, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v12 +; GFX7-NEXT: v_add_i32_e32 v11, vcc, 0x68, v0 +; GFX7-NEXT: buffer_store_dword v1, v11, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; GFX7-NEXT: v_lshlrev_b32_e32 v7, 16, v7 -; GFX7-NEXT: buffer_store_dword v18, v19, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0x70, v0 -; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen -; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v13 -; GFX7-NEXT: v_lshlrev_b32_e32 v13, 16, v14 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[13:14], v13 -; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0x6c, v0 -; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX7-NEXT: buffer_store_dword v14, v19, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v14, vcc, 0x68, v0 -; GFX7-NEXT: buffer_store_dword v13, v14, s[0:3], 0 offen -; GFX7-NEXT: v_cvt_f64_f32_e32 v[13:14], v11 -; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v12 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[11:12], v11 -; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0x64, v0 -; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX7-NEXT: buffer_store_dword v12, v19, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v12, vcc, 0x60, v0 -; GFX7-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v11, vcc, 0x64, v0 +; GFX7-NEXT: buffer_store_dword v2, v11, s[0:3], 0 offen ; GFX7-NEXT: v_cvt_f64_f32_e32 v[11:12], v9 -; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v10 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[9:10], v9 -; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0x5c, v0 -; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX7-NEXT: buffer_store_dword v10, v19, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v10, vcc, 0x58, v0 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[19:20], v7 -; GFX7-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen -; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v4 -; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v5 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[4:5], v4 +; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v10 +; GFX7-NEXT: v_add_i32_e32 v9, vcc, 0x60, v0 +; GFX7-NEXT: buffer_store_dword v1, v9, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX7-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX7-NEXT: v_add_i32_e32 v9, vcc, 0x5c, v0 +; GFX7-NEXT: buffer_store_dword v2, v9, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[9:10], v7 +; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v8 +; GFX7-NEXT: v_add_i32_e32 v7, vcc, 0x58, v0 +; GFX7-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 ; GFX7-NEXT: v_add_i32_e32 v7, vcc, 0x54, v0 -; GFX7-NEXT: buffer_store_dword v20, v7, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v7, vcc, 0x50, v0 -; GFX7-NEXT: buffer_store_dword v19, v7, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0x4c, v0 -; GFX7-NEXT: buffer_store_dword v5, v19, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX7-NEXT: buffer_store_dword v2, v7, s[0:3], 0 offen +; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v5 +; GFX7-NEXT: v_add_i32_e32 v5, vcc, 0x50, v0 +; GFX7-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX7-NEXT: v_add_i32_e32 v5, vcc, 0x4c, v0 +; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX7-NEXT: buffer_store_dword v2, v5, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[2:3], v3 ; GFX7-NEXT: v_add_i32_e32 v5, vcc, 0x48, v0 -; GFX7-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen -; GFX7-NEXT: v_cvt_f64_f32_e32 v[3:4], v3 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[19:20], v10 -; GFX7-NEXT: v_add_i32_e32 v5, vcc, 0x44, v0 +; GFX7-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen +; GFX7-NEXT: v_cvt_f64_f32_e32 v[4:5], v4 +; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0x44, v0 ; GFX7-NEXT: v_cvt_f64_f32_e32 v[6:7], v6 -; GFX7-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v4, vcc, 64, v0 -; GFX7-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 60, v0 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v8 -; GFX7-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 56, v0 -; GFX7-NEXT: buffer_store_dword v19, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 52, v0 -; GFX7-NEXT: buffer_store_dword v7, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 48, v0 -; GFX7-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 44, v0 -; GFX7-NEXT: buffer_store_dword v9, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 40, v0 -; GFX7-NEXT: buffer_store_dword v8, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 36, v0 -; GFX7-NEXT: buffer_store_dword v12, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 32, v0 -; GFX7-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; GFX7-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 28, v0 -; GFX7-NEXT: v_cvt_f64_f32_e32 v[15:16], v15 -; GFX7-NEXT: buffer_store_dword v14, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 24, v0 -; GFX7-NEXT: buffer_store_dword v13, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 20, v0 -; GFX7-NEXT: buffer_store_dword v18, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 16, v0 -; GFX7-NEXT: buffer_store_dword v17, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 12, v0 -; GFX7-NEXT: buffer_store_dword v16, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 8, v0 -; GFX7-NEXT: buffer_store_dword v15, v3, s[0:3], 0 offen -; GFX7-NEXT: v_add_i32_e32 v3, vcc, 4, v0 -; GFX7-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen -; GFX7-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen +; GFX7-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 64, v0 +; GFX7-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 60, v0 +; GFX7-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 56, v0 +; GFX7-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 52, v0 +; GFX7-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 48, v0 +; GFX7-NEXT: buffer_store_dword v6, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 44, v0 +; GFX7-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 40, v0 +; GFX7-NEXT: v_lshlrev_b32_e32 v13, 16, v13 +; GFX7-NEXT: buffer_store_dword v9, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 36, v0 +; GFX7-NEXT: v_cvt_f64_f32_e32 v[13:14], v13 +; GFX7-NEXT: buffer_store_dword v12, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 32, v0 +; GFX7-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 28, v0 +; GFX7-NEXT: buffer_store_dword v21, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 24, v0 +; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v32 +; GFX7-NEXT: buffer_store_dword v20, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 20, v0 +; GFX7-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 +; GFX7-NEXT: buffer_store_dword v14, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 16, v0 +; GFX7-NEXT: buffer_store_dword v13, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 12, v0 +; GFX7-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 8, v0 +; GFX7-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen +; GFX7-NEXT: v_add_i32_e32 v1, vcc, 4, v0 +; GFX7-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen +; GFX7-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen ; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_setpc_b64 s[30:31] ; ; GFX8-LABEL: global_extload_v32bf16_to_v32f64: ; GFX8: ; %bb.0: ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX8-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill -; GFX8-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill -; GFX8-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill -; GFX8-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill -; GFX8-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill -; GFX8-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill -; GFX8-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill -; GFX8-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill -; GFX8-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill -; GFX8-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill -; GFX8-NEXT: buffer_store_dword v58, off, s[0:3], s32 ; 4-byte Folded Spill ; GFX8-NEXT: v_add_u32_e32 v3, vcc, 2, v1 ; GFX8-NEXT: v_addc_u32_e32 v4, vcc, 0, v2, vcc ; GFX8-NEXT: v_add_u32_e32 v5, vcc, 4, v1 ; GFX8-NEXT: v_addc_u32_e32 v6, vcc, 0, v2, vcc ; GFX8-NEXT: v_add_u32_e32 v7, vcc, 6, v1 ; GFX8-NEXT: v_addc_u32_e32 v8, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v9, vcc, 8, v1 -; GFX8-NEXT: v_addc_u32_e32 v10, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v11, vcc, 10, v1 +; GFX8-NEXT: v_add_u32_e32 v11, vcc, 8, v1 ; GFX8-NEXT: v_addc_u32_e32 v12, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v13, vcc, 12, v1 +; GFX8-NEXT: v_add_u32_e32 v13, vcc, 10, v1 ; GFX8-NEXT: v_addc_u32_e32 v14, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v15, vcc, 14, v1 +; GFX8-NEXT: v_add_u32_e32 v15, vcc, 12, v1 ; GFX8-NEXT: v_addc_u32_e32 v16, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v17, vcc, 14, v1 +; GFX8-NEXT: v_addc_u32_e32 v18, vcc, 0, v2, vcc ; GFX8-NEXT: v_add_u32_e32 v19, vcc, 16, v1 ; GFX8-NEXT: v_addc_u32_e32 v20, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v17, vcc, 18, v1 +; GFX8-NEXT: flat_load_ushort v10, v[3:4] +; GFX8-NEXT: flat_load_ushort v9, v[5:6] +; GFX8-NEXT: flat_load_ushort v8, v[7:8] +; GFX8-NEXT: flat_load_ushort v7, v[11:12] +; GFX8-NEXT: flat_load_ushort v6, v[13:14] +; GFX8-NEXT: flat_load_ushort v5, v[15:16] +; GFX8-NEXT: flat_load_ushort v4, v[17:18] +; GFX8-NEXT: flat_load_ushort v3, v[19:20] +; GFX8-NEXT: v_add_u32_e32 v11, vcc, 18, v1 +; GFX8-NEXT: v_addc_u32_e32 v12, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v13, vcc, 20, v1 +; GFX8-NEXT: v_addc_u32_e32 v14, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v15, vcc, 22, v1 +; GFX8-NEXT: v_addc_u32_e32 v16, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v17, vcc, 24, v1 ; GFX8-NEXT: v_addc_u32_e32 v18, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v21, vcc, 20, v1 +; GFX8-NEXT: v_add_u32_e32 v19, vcc, 26, v1 +; GFX8-NEXT: v_addc_u32_e32 v20, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v21, vcc, 28, v1 ; GFX8-NEXT: v_addc_u32_e32 v22, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v23, vcc, 22, v1 +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 30, v1 +; GFX8-NEXT: v_addc_u32_e32 v24, vcc, 0, v2, vcc +; GFX8-NEXT: flat_load_ushort v11, v[11:12] +; GFX8-NEXT: flat_load_ushort v12, v[13:14] +; GFX8-NEXT: flat_load_ushort v13, v[15:16] +; GFX8-NEXT: flat_load_ushort v14, v[17:18] +; GFX8-NEXT: flat_load_ushort v15, v[19:20] +; GFX8-NEXT: flat_load_ushort v16, v[21:22] +; GFX8-NEXT: flat_load_ushort v17, v[23:24] +; GFX8-NEXT: v_add_u32_e32 v18, vcc, 34, v1 +; GFX8-NEXT: v_addc_u32_e32 v19, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v20, vcc, 36, v1 +; GFX8-NEXT: v_addc_u32_e32 v21, vcc, 0, v2, vcc +; GFX8-NEXT: flat_load_ushort v18, v[18:19] +; GFX8-NEXT: flat_load_ushort v19, v[20:21] +; GFX8-NEXT: v_add_u32_e32 v20, vcc, 38, v1 +; GFX8-NEXT: v_addc_u32_e32 v21, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v22, vcc, 40, v1 +; GFX8-NEXT: v_addc_u32_e32 v23, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v24, vcc, 42, v1 +; GFX8-NEXT: v_addc_u32_e32 v25, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v26, vcc, 44, v1 +; GFX8-NEXT: v_addc_u32_e32 v27, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v28, vcc, 46, v1 +; GFX8-NEXT: v_addc_u32_e32 v29, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v30, vcc, 48, v1 +; GFX8-NEXT: v_addc_u32_e32 v31, vcc, 0, v2, vcc +; GFX8-NEXT: flat_load_ushort v20, v[20:21] +; GFX8-NEXT: flat_load_ushort v21, v[22:23] +; GFX8-NEXT: flat_load_ushort v22, v[24:25] +; GFX8-NEXT: flat_load_ushort v27, v[26:27] +; GFX8-NEXT: flat_load_ushort v28, v[28:29] +; GFX8-NEXT: flat_load_ushort v29, v[30:31] +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 50, v1 ; GFX8-NEXT: v_addc_u32_e32 v24, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v25, vcc, 24, v1 +; GFX8-NEXT: v_add_u32_e32 v25, vcc, 52, v1 ; GFX8-NEXT: v_addc_u32_e32 v26, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v27, vcc, 26, v1 -; GFX8-NEXT: v_addc_u32_e32 v28, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v29, vcc, 28, v1 -; GFX8-NEXT: v_addc_u32_e32 v30, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v31, vcc, 30, v1 -; GFX8-NEXT: v_addc_u32_e32 v32, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v33, vcc, 34, v1 -; GFX8-NEXT: v_addc_u32_e32 v34, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v35, vcc, 36, v1 -; GFX8-NEXT: v_addc_u32_e32 v36, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v37, vcc, 38, v1 -; GFX8-NEXT: flat_load_ushort v44, v[1:2] -; GFX8-NEXT: v_addc_u32_e32 v38, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v48, vcc, 40, v1 -; GFX8-NEXT: v_addc_u32_e32 v49, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v50, vcc, 62, v1 -; GFX8-NEXT: v_addc_u32_e32 v51, vcc, 0, v2, vcc -; GFX8-NEXT: flat_load_ushort v45, v[50:51] -; GFX8-NEXT: v_add_u32_e32 v50, vcc, 60, v1 -; GFX8-NEXT: v_addc_u32_e32 v51, vcc, 0, v2, vcc -; GFX8-NEXT: flat_load_ushort v46, v[50:51] -; GFX8-NEXT: v_add_u32_e32 v50, vcc, 42, v1 -; GFX8-NEXT: v_addc_u32_e32 v51, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v52, vcc, 58, v1 -; GFX8-NEXT: v_addc_u32_e32 v53, vcc, 0, v2, vcc -; GFX8-NEXT: flat_load_ushort v47, v[52:53] -; GFX8-NEXT: v_add_u32_e32 v52, vcc, 44, v1 -; GFX8-NEXT: v_addc_u32_e32 v53, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v54, vcc, 56, v1 -; GFX8-NEXT: v_addc_u32_e32 v55, vcc, 0, v2, vcc -; GFX8-NEXT: flat_load_ushort v56, v[54:55] -; GFX8-NEXT: v_add_u32_e32 v54, vcc, 46, v1 -; GFX8-NEXT: v_addc_u32_e32 v55, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v39, vcc, 54, v1 -; GFX8-NEXT: v_addc_u32_e32 v40, vcc, 0, v2, vcc -; GFX8-NEXT: flat_load_ushort v57, v[39:40] -; GFX8-NEXT: v_add_u32_e32 v39, vcc, 52, v1 -; GFX8-NEXT: v_addc_u32_e32 v40, vcc, 0, v2, vcc -; GFX8-NEXT: flat_load_ushort v58, v[39:40] -; GFX8-NEXT: v_add_u32_e32 v40, vcc, 48, v1 -; GFX8-NEXT: v_addc_u32_e32 v41, vcc, 0, v2, vcc -; GFX8-NEXT: v_add_u32_e32 v42, vcc, 50, v1 -; GFX8-NEXT: v_addc_u32_e32 v43, vcc, 0, v2, vcc -; GFX8-NEXT: flat_load_ushort v42, v[42:43] -; GFX8-NEXT: flat_load_ushort v34, v[33:34] -; GFX8-NEXT: flat_load_ushort v36, v[35:36] -; GFX8-NEXT: flat_load_ushort v38, v[37:38] -; GFX8-NEXT: flat_load_ushort v39, v[48:49] -; GFX8-NEXT: flat_load_ushort v48, v[50:51] -; GFX8-NEXT: flat_load_ushort v51, v[52:53] -; GFX8-NEXT: flat_load_ushort v52, v[54:55] -; GFX8-NEXT: flat_load_ushort v53, v[40:41] -; GFX8-NEXT: v_add_u32_e32 v49, vcc, 32, v1 -; GFX8-NEXT: v_addc_u32_e32 v50, vcc, 0, v2, vcc -; GFX8-NEXT: flat_load_ushort v37, v[3:4] -; GFX8-NEXT: flat_load_ushort v35, v[5:6] -; GFX8-NEXT: flat_load_ushort v33, v[7:8] -; GFX8-NEXT: flat_load_ushort v8, v[9:10] -; GFX8-NEXT: flat_load_ushort v6, v[11:12] -; GFX8-NEXT: flat_load_ushort v4, v[13:14] -; GFX8-NEXT: flat_load_ushort v2, v[15:16] -; GFX8-NEXT: flat_load_ushort v1, v[19:20] -; GFX8-NEXT: v_add_u32_e32 v16, vcc, 4, v0 -; GFX8-NEXT: v_add_u32_e32 v19, vcc, 0x7c, v0 -; GFX8-NEXT: s_waitcnt vmcnt(14) -; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v44 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v3 -; GFX8-NEXT: flat_load_ushort v3, v[17:18] -; GFX8-NEXT: flat_load_ushort v5, v[21:22] -; GFX8-NEXT: flat_load_ushort v7, v[23:24] -; GFX8-NEXT: flat_load_ushort v9, v[25:26] -; GFX8-NEXT: flat_load_ushort v10, v[27:28] -; GFX8-NEXT: flat_load_ushort v11, v[29:30] -; GFX8-NEXT: flat_load_ushort v12, v[31:32] -; GFX8-NEXT: flat_load_ushort v13, v[49:50] -; GFX8-NEXT: v_add_u32_e32 v18, vcc, 0x84, v0 -; GFX8-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xfc, v0 -; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v45 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[15:16], v15 -; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v46 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xf8, v0 -; GFX8-NEXT: buffer_store_dword v15, v14, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xf4, v0 -; GFX8-NEXT: buffer_store_dword v17, v14, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v47 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v14 -; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xf0, v0 -; GFX8-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v16, vcc, 0xec, v0 -; GFX8-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xe8, v0 -; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v56 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[15:16], v15 -; GFX8-NEXT: buffer_store_dword v14, v17, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xe4, v0 -; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xe0, v0 -; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v57 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 -; GFX8-NEXT: buffer_store_dword v15, v14, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xdc, v0 -; GFX8-NEXT: buffer_store_dword v17, v14, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v58 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v14 -; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xd8, v0 -; GFX8-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v16, vcc, 0xd4, v0 -; GFX8-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v42 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[15:16], v15 -; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xd0, v0 -; GFX8-NEXT: buffer_store_dword v14, v17, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xcc, v0 -; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen +; GFX8-NEXT: flat_load_ushort v30, v[23:24] +; GFX8-NEXT: flat_load_ushort v31, v[25:26] +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 54, v1 +; GFX8-NEXT: v_addc_u32_e32 v24, vcc, 0, v2, vcc +; GFX8-NEXT: v_add_u32_e32 v25, vcc, 56, v1 +; GFX8-NEXT: v_addc_u32_e32 v26, vcc, 0, v2, vcc +; GFX8-NEXT: flat_load_ushort v32, v[23:24] +; GFX8-NEXT: flat_load_ushort v25, v[25:26] +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 58, v1 +; GFX8-NEXT: v_addc_u32_e32 v24, vcc, 0, v2, vcc +; GFX8-NEXT: flat_load_ushort v26, v[23:24] +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 60, v1 +; GFX8-NEXT: v_addc_u32_e32 v24, vcc, 0, v2, vcc +; GFX8-NEXT: flat_load_ushort v33, v[23:24] +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 62, v1 +; GFX8-NEXT: v_addc_u32_e32 v24, vcc, 0, v2, vcc +; GFX8-NEXT: flat_load_ushort v23, v[23:24] +; GFX8-NEXT: flat_load_ushort v24, v[1:2] +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 32, v1 +; GFX8-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc +; GFX8-NEXT: flat_load_ushort v34, v[1:2] ; GFX8-NEXT: s_waitcnt vmcnt(14) -; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v53 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xc8, v0 -; GFX8-NEXT: buffer_store_dword v15, v14, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xc4, v0 -; GFX8-NEXT: buffer_store_dword v17, v14, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v52 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v14 -; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xc0, v0 -; GFX8-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v16, vcc, 0xbc, v0 -; GFX8-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v51 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[15:16], v15 -; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xb8, v0 -; GFX8-NEXT: buffer_store_dword v14, v17, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xb4, v0 -; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v48 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xb0, v0 -; GFX8-NEXT: buffer_store_dword v15, v14, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xac, v0 -; GFX8-NEXT: buffer_store_dword v17, v14, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v39 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v14 -; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xa8, v0 -; GFX8-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v16, vcc, 0xa4, v0 -; GFX8-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v38 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[15:16], v15 -; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xa0, v0 -; GFX8-NEXT: buffer_store_dword v14, v17, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0x9c, v0 -; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v36 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16 -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0x98, v0 -; GFX8-NEXT: buffer_store_dword v15, v14, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0x94, v0 -; GFX8-NEXT: buffer_store_dword v17, v14, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0x90, v0 -; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v34 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v14 -; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0x8c, v0 -; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v37 -; GFX8-NEXT: buffer_store_dword v15, v17, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v15, vcc, 0x88, v0 -; GFX8-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; GFX8-NEXT: buffer_store_dword v14, v15, s[0:3], 0 offen -; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v16 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v13 -; GFX8-NEXT: v_lshlrev_b32_e32 v13, 16, v35 -; GFX8-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; GFX8-NEXT: v_lshlrev_b32_e32 v11, 16, v11 -; GFX8-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0x80, v0 -; GFX8-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen -; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v13 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[12:13], v12 -; GFX8-NEXT: v_lshlrev_b32_e32 v18, 16, v33 +; GFX8-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX8-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX8-NEXT: buffer_store_dword v13, v19, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v13, vcc, 0x78, v0 -; GFX8-NEXT: buffer_store_dword v12, v13, s[0:3], 0 offen -; GFX8-NEXT: v_cvt_f64_f32_e32 v[12:13], v18 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[18:19], v11 -; GFX8-NEXT: v_add_u32_e32 v11, vcc, 0x74, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX8-NEXT: buffer_store_dword v19, v11, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v11, vcc, 0x70, v0 -; GFX8-NEXT: buffer_store_dword v18, v11, s[0:3], 0 offen -; GFX8-NEXT: v_cvt_f64_f32_e32 v[18:19], v8 -; GFX8-NEXT: v_lshlrev_b32_e32 v8, 16, v10 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[10:11], v8 -; GFX8-NEXT: v_add_u32_e32 v8, vcc, 0x6c, v0 -; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX8-NEXT: buffer_store_dword v11, v8, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v8, vcc, 0x68, v0 -; GFX8-NEXT: buffer_store_dword v10, v8, s[0:3], 0 offen -; GFX8-NEXT: v_cvt_f64_f32_e32 v[10:11], v6 -; GFX8-NEXT: v_lshlrev_b32_e32 v6, 16, v9 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[8:9], v6 -; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x64, v0 -; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX8-NEXT: buffer_store_dword v9, v6, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x60, v0 -; GFX8-NEXT: buffer_store_dword v8, v6, s[0:3], 0 offen -; GFX8-NEXT: v_cvt_f64_f32_e32 v[8:9], v4 -; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v7 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[6:7], v4 -; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x5c, v0 -; GFX8-NEXT: buffer_store_dword v7, v4, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x58, v0 -; GFX8-NEXT: buffer_store_dword v6, v4, s[0:3], 0 offen -; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v1 -; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v5 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[6:7], v2 +; GFX8-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX8-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GFX8-NEXT: v_lshlrev_b32_e32 v9, 16, v9 +; GFX8-NEXT: v_lshlrev_b32_e32 v19, 16, v19 +; GFX8-NEXT: s_waitcnt vmcnt(13) +; GFX8-NEXT: v_lshlrev_b32_e32 v21, 16, v21 +; GFX8-NEXT: s_waitcnt vmcnt(1) +; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v24 ; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 -; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0x54, v0 -; GFX8-NEXT: buffer_store_dword v2, v5, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 +; GFX8-NEXT: v_add_u32_e32 v24, vcc, 4, v0 +; GFX8-NEXT: buffer_store_dword v2, v24, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v23 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 0xfc, v0 +; GFX8-NEXT: buffer_store_dword v2, v23, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xf8, v0 ; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v3 -; GFX8-NEXT: v_cvt_f64_f32_e32 v[3:4], v4 -; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0x4c, v0 -; GFX8-NEXT: buffer_store_dword v2, v5, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0 +; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v33 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 0xf4, v0 +; GFX8-NEXT: buffer_store_dword v2, v23, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xf0, v0 +; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v26 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 0xec, v0 +; GFX8-NEXT: buffer_store_dword v2, v23, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v23, 16, v25 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[23:24], v23 +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xe8, v0 +; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xe4, v0 +; GFX8-NEXT: buffer_store_dword v24, v1, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v32 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX8-NEXT: v_add_u32_e32 v24, vcc, 0xe0, v0 +; GFX8-NEXT: buffer_store_dword v23, v24, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 0xdc, v0 +; GFX8-NEXT: buffer_store_dword v2, v23, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v23, 16, v31 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[23:24], v23 +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xd8, v0 +; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xd4, v0 +; GFX8-NEXT: buffer_store_dword v24, v1, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v30 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX8-NEXT: v_add_u32_e32 v24, vcc, 0xd0, v0 +; GFX8-NEXT: buffer_store_dword v23, v24, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 0xcc, v0 +; GFX8-NEXT: buffer_store_dword v2, v23, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v23, 16, v29 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[23:24], v23 +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xc8, v0 +; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xc4, v0 +; GFX8-NEXT: buffer_store_dword v24, v1, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v28 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX8-NEXT: v_add_u32_e32 v24, vcc, 0xc0, v0 +; GFX8-NEXT: buffer_store_dword v23, v24, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v23, vcc, 0xbc, v0 +; GFX8-NEXT: buffer_store_dword v2, v23, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v23, 16, v27 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[23:24], v23 +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xb8, v0 ; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xb4, v0 +; GFX8-NEXT: buffer_store_dword v24, v1, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v22 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX8-NEXT: v_add_u32_e32 v24, vcc, 0xb0, v0 +; GFX8-NEXT: v_add_u32_e32 v22, vcc, 0xac, v0 +; GFX8-NEXT: buffer_store_dword v23, v24, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v2, v22, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[21:22], v21 +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xa8, v0 +; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xa4, v0 +; GFX8-NEXT: buffer_store_dword v22, v1, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v20 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX8-NEXT: v_add_u32_e32 v22, vcc, 0xa0, v0 +; GFX8-NEXT: v_add_u32_e32 v20, vcc, 0x9c, v0 +; GFX8-NEXT: buffer_store_dword v21, v22, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v2, v20, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[19:20], v19 +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x98, v0 +; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x94, v0 +; GFX8-NEXT: buffer_store_dword v20, v1, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v18 +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x90, v0 +; GFX8-NEXT: buffer_store_dword v19, v2, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX8-NEXT: v_add_u32_e32 v18, vcc, 0x8c, v0 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[20:21], v8 +; GFX8-NEXT: buffer_store_dword v2, v18, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[18:19], v10 +; GFX8-NEXT: s_waitcnt vmcnt(14) +; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v34 +; GFX8-NEXT: v_add_u32_e32 v10, vcc, 0x88, v0 +; GFX8-NEXT: buffer_store_dword v1, v10, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX8-NEXT: v_add_u32_e32 v10, vcc, 0x84, v0 +; GFX8-NEXT: v_add_u32_e32 v8, vcc, 0x78, v0 +; GFX8-NEXT: buffer_store_dword v2, v10, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v17 +; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0x80, v0 +; GFX8-NEXT: buffer_store_dword v1, v17, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0x7c, v0 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[9:10], v9 +; GFX8-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v16 +; GFX8-NEXT: buffer_store_dword v1, v8, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX8-NEXT: v_add_u32_e32 v8, vcc, 0x74, v0 +; GFX8-NEXT: buffer_store_dword v2, v8, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v15 +; GFX8-NEXT: v_add_u32_e32 v15, vcc, 0x70, v0 +; GFX8-NEXT: buffer_store_dword v1, v15, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX8-NEXT: v_add_u32_e32 v15, vcc, 0x6c, v0 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[7:8], v7 +; GFX8-NEXT: buffer_store_dword v2, v15, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[15:16], v6 +; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v14 +; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x68, v0 +; GFX8-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x64, v0 +; GFX8-NEXT: buffer_store_dword v2, v6, s[0:3], 0 offen +; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v13 +; GFX8-NEXT: v_add_u32_e32 v13, vcc, 0x60, v0 +; GFX8-NEXT: buffer_store_dword v1, v13, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX8-NEXT: v_add_u32_e32 v13, vcc, 0x5c, v0 +; GFX8-NEXT: v_cvt_f64_f32_e32 v[5:6], v5 +; GFX8-NEXT: buffer_store_dword v2, v13, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[13:14], v4 +; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v3 +; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v12 +; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x58, v0 +; GFX8-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 +; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v11 +; GFX8-NEXT: v_add_u32_e32 v11, vcc, 0x54, v0 +; GFX8-NEXT: buffer_store_dword v2, v11, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v3 +; GFX8-NEXT: v_add_u32_e32 v11, vcc, 0x50, v0 +; GFX8-NEXT: buffer_store_dword v1, v11, s[0:3], 0 offen +; GFX8-NEXT: v_cvt_f64_f32_e32 v[11:12], v4 +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x4c, v0 +; GFX8-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x48, v0 +; GFX8-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x44, v0 -; GFX8-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v12, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 64, v0 -; GFX8-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 60, v0 -; GFX8-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v14, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 56, v0 -; GFX8-NEXT: buffer_store_dword v6, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v13, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 52, v0 -; GFX8-NEXT: buffer_store_dword v9, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v6, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 48, v0 -; GFX8-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 44, v0 -; GFX8-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v16, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 40, v0 -; GFX8-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v15, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 36, v0 -; GFX8-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 32, v0 -; GFX8-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 28, v0 -; GFX8-NEXT: buffer_store_dword v13, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v21, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 24, v0 -; GFX8-NEXT: buffer_store_dword v12, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v20, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 20, v0 -; GFX8-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 16, v0 -; GFX8-NEXT: buffer_store_dword v16, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v9, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 12, v0 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 8, v0 -; GFX8-NEXT: buffer_store_dword v15, v1, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen -; GFX8-NEXT: buffer_load_dword v58, off, s[0:3], s32 ; 4-byte Folded Reload -; GFX8-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload -; GFX8-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload -; GFX8-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload -; GFX8-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload -; GFX8-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload -; GFX8-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload -; GFX8-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload -; GFX8-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload -; GFX8-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload -; GFX8-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload +; GFX8-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen ; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_setpc_b64 s[30:31] ; @@ -8707,142 +8684,144 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v12 ; GFX900-NEXT: s_waitcnt vmcnt(29) ; GFX900-NEXT: v_lshlrev_b32_e32 v12, 16, v14 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[12:13], v12 ; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:244 ; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:240 ; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v2 ; GFX900-NEXT: s_waitcnt vmcnt(30) -; GFX900-NEXT: v_lshlrev_b32_e32 v13, 16, v15 +; GFX900-NEXT: v_lshlrev_b32_e32 v14, 16, v15 +; GFX900-NEXT: s_waitcnt vmcnt(29) +; GFX900-NEXT: v_lshlrev_b32_e32 v16, 16, v16 +; GFX900-NEXT: s_waitcnt vmcnt(28) +; GFX900-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:236 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[10:11], v11 ; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:232 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v11 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[11:12], v12 -; GFX900-NEXT: s_waitcnt vmcnt(31) -; GFX900-NEXT: v_lshlrev_b32_e32 v14, 16, v16 -; GFX900-NEXT: s_waitcnt vmcnt(30) -; GFX900-NEXT: v_lshlrev_b32_e32 v15, 16, v17 -; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:228 -; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:224 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v13 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[14:15], v14 +; GFX900-NEXT: s_waitcnt vmcnt(29) +; GFX900-NEXT: v_lshlrev_b32_e32 v18, 16, v18 +; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:224 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v16 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[16:17], v17 +; GFX900-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:228 +; GFX900-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:216 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[11:12], v18 ; GFX900-NEXT: s_waitcnt vmcnt(31) -; GFX900-NEXT: v_lshlrev_b32_e32 v16, 16, v18 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[13:14], v14 -; GFX900-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:220 -; GFX900-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:216 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[11:12], v15 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[15:16], v16 -; GFX900-NEXT: s_waitcnt vmcnt(32) -; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v19 +; GFX900-NEXT: v_lshlrev_b32_e32 v19, 16, v19 ; GFX900-NEXT: s_waitcnt vmcnt(30) -; GFX900-NEXT: v_lshlrev_b32_e32 v19, 16, v21 +; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v20 ; GFX900-NEXT: s_waitcnt vmcnt(28) -; GFX900-NEXT: v_lshlrev_b32_e32 v21, 16, v23 -; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:212 -; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:208 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v2 -; GFX900-NEXT: v_lshlrev_b32_e32 v17, 16, v20 -; GFX900-NEXT: v_lshlrev_b32_e32 v20, 16, v22 -; GFX900-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:204 -; GFX900-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:200 -; GFX900-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:196 -; GFX900-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:192 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[11:12], v21 -; GFX900-NEXT: s_waitcnt vmcnt(33) +; GFX900-NEXT: v_lshlrev_b32_e32 v22, 16, v22 +; GFX900-NEXT: v_lshlrev_b32_e32 v20, 16, v21 +; GFX900-NEXT: s_waitcnt vmcnt(27) +; GFX900-NEXT: v_lshlrev_b32_e32 v23, 16, v23 +; GFX900-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:220 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[18:19], v19 +; GFX900-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:208 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[13:14], v2 +; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:204 +; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:200 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v22 +; GFX900-NEXT: s_waitcnt vmcnt(30) ; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v24 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[13:14], v19 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[19:20], v20 -; GFX900-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:188 -; GFX900-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:184 -; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:180 -; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:176 -; GFX900-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:172 -; GFX900-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:168 -; GFX900-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:164 -; GFX900-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:160 -; GFX900-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:156 -; GFX900-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:152 -; GFX900-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:148 +; GFX900-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:212 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[20:21], v20 +; GFX900-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:196 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[22:23], v23 +; GFX900-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:192 +; GFX900-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:188 +; GFX900-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:184 +; GFX900-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:180 +; GFX900-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:176 +; GFX900-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:172 +; GFX900-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:168 +; GFX900-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:164 +; GFX900-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:160 +; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:156 +; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:152 +; GFX900-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:148 ; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v2 -; GFX900-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:144 -; GFX900-NEXT: s_waitcnt vmcnt(44) +; GFX900-NEXT: s_waitcnt vmcnt(43) ; GFX900-NEXT: v_lshlrev_b32_e32 v11, 16, v25 +; GFX900-NEXT: s_waitcnt vmcnt(42) +; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v26 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[12:13], v2 ; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:140 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[10:11], v11 ; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:136 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v11 -; GFX900-NEXT: s_waitcnt vmcnt(38) -; GFX900-NEXT: v_lshlrev_b32_e32 v13, 16, v28 -; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:132 -; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:128 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v13 -; GFX900-NEXT: s_waitcnt vmcnt(38) -; GFX900-NEXT: v_lshlrev_b32_e32 v15, 16, v30 -; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:124 -; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:120 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v15 -; GFX900-NEXT: v_lshlrev_b32_e32 v17, 16, v29 -; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:116 -; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:112 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v17 -; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v26 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[11:12], v2 +; GFX900-NEXT: s_waitcnt vmcnt(37) +; GFX900-NEXT: v_lshlrev_b32_e32 v9, 16, v28 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[14:15], v9 +; GFX900-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:132 +; GFX900-NEXT: s_waitcnt vmcnt(36) +; GFX900-NEXT: v_lshlrev_b32_e32 v11, 16, v30 ; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v27 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[13:14], v2 -; GFX900-NEXT: s_waitcnt vmcnt(41) -; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v31 +; GFX900-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:124 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[15:16], v11 +; GFX900-NEXT: v_lshlrev_b32_e32 v11, 16, v29 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[19:20], v11 ; GFX900-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[15:16], v2 -; GFX900-NEXT: s_waitcnt vmcnt(40) -; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v32 -; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:108 -; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:104 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[8:9], v8 +; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:128 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[9:10], v2 +; GFX900-NEXT: s_waitcnt vmcnt(37) +; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v31 +; GFX900-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:108 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[20:21], v8 ; GFX900-NEXT: v_cvt_f64_f32_e32 v[17:18], v2 -; GFX900-NEXT: s_waitcnt vmcnt(41) +; GFX900-NEXT: s_waitcnt vmcnt(37) +; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v32 +; GFX900-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:120 +; GFX900-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:112 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[14:15], v2 +; GFX900-NEXT: s_waitcnt vmcnt(38) ; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v33 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[19:20], v2 -; GFX900-NEXT: s_waitcnt vmcnt(40) +; GFX900-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:144 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[22:23], v2 +; GFX900-NEXT: s_waitcnt vmcnt(38) ; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v34 ; GFX900-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[21:22], v2 -; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v5 -; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:100 -; GFX900-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:96 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[8:9], v6 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[5:6], v2 -; GFX900-NEXT: s_waitcnt vmcnt(41) -; GFX900-NEXT: v_lshlrev_b32_e32 v10, 16, v7 -; GFX900-NEXT: s_waitcnt vmcnt(40) -; GFX900-NEXT: v_lshlrev_b32_e32 v7, 16, v1 +; GFX900-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX900-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:104 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[24:25], v6 +; GFX900-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:96 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[19:20], v2 +; GFX900-NEXT: s_waitcnt vmcnt(39) +; GFX900-NEXT: v_lshlrev_b32_e32 v2, 16, v7 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[5:6], v5 +; GFX900-NEXT: s_waitcnt vmcnt(38) +; GFX900-NEXT: v_lshlrev_b32_e32 v11, 16, v1 ; GFX900-NEXT: v_lshlrev_b32_e32 v1, 16, v4 -; GFX900-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:92 -; GFX900-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:88 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[7:8], v2 ; GFX900-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX900-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[3:4], v3 ; GFX900-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:84 ; GFX900-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:80 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[4:5], v7 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[6:7], v3 +; GFX900-NEXT: v_cvt_f64_f32_e32 v[5:6], v11 +; GFX900-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:116 +; GFX900-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:100 +; GFX900-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:92 +; GFX900-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:88 ; GFX900-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76 ; GFX900-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72 -; GFX900-NEXT: v_cvt_f64_f32_e32 v[1:2], v10 -; GFX900-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:68 -; GFX900-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:64 -; GFX900-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:60 -; GFX900-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:56 -; GFX900-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52 -; GFX900-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48 -; GFX900-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:44 -; GFX900-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:40 -; GFX900-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:36 -; GFX900-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:32 -; GFX900-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:28 -; GFX900-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:24 -; GFX900-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:20 -; GFX900-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:16 -; GFX900-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:12 -; GFX900-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:8 -; GFX900-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:4 -; GFX900-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen +; GFX900-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:68 +; GFX900-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:64 +; GFX900-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:60 +; GFX900-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:56 +; GFX900-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:52 +; GFX900-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:48 +; GFX900-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:44 +; GFX900-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:40 +; GFX900-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:36 +; GFX900-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:32 +; GFX900-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:28 +; GFX900-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:24 +; GFX900-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:20 +; GFX900-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:16 +; GFX900-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:12 +; GFX900-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:8 +; GFX900-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:4 +; GFX900-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -8862,6 +8841,9 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GFX950-NEXT: v_accvgpr_write_b32 a10, v58 ; Reload Reuse ; GFX950-NEXT: v_accvgpr_write_b32 a11, v59 ; Reload Reuse ; GFX950-NEXT: v_accvgpr_write_b32 a12, v60 ; Reload Reuse +; GFX950-NEXT: v_accvgpr_write_b32 a13, v61 ; Reload Reuse +; GFX950-NEXT: v_accvgpr_write_b32 a14, v62 ; Reload Reuse +; GFX950-NEXT: v_accvgpr_write_b32 a15, v63 ; Reload Reuse ; GFX950-NEXT: v_mov_b32_e32 v3, v2 ; GFX950-NEXT: v_mov_b32_e32 v2, v1 ; GFX950-NEXT: global_load_ushort v1, v[2:3], off offset:2 @@ -8889,13 +8871,13 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GFX950-NEXT: global_load_ushort v25, v[2:3], off offset:42 ; GFX950-NEXT: global_load_ushort v26, v[2:3], off offset:46 ; GFX950-NEXT: global_load_ushort v42, v[2:3], off offset:50 -; GFX950-NEXT: global_load_ushort v43, v[2:3], off offset:62 -; GFX950-NEXT: global_load_ushort v46, v[2:3], off offset:60 -; GFX950-NEXT: global_load_ushort v47, v[2:3], off offset:56 -; GFX950-NEXT: global_load_ushort v60, v[2:3], off offset:52 +; GFX950-NEXT: global_load_ushort v43, v[2:3], off offset:60 +; GFX950-NEXT: global_load_ushort v46, v[2:3], off offset:56 +; GFX950-NEXT: global_load_ushort v47, v[2:3], off offset:52 ; GFX950-NEXT: global_load_ushort v56, v[2:3], off offset:48 -; GFX950-NEXT: global_load_ushort v57, v[2:3], off offset:54 -; GFX950-NEXT: global_load_ushort v58, v[2:3], off offset:58 +; GFX950-NEXT: global_load_ushort v57, v[2:3], off offset:62 +; GFX950-NEXT: global_load_ushort v60, v[2:3], off offset:54 +; GFX950-NEXT: global_load_ushort v61, v[2:3], off offset:58 ; GFX950-NEXT: s_waitcnt vmcnt(31) ; GFX950-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX950-NEXT: s_waitcnt vmcnt(30) @@ -8942,37 +8924,34 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GFX950-NEXT: v_lshlrev_b32_e32 v41, 16, v26 ; GFX950-NEXT: s_waitcnt vmcnt(7) ; GFX950-NEXT: v_lshlrev_b32_e32 v1, 16, v42 -; GFX950-NEXT: s_waitcnt vmcnt(6) -; GFX950-NEXT: v_lshlrev_b32_e32 v42, 16, v43 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[18:19], v32 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[24:25], v33 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[26:27], v36 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[32:33], v37 +; GFX950-NEXT: s_waitcnt vmcnt(2) +; GFX950-NEXT: v_lshlrev_b32_e32 v42, 16, v57 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[30:31], v38 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[36:37], v39 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[38:39], v44 -; GFX950-NEXT: v_cvt_f64_f32_e32 v[44:45], v42 -; GFX950-NEXT: s_waitcnt vmcnt(5) -; GFX950-NEXT: v_lshlrev_b32_e32 v42, 16, v46 -; GFX950-NEXT: v_cvt_f64_f32_e32 v[42:43], v42 -; GFX950-NEXT: s_waitcnt vmcnt(0) -; GFX950-NEXT: v_lshlrev_b32_e32 v46, 16, v58 -; GFX950-NEXT: scratch_store_dwordx4 v0, v[42:45], off offset:240 -; GFX950-NEXT: v_cvt_f64_f32_e32 v[58:59], v46 -; GFX950-NEXT: v_lshlrev_b32_e32 v46, 16, v47 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[44:45], v1 ; GFX950-NEXT: v_lshlrev_b32_e32 v1, 16, v56 +; GFX950-NEXT: v_cvt_f64_f32_e32 v[58:59], v42 +; GFX950-NEXT: v_lshlrev_b32_e32 v42, 16, v43 +; GFX950-NEXT: v_cvt_f64_f32_e32 v[56:57], v42 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[42:43], v1 -; GFX950-NEXT: v_lshlrev_b32_e32 v1, 16, v57 -; GFX950-NEXT: v_cvt_f64_f32_e32 v[56:57], v46 +; GFX950-NEXT: s_waitcnt vmcnt(1) +; GFX950-NEXT: v_lshlrev_b32_e32 v1, 16, v60 ; GFX950-NEXT: v_lshlrev_b32_e32 v35, 16, v17 ; GFX950-NEXT: v_lshlrev_b32_e32 v48, 16, v23 ; GFX950-NEXT: v_lshlrev_b32_e32 v52, 16, v22 -; GFX950-NEXT: scratch_store_dwordx4 v0, v[56:59], off offset:224 +; GFX950-NEXT: scratch_store_dwordx4 v0, v[56:59], off offset:240 +; GFX950-NEXT: v_lshlrev_b32_e32 v46, 16, v46 ; GFX950-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX950-NEXT: v_cvt_f64_f32_e32 v[10:11], v28 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[58:59], v1 -; GFX950-NEXT: v_lshlrev_b32_e32 v1, 16, v60 +; GFX950-NEXT: v_lshlrev_b32_e32 v1, 16, v47 +; GFX950-NEXT: s_waitcnt vmcnt(1) +; GFX950-NEXT: v_lshlrev_b32_e32 v47, 16, v61 +; GFX950-NEXT: v_cvt_f64_f32_e32 v[10:11], v28 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[16:17], v29 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[22:23], v34 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[28:29], v35 @@ -8982,10 +8961,13 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[54:55], v53 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[52:53], v40 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[40:41], v41 +; GFX950-NEXT: v_cvt_f64_f32_e32 v[62:63], v47 +; GFX950-NEXT: v_cvt_f64_f32_e32 v[60:61], v46 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[56:57], v1 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[8:9], v7 ; GFX950-NEXT: v_cvt_f64_f32_e32 v[6:7], v6 +; GFX950-NEXT: scratch_store_dwordx4 v0, v[60:63], off offset:224 ; GFX950-NEXT: scratch_store_dwordx4 v0, v[56:59], off offset:208 ; GFX950-NEXT: scratch_store_dwordx4 v0, v[42:45], off offset:192 ; GFX950-NEXT: scratch_store_dwordx4 v0, v[38:41], off offset:176 @@ -9000,6 +8982,9 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GFX950-NEXT: scratch_store_dwordx4 v0, v[10:13], off offset:32 ; GFX950-NEXT: scratch_store_dwordx4 v0, v[6:9], off offset:16 ; GFX950-NEXT: scratch_store_dwordx4 v0, v[2:5], off +; GFX950-NEXT: v_accvgpr_read_b32 v63, a15 ; Reload Reuse +; GFX950-NEXT: v_accvgpr_read_b32 v62, a14 ; Reload Reuse +; GFX950-NEXT: v_accvgpr_read_b32 v61, a13 ; Reload Reuse ; GFX950-NEXT: v_accvgpr_read_b32 v60, a12 ; Reload Reuse ; GFX950-NEXT: v_accvgpr_read_b32 v59, a11 ; Reload Reuse ; GFX950-NEXT: v_accvgpr_read_b32 v58, a10 ; Reload Reuse @@ -9092,111 +9077,112 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GFX10-NEXT: v_lshlrev_b32_e32 v69, 16, v22 ; GFX10-NEXT: s_waitcnt vmcnt(11) ; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v23 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 +; GFX10-NEXT: s_waitcnt vmcnt(10) +; GFX10-NEXT: v_lshlrev_b32_e32 v70, 16, v24 ; GFX10-NEXT: s_waitcnt vmcnt(9) ; GFX10-NEXT: v_lshlrev_b32_e32 v71, 16, v25 ; GFX10-NEXT: s_waitcnt vmcnt(8) ; GFX10-NEXT: v_lshlrev_b32_e32 v5, 16, v26 ; GFX10-NEXT: s_waitcnt vmcnt(7) ; GFX10-NEXT: v_lshlrev_b32_e32 v80, 16, v27 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[3:4], v3 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[1:2], v1 ; GFX10-NEXT: s_waitcnt vmcnt(5) ; GFX10-NEXT: v_lshlrev_b32_e32 v7, 16, v29 ; GFX10-NEXT: s_waitcnt vmcnt(4) ; GFX10-NEXT: v_lshlrev_b32_e32 v27, 16, v30 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[5:6], v5 -; GFX10-NEXT: s_waitcnt vmcnt(2) -; GFX10-NEXT: v_lshlrev_b32_e32 v11, 16, v32 +; GFX10-NEXT: s_waitcnt vmcnt(3) +; GFX10-NEXT: v_lshlrev_b32_e32 v25, 16, v31 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[3:4], v3 ; GFX10-NEXT: s_waitcnt vmcnt(1) ; GFX10-NEXT: v_lshlrev_b32_e32 v23, 16, v33 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[7:8], v7 ; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: v_lshlrev_b32_e32 v19, 16, v34 -; GFX10-NEXT: v_lshlrev_b32_e32 v25, 16, v31 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[11:12], v11 ; GFX10-NEXT: v_lshlrev_b32_e32 v81, 16, v28 -; GFX10-NEXT: v_lshlrev_b32_e32 v70, 16, v24 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[25:26], v25 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[27:28], v27 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[23:24], v23 ; GFX10-NEXT: v_cvt_f64_f32_e32 v[19:20], v19 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[31:32], v71 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[35:36], v68 -; GFX10-NEXT: v_lshlrev_b32_e32 v64, 16, v16 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[33:34], v70 +; GFX10-NEXT: v_lshlrev_b32_e32 v11, 16, v32 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[5:6], v5 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[7:8], v7 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[29:30], v81 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[31:32], v80 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[11:12], v11 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[33:34], v71 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[35:36], v69 ; GFX10-NEXT: v_lshlrev_b32_e32 v55, 16, v15 -; GFX10-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:252 -; GFX10-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:248 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[1:2], v23 +; GFX10-NEXT: v_lshlrev_b32_e32 v64, 16, v16 ; GFX10-NEXT: v_cvt_f64_f32_e32 v[15:16], v37 ; GFX10-NEXT: v_cvt_f64_f32_e32 v[17:18], v38 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[37:38], v67 +; GFX10-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:252 +; GFX10-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:248 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[1:2], v48 ; GFX10-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:244 ; GFX10-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:240 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[3:4], v25 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[37:38], v66 +; GFX10-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:196 +; GFX10-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:192 +; GFX10-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:204 +; GFX10-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:212 +; GFX10-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:208 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[19:20], v70 +; GFX10-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:200 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[23:24], v68 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[25:26], v66 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[3:4], v49 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[48:49], v65 +; GFX10-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:188 +; GFX10-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:184 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[27:28], v64 ; GFX10-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:236 ; GFX10-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:232 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[5:6], v27 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[23:24], v48 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[5:6], v50 ; GFX10-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:228 ; GFX10-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:224 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[7:8], v81 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[25:26], v49 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[7:8], v51 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[50:51], v55 +; GFX10-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:180 +; GFX10-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:176 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[29:30], v54 ; GFX10-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:220 ; GFX10-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:216 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[11:12], v80 -; GFX10-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:212 -; GFX10-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:208 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[19:20], v69 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[48:49], v64 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[27:28], v50 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[29:30], v51 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[50:51], v54 -; GFX10-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:204 -; GFX10-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:200 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[1:2], v67 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[21:22], v39 -; GFX10-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:196 -; GFX10-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:192 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[3:4], v65 -; GFX10-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:188 -; GFX10-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:184 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[5:6], v55 -; GFX10-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:180 -; GFX10-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:176 -; GFX10-NEXT: v_cvt_f64_f32_e32 v[7:8], v53 -; GFX10-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:172 -; GFX10-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:168 ; GFX10-NEXT: v_cvt_f64_f32_e32 v[11:12], v52 -; GFX10-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen offset:164 -; GFX10-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:160 -; GFX10-NEXT: buffer_store_dword v34, v0, s[0:3], 0 offen offset:156 -; GFX10-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen offset:152 -; GFX10-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:148 -; GFX10-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:144 -; GFX10-NEXT: buffer_store_dword v36, v0, s[0:3], 0 offen offset:140 -; GFX10-NEXT: buffer_store_dword v35, v0, s[0:3], 0 offen offset:136 -; GFX10-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:132 -; GFX10-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:128 -; GFX10-NEXT: buffer_store_dword v38, v0, s[0:3], 0 offen offset:124 -; GFX10-NEXT: buffer_store_dword v37, v0, s[0:3], 0 offen offset:120 -; GFX10-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:116 -; GFX10-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112 -; GFX10-NEXT: buffer_store_dword v49, v0, s[0:3], 0 offen offset:108 -; GFX10-NEXT: buffer_store_dword v48, v0, s[0:3], 0 offen offset:104 -; GFX10-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:100 -; GFX10-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96 -; GFX10-NEXT: buffer_store_dword v51, v0, s[0:3], 0 offen offset:92 -; GFX10-NEXT: buffer_store_dword v50, v0, s[0:3], 0 offen offset:88 -; GFX10-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:84 -; GFX10-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:80 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[52:53], v53 +; GFX10-NEXT: v_cvt_f64_f32_e32 v[21:22], v39 +; GFX10-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen offset:172 +; GFX10-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:168 +; GFX10-NEXT: buffer_store_dword v34, v0, s[0:3], 0 offen offset:164 +; GFX10-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen offset:160 +; GFX10-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:156 +; GFX10-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:152 +; GFX10-NEXT: buffer_store_dword v36, v0, s[0:3], 0 offen offset:148 +; GFX10-NEXT: buffer_store_dword v35, v0, s[0:3], 0 offen offset:144 +; GFX10-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:140 +; GFX10-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:136 +; GFX10-NEXT: buffer_store_dword v38, v0, s[0:3], 0 offen offset:132 +; GFX10-NEXT: buffer_store_dword v37, v0, s[0:3], 0 offen offset:128 +; GFX10-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:124 +; GFX10-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:120 +; GFX10-NEXT: buffer_store_dword v49, v0, s[0:3], 0 offen offset:116 +; GFX10-NEXT: buffer_store_dword v48, v0, s[0:3], 0 offen offset:112 +; GFX10-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:108 +; GFX10-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:104 +; GFX10-NEXT: buffer_store_dword v51, v0, s[0:3], 0 offen offset:100 +; GFX10-NEXT: buffer_store_dword v50, v0, s[0:3], 0 offen offset:96 +; GFX10-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:92 +; GFX10-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:88 +; GFX10-NEXT: buffer_store_dword v53, v0, s[0:3], 0 offen offset:84 +; GFX10-NEXT: buffer_store_dword v52, v0, s[0:3], 0 offen offset:80 ; GFX10-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:76 ; GFX10-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:72 -; GFX10-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:68 -; GFX10-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:64 -; GFX10-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:60 -; GFX10-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:56 -; GFX10-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:52 -; GFX10-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:48 -; GFX10-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:44 -; GFX10-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:40 +; GFX10-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:68 +; GFX10-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:64 +; GFX10-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:60 +; GFX10-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:56 +; GFX10-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:52 +; GFX10-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48 +; GFX10-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44 +; GFX10-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40 ; GFX10-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:36 ; GFX10-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:32 ; GFX10-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:28 @@ -9367,26 +9353,26 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GFX1250-NEXT: v_dual_mov_b32 v3, v2 :: v_dual_mov_b32 v2, v1 ; GFX1250-NEXT: s_clause 0x1f ; GFX1250-NEXT: global_load_u16 v1, v[2:3], off offset:2 -; GFX1250-NEXT: global_load_u16 v10, v[2:3], off offset:12 -; GFX1250-NEXT: global_load_u16 v6, v[2:3], off offset:8 -; GFX1250-NEXT: global_load_u16 v4, v[2:3], off offset:4 -; GFX1250-NEXT: global_load_u16 v5, v[2:3], off -; GFX1250-NEXT: global_load_u16 v7, v[2:3], off offset:6 -; GFX1250-NEXT: global_load_u16 v8, v[2:3], off offset:62 -; GFX1250-NEXT: global_load_u16 v9, v[2:3], off offset:60 -; GFX1250-NEXT: global_load_u16 v11, v[2:3], off offset:58 -; GFX1250-NEXT: global_load_u16 v12, v[2:3], off offset:56 -; GFX1250-NEXT: global_load_u16 v13, v[2:3], off offset:10 -; GFX1250-NEXT: global_load_u16 v14, v[2:3], off offset:14 -; GFX1250-NEXT: global_load_u16 v15, v[2:3], off offset:18 -; GFX1250-NEXT: global_load_u16 v16, v[2:3], off offset:28 -; GFX1250-NEXT: global_load_u16 v17, v[2:3], off offset:24 -; GFX1250-NEXT: global_load_u16 v18, v[2:3], off offset:20 -; GFX1250-NEXT: global_load_u16 v19, v[2:3], off offset:16 -; GFX1250-NEXT: global_load_u16 v20, v[2:3], off offset:22 -; GFX1250-NEXT: global_load_u16 v21, v[2:3], off offset:26 -; GFX1250-NEXT: global_load_u16 v22, v[2:3], off offset:30 -; GFX1250-NEXT: global_load_u16 v23, v[2:3], off offset:34 +; GFX1250-NEXT: global_load_u16 v4, v[2:3], off offset:12 +; GFX1250-NEXT: global_load_u16 v5, v[2:3], off offset:8 +; GFX1250-NEXT: global_load_u16 v6, v[2:3], off offset:4 +; GFX1250-NEXT: global_load_u16 v7, v[2:3], off +; GFX1250-NEXT: global_load_u16 v8, v[2:3], off offset:6 +; GFX1250-NEXT: global_load_u16 v9, v[2:3], off offset:10 +; GFX1250-NEXT: global_load_u16 v10, v[2:3], off offset:14 +; GFX1250-NEXT: global_load_u16 v11, v[2:3], off offset:18 +; GFX1250-NEXT: global_load_u16 v12, v[2:3], off offset:28 +; GFX1250-NEXT: global_load_u16 v13, v[2:3], off offset:24 +; GFX1250-NEXT: global_load_u16 v14, v[2:3], off offset:20 +; GFX1250-NEXT: global_load_u16 v15, v[2:3], off offset:16 +; GFX1250-NEXT: global_load_u16 v16, v[2:3], off offset:22 +; GFX1250-NEXT: global_load_u16 v17, v[2:3], off offset:26 +; GFX1250-NEXT: global_load_u16 v18, v[2:3], off offset:30 +; GFX1250-NEXT: global_load_u16 v19, v[2:3], off offset:34 +; GFX1250-NEXT: global_load_u16 v20, v[2:3], off offset:62 +; GFX1250-NEXT: global_load_u16 v21, v[2:3], off offset:60 +; GFX1250-NEXT: global_load_u16 v22, v[2:3], off offset:58 +; GFX1250-NEXT: global_load_u16 v23, v[2:3], off offset:56 ; GFX1250-NEXT: global_load_u16 v24, v[2:3], off offset:44 ; GFX1250-NEXT: global_load_u16 v25, v[2:3], off offset:40 ; GFX1250-NEXT: global_load_u16 v26, v[2:3], off offset:36 @@ -9399,85 +9385,88 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0 ; GFX1250-NEXT: global_load_u16 v33, v[2:3], off offset:48 ; GFX1250-NEXT: global_load_u16 v34, v[2:3], off offset:54 ; GFX1250-NEXT: s_wait_loadcnt 0x1e -; GFX1250-NEXT: v_dual_lshlrev_b32 v1, 16, v1 :: v_dual_lshlrev_b32 v37, 16, v10 -; GFX1250-NEXT: s_wait_loadcnt 0x1b -; GFX1250-NEXT: v_dual_lshlrev_b32 v85, 16, v4 :: v_dual_lshlrev_b32 v84, 16, v5 -; GFX1250-NEXT: s_wait_loadcnt 0x19 +; GFX1250-NEXT: v_dual_lshlrev_b32 v1, 16, v1 :: v_dual_lshlrev_b32 v98, 16, v4 +; GFX1250-NEXT: s_wait_loadcnt 0x1c +; GFX1250-NEXT: v_dual_lshlrev_b32 v97, 16, v5 :: v_dual_lshlrev_b32 v36, 16, v6 +; GFX1250-NEXT: s_wait_loadcnt 0x1a +; GFX1250-NEXT: v_dual_lshlrev_b32 v96, 16, v7 :: v_dual_lshlrev_b32 v35, 16, v8 +; GFX1250-NEXT: s_wait_loadcnt 0x18 +; GFX1250-NEXT: v_dual_lshlrev_b32 v37, 16, v9 :: v_dual_lshlrev_b32 v38, 16, v10 +; GFX1250-NEXT: s_wait_loadcnt 0x16 +; GFX1250-NEXT: v_dual_lshlrev_b32 v39, 16, v11 :: v_dual_lshlrev_b32 v101, 16, v12 +; GFX1250-NEXT: s_wait_loadcnt 0x14 +; GFX1250-NEXT: v_dual_lshlrev_b32 v48, 16, v13 :: v_dual_lshlrev_b32 v100, 16, v14 +; GFX1250-NEXT: s_wait_loadcnt 0x12 +; GFX1250-NEXT: v_dual_lshlrev_b32 v99, 16, v15 :: v_dual_lshlrev_b32 v16, 16, v16 +; GFX1250-NEXT: s_wait_loadcnt 0x10 +; GFX1250-NEXT: v_dual_lshlrev_b32 v17, 16, v17 :: v_dual_lshlrev_b32 v49, 16, v18 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[12:13], v36 +; GFX1250-NEXT: s_wait_loadcnt 0xd ; GFX1250-NEXT: s_wait_xcnt 0x0 -; GFX1250-NEXT: v_dual_lshlrev_b32 v35, 16, v7 :: v_dual_lshlrev_b32 v2, 16, v8 -; GFX1250-NEXT: s_wait_loadcnt 0x17 -; GFX1250-NEXT: v_dual_lshlrev_b32 v3, 16, v9 :: v_dual_lshlrev_b32 v7, 16, v11 -; GFX1250-NEXT: s_wait_loadcnt 0x15 -; GFX1250-NEXT: v_dual_lshlrev_b32 v11, 16, v12 :: v_dual_lshlrev_b32 v12, 16, v13 -; GFX1250-NEXT: v_lshlrev_b32_e32 v13, 16, v6 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[4:5], v2 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[2:3], v3 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[8:9], v7 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[6:7], v11 -; GFX1250-NEXT: s_wait_loadcnt 0x13 -; GFX1250-NEXT: v_dual_lshlrev_b32 v36, 16, v14 :: v_dual_lshlrev_b32 v38, 16, v15 +; GFX1250-NEXT: v_dual_lshlrev_b32 v2, 16, v20 :: v_dual_lshlrev_b32 v3, 16, v21 ; GFX1250-NEXT: s_wait_loadcnt 0xc -; GFX1250-NEXT: v_dual_lshlrev_b32 v21, 16, v21 :: v_dual_lshlrev_b32 v39, 16, v22 +; GFX1250-NEXT: v_dual_lshlrev_b32 v20, 16, v19 :: v_dual_lshlrev_b32 v6, 16, v22 ; GFX1250-NEXT: s_wait_loadcnt 0xb -; GFX1250-NEXT: v_dual_lshlrev_b32 v49, 16, v23 :: v_dual_lshlrev_b32 v68, 16, v17 +; GFX1250-NEXT: v_lshlrev_b32_e32 v7, 16, v23 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[4:5], v2 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[2:3], v3 ; GFX1250-NEXT: s_wait_loadcnt 0x9 -; GFX1250-NEXT: v_dual_lshlrev_b32 v48, 16, v16 :: v_dual_lshlrev_b32 v25, 16, v25 -; GFX1250-NEXT: v_lshlrev_b32_e32 v24, 16, v24 -; GFX1250-NEXT: s_wait_loadcnt 0x5 -; GFX1250-NEXT: v_dual_lshlrev_b32 v50, 16, v28 :: v_dual_lshlrev_b32 v64, 16, v29 -; GFX1250-NEXT: s_wait_loadcnt 0x3 -; GFX1250-NEXT: v_dual_lshlrev_b32 v51, 16, v30 :: v_dual_lshlrev_b32 v52, 16, v31 -; GFX1250-NEXT: v_dual_lshlrev_b32 v69, 16, v27 :: v_dual_lshlrev_b32 v70, 16, v26 +; GFX1250-NEXT: v_dual_lshlrev_b32 v25, 16, v25 :: v_dual_lshlrev_b32 v24, 16, v24 +; GFX1250-NEXT: s_wait_loadcnt 0x6 +; GFX1250-NEXT: v_lshlrev_b32_e32 v28, 16, v28 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[8:9], v6 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[6:7], v7 +; GFX1250-NEXT: s_wait_loadcnt 0x1 +; GFX1250-NEXT: v_dual_lshlrev_b32 v64, 16, v31 :: v_dual_lshlrev_b32 v65, 16, v33 ; GFX1250-NEXT: s_wait_loadcnt 0x0 -; GFX1250-NEXT: v_dual_lshlrev_b32 v53, 16, v34 :: v_dual_lshlrev_b32 v32, 16, v32 -; GFX1250-NEXT: v_lshlrev_b32_e32 v33, 16, v33 +; GFX1250-NEXT: v_dual_lshlrev_b32 v68, 16, v34 :: v_dual_lshlrev_b32 v69, 16, v32 +; GFX1250-NEXT: v_dual_lshlrev_b32 v29, 16, v29 :: v_dual_lshlrev_b32 v53, 16, v30 +; GFX1250-NEXT: v_dual_lshlrev_b32 v21, 16, v27 :: v_dual_lshlrev_b32 v52, 16, v26 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[86:87], v68 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[84:85], v69 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[82:83], v64 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[80:81], v65 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[70:71], v53 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[68:69], v24 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[66:67], v29 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[64:65], v25 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[54:55], v28 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[52:53], v52 ; GFX1250-NEXT: v_cvt_f64_f32_e32 v[22:23], v38 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[30:31], v39 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[38:39], v50 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[54:55], v53 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[26:27], v39 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[32:33], v48 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[38:39], v49 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[50:51], v20 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[48:49], v21 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[18:19], v37 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[36:37], v101 ; GFX1250-NEXT: v_cvt_f64_f32_e32 v[14:15], v35 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[28:29], v48 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[34:35], v49 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[48:49], v33 -; GFX1250-NEXT: v_dual_lshlrev_b32 v20, 16, v20 :: v_dual_lshlrev_b32 v81, 16, v18 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[66:67], v64 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[64:65], v25 -; GFX1250-NEXT: v_lshlrev_b32_e32 v80, 16, v19 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[18:19], v36 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[16:17], v37 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[36:37], v70 -; GFX1250-NEXT: scratch_store_b128 v0, v[2:5], off offset:240 -; GFX1250-NEXT: s_wait_xcnt 0x0 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[4:5], v51 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[50:51], v52 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[52:53], v32 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[2:3], v24 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[32:33], v69 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[70:71], v21 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[68:69], v68 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[26:27], v20 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[24:25], v81 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[20:21], v80 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[82:83], v12 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[80:81], v13 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[12:13], v85 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[34:35], v17 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[30:31], v16 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[28:29], v100 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[24:25], v99 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[20:21], v98 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[16:17], v97 ; GFX1250-NEXT: v_cvt_f64_f32_e32 v[10:11], v1 +; GFX1250-NEXT: s_clause 0x1 +; GFX1250-NEXT: scratch_store_b128 v0, v[2:5], off offset:240 ; GFX1250-NEXT: scratch_store_b128 v0, v[6:9], off offset:224 ; GFX1250-NEXT: s_wait_xcnt 0x0 -; GFX1250-NEXT: v_cvt_f64_f32_e32 v[8:9], v84 +; GFX1250-NEXT: v_cvt_f64_f32_e32 v[8:9], v96 ; GFX1250-NEXT: s_clause 0xd -; GFX1250-NEXT: scratch_store_b128 v0, v[52:55], off offset:208 -; GFX1250-NEXT: scratch_store_b128 v0, v[48:51], off offset:192 -; GFX1250-NEXT: scratch_store_b128 v0, v[2:5], off offset:176 +; GFX1250-NEXT: scratch_store_b128 v0, v[84:87], off offset:208 +; GFX1250-NEXT: scratch_store_b128 v0, v[80:83], off offset:192 +; GFX1250-NEXT: scratch_store_b128 v0, v[68:71], off offset:176 ; GFX1250-NEXT: scratch_store_b128 v0, v[64:67], off offset:160 -; GFX1250-NEXT: scratch_store_b128 v0, v[36:39], off offset:144 -; GFX1250-NEXT: scratch_store_b128 v0, v[32:35], off offset:128 -; GFX1250-NEXT: scratch_store_b128 v0, v[28:31], off offset:112 -; GFX1250-NEXT: scratch_store_b128 v0, v[68:71], off offset:96 -; GFX1250-NEXT: scratch_store_b128 v0, v[24:27], off offset:80 -; GFX1250-NEXT: scratch_store_b128 v0, v[20:23], off offset:64 -; GFX1250-NEXT: scratch_store_b128 v0, v[16:19], off offset:48 -; GFX1250-NEXT: scratch_store_b128 v0, v[80:83], off offset:32 +; GFX1250-NEXT: scratch_store_b128 v0, v[52:55], off offset:144 +; GFX1250-NEXT: scratch_store_b128 v0, v[48:51], off offset:128 +; GFX1250-NEXT: scratch_store_b128 v0, v[36:39], off offset:112 +; GFX1250-NEXT: scratch_store_b128 v0, v[32:35], off offset:96 +; GFX1250-NEXT: scratch_store_b128 v0, v[28:31], off offset:80 +; GFX1250-NEXT: scratch_store_b128 v0, v[24:27], off offset:64 +; GFX1250-NEXT: scratch_store_b128 v0, v[20:23], off offset:48 +; GFX1250-NEXT: scratch_store_b128 v0, v[16:19], off offset:32 ; GFX1250-NEXT: scratch_store_b128 v0, v[12:15], off offset:16 ; GFX1250-NEXT: scratch_store_b128 v0, v[8:11], off ; GFX1250-NEXT: s_set_pc_i64 s[30:31] diff --git a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll index 238b3ff3a232a..f910ebb1f0236 100644 --- a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll +++ b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll @@ -2759,13 +2759,13 @@ define <32 x i8> @load_v32i8(ptr addrspace(8) inreg %buf) { ; SDAG-NEXT: s_waitcnt vmcnt(1) ; SDAG-NEXT: v_lshrrev_b64 v[33:34], 24, v[0:1] ; SDAG-NEXT: s_waitcnt vmcnt(0) -; SDAG-NEXT: v_lshrrev_b64 v[34:35], 24, v[16:17] -; SDAG-NEXT: v_lshrrev_b32_e32 v38, 8, v0 -; SDAG-NEXT: v_lshrrev_b32_e32 v32, 16, v0 -; SDAG-NEXT: v_lshrrev_b32_e32 v36, 8, v16 -; SDAG-NEXT: v_lshrrev_b32_e32 v37, 16, v16 +; SDAG-NEXT: v_lshrrev_b64 v[37:38], 24, v[16:17] ; SDAG-NEXT: v_lshrrev_b64 v[11:12], 24, v[2:3] ; SDAG-NEXT: v_lshrrev_b64 v[27:28], 24, v[18:19] +; SDAG-NEXT: v_lshrrev_b32_e32 v34, 8, v0 +; SDAG-NEXT: v_lshrrev_b32_e32 v35, 16, v0 +; SDAG-NEXT: v_lshrrev_b32_e32 v36, 8, v16 +; SDAG-NEXT: v_lshrrev_b32_e32 v32, 16, v16 ; SDAG-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v1 ; SDAG-NEXT: v_lshrrev_b32_e32 v7, 24, v1 @@ -2788,12 +2788,12 @@ define <32 x i8> @load_v32i8(ptr addrspace(8) inreg %buf) { ; SDAG-NEXT: v_mov_b32_e32 v20, v17 ; SDAG-NEXT: v_mov_b32_e32 v24, v18 ; SDAG-NEXT: v_mov_b32_e32 v28, v19 -; SDAG-NEXT: v_mov_b32_e32 v3, v33 -; SDAG-NEXT: v_mov_b32_e32 v19, v34 -; SDAG-NEXT: v_mov_b32_e32 v1, v38 -; SDAG-NEXT: v_mov_b32_e32 v2, v32 +; SDAG-NEXT: v_mov_b32_e32 v1, v34 +; SDAG-NEXT: v_mov_b32_e32 v2, v35 ; SDAG-NEXT: v_mov_b32_e32 v17, v36 -; SDAG-NEXT: v_mov_b32_e32 v18, v37 +; SDAG-NEXT: v_mov_b32_e32 v18, v32 +; SDAG-NEXT: v_mov_b32_e32 v3, v33 +; SDAG-NEXT: v_mov_b32_e32 v19, v37 ; SDAG-NEXT: s_setpc_b64 s[30:31] ; ; GISEL-LABEL: load_v32i8: @@ -2910,23 +2910,23 @@ define void @store_v32i8(<32 x i8> %data, ptr addrspace(8) inreg %buf) { ; GISEL-LABEL: store_v32i8: ; GISEL: ; %bb.0: ; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GISEL-NEXT: buffer_load_ubyte v33, off, s[0:3], s32 ; GISEL-NEXT: v_mov_b32_e32 v31, 8 ; GISEL-NEXT: v_lshlrev_b32_sdwa v1, v31, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GISEL-NEXT: v_mov_b32_e32 v32, 0xff ; GISEL-NEXT: v_and_or_b32 v0, v0, v32, v1 +; GISEL-NEXT: v_and_b32_e32 v1, 0xff, v2 +; GISEL-NEXT: v_and_b32_e32 v2, 0xff, v3 +; GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GISEL-NEXT: v_lshlrev_b32_e32 v2, 24, v2 +; GISEL-NEXT: v_or3_b32 v0, v0, v1, v2 ; GISEL-NEXT: v_lshlrev_b32_sdwa v1, v31, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GISEL-NEXT: v_and_b32_e32 v5, 0xff, v7 -; GISEL-NEXT: buffer_load_ubyte v7, off, s[0:3], s32 +; GISEL-NEXT: v_and_b32_e32 v2, 0xff, v6 +; GISEL-NEXT: v_and_b32_e32 v3, 0xff, v7 ; GISEL-NEXT: v_and_or_b32 v1, v4, v32, v1 -; GISEL-NEXT: v_and_b32_e32 v2, 0xff, v2 -; GISEL-NEXT: v_and_b32_e32 v3, 0xff, v3 -; GISEL-NEXT: v_and_b32_e32 v4, 0xff, v6 ; GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GISEL-NEXT: v_lshlrev_b32_e32 v3, 24, v3 -; GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GISEL-NEXT: v_lshlrev_b32_e32 v5, 24, v5 -; GISEL-NEXT: v_or3_b32 v0, v0, v2, v3 -; GISEL-NEXT: v_or3_b32 v1, v1, v4, v5 +; GISEL-NEXT: v_or3_b32 v1, v1, v2, v3 ; GISEL-NEXT: v_lshlrev_b32_sdwa v2, v31, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GISEL-NEXT: v_and_b32_e32 v3, 0xff, v10 ; GISEL-NEXT: v_and_b32_e32 v4, 0xff, v11 @@ -2947,28 +2947,28 @@ define void @store_v32i8(<32 x i8> %data, ptr addrspace(8) inreg %buf) { ; GISEL-NEXT: v_and_or_b32 v4, v16, v32, v4 ; GISEL-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GISEL-NEXT: v_lshlrev_b32_e32 v6, 24, v6 -; GISEL-NEXT: v_lshlrev_b32_sdwa v8, v31, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GISEL-NEXT: v_or3_b32 v4, v4, v5, v6 -; GISEL-NEXT: v_and_b32_e32 v5, 0xff, v22 -; GISEL-NEXT: v_and_b32_e32 v6, 0xff, v23 -; GISEL-NEXT: v_and_or_b32 v8, v20, v32, v8 -; GISEL-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GISEL-NEXT: v_lshlrev_b32_e32 v6, 24, v6 -; GISEL-NEXT: v_or3_b32 v5, v8, v5, v6 +; GISEL-NEXT: v_lshlrev_b32_sdwa v5, v31, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GISEL-NEXT: v_and_b32_e32 v6, 0xff, v22 +; GISEL-NEXT: v_and_b32_e32 v7, 0xff, v23 +; GISEL-NEXT: v_and_or_b32 v5, v20, v32, v5 +; GISEL-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; GISEL-NEXT: v_lshlrev_b32_e32 v7, 24, v7 +; GISEL-NEXT: v_or3_b32 v5, v5, v6, v7 ; GISEL-NEXT: v_lshlrev_b32_sdwa v6, v31, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GISEL-NEXT: v_and_b32_e32 v8, 0xff, v26 -; GISEL-NEXT: v_and_b32_e32 v9, 0xff, v27 +; GISEL-NEXT: v_and_b32_e32 v7, 0xff, v26 +; GISEL-NEXT: v_and_b32_e32 v8, 0xff, v27 ; GISEL-NEXT: v_and_or_b32 v6, v24, v32, v6 +; GISEL-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; GISEL-NEXT: v_lshlrev_b32_e32 v8, 24, v8 +; GISEL-NEXT: v_or3_b32 v6, v6, v7, v8 +; GISEL-NEXT: v_lshlrev_b32_sdwa v7, v31, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 +; GISEL-NEXT: v_and_b32_e32 v8, 0xff, v30 +; GISEL-NEXT: v_and_or_b32 v7, v28, v32, v7 ; GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v8 -; GISEL-NEXT: v_lshlrev_b32_e32 v9, 24, v9 -; GISEL-NEXT: v_or3_b32 v6, v6, v8, v9 -; GISEL-NEXT: v_lshlrev_b32_sdwa v8, v31, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GISEL-NEXT: v_and_b32_e32 v9, 0xff, v30 -; GISEL-NEXT: v_and_or_b32 v8, v28, v32, v8 -; GISEL-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GISEL-NEXT: s_waitcnt vmcnt(0) -; GISEL-NEXT: v_lshlrev_b32_e32 v7, 24, v7 -; GISEL-NEXT: v_or3_b32 v7, v8, v9, v7 +; GISEL-NEXT: v_lshlrev_b32_e32 v9, 24, v33 +; GISEL-NEXT: v_or3_b32 v7, v7, v8, v9 ; GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 ; GISEL-NEXT: buffer_store_dwordx4 v[4:7], off, s[16:19], 0 offset:16 ; GISEL-NEXT: s_waitcnt vmcnt(0) diff --git a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll index fe5dd9dec0f54..276acfb245d70 100644 --- a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll +++ b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll @@ -268,42 +268,42 @@ define amdgpu_kernel void @memcpy_known(ptr addrspace(7) %src, ptr addrspace(7) ; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[54:57], v0, s[4:7], 0 offen offset:208 ; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[58:61], v0, s[4:7], 0 offen offset:224 ; SDAG-GFX942-NEXT: buffer_load_dwordx4 a[0:3], v0, s[4:7], 0 offen offset:240 -; SDAG-GFX942-NEXT: s_add_i32 s2, s8, s1 +; SDAG-GFX942-NEXT: s_add_i32 s3, s8, s1 ; SDAG-GFX942-NEXT: s_addk_i32 s1, 0x100 -; SDAG-GFX942-NEXT: v_mov_b32_e32 v0, s2 +; SDAG-GFX942-NEXT: v_mov_b32_e32 v1, s3 ; SDAG-GFX942-NEXT: s_cmpk_lt_u32 s1, 0x2000 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[2:5], v0, s[12:15], 0 offen +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[2:5], v1, s[12:15], 0 offen ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[6:9], v0, s[12:15], 0 offen offset:16 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[6:9], v1, s[12:15], 0 offen offset:16 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[10:13], v0, s[12:15], 0 offen offset:32 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[10:13], v1, s[12:15], 0 offen offset:32 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[14:17], v0, s[12:15], 0 offen offset:48 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[14:17], v1, s[12:15], 0 offen offset:48 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[18:21], v0, s[12:15], 0 offen offset:64 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[18:21], v1, s[12:15], 0 offen offset:64 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[22:25], v0, s[12:15], 0 offen offset:80 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[22:25], v1, s[12:15], 0 offen offset:80 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[26:29], v0, s[12:15], 0 offen offset:96 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[26:29], v1, s[12:15], 0 offen offset:96 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[30:33], v0, s[12:15], 0 offen offset:112 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[30:33], v1, s[12:15], 0 offen offset:112 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[34:37], v0, s[12:15], 0 offen offset:128 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[34:37], v1, s[12:15], 0 offen offset:128 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[38:41], v0, s[12:15], 0 offen offset:144 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[38:41], v1, s[12:15], 0 offen offset:144 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[42:45], v0, s[12:15], 0 offen offset:160 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[42:45], v1, s[12:15], 0 offen offset:160 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[46:49], v0, s[12:15], 0 offen offset:176 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[46:49], v1, s[12:15], 0 offen offset:176 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[50:53], v0, s[12:15], 0 offen offset:192 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[50:53], v1, s[12:15], 0 offen offset:192 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[54:57], v0, s[12:15], 0 offen offset:208 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[54:57], v1, s[12:15], 0 offen offset:208 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[58:61], v0, s[12:15], 0 offen offset:224 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[58:61], v1, s[12:15], 0 offen offset:224 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 a[0:3], v0, s[12:15], 0 offen offset:240 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 a[0:3], v1, s[12:15], 0 offen offset:240 ; SDAG-GFX942-NEXT: s_cbranch_scc1 .LBB0_1 ; SDAG-GFX942-NEXT: ; %bb.2: ; %static-memcpy-post-expansion ; SDAG-GFX942-NEXT: s_endpgm @@ -789,42 +789,42 @@ define amdgpu_kernel void @memcpy_known_medium(ptr addrspace(7) %src, ptr addrsp ; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[54:57], v0, s[4:7], 0 offen offset:208 ; SDAG-GFX942-NEXT: buffer_load_dwordx4 v[58:61], v0, s[4:7], 0 offen offset:224 ; SDAG-GFX942-NEXT: buffer_load_dwordx4 a[0:3], v0, s[4:7], 0 offen offset:240 -; SDAG-GFX942-NEXT: s_add_i32 s2, s8, s1 +; SDAG-GFX942-NEXT: s_add_i32 s3, s8, s1 ; SDAG-GFX942-NEXT: s_addk_i32 s1, 0x100 -; SDAG-GFX942-NEXT: v_mov_b32_e32 v0, s2 +; SDAG-GFX942-NEXT: v_mov_b32_e32 v1, s3 ; SDAG-GFX942-NEXT: s_cmpk_lt_u32 s1, 0x100 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[2:5], v0, s[12:15], 0 offen +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[2:5], v1, s[12:15], 0 offen ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[6:9], v0, s[12:15], 0 offen offset:16 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[6:9], v1, s[12:15], 0 offen offset:16 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[10:13], v0, s[12:15], 0 offen offset:32 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[10:13], v1, s[12:15], 0 offen offset:32 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[14:17], v0, s[12:15], 0 offen offset:48 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[14:17], v1, s[12:15], 0 offen offset:48 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[18:21], v0, s[12:15], 0 offen offset:64 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[18:21], v1, s[12:15], 0 offen offset:64 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[22:25], v0, s[12:15], 0 offen offset:80 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[22:25], v1, s[12:15], 0 offen offset:80 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[26:29], v0, s[12:15], 0 offen offset:96 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[26:29], v1, s[12:15], 0 offen offset:96 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[30:33], v0, s[12:15], 0 offen offset:112 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[30:33], v1, s[12:15], 0 offen offset:112 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[34:37], v0, s[12:15], 0 offen offset:128 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[34:37], v1, s[12:15], 0 offen offset:128 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[38:41], v0, s[12:15], 0 offen offset:144 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[38:41], v1, s[12:15], 0 offen offset:144 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[42:45], v0, s[12:15], 0 offen offset:160 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[42:45], v1, s[12:15], 0 offen offset:160 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[46:49], v0, s[12:15], 0 offen offset:176 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[46:49], v1, s[12:15], 0 offen offset:176 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[50:53], v0, s[12:15], 0 offen offset:192 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[50:53], v1, s[12:15], 0 offen offset:192 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[54:57], v0, s[12:15], 0 offen offset:208 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[54:57], v1, s[12:15], 0 offen offset:208 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[58:61], v0, s[12:15], 0 offen offset:224 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 v[58:61], v1, s[12:15], 0 offen offset:224 ; SDAG-GFX942-NEXT: s_waitcnt vmcnt(15) -; SDAG-GFX942-NEXT: buffer_store_dwordx4 a[0:3], v0, s[12:15], 0 offen offset:240 +; SDAG-GFX942-NEXT: buffer_store_dwordx4 a[0:3], v1, s[12:15], 0 offen offset:240 ; SDAG-GFX942-NEXT: s_cbranch_scc1 .LBB1_1 ; SDAG-GFX942-NEXT: ; %bb.2: ; %static-memcpy-post-expansion ; SDAG-GFX942-NEXT: s_endpgm diff --git a/llvm/test/CodeGen/AMDGPU/call-argument-types.ll b/llvm/test/CodeGen/AMDGPU/call-argument-types.ll index 1042532193944..ddbb839c5e5c5 100644 --- a/llvm/test/CodeGen/AMDGPU/call-argument-types.ll +++ b/llvm/test/CodeGen/AMDGPU/call-argument-types.ll @@ -5149,98 +5149,98 @@ define amdgpu_kernel void @test_call_external_void_func_v16i32() #0 { define amdgpu_kernel void @test_call_external_void_func_v32i32() #0 { ; VI-LABEL: test_call_external_void_func_v32i32: ; VI: ; %bb.0: -; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0 -; VI-NEXT: s_mov_b32 s7, 0xf000 -; VI-NEXT: s_mov_b32 s6, -1 ; VI-NEXT: s_mov_b32 s36, SCRATCH_RSRC_DWORD0 +; VI-NEXT: s_mov_b64 s[6:7], s[0:1] +; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 ; VI-NEXT: s_mov_b32 s37, SCRATCH_RSRC_DWORD1 -; VI-NEXT: s_waitcnt lgkmcnt(0) -; VI-NEXT: buffer_load_dwordx4 v[24:27], off, s[4:7], 0 offset:96 -; VI-NEXT: buffer_load_dwordx4 v[28:31], off, s[4:7], 0 offset:112 -; VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 -; VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16 -; VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[4:7], 0 offset:32 -; VI-NEXT: buffer_load_dwordx4 v[12:15], off, s[4:7], 0 offset:48 -; VI-NEXT: buffer_load_dwordx4 v[16:19], off, s[4:7], 0 offset:64 -; VI-NEXT: buffer_load_dwordx4 v[20:23], off, s[4:7], 0 offset:80 ; VI-NEXT: s_mov_b32 s38, -1 ; VI-NEXT: s_mov_b32 s39, 0xe80000 ; VI-NEXT: s_add_u32 s36, s36, s3 +; VI-NEXT: s_mov_b32 s3, 0xf000 +; VI-NEXT: s_mov_b32 s2, -1 +; VI-NEXT: s_waitcnt lgkmcnt(0) +; VI-NEXT: buffer_load_dwordx4 v[28:31], off, s[0:3], 0 offset:112 +; VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0 +; VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[0:3], 0 offset:16 +; VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[0:3], 0 offset:32 +; VI-NEXT: buffer_load_dwordx4 v[12:15], off, s[0:3], 0 offset:48 +; VI-NEXT: buffer_load_dwordx4 v[16:19], off, s[0:3], 0 offset:64 +; VI-NEXT: buffer_load_dwordx4 v[20:23], off, s[0:3], 0 offset:80 +; VI-NEXT: buffer_load_dwordx4 v[24:27], off, s[0:3], 0 offset:96 ; VI-NEXT: s_addc_u32 s37, s37, 0 -; VI-NEXT: s_mov_b64 s[6:7], s[0:1] ; VI-NEXT: s_mov_b64 s[0:1], s[36:37] ; VI-NEXT: s_mov_b32 s32, 0 -; VI-NEXT: s_getpc_b64 s[8:9] -; VI-NEXT: s_add_u32 s8, s8, external_void_func_v32i32@rel32@lo+4 -; VI-NEXT: s_addc_u32 s9, s9, external_void_func_v32i32@rel32@hi+12 +; VI-NEXT: s_getpc_b64 s[4:5] +; VI-NEXT: s_add_u32 s4, s4, external_void_func_v32i32@rel32@lo+4 +; VI-NEXT: s_addc_u32 s5, s5, external_void_func_v32i32@rel32@hi+12 ; VI-NEXT: s_mov_b64 s[2:3], s[38:39] -; VI-NEXT: s_waitcnt vmcnt(6) +; VI-NEXT: s_waitcnt vmcnt(7) ; VI-NEXT: buffer_store_dword v31, off, s[36:39], s32 -; VI-NEXT: s_swappc_b64 s[30:31], s[8:9] +; VI-NEXT: s_swappc_b64 s[30:31], s[4:5] ; VI-NEXT: s_endpgm ; ; CI-LABEL: test_call_external_void_func_v32i32: ; CI: ; %bb.0: -; CI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0 -; CI-NEXT: s_mov_b32 s7, 0xf000 -; CI-NEXT: s_mov_b32 s6, -1 ; CI-NEXT: s_mov_b32 s36, SCRATCH_RSRC_DWORD0 +; CI-NEXT: s_mov_b64 s[6:7], s[0:1] +; CI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 ; CI-NEXT: s_mov_b32 s37, SCRATCH_RSRC_DWORD1 -; CI-NEXT: s_waitcnt lgkmcnt(0) -; CI-NEXT: buffer_load_dwordx4 v[24:27], off, s[4:7], 0 offset:96 -; CI-NEXT: buffer_load_dwordx4 v[28:31], off, s[4:7], 0 offset:112 -; CI-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 -; CI-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16 -; CI-NEXT: buffer_load_dwordx4 v[8:11], off, s[4:7], 0 offset:32 -; CI-NEXT: buffer_load_dwordx4 v[12:15], off, s[4:7], 0 offset:48 -; CI-NEXT: buffer_load_dwordx4 v[16:19], off, s[4:7], 0 offset:64 -; CI-NEXT: buffer_load_dwordx4 v[20:23], off, s[4:7], 0 offset:80 ; CI-NEXT: s_mov_b32 s38, -1 ; CI-NEXT: s_mov_b32 s39, 0xe8f000 ; CI-NEXT: s_add_u32 s36, s36, s3 +; CI-NEXT: s_mov_b32 s3, 0xf000 +; CI-NEXT: s_mov_b32 s2, -1 +; CI-NEXT: s_waitcnt lgkmcnt(0) +; CI-NEXT: buffer_load_dwordx4 v[28:31], off, s[0:3], 0 offset:112 +; CI-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0 +; CI-NEXT: buffer_load_dwordx4 v[4:7], off, s[0:3], 0 offset:16 +; CI-NEXT: buffer_load_dwordx4 v[8:11], off, s[0:3], 0 offset:32 +; CI-NEXT: buffer_load_dwordx4 v[12:15], off, s[0:3], 0 offset:48 +; CI-NEXT: buffer_load_dwordx4 v[16:19], off, s[0:3], 0 offset:64 +; CI-NEXT: buffer_load_dwordx4 v[20:23], off, s[0:3], 0 offset:80 +; CI-NEXT: buffer_load_dwordx4 v[24:27], off, s[0:3], 0 offset:96 ; CI-NEXT: s_addc_u32 s37, s37, 0 -; CI-NEXT: s_mov_b64 s[6:7], s[0:1] ; CI-NEXT: s_mov_b64 s[0:1], s[36:37] ; CI-NEXT: s_mov_b32 s32, 0 -; CI-NEXT: s_getpc_b64 s[8:9] -; CI-NEXT: s_add_u32 s8, s8, external_void_func_v32i32@rel32@lo+4 -; CI-NEXT: s_addc_u32 s9, s9, external_void_func_v32i32@rel32@hi+12 +; CI-NEXT: s_getpc_b64 s[4:5] +; CI-NEXT: s_add_u32 s4, s4, external_void_func_v32i32@rel32@lo+4 +; CI-NEXT: s_addc_u32 s5, s5, external_void_func_v32i32@rel32@hi+12 ; CI-NEXT: s_mov_b64 s[2:3], s[38:39] -; CI-NEXT: s_waitcnt vmcnt(6) +; CI-NEXT: s_waitcnt vmcnt(7) ; CI-NEXT: buffer_store_dword v31, off, s[36:39], s32 -; CI-NEXT: s_swappc_b64 s[30:31], s[8:9] +; CI-NEXT: s_swappc_b64 s[30:31], s[4:5] ; CI-NEXT: s_endpgm ; ; SDAG-LABEL: test_call_external_void_func_v32i32: ; SDAG: ; %bb.0: -; SDAG-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0 -; SDAG-NEXT: s_mov_b32 s7, 0xf000 -; SDAG-NEXT: s_mov_b32 s6, -1 ; SDAG-NEXT: s_mov_b32 s36, SCRATCH_RSRC_DWORD0 +; SDAG-NEXT: s_mov_b64 s[6:7], s[0:1] +; SDAG-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 ; SDAG-NEXT: s_mov_b32 s37, SCRATCH_RSRC_DWORD1 -; SDAG-NEXT: s_waitcnt lgkmcnt(0) -; SDAG-NEXT: buffer_load_dwordx4 v[24:27], off, s[4:7], 0 offset:96 -; SDAG-NEXT: buffer_load_dwordx4 v[28:31], off, s[4:7], 0 offset:112 -; SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 -; SDAG-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16 -; SDAG-NEXT: buffer_load_dwordx4 v[8:11], off, s[4:7], 0 offset:32 -; SDAG-NEXT: buffer_load_dwordx4 v[12:15], off, s[4:7], 0 offset:48 -; SDAG-NEXT: buffer_load_dwordx4 v[16:19], off, s[4:7], 0 offset:64 -; SDAG-NEXT: buffer_load_dwordx4 v[20:23], off, s[4:7], 0 offset:80 ; SDAG-NEXT: s_mov_b32 s38, -1 ; SDAG-NEXT: s_mov_b32 s39, 0xe00000 ; SDAG-NEXT: s_add_u32 s36, s36, s3 +; SDAG-NEXT: s_mov_b32 s3, 0xf000 +; SDAG-NEXT: s_mov_b32 s2, -1 +; SDAG-NEXT: s_waitcnt lgkmcnt(0) +; SDAG-NEXT: buffer_load_dwordx4 v[28:31], off, s[0:3], 0 offset:112 +; SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0 +; SDAG-NEXT: buffer_load_dwordx4 v[4:7], off, s[0:3], 0 offset:16 +; SDAG-NEXT: buffer_load_dwordx4 v[8:11], off, s[0:3], 0 offset:32 +; SDAG-NEXT: buffer_load_dwordx4 v[12:15], off, s[0:3], 0 offset:48 +; SDAG-NEXT: buffer_load_dwordx4 v[16:19], off, s[0:3], 0 offset:64 +; SDAG-NEXT: buffer_load_dwordx4 v[20:23], off, s[0:3], 0 offset:80 +; SDAG-NEXT: buffer_load_dwordx4 v[24:27], off, s[0:3], 0 offset:96 ; SDAG-NEXT: s_addc_u32 s37, s37, 0 -; SDAG-NEXT: s_mov_b64 s[6:7], s[0:1] ; SDAG-NEXT: s_mov_b64 s[0:1], s[36:37] ; SDAG-NEXT: s_mov_b32 s32, 0 -; SDAG-NEXT: s_getpc_b64 s[8:9] -; SDAG-NEXT: s_add_u32 s8, s8, external_void_func_v32i32@rel32@lo+4 -; SDAG-NEXT: s_addc_u32 s9, s9, external_void_func_v32i32@rel32@hi+12 +; SDAG-NEXT: s_getpc_b64 s[4:5] +; SDAG-NEXT: s_add_u32 s4, s4, external_void_func_v32i32@rel32@lo+4 +; SDAG-NEXT: s_addc_u32 s5, s5, external_void_func_v32i32@rel32@hi+12 ; SDAG-NEXT: s_mov_b64 s[2:3], s[38:39] -; SDAG-NEXT: s_waitcnt vmcnt(6) +; SDAG-NEXT: s_waitcnt vmcnt(7) ; SDAG-NEXT: buffer_store_dword v31, off, s[36:39], s32 -; SDAG-NEXT: s_swappc_b64 s[30:31], s[8:9] +; SDAG-NEXT: s_swappc_b64 s[30:31], s[4:5] ; SDAG-NEXT: s_endpgm ; ; GFX11-LABEL: test_call_external_void_func_v32i32: @@ -5288,13 +5288,13 @@ define amdgpu_kernel void @test_call_external_void_func_v32i32() #0 { ; HSA-NEXT: buffer_load_dwordx4 v[24:27], off, s[8:11], 0 offset:96 ; HSA-NEXT: s_mov_b32 s32, 0 ; HSA-NEXT: s_mov_b32 flat_scratch_lo, s7 -; HSA-NEXT: s_getpc_b64 s[12:13] -; HSA-NEXT: s_add_u32 s12, s12, external_void_func_v32i32@rel32@lo+4 -; HSA-NEXT: s_addc_u32 s13, s13, external_void_func_v32i32@rel32@hi+12 +; HSA-NEXT: s_getpc_b64 s[8:9] +; HSA-NEXT: s_add_u32 s8, s8, external_void_func_v32i32@rel32@lo+4 +; HSA-NEXT: s_addc_u32 s9, s9, external_void_func_v32i32@rel32@hi+12 ; HSA-NEXT: s_mov_b64 s[6:7], s[4:5] ; HSA-NEXT: s_waitcnt vmcnt(7) ; HSA-NEXT: buffer_store_dword v31, off, s[0:3], s32 -; HSA-NEXT: s_swappc_b64 s[30:31], s[12:13] +; HSA-NEXT: s_swappc_b64 s[30:31], s[8:9] ; HSA-NEXT: s_endpgm ; ; GISEL-LABEL: test_call_external_void_func_v32i32: @@ -5361,26 +5361,26 @@ define amdgpu_kernel void @test_call_external_void_func_v32i32() #0 { define amdgpu_kernel void @test_call_external_void_func_v32i32_i32(i32) #0 { ; VI-LABEL: test_call_external_void_func_v32i32_i32: ; VI: ; %bb.0: +; VI-NEXT: s_mov_b64 s[6:7], s[0:1] +; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 +; VI-NEXT: s_mov_b32 s3, 0xf000 +; VI-NEXT: s_mov_b32 s2, -1 ; VI-NEXT: s_mov_b32 s36, SCRATCH_RSRC_DWORD0 +; VI-NEXT: s_waitcnt lgkmcnt(0) +; VI-NEXT: buffer_load_dwordx4 v[28:31], off, s[0:3], 0 offset:112 +; VI-NEXT: buffer_load_dword v32, off, s[0:3], 0 +; VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0 +; VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[0:3], 0 offset:16 +; VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[0:3], 0 offset:32 +; VI-NEXT: buffer_load_dwordx4 v[12:15], off, s[0:3], 0 offset:48 +; VI-NEXT: buffer_load_dwordx4 v[16:19], off, s[0:3], 0 offset:64 +; VI-NEXT: buffer_load_dwordx4 v[20:23], off, s[0:3], 0 offset:80 +; VI-NEXT: buffer_load_dwordx4 v[24:27], off, s[0:3], 0 offset:96 ; VI-NEXT: s_mov_b32 s37, SCRATCH_RSRC_DWORD1 ; VI-NEXT: s_mov_b32 s38, -1 ; VI-NEXT: s_mov_b32 s39, 0xe80000 ; VI-NEXT: s_add_u32 s36, s36, s5 -; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0 -; VI-NEXT: s_mov_b32 s7, 0xf000 -; VI-NEXT: s_mov_b32 s6, -1 ; VI-NEXT: s_addc_u32 s37, s37, 0 -; VI-NEXT: s_waitcnt lgkmcnt(0) -; VI-NEXT: buffer_load_dword v32, off, s[4:7], 0 -; VI-NEXT: buffer_load_dwordx4 v[28:31], off, s[4:7], 0 offset:112 -; VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 -; VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16 -; VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[4:7], 0 offset:32 -; VI-NEXT: buffer_load_dwordx4 v[12:15], off, s[4:7], 0 offset:48 -; VI-NEXT: buffer_load_dwordx4 v[16:19], off, s[4:7], 0 offset:64 -; VI-NEXT: buffer_load_dwordx4 v[20:23], off, s[4:7], 0 offset:80 -; VI-NEXT: buffer_load_dwordx4 v[24:27], off, s[4:7], 0 offset:96 -; VI-NEXT: s_mov_b64 s[6:7], s[0:1] ; VI-NEXT: s_mov_b64 s[0:1], s[36:37] ; VI-NEXT: s_mov_b32 s32, 0 ; VI-NEXT: s_getpc_b64 s[4:5] @@ -5388,34 +5388,34 @@ define amdgpu_kernel void @test_call_external_void_func_v32i32_i32(i32) #0 { ; VI-NEXT: s_addc_u32 s5, s5, external_void_func_v32i32_i32@rel32@hi+12 ; VI-NEXT: s_mov_b64 s[2:3], s[38:39] ; VI-NEXT: s_waitcnt vmcnt(8) -; VI-NEXT: buffer_store_dword v32, off, s[36:39], s32 offset:4 -; VI-NEXT: s_waitcnt vmcnt(8) ; VI-NEXT: buffer_store_dword v31, off, s[36:39], s32 +; VI-NEXT: s_waitcnt vmcnt(8) +; VI-NEXT: buffer_store_dword v32, off, s[36:39], s32 offset:4 ; VI-NEXT: s_swappc_b64 s[30:31], s[4:5] ; VI-NEXT: s_endpgm ; ; CI-LABEL: test_call_external_void_func_v32i32_i32: ; CI: ; %bb.0: +; CI-NEXT: s_mov_b64 s[6:7], s[0:1] +; CI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 +; CI-NEXT: s_mov_b32 s3, 0xf000 +; CI-NEXT: s_mov_b32 s2, -1 ; CI-NEXT: s_mov_b32 s36, SCRATCH_RSRC_DWORD0 +; CI-NEXT: s_waitcnt lgkmcnt(0) +; CI-NEXT: buffer_load_dwordx4 v[28:31], off, s[0:3], 0 offset:112 +; CI-NEXT: buffer_load_dword v32, off, s[0:3], 0 +; CI-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0 +; CI-NEXT: buffer_load_dwordx4 v[4:7], off, s[0:3], 0 offset:16 +; CI-NEXT: buffer_load_dwordx4 v[8:11], off, s[0:3], 0 offset:32 +; CI-NEXT: buffer_load_dwordx4 v[12:15], off, s[0:3], 0 offset:48 +; CI-NEXT: buffer_load_dwordx4 v[16:19], off, s[0:3], 0 offset:64 +; CI-NEXT: buffer_load_dwordx4 v[20:23], off, s[0:3], 0 offset:80 +; CI-NEXT: buffer_load_dwordx4 v[24:27], off, s[0:3], 0 offset:96 ; CI-NEXT: s_mov_b32 s37, SCRATCH_RSRC_DWORD1 ; CI-NEXT: s_mov_b32 s38, -1 ; CI-NEXT: s_mov_b32 s39, 0xe8f000 ; CI-NEXT: s_add_u32 s36, s36, s5 -; CI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0 -; CI-NEXT: s_mov_b32 s7, 0xf000 -; CI-NEXT: s_mov_b32 s6, -1 ; CI-NEXT: s_addc_u32 s37, s37, 0 -; CI-NEXT: s_waitcnt lgkmcnt(0) -; CI-NEXT: buffer_load_dword v32, off, s[4:7], 0 -; CI-NEXT: buffer_load_dwordx4 v[28:31], off, s[4:7], 0 offset:112 -; CI-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 -; CI-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16 -; CI-NEXT: buffer_load_dwordx4 v[8:11], off, s[4:7], 0 offset:32 -; CI-NEXT: buffer_load_dwordx4 v[12:15], off, s[4:7], 0 offset:48 -; CI-NEXT: buffer_load_dwordx4 v[16:19], off, s[4:7], 0 offset:64 -; CI-NEXT: buffer_load_dwordx4 v[20:23], off, s[4:7], 0 offset:80 -; CI-NEXT: buffer_load_dwordx4 v[24:27], off, s[4:7], 0 offset:96 -; CI-NEXT: s_mov_b64 s[6:7], s[0:1] ; CI-NEXT: s_mov_b64 s[0:1], s[36:37] ; CI-NEXT: s_mov_b32 s32, 0 ; CI-NEXT: s_getpc_b64 s[4:5] @@ -5423,34 +5423,34 @@ define amdgpu_kernel void @test_call_external_void_func_v32i32_i32(i32) #0 { ; CI-NEXT: s_addc_u32 s5, s5, external_void_func_v32i32_i32@rel32@hi+12 ; CI-NEXT: s_mov_b64 s[2:3], s[38:39] ; CI-NEXT: s_waitcnt vmcnt(8) -; CI-NEXT: buffer_store_dword v32, off, s[36:39], s32 offset:4 -; CI-NEXT: s_waitcnt vmcnt(8) ; CI-NEXT: buffer_store_dword v31, off, s[36:39], s32 +; CI-NEXT: s_waitcnt vmcnt(8) +; CI-NEXT: buffer_store_dword v32, off, s[36:39], s32 offset:4 ; CI-NEXT: s_swappc_b64 s[30:31], s[4:5] ; CI-NEXT: s_endpgm ; ; SDAG-LABEL: test_call_external_void_func_v32i32_i32: ; SDAG: ; %bb.0: +; SDAG-NEXT: s_mov_b64 s[6:7], s[0:1] +; SDAG-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 +; SDAG-NEXT: s_mov_b32 s3, 0xf000 +; SDAG-NEXT: s_mov_b32 s2, -1 ; SDAG-NEXT: s_mov_b32 s36, SCRATCH_RSRC_DWORD0 +; SDAG-NEXT: s_waitcnt lgkmcnt(0) +; SDAG-NEXT: buffer_load_dwordx4 v[28:31], off, s[0:3], 0 offset:112 +; SDAG-NEXT: buffer_load_dword v32, off, s[0:3], 0 +; SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0 +; SDAG-NEXT: buffer_load_dwordx4 v[4:7], off, s[0:3], 0 offset:16 +; SDAG-NEXT: buffer_load_dwordx4 v[8:11], off, s[0:3], 0 offset:32 +; SDAG-NEXT: buffer_load_dwordx4 v[12:15], off, s[0:3], 0 offset:48 +; SDAG-NEXT: buffer_load_dwordx4 v[16:19], off, s[0:3], 0 offset:64 +; SDAG-NEXT: buffer_load_dwordx4 v[20:23], off, s[0:3], 0 offset:80 +; SDAG-NEXT: buffer_load_dwordx4 v[24:27], off, s[0:3], 0 offset:96 ; SDAG-NEXT: s_mov_b32 s37, SCRATCH_RSRC_DWORD1 ; SDAG-NEXT: s_mov_b32 s38, -1 ; SDAG-NEXT: s_mov_b32 s39, 0xe00000 ; SDAG-NEXT: s_add_u32 s36, s36, s5 -; SDAG-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0 -; SDAG-NEXT: s_mov_b32 s7, 0xf000 -; SDAG-NEXT: s_mov_b32 s6, -1 ; SDAG-NEXT: s_addc_u32 s37, s37, 0 -; SDAG-NEXT: s_waitcnt lgkmcnt(0) -; SDAG-NEXT: buffer_load_dword v32, off, s[4:7], 0 -; SDAG-NEXT: buffer_load_dwordx4 v[28:31], off, s[4:7], 0 offset:112 -; SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 -; SDAG-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16 -; SDAG-NEXT: buffer_load_dwordx4 v[8:11], off, s[4:7], 0 offset:32 -; SDAG-NEXT: buffer_load_dwordx4 v[12:15], off, s[4:7], 0 offset:48 -; SDAG-NEXT: buffer_load_dwordx4 v[16:19], off, s[4:7], 0 offset:64 -; SDAG-NEXT: buffer_load_dwordx4 v[20:23], off, s[4:7], 0 offset:80 -; SDAG-NEXT: buffer_load_dwordx4 v[24:27], off, s[4:7], 0 offset:96 -; SDAG-NEXT: s_mov_b64 s[6:7], s[0:1] ; SDAG-NEXT: s_mov_b64 s[0:1], s[36:37] ; SDAG-NEXT: s_mov_b32 s32, 0 ; SDAG-NEXT: s_getpc_b64 s[4:5] @@ -5458,9 +5458,9 @@ define amdgpu_kernel void @test_call_external_void_func_v32i32_i32(i32) #0 { ; SDAG-NEXT: s_addc_u32 s5, s5, external_void_func_v32i32_i32@rel32@hi+12 ; SDAG-NEXT: s_mov_b64 s[2:3], s[38:39] ; SDAG-NEXT: s_waitcnt vmcnt(8) -; SDAG-NEXT: buffer_store_dword v32, off, s[36:39], s32 offset:4 -; SDAG-NEXT: s_waitcnt vmcnt(8) ; SDAG-NEXT: buffer_store_dword v31, off, s[36:39], s32 +; SDAG-NEXT: s_waitcnt vmcnt(8) +; SDAG-NEXT: buffer_store_dword v32, off, s[36:39], s32 offset:4 ; SDAG-NEXT: s_swappc_b64 s[30:31], s[4:5] ; SDAG-NEXT: s_endpgm ; @@ -5503,8 +5503,8 @@ define amdgpu_kernel void @test_call_external_void_func_v32i32_i32(i32) #0 { ; HSA-NEXT: s_mov_b32 s11, 0x1100f000 ; HSA-NEXT: s_mov_b32 s10, -1 ; HSA-NEXT: s_waitcnt lgkmcnt(0) -; HSA-NEXT: buffer_load_dword v32, off, s[8:11], 0 ; HSA-NEXT: buffer_load_dwordx4 v[28:31], off, s[8:11], 0 offset:112 +; HSA-NEXT: buffer_load_dword v32, off, s[8:11], 0 ; HSA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 ; HSA-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 ; HSA-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:32 @@ -5519,9 +5519,9 @@ define amdgpu_kernel void @test_call_external_void_func_v32i32_i32(i32) #0 { ; HSA-NEXT: s_addc_u32 s9, s9, external_void_func_v32i32_i32@rel32@hi+12 ; HSA-NEXT: s_mov_b64 s[6:7], s[4:5] ; HSA-NEXT: s_waitcnt vmcnt(8) -; HSA-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:4 -; HSA-NEXT: s_waitcnt vmcnt(8) ; HSA-NEXT: buffer_store_dword v31, off, s[0:3], s32 +; HSA-NEXT: s_waitcnt vmcnt(8) +; HSA-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:4 ; HSA-NEXT: s_swappc_b64 s[30:31], s[8:9] ; HSA-NEXT: s_endpgm ; diff --git a/llvm/test/CodeGen/AMDGPU/clmul.ll b/llvm/test/CodeGen/AMDGPU/clmul.ll index fea2ff0681a88..eb1f590483253 100644 --- a/llvm/test/CodeGen/AMDGPU/clmul.ll +++ b/llvm/test/CodeGen/AMDGPU/clmul.ll @@ -539,15 +539,15 @@ define amdgpu_kernel void @test_clmulr_i32(ptr addrspace(1) %out, ptr addrspace( ; SI-NEXT: s_mov_b32 s9, s7 ; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 ; SI-NEXT: s_mov_b32 s7, 0 -; SI-NEXT: s_mov_b32 s21, s7 ; SI-NEXT: s_mov_b32 s0, s4 +; SI-NEXT: s_mov_b32 s11, s7 ; SI-NEXT: s_mov_b32 s1, s5 +; SI-NEXT: s_mov_b32 s13, s7 ; SI-NEXT: s_mov_b32 s9, s7 ; SI-NEXT: s_mov_b32 s15, s7 -; SI-NEXT: s_mov_b32 s11, s7 -; SI-NEXT: s_mov_b32 s13, s7 ; SI-NEXT: s_mov_b32 s17, s7 ; SI-NEXT: s_mov_b32 s19, s7 +; SI-NEXT: s_mov_b32 s21, s7 ; SI-NEXT: s_mov_b32 s23, s7 ; SI-NEXT: s_mov_b32 s25, s7 ; SI-NEXT: s_mov_b32 s27, s7 @@ -558,240 +558,240 @@ define amdgpu_kernel void @test_clmulr_i32(ptr addrspace(1) %out, ptr addrspace( ; SI-NEXT: s_mov_b32 s39, s7 ; SI-NEXT: s_mov_b32 s41, s7 ; SI-NEXT: s_mov_b32 s43, s7 +; SI-NEXT: s_mov_b32 s45, s7 +; SI-NEXT: s_mov_b32 s47, s7 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_readfirstlane_b32 s33, v1 -; SI-NEXT: s_and_b32 s20, s33, 2 +; SI-NEXT: v_readfirstlane_b32 s4, v1 +; SI-NEXT: s_and_b32 s10, s4, 2 ; SI-NEXT: v_readfirstlane_b32 s6, v0 -; SI-NEXT: s_bfe_i32 s8, s33, 0x10000 -; SI-NEXT: v_cmp_eq_u64_e64 s[20:21], s[20:21], 0 -; SI-NEXT: s_lshl_b64 s[4:5], s[6:7], 1 -; SI-NEXT: s_and_b32 s8, s8, s6 -; SI-NEXT: s_and_b64 s[20:21], s[20:21], exec -; SI-NEXT: s_cselect_b32 s21, 0, s5 -; SI-NEXT: s_cselect_b32 s20, 0, s4 -; SI-NEXT: s_and_b32 s14, s33, 4 -; SI-NEXT: s_xor_b64 s[20:21], s[8:9], s[20:21] -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[14:15], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 2 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s15, 0, s15 -; SI-NEXT: s_cselect_b32 s14, 0, s14 -; SI-NEXT: s_and_b32 s10, s33, 8 +; SI-NEXT: s_bfe_i32 s5, s4, 0x10000 ; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 -; SI-NEXT: s_xor_b64 s[14:15], s[20:21], s[14:15] -; SI-NEXT: s_lshl_b64 s[20:21], s[6:7], 3 +; SI-NEXT: s_lshl_b64 s[48:49], s[6:7], 1 +; SI-NEXT: s_and_b32 s8, s5, s6 ; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec -; SI-NEXT: s_cselect_b32 s11, 0, s21 -; SI-NEXT: s_cselect_b32 s10, 0, s20 -; SI-NEXT: s_and_b32 s12, s33, 16 +; SI-NEXT: s_cselect_b32 s11, 0, s49 +; SI-NEXT: s_cselect_b32 s10, 0, s48 +; SI-NEXT: s_and_b32 s12, s4, 4 ; SI-NEXT: v_cmp_eq_u64_e64 s[12:13], s[12:13], 0 -; SI-NEXT: s_lshl_b64 s[20:21], s[6:7], 4 -; SI-NEXT: s_xor_b64 s[10:11], s[14:15], s[10:11] -; SI-NEXT: s_and_b64 s[12:13], s[12:13], exec -; SI-NEXT: s_cselect_b32 s13, 0, s21 -; SI-NEXT: s_cselect_b32 s12, 0, s20 -; SI-NEXT: s_and_b32 s16, s33, 32 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[16:17], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 5 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s18, s33, 64 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[18:19], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 6 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s22, s33, 0x80 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[22:23], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 7 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s24, s33, 0x100 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[24:25], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 8 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s26, s33, 0x200 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[26:27], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 9 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s28, s33, 0x400 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[28:29], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 10 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s30, s33, 0x800 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[30:31], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 11 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s34, s33, 0x1000 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[34:35], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 12 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s36, s33, 0x2000 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[36:37], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 13 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s38, s33, 0x4000 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[38:39], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 14 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s40, s33, 0x8000 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[40:41], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 15 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s42, s33, 0x10000 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[42:43], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 16 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_mov_b32 s5, s7 -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s4, s33, 0x20000 -; SI-NEXT: v_cmp_eq_u64_e64 s[4:5], s[4:5], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 17 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: s_cselect_b32 s5, 0, s15 -; SI-NEXT: s_cselect_b32 s4, 0, s14 -; SI-NEXT: s_and_b32 s8, s33, 0x40000 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 +; SI-NEXT: s_lshl_b64 s[48:49], s[6:7], 2 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[12:13], exec +; SI-NEXT: s_cselect_b32 s11, 0, s49 +; SI-NEXT: s_cselect_b32 s10, 0, s48 +; SI-NEXT: s_and_b32 s14, s4, 8 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[14:15], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 3 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s16, s4, 16 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[16:17], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 4 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s18, s4, 32 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[18:19], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 5 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s20, s4, 64 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[20:21], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 6 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s22, s4, 0x80 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[22:23], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 7 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s24, s4, 0x100 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[24:25], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 8 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s26, s4, 0x200 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[26:27], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 9 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s28, s4, 0x400 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[28:29], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 10 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s30, s4, 0x800 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[30:31], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 11 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s34, s4, 0x1000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[34:35], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s36, s4, 0x2000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[36:37], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 13 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s38, s4, 0x4000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[38:39], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 14 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s40, s4, 0x8000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[40:41], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 15 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s42, s4, 0x10000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[42:43], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 16 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s44, s4, 0x20000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[44:45], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 17 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s46, s4, 0x40000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[46:47], 0 ; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 18 -; SI-NEXT: s_xor_b64 s[4:5], s[10:11], s[4:5] -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s13 -; SI-NEXT: s_cselect_b32 s8, 0, s12 -; SI-NEXT: s_and_b32 s10, s33, 0x80000 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s12, s4, 0x80000 +; SI-NEXT: s_mov_b32 s13, s7 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[12:13], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 19 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x100000 ; SI-NEXT: s_mov_b32 s11, s7 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[10:11], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 19 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x100000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 20 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x200000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 21 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x400000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 22 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x800000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 23 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x1000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 24 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x2000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 25 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x4000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 26 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x8000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 27 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x10000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 28 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x20000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 29 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 2.0 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 30 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 20 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x200000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 21 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x400000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 22 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x800000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 23 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x1000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 24 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x2000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 25 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x4000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 26 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x8000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 27 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x10000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 28 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x20000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 29 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 2.0 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 30 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] ; SI-NEXT: s_lshl_b64 s[6:7], s[6:7], 31 -; SI-NEXT: s_cmp_gt_i32 s33, -1 -; SI-NEXT: s_cselect_b32 s7, 0, s7 -; SI-NEXT: s_cselect_b32 s6, 0, s6 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[6:7] +; SI-NEXT: s_cmp_gt_i32 s4, -1 +; SI-NEXT: s_cselect_b32 s5, 0, s7 +; SI-NEXT: s_cselect_b32 s4, 0, s6 +; SI-NEXT: s_xor_b64 s[4:5], s[8:9], s[4:5] ; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 31 ; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0 @@ -2018,15 +2018,15 @@ define amdgpu_kernel void @test_clmulh_i32(ptr addrspace(1) %out, ptr addrspace( ; SI-NEXT: s_mov_b32 s9, s7 ; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 ; SI-NEXT: s_mov_b32 s7, 0 -; SI-NEXT: s_mov_b32 s21, s7 ; SI-NEXT: s_mov_b32 s0, s4 +; SI-NEXT: s_mov_b32 s11, s7 ; SI-NEXT: s_mov_b32 s1, s5 +; SI-NEXT: s_mov_b32 s13, s7 ; SI-NEXT: s_mov_b32 s9, s7 ; SI-NEXT: s_mov_b32 s15, s7 -; SI-NEXT: s_mov_b32 s11, s7 -; SI-NEXT: s_mov_b32 s13, s7 ; SI-NEXT: s_mov_b32 s17, s7 ; SI-NEXT: s_mov_b32 s19, s7 +; SI-NEXT: s_mov_b32 s21, s7 ; SI-NEXT: s_mov_b32 s23, s7 ; SI-NEXT: s_mov_b32 s25, s7 ; SI-NEXT: s_mov_b32 s27, s7 @@ -2037,240 +2037,240 @@ define amdgpu_kernel void @test_clmulh_i32(ptr addrspace(1) %out, ptr addrspace( ; SI-NEXT: s_mov_b32 s39, s7 ; SI-NEXT: s_mov_b32 s41, s7 ; SI-NEXT: s_mov_b32 s43, s7 +; SI-NEXT: s_mov_b32 s45, s7 +; SI-NEXT: s_mov_b32 s47, s7 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_readfirstlane_b32 s33, v1 -; SI-NEXT: s_and_b32 s20, s33, 2 +; SI-NEXT: v_readfirstlane_b32 s4, v1 +; SI-NEXT: s_and_b32 s10, s4, 2 ; SI-NEXT: v_readfirstlane_b32 s6, v0 -; SI-NEXT: s_bfe_i32 s8, s33, 0x10000 -; SI-NEXT: v_cmp_eq_u64_e64 s[20:21], s[20:21], 0 -; SI-NEXT: s_lshl_b64 s[4:5], s[6:7], 1 -; SI-NEXT: s_and_b32 s8, s8, s6 -; SI-NEXT: s_and_b64 s[20:21], s[20:21], exec -; SI-NEXT: s_cselect_b32 s21, 0, s5 -; SI-NEXT: s_cselect_b32 s20, 0, s4 -; SI-NEXT: s_and_b32 s14, s33, 4 -; SI-NEXT: s_xor_b64 s[20:21], s[8:9], s[20:21] -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[14:15], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 2 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s15, 0, s15 -; SI-NEXT: s_cselect_b32 s14, 0, s14 -; SI-NEXT: s_and_b32 s10, s33, 8 +; SI-NEXT: s_bfe_i32 s5, s4, 0x10000 ; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 -; SI-NEXT: s_xor_b64 s[14:15], s[20:21], s[14:15] -; SI-NEXT: s_lshl_b64 s[20:21], s[6:7], 3 +; SI-NEXT: s_lshl_b64 s[48:49], s[6:7], 1 +; SI-NEXT: s_and_b32 s8, s5, s6 ; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec -; SI-NEXT: s_cselect_b32 s11, 0, s21 -; SI-NEXT: s_cselect_b32 s10, 0, s20 -; SI-NEXT: s_and_b32 s12, s33, 16 +; SI-NEXT: s_cselect_b32 s11, 0, s49 +; SI-NEXT: s_cselect_b32 s10, 0, s48 +; SI-NEXT: s_and_b32 s12, s4, 4 ; SI-NEXT: v_cmp_eq_u64_e64 s[12:13], s[12:13], 0 -; SI-NEXT: s_lshl_b64 s[20:21], s[6:7], 4 -; SI-NEXT: s_xor_b64 s[10:11], s[14:15], s[10:11] -; SI-NEXT: s_and_b64 s[12:13], s[12:13], exec -; SI-NEXT: s_cselect_b32 s13, 0, s21 -; SI-NEXT: s_cselect_b32 s12, 0, s20 -; SI-NEXT: s_and_b32 s16, s33, 32 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[16:17], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 5 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s18, s33, 64 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[18:19], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 6 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s22, s33, 0x80 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[22:23], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 7 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s24, s33, 0x100 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[24:25], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 8 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s26, s33, 0x200 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[26:27], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 9 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s28, s33, 0x400 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[28:29], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 10 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s30, s33, 0x800 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[30:31], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 11 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s34, s33, 0x1000 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[34:35], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 12 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s36, s33, 0x2000 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[36:37], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 13 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s38, s33, 0x4000 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[38:39], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 14 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s40, s33, 0x8000 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[40:41], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 15 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s42, s33, 0x10000 -; SI-NEXT: v_cmp_eq_u64_e64 s[16:17], s[42:43], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 16 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[12:13], s[16:17], exec -; SI-NEXT: s_mov_b32 s5, s7 -; SI-NEXT: s_cselect_b32 s13, 0, s15 -; SI-NEXT: s_cselect_b32 s12, 0, s14 -; SI-NEXT: s_and_b32 s4, s33, 0x20000 -; SI-NEXT: v_cmp_eq_u64_e64 s[4:5], s[4:5], 0 -; SI-NEXT: s_lshl_b64 s[14:15], s[6:7], 17 -; SI-NEXT: s_xor_b64 s[10:11], s[10:11], s[12:13] -; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: s_cselect_b32 s5, 0, s15 -; SI-NEXT: s_cselect_b32 s4, 0, s14 -; SI-NEXT: s_and_b32 s8, s33, 0x40000 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 +; SI-NEXT: s_lshl_b64 s[48:49], s[6:7], 2 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[12:13], exec +; SI-NEXT: s_cselect_b32 s11, 0, s49 +; SI-NEXT: s_cselect_b32 s10, 0, s48 +; SI-NEXT: s_and_b32 s14, s4, 8 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[14:15], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 3 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s16, s4, 16 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[16:17], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 4 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s18, s4, 32 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[18:19], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 5 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s20, s4, 64 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[20:21], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 6 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s22, s4, 0x80 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[22:23], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 7 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s24, s4, 0x100 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[24:25], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 8 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s26, s4, 0x200 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[26:27], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 9 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s28, s4, 0x400 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[28:29], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 10 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s30, s4, 0x800 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[30:31], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 11 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s34, s4, 0x1000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[34:35], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s36, s4, 0x2000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[36:37], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 13 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s38, s4, 0x4000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[38:39], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 14 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s40, s4, 0x8000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[40:41], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 15 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s42, s4, 0x10000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[42:43], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 16 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s44, s4, 0x20000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[44:45], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 17 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s46, s4, 0x40000 +; SI-NEXT: v_cmp_eq_u64_e64 s[14:15], s[46:47], 0 ; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 18 -; SI-NEXT: s_xor_b64 s[4:5], s[10:11], s[4:5] -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s13 -; SI-NEXT: s_cselect_b32 s8, 0, s12 -; SI-NEXT: s_and_b32 s10, s33, 0x80000 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b64 s[10:11], s[14:15], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_and_b32 s12, s4, 0x80000 +; SI-NEXT: s_mov_b32 s13, s7 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[12:13], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 19 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x100000 ; SI-NEXT: s_mov_b32 s11, s7 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[10:11], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 19 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x100000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 20 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x200000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 21 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x400000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 22 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x800000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 23 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x1000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 24 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x2000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 25 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x4000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 26 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x8000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 27 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x10000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 28 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 0x20000000 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 29 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] -; SI-NEXT: s_and_b32 s8, s33, 2.0 -; SI-NEXT: s_mov_b32 s9, s7 -; SI-NEXT: v_cmp_eq_u64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: s_lshl_b64 s[10:11], s[6:7], 30 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s9, 0, s11 -; SI-NEXT: s_cselect_b32 s8, 0, s10 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[8:9] +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 20 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x200000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 21 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x400000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 22 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x800000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 23 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x1000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 24 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x2000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 25 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x4000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 26 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x8000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 27 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x10000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 28 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 0x20000000 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 29 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] +; SI-NEXT: s_and_b32 s10, s4, 2.0 +; SI-NEXT: s_mov_b32 s11, s7 +; SI-NEXT: v_cmp_eq_u64_e64 s[10:11], s[10:11], 0 +; SI-NEXT: s_lshl_b64 s[12:13], s[6:7], 30 +; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec +; SI-NEXT: s_cselect_b32 s11, 0, s13 +; SI-NEXT: s_cselect_b32 s10, 0, s12 +; SI-NEXT: s_xor_b64 s[8:9], s[8:9], s[10:11] ; SI-NEXT: s_lshl_b64 s[6:7], s[6:7], 31 -; SI-NEXT: s_cmp_gt_i32 s33, -1 -; SI-NEXT: s_cselect_b32 s7, 0, s7 -; SI-NEXT: s_cselect_b32 s6, 0, s6 -; SI-NEXT: s_xor_b64 s[4:5], s[4:5], s[6:7] +; SI-NEXT: s_cmp_gt_i32 s4, -1 +; SI-NEXT: s_cselect_b32 s5, 0, s7 +; SI-NEXT: s_cselect_b32 s4, 0, s6 +; SI-NEXT: s_xor_b64 s[4:5], s[8:9], s[4:5] ; SI-NEXT: v_mov_b32_e32 v0, s5 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; SI-NEXT: s_endpgm diff --git a/llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir b/llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir index 156979d6d06a5..93470d443409b 100644 --- a/llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir +++ b/llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir @@ -25,7 +25,7 @@ body: | ; CHECK: bb.0: ; CHECK-NEXT: successors: %bb.1(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF @@ -33,9 +33,10 @@ body: | ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[V_MUL_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 1082130432, [[DEF]], implicit $mode, implicit $exec ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[V_MUL_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 1082130432, [[DEF1]], implicit $mode, implicit $exec ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) @@ -51,34 +52,33 @@ body: | ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec - ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B32_e32_]] - ; CHECK-NEXT: [[V_MUL_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF6]], [[DEF6]], implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MUL_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF6]], [[DEF6]], implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MUL_F32_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_]], implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MUL_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF7]], [[DEF7]], implicit $mode, implicit $exec ; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[V_ADD_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_]], implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MUL_F32_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF6]], [[DEF6]], implicit $mode, implicit $exec - ; CHECK-NEXT: dead [[V_MUL_F32_e32_5:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[V_MUL_F32_e32_4]], [[DEF12]], implicit $mode, implicit $exec ; CHECK-NEXT: dead [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAC_F32_e32 [[V_ADD_F32_e32_]], [[COPY]], [[V_MOV_B32_e32_1]], implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:sreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[V_MUL_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF7]], [[DEF7]], implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[V_MUL_F32_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF7]], [[DEF7]], implicit $mode, implicit $exec + ; CHECK-NEXT: dead [[V_MUL_F32_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[V_MUL_F32_e32_3]], [[DEF13]], implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MUL_F32_e32_5:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_]], implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:sreg_64 = IMPLICIT_DEF ; CHECK-NEXT: $sgpr4 = IMPLICIT_DEF - ; CHECK-NEXT: $vgpr0 = COPY [[DEF10]] + ; CHECK-NEXT: $vgpr0 = COPY [[DEF11]] ; CHECK-NEXT: $vgpr0 = COPY [[V_MOV_B32_e32_]] - ; CHECK-NEXT: $vgpr1 = COPY [[DEF6]] + ; CHECK-NEXT: $vgpr1 = COPY [[DEF7]] ; CHECK-NEXT: $vgpr0 = COPY [[V_MUL_F32_e32_1]] ; CHECK-NEXT: $vgpr1 = COPY [[V_MUL_F32_e32_2]] - ; CHECK-NEXT: $vgpr2 = COPY [[V_MUL_F32_e32_3]] - ; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL [[DEF13]], @foo, csr_amdgpu, implicit undef $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $sgpr4, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit-def $vgpr0 - ; CHECK-NEXT: [[V_ADD_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MUL_F32_e32_]], [[DEF7]], implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_ADD_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAC_F32_e32 [[DEF11]], [[DEF8]], [[V_ADD_F32_e32_1]], implicit $mode, implicit $exec - ; CHECK-NEXT: dead [[V_MAD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, [[V_ADD_F32_e32_1]], 0, [[DEF3]], 0, [[DEF]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: dead [[V_MAD_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, [[V_ADD_F32_e32_1]], 0, [[DEF4]], 0, [[DEF1]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: dead [[V_MAD_F32_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, [[V_ADD_F32_e32_1]], 0, [[DEF5]], 0, [[DEF2]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: GLOBAL_STORE_DWORD [[DEF14]], [[DEF9]], 0, 0, implicit $exec + ; CHECK-NEXT: $vgpr2 = COPY [[V_MUL_F32_e32_5]] + ; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL [[DEF14]], @foo, csr_amdgpu, implicit undef $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $sgpr4, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit-def $vgpr0 + ; CHECK-NEXT: [[V_ADD_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MUL_F32_e32_]], [[DEF8]], implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_ADD_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAC_F32_e32 [[DEF12]], [[DEF9]], [[V_ADD_F32_e32_1]], implicit $mode, implicit $exec + ; CHECK-NEXT: dead [[V_MAD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, [[V_ADD_F32_e32_1]], 0, [[DEF4]], 0, [[DEF1]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: dead [[V_MAD_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, [[V_ADD_F32_e32_1]], 0, [[DEF5]], 0, [[DEF2]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: dead [[V_MAD_F32_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, [[V_ADD_F32_e32_1]], 0, [[DEF6]], 0, [[DEF3]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: GLOBAL_STORE_DWORD [[DEF]], [[DEF10]], 0, 0, implicit $exec ; CHECK-NEXT: S_ENDPGM 0 bb.0: successors: %bb.1 diff --git a/llvm/test/CodeGen/AMDGPU/div_i128.ll b/llvm/test/CodeGen/AMDGPU/div_i128.ll index e3c8eaacf88fe..ef9982031c4d3 100644 --- a/llvm/test/CodeGen/AMDGPU/div_i128.ll +++ b/llvm/test/CodeGen/AMDGPU/div_i128.ll @@ -9,26 +9,26 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-LABEL: v_sdiv_i128_vv: ; GFX9: ; %bb.0: ; %_udiv-special-cases ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_ashrrev_i32_e32 v17, 31, v3 -; GFX9-NEXT: v_xor_b32_e32 v0, v0, v17 -; GFX9-NEXT: v_xor_b32_e32 v1, v1, v17 -; GFX9-NEXT: v_sub_co_u32_e32 v8, vcc, v0, v17 -; GFX9-NEXT: v_subb_co_u32_e32 v9, vcc, v1, v17, vcc -; GFX9-NEXT: v_xor_b32_e32 v1, v2, v17 -; GFX9-NEXT: v_ashrrev_i32_e32 v18, 31, v7 -; GFX9-NEXT: v_xor_b32_e32 v0, v3, v17 -; GFX9-NEXT: v_subb_co_u32_e32 v10, vcc, v1, v17, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v11, vcc, v0, v17, vcc -; GFX9-NEXT: v_xor_b32_e32 v1, v4, v18 -; GFX9-NEXT: v_xor_b32_e32 v0, v5, v18 -; GFX9-NEXT: v_sub_co_u32_e32 v21, vcc, v1, v18 -; GFX9-NEXT: v_subb_co_u32_e32 v22, vcc, v0, v18, vcc -; GFX9-NEXT: v_xor_b32_e32 v0, v6, v18 -; GFX9-NEXT: v_xor_b32_e32 v1, v7, v18 -; GFX9-NEXT: v_subb_co_u32_e32 v0, vcc, v0, v18, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v18, vcc -; GFX9-NEXT: v_or_b32_e32 v3, v22, v1 -; GFX9-NEXT: v_or_b32_e32 v2, v21, v0 +; GFX9-NEXT: v_ashrrev_i32_e32 v16, 31, v3 +; GFX9-NEXT: v_xor_b32_e32 v0, v0, v16 +; GFX9-NEXT: v_xor_b32_e32 v1, v1, v16 +; GFX9-NEXT: v_sub_co_u32_e32 v8, vcc, v0, v16 +; GFX9-NEXT: v_subb_co_u32_e32 v9, vcc, v1, v16, vcc +; GFX9-NEXT: v_xor_b32_e32 v1, v2, v16 +; GFX9-NEXT: v_ashrrev_i32_e32 v17, 31, v7 +; GFX9-NEXT: v_xor_b32_e32 v0, v3, v16 +; GFX9-NEXT: v_subb_co_u32_e32 v10, vcc, v1, v16, vcc +; GFX9-NEXT: v_subb_co_u32_e32 v11, vcc, v0, v16, vcc +; GFX9-NEXT: v_xor_b32_e32 v1, v4, v17 +; GFX9-NEXT: v_xor_b32_e32 v0, v5, v17 +; GFX9-NEXT: v_sub_co_u32_e32 v20, vcc, v1, v17 +; GFX9-NEXT: v_subb_co_u32_e32 v21, vcc, v0, v17, vcc +; GFX9-NEXT: v_xor_b32_e32 v0, v6, v17 +; GFX9-NEXT: v_xor_b32_e32 v1, v7, v17 +; GFX9-NEXT: v_subb_co_u32_e32 v0, vcc, v0, v17, vcc +; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v17, vcc +; GFX9-NEXT: v_or_b32_e32 v3, v21, v1 +; GFX9-NEXT: v_or_b32_e32 v2, v20, v0 ; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3] ; GFX9-NEXT: v_or_b32_e32 v3, v9, v11 ; GFX9-NEXT: v_or_b32_e32 v2, v8, v10 @@ -37,9 +37,9 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-NEXT: v_add_u32_e32 v2, 32, v2 ; GFX9-NEXT: v_ffbh_u32_e32 v3, v1 ; GFX9-NEXT: v_min_u32_e32 v2, v2, v3 -; GFX9-NEXT: v_ffbh_u32_e32 v3, v21 +; GFX9-NEXT: v_ffbh_u32_e32 v3, v20 ; GFX9-NEXT: v_add_u32_e32 v3, 32, v3 -; GFX9-NEXT: v_ffbh_u32_e32 v4, v22 +; GFX9-NEXT: v_ffbh_u32_e32 v4, v21 ; GFX9-NEXT: v_min_u32_e32 v3, v3, v4 ; GFX9-NEXT: s_or_b64 s[4:5], vcc, s[4:5] ; GFX9-NEXT: v_add_co_u32_e32 v3, vcc, 64, v3 @@ -58,7 +58,7 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, 64, v5 ; GFX9-NEXT: v_addc_co_u32_e64 v6, s[6:7], 0, 0, vcc ; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[10:11] -; GFX9-NEXT: v_mov_b32_e32 v19, v17 +; GFX9-NEXT: v_mov_b32_e32 v18, v16 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, 0, vcc ; GFX9-NEXT: v_sub_co_u32_e32 v2, vcc, v2, v3 @@ -67,7 +67,7 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-NEXT: v_subb_co_u32_e64 v5, s[6:7], 0, 0, s[6:7] ; GFX9-NEXT: s_mov_b64 s[6:7], 0x7f ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[2:3] -; GFX9-NEXT: v_mov_b32_e32 v20, v18 +; GFX9-NEXT: v_mov_b32_e32 v19, v17 ; GFX9-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc ; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc @@ -76,8 +76,8 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-NEXT: v_and_b32_e32 v6, 1, v6 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6 ; GFX9-NEXT: v_xor_b32_e32 v6, 0x7f, v2 -; GFX9-NEXT: v_or_b32_e32 v6, v6, v4 ; GFX9-NEXT: v_or_b32_e32 v7, v3, v5 +; GFX9-NEXT: v_or_b32_e32 v6, v6, v4 ; GFX9-NEXT: s_or_b64 s[4:5], s[4:5], vcc ; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[6:7] ; GFX9-NEXT: s_xor_b64 s[6:7], s[4:5], -1 @@ -89,115 +89,115 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB0_6 ; GFX9-NEXT: ; %bb.1: ; %udiv-bb1 -; GFX9-NEXT: v_add_co_u32_e32 v23, vcc, 1, v2 -; GFX9-NEXT: v_addc_co_u32_e32 v24, vcc, 0, v3, vcc -; GFX9-NEXT: v_addc_co_u32_e32 v25, vcc, 0, v4, vcc +; GFX9-NEXT: v_add_co_u32_e32 v22, vcc, 1, v2 +; GFX9-NEXT: v_addc_co_u32_e32 v23, vcc, 0, v3, vcc +; GFX9-NEXT: v_addc_co_u32_e32 v24, vcc, 0, v4, vcc ; GFX9-NEXT: v_sub_u32_e32 v7, 0x7f, v2 -; GFX9-NEXT: v_addc_co_u32_e32 v26, vcc, 0, v5, vcc +; GFX9-NEXT: v_addc_co_u32_e32 v25, vcc, 0, v5, vcc ; GFX9-NEXT: v_sub_u32_e32 v5, 64, v7 ; GFX9-NEXT: v_lshlrev_b64 v[3:4], v7, v[10:11] ; GFX9-NEXT: v_lshrrev_b64 v[5:6], v5, v[8:9] ; GFX9-NEXT: v_sub_u32_e32 v2, 63, v2 -; GFX9-NEXT: v_or_b32_e32 v5, v3, v5 +; GFX9-NEXT: v_or_b32_e32 v4, v4, v6 +; GFX9-NEXT: v_or_b32_e32 v6, v3, v5 ; GFX9-NEXT: v_lshlrev_b64 v[2:3], v2, v[8:9] ; GFX9-NEXT: s_xor_b64 s[8:9], vcc, -1 -; GFX9-NEXT: v_or_b32_e32 v4, v4, v6 ; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v7 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc -; GFX9-NEXT: v_lshlrev_b64 v[4:5], v7, v[8:9] ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v7 -; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v11, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v10, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc +; GFX9-NEXT: v_cndmask_b32_e64 v5, v3, v11, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc +; GFX9-NEXT: v_lshlrev_b64 v[2:3], v7, v[8:9] +; GFX9-NEXT: v_cndmask_b32_e64 v4, v4, v10, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e32 v3, 0, v3, vcc ; GFX9-NEXT: v_mov_b32_e32 v6, 0 ; GFX9-NEXT: v_mov_b32_e32 v7, 0 -; GFX9-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], s[8:9] ; GFX9-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB0_5 ; GFX9-NEXT: ; %bb.2: ; %udiv-preheader -; GFX9-NEXT: v_sub_u32_e32 v12, 64, v23 -; GFX9-NEXT: v_lshrrev_b64 v[6:7], v23, v[8:9] +; GFX9-NEXT: v_sub_u32_e32 v12, 64, v22 +; GFX9-NEXT: v_lshrrev_b64 v[6:7], v22, v[8:9] ; GFX9-NEXT: v_lshlrev_b64 v[12:13], v12, v[10:11] -; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v23 -; GFX9-NEXT: v_or_b32_e32 v14, v6, v12 -; GFX9-NEXT: v_subrev_u32_e32 v6, 64, v23 +; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v22 +; GFX9-NEXT: v_or_b32_e32 v12, v6, v12 +; GFX9-NEXT: v_subrev_u32_e32 v6, 64, v22 ; GFX9-NEXT: v_or_b32_e32 v13, v7, v13 ; GFX9-NEXT: v_lshrrev_b64 v[6:7], v6, v[10:11] -; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v23 +; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v22 ; GFX9-NEXT: v_cndmask_b32_e32 v7, v7, v13, vcc -; GFX9-NEXT: v_cndmask_b32_e64 v12, v7, v9, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e32 v9, v6, v14, vcc -; GFX9-NEXT: v_lshrrev_b64 v[6:7], v23, v[10:11] -; GFX9-NEXT: v_cndmask_b32_e64 v11, v9, v8, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e32 v14, 0, v7, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v13, 0, v6, vcc -; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, -1, v21 -; GFX9-NEXT: v_addc_co_u32_e32 v27, vcc, -1, v22, vcc +; GFX9-NEXT: v_cndmask_b32_e64 v9, v7, v9, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e32 v12, v6, v12, vcc +; GFX9-NEXT: v_lshrrev_b64 v[6:7], v22, v[10:11] +; GFX9-NEXT: v_cndmask_b32_e64 v8, v12, v8, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e32 v13, 0, v7, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v12, 0, v6, vcc +; GFX9-NEXT: v_add_co_u32_e32 v26, vcc, -1, v20 +; GFX9-NEXT: v_addc_co_u32_e32 v27, vcc, -1, v21, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v28, vcc, -1, v0, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v29, vcc, -1, v1, vcc -; GFX9-NEXT: v_mov_b32_e32 v8, 0 -; GFX9-NEXT: v_mov_b32_e32 v9, 0 -; GFX9-NEXT: s_mov_b64 s[4:5], 0 +; GFX9-NEXT: v_mov_b32_e32 v10, 0 +; GFX9-NEXT: v_mov_b32_e32 v11, 0 +; GFX9-NEXT: s_mov_b64 s[10:11], 0 +; GFX9-NEXT: v_mov_b32_e32 v14, 0 ; GFX9-NEXT: v_mov_b32_e32 v15, 0 -; GFX9-NEXT: v_mov_b32_e32 v16, 0 ; GFX9-NEXT: v_mov_b32_e32 v7, 0 ; GFX9-NEXT: .LBB0_3: ; %udiv-do-while ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX9-NEXT: v_lshlrev_b64 v[30:31], 1, v[4:5] -; GFX9-NEXT: v_lshlrev_b64 v[13:14], 1, v[13:14] -; GFX9-NEXT: v_or_b32_e32 v4, v15, v30 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 31, v12 -; GFX9-NEXT: v_lshlrev_b64 v[11:12], 1, v[11:12] -; GFX9-NEXT: v_or_b32_e32 v13, v13, v15 -; GFX9-NEXT: v_lshrrev_b32_e32 v15, 31, v3 -; GFX9-NEXT: v_or_b32_e32 v11, v11, v15 -; GFX9-NEXT: v_sub_co_u32_e32 v15, vcc, v10, v11 -; GFX9-NEXT: v_subb_co_u32_e32 v15, vcc, v27, v12, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v15, vcc, v28, v13, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v15, vcc, v29, v14, vcc -; GFX9-NEXT: v_ashrrev_i32_e32 v30, 31, v15 -; GFX9-NEXT: v_and_b32_e32 v15, v30, v21 -; GFX9-NEXT: v_lshrrev_b32_e32 v6, 31, v5 -; GFX9-NEXT: v_or_b32_e32 v5, v16, v31 -; GFX9-NEXT: v_and_b32_e32 v16, v30, v22 -; GFX9-NEXT: v_sub_co_u32_e32 v11, vcc, v11, v15 -; GFX9-NEXT: v_subb_co_u32_e32 v12, vcc, v12, v16, vcc -; GFX9-NEXT: v_and_b32_e32 v15, v30, v0 -; GFX9-NEXT: v_and_b32_e32 v16, v30, v1 -; GFX9-NEXT: v_subb_co_u32_e32 v13, vcc, v13, v15, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v14, vcc, v14, v16, vcc -; GFX9-NEXT: v_add_co_u32_e32 v23, vcc, -1, v23 +; GFX9-NEXT: v_lshlrev_b64 v[12:13], 1, v[12:13] +; GFX9-NEXT: v_lshrrev_b32_e32 v6, 31, v9 +; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] +; GFX9-NEXT: v_or_b32_e32 v6, v12, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v12, 31, v5 +; GFX9-NEXT: v_lshlrev_b64 v[4:5], 1, v[4:5] +; GFX9-NEXT: v_or_b32_e32 v8, v8, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v12, 31, v3 +; GFX9-NEXT: v_or3_b32 v4, v4, v12, v10 +; GFX9-NEXT: v_sub_co_u32_e64 v12, s[4:5], v26, v8 +; GFX9-NEXT: v_subb_co_u32_e64 v12, s[4:5], v27, v9, s[4:5] +; GFX9-NEXT: v_lshlrev_b64 v[2:3], 1, v[2:3] +; GFX9-NEXT: v_subb_co_u32_e64 v12, s[4:5], v28, v6, s[4:5] +; GFX9-NEXT: v_add_co_u32_e32 v22, vcc, -1, v22 +; GFX9-NEXT: v_subb_co_u32_e64 v12, s[4:5], v29, v13, s[4:5] +; GFX9-NEXT: v_addc_co_u32_e32 v23, vcc, -1, v23, vcc +; GFX9-NEXT: v_or_b32_e32 v2, v14, v2 +; GFX9-NEXT: v_ashrrev_i32_e32 v14, 31, v12 ; GFX9-NEXT: v_addc_co_u32_e32 v24, vcc, -1, v24, vcc +; GFX9-NEXT: v_and_b32_e32 v12, v14, v20 ; GFX9-NEXT: v_addc_co_u32_e32 v25, vcc, -1, v25, vcc -; GFX9-NEXT: v_addc_co_u32_e32 v26, vcc, -1, v26, vcc -; GFX9-NEXT: v_lshlrev_b64 v[2:3], 1, v[2:3] -; GFX9-NEXT: v_or_b32_e32 v15, v23, v25 -; GFX9-NEXT: v_or_b32_e32 v16, v24, v26 -; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[15:16] -; GFX9-NEXT: v_or3_b32 v2, v2, v6, v8 -; GFX9-NEXT: v_and_b32_e32 v6, 1, v30 -; GFX9-NEXT: v_mov_b32_e32 v16, v7 -; GFX9-NEXT: v_or3_b32 v3, v3, 0, v9 -; GFX9-NEXT: s_or_b64 s[4:5], vcc, s[4:5] -; GFX9-NEXT: v_mov_b32_e32 v15, v6 -; GFX9-NEXT: s_andn2_b64 exec, exec, s[4:5] +; GFX9-NEXT: v_or_b32_e32 v3, v15, v3 +; GFX9-NEXT: v_and_b32_e32 v15, v14, v21 +; GFX9-NEXT: v_sub_co_u32_e64 v8, s[4:5], v8, v12 +; GFX9-NEXT: v_or_b32_e32 v30, v22, v24 +; GFX9-NEXT: v_or_b32_e32 v31, v23, v25 +; GFX9-NEXT: v_subb_co_u32_e64 v9, s[4:5], v9, v15, s[4:5] +; GFX9-NEXT: v_and_b32_e32 v12, v14, v0 +; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[30:31] +; GFX9-NEXT: v_and_b32_e32 v15, v14, v1 +; GFX9-NEXT: v_subb_co_u32_e64 v12, s[4:5], v6, v12, s[4:5] +; GFX9-NEXT: v_subb_co_u32_e64 v13, s[4:5], v13, v15, s[4:5] +; GFX9-NEXT: v_and_b32_e32 v6, 1, v14 +; GFX9-NEXT: v_mov_b32_e32 v15, v7 +; GFX9-NEXT: v_or3_b32 v5, v5, 0, v11 +; GFX9-NEXT: s_or_b64 s[10:11], vcc, s[10:11] +; GFX9-NEXT: v_mov_b32_e32 v14, v6 +; GFX9-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GFX9-NEXT: s_cbranch_execnz .LBB0_3 ; GFX9-NEXT: ; %bb.4: ; %Flow -; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_or_b64 exec, exec, s[10:11] ; GFX9-NEXT: .LBB0_5: ; %Flow2 ; GFX9-NEXT: s_or_b64 exec, exec, s[8:9] -; GFX9-NEXT: v_lshlrev_b64 v[12:13], 1, v[2:3] -; GFX9-NEXT: v_lshlrev_b64 v[0:1], 1, v[4:5] -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 31, v5 -; GFX9-NEXT: v_or_b32_e32 v12, v12, v2 +; GFX9-NEXT: v_lshlrev_b64 v[12:13], 1, v[4:5] +; GFX9-NEXT: v_lshlrev_b64 v[0:1], 1, v[2:3] +; GFX9-NEXT: v_lshrrev_b32_e32 v4, 31, v3 +; GFX9-NEXT: v_or_b32_e32 v12, v12, v4 ; GFX9-NEXT: v_or_b32_e32 v7, v7, v1 ; GFX9-NEXT: v_or_b32_e32 v6, v6, v0 ; GFX9-NEXT: .LBB0_6: ; %Flow3 ; GFX9-NEXT: s_or_b64 exec, exec, s[6:7] -; GFX9-NEXT: v_xor_b32_e32 v2, v18, v17 -; GFX9-NEXT: v_xor_b32_e32 v3, v20, v19 +; GFX9-NEXT: v_xor_b32_e32 v2, v17, v16 +; GFX9-NEXT: v_xor_b32_e32 v3, v19, v18 ; GFX9-NEXT: v_xor_b32_e32 v0, v6, v2 ; GFX9-NEXT: v_xor_b32_e32 v1, v7, v3 ; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v2 @@ -1174,13 +1174,13 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-G-NEXT: v_ashrrev_i32_e32 v16, 31, v3 ; GFX9-G-NEXT: v_xor_b32_e32 v0, v16, v0 ; GFX9-G-NEXT: v_xor_b32_e32 v1, v16, v1 -; GFX9-G-NEXT: v_sub_co_u32_e32 v8, vcc, v0, v16 +; GFX9-G-NEXT: v_sub_co_u32_e32 v10, vcc, v0, v16 ; GFX9-G-NEXT: v_xor_b32_e32 v2, v16, v2 -; GFX9-G-NEXT: v_subb_co_u32_e32 v9, vcc, v1, v16, vcc +; GFX9-G-NEXT: v_subb_co_u32_e32 v11, vcc, v1, v16, vcc ; GFX9-G-NEXT: v_ashrrev_i32_e32 v17, 31, v7 ; GFX9-G-NEXT: v_xor_b32_e32 v3, v16, v3 -; GFX9-G-NEXT: v_subb_co_u32_e32 v10, vcc, v2, v16, vcc -; GFX9-G-NEXT: v_subb_co_u32_e32 v11, vcc, v3, v16, vcc +; GFX9-G-NEXT: v_subb_co_u32_e32 v12, vcc, v2, v16, vcc +; GFX9-G-NEXT: v_subb_co_u32_e32 v13, vcc, v3, v16, vcc ; GFX9-G-NEXT: v_xor_b32_e32 v0, v17, v4 ; GFX9-G-NEXT: v_xor_b32_e32 v1, v17, v5 ; GFX9-G-NEXT: v_sub_co_u32_e32 v18, vcc, v0, v17 @@ -1192,8 +1192,8 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-G-NEXT: v_or_b32_e32 v0, v18, v4 ; GFX9-G-NEXT: v_or_b32_e32 v1, v19, v5 ; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1] -; GFX9-G-NEXT: v_or_b32_e32 v0, v8, v10 -; GFX9-G-NEXT: v_or_b32_e32 v1, v9, v11 +; GFX9-G-NEXT: v_or_b32_e32 v0, v10, v12 +; GFX9-G-NEXT: v_or_b32_e32 v1, v11, v13 ; GFX9-G-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[0:1] ; GFX9-G-NEXT: v_ffbh_u32_e32 v1, v18 ; GFX9-G-NEXT: v_ffbh_u32_e32 v0, v19 @@ -1206,15 +1206,15 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[4:5] ; GFX9-G-NEXT: v_add_u32_e32 v0, 64, v0 ; GFX9-G-NEXT: v_min_u32_e32 v1, v1, v2 -; GFX9-G-NEXT: v_ffbh_u32_e32 v2, v8 +; GFX9-G-NEXT: v_ffbh_u32_e32 v2, v10 ; GFX9-G-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc -; GFX9-G-NEXT: v_ffbh_u32_e32 v1, v9 +; GFX9-G-NEXT: v_ffbh_u32_e32 v1, v11 ; GFX9-G-NEXT: v_add_u32_e32 v2, 32, v2 -; GFX9-G-NEXT: v_ffbh_u32_e32 v3, v10 +; GFX9-G-NEXT: v_ffbh_u32_e32 v3, v12 ; GFX9-G-NEXT: v_min_u32_e32 v1, v1, v2 -; GFX9-G-NEXT: v_ffbh_u32_e32 v2, v11 +; GFX9-G-NEXT: v_ffbh_u32_e32 v2, v13 ; GFX9-G-NEXT: v_add_u32_e32 v3, 32, v3 -; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[10:11] +; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[12:13] ; GFX9-G-NEXT: v_add_u32_e32 v1, 64, v1 ; GFX9-G-NEXT: v_min_u32_e32 v2, v2, v3 ; GFX9-G-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc @@ -1240,10 +1240,10 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-G-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[6:7] ; GFX9-G-NEXT: s_or_b64 s[10:11], s[10:11], vcc ; GFX9-G-NEXT: s_or_b64 s[4:5], s[10:11], s[4:5] -; GFX9-G-NEXT: v_cndmask_b32_e64 v6, v8, 0, s[10:11] -; GFX9-G-NEXT: v_cndmask_b32_e64 v7, v9, 0, s[10:11] -; GFX9-G-NEXT: v_cndmask_b32_e64 v12, v10, 0, s[10:11] -; GFX9-G-NEXT: v_cndmask_b32_e64 v13, v11, 0, s[10:11] +; GFX9-G-NEXT: v_cndmask_b32_e64 v6, v10, 0, s[10:11] +; GFX9-G-NEXT: v_cndmask_b32_e64 v7, v11, 0, s[10:11] +; GFX9-G-NEXT: v_cndmask_b32_e64 v8, v12, 0, s[10:11] +; GFX9-G-NEXT: v_cndmask_b32_e64 v9, v13, 0, s[10:11] ; GFX9-G-NEXT: s_xor_b64 s[4:5], s[4:5], s[6:7] ; GFX9-G-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; GFX9-G-NEXT: s_cbranch_execz .LBB0_6 @@ -1254,23 +1254,23 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-G-NEXT: s_mov_b64 s[4:5], exec ; GFX9-G-NEXT: v_addc_co_u32_e32 v23, vcc, 0, v3, vcc ; GFX9-G-NEXT: s_xor_b64 s[4:5], vcc, s[4:5] -; GFX9-G-NEXT: v_sub_co_u32_e32 v12, vcc, 0x7f, v0 -; GFX9-G-NEXT: v_sub_u32_e32 v0, 64, v12 -; GFX9-G-NEXT: v_lshrrev_b64 v[0:1], v0, v[8:9] -; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], v12, v[10:11] -; GFX9-G-NEXT: v_add_u32_e32 v13, 0xffffffc0, v12 -; GFX9-G-NEXT: v_lshlrev_b64 v[6:7], v12, v[8:9] +; GFX9-G-NEXT: v_sub_co_u32_e32 v8, vcc, 0x7f, v0 +; GFX9-G-NEXT: v_sub_u32_e32 v0, 64, v8 +; GFX9-G-NEXT: v_lshrrev_b64 v[0:1], v0, v[10:11] +; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], v8, v[12:13] +; GFX9-G-NEXT: v_add_u32_e32 v9, 0xffffffc0, v8 +; GFX9-G-NEXT: v_lshlrev_b64 v[6:7], v8, v[10:11] ; GFX9-G-NEXT: v_or_b32_e32 v2, v0, v2 ; GFX9-G-NEXT: v_or_b32_e32 v3, v1, v3 -; GFX9-G-NEXT: v_lshlrev_b64 v[0:1], v13, v[8:9] -; GFX9-G-NEXT: v_cmp_gt_u32_e32 vcc, 64, v12 +; GFX9-G-NEXT: v_lshlrev_b64 v[0:1], v9, v[10:11] +; GFX9-G-NEXT: v_cmp_gt_u32_e32 vcc, 64, v8 ; GFX9-G-NEXT: v_cndmask_b32_e32 v6, 0, v6, vcc ; GFX9-G-NEXT: v_cndmask_b32_e32 v7, 0, v7, vcc ; GFX9-G-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; GFX9-G-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc -; GFX9-G-NEXT: v_cmp_eq_u32_e32 vcc, 0, v12 -; GFX9-G-NEXT: v_cndmask_b32_e32 v12, v0, v10, vcc -; GFX9-G-NEXT: v_cndmask_b32_e32 v13, v1, v11, vcc +; GFX9-G-NEXT: v_cmp_eq_u32_e32 vcc, 0, v8 +; GFX9-G-NEXT: v_cndmask_b32_e32 v8, v0, v12, vcc +; GFX9-G-NEXT: v_cndmask_b32_e32 v9, v1, v13, vcc ; GFX9-G-NEXT: s_mov_b64 s[10:11], s[8:9] ; GFX9-G-NEXT: v_mov_b32_e32 v0, s8 ; GFX9-G-NEXT: v_mov_b32_e32 v1, s9 @@ -1281,13 +1281,13 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-G-NEXT: s_cbranch_execz .LBB0_5 ; GFX9-G-NEXT: ; %bb.2: ; %udiv-preheader ; GFX9-G-NEXT: v_sub_u32_e32 v2, 64, v20 -; GFX9-G-NEXT: v_lshrrev_b64 v[0:1], v20, v[8:9] -; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], v2, v[10:11] +; GFX9-G-NEXT: v_lshrrev_b64 v[0:1], v20, v[10:11] +; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], v2, v[12:13] ; GFX9-G-NEXT: v_add_u32_e32 v24, 0xffffffc0, v20 -; GFX9-G-NEXT: v_lshrrev_b64 v[14:15], v20, v[10:11] ; GFX9-G-NEXT: v_or_b32_e32 v2, v0, v2 +; GFX9-G-NEXT: v_lshrrev_b64 v[14:15], v20, v[12:13] ; GFX9-G-NEXT: v_or_b32_e32 v3, v1, v3 -; GFX9-G-NEXT: v_lshrrev_b64 v[0:1], v24, v[10:11] +; GFX9-G-NEXT: v_lshrrev_b64 v[0:1], v24, v[12:13] ; GFX9-G-NEXT: v_cmp_gt_u32_e32 vcc, 64, v20 ; GFX9-G-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; GFX9-G-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc @@ -1297,55 +1297,55 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-G-NEXT: s_mov_b64 s[8:9], 0 ; GFX9-G-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v20 ; GFX9-G-NEXT: v_addc_co_u32_e32 v25, vcc, -1, v19, vcc -; GFX9-G-NEXT: v_cndmask_b32_e64 v10, v0, v8, s[4:5] -; GFX9-G-NEXT: v_cndmask_b32_e64 v11, v1, v9, s[4:5] +; GFX9-G-NEXT: v_cndmask_b32_e64 v12, v0, v10, s[4:5] +; GFX9-G-NEXT: v_cndmask_b32_e64 v13, v1, v11, s[4:5] ; GFX9-G-NEXT: v_addc_co_u32_e32 v26, vcc, -1, v4, vcc ; GFX9-G-NEXT: s_mov_b64 s[10:11], s[8:9] ; GFX9-G-NEXT: v_mov_b32_e32 v0, s8 ; GFX9-G-NEXT: v_addc_co_u32_e32 v27, vcc, -1, v5, vcc -; GFX9-G-NEXT: v_mov_b32_e32 v9, 0 +; GFX9-G-NEXT: v_mov_b32_e32 v11, 0 ; GFX9-G-NEXT: v_mov_b32_e32 v1, s9 -; GFX9-G-NEXT: v_mov_b32_e32 v8, 1 +; GFX9-G-NEXT: v_mov_b32_e32 v10, 1 ; GFX9-G-NEXT: v_mov_b32_e32 v2, s10 ; GFX9-G-NEXT: v_mov_b32_e32 v3, s11 ; GFX9-G-NEXT: .LBB0_3: ; %udiv-do-while ; GFX9-G-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], 1, v[6:7] -; GFX9-G-NEXT: v_lshrrev_b32_e32 v8, 31, v7 -; GFX9-G-NEXT: v_or_b32_e32 v6, v0, v2 -; GFX9-G-NEXT: v_or_b32_e32 v7, v1, v3 -; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], 1, v[10:11] -; GFX9-G-NEXT: v_lshrrev_b32_e32 v10, 31, v13 -; GFX9-G-NEXT: v_lshlrev_b64 v[0:1], 1, v[14:15] -; GFX9-G-NEXT: v_or_b32_e32 v2, v2, v10 -; GFX9-G-NEXT: v_lshrrev_b32_e32 v14, 31, v11 -; GFX9-G-NEXT: v_sub_co_u32_e32 v10, vcc, v24, v2 -; GFX9-G-NEXT: v_or_b32_e32 v0, v0, v14 -; GFX9-G-NEXT: v_subb_co_u32_e32 v10, vcc, v25, v3, vcc -; GFX9-G-NEXT: v_subb_co_u32_e32 v10, vcc, v26, v0, vcc -; GFX9-G-NEXT: v_subb_co_u32_e32 v10, vcc, v27, v1, vcc -; GFX9-G-NEXT: v_ashrrev_i32_e32 v28, 31, v10 -; GFX9-G-NEXT: v_and_b32_e32 v10, v28, v18 -; GFX9-G-NEXT: v_and_b32_e32 v11, v28, v19 -; GFX9-G-NEXT: v_sub_co_u32_e32 v10, vcc, v2, v10 -; GFX9-G-NEXT: v_subb_co_u32_e32 v11, vcc, v3, v11, vcc -; GFX9-G-NEXT: v_and_b32_e32 v2, v28, v4 -; GFX9-G-NEXT: v_and_b32_e32 v3, v28, v5 -; GFX9-G-NEXT: v_subb_co_u32_e32 v14, vcc, v0, v2, vcc -; GFX9-G-NEXT: v_subb_co_u32_e32 v15, vcc, v1, v3, vcc ; GFX9-G-NEXT: v_add_co_u32_e32 v20, vcc, -1, v20 ; GFX9-G-NEXT: v_addc_co_u32_e32 v21, vcc, -1, v21, vcc ; GFX9-G-NEXT: v_addc_co_u32_e32 v22, vcc, -1, v22, vcc ; GFX9-G-NEXT: v_addc_co_u32_e32 v23, vcc, -1, v23, vcc +; GFX9-G-NEXT: v_or_b32_e32 v2, v20, v22 +; GFX9-G-NEXT: v_or_b32_e32 v3, v21, v23 +; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3] +; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], 1, v[14:15] +; GFX9-G-NEXT: v_lshrrev_b32_e32 v10, 31, v13 ; GFX9-G-NEXT: v_lshlrev_b64 v[12:13], 1, v[12:13] -; GFX9-G-NEXT: v_or_b32_e32 v0, v20, v22 -; GFX9-G-NEXT: v_or_b32_e32 v1, v21, v23 -; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1] -; GFX9-G-NEXT: v_or_b32_e32 v12, v12, v8 -; GFX9-G-NEXT: v_and_b32_e32 v8, 1, v28 -; GFX9-G-NEXT: v_mov_b32_e32 v0, v8 +; GFX9-G-NEXT: v_or_b32_e32 v2, v2, v10 +; GFX9-G-NEXT: v_lshrrev_b32_e32 v10, 31, v9 +; GFX9-G-NEXT: v_or_b32_e32 v10, v12, v10 +; GFX9-G-NEXT: v_lshrrev_b32_e32 v12, 31, v7 +; GFX9-G-NEXT: v_lshlrev_b64 v[6:7], 1, v[6:7] +; GFX9-G-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] +; GFX9-G-NEXT: v_or_b32_e32 v6, v0, v6 +; GFX9-G-NEXT: v_sub_co_u32_e64 v0, s[4:5], v24, v10 +; GFX9-G-NEXT: v_subb_co_u32_e64 v0, s[4:5], v25, v13, s[4:5] +; GFX9-G-NEXT: v_subb_co_u32_e64 v0, s[4:5], v26, v2, s[4:5] +; GFX9-G-NEXT: v_subb_co_u32_e64 v0, s[4:5], v27, v3, s[4:5] +; GFX9-G-NEXT: v_ashrrev_i32_e32 v0, 31, v0 +; GFX9-G-NEXT: v_or_b32_e32 v7, v1, v7 +; GFX9-G-NEXT: v_and_b32_e32 v1, v0, v18 +; GFX9-G-NEXT: v_or_b32_e32 v8, v8, v12 +; GFX9-G-NEXT: v_and_b32_e32 v14, v0, v19 +; GFX9-G-NEXT: v_sub_co_u32_e64 v12, s[4:5], v10, v1 +; GFX9-G-NEXT: v_subb_co_u32_e64 v13, s[4:5], v13, v14, s[4:5] +; GFX9-G-NEXT: v_and_b32_e32 v1, v0, v4 +; GFX9-G-NEXT: v_and_b32_e32 v10, v0, v5 +; GFX9-G-NEXT: v_subb_co_u32_e64 v14, s[4:5], v2, v1, s[4:5] +; GFX9-G-NEXT: v_subb_co_u32_e64 v15, s[4:5], v3, v10, s[4:5] +; GFX9-G-NEXT: v_and_b32_e32 v10, 1, v0 +; GFX9-G-NEXT: v_mov_b32_e32 v0, v10 ; GFX9-G-NEXT: s_or_b64 s[8:9], vcc, s[8:9] -; GFX9-G-NEXT: v_mov_b32_e32 v1, v9 +; GFX9-G-NEXT: v_mov_b32_e32 v1, v11 ; GFX9-G-NEXT: s_andn2_b64 exec, exec, s[8:9] ; GFX9-G-NEXT: s_cbranch_execnz .LBB0_3 ; GFX9-G-NEXT: ; %bb.4: ; %Flow @@ -1353,9 +1353,9 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-G-NEXT: .LBB0_5: ; %Flow2 ; GFX9-G-NEXT: s_or_b64 exec, exec, s[12:13] ; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], 1, v[6:7] -; GFX9-G-NEXT: v_lshlrev_b64 v[12:13], 1, v[12:13] +; GFX9-G-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] ; GFX9-G-NEXT: v_lshrrev_b32_e32 v4, 31, v7 -; GFX9-G-NEXT: v_or_b32_e32 v12, v12, v4 +; GFX9-G-NEXT: v_or_b32_e32 v8, v8, v4 ; GFX9-G-NEXT: v_or_b32_e32 v6, v0, v2 ; GFX9-G-NEXT: v_or_b32_e32 v7, v1, v3 ; GFX9-G-NEXT: .LBB0_6: ; %Flow3 @@ -1364,9 +1364,9 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-G-NEXT: v_xor_b32_e32 v0, v6, v3 ; GFX9-G-NEXT: v_xor_b32_e32 v1, v7, v3 ; GFX9-G-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v3 -; GFX9-G-NEXT: v_xor_b32_e32 v2, v12, v3 +; GFX9-G-NEXT: v_xor_b32_e32 v2, v8, v3 ; GFX9-G-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v3, vcc -; GFX9-G-NEXT: v_xor_b32_e32 v4, v13, v3 +; GFX9-G-NEXT: v_xor_b32_e32 v4, v9, v3 ; GFX9-G-NEXT: v_subb_co_u32_e32 v2, vcc, v2, v3, vcc ; GFX9-G-NEXT: v_subb_co_u32_e32 v3, vcc, v4, v3, vcc ; GFX9-G-NEXT: s_setpc_b64 s[30:31] @@ -2329,67 +2329,67 @@ define i128 @v_udiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-NEXT: v_subrev_u32_e32 v12, 64, v18 ; GFX9-NEXT: v_or_b32_e32 v15, v13, v15 ; GFX9-NEXT: v_lshrrev_b64 v[12:13], v12, v[2:3] -; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v18 +; GFX9-NEXT: v_lshrrev_b64 v[2:3], v18, v[2:3] ; GFX9-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc -; GFX9-NEXT: v_cndmask_b32_e64 v15, v13, v1, s[4:5] -; GFX9-NEXT: v_lshrrev_b64 v[1:2], v18, v[2:3] ; GFX9-NEXT: v_cndmask_b32_e32 v12, v12, v14, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v3, 0, v2, vcc -; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v15, 0, v3, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v14, 0, v2, vcc ; GFX9-NEXT: v_add_co_u32_e32 v22, vcc, -1, v4 ; GFX9-NEXT: v_addc_co_u32_e32 v23, vcc, -1, v5, vcc +; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v18 ; GFX9-NEXT: v_addc_co_u32_e32 v24, vcc, -1, v6, vcc -; GFX9-NEXT: v_cndmask_b32_e64 v14, v12, v0, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v1, v13, v1, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v0, v12, v0, s[4:5] ; GFX9-NEXT: v_addc_co_u32_e32 v25, vcc, -1, v7, vcc -; GFX9-NEXT: v_mov_b32_e32 v0, 0 -; GFX9-NEXT: v_mov_b32_e32 v1, 0 -; GFX9-NEXT: s_mov_b64 s[4:5], 0 +; GFX9-NEXT: v_mov_b32_e32 v2, 0 +; GFX9-NEXT: v_mov_b32_e32 v3, 0 +; GFX9-NEXT: s_mov_b64 s[10:11], 0 ; GFX9-NEXT: v_mov_b32_e32 v16, 0 ; GFX9-NEXT: v_mov_b32_e32 v17, 0 ; GFX9-NEXT: v_mov_b32_e32 v13, 0 ; GFX9-NEXT: .LBB1_3: ; %udiv-do-while ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 31, v11 -; GFX9-NEXT: v_lshlrev_b64 v[10:11], 1, v[10:11] -; GFX9-NEXT: v_lshlrev_b64 v[2:3], 1, v[2:3] -; GFX9-NEXT: v_or_b32_e32 v10, v16, v10 -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 31, v15 ; GFX9-NEXT: v_lshlrev_b64 v[14:15], 1, v[14:15] -; GFX9-NEXT: v_or_b32_e32 v2, v2, v16 -; GFX9-NEXT: v_lshrrev_b32_e32 v16, 31, v9 -; GFX9-NEXT: v_or_b32_e32 v14, v14, v16 -; GFX9-NEXT: v_sub_co_u32_e32 v16, vcc, v22, v14 -; GFX9-NEXT: v_subb_co_u32_e32 v16, vcc, v23, v15, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v16, vcc, v24, v2, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v16, vcc, v25, v3, vcc -; GFX9-NEXT: v_ashrrev_i32_e32 v26, 31, v16 -; GFX9-NEXT: v_and_b32_e32 v16, v26, v4 -; GFX9-NEXT: v_or_b32_e32 v11, v17, v11 -; GFX9-NEXT: v_and_b32_e32 v17, v26, v5 -; GFX9-NEXT: v_sub_co_u32_e32 v14, vcc, v14, v16 -; GFX9-NEXT: v_subb_co_u32_e32 v15, vcc, v15, v17, vcc -; GFX9-NEXT: v_and_b32_e32 v16, v26, v6 -; GFX9-NEXT: v_and_b32_e32 v17, v26, v7 -; GFX9-NEXT: v_subb_co_u32_e32 v2, vcc, v2, v16, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v3, vcc, v3, v17, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v12, 31, v1 +; GFX9-NEXT: v_lshlrev_b64 v[0:1], 1, v[0:1] +; GFX9-NEXT: v_or_b32_e32 v12, v14, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 31, v9 +; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] +; GFX9-NEXT: v_or_b32_e32 v0, v0, v14 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 31, v11 +; GFX9-NEXT: v_or3_b32 v8, v8, v14, v2 +; GFX9-NEXT: v_sub_co_u32_e64 v14, s[4:5], v22, v0 +; GFX9-NEXT: v_subb_co_u32_e64 v14, s[4:5], v23, v1, s[4:5] +; GFX9-NEXT: v_lshlrev_b64 v[10:11], 1, v[10:11] +; GFX9-NEXT: v_subb_co_u32_e64 v14, s[4:5], v24, v12, s[4:5] ; GFX9-NEXT: v_add_co_u32_e32 v18, vcc, -1, v18 +; GFX9-NEXT: v_subb_co_u32_e64 v14, s[4:5], v25, v15, s[4:5] ; GFX9-NEXT: v_addc_co_u32_e32 v19, vcc, -1, v19, vcc +; GFX9-NEXT: v_or_b32_e32 v10, v16, v10 +; GFX9-NEXT: v_ashrrev_i32_e32 v16, 31, v14 ; GFX9-NEXT: v_addc_co_u32_e32 v20, vcc, -1, v20, vcc +; GFX9-NEXT: v_and_b32_e32 v14, v16, v4 ; GFX9-NEXT: v_addc_co_u32_e32 v21, vcc, -1, v21, vcc -; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] -; GFX9-NEXT: v_or_b32_e32 v16, v18, v20 -; GFX9-NEXT: v_or_b32_e32 v17, v19, v21 -; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[16:17] -; GFX9-NEXT: v_or3_b32 v8, v8, v12, v0 -; GFX9-NEXT: v_and_b32_e32 v12, 1, v26 +; GFX9-NEXT: v_or_b32_e32 v11, v17, v11 +; GFX9-NEXT: v_and_b32_e32 v17, v16, v5 +; GFX9-NEXT: v_sub_co_u32_e64 v0, s[4:5], v0, v14 +; GFX9-NEXT: v_or_b32_e32 v26, v18, v20 +; GFX9-NEXT: v_or_b32_e32 v27, v19, v21 +; GFX9-NEXT: v_subb_co_u32_e64 v1, s[4:5], v1, v17, s[4:5] +; GFX9-NEXT: v_and_b32_e32 v14, v16, v6 +; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[26:27] +; GFX9-NEXT: v_and_b32_e32 v17, v16, v7 +; GFX9-NEXT: v_subb_co_u32_e64 v14, s[4:5], v12, v14, s[4:5] +; GFX9-NEXT: v_subb_co_u32_e64 v15, s[4:5], v15, v17, s[4:5] +; GFX9-NEXT: v_and_b32_e32 v12, 1, v16 ; GFX9-NEXT: v_mov_b32_e32 v17, v13 -; GFX9-NEXT: v_or3_b32 v9, v9, 0, v1 -; GFX9-NEXT: s_or_b64 s[4:5], vcc, s[4:5] +; GFX9-NEXT: v_or3_b32 v9, v9, 0, v3 +; GFX9-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GFX9-NEXT: v_mov_b32_e32 v16, v12 -; GFX9-NEXT: s_andn2_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GFX9-NEXT: s_cbranch_execnz .LBB1_3 ; GFX9-NEXT: ; %bb.4: ; %Flow -; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_or_b64 exec, exec, s[10:11] ; GFX9-NEXT: .LBB1_5: ; %Flow2 ; GFX9-NEXT: s_or_b64 exec, exec, s[8:9] ; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] @@ -3380,40 +3380,40 @@ define i128 @v_udiv_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-G-NEXT: v_mov_b32_e32 v12, s10 ; GFX9-G-NEXT: .LBB1_3: ; %udiv-do-while ; GFX9-G-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX9-G-NEXT: v_lshlrev_b64 v[12:13], 1, v[14:15] -; GFX9-G-NEXT: v_lshrrev_b32_e32 v0, 31, v15 -; GFX9-G-NEXT: v_or_b32_e32 v14, v10, v12 -; GFX9-G-NEXT: v_or_b32_e32 v15, v11, v13 -; GFX9-G-NEXT: v_lshlrev_b64 v[10:11], 1, v[16:17] -; GFX9-G-NEXT: v_lshrrev_b32_e32 v12, 31, v3 -; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], 1, v[2:3] -; GFX9-G-NEXT: v_or_b32_e32 v10, v10, v12 -; GFX9-G-NEXT: v_lshrrev_b32_e32 v12, 31, v9 -; GFX9-G-NEXT: v_or_b32_e32 v2, v2, v12 -; GFX9-G-NEXT: v_sub_co_u32_e32 v12, vcc, v22, v2 -; GFX9-G-NEXT: v_subb_co_u32_e32 v12, vcc, v23, v3, vcc -; GFX9-G-NEXT: v_subb_co_u32_e32 v12, vcc, v24, v10, vcc -; GFX9-G-NEXT: v_subb_co_u32_e32 v12, vcc, v25, v11, vcc -; GFX9-G-NEXT: v_ashrrev_i32_e32 v12, 31, v12 -; GFX9-G-NEXT: v_and_b32_e32 v13, v12, v4 -; GFX9-G-NEXT: v_and_b32_e32 v16, v12, v5 -; GFX9-G-NEXT: v_sub_co_u32_e32 v2, vcc, v2, v13 -; GFX9-G-NEXT: v_subb_co_u32_e32 v3, vcc, v3, v16, vcc -; GFX9-G-NEXT: v_and_b32_e32 v13, v12, v6 -; GFX9-G-NEXT: v_and_b32_e32 v17, v12, v7 -; GFX9-G-NEXT: v_subb_co_u32_e32 v16, vcc, v10, v13, vcc -; GFX9-G-NEXT: v_subb_co_u32_e32 v17, vcc, v11, v17, vcc ; GFX9-G-NEXT: v_add_co_u32_e32 v18, vcc, -1, v18 ; GFX9-G-NEXT: v_addc_co_u32_e32 v19, vcc, -1, v19, vcc ; GFX9-G-NEXT: v_addc_co_u32_e32 v20, vcc, -1, v20, vcc ; GFX9-G-NEXT: v_addc_co_u32_e32 v21, vcc, -1, v21, vcc -; GFX9-G-NEXT: v_or_b32_e32 v10, v18, v20 -; GFX9-G-NEXT: v_or_b32_e32 v11, v19, v21 +; GFX9-G-NEXT: v_or_b32_e32 v12, v18, v20 +; GFX9-G-NEXT: v_or_b32_e32 v13, v19, v21 +; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[12:13] +; GFX9-G-NEXT: v_lshlrev_b64 v[12:13], 1, v[16:17] +; GFX9-G-NEXT: v_lshrrev_b32_e32 v0, 31, v3 +; GFX9-G-NEXT: v_lshlrev_b64 v[2:3], 1, v[2:3] +; GFX9-G-NEXT: v_or_b32_e32 v0, v12, v0 +; GFX9-G-NEXT: v_lshrrev_b32_e32 v12, 31, v9 +; GFX9-G-NEXT: v_or_b32_e32 v2, v2, v12 +; GFX9-G-NEXT: v_lshrrev_b32_e32 v12, 31, v15 +; GFX9-G-NEXT: v_lshlrev_b64 v[14:15], 1, v[14:15] ; GFX9-G-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] -; GFX9-G-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[10:11] -; GFX9-G-NEXT: v_or_b32_e32 v8, v8, v0 -; GFX9-G-NEXT: v_and_b32_e32 v0, 1, v12 +; GFX9-G-NEXT: v_or_b32_e32 v14, v10, v14 +; GFX9-G-NEXT: v_sub_co_u32_e64 v10, s[4:5], v22, v2 +; GFX9-G-NEXT: v_subb_co_u32_e64 v10, s[4:5], v23, v3, s[4:5] +; GFX9-G-NEXT: v_subb_co_u32_e64 v10, s[4:5], v24, v0, s[4:5] +; GFX9-G-NEXT: v_subb_co_u32_e64 v10, s[4:5], v25, v13, s[4:5] +; GFX9-G-NEXT: v_ashrrev_i32_e32 v10, 31, v10 +; GFX9-G-NEXT: v_or_b32_e32 v15, v11, v15 +; GFX9-G-NEXT: v_and_b32_e32 v11, v10, v4 +; GFX9-G-NEXT: v_or_b32_e32 v8, v8, v12 +; GFX9-G-NEXT: v_and_b32_e32 v12, v10, v5 +; GFX9-G-NEXT: v_sub_co_u32_e64 v2, s[4:5], v2, v11 +; GFX9-G-NEXT: v_subb_co_u32_e64 v3, s[4:5], v3, v12, s[4:5] +; GFX9-G-NEXT: v_and_b32_e32 v11, v10, v6 +; GFX9-G-NEXT: v_and_b32_e32 v12, v10, v7 +; GFX9-G-NEXT: v_subb_co_u32_e64 v16, s[4:5], v0, v11, s[4:5] +; GFX9-G-NEXT: v_and_b32_e32 v0, 1, v10 ; GFX9-G-NEXT: v_mov_b32_e32 v11, v1 +; GFX9-G-NEXT: v_subb_co_u32_e64 v17, s[4:5], v13, v12, s[4:5] ; GFX9-G-NEXT: s_or_b64 s[8:9], vcc, s[8:9] ; GFX9-G-NEXT: v_mov_b32_e32 v10, v0 ; GFX9-G-NEXT: s_andn2_b64 exec, exec, s[8:9] diff --git a/llvm/test/CodeGen/AMDGPU/div_v2i128.ll b/llvm/test/CodeGen/AMDGPU/div_v2i128.ll index c013a1d779f36..70dbd4ae8e727 100644 --- a/llvm/test/CodeGen/AMDGPU/div_v2i128.ll +++ b/llvm/test/CodeGen/AMDGPU/div_v2i128.ll @@ -79,9 +79,9 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: s_xor_b64 s[10:11], s[4:5], -1 ; SDAG-NEXT: v_cndmask_b32_e64 v1, v19, 0, s[4:5] ; SDAG-NEXT: s_movk_i32 s8, 0x7f -; SDAG-NEXT: v_cndmask_b32_e64 v0, v18, 0, s[4:5] ; SDAG-NEXT: s_and_b64 s[10:11], s[10:11], s[6:7] ; SDAG-NEXT: v_mov_b32_e32 v27, v25 +; SDAG-NEXT: v_cndmask_b32_e64 v0, v18, 0, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v20, v17, 0, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v21, v16, 0, s[4:5] ; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[10:11] @@ -137,54 +137,54 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_addc_u32_e32 v37, vcc, -1, v3, vcc ; SDAG-NEXT: v_mov_b32_e32 v18, 0 ; SDAG-NEXT: v_mov_b32_e32 v19, 0 -; SDAG-NEXT: s_mov_b64 s[4:5], 0 +; SDAG-NEXT: s_mov_b64 s[10:11], 0 ; SDAG-NEXT: v_mov_b32_e32 v22, 0 ; SDAG-NEXT: v_mov_b32_e32 v23, 0 ; SDAG-NEXT: v_mov_b32_e32 v11, 0 ; SDAG-NEXT: .LBB0_3: ; %udiv-do-while3 ; SDAG-NEXT: ; =>This Inner Loop Header: Depth=1 -; SDAG-NEXT: v_lshl_b64 v[38:39], v[8:9], 1 ; SDAG-NEXT: v_lshl_b64 v[20:21], v[20:21], 1 -; SDAG-NEXT: v_or_b32_e32 v8, v22, v38 -; SDAG-NEXT: v_lshrrev_b32_e32 v22, 31, v17 +; SDAG-NEXT: v_lshrrev_b32_e32 v10, 31, v17 ; SDAG-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 -; SDAG-NEXT: v_or_b32_e32 v20, v20, v22 -; SDAG-NEXT: v_lshrrev_b32_e32 v22, 31, v1 -; SDAG-NEXT: v_or_b32_e32 v16, v16, v22 -; SDAG-NEXT: v_sub_i32_e32 v22, vcc, v34, v16 -; SDAG-NEXT: v_subb_u32_e32 v22, vcc, v35, v17, vcc -; SDAG-NEXT: v_subb_u32_e32 v22, vcc, v36, v20, vcc -; SDAG-NEXT: v_subb_u32_e32 v22, vcc, v37, v21, vcc -; SDAG-NEXT: v_ashrrev_i32_e32 v38, 31, v22 -; SDAG-NEXT: v_lshrrev_b32_e32 v10, 31, v9 -; SDAG-NEXT: v_or_b32_e32 v9, v23, v39 -; SDAG-NEXT: v_and_b32_e32 v23, v38, v28 -; SDAG-NEXT: v_and_b32_e32 v22, v38, v29 -; SDAG-NEXT: v_sub_i32_e32 v16, vcc, v16, v23 -; SDAG-NEXT: v_subb_u32_e32 v17, vcc, v17, v22, vcc -; SDAG-NEXT: v_and_b32_e32 v23, v38, v2 -; SDAG-NEXT: v_and_b32_e32 v22, v38, v3 -; SDAG-NEXT: v_subb_u32_e32 v20, vcc, v20, v23, vcc -; SDAG-NEXT: v_subb_u32_e32 v21, vcc, v21, v22, vcc +; SDAG-NEXT: v_or_b32_e32 v10, v20, v10 +; SDAG-NEXT: v_lshrrev_b32_e32 v20, 31, v1 +; SDAG-NEXT: v_lshl_b64 v[0:1], v[0:1], 1 +; SDAG-NEXT: v_or_b32_e32 v16, v16, v20 +; SDAG-NEXT: v_lshrrev_b32_e32 v20, 31, v9 +; SDAG-NEXT: v_or_b32_e32 v0, v0, v20 +; SDAG-NEXT: v_sub_i32_e64 v20, s[4:5], v34, v16 +; SDAG-NEXT: v_subb_u32_e64 v20, s[4:5], v35, v17, s[4:5] +; SDAG-NEXT: v_lshl_b64 v[8:9], v[8:9], 1 +; SDAG-NEXT: v_subb_u32_e64 v20, s[4:5], v36, v10, s[4:5] ; SDAG-NEXT: v_add_i32_e32 v30, vcc, -1, v30 +; SDAG-NEXT: v_subb_u32_e64 v20, s[4:5], v37, v21, s[4:5] ; SDAG-NEXT: v_addc_u32_e32 v31, vcc, -1, v31, vcc +; SDAG-NEXT: v_or_b32_e32 v8, v22, v8 +; SDAG-NEXT: v_ashrrev_i32_e32 v22, 31, v20 ; SDAG-NEXT: v_addc_u32_e32 v32, vcc, -1, v32, vcc +; SDAG-NEXT: v_and_b32_e32 v20, v22, v28 ; SDAG-NEXT: v_addc_u32_e32 v33, vcc, -1, v33, vcc -; SDAG-NEXT: v_or_b32_e32 v23, v31, v33 -; SDAG-NEXT: v_or_b32_e32 v22, v30, v32 -; SDAG-NEXT: v_lshl_b64 v[0:1], v[0:1], 1 -; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[22:23] -; SDAG-NEXT: v_or_b32_e32 v0, v0, v10 -; SDAG-NEXT: v_and_b32_e32 v10, 1, v38 +; SDAG-NEXT: v_or_b32_e32 v9, v23, v9 +; SDAG-NEXT: v_and_b32_e32 v23, v22, v29 +; SDAG-NEXT: v_sub_i32_e64 v16, s[4:5], v16, v20 +; SDAG-NEXT: v_or_b32_e32 v38, v30, v32 +; SDAG-NEXT: v_or_b32_e32 v39, v31, v33 +; SDAG-NEXT: v_subb_u32_e64 v17, s[4:5], v17, v23, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v20, v22, v2 +; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[38:39] +; SDAG-NEXT: v_and_b32_e32 v23, v22, v3 +; SDAG-NEXT: v_subb_u32_e64 v20, s[4:5], v10, v20, s[4:5] +; SDAG-NEXT: v_subb_u32_e64 v21, s[4:5], v21, v23, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v10, 1, v22 ; SDAG-NEXT: v_mov_b32_e32 v23, v11 ; SDAG-NEXT: v_or_b32_e32 v1, v19, v1 ; SDAG-NEXT: v_or_b32_e32 v0, v18, v0 -; SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5] +; SDAG-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; SDAG-NEXT: v_mov_b32_e32 v22, v10 -; SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5] +; SDAG-NEXT: s_andn2_b64 exec, exec, s[10:11] ; SDAG-NEXT: s_cbranch_execnz .LBB0_3 ; SDAG-NEXT: ; %bb.4: ; %Flow13 -; SDAG-NEXT: s_or_b64 exec, exec, s[4:5] +; SDAG-NEXT: s_or_b64 exec, exec, s[10:11] ; SDAG-NEXT: .LBB0_5: ; %Flow14 ; SDAG-NEXT: s_or_b64 exec, exec, s[8:9] ; SDAG-NEXT: v_lshl_b64 v[0:1], v[0:1], 1 @@ -203,8 +203,8 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_xor_b32_e32 v3, v6, v18 ; SDAG-NEXT: v_ashrrev_i32_e32 v19, 31, v15 ; SDAG-NEXT: v_xor_b32_e32 v2, v7, v18 -; SDAG-NEXT: v_subb_u32_e32 v6, vcc, v3, v18, vcc -; SDAG-NEXT: v_subb_u32_e32 v7, vcc, v2, v18, vcc +; SDAG-NEXT: v_subb_u32_e32 v10, vcc, v3, v18, vcc +; SDAG-NEXT: v_subb_u32_e32 v11, vcc, v2, v18, vcc ; SDAG-NEXT: v_xor_b32_e32 v3, v12, v19 ; SDAG-NEXT: v_xor_b32_e32 v2, v13, v19 ; SDAG-NEXT: v_sub_i32_e32 v28, vcc, v3, v19 @@ -216,8 +216,8 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_or_b32_e32 v5, v29, v3 ; SDAG-NEXT: v_or_b32_e32 v4, v28, v2 ; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[4:5] -; SDAG-NEXT: v_or_b32_e32 v5, v9, v7 -; SDAG-NEXT: v_or_b32_e32 v4, v8, v6 +; SDAG-NEXT: v_or_b32_e32 v5, v9, v11 +; SDAG-NEXT: v_or_b32_e32 v4, v8, v10 ; SDAG-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[4:5] ; SDAG-NEXT: v_ffbh_u32_e32 v4, v2 ; SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5] @@ -226,50 +226,50 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_min_u32_e32 v4, v4, v5 ; SDAG-NEXT: v_ffbh_u32_e32 v5, v28 ; SDAG-NEXT: v_add_i32_e32 v5, vcc, 32, v5 -; SDAG-NEXT: v_ffbh_u32_e32 v10, v29 -; SDAG-NEXT: v_min_u32_e32 v5, v5, v10 +; SDAG-NEXT: v_ffbh_u32_e32 v6, v29 +; SDAG-NEXT: v_min_u32_e32 v5, v5, v6 ; SDAG-NEXT: v_add_i32_e32 v5, vcc, 64, v5 -; SDAG-NEXT: v_addc_u32_e64 v10, s[6:7], 0, 0, vcc +; SDAG-NEXT: v_addc_u32_e64 v6, s[6:7], 0, 0, vcc ; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] -; SDAG-NEXT: v_ffbh_u32_e32 v11, v7 +; SDAG-NEXT: v_ffbh_u32_e32 v7, v11 ; SDAG-NEXT: v_cndmask_b32_e32 v4, v5, v4, vcc -; SDAG-NEXT: v_ffbh_u32_e32 v5, v6 -; SDAG-NEXT: v_cndmask_b32_e64 v10, v10, 0, vcc +; SDAG-NEXT: v_ffbh_u32_e32 v5, v10 +; SDAG-NEXT: v_cndmask_b32_e64 v6, v6, 0, vcc ; SDAG-NEXT: v_add_i32_e32 v5, vcc, 32, v5 -; SDAG-NEXT: v_min_u32_e32 v5, v5, v11 -; SDAG-NEXT: v_ffbh_u32_e32 v11, v8 -; SDAG-NEXT: v_add_i32_e32 v11, vcc, 32, v11 +; SDAG-NEXT: v_min_u32_e32 v5, v5, v7 +; SDAG-NEXT: v_ffbh_u32_e32 v7, v8 +; SDAG-NEXT: v_add_i32_e32 v7, vcc, 32, v7 ; SDAG-NEXT: v_ffbh_u32_e32 v12, v9 -; SDAG-NEXT: v_min_u32_e32 v11, v11, v12 -; SDAG-NEXT: v_add_i32_e32 v11, vcc, 64, v11 +; SDAG-NEXT: v_min_u32_e32 v7, v7, v12 +; SDAG-NEXT: v_add_i32_e32 v7, vcc, 64, v7 ; SDAG-NEXT: v_addc_u32_e64 v12, s[6:7], 0, 0, vcc -; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[6:7] +; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[10:11] ; SDAG-NEXT: v_mov_b32_e32 v22, v18 -; SDAG-NEXT: v_cndmask_b32_e32 v5, v11, v5, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc ; SDAG-NEXT: v_cndmask_b32_e64 v12, v12, 0, vcc ; SDAG-NEXT: v_sub_i32_e32 v4, vcc, v4, v5 -; SDAG-NEXT: v_subb_u32_e32 v5, vcc, v10, v12, vcc +; SDAG-NEXT: v_subb_u32_e32 v5, vcc, v6, v12, vcc ; SDAG-NEXT: v_subb_u32_e64 v12, s[6:7], 0, 0, vcc ; SDAG-NEXT: v_subb_u32_e64 v13, s[6:7], 0, 0, s[6:7] ; SDAG-NEXT: s_mov_b64 s[6:7], 0x7f ; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[4:5] ; SDAG-NEXT: v_or_b32_e32 v15, v5, v13 -; SDAG-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc ; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[12:13] ; SDAG-NEXT: v_mov_b32_e32 v23, v19 -; SDAG-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc ; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[12:13] ; SDAG-NEXT: s_movk_i32 s8, 0x7f -; SDAG-NEXT: v_cndmask_b32_e32 v10, v11, v10, vcc -; SDAG-NEXT: v_and_b32_e32 v10, 1, v10 -; SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 1, v10 -; SDAG-NEXT: v_xor_b32_e32 v10, 0x7f, v4 -; SDAG-NEXT: v_or_b32_e32 v14, v10, v12 +; SDAG-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc +; SDAG-NEXT: v_and_b32_e32 v6, 1, v6 +; SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6 +; SDAG-NEXT: v_xor_b32_e32 v6, 0x7f, v4 +; SDAG-NEXT: v_or_b32_e32 v14, v6, v12 ; SDAG-NEXT: s_or_b64 s[4:5], s[4:5], vcc ; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[14:15] ; SDAG-NEXT: s_xor_b64 s[6:7], s[4:5], -1 -; SDAG-NEXT: v_cndmask_b32_e64 v11, v7, 0, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e64 v10, v6, 0, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v7, v11, 0, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v6, v10, 0, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v14, v9, 0, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v15, v8, 0, s[4:5] ; SDAG-NEXT: s_and_b64 s[4:5], s[6:7], vcc @@ -281,21 +281,21 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_addc_u32_e32 v32, vcc, 0, v12, vcc ; SDAG-NEXT: v_addc_u32_e64 v33, s[4:5], 0, v13, vcc ; SDAG-NEXT: v_sub_i32_e32 v14, vcc, s8, v4 -; SDAG-NEXT: v_sub_i32_e32 v5, vcc, 64, v14 -; SDAG-NEXT: v_lshl_b64 v[10:11], v[6:7], v14 -; SDAG-NEXT: v_lshr_b64 v[12:13], v[8:9], v5 +; SDAG-NEXT: v_sub_i32_e32 v7, vcc, 64, v14 +; SDAG-NEXT: v_lshl_b64 v[5:6], v[10:11], v14 +; SDAG-NEXT: v_lshr_b64 v[12:13], v[8:9], v7 ; SDAG-NEXT: v_sub_i32_e32 v4, vcc, 63, v4 +; SDAG-NEXT: v_or_b32_e32 v12, v5, v12 ; SDAG-NEXT: v_lshl_b64 v[4:5], v[8:9], v4 -; SDAG-NEXT: v_or_b32_e32 v11, v11, v13 +; SDAG-NEXT: v_or_b32_e32 v6, v6, v13 ; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v14 ; SDAG-NEXT: s_xor_b64 s[8:9], s[4:5], -1 -; SDAG-NEXT: v_or_b32_e32 v10, v10, v12 -; SDAG-NEXT: v_cndmask_b32_e32 v5, v5, v11, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc ; SDAG-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v14 -; SDAG-NEXT: v_cndmask_b32_e64 v11, v5, v7, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e32 v10, v4, v10, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v7, v5, v11, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e32 v6, v4, v12, vcc ; SDAG-NEXT: v_lshl_b64 v[4:5], v[8:9], v14 -; SDAG-NEXT: v_cndmask_b32_e64 v10, v10, v6, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v6, v6, v10, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc ; SDAG-NEXT: v_mov_b32_e32 v12, 0 ; SDAG-NEXT: v_mov_b32_e32 v13, 0 @@ -306,80 +306,80 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: ; %bb.8: ; %udiv-preheader ; SDAG-NEXT: v_sub_i32_e32 v14, vcc, 64, v30 ; SDAG-NEXT: v_lshr_b64 v[12:13], v[8:9], v30 -; SDAG-NEXT: v_lshl_b64 v[14:15], v[6:7], v14 +; SDAG-NEXT: v_lshl_b64 v[14:15], v[10:11], v14 ; SDAG-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v30 ; SDAG-NEXT: v_or_b32_e32 v14, v12, v14 ; SDAG-NEXT: v_subrev_i32_e32 v12, vcc, 64, v30 ; SDAG-NEXT: v_or_b32_e32 v15, v13, v15 -; SDAG-NEXT: v_lshr_b64 v[12:13], v[6:7], v12 -; SDAG-NEXT: v_lshr_b64 v[6:7], v[6:7], v30 +; SDAG-NEXT: v_lshr_b64 v[12:13], v[10:11], v12 +; SDAG-NEXT: v_lshr_b64 v[10:11], v[10:11], v30 ; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v30 ; SDAG-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc ; SDAG-NEXT: v_cndmask_b32_e32 v12, v12, v14, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v17, 0, v7, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v16, 0, v6, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v15, 0, v11, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v14, 0, v10, vcc ; SDAG-NEXT: v_add_i32_e32 v34, vcc, -1, v28 ; SDAG-NEXT: v_addc_u32_e32 v35, vcc, -1, v29, vcc ; SDAG-NEXT: v_addc_u32_e32 v36, vcc, -1, v2, vcc ; SDAG-NEXT: v_cndmask_b32_e64 v9, v13, v9, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v8, v12, v8, s[4:5] ; SDAG-NEXT: v_addc_u32_e32 v37, vcc, -1, v3, vcc -; SDAG-NEXT: v_mov_b32_e32 v6, 0 -; SDAG-NEXT: v_mov_b32_e32 v7, 0 +; SDAG-NEXT: v_mov_b32_e32 v10, 0 +; SDAG-NEXT: v_mov_b32_e32 v11, 0 ; SDAG-NEXT: s_mov_b64 s[10:11], 0 -; SDAG-NEXT: v_mov_b32_e32 v14, 0 -; SDAG-NEXT: v_mov_b32_e32 v15, 0 +; SDAG-NEXT: v_mov_b32_e32 v16, 0 +; SDAG-NEXT: v_mov_b32_e32 v17, 0 ; SDAG-NEXT: v_mov_b32_e32 v13, 0 ; SDAG-NEXT: .LBB0_9: ; %udiv-do-while ; SDAG-NEXT: ; =>This Inner Loop Header: Depth=1 -; SDAG-NEXT: v_lshl_b64 v[38:39], v[4:5], 1 -; SDAG-NEXT: v_add_i32_e32 v30, vcc, -1, v30 -; SDAG-NEXT: v_or_b32_e32 v4, v14, v38 -; SDAG-NEXT: v_lshrrev_b32_e32 v14, 31, v9 +; SDAG-NEXT: v_lshl_b64 v[14:15], v[14:15], 1 +; SDAG-NEXT: v_lshrrev_b32_e32 v12, 31, v9 ; SDAG-NEXT: v_lshl_b64 v[8:9], v[8:9], 1 +; SDAG-NEXT: v_or_b32_e32 v12, v14, v12 +; SDAG-NEXT: v_lshrrev_b32_e32 v14, 31, v7 +; SDAG-NEXT: v_lshl_b64 v[6:7], v[6:7], 1 +; SDAG-NEXT: v_or_b32_e32 v8, v8, v14 +; SDAG-NEXT: v_lshrrev_b32_e32 v14, 31, v5 +; SDAG-NEXT: v_or_b32_e32 v6, v6, v14 +; SDAG-NEXT: v_sub_i32_e64 v14, s[4:5], v34, v8 +; SDAG-NEXT: v_subb_u32_e64 v14, s[4:5], v35, v9, s[4:5] +; SDAG-NEXT: v_lshl_b64 v[4:5], v[4:5], 1 +; SDAG-NEXT: v_subb_u32_e64 v14, s[4:5], v36, v12, s[4:5] +; SDAG-NEXT: v_add_i32_e32 v30, vcc, -1, v30 +; SDAG-NEXT: v_subb_u32_e64 v14, s[4:5], v37, v15, s[4:5] ; SDAG-NEXT: v_addc_u32_e32 v31, vcc, -1, v31, vcc -; SDAG-NEXT: v_lshrrev_b32_e32 v12, 31, v5 -; SDAG-NEXT: v_or_b32_e32 v5, v15, v39 -; SDAG-NEXT: v_lshrrev_b32_e32 v15, 31, v11 -; SDAG-NEXT: v_lshl_b64 v[10:11], v[10:11], 1 +; SDAG-NEXT: v_or_b32_e32 v4, v16, v4 +; SDAG-NEXT: v_ashrrev_i32_e32 v16, 31, v14 ; SDAG-NEXT: v_addc_u32_e32 v32, vcc, -1, v32, vcc -; SDAG-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 -; SDAG-NEXT: v_or_b32_e32 v8, v8, v15 +; SDAG-NEXT: v_or_b32_e32 v5, v17, v5 +; SDAG-NEXT: v_and_b32_e32 v17, v16, v28 ; SDAG-NEXT: v_addc_u32_e32 v33, vcc, -1, v33, vcc -; SDAG-NEXT: v_or_b32_e32 v10, v10, v12 -; SDAG-NEXT: v_sub_i32_e32 v12, vcc, v34, v8 -; SDAG-NEXT: v_or_b32_e32 v16, v16, v14 -; SDAG-NEXT: v_subb_u32_e32 v12, vcc, v35, v9, vcc -; SDAG-NEXT: v_subb_u32_e32 v12, vcc, v36, v16, vcc -; SDAG-NEXT: v_or_b32_e32 v14, v30, v32 -; SDAG-NEXT: v_or_b32_e32 v15, v31, v33 -; SDAG-NEXT: v_subb_u32_e32 v12, vcc, v37, v17, vcc -; SDAG-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[14:15] -; SDAG-NEXT: v_ashrrev_i32_e32 v14, 31, v12 -; SDAG-NEXT: v_and_b32_e32 v38, v14, v28 -; SDAG-NEXT: v_and_b32_e32 v15, v14, v29 -; SDAG-NEXT: v_sub_i32_e32 v8, vcc, v8, v38 -; SDAG-NEXT: v_subb_u32_e32 v9, vcc, v9, v15, vcc -; SDAG-NEXT: v_and_b32_e32 v39, v14, v2 -; SDAG-NEXT: v_and_b32_e32 v12, 1, v14 -; SDAG-NEXT: v_and_b32_e32 v38, v14, v3 -; SDAG-NEXT: v_mov_b32_e32 v15, v13 -; SDAG-NEXT: v_subb_u32_e32 v16, vcc, v16, v39, vcc -; SDAG-NEXT: v_or_b32_e32 v11, v7, v11 -; SDAG-NEXT: v_or_b32_e32 v10, v6, v10 -; SDAG-NEXT: s_or_b64 s[10:11], s[4:5], s[10:11] -; SDAG-NEXT: v_mov_b32_e32 v14, v12 -; SDAG-NEXT: v_subb_u32_e32 v17, vcc, v17, v38, vcc +; SDAG-NEXT: v_and_b32_e32 v14, v16, v29 +; SDAG-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v17 +; SDAG-NEXT: v_or_b32_e32 v39, v31, v33 +; SDAG-NEXT: v_or_b32_e32 v38, v30, v32 +; SDAG-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v14, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v14, v16, v2 +; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[38:39] +; SDAG-NEXT: v_and_b32_e32 v17, v16, v3 +; SDAG-NEXT: v_subb_u32_e64 v14, s[4:5], v12, v14, s[4:5] +; SDAG-NEXT: v_subb_u32_e64 v15, s[4:5], v15, v17, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v12, 1, v16 +; SDAG-NEXT: v_mov_b32_e32 v17, v13 +; SDAG-NEXT: v_or_b32_e32 v7, v11, v7 +; SDAG-NEXT: v_or_b32_e32 v6, v10, v6 +; SDAG-NEXT: s_or_b64 s[10:11], vcc, s[10:11] +; SDAG-NEXT: v_mov_b32_e32 v16, v12 ; SDAG-NEXT: s_andn2_b64 exec, exec, s[10:11] ; SDAG-NEXT: s_cbranch_execnz .LBB0_9 ; SDAG-NEXT: ; %bb.10: ; %Flow ; SDAG-NEXT: s_or_b64 exec, exec, s[10:11] ; SDAG-NEXT: .LBB0_11: ; %Flow11 ; SDAG-NEXT: s_or_b64 exec, exec, s[8:9] -; SDAG-NEXT: v_lshl_b64 v[10:11], v[10:11], 1 +; SDAG-NEXT: v_lshl_b64 v[6:7], v[6:7], 1 ; SDAG-NEXT: v_lshl_b64 v[2:3], v[4:5], 1 -; SDAG-NEXT: v_lshrrev_b32_e32 v6, 31, v5 -; SDAG-NEXT: v_or_b32_e32 v10, v10, v6 +; SDAG-NEXT: v_lshrrev_b32_e32 v8, 31, v5 +; SDAG-NEXT: v_or_b32_e32 v6, v6, v8 ; SDAG-NEXT: v_or_b32_e32 v14, v13, v3 ; SDAG-NEXT: v_or_b32_e32 v15, v12, v2 ; SDAG-NEXT: .LBB0_12: ; %Flow12 @@ -393,17 +393,17 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_sub_i32_e32 v0, vcc, v0, v2 ; SDAG-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc ; SDAG-NEXT: v_subb_u32_e32 v2, vcc, v5, v2, vcc -; SDAG-NEXT: v_xor_b32_e32 v6, v19, v18 +; SDAG-NEXT: v_xor_b32_e32 v9, v19, v18 ; SDAG-NEXT: v_subb_u32_e32 v3, vcc, v4, v3, vcc -; SDAG-NEXT: v_xor_b32_e32 v7, v23, v22 -; SDAG-NEXT: v_xor_b32_e32 v4, v15, v6 -; SDAG-NEXT: v_xor_b32_e32 v5, v14, v7 -; SDAG-NEXT: v_sub_i32_e32 v4, vcc, v4, v6 -; SDAG-NEXT: v_xor_b32_e32 v9, v10, v6 -; SDAG-NEXT: v_subb_u32_e32 v5, vcc, v5, v7, vcc -; SDAG-NEXT: v_xor_b32_e32 v8, v11, v7 -; SDAG-NEXT: v_subb_u32_e32 v6, vcc, v9, v6, vcc -; SDAG-NEXT: v_subb_u32_e32 v7, vcc, v8, v7, vcc +; SDAG-NEXT: v_xor_b32_e32 v8, v23, v22 +; SDAG-NEXT: v_xor_b32_e32 v4, v15, v9 +; SDAG-NEXT: v_xor_b32_e32 v5, v14, v8 +; SDAG-NEXT: v_sub_i32_e32 v4, vcc, v4, v9 +; SDAG-NEXT: v_xor_b32_e32 v6, v6, v9 +; SDAG-NEXT: v_subb_u32_e32 v5, vcc, v5, v8, vcc +; SDAG-NEXT: v_xor_b32_e32 v7, v7, v8 +; SDAG-NEXT: v_subb_u32_e32 v6, vcc, v6, v9, vcc +; SDAG-NEXT: v_subb_u32_e32 v7, vcc, v7, v8, vcc ; SDAG-NEXT: s_setpc_b64 s[30:31] ; ; GISEL-LABEL: v_sdiv_v2i128_vv: @@ -417,8 +417,8 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_subb_u32_e32 v17, vcc, v1, v24, vcc ; GISEL-NEXT: v_ashrrev_i32_e32 v25, 31, v11 ; GISEL-NEXT: v_xor_b32_e32 v3, v24, v3 -; GISEL-NEXT: v_subb_u32_e32 v18, vcc, v2, v24, vcc -; GISEL-NEXT: v_subb_u32_e32 v19, vcc, v3, v24, vcc +; GISEL-NEXT: v_subb_u32_e32 v20, vcc, v2, v24, vcc +; GISEL-NEXT: v_subb_u32_e32 v21, vcc, v3, v24, vcc ; GISEL-NEXT: v_xor_b32_e32 v0, v25, v8 ; GISEL-NEXT: v_xor_b32_e32 v1, v25, v9 ; GISEL-NEXT: v_sub_i32_e32 v26, vcc, v0, v25 @@ -430,8 +430,8 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_or_b32_e32 v0, v26, v10 ; GISEL-NEXT: v_or_b32_e32 v1, v27, v11 ; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1] -; GISEL-NEXT: v_or_b32_e32 v0, v16, v18 -; GISEL-NEXT: v_or_b32_e32 v1, v17, v19 +; GISEL-NEXT: v_or_b32_e32 v0, v16, v20 +; GISEL-NEXT: v_or_b32_e32 v1, v17, v21 ; GISEL-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[0:1] ; GISEL-NEXT: v_ffbh_u32_e32 v1, v26 ; GISEL-NEXT: v_ffbh_u32_e32 v0, v27 @@ -448,11 +448,11 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_add_i32_e64 v1, s[6:7], 32, v1 ; GISEL-NEXT: v_ffbh_u32_e32 v2, v17 ; GISEL-NEXT: v_min_u32_e32 v1, v2, v1 -; GISEL-NEXT: v_ffbh_u32_e32 v2, v18 +; GISEL-NEXT: v_ffbh_u32_e32 v2, v20 ; GISEL-NEXT: v_add_i32_e64 v2, s[6:7], 32, v2 ; GISEL-NEXT: v_add_i32_e64 v1, s[6:7], 64, v1 -; GISEL-NEXT: v_ffbh_u32_e32 v3, v19 -; GISEL-NEXT: v_cmp_eq_u64_e64 s[6:7], 0, v[18:19] +; GISEL-NEXT: v_ffbh_u32_e32 v3, v21 +; GISEL-NEXT: v_cmp_eq_u64_e64 s[6:7], 0, v[20:21] ; GISEL-NEXT: v_min_u32_e32 v2, v3, v2 ; GISEL-NEXT: v_cndmask_b32_e64 v1, v2, v1, s[6:7] ; GISEL-NEXT: v_sub_i32_e64 v0, s[6:7], v0, v1 @@ -464,25 +464,25 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_subb_u32_e64 v3, s[6:7], 0, 0, s[6:7] ; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[8:9] ; GISEL-NEXT: v_cmp_lt_u64_e64 s[8:9], 0, v[2:3] -; GISEL-NEXT: v_xor_b32_e32 v20, 0x7f, v0 +; GISEL-NEXT: v_xor_b32_e32 v18, 0x7f, v0 ; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[8:9] ; GISEL-NEXT: v_cmp_eq_u64_e64 s[8:9], 0, v[2:3] -; GISEL-NEXT: v_or_b32_e32 v20, v20, v2 +; GISEL-NEXT: v_or_b32_e32 v18, v18, v2 ; GISEL-NEXT: v_cndmask_b32_e64 v8, v9, v8, s[8:9] -; GISEL-NEXT: v_or_b32_e32 v21, v1, v3 +; GISEL-NEXT: v_or_b32_e32 v19, v1, v3 ; GISEL-NEXT: v_and_b32_e32 v8, 1, v8 -; GISEL-NEXT: v_cmp_eq_u64_e64 s[6:7], 0, v[20:21] +; GISEL-NEXT: v_cmp_eq_u64_e64 s[6:7], 0, v[18:19] ; GISEL-NEXT: v_cmp_ne_u32_e64 s[8:9], 0, v8 ; GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5] ; GISEL-NEXT: s_or_b64 s[4:5], s[4:5], s[8:9] ; GISEL-NEXT: s_mov_b64 s[10:11], exec ; GISEL-NEXT: s_or_b64 s[6:7], s[4:5], s[6:7] ; GISEL-NEXT: s_mov_b64 s[12:13], 0 -; GISEL-NEXT: v_cndmask_b32_e64 v20, v16, 0, s[4:5] -; GISEL-NEXT: v_cndmask_b32_e64 v8, v18, 0, s[4:5] -; GISEL-NEXT: v_cndmask_b32_e64 v9, v19, 0, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v18, v16, 0, s[4:5] ; GISEL-NEXT: s_xor_b64 s[8:9], s[6:7], s[10:11] -; GISEL-NEXT: v_cndmask_b32_e64 v21, v17, 0, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v19, v17, 0, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v8, v20, 0, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v9, v21, 0, s[4:5] ; GISEL-NEXT: s_and_saveexec_b64 s[6:7], s[8:9] ; GISEL-NEXT: s_cbranch_execz .LBB0_6 ; GISEL-NEXT: ; %bb.1: ; %udiv-bb15 @@ -494,22 +494,22 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: s_xor_b64 s[4:5], vcc, s[4:5] ; GISEL-NEXT: v_sub_i32_e32 v22, vcc, 0x7f, v0 ; GISEL-NEXT: v_not_b32_e32 v0, 63 -; GISEL-NEXT: v_add_i32_e32 v20, vcc, v22, v0 +; GISEL-NEXT: v_add_i32_e32 v18, vcc, v22, v0 ; GISEL-NEXT: v_sub_i32_e32 v0, vcc, 64, v22 ; GISEL-NEXT: v_lshr_b64 v[0:1], v[16:17], v0 -; GISEL-NEXT: v_lshl_b64 v[2:3], v[18:19], v22 +; GISEL-NEXT: v_lshl_b64 v[2:3], v[20:21], v22 ; GISEL-NEXT: v_lshl_b64 v[8:9], v[16:17], v22 ; GISEL-NEXT: v_or_b32_e32 v2, v0, v2 ; GISEL-NEXT: v_or_b32_e32 v3, v1, v3 -; GISEL-NEXT: v_lshl_b64 v[0:1], v[16:17], v20 +; GISEL-NEXT: v_lshl_b64 v[0:1], v[16:17], v18 ; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v22 -; GISEL-NEXT: v_cndmask_b32_e32 v20, 0, v8, vcc -; GISEL-NEXT: v_cndmask_b32_e32 v21, 0, v9, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v18, 0, v8, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v19, 0, v9, vcc ; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v22 -; GISEL-NEXT: v_cndmask_b32_e32 v8, v0, v18, vcc -; GISEL-NEXT: v_cndmask_b32_e32 v9, v1, v19, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v8, v0, v20, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v9, v1, v21, vcc ; GISEL-NEXT: s_mov_b64 s[14:15], s[12:13] ; GISEL-NEXT: v_mov_b32_e32 v0, s12 ; GISEL-NEXT: v_mov_b32_e32 v1, s13 @@ -521,12 +521,12 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: ; %bb.2: ; %udiv-preheader4 ; GISEL-NEXT: v_sub_i32_e32 v2, vcc, 64, v28 ; GISEL-NEXT: v_lshr_b64 v[0:1], v[16:17], v28 -; GISEL-NEXT: v_lshl_b64 v[2:3], v[18:19], v2 +; GISEL-NEXT: v_lshl_b64 v[2:3], v[20:21], v2 ; GISEL-NEXT: v_add_i32_e32 v32, vcc, 0xffffffc0, v28 -; GISEL-NEXT: v_lshr_b64 v[22:23], v[18:19], v28 ; GISEL-NEXT: v_or_b32_e32 v2, v0, v2 +; GISEL-NEXT: v_lshr_b64 v[22:23], v[20:21], v28 ; GISEL-NEXT: v_or_b32_e32 v3, v1, v3 -; GISEL-NEXT: v_lshr_b64 v[0:1], v[18:19], v32 +; GISEL-NEXT: v_lshr_b64 v[0:1], v[20:21], v32 ; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v28 ; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc @@ -536,8 +536,8 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: s_mov_b64 s[8:9], 0 ; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v28 ; GISEL-NEXT: v_addc_u32_e32 v33, vcc, -1, v27, vcc -; GISEL-NEXT: v_cndmask_b32_e64 v18, v0, v16, s[4:5] -; GISEL-NEXT: v_cndmask_b32_e64 v19, v1, v17, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v20, v0, v16, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v21, v1, v17, s[4:5] ; GISEL-NEXT: v_addc_u32_e32 v34, vcc, -1, v10, vcc ; GISEL-NEXT: s_mov_b64 s[10:11], s[8:9] ; GISEL-NEXT: v_mov_b32_e32 v0, s8 @@ -549,39 +549,39 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_mov_b32_e32 v3, s11 ; GISEL-NEXT: .LBB0_3: ; %udiv-do-while3 ; GISEL-NEXT: ; =>This Inner Loop Header: Depth=1 -; GISEL-NEXT: v_lshl_b64 v[2:3], v[20:21], 1 -; GISEL-NEXT: v_lshrrev_b32_e32 v16, 31, v21 -; GISEL-NEXT: v_or_b32_e32 v20, v0, v2 -; GISEL-NEXT: v_or_b32_e32 v21, v1, v3 -; GISEL-NEXT: v_lshl_b64 v[2:3], v[18:19], 1 -; GISEL-NEXT: v_lshrrev_b32_e32 v18, 31, v9 -; GISEL-NEXT: v_lshl_b64 v[0:1], v[22:23], 1 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v18 -; GISEL-NEXT: v_lshrrev_b32_e32 v22, 31, v19 -; GISEL-NEXT: v_sub_i32_e32 v18, vcc, v32, v2 -; GISEL-NEXT: v_or_b32_e32 v0, v0, v22 -; GISEL-NEXT: v_subb_u32_e32 v18, vcc, v33, v3, vcc -; GISEL-NEXT: v_subb_u32_e32 v18, vcc, v34, v0, vcc -; GISEL-NEXT: v_subb_u32_e32 v18, vcc, v35, v1, vcc -; GISEL-NEXT: v_ashrrev_i32_e32 v36, 31, v18 -; GISEL-NEXT: v_and_b32_e32 v18, v36, v26 -; GISEL-NEXT: v_and_b32_e32 v19, v36, v27 -; GISEL-NEXT: v_sub_i32_e32 v18, vcc, v2, v18 -; GISEL-NEXT: v_subb_u32_e32 v19, vcc, v3, v19, vcc -; GISEL-NEXT: v_and_b32_e32 v2, v36, v10 -; GISEL-NEXT: v_and_b32_e32 v3, v36, v11 -; GISEL-NEXT: v_subb_u32_e32 v22, vcc, v0, v2, vcc -; GISEL-NEXT: v_subb_u32_e32 v23, vcc, v1, v3, vcc ; GISEL-NEXT: v_add_i32_e32 v28, vcc, -1, v28 ; GISEL-NEXT: v_addc_u32_e32 v29, vcc, -1, v29, vcc ; GISEL-NEXT: v_addc_u32_e32 v30, vcc, -1, v30, vcc ; GISEL-NEXT: v_addc_u32_e32 v31, vcc, -1, v31, vcc +; GISEL-NEXT: v_or_b32_e32 v2, v28, v30 +; GISEL-NEXT: v_or_b32_e32 v3, v29, v31 +; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3] +; GISEL-NEXT: v_lshl_b64 v[2:3], v[22:23], 1 +; GISEL-NEXT: v_lshrrev_b32_e32 v16, 31, v21 +; GISEL-NEXT: v_lshl_b64 v[20:21], v[20:21], 1 +; GISEL-NEXT: v_or_b32_e32 v2, v2, v16 +; GISEL-NEXT: v_lshrrev_b32_e32 v16, 31, v9 +; GISEL-NEXT: v_or_b32_e32 v16, v20, v16 +; GISEL-NEXT: v_lshrrev_b32_e32 v20, 31, v19 +; GISEL-NEXT: v_lshl_b64 v[18:19], v[18:19], 1 ; GISEL-NEXT: v_lshl_b64 v[8:9], v[8:9], 1 -; GISEL-NEXT: v_or_b32_e32 v0, v28, v30 -; GISEL-NEXT: v_or_b32_e32 v1, v29, v31 -; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1] -; GISEL-NEXT: v_or_b32_e32 v8, v8, v16 -; GISEL-NEXT: v_and_b32_e32 v16, 1, v36 +; GISEL-NEXT: v_or_b32_e32 v18, v0, v18 +; GISEL-NEXT: v_sub_i32_e64 v0, s[4:5], v32, v16 +; GISEL-NEXT: v_subb_u32_e64 v0, s[4:5], v33, v21, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v0, s[4:5], v34, v2, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v0, s[4:5], v35, v3, s[4:5] +; GISEL-NEXT: v_ashrrev_i32_e32 v0, 31, v0 +; GISEL-NEXT: v_or_b32_e32 v19, v1, v19 +; GISEL-NEXT: v_and_b32_e32 v1, v0, v26 +; GISEL-NEXT: v_or_b32_e32 v8, v8, v20 +; GISEL-NEXT: v_and_b32_e32 v22, v0, v27 +; GISEL-NEXT: v_sub_i32_e64 v20, s[4:5], v16, v1 +; GISEL-NEXT: v_subb_u32_e64 v21, s[4:5], v21, v22, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v1, v0, v10 +; GISEL-NEXT: v_and_b32_e32 v16, v0, v11 +; GISEL-NEXT: v_subb_u32_e64 v22, s[4:5], v2, v1, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v23, s[4:5], v3, v16, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v16, 1, v0 ; GISEL-NEXT: v_mov_b32_e32 v0, v16 ; GISEL-NEXT: s_or_b64 s[8:9], vcc, s[8:9] ; GISEL-NEXT: v_mov_b32_e32 v1, v17 @@ -591,32 +591,32 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: s_or_b64 exec, exec, s[8:9] ; GISEL-NEXT: .LBB0_5: ; %Flow14 ; GISEL-NEXT: s_or_b64 exec, exec, s[12:13] -; GISEL-NEXT: v_lshl_b64 v[2:3], v[20:21], 1 +; GISEL-NEXT: v_lshl_b64 v[2:3], v[18:19], 1 ; GISEL-NEXT: v_lshl_b64 v[8:9], v[8:9], 1 -; GISEL-NEXT: v_lshrrev_b32_e32 v10, 31, v21 +; GISEL-NEXT: v_lshrrev_b32_e32 v10, 31, v19 ; GISEL-NEXT: v_or_b32_e32 v8, v8, v10 -; GISEL-NEXT: v_or_b32_e32 v20, v0, v2 -; GISEL-NEXT: v_or_b32_e32 v21, v1, v3 +; GISEL-NEXT: v_or_b32_e32 v18, v0, v2 +; GISEL-NEXT: v_or_b32_e32 v19, v1, v3 ; GISEL-NEXT: .LBB0_6: ; %Flow16 ; GISEL-NEXT: s_or_b64 exec, exec, s[6:7] -; GISEL-NEXT: v_ashrrev_i32_e32 v18, 31, v7 -; GISEL-NEXT: v_xor_b32_e32 v0, v18, v4 -; GISEL-NEXT: v_xor_b32_e32 v1, v18, v5 -; GISEL-NEXT: v_xor_b32_e32 v2, v18, v6 -; GISEL-NEXT: v_sub_i32_e32 v6, vcc, v0, v18 -; GISEL-NEXT: v_xor_b32_e32 v3, v18, v7 -; GISEL-NEXT: v_subb_u32_e32 v7, vcc, v1, v18, vcc -; GISEL-NEXT: v_ashrrev_i32_e32 v19, 31, v15 -; GISEL-NEXT: v_subb_u32_e32 v10, vcc, v2, v18, vcc -; GISEL-NEXT: v_subb_u32_e32 v11, vcc, v3, v18, vcc -; GISEL-NEXT: v_xor_b32_e32 v0, v19, v12 -; GISEL-NEXT: v_xor_b32_e32 v1, v19, v13 -; GISEL-NEXT: v_sub_i32_e32 v22, vcc, v0, v19 -; GISEL-NEXT: v_xor_b32_e32 v2, v19, v14 -; GISEL-NEXT: v_subb_u32_e32 v23, vcc, v1, v19, vcc -; GISEL-NEXT: v_xor_b32_e32 v3, v19, v15 -; GISEL-NEXT: v_subb_u32_e32 v4, vcc, v2, v19, vcc -; GISEL-NEXT: v_subb_u32_e32 v5, vcc, v3, v19, vcc +; GISEL-NEXT: v_ashrrev_i32_e32 v20, 31, v7 +; GISEL-NEXT: v_xor_b32_e32 v0, v20, v4 +; GISEL-NEXT: v_xor_b32_e32 v1, v20, v5 +; GISEL-NEXT: v_xor_b32_e32 v2, v20, v6 +; GISEL-NEXT: v_sub_i32_e32 v6, vcc, v0, v20 +; GISEL-NEXT: v_xor_b32_e32 v3, v20, v7 +; GISEL-NEXT: v_subb_u32_e32 v7, vcc, v1, v20, vcc +; GISEL-NEXT: v_ashrrev_i32_e32 v21, 31, v15 +; GISEL-NEXT: v_subb_u32_e32 v10, vcc, v2, v20, vcc +; GISEL-NEXT: v_subb_u32_e32 v11, vcc, v3, v20, vcc +; GISEL-NEXT: v_xor_b32_e32 v0, v21, v12 +; GISEL-NEXT: v_xor_b32_e32 v1, v21, v13 +; GISEL-NEXT: v_sub_i32_e32 v22, vcc, v0, v21 +; GISEL-NEXT: v_xor_b32_e32 v2, v21, v14 +; GISEL-NEXT: v_subb_u32_e32 v23, vcc, v1, v21, vcc +; GISEL-NEXT: v_xor_b32_e32 v3, v21, v15 +; GISEL-NEXT: v_subb_u32_e32 v4, vcc, v2, v21, vcc +; GISEL-NEXT: v_subb_u32_e32 v5, vcc, v3, v21, vcc ; GISEL-NEXT: v_or_b32_e32 v0, v22, v4 ; GISEL-NEXT: v_or_b32_e32 v1, v23, v5 ; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1] @@ -751,30 +751,30 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_subb_u32_e32 v0, vcc, v31, v3, vcc ; GISEL-NEXT: v_subb_u32_e32 v0, vcc, v32, v16, vcc ; GISEL-NEXT: v_subb_u32_e32 v0, vcc, v33, v17, vcc -; GISEL-NEXT: v_lshl_b64 v[14:15], v[14:15], 1 ; GISEL-NEXT: v_add_i32_e32 v26, vcc, -1, v26 +; GISEL-NEXT: v_addc_u32_e32 v27, vcc, -1, v27, vcc +; GISEL-NEXT: v_addc_u32_e32 v28, vcc, -1, v28, vcc +; GISEL-NEXT: v_addc_u32_e32 v29, vcc, -1, v29, vcc ; GISEL-NEXT: v_lshrrev_b32_e32 v6, 31, v13 +; GISEL-NEXT: v_or_b32_e32 v13, v1, v11 ; GISEL-NEXT: v_ashrrev_i32_e32 v34, 31, v0 -; GISEL-NEXT: v_addc_u32_e32 v27, vcc, -1, v27, vcc +; GISEL-NEXT: v_or_b32_e32 v0, v26, v28 +; GISEL-NEXT: v_or_b32_e32 v1, v27, v29 +; GISEL-NEXT: v_lshl_b64 v[14:15], v[14:15], 1 +; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1] +; GISEL-NEXT: v_and_b32_e32 v0, v34, v22 +; GISEL-NEXT: v_and_b32_e32 v1, v34, v23 +; GISEL-NEXT: v_sub_i32_e64 v10, s[4:5], v2, v0 ; GISEL-NEXT: v_or_b32_e32 v14, v14, v6 ; GISEL-NEXT: v_and_b32_e32 v6, 1, v34 -; GISEL-NEXT: v_addc_u32_e32 v28, vcc, -1, v28, vcc -; GISEL-NEXT: v_or_b32_e32 v13, v1, v11 +; GISEL-NEXT: v_subb_u32_e64 v11, s[4:5], v3, v1, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v0, v34, v4 +; GISEL-NEXT: v_and_b32_e32 v2, v34, v5 +; GISEL-NEXT: v_subb_u32_e64 v16, s[4:5], v16, v0, s[4:5] ; GISEL-NEXT: v_mov_b32_e32 v0, v6 -; GISEL-NEXT: v_addc_u32_e32 v29, vcc, -1, v29, vcc ; GISEL-NEXT: v_mov_b32_e32 v1, v7 -; GISEL-NEXT: v_and_b32_e32 v6, v34, v22 -; GISEL-NEXT: v_or_b32_e32 v10, v26, v28 -; GISEL-NEXT: v_or_b32_e32 v11, v27, v29 -; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[10:11] -; GISEL-NEXT: v_and_b32_e32 v11, v34, v23 -; GISEL-NEXT: v_sub_i32_e64 v10, s[4:5], v2, v6 -; GISEL-NEXT: v_and_b32_e32 v35, v34, v4 -; GISEL-NEXT: v_subb_u32_e64 v11, s[4:5], v3, v11, s[4:5] -; GISEL-NEXT: v_and_b32_e32 v34, v34, v5 ; GISEL-NEXT: s_or_b64 s[8:9], vcc, s[8:9] -; GISEL-NEXT: v_subb_u32_e64 v16, vcc, v16, v35, s[4:5] -; GISEL-NEXT: v_subb_u32_e32 v17, vcc, v17, v34, vcc +; GISEL-NEXT: v_subb_u32_e64 v17, vcc, v17, v2, s[4:5] ; GISEL-NEXT: s_andn2_b64 exec, exec, s[8:9] ; GISEL-NEXT: s_cbranch_execnz .LBB0_9 ; GISEL-NEXT: ; %bb.10: ; %Flow @@ -790,14 +790,14 @@ define <2 x i128> @v_sdiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: .LBB0_12: ; %Flow12 ; GISEL-NEXT: s_or_b64 exec, exec, s[6:7] ; GISEL-NEXT: v_xor_b32_e32 v3, v25, v24 -; GISEL-NEXT: v_xor_b32_e32 v0, v20, v3 -; GISEL-NEXT: v_xor_b32_e32 v1, v21, v3 +; GISEL-NEXT: v_xor_b32_e32 v0, v18, v3 +; GISEL-NEXT: v_xor_b32_e32 v1, v19, v3 ; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v3 ; GISEL-NEXT: v_xor_b32_e32 v2, v8, v3 ; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc ; GISEL-NEXT: v_xor_b32_e32 v4, v9, v3 ; GISEL-NEXT: v_subb_u32_e32 v2, vcc, v2, v3, vcc -; GISEL-NEXT: v_xor_b32_e32 v7, v19, v18 +; GISEL-NEXT: v_xor_b32_e32 v7, v21, v20 ; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v4, v3, vcc ; GISEL-NEXT: v_xor_b32_e32 v4, v12, v7 ; GISEL-NEXT: v_xor_b32_e32 v5, v13, v7 @@ -932,8 +932,8 @@ define <2 x i128> @v_udiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: s_xor_b64 s[10:11], s[4:5], -1 ; SDAG-NEXT: v_cndmask_b32_e64 v3, v19, 0, s[4:5] ; SDAG-NEXT: s_movk_i32 s8, 0x7f -; SDAG-NEXT: v_cndmask_b32_e64 v2, v18, 0, s[4:5] ; SDAG-NEXT: s_and_b64 s[10:11], s[10:11], s[6:7] +; SDAG-NEXT: v_cndmask_b32_e64 v2, v18, 0, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v16, v1, 0, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v17, v0, 0, s[4:5] ; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[10:11] @@ -975,68 +975,68 @@ define <2 x i128> @v_udiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_subrev_i32_e32 v20, vcc, 64, v26 ; SDAG-NEXT: v_or_b32_e32 v23, v21, v23 ; SDAG-NEXT: v_lshr_b64 v[20:21], v[18:19], v20 -; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v26 ; SDAG-NEXT: v_lshr_b64 v[18:19], v[18:19], v26 +; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v26 ; SDAG-NEXT: v_cndmask_b32_e32 v21, v21, v23, vcc -; SDAG-NEXT: v_cndmask_b32_e64 v23, v21, v1, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e32 v1, v20, v22, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v19, 0, v19, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v18, 0, v18, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v20, v20, v22, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v23, 0, v19, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v22, 0, v18, vcc ; SDAG-NEXT: v_add_i32_e32 v30, vcc, -1, v8 ; SDAG-NEXT: v_addc_u32_e32 v31, vcc, -1, v9, vcc ; SDAG-NEXT: v_addc_u32_e32 v32, vcc, -1, v10, vcc -; SDAG-NEXT: v_cndmask_b32_e64 v22, v1, v0, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v1, v21, v1, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v0, v20, v0, s[4:5] ; SDAG-NEXT: v_addc_u32_e32 v33, vcc, -1, v11, vcc -; SDAG-NEXT: v_mov_b32_e32 v0, 0 -; SDAG-NEXT: v_mov_b32_e32 v1, 0 -; SDAG-NEXT: s_mov_b64 s[4:5], 0 +; SDAG-NEXT: v_mov_b32_e32 v18, 0 +; SDAG-NEXT: v_mov_b32_e32 v19, 0 +; SDAG-NEXT: s_mov_b64 s[10:11], 0 ; SDAG-NEXT: v_mov_b32_e32 v24, 0 ; SDAG-NEXT: v_mov_b32_e32 v25, 0 ; SDAG-NEXT: v_mov_b32_e32 v21, 0 ; SDAG-NEXT: .LBB2_3: ; %udiv-do-while3 ; SDAG-NEXT: ; =>This Inner Loop Header: Depth=1 -; SDAG-NEXT: v_lshrrev_b32_e32 v20, 31, v17 -; SDAG-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 -; SDAG-NEXT: v_lshl_b64 v[18:19], v[18:19], 1 -; SDAG-NEXT: v_or_b32_e32 v16, v24, v16 -; SDAG-NEXT: v_lshrrev_b32_e32 v24, 31, v23 ; SDAG-NEXT: v_lshl_b64 v[22:23], v[22:23], 1 -; SDAG-NEXT: v_or_b32_e32 v18, v18, v24 -; SDAG-NEXT: v_lshrrev_b32_e32 v24, 31, v3 -; SDAG-NEXT: v_or_b32_e32 v22, v22, v24 -; SDAG-NEXT: v_sub_i32_e32 v24, vcc, v30, v22 -; SDAG-NEXT: v_subb_u32_e32 v24, vcc, v31, v23, vcc -; SDAG-NEXT: v_subb_u32_e32 v24, vcc, v32, v18, vcc -; SDAG-NEXT: v_subb_u32_e32 v24, vcc, v33, v19, vcc -; SDAG-NEXT: v_ashrrev_i32_e32 v34, 31, v24 -; SDAG-NEXT: v_and_b32_e32 v24, v34, v8 -; SDAG-NEXT: v_sub_i32_e32 v22, vcc, v22, v24 -; SDAG-NEXT: v_and_b32_e32 v24, v34, v9 -; SDAG-NEXT: v_subb_u32_e32 v23, vcc, v23, v24, vcc -; SDAG-NEXT: v_and_b32_e32 v24, v34, v10 -; SDAG-NEXT: v_subb_u32_e32 v18, vcc, v18, v24, vcc -; SDAG-NEXT: v_and_b32_e32 v24, v34, v11 -; SDAG-NEXT: v_subb_u32_e32 v19, vcc, v19, v24, vcc +; SDAG-NEXT: v_lshrrev_b32_e32 v20, 31, v1 +; SDAG-NEXT: v_lshl_b64 v[0:1], v[0:1], 1 +; SDAG-NEXT: v_or_b32_e32 v20, v22, v20 +; SDAG-NEXT: v_lshrrev_b32_e32 v22, 31, v3 +; SDAG-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 +; SDAG-NEXT: v_or_b32_e32 v0, v0, v22 +; SDAG-NEXT: v_lshrrev_b32_e32 v22, 31, v17 +; SDAG-NEXT: v_or_b32_e32 v2, v2, v22 +; SDAG-NEXT: v_sub_i32_e64 v22, s[4:5], v30, v0 +; SDAG-NEXT: v_subb_u32_e64 v22, s[4:5], v31, v1, s[4:5] +; SDAG-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 +; SDAG-NEXT: v_subb_u32_e64 v22, s[4:5], v32, v20, s[4:5] ; SDAG-NEXT: v_add_i32_e32 v26, vcc, -1, v26 +; SDAG-NEXT: v_subb_u32_e64 v22, s[4:5], v33, v23, s[4:5] ; SDAG-NEXT: v_addc_u32_e32 v27, vcc, -1, v27, vcc +; SDAG-NEXT: v_or_b32_e32 v16, v24, v16 +; SDAG-NEXT: v_ashrrev_i32_e32 v24, 31, v22 ; SDAG-NEXT: v_addc_u32_e32 v28, vcc, -1, v28, vcc +; SDAG-NEXT: v_and_b32_e32 v22, v24, v8 ; SDAG-NEXT: v_addc_u32_e32 v29, vcc, -1, v29, vcc ; SDAG-NEXT: v_or_b32_e32 v17, v25, v17 -; SDAG-NEXT: v_or_b32_e32 v24, v26, v28 -; SDAG-NEXT: v_or_b32_e32 v25, v27, v29 -; SDAG-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 -; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[24:25] -; SDAG-NEXT: v_or_b32_e32 v2, v2, v20 -; SDAG-NEXT: v_and_b32_e32 v20, 1, v34 +; SDAG-NEXT: v_and_b32_e32 v25, v24, v9 +; SDAG-NEXT: v_sub_i32_e64 v0, s[4:5], v0, v22 +; SDAG-NEXT: v_or_b32_e32 v34, v26, v28 +; SDAG-NEXT: v_or_b32_e32 v35, v27, v29 +; SDAG-NEXT: v_subb_u32_e64 v1, s[4:5], v1, v25, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v22, v24, v10 +; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[34:35] +; SDAG-NEXT: v_and_b32_e32 v25, v24, v11 +; SDAG-NEXT: v_subb_u32_e64 v22, s[4:5], v20, v22, s[4:5] +; SDAG-NEXT: v_subb_u32_e64 v23, s[4:5], v23, v25, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v20, 1, v24 ; SDAG-NEXT: v_mov_b32_e32 v25, v21 -; SDAG-NEXT: v_or_b32_e32 v3, v1, v3 -; SDAG-NEXT: v_or_b32_e32 v2, v0, v2 -; SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5] +; SDAG-NEXT: v_or_b32_e32 v3, v19, v3 +; SDAG-NEXT: v_or_b32_e32 v2, v18, v2 +; SDAG-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; SDAG-NEXT: v_mov_b32_e32 v24, v20 -; SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5] +; SDAG-NEXT: s_andn2_b64 exec, exec, s[10:11] ; SDAG-NEXT: s_cbranch_execnz .LBB2_3 ; SDAG-NEXT: ; %bb.4: ; %Flow13 -; SDAG-NEXT: s_or_b64 exec, exec, s[4:5] +; SDAG-NEXT: s_or_b64 exec, exec, s[10:11] ; SDAG-NEXT: .LBB2_5: ; %Flow14 ; SDAG-NEXT: s_or_b64 exec, exec, s[8:9] ; SDAG-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 @@ -1281,10 +1281,10 @@ define <2 x i128> @v_udiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: s_or_b64 s[6:7], s[4:5], s[6:7] ; GISEL-NEXT: s_mov_b64 s[12:13], 0 ; GISEL-NEXT: v_cndmask_b32_e64 v18, v0, 0, s[4:5] -; GISEL-NEXT: v_cndmask_b32_e64 v2, v16, 0, s[4:5] -; GISEL-NEXT: v_cndmask_b32_e64 v3, v17, 0, s[4:5] ; GISEL-NEXT: s_xor_b64 s[8:9], s[6:7], s[10:11] ; GISEL-NEXT: v_cndmask_b32_e64 v19, v1, 0, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v2, v16, 0, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v3, v17, 0, s[4:5] ; GISEL-NEXT: s_and_saveexec_b64 s[6:7], s[8:9] ; GISEL-NEXT: s_cbranch_execz .LBB2_6 ; GISEL-NEXT: ; %bb.1: ; %udiv-bb15 @@ -1351,40 +1351,40 @@ define <2 x i128> @v_udiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_mov_b32_e32 v20, s10 ; GISEL-NEXT: .LBB2_3: ; %udiv-do-while3 ; GISEL-NEXT: ; =>This Inner Loop Header: Depth=1 -; GISEL-NEXT: v_lshl_b64 v[20:21], v[22:23], 1 -; GISEL-NEXT: v_lshrrev_b32_e32 v0, 31, v23 -; GISEL-NEXT: v_or_b32_e32 v22, v18, v20 -; GISEL-NEXT: v_or_b32_e32 v23, v19, v21 -; GISEL-NEXT: v_lshl_b64 v[18:19], v[24:25], 1 -; GISEL-NEXT: v_lshrrev_b32_e32 v20, 31, v17 -; GISEL-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 -; GISEL-NEXT: v_or_b32_e32 v18, v18, v20 -; GISEL-NEXT: v_lshrrev_b32_e32 v20, 31, v3 -; GISEL-NEXT: v_or_b32_e32 v16, v16, v20 -; GISEL-NEXT: v_sub_i32_e32 v20, vcc, v30, v16 -; GISEL-NEXT: v_subb_u32_e32 v20, vcc, v31, v17, vcc -; GISEL-NEXT: v_subb_u32_e32 v20, vcc, v32, v18, vcc -; GISEL-NEXT: v_subb_u32_e32 v20, vcc, v33, v19, vcc -; GISEL-NEXT: v_ashrrev_i32_e32 v20, 31, v20 -; GISEL-NEXT: v_and_b32_e32 v21, v20, v8 -; GISEL-NEXT: v_and_b32_e32 v24, v20, v9 -; GISEL-NEXT: v_sub_i32_e32 v16, vcc, v16, v21 -; GISEL-NEXT: v_subb_u32_e32 v17, vcc, v17, v24, vcc -; GISEL-NEXT: v_and_b32_e32 v21, v20, v10 -; GISEL-NEXT: v_and_b32_e32 v25, v20, v11 -; GISEL-NEXT: v_subb_u32_e32 v24, vcc, v18, v21, vcc -; GISEL-NEXT: v_subb_u32_e32 v25, vcc, v19, v25, vcc ; GISEL-NEXT: v_add_i32_e32 v26, vcc, -1, v26 ; GISEL-NEXT: v_addc_u32_e32 v27, vcc, -1, v27, vcc ; GISEL-NEXT: v_addc_u32_e32 v28, vcc, -1, v28, vcc ; GISEL-NEXT: v_addc_u32_e32 v29, vcc, -1, v29, vcc -; GISEL-NEXT: v_or_b32_e32 v18, v26, v28 -; GISEL-NEXT: v_or_b32_e32 v19, v27, v29 +; GISEL-NEXT: v_or_b32_e32 v20, v26, v28 +; GISEL-NEXT: v_or_b32_e32 v21, v27, v29 +; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[20:21] +; GISEL-NEXT: v_lshl_b64 v[20:21], v[24:25], 1 +; GISEL-NEXT: v_lshrrev_b32_e32 v0, 31, v17 +; GISEL-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 +; GISEL-NEXT: v_or_b32_e32 v0, v20, v0 +; GISEL-NEXT: v_lshrrev_b32_e32 v20, 31, v3 +; GISEL-NEXT: v_or_b32_e32 v16, v16, v20 +; GISEL-NEXT: v_lshrrev_b32_e32 v20, 31, v23 +; GISEL-NEXT: v_lshl_b64 v[22:23], v[22:23], 1 ; GISEL-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 -; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[18:19] -; GISEL-NEXT: v_or_b32_e32 v2, v2, v0 -; GISEL-NEXT: v_and_b32_e32 v0, 1, v20 +; GISEL-NEXT: v_or_b32_e32 v22, v18, v22 +; GISEL-NEXT: v_sub_i32_e64 v18, s[4:5], v30, v16 +; GISEL-NEXT: v_subb_u32_e64 v18, s[4:5], v31, v17, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v18, s[4:5], v32, v0, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v18, s[4:5], v33, v21, s[4:5] +; GISEL-NEXT: v_ashrrev_i32_e32 v18, 31, v18 +; GISEL-NEXT: v_or_b32_e32 v23, v19, v23 +; GISEL-NEXT: v_and_b32_e32 v19, v18, v8 +; GISEL-NEXT: v_or_b32_e32 v2, v2, v20 +; GISEL-NEXT: v_and_b32_e32 v20, v18, v9 +; GISEL-NEXT: v_sub_i32_e64 v16, s[4:5], v16, v19 +; GISEL-NEXT: v_subb_u32_e64 v17, s[4:5], v17, v20, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v19, v18, v10 +; GISEL-NEXT: v_and_b32_e32 v20, v18, v11 +; GISEL-NEXT: v_subb_u32_e64 v24, s[4:5], v0, v19, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v0, 1, v18 ; GISEL-NEXT: v_mov_b32_e32 v19, v1 +; GISEL-NEXT: v_subb_u32_e64 v25, s[4:5], v21, v20, s[4:5] ; GISEL-NEXT: s_or_b64 s[8:9], vcc, s[8:9] ; GISEL-NEXT: v_mov_b32_e32 v18, v0 ; GISEL-NEXT: s_andn2_b64 exec, exec, s[8:9] @@ -1550,14 +1550,14 @@ define <2 x i128> @v_udiv_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_and_b32_e32 v4, v30, v12 ; GISEL-NEXT: v_or_b32_e32 v6, v24, v16 ; GISEL-NEXT: v_or_b32_e32 v7, v25, v17 +; GISEL-NEXT: v_and_b32_e32 v31, v30, v13 ; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[6:7] -; GISEL-NEXT: v_and_b32_e32 v7, v30, v13 ; GISEL-NEXT: v_sub_i32_e64 v6, s[4:5], v22, v4 -; GISEL-NEXT: v_and_b32_e32 v31, v30, v14 -; GISEL-NEXT: v_subb_u32_e64 v7, s[4:5], v23, v7, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v32, v30, v14 +; GISEL-NEXT: v_subb_u32_e64 v7, s[4:5], v23, v31, s[4:5] ; GISEL-NEXT: v_and_b32_e32 v30, v30, v15 ; GISEL-NEXT: s_or_b64 s[8:9], vcc, s[8:9] -; GISEL-NEXT: v_subb_u32_e64 v10, vcc, v10, v31, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v10, vcc, v10, v32, s[4:5] ; GISEL-NEXT: v_subb_u32_e32 v11, vcc, v11, v30, vcc ; GISEL-NEXT: s_andn2_b64 exec, exec, s[8:9] ; GISEL-NEXT: s_cbranch_execnz .LBB2_9 @@ -1624,7 +1624,6 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-LABEL: v_srem_v2i128_vv: ; SDAG: ; %bb.0: ; %_udiv-special-cases_udiv-special-cases ; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SDAG-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill ; SDAG-NEXT: v_ashrrev_i32_e32 v28, 31, v3 ; SDAG-NEXT: v_xor_b32_e32 v0, v0, v28 ; SDAG-NEXT: v_xor_b32_e32 v1, v1, v28 @@ -1698,8 +1697,8 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: s_xor_b64 s[10:11], s[4:5], -1 ; SDAG-NEXT: v_cndmask_b32_e64 v11, v3, 0, s[4:5] ; SDAG-NEXT: s_movk_i32 s8, 0x7f -; SDAG-NEXT: v_cndmask_b32_e64 v10, v2, 0, s[4:5] ; SDAG-NEXT: s_and_b64 s[10:11], s[10:11], s[6:7] +; SDAG-NEXT: v_cndmask_b32_e64 v10, v2, 0, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v35, v1, 0, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v37, v0, 0, s[4:5] ; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[10:11] @@ -1755,54 +1754,54 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_addc_u32_e32 v39, vcc, -1, v9, vcc ; SDAG-NEXT: v_mov_b32_e32 v22, 0 ; SDAG-NEXT: v_mov_b32_e32 v23, 0 -; SDAG-NEXT: s_mov_b64 s[4:5], 0 +; SDAG-NEXT: s_mov_b64 s[10:11], 0 ; SDAG-NEXT: v_mov_b32_e32 v26, 0 ; SDAG-NEXT: v_mov_b32_e32 v27, 0 ; SDAG-NEXT: v_mov_b32_e32 v19, 0 ; SDAG-NEXT: .LBB4_3: ; %udiv-do-while3 ; SDAG-NEXT: ; =>This Inner Loop Header: Depth=1 -; SDAG-NEXT: v_lshl_b64 v[48:49], v[16:17], 1 ; SDAG-NEXT: v_lshl_b64 v[24:25], v[24:25], 1 -; SDAG-NEXT: v_or_b32_e32 v16, v26, v48 -; SDAG-NEXT: v_lshrrev_b32_e32 v26, 31, v21 +; SDAG-NEXT: v_lshrrev_b32_e32 v18, 31, v21 ; SDAG-NEXT: v_lshl_b64 v[20:21], v[20:21], 1 -; SDAG-NEXT: v_or_b32_e32 v24, v24, v26 -; SDAG-NEXT: v_lshrrev_b32_e32 v26, 31, v11 -; SDAG-NEXT: v_or_b32_e32 v20, v20, v26 -; SDAG-NEXT: v_sub_i32_e32 v26, vcc, v36, v20 -; SDAG-NEXT: v_subb_u32_e32 v26, vcc, v37, v21, vcc -; SDAG-NEXT: v_subb_u32_e32 v26, vcc, v38, v24, vcc -; SDAG-NEXT: v_subb_u32_e32 v26, vcc, v39, v25, vcc -; SDAG-NEXT: v_ashrrev_i32_e32 v48, 31, v26 -; SDAG-NEXT: v_lshrrev_b32_e32 v18, 31, v17 -; SDAG-NEXT: v_or_b32_e32 v17, v27, v49 -; SDAG-NEXT: v_and_b32_e32 v27, v48, v30 -; SDAG-NEXT: v_and_b32_e32 v26, v48, v29 -; SDAG-NEXT: v_sub_i32_e32 v20, vcc, v20, v27 -; SDAG-NEXT: v_subb_u32_e32 v21, vcc, v21, v26, vcc -; SDAG-NEXT: v_and_b32_e32 v27, v48, v8 -; SDAG-NEXT: v_and_b32_e32 v26, v48, v9 -; SDAG-NEXT: v_subb_u32_e32 v24, vcc, v24, v27, vcc -; SDAG-NEXT: v_subb_u32_e32 v25, vcc, v25, v26, vcc +; SDAG-NEXT: v_or_b32_e32 v18, v24, v18 +; SDAG-NEXT: v_lshrrev_b32_e32 v24, 31, v11 +; SDAG-NEXT: v_lshl_b64 v[10:11], v[10:11], 1 +; SDAG-NEXT: v_or_b32_e32 v20, v20, v24 +; SDAG-NEXT: v_lshrrev_b32_e32 v24, 31, v17 +; SDAG-NEXT: v_or_b32_e32 v10, v10, v24 +; SDAG-NEXT: v_sub_i32_e64 v24, s[4:5], v36, v20 +; SDAG-NEXT: v_subb_u32_e64 v24, s[4:5], v37, v21, s[4:5] +; SDAG-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 +; SDAG-NEXT: v_subb_u32_e64 v24, s[4:5], v38, v18, s[4:5] ; SDAG-NEXT: v_add_i32_e32 v32, vcc, -1, v32 +; SDAG-NEXT: v_subb_u32_e64 v24, s[4:5], v39, v25, s[4:5] ; SDAG-NEXT: v_addc_u32_e32 v33, vcc, -1, v33, vcc +; SDAG-NEXT: v_or_b32_e32 v16, v26, v16 +; SDAG-NEXT: v_ashrrev_i32_e32 v26, 31, v24 ; SDAG-NEXT: v_addc_u32_e32 v34, vcc, -1, v34, vcc +; SDAG-NEXT: v_and_b32_e32 v24, v26, v30 ; SDAG-NEXT: v_addc_u32_e32 v35, vcc, -1, v35, vcc -; SDAG-NEXT: v_or_b32_e32 v27, v33, v35 -; SDAG-NEXT: v_or_b32_e32 v26, v32, v34 -; SDAG-NEXT: v_lshl_b64 v[10:11], v[10:11], 1 -; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[26:27] -; SDAG-NEXT: v_or_b32_e32 v10, v10, v18 -; SDAG-NEXT: v_and_b32_e32 v18, 1, v48 +; SDAG-NEXT: v_or_b32_e32 v17, v27, v17 +; SDAG-NEXT: v_and_b32_e32 v27, v26, v29 +; SDAG-NEXT: v_sub_i32_e64 v20, s[4:5], v20, v24 +; SDAG-NEXT: v_or_b32_e32 v48, v32, v34 +; SDAG-NEXT: v_or_b32_e32 v49, v33, v35 +; SDAG-NEXT: v_subb_u32_e64 v21, s[4:5], v21, v27, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v24, v26, v8 +; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[48:49] +; SDAG-NEXT: v_and_b32_e32 v27, v26, v9 +; SDAG-NEXT: v_subb_u32_e64 v24, s[4:5], v18, v24, s[4:5] +; SDAG-NEXT: v_subb_u32_e64 v25, s[4:5], v25, v27, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v18, 1, v26 ; SDAG-NEXT: v_mov_b32_e32 v27, v19 ; SDAG-NEXT: v_or_b32_e32 v11, v23, v11 ; SDAG-NEXT: v_or_b32_e32 v10, v22, v10 -; SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5] +; SDAG-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; SDAG-NEXT: v_mov_b32_e32 v26, v18 -; SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5] +; SDAG-NEXT: s_andn2_b64 exec, exec, s[10:11] ; SDAG-NEXT: s_cbranch_execnz .LBB4_3 ; SDAG-NEXT: ; %bb.4: ; %Flow13 -; SDAG-NEXT: s_or_b64 exec, exec, s[4:5] +; SDAG-NEXT: s_or_b64 exec, exec, s[10:11] ; SDAG-NEXT: .LBB4_5: ; %Flow14 ; SDAG-NEXT: s_or_b64 exec, exec, s[8:9] ; SDAG-NEXT: v_lshl_b64 v[10:11], v[10:11], 1 @@ -1931,62 +1930,62 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_lshr_b64 v[18:19], v[6:7], v18 ; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v38 ; SDAG-NEXT: v_cndmask_b32_e32 v19, v19, v21, vcc -; SDAG-NEXT: v_cndmask_b32_e64 v25, v19, v5, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v21, v19, v5, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e32 v20, v18, v20, vcc ; SDAG-NEXT: v_lshr_b64 v[18:19], v[6:7], v38 -; SDAG-NEXT: v_cndmask_b32_e64 v24, v20, v4, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e32 v27, 0, v19, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v26, 0, v18, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v20, v20, v4, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e32 v25, 0, v19, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v24, 0, v18, vcc ; SDAG-NEXT: v_add_i32_e32 v50, vcc, -1, v36 ; SDAG-NEXT: v_addc_u32_e32 v51, vcc, -1, v33, vcc ; SDAG-NEXT: v_addc_u32_e32 v52, vcc, -1, v12, vcc ; SDAG-NEXT: v_addc_u32_e32 v53, vcc, -1, v13, vcc -; SDAG-NEXT: v_mov_b32_e32 v20, 0 -; SDAG-NEXT: v_mov_b32_e32 v21, 0 -; SDAG-NEXT: s_mov_b64 s[10:11], 0 ; SDAG-NEXT: v_mov_b32_e32 v22, 0 ; SDAG-NEXT: v_mov_b32_e32 v23, 0 +; SDAG-NEXT: s_mov_b64 s[10:11], 0 +; SDAG-NEXT: v_mov_b32_e32 v26, 0 +; SDAG-NEXT: v_mov_b32_e32 v27, 0 ; SDAG-NEXT: v_mov_b32_e32 v19, 0 ; SDAG-NEXT: .LBB4_9: ; %udiv-do-while ; SDAG-NEXT: ; =>This Inner Loop Header: Depth=1 -; SDAG-NEXT: v_lshrrev_b32_e32 v18, 31, v25 ; SDAG-NEXT: v_lshl_b64 v[24:25], v[24:25], 1 +; SDAG-NEXT: v_lshrrev_b32_e32 v18, 31, v21 +; SDAG-NEXT: v_lshl_b64 v[20:21], v[20:21], 1 +; SDAG-NEXT: v_or_b32_e32 v18, v24, v18 +; SDAG-NEXT: v_lshrrev_b32_e32 v24, 31, v17 +; SDAG-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 +; SDAG-NEXT: v_or_b32_e32 v20, v20, v24 +; SDAG-NEXT: v_lshrrev_b32_e32 v24, 31, v15 +; SDAG-NEXT: v_or_b32_e32 v16, v16, v24 +; SDAG-NEXT: v_sub_i32_e64 v24, s[4:5], v50, v20 +; SDAG-NEXT: v_subb_u32_e64 v24, s[4:5], v51, v21, s[4:5] +; SDAG-NEXT: v_lshl_b64 v[14:15], v[14:15], 1 +; SDAG-NEXT: v_subb_u32_e64 v24, s[4:5], v52, v18, s[4:5] ; SDAG-NEXT: v_add_i32_e32 v38, vcc, -1, v38 -; SDAG-NEXT: v_lshl_b64 v[26:27], v[26:27], 1 -; SDAG-NEXT: v_lshrrev_b32_e32 v54, 31, v17 +; SDAG-NEXT: v_subb_u32_e64 v24, s[4:5], v53, v25, s[4:5] ; SDAG-NEXT: v_addc_u32_e32 v39, vcc, -1, v39, vcc -; SDAG-NEXT: v_or_b32_e32 v24, v24, v54 +; SDAG-NEXT: v_or_b32_e32 v14, v26, v14 +; SDAG-NEXT: v_ashrrev_i32_e32 v26, 31, v24 ; SDAG-NEXT: v_addc_u32_e32 v48, vcc, -1, v48, vcc -; SDAG-NEXT: v_or_b32_e32 v26, v26, v18 -; SDAG-NEXT: v_sub_i32_e64 v18, s[4:5], v50, v24 +; SDAG-NEXT: v_or_b32_e32 v15, v27, v15 +; SDAG-NEXT: v_and_b32_e32 v27, v26, v36 ; SDAG-NEXT: v_addc_u32_e32 v49, vcc, -1, v49, vcc -; SDAG-NEXT: v_lshrrev_b32_e32 v55, 31, v15 -; SDAG-NEXT: v_lshl_b64 v[14:15], v[14:15], 1 -; SDAG-NEXT: v_subb_u32_e64 v18, vcc, v51, v25, s[4:5] -; SDAG-NEXT: v_subb_u32_e32 v18, vcc, v52, v26, vcc -; SDAG-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 -; SDAG-NEXT: v_or_b32_e32 v15, v23, v15 -; SDAG-NEXT: v_or_b32_e32 v14, v22, v14 -; SDAG-NEXT: v_or_b32_e32 v22, v38, v48 -; SDAG-NEXT: v_or_b32_e32 v23, v39, v49 -; SDAG-NEXT: v_subb_u32_e32 v18, vcc, v53, v27, vcc -; SDAG-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[22:23] -; SDAG-NEXT: v_ashrrev_i32_e32 v22, 31, v18 -; SDAG-NEXT: v_or_b32_e32 v16, v16, v55 -; SDAG-NEXT: v_and_b32_e32 v18, 1, v22 -; SDAG-NEXT: v_and_b32_e32 v54, v22, v13 -; SDAG-NEXT: v_and_b32_e32 v55, v22, v12 -; SDAG-NEXT: v_and_b32_e32 v40, v22, v33 -; SDAG-NEXT: v_and_b32_e32 v22, v22, v36 -; SDAG-NEXT: v_sub_i32_e32 v24, vcc, v24, v22 -; SDAG-NEXT: v_subb_u32_e32 v25, vcc, v25, v40, vcc -; SDAG-NEXT: v_mov_b32_e32 v23, v19 -; SDAG-NEXT: v_subb_u32_e32 v26, vcc, v26, v55, vcc -; SDAG-NEXT: v_or_b32_e32 v17, v21, v17 -; SDAG-NEXT: v_or_b32_e32 v16, v20, v16 -; SDAG-NEXT: s_or_b64 s[10:11], s[4:5], s[10:11] -; SDAG-NEXT: v_mov_b32_e32 v22, v18 -; SDAG-NEXT: v_subb_u32_e32 v27, vcc, v27, v54, vcc +; SDAG-NEXT: v_and_b32_e32 v24, v26, v33 +; SDAG-NEXT: v_sub_i32_e64 v20, s[4:5], v20, v27 +; SDAG-NEXT: v_or_b32_e32 v55, v39, v49 +; SDAG-NEXT: v_or_b32_e32 v54, v38, v48 +; SDAG-NEXT: v_subb_u32_e64 v21, s[4:5], v21, v24, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v24, v26, v12 +; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[54:55] +; SDAG-NEXT: v_and_b32_e32 v27, v26, v13 +; SDAG-NEXT: v_subb_u32_e64 v24, s[4:5], v18, v24, s[4:5] +; SDAG-NEXT: v_subb_u32_e64 v25, s[4:5], v25, v27, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v18, 1, v26 +; SDAG-NEXT: v_mov_b32_e32 v27, v19 +; SDAG-NEXT: v_or_b32_e32 v17, v23, v17 +; SDAG-NEXT: v_or_b32_e32 v16, v22, v16 +; SDAG-NEXT: s_or_b64 s[10:11], vcc, s[10:11] +; SDAG-NEXT: v_mov_b32_e32 v26, v18 ; SDAG-NEXT: s_andn2_b64 exec, exec, s[10:11] ; SDAG-NEXT: s_cbranch_execnz .LBB4_9 ; SDAG-NEXT: ; %bb.10: ; %Flow @@ -2001,7 +2000,6 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_or_b32_e32 v21, v18, v14 ; SDAG-NEXT: .LBB4_12: ; %Flow12 ; SDAG-NEXT: s_or_b64 exec, exec, s[6:7] -; SDAG-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload ; SDAG-NEXT: v_mul_lo_u32 v9, v37, v9 ; SDAG-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v37, v8, 0 ; SDAG-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v30, v37, 0 @@ -2065,7 +2063,6 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_xor_b32_e32 v7, v7, v34 ; SDAG-NEXT: v_subb_u32_e32 v6, vcc, v6, v32, vcc ; SDAG-NEXT: v_subb_u32_e32 v7, vcc, v7, v34, vcc -; SDAG-NEXT: s_waitcnt vmcnt(0) ; SDAG-NEXT: s_setpc_b64 s[30:31] ; ; GISEL-LABEL: v_srem_v2i128_vv: @@ -2118,9 +2115,9 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_min_u32_e32 v2, v3, v2 ; GISEL-NEXT: v_cndmask_b32_e64 v1, v2, v1, s[6:7] ; GISEL-NEXT: v_sub_i32_e64 v0, s[6:7], v0, v1 -; GISEL-NEXT: v_subb_u32_e64 v1, s[6:7], 0, 0, s[6:7] ; GISEL-NEXT: v_mov_b32_e32 v18, 0x7f ; GISEL-NEXT: v_mov_b32_e32 v19, 0 +; GISEL-NEXT: v_subb_u32_e64 v1, s[6:7], 0, 0, s[6:7] ; GISEL-NEXT: v_subb_u32_e64 v2, s[6:7], 0, 0, s[6:7] ; GISEL-NEXT: v_cmp_gt_u64_e64 s[8:9], v[0:1], v[18:19] ; GISEL-NEXT: v_subb_u32_e64 v3, s[6:7], 0, 0, s[6:7] @@ -2141,10 +2138,10 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: s_or_b64 s[6:7], s[4:5], s[6:7] ; GISEL-NEXT: s_mov_b64 s[12:13], 0 ; GISEL-NEXT: v_cndmask_b32_e64 v28, v10, 0, s[4:5] -; GISEL-NEXT: v_cndmask_b32_e64 v18, v8, 0, s[4:5] -; GISEL-NEXT: v_cndmask_b32_e64 v19, v9, 0, s[4:5] ; GISEL-NEXT: s_xor_b64 s[8:9], s[6:7], s[10:11] ; GISEL-NEXT: v_cndmask_b32_e64 v33, v11, 0, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v18, v8, 0, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v19, v9, 0, s[4:5] ; GISEL-NEXT: s_and_saveexec_b64 s[6:7], s[8:9] ; GISEL-NEXT: s_cbranch_execz .LBB4_6 ; GISEL-NEXT: ; %bb.1: ; %udiv-bb15 @@ -2211,39 +2208,39 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_mov_b32_e32 v3, s11 ; GISEL-NEXT: .LBB4_3: ; %udiv-do-while3 ; GISEL-NEXT: ; =>This Inner Loop Header: Depth=1 -; GISEL-NEXT: v_lshl_b64 v[2:3], v[19:20], 1 -; GISEL-NEXT: v_lshrrev_b32_e32 v23, 31, v20 -; GISEL-NEXT: v_or_b32_e32 v19, v0, v2 -; GISEL-NEXT: v_or_b32_e32 v20, v1, v3 -; GISEL-NEXT: v_lshl_b64 v[2:3], v[25:26], 1 -; GISEL-NEXT: v_lshrrev_b32_e32 v25, 31, v22 -; GISEL-NEXT: v_lshl_b64 v[0:1], v[27:28], 1 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v25 -; GISEL-NEXT: v_lshrrev_b32_e32 v27, 31, v26 -; GISEL-NEXT: v_sub_i32_e32 v25, vcc, v35, v2 -; GISEL-NEXT: v_or_b32_e32 v0, v0, v27 -; GISEL-NEXT: v_subb_u32_e32 v25, vcc, v36, v3, vcc -; GISEL-NEXT: v_subb_u32_e32 v25, vcc, v37, v0, vcc -; GISEL-NEXT: v_subb_u32_e32 v25, vcc, v38, v1, vcc -; GISEL-NEXT: v_ashrrev_i32_e32 v39, 31, v25 -; GISEL-NEXT: v_and_b32_e32 v25, v39, v31 -; GISEL-NEXT: v_and_b32_e32 v26, v39, v30 -; GISEL-NEXT: v_sub_i32_e32 v25, vcc, v2, v25 -; GISEL-NEXT: v_subb_u32_e32 v26, vcc, v3, v26, vcc -; GISEL-NEXT: v_and_b32_e32 v2, v39, v16 -; GISEL-NEXT: v_and_b32_e32 v3, v39, v17 -; GISEL-NEXT: v_subb_u32_e32 v27, vcc, v0, v2, vcc -; GISEL-NEXT: v_subb_u32_e32 v28, vcc, v1, v3, vcc ; GISEL-NEXT: v_add_i32_e32 v18, vcc, -1, v18 ; GISEL-NEXT: v_addc_u32_e32 v32, vcc, -1, v32, vcc ; GISEL-NEXT: v_addc_u32_e32 v33, vcc, -1, v33, vcc ; GISEL-NEXT: v_addc_u32_e32 v34, vcc, -1, v34, vcc +; GISEL-NEXT: v_or_b32_e32 v2, v18, v33 +; GISEL-NEXT: v_or_b32_e32 v3, v32, v34 +; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3] +; GISEL-NEXT: v_lshl_b64 v[2:3], v[27:28], 1 +; GISEL-NEXT: v_lshrrev_b32_e32 v23, 31, v26 +; GISEL-NEXT: v_lshl_b64 v[25:26], v[25:26], 1 +; GISEL-NEXT: v_or_b32_e32 v2, v2, v23 +; GISEL-NEXT: v_lshrrev_b32_e32 v23, 31, v22 +; GISEL-NEXT: v_or_b32_e32 v23, v25, v23 +; GISEL-NEXT: v_lshrrev_b32_e32 v25, 31, v20 +; GISEL-NEXT: v_lshl_b64 v[19:20], v[19:20], 1 ; GISEL-NEXT: v_lshl_b64 v[21:22], v[21:22], 1 -; GISEL-NEXT: v_or_b32_e32 v0, v18, v33 -; GISEL-NEXT: v_or_b32_e32 v1, v32, v34 -; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1] -; GISEL-NEXT: v_or_b32_e32 v21, v21, v23 -; GISEL-NEXT: v_and_b32_e32 v23, 1, v39 +; GISEL-NEXT: v_or_b32_e32 v19, v0, v19 +; GISEL-NEXT: v_sub_i32_e64 v0, s[4:5], v35, v23 +; GISEL-NEXT: v_subb_u32_e64 v0, s[4:5], v36, v26, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v0, s[4:5], v37, v2, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v0, s[4:5], v38, v3, s[4:5] +; GISEL-NEXT: v_ashrrev_i32_e32 v0, 31, v0 +; GISEL-NEXT: v_or_b32_e32 v20, v1, v20 +; GISEL-NEXT: v_and_b32_e32 v1, v0, v31 +; GISEL-NEXT: v_or_b32_e32 v21, v21, v25 +; GISEL-NEXT: v_and_b32_e32 v27, v0, v30 +; GISEL-NEXT: v_sub_i32_e64 v25, s[4:5], v23, v1 +; GISEL-NEXT: v_subb_u32_e64 v26, s[4:5], v26, v27, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v1, v0, v16 +; GISEL-NEXT: v_and_b32_e32 v23, v0, v17 +; GISEL-NEXT: v_subb_u32_e64 v27, s[4:5], v2, v1, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v28, s[4:5], v3, v23, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v23, 1, v0 ; GISEL-NEXT: v_mov_b32_e32 v0, v23 ; GISEL-NEXT: s_or_b64 s[8:9], vcc, s[8:9] ; GISEL-NEXT: v_mov_b32_e32 v1, v24 @@ -2401,42 +2398,42 @@ define <2 x i128> @v_srem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_mov_b32_e32 v3, s11 ; GISEL-NEXT: .LBB4_9: ; %udiv-do-while ; GISEL-NEXT: ; =>This Inner Loop Header: Depth=1 -; GISEL-NEXT: v_lshl_b64 v[2:3], v[14:15], 1 ; GISEL-NEXT: v_add_i32_e32 v36, vcc, -1, v36 -; GISEL-NEXT: v_lshrrev_b32_e32 v22, 31, v15 -; GISEL-NEXT: v_or_b32_e32 v14, v0, v2 -; GISEL-NEXT: v_or_b32_e32 v15, v1, v3 -; GISEL-NEXT: v_lshl_b64 v[0:1], v[24:25], 1 ; GISEL-NEXT: v_addc_u32_e32 v37, vcc, -1, v37, vcc -; GISEL-NEXT: v_lshrrev_b32_e32 v24, 31, v25 -; GISEL-NEXT: v_lshrrev_b32_e32 v25, 31, v21 -; GISEL-NEXT: v_lshl_b64 v[20:21], v[20:21], 1 ; GISEL-NEXT: v_addc_u32_e32 v38, vcc, -1, v38, vcc -; GISEL-NEXT: v_lshl_b64 v[2:3], v[26:27], 1 -; GISEL-NEXT: v_or_b32_e32 v0, v0, v25 ; GISEL-NEXT: v_addc_u32_e32 v39, vcc, -1, v39, vcc -; GISEL-NEXT: v_or_b32_e32 v20, v20, v22 -; GISEL-NEXT: v_sub_i32_e32 v22, vcc, v48, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v24 -; GISEL-NEXT: v_subb_u32_e32 v22, vcc, v49, v1, vcc -; GISEL-NEXT: v_subb_u32_e32 v22, vcc, v50, v2, vcc -; GISEL-NEXT: v_or_b32_e32 v24, v36, v38 -; GISEL-NEXT: v_or_b32_e32 v25, v37, v39 -; GISEL-NEXT: v_subb_u32_e32 v22, vcc, v51, v3, vcc -; GISEL-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[24:25] -; GISEL-NEXT: v_ashrrev_i32_e32 v24, 31, v22 -; GISEL-NEXT: v_and_b32_e32 v25, v24, v35 -; GISEL-NEXT: v_and_b32_e32 v22, 1, v24 -; GISEL-NEXT: v_and_b32_e32 v26, v24, v34 -; GISEL-NEXT: v_and_b32_e32 v27, v24, v12 -; GISEL-NEXT: v_and_b32_e32 v52, v24, v13 -; GISEL-NEXT: v_sub_i32_e32 v24, vcc, v0, v25 -; GISEL-NEXT: v_subb_u32_e32 v25, vcc, v1, v26, vcc +; GISEL-NEXT: v_or_b32_e32 v2, v36, v38 +; GISEL-NEXT: v_or_b32_e32 v3, v37, v39 +; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3] +; GISEL-NEXT: v_lshl_b64 v[2:3], v[26:27], 1 +; GISEL-NEXT: v_lshrrev_b32_e32 v22, 31, v25 +; GISEL-NEXT: v_lshl_b64 v[24:25], v[24:25], 1 +; GISEL-NEXT: v_or_b32_e32 v2, v2, v22 +; GISEL-NEXT: v_lshrrev_b32_e32 v22, 31, v21 +; GISEL-NEXT: v_or_b32_e32 v22, v24, v22 +; GISEL-NEXT: v_lshrrev_b32_e32 v24, 31, v15 +; GISEL-NEXT: v_lshl_b64 v[14:15], v[14:15], 1 +; GISEL-NEXT: v_lshl_b64 v[20:21], v[20:21], 1 +; GISEL-NEXT: v_or_b32_e32 v14, v0, v14 +; GISEL-NEXT: v_sub_i32_e64 v0, s[4:5], v48, v22 +; GISEL-NEXT: v_subb_u32_e64 v0, s[4:5], v49, v25, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v0, s[4:5], v50, v2, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v0, s[4:5], v51, v3, s[4:5] +; GISEL-NEXT: v_ashrrev_i32_e32 v0, 31, v0 +; GISEL-NEXT: v_or_b32_e32 v15, v1, v15 +; GISEL-NEXT: v_and_b32_e32 v1, v0, v35 +; GISEL-NEXT: v_or_b32_e32 v20, v20, v24 +; GISEL-NEXT: v_and_b32_e32 v26, v0, v34 +; GISEL-NEXT: v_sub_i32_e64 v24, s[4:5], v22, v1 +; GISEL-NEXT: v_subb_u32_e64 v25, s[4:5], v25, v26, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v1, v0, v12 +; GISEL-NEXT: v_and_b32_e32 v22, v0, v13 +; GISEL-NEXT: v_subb_u32_e64 v26, s[4:5], v2, v1, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v27, s[4:5], v3, v22, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v22, 1, v0 ; GISEL-NEXT: v_mov_b32_e32 v0, v22 -; GISEL-NEXT: v_subb_u32_e32 v26, vcc, v2, v27, vcc -; GISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[8:9] +; GISEL-NEXT: s_or_b64 s[8:9], vcc, s[8:9] ; GISEL-NEXT: v_mov_b32_e32 v1, v23 -; GISEL-NEXT: v_subb_u32_e32 v27, vcc, v3, v52, vcc ; GISEL-NEXT: s_andn2_b64 exec, exec, s[8:9] ; GISEL-NEXT: s_cbranch_execnz .LBB4_9 ; GISEL-NEXT: ; %bb.10: ; %Flow @@ -2562,8 +2559,8 @@ define <2 x i128> @v_urem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: s_xor_b64 s[10:11], s[4:5], -1 ; SDAG-NEXT: v_cndmask_b32_e64 v17, v3, 0, s[4:5] ; SDAG-NEXT: s_movk_i32 s8, 0x7f -; SDAG-NEXT: v_cndmask_b32_e64 v16, v2, 0, s[4:5] ; SDAG-NEXT: s_and_b64 s[10:11], s[10:11], s[6:7] +; SDAG-NEXT: v_cndmask_b32_e64 v16, v2, 0, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v32, v1, 0, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v33, v0, 0, s[4:5] ; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[10:11] @@ -2619,54 +2616,54 @@ define <2 x i128> @v_urem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_addc_u32_e32 v37, vcc, -1, v11, vcc ; SDAG-NEXT: v_mov_b32_e32 v24, 0 ; SDAG-NEXT: v_mov_b32_e32 v25, 0 -; SDAG-NEXT: s_mov_b64 s[4:5], 0 +; SDAG-NEXT: s_mov_b64 s[10:11], 0 ; SDAG-NEXT: v_mov_b32_e32 v28, 0 ; SDAG-NEXT: v_mov_b32_e32 v29, 0 ; SDAG-NEXT: v_mov_b32_e32 v21, 0 ; SDAG-NEXT: .LBB5_3: ; %udiv-do-while3 ; SDAG-NEXT: ; =>This Inner Loop Header: Depth=1 -; SDAG-NEXT: v_lshl_b64 v[38:39], v[18:19], 1 ; SDAG-NEXT: v_lshl_b64 v[26:27], v[26:27], 1 -; SDAG-NEXT: v_or_b32_e32 v18, v28, v38 -; SDAG-NEXT: v_lshrrev_b32_e32 v28, 31, v23 +; SDAG-NEXT: v_lshrrev_b32_e32 v20, 31, v23 ; SDAG-NEXT: v_lshl_b64 v[22:23], v[22:23], 1 -; SDAG-NEXT: v_or_b32_e32 v26, v26, v28 -; SDAG-NEXT: v_lshrrev_b32_e32 v28, 31, v17 -; SDAG-NEXT: v_or_b32_e32 v22, v22, v28 -; SDAG-NEXT: v_sub_i32_e32 v28, vcc, v34, v22 -; SDAG-NEXT: v_subb_u32_e32 v28, vcc, v35, v23, vcc -; SDAG-NEXT: v_subb_u32_e32 v28, vcc, v36, v26, vcc -; SDAG-NEXT: v_subb_u32_e32 v28, vcc, v37, v27, vcc -; SDAG-NEXT: v_ashrrev_i32_e32 v38, 31, v28 -; SDAG-NEXT: v_lshrrev_b32_e32 v20, 31, v19 -; SDAG-NEXT: v_or_b32_e32 v19, v29, v39 -; SDAG-NEXT: v_and_b32_e32 v29, v38, v8 -; SDAG-NEXT: v_and_b32_e32 v28, v38, v9 -; SDAG-NEXT: v_sub_i32_e32 v22, vcc, v22, v29 -; SDAG-NEXT: v_subb_u32_e32 v23, vcc, v23, v28, vcc -; SDAG-NEXT: v_and_b32_e32 v29, v38, v10 -; SDAG-NEXT: v_and_b32_e32 v28, v38, v11 -; SDAG-NEXT: v_subb_u32_e32 v26, vcc, v26, v29, vcc -; SDAG-NEXT: v_subb_u32_e32 v27, vcc, v27, v28, vcc +; SDAG-NEXT: v_or_b32_e32 v20, v26, v20 +; SDAG-NEXT: v_lshrrev_b32_e32 v26, 31, v17 +; SDAG-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 +; SDAG-NEXT: v_or_b32_e32 v22, v22, v26 +; SDAG-NEXT: v_lshrrev_b32_e32 v26, 31, v19 +; SDAG-NEXT: v_or_b32_e32 v16, v16, v26 +; SDAG-NEXT: v_sub_i32_e64 v26, s[4:5], v34, v22 +; SDAG-NEXT: v_subb_u32_e64 v26, s[4:5], v35, v23, s[4:5] +; SDAG-NEXT: v_lshl_b64 v[18:19], v[18:19], 1 +; SDAG-NEXT: v_subb_u32_e64 v26, s[4:5], v36, v20, s[4:5] ; SDAG-NEXT: v_add_i32_e32 v30, vcc, -1, v30 +; SDAG-NEXT: v_subb_u32_e64 v26, s[4:5], v37, v27, s[4:5] ; SDAG-NEXT: v_addc_u32_e32 v31, vcc, -1, v31, vcc +; SDAG-NEXT: v_or_b32_e32 v18, v28, v18 +; SDAG-NEXT: v_ashrrev_i32_e32 v28, 31, v26 ; SDAG-NEXT: v_addc_u32_e32 v32, vcc, -1, v32, vcc +; SDAG-NEXT: v_or_b32_e32 v19, v29, v19 +; SDAG-NEXT: v_and_b32_e32 v29, v28, v8 ; SDAG-NEXT: v_addc_u32_e32 v33, vcc, -1, v33, vcc -; SDAG-NEXT: v_or_b32_e32 v29, v31, v33 -; SDAG-NEXT: v_or_b32_e32 v28, v30, v32 -; SDAG-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 -; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[28:29] -; SDAG-NEXT: v_or_b32_e32 v16, v16, v20 -; SDAG-NEXT: v_and_b32_e32 v20, 1, v38 +; SDAG-NEXT: v_and_b32_e32 v26, v28, v9 +; SDAG-NEXT: v_sub_i32_e64 v22, s[4:5], v22, v29 +; SDAG-NEXT: v_or_b32_e32 v39, v31, v33 +; SDAG-NEXT: v_or_b32_e32 v38, v30, v32 +; SDAG-NEXT: v_subb_u32_e64 v23, s[4:5], v23, v26, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v26, v28, v10 +; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[38:39] +; SDAG-NEXT: v_and_b32_e32 v29, v28, v11 +; SDAG-NEXT: v_subb_u32_e64 v26, s[4:5], v20, v26, s[4:5] +; SDAG-NEXT: v_subb_u32_e64 v27, s[4:5], v27, v29, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v20, 1, v28 ; SDAG-NEXT: v_mov_b32_e32 v29, v21 ; SDAG-NEXT: v_or_b32_e32 v17, v25, v17 ; SDAG-NEXT: v_or_b32_e32 v16, v24, v16 -; SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5] +; SDAG-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; SDAG-NEXT: v_mov_b32_e32 v28, v20 -; SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5] +; SDAG-NEXT: s_andn2_b64 exec, exec, s[10:11] ; SDAG-NEXT: s_cbranch_execnz .LBB5_3 ; SDAG-NEXT: ; %bb.4: ; %Flow13 -; SDAG-NEXT: s_or_b64 exec, exec, s[4:5] +; SDAG-NEXT: s_or_b64 exec, exec, s[10:11] ; SDAG-NEXT: .LBB5_5: ; %Flow14 ; SDAG-NEXT: s_or_b64 exec, exec, s[8:9] ; SDAG-NEXT: v_lshl_b64 v[16:17], v[16:17], 1 @@ -2776,62 +2773,62 @@ define <2 x i128> @v_urem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; SDAG-NEXT: v_lshr_b64 v[22:23], v[6:7], v22 ; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v34 ; SDAG-NEXT: v_cndmask_b32_e32 v23, v23, v25, vcc -; SDAG-NEXT: v_cndmask_b32_e64 v27, v23, v5, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v25, v23, v5, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e32 v24, v22, v24, vcc ; SDAG-NEXT: v_lshr_b64 v[22:23], v[6:7], v34 -; SDAG-NEXT: v_cndmask_b32_e64 v26, v24, v4, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e32 v31, 0, v23, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v30, 0, v22, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v24, v24, v4, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e32 v29, 0, v23, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v28, 0, v22, vcc ; SDAG-NEXT: v_add_i32_e32 v38, vcc, -1, v12 ; SDAG-NEXT: v_addc_u32_e32 v39, vcc, -1, v13, vcc ; SDAG-NEXT: v_addc_u32_e32 v48, vcc, -1, v14, vcc ; SDAG-NEXT: v_addc_u32_e32 v49, vcc, -1, v15, vcc -; SDAG-NEXT: v_mov_b32_e32 v24, 0 -; SDAG-NEXT: v_mov_b32_e32 v25, 0 +; SDAG-NEXT: v_mov_b32_e32 v26, 0 +; SDAG-NEXT: v_mov_b32_e32 v27, 0 ; SDAG-NEXT: s_mov_b64 s[10:11], 0 -; SDAG-NEXT: v_mov_b32_e32 v28, 0 -; SDAG-NEXT: v_mov_b32_e32 v29, 0 +; SDAG-NEXT: v_mov_b32_e32 v30, 0 +; SDAG-NEXT: v_mov_b32_e32 v31, 0 ; SDAG-NEXT: v_mov_b32_e32 v23, 0 ; SDAG-NEXT: .LBB5_9: ; %udiv-do-while ; SDAG-NEXT: ; =>This Inner Loop Header: Depth=1 -; SDAG-NEXT: v_lshl_b64 v[50:51], v[18:19], 1 +; SDAG-NEXT: v_lshl_b64 v[28:29], v[28:29], 1 +; SDAG-NEXT: v_lshrrev_b32_e32 v22, 31, v25 +; SDAG-NEXT: v_lshl_b64 v[24:25], v[24:25], 1 +; SDAG-NEXT: v_or_b32_e32 v22, v28, v22 +; SDAG-NEXT: v_lshrrev_b32_e32 v28, 31, v21 +; SDAG-NEXT: v_lshl_b64 v[20:21], v[20:21], 1 +; SDAG-NEXT: v_or_b32_e32 v24, v24, v28 +; SDAG-NEXT: v_lshrrev_b32_e32 v28, 31, v19 +; SDAG-NEXT: v_or_b32_e32 v20, v20, v28 +; SDAG-NEXT: v_sub_i32_e64 v28, s[4:5], v38, v24 +; SDAG-NEXT: v_subb_u32_e64 v28, s[4:5], v39, v25, s[4:5] +; SDAG-NEXT: v_lshl_b64 v[18:19], v[18:19], 1 +; SDAG-NEXT: v_subb_u32_e64 v28, s[4:5], v48, v22, s[4:5] ; SDAG-NEXT: v_add_i32_e32 v34, vcc, -1, v34 -; SDAG-NEXT: v_or_b32_e32 v18, v28, v50 -; SDAG-NEXT: v_lshrrev_b32_e32 v28, 31, v27 -; SDAG-NEXT: v_lshl_b64 v[26:27], v[26:27], 1 +; SDAG-NEXT: v_subb_u32_e64 v28, s[4:5], v49, v29, s[4:5] ; SDAG-NEXT: v_addc_u32_e32 v35, vcc, -1, v35, vcc -; SDAG-NEXT: v_lshrrev_b32_e32 v22, 31, v19 -; SDAG-NEXT: v_or_b32_e32 v19, v29, v51 -; SDAG-NEXT: v_lshrrev_b32_e32 v29, 31, v21 -; SDAG-NEXT: v_lshl_b64 v[20:21], v[20:21], 1 +; SDAG-NEXT: v_or_b32_e32 v18, v30, v18 +; SDAG-NEXT: v_ashrrev_i32_e32 v30, 31, v28 ; SDAG-NEXT: v_addc_u32_e32 v36, vcc, -1, v36, vcc -; SDAG-NEXT: v_lshl_b64 v[30:31], v[30:31], 1 -; SDAG-NEXT: v_or_b32_e32 v26, v26, v29 +; SDAG-NEXT: v_and_b32_e32 v28, v30, v12 ; SDAG-NEXT: v_addc_u32_e32 v37, vcc, -1, v37, vcc -; SDAG-NEXT: v_or_b32_e32 v20, v20, v22 -; SDAG-NEXT: v_sub_i32_e32 v22, vcc, v38, v26 -; SDAG-NEXT: v_or_b32_e32 v30, v30, v28 -; SDAG-NEXT: v_subb_u32_e32 v22, vcc, v39, v27, vcc -; SDAG-NEXT: v_subb_u32_e32 v22, vcc, v48, v30, vcc -; SDAG-NEXT: v_or_b32_e32 v28, v34, v36 -; SDAG-NEXT: v_or_b32_e32 v29, v35, v37 -; SDAG-NEXT: v_subb_u32_e32 v22, vcc, v49, v31, vcc -; SDAG-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[28:29] -; SDAG-NEXT: v_ashrrev_i32_e32 v28, 31, v22 -; SDAG-NEXT: v_and_b32_e32 v50, v28, v12 -; SDAG-NEXT: v_and_b32_e32 v29, v28, v13 -; SDAG-NEXT: v_sub_i32_e32 v26, vcc, v26, v50 -; SDAG-NEXT: v_subb_u32_e32 v27, vcc, v27, v29, vcc -; SDAG-NEXT: v_and_b32_e32 v51, v28, v14 -; SDAG-NEXT: v_and_b32_e32 v22, 1, v28 -; SDAG-NEXT: v_and_b32_e32 v50, v28, v15 -; SDAG-NEXT: v_mov_b32_e32 v29, v23 -; SDAG-NEXT: v_subb_u32_e32 v30, vcc, v30, v51, vcc -; SDAG-NEXT: v_or_b32_e32 v21, v25, v21 -; SDAG-NEXT: v_or_b32_e32 v20, v24, v20 -; SDAG-NEXT: s_or_b64 s[10:11], s[4:5], s[10:11] -; SDAG-NEXT: v_mov_b32_e32 v28, v22 -; SDAG-NEXT: v_subb_u32_e32 v31, vcc, v31, v50, vcc +; SDAG-NEXT: v_or_b32_e32 v19, v31, v19 +; SDAG-NEXT: v_and_b32_e32 v31, v30, v13 +; SDAG-NEXT: v_sub_i32_e64 v24, s[4:5], v24, v28 +; SDAG-NEXT: v_or_b32_e32 v50, v34, v36 +; SDAG-NEXT: v_or_b32_e32 v51, v35, v37 +; SDAG-NEXT: v_subb_u32_e64 v25, s[4:5], v25, v31, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v28, v30, v14 +; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[50:51] +; SDAG-NEXT: v_and_b32_e32 v31, v30, v15 +; SDAG-NEXT: v_subb_u32_e64 v28, s[4:5], v22, v28, s[4:5] +; SDAG-NEXT: v_subb_u32_e64 v29, s[4:5], v29, v31, s[4:5] +; SDAG-NEXT: v_and_b32_e32 v22, 1, v30 +; SDAG-NEXT: v_mov_b32_e32 v31, v23 +; SDAG-NEXT: v_or_b32_e32 v21, v27, v21 +; SDAG-NEXT: v_or_b32_e32 v20, v26, v20 +; SDAG-NEXT: s_or_b64 s[10:11], vcc, s[10:11] +; SDAG-NEXT: v_mov_b32_e32 v30, v22 ; SDAG-NEXT: s_andn2_b64 exec, exec, s[10:11] ; SDAG-NEXT: s_cbranch_execnz .LBB5_9 ; SDAG-NEXT: ; %bb.10: ; %Flow @@ -2950,38 +2947,38 @@ define <2 x i128> @v_urem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: s_or_b64 s[6:7], s[4:5], s[6:7] ; GISEL-NEXT: s_mov_b64 s[12:13], 0 ; GISEL-NEXT: v_cndmask_b32_e64 v32, v0, 0, s[4:5] -; GISEL-NEXT: v_cndmask_b32_e64 v20, v2, 0, s[4:5] -; GISEL-NEXT: v_cndmask_b32_e64 v21, v3, 0, s[4:5] ; GISEL-NEXT: s_xor_b64 s[8:9], s[6:7], s[10:11] ; GISEL-NEXT: v_cndmask_b32_e64 v33, v1, 0, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v20, v2, 0, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v21, v3, 0, s[4:5] ; GISEL-NEXT: s_and_saveexec_b64 s[6:7], s[8:9] ; GISEL-NEXT: s_cbranch_execz .LBB5_6 ; GISEL-NEXT: ; %bb.1: ; %udiv-bb15 -; GISEL-NEXT: v_add_i32_e32 v29, vcc, 1, v16 -; GISEL-NEXT: v_addc_u32_e32 v30, vcc, 0, v17, vcc -; GISEL-NEXT: v_addc_u32_e32 v31, vcc, 0, v18, vcc +; GISEL-NEXT: v_add_i32_e32 v30, vcc, 1, v16 +; GISEL-NEXT: v_addc_u32_e32 v31, vcc, 0, v17, vcc +; GISEL-NEXT: v_addc_u32_e32 v32, vcc, 0, v18, vcc ; GISEL-NEXT: s_mov_b64 s[4:5], exec -; GISEL-NEXT: v_addc_u32_e32 v32, vcc, 0, v19, vcc +; GISEL-NEXT: v_addc_u32_e32 v33, vcc, 0, v19, vcc ; GISEL-NEXT: s_xor_b64 s[4:5], vcc, s[4:5] -; GISEL-NEXT: v_sub_i32_e32 v20, vcc, 0x7f, v16 +; GISEL-NEXT: v_sub_i32_e32 v24, vcc, 0x7f, v16 ; GISEL-NEXT: v_not_b32_e32 v16, 63 -; GISEL-NEXT: v_add_i32_e32 v23, vcc, v20, v16 -; GISEL-NEXT: v_sub_i32_e32 v16, vcc, 64, v20 +; GISEL-NEXT: v_add_i32_e32 v22, vcc, v24, v16 +; GISEL-NEXT: v_sub_i32_e32 v16, vcc, 64, v24 ; GISEL-NEXT: v_lshr_b64 v[16:17], v[0:1], v16 -; GISEL-NEXT: v_lshl_b64 v[18:19], v[2:3], v20 -; GISEL-NEXT: v_lshl_b64 v[21:22], v[0:1], v20 +; GISEL-NEXT: v_lshl_b64 v[18:19], v[2:3], v24 +; GISEL-NEXT: v_lshl_b64 v[20:21], v[0:1], v24 ; GISEL-NEXT: v_or_b32_e32 v18, v16, v18 ; GISEL-NEXT: v_or_b32_e32 v19, v17, v19 -; GISEL-NEXT: v_lshl_b64 v[16:17], v[0:1], v23 -; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v20 -; GISEL-NEXT: v_cndmask_b32_e32 v21, 0, v21, vcc -; GISEL-NEXT: v_cndmask_b32_e32 v22, 0, v22, vcc +; GISEL-NEXT: v_lshl_b64 v[16:17], v[0:1], v22 +; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v24 +; GISEL-NEXT: v_cndmask_b32_e32 v22, 0, v20, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v23, 0, v21, vcc ; GISEL-NEXT: v_cndmask_b32_e32 v16, v16, v18, vcc ; GISEL-NEXT: v_cndmask_b32_e32 v17, v17, v19, vcc -; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v20 +; GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v24 ; GISEL-NEXT: s_mov_b64 s[14:15], s[12:13] -; GISEL-NEXT: v_cndmask_b32_e32 v23, v16, v2, vcc -; GISEL-NEXT: v_cndmask_b32_e32 v24, v17, v3, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v20, v16, v2, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v21, v17, v3, vcc ; GISEL-NEXT: v_mov_b32_e32 v19, s15 ; GISEL-NEXT: v_mov_b32_e32 v17, s13 ; GISEL-NEXT: v_mov_b32_e32 v16, s12 @@ -2990,82 +2987,82 @@ define <2 x i128> @v_urem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: s_xor_b64 s[12:13], exec, s[8:9] ; GISEL-NEXT: s_cbranch_execz .LBB5_5 ; GISEL-NEXT: ; %bb.2: ; %udiv-preheader4 -; GISEL-NEXT: v_sub_i32_e32 v18, vcc, 64, v29 -; GISEL-NEXT: v_lshr_b64 v[16:17], v[0:1], v29 +; GISEL-NEXT: v_sub_i32_e32 v18, vcc, 64, v30 +; GISEL-NEXT: v_lshr_b64 v[16:17], v[0:1], v30 ; GISEL-NEXT: v_lshl_b64 v[18:19], v[2:3], v18 -; GISEL-NEXT: v_add_i32_e32 v20, vcc, 0xffffffc0, v29 -; GISEL-NEXT: v_lshr_b64 v[27:28], v[2:3], v29 +; GISEL-NEXT: v_add_i32_e32 v26, vcc, 0xffffffc0, v30 +; GISEL-NEXT: v_lshr_b64 v[24:25], v[2:3], v30 ; GISEL-NEXT: v_or_b32_e32 v18, v16, v18 ; GISEL-NEXT: v_or_b32_e32 v19, v17, v19 -; GISEL-NEXT: v_lshr_b64 v[16:17], v[2:3], v20 -; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v29 +; GISEL-NEXT: v_lshr_b64 v[16:17], v[2:3], v26 +; GISEL-NEXT: v_cmp_gt_u32_e32 vcc, 64, v30 ; GISEL-NEXT: s_mov_b64 s[8:9], 0 ; GISEL-NEXT: v_cndmask_b32_e32 v16, v16, v18, vcc ; GISEL-NEXT: v_cndmask_b32_e32 v17, v17, v19, vcc -; GISEL-NEXT: v_cndmask_b32_e32 v27, 0, v27, vcc -; GISEL-NEXT: v_cndmask_b32_e32 v28, 0, v28, vcc -; GISEL-NEXT: v_add_i32_e32 v33, vcc, -1, v8 -; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v29 -; GISEL-NEXT: v_addc_u32_e32 v34, vcc, -1, v9, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v28, 0, v24, vcc +; GISEL-NEXT: v_cndmask_b32_e32 v29, 0, v25, vcc +; GISEL-NEXT: v_add_i32_e32 v34, vcc, -1, v8 +; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v30 +; GISEL-NEXT: v_addc_u32_e32 v35, vcc, -1, v9, vcc ; GISEL-NEXT: s_mov_b64 s[10:11], s[8:9] -; GISEL-NEXT: v_mov_b32_e32 v19, 1 -; GISEL-NEXT: v_cndmask_b32_e64 v25, v16, v0, s[4:5] -; GISEL-NEXT: v_cndmask_b32_e64 v26, v17, v1, s[4:5] -; GISEL-NEXT: v_addc_u32_e32 v35, vcc, -1, v10, vcc +; GISEL-NEXT: v_cndmask_b32_e64 v26, v16, v0, s[4:5] +; GISEL-NEXT: v_cndmask_b32_e64 v27, v17, v1, s[4:5] +; GISEL-NEXT: v_addc_u32_e32 v36, vcc, -1, v10, vcc ; GISEL-NEXT: v_mov_b32_e32 v19, s11 -; GISEL-NEXT: v_addc_u32_e32 v36, vcc, -1, v11, vcc -; GISEL-NEXT: v_mov_b32_e32 v20, 0 +; GISEL-NEXT: v_addc_u32_e32 v37, vcc, -1, v11, vcc +; GISEL-NEXT: v_mov_b32_e32 v25, 0 ; GISEL-NEXT: v_mov_b32_e32 v17, s9 ; GISEL-NEXT: v_mov_b32_e32 v16, s8 +; GISEL-NEXT: v_mov_b32_e32 v24, 1 ; GISEL-NEXT: v_mov_b32_e32 v18, s10 ; GISEL-NEXT: .LBB5_3: ; %udiv-do-while3 ; GISEL-NEXT: ; =>This Inner Loop Header: Depth=1 -; GISEL-NEXT: v_lshl_b64 v[18:19], v[21:22], 1 -; GISEL-NEXT: v_lshrrev_b32_e32 v37, 31, v22 -; GISEL-NEXT: v_or_b32_e32 v21, v16, v18 -; GISEL-NEXT: v_or_b32_e32 v22, v17, v19 -; GISEL-NEXT: v_lshl_b64 v[18:19], v[25:26], 1 -; GISEL-NEXT: v_lshrrev_b32_e32 v25, 31, v24 -; GISEL-NEXT: v_lshl_b64 v[16:17], v[27:28], 1 -; GISEL-NEXT: v_or_b32_e32 v18, v18, v25 -; GISEL-NEXT: v_lshrrev_b32_e32 v27, 31, v26 -; GISEL-NEXT: v_sub_i32_e32 v25, vcc, v33, v18 -; GISEL-NEXT: v_or_b32_e32 v16, v16, v27 -; GISEL-NEXT: v_subb_u32_e32 v25, vcc, v34, v19, vcc -; GISEL-NEXT: v_subb_u32_e32 v25, vcc, v35, v16, vcc -; GISEL-NEXT: v_subb_u32_e32 v25, vcc, v36, v17, vcc -; GISEL-NEXT: v_ashrrev_i32_e32 v38, 31, v25 -; GISEL-NEXT: v_and_b32_e32 v25, v38, v8 -; GISEL-NEXT: v_and_b32_e32 v26, v38, v9 -; GISEL-NEXT: v_sub_i32_e32 v25, vcc, v18, v25 -; GISEL-NEXT: v_subb_u32_e32 v26, vcc, v19, v26, vcc -; GISEL-NEXT: v_and_b32_e32 v18, v38, v10 -; GISEL-NEXT: v_and_b32_e32 v19, v38, v11 -; GISEL-NEXT: v_subb_u32_e32 v27, vcc, v16, v18, vcc -; GISEL-NEXT: v_subb_u32_e32 v28, vcc, v17, v19, vcc -; GISEL-NEXT: v_add_i32_e32 v29, vcc, -1, v29 -; GISEL-NEXT: v_addc_u32_e32 v30, vcc, -1, v30, vcc +; GISEL-NEXT: v_add_i32_e32 v30, vcc, -1, v30 ; GISEL-NEXT: v_addc_u32_e32 v31, vcc, -1, v31, vcc ; GISEL-NEXT: v_addc_u32_e32 v32, vcc, -1, v32, vcc -; GISEL-NEXT: v_or_b32_e32 v16, v29, v31 -; GISEL-NEXT: v_or_b32_e32 v17, v30, v32 -; GISEL-NEXT: v_lshl_b64 v[23:24], v[23:24], 1 -; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[16:17] -; GISEL-NEXT: v_and_b32_e32 v19, 1, v38 -; GISEL-NEXT: v_mov_b32_e32 v16, v19 -; GISEL-NEXT: v_or_b32_e32 v23, v23, v37 +; GISEL-NEXT: v_addc_u32_e32 v33, vcc, -1, v33, vcc +; GISEL-NEXT: v_or_b32_e32 v18, v30, v32 +; GISEL-NEXT: v_or_b32_e32 v19, v31, v33 +; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[18:19] +; GISEL-NEXT: v_lshl_b64 v[18:19], v[28:29], 1 +; GISEL-NEXT: v_lshrrev_b32_e32 v24, 31, v27 +; GISEL-NEXT: v_lshl_b64 v[26:27], v[26:27], 1 +; GISEL-NEXT: v_or_b32_e32 v18, v18, v24 +; GISEL-NEXT: v_lshrrev_b32_e32 v24, 31, v21 +; GISEL-NEXT: v_or_b32_e32 v24, v26, v24 +; GISEL-NEXT: v_lshrrev_b32_e32 v26, 31, v23 +; GISEL-NEXT: v_lshl_b64 v[22:23], v[22:23], 1 +; GISEL-NEXT: v_lshl_b64 v[20:21], v[20:21], 1 +; GISEL-NEXT: v_or_b32_e32 v22, v16, v22 +; GISEL-NEXT: v_sub_i32_e64 v16, s[4:5], v34, v24 +; GISEL-NEXT: v_subb_u32_e64 v16, s[4:5], v35, v27, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v16, s[4:5], v36, v18, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v16, s[4:5], v37, v19, s[4:5] +; GISEL-NEXT: v_ashrrev_i32_e32 v16, 31, v16 +; GISEL-NEXT: v_or_b32_e32 v23, v17, v23 +; GISEL-NEXT: v_and_b32_e32 v17, v16, v8 +; GISEL-NEXT: v_or_b32_e32 v20, v20, v26 +; GISEL-NEXT: v_and_b32_e32 v28, v16, v9 +; GISEL-NEXT: v_sub_i32_e64 v26, s[4:5], v24, v17 +; GISEL-NEXT: v_subb_u32_e64 v27, s[4:5], v27, v28, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v17, v16, v10 +; GISEL-NEXT: v_and_b32_e32 v24, v16, v11 +; GISEL-NEXT: v_subb_u32_e64 v28, s[4:5], v18, v17, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v29, s[4:5], v19, v24, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v24, 1, v16 +; GISEL-NEXT: v_mov_b32_e32 v16, v24 ; GISEL-NEXT: s_or_b64 s[8:9], vcc, s[8:9] -; GISEL-NEXT: v_mov_b32_e32 v17, v20 +; GISEL-NEXT: v_mov_b32_e32 v17, v25 ; GISEL-NEXT: s_andn2_b64 exec, exec, s[8:9] ; GISEL-NEXT: s_cbranch_execnz .LBB5_3 ; GISEL-NEXT: ; %bb.4: ; %Flow13 ; GISEL-NEXT: s_or_b64 exec, exec, s[8:9] ; GISEL-NEXT: .LBB5_5: ; %Flow14 ; GISEL-NEXT: s_or_b64 exec, exec, s[12:13] -; GISEL-NEXT: v_lshl_b64 v[18:19], v[21:22], 1 -; GISEL-NEXT: v_lshl_b64 v[20:21], v[23:24], 1 -; GISEL-NEXT: v_lshrrev_b32_e32 v22, 31, v22 -; GISEL-NEXT: v_or_b32_e32 v20, v20, v22 +; GISEL-NEXT: v_lshl_b64 v[20:21], v[20:21], 1 +; GISEL-NEXT: v_lshl_b64 v[18:19], v[22:23], 1 +; GISEL-NEXT: v_lshrrev_b32_e32 v24, 31, v23 +; GISEL-NEXT: v_or_b32_e32 v20, v20, v24 ; GISEL-NEXT: v_or_b32_e32 v32, v16, v18 ; GISEL-NEXT: v_or_b32_e32 v33, v17, v19 ; GISEL-NEXT: .LBB5_6: ; %Flow16 @@ -3192,42 +3189,42 @@ define <2 x i128> @v_urem_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GISEL-NEXT: v_mov_b32_e32 v18, s10 ; GISEL-NEXT: .LBB5_9: ; %udiv-do-while ; GISEL-NEXT: ; =>This Inner Loop Header: Depth=1 -; GISEL-NEXT: v_lshl_b64 v[18:19], v[22:23], 1 ; GISEL-NEXT: v_add_i32_e32 v34, vcc, -1, v34 -; GISEL-NEXT: v_lshrrev_b32_e32 v26, 31, v23 -; GISEL-NEXT: v_or_b32_e32 v22, v16, v18 -; GISEL-NEXT: v_or_b32_e32 v23, v17, v19 -; GISEL-NEXT: v_lshl_b64 v[16:17], v[28:29], 1 ; GISEL-NEXT: v_addc_u32_e32 v35, vcc, -1, v35, vcc -; GISEL-NEXT: v_lshrrev_b32_e32 v28, 31, v29 -; GISEL-NEXT: v_lshrrev_b32_e32 v29, 31, v25 -; GISEL-NEXT: v_lshl_b64 v[24:25], v[24:25], 1 ; GISEL-NEXT: v_addc_u32_e32 v36, vcc, -1, v36, vcc -; GISEL-NEXT: v_lshl_b64 v[18:19], v[30:31], 1 -; GISEL-NEXT: v_or_b32_e32 v16, v16, v29 ; GISEL-NEXT: v_addc_u32_e32 v37, vcc, -1, v37, vcc -; GISEL-NEXT: v_or_b32_e32 v24, v24, v26 -; GISEL-NEXT: v_sub_i32_e32 v26, vcc, v38, v16 -; GISEL-NEXT: v_or_b32_e32 v18, v18, v28 -; GISEL-NEXT: v_subb_u32_e32 v26, vcc, v39, v17, vcc -; GISEL-NEXT: v_subb_u32_e32 v26, vcc, v48, v18, vcc -; GISEL-NEXT: v_or_b32_e32 v28, v34, v36 -; GISEL-NEXT: v_or_b32_e32 v29, v35, v37 -; GISEL-NEXT: v_subb_u32_e32 v26, vcc, v49, v19, vcc -; GISEL-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[28:29] -; GISEL-NEXT: v_ashrrev_i32_e32 v28, 31, v26 -; GISEL-NEXT: v_and_b32_e32 v29, v28, v12 -; GISEL-NEXT: v_and_b32_e32 v26, 1, v28 -; GISEL-NEXT: v_and_b32_e32 v30, v28, v13 -; GISEL-NEXT: v_and_b32_e32 v31, v28, v14 -; GISEL-NEXT: v_and_b32_e32 v50, v28, v15 -; GISEL-NEXT: v_sub_i32_e32 v28, vcc, v16, v29 -; GISEL-NEXT: v_subb_u32_e32 v29, vcc, v17, v30, vcc +; GISEL-NEXT: v_or_b32_e32 v18, v34, v36 +; GISEL-NEXT: v_or_b32_e32 v19, v35, v37 +; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[18:19] +; GISEL-NEXT: v_lshl_b64 v[18:19], v[30:31], 1 +; GISEL-NEXT: v_lshrrev_b32_e32 v26, 31, v29 +; GISEL-NEXT: v_lshl_b64 v[28:29], v[28:29], 1 +; GISEL-NEXT: v_or_b32_e32 v18, v18, v26 +; GISEL-NEXT: v_lshrrev_b32_e32 v26, 31, v25 +; GISEL-NEXT: v_or_b32_e32 v26, v28, v26 +; GISEL-NEXT: v_lshrrev_b32_e32 v28, 31, v23 +; GISEL-NEXT: v_lshl_b64 v[22:23], v[22:23], 1 +; GISEL-NEXT: v_lshl_b64 v[24:25], v[24:25], 1 +; GISEL-NEXT: v_or_b32_e32 v22, v16, v22 +; GISEL-NEXT: v_sub_i32_e64 v16, s[4:5], v38, v26 +; GISEL-NEXT: v_subb_u32_e64 v16, s[4:5], v39, v29, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v16, s[4:5], v48, v18, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v16, s[4:5], v49, v19, s[4:5] +; GISEL-NEXT: v_ashrrev_i32_e32 v16, 31, v16 +; GISEL-NEXT: v_or_b32_e32 v23, v17, v23 +; GISEL-NEXT: v_and_b32_e32 v17, v16, v12 +; GISEL-NEXT: v_or_b32_e32 v24, v24, v28 +; GISEL-NEXT: v_and_b32_e32 v30, v16, v13 +; GISEL-NEXT: v_sub_i32_e64 v28, s[4:5], v26, v17 +; GISEL-NEXT: v_subb_u32_e64 v29, s[4:5], v29, v30, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v17, v16, v14 +; GISEL-NEXT: v_and_b32_e32 v26, v16, v15 +; GISEL-NEXT: v_subb_u32_e64 v30, s[4:5], v18, v17, s[4:5] +; GISEL-NEXT: v_subb_u32_e64 v31, s[4:5], v19, v26, s[4:5] +; GISEL-NEXT: v_and_b32_e32 v26, 1, v16 ; GISEL-NEXT: v_mov_b32_e32 v16, v26 -; GISEL-NEXT: v_subb_u32_e32 v30, vcc, v18, v31, vcc -; GISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[8:9] +; GISEL-NEXT: s_or_b64 s[8:9], vcc, s[8:9] ; GISEL-NEXT: v_mov_b32_e32 v17, v27 -; GISEL-NEXT: v_subb_u32_e32 v31, vcc, v19, v50, vcc ; GISEL-NEXT: s_andn2_b64 exec, exec, s[8:9] ; GISEL-NEXT: s_cbranch_execnz .LBB5_9 ; GISEL-NEXT: ; %bb.10: ; %Flow diff --git a/llvm/test/CodeGen/AMDGPU/ds_permute_a_v.ll b/llvm/test/CodeGen/AMDGPU/ds_permute_a_v.ll index 5cd798d4f6db1..f924e7b706ce8 100644 --- a/llvm/test/CodeGen/AMDGPU/ds_permute_a_v.ll +++ b/llvm/test/CodeGen/AMDGPU/ds_permute_a_v.ll @@ -156,28 +156,31 @@ define i32 @ds_bpermute_b32_av_av_no_vgprs(ptr addrspace(3) %lds) #0 { ; CHECK-LABEL: ds_bpermute_b32_av_av_no_vgprs: ; CHECK: ; %bb.0: ; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; CHECK-NEXT: v_accvgpr_write_b32 a2, v40 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a3, v41 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a4, v42 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a5, v43 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a6, v44 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a7, v45 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a8, v46 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a9, v47 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a10, v56 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a11, v57 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a12, v58 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a13, v59 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a14, v60 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a15, v61 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a16, v62 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a17, v63 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a1, v40 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a2, v41 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a3, v42 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a4, v43 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a5, v44 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a6, v45 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a7, v46 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a8, v47 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a9, v56 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a10, v57 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a11, v58 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a12, v59 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a13, v60 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a14, v61 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a15, v62 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a16, v63 ; Reload Reuse ; CHECK-NEXT: ;;#ASMSTART -; CHECK-NEXT: ; def a0 +; CHECK-NEXT: ; def v0 ; CHECK-NEXT: ;;#ASMEND ; CHECK-NEXT: ;;#ASMSTART -; CHECK-NEXT: ; def a1 +; CHECK-NEXT: ; def v1 ; CHECK-NEXT: ;;#ASMEND +; CHECK-NEXT: ds_bpermute_b32 v0, v0, v1 +; CHECK-NEXT: s_waitcnt lgkmcnt(0) +; CHECK-NEXT: v_accvgpr_write_b32 a0, v0 ; CHECK-NEXT: ;;#ASMSTART ; CHECK-NEXT: ; def v[0:31] ; CHECK-NEXT: ;;#ASMEND @@ -185,25 +188,22 @@ define i32 @ds_bpermute_b32_av_av_no_vgprs(ptr addrspace(3) %lds) #0 { ; CHECK-NEXT: ; use v[0:31] ; CHECK-NEXT: ;;#ASMEND ; CHECK-NEXT: v_accvgpr_read_b32 v0, a0 -; CHECK-NEXT: v_accvgpr_read_b32 v1, a1 -; CHECK-NEXT: ds_bpermute_b32 v0, v0, v1 -; CHECK-NEXT: v_accvgpr_read_b32 v63, a17 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v62, a16 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v61, a15 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v60, a14 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v59, a13 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v58, a12 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v57, a11 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v56, a10 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v47, a9 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v46, a8 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v45, a7 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v44, a6 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v43, a5 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v42, a4 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v41, a3 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v40, a2 ; Reload Reuse -; CHECK-NEXT: s_waitcnt lgkmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v63, a16 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v62, a15 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v61, a14 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v60, a13 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v59, a12 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v58, a11 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v57, a10 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v56, a9 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v47, a8 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v46, a7 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v45, a6 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v44, a5 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v43, a4 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v42, a3 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v41, a2 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v40, a1 ; Reload Reuse ; CHECK-NEXT: s_setpc_b64 s[30:31] %gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %lds, i32 0, i32 10 %gep.1 = getelementptr inbounds [512 x i32], ptr addrspace(3) %lds, i32 0, i32 24 @@ -270,28 +270,31 @@ define i32 @ds_permute_b32_av_av_no_vgprs(ptr addrspace(3) %lds) #0 { ; CHECK-LABEL: ds_permute_b32_av_av_no_vgprs: ; CHECK: ; %bb.0: ; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; CHECK-NEXT: v_accvgpr_write_b32 a2, v40 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a3, v41 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a4, v42 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a5, v43 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a6, v44 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a7, v45 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a8, v46 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a9, v47 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a10, v56 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a11, v57 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a12, v58 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a13, v59 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a14, v60 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a15, v61 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a16, v62 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_write_b32 a17, v63 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a1, v40 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a2, v41 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a3, v42 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a4, v43 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a5, v44 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a6, v45 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a7, v46 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a8, v47 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a9, v56 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a10, v57 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a11, v58 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a12, v59 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a13, v60 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a14, v61 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a15, v62 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_write_b32 a16, v63 ; Reload Reuse ; CHECK-NEXT: ;;#ASMSTART -; CHECK-NEXT: ; def a0 +; CHECK-NEXT: ; def v0 ; CHECK-NEXT: ;;#ASMEND ; CHECK-NEXT: ;;#ASMSTART -; CHECK-NEXT: ; def a1 +; CHECK-NEXT: ; def v1 ; CHECK-NEXT: ;;#ASMEND +; CHECK-NEXT: ds_permute_b32 v0, v0, v1 +; CHECK-NEXT: s_waitcnt lgkmcnt(0) +; CHECK-NEXT: v_accvgpr_write_b32 a0, v0 ; CHECK-NEXT: ;;#ASMSTART ; CHECK-NEXT: ; def v[0:31] ; CHECK-NEXT: ;;#ASMEND @@ -299,25 +302,22 @@ define i32 @ds_permute_b32_av_av_no_vgprs(ptr addrspace(3) %lds) #0 { ; CHECK-NEXT: ; use v[0:31] ; CHECK-NEXT: ;;#ASMEND ; CHECK-NEXT: v_accvgpr_read_b32 v0, a0 -; CHECK-NEXT: v_accvgpr_read_b32 v1, a1 -; CHECK-NEXT: ds_permute_b32 v0, v0, v1 -; CHECK-NEXT: v_accvgpr_read_b32 v63, a17 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v62, a16 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v61, a15 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v60, a14 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v59, a13 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v58, a12 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v57, a11 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v56, a10 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v47, a9 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v46, a8 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v45, a7 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v44, a6 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v43, a5 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v42, a4 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v41, a3 ; Reload Reuse -; CHECK-NEXT: v_accvgpr_read_b32 v40, a2 ; Reload Reuse -; CHECK-NEXT: s_waitcnt lgkmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v63, a16 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v62, a15 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v61, a14 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v60, a13 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v59, a12 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v58, a11 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v57, a10 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v56, a9 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v47, a8 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v46, a7 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v45, a6 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v44, a5 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v43, a4 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v42, a3 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v41, a2 ; Reload Reuse +; CHECK-NEXT: v_accvgpr_read_b32 v40, a1 ; Reload Reuse ; CHECK-NEXT: s_setpc_b64 s[30:31] %gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %lds, i32 0, i32 10 %gep.1 = getelementptr inbounds [512 x i32], ptr addrspace(3) %lds, i32 0, i32 24 diff --git a/llvm/test/CodeGen/AMDGPU/extract-subvector.ll b/llvm/test/CodeGen/AMDGPU/extract-subvector.ll index 130c8563c9a4c..3d87edebb15ea 100644 --- a/llvm/test/CodeGen/AMDGPU/extract-subvector.ll +++ b/llvm/test/CodeGen/AMDGPU/extract-subvector.ll @@ -295,21 +295,21 @@ define <8 x i64> @extract_8xi64(ptr addrspace(1) %p0, ptr addrspace(1) %p1, i1 % ; GCN-NEXT: .LBB3_4: ; %exit ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] ; GCN-NEXT: v_mov_b32_e32 v1, 0xffff8000 +; GCN-NEXT: v_cmp_lt_i32_e32 vcc, -1, v5 +; GCN-NEXT: v_cndmask_b32_e32 v0, -1, v1, vcc +; GCN-NEXT: v_cmp_lt_i32_e32 vcc, -1, v7 +; GCN-NEXT: v_cndmask_b32_e32 v2, -1, v1, vcc +; GCN-NEXT: v_cmp_lt_i32_e32 vcc, -1, v9 +; GCN-NEXT: v_cndmask_b32_e32 v4, -1, v1, vcc +; GCN-NEXT: v_cmp_lt_i32_e32 vcc, -1, v11 +; GCN-NEXT: v_cndmask_b32_e32 v6, -1, v1, vcc +; GCN-NEXT: v_cmp_lt_i32_e32 vcc, -1, v13 +; GCN-NEXT: v_cndmask_b32_e32 v8, -1, v1, vcc +; GCN-NEXT: v_cmp_lt_i32_e32 vcc, -1, v15 +; GCN-NEXT: v_cndmask_b32_e32 v10, -1, v1, vcc +; GCN-NEXT: v_cmp_lt_i32_e32 vcc, -1, v17 +; GCN-NEXT: v_cndmask_b32_e32 v12, -1, v1, vcc ; GCN-NEXT: v_cmp_lt_i32_e32 vcc, -1, v19 -; GCN-NEXT: v_cmp_lt_i32_e64 s[4:5], -1, v17 -; GCN-NEXT: v_cmp_lt_i32_e64 s[6:7], -1, v15 -; GCN-NEXT: v_cmp_lt_i32_e64 s[8:9], -1, v13 -; GCN-NEXT: v_cmp_lt_i32_e64 s[10:11], -1, v11 -; GCN-NEXT: v_cmp_lt_i32_e64 s[12:13], -1, v9 -; GCN-NEXT: v_cmp_lt_i32_e64 s[14:15], -1, v7 -; GCN-NEXT: v_cmp_lt_i32_e64 s[16:17], -1, v5 -; GCN-NEXT: v_cndmask_b32_e64 v0, -1, v1, s[16:17] -; GCN-NEXT: v_cndmask_b32_e64 v2, -1, v1, s[14:15] -; GCN-NEXT: v_cndmask_b32_e64 v4, -1, v1, s[12:13] -; GCN-NEXT: v_cndmask_b32_e64 v6, -1, v1, s[10:11] -; GCN-NEXT: v_cndmask_b32_e64 v8, -1, v1, s[8:9] -; GCN-NEXT: v_cndmask_b32_e64 v10, -1, v1, s[6:7] -; GCN-NEXT: v_cndmask_b32_e64 v12, -1, v1, s[4:5] ; GCN-NEXT: v_cndmask_b32_e32 v14, -1, v1, vcc ; GCN-NEXT: v_mov_b32_e32 v1, -1 ; GCN-NEXT: v_mov_b32_e32 v3, -1 @@ -538,31 +538,31 @@ define <8 x double> @extract_8xf64(ptr addrspace(1) %p0, ptr addrspace(1) %p1, i ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: .LBB6_4: ; %exit ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] -; GCN-NEXT: v_cmp_nlt_f64_e32 vcc, -1.0, v[6:7] -; GCN-NEXT: v_cmp_nlt_f64_e64 s[4:5], -1.0, v[8:9] -; GCN-NEXT: v_cmp_nlt_f64_e64 s[6:7], -1.0, v[10:11] -; GCN-NEXT: v_cmp_nlt_f64_e64 s[8:9], -1.0, v[12:13] -; GCN-NEXT: v_cmp_nlt_f64_e64 s[10:11], -1.0, v[14:15] -; GCN-NEXT: v_cmp_nlt_f64_e64 s[12:13], -1.0, v[16:17] -; GCN-NEXT: v_cmp_nlt_f64_e64 s[14:15], -1.0, v[18:19] -; GCN-NEXT: v_cmp_nlt_f64_e64 s[16:17], -1.0, v[4:5] +; GCN-NEXT: v_cmp_nlt_f64_e32 vcc, -1.0, v[4:5] ; GCN-NEXT: v_mov_b32_e32 v0, 0xbff00000 -; GCN-NEXT: v_cndmask_b32_e64 v1, -2.0, v0, s[16:17] -; GCN-NEXT: v_cndmask_b32_e32 v3, -2.0, v0, vcc -; GCN-NEXT: v_cndmask_b32_e64 v5, -2.0, v0, s[4:5] -; GCN-NEXT: v_cndmask_b32_e64 v7, -2.0, v0, s[6:7] -; GCN-NEXT: v_cndmask_b32_e64 v9, -2.0, v0, s[8:9] -; GCN-NEXT: v_cndmask_b32_e64 v11, -2.0, v0, s[10:11] -; GCN-NEXT: v_cndmask_b32_e64 v13, -2.0, v0, s[12:13] -; GCN-NEXT: v_cndmask_b32_e64 v15, -2.0, v0, s[14:15] -; GCN-NEXT: v_mov_b32_e32 v0, 0 +; GCN-NEXT: v_cndmask_b32_e32 v1, -2.0, v0, vcc +; GCN-NEXT: v_cmp_nlt_f64_e32 vcc, -1.0, v[6:7] ; GCN-NEXT: v_mov_b32_e32 v2, 0 +; GCN-NEXT: v_cndmask_b32_e32 v3, -2.0, v0, vcc +; GCN-NEXT: v_cmp_nlt_f64_e32 vcc, -1.0, v[8:9] ; GCN-NEXT: v_mov_b32_e32 v4, 0 +; GCN-NEXT: v_cndmask_b32_e32 v5, -2.0, v0, vcc +; GCN-NEXT: v_cmp_nlt_f64_e32 vcc, -1.0, v[10:11] ; GCN-NEXT: v_mov_b32_e32 v6, 0 +; GCN-NEXT: v_cndmask_b32_e32 v7, -2.0, v0, vcc +; GCN-NEXT: v_cmp_nlt_f64_e32 vcc, -1.0, v[12:13] ; GCN-NEXT: v_mov_b32_e32 v8, 0 +; GCN-NEXT: v_cndmask_b32_e32 v9, -2.0, v0, vcc +; GCN-NEXT: v_cmp_nlt_f64_e32 vcc, -1.0, v[14:15] ; GCN-NEXT: v_mov_b32_e32 v10, 0 +; GCN-NEXT: v_cndmask_b32_e32 v11, -2.0, v0, vcc +; GCN-NEXT: v_cmp_nlt_f64_e32 vcc, -1.0, v[16:17] ; GCN-NEXT: v_mov_b32_e32 v12, 0 +; GCN-NEXT: v_cndmask_b32_e32 v13, -2.0, v0, vcc +; GCN-NEXT: v_cmp_nlt_f64_e32 vcc, -1.0, v[18:19] ; GCN-NEXT: v_mov_b32_e32 v14, 0 +; GCN-NEXT: v_cndmask_b32_e32 v15, -2.0, v0, vcc +; GCN-NEXT: v_mov_b32_e32 v0, 0 ; GCN-NEXT: s_setpc_b64 s[30:31] br i1 %c0, label %T, label %F diff --git a/llvm/test/CodeGen/AMDGPU/fceil64.ll b/llvm/test/CodeGen/AMDGPU/fceil64.ll index dc1a829428724..f971584da677a 100644 --- a/llvm/test/CodeGen/AMDGPU/fceil64.ll +++ b/llvm/test/CodeGen/AMDGPU/fceil64.ll @@ -403,345 +403,344 @@ define amdgpu_kernel void @fceil_v8f64(ptr addrspace(1) %out, <8 x double> %x) { define amdgpu_kernel void @fceil_v16f64(ptr addrspace(1) %out, <16 x double> %x) { ; SI-LABEL: fceil_v16f64: ; SI: ; %bb.0: -; SI-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x29 -; SI-NEXT: s_mov_b32 s2, -1 -; SI-NEXT: s_mov_b32 s1, 0xfffff -; SI-NEXT: s_mov_b32 s0, s2 +; SI-NEXT: s_load_dwordx16 s[16:31], s[4:5], 0x29 +; SI-NEXT: s_mov_b32 s38, -1 +; SI-NEXT: s_mov_b32 s35, 0xfffff +; SI-NEXT: s_mov_b32 s34, s38 ; SI-NEXT: v_mov_b32_e32 v16, 0 ; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: s_bfe_u32 s3, s11, 0xb0014 -; SI-NEXT: s_addk_i32 s3, 0xfc01 -; SI-NEXT: s_lshr_b64 s[6:7], s[0:1], s3 -; SI-NEXT: s_and_b32 s24, s11, 0x80000000 -; SI-NEXT: s_andn2_b64 s[6:7], s[10:11], s[6:7] -; SI-NEXT: s_cmp_lt_i32 s3, 0 -; SI-NEXT: s_cselect_b32 s6, 0, s6 -; SI-NEXT: s_cselect_b32 s7, s24, s7 -; SI-NEXT: s_cmp_gt_i32 s3, 51 -; SI-NEXT: s_cselect_b32 s26, s10, s6 -; SI-NEXT: s_cselect_b32 s27, s11, s7 -; SI-NEXT: v_mov_b32_e32 v0, s26 -; SI-NEXT: v_mov_b32_e32 v1, s27 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[10:11], v[0:1] -; SI-NEXT: v_cmp_gt_f64_e64 s[6:7], s[10:11], 0 -; SI-NEXT: v_cmp_gt_f64_e64 s[36:37], s[20:21], 0 -; SI-NEXT: s_and_b64 s[6:7], s[6:7], vcc -; SI-NEXT: s_and_b64 s[6:7], s[6:7], exec -; SI-NEXT: s_cselect_b32 s3, 0x3ff00000, 0 -; SI-NEXT: s_bfe_u32 s6, s9, 0xb0014 -; SI-NEXT: s_add_i32 s10, s6, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[6:7], s[0:1], s10 -; SI-NEXT: s_andn2_b64 s[6:7], s[8:9], s[6:7] -; SI-NEXT: s_and_b32 s11, s9, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s10, 0 -; SI-NEXT: s_cselect_b32 s6, 0, s6 -; SI-NEXT: s_cselect_b32 s7, s11, s7 -; SI-NEXT: s_cmp_gt_i32 s10, 51 -; SI-NEXT: s_cselect_b32 s6, s8, s6 -; SI-NEXT: s_cselect_b32 s7, s9, s7 -; SI-NEXT: v_mov_b32_e32 v0, s6 -; SI-NEXT: v_mov_b32_e32 v1, s7 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[8:9], v[0:1] -; SI-NEXT: v_cmp_gt_f64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: v_mov_b32_e32 v17, s3 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], vcc -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s10, 0x3ff00000, 0 -; SI-NEXT: s_bfe_u32 s8, s15, 0xb0014 -; SI-NEXT: s_add_i32 s11, s8, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[8:9], s[0:1], s11 -; SI-NEXT: s_andn2_b64 s[8:9], s[14:15], s[8:9] -; SI-NEXT: s_and_b32 s24, s15, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s11, 0 -; SI-NEXT: s_cselect_b32 s8, 0, s8 -; SI-NEXT: s_cselect_b32 s9, s24, s9 -; SI-NEXT: s_cmp_gt_i32 s11, 51 -; SI-NEXT: s_cselect_b32 s24, s14, s8 -; SI-NEXT: s_cselect_b32 s25, s15, s9 -; SI-NEXT: v_mov_b32_e32 v0, s24 -; SI-NEXT: v_mov_b32_e32 v1, s25 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[14:15], v[0:1] -; SI-NEXT: v_cmp_gt_f64_e64 s[8:9], s[14:15], 0 -; SI-NEXT: v_add_f64 v[2:3], s[26:27], v[16:17] -; SI-NEXT: s_and_b64 s[8:9], s[8:9], vcc -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s3, 0x3ff00000, 0 -; SI-NEXT: s_bfe_u32 s8, s13, 0xb0014 -; SI-NEXT: s_add_i32 s11, s8, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[8:9], s[0:1], s11 -; SI-NEXT: s_andn2_b64 s[8:9], s[12:13], s[8:9] -; SI-NEXT: s_and_b32 s14, s13, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s11, 0 -; SI-NEXT: s_cselect_b32 s8, 0, s8 -; SI-NEXT: s_cselect_b32 s9, s14, s9 -; SI-NEXT: s_cmp_gt_i32 s11, 51 -; SI-NEXT: s_cselect_b32 s34, s12, s8 -; SI-NEXT: s_cselect_b32 s35, s13, s9 -; SI-NEXT: v_mov_b32_e32 v0, s34 -; SI-NEXT: v_mov_b32_e32 v1, s35 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[12:13], v[0:1] -; SI-NEXT: v_cmp_gt_f64_e64 s[8:9], s[12:13], 0 -; SI-NEXT: v_mov_b32_e32 v17, s10 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], vcc -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s33, 0x3ff00000, 0 -; SI-NEXT: s_bfe_u32 s8, s19, 0xb0014 -; SI-NEXT: s_add_i32 s11, s8, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[8:9], s[0:1], s11 -; SI-NEXT: s_andn2_b64 s[8:9], s[18:19], s[8:9] -; SI-NEXT: s_and_b32 s12, s19, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s11, 0 -; SI-NEXT: s_cselect_b32 s8, 0, s8 -; SI-NEXT: s_cselect_b32 s9, s12, s9 -; SI-NEXT: s_cmp_gt_i32 s11, 51 -; SI-NEXT: s_cselect_b32 s30, s18, s8 -; SI-NEXT: s_cselect_b32 s31, s19, s9 -; SI-NEXT: v_mov_b32_e32 v0, s30 -; SI-NEXT: v_mov_b32_e32 v1, s31 +; SI-NEXT: s_bfe_u32 s0, s19, 0xb0014 +; SI-NEXT: s_add_i32 s2, s0, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[0:1], s[34:35], s2 +; SI-NEXT: s_andn2_b64 s[0:1], s[18:19], s[0:1] +; SI-NEXT: s_and_b32 s3, s19, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s2, 0 +; SI-NEXT: s_cselect_b32 s0, 0, s0 +; SI-NEXT: s_cselect_b32 s1, s3, s1 +; SI-NEXT: s_cmp_gt_i32 s2, 51 +; SI-NEXT: s_cselect_b32 s40, s18, s0 +; SI-NEXT: s_cselect_b32 s41, s19, s1 +; SI-NEXT: v_mov_b32_e32 v0, s40 +; SI-NEXT: v_mov_b32_e32 v1, s41 ; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[18:19], v[0:1] -; SI-NEXT: v_cmp_gt_f64_e64 s[8:9], s[18:19], 0 -; SI-NEXT: s_and_b64 s[8:9], s[8:9], vcc -; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s38, 0x3ff00000, 0 -; SI-NEXT: s_bfe_u32 s8, s17, 0xb0014 -; SI-NEXT: s_add_i32 s10, s8, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[8:9], s[0:1], s10 -; SI-NEXT: s_andn2_b64 s[8:9], s[16:17], s[8:9] -; SI-NEXT: s_and_b32 s11, s17, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s10, 0 -; SI-NEXT: s_cselect_b32 s8, 0, s8 -; SI-NEXT: s_cselect_b32 s9, s11, s9 -; SI-NEXT: s_cmp_gt_i32 s10, 51 -; SI-NEXT: s_cselect_b32 s28, s16, s8 -; SI-NEXT: s_cselect_b32 s29, s17, s9 -; SI-NEXT: v_mov_b32_e32 v0, s28 -; SI-NEXT: v_mov_b32_e32 v1, s29 +; SI-NEXT: v_cmp_gt_f64_e64 s[18:19], s[18:19], 0 +; SI-NEXT: s_load_dwordx2 s[36:37], s[4:5], 0x9 +; SI-NEXT: s_and_b64 s[18:19], s[18:19], vcc +; SI-NEXT: s_and_b64 s[18:19], s[18:19], exec +; SI-NEXT: s_cselect_b32 s18, 0x3ff00000, 0 +; SI-NEXT: v_mov_b32_e32 v17, s18 +; SI-NEXT: s_bfe_u32 s18, s17, 0xb0014 +; SI-NEXT: s_add_i32 s33, s18, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[18:19], s[34:35], s33 +; SI-NEXT: s_andn2_b64 s[18:19], s[16:17], s[18:19] +; SI-NEXT: s_and_b32 s39, s17, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s33, 0 +; SI-NEXT: s_cselect_b32 s18, 0, s18 +; SI-NEXT: s_cselect_b32 s19, s39, s19 +; SI-NEXT: s_cmp_gt_i32 s33, 51 +; SI-NEXT: s_cselect_b32 s18, s16, s18 +; SI-NEXT: s_cselect_b32 s19, s17, s19 +; SI-NEXT: v_mov_b32_e32 v0, s18 +; SI-NEXT: v_mov_b32_e32 v1, s19 ; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[16:17], v[0:1] -; SI-NEXT: v_cmp_gt_f64_e64 s[8:9], s[16:17], 0 -; SI-NEXT: v_add_f64 v[0:1], s[6:7], v[16:17] -; SI-NEXT: s_and_b64 s[6:7], s[8:9], vcc -; SI-NEXT: s_and_b64 s[6:7], s[6:7], exec -; SI-NEXT: s_cselect_b32 s39, 0x3ff00000, 0 -; SI-NEXT: s_bfe_u32 s6, s23, 0xb0014 -; SI-NEXT: s_add_i32 s8, s6, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[6:7], s[0:1], s8 -; SI-NEXT: s_andn2_b64 s[6:7], s[22:23], s[6:7] -; SI-NEXT: s_and_b32 s9, s23, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s8, 0 -; SI-NEXT: s_cselect_b32 s6, 0, s6 -; SI-NEXT: s_cselect_b32 s7, s9, s7 -; SI-NEXT: s_cmp_gt_i32 s8, 51 -; SI-NEXT: s_cselect_b32 s26, s22, s6 -; SI-NEXT: s_cselect_b32 s27, s23, s7 -; SI-NEXT: v_mov_b32_e32 v4, s26 -; SI-NEXT: v_mov_b32_e32 v5, s27 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[22:23], v[4:5] -; SI-NEXT: v_cmp_gt_f64_e64 s[6:7], s[22:23], 0 -; SI-NEXT: v_mov_b32_e32 v17, s3 +; SI-NEXT: v_cmp_gt_f64_e64 s[16:17], s[16:17], 0 +; SI-NEXT: v_add_f64 v[2:3], s[40:41], v[16:17] +; SI-NEXT: s_and_b64 s[16:17], s[16:17], vcc +; SI-NEXT: s_and_b64 s[16:17], s[16:17], exec +; SI-NEXT: s_cselect_b32 s16, 0x3ff00000, 0 +; SI-NEXT: v_mov_b32_e32 v17, s16 +; SI-NEXT: s_bfe_u32 s16, s23, 0xb0014 +; SI-NEXT: s_add_i32 s33, s16, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[16:17], s[34:35], s33 +; SI-NEXT: s_andn2_b64 s[16:17], s[22:23], s[16:17] +; SI-NEXT: s_and_b32 s39, s23, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s33, 0 +; SI-NEXT: s_cselect_b32 s16, 0, s16 +; SI-NEXT: s_cselect_b32 s17, s39, s17 +; SI-NEXT: s_cmp_gt_i32 s33, 51 +; SI-NEXT: s_cselect_b32 s16, s22, s16 +; SI-NEXT: s_cselect_b32 s17, s23, s17 +; SI-NEXT: v_mov_b32_e32 v0, s16 +; SI-NEXT: v_mov_b32_e32 v1, s17 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[22:23], v[0:1] +; SI-NEXT: v_cmp_gt_f64_e64 s[22:23], s[22:23], 0 +; SI-NEXT: v_add_f64 v[0:1], s[18:19], v[16:17] +; SI-NEXT: s_and_b64 s[18:19], s[22:23], vcc +; SI-NEXT: s_and_b64 s[18:19], s[18:19], exec +; SI-NEXT: s_cselect_b32 s18, 0x3ff00000, 0 +; SI-NEXT: v_mov_b32_e32 v17, s18 +; SI-NEXT: s_bfe_u32 s18, s21, 0xb0014 +; SI-NEXT: s_add_i32 s22, s18, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[18:19], s[34:35], s22 +; SI-NEXT: s_andn2_b64 s[18:19], s[20:21], s[18:19] +; SI-NEXT: s_and_b32 s23, s21, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s22, 0 +; SI-NEXT: s_cselect_b32 s18, 0, s18 +; SI-NEXT: s_cselect_b32 s19, s23, s19 +; SI-NEXT: s_cmp_gt_i32 s22, 51 +; SI-NEXT: s_cselect_b32 s18, s20, s18 +; SI-NEXT: s_cselect_b32 s19, s21, s19 +; SI-NEXT: v_mov_b32_e32 v4, s18 +; SI-NEXT: v_mov_b32_e32 v5, s19 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[20:21], v[4:5] +; SI-NEXT: v_cmp_gt_f64_e64 s[20:21], s[20:21], 0 +; SI-NEXT: v_add_f64 v[6:7], s[16:17], v[16:17] +; SI-NEXT: s_and_b64 s[16:17], s[20:21], vcc +; SI-NEXT: s_and_b64 s[16:17], s[16:17], exec +; SI-NEXT: s_cselect_b32 s22, 0x3ff00000, 0 +; SI-NEXT: s_bfe_u32 s16, s27, 0xb0014 +; SI-NEXT: s_add_i32 s20, s16, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[16:17], s[34:35], s20 +; SI-NEXT: s_andn2_b64 s[16:17], s[26:27], s[16:17] +; SI-NEXT: s_and_b32 s21, s27, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s20, 0 +; SI-NEXT: s_cselect_b32 s16, 0, s16 +; SI-NEXT: s_cselect_b32 s17, s21, s17 +; SI-NEXT: s_cmp_gt_i32 s20, 51 +; SI-NEXT: s_cselect_b32 s16, s26, s16 +; SI-NEXT: s_cselect_b32 s17, s27, s17 +; SI-NEXT: v_mov_b32_e32 v4, s16 +; SI-NEXT: v_mov_b32_e32 v5, s17 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[26:27], v[4:5] +; SI-NEXT: v_cmp_gt_f64_e64 s[20:21], s[26:27], 0 +; SI-NEXT: v_mov_b32_e32 v17, s22 +; SI-NEXT: s_and_b64 s[20:21], s[20:21], vcc +; SI-NEXT: s_and_b64 s[20:21], s[20:21], exec +; SI-NEXT: s_cselect_b32 s26, 0x3ff00000, 0 +; SI-NEXT: s_bfe_u32 s20, s25, 0xb0014 +; SI-NEXT: s_add_i32 s22, s20, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[20:21], s[34:35], s22 +; SI-NEXT: s_andn2_b64 s[20:21], s[24:25], s[20:21] +; SI-NEXT: s_and_b32 s23, s25, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s22, 0 +; SI-NEXT: s_cselect_b32 s20, 0, s20 +; SI-NEXT: s_cselect_b32 s21, s23, s21 +; SI-NEXT: s_cmp_gt_i32 s22, 51 +; SI-NEXT: s_cselect_b32 s22, s24, s20 +; SI-NEXT: s_cselect_b32 s23, s25, s21 +; SI-NEXT: v_mov_b32_e32 v4, s22 +; SI-NEXT: v_mov_b32_e32 v5, s23 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[24:25], v[4:5] +; SI-NEXT: v_cmp_gt_f64_e64 s[20:21], s[24:25], 0 +; SI-NEXT: v_add_f64 v[4:5], s[18:19], v[16:17] +; SI-NEXT: s_and_b64 s[18:19], s[20:21], vcc +; SI-NEXT: s_and_b64 s[18:19], s[18:19], exec +; SI-NEXT: s_cselect_b32 s27, 0x3ff00000, 0 +; SI-NEXT: s_bfe_u32 s18, s31, 0xb0014 +; SI-NEXT: s_add_i32 s20, s18, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[18:19], s[34:35], s20 +; SI-NEXT: s_andn2_b64 s[18:19], s[30:31], s[18:19] +; SI-NEXT: s_and_b32 s21, s31, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s20, 0 +; SI-NEXT: s_cselect_b32 s18, 0, s18 +; SI-NEXT: s_cselect_b32 s19, s21, s19 +; SI-NEXT: s_cmp_gt_i32 s20, 51 +; SI-NEXT: s_cselect_b32 s20, s30, s18 +; SI-NEXT: s_cselect_b32 s21, s31, s19 +; SI-NEXT: v_mov_b32_e32 v8, s20 +; SI-NEXT: v_mov_b32_e32 v9, s21 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[30:31], v[8:9] +; SI-NEXT: v_cmp_gt_f64_e64 s[18:19], s[30:31], 0 +; SI-NEXT: v_mov_b32_e32 v17, s26 +; SI-NEXT: s_and_b64 s[18:19], s[18:19], vcc +; SI-NEXT: s_and_b64 s[18:19], s[18:19], exec +; SI-NEXT: s_cselect_b32 s26, 0x3ff00000, 0 +; SI-NEXT: s_bfe_u32 s18, s29, 0xb0014 +; SI-NEXT: s_add_i32 s24, s18, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[18:19], s[34:35], s24 +; SI-NEXT: s_andn2_b64 s[18:19], s[28:29], s[18:19] +; SI-NEXT: s_and_b32 s25, s29, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s24, 0 +; SI-NEXT: s_cselect_b32 s18, 0, s18 +; SI-NEXT: s_cselect_b32 s19, s25, s19 +; SI-NEXT: s_cmp_gt_i32 s24, 51 +; SI-NEXT: s_cselect_b32 s18, s28, s18 +; SI-NEXT: s_cselect_b32 s19, s29, s19 +; SI-NEXT: v_mov_b32_e32 v8, s18 +; SI-NEXT: s_load_dwordx16 s[0:15], s[4:5], 0x39 +; SI-NEXT: v_mov_b32_e32 v9, s19 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[28:29], v[8:9] +; SI-NEXT: v_cmp_gt_f64_e64 s[24:25], s[28:29], 0 +; SI-NEXT: v_add_f64 v[10:11], s[16:17], v[16:17] +; SI-NEXT: s_and_b64 s[16:17], s[24:25], vcc +; SI-NEXT: s_and_b64 s[16:17], s[16:17], exec +; SI-NEXT: s_cselect_b32 s24, 0x3ff00000, 0 +; SI-NEXT: s_waitcnt lgkmcnt(0) +; SI-NEXT: s_bfe_u32 s16, s3, 0xb0014 +; SI-NEXT: s_add_i32 s25, s16, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[16:17], s[34:35], s25 +; SI-NEXT: s_andn2_b64 s[16:17], s[2:3], s[16:17] +; SI-NEXT: s_and_b32 s28, s3, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s25, 0 +; SI-NEXT: s_cselect_b32 s16, 0, s16 +; SI-NEXT: s_cselect_b32 s17, s28, s17 +; SI-NEXT: s_cmp_gt_i32 s25, 51 +; SI-NEXT: s_cselect_b32 s16, s2, s16 +; SI-NEXT: s_cselect_b32 s17, s3, s17 +; SI-NEXT: v_mov_b32_e32 v8, s16 +; SI-NEXT: v_mov_b32_e32 v9, s17 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[2:3], v[8:9] +; SI-NEXT: v_cmp_gt_f64_e64 s[2:3], s[2:3], 0 +; SI-NEXT: v_mov_b32_e32 v17, s27 +; SI-NEXT: s_and_b64 s[2:3], s[2:3], vcc +; SI-NEXT: s_and_b64 s[2:3], s[2:3], exec +; SI-NEXT: s_cselect_b32 s25, 0x3ff00000, 0 +; SI-NEXT: s_bfe_u32 s2, s1, 0xb0014 +; SI-NEXT: s_add_i32 s27, s2, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[2:3], s[34:35], s27 +; SI-NEXT: s_andn2_b64 s[2:3], s[0:1], s[2:3] +; SI-NEXT: s_and_b32 s28, s1, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s27, 0 +; SI-NEXT: s_cselect_b32 s2, 0, s2 +; SI-NEXT: s_cselect_b32 s3, s28, s3 +; SI-NEXT: s_cmp_gt_i32 s27, 51 +; SI-NEXT: s_cselect_b32 s3, s1, s3 +; SI-NEXT: s_cselect_b32 s2, s0, s2 +; SI-NEXT: v_mov_b32_e32 v9, s3 +; SI-NEXT: v_mov_b32_e32 v8, s2 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[0:1], v[8:9] +; SI-NEXT: v_cmp_gt_f64_e64 s[0:1], s[0:1], 0 +; SI-NEXT: v_add_f64 v[8:9], s[22:23], v[16:17] +; SI-NEXT: s_and_b64 s[0:1], s[0:1], vcc +; SI-NEXT: s_and_b64 s[0:1], s[0:1], exec +; SI-NEXT: s_cselect_b32 s22, 0x3ff00000, 0 +; SI-NEXT: s_bfe_u32 s0, s7, 0xb0014 +; SI-NEXT: s_add_i32 s23, s0, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[0:1], s[34:35], s23 +; SI-NEXT: s_andn2_b64 s[0:1], s[6:7], s[0:1] +; SI-NEXT: s_and_b32 s27, s7, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s23, 0 +; SI-NEXT: s_cselect_b32 s0, 0, s0 +; SI-NEXT: s_cselect_b32 s1, s27, s1 +; SI-NEXT: s_cmp_gt_i32 s23, 51 +; SI-NEXT: s_cselect_b32 s1, s7, s1 +; SI-NEXT: s_cselect_b32 s0, s6, s0 +; SI-NEXT: v_mov_b32_e32 v13, s1 +; SI-NEXT: v_mov_b32_e32 v12, s0 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[6:7], v[12:13] +; SI-NEXT: v_cmp_gt_f64_e64 s[6:7], s[6:7], 0 +; SI-NEXT: v_mov_b32_e32 v17, s26 ; SI-NEXT: s_and_b64 s[6:7], s[6:7], vcc ; SI-NEXT: s_and_b64 s[6:7], s[6:7], exec -; SI-NEXT: s_cselect_b32 s3, 0x3ff00000, 0 -; SI-NEXT: s_bfe_u32 s6, s21, 0xb0014 -; SI-NEXT: s_add_i32 s8, s6, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[6:7], s[0:1], s8 -; SI-NEXT: s_andn2_b64 s[6:7], s[20:21], s[6:7] -; SI-NEXT: s_and_b32 s9, s21, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s8, 0 +; SI-NEXT: s_cselect_b32 s23, 0x3ff00000, 0 +; SI-NEXT: s_bfe_u32 s6, s5, 0xb0014 +; SI-NEXT: s_add_i32 s26, s6, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[6:7], s[34:35], s26 +; SI-NEXT: s_andn2_b64 s[6:7], s[4:5], s[6:7] +; SI-NEXT: s_and_b32 s27, s5, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s26, 0 ; SI-NEXT: s_cselect_b32 s6, 0, s6 -; SI-NEXT: s_cselect_b32 s7, s9, s7 -; SI-NEXT: s_cmp_gt_i32 s8, 51 -; SI-NEXT: s_cselect_b32 s6, s20, s6 -; SI-NEXT: s_cselect_b32 s7, s21, s7 -; SI-NEXT: v_mov_b32_e32 v4, s6 -; SI-NEXT: v_mov_b32_e32 v5, s7 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[20:21], v[4:5] -; SI-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x39 -; SI-NEXT: v_add_f64 v[6:7], s[24:25], v[16:17] -; SI-NEXT: s_and_b64 s[24:25], s[36:37], vcc -; SI-NEXT: s_and_b64 s[24:25], s[24:25], exec -; SI-NEXT: v_mov_b32_e32 v17, s33 -; SI-NEXT: s_cselect_b32 s33, 0x3ff00000, 0 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: s_bfe_u32 s24, s11, 0xb0014 -; SI-NEXT: v_add_f64 v[4:5], s[34:35], v[16:17] -; SI-NEXT: s_add_i32 s34, s24, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[24:25], s[0:1], s34 -; SI-NEXT: s_andn2_b64 s[24:25], s[10:11], s[24:25] -; SI-NEXT: s_and_b32 s35, s11, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s34, 0 -; SI-NEXT: s_cselect_b32 s24, 0, s24 -; SI-NEXT: s_cselect_b32 s25, s35, s25 -; SI-NEXT: s_cmp_gt_i32 s34, 51 -; SI-NEXT: s_cselect_b32 s24, s10, s24 -; SI-NEXT: s_cselect_b32 s25, s11, s25 -; SI-NEXT: v_mov_b32_e32 v8, s24 -; SI-NEXT: v_mov_b32_e32 v9, s25 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[10:11], v[8:9] +; SI-NEXT: s_cselect_b32 s7, s27, s7 +; SI-NEXT: s_cmp_gt_i32 s26, 51 +; SI-NEXT: s_cselect_b32 s7, s5, s7 +; SI-NEXT: s_cselect_b32 s6, s4, s6 +; SI-NEXT: v_mov_b32_e32 v13, s7 +; SI-NEXT: v_mov_b32_e32 v12, s6 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[4:5], v[12:13] +; SI-NEXT: v_cmp_gt_f64_e64 s[4:5], s[4:5], 0 +; SI-NEXT: v_add_f64 v[14:15], s[20:21], v[16:17] +; SI-NEXT: s_and_b64 s[4:5], s[4:5], vcc +; SI-NEXT: s_and_b64 s[4:5], s[4:5], exec +; SI-NEXT: s_cselect_b32 s20, 0x3ff00000, 0 +; SI-NEXT: s_bfe_u32 s4, s11, 0xb0014 +; SI-NEXT: s_add_i32 s21, s4, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[4:5], s[34:35], s21 +; SI-NEXT: s_andn2_b64 s[4:5], s[10:11], s[4:5] +; SI-NEXT: s_and_b32 s26, s11, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s21, 0 +; SI-NEXT: s_cselect_b32 s4, 0, s4 +; SI-NEXT: s_cselect_b32 s5, s26, s5 +; SI-NEXT: s_cmp_gt_i32 s21, 51 +; SI-NEXT: s_cselect_b32 s5, s11, s5 +; SI-NEXT: s_cselect_b32 s4, s10, s4 +; SI-NEXT: v_mov_b32_e32 v13, s5 +; SI-NEXT: v_mov_b32_e32 v12, s4 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[10:11], v[12:13] ; SI-NEXT: v_cmp_gt_f64_e64 s[10:11], s[10:11], 0 -; SI-NEXT: v_mov_b32_e32 v17, s38 +; SI-NEXT: v_mov_b32_e32 v17, s24 ; SI-NEXT: s_and_b64 s[10:11], s[10:11], vcc ; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec -; SI-NEXT: v_add_f64 v[10:11], s[30:31], v[16:17] -; SI-NEXT: s_cselect_b32 s30, 0x3ff00000, 0 +; SI-NEXT: s_cselect_b32 s21, 0x3ff00000, 0 ; SI-NEXT: s_bfe_u32 s10, s9, 0xb0014 -; SI-NEXT: s_add_i32 s31, s10, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[10:11], s[0:1], s31 +; SI-NEXT: s_add_i32 s24, s10, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[10:11], s[34:35], s24 ; SI-NEXT: s_andn2_b64 s[10:11], s[8:9], s[10:11] -; SI-NEXT: s_and_b32 s34, s9, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s31, 0 +; SI-NEXT: s_and_b32 s26, s9, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s24, 0 ; SI-NEXT: s_cselect_b32 s10, 0, s10 -; SI-NEXT: s_cselect_b32 s11, s34, s11 -; SI-NEXT: s_cmp_gt_i32 s31, 51 -; SI-NEXT: s_cselect_b32 s10, s8, s10 +; SI-NEXT: s_cselect_b32 s11, s26, s11 +; SI-NEXT: s_cmp_gt_i32 s24, 51 ; SI-NEXT: s_cselect_b32 s11, s9, s11 -; SI-NEXT: v_mov_b32_e32 v8, s10 -; SI-NEXT: v_mov_b32_e32 v9, s11 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[8:9], v[8:9] +; SI-NEXT: s_cselect_b32 s10, s8, s10 +; SI-NEXT: v_mov_b32_e32 v13, s11 +; SI-NEXT: v_mov_b32_e32 v12, s10 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[8:9], v[12:13] ; SI-NEXT: v_cmp_gt_f64_e64 s[8:9], s[8:9], 0 -; SI-NEXT: v_mov_b32_e32 v17, s39 +; SI-NEXT: v_add_f64 v[12:13], s[18:19], v[16:17] ; SI-NEXT: s_and_b64 s[8:9], s[8:9], vcc ; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec -; SI-NEXT: s_cselect_b32 s31, 0x3ff00000, 0 +; SI-NEXT: s_cselect_b32 s18, 0x3ff00000, 0 ; SI-NEXT: s_bfe_u32 s8, s15, 0xb0014 -; SI-NEXT: s_add_i32 s34, s8, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[8:9], s[0:1], s34 +; SI-NEXT: s_add_i32 s19, s8, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[8:9], s[34:35], s19 ; SI-NEXT: s_andn2_b64 s[8:9], s[14:15], s[8:9] -; SI-NEXT: s_and_b32 s35, s15, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s34, 0 +; SI-NEXT: s_and_b32 s24, s15, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s19, 0 ; SI-NEXT: s_cselect_b32 s8, 0, s8 -; SI-NEXT: s_cselect_b32 s9, s35, s9 -; SI-NEXT: s_cmp_gt_i32 s34, 51 -; SI-NEXT: s_cselect_b32 s8, s14, s8 +; SI-NEXT: s_cselect_b32 s9, s24, s9 +; SI-NEXT: s_cmp_gt_i32 s19, 51 ; SI-NEXT: s_cselect_b32 s9, s15, s9 -; SI-NEXT: v_mov_b32_e32 v8, s8 -; SI-NEXT: v_mov_b32_e32 v9, s9 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[14:15], v[8:9] +; SI-NEXT: s_cselect_b32 s8, s14, s8 +; SI-NEXT: v_mov_b32_e32 v18, s9 +; SI-NEXT: v_mov_b32_e32 v17, s8 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[14:15], v[17:18] ; SI-NEXT: v_cmp_gt_f64_e64 s[14:15], s[14:15], 0 -; SI-NEXT: v_add_f64 v[8:9], s[28:29], v[16:17] +; SI-NEXT: v_mov_b32_e32 v17, s25 ; SI-NEXT: s_and_b64 s[14:15], s[14:15], vcc ; SI-NEXT: s_and_b64 s[14:15], s[14:15], exec -; SI-NEXT: s_cselect_b32 s28, 0x3ff00000, 0 +; SI-NEXT: s_cselect_b32 s19, 0x3ff00000, 0 ; SI-NEXT: s_bfe_u32 s14, s13, 0xb0014 -; SI-NEXT: s_add_i32 s29, s14, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[14:15], s[0:1], s29 +; SI-NEXT: s_add_i32 s24, s14, 0xfffffc01 +; SI-NEXT: s_lshr_b64 s[14:15], s[34:35], s24 ; SI-NEXT: s_andn2_b64 s[14:15], s[12:13], s[14:15] -; SI-NEXT: s_and_b32 s34, s13, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s29, 0 +; SI-NEXT: s_and_b32 s25, s13, 0x80000000 +; SI-NEXT: s_cmp_lt_i32 s24, 0 ; SI-NEXT: s_cselect_b32 s14, 0, s14 -; SI-NEXT: s_cselect_b32 s15, s34, s15 -; SI-NEXT: s_cmp_gt_i32 s29, 51 -; SI-NEXT: s_cselect_b32 s14, s12, s14 +; SI-NEXT: s_cselect_b32 s15, s25, s15 +; SI-NEXT: s_cmp_gt_i32 s24, 51 ; SI-NEXT: s_cselect_b32 s15, s13, s15 -; SI-NEXT: v_mov_b32_e32 v12, s14 -; SI-NEXT: v_mov_b32_e32 v13, s15 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[12:13], v[12:13] +; SI-NEXT: s_cselect_b32 s14, s12, s14 +; SI-NEXT: v_mov_b32_e32 v19, s15 +; SI-NEXT: v_mov_b32_e32 v18, s14 +; SI-NEXT: v_add_f64 v[20:21], s[16:17], v[16:17] +; SI-NEXT: v_mov_b32_e32 v17, s22 +; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[12:13], v[18:19] ; SI-NEXT: v_cmp_gt_f64_e64 s[12:13], s[12:13], 0 -; SI-NEXT: v_mov_b32_e32 v17, s3 +; SI-NEXT: v_add_f64 v[18:19], s[2:3], v[16:17] +; SI-NEXT: v_mov_b32_e32 v17, s23 +; SI-NEXT: v_add_f64 v[24:25], s[0:1], v[16:17] +; SI-NEXT: v_mov_b32_e32 v17, s20 ; SI-NEXT: s_and_b64 s[12:13], s[12:13], vcc +; SI-NEXT: v_add_f64 v[22:23], s[6:7], v[16:17] +; SI-NEXT: v_mov_b32_e32 v17, s21 ; SI-NEXT: s_and_b64 s[12:13], s[12:13], exec -; SI-NEXT: s_cselect_b32 s3, 0x3ff00000, 0 -; SI-NEXT: s_bfe_u32 s12, s19, 0xb0014 -; SI-NEXT: s_add_i32 s29, s12, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[12:13], s[0:1], s29 -; SI-NEXT: s_andn2_b64 s[12:13], s[18:19], s[12:13] -; SI-NEXT: s_and_b32 s34, s19, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s29, 0 -; SI-NEXT: s_cselect_b32 s12, 0, s12 -; SI-NEXT: s_cselect_b32 s13, s34, s13 -; SI-NEXT: s_cmp_gt_i32 s29, 51 -; SI-NEXT: s_cselect_b32 s12, s18, s12 -; SI-NEXT: s_cselect_b32 s13, s19, s13 -; SI-NEXT: v_mov_b32_e32 v12, s12 -; SI-NEXT: v_mov_b32_e32 v13, s13 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[18:19], v[12:13] -; SI-NEXT: v_cmp_gt_f64_e64 s[18:19], s[18:19], 0 -; SI-NEXT: v_add_f64 v[14:15], s[26:27], v[16:17] -; SI-NEXT: s_and_b64 s[18:19], s[18:19], vcc -; SI-NEXT: s_and_b64 s[18:19], s[18:19], exec -; SI-NEXT: s_cselect_b32 s26, 0x3ff00000, 0 -; SI-NEXT: s_bfe_u32 s18, s17, 0xb0014 -; SI-NEXT: s_add_i32 s27, s18, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[18:19], s[0:1], s27 -; SI-NEXT: s_andn2_b64 s[18:19], s[16:17], s[18:19] -; SI-NEXT: s_and_b32 s29, s17, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s27, 0 -; SI-NEXT: s_cselect_b32 s18, 0, s18 -; SI-NEXT: s_cselect_b32 s19, s29, s19 -; SI-NEXT: s_cmp_gt_i32 s27, 51 -; SI-NEXT: s_cselect_b32 s18, s16, s18 -; SI-NEXT: s_cselect_b32 s19, s17, s19 -; SI-NEXT: v_mov_b32_e32 v12, s18 -; SI-NEXT: v_mov_b32_e32 v13, s19 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[16:17], v[12:13] -; SI-NEXT: v_cmp_gt_f64_e64 s[16:17], s[16:17], 0 -; SI-NEXT: v_mov_b32_e32 v17, s33 -; SI-NEXT: s_and_b64 s[16:17], s[16:17], vcc -; SI-NEXT: s_and_b64 s[16:17], s[16:17], exec -; SI-NEXT: s_cselect_b32 s27, 0x3ff00000, 0 -; SI-NEXT: s_bfe_u32 s16, s23, 0xb0014 -; SI-NEXT: s_add_i32 s29, s16, 0xfffffc01 -; SI-NEXT: s_lshr_b64 s[16:17], s[0:1], s29 -; SI-NEXT: s_andn2_b64 s[16:17], s[22:23], s[16:17] -; SI-NEXT: s_and_b32 s33, s23, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s29, 0 -; SI-NEXT: s_cselect_b32 s17, s33, s17 -; SI-NEXT: s_cselect_b32 s16, 0, s16 -; SI-NEXT: s_cmp_gt_i32 s29, 51 -; SI-NEXT: s_cselect_b32 s16, s22, s16 -; SI-NEXT: s_cselect_b32 s17, s23, s17 -; SI-NEXT: v_mov_b32_e32 v12, s16 -; SI-NEXT: v_mov_b32_e32 v13, s17 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[22:23], v[12:13] -; SI-NEXT: v_cmp_gt_f64_e64 s[22:23], s[22:23], 0 -; SI-NEXT: v_add_f64 v[12:13], s[6:7], v[16:17] -; SI-NEXT: s_and_b64 s[6:7], s[22:23], vcc -; SI-NEXT: s_and_b64 s[6:7], s[6:7], exec -; SI-NEXT: s_cselect_b32 s22, 0x3ff00000, 0 -; SI-NEXT: s_bfe_u32 s6, s21, 0xb0014 -; SI-NEXT: s_addk_i32 s6, 0xfc01 -; SI-NEXT: s_lshr_b64 s[0:1], s[0:1], s6 -; SI-NEXT: s_andn2_b64 s[0:1], s[20:21], s[0:1] -; SI-NEXT: s_and_b32 s7, s21, 0x80000000 -; SI-NEXT: s_cmp_lt_i32 s6, 0 -; SI-NEXT: s_cselect_b32 s1, s7, s1 -; SI-NEXT: s_cselect_b32 s0, 0, s0 -; SI-NEXT: s_cmp_gt_i32 s6, 51 -; SI-NEXT: s_cselect_b32 s1, s21, s1 -; SI-NEXT: v_mov_b32_e32 v17, s30 -; SI-NEXT: s_cselect_b32 s0, s20, s0 -; SI-NEXT: v_mov_b32_e32 v19, s1 -; SI-NEXT: v_mov_b32_e32 v18, s0 -; SI-NEXT: v_add_f64 v[20:21], s[24:25], v[16:17] -; SI-NEXT: v_mov_b32_e32 v17, s31 -; SI-NEXT: v_cmp_lg_f64_e32 vcc, s[20:21], v[18:19] -; SI-NEXT: v_add_f64 v[18:19], s[10:11], v[16:17] -; SI-NEXT: v_mov_b32_e32 v17, s28 -; SI-NEXT: v_cmp_gt_f64_e64 s[6:7], s[20:21], 0 -; SI-NEXT: v_add_f64 v[24:25], s[8:9], v[16:17] -; SI-NEXT: v_mov_b32_e32 v17, s3 -; SI-NEXT: v_add_f64 v[22:23], s[14:15], v[16:17] -; SI-NEXT: v_mov_b32_e32 v17, s26 -; SI-NEXT: s_and_b64 s[6:7], s[6:7], vcc -; SI-NEXT: v_add_f64 v[28:29], s[12:13], v[16:17] -; SI-NEXT: v_mov_b32_e32 v17, s27 -; SI-NEXT: s_and_b64 s[6:7], s[6:7], exec -; SI-NEXT: v_add_f64 v[26:27], s[18:19], v[16:17] -; SI-NEXT: v_mov_b32_e32 v17, s22 -; SI-NEXT: s_cselect_b32 s3, 0x3ff00000, 0 -; SI-NEXT: v_add_f64 v[32:33], s[16:17], v[16:17] -; SI-NEXT: v_mov_b32_e32 v17, s3 -; SI-NEXT: v_add_f64 v[30:31], s[0:1], v[16:17] -; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 -; SI-NEXT: s_mov_b32 s3, 0xf000 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: buffer_store_dwordx4 v[30:33], off, s[0:3], 0 offset:112 -; SI-NEXT: buffer_store_dwordx4 v[26:29], off, s[0:3], 0 offset:96 -; SI-NEXT: buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:80 -; SI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:64 -; SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48 -; SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32 -; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16 -; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; SI-NEXT: v_add_f64 v[28:29], s[4:5], v[16:17] +; SI-NEXT: v_mov_b32_e32 v17, s18 +; SI-NEXT: s_cselect_b32 s12, 0x3ff00000, 0 +; SI-NEXT: v_add_f64 v[26:27], s[10:11], v[16:17] +; SI-NEXT: v_mov_b32_e32 v17, s19 +; SI-NEXT: v_add_f64 v[32:33], s[8:9], v[16:17] +; SI-NEXT: v_mov_b32_e32 v17, s12 +; SI-NEXT: v_add_f64 v[30:31], s[14:15], v[16:17] +; SI-NEXT: s_mov_b32 s39, 0xf000 +; SI-NEXT: buffer_store_dwordx4 v[30:33], off, s[36:39], 0 offset:112 +; SI-NEXT: buffer_store_dwordx4 v[26:29], off, s[36:39], 0 offset:96 +; SI-NEXT: buffer_store_dwordx4 v[22:25], off, s[36:39], 0 offset:80 +; SI-NEXT: buffer_store_dwordx4 v[18:21], off, s[36:39], 0 offset:64 +; SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[36:39], 0 offset:48 +; SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[36:39], 0 offset:32 +; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[36:39], 0 offset:16 +; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 ; SI-NEXT: s_endpgm %y = call <16 x double> @llvm.ceil.v16f64(<16 x double> %x) nounwind readnone store <16 x double> %y, ptr addrspace(1) %out diff --git a/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll b/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll index f2a0193a655f0..c32c8c99265bb 100644 --- a/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll +++ b/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll @@ -451,52 +451,52 @@ define i128 @fptosi_f32_to_i128(float %x) { ; GISEL-NEXT: v_cmp_ge_i32_e32 vcc, -1, v4 ; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc ; GISEL-NEXT: v_and_b32_e32 v0, 1, v0 -; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc ; GISEL-NEXT: v_lshlrev_b16_e32 v2, 1, v0 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v2 +; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc ; GISEL-NEXT: v_lshlrev_b16_e32 v3, 2, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v0, v2 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v3 ; GISEL-NEXT: v_lshlrev_b16_e32 v7, 3, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v3 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v7 ; GISEL-NEXT: v_lshlrev_b16_e32 v8, 4, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v7 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v8 ; GISEL-NEXT: v_lshlrev_b16_e32 v9, 5, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v8 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v9 ; GISEL-NEXT: v_lshlrev_b16_e32 v10, 6, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v9 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v10 ; GISEL-NEXT: v_lshlrev_b16_e32 v11, 7, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v10 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v11 ; GISEL-NEXT: v_lshlrev_b16_e32 v12, 8, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v11 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v12 ; GISEL-NEXT: v_lshlrev_b16_e32 v13, 9, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v12 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v13 ; GISEL-NEXT: v_lshlrev_b16_e32 v14, 10, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v13 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v14 ; GISEL-NEXT: v_lshlrev_b16_e32 v15, 11, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v14 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v15 ; GISEL-NEXT: v_lshlrev_b16_e32 v16, 12, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v15 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v16 ; GISEL-NEXT: v_lshlrev_b16_e32 v17, 13, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v16 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v17 ; GISEL-NEXT: v_lshlrev_b16_e32 v18, 14, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v17 +; GISEL-NEXT: v_lshlrev_b16_e32 v19, 15, v0 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v2 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v2 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v3 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v3 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v7 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v7 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v8 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v8 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v9 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v9 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v10 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v10 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v11 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v11 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v12 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v12 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v13 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v13 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v14 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v14 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v15 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v15 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v16 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v16 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v17 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v17 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v18 ; GISEL-NEXT: v_or_b32_e32 v1, v1, v18 -; GISEL-NEXT: v_lshlrev_b16_e32 v0, 15, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v18 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v0 -; GISEL-NEXT: v_or_b32_e32 v0, v2, v0 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v19 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v19 ; GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v0 @@ -812,52 +812,52 @@ define i128 @fptosi_bf16_to_i128(bfloat %x) { ; GISEL-NEXT: v_cmp_ge_i16_e32 vcc, -1, v4 ; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc ; GISEL-NEXT: v_and_b32_e32 v0, 1, v0 -; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc ; GISEL-NEXT: v_lshlrev_b16_e32 v2, 1, v0 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v2 +; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc ; GISEL-NEXT: v_lshlrev_b16_e32 v3, 2, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v0, v2 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v3 ; GISEL-NEXT: v_lshlrev_b16_e32 v7, 3, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v3 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v7 ; GISEL-NEXT: v_lshlrev_b16_e32 v8, 4, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v7 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v8 ; GISEL-NEXT: v_lshlrev_b16_e32 v9, 5, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v8 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v9 ; GISEL-NEXT: v_lshlrev_b16_e32 v10, 6, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v9 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v10 ; GISEL-NEXT: v_lshlrev_b16_e32 v11, 7, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v10 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v11 ; GISEL-NEXT: v_lshlrev_b16_e32 v12, 8, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v11 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v12 ; GISEL-NEXT: v_lshlrev_b16_e32 v13, 9, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v12 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v13 ; GISEL-NEXT: v_lshlrev_b16_e32 v14, 10, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v13 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v14 ; GISEL-NEXT: v_lshlrev_b16_e32 v15, 11, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v14 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v15 ; GISEL-NEXT: v_lshlrev_b16_e32 v16, 12, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v15 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v16 ; GISEL-NEXT: v_lshlrev_b16_e32 v17, 13, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v16 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v17 ; GISEL-NEXT: v_lshlrev_b16_e32 v18, 14, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v17 +; GISEL-NEXT: v_lshlrev_b16_e32 v19, 15, v0 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v2 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v2 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v3 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v3 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v7 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v7 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v8 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v8 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v9 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v9 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v10 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v10 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v11 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v11 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v12 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v12 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v13 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v13 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v14 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v14 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v15 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v15 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v16 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v16 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v17 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v17 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v18 ; GISEL-NEXT: v_or_b32_e32 v1, v1, v18 -; GISEL-NEXT: v_lshlrev_b16_e32 v0, 15, v0 -; GISEL-NEXT: v_or_b32_e32 v2, v2, v18 -; GISEL-NEXT: v_or_b32_e32 v1, v1, v0 -; GISEL-NEXT: v_or_b32_e32 v0, v2, v0 +; GISEL-NEXT: v_or_b32_e32 v0, v0, v19 +; GISEL-NEXT: v_or_b32_e32 v1, v1, v19 ; GISEL-NEXT: v_and_b32_e32 v9, 0xffff, v0 ; GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; GISEL-NEXT: v_lshlrev_b32_e32 v0, 16, v9 diff --git a/llvm/test/CodeGen/AMDGPU/freeze.ll b/llvm/test/CodeGen/AMDGPU/freeze.ll index 795ace141e019..573a5a433c013 100644 --- a/llvm/test/CodeGen/AMDGPU/freeze.ll +++ b/llvm/test/CodeGen/AMDGPU/freeze.ll @@ -2933,17 +2933,17 @@ define void @freeze_v17i32(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-GISEL-NEXT: v_add_u32_e32 v4, vcc, 16, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v8, vcc, 32, v0 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v9, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[4:7], v[4:5] -; GFX8-GISEL-NEXT: flat_load_dwordx4 v[8:11], v[8:9] +; GFX8-GISEL-NEXT: flat_load_dwordx4 v[8:11], v[0:1] +; GFX8-GISEL-NEXT: v_add_u32_e32 v12, vcc, 32, v0 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v13, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v16, vcc, 48, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v18, vcc, 64, v0 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v19, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: flat_load_dwordx4 v[12:15], v[0:1] -; GFX8-GISEL-NEXT: flat_load_dword v20, v[18:19] +; GFX8-GISEL-NEXT: flat_load_dwordx4 v[12:15], v[12:13] +; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 64, v0 ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[16:19], v[16:17] +; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc +; GFX8-GISEL-NEXT: flat_load_dword v20, v[0:1] ; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 16, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(4) @@ -2952,13 +2952,15 @@ define void @freeze_v17i32(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v4, vcc, 48, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v3, vcc -; GFX8-GISEL-NEXT: s_waitcnt vmcnt(3) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[2:3], v[12:15] +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(4) +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[2:3], v[8:11] ; GFX8-GISEL-NEXT: v_add_u32_e32 v2, vcc, 64, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[0:1], v[8:11] -; GFX8-GISEL-NEXT: s_waitcnt vmcnt(3) +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(4) +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[0:1], v[12:15] +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(4) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[4:5], v[16:19] +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(4) ; GFX8-GISEL-NEXT: flat_store_dword v[2:3], v20 ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31] @@ -4135,22 +4137,22 @@ define void @freeze_v21i32(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GFX803-SDAG-LABEL: freeze_v21i32: ; GFX8-GFX803-SDAG: ; %bb.0: ; GFX8-GFX803-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v20, vcc, 16, v0 -; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v21, vcc, 0, v1, vcc ; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v4, vcc, 64, v0 ; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc -; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[4:7], v[4:5] -; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v16, vcc, 48, v0 -; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc ; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v8, vcc, 32, v0 +; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v9, vcc, 0, v1, vcc ; GFX8-GFX803-SDAG-NEXT: s_movk_i32 s4, 0x50 -; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[8:11], v[8:9] ; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v12, vcc, s4, v0 ; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v13, vcc, 0, v1, vcc +; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v20, vcc, 16, v0 +; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[8:11], v[8:9] +; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v21, vcc, 0, v1, vcc ; GFX8-GFX803-SDAG-NEXT: flat_load_dword v24, v[12:13] ; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[12:15], v[0:1] -; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[16:19], v[16:17] +; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v0, vcc, 48, v0 +; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc +; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[16:19], v[0:1] ; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[20:23], v[20:21] ; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v0, vcc, 64, v2 ; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc @@ -4181,42 +4183,43 @@ define void @freeze_v21i32(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-GISEL-NEXT: v_add_u32_e32 v4, vcc, 16, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_mov_b32_e32 v6, 0x50 -; GFX8-GISEL-NEXT: v_add_u32_e32 v8, vcc, v0, v6 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v9, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v12, vcc, 32, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v13, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v16, vcc, 48, v0 ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[4:7], v[4:5] -; GFX8-GISEL-NEXT: flat_load_dword v26, v[8:9] -; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[8:11], v[0:1] +; GFX8-GISEL-NEXT: v_add_u32_e32 v16, vcc, 48, v0 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc +; GFX8-GISEL-NEXT: v_mov_b32_e32 v14, 0x50 +; GFX8-GISEL-NEXT: v_add_u32_e32 v24, vcc, v0, v14 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v25, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 64, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[12:15], v[12:13] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[16:19], v[16:17] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[20:23], v[0:1] -; GFX8-GISEL-NEXT: v_add_u32_e32 v24, vcc, 16, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v25, vcc, 0, v3, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 32, v2 +; GFX8-GISEL-NEXT: flat_load_dword v24, v[24:25] +; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 16, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(5) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[24:25], v[4:7] -; GFX8-GISEL-NEXT: s_waitcnt vmcnt(4) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[2:3], v[8:11] +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[0:1], v[4:7] +; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 32, v2 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v4, vcc, 48, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v6, vcc, 0x50, v2 +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(5) +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[2:3], v[8:11] +; GFX8-GISEL-NEXT: v_addc_u32_e32 v7, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: v_add_u32_e64 v8, s[4:5], 64, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e64 v9, s[4:5], 0, v3, s[4:5] -; GFX8-GISEL-NEXT: v_addc_u32_e32 v7, vcc, 0, v3, vcc -; GFX8-GISEL-NEXT: s_waitcnt vmcnt(4) +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(5) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[0:1], v[12:15] -; GFX8-GISEL-NEXT: s_waitcnt vmcnt(4) +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(5) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[4:5], v[16:19] -; GFX8-GISEL-NEXT: s_waitcnt vmcnt(4) +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(5) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[8:9], v[20:23] -; GFX8-GISEL-NEXT: flat_store_dword v[6:7], v26 +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(5) +; GFX8-GISEL-NEXT: flat_store_dword v[6:7], v24 ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31] ; @@ -4952,11 +4955,11 @@ define void @freeze_v30i32(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: v_add_u32_e64 v34, s[4:5], 64, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e64 v35, s[4:5], 0, v3, s[4:5] ; GFX8-GISEL-NEXT: s_mov_b64 s[4:5], vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v8, vcc, 0x60, v2 +; GFX8-GISEL-NEXT: v_add_u32_e32 v36, vcc, 0x60, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e64 v33, s[4:5], 0, v3, s[4:5] ; GFX8-GISEL-NEXT: s_mov_b64 s[4:5], vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v2, vcc, 0x70, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e64 v9, s[4:5], 0, v3, s[4:5] +; GFX8-GISEL-NEXT: v_addc_u32_e64 v37, s[4:5], 0, v3, s[4:5] ; GFX8-GISEL-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[4:5], v[12:15] @@ -4967,7 +4970,7 @@ define void @freeze_v30i32(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[32:33], v[24:27] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[8:9], v[28:31] +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[36:37], v[28:31] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) ; GFX8-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) @@ -5374,9 +5377,9 @@ define void @freeze_v31i32(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v12, vcc, 32, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v13, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v16, vcc, 48, v0 ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[8:11], v[0:1] +; GFX8-GISEL-NEXT: v_add_u32_e32 v16, vcc, 48, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v20, vcc, 64, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v21, vcc, 0, v1, vcc @@ -5403,27 +5406,28 @@ define void @freeze_v31i32(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v4, vcc, 48, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v3, vcc +; GFX8-GISEL-NEXT: v_add_u32_e32 v6, vcc, v2, v35 +; GFX8-GISEL-NEXT: v_add_u32_e64 v35, s[4:5], 64, v2 +; GFX8-GISEL-NEXT: v_addc_u32_e64 v36, s[4:5], 0, v3, s[4:5] +; GFX8-GISEL-NEXT: s_mov_b64 s[4:5], vcc ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[2:3], v[8:11] -; GFX8-GISEL-NEXT: v_add_u32_e32 v6, vcc, v2, v35 -; GFX8-GISEL-NEXT: v_add_u32_e64 v8, s[4:5], 64, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e64 v9, s[4:5], 0, v3, s[4:5] +; GFX8-GISEL-NEXT: v_addc_u32_e64 v7, s[4:5], 0, v3, s[4:5] +; GFX8-GISEL-NEXT: v_add_u32_e32 v8, vcc, 0x60, v2 ; GFX8-GISEL-NEXT: s_mov_b64 s[4:5], vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v10, vcc, 0x60, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v11, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v2, vcc, 0x70, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e64 v7, s[4:5], 0, v3, s[4:5] +; GFX8-GISEL-NEXT: v_addc_u32_e64 v9, s[4:5], 0, v3, s[4:5] ; GFX8-GISEL-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[0:1], v[12:15] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[4:5], v[16:19] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[8:9], v[20:23] +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[35:36], v[20:23] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[6:7], v[24:27] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[10:11], v[28:31] +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[8:9], v[28:31] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) ; GFX8-GISEL-NEXT: flat_store_dwordx3 v[2:3], v[32:34] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) @@ -5766,11 +5770,11 @@ define void @freeze_v32i32(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v24, vcc, 32, v0 ; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[8:11], v[8:9] ; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v25, vcc, 0, v1, vcc +; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v12, vcc, 64, v0 ; GFX8-GFX803-SDAG-NEXT: s_movk_i32 s6, 0x50 +; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v13, vcc, 0, v1, vcc ; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v20, vcc, s6, v0 ; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v21, vcc, 0, v1, vcc -; GFX8-GFX803-SDAG-NEXT: v_add_u32_e32 v12, vcc, 64, v0 -; GFX8-GFX803-SDAG-NEXT: v_addc_u32_e32 v13, vcc, 0, v1, vcc ; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[12:15], v[12:13] ; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[16:19], v[0:1] ; GFX8-GFX803-SDAG-NEXT: flat_load_dwordx4 v[20:23], v[20:21] @@ -5818,13 +5822,13 @@ define void @freeze_v32i32(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: v_add_u32_e32 v12, vcc, 32, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v13, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v16, vcc, 48, v0 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v20, vcc, 64, v0 ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[8:11], v[0:1] +; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc +; GFX8-GISEL-NEXT: v_add_u32_e32 v20, vcc, 64, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v21, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_mov_b32_e32 v38, 0x50 -; GFX8-GISEL-NEXT: v_add_u32_e32 v24, vcc, v0, v38 +; GFX8-GISEL-NEXT: v_mov_b32_e32 v36, 0x50 +; GFX8-GISEL-NEXT: v_add_u32_e32 v24, vcc, v0, v36 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v25, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: v_mov_b32_e32 v14, 0x60 ; GFX8-GISEL-NEXT: v_add_u32_e32 v28, vcc, v0, v14 @@ -5838,24 +5842,25 @@ define void @freeze_v32i32(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[24:27], v[24:25] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[28:31], v[28:29] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[32:35], v[0:1] -; GFX8-GISEL-NEXT: v_add_u32_e32 v36, vcc, 16, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v37, vcc, 0, v3, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 32, v2 +; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 16, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[36:37], v[4:7] -; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[2:3], v[8:11] +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[0:1], v[4:7] +; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 32, v2 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v4, vcc, 48, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v3, vcc +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[2:3], v[8:11] +; GFX8-GISEL-NEXT: v_add_u32_e32 v6, vcc, v2, v36 ; GFX8-GISEL-NEXT: v_add_u32_e64 v8, s[4:5], 64, v2 -; GFX8-GISEL-NEXT: v_add_u32_e32 v6, vcc, v2, v38 ; GFX8-GISEL-NEXT: v_addc_u32_e64 v9, s[4:5], 0, v3, s[4:5] ; GFX8-GISEL-NEXT: s_mov_b64 s[4:5], vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v10, vcc, 0x60, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v11, vcc, 0, v3, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v2, vcc, 0x70, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e64 v7, s[4:5], 0, v3, s[4:5] +; GFX8-GISEL-NEXT: s_mov_b64 s[4:5], vcc +; GFX8-GISEL-NEXT: v_add_u32_e32 v2, vcc, 0x70, v2 +; GFX8-GISEL-NEXT: v_addc_u32_e64 v11, s[4:5], 0, v3, s[4:5] ; GFX8-GISEL-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[0:1], v[12:15] @@ -10338,13 +10343,13 @@ define void @freeze_v16p0(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: v_add_u32_e32 v12, vcc, 32, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v13, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v16, vcc, 48, v0 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v20, vcc, 64, v0 ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[8:11], v[0:1] +; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc +; GFX8-GISEL-NEXT: v_add_u32_e32 v20, vcc, 64, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v21, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_mov_b32_e32 v38, 0x50 -; GFX8-GISEL-NEXT: v_add_u32_e32 v24, vcc, v0, v38 +; GFX8-GISEL-NEXT: v_mov_b32_e32 v36, 0x50 +; GFX8-GISEL-NEXT: v_add_u32_e32 v24, vcc, v0, v36 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v25, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: v_mov_b32_e32 v14, 0x60 ; GFX8-GISEL-NEXT: v_add_u32_e32 v28, vcc, v0, v14 @@ -10358,24 +10363,25 @@ define void @freeze_v16p0(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[24:27], v[24:25] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[28:31], v[28:29] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[32:35], v[0:1] -; GFX8-GISEL-NEXT: v_add_u32_e32 v36, vcc, 16, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v37, vcc, 0, v3, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 32, v2 +; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 16, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[36:37], v[4:7] -; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[2:3], v[8:11] +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[0:1], v[4:7] +; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 32, v2 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v4, vcc, 48, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v3, vcc +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[2:3], v[8:11] +; GFX8-GISEL-NEXT: v_add_u32_e32 v6, vcc, v2, v36 ; GFX8-GISEL-NEXT: v_add_u32_e64 v8, s[4:5], 64, v2 -; GFX8-GISEL-NEXT: v_add_u32_e32 v6, vcc, v2, v38 ; GFX8-GISEL-NEXT: v_addc_u32_e64 v9, s[4:5], 0, v3, s[4:5] ; GFX8-GISEL-NEXT: s_mov_b64 s[4:5], vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v10, vcc, 0x60, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v11, vcc, 0, v3, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v2, vcc, 0x70, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e64 v7, s[4:5], 0, v3, s[4:5] +; GFX8-GISEL-NEXT: s_mov_b64 s[4:5], vcc +; GFX8-GISEL-NEXT: v_add_u32_e32 v2, vcc, 0x70, v2 +; GFX8-GISEL-NEXT: v_addc_u32_e64 v11, s[4:5], 0, v3, s[4:5] ; GFX8-GISEL-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[0:1], v[12:15] @@ -11563,13 +11569,13 @@ define void @freeze_v16p1(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: v_add_u32_e32 v12, vcc, 32, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v13, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v16, vcc, 48, v0 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v20, vcc, 64, v0 ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[8:11], v[0:1] +; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v1, vcc +; GFX8-GISEL-NEXT: v_add_u32_e32 v20, vcc, 64, v0 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v21, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_mov_b32_e32 v38, 0x50 -; GFX8-GISEL-NEXT: v_add_u32_e32 v24, vcc, v0, v38 +; GFX8-GISEL-NEXT: v_mov_b32_e32 v36, 0x50 +; GFX8-GISEL-NEXT: v_add_u32_e32 v24, vcc, v0, v36 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v25, vcc, 0, v1, vcc ; GFX8-GISEL-NEXT: v_mov_b32_e32 v14, 0x60 ; GFX8-GISEL-NEXT: v_add_u32_e32 v28, vcc, v0, v14 @@ -11583,24 +11589,25 @@ define void @freeze_v16p1(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) { ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[24:27], v[24:25] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[28:31], v[28:29] ; GFX8-GISEL-NEXT: flat_load_dwordx4 v[32:35], v[0:1] -; GFX8-GISEL-NEXT: v_add_u32_e32 v36, vcc, 16, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v37, vcc, 0, v3, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 32, v2 +; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 16, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[36:37], v[4:7] -; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) -; GFX8-GISEL-NEXT: flat_store_dwordx4 v[2:3], v[8:11] +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[0:1], v[4:7] +; GFX8-GISEL-NEXT: v_add_u32_e32 v0, vcc, 32, v2 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v4, vcc, 48, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e32 v5, vcc, 0, v3, vcc +; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) +; GFX8-GISEL-NEXT: flat_store_dwordx4 v[2:3], v[8:11] +; GFX8-GISEL-NEXT: v_add_u32_e32 v6, vcc, v2, v36 ; GFX8-GISEL-NEXT: v_add_u32_e64 v8, s[4:5], 64, v2 -; GFX8-GISEL-NEXT: v_add_u32_e32 v6, vcc, v2, v38 ; GFX8-GISEL-NEXT: v_addc_u32_e64 v9, s[4:5], 0, v3, s[4:5] ; GFX8-GISEL-NEXT: s_mov_b64 s[4:5], vcc ; GFX8-GISEL-NEXT: v_add_u32_e32 v10, vcc, 0x60, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v11, vcc, 0, v3, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v2, vcc, 0x70, v2 ; GFX8-GISEL-NEXT: v_addc_u32_e64 v7, s[4:5], 0, v3, s[4:5] +; GFX8-GISEL-NEXT: s_mov_b64 s[4:5], vcc +; GFX8-GISEL-NEXT: v_add_u32_e32 v2, vcc, 0x70, v2 +; GFX8-GISEL-NEXT: v_addc_u32_e64 v11, s[4:5], 0, v3, s[4:5] ; GFX8-GISEL-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(7) ; GFX8-GISEL-NEXT: flat_store_dwordx4 v[0:1], v[12:15] diff --git a/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll b/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll index fea6a729ed986..6973200130941 100644 --- a/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll +++ b/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll @@ -1607,11 +1607,9 @@ define void @void_func_v32i32_v2i32_v2f32_inreg(<32 x i32> inreg %arg0, <2 x i32 ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: v_readfirstlane_b32 s4, v19 -; GFX9-NEXT: v_readfirstlane_b32 s5, v18 -; GFX9-NEXT: v_mov_b32_e32 v18, s5 ; GFX9-NEXT: v_mov_b32_e32 v19, s4 ; GFX9-NEXT: v_readfirstlane_b32 s4, v1 -; GFX9-NEXT: v_readfirstlane_b32 s5, v0 +; GFX9-NEXT: v_readfirstlane_b32 s7, v0 ; GFX9-NEXT: v_readfirstlane_b32 s10, v3 ; GFX9-NEXT: v_readfirstlane_b32 s11, v2 ; GFX9-NEXT: v_mov_b32_e32 v0, s24 @@ -1658,29 +1656,31 @@ define void @void_func_v32i32_v2i32_v2f32_inreg(<32 x i32> inreg %arg0, <2 x i32 ; GFX9-NEXT: v_readfirstlane_b32 s9, v4 ; GFX9-NEXT: global_store_dwordx4 v[0:1], v[0:3], off ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_readfirstlane_b32 s6, v21 +; GFX9-NEXT: v_readfirstlane_b32 s5, v18 ; GFX9-NEXT: v_mov_b32_e32 v0, s15 ; GFX9-NEXT: v_mov_b32_e32 v1, s14 ; GFX9-NEXT: v_mov_b32_e32 v2, s13 ; GFX9-NEXT: v_mov_b32_e32 v3, s12 ; GFX9-NEXT: global_store_dwordx4 v[0:1], v[0:3], off ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_readfirstlane_b32 s7, v20 +; GFX9-NEXT: v_readfirstlane_b32 s6, v21 ; GFX9-NEXT: v_mov_b32_e32 v0, s11 ; GFX9-NEXT: v_mov_b32_e32 v1, s10 ; GFX9-NEXT: v_mov_b32_e32 v2, s9 ; GFX9-NEXT: v_mov_b32_e32 v3, s8 +; GFX9-NEXT: v_mov_b32_e32 v18, s5 +; GFX9-NEXT: v_readfirstlane_b32 s5, v20 ; GFX9-NEXT: global_store_dwordx4 v[0:1], v[0:3], off ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: v_mov_b32_e32 v0, s28 ; GFX9-NEXT: v_mov_b32_e32 v1, s29 -; GFX9-NEXT: v_mov_b32_e32 v2, s5 +; GFX9-NEXT: v_mov_b32_e32 v2, s7 ; GFX9-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NEXT: global_store_dwordx4 v[0:1], v[0:3], off ; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: global_store_dwordx2 v[0:1], v[18:19], off ; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_mov_b32_e32 v0, s7 +; GFX9-NEXT: v_mov_b32_e32 v0, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s6 ; GFX9-NEXT: global_store_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: s_waitcnt vmcnt(0) diff --git a/llvm/test/CodeGen/AMDGPU/function-args.ll b/llvm/test/CodeGen/AMDGPU/function-args.ll index 07dcad993ffe2..cd166b67c7e4c 100644 --- a/llvm/test/CodeGen/AMDGPU/function-args.ll +++ b/llvm/test/CodeGen/AMDGPU/function-args.ll @@ -1409,43 +1409,43 @@ define void @void_func_v32i8(<32 x i8> %arg0) #0 { ; CI-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; CI-NEXT: v_and_b32_e32 v0, 0xff, v0 ; CI-NEXT: v_and_b32_e32 v9, 0xff, v14 -; CI-NEXT: v_and_b32_e32 v10, 0xff, v10 ; CI-NEXT: v_and_b32_e32 v6, 0xff, v6 ; CI-NEXT: v_or_b32_e32 v12, v12, v13 ; CI-NEXT: v_or_b32_e32 v0, v0, v1 ; CI-NEXT: v_lshlrev_b32_e32 v1, 24, v15 -; CI-NEXT: v_lshlrev_b32_e32 v11, 24, v11 ; CI-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; CI-NEXT: v_and_b32_e32 v2, 0xff, v2 ; CI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 -; CI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; CI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; CI-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; CI-NEXT: v_lshlrev_b32_e32 v13, 8, v29 ; CI-NEXT: v_and_b32_e32 v14, 0xff, v28 +; CI-NEXT: v_lshlrev_b32_e32 v15, 24, v27 ; CI-NEXT: v_and_b32_e32 v26, 0xff, v26 -; CI-NEXT: v_lshlrev_b32_e32 v25, 8, v25 -; CI-NEXT: v_and_b32_e32 v24, 0xff, v24 +; CI-NEXT: v_and_b32_e32 v27, 0xff, v30 ; CI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; CI-NEXT: v_or_b32_e32 v1, v1, v9 -; CI-NEXT: v_or_b32_e32 v9, v11, v10 -; CI-NEXT: v_and_b32_e32 v10, 0xffff, v12 +; CI-NEXT: v_and_b32_e32 v9, 0xffff, v12 ; CI-NEXT: v_or_b32_e32 v6, v7, v6 ; CI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; CI-NEXT: v_lshlrev_b32_e32 v15, 24, v27 -; CI-NEXT: v_and_b32_e32 v27, 0xff, v30 ; CI-NEXT: v_or_b32_e32 v13, v14, v13 ; CI-NEXT: v_lshlrev_b32_e32 v14, 16, v26 +; CI-NEXT: v_lshlrev_b32_e32 v26, 16, v27 ; CI-NEXT: v_or_b32_e32 v7, v3, v2 -; CI-NEXT: v_or_b32_e32 v3, v10, v1 +; CI-NEXT: v_or_b32_e32 v3, v9, v1 ; CI-NEXT: v_or_b32_e32 v1, v4, v6 -; CI-NEXT: v_lshlrev_b32_e32 v26, 16, v27 -; CI-NEXT: v_or_b32_e32 v11, v15, v14 +; CI-NEXT: v_and_b32_e32 v10, 0xff, v10 +; CI-NEXT: v_lshlrev_b32_e32 v25, 8, v25 +; CI-NEXT: v_and_b32_e32 v24, 0xff, v24 ; CI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; CI-NEXT: v_and_b32_e32 v12, 0xffff, v13 -; CI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; CI-NEXT: v_lshlrev_b32_e32 v11, 24, v11 +; CI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; CI-NEXT: v_or_b32_e32 v0, v0, v7 -; CI-NEXT: v_or_b32_e32 v2, v8, v9 +; CI-NEXT: v_or_b32_e32 v10, v11, v10 +; CI-NEXT: v_or_b32_e32 v11, v15, v14 +; CI-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; CI-NEXT: v_or_b32_e32 v2, v8, v10 ; CI-NEXT: v_and_b32_e32 v8, 0xff, v20 ; CI-NEXT: v_and_b32_e32 v9, 0xff, v16 ; CI-NEXT: s_mov_b64 s[4:5], 16 @@ -1453,12 +1453,12 @@ define void @void_func_v32i8(<32 x i8> %arg0) #0 { ; CI-NEXT: s_mov_b32 s6, -1 ; CI-NEXT: s_waitcnt vmcnt(0) ; CI-NEXT: v_lshlrev_b32_e32 v4, 24, v5 -; CI-NEXT: v_or_b32_e32 v5, v24, v25 -; CI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; CI-NEXT: v_or_b32_e32 v4, v4, v26 -; CI-NEXT: v_or_b32_e32 v6, v5, v11 -; CI-NEXT: v_and_b32_e32 v5, 0xff, v22 ; CI-NEXT: v_or_b32_e32 v7, v12, v4 +; CI-NEXT: v_or_b32_e32 v4, v24, v25 +; CI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; CI-NEXT: v_and_b32_e32 v5, 0xff, v22 +; CI-NEXT: v_or_b32_e32 v6, v4, v11 ; CI-NEXT: v_lshlrev_b32_e32 v4, 24, v23 ; CI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; CI-NEXT: v_or_b32_e32 v4, v4, v5 @@ -2495,9 +2495,9 @@ define void @void_func_v32i32_i32_i64(<32 x i32> %arg0, i32 %arg1, i64 %arg2) #0 ; CIGFX89: ; %bb.0: ; CIGFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; CIGFX89-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; CIGFX89-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:4 ; CIGFX89-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:12 ; CIGFX89-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:8 -; CIGFX89-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:4 ; CIGFX89-NEXT: s_mov_b32 s7, 0xf000 ; CIGFX89-NEXT: s_mov_b32 s6, -1 ; CIGFX89-NEXT: s_waitcnt vmcnt(3) @@ -2875,11 +2875,11 @@ define void @void_func_v32i32_v2i16_v2f16_v2bf16_v4bf16(<32 x i32> %arg0, <2 x i ; GFX89: ; %bb.0: ; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX89-NEXT: buffer_load_dword v31, off, s[0:3], s32 +; GFX89-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:4 +; GFX89-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:12 +; GFX89-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:8 ; GFX89-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:20 ; GFX89-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:16 -; GFX89-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:4 -; GFX89-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:8 -; GFX89-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:12 ; GFX89-NEXT: s_mov_b32 s7, 0xf000 ; GFX89-NEXT: s_mov_b32 s6, -1 ; GFX89-NEXT: s_waitcnt vmcnt(5) @@ -2901,10 +2901,10 @@ define void @void_func_v32i32_v2i16_v2f16_v2bf16_v4bf16(<32 x i32> %arg0, <2 x i ; GFX89-NEXT: s_waitcnt vmcnt(0) ; GFX89-NEXT: buffer_store_dword v34, off, s[4:7], 0 ; GFX89-NEXT: s_waitcnt vmcnt(0) -; GFX89-NEXT: buffer_store_dword v35, off, s[4:7], 0 -; GFX89-NEXT: s_waitcnt vmcnt(0) ; GFX89-NEXT: buffer_store_dword v36, off, s[4:7], 0 ; GFX89-NEXT: s_waitcnt vmcnt(0) +; GFX89-NEXT: buffer_store_dword v35, off, s[4:7], 0 +; GFX89-NEXT: s_waitcnt vmcnt(0) ; GFX89-NEXT: buffer_store_dwordx2 v[32:33], off, s[4:7], 0 ; GFX89-NEXT: s_waitcnt vmcnt(0) ; GFX89-NEXT: s_setpc_b64 s[30:31] @@ -3122,7 +3122,6 @@ define void @void_func_v32i32_v4i32_v4f32(<32 x i32> %arg0, <4 x i32> %arg1, <4 ; CIGFX89: ; %bb.0: ; CIGFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; CIGFX89-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; CIGFX89-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:20 ; CIGFX89-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:16 ; CIGFX89-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:12 ; CIGFX89-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 @@ -3130,6 +3129,7 @@ define void @void_func_v32i32_v4i32_v4f32(<32 x i32> %arg0, <4 x i32> %arg1, <4 ; CIGFX89-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:32 ; CIGFX89-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:28 ; CIGFX89-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:24 +; CIGFX89-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:20 ; CIGFX89-NEXT: s_mov_b32 s7, 0xf000 ; CIGFX89-NEXT: s_mov_b32 s6, -1 ; CIGFX89-NEXT: s_waitcnt vmcnt(8) @@ -3205,8 +3205,6 @@ define void @void_func_v32i32_v8i32_v8f32(<32 x i32> %arg0, <8 x i32> %arg1, <8 ; CI: ; %bb.0: ; CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; CI-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; CI-NEXT: s_mov_b32 s7, 0xf000 -; CI-NEXT: s_mov_b32 s6, -1 ; CI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:16 ; CI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:12 ; CI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 @@ -3214,6 +3212,8 @@ define void @void_func_v32i32_v8i32_v8f32(<32 x i32> %arg0, <8 x i32> %arg1, <8 ; CI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:32 ; CI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:28 ; CI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:24 +; CI-NEXT: s_mov_b32 s7, 0xf000 +; CI-NEXT: s_mov_b32 s6, -1 ; CI-NEXT: s_waitcnt vmcnt(7) ; CI-NEXT: buffer_store_dwordx4 v[28:31], off, s[4:7], 0 ; CI-NEXT: s_waitcnt vmcnt(0) @@ -3254,8 +3254,6 @@ define void @void_func_v32i32_v8i32_v8f32(<32 x i32> %arg0, <8 x i32> %arg1, <8 ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; VI-NEXT: s_mov_b32 s7, 0xf000 -; VI-NEXT: s_mov_b32 s6, -1 ; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:16 ; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:12 ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 @@ -3263,6 +3261,8 @@ define void @void_func_v32i32_v8i32_v8f32(<32 x i32> %arg0, <8 x i32> %arg1, <8 ; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:32 ; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:28 ; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:24 +; VI-NEXT: s_mov_b32 s7, 0xf000 +; VI-NEXT: s_mov_b32 s6, -1 ; VI-NEXT: s_waitcnt vmcnt(7) ; VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[4:7], 0 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -3303,8 +3303,6 @@ define void @void_func_v32i32_v8i32_v8f32(<32 x i32> %arg0, <8 x i32> %arg1, <8 ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; GFX9-NEXT: s_mov_b32 s7, 0xf000 -; GFX9-NEXT: s_mov_b32 s6, -1 ; GFX9-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:16 ; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:12 ; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8 @@ -3312,6 +3310,8 @@ define void @void_func_v32i32_v8i32_v8f32(<32 x i32> %arg0, <8 x i32> %arg1, <8 ; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:32 ; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:28 ; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:24 +; GFX9-NEXT: s_mov_b32 s7, 0xf000 +; GFX9-NEXT: s_mov_b32 s6, -1 ; GFX9-NEXT: s_waitcnt vmcnt(7) ; GFX9-NEXT: buffer_store_dwordx4 v[28:31], off, s[4:7], 0 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -3417,11 +3417,11 @@ define void @void_func_v32i32_v16i32_v16f32(<32 x i32> %arg0, <16 x i32> %arg1, ; CI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:60 ; CI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:56 ; CI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:52 -; CI-NEXT: s_mov_b32 s7, 0xf000 -; CI-NEXT: s_mov_b32 s6, -1 ; CI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:48 ; CI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:44 ; CI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:40 +; CI-NEXT: s_mov_b32 s7, 0xf000 +; CI-NEXT: s_mov_b32 s6, -1 ; CI-NEXT: s_waitcnt vmcnt(7) ; CI-NEXT: buffer_store_dwordx4 v[28:31], off, s[4:7], 0 ; CI-NEXT: s_waitcnt vmcnt(0) @@ -3490,11 +3490,11 @@ define void @void_func_v32i32_v16i32_v16f32(<32 x i32> %arg0, <16 x i32> %arg1, ; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:60 ; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:56 ; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:52 -; VI-NEXT: s_mov_b32 s7, 0xf000 -; VI-NEXT: s_mov_b32 s6, -1 ; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:48 ; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:44 ; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:40 +; VI-NEXT: s_mov_b32 s7, 0xf000 +; VI-NEXT: s_mov_b32 s6, -1 ; VI-NEXT: s_waitcnt vmcnt(7) ; VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[4:7], 0 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -3563,11 +3563,11 @@ define void @void_func_v32i32_v16i32_v16f32(<32 x i32> %arg0, <16 x i32> %arg1, ; GFX9-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:60 ; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:56 ; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:52 -; GFX9-NEXT: s_mov_b32 s7, 0xf000 -; GFX9-NEXT: s_mov_b32 s6, -1 ; GFX9-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:48 ; GFX9-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:44 ; GFX9-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:40 +; GFX9-NEXT: s_mov_b32 s7, 0xf000 +; GFX9-NEXT: s_mov_b32 s6, -1 ; GFX9-NEXT: s_waitcnt vmcnt(7) ; GFX9-NEXT: buffer_store_dwordx4 v[28:31], off, s[4:7], 0 ; GFX9-NEXT: s_waitcnt vmcnt(0) @@ -3912,8 +3912,6 @@ define void @void_func_v32i32_v16i8(<32 x i32> %arg0, <16 x i8> %arg1) #0 { ; CI: ; %bb.0: ; CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; CI-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; CI-NEXT: s_mov_b32 s7, 0xf000 -; CI-NEXT: s_mov_b32 s6, -1 ; CI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:48 ; CI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:60 ; CI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 @@ -3921,6 +3919,8 @@ define void @void_func_v32i32_v16i8(<32 x i32> %arg0, <16 x i8> %arg1) #0 { ; CI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:56 ; CI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:36 ; CI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:40 +; CI-NEXT: s_mov_b32 s7, 0xf000 +; CI-NEXT: s_mov_b32 s6, -1 ; CI-NEXT: s_waitcnt vmcnt(7) ; CI-NEXT: buffer_store_dwordx4 v[28:31], off, s[4:7], 0 ; CI-NEXT: s_waitcnt vmcnt(0) @@ -3985,8 +3985,6 @@ define void @void_func_v32i32_v16i8(<32 x i32> %arg0, <16 x i8> %arg1) #0 { ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; VI-NEXT: s_mov_b32 s7, 0xf000 -; VI-NEXT: s_mov_b32 s6, -1 ; VI-NEXT: buffer_load_ubyte v32, off, s[0:3], s32 offset:48 ; VI-NEXT: buffer_load_ubyte v33, off, s[0:3], s32 offset:60 ; VI-NEXT: buffer_load_ubyte v34, off, s[0:3], s32 offset:64 @@ -3994,6 +3992,8 @@ define void @void_func_v32i32_v16i8(<32 x i32> %arg0, <16 x i8> %arg1) #0 { ; VI-NEXT: buffer_load_ubyte v36, off, s[0:3], s32 offset:56 ; VI-NEXT: buffer_load_ubyte v37, off, s[0:3], s32 offset:36 ; VI-NEXT: buffer_load_ubyte v38, off, s[0:3], s32 offset:40 +; VI-NEXT: s_mov_b32 s7, 0xf000 +; VI-NEXT: s_mov_b32 s6, -1 ; VI-NEXT: s_waitcnt vmcnt(7) ; VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[4:7], 0 ; VI-NEXT: s_waitcnt vmcnt(0) @@ -4058,8 +4058,6 @@ define void @void_func_v32i32_v16i8(<32 x i32> %arg0, <16 x i8> %arg1) #0 { ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; GFX9-NEXT: s_mov_b32 s7, 0xf000 -; GFX9-NEXT: s_mov_b32 s6, -1 ; GFX9-NEXT: buffer_load_ubyte v32, off, s[0:3], s32 offset:48 ; GFX9-NEXT: buffer_load_ubyte v33, off, s[0:3], s32 offset:60 ; GFX9-NEXT: buffer_load_ubyte v34, off, s[0:3], s32 offset:64 @@ -4067,6 +4065,8 @@ define void @void_func_v32i32_v16i8(<32 x i32> %arg0, <16 x i8> %arg1) #0 { ; GFX9-NEXT: buffer_load_ubyte v36, off, s[0:3], s32 offset:56 ; GFX9-NEXT: buffer_load_ubyte v37, off, s[0:3], s32 offset:36 ; GFX9-NEXT: buffer_load_ubyte v38, off, s[0:3], s32 offset:40 +; GFX9-NEXT: s_mov_b32 s7, 0xf000 +; GFX9-NEXT: s_mov_b32 s6, -1 ; GFX9-NEXT: s_waitcnt vmcnt(7) ; GFX9-NEXT: buffer_store_dwordx4 v[28:31], off, s[4:7], 0 ; GFX9-NEXT: s_waitcnt vmcnt(0) diff --git a/llvm/test/CodeGen/AMDGPU/function-returns.ll b/llvm/test/CodeGen/AMDGPU/function-returns.ll index a7665ee31e608..b5cbba4a8bdec 100644 --- a/llvm/test/CodeGen/AMDGPU/function-returns.ll +++ b/llvm/test/CodeGen/AMDGPU/function-returns.ll @@ -1289,48 +1289,48 @@ define <33 x i32> @v33i32_func_void() #0 { ; CI-NEXT: v_add_i32_e32 v3, vcc, 0x74, v0 ; CI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0 +; CI-NEXT: v_add_i32_e32 v3, vcc, 0x6c, v0 ; CI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v1, vcc, 0x6c, v0 -; CI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0 -; CI-NEXT: v_add_i32_e32 v3, vcc, 0x64, v0 +; CI-NEXT: v_add_i32_e32 v1, vcc, 0x68, v0 +; CI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0 ; CI-NEXT: s_waitcnt vmcnt(11) -; CI-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v1, vcc, 0x60, v0 -; CI-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0 -; CI-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v3, vcc, 0x58, v0 -; CI-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v1, vcc, 0x54, v0 -; CI-NEXT: v_add_i32_e32 v4, vcc, 0x50, v0 -; CI-NEXT: v_add_i32_e32 v5, vcc, 0x4c, v0 +; CI-NEXT: buffer_store_dword v8, v3, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v3, vcc, 0x60, v0 +; CI-NEXT: v_add_i32_e32 v4, vcc, 0x5c, v0 +; CI-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v1, vcc, 0x58, v0 +; CI-NEXT: v_add_i32_e32 v7, vcc, 0x54, v0 +; CI-NEXT: buffer_store_dword v6, v2, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v2, vcc, 0x50, v0 +; CI-NEXT: v_add_i32_e32 v6, vcc, 0x4c, v0 +; CI-NEXT: buffer_store_dword v5, v3, s[0:3], 0 offen ; CI-NEXT: s_waitcnt vmcnt(14) -; CI-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v12, v4, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v1, vcc, 56, v0 -; CI-NEXT: v_add_i32_e32 v6, vcc, 0x48, v0 -; CI-NEXT: v_add_i32_e32 v7, vcc, 0x44, v0 -; CI-NEXT: v_add_i32_e32 v2, vcc, 64, v0 -; CI-NEXT: v_add_i32_e32 v3, vcc, 60, v0 -; CI-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v4, vcc, 52, v0 -; CI-NEXT: v_add_i32_e32 v8, vcc, 48, v0 -; CI-NEXT: v_add_i32_e32 v9, vcc, 44, v0 -; CI-NEXT: v_add_i32_e32 v10, vcc, 40, v0 -; CI-NEXT: v_add_i32_e32 v11, vcc, 36, v0 +; CI-NEXT: v_add_i32_e32 v3, vcc, 0x48, v0 +; CI-NEXT: v_add_i32_e32 v5, vcc, 0x44, v0 +; CI-NEXT: v_add_i32_e32 v4, vcc, 64, v0 +; CI-NEXT: v_add_i32_e32 v8, vcc, 60, v0 +; CI-NEXT: v_add_i32_e32 v11, vcc, 52, v0 +; CI-NEXT: buffer_store_dword v10, v7, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v7, vcc, 48, v0 +; CI-NEXT: v_add_i32_e32 v10, vcc, 44, v0 +; CI-NEXT: buffer_store_dword v9, v2, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v2, vcc, 40, v0 +; CI-NEXT: v_add_i32_e32 v9, vcc, 36, v0 ; CI-NEXT: s_waitcnt vmcnt(14) -; CI-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v16, v6, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v15, v3, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v14, v5, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v13, v4, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v20, v8, s[0:3], 0 offen ; CI-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v18, v11, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v17, v7, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v24, v10, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v23, v2, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v22, v9, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v1, vcc, 32, v0 ; CI-NEXT: buffer_store_dword v21, v1, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v1, vcc, 28, v0 @@ -1379,48 +1379,48 @@ define <33 x i32> @v33i32_func_void() #0 { ; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x74, v0 ; GFX8-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0 +; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x6c, v0 ; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x6c, v0 -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0 -; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x64, v0 +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x68, v0 +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0 ; GFX8-NEXT: s_waitcnt vmcnt(11) -; GFX8-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x60, v0 -; GFX8-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0 -; GFX8-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x58, v0 -; GFX8-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x54, v0 -; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x50, v0 -; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0x4c, v0 +; GFX8-NEXT: buffer_store_dword v8, v3, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x60, v0 +; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x5c, v0 +; GFX8-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x58, v0 +; GFX8-NEXT: v_add_u32_e32 v7, vcc, 0x54, v0 +; GFX8-NEXT: buffer_store_dword v6, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 +; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x4c, v0 +; GFX8-NEXT: buffer_store_dword v5, v3, s[0:3], 0 offen ; GFX8-NEXT: s_waitcnt vmcnt(14) -; GFX8-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v12, v4, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 56, v0 -; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x48, v0 -; GFX8-NEXT: v_add_u32_e32 v7, vcc, 0x44, v0 -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 64, v0 -; GFX8-NEXT: v_add_u32_e32 v3, vcc, 60, v0 -; GFX8-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v4, vcc, 52, v0 -; GFX8-NEXT: v_add_u32_e32 v8, vcc, 48, v0 -; GFX8-NEXT: v_add_u32_e32 v9, vcc, 44, v0 -; GFX8-NEXT: v_add_u32_e32 v10, vcc, 40, v0 -; GFX8-NEXT: v_add_u32_e32 v11, vcc, 36, v0 +; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x48, v0 +; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0x44, v0 +; GFX8-NEXT: v_add_u32_e32 v4, vcc, 64, v0 +; GFX8-NEXT: v_add_u32_e32 v8, vcc, 60, v0 +; GFX8-NEXT: v_add_u32_e32 v11, vcc, 52, v0 +; GFX8-NEXT: buffer_store_dword v10, v7, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v7, vcc, 48, v0 +; GFX8-NEXT: v_add_u32_e32 v10, vcc, 44, v0 +; GFX8-NEXT: buffer_store_dword v9, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 40, v0 +; GFX8-NEXT: v_add_u32_e32 v9, vcc, 36, v0 ; GFX8-NEXT: s_waitcnt vmcnt(14) -; GFX8-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v16, v6, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v15, v3, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v14, v5, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v13, v4, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v20, v8, s[0:3], 0 offen ; GFX8-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v18, v11, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v17, v7, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v24, v10, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v23, v2, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v22, v9, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 32, v0 ; GFX8-NEXT: buffer_store_dword v21, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 28, v0 @@ -1449,16 +1449,18 @@ define <33 x i32> @v33i32_func_void() #0 { ; GFX9-NEXT: s_mov_b32 s7, 0xf000 ; GFX9-NEXT: s_mov_b32 s6, -1 ; GFX9-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128 ; GFX9-NEXT: buffer_load_dwordx4 v[1:4], off, s[4:7], 0 offset:112 ; GFX9-NEXT: buffer_load_dwordx4 v[5:8], off, s[4:7], 0 offset:96 ; GFX9-NEXT: buffer_load_dwordx4 v[9:12], off, s[4:7], 0 offset:80 ; GFX9-NEXT: buffer_load_dwordx4 v[13:16], off, s[4:7], 0 offset:64 -; GFX9-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128 ; GFX9-NEXT: buffer_load_dwordx4 v[17:20], off, s[4:7], 0 offset:48 ; GFX9-NEXT: buffer_load_dwordx4 v[21:24], off, s[4:7], 0 offset:32 ; GFX9-NEXT: buffer_load_dwordx4 v[25:28], off, s[4:7], 0 offset:16 ; GFX9-NEXT: buffer_load_dwordx4 v[29:32], off, s[4:7], 0 ; GFX9-NEXT: s_waitcnt vmcnt(8) +; GFX9-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen offset:128 +; GFX9-NEXT: s_waitcnt vmcnt(8) ; GFX9-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:124 ; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:120 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116 @@ -1479,8 +1481,6 @@ define <33 x i32> @v33i32_func_void() #0 { ; GFX9-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:68 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:64 ; GFX9-NEXT: s_waitcnt vmcnt(20) -; GFX9-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen offset:128 -; GFX9-NEXT: s_waitcnt vmcnt(20) ; GFX9-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:60 ; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:56 ; GFX9-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:52 @@ -1572,48 +1572,48 @@ define { <32 x i32>, i32 } @struct_v32i32_i32_func_void() #0 { ; CI-NEXT: v_add_i32_e32 v3, vcc, 0x74, v0 ; CI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0 +; CI-NEXT: v_add_i32_e32 v3, vcc, 0x6c, v0 ; CI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v1, vcc, 0x6c, v0 -; CI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0 -; CI-NEXT: v_add_i32_e32 v3, vcc, 0x64, v0 +; CI-NEXT: v_add_i32_e32 v1, vcc, 0x68, v0 +; CI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0 ; CI-NEXT: s_waitcnt vmcnt(11) -; CI-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v1, vcc, 0x60, v0 -; CI-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0 -; CI-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v3, vcc, 0x58, v0 -; CI-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v1, vcc, 0x54, v0 -; CI-NEXT: v_add_i32_e32 v4, vcc, 0x50, v0 -; CI-NEXT: v_add_i32_e32 v5, vcc, 0x4c, v0 +; CI-NEXT: buffer_store_dword v8, v3, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v3, vcc, 0x60, v0 +; CI-NEXT: v_add_i32_e32 v4, vcc, 0x5c, v0 +; CI-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v1, vcc, 0x58, v0 +; CI-NEXT: v_add_i32_e32 v7, vcc, 0x54, v0 +; CI-NEXT: buffer_store_dword v6, v2, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v2, vcc, 0x50, v0 +; CI-NEXT: v_add_i32_e32 v6, vcc, 0x4c, v0 +; CI-NEXT: buffer_store_dword v5, v3, s[0:3], 0 offen ; CI-NEXT: s_waitcnt vmcnt(14) -; CI-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v12, v4, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v1, vcc, 56, v0 -; CI-NEXT: v_add_i32_e32 v6, vcc, 0x48, v0 -; CI-NEXT: v_add_i32_e32 v7, vcc, 0x44, v0 -; CI-NEXT: v_add_i32_e32 v2, vcc, 64, v0 -; CI-NEXT: v_add_i32_e32 v3, vcc, 60, v0 -; CI-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v4, vcc, 52, v0 -; CI-NEXT: v_add_i32_e32 v8, vcc, 48, v0 -; CI-NEXT: v_add_i32_e32 v9, vcc, 44, v0 -; CI-NEXT: v_add_i32_e32 v10, vcc, 40, v0 -; CI-NEXT: v_add_i32_e32 v11, vcc, 36, v0 +; CI-NEXT: v_add_i32_e32 v3, vcc, 0x48, v0 +; CI-NEXT: v_add_i32_e32 v5, vcc, 0x44, v0 +; CI-NEXT: v_add_i32_e32 v4, vcc, 64, v0 +; CI-NEXT: v_add_i32_e32 v8, vcc, 60, v0 +; CI-NEXT: v_add_i32_e32 v11, vcc, 52, v0 +; CI-NEXT: buffer_store_dword v10, v7, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v7, vcc, 48, v0 +; CI-NEXT: v_add_i32_e32 v10, vcc, 44, v0 +; CI-NEXT: buffer_store_dword v9, v2, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v2, vcc, 40, v0 +; CI-NEXT: v_add_i32_e32 v9, vcc, 36, v0 ; CI-NEXT: s_waitcnt vmcnt(14) -; CI-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v16, v6, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v15, v3, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v14, v5, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v13, v4, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v20, v8, s[0:3], 0 offen ; CI-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v18, v11, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v17, v7, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v24, v10, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v23, v2, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v22, v9, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v1, vcc, 32, v0 ; CI-NEXT: buffer_store_dword v21, v1, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v1, vcc, 28, v0 @@ -1662,48 +1662,48 @@ define { <32 x i32>, i32 } @struct_v32i32_i32_func_void() #0 { ; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x74, v0 ; GFX8-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0 +; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x6c, v0 ; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x6c, v0 -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0 -; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x64, v0 +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x68, v0 +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0 ; GFX8-NEXT: s_waitcnt vmcnt(11) -; GFX8-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x60, v0 -; GFX8-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0 -; GFX8-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x58, v0 -; GFX8-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x54, v0 -; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x50, v0 -; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0x4c, v0 +; GFX8-NEXT: buffer_store_dword v8, v3, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x60, v0 +; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x5c, v0 +; GFX8-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x58, v0 +; GFX8-NEXT: v_add_u32_e32 v7, vcc, 0x54, v0 +; GFX8-NEXT: buffer_store_dword v6, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0 +; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x4c, v0 +; GFX8-NEXT: buffer_store_dword v5, v3, s[0:3], 0 offen ; GFX8-NEXT: s_waitcnt vmcnt(14) -; GFX8-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v12, v4, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 56, v0 -; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x48, v0 -; GFX8-NEXT: v_add_u32_e32 v7, vcc, 0x44, v0 -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 64, v0 -; GFX8-NEXT: v_add_u32_e32 v3, vcc, 60, v0 -; GFX8-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v4, vcc, 52, v0 -; GFX8-NEXT: v_add_u32_e32 v8, vcc, 48, v0 -; GFX8-NEXT: v_add_u32_e32 v9, vcc, 44, v0 -; GFX8-NEXT: v_add_u32_e32 v10, vcc, 40, v0 -; GFX8-NEXT: v_add_u32_e32 v11, vcc, 36, v0 +; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x48, v0 +; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0x44, v0 +; GFX8-NEXT: v_add_u32_e32 v4, vcc, 64, v0 +; GFX8-NEXT: v_add_u32_e32 v8, vcc, 60, v0 +; GFX8-NEXT: v_add_u32_e32 v11, vcc, 52, v0 +; GFX8-NEXT: buffer_store_dword v10, v7, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v7, vcc, 48, v0 +; GFX8-NEXT: v_add_u32_e32 v10, vcc, 44, v0 +; GFX8-NEXT: buffer_store_dword v9, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 40, v0 +; GFX8-NEXT: v_add_u32_e32 v9, vcc, 36, v0 ; GFX8-NEXT: s_waitcnt vmcnt(14) -; GFX8-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v16, v6, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v15, v3, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v14, v5, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v13, v4, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v20, v8, s[0:3], 0 offen ; GFX8-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v18, v11, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v17, v7, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v24, v10, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v23, v2, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v22, v9, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 32, v0 ; GFX8-NEXT: buffer_store_dword v21, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 28, v0 @@ -1732,16 +1732,18 @@ define { <32 x i32>, i32 } @struct_v32i32_i32_func_void() #0 { ; GFX9-NEXT: s_mov_b32 s7, 0xf000 ; GFX9-NEXT: s_mov_b32 s6, -1 ; GFX9-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128 ; GFX9-NEXT: buffer_load_dwordx4 v[1:4], off, s[4:7], 0 offset:112 ; GFX9-NEXT: buffer_load_dwordx4 v[5:8], off, s[4:7], 0 offset:96 ; GFX9-NEXT: buffer_load_dwordx4 v[9:12], off, s[4:7], 0 offset:80 ; GFX9-NEXT: buffer_load_dwordx4 v[13:16], off, s[4:7], 0 offset:64 -; GFX9-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128 ; GFX9-NEXT: buffer_load_dwordx4 v[17:20], off, s[4:7], 0 offset:48 ; GFX9-NEXT: buffer_load_dwordx4 v[21:24], off, s[4:7], 0 offset:32 ; GFX9-NEXT: buffer_load_dwordx4 v[25:28], off, s[4:7], 0 offset:16 ; GFX9-NEXT: buffer_load_dwordx4 v[29:32], off, s[4:7], 0 ; GFX9-NEXT: s_waitcnt vmcnt(8) +; GFX9-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen offset:128 +; GFX9-NEXT: s_waitcnt vmcnt(8) ; GFX9-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:124 ; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:120 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116 @@ -1762,8 +1764,6 @@ define { <32 x i32>, i32 } @struct_v32i32_i32_func_void() #0 { ; GFX9-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:68 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:64 ; GFX9-NEXT: s_waitcnt vmcnt(20) -; GFX9-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen offset:128 -; GFX9-NEXT: s_waitcnt vmcnt(20) ; GFX9-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:60 ; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:56 ; GFX9-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:52 @@ -1854,50 +1854,50 @@ define { i32, <32 x i32> } @struct_i32_v32i32_func_void() #0 { ; CI-NEXT: v_add_i32_e32 v3, vcc, 0xf4, v0 ; CI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v2, vcc, 0xf0, v0 +; CI-NEXT: v_add_i32_e32 v3, vcc, 0xec, v0 ; CI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v1, vcc, 0xec, v0 -; CI-NEXT: v_add_i32_e32 v2, vcc, 0xe8, v0 -; CI-NEXT: v_add_i32_e32 v3, vcc, 0xe4, v0 +; CI-NEXT: v_add_i32_e32 v1, vcc, 0xe8, v0 +; CI-NEXT: v_add_i32_e32 v2, vcc, 0xe4, v0 ; CI-NEXT: s_waitcnt vmcnt(11) -; CI-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v1, vcc, 0xe0, v0 -; CI-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v2, vcc, 0xdc, v0 -; CI-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v3, vcc, 0xd8, v0 -; CI-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v1, vcc, 0xd4, v0 -; CI-NEXT: v_add_i32_e32 v4, vcc, 0xd0, v0 -; CI-NEXT: v_add_i32_e32 v5, vcc, 0xcc, v0 -; CI-NEXT: v_add_i32_e32 v6, vcc, 0xc8, v0 +; CI-NEXT: buffer_store_dword v8, v3, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v3, vcc, 0xe0, v0 +; CI-NEXT: v_add_i32_e32 v4, vcc, 0xdc, v0 +; CI-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v1, vcc, 0xd8, v0 +; CI-NEXT: v_add_i32_e32 v7, vcc, 0xd4, v0 +; CI-NEXT: buffer_store_dword v6, v2, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v2, vcc, 0xd0, v0 +; CI-NEXT: v_add_i32_e32 v6, vcc, 0xcc, v0 +; CI-NEXT: buffer_store_dword v5, v3, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v3, vcc, 0xc8, v0 ; CI-NEXT: s_waitcnt vmcnt(14) -; CI-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v12, v4, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v1, vcc, 0xb8, v0 -; CI-NEXT: v_add_i32_e32 v7, vcc, 0xc4, v0 -; CI-NEXT: v_add_i32_e32 v2, vcc, 0xc0, v0 -; CI-NEXT: v_add_i32_e32 v3, vcc, 0xbc, v0 -; CI-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v4, vcc, 0xb4, v0 -; CI-NEXT: v_add_i32_e32 v8, vcc, 0xb0, v0 -; CI-NEXT: v_add_i32_e32 v9, vcc, 0xac, v0 -; CI-NEXT: v_add_i32_e32 v10, vcc, 0xa8, v0 -; CI-NEXT: v_add_i32_e32 v11, vcc, 0xa4, v0 +; CI-NEXT: v_add_i32_e32 v5, vcc, 0xc4, v0 +; CI-NEXT: v_add_i32_e32 v4, vcc, 0xc0, v0 +; CI-NEXT: v_add_i32_e32 v8, vcc, 0xbc, v0 +; CI-NEXT: v_add_i32_e32 v11, vcc, 0xb4, v0 +; CI-NEXT: buffer_store_dword v10, v7, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v7, vcc, 0xb0, v0 +; CI-NEXT: v_add_i32_e32 v10, vcc, 0xac, v0 +; CI-NEXT: buffer_store_dword v9, v2, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v2, vcc, 0xa8, v0 +; CI-NEXT: v_add_i32_e32 v9, vcc, 0xa4, v0 ; CI-NEXT: s_waitcnt vmcnt(14) -; CI-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen -; CI-NEXT: v_add_i32_e32 v5, vcc, 0xa0, v0 -; CI-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v16, v6, s[0:3], 0 offen +; CI-NEXT: v_add_i32_e32 v6, vcc, 0xa0, v0 +; CI-NEXT: buffer_store_dword v15, v3, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v14, v5, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v13, v4, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v20, v8, s[0:3], 0 offen ; CI-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen -; CI-NEXT: buffer_store_dword v21, v5, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v18, v11, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v17, v7, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v24, v10, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v23, v2, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v22, v9, s[0:3], 0 offen +; CI-NEXT: buffer_store_dword v21, v6, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v1, vcc, 0x9c, v0 ; CI-NEXT: buffer_store_dword v28, v1, s[0:3], 0 offen ; CI-NEXT: v_add_i32_e32 v1, vcc, 0x98, v0 @@ -1944,50 +1944,50 @@ define { i32, <32 x i32> } @struct_i32_v32i32_func_void() #0 { ; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xf4, v0 ; GFX8-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xf0, v0 +; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xec, v0 ; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xec, v0 -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xe8, v0 -; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xe4, v0 +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xe8, v0 +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xe4, v0 ; GFX8-NEXT: s_waitcnt vmcnt(11) -; GFX8-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xe0, v0 -; GFX8-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xdc, v0 -; GFX8-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xd8, v0 -; GFX8-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xd4, v0 -; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0xd0, v0 -; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0xcc, v0 -; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0xc8, v0 +; GFX8-NEXT: buffer_store_dword v8, v3, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xe0, v0 +; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0xdc, v0 +; GFX8-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xd8, v0 +; GFX8-NEXT: v_add_u32_e32 v7, vcc, 0xd4, v0 +; GFX8-NEXT: buffer_store_dword v6, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xd0, v0 +; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0xcc, v0 +; GFX8-NEXT: buffer_store_dword v5, v3, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xc8, v0 ; GFX8-NEXT: s_waitcnt vmcnt(14) -; GFX8-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v12, v4, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xb8, v0 -; GFX8-NEXT: v_add_u32_e32 v7, vcc, 0xc4, v0 -; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xc0, v0 -; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xbc, v0 -; GFX8-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0xb4, v0 -; GFX8-NEXT: v_add_u32_e32 v8, vcc, 0xb0, v0 -; GFX8-NEXT: v_add_u32_e32 v9, vcc, 0xac, v0 -; GFX8-NEXT: v_add_u32_e32 v10, vcc, 0xa8, v0 -; GFX8-NEXT: v_add_u32_e32 v11, vcc, 0xa4, v0 +; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0xc4, v0 +; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0xc0, v0 +; GFX8-NEXT: v_add_u32_e32 v8, vcc, 0xbc, v0 +; GFX8-NEXT: v_add_u32_e32 v11, vcc, 0xb4, v0 +; GFX8-NEXT: buffer_store_dword v10, v7, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v7, vcc, 0xb0, v0 +; GFX8-NEXT: v_add_u32_e32 v10, vcc, 0xac, v0 +; GFX8-NEXT: buffer_store_dword v9, v2, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xa8, v0 +; GFX8-NEXT: v_add_u32_e32 v9, vcc, 0xa4, v0 ; GFX8-NEXT: s_waitcnt vmcnt(14) -; GFX8-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen -; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0xa0, v0 -; GFX8-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v16, v6, s[0:3], 0 offen +; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0xa0, v0 +; GFX8-NEXT: buffer_store_dword v15, v3, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v14, v5, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v13, v4, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v20, v8, s[0:3], 0 offen ; GFX8-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen -; GFX8-NEXT: buffer_store_dword v21, v5, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v18, v11, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v17, v7, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v24, v10, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v23, v2, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v22, v9, s[0:3], 0 offen +; GFX8-NEXT: buffer_store_dword v21, v6, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x9c, v0 ; GFX8-NEXT: buffer_store_dword v28, v1, s[0:3], 0 offen ; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x98, v0 @@ -2015,16 +2015,18 @@ define { i32, <32 x i32> } @struct_i32_v32i32_func_void() #0 { ; GFX9-NEXT: s_mov_b32 s7, 0xf000 ; GFX9-NEXT: s_mov_b32 s6, -1 ; GFX9-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-NEXT: buffer_load_dword v33, off, s[4:7], 0 ; GFX9-NEXT: buffer_load_dwordx4 v[1:4], off, s[4:7], 0 offset:240 ; GFX9-NEXT: buffer_load_dwordx4 v[5:8], off, s[4:7], 0 offset:224 ; GFX9-NEXT: buffer_load_dwordx4 v[9:12], off, s[4:7], 0 offset:208 ; GFX9-NEXT: buffer_load_dwordx4 v[13:16], off, s[4:7], 0 offset:192 -; GFX9-NEXT: buffer_load_dword v33, off, s[4:7], 0 ; GFX9-NEXT: buffer_load_dwordx4 v[17:20], off, s[4:7], 0 offset:176 ; GFX9-NEXT: buffer_load_dwordx4 v[21:24], off, s[4:7], 0 offset:160 ; GFX9-NEXT: buffer_load_dwordx4 v[25:28], off, s[4:7], 0 offset:144 ; GFX9-NEXT: buffer_load_dwordx4 v[29:32], off, s[4:7], 0 offset:128 ; GFX9-NEXT: s_waitcnt vmcnt(8) +; GFX9-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen +; GFX9-NEXT: s_waitcnt vmcnt(8) ; GFX9-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:252 ; GFX9-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:248 ; GFX9-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:244 @@ -2045,8 +2047,6 @@ define { i32, <32 x i32> } @struct_i32_v32i32_func_void() #0 { ; GFX9-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:196 ; GFX9-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:192 ; GFX9-NEXT: s_waitcnt vmcnt(20) -; GFX9-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen -; GFX9-NEXT: s_waitcnt vmcnt(20) ; GFX9-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:188 ; GFX9-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:184 ; GFX9-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:180 diff --git a/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll b/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll index 6922dc03f3203..cc44fe7a1283a 100644 --- a/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll +++ b/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll @@ -5656,32 +5656,32 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 { ; GFX9-NEXT: v_mov_b32_e32 v19, v34 ; GFX9-NEXT: s_swappc_b64 s[30:31], s[34:35] ; GFX9-NEXT: s_mov_b32 s34, 0xc0c0004 -; GFX9-NEXT: v_perm_b32 v0, v0, v1, s34 -; GFX9-NEXT: v_perm_b32 v1, v2, v3, s34 -; GFX9-NEXT: v_perm_b32 v4, v4, v5, s34 -; GFX9-NEXT: v_perm_b32 v5, v6, v7, s34 -; GFX9-NEXT: v_lshl_or_b32 v6, v1, 16, v0 -; GFX9-NEXT: v_perm_b32 v0, v28, v29, s34 -; GFX9-NEXT: v_perm_b32 v1, v30, v31, s34 -; GFX9-NEXT: v_lshl_or_b32 v7, v5, 16, v4 -; GFX9-NEXT: v_perm_b32 v2, v24, v25, s34 -; GFX9-NEXT: v_perm_b32 v4, v26, v27, s34 -; GFX9-NEXT: v_lshl_or_b32 v3, v1, 16, v0 -; GFX9-NEXT: v_perm_b32 v0, v20, v21, s34 -; GFX9-NEXT: v_perm_b32 v1, v22, v23, s34 -; GFX9-NEXT: v_lshl_or_b32 v2, v4, 16, v2 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v0 -; GFX9-NEXT: v_perm_b32 v0, v16, v17, s34 -; GFX9-NEXT: v_perm_b32 v4, v18, v19, s34 +; GFX9-NEXT: v_perm_b32 v28, v28, v29, s34 +; GFX9-NEXT: v_perm_b32 v29, v30, v31, s34 +; GFX9-NEXT: v_perm_b32 v24, v24, v25, s34 +; GFX9-NEXT: v_perm_b32 v25, v26, v27, s34 +; GFX9-NEXT: v_perm_b32 v20, v20, v21, s34 +; GFX9-NEXT: v_perm_b32 v21, v22, v23, s34 +; GFX9-NEXT: v_perm_b32 v16, v16, v17, s34 +; GFX9-NEXT: v_perm_b32 v17, v18, v19, s34 ; GFX9-NEXT: v_perm_b32 v12, v12, v13, s34 ; GFX9-NEXT: v_perm_b32 v13, v14, v15, s34 ; GFX9-NEXT: v_perm_b32 v8, v8, v9, s34 -; GFX9-NEXT: v_perm_b32 v10, v10, v11, s34 -; GFX9-NEXT: v_lshl_or_b32 v0, v4, 16, v0 -; GFX9-NEXT: v_lshl_or_b32 v9, v13, 16, v12 -; GFX9-NEXT: v_lshl_or_b32 v8, v10, 16, v8 -; GFX9-NEXT: global_store_dwordx4 v[42:43], v[0:3], off -; GFX9-NEXT: global_store_dwordx4 v[40:41], v[6:9], off +; GFX9-NEXT: v_perm_b32 v9, v10, v11, s34 +; GFX9-NEXT: v_perm_b32 v4, v4, v5, s34 +; GFX9-NEXT: v_perm_b32 v5, v6, v7, s34 +; GFX9-NEXT: v_perm_b32 v0, v0, v1, s34 +; GFX9-NEXT: v_perm_b32 v1, v2, v3, s34 +; GFX9-NEXT: v_lshl_or_b32 v28, v29, 16, v28 +; GFX9-NEXT: v_lshl_or_b32 v27, v25, 16, v24 +; GFX9-NEXT: v_lshl_or_b32 v26, v21, 16, v20 +; GFX9-NEXT: v_lshl_or_b32 v25, v17, 16, v16 +; GFX9-NEXT: v_lshl_or_b32 v12, v13, 16, v12 +; GFX9-NEXT: v_lshl_or_b32 v11, v9, 16, v8 +; GFX9-NEXT: v_lshl_or_b32 v10, v5, 16, v4 +; GFX9-NEXT: v_lshl_or_b32 v9, v1, 16, v0 +; GFX9-NEXT: global_store_dwordx4 v[42:43], v[25:28], off +; GFX9-NEXT: global_store_dwordx4 v[40:41], v[9:12], off ; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s33 ; 4-byte Folded Reload ; GFX9-NEXT: s_nop 0 ; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s33 offset:4 ; 4-byte Folded Reload diff --git a/llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll b/llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll index 04f7c3583bd73..9cffed59418da 100644 --- a/llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll +++ b/llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll @@ -2542,16 +2542,22 @@ define amdgpu_gfx <72 x i32> @return_72xi32(<72 x i32> %val) #1 { ; GFX11-LABEL: return_72xi32: ; GFX11: ; %bb.0: ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-NEXT: s_clause 0xc ; 52-byte Folded Spill -; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:212 +; GFX11-NEXT: s_clause 0xf ; 64-byte Folded Spill +; GFX11-NEXT: scratch_store_b32 off, v40, s32 offset:224 +; GFX11-NEXT: ; meta instruction +; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:220 +; GFX11-NEXT: ; meta instruction +; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:216 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:208 +; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:212 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:204 +; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:208 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:200 +; GFX11-NEXT: scratch_store_b32 off, v45, s32 offset:204 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v44, s32 offset:196 +; GFX11-NEXT: scratch_store_b32 off, v46, s32 offset:200 +; GFX11-NEXT: ; meta instruction +; GFX11-NEXT: scratch_store_b32 off, v47, s32 offset:196 ; GFX11-NEXT: ; meta instruction ; GFX11-NEXT: scratch_store_b32 off, v56, s32 offset:192 ; GFX11-NEXT: ; meta instruction @@ -2568,10 +2574,18 @@ define amdgpu_gfx <72 x i32> @return_72xi32(<72 x i32> %val) #1 { ; GFX11-NEXT: scratch_store_b32 off, v62, s32 offset:168 ; GFX11-NEXT: ; meta instruction ; GFX11-NEXT: scratch_store_b32 off, v63, s32 offset:164 -; GFX11-NEXT: s_clause 0x11 +; GFX11-NEXT: v_dual_mov_b32 v47, v31 :: v_dual_mov_b32 v46, v30 +; GFX11-NEXT: v_mov_b32_e32 v45, v29 +; GFX11-NEXT: scratch_store_b128 off, v[25:28], s32 offset:228 ; 16-byte Folded Spill +; GFX11-NEXT: v_dual_mov_b32 v28, v8 :: v_dual_mov_b32 v27, v7 +; GFX11-NEXT: v_dual_mov_b32 v26, v6 :: v_dual_mov_b32 v25, v5 +; GFX11-NEXT: v_dual_mov_b32 v32, v4 :: v_dual_mov_b32 v31, v3 +; GFX11-NEXT: v_dual_mov_b32 v30, v2 :: v_dual_mov_b32 v29, v1 +; GFX11-NEXT: s_clause 0x1b ; GFX11-NEXT: scratch_load_b32 v36, off, s32 offset:16 ; GFX11-NEXT: scratch_load_b32 v35, off, s32 offset:12 ; GFX11-NEXT: scratch_load_b32 v34, off, s32 offset:8 +; GFX11-NEXT: scratch_load_b32 v33, off, s32 offset:4 ; GFX11-NEXT: scratch_load_b32 v51, off, s32 offset:32 ; GFX11-NEXT: scratch_load_b32 v50, off, s32 offset:28 ; GFX11-NEXT: scratch_load_b32 v49, off, s32 offset:24 @@ -2587,64 +2601,66 @@ define amdgpu_gfx <72 x i32> @return_72xi32(<72 x i32> %val) #1 { ; GFX11-NEXT: scratch_load_b32 v59, off, s32 offset:96 ; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:92 ; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:88 +; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:84 +; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:112 +; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:108 +; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:104 +; GFX11-NEXT: scratch_load_b32 v8, off, s32 offset:128 +; GFX11-NEXT: scratch_load_b32 v7, off, s32 offset:124 +; GFX11-NEXT: scratch_load_b32 v6, off, s32 offset:120 +; GFX11-NEXT: scratch_load_b32 v4, off, s32 offset:144 +; GFX11-NEXT: scratch_load_b32 v3, off, s32 offset:140 ; GFX11-NEXT: s_clause 0x1 ; GFX11-NEXT: scratch_store_b128 v0, v[21:24], off offset:80 ; GFX11-NEXT: scratch_store_b128 v0, v[17:20], off offset:64 -; GFX11-NEXT: s_clause 0x5 -; GFX11-NEXT: scratch_load_b32 v23, off, s32 offset:112 -; GFX11-NEXT: scratch_load_b32 v22, off, s32 offset:108 -; GFX11-NEXT: scratch_load_b32 v21, off, s32 offset:104 -; GFX11-NEXT: scratch_load_b32 v19, off, s32 offset:128 -; GFX11-NEXT: scratch_load_b32 v18, off, s32 offset:124 -; GFX11-NEXT: scratch_load_b32 v17, off, s32 offset:120 -; GFX11-NEXT: s_clause 0x1 -; GFX11-NEXT: scratch_store_b128 v0, v[13:16], off offset:48 -; GFX11-NEXT: scratch_store_b128 v0, v[9:12], off offset:32 -; GFX11-NEXT: s_clause 0x10 -; GFX11-NEXT: scratch_load_b32 v15, off, s32 offset:144 -; GFX11-NEXT: scratch_load_b32 v14, off, s32 offset:140 -; GFX11-NEXT: scratch_load_b32 v13, off, s32 offset:136 -; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:160 -; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:156 -; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:152 -; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:148 -; GFX11-NEXT: scratch_load_b32 v12, off, s32 offset:132 -; GFX11-NEXT: scratch_load_b32 v16, off, s32 offset:116 -; GFX11-NEXT: scratch_load_b32 v20, off, s32 offset:100 -; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:84 +; GFX11-NEXT: s_clause 0xb +; GFX11-NEXT: scratch_load_b32 v2, off, s32 offset:136 +; GFX11-NEXT: scratch_load_b32 v23, off, s32 offset:160 +; GFX11-NEXT: scratch_load_b32 v22, off, s32 offset:156 +; GFX11-NEXT: scratch_load_b32 v21, off, s32 offset:152 +; GFX11-NEXT: scratch_load_b32 v20, off, s32 offset:148 +; GFX11-NEXT: scratch_load_b32 v1, off, s32 offset:132 +; GFX11-NEXT: scratch_load_b32 v5, off, s32 offset:116 +; GFX11-NEXT: scratch_load_b32 v60, off, s32 offset:100 ; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:68 ; GFX11-NEXT: scratch_load_b32 v37, off, s32 offset:52 ; GFX11-NEXT: scratch_load_b32 v52, off, s32 offset:36 ; GFX11-NEXT: scratch_load_b32 v48, off, s32 offset:20 -; GFX11-NEXT: scratch_load_b32 v33, off, s32 offset:4 -; GFX11-NEXT: scratch_load_b32 v32, off, s32 -; GFX11-NEXT: s_waitcnt vmcnt(10) -; GFX11-NEXT: scratch_store_b128 v0, v[60:63], off offset:272 -; GFX11-NEXT: s_waitcnt vmcnt(9) -; GFX11-NEXT: scratch_store_b128 v0, v[12:15], off offset:256 +; GFX11-NEXT: s_clause 0x1 +; GFX11-NEXT: scratch_store_b128 v0, v[13:16], off offset:48 +; GFX11-NEXT: scratch_store_b128 v0, v[9:12], off offset:32 +; GFX11-NEXT: scratch_load_b32 v12, off, s32 +; GFX11-NEXT: v_dual_mov_b32 v9, v45 :: v_dual_mov_b32 v10, v46 +; GFX11-NEXT: v_mov_b32_e32 v11, v47 ; GFX11-NEXT: s_waitcnt vmcnt(8) -; GFX11-NEXT: scratch_store_b128 v0, v[16:19], off offset:240 +; GFX11-NEXT: scratch_store_b128 v0, v[20:23], off offset:272 ; GFX11-NEXT: s_waitcnt vmcnt(7) -; GFX11-NEXT: scratch_store_b128 v0, v[20:23], off offset:224 +; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:256 ; GFX11-NEXT: s_waitcnt vmcnt(6) -; GFX11-NEXT: scratch_store_b128 v0, v[56:59], off offset:208 +; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:240 ; GFX11-NEXT: s_waitcnt vmcnt(5) -; GFX11-NEXT: scratch_store_b128 v0, v[41:44], off offset:192 +; GFX11-NEXT: s_clause 0x1 +; GFX11-NEXT: scratch_store_b128 v0, v[60:63], off offset:224 +; GFX11-NEXT: scratch_store_b128 v0, v[56:59], off offset:208 ; GFX11-NEXT: s_waitcnt vmcnt(4) -; GFX11-NEXT: scratch_store_b128 v0, v[37:40], off offset:176 +; GFX11-NEXT: scratch_store_b128 v0, v[41:44], off offset:192 ; GFX11-NEXT: s_waitcnt vmcnt(3) -; GFX11-NEXT: scratch_store_b128 v0, v[52:55], off offset:160 +; GFX11-NEXT: scratch_store_b128 v0, v[37:40], off offset:176 ; GFX11-NEXT: s_waitcnt vmcnt(2) -; GFX11-NEXT: scratch_store_b128 v0, v[48:51], off offset:144 +; GFX11-NEXT: scratch_store_b128 v0, v[52:55], off offset:160 ; GFX11-NEXT: s_waitcnt vmcnt(1) +; GFX11-NEXT: s_clause 0x1 +; GFX11-NEXT: scratch_store_b128 v0, v[48:51], off offset:144 ; GFX11-NEXT: scratch_store_b128 v0, v[33:36], off offset:128 ; GFX11-NEXT: s_waitcnt vmcnt(0) -; GFX11-NEXT: s_clause 0x3 -; GFX11-NEXT: scratch_store_b128 v0, v[29:32], off offset:112 -; GFX11-NEXT: scratch_store_b128 v0, v[25:28], off offset:96 -; GFX11-NEXT: scratch_store_b128 v0, v[5:8], off offset:16 -; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off -; GFX11-NEXT: s_clause 0xc ; 52-byte Folded Reload +; GFX11-NEXT: scratch_store_b128 v0, v[9:12], off offset:112 +; GFX11-NEXT: scratch_load_b128 v[1:4], off, s32 offset:228 ; 16-byte Folded Reload +; GFX11-NEXT: s_waitcnt vmcnt(0) +; GFX11-NEXT: s_clause 0x2 +; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off offset:96 +; GFX11-NEXT: scratch_store_b128 v0, v[25:28], off offset:16 +; GFX11-NEXT: scratch_store_b128 v0, v[29:32], off +; GFX11-NEXT: s_clause 0xf ; 64-byte Folded Reload ; GFX11-NEXT: scratch_load_b32 v63, off, s32 offset:164 ; GFX11-NEXT: scratch_load_b32 v62, off, s32 offset:168 ; GFX11-NEXT: scratch_load_b32 v61, off, s32 offset:172 @@ -2653,11 +2669,14 @@ define amdgpu_gfx <72 x i32> @return_72xi32(<72 x i32> %val) #1 { ; GFX11-NEXT: scratch_load_b32 v58, off, s32 offset:184 ; GFX11-NEXT: scratch_load_b32 v57, off, s32 offset:188 ; GFX11-NEXT: scratch_load_b32 v56, off, s32 offset:192 -; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:196 -; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:200 -; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:204 -; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:208 -; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:212 +; GFX11-NEXT: scratch_load_b32 v47, off, s32 offset:196 +; GFX11-NEXT: scratch_load_b32 v46, off, s32 offset:200 +; GFX11-NEXT: scratch_load_b32 v45, off, s32 offset:204 +; GFX11-NEXT: scratch_load_b32 v44, off, s32 offset:208 +; GFX11-NEXT: scratch_load_b32 v43, off, s32 offset:212 +; GFX11-NEXT: scratch_load_b32 v42, off, s32 offset:216 +; GFX11-NEXT: scratch_load_b32 v41, off, s32 offset:220 +; GFX11-NEXT: scratch_load_b32 v40, off, s32 offset:224 ; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_setpc_b64 s[30:31] ret <72 x i32> %val @@ -3218,46 +3237,44 @@ define amdgpu_gfx void @call_72xi32() #1 { ; GFX11-LABEL: call_72xi32: ; GFX11: ; %bb.0: ; %entry ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-NEXT: s_mov_b32 s38, s33 +; GFX11-NEXT: s_mov_b32 s35, s33 ; GFX11-NEXT: s_add_i32 s33, s32, 0x1ff ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) ; GFX11-NEXT: s_and_b32 s33, s33, 0xfffffe00 ; GFX11-NEXT: s_or_saveexec_b32 s0, -1 -; GFX11-NEXT: scratch_store_b32 off, v62, s33 offset:1600 ; 4-byte Folded Spill +; GFX11-NEXT: scratch_store_b32 off, v61, s33 offset:1916 ; 4-byte Folded Spill ; GFX11-NEXT: s_mov_b32 exec_lo, s0 -; GFX11-NEXT: s_mov_b32 s39, s34 +; GFX11-NEXT: s_mov_b32 s36, s34 ; GFX11-NEXT: s_mov_b32 s34, s32 ; GFX11-NEXT: s_addk_i32 s32, 0xa00 -; GFX11-NEXT: s_clause 0xd ; 56-byte Folded Spill -; GFX11-NEXT: scratch_store_b32 off, v40, s33 offset:52 -; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v41, s33 offset:48 +; GFX11-NEXT: s_clause 0xc ; 52-byte Folded Spill +; GFX11-NEXT: scratch_store_b32 off, v40, s33 offset:48 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v42, s33 offset:44 +; GFX11-NEXT: scratch_store_b32 off, v41, s33 offset:44 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v43, s33 offset:40 +; GFX11-NEXT: scratch_store_b32 off, v42, s33 offset:40 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v44, s33 offset:36 +; GFX11-NEXT: scratch_store_b32 off, v43, s33 offset:36 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v45, s33 offset:32 +; GFX11-NEXT: scratch_store_b32 off, v44, s33 offset:32 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v46, s33 offset:28 +; GFX11-NEXT: scratch_store_b32 off, v45, s33 offset:28 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v47, s33 offset:24 +; GFX11-NEXT: scratch_store_b32 off, v46, s33 offset:24 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v56, s33 offset:20 +; GFX11-NEXT: scratch_store_b32 off, v47, s33 offset:20 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v57, s33 offset:16 +; GFX11-NEXT: scratch_store_b32 off, v56, s33 offset:16 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v58, s33 offset:12 +; GFX11-NEXT: scratch_store_b32 off, v57, s33 offset:12 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v59, s33 offset:8 +; GFX11-NEXT: scratch_store_b32 off, v58, s33 offset:8 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v60, s33 offset:4 +; GFX11-NEXT: scratch_store_b32 off, v59, s33 offset:4 ; GFX11-NEXT: ; meta instruction -; GFX11-NEXT: scratch_store_b32 off, v61, s33 -; GFX11-NEXT: v_writelane_b32 v62, s30, 0 -; GFX11-NEXT: v_writelane_b32 v62, s31, 1 +; GFX11-NEXT: scratch_store_b32 off, v60, s33 +; GFX11-NEXT: v_writelane_b32 v61, s30, 0 +; GFX11-NEXT: v_writelane_b32 v61, s31, 1 ; GFX11-NEXT: s_mov_b32 s0, 0 ; GFX11-NEXT: v_mov_b32_e32 v4, 0 ; GFX11-NEXT: s_mov_b32 s1, s0 @@ -3307,104 +3324,259 @@ define amdgpu_gfx void @call_72xi32() #1 { ; GFX11-NEXT: s_mov_b32 s0, return_72xi32@abs32@lo ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) ; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1] -; GFX11-NEXT: s_clause 0xb -; GFX11-NEXT: scratch_load_b128 v[43:46], off, s33 offset:624 -; GFX11-NEXT: scratch_load_b128 v[47:50], off, s33 offset:640 -; GFX11-NEXT: scratch_load_b128 v[16:19], off, s33 offset:784 -; GFX11-NEXT: scratch_load_b128 v[12:15], off, s33 offset:768 -; GFX11-NEXT: scratch_load_b128 v[8:11], off, s33 offset:752 -; GFX11-NEXT: scratch_load_b128 v[4:7], off, s33 offset:736 -; GFX11-NEXT: scratch_load_b128 v[0:3], off, s33 offset:720 -; GFX11-NEXT: scratch_load_b128 v[24:27], off, s33 offset:656 -; GFX11-NEXT: scratch_load_b128 v[36:39], off, s33 offset:704 -; GFX11-NEXT: scratch_load_b128 v[32:35], off, s33 offset:688 -; GFX11-NEXT: scratch_load_b128 v[28:31], off, s33 offset:672 -; GFX11-NEXT: scratch_load_b128 v[20:23], off, s33 offset:512 -; GFX11-NEXT: s_waitcnt vmcnt(6) -; GFX11-NEXT: v_mov_b32_e32 v6, 24 +; GFX11-NEXT: s_clause 0x1 +; GFX11-NEXT: scratch_load_b128 v[0:3], off, s33 offset:624 +; GFX11-NEXT: scratch_load_b128 v[4:7], off, s33 offset:640 ; GFX11-NEXT: s_add_i32 s2, s32, 0xa0 -; GFX11-NEXT: s_add_i32 s3, s32, 0x90 -; GFX11-NEXT: s_add_i32 s35, s32, 0x80 -; GFX11-NEXT: s_add_i32 s36, s32, 0x70 -; GFX11-NEXT: s_add_i32 s37, s32, 0x6c -; GFX11-NEXT: s_waitcnt vmcnt(4) -; GFX11-NEXT: v_dual_mov_b32 v40, v0 :: v_dual_mov_b32 v53, v26 -; GFX11-NEXT: v_dual_mov_b32 v41, v1 :: v_dual_mov_b32 v42, v2 -; GFX11-NEXT: v_mov_b32_e32 v51, v24 ; GFX11-NEXT: s_waitcnt vmcnt(0) -; GFX11-NEXT: scratch_store_b128 off, v[20:23], s33 offset:1584 ; 16-byte Folded Spill -; GFX11-NEXT: scratch_load_b128 v[20:23], off, s33 offset:528 -; GFX11-NEXT: v_mov_b32_e32 v52, v25 +; GFX11-NEXT: v_dual_mov_b32 v32, v7 :: v_dual_mov_b32 v31, v6 +; GFX11-NEXT: v_dual_mov_b32 v30, v5 :: v_dual_mov_b32 v29, v4 +; GFX11-NEXT: v_dual_mov_b32 v28, v3 :: v_dual_mov_b32 v27, v2 +; GFX11-NEXT: v_dual_mov_b32 v26, v1 :: v_dual_mov_b32 v25, v0 +; GFX11-NEXT: s_clause 0x5 +; GFX11-NEXT: scratch_load_b128 v[21:24], off, s33 offset:784 +; GFX11-NEXT: scratch_load_b128 v[17:20], off, s33 offset:768 +; GFX11-NEXT: scratch_load_b128 v[1:4], off, s33 offset:512 +; GFX11-NEXT: scratch_load_b128 v[9:12], off, s33 offset:736 +; GFX11-NEXT: scratch_load_b128 v[13:16], off, s33 offset:752 +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:720 ; GFX11-NEXT: s_waitcnt vmcnt(0) -; GFX11-NEXT: scratch_store_b128 off, v[20:23], s33 offset:1536 ; 16-byte Folded Spill -; GFX11-NEXT: scratch_load_b128 v[20:23], off, s33 offset:544 +; GFX11-NEXT: s_clause 0x7 ; 128-byte Folded Spill +; GFX11-NEXT: scratch_store_b128 off, v[5:8], s33 offset:1536 +; GFX11-NEXT: scratch_store_b128 off, v[9:12], s33 offset:1552 +; GFX11-NEXT: scratch_store_b128 off, v[13:16], s33 offset:1568 +; GFX11-NEXT: scratch_store_b128 off, v[17:20], s33 offset:1584 +; GFX11-NEXT: scratch_store_b128 off, v[21:24], s33 offset:1600 +; GFX11-NEXT: scratch_store_b128 off, v[25:28], s33 offset:1616 +; GFX11-NEXT: scratch_store_b128 off, v[29:32], s33 offset:1632 +; GFX11-NEXT: scratch_store_b128 off, v[33:36], s33 offset:1648 +; GFX11-NEXT: s_clause 0x1 +; GFX11-NEXT: scratch_load_b128 v[12:15], off, s33 offset:704 +; GFX11-NEXT: scratch_load_b128 v[8:11], off, s33 offset:688 +; GFX11-NEXT: v_dual_mov_b32 v0, 24 :: v_dual_mov_b32 v1, 42 ; GFX11-NEXT: s_waitcnt vmcnt(0) -; GFX11-NEXT: scratch_store_b128 off, v[20:23], s33 offset:1568 ; 16-byte Folded Spill -; GFX11-NEXT: scratch_load_b128 v[20:23], off, s33 offset:560 +; GFX11-NEXT: v_mov_b32_e32 v16, v15 +; GFX11-NEXT: v_mov_b32_e32 v15, v14 +; GFX11-NEXT: v_mov_b32_e32 v14, v13 +; GFX11-NEXT: v_mov_b32_e32 v13, v12 +; GFX11-NEXT: v_mov_b32_e32 v12, v11 +; GFX11-NEXT: v_mov_b32_e32 v11, v10 +; GFX11-NEXT: v_mov_b32_e32 v10, v9 +; GFX11-NEXT: v_mov_b32_e32 v9, v8 +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:672 ; GFX11-NEXT: s_waitcnt vmcnt(0) -; GFX11-NEXT: scratch_store_b128 off, v[20:23], s33 offset:1552 ; 16-byte Folded Spill -; GFX11-NEXT: s_clause 0x2 -; GFX11-NEXT: scratch_load_b128 v[20:23], off, s33 offset:576 -; GFX11-NEXT: scratch_load_b128 v[58:61], off, s33 offset:592 -; GFX11-NEXT: scratch_load_b128 v[54:57], off, s33 offset:608 -; GFX11-NEXT: scratch_store_b128 off, v[46:49], s32 -; GFX11-NEXT: scratch_store_b32 off, v19, s2 -; GFX11-NEXT: scratch_store_b128 off, v[15:18], s3 -; GFX11-NEXT: scratch_store_b128 off, v[11:14], s35 -; GFX11-NEXT: scratch_store_b128 off, v[7:10], s36 +; GFX11-NEXT: v_mov_b32_e32 v20, v16 +; GFX11-NEXT: v_dual_mov_b32 v19, v15 :: v_dual_mov_b32 v18, v14 +; GFX11-NEXT: v_dual_mov_b32 v17, v13 :: v_dual_mov_b32 v16, v12 +; GFX11-NEXT: v_mov_b32_e32 v15, v11 +; GFX11-NEXT: v_mov_b32_e32 v14, v10 +; GFX11-NEXT: v_mov_b32_e32 v13, v9 +; GFX11-NEXT: v_mov_b32_e32 v12, v8 +; GFX11-NEXT: v_mov_b32_e32 v11, v7 +; GFX11-NEXT: v_mov_b32_e32 v10, v6 +; GFX11-NEXT: v_mov_b32_e32 v9, v5 +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:656 +; GFX11-NEXT: s_waitcnt vmcnt(0) +; GFX11-NEXT: s_clause 0x7 ; 128-byte Folded Spill +; GFX11-NEXT: scratch_store_b128 off, v[5:8], s33 offset:1744 +; GFX11-NEXT: scratch_store_b128 off, v[9:12], s33 offset:1760 +; GFX11-NEXT: scratch_store_b128 off, v[13:16], s33 offset:1776 +; GFX11-NEXT: scratch_store_b128 off, v[17:20], s33 offset:1792 +; GFX11-NEXT: scratch_store_b128 off, v[21:24], s33 offset:1808 +; GFX11-NEXT: scratch_store_b128 off, v[25:28], s33 offset:1824 +; GFX11-NEXT: scratch_store_b128 off, v[29:32], s33 offset:1840 +; GFX11-NEXT: scratch_store_b128 off, v[33:36], s33 offset:1856 +; GFX11-NEXT: s_clause 0x1 +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:528 +; GFX11-NEXT: scratch_load_b128 v[57:60], off, s33 offset:608 +; GFX11-NEXT: s_waitcnt vmcnt(1) +; GFX11-NEXT: scratch_store_b128 off, v[5:8], s33 offset:1728 ; 16-byte Folded Spill +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:544 +; GFX11-NEXT: s_waitcnt vmcnt(0) +; GFX11-NEXT: scratch_store_b128 off, v[5:8], s33 offset:1712 ; 16-byte Folded Spill +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:560 +; GFX11-NEXT: s_waitcnt vmcnt(0) +; GFX11-NEXT: scratch_store_b128 off, v[5:8], s33 offset:1696 ; 16-byte Folded Spill +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:576 +; GFX11-NEXT: s_waitcnt vmcnt(0) +; GFX11-NEXT: scratch_store_b128 off, v[5:8], s33 offset:1680 ; 16-byte Folded Spill +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:592 +; GFX11-NEXT: s_waitcnt vmcnt(0) +; GFX11-NEXT: scratch_store_b128 off, v[5:8], s33 offset:1664 ; 16-byte Folded Spill +; GFX11-NEXT: scratch_store_b128 off, v[28:31], s32 +; GFX11-NEXT: s_clause 0x2 ; 44-byte Folded Spill +; GFX11-NEXT: scratch_store_b128 off, v[25:28], s33 offset:1872 +; GFX11-NEXT: scratch_store_b128 off, v[29:32], s33 offset:1888 +; GFX11-NEXT: scratch_store_b96 off, v[33:35], s33 offset:1904 +; GFX11-NEXT: s_clause 0x7 ; 128-byte Folded Reload +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:1536 +; GFX11-NEXT: scratch_load_b128 v[9:12], off, s33 offset:1552 +; GFX11-NEXT: scratch_load_b128 v[13:16], off, s33 offset:1568 +; GFX11-NEXT: scratch_load_b128 v[17:20], off, s33 offset:1584 +; GFX11-NEXT: scratch_load_b128 v[21:24], off, s33 offset:1600 +; GFX11-NEXT: scratch_load_b128 v[25:28], off, s33 offset:1616 +; GFX11-NEXT: scratch_load_b128 v[29:32], off, s33 offset:1632 +; GFX11-NEXT: scratch_load_b128 v[33:36], off, s33 offset:1648 +; GFX11-NEXT: s_waitcnt vmcnt(3) +; GFX11-NEXT: scratch_store_b32 off, v24, s2 +; GFX11-NEXT: s_clause 0x7 ; 128-byte Folded Reload +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:1536 +; GFX11-NEXT: scratch_load_b128 v[9:12], off, s33 offset:1552 +; GFX11-NEXT: scratch_load_b128 v[13:16], off, s33 offset:1568 +; GFX11-NEXT: scratch_load_b128 v[17:20], off, s33 offset:1584 +; GFX11-NEXT: scratch_load_b128 v[21:24], off, s33 offset:1600 +; GFX11-NEXT: scratch_load_b128 v[25:28], off, s33 offset:1616 +; GFX11-NEXT: scratch_load_b128 v[29:32], off, s33 offset:1632 +; GFX11-NEXT: scratch_load_b128 v[33:36], off, s33 offset:1648 +; GFX11-NEXT: s_add_i32 s2, s32, 0x90 +; GFX11-NEXT: s_waitcnt vmcnt(3) +; GFX11-NEXT: scratch_store_b128 off, v[20:23], s2 +; GFX11-NEXT: s_clause 0x7 ; 128-byte Folded Reload +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:1536 +; GFX11-NEXT: scratch_load_b128 v[9:12], off, s33 offset:1552 +; GFX11-NEXT: scratch_load_b128 v[13:16], off, s33 offset:1568 +; GFX11-NEXT: scratch_load_b128 v[17:20], off, s33 offset:1584 +; GFX11-NEXT: scratch_load_b128 v[21:24], off, s33 offset:1600 +; GFX11-NEXT: scratch_load_b128 v[25:28], off, s33 offset:1616 +; GFX11-NEXT: scratch_load_b128 v[29:32], off, s33 offset:1632 +; GFX11-NEXT: scratch_load_b128 v[33:36], off, s33 offset:1648 +; GFX11-NEXT: s_add_i32 s2, s32, 0x80 +; GFX11-NEXT: s_waitcnt vmcnt(4) +; GFX11-NEXT: scratch_store_b128 off, v[16:19], s2 +; GFX11-NEXT: s_clause 0x7 ; 128-byte Folded Reload +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:1536 +; GFX11-NEXT: scratch_load_b128 v[9:12], off, s33 offset:1552 +; GFX11-NEXT: scratch_load_b128 v[13:16], off, s33 offset:1568 +; GFX11-NEXT: scratch_load_b128 v[17:20], off, s33 offset:1584 +; GFX11-NEXT: scratch_load_b128 v[21:24], off, s33 offset:1600 +; GFX11-NEXT: scratch_load_b128 v[25:28], off, s33 offset:1616 +; GFX11-NEXT: scratch_load_b128 v[29:32], off, s33 offset:1632 +; GFX11-NEXT: scratch_load_b128 v[33:36], off, s33 offset:1648 +; GFX11-NEXT: s_add_i32 s2, s32, 0x70 +; GFX11-NEXT: s_waitcnt vmcnt(5) +; GFX11-NEXT: scratch_store_b128 off, v[12:15], s2 +; GFX11-NEXT: s_clause 0x7 ; 128-byte Folded Reload +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:1536 +; GFX11-NEXT: scratch_load_b128 v[9:12], off, s33 offset:1552 +; GFX11-NEXT: scratch_load_b128 v[13:16], off, s33 offset:1568 +; GFX11-NEXT: scratch_load_b128 v[17:20], off, s33 offset:1584 +; GFX11-NEXT: scratch_load_b128 v[21:24], off, s33 offset:1600 +; GFX11-NEXT: scratch_load_b128 v[25:28], off, s33 offset:1616 +; GFX11-NEXT: scratch_load_b128 v[29:32], off, s33 offset:1632 +; GFX11-NEXT: scratch_load_b128 v[33:36], off, s33 offset:1648 +; GFX11-NEXT: s_add_i32 s2, s32, 0x6c +; GFX11-NEXT: scratch_store_b32 off, v0, s2 ; GFX11-NEXT: s_add_i32 s2, s32, 0x60 -; GFX11-NEXT: scratch_store_b32 off, v6, s37 -; GFX11-NEXT: scratch_store_b96 off, v[3:5], s2 +; GFX11-NEXT: s_waitcnt vmcnt(6) +; GFX11-NEXT: scratch_store_b96 off, v[8:10], s2 +; GFX11-NEXT: s_clause 0x17 ; 384-byte Folded Reload +; GFX11-NEXT: scratch_load_b128 v[7:10], off, s33 offset:1744 +; GFX11-NEXT: scratch_load_b128 v[11:14], off, s33 offset:1760 +; GFX11-NEXT: scratch_load_b128 v[15:18], off, s33 offset:1776 +; GFX11-NEXT: scratch_load_b128 v[19:22], off, s33 offset:1792 +; GFX11-NEXT: scratch_load_b128 v[23:26], off, s33 offset:1808 +; GFX11-NEXT: scratch_load_b128 v[27:30], off, s33 offset:1824 +; GFX11-NEXT: scratch_load_b128 v[31:34], off, s33 offset:1840 +; GFX11-NEXT: scratch_load_b128 v[35:38], off, s33 offset:1856 +; GFX11-NEXT: scratch_load_b128 v[23:26], off, s33 offset:1536 +; GFX11-NEXT: scratch_load_b128 v[27:30], off, s33 offset:1552 +; GFX11-NEXT: scratch_load_b128 v[31:34], off, s33 offset:1568 +; GFX11-NEXT: scratch_load_b128 v[35:38], off, s33 offset:1584 +; GFX11-NEXT: scratch_load_b128 v[39:42], off, s33 offset:1600 +; GFX11-NEXT: scratch_load_b128 v[43:46], off, s33 offset:1616 +; GFX11-NEXT: scratch_load_b128 v[47:50], off, s33 offset:1632 +; GFX11-NEXT: scratch_load_b128 v[51:54], off, s33 offset:1648 +; GFX11-NEXT: scratch_load_b128 v[24:27], off, s33 offset:1536 +; GFX11-NEXT: scratch_load_b128 v[28:31], off, s33 offset:1552 +; GFX11-NEXT: scratch_load_b128 v[32:35], off, s33 offset:1568 +; GFX11-NEXT: scratch_load_b128 v[36:39], off, s33 offset:1584 +; GFX11-NEXT: scratch_load_b128 v[40:43], off, s33 offset:1600 +; GFX11-NEXT: scratch_load_b128 v[44:47], off, s33 offset:1616 +; GFX11-NEXT: scratch_load_b128 v[48:51], off, s33 offset:1632 +; GFX11-NEXT: scratch_load_b128 v[52:55], off, s33 offset:1648 ; GFX11-NEXT: s_add_i32 s2, s32, 0x50 -; GFX11-NEXT: s_add_i32 s3, s32, 64 -; GFX11-NEXT: s_add_i32 s35, s32, 48 -; GFX11-NEXT: s_add_i32 s36, s32, 32 -; GFX11-NEXT: scratch_store_b128 off, v[39:42], s2 -; GFX11-NEXT: scratch_store_b128 off, v[35:38], s3 -; GFX11-NEXT: scratch_store_b128 off, v[31:34], s35 -; GFX11-NEXT: scratch_store_b128 off, v[27:30], s36 +; GFX11-NEXT: s_waitcnt vmcnt(7) +; GFX11-NEXT: v_mov_b32_e32 v24, v25 +; GFX11-NEXT: s_clause 0x7 ; 128-byte Folded Reload +; GFX11-NEXT: scratch_load_b128 v[25:28], off, s33 offset:1536 +; GFX11-NEXT: scratch_load_b128 v[29:32], off, s33 offset:1552 +; GFX11-NEXT: scratch_load_b128 v[33:36], off, s33 offset:1568 +; GFX11-NEXT: scratch_load_b128 v[37:40], off, s33 offset:1584 +; GFX11-NEXT: scratch_load_b128 v[41:44], off, s33 offset:1600 +; GFX11-NEXT: scratch_load_b128 v[45:48], off, s33 offset:1616 +; GFX11-NEXT: scratch_load_b128 v[49:52], off, s33 offset:1632 +; GFX11-NEXT: scratch_load_b128 v[53:56], off, s33 offset:1648 +; GFX11-NEXT: v_mov_b32_e32 v5, v7 +; GFX11-NEXT: v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 +; GFX11-NEXT: v_mov_b32_e32 v8, v10 +; GFX11-NEXT: s_waitcnt vmcnt(4) +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_dual_mov_b32 v26, v58 :: v_dual_mov_b32 v37, v5 +; GFX11-NEXT: v_dual_mov_b32 v38, v6 :: v_dual_mov_b32 v39, v7 +; GFX11-NEXT: v_dual_mov_b32 v28, v60 :: v_dual_mov_b32 v25, v27 +; GFX11-NEXT: v_mov_b32_e32 v27, v59 +; GFX11-NEXT: v_mov_b32_e32 v9, v11 +; GFX11-NEXT: v_mov_b32_e32 v10, v12 +; GFX11-NEXT: v_mov_b32_e32 v11, v13 +; GFX11-NEXT: v_mov_b32_e32 v12, v14 +; GFX11-NEXT: v_mov_b32_e32 v13, v15 +; GFX11-NEXT: v_mov_b32_e32 v14, v16 +; GFX11-NEXT: v_mov_b32_e32 v15, v17 +; GFX11-NEXT: v_mov_b32_e32 v16, v18 +; GFX11-NEXT: v_mov_b32_e32 v17, v19 +; GFX11-NEXT: v_mov_b32_e32 v18, v20 +; GFX11-NEXT: v_mov_b32_e32 v19, v21 +; GFX11-NEXT: v_dual_mov_b32 v20, v22 :: v_dual_mov_b32 v21, v23 +; GFX11-NEXT: v_dual_mov_b32 v22, v24 :: v_dual_mov_b32 v23, v25 +; GFX11-NEXT: v_mov_b32_e32 v25, v57 +; GFX11-NEXT: scratch_store_b128 off, v[20:23], s2 +; GFX11-NEXT: s_add_i32 s2, s32, 64 +; GFX11-NEXT: scratch_store_b128 off, v[16:19], s2 +; GFX11-NEXT: s_add_i32 s2, s32, 48 +; GFX11-NEXT: scratch_store_b128 off, v[12:15], s2 +; GFX11-NEXT: s_add_i32 s2, s32, 32 +; GFX11-NEXT: scratch_store_b128 off, v[8:11], s2 +; GFX11-NEXT: s_clause 0x2 ; 44-byte Folded Reload +; GFX11-NEXT: scratch_load_b128 v[8:11], off, s33 offset:1872 +; GFX11-NEXT: scratch_load_b128 v[12:15], off, s33 offset:1888 +; GFX11-NEXT: scratch_load_b96 v[16:18], off, s33 offset:1904 ; GFX11-NEXT: s_add_i32 s2, s32, 16 -; GFX11-NEXT: v_mov_b32_e32 v29, v43 -; GFX11-NEXT: scratch_store_b128 off, v[50:53], s2 -; GFX11-NEXT: s_clause 0x3 ; 64-byte Folded Reload -; GFX11-NEXT: scratch_load_b128 v[1:4], off, s33 offset:1584 -; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:1536 -; GFX11-NEXT: scratch_load_b128 v[9:12], off, s33 offset:1568 -; GFX11-NEXT: scratch_load_b128 v[13:16], off, s33 offset:1552 +; GFX11-NEXT: s_waitcnt vmcnt(1) +; GFX11-NEXT: v_dual_mov_b32 v31, v10 :: v_dual_mov_b32 v36, v15 +; GFX11-NEXT: v_dual_mov_b32 v30, v9 :: v_dual_mov_b32 v29, v8 +; GFX11-NEXT: scratch_store_b128 off, v[36:39], s2 +; GFX11-NEXT: s_clause 0x4 ; 80-byte Folded Reload +; GFX11-NEXT: scratch_load_b128 v[5:8], off, s33 offset:1728 +; GFX11-NEXT: scratch_load_b128 v[9:12], off, s33 offset:1712 +; GFX11-NEXT: scratch_load_b128 v[13:16], off, s33 offset:1696 +; GFX11-NEXT: scratch_load_b128 v[17:20], off, s33 offset:1680 +; GFX11-NEXT: scratch_load_b128 v[21:24], off, s33 offset:1664 ; GFX11-NEXT: s_add_i32 s2, s33, 0x400 -; GFX11-NEXT: v_dual_mov_b32 v30, v44 :: v_dual_mov_b32 v31, v45 -; GFX11-NEXT: s_waitcnt vmcnt(3) -; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 42 -; GFX11-NEXT: v_dual_mov_b32 v17, v20 :: v_dual_mov_b32 v18, v21 -; GFX11-NEXT: v_dual_mov_b32 v19, v22 :: v_dual_mov_b32 v20, v23 -; GFX11-NEXT: v_dual_mov_b32 v21, v58 :: v_dual_mov_b32 v22, v59 -; GFX11-NEXT: v_dual_mov_b32 v23, v60 :: v_dual_mov_b32 v24, v61 -; GFX11-NEXT: v_dual_mov_b32 v25, v54 :: v_dual_mov_b32 v26, v55 -; GFX11-NEXT: v_dual_mov_b32 v27, v56 :: v_dual_mov_b32 v28, v57 +; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-NEXT: v_mov_b32_e32 v0, s2 ; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1] -; GFX11-NEXT: s_clause 0xd ; 56-byte Folded Reload -; GFX11-NEXT: scratch_load_b32 v61, off, s33 -; GFX11-NEXT: scratch_load_b32 v60, off, s33 offset:4 -; GFX11-NEXT: scratch_load_b32 v59, off, s33 offset:8 -; GFX11-NEXT: scratch_load_b32 v58, off, s33 offset:12 -; GFX11-NEXT: scratch_load_b32 v57, off, s33 offset:16 -; GFX11-NEXT: scratch_load_b32 v56, off, s33 offset:20 -; GFX11-NEXT: scratch_load_b32 v47, off, s33 offset:24 -; GFX11-NEXT: scratch_load_b32 v46, off, s33 offset:28 -; GFX11-NEXT: scratch_load_b32 v45, off, s33 offset:32 -; GFX11-NEXT: scratch_load_b32 v44, off, s33 offset:36 -; GFX11-NEXT: scratch_load_b32 v43, off, s33 offset:40 -; GFX11-NEXT: scratch_load_b32 v42, off, s33 offset:44 -; GFX11-NEXT: scratch_load_b32 v41, off, s33 offset:48 -; GFX11-NEXT: scratch_load_b32 v40, off, s33 offset:52 -; GFX11-NEXT: v_readlane_b32 s30, v62, 0 -; GFX11-NEXT: v_readlane_b32 s31, v62, 1 +; GFX11-NEXT: s_clause 0xc ; 52-byte Folded Reload +; GFX11-NEXT: scratch_load_b32 v60, off, s33 +; GFX11-NEXT: scratch_load_b32 v59, off, s33 offset:4 +; GFX11-NEXT: scratch_load_b32 v58, off, s33 offset:8 +; GFX11-NEXT: scratch_load_b32 v57, off, s33 offset:12 +; GFX11-NEXT: scratch_load_b32 v56, off, s33 offset:16 +; GFX11-NEXT: scratch_load_b32 v47, off, s33 offset:20 +; GFX11-NEXT: scratch_load_b32 v46, off, s33 offset:24 +; GFX11-NEXT: scratch_load_b32 v45, off, s33 offset:28 +; GFX11-NEXT: scratch_load_b32 v44, off, s33 offset:32 +; GFX11-NEXT: scratch_load_b32 v43, off, s33 offset:36 +; GFX11-NEXT: scratch_load_b32 v42, off, s33 offset:40 +; GFX11-NEXT: scratch_load_b32 v41, off, s33 offset:44 +; GFX11-NEXT: scratch_load_b32 v40, off, s33 offset:48 +; GFX11-NEXT: v_readlane_b32 s30, v61, 0 +; GFX11-NEXT: v_readlane_b32 s31, v61, 1 ; GFX11-NEXT: s_mov_b32 s32, s34 -; GFX11-NEXT: s_mov_b32 s34, s39 +; GFX11-NEXT: s_mov_b32 s34, s36 ; GFX11-NEXT: s_or_saveexec_b32 s0, -1 -; GFX11-NEXT: scratch_load_b32 v62, off, s33 offset:1600 ; 4-byte Folded Reload +; GFX11-NEXT: scratch_load_b32 v61, off, s33 offset:1916 ; 4-byte Folded Reload ; GFX11-NEXT: s_mov_b32 exec_lo, s0 -; GFX11-NEXT: s_mov_b32 s33, s38 +; GFX11-NEXT: s_mov_b32 s33, s35 ; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_setpc_b64 s[30:31] entry: diff --git a/llvm/test/CodeGen/AMDGPU/half.ll b/llvm/test/CodeGen/AMDGPU/half.ll index a61d6a6cc071f..c5d812d599d25 100644 --- a/llvm/test/CodeGen/AMDGPU/half.ll +++ b/llvm/test/CodeGen/AMDGPU/half.ll @@ -1462,48 +1462,48 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f32(ptr addrspace(1) %out ; CI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; CI-NEXT: s_add_u32 s2, s0, 16 ; CI-NEXT: s_addc_u32 s3, s1, 0 -; CI-NEXT: v_mov_b32_e32 v16, s3 -; CI-NEXT: v_mov_b32_e32 v15, s2 +; CI-NEXT: v_mov_b32_e32 v19, s3 +; CI-NEXT: v_mov_b32_e32 v18, s2 ; CI-NEXT: s_add_u32 s2, s0, 48 +; CI-NEXT: v_mov_b32_e32 v17, s1 ; CI-NEXT: s_addc_u32 s3, s1, 0 +; CI-NEXT: v_mov_b32_e32 v16, s0 +; CI-NEXT: s_add_u32 s0, s0, 32 +; CI-NEXT: s_addc_u32 s1, s1, 0 +; CI-NEXT: v_mov_b32_e32 v21, s3 +; CI-NEXT: v_mov_b32_e32 v20, s2 ; CI-NEXT: s_waitcnt vmcnt(1) -; CI-NEXT: v_lshrrev_b32_e32 v8, 16, v2 -; CI-NEXT: v_lshrrev_b32_e32 v9, 16, v3 -; CI-NEXT: v_cvt_f32_f16_e32 v11, v9 -; CI-NEXT: v_cvt_f32_f16_e32 v9, v8 -; CI-NEXT: v_cvt_f32_f16_e32 v10, v3 -; CI-NEXT: v_cvt_f32_f16_e32 v8, v2 -; CI-NEXT: v_lshrrev_b32_e32 v13, 16, v0 -; CI-NEXT: v_lshrrev_b32_e32 v17, 16, v1 -; CI-NEXT: v_cvt_f32_f16_e32 v14, v1 -; CI-NEXT: v_cvt_f32_f16_e32 v12, v0 +; CI-NEXT: v_lshrrev_b32_e32 v9, 16, v2 +; CI-NEXT: v_lshrrev_b32_e32 v13, 16, v3 +; CI-NEXT: v_cvt_f32_f16_e32 v14, v3 +; CI-NEXT: v_cvt_f32_f16_e32 v12, v2 +; CI-NEXT: v_cvt_f32_f16_e32 v15, v13 +; CI-NEXT: v_cvt_f32_f16_e32 v13, v9 +; CI-NEXT: v_lshrrev_b32_e32 v22, 16, v0 +; CI-NEXT: v_lshrrev_b32_e32 v11, 16, v1 +; CI-NEXT: v_cvt_f32_f16_e32 v10, v1 +; CI-NEXT: v_cvt_f32_f16_e32 v8, v0 +; CI-NEXT: v_cvt_f32_f16_e32 v11, v11 +; CI-NEXT: v_cvt_f32_f16_e32 v9, v22 ; CI-NEXT: s_waitcnt vmcnt(0) ; CI-NEXT: v_lshrrev_b32_e32 v1, 16, v6 -; CI-NEXT: v_lshrrev_b32_e32 v18, 16, v7 -; CI-NEXT: flat_store_dwordx4 v[15:16], v[8:11] +; CI-NEXT: v_lshrrev_b32_e32 v22, 16, v7 +; CI-NEXT: flat_store_dwordx4 v[18:19], v[12:15] +; CI-NEXT: v_lshrrev_b32_e32 v18, 16, v4 +; CI-NEXT: v_lshrrev_b32_e32 v3, 16, v5 +; CI-NEXT: v_cvt_f32_f16_e32 v14, v7 +; CI-NEXT: v_cvt_f32_f16_e32 v12, v6 +; CI-NEXT: v_cvt_f32_f16_e32 v15, v22 +; CI-NEXT: v_cvt_f32_f16_e32 v13, v1 ; CI-NEXT: v_cvt_f32_f16_e32 v2, v5 ; CI-NEXT: v_cvt_f32_f16_e32 v0, v4 -; CI-NEXT: v_lshrrev_b32_e32 v16, 16, v4 -; CI-NEXT: v_lshrrev_b32_e32 v3, 16, v5 +; CI-NEXT: v_cvt_f32_f16_e32 v3, v3 +; CI-NEXT: v_cvt_f32_f16_e32 v1, v18 ; CI-NEXT: v_mov_b32_e32 v5, s1 -; CI-NEXT: v_cvt_f32_f16_e32 v15, v17 -; CI-NEXT: v_cvt_f32_f16_e32 v13, v13 -; CI-NEXT: v_cvt_f32_f16_e32 v8, v7 -; CI-NEXT: v_cvt_f32_f16_e32 v6, v6 ; CI-NEXT: v_mov_b32_e32 v4, s0 -; CI-NEXT: s_add_u32 s0, s0, 32 -; CI-NEXT: v_cvt_f32_f16_e32 v9, v18 -; CI-NEXT: v_cvt_f32_f16_e32 v7, v1 -; CI-NEXT: s_addc_u32 s1, s1, 0 -; CI-NEXT: v_cvt_f32_f16_e32 v3, v3 -; CI-NEXT: v_cvt_f32_f16_e32 v1, v16 -; CI-NEXT: v_mov_b32_e32 v11, s3 -; CI-NEXT: v_mov_b32_e32 v17, s1 -; CI-NEXT: v_mov_b32_e32 v10, s2 -; CI-NEXT: v_mov_b32_e32 v16, s0 -; CI-NEXT: flat_store_dwordx4 v[4:5], v[12:15] -; CI-NEXT: flat_store_dwordx4 v[10:11], v[6:9] -; CI-NEXT: flat_store_dwordx4 v[16:17], v[0:3] +; CI-NEXT: flat_store_dwordx4 v[16:17], v[8:11] +; CI-NEXT: flat_store_dwordx4 v[20:21], v[12:15] +; CI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; CI-NEXT: s_endpgm ; ; VI-LABEL: global_extload_v16f16_to_v16f32: @@ -2009,43 +2009,43 @@ define amdgpu_kernel void @global_extload_v8f16_to_v8f64(ptr addrspace(1) %out, ; CI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; CI-NEXT: s_add_u32 s2, s0, 48 ; CI-NEXT: s_addc_u32 s3, s1, 0 -; CI-NEXT: v_mov_b32_e32 v7, s3 -; CI-NEXT: v_mov_b32_e32 v6, s2 +; CI-NEXT: v_mov_b32_e32 v9, s3 +; CI-NEXT: v_mov_b32_e32 v8, s2 ; CI-NEXT: s_add_u32 s2, s0, 32 -; CI-NEXT: v_mov_b32_e32 v13, s1 +; CI-NEXT: v_mov_b32_e32 v15, s1 ; CI-NEXT: s_addc_u32 s3, s1, 0 -; CI-NEXT: v_mov_b32_e32 v12, s0 +; CI-NEXT: v_mov_b32_e32 v14, s0 ; CI-NEXT: s_add_u32 s0, s0, 16 -; CI-NEXT: v_mov_b32_e32 v15, s3 +; CI-NEXT: v_mov_b32_e32 v17, s3 ; CI-NEXT: s_addc_u32 s1, s1, 0 -; CI-NEXT: v_mov_b32_e32 v14, s2 +; CI-NEXT: v_mov_b32_e32 v16, s2 ; CI-NEXT: s_waitcnt vmcnt(0) ; CI-NEXT: v_lshrrev_b32_e32 v4, 16, v3 -; CI-NEXT: v_lshrrev_b32_e32 v9, 16, v0 -; CI-NEXT: v_cvt_f32_f16_e32 v10, v0 -; CI-NEXT: v_cvt_f32_f16_e32 v0, v3 -; CI-NEXT: v_cvt_f32_f16_e32 v3, v4 ; CI-NEXT: v_lshrrev_b32_e32 v5, 16, v2 -; CI-NEXT: v_lshrrev_b32_e32 v8, 16, v1 -; CI-NEXT: v_cvt_f32_f16_e32 v11, v1 -; CI-NEXT: v_cvt_f32_f16_e32 v16, v2 +; CI-NEXT: v_cvt_f32_f16_e32 v11, v2 +; CI-NEXT: v_cvt_f32_f16_e32 v2, v3 +; CI-NEXT: v_cvt_f32_f16_e32 v4, v4 +; CI-NEXT: v_lshrrev_b32_e32 v6, 16, v1 +; CI-NEXT: v_cvt_f32_f16_e32 v10, v1 +; CI-NEXT: v_cvt_f32_f16_e32 v12, v5 +; CI-NEXT: v_lshrrev_b32_e32 v7, 16, v0 +; CI-NEXT: v_cvt_f32_f16_e32 v19, v6 +; CI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 +; CI-NEXT: v_cvt_f64_f32_e32 v[4:5], v4 +; CI-NEXT: v_cvt_f32_f16_e32 v0, v0 +; CI-NEXT: v_cvt_f32_f16_e32 v18, v7 +; CI-NEXT: v_cvt_f64_f32_e32 v[6:7], v10 +; CI-NEXT: v_cvt_f64_f32_e32 v[10:11], v11 +; CI-NEXT: v_cvt_f64_f32_e32 v[12:13], v12 +; CI-NEXT: flat_store_dwordx4 v[8:9], v[2:5] +; CI-NEXT: v_cvt_f64_f32_e32 v[8:9], v19 ; CI-NEXT: v_cvt_f64_f32_e32 v[0:1], v0 -; CI-NEXT: v_cvt_f64_f32_e32 v[2:3], v3 -; CI-NEXT: v_cvt_f32_f16_e32 v19, v5 -; CI-NEXT: v_cvt_f32_f16_e32 v18, v8 -; CI-NEXT: v_cvt_f32_f16_e32 v17, v9 -; CI-NEXT: v_cvt_f64_f32_e32 v[4:5], v10 -; CI-NEXT: flat_store_dwordx4 v[6:7], v[0:3] -; CI-NEXT: v_cvt_f64_f32_e32 v[8:9], v16 -; CI-NEXT: v_cvt_f64_f32_e32 v[0:1], v11 -; CI-NEXT: v_cvt_f64_f32_e32 v[10:11], v19 ; CI-NEXT: v_cvt_f64_f32_e32 v[2:3], v18 -; CI-NEXT: v_cvt_f64_f32_e32 v[6:7], v17 -; CI-NEXT: v_mov_b32_e32 v17, s1 -; CI-NEXT: v_mov_b32_e32 v16, s0 -; CI-NEXT: flat_store_dwordx4 v[14:15], v[8:11] -; CI-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; CI-NEXT: flat_store_dwordx4 v[12:13], v[4:7] +; CI-NEXT: v_mov_b32_e32 v5, s1 +; CI-NEXT: v_mov_b32_e32 v4, s0 +; CI-NEXT: flat_store_dwordx4 v[16:17], v[10:13] +; CI-NEXT: flat_store_dwordx4 v[4:5], v[6:9] +; CI-NEXT: flat_store_dwordx4 v[14:15], v[0:3] ; CI-NEXT: s_endpgm ; ; VI-LABEL: global_extload_v8f16_to_v8f64: @@ -2060,39 +2060,39 @@ define amdgpu_kernel void @global_extload_v8f16_to_v8f64(ptr addrspace(1) %out, ; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; VI-NEXT: s_add_u32 s2, s0, 48 ; VI-NEXT: s_addc_u32 s3, s1, 0 -; VI-NEXT: v_mov_b32_e32 v8, s3 -; VI-NEXT: v_mov_b32_e32 v7, s2 +; VI-NEXT: v_mov_b32_e32 v9, s3 +; VI-NEXT: v_mov_b32_e32 v8, s2 ; VI-NEXT: s_add_u32 s2, s0, 32 -; VI-NEXT: v_mov_b32_e32 v13, s1 +; VI-NEXT: v_mov_b32_e32 v15, s1 ; VI-NEXT: s_addc_u32 s3, s1, 0 -; VI-NEXT: v_mov_b32_e32 v12, s0 +; VI-NEXT: v_mov_b32_e32 v14, s0 ; VI-NEXT: s_add_u32 s0, s0, 16 -; VI-NEXT: v_mov_b32_e32 v15, s3 +; VI-NEXT: v_mov_b32_e32 v17, s3 ; VI-NEXT: s_addc_u32 s1, s1, 0 -; VI-NEXT: v_mov_b32_e32 v14, s2 +; VI-NEXT: v_mov_b32_e32 v16, s2 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_cvt_f32_f16_e32 v9, v0 -; VI-NEXT: v_cvt_f32_f16_sdwa v16, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -; VI-NEXT: v_cvt_f32_f16_e32 v0, v3 -; VI-NEXT: v_cvt_f32_f16_sdwa v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -; VI-NEXT: v_cvt_f32_f16_e32 v10, v1 -; VI-NEXT: v_cvt_f32_f16_e32 v11, v2 -; VI-NEXT: v_cvt_f64_f32_e32 v[3:4], v0 -; VI-NEXT: v_cvt_f64_f32_e32 v[5:6], v5 -; VI-NEXT: v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -; VI-NEXT: v_cvt_f32_f16_sdwa v17, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v9 -; VI-NEXT: flat_store_dwordx4 v[7:8], v[3:6] -; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v11 -; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v10 -; VI-NEXT: v_cvt_f64_f32_e32 v[10:11], v2 -; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v17 -; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v16 -; VI-NEXT: v_mov_b32_e32 v17, s1 -; VI-NEXT: v_mov_b32_e32 v16, s0 -; VI-NEXT: flat_store_dwordx4 v[14:15], v[8:11] -; VI-NEXT: flat_store_dwordx4 v[16:17], v[4:7] -; VI-NEXT: flat_store_dwordx4 v[12:13], v[0:3] +; VI-NEXT: v_cvt_f32_f16_e32 v4, v0 +; VI-NEXT: v_cvt_f32_f16_e32 v5, v3 +; VI-NEXT: v_cvt_f32_f16_sdwa v7, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; VI-NEXT: v_cvt_f32_f16_e32 v10, v2 +; VI-NEXT: v_cvt_f32_f16_sdwa v12, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; VI-NEXT: v_cvt_f32_f16_sdwa v18, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; VI-NEXT: v_cvt_f32_f16_e32 v6, v1 +; VI-NEXT: v_cvt_f32_f16_sdwa v19, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v4 +; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v5 +; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v7 +; VI-NEXT: v_cvt_f64_f32_e32 v[10:11], v10 +; VI-NEXT: v_cvt_f64_f32_e32 v[12:13], v12 +; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v6 +; VI-NEXT: flat_store_dwordx4 v[8:9], v[2:5] +; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v19 +; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v18 +; VI-NEXT: v_mov_b32_e32 v5, s1 +; VI-NEXT: v_mov_b32_e32 v4, s0 +; VI-NEXT: flat_store_dwordx4 v[16:17], v[10:13] +; VI-NEXT: flat_store_dwordx4 v[4:5], v[6:9] +; VI-NEXT: flat_store_dwordx4 v[14:15], v[0:3] ; VI-NEXT: s_endpgm ; ; GFX11-TRUE16-LABEL: global_extload_v8f16_to_v8f64: @@ -2178,92 +2178,92 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out ; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: v_mov_b32_e32 v0, s2 ; CI-NEXT: v_mov_b32_e32 v1, s3 -; CI-NEXT: flat_load_dwordx4 v[4:7], v[0:1] +; CI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; CI-NEXT: s_add_u32 s2, s2, 16 ; CI-NEXT: s_addc_u32 s3, s3, 0 -; CI-NEXT: v_mov_b32_e32 v0, s2 -; CI-NEXT: v_mov_b32_e32 v1, s3 -; CI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] +; CI-NEXT: v_mov_b32_e32 v5, s3 +; CI-NEXT: v_mov_b32_e32 v4, s2 +; CI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; CI-NEXT: s_add_u32 s2, s0, 48 ; CI-NEXT: s_addc_u32 s3, s1, 0 -; CI-NEXT: v_mov_b32_e32 v14, s3 -; CI-NEXT: v_mov_b32_e32 v13, s2 +; CI-NEXT: v_mov_b32_e32 v15, s3 +; CI-NEXT: v_mov_b32_e32 v14, s2 ; CI-NEXT: s_add_u32 s2, s0, 32 ; CI-NEXT: s_addc_u32 s3, s1, 0 -; CI-NEXT: v_mov_b32_e32 v16, s3 -; CI-NEXT: v_mov_b32_e32 v15, s2 +; CI-NEXT: v_mov_b32_e32 v17, s3 +; CI-NEXT: v_mov_b32_e32 v16, s2 ; CI-NEXT: s_add_u32 s2, s0, 16 ; CI-NEXT: s_addc_u32 s3, s1, 0 -; CI-NEXT: v_mov_b32_e32 v18, s3 -; CI-NEXT: v_mov_b32_e32 v17, s2 +; CI-NEXT: v_mov_b32_e32 v19, s3 +; CI-NEXT: v_mov_b32_e32 v18, s2 ; CI-NEXT: s_add_u32 s2, s0, 0x70 ; CI-NEXT: s_addc_u32 s3, s1, 0 -; CI-NEXT: v_mov_b32_e32 v12, s1 -; CI-NEXT: v_mov_b32_e32 v11, s0 +; CI-NEXT: v_mov_b32_e32 v13, s1 +; CI-NEXT: v_mov_b32_e32 v12, s0 ; CI-NEXT: s_waitcnt vmcnt(1) -; CI-NEXT: v_lshrrev_b32_e32 v8, 16, v7 -; CI-NEXT: v_cvt_f32_f16_e32 v7, v7 -; CI-NEXT: v_cvt_f32_f16_e32 v9, v8 -; CI-NEXT: s_waitcnt vmcnt(0) -; CI-NEXT: v_lshrrev_b32_e32 v19, 16, v2 -; CI-NEXT: v_cvt_f64_f32_e32 v[7:8], v7 -; CI-NEXT: v_cvt_f64_f32_e32 v[9:10], v9 -; CI-NEXT: v_cvt_f32_f16_e32 v20, v2 -; CI-NEXT: v_cvt_f32_f16_e32 v21, v3 -; CI-NEXT: flat_store_dwordx4 v[13:14], v[7:10] -; CI-NEXT: v_mov_b32_e32 v14, s3 -; CI-NEXT: v_lshrrev_b32_e32 v7, 16, v6 -; CI-NEXT: v_cvt_f32_f16_e32 v6, v6 -; CI-NEXT: v_cvt_f32_f16_e32 v8, v7 -; CI-NEXT: v_lshrrev_b32_e32 v10, 16, v3 -; CI-NEXT: v_mov_b32_e32 v13, s2 -; CI-NEXT: v_cvt_f64_f32_e32 v[6:7], v6 -; CI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8 +; CI-NEXT: v_lshrrev_b32_e32 v8, 16, v3 +; CI-NEXT: v_cvt_f32_f16_e32 v3, v3 +; CI-NEXT: v_cvt_f32_f16_e32 v10, v8 +; CI-NEXT: v_cvt_f64_f32_e32 v[8:9], v3 +; CI-NEXT: v_cvt_f64_f32_e32 v[10:11], v10 +; CI-NEXT: v_lshrrev_b32_e32 v3, 16, v2 +; CI-NEXT: v_cvt_f32_f16_e32 v2, v2 +; CI-NEXT: v_cvt_f32_f16_e32 v3, v3 +; CI-NEXT: flat_store_dwordx4 v[14:15], v[8:11] +; CI-NEXT: v_mov_b32_e32 v15, s3 +; CI-NEXT: v_cvt_f64_f32_e32 v[8:9], v2 +; CI-NEXT: v_lshrrev_b32_e32 v2, 16, v1 +; CI-NEXT: v_cvt_f64_f32_e32 v[10:11], v3 +; CI-NEXT: v_cvt_f32_f16_e32 v1, v1 +; CI-NEXT: v_cvt_f32_f16_e32 v2, v2 +; CI-NEXT: v_mov_b32_e32 v14, s2 +; CI-NEXT: flat_store_dwordx4 v[16:17], v[8:11] ; CI-NEXT: s_add_u32 s2, s0, 0x60 +; CI-NEXT: v_cvt_f64_f32_e32 v[8:9], v1 +; CI-NEXT: v_cvt_f64_f32_e32 v[10:11], v2 +; CI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; CI-NEXT: v_cvt_f32_f16_e32 v0, v0 +; CI-NEXT: v_cvt_f32_f16_e32 v2, v1 +; CI-NEXT: flat_store_dwordx4 v[18:19], v[8:11] +; CI-NEXT: s_waitcnt vmcnt(3) +; CI-NEXT: v_lshrrev_b32_e32 v1, 16, v4 +; CI-NEXT: v_lshrrev_b32_e32 v8, 16, v7 +; CI-NEXT: v_lshrrev_b32_e32 v9, 16, v6 +; CI-NEXT: v_lshrrev_b32_e32 v10, 16, v5 +; CI-NEXT: v_cvt_f32_f16_e32 v4, v4 +; CI-NEXT: v_cvt_f32_f16_e32 v11, v5 +; CI-NEXT: v_cvt_f32_f16_e32 v18, v6 +; CI-NEXT: v_cvt_f32_f16_e32 v5, v7 +; CI-NEXT: v_cvt_f32_f16_e32 v19, v1 +; CI-NEXT: v_cvt_f64_f32_e32 v[0:1], v0 +; CI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 +; CI-NEXT: v_cvt_f32_f16_e32 v6, v8 +; CI-NEXT: v_cvt_f32_f16_e32 v9, v9 ; CI-NEXT: s_addc_u32 s3, s1, 0 -; CI-NEXT: flat_store_dwordx4 v[15:16], v[6:9] -; CI-NEXT: v_mov_b32_e32 v16, s3 -; CI-NEXT: v_lshrrev_b32_e32 v6, 16, v5 -; CI-NEXT: v_cvt_f32_f16_e32 v5, v5 -; CI-NEXT: v_cvt_f32_f16_e32 v6, v6 -; CI-NEXT: v_lshrrev_b32_e32 v8, 16, v4 -; CI-NEXT: v_cvt_f32_f16_e32 v9, v4 -; CI-NEXT: v_cvt_f64_f32_e32 v[4:5], v5 -; CI-NEXT: v_cvt_f64_f32_e32 v[6:7], v6 -; CI-NEXT: v_cvt_f32_f16_e32 v8, v8 -; CI-NEXT: v_mov_b32_e32 v15, s2 +; CI-NEXT: v_cvt_f32_f16_e32 v22, v10 +; CI-NEXT: v_mov_b32_e32 v21, s3 +; CI-NEXT: flat_store_dwordx4 v[12:13], v[0:3] +; CI-NEXT: v_mov_b32_e32 v20, s2 +; CI-NEXT: v_cvt_f64_f32_e32 v[0:1], v4 +; CI-NEXT: v_cvt_f64_f32_e32 v[2:3], v5 +; CI-NEXT: v_cvt_f64_f32_e32 v[4:5], v6 ; CI-NEXT: s_add_u32 s2, s0, 0x50 -; CI-NEXT: flat_store_dwordx4 v[17:18], v[4:7] -; CI-NEXT: v_cvt_f64_f32_e32 v[2:3], v8 -; CI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 -; CI-NEXT: v_lshrrev_b32_e32 v5, 16, v0 -; CI-NEXT: v_cvt_f32_f16_e32 v6, v0 -; CI-NEXT: v_cvt_f32_f16_e32 v7, v1 -; CI-NEXT: v_cvt_f64_f32_e32 v[0:1], v9 -; CI-NEXT: v_cvt_f32_f16_e32 v8, v10 -; CI-NEXT: v_cvt_f32_f16_e32 v10, v19 -; CI-NEXT: v_cvt_f32_f16_e32 v22, v5 -; CI-NEXT: flat_store_dwordx4 v[11:12], v[0:3] -; CI-NEXT: v_cvt_f32_f16_e32 v12, v4 -; CI-NEXT: v_cvt_f64_f32_e32 v[0:1], v21 -; CI-NEXT: v_cvt_f64_f32_e32 v[2:3], v8 ; CI-NEXT: s_addc_u32 s3, s1, 0 -; CI-NEXT: v_cvt_f64_f32_e32 v[8:9], v20 -; CI-NEXT: v_cvt_f64_f32_e32 v[10:11], v10 +; CI-NEXT: v_cvt_f64_f32_e32 v[6:7], v11 +; CI-NEXT: v_cvt_f64_f32_e32 v[10:11], v18 +; CI-NEXT: v_cvt_f64_f32_e32 v[12:13], v9 ; CI-NEXT: s_add_u32 s0, s0, 64 -; CI-NEXT: flat_store_dwordx4 v[13:14], v[0:3] +; CI-NEXT: v_cvt_f64_f32_e32 v[8:9], v22 ; CI-NEXT: s_addc_u32 s1, s1, 0 -; CI-NEXT: v_cvt_f64_f32_e32 v[0:1], v7 -; CI-NEXT: v_cvt_f64_f32_e32 v[2:3], v12 -; CI-NEXT: v_cvt_f64_f32_e32 v[4:5], v6 -; CI-NEXT: v_cvt_f64_f32_e32 v[6:7], v22 -; CI-NEXT: v_mov_b32_e32 v18, s3 -; CI-NEXT: v_mov_b32_e32 v13, s1 -; CI-NEXT: v_mov_b32_e32 v17, s2 -; CI-NEXT: v_mov_b32_e32 v12, s0 -; CI-NEXT: flat_store_dwordx4 v[15:16], v[8:11] -; CI-NEXT: flat_store_dwordx4 v[17:18], v[0:3] -; CI-NEXT: flat_store_dwordx4 v[12:13], v[4:7] +; CI-NEXT: flat_store_dwordx4 v[14:15], v[2:5] +; CI-NEXT: v_mov_b32_e32 v17, s3 +; CI-NEXT: v_cvt_f64_f32_e32 v[2:3], v19 +; CI-NEXT: v_mov_b32_e32 v5, s1 +; CI-NEXT: v_mov_b32_e32 v16, s2 +; CI-NEXT: v_mov_b32_e32 v4, s0 +; CI-NEXT: flat_store_dwordx4 v[20:21], v[10:13] +; CI-NEXT: flat_store_dwordx4 v[16:17], v[6:9] +; CI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; CI-NEXT: s_endpgm ; ; VI-LABEL: global_extload_v16f16_to_v16f64: @@ -2294,65 +2294,66 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out ; VI-NEXT: v_mov_b32_e32 v18, s3 ; VI-NEXT: v_mov_b32_e32 v17, s2 ; VI-NEXT: s_add_u32 s2, s0, 0x50 -; VI-NEXT: v_mov_b32_e32 v12, s1 ; VI-NEXT: s_addc_u32 s3, s1, 0 +; VI-NEXT: v_mov_b32_e32 v20, s3 +; VI-NEXT: v_mov_b32_e32 v12, s1 +; VI-NEXT: v_mov_b32_e32 v19, s2 +; VI-NEXT: s_add_u32 s2, s0, 64 ; VI-NEXT: v_mov_b32_e32 v11, s0 +; VI-NEXT: s_addc_u32 s3, s1, 0 +; VI-NEXT: v_mov_b32_e32 v22, s3 +; VI-NEXT: v_mov_b32_e32 v21, s2 +; VI-NEXT: s_add_u32 s2, s0, 0x70 +; VI-NEXT: s_addc_u32 s3, s1, 0 +; VI-NEXT: s_add_u32 s0, s0, 0x60 +; VI-NEXT: s_addc_u32 s1, s1, 0 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_cvt_f32_f16_e32 v8, v7 ; VI-NEXT: v_cvt_f32_f16_sdwa v9, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f64_f32_e32 v[7:8], v8 ; VI-NEXT: v_cvt_f64_f32_e32 v[9:10], v9 ; VI-NEXT: flat_store_dwordx4 v[13:14], v[7:10] -; VI-NEXT: v_mov_b32_e32 v14, s3 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_cvt_f32_f16_e32 v13, v1 ; VI-NEXT: v_cvt_f32_f16_e32 v7, v6 ; VI-NEXT: v_cvt_f32_f16_sdwa v8, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_cvt_f32_f16_e32 v10, v2 -; VI-NEXT: v_mov_b32_e32 v13, s2 +; VI-NEXT: v_cvt_f32_f16_e32 v10, v0 ; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v7 ; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8 -; VI-NEXT: s_add_u32 s2, s0, 64 -; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: flat_store_dwordx4 v[15:16], v[6:9] -; VI-NEXT: v_mov_b32_e32 v16, s3 +; VI-NEXT: v_cvt_f32_f16_sdwa v16, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_e32 v6, v5 ; VI-NEXT: v_cvt_f32_f16_sdwa v7, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -; VI-NEXT: v_cvt_f32_f16_e32 v8, v4 -; VI-NEXT: v_cvt_f32_f16_sdwa v9, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v6 -; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v7 -; VI-NEXT: v_mov_b32_e32 v15, s2 -; VI-NEXT: s_add_u32 s2, s0, 0x70 -; VI-NEXT: s_addc_u32 s3, s1, 0 -; VI-NEXT: flat_store_dwordx4 v[17:18], v[4:7] -; VI-NEXT: v_cvt_f32_f16_sdwa v17, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v8 -; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v9 -; VI-NEXT: v_cvt_f32_f16_sdwa v9, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -; VI-NEXT: v_cvt_f32_f16_sdwa v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 -; VI-NEXT: v_cvt_f32_f16_e32 v2, v1 -; VI-NEXT: flat_store_dwordx4 v[11:12], v[4:7] -; VI-NEXT: v_cvt_f32_f16_sdwa v11, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; VI-NEXT: v_cvt_f32_f16_e32 v9, v4 +; VI-NEXT: v_cvt_f32_f16_sdwa v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; VI-NEXT: v_cvt_f64_f32_e32 v[5:6], v6 +; VI-NEXT: v_cvt_f64_f32_e32 v[7:8], v7 +; VI-NEXT: v_mov_b32_e32 v15, s3 +; VI-NEXT: v_mov_b32_e32 v14, s2 +; VI-NEXT: flat_store_dwordx4 v[17:18], v[5:8] +; VI-NEXT: v_cvt_f32_f16_sdwa v17, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; VI-NEXT: v_cvt_f32_f16_e32 v6, v2 ; VI-NEXT: v_cvt_f32_f16_e32 v7, v3 -; VI-NEXT: v_cvt_f64_f32_e32 v[3:4], v9 -; VI-NEXT: v_cvt_f32_f16_e32 v9, v0 -; VI-NEXT: v_cvt_f64_f32_e32 v[1:2], v2 -; VI-NEXT: v_cvt_f64_f32_e32 v[5:6], v10 -; VI-NEXT: v_cvt_f64_f32_e32 v[11:12], v11 -; VI-NEXT: v_cvt_f64_f32_e32 v[9:10], v9 -; VI-NEXT: s_add_u32 s0, s0, 0x60 -; VI-NEXT: flat_store_dwordx4 v[13:14], v[1:4] -; VI-NEXT: s_addc_u32 s1, s1, 0 -; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v7 -; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v17 -; VI-NEXT: v_cvt_f64_f32_e32 v[7:8], v8 -; VI-NEXT: v_mov_b32_e32 v20, s3 -; VI-NEXT: v_mov_b32_e32 v14, s1 -; VI-NEXT: v_mov_b32_e32 v19, s2 -; VI-NEXT: v_mov_b32_e32 v13, s0 -; VI-NEXT: flat_store_dwordx4 v[15:16], v[9:12] -; VI-NEXT: flat_store_dwordx4 v[19:20], v[0:3] -; VI-NEXT: flat_store_dwordx4 v[13:14], v[5:8] +; VI-NEXT: v_cvt_f32_f16_sdwa v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v9 +; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v4 +; VI-NEXT: v_cvt_f32_f16_sdwa v9, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v6 +; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v7 +; VI-NEXT: flat_store_dwordx4 v[11:12], v[2:5] +; VI-NEXT: v_cvt_f64_f32_e32 v[10:11], v10 +; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v13 +; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v17 +; VI-NEXT: v_cvt_f64_f32_e32 v[12:13], v9 +; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8 +; VI-NEXT: flat_store_dwordx4 v[19:20], v[2:5] +; VI-NEXT: s_nop 0 +; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v16 +; VI-NEXT: v_mov_b32_e32 v5, s1 +; VI-NEXT: v_mov_b32_e32 v4, s0 +; VI-NEXT: flat_store_dwordx4 v[21:22], v[10:13] +; VI-NEXT: flat_store_dwordx4 v[14:15], v[6:9] +; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: s_endpgm ; ; GFX11-TRUE16-LABEL: global_extload_v16f16_to_v16f64: @@ -2918,51 +2919,52 @@ define amdgpu_kernel void @global_truncstore_v16f32_to_v16f16(ptr addrspace(1) % ; CI-NEXT: s_addc_u32 s3, s3, 0 ; CI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; CI-NEXT: v_mov_b32_e32 v13, s3 -; CI-NEXT: v_mov_b32_e32 v12, s2 ; CI-NEXT: flat_load_dwordx4 v[8:11], v[8:9] +; CI-NEXT: v_mov_b32_e32 v12, s2 ; CI-NEXT: flat_load_dwordx4 v[12:15], v[12:13] ; CI-NEXT: s_add_u32 s2, s0, 16 ; CI-NEXT: s_addc_u32 s3, s1, 0 +; CI-NEXT: v_mov_b32_e32 v17, s3 +; CI-NEXT: v_mov_b32_e32 v16, s2 ; CI-NEXT: s_waitcnt vmcnt(3) ; CI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; CI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; CI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; CI-NEXT: s_waitcnt vmcnt(2) ; CI-NEXT: v_cvt_f16_f32_e32 v7, v7 -; CI-NEXT: v_cvt_f16_f32_e32 v16, v5 +; CI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; CI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; CI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; CI-NEXT: v_cvt_f16_f32_e32 v17, v4 +; CI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; CI-NEXT: s_waitcnt vmcnt(1) ; CI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; CI-NEXT: v_cvt_f16_f32_e32 v9, v9 +; CI-NEXT: v_cvt_f16_f32_e32 v10, v10 +; CI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; CI-NEXT: s_waitcnt vmcnt(0) ; CI-NEXT: v_cvt_f16_f32_e32 v15, v15 ; CI-NEXT: v_cvt_f16_f32_e32 v13, v13 -; CI-NEXT: v_cvt_f16_f32_e32 v10, v10 -; CI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; CI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; CI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; CI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; CI-NEXT: v_mov_b32_e32 v5, s3 ; CI-NEXT: v_lshlrev_b32_e32 v18, 16, v1 ; CI-NEXT: v_or_b32_e32 v1, v2, v3 ; CI-NEXT: v_lshlrev_b32_e32 v2, 16, v7 -; CI-NEXT: v_lshlrev_b32_e32 v7, 16, v16 -; CI-NEXT: v_mov_b32_e32 v4, s2 +; CI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; CI-NEXT: v_or_b32_e32 v0, v0, v18 ; CI-NEXT: v_or_b32_e32 v3, v6, v2 -; CI-NEXT: v_or_b32_e32 v2, v17, v7 -; CI-NEXT: v_lshlrev_b32_e32 v6, 16, v11 -; CI-NEXT: v_lshlrev_b32_e32 v7, 16, v9 -; CI-NEXT: v_lshlrev_b32_e32 v9, 16, v15 -; CI-NEXT: v_lshlrev_b32_e32 v11, 16, v13 -; CI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; CI-NEXT: v_or_b32_e32 v2, v4, v5 +; CI-NEXT: v_lshlrev_b32_e32 v4, 16, v11 +; CI-NEXT: v_lshlrev_b32_e32 v5, 16, v9 +; CI-NEXT: v_lshlrev_b32_e32 v6, 16, v15 +; CI-NEXT: v_lshlrev_b32_e32 v7, 16, v13 +; CI-NEXT: flat_store_dwordx4 v[16:17], v[0:3] +; CI-NEXT: s_nop 0 +; CI-NEXT: v_or_b32_e32 v1, v10, v4 +; CI-NEXT: v_or_b32_e32 v0, v8, v5 ; CI-NEXT: v_mov_b32_e32 v5, s1 -; CI-NEXT: v_or_b32_e32 v1, v10, v6 -; CI-NEXT: v_or_b32_e32 v0, v8, v7 -; CI-NEXT: v_or_b32_e32 v3, v14, v9 -; CI-NEXT: v_or_b32_e32 v2, v12, v11 +; CI-NEXT: v_or_b32_e32 v3, v14, v6 +; CI-NEXT: v_or_b32_e32 v2, v12, v7 ; CI-NEXT: v_mov_b32_e32 v4, s0 ; CI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; CI-NEXT: s_endpgm @@ -2981,29 +2983,31 @@ define amdgpu_kernel void @global_truncstore_v16f32_to_v16f16(ptr addrspace(1) % ; VI-NEXT: s_add_u32 s4, s2, 48 ; VI-NEXT: s_addc_u32 s5, s3, 0 ; VI-NEXT: v_mov_b32_e32 v9, s3 -; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v8, s2 ; VI-NEXT: s_add_u32 s2, s2, 16 -; VI-NEXT: v_mov_b32_e32 v5, s5 +; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: s_addc_u32 s3, s3, 0 +; VI-NEXT: v_mov_b32_e32 v5, s5 +; VI-NEXT: v_mov_b32_e32 v13, s3 ; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; VI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] -; VI-NEXT: v_mov_b32_e32 v13, s3 ; VI-NEXT: v_mov_b32_e32 v12, s2 ; VI-NEXT: flat_load_dwordx4 v[8:11], v[8:9] ; VI-NEXT: flat_load_dwordx4 v[12:15], v[12:13] ; VI-NEXT: s_add_u32 s2, s0, 16 ; VI-NEXT: s_addc_u32 s3, s1, 0 +; VI-NEXT: v_mov_b32_e32 v17, s3 +; VI-NEXT: v_mov_b32_e32 v16, s2 ; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: v_cvt_f16_f32_sdwa v3, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD ; VI-NEXT: v_cvt_f16_f32_e32 v2, v2 -; VI-NEXT: v_cvt_f16_f32_sdwa v16, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; VI-NEXT: v_cvt_f16_f32_sdwa v18, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD ; VI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: v_cvt_f16_f32_sdwa v7, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD ; VI-NEXT: v_cvt_f16_f32_e32 v6, v6 -; VI-NEXT: v_cvt_f16_f32_sdwa v17, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD -; VI-NEXT: v_cvt_f16_f32_e32 v18, v4 +; VI-NEXT: v_cvt_f16_f32_sdwa v5, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; VI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_cvt_f16_f32_sdwa v11, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD ; VI-NEXT: v_cvt_f16_f32_e32 v10, v10 @@ -3014,19 +3018,17 @@ define amdgpu_kernel void @global_truncstore_v16f32_to_v16f16(ptr addrspace(1) % ; VI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; VI-NEXT: v_cvt_f16_f32_sdwa v13, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD ; VI-NEXT: v_cvt_f16_f32_e32 v12, v12 -; VI-NEXT: v_mov_b32_e32 v5, s3 -; VI-NEXT: v_mov_b32_e32 v4, s2 ; VI-NEXT: v_or_b32_e32 v1, v2, v3 -; VI-NEXT: v_or_b32_e32 v0, v0, v16 +; VI-NEXT: v_or_b32_e32 v0, v0, v18 ; VI-NEXT: v_or_b32_e32 v3, v6, v7 -; VI-NEXT: v_or_b32_e32 v2, v18, v17 -; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; VI-NEXT: v_or_b32_e32 v2, v4, v5 ; VI-NEXT: v_mov_b32_e32 v5, s1 +; VI-NEXT: flat_store_dwordx4 v[16:17], v[0:3] +; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: v_or_b32_e32 v1, v10, v11 ; VI-NEXT: v_or_b32_e32 v0, v8, v9 ; VI-NEXT: v_or_b32_e32 v3, v14, v15 ; VI-NEXT: v_or_b32_e32 v2, v12, v13 -; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: s_endpgm ; diff --git a/llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir b/llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir index 78f21ef6610f2..477ca578871aa 100644 --- a/llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir +++ b/llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir @@ -1,6 +1,6 @@ # REQUIRES: asserts -# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-misched -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck -check-prefix=GCN %s -# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-misched -passes=machine-scheduler -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck -check-prefix=GCN %s +# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-misched -run-pass=machine-scheduler -amdgpu-use-amdgpu-trackers=0 -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck -check-prefix=GCN %s +# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-misched -passes=machine-scheduler -amdgpu-use-amdgpu-trackers=0 -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck -check-prefix=GCN %s # RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-misched -run-pass=machine-scheduler -amdgpu-use-amdgpu-trackers=1 -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck -check-prefix=GCN-GCNTRACKER %s # RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-misched -passes=machine-scheduler -amdgpu-use-amdgpu-trackers=1 -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck -check-prefix=GCN-GCNTRACKER %s diff --git a/llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll b/llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll index d42904f29aa59..18e3f29ab766c 100644 --- a/llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll +++ b/llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll @@ -32,37 +32,38 @@ define void @main(i1 %arg) #0 { ; CHECK-NEXT: v_writelane_b32 v6, s30, 20 ; CHECK-NEXT: v_writelane_b32 v6, s31, 21 ; CHECK-NEXT: s_getpc_b64 s[4:5] -; CHECK-NEXT: s_mov_b64 s[8:9], 0 ; CHECK-NEXT: s_mov_b32 s68, 0 ; CHECK-NEXT: s_mov_b32 s69, s4 -; CHECK-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0 ; CHECK-NEXT: s_load_dwordx8 s[24:31], s[68:69], 0x30 -; CHECK-NEXT: s_load_dwordx16 s[52:67], s[68:69], 0xf0 -; CHECK-NEXT: ; kill: killed $sgpr8_sgpr9 -; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: s_load_dwordx16 s[8:23], s[68:69], 0x130 +; CHECK-NEXT: s_load_dwordx16 s[4:19], s[68:69], 0xf0 ; CHECK-NEXT: ; implicit-def: $vgpr7 : SGPR spill to VGPR lane ; CHECK-NEXT: v_mov_b32_e32 v2, 0 -; CHECK-NEXT: s_waitcnt lgkmcnt(0) -; CHECK-NEXT: v_mov_b32_e32 v1, s4 +; CHECK-NEXT: v_mov_b32_e32 v3, v2 ; CHECK-NEXT: s_load_dwordx16 s[36:51], s[68:69], 0x2f0 ; CHECK-NEXT: s_mov_b32 s70, s68 -; CHECK-NEXT: v_writelane_b32 v7, s8, 0 -; CHECK-NEXT: v_writelane_b32 v7, s9, 1 -; CHECK-NEXT: v_writelane_b32 v7, s10, 2 -; CHECK-NEXT: v_writelane_b32 v7, s11, 3 -; CHECK-NEXT: v_writelane_b32 v7, s12, 4 -; CHECK-NEXT: v_writelane_b32 v7, s13, 5 -; CHECK-NEXT: v_writelane_b32 v7, s14, 6 -; CHECK-NEXT: v_writelane_b32 v7, s15, 7 -; CHECK-NEXT: v_writelane_b32 v7, s16, 8 -; CHECK-NEXT: v_writelane_b32 v7, s17, 9 -; CHECK-NEXT: v_writelane_b32 v7, s18, 10 -; CHECK-NEXT: v_writelane_b32 v7, s19, 11 -; CHECK-NEXT: v_writelane_b32 v7, s20, 12 -; CHECK-NEXT: v_writelane_b32 v7, s21, 13 -; CHECK-NEXT: v_writelane_b32 v7, s22, 14 -; CHECK-NEXT: v_writelane_b32 v7, s23, 15 +; CHECK-NEXT: s_waitcnt lgkmcnt(0) +; CHECK-NEXT: v_writelane_b32 v7, s4, 0 +; CHECK-NEXT: v_writelane_b32 v7, s5, 1 +; CHECK-NEXT: v_writelane_b32 v7, s6, 2 +; CHECK-NEXT: v_writelane_b32 v7, s7, 3 +; CHECK-NEXT: v_writelane_b32 v7, s8, 4 +; CHECK-NEXT: v_writelane_b32 v7, s9, 5 +; CHECK-NEXT: v_writelane_b32 v7, s10, 6 +; CHECK-NEXT: v_writelane_b32 v7, s11, 7 +; CHECK-NEXT: v_writelane_b32 v7, s12, 8 +; CHECK-NEXT: v_writelane_b32 v7, s13, 9 +; CHECK-NEXT: v_writelane_b32 v7, s14, 10 +; CHECK-NEXT: v_writelane_b32 v7, s15, 11 +; CHECK-NEXT: v_writelane_b32 v7, s16, 12 +; CHECK-NEXT: v_writelane_b32 v7, s17, 13 +; CHECK-NEXT: v_writelane_b32 v7, s18, 14 +; CHECK-NEXT: v_writelane_b32 v7, s19, 15 +; CHECK-NEXT: s_load_dwordx16 s[52:67], s[68:69], 0x130 +; CHECK-NEXT: s_load_dwordx16 s[8:23], s[68:69], 0x1f0 +; CHECK-NEXT: s_mov_b64 s[4:5], 0 +; CHECK-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x0 +; CHECK-NEXT: s_mov_b32 s69, s68 +; CHECK-NEXT: s_waitcnt lgkmcnt(0) ; CHECK-NEXT: v_writelane_b32 v7, s52, 16 ; CHECK-NEXT: v_writelane_b32 v7, s53, 17 ; CHECK-NEXT: v_writelane_b32 v7, s54, 18 @@ -78,59 +79,40 @@ define void @main(i1 %arg) #0 { ; CHECK-NEXT: v_writelane_b32 v7, s64, 28 ; CHECK-NEXT: v_writelane_b32 v7, s65, 29 ; CHECK-NEXT: v_writelane_b32 v7, s66, 30 -; CHECK-NEXT: s_load_dwordx16 s[8:23], s[68:69], 0x1f0 -; CHECK-NEXT: s_mov_b32 s69, s68 ; CHECK-NEXT: s_mov_b32 s71, s68 ; CHECK-NEXT: v_writelane_b32 v7, s67, 31 -; CHECK-NEXT: image_sample_lz v1, v[1:2], s[60:67], s[68:71] dmask:0x1 +; CHECK-NEXT: image_sample_lz v4, v[2:3], s[52:59], s[68:71] dmask:0x1 ; CHECK-NEXT: v_readlane_b32 s52, v7, 0 -; CHECK-NEXT: v_mov_b32_e32 v3, v2 -; CHECK-NEXT: v_readlane_b32 s53, v7, 1 -; CHECK-NEXT: v_readlane_b32 s54, v7, 2 -; CHECK-NEXT: v_readlane_b32 s55, v7, 3 -; CHECK-NEXT: v_readlane_b32 s56, v7, 4 -; CHECK-NEXT: v_readlane_b32 s57, v7, 5 -; CHECK-NEXT: v_readlane_b32 s58, v7, 6 -; CHECK-NEXT: v_readlane_b32 s59, v7, 7 -; CHECK-NEXT: v_and_b32_e32 v5, 1, v0 -; CHECK-NEXT: v_cmp_ne_u32_e64 s[4:5], 1, v5 ; CHECK-NEXT: v_readlane_b32 s60, v7, 8 ; CHECK-NEXT: v_readlane_b32 s61, v7, 9 ; CHECK-NEXT: v_readlane_b32 s62, v7, 10 -; CHECK-NEXT: image_sample_lz v4, v[2:3], s[52:59], s[68:71] dmask:0x1 ; CHECK-NEXT: v_readlane_b32 s63, v7, 11 ; CHECK-NEXT: v_readlane_b32 s64, v7, 12 ; CHECK-NEXT: v_readlane_b32 s65, v7, 13 ; CHECK-NEXT: v_readlane_b32 s66, v7, 14 ; CHECK-NEXT: v_readlane_b32 s67, v7, 15 +; CHECK-NEXT: v_mov_b32_e32 v1, s4 +; CHECK-NEXT: v_and_b32_e32 v5, 1, v0 +; CHECK-NEXT: v_readlane_b32 s53, v7, 1 +; CHECK-NEXT: v_readlane_b32 s54, v7, 2 +; CHECK-NEXT: v_readlane_b32 s55, v7, 3 +; CHECK-NEXT: image_sample_lz v1, v[1:2], s[60:67], s[68:71] dmask:0x1 +; CHECK-NEXT: v_readlane_b32 s56, v7, 4 +; CHECK-NEXT: v_readlane_b32 s57, v7, 5 +; CHECK-NEXT: v_readlane_b32 s58, v7, 6 +; CHECK-NEXT: v_readlane_b32 s59, v7, 7 +; CHECK-NEXT: v_cmp_ne_u32_e64 s[4:5], 1, v5 ; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: v_mul_f32_e32 v0, v4, v1 ; CHECK-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; CHECK-NEXT: s_xor_b64 s[6:7], exec, s[6:7] ; CHECK-NEXT: s_cbranch_execz .LBB0_3 ; CHECK-NEXT: ; %bb.1: ; %bb48 -; CHECK-NEXT: v_readlane_b32 s52, v7, 16 -; CHECK-NEXT: v_readlane_b32 s60, v7, 24 -; CHECK-NEXT: v_readlane_b32 s61, v7, 25 -; CHECK-NEXT: v_readlane_b32 s62, v7, 26 -; CHECK-NEXT: v_readlane_b32 s63, v7, 27 -; CHECK-NEXT: v_readlane_b32 s64, v7, 28 -; CHECK-NEXT: v_readlane_b32 s65, v7, 29 -; CHECK-NEXT: v_readlane_b32 s66, v7, 30 -; CHECK-NEXT: v_readlane_b32 s67, v7, 31 +; CHECK-NEXT: image_sample_lz v3, v[2:3], s[60:67], s[68:71] dmask:0x1 ; CHECK-NEXT: v_mov_b32_e32 v1, v2 ; CHECK-NEXT: s_and_b64 vcc, exec, -1 -; CHECK-NEXT: v_readlane_b32 s53, v7, 17 -; CHECK-NEXT: v_readlane_b32 s54, v7, 18 -; CHECK-NEXT: v_readlane_b32 s55, v7, 19 -; CHECK-NEXT: image_sample_lz v3, v[2:3], s[60:67], s[68:71] dmask:0x1 -; CHECK-NEXT: v_readlane_b32 s56, v7, 20 -; CHECK-NEXT: v_readlane_b32 s57, v7, 21 -; CHECK-NEXT: v_readlane_b32 s58, v7, 22 -; CHECK-NEXT: v_readlane_b32 s59, v7, 23 ; CHECK-NEXT: .LBB0_2: ; %bb50 ; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1 -; CHECK-NEXT: s_waitcnt lgkmcnt(0) ; CHECK-NEXT: image_sample_lz v4, v[1:2], s[16:23], s[28:31] dmask:0x1 ; CHECK-NEXT: s_nop 0 ; CHECK-NEXT: image_sample_lz v1, v[1:2], s[44:51], s[68:71] dmask:0x1 @@ -144,25 +126,18 @@ define void @main(i1 %arg) #0 { ; CHECK-NEXT: s_andn2_saveexec_b64 s[6:7], s[6:7] ; CHECK-NEXT: s_cbranch_execz .LBB0_10 ; CHECK-NEXT: ; %bb.4: ; %bb32 -; CHECK-NEXT: s_waitcnt lgkmcnt(0) ; CHECK-NEXT: s_and_saveexec_b64 s[16:17], s[4:5] ; CHECK-NEXT: s_xor_b64 s[4:5], exec, s[16:17] ; CHECK-NEXT: s_cbranch_execz .LBB0_6 ; CHECK-NEXT: ; %bb.5: ; %bb43 ; CHECK-NEXT: s_mov_b32 s16, 0 ; CHECK-NEXT: s_mov_b32 s17, s16 -; CHECK-NEXT: v_mov_b32_e32 v0, s16 -; CHECK-NEXT: v_readlane_b32 s44, v7, 16 -; CHECK-NEXT: v_mov_b32_e32 v1, s17 +; CHECK-NEXT: v_mov_b32_e32 v2, s16 +; CHECK-NEXT: v_mov_b32_e32 v3, s17 ; CHECK-NEXT: s_mov_b32 s18, s16 ; CHECK-NEXT: s_mov_b32 s19, s16 -; CHECK-NEXT: v_readlane_b32 s45, v7, 17 -; CHECK-NEXT: v_readlane_b32 s46, v7, 18 -; CHECK-NEXT: v_readlane_b32 s47, v7, 19 -; CHECK-NEXT: v_readlane_b32 s48, v7, 20 -; CHECK-NEXT: v_readlane_b32 s49, v7, 21 -; CHECK-NEXT: v_readlane_b32 s50, v7, 22 -; CHECK-NEXT: v_readlane_b32 s51, v7, 23 +; CHECK-NEXT: image_sample_lz v1, v[2:3], s[52:59], s[16:19] dmask:0x1 +; CHECK-NEXT: v_readlane_b32 s44, v7, 16 ; CHECK-NEXT: v_readlane_b32 s52, v7, 24 ; CHECK-NEXT: v_readlane_b32 s53, v7, 25 ; CHECK-NEXT: v_readlane_b32 s54, v7, 26 @@ -171,28 +146,18 @@ define void @main(i1 %arg) #0 { ; CHECK-NEXT: v_readlane_b32 s57, v7, 29 ; CHECK-NEXT: v_readlane_b32 s58, v7, 30 ; CHECK-NEXT: v_readlane_b32 s59, v7, 31 -; CHECK-NEXT: image_sample_lz v2, v[0:1], s[44:51], s[16:19] dmask:0x1 -; CHECK-NEXT: v_readlane_b32 s44, v7, 0 -; CHECK-NEXT: v_readlane_b32 s52, v7, 8 -; CHECK-NEXT: v_readlane_b32 s53, v7, 9 -; CHECK-NEXT: v_readlane_b32 s54, v7, 10 -; CHECK-NEXT: v_readlane_b32 s55, v7, 11 -; CHECK-NEXT: v_readlane_b32 s56, v7, 12 -; CHECK-NEXT: v_readlane_b32 s57, v7, 13 -; CHECK-NEXT: v_readlane_b32 s58, v7, 14 -; CHECK-NEXT: v_readlane_b32 s59, v7, 15 -; CHECK-NEXT: v_mov_b32_e32 v3, 0 -; CHECK-NEXT: v_mov_b32_e32 v4, v3 -; CHECK-NEXT: v_readlane_b32 s45, v7, 1 -; CHECK-NEXT: v_readlane_b32 s46, v7, 2 -; CHECK-NEXT: v_readlane_b32 s47, v7, 3 -; CHECK-NEXT: image_sample_lz v0, v[0:1], s[52:59], s[24:27] dmask:0x1 -; CHECK-NEXT: v_readlane_b32 s48, v7, 4 -; CHECK-NEXT: v_readlane_b32 s49, v7, 5 -; CHECK-NEXT: v_readlane_b32 s50, v7, 6 -; CHECK-NEXT: v_readlane_b32 s51, v7, 7 +; CHECK-NEXT: v_readlane_b32 s45, v7, 17 +; CHECK-NEXT: v_readlane_b32 s46, v7, 18 +; CHECK-NEXT: v_readlane_b32 s47, v7, 19 +; CHECK-NEXT: v_readlane_b32 s48, v7, 20 +; CHECK-NEXT: v_readlane_b32 s49, v7, 21 +; CHECK-NEXT: image_sample_lz v0, v[2:3], s[52:59], s[24:27] dmask:0x1 +; CHECK-NEXT: v_mov_b32_e32 v2, 0 +; CHECK-NEXT: v_mov_b32_e32 v3, v2 +; CHECK-NEXT: v_readlane_b32 s50, v7, 22 +; CHECK-NEXT: v_readlane_b32 s51, v7, 23 ; CHECK-NEXT: s_waitcnt vmcnt(1) -; CHECK-NEXT: buffer_store_dwordx3 v[2:4], off, s[16:19], 0 +; CHECK-NEXT: buffer_store_dwordx3 v[1:3], off, s[16:19], 0 ; CHECK-NEXT: s_waitcnt vmcnt(1) ; CHECK-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 ; CHECK-NEXT: ; implicit-def: $vgpr0 @@ -239,7 +204,6 @@ define void @main(i1 %arg) #0 { ; CHECK-NEXT: v_readlane_b32 s54, v6, 10 ; CHECK-NEXT: v_readlane_b32 s53, v6, 9 ; CHECK-NEXT: v_readlane_b32 s52, v6, 8 -; CHECK-NEXT: s_waitcnt lgkmcnt(0) ; CHECK-NEXT: v_readlane_b32 s51, v6, 7 ; CHECK-NEXT: v_readlane_b32 s50, v6, 6 ; CHECK-NEXT: v_readlane_b32 s49, v6, 5 diff --git a/llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll b/llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll index 5d2259216e7f7..11aac20ebea84 100644 --- a/llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll +++ b/llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll @@ -1020,9 +1020,9 @@ define amdgpu_kernel void @extract_neg_offset_sgpr_loaded(ptr addrspace(1) %out, ; GENERIC-NEXT: s_mov_b32 s2, -1 ; GENERIC-NEXT: s_waitcnt lgkmcnt(0) ; GENERIC-NEXT: s_or_b32 s8, s8, s36 -; GENERIC-NEXT: s_or_b32 s6, s23, s51 -; GENERIC-NEXT: s_or_b32 s7, s22, s50 -; GENERIC-NEXT: s_or_b32 s21, s21, s49 +; GENERIC-NEXT: s_or_b32 s5, s23, s51 +; GENERIC-NEXT: s_or_b32 s6, s22, s50 +; GENERIC-NEXT: s_or_b32 s7, s21, s49 ; GENERIC-NEXT: s_or_b32 s20, s20, s48 ; GENERIC-NEXT: s_or_b32 s19, s19, s47 ; GENERIC-NEXT: s_or_b32 s18, s18, s46 @@ -1049,9 +1049,9 @@ define amdgpu_kernel void @extract_neg_offset_sgpr_loaded(ptr addrspace(1) %out, ; GENERIC-NEXT: v_mov_b32_e32 v10, s18 ; GENERIC-NEXT: v_mov_b32_e32 v11, s19 ; GENERIC-NEXT: v_mov_b32_e32 v12, s20 -; GENERIC-NEXT: v_mov_b32_e32 v13, s21 -; GENERIC-NEXT: v_mov_b32_e32 v14, s7 -; GENERIC-NEXT: v_mov_b32_e32 v15, s6 +; GENERIC-NEXT: v_mov_b32_e32 v13, s7 +; GENERIC-NEXT: v_mov_b32_e32 v14, s6 +; GENERIC-NEXT: v_mov_b32_e32 v15, s5 ; GENERIC-NEXT: v_movrels_b32_e32 v0, v0 ; GENERIC-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GENERIC-NEXT: s_endpgm @@ -1172,9 +1172,9 @@ define amdgpu_kernel void @extract_neg_offset_sgpr_loaded(ptr addrspace(1) %out, ; SI-MOVREL-NEXT: s_mov_b32 s2, -1 ; SI-MOVREL-NEXT: s_waitcnt lgkmcnt(0) ; SI-MOVREL-NEXT: s_or_b32 s8, s8, s36 -; SI-MOVREL-NEXT: s_or_b32 s6, s23, s51 -; SI-MOVREL-NEXT: s_or_b32 s7, s22, s50 -; SI-MOVREL-NEXT: s_or_b32 s21, s21, s49 +; SI-MOVREL-NEXT: s_or_b32 s5, s23, s51 +; SI-MOVREL-NEXT: s_or_b32 s6, s22, s50 +; SI-MOVREL-NEXT: s_or_b32 s7, s21, s49 ; SI-MOVREL-NEXT: s_or_b32 s20, s20, s48 ; SI-MOVREL-NEXT: s_or_b32 s19, s19, s47 ; SI-MOVREL-NEXT: s_or_b32 s18, s18, s46 @@ -1201,9 +1201,9 @@ define amdgpu_kernel void @extract_neg_offset_sgpr_loaded(ptr addrspace(1) %out, ; SI-MOVREL-NEXT: v_mov_b32_e32 v10, s18 ; SI-MOVREL-NEXT: v_mov_b32_e32 v11, s19 ; SI-MOVREL-NEXT: v_mov_b32_e32 v12, s20 -; SI-MOVREL-NEXT: v_mov_b32_e32 v13, s21 -; SI-MOVREL-NEXT: v_mov_b32_e32 v14, s7 -; SI-MOVREL-NEXT: v_mov_b32_e32 v15, s6 +; SI-MOVREL-NEXT: v_mov_b32_e32 v13, s7 +; SI-MOVREL-NEXT: v_mov_b32_e32 v14, s6 +; SI-MOVREL-NEXT: v_mov_b32_e32 v15, s5 ; SI-MOVREL-NEXT: v_movrels_b32_e32 v0, v0 ; SI-MOVREL-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; SI-MOVREL-NEXT: s_endpgm @@ -3401,8 +3401,6 @@ define amdgpu_kernel void @insert_neg_offset_sgpr(ptr addrspace(1) %in, ptr addr ; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v15, 15 ; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v16, v15 -; GFX9-IDXMODE-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-IDXMODE-NEXT: s_addk_i32 s2, 0xfe00 ; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v15, v14 ; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v14, v13 ; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v13, v12 @@ -3418,6 +3416,8 @@ define amdgpu_kernel void @insert_neg_offset_sgpr(ptr addrspace(1) %in, ptr addr ; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v3, v2 ; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v2, v1 ; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v1, v0 +; GFX9-IDXMODE-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-IDXMODE-NEXT: s_addk_i32 s2, 0xfe00 ; GFX9-IDXMODE-NEXT: s_set_gpr_idx_on s2, gpr_idx(DST) ; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v1, 16 ; GFX9-IDXMODE-NEXT: s_set_gpr_idx_off @@ -5456,98 +5456,97 @@ define amdgpu_kernel void @insert_vgpr_offset_multiple_in_block(ptr addrspace(1) ; GENERIC-NEXT: v_lshlrev_b32_e32 v1, 2, v0 ; GENERIC-NEXT: v_mov_b32_e32 v2, 0 ; GENERIC-NEXT: s_waitcnt lgkmcnt(0) -; GENERIC-NEXT: buffer_load_dword v14, v[1:2], s[8:11], 0 addr64 glc +; GENERIC-NEXT: buffer_load_dword v2, v[1:2], s[8:11], 0 addr64 glc ; GENERIC-NEXT: s_waitcnt vmcnt(0) ; GENERIC-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x19 +; GENERIC-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 ; GENERIC-NEXT: ;;#ASMSTART ; GENERIC-NEXT: v_mov_b32 v1, 62 ; GENERIC-NEXT: ;;#ASMEND ; GENERIC-NEXT: s_mov_b32 s2, -1 ; GENERIC-NEXT: s_waitcnt lgkmcnt(0) -; GENERIC-NEXT: v_mov_b32_e32 v2, s18 -; GENERIC-NEXT: v_mov_b32_e32 v3, s19 -; GENERIC-NEXT: v_mov_b32_e32 v4, s12 -; GENERIC-NEXT: v_mov_b32_e32 v5, s13 -; GENERIC-NEXT: v_mov_b32_e32 v6, s14 -; GENERIC-NEXT: v_mov_b32_e32 v7, s15 -; GENERIC-NEXT: v_mov_b32_e32 v8, s8 -; GENERIC-NEXT: v_mov_b32_e32 v9, s9 -; GENERIC-NEXT: v_mov_b32_e32 v12, s10 -; GENERIC-NEXT: v_mov_b32_e32 v13, s11 -; GENERIC-NEXT: v_mov_b32_e32 v10, s22 -; GENERIC-NEXT: v_mov_b32_e32 v11, s23 -; GENERIC-NEXT: v_mov_b32_e32 v15, s16 -; GENERIC-NEXT: v_add_i32_e32 v18, vcc, 1, v14 -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 10, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v16, v2, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 11, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v17, v3, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 4, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v19, v4, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 5, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v20, v5, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 6, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 7, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v7, v7, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 0, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v2, v8, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 1, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v3, v9, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 2, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v4, v12, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 3, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v5, v13, v1, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 3, v18 -; GENERIC-NEXT: v_cndmask_b32_e32 v5, 63, v5, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 2, v18 +; GENERIC-NEXT: v_mov_b32_e32 v3, s20 +; GENERIC-NEXT: v_mov_b32_e32 v4, s21 +; GENERIC-NEXT: v_mov_b32_e32 v5, s22 +; GENERIC-NEXT: v_mov_b32_e32 v6, s23 +; GENERIC-NEXT: v_mov_b32_e32 v7, s16 +; GENERIC-NEXT: v_mov_b32_e32 v8, s17 +; GENERIC-NEXT: v_mov_b32_e32 v9, s18 +; GENERIC-NEXT: v_mov_b32_e32 v10, s19 +; GENERIC-NEXT: v_mov_b32_e32 v11, s12 +; GENERIC-NEXT: v_mov_b32_e32 v12, s13 +; GENERIC-NEXT: v_mov_b32_e32 v13, s14 +; GENERIC-NEXT: v_mov_b32_e32 v14, s15 +; GENERIC-NEXT: v_mov_b32_e32 v15, s8 +; GENERIC-NEXT: v_mov_b32_e32 v16, s9 +; GENERIC-NEXT: v_mov_b32_e32 v17, s10 +; GENERIC-NEXT: v_mov_b32_e32 v18, s11 +; GENERIC-NEXT: v_add_i32_e32 v19, vcc, 1, v2 +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 12, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v20, v3, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 13, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v21, v4, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 14, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v22, v5, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 15, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v23, v6, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 8, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v24, v7, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 9, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v25, v8, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 10, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v26, v9, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 11, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v10, v10, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 4, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v6, v11, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 5, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v7, v12, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 6, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v8, v13, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 7, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v9, v14, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v11, v15, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v3, v16, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 2, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v4, v17, v1, vcc +; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 3, v2 +; GENERIC-NEXT: v_cndmask_b32_e32 v2, v18, v1, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 3, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v5, 63, v2, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 2, v19 ; GENERIC-NEXT: v_cndmask_b32_e32 v4, 63, v4, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 1, v18 +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 1, v19 ; GENERIC-NEXT: v_cndmask_b32_e32 v3, 63, v3, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 -; GENERIC-NEXT: v_cndmask_b32_e32 v2, 63, v2, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 7, v18 -; GENERIC-NEXT: v_cndmask_b32_e32 v9, 63, v7, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 6, v18 -; GENERIC-NEXT: v_cndmask_b32_e32 v8, 63, v6, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 5, v18 -; GENERIC-NEXT: v_cndmask_b32_e32 v7, 63, v20, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 4, v18 -; GENERIC-NEXT: v_cndmask_b32_e32 v6, 63, v19, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 11, v18 -; GENERIC-NEXT: v_cndmask_b32_e32 v13, 63, v17, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 10, v18 -; GENERIC-NEXT: v_cndmask_b32_e32 v12, 63, v16, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 14, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v19, v10, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 15, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v17, v11, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 8, v14 -; GENERIC-NEXT: v_mov_b32_e32 v16, s17 -; GENERIC-NEXT: v_cndmask_b32_e32 v10, v15, v1, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 9, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v11, v16, v1, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 9, v18 -; GENERIC-NEXT: v_cndmask_b32_e32 v11, 63, v11, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 8, v18 -; GENERIC-NEXT: v_cmp_ne_u32_e64 s[0:1], 15, v18 -; GENERIC-NEXT: v_cndmask_b32_e32 v10, 63, v10, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 14, v18 -; GENERIC-NEXT: v_cndmask_b32_e64 v17, 63, v17, s[0:1] -; GENERIC-NEXT: v_mov_b32_e32 v15, s21 -; GENERIC-NEXT: v_cmp_eq_u32_e64 s[0:1], 13, v14 -; GENERIC-NEXT: v_cndmask_b32_e32 v16, 63, v19, vcc -; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 12, v14 -; GENERIC-NEXT: v_cndmask_b32_e64 v14, v15, v1, s[0:1] -; GENERIC-NEXT: v_cmp_ne_u32_e64 s[0:1], 13, v18 -; GENERIC-NEXT: v_cndmask_b32_e64 v15, 63, v14, s[0:1] -; GENERIC-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 -; GENERIC-NEXT: v_mov_b32_e32 v19, s20 -; GENERIC-NEXT: v_cndmask_b32_e32 v14, v19, v1, vcc -; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 12, v18 -; GENERIC-NEXT: v_cndmask_b32_e32 v14, 63, v14, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 0, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v2, 63, v11, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 7, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v9, 63, v9, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 6, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v8, 63, v8, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 5, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v7, 63, v7, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 4, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v6, 63, v6, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 11, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v13, 63, v10, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 10, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v12, 63, v26, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 9, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v11, 63, v25, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 8, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v10, 63, v24, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 15, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v17, 63, v23, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 14, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v16, 63, v22, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 13, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v15, 63, v21, vcc +; GENERIC-NEXT: v_cmp_ne_u32_e32 vcc, 12, v19 +; GENERIC-NEXT: v_cndmask_b32_e32 v14, 63, v20, vcc ; GENERIC-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 -; GENERIC-NEXT: s_waitcnt lgkmcnt(0) ; GENERIC-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:48 ; GENERIC-NEXT: s_waitcnt vmcnt(0) ; GENERIC-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:32 @@ -6017,98 +6016,97 @@ define amdgpu_kernel void @insert_vgpr_offset_multiple_in_block(ptr addrspace(1) ; SI-MOVREL-NEXT: v_lshlrev_b32_e32 v1, 2, v0 ; SI-MOVREL-NEXT: v_mov_b32_e32 v2, 0 ; SI-MOVREL-NEXT: s_waitcnt lgkmcnt(0) -; SI-MOVREL-NEXT: buffer_load_dword v14, v[1:2], s[8:11], 0 addr64 glc +; SI-MOVREL-NEXT: buffer_load_dword v2, v[1:2], s[8:11], 0 addr64 glc ; SI-MOVREL-NEXT: s_waitcnt vmcnt(0) ; SI-MOVREL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x19 +; SI-MOVREL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 ; SI-MOVREL-NEXT: ;;#ASMSTART ; SI-MOVREL-NEXT: v_mov_b32 v1, 62 ; SI-MOVREL-NEXT: ;;#ASMEND ; SI-MOVREL-NEXT: s_mov_b32 s2, -1 ; SI-MOVREL-NEXT: s_waitcnt lgkmcnt(0) -; SI-MOVREL-NEXT: v_mov_b32_e32 v2, s18 -; SI-MOVREL-NEXT: v_mov_b32_e32 v3, s19 -; SI-MOVREL-NEXT: v_mov_b32_e32 v4, s12 -; SI-MOVREL-NEXT: v_mov_b32_e32 v5, s13 -; SI-MOVREL-NEXT: v_mov_b32_e32 v6, s14 -; SI-MOVREL-NEXT: v_mov_b32_e32 v7, s15 -; SI-MOVREL-NEXT: v_mov_b32_e32 v8, s8 -; SI-MOVREL-NEXT: v_mov_b32_e32 v9, s9 -; SI-MOVREL-NEXT: v_mov_b32_e32 v12, s10 -; SI-MOVREL-NEXT: v_mov_b32_e32 v13, s11 -; SI-MOVREL-NEXT: v_mov_b32_e32 v10, s22 -; SI-MOVREL-NEXT: v_mov_b32_e32 v11, s23 -; SI-MOVREL-NEXT: v_mov_b32_e32 v15, s16 -; SI-MOVREL-NEXT: v_add_i32_e32 v18, vcc, 1, v14 -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 10, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v16, v2, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 11, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v17, v3, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 4, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v19, v4, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 5, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v20, v5, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 6, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 7, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v7, v7, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v2, v8, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 1, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v3, v9, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 2, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v4, v12, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 3, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v5, v13, v1, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 3, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v5, 63, v5, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 2, v18 +; SI-MOVREL-NEXT: v_mov_b32_e32 v3, s20 +; SI-MOVREL-NEXT: v_mov_b32_e32 v4, s21 +; SI-MOVREL-NEXT: v_mov_b32_e32 v5, s22 +; SI-MOVREL-NEXT: v_mov_b32_e32 v6, s23 +; SI-MOVREL-NEXT: v_mov_b32_e32 v7, s16 +; SI-MOVREL-NEXT: v_mov_b32_e32 v8, s17 +; SI-MOVREL-NEXT: v_mov_b32_e32 v9, s18 +; SI-MOVREL-NEXT: v_mov_b32_e32 v10, s19 +; SI-MOVREL-NEXT: v_mov_b32_e32 v11, s12 +; SI-MOVREL-NEXT: v_mov_b32_e32 v12, s13 +; SI-MOVREL-NEXT: v_mov_b32_e32 v13, s14 +; SI-MOVREL-NEXT: v_mov_b32_e32 v14, s15 +; SI-MOVREL-NEXT: v_mov_b32_e32 v15, s8 +; SI-MOVREL-NEXT: v_mov_b32_e32 v16, s9 +; SI-MOVREL-NEXT: v_mov_b32_e32 v17, s10 +; SI-MOVREL-NEXT: v_mov_b32_e32 v18, s11 +; SI-MOVREL-NEXT: v_add_i32_e32 v19, vcc, 1, v2 +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 12, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v20, v3, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 13, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v21, v4, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 14, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v22, v5, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 15, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v23, v6, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 8, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v24, v7, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 9, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v25, v8, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 10, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v26, v9, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 11, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v10, v10, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 4, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v6, v11, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 5, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v7, v12, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 6, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v8, v13, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 7, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v9, v14, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v11, v15, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v3, v16, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 2, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v4, v17, v1, vcc +; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 3, v2 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v2, v18, v1, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 3, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v5, 63, v2, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 2, v19 ; SI-MOVREL-NEXT: v_cndmask_b32_e32 v4, 63, v4, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 1, v18 +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 1, v19 ; SI-MOVREL-NEXT: v_cndmask_b32_e32 v3, 63, v3, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v2, 63, v2, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 7, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v9, 63, v7, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 6, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v8, 63, v6, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 5, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v7, 63, v20, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 4, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v6, 63, v19, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 11, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v13, 63, v17, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 10, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v12, 63, v16, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 14, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v19, v10, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 15, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v17, v11, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 8, v14 -; SI-MOVREL-NEXT: v_mov_b32_e32 v16, s17 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v10, v15, v1, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 9, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v11, v16, v1, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 9, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v11, 63, v11, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 8, v18 -; SI-MOVREL-NEXT: v_cmp_ne_u32_e64 s[0:1], 15, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v10, 63, v10, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 14, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e64 v17, 63, v17, s[0:1] -; SI-MOVREL-NEXT: v_mov_b32_e32 v15, s21 -; SI-MOVREL-NEXT: v_cmp_eq_u32_e64 s[0:1], 13, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v16, 63, v19, vcc -; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 12, v14 -; SI-MOVREL-NEXT: v_cndmask_b32_e64 v14, v15, v1, s[0:1] -; SI-MOVREL-NEXT: v_cmp_ne_u32_e64 s[0:1], 13, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e64 v15, 63, v14, s[0:1] -; SI-MOVREL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 -; SI-MOVREL-NEXT: v_mov_b32_e32 v19, s20 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v14, v19, v1, vcc -; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 12, v18 -; SI-MOVREL-NEXT: v_cndmask_b32_e32 v14, 63, v14, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v2, 63, v11, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 7, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v9, 63, v9, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 6, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v8, 63, v8, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 5, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v7, 63, v7, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 4, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v6, 63, v6, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 11, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v13, 63, v10, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 10, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v12, 63, v26, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 9, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v11, 63, v25, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 8, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v10, 63, v24, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 15, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v17, 63, v23, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 14, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v16, 63, v22, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 13, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v15, 63, v21, vcc +; SI-MOVREL-NEXT: v_cmp_ne_u32_e32 vcc, 12, v19 +; SI-MOVREL-NEXT: v_cndmask_b32_e32 v14, 63, v20, vcc ; SI-MOVREL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 -; SI-MOVREL-NEXT: s_waitcnt lgkmcnt(0) ; SI-MOVREL-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:48 ; SI-MOVREL-NEXT: s_waitcnt vmcnt(0) ; SI-MOVREL-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:32 @@ -6129,104 +6127,104 @@ define amdgpu_kernel void @insert_vgpr_offset_multiple_in_block(ptr addrspace(1) ; VI: ; %bb.0: ; %entry ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34 ; VI-NEXT: v_lshlrev_b32_e32 v1, 2, v0 -; VI-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64 ; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: v_mov_b32_e32 v2, s1 ; VI-NEXT: v_add_u32_e32 v1, vcc, s0, v1 ; VI-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc -; VI-NEXT: flat_load_dword v14, v[1:2] glc +; VI-NEXT: flat_load_dword v2, v[1:2] glc ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_mov_b32_e32 v2, s18 -; VI-NEXT: v_mov_b32_e32 v3, s19 +; VI-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64 +; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-NEXT: ;;#ASMSTART ; VI-NEXT: v_mov_b32 v1, 62 ; VI-NEXT: ;;#ASMEND -; VI-NEXT: v_mov_b32_e32 v4, s12 -; VI-NEXT: v_mov_b32_e32 v5, s13 -; VI-NEXT: v_mov_b32_e32 v6, s14 -; VI-NEXT: v_mov_b32_e32 v7, s15 -; VI-NEXT: v_mov_b32_e32 v8, s8 -; VI-NEXT: v_mov_b32_e32 v9, s9 -; VI-NEXT: v_mov_b32_e32 v12, s10 -; VI-NEXT: v_mov_b32_e32 v13, s11 -; VI-NEXT: v_mov_b32_e32 v10, s22 -; VI-NEXT: v_mov_b32_e32 v11, s23 -; VI-NEXT: v_mov_b32_e32 v15, s16 -; VI-NEXT: v_add_u32_e32 v18, vcc, 1, v14 -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 10, v14 -; VI-NEXT: v_cndmask_b32_e32 v16, v2, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 11, v14 -; VI-NEXT: v_cndmask_b32_e32 v17, v3, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 4, v14 -; VI-NEXT: v_cndmask_b32_e32 v19, v4, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 5, v14 -; VI-NEXT: v_cndmask_b32_e32 v20, v5, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 6, v14 -; VI-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 7, v14 -; VI-NEXT: v_cndmask_b32_e32 v7, v7, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v14 -; VI-NEXT: v_cndmask_b32_e32 v2, v8, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 1, v14 -; VI-NEXT: v_cndmask_b32_e32 v3, v9, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 2, v14 -; VI-NEXT: v_cndmask_b32_e32 v4, v12, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 3, v14 -; VI-NEXT: v_cndmask_b32_e32 v5, v13, v1, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 3, v18 -; VI-NEXT: v_cndmask_b32_e32 v5, 63, v5, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 2, v18 -; VI-NEXT: v_cndmask_b32_e32 v4, 63, v4, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 1, v18 -; VI-NEXT: v_cndmask_b32_e32 v3, 63, v3, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 -; VI-NEXT: v_cndmask_b32_e32 v2, 63, v2, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 7, v18 -; VI-NEXT: v_cndmask_b32_e32 v9, 63, v7, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 6, v18 -; VI-NEXT: v_cndmask_b32_e32 v8, 63, v6, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 5, v18 -; VI-NEXT: v_cndmask_b32_e32 v7, 63, v20, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 4, v18 -; VI-NEXT: v_cndmask_b32_e32 v6, 63, v19, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 11, v18 -; VI-NEXT: v_cndmask_b32_e32 v13, 63, v17, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 10, v18 -; VI-NEXT: v_cndmask_b32_e32 v12, 63, v16, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 14, v14 -; VI-NEXT: v_cndmask_b32_e32 v19, v10, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 15, v14 -; VI-NEXT: v_cndmask_b32_e32 v17, v11, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 8, v14 -; VI-NEXT: v_mov_b32_e32 v16, s17 -; VI-NEXT: v_cndmask_b32_e32 v10, v15, v1, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 9, v14 -; VI-NEXT: v_cndmask_b32_e32 v11, v16, v1, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 9, v18 -; VI-NEXT: v_cndmask_b32_e32 v11, 63, v11, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 8, v18 -; VI-NEXT: v_cmp_ne_u32_e64 s[0:1], 15, v18 -; VI-NEXT: v_cndmask_b32_e32 v10, 63, v10, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 14, v18 -; VI-NEXT: v_cndmask_b32_e64 v17, 63, v17, s[0:1] -; VI-NEXT: v_mov_b32_e32 v15, s21 -; VI-NEXT: v_cmp_eq_u32_e64 s[0:1], 13, v14 -; VI-NEXT: v_cndmask_b32_e32 v16, 63, v19, vcc -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 12, v14 -; VI-NEXT: v_cndmask_b32_e64 v14, v15, v1, s[0:1] -; VI-NEXT: v_cmp_ne_u32_e64 s[0:1], 13, v18 -; VI-NEXT: v_cndmask_b32_e64 v15, 63, v14, s[0:1] -; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; VI-NEXT: v_mov_b32_e32 v19, s20 -; VI-NEXT: v_cndmask_b32_e32 v14, v19, v1, vcc -; VI-NEXT: v_cmp_ne_u32_e32 vcc, 12, v18 -; VI-NEXT: v_cndmask_b32_e32 v14, 63, v14, vcc ; VI-NEXT: s_waitcnt lgkmcnt(0) +; VI-NEXT: v_mov_b32_e32 v3, s20 +; VI-NEXT: v_mov_b32_e32 v4, s21 +; VI-NEXT: v_mov_b32_e32 v5, s22 +; VI-NEXT: v_mov_b32_e32 v6, s23 +; VI-NEXT: v_mov_b32_e32 v7, s16 +; VI-NEXT: v_mov_b32_e32 v8, s17 +; VI-NEXT: v_mov_b32_e32 v9, s18 +; VI-NEXT: v_mov_b32_e32 v10, s19 +; VI-NEXT: v_mov_b32_e32 v11, s12 +; VI-NEXT: v_mov_b32_e32 v12, s13 +; VI-NEXT: v_mov_b32_e32 v13, s14 +; VI-NEXT: v_mov_b32_e32 v14, s15 +; VI-NEXT: v_mov_b32_e32 v15, s8 +; VI-NEXT: v_mov_b32_e32 v16, s9 +; VI-NEXT: v_mov_b32_e32 v17, s10 +; VI-NEXT: v_mov_b32_e32 v18, s11 ; VI-NEXT: s_add_u32 s2, s0, 48 ; VI-NEXT: s_addc_u32 s3, s1, 0 +; VI-NEXT: v_add_u32_e32 v19, vcc, 1, v2 +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 12, v2 +; VI-NEXT: v_cndmask_b32_e32 v20, v3, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 13, v2 +; VI-NEXT: v_cndmask_b32_e32 v21, v4, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 14, v2 +; VI-NEXT: v_cndmask_b32_e32 v22, v5, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 15, v2 +; VI-NEXT: v_cndmask_b32_e32 v23, v6, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 8, v2 +; VI-NEXT: v_cndmask_b32_e32 v24, v7, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 9, v2 +; VI-NEXT: v_cndmask_b32_e32 v25, v8, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 10, v2 +; VI-NEXT: v_cndmask_b32_e32 v26, v9, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 11, v2 +; VI-NEXT: v_cndmask_b32_e32 v10, v10, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 4, v2 +; VI-NEXT: v_cndmask_b32_e32 v6, v11, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 5, v2 +; VI-NEXT: v_cndmask_b32_e32 v7, v12, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 6, v2 +; VI-NEXT: v_cndmask_b32_e32 v8, v13, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 7, v2 +; VI-NEXT: v_cndmask_b32_e32 v9, v14, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 +; VI-NEXT: v_cndmask_b32_e32 v11, v15, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 +; VI-NEXT: v_cndmask_b32_e32 v3, v16, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 2, v2 +; VI-NEXT: v_cndmask_b32_e32 v4, v17, v1, vcc +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 3, v2 +; VI-NEXT: v_cndmask_b32_e32 v2, v18, v1, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 3, v19 +; VI-NEXT: v_cndmask_b32_e32 v5, 63, v2, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 2, v19 +; VI-NEXT: v_cndmask_b32_e32 v4, 63, v4, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 1, v19 +; VI-NEXT: v_cndmask_b32_e32 v3, 63, v3, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v19 +; VI-NEXT: v_cndmask_b32_e32 v2, 63, v11, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 7, v19 +; VI-NEXT: v_cndmask_b32_e32 v9, 63, v9, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 6, v19 +; VI-NEXT: v_cndmask_b32_e32 v8, 63, v8, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 5, v19 +; VI-NEXT: v_cndmask_b32_e32 v7, 63, v7, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 4, v19 +; VI-NEXT: v_cndmask_b32_e32 v6, 63, v6, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 11, v19 +; VI-NEXT: v_cndmask_b32_e32 v13, 63, v10, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 10, v19 +; VI-NEXT: v_cndmask_b32_e32 v12, 63, v26, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 9, v19 +; VI-NEXT: v_cndmask_b32_e32 v11, 63, v25, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 8, v19 +; VI-NEXT: v_cndmask_b32_e32 v10, 63, v24, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 15, v19 +; VI-NEXT: v_cndmask_b32_e32 v17, 63, v23, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 14, v19 +; VI-NEXT: v_cndmask_b32_e32 v16, 63, v22, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 13, v19 +; VI-NEXT: v_cndmask_b32_e32 v15, 63, v21, vcc +; VI-NEXT: v_cmp_ne_u32_e32 vcc, 12, v19 ; VI-NEXT: v_mov_b32_e32 v19, s3 ; VI-NEXT: v_mov_b32_e32 v18, s2 ; VI-NEXT: s_add_u32 s2, s0, 32 +; VI-NEXT: v_cndmask_b32_e32 v14, 63, v20, vcc ; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: flat_store_dwordx4 v[18:19], v[14:17] ; VI-NEXT: s_waitcnt vmcnt(0) @@ -6258,104 +6256,103 @@ define amdgpu_kernel void @insert_vgpr_offset_multiple_in_block(ptr addrspace(1) ; GFX9-IDXMODE-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34 ; GFX9-IDXMODE-NEXT: v_lshlrev_b32_e32 v1, 2, v0 ; GFX9-IDXMODE-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64 +; GFX9-IDXMODE-NEXT: s_load_dwordx2 s[30:31], s[4:5], 0x24 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-IDXMODE-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-IDXMODE-NEXT: global_load_dword v14, v1, s[0:1] glc +; GFX9-IDXMODE-NEXT: global_load_dword v3, v1, s[0:1] glc ; GFX9-IDXMODE-NEXT: s_waitcnt vmcnt(0) +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v4, s20 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v6, s22 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v19, s11 ; GFX9-IDXMODE-NEXT: ;;#ASMSTART ; GFX9-IDXMODE-NEXT: v_mov_b32 v1, 62 ; GFX9-IDXMODE-NEXT: ;;#ASMEND -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v2, s18 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v3, s19 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v4, s12 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v5, s13 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v6, s14 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v7, s15 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v8, s8 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v9, s9 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v12, s10 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v13, s11 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v10, s22 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v11, s23 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v15, s16 -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 10, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v16, v2, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 11, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v17, v3, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 4, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v19, v4, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 5, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v20, v5, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 6, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v6, v6, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 7, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v7, v7, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 0, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v2, v8, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 1, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v3, v9, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 2, v14 -; GFX9-IDXMODE-NEXT: v_add_u32_e32 v18, 1, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v4, v12, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 3, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v5, v13, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 3, v18 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v5, s21 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v18, s10 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v17, s9 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v7, s23 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v16, s8 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v8, s16 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v9, s17 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v10, s18 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v11, s19 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v12, s12 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v13, s13 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v14, s14 +; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v15, s15 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 12, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[2:3], 14, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[28:29], 3, v3 +; GFX9-IDXMODE-NEXT: v_add_u32_e32 v20, 1, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[0:1], 13, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[26:27], 2, v3 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v21, v4, v1, vcc +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v23, v6, v1, s[2:3] +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v6, v19, v1, s[28:29] +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 3, v20 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[24:25], 1, v3 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v22, v5, v1, s[0:1] +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v5, v18, v1, s[26:27] +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v6, 63, v6, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 2, v20 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[22:23], 0, v3 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v4, v17, v1, s[24:25] ; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v5, 63, v5, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 2, v18 +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 1, v20 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[4:5], 15, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[6:7], 8, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[8:9], 9, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[10:11], 10, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[12:13], 11, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[14:15], 4, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[16:17], 5, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[18:19], 6, v3 +; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[20:21], 7, v3 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v3, v16, v1, s[22:23] ; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v4, 63, v4, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 1, v18 +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 0, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v27, v10, v1, s[10:11] +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v10, v15, v1, s[20:21] ; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v3, 63, v3, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v2, 63, v2, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 7, v18 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v9, 63, v7, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 6, v18 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v8, 63, v6, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 5, v18 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v7, 63, v20, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 4, v18 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v6, 63, v19, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 11, v18 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v13, 63, v17, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 10, v18 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v12, 63, v16, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 14, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v19, v10, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 15, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v17, v11, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 8, v14 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v16, s17 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v10, v15, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 9, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v11, v16, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 9, v18 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v11, 63, v11, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 8, v18 -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e64 s[0:1], 15, v18 +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 7, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v26, v9, v1, s[8:9] +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v9, v14, v1, s[18:19] ; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v10, 63, v10, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 14, v18 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v17, 63, v17, s[0:1] -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v15, s21 -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e64 s[0:1], 13, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v16, 63, v19, vcc -; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 12, v14 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v14, v15, v1, s[0:1] -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e64 s[0:1], 13, v18 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v15, 63, v14, s[0:1] -; GFX9-IDXMODE-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v19, s20 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v14, v19, v1, vcc -; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 12, v18 -; GFX9-IDXMODE-NEXT: v_mov_b32_e32 v18, 0 -; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v14, 63, v14, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 6, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v25, v8, v1, s[6:7] +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v8, v13, v1, s[16:17] +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v9, 63, v9, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 5, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v24, v7, v1, s[4:5] +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v7, v12, v1, s[14:15] +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v8, 63, v8, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 4, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e64 v11, v11, v1, s[12:13] +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v7, 63, v7, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 11, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v14, 63, v11, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 10, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v13, 63, v27, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 9, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v12, 63, v26, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 8, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v11, 63, v25, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 15, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v18, 63, v24, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 14, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v17, 63, v23, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 13, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v16, 63, v22, vcc +; GFX9-IDXMODE-NEXT: v_cmp_ne_u32_e32 vcc, 12, v20 +; GFX9-IDXMODE-NEXT: v_cndmask_b32_e32 v15, 63, v21, vcc ; GFX9-IDXMODE-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 -; GFX9-IDXMODE-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-IDXMODE-NEXT: global_store_dwordx4 v18, v[14:17], s[0:1] offset:48 +; GFX9-IDXMODE-NEXT: global_store_dwordx4 v2, v[15:18], s[30:31] offset:48 ; GFX9-IDXMODE-NEXT: s_waitcnt vmcnt(0) -; GFX9-IDXMODE-NEXT: global_store_dwordx4 v18, v[10:13], s[0:1] offset:32 +; GFX9-IDXMODE-NEXT: global_store_dwordx4 v2, v[11:14], s[30:31] offset:32 ; GFX9-IDXMODE-NEXT: s_waitcnt vmcnt(0) -; GFX9-IDXMODE-NEXT: global_store_dwordx4 v18, v[6:9], s[0:1] offset:16 +; GFX9-IDXMODE-NEXT: global_store_dwordx4 v2, v[7:10], s[30:31] offset:16 ; GFX9-IDXMODE-NEXT: s_waitcnt vmcnt(0) -; GFX9-IDXMODE-NEXT: global_store_dwordx4 v18, v[2:5], s[0:1] +; GFX9-IDXMODE-NEXT: global_store_dwordx4 v2, v[3:6], s[30:31] ; GFX9-IDXMODE-NEXT: s_waitcnt vmcnt(0) ; GFX9-IDXMODE-NEXT: s_and_saveexec_b64 s[0:1], vcc ; GFX9-IDXMODE-NEXT: s_cbranch_execz .LBB17_2 diff --git a/llvm/test/CodeGen/AMDGPU/indirect-call.ll b/llvm/test/CodeGen/AMDGPU/indirect-call.ll index 27dea55da5d97..fba57400a1966 100644 --- a/llvm/test/CodeGen/AMDGPU/indirect-call.ll +++ b/llvm/test/CodeGen/AMDGPU/indirect-call.ll @@ -163,11 +163,11 @@ define void @test_indirect_call_vgpr_ptr(ptr %fptr) #0 { ; GCN-NEXT: s_mov_b64 s[4:5], s[48:49] ; GCN-NEXT: s_mov_b64 s[6:7], s[38:39] ; GCN-NEXT: s_mov_b64 s[8:9], s[36:37] -; GCN-NEXT: s_mov_b64 s[10:11], s[34:35] ; GCN-NEXT: s_mov_b32 s12, s53 ; GCN-NEXT: s_mov_b32 s13, s52 ; GCN-NEXT: s_mov_b32 s14, s51 ; GCN-NEXT: s_mov_b32 s15, s50 +; GCN-NEXT: s_mov_b64 s[10:11], s[34:35] ; GCN-NEXT: s_swappc_b64 s[30:31], s[16:17] ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1 ; GCN-NEXT: ; implicit-def: $vgpr31 @@ -247,11 +247,11 @@ define void @test_indirect_call_vgpr_ptr(ptr %fptr) #0 { ; GISEL-NEXT: s_mov_b64 s[4:5], s[48:49] ; GISEL-NEXT: s_mov_b64 s[6:7], s[38:39] ; GISEL-NEXT: s_mov_b64 s[8:9], s[36:37] -; GISEL-NEXT: s_mov_b64 s[10:11], s[34:35] ; GISEL-NEXT: s_mov_b32 s12, s53 ; GISEL-NEXT: s_mov_b32 s13, s52 ; GISEL-NEXT: s_mov_b32 s14, s51 ; GISEL-NEXT: s_mov_b32 s15, s50 +; GISEL-NEXT: s_mov_b64 s[10:11], s[34:35] ; GISEL-NEXT: s_swappc_b64 s[30:31], s[16:17] ; GISEL-NEXT: ; implicit-def: $vgpr0 ; GISEL-NEXT: ; implicit-def: $vgpr31 @@ -336,12 +336,12 @@ define void @test_indirect_call_vgpr_ptr_arg(ptr %fptr) #0 { ; GCN-NEXT: s_mov_b64 s[4:5], s[48:49] ; GCN-NEXT: s_mov_b64 s[6:7], s[38:39] ; GCN-NEXT: s_mov_b64 s[8:9], s[36:37] -; GCN-NEXT: s_mov_b64 s[10:11], s[34:35] ; GCN-NEXT: s_mov_b32 s12, s53 ; GCN-NEXT: s_mov_b32 s13, s52 ; GCN-NEXT: s_mov_b32 s14, s51 ; GCN-NEXT: s_mov_b32 s15, s50 ; GCN-NEXT: v_mov_b32_e32 v0, v2 +; GCN-NEXT: s_mov_b64 s[10:11], s[34:35] ; GCN-NEXT: s_swappc_b64 s[30:31], s[16:17] ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1 ; GCN-NEXT: ; implicit-def: $vgpr31 @@ -423,11 +423,11 @@ define void @test_indirect_call_vgpr_ptr_arg(ptr %fptr) #0 { ; GISEL-NEXT: s_mov_b64 s[4:5], s[48:49] ; GISEL-NEXT: s_mov_b64 s[6:7], s[38:39] ; GISEL-NEXT: s_mov_b64 s[8:9], s[36:37] -; GISEL-NEXT: s_mov_b64 s[10:11], s[34:35] ; GISEL-NEXT: s_mov_b32 s12, s53 ; GISEL-NEXT: s_mov_b32 s13, s52 ; GISEL-NEXT: s_mov_b32 s14, s51 ; GISEL-NEXT: s_mov_b32 s15, s50 +; GISEL-NEXT: s_mov_b64 s[10:11], s[34:35] ; GISEL-NEXT: s_swappc_b64 s[30:31], s[16:17] ; GISEL-NEXT: ; implicit-def: $vgpr0 ; GISEL-NEXT: ; implicit-def: $vgpr31 @@ -511,11 +511,11 @@ define i32 @test_indirect_call_vgpr_ptr_ret(ptr %fptr) #0 { ; GCN-NEXT: s_mov_b64 s[4:5], s[48:49] ; GCN-NEXT: s_mov_b64 s[6:7], s[38:39] ; GCN-NEXT: s_mov_b64 s[8:9], s[36:37] -; GCN-NEXT: s_mov_b64 s[10:11], s[34:35] ; GCN-NEXT: s_mov_b32 s12, s53 ; GCN-NEXT: s_mov_b32 s13, s52 ; GCN-NEXT: s_mov_b32 s14, s51 ; GCN-NEXT: s_mov_b32 s15, s50 +; GCN-NEXT: s_mov_b64 s[10:11], s[34:35] ; GCN-NEXT: s_swappc_b64 s[30:31], s[16:17] ; GCN-NEXT: v_mov_b32_e32 v2, v0 ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1 @@ -597,11 +597,11 @@ define i32 @test_indirect_call_vgpr_ptr_ret(ptr %fptr) #0 { ; GISEL-NEXT: s_mov_b64 s[4:5], s[48:49] ; GISEL-NEXT: s_mov_b64 s[6:7], s[38:39] ; GISEL-NEXT: s_mov_b64 s[8:9], s[36:37] -; GISEL-NEXT: s_mov_b64 s[10:11], s[34:35] ; GISEL-NEXT: s_mov_b32 s12, s53 ; GISEL-NEXT: s_mov_b32 s13, s52 ; GISEL-NEXT: s_mov_b32 s14, s51 ; GISEL-NEXT: s_mov_b32 s15, s50 +; GISEL-NEXT: s_mov_b64 s[10:11], s[34:35] ; GISEL-NEXT: s_swappc_b64 s[30:31], s[16:17] ; GISEL-NEXT: v_mov_b32_e32 v1, v0 ; GISEL-NEXT: ; implicit-def: $vgpr0 @@ -692,14 +692,14 @@ define void @test_indirect_call_vgpr_ptr_in_branch(ptr %fptr, i1 %cond) #0 { ; GCN-NEXT: v_readfirstlane_b32 s17, v1 ; GCN-NEXT: v_cmp_eq_u64_e32 vcc, s[16:17], v[0:1] ; GCN-NEXT: s_and_saveexec_b64 s[66:67], vcc -; GCN-NEXT: s_mov_b64 s[4:5], s[48:49] -; GCN-NEXT: s_mov_b64 s[6:7], s[38:39] -; GCN-NEXT: s_mov_b64 s[8:9], s[36:37] -; GCN-NEXT: s_mov_b64 s[10:11], s[34:35] ; GCN-NEXT: s_mov_b32 s12, s53 ; GCN-NEXT: s_mov_b32 s13, s52 ; GCN-NEXT: s_mov_b32 s14, s51 ; GCN-NEXT: s_mov_b32 s15, s50 +; GCN-NEXT: s_mov_b64 s[4:5], s[48:49] +; GCN-NEXT: s_mov_b64 s[6:7], s[38:39] +; GCN-NEXT: s_mov_b64 s[8:9], s[36:37] +; GCN-NEXT: s_mov_b64 s[10:11], s[34:35] ; GCN-NEXT: s_swappc_b64 s[30:31], s[16:17] ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1 ; GCN-NEXT: ; implicit-def: $vgpr31 @@ -787,14 +787,14 @@ define void @test_indirect_call_vgpr_ptr_in_branch(ptr %fptr, i1 %cond) #0 { ; GISEL-NEXT: v_readfirstlane_b32 s17, v1 ; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, s[16:17], v[0:1] ; GISEL-NEXT: s_and_saveexec_b64 s[66:67], vcc -; GISEL-NEXT: s_mov_b64 s[4:5], s[48:49] -; GISEL-NEXT: s_mov_b64 s[6:7], s[38:39] -; GISEL-NEXT: s_mov_b64 s[8:9], s[36:37] -; GISEL-NEXT: s_mov_b64 s[10:11], s[34:35] ; GISEL-NEXT: s_mov_b32 s12, s53 ; GISEL-NEXT: s_mov_b32 s13, s52 ; GISEL-NEXT: s_mov_b32 s14, s51 ; GISEL-NEXT: s_mov_b32 s15, s50 +; GISEL-NEXT: s_mov_b64 s[4:5], s[48:49] +; GISEL-NEXT: s_mov_b64 s[6:7], s[38:39] +; GISEL-NEXT: s_mov_b64 s[8:9], s[36:37] +; GISEL-NEXT: s_mov_b64 s[10:11], s[34:35] ; GISEL-NEXT: s_swappc_b64 s[30:31], s[16:17] ; GISEL-NEXT: ; implicit-def: $vgpr0 ; GISEL-NEXT: ; implicit-def: $vgpr31 diff --git a/llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll b/llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll index ea406781a4e79..d0e0b0b620fd8 100644 --- a/llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll +++ b/llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll @@ -3190,16 +3190,14 @@ define amdgpu_kernel void @double15_inselt(ptr addrspace(1) %out, <15 x double> ; GCN-NEXT: v_mov_b32_e32 v32, 0x3ff00000 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: v_mov_b32_e32 v0, s8 -; GCN-NEXT: v_mov_b32_e32 v1, s9 +; GCN-NEXT: s_load_dword s8, s[4:5], 0x124 ; GCN-NEXT: v_mov_b32_e32 v24, s0 -; GCN-NEXT: s_load_dword s0, s[4:5], 0x124 ; GCN-NEXT: v_mov_b32_e32 v25, s1 +; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 +; GCN-NEXT: v_mov_b32_e32 v1, s9 ; GCN-NEXT: v_mov_b32_e32 v2, s10 ; GCN-NEXT: v_mov_b32_e32 v3, s11 ; GCN-NEXT: v_mov_b32_e32 v4, s12 -; GCN-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NEXT: s_lshl_b32 m0, s0, 1 -; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GCN-NEXT: v_mov_b32_e32 v5, s13 ; GCN-NEXT: v_mov_b32_e32 v6, s14 ; GCN-NEXT: v_mov_b32_e32 v7, s15 @@ -3215,6 +3213,8 @@ define amdgpu_kernel void @double15_inselt(ptr addrspace(1) %out, <15 x double> ; GCN-NEXT: v_mov_b32_e32 v17, s25 ; GCN-NEXT: v_mov_b32_e32 v18, s26 ; GCN-NEXT: v_mov_b32_e32 v19, s27 +; GCN-NEXT: s_waitcnt lgkmcnt(0) +; GCN-NEXT: s_lshl_b32 m0, s8, 1 ; GCN-NEXT: v_mov_b32_e32 v20, s28 ; GCN-NEXT: v_mov_b32_e32 v21, s29 ; GCN-NEXT: v_mov_b32_e32 v22, s30 @@ -3224,7 +3224,6 @@ define amdgpu_kernel void @double15_inselt(ptr addrspace(1) %out, <15 x double> ; GCN-NEXT: v_mov_b32_e32 v28, s6 ; GCN-NEXT: v_mov_b32_e32 v29, s7 ; GCN-NEXT: v_movreld_b32_e32 v0, 0 -; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-NEXT: v_movreld_b32_e32 v1, v32 ; GCN-NEXT: s_addc_u32 s3, s1, 0 diff --git a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll index 37d7c24cb6869..23de4bb114cfc 100644 --- a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll +++ b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll @@ -1789,108 +1789,108 @@ define amdgpu_kernel void @v_insertelement_v16bf16_3(ptr addrspace(1) %out, ptr define amdgpu_kernel void @v_insertelement_v16bf16_dynamic(ptr addrspace(1) %out, ptr addrspace(1) %in, i32 %val, i32 %n) { ; SI-LABEL: v_insertelement_v16bf16_dynamic: ; SI: ; %bb.0: -; SI-NEXT: s_load_dwordx4 s[12:15], s[8:9], 0x0 -; SI-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x4 -; SI-NEXT: s_mov_b32 s3, 0x100f000 -; SI-NEXT: s_mov_b32 s2, 0 +; SI-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 +; SI-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x4 +; SI-NEXT: s_mov_b32 s11, 0x100f000 +; SI-NEXT: s_mov_b32 s10, 0 ; SI-NEXT: v_lshlrev_b32_e32 v4, 5, v0 ; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: s_mov_b64 s[0:1], s[14:15] +; SI-NEXT: s_mov_b64 s[8:9], s[2:3] ; SI-NEXT: v_mov_b32_e32 v5, 0 -; SI-NEXT: buffer_load_dwordx4 v[7:10], v[4:5], s[0:3], 0 addr64 -; SI-NEXT: buffer_load_dwordx4 v[0:3], v[4:5], s[0:3], 0 addr64 offset:16 -; SI-NEXT: s_cmp_eq_u32 s7, 6 -; SI-NEXT: v_mov_b32_e32 v6, s6 +; SI-NEXT: buffer_load_dwordx4 v[7:10], v[4:5], s[8:11], 0 addr64 +; SI-NEXT: buffer_load_dwordx4 v[0:3], v[4:5], s[8:11], 0 addr64 offset:16 +; SI-NEXT: s_cmp_eq_u32 s5, 6 +; SI-NEXT: v_mov_b32_e32 v6, s4 ; SI-NEXT: s_cselect_b64 vcc, -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 7 -; SI-NEXT: s_mov_b64 s[14:15], s[2:3] +; SI-NEXT: s_cmp_eq_u32 s5, 7 +; SI-NEXT: s_mov_b64 s[2:3], s[10:11] ; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: v_cndmask_b32_e32 v11, v10, v6, vcc -; SI-NEXT: s_cselect_b64 vcc, -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 4 -; SI-NEXT: s_cselect_b64 s[0:1], -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 5 ; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v9 -; SI-NEXT: v_cndmask_b32_e64 v9, v9, v6, s[0:1] -; SI-NEXT: s_cselect_b64 s[0:1], -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 2 -; SI-NEXT: s_cselect_b64 s[2:3], -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 3 +; SI-NEXT: s_cselect_b64 vcc, -1, 0 +; SI-NEXT: s_cmp_eq_u32 s5, 4 ; SI-NEXT: v_cndmask_b32_e32 v10, v10, v6, vcc -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v8 -; SI-NEXT: v_cndmask_b32_e64 v8, v8, v6, s[2:3] -; SI-NEXT: s_cselect_b64 s[2:3], -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 0 +; SI-NEXT: s_cselect_b64 vcc, -1, 0 +; SI-NEXT: s_cmp_eq_u32 s5, 5 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v9 +; SI-NEXT: v_cndmask_b32_e32 v9, v9, v6, vcc +; SI-NEXT: s_cselect_b64 vcc, -1, 0 +; SI-NEXT: s_cmp_eq_u32 s5, 2 ; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11 ; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; SI-NEXT: v_cndmask_b32_e64 v12, v12, v6, s[0:1] -; SI-NEXT: s_cselect_b64 s[4:5], -1, 0 +; SI-NEXT: v_cndmask_b32_e32 v12, v12, v6, vcc +; SI-NEXT: s_cselect_b64 vcc, -1, 0 +; SI-NEXT: s_cmp_eq_u32 s5, 3 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v8 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 ; SI-NEXT: v_or_b32_e32 v10, v11, v10 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v12 -; SI-NEXT: v_cndmask_b32_e64 v12, v13, v6, s[2:3] -; SI-NEXT: s_cmp_eq_u32 s7, 1 +; SI-NEXT: v_cndmask_b32_e32 v8, v8, v6, vcc +; SI-NEXT: s_cselect_b64 vcc, -1, 0 +; SI-NEXT: s_cmp_eq_u32 s5, 0 +; SI-NEXT: v_or_b32_e32 v9, v9, v11 +; SI-NEXT: v_cndmask_b32_e32 v11, v13, v6, vcc +; SI-NEXT: s_cselect_b64 vcc, -1, 0 +; SI-NEXT: s_cmp_eq_u32 s5, 1 ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v7 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 +; SI-NEXT: v_cndmask_b32_e32 v7, v7, v6, vcc ; SI-NEXT: s_cselect_b64 vcc, -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 14 -; SI-NEXT: v_cndmask_b32_e64 v7, v7, v6, s[4:5] -; SI-NEXT: v_or_b32_e32 v8, v8, v12 -; SI-NEXT: v_cndmask_b32_e32 v12, v14, v6, vcc +; SI-NEXT: s_cmp_eq_u32 s5, 14 +; SI-NEXT: v_or_b32_e32 v8, v8, v11 +; SI-NEXT: v_cndmask_b32_e32 v11, v14, v6, vcc ; SI-NEXT: s_cselect_b64 vcc, -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 15 +; SI-NEXT: s_cmp_eq_u32 s5, 15 ; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v3 ; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc ; SI-NEXT: s_cselect_b64 vcc, -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 12 -; SI-NEXT: v_or_b32_e32 v7, v7, v12 -; SI-NEXT: v_cndmask_b32_e32 v12, v15, v6, vcc +; SI-NEXT: s_cmp_eq_u32 s5, 12 +; SI-NEXT: v_or_b32_e32 v7, v7, v11 +; SI-NEXT: v_cndmask_b32_e32 v11, v15, v6, vcc ; SI-NEXT: s_cselect_b64 vcc, -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 13 +; SI-NEXT: s_cmp_eq_u32 s5, 13 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v2 ; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc ; SI-NEXT: s_cselect_b64 vcc, -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 10 -; SI-NEXT: v_or_b32_e32 v3, v3, v12 -; SI-NEXT: v_cndmask_b32_e32 v12, v16, v6, vcc +; SI-NEXT: s_cmp_eq_u32 s5, 10 +; SI-NEXT: v_or_b32_e32 v3, v3, v11 +; SI-NEXT: v_cndmask_b32_e32 v11, v16, v6, vcc ; SI-NEXT: s_cselect_b64 vcc, -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 11 +; SI-NEXT: s_cmp_eq_u32 s5, 11 ; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v1 ; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc ; SI-NEXT: s_cselect_b64 vcc, -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 8 -; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; SI-NEXT: v_or_b32_e32 v2, v2, v12 -; SI-NEXT: v_cndmask_b32_e32 v12, v17, v6, vcc +; SI-NEXT: s_cmp_eq_u32 s5, 8 +; SI-NEXT: v_or_b32_e32 v2, v2, v11 +; SI-NEXT: v_cndmask_b32_e32 v11, v17, v6, vcc ; SI-NEXT: s_cselect_b64 vcc, -1, 0 -; SI-NEXT: s_cmp_eq_u32 s7, 9 -; SI-NEXT: v_or_b32_e32 v9, v9, v11 -; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v0 +; SI-NEXT: s_cmp_eq_u32 s5, 9 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v0 ; SI-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc ; SI-NEXT: s_cselect_b64 vcc, -1, 0 -; SI-NEXT: v_cndmask_b32_e32 v6, v11, v6, vcc +; SI-NEXT: v_cndmask_b32_e32 v6, v18, v6, vcc ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 +; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; SI-NEXT: v_or_b32_e32 v1, v1, v12 +; SI-NEXT: v_or_b32_e32 v1, v1, v11 ; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: buffer_store_dwordx4 v[0:3], v[4:5], s[12:15], 0 addr64 offset:16 -; SI-NEXT: buffer_store_dwordx4 v[7:10], v[4:5], s[12:15], 0 addr64 +; SI-NEXT: buffer_store_dwordx4 v[0:3], v[4:5], s[0:3], 0 addr64 offset:16 +; SI-NEXT: buffer_store_dwordx4 v[7:10], v[4:5], s[0:3], 0 addr64 ; SI-NEXT: s_endpgm ; ; VI-LABEL: v_insertelement_v16bf16_dynamic: ; VI: ; %bb.0: ; VI-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 -; VI-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x10 +; VI-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x10 ; VI-NEXT: v_lshlrev_b32_e32 v8, 5, v0 ; VI-NEXT: s_add_i32 s12, s12, s17 ; VI-NEXT: s_mov_b32 flat_scratch_lo, s13 @@ -1907,80 +1907,80 @@ define amdgpu_kernel void @v_insertelement_v16bf16_dynamic(ptr addrspace(1) %out ; VI-NEXT: v_add_u32_e32 v8, vcc, s0, v8 ; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc ; VI-NEXT: v_add_u32_e32 v10, vcc, 16, v8 -; VI-NEXT: s_cmp_eq_u32 s7, 14 +; VI-NEXT: s_cmp_eq_u32 s5, 14 ; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v9, vcc -; VI-NEXT: v_mov_b32_e32 v12, s6 +; VI-NEXT: v_mov_b32_e32 v12, s4 ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 15 +; VI-NEXT: s_cmp_eq_u32 s5, 15 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_cndmask_b32_e32 v13, v3, v12, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 12 -; VI-NEXT: s_cselect_b64 s[0:1], -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 13 +; VI-NEXT: s_cmp_eq_u32 s5, 12 +; VI-NEXT: v_cndmask_b32_e32 v3, v3, v12, vcc +; VI-NEXT: s_cselect_b64 vcc, -1, 0 +; VI-NEXT: s_cmp_eq_u32 s5, 13 ; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v2 -; VI-NEXT: v_cndmask_b32_e64 v2, v2, v12, s[0:1] -; VI-NEXT: s_cselect_b64 s[0:1], -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 10 -; VI-NEXT: s_cselect_b64 s[2:3], -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 11 +; VI-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc +; VI-NEXT: s_cselect_b64 vcc, -1, 0 +; VI-NEXT: s_cmp_eq_u32 s5, 10 +; VI-NEXT: v_cndmask_b32_e32 v14, v14, v12, vcc +; VI-NEXT: s_cselect_b64 vcc, -1, 0 +; VI-NEXT: s_cmp_eq_u32 s5, 11 ; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v1 -; VI-NEXT: v_cndmask_b32_e64 v1, v1, v12, s[2:3] -; VI-NEXT: s_cselect_b64 s[2:3], -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 8 -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: s_cselect_b64 s[4:5], -1, 0 -; VI-NEXT: v_cndmask_b32_e64 v15, v15, v12, s[2:3] -; VI-NEXT: s_cmp_eq_u32 s7, 9 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; VI-NEXT: v_cndmask_b32_e32 v1, v1, v12, vcc +; VI-NEXT: s_cselect_b64 vcc, -1, 0 +; VI-NEXT: s_cmp_eq_u32 s5, 8 +; VI-NEXT: v_or_b32_sdwa v2, v2, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: v_cndmask_b32_e32 v14, v15, v12, vcc +; VI-NEXT: s_cselect_b64 vcc, -1, 0 +; VI-NEXT: s_cmp_eq_u32 s5, 9 ; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v0 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v12, vcc -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; VI-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 6 -; VI-NEXT: v_or_b32_sdwa v1, v1, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; VI-NEXT: v_cndmask_b32_e32 v15, v16, v12, vcc +; VI-NEXT: s_cmp_eq_u32 s5, 6 +; VI-NEXT: v_or_b32_sdwa v1, v1, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: v_cndmask_b32_e32 v14, v16, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 7 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v12, s[4:5] +; VI-NEXT: s_cmp_eq_u32 s5, 7 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v7 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_cndmask_b32_e64 v14, v14, v12, s[0:1] -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_cndmask_b32_e32 v7, v7, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 4 -; VI-NEXT: v_or_b32_sdwa v3, v13, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 -; VI-NEXT: v_or_b32_sdwa v0, v0, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; VI-NEXT: v_cndmask_b32_e32 v15, v17, v12, vcc +; VI-NEXT: s_cmp_eq_u32 s5, 4 +; VI-NEXT: v_or_b32_sdwa v0, v0, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: v_cndmask_b32_e32 v14, v17, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 5 -; VI-NEXT: v_or_b32_sdwa v2, v2, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v6 +; VI-NEXT: s_cmp_eq_u32 s5, 5 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v6 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_cndmask_b32_e32 v6, v6, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 2 -; VI-NEXT: v_cndmask_b32_e32 v13, v13, v12, vcc +; VI-NEXT: s_cmp_eq_u32 s5, 2 +; VI-NEXT: v_or_b32_sdwa v7, v7, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: v_cndmask_b32_e32 v14, v18, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 3 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v5 +; VI-NEXT: s_cmp_eq_u32 s5, 3 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v5 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 0 -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_cndmask_b32_e32 v14, v14, v12, vcc +; VI-NEXT: s_cmp_eq_u32 s5, 0 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_or_b32_sdwa v6, v6, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: v_cndmask_b32_e32 v14, v19, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 1 -; VI-NEXT: v_or_b32_sdwa v6, v6, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: s_cmp_eq_u32 s5, 1 +; VI-NEXT: v_or_b32_sdwa v3, v13, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v4 ; VI-NEXT: v_cndmask_b32_e32 v4, v4, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 ; VI-NEXT: v_cndmask_b32_e32 v12, v13, v12, vcc -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_or_b32_sdwa v7, v7, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; VI-NEXT: v_or_b32_sdwa v5, v5, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; VI-NEXT: v_or_b32_sdwa v4, v4, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; VI-NEXT: flat_store_dwordx4 v[8:9], v[4:7] @@ -2050,17 +2050,17 @@ define amdgpu_kernel void @v_insertelement_v16bf16_dynamic(ptr addrspace(1) %out ; GFX900-NEXT: v_cndmask_b32_e64 v15, v6, v9, s[18:19] ; GFX900-NEXT: v_cndmask_b32_sdwa v6, v6, v9, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX900-NEXT: s_mov_b64 vcc, s[24:25] -; GFX900-NEXT: v_perm_b32 v3, v3, v10, s30 -; GFX900-NEXT: v_cndmask_b32_e64 v10, v5, v9, s[22:23] +; GFX900-NEXT: v_cndmask_b32_e64 v16, v5, v9, s[22:23] ; GFX900-NEXT: v_cndmask_b32_sdwa v5, v5, v9, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX900-NEXT: s_mov_b64 vcc, s[28:29] -; GFX900-NEXT: v_perm_b32 v2, v2, v11, s30 -; GFX900-NEXT: v_cndmask_b32_e64 v11, v4, v9, s[26:27] +; GFX900-NEXT: v_cndmask_b32_e64 v17, v4, v9, s[26:27] ; GFX900-NEXT: v_cndmask_b32_sdwa v4, v4, v9, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX900-NEXT: v_perm_b32 v7, v7, v14, s30 ; GFX900-NEXT: v_perm_b32 v6, v6, v15, s30 -; GFX900-NEXT: v_perm_b32 v5, v5, v10, s30 -; GFX900-NEXT: v_perm_b32 v4, v4, v11, s30 +; GFX900-NEXT: v_perm_b32 v5, v5, v16, s30 +; GFX900-NEXT: v_perm_b32 v4, v4, v17, s30 +; GFX900-NEXT: v_perm_b32 v3, v3, v10, s30 +; GFX900-NEXT: v_perm_b32 v2, v2, v11, s30 ; GFX900-NEXT: v_perm_b32 v1, v1, v12, s30 ; GFX900-NEXT: v_perm_b32 v0, v0, v13, s30 ; GFX900-NEXT: global_store_dwordx4 v8, v[4:7], s[36:37] offset:16 diff --git a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll index c24ee53de2e76..eeeb9feecd4fd 100644 --- a/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll +++ b/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll @@ -3293,17 +3293,17 @@ define amdgpu_kernel void @v_insertelement_v16f16_dynamic(ptr addrspace(1) %out, ; GFX9-NEXT: v_cndmask_b32_e64 v15, v6, v9, s[18:19] ; GFX9-NEXT: v_cndmask_b32_sdwa v6, v6, v9, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: s_mov_b64 vcc, s[24:25] -; GFX9-NEXT: v_perm_b32 v3, v3, v10, s30 -; GFX9-NEXT: v_cndmask_b32_e64 v10, v5, v9, s[22:23] +; GFX9-NEXT: v_cndmask_b32_e64 v16, v5, v9, s[22:23] ; GFX9-NEXT: v_cndmask_b32_sdwa v5, v5, v9, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: s_mov_b64 vcc, s[28:29] -; GFX9-NEXT: v_perm_b32 v2, v2, v11, s30 -; GFX9-NEXT: v_cndmask_b32_e64 v11, v4, v9, s[26:27] +; GFX9-NEXT: v_cndmask_b32_e64 v17, v4, v9, s[26:27] ; GFX9-NEXT: v_cndmask_b32_sdwa v4, v4, v9, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_perm_b32 v7, v7, v14, s30 ; GFX9-NEXT: v_perm_b32 v6, v6, v15, s30 -; GFX9-NEXT: v_perm_b32 v5, v5, v10, s30 -; GFX9-NEXT: v_perm_b32 v4, v4, v11, s30 +; GFX9-NEXT: v_perm_b32 v5, v5, v16, s30 +; GFX9-NEXT: v_perm_b32 v4, v4, v17, s30 +; GFX9-NEXT: v_perm_b32 v3, v3, v10, s30 +; GFX9-NEXT: v_perm_b32 v2, v2, v11, s30 ; GFX9-NEXT: v_perm_b32 v1, v1, v12, s30 ; GFX9-NEXT: v_perm_b32 v0, v0, v13, s30 ; GFX9-NEXT: global_store_dwordx4 v8, v[4:7], s[36:37] offset:16 @@ -3313,7 +3313,7 @@ define amdgpu_kernel void @v_insertelement_v16f16_dynamic(ptr addrspace(1) %out, ; VI-LABEL: v_insertelement_v16f16_dynamic: ; VI: ; %bb.0: ; VI-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 -; VI-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x10 +; VI-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x10 ; VI-NEXT: v_lshlrev_b32_e32 v8, 5, v0 ; VI-NEXT: s_add_i32 s12, s12, s17 ; VI-NEXT: s_mov_b32 flat_scratch_lo, s13 @@ -3330,80 +3330,80 @@ define amdgpu_kernel void @v_insertelement_v16f16_dynamic(ptr addrspace(1) %out, ; VI-NEXT: v_add_u32_e32 v8, vcc, s0, v8 ; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc ; VI-NEXT: v_add_u32_e32 v10, vcc, 16, v8 -; VI-NEXT: s_cmp_eq_u32 s7, 14 +; VI-NEXT: s_cmp_eq_u32 s5, 14 ; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v9, vcc -; VI-NEXT: v_mov_b32_e32 v12, s6 +; VI-NEXT: v_mov_b32_e32 v12, s4 ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 15 +; VI-NEXT: s_cmp_eq_u32 s5, 15 ; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: v_cndmask_b32_e32 v13, v3, v12, vcc +; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 12 -; VI-NEXT: s_cselect_b64 s[0:1], -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 13 +; VI-NEXT: s_cmp_eq_u32 s5, 12 +; VI-NEXT: v_cndmask_b32_e32 v3, v3, v12, vcc +; VI-NEXT: s_cselect_b64 vcc, -1, 0 +; VI-NEXT: s_cmp_eq_u32 s5, 13 ; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v2 -; VI-NEXT: v_cndmask_b32_e64 v2, v2, v12, s[0:1] -; VI-NEXT: s_cselect_b64 s[0:1], -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 10 -; VI-NEXT: s_cselect_b64 s[2:3], -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 11 +; VI-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc +; VI-NEXT: s_cselect_b64 vcc, -1, 0 +; VI-NEXT: s_cmp_eq_u32 s5, 10 +; VI-NEXT: v_cndmask_b32_e32 v14, v14, v12, vcc +; VI-NEXT: s_cselect_b64 vcc, -1, 0 +; VI-NEXT: s_cmp_eq_u32 s5, 11 ; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v1 -; VI-NEXT: v_cndmask_b32_e64 v1, v1, v12, s[2:3] -; VI-NEXT: s_cselect_b64 s[2:3], -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 8 -; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; VI-NEXT: s_cselect_b64 s[4:5], -1, 0 -; VI-NEXT: v_cndmask_b32_e64 v15, v15, v12, s[2:3] -; VI-NEXT: s_cmp_eq_u32 s7, 9 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; VI-NEXT: v_cndmask_b32_e32 v1, v1, v12, vcc +; VI-NEXT: s_cselect_b64 vcc, -1, 0 +; VI-NEXT: s_cmp_eq_u32 s5, 8 +; VI-NEXT: v_or_b32_sdwa v2, v2, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: v_cndmask_b32_e32 v14, v15, v12, vcc +; VI-NEXT: s_cselect_b64 vcc, -1, 0 +; VI-NEXT: s_cmp_eq_u32 s5, 9 ; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v0 -; VI-NEXT: v_cndmask_b32_e32 v3, v3, v12, vcc -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; VI-NEXT: v_cndmask_b32_e32 v0, v0, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 6 -; VI-NEXT: v_or_b32_sdwa v1, v1, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; VI-NEXT: v_cndmask_b32_e32 v15, v16, v12, vcc +; VI-NEXT: s_cmp_eq_u32 s5, 6 +; VI-NEXT: v_or_b32_sdwa v1, v1, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: v_cndmask_b32_e32 v14, v16, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 7 -; VI-NEXT: v_cndmask_b32_e64 v0, v0, v12, s[4:5] +; VI-NEXT: s_cmp_eq_u32 s5, 7 ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v7 -; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; VI-NEXT: v_cndmask_b32_e64 v14, v14, v12, s[0:1] -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_cndmask_b32_e32 v7, v7, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 4 -; VI-NEXT: v_or_b32_sdwa v3, v13, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 -; VI-NEXT: v_or_b32_sdwa v0, v0, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; VI-NEXT: v_cndmask_b32_e32 v15, v17, v12, vcc +; VI-NEXT: s_cmp_eq_u32 s5, 4 +; VI-NEXT: v_or_b32_sdwa v0, v0, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: v_cndmask_b32_e32 v14, v17, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 5 -; VI-NEXT: v_or_b32_sdwa v2, v2, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD -; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v6 +; VI-NEXT: s_cmp_eq_u32 s5, 5 +; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v6 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_cndmask_b32_e32 v6, v6, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 2 -; VI-NEXT: v_cndmask_b32_e32 v13, v13, v12, vcc +; VI-NEXT: s_cmp_eq_u32 s5, 2 +; VI-NEXT: v_or_b32_sdwa v7, v7, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: v_cndmask_b32_e32 v14, v18, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 3 -; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v5 +; VI-NEXT: s_cmp_eq_u32 s5, 3 +; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v5 +; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_cndmask_b32_e32 v5, v5, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 0 -; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; VI-NEXT: v_cndmask_b32_e32 v14, v14, v12, vcc +; VI-NEXT: s_cmp_eq_u32 s5, 0 +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_or_b32_sdwa v6, v6, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: v_cndmask_b32_e32 v14, v19, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 -; VI-NEXT: s_cmp_eq_u32 s7, 1 -; VI-NEXT: v_or_b32_sdwa v6, v6, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: s_cmp_eq_u32 s5, 1 +; VI-NEXT: v_or_b32_sdwa v3, v13, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v4 ; VI-NEXT: v_cndmask_b32_e32 v4, v4, v12, vcc ; VI-NEXT: s_cselect_b64 vcc, -1, 0 ; VI-NEXT: v_cndmask_b32_e32 v12, v13, v12, vcc -; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12 -; VI-NEXT: v_or_b32_sdwa v7, v7, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; VI-NEXT: v_or_b32_sdwa v5, v5, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; VI-NEXT: v_or_b32_sdwa v4, v4, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; VI-NEXT: flat_store_dwordx4 v[8:9], v[4:7] @@ -3413,109 +3413,109 @@ define amdgpu_kernel void @v_insertelement_v16f16_dynamic(ptr addrspace(1) %out, ; CI-LABEL: v_insertelement_v16f16_dynamic: ; CI: ; %bb.0: ; CI-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 -; CI-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x4 -; CI-NEXT: v_lshlrev_b32_e32 v4, 5, v0 +; CI-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x4 +; CI-NEXT: v_lshlrev_b32_e32 v8, 5, v0 ; CI-NEXT: s_add_i32 s12, s12, s17 ; CI-NEXT: s_mov_b32 flat_scratch_lo, s13 ; CI-NEXT: s_waitcnt lgkmcnt(0) -; CI-NEXT: v_mov_b32_e32 v1, s3 -; CI-NEXT: v_add_i32_e32 v0, vcc, s2, v4 -; CI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc -; CI-NEXT: v_add_i32_e32 v2, vcc, 16, v0 +; CI-NEXT: v_mov_b32_e32 v0, s3 +; CI-NEXT: v_add_i32_e32 v4, vcc, s2, v8 +; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v0, vcc +; CI-NEXT: v_add_i32_e32 v0, vcc, 16, v4 ; CI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 -; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc -; CI-NEXT: flat_load_dwordx4 v[7:10], v[2:3] +; CI-NEXT: v_addc_u32_e32 v1, vcc, 0, v5, vcc ; CI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] -; CI-NEXT: v_mov_b32_e32 v5, s1 -; CI-NEXT: v_add_i32_e32 v4, vcc, s0, v4 -; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc -; CI-NEXT: v_add_i32_e32 v11, vcc, 16, v4 -; CI-NEXT: s_cmp_eq_u32 s7, 14 -; CI-NEXT: v_addc_u32_e32 v12, vcc, 0, v5, vcc -; CI-NEXT: v_mov_b32_e32 v6, s6 +; CI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] +; CI-NEXT: v_mov_b32_e32 v9, s1 +; CI-NEXT: v_add_i32_e32 v8, vcc, s0, v8 +; CI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc +; CI-NEXT: v_add_i32_e32 v11, vcc, 16, v8 +; CI-NEXT: s_cmp_eq_u32 s5, 14 +; CI-NEXT: v_addc_u32_e32 v12, vcc, 0, v9, vcc +; CI-NEXT: v_mov_b32_e32 v10, s4 ; CI-NEXT: s_cselect_b64 vcc, -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 15 +; CI-NEXT: s_cmp_eq_u32 s5, 15 ; CI-NEXT: s_waitcnt vmcnt(1) -; CI-NEXT: v_cndmask_b32_e32 v13, v10, v6, vcc +; CI-NEXT: v_cndmask_b32_e32 v13, v3, v10, vcc +; CI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; CI-NEXT: s_cselect_b64 vcc, -1, 0 +; CI-NEXT: s_cmp_eq_u32 s5, 12 +; CI-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc +; CI-NEXT: s_cselect_b64 vcc, -1, 0 +; CI-NEXT: s_cmp_eq_u32 s5, 13 +; CI-NEXT: v_lshrrev_b32_e32 v14, 16, v2 +; CI-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc +; CI-NEXT: s_cselect_b64 vcc, -1, 0 +; CI-NEXT: s_cmp_eq_u32 s5, 10 +; CI-NEXT: v_cndmask_b32_e32 v14, v14, v10, vcc +; CI-NEXT: s_cselect_b64 vcc, -1, 0 +; CI-NEXT: s_cmp_eq_u32 s5, 11 +; CI-NEXT: v_lshrrev_b32_e32 v15, 16, v1 +; CI-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; CI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; CI-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc +; CI-NEXT: s_cselect_b64 vcc, -1, 0 +; CI-NEXT: s_cmp_eq_u32 s5, 8 +; CI-NEXT: v_or_b32_e32 v2, v2, v14 +; CI-NEXT: v_cndmask_b32_e32 v14, v15, v10, vcc ; CI-NEXT: s_cselect_b64 vcc, -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 12 -; CI-NEXT: s_cselect_b64 s[0:1], -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 13 -; CI-NEXT: v_lshrrev_b32_e32 v14, 16, v9 -; CI-NEXT: v_cndmask_b32_e64 v9, v9, v6, s[0:1] -; CI-NEXT: s_cselect_b64 s[0:1], -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 10 -; CI-NEXT: s_cselect_b64 s[2:3], -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 11 -; CI-NEXT: v_lshrrev_b32_e32 v15, 16, v8 -; CI-NEXT: v_cndmask_b32_e64 v8, v8, v6, s[2:3] -; CI-NEXT: s_cselect_b64 s[2:3], -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 8 -; CI-NEXT: v_lshrrev_b32_e32 v10, 16, v10 -; CI-NEXT: s_cselect_b64 s[4:5], -1, 0 -; CI-NEXT: v_cndmask_b32_e64 v15, v15, v6, s[2:3] -; CI-NEXT: s_cmp_eq_u32 s7, 9 -; CI-NEXT: v_lshrrev_b32_e32 v16, 16, v7 -; CI-NEXT: v_cndmask_b32_e32 v10, v10, v6, vcc -; CI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; CI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 +; CI-NEXT: s_cmp_eq_u32 s5, 9 +; CI-NEXT: v_lshrrev_b32_e32 v16, 16, v0 +; CI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; CI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; CI-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc ; CI-NEXT: s_cselect_b64 vcc, -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 6 -; CI-NEXT: v_cndmask_b32_e64 v7, v7, v6, s[4:5] -; CI-NEXT: v_or_b32_e32 v8, v8, v15 -; CI-NEXT: v_cndmask_b32_e32 v15, v16, v6, vcc +; CI-NEXT: s_cmp_eq_u32 s5, 6 +; CI-NEXT: v_or_b32_e32 v1, v1, v14 +; CI-NEXT: v_cndmask_b32_e32 v14, v16, v10, vcc ; CI-NEXT: s_cselect_b64 vcc, -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 7 +; CI-NEXT: s_cmp_eq_u32 s5, 7 ; CI-NEXT: s_waitcnt vmcnt(0) -; CI-NEXT: v_lshrrev_b32_e32 v17, 16, v3 -; CI-NEXT: v_and_b32_e32 v13, 0xffff, v13 -; CI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 -; CI-NEXT: v_cndmask_b32_e64 v14, v14, v6, s[0:1] -; CI-NEXT: v_and_b32_e32 v7, 0xffff, v7 -; CI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; CI-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc +; CI-NEXT: v_lshrrev_b32_e32 v17, 16, v7 +; CI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; CI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; CI-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc ; CI-NEXT: s_cselect_b64 vcc, -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 4 -; CI-NEXT: v_and_b32_e32 v9, 0xffff, v9 -; CI-NEXT: v_or_b32_e32 v10, v13, v10 -; CI-NEXT: v_lshlrev_b32_e32 v13, 16, v14 -; CI-NEXT: v_or_b32_e32 v7, v7, v15 -; CI-NEXT: v_cndmask_b32_e32 v15, v17, v6, vcc +; CI-NEXT: s_cmp_eq_u32 s5, 4 +; CI-NEXT: v_or_b32_e32 v0, v0, v14 +; CI-NEXT: v_cndmask_b32_e32 v14, v17, v10, vcc ; CI-NEXT: s_cselect_b64 vcc, -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 5 -; CI-NEXT: v_or_b32_e32 v9, v9, v13 -; CI-NEXT: v_lshrrev_b32_e32 v13, 16, v2 -; CI-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc +; CI-NEXT: s_cmp_eq_u32 s5, 5 +; CI-NEXT: v_lshrrev_b32_e32 v18, 16, v6 +; CI-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; CI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; CI-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc ; CI-NEXT: s_cselect_b64 vcc, -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 2 -; CI-NEXT: v_cndmask_b32_e32 v13, v13, v6, vcc +; CI-NEXT: s_cmp_eq_u32 s5, 2 +; CI-NEXT: v_or_b32_e32 v7, v7, v14 +; CI-NEXT: v_cndmask_b32_e32 v14, v18, v10, vcc ; CI-NEXT: s_cselect_b64 vcc, -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 3 -; CI-NEXT: v_lshrrev_b32_e32 v14, 16, v1 -; CI-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc +; CI-NEXT: s_cmp_eq_u32 s5, 3 +; CI-NEXT: v_lshrrev_b32_e32 v19, 16, v5 +; CI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; CI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 +; CI-NEXT: v_cndmask_b32_e32 v5, v5, v10, vcc ; CI-NEXT: s_cselect_b64 vcc, -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 0 -; CI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; CI-NEXT: v_lshlrev_b32_e32 v13, 16, v13 -; CI-NEXT: v_cndmask_b32_e32 v14, v14, v6, vcc +; CI-NEXT: s_cmp_eq_u32 s5, 0 +; CI-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; CI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; CI-NEXT: v_or_b32_e32 v6, v6, v14 +; CI-NEXT: v_cndmask_b32_e32 v14, v19, v10, vcc ; CI-NEXT: s_cselect_b64 vcc, -1, 0 -; CI-NEXT: s_cmp_eq_u32 s7, 1 -; CI-NEXT: v_or_b32_e32 v2, v2, v13 -; CI-NEXT: v_lshrrev_b32_e32 v13, 16, v0 -; CI-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc +; CI-NEXT: s_cmp_eq_u32 s5, 1 +; CI-NEXT: v_or_b32_e32 v3, v13, v3 +; CI-NEXT: v_lshrrev_b32_e32 v13, 16, v4 +; CI-NEXT: v_cndmask_b32_e32 v4, v4, v10, vcc ; CI-NEXT: s_cselect_b64 vcc, -1, 0 -; CI-NEXT: v_cndmask_b32_e32 v6, v13, v6, vcc -; CI-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; CI-NEXT: v_lshlrev_b32_e32 v15, 16, v15 -; CI-NEXT: v_and_b32_e32 v1, 0xffff, v1 +; CI-NEXT: v_cndmask_b32_e32 v10, v13, v10, vcc +; CI-NEXT: v_and_b32_e32 v5, 0xffff, v5 ; CI-NEXT: v_lshlrev_b32_e32 v14, 16, v14 -; CI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; CI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; CI-NEXT: v_or_b32_e32 v3, v3, v15 -; CI-NEXT: v_or_b32_e32 v1, v1, v14 -; CI-NEXT: v_or_b32_e32 v0, v0, v6 -; CI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; CI-NEXT: flat_store_dwordx4 v[11:12], v[7:10] +; CI-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; CI-NEXT: v_lshlrev_b32_e32 v10, 16, v10 +; CI-NEXT: v_or_b32_e32 v5, v5, v14 +; CI-NEXT: v_or_b32_e32 v4, v4, v10 +; CI-NEXT: flat_store_dwordx4 v[8:9], v[4:7] +; CI-NEXT: flat_store_dwordx4 v[11:12], v[0:3] ; CI-NEXT: s_endpgm ; ; GFX11-TRUE16-LABEL: v_insertelement_v16f16_dynamic: diff --git a/llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll b/llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll index 9325595c882f2..b6c4e75d32fff 100644 --- a/llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll +++ b/llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll @@ -7217,46 +7217,46 @@ define <2 x i64> @clpeak_imad_pat_v2i64(<2 x i64> %x, <2 x i64> %y) { ; GFX7-GISEL-LABEL: clpeak_imad_pat_v2i64: ; GFX7-GISEL: ; %bb.0: ; %entry ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX7-GISEL-NEXT: v_add_i32_e32 v12, vcc, 1, v0 -; GFX7-GISEL-NEXT: v_addc_u32_e32 v13, vcc, 0, v1, vcc -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v12, v4, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v12, v5, v[1:2] -; GFX7-GISEL-NEXT: v_add_i32_e32 v1, vcc, v0, v12 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v13, v4, v[8:9] +; GFX7-GISEL-NEXT: v_add_i32_e32 v15, vcc, 1, v0 +; GFX7-GISEL-NEXT: v_addc_u32_e32 v16, vcc, 0, v1, vcc +; GFX7-GISEL-NEXT: v_add_i32_e32 v17, vcc, 1, v2 +; GFX7-GISEL-NEXT: v_addc_u32_e32 v18, vcc, 0, v3, vcc +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v15, v4, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v17, v6, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v15, v5, v[1:2] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v17, v7, v[3:4] +; GFX7-GISEL-NEXT: v_add_i32_e32 v1, vcc, v0, v15 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v16, v4, v[8:9] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v18, v6, v[10:11] ; GFX7-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v1, v4, 0 -; GFX7-GISEL-NEXT: v_addc_u32_e32 v15, vcc, v10, v13, vcc -; GFX7-GISEL-NEXT: v_add_i32_e32 v16, vcc, 1, v2 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v1, v5, v[9:10] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v16, v6, 0 -; GFX7-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v3, vcc -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v15, v4, v[11:12] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v16, v7, v[2:3] -; GFX7-GISEL-NEXT: v_add_i32_e32 v9, vcc, v1, v16 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v17, v6, v[3:4] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v9, v6, 0 -; GFX7-GISEL-NEXT: v_addc_u32_e32 v12, vcc, v11, v17, vcc -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v9, v7, v[3:4] -; GFX7-GISEL-NEXT: v_add_i32_e32 v3, vcc, 1, v1 -; GFX7-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v11, vcc -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v12, v6, v[4:5] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v2, v3, 0 -; GFX7-GISEL-NEXT: v_add_i32_e32 v11, vcc, 1, v0 -; GFX7-GISEL-NEXT: v_addc_u32_e32 v7, vcc, 0, v10, vcc -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v2, v1, v[5:6] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v8, v11, 0 -; GFX7-GISEL-NEXT: v_add_i32_e32 v15, vcc, 1, v2 -; GFX7-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v14, vcc -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v8, v7, v[6:7] -; GFX7-GISEL-NEXT: v_add_i32_e64 v16, s[4:5], 1, v8 -; GFX7-GISEL-NEXT: v_addc_u32_e64 v6, s[4:5], 0, v13, s[4:5] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v13, v11, v[0:1] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v5, v16, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v14, v3, v[9:10] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v4, v15, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v5, v6, v[1:2] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v4, v17, v[3:4] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v7, v16, v[8:9] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v11, v15, v[12:13] +; GFX7-GISEL-NEXT: v_addc_u32_e32 v3, vcc, v12, v16, vcc +; GFX7-GISEL-NEXT: v_add_i32_e32 v19, vcc, v2, v17 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v19, v6, 0 +; GFX7-GISEL-NEXT: v_addc_u32_e32 v20, vcc, v13, v18, vcc +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v1, v5, v[9:10] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v19, v7, v[11:12] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v3, v4, v[14:15] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v20, v6, v[16:17] +; GFX7-GISEL-NEXT: v_add_i32_e32 v17, vcc, 1, v0 +; GFX7-GISEL-NEXT: v_addc_u32_e32 v0, vcc, 0, v12, vcc +; GFX7-GISEL-NEXT: v_add_i32_e32 v19, vcc, 1, v2 +; GFX7-GISEL-NEXT: v_addc_u32_e32 v2, vcc, 0, v13, vcc +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v8, v17, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v10, v19, 0 +; GFX7-GISEL-NEXT: v_add_i32_e32 v20, vcc, 1, v8 +; GFX7-GISEL-NEXT: v_addc_u32_e32 v13, vcc, 0, v18, vcc +; GFX7-GISEL-NEXT: v_add_i32_e32 v21, vcc, 1, v10 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v8, v0, v[5:6] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v4, v20, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v10, v2, v[7:8] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v6, v21, 0 +; GFX7-GISEL-NEXT: v_addc_u32_e32 v22, vcc, 0, v14, vcc +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v18, v17, v[11:12] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v4, v13, v[1:2] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v14, v19, v[8:9] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v6, v22, v[3:4] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v15, v20, v[10:11] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v12, v21, v[7:8] ; GFX7-GISEL-NEXT: v_mov_b32_e32 v1, v5 ; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] ; @@ -7316,46 +7316,46 @@ define <2 x i64> @clpeak_imad_pat_v2i64(<2 x i64> %x, <2 x i64> %y) { ; GFX8-GISEL-LABEL: clpeak_imad_pat_v2i64: ; GFX8-GISEL: ; %bb.0: ; %entry ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX8-GISEL-NEXT: v_add_u32_e32 v12, vcc, 1, v0 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v13, vcc, 0, v1, vcc -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v12, v4, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v12, v5, v[1:2] -; GFX8-GISEL-NEXT: v_add_u32_e32 v1, vcc, v0, v12 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v13, v4, v[8:9] +; GFX8-GISEL-NEXT: v_add_u32_e32 v15, vcc, 1, v0 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v16, vcc, 0, v1, vcc +; GFX8-GISEL-NEXT: v_add_u32_e32 v17, vcc, 1, v2 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v18, vcc, 0, v3, vcc +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v15, v4, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v17, v6, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v15, v5, v[1:2] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v17, v7, v[3:4] +; GFX8-GISEL-NEXT: v_add_u32_e32 v1, vcc, v0, v15 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v16, v4, v[8:9] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v18, v6, v[10:11] ; GFX8-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v1, v4, 0 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v15, vcc, v10, v13, vcc -; GFX8-GISEL-NEXT: v_add_u32_e32 v16, vcc, 1, v2 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v1, v5, v[9:10] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v16, v6, 0 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v3, vcc -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v15, v4, v[11:12] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v16, v7, v[2:3] -; GFX8-GISEL-NEXT: v_add_u32_e32 v9, vcc, v1, v16 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v17, v6, v[3:4] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v9, v6, 0 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v12, vcc, v11, v17, vcc -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v9, v7, v[3:4] -; GFX8-GISEL-NEXT: v_add_u32_e32 v3, vcc, 1, v1 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v11, vcc -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v12, v6, v[4:5] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v2, v3, 0 -; GFX8-GISEL-NEXT: v_add_u32_e32 v11, vcc, 1, v0 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v7, vcc, 0, v10, vcc -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v2, v1, v[5:6] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v8, v11, 0 -; GFX8-GISEL-NEXT: v_add_u32_e32 v15, vcc, 1, v2 -; GFX8-GISEL-NEXT: v_addc_u32_e32 v17, vcc, 0, v14, vcc -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v8, v7, v[6:7] -; GFX8-GISEL-NEXT: v_add_u32_e64 v16, s[4:5], 1, v8 -; GFX8-GISEL-NEXT: v_addc_u32_e64 v6, s[4:5], 0, v13, s[4:5] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v13, v11, v[0:1] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v5, v16, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v14, v3, v[9:10] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v4, v15, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v5, v6, v[1:2] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v4, v17, v[3:4] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v7, v16, v[8:9] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v11, v15, v[12:13] +; GFX8-GISEL-NEXT: v_addc_u32_e32 v3, vcc, v12, v16, vcc +; GFX8-GISEL-NEXT: v_add_u32_e32 v19, vcc, v2, v17 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v19, v6, 0 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v20, vcc, v13, v18, vcc +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v1, v5, v[9:10] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v19, v7, v[11:12] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v3, v4, v[14:15] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v20, v6, v[16:17] +; GFX8-GISEL-NEXT: v_add_u32_e32 v17, vcc, 1, v0 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v0, vcc, 0, v12, vcc +; GFX8-GISEL-NEXT: v_add_u32_e32 v19, vcc, 1, v2 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v2, vcc, 0, v13, vcc +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v8, v17, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v10, v19, 0 +; GFX8-GISEL-NEXT: v_add_u32_e32 v20, vcc, 1, v8 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v13, vcc, 0, v18, vcc +; GFX8-GISEL-NEXT: v_add_u32_e32 v21, vcc, 1, v10 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v8, v0, v[5:6] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v4, v20, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v10, v2, v[7:8] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v6, v21, 0 +; GFX8-GISEL-NEXT: v_addc_u32_e32 v22, vcc, 0, v14, vcc +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v18, v17, v[11:12] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v4, v13, v[1:2] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v14, v19, v[8:9] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v6, v22, v[3:4] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v15, v20, v[10:11] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v12, v21, v[7:8] ; GFX8-GISEL-NEXT: v_mov_b32_e32 v1, v5 ; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31] ; @@ -7407,46 +7407,46 @@ define <2 x i64> @clpeak_imad_pat_v2i64(<2 x i64> %x, <2 x i64> %y) { ; GFX900-GISEL-LABEL: clpeak_imad_pat_v2i64: ; GFX900-GISEL: ; %bb.0: ; %entry ; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-GISEL-NEXT: v_add_co_u32_e32 v12, vcc, 1, v0 -; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v13, vcc, 0, v1, vcc -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v12, v4, 0 -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v12, v5, v[1:2] -; GFX900-GISEL-NEXT: v_add_co_u32_e32 v1, vcc, v0, v12 -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v13, v4, v[8:9] +; GFX900-GISEL-NEXT: v_add_co_u32_e32 v15, vcc, 1, v0 +; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v16, vcc, 0, v1, vcc +; GFX900-GISEL-NEXT: v_add_co_u32_e32 v17, vcc, 1, v2 +; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v18, vcc, 0, v3, vcc +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v15, v4, 0 +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v17, v6, 0 +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v15, v5, v[1:2] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v17, v7, v[3:4] +; GFX900-GISEL-NEXT: v_add_co_u32_e32 v1, vcc, v0, v15 +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v16, v4, v[8:9] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v18, v6, v[10:11] ; GFX900-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v1, v4, 0 -; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v15, vcc, v10, v13, vcc -; GFX900-GISEL-NEXT: v_add_co_u32_e32 v16, vcc, 1, v2 -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v1, v5, v[9:10] -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v16, v6, 0 -; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v17, vcc, 0, v3, vcc -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v15, v4, v[11:12] -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v16, v7, v[2:3] -; GFX900-GISEL-NEXT: v_add_co_u32_e32 v9, vcc, v1, v16 -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v17, v6, v[3:4] -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v9, v6, 0 -; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v12, vcc, v11, v17, vcc -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v9, v7, v[3:4] -; GFX900-GISEL-NEXT: v_add_co_u32_e32 v3, vcc, 1, v1 -; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v11, vcc -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v12, v6, v[4:5] -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v2, v3, 0 -; GFX900-GISEL-NEXT: v_add_co_u32_e32 v11, vcc, 1, v0 -; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v10, vcc -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v2, v1, v[5:6] -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v8, v11, 0 -; GFX900-GISEL-NEXT: v_add_co_u32_e32 v15, vcc, 1, v2 -; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v17, vcc, 0, v14, vcc -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v8, v7, v[6:7] -; GFX900-GISEL-NEXT: v_add_co_u32_e64 v16, s[4:5], 1, v8 -; GFX900-GISEL-NEXT: v_addc_co_u32_e64 v6, s[4:5], 0, v13, s[4:5] -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v13, v11, v[0:1] -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v5, v16, 0 -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v14, v3, v[9:10] -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v4, v15, 0 -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v5, v6, v[1:2] -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v4, v17, v[3:4] -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v7, v16, v[8:9] -; GFX900-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v11, v15, v[12:13] +; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v3, vcc, v12, v16, vcc +; GFX900-GISEL-NEXT: v_add_co_u32_e32 v19, vcc, v2, v17 +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v19, v6, 0 +; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v20, vcc, v13, v18, vcc +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v1, v5, v[9:10] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v19, v7, v[11:12] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v3, v4, v[14:15] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v20, v6, v[16:17] +; GFX900-GISEL-NEXT: v_add_co_u32_e32 v17, vcc, 1, v0 +; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v12, vcc +; GFX900-GISEL-NEXT: v_add_co_u32_e32 v19, vcc, 1, v2 +; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v2, vcc, 0, v13, vcc +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v8, v17, 0 +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v10, v19, 0 +; GFX900-GISEL-NEXT: v_add_co_u32_e32 v20, vcc, 1, v8 +; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v13, vcc, 0, v18, vcc +; GFX900-GISEL-NEXT: v_add_co_u32_e32 v21, vcc, 1, v10 +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v8, v0, v[5:6] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v4, v20, 0 +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v10, v2, v[7:8] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v6, v21, 0 +; GFX900-GISEL-NEXT: v_addc_co_u32_e32 v22, vcc, 0, v14, vcc +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v18, v17, v[11:12] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v4, v13, v[1:2] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v14, v19, v[8:9] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v6, v22, v[3:4] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v15, v20, v[10:11] +; GFX900-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v12, v21, v[7:8] ; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, v5 ; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31] ; diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir index da92da4de0834..a544a39934f2d 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir @@ -6,101 +6,100 @@ define amdgpu_kernel void @largeInterleave() #0 { ret void } ; GCN-LABEL: largeInterleave: ; GCN: ; %bb.0: - ; GCN-NEXT: ; implicit-def: $vgpr16 - ; GCN-NEXT: ; implicit-def: $vgpr25 - ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) - ; GCN-NEXT: v_readfirstlane_b32 s17, v16 ; GCN-NEXT: ; implicit-def: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 - ; GCN-NEXT: ; implicit-def: $vgpr17 - ; GCN-NEXT: ; implicit-def: $sgpr15 + ; GCN-NEXT: ; implicit-def: $vgpr0 + ; GCN-NEXT: ; implicit-def: $vgpr3 + ; GCN-NEXT: ; implicit-def: $vgpr1 + ; GCN-NEXT: ; implicit-def: $vgpr2 + ; GCN-NEXT: ; implicit-def: $vgpr187 + ; GCN-NEXT: ; implicit-def: $vgpr152_vgpr153_vgpr154_vgpr155 + ; GCN-NEXT: ; implicit-def: $vgpr74 + ; GCN-NEXT: ; implicit-def: $vgpr75 + ; GCN-NEXT: ; implicit-def: $vgpr76 + ; GCN-NEXT: ; implicit-def: $vgpr77 + ; GCN-NEXT: ; implicit-def: $vgpr72 + ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) + ; GCN-NEXT: v_add_u32_e32 v182, v72, v77 + ; GCN-NEXT: v_readfirstlane_b32 s7, v0 + ; GCN-NEXT: ; implicit-def: $sgpr5 ; GCN-NEXT: ; implicit-def: $sgpr8_sgpr9_sgpr10_sgpr11 - ; GCN-NEXT: s_lshl_b32 s18, s17, 7 - ; GCN-NEXT: ; implicit-def: $vgpr18 - ; GCN-NEXT: v_add_lshl_u32 v230, v18, s18, 1 - ; GCN-NEXT: v_lshl_add_u32 v25, s17, 4, v25 - ; GCN-NEXT: v_mul_lo_u32 v25, v25, s6 - ; GCN-NEXT: v_add_lshl_u32 v226, v25, v17, 1 - ; GCN-NEXT: v_add_u32_e32 v17, s15, v226 - ; GCN-NEXT: buffer_load_dwordx4 v[64:67], v226, s[8:11], 0 offen sc0 sc1 + ; GCN-NEXT: v_add_u32_e32 v183, v72, v74 + ; GCN-NEXT: v_add_u32_e32 v184, v72, v75 + ; GCN-NEXT: v_lshl_add_u32 v0, s7, 4, v3 + ; GCN-NEXT: v_mul_lo_u32 v0, v0, s6 + ; GCN-NEXT: v_add_lshl_u32 v168, v0, v1, 1 + ; GCN-NEXT: v_add_u32_e32 v0, s5, v168 + ; GCN-NEXT: buffer_load_dwordx4 v[64:67], v168, s[8:11], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx4 v[68:71], v17, s[8:11], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx4 v[68:71], v0, s[8:11], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_add_u32_e32 v72, 64, v17 - ; GCN-NEXT: ; implicit-def: $vgpr213 - ; GCN-NEXT: ; implicit-def: $vgpr152_vgpr153_vgpr154_vgpr155 - ; GCN-NEXT: ; implicit-def: $vgpr246 - ; GCN-NEXT: v_add_u32_e32 v188, 0x80, v17 - ; GCN-NEXT: ; implicit-def: $vgpr156_vgpr157_vgpr158_vgpr159 - ; GCN-NEXT: ; implicit-def: $vgpr144_vgpr145_vgpr146_vgpr147 - ; GCN-NEXT: ; implicit-def: $vgpr19 - ; GCN-NEXT: ; implicit-def: $vgpr26 - ; GCN-NEXT: ; implicit-def: $vgpr27 - ; GCN-NEXT: v_add_u32_e32 v227, 0xc0, v17 - ; GCN-NEXT: v_add_u32_e32 v231, v19, v26 - ; GCN-NEXT: v_add_u32_e32 v232, v19, v27 - ; GCN-NEXT: ; implicit-def: $sgpr0_sgpr1_sgpr2_sgpr3 - ; GCN-NEXT: ; implicit-def: $vgpr28 - ; GCN-NEXT: ; implicit-def: $vgpr29 - ; GCN-NEXT: v_add_u32_e32 v233, v19, v28 - ; GCN-NEXT: v_add_u32_e32 v234, v19, v29 - ; GCN-NEXT: ; implicit-def: $vgpr140_vgpr141_vgpr142_vgpr143 + ; GCN-NEXT: s_lshl_b32 s5, s7, 7 + ; GCN-NEXT: v_add_lshl_u32 v230, v2, s5, 1 + ; GCN-NEXT: v_add_u32_e32 v73, 64, v0 + ; GCN-NEXT: v_add_u32_e32 v169, 0x80, v0 + ; GCN-NEXT: v_add_u32_e32 v224, 0xc0, v0 + ; GCN-NEXT: ; implicit-def: $vgpr0 ; GCN-NEXT: ; implicit-def: $sgpr5 - ; GCN-NEXT: ; implicit-def: $sgpr7 + ; GCN-NEXT: ; implicit-def: $vgpr1 + ; GCN-NEXT: v_add_u32_e32 v181, v72, v76 + ; GCN-NEXT: v_add_u32_e32 v0, s7, v0 + ; GCN-NEXT: v_and_b32_e32 v0, 0x1fffffff, v0 + ; GCN-NEXT: v_mul_lo_u32 v0, v0, s5 + ; GCN-NEXT: v_add_lshl_u32 v175, v1, v0, 1 + ; GCN-NEXT: ; implicit-def: $vgpr0 + ; GCN-NEXT: v_lshl_add_u32 v173, v0, 1, v175 + ; GCN-NEXT: ; implicit-def: $vgpr0 + ; GCN-NEXT: v_lshl_add_u32 v174, v0, 1, v173 + ; GCN-NEXT: ; implicit-def: $vgpr0 + ; GCN-NEXT: ; implicit-def: $vgpr74 + ; GCN-NEXT: ; implicit-def: $vgpr75 + ; GCN-NEXT: ; implicit-def: $vgpr76 + ; GCN-NEXT: ; implicit-def: $vgpr77 + ; GCN-NEXT: ; implicit-def: $vgpr4 + ; GCN-NEXT: ; implicit-def: $vgpr5 + ; GCN-NEXT: ; implicit-def: $vgpr6 + ; GCN-NEXT: ; implicit-def: $vgpr7 + ; GCN-NEXT: v_add_u32_e32 v225, v72, v4 + ; GCN-NEXT: v_add_u32_e32 v226, v72, v5 + ; GCN-NEXT: v_add_u32_e32 v227, v72, v6 + ; GCN-NEXT: v_add_u32_e32 v228, v72, v7 + ; GCN-NEXT: v_lshl_add_u32 v176, v0, 1, v174 + ; GCN-NEXT: ; implicit-def: $vgpr0 + ; GCN-NEXT: ; implicit-def: $vgpr1 + ; GCN-NEXT: ; implicit-def: $vgpr2 + ; GCN-NEXT: ; implicit-def: $vgpr3 + ; GCN-NEXT: v_add_u32_e32 v239, v72, v3 + ; GCN-NEXT: v_add_u32_e32 v240, v72, v0 + ; GCN-NEXT: v_add_u32_e32 v241, v72, v1 + ; GCN-NEXT: v_add_u32_e32 v242, v72, v2 + ; GCN-NEXT: v_add_u32_e32 v178, v72, v77 + ; GCN-NEXT: v_add_u32_e32 v179, v72, v74 + ; GCN-NEXT: v_add_u32_e32 v180, v72, v75 + ; GCN-NEXT: v_add_u32_e32 v177, v72, v76 + ; GCN-NEXT: ; implicit-def: $vgpr238 + ; GCN-NEXT: ; implicit-def: $vgpr156_vgpr157_vgpr158_vgpr159 ; GCN-NEXT: ; implicit-def: $vgpr148_vgpr149_vgpr150_vgpr151 + ; GCN-NEXT: ; implicit-def: $sgpr0_sgpr1_sgpr2_sgpr3 + ; GCN-NEXT: ; implicit-def: $vgpr144_vgpr145_vgpr146_vgpr147 ; GCN-NEXT: ; implicit-def: $vgpr136_vgpr137_vgpr138_vgpr139 ; GCN-NEXT: ; implicit-def: $vgpr132_vgpr133_vgpr134_vgpr135 - ; GCN-NEXT: ; implicit-def: $vgpr20 - ; GCN-NEXT: v_add_u32_e32 v18, s17, v20 - ; GCN-NEXT: v_and_b32_e32 v18, 0x1fffffff, v18 - ; GCN-NEXT: ; implicit-def: $sgpr16 - ; GCN-NEXT: v_mul_lo_u32 v18, v18, s16 - ; GCN-NEXT: ; implicit-def: $vgpr21 - ; GCN-NEXT: v_add_lshl_u32 v199, v21, v18, 1 - ; GCN-NEXT: ; implicit-def: $vgpr22 - ; GCN-NEXT: v_lshl_add_u32 v200, v22, 1, v199 - ; GCN-NEXT: ; implicit-def: $vgpr23 - ; GCN-NEXT: v_lshl_add_u32 v201, v23, 1, v200 - ; GCN-NEXT: ; implicit-def: $vgpr24 - ; GCN-NEXT: v_lshl_add_u32 v202, v24, 1, v201 - ; GCN-NEXT: ; implicit-def: $vgpr16 - ; GCN-NEXT: ; implicit-def: $vgpr18 - ; GCN-NEXT: ; implicit-def: $vgpr20 - ; GCN-NEXT: ; implicit-def: $vgpr24 - ; GCN-NEXT: v_add_u32_e32 v247, v19, v24 - ; GCN-NEXT: v_add_u32_e32 v248, v19, v16 - ; GCN-NEXT: v_add_u32_e32 v249, v19, v18 - ; GCN-NEXT: v_add_u32_e32 v250, v19, v20 + ; GCN-NEXT: ; implicit-def: $sgpr12 + ; GCN-NEXT: ; implicit-def: $sgpr5 + ; GCN-NEXT: ; implicit-def: $vgpr140_vgpr141_vgpr142_vgpr143 ; GCN-NEXT: ; implicit-def: $vgpr128_vgpr129_vgpr130_vgpr131 - ; GCN-NEXT: ; implicit-def: $sgpr14 - ; GCN-NEXT: ; implicit-def: $vgpr196 - ; GCN-NEXT: ; implicit-def: $sgpr12_sgpr13 - ; GCN-NEXT: ; implicit-def: $vgpr211 - ; GCN-NEXT: v_max_f32_e32 v212, v211, v211 - ; GCN-NEXT: ; implicit-def: $vgpr198 - ; GCN-NEXT: ; implicit-def: $vgpr32 - ; GCN-NEXT: ; implicit-def: $vgpr33 - ; GCN-NEXT: ; implicit-def: $vgpr34 - ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 - ; GCN-NEXT: v_add_u32_e32 v210, v19, v34 - ; GCN-NEXT: v_add_u32_e32 v206, v19, v33 - ; GCN-NEXT: v_add_u32_e32 v205, v19, v32 + ; GCN-NEXT: ; implicit-def: $sgpr13 + ; GCN-NEXT: ; implicit-def: $vgpr170 + ; GCN-NEXT: ; implicit-def: $sgpr6_sgpr7 + ; GCN-NEXT: ; implicit-def: $vgpr185 + ; GCN-NEXT: v_max_f32_e32 v186, v185, v185 + ; GCN-NEXT: ; implicit-def: $vgpr172 ; GCN-NEXT: ; implicit-def: $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47 - ; GCN-NEXT: ; implicit-def: $vgpr21 - ; GCN-NEXT: ; implicit-def: $vgpr22 - ; GCN-NEXT: ; implicit-def: $vgpr23 - ; GCN-NEXT: ; implicit-def: $vgpr30 - ; GCN-NEXT: ; implicit-def: $vgpr31 - ; GCN-NEXT: v_add_u32_e32 v207, v19, v21 - ; GCN-NEXT: v_add_u32_e32 v208, v19, v22 - ; GCN-NEXT: v_add_u32_e32 v209, v19, v23 - ; GCN-NEXT: v_add_u32_e32 v203, v19, v30 - ; GCN-NEXT: v_add_u32_e32 v204, v19, v31 - ; GCN-NEXT: ; kill: killed $vgpr17 ; GCN-NEXT: ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 + ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GCN-NEXT: ; implicit-def: $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63 - ; GCN-NEXT: ; implicit-def: $vgpr197 + ; GCN-NEXT: ; implicit-def: $vgpr171 ; GCN-NEXT: ; iglp_opt mask(0x00000002) ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) @@ -109,41 +108,41 @@ ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN-NEXT: ds_write_b128 v230, v[68:71] offset:1024 ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_load_dwordx4 v[160:163], v226, s[8:11], 0 offen offset:64 sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx4 v[160:163], v168, s[8:11], 0 offen offset:64 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx4 v[164:167], v72, s[8:11], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx4 v[164:167], v73, s[8:11], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: ds_read_b128 v[64:67], v213 + ; GCN-NEXT: ds_read_b128 v[64:67], v187 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[64:65], v[152:153], 0 ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[66:67], v[154:155], v[112:127] - ; GCN-NEXT: ds_read_b128 v[64:67], v213 offset:512 + ; GCN-NEXT: ds_read_b128 v[64:67], v187 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[64:65], v[152:153], 0 ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[66:67], v[154:155], v[96:111] - ; GCN-NEXT: ds_read_b128 v[64:67], v213 offset:1024 + ; GCN-NEXT: ds_read_b128 v[64:67], v187 offset:1024 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[168:171], v213 offset:1536 + ; GCN-NEXT: ds_read_b128 v[188:191], v187 offset:1536 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[172:175], v246 + ; GCN-NEXT: ds_read_b128 v[192:195], v238 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[176:179], v246 offset:512 + ; GCN-NEXT: ds_read_b128 v[196:199], v238 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[180:183], v246 offset:1024 + ; GCN-NEXT: ds_read_b128 v[200:203], v238 offset:1024 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[184:187], v246 offset:1536 + ; GCN-NEXT: ds_read_b128 v[204:207], v238 offset:1536 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ;;#ASMSTART @@ -157,44 +156,44 @@ ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN-NEXT: ds_write_b128 v230, v[164:167] offset:1024 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[168:169], v[152:153], 0 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[170:171], v[154:155], v[64:79] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[188:189], v[152:153], 0 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[190:191], v[154:155], v[64:79] ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_load_dwordx4 v[152:155], v226, s[8:11], 0 offen offset:128 sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx4 v[152:155], v168, s[8:11], 0 offen offset:128 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx4 v[160:163], v188, s[8:11], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx4 v[160:163], v169, s[8:11], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: ds_read_b128 v[188:191], v213 + ; GCN-NEXT: ds_read_b128 v[164:167], v187 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[192:195], v213 offset:512 + ; GCN-NEXT: ds_read_b128 v[188:191], v187 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[164:167], v213 offset:1024 + ; GCN-NEXT: ds_read_b128 v[208:211], v187 offset:1024 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[214:217], v213 offset:1536 + ; GCN-NEXT: ds_read_b128 v[212:215], v187 offset:1536 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[172:173], v[156:157], v[112:127] - ; GCN-NEXT: ds_read_b128 v[218:221], v246 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[192:193], v[156:157], v[112:127] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[194:195], v[158:159], v[112:127] + ; GCN-NEXT: ds_read_b128 v[192:195], v238 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[222:225], v246 offset:512 + ; GCN-NEXT: ds_read_b128 v[216:219], v238 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[168:171], v246 offset:1024 + ; GCN-NEXT: ds_read_b128 v[220:223], v238 offset:1024 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[174:175], v[158:159], v[112:127] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[188:189], v[144:145], v[112:127] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[190:191], v[146:147], v[112:127] - ; GCN-NEXT: ds_read_b128 v[188:191], v246 offset:1536 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[164:165], v[148:149], v[112:127] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[166:167], v[150:151], v[112:127] + ; GCN-NEXT: ds_read_b128 v[164:167], v238 offset:1536 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ;;#ASMSTART @@ -207,76 +206,78 @@ ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN-NEXT: ds_write_b128 v230, v[160:163] offset:1024 ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_load_dwordx4 v[152:155], v226, s[8:11], 0 offen offset:192 sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx4 v[152:155], v168, s[8:11], 0 offen offset:192 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[184:185], v[156:157], v[64:79] - ; GCN-NEXT: buffer_load_dwordx4 v[226:229], v227, s[8:11], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx4 v[160:163], v224, s[8:11], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx2 v[160:161], v231, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[200:201], v[156:157], v[80:95] + ; GCN-NEXT: buffer_load_dwordx2 v[168:169], v225, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx2 v[162:163], v232, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[224:225], v226, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx2 v[172:173], v233, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: v_perm_b32 v232, v224, v168, s12 + ; GCN-NEXT: buffer_load_dwordx2 v[226:227], v227, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx2 v[174:175], v234, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[202:203], v[158:159], v[80:95] + ; GCN-NEXT: buffer_load_dwordx2 v[228:229], v228, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[186:187], v[158:159], v[64:79] - ; GCN-NEXT: v_perm_b32 v238, v162, v160, s5 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[218:219], v[140:141], v[112:127] - ; GCN-NEXT: v_perm_b32 v240, v162, v160, s7 - ; GCN-NEXT: v_perm_b32 v242, v163, v161, s5 - ; GCN-NEXT: v_perm_b32 v244, v163, v161, s7 - ; GCN-NEXT: ds_read_b128 v[160:163], v213 + ; GCN-NEXT: v_perm_b32 v234, v224, v168, s5 + ; GCN-NEXT: v_perm_b32 v236, v225, v169, s12 + ; GCN-NEXT: v_perm_b32 v168, v225, v169, s5 + ; GCN-NEXT: v_perm_b32 v233, v228, v226, s12 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[208:209], v[148:149], v[80:95] + ; GCN-NEXT: v_perm_b32 v235, v228, v226, s5 + ; GCN-NEXT: v_perm_b32 v237, v229, v227, s12 + ; GCN-NEXT: v_perm_b32 v169, v229, v227, s5 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[196:197], v[156:157], v[96:111] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[210:211], v[150:151], v[80:95] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[198:199], v[158:159], v[96:111] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[192:193], v[144:145], v[112:127] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[220:221], v[144:145], v[80:95] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[204:205], v[156:157], v[64:79] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[188:189], v[148:149], v[96:111] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[194:195], v[146:147], v[112:127] + ; GCN-NEXT: ds_read_b128 v[192:195], v187 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_perm_b32 v239, v174, v172, s5 - ; GCN-NEXT: v_perm_b32 v241, v174, v172, s7 - ; GCN-NEXT: v_perm_b32 v243, v175, v173, s5 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[214:215], v[144:145], v[64:79] - ; GCN-NEXT: v_perm_b32 v245, v175, v173, s7 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[176:177], v[156:157], v[96:111] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[220:221], v[142:143], v[112:127] - ; GCN-NEXT: ds_read_b128 v[218:221], v213 offset:512 + ; GCN-NEXT: ds_read_b128 v[200:203], v187 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[172:175], v213 offset:1024 + ; GCN-NEXT: ds_read_b128 v[208:211], v187 offset:1024 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[216:217], v[146:147], v[64:79] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[178:179], v[158:159], v[96:111] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[160:161], v[148:149], v[112:127] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[188:189], v[140:141], v[64:79] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[192:193], v[144:145], v[96:111] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[162:163], v[150:151], v[112:127] - ; GCN-NEXT: ds_read_b128 v[160:163], v213 offset:1536 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[222:223], v[146:147], v[80:95] + ; GCN-NEXT: ds_read_b128 v[220:223], v187 offset:1536 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[184:187], v246 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[206:207], v[158:159], v[64:79] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[190:191], v[150:151], v[96:111] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[208:209], v[136:137], v[80:95] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[192:193], v[136:137], v[112:127] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[212:213], v[148:149], v[64:79] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[216:217], v[144:145], v[96:111] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[210:211], v[138:139], v[80:95] + ; GCN-NEXT: ds_read_b128 v[208:211], v238 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[214:217], v246 offset:512 + ; GCN-NEXT: ds_read_b128 v[204:207], v238 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[176:179], v246 offset:1024 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[194:195], v[138:139], v[112:127] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[214:215], v[150:151], v[64:79] + ; GCN-NEXT: ds_read_b128 v[212:215], v238 offset:1024 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[190:191], v[142:143], v[64:79] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[194:195], v[146:147], v[96:111] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[160:161], v[148:149], v[64:79] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[180:181], v[156:157], v[80:95] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[184:185], v[136:137], v[112:127] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[222:223], v[140:141], v[96:111] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[162:163], v[150:151], v[64:79] - ; GCN-NEXT: ds_read_b128 v[160:163], v246 offset:1536 + ; GCN-NEXT: ds_read_b128 v[224:227], v238 offset:1536 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ;;#ASMSTART @@ -287,184 +288,182 @@ ; GCN-NEXT: ds_write_b128 v230, v[152:155] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b128 v230, v[226:229] offset:1024 + ; GCN-NEXT: ds_write_b128 v230, v[160:163] offset:1024 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[182:183], v[158:159], v[80:95] - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: ds_read_b128 v[156:159], v213 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[226:229], v213 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[180:183], v213 offset:1024 + ; GCN-NEXT: ds_read_b128 v[152:155], v187 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[152:155], v213 offset:1536 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[218:219], v[146:147], v[96:111] + ; GCN-NEXT: ds_read_b128 v[228:231], v187 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[230:233], v246 + ; GCN-NEXT: ds_read_b128 v[160:163], v187 offset:1024 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[234:237], v246 offset:512 + ; GCN-NEXT: ds_read_b128 v[192:195], v187 offset:1536 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[186:187], v[138:139], v[112:127] - ; GCN-NEXT: ds_read_b128 v[184:187], v246 offset:1024 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[208:209], v[132:133], v[112:127] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[164:165], v[144:145], v[64:79] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[200:201], v[136:137], v[96:111] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[210:211], v[134:135], v[112:127] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[166:167], v[146:147], v[64:79] + ; GCN-NEXT: ds_read_b128 v[164:167], v238 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[224:225], v[142:143], v[96:111] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[156:157], v[132:133], v[112:127] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[218:219], v[148:149], v[96:111] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[158:159], v[134:135], v[112:127] - ; GCN-NEXT: ds_read_b128 v[156:159], v246 offset:1536 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[202:203], v[138:139], v[96:111] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[152:153], v[140:141], v[112:127] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[220:221], v[136:137], v[64:79] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[204:205], v[132:133], v[96:111] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[154:155], v[142:143], v[112:127] + ; GCN-NEXT: ds_read_b128 v[152:155], v238 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[212:213], v[132:133], v[80:95] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[206:207], v[134:135], v[96:111] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[222:223], v[138:139], v[64:79] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[164:165], v[128:129], v[112:127] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[214:215], v[134:135], v[80:95] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[224:225], v[132:133], v[64:79] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[228:229], v[140:141], v[96:111] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[166:167], v[130:131], v[112:127] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[160:161], v[140:141], v[80:95] + ; GCN-NEXT: s_nop 9 + ; GCN-NEXT: v_mul_f32_e32 v164, s4, v112 + ; GCN-NEXT: v_mul_f32_e32 v165, s4, v113 + ; GCN-NEXT: v_max3_f32 v164, v164, s13, v165 + ; GCN-NEXT: v_mul_f32_e32 v165, s4, v114 + ; GCN-NEXT: v_mul_f32_e32 v166, s4, v115 + ; GCN-NEXT: v_max3_f32 v164, v164, v165, v166 + ; GCN-NEXT: v_mul_f32_e32 v165, s4, v116 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[226:227], v[134:135], v[64:79] + ; GCN-NEXT: v_mul_f32_e32 v166, s4, v117 + ; GCN-NEXT: v_max3_f32 v187, v164, v165, v166 + ; GCN-NEXT: ds_read_b128 v[164:167], v238 offset:1024 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_mul_f32_e32 v208, s4, v118 + ; GCN-NEXT: v_mul_f32_e32 v160, s4, v119 + ; GCN-NEXT: v_max3_f32 v160, v187, v208, v160 + ; GCN-NEXT: v_mul_f32_e32 v161, s4, v120 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[230:231], v[142:143], v[96:111] + ; GCN-NEXT: v_mul_f32_e32 v187, s4, v121 + ; GCN-NEXT: v_max3_f32 v160, v160, v161, v187 + ; GCN-NEXT: v_mul_f32_e32 v161, s4, v122 + ; GCN-NEXT: v_mul_f32_e32 v187, s4, v123 + ; GCN-NEXT: v_max3_f32 v187, v160, v161, v187 + ; GCN-NEXT: v_mul_f32_e32 v208, s4, v124 + ; GCN-NEXT: v_mul_f32_e32 v209, s4, v125 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[162:163], v[142:143], v[80:95] + ; GCN-NEXT: ds_read_b128 v[160:163], v238 offset:1536 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_max3_f32 v187, v187, v208, v209 + ; GCN-NEXT: v_mul_f32_e32 v208, s4, v126 + ; GCN-NEXT: v_mul_f32_e32 v209, s4, v127 + ; GCN-NEXT: v_max3_f32 v187, v187, v208, v209 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) - ; GCN-NEXT: ds_write_b64 v199, v[238:239] + ; GCN-NEXT: ds_write_b64 v175, v[232:233] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[192:193], v[140:141], v[64:79] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v200, v[240:241] + ; GCN-NEXT: ds_write_b64 v173, v[234:235] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v201, v[242:243] + ; GCN-NEXT: ds_write_b64 v174, v[236:237] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v202, v[244:245] + ; GCN-NEXT: ds_write_b64 v176, v[168:169] ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_load_dwordx2 v[192:193], v247, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[196:197], v239, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[220:221], v[150:151], v[96:111] - ; GCN-NEXT: buffer_load_dwordx2 v[194:195], v248, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[158:159], v240, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx2 v[218:219], v249, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[198:199], v241, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx2 v[220:221], v250, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[208:209], v242, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[152:153], v[128:129], v[96:111] ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: v_perm_b32 v188, v194, v192, s5 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[164:165], v[144:145], v[80:95] - ; GCN-NEXT: v_perm_b32 v189, v220, v218, s5 - ; GCN-NEXT: v_perm_b32 v191, v220, v218, s7 - ; GCN-NEXT: v_perm_b32 v190, v194, v192, s7 - ; GCN-NEXT: v_perm_b32 v192, v195, v193, s5 - ; GCN-NEXT: v_perm_b32 v194, v195, v193, s7 - ; GCN-NEXT: v_perm_b32 v193, v221, v219, s5 - ; GCN-NEXT: v_perm_b32 v195, v221, v219, s7 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[166:167], v[146:147], v[80:95] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[168:169], v[140:141], v[80:95] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[170:171], v[142:143], v[80:95] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[172:173], v[148:149], v[80:95] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[214:215], v[136:137], v[96:111] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[174:175], v[150:151], v[80:95] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[216:217], v[138:139], v[96:111] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[176:177], v[136:137], v[80:95] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[226:227], v[132:133], v[96:111] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[178:179], v[138:139], v[80:95] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[160:161], v[136:137], v[64:79] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[230:231], v[128:129], v[112:127] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[228:229], v[134:135], v[96:111] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[180:181], v[132:133], v[80:95] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[162:163], v[138:139], v[64:79] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[112:127], v[232:233], v[130:131], v[112:127] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[234:235], v[128:129], v[96:111] + ; GCN-NEXT: v_perm_b32 v168, v158, v196, s12 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[194:195], v[142:143], v[64:79] + ; GCN-NEXT: v_perm_b32 v169, v208, v198, s12 + ; GCN-NEXT: v_perm_b32 v148, v158, v196, s5 + ; GCN-NEXT: v_perm_b32 v149, v208, v198, s5 + ; GCN-NEXT: v_perm_b32 v156, v159, v197, s12 + ; GCN-NEXT: v_perm_b32 v157, v209, v199, s12 + ; GCN-NEXT: v_perm_b32 v158, v159, v197, s5 + ; GCN-NEXT: v_perm_b32 v159, v209, v199, s5 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[164:165], v[128:129], v[80:95] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[154:155], v[130:131], v[96:111] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[160:161], v[128:129], v[64:79] ; GCN-NEXT: s_nop 9 - ; GCN-NEXT: v_mul_f32_e32 v213, s4, v112 - ; GCN-NEXT: v_mul_f32_e32 v218, s4, v113 - ; GCN-NEXT: v_max3_f32 v213, v213, s14, v218 - ; GCN-NEXT: v_mul_f32_e32 v218, s4, v114 - ; GCN-NEXT: v_mul_f32_e32 v219, s4, v115 - ; GCN-NEXT: v_max3_f32 v213, v213, v218, v219 - ; GCN-NEXT: v_mul_f32_e32 v218, s4, v116 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[182:183], v[134:135], v[80:95] - ; GCN-NEXT: v_mul_f32_e32 v219, s4, v117 - ; GCN-NEXT: v_max3_f32 v213, v213, v218, v219 - ; GCN-NEXT: v_mul_f32_e32 v218, s4, v118 - ; GCN-NEXT: v_mul_f32_e32 v219, s4, v119 - ; GCN-NEXT: v_max3_f32 v213, v213, v218, v219 - ; GCN-NEXT: v_mul_f32_e32 v218, s4, v120 - ; GCN-NEXT: v_mul_f32_e32 v219, s4, v121 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[152:153], v[132:133], v[64:79] - ; GCN-NEXT: v_max3_f32 v213, v213, v218, v219 - ; GCN-NEXT: v_mul_f32_e32 v218, s4, v122 - ; GCN-NEXT: v_mul_f32_e32 v219, s4, v123 - ; GCN-NEXT: v_max3_f32 v213, v213, v218, v219 - ; GCN-NEXT: v_mul_f32_e32 v218, s4, v124 - ; GCN-NEXT: v_mul_f32_e32 v219, s4, v125 - ; GCN-NEXT: v_max3_f32 v213, v213, v218, v219 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[96:111], v[236:237], v[130:131], v[96:111] - ; GCN-NEXT: v_mul_f32_e32 v218, s4, v126 - ; GCN-NEXT: v_mul_f32_e32 v219, s4, v127 - ; GCN-NEXT: v_max3_f32 v213, v213, v218, v219 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[184:185], v[128:129], v[80:95] - ; GCN-NEXT: s_nop 6 - ; GCN-NEXT: v_mul_f32_e32 v214, s4, v96 - ; GCN-NEXT: v_mul_f32_e32 v215, s4, v97 - ; GCN-NEXT: v_max3_f32 v213, v213, v214, v215 - ; GCN-NEXT: v_mul_f32_e32 v214, s4, v98 - ; GCN-NEXT: v_mul_f32_e32 v215, s4, v99 - ; GCN-NEXT: v_max3_f32 v213, v213, v214, v215 - ; GCN-NEXT: v_mul_f32_e32 v214, s4, v100 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[154:155], v[134:135], v[64:79] - ; GCN-NEXT: v_mul_f32_e32 v215, s4, v101 - ; GCN-NEXT: v_max3_f32 v213, v213, v214, v215 - ; GCN-NEXT: v_mul_f32_e32 v214, s4, v102 - ; GCN-NEXT: v_mul_f32_e32 v215, s4, v103 - ; GCN-NEXT: v_max3_f32 v213, v213, v214, v215 - ; GCN-NEXT: v_mul_f32_e32 v214, s4, v104 - ; GCN-NEXT: v_mul_f32_e32 v215, s4, v105 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[186:187], v[130:131], v[80:95] - ; GCN-NEXT: v_max3_f32 v213, v213, v214, v215 - ; GCN-NEXT: v_mul_f32_e32 v214, s4, v106 - ; GCN-NEXT: v_mul_f32_e32 v215, s4, v107 - ; GCN-NEXT: v_max3_f32 v213, v213, v214, v215 - ; GCN-NEXT: v_mul_f32_e32 v214, s4, v108 - ; GCN-NEXT: v_mul_f32_e32 v215, s4, v109 - ; GCN-NEXT: v_max3_f32 v213, v213, v214, v215 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[156:157], v[128:129], v[64:79] - ; GCN-NEXT: v_mul_f32_e32 v214, s4, v110 - ; GCN-NEXT: v_mul_f32_e32 v215, s4, v111 - ; GCN-NEXT: v_max3_f32 v213, v213, v214, v215 - ; GCN-NEXT: v_mul_f32_e32 v140, s4, v80 - ; GCN-NEXT: v_mul_f32_e32 v141, s4, v81 - ; GCN-NEXT: v_max3_f32 v140, v213, v140, v141 - ; GCN-NEXT: v_mul_f32_e32 v141, s4, v82 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[158:159], v[130:131], v[64:79] - ; GCN-NEXT: v_mul_f32_e32 v142, s4, v83 - ; GCN-NEXT: v_max3_f32 v140, v140, v141, v142 - ; GCN-NEXT: v_mul_f32_e32 v141, s4, v84 - ; GCN-NEXT: v_mul_f32_e32 v142, s4, v85 - ; GCN-NEXT: v_max3_f32 v140, v140, v141, v142 - ; GCN-NEXT: v_mul_f32_e32 v141, s4, v86 - ; GCN-NEXT: v_mul_f32_e32 v142, s4, v87 - ; GCN-NEXT: v_max3_f32 v140, v140, v141, v142 - ; GCN-NEXT: v_mul_f32_e32 v141, s4, v88 - ; GCN-NEXT: v_mul_f32_e32 v142, s4, v89 - ; GCN-NEXT: v_max3_f32 v140, v140, v141, v142 - ; GCN-NEXT: v_mul_f32_e32 v141, s4, v90 - ; GCN-NEXT: v_mul_f32_e32 v142, s4, v91 - ; GCN-NEXT: v_max3_f32 v140, v140, v141, v142 - ; GCN-NEXT: v_mul_f32_e32 v141, s4, v92 - ; GCN-NEXT: v_mul_f32_e32 v142, s4, v93 - ; GCN-NEXT: v_max3_f32 v140, v140, v141, v142 - ; GCN-NEXT: v_mul_f32_e32 v141, s4, v94 - ; GCN-NEXT: v_mul_f32_e32 v142, s4, v95 - ; GCN-NEXT: v_max3_f32 v140, v140, v141, v142 - ; GCN-NEXT: v_mul_f32_e32 v128, s4, v64 - ; GCN-NEXT: v_mul_f32_e32 v129, s4, v65 - ; GCN-NEXT: v_max3_f32 v128, v140, v128, v129 + ; GCN-NEXT: v_mul_f32_e32 v128, s4, v96 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v97 + ; GCN-NEXT: v_max3_f32 v128, v187, v128, v129 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v98 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v99 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v100 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[80:95], v[166:167], v[130:131], v[80:95] + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v101 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v102 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v103 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v104 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v105 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v106 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v107 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v108 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v109 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v110 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v111 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v80 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v81 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[64:79], v[162:163], v[130:131], v[64:79] + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v82 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v83 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v84 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v85 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v86 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v87 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v88 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v89 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v90 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v91 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v92 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v93 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v94 + ; GCN-NEXT: v_mul_f32_e32 v132, s4, v95 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v132 + ; GCN-NEXT: v_mul_f32_e32 v129, s4, v64 + ; GCN-NEXT: v_mul_f32_e32 v130, s4, v65 + ; GCN-NEXT: v_max3_f32 v128, v128, v129, v130 ; GCN-NEXT: v_mul_f32_e32 v129, s4, v66 ; GCN-NEXT: v_mul_f32_e32 v130, s4, v67 ; GCN-NEXT: v_max3_f32 v128, v128, v129, v130 @@ -486,76 +485,64 @@ ; GCN-NEXT: v_mul_f32_e32 v129, s4, v78 ; GCN-NEXT: v_mul_f32_e32 v130, s4, v79 ; GCN-NEXT: v_max3_f32 v128, v128, v129, v130 - ; GCN-NEXT: ds_bpermute_b32 v129, v196, v128 + ; GCN-NEXT: ds_bpermute_b32 v129, v170, v128 ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: ds_read_b128 v[130:133], v198 + ; GCN-NEXT: ds_read_b128 v[130:133], v172 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[134:137], v198 offset:576 + ; GCN-NEXT: ds_read_b128 v[134:137], v172 offset:576 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: v_max_f32_e32 v129, v129, v129 ; GCN-NEXT: v_max_f32_e32 v128, v128, v129 - ; GCN-NEXT: ds_bpermute_b32 v129, v196, v128 + ; GCN-NEXT: ds_bpermute_b32 v129, v170, v128 ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: v_cndmask_b32_e64 v128, v129, v128, s[12:13] + ; GCN-NEXT: v_cndmask_b32_e64 v128, v129, v128, s[6:7] ; GCN-NEXT: v_max_f32_e32 v128, v128, v128 - ; GCN-NEXT: v_max_f32_e32 v128, v212, v128 - ; GCN-NEXT: v_fma_f32 v113, s4, v113, -v128 - ; GCN-NEXT: v_mul_f32_e32 v138, 0x3fb8aa3b, v113 - ; GCN-NEXT: v_fma_f32 v113, s4, v114, -v128 - ; GCN-NEXT: v_mul_f32_e32 v139, 0x3fb8aa3b, v113 - ; GCN-NEXT: v_fma_f32 v113, s4, v115, -v128 - ; GCN-NEXT: v_mul_f32_e32 v140, 0x3fb8aa3b, v113 - ; GCN-NEXT: v_fma_f32 v113, s4, v116, -v128 - ; GCN-NEXT: v_mul_f32_e32 v141, 0x3fb8aa3b, v113 - ; GCN-NEXT: v_fma_f32 v113, s4, v117, -v128 + ; GCN-NEXT: v_max_f32_e32 v128, v186, v128 ; GCN-NEXT: v_fma_f32 v112, s4, v112, -v128 - ; GCN-NEXT: v_mul_f32_e32 v142, 0x3fb8aa3b, v113 - ; GCN-NEXT: v_fma_f32 v113, s4, v118, -v128 ; GCN-NEXT: v_mul_f32_e32 v112, 0x3fb8aa3b, v112 - ; GCN-NEXT: v_mul_f32_e32 v143, 0x3fb8aa3b, v113 - ; GCN-NEXT: v_fma_f32 v113, s4, v119, -v128 - ; GCN-NEXT: v_mul_f32_e32 v144, 0x3fb8aa3b, v113 + ; GCN-NEXT: v_fma_f32 v129, s4, v113, -v128 + ; GCN-NEXT: v_fma_f32 v138, s4, v114, -v128 ; GCN-NEXT: v_exp_f32_e32 v113, v112 - ; GCN-NEXT: v_exp_f32_e32 v114, v138 - ; GCN-NEXT: v_exp_f32_e32 v115, v139 - ; GCN-NEXT: v_exp_f32_e32 v116, v140 - ; GCN-NEXT: v_cvt_f16_f32_e32 v112, v113 - ; GCN-NEXT: v_cvt_f16_f32_e32 v119, v114 - ; GCN-NEXT: v_fma_f32 v118, s4, v120, -v128 - ; GCN-NEXT: v_fma_f32 v120, s4, v121, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v121, v116 - ; GCN-NEXT: v_pack_b32_f16 v146, v112, v119 - ; GCN-NEXT: v_cvt_f16_f32_e32 v112, v115 - ; GCN-NEXT: v_sub_f32_e32 v129, v211, v128 - ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v129 - ; GCN-NEXT: v_mul_f32_e32 v149, 0x3fb8aa3b, v120 - ; GCN-NEXT: v_fma_f32 v120, s4, v122, -v128 - ; GCN-NEXT: v_exp_f32_e32 v117, v141 - ; GCN-NEXT: v_mul_f32_e32 v148, 0x3fb8aa3b, v118 - ; GCN-NEXT: v_exp_f32_e32 v118, v142 - ; GCN-NEXT: v_exp_f32_e32 v119, v143 - ; GCN-NEXT: v_mul_f32_e32 v150, 0x3fb8aa3b, v120 - ; GCN-NEXT: v_exp_f32_e32 v120, v144 - ; GCN-NEXT: v_pack_b32_f16 v147, v112, v121 - ; GCN-NEXT: v_exp_f32_e32 v112, v129 - ; GCN-NEXT: ds_read_b128 v[138:141], v198 offset:1152 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[142:145], v198 offset:1728 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_fma_f32 v122, s4, v123, -v128 - ; GCN-NEXT: v_mul_f32_e32 v151, 0x3fb8aa3b, v122 - ; GCN-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[2:3], v[2:3], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[4:5], v[4:5], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[6:7], v[6:7], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[8:9], v[8:9], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[10:11], v[10:11], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[12:13], v[12:13], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[14:15], v[14:15], v[112:113] op_sel_hi:[1,0] + ; GCN-NEXT: v_mul_f32_e32 v112, 0x3fb8aa3b, v129 + ; GCN-NEXT: v_fma_f32 v139, s4, v115, -v128 + ; GCN-NEXT: v_exp_f32_e32 v114, v112 + ; GCN-NEXT: v_mul_f32_e32 v112, 0x3fb8aa3b, v138 + ; GCN-NEXT: v_exp_f32_e32 v115, v112 + ; GCN-NEXT: v_mul_f32_e32 v112, 0x3fb8aa3b, v139 + ; GCN-NEXT: v_fma_f32 v140, s4, v116, -v128 + ; GCN-NEXT: v_exp_f32_e32 v116, v112 + ; GCN-NEXT: v_fma_f32 v141, s4, v117, -v128 + ; GCN-NEXT: v_mul_f32_e32 v112, 0x3fb8aa3b, v140 + ; GCN-NEXT: v_fma_f32 v142, s4, v118, -v128 + ; GCN-NEXT: v_exp_f32_e32 v117, v112 + ; GCN-NEXT: v_mul_f32_e32 v112, 0x3fb8aa3b, v141 + ; GCN-NEXT: v_fma_f32 v143, s4, v119, -v128 + ; GCN-NEXT: v_cvt_f16_f32_e32 v129, v113 + ; GCN-NEXT: v_cvt_f16_f32_e32 v139, v114 + ; GCN-NEXT: v_fma_f32 v150, s4, v121, -v128 + ; GCN-NEXT: v_exp_f32_e32 v118, v112 + ; GCN-NEXT: v_mul_f32_e32 v112, 0x3fb8aa3b, v142 + ; GCN-NEXT: v_cvt_f16_f32_e32 v121, v115 + ; GCN-NEXT: v_fma_f32 v151, s4, v122, -v128 + ; GCN-NEXT: v_cvt_f16_f32_e32 v122, v116 + ; GCN-NEXT: v_exp_f32_e32 v119, v112 + ; GCN-NEXT: v_mul_f32_e32 v112, 0x3fb8aa3b, v143 + ; GCN-NEXT: v_fma_f32 v138, s4, v120, -v128 + ; GCN-NEXT: v_exp_f32_e32 v120, v112 + ; GCN-NEXT: v_sub_f32_e32 v112, v185, v128 + ; GCN-NEXT: v_mul_f32_e32 v112, 0x3fb8aa3b, v112 + ; GCN-NEXT: v_exp_f32_e32 v112, v112 + ; GCN-NEXT: v_pack_b32_f16 v147, v121, v122 + ; GCN-NEXT: v_pack_b32_f16 v146, v129, v139 + ; GCN-NEXT: v_mul_f32_e32 v121, 0x3fb8aa3b, v138 + ; GCN-NEXT: ds_read_b128 v[138:141], v172 offset:1152 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: ds_read_b128 v[142:145], v172 offset:1728 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: v_pk_mul_f32 v[32:33], v[32:33], v[112:113] op_sel_hi:[1,0] ; GCN-NEXT: v_pk_mul_f32 v[34:35], v[34:35], v[112:113] op_sel_hi:[1,0] ; GCN-NEXT: v_pk_mul_f32 v[36:37], v[36:37], v[112:113] op_sel_hi:[1,0] @@ -564,24 +551,38 @@ ; GCN-NEXT: v_pk_mul_f32 v[42:43], v[42:43], v[112:113] op_sel_hi:[1,0] ; GCN-NEXT: v_pk_mul_f32 v[44:45], v[44:45], v[112:113] op_sel_hi:[1,0] ; GCN-NEXT: v_pk_mul_f32 v[46:47], v[46:47], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_cvt_f16_f32_e32 v123, v117 - ; GCN-NEXT: v_fma_f32 v122, s4, v124, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v124, v118 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[130:131], v[146:147], v[0:15] - ; GCN-NEXT: v_exp_f32_e32 v121, v148 ; GCN-NEXT: v_pk_mul_f32 v[16:17], v[16:17], v[112:113] op_sel_hi:[1,0] ; GCN-NEXT: v_pk_mul_f32 v[18:19], v[18:19], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[20:21], v[20:21], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[22:23], v[22:23], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[24:25], v[24:25], v[112:113] op_sel_hi:[1,0] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[130:131], v[146:147], v[32:47] + ; GCN-NEXT: v_mul_f32_e64 v20, v20, v112 + ; GCN-NEXT: v_mul_f32_e64 v21, v21, v112 + ; GCN-NEXT: v_mul_f32_e64 v22, v22, v112 + ; GCN-NEXT: v_mul_f32_e64 v23, v23, v112 + ; GCN-NEXT: v_mul_f32_e64 v24, v24, v112 + ; GCN-NEXT: v_mul_f32_e64 v25, v25, v112 ; GCN-NEXT: v_pk_mul_f32 v[26:27], v[26:27], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[134:135], v[146:147], v[32:47] - ; GCN-NEXT: v_mul_f32_e64 v28, v28, v112 - ; GCN-NEXT: v_mul_f32_e64 v29, v29, v112 - ; GCN-NEXT: v_mul_f32_e64 v30, v30, v112 - ; GCN-NEXT: v_mul_f32_e64 v31, v31, v112 - ; GCN-NEXT: v_mul_f32_e64 v48, v48, v112 - ; GCN-NEXT: v_mul_f32_e64 v49, v49, v112 + ; GCN-NEXT: v_pk_mul_f32 v[28:29], v[28:29], v[112:113] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[30:31], v[30:31], v[112:113] op_sel_hi:[1,0] + ; GCN-NEXT: v_fma_f32 v152, s4, v123, -v128 + ; GCN-NEXT: v_cvt_f16_f32_e32 v129, v117 + ; GCN-NEXT: v_fma_f32 v130, s4, v124, -v128 + ; GCN-NEXT: v_exp_f32_e32 v121, v121 + ; GCN-NEXT: v_mul_f32_e32 v122, 0x3fb8aa3b, v150 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[134:135], v[146:147], v[16:31] + ; GCN-NEXT: v_cvt_f16_f32_e32 v124, v118 + ; GCN-NEXT: v_mul_f32_e64 v0, v0, v112 + ; GCN-NEXT: v_mul_f32_e64 v1, v1, v112 + ; GCN-NEXT: v_mul_f32_e64 v2, v2, v112 + ; GCN-NEXT: v_mul_f32_e64 v3, v3, v112 + ; GCN-NEXT: v_pk_mul_f32 v[4:5], v[4:5], v[112:113] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[6:7], v[6:7], v[112:113] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[8:9], v[8:9], v[112:113] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[10:11], v[10:11], v[112:113] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[12:13], v[12:13], v[112:113] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[14:15], v[14:15], v[112:113] op_sel_hi:[1,0] + ; GCN-NEXT: v_mul_f32_e32 v123, 0x3fb8aa3b, v151 + ; GCN-NEXT: v_cvt_f16_f32_e32 v131, v119 + ; GCN-NEXT: v_pk_mul_f32 v[48:49], v[48:49], v[112:113] op_sel_hi:[1,0] ; GCN-NEXT: v_pk_mul_f32 v[50:51], v[50:51], v[112:113] op_sel_hi:[1,0] ; GCN-NEXT: v_pk_mul_f32 v[52:53], v[52:53], v[112:113] op_sel_hi:[1,0] ; GCN-NEXT: v_pk_mul_f32 v[54:55], v[54:55], v[112:113] op_sel_hi:[1,0] @@ -589,209 +590,216 @@ ; GCN-NEXT: v_pk_mul_f32 v[58:59], v[58:59], v[112:113] op_sel_hi:[1,0] ; GCN-NEXT: v_pk_mul_f32 v[60:61], v[60:61], v[112:113] op_sel_hi:[1,0] ; GCN-NEXT: v_pk_mul_f32 v[62:63], v[62:63], v[112:113] op_sel_hi:[1,0] - ; GCN-NEXT: v_pack_b32_f16 v134, v123, v124 - ; GCN-NEXT: v_cvt_f16_f32_e32 v130, v119 - ; GCN-NEXT: v_fma_f32 v124, s4, v126, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v126, v120 - ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v122 - ; GCN-NEXT: v_exp_f32_e32 v122, v149 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[138:139], v[146:147], v[16:31] - ; GCN-NEXT: v_exp_f32_e32 v123, v150 - ; GCN-NEXT: v_pack_b32_f16 v135, v130, v126 - ; GCN-NEXT: v_mul_f32_e32 v138, 0x3fb8aa3b, v124 - ; GCN-NEXT: v_cvt_f16_f32_e32 v126, v121 + ; GCN-NEXT: v_cvt_f16_f32_e32 v135, v120 + ; GCN-NEXT: v_exp_f32_e32 v122, v122 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[138:139], v[146:147], v[0:15] + ; GCN-NEXT: v_exp_f32_e32 v123, v123 + ; GCN-NEXT: v_fma_f32 v134, s4, v126, -v128 + ; GCN-NEXT: v_pack_b32_f16 v126, v129, v124 + ; GCN-NEXT: v_mul_f32_e32 v124, 0x3fb8aa3b, v152 + ; GCN-NEXT: v_fma_f32 v129, s4, v127, -v128 + ; GCN-NEXT: v_pack_b32_f16 v127, v131, v135 + ; GCN-NEXT: v_mul_f32_e32 v135, 0x3fb8aa3b, v130 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[142:143], v[146:147], v[48:63] + ; GCN-NEXT: v_exp_f32_e32 v124, v124 + ; GCN-NEXT: v_cvt_f16_f32_e32 v138, v121 ; GCN-NEXT: v_fma_f32 v139, s4, v96, -v128 ; GCN-NEXT: v_fma_f32 v125, s4, v125, -v128 ; GCN-NEXT: v_mul_f32_e32 v125, 0x3fb8aa3b, v125 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[142:143], v[146:147], v[48:63] - ; GCN-NEXT: v_exp_f32_e32 v124, v151 - ; GCN-NEXT: v_fma_f32 v127, s4, v127, -v128 - ; GCN-NEXT: v_mul_f32_e32 v127, 0x3fb8aa3b, v127 - ; GCN-NEXT: v_fma_f32 v143, s4, v101, -v128 - ; GCN-NEXT: v_fma_f32 v64, s4, v64, -v128 - ; GCN-NEXT: v_fma_f32 v65, s4, v65, -v128 - ; GCN-NEXT: v_fma_f32 v68, s4, v68, -v128 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[132:133], v[134:135], v[0:15] - ; GCN-NEXT: v_exp_f32_e32 v96, v129 - ; GCN-NEXT: ds_read_b128 v[130:133], v197 + ; GCN-NEXT: v_mul_f32_e32 v134, 0x3fb8aa3b, v134 + ; GCN-NEXT: v_fma_f32 v154, s4, v103, -v128 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[132:133], v[126:127], v[32:47] + ; GCN-NEXT: v_exp_f32_e32 v96, v135 + ; GCN-NEXT: v_cvt_f16_f32_e32 v135, v122 + ; GCN-NEXT: ds_read_b128 v[130:133], v171 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[146:149], v197 offset:576 + ; GCN-NEXT: ds_read_b128 v[150:153], v171 offset:576 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v139 - ; GCN-NEXT: v_fma_f32 v69, s4, v69, -v128 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[136:137], v[134:135], v[32:47] - ; GCN-NEXT: v_cvt_f16_f32_e32 v136, v122 - ; GCN-NEXT: v_fma_f32 v137, s4, v97, -v128 + ; GCN-NEXT: v_fma_f32 v105, s4, v105, -v128 + ; GCN-NEXT: v_pack_b32_f16 v142, v138, v135 + ; GCN-NEXT: v_cvt_f16_f32_e32 v135, v123 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[136:137], v[126:127], v[16:31] + ; GCN-NEXT: v_fma_f32 v136, s4, v97, -v128 ; GCN-NEXT: v_exp_f32_e32 v97, v125 - ; GCN-NEXT: v_mul_f32_e32 v125, 0x3fb8aa3b, v137 - ; GCN-NEXT: v_pack_b32_f16 v126, v126, v136 - ; GCN-NEXT: v_cvt_f16_f32_e32 v136, v123 - ; GCN-NEXT: v_fma_f32 v137, s4, v98, -v128 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[140:141], v[134:135], v[16:31] - ; GCN-NEXT: v_exp_f32_e32 v98, v138 - ; GCN-NEXT: v_mul_f32_e32 v142, 0x3fb8aa3b, v137 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[144:145], v[134:135], v[48:63] - ; GCN-NEXT: v_cvt_f16_f32_e32 v134, v124 - ; GCN-NEXT: v_fma_f32 v135, s4, v99, -v128 - ; GCN-NEXT: v_exp_f32_e32 v99, v127 - ; GCN-NEXT: v_mul_f32_e32 v150, 0x3fb8aa3b, v135 - ; GCN-NEXT: v_pack_b32_f16 v127, v136, v134 - ; GCN-NEXT: ds_read_b128 v[134:137], v197 offset:1152 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[138:141], v197 offset:1728 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[130:131], v[126:127], v[0:15] - ; GCN-NEXT: v_fma_f32 v131, s4, v100, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v130, v96 - ; GCN-NEXT: v_exp_f32_e32 v100, v129 - ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v131 - ; GCN-NEXT: v_cvt_f16_f32_e32 v131, v97 + ; GCN-NEXT: v_mul_f32_e32 v146, 0x3fb8aa3b, v136 + ; GCN-NEXT: v_fma_f32 v136, s4, v98, -v128 + ; GCN-NEXT: v_mul_f32_e32 v147, 0x3fb8aa3b, v136 + ; GCN-NEXT: v_mul_f32_e32 v125, 0x3fb8aa3b, v129 + ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v139 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[140:141], v[126:127], v[0:15] + ; GCN-NEXT: v_exp_f32_e32 v98, v134 + ; GCN-NEXT: v_fma_f32 v104, s4, v104, -v128 + ; GCN-NEXT: v_fma_f32 v108, s4, v108, -v128 + ; GCN-NEXT: v_fma_f32 v80, s4, v80, -v128 + ; GCN-NEXT: v_fma_f32 v109, s4, v109, -v128 + ; GCN-NEXT: v_fma_f32 v81, s4, v81, -v128 + ; GCN-NEXT: v_fma_f32 v84, s4, v84, -v128 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[144:145], v[126:127], v[48:63] + ; GCN-NEXT: v_cvt_f16_f32_e32 v126, v124 + ; GCN-NEXT: v_fma_f32 v127, s4, v99, -v128 + ; GCN-NEXT: v_exp_f32_e32 v99, v125 + ; GCN-NEXT: v_mul_f32_e32 v125, 0x3fb8aa3b, v127 + ; GCN-NEXT: v_pack_b32_f16 v143, v135, v126 + ; GCN-NEXT: ds_read_b128 v[134:137], v171 offset:1152 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: ds_read_b128 v[138:141], v171 offset:1728 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) - ; GCN-NEXT: ds_write_b64 v199, v[188:189] + ; GCN-NEXT: ds_write_b64 v175, v[168:169] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v200, v[190:191] + ; GCN-NEXT: ds_write_b64 v173, v[148:149] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v201, v[192:193] + ; GCN-NEXT: ds_write_b64 v174, v[156:157] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v202, v[194:195] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[146:147], v[126:127], v[32:47] - ; GCN-NEXT: v_exp_f32_e32 v101, v125 - ; GCN-NEXT: v_pack_b32_f16 v146, v130, v131 + ; GCN-NEXT: ds_write_b64 v176, v[158:159] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[130:131], v[142:143], v[32:47] + ; GCN-NEXT: v_fma_f32 v127, s4, v100, -v128 + ; GCN-NEXT: v_exp_f32_e32 v100, v129 + ; GCN-NEXT: v_fma_f32 v130, s4, v101, -v128 + ; GCN-NEXT: v_cvt_f16_f32_e32 v126, v96 + ; GCN-NEXT: v_cvt_f16_f32_e32 v129, v97 + ; GCN-NEXT: v_mul_f32_e32 v159, 0x3fb8aa3b, v104 + ; GCN-NEXT: v_fma_f32 v85, s4, v85, -v128 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[150:151], v[142:143], v[16:31] + ; GCN-NEXT: v_exp_f32_e32 v101, v146 + ; GCN-NEXT: v_pack_b32_f16 v126, v126, v129 + ; GCN-NEXT: v_cvt_f16_f32_e32 v129, v98 + ; GCN-NEXT: v_fma_f32 v88, s4, v88, -v128 + ; GCN-NEXT: v_fma_f32 v89, s4, v89, -v128 + ; GCN-NEXT: v_fma_f32 v64, s4, v64, -v128 + ; GCN-NEXT: v_fma_f32 v65, s4, v65, -v128 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[134:135], v[142:143], v[0:15] + ; GCN-NEXT: v_fma_f32 v134, s4, v102, -v128 + ; GCN-NEXT: v_exp_f32_e32 v102, v147 ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_load_dwordx2 v[130:131], v210, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[146:147], v182, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mul_f32_e32 v125, 0x3fb8aa3b, v143 - ; GCN-NEXT: v_cvt_f16_f32_e32 v147, v98 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[134:135], v[126:127], v[16:31] - ; GCN-NEXT: v_fma_f32 v134, s4, v102, -v128 - ; GCN-NEXT: v_mul_f32_e32 v156, 0x3fb8aa3b, v134 - ; GCN-NEXT: buffer_load_dwordx2 v[134:135], v207, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[148:149], v183, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_exp_f32_e32 v102, v142 - ; GCN-NEXT: buffer_load_dwordx2 v[142:143], v208, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[150:151], v184, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx2 v[144:145], v209, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: v_mul_f32_e32 v135, 0x3fb8aa3b, v127 + ; GCN-NEXT: v_cvt_f16_f32_e32 v127, v99 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[138:139], v[142:143], v[48:63] + ; GCN-NEXT: buffer_load_dwordx2 v[138:139], v181, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_exp_f32_e32 v103, v125 + ; GCN-NEXT: v_pack_b32_f16 v127, v129, v127 + ; GCN-NEXT: v_cvt_f16_f32_e32 v129, v100 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[138:139], v[126:127], v[48:63] - ; GCN-NEXT: v_cvt_f16_f32_e32 v126, v99 - ; GCN-NEXT: v_fma_f32 v127, s4, v103, -v128 - ; GCN-NEXT: v_exp_f32_e32 v103, v150 - ; GCN-NEXT: v_fma_f32 v139, s4, v105, -v128 - ; GCN-NEXT: v_pack_b32_f16 v147, v147, v126 - ; GCN-NEXT: v_mul_f32_e32 v138, 0x3fb8aa3b, v127 - ; GCN-NEXT: v_perm_b32 v152, v135, v131, s5 - ; GCN-NEXT: v_perm_b32 v154, v135, v131, s7 - ; GCN-NEXT: v_fma_f32 v135, s4, v104, -v128 - ; GCN-NEXT: v_perm_b32 v126, v134, v130, s5 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[132:133], v[146:147], v[0:15] - ; GCN-NEXT: v_perm_b32 v150, v134, v130, s7 - ; GCN-NEXT: v_cvt_f16_f32_e32 v134, v100 - ; GCN-NEXT: v_exp_f32_e32 v104, v129 - ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v135 - ; GCN-NEXT: v_cvt_f16_f32_e32 v135, v101 - ; GCN-NEXT: ds_read_b128 v[130:133], v198 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_perm_b32 v127, v144, v142, s5 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[148:149], v[146:147], v[32:47] - ; GCN-NEXT: v_pack_b32_f16 v148, v134, v135 - ; GCN-NEXT: v_fma_f32 v135, s4, v106, -v128 - ; GCN-NEXT: v_exp_f32_e32 v105, v125 - ; GCN-NEXT: v_cvt_f16_f32_e32 v134, v102 - ; GCN-NEXT: v_perm_b32 v151, v144, v142, s7 - ; GCN-NEXT: v_perm_b32 v153, v145, v143, s5 - ; GCN-NEXT: v_perm_b32 v155, v145, v143, s7 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[136:137], v[146:147], v[16:31] - ; GCN-NEXT: v_exp_f32_e32 v106, v156 - ; GCN-NEXT: v_mul_f32_e32 v156, 0x3fb8aa3b, v135 - ; GCN-NEXT: v_cvt_f16_f32_e32 v135, v103 - ; GCN-NEXT: v_fma_f32 v136, s4, v107, -v128 - ; GCN-NEXT: ds_read_b128 v[142:145], v198 offset:576 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mul_f32_e32 v125, 0x3fb8aa3b, v139 - ; GCN-NEXT: v_pack_b32_f16 v149, v134, v135 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[140:141], v[146:147], v[48:63] - ; GCN-NEXT: v_mul_f32_e32 v146, 0x3fb8aa3b, v136 - ; GCN-NEXT: ds_read_b128 v[134:137], v198 offset:1152 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_exp_f32_e32 v107, v138 - ; GCN-NEXT: ds_read_b128 v[138:141], v198 offset:1728 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[130:131], v[148:149], v[0:15] - ; GCN-NEXT: v_fma_f32 v131, s4, v108, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v130, v104 - ; GCN-NEXT: v_exp_f32_e32 v108, v129 - ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v131 - ; GCN-NEXT: v_cvt_f16_f32_e32 v131, v105 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[142:143], v[148:149], v[32:47] - ; GCN-NEXT: v_fma_f32 v142, s4, v109, -v128 - ; GCN-NEXT: v_exp_f32_e32 v109, v125 - ; GCN-NEXT: v_mul_f32_e32 v125, 0x3fb8aa3b, v142 - ; GCN-NEXT: v_pack_b32_f16 v142, v130, v131 - ; GCN-NEXT: v_fma_f32 v131, s4, v110, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v130, v106 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[134:135], v[148:149], v[16:31] - ; GCN-NEXT: v_mul_f32_e32 v134, 0x3fb8aa3b, v131 - ; GCN-NEXT: v_cvt_f16_f32_e32 v131, v107 - ; GCN-NEXT: v_exp_f32_e32 v110, v156 - ; GCN-NEXT: v_fma_f32 v135, s4, v111, -v128 - ; GCN-NEXT: v_mul_f32_e32 v135, 0x3fb8aa3b, v135 - ; GCN-NEXT: v_pack_b32_f16 v143, v130, v131 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[138:139], v[148:149], v[48:63] - ; GCN-NEXT: v_exp_f32_e32 v111, v146 - ; GCN-NEXT: v_fma_f32 v139, s4, v80, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v138, v108 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[132:133], v[142:143], v[0:15] - ; GCN-NEXT: v_exp_f32_e32 v80, v129 - ; GCN-NEXT: ds_read_b128 v[130:133], v197 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[146:149], v197 offset:576 + ; GCN-NEXT: v_mul_f32_e32 v125, 0x3fb8aa3b, v130 + ; GCN-NEXT: v_cvt_f16_f32_e32 v104, v102 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[132:133], v[126:127], v[32:47] + ; GCN-NEXT: v_exp_f32_e32 v158, v135 + ; GCN-NEXT: ds_read_b128 v[130:133], v172 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v139 - ; GCN-NEXT: v_cvt_f16_f32_e32 v139, v109 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[144:145], v[142:143], v[32:47] - ; GCN-NEXT: v_fma_f32 v144, s4, v81, -v128 - ; GCN-NEXT: v_exp_f32_e32 v81, v125 - ; GCN-NEXT: v_mul_f32_e32 v125, 0x3fb8aa3b, v144 - ; GCN-NEXT: v_pack_b32_f16 v144, v138, v139 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[136:137], v[142:143], v[16:31] - ; GCN-NEXT: v_cvt_f16_f32_e32 v136, v110 - ; GCN-NEXT: v_fma_f32 v137, s4, v82, -v128 - ; GCN-NEXT: v_exp_f32_e32 v82, v134 - ; GCN-NEXT: v_cvt_f16_f32_e32 v134, v111 - ; GCN-NEXT: v_mul_f32_e32 v156, 0x3fb8aa3b, v137 - ; GCN-NEXT: v_fma_f32 v137, s4, v83, -v128 - ; GCN-NEXT: v_mul_f32_e32 v157, 0x3fb8aa3b, v137 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[140:141], v[142:143], v[48:63] - ; GCN-NEXT: v_exp_f32_e32 v83, v135 - ; GCN-NEXT: v_pack_b32_f16 v145, v136, v134 - ; GCN-NEXT: ds_read_b128 v[134:137], v197 offset:1152 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[138:141], v197 offset:1728 + ; GCN-NEXT: v_mul_f32_e32 v134, 0x3fb8aa3b, v134 + ; GCN-NEXT: ds_read_b128 v[142:145], v172 offset:576 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_mul_f32_e32 v135, 0x3fb8aa3b, v154 + ; GCN-NEXT: v_fma_f32 v68, s4, v68, -v128 + ; GCN-NEXT: v_fma_f32 v72, s4, v72, -v128 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[152:153], v[126:127], v[16:31] + ; GCN-NEXT: v_cvt_f16_f32_e32 v152, v101 + ; GCN-NEXT: v_exp_f32_e32 v125, v125 + ; GCN-NEXT: v_fma_f32 v69, s4, v69, -v128 + ; GCN-NEXT: v_fma_f32 v73, s4, v73, -v128 + ; GCN-NEXT: v_pack_b32_f16 v152, v129, v152 + ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v105 + ; GCN-NEXT: v_fma_f32 v105, s4, v106, -v128 + ; GCN-NEXT: v_mul_f32_e32 v161, 0x3fb8aa3b, v105 + ; GCN-NEXT: v_cvt_f16_f32_e32 v105, v103 + ; GCN-NEXT: v_fma_f32 v106, s4, v107, -v128 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[136:137], v[126:127], v[0:15] + ; GCN-NEXT: v_exp_f32_e32 v160, v134 + ; GCN-NEXT: v_pack_b32_f16 v153, v104, v105 + ; GCN-NEXT: v_perm_b32 v154, v148, v146, s12 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[140:141], v[126:127], v[48:63] + ; GCN-NEXT: v_mul_f32_e32 v141, 0x3fb8aa3b, v106 + ; GCN-NEXT: ds_read_b128 v[104:107], v172 offset:1152 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_perm_b32 v156, v148, v146, s5 + ; GCN-NEXT: v_exp_f32_e32 v146, v135 + ; GCN-NEXT: ds_read_b128 v[134:137], v172 offset:1728 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_perm_b32 v155, v138, v150, s12 + ; GCN-NEXT: v_perm_b32 v157, v138, v150, s5 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[130:131], v[152:153], v[32:47] + ; GCN-NEXT: v_cvt_f16_f32_e32 v130, v158 + ; GCN-NEXT: v_mul_f32_e32 v150, 0x3fb8aa3b, v108 + ; GCN-NEXT: v_cvt_f16_f32_e32 v108, v125 + ; GCN-NEXT: v_exp_f32_e32 v148, v159 + ; GCN-NEXT: v_perm_b32 v126, v149, v147, s12 + ; GCN-NEXT: v_perm_b32 v138, v149, v147, s5 + ; GCN-NEXT: v_pack_b32_f16 v140, v130, v108 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[142:143], v[152:153], v[16:31] + ; GCN-NEXT: v_exp_f32_e32 v129, v129 + ; GCN-NEXT: v_cvt_f16_f32_e32 v108, v146 + ; GCN-NEXT: v_mul_f32_e32 v142, 0x3fb8aa3b, v109 + ; GCN-NEXT: v_fma_f32 v109, s4, v111, -v128 + ; GCN-NEXT: v_perm_b32 v127, v139, v151, s12 + ; GCN-NEXT: v_perm_b32 v139, v139, v151, s5 + ; GCN-NEXT: v_mul_f32_e32 v159, 0x3fb8aa3b, v89 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[104:105], v[152:153], v[0:15] + ; GCN-NEXT: v_cvt_f16_f32_e32 v104, v160 + ; GCN-NEXT: v_exp_f32_e32 v143, v161 + ; GCN-NEXT: v_fma_f32 v105, s4, v110, -v128 + ; GCN-NEXT: v_mul_f32_e32 v105, 0x3fb8aa3b, v105 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[134:135], v[152:153], v[48:63] + ; GCN-NEXT: v_exp_f32_e32 v147, v141 + ; GCN-NEXT: v_pack_b32_f16 v141, v104, v108 + ; GCN-NEXT: v_cvt_f16_f32_e32 v104, v148 + ; GCN-NEXT: v_mul_f32_e32 v135, 0x3fb8aa3b, v109 + ; GCN-NEXT: ds_read_b128 v[108:111], v171 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[132:133], v[140:141], v[32:47] + ; GCN-NEXT: v_exp_f32_e32 v149, v150 + ; GCN-NEXT: v_mul_f32_e32 v150, 0x3fb8aa3b, v80 + ; GCN-NEXT: v_cvt_f16_f32_e32 v80, v129 + ; GCN-NEXT: ds_read_b128 v[130:133], v171 offset:576 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_pack_b32_f16 v134, v104, v80 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[144:145], v[140:141], v[16:31] + ; GCN-NEXT: v_mul_f32_e32 v144, 0x3fb8aa3b, v81 + ; GCN-NEXT: v_fma_f32 v81, s4, v82, -v128 + ; GCN-NEXT: v_cvt_f16_f32_e32 v80, v143 + ; GCN-NEXT: v_mul_f32_e32 v151, 0x3fb8aa3b, v81 + ; GCN-NEXT: v_cvt_f16_f32_e32 v81, v147 + ; GCN-NEXT: v_fma_f32 v82, s4, v83, -v128 + ; GCN-NEXT: v_exp_f32_e32 v142, v142 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[106:107], v[140:141], v[0:15] + ; GCN-NEXT: v_exp_f32_e32 v145, v105 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[136:137], v[140:141], v[48:63] + ; GCN-NEXT: v_exp_f32_e32 v152, v135 + ; GCN-NEXT: v_mul_f32_e32 v140, 0x3fb8aa3b, v82 + ; GCN-NEXT: v_pack_b32_f16 v135, v80, v81 + ; GCN-NEXT: ds_read_b128 v[80:83], v171 offset:1152 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: ds_read_b128 v[104:107], v171 offset:1728 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ;;#ASMSTART @@ -799,150 +807,144 @@ ; GCN-NEXT: ;;#ASMEND ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) - ; GCN-NEXT: ds_write_b64 v199, v[126:127] + ; GCN-NEXT: ds_write_b64 v175, v[154:155] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v200, v[150:151] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[130:131], v[144:145], v[0:15] + ; GCN-NEXT: ds_write_b64 v173, v[156:157] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v201, v[152:153] + ; GCN-NEXT: ds_write_b64 v174, v[126:127] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v202, v[154:155] - ; GCN-NEXT: v_fma_f32 v127, s4, v84, -v128 - ; GCN-NEXT: v_exp_f32_e32 v84, v129 - ; GCN-NEXT: v_fma_f32 v130, s4, v85, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v126, v80 - ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v127 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[146:147], v[144:145], v[32:47] - ; GCN-NEXT: v_exp_f32_e32 v85, v125 - ; GCN-NEXT: v_mul_f32_e32 v125, 0x3fb8aa3b, v130 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_load_dwordx2 v[130:131], v206, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: ds_write_b64 v176, v[138:139] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[108:109], v[134:135], v[32:47] + ; GCN-NEXT: v_exp_f32_e32 v150, v150 + ; GCN-NEXT: v_cvt_f16_f32_e32 v108, v149 + ; GCN-NEXT: v_cvt_f16_f32_e32 v109, v142 + ; GCN-NEXT: v_mul_f32_e32 v141, 0x3fb8aa3b, v84 + ; GCN-NEXT: v_cvt_f16_f32_e32 v84, v152 + ; GCN-NEXT: v_mul_f32_e32 v157, 0x3fb8aa3b, v88 + ; GCN-NEXT: v_pack_b32_f16 v126, v108, v109 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[130:131], v[134:135], v[16:31] + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_load_dwordx2 v[130:131], v178, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_cvt_f16_f32_e32 v127, v81 - ; GCN-NEXT: v_pack_b32_f16 v126, v126, v127 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[134:135], v[144:145], v[16:31] - ; GCN-NEXT: v_fma_f32 v134, s4, v86, -v128 - ; GCN-NEXT: v_mul_f32_e32 v158, 0x3fb8aa3b, v134 - ; GCN-NEXT: buffer_load_dwordx2 v[134:135], v203, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[136:137], v179, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx2 v[142:143], v204, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: v_exp_f32_e32 v144, v144 + ; GCN-NEXT: buffer_load_dwordx2 v[138:139], v180, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx2 v[146:147], v205, s[0:3], 0 offen sc0 sc1 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[80:81], v[134:135], v[0:15] + ; GCN-NEXT: v_exp_f32_e32 v151, v151 + ; GCN-NEXT: v_cvt_f16_f32_e32 v80, v145 + ; GCN-NEXT: v_fma_f32 v81, s4, v86, -v128 + ; GCN-NEXT: v_mul_f32_e32 v81, 0x3fb8aa3b, v81 + ; GCN-NEXT: v_pack_b32_f16 v127, v80, v84 + ; GCN-NEXT: v_mul_f32_e32 v80, 0x3fb8aa3b, v85 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[104:105], v[134:135], v[48:63] + ; GCN-NEXT: buffer_load_dwordx2 v[104:105], v177, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_cvt_f16_f32_e32 v127, v82 - ; GCN-NEXT: v_exp_f32_e32 v86, v156 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[138:139], v[144:145], v[48:63] - ; GCN-NEXT: v_cvt_f16_f32_e32 v138, v83 + ; GCN-NEXT: v_exp_f32_e32 v153, v140 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: v_fma_f32 v139, s4, v87, -v128 - ; GCN-NEXT: v_exp_f32_e32 v87, v157 - ; GCN-NEXT: v_pack_b32_f16 v127, v127, v138 - ; GCN-NEXT: v_fma_f32 v138, s4, v89, -v128 - ; GCN-NEXT: v_mul_f32_e32 v139, 0x3fb8aa3b, v139 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[132:133], v[126:127], v[0:15] - ; GCN-NEXT: ; implicit-def: $sgpr0 - ; GCN-NEXT: v_perm_b32 v154, v135, v131, s5 - ; GCN-NEXT: v_perm_b32 v156, v135, v131, s7 - ; GCN-NEXT: v_fma_f32 v135, s4, v88, -v128 - ; GCN-NEXT: v_perm_b32 v150, v134, v130, s5 - ; GCN-NEXT: v_perm_b32 v152, v134, v130, s7 - ; GCN-NEXT: ds_read_b128 v[130:133], v198 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_cvt_f16_f32_e32 v134, v84 - ; GCN-NEXT: v_exp_f32_e32 v88, v129 - ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v135 - ; GCN-NEXT: v_cvt_f16_f32_e32 v135, v85 - ; GCN-NEXT: v_perm_b32 v151, v146, v142, s5 - ; GCN-NEXT: v_perm_b32 v153, v146, v142, s7 - ; GCN-NEXT: v_perm_b32 v155, v147, v143, s5 - ; GCN-NEXT: v_perm_b32 v157, v147, v143, s7 - ; GCN-NEXT: ds_read_b128 v[142:145], v198 offset:576 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[148:149], v[126:127], v[32:47] - ; GCN-NEXT: v_exp_f32_e32 v89, v125 - ; GCN-NEXT: v_pack_b32_f16 v146, v134, v135 - ; GCN-NEXT: v_cvt_f16_f32_e32 v134, v86 - ; GCN-NEXT: v_fma_f32 v135, s4, v90, -v128 - ; GCN-NEXT: v_mul_f32_e32 v125, 0x3fb8aa3b, v138 - ; GCN-NEXT: v_mul_f32_e32 v148, 0x3fb8aa3b, v135 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[136:137], v[126:127], v[16:31] - ; GCN-NEXT: v_exp_f32_e32 v90, v158 - ; GCN-NEXT: v_mul_f32_e32 v158, 0x3fb8aa3b, v64 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[140:141], v[126:127], v[48:63] - ; GCN-NEXT: v_cvt_f16_f32_e32 v126, v87 - ; GCN-NEXT: v_fma_f32 v127, s4, v91, -v128 - ; GCN-NEXT: v_exp_f32_e32 v91, v139 - ; GCN-NEXT: v_mul_f32_e32 v127, 0x3fb8aa3b, v127 - ; GCN-NEXT: v_pack_b32_f16 v147, v134, v126 - ; GCN-NEXT: ds_read_b128 v[134:137], v198 offset:1152 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[138:141], v198 offset:1728 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[130:131], v[146:147], v[0:15] - ; GCN-NEXT: v_fma_f32 v130, s4, v92, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v126, v88 - ; GCN-NEXT: v_exp_f32_e32 v92, v129 - ; GCN-NEXT: v_mul_f32_e32 v129, 0x3fb8aa3b, v130 - ; GCN-NEXT: v_cvt_f16_f32_e32 v130, v89 - ; GCN-NEXT: v_fma_f32 v131, s4, v93, -v128 - ; GCN-NEXT: v_pack_b32_f16 v130, v126, v130 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[142:143], v[146:147], v[32:47] - ; GCN-NEXT: v_exp_f32_e32 v93, v125 - ; GCN-NEXT: v_fma_f32 v126, s4, v94, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v125, v90 - ; GCN-NEXT: v_mul_f32_e32 v143, 0x3fb8aa3b, v126 - ; GCN-NEXT: v_cvt_f16_f32_e32 v126, v91 - ; GCN-NEXT: v_mul_f32_e32 v142, 0x3fb8aa3b, v131 - ; GCN-NEXT: v_fma_f32 v131, s4, v95, -v128 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[134:135], v[146:147], v[16:31] - ; GCN-NEXT: v_exp_f32_e32 v94, v148 - ; GCN-NEXT: v_cvt_f16_f32_e32 v64, v93 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[138:139], v[146:147], v[48:63] - ; GCN-NEXT: v_exp_f32_e32 v95, v127 - ; GCN-NEXT: v_cvt_f16_f32_e32 v127, v92 - ; GCN-NEXT: v_mul_f32_e32 v138, 0x3fb8aa3b, v131 - ; GCN-NEXT: v_pack_b32_f16 v131, v125, v126 - ; GCN-NEXT: s_nop 1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[132:133], v[130:131], v[0:15] - ; GCN-NEXT: v_exp_f32_e32 v125, v129 - ; GCN-NEXT: ds_read_b128 v[132:135], v197 + ; GCN-NEXT: v_fma_f32 v134, s4, v87, -v128 + ; GCN-NEXT: ds_read_b128 v[84:87], v172 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[146:149], v197 offset:576 + ; GCN-NEXT: v_cvt_f16_f32_e32 v135, v150 + ; GCN-NEXT: v_mul_f32_e32 v155, 0x3fb8aa3b, v134 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[110:111], v[126:127], v[32:47] + ; GCN-NEXT: v_exp_f32_e32 v154, v141 + ; GCN-NEXT: ds_read_b128 v[108:111], v172 offset:576 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[144:145], v[130:131], v[32:47] - ; GCN-NEXT: v_mul_f32_e32 v144, 0x3fb8aa3b, v65 + ; GCN-NEXT: ; implicit-def: $sgpr0 + ; GCN-NEXT: v_perm_b32 v134, v136, v130, s12 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[132:133], v[126:127], v[16:31] + ; GCN-NEXT: v_exp_f32_e32 v156, v80 + ; GCN-NEXT: v_cvt_f16_f32_e32 v80, v151 + ; GCN-NEXT: v_cvt_f16_f32_e32 v132, v144 + ; GCN-NEXT: v_perm_b32 v140, v136, v130, s5 + ; GCN-NEXT: v_pack_b32_f16 v132, v135, v132 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[82:83], v[126:127], v[0:15] + ; GCN-NEXT: v_exp_f32_e32 v161, v81 + ; GCN-NEXT: v_cvt_f16_f32_e32 v81, v153 + ; GCN-NEXT: v_fma_f32 v82, s4, v90, -v128 + ; GCN-NEXT: v_mul_f32_e32 v162, 0x3fb8aa3b, v82 + ; GCN-NEXT: v_fma_f32 v82, s4, v91, -v128 + ; GCN-NEXT: v_pack_b32_f16 v133, v80, v81 + ; GCN-NEXT: v_perm_b32 v135, v104, v138, s12 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[106:107], v[126:127], v[48:63] + ; GCN-NEXT: v_mul_f32_e32 v127, 0x3fb8aa3b, v82 + ; GCN-NEXT: ds_read_b128 v[80:83], v172 offset:1152 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_exp_f32_e32 v126, v155 + ; GCN-NEXT: ds_read_b128 v[88:91], v172 offset:1728 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_perm_b32 v141, v104, v138, s5 + ; GCN-NEXT: v_perm_b32 v106, v137, v131, s12 + ; GCN-NEXT: v_perm_b32 v104, v137, v131, s5 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[84:85], v[132:133], v[32:47] + ; GCN-NEXT: v_fma_f32 v85, s4, v92, -v128 + ; GCN-NEXT: v_cvt_f16_f32_e32 v84, v154 + ; GCN-NEXT: v_mul_f32_e32 v136, 0x3fb8aa3b, v85 + ; GCN-NEXT: v_cvt_f16_f32_e32 v85, v156 + ; GCN-NEXT: v_exp_f32_e32 v130, v157 + ; GCN-NEXT: v_fma_f32 v92, s4, v93, -v128 + ; GCN-NEXT: v_mul_f32_e32 v137, 0x3fb8aa3b, v92 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[108:109], v[132:133], v[16:31] + ; GCN-NEXT: v_exp_f32_e32 v131, v159 + ; GCN-NEXT: v_pack_b32_f16 v108, v84, v85 + ; GCN-NEXT: v_cvt_f16_f32_e32 v84, v126 + ; GCN-NEXT: v_fma_f32 v85, s4, v95, -v128 + ; GCN-NEXT: v_perm_b32 v107, v105, v139, s12 + ; GCN-NEXT: v_perm_b32 v105, v105, v139, s5 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[80:81], v[132:133], v[0:15] + ; GCN-NEXT: v_cvt_f16_f32_e32 v80, v161 + ; GCN-NEXT: v_exp_f32_e32 v138, v162 + ; GCN-NEXT: v_fma_f32 v81, s4, v94, -v128 + ; GCN-NEXT: v_mul_f32_e32 v81, 0x3fb8aa3b, v81 + ; GCN-NEXT: v_pack_b32_f16 v109, v80, v84 + ; GCN-NEXT: v_cvt_f16_f32_e32 v80, v130 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[88:89], v[132:133], v[48:63] + ; GCN-NEXT: v_exp_f32_e32 v127, v127 + ; GCN-NEXT: v_mul_f32_e32 v133, 0x3fb8aa3b, v64 + ; GCN-NEXT: v_cvt_f16_f32_e32 v64, v131 + ; GCN-NEXT: v_mul_f32_e32 v89, 0x3fb8aa3b, v85 + ; GCN-NEXT: v_pack_b32_f16 v88, v80, v64 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[86:87], v[108:109], v[32:47] + ; GCN-NEXT: v_exp_f32_e32 v132, v136 + ; GCN-NEXT: v_cvt_f16_f32_e32 v64, v138 + ; GCN-NEXT: ds_read_b128 v[84:87], v171 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: ds_read_b128 v[92:95], v171 offset:576 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[110:111], v[108:109], v[16:31] + ; GCN-NEXT: v_mul_f32_e32 v111, 0x3fb8aa3b, v65 ; GCN-NEXT: v_fma_f32 v65, s4, v66, -v128 - ; GCN-NEXT: v_exp_f32_e32 v126, v142 - ; GCN-NEXT: v_pack_b32_f16 v142, v127, v64 - ; GCN-NEXT: v_cvt_f16_f32_e32 v64, v94 - ; GCN-NEXT: v_mul_f32_e32 v145, 0x3fb8aa3b, v65 - ; GCN-NEXT: v_cvt_f16_f32_e32 v65, v95 + ; GCN-NEXT: v_exp_f32_e32 v110, v137 + ; GCN-NEXT: v_mul_f32_e32 v137, 0x3fb8aa3b, v65 + ; GCN-NEXT: v_cvt_f16_f32_e32 v65, v127 ; GCN-NEXT: v_fma_f32 v66, s4, v67, -v128 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[136:137], v[130:131], v[16:31] - ; GCN-NEXT: v_exp_f32_e32 v127, v143 - ; GCN-NEXT: v_pack_b32_f16 v143, v64, v65 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[140:141], v[130:131], v[48:63] - ; GCN-NEXT: v_exp_f32_e32 v129, v138 - ; GCN-NEXT: v_mul_f32_e32 v141, 0x3fb8aa3b, v66 - ; GCN-NEXT: ds_read_b128 v[64:67], v197 offset:1152 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[82:83], v[108:109], v[0:15] + ; GCN-NEXT: v_exp_f32_e32 v136, v81 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[90:91], v[108:109], v[48:63] + ; GCN-NEXT: v_exp_f32_e32 v108, v89 + ; GCN-NEXT: v_mul_f32_e32 v91, 0x3fb8aa3b, v66 + ; GCN-NEXT: v_pack_b32_f16 v89, v64, v65 + ; GCN-NEXT: ds_read_b128 v[64:67], v171 offset:1152 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[136:139], v197 offset:1728 + ; GCN-NEXT: ds_read_b128 v[80:83], v171 offset:1728 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ;;#ASMSTART @@ -950,123 +952,119 @@ ; GCN-NEXT: ;;#ASMEND ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) - ; GCN-NEXT: ds_write_b64 v199, v[150:151] + ; GCN-NEXT: ds_write_b64 v175, v[134:135] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[84:85], v[88:89], v[32:47] + ; GCN-NEXT: v_cvt_f16_f32_e32 v84, v132 + ; GCN-NEXT: v_exp_f32_e32 v109, v133 + ; GCN-NEXT: v_cvt_f16_f32_e32 v85, v110 ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v200, v[152:153] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[132:133], v[142:143], v[0:15] - ; GCN-NEXT: v_cvt_f16_f32_e32 v132, v125 - ; GCN-NEXT: v_exp_f32_e32 v130, v158 + ; GCN-NEXT: ds_write_b64 v173, v[140:141] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v201, v[154:155] + ; GCN-NEXT: ds_write_b64 v174, v[106:107] ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b64 v202, v[156:157] + ; GCN-NEXT: ds_write_b64 v176, v[104:105] + ; GCN-NEXT: v_mul_f32_e32 v104, 0x3fb8aa3b, v68 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[92:93], v[88:89], v[16:31] + ; GCN-NEXT: v_exp_f32_e32 v92, v111 + ; GCN-NEXT: v_cvt_f16_f32_e32 v68, v108 + ; GCN-NEXT: v_pack_b32_f16 v90, v84, v85 + ; GCN-NEXT: v_mul_f32_e32 v105, 0x3fb8aa3b, v69 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[146:147], v[142:143], v[32:47] - ; GCN-NEXT: v_mul_f32_e32 v146, 0x3fb8aa3b, v68 - ; GCN-NEXT: v_cvt_f16_f32_e32 v68, v126 - ; GCN-NEXT: v_exp_f32_e32 v131, v144 - ; GCN-NEXT: v_mul_f32_e32 v144, 0x3fb8aa3b, v69 ; GCN-NEXT: v_fma_f32 v69, s4, v71, -v128 - ; GCN-NEXT: v_pack_b32_f16 v140, v132, v68 - ; GCN-NEXT: v_cvt_f16_f32_e32 v68, v129 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[64:65], v[142:143], v[16:31] - ; GCN-NEXT: v_cvt_f16_f32_e32 v64, v127 - ; GCN-NEXT: v_exp_f32_e32 v132, v145 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[64:65], v[88:89], v[0:15] + ; GCN-NEXT: v_cvt_f16_f32_e32 v64, v136 + ; GCN-NEXT: v_exp_f32_e32 v93, v137 ; GCN-NEXT: v_fma_f32 v65, s4, v70, -v128 ; GCN-NEXT: v_mul_f32_e32 v65, 0x3fb8aa3b, v65 - ; GCN-NEXT: v_fma_f32 v145, s4, v73, -v128 - ; GCN-NEXT: v_mul_f32_e32 v147, 0x3fb8aa3b, v145 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[136:137], v[142:143], v[48:63] - ; GCN-NEXT: v_exp_f32_e32 v133, v141 - ; GCN-NEXT: v_mul_f32_e32 v142, 0x3fb8aa3b, v69 - ; GCN-NEXT: v_pack_b32_f16 v141, v64, v68 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: ds_read_b128 v[68:71], v198 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_fma_f32 v143, s4, v72, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v64, v130 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[134:135], v[140:141], v[0:15] - ; GCN-NEXT: v_exp_f32_e32 v72, v146 - ; GCN-NEXT: v_mul_f32_e32 v146, 0x3fb8aa3b, v143 - ; GCN-NEXT: v_cvt_f16_f32_e32 v143, v131 - ; GCN-NEXT: ds_read_b128 v[134:137], v198 offset:576 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_pack_b32_f16 v64, v64, v143 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[148:149], v[140:141], v[32:47] - ; GCN-NEXT: v_exp_f32_e32 v73, v144 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[66:67], v[140:141], v[16:31] - ; GCN-NEXT: v_cvt_f16_f32_e32 v66, v132 - ; GCN-NEXT: v_fma_f32 v67, s4, v74, -v128 - ; GCN-NEXT: v_exp_f32_e32 v74, v65 - ; GCN-NEXT: v_cvt_f16_f32_e32 v65, v133 - ; GCN-NEXT: v_mul_f32_e32 v67, 0x3fb8aa3b, v67 - ; GCN-NEXT: v_pack_b32_f16 v65, v66, v65 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[138:139], v[140:141], v[48:63] - ; GCN-NEXT: v_fma_f32 v138, s4, v75, -v128 - ; GCN-NEXT: v_exp_f32_e32 v75, v142 - ; GCN-NEXT: v_mul_f32_e32 v148, 0x3fb8aa3b, v138 - ; GCN-NEXT: ds_read_b128 v[138:141], v198 offset:1152 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[142:145], v198 offset:1728 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_cvt_f16_f32_e32 v66, v72 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[68:69], v[64:65], v[0:15] - ; GCN-NEXT: v_fma_f32 v68, s4, v76, -v128 - ; GCN-NEXT: v_exp_f32_e32 v76, v146 - ; GCN-NEXT: v_mul_f32_e32 v146, 0x3fb8aa3b, v68 - ; GCN-NEXT: v_cvt_f16_f32_e32 v68, v73 - ; GCN-NEXT: v_fma_f32 v69, s4, v77, -v128 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[134:135], v[64:65], v[32:47] - ; GCN-NEXT: v_exp_f32_e32 v77, v147 - ; GCN-NEXT: v_pack_b32_f16 v134, v66, v68 - ; GCN-NEXT: v_fma_f32 v68, s4, v78, -v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v66, v74 - ; GCN-NEXT: v_mul_f32_e32 v147, 0x3fb8aa3b, v69 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[138:139], v[64:65], v[16:31] - ; GCN-NEXT: v_exp_f32_e32 v78, v67 - ; GCN-NEXT: v_mul_f32_e32 v138, 0x3fb8aa3b, v68 - ; GCN-NEXT: v_cvt_f16_f32_e32 v139, v76 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[142:143], v[64:65], v[48:63] - ; GCN-NEXT: v_cvt_f16_f32_e32 v64, v75 - ; GCN-NEXT: v_fma_f32 v65, s4, v79, -v128 - ; GCN-NEXT: v_exp_f32_e32 v79, v148 - ; GCN-NEXT: v_mul_f32_e32 v128, 0x3fb8aa3b, v65 - ; GCN-NEXT: v_pack_b32_f16 v135, v66, v64 - ; GCN-NEXT: s_nop 1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[70:71], v[134:135], v[0:15] - ; GCN-NEXT: v_exp_f32_e32 v142, v146 - ; GCN-NEXT: ds_read_b128 v[68:71], v197 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[64:67], v197 offset:576 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[136:137], v[134:135], v[32:47] - ; GCN-NEXT: v_exp_f32_e32 v137, v147 - ; GCN-NEXT: v_cvt_f16_f32_e32 v136, v77 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[140:141], v[134:135], v[16:31] - ; GCN-NEXT: v_exp_f32_e32 v138, v138 - ; GCN-NEXT: v_cvt_f16_f32_e32 v140, v78 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[144:145], v[134:135], v[48:63] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[80:81], v[88:89], v[48:63] + ; GCN-NEXT: v_exp_f32_e32 v88, v91 + ; GCN-NEXT: v_pack_b32_f16 v91, v64, v68 + ; GCN-NEXT: v_cvt_f16_f32_e32 v64, v109 + ; GCN-NEXT: v_mul_f32_e32 v81, 0x3fb8aa3b, v69 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: ds_read_b128 v[68:71], v172 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[86:87], v[90:91], v[32:47] + ; GCN-NEXT: v_exp_f32_e32 v89, v104 + ; GCN-NEXT: v_mul_f32_e32 v104, 0x3fb8aa3b, v72 + ; GCN-NEXT: v_cvt_f16_f32_e32 v72, v92 + ; GCN-NEXT: ds_read_b128 v[84:87], v172 offset:576 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_pack_b32_f16 v80, v64, v72 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[94:95], v[90:91], v[16:31] + ; GCN-NEXT: v_exp_f32_e32 v94, v105 + ; GCN-NEXT: v_cvt_f16_f32_e32 v64, v93 + ; GCN-NEXT: v_mul_f32_e32 v95, 0x3fb8aa3b, v73 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[66:67], v[90:91], v[0:15] + ; GCN-NEXT: v_exp_f32_e32 v105, v65 + ; GCN-NEXT: v_cvt_f16_f32_e32 v65, v88 + ; GCN-NEXT: v_fma_f32 v66, s4, v74, -v128 + ; GCN-NEXT: v_mul_f32_e32 v106, 0x3fb8aa3b, v66 + ; GCN-NEXT: v_fma_f32 v66, s4, v75, -v128 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[82:83], v[90:91], v[48:63] + ; GCN-NEXT: v_exp_f32_e32 v90, v81 + ; GCN-NEXT: v_mul_f32_e32 v91, 0x3fb8aa3b, v66 + ; GCN-NEXT: v_pack_b32_f16 v81, v64, v65 + ; GCN-NEXT: ds_read_b128 v[64:67], v172 offset:1152 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: ds_read_b128 v[72:75], v172 offset:1728 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[68:69], v[80:81], v[32:47] + ; GCN-NEXT: v_fma_f32 v69, s4, v76, -v128 + ; GCN-NEXT: v_cvt_f16_f32_e32 v68, v89 + ; GCN-NEXT: v_mul_f32_e32 v107, 0x3fb8aa3b, v69 + ; GCN-NEXT: v_cvt_f16_f32_e32 v69, v94 + ; GCN-NEXT: v_exp_f32_e32 v104, v104 + ; GCN-NEXT: v_fma_f32 v76, s4, v77, -v128 + ; GCN-NEXT: v_pack_b32_f16 v82, v68, v69 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[84:85], v[80:81], v[16:31] + ; GCN-NEXT: v_exp_f32_e32 v84, v95 + ; GCN-NEXT: v_cvt_f16_f32_e32 v68, v90 + ; GCN-NEXT: v_mul_f32_e32 v85, 0x3fb8aa3b, v76 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[64:65], v[80:81], v[0:15] + ; GCN-NEXT: v_exp_f32_e32 v95, v106 + ; GCN-NEXT: v_cvt_f16_f32_e32 v64, v105 + ; GCN-NEXT: v_fma_f32 v65, s4, v78, -v128 + ; GCN-NEXT: v_mul_f32_e32 v65, 0x3fb8aa3b, v65 + ; GCN-NEXT: v_pack_b32_f16 v83, v64, v68 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[72:73], v[80:81], v[48:63] + ; GCN-NEXT: v_fma_f32 v72, s4, v79, -v128 + ; GCN-NEXT: v_exp_f32_e32 v64, v91 + ; GCN-NEXT: v_cvt_f16_f32_e32 v73, v104 + ; GCN-NEXT: v_cvt_f16_f32_e32 v81, v84 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[70:71], v[82:83], v[32:47] + ; GCN-NEXT: v_exp_f32_e32 v80, v107 + ; GCN-NEXT: ds_read_b128 v[68:71], v171 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: ds_read_b128 v[76:79], v171 offset:576 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[86:87], v[82:83], v[16:31] + ; GCN-NEXT: v_exp_f32_e32 v85, v85 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[66:67], v[82:83], v[0:15] + ; GCN-NEXT: v_exp_f32_e32 v65, v65 + ; GCN-NEXT: v_cvt_f16_f32_e32 v66, v95 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[74:75], v[82:83], v[48:63] ; GCN-NEXT: s_nop 10 - ; GCN-NEXT: v_exp_f32_e32 v52, v128 - ; GCN-NEXT: v_cvt_f16_f32_e32 v50, v137 - ; GCN-NEXT: v_cvt_f16_f32_e32 v51, v142 - ; GCN-NEXT: v_cvt_f16_f32_e32 v54, v138 - ; GCN-NEXT: v_cvt_f16_f32_e32 v53, v52 - ; GCN-NEXT: v_cvt_f16_f32_e32 v49, v79 - ; GCN-NEXT: v_pack_b32_f16 v50, v51, v50 - ; GCN-NEXT: v_pack_b32_f16 v48, v139, v136 - ; GCN-NEXT: v_pack_b32_f16 v51, v54, v53 + ; GCN-NEXT: v_mul_f32_e32 v49, 0x3fb8aa3b, v72 + ; GCN-NEXT: v_exp_f32_e32 v52, v49 + ; GCN-NEXT: v_cvt_f16_f32_e32 v51, v65 + ; GCN-NEXT: v_cvt_f16_f32_e32 v53, v85 + ; GCN-NEXT: v_cvt_f16_f32_e32 v54, v80 + ; GCN-NEXT: v_cvt_f16_f32_e32 v50, v52 + ; GCN-NEXT: v_cvt_f16_f32_e32 v48, v64 + ; GCN-NEXT: v_pack_b32_f16 v51, v51, v50 + ; GCN-NEXT: v_pack_b32_f16 v50, v54, v53 ; GCN-NEXT: v_add_f32_e32 v53, 0, v113 ; GCN-NEXT: v_add_f32_e32 v53, v114, v53 ; GCN-NEXT: v_add_f32_e32 v53, v115, v53 @@ -1087,74 +1085,77 @@ ; GCN-NEXT: v_add_f32_e32 v53, v101, v53 ; GCN-NEXT: v_add_f32_e32 v53, v102, v53 ; GCN-NEXT: v_add_f32_e32 v53, v103, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v104, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v105, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v106, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v107, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v108, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v109, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v110, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v111, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v80, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v81, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v82, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v83, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v84, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v85, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v86, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v87, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v88, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v89, v53 - ; GCN-NEXT: v_pack_b32_f16 v49, v140, v49 - ; GCN-NEXT: v_add_f32_e32 v53, v90, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v91, v53 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[68:69], v[48:49], v[0:15] - ; GCN-NEXT: v_add_f32_e32 v53, v92, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v93, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v94, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v95, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v158, v53 ; GCN-NEXT: v_add_f32_e32 v53, v125, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v160, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v146, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v148, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v129, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v143, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v147, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v149, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v142, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v145, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v152, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v150, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v144, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v151, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v153, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v154, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v156, v53 + ; GCN-NEXT: v_pack_b32_f16 v49, v66, v48 + ; GCN-NEXT: v_pack_b32_f16 v48, v73, v81 + ; GCN-NEXT: v_add_f32_e32 v53, v161, v53 ; GCN-NEXT: v_add_f32_e32 v53, v126, v53 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[68:69], v[48:49], v[32:47] + ; GCN-NEXT: v_add_f32_e32 v53, v130, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v131, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v138, v53 ; GCN-NEXT: v_add_f32_e32 v53, v127, v53 - ; GCN-NEXT: v_add_f32_e32 v53, v129, v53 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[70:71], v[50:51], v[0:15] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[64:65], v[48:49], v[32:47] + ; GCN-NEXT: v_add_f32_e32 v53, v132, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v110, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v136, v53 + ; GCN-NEXT: v_add_f32_e32 v53, v108, v53 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[70:71], v[50:51], v[32:47] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[76:77], v[48:49], v[16:31] ; GCN-NEXT: s_nop 9 - ; GCN-NEXT: v_add_f32_e32 v0, v130, v53 - ; GCN-NEXT: v_add_f32_e32 v0, v131, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v132, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v133, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v72, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v73, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v74, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v75, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v76, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v77, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v78, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v79, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v142, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v137, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v138, v0 - ; GCN-NEXT: v_add_f32_e32 v4, v52, v0 - ; GCN-NEXT: ds_bpermute_b32 v5, v196, v4 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: ds_read_b128 v[0:3], v197 offset:1152 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[0:1], v[48:49], v[16:31] - ; GCN-NEXT: v_add_f32_e32 v2, v4, v5 - ; GCN-NEXT: ds_bpermute_b32 v3, v196, v2 - ; GCN-NEXT: ; implicit-def: $vgpr4 + ; GCN-NEXT: v_add_f32_e32 v32, v109, v53 + ; GCN-NEXT: v_add_f32_e32 v32, v92, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v93, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v88, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v89, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v94, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v105, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v90, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v104, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v84, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v95, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v64, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v80, v32 + ; GCN-NEXT: v_add_f32_e32 v32, v85, v32 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[78:79], v[50:51], v[16:31] + ; GCN-NEXT: s_nop 10 + ; GCN-NEXT: v_add_f32_e32 v16, v65, v32 + ; GCN-NEXT: v_add_f32_e32 v20, v52, v16 + ; GCN-NEXT: ds_bpermute_b32 v21, v170, v20 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: ds_read_b128 v[16:19], v171 offset:1152 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[16:17], v[48:49], v[0:15] + ; GCN-NEXT: v_add_f32_e32 v18, v20, v21 + ; GCN-NEXT: ds_bpermute_b32 v19, v170, v18 + ; GCN-NEXT: ; implicit-def: $vgpr20 ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: v_cndmask_b32_e64 v0, v3, v2, s[12:13] - ; GCN-NEXT: v_fmac_f32_e32 v0, v4, v112 - ; GCN-NEXT: ds_read_b128 v[0:3], v197 offset:1728 + ; GCN-NEXT: s_nop 7 + ; GCN-NEXT: v_cndmask_b32_e64 v0, v19, v18, s[6:7] + ; GCN-NEXT: v_fmac_f32_e32 v0, v20, v112 + ; GCN-NEXT: ds_read_b128 v[0:3], v171 offset:1728 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[66:67], v[50:51], v[32:47] ; GCN-NEXT: s_endpgm attributes #0 = {"amdgpu-flat-work-group-size"="256,256"} diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir index 8dcc737b0c523..8d6bfc07f290f 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir @@ -8,490 +8,487 @@ ; GCN: ; %bb.0: ; GCN-NEXT: ; implicit-def: $vgpr2 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) - ; GCN-NEXT: v_readfirstlane_b32 s20, v2 - ; GCN-NEXT: ; implicit-def: $sgpr4 + ; GCN-NEXT: v_readfirstlane_b32 s4, v2 ; GCN-NEXT: ; implicit-def: $vgpr3 + ; GCN-NEXT: ; implicit-def: $sgpr5 ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1 ; GCN-NEXT: ; implicit-def: $sgpr0_sgpr1_sgpr2_sgpr3 - ; GCN-NEXT: ; implicit-def: $vgpr50 - ; GCN-NEXT: ; implicit-def: $sgpr16_sgpr17_sgpr18_sgpr19 - ; GCN-NEXT: ; implicit-def: $vgpr49 - ; GCN-NEXT: ; implicit-def: $vgpr40_vgpr41_vgpr42_vgpr43 - ; GCN-NEXT: ; implicit-def: $vgpr51 - ; GCN-NEXT: ; implicit-def: $vgpr62_vgpr63_vgpr64_vgpr65 - ; GCN-NEXT: ; implicit-def: $vgpr76 - ; GCN-NEXT: ; implicit-def: $vgpr77 - ; GCN-NEXT: ; implicit-def: $vgpr78 - ; GCN-NEXT: ; implicit-def: $vgpr79 - ; GCN-NEXT: ; implicit-def: $vgpr80 - ; GCN-NEXT: ; implicit-def: $vgpr91 - ; GCN-NEXT: ; kill: killed $sgpr16_sgpr17_sgpr18_sgpr19 + ; GCN-NEXT: ; implicit-def: $vgpr54 + ; GCN-NEXT: ; implicit-def: $vgpr53 + ; GCN-NEXT: ; implicit-def: $vgpr44_vgpr45_vgpr46_vgpr47 + ; GCN-NEXT: ; implicit-def: $vgpr55 + ; GCN-NEXT: ; implicit-def: $sgpr17 + ; GCN-NEXT: ; implicit-def: $sgpr16 + ; GCN-NEXT: ; implicit-def: $vgpr85 + ; GCN-NEXT: ; implicit-def: $vgpr86 + ; GCN-NEXT: v_max_f32_e32 v87, v86, v86 + ; GCN-NEXT: ; implicit-def: $vgpr88 + ; GCN-NEXT: ; implicit-def: $vgpr89 ; GCN-NEXT: ; iglp_opt mask(0x00000002) - ; GCN-NEXT: s_nop 1 - ; GCN-NEXT: v_lshl_add_u32 v2, s20, 4, v3 - ; GCN-NEXT: v_mad_u64_u32 v[4:5], s[4:5], s4, v2, v[0:1] + ; GCN-NEXT: s_nop 0 + ; GCN-NEXT: v_lshl_add_u32 v2, s4, 4, v3 + ; GCN-NEXT: v_mad_u64_u32 v[4:5], s[6:7], s5, v2, v[0:1] ; GCN-NEXT: buffer_load_dwordx4 v[0:3], v4, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: s_lshl_b32 s4, s20, 7 + ; GCN-NEXT: s_lshl_b32 s5, s4, 7 ; GCN-NEXT: ; implicit-def: $vgpr5 - ; GCN-NEXT: v_add_lshl_u32 v48, v5, s4, 1 - ; GCN-NEXT: v_add_u32_e32 v76, s20, v76 - ; GCN-NEXT: v_and_b32_e32 v76, 0x1fffffff, v76 + ; GCN-NEXT: v_add_lshl_u32 v52, v5, s5, 1 + ; GCN-NEXT: ; implicit-def: $sgpr5 ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) - ; GCN-NEXT: ds_write_b128 v48, v[0:3] + ; GCN-NEXT: ds_write_b128 v52, v[0:3] ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_load_dwordx4 v[32:35], v4, s[0:3], 0 offen offset:64 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ; implicit-def: $vgpr0 ; GCN-NEXT: ; implicit-def: $vgpr1 - ; GCN-NEXT: ; implicit-def: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 - ; GCN-NEXT: ; implicit-def: $sgpr6 - ; GCN-NEXT: v_add_u32_e32 v0, v0, v50 - ; GCN-NEXT: v_add_u32_e32 v1, v1, v50 - ; GCN-NEXT: buffer_load_dwordx2 v[72:73], v0, s[16:19], 0 offen sc0 sc1 + ; GCN-NEXT: ; implicit-def: $sgpr0_sgpr1_sgpr2_sgpr3 + ; GCN-NEXT: v_add_u32_e32 v0, v0, v54 + ; GCN-NEXT: v_add_u32_e32 v1, v1, v54 + ; GCN-NEXT: buffer_load_dwordx2 v[40:41], v0, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx2 v[74:75], v1, s[16:19], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[42:43], v1, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: ds_read_b128 v[36:39], v49 + ; GCN-NEXT: ds_read_b128 v[36:39], v53 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[44:47], v49 offset:512 + ; GCN-NEXT: ds_read_b128 v[48:51], v53 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[36:37], v[40:41], 0 ; GCN-NEXT: ; kill: killed $vgpr1 ; GCN-NEXT: ; kill: killed $vgpr0 - ; GCN-NEXT: v_mul_lo_u32 v76, v76, s6 - ; GCN-NEXT: v_add_lshl_u32 v76, v77, v76, 1 - ; GCN-NEXT: v_lshl_add_u32 v77, v78, 1, v76 - ; GCN-NEXT: ; implicit-def: $sgpr5 - ; GCN-NEXT: v_lshl_add_u32 v78, v79, 1, v77 - ; GCN-NEXT: ; implicit-def: $sgpr2 - ; GCN-NEXT: ; implicit-def: $sgpr3 - ; GCN-NEXT: v_lshl_add_u32 v79, v80, 1, v78 - ; GCN-NEXT: ; implicit-def: $sgpr0_sgpr1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[44:45], v[40:41], 0 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[38:39], v[42:43], v[16:31] - ; GCN-NEXT: ds_read_b128 v[36:39], v51 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[36:37], v[44:45], 0 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[48:49], v[44:45], 0 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[38:39], v[46:47], v[16:31] + ; GCN-NEXT: ds_read_b128 v[36:39], v55 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[46:47], v[42:43], v[0:15] - ; GCN-NEXT: ds_read_b128 v[44:47], v51 offset:512 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[50:51], v[46:47], v[0:15] + ; GCN-NEXT: ds_read_b128 v[48:51], v55 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ; implicit-def: $vgpr40_vgpr41_vgpr42_vgpr43 + ; GCN-NEXT: ; implicit-def: $vgpr44_vgpr45_vgpr46_vgpr47 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) - ; GCN-NEXT: ds_write_b128 v48, v[32:35] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[36:37], v[40:41], v[16:31] + ; GCN-NEXT: ds_write_b128 v52, v[32:35] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[36:37], v[44:45], v[16:31] ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: ds_read_b128 v[32:35], v49 + ; GCN-NEXT: ds_read_b128 v[32:35], v53 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[44:45], v[40:41], v[0:15] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[38:39], v[42:43], v[16:31] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[48:49], v[44:45], v[0:15] + ; GCN-NEXT: ; implicit-def: $vgpr48 + ; GCN-NEXT: ; implicit-def: $vgpr49 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[38:39], v[46:47], v[16:31] ; GCN-NEXT: ; implicit-def: $vgpr36_vgpr37_vgpr38_vgpr39 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[46:47], v[42:43], v[0:15] - ; GCN-NEXT: ds_read_b128 v[40:43], v49 offset:512 - ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[68:71], v51 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[50:51], v[46:47], v[0:15] + ; GCN-NEXT: ds_read_b128 v[44:47], v53 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: ; implicit-def: $vgpr50 + ; GCN-NEXT: ; implicit-def: $vgpr51 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[44:45], v[36:37], v[0:15] + ; GCN-NEXT: ; implicit-def: $vgpr44 + ; GCN-NEXT: ; implicit-def: $vgpr45 + ; GCN-NEXT: v_add_u32_e32 v52, v45, v54 + ; GCN-NEXT: v_add_u32_e32 v44, s4, v44 + ; GCN-NEXT: v_and_b32_e32 v44, 0x1fffffff, v44 ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[32:33], v[36:37], v[16:31] - ; GCN-NEXT: ; implicit-def: $vgpr32 - ; GCN-NEXT: ; implicit-def: $vgpr33 - ; GCN-NEXT: v_add_u32_e32 v82, v32, v50 - ; GCN-NEXT: v_add_u32_e32 v83, v33, v50 - ; GCN-NEXT: ; kill: killed $vgpr82 - ; GCN-NEXT: ; kill: killed $vgpr83 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[46:47], v[38:39], v[0:15] + ; GCN-NEXT: ; implicit-def: $vgpr46 + ; GCN-NEXT: v_add_u32_e32 v53, v46, v54 + ; GCN-NEXT: v_mul_lo_u32 v54, v44, s5 + ; GCN-NEXT: v_add_lshl_u32 v48, v48, v54, 1 + ; GCN-NEXT: v_lshl_add_u32 v49, v49, 1, v48 + ; GCN-NEXT: v_lshl_add_u32 v50, v50, 1, v49 + ; GCN-NEXT: v_lshl_add_u32 v84, v51, 1, v50 ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[34:35], v[38:39], v[16:31] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[40:41], v[36:37], v[0:15] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[68:69], v[62:63], v[16:31] - ; GCN-NEXT: ds_read_b128 v[66:69], v51 offset:512 + ; GCN-NEXT: ds_read_b128 v[36:39], v55 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: ds_read_b128 v[44:47], v55 offset:512 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: ; implicit-def: $vgpr32_vgpr33_vgpr34_vgpr35 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[42:43], v[38:39], v[0:15] - ; GCN-NEXT: ; implicit-def: $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[66:67], v[62:63], v[0:15] - ; GCN-NEXT: ; implicit-def: $vgpr66 - ; GCN-NEXT: ; implicit-def: $vgpr67 - ; GCN-NEXT: v_max_f32_e32 v81, v67, v67 - ; GCN-NEXT: ; implicit-def: $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[70:71], v[64:65], v[16:31] - ; GCN-NEXT: v_perm_b32 v70, v74, v72, s2 - ; GCN-NEXT: v_perm_b32 v71, v74, v72, s3 - ; GCN-NEXT: v_perm_b32 v72, v75, v73, s2 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[36:37], v[32:33], v[16:31] + ; GCN-NEXT: v_perm_b32 v36, v42, v40, s17 + ; GCN-NEXT: v_perm_b32 v37, v42, v40, s16 + ; GCN-NEXT: v_perm_b32 v40, v43, v41, s17 ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) - ; GCN-NEXT: ds_write_b32 v76, v70 + ; GCN-NEXT: ds_write_b32 v48, v36 ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b32 v77, v71 + ; GCN-NEXT: ds_write_b32 v49, v37 ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b32 v78, v72 - ; GCN-NEXT: v_mul_f32_e32 v74, s4, v20 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[68:69], v[64:65], v[0:15] - ; GCN-NEXT: v_mul_f32_e32 v64, s4, v16 - ; GCN-NEXT: v_mul_f32_e32 v65, s4, v17 - ; GCN-NEXT: v_mul_f32_e32 v68, s4, v18 - ; GCN-NEXT: v_mul_f32_e32 v69, s4, v19 - ; GCN-NEXT: v_max3_f32 v64, v64, s5, v65 - ; GCN-NEXT: v_mul_f32_e32 v80, s4, v21 - ; GCN-NEXT: v_max3_f32 v64, v64, v68, v69 - ; GCN-NEXT: v_mul_f32_e32 v84, s4, v22 - ; GCN-NEXT: v_mul_f32_e32 v85, s4, v23 - ; GCN-NEXT: v_max3_f32 v64, v64, v74, v80 - ; GCN-NEXT: v_mul_f32_e32 v86, s4, v24 - ; GCN-NEXT: v_mul_f32_e32 v87, s4, v25 - ; GCN-NEXT: v_max3_f32 v64, v64, v84, v85 - ; GCN-NEXT: v_mul_f32_e32 v65, s4, v26 - ; GCN-NEXT: v_mul_f32_e32 v68, s4, v27 - ; GCN-NEXT: v_max3_f32 v64, v64, v86, v87 - ; GCN-NEXT: v_mul_f32_e32 v69, s4, v28 - ; GCN-NEXT: v_mul_f32_e32 v74, s4, v29 - ; GCN-NEXT: v_max3_f32 v64, v64, v65, v68 - ; GCN-NEXT: v_mul_f32_e32 v80, s4, v30 - ; GCN-NEXT: v_mul_f32_e32 v84, s4, v31 - ; GCN-NEXT: v_max3_f32 v64, v64, v69, v74 - ; GCN-NEXT: v_mul_f32_e32 v85, s4, v0 - ; GCN-NEXT: v_mul_f32_e32 v86, s4, v1 - ; GCN-NEXT: v_max3_f32 v64, v64, v80, v84 - ; GCN-NEXT: v_mul_f32_e32 v87, s4, v2 - ; GCN-NEXT: v_mul_f32_e32 v65, s4, v3 - ; GCN-NEXT: v_max3_f32 v64, v64, v85, v86 - ; GCN-NEXT: v_mul_f32_e32 v68, s4, v4 - ; GCN-NEXT: v_mul_f32_e32 v69, s4, v5 - ; GCN-NEXT: v_max3_f32 v64, v64, v87, v65 - ; GCN-NEXT: v_mul_f32_e32 v74, s4, v6 - ; GCN-NEXT: v_mul_f32_e32 v80, s4, v7 - ; GCN-NEXT: v_max3_f32 v64, v64, v68, v69 - ; GCN-NEXT: v_mul_f32_e32 v84, s4, v8 - ; GCN-NEXT: v_mul_f32_e32 v85, s4, v9 - ; GCN-NEXT: v_max3_f32 v64, v64, v74, v80 - ; GCN-NEXT: v_mul_f32_e32 v86, s4, v10 - ; GCN-NEXT: v_mul_f32_e32 v65, s4, v11 - ; GCN-NEXT: v_max3_f32 v64, v64, v84, v85 - ; GCN-NEXT: v_mul_f32_e32 v87, s4, v12 - ; GCN-NEXT: v_mul_f32_e32 v68, s4, v13 - ; GCN-NEXT: v_max3_f32 v64, v64, v86, v65 - ; GCN-NEXT: v_mul_f32_e32 v69, s4, v14 - ; GCN-NEXT: v_mul_f32_e32 v74, s4, v15 - ; GCN-NEXT: v_max3_f32 v64, v64, v87, v68 - ; GCN-NEXT: v_max3_f32 v64, v64, v69, v74 - ; GCN-NEXT: ds_bpermute_b32 v65, v66, v64 - ; GCN-NEXT: v_perm_b32 v68, v75, v73, s3 + ; GCN-NEXT: ds_write_b32 v50, v40 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[44:45], v[32:33], v[0:15] + ; GCN-NEXT: v_perm_b32 v32, v43, v41, s16 ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b32 v79, v68 - ; GCN-NEXT: ; implicit-def: $vgpr84 - ; GCN-NEXT: v_max_f32_e32 v65, v65, v65 - ; GCN-NEXT: v_max_f32_e32 v70, v64, v65 + ; GCN-NEXT: ds_write_b32 v84, v32 ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: buffer_load_dwordx2 v[64:65], v82, s[16:19], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[64:65], v52, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: buffer_load_dwordx2 v[68:69], v83, s[16:19], 0 offen sc0 sc1 + ; GCN-NEXT: buffer_load_dwordx2 v[66:67], v53, s[0:3], 0 offen sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_bpermute_b32 v71, v66, v70 + ; GCN-NEXT: ; implicit-def: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 + ; GCN-NEXT: ; implicit-def: $sgpr0 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND + ; GCN-NEXT: ; implicit-def: $sgpr2 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[16:31], v[38:39], v[34:35], v[16:31] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[0:15], v[46:47], v[34:35], v[0:15] + ; GCN-NEXT: s_nop 9 + ; GCN-NEXT: v_mul_f32_e32 v32, s4, v16 + ; GCN-NEXT: v_mul_f32_e32 v33, s4, v17 + ; GCN-NEXT: v_mul_f32_e32 v34, s4, v18 + ; GCN-NEXT: v_mul_f32_e32 v35, s4, v19 + ; GCN-NEXT: v_max3_f32 v32, v32, s0, v33 + ; GCN-NEXT: v_mul_f32_e32 v36, s4, v20 + ; GCN-NEXT: v_mul_f32_e32 v37, s4, v21 + ; GCN-NEXT: v_max3_f32 v32, v32, v34, v35 + ; GCN-NEXT: v_mul_f32_e32 v38, s4, v22 + ; GCN-NEXT: v_mul_f32_e32 v39, s4, v23 + ; GCN-NEXT: v_max3_f32 v32, v32, v36, v37 + ; GCN-NEXT: v_mul_f32_e32 v40, s4, v24 + ; GCN-NEXT: v_mul_f32_e32 v41, s4, v25 + ; GCN-NEXT: v_max3_f32 v32, v32, v38, v39 + ; GCN-NEXT: v_mul_f32_e32 v42, s4, v26 + ; GCN-NEXT: v_mul_f32_e32 v43, s4, v27 + ; GCN-NEXT: v_max3_f32 v32, v32, v40, v41 + ; GCN-NEXT: v_mul_f32_e32 v44, s4, v28 + ; GCN-NEXT: v_mul_f32_e32 v45, s4, v29 + ; GCN-NEXT: v_max3_f32 v32, v32, v42, v43 + ; GCN-NEXT: v_mul_f32_e32 v46, s4, v30 + ; GCN-NEXT: v_mul_f32_e32 v47, s4, v31 + ; GCN-NEXT: v_max3_f32 v32, v32, v44, v45 + ; GCN-NEXT: v_mul_f32_e32 v51, s4, v0 + ; GCN-NEXT: v_mul_f32_e32 v52, s4, v1 + ; GCN-NEXT: v_max3_f32 v32, v32, v46, v47 + ; GCN-NEXT: v_mul_f32_e32 v53, s4, v2 + ; GCN-NEXT: v_mul_f32_e32 v54, s4, v3 + ; GCN-NEXT: v_max3_f32 v32, v32, v51, v52 + ; GCN-NEXT: v_mul_f32_e32 v55, s4, v4 + ; GCN-NEXT: v_mul_f32_e32 v56, s4, v5 + ; GCN-NEXT: v_max3_f32 v32, v32, v53, v54 + ; GCN-NEXT: v_mul_f32_e32 v57, s4, v6 + ; GCN-NEXT: v_mul_f32_e32 v58, s4, v7 + ; GCN-NEXT: v_max3_f32 v32, v32, v55, v56 + ; GCN-NEXT: v_mul_f32_e32 v59, s4, v8 + ; GCN-NEXT: v_mul_f32_e32 v60, s4, v9 + ; GCN-NEXT: v_max3_f32 v32, v32, v57, v58 + ; GCN-NEXT: v_mul_f32_e32 v61, s4, v10 + ; GCN-NEXT: v_mul_f32_e32 v62, s4, v11 + ; GCN-NEXT: v_max3_f32 v32, v32, v59, v60 + ; GCN-NEXT: v_mul_f32_e32 v63, s4, v12 + ; GCN-NEXT: v_mul_f32_e32 v68, s4, v13 + ; GCN-NEXT: v_max3_f32 v32, v32, v61, v62 + ; GCN-NEXT: v_mul_f32_e32 v69, s4, v14 + ; GCN-NEXT: v_mul_f32_e32 v70, s4, v15 + ; GCN-NEXT: v_max3_f32 v32, v32, v63, v68 + ; GCN-NEXT: v_max3_f32 v51, v32, v69, v70 + ; GCN-NEXT: ds_bpermute_b32 v52, v85, v51 + ; GCN-NEXT: ; implicit-def: $sgpr0_sgpr1 ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: v_cndmask_b32_e64 v70, v71, v70, s[0:1] - ; GCN-NEXT: v_max_f32_e32 v70, v70, v70 - ; GCN-NEXT: v_max_f32_e32 v72, v81, v70 - ; GCN-NEXT: v_fma_f32 v16, s4, v16, -v72 - ; GCN-NEXT: v_fma_f32 v17, s4, v17, -v72 - ; GCN-NEXT: v_fma_f32 v18, s4, v18, -v72 - ; GCN-NEXT: v_fma_f32 v19, s4, v19, -v72 - ; GCN-NEXT: v_mul_f32_e32 v16, 0x3fb8aa3b, v16 - ; GCN-NEXT: v_mul_f32_e32 v17, 0x3fb8aa3b, v17 - ; GCN-NEXT: v_mul_f32_e32 v18, 0x3fb8aa3b, v18 - ; GCN-NEXT: v_mul_f32_e32 v19, 0x3fb8aa3b, v19 - ; GCN-NEXT: v_fma_f32 v20, s4, v20, -v72 - ; GCN-NEXT: v_fma_f32 v21, s4, v21, -v72 - ; GCN-NEXT: v_fma_f32 v22, s4, v22, -v72 - ; GCN-NEXT: v_fma_f32 v23, s4, v23, -v72 - ; GCN-NEXT: v_exp_f32_e32 v73, v16 - ; GCN-NEXT: v_exp_f32_e32 v17, v17 - ; GCN-NEXT: v_exp_f32_e32 v74, v18 - ; GCN-NEXT: v_exp_f32_e32 v75, v19 - ; GCN-NEXT: v_mul_f32_e32 v20, 0x3fb8aa3b, v20 - ; GCN-NEXT: v_mul_f32_e32 v21, 0x3fb8aa3b, v21 - ; GCN-NEXT: v_mul_f32_e32 v22, 0x3fb8aa3b, v22 - ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v73 - ; GCN-NEXT: v_fma_f32 v18, s4, v24, -v72 - ; GCN-NEXT: v_exp_f32_e32 v80, v20 - ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v17 - ; GCN-NEXT: v_fma_f32 v20, s4, v25, -v72 - ; GCN-NEXT: v_exp_f32_e32 v81, v21 - ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v74 - ; GCN-NEXT: v_fma_f32 v26, s4, v26, -v72 - ; GCN-NEXT: v_exp_f32_e32 v82, v22 - ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v75 - ; GCN-NEXT: v_mul_f32_e32 v23, 0x3fb8aa3b, v23 - ; GCN-NEXT: v_sub_f32_e32 v24, v67, v72 - ; GCN-NEXT: v_pack_b32_f16 v70, v16, v19 - ; GCN-NEXT: v_pack_b32_f16 v71, v21, v22 - ; GCN-NEXT: v_fma_f32 v67, s4, v27, -v72 - ; GCN-NEXT: v_exp_f32_e32 v83, v23 - ; GCN-NEXT: v_mul_f32_e32 v22, 0x3fb8aa3b, v18 - ; GCN-NEXT: v_mul_f32_e32 v23, 0x3fb8aa3b, v20 - ; GCN-NEXT: ds_read_b128 v[18:21], v84 + ; GCN-NEXT: ds_read_b128 v[68:71], v88 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mul_f32_e32 v24, 0x3fb8aa3b, v24 - ; GCN-NEXT: v_exp_f32_e32 v16, v24 - ; GCN-NEXT: v_perm_b32 v90, v69, v65, s2 - ; GCN-NEXT: v_pk_mul_f32 v[48:49], v[48:49], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[50:51], v[50:51], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[52:53], v[52:53], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[54:55], v[54:55], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[56:57], v[56:57], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[58:59], v[58:59], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[60:61], v[60:61], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[62:63], v[62:63], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[32:33], v[32:33], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[34:35], v[34:35], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[18:19], v[70:71], v[48:63] - ; GCN-NEXT: v_add_f32_e32 v18, 0, v73 - ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v80 - ; GCN-NEXT: v_fma_f32 v73, s4, v28, -v72 - ; GCN-NEXT: v_exp_f32_e32 v85, v22 - ; GCN-NEXT: v_cvt_f16_f32_e32 v86, v81 - ; GCN-NEXT: v_fma_f32 v87, s4, v29, -v72 - ; GCN-NEXT: v_exp_f32_e32 v88, v23 - ; GCN-NEXT: ds_read_b128 v[22:25], v84 offset:576 + ; GCN-NEXT: ds_read_b128 v[72:75], v88 offset:576 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_pk_mul_f32 v[36:37], v[36:37], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[38:39], v[38:39], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[40:41], v[40:41], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[42:43], v[42:43], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[44:45], v[44:45], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_pk_mul_f32 v[46:47], v[46:47], v[16:17] op_sel_hi:[1,0] - ; GCN-NEXT: v_perm_b32 v65, v69, v65, s3 - ; GCN-NEXT: s_nop 0 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[22:23], v[70:71], v[32:47] - ; GCN-NEXT: v_add_f32_e32 v17, v17, v18 - ; GCN-NEXT: v_mul_f32_e32 v18, 0x3fb8aa3b, v26 - ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v82 - ; GCN-NEXT: v_fma_f32 v23, s4, v30, -v72 - ; GCN-NEXT: v_exp_f32_e32 v30, v18 - ; GCN-NEXT: v_cvt_f16_f32_e32 v89, v83 - ; GCN-NEXT: v_fma_f32 v18, s4, v31, -v72 - ; GCN-NEXT: v_perm_b32 v31, v68, v64, s2 - ; GCN-NEXT: v_perm_b32 v64, v68, v64, s3 - ; GCN-NEXT: ds_read_b128 v[26:29], v91 + ; GCN-NEXT: ds_read_b128 v[76:79], v89 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: ds_read_b128 v[68:71], v91 offset:576 + ; GCN-NEXT: ds_read_b128 v[80:83], v89 offset:576 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 + ; GCN-NEXT: v_max_f32_e32 v52, v52, v52 + ; GCN-NEXT: v_max_f32_e32 v51, v51, v52 + ; GCN-NEXT: ds_bpermute_b32 v52, v85, v51 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND + ; GCN-NEXT: ; implicit-def: $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47 + ; GCN-NEXT: s_waitcnt lgkmcnt(0) + ; GCN-NEXT: v_cndmask_b32_e64 v90, v52, v51, s[0:1] + ; GCN-NEXT: v_perm_b32 v51, v66, v64, s17 + ; GCN-NEXT: v_perm_b32 v52, v66, v64, s16 + ; GCN-NEXT: v_max_f32_e32 v64, v90, v90 + ; GCN-NEXT: v_max_f32_e32 v64, v87, v64 + ; GCN-NEXT: v_fma_f32 v16, s4, v16, -v64 + ; GCN-NEXT: v_fma_f32 v17, s4, v17, -v64 + ; GCN-NEXT: v_fma_f32 v18, s4, v18, -v64 + ; GCN-NEXT: v_fma_f32 v19, s4, v19, -v64 + ; GCN-NEXT: v_mul_f32_e32 v16, 0x3fb8aa3b, v16 + ; GCN-NEXT: v_mul_f32_e32 v17, 0x3fb8aa3b, v17 + ; GCN-NEXT: v_mul_f32_e32 v18, 0x3fb8aa3b, v18 + ; GCN-NEXT: v_mul_f32_e32 v19, 0x3fb8aa3b, v19 + ; GCN-NEXT: v_fma_f32 v20, s4, v20, -v64 + ; GCN-NEXT: v_fma_f32 v21, s4, v21, -v64 + ; GCN-NEXT: v_fma_f32 v22, s4, v22, -v64 + ; GCN-NEXT: v_fma_f32 v23, s4, v23, -v64 + ; GCN-NEXT: v_sub_f32_e32 v66, v86, v64 + ; GCN-NEXT: v_exp_f32_e32 v86, v16 + ; GCN-NEXT: v_exp_f32_e32 v87, v17 + ; GCN-NEXT: v_exp_f32_e32 v90, v18 + ; GCN-NEXT: v_exp_f32_e32 v91, v19 + ; GCN-NEXT: v_perm_b32 v53, v67, v65, s17 + ; GCN-NEXT: v_mul_f32_e32 v20, 0x3fb8aa3b, v20 + ; GCN-NEXT: v_mul_f32_e32 v21, 0x3fb8aa3b, v21 + ; GCN-NEXT: v_mul_f32_e32 v22, 0x3fb8aa3b, v22 + ; GCN-NEXT: v_mul_f32_e32 v23, 0x3fb8aa3b, v23 + ; GCN-NEXT: v_mul_f32_e32 v66, 0x3fb8aa3b, v66 + ; GCN-NEXT: v_perm_b32 v18, v67, v65, s16 ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) - ; GCN-NEXT: ds_write_b32 v76, v31 - ; GCN-NEXT: v_mul_f32_e32 v31, 0x3fb8aa3b, v67 - ; GCN-NEXT: v_exp_f32_e32 v31, v31 - ; GCN-NEXT: v_mul_f32_e32 v67, 0x3fb8aa3b, v18 - ; GCN-NEXT: v_pack_b32_f16 v18, v19, v86 - ; GCN-NEXT: v_pack_b32_f16 v19, v22, v89 + ; GCN-NEXT: ds_write_b32 v48, v51 ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b32 v77, v64 + ; GCN-NEXT: ds_write_b32 v49, v52 ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b32 v78, v90 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[20:21], v[18:19], v[48:63] + ; GCN-NEXT: ds_write_b32 v50, v53 + ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v86 + ; GCN-NEXT: v_fma_f32 v17, s4, v24, -v64 + ; GCN-NEXT: v_exp_f32_e32 v92, v20 + ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v87 + ; GCN-NEXT: v_fma_f32 v20, s4, v25, -v64 + ; GCN-NEXT: v_exp_f32_e32 v25, v21 ; GCN-NEXT: buffer_wbl2 sc0 sc1 ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) - ; GCN-NEXT: ds_write_b32 v79, v65 - ; GCN-NEXT: v_mul_f32_e32 v64, 0x3fb8aa3b, v73 - ; GCN-NEXT: v_mul_f32_e32 v65, 0x3fb8aa3b, v87 - ; GCN-NEXT: v_mul_f32_e32 v23, 0x3fb8aa3b, v23 - ; GCN-NEXT: v_add_f32_e32 v17, v74, v17 - ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v85 - ; GCN-NEXT: v_fma_f32 v0, s4, v0, -v72 - ; GCN-NEXT: v_exp_f32_e32 v22, v64 - ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v88 - ; GCN-NEXT: v_fma_f32 v1, s4, v1, -v72 - ; GCN-NEXT: v_exp_f32_e32 v64, v65 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[24:25], v[18:19], v[32:47] - ; GCN-NEXT: v_add_f32_e32 v17, v75, v17 - ; GCN-NEXT: v_cvt_f16_f32_e32 v18, v30 - ; GCN-NEXT: v_fma_f32 v2, s4, v2, -v72 - ; GCN-NEXT: v_exp_f32_e32 v23, v23 - ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v31 - ; GCN-NEXT: v_fma_f32 v24, s4, v3, -v72 - ; GCN-NEXT: v_exp_f32_e32 v25, v67 - ; GCN-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v0 - ; GCN-NEXT: v_mul_f32_e32 v65, 0x3fb8aa3b, v1 - ; GCN-NEXT: v_pack_b32_f16 v0, v20, v21 - ; GCN-NEXT: v_pack_b32_f16 v1, v18, v19 + ; GCN-NEXT: ds_write_b32 v84, v18 + ; GCN-NEXT: v_cvt_f16_f32_e32 v18, v90 + ; GCN-NEXT: v_fma_f32 v21, s4, v26, -v64 + ; GCN-NEXT: v_exp_f32_e32 v65, v22 + ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v91 + ; GCN-NEXT: v_fma_f32 v26, s4, v27, -v64 + ; GCN-NEXT: v_exp_f32_e32 v67, v23 + ; GCN-NEXT: v_exp_f32_e32 v24, v66 + ; GCN-NEXT: ; implicit-def: $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63 + ; GCN-NEXT: v_mul_f32_e32 v23, 0x3fb8aa3b, v17 + ; GCN-NEXT: v_pack_b32_f16 v17, v18, v22 + ; GCN-NEXT: v_pack_b32_f16 v16, v16, v19 + ; GCN-NEXT: v_pk_mul_f32 v[32:33], v[32:33], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[34:35], v[34:35], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[36:37], v[36:37], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[38:39], v[38:39], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[40:41], v[40:41], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[42:43], v[42:43], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[44:45], v[44:45], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[46:47], v[46:47], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_mul_f32_e32 v20, 0x3fb8aa3b, v20 + ; GCN-NEXT: v_pk_mul_f32 v[48:49], v[48:49], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[50:51], v[50:51], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[52:53], v[52:53], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[54:55], v[54:55], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[56:57], v[56:57], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[58:59], v[58:59], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[60:61], v[60:61], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_pk_mul_f32 v[62:63], v[62:63], v[24:25] op_sel_hi:[1,0] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[68:69], v[16:17], v[32:47] + ; GCN-NEXT: v_add_f32_e32 v18, 0, v86 + ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v92 + ; GCN-NEXT: v_fma_f32 v28, s4, v28, -v64 + ; GCN-NEXT: v_exp_f32_e32 v68, v23 + ; GCN-NEXT: v_cvt_f16_f32_e32 v23, v25 + ; GCN-NEXT: v_fma_f32 v29, s4, v29, -v64 + ; GCN-NEXT: v_exp_f32_e32 v69, v20 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[72:73], v[16:17], v[48:63] + ; GCN-NEXT: v_mul_f32_e32 v21, 0x3fb8aa3b, v21 + ; GCN-NEXT: v_add_f32_e32 v72, v87, v18 + ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v65 + ; GCN-NEXT: v_fma_f32 v30, s4, v30, -v64 + ; GCN-NEXT: v_exp_f32_e32 v73, v21 + ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v67 + ; GCN-NEXT: v_mul_f32_e32 v66, 0x3fb8aa3b, v26 + ; GCN-NEXT: v_pack_b32_f16 v26, v22, v23 + ; GCN-NEXT: v_fma_f32 v31, s4, v31, -v64 + ; GCN-NEXT: v_pack_b32_f16 v27, v20, v21 + ; GCN-NEXT: v_exp_f32_e32 v66, v66 + ; GCN-NEXT: v_mul_f32_e32 v28, 0x3fb8aa3b, v28 + ; GCN-NEXT: v_mul_f32_e32 v29, 0x3fb8aa3b, v29 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[70:71], v[26:27], v[32:47] + ; GCN-NEXT: v_add_f32_e32 v70, v90, v72 + ; GCN-NEXT: v_cvt_f16_f32_e32 v71, v68 + ; GCN-NEXT: v_fma_f32 v0, s4, v0, -v64 + ; GCN-NEXT: v_exp_f32_e32 v28, v28 + ; GCN-NEXT: v_cvt_f16_f32_e32 v72, v69 + ; GCN-NEXT: v_fma_f32 v1, s4, v1, -v64 + ; GCN-NEXT: v_exp_f32_e32 v29, v29 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[74:75], v[26:27], v[48:63] + ; GCN-NEXT: v_mul_f32_e32 v30, 0x3fb8aa3b, v30 + ; GCN-NEXT: v_add_f32_e32 v26, v91, v70 + ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v73 + ; GCN-NEXT: v_fma_f32 v2, s4, v2, -v64 + ; GCN-NEXT: v_exp_f32_e32 v30, v30 + ; GCN-NEXT: v_cvt_f16_f32_e32 v70, v66 + ; GCN-NEXT: v_mul_f32_e32 v31, 0x3fb8aa3b, v31 + ; GCN-NEXT: v_fma_f32 v3, s4, v3, -v64 + ; GCN-NEXT: v_exp_f32_e32 v31, v31 + ; GCN-NEXT: v_mul_f32_e32 v74, 0x3fb8aa3b, v0 + ; GCN-NEXT: v_mul_f32_e32 v75, 0x3fb8aa3b, v1 + ; GCN-NEXT: v_pack_b32_f16 v0, v71, v72 + ; GCN-NEXT: v_pack_b32_f16 v1, v27, v70 ; GCN-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND - ; GCN-NEXT: v_mul_f32_e32 v24, 0x3fb8aa3b, v24 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[26:27], v[0:1], v[48:63] - ; GCN-NEXT: v_add_f32_e32 v17, v80, v17 - ; GCN-NEXT: v_cvt_f16_f32_e32 v18, v22 - ; GCN-NEXT: v_fma_f32 v26, s4, v4, -v72 - ; GCN-NEXT: v_exp_f32_e32 v27, v3 - ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v64 - ; GCN-NEXT: v_fma_f32 v67, s4, v5, -v72 - ; GCN-NEXT: v_exp_f32_e32 v65, v65 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[68:69], v[0:1], v[32:47] - ; GCN-NEXT: v_add_f32_e32 v17, v81, v17 - ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v23 - ; GCN-NEXT: v_fma_f32 v6, s4, v6, -v72 - ; GCN-NEXT: v_exp_f32_e32 v68, v2 - ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v25 + ; GCN-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[76:77], v[0:1], v[32:47] + ; GCN-NEXT: v_add_f32_e32 v26, v92, v26 + ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v28 + ; GCN-NEXT: v_fma_f32 v4, s4, v4, -v64 + ; GCN-NEXT: v_exp_f32_e32 v70, v74 + ; GCN-NEXT: v_cvt_f16_f32_e32 v71, v29 + ; GCN-NEXT: v_fma_f32 v5, s4, v5, -v64 + ; GCN-NEXT: v_exp_f32_e32 v72, v75 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[80:81], v[0:1], v[48:63] + ; GCN-NEXT: v_add_f32_e32 v25, v25, v26 + ; GCN-NEXT: v_cvt_f16_f32_e32 v1, v30 + ; GCN-NEXT: v_fma_f32 v0, s4, v6, -v64 + ; GCN-NEXT: v_exp_f32_e32 v2, v2 + ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v31 ; GCN-NEXT: s_waitcnt lgkmcnt(0) - ; GCN-NEXT: ds_read_b128 v[0:3], v84 + ; GCN-NEXT: ds_read_b128 v[16:19], v88 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_pack_b32_f16 v4, v18, v4 - ; GCN-NEXT: v_fma_f32 v7, s4, v7, -v72 - ; GCN-NEXT: v_pack_b32_f16 v5, v5, v19 - ; GCN-NEXT: v_exp_f32_e32 v24, v24 - ; GCN-NEXT: ds_read_b128 v[18:21], v84 offset:576 + ; GCN-NEXT: v_fma_f32 v7, s4, v7, -v64 + ; GCN-NEXT: v_exp_f32_e32 v3, v3 + ; GCN-NEXT: v_mul_f32_e32 v26, 0x3fb8aa3b, v0 + ; GCN-NEXT: v_pack_b32_f16 v0, v27, v71 + ; GCN-NEXT: v_pack_b32_f16 v1, v1, v6 + ; GCN-NEXT: ds_read_b128 v[20:23], v88 offset:576 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[28:29], v[4:5], v[48:63] - ; GCN-NEXT: v_mul_f32_e32 v26, 0x3fb8aa3b, v26 - ; GCN-NEXT: v_mul_f32_e32 v67, 0x3fb8aa3b, v67 - ; GCN-NEXT: v_mul_f32_e32 v6, 0x3fb8aa3b, v6 - ; GCN-NEXT: v_add_f32_e32 v17, v82, v17 - ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v27 - ; GCN-NEXT: v_fma_f32 v8, s4, v8, -v72 + ; GCN-NEXT: v_mul_f32_e32 v4, 0x3fb8aa3b, v4 + ; GCN-NEXT: v_mul_f32_e32 v5, 0x3fb8aa3b, v5 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[78:79], v[0:1], v[32:47] + ; GCN-NEXT: v_add_f32_e32 v6, v65, v25 + ; GCN-NEXT: v_cvt_f16_f32_e32 v25, v70 + ; GCN-NEXT: v_fma_f32 v8, s4, v8, -v64 + ; GCN-NEXT: v_exp_f32_e32 v4, v4 + ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v72 + ; GCN-NEXT: v_fma_f32 v9, s4, v9, -v64 + ; GCN-NEXT: v_exp_f32_e32 v5, v5 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[82:83], v[0:1], v[48:63] + ; GCN-NEXT: v_add_f32_e32 v6, v67, v6 + ; GCN-NEXT: v_cvt_f16_f32_e32 v1, v2 + ; GCN-NEXT: v_fma_f32 v10, s4, v10, -v64 ; GCN-NEXT: v_exp_f32_e32 v26, v26 - ; GCN-NEXT: v_cvt_f16_f32_e32 v29, v65 - ; GCN-NEXT: v_fma_f32 v9, s4, v9, -v72 - ; GCN-NEXT: v_exp_f32_e32 v67, v67 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[70:71], v[4:5], v[32:47] - ; GCN-NEXT: v_add_f32_e32 v17, v83, v17 - ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v68 - ; GCN-NEXT: v_fma_f32 v10, s4, v10, -v72 - ; GCN-NEXT: v_exp_f32_e32 v6, v6 - ; GCN-NEXT: v_cvt_f16_f32_e32 v69, v24 + ; GCN-NEXT: v_cvt_f16_f32_e32 v65, v3 ; GCN-NEXT: v_mul_f32_e32 v7, 0x3fb8aa3b, v7 - ; GCN-NEXT: v_fma_f32 v11, s4, v11, -v72 + ; GCN-NEXT: v_fma_f32 v11, s4, v11, -v64 ; GCN-NEXT: v_exp_f32_e32 v7, v7 - ; GCN-NEXT: v_pack_b32_f16 v4, v28, v29 - ; GCN-NEXT: v_pack_b32_f16 v5, v5, v69 + ; GCN-NEXT: v_pack_b32_f16 v0, v25, v27 + ; GCN-NEXT: v_pack_b32_f16 v1, v1, v65 ; GCN-NEXT: v_mul_f32_e32 v8, 0x3fb8aa3b, v8 ; GCN-NEXT: v_mul_f32_e32 v9, 0x3fb8aa3b, v9 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[0:1], v[4:5], v[48:63] - ; GCN-NEXT: v_add_f32_e32 v0, v85, v17 - ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v26 - ; GCN-NEXT: v_fma_f32 v12, s4, v12, -v72 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[16:17], v[0:1], v[32:47] + ; GCN-NEXT: v_add_f32_e32 v6, v68, v6 + ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v4 + ; GCN-NEXT: v_fma_f32 v12, s4, v12, -v64 ; GCN-NEXT: v_exp_f32_e32 v8, v8 - ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v67 - ; GCN-NEXT: v_fma_f32 v13, s4, v13, -v72 + ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v5 + ; GCN-NEXT: v_fma_f32 v13, s4, v13, -v64 ; GCN-NEXT: v_exp_f32_e32 v9, v9 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[18:19], v[4:5], v[32:47] - ; GCN-NEXT: v_add_f32_e32 v4, v88, v0 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[20:21], v[0:1], v[48:63] ; GCN-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v10 - ; GCN-NEXT: v_cvt_f16_f32_e32 v1, v6 - ; GCN-NEXT: v_fma_f32 v5, s4, v14, -v72 - ; GCN-NEXT: v_exp_f32_e32 v10, v0 + ; GCN-NEXT: v_add_f32_e32 v6, v69, v6 + ; GCN-NEXT: v_cvt_f16_f32_e32 v1, v26 + ; GCN-NEXT: v_fma_f32 v10, s4, v14, -v64 + ; GCN-NEXT: v_exp_f32_e32 v14, v0 ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v7 ; GCN-NEXT: v_mul_f32_e32 v11, 0x3fb8aa3b, v11 - ; GCN-NEXT: v_fma_f32 v14, s4, v15, -v72 + ; GCN-NEXT: v_fma_f32 v15, s4, v15, -v64 ; GCN-NEXT: v_exp_f32_e32 v11, v11 ; GCN-NEXT: v_pack_b32_f16 v1, v1, v0 - ; GCN-NEXT: v_pack_b32_f16 v0, v17, v28 - ; GCN-NEXT: ; implicit-def: $sgpr2 - ; GCN-NEXT: s_nop 1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[2:3], v[0:1], v[48:63] - ; GCN-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v12 - ; GCN-NEXT: v_add_f32_e32 v2, v30, v4 - ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v8 - ; GCN-NEXT: v_exp_f32_e32 v12, v3 - ; GCN-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v13 - ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v9 - ; GCN-NEXT: v_exp_f32_e32 v15, v3 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[20:21], v[0:1], v[32:47] - ; GCN-NEXT: v_add_f32_e32 v0, v31, v2 - ; GCN-NEXT: v_add_f32_e32 v0, v22, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v64, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v23, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v25, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v27, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v65, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v68, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v24, v0 + ; GCN-NEXT: v_pack_b32_f16 v0, v16, v17 + ; GCN-NEXT: v_mul_f32_e32 v12, 0x3fb8aa3b, v12 + ; GCN-NEXT: v_mul_f32_e32 v13, 0x3fb8aa3b, v13 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[18:19], v[0:1], v[32:47] + ; GCN-NEXT: v_add_f32_e32 v6, v73, v6 + ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v8 + ; GCN-NEXT: v_exp_f32_e32 v12, v12 + ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v9 + ; GCN-NEXT: v_exp_f32_e32 v13, v13 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[22:23], v[0:1], v[48:63] + ; GCN-NEXT: v_add_f32_e32 v0, v66, v6 + ; GCN-NEXT: v_add_f32_e32 v0, v28, v0 + ; GCN-NEXT: v_add_f32_e32 v0, v29, v0 + ; GCN-NEXT: v_add_f32_e32 v0, v30, v0 + ; GCN-NEXT: v_add_f32_e32 v0, v31, v0 + ; GCN-NEXT: v_add_f32_e32 v0, v70, v0 + ; GCN-NEXT: v_add_f32_e32 v0, v72, v0 + ; GCN-NEXT: v_add_f32_e32 v0, v2, v0 + ; GCN-NEXT: v_add_f32_e32 v0, v3, v0 + ; GCN-NEXT: v_add_f32_e32 v0, v4, v0 + ; GCN-NEXT: v_add_f32_e32 v0, v5, v0 + ; GCN-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v10 ; GCN-NEXT: v_add_f32_e32 v0, v26, v0 - ; GCN-NEXT: v_add_f32_e32 v0, v67, v0 - ; GCN-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v5 - ; GCN-NEXT: v_add_f32_e32 v0, v6, v0 - ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v10 - ; GCN-NEXT: v_exp_f32_e32 v17, v1 - ; GCN-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v14 + ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v14 + ; GCN-NEXT: v_exp_f32_e32 v10, v1 + ; GCN-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v15 ; GCN-NEXT: v_add_f32_e32 v0, v7, v0 - ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v11 + ; GCN-NEXT: v_cvt_f16_f32_e32 v15, v11 ; GCN-NEXT: v_exp_f32_e32 v18, v1 - ; GCN-NEXT: v_add_f32_e32 v6, v8, v0 - ; GCN-NEXT: ds_read_b128 v[0:3], v91 + ; GCN-NEXT: v_add_f32_e32 v4, v8, v0 + ; GCN-NEXT: ds_read_b128 v[0:3], v89 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_add_f32_e32 v6, v9, v6 - ; GCN-NEXT: v_pack_b32_f16 v9, v5, v14 - ; GCN-NEXT: v_pack_b32_f16 v8, v4, v13 - ; GCN-NEXT: v_add_f32_e32 v6, v10, v6 - ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v18 - ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v15 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[0:1], v[8:9], v[48:63] - ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v17 - ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v12 - ; GCN-NEXT: v_add_f32_e32 v6, v11, v6 - ; GCN-NEXT: v_add_f32_e32 v6, v12, v6 - ; GCN-NEXT: v_add_f32_e32 v1, v15, v6 - ; GCN-NEXT: v_add_f32_e32 v11, v17, v1 - ; GCN-NEXT: v_pack_b32_f16 v1, v0, v7 - ; GCN-NEXT: v_pack_b32_f16 v0, v4, v10 - ; GCN-NEXT: ds_read_b128 v[4:7], v91 offset:576 + ; GCN-NEXT: v_add_f32_e32 v4, v9, v4 + ; GCN-NEXT: v_pack_b32_f16 v9, v6, v15 + ; GCN-NEXT: v_pack_b32_f16 v8, v16, v17 + ; GCN-NEXT: v_add_f32_e32 v4, v14, v4 + ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v18 + ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v13 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[0:1], v[8:9], v[32:47] + ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v10 + ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v12 + ; GCN-NEXT: v_add_f32_e32 v4, v11, v4 + ; GCN-NEXT: v_add_f32_e32 v4, v12, v4 + ; GCN-NEXT: v_add_f32_e32 v1, v13, v4 + ; GCN-NEXT: v_add_f32_e32 v10, v10, v1 + ; GCN-NEXT: v_pack_b32_f16 v1, v0, v5 + ; GCN-NEXT: v_pack_b32_f16 v0, v6, v7 + ; GCN-NEXT: ds_read_b128 v[4:7], v89 offset:576 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: buffer_inv sc0 sc1 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[4:5], v[8:9], v[32:47] + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[4:5], v[8:9], v[48:63] ; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: s_waitcnt vmcnt(8) ; GCN-NEXT: ;;#ASMEND ; GCN-NEXT: v_mov_b32_e32 v4, 0 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[2:3], v[0:1], v[48:63] - ; GCN-NEXT: v_add_f32_e32 v2, v18, v11 - ; GCN-NEXT: ds_bpermute_b32 v3, v66, v2 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[2:3], v[0:1], v[32:47] + ; GCN-NEXT: v_add_f32_e32 v2, v18, v10 + ; GCN-NEXT: ds_bpermute_b32 v3, v85, v2 ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: v_add_f32_e32 v2, v2, v3 - ; GCN-NEXT: ds_bpermute_b32 v3, v66, v2 - ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[32:47], v[6:7], v[0:1], v[32:47] + ; GCN-NEXT: ds_bpermute_b32 v3, v85, v2 + ; GCN-NEXT: v_mfma_f32_32x32x8_f16 v[48:63], v[6:7], v[0:1], v[48:63] ; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: v_cndmask_b32_e64 v2, v3, v2, s[0:1] - ; GCN-NEXT: v_fmac_f32_e32 v2, v4, v16 + ; GCN-NEXT: v_fmac_f32_e32 v2, v4, v24 ; GCN-NEXT: s_endpgm attributes #0 = {"amdgpu-flat-work-group-size"="256,256"} diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll index d1b25582fba9b..d85cd88e026c6 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll @@ -123,68 +123,109 @@ define amdgpu_kernel void @test_iglp_opt_mfma_gemm(ptr addrspace(3) noalias %in, ; GISEL: ; %bb.0: ; %entry ; GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0 -; GISEL-NEXT: v_lshlrev_b32_e32 v33, 7, v0 -; GISEL-NEXT: v_mov_b32_e32 v32, 1.0 -; GISEL-NEXT: v_mov_b32_e32 v34, 2.0 +; GISEL-NEXT: v_lshlrev_b32_e32 v0, 7, v0 +; GISEL-NEXT: v_mov_b32_e32 v1, 1.0 +; GISEL-NEXT: v_mov_b32_e32 v2, 2.0 ; GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GISEL-NEXT: v_add_u32_e32 v0, s0, v33 -; GISEL-NEXT: ds_read_b128 a[96:99], v0 offset:8192 -; GISEL-NEXT: ds_read_b128 a[100:103], v0 offset:8208 -; GISEL-NEXT: ds_read_b128 a[104:107], v0 offset:8224 -; GISEL-NEXT: ds_read_b128 a[108:111], v0 offset:8240 -; GISEL-NEXT: ds_read_b128 a[112:115], v0 offset:8256 -; GISEL-NEXT: ds_read_b128 a[116:119], v0 offset:8272 -; GISEL-NEXT: ds_read_b128 a[120:123], v0 offset:8288 -; GISEL-NEXT: ds_read_b128 a[124:127], v0 offset:8304 +; GISEL-NEXT: v_add_u32_e32 v3, s0, v0 +; GISEL-NEXT: ds_read_b128 a[128:131], v3 offset:8192 +; GISEL-NEXT: ds_read_b128 a[132:135], v3 offset:8208 +; GISEL-NEXT: ds_read_b128 a[136:139], v3 offset:8224 +; GISEL-NEXT: ds_read_b128 a[140:143], v3 offset:8240 +; GISEL-NEXT: ds_read_b128 a[144:147], v3 offset:8256 +; GISEL-NEXT: ds_read_b128 a[148:151], v3 offset:8272 +; GISEL-NEXT: ds_read_b128 a[152:155], v3 offset:8288 +; GISEL-NEXT: ds_read_b128 a[156:159], v3 offset:8304 ; GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[96:127], v32, v34, a[96:127] -; GISEL-NEXT: ds_read_b128 a[0:3], v0 offset:24576 -; GISEL-NEXT: ds_read_b128 a[4:7], v0 offset:24592 -; GISEL-NEXT: ds_read_b128 a[8:11], v0 offset:24608 -; GISEL-NEXT: ds_read_b128 a[12:15], v0 offset:24624 -; GISEL-NEXT: ds_read_b128 a[16:19], v0 offset:24640 -; GISEL-NEXT: ds_read_b128 a[20:23], v0 offset:24656 -; GISEL-NEXT: ds_read_b128 a[24:27], v0 offset:24672 -; GISEL-NEXT: ds_read_b128 a[28:31], v0 offset:24688 -; GISEL-NEXT: v_add_u32_e32 v1, 0xc000, v0 -; GISEL-NEXT: ds_read_b128 a[152:155], v0 offset:96 -; GISEL-NEXT: ds_read_b128 a[156:159], v0 offset:112 -; GISEL-NEXT: v_add_u32_e32 v33, s1, v33 +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[128:159], v1, v2, a[128:159] +; GISEL-NEXT: ds_read_b128 a[0:3], v3 offset:24576 +; GISEL-NEXT: ds_read_b128 a[4:7], v3 offset:24592 +; GISEL-NEXT: ds_read_b128 a[8:11], v3 offset:24608 +; GISEL-NEXT: ds_read_b128 a[12:15], v3 offset:24624 +; GISEL-NEXT: ds_read_b128 a[16:19], v3 offset:24640 +; GISEL-NEXT: ds_read_b128 a[20:23], v3 offset:24656 +; GISEL-NEXT: ds_read_b128 a[24:27], v3 offset:24672 +; GISEL-NEXT: ds_read_b128 a[28:31], v3 offset:24688 +; GISEL-NEXT: v_add_u32_e32 v4, 0xc000, v3 +; GISEL-NEXT: ds_read_b128 a[120:123], v3 offset:96 +; GISEL-NEXT: ds_read_b128 a[124:127], v3 offset:112 +; GISEL-NEXT: v_add_u32_e32 v56, s1, v0 +; GISEL-NEXT: v_mov_b32_e32 v64, s1 ; GISEL-NEXT: ; iglp_opt mask(0x00000000) ; GISEL-NEXT: s_waitcnt lgkmcnt(2) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v32, v34, a[0:31] -; GISEL-NEXT: ds_read_b128 a[32:35], v0 offset:49152 -; GISEL-NEXT: ds_read_b128 a[36:39], v0 offset:49168 -; GISEL-NEXT: ds_read_b128 a[40:43], v0 offset:49184 -; GISEL-NEXT: ds_read_b128 a[44:47], v0 offset:49200 -; GISEL-NEXT: ds_read_b128 a[48:51], v0 offset:49216 -; GISEL-NEXT: ds_read_b128 a[52:55], v0 offset:49232 -; GISEL-NEXT: ds_read_b128 a[56:59], v0 offset:49248 -; GISEL-NEXT: ds_read_b128 a[60:63], v0 offset:49264 +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v1, v2, a[0:31] +; GISEL-NEXT: ds_read_b128 a[32:35], v3 offset:49152 +; GISEL-NEXT: ds_read_b128 a[36:39], v3 offset:49168 +; GISEL-NEXT: ds_read_b128 a[40:43], v3 offset:49184 +; GISEL-NEXT: ds_read_b128 a[44:47], v3 offset:49200 +; GISEL-NEXT: ds_read_b128 a[48:51], v3 offset:49216 +; GISEL-NEXT: ds_read_b128 a[52:55], v3 offset:49232 +; GISEL-NEXT: ds_read_b128 a[56:59], v3 offset:49248 +; GISEL-NEXT: ds_read_b128 a[60:63], v3 offset:49264 ; GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[32:63], v32, v34, a[32:63] -; GISEL-NEXT: ds_read_b128 a[64:67], v1 offset:32768 -; GISEL-NEXT: ds_read_b128 a[68:71], v1 offset:32784 -; GISEL-NEXT: ds_read_b128 a[72:75], v1 offset:32800 -; GISEL-NEXT: ds_read_b128 a[76:79], v1 offset:32816 -; GISEL-NEXT: ds_read_b128 a[80:83], v1 offset:32832 -; GISEL-NEXT: ds_read_b128 a[84:87], v1 offset:32848 -; GISEL-NEXT: ds_read_b128 a[88:91], v1 offset:32864 -; GISEL-NEXT: ds_read_b128 a[92:95], v1 offset:32880 +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[32:63], v1, v2, a[32:63] +; GISEL-NEXT: ds_read_b128 a[64:67], v4 offset:32768 +; GISEL-NEXT: ds_read_b128 a[68:71], v4 offset:32784 +; GISEL-NEXT: ds_read_b128 a[72:75], v4 offset:32800 +; GISEL-NEXT: ds_read_b128 a[76:79], v4 offset:32816 +; GISEL-NEXT: ds_read_b128 a[80:83], v4 offset:32832 +; GISEL-NEXT: ds_read_b128 a[84:87], v4 offset:32848 +; GISEL-NEXT: ds_read_b128 a[88:91], v4 offset:32864 +; GISEL-NEXT: ds_read_b128 a[92:95], v4 offset:32880 ; GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[64:95], v32, v34, a[64:95] -; GISEL-NEXT: ds_read_b128 a[128:131], v0 -; GISEL-NEXT: ds_read_b128 a[132:135], v0 offset:16 -; GISEL-NEXT: ds_read_b128 a[136:139], v0 offset:32 -; GISEL-NEXT: ds_read_b128 a[140:143], v0 offset:48 -; GISEL-NEXT: ds_read_b128 a[144:147], v0 offset:64 -; GISEL-NEXT: ds_read_b128 a[148:151], v0 offset:80 +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[64:95], v1, v2, a[64:95] +; GISEL-NEXT: ds_read_b128 a[96:99], v3 +; GISEL-NEXT: ds_read_b128 a[100:103], v3 offset:16 +; GISEL-NEXT: ds_read_b128 a[104:107], v3 offset:32 +; GISEL-NEXT: ds_read_b128 a[108:111], v3 offset:48 +; GISEL-NEXT: ds_read_b128 a[112:115], v3 offset:64 +; GISEL-NEXT: ds_read_b128 a[116:119], v3 offset:80 ; GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[128:159], v32, v34, a[128:159] -; GISEL-NEXT: v_mov_b32_e32 v32, s1 +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[96:127], v1, v2, a[96:127] ; GISEL-NEXT: s_nop 15 -; GISEL-NEXT: s_nop 1 +; GISEL-NEXT: s_nop 2 +; GISEL-NEXT: v_accvgpr_read_b32 v24, a96 +; GISEL-NEXT: v_accvgpr_read_b32 v25, a97 +; GISEL-NEXT: v_accvgpr_read_b32 v26, a98 +; GISEL-NEXT: v_accvgpr_read_b32 v27, a99 +; GISEL-NEXT: v_accvgpr_read_b32 v28, a100 +; GISEL-NEXT: v_accvgpr_read_b32 v29, a101 +; GISEL-NEXT: v_accvgpr_read_b32 v30, a102 +; GISEL-NEXT: v_accvgpr_read_b32 v31, a103 +; GISEL-NEXT: v_accvgpr_read_b32 v32, a104 +; GISEL-NEXT: v_accvgpr_read_b32 v33, a105 +; GISEL-NEXT: v_accvgpr_read_b32 v34, a106 +; GISEL-NEXT: v_accvgpr_read_b32 v35, a107 +; GISEL-NEXT: v_accvgpr_read_b32 v36, a108 +; GISEL-NEXT: v_accvgpr_read_b32 v37, a109 +; GISEL-NEXT: v_accvgpr_read_b32 v38, a110 +; GISEL-NEXT: v_accvgpr_read_b32 v39, a111 +; GISEL-NEXT: v_accvgpr_read_b32 v40, a112 +; GISEL-NEXT: v_accvgpr_read_b32 v41, a113 +; GISEL-NEXT: v_accvgpr_read_b32 v42, a114 +; GISEL-NEXT: v_accvgpr_read_b32 v43, a115 +; GISEL-NEXT: v_accvgpr_read_b32 v44, a116 +; GISEL-NEXT: v_accvgpr_read_b32 v45, a117 +; GISEL-NEXT: v_accvgpr_read_b32 v46, a118 +; GISEL-NEXT: v_accvgpr_read_b32 v47, a119 +; GISEL-NEXT: v_accvgpr_read_b32 v48, a120 +; GISEL-NEXT: v_accvgpr_read_b32 v49, a121 +; GISEL-NEXT: v_accvgpr_read_b32 v50, a122 +; GISEL-NEXT: v_accvgpr_read_b32 v51, a123 +; GISEL-NEXT: v_accvgpr_read_b32 v52, a124 +; GISEL-NEXT: v_accvgpr_read_b32 v53, a125 +; GISEL-NEXT: v_accvgpr_read_b32 v54, a126 +; GISEL-NEXT: v_accvgpr_read_b32 v55, a127 +; GISEL-NEXT: ds_write_b128 v56, v[24:27] +; GISEL-NEXT: ds_write_b128 v56, v[28:31] offset:16 ; GISEL-NEXT: v_accvgpr_read_b32 v0, a128 +; GISEL-NEXT: ds_write_b128 v56, v[32:35] offset:32 +; GISEL-NEXT: ds_write_b128 v56, v[36:39] offset:48 +; GISEL-NEXT: ds_write_b128 v56, v[40:43] offset:64 +; GISEL-NEXT: ds_write_b128 v56, v[44:47] offset:80 +; GISEL-NEXT: ds_write_b128 v56, v[48:51] offset:96 +; GISEL-NEXT: ds_write_b128 v56, v[52:55] offset:112 +; GISEL-NEXT: v_accvgpr_read_b32 v63, a31 ; GISEL-NEXT: v_accvgpr_read_b32 v1, a129 ; GISEL-NEXT: v_accvgpr_read_b32 v2, a130 ; GISEL-NEXT: v_accvgpr_read_b32 v3, a131 @@ -216,95 +257,55 @@ define amdgpu_kernel void @test_iglp_opt_mfma_gemm(ptr addrspace(3) noalias %in, ; GISEL-NEXT: v_accvgpr_read_b32 v29, a157 ; GISEL-NEXT: v_accvgpr_read_b32 v30, a158 ; GISEL-NEXT: v_accvgpr_read_b32 v31, a159 -; GISEL-NEXT: ds_write_b128 v33, v[0:3] -; GISEL-NEXT: ds_write_b128 v33, v[4:7] offset:16 -; GISEL-NEXT: ds_write_b128 v33, v[8:11] offset:32 -; GISEL-NEXT: ds_write_b128 v33, v[12:15] offset:48 -; GISEL-NEXT: ds_write_b128 v33, v[16:19] offset:64 -; GISEL-NEXT: ds_write_b128 v33, v[20:23] offset:80 -; GISEL-NEXT: ds_write_b128 v33, v[24:27] offset:96 -; GISEL-NEXT: ds_write_b128 v33, v[28:31] offset:112 -; GISEL-NEXT: v_accvgpr_read_b32 v0, a96 -; GISEL-NEXT: v_accvgpr_read_b32 v1, a97 -; GISEL-NEXT: v_accvgpr_read_b32 v2, a98 -; GISEL-NEXT: v_accvgpr_read_b32 v3, a99 -; GISEL-NEXT: v_accvgpr_read_b32 v4, a100 -; GISEL-NEXT: v_accvgpr_read_b32 v5, a101 -; GISEL-NEXT: v_accvgpr_read_b32 v6, a102 -; GISEL-NEXT: v_accvgpr_read_b32 v7, a103 -; GISEL-NEXT: v_accvgpr_read_b32 v8, a104 -; GISEL-NEXT: v_accvgpr_read_b32 v9, a105 -; GISEL-NEXT: v_accvgpr_read_b32 v10, a106 -; GISEL-NEXT: v_accvgpr_read_b32 v11, a107 -; GISEL-NEXT: v_accvgpr_read_b32 v12, a108 -; GISEL-NEXT: v_accvgpr_read_b32 v13, a109 -; GISEL-NEXT: v_accvgpr_read_b32 v14, a110 -; GISEL-NEXT: v_accvgpr_read_b32 v15, a111 -; GISEL-NEXT: v_accvgpr_read_b32 v16, a112 -; GISEL-NEXT: v_accvgpr_read_b32 v17, a113 -; GISEL-NEXT: v_accvgpr_read_b32 v18, a114 -; GISEL-NEXT: v_accvgpr_read_b32 v19, a115 -; GISEL-NEXT: v_accvgpr_read_b32 v20, a116 -; GISEL-NEXT: v_accvgpr_read_b32 v21, a117 -; GISEL-NEXT: v_accvgpr_read_b32 v22, a118 -; GISEL-NEXT: v_accvgpr_read_b32 v23, a119 -; GISEL-NEXT: v_accvgpr_read_b32 v24, a120 -; GISEL-NEXT: v_accvgpr_read_b32 v25, a121 -; GISEL-NEXT: v_accvgpr_read_b32 v26, a122 -; GISEL-NEXT: v_accvgpr_read_b32 v27, a123 -; GISEL-NEXT: v_accvgpr_read_b32 v28, a124 -; GISEL-NEXT: v_accvgpr_read_b32 v29, a125 -; GISEL-NEXT: v_accvgpr_read_b32 v30, a126 -; GISEL-NEXT: v_accvgpr_read_b32 v31, a127 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:8192 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:8208 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:8224 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:8240 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:8256 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:8272 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:8288 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:8304 -; GISEL-NEXT: v_accvgpr_read_b32 v0, a0 -; GISEL-NEXT: v_accvgpr_read_b32 v1, a1 -; GISEL-NEXT: v_accvgpr_read_b32 v2, a2 -; GISEL-NEXT: v_accvgpr_read_b32 v3, a3 -; GISEL-NEXT: v_accvgpr_read_b32 v4, a4 -; GISEL-NEXT: v_accvgpr_read_b32 v5, a5 -; GISEL-NEXT: v_accvgpr_read_b32 v6, a6 -; GISEL-NEXT: v_accvgpr_read_b32 v7, a7 -; GISEL-NEXT: v_accvgpr_read_b32 v8, a8 -; GISEL-NEXT: v_accvgpr_read_b32 v9, a9 -; GISEL-NEXT: v_accvgpr_read_b32 v10, a10 -; GISEL-NEXT: v_accvgpr_read_b32 v11, a11 -; GISEL-NEXT: v_accvgpr_read_b32 v12, a12 -; GISEL-NEXT: v_accvgpr_read_b32 v13, a13 -; GISEL-NEXT: v_accvgpr_read_b32 v14, a14 -; GISEL-NEXT: v_accvgpr_read_b32 v15, a15 -; GISEL-NEXT: v_accvgpr_read_b32 v16, a16 -; GISEL-NEXT: v_accvgpr_read_b32 v17, a17 -; GISEL-NEXT: v_accvgpr_read_b32 v18, a18 -; GISEL-NEXT: v_accvgpr_read_b32 v19, a19 -; GISEL-NEXT: v_accvgpr_read_b32 v20, a20 -; GISEL-NEXT: v_accvgpr_read_b32 v21, a21 -; GISEL-NEXT: v_accvgpr_read_b32 v22, a22 -; GISEL-NEXT: v_accvgpr_read_b32 v23, a23 -; GISEL-NEXT: v_accvgpr_read_b32 v24, a24 -; GISEL-NEXT: v_accvgpr_read_b32 v25, a25 -; GISEL-NEXT: v_accvgpr_read_b32 v26, a26 -; GISEL-NEXT: v_accvgpr_read_b32 v27, a27 -; GISEL-NEXT: v_accvgpr_read_b32 v28, a28 -; GISEL-NEXT: v_accvgpr_read_b32 v29, a29 -; GISEL-NEXT: v_accvgpr_read_b32 v30, a30 -; GISEL-NEXT: v_accvgpr_read_b32 v31, a31 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:16384 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:16400 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:16416 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:16432 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:16448 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:16464 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:16480 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:16496 +; GISEL-NEXT: v_accvgpr_read_b32 v62, a30 +; GISEL-NEXT: v_accvgpr_read_b32 v61, a29 +; GISEL-NEXT: v_accvgpr_read_b32 v60, a28 +; GISEL-NEXT: v_accvgpr_read_b32 v59, a27 +; GISEL-NEXT: v_accvgpr_read_b32 v58, a26 +; GISEL-NEXT: v_accvgpr_read_b32 v57, a25 +; GISEL-NEXT: v_accvgpr_read_b32 v56, a24 +; GISEL-NEXT: v_accvgpr_read_b32 v55, a23 +; GISEL-NEXT: v_accvgpr_read_b32 v54, a22 +; GISEL-NEXT: v_accvgpr_read_b32 v53, a21 +; GISEL-NEXT: v_accvgpr_read_b32 v52, a20 +; GISEL-NEXT: v_accvgpr_read_b32 v51, a19 +; GISEL-NEXT: v_accvgpr_read_b32 v50, a18 +; GISEL-NEXT: v_accvgpr_read_b32 v49, a17 +; GISEL-NEXT: v_accvgpr_read_b32 v48, a16 +; GISEL-NEXT: v_accvgpr_read_b32 v47, a15 +; GISEL-NEXT: v_accvgpr_read_b32 v46, a14 +; GISEL-NEXT: v_accvgpr_read_b32 v45, a13 +; GISEL-NEXT: v_accvgpr_read_b32 v44, a12 +; GISEL-NEXT: v_accvgpr_read_b32 v43, a11 +; GISEL-NEXT: v_accvgpr_read_b32 v42, a10 +; GISEL-NEXT: v_accvgpr_read_b32 v41, a9 +; GISEL-NEXT: v_accvgpr_read_b32 v40, a8 +; GISEL-NEXT: v_accvgpr_read_b32 v39, a7 +; GISEL-NEXT: v_accvgpr_read_b32 v38, a6 +; GISEL-NEXT: v_accvgpr_read_b32 v37, a5 +; GISEL-NEXT: v_accvgpr_read_b32 v36, a4 +; GISEL-NEXT: v_accvgpr_read_b32 v35, a3 +; GISEL-NEXT: v_accvgpr_read_b32 v34, a2 +; GISEL-NEXT: v_accvgpr_read_b32 v33, a1 +; GISEL-NEXT: v_accvgpr_read_b32 v32, a0 +; GISEL-NEXT: ds_write_b128 v64, v[0:3] offset:8192 +; GISEL-NEXT: ds_write_b128 v64, v[4:7] offset:8208 +; GISEL-NEXT: ds_write_b128 v64, v[8:11] offset:8224 +; GISEL-NEXT: ds_write_b128 v64, v[12:15] offset:8240 +; GISEL-NEXT: ds_write_b128 v64, v[16:19] offset:8256 +; GISEL-NEXT: ds_write_b128 v64, v[20:23] offset:8272 +; GISEL-NEXT: ds_write_b128 v64, v[24:27] offset:8288 +; GISEL-NEXT: ds_write_b128 v64, v[28:31] offset:8304 +; GISEL-NEXT: ds_write_b128 v64, v[32:35] offset:16384 +; GISEL-NEXT: ds_write_b128 v64, v[36:39] offset:16400 ; GISEL-NEXT: v_accvgpr_read_b32 v0, a32 +; GISEL-NEXT: ds_write_b128 v64, v[40:43] offset:16416 +; GISEL-NEXT: ds_write_b128 v64, v[44:47] offset:16432 +; GISEL-NEXT: ds_write_b128 v64, v[48:51] offset:16448 +; GISEL-NEXT: ds_write_b128 v64, v[52:55] offset:16464 +; GISEL-NEXT: ds_write_b128 v64, v[56:59] offset:16480 +; GISEL-NEXT: ds_write_b128 v64, v[60:63] offset:16496 +; GISEL-NEXT: v_accvgpr_read_b32 v32, a64 ; GISEL-NEXT: v_accvgpr_read_b32 v1, a33 ; GISEL-NEXT: v_accvgpr_read_b32 v2, a34 ; GISEL-NEXT: v_accvgpr_read_b32 v3, a35 @@ -336,54 +337,53 @@ define amdgpu_kernel void @test_iglp_opt_mfma_gemm(ptr addrspace(3) noalias %in, ; GISEL-NEXT: v_accvgpr_read_b32 v29, a61 ; GISEL-NEXT: v_accvgpr_read_b32 v30, a62 ; GISEL-NEXT: v_accvgpr_read_b32 v31, a63 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:24576 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:24592 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:24608 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:24624 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:24640 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:24656 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:24672 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:24688 -; GISEL-NEXT: v_accvgpr_read_b32 v0, a64 -; GISEL-NEXT: v_accvgpr_read_b32 v1, a65 -; GISEL-NEXT: v_accvgpr_read_b32 v2, a66 -; GISEL-NEXT: v_accvgpr_read_b32 v3, a67 -; GISEL-NEXT: v_accvgpr_read_b32 v4, a68 -; GISEL-NEXT: v_accvgpr_read_b32 v5, a69 -; GISEL-NEXT: v_accvgpr_read_b32 v6, a70 -; GISEL-NEXT: v_accvgpr_read_b32 v7, a71 -; GISEL-NEXT: v_accvgpr_read_b32 v8, a72 -; GISEL-NEXT: v_accvgpr_read_b32 v9, a73 -; GISEL-NEXT: v_accvgpr_read_b32 v10, a74 -; GISEL-NEXT: v_accvgpr_read_b32 v11, a75 -; GISEL-NEXT: v_accvgpr_read_b32 v12, a76 -; GISEL-NEXT: v_accvgpr_read_b32 v13, a77 -; GISEL-NEXT: v_accvgpr_read_b32 v14, a78 -; GISEL-NEXT: v_accvgpr_read_b32 v15, a79 -; GISEL-NEXT: v_accvgpr_read_b32 v16, a80 -; GISEL-NEXT: v_accvgpr_read_b32 v17, a81 -; GISEL-NEXT: v_accvgpr_read_b32 v18, a82 -; GISEL-NEXT: v_accvgpr_read_b32 v19, a83 -; GISEL-NEXT: v_accvgpr_read_b32 v20, a84 -; GISEL-NEXT: v_accvgpr_read_b32 v21, a85 -; GISEL-NEXT: v_accvgpr_read_b32 v22, a86 -; GISEL-NEXT: v_accvgpr_read_b32 v23, a87 -; GISEL-NEXT: v_accvgpr_read_b32 v24, a88 -; GISEL-NEXT: v_accvgpr_read_b32 v25, a89 -; GISEL-NEXT: v_accvgpr_read_b32 v26, a90 -; GISEL-NEXT: v_accvgpr_read_b32 v27, a91 -; GISEL-NEXT: v_accvgpr_read_b32 v28, a92 -; GISEL-NEXT: v_accvgpr_read_b32 v29, a93 -; GISEL-NEXT: v_accvgpr_read_b32 v30, a94 -; GISEL-NEXT: v_accvgpr_read_b32 v31, a95 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:32768 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:32784 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:32800 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:32816 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:32832 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:32848 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:32864 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:32880 +; GISEL-NEXT: v_accvgpr_read_b32 v33, a65 +; GISEL-NEXT: v_accvgpr_read_b32 v34, a66 +; GISEL-NEXT: v_accvgpr_read_b32 v35, a67 +; GISEL-NEXT: v_accvgpr_read_b32 v36, a68 +; GISEL-NEXT: v_accvgpr_read_b32 v37, a69 +; GISEL-NEXT: v_accvgpr_read_b32 v38, a70 +; GISEL-NEXT: v_accvgpr_read_b32 v39, a71 +; GISEL-NEXT: v_accvgpr_read_b32 v40, a72 +; GISEL-NEXT: v_accvgpr_read_b32 v41, a73 +; GISEL-NEXT: v_accvgpr_read_b32 v42, a74 +; GISEL-NEXT: v_accvgpr_read_b32 v43, a75 +; GISEL-NEXT: v_accvgpr_read_b32 v44, a76 +; GISEL-NEXT: v_accvgpr_read_b32 v45, a77 +; GISEL-NEXT: v_accvgpr_read_b32 v46, a78 +; GISEL-NEXT: v_accvgpr_read_b32 v47, a79 +; GISEL-NEXT: v_accvgpr_read_b32 v48, a80 +; GISEL-NEXT: v_accvgpr_read_b32 v49, a81 +; GISEL-NEXT: v_accvgpr_read_b32 v50, a82 +; GISEL-NEXT: v_accvgpr_read_b32 v51, a83 +; GISEL-NEXT: v_accvgpr_read_b32 v52, a84 +; GISEL-NEXT: v_accvgpr_read_b32 v53, a85 +; GISEL-NEXT: v_accvgpr_read_b32 v54, a86 +; GISEL-NEXT: v_accvgpr_read_b32 v55, a87 +; GISEL-NEXT: v_accvgpr_read_b32 v56, a88 +; GISEL-NEXT: v_accvgpr_read_b32 v57, a89 +; GISEL-NEXT: v_accvgpr_read_b32 v58, a90 +; GISEL-NEXT: v_accvgpr_read_b32 v59, a91 +; GISEL-NEXT: v_accvgpr_read_b32 v60, a92 +; GISEL-NEXT: v_accvgpr_read_b32 v61, a93 +; GISEL-NEXT: v_accvgpr_read_b32 v62, a94 +; GISEL-NEXT: v_accvgpr_read_b32 v63, a95 +; GISEL-NEXT: ds_write_b128 v64, v[0:3] offset:24576 +; GISEL-NEXT: ds_write_b128 v64, v[4:7] offset:24592 +; GISEL-NEXT: ds_write_b128 v64, v[8:11] offset:24608 +; GISEL-NEXT: ds_write_b128 v64, v[12:15] offset:24624 +; GISEL-NEXT: ds_write_b128 v64, v[16:19] offset:24640 +; GISEL-NEXT: ds_write_b128 v64, v[20:23] offset:24656 +; GISEL-NEXT: ds_write_b128 v64, v[24:27] offset:24672 +; GISEL-NEXT: ds_write_b128 v64, v[28:31] offset:24688 +; GISEL-NEXT: ds_write_b128 v64, v[32:35] offset:32768 +; GISEL-NEXT: ds_write_b128 v64, v[36:39] offset:32784 +; GISEL-NEXT: ds_write_b128 v64, v[40:43] offset:32800 +; GISEL-NEXT: ds_write_b128 v64, v[44:47] offset:32816 +; GISEL-NEXT: ds_write_b128 v64, v[48:51] offset:32832 +; GISEL-NEXT: ds_write_b128 v64, v[52:55] offset:32848 +; GISEL-NEXT: ds_write_b128 v64, v[56:59] offset:32864 +; GISEL-NEXT: ds_write_b128 v64, v[60:63] offset:32880 ; GISEL-NEXT: s_endpgm entry: call void @llvm.amdgcn.iglp.opt(i32 0) @@ -551,7 +551,8 @@ define amdgpu_kernel void @test_iglp_opt_rev_mfma_gemm(ptr addrspace(3) noalias ; GISEL-NEXT: ds_read_b128 a[56:59], v0 offset:8288 ; GISEL-NEXT: ds_read_b128 a[60:63], v0 offset:8304 ; GISEL-NEXT: v_add_u32_e32 v1, 0xc000, v0 -; GISEL-NEXT: v_add_u32_e32 v32, s1, v32 +; GISEL-NEXT: v_add_u32_e32 v64, s1, v32 +; GISEL-NEXT: v_mov_b32_e32 v65, s1 ; GISEL-NEXT: ; iglp_opt mask(0x00000001) ; GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[32:63], v33, v34, a[32:63] @@ -617,56 +618,47 @@ define amdgpu_kernel void @test_iglp_opt_rev_mfma_gemm(ptr addrspace(3) noalias ; GISEL-NEXT: v_accvgpr_read_b32 v29, a29 ; GISEL-NEXT: v_accvgpr_read_b32 v30, a30 ; GISEL-NEXT: v_accvgpr_read_b32 v31, a31 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:16 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:32 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:48 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:64 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:80 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:96 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:112 -; GISEL-NEXT: v_accvgpr_read_b32 v0, a32 -; GISEL-NEXT: v_accvgpr_read_b32 v1, a33 -; GISEL-NEXT: v_accvgpr_read_b32 v2, a34 -; GISEL-NEXT: v_accvgpr_read_b32 v3, a35 -; GISEL-NEXT: v_accvgpr_read_b32 v4, a36 -; GISEL-NEXT: v_accvgpr_read_b32 v5, a37 -; GISEL-NEXT: v_accvgpr_read_b32 v6, a38 -; GISEL-NEXT: v_accvgpr_read_b32 v7, a39 -; GISEL-NEXT: v_accvgpr_read_b32 v8, a40 -; GISEL-NEXT: v_accvgpr_read_b32 v9, a41 -; GISEL-NEXT: v_accvgpr_read_b32 v10, a42 -; GISEL-NEXT: v_accvgpr_read_b32 v11, a43 -; GISEL-NEXT: v_accvgpr_read_b32 v12, a44 -; GISEL-NEXT: v_accvgpr_read_b32 v13, a45 -; GISEL-NEXT: v_accvgpr_read_b32 v14, a46 -; GISEL-NEXT: v_accvgpr_read_b32 v15, a47 -; GISEL-NEXT: v_accvgpr_read_b32 v16, a48 -; GISEL-NEXT: v_accvgpr_read_b32 v17, a49 -; GISEL-NEXT: v_accvgpr_read_b32 v18, a50 -; GISEL-NEXT: v_accvgpr_read_b32 v19, a51 -; GISEL-NEXT: v_accvgpr_read_b32 v20, a52 -; GISEL-NEXT: v_accvgpr_read_b32 v21, a53 -; GISEL-NEXT: v_accvgpr_read_b32 v22, a54 -; GISEL-NEXT: v_accvgpr_read_b32 v23, a55 -; GISEL-NEXT: v_accvgpr_read_b32 v24, a56 -; GISEL-NEXT: v_accvgpr_read_b32 v25, a57 -; GISEL-NEXT: v_accvgpr_read_b32 v26, a58 -; GISEL-NEXT: v_accvgpr_read_b32 v27, a59 -; GISEL-NEXT: v_accvgpr_read_b32 v28, a60 -; GISEL-NEXT: v_accvgpr_read_b32 v29, a61 -; GISEL-NEXT: v_accvgpr_read_b32 v30, a62 -; GISEL-NEXT: v_accvgpr_read_b32 v31, a63 -; GISEL-NEXT: v_mov_b32_e32 v32, s1 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:8192 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:8208 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:8224 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:8240 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:8256 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:8272 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:8288 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:8304 +; GISEL-NEXT: ds_write_b128 v64, v[0:3] +; GISEL-NEXT: ds_write_b128 v64, v[4:7] offset:16 +; GISEL-NEXT: v_accvgpr_read_b32 v32, a32 +; GISEL-NEXT: ds_write_b128 v64, v[8:11] offset:32 +; GISEL-NEXT: ds_write_b128 v64, v[12:15] offset:48 +; GISEL-NEXT: ds_write_b128 v64, v[16:19] offset:64 +; GISEL-NEXT: ds_write_b128 v64, v[20:23] offset:80 +; GISEL-NEXT: ds_write_b128 v64, v[24:27] offset:96 +; GISEL-NEXT: ds_write_b128 v64, v[28:31] offset:112 ; GISEL-NEXT: v_accvgpr_read_b32 v0, a64 +; GISEL-NEXT: v_accvgpr_read_b32 v33, a33 +; GISEL-NEXT: v_accvgpr_read_b32 v34, a34 +; GISEL-NEXT: v_accvgpr_read_b32 v35, a35 +; GISEL-NEXT: v_accvgpr_read_b32 v36, a36 +; GISEL-NEXT: v_accvgpr_read_b32 v37, a37 +; GISEL-NEXT: v_accvgpr_read_b32 v38, a38 +; GISEL-NEXT: v_accvgpr_read_b32 v39, a39 +; GISEL-NEXT: v_accvgpr_read_b32 v40, a40 +; GISEL-NEXT: v_accvgpr_read_b32 v41, a41 +; GISEL-NEXT: v_accvgpr_read_b32 v42, a42 +; GISEL-NEXT: v_accvgpr_read_b32 v43, a43 +; GISEL-NEXT: v_accvgpr_read_b32 v44, a44 +; GISEL-NEXT: v_accvgpr_read_b32 v45, a45 +; GISEL-NEXT: v_accvgpr_read_b32 v46, a46 +; GISEL-NEXT: v_accvgpr_read_b32 v47, a47 +; GISEL-NEXT: v_accvgpr_read_b32 v48, a48 +; GISEL-NEXT: v_accvgpr_read_b32 v49, a49 +; GISEL-NEXT: v_accvgpr_read_b32 v50, a50 +; GISEL-NEXT: v_accvgpr_read_b32 v51, a51 +; GISEL-NEXT: v_accvgpr_read_b32 v52, a52 +; GISEL-NEXT: v_accvgpr_read_b32 v53, a53 +; GISEL-NEXT: v_accvgpr_read_b32 v54, a54 +; GISEL-NEXT: v_accvgpr_read_b32 v55, a55 +; GISEL-NEXT: v_accvgpr_read_b32 v56, a56 +; GISEL-NEXT: v_accvgpr_read_b32 v57, a57 +; GISEL-NEXT: v_accvgpr_read_b32 v58, a58 +; GISEL-NEXT: v_accvgpr_read_b32 v59, a59 +; GISEL-NEXT: v_accvgpr_read_b32 v60, a60 +; GISEL-NEXT: v_accvgpr_read_b32 v61, a61 +; GISEL-NEXT: v_accvgpr_read_b32 v62, a62 +; GISEL-NEXT: v_accvgpr_read_b32 v63, a63 ; GISEL-NEXT: v_accvgpr_read_b32 v1, a65 ; GISEL-NEXT: v_accvgpr_read_b32 v2, a66 ; GISEL-NEXT: v_accvgpr_read_b32 v3, a67 @@ -698,55 +690,55 @@ define amdgpu_kernel void @test_iglp_opt_rev_mfma_gemm(ptr addrspace(3) noalias ; GISEL-NEXT: v_accvgpr_read_b32 v29, a93 ; GISEL-NEXT: v_accvgpr_read_b32 v30, a94 ; GISEL-NEXT: v_accvgpr_read_b32 v31, a95 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:16384 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:16400 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:16416 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:16432 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:16448 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:16464 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:16480 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:16496 -; GISEL-NEXT: v_accvgpr_read_b32 v0, a96 -; GISEL-NEXT: v_accvgpr_read_b32 v1, a97 -; GISEL-NEXT: v_accvgpr_read_b32 v2, a98 -; GISEL-NEXT: v_accvgpr_read_b32 v3, a99 -; GISEL-NEXT: v_accvgpr_read_b32 v4, a100 -; GISEL-NEXT: v_accvgpr_read_b32 v5, a101 -; GISEL-NEXT: v_accvgpr_read_b32 v6, a102 -; GISEL-NEXT: v_accvgpr_read_b32 v7, a103 -; GISEL-NEXT: v_accvgpr_read_b32 v8, a104 -; GISEL-NEXT: v_accvgpr_read_b32 v9, a105 -; GISEL-NEXT: v_accvgpr_read_b32 v10, a106 -; GISEL-NEXT: v_accvgpr_read_b32 v11, a107 -; GISEL-NEXT: v_accvgpr_read_b32 v12, a108 -; GISEL-NEXT: v_accvgpr_read_b32 v13, a109 -; GISEL-NEXT: v_accvgpr_read_b32 v14, a110 -; GISEL-NEXT: v_accvgpr_read_b32 v15, a111 -; GISEL-NEXT: v_accvgpr_read_b32 v16, a112 -; GISEL-NEXT: v_accvgpr_read_b32 v17, a113 -; GISEL-NEXT: v_accvgpr_read_b32 v18, a114 -; GISEL-NEXT: v_accvgpr_read_b32 v19, a115 -; GISEL-NEXT: v_accvgpr_read_b32 v20, a116 -; GISEL-NEXT: v_accvgpr_read_b32 v21, a117 -; GISEL-NEXT: v_accvgpr_read_b32 v22, a118 -; GISEL-NEXT: v_accvgpr_read_b32 v23, a119 -; GISEL-NEXT: v_accvgpr_read_b32 v24, a120 -; GISEL-NEXT: v_accvgpr_read_b32 v25, a121 -; GISEL-NEXT: v_accvgpr_read_b32 v26, a122 -; GISEL-NEXT: v_accvgpr_read_b32 v27, a123 -; GISEL-NEXT: v_accvgpr_read_b32 v28, a124 -; GISEL-NEXT: v_accvgpr_read_b32 v29, a125 -; GISEL-NEXT: v_accvgpr_read_b32 v30, a126 -; GISEL-NEXT: v_accvgpr_read_b32 v31, a127 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:24576 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:24592 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:24608 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:24624 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:24640 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:24656 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:24672 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:24688 +; GISEL-NEXT: ds_write_b128 v65, v[32:35] offset:8192 +; GISEL-NEXT: ds_write_b128 v65, v[36:39] offset:8208 +; GISEL-NEXT: ds_write_b128 v65, v[40:43] offset:8224 +; GISEL-NEXT: ds_write_b128 v65, v[44:47] offset:8240 +; GISEL-NEXT: ds_write_b128 v65, v[48:51] offset:8256 +; GISEL-NEXT: ds_write_b128 v65, v[52:55] offset:8272 +; GISEL-NEXT: ds_write_b128 v65, v[56:59] offset:8288 +; GISEL-NEXT: ds_write_b128 v65, v[60:63] offset:8304 +; GISEL-NEXT: ds_write_b128 v65, v[0:3] offset:16384 +; GISEL-NEXT: ds_write_b128 v65, v[4:7] offset:16400 +; GISEL-NEXT: v_accvgpr_read_b32 v32, a96 +; GISEL-NEXT: ds_write_b128 v65, v[8:11] offset:16416 +; GISEL-NEXT: ds_write_b128 v65, v[12:15] offset:16432 +; GISEL-NEXT: ds_write_b128 v65, v[16:19] offset:16448 +; GISEL-NEXT: ds_write_b128 v65, v[20:23] offset:16464 +; GISEL-NEXT: ds_write_b128 v65, v[24:27] offset:16480 +; GISEL-NEXT: ds_write_b128 v65, v[28:31] offset:16496 ; GISEL-NEXT: v_accvgpr_read_b32 v0, a128 +; GISEL-NEXT: v_accvgpr_read_b32 v33, a97 +; GISEL-NEXT: v_accvgpr_read_b32 v34, a98 +; GISEL-NEXT: v_accvgpr_read_b32 v35, a99 +; GISEL-NEXT: v_accvgpr_read_b32 v36, a100 +; GISEL-NEXT: v_accvgpr_read_b32 v37, a101 +; GISEL-NEXT: v_accvgpr_read_b32 v38, a102 +; GISEL-NEXT: v_accvgpr_read_b32 v39, a103 +; GISEL-NEXT: v_accvgpr_read_b32 v40, a104 +; GISEL-NEXT: v_accvgpr_read_b32 v41, a105 +; GISEL-NEXT: v_accvgpr_read_b32 v42, a106 +; GISEL-NEXT: v_accvgpr_read_b32 v43, a107 +; GISEL-NEXT: v_accvgpr_read_b32 v44, a108 +; GISEL-NEXT: v_accvgpr_read_b32 v45, a109 +; GISEL-NEXT: v_accvgpr_read_b32 v46, a110 +; GISEL-NEXT: v_accvgpr_read_b32 v47, a111 +; GISEL-NEXT: v_accvgpr_read_b32 v48, a112 +; GISEL-NEXT: v_accvgpr_read_b32 v49, a113 +; GISEL-NEXT: v_accvgpr_read_b32 v50, a114 +; GISEL-NEXT: v_accvgpr_read_b32 v51, a115 +; GISEL-NEXT: v_accvgpr_read_b32 v52, a116 +; GISEL-NEXT: v_accvgpr_read_b32 v53, a117 +; GISEL-NEXT: v_accvgpr_read_b32 v54, a118 +; GISEL-NEXT: v_accvgpr_read_b32 v55, a119 +; GISEL-NEXT: v_accvgpr_read_b32 v56, a120 +; GISEL-NEXT: v_accvgpr_read_b32 v57, a121 +; GISEL-NEXT: v_accvgpr_read_b32 v58, a122 +; GISEL-NEXT: v_accvgpr_read_b32 v59, a123 +; GISEL-NEXT: v_accvgpr_read_b32 v60, a124 +; GISEL-NEXT: v_accvgpr_read_b32 v61, a125 +; GISEL-NEXT: v_accvgpr_read_b32 v62, a126 +; GISEL-NEXT: v_accvgpr_read_b32 v63, a127 ; GISEL-NEXT: v_accvgpr_read_b32 v1, a129 ; GISEL-NEXT: v_accvgpr_read_b32 v2, a130 ; GISEL-NEXT: v_accvgpr_read_b32 v3, a131 @@ -778,14 +770,22 @@ define amdgpu_kernel void @test_iglp_opt_rev_mfma_gemm(ptr addrspace(3) noalias ; GISEL-NEXT: v_accvgpr_read_b32 v29, a157 ; GISEL-NEXT: v_accvgpr_read_b32 v30, a158 ; GISEL-NEXT: v_accvgpr_read_b32 v31, a159 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:32768 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:32784 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:32800 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:32816 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:32832 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:32848 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:32864 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:32880 +; GISEL-NEXT: ds_write_b128 v65, v[32:35] offset:24576 +; GISEL-NEXT: ds_write_b128 v65, v[36:39] offset:24592 +; GISEL-NEXT: ds_write_b128 v65, v[40:43] offset:24608 +; GISEL-NEXT: ds_write_b128 v65, v[44:47] offset:24624 +; GISEL-NEXT: ds_write_b128 v65, v[48:51] offset:24640 +; GISEL-NEXT: ds_write_b128 v65, v[52:55] offset:24656 +; GISEL-NEXT: ds_write_b128 v65, v[56:59] offset:24672 +; GISEL-NEXT: ds_write_b128 v65, v[60:63] offset:24688 +; GISEL-NEXT: ds_write_b128 v65, v[0:3] offset:32768 +; GISEL-NEXT: ds_write_b128 v65, v[4:7] offset:32784 +; GISEL-NEXT: ds_write_b128 v65, v[8:11] offset:32800 +; GISEL-NEXT: ds_write_b128 v65, v[12:15] offset:32816 +; GISEL-NEXT: ds_write_b128 v65, v[16:19] offset:32832 +; GISEL-NEXT: ds_write_b128 v65, v[20:23] offset:32848 +; GISEL-NEXT: ds_write_b128 v65, v[24:27] offset:32864 +; GISEL-NEXT: ds_write_b128 v65, v[28:31] offset:32880 ; GISEL-NEXT: s_endpgm entry: call void @llvm.amdgcn.iglp.opt(i32 1) diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.single.2c.mir b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.single.2c.mir index a85478df10eb2..670f3f74f3730 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.single.2c.mir +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.single.2c.mir @@ -57,29 +57,29 @@ body: | ; GCN-NEXT: bb.1: ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) ; GCN-NEXT: {{ $}} + ; GCN-NEXT: [[COPY:%[0-9]+]]:areg_512_align2 = COPY [[DEF1]] ; GCN-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:av_128_align2 = DS_READ_B128_gfx9 [[DEF2]], 0, 0, implicit $exec :: (load (s128) from %ir.in0, !alias.scope !0, addrspace 3) ; GCN-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:av_128_align2 = DS_READ_B128_gfx9 [[DEF3]], 0, 0, implicit $exec :: (load (s128) from %ir.in2, !alias.scope !0, addrspace 3) ; GCN-NEXT: [[DS_READ_B128_gfx9_2:%[0-9]+]]:av_128_align2 = DS_READ_B128_gfx9 [[DEF2]], 1040, 0, implicit $exec :: (load (s128) from %ir.in1, !alias.scope !0, addrspace 3) ; GCN-NEXT: [[DS_READ_B128_gfx9_3:%[0-9]+]]:av_128_align2 = DS_READ_B128_gfx9 [[DEF3]], 2064, 0, implicit $exec :: (load (s128) from %ir.in3, !alias.scope !0, addrspace 3) - ; GCN-NEXT: [[COPY:%[0-9]+]]:areg_512_align2 = COPY [[DEF1]] ; GCN-NEXT: [[COPY:%[0-9]+]]:areg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_e64 [[DS_READ_B128_gfx9_]].sub0_sub1, [[DS_READ_B128_gfx9_1]].sub0_sub1, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec - ; GCN-NEXT: [[DS_READ_B128_gfx9_4:%[0-9]+]]:av_128_align2 = DS_READ_B128_gfx9 [[DEF3]], 1024, 0, implicit $exec :: (load (s128) from %ir.in4, !alias.scope !0, addrspace 3) ; GCN-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF19]], [[DEF33]], implicit $exec ; GCN-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF19]], [[DEF21]], implicit $exec + ; GCN-NEXT: [[DS_READ_B128_gfx9_4:%[0-9]+]]:av_128_align2 = DS_READ_B128_gfx9 [[DEF3]], 1024, 0, implicit $exec :: (load (s128) from %ir.in4, !alias.scope !0, addrspace 3) ; GCN-NEXT: [[COPY:%[0-9]+]]:areg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_e64 [[DS_READ_B128_gfx9_]].sub2_sub3, [[DS_READ_B128_gfx9_1]].sub2_sub3, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec - ; GCN-NEXT: [[DS_READ_B128_gfx9_5:%[0-9]+]]:av_128_align2 = DS_READ_B128_gfx9 [[DEF3]], 3088, 0, implicit $exec :: (load (s128) from %ir.in5, !alias.scope !0, addrspace 3) ; GCN-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF19]], [[DEF22]], implicit $exec ; GCN-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF19]], [[DEF23]], implicit $exec + ; GCN-NEXT: [[DS_READ_B128_gfx9_5:%[0-9]+]]:av_128_align2 = DS_READ_B128_gfx9 [[DEF3]], 3088, 0, implicit $exec :: (load (s128) from %ir.in5, !alias.scope !0, addrspace 3) ; GCN-NEXT: [[COPY:%[0-9]+]]:areg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_e64 [[DS_READ_B128_gfx9_2]].sub0_sub1, [[DS_READ_B128_gfx9_3]].sub0_sub1, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec ; GCN-NEXT: DS_WRITE_B128_gfx9 [[DEF4]], [[DEF16]], 0, 0, implicit $exec :: (store (s128) into %ir.in6, !alias.scope !0, addrspace 3) ; GCN-NEXT: [[DEF16:%[0-9]+]]:av_128_align2 = BUFFER_LOAD_DWORDX4_OFFEN [[DEF6]], [[DEF7]], 0, 0, 0, 0, implicit $exec :: (load (s128) from %ir.in7, !alias.scope !0, addrspace 7) ; GCN-NEXT: dead [[COPY:%[0-9]+]]:areg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_e64 [[DS_READ_B128_gfx9_2]].sub2_sub3, [[DS_READ_B128_gfx9_3]].sub2_sub3, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec - ; GCN-NEXT: [[COPY1:%[0-9]+]]:areg_512_align2 = COPY [[DEF]] ; GCN-NEXT: undef [[DEF17:%[0-9]+]].sub2:vreg_128_align2 = V_PERM_B32_e64 [[DEF13]], [[DEF12]], [[DEF30]], implicit $exec ; GCN-NEXT: [[DEF17:%[0-9]+]].sub3:vreg_128_align2 = V_PERM_B32_e64 [[DEF15]], [[DEF14]], [[DEF30]], implicit $exec ; GCN-NEXT: [[DEF17:%[0-9]+]].sub0:vreg_128_align2 = V_PERM_B32_e64 [[DEF8]], [[DEF9]], [[DEF30]], implicit $exec ; GCN-NEXT: [[DEF17:%[0-9]+]].sub1:vreg_128_align2 = V_PERM_B32_e64 [[DEF11]], [[DEF10]], [[DEF30]], implicit $exec ; GCN-NEXT: DS_WRITE_B128_gfx9 [[DEF5]], [[DEF17]], 0, 0, implicit $exec :: (store (s128) into %ir.in8, !alias.scope !0, addrspace 3) + ; GCN-NEXT: [[COPY1:%[0-9]+]]:areg_512_align2 = COPY [[DEF]] ; GCN-NEXT: [[COPY1:%[0-9]+]]:areg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_e64 [[DS_READ_B128_gfx9_]].sub0_sub1, [[DS_READ_B128_gfx9_4]].sub0_sub1, [[COPY1]], 0, 0, 0, implicit $mode, implicit $exec ; GCN-NEXT: undef [[DEF18:%[0-9]+]].sub0:vreg_128_align2 = V_PERM_B32_e64 [[DEF8]], [[DEF9]], [[DEF31]], implicit $exec ; GCN-NEXT: [[DEF18:%[0-9]+]].sub1:vreg_128_align2 = V_PERM_B32_e64 [[DEF11]], [[DEF10]], [[DEF31]], implicit $exec @@ -94,11 +94,11 @@ body: | ; GCN-NEXT: [[COPY1:%[0-9]+]]:areg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_e64 [[DS_READ_B128_gfx9_2]].sub0_sub1, [[DS_READ_B128_gfx9_5]].sub0_sub1, [[COPY1]], 0, 0, 0, implicit $mode, implicit $exec ; GCN-NEXT: [[V_ADD_U32_e32_4:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF19]], [[DEF24]], implicit $exec ; GCN-NEXT: [[V_ADD_U32_e32_5:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF19]], [[DEF25]], implicit $exec - ; GCN-NEXT: [[V_ADD_U32_e32_6:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF19]], [[DEF26]], implicit $exec - ; GCN-NEXT: [[V_ADD_U32_e32_7:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF19]], [[DEF27]], implicit $exec ; GCN-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[V_ADD_U32_e32_4]], [[DEF32]], 0, 0, 0, 0, implicit $exec :: (load (s128) from %ir.in14, !alias.scope !0, addrspace 7) ; GCN-NEXT: [[DEF13:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[V_ADD_U32_e32_5]], [[DEF32]], 0, 0, 0, 0, implicit $exec :: (load (s128) from %ir.in15, !alias.scope !0, addrspace 7) + ; GCN-NEXT: [[V_ADD_U32_e32_6:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF19]], [[DEF26]], implicit $exec ; GCN-NEXT: [[DEF14:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[V_ADD_U32_e32_6]], [[DEF32]], 0, 0, 0, 0, implicit $exec :: (load (s128) from %ir.in16, !alias.scope !0, addrspace 7) + ; GCN-NEXT: [[V_ADD_U32_e32_7:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF19]], [[DEF27]], implicit $exec ; GCN-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[V_ADD_U32_e32_7]], [[DEF32]], 0, 0, 0, 0, implicit $exec :: (load (s128) from %ir.in17, !alias.scope !0, addrspace 7) ; GCN-NEXT: dead [[COPY1:%[0-9]+]]:areg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_e64 [[DS_READ_B128_gfx9_2]].sub2_sub3, [[DS_READ_B128_gfx9_5]].sub2_sub3, [[COPY1]], 0, 0, 0, implicit $mode, implicit $exec ; GCN-NEXT: IGLP_OPT 1 diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll index 4d1684467e7f5..5dece28ae742e 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll @@ -9962,32 +9962,34 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32_vecarg(ptr addrspace(1) %arg ; NOLIT-SRCC-NEXT: v_accvgpr_read_b32 v26, a2 ; NOLIT-SRCC-NEXT: v_accvgpr_read_b32 v25, a1 ; NOLIT-SRCC-NEXT: v_accvgpr_read_b32 v24, a0 +; NOLIT-SRCC-NEXT: v_accvgpr_read_b32 v31, a7 +; NOLIT-SRCC-NEXT: v_accvgpr_read_b32 v30, a6 +; NOLIT-SRCC-NEXT: v_accvgpr_read_b32 v29, a5 ; NOLIT-SRCC-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:96 -; NOLIT-SRCC-NEXT: s_nop 0 -; NOLIT-SRCC-NEXT: v_accvgpr_read_b32 v3, a7 -; NOLIT-SRCC-NEXT: v_accvgpr_read_b32 v2, a6 -; NOLIT-SRCC-NEXT: v_accvgpr_read_b32 v1, a5 -; NOLIT-SRCC-NEXT: v_accvgpr_read_b32 v0, a4 +; NOLIT-SRCC-NEXT: v_accvgpr_read_b32 v28, a4 ; NOLIT-SRCC-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:112 ; NOLIT-SRCC-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:64 ; NOLIT-SRCC-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:80 ; NOLIT-SRCC-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:32 ; NOLIT-SRCC-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:48 ; NOLIT-SRCC-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] -; NOLIT-SRCC-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:16 +; NOLIT-SRCC-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:16 ; NOLIT-SRCC-NEXT: s_endpgm ; ; GFX908-GISEL-LABEL: test_mfma_f32_32x32x1f32_vecarg: ; GFX908-GISEL: ; %bb.0: ; %bb ; GFX908-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX908-GISEL-NEXT: v_lshlrev_b32_e32 v32, 7, v0 -; GFX908-GISEL-NEXT: v_mov_b32_e32 v16, 1.0 ; GFX908-GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GFX908-GISEL-NEXT: global_load_dwordx4 v[0:3], v32, s[0:1] ; GFX908-GISEL-NEXT: global_load_dwordx4 v[4:7], v32, s[0:1] offset:16 ; GFX908-GISEL-NEXT: global_load_dwordx4 v[8:11], v32, s[0:1] offset:32 ; GFX908-GISEL-NEXT: global_load_dwordx4 v[12:15], v32, s[0:1] offset:48 -; GFX908-GISEL-NEXT: s_waitcnt vmcnt(0) +; GFX908-GISEL-NEXT: global_load_dwordx4 v[16:19], v32, s[0:1] offset:64 +; GFX908-GISEL-NEXT: global_load_dwordx4 v[20:23], v32, s[0:1] offset:80 +; GFX908-GISEL-NEXT: global_load_dwordx4 v[24:27], v32, s[0:1] offset:96 +; GFX908-GISEL-NEXT: global_load_dwordx4 v[28:31], v32, s[0:1] offset:112 +; GFX908-GISEL-NEXT: s_waitcnt vmcnt(4) ; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a0, v0 ; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a1, v1 ; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a2, v2 @@ -10004,30 +10006,27 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32_vecarg(ptr addrspace(1) %arg ; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a13, v13 ; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a14, v14 ; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a15, v15 -; GFX908-GISEL-NEXT: global_load_dwordx4 v[0:3], v32, s[0:1] offset:64 -; GFX908-GISEL-NEXT: global_load_dwordx4 v[4:7], v32, s[0:1] offset:80 -; GFX908-GISEL-NEXT: global_load_dwordx4 v[8:11], v32, s[0:1] offset:96 -; GFX908-GISEL-NEXT: global_load_dwordx4 v[12:15], v32, s[0:1] offset:112 +; GFX908-GISEL-NEXT: v_mov_b32_e32 v0, 1.0 ; GFX908-GISEL-NEXT: s_waitcnt vmcnt(0) -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a31, v15 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a30, v14 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a29, v13 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a28, v12 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a27, v11 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a26, v10 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a25, v9 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a24, v8 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a23, v7 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a22, v6 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a21, v5 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a20, v4 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a19, v3 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a18, v2 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a17, v1 -; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a16, v0 -; GFX908-GISEL-NEXT: v_mov_b32_e32 v0, 2.0 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a16, v16 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a17, v17 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a18, v18 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a19, v19 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a20, v20 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a21, v21 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a22, v22 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a23, v23 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a24, v24 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a25, v25 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a26, v26 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a27, v27 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a28, v28 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a29, v29 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a30, v30 +; GFX908-GISEL-NEXT: v_accvgpr_write_b32 a31, v31 +; GFX908-GISEL-NEXT: v_mov_b32_e32 v1, 2.0 ; GFX908-GISEL-NEXT: s_nop 1 -; GFX908-GISEL-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v16, v0, a[0:31] cbsz:1 abid:2 blgp:3 +; GFX908-GISEL-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, a[0:31] cbsz:1 abid:2 blgp:3 ; GFX908-GISEL-NEXT: s_nop 15 ; GFX908-GISEL-NEXT: s_nop 1 ; GFX908-GISEL-NEXT: v_accvgpr_read_b32 v0, a0 @@ -10152,19 +10151,18 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32_vecarg(ptr addrspace(1) %arg ; LIT-SRCC-NEXT: v_accvgpr_read_b32 v26, a2 ; LIT-SRCC-NEXT: v_accvgpr_read_b32 v25, a1 ; LIT-SRCC-NEXT: v_accvgpr_read_b32 v24, a0 +; LIT-SRCC-NEXT: v_accvgpr_read_b32 v31, a7 +; LIT-SRCC-NEXT: v_accvgpr_read_b32 v30, a6 +; LIT-SRCC-NEXT: v_accvgpr_read_b32 v29, a5 ; LIT-SRCC-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:96 -; LIT-SRCC-NEXT: s_nop 0 -; LIT-SRCC-NEXT: v_accvgpr_read_b32 v3, a7 -; LIT-SRCC-NEXT: v_accvgpr_read_b32 v2, a6 -; LIT-SRCC-NEXT: v_accvgpr_read_b32 v1, a5 -; LIT-SRCC-NEXT: v_accvgpr_read_b32 v0, a4 +; LIT-SRCC-NEXT: v_accvgpr_read_b32 v28, a4 ; LIT-SRCC-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:112 ; LIT-SRCC-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:64 ; LIT-SRCC-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:80 ; LIT-SRCC-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:32 ; LIT-SRCC-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:48 ; LIT-SRCC-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] -; LIT-SRCC-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:16 +; LIT-SRCC-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:16 ; LIT-SRCC-NEXT: s_endpgm ; ; GFX90A-LABEL: test_mfma_f32_32x32x1f32_vecarg: diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll index d1d4587c0203b..d3d626d7a9cf4 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll @@ -971,14 +971,14 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_MFMA_cluster(ptr ad ; GISEL-NEXT: v_mov_b32_e32 v34, 2.0 ; GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-NEXT: v_add_u32_e32 v0, s0, v32 -; GISEL-NEXT: ds_read_b128 a[96:99], v0 -; GISEL-NEXT: ds_read_b128 a[100:103], v0 offset:16 -; GISEL-NEXT: ds_read_b128 a[104:107], v0 offset:32 -; GISEL-NEXT: ds_read_b128 a[108:111], v0 offset:48 -; GISEL-NEXT: ds_read_b128 a[112:115], v0 offset:64 -; GISEL-NEXT: ds_read_b128 a[116:119], v0 offset:80 -; GISEL-NEXT: ds_read_b128 a[120:123], v0 offset:96 -; GISEL-NEXT: ds_read_b128 a[124:127], v0 offset:112 +; GISEL-NEXT: ds_read_b128 a[64:67], v0 +; GISEL-NEXT: ds_read_b128 a[68:71], v0 offset:16 +; GISEL-NEXT: ds_read_b128 a[72:75], v0 offset:32 +; GISEL-NEXT: ds_read_b128 a[76:79], v0 offset:48 +; GISEL-NEXT: ds_read_b128 a[80:83], v0 offset:64 +; GISEL-NEXT: ds_read_b128 a[84:87], v0 offset:80 +; GISEL-NEXT: ds_read_b128 a[88:91], v0 offset:96 +; GISEL-NEXT: ds_read_b128 a[92:95], v0 offset:112 ; GISEL-NEXT: ds_read_b128 a[0:3], v0 offset:8192 ; GISEL-NEXT: ds_read_b128 a[4:7], v0 offset:8208 ; GISEL-NEXT: ds_read_b128 a[8:11], v0 offset:8224 @@ -996,14 +996,14 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_MFMA_cluster(ptr ad ; GISEL-NEXT: ds_read_b128 a[56:59], v0 offset:24672 ; GISEL-NEXT: ds_read_b128 a[60:63], v0 offset:24688 ; GISEL-NEXT: v_add_u32_e32 v1, 0xc000, v0 -; GISEL-NEXT: ds_read_b128 a[64:67], v0 offset:49152 -; GISEL-NEXT: ds_read_b128 a[68:71], v0 offset:49168 -; GISEL-NEXT: ds_read_b128 a[72:75], v0 offset:49184 -; GISEL-NEXT: ds_read_b128 a[76:79], v0 offset:49200 -; GISEL-NEXT: ds_read_b128 a[80:83], v0 offset:49216 -; GISEL-NEXT: ds_read_b128 a[84:87], v0 offset:49232 -; GISEL-NEXT: ds_read_b128 a[88:91], v0 offset:49248 -; GISEL-NEXT: ds_read_b128 a[92:95], v0 offset:49264 +; GISEL-NEXT: ds_read_b128 a[96:99], v0 offset:49152 +; GISEL-NEXT: ds_read_b128 a[100:103], v0 offset:49168 +; GISEL-NEXT: ds_read_b128 a[104:107], v0 offset:49184 +; GISEL-NEXT: ds_read_b128 a[108:111], v0 offset:49200 +; GISEL-NEXT: ds_read_b128 a[112:115], v0 offset:49216 +; GISEL-NEXT: ds_read_b128 a[116:119], v0 offset:49232 +; GISEL-NEXT: ds_read_b128 a[120:123], v0 offset:49248 +; GISEL-NEXT: ds_read_b128 a[124:127], v0 offset:49264 ; GISEL-NEXT: ds_read_b128 a[128:131], v1 offset:32768 ; GISEL-NEXT: ds_read_b128 a[132:135], v1 offset:32784 ; GISEL-NEXT: ds_read_b128 a[136:139], v1 offset:32800 @@ -1013,99 +1013,90 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_MFMA_cluster(ptr ad ; GISEL-NEXT: ds_read_b128 a[152:155], v1 offset:32864 ; GISEL-NEXT: ds_read_b128 a[156:159], v1 offset:32880 ; GISEL-NEXT: s_waitcnt lgkmcnt(14) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[96:127], v33, v34, a[96:127] -; GISEL-NEXT: v_add_u32_e32 v32, s1, v32 +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[64:95], v33, v34, a[64:95] +; GISEL-NEXT: v_add_u32_e32 v64, s1, v32 +; GISEL-NEXT: v_mov_b32_e32 v65, s1 ; GISEL-NEXT: ; sched_group_barrier mask(0x00000100) size(40) SyncID(0) ; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v33, v34, a[0:31] ; GISEL-NEXT: s_nop 15 -; GISEL-NEXT: s_nop 0 -; GISEL-NEXT: v_accvgpr_read_b32 v0, a96 -; GISEL-NEXT: v_accvgpr_read_b32 v1, a97 -; GISEL-NEXT: v_accvgpr_read_b32 v2, a98 -; GISEL-NEXT: v_accvgpr_read_b32 v3, a99 -; GISEL-NEXT: v_accvgpr_read_b32 v4, a100 -; GISEL-NEXT: v_accvgpr_read_b32 v5, a101 -; GISEL-NEXT: v_accvgpr_read_b32 v6, a102 -; GISEL-NEXT: v_accvgpr_read_b32 v7, a103 -; GISEL-NEXT: v_accvgpr_read_b32 v8, a104 -; GISEL-NEXT: v_accvgpr_read_b32 v9, a105 -; GISEL-NEXT: v_accvgpr_read_b32 v10, a106 +; GISEL-NEXT: v_accvgpr_read_b32 v0, a64 +; GISEL-NEXT: v_accvgpr_read_b32 v1, a65 +; GISEL-NEXT: v_accvgpr_read_b32 v2, a66 +; GISEL-NEXT: v_accvgpr_read_b32 v3, a67 +; GISEL-NEXT: v_accvgpr_read_b32 v4, a68 +; GISEL-NEXT: v_accvgpr_read_b32 v5, a69 +; GISEL-NEXT: v_accvgpr_read_b32 v6, a70 +; GISEL-NEXT: v_accvgpr_read_b32 v7, a71 +; GISEL-NEXT: v_accvgpr_read_b32 v8, a72 +; GISEL-NEXT: v_accvgpr_read_b32 v9, a73 +; GISEL-NEXT: v_accvgpr_read_b32 v10, a74 ; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[32:63], v33, v34, a[32:63] -; GISEL-NEXT: v_accvgpr_read_b32 v11, a107 -; GISEL-NEXT: v_accvgpr_read_b32 v12, a108 -; GISEL-NEXT: v_accvgpr_read_b32 v13, a109 -; GISEL-NEXT: v_accvgpr_read_b32 v14, a110 -; GISEL-NEXT: v_accvgpr_read_b32 v15, a111 -; GISEL-NEXT: v_accvgpr_read_b32 v16, a112 -; GISEL-NEXT: v_accvgpr_read_b32 v17, a113 -; GISEL-NEXT: v_accvgpr_read_b32 v18, a114 -; GISEL-NEXT: v_accvgpr_read_b32 v19, a115 -; GISEL-NEXT: v_accvgpr_read_b32 v20, a116 -; GISEL-NEXT: v_accvgpr_read_b32 v21, a117 -; GISEL-NEXT: v_accvgpr_read_b32 v22, a118 -; GISEL-NEXT: v_accvgpr_read_b32 v23, a119 -; GISEL-NEXT: v_accvgpr_read_b32 v24, a120 -; GISEL-NEXT: v_accvgpr_read_b32 v25, a121 +; GISEL-NEXT: v_accvgpr_read_b32 v11, a75 +; GISEL-NEXT: v_accvgpr_read_b32 v12, a76 +; GISEL-NEXT: v_accvgpr_read_b32 v13, a77 +; GISEL-NEXT: v_accvgpr_read_b32 v14, a78 +; GISEL-NEXT: v_accvgpr_read_b32 v15, a79 +; GISEL-NEXT: v_accvgpr_read_b32 v16, a80 +; GISEL-NEXT: v_accvgpr_read_b32 v17, a81 +; GISEL-NEXT: v_accvgpr_read_b32 v18, a82 +; GISEL-NEXT: v_accvgpr_read_b32 v19, a83 +; GISEL-NEXT: v_accvgpr_read_b32 v20, a84 +; GISEL-NEXT: v_accvgpr_read_b32 v21, a85 +; GISEL-NEXT: v_accvgpr_read_b32 v22, a86 +; GISEL-NEXT: v_accvgpr_read_b32 v23, a87 +; GISEL-NEXT: v_accvgpr_read_b32 v24, a88 +; GISEL-NEXT: v_accvgpr_read_b32 v25, a89 ; GISEL-NEXT: s_waitcnt lgkmcnt(8) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[64:95], v33, v34, a[64:95] -; GISEL-NEXT: v_accvgpr_read_b32 v26, a122 -; GISEL-NEXT: v_accvgpr_read_b32 v27, a123 -; GISEL-NEXT: v_accvgpr_read_b32 v28, a124 -; GISEL-NEXT: v_accvgpr_read_b32 v29, a125 -; GISEL-NEXT: v_accvgpr_read_b32 v30, a126 -; GISEL-NEXT: v_accvgpr_read_b32 v31, a127 +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[96:127], v33, v34, a[96:127] +; GISEL-NEXT: v_accvgpr_read_b32 v26, a90 +; GISEL-NEXT: v_accvgpr_read_b32 v27, a91 +; GISEL-NEXT: v_accvgpr_read_b32 v28, a92 +; GISEL-NEXT: v_accvgpr_read_b32 v29, a93 +; GISEL-NEXT: v_accvgpr_read_b32 v30, a94 +; GISEL-NEXT: v_accvgpr_read_b32 v31, a95 ; GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[128:159], v33, v34, a[128:159] -; GISEL-NEXT: ds_write_b128 v32, v[0:3] -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:16 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:32 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:48 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:64 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:80 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:96 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:112 -; GISEL-NEXT: v_accvgpr_read_b32 v0, a0 -; GISEL-NEXT: v_accvgpr_read_b32 v1, a1 -; GISEL-NEXT: v_accvgpr_read_b32 v2, a2 -; GISEL-NEXT: v_accvgpr_read_b32 v3, a3 -; GISEL-NEXT: v_accvgpr_read_b32 v4, a4 -; GISEL-NEXT: v_accvgpr_read_b32 v5, a5 -; GISEL-NEXT: v_accvgpr_read_b32 v6, a6 -; GISEL-NEXT: v_accvgpr_read_b32 v7, a7 -; GISEL-NEXT: v_accvgpr_read_b32 v8, a8 -; GISEL-NEXT: v_accvgpr_read_b32 v9, a9 -; GISEL-NEXT: v_accvgpr_read_b32 v10, a10 -; GISEL-NEXT: v_accvgpr_read_b32 v11, a11 -; GISEL-NEXT: v_accvgpr_read_b32 v12, a12 -; GISEL-NEXT: v_accvgpr_read_b32 v13, a13 -; GISEL-NEXT: v_accvgpr_read_b32 v14, a14 -; GISEL-NEXT: v_accvgpr_read_b32 v15, a15 -; GISEL-NEXT: v_accvgpr_read_b32 v16, a16 -; GISEL-NEXT: v_accvgpr_read_b32 v17, a17 -; GISEL-NEXT: v_accvgpr_read_b32 v18, a18 -; GISEL-NEXT: v_accvgpr_read_b32 v19, a19 -; GISEL-NEXT: v_accvgpr_read_b32 v20, a20 -; GISEL-NEXT: v_accvgpr_read_b32 v21, a21 -; GISEL-NEXT: v_accvgpr_read_b32 v22, a22 -; GISEL-NEXT: v_accvgpr_read_b32 v23, a23 -; GISEL-NEXT: v_accvgpr_read_b32 v24, a24 -; GISEL-NEXT: v_accvgpr_read_b32 v25, a25 -; GISEL-NEXT: v_accvgpr_read_b32 v26, a26 -; GISEL-NEXT: v_accvgpr_read_b32 v27, a27 -; GISEL-NEXT: v_accvgpr_read_b32 v28, a28 -; GISEL-NEXT: v_accvgpr_read_b32 v29, a29 -; GISEL-NEXT: v_accvgpr_read_b32 v30, a30 -; GISEL-NEXT: v_accvgpr_read_b32 v31, a31 -; GISEL-NEXT: v_mov_b32_e32 v32, s1 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:8192 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:8208 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:8224 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:8240 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:8256 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:8272 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:8288 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:8304 +; GISEL-NEXT: ds_write_b128 v64, v[0:3] +; GISEL-NEXT: ds_write_b128 v64, v[4:7] offset:16 +; GISEL-NEXT: v_accvgpr_read_b32 v63, a31 +; GISEL-NEXT: ds_write_b128 v64, v[8:11] offset:32 +; GISEL-NEXT: ds_write_b128 v64, v[12:15] offset:48 +; GISEL-NEXT: ds_write_b128 v64, v[16:19] offset:64 +; GISEL-NEXT: ds_write_b128 v64, v[20:23] offset:80 +; GISEL-NEXT: ds_write_b128 v64, v[24:27] offset:96 +; GISEL-NEXT: ds_write_b128 v64, v[28:31] offset:112 ; GISEL-NEXT: v_accvgpr_read_b32 v0, a32 +; GISEL-NEXT: v_accvgpr_read_b32 v62, a30 +; GISEL-NEXT: v_accvgpr_read_b32 v61, a29 +; GISEL-NEXT: v_accvgpr_read_b32 v60, a28 +; GISEL-NEXT: v_accvgpr_read_b32 v59, a27 +; GISEL-NEXT: v_accvgpr_read_b32 v58, a26 +; GISEL-NEXT: v_accvgpr_read_b32 v57, a25 +; GISEL-NEXT: v_accvgpr_read_b32 v56, a24 +; GISEL-NEXT: v_accvgpr_read_b32 v55, a23 +; GISEL-NEXT: v_accvgpr_read_b32 v54, a22 +; GISEL-NEXT: v_accvgpr_read_b32 v53, a21 +; GISEL-NEXT: v_accvgpr_read_b32 v52, a20 +; GISEL-NEXT: v_accvgpr_read_b32 v51, a19 +; GISEL-NEXT: v_accvgpr_read_b32 v50, a18 +; GISEL-NEXT: v_accvgpr_read_b32 v49, a17 +; GISEL-NEXT: v_accvgpr_read_b32 v48, a16 +; GISEL-NEXT: v_accvgpr_read_b32 v47, a15 +; GISEL-NEXT: v_accvgpr_read_b32 v46, a14 +; GISEL-NEXT: v_accvgpr_read_b32 v45, a13 +; GISEL-NEXT: v_accvgpr_read_b32 v44, a12 +; GISEL-NEXT: v_accvgpr_read_b32 v43, a11 +; GISEL-NEXT: v_accvgpr_read_b32 v42, a10 +; GISEL-NEXT: v_accvgpr_read_b32 v41, a9 +; GISEL-NEXT: v_accvgpr_read_b32 v40, a8 +; GISEL-NEXT: v_accvgpr_read_b32 v39, a7 +; GISEL-NEXT: v_accvgpr_read_b32 v38, a6 +; GISEL-NEXT: v_accvgpr_read_b32 v37, a5 +; GISEL-NEXT: v_accvgpr_read_b32 v36, a4 +; GISEL-NEXT: v_accvgpr_read_b32 v35, a3 +; GISEL-NEXT: v_accvgpr_read_b32 v34, a2 +; GISEL-NEXT: v_accvgpr_read_b32 v33, a1 +; GISEL-NEXT: v_accvgpr_read_b32 v32, a0 ; GISEL-NEXT: v_accvgpr_read_b32 v1, a33 ; GISEL-NEXT: v_accvgpr_read_b32 v2, a34 ; GISEL-NEXT: v_accvgpr_read_b32 v3, a35 @@ -1137,55 +1128,55 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_MFMA_cluster(ptr ad ; GISEL-NEXT: v_accvgpr_read_b32 v29, a61 ; GISEL-NEXT: v_accvgpr_read_b32 v30, a62 ; GISEL-NEXT: v_accvgpr_read_b32 v31, a63 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:16384 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:16400 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:16416 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:16432 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:16448 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:16464 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:16480 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:16496 -; GISEL-NEXT: v_accvgpr_read_b32 v0, a64 -; GISEL-NEXT: v_accvgpr_read_b32 v1, a65 -; GISEL-NEXT: v_accvgpr_read_b32 v2, a66 -; GISEL-NEXT: v_accvgpr_read_b32 v3, a67 -; GISEL-NEXT: v_accvgpr_read_b32 v4, a68 -; GISEL-NEXT: v_accvgpr_read_b32 v5, a69 -; GISEL-NEXT: v_accvgpr_read_b32 v6, a70 -; GISEL-NEXT: v_accvgpr_read_b32 v7, a71 -; GISEL-NEXT: v_accvgpr_read_b32 v8, a72 -; GISEL-NEXT: v_accvgpr_read_b32 v9, a73 -; GISEL-NEXT: v_accvgpr_read_b32 v10, a74 -; GISEL-NEXT: v_accvgpr_read_b32 v11, a75 -; GISEL-NEXT: v_accvgpr_read_b32 v12, a76 -; GISEL-NEXT: v_accvgpr_read_b32 v13, a77 -; GISEL-NEXT: v_accvgpr_read_b32 v14, a78 -; GISEL-NEXT: v_accvgpr_read_b32 v15, a79 -; GISEL-NEXT: v_accvgpr_read_b32 v16, a80 -; GISEL-NEXT: v_accvgpr_read_b32 v17, a81 -; GISEL-NEXT: v_accvgpr_read_b32 v18, a82 -; GISEL-NEXT: v_accvgpr_read_b32 v19, a83 -; GISEL-NEXT: v_accvgpr_read_b32 v20, a84 -; GISEL-NEXT: v_accvgpr_read_b32 v21, a85 -; GISEL-NEXT: v_accvgpr_read_b32 v22, a86 -; GISEL-NEXT: v_accvgpr_read_b32 v23, a87 -; GISEL-NEXT: v_accvgpr_read_b32 v24, a88 -; GISEL-NEXT: v_accvgpr_read_b32 v25, a89 -; GISEL-NEXT: v_accvgpr_read_b32 v26, a90 -; GISEL-NEXT: v_accvgpr_read_b32 v27, a91 -; GISEL-NEXT: v_accvgpr_read_b32 v28, a92 -; GISEL-NEXT: v_accvgpr_read_b32 v29, a93 -; GISEL-NEXT: v_accvgpr_read_b32 v30, a94 -; GISEL-NEXT: v_accvgpr_read_b32 v31, a95 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:24576 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:24592 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:24608 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:24624 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:24640 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:24656 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:24672 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:24688 +; GISEL-NEXT: ds_write_b128 v65, v[32:35] offset:8192 +; GISEL-NEXT: ds_write_b128 v65, v[36:39] offset:8208 +; GISEL-NEXT: ds_write_b128 v65, v[40:43] offset:8224 +; GISEL-NEXT: ds_write_b128 v65, v[44:47] offset:8240 +; GISEL-NEXT: ds_write_b128 v65, v[48:51] offset:8256 +; GISEL-NEXT: ds_write_b128 v65, v[52:55] offset:8272 +; GISEL-NEXT: ds_write_b128 v65, v[56:59] offset:8288 +; GISEL-NEXT: ds_write_b128 v65, v[60:63] offset:8304 +; GISEL-NEXT: ds_write_b128 v65, v[0:3] offset:16384 +; GISEL-NEXT: ds_write_b128 v65, v[4:7] offset:16400 +; GISEL-NEXT: v_accvgpr_read_b32 v32, a96 +; GISEL-NEXT: ds_write_b128 v65, v[8:11] offset:16416 +; GISEL-NEXT: ds_write_b128 v65, v[12:15] offset:16432 +; GISEL-NEXT: ds_write_b128 v65, v[16:19] offset:16448 +; GISEL-NEXT: ds_write_b128 v65, v[20:23] offset:16464 +; GISEL-NEXT: ds_write_b128 v65, v[24:27] offset:16480 +; GISEL-NEXT: ds_write_b128 v65, v[28:31] offset:16496 ; GISEL-NEXT: v_accvgpr_read_b32 v0, a128 +; GISEL-NEXT: v_accvgpr_read_b32 v33, a97 +; GISEL-NEXT: v_accvgpr_read_b32 v34, a98 +; GISEL-NEXT: v_accvgpr_read_b32 v35, a99 +; GISEL-NEXT: v_accvgpr_read_b32 v36, a100 +; GISEL-NEXT: v_accvgpr_read_b32 v37, a101 +; GISEL-NEXT: v_accvgpr_read_b32 v38, a102 +; GISEL-NEXT: v_accvgpr_read_b32 v39, a103 +; GISEL-NEXT: v_accvgpr_read_b32 v40, a104 +; GISEL-NEXT: v_accvgpr_read_b32 v41, a105 +; GISEL-NEXT: v_accvgpr_read_b32 v42, a106 +; GISEL-NEXT: v_accvgpr_read_b32 v43, a107 +; GISEL-NEXT: v_accvgpr_read_b32 v44, a108 +; GISEL-NEXT: v_accvgpr_read_b32 v45, a109 +; GISEL-NEXT: v_accvgpr_read_b32 v46, a110 +; GISEL-NEXT: v_accvgpr_read_b32 v47, a111 +; GISEL-NEXT: v_accvgpr_read_b32 v48, a112 +; GISEL-NEXT: v_accvgpr_read_b32 v49, a113 +; GISEL-NEXT: v_accvgpr_read_b32 v50, a114 +; GISEL-NEXT: v_accvgpr_read_b32 v51, a115 +; GISEL-NEXT: v_accvgpr_read_b32 v52, a116 +; GISEL-NEXT: v_accvgpr_read_b32 v53, a117 +; GISEL-NEXT: v_accvgpr_read_b32 v54, a118 +; GISEL-NEXT: v_accvgpr_read_b32 v55, a119 +; GISEL-NEXT: v_accvgpr_read_b32 v56, a120 +; GISEL-NEXT: v_accvgpr_read_b32 v57, a121 +; GISEL-NEXT: v_accvgpr_read_b32 v58, a122 +; GISEL-NEXT: v_accvgpr_read_b32 v59, a123 +; GISEL-NEXT: v_accvgpr_read_b32 v60, a124 +; GISEL-NEXT: v_accvgpr_read_b32 v61, a125 +; GISEL-NEXT: v_accvgpr_read_b32 v62, a126 +; GISEL-NEXT: v_accvgpr_read_b32 v63, a127 ; GISEL-NEXT: v_accvgpr_read_b32 v1, a129 ; GISEL-NEXT: v_accvgpr_read_b32 v2, a130 ; GISEL-NEXT: v_accvgpr_read_b32 v3, a131 @@ -1217,14 +1208,22 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_MFMA_cluster(ptr ad ; GISEL-NEXT: v_accvgpr_read_b32 v29, a157 ; GISEL-NEXT: v_accvgpr_read_b32 v30, a158 ; GISEL-NEXT: v_accvgpr_read_b32 v31, a159 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:32768 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:32784 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:32800 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:32816 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:32832 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:32848 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:32864 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:32880 +; GISEL-NEXT: ds_write_b128 v65, v[32:35] offset:24576 +; GISEL-NEXT: ds_write_b128 v65, v[36:39] offset:24592 +; GISEL-NEXT: ds_write_b128 v65, v[40:43] offset:24608 +; GISEL-NEXT: ds_write_b128 v65, v[44:47] offset:24624 +; GISEL-NEXT: ds_write_b128 v65, v[48:51] offset:24640 +; GISEL-NEXT: ds_write_b128 v65, v[52:55] offset:24656 +; GISEL-NEXT: ds_write_b128 v65, v[56:59] offset:24672 +; GISEL-NEXT: ds_write_b128 v65, v[60:63] offset:24688 +; GISEL-NEXT: ds_write_b128 v65, v[0:3] offset:32768 +; GISEL-NEXT: ds_write_b128 v65, v[4:7] offset:32784 +; GISEL-NEXT: ds_write_b128 v65, v[8:11] offset:32800 +; GISEL-NEXT: ds_write_b128 v65, v[12:15] offset:32816 +; GISEL-NEXT: ds_write_b128 v65, v[16:19] offset:32832 +; GISEL-NEXT: ds_write_b128 v65, v[20:23] offset:32848 +; GISEL-NEXT: ds_write_b128 v65, v[24:27] offset:32864 +; GISEL-NEXT: ds_write_b128 v65, v[28:31] offset:32880 ; GISEL-NEXT: ; sched_group_barrier mask(0x00000008) size(5) SyncID(0) ; GISEL-NEXT: ; sched_group_barrier mask(0x00000200) size(40) SyncID(0) ; GISEL-NEXT: s_endpgm @@ -2186,17 +2185,17 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_interleave_EXP_MFMA ; GISEL-NEXT: v_ldexp_f32 v3, v3, v4 ; GISEL-NEXT: v_readfirstlane_b32 s4, v3 ; GISEL-NEXT: v_mov_b32_e32 v3, 0xc2ce8ed0 -; GISEL-NEXT: ds_read_b128 a[64:67], v0 -; GISEL-NEXT: ds_read_b128 a[68:71], v0 offset:16 -; GISEL-NEXT: ds_read_b128 a[72:75], v0 offset:32 -; GISEL-NEXT: ds_read_b128 a[76:79], v0 offset:48 -; GISEL-NEXT: ds_read_b128 a[80:83], v0 offset:64 -; GISEL-NEXT: ds_read_b128 a[84:87], v0 offset:80 -; GISEL-NEXT: ds_read_b128 a[88:91], v0 offset:96 -; GISEL-NEXT: ds_read_b128 a[92:95], v0 offset:112 +; GISEL-NEXT: ds_read_b128 a[32:35], v0 +; GISEL-NEXT: ds_read_b128 a[36:39], v0 offset:16 +; GISEL-NEXT: ds_read_b128 a[40:43], v0 offset:32 +; GISEL-NEXT: ds_read_b128 a[44:47], v0 offset:48 +; GISEL-NEXT: ds_read_b128 a[48:51], v0 offset:64 +; GISEL-NEXT: ds_read_b128 a[52:55], v0 offset:80 +; GISEL-NEXT: ds_read_b128 a[56:59], v0 offset:96 +; GISEL-NEXT: ds_read_b128 a[60:63], v0 offset:112 ; GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s0, v3 ; GISEL-NEXT: v_mov_b32_e32 v4, 0x42b17218 -; GISEL-NEXT: v_mov_b32_e32 v33, 1.0 +; GISEL-NEXT: v_mov_b32_e32 v80, 1.0 ; GISEL-NEXT: s_cmp_lg_u64 vcc, 0 ; GISEL-NEXT: v_cmp_gt_f32_e32 vcc, s0, v4 ; GISEL-NEXT: v_mul_f32_e32 v6, s1, v2 @@ -2213,7 +2212,7 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_interleave_EXP_MFMA ; GISEL-NEXT: ds_read_b128 a[0:3], v0 offset:8192 ; GISEL-NEXT: ds_read_b128 a[4:7], v0 offset:8208 ; GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[64:95], v33, v8, a[64:95] +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[32:63], v80, v8, a[32:63] ; GISEL-NEXT: v_exp_f32_e32 v6, v6 ; GISEL-NEXT: ds_read_b128 a[8:11], v0 offset:8224 ; GISEL-NEXT: ds_read_b128 a[12:15], v0 offset:8240 @@ -2237,17 +2236,17 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_interleave_EXP_MFMA ; GISEL-NEXT: v_add_f32_e32 v6, v6, v7 ; GISEL-NEXT: v_cvt_i32_f32_e32 v7, v8 ; GISEL-NEXT: v_mov_b32_e32 v8, s0 -; GISEL-NEXT: ds_read_b128 a[32:35], v0 offset:24576 -; GISEL-NEXT: ds_read_b128 a[36:39], v0 offset:24592 +; GISEL-NEXT: ds_read_b128 a[64:67], v0 offset:24576 +; GISEL-NEXT: ds_read_b128 a[68:71], v0 offset:24592 ; GISEL-NEXT: s_waitcnt lgkmcnt(2) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v33, v8, a[0:31] +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v80, v8, a[0:31] ; GISEL-NEXT: v_exp_f32_e32 v6, v6 -; GISEL-NEXT: ds_read_b128 a[40:43], v0 offset:24608 -; GISEL-NEXT: ds_read_b128 a[44:47], v0 offset:24624 -; GISEL-NEXT: ds_read_b128 a[48:51], v0 offset:24640 -; GISEL-NEXT: ds_read_b128 a[52:55], v0 offset:24656 -; GISEL-NEXT: ds_read_b128 a[56:59], v0 offset:24672 -; GISEL-NEXT: ds_read_b128 a[60:63], v0 offset:24688 +; GISEL-NEXT: ds_read_b128 a[72:75], v0 offset:24608 +; GISEL-NEXT: ds_read_b128 a[76:79], v0 offset:24624 +; GISEL-NEXT: ds_read_b128 a[80:83], v0 offset:24640 +; GISEL-NEXT: ds_read_b128 a[84:87], v0 offset:24656 +; GISEL-NEXT: ds_read_b128 a[88:91], v0 offset:24672 +; GISEL-NEXT: ds_read_b128 a[92:95], v0 offset:24688 ; GISEL-NEXT: v_add_u32_e32 v1, 0xc000, v0 ; GISEL-NEXT: ds_read_b128 a[96:99], v0 offset:49152 ; GISEL-NEXT: ds_read_b128 a[100:103], v0 offset:49168 @@ -2276,7 +2275,7 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_interleave_EXP_MFMA ; GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s3, v3 ; GISEL-NEXT: s_cmp_lg_u64 vcc, 0 ; GISEL-NEXT: s_waitcnt lgkmcnt(8) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[32:63], v33, v7, a[32:63] +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[64:95], v80, v7, a[64:95] ; GISEL-NEXT: v_exp_f32_e32 v0, v0 ; GISEL-NEXT: v_cmp_gt_f32_e32 vcc, s3, v4 ; GISEL-NEXT: ds_read_b128 a[128:131], v1 offset:32768 @@ -2297,7 +2296,7 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_interleave_EXP_MFMA ; GISEL-NEXT: ds_read_b128 a[136:139], v1 offset:32800 ; GISEL-NEXT: ds_read_b128 a[140:143], v1 offset:32816 ; GISEL-NEXT: s_waitcnt lgkmcnt(4) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[96:127], v33, v5, a[96:127] +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[96:127], v80, v5, a[96:127] ; GISEL-NEXT: v_exp_f32_e32 v0, v0 ; GISEL-NEXT: ds_read_b128 a[144:147], v1 offset:32832 ; GISEL-NEXT: ds_read_b128 a[148:151], v1 offset:32848 @@ -2310,93 +2309,9 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_interleave_EXP_MFMA ; GISEL-NEXT: v_cmp_gt_f32_e32 vcc, s8, v4 ; GISEL-NEXT: s_cselect_b32 s0, 0, s0 ; GISEL-NEXT: s_cmp_lg_u64 vcc, 0 -; GISEL-NEXT: s_cselect_b32 s0, 0x7f800000, s0 -; GISEL-NEXT: v_mov_b32_e32 v34, s0 -; GISEL-NEXT: v_accvgpr_read_b32 v0, a64 -; GISEL-NEXT: v_accvgpr_read_b32 v1, a65 -; GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[128:159], v33, v34, a[128:159] -; GISEL-NEXT: v_accvgpr_read_b32 v2, a66 -; GISEL-NEXT: v_accvgpr_read_b32 v3, a67 -; GISEL-NEXT: v_accvgpr_read_b32 v4, a68 -; GISEL-NEXT: v_accvgpr_read_b32 v5, a69 -; GISEL-NEXT: v_accvgpr_read_b32 v6, a70 -; GISEL-NEXT: v_accvgpr_read_b32 v7, a71 -; GISEL-NEXT: v_accvgpr_read_b32 v8, a72 -; GISEL-NEXT: v_accvgpr_read_b32 v9, a73 -; GISEL-NEXT: v_accvgpr_read_b32 v10, a74 -; GISEL-NEXT: v_accvgpr_read_b32 v11, a75 -; GISEL-NEXT: v_accvgpr_read_b32 v12, a76 -; GISEL-NEXT: v_accvgpr_read_b32 v13, a77 -; GISEL-NEXT: v_accvgpr_read_b32 v14, a78 -; GISEL-NEXT: v_accvgpr_read_b32 v15, a79 -; GISEL-NEXT: v_accvgpr_read_b32 v16, a80 -; GISEL-NEXT: v_accvgpr_read_b32 v17, a81 -; GISEL-NEXT: v_accvgpr_read_b32 v18, a82 -; GISEL-NEXT: v_accvgpr_read_b32 v19, a83 -; GISEL-NEXT: v_accvgpr_read_b32 v20, a84 -; GISEL-NEXT: v_accvgpr_read_b32 v21, a85 -; GISEL-NEXT: v_accvgpr_read_b32 v22, a86 -; GISEL-NEXT: v_accvgpr_read_b32 v23, a87 -; GISEL-NEXT: v_accvgpr_read_b32 v24, a88 -; GISEL-NEXT: v_accvgpr_read_b32 v25, a89 -; GISEL-NEXT: v_accvgpr_read_b32 v26, a90 -; GISEL-NEXT: v_accvgpr_read_b32 v27, a91 -; GISEL-NEXT: v_accvgpr_read_b32 v28, a92 -; GISEL-NEXT: v_accvgpr_read_b32 v29, a93 -; GISEL-NEXT: v_accvgpr_read_b32 v30, a94 -; GISEL-NEXT: v_accvgpr_read_b32 v31, a95 -; GISEL-NEXT: v_add_u32_e32 v32, s7, v32 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:16 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:32 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:48 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:64 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:80 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:96 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:112 -; GISEL-NEXT: v_accvgpr_read_b32 v0, a0 -; GISEL-NEXT: v_accvgpr_read_b32 v1, a1 -; GISEL-NEXT: v_accvgpr_read_b32 v2, a2 -; GISEL-NEXT: v_accvgpr_read_b32 v3, a3 -; GISEL-NEXT: v_accvgpr_read_b32 v4, a4 -; GISEL-NEXT: v_accvgpr_read_b32 v5, a5 -; GISEL-NEXT: v_accvgpr_read_b32 v6, a6 -; GISEL-NEXT: v_accvgpr_read_b32 v7, a7 -; GISEL-NEXT: v_accvgpr_read_b32 v8, a8 -; GISEL-NEXT: v_accvgpr_read_b32 v9, a9 -; GISEL-NEXT: v_accvgpr_read_b32 v10, a10 -; GISEL-NEXT: v_accvgpr_read_b32 v11, a11 -; GISEL-NEXT: v_accvgpr_read_b32 v12, a12 -; GISEL-NEXT: v_accvgpr_read_b32 v13, a13 -; GISEL-NEXT: v_accvgpr_read_b32 v14, a14 -; GISEL-NEXT: v_accvgpr_read_b32 v15, a15 -; GISEL-NEXT: v_accvgpr_read_b32 v16, a16 -; GISEL-NEXT: v_accvgpr_read_b32 v17, a17 -; GISEL-NEXT: v_accvgpr_read_b32 v18, a18 -; GISEL-NEXT: v_accvgpr_read_b32 v19, a19 -; GISEL-NEXT: v_accvgpr_read_b32 v20, a20 -; GISEL-NEXT: v_accvgpr_read_b32 v21, a21 -; GISEL-NEXT: v_accvgpr_read_b32 v22, a22 -; GISEL-NEXT: v_accvgpr_read_b32 v23, a23 -; GISEL-NEXT: v_accvgpr_read_b32 v24, a24 -; GISEL-NEXT: v_accvgpr_read_b32 v25, a25 -; GISEL-NEXT: v_accvgpr_read_b32 v26, a26 -; GISEL-NEXT: v_accvgpr_read_b32 v27, a27 -; GISEL-NEXT: v_accvgpr_read_b32 v28, a28 -; GISEL-NEXT: v_accvgpr_read_b32 v29, a29 -; GISEL-NEXT: v_accvgpr_read_b32 v30, a30 -; GISEL-NEXT: v_accvgpr_read_b32 v31, a31 -; GISEL-NEXT: v_mov_b32_e32 v32, s7 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:8192 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:8208 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:8224 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:8240 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:8256 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:8272 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:8288 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:8304 ; GISEL-NEXT: v_accvgpr_read_b32 v0, a32 +; GISEL-NEXT: v_accvgpr_read_b32 v79, a31 +; GISEL-NEXT: s_cselect_b32 s0, 0x7f800000, s0 ; GISEL-NEXT: v_accvgpr_read_b32 v1, a33 ; GISEL-NEXT: v_accvgpr_read_b32 v2, a34 ; GISEL-NEXT: v_accvgpr_read_b32 v3, a35 @@ -2428,15 +2343,96 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_interleave_EXP_MFMA ; GISEL-NEXT: v_accvgpr_read_b32 v29, a61 ; GISEL-NEXT: v_accvgpr_read_b32 v30, a62 ; GISEL-NEXT: v_accvgpr_read_b32 v31, a63 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:16384 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:16400 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:16416 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:16432 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:16448 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:16464 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:16480 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:16496 +; GISEL-NEXT: v_add_u32_e32 v32, s7, v32 +; GISEL-NEXT: v_accvgpr_read_b32 v59, a11 +; GISEL-NEXT: v_accvgpr_read_b32 v58, a10 +; GISEL-NEXT: v_accvgpr_read_b32 v57, a9 +; GISEL-NEXT: v_accvgpr_read_b32 v56, a8 +; GISEL-NEXT: v_mov_b32_e32 v81, s7 +; GISEL-NEXT: ds_write_b128 v32, v[0:3] +; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:16 +; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:32 +; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:48 +; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:64 +; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:80 +; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:96 +; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:112 +; GISEL-NEXT: ds_write_b128 v81, v[56:59] offset:8224 +; GISEL-NEXT: v_mov_b32_e32 v56, s0 +; GISEL-NEXT: v_accvgpr_read_b32 v55, a7 +; GISEL-NEXT: v_accvgpr_read_b32 v54, a6 +; GISEL-NEXT: s_waitcnt lgkmcnt(9) +; GISEL-NEXT: v_mfma_f32_32x32x1f32 a[128:159], v80, v56, a[128:159] +; GISEL-NEXT: v_accvgpr_read_b32 v53, a5 +; GISEL-NEXT: v_accvgpr_read_b32 v52, a4 +; GISEL-NEXT: v_accvgpr_read_b32 v51, a3 +; GISEL-NEXT: v_accvgpr_read_b32 v50, a2 +; GISEL-NEXT: v_accvgpr_read_b32 v49, a1 +; GISEL-NEXT: v_accvgpr_read_b32 v48, a0 +; GISEL-NEXT: ds_write_b128 v81, v[48:51] offset:8192 +; GISEL-NEXT: ds_write_b128 v81, v[52:55] offset:8208 +; GISEL-NEXT: v_accvgpr_read_b32 v24, a64 +; GISEL-NEXT: v_accvgpr_read_b32 v63, a15 +; GISEL-NEXT: v_accvgpr_read_b32 v62, a14 +; GISEL-NEXT: v_accvgpr_read_b32 v61, a13 +; GISEL-NEXT: v_accvgpr_read_b32 v60, a12 +; GISEL-NEXT: v_accvgpr_read_b32 v25, a65 +; GISEL-NEXT: v_accvgpr_read_b32 v26, a66 +; GISEL-NEXT: v_accvgpr_read_b32 v27, a67 +; GISEL-NEXT: v_accvgpr_read_b32 v28, a68 +; GISEL-NEXT: v_accvgpr_read_b32 v29, a69 +; GISEL-NEXT: v_accvgpr_read_b32 v30, a70 +; GISEL-NEXT: v_accvgpr_read_b32 v31, a71 +; GISEL-NEXT: v_accvgpr_read_b32 v32, a72 +; GISEL-NEXT: v_accvgpr_read_b32 v33, a73 +; GISEL-NEXT: v_accvgpr_read_b32 v34, a74 +; GISEL-NEXT: v_accvgpr_read_b32 v35, a75 +; GISEL-NEXT: v_accvgpr_read_b32 v36, a76 +; GISEL-NEXT: v_accvgpr_read_b32 v37, a77 +; GISEL-NEXT: v_accvgpr_read_b32 v38, a78 +; GISEL-NEXT: v_accvgpr_read_b32 v39, a79 +; GISEL-NEXT: v_accvgpr_read_b32 v40, a80 +; GISEL-NEXT: v_accvgpr_read_b32 v41, a81 +; GISEL-NEXT: v_accvgpr_read_b32 v42, a82 +; GISEL-NEXT: v_accvgpr_read_b32 v43, a83 +; GISEL-NEXT: v_accvgpr_read_b32 v44, a84 +; GISEL-NEXT: v_accvgpr_read_b32 v45, a85 +; GISEL-NEXT: v_accvgpr_read_b32 v46, a86 +; GISEL-NEXT: v_accvgpr_read_b32 v47, a87 +; GISEL-NEXT: v_accvgpr_read_b32 v48, a88 +; GISEL-NEXT: v_accvgpr_read_b32 v49, a89 +; GISEL-NEXT: v_accvgpr_read_b32 v50, a90 +; GISEL-NEXT: v_accvgpr_read_b32 v51, a91 +; GISEL-NEXT: v_accvgpr_read_b32 v52, a92 +; GISEL-NEXT: v_accvgpr_read_b32 v53, a93 +; GISEL-NEXT: v_accvgpr_read_b32 v54, a94 +; GISEL-NEXT: v_accvgpr_read_b32 v55, a95 +; GISEL-NEXT: ds_write_b128 v81, v[60:63] offset:8240 +; GISEL-NEXT: ds_write_b128 v81, v[24:27] offset:16384 +; GISEL-NEXT: ds_write_b128 v81, v[28:31] offset:16400 ; GISEL-NEXT: v_accvgpr_read_b32 v0, a96 +; GISEL-NEXT: ds_write_b128 v81, v[32:35] offset:16416 +; GISEL-NEXT: ds_write_b128 v81, v[36:39] offset:16432 +; GISEL-NEXT: ds_write_b128 v81, v[40:43] offset:16448 +; GISEL-NEXT: ds_write_b128 v81, v[44:47] offset:16464 +; GISEL-NEXT: ds_write_b128 v81, v[48:51] offset:16480 +; GISEL-NEXT: ds_write_b128 v81, v[52:55] offset:16496 +; GISEL-NEXT: v_accvgpr_read_b32 v32, a128 +; GISEL-NEXT: v_accvgpr_read_b32 v78, a30 +; GISEL-NEXT: v_accvgpr_read_b32 v77, a29 +; GISEL-NEXT: v_accvgpr_read_b32 v76, a28 +; GISEL-NEXT: v_accvgpr_read_b32 v75, a27 +; GISEL-NEXT: v_accvgpr_read_b32 v74, a26 +; GISEL-NEXT: v_accvgpr_read_b32 v73, a25 +; GISEL-NEXT: v_accvgpr_read_b32 v72, a24 +; GISEL-NEXT: v_accvgpr_read_b32 v71, a23 +; GISEL-NEXT: v_accvgpr_read_b32 v70, a22 +; GISEL-NEXT: v_accvgpr_read_b32 v69, a21 +; GISEL-NEXT: v_accvgpr_read_b32 v68, a20 +; GISEL-NEXT: v_accvgpr_read_b32 v67, a19 +; GISEL-NEXT: v_accvgpr_read_b32 v66, a18 +; GISEL-NEXT: v_accvgpr_read_b32 v65, a17 +; GISEL-NEXT: v_accvgpr_read_b32 v64, a16 ; GISEL-NEXT: v_accvgpr_read_b32 v1, a97 ; GISEL-NEXT: v_accvgpr_read_b32 v2, a98 ; GISEL-NEXT: v_accvgpr_read_b32 v3, a99 @@ -2468,46 +2464,43 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_interleave_EXP_MFMA ; GISEL-NEXT: v_accvgpr_read_b32 v29, a125 ; GISEL-NEXT: v_accvgpr_read_b32 v30, a126 ; GISEL-NEXT: v_accvgpr_read_b32 v31, a127 -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:24576 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:24592 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:24608 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:24624 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:24640 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:24656 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:24672 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:24688 -; GISEL-NEXT: v_accvgpr_read_b32 v0, a128 -; GISEL-NEXT: v_accvgpr_read_b32 v1, a129 -; GISEL-NEXT: v_accvgpr_read_b32 v2, a130 -; GISEL-NEXT: v_accvgpr_read_b32 v3, a131 -; GISEL-NEXT: v_accvgpr_read_b32 v4, a132 -; GISEL-NEXT: v_accvgpr_read_b32 v5, a133 -; GISEL-NEXT: v_accvgpr_read_b32 v6, a134 -; GISEL-NEXT: v_accvgpr_read_b32 v7, a135 -; GISEL-NEXT: v_accvgpr_read_b32 v8, a136 -; GISEL-NEXT: v_accvgpr_read_b32 v9, a137 -; GISEL-NEXT: v_accvgpr_read_b32 v10, a138 -; GISEL-NEXT: v_accvgpr_read_b32 v11, a139 -; GISEL-NEXT: v_accvgpr_read_b32 v12, a140 -; GISEL-NEXT: v_accvgpr_read_b32 v13, a141 -; GISEL-NEXT: v_accvgpr_read_b32 v14, a142 -; GISEL-NEXT: v_accvgpr_read_b32 v15, a143 -; GISEL-NEXT: v_accvgpr_read_b32 v16, a144 -; GISEL-NEXT: v_accvgpr_read_b32 v17, a145 -; GISEL-NEXT: v_accvgpr_read_b32 v18, a146 -; GISEL-NEXT: v_accvgpr_read_b32 v19, a147 -; GISEL-NEXT: v_accvgpr_read_b32 v20, a148 -; GISEL-NEXT: v_accvgpr_read_b32 v21, a149 -; GISEL-NEXT: v_accvgpr_read_b32 v22, a150 -; GISEL-NEXT: v_accvgpr_read_b32 v23, a151 -; GISEL-NEXT: v_accvgpr_read_b32 v24, a152 -; GISEL-NEXT: v_accvgpr_read_b32 v25, a153 -; GISEL-NEXT: v_accvgpr_read_b32 v26, a154 -; GISEL-NEXT: v_accvgpr_read_b32 v27, a155 -; GISEL-NEXT: v_accvgpr_read_b32 v28, a156 -; GISEL-NEXT: v_accvgpr_read_b32 v29, a157 -; GISEL-NEXT: v_accvgpr_read_b32 v30, a158 -; GISEL-NEXT: v_accvgpr_read_b32 v31, a159 +; GISEL-NEXT: v_accvgpr_read_b32 v33, a129 +; GISEL-NEXT: v_accvgpr_read_b32 v34, a130 +; GISEL-NEXT: v_accvgpr_read_b32 v35, a131 +; GISEL-NEXT: v_accvgpr_read_b32 v36, a132 +; GISEL-NEXT: v_accvgpr_read_b32 v37, a133 +; GISEL-NEXT: v_accvgpr_read_b32 v38, a134 +; GISEL-NEXT: v_accvgpr_read_b32 v39, a135 +; GISEL-NEXT: v_accvgpr_read_b32 v40, a136 +; GISEL-NEXT: v_accvgpr_read_b32 v41, a137 +; GISEL-NEXT: v_accvgpr_read_b32 v42, a138 +; GISEL-NEXT: v_accvgpr_read_b32 v43, a139 +; GISEL-NEXT: v_accvgpr_read_b32 v44, a140 +; GISEL-NEXT: v_accvgpr_read_b32 v45, a141 +; GISEL-NEXT: v_accvgpr_read_b32 v46, a142 +; GISEL-NEXT: v_accvgpr_read_b32 v47, a143 +; GISEL-NEXT: v_accvgpr_read_b32 v48, a144 +; GISEL-NEXT: v_accvgpr_read_b32 v49, a145 +; GISEL-NEXT: v_accvgpr_read_b32 v50, a146 +; GISEL-NEXT: v_accvgpr_read_b32 v51, a147 +; GISEL-NEXT: v_accvgpr_read_b32 v52, a148 +; GISEL-NEXT: v_accvgpr_read_b32 v53, a149 +; GISEL-NEXT: v_accvgpr_read_b32 v54, a150 +; GISEL-NEXT: v_accvgpr_read_b32 v55, a151 +; GISEL-NEXT: v_accvgpr_read_b32 v56, a152 +; GISEL-NEXT: v_accvgpr_read_b32 v57, a153 +; GISEL-NEXT: v_accvgpr_read_b32 v58, a154 +; GISEL-NEXT: v_accvgpr_read_b32 v59, a155 +; GISEL-NEXT: v_accvgpr_read_b32 v60, a156 +; GISEL-NEXT: v_accvgpr_read_b32 v61, a157 +; GISEL-NEXT: v_accvgpr_read_b32 v62, a158 +; GISEL-NEXT: v_accvgpr_read_b32 v63, a159 +; GISEL-NEXT: ds_write_b128 v81, v[64:67] offset:8256 +; GISEL-NEXT: ds_write_b128 v81, v[68:71] offset:8272 +; GISEL-NEXT: ds_write_b128 v81, v[72:75] offset:8288 +; GISEL-NEXT: ds_write_b128 v81, v[76:79] offset:8304 +; GISEL-NEXT: ds_write_b128 v81, v[0:3] offset:24576 +; GISEL-NEXT: ds_write_b128 v81, v[4:7] offset:24592 ; GISEL-NEXT: ; sched_group_barrier mask(0x00000400) size(1) SyncID(0) ; GISEL-NEXT: ; sched_group_barrier mask(0x00000008) size(1) SyncID(0) ; GISEL-NEXT: ; sched_group_barrier mask(0x00000400) size(1) SyncID(0) @@ -2518,14 +2511,20 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_interleave_EXP_MFMA ; GISEL-NEXT: ; sched_group_barrier mask(0x00000008) size(1) SyncID(0) ; GISEL-NEXT: ; sched_group_barrier mask(0x00000400) size(1) SyncID(0) ; GISEL-NEXT: ; sched_group_barrier mask(0x00000008) size(1) SyncID(0) -; GISEL-NEXT: ds_write_b128 v32, v[0:3] offset:32768 -; GISEL-NEXT: ds_write_b128 v32, v[4:7] offset:32784 -; GISEL-NEXT: ds_write_b128 v32, v[8:11] offset:32800 -; GISEL-NEXT: ds_write_b128 v32, v[12:15] offset:32816 -; GISEL-NEXT: ds_write_b128 v32, v[16:19] offset:32832 -; GISEL-NEXT: ds_write_b128 v32, v[20:23] offset:32848 -; GISEL-NEXT: ds_write_b128 v32, v[24:27] offset:32864 -; GISEL-NEXT: ds_write_b128 v32, v[28:31] offset:32880 +; GISEL-NEXT: ds_write_b128 v81, v[8:11] offset:24608 +; GISEL-NEXT: ds_write_b128 v81, v[12:15] offset:24624 +; GISEL-NEXT: ds_write_b128 v81, v[16:19] offset:24640 +; GISEL-NEXT: ds_write_b128 v81, v[20:23] offset:24656 +; GISEL-NEXT: ds_write_b128 v81, v[24:27] offset:24672 +; GISEL-NEXT: ds_write_b128 v81, v[28:31] offset:24688 +; GISEL-NEXT: ds_write_b128 v81, v[32:35] offset:32768 +; GISEL-NEXT: ds_write_b128 v81, v[36:39] offset:32784 +; GISEL-NEXT: ds_write_b128 v81, v[40:43] offset:32800 +; GISEL-NEXT: ds_write_b128 v81, v[44:47] offset:32816 +; GISEL-NEXT: ds_write_b128 v81, v[48:51] offset:32832 +; GISEL-NEXT: ds_write_b128 v81, v[52:55] offset:32848 +; GISEL-NEXT: ds_write_b128 v81, v[56:59] offset:32864 +; GISEL-NEXT: ds_write_b128 v81, v[60:63] offset:32880 ; GISEL-NEXT: s_endpgm ; ; EXACTCUTOFF-LABEL: test_sched_group_barrier_pipeline_interleave_EXP_MFMA: diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll index 9f30255a07095..f69fc3c3672a4 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll @@ -20,59 +20,32 @@ define amdgpu_ps void @tensor_load_to_lds_d4(<4 x i32> inreg %D0, <8 x i32> inre } define amdgpu_ps void @tensor_load_to_lds_d4_vector(<4 x i32> %D0, <8 x i32> %D1, <4 x i32> %D2, <4 x i32> %D3) { -; GFX1250-SDAG-LABEL: tensor_load_to_lds_d4_vector: -; GFX1250-SDAG: ; %bb.0: -; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s0, v4 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s1, v5 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s2, v6 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s3, v7 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s4, v8 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s8, v0 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s9, v1 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s10, v2 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s11, v3 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s5, v9 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s6, v10 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s7, v11 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s12, v12 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s13, v13 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s14, v14 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s15, v15 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s16, v16 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s17, v17 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s18, v18 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s19, v19 -; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-SDAG-NEXT: tensor_load_to_lds s[8:11], s[0:7], s[12:15], s[16:19] -; GFX1250-SDAG-NEXT: s_endpgm -; -; GFX1250-GISEL-LABEL: tensor_load_to_lds_d4_vector: -; GFX1250-GISEL: ; %bb.0: -; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s8, v0 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s9, v1 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s10, v2 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s11, v3 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s0, v4 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s1, v5 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s2, v6 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s3, v7 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s4, v8 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s5, v9 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s6, v10 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s7, v11 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s12, v12 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s13, v13 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s14, v14 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s15, v15 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s16, v16 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s17, v17 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s18, v18 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s19, v19 -; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-GISEL-NEXT: tensor_load_to_lds s[8:11], s[0:7], s[12:15], s[16:19] -; GFX1250-GISEL-NEXT: s_endpgm +; GFX1250-LABEL: tensor_load_to_lds_d4_vector: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 +; GFX1250-NEXT: v_readfirstlane_b32 s8, v0 +; GFX1250-NEXT: v_readfirstlane_b32 s9, v1 +; GFX1250-NEXT: v_readfirstlane_b32 s10, v2 +; GFX1250-NEXT: v_readfirstlane_b32 s11, v3 +; GFX1250-NEXT: v_readfirstlane_b32 s0, v4 +; GFX1250-NEXT: v_readfirstlane_b32 s1, v5 +; GFX1250-NEXT: v_readfirstlane_b32 s2, v6 +; GFX1250-NEXT: v_readfirstlane_b32 s3, v7 +; GFX1250-NEXT: v_readfirstlane_b32 s4, v8 +; GFX1250-NEXT: v_readfirstlane_b32 s5, v9 +; GFX1250-NEXT: v_readfirstlane_b32 s6, v10 +; GFX1250-NEXT: v_readfirstlane_b32 s7, v11 +; GFX1250-NEXT: v_readfirstlane_b32 s12, v12 +; GFX1250-NEXT: v_readfirstlane_b32 s13, v13 +; GFX1250-NEXT: v_readfirstlane_b32 s14, v14 +; GFX1250-NEXT: v_readfirstlane_b32 s15, v15 +; GFX1250-NEXT: v_readfirstlane_b32 s16, v16 +; GFX1250-NEXT: v_readfirstlane_b32 s17, v17 +; GFX1250-NEXT: v_readfirstlane_b32 s18, v18 +; GFX1250-NEXT: v_readfirstlane_b32 s19, v19 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: tensor_load_to_lds s[8:11], s[0:7], s[12:15], s[16:19] +; GFX1250-NEXT: s_endpgm call void @llvm.amdgcn.tensor.load.to.lds(<4 x i32> %D0, <8 x i32> %D1, <4 x i32> %D2, <4 x i32> %D3, <8 x i32> zeroinitializer, i32 0) ret void } @@ -88,43 +61,24 @@ define amdgpu_ps void @tensor_load_to_lds_d2(<4 x i32> inreg %D0, <8 x i32> inre } define amdgpu_ps void @tensor_load_to_lds_d2_vector(<4 x i32> %D0, <8 x i32> %D1) { -; GFX1250-SDAG-LABEL: tensor_load_to_lds_d2_vector: -; GFX1250-SDAG: ; %bb.0: -; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s0, v4 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s8, v0 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s9, v1 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s10, v2 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s11, v3 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s1, v5 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s2, v6 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s3, v7 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s4, v8 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s5, v9 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s6, v10 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s7, v11 -; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-SDAG-NEXT: tensor_load_to_lds s[8:11], s[0:7] th:TH_LOAD_BYPASS scope:SCOPE_SYS -; GFX1250-SDAG-NEXT: s_endpgm -; -; GFX1250-GISEL-LABEL: tensor_load_to_lds_d2_vector: -; GFX1250-GISEL: ; %bb.0: -; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s8, v0 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s9, v1 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s10, v2 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s11, v3 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s0, v4 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s1, v5 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s2, v6 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s3, v7 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s4, v8 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s5, v9 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s6, v10 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s7, v11 -; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-GISEL-NEXT: tensor_load_to_lds s[8:11], s[0:7] th:TH_LOAD_BYPASS scope:SCOPE_SYS -; GFX1250-GISEL-NEXT: s_endpgm +; GFX1250-LABEL: tensor_load_to_lds_d2_vector: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 +; GFX1250-NEXT: v_readfirstlane_b32 s8, v0 +; GFX1250-NEXT: v_readfirstlane_b32 s9, v1 +; GFX1250-NEXT: v_readfirstlane_b32 s10, v2 +; GFX1250-NEXT: v_readfirstlane_b32 s11, v3 +; GFX1250-NEXT: v_readfirstlane_b32 s0, v4 +; GFX1250-NEXT: v_readfirstlane_b32 s1, v5 +; GFX1250-NEXT: v_readfirstlane_b32 s2, v6 +; GFX1250-NEXT: v_readfirstlane_b32 s3, v7 +; GFX1250-NEXT: v_readfirstlane_b32 s4, v8 +; GFX1250-NEXT: v_readfirstlane_b32 s5, v9 +; GFX1250-NEXT: v_readfirstlane_b32 s6, v10 +; GFX1250-NEXT: v_readfirstlane_b32 s7, v11 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: tensor_load_to_lds s[8:11], s[0:7] th:TH_LOAD_BYPASS scope:SCOPE_SYS +; GFX1250-NEXT: s_endpgm call void @llvm.amdgcn.tensor.load.to.lds(<4 x i32> %D0, <8 x i32> %D1, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer, <8 x i32> zeroinitializer, i32 27) ret void } @@ -140,59 +94,32 @@ define amdgpu_ps void @tensor_store_from_lds_d4(<4 x i32> inreg %D0, <8 x i32> i } define amdgpu_ps void @tensor_store_from_lds_d4_vector(<4 x i32> %D0, <8 x i32> %D1, <4 x i32> %D2, <4 x i32> %D3) { -; GFX1250-SDAG-LABEL: tensor_store_from_lds_d4_vector: -; GFX1250-SDAG: ; %bb.0: -; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s0, v4 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s1, v5 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s2, v6 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s3, v7 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s4, v8 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s8, v0 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s9, v1 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s10, v2 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s11, v3 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s5, v9 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s6, v10 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s7, v11 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s12, v12 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s13, v13 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s14, v14 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s15, v15 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s16, v16 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s17, v17 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s18, v18 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s19, v19 -; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-SDAG-NEXT: tensor_store_from_lds s[8:11], s[0:7], s[12:15], s[16:19] th:TH_STORE_NT_HT scope:SCOPE_DEV -; GFX1250-SDAG-NEXT: s_endpgm -; -; GFX1250-GISEL-LABEL: tensor_store_from_lds_d4_vector: -; GFX1250-GISEL: ; %bb.0: -; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s8, v0 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s9, v1 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s10, v2 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s11, v3 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s0, v4 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s1, v5 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s2, v6 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s3, v7 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s4, v8 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s5, v9 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s6, v10 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s7, v11 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s12, v12 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s13, v13 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s14, v14 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s15, v15 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s16, v16 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s17, v17 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s18, v18 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s19, v19 -; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-GISEL-NEXT: tensor_store_from_lds s[8:11], s[0:7], s[12:15], s[16:19] th:TH_STORE_NT_HT scope:SCOPE_DEV -; GFX1250-GISEL-NEXT: s_endpgm +; GFX1250-LABEL: tensor_store_from_lds_d4_vector: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 +; GFX1250-NEXT: v_readfirstlane_b32 s8, v0 +; GFX1250-NEXT: v_readfirstlane_b32 s9, v1 +; GFX1250-NEXT: v_readfirstlane_b32 s10, v2 +; GFX1250-NEXT: v_readfirstlane_b32 s11, v3 +; GFX1250-NEXT: v_readfirstlane_b32 s0, v4 +; GFX1250-NEXT: v_readfirstlane_b32 s1, v5 +; GFX1250-NEXT: v_readfirstlane_b32 s2, v6 +; GFX1250-NEXT: v_readfirstlane_b32 s3, v7 +; GFX1250-NEXT: v_readfirstlane_b32 s4, v8 +; GFX1250-NEXT: v_readfirstlane_b32 s5, v9 +; GFX1250-NEXT: v_readfirstlane_b32 s6, v10 +; GFX1250-NEXT: v_readfirstlane_b32 s7, v11 +; GFX1250-NEXT: v_readfirstlane_b32 s12, v12 +; GFX1250-NEXT: v_readfirstlane_b32 s13, v13 +; GFX1250-NEXT: v_readfirstlane_b32 s14, v14 +; GFX1250-NEXT: v_readfirstlane_b32 s15, v15 +; GFX1250-NEXT: v_readfirstlane_b32 s16, v16 +; GFX1250-NEXT: v_readfirstlane_b32 s17, v17 +; GFX1250-NEXT: v_readfirstlane_b32 s18, v18 +; GFX1250-NEXT: v_readfirstlane_b32 s19, v19 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: tensor_store_from_lds s[8:11], s[0:7], s[12:15], s[16:19] th:TH_STORE_NT_HT scope:SCOPE_DEV +; GFX1250-NEXT: s_endpgm call void @llvm.amdgcn.tensor.store.from.lds(<4 x i32> %D0, <8 x i32> %D1, <4 x i32> %D2, <4 x i32> %D3, <8 x i32> zeroinitializer, i32 22) ret void } @@ -208,43 +135,24 @@ define amdgpu_ps void @tensor_store_from_lds_d2(<4 x i32> inreg %D0, <8 x i32> i } define amdgpu_ps void @tensor_store_from_lds_d2_vector(<4 x i32> %D0, <8 x i32> %D1) { -; GFX1250-SDAG-LABEL: tensor_store_from_lds_d2_vector: -; GFX1250-SDAG: ; %bb.0: -; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s0, v4 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s8, v0 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s9, v1 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s10, v2 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s11, v3 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s1, v5 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s2, v6 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s3, v7 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s4, v8 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s5, v9 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s6, v10 -; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s7, v11 -; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-SDAG-NEXT: tensor_store_from_lds s[8:11], s[0:7] -; GFX1250-SDAG-NEXT: s_endpgm -; -; GFX1250-GISEL-LABEL: tensor_store_from_lds_d2_vector: -; GFX1250-GISEL: ; %bb.0: -; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s8, v0 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s9, v1 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s10, v2 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s11, v3 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s0, v4 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s1, v5 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s2, v6 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s3, v7 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s4, v8 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s5, v9 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s6, v10 -; GFX1250-GISEL-NEXT: v_readfirstlane_b32 s7, v11 -; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-GISEL-NEXT: tensor_store_from_lds s[8:11], s[0:7] -; GFX1250-GISEL-NEXT: s_endpgm +; GFX1250-LABEL: tensor_store_from_lds_d2_vector: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 +; GFX1250-NEXT: v_readfirstlane_b32 s8, v0 +; GFX1250-NEXT: v_readfirstlane_b32 s9, v1 +; GFX1250-NEXT: v_readfirstlane_b32 s10, v2 +; GFX1250-NEXT: v_readfirstlane_b32 s11, v3 +; GFX1250-NEXT: v_readfirstlane_b32 s0, v4 +; GFX1250-NEXT: v_readfirstlane_b32 s1, v5 +; GFX1250-NEXT: v_readfirstlane_b32 s2, v6 +; GFX1250-NEXT: v_readfirstlane_b32 s3, v7 +; GFX1250-NEXT: v_readfirstlane_b32 s4, v8 +; GFX1250-NEXT: v_readfirstlane_b32 s5, v9 +; GFX1250-NEXT: v_readfirstlane_b32 s6, v10 +; GFX1250-NEXT: v_readfirstlane_b32 s7, v11 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: tensor_store_from_lds s[8:11], s[0:7] +; GFX1250-NEXT: s_endpgm call void @llvm.amdgcn.tensor.store.from.lds(<4 x i32> %D0, <8 x i32> %D1, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer, <8 x i32> zeroinitializer, i32 0) ret void } diff --git a/llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll b/llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll index a0a983f1c977b..e8437e1122df9 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll @@ -486,38 +486,38 @@ define <2 x double> @v_exp_v2f64(<2 x double> %in) #0 { ; SI-GISEL-LABEL: v_exp_v2f64: ; SI-GISEL: ; %bb.0: ; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0x652b82fe -; SI-GISEL-NEXT: v_mov_b32_e32 v7, 0x3ff71547 -; SI-GISEL-NEXT: v_mul_f64 v[4:5], v[0:1], v[6:7] +; SI-GISEL-NEXT: v_mov_b32_e32 v4, 0x652b82fe +; SI-GISEL-NEXT: v_mov_b32_e32 v5, 0x3ff71547 +; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[0:1], v[4:5] ; SI-GISEL-NEXT: v_mov_b32_e32 v8, 0 -; SI-GISEL-NEXT: v_and_b32_e32 v9, 0x80000000, v5 -; SI-GISEL-NEXT: v_or_b32_e32 v9, 0x43300000, v9 -; SI-GISEL-NEXT: v_add_f64 v[10:11], v[4:5], v[8:9] -; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0x432fffff -; SI-GISEL-NEXT: v_add_f64 v[9:10], v[10:11], -v[8:9] -; SI-GISEL-NEXT: v_mov_b32_e32 v11, -1 -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[4:5]|, v[11:12] -; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[2:3], v[6:7] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, v9, v4, vcc ; SI-GISEL-NEXT: v_and_b32_e32 v9, 0x80000000, v7 ; SI-GISEL-NEXT: v_or_b32_e32 v9, 0x43300000, v9 -; SI-GISEL-NEXT: v_add_f64 v[13:14], v[6:7], v[8:9] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v5, v10, v5, vcc -; SI-GISEL-NEXT: v_add_f64 v[8:9], v[13:14], -v[8:9] -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[6:7]|, v[11:12] +; SI-GISEL-NEXT: v_add_f64 v[10:11], v[6:7], v[8:9] +; SI-GISEL-NEXT: v_mul_f64 v[4:5], v[2:3], v[4:5] +; SI-GISEL-NEXT: v_add_f64 v[10:11], v[10:11], -v[8:9] +; SI-GISEL-NEXT: v_and_b32_e32 v9, 0x80000000, v5 +; SI-GISEL-NEXT: v_or_b32_e32 v9, 0x43300000, v9 +; SI-GISEL-NEXT: v_add_f64 v[12:13], v[4:5], v[8:9] +; SI-GISEL-NEXT: v_mov_b32_e32 v14, 0xfca7ab0c +; SI-GISEL-NEXT: v_add_f64 v[8:9], v[12:13], -v[8:9] +; SI-GISEL-NEXT: v_mov_b32_e32 v12, -1 +; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x432fffff +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[6:7]|, v[12:13] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 s[4:5], |v[4:5]|, v[12:13] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, v10, v6, vcc +; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0xfefa39ef +; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x3fe62e42 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, v11, v7, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e64 v4, v8, v4, s[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[6:7], v[12:13], v[0:1] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v5, v9, v5, s[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[4:5], v[12:13], v[2:3] ; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0x3b39803f -; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, v8, v6, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, v9, v7, vcc -; SI-GISEL-NEXT: v_mov_b32_e32 v8, 0xfefa39ef -; SI-GISEL-NEXT: v_mov_b32_e32 v9, 0x3fe62e42 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[4:5], v[8:9], v[0:1] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[6:7], v[8:9], v[2:3] ; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x3c7abc9e -; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[4:5], v[12:13], v[10:11] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[6:7], v[12:13], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[6:7], v[12:13], v[10:11] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[4:5], v[12:13], v[8:9] ; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0x6a5dcb37 ; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x3e5ade15 -; SI-GISEL-NEXT: v_mov_b32_e32 v14, 0xfca7ab0c ; SI-GISEL-NEXT: v_mov_b32_e32 v15, 0x3e928af3 ; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[10:11], v[12:13], v[14:15] ; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15] @@ -562,20 +562,20 @@ define <2 x double> @v_exp_v2f64(<2 x double> %in) #0 { ; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[14:15] ; SI-GISEL-NEXT: v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[16:17] ; SI-GISEL-NEXT: v_fma_f64 v[0:1], v[8:9], v[12:13], 1.0 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v4, v[4:5] ; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[8:9], v[0:1], 1.0 -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v0, v[4:5] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v4, v[6:7] +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v0, v[6:7] +; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0x7ff00000 +; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[8:9], v4 ; SI-GISEL-NEXT: v_ldexp_f64 v[0:1], v[10:11], v0 -; SI-GISEL-NEXT: v_mov_b32_e32 v10, 0x7ff00000 ; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, v10, v1, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[8:9], v4 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, v6, v1, vcc ; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[2:3], v[14:15] ; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, v0, s[4:5] ; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, v1, s[4:5] ; SI-GISEL-NEXT: v_cmp_nlt_f64_e64 s[4:5], v[2:3], v[16:17] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, v10, v5, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, v6, v5, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, v4, s[4:5] ; SI-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5] ; SI-GISEL-NEXT: s_setpc_b64 s[30:31] @@ -1002,34 +1002,34 @@ define <3 x double> @v_exp_v3f64(<3 x double> %in) #0 { ; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[11:12], s[12:13], v[15:16] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v7, v7, v14, vcc ; SI-SDAG-NEXT: v_cndmask_b32_e32 v6, v6, v13, vcc -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[6:7], s[10:11], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[15:16], s[14:15], v[8:9] -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[6:7], s[12:13], v[17:18] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[15:16], v[13:14], s[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[17:18], s[14:15], v[8:9] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[15:16], v[13:14], s[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[17:18], v[8:9], s[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[15:16], v[13:14], s[20:21] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[17:18], v[8:9], s[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[15:16], v[13:14], s[22:23] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[17:18], v[8:9], s[20:21] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[15:16], v[13:14], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[17:18], v[8:9], s[22:23] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[15:16], v[13:14], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[17:18], v[8:9], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[15:16], v[13:14], s[28:29] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[17:18], v[8:9], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[15:16], v[13:14], s[42:43] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[17:18], v[8:9], s[28:29] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[15:16], v[13:14], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], s[10:11], v[4:5] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], s[14:15], v[8:9] +; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], s[12:13], v[13:14] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[13:14], s[14:15], v[8:9] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[13:14], v[8:9], s[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[13:14], v[8:9], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[13:14], v[8:9], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[13:14], v[8:9], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[13:14], v[8:9], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[13:14], v[8:9], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[42:43] +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[13:14], v[8:9], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], 1.0 ; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v12, v[11:12] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[17:18], v[8:9], s[42:43] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[15:16], v[13:14], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[17:18], v[8:9], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[13:14], v[8:9], s[42:43] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[15:16], v[17:18], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[13:14], v[8:9], 1.0 ; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v6, v[6:7] ; SI-SDAG-NEXT: v_ldexp_f64 v[10:11], v[10:11], v12 ; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[40:41], v[2:3] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[17:18], v[8:9], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[13:14], v[8:9], 1.0 ; SI-SDAG-NEXT: v_cndmask_b32_e32 v7, v19, v11, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc ; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v7, s[4:5] @@ -1046,124 +1046,124 @@ define <3 x double> @v_exp_v3f64(<3 x double> %in) #0 { ; SI-GISEL-LABEL: v_exp_v3f64: ; SI-GISEL: ; %bb.0: ; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-GISEL-NEXT: v_mov_b32_e32 v10, 0x652b82fe -; SI-GISEL-NEXT: v_mov_b32_e32 v11, 0x3ff71547 -; SI-GISEL-NEXT: v_mul_f64 v[12:13], v[0:1], v[10:11] -; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0 -; SI-GISEL-NEXT: v_and_b32_e32 v7, 0x80000000, v13 -; SI-GISEL-NEXT: v_or_b32_e32 v7, 0x43300000, v7 -; SI-GISEL-NEXT: v_add_f64 v[14:15], v[12:13], v[6:7] -; SI-GISEL-NEXT: v_mov_b32_e32 v8, -1 -; SI-GISEL-NEXT: v_mov_b32_e32 v9, 0x432fffff -; SI-GISEL-NEXT: v_add_f64 v[14:15], v[14:15], -v[6:7] -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[12:13]|, v[8:9] -; SI-GISEL-NEXT: v_mov_b32_e32 v18, 0xfefa39ef -; SI-GISEL-NEXT: v_cndmask_b32_e32 v12, v14, v12, vcc -; SI-GISEL-NEXT: v_mov_b32_e32 v19, 0x3fe62e42 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v13, v15, v13, vcc -; SI-GISEL-NEXT: v_fma_f64 v[14:15], -v[12:13], v[18:19], v[0:1] -; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0x3b39803f -; SI-GISEL-NEXT: v_mov_b32_e32 v21, 0x3c7abc9e -; SI-GISEL-NEXT: v_mul_f64 v[16:17], v[2:3], v[10:11] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], -v[12:13], v[20:21], v[14:15] -; SI-GISEL-NEXT: v_mov_b32_e32 v24, 0x6a5dcb37 -; SI-GISEL-NEXT: v_mov_b32_e32 v25, 0x3e5ade15 -; SI-GISEL-NEXT: v_mov_b32_e32 v26, 0xfca7ab0c -; SI-GISEL-NEXT: v_mov_b32_e32 v27, 0x3e928af3 -; SI-GISEL-NEXT: v_and_b32_e32 v7, 0x80000000, v17 -; SI-GISEL-NEXT: v_fma_f64 v[28:29], v[14:15], v[24:25], v[26:27] -; SI-GISEL-NEXT: v_or_b32_e32 v7, 0x43300000, v7 -; SI-GISEL-NEXT: v_mov_b32_e32 v30, 0x623fde64 -; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0x3ec71dee -; SI-GISEL-NEXT: v_add_f64 v[22:23], v[16:17], v[6:7] -; SI-GISEL-NEXT: v_fma_f64 v[28:29], v[14:15], v[28:29], v[30:31] -; SI-GISEL-NEXT: v_mov_b32_e32 v32, 0x7c89e6b0 -; SI-GISEL-NEXT: v_mov_b32_e32 v33, 0x3efa0199 -; SI-GISEL-NEXT: v_add_f64 v[22:23], v[22:23], -v[6:7] -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[16:17]|, v[8:9] -; SI-GISEL-NEXT: v_fma_f64 v[28:29], v[14:15], v[28:29], v[32:33] -; SI-GISEL-NEXT: v_mov_b32_e32 v34, 0x14761f6e -; SI-GISEL-NEXT: v_mov_b32_e32 v35, 0x3f2a01a0 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v16, v22, v16, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v17, v23, v17, vcc -; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[14:15], v[28:29], v[34:35] -; SI-GISEL-NEXT: v_mov_b32_e32 v28, 0x1852b7b0 -; SI-GISEL-NEXT: v_mov_b32_e32 v29, 0x3f56c16c -; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[14:15], v[22:23], v[28:29] -; SI-GISEL-NEXT: v_mul_f64 v[10:11], v[4:5], v[10:11] -; SI-GISEL-NEXT: v_mov_b32_e32 v36, 0x11122322 -; SI-GISEL-NEXT: v_mov_b32_e32 v37, 0x3f811111 -; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[14:15], v[22:23], v[36:37] -; SI-GISEL-NEXT: v_and_b32_e32 v7, 0x80000000, v11 -; SI-GISEL-NEXT: v_mov_b32_e32 v38, 0x555502a1 -; SI-GISEL-NEXT: v_mov_b32_e32 v39, 0x3fa55555 -; SI-GISEL-NEXT: v_or_b32_e32 v7, 0x43300000, v7 -; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[14:15], v[22:23], v[38:39] -; SI-GISEL-NEXT: v_add_f64 v[48:49], v[10:11], v[6:7] -; SI-GISEL-NEXT: v_mov_b32_e32 v50, 0x55555511 -; SI-GISEL-NEXT: v_mov_b32_e32 v51, 0x3fc55555 -; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[14:15], v[22:23], v[50:51] -; SI-GISEL-NEXT: v_add_f64 v[6:7], v[48:49], -v[6:7] +; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0x652b82fe +; SI-GISEL-NEXT: v_mov_b32_e32 v7, 0x3ff71547 +; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[0:1], v[6:7] +; SI-GISEL-NEXT: v_mov_b32_e32 v10, 0 +; SI-GISEL-NEXT: v_and_b32_e32 v11, 0x80000000, v9 +; SI-GISEL-NEXT: v_or_b32_e32 v11, 0x43300000, v11 +; SI-GISEL-NEXT: v_add_f64 v[12:13], v[8:9], v[10:11] +; SI-GISEL-NEXT: v_mov_b32_e32 v14, -1 +; SI-GISEL-NEXT: v_mov_b32_e32 v15, 0x432fffff +; SI-GISEL-NEXT: v_add_f64 v[11:12], v[12:13], -v[10:11] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[8:9]|, v[14:15] +; SI-GISEL-NEXT: v_mov_b32_e32 v16, 0xfefa39ef +; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, v11, v8, vcc +; SI-GISEL-NEXT: v_mov_b32_e32 v17, 0x3fe62e42 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v12, v9, vcc +; SI-GISEL-NEXT: v_fma_f64 v[11:12], -v[8:9], v[16:17], v[0:1] +; SI-GISEL-NEXT: v_mov_b32_e32 v18, 0x3b39803f +; SI-GISEL-NEXT: v_mov_b32_e32 v19, 0x3c7abc9e +; SI-GISEL-NEXT: v_fma_f64 v[11:12], -v[8:9], v[18:19], v[11:12] +; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0x6a5dcb37 +; SI-GISEL-NEXT: v_mov_b32_e32 v21, 0x3e5ade15 +; SI-GISEL-NEXT: v_mov_b32_e32 v22, 0xfca7ab0c +; SI-GISEL-NEXT: v_mov_b32_e32 v23, 0x3e928af3 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[11:12], v[20:21], v[22:23] +; SI-GISEL-NEXT: v_mov_b32_e32 v26, 0x623fde64 +; SI-GISEL-NEXT: v_mov_b32_e32 v27, 0x3ec71dee +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[11:12], v[24:25], v[26:27] +; SI-GISEL-NEXT: v_mov_b32_e32 v28, 0x7c89e6b0 +; SI-GISEL-NEXT: v_mov_b32_e32 v29, 0x3efa0199 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[11:12], v[24:25], v[28:29] +; SI-GISEL-NEXT: v_mov_b32_e32 v30, 0x14761f6e +; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0x3f2a01a0 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[11:12], v[24:25], v[30:31] +; SI-GISEL-NEXT: v_mov_b32_e32 v32, 0x1852b7b0 +; SI-GISEL-NEXT: v_mov_b32_e32 v33, 0x3f56c16c +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[11:12], v[24:25], v[32:33] +; SI-GISEL-NEXT: v_mov_b32_e32 v34, 0x11122322 +; SI-GISEL-NEXT: v_mov_b32_e32 v35, 0x3f811111 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[11:12], v[24:25], v[34:35] +; SI-GISEL-NEXT: v_mov_b32_e32 v36, 0x555502a1 +; SI-GISEL-NEXT: v_mov_b32_e32 v37, 0x3fa55555 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[11:12], v[24:25], v[36:37] +; SI-GISEL-NEXT: v_mov_b32_e32 v38, 0x55555511 +; SI-GISEL-NEXT: v_mov_b32_e32 v39, 0x3fc55555 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[11:12], v[24:25], v[38:39] ; SI-GISEL-NEXT: v_mov_b32_e32 v48, 11 ; SI-GISEL-NEXT: v_mov_b32_e32 v49, 0x3fe00000 -; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[14:15], v[22:23], v[48:49] -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[10:11]|, v[8:9] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[14:15], v[22:23], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[22:23], -v[16:17], v[18:19], v[2:3] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, v7, v11, vcc -; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[6:7], v[18:19], v[4:5] -; SI-GISEL-NEXT: v_fma_f64 v[22:23], -v[16:17], v[20:21], v[22:23] -; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[6:7], v[20:21], v[18:19] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[24:25], v[26:27] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[26:27] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], v[30:31] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[30:31] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], v[32:33] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[32:33] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], v[34:35] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v26, v[12:13] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], v[28:29] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[20:21], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[28:29] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[38:39] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[14:15], v[8:9], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[50:51] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[24:25], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[48:49] -; SI-GISEL-NEXT: v_mov_b32_e32 v10, 0 -; SI-GISEL-NEXT: v_mov_b32_e32 v11, 0x40900000 -; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[8:9], v26 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[10:11] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], v[38:39] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], 1.0 -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v16, v[16:17] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[11:12], v[24:25], v[48:49] +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v50, v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[11:12], v[24:25], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[11:12], v[24:25], 1.0 +; SI-GISEL-NEXT: v_mul_f64 v[12:13], v[2:3], v[6:7] +; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[4:5], v[6:7] +; SI-GISEL-NEXT: v_and_b32_e32 v11, 0x80000000, v13 +; SI-GISEL-NEXT: v_or_b32_e32 v11, 0x43300000, v11 +; SI-GISEL-NEXT: v_add_f64 v[24:25], v[12:13], v[10:11] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 s[6:7], |v[12:13]|, v[14:15] +; SI-GISEL-NEXT: v_add_f64 v[24:25], v[24:25], -v[10:11] +; SI-GISEL-NEXT: v_and_b32_e32 v11, 0x80000000, v7 +; SI-GISEL-NEXT: v_or_b32_e32 v11, 0x43300000, v11 +; SI-GISEL-NEXT: v_cndmask_b32_e64 v12, v24, v12, s[6:7] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v13, v25, v13, s[6:7] +; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[8:9], v50 +; SI-GISEL-NEXT: v_add_f64 v[50:51], v[6:7], v[10:11] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], -v[12:13], v[16:17], v[2:3] +; SI-GISEL-NEXT: v_add_f64 v[10:11], v[50:51], -v[10:11] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 s[4:5], |v[6:7]|, v[14:15] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], -v[12:13], v[18:19], v[24:25] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v6, v10, v6, s[4:5] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v7, v11, v7, s[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[20:21], v[22:23] +; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[6:7], v[16:17], v[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], v[26:27] +; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[6:7], v[18:19], v[16:17] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], v[28:29] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[16:17], v[20:21], v[22:23] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], v[30:31] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[16:17], v[18:19], v[26:27] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], v[32:33] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[16:17], v[18:19], v[28:29] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[16:17], v[18:19], v[30:31] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[16:17], v[18:19], v[32:33] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[16:17], v[18:19], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], v[48:49] +; SI-GISEL-NEXT: v_mov_b32_e32 v50, 0 +; SI-GISEL-NEXT: v_mov_b32_e32 v51, 0x40900000 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[16:17], v[18:19], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], 1.0 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v12, v[12:13] ; SI-GISEL-NEXT: v_mov_b32_e32 v14, 0 ; SI-GISEL-NEXT: v_mov_b32_e32 v15, 0xc090cc00 -; SI-GISEL-NEXT: v_mov_b32_e32 v17, 0x7ff00000 +; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x7ff00000 ; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, 0, v8, vcc -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], v[50:51] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], 1.0 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v22, v17, v9, vcc +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[16:17], v[18:19], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], 1.0 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v13, v9, vcc ; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[0:1], v[14:15] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], v[48:49] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[16:17], v[18:19], v[48:49] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v8, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[12:13], v16 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v22, vcc -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[2:3], v[10:11] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v16, v[6:7] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v12, 0, v8, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v13, v17, v9, vcc -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[18:19], v[20:21], 1.0 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v9, vcc +; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[10:11], v12 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[2:3], v[50:51] +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v12, v[6:7] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v10, 0, v8, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v11, v13, v9, vcc +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[16:17], v[18:19], 1.0 ; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[2:3], v[14:15] -; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[18:19], v[8:9], 1.0 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v12, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[6:7], v[6:7], v16 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v13, vcc -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[4:5], v[10:11] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[16:17], v[8:9], 1.0 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v10, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v11, vcc +; SI-GISEL-NEXT: v_ldexp_f64 v[6:7], v[6:7], v12 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[4:5], v[50:51] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, 0, v6, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, v17, v7, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, v13, v7, vcc ; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[4:5], v[14:15] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v6, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v7, vcc @@ -1604,149 +1604,149 @@ define <4 x double> @v_exp_v4f64(<4 x double> %in) #0 { ; SI-SDAG-NEXT: s_mov_b32 s7, 0x3ff71547 ; SI-SDAG-NEXT: v_mul_f64 v[10:11], v[0:1], s[6:7] ; SI-SDAG-NEXT: s_brev_b32 s46, -2 -; SI-SDAG-NEXT: v_mov_b32_e32 v18, 0x43300000 -; SI-SDAG-NEXT: v_bfi_b32 v9, s46, v18, v11 +; SI-SDAG-NEXT: v_mov_b32_e32 v12, 0x43300000 +; SI-SDAG-NEXT: v_bfi_b32 v9, s46, v12, v11 ; SI-SDAG-NEXT: v_mov_b32_e32 v8, 0 -; SI-SDAG-NEXT: v_add_f64 v[12:13], v[10:11], v[8:9] +; SI-SDAG-NEXT: v_add_f64 v[13:14], v[10:11], v[8:9] ; SI-SDAG-NEXT: s_mov_b32 s8, -1 ; SI-SDAG-NEXT: s_mov_b32 s9, 0x432fffff -; SI-SDAG-NEXT: v_mul_f64 v[14:15], v[2:3], s[6:7] -; SI-SDAG-NEXT: v_add_f64 v[12:13], v[12:13], -v[8:9] +; SI-SDAG-NEXT: v_add_f64 v[13:14], v[13:14], -v[8:9] ; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[10:11]|, s[8:9] -; SI-SDAG-NEXT: v_bfi_b32 v9, s46, v18, v15 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v11, v13, v11, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v10, v12, v10, vcc -; SI-SDAG-NEXT: v_add_f64 v[12:13], v[14:15], v[8:9] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[14:15]|, s[8:9] -; SI-SDAG-NEXT: v_add_f64 v[12:13], v[12:13], -v[8:9] ; SI-SDAG-NEXT: s_mov_b32 s10, 0xfefa39ef -; SI-SDAG-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v12, v12, v14, vcc -; SI-SDAG-NEXT: v_mul_f64 v[14:15], v[4:5], s[6:7] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v14, v14, v11, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v13, v13, v10, vcc ; SI-SDAG-NEXT: s_mov_b32 s11, 0xbfe62e42 -; SI-SDAG-NEXT: v_bfi_b32 v9, s46, v18, v15 -; SI-SDAG-NEXT: v_add_f64 v[16:17], v[14:15], v[8:9] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[14:15]|, s[8:9] -; SI-SDAG-NEXT: v_add_f64 v[16:17], v[16:17], -v[8:9] +; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[13:14], s[10:11], v[0:1] ; SI-SDAG-NEXT: s_mov_b32 s12, 0x3b39803f -; SI-SDAG-NEXT: v_cndmask_b32_e32 v15, v17, v15, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v14, v16, v14, vcc -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[10:11], s[10:11], v[0:1] ; SI-SDAG-NEXT: s_mov_b32 s13, 0xbc7abc9e ; SI-SDAG-NEXT: s_mov_b32 s5, 0x3e928af3 -; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[10:11], s[12:13], v[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], s[12:13], v[9:10] ; SI-SDAG-NEXT: s_mov_b32 s4, 0xfca7ab0c -; SI-SDAG-NEXT: v_mov_b32_e32 v17, s5 -; SI-SDAG-NEXT: s_mov_b32 s16, 0x6a5dcb37 -; SI-SDAG-NEXT: s_mov_b32 s17, 0x3e5ade15 -; SI-SDAG-NEXT: v_mov_b32_e32 v16, s4 -; SI-SDAG-NEXT: v_fma_f64 v[21:22], v[19:20], s[16:17], v[16:17] -; SI-SDAG-NEXT: s_mov_b32 s14, 0x623fde64 -; SI-SDAG-NEXT: s_mov_b32 s15, 0x3ec71dee -; SI-SDAG-NEXT: v_fma_f64 v[21:22], v[19:20], v[21:22], s[14:15] +; SI-SDAG-NEXT: v_mov_b32_e32 v11, s5 +; SI-SDAG-NEXT: s_mov_b32 s14, 0x6a5dcb37 +; SI-SDAG-NEXT: s_mov_b32 s15, 0x3e5ade15 +; SI-SDAG-NEXT: v_mov_b32_e32 v10, s4 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], s[14:15], v[10:11] +; SI-SDAG-NEXT: s_mov_b32 s16, 0x623fde64 +; SI-SDAG-NEXT: s_mov_b32 s17, 0x3ec71dee +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[16:17] ; SI-SDAG-NEXT: s_mov_b32 s18, 0x7c89e6b0 ; SI-SDAG-NEXT: s_mov_b32 s19, 0x3efa0199 -; SI-SDAG-NEXT: v_fma_f64 v[21:22], v[19:20], v[21:22], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[18:19] ; SI-SDAG-NEXT: s_mov_b32 s20, 0x14761f6e ; SI-SDAG-NEXT: s_mov_b32 s21, 0x3f2a01a0 -; SI-SDAG-NEXT: v_fma_f64 v[21:22], v[19:20], v[21:22], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[20:21] ; SI-SDAG-NEXT: s_mov_b32 s22, 0x1852b7b0 ; SI-SDAG-NEXT: s_mov_b32 s23, 0x3f56c16c -; SI-SDAG-NEXT: v_fma_f64 v[21:22], v[19:20], v[21:22], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[22:23] ; SI-SDAG-NEXT: s_mov_b32 s24, 0x11122322 ; SI-SDAG-NEXT: s_mov_b32 s25, 0x3f811111 -; SI-SDAG-NEXT: v_fma_f64 v[21:22], v[19:20], v[21:22], s[24:25] -; SI-SDAG-NEXT: s_mov_b32 s40, 0x555502a1 -; SI-SDAG-NEXT: s_mov_b32 s41, 0x3fa55555 -; SI-SDAG-NEXT: v_fma_f64 v[21:22], v[19:20], v[21:22], s[40:41] -; SI-SDAG-NEXT: s_mov_b32 s42, 0x55555511 -; SI-SDAG-NEXT: s_mov_b32 s43, 0x3fc55555 -; SI-SDAG-NEXT: v_fma_f64 v[21:22], v[19:20], v[21:22], s[42:43] -; SI-SDAG-NEXT: s_mov_b32 s44, 11 -; SI-SDAG-NEXT: s_mov_b32 s45, 0x3fe00000 -; SI-SDAG-NEXT: v_fma_f64 v[21:22], v[19:20], v[21:22], s[44:45] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v9, v[10:11] -; SI-SDAG-NEXT: v_fma_f64 v[21:22], v[19:20], v[21:22], 1.0 -; SI-SDAG-NEXT: s_mov_b32 s28, 0 -; SI-SDAG-NEXT: s_mov_b32 s29, 0x40900000 -; SI-SDAG-NEXT: s_mov_b32 s26, 0 -; SI-SDAG-NEXT: s_mov_b32 s27, 0xc090cc00 -; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[19:20], v[21:22], 1.0 -; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[28:29], v[0:1] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[26:27], v[0:1] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[12:13], s[10:11], v[2:3] -; SI-SDAG-NEXT: v_ldexp_f64 v[9:10], v[19:20], v9 -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[12:13], s[12:13], v[0:1] -; SI-SDAG-NEXT: v_mov_b32_e32 v19, 0x7ff00000 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v20, v19, v10, vcc -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[0:1], s[16:17], v[16:17] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v12, v[12:13] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[0:1], v[10:11], s[14:15] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[24:25] +; SI-SDAG-NEXT: s_mov_b32 s26, 0x555502a1 +; SI-SDAG-NEXT: s_mov_b32 s27, 0x3fa55555 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[26:27] +; SI-SDAG-NEXT: s_mov_b32 s28, 0x55555511 +; SI-SDAG-NEXT: s_mov_b32 s29, 0x3fc55555 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[28:29] +; SI-SDAG-NEXT: s_mov_b32 s40, 11 +; SI-SDAG-NEXT: s_mov_b32 s41, 0x3fe00000 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[40:41] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v19, v[13:14] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], 1.0 +; SI-SDAG-NEXT: s_mov_b32 s42, 0 +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[15:16], v[17:18], 1.0 +; SI-SDAG-NEXT: v_mul_f64 v[17:18], v[2:3], s[6:7] +; SI-SDAG-NEXT: v_ldexp_f64 v[15:16], v[15:16], v19 +; SI-SDAG-NEXT: v_bfi_b32 v9, s46, v12, v18 +; SI-SDAG-NEXT: v_add_f64 v[13:14], v[17:18], v[8:9] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[17:18]|, s[8:9] +; SI-SDAG-NEXT: v_add_f64 v[13:14], v[13:14], -v[8:9] +; SI-SDAG-NEXT: s_mov_b32 s43, 0x40900000 +; SI-SDAG-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v13, v13, v17, vcc +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[13:14], s[10:11], v[2:3] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v9, v[13:14] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[13:14], s[12:13], v[17:18] +; SI-SDAG-NEXT: s_mov_b32 s44, 0 +; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[17:18], s[14:15], v[10:11] +; SI-SDAG-NEXT: s_mov_b32 s45, 0xc090cc00 +; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[17:18], v[19:20], s[16:17] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[42:43], v[0:1] +; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[17:18], v[19:20], s[18:19] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[44:45], v[0:1] +; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[17:18], v[19:20], s[20:21] +; SI-SDAG-NEXT: v_mul_f64 v[13:14], v[4:5], s[6:7] +; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[17:18], v[19:20], s[22:23] +; SI-SDAG-NEXT: v_mov_b32_e32 v21, 0x7ff00000 +; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[17:18], v[19:20], s[24:25] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v22, v21, v16, vcc +; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[17:18], v[19:20], s[26:27] ; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[0:1], v[10:11], s[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[0:1], v[10:11], s[20:21] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[0:1], v[10:11], s[22:23] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[0:1], v[10:11], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[0:1], v[10:11], s[40:41] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[0:1], v[10:11], s[42:43] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[0:1], v[10:11], s[44:45] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[0:1], v[10:11], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[0:1], v[10:11], 1.0 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v9, vcc -; SI-SDAG-NEXT: v_ldexp_f64 v[9:10], v[10:11], v12 -; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[28:29], v[2:3] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v20, s[4:5] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[26:27], v[2:3] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v12, v19, v10, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v12, s[4:5] -; SI-SDAG-NEXT: v_mul_f64 v[12:13], v[6:7], s[6:7] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[14:15], s[10:11], v[4:5] +; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[17:18], v[19:20], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[17:18], v[19:20], s[40:41] +; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[17:18], v[19:20], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], v[19:20], 1.0 +; SI-SDAG-NEXT: v_ldexp_f64 v[16:17], v[0:1], v9 +; SI-SDAG-NEXT: v_bfi_b32 v9, s46, v12, v14 +; SI-SDAG-NEXT: v_add_f64 v[18:19], v[13:14], v[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v15, vcc +; SI-SDAG-NEXT: v_add_f64 v[18:19], v[18:19], -v[8:9] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[13:14]|, s[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v22, s[4:5] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v14, v19, v14, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v13, v18, v13, vcc +; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[13:14], s[10:11], v[4:5] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[42:43], v[2:3] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[44:45], v[2:3] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v15, v21, v17, vcc +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[13:14], s[12:13], v[18:19] +; SI-SDAG-NEXT: v_mul_f64 v[19:20], v[6:7], s[6:7] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v22, v[13:14] +; SI-SDAG-NEXT: v_bfi_b32 v9, s46, v12, v20 +; SI-SDAG-NEXT: v_add_f64 v[12:13], v[19:20], v[8:9] ; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v9, vcc -; SI-SDAG-NEXT: v_bfi_b32 v9, s46, v18, v13 -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[14:15], s[12:13], v[10:11] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v20, v[14:15] -; SI-SDAG-NEXT: v_add_f64 v[14:15], v[12:13], v[8:9] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[12:13]|, s[8:9] -; SI-SDAG-NEXT: v_add_f64 v[8:9], v[14:15], -v[8:9] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], s[16:17], v[16:17] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v9, v13, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v8, v8, v12, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v16, vcc +; SI-SDAG-NEXT: v_add_f64 v[8:9], v[12:13], -v[8:9] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[19:20]|, s[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v15, s[4:5] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v9, v20, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v8, v8, v19, vcc ; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[8:9], s[10:11], v[6:7] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], s[14:15] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], s[14:15], v[10:11] ; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[8:9], s[12:13], v[12:13] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], s[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[12:13], s[16:17], v[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], s[20:21] -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[12:13], v[16:17], s[14:15] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], s[22:23] -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[12:13], v[16:17], s[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[12:13], v[16:17], s[20:21] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], s[40:41] -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[12:13], v[16:17], s[22:23] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], s[42:43] -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[12:13], v[16:17], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], s[44:45] -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[12:13], v[16:17], s[40:41] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[12:13], v[16:17], s[42:43] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[10:11], v[14:15], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[12:13], v[16:17], s[44:45] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], s[14:15], v[10:11] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[40:41] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[40:41] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], 1.0 ; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v8, v[8:9] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[12:13], v[16:17], 1.0 -; SI-SDAG-NEXT: v_ldexp_f64 v[10:11], v[10:11], v20 -; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[28:29], v[4:5] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[26:27], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[12:13], v[14:15], 1.0 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v19, v11, vcc +; SI-SDAG-NEXT: v_ldexp_f64 v[14:15], v[14:15], v22 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[42:43], v[4:5] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[44:45], v[4:5] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], 1.0 +; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v21, v15, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc ; SI-SDAG-NEXT: v_cndmask_b32_e64 v5, 0, v9, s[4:5] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v10, vcc -; SI-SDAG-NEXT: v_ldexp_f64 v[8:9], v[12:13], v8 -; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[28:29], v[6:7] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[26:27], v[6:7] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v19, v9, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v14, vcc +; SI-SDAG-NEXT: v_ldexp_f64 v[8:9], v[10:11], v8 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[42:43], v[6:7] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[44:45], v[6:7] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v21, v9, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc ; SI-SDAG-NEXT: v_cndmask_b32_e64 v7, 0, v9, s[4:5] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc @@ -1755,156 +1755,180 @@ define <4 x double> @v_exp_v4f64(<4 x double> %in) #0 { ; SI-GISEL-LABEL: v_exp_v4f64: ; SI-GISEL: ; %bb.0: ; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0x652b82fe -; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x3ff71547 -; SI-GISEL-NEXT: v_mul_f64 v[14:15], v[0:1], v[12:13] -; SI-GISEL-NEXT: v_mov_b32_e32 v8, 0 -; SI-GISEL-NEXT: v_and_b32_e32 v9, 0x80000000, v15 -; SI-GISEL-NEXT: v_or_b32_e32 v9, 0x43300000, v9 -; SI-GISEL-NEXT: v_add_f64 v[16:17], v[14:15], v[8:9] -; SI-GISEL-NEXT: v_mul_f64 v[18:19], v[2:3], v[12:13] -; SI-GISEL-NEXT: v_add_f64 v[16:17], v[16:17], -v[8:9] -; SI-GISEL-NEXT: v_and_b32_e32 v9, 0x80000000, v19 -; SI-GISEL-NEXT: v_mov_b32_e32 v10, -1 -; SI-GISEL-NEXT: v_mov_b32_e32 v11, 0x432fffff -; SI-GISEL-NEXT: v_or_b32_e32 v9, 0x43300000, v9 -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[14:15]|, v[10:11] -; SI-GISEL-NEXT: v_add_f64 v[20:21], v[18:19], v[8:9] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v16, v16, v14, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v17, v17, v15, vcc -; SI-GISEL-NEXT: v_add_f64 v[14:15], v[20:21], -v[8:9] -; SI-GISEL-NEXT: v_mul_f64 v[20:21], v[4:5], v[12:13] -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[18:19]|, v[10:11] -; SI-GISEL-NEXT: v_and_b32_e32 v9, 0x80000000, v21 -; SI-GISEL-NEXT: v_or_b32_e32 v9, 0x43300000, v9 -; SI-GISEL-NEXT: v_add_f64 v[22:23], v[20:21], v[8:9] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v15, v15, v19, vcc -; SI-GISEL-NEXT: v_add_f64 v[18:19], v[22:23], -v[8:9] -; SI-GISEL-NEXT: v_mov_b32_e32 v22, 0xfefa39ef -; SI-GISEL-NEXT: v_mov_b32_e32 v23, 0x3fe62e42 -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[20:21]|, v[10:11] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], -v[16:17], v[22:23], v[0:1] -; SI-GISEL-NEXT: v_mov_b32_e32 v26, 0x3b39803f -; SI-GISEL-NEXT: v_mov_b32_e32 v27, 0x3c7abc9e -; SI-GISEL-NEXT: v_cndmask_b32_e32 v18, v18, v20, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v19, v19, v21, vcc -; SI-GISEL-NEXT: v_fma_f64 v[20:21], -v[16:17], v[26:27], v[24:25] -; SI-GISEL-NEXT: v_mov_b32_e32 v24, 0x6a5dcb37 -; SI-GISEL-NEXT: v_mov_b32_e32 v25, 0x3e5ade15 -; SI-GISEL-NEXT: v_mov_b32_e32 v28, 0xfca7ab0c -; SI-GISEL-NEXT: v_mov_b32_e32 v29, 0x3e928af3 -; SI-GISEL-NEXT: v_fma_f64 v[30:31], v[20:21], v[24:25], v[28:29] -; SI-GISEL-NEXT: v_mov_b32_e32 v32, 0x623fde64 -; SI-GISEL-NEXT: v_mov_b32_e32 v33, 0x3ec71dee -; SI-GISEL-NEXT: v_fma_f64 v[30:31], v[20:21], v[30:31], v[32:33] -; SI-GISEL-NEXT: v_mul_f64 v[12:13], v[6:7], v[12:13] -; SI-GISEL-NEXT: v_mov_b32_e32 v34, 0x7c89e6b0 -; SI-GISEL-NEXT: v_mov_b32_e32 v35, 0x3efa0199 -; SI-GISEL-NEXT: v_fma_f64 v[30:31], v[20:21], v[30:31], v[34:35] -; SI-GISEL-NEXT: v_and_b32_e32 v9, 0x80000000, v13 -; SI-GISEL-NEXT: v_mov_b32_e32 v36, 0x14761f6e -; SI-GISEL-NEXT: v_mov_b32_e32 v37, 0x3f2a01a0 -; SI-GISEL-NEXT: v_or_b32_e32 v9, 0x43300000, v9 -; SI-GISEL-NEXT: v_fma_f64 v[30:31], v[20:21], v[30:31], v[36:37] -; SI-GISEL-NEXT: v_add_f64 v[38:39], v[12:13], v[8:9] -; SI-GISEL-NEXT: v_mov_b32_e32 v48, 0x1852b7b0 -; SI-GISEL-NEXT: v_mov_b32_e32 v49, 0x3f56c16c -; SI-GISEL-NEXT: v_fma_f64 v[30:31], v[20:21], v[30:31], v[48:49] -; SI-GISEL-NEXT: v_add_f64 v[8:9], v[38:39], -v[8:9] -; SI-GISEL-NEXT: v_mov_b32_e32 v38, 0x11122322 -; SI-GISEL-NEXT: v_mov_b32_e32 v39, 0x3f811111 -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[12:13]|, v[10:11] -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[20:21], v[30:31], v[38:39] -; SI-GISEL-NEXT: v_mov_b32_e32 v30, 0x555502a1 -; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0x3fa55555 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[20:21], v[10:11], v[30:31] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, v8, v12, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v9, v13, vcc -; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0x55555511 -; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x3fc55555 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[20:21], v[10:11], v[12:13] -; SI-GISEL-NEXT: v_mov_b32_e32 v50, 11 -; SI-GISEL-NEXT: v_mov_b32_e32 v51, 0x3fe00000 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[20:21], v[10:11], v[50:51] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v52, v[14:15] -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[20:21], v[10:11], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[20:21], v[10:11], 1.0 -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v20, v[16:17] -; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[14:15], v[22:23], v[2:3] -; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[14:15], v[26:27], v[16:17] -; SI-GISEL-NEXT: v_ldexp_f64 v[10:11], v[10:11], v20 -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[16:17], v[24:25], v[28:29] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[16:17], v[20:21], v[32:33] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[16:17], v[20:21], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[16:17], v[20:21], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[16:17], v[20:21], v[48:49] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[16:17], v[20:21], v[38:39] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[16:17], v[20:21], v[30:31] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[16:17], v[20:21], v[12:13] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[16:17], v[20:21], v[50:51] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[16:17], v[20:21], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[16:17], v[20:21], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[20:21], -v[18:19], v[22:23], v[4:5] -; SI-GISEL-NEXT: v_fma_f64 v[22:23], -v[8:9], v[22:23], v[6:7] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], -v[18:19], v[26:27], v[20:21] -; SI-GISEL-NEXT: v_fma_f64 v[22:23], -v[8:9], v[26:27], v[22:23] -; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[20:21], v[24:25], v[28:29] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[22:23], v[24:25], v[28:29] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[26:27], v[32:33] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[22:23], v[24:25], v[32:33] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[14:15], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[22:23], v[24:25], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[14:15], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[22:23], v[24:25], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[14:15], v[48:49] -; SI-GISEL-NEXT: v_mov_b32_e32 v28, 0 -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[14:15], v[38:39] -; SI-GISEL-NEXT: v_mov_b32_e32 v29, 0x40900000 -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[14:15], v[30:31] -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[28:29] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[14:15], v[12:13] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[22:23], v[24:25], v[48:49] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[14:15], v[50:51] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v53, 0, v10, vcc -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[22:23], v[24:25], v[38:39] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[14:15], 1.0 -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v10, v[18:19] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[22:23], v[24:25], v[30:31] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[14:15], 1.0 -; SI-GISEL-NEXT: v_mov_b32_e32 v18, 0x7ff00000 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[24:25], v[12:13] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v19, v18, v11, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[10:11], v[14:15], v10 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[4:5], v[28:29] -; SI-GISEL-NEXT: v_mov_b32_e32 v26, 0 -; SI-GISEL-NEXT: v_mov_b32_e32 v27, 0xc090cc00 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[50:51] +; SI-GISEL-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill +; SI-GISEL-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill +; SI-GISEL-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill +; SI-GISEL-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill +; SI-GISEL-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill +; SI-GISEL-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill +; SI-GISEL-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; SI-GISEL-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; SI-GISEL-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; SI-GISEL-NEXT: buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill +; SI-GISEL-NEXT: v_mov_b32_e32 v34, 0x652b82fe +; SI-GISEL-NEXT: v_mov_b32_e32 v35, 0x3ff71547 +; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[0:1], v[34:35] +; SI-GISEL-NEXT: v_mov_b32_e32 v22, 0 +; SI-GISEL-NEXT: v_and_b32_e32 v10, 0x80000000, v9 +; SI-GISEL-NEXT: v_or_b32_e32 v23, 0x43300000, v10 +; SI-GISEL-NEXT: v_add_f64 v[10:11], v[8:9], v[22:23] +; SI-GISEL-NEXT: v_mov_b32_e32 v24, -1 +; SI-GISEL-NEXT: v_mov_b32_e32 v25, 0x432fffff +; SI-GISEL-NEXT: v_add_f64 v[10:11], v[10:11], -v[22:23] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[8:9]|, v[24:25] +; SI-GISEL-NEXT: v_mov_b32_e32 v26, 0xfefa39ef +; SI-GISEL-NEXT: v_cndmask_b32_e32 v10, v10, v8, vcc +; SI-GISEL-NEXT: v_mov_b32_e32 v27, 0x3fe62e42 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v11, v11, v9, vcc +; SI-GISEL-NEXT: v_mul_f64 v[38:39], v[2:3], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[10:11], v[26:27], v[0:1] +; SI-GISEL-NEXT: v_mov_b32_e32 v28, 0x3b39803f +; SI-GISEL-NEXT: v_mov_b32_e32 v29, 0x3c7abc9e +; SI-GISEL-NEXT: v_and_b32_e32 v23, 0x80000000, v39 +; SI-GISEL-NEXT: v_fma_f64 v[14:15], -v[10:11], v[28:29], v[8:9] +; SI-GISEL-NEXT: v_or_b32_e32 v23, 0x43300000, v23 +; SI-GISEL-NEXT: v_mov_b32_e32 v30, 0x6a5dcb37 +; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0x3e5ade15 +; SI-GISEL-NEXT: v_mov_b32_e32 v32, 0xfca7ab0c +; SI-GISEL-NEXT: v_mov_b32_e32 v33, 0x3e928af3 +; SI-GISEL-NEXT: v_add_f64 v[48:49], v[38:39], v[22:23] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[14:15], v[30:31], v[32:33] +; SI-GISEL-NEXT: v_mov_b32_e32 v18, 0x623fde64 +; SI-GISEL-NEXT: v_mov_b32_e32 v19, 0x3ec71dee +; SI-GISEL-NEXT: v_add_f64 v[48:49], v[48:49], -v[22:23] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[38:39]|, v[24:25] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[14:15], v[8:9], v[18:19] +; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0x7c89e6b0 +; SI-GISEL-NEXT: v_mov_b32_e32 v21, 0x3efa0199 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v38, v48, v38, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v39, v49, v39, vcc +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[14:15], v[8:9], v[20:21] +; SI-GISEL-NEXT: v_fma_f64 v[48:49], -v[38:39], v[26:27], v[2:3] +; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0x14761f6e +; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x3f2a01a0 +; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[14:15], v[8:9], v[12:13] +; SI-GISEL-NEXT: v_fma_f64 v[48:49], -v[38:39], v[28:29], v[48:49] +; SI-GISEL-NEXT: v_mov_b32_e32 v8, 0x1852b7b0 +; SI-GISEL-NEXT: v_mov_b32_e32 v9, 0x3f56c16c +; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[52:53], v[48:49], v[30:31], v[32:33] +; SI-GISEL-NEXT: v_mov_b32_e32 v36, 0x11122322 +; SI-GISEL-NEXT: v_mov_b32_e32 v37, 0x3f811111 +; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[52:53], v[48:49], v[52:53], v[18:19] +; SI-GISEL-NEXT: v_mov_b32_e32 v50, 0x555502a1 +; SI-GISEL-NEXT: v_mov_b32_e32 v51, 0x3fa55555 +; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[52:53], v[48:49], v[52:53], v[20:21] +; SI-GISEL-NEXT: v_mov_b32_e32 v54, 0x55555511 +; SI-GISEL-NEXT: v_mov_b32_e32 v55, 0x3fc55555 +; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], v[54:55] +; SI-GISEL-NEXT: v_fma_f64 v[52:53], v[48:49], v[52:53], v[12:13] +; SI-GISEL-NEXT: v_mov_b32_e32 v40, 11 +; SI-GISEL-NEXT: v_mov_b32_e32 v41, 0x3fe00000 +; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], v[40:41] +; SI-GISEL-NEXT: v_fma_f64 v[52:53], v[48:49], v[52:53], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[52:53], v[48:49], v[52:53], v[36:37] +; SI-GISEL-NEXT: s_waitcnt expcnt(4) +; SI-GISEL-NEXT: v_mul_f64 v[44:45], v[4:5], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[42:43], v[14:15], v[16:17], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[48:49], v[52:53], v[50:51] +; SI-GISEL-NEXT: v_and_b32_e32 v23, 0x80000000, v45 +; SI-GISEL-NEXT: v_or_b32_e32 v23, 0x43300000, v23 +; SI-GISEL-NEXT: v_fma_f64 v[52:53], v[48:49], v[14:15], v[54:55] +; SI-GISEL-NEXT: s_waitcnt expcnt(2) +; SI-GISEL-NEXT: v_add_f64 v[46:47], v[44:45], v[22:23] +; SI-GISEL-NEXT: v_mul_f64 v[34:35], v[6:7], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[52:53], v[48:49], v[52:53], v[40:41] +; SI-GISEL-NEXT: v_add_f64 v[46:47], v[46:47], -v[22:23] +; SI-GISEL-NEXT: v_and_b32_e32 v23, 0x80000000, v35 +; SI-GISEL-NEXT: v_or_b32_e32 v23, 0x43300000, v23 +; SI-GISEL-NEXT: v_fma_f64 v[52:53], v[48:49], v[52:53], 1.0 +; SI-GISEL-NEXT: s_waitcnt expcnt(0) +; SI-GISEL-NEXT: v_add_f64 v[56:57], v[34:35], v[22:23] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[44:45]|, v[24:25] +; SI-GISEL-NEXT: v_fma_f64 v[48:49], v[48:49], v[52:53], 1.0 +; SI-GISEL-NEXT: v_add_f64 v[22:23], v[56:57], -v[22:23] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v52, v46, v44, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v53, v47, v45, vcc +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[34:35]|, v[24:25] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], -v[52:53], v[26:27], v[4:5] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v22, v22, v34, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v23, v23, v35, vcc +; SI-GISEL-NEXT: v_fma_f64 v[26:27], -v[22:23], v[26:27], v[6:7] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], -v[52:53], v[28:29], v[24:25] +; SI-GISEL-NEXT: v_fma_f64 v[26:27], -v[22:23], v[28:29], v[26:27] +; SI-GISEL-NEXT: v_fma_f64 v[28:29], v[24:25], v[30:31], v[32:33] +; SI-GISEL-NEXT: v_fma_f64 v[30:31], v[26:27], v[30:31], v[32:33] +; SI-GISEL-NEXT: v_fma_f64 v[28:29], v[24:25], v[28:29], v[18:19] +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v32, v[10:11] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[26:27], v[30:31], v[18:19] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[24:25], v[28:29], v[20:21] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[26:27], v[10:11], v[20:21] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[24:25], v[18:19], v[12:13] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[26:27], v[10:11], v[12:13] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[24:25], v[18:19], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[26:27], v[10:11], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[24:25], v[18:19], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[26:27], v[8:9], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[24:25], v[18:19], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[26:27], v[8:9], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[12:13], v[54:55] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[26:27], v[8:9], v[54:55] +; SI-GISEL-NEXT: v_ldexp_f64 v[20:21], v[42:43], v32 +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], v[40:41] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[26:27], v[8:9], v[40:41] +; SI-GISEL-NEXT: buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload +; SI-GISEL-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; SI-GISEL-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; SI-GISEL-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; SI-GISEL-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload +; SI-GISEL-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload +; SI-GISEL-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload +; SI-GISEL-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload +; SI-GISEL-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload +; SI-GISEL-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload +; SI-GISEL-NEXT: v_mov_b32_e32 v16, 0 +; SI-GISEL-NEXT: v_mov_b32_e32 v17, 0x40900000 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v28, v[38:39] +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[16:17] +; SI-GISEL-NEXT: v_mov_b32_e32 v14, 0 +; SI-GISEL-NEXT: v_mov_b32_e32 v15, 0xc090cc00 +; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x7ff00000 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v20, 0, v20, vcc +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], 1.0 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v12, v[52:53] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v18, v13, v21, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[0:1], v[14:15] +; SI-GISEL-NEXT: v_ldexp_f64 v[28:29], v[48:49], v28 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e64 s[4:5], v[2:3], v[16:17] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[24:25], v[10:11], 1.0 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v20, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v18, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[2:3], v[14:15] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v28, 0, v28, s[4:5] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v18, v13, v29, s[4:5] +; SI-GISEL-NEXT: v_ldexp_f64 v[10:11], v[10:11], v12 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v12, v[22:23] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v28, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v18, vcc +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[4:5], v[16:17] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[26:27], v[8:9], 1.0 ; SI-GISEL-NEXT: v_cndmask_b32_e32 v10, 0, v10, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v11, v18, v11, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[0:1], v[26:27] -; SI-GISEL-NEXT: v_ldexp_f64 v[16:17], v[16:17], v52 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e64 s[4:5], v[2:3], v[28:29] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v14, v[8:9] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v53, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v19, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[2:3], v[26:27] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[22:23], v[12:13], 1.0 -; SI-GISEL-NEXT: v_cndmask_b32_e64 v16, 0, v16, s[4:5] -; SI-GISEL-NEXT: v_cndmask_b32_e64 v17, v18, v17, s[4:5] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v16, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v17, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[4:5], v[26:27] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[22:23], v[8:9], 1.0 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v11, v13, v11, vcc +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[26:27], v[8:9], 1.0 +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[4:5], v[14:15] +; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[8:9], v12 ; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v10, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v11, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[8:9], v14 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[6:7], v[28:29] +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[6:7], v[16:17] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, 0, v8, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v18, v9, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[6:7], v[26:27] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v13, v9, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[6:7], v[14:15] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, 0, v9, vcc +; SI-GISEL-NEXT: s_waitcnt vmcnt(0) ; SI-GISEL-NEXT: s_setpc_b64 s[30:31] ; ; VI-SDAG-LABEL: v_exp_v4f64: @@ -2998,35 +3022,35 @@ define amdgpu_ps <4 x i32> @s_exp_v2f64(<2 x double> inreg %in) #0 { ; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[4:5], v[14:15], v[30:31] ; SI-GISEL-NEXT: v_mul_f64 v[0:1], s[2:3], v[0:1] ; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[4:5], v[14:15], 1.0 -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 s[10:11], |v[0:1]|, v[6:7] ; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[4:5], v[14:15], 1.0 ; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v14, s[4:5] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 s[4:5], |v[0:1]|, v[6:7] ; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0 -; SI-GISEL-NEXT: v_mov_b32_e32 v7, 0xc090cc00 +; SI-GISEL-NEXT: v_mov_b32_e32 v7, 0x40900000 ; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[4:5], v14 -; SI-GISEL-NEXT: v_readfirstlane_b32 s4, v4 -; SI-GISEL-NEXT: v_readfirstlane_b32 s5, v5 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[0:1], v[6:7] +; SI-GISEL-NEXT: v_readfirstlane_b32 s10, v4 +; SI-GISEL-NEXT: v_readfirstlane_b32 s11, v5 ; SI-GISEL-NEXT: v_mov_b32_e32 v4, 0 -; SI-GISEL-NEXT: v_mov_b32_e32 v5, 0x40900000 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[0:1], v[4:5] +; SI-GISEL-NEXT: v_mov_b32_e32 v5, 0xc090cc00 ; SI-GISEL-NEXT: s_or_b64 s[12:13], vcc, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[0:1], v[6:7] +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[0:1], v[4:5] ; SI-GISEL-NEXT: s_mov_b32 s12, 0 ; SI-GISEL-NEXT: s_mov_b32 s13, 0x7ff00000 -; SI-GISEL-NEXT: s_cselect_b64 s[0:1], s[4:5], s[12:13] -; SI-GISEL-NEXT: s_or_b64 s[4:5], vcc, vcc -; SI-GISEL-NEXT: v_readfirstlane_b32 s4, v0 -; SI-GISEL-NEXT: v_readfirstlane_b32 s5, v1 +; SI-GISEL-NEXT: s_cselect_b64 s[0:1], s[10:11], s[12:13] +; SI-GISEL-NEXT: s_or_b64 s[10:11], vcc, vcc +; SI-GISEL-NEXT: v_readfirstlane_b32 s10, v0 +; SI-GISEL-NEXT: v_readfirstlane_b32 s11, v1 ; SI-GISEL-NEXT: s_cselect_b64 s[0:1], s[0:1], 0 -; SI-GISEL-NEXT: s_and_b64 s[6:7], s[4:5], s[6:7] +; SI-GISEL-NEXT: s_and_b64 s[6:7], s[10:11], s[6:7] ; SI-GISEL-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9] ; SI-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], s[6:7] -; SI-GISEL-NEXT: s_or_b64 s[8:9], s[10:11], s[10:11] +; SI-GISEL-NEXT: s_or_b64 s[4:5], s[4:5], s[4:5] ; SI-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], -s[6:7] -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[2:3], v[4:5] +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[2:3], v[6:7] ; SI-GISEL-NEXT: v_readfirstlane_b32 s6, v0 ; SI-GISEL-NEXT: v_readfirstlane_b32 s7, v1 -; SI-GISEL-NEXT: s_cselect_b64 s[4:5], s[4:5], s[6:7] +; SI-GISEL-NEXT: s_cselect_b64 s[4:5], s[10:11], s[6:7] ; SI-GISEL-NEXT: v_mov_b32_e32 v0, s4 ; SI-GISEL-NEXT: v_mov_b32_e32 v1, s5 ; SI-GISEL-NEXT: v_fma_f64 v[0:1], -v[0:1], v[2:3], s[2:3] @@ -3034,7 +3058,7 @@ define amdgpu_ps <4 x i32> @s_exp_v2f64(<2 x double> inreg %in) #0 { ; SI-GISEL-NEXT: v_fma_f64 v[0:1], -s[4:5], v[8:9], v[0:1] ; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v8, s[4:5] ; SI-GISEL-NEXT: v_fma_f64 v[2:3], v[0:1], v[10:11], v[12:13] -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[2:3], v[6:7] +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[2:3], v[4:5] ; SI-GISEL-NEXT: v_fma_f64 v[2:3], v[0:1], v[2:3], v[16:17] ; SI-GISEL-NEXT: v_fma_f64 v[2:3], v[0:1], v[2:3], v[18:19] ; SI-GISEL-NEXT: v_fma_f64 v[2:3], v[0:1], v[2:3], v[20:21] @@ -3428,17 +3452,17 @@ define amdgpu_ps <6 x i32> @s_exp_v3f64(<3 x double> inreg %in) #0 { ; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v15, v3 ; SI-SDAG-NEXT: v_mov_b32_e32 v4, 0 ; SI-SDAG-NEXT: v_add_f64 v[6:7], v[2:3], v[4:5] -; SI-SDAG-NEXT: s_mov_b32 s10, -1 -; SI-SDAG-NEXT: s_mov_b32 s11, 0x432fffff +; SI-SDAG-NEXT: s_mov_b32 s8, -1 +; SI-SDAG-NEXT: s_mov_b32 s9, 0x432fffff ; SI-SDAG-NEXT: v_add_f64 v[5:6], v[6:7], -v[4:5] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[10:11] -; SI-SDAG-NEXT: s_mov_b32 s8, 0xfefa39ef +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[8:9] +; SI-SDAG-NEXT: s_mov_b32 s10, 0xfefa39ef ; SI-SDAG-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc ; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc ; SI-SDAG-NEXT: v_mov_b32_e32 v6, s5 -; SI-SDAG-NEXT: s_mov_b32 s9, 0xbfe62e42 +; SI-SDAG-NEXT: s_mov_b32 s11, 0xbfe62e42 ; SI-SDAG-NEXT: v_mov_b32_e32 v5, s4 -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[2:3], s[8:9], v[5:6] +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[2:3], s[10:11], v[5:6] ; SI-SDAG-NEXT: s_mov_b32 s12, 0x3b39803f ; SI-SDAG-NEXT: s_mov_b32 s13, 0xbc7abc9e ; SI-SDAG-NEXT: s_mov_b32 s7, 0x3e928af3 @@ -3483,76 +3507,76 @@ define amdgpu_ps <6 x i32> @s_exp_v3f64(<3 x double> inreg %in) #0 { ; SI-SDAG-NEXT: v_mul_f64 v[0:1], s[0:1], v[0:1] ; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v15, v12 ; SI-SDAG-NEXT: v_add_f64 v[13:14], v[11:12], v[4:5] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[6:7], |v[11:12]|, s[10:11] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[6:7], |v[11:12]|, s[8:9] ; SI-SDAG-NEXT: v_add_f64 v[5:6], v[13:14], -v[4:5] ; SI-SDAG-NEXT: v_mov_b32_e32 v10, 0x40900000 ; SI-SDAG-NEXT: v_cndmask_b32_e64 v12, v6, v12, s[6:7] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v11, v5, v11, s[6:7] ; SI-SDAG-NEXT: v_mov_b32_e32 v6, s3 ; SI-SDAG-NEXT: v_mov_b32_e32 v5, s2 -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[11:12], s[8:9], v[5:6] +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[11:12], s[10:11], v[5:6] ; SI-SDAG-NEXT: v_cmp_ngt_f64_e32 vcc, s[4:5], v[9:10] ; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[11:12], s[12:13], v[5:6] ; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v15, v1 ; SI-SDAG-NEXT: v_add_f64 v[15:16], v[0:1], v[4:5] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v20, v19, v3, vcc ; SI-SDAG-NEXT: v_add_f64 v[3:4], v[15:16], -v[4:5] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[6:7], |v[0:1]|, s[10:11] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[6:7], |v[0:1]|, s[8:9] ; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[13:14], s[14:15], v[7:8] -; SI-SDAG-NEXT: v_mov_b32_e32 v16, s1 ; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v4, v1, s[6:7] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[6:7] -; SI-SDAG-NEXT: v_mov_b32_e32 v15, s0 -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[17:18], s[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[0:1], s[8:9], v[15:16] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], s[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[0:1], s[12:13], v[15:16] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], s[20:21] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[15:16], s[14:15], v[7:8] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], s[22:23] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[15:16], v[7:8], s[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[15:16], v[7:8], s[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[15:16], v[7:8], s[20:21] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], s[28:29] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[15:16], v[7:8], s[22:23] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], s[30:31] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[15:16], v[7:8], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], 1.0 -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v11, v[11:12] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[15:16], v[7:8], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[15:16], v[7:8], s[28:29] -; SI-SDAG-NEXT: v_ldexp_f64 v[5:6], v[5:6], v11 -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[15:16], v[7:8], s[30:31] +; SI-SDAG-NEXT: v_mov_b32_e32 v4, s1 +; SI-SDAG-NEXT: v_mov_b32_e32 v3, s0 +; SI-SDAG-NEXT: v_fma_f64 v[3:4], v[0:1], s[10:11], v[3:4] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[17:18], s[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[3:4], v[0:1], s[12:13], v[3:4] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], s[14:15], v[7:8] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[30:31] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[28:29] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v18, v[11:12] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[30:31] +; SI-SDAG-NEXT: v_fma_f64 v[11:12], v[13:14], v[15:16], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], 1.0 +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v13, v[0:1] +; SI-SDAG-NEXT: v_mov_b32_e32 v5, 0 +; SI-SDAG-NEXT: v_mov_b32_e32 v6, 0xc090cc00 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[4:5], s[4:5], v[5:6] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[3:4], v[7:8], 1.0 ; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[6:7], s[2:3], v[9:10] -; SI-SDAG-NEXT: v_mov_b32_e32 v3, 0 -; SI-SDAG-NEXT: v_cndmask_b32_e64 v11, v19, v6, s[6:7] -; SI-SDAG-NEXT: v_fma_f64 v[6:7], v[15:16], v[7:8], 1.0 -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v8, v[0:1] -; SI-SDAG-NEXT: v_mov_b32_e32 v4, 0xc090cc00 -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[4:5], s[4:5], v[3:4] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], v[6:7], 1.0 -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[2:3], s[2:3], v[3:4] -; SI-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v8 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[2:3], s[2:3], v[5:6] +; SI-SDAG-NEXT: v_ldexp_f64 v[11:12], v[11:12], v18 +; SI-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v13 ; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[8:9], s[0:1], v[9:10] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[3:4] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[5:6] ; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc ; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[2:3], s[6:7] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v12, v19, v12, s[6:7] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v19, v1, s[8:9] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v3, 0, v5, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v11, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[0:1], s[8:9] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v17, 0, v20, s[4:5] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v6, 0, v11, s[2:3] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v12, s[2:3] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v1, s[0:1] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc ; SI-SDAG-NEXT: v_readfirstlane_b32 s0, v0 -; SI-SDAG-NEXT: v_readfirstlane_b32 s2, v3 +; SI-SDAG-NEXT: v_readfirstlane_b32 s2, v4 ; SI-SDAG-NEXT: v_readfirstlane_b32 s4, v2 ; SI-SDAG-NEXT: v_readfirstlane_b32 s1, v1 -; SI-SDAG-NEXT: v_readfirstlane_b32 s3, v6 +; SI-SDAG-NEXT: v_readfirstlane_b32 s3, v3 ; SI-SDAG-NEXT: v_readfirstlane_b32 s5, v17 ; SI-SDAG-NEXT: ; return to shader part epilog ; @@ -4184,168 +4208,168 @@ define amdgpu_ps <8 x i32> @s_exp_v4f64(<4 x double> inreg %in) #0 { ; SI-SDAG-NEXT: v_mov_b32_e32 v1, s9 ; SI-SDAG-NEXT: v_mul_f64 v[2:3], s[6:7], v[0:1] ; SI-SDAG-NEXT: s_brev_b32 s33, -2 -; SI-SDAG-NEXT: v_mov_b32_e32 v19, 0x43300000 -; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v19, v3 +; SI-SDAG-NEXT: v_mov_b32_e32 v18, 0x43300000 +; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v18, v3 ; SI-SDAG-NEXT: v_mov_b32_e32 v4, 0 ; SI-SDAG-NEXT: v_add_f64 v[6:7], v[2:3], v[4:5] -; SI-SDAG-NEXT: s_mov_b32 s12, -1 -; SI-SDAG-NEXT: s_mov_b32 s13, 0x432fffff +; SI-SDAG-NEXT: s_mov_b32 s10, -1 +; SI-SDAG-NEXT: s_mov_b32 s11, 0x432fffff ; SI-SDAG-NEXT: v_add_f64 v[5:6], v[6:7], -v[4:5] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[12:13] -; SI-SDAG-NEXT: s_mov_b32 s8, 0xfefa39ef +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[10:11] +; SI-SDAG-NEXT: s_mov_b32 s12, 0xfefa39ef ; SI-SDAG-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc ; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc ; SI-SDAG-NEXT: v_mov_b32_e32 v5, s6 -; SI-SDAG-NEXT: s_mov_b32 s9, 0xbfe62e42 +; SI-SDAG-NEXT: s_mov_b32 s13, 0xbfe62e42 ; SI-SDAG-NEXT: v_mov_b32_e32 v6, s7 -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[2:3], s[8:9], v[5:6] -; SI-SDAG-NEXT: v_mul_f64 v[8:9], s[4:5], v[0:1] -; SI-SDAG-NEXT: s_mov_b32 s10, 0x3b39803f -; SI-SDAG-NEXT: s_mov_b32 s11, 0xbc7abc9e -; SI-SDAG-NEXT: v_fma_f64 v[6:7], v[2:3], s[10:11], v[5:6] -; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v19, v9 -; SI-SDAG-NEXT: v_add_f64 v[10:11], v[8:9], v[4:5] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[8:9]|, s[12:13] -; SI-SDAG-NEXT: v_add_f64 v[10:11], v[10:11], -v[4:5] -; SI-SDAG-NEXT: s_mov_b32 s16, 0xfca7ab0c -; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v11, v9, vcc -; SI-SDAG-NEXT: v_mul_f64 v[11:12], s[2:3], v[0:1] -; SI-SDAG-NEXT: s_mov_b32 s17, 0x3e928af3 -; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v19, v12 -; SI-SDAG-NEXT: v_add_f64 v[13:14], v[11:12], v[4:5] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v8, v10, v8, vcc -; SI-SDAG-NEXT: v_mov_b32_e32 v15, s16 -; SI-SDAG-NEXT: v_add_f64 v[13:14], v[13:14], -v[4:5] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[11:12]|, s[12:13] -; SI-SDAG-NEXT: s_mov_b32 s14, 0x6a5dcb37 -; SI-SDAG-NEXT: s_mov_b32 s15, 0x3e5ade15 -; SI-SDAG-NEXT: v_mov_b32_e32 v16, s17 +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[2:3], s[12:13], v[5:6] +; SI-SDAG-NEXT: v_mul_f64 v[12:13], s[4:5], v[0:1] +; SI-SDAG-NEXT: s_mov_b32 s14, 0x3b39803f +; SI-SDAG-NEXT: s_mov_b32 s15, 0xbc7abc9e +; SI-SDAG-NEXT: v_fma_f64 v[6:7], v[2:3], s[14:15], v[5:6] +; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v18, v13 +; SI-SDAG-NEXT: v_add_f64 v[14:15], v[12:13], v[4:5] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[12:13]|, s[10:11] +; SI-SDAG-NEXT: v_add_f64 v[14:15], v[14:15], -v[4:5] +; SI-SDAG-NEXT: s_mov_b32 s8, 0xfca7ab0c +; SI-SDAG-NEXT: v_cndmask_b32_e32 v13, v15, v13, vcc ; SI-SDAG-NEXT: v_cndmask_b32_e32 v12, v14, v12, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v11, v13, v11, vcc -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], s[14:15], v[15:16] -; SI-SDAG-NEXT: s_mov_b32 s16, 0x623fde64 -; SI-SDAG-NEXT: s_mov_b32 s17, 0x3ec71dee -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], v[13:14], s[16:17] -; SI-SDAG-NEXT: s_mov_b32 s18, 0x7c89e6b0 -; SI-SDAG-NEXT: s_mov_b32 s19, 0x3efa0199 -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], v[13:14], s[18:19] -; SI-SDAG-NEXT: s_mov_b32 s20, 0x14761f6e -; SI-SDAG-NEXT: s_mov_b32 s21, 0x3f2a01a0 -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], v[13:14], s[20:21] -; SI-SDAG-NEXT: s_mov_b32 s22, 0x1852b7b0 -; SI-SDAG-NEXT: s_mov_b32 s23, 0x3f56c16c -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], v[13:14], s[22:23] -; SI-SDAG-NEXT: s_mov_b32 s24, 0x11122322 -; SI-SDAG-NEXT: s_mov_b32 s25, 0x3f811111 -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], v[13:14], s[24:25] -; SI-SDAG-NEXT: s_mov_b32 s26, 0x555502a1 -; SI-SDAG-NEXT: s_mov_b32 s27, 0x3fa55555 -; SI-SDAG-NEXT: v_mov_b32_e32 v18, s5 -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], v[13:14], s[26:27] -; SI-SDAG-NEXT: v_mov_b32_e32 v17, s4 -; SI-SDAG-NEXT: s_mov_b32 s28, 0x55555511 -; SI-SDAG-NEXT: s_mov_b32 s29, 0x3fc55555 -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[8:9], s[8:9], v[17:18] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], v[13:14], s[28:29] -; SI-SDAG-NEXT: s_mov_b32 s30, 11 -; SI-SDAG-NEXT: s_mov_b32 s31, 0x3fe00000 -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[8:9], s[10:11], v[17:18] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], v[13:14], s[30:31] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v10, v[2:3] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[17:18], s[14:15], v[15:16] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[6:7], v[13:14], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[17:18], v[2:3], s[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[6:7], v[13:14], 1.0 -; SI-SDAG-NEXT: v_mul_f64 v[0:1], s[0:1], v[0:1] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[17:18], v[2:3], s[18:19] -; SI-SDAG-NEXT: v_ldexp_f64 v[6:7], v[5:6], v10 -; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v19, v1 -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[17:18], v[2:3], s[20:21] -; SI-SDAG-NEXT: v_add_f64 v[19:20], v[0:1], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[17:18], v[2:3], s[22:23] -; SI-SDAG-NEXT: v_add_f64 v[4:5], v[19:20], -v[4:5] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[0:1]|, s[12:13] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[17:18], v[2:3], s[24:25] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc -; SI-SDAG-NEXT: v_mov_b32_e32 v5, s3 -; SI-SDAG-NEXT: v_mov_b32_e32 v4, s2 -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[17:18], v[2:3], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[4:5], v[11:12], s[8:9], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[17:18], v[2:3], s[28:29] -; SI-SDAG-NEXT: v_fma_f64 v[4:5], v[11:12], s[10:11], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[17:18], v[2:3], s[30:31] -; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[4:5], s[14:15], v[15:16] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[17:18], v[2:3], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[4:5], v[19:20], s[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[17:18], v[2:3], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[4:5], v[19:20], s[18:19] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v10, v[8:9] -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[4:5], v[17:18], s[20:21] -; SI-SDAG-NEXT: v_mov_b32_e32 v13, 0 -; SI-SDAG-NEXT: v_mov_b32_e32 v14, 0x40900000 -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[4:5], v[17:18], s[22:23] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e32 vcc, s[6:7], v[13:14] +; SI-SDAG-NEXT: v_mov_b32_e32 v15, s5 +; SI-SDAG-NEXT: s_mov_b32 s9, 0x3e928af3 +; SI-SDAG-NEXT: v_mov_b32_e32 v8, s8 +; SI-SDAG-NEXT: v_mov_b32_e32 v14, s4 +; SI-SDAG-NEXT: s_mov_b32 s16, 0x6a5dcb37 +; SI-SDAG-NEXT: s_mov_b32 s17, 0x3e5ade15 +; SI-SDAG-NEXT: v_mov_b32_e32 v9, s9 +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[12:13], s[12:13], v[14:15] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], s[16:17], v[8:9] +; SI-SDAG-NEXT: s_mov_b32 s18, 0x623fde64 +; SI-SDAG-NEXT: s_mov_b32 s19, 0x3ec71dee +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[12:13], s[14:15], v[14:15] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[18:19] +; SI-SDAG-NEXT: s_mov_b32 s20, 0x7c89e6b0 +; SI-SDAG-NEXT: s_mov_b32 s21, 0x3efa0199 +; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[14:15], s[16:17], v[8:9] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[20:21] +; SI-SDAG-NEXT: s_mov_b32 s22, 0x14761f6e +; SI-SDAG-NEXT: s_mov_b32 s23, 0x3f2a01a0 +; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[22:23] +; SI-SDAG-NEXT: s_mov_b32 s24, 0x1852b7b0 +; SI-SDAG-NEXT: s_mov_b32 s25, 0x3f56c16c +; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[24:25] +; SI-SDAG-NEXT: s_mov_b32 s26, 0x11122322 +; SI-SDAG-NEXT: s_mov_b32 s27, 0x3f811111 +; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[26:27] +; SI-SDAG-NEXT: s_mov_b32 s28, 0x555502a1 +; SI-SDAG-NEXT: s_mov_b32 s29, 0x3fa55555 +; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[28:29] +; SI-SDAG-NEXT: s_mov_b32 s30, 0x55555511 +; SI-SDAG-NEXT: s_mov_b32 s31, 0x3fc55555 +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v19, v[2:3] +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[16:17], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[30:31] +; SI-SDAG-NEXT: s_mov_b32 s34, 11 +; SI-SDAG-NEXT: s_mov_b32 s35, 0x3fe00000 +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[2:3], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[34:35] +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[2:3], s[30:31] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[2:3], s[34:35] +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[6:7], v[10:11], 1.0 +; SI-SDAG-NEXT: v_mul_f64 v[16:17], s[2:3], v[0:1] +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[2:3], 1.0 +; SI-SDAG-NEXT: v_ldexp_f64 v[6:7], v[5:6], v19 +; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v18, v17 +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[2:3], 1.0 +; SI-SDAG-NEXT: v_add_f64 v[14:15], v[16:17], v[4:5] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v20, v[12:13] +; SI-SDAG-NEXT: v_add_f64 v[12:13], v[14:15], -v[4:5] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[8:9], |v[16:17]|, s[10:11] +; SI-SDAG-NEXT: v_mov_b32_e32 v10, 0 +; SI-SDAG-NEXT: v_mov_b32_e32 v11, 0x40900000 +; SI-SDAG-NEXT: v_mov_b32_e32 v14, 0 +; SI-SDAG-NEXT: v_mov_b32_e32 v15, 0xc090cc00 +; SI-SDAG-NEXT: v_cmp_ngt_f64_e32 vcc, s[6:7], v[10:11] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v13, v13, v17, s[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v12, v12, v16, s[8:9] +; SI-SDAG-NEXT: v_mov_b32_e32 v17, s3 ; SI-SDAG-NEXT: v_mov_b32_e32 v19, 0x7ff00000 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v17, v19, v7, vcc -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[8:9], s[24:25] -; SI-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v10 -; SI-SDAG-NEXT: v_mov_b32_e32 v10, s1 -; SI-SDAG-NEXT: v_mov_b32_e32 v9, s0 -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[0:1], s[8:9], v[9:10] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], s[28:29] -; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[0:1], s[10:11], v[9:10] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], s[30:31] -; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[9:10], s[14:15], v[15:16] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[9:10], v[15:16], s[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[4:5], v[4:5], v[7:8], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[9:10], v[15:16], s[18:19] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v11, v[11:12] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[9:10], v[7:8], s[20:21] -; SI-SDAG-NEXT: v_mov_b32_e32 v15, 0 -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[9:10], v[7:8], s[22:23] -; SI-SDAG-NEXT: v_mov_b32_e32 v16, 0xc090cc00 -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[9:10], v[7:8], s[24:25] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[8:9], s[4:5], v[13:14] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[9:10], v[7:8], s[26:27] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[4:5], s[4:5], v[15:16] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[9:10], v[7:8], s[28:29] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[8:9] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v12, 0, v3, s[4:5] -; SI-SDAG-NEXT: v_ldexp_f64 v[3:4], v[4:5], v11 -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[9:10], v[7:8], s[30:31] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[10:11], s[2:3], v[13:14] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[6:7], s[6:7], v[15:16] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v11, v19, v4, s[10:11] -; SI-SDAG-NEXT: v_fma_f64 v[4:5], v[9:10], v[7:8], 1.0 -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v7, v[0:1] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[9:10], v[4:5], 1.0 -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[2:3], s[2:3], v[15:16] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[6:7], s[6:7], v[14:15] +; SI-SDAG-NEXT: v_mov_b32_e32 v16, s2 +; SI-SDAG-NEXT: v_mul_f64 v[0:1], s[0:1], v[0:1] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v5, v19, v7, vcc +; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[12:13], s[12:13], v[16:17] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v21, 0, v5, s[6:7] +; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v18, v1 +; SI-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v20 +; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[12:13], s[14:15], v[16:17] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v20, v[12:13] +; SI-SDAG-NEXT: v_add_f64 v[12:13], v[0:1], v[4:5] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[8:9], s[4:5], v[10:11] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[10:11], |v[0:1]|, s[10:11] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v7, v19, v3, s[8:9] +; SI-SDAG-NEXT: v_add_f64 v[3:4], v[12:13], -v[4:5] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[16:17], s[16:17], v[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v4, v1, s[10:11] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[10:11] +; SI-SDAG-NEXT: v_mov_b32_e32 v4, s1 +; SI-SDAG-NEXT: v_mov_b32_e32 v3, s0 +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[3:4], v[0:1], s[12:13], v[3:4] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[4:5], s[4:5], v[14:15] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[3:4], v[0:1], s[14:15], v[3:4] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v5, 0, v7, s[4:5] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], s[16:17], v[8:9] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], s[30:31] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], s[34:35] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[30:31] +; SI-SDAG-NEXT: v_ldexp_f64 v[12:13], v[12:13], v20 +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], s[34:35] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[10:11], s[2:3], v[10:11] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[3:4], v[7:8], 1.0 +; SI-SDAG-NEXT: v_cndmask_b32_e64 v9, v19, v13, s[10:11] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v13, v[0:1] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[3:4], v[7:8], 1.0 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[2:3], s[2:3], v[14:15] ; SI-SDAG-NEXT: s_and_b64 vcc, s[6:7], vcc -; SI-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v7 -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[12:13], s[0:1], v[13:14] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[15:16] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v6, vcc +; SI-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v13 +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[12:13], s[0:1], v[10:11] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[14:15] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v6, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], s[8:9] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[2:3], s[10:11] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v19, v1, s[12:13] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v3, 0, v3, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v6, 0, v12, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[0:1], s[12:13] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v17, 0, v17, s[6:7] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, v11, s[2:3] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v9, s[2:3] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v1, s[0:1] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc ; SI-SDAG-NEXT: v_readfirstlane_b32 s0, v0 -; SI-SDAG-NEXT: v_readfirstlane_b32 s2, v3 +; SI-SDAG-NEXT: v_readfirstlane_b32 s2, v6 ; SI-SDAG-NEXT: v_readfirstlane_b32 s4, v2 -; SI-SDAG-NEXT: v_readfirstlane_b32 s6, v5 +; SI-SDAG-NEXT: v_readfirstlane_b32 s6, v4 ; SI-SDAG-NEXT: v_readfirstlane_b32 s1, v1 -; SI-SDAG-NEXT: v_readfirstlane_b32 s3, v4 -; SI-SDAG-NEXT: v_readfirstlane_b32 s5, v12 -; SI-SDAG-NEXT: v_readfirstlane_b32 s7, v17 +; SI-SDAG-NEXT: v_readfirstlane_b32 s3, v3 +; SI-SDAG-NEXT: v_readfirstlane_b32 s5, v5 +; SI-SDAG-NEXT: v_readfirstlane_b32 s7, v21 ; SI-SDAG-NEXT: ; return to shader part epilog ; ; SI-GISEL-LABEL: s_exp_v4f64: diff --git a/llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll b/llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll index 4df967768e19a..58597beaff017 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll @@ -530,39 +530,39 @@ define <2 x double> @v_exp10_v2f64(<2 x double> %in) #0 { ; SI-GISEL-LABEL: v_exp10_v2f64: ; SI-GISEL: ; %bb.0: ; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0x979a371 -; SI-GISEL-NEXT: v_mov_b32_e32 v7, 0x400a934f -; SI-GISEL-NEXT: v_mul_f64 v[4:5], v[0:1], v[6:7] +; SI-GISEL-NEXT: v_mov_b32_e32 v4, 0x979a371 +; SI-GISEL-NEXT: v_mov_b32_e32 v5, 0x400a934f +; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[0:1], v[4:5] ; SI-GISEL-NEXT: v_mov_b32_e32 v8, 0 -; SI-GISEL-NEXT: v_and_b32_e32 v9, 0x80000000, v5 -; SI-GISEL-NEXT: v_or_b32_e32 v9, 0x43300000, v9 -; SI-GISEL-NEXT: v_add_f64 v[10:11], v[4:5], v[8:9] -; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0x432fffff -; SI-GISEL-NEXT: v_add_f64 v[9:10], v[10:11], -v[8:9] -; SI-GISEL-NEXT: v_mov_b32_e32 v11, -1 -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[4:5]|, v[11:12] -; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[2:3], v[6:7] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, v9, v4, vcc ; SI-GISEL-NEXT: v_and_b32_e32 v9, 0x80000000, v7 ; SI-GISEL-NEXT: v_or_b32_e32 v9, 0x43300000, v9 -; SI-GISEL-NEXT: v_add_f64 v[13:14], v[6:7], v[8:9] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v5, v10, v5, vcc -; SI-GISEL-NEXT: v_add_f64 v[8:9], v[13:14], -v[8:9] -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[6:7]|, v[11:12] +; SI-GISEL-NEXT: v_add_f64 v[10:11], v[6:7], v[8:9] +; SI-GISEL-NEXT: v_mul_f64 v[4:5], v[2:3], v[4:5] +; SI-GISEL-NEXT: v_add_f64 v[10:11], v[10:11], -v[8:9] +; SI-GISEL-NEXT: v_and_b32_e32 v9, 0x80000000, v5 +; SI-GISEL-NEXT: v_or_b32_e32 v9, 0x43300000, v9 +; SI-GISEL-NEXT: v_add_f64 v[12:13], v[4:5], v[8:9] +; SI-GISEL-NEXT: v_mov_b32_e32 v16, 0xbbb55516 +; SI-GISEL-NEXT: v_add_f64 v[8:9], v[12:13], -v[8:9] +; SI-GISEL-NEXT: v_mov_b32_e32 v12, -1 +; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x432fffff +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[6:7]|, v[12:13] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 s[4:5], |v[4:5]|, v[12:13] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, v10, v6, vcc +; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0x509f79ff +; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x3fd34413 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, v11, v7, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e64 v4, v8, v4, s[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[6:7], v[12:13], v[0:1] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v5, v9, v5, s[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[4:5], v[12:13], v[2:3] ; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0xa994fd21 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, v8, v6, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, v9, v7, vcc -; SI-GISEL-NEXT: v_mov_b32_e32 v8, 0x509f79ff -; SI-GISEL-NEXT: v_mov_b32_e32 v9, 0x3fd34413 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[4:5], v[8:9], v[0:1] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[6:7], v[8:9], v[2:3] ; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0xbc49dc1d -; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[4:5], v[12:13], v[10:11] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[6:7], v[12:13], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[6:7], v[12:13], v[10:11] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[4:5], v[12:13], v[8:9] ; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0x494ea3e9 ; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0xbcaf48ad ; SI-GISEL-NEXT: v_mul_f64 v[14:15], v[10:11], v[12:13] -; SI-GISEL-NEXT: v_mov_b32_e32 v16, 0xbbb55516 ; SI-GISEL-NEXT: v_mov_b32_e32 v17, 0x40026bb1 ; SI-GISEL-NEXT: v_mul_f64 v[12:13], v[8:9], v[12:13] ; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[10:11], v[16:17], v[14:15] @@ -614,20 +614,20 @@ define <2 x double> @v_exp10_v2f64(<2 x double> %in) #0 { ; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[14:15] ; SI-GISEL-NEXT: v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[16:17] ; SI-GISEL-NEXT: v_fma_f64 v[0:1], v[8:9], v[12:13], 1.0 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v4, v[4:5] ; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[8:9], v[0:1], 1.0 -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v0, v[4:5] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v4, v[6:7] +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v0, v[6:7] +; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0x7ff00000 +; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[8:9], v4 ; SI-GISEL-NEXT: v_ldexp_f64 v[0:1], v[10:11], v0 -; SI-GISEL-NEXT: v_mov_b32_e32 v10, 0x7ff00000 ; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, v10, v1, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[8:9], v4 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, v6, v1, vcc ; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[2:3], v[14:15] ; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, v0, s[4:5] ; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, v1, s[4:5] ; SI-GISEL-NEXT: v_cmp_nlt_f64_e64 s[4:5], v[2:3], v[16:17] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, v10, v5, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, v6, v5, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, v4, s[4:5] ; SI-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5] ; SI-GISEL-NEXT: s_setpc_b64 s[30:31] @@ -1146,129 +1146,129 @@ define <3 x double> @v_exp10_v3f64(<3 x double> %in) #0 { ; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0 ; SI-GISEL-NEXT: v_and_b32_e32 v8, 0x80000000, v7 ; SI-GISEL-NEXT: v_or_b32_e32 v13, 0x43300000, v8 -; SI-GISEL-NEXT: v_add_f64 v[14:15], v[6:7], v[12:13] -; SI-GISEL-NEXT: v_mul_f64 v[16:17], v[2:3], v[10:11] -; SI-GISEL-NEXT: v_add_f64 v[14:15], v[14:15], -v[12:13] -; SI-GISEL-NEXT: v_and_b32_e32 v13, 0x80000000, v17 -; SI-GISEL-NEXT: v_mov_b32_e32 v8, -1 -; SI-GISEL-NEXT: v_mov_b32_e32 v9, 0x432fffff -; SI-GISEL-NEXT: v_or_b32_e32 v13, 0x43300000, v13 -; SI-GISEL-NEXT: v_add_f64 v[18:19], v[16:17], v[12:13] -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[6:7]|, v[8:9] -; SI-GISEL-NEXT: v_add_f64 v[18:19], v[18:19], -v[12:13] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v14, v14, v6, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v15, v15, v7, vcc -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[16:17]|, v[8:9] -; SI-GISEL-NEXT: v_mul_f64 v[10:11], v[4:5], v[10:11] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, v18, v16, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, v19, v17, vcc +; SI-GISEL-NEXT: v_add_f64 v[8:9], v[6:7], v[12:13] +; SI-GISEL-NEXT: v_mov_b32_e32 v14, -1 +; SI-GISEL-NEXT: v_mov_b32_e32 v15, 0x432fffff +; SI-GISEL-NEXT: v_mul_f64 v[24:25], v[2:3], v[10:11] +; SI-GISEL-NEXT: v_add_f64 v[8:9], v[8:9], -v[12:13] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[6:7]|, v[14:15] +; SI-GISEL-NEXT: v_and_b32_e32 v13, 0x80000000, v25 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, v8, v6, vcc ; SI-GISEL-NEXT: v_mov_b32_e32 v16, 0x509f79ff ; SI-GISEL-NEXT: v_mov_b32_e32 v17, 0x3fd34413 -; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[14:15], v[16:17], v[0:1] -; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0xa994fd21 -; SI-GISEL-NEXT: v_mov_b32_e32 v21, 0xbc49dc1d -; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[14:15], v[20:21], v[18:19] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, v9, v7, vcc +; SI-GISEL-NEXT: v_or_b32_e32 v13, 0x43300000, v13 +; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[6:7], v[16:17], v[0:1] +; SI-GISEL-NEXT: v_add_f64 v[28:29], v[24:25], v[12:13] +; SI-GISEL-NEXT: v_mul_f64 v[10:11], v[4:5], v[10:11] +; SI-GISEL-NEXT: v_mov_b32_e32 v18, 0xa994fd21 +; SI-GISEL-NEXT: v_mov_b32_e32 v19, 0xbc49dc1d +; SI-GISEL-NEXT: v_fma_f64 v[20:21], -v[6:7], v[18:19], v[8:9] +; SI-GISEL-NEXT: v_add_f64 v[28:29], v[28:29], -v[12:13] ; SI-GISEL-NEXT: v_and_b32_e32 v13, 0x80000000, v11 -; SI-GISEL-NEXT: v_mov_b32_e32 v22, 0x494ea3e9 -; SI-GISEL-NEXT: v_mov_b32_e32 v23, 0xbcaf48ad +; SI-GISEL-NEXT: v_mov_b32_e32 v8, 0x494ea3e9 +; SI-GISEL-NEXT: v_mov_b32_e32 v9, 0xbcaf48ad ; SI-GISEL-NEXT: v_or_b32_e32 v13, 0x43300000, v13 -; SI-GISEL-NEXT: v_mul_f64 v[26:27], v[18:19], v[22:23] -; SI-GISEL-NEXT: v_add_f64 v[24:25], v[10:11], v[12:13] -; SI-GISEL-NEXT: v_mov_b32_e32 v28, 0xbbb55516 -; SI-GISEL-NEXT: v_mov_b32_e32 v29, 0x40026bb1 -; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[18:19], v[28:29], v[26:27] -; SI-GISEL-NEXT: v_add_f64 v[12:13], v[24:25], -v[12:13] +; SI-GISEL-NEXT: v_mul_f64 v[22:23], v[20:21], v[8:9] +; SI-GISEL-NEXT: v_add_f64 v[30:31], v[10:11], v[12:13] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[24:25]|, v[14:15] +; SI-GISEL-NEXT: v_mov_b32_e32 v26, 0xbbb55516 +; SI-GISEL-NEXT: v_mov_b32_e32 v27, 0x40026bb1 +; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[20:21], v[26:27], v[22:23] +; SI-GISEL-NEXT: v_add_f64 v[12:13], v[30:31], -v[12:13] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v22, v28, v24, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v23, v29, v25, vcc +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[10:11]|, v[14:15] +; SI-GISEL-NEXT: v_fma_f64 v[32:33], -v[22:23], v[16:17], v[2:3] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v10, v12, v10, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v11, v13, v11, vcc +; SI-GISEL-NEXT: v_fma_f64 v[32:33], -v[22:23], v[18:19], v[32:33] +; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[10:11], v[16:17], v[4:5] ; SI-GISEL-NEXT: v_mov_b32_e32 v24, 0x6a5dcb37 ; SI-GISEL-NEXT: v_mov_b32_e32 v25, 0x3e5ade15 -; SI-GISEL-NEXT: v_mov_b32_e32 v26, 0xfca7ab0c -; SI-GISEL-NEXT: v_mov_b32_e32 v27, 0x3e928af3 -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[10:11]|, v[8:9] -; SI-GISEL-NEXT: v_fma_f64 v[30:31], v[18:19], v[24:25], v[26:27] -; SI-GISEL-NEXT: v_mov_b32_e32 v32, 0x623fde64 -; SI-GISEL-NEXT: v_mov_b32_e32 v33, 0x3ec71dee -; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, v12, v10, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v13, v11, vcc -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[18:19], v[30:31], v[32:33] -; SI-GISEL-NEXT: v_fma_f64 v[30:31], -v[6:7], v[16:17], v[2:3] -; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[8:9], v[16:17], v[4:5] -; SI-GISEL-NEXT: v_fma_f64 v[30:31], -v[6:7], v[20:21], v[30:31] -; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[8:9], v[20:21], v[16:17] -; SI-GISEL-NEXT: v_mul_f64 v[48:49], v[30:31], v[22:23] -; SI-GISEL-NEXT: v_mul_f64 v[22:23], v[16:17], v[22:23] -; SI-GISEL-NEXT: v_fma_f64 v[30:31], v[30:31], v[28:29], v[48:49] -; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0x7c89e6b0 -; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x3efa0199 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[18:19], v[10:11], v[12:13] -; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[16:17], v[28:29], v[22:23] -; SI-GISEL-NEXT: v_fma_f64 v[28:29], v[30:31], v[24:25], v[26:27] -; SI-GISEL-NEXT: v_mov_b32_e32 v34, 0x14761f6e -; SI-GISEL-NEXT: v_mov_b32_e32 v35, 0x3f2a01a0 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[18:19], v[10:11], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[16:17], v[24:25], v[26:27] -; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[30:31], v[28:29], v[32:33] +; SI-GISEL-NEXT: v_mov_b32_e32 v28, 0xfca7ab0c +; SI-GISEL-NEXT: v_mov_b32_e32 v29, 0x3e928af3 +; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[24:25], v[28:29] +; SI-GISEL-NEXT: v_mul_f64 v[48:49], v[32:33], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[10:11], v[18:19], v[16:17] +; SI-GISEL-NEXT: v_mov_b32_e32 v30, 0x623fde64 +; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0x3ec71dee +; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[20:21], v[14:15], v[30:31] +; SI-GISEL-NEXT: v_fma_f64 v[32:33], v[32:33], v[26:27], v[48:49] +; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[16:17], v[8:9] +; SI-GISEL-NEXT: v_mov_b32_e32 v34, 0x7c89e6b0 +; SI-GISEL-NEXT: v_mov_b32_e32 v35, 0x3efa0199 +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[20:21], v[14:15], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[16:17], v[26:27], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[32:33], v[24:25], v[28:29] +; SI-GISEL-NEXT: v_mov_b32_e32 v14, 0x14761f6e +; SI-GISEL-NEXT: v_mov_b32_e32 v15, 0x3f2a01a0 +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[20:21], v[12:13], v[14:15] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[8:9], v[24:25], v[28:29] +; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[32:33], v[26:27], v[30:31] ; SI-GISEL-NEXT: v_mov_b32_e32 v36, 0x1852b7b0 ; SI-GISEL-NEXT: v_mov_b32_e32 v37, 0x3f56c16c -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[18:19], v[10:11], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[16:17], v[24:25], v[32:33] -; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[30:31], v[26:27], v[12:13] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[20:21], v[12:13], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[8:9], v[24:25], v[30:31] +; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[32:33], v[26:27], v[34:35] ; SI-GISEL-NEXT: v_mov_b32_e32 v38, 0x11122322 ; SI-GISEL-NEXT: v_mov_b32_e32 v39, 0x3f811111 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[18:19], v[10:11], v[38:39] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[16:17], v[24:25], v[12:13] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[30:31], v[26:27], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[20:21], v[12:13], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[8:9], v[24:25], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[32:33], v[26:27], v[14:15] ; SI-GISEL-NEXT: v_mov_b32_e32 v50, 0x555502a1 ; SI-GISEL-NEXT: v_mov_b32_e32 v51, 0x3fa55555 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[18:19], v[10:11], v[50:51] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[30:31], v[24:25], v[36:37] -; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0x55555511 -; SI-GISEL-NEXT: v_mov_b32_e32 v21, 0x3fc55555 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[18:19], v[10:11], v[20:21] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v26, v[14:15] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[30:31], v[24:25], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[20:21], v[12:13], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[8:9], v[24:25], v[14:15] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[32:33], v[26:27], v[36:37] +; SI-GISEL-NEXT: v_mov_b32_e32 v18, 0x55555511 +; SI-GISEL-NEXT: v_mov_b32_e32 v19, 0x3fc55555 +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[20:21], v[12:13], v[18:19] +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v26, v[6:7] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[32:33], v[24:25], v[38:39] ; SI-GISEL-NEXT: v_mov_b32_e32 v48, 11 ; SI-GISEL-NEXT: v_mov_b32_e32 v49, 0x3fe00000 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[18:19], v[10:11], v[48:49] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[30:31], v[14:15], v[50:51] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[18:19], v[10:11], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[30:31], v[14:15], v[20:21] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], v[38:39] -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[18:19], v[10:11], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[30:31], v[14:15], v[48:49] -; SI-GISEL-NEXT: v_mov_b32_e32 v18, 0 -; SI-GISEL-NEXT: v_mov_b32_e32 v19, 0x40900000 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], v[50:51] -; SI-GISEL-NEXT: v_ldexp_f64 v[10:11], v[10:11], v26 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[18:19] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[30:31], v[14:15], 1.0 -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v6, v[6:7] -; SI-GISEL-NEXT: v_mov_b32_e32 v22, 0 -; SI-GISEL-NEXT: v_mov_b32_e32 v23, 0xc090cc00 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], v[20:21] -; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0x7ff00000 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v10, 0, v10, vcc -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[30:31], v[14:15], 1.0 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v11, v20, v11, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[0:1], v[22:23] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[16:17], v[12:13], v[48:49] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v10, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[6:7], v[14:15], v6 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v11, vcc -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[2:3], v[18:19] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v8, v[8:9] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v10, 0, v6, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v11, v20, v7, vcc -; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[16:17], v[12:13], 1.0 -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[2:3], v[22:23] -; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[16:17], v[6:7], 1.0 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v10, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[6:7], v[6:7], v8 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v11, vcc -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[4:5], v[18:19] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[20:21], v[12:13], v[48:49] +; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[8:9], v[14:15], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[32:33], v[6:7], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[20:21], v[12:13], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[8:9], v[14:15], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[32:33], v[6:7], v[18:19] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[20:21], v[12:13], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[32:33], v[6:7], v[48:49] +; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[8:9], v[14:15], v[50:51] +; SI-GISEL-NEXT: v_mov_b32_e32 v16, 0 +; SI-GISEL-NEXT: v_mov_b32_e32 v17, 0x40900000 +; SI-GISEL-NEXT: v_ldexp_f64 v[12:13], v[12:13], v26 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[16:17] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[32:33], v[6:7], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[8:9], v[14:15], v[18:19] +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v18, v[22:23] +; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0 +; SI-GISEL-NEXT: v_mov_b32_e32 v21, 0xc090cc00 +; SI-GISEL-NEXT: v_mov_b32_e32 v19, 0x7ff00000 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v12, 0, v12, vcc +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[32:33], v[6:7], 1.0 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v13, v19, v13, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[0:1], v[20:21] +; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[8:9], v[14:15], v[48:49] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v12, vcc +; SI-GISEL-NEXT: v_ldexp_f64 v[6:7], v[6:7], v18 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v13, vcc +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[2:3], v[16:17] +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v10, v[10:11] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v12, 0, v6, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v13, v19, v7, vcc +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[8:9], v[14:15], 1.0 +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[2:3], v[20:21] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[8:9], v[6:7], 1.0 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v12, vcc +; SI-GISEL-NEXT: v_ldexp_f64 v[6:7], v[6:7], v10 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v13, vcc +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[4:5], v[16:17] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, 0, v6, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, v20, v7, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[4:5], v[22:23] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, v19, v7, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[4:5], v[20:21] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v6, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v7, vcc ; SI-GISEL-NEXT: s_setpc_b64 s[30:31] @@ -1744,333 +1744,333 @@ define <4 x double> @v_exp10_v4f64(<4 x double> %in) #0 { ; SI-SDAG-LABEL: v_exp10_v4f64: ; SI-SDAG: ; %bb.0: ; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-SDAG-NEXT: s_mov_b32 s4, 0x979a371 -; SI-SDAG-NEXT: s_mov_b32 s5, 0x400a934f -; SI-SDAG-NEXT: v_mul_f64 v[8:9], v[0:1], s[4:5] -; SI-SDAG-NEXT: s_brev_b32 s8, -2 -; SI-SDAG-NEXT: v_mov_b32_e32 v16, 0x43300000 -; SI-SDAG-NEXT: v_bfi_b32 v15, s8, v16, v9 -; SI-SDAG-NEXT: v_mov_b32_e32 v14, 0 -; SI-SDAG-NEXT: v_add_f64 v[10:11], v[8:9], v[14:15] -; SI-SDAG-NEXT: s_mov_b32 s6, -1 -; SI-SDAG-NEXT: s_mov_b32 s7, 0x432fffff -; SI-SDAG-NEXT: v_add_f64 v[10:11], v[10:11], -v[14:15] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[8:9]|, s[6:7] -; SI-SDAG-NEXT: s_mov_b32 s16, 0x509f79ff -; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v11, v9, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v8, v10, v8, vcc -; SI-SDAG-NEXT: v_mul_f64 v[10:11], v[2:3], s[4:5] -; SI-SDAG-NEXT: s_mov_b32 s17, 0xbfd34413 -; SI-SDAG-NEXT: v_bfi_b32 v15, s8, v16, v11 -; SI-SDAG-NEXT: v_add_f64 v[12:13], v[10:11], v[14:15] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[10:11]|, s[6:7] -; SI-SDAG-NEXT: v_add_f64 v[12:13], v[12:13], -v[14:15] -; SI-SDAG-NEXT: s_mov_b32 s14, 0xa994fd21 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v11, v13, v11, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v10, v12, v10, vcc -; SI-SDAG-NEXT: v_mul_f64 v[12:13], v[4:5], s[4:5] -; SI-SDAG-NEXT: s_mov_b32 s15, 0x3c49dc1d -; SI-SDAG-NEXT: v_bfi_b32 v15, s8, v16, v13 -; SI-SDAG-NEXT: v_add_f64 v[17:18], v[12:13], v[14:15] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[12:13]|, s[6:7] -; SI-SDAG-NEXT: v_add_f64 v[17:18], v[17:18], -v[14:15] -; SI-SDAG-NEXT: s_mov_b32 s20, 0x494ea3e9 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v13, v18, v13, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v12, v17, v12, vcc -; SI-SDAG-NEXT: v_mul_f64 v[17:18], v[6:7], s[4:5] -; SI-SDAG-NEXT: s_mov_b32 s21, 0xbcaf48ad -; SI-SDAG-NEXT: v_bfi_b32 v15, s8, v16, v18 -; SI-SDAG-NEXT: v_add_f64 v[19:20], v[17:18], v[14:15] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[17:18]|, s[6:7] -; SI-SDAG-NEXT: v_add_f64 v[14:15], v[19:20], -v[14:15] -; SI-SDAG-NEXT: s_mov_b32 s22, 0xbbb55516 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v14, v14, v17, vcc -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[8:9], s[16:17], v[0:1] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v15, v15, v18, vcc -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[8:9], s[14:15], v[16:17] -; SI-SDAG-NEXT: s_mov_b32 s23, 0x40026bb1 -; SI-SDAG-NEXT: v_mul_f64 v[18:19], v[16:17], s[20:21] +; SI-SDAG-NEXT: s_mov_b32 s10, 0x979a371 +; SI-SDAG-NEXT: s_mov_b32 s11, 0x400a934f +; SI-SDAG-NEXT: v_mul_f64 v[10:11], v[0:1], s[10:11] +; SI-SDAG-NEXT: s_brev_b32 s62, -2 +; SI-SDAG-NEXT: v_mov_b32_e32 v14, 0x43300000 +; SI-SDAG-NEXT: v_bfi_b32 v9, s62, v14, v11 +; SI-SDAG-NEXT: v_mov_b32_e32 v8, 0 +; SI-SDAG-NEXT: v_add_f64 v[12:13], v[10:11], v[8:9] +; SI-SDAG-NEXT: s_mov_b32 s12, -1 +; SI-SDAG-NEXT: s_mov_b32 s13, 0x432fffff +; SI-SDAG-NEXT: v_add_f64 v[12:13], v[12:13], -v[8:9] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[10:11]|, s[12:13] +; SI-SDAG-NEXT: s_mov_b32 s14, 0x509f79ff +; SI-SDAG-NEXT: v_cndmask_b32_e32 v13, v13, v11, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v12, v12, v10, vcc +; SI-SDAG-NEXT: s_mov_b32 s15, 0xbfd34413 +; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[12:13], s[14:15], v[0:1] +; SI-SDAG-NEXT: s_mov_b32 s16, 0xa994fd21 +; SI-SDAG-NEXT: s_mov_b32 s17, 0x3c49dc1d +; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[12:13], s[16:17], v[9:10] +; SI-SDAG-NEXT: s_mov_b32 s18, 0x494ea3e9 +; SI-SDAG-NEXT: s_mov_b32 s19, 0xbcaf48ad +; SI-SDAG-NEXT: v_mul_f64 v[15:16], v[9:10], s[18:19] +; SI-SDAG-NEXT: s_mov_b32 s20, 0xbbb55516 +; SI-SDAG-NEXT: s_mov_b32 s21, 0x40026bb1 ; SI-SDAG-NEXT: s_mov_b32 s5, 0x3e928af3 -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[16:17], s[22:23], v[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[9:10], s[20:21], v[15:16] ; SI-SDAG-NEXT: s_mov_b32 s4, 0xfca7ab0c -; SI-SDAG-NEXT: v_mov_b32_e32 v17, s5 -; SI-SDAG-NEXT: s_mov_b32 s10, 0x6a5dcb37 -; SI-SDAG-NEXT: s_mov_b32 s11, 0x3e5ade15 -; SI-SDAG-NEXT: v_mov_b32_e32 v16, s4 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], s[10:11], v[16:17] -; SI-SDAG-NEXT: s_mov_b32 s12, 0x623fde64 -; SI-SDAG-NEXT: s_mov_b32 s13, 0x3ec71dee -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[12:13] -; SI-SDAG-NEXT: s_mov_b32 s18, 0x7c89e6b0 -; SI-SDAG-NEXT: s_mov_b32 s19, 0x3efa0199 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[18:19] -; SI-SDAG-NEXT: s_mov_b32 s24, 0x14761f6e -; SI-SDAG-NEXT: s_mov_b32 s25, 0x3f2a01a0 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[24:25] -; SI-SDAG-NEXT: s_mov_b32 s26, 0x1852b7b0 -; SI-SDAG-NEXT: s_mov_b32 s27, 0x3f56c16c -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[26:27] +; SI-SDAG-NEXT: v_mov_b32_e32 v11, s5 +; SI-SDAG-NEXT: s_mov_b32 s22, 0x6a5dcb37 +; SI-SDAG-NEXT: s_mov_b32 s23, 0x3e5ade15 +; SI-SDAG-NEXT: v_mov_b32_e32 v10, s4 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], s[22:23], v[10:11] +; SI-SDAG-NEXT: s_mov_b32 s24, 0x623fde64 +; SI-SDAG-NEXT: s_mov_b32 s25, 0x3ec71dee +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[24:25] +; SI-SDAG-NEXT: s_mov_b32 s26, 0x7c89e6b0 +; SI-SDAG-NEXT: s_mov_b32 s27, 0x3efa0199 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[26:27] +; SI-SDAG-NEXT: s_mov_b32 s28, 0x14761f6e +; SI-SDAG-NEXT: s_mov_b32 s29, 0x3f2a01a0 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[28:29] +; SI-SDAG-NEXT: s_mov_b32 s40, 0x1852b7b0 +; SI-SDAG-NEXT: s_mov_b32 s41, 0x3f56c16c +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[40:41] ; SI-SDAG-NEXT: s_mov_b32 s42, 0x11122322 ; SI-SDAG-NEXT: s_mov_b32 s43, 0x3f811111 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[42:43] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[42:43] ; SI-SDAG-NEXT: s_mov_b32 s44, 0x555502a1 ; SI-SDAG-NEXT: s_mov_b32 s45, 0x3fa55555 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[44:45] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[44:45] ; SI-SDAG-NEXT: s_mov_b32 s46, 0x55555511 ; SI-SDAG-NEXT: s_mov_b32 s47, 0x3fc55555 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[46:47] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[46:47] ; SI-SDAG-NEXT: s_mov_b32 s56, 11 ; SI-SDAG-NEXT: s_mov_b32 s57, 0x3fe00000 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[56:57] -; SI-SDAG-NEXT: s_mov_b32 s28, 0 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], 1.0 -; SI-SDAG-NEXT: s_mov_b32 s29, 0x40900000 -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[18:19], v[20:21], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[10:11], s[16:17], v[2:3] -; SI-SDAG-NEXT: s_mov_b32 s40, 0 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[10:11], s[14:15], v[20:21] -; SI-SDAG-NEXT: s_mov_b32 s41, 0xc090cc00 -; SI-SDAG-NEXT: v_mul_f64 v[22:23], v[20:21], s[20:21] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[4:5], s[28:29], v[0:1] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[20:21], s[22:23], v[22:23] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e32 vcc, s[40:41], v[0:1] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[20:21], s[10:11], v[16:17] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[6:7], s[28:29], v[2:3] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[20:21], v[0:1], s[12:13] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[8:9], s[40:41], v[2:3] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[20:21], v[0:1], s[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[20:21], v[0:1], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[20:21], v[0:1], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[20:21], v[0:1], s[42:43] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[20:21], v[0:1], s[44:45] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[20:21], v[0:1], s[46:47] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[20:21], v[0:1], s[56:57] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[20:21], v[0:1], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[20:21], v[0:1], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[12:13], s[16:17], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[12:13], s[14:15], v[0:1] -; SI-SDAG-NEXT: v_mul_f64 v[2:3], v[0:1], s[20:21] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[0:1], s[22:23], v[2:3] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], s[16:17], v[6:7] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], s[14:15], v[2:3] -; SI-SDAG-NEXT: s_and_b64 s[14:15], vcc, s[4:5] -; SI-SDAG-NEXT: v_mul_f64 v[22:23], v[2:3], s[20:21] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[2:3], s[22:23], v[22:23] -; SI-SDAG-NEXT: v_fma_f64 v[22:23], v[0:1], s[10:11], v[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[22:23], v[0:1], v[22:23], s[12:13] -; SI-SDAG-NEXT: v_fma_f64 v[22:23], v[0:1], v[22:23], s[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[22:23], v[0:1], v[22:23], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[22:23], v[0:1], v[22:23], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[22:23], v[0:1], v[22:23], s[42:43] -; SI-SDAG-NEXT: v_fma_f64 v[22:23], v[0:1], v[22:23], s[44:45] -; SI-SDAG-NEXT: v_fma_f64 v[22:23], v[0:1], v[22:23], s[46:47] -; SI-SDAG-NEXT: v_fma_f64 v[22:23], v[0:1], v[22:23], s[56:57] -; SI-SDAG-NEXT: v_fma_f64 v[22:23], v[0:1], v[22:23], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[22:23], v[0:1], v[22:23], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], s[10:11], v[16:17] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[10:11], s[28:29], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], v[0:1], s[12:13] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[12:13], s[40:41], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], v[0:1], s[18:19] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v4, v[12:13] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], v[0:1], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], v[0:1], s[26:27] -; SI-SDAG-NEXT: v_ldexp_f64 v[4:5], v[22:23], v4 -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], v[0:1], s[42:43] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], v[0:1], s[44:45] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], v[0:1], s[46:47] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], v[0:1], s[56:57] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], v[0:1], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[2:3], v[0:1], 1.0 -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v0, v[8:9] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v2, v[10:11] -; SI-SDAG-NEXT: v_mov_b32_e32 v10, 0x7ff00000 -; SI-SDAG-NEXT: v_cndmask_b32_e64 v5, v10, v5, s[10:11] -; SI-SDAG-NEXT: v_ldexp_f64 v[0:1], v[18:19], v0 -; SI-SDAG-NEXT: v_cndmask_b32_e64 v5, 0, v5, s[12:13] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, v10, v1, s[4:5] -; SI-SDAG-NEXT: v_ldexp_f64 v[1:2], v[20:21], v2 -; SI-SDAG-NEXT: s_and_b64 s[4:5], s[8:9], s[6:7] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v8, v10, v2, s[6:7] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, v1, s[4:5] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v8, s[8:9] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v8, v[14:15] -; SI-SDAG-NEXT: s_and_b64 vcc, s[12:13], s[10:11] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc -; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[28:29], v[6:7] -; SI-SDAG-NEXT: v_ldexp_f64 v[8:9], v[16:17], v8 -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[40:41], v[6:7] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v6, v10, v9, vcc +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[56:57] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v21, v[12:13] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], 1.0 +; SI-SDAG-NEXT: s_mov_b32 s58, 0 +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[15:16], v[17:18], 1.0 +; SI-SDAG-NEXT: v_mul_f64 v[17:18], v[2:3], s[10:11] +; SI-SDAG-NEXT: s_mov_b32 s59, 0x40900000 +; SI-SDAG-NEXT: v_bfi_b32 v9, s62, v14, v18 +; SI-SDAG-NEXT: v_add_f64 v[12:13], v[17:18], v[8:9] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[17:18]|, s[12:13] +; SI-SDAG-NEXT: v_add_f64 v[12:13], v[12:13], -v[8:9] +; SI-SDAG-NEXT: s_mov_b32 s60, 0 +; SI-SDAG-NEXT: v_cndmask_b32_e32 v18, v13, v18, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v17, v12, v17, vcc +; SI-SDAG-NEXT: v_fma_f64 v[19:20], v[17:18], s[14:15], v[2:3] +; SI-SDAG-NEXT: v_ldexp_f64 v[12:13], v[15:16], v21 +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[17:18], s[16:17], v[19:20] +; SI-SDAG-NEXT: s_mov_b32 s61, 0xc090cc00 +; SI-SDAG-NEXT: v_mul_f64 v[19:20], v[15:16], s[18:19] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[58:59], v[0:1] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[15:16], s[20:21], v[19:20] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[60:61], v[0:1] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], s[22:23], v[10:11] +; SI-SDAG-NEXT: v_mov_b32_e32 v21, 0x7ff00000 +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], v[0:1], s[24:25] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v22, v21, v13, vcc +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], v[0:1], s[26:27] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v13, v[17:18] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], v[0:1], s[28:29] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[8:9], s[60:61], v[2:3] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], v[0:1], s[40:41] +; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], v[0:1], s[42:43] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], v[0:1], s[44:45] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], v[0:1], s[46:47] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], v[0:1], s[56:57] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], v[0:1], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], v[0:1], 1.0 +; SI-SDAG-NEXT: v_mul_f64 v[15:16], v[4:5], s[10:11] +; SI-SDAG-NEXT: v_ldexp_f64 v[19:20], v[0:1], v13 +; SI-SDAG-NEXT: v_bfi_b32 v9, s62, v14, v16 +; SI-SDAG-NEXT: v_add_f64 v[17:18], v[15:16], v[8:9] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[6:7], |v[15:16]|, s[12:13] +; SI-SDAG-NEXT: v_add_f64 v[17:18], v[17:18], -v[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v16, v18, v16, s[6:7] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v15, v17, v15, s[6:7] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], s[14:15], v[4:5] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[6:7], s[58:59], v[2:3] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[15:16], s[16:17], v[17:18] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v16, v[15:16] +; SI-SDAG-NEXT: v_mul_f64 v[2:3], v[0:1], s[18:19] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v20, v21, v20, s[6:7] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[0:1], s[20:21], v[2:3] +; SI-SDAG-NEXT: v_mul_f64 v[0:1], v[6:7], s[10:11] +; SI-SDAG-NEXT: v_bfi_b32 v9, s62, v14, v1 +; SI-SDAG-NEXT: v_add_f64 v[2:3], v[0:1], v[8:9] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[10:11], |v[0:1]|, s[12:13] +; SI-SDAG-NEXT: v_add_f64 v[2:3], v[2:3], -v[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v9, v3, v1, s[10:11] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v8, v2, v0, s[10:11] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[8:9], s[14:15], v[6:7] +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[8:9], s[16:17], v[0:1] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v12, vcc +; SI-SDAG-NEXT: v_mul_f64 v[13:14], v[2:3], s[18:19] +; SI-SDAG-NEXT: s_and_b64 vcc, s[8:9], s[6:7] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[2:3], s[20:21], v[13:14] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], s[22:23], v[10:11] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], s[22:23], v[10:11] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[40:41] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[40:41] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[42:43] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[42:43] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[44:45] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[44:45] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[46:47] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[46:47] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], s[56:57] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[56:57] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[17:18], v[14:15], 1.0 +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v8, v[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v22, s[4:5] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v19, vcc +; SI-SDAG-NEXT: v_ldexp_f64 v[14:15], v[14:15], v16 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[58:59], v[4:5] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[60:61], v[4:5] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], 1.0 +; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v21, v15, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc -; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, v0, s[14:15] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v7, 0, v6, s[4:5] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v5, 0, v9, s[4:5] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v14, vcc +; SI-SDAG-NEXT: v_ldexp_f64 v[8:9], v[10:11], v8 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[58:59], v[6:7] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[60:61], v[6:7] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v21, v9, vcc +; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc +; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v20, s[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v7, 0, v9, s[4:5] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc ; SI-SDAG-NEXT: s_setpc_b64 s[30:31] ; ; SI-GISEL-LABEL: v_exp10_v4f64: ; SI-GISEL: ; %bb.0: ; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-GISEL-NEXT: v_mov_b32_e32 v16, 0x979a371 -; SI-GISEL-NEXT: v_mov_b32_e32 v17, 0x400a934f -; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[0:1], v[16:17] -; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0 +; SI-GISEL-NEXT: v_mov_b32_e32 v22, 0x979a371 +; SI-GISEL-NEXT: v_mov_b32_e32 v23, 0x400a934f +; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[0:1], v[22:23] +; SI-GISEL-NEXT: v_mov_b32_e32 v18, 0 ; SI-GISEL-NEXT: v_and_b32_e32 v10, 0x80000000, v9 -; SI-GISEL-NEXT: v_or_b32_e32 v13, 0x43300000, v10 -; SI-GISEL-NEXT: v_add_f64 v[14:15], v[8:9], v[12:13] -; SI-GISEL-NEXT: v_mov_b32_e32 v10, -1 -; SI-GISEL-NEXT: v_mov_b32_e32 v11, 0x432fffff -; SI-GISEL-NEXT: v_add_f64 v[13:14], v[14:15], -v[12:13] -; SI-GISEL-NEXT: v_mul_f64 v[18:19], v[2:3], v[16:17] -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[8:9]|, v[10:11] -; SI-GISEL-NEXT: v_mov_b32_e32 v28, 0xbbb55516 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, v13, v8, vcc -; SI-GISEL-NEXT: v_and_b32_e32 v13, 0x80000000, v19 -; SI-GISEL-NEXT: v_or_b32_e32 v13, 0x43300000, v13 -; SI-GISEL-NEXT: v_add_f64 v[20:21], v[18:19], v[12:13] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v14, v9, vcc -; SI-GISEL-NEXT: v_add_f64 v[14:15], v[20:21], -v[12:13] -; SI-GISEL-NEXT: v_mul_f64 v[20:21], v[4:5], v[16:17] -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[18:19]|, v[10:11] -; SI-GISEL-NEXT: v_and_b32_e32 v13, 0x80000000, v21 -; SI-GISEL-NEXT: v_or_b32_e32 v13, 0x43300000, v13 -; SI-GISEL-NEXT: v_add_f64 v[22:23], v[20:21], v[12:13] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v14, v14, v18, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v15, v15, v19, vcc -; SI-GISEL-NEXT: v_add_f64 v[18:19], v[22:23], -v[12:13] -; SI-GISEL-NEXT: v_mul_f64 v[22:23], v[6:7], v[16:17] -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[20:21]|, v[10:11] -; SI-GISEL-NEXT: v_and_b32_e32 v13, 0x80000000, v23 -; SI-GISEL-NEXT: v_or_b32_e32 v13, 0x43300000, v13 -; SI-GISEL-NEXT: v_add_f64 v[24:25], v[22:23], v[12:13] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v16, v18, v20, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v17, v19, v21, vcc -; SI-GISEL-NEXT: v_add_f64 v[12:13], v[24:25], -v[12:13] -; SI-GISEL-NEXT: v_mov_b32_e32 v18, 0x509f79ff -; SI-GISEL-NEXT: v_mov_b32_e32 v19, 0x3fd34413 -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[22:23]|, v[10:11] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], -v[8:9], v[18:19], v[0:1] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v10, v12, v22, vcc -; SI-GISEL-NEXT: v_mov_b32_e32 v24, 0xa994fd21 -; SI-GISEL-NEXT: v_mov_b32_e32 v25, 0xbc49dc1d -; SI-GISEL-NEXT: v_cndmask_b32_e32 v11, v13, v23, vcc -; SI-GISEL-NEXT: v_fma_f64 v[22:23], -v[14:15], v[18:19], v[2:3] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[8:9], v[24:25], v[20:21] -; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0x494ea3e9 -; SI-GISEL-NEXT: v_mov_b32_e32 v21, 0xbcaf48ad -; SI-GISEL-NEXT: v_fma_f64 v[22:23], -v[14:15], v[24:25], v[22:23] -; SI-GISEL-NEXT: v_mul_f64 v[26:27], v[12:13], v[20:21] -; SI-GISEL-NEXT: v_mov_b32_e32 v29, 0x40026bb1 -; SI-GISEL-NEXT: v_mul_f64 v[30:31], v[22:23], v[20:21] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[12:13], v[28:29], v[26:27] -; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[22:23], v[28:29], v[30:31] -; SI-GISEL-NEXT: v_mov_b32_e32 v30, 0x6a5dcb37 -; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0x3e5ade15 +; SI-GISEL-NEXT: v_or_b32_e32 v19, 0x43300000, v10 +; SI-GISEL-NEXT: v_add_f64 v[10:11], v[8:9], v[18:19] +; SI-GISEL-NEXT: v_mul_f64 v[14:15], v[2:3], v[22:23] +; SI-GISEL-NEXT: v_mov_b32_e32 v16, -1 +; SI-GISEL-NEXT: v_mov_b32_e32 v17, 0x432fffff +; SI-GISEL-NEXT: v_add_f64 v[10:11], v[10:11], -v[18:19] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[8:9]|, v[16:17] +; SI-GISEL-NEXT: v_and_b32_e32 v19, 0x80000000, v15 +; SI-GISEL-NEXT: v_or_b32_e32 v19, 0x43300000, v19 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, v10, v8, vcc +; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0x509f79ff +; SI-GISEL-NEXT: v_mov_b32_e32 v21, 0x3fd34413 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v11, v9, vcc +; SI-GISEL-NEXT: v_add_f64 v[28:29], v[14:15], v[18:19] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[8:9], v[20:21], v[0:1] +; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0xa994fd21 +; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0xbc49dc1d +; SI-GISEL-NEXT: v_add_f64 v[28:29], v[28:29], -v[18:19] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[14:15]|, v[16:17] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], -v[8:9], v[12:13], v[10:11] +; SI-GISEL-NEXT: v_mov_b32_e32 v10, 0x494ea3e9 +; SI-GISEL-NEXT: v_mov_b32_e32 v11, 0xbcaf48ad +; SI-GISEL-NEXT: v_cndmask_b32_e32 v14, v28, v14, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v15, v29, v15, vcc +; SI-GISEL-NEXT: v_mul_f64 v[26:27], v[24:25], v[10:11] +; SI-GISEL-NEXT: v_fma_f64 v[28:29], -v[14:15], v[20:21], v[2:3] +; SI-GISEL-NEXT: v_mov_b32_e32 v30, 0xbbb55516 +; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0x40026bb1 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[24:25], v[30:31], v[26:27] +; SI-GISEL-NEXT: v_fma_f64 v[26:27], -v[14:15], v[12:13], v[28:29] +; SI-GISEL-NEXT: v_mul_f64 v[28:29], v[4:5], v[22:23] +; SI-GISEL-NEXT: v_mul_f64 v[22:23], v[6:7], v[22:23] +; SI-GISEL-NEXT: v_and_b32_e32 v19, 0x80000000, v29 +; SI-GISEL-NEXT: v_or_b32_e32 v19, 0x43300000, v19 +; SI-GISEL-NEXT: v_add_f64 v[34:35], v[28:29], v[18:19] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[28:29]|, v[16:17] +; SI-GISEL-NEXT: v_add_f64 v[34:35], v[34:35], -v[18:19] +; SI-GISEL-NEXT: v_and_b32_e32 v19, 0x80000000, v23 +; SI-GISEL-NEXT: v_or_b32_e32 v19, 0x43300000, v19 +; SI-GISEL-NEXT: v_add_f64 v[36:37], v[22:23], v[18:19] +; SI-GISEL-NEXT: v_mul_f64 v[32:33], v[26:27], v[10:11] +; SI-GISEL-NEXT: v_add_f64 v[18:19], v[36:37], -v[18:19] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v28, v34, v28, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v29, v35, v29, vcc +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[22:23]|, v[16:17] +; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[26:27], v[30:31], v[32:33] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v16, v18, v22, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v17, v19, v23, vcc +; SI-GISEL-NEXT: v_mov_b32_e32 v22, 0x6a5dcb37 +; SI-GISEL-NEXT: v_mov_b32_e32 v23, 0x3e5ade15 ; SI-GISEL-NEXT: v_mov_b32_e32 v32, 0xfca7ab0c ; SI-GISEL-NEXT: v_mov_b32_e32 v33, 0x3e928af3 -; SI-GISEL-NEXT: v_fma_f64 v[26:27], -v[16:17], v[18:19], v[4:5] -; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[10:11], v[18:19], v[6:7] -; SI-GISEL-NEXT: v_fma_f64 v[34:35], v[12:13], v[30:31], v[32:33] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[28:29], v[20:21], v[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[20:21], -v[16:17], v[20:21], v[6:7] +; SI-GISEL-NEXT: v_fma_f64 v[34:35], v[24:25], v[22:23], v[32:33] ; SI-GISEL-NEXT: v_mov_b32_e32 v36, 0x623fde64 ; SI-GISEL-NEXT: v_mov_b32_e32 v37, 0x3ec71dee -; SI-GISEL-NEXT: v_fma_f64 v[26:27], -v[16:17], v[24:25], v[26:27] -; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[10:11], v[24:25], v[18:19] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[12:13], v[34:35], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[28:29], v[12:13], v[18:19] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[16:17], v[12:13], v[20:21] +; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[24:25], v[34:35], v[36:37] ; SI-GISEL-NEXT: v_mov_b32_e32 v34, 0x7c89e6b0 ; SI-GISEL-NEXT: v_mov_b32_e32 v35, 0x3efa0199 -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[12:13], v[24:25], v[34:35] -; SI-GISEL-NEXT: v_mul_f64 v[38:39], v[26:27], v[20:21] +; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[24:25], v[20:21], v[34:35] +; SI-GISEL-NEXT: v_mul_f64 v[38:39], v[18:19], v[10:11] ; SI-GISEL-NEXT: v_mov_b32_e32 v48, 0x14761f6e ; SI-GISEL-NEXT: v_mov_b32_e32 v49, 0x3f2a01a0 -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[12:13], v[24:25], v[48:49] -; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[26:27], v[28:29], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[24:25], v[20:21], v[48:49] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[18:19], v[30:31], v[38:39] ; SI-GISEL-NEXT: v_mov_b32_e32 v38, 0x1852b7b0 ; SI-GISEL-NEXT: v_mov_b32_e32 v39, 0x3f56c16c -; SI-GISEL-NEXT: v_mul_f64 v[20:21], v[18:19], v[20:21] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[12:13], v[24:25], v[38:39] +; SI-GISEL-NEXT: v_mul_f64 v[10:11], v[12:13], v[10:11] +; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[24:25], v[20:21], v[38:39] ; SI-GISEL-NEXT: v_mov_b32_e32 v50, 0x11122322 ; SI-GISEL-NEXT: v_mov_b32_e32 v51, 0x3f811111 -; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[18:19], v[28:29], v[20:21] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[12:13], v[24:25], v[50:51] -; SI-GISEL-NEXT: v_mov_b32_e32 v24, 0x555502a1 -; SI-GISEL-NEXT: v_mov_b32_e32 v25, 0x3fa55555 -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[12:13], v[20:21], v[24:25] -; SI-GISEL-NEXT: v_mov_b32_e32 v28, 0x55555511 -; SI-GISEL-NEXT: v_mov_b32_e32 v29, 0x3fc55555 -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[12:13], v[20:21], v[28:29] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[12:13], v[30:31], v[10:11] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[24:25], v[20:21], v[50:51] +; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0x555502a1 +; SI-GISEL-NEXT: v_mov_b32_e32 v21, 0x3fa55555 +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[24:25], v[12:13], v[20:21] +; SI-GISEL-NEXT: v_mov_b32_e32 v30, 0x55555511 +; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0x3fc55555 +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[24:25], v[12:13], v[30:31] ; SI-GISEL-NEXT: v_mov_b32_e32 v52, 11 ; SI-GISEL-NEXT: v_mov_b32_e32 v53, 0x3fe00000 -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[12:13], v[20:21], v[52:53] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v8, v[8:9] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[12:13], v[20:21], 1.0 -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v10, v[10:11] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[12:13], v[20:21], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[26:27], v[30:31], v[32:33] -; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[12:13], v8 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[30:31], v[32:33] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[48:49] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[38:39] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[50:51] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[24:25] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[28:29] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], v[52:53] -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[22:23], v[12:13], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[18:19], v[30:31], v[32:33] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v32, v[14:15] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[26:27], v[20:21], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[22:23], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[26:27], v[14:15], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[26:27], v[14:15], v[48:49] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], v[48:49] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[26:27], v[14:15], v[38:39] -; SI-GISEL-NEXT: v_mov_b32_e32 v30, 0 -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[26:27], v[14:15], v[50:51] -; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0x40900000 -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[26:27], v[14:15], v[24:25] -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[30:31] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[26:27], v[14:15], v[28:29] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], v[38:39] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[26:27], v[14:15], v[52:53] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v33, 0, v8, vcc -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], v[50:51] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[26:27], v[14:15], 1.0 -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v8, v[16:17] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], v[24:25] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[26:27], v[14:15], 1.0 -; SI-GISEL-NEXT: v_mov_b32_e32 v16, 0x7ff00000 -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], v[28:29] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v17, v16, v9, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[14:15], v8 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[4:5], v[30:31] -; SI-GISEL-NEXT: v_mov_b32_e32 v22, 0 -; SI-GISEL-NEXT: v_mov_b32_e32 v23, 0xc090cc00 -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], v[52:53] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v14, 0, v8, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v15, v16, v9, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[0:1], v[22:23] -; SI-GISEL-NEXT: v_ldexp_f64 v[12:13], v[12:13], v32 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e64 s[4:5], v[2:3], v[30:31] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v33, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v17, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[2:3], v[22:23] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[18:19], v[20:21], 1.0 -; SI-GISEL-NEXT: v_cndmask_b32_e64 v12, 0, v12, s[4:5] -; SI-GISEL-NEXT: v_cndmask_b32_e64 v13, v16, v13, s[4:5] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v12, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v13, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[4:5], v[22:23] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[18:19], v[8:9], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[24:25], v[12:13], v[52:53] +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v14, v[14:15] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[24:25], v[12:13], 1.0 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v16, v[16:17] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[24:25], v[12:13], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[26:27], v[22:23], v[32:33] +; SI-GISEL-NEXT: v_mov_b32_e32 v17, 0x7ff00000 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[26:27], v[24:25], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[26:27], v[24:25], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[26:27], v[24:25], v[48:49] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[26:27], v[24:25], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[26:27], v[24:25], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[26:27], v[24:25], v[20:21] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[26:27], v[24:25], v[30:31] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[26:27], v[24:25], v[52:53] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[26:27], v[24:25], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[26:27], v[24:25], 1.0 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v26, v[8:9] +; SI-GISEL-NEXT: v_ldexp_f64 v[14:15], v[24:25], v14 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[22:23], v[32:33] +; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[10:11], v[22:23], v[32:33] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[10:11], v[22:23], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[10:11], v[22:23], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[48:49] +; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[10:11], v[22:23], v[48:49] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[10:11], v[22:23], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[10:11], v[22:23], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21] +; SI-GISEL-NEXT: v_mov_b32_e32 v8, 0 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[30:31] +; SI-GISEL-NEXT: v_mov_b32_e32 v9, 0x40900000 +; SI-GISEL-NEXT: v_ldexp_f64 v[12:13], v[12:13], v26 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[18:19], v[24:25], v[52:53] +; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[10:11], v[22:23], v[20:21] +; SI-GISEL-NEXT: v_mov_b32_e32 v26, 0 +; SI-GISEL-NEXT: v_mov_b32_e32 v27, 0xc090cc00 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v12, 0, v12, vcc +; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[18:19], v[24:25], 1.0 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v24, v[28:29] +; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[10:11], v[20:21], v[30:31] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v13, v17, v13, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[0:1], v[26:27] +; SI-GISEL-NEXT: v_cmp_ngt_f64_e64 s[4:5], v[2:3], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[18:19], v[22:23], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[10:11], v[20:21], v[52:53] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v12, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v13, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[2:3], v[26:27] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v14, 0, v14, s[4:5] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v12, v17, v15, s[4:5] +; SI-GISEL-NEXT: v_ldexp_f64 v[18:19], v[18:19], v24 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v14, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v12, vcc +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[4:5], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[10:11], v[20:21], 1.0 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v14, 0, v18, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v15, v17, v19, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[4:5], v[26:27] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[10:11], v[12:13], 1.0 ; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v14, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v15, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[8:9], v10 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[6:7], v[30:31] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, 0, v8, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v16, v9, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[6:7], v[22:23] +; SI-GISEL-NEXT: v_ldexp_f64 v[10:11], v[10:11], v16 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[6:7], v[8:9] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, 0, v10, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v17, v11, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[6:7], v[26:27] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, 0, v9, vcc ; SI-GISEL-NEXT: s_setpc_b64 s[30:31] @@ -3264,35 +3264,35 @@ define amdgpu_ps <4 x i32> @s_exp10_v2f64(<2 x double> inreg %in) #0 { ; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[4:5], v[18:19], v[34:35] ; SI-GISEL-NEXT: v_mul_f64 v[0:1], s[2:3], v[0:1] ; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[4:5], v[18:19], 1.0 -; SI-GISEL-NEXT: v_cmp_gt_f64_e64 s[10:11], |v[0:1]|, v[6:7] ; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[4:5], v[18:19], 1.0 ; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v18, s[4:5] +; SI-GISEL-NEXT: v_cmp_gt_f64_e64 s[4:5], |v[0:1]|, v[6:7] ; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0 -; SI-GISEL-NEXT: v_mov_b32_e32 v7, 0xc090cc00 +; SI-GISEL-NEXT: v_mov_b32_e32 v7, 0x40900000 ; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[4:5], v18 -; SI-GISEL-NEXT: v_readfirstlane_b32 s4, v4 -; SI-GISEL-NEXT: v_readfirstlane_b32 s5, v5 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[0:1], v[6:7] +; SI-GISEL-NEXT: v_readfirstlane_b32 s10, v4 +; SI-GISEL-NEXT: v_readfirstlane_b32 s11, v5 ; SI-GISEL-NEXT: v_mov_b32_e32 v4, 0 -; SI-GISEL-NEXT: v_mov_b32_e32 v5, 0x40900000 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[0:1], v[4:5] +; SI-GISEL-NEXT: v_mov_b32_e32 v5, 0xc090cc00 ; SI-GISEL-NEXT: s_or_b64 s[12:13], vcc, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[0:1], v[6:7] +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[0:1], v[4:5] ; SI-GISEL-NEXT: s_mov_b32 s12, 0 ; SI-GISEL-NEXT: s_mov_b32 s13, 0x7ff00000 -; SI-GISEL-NEXT: s_cselect_b64 s[0:1], s[4:5], s[12:13] -; SI-GISEL-NEXT: s_or_b64 s[4:5], vcc, vcc -; SI-GISEL-NEXT: v_readfirstlane_b32 s4, v0 -; SI-GISEL-NEXT: v_readfirstlane_b32 s5, v1 +; SI-GISEL-NEXT: s_cselect_b64 s[0:1], s[10:11], s[12:13] +; SI-GISEL-NEXT: s_or_b64 s[10:11], vcc, vcc +; SI-GISEL-NEXT: v_readfirstlane_b32 s10, v0 +; SI-GISEL-NEXT: v_readfirstlane_b32 s11, v1 ; SI-GISEL-NEXT: s_cselect_b64 s[0:1], s[0:1], 0 -; SI-GISEL-NEXT: s_and_b64 s[6:7], s[4:5], s[6:7] +; SI-GISEL-NEXT: s_and_b64 s[6:7], s[10:11], s[6:7] ; SI-GISEL-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9] ; SI-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], s[6:7] -; SI-GISEL-NEXT: s_or_b64 s[8:9], s[10:11], s[10:11] +; SI-GISEL-NEXT: s_or_b64 s[4:5], s[4:5], s[4:5] ; SI-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], -s[6:7] -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[2:3], v[4:5] +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[2:3], v[6:7] ; SI-GISEL-NEXT: v_readfirstlane_b32 s6, v0 ; SI-GISEL-NEXT: v_readfirstlane_b32 s7, v1 -; SI-GISEL-NEXT: s_cselect_b64 s[4:5], s[4:5], s[6:7] +; SI-GISEL-NEXT: s_cselect_b64 s[4:5], s[10:11], s[6:7] ; SI-GISEL-NEXT: v_mov_b32_e32 v0, s4 ; SI-GISEL-NEXT: v_mov_b32_e32 v1, s5 ; SI-GISEL-NEXT: v_fma_f64 v[0:1], -v[0:1], v[2:3], s[2:3] @@ -3300,7 +3300,7 @@ define amdgpu_ps <4 x i32> @s_exp10_v2f64(<2 x double> inreg %in) #0 { ; SI-GISEL-NEXT: v_fma_f64 v[0:1], -s[4:5], v[8:9], v[0:1] ; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v8, s[4:5] ; SI-GISEL-NEXT: v_mul_f64 v[2:3], v[0:1], v[10:11] -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[2:3], v[6:7] +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[2:3], v[4:5] ; SI-GISEL-NEXT: v_fma_f64 v[0:1], v[0:1], v[14:15], v[2:3] ; SI-GISEL-NEXT: v_fma_f64 v[2:3], v[0:1], v[12:13], v[16:17] ; SI-GISEL-NEXT: v_fma_f64 v[2:3], v[0:1], v[2:3], v[20:21] @@ -4548,166 +4548,166 @@ define amdgpu_ps <8 x i32> @s_exp10_v4f64(<4 x double> inreg %in) #0 { ; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v18, v3 ; SI-SDAG-NEXT: v_mov_b32_e32 v4, 0 ; SI-SDAG-NEXT: v_add_f64 v[6:7], v[2:3], v[4:5] -; SI-SDAG-NEXT: s_mov_b32 s8, -1 -; SI-SDAG-NEXT: s_mov_b32 s9, 0x432fffff +; SI-SDAG-NEXT: s_mov_b32 s10, -1 +; SI-SDAG-NEXT: s_mov_b32 s11, 0x432fffff ; SI-SDAG-NEXT: v_add_f64 v[5:6], v[6:7], -v[4:5] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[8:9] -; SI-SDAG-NEXT: s_mov_b32 s10, 0x509f79ff +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[10:11] +; SI-SDAG-NEXT: s_mov_b32 s12, 0x509f79ff ; SI-SDAG-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc ; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc ; SI-SDAG-NEXT: v_mov_b32_e32 v5, s6 -; SI-SDAG-NEXT: s_mov_b32 s11, 0xbfd34413 +; SI-SDAG-NEXT: s_mov_b32 s13, 0xbfd34413 ; SI-SDAG-NEXT: v_mov_b32_e32 v6, s7 -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[2:3], s[10:11], v[5:6] -; SI-SDAG-NEXT: s_mov_b32 s12, 0xa994fd21 -; SI-SDAG-NEXT: s_mov_b32 s13, 0x3c49dc1d ; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[2:3], s[12:13], v[5:6] -; SI-SDAG-NEXT: s_mov_b32 s14, 0x494ea3e9 -; SI-SDAG-NEXT: s_mov_b32 s15, 0xbcaf48ad -; SI-SDAG-NEXT: v_mul_f64 v[7:8], v[5:6], s[14:15] -; SI-SDAG-NEXT: s_mov_b32 s16, 0xbbb55516 -; SI-SDAG-NEXT: s_mov_b32 s17, 0x40026bb1 -; SI-SDAG-NEXT: v_fma_f64 v[6:7], v[5:6], s[16:17], v[7:8] -; SI-SDAG-NEXT: v_mul_f64 v[8:9], s[4:5], v[0:1] -; SI-SDAG-NEXT: v_mul_f64 v[12:13], s[2:3], v[0:1] -; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v18, v9 -; SI-SDAG-NEXT: v_add_f64 v[10:11], v[8:9], v[4:5] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[8:9]|, s[8:9] -; SI-SDAG-NEXT: v_add_f64 v[10:11], v[10:11], -v[4:5] +; SI-SDAG-NEXT: s_mov_b32 s14, 0xa994fd21 +; SI-SDAG-NEXT: s_mov_b32 s15, 0x3c49dc1d +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[2:3], s[14:15], v[5:6] +; SI-SDAG-NEXT: s_mov_b32 s16, 0x494ea3e9 +; SI-SDAG-NEXT: s_mov_b32 s17, 0xbcaf48ad +; SI-SDAG-NEXT: v_mul_f64 v[7:8], v[5:6], s[16:17] +; SI-SDAG-NEXT: v_mul_f64 v[12:13], s[4:5], v[0:1] +; SI-SDAG-NEXT: s_mov_b32 s20, 0xbbb55516 +; SI-SDAG-NEXT: s_mov_b32 s21, 0x40026bb1 +; SI-SDAG-NEXT: v_fma_f64 v[6:7], v[5:6], s[20:21], v[7:8] ; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v18, v13 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v11, v9, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v8, v10, v8, vcc -; SI-SDAG-NEXT: v_mov_b32_e32 v11, s5 -; SI-SDAG-NEXT: v_mov_b32_e32 v10, s4 -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[8:9], s[10:11], v[10:11] ; SI-SDAG-NEXT: v_add_f64 v[14:15], v[12:13], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[8:9], s[12:13], v[10:11] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[12:13]|, s[10:11] ; SI-SDAG-NEXT: v_add_f64 v[14:15], v[14:15], -v[4:5] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[12:13]|, s[8:9] -; SI-SDAG-NEXT: s_mov_b32 s20, 0xfca7ab0c -; SI-SDAG-NEXT: s_mov_b32 s21, 0x3e928af3 +; SI-SDAG-NEXT: s_mov_b32 s8, 0xfca7ab0c ; SI-SDAG-NEXT: v_cndmask_b32_e32 v13, v15, v13, vcc ; SI-SDAG-NEXT: v_cndmask_b32_e32 v12, v14, v12, vcc -; SI-SDAG-NEXT: v_mul_f64 v[14:15], v[10:11], s[14:15] -; SI-SDAG-NEXT: v_mov_b32_e32 v16, s20 +; SI-SDAG-NEXT: v_mov_b32_e32 v15, s5 +; SI-SDAG-NEXT: v_mov_b32_e32 v14, s4 +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[12:13], s[12:13], v[14:15] +; SI-SDAG-NEXT: s_mov_b32 s9, 0x3e928af3 +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[12:13], s[14:15], v[14:15] +; SI-SDAG-NEXT: v_mov_b32_e32 v8, s8 ; SI-SDAG-NEXT: s_mov_b32 s18, 0x6a5dcb37 ; SI-SDAG-NEXT: s_mov_b32 s19, 0x3e5ade15 -; SI-SDAG-NEXT: v_mov_b32_e32 v17, s21 -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[10:11], s[16:17], v[14:15] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[6:7], s[18:19], v[16:17] -; SI-SDAG-NEXT: s_mov_b32 s20, 0x623fde64 -; SI-SDAG-NEXT: s_mov_b32 s21, 0x3ec71dee -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[6:7], v[14:15], s[20:21] -; SI-SDAG-NEXT: s_mov_b32 s22, 0x7c89e6b0 -; SI-SDAG-NEXT: s_mov_b32 s23, 0x3efa0199 -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[6:7], v[14:15], s[22:23] -; SI-SDAG-NEXT: s_mov_b32 s24, 0x14761f6e -; SI-SDAG-NEXT: s_mov_b32 s25, 0x3f2a01a0 -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[6:7], v[14:15], s[24:25] +; SI-SDAG-NEXT: v_mov_b32_e32 v9, s9 +; SI-SDAG-NEXT: v_mul_f64 v[16:17], v[14:15], s[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], s[18:19], v[8:9] +; SI-SDAG-NEXT: s_mov_b32 s22, 0x623fde64 +; SI-SDAG-NEXT: s_mov_b32 s23, 0x3ec71dee +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[14:15], s[20:21], v[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[22:23] +; SI-SDAG-NEXT: s_mov_b32 s24, 0x7c89e6b0 +; SI-SDAG-NEXT: s_mov_b32 s25, 0x3efa0199 +; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[14:15], s[18:19], v[8:9] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[24:25] +; SI-SDAG-NEXT: s_mov_b32 s26, 0x14761f6e +; SI-SDAG-NEXT: s_mov_b32 s27, 0x3f2a01a0 +; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[26:27] +; SI-SDAG-NEXT: s_mov_b32 s28, 0x1852b7b0 +; SI-SDAG-NEXT: s_mov_b32 s29, 0x3f56c16c +; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[28:29] +; SI-SDAG-NEXT: s_mov_b32 s30, 0x11122322 +; SI-SDAG-NEXT: s_mov_b32 s31, 0x3f811111 +; SI-SDAG-NEXT: v_fma_f64 v[16:17], v[14:15], v[16:17], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[30:31] +; SI-SDAG-NEXT: s_mov_b32 s34, 0x555502a1 +; SI-SDAG-NEXT: s_mov_b32 s35, 0x3fa55555 ; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v19, v[2:3] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[10:11], s[18:19], v[16:17] -; SI-SDAG-NEXT: s_mov_b32 s26, 0x1852b7b0 -; SI-SDAG-NEXT: s_mov_b32 s27, 0x3f56c16c -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[6:7], v[14:15], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[10:11], v[2:3], s[20:21] -; SI-SDAG-NEXT: s_mov_b32 s28, 0x11122322 -; SI-SDAG-NEXT: s_mov_b32 s29, 0x3f811111 -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[6:7], v[14:15], s[28:29] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[10:11], v[2:3], s[22:23] -; SI-SDAG-NEXT: s_mov_b32 s30, 0x555502a1 -; SI-SDAG-NEXT: s_mov_b32 s31, 0x3fa55555 -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[6:7], v[14:15], s[30:31] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[10:11], v[2:3], s[24:25] -; SI-SDAG-NEXT: s_mov_b32 s34, 0x55555511 -; SI-SDAG-NEXT: s_mov_b32 s35, 0x3fc55555 -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[6:7], v[14:15], s[34:35] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[10:11], v[2:3], s[26:27] -; SI-SDAG-NEXT: s_mov_b32 s36, 11 -; SI-SDAG-NEXT: s_mov_b32 s37, 0x3fe00000 -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[6:7], v[14:15], s[36:37] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[10:11], v[2:3], s[28:29] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[6:7], v[14:15], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[10:11], v[2:3], s[30:31] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[6:7], v[14:15], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[10:11], v[2:3], s[34:35] +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[16:17], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[34:35] +; SI-SDAG-NEXT: s_mov_b32 s36, 0x55555511 +; SI-SDAG-NEXT: s_mov_b32 s37, 0x3fc55555 +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[2:3], s[30:31] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[36:37] +; SI-SDAG-NEXT: s_mov_b32 s38, 11 +; SI-SDAG-NEXT: s_mov_b32 s39, 0x3fe00000 +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[2:3], s[34:35] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], s[38:39] +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[2:3], s[36:37] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[6:7], v[10:11], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[2:3], s[38:39] +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[6:7], v[10:11], 1.0 +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v16, v[12:13] +; SI-SDAG-NEXT: v_mul_f64 v[12:13], s[2:3], v[0:1] +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[2:3], 1.0 +; SI-SDAG-NEXT: v_ldexp_f64 v[6:7], v[5:6], v19 +; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v18, v13 +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[14:15], v[2:3], 1.0 +; SI-SDAG-NEXT: v_add_f64 v[14:15], v[12:13], v[4:5] +; SI-SDAG-NEXT: v_mul_f64 v[0:1], s[0:1], v[0:1] +; SI-SDAG-NEXT: v_add_f64 v[14:15], v[14:15], -v[4:5] +; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v18, v1 +; SI-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v16 +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[8:9], |v[12:13]|, s[10:11] +; SI-SDAG-NEXT: v_add_f64 v[16:17], v[0:1], v[4:5] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v13, v15, v13, s[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v12, v14, v12, s[8:9] ; SI-SDAG-NEXT: v_mov_b32_e32 v15, s3 +; SI-SDAG-NEXT: v_add_f64 v[4:5], v[16:17], -v[4:5] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[8:9], |v[0:1]|, s[10:11] ; SI-SDAG-NEXT: v_mov_b32_e32 v14, s2 -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[10:11], v[2:3], s[36:37] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[12:13], s[10:11], v[14:15] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[10:11], v[2:3], 1.0 ; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[12:13], s[12:13], v[14:15] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[10:11], v[2:3], 1.0 -; SI-SDAG-NEXT: v_mul_f64 v[10:11], v[14:15], s[14:15] -; SI-SDAG-NEXT: v_mul_f64 v[0:1], s[0:1], v[0:1] -; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[14:15], s[16:17], v[10:11] -; SI-SDAG-NEXT: v_ldexp_f64 v[6:7], v[5:6], v19 -; SI-SDAG-NEXT: v_bfi_b32 v5, s33, v18, v1 -; SI-SDAG-NEXT: v_add_f64 v[14:15], v[0:1], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[10:11], s[18:19], v[16:17] -; SI-SDAG-NEXT: v_add_f64 v[4:5], v[14:15], -v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[18:19], s[20:21] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[0:1]|, s[8:9] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], s[22:23] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v5, v1, s[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v4, v0, s[8:9] ; SI-SDAG-NEXT: v_mov_b32_e32 v5, s1 ; SI-SDAG-NEXT: v_mov_b32_e32 v4, s0 -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[4:5], v[0:1], s[10:11], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[10:11], v[14:15], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[12:13], s[14:15], v[14:15] ; SI-SDAG-NEXT: v_fma_f64 v[4:5], v[0:1], s[12:13], v[4:5] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v20, v[8:9] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[10:11], v[14:15], s[28:29] -; SI-SDAG-NEXT: v_mul_f64 v[18:19], v[4:5], s[14:15] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[10:11], v[8:9], s[30:31] -; SI-SDAG-NEXT: v_fma_f64 v[4:5], v[4:5], s[16:17], v[18:19] -; SI-SDAG-NEXT: v_mov_b32_e32 v18, 0 -; SI-SDAG-NEXT: v_mov_b32_e32 v19, 0x40900000 -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[10:11], v[8:9], s[34:35] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e32 vcc, s[6:7], v[18:19] -; SI-SDAG-NEXT: v_mov_b32_e32 v21, 0x7ff00000 -; SI-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v20 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v20, v21, v7, vcc -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[10:11], v[8:9], s[36:37] -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[4:5], s[18:19], v[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[10:11], v[7:8], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[4:5], v[14:15], s[20:21] -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[10:11], v[7:8], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[4:5], v[14:15], s[22:23] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v12, v[12:13] -; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[4:5], v[9:10], s[24:25] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[10:11], s[2:3], v[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[4:5], v[9:10], s[26:27] -; SI-SDAG-NEXT: v_ldexp_f64 v[7:8], v[7:8], v12 -; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[4:5], v[9:10], s[28:29] -; SI-SDAG-NEXT: v_mov_b32_e32 v14, 0 -; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[4:5], v[9:10], s[30:31] -; SI-SDAG-NEXT: v_mov_b32_e32 v15, 0xc090cc00 -; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[4:5], v[9:10], s[34:35] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v12, v21, v8, s[10:11] -; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[4:5], v[9:10], s[36:37] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[6:7], s[6:7], v[14:15] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[4:5], v[9:10], 1.0 -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v10, v[0:1] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[8:9], s[4:5], v[18:19] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[4:5], s[4:5], v[14:15] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[4:5], v[8:9], 1.0 -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[2:3], s[2:3], v[14:15] +; SI-SDAG-NEXT: v_mul_f64 v[16:17], v[14:15], s[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[4:5], v[0:1], s[14:15], v[4:5] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[14:15], s[20:21], v[16:17] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v18, v[12:13] +; SI-SDAG-NEXT: v_mul_f64 v[12:13], v[4:5], s[16:17] +; SI-SDAG-NEXT: v_mov_b32_e32 v10, 0 +; SI-SDAG-NEXT: v_fma_f64 v[4:5], v[4:5], s[20:21], v[12:13] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[14:15], s[18:19], v[8:9] +; SI-SDAG-NEXT: v_mov_b32_e32 v11, 0x40900000 +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[14:15], v[12:13], s[22:23] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e32 vcc, s[6:7], v[10:11] +; SI-SDAG-NEXT: v_mov_b32_e32 v16, 0 +; SI-SDAG-NEXT: v_mov_b32_e32 v17, 0xc090cc00 +; SI-SDAG-NEXT: v_mov_b32_e32 v19, 0x7ff00000 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[6:7], s[6:7], v[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[14:15], v[12:13], s[24:25] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v7, v19, v7, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e64 v20, 0, v7, s[6:7] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[14:15], v[12:13], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], s[18:19], v[8:9] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[14:15], v[12:13], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[14:15], v[12:13], s[30:31] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[14:15], v[12:13], s[34:35] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[14:15], v[12:13], s[36:37] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[14:15], v[12:13], s[38:39] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], s[30:31] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[14:15], v[12:13], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], s[34:35] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[14:15], v[12:13], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], s[36:37] +; SI-SDAG-NEXT: v_ldexp_f64 v[12:13], v[12:13], v18 +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], s[38:39] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[10:11], s[2:3], v[10:11] +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[4:5], v[7:8], 1.0 +; SI-SDAG-NEXT: v_cndmask_b32_e64 v9, v19, v13, s[10:11] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v13, v[0:1] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[8:9], s[4:5], v[10:11] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[4:5], s[4:5], v[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[4:5], v[7:8], 1.0 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[2:3], s[2:3], v[16:17] ; SI-SDAG-NEXT: s_and_b64 vcc, s[6:7], vcc -; SI-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v10 -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[12:13], s[0:1], v[18:19] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[14:15] +; SI-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v13 +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[12:13], s[0:1], v[10:11] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[16:17] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v6, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], s[8:9] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[2:3], s[10:11] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, v21, v3, s[8:9] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v21, v1, s[12:13] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v6, 0, v7, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v19, v1, s[12:13] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v6, 0, v12, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[0:1], s[12:13] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v11, 0, v20, s[6:7] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, v12, s[2:3] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, v9, s[2:3] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v1, s[0:1] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc ; SI-SDAG-NEXT: v_readfirstlane_b32 s0, v0 @@ -4717,7 +4717,7 @@ define amdgpu_ps <8 x i32> @s_exp10_v4f64(<4 x double> inreg %in) #0 { ; SI-SDAG-NEXT: v_readfirstlane_b32 s1, v1 ; SI-SDAG-NEXT: v_readfirstlane_b32 s3, v4 ; SI-SDAG-NEXT: v_readfirstlane_b32 s5, v3 -; SI-SDAG-NEXT: v_readfirstlane_b32 s7, v11 +; SI-SDAG-NEXT: v_readfirstlane_b32 s7, v20 ; SI-SDAG-NEXT: ; return to shader part epilog ; ; SI-GISEL-LABEL: s_exp10_v4f64: diff --git a/llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll b/llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll index 7441f4645d2e6..a36495c9a37a8 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll @@ -1564,154 +1564,154 @@ define <4 x double> @v_exp2_v4f64(<4 x double> %in) #0 { ; SI-SDAG-LABEL: v_exp2_v4f64: ; SI-SDAG: ; %bb.0: ; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-SDAG-NEXT: s_brev_b32 s62, -2 -; SI-SDAG-NEXT: v_mov_b32_e32 v17, 0x43300000 -; SI-SDAG-NEXT: v_bfi_b32 v11, s62, v17, v1 -; SI-SDAG-NEXT: v_mov_b32_e32 v10, 0 -; SI-SDAG-NEXT: v_add_f64 v[8:9], v[0:1], v[10:11] -; SI-SDAG-NEXT: s_mov_b32 s14, -1 -; SI-SDAG-NEXT: s_mov_b32 s15, 0x432fffff -; SI-SDAG-NEXT: v_add_f64 v[8:9], v[8:9], -v[10:11] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[0:1]|, s[14:15] -; SI-SDAG-NEXT: s_mov_b32 s18, 0x3b39803f -; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v9, v1, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc -; SI-SDAG-NEXT: v_add_f64 v[11:12], v[0:1], -v[8:9] -; SI-SDAG-NEXT: s_mov_b32 s19, 0x3c7abc9e -; SI-SDAG-NEXT: v_mul_f64 v[13:14], v[11:12], s[18:19] -; SI-SDAG-NEXT: s_mov_b32 s20, 0xfefa39ef -; SI-SDAG-NEXT: s_mov_b32 s21, 0x3fe62e42 +; SI-SDAG-NEXT: s_brev_b32 s56, -2 +; SI-SDAG-NEXT: v_mov_b32_e32 v14, 0x43300000 +; SI-SDAG-NEXT: v_bfi_b32 v9, s56, v14, v1 +; SI-SDAG-NEXT: v_mov_b32_e32 v8, 0 +; SI-SDAG-NEXT: v_add_f64 v[10:11], v[0:1], v[8:9] +; SI-SDAG-NEXT: s_mov_b32 s10, -1 +; SI-SDAG-NEXT: s_mov_b32 s11, 0x432fffff +; SI-SDAG-NEXT: v_add_f64 v[9:10], v[10:11], -v[8:9] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[0:1]|, s[10:11] +; SI-SDAG-NEXT: s_mov_b32 s12, 0x3b39803f +; SI-SDAG-NEXT: v_cndmask_b32_e32 v13, v10, v1, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v12, v9, v0, vcc +; SI-SDAG-NEXT: v_add_f64 v[9:10], v[0:1], -v[12:13] +; SI-SDAG-NEXT: s_mov_b32 s13, 0x3c7abc9e +; SI-SDAG-NEXT: v_mul_f64 v[15:16], v[9:10], s[12:13] +; SI-SDAG-NEXT: s_mov_b32 s14, 0xfefa39ef +; SI-SDAG-NEXT: s_mov_b32 s15, 0x3fe62e42 ; SI-SDAG-NEXT: s_mov_b32 s5, 0x3e928af3 -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[11:12], s[20:21], v[13:14] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[9:10], s[14:15], v[15:16] ; SI-SDAG-NEXT: s_mov_b32 s4, 0xfca7ab0c -; SI-SDAG-NEXT: v_mov_b32_e32 v13, s5 -; SI-SDAG-NEXT: s_mov_b32 s22, 0x6a5dcb37 -; SI-SDAG-NEXT: s_mov_b32 s23, 0x3e5ade15 -; SI-SDAG-NEXT: v_mov_b32_e32 v12, s4 -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[14:15], s[22:23], v[12:13] -; SI-SDAG-NEXT: s_mov_b32 s24, 0x623fde64 -; SI-SDAG-NEXT: s_mov_b32 s25, 0x3ec71dee -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[14:15], v[18:19], s[24:25] -; SI-SDAG-NEXT: s_mov_b32 s26, 0x7c89e6b0 -; SI-SDAG-NEXT: s_mov_b32 s27, 0x3efa0199 -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[14:15], v[18:19], s[26:27] -; SI-SDAG-NEXT: s_mov_b32 s28, 0x14761f6e -; SI-SDAG-NEXT: s_mov_b32 s29, 0x3f2a01a0 -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[14:15], v[18:19], s[28:29] -; SI-SDAG-NEXT: s_mov_b32 s40, 0x1852b7b0 -; SI-SDAG-NEXT: s_mov_b32 s41, 0x3f56c16c -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[14:15], v[18:19], s[40:41] -; SI-SDAG-NEXT: s_mov_b32 s42, 0x11122322 -; SI-SDAG-NEXT: s_mov_b32 s43, 0x3f811111 -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[14:15], v[18:19], s[42:43] -; SI-SDAG-NEXT: s_mov_b32 s44, 0x555502a1 -; SI-SDAG-NEXT: s_mov_b32 s45, 0x3fa55555 -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[14:15], v[18:19], s[44:45] -; SI-SDAG-NEXT: s_mov_b32 s46, 0x55555511 -; SI-SDAG-NEXT: s_mov_b32 s47, 0x3fc55555 -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[14:15], v[18:19], s[46:47] -; SI-SDAG-NEXT: s_mov_b32 s56, 11 -; SI-SDAG-NEXT: s_mov_b32 s57, 0x3fe00000 -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[14:15], v[18:19], s[56:57] +; SI-SDAG-NEXT: v_mov_b32_e32 v11, s5 +; SI-SDAG-NEXT: s_mov_b32 s16, 0x6a5dcb37 +; SI-SDAG-NEXT: s_mov_b32 s17, 0x3e5ade15 +; SI-SDAG-NEXT: v_mov_b32_e32 v10, s4 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], s[16:17], v[10:11] +; SI-SDAG-NEXT: s_mov_b32 s18, 0x623fde64 +; SI-SDAG-NEXT: s_mov_b32 s19, 0x3ec71dee +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[18:19] +; SI-SDAG-NEXT: s_mov_b32 s20, 0x7c89e6b0 +; SI-SDAG-NEXT: s_mov_b32 s21, 0x3efa0199 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[20:21] +; SI-SDAG-NEXT: s_mov_b32 s22, 0x14761f6e +; SI-SDAG-NEXT: s_mov_b32 s23, 0x3f2a01a0 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[22:23] +; SI-SDAG-NEXT: s_mov_b32 s24, 0x1852b7b0 +; SI-SDAG-NEXT: s_mov_b32 s25, 0x3f56c16c +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[24:25] +; SI-SDAG-NEXT: s_mov_b32 s26, 0x11122322 +; SI-SDAG-NEXT: s_mov_b32 s27, 0x3f811111 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[26:27] +; SI-SDAG-NEXT: s_mov_b32 s28, 0x555502a1 +; SI-SDAG-NEXT: s_mov_b32 s29, 0x3fa55555 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[28:29] +; SI-SDAG-NEXT: s_mov_b32 s40, 0x55555511 +; SI-SDAG-NEXT: s_mov_b32 s41, 0x3fc55555 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[40:41] +; SI-SDAG-NEXT: s_mov_b32 s42, 11 +; SI-SDAG-NEXT: s_mov_b32 s43, 0x3fe00000 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[42:43] +; SI-SDAG-NEXT: v_bfi_b32 v9, s56, v14, v3 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], 1.0 +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v19, v[12:13] +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[15:16], v[17:18], 1.0 +; SI-SDAG-NEXT: v_add_f64 v[15:16], v[2:3], v[8:9] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[10:11] +; SI-SDAG-NEXT: v_add_f64 v[15:16], v[15:16], -v[8:9] +; SI-SDAG-NEXT: v_ldexp_f64 v[12:13], v[12:13], v19 +; SI-SDAG-NEXT: v_cndmask_b32_e32 v16, v16, v3, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v15, v15, v2, vcc +; SI-SDAG-NEXT: v_add_f64 v[17:18], v[2:3], -v[15:16] +; SI-SDAG-NEXT: s_mov_b32 s44, 0 +; SI-SDAG-NEXT: v_mul_f64 v[19:20], v[17:18], s[12:13] +; SI-SDAG-NEXT: s_mov_b32 s45, 0x40900000 +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[17:18], s[14:15], v[19:20] +; SI-SDAG-NEXT: s_mov_b32 s46, 0 +; SI-SDAG-NEXT: s_mov_b32 s47, 0xc090cc00 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[44:45], v[0:1] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[46:47], v[0:1] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], s[16:17], v[10:11] +; SI-SDAG-NEXT: v_mov_b32_e32 v20, 0x7ff00000 +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], v[0:1], s[18:19] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v19, v20, v13, vcc +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], v[0:1], s[20:21] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v13, v[15:16] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], v[0:1], s[22:23] +; SI-SDAG-NEXT: v_bfi_b32 v9, s56, v14, v5 +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], v[0:1], s[24:25] +; SI-SDAG-NEXT: v_add_f64 v[15:16], v[4:5], v[8:9] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], v[0:1], s[26:27] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[6:7], |v[4:5]|, s[10:11] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], v[0:1], s[28:29] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[8:9], s[46:47], v[2:3] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], v[0:1], s[40:41] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[10:11], |v[6:7]|, s[10:11] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], v[0:1], s[42:43] +; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], v[0:1], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[17:18], v[0:1], 1.0 +; SI-SDAG-NEXT: v_ldexp_f64 v[17:18], v[0:1], v13 +; SI-SDAG-NEXT: v_add_f64 v[0:1], v[15:16], -v[8:9] +; SI-SDAG-NEXT: v_bfi_b32 v9, s56, v14, v7 +; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v1, v5, s[6:7] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[6:7] +; SI-SDAG-NEXT: v_add_f64 v[15:16], v[4:5], -v[0:1] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[6:7], s[44:45], v[2:3] +; SI-SDAG-NEXT: v_mul_f64 v[2:3], v[15:16], s[12:13] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v21, v20, v18, s[6:7] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[15:16], s[14:15], v[2:3] +; SI-SDAG-NEXT: v_add_f64 v[2:3], v[6:7], v[8:9] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v22, v[0:1] +; SI-SDAG-NEXT: v_add_f64 v[2:3], v[2:3], -v[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v19, s[4:5] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v9, v3, v7, s[10:11] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v8, v2, v6, s[10:11] +; SI-SDAG-NEXT: v_add_f64 v[2:3], v[6:7], -v[8:9] +; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[15:16], s[16:17], v[10:11] +; SI-SDAG-NEXT: v_mul_f64 v[13:14], v[2:3], s[12:13] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v12, vcc +; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[2:3], s[14:15], v[13:14] +; SI-SDAG-NEXT: s_and_b64 vcc, s[8:9], s[6:7] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v17, vcc +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[18:19], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], s[16:17], v[10:11] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[20:21] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[22:23] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[24:25] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[26:27] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[40:41] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], s[42:43] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[40:41] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[15:16], v[17:18], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], s[42:43] +; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[15:16], v[17:18], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], 1.0 ; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v8, v[8:9] -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[14:15], v[18:19], 1.0 -; SI-SDAG-NEXT: s_mov_b32 s58, 0 -; SI-SDAG-NEXT: v_fma_f64 v[14:15], v[14:15], v[18:19], 1.0 -; SI-SDAG-NEXT: s_mov_b32 s59, 0x40900000 -; SI-SDAG-NEXT: s_mov_b32 s60, 0 -; SI-SDAG-NEXT: s_mov_b32 s61, 0xc090cc00 -; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[58:59], v[0:1] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[60:61], v[0:1] -; SI-SDAG-NEXT: v_bfi_b32 v11, s62, v17, v3 -; SI-SDAG-NEXT: v_ldexp_f64 v[8:9], v[14:15], v8 -; SI-SDAG-NEXT: v_add_f64 v[14:15], v[2:3], v[10:11] -; SI-SDAG-NEXT: s_and_b64 s[6:7], s[4:5], vcc -; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, v8, s[6:7] -; SI-SDAG-NEXT: v_add_f64 v[14:15], v[14:15], -v[10:11] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[6:7], |v[2:3]|, s[14:15] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[16:17], s[58:59], v[2:3] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v15, v15, v3, s[6:7] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v14, v14, v2, s[6:7] -; SI-SDAG-NEXT: v_add_f64 v[18:19], v[2:3], -v[14:15] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v1, v[14:15] -; SI-SDAG-NEXT: v_mul_f64 v[20:21], v[18:19], s[18:19] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[10:11], s[60:61], v[2:3] -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[18:19], s[20:21], v[20:21] -; SI-SDAG-NEXT: s_and_b64 s[6:7], s[10:11], s[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], s[22:23], v[12:13] -; SI-SDAG-NEXT: v_bfi_b32 v11, s62, v17, v5 -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[24:25] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[8:9], s[58:59], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[28:29] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[40:41] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[42:43] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[44:45] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[46:47] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[56:57] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[18:19], v[20:21], 1.0 -; SI-SDAG-NEXT: v_ldexp_f64 v[15:16], v[18:19], v1 -; SI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, v15, s[6:7] -; SI-SDAG-NEXT: v_add_f64 v[14:15], v[4:5], v[10:11] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[6:7], |v[4:5]|, s[14:15] -; SI-SDAG-NEXT: v_add_f64 v[14:15], v[14:15], -v[10:11] -; SI-SDAG-NEXT: v_bfi_b32 v11, s62, v17, v7 -; SI-SDAG-NEXT: v_cndmask_b32_e64 v15, v15, v5, s[6:7] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v14, v14, v4, s[6:7] -; SI-SDAG-NEXT: v_add_f64 v[18:19], v[4:5], -v[14:15] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v1, v[14:15] -; SI-SDAG-NEXT: v_mul_f64 v[20:21], v[18:19], s[18:19] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[6:7], s[60:61], v[4:5] -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[18:19], s[20:21], v[20:21] -; SI-SDAG-NEXT: s_and_b64 s[12:13], s[6:7], s[8:9] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], s[22:23], v[12:13] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[28:29] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[40:41] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[42:43] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[44:45] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[46:47] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], s[56:57] -; SI-SDAG-NEXT: v_fma_f64 v[20:21], v[18:19], v[20:21], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[18:19], v[18:19], v[20:21], 1.0 -; SI-SDAG-NEXT: v_ldexp_f64 v[14:15], v[18:19], v1 -; SI-SDAG-NEXT: v_add_f64 v[17:18], v[6:7], v[10:11] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, v14, s[12:13] -; SI-SDAG-NEXT: v_add_f64 v[10:11], v[17:18], -v[10:11] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[12:13], |v[6:7]|, s[14:15] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[14:15], s[58:59], v[6:7] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v11, v11, v7, s[12:13] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v10, v10, v6, s[12:13] -; SI-SDAG-NEXT: v_add_f64 v[17:18], v[6:7], -v[10:11] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v1, v[10:11] -; SI-SDAG-NEXT: v_mul_f64 v[19:20], v[17:18], s[18:19] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[12:13], s[60:61], v[6:7] -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[17:18], s[20:21], v[19:20] -; SI-SDAG-NEXT: v_mov_b32_e32 v7, 0x7ff00000 -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[17:18], s[22:23], v[12:13] -; SI-SDAG-NEXT: s_and_b64 s[18:19], s[12:13], s[14:15] -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[17:18], v[12:13], s[24:25] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, v7, v16, s[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[17:18], v[12:13], s[26:27] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v5, v7, v15, s[8:9] -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[17:18], v[12:13], s[28:29] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[10:11] -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[17:18], v[12:13], s[40:41] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v5, 0, v5, s[6:7] -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[17:18], v[12:13], s[42:43] -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[17:18], v[12:13], s[44:45] -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[17:18], v[12:13], s[46:47] -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[17:18], v[12:13], s[56:57] -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[17:18], v[12:13], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[12:13], v[17:18], v[12:13], 1.0 -; SI-SDAG-NEXT: v_ldexp_f64 v[10:11], v[12:13], v1 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, v7, v9, vcc -; SI-SDAG-NEXT: v_cndmask_b32_e64 v7, v7, v11, s[14:15] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v6, 0, v10, s[18:19] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v1, s[4:5] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v7, 0, v7, s[12:13] +; SI-SDAG-NEXT: v_ldexp_f64 v[14:15], v[14:15], v22 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[44:45], v[4:5] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[46:47], v[4:5] +; SI-SDAG-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], 1.0 +; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v20, v15, vcc +; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc +; SI-SDAG-NEXT: v_cndmask_b32_e64 v5, 0, v9, s[4:5] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v14, vcc +; SI-SDAG-NEXT: v_ldexp_f64 v[8:9], v[10:11], v8 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e32 vcc, s[44:45], v[6:7] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[4:5], s[46:47], v[6:7] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v20, v9, vcc +; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], vcc +; SI-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v21, s[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v7, 0, v9, s[4:5] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc ; SI-SDAG-NEXT: s_setpc_b64 s[30:31] ; ; SI-GISEL-LABEL: v_exp2_v4f64: @@ -1741,21 +1741,21 @@ define <4 x double> @v_exp2_v4f64(<4 x double> %in) #0 { ; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[18:19] ; SI-GISEL-NEXT: v_and_b32_e32 v11, 0x80000000, v5 ; SI-GISEL-NEXT: v_or_b32_e32 v11, 0x43300000, v11 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v20, v16, v2, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v21, v17, v3, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v22, v16, v2, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v23, v17, v3, vcc ; SI-GISEL-NEXT: v_add_f64 v[16:17], v[4:5], v[10:11] ; SI-GISEL-NEXT: v_cmp_gt_f64_e64 vcc, |v[4:5]|, v[18:19] ; SI-GISEL-NEXT: v_add_f64 v[16:17], v[16:17], -v[10:11] -; SI-GISEL-NEXT: v_add_f64 v[22:23], v[2:3], -v[20:21] +; SI-GISEL-NEXT: v_add_f64 v[20:21], v[2:3], -v[22:23] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v16, v16, v4, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e32 v17, v17, v5, vcc ; SI-GISEL-NEXT: v_add_f64 v[26:27], v[4:5], -v[16:17] -; SI-GISEL-NEXT: v_mul_f64 v[28:29], v[22:23], v[14:15] +; SI-GISEL-NEXT: v_mul_f64 v[28:29], v[20:21], v[14:15] ; SI-GISEL-NEXT: v_mul_f64 v[30:31], v[26:27], v[14:15] ; SI-GISEL-NEXT: v_and_b32_e32 v11, 0x80000000, v7 ; SI-GISEL-NEXT: v_or_b32_e32 v11, 0x43300000, v11 -; SI-GISEL-NEXT: v_fma_f64 v[28:29], v[22:23], v[12:13], v[28:29] -; SI-GISEL-NEXT: v_fma_f64 v[22:23], v[26:27], v[12:13], v[30:31] +; SI-GISEL-NEXT: v_fma_f64 v[28:29], v[20:21], v[12:13], v[28:29] +; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[26:27], v[12:13], v[30:31] ; SI-GISEL-NEXT: v_add_f64 v[26:27], v[6:7], v[10:11] ; SI-GISEL-NEXT: v_mov_b32_e32 v30, 0x6a5dcb37 ; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0x3e5ade15 @@ -1793,76 +1793,76 @@ define <4 x double> @v_exp2_v4f64(<4 x double> %in) #0 { ; SI-GISEL-NEXT: v_mov_b32_e32 v52, 11 ; SI-GISEL-NEXT: v_mov_b32_e32 v53, 0x3fe00000 ; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[24:25], v[14:15], v[52:53] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v8, v[8:9] +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v22, v[22:23] ; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[24:25], v[14:15], 1.0 -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v10, v[10:11] ; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[24:25], v[14:15], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[22:23], v[30:31], v[32:33] -; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[14:15], v8 -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[28:29], v[30:31], v[32:33] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[28:29], v[14:15], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[28:29], v[14:15], v[26:27] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[28:29], v[14:15], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[28:29], v[14:15], v[48:49] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[28:29], v[14:15], v[50:51] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[28:29], v[14:15], v[18:19] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[28:29], v[14:15], v[38:39] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[28:29], v[14:15], v[52:53] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[28:29], v[14:15], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[28:29], v[14:15], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[28:29], v[30:31], v[32:33] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[28:29], v[24:25], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[28:29], v[24:25], v[26:27] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[28:29], v[24:25], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[28:29], v[24:25], v[48:49] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[28:29], v[24:25], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[28:29], v[24:25], v[18:19] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[28:29], v[24:25], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[28:29], v[24:25], v[52:53] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[28:29], v[24:25], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[28:29], v[24:25], 1.0 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v28, v[8:9] +; SI-GISEL-NEXT: v_ldexp_f64 v[22:23], v[24:25], v22 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[20:21], v[30:31], v[32:33] +; SI-GISEL-NEXT: v_mov_b32_e32 v8, 0 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[20:21], v[24:25], v[34:35] +; SI-GISEL-NEXT: v_ldexp_f64 v[14:15], v[14:15], v28 +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[20:21], v[24:25], v[26:27] ; SI-GISEL-NEXT: v_fma_f64 v[28:29], v[12:13], v[30:31], v[32:33] -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v32, v[20:21] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[24:25], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[12:13], v[28:29], v[34:35] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], v[26:27] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[12:13], v[24:25], v[26:27] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[12:13], v[24:25], v[36:37] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], v[48:49] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[20:21], v[24:25], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[28:29], v[12:13], v[28:29], v[34:35] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[20:21], v[24:25], v[48:49] +; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[12:13], v[28:29], v[26:27] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[20:21], v[24:25], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[12:13], v[26:27], v[36:37] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[20:21], v[24:25], v[18:19] +; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[12:13], v[26:27], v[48:49] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[20:21], v[24:25], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[26:27], v[12:13], v[26:27], v[50:51] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[20:21], v[24:25], v[52:53] +; SI-GISEL-NEXT: v_mov_b32_e32 v9, 0x40900000 +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[12:13], v[26:27], v[18:19] +; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[20:21], v[24:25], 1.0 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[8:9] ; SI-GISEL-NEXT: v_mov_b32_e32 v30, 0 -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], v[50:51] -; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0x40900000 -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], v[18:19] -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[30:31] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], v[38:39] -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[12:13], v[24:25], v[48:49] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], v[52:53] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v33, 0, v8, vcc -; SI-GISEL-NEXT: v_fma_f64 v[24:25], v[12:13], v[24:25], v[50:51] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], 1.0 -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v8, v[16:17] -; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[12:13], v[24:25], v[18:19] -; SI-GISEL-NEXT: v_fma_f64 v[20:21], v[22:23], v[20:21], 1.0 -; SI-GISEL-NEXT: v_mov_b32_e32 v16, 0x7ff00000 -; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[12:13], v[18:19], v[38:39] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v17, v16, v9, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[20:21], v8 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[4:5], v[30:31] -; SI-GISEL-NEXT: v_mov_b32_e32 v28, 0 -; SI-GISEL-NEXT: v_mov_b32_e32 v29, 0xc090cc00 -; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[12:13], v[18:19], v[52:53] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v20, 0, v8, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v21, v16, v9, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[0:1], v[28:29] -; SI-GISEL-NEXT: v_ldexp_f64 v[14:15], v[14:15], v32 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e64 s[4:5], v[2:3], v[30:31] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v33, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v17, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[2:3], v[28:29] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[12:13], v[18:19], 1.0 -; SI-GISEL-NEXT: v_cndmask_b32_e64 v14, 0, v14, s[4:5] -; SI-GISEL-NEXT: v_cndmask_b32_e64 v15, v16, v15, s[4:5] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v14, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v15, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[4:5], v[28:29] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[12:13], v[8:9], 1.0 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v20, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v21, vcc -; SI-GISEL-NEXT: v_ldexp_f64 v[8:9], v[8:9], v10 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[6:7], v[30:31] -; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, 0, v8, vcc -; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v16, v9, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[6:7], v[28:29] +; SI-GISEL-NEXT: v_mov_b32_e32 v31, 0xc090cc00 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v26, v[16:17] +; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[12:13], v[18:19], v[38:39] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], v[20:21], v[24:25], 1.0 +; SI-GISEL-NEXT: v_mov_b32_e32 v21, 0x7ff00000 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v14, 0, v14, vcc +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v20, v[10:11] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v10, v21, v15, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[0:1], v[30:31] +; SI-GISEL-NEXT: v_cmp_ngt_f64_e64 s[4:5], v[2:3], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[16:17], v[12:13], v[16:17], v[52:53] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v14, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v10, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[2:3], v[30:31] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v22, 0, v22, s[4:5] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v10, v21, v23, s[4:5] +; SI-GISEL-NEXT: v_ldexp_f64 v[18:19], v[18:19], v26 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v22, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v10, vcc +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[4:5], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[12:13], v[16:17], 1.0 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v14, 0, v18, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v15, v21, v19, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[4:5], v[30:31] +; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[12:13], v[10:11], 1.0 +; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v14, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v15, vcc +; SI-GISEL-NEXT: v_ldexp_f64 v[10:11], v[10:11], v20 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, v[6:7], v[8:9] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, 0, v10, vcc +; SI-GISEL-NEXT: v_cndmask_b32_e32 v9, v21, v11, vcc +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, v[6:7], v[30:31] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, 0, v9, vcc ; SI-GISEL-NEXT: s_setpc_b64 s[30:31] @@ -2931,18 +2931,18 @@ define amdgpu_ps <4 x i32> @s_exp2_v2f64(<2 x double> inreg %in) #0 { ; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[0:1], v[12:13], v[28:29] ; SI-GISEL-NEXT: v_cmp_gt_f64_e64 s[10:11], |s[2:3]|, v[2:3] ; SI-GISEL-NEXT: v_fma_f64 v[12:13], v[0:1], v[12:13], 1.0 -; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0 +; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v2, s[8:9] ; SI-GISEL-NEXT: v_fma_f64 v[0:1], v[0:1], v[12:13], 1.0 -; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v12, s[8:9] -; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0xc090cc00 -; SI-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v12 +; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x40900000 +; SI-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 +; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0 +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[0:1], v[2:3] ; SI-GISEL-NEXT: v_readfirstlane_b32 s8, v0 ; SI-GISEL-NEXT: v_readfirstlane_b32 s9, v1 ; SI-GISEL-NEXT: v_mov_b32_e32 v0, 0 -; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x40900000 -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[0:1], v[0:1] +; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc090cc00 ; SI-GISEL-NEXT: s_or_b64 s[12:13], vcc, vcc -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[0:1], v[2:3] +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[0:1], v[0:1] ; SI-GISEL-NEXT: s_mov_b32 s12, 0 ; SI-GISEL-NEXT: s_mov_b32 s13, 0x7ff00000 ; SI-GISEL-NEXT: s_cselect_b64 s[0:1], s[8:9], s[12:13] @@ -2955,7 +2955,7 @@ define amdgpu_ps <4 x i32> @s_exp2_v2f64(<2 x double> inreg %in) #0 { ; SI-GISEL-NEXT: v_add_f64 v[12:13], s[2:3], v[12:13] ; SI-GISEL-NEXT: s_or_b64 s[6:7], s[10:11], s[10:11] ; SI-GISEL-NEXT: v_add_f64 v[12:13], v[12:13], -s[4:5] -; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[2:3], v[0:1] +; SI-GISEL-NEXT: v_cmp_ngt_f64_e32 vcc, s[2:3], v[2:3] ; SI-GISEL-NEXT: v_readfirstlane_b32 s4, v12 ; SI-GISEL-NEXT: v_readfirstlane_b32 s5, v13 ; SI-GISEL-NEXT: s_cselect_b64 s[4:5], s[2:3], s[4:5] @@ -2964,7 +2964,7 @@ define amdgpu_ps <4 x i32> @s_exp2_v2f64(<2 x double> inreg %in) #0 { ; SI-GISEL-NEXT: v_add_f64 v[12:13], s[2:3], -v[12:13] ; SI-GISEL-NEXT: s_or_b64 s[6:7], vcc, vcc ; SI-GISEL-NEXT: v_mul_f64 v[4:5], v[12:13], v[4:5] -; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[2:3], v[2:3] +; SI-GISEL-NEXT: v_cmp_nlt_f64_e32 vcc, s[2:3], v[0:1] ; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[12:13], v[8:9], v[4:5] ; SI-GISEL-NEXT: v_cvt_i32_f64_e32 v8, s[4:5] ; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[4:5], v[6:7], v[10:11] @@ -3384,42 +3384,42 @@ define amdgpu_ps <6 x i32> @s_exp2_v3f64(<3 x double> inreg %in) #0 { ; SI-SDAG-NEXT: s_mov_b32 s28, 11 ; SI-SDAG-NEXT: s_mov_b32 s29, 0x3fe00000 ; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[5:6], v[9:10], s[28:29] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v2, v[1:2] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v11, v[1:2] ; SI-SDAG-NEXT: v_fma_f64 v[9:10], v[5:6], v[9:10], 1.0 -; SI-SDAG-NEXT: v_mov_b32_e32 v11, s3 -; SI-SDAG-NEXT: v_bfi_b32 v1, s30, v15, v11 -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[5:6], v[9:10], 1.0 -; SI-SDAG-NEXT: v_add_f64 v[9:10], s[2:3], v[0:1] -; SI-SDAG-NEXT: v_ldexp_f64 v[5:6], v[5:6], v2 -; SI-SDAG-NEXT: v_add_f64 v[1:2], v[9:10], -v[0:1] +; SI-SDAG-NEXT: v_mov_b32_e32 v13, s3 +; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[5:6], v[9:10], 1.0 ; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |s[2:3]|, v[3:4] +; SI-SDAG-NEXT: v_ldexp_f64 v[5:6], v[1:2], v11 +; SI-SDAG-NEXT: v_bfi_b32 v1, s30, v15, v13 +; SI-SDAG-NEXT: v_add_f64 v[9:10], s[2:3], v[0:1] ; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[6:7], |s[0:1]|, v[3:4] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v10, v2, v11, vcc +; SI-SDAG-NEXT: v_add_f64 v[1:2], v[9:10], -v[0:1] +; SI-SDAG-NEXT: v_mov_b32_e32 v11, 0 +; SI-SDAG-NEXT: v_cndmask_b32_e32 v10, v2, v13, vcc ; SI-SDAG-NEXT: v_mov_b32_e32 v2, s2 ; SI-SDAG-NEXT: v_cndmask_b32_e32 v9, v1, v2, vcc ; SI-SDAG-NEXT: v_add_f64 v[1:2], s[2:3], -v[9:10] -; SI-SDAG-NEXT: v_mov_b32_e32 v11, 0 -; SI-SDAG-NEXT: v_mul_f64 v[13:14], v[1:2], s[8:9] ; SI-SDAG-NEXT: v_mov_b32_e32 v12, 0x40900000 +; SI-SDAG-NEXT: v_mul_f64 v[13:14], v[1:2], s[8:9] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e32 vcc, s[4:5], v[11:12] ; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[1:2], s[10:11], v[13:14] ; SI-SDAG-NEXT: v_mov_b32_e32 v2, s1 ; SI-SDAG-NEXT: v_bfi_b32 v1, s30, v15, v2 ; SI-SDAG-NEXT: v_add_f64 v[15:16], s[0:1], v[0:1] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e32 vcc, s[4:5], v[11:12] +; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[13:14], s[12:13], v[7:8] ; SI-SDAG-NEXT: v_add_f64 v[0:1], v[15:16], -v[0:1] -; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], s[12:13], v[7:8] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[17:18], s[14:15] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[6:7] ; SI-SDAG-NEXT: v_mov_b32_e32 v2, s0 ; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[6:7] ; SI-SDAG-NEXT: v_add_f64 v[2:3], s[0:1], -v[0:1] ; SI-SDAG-NEXT: v_mov_b32_e32 v19, 0x7ff00000 ; SI-SDAG-NEXT: v_mul_f64 v[17:18], v[2:3], s[8:9] -; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[14:15] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v6, v19, v6, vcc ; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[2:3], s[10:11], v[17:18] ; SI-SDAG-NEXT: v_mov_b32_e32 v17, 0 ; SI-SDAG-NEXT: v_mov_b32_e32 v18, 0xc090cc00 ; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[4:5], s[4:5], v[17:18] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v6, v19, v6, vcc ; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[16:17] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, v6, s[4:5] ; SI-SDAG-NEXT: v_fma_f64 v[6:7], v[2:3], s[12:13], v[7:8] @@ -4063,10 +4063,10 @@ define amdgpu_ps <6 x i32> @s_exp2_v3f64(<3 x double> inreg %in) #0 { define amdgpu_ps <8 x i32> @s_exp2_v4f64(<4 x double> inreg %in) #0 { ; SI-SDAG-LABEL: s_exp2_v4f64: ; SI-SDAG: ; %bb.0: -; SI-SDAG-NEXT: s_brev_b32 s30, -2 -; SI-SDAG-NEXT: v_mov_b32_e32 v19, 0x43300000 +; SI-SDAG-NEXT: s_brev_b32 s33, -2 +; SI-SDAG-NEXT: v_mov_b32_e32 v17, 0x43300000 ; SI-SDAG-NEXT: v_mov_b32_e32 v5, s7 -; SI-SDAG-NEXT: v_bfi_b32 v1, s30, v19, v5 +; SI-SDAG-NEXT: v_bfi_b32 v1, s33, v17, v5 ; SI-SDAG-NEXT: v_mov_b32_e32 v0, 0 ; SI-SDAG-NEXT: v_add_f64 v[2:3], s[6:7], v[0:1] ; SI-SDAG-NEXT: s_mov_b32 s8, -1 @@ -4082,153 +4082,153 @@ define amdgpu_ps <8 x i32> @s_exp2_v4f64(<4 x double> inreg %in) #0 { ; SI-SDAG-NEXT: v_add_f64 v[1:2], s[6:7], -v[5:6] ; SI-SDAG-NEXT: s_mov_b32 s11, 0x3c7abc9e ; SI-SDAG-NEXT: v_mul_f64 v[7:8], v[1:2], s[10:11] -; SI-SDAG-NEXT: s_mov_b32 s12, 0xfefa39ef -; SI-SDAG-NEXT: s_mov_b32 s13, 0x3fe62e42 -; SI-SDAG-NEXT: s_mov_b32 s14, 0xfca7ab0c -; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[1:2], s[12:13], v[7:8] -; SI-SDAG-NEXT: s_mov_b32 s15, 0x3e928af3 -; SI-SDAG-NEXT: v_mov_b32_e32 v9, s14 -; SI-SDAG-NEXT: s_mov_b32 s8, 0x6a5dcb37 -; SI-SDAG-NEXT: s_mov_b32 s9, 0x3e5ade15 -; SI-SDAG-NEXT: v_mov_b32_e32 v10, s15 -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[7:8], s[8:9], v[9:10] -; SI-SDAG-NEXT: s_mov_b32 s14, 0x623fde64 -; SI-SDAG-NEXT: s_mov_b32 s15, 0x3ec71dee -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[7:8], v[1:2], s[14:15] -; SI-SDAG-NEXT: s_mov_b32 s16, 0x7c89e6b0 -; SI-SDAG-NEXT: s_mov_b32 s17, 0x3efa0199 +; SI-SDAG-NEXT: s_mov_b32 s14, 0xfefa39ef +; SI-SDAG-NEXT: s_mov_b32 s15, 0x3fe62e42 +; SI-SDAG-NEXT: s_mov_b32 s9, 0x3e928af3 +; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[1:2], s[14:15], v[7:8] +; SI-SDAG-NEXT: s_mov_b32 s8, 0xfca7ab0c +; SI-SDAG-NEXT: v_mov_b32_e32 v10, s9 +; SI-SDAG-NEXT: s_mov_b32 s12, 0x6a5dcb37 +; SI-SDAG-NEXT: s_mov_b32 s13, 0x3e5ade15 +; SI-SDAG-NEXT: v_mov_b32_e32 v9, s8 +; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[7:8], s[12:13], v[9:10] +; SI-SDAG-NEXT: s_mov_b32 s16, 0x623fde64 +; SI-SDAG-NEXT: s_mov_b32 s17, 0x3ec71dee ; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[7:8], v[1:2], s[16:17] -; SI-SDAG-NEXT: s_mov_b32 s18, 0x14761f6e -; SI-SDAG-NEXT: s_mov_b32 s19, 0x3f2a01a0 +; SI-SDAG-NEXT: s_mov_b32 s18, 0x7c89e6b0 +; SI-SDAG-NEXT: s_mov_b32 s19, 0x3efa0199 ; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[7:8], v[1:2], s[18:19] -; SI-SDAG-NEXT: s_mov_b32 s20, 0x1852b7b0 -; SI-SDAG-NEXT: s_mov_b32 s21, 0x3f56c16c +; SI-SDAG-NEXT: s_mov_b32 s20, 0x14761f6e +; SI-SDAG-NEXT: s_mov_b32 s21, 0x3f2a01a0 ; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[7:8], v[1:2], s[20:21] -; SI-SDAG-NEXT: s_mov_b32 s22, 0x11122322 -; SI-SDAG-NEXT: s_mov_b32 s23, 0x3f811111 +; SI-SDAG-NEXT: s_mov_b32 s22, 0x1852b7b0 +; SI-SDAG-NEXT: s_mov_b32 s23, 0x3f56c16c ; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[7:8], v[1:2], s[22:23] -; SI-SDAG-NEXT: s_mov_b32 s24, 0x555502a1 -; SI-SDAG-NEXT: s_mov_b32 s25, 0x3fa55555 +; SI-SDAG-NEXT: s_mov_b32 s24, 0x11122322 +; SI-SDAG-NEXT: s_mov_b32 s25, 0x3f811111 ; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[7:8], v[1:2], s[24:25] -; SI-SDAG-NEXT: s_mov_b32 s26, 0x55555511 -; SI-SDAG-NEXT: s_mov_b32 s27, 0x3fc55555 -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[7:8], v[1:2], s[26:27] -; SI-SDAG-NEXT: s_mov_b32 s28, 11 -; SI-SDAG-NEXT: s_mov_b32 s29, 0x3fe00000 +; SI-SDAG-NEXT: s_mov_b32 s26, 0x555502a1 +; SI-SDAG-NEXT: s_mov_b32 s27, 0x3fa55555 ; SI-SDAG-NEXT: v_mov_b32_e32 v15, s5 -; SI-SDAG-NEXT: v_fma_f64 v[11:12], v[7:8], v[1:2], s[28:29] -; SI-SDAG-NEXT: v_bfi_b32 v1, s30, v19, v15 +; SI-SDAG-NEXT: v_fma_f64 v[11:12], v[7:8], v[1:2], s[26:27] +; SI-SDAG-NEXT: v_bfi_b32 v1, s33, v17, v15 ; SI-SDAG-NEXT: v_add_f64 v[13:14], s[4:5], v[0:1] ; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |s[4:5]|, v[3:4] ; SI-SDAG-NEXT: v_add_f64 v[1:2], v[13:14], -v[0:1] -; SI-SDAG-NEXT: v_mov_b32_e32 v20, s3 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v14, v2, v15, vcc -; SI-SDAG-NEXT: v_mov_b32_e32 v2, s4 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v13, v1, v2, vcc +; SI-SDAG-NEXT: v_mov_b32_e32 v13, s4 +; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v15, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v13, vcc +; SI-SDAG-NEXT: v_add_f64 v[13:14], s[4:5], -v[1:2] +; SI-SDAG-NEXT: s_mov_b32 s28, 0x55555511 +; SI-SDAG-NEXT: v_mul_f64 v[15:16], v[13:14], s[10:11] +; SI-SDAG-NEXT: s_mov_b32 s29, 0x3fc55555 +; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[13:14], s[14:15], v[15:16] +; SI-SDAG-NEXT: v_fma_f64 v[11:12], v[7:8], v[11:12], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], s[12:13], v[9:10] +; SI-SDAG-NEXT: s_mov_b32 s30, 11 +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[16:17] +; SI-SDAG-NEXT: s_mov_b32 s31, 0x3fe00000 +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[18:19] +; SI-SDAG-NEXT: v_fma_f64 v[11:12], v[7:8], v[11:12], s[30:31] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[20:21] ; SI-SDAG-NEXT: v_fma_f64 v[11:12], v[7:8], v[11:12], 1.0 -; SI-SDAG-NEXT: v_add_f64 v[15:16], s[4:5], -v[13:14] -; SI-SDAG-NEXT: v_bfi_b32 v1, s30, v19, v20 -; SI-SDAG-NEXT: v_add_f64 v[17:18], s[2:3], v[0:1] +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v18, v[5:6] +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[15:16], s[22:23] ; SI-SDAG-NEXT: v_fma_f64 v[7:8], v[7:8], v[11:12], 1.0 -; SI-SDAG-NEXT: v_mul_f64 v[11:12], v[15:16], s[10:11] -; SI-SDAG-NEXT: v_add_f64 v[1:2], v[17:18], -v[0:1] +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], s[24:25] +; SI-SDAG-NEXT: v_mov_b32_e32 v20, s3 +; SI-SDAG-NEXT: v_ldexp_f64 v[7:8], v[7:8], v18 +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v18, v[1:2] +; SI-SDAG-NEXT: v_bfi_b32 v1, s33, v17, v20 +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], s[26:27] +; SI-SDAG-NEXT: v_add_f64 v[15:16], s[2:3], v[0:1] +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], s[28:29] +; SI-SDAG-NEXT: v_add_f64 v[1:2], v[15:16], -v[0:1] ; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |s[2:3]|, v[3:4] -; SI-SDAG-NEXT: v_fma_f64 v[11:12], v[15:16], s[12:13], v[11:12] +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], s[30:31] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v16, v2, v20, vcc ; SI-SDAG-NEXT: v_mov_b32_e32 v2, s2 ; SI-SDAG-NEXT: v_cndmask_b32_e32 v15, v1, v2, vcc -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[11:12], s[8:9], v[9:10] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v20, v[5:6] -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[11:12], v[1:2], s[14:15] -; SI-SDAG-NEXT: v_add_f64 v[5:6], s[2:3], -v[15:16] -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[11:12], v[1:2], s[16:17] -; SI-SDAG-NEXT: v_cmp_gt_f64_e64 vcc, |s[0:1]|, v[3:4] -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[11:12], v[1:2], s[18:19] -; SI-SDAG-NEXT: v_ldexp_f64 v[7:8], v[7:8], v20 -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[11:12], v[1:2], s[20:21] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v4, v[13:14] -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[11:12], v[1:2], s[22:23] -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[11:12], v[1:2], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[11:12], v[1:2], s[26:27] -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[11:12], v[1:2], s[28:29] -; SI-SDAG-NEXT: v_fma_f64 v[1:2], v[11:12], v[1:2], 1.0 -; SI-SDAG-NEXT: v_fma_f64 v[11:12], v[11:12], v[1:2], 1.0 -; SI-SDAG-NEXT: v_mul_f64 v[1:2], v[5:6], s[10:11] -; SI-SDAG-NEXT: v_ldexp_f64 v[11:12], v[11:12], v4 -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[5:6], s[12:13], v[1:2] +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], 1.0 +; SI-SDAG-NEXT: v_add_f64 v[1:2], s[2:3], -v[15:16] +; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[13:14], v[5:6], 1.0 +; SI-SDAG-NEXT: v_mul_f64 v[13:14], v[1:2], s[10:11] +; SI-SDAG-NEXT: v_ldexp_f64 v[5:6], v[5:6], v18 +; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[1:2], s[14:15], v[13:14] ; SI-SDAG-NEXT: v_mov_b32_e32 v2, s1 -; SI-SDAG-NEXT: v_bfi_b32 v1, s30, v19, v2 +; SI-SDAG-NEXT: v_bfi_b32 v1, s33, v17, v2 ; SI-SDAG-NEXT: v_add_f64 v[17:18], s[0:1], v[0:1] +; SI-SDAG-NEXT: v_cmp_gt_f64_e64 s[8:9], |s[0:1]|, v[3:4] ; SI-SDAG-NEXT: v_add_f64 v[0:1], v[17:18], -v[0:1] -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[5:6], s[8:9], v[9:10] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[5:6], v[17:18], s[14:15] +; SI-SDAG-NEXT: v_mov_b32_e32 v11, 0 +; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[8:9] ; SI-SDAG-NEXT: v_mov_b32_e32 v2, s0 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[8:9] ; SI-SDAG-NEXT: v_add_f64 v[2:3], s[0:1], -v[0:1] -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[5:6], v[17:18], s[16:17] -; SI-SDAG-NEXT: v_mul_f64 v[19:20], v[2:3], s[10:11] -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[5:6], v[17:18], s[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[2:3], s[12:13], v[19:20] -; SI-SDAG-NEXT: v_mov_b32_e32 v19, 0 -; SI-SDAG-NEXT: v_mov_b32_e32 v20, 0x40900000 -; SI-SDAG-NEXT: v_fma_f64 v[17:18], v[5:6], v[17:18], s[20:21] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e32 vcc, s[6:7], v[19:20] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[5:6], v[17:18], s[22:23] -; SI-SDAG-NEXT: v_mov_b32_e32 v17, 0x7ff00000 -; SI-SDAG-NEXT: v_cndmask_b32_e32 v18, v17, v8, vcc -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], s[8:9], v[9:10] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[5:6], v[13:14], s[24:25] -; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], v[8:9], s[14:15] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[5:6], v[13:14], s[26:27] +; SI-SDAG-NEXT: v_mov_b32_e32 v12, 0x40900000 +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v4, v[15:16] +; SI-SDAG-NEXT: v_mul_f64 v[15:16], v[2:3], s[10:11] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e32 vcc, s[6:7], v[11:12] +; SI-SDAG-NEXT: v_mov_b32_e32 v17, 0 +; SI-SDAG-NEXT: v_mov_b32_e32 v18, 0xc090cc00 +; SI-SDAG-NEXT: v_mov_b32_e32 v19, 0x7ff00000 +; SI-SDAG-NEXT: v_fma_f64 v[2:3], v[2:3], s[14:15], v[15:16] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], s[12:13], v[9:10] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[6:7], s[6:7], v[17:18] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v8, v19, v8, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e64 v20, 0, v8, s[6:7] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[16:17] +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], s[12:13], v[9:10] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[18:19] ; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], v[8:9], s[16:17] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[5:6], v[13:14], s[28:29] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[20:21] ; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], v[8:9], s[18:19] -; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[5:6], v[13:14], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[22:23] ; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], v[8:9], s[20:21] -; SI-SDAG-NEXT: v_fma_f64 v[4:5], v[5:6], v[13:14], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[24:25] ; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], v[8:9], s[22:23] -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v6, v[15:16] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[26:27] ; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], v[8:9], s[24:25] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[10:11], s[2:3], v[19:20] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[28:29] ; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], v[8:9], s[26:27] -; SI-SDAG-NEXT: v_ldexp_f64 v[4:5], v[4:5], v6 +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], s[30:31] ; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], v[8:9], s[28:29] -; SI-SDAG-NEXT: v_mov_b32_e32 v13, 0 -; SI-SDAG-NEXT: v_mov_b32_e32 v14, 0xc090cc00 -; SI-SDAG-NEXT: v_cndmask_b32_e64 v15, v17, v5, s[10:11] -; SI-SDAG-NEXT: v_fma_f64 v[5:6], v[2:3], v[8:9], 1.0 -; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v8, v[0:1] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[6:7], s[6:7], v[13:14] -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[8:9], s[4:5], v[19:20] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[4:5], s[4:5], v[13:14] -; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], v[5:6], 1.0 -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[2:3], s[2:3], v[13:14] +; SI-SDAG-NEXT: v_fma_f64 v[15:16], v[13:14], v[15:16], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], v[8:9], s[30:31] +; SI-SDAG-NEXT: v_fma_f64 v[13:14], v[13:14], v[15:16], 1.0 +; SI-SDAG-NEXT: v_fma_f64 v[8:9], v[2:3], v[8:9], 1.0 +; SI-SDAG-NEXT: v_cvt_i32_f64_e32 v10, v[0:1] +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[8:9], s[4:5], v[11:12] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[4:5], s[4:5], v[17:18] +; SI-SDAG-NEXT: v_ldexp_f64 v[13:14], v[13:14], v4 +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[10:11], s[2:3], v[11:12] +; SI-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], v[8:9], 1.0 +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[2:3], s[2:3], v[17:18] ; SI-SDAG-NEXT: s_and_b64 vcc, s[6:7], vcc -; SI-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v8 -; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[12:13], s[0:1], v[19:20] -; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[13:14] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v4, v19, v14, s[10:11] +; SI-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v10 +; SI-SDAG-NEXT: v_cmp_ngt_f64_e64 s[12:13], s[0:1], v[11:12] +; SI-SDAG-NEXT: v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[17:18] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v3, 0, v7, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[4:5], s[8:9] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v11, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, v4, s[2:3] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v5, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[2:3], s[10:11] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v12, v17, v12, s[8:9] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v17, v1, s[12:13] -; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc +; SI-SDAG-NEXT: v_cndmask_b32_e64 v6, v19, v6, s[8:9] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, v19, v1, s[12:13] +; SI-SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v13, vcc ; SI-SDAG-NEXT: s_and_b64 vcc, s[0:1], s[12:13] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v10, 0, v18, s[6:7] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v12, 0, v12, s[4:5] -; SI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, v15, s[2:3] +; SI-SDAG-NEXT: v_cndmask_b32_e64 v6, 0, v6, s[4:5] ; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v1, s[0:1] ; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc ; SI-SDAG-NEXT: v_readfirstlane_b32 s0, v0 -; SI-SDAG-NEXT: v_readfirstlane_b32 s2, v4 -; SI-SDAG-NEXT: v_readfirstlane_b32 s4, v5 +; SI-SDAG-NEXT: v_readfirstlane_b32 s2, v5 +; SI-SDAG-NEXT: v_readfirstlane_b32 s4, v4 ; SI-SDAG-NEXT: v_readfirstlane_b32 s6, v3 ; SI-SDAG-NEXT: v_readfirstlane_b32 s1, v1 ; SI-SDAG-NEXT: v_readfirstlane_b32 s3, v2 -; SI-SDAG-NEXT: v_readfirstlane_b32 s5, v12 -; SI-SDAG-NEXT: v_readfirstlane_b32 s7, v10 +; SI-SDAG-NEXT: v_readfirstlane_b32 s5, v6 +; SI-SDAG-NEXT: v_readfirstlane_b32 s7, v20 ; SI-SDAG-NEXT: ; return to shader part epilog ; ; SI-GISEL-LABEL: s_exp2_v4f64: diff --git a/llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll b/llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll index e8bf198f89855..398f4f512386f 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll @@ -1341,8 +1341,8 @@ define amdgpu_kernel void @fma_v4f16( ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v17, v9 -; SI-NEXT: v_cvt_f32_f16_e32 v18, v8 -; SI-NEXT: v_cvt_f32_f16_e32 v19, v7 +; SI-NEXT: v_cvt_f32_f16_e32 v19, v8 +; SI-NEXT: v_cvt_f32_f16_e32 v21, v7 ; SI-NEXT: v_cvt_f64_f32_e32 v[5:6], v3 ; SI-NEXT: v_cvt_f64_f32_e32 v[7:8], v1 ; SI-NEXT: v_cvt_f64_f32_e32 v[9:10], v10 @@ -1379,16 +1379,16 @@ define amdgpu_kernel void @fma_v4f16( ; SI-NEXT: s_cselect_b32 s4, s4, s7 ; SI-NEXT: s_and_b32 s7, s4, 7 ; SI-NEXT: s_cmp_gt_i32 s7, 5 -; SI-NEXT: v_cvt_f64_f32_e32 v[7:8], v17 -; SI-NEXT: v_cvt_f64_f32_e32 v[9:10], v18 -; SI-NEXT: v_cvt_f64_f32_e32 v[17:18], v19 +; SI-NEXT: v_cvt_f64_f32_e32 v[17:18], v17 +; SI-NEXT: v_cvt_f64_f32_e32 v[19:20], v19 +; SI-NEXT: v_cvt_f64_f32_e32 v[7:8], v21 ; SI-NEXT: s_cselect_b32 s12, 1, 0 ; SI-NEXT: s_cmp_eq_u32 s7, 3 ; SI-NEXT: s_cselect_b32 s7, 1, 0 ; SI-NEXT: s_lshr_b32 s4, s4, 2 ; SI-NEXT: s_or_b32 s7, s7, s12 ; SI-NEXT: s_add_i32 s4, s4, s7 -; SI-NEXT: v_fma_f64 v[7:8], v[17:18], v[9:10], v[7:8] +; SI-NEXT: v_fma_f64 v[7:8], v[7:8], v[19:20], v[17:18] ; SI-NEXT: s_cmp_lt_i32 s5, 31 ; SI-NEXT: s_cselect_b32 s4, s4, 0x7c00 ; SI-NEXT: s_cmp_lg_u32 s3, 0 diff --git a/llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll b/llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll index a0e2a8d017980..6473ffb2408e3 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll @@ -2930,14 +2930,14 @@ define <16 x double> @v_maximum_v16f64(<16 x double> %src0, <16 x double> %src1) ; GFX1170-LABEL: v_maximum_v16f64: ; GFX1170: ; %bb.0: ; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX1170-NEXT: s_clause 0x1b +; GFX1170-NEXT: s_clause 0x1e ; GFX1170-NEXT: scratch_load_b32 v33, off, s32 offset:8 ; GFX1170-NEXT: scratch_load_b32 v32, off, s32 offset:4 ; GFX1170-NEXT: scratch_load_b32 v35, off, s32 offset:16 ; GFX1170-NEXT: scratch_load_b32 v34, off, s32 offset:12 ; GFX1170-NEXT: scratch_load_b32 v31, off, s32 ; GFX1170-NEXT: scratch_load_b32 v37, off, s32 offset:120 -; GFX1170-NEXT: scratch_load_b32 v39, off, s32 offset:104 +; GFX1170-NEXT: scratch_load_b32 v39, off, s32 offset:112 ; GFX1170-NEXT: scratch_load_b32 v49, off, s32 offset:24 ; GFX1170-NEXT: scratch_load_b32 v48, off, s32 offset:20 ; GFX1170-NEXT: scratch_load_b32 v51, off, s32 offset:32 @@ -2958,18 +2958,17 @@ define <16 x double> @v_maximum_v16f64(<16 x double> %src0, <16 x double> %src1) ; GFX1170-NEXT: scratch_load_b32 v80, off, s32 offset:84 ; GFX1170-NEXT: scratch_load_b32 v83, off, s32 offset:96 ; GFX1170-NEXT: scratch_load_b32 v82, off, s32 offset:92 -; GFX1170-NEXT: scratch_load_b32 v38, off, s32 offset:100 -; GFX1170-NEXT: s_waitcnt vmcnt(26) -; GFX1170-NEXT: v_maximum_f64 v[0:1], v[0:1], v[32:33] -; GFX1170-NEXT: s_clause 0x2 -; GFX1170-NEXT: scratch_load_b32 v33, off, s32 offset:112 -; GFX1170-NEXT: scratch_load_b32 v32, off, s32 offset:108 +; GFX1170-NEXT: scratch_load_b32 v85, off, s32 offset:104 +; GFX1170-NEXT: scratch_load_b32 v84, off, s32 offset:100 +; GFX1170-NEXT: scratch_load_b32 v38, off, s32 offset:108 ; GFX1170-NEXT: scratch_load_b32 v36, off, s32 offset:116 -; GFX1170-NEXT: s_waitcnt vmcnt(27) -; GFX1170-NEXT: v_maximum_f64 v[2:3], v[2:3], v[34:35] +; GFX1170-NEXT: s_waitcnt vmcnt(29) +; GFX1170-NEXT: v_maximum_f64 v[0:1], v[0:1], v[32:33] ; GFX1170-NEXT: s_clause 0x1 -; GFX1170-NEXT: scratch_load_b32 v35, off, s32 offset:128 -; GFX1170-NEXT: scratch_load_b32 v34, off, s32 offset:124 +; GFX1170-NEXT: scratch_load_b32 v33, off, s32 offset:128 +; GFX1170-NEXT: scratch_load_b32 v32, off, s32 offset:124 +; GFX1170-NEXT: s_waitcnt vmcnt(29) +; GFX1170-NEXT: v_maximum_f64 v[2:3], v[2:3], v[34:35] ; GFX1170-NEXT: s_waitcnt vmcnt(24) ; GFX1170-NEXT: v_maximum_f64 v[4:5], v[4:5], v[48:49] ; GFX1170-NEXT: s_waitcnt vmcnt(22) @@ -2990,14 +2989,13 @@ define <16 x double> @v_maximum_v16f64(<16 x double> %src0, <16 x double> %src1) ; GFX1170-NEXT: v_maximum_f64 v[20:21], v[20:21], v[80:81] ; GFX1170-NEXT: s_waitcnt vmcnt(6) ; GFX1170-NEXT: v_maximum_f64 v[22:23], v[22:23], v[82:83] -; GFX1170-NEXT: s_waitcnt vmcnt(5) -; GFX1170-NEXT: v_maximum_f64 v[24:25], v[24:25], v[38:39] ; GFX1170-NEXT: s_waitcnt vmcnt(3) -; GFX1170-NEXT: v_maximum_f64 v[26:27], v[26:27], v[32:33] +; GFX1170-NEXT: v_maximum_f64 v[26:27], v[26:27], v[38:39] +; GFX1170-NEXT: v_maximum_f64 v[24:25], v[24:25], v[84:85] ; GFX1170-NEXT: s_waitcnt vmcnt(2) ; GFX1170-NEXT: v_maximum_f64 v[28:29], v[28:29], v[36:37] ; GFX1170-NEXT: s_waitcnt vmcnt(0) -; GFX1170-NEXT: v_maximum_f64 v[30:31], v[30:31], v[34:35] +; GFX1170-NEXT: v_maximum_f64 v[30:31], v[30:31], v[32:33] ; GFX1170-NEXT: s_setpc_b64 s[30:31] ; ; GFX12-LABEL: v_maximum_v16f64: diff --git a/llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll b/llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll index 1d2392f74847d..3049460dde664 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll @@ -2930,14 +2930,14 @@ define <16 x double> @v_minimum_v16f64(<16 x double> %src0, <16 x double> %src1) ; GFX1170-LABEL: v_minimum_v16f64: ; GFX1170: ; %bb.0: ; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX1170-NEXT: s_clause 0x1b +; GFX1170-NEXT: s_clause 0x1e ; GFX1170-NEXT: scratch_load_b32 v33, off, s32 offset:8 ; GFX1170-NEXT: scratch_load_b32 v32, off, s32 offset:4 ; GFX1170-NEXT: scratch_load_b32 v35, off, s32 offset:16 ; GFX1170-NEXT: scratch_load_b32 v34, off, s32 offset:12 ; GFX1170-NEXT: scratch_load_b32 v31, off, s32 ; GFX1170-NEXT: scratch_load_b32 v37, off, s32 offset:120 -; GFX1170-NEXT: scratch_load_b32 v39, off, s32 offset:104 +; GFX1170-NEXT: scratch_load_b32 v39, off, s32 offset:112 ; GFX1170-NEXT: scratch_load_b32 v49, off, s32 offset:24 ; GFX1170-NEXT: scratch_load_b32 v48, off, s32 offset:20 ; GFX1170-NEXT: scratch_load_b32 v51, off, s32 offset:32 @@ -2958,18 +2958,17 @@ define <16 x double> @v_minimum_v16f64(<16 x double> %src0, <16 x double> %src1) ; GFX1170-NEXT: scratch_load_b32 v80, off, s32 offset:84 ; GFX1170-NEXT: scratch_load_b32 v83, off, s32 offset:96 ; GFX1170-NEXT: scratch_load_b32 v82, off, s32 offset:92 -; GFX1170-NEXT: scratch_load_b32 v38, off, s32 offset:100 -; GFX1170-NEXT: s_waitcnt vmcnt(26) -; GFX1170-NEXT: v_minimum_f64 v[0:1], v[0:1], v[32:33] -; GFX1170-NEXT: s_clause 0x2 -; GFX1170-NEXT: scratch_load_b32 v33, off, s32 offset:112 -; GFX1170-NEXT: scratch_load_b32 v32, off, s32 offset:108 +; GFX1170-NEXT: scratch_load_b32 v85, off, s32 offset:104 +; GFX1170-NEXT: scratch_load_b32 v84, off, s32 offset:100 +; GFX1170-NEXT: scratch_load_b32 v38, off, s32 offset:108 ; GFX1170-NEXT: scratch_load_b32 v36, off, s32 offset:116 -; GFX1170-NEXT: s_waitcnt vmcnt(27) -; GFX1170-NEXT: v_minimum_f64 v[2:3], v[2:3], v[34:35] +; GFX1170-NEXT: s_waitcnt vmcnt(29) +; GFX1170-NEXT: v_minimum_f64 v[0:1], v[0:1], v[32:33] ; GFX1170-NEXT: s_clause 0x1 -; GFX1170-NEXT: scratch_load_b32 v35, off, s32 offset:128 -; GFX1170-NEXT: scratch_load_b32 v34, off, s32 offset:124 +; GFX1170-NEXT: scratch_load_b32 v33, off, s32 offset:128 +; GFX1170-NEXT: scratch_load_b32 v32, off, s32 offset:124 +; GFX1170-NEXT: s_waitcnt vmcnt(29) +; GFX1170-NEXT: v_minimum_f64 v[2:3], v[2:3], v[34:35] ; GFX1170-NEXT: s_waitcnt vmcnt(24) ; GFX1170-NEXT: v_minimum_f64 v[4:5], v[4:5], v[48:49] ; GFX1170-NEXT: s_waitcnt vmcnt(22) @@ -2990,14 +2989,13 @@ define <16 x double> @v_minimum_v16f64(<16 x double> %src0, <16 x double> %src1) ; GFX1170-NEXT: v_minimum_f64 v[20:21], v[20:21], v[80:81] ; GFX1170-NEXT: s_waitcnt vmcnt(6) ; GFX1170-NEXT: v_minimum_f64 v[22:23], v[22:23], v[82:83] -; GFX1170-NEXT: s_waitcnt vmcnt(5) -; GFX1170-NEXT: v_minimum_f64 v[24:25], v[24:25], v[38:39] ; GFX1170-NEXT: s_waitcnt vmcnt(3) -; GFX1170-NEXT: v_minimum_f64 v[26:27], v[26:27], v[32:33] +; GFX1170-NEXT: v_minimum_f64 v[26:27], v[26:27], v[38:39] +; GFX1170-NEXT: v_minimum_f64 v[24:25], v[24:25], v[84:85] ; GFX1170-NEXT: s_waitcnt vmcnt(2) ; GFX1170-NEXT: v_minimum_f64 v[28:29], v[28:29], v[36:37] ; GFX1170-NEXT: s_waitcnt vmcnt(0) -; GFX1170-NEXT: v_minimum_f64 v[30:31], v[30:31], v[34:35] +; GFX1170-NEXT: v_minimum_f64 v[30:31], v[30:31], v[32:33] ; GFX1170-NEXT: s_setpc_b64 s[30:31] ; ; GFX12-LABEL: v_minimum_v16f64: diff --git a/llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll b/llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll index 76b97e843d777..7c90a5e17094a 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll @@ -569,6 +569,7 @@ define amdgpu_kernel void @round_v8f64(ptr addrspace(1) %out, <8 x double> %in) ; CI-LABEL: round_v8f64: ; CI: ; %bb.0: ; CI-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x19 +; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 ; CI-NEXT: s_brev_b32 s6, -2 ; CI-NEXT: v_mov_b32_e32 v12, 0 ; CI-NEXT: s_waitcnt lgkmcnt(0) @@ -576,78 +577,76 @@ define amdgpu_kernel void @round_v8f64(ptr addrspace(1) %out, <8 x double> %in) ; CI-NEXT: v_trunc_f64_e32 v[4:5], s[8:9] ; CI-NEXT: v_add_f64 v[2:3], s[10:11], -v[0:1] ; CI-NEXT: v_add_f64 v[6:7], s[8:9], -v[4:5] -; CI-NEXT: v_cmp_ge_f64_e64 s[0:1], |v[2:3]|, 0.5 -; CI-NEXT: v_cmp_ge_f64_e64 s[2:3], |v[6:7]|, 0.5 -; CI-NEXT: s_and_b64 s[0:1], s[0:1], exec -; CI-NEXT: s_cselect_b32 s7, 0x3ff00000, 0 +; CI-NEXT: v_cmp_ge_f64_e64 s[2:3], |v[2:3]|, 0.5 +; CI-NEXT: v_cmp_ge_f64_e64 s[4:5], |v[6:7]|, 0.5 +; CI-NEXT: s_and_b64 s[2:3], s[2:3], exec +; CI-NEXT: s_cselect_b32 s2, 0x3ff00000, 0 ; CI-NEXT: v_mov_b32_e32 v8, s11 -; CI-NEXT: s_and_b64 s[0:1], s[2:3], exec -; CI-NEXT: v_mov_b32_e32 v2, s7 +; CI-NEXT: v_mov_b32_e32 v2, s2 +; CI-NEXT: s_and_b64 s[2:3], s[4:5], exec ; CI-NEXT: v_trunc_f64_e32 v[6:7], s[14:15] ; CI-NEXT: v_bfi_b32 v13, s6, v2, v8 -; CI-NEXT: s_cselect_b32 s0, 0x3ff00000, 0 +; CI-NEXT: s_cselect_b32 s2, 0x3ff00000, 0 ; CI-NEXT: v_add_f64 v[2:3], v[0:1], v[12:13] -; CI-NEXT: v_mov_b32_e32 v8, s0 +; CI-NEXT: v_mov_b32_e32 v8, s2 ; CI-NEXT: v_mov_b32_e32 v9, s9 ; CI-NEXT: v_add_f64 v[0:1], s[14:15], -v[6:7] ; CI-NEXT: v_bfi_b32 v13, s6, v8, v9 -; CI-NEXT: v_cmp_ge_f64_e64 s[0:1], |v[0:1]|, 0.5 +; CI-NEXT: v_cmp_ge_f64_e64 s[2:3], |v[0:1]|, 0.5 ; CI-NEXT: v_add_f64 v[0:1], v[4:5], v[12:13] ; CI-NEXT: v_trunc_f64_e32 v[4:5], s[12:13] -; CI-NEXT: s_and_b64 s[0:1], s[0:1], exec +; CI-NEXT: s_and_b64 s[2:3], s[2:3], exec ; CI-NEXT: v_add_f64 v[8:9], s[12:13], -v[4:5] -; CI-NEXT: s_cselect_b32 s0, 0x3ff00000, 0 -; CI-NEXT: v_mov_b32_e32 v10, s0 -; CI-NEXT: v_cmp_ge_f64_e64 s[0:1], |v[8:9]|, 0.5 +; CI-NEXT: s_cselect_b32 s2, 0x3ff00000, 0 +; CI-NEXT: v_mov_b32_e32 v10, s2 +; CI-NEXT: v_cmp_ge_f64_e64 s[2:3], |v[8:9]|, 0.5 ; CI-NEXT: v_trunc_f64_e32 v[8:9], s[18:19] ; CI-NEXT: v_mov_b32_e32 v11, s15 ; CI-NEXT: v_bfi_b32 v13, s6, v10, v11 -; CI-NEXT: s_and_b64 s[0:1], s[0:1], exec +; CI-NEXT: s_and_b64 s[2:3], s[2:3], exec ; CI-NEXT: v_add_f64 v[10:11], s[18:19], -v[8:9] -; CI-NEXT: s_cselect_b32 s0, 0x3ff00000, 0 +; CI-NEXT: s_cselect_b32 s2, 0x3ff00000, 0 ; CI-NEXT: v_add_f64 v[6:7], v[6:7], v[12:13] -; CI-NEXT: v_mov_b32_e32 v13, s0 +; CI-NEXT: v_mov_b32_e32 v13, s2 ; CI-NEXT: v_mov_b32_e32 v14, s13 -; CI-NEXT: v_cmp_ge_f64_e64 s[0:1], |v[10:11]|, 0.5 +; CI-NEXT: v_cmp_ge_f64_e64 s[2:3], |v[10:11]|, 0.5 ; CI-NEXT: v_bfi_b32 v13, s6, v13, v14 ; CI-NEXT: v_trunc_f64_e32 v[14:15], s[16:17] -; CI-NEXT: s_and_b64 s[0:1], s[0:1], exec -; CI-NEXT: s_cselect_b32 s0, 0x3ff00000, 0 +; CI-NEXT: s_and_b64 s[2:3], s[2:3], exec +; CI-NEXT: s_cselect_b32 s2, 0x3ff00000, 0 ; CI-NEXT: v_add_f64 v[10:11], s[16:17], -v[14:15] ; CI-NEXT: v_add_f64 v[4:5], v[4:5], v[12:13] -; CI-NEXT: v_mov_b32_e32 v13, s0 +; CI-NEXT: v_mov_b32_e32 v13, s2 ; CI-NEXT: v_mov_b32_e32 v16, s19 ; CI-NEXT: v_bfi_b32 v13, s6, v13, v16 -; CI-NEXT: v_cmp_ge_f64_e64 s[0:1], |v[10:11]|, 0.5 +; CI-NEXT: v_cmp_ge_f64_e64 s[2:3], |v[10:11]|, 0.5 ; CI-NEXT: v_trunc_f64_e32 v[16:17], s[22:23] -; CI-NEXT: s_and_b64 s[0:1], s[0:1], exec -; CI-NEXT: v_add_f64 v[18:19], s[22:23], -v[16:17] -; CI-NEXT: s_cselect_b32 s0, 0x3ff00000, 0 ; CI-NEXT: v_add_f64 v[10:11], v[8:9], v[12:13] -; CI-NEXT: v_mov_b32_e32 v8, s0 -; CI-NEXT: v_mov_b32_e32 v9, s17 -; CI-NEXT: v_cmp_ge_f64_e64 s[0:1], |v[18:19]|, 0.5 +; CI-NEXT: s_and_b64 s[2:3], s[2:3], exec +; CI-NEXT: v_add_f64 v[8:9], s[22:23], -v[16:17] +; CI-NEXT: s_cselect_b32 s2, 0x3ff00000, 0 +; CI-NEXT: v_mov_b32_e32 v13, s2 +; CI-NEXT: v_cmp_ge_f64_e64 s[2:3], |v[8:9]|, 0.5 +; CI-NEXT: v_mov_b32_e32 v18, s17 +; CI-NEXT: s_and_b64 s[2:3], s[2:3], exec +; CI-NEXT: v_bfi_b32 v13, s6, v13, v18 +; CI-NEXT: s_cselect_b32 s2, 0x3ff00000, 0 ; CI-NEXT: v_trunc_f64_e32 v[18:19], s[20:21] -; CI-NEXT: v_bfi_b32 v13, s6, v8, v9 ; CI-NEXT: v_add_f64 v[8:9], v[14:15], v[12:13] -; CI-NEXT: v_add_f64 v[13:14], s[20:21], -v[18:19] -; CI-NEXT: s_and_b64 s[0:1], s[0:1], exec -; CI-NEXT: v_cmp_ge_f64_e64 s[0:1], |v[13:14]|, 0.5 -; CI-NEXT: s_cselect_b32 s2, 0x3ff00000, 0 -; CI-NEXT: s_and_b64 s[0:1], s[0:1], exec -; CI-NEXT: s_cselect_b32 s0, 0x3ff00000, 0 ; CI-NEXT: v_mov_b32_e32 v13, s2 ; CI-NEXT: v_mov_b32_e32 v14, s23 -; CI-NEXT: v_mov_b32_e32 v20, s0 -; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 ; CI-NEXT: v_bfi_b32 v13, s6, v13, v14 -; CI-NEXT: v_mov_b32_e32 v21, s21 +; CI-NEXT: v_add_f64 v[14:15], s[20:21], -v[18:19] +; CI-NEXT: s_mov_b32 s3, 0xf000 +; CI-NEXT: v_cmp_ge_f64_e64 s[4:5], |v[14:15]|, 0.5 ; CI-NEXT: v_add_f64 v[14:15], v[16:17], v[12:13] -; CI-NEXT: v_bfi_b32 v13, s6, v20, v21 +; CI-NEXT: s_and_b64 s[4:5], s[4:5], exec +; CI-NEXT: s_cselect_b32 s2, 0x3ff00000, 0 +; CI-NEXT: v_mov_b32_e32 v13, s2 +; CI-NEXT: v_mov_b32_e32 v16, s21 +; CI-NEXT: v_bfi_b32 v13, s6, v13, v16 ; CI-NEXT: v_add_f64 v[12:13], v[18:19], v[12:13] -; CI-NEXT: s_mov_b32 s3, 0xf000 ; CI-NEXT: s_mov_b32 s2, -1 -; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48 ; CI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32 ; CI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16 diff --git a/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll b/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll index 589ea74948d2a..58f4c9e957faf 100644 --- a/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll +++ b/llvm/test/CodeGen/AMDGPU/load-constant-i1.ll @@ -2208,41 +2208,41 @@ define amdgpu_kernel void @constant_sextload_v16i1_to_v16i32(ptr addrspace(1) %o ; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v1, s3 -; GFX8-NEXT: flat_load_ushort v18, v[0:1] +; GFX8-NEXT: flat_load_ushort v20, v[0:1] ; GFX8-NEXT: s_add_u32 s2, s0, 48 ; GFX8-NEXT: s_addc_u32 s3, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v9, s3 -; GFX8-NEXT: v_mov_b32_e32 v8, s2 +; GFX8-NEXT: v_mov_b32_e32 v15, s3 +; GFX8-NEXT: v_mov_b32_e32 v14, s2 ; GFX8-NEXT: s_add_u32 s2, s0, 32 ; GFX8-NEXT: v_mov_b32_e32 v13, s1 ; GFX8-NEXT: s_addc_u32 s3, s1, 0 ; GFX8-NEXT: v_mov_b32_e32 v12, s0 ; GFX8-NEXT: s_add_u32 s0, s0, 16 -; GFX8-NEXT: v_mov_b32_e32 v15, s3 +; GFX8-NEXT: v_mov_b32_e32 v17, s3 ; GFX8-NEXT: s_addc_u32 s1, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v14, s2 -; GFX8-NEXT: v_mov_b32_e32 v17, s1 -; GFX8-NEXT: v_mov_b32_e32 v16, s0 +; GFX8-NEXT: v_mov_b32_e32 v16, s2 +; GFX8-NEXT: v_mov_b32_e32 v19, s1 +; GFX8-NEXT: v_mov_b32_e32 v18, s0 ; GFX8-NEXT: s_waitcnt vmcnt(0) -; GFX8-NEXT: v_bfe_i32 v7, v18, 15, 1 -; GFX8-NEXT: v_bfe_i32 v6, v18, 14, 1 -; GFX8-NEXT: v_bfe_i32 v5, v18, 13, 1 -; GFX8-NEXT: v_bfe_i32 v4, v18, 12, 1 -; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[4:7] -; GFX8-NEXT: v_bfe_i32 v11, v18, 11, 1 -; GFX8-NEXT: v_bfe_i32 v10, v18, 10, 1 -; GFX8-NEXT: v_bfe_i32 v9, v18, 9, 1 -; GFX8-NEXT: v_bfe_i32 v8, v18, 8, 1 -; GFX8-NEXT: v_bfe_i32 v3, v18, 3, 1 -; GFX8-NEXT: v_bfe_i32 v2, v18, 2, 1 -; GFX8-NEXT: v_bfe_i32 v1, v18, 1, 1 -; GFX8-NEXT: v_bfe_i32 v0, v18, 0, 1 -; GFX8-NEXT: v_bfe_i32 v7, v18, 7, 1 -; GFX8-NEXT: v_bfe_i32 v6, v18, 6, 1 -; GFX8-NEXT: v_bfe_i32 v5, v18, 5, 1 -; GFX8-NEXT: v_bfe_i32 v4, v18, 4, 1 +; GFX8-NEXT: v_bfe_i32 v11, v20, 15, 1 +; GFX8-NEXT: v_bfe_i32 v10, v20, 14, 1 +; GFX8-NEXT: v_bfe_i32 v9, v20, 13, 1 +; GFX8-NEXT: v_bfe_i32 v8, v20, 12, 1 ; GFX8-NEXT: flat_store_dwordx4 v[14:15], v[8:11] -; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[4:7] +; GFX8-NEXT: v_bfe_i32 v3, v20, 3, 1 +; GFX8-NEXT: v_bfe_i32 v11, v20, 11, 1 +; GFX8-NEXT: v_bfe_i32 v10, v20, 10, 1 +; GFX8-NEXT: v_bfe_i32 v9, v20, 9, 1 +; GFX8-NEXT: v_bfe_i32 v8, v20, 8, 1 +; GFX8-NEXT: v_bfe_i32 v2, v20, 2, 1 +; GFX8-NEXT: v_bfe_i32 v1, v20, 1, 1 +; GFX8-NEXT: v_bfe_i32 v0, v20, 0, 1 +; GFX8-NEXT: v_bfe_i32 v7, v20, 7, 1 +; GFX8-NEXT: v_bfe_i32 v6, v20, 6, 1 +; GFX8-NEXT: v_bfe_i32 v5, v20, 5, 1 +; GFX8-NEXT: v_bfe_i32 v4, v20, 4, 1 +; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[8:11] +; GFX8-NEXT: flat_store_dwordx4 v[18:19], v[4:7] ; GFX8-NEXT: flat_store_dwordx4 v[12:13], v[0:3] ; GFX8-NEXT: s_endpgm ; @@ -3278,164 +3278,164 @@ define amdgpu_kernel void @constant_zextload_v64i1_to_v64i32(ptr addrspace(1) %o ; GFX6: ; %bb.0: ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 ; GFX6-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 -; GFX6-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NEXT: s_bfe_u32 s4, s2, 0x10003 -; GFX6-NEXT: s_bfe_u32 s5, s2, 0x10001 -; GFX6-NEXT: s_bfe_u32 s6, s2, 0x10007 -; GFX6-NEXT: s_bfe_u32 s7, s2, 0x10005 -; GFX6-NEXT: s_bfe_u32 s8, s2, 0x1000b -; GFX6-NEXT: s_bfe_u32 s9, s2, 0x10009 -; GFX6-NEXT: s_bfe_u32 s10, s2, 0x1000f -; GFX6-NEXT: s_bfe_u32 s11, s2, 0x1000d -; GFX6-NEXT: s_bfe_u32 s12, s2, 0x10013 -; GFX6-NEXT: s_bfe_u32 s13, s2, 0x10011 -; GFX6-NEXT: s_bfe_u32 s14, s2, 0x10017 -; GFX6-NEXT: s_bfe_u32 s15, s2, 0x10015 -; GFX6-NEXT: s_bfe_u32 s16, s2, 0x1001b -; GFX6-NEXT: s_bfe_u32 s17, s2, 0x10019 -; GFX6-NEXT: s_lshr_b32 s18, s2, 31 -; GFX6-NEXT: s_bfe_u32 s19, s2, 0x1001d -; GFX6-NEXT: s_bfe_u32 s20, s3, 0x10003 -; GFX6-NEXT: s_bfe_u32 s21, s3, 0x10001 -; GFX6-NEXT: s_bfe_u32 s22, s3, 0x10007 -; GFX6-NEXT: s_bfe_u32 s23, s3, 0x10005 -; GFX6-NEXT: s_bfe_u32 s24, s3, 0x1000b -; GFX6-NEXT: s_bfe_u32 s25, s3, 0x10009 -; GFX6-NEXT: s_bfe_u32 s26, s3, 0x1000f -; GFX6-NEXT: s_bfe_u32 s27, s3, 0x1000d -; GFX6-NEXT: s_bfe_u32 s28, s3, 0x10013 -; GFX6-NEXT: s_bfe_u32 s29, s3, 0x10011 -; GFX6-NEXT: s_bfe_u32 s30, s3, 0x10017 -; GFX6-NEXT: s_bfe_u32 s31, s3, 0x10015 -; GFX6-NEXT: s_bfe_u32 s33, s3, 0x1001b -; GFX6-NEXT: s_bfe_u32 s34, s3, 0x10019 -; GFX6-NEXT: s_lshr_b32 s35, s3, 31 -; GFX6-NEXT: s_bfe_u32 s36, s3, 0x1001d -; GFX6-NEXT: s_and_b32 s37, s2, 1 -; GFX6-NEXT: s_bfe_u32 s38, s2, 0x10002 -; GFX6-NEXT: s_bfe_u32 s39, s2, 0x10006 -; GFX6-NEXT: s_bfe_u32 s40, s2, 0x10004 -; GFX6-NEXT: s_bfe_u32 s41, s2, 0x1000a -; GFX6-NEXT: s_bfe_u32 s42, s2, 0x10008 -; GFX6-NEXT: s_bfe_u32 s43, s2, 0x1000e -; GFX6-NEXT: s_bfe_u32 s44, s2, 0x1000c -; GFX6-NEXT: s_bfe_u32 s45, s2, 0x10012 -; GFX6-NEXT: s_bfe_u32 s46, s2, 0x10010 -; GFX6-NEXT: s_bfe_u32 s47, s2, 0x10016 -; GFX6-NEXT: s_bfe_u32 s48, s2, 0x10014 -; GFX6-NEXT: s_bfe_u32 s49, s2, 0x1001a -; GFX6-NEXT: s_bfe_u32 s50, s2, 0x10018 -; GFX6-NEXT: s_bfe_u32 s51, s2, 0x1001e -; GFX6-NEXT: s_bfe_u32 s52, s2, 0x1001c -; GFX6-NEXT: s_and_b32 s53, s3, 1 -; GFX6-NEXT: s_bfe_u32 s54, s3, 0x10002 -; GFX6-NEXT: s_bfe_u32 s55, s3, 0x10006 -; GFX6-NEXT: s_bfe_u32 s56, s3, 0x10004 -; GFX6-NEXT: s_bfe_u32 s57, s3, 0x1000a -; GFX6-NEXT: s_bfe_u32 s58, s3, 0x10008 -; GFX6-NEXT: s_bfe_u32 s2, s3, 0x1000e -; GFX6-NEXT: s_bfe_u32 s59, s3, 0x1000c -; GFX6-NEXT: s_bfe_u32 s60, s3, 0x10012 -; GFX6-NEXT: s_bfe_u32 s61, s3, 0x10010 -; GFX6-NEXT: s_bfe_u32 s62, s3, 0x10016 -; GFX6-NEXT: s_bfe_u32 s63, s3, 0x10014 -; GFX6-NEXT: s_bfe_u32 s64, s3, 0x1001a -; GFX6-NEXT: s_bfe_u32 s65, s3, 0x10018 -; GFX6-NEXT: s_bfe_u32 s66, s3, 0x1001e -; GFX6-NEXT: s_bfe_u32 s3, s3, 0x1001c -; GFX6-NEXT: v_mov_b32_e32 v0, s3 -; GFX6-NEXT: v_mov_b32_e32 v1, s36 -; GFX6-NEXT: v_mov_b32_e32 v2, s66 -; GFX6-NEXT: v_mov_b32_e32 v3, s35 -; GFX6-NEXT: v_mov_b32_e32 v18, s2 +; GFX6-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0 ; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s2, -1 -; GFX6-NEXT: v_mov_b32_e32 v4, s65 -; GFX6-NEXT: v_mov_b32_e32 v5, s34 -; GFX6-NEXT: v_mov_b32_e32 v6, s64 -; GFX6-NEXT: v_mov_b32_e32 v7, s33 +; GFX6-NEXT: s_waitcnt lgkmcnt(0) +; GFX6-NEXT: s_bfe_u32 s40, s5, 0x1001d +; GFX6-NEXT: s_lshr_b32 s39, s5, 31 +; GFX6-NEXT: s_bfe_u32 s44, s5, 0x1001c +; GFX6-NEXT: v_mov_b32_e32 v1, s40 +; GFX6-NEXT: s_bfe_u32 s40, s5, 0x1001e +; GFX6-NEXT: s_bfe_u32 s29, s5, 0x10009 +; GFX6-NEXT: s_bfe_u32 s30, s5, 0x1000f +; GFX6-NEXT: s_bfe_u32 s38, s5, 0x10019 +; GFX6-NEXT: v_mov_b32_e32 v0, s44 +; GFX6-NEXT: v_mov_b32_e32 v2, s40 +; GFX6-NEXT: v_mov_b32_e32 v3, s39 +; GFX6-NEXT: s_bfe_u32 s28, s5, 0x1000b +; GFX6-NEXT: s_bfe_u32 s31, s5, 0x1000d +; GFX6-NEXT: s_bfe_u32 s33, s5, 0x10013 +; GFX6-NEXT: s_bfe_u32 s34, s5, 0x10011 +; GFX6-NEXT: s_bfe_u32 s35, s5, 0x10017 +; GFX6-NEXT: s_bfe_u32 s36, s5, 0x10015 +; GFX6-NEXT: s_bfe_u32 s37, s5, 0x1001b +; GFX6-NEXT: s_bfe_u32 s39, s5, 0x10018 +; GFX6-NEXT: v_mov_b32_e32 v5, s38 +; GFX6-NEXT: s_bfe_u32 s38, s5, 0x1001a +; GFX6-NEXT: v_mov_b32_e32 v19, s30 +; GFX6-NEXT: s_bfe_u32 s30, s5, 0x10008 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s58 -; GFX6-NEXT: v_mov_b32_e32 v1, s25 -; GFX6-NEXT: v_mov_b32_e32 v2, s57 -; GFX6-NEXT: v_mov_b32_e32 v3, s24 -; GFX6-NEXT: v_mov_b32_e32 v8, s63 -; GFX6-NEXT: v_mov_b32_e32 v9, s31 -; GFX6-NEXT: v_mov_b32_e32 v10, s62 -; GFX6-NEXT: v_mov_b32_e32 v11, s30 -; GFX6-NEXT: v_mov_b32_e32 v12, s61 -; GFX6-NEXT: v_mov_b32_e32 v13, s29 -; GFX6-NEXT: v_mov_b32_e32 v14, s60 -; GFX6-NEXT: v_mov_b32_e32 v15, s28 -; GFX6-NEXT: v_mov_b32_e32 v16, s59 -; GFX6-NEXT: v_mov_b32_e32 v17, s27 -; GFX6-NEXT: v_mov_b32_e32 v19, s26 +; GFX6-NEXT: v_mov_b32_e32 v1, s29 +; GFX6-NEXT: s_bfe_u32 s29, s5, 0x1000a +; GFX6-NEXT: s_bfe_u32 s24, s5, 0x10003 +; GFX6-NEXT: s_bfe_u32 s25, s5, 0x10001 +; GFX6-NEXT: s_bfe_u32 s26, s5, 0x10007 +; GFX6-NEXT: s_bfe_u32 s27, s5, 0x10005 +; GFX6-NEXT: v_mov_b32_e32 v4, s39 +; GFX6-NEXT: v_mov_b32_e32 v6, s38 +; GFX6-NEXT: v_mov_b32_e32 v7, s37 +; GFX6-NEXT: s_bfe_u32 s37, s5, 0x10014 +; GFX6-NEXT: v_mov_b32_e32 v9, s36 +; GFX6-NEXT: s_bfe_u32 s36, s5, 0x10016 +; GFX6-NEXT: v_mov_b32_e32 v11, s35 +; GFX6-NEXT: s_bfe_u32 s35, s5, 0x10010 +; GFX6-NEXT: v_mov_b32_e32 v13, s34 +; GFX6-NEXT: s_bfe_u32 s34, s5, 0x10012 +; GFX6-NEXT: v_mov_b32_e32 v15, s33 +; GFX6-NEXT: s_bfe_u32 s33, s5, 0x1000c +; GFX6-NEXT: v_mov_b32_e32 v17, s31 +; GFX6-NEXT: s_bfe_u32 s31, s5, 0x1000e +; GFX6-NEXT: v_mov_b32_e32 v0, s30 +; GFX6-NEXT: s_and_b32 s30, s5, 1 +; GFX6-NEXT: v_mov_b32_e32 v2, s29 +; GFX6-NEXT: s_bfe_u32 s29, s5, 0x10002 +; GFX6-NEXT: v_mov_b32_e32 v3, s28 +; GFX6-NEXT: s_bfe_u32 s28, s5, 0x10006 +; GFX6-NEXT: s_bfe_u32 s5, s5, 0x10004 +; GFX6-NEXT: v_mov_b32_e32 v8, s37 +; GFX6-NEXT: v_mov_b32_e32 v10, s36 +; GFX6-NEXT: v_mov_b32_e32 v12, s35 +; GFX6-NEXT: v_mov_b32_e32 v14, s34 +; GFX6-NEXT: v_mov_b32_e32 v16, s33 +; GFX6-NEXT: v_mov_b32_e32 v18, s31 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:224 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:208 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192 ; GFX6-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:176 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s56 +; GFX6-NEXT: v_mov_b32_e32 v0, s5 +; GFX6-NEXT: v_mov_b32_e32 v1, s27 +; GFX6-NEXT: v_mov_b32_e32 v2, s28 +; GFX6-NEXT: v_mov_b32_e32 v3, s26 +; GFX6-NEXT: s_bfe_u32 s6, s4, 0x10003 +; GFX6-NEXT: s_bfe_u32 s7, s4, 0x10001 +; GFX6-NEXT: s_bfe_u32 s8, s4, 0x10007 +; GFX6-NEXT: s_bfe_u32 s9, s4, 0x10005 +; GFX6-NEXT: s_bfe_u32 s10, s4, 0x1000b +; GFX6-NEXT: s_bfe_u32 s11, s4, 0x10009 +; GFX6-NEXT: s_bfe_u32 s12, s4, 0x1000f +; GFX6-NEXT: s_bfe_u32 s15, s4, 0x1000d +; GFX6-NEXT: s_bfe_u32 s16, s4, 0x10013 +; GFX6-NEXT: s_bfe_u32 s17, s4, 0x10011 +; GFX6-NEXT: s_bfe_u32 s18, s4, 0x10017 +; GFX6-NEXT: s_bfe_u32 s19, s4, 0x10015 +; GFX6-NEXT: s_bfe_u32 s20, s4, 0x1001b +; GFX6-NEXT: s_bfe_u32 s21, s4, 0x10019 +; GFX6-NEXT: s_lshr_b32 s22, s4, 31 +; GFX6-NEXT: s_bfe_u32 s23, s4, 0x1001d +; GFX6-NEXT: s_and_b32 s14, s4, 1 +; GFX6-NEXT: s_bfe_u32 s13, s4, 0x10002 +; GFX6-NEXT: s_bfe_u32 s41, s4, 0x10006 +; GFX6-NEXT: s_bfe_u32 s42, s4, 0x10004 +; GFX6-NEXT: s_bfe_u32 s43, s4, 0x1000a +; GFX6-NEXT: s_bfe_u32 s44, s4, 0x10008 +; GFX6-NEXT: s_bfe_u32 s40, s4, 0x1000e +; GFX6-NEXT: s_bfe_u32 s39, s4, 0x1000c +; GFX6-NEXT: s_bfe_u32 s38, s4, 0x10012 +; GFX6-NEXT: s_bfe_u32 s37, s4, 0x10010 +; GFX6-NEXT: s_bfe_u32 s36, s4, 0x10016 +; GFX6-NEXT: s_bfe_u32 s35, s4, 0x10014 +; GFX6-NEXT: s_bfe_u32 s34, s4, 0x1001a +; GFX6-NEXT: s_bfe_u32 s33, s4, 0x10018 +; GFX6-NEXT: s_bfe_u32 s31, s4, 0x1001e +; GFX6-NEXT: s_bfe_u32 s4, s4, 0x1001c +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 +; GFX6-NEXT: s_waitcnt expcnt(0) +; GFX6-NEXT: v_mov_b32_e32 v0, s30 +; GFX6-NEXT: v_mov_b32_e32 v1, s25 +; GFX6-NEXT: v_mov_b32_e32 v2, s29 +; GFX6-NEXT: v_mov_b32_e32 v3, s24 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 +; GFX6-NEXT: s_waitcnt expcnt(0) +; GFX6-NEXT: v_mov_b32_e32 v0, s4 ; GFX6-NEXT: v_mov_b32_e32 v1, s23 -; GFX6-NEXT: v_mov_b32_e32 v2, s55 +; GFX6-NEXT: v_mov_b32_e32 v2, s31 ; GFX6-NEXT: v_mov_b32_e32 v3, s22 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s53 +; GFX6-NEXT: v_mov_b32_e32 v0, s33 ; GFX6-NEXT: v_mov_b32_e32 v1, s21 -; GFX6-NEXT: v_mov_b32_e32 v2, s54 +; GFX6-NEXT: v_mov_b32_e32 v2, s34 ; GFX6-NEXT: v_mov_b32_e32 v3, s20 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s52 +; GFX6-NEXT: v_mov_b32_e32 v0, s35 ; GFX6-NEXT: v_mov_b32_e32 v1, s19 -; GFX6-NEXT: v_mov_b32_e32 v2, s51 +; GFX6-NEXT: v_mov_b32_e32 v2, s36 ; GFX6-NEXT: v_mov_b32_e32 v3, s18 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s50 +; GFX6-NEXT: v_mov_b32_e32 v0, s37 ; GFX6-NEXT: v_mov_b32_e32 v1, s17 -; GFX6-NEXT: v_mov_b32_e32 v2, s49 +; GFX6-NEXT: v_mov_b32_e32 v2, s38 ; GFX6-NEXT: v_mov_b32_e32 v3, s16 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s48 +; GFX6-NEXT: v_mov_b32_e32 v0, s39 ; GFX6-NEXT: v_mov_b32_e32 v1, s15 -; GFX6-NEXT: v_mov_b32_e32 v2, s47 -; GFX6-NEXT: v_mov_b32_e32 v3, s14 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 -; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s46 -; GFX6-NEXT: v_mov_b32_e32 v1, s13 -; GFX6-NEXT: v_mov_b32_e32 v2, s45 +; GFX6-NEXT: v_mov_b32_e32 v2, s40 ; GFX6-NEXT: v_mov_b32_e32 v3, s12 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 ; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_mov_b32_e32 v0, s44 ; GFX6-NEXT: v_mov_b32_e32 v1, s11 ; GFX6-NEXT: v_mov_b32_e32 v2, s43 ; GFX6-NEXT: v_mov_b32_e32 v3, s10 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 ; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_mov_b32_e32 v0, s42 ; GFX6-NEXT: v_mov_b32_e32 v1, s9 ; GFX6-NEXT: v_mov_b32_e32 v2, s41 ; GFX6-NEXT: v_mov_b32_e32 v3, s8 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s40 +; GFX6-NEXT: v_mov_b32_e32 v0, s14 ; GFX6-NEXT: v_mov_b32_e32 v1, s7 -; GFX6-NEXT: v_mov_b32_e32 v2, s39 +; GFX6-NEXT: v_mov_b32_e32 v2, s13 ; GFX6-NEXT: v_mov_b32_e32 v3, s6 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 -; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s37 -; GFX6-NEXT: v_mov_b32_e32 v1, s5 -; GFX6-NEXT: v_mov_b32_e32 v2, s38 -; GFX6-NEXT: v_mov_b32_e32 v3, s4 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GFX6-NEXT: s_endpgm ; @@ -4083,164 +4083,164 @@ define amdgpu_kernel void @constant_sextload_v64i1_to_v64i32(ptr addrspace(1) %o ; GFX6: ; %bb.0: ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 ; GFX6-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 -; GFX6-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NEXT: s_bfe_i32 s4, s2, 0x10003 -; GFX6-NEXT: s_bfe_i32 s5, s2, 0x10002 -; GFX6-NEXT: s_bfe_i32 s6, s2, 0x10001 -; GFX6-NEXT: s_bfe_i32 s7, s2, 0x10000 -; GFX6-NEXT: s_bfe_i32 s8, s2, 0x10007 -; GFX6-NEXT: s_bfe_i32 s9, s2, 0x10006 -; GFX6-NEXT: s_bfe_i32 s10, s2, 0x10005 -; GFX6-NEXT: s_bfe_i32 s11, s2, 0x10004 -; GFX6-NEXT: s_bfe_i32 s12, s2, 0x1000b -; GFX6-NEXT: s_bfe_i32 s13, s2, 0x1000a -; GFX6-NEXT: s_bfe_i32 s14, s2, 0x10009 -; GFX6-NEXT: s_bfe_i32 s15, s2, 0x10008 -; GFX6-NEXT: s_bfe_i32 s16, s2, 0x1000f -; GFX6-NEXT: s_bfe_i32 s17, s2, 0x1000e -; GFX6-NEXT: s_bfe_i32 s18, s2, 0x1000d -; GFX6-NEXT: s_bfe_i32 s19, s2, 0x1000c -; GFX6-NEXT: s_bfe_i32 s20, s2, 0x10013 -; GFX6-NEXT: s_bfe_i32 s21, s2, 0x10012 -; GFX6-NEXT: s_bfe_i32 s22, s2, 0x10011 -; GFX6-NEXT: s_bfe_i32 s23, s2, 0x10010 -; GFX6-NEXT: s_bfe_i32 s24, s2, 0x10017 -; GFX6-NEXT: s_bfe_i32 s25, s2, 0x10016 -; GFX6-NEXT: s_bfe_i32 s26, s2, 0x10015 -; GFX6-NEXT: s_bfe_i32 s27, s2, 0x10014 -; GFX6-NEXT: s_bfe_i32 s28, s2, 0x1001b -; GFX6-NEXT: s_bfe_i32 s29, s2, 0x1001a -; GFX6-NEXT: s_bfe_i32 s30, s2, 0x10019 -; GFX6-NEXT: s_bfe_i32 s31, s2, 0x10018 -; GFX6-NEXT: s_ashr_i32 s33, s2, 31 -; GFX6-NEXT: s_bfe_i32 s34, s2, 0x1001e -; GFX6-NEXT: s_bfe_i32 s35, s2, 0x1001d -; GFX6-NEXT: s_bfe_i32 s36, s2, 0x1001c -; GFX6-NEXT: s_bfe_i32 s37, s3, 0x10003 -; GFX6-NEXT: s_bfe_i32 s38, s3, 0x10002 -; GFX6-NEXT: s_bfe_i32 s39, s3, 0x10001 -; GFX6-NEXT: s_bfe_i32 s40, s3, 0x10000 -; GFX6-NEXT: s_bfe_i32 s41, s3, 0x10007 -; GFX6-NEXT: s_bfe_i32 s42, s3, 0x10006 -; GFX6-NEXT: s_bfe_i32 s43, s3, 0x10005 -; GFX6-NEXT: s_bfe_i32 s44, s3, 0x10004 -; GFX6-NEXT: s_bfe_i32 s45, s3, 0x1000b -; GFX6-NEXT: s_bfe_i32 s46, s3, 0x1000a -; GFX6-NEXT: s_bfe_i32 s47, s3, 0x10009 -; GFX6-NEXT: s_bfe_i32 s48, s3, 0x10008 -; GFX6-NEXT: s_bfe_i32 s49, s3, 0x1000f -; GFX6-NEXT: s_bfe_i32 s2, s3, 0x1000e -; GFX6-NEXT: s_bfe_i32 s50, s3, 0x1000d -; GFX6-NEXT: s_bfe_i32 s51, s3, 0x1000c -; GFX6-NEXT: s_bfe_i32 s52, s3, 0x10013 -; GFX6-NEXT: s_bfe_i32 s53, s3, 0x10012 -; GFX6-NEXT: s_bfe_i32 s54, s3, 0x10011 -; GFX6-NEXT: s_bfe_i32 s55, s3, 0x10010 -; GFX6-NEXT: s_bfe_i32 s56, s3, 0x10017 -; GFX6-NEXT: s_bfe_i32 s57, s3, 0x10016 -; GFX6-NEXT: s_bfe_i32 s58, s3, 0x10015 -; GFX6-NEXT: s_bfe_i32 s59, s3, 0x10014 -; GFX6-NEXT: s_bfe_i32 s60, s3, 0x1001b -; GFX6-NEXT: s_bfe_i32 s61, s3, 0x1001a -; GFX6-NEXT: s_bfe_i32 s62, s3, 0x10019 -; GFX6-NEXT: s_bfe_i32 s63, s3, 0x10018 -; GFX6-NEXT: s_ashr_i32 s64, s3, 31 -; GFX6-NEXT: s_bfe_i32 s65, s3, 0x1001e -; GFX6-NEXT: s_bfe_i32 s66, s3, 0x1001d -; GFX6-NEXT: s_bfe_i32 s3, s3, 0x1001c -; GFX6-NEXT: v_mov_b32_e32 v0, s3 -; GFX6-NEXT: v_mov_b32_e32 v1, s66 -; GFX6-NEXT: v_mov_b32_e32 v2, s65 -; GFX6-NEXT: v_mov_b32_e32 v3, s64 -; GFX6-NEXT: v_mov_b32_e32 v18, s2 +; GFX6-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0 ; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s2, -1 -; GFX6-NEXT: v_mov_b32_e32 v4, s63 -; GFX6-NEXT: v_mov_b32_e32 v5, s62 -; GFX6-NEXT: v_mov_b32_e32 v6, s61 -; GFX6-NEXT: v_mov_b32_e32 v7, s60 +; GFX6-NEXT: s_waitcnt lgkmcnt(0) +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x1001c +; GFX6-NEXT: v_mov_b32_e32 v0, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x1001d +; GFX6-NEXT: v_mov_b32_e32 v1, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x1001e +; GFX6-NEXT: v_mov_b32_e32 v2, s44 +; GFX6-NEXT: s_ashr_i32 s44, s5, 31 +; GFX6-NEXT: v_mov_b32_e32 v3, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10018 +; GFX6-NEXT: v_mov_b32_e32 v4, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10019 +; GFX6-NEXT: v_mov_b32_e32 v5, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x1001a +; GFX6-NEXT: v_mov_b32_e32 v6, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x1001b +; GFX6-NEXT: v_mov_b32_e32 v7, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10014 +; GFX6-NEXT: v_mov_b32_e32 v8, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10015 +; GFX6-NEXT: v_mov_b32_e32 v9, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10016 +; GFX6-NEXT: v_mov_b32_e32 v10, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10017 +; GFX6-NEXT: v_mov_b32_e32 v11, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10010 +; GFX6-NEXT: v_mov_b32_e32 v12, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10011 +; GFX6-NEXT: v_mov_b32_e32 v13, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10012 +; GFX6-NEXT: v_mov_b32_e32 v14, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10013 +; GFX6-NEXT: v_mov_b32_e32 v15, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x1000c +; GFX6-NEXT: v_mov_b32_e32 v16, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x1000d +; GFX6-NEXT: v_mov_b32_e32 v17, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x1000e +; GFX6-NEXT: v_mov_b32_e32 v18, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x1000f +; GFX6-NEXT: v_mov_b32_e32 v19, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10008 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s48 -; GFX6-NEXT: v_mov_b32_e32 v1, s47 -; GFX6-NEXT: v_mov_b32_e32 v2, s46 -; GFX6-NEXT: v_mov_b32_e32 v3, s45 -; GFX6-NEXT: v_mov_b32_e32 v8, s59 -; GFX6-NEXT: v_mov_b32_e32 v9, s58 -; GFX6-NEXT: v_mov_b32_e32 v10, s57 -; GFX6-NEXT: v_mov_b32_e32 v11, s56 -; GFX6-NEXT: v_mov_b32_e32 v12, s55 -; GFX6-NEXT: v_mov_b32_e32 v13, s54 -; GFX6-NEXT: v_mov_b32_e32 v14, s53 -; GFX6-NEXT: v_mov_b32_e32 v15, s52 -; GFX6-NEXT: v_mov_b32_e32 v16, s51 -; GFX6-NEXT: v_mov_b32_e32 v17, s50 -; GFX6-NEXT: v_mov_b32_e32 v19, s49 +; GFX6-NEXT: v_mov_b32_e32 v0, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10009 +; GFX6-NEXT: v_mov_b32_e32 v1, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x1000a +; GFX6-NEXT: v_mov_b32_e32 v2, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x1000b +; GFX6-NEXT: s_bfe_i32 s38, s5, 0x10003 +; GFX6-NEXT: s_bfe_i32 s39, s5, 0x10002 +; GFX6-NEXT: s_bfe_i32 s40, s5, 0x10001 +; GFX6-NEXT: s_bfe_i32 s41, s5, 0x10000 +; GFX6-NEXT: s_bfe_i32 s42, s5, 0x10007 +; GFX6-NEXT: s_bfe_i32 s43, s5, 0x10006 +; GFX6-NEXT: v_mov_b32_e32 v3, s44 +; GFX6-NEXT: s_bfe_i32 s44, s5, 0x10005 +; GFX6-NEXT: s_bfe_i32 s5, s5, 0x10004 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:224 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:208 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192 ; GFX6-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:176 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s44 -; GFX6-NEXT: v_mov_b32_e32 v1, s43 -; GFX6-NEXT: v_mov_b32_e32 v2, s42 -; GFX6-NEXT: v_mov_b32_e32 v3, s41 +; GFX6-NEXT: v_mov_b32_e32 v0, s5 +; GFX6-NEXT: v_mov_b32_e32 v1, s44 +; GFX6-NEXT: v_mov_b32_e32 v2, s43 +; GFX6-NEXT: v_mov_b32_e32 v3, s42 +; GFX6-NEXT: s_bfe_i32 s6, s4, 0x10003 +; GFX6-NEXT: s_bfe_i32 s7, s4, 0x10002 +; GFX6-NEXT: s_bfe_i32 s8, s4, 0x10001 +; GFX6-NEXT: s_bfe_i32 s9, s4, 0x10000 +; GFX6-NEXT: s_bfe_i32 s10, s4, 0x10007 +; GFX6-NEXT: s_bfe_i32 s11, s4, 0x10006 +; GFX6-NEXT: s_bfe_i32 s12, s4, 0x10005 +; GFX6-NEXT: s_bfe_i32 s13, s4, 0x10004 +; GFX6-NEXT: s_bfe_i32 s14, s4, 0x1000b +; GFX6-NEXT: s_bfe_i32 s15, s4, 0x1000a +; GFX6-NEXT: s_bfe_i32 s16, s4, 0x10009 +; GFX6-NEXT: s_bfe_i32 s17, s4, 0x10008 +; GFX6-NEXT: s_bfe_i32 s18, s4, 0x1000f +; GFX6-NEXT: s_bfe_i32 s19, s4, 0x1000e +; GFX6-NEXT: s_bfe_i32 s20, s4, 0x1000d +; GFX6-NEXT: s_bfe_i32 s21, s4, 0x1000c +; GFX6-NEXT: s_bfe_i32 s22, s4, 0x10013 +; GFX6-NEXT: s_bfe_i32 s23, s4, 0x10012 +; GFX6-NEXT: s_bfe_i32 s24, s4, 0x10011 +; GFX6-NEXT: s_bfe_i32 s25, s4, 0x10010 +; GFX6-NEXT: s_bfe_i32 s26, s4, 0x10017 +; GFX6-NEXT: s_bfe_i32 s27, s4, 0x10016 +; GFX6-NEXT: s_bfe_i32 s28, s4, 0x10015 +; GFX6-NEXT: s_bfe_i32 s29, s4, 0x10014 +; GFX6-NEXT: s_bfe_i32 s30, s4, 0x1001b +; GFX6-NEXT: s_bfe_i32 s31, s4, 0x1001a +; GFX6-NEXT: s_bfe_i32 s33, s4, 0x10019 +; GFX6-NEXT: s_bfe_i32 s34, s4, 0x10018 +; GFX6-NEXT: s_ashr_i32 s35, s4, 31 +; GFX6-NEXT: s_bfe_i32 s36, s4, 0x1001e +; GFX6-NEXT: s_bfe_i32 s37, s4, 0x1001d +; GFX6-NEXT: s_bfe_i32 s4, s4, 0x1001c ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s40 -; GFX6-NEXT: v_mov_b32_e32 v1, s39 -; GFX6-NEXT: v_mov_b32_e32 v2, s38 -; GFX6-NEXT: v_mov_b32_e32 v3, s37 +; GFX6-NEXT: v_mov_b32_e32 v0, s41 +; GFX6-NEXT: v_mov_b32_e32 v1, s40 +; GFX6-NEXT: v_mov_b32_e32 v2, s39 +; GFX6-NEXT: v_mov_b32_e32 v3, s38 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s36 -; GFX6-NEXT: v_mov_b32_e32 v1, s35 -; GFX6-NEXT: v_mov_b32_e32 v2, s34 -; GFX6-NEXT: v_mov_b32_e32 v3, s33 +; GFX6-NEXT: v_mov_b32_e32 v0, s4 +; GFX6-NEXT: v_mov_b32_e32 v1, s37 +; GFX6-NEXT: v_mov_b32_e32 v2, s36 +; GFX6-NEXT: v_mov_b32_e32 v3, s35 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s31 -; GFX6-NEXT: v_mov_b32_e32 v1, s30 -; GFX6-NEXT: v_mov_b32_e32 v2, s29 -; GFX6-NEXT: v_mov_b32_e32 v3, s28 +; GFX6-NEXT: v_mov_b32_e32 v0, s34 +; GFX6-NEXT: v_mov_b32_e32 v1, s33 +; GFX6-NEXT: v_mov_b32_e32 v2, s31 +; GFX6-NEXT: v_mov_b32_e32 v3, s30 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s27 -; GFX6-NEXT: v_mov_b32_e32 v1, s26 -; GFX6-NEXT: v_mov_b32_e32 v2, s25 -; GFX6-NEXT: v_mov_b32_e32 v3, s24 +; GFX6-NEXT: v_mov_b32_e32 v0, s29 +; GFX6-NEXT: v_mov_b32_e32 v1, s28 +; GFX6-NEXT: v_mov_b32_e32 v2, s27 +; GFX6-NEXT: v_mov_b32_e32 v3, s26 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s23 -; GFX6-NEXT: v_mov_b32_e32 v1, s22 -; GFX6-NEXT: v_mov_b32_e32 v2, s21 -; GFX6-NEXT: v_mov_b32_e32 v3, s20 +; GFX6-NEXT: v_mov_b32_e32 v0, s25 +; GFX6-NEXT: v_mov_b32_e32 v1, s24 +; GFX6-NEXT: v_mov_b32_e32 v2, s23 +; GFX6-NEXT: v_mov_b32_e32 v3, s22 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s19 -; GFX6-NEXT: v_mov_b32_e32 v1, s18 -; GFX6-NEXT: v_mov_b32_e32 v2, s17 -; GFX6-NEXT: v_mov_b32_e32 v3, s16 +; GFX6-NEXT: v_mov_b32_e32 v0, s21 +; GFX6-NEXT: v_mov_b32_e32 v1, s20 +; GFX6-NEXT: v_mov_b32_e32 v2, s19 +; GFX6-NEXT: v_mov_b32_e32 v3, s18 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s15 -; GFX6-NEXT: v_mov_b32_e32 v1, s14 -; GFX6-NEXT: v_mov_b32_e32 v2, s13 -; GFX6-NEXT: v_mov_b32_e32 v3, s12 +; GFX6-NEXT: v_mov_b32_e32 v0, s17 +; GFX6-NEXT: v_mov_b32_e32 v1, s16 +; GFX6-NEXT: v_mov_b32_e32 v2, s15 +; GFX6-NEXT: v_mov_b32_e32 v3, s14 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s11 -; GFX6-NEXT: v_mov_b32_e32 v1, s10 -; GFX6-NEXT: v_mov_b32_e32 v2, s9 -; GFX6-NEXT: v_mov_b32_e32 v3, s8 +; GFX6-NEXT: v_mov_b32_e32 v0, s13 +; GFX6-NEXT: v_mov_b32_e32 v1, s12 +; GFX6-NEXT: v_mov_b32_e32 v2, s11 +; GFX6-NEXT: v_mov_b32_e32 v3, s10 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s7 -; GFX6-NEXT: v_mov_b32_e32 v1, s6 -; GFX6-NEXT: v_mov_b32_e32 v2, s5 -; GFX6-NEXT: v_mov_b32_e32 v3, s4 +; GFX6-NEXT: v_mov_b32_e32 v0, s9 +; GFX6-NEXT: v_mov_b32_e32 v1, s8 +; GFX6-NEXT: v_mov_b32_e32 v2, s7 +; GFX6-NEXT: v_mov_b32_e32 v3, s6 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GFX6-NEXT: s_endpgm ; @@ -6152,40 +6152,40 @@ define amdgpu_kernel void @constant_zextload_v8i1_to_v8i64(ptr addrspace(1) %out ; GFX8-NEXT: flat_load_ubyte v0, v[0:1] ; GFX8-NEXT: s_add_u32 s2, s0, 48 ; GFX8-NEXT: s_addc_u32 s3, s1, 0 -; GFX8-NEXT: s_add_u32 s4, s0, 32 -; GFX8-NEXT: s_addc_u32 s5, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v18, s3 +; GFX8-NEXT: v_mov_b32_e32 v17, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 32 +; GFX8-NEXT: v_mov_b32_e32 v16, s1 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v15, s0 +; GFX8-NEXT: s_add_u32 s0, s0, 16 ; GFX8-NEXT: v_mov_b32_e32 v1, 0 -; GFX8-NEXT: v_mov_b32_e32 v16, s5 +; GFX8-NEXT: v_mov_b32_e32 v20, s3 +; GFX8-NEXT: s_addc_u32 s1, s1, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, v1 ; GFX8-NEXT: v_mov_b32_e32 v7, v1 -; GFX8-NEXT: v_mov_b32_e32 v15, s4 +; GFX8-NEXT: v_mov_b32_e32 v19, s2 +; GFX8-NEXT: v_mov_b32_e32 v22, s1 ; GFX8-NEXT: v_mov_b32_e32 v8, v1 ; GFX8-NEXT: v_mov_b32_e32 v10, v1 +; GFX8-NEXT: v_mov_b32_e32 v21, s0 ; GFX8-NEXT: v_mov_b32_e32 v3, v1 ; GFX8-NEXT: v_mov_b32_e32 v12, v1 ; GFX8-NEXT: v_mov_b32_e32 v14, v1 ; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: v_bfe_u32 v6, v0, 5, 1 ; GFX8-NEXT: v_bfe_u32 v4, v0, 4, 1 -; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[4:7] -; GFX8-NEXT: v_mov_b32_e32 v16, s3 -; GFX8-NEXT: v_mov_b32_e32 v5, s1 -; GFX8-NEXT: v_mov_b32_e32 v4, s0 -; GFX8-NEXT: s_add_u32 s0, s0, 16 -; GFX8-NEXT: s_addc_u32 s1, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v18, s1 -; GFX8-NEXT: v_mov_b32_e32 v17, s0 -; GFX8-NEXT: v_and_b32_e32 v6, 0xffff, v0 +; GFX8-NEXT: v_and_b32_e32 v23, 0xffff, v0 +; GFX8-NEXT: flat_store_dwordx4 v[19:20], v[4:7] ; GFX8-NEXT: v_bfe_u32 v9, v0, 3, 1 ; GFX8-NEXT: v_bfe_u32 v7, v0, 2, 1 -; GFX8-NEXT: v_mov_b32_e32 v15, s2 ; GFX8-NEXT: v_bfe_u32 v13, v0, 1, 1 ; GFX8-NEXT: v_and_b32_e32 v11, 1, v0 -; GFX8-NEXT: v_lshrrev_b32_e32 v2, 7, v6 -; GFX8-NEXT: v_bfe_u32 v0, v6, 6, 1 -; GFX8-NEXT: flat_store_dwordx4 v[17:18], v[7:10] -; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[0:3] -; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[11:14] +; GFX8-NEXT: v_lshrrev_b32_e32 v2, 7, v23 +; GFX8-NEXT: v_bfe_u32 v0, v23, 6, 1 +; GFX8-NEXT: flat_store_dwordx4 v[21:22], v[7:10] +; GFX8-NEXT: flat_store_dwordx4 v[17:18], v[0:3] +; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14] ; GFX8-NEXT: s_endpgm ; ; EG-LABEL: constant_zextload_v8i1_to_v8i64: @@ -6546,16 +6546,16 @@ define amdgpu_kernel void @constant_zextload_v16i1_to_v16i64(ptr addrspace(1) %o ; GFX6-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9 ; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s2, -1 +; GFX6-NEXT: s_mov_b32 s10, s2 +; GFX6-NEXT: s_mov_b32 s11, s3 +; GFX6-NEXT: s_waitcnt lgkmcnt(0) +; GFX6-NEXT: s_mov_b32 s8, s6 +; GFX6-NEXT: s_mov_b32 s9, s7 +; GFX6-NEXT: buffer_load_ushort v29, off, s[8:11], 0 ; GFX6-NEXT: v_mov_b32_e32 v1, 0 ; GFX6-NEXT: v_mov_b32_e32 v3, v1 -; GFX6-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NEXT: s_mov_b32 s0, s4 ; GFX6-NEXT: s_mov_b32 s1, s5 -; GFX6-NEXT: s_mov_b32 s4, s6 -; GFX6-NEXT: s_mov_b32 s5, s7 -; GFX6-NEXT: s_mov_b32 s6, s2 -; GFX6-NEXT: s_mov_b32 s7, s3 -; GFX6-NEXT: buffer_load_ushort v29, off, s[4:7], 0 ; GFX6-NEXT: v_mov_b32_e32 v4, v1 ; GFX6-NEXT: v_mov_b32_e32 v6, v1 ; GFX6-NEXT: v_mov_b32_e32 v7, v1 @@ -6581,8 +6581,8 @@ define amdgpu_kernel void @constant_zextload_v16i1_to_v16i64(ptr addrspace(1) %o ; GFX6-NEXT: v_lshrrev_b32_e32 v8, 15, v29 ; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_bfe_u32 v6, v29, 14, 1 -; GFX6-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:112 ; GFX6-NEXT: v_bfe_u32 v11, v29, 13, 1 +; GFX6-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:112 ; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_bfe_u32 v9, v29, 12, 1 ; GFX6-NEXT: v_bfe_u32 v27, v29, 5, 1 @@ -6934,68 +6934,68 @@ define amdgpu_kernel void @constant_sextload_v16i1_to_v16i64(ptr addrspace(1) %o ; GFX6-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NEXT: s_mov_b32 s8, s6 ; GFX6-NEXT: s_mov_b32 s9, s7 -; GFX6-NEXT: buffer_load_ushort v1, off, s[8:11], 0 +; GFX6-NEXT: buffer_load_ushort v0, off, s[8:11], 0 ; GFX6-NEXT: s_mov_b32 s0, s4 ; GFX6-NEXT: s_mov_b32 s1, s5 ; GFX6-NEXT: s_waitcnt vmcnt(0) -; GFX6-NEXT: v_lshrrev_b32_e32 v3, 14, v1 -; GFX6-NEXT: v_lshrrev_b32_e32 v4, 15, v1 -; GFX6-NEXT: v_bfe_i32 v5, v4, 0, 1 -; GFX6-NEXT: v_bfe_i32 v3, v3, 0, 1 -; GFX6-NEXT: v_lshrrev_b32_e32 v7, 12, v1 -; GFX6-NEXT: v_lshrrev_b32_e32 v8, 13, v1 -; GFX6-NEXT: v_lshrrev_b32_e32 v9, 4, v1 -; GFX6-NEXT: v_ashrrev_i32_e32 v6, 31, v5 -; GFX6-NEXT: v_ashrrev_i32_e32 v4, 31, v3 -; GFX6-NEXT: v_lshrrev_b32_e32 v10, 5, v1 -; GFX6-NEXT: buffer_store_dwordx4 v[3:6], off, s[0:3], 0 offset:112 +; GFX6-NEXT: v_lshrrev_b32_e32 v3, 14, v0 +; GFX6-NEXT: v_lshrrev_b32_e32 v5, 15, v0 +; GFX6-NEXT: v_lshrrev_b32_e32 v7, 12, v0 +; GFX6-NEXT: v_lshrrev_b32_e32 v9, 13, v0 +; GFX6-NEXT: v_bfe_i32 v27, v5, 0, 1 +; GFX6-NEXT: v_bfe_i32 v25, v3, 0, 1 +; GFX6-NEXT: v_lshrrev_b32_e32 v11, 10, v0 +; GFX6-NEXT: v_lshrrev_b32_e32 v13, 11, v0 +; GFX6-NEXT: v_bfe_i32 v24, v9, 0, 1 +; GFX6-NEXT: v_bfe_i32 v22, v7, 0, 1 +; GFX6-NEXT: v_ashrrev_i32_e32 v28, 31, v27 +; GFX6-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; GFX6-NEXT: v_lshrrev_b32_e32 v15, 8, v0 +; GFX6-NEXT: v_lshrrev_b32_e32 v16, 9, v0 +; GFX6-NEXT: v_bfe_i32 v21, v13, 0, 1 +; GFX6-NEXT: v_bfe_i32 v19, v11, 0, 1 +; GFX6-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:112 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_bfe_i32 v4, v9, 0, 1 -; GFX6-NEXT: v_bfe_i32 v9, v8, 0, 1 -; GFX6-NEXT: v_bfe_i32 v7, v7, 0, 1 -; GFX6-NEXT: v_lshrrev_b32_e32 v11, 10, v1 -; GFX6-NEXT: v_lshrrev_b32_e32 v12, 11, v1 -; GFX6-NEXT: v_lshrrev_b32_e32 v14, 8, v1 -; GFX6-NEXT: v_lshrrev_b32_e32 v16, 9, v1 -; GFX6-NEXT: v_bfe_i32 v6, v10, 0, 1 -; GFX6-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; GFX6-NEXT: v_ashrrev_i32_e32 v8, 31, v7 -; GFX6-NEXT: v_lshrrev_b32_e32 v15, 6, v1 -; GFX6-NEXT: v_lshrrev_b32_e32 v0, 2, v1 -; GFX6-NEXT: v_lshrrev_b32_e32 v2, 3, v1 -; GFX6-NEXT: v_lshrrev_b32_e32 v13, 1, v1 -; GFX6-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:96 +; GFX6-NEXT: v_ashrrev_i32_e32 v25, 31, v24 +; GFX6-NEXT: v_ashrrev_i32_e32 v23, 31, v22 +; GFX6-NEXT: v_lshrrev_b32_e32 v12, 6, v0 +; GFX6-NEXT: v_lshrrev_b32_e32 v14, 7, v0 +; GFX6-NEXT: v_lshrrev_b32_e32 v8, 4, v0 +; GFX6-NEXT: v_lshrrev_b32_e32 v10, 5, v0 +; GFX6-NEXT: v_lshrrev_b32_e32 v4, 2, v0 +; GFX6-NEXT: v_lshrrev_b32_e32 v6, 3, v0 +; GFX6-NEXT: v_lshrrev_b32_e32 v2, 1, v0 +; GFX6-NEXT: v_bfe_i32 v18, v16, 0, 1 +; GFX6-NEXT: v_bfe_i32 v16, v15, 0, 1 +; GFX6-NEXT: buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:96 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_bfe_i32 v9, v12, 0, 1 -; GFX6-NEXT: v_bfe_i32 v7, v11, 0, 1 -; GFX6-NEXT: v_bfe_i32 v11, v1, 0, 1 -; GFX6-NEXT: v_lshrrev_b32_e32 v1, 7, v1 -; GFX6-NEXT: v_bfe_i32 v21, v16, 0, 1 -; GFX6-NEXT: v_bfe_i32 v19, v14, 0, 1 -; GFX6-NEXT: v_bfe_i32 v2, v2, 0, 1 -; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1 -; GFX6-NEXT: v_bfe_i32 v13, v13, 0, 1 -; GFX6-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; GFX6-NEXT: v_ashrrev_i32_e32 v8, 31, v7 -; GFX6-NEXT: v_bfe_i32 v17, v1, 0, 1 -; GFX6-NEXT: v_bfe_i32 v15, v15, 0, 1 ; GFX6-NEXT: v_ashrrev_i32_e32 v22, 31, v21 ; GFX6-NEXT: v_ashrrev_i32_e32 v20, 31, v19 -; GFX6-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:80 -; GFX6-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; GFX6-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX6-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; GFX6-NEXT: v_ashrrev_i32_e32 v1, 31, v0 +; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1 +; GFX6-NEXT: v_bfe_i32 v2, v2, 0, 1 +; GFX6-NEXT: v_bfe_i32 v6, v6, 0, 1 +; GFX6-NEXT: v_bfe_i32 v4, v4, 0, 1 +; GFX6-NEXT: v_bfe_i32 v10, v10, 0, 1 +; GFX6-NEXT: v_bfe_i32 v8, v8, 0, 1 +; GFX6-NEXT: v_bfe_i32 v14, v14, 0, 1 +; GFX6-NEXT: v_bfe_i32 v12, v12, 0, 1 +; GFX6-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:80 ; GFX6-NEXT: s_waitcnt expcnt(0) +; GFX6-NEXT: v_ashrrev_i32_e32 v19, 31, v18 +; GFX6-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; GFX6-NEXT: v_ashrrev_i32_e32 v1, 31, v0 +; GFX6-NEXT: v_ashrrev_i32_e32 v3, 31, v2 ; GFX6-NEXT: v_ashrrev_i32_e32 v7, 31, v6 ; GFX6-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; GFX6-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; GFX6-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GFX6-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:64 -; GFX6-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:48 -; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:32 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 -; GFX6-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 +; GFX6-NEXT: v_ashrrev_i32_e32 v11, 31, v10 +; GFX6-NEXT: v_ashrrev_i32_e32 v9, 31, v8 +; GFX6-NEXT: v_ashrrev_i32_e32 v15, 31, v14 +; GFX6-NEXT: v_ashrrev_i32_e32 v13, 31, v12 +; GFX6-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:64 +; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48 +; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32 +; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GFX6-NEXT: s_endpgm ; ; GFX8-LABEL: constant_sextload_v16i1_to_v16i64: @@ -7044,69 +7044,69 @@ define amdgpu_kernel void @constant_sextload_v16i1_to_v16i64(ptr addrspace(1) %o ; GFX8-NEXT: s_add_u32 s2, s0, 0x70 ; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: s_addc_u32 s3, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v15, s3 -; GFX8-NEXT: v_mov_b32_e32 v14, s2 -; GFX8-NEXT: s_add_u32 s2, s0, 0x60 +; GFX8-NEXT: v_mov_b32_e32 v17, s3 ; GFX8-NEXT: v_mov_b32_e32 v4, s4 ; GFX8-NEXT: v_mov_b32_e32 v5, s5 +; GFX8-NEXT: v_mov_b32_e32 v16, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0x60 +; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[2:5] ; GFX8-NEXT: s_addc_u32 s3, s1, 0 -; GFX8-NEXT: flat_store_dwordx4 v[14:15], v[2:5] -; GFX8-NEXT: v_mov_b32_e32 v15, s3 -; GFX8-NEXT: v_mov_b32_e32 v14, s2 -; GFX8-NEXT: s_add_u32 s2, s0, 0x50 +; GFX8-NEXT: v_mov_b32_e32 v2, s2 ; GFX8-NEXT: v_mov_b32_e32 v6, s6 ; GFX8-NEXT: v_mov_b32_e32 v7, s7 ; GFX8-NEXT: v_mov_b32_e32 v8, s8 ; GFX8-NEXT: v_mov_b32_e32 v9, s9 +; GFX8-NEXT: v_mov_b32_e32 v3, s3 +; GFX8-NEXT: s_add_u32 s2, s0, 0x50 +; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[6:9] ; GFX8-NEXT: s_addc_u32 s3, s1, 0 -; GFX8-NEXT: flat_store_dwordx4 v[14:15], v[6:9] -; GFX8-NEXT: v_mov_b32_e32 v15, s3 -; GFX8-NEXT: v_mov_b32_e32 v14, s2 -; GFX8-NEXT: s_add_u32 s2, s0, 64 +; GFX8-NEXT: v_mov_b32_e32 v2, s2 ; GFX8-NEXT: v_mov_b32_e32 v10, s10 ; GFX8-NEXT: v_mov_b32_e32 v11, s11 ; GFX8-NEXT: v_mov_b32_e32 v12, s12 ; GFX8-NEXT: v_mov_b32_e32 v13, s13 +; GFX8-NEXT: v_mov_b32_e32 v3, s3 +; GFX8-NEXT: s_add_u32 s2, s0, 64 +; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[10:13] ; GFX8-NEXT: s_addc_u32 s3, s1, 0 -; GFX8-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GFX8-NEXT: v_mov_b32_e32 v15, s3 -; GFX8-NEXT: v_mov_b32_e32 v14, s2 +; GFX8-NEXT: v_mov_b32_e32 v2, s2 +; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: s_add_u32 s2, s0, 48 -; GFX8-NEXT: v_mov_b32_e32 v2, s14 -; GFX8-NEXT: v_mov_b32_e32 v3, s15 -; GFX8-NEXT: v_mov_b32_e32 v4, s16 -; GFX8-NEXT: v_mov_b32_e32 v5, s17 +; GFX8-NEXT: v_mov_b32_e32 v14, s14 +; GFX8-NEXT: v_mov_b32_e32 v15, s15 +; GFX8-NEXT: v_mov_b32_e32 v16, s16 +; GFX8-NEXT: v_mov_b32_e32 v17, s17 ; GFX8-NEXT: s_addc_u32 s3, s1, 0 -; GFX8-NEXT: flat_store_dwordx4 v[14:15], v[2:5] -; GFX8-NEXT: v_mov_b32_e32 v6, s18 -; GFX8-NEXT: v_mov_b32_e32 v5, s3 -; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[14:17] +; GFX8-NEXT: v_mov_b32_e32 v4, s18 +; GFX8-NEXT: v_mov_b32_e32 v17, s3 +; GFX8-NEXT: v_mov_b32_e32 v16, s2 ; GFX8-NEXT: s_add_u32 s2, s0, 32 -; GFX8-NEXT: v_mov_b32_e32 v7, s19 -; GFX8-NEXT: v_mov_b32_e32 v8, s20 -; GFX8-NEXT: v_mov_b32_e32 v9, s21 +; GFX8-NEXT: v_mov_b32_e32 v5, s19 +; GFX8-NEXT: v_mov_b32_e32 v6, s20 +; GFX8-NEXT: v_mov_b32_e32 v7, s21 ; GFX8-NEXT: s_addc_u32 s3, s1, 0 -; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[6:9] -; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[4:7] ; GFX8-NEXT: s_add_u32 s0, s0, 16 -; GFX8-NEXT: v_mov_b32_e32 v10, s22 -; GFX8-NEXT: v_mov_b32_e32 v11, s23 -; GFX8-NEXT: v_mov_b32_e32 v12, s24 -; GFX8-NEXT: v_mov_b32_e32 v13, s25 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v8, s22 +; GFX8-NEXT: v_mov_b32_e32 v9, s23 +; GFX8-NEXT: v_mov_b32_e32 v10, s24 +; GFX8-NEXT: v_mov_b32_e32 v11, s25 ; GFX8-NEXT: v_mov_b32_e32 v4, s2 ; GFX8-NEXT: s_addc_u32 s1, s1, 0 -; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[10:13] +; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[8:11] ; GFX8-NEXT: v_mov_b32_e32 v5, s1 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 1 -; GFX8-NEXT: v_mov_b32_e32 v14, s26 -; GFX8-NEXT: v_mov_b32_e32 v15, s27 -; GFX8-NEXT: v_mov_b32_e32 v16, s28 -; GFX8-NEXT: v_mov_b32_e32 v17, s29 +; GFX8-NEXT: v_mov_b32_e32 v12, s26 +; GFX8-NEXT: v_mov_b32_e32 v13, s27 +; GFX8-NEXT: v_mov_b32_e32 v14, s28 +; GFX8-NEXT: v_mov_b32_e32 v15, s29 ; GFX8-NEXT: v_mov_b32_e32 v4, s0 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0 ; GFX8-NEXT: v_mov_b32_e32 v2, s30 ; GFX8-NEXT: v_mov_b32_e32 v3, s31 -; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[14:17] +; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[12:15] ; GFX8-NEXT: flat_store_dwordx4 v[18:19], v[0:3] ; GFX8-NEXT: s_endpgm ; @@ -7950,157 +7950,157 @@ define amdgpu_kernel void @constant_sextload_v32i1_to_v32i64(ptr addrspace(1) %o ; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s2, -1 ; GFX6-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NEXT: s_lshr_b32 s42, s4, 30 -; GFX6-NEXT: s_lshr_b32 s44, s4, 31 -; GFX6-NEXT: s_lshr_b32 s40, s4, 28 -; GFX6-NEXT: s_lshr_b32 s38, s4, 29 -; GFX6-NEXT: s_lshr_b32 s22, s4, 20 +; GFX6-NEXT: s_lshr_b32 s24, s4, 30 +; GFX6-NEXT: s_lshr_b32 s34, s4, 31 +; GFX6-NEXT: s_lshr_b32 s68, s4, 6 +; GFX6-NEXT: s_lshr_b32 s70, s4, 1 +; GFX6-NEXT: s_lshr_b32 s46, s4, 28 +; GFX6-NEXT: s_lshr_b32 s52, s4, 29 +; GFX6-NEXT: s_lshr_b32 s50, s4, 26 +; GFX6-NEXT: s_lshr_b32 s48, s4, 27 +; GFX6-NEXT: s_lshr_b32 s42, s4, 24 +; GFX6-NEXT: s_lshr_b32 s38, s4, 25 +; GFX6-NEXT: s_lshr_b32 s36, s4, 22 +; GFX6-NEXT: s_lshr_b32 s30, s4, 23 +; GFX6-NEXT: s_lshr_b32 s26, s4, 20 ; GFX6-NEXT: s_lshr_b32 s20, s4, 21 +; GFX6-NEXT: s_lshr_b32 s18, s4, 18 +; GFX6-NEXT: s_lshr_b32 s22, s4, 19 +; GFX6-NEXT: s_lshr_b32 s28, s4, 16 +; GFX6-NEXT: s_lshr_b32 s40, s4, 17 +; GFX6-NEXT: s_lshr_b32 s44, s4, 14 +; GFX6-NEXT: s_lshr_b32 s54, s4, 15 +; GFX6-NEXT: s_lshr_b32 s56, s4, 12 +; GFX6-NEXT: s_lshr_b32 s58, s4, 13 +; GFX6-NEXT: s_lshr_b32 s60, s4, 10 +; GFX6-NEXT: s_lshr_b32 s62, s4, 11 +; GFX6-NEXT: s_lshr_b32 s64, s4, 8 +; GFX6-NEXT: s_lshr_b32 s66, s4, 9 +; GFX6-NEXT: s_lshr_b32 s16, s4, 7 +; GFX6-NEXT: s_lshr_b32 s14, s4, 4 +; GFX6-NEXT: s_lshr_b32 s12, s4, 5 +; GFX6-NEXT: s_lshr_b32 s10, s4, 2 +; GFX6-NEXT: s_lshr_b32 s8, s4, 3 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[4:5], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[4:5], s[70:71], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[70:71], s[24:25], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[24:25], s[68:69], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[68:69], s[34:35], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s70 +; GFX6-NEXT: v_mov_b32_e32 v1, s71 +; GFX6-NEXT: v_mov_b32_e32 v2, s68 +; GFX6-NEXT: s_bfe_i64 s[34:35], s[66:67], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v3, s69 +; GFX6-NEXT: s_bfe_i64 s[66:67], s[46:47], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[46:47], s[64:65], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[64:65], s[52:53], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v4, s66 +; GFX6-NEXT: v_mov_b32_e32 v5, s67 +; GFX6-NEXT: v_mov_b32_e32 v6, s64 +; GFX6-NEXT: v_mov_b32_e32 v7, s65 +; GFX6-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000 ; GFX6-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x10000 -; GFX6-NEXT: s_lshr_b32 s36, s4, 26 -; GFX6-NEXT: s_lshr_b32 s34, s4, 27 -; GFX6-NEXT: s_lshr_b32 s30, s4, 24 -; GFX6-NEXT: s_lshr_b32 s28, s4, 25 -; GFX6-NEXT: s_lshr_b32 s26, s4, 22 -; GFX6-NEXT: s_lshr_b32 s24, s4, 23 -; GFX6-NEXT: s_lshr_b32 s6, s4, 18 -; GFX6-NEXT: s_lshr_b32 s8, s4, 19 -; GFX6-NEXT: v_mov_b32_e32 v0, s42 -; GFX6-NEXT: v_mov_b32_e32 v1, s43 -; GFX6-NEXT: v_mov_b32_e32 v2, s44 -; GFX6-NEXT: v_mov_b32_e32 v3, s45 -; GFX6-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000 ; GFX6-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000 -; GFX6-NEXT: s_lshr_b32 s10, s4, 16 -; GFX6-NEXT: s_lshr_b32 s12, s4, 17 -; GFX6-NEXT: v_mov_b32_e32 v4, s40 -; GFX6-NEXT: v_mov_b32_e32 v5, s41 -; GFX6-NEXT: v_mov_b32_e32 v6, s38 -; GFX6-NEXT: v_mov_b32_e32 v7, s39 ; GFX6-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000 ; GFX6-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s22 -; GFX6-NEXT: v_mov_b32_e32 v1, s23 +; GFX6-NEXT: v_mov_b32_e32 v0, s26 +; GFX6-NEXT: v_mov_b32_e32 v1, s27 ; GFX6-NEXT: v_mov_b32_e32 v2, s20 +; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 ; GFX6-NEXT: v_mov_b32_e32 v3, s21 -; GFX6-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000 -; GFX6-NEXT: s_lshr_b32 s14, s4, 14 -; GFX6-NEXT: s_lshr_b32 s16, s4, 15 -; GFX6-NEXT: v_mov_b32_e32 v8, s36 -; GFX6-NEXT: v_mov_b32_e32 v9, s37 -; GFX6-NEXT: v_mov_b32_e32 v10, s34 -; GFX6-NEXT: v_mov_b32_e32 v11, s35 -; GFX6-NEXT: v_mov_b32_e32 v12, s30 -; GFX6-NEXT: v_mov_b32_e32 v13, s31 -; GFX6-NEXT: v_mov_b32_e32 v14, s28 -; GFX6-NEXT: v_mov_b32_e32 v15, s29 -; GFX6-NEXT: v_mov_b32_e32 v16, s26 -; GFX6-NEXT: v_mov_b32_e32 v17, s27 -; GFX6-NEXT: v_mov_b32_e32 v18, s24 -; GFX6-NEXT: v_mov_b32_e32 v19, s25 -; GFX6-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v8, s50 +; GFX6-NEXT: v_mov_b32_e32 v9, s51 +; GFX6-NEXT: v_mov_b32_e32 v10, s48 +; GFX6-NEXT: v_mov_b32_e32 v11, s49 +; GFX6-NEXT: v_mov_b32_e32 v12, s42 +; GFX6-NEXT: v_mov_b32_e32 v13, s43 +; GFX6-NEXT: v_mov_b32_e32 v14, s38 +; GFX6-NEXT: v_mov_b32_e32 v15, s39 +; GFX6-NEXT: v_mov_b32_e32 v16, s36 +; GFX6-NEXT: v_mov_b32_e32 v17, s37 +; GFX6-NEXT: v_mov_b32_e32 v18, s30 +; GFX6-NEXT: s_bfe_i64 s[36:37], s[40:41], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v19, s31 +; GFX6-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:224 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:208 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192 ; GFX6-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:176 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s6 -; GFX6-NEXT: v_mov_b32_e32 v1, s7 -; GFX6-NEXT: v_mov_b32_e32 v2, s8 -; GFX6-NEXT: v_mov_b32_e32 v3, s9 -; GFX6-NEXT: s_lshr_b32 s18, s4, 12 -; GFX6-NEXT: s_lshr_b32 s42, s4, 13 -; GFX6-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s18 +; GFX6-NEXT: v_mov_b32_e32 v1, s19 +; GFX6-NEXT: v_mov_b32_e32 v2, s22 +; GFX6-NEXT: v_mov_b32_e32 v3, s23 +; GFX6-NEXT: s_bfe_i64 s[42:43], s[54:55], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[38:39], s[44:45], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s10 -; GFX6-NEXT: v_mov_b32_e32 v1, s11 -; GFX6-NEXT: v_mov_b32_e32 v2, s12 -; GFX6-NEXT: v_mov_b32_e32 v3, s13 -; GFX6-NEXT: s_lshr_b32 s44, s4, 10 -; GFX6-NEXT: s_lshr_b32 s40, s4, 11 -; GFX6-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s28 +; GFX6-NEXT: v_mov_b32_e32 v1, s29 +; GFX6-NEXT: v_mov_b32_e32 v2, s36 +; GFX6-NEXT: v_mov_b32_e32 v3, s37 +; GFX6-NEXT: s_bfe_i64 s[50:51], s[58:59], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[48:49], s[56:57], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s14 -; GFX6-NEXT: v_mov_b32_e32 v1, s15 -; GFX6-NEXT: v_mov_b32_e32 v2, s16 -; GFX6-NEXT: v_mov_b32_e32 v3, s17 -; GFX6-NEXT: s_lshr_b32 s38, s4, 8 -; GFX6-NEXT: s_lshr_b32 s36, s4, 9 -; GFX6-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x10000 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 -; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s18 -; GFX6-NEXT: v_mov_b32_e32 v1, s19 +; GFX6-NEXT: v_mov_b32_e32 v0, s38 +; GFX6-NEXT: v_mov_b32_e32 v1, s39 ; GFX6-NEXT: v_mov_b32_e32 v2, s42 ; GFX6-NEXT: v_mov_b32_e32 v3, s43 -; GFX6-NEXT: s_lshr_b32 s34, s4, 6 -; GFX6-NEXT: s_lshr_b32 s30, s4, 7 -; GFX6-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[52:53], s[62:63], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[60:61], s[60:61], 0x10000 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 +; GFX6-NEXT: s_waitcnt expcnt(0) +; GFX6-NEXT: v_mov_b32_e32 v0, s48 +; GFX6-NEXT: v_mov_b32_e32 v1, s49 +; GFX6-NEXT: v_mov_b32_e32 v2, s50 +; GFX6-NEXT: v_mov_b32_e32 v3, s51 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s44 -; GFX6-NEXT: v_mov_b32_e32 v1, s45 -; GFX6-NEXT: v_mov_b32_e32 v2, s40 -; GFX6-NEXT: v_mov_b32_e32 v3, s41 -; GFX6-NEXT: s_lshr_b32 s28, s4, 4 -; GFX6-NEXT: s_lshr_b32 s26, s4, 5 -; GFX6-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s60 +; GFX6-NEXT: v_mov_b32_e32 v1, s61 +; GFX6-NEXT: v_mov_b32_e32 v2, s52 +; GFX6-NEXT: v_mov_b32_e32 v3, s53 +; GFX6-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s38 -; GFX6-NEXT: v_mov_b32_e32 v1, s39 -; GFX6-NEXT: v_mov_b32_e32 v2, s36 -; GFX6-NEXT: v_mov_b32_e32 v3, s37 -; GFX6-NEXT: s_lshr_b32 s24, s4, 2 -; GFX6-NEXT: s_lshr_b32 s22, s4, 3 -; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s46 +; GFX6-NEXT: v_mov_b32_e32 v1, s47 +; GFX6-NEXT: v_mov_b32_e32 v2, s34 +; GFX6-NEXT: v_mov_b32_e32 v3, s35 +; GFX6-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s34 -; GFX6-NEXT: v_mov_b32_e32 v1, s35 -; GFX6-NEXT: v_mov_b32_e32 v2, s30 -; GFX6-NEXT: v_mov_b32_e32 v3, s31 -; GFX6-NEXT: s_lshr_b32 s46, s4, 1 -; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s24 +; GFX6-NEXT: v_mov_b32_e32 v1, s25 +; GFX6-NEXT: v_mov_b32_e32 v2, s16 +; GFX6-NEXT: v_mov_b32_e32 v3, s17 +; GFX6-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s28 -; GFX6-NEXT: v_mov_b32_e32 v1, s29 -; GFX6-NEXT: v_mov_b32_e32 v2, s26 -; GFX6-NEXT: v_mov_b32_e32 v3, s27 -; GFX6-NEXT: s_bfe_i64 s[20:21], s[4:5], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[4:5], s[46:47], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s14 +; GFX6-NEXT: v_mov_b32_e32 v1, s15 +; GFX6-NEXT: v_mov_b32_e32 v2, s12 +; GFX6-NEXT: v_mov_b32_e32 v3, s13 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s24 -; GFX6-NEXT: v_mov_b32_e32 v1, s25 -; GFX6-NEXT: v_mov_b32_e32 v2, s22 -; GFX6-NEXT: v_mov_b32_e32 v3, s23 +; GFX6-NEXT: v_mov_b32_e32 v0, s10 +; GFX6-NEXT: v_mov_b32_e32 v1, s11 +; GFX6-NEXT: v_mov_b32_e32 v2, s8 +; GFX6-NEXT: v_mov_b32_e32 v3, s9 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s20 -; GFX6-NEXT: v_mov_b32_e32 v1, s21 +; GFX6-NEXT: v_mov_b32_e32 v0, s6 +; GFX6-NEXT: v_mov_b32_e32 v1, s7 ; GFX6-NEXT: v_mov_b32_e32 v2, s4 ; GFX6-NEXT: v_mov_b32_e32 v3, s5 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 @@ -8770,200 +8770,200 @@ define amdgpu_kernel void @constant_zextload_v64i1_to_v64i64(ptr addrspace(1) %o ; GFX6-NEXT: v_mov_b32_e32 v1, 0 ; GFX6-NEXT: v_mov_b32_e32 v3, v1 ; GFX6-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 -; GFX6-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NEXT: s_bfe_u32 s4, s2, 0x10003 -; GFX6-NEXT: s_bfe_u32 s5, s2, 0x10005 -; GFX6-NEXT: s_bfe_u32 s6, s2, 0x10007 -; GFX6-NEXT: s_bfe_u32 s10, s2, 0x10009 -; GFX6-NEXT: s_bfe_u32 s12, s2, 0x1000b -; GFX6-NEXT: s_bfe_u32 s14, s2, 0x1000d -; GFX6-NEXT: s_bfe_u32 s16, s2, 0x1000f -; GFX6-NEXT: s_bfe_u32 s18, s2, 0x10011 -; GFX6-NEXT: s_bfe_u32 s20, s2, 0x10013 -; GFX6-NEXT: s_bfe_u32 s22, s2, 0x10015 -; GFX6-NEXT: s_bfe_u32 s24, s2, 0x10017 -; GFX6-NEXT: s_bfe_u32 s25, s2, 0x10019 -; GFX6-NEXT: s_bfe_u32 s26, s2, 0x1001b -; GFX6-NEXT: s_bfe_u32 s27, s2, 0x1001d -; GFX6-NEXT: s_lshr_b32 s28, s2, 31 -; GFX6-NEXT: s_lshr_b32 s44, s3, 31 -; GFX6-NEXT: s_bfe_u32 s7, s2, 0x10001 -; GFX6-NEXT: s_and_b32 s8, s2, 1 -; GFX6-NEXT: s_bfe_u32 s13, s2, 0x10002 -; GFX6-NEXT: s_bfe_u32 s15, s2, 0x10004 -; GFX6-NEXT: s_bfe_u32 s17, s2, 0x10006 -; GFX6-NEXT: s_bfe_u32 s19, s2, 0x10008 -; GFX6-NEXT: s_bfe_u32 s21, s2, 0x1000a -; GFX6-NEXT: s_bfe_u32 s23, s2, 0x1000c -; GFX6-NEXT: s_bfe_u32 s45, s2, 0x1000e -; GFX6-NEXT: s_bfe_u32 s46, s2, 0x10010 -; GFX6-NEXT: s_bfe_u32 s47, s2, 0x10012 -; GFX6-NEXT: s_bfe_u32 s48, s2, 0x10014 -; GFX6-NEXT: s_bfe_u32 s49, s2, 0x10016 -; GFX6-NEXT: s_bfe_u32 s50, s2, 0x10018 -; GFX6-NEXT: s_bfe_u32 s51, s2, 0x1001a -; GFX6-NEXT: s_bfe_u32 s52, s2, 0x1001c -; GFX6-NEXT: s_bfe_u32 s53, s2, 0x1001e -; GFX6-NEXT: s_bfe_u32 s2, s3, 0x1001e -; GFX6-NEXT: s_bfe_u32 s29, s3, 0x10003 -; GFX6-NEXT: s_bfe_u32 s30, s3, 0x10005 -; GFX6-NEXT: s_bfe_u32 s31, s3, 0x10007 -; GFX6-NEXT: s_bfe_u32 s33, s3, 0x10009 -; GFX6-NEXT: s_bfe_u32 s34, s3, 0x1000b -; GFX6-NEXT: s_bfe_u32 s35, s3, 0x1000d -; GFX6-NEXT: s_bfe_u32 s36, s3, 0x1000f -; GFX6-NEXT: s_bfe_u32 s37, s3, 0x10011 -; GFX6-NEXT: s_bfe_u32 s38, s3, 0x10013 -; GFX6-NEXT: s_bfe_u32 s39, s3, 0x10015 -; GFX6-NEXT: s_bfe_u32 s40, s3, 0x10017 -; GFX6-NEXT: s_bfe_u32 s41, s3, 0x10019 -; GFX6-NEXT: s_bfe_u32 s42, s3, 0x1001b -; GFX6-NEXT: s_bfe_u32 s43, s3, 0x1001d -; GFX6-NEXT: s_bfe_u32 s9, s3, 0x10001 -; GFX6-NEXT: s_and_b32 s11, s3, 1 -; GFX6-NEXT: s_bfe_u32 s54, s3, 0x10002 -; GFX6-NEXT: s_bfe_u32 s55, s3, 0x10004 -; GFX6-NEXT: s_bfe_u32 s56, s3, 0x10006 -; GFX6-NEXT: s_bfe_u32 s57, s3, 0x10008 -; GFX6-NEXT: s_bfe_u32 s58, s3, 0x1000a -; GFX6-NEXT: s_bfe_u32 s59, s3, 0x1000c -; GFX6-NEXT: s_bfe_u32 s60, s3, 0x1000e -; GFX6-NEXT: s_bfe_u32 s61, s3, 0x10010 -; GFX6-NEXT: s_bfe_u32 s62, s3, 0x10012 -; GFX6-NEXT: s_bfe_u32 s63, s3, 0x10014 -; GFX6-NEXT: s_bfe_u32 s64, s3, 0x10016 -; GFX6-NEXT: s_bfe_u32 s65, s3, 0x10018 -; GFX6-NEXT: s_bfe_u32 s66, s3, 0x1001a -; GFX6-NEXT: s_bfe_u32 s67, s3, 0x1001c -; GFX6-NEXT: v_mov_b32_e32 v0, s2 -; GFX6-NEXT: v_mov_b32_e32 v2, s44 +; GFX6-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0 ; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s2, -1 +; GFX6-NEXT: s_waitcnt lgkmcnt(0) +; GFX6-NEXT: s_lshr_b32 s44, s5, 31 +; GFX6-NEXT: s_bfe_u32 s24, s5, 0x1001e +; GFX6-NEXT: s_bfe_u32 s43, s5, 0x1001d +; GFX6-NEXT: v_mov_b32_e32 v0, s24 +; GFX6-NEXT: v_mov_b32_e32 v2, s44 +; GFX6-NEXT: s_bfe_u32 s44, s5, 0x1001c +; GFX6-NEXT: s_bfe_u32 s42, s5, 0x1001b ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:496 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s67 +; GFX6-NEXT: v_mov_b32_e32 v0, s44 ; GFX6-NEXT: v_mov_b32_e32 v2, s43 +; GFX6-NEXT: s_bfe_u32 s43, s5, 0x1001a +; GFX6-NEXT: s_bfe_u32 s41, s5, 0x10019 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:480 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s66 +; GFX6-NEXT: v_mov_b32_e32 v0, s43 ; GFX6-NEXT: v_mov_b32_e32 v2, s42 +; GFX6-NEXT: s_bfe_u32 s42, s5, 0x10018 +; GFX6-NEXT: s_bfe_u32 s40, s5, 0x10017 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:464 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s65 +; GFX6-NEXT: v_mov_b32_e32 v0, s42 ; GFX6-NEXT: v_mov_b32_e32 v2, s41 +; GFX6-NEXT: s_bfe_u32 s41, s5, 0x10016 +; GFX6-NEXT: s_bfe_u32 s39, s5, 0x10015 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:448 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s64 +; GFX6-NEXT: v_mov_b32_e32 v0, s41 ; GFX6-NEXT: v_mov_b32_e32 v2, s40 +; GFX6-NEXT: s_bfe_u32 s40, s5, 0x10014 +; GFX6-NEXT: s_bfe_u32 s38, s5, 0x10013 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:432 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s63 +; GFX6-NEXT: v_mov_b32_e32 v0, s40 ; GFX6-NEXT: v_mov_b32_e32 v2, s39 +; GFX6-NEXT: s_bfe_u32 s39, s5, 0x10012 +; GFX6-NEXT: s_bfe_u32 s37, s5, 0x10011 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:416 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s62 +; GFX6-NEXT: v_mov_b32_e32 v0, s39 ; GFX6-NEXT: v_mov_b32_e32 v2, s38 +; GFX6-NEXT: s_bfe_u32 s38, s5, 0x10010 +; GFX6-NEXT: s_bfe_u32 s36, s5, 0x1000f ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:400 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s61 +; GFX6-NEXT: v_mov_b32_e32 v0, s38 ; GFX6-NEXT: v_mov_b32_e32 v2, s37 +; GFX6-NEXT: s_bfe_u32 s37, s5, 0x1000e +; GFX6-NEXT: s_bfe_u32 s35, s5, 0x1000d ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:384 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s60 +; GFX6-NEXT: v_mov_b32_e32 v0, s37 ; GFX6-NEXT: v_mov_b32_e32 v2, s36 +; GFX6-NEXT: s_bfe_u32 s36, s5, 0x1000c +; GFX6-NEXT: s_bfe_u32 s34, s5, 0x1000b ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:368 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s59 +; GFX6-NEXT: v_mov_b32_e32 v0, s36 ; GFX6-NEXT: v_mov_b32_e32 v2, s35 +; GFX6-NEXT: s_bfe_u32 s35, s5, 0x1000a +; GFX6-NEXT: s_bfe_u32 s33, s5, 0x10009 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:352 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s58 +; GFX6-NEXT: v_mov_b32_e32 v0, s35 ; GFX6-NEXT: v_mov_b32_e32 v2, s34 +; GFX6-NEXT: s_bfe_u32 s34, s5, 0x10008 +; GFX6-NEXT: s_bfe_u32 s29, s5, 0x10003 +; GFX6-NEXT: s_bfe_u32 s30, s5, 0x10005 +; GFX6-NEXT: s_bfe_u32 s31, s5, 0x10007 +; GFX6-NEXT: s_bfe_u32 s11, s5, 0x10001 +; GFX6-NEXT: s_and_b32 s13, s5, 1 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:336 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s57 +; GFX6-NEXT: v_mov_b32_e32 v0, s34 +; GFX6-NEXT: s_bfe_u32 s34, s5, 0x10002 ; GFX6-NEXT: v_mov_b32_e32 v2, s33 +; GFX6-NEXT: s_bfe_u32 s33, s5, 0x10004 +; GFX6-NEXT: s_bfe_u32 s5, s5, 0x10006 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:320 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s56 +; GFX6-NEXT: v_mov_b32_e32 v0, s5 ; GFX6-NEXT: v_mov_b32_e32 v2, s31 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:304 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s55 +; GFX6-NEXT: v_mov_b32_e32 v0, s33 ; GFX6-NEXT: v_mov_b32_e32 v2, s30 +; GFX6-NEXT: s_bfe_u32 s6, s4, 0x10003 +; GFX6-NEXT: s_bfe_u32 s7, s4, 0x10005 +; GFX6-NEXT: s_bfe_u32 s8, s4, 0x10007 +; GFX6-NEXT: s_bfe_u32 s12, s4, 0x10009 +; GFX6-NEXT: s_bfe_u32 s14, s4, 0x1000b +; GFX6-NEXT: s_bfe_u32 s16, s4, 0x1000d +; GFX6-NEXT: s_bfe_u32 s18, s4, 0x1000f +; GFX6-NEXT: s_bfe_u32 s20, s4, 0x10011 +; GFX6-NEXT: s_bfe_u32 s21, s4, 0x10013 +; GFX6-NEXT: s_bfe_u32 s22, s4, 0x10015 +; GFX6-NEXT: s_bfe_u32 s23, s4, 0x10017 +; GFX6-NEXT: s_bfe_u32 s25, s4, 0x10019 +; GFX6-NEXT: s_bfe_u32 s26, s4, 0x1001b +; GFX6-NEXT: s_bfe_u32 s27, s4, 0x1001d +; GFX6-NEXT: s_lshr_b32 s28, s4, 31 +; GFX6-NEXT: s_bfe_u32 s9, s4, 0x10001 +; GFX6-NEXT: s_and_b32 s10, s4, 1 +; GFX6-NEXT: s_bfe_u32 s15, s4, 0x10002 +; GFX6-NEXT: s_bfe_u32 s17, s4, 0x10004 +; GFX6-NEXT: s_bfe_u32 s19, s4, 0x10006 +; GFX6-NEXT: s_bfe_u32 s24, s4, 0x10008 +; GFX6-NEXT: s_bfe_u32 s44, s4, 0x1000a +; GFX6-NEXT: s_bfe_u32 s43, s4, 0x1000c +; GFX6-NEXT: s_bfe_u32 s42, s4, 0x1000e +; GFX6-NEXT: s_bfe_u32 s41, s4, 0x10010 +; GFX6-NEXT: s_bfe_u32 s40, s4, 0x10012 +; GFX6-NEXT: s_bfe_u32 s39, s4, 0x10014 +; GFX6-NEXT: s_bfe_u32 s38, s4, 0x10016 +; GFX6-NEXT: s_bfe_u32 s37, s4, 0x10018 +; GFX6-NEXT: s_bfe_u32 s36, s4, 0x1001a +; GFX6-NEXT: s_bfe_u32 s35, s4, 0x1001c +; GFX6-NEXT: s_bfe_u32 s4, s4, 0x1001e ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:288 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s54 +; GFX6-NEXT: v_mov_b32_e32 v0, s34 ; GFX6-NEXT: v_mov_b32_e32 v2, s29 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:272 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s53 +; GFX6-NEXT: v_mov_b32_e32 v0, s4 ; GFX6-NEXT: v_mov_b32_e32 v2, s28 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s52 +; GFX6-NEXT: v_mov_b32_e32 v0, s35 ; GFX6-NEXT: v_mov_b32_e32 v2, s27 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s51 +; GFX6-NEXT: v_mov_b32_e32 v0, s36 ; GFX6-NEXT: v_mov_b32_e32 v2, s26 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:208 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s50 +; GFX6-NEXT: v_mov_b32_e32 v0, s37 ; GFX6-NEXT: v_mov_b32_e32 v2, s25 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:192 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s49 -; GFX6-NEXT: v_mov_b32_e32 v2, s24 +; GFX6-NEXT: v_mov_b32_e32 v0, s38 +; GFX6-NEXT: v_mov_b32_e32 v2, s23 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s48 +; GFX6-NEXT: v_mov_b32_e32 v0, s39 ; GFX6-NEXT: v_mov_b32_e32 v2, s22 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s47 -; GFX6-NEXT: v_mov_b32_e32 v2, s20 +; GFX6-NEXT: v_mov_b32_e32 v0, s40 +; GFX6-NEXT: v_mov_b32_e32 v2, s21 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s46 -; GFX6-NEXT: v_mov_b32_e32 v2, s18 +; GFX6-NEXT: v_mov_b32_e32 v0, s41 +; GFX6-NEXT: v_mov_b32_e32 v2, s20 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s45 -; GFX6-NEXT: v_mov_b32_e32 v2, s16 +; GFX6-NEXT: v_mov_b32_e32 v0, s42 +; GFX6-NEXT: v_mov_b32_e32 v2, s18 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s23 -; GFX6-NEXT: v_mov_b32_e32 v2, s14 +; GFX6-NEXT: v_mov_b32_e32 v0, s43 +; GFX6-NEXT: v_mov_b32_e32 v2, s16 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s21 -; GFX6-NEXT: v_mov_b32_e32 v2, s12 +; GFX6-NEXT: v_mov_b32_e32 v0, s44 +; GFX6-NEXT: v_mov_b32_e32 v2, s14 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s19 -; GFX6-NEXT: v_mov_b32_e32 v2, s10 +; GFX6-NEXT: v_mov_b32_e32 v0, s24 +; GFX6-NEXT: v_mov_b32_e32 v2, s12 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s17 -; GFX6-NEXT: v_mov_b32_e32 v2, s6 +; GFX6-NEXT: v_mov_b32_e32 v0, s19 +; GFX6-NEXT: v_mov_b32_e32 v2, s8 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s15 -; GFX6-NEXT: v_mov_b32_e32 v2, s5 +; GFX6-NEXT: v_mov_b32_e32 v0, s17 +; GFX6-NEXT: v_mov_b32_e32 v2, s7 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s13 -; GFX6-NEXT: v_mov_b32_e32 v2, s4 +; GFX6-NEXT: v_mov_b32_e32 v0, s15 +; GFX6-NEXT: v_mov_b32_e32 v2, s6 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s11 -; GFX6-NEXT: v_mov_b32_e32 v2, s9 +; GFX6-NEXT: v_mov_b32_e32 v0, s13 +; GFX6-NEXT: v_mov_b32_e32 v2, s11 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:256 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s8 -; GFX6-NEXT: v_mov_b32_e32 v2, s7 +; GFX6-NEXT: v_mov_b32_e32 v0, s10 +; GFX6-NEXT: v_mov_b32_e32 v2, s9 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GFX6-NEXT: s_endpgm ; @@ -9935,791 +9935,903 @@ define amdgpu_kernel void @constant_sextload_v64i1_to_v64i64(ptr addrspace(1) %o ; GFX6: ; %bb.0: ; GFX6-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x9 ; GFX6-NEXT: s_mov_b32 s7, 0 +; GFX6-NEXT: s_mov_b32 s45, s7 ; GFX6-NEXT: s_mov_b32 s43, s7 ; GFX6-NEXT: s_mov_b32 s41, s7 -; GFX6-NEXT: s_mov_b32 s39, s7 ; GFX6-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[10:11], 0x0 -; GFX6-NEXT: s_mov_b32 s37, s7 -; GFX6-NEXT: s_mov_b32 s31, s7 -; GFX6-NEXT: s_mov_b32 s27, s7 -; GFX6-NEXT: s_mov_b32 s23, s7 +; GFX6-NEXT: s_mov_b32 s35, s7 +; GFX6-NEXT: s_mov_b32 s29, s7 +; GFX6-NEXT: s_mov_b32 s39, s7 +; GFX6-NEXT: s_mov_b32 s21, s7 ; GFX6-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NEXT: s_lshr_b32 s6, s5, 30 -; GFX6-NEXT: s_lshr_b32 s42, s5, 28 -; GFX6-NEXT: s_lshr_b32 s40, s5, 29 -; GFX6-NEXT: s_lshr_b32 s38, s5, 26 -; GFX6-NEXT: s_lshr_b32 s36, s5, 27 -; GFX6-NEXT: s_lshr_b32 s30, s5, 25 -; GFX6-NEXT: s_lshr_b32 s26, s5, 23 -; GFX6-NEXT: s_lshr_b32 s22, s5, 21 -; GFX6-NEXT: s_lshr_b32 s20, s5, 18 -; GFX6-NEXT: s_mov_b32 s21, s7 -; GFX6-NEXT: s_bfe_i64 s[44:45], s[6:7], 0x10000 +; GFX6-NEXT: s_lshr_b32 s44, s5, 28 +; GFX6-NEXT: s_lshr_b32 s42, s5, 29 +; GFX6-NEXT: s_lshr_b32 s40, s5, 26 +; GFX6-NEXT: s_lshr_b32 s34, s5, 25 +; GFX6-NEXT: s_lshr_b32 s28, s5, 23 +; GFX6-NEXT: s_lshr_b32 s38, s5, 27 +; GFX6-NEXT: s_lshr_b32 s20, s5, 19 +; GFX6-NEXT: s_bfe_i64 s[46:47], s[6:7], 0x10000 ; GFX6-NEXT: s_ashr_i32 s6, s5, 31 +; GFX6-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x10000 ; GFX6-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 ; GFX6-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 ; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s2, -1 ; GFX6-NEXT: s_mov_b32 s0, s8 ; GFX6-NEXT: s_mov_b32 s1, s9 -; GFX6-NEXT: s_lshr_b32 s18, s5, 19 -; GFX6-NEXT: s_mov_b32 s19, s7 -; GFX6-NEXT: v_mov_b32_e32 v0, s44 -; GFX6-NEXT: v_mov_b32_e32 v1, s45 -; GFX6-NEXT: v_mov_b32_e32 v2, s6 -; GFX6-NEXT: v_mov_b32_e32 v4, s42 -; GFX6-NEXT: v_mov_b32_e32 v5, s43 -; GFX6-NEXT: v_mov_b32_e32 v6, s40 -; GFX6-NEXT: v_mov_b32_e32 v7, s41 -; GFX6-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 -; GFX6-NEXT: v_mov_b32_e32 v3, s6 -; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000 -; GFX6-NEXT: s_mov_b32 s35, s7 -; GFX6-NEXT: s_mov_b32 s29, s7 +; GFX6-NEXT: s_mov_b32 s37, s7 +; GFX6-NEXT: s_mov_b32 s31, s7 +; GFX6-NEXT: s_mov_b32 s27, s7 ; GFX6-NEXT: s_mov_b32 s25, s7 -; GFX6-NEXT: s_lshr_b32 s16, s5, 16 +; GFX6-NEXT: s_mov_b32 s23, s7 +; GFX6-NEXT: s_lshr_b32 s18, s5, 16 +; GFX6-NEXT: s_mov_b32 s19, s7 ; GFX6-NEXT: s_mov_b32 s17, s7 ; GFX6-NEXT: s_mov_b32 s15, s7 ; GFX6-NEXT: s_mov_b32 s13, s7 ; GFX6-NEXT: s_mov_b32 s11, s7 ; GFX6-NEXT: s_mov_b32 s9, s7 -; GFX6-NEXT: s_mov_b32 s45, s7 -; GFX6-NEXT: s_mov_b32 s43, s7 -; GFX6-NEXT: s_mov_b32 s41, s7 -; GFX6-NEXT: v_mov_b32_e32 v9, s39 -; GFX6-NEXT: s_mov_b32 s39, s7 -; GFX6-NEXT: v_mov_b32_e32 v11, s37 -; GFX6-NEXT: s_mov_b32 s37, s7 +; GFX6-NEXT: v_mov_b32_e32 v1, s47 +; GFX6-NEXT: v_mov_b32_e32 v2, s6 +; GFX6-NEXT: v_mov_b32_e32 v4, s44 ; GFX6-NEXT: s_mov_b32 s47, s7 -; GFX6-NEXT: v_mov_b32_e32 v15, s31 -; GFX6-NEXT: s_mov_b32 s31, s7 -; GFX6-NEXT: s_mov_b32 s49, s7 -; GFX6-NEXT: v_mov_b32_e32 v19, s27 -; GFX6-NEXT: s_mov_b32 s27, s7 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:496 +; GFX6-NEXT: v_mov_b32_e32 v5, s45 +; GFX6-NEXT: v_mov_b32_e32 v6, s42 +; GFX6-NEXT: s_mov_b32 s55, s7 +; GFX6-NEXT: v_mov_b32_e32 v7, s43 +; GFX6-NEXT: s_mov_b32 s65, s7 +; GFX6-NEXT: v_mov_b32_e32 v9, s41 +; GFX6-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000 +; GFX6-NEXT: s_mov_b32 s61, s7 +; GFX6-NEXT: s_mov_b32 s63, s7 +; GFX6-NEXT: s_mov_b32 s57, s7 +; GFX6-NEXT: v_mov_b32_e32 v15, s35 +; GFX6-NEXT: s_mov_b32 s59, s7 +; GFX6-NEXT: s_mov_b32 s35, s7 +; GFX6-NEXT: v_mov_b32_e32 v19, s29 +; GFX6-NEXT: v_mov_b32_e32 v3, s6 +; GFX6-NEXT: s_mov_b32 s29, s7 ; GFX6-NEXT: s_mov_b32 s51, s7 -; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v3, s23 -; GFX6-NEXT: s_mov_b32 s23, s7 +; GFX6-NEXT: s_mov_b32 s41, s7 +; GFX6-NEXT: s_mov_b32 s67, s7 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[20:21], 0x10000 +; GFX6-NEXT: s_lshr_b32 s36, s5, 24 +; GFX6-NEXT: s_lshr_b32 s16, s5, 17 +; GFX6-NEXT: v_mov_b32_e32 v8, s40 +; GFX6-NEXT: v_mov_b32_e32 v10, s38 +; GFX6-NEXT: v_mov_b32_e32 v11, s39 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:480 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v5, s21 -; GFX6-NEXT: s_mov_b32 s21, s7 -; GFX6-NEXT: s_mov_b32 s53, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[18:19], 0x10000 -; GFX6-NEXT: s_lshr_b32 s34, s5, 24 -; GFX6-NEXT: s_lshr_b32 s14, s5, 17 -; GFX6-NEXT: v_mov_b32_e32 v8, s38 -; GFX6-NEXT: v_mov_b32_e32 v10, s36 ; GFX6-NEXT: v_mov_b32_e32 v6, s6 ; GFX6-NEXT: v_mov_b32_e32 v7, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[16:17], 0x10000 -; GFX6-NEXT: s_lshr_b32 s12, s5, 14 -; GFX6-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[18:19], 0x10000 +; GFX6-NEXT: s_lshr_b32 s14, s5, 14 +; GFX6-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:464 ; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_mov_b32_e32 v8, s6 ; GFX6-NEXT: v_mov_b32_e32 v9, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[14:15], 0x10000 -; GFX6-NEXT: s_lshr_b32 s28, s5, 22 -; GFX6-NEXT: s_lshr_b32 s10, s5, 15 -; GFX6-NEXT: v_mov_b32_e32 v12, s34 -; GFX6-NEXT: v_mov_b32_e32 v13, s35 -; GFX6-NEXT: v_mov_b32_e32 v14, s30 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[16:17], 0x10000 +; GFX6-NEXT: s_lshr_b32 s30, s5, 22 +; GFX6-NEXT: s_lshr_b32 s12, s5, 15 +; GFX6-NEXT: v_mov_b32_e32 v12, s36 +; GFX6-NEXT: v_mov_b32_e32 v13, s37 +; GFX6-NEXT: v_mov_b32_e32 v14, s34 ; GFX6-NEXT: v_mov_b32_e32 v10, s6 ; GFX6-NEXT: v_mov_b32_e32 v11, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[12:13], 0x10000 -; GFX6-NEXT: s_lshr_b32 s8, s5, 12 -; GFX6-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[14:15], 0x10000 +; GFX6-NEXT: s_lshr_b32 s10, s5, 12 +; GFX6-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:448 ; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_mov_b32_e32 v12, s6 ; GFX6-NEXT: v_mov_b32_e32 v13, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[10:11], 0x10000 -; GFX6-NEXT: s_lshr_b32 s24, s5, 20 -; GFX6-NEXT: s_lshr_b32 s44, s5, 13 -; GFX6-NEXT: v_mov_b32_e32 v16, s28 -; GFX6-NEXT: v_mov_b32_e32 v17, s29 -; GFX6-NEXT: v_mov_b32_e32 v18, s26 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[12:13], 0x10000 +; GFX6-NEXT: s_lshr_b32 s26, s5, 20 +; GFX6-NEXT: s_lshr_b32 s24, s5, 21 +; GFX6-NEXT: s_lshr_b32 s8, s5, 13 +; GFX6-NEXT: v_mov_b32_e32 v16, s30 +; GFX6-NEXT: v_mov_b32_e32 v17, s31 +; GFX6-NEXT: v_mov_b32_e32 v18, s28 ; GFX6-NEXT: v_mov_b32_e32 v14, s6 ; GFX6-NEXT: v_mov_b32_e32 v15, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[8:9], 0x10000 -; GFX6-NEXT: s_lshr_b32 s42, s5, 10 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[10:11], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s46 +; GFX6-NEXT: s_lshr_b32 s46, s5, 10 +; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 ; GFX6-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:432 ; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_mov_b32_e32 v16, s6 ; GFX6-NEXT: v_mov_b32_e32 v17, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[44:45], 0x10000 -; GFX6-NEXT: s_lshr_b32 s40, s5, 11 -; GFX6-NEXT: v_mov_b32_e32 v0, s24 -; GFX6-NEXT: v_mov_b32_e32 v1, s25 -; GFX6-NEXT: v_mov_b32_e32 v2, s22 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[8:9], 0x10000 +; GFX6-NEXT: s_lshr_b32 s22, s5, 18 +; GFX6-NEXT: s_lshr_b32 s54, s5, 11 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:496 +; GFX6-NEXT: s_waitcnt expcnt(0) +; GFX6-NEXT: v_mov_b32_e32 v0, s26 +; GFX6-NEXT: v_mov_b32_e32 v1, s27 +; GFX6-NEXT: v_mov_b32_e32 v2, s24 +; GFX6-NEXT: v_mov_b32_e32 v3, s25 ; GFX6-NEXT: v_mov_b32_e32 v18, s6 ; GFX6-NEXT: v_mov_b32_e32 v19, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[42:43], 0x10000 -; GFX6-NEXT: s_lshr_b32 s38, s5, 8 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[46:47], 0x10000 +; GFX6-NEXT: s_lshr_b32 s64, s5, 8 +; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:416 ; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_mov_b32_e32 v0, s6 ; GFX6-NEXT: v_mov_b32_e32 v1, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[40:41], 0x10000 -; GFX6-NEXT: s_lshr_b32 s36, s5, 9 -; GFX6-NEXT: v_mov_b32_e32 v4, s20 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[54:55], 0x10000 +; GFX6-NEXT: s_lshr_b32 s60, s5, 9 +; GFX6-NEXT: v_mov_b32_e32 v4, s22 +; GFX6-NEXT: v_mov_b32_e32 v5, s23 ; GFX6-NEXT: v_mov_b32_e32 v2, s6 ; GFX6-NEXT: v_mov_b32_e32 v3, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[38:39], 0x10000 -; GFX6-NEXT: s_lshr_b32 s46, s5, 6 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[64:65], 0x10000 +; GFX6-NEXT: s_lshr_b32 s62, s5, 6 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:400 ; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_mov_b32_e32 v4, s6 ; GFX6-NEXT: v_mov_b32_e32 v5, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[36:37], 0x10000 -; GFX6-NEXT: s_lshr_b32 s30, s5, 7 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[60:61], 0x10000 +; GFX6-NEXT: s_lshr_b32 s56, s5, 7 ; GFX6-NEXT: v_mov_b32_e32 v6, s6 ; GFX6-NEXT: v_mov_b32_e32 v7, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[46:47], 0x10000 -; GFX6-NEXT: s_lshr_b32 s48, s5, 4 -; GFX6-NEXT: s_lshr_b32 s26, s5, 5 -; GFX6-NEXT: s_lshr_b32 s12, s4, 29 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[62:63], 0x10000 +; GFX6-NEXT: s_lshr_b32 s58, s5, 4 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:384 ; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_mov_b32_e32 v8, s6 ; GFX6-NEXT: v_mov_b32_e32 v9, s7 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[30:31], 0x10000 -; GFX6-NEXT: s_lshr_b32 s24, s4, 26 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[56:57], 0x10000 +; GFX6-NEXT: s_lshr_b32 s34, s5, 5 +; GFX6-NEXT: s_lshr_b32 s52, s4, 30 ; GFX6-NEXT: v_mov_b32_e32 v10, s6 ; GFX6-NEXT: v_mov_b32_e32 v11, s7 -; GFX6-NEXT: s_bfe_i64 s[8:9], s[48:49], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[10:11], s[26:27], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000 -; GFX6-NEXT: s_lshr_b32 s50, s5, 2 -; GFX6-NEXT: s_lshr_b32 s22, s5, 3 -; GFX6-NEXT: s_lshr_b32 s28, s4, 27 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[58:59], 0x10000 +; GFX6-NEXT: s_lshr_b32 s28, s5, 2 +; GFX6-NEXT: s_lshr_b32 s50, s5, 3 +; GFX6-NEXT: s_lshr_b32 s40, s5, 1 +; GFX6-NEXT: s_mov_b32 s66, s5 +; GFX6-NEXT: s_lshr_b32 s44, s4, 31 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:368 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v12, s8 -; GFX6-NEXT: v_mov_b32_e32 v13, s9 -; GFX6-NEXT: v_mov_b32_e32 v14, s10 -; GFX6-NEXT: v_mov_b32_e32 v15, s11 -; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:304 -; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v10, s12 -; GFX6-NEXT: v_mov_b32_e32 v11, s13 -; GFX6-NEXT: s_bfe_i64 s[12:13], s[24:25], 0x10000 -; GFX6-NEXT: s_lshr_b32 s34, s4, 24 -; GFX6-NEXT: s_bfe_i64 s[26:27], s[50:51], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 -; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:288 -; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v12, s12 -; GFX6-NEXT: v_mov_b32_e32 v13, s13 -; GFX6-NEXT: s_bfe_i64 s[12:13], s[28:29], 0x10000 -; GFX6-NEXT: s_lshr_b32 s20, s5, 1 -; GFX6-NEXT: s_mov_b32 s52, s5 -; GFX6-NEXT: s_lshr_b32 s42, s4, 25 -; GFX6-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:352 -; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v16, s26 -; GFX6-NEXT: v_mov_b32_e32 v17, s27 -; GFX6-NEXT: v_mov_b32_e32 v18, s22 -; GFX6-NEXT: v_mov_b32_e32 v19, s23 -; GFX6-NEXT: v_mov_b32_e32 v14, s12 -; GFX6-NEXT: v_mov_b32_e32 v15, s13 -; GFX6-NEXT: s_bfe_i64 s[12:13], s[34:35], 0x10000 -; GFX6-NEXT: s_lshr_b32 s40, s4, 22 -; GFX6-NEXT: s_bfe_i64 s[30:31], s[52:53], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000 -; GFX6-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:272 +; GFX6-NEXT: v_mov_b32_e32 v12, s6 +; GFX6-NEXT: v_mov_b32_e32 v13, s7 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[34:35], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x10000 +; GFX6-NEXT: s_lshr_b32 s48, s4, 28 +; GFX6-NEXT: s_lshr_b32 s16, s4, 23 +; GFX6-NEXT: v_mov_b32_e32 v14, s6 +; GFX6-NEXT: v_mov_b32_e32 v15, s7 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[28:29], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[28:29], s[50:51], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[34:35], s[66:67], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[50:51], s[40:41], 0x10000 +; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:320 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v16, s12 -; GFX6-NEXT: v_mov_b32_e32 v17, s13 -; GFX6-NEXT: s_bfe_i64 s[12:13], s[42:43], 0x10000 -; GFX6-NEXT: s_lshr_b32 s18, s4, 30 -; GFX6-NEXT: s_lshr_b32 s16, s4, 31 -; GFX6-NEXT: s_lshr_b32 s38, s4, 23 +; GFX6-NEXT: v_mov_b32_e32 v4, s52 +; GFX6-NEXT: v_mov_b32_e32 v5, s53 +; GFX6-NEXT: s_bfe_i64 s[52:53], s[44:45], 0x10000 +; GFX6-NEXT: s_lshr_b32 s42, s4, 29 +; GFX6-NEXT: s_lshr_b32 s26, s4, 27 +; GFX6-NEXT: s_lshr_b32 s22, s4, 22 +; GFX6-NEXT: s_lshr_b32 s20, s4, 20 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:336 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s30 -; GFX6-NEXT: v_mov_b32_e32 v1, s31 -; GFX6-NEXT: v_mov_b32_e32 v2, s20 -; GFX6-NEXT: v_mov_b32_e32 v3, s21 -; GFX6-NEXT: v_mov_b32_e32 v18, s12 -; GFX6-NEXT: v_mov_b32_e32 v19, s13 -; GFX6-NEXT: s_bfe_i64 s[12:13], s[40:41], 0x10000 -; GFX6-NEXT: s_lshr_b32 s14, s4, 28 -; GFX6-NEXT: s_lshr_b32 s36, s4, 20 -; GFX6-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s34 +; GFX6-NEXT: v_mov_b32_e32 v1, s35 +; GFX6-NEXT: v_mov_b32_e32 v2, s50 +; GFX6-NEXT: v_mov_b32_e32 v3, s51 +; GFX6-NEXT: v_mov_b32_e32 v6, s52 +; GFX6-NEXT: v_mov_b32_e32 v7, s53 +; GFX6-NEXT: s_bfe_i64 s[52:53], s[48:49], 0x10000 ; GFX6-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000 +; GFX6-NEXT: s_lshr_b32 s38, s4, 26 +; GFX6-NEXT: s_lshr_b32 s36, s4, 24 +; GFX6-NEXT: s_lshr_b32 s24, s4, 25 +; GFX6-NEXT: s_lshr_b32 s14, s4, 21 +; GFX6-NEXT: s_lshr_b32 s10, s4, 18 +; GFX6-NEXT: s_lshr_b32 s18, s4, 19 +; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:304 +; GFX6-NEXT: s_waitcnt expcnt(0) +; GFX6-NEXT: v_mov_b32_e32 v8, s52 +; GFX6-NEXT: v_mov_b32_e32 v9, s53 +; GFX6-NEXT: s_bfe_i64 s[52:53], s[42:43], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:256 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s12 -; GFX6-NEXT: v_mov_b32_e32 v1, s13 -; GFX6-NEXT: s_bfe_i64 s[12:13], s[38:39], 0x10000 -; GFX6-NEXT: s_lshr_b32 s44, s4, 21 -; GFX6-NEXT: s_lshr_b32 s6, s4, 18 -; GFX6-NEXT: s_lshr_b32 s8, s4, 19 -; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:320 +; GFX6-NEXT: v_mov_b32_e32 v2, s16 +; GFX6-NEXT: v_mov_b32_e32 v3, s17 +; GFX6-NEXT: s_bfe_i64 s[16:17], s[20:21], 0x10000 +; GFX6-NEXT: s_lshr_b32 s30, s4, 16 +; GFX6-NEXT: s_lshr_b32 s46, s4, 17 +; GFX6-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:352 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v4, s18 -; GFX6-NEXT: v_mov_b32_e32 v5, s19 -; GFX6-NEXT: v_mov_b32_e32 v6, s16 -; GFX6-NEXT: v_mov_b32_e32 v7, s17 -; GFX6-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000 -; GFX6-NEXT: v_mov_b32_e32 v2, s12 -; GFX6-NEXT: v_mov_b32_e32 v3, s13 -; GFX6-NEXT: s_bfe_i64 s[12:13], s[36:37], 0x10000 -; GFX6-NEXT: s_lshr_b32 s10, s4, 16 -; GFX6-NEXT: s_lshr_b32 s26, s4, 17 -; GFX6-NEXT: v_mov_b32_e32 v8, s14 -; GFX6-NEXT: v_mov_b32_e32 v9, s15 +; GFX6-NEXT: v_mov_b32_e32 v16, s6 +; GFX6-NEXT: v_mov_b32_e32 v17, s7 +; GFX6-NEXT: v_mov_b32_e32 v18, s28 +; GFX6-NEXT: v_mov_b32_e32 v19, s29 +; GFX6-NEXT: v_mov_b32_e32 v10, s52 +; GFX6-NEXT: v_mov_b32_e32 v11, s53 +; GFX6-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000 +; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:288 +; GFX6-NEXT: s_waitcnt expcnt(0) +; GFX6-NEXT: v_mov_b32_e32 v14, s26 +; GFX6-NEXT: v_mov_b32_e32 v15, s27 +; GFX6-NEXT: s_bfe_i64 s[26:27], s[36:37], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s22 +; GFX6-NEXT: v_mov_b32_e32 v1, s23 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:240 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v4, s12 -; GFX6-NEXT: v_mov_b32_e32 v5, s13 -; GFX6-NEXT: s_bfe_i64 s[12:13], s[44:45], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000 -; GFX6-NEXT: s_lshr_b32 s22, s4, 14 -; GFX6-NEXT: s_lshr_b32 s30, s4, 15 -; GFX6-NEXT: v_mov_b32_e32 v6, s12 -; GFX6-NEXT: v_mov_b32_e32 v7, s13 -; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v4, s16 +; GFX6-NEXT: v_mov_b32_e32 v5, s17 +; GFX6-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[16:17], s[18:19], 0x10000 ; GFX6-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 +; GFX6-NEXT: s_lshr_b32 s54, s4, 14 +; GFX6-NEXT: s_lshr_b32 s68, s4, 15 +; GFX6-NEXT: v_mov_b32_e32 v12, s38 +; GFX6-NEXT: v_mov_b32_e32 v13, s39 +; GFX6-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:272 +; GFX6-NEXT: s_waitcnt expcnt(0) +; GFX6-NEXT: v_mov_b32_e32 v16, s26 +; GFX6-NEXT: v_mov_b32_e32 v17, s27 +; GFX6-NEXT: v_mov_b32_e32 v18, s24 +; GFX6-NEXT: v_mov_b32_e32 v19, s25 +; GFX6-NEXT: s_bfe_i64 s[22:23], s[46:47], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[20:21], s[30:31], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v6, s14 +; GFX6-NEXT: v_mov_b32_e32 v7, s15 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:224 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:208 ; GFX6-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:192 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:160 ; GFX6-NEXT: s_waitcnt expcnt(1) -; GFX6-NEXT: v_mov_b32_e32 v0, s6 -; GFX6-NEXT: v_mov_b32_e32 v1, s7 -; GFX6-NEXT: v_mov_b32_e32 v2, s8 -; GFX6-NEXT: v_mov_b32_e32 v3, s9 -; GFX6-NEXT: s_lshr_b32 s20, s4, 12 -; GFX6-NEXT: s_lshr_b32 s18, s4, 13 -; GFX6-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 -; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_mov_b32_e32 v0, s10 ; GFX6-NEXT: v_mov_b32_e32 v1, s11 -; GFX6-NEXT: v_mov_b32_e32 v2, s26 -; GFX6-NEXT: v_mov_b32_e32 v3, s27 -; GFX6-NEXT: s_lshr_b32 s46, s4, 10 -; GFX6-NEXT: s_lshr_b32 s48, s4, 11 -; GFX6-NEXT: s_lshr_b32 s42, s4, 4 -; GFX6-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v2, s16 +; GFX6-NEXT: v_mov_b32_e32 v3, s17 +; GFX6-NEXT: s_lshr_b32 s64, s4, 12 +; GFX6-NEXT: s_lshr_b32 s70, s4, 13 +; GFX6-NEXT: s_bfe_i64 s[26:27], s[68:69], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[24:25], s[54:55], 0x10000 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 +; GFX6-NEXT: s_waitcnt expcnt(0) +; GFX6-NEXT: v_mov_b32_e32 v0, s20 +; GFX6-NEXT: v_mov_b32_e32 v1, s21 +; GFX6-NEXT: v_mov_b32_e32 v2, s22 +; GFX6-NEXT: v_mov_b32_e32 v3, s23 +; GFX6-NEXT: s_lshr_b32 s60, s4, 10 +; GFX6-NEXT: s_lshr_b32 s72, s4, 11 +; GFX6-NEXT: s_bfe_i64 s[38:39], s[70:71], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[36:37], s[64:65], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s22 -; GFX6-NEXT: v_mov_b32_e32 v1, s23 -; GFX6-NEXT: v_mov_b32_e32 v2, s30 -; GFX6-NEXT: v_mov_b32_e32 v3, s31 -; GFX6-NEXT: s_lshr_b32 s50, s4, 8 -; GFX6-NEXT: s_lshr_b32 s24, s4, 9 -; GFX6-NEXT: s_lshr_b32 s40, s4, 5 -; GFX6-NEXT: s_lshr_b32 s36, s4, 1 -; GFX6-NEXT: s_bfe_i64 s[38:39], s[42:43], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[42:43], s[48:49], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[44:45], s[46:47], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s24 +; GFX6-NEXT: v_mov_b32_e32 v1, s25 +; GFX6-NEXT: v_mov_b32_e32 v2, s26 +; GFX6-NEXT: v_mov_b32_e32 v3, s27 +; GFX6-NEXT: s_lshr_b32 s62, s4, 8 +; GFX6-NEXT: s_lshr_b32 s74, s4, 9 +; GFX6-NEXT: s_bfe_i64 s[42:43], s[72:73], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[52:53], s[60:61], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s20 -; GFX6-NEXT: v_mov_b32_e32 v1, s21 -; GFX6-NEXT: v_mov_b32_e32 v2, s18 -; GFX6-NEXT: v_mov_b32_e32 v3, s19 -; GFX6-NEXT: s_lshr_b32 s28, s4, 6 -; GFX6-NEXT: s_lshr_b32 s34, s4, 7 -; GFX6-NEXT: s_lshr_b32 s16, s4, 2 -; GFX6-NEXT: s_lshr_b32 s14, s4, 3 -; GFX6-NEXT: s_bfe_i64 s[12:13], s[4:5], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[4:5], s[36:37], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[36:37], s[40:41], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[40:41], s[50:51], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s36 +; GFX6-NEXT: v_mov_b32_e32 v1, s37 +; GFX6-NEXT: v_mov_b32_e32 v2, s38 +; GFX6-NEXT: v_mov_b32_e32 v3, s39 +; GFX6-NEXT: s_lshr_b32 s56, s4, 6 +; GFX6-NEXT: s_lshr_b32 s76, s4, 7 +; GFX6-NEXT: s_bfe_i64 s[44:45], s[74:75], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[48:49], s[62:63], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s44 -; GFX6-NEXT: v_mov_b32_e32 v1, s45 +; GFX6-NEXT: v_mov_b32_e32 v0, s52 +; GFX6-NEXT: v_mov_b32_e32 v1, s53 ; GFX6-NEXT: v_mov_b32_e32 v2, s42 ; GFX6-NEXT: v_mov_b32_e32 v3, s43 -; GFX6-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 +; GFX6-NEXT: s_lshr_b32 s58, s4, 4 +; GFX6-NEXT: s_lshr_b32 s78, s4, 5 +; GFX6-NEXT: s_bfe_i64 s[40:41], s[76:77], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[50:51], s[56:57], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s40 -; GFX6-NEXT: v_mov_b32_e32 v1, s41 -; GFX6-NEXT: v_mov_b32_e32 v2, s24 -; GFX6-NEXT: v_mov_b32_e32 v3, s25 +; GFX6-NEXT: v_mov_b32_e32 v0, s48 +; GFX6-NEXT: v_mov_b32_e32 v1, s49 +; GFX6-NEXT: v_mov_b32_e32 v2, s44 +; GFX6-NEXT: v_mov_b32_e32 v3, s45 +; GFX6-NEXT: s_lshr_b32 s12, s4, 2 +; GFX6-NEXT: s_lshr_b32 s8, s4, 3 +; GFX6-NEXT: s_bfe_i64 s[28:29], s[78:79], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[34:35], s[58:59], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s28 -; GFX6-NEXT: v_mov_b32_e32 v1, s29 -; GFX6-NEXT: v_mov_b32_e32 v2, s34 -; GFX6-NEXT: v_mov_b32_e32 v3, s35 -; GFX6-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000 -; GFX6-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000 +; GFX6-NEXT: v_mov_b32_e32 v0, s50 +; GFX6-NEXT: v_mov_b32_e32 v1, s51 +; GFX6-NEXT: v_mov_b32_e32 v2, s40 +; GFX6-NEXT: v_mov_b32_e32 v3, s41 +; GFX6-NEXT: s_lshr_b32 s6, s4, 1 +; GFX6-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s38 -; GFX6-NEXT: v_mov_b32_e32 v1, s39 -; GFX6-NEXT: v_mov_b32_e32 v2, s36 -; GFX6-NEXT: v_mov_b32_e32 v3, s37 +; GFX6-NEXT: v_mov_b32_e32 v0, s34 +; GFX6-NEXT: v_mov_b32_e32 v1, s35 +; GFX6-NEXT: v_mov_b32_e32 v2, s28 +; GFX6-NEXT: v_mov_b32_e32 v3, s29 +; GFX6-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x10000 +; GFX6-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 ; GFX6-NEXT: s_waitcnt expcnt(0) -; GFX6-NEXT: v_mov_b32_e32 v0, s16 -; GFX6-NEXT: v_mov_b32_e32 v1, s17 -; GFX6-NEXT: v_mov_b32_e32 v2, s14 -; GFX6-NEXT: v_mov_b32_e32 v3, s15 -; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 -; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: v_mov_b32_e32 v0, s12 ; GFX6-NEXT: v_mov_b32_e32 v1, s13 -; GFX6-NEXT: v_mov_b32_e32 v2, s4 -; GFX6-NEXT: v_mov_b32_e32 v3, s5 +; GFX6-NEXT: v_mov_b32_e32 v2, s8 +; GFX6-NEXT: v_mov_b32_e32 v3, s9 +; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GFX6-NEXT: s_waitcnt expcnt(0) +; GFX6-NEXT: v_mov_b32_e32 v0, s4 +; GFX6-NEXT: v_mov_b32_e32 v1, s5 +; GFX6-NEXT: v_mov_b32_e32 v2, s6 +; GFX6-NEXT: v_mov_b32_e32 v3, s7 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GFX6-NEXT: s_endpgm ; ; GFX8-LABEL: constant_sextload_v64i1_to_v64i64: ; GFX8: ; %bb.0: ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 -; GFX8-NEXT: s_mov_b32 s69, 0 -; GFX8-NEXT: s_mov_b32 s39, s69 -; GFX8-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane -; GFX8-NEXT: s_mov_b32 s73, s69 -; GFX8-NEXT: s_mov_b32 s49, s69 +; GFX8-NEXT: ; implicit-def: $vgpr50 : SGPR spill to VGPR lane +; GFX8-NEXT: s_mov_b32 s27, 0 +; GFX8-NEXT: s_mov_b32 s37, s27 +; GFX8-NEXT: s_mov_b32 s21, s27 +; GFX8-NEXT: s_mov_b32 s25, s27 ; GFX8-NEXT: s_waitcnt lgkmcnt(0) -; GFX8-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 -; GFX8-NEXT: s_mov_b32 s75, s69 -; GFX8-NEXT: s_mov_b32 s43, s69 -; GFX8-NEXT: s_mov_b32 s63, s69 -; GFX8-NEXT: s_mov_b32 s29, s69 +; GFX8-NEXT: s_load_dwordx2 s[62:63], s[2:3], 0x0 +; GFX8-NEXT: s_mov_b32 s29, s27 +; GFX8-NEXT: s_mov_b32 s39, s27 +; GFX8-NEXT: s_mov_b32 s47, s27 +; GFX8-NEXT: s_mov_b32 s15, s27 ; GFX8-NEXT: s_waitcnt lgkmcnt(0) -; GFX8-NEXT: s_lshr_b32 s38, s3, 19 -; GFX8-NEXT: s_lshr_b32 s4, s3, 9 -; GFX8-NEXT: s_lshr_b32 s40, s3, 15 -; GFX8-NEXT: s_lshr_b32 s44, s3, 12 -; GFX8-NEXT: s_lshr_b32 s54, s3, 11 -; GFX8-NEXT: v_writelane_b32 v62, s4, 0 -; GFX8-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000 -; GFX8-NEXT: s_lshr_b32 s64, s3, 30 -; GFX8-NEXT: s_lshr_b32 s60, s3, 31 -; GFX8-NEXT: s_lshr_b32 s66, s3, 28 -; GFX8-NEXT: s_lshr_b32 s58, s3, 29 -; GFX8-NEXT: s_lshr_b32 s70, s3, 26 -; GFX8-NEXT: s_lshr_b32 s56, s3, 27 -; GFX8-NEXT: s_lshr_b32 s68, s3, 24 -; GFX8-NEXT: s_lshr_b32 s52, s3, 25 -; GFX8-NEXT: s_lshr_b32 s72, s3, 22 -; GFX8-NEXT: s_lshr_b32 s48, s3, 23 -; GFX8-NEXT: s_lshr_b32 s74, s3, 20 -; GFX8-NEXT: s_lshr_b32 s42, s3, 21 -; GFX8-NEXT: s_lshr_b32 s62, s3, 18 -; GFX8-NEXT: s_lshr_b32 s28, s3, 16 -; GFX8-NEXT: s_lshr_b32 s34, s3, 17 -; GFX8-NEXT: s_mov_b32 s35, s69 -; GFX8-NEXT: s_lshr_b32 s36, s3, 14 -; GFX8-NEXT: s_lshr_b32 s18, s3, 8 -; GFX8-NEXT: v_writelane_b32 v62, s5, 1 -; GFX8-NEXT: v_mov_b32_e32 v26, s38 -; GFX8-NEXT: v_mov_b32_e32 v27, s39 -; GFX8-NEXT: s_bfe_i64 s[38:39], s[54:55], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[4:5], s[44:45], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000 -; GFX8-NEXT: s_lshr_b32 s46, s3, 13 -; GFX8-NEXT: s_mov_b32 s23, s69 -; GFX8-NEXT: s_bfe_i64 s[74:75], s[74:75], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[72:73], s[72:73], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[68:69], s[68:69], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[70:71], s[70:71], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[66:67], s[66:67], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[64:65], s[64:65], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[62:63], s[62:63], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[60:61], s[60:61], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[58:59], s[58:59], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[56:57], s[56:57], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 -; GFX8-NEXT: v_mov_b32_e32 v42, s40 -; GFX8-NEXT: v_mov_b32_e32 v28, s4 -; GFX8-NEXT: s_lshr_b32 s4, s2, 7 -; GFX8-NEXT: s_lshr_b32 s40, s2, 4 -; GFX8-NEXT: v_mov_b32_e32 v34, s38 -; GFX8-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000 -; GFX8-NEXT: s_lshr_b32 s38, s2, 1 -; GFX8-NEXT: s_lshr_b32 s50, s3, 10 -; GFX8-NEXT: s_lshr_b32 s6, s3, 6 -; GFX8-NEXT: s_lshr_b32 s8, s3, 7 -; GFX8-NEXT: s_lshr_b32 s10, s3, 4 -; GFX8-NEXT: s_lshr_b32 s12, s3, 5 -; GFX8-NEXT: s_lshr_b32 s14, s3, 2 -; GFX8-NEXT: s_lshr_b32 s16, s3, 3 -; GFX8-NEXT: s_lshr_b32 s20, s3, 1 -; GFX8-NEXT: s_mov_b32 s22, s3 -; GFX8-NEXT: s_lshr_b32 s24, s2, 30 -; GFX8-NEXT: s_lshr_b32 s26, s2, 31 -; GFX8-NEXT: s_lshr_b32 s30, s2, 28 -; GFX8-NEXT: v_mov_b32_e32 v12, s64 -; GFX8-NEXT: v_mov_b32_e32 v4, s66 -; GFX8-NEXT: v_mov_b32_e32 v0, s70 -; GFX8-NEXT: v_mov_b32_e32 v8, s68 -; GFX8-NEXT: v_mov_b32_e32 v16, s72 -; GFX8-NEXT: v_mov_b32_e32 v20, s74 -; GFX8-NEXT: s_lshr_b32 s82, s2, 29 -; GFX8-NEXT: s_lshr_b32 s84, s2, 26 -; GFX8-NEXT: v_mov_b32_e32 v24, s62 -; GFX8-NEXT: s_lshr_b32 s80, s2, 27 -; GFX8-NEXT: s_lshr_b32 s78, s2, 24 -; GFX8-NEXT: s_lshr_b32 s76, s2, 25 -; GFX8-NEXT: v_mov_b32_e32 v14, s60 -; GFX8-NEXT: s_lshr_b32 s74, s2, 22 -; GFX8-NEXT: s_lshr_b32 s72, s2, 23 -; GFX8-NEXT: v_mov_b32_e32 v6, s58 -; GFX8-NEXT: s_lshr_b32 s70, s2, 20 -; GFX8-NEXT: s_lshr_b32 s68, s2, 21 -; GFX8-NEXT: v_mov_b32_e32 v2, s56 -; GFX8-NEXT: s_lshr_b32 s66, s2, 18 -; GFX8-NEXT: s_lshr_b32 s64, s2, 19 -; GFX8-NEXT: v_mov_b32_e32 v10, s52 -; GFX8-NEXT: s_lshr_b32 s62, s2, 16 -; GFX8-NEXT: s_lshr_b32 s60, s2, 17 -; GFX8-NEXT: v_mov_b32_e32 v18, s48 -; GFX8-NEXT: s_lshr_b32 s58, s2, 14 -; GFX8-NEXT: s_lshr_b32 s56, s2, 15 -; GFX8-NEXT: v_mov_b32_e32 v22, s42 -; GFX8-NEXT: s_lshr_b32 s86, s2, 12 -; GFX8-NEXT: s_lshr_b32 s52, s2, 13 -; GFX8-NEXT: s_lshr_b32 vcc_lo, s2, 10 -; GFX8-NEXT: s_bfe_i64 s[54:55], s[46:47], 0x10000 -; GFX8-NEXT: v_mov_b32_e32 v36, s28 -; GFX8-NEXT: s_lshr_b32 s48, s2, 11 -; GFX8-NEXT: v_mov_b32_e32 v38, s34 -; GFX8-NEXT: s_lshr_b32 s46, s2, 8 -; GFX8-NEXT: v_mov_b32_e32 v40, s36 -; GFX8-NEXT: s_lshr_b32 s44, s2, 9 -; GFX8-NEXT: v_mov_b32_e32 v43, s41 -; GFX8-NEXT: s_lshr_b32 s42, s2, 6 -; GFX8-NEXT: v_mov_b32_e32 v29, s5 -; GFX8-NEXT: s_lshr_b32 s36, s2, 5 -; GFX8-NEXT: v_mov_b32_e32 v35, s39 -; GFX8-NEXT: s_lshr_b32 s34, s2, 2 -; GFX8-NEXT: v_mov_b32_e32 v44, s18 -; GFX8-NEXT: v_mov_b32_e32 v45, s19 -; GFX8-NEXT: s_lshr_b32 s28, s2, 3 -; GFX8-NEXT: s_bfe_i64 s[18:19], s[2:3], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[2:3], s[38:39], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[38:39], s[40:41], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[40:41], s[4:5], 0x10000 -; GFX8-NEXT: v_readlane_b32 s4, v62, 0 -; GFX8-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x10000 -; GFX8-NEXT: v_readlane_b32 s5, v62, 1 -; GFX8-NEXT: v_mov_b32_e32 v13, s65 -; GFX8-NEXT: v_mov_b32_e32 v15, s61 -; GFX8-NEXT: v_mov_b32_e32 v5, s67 -; GFX8-NEXT: v_mov_b32_e32 v7, s59 -; GFX8-NEXT: v_mov_b32_e32 v1, s71 -; GFX8-NEXT: v_mov_b32_e32 v3, s57 -; GFX8-NEXT: v_mov_b32_e32 v9, s69 -; GFX8-NEXT: v_mov_b32_e32 v11, s53 -; GFX8-NEXT: v_mov_b32_e32 v17, s73 -; GFX8-NEXT: v_mov_b32_e32 v19, s49 -; GFX8-NEXT: v_mov_b32_e32 v21, s75 -; GFX8-NEXT: v_mov_b32_e32 v23, s43 -; GFX8-NEXT: v_mov_b32_e32 v25, s63 -; GFX8-NEXT: v_mov_b32_e32 v37, s29 -; GFX8-NEXT: v_mov_b32_e32 v39, s35 -; GFX8-NEXT: v_mov_b32_e32 v41, s37 -; GFX8-NEXT: v_mov_b32_e32 v30, s54 -; GFX8-NEXT: v_mov_b32_e32 v31, s55 -; GFX8-NEXT: v_mov_b32_e32 v32, s50 -; GFX8-NEXT: v_mov_b32_e32 v33, s51 -; GFX8-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[50:51], vcc, 0x10000 -; GFX8-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[54:55], s[86:87], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[56:57], s[56:57], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[58:59], s[58:59], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[60:61], s[60:61], 0x10000 +; GFX8-NEXT: s_lshr_b32 s2, s63, 14 +; GFX8-NEXT: v_writelane_b32 v50, s2, 0 +; GFX8-NEXT: v_writelane_b32 v50, s3, 1 +; GFX8-NEXT: s_lshr_b32 s2, s63, 15 +; GFX8-NEXT: v_writelane_b32 v50, s2, 2 +; GFX8-NEXT: v_writelane_b32 v50, s3, 3 +; GFX8-NEXT: s_lshr_b32 s2, s63, 12 +; GFX8-NEXT: v_writelane_b32 v50, s2, 4 +; GFX8-NEXT: v_writelane_b32 v50, s3, 5 +; GFX8-NEXT: s_lshr_b32 s2, s63, 13 +; GFX8-NEXT: v_writelane_b32 v50, s2, 6 +; GFX8-NEXT: v_writelane_b32 v50, s3, 7 +; GFX8-NEXT: s_lshr_b32 s2, s63, 10 +; GFX8-NEXT: v_writelane_b32 v50, s2, 8 +; GFX8-NEXT: v_writelane_b32 v50, s3, 9 +; GFX8-NEXT: s_lshr_b32 s2, s63, 11 +; GFX8-NEXT: v_writelane_b32 v50, s2, 10 +; GFX8-NEXT: v_writelane_b32 v50, s3, 11 +; GFX8-NEXT: s_lshr_b32 s2, s63, 8 +; GFX8-NEXT: v_writelane_b32 v50, s2, 12 +; GFX8-NEXT: v_writelane_b32 v50, s3, 13 +; GFX8-NEXT: s_lshr_b32 s2, s63, 9 +; GFX8-NEXT: v_writelane_b32 v50, s2, 14 +; GFX8-NEXT: v_writelane_b32 v50, s3, 15 +; GFX8-NEXT: s_lshr_b32 s2, s63, 6 +; GFX8-NEXT: v_writelane_b32 v50, s2, 16 +; GFX8-NEXT: v_writelane_b32 v50, s3, 17 +; GFX8-NEXT: s_lshr_b32 s2, s63, 7 +; GFX8-NEXT: v_writelane_b32 v50, s2, 18 +; GFX8-NEXT: v_writelane_b32 v50, s3, 19 +; GFX8-NEXT: s_lshr_b32 s2, s63, 4 +; GFX8-NEXT: v_writelane_b32 v50, s2, 20 +; GFX8-NEXT: v_writelane_b32 v50, s3, 21 +; GFX8-NEXT: s_lshr_b32 s2, s63, 5 +; GFX8-NEXT: v_writelane_b32 v50, s2, 22 +; GFX8-NEXT: v_writelane_b32 v50, s3, 23 +; GFX8-NEXT: s_lshr_b32 s2, s63, 2 +; GFX8-NEXT: v_writelane_b32 v50, s2, 24 +; GFX8-NEXT: v_writelane_b32 v50, s3, 25 +; GFX8-NEXT: s_lshr_b32 s2, s63, 3 +; GFX8-NEXT: v_writelane_b32 v50, s2, 26 +; GFX8-NEXT: v_writelane_b32 v50, s3, 27 +; GFX8-NEXT: s_lshr_b32 s2, s63, 1 +; GFX8-NEXT: v_writelane_b32 v50, s2, 28 +; GFX8-NEXT: v_writelane_b32 v50, s3, 29 +; GFX8-NEXT: s_lshr_b32 s2, s62, 30 +; GFX8-NEXT: v_writelane_b32 v50, s2, 30 +; GFX8-NEXT: v_writelane_b32 v50, s3, 31 +; GFX8-NEXT: s_lshr_b32 s2, s62, 31 +; GFX8-NEXT: v_writelane_b32 v50, s2, 32 +; GFX8-NEXT: v_writelane_b32 v50, s3, 33 +; GFX8-NEXT: s_lshr_b32 s2, s62, 28 +; GFX8-NEXT: v_writelane_b32 v50, s2, 34 +; GFX8-NEXT: s_lshr_b32 s22, s63, 30 +; GFX8-NEXT: s_lshr_b32 s30, s63, 31 +; GFX8-NEXT: v_writelane_b32 v50, s3, 35 +; GFX8-NEXT: s_lshr_b32 s2, s62, 29 +; GFX8-NEXT: v_writelane_b32 v50, s2, 36 +; GFX8-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000 +; GFX8-NEXT: s_lshr_b32 s42, s63, 28 +; GFX8-NEXT: s_lshr_b32 s44, s63, 29 +; GFX8-NEXT: s_lshr_b32 s48, s63, 26 +; GFX8-NEXT: s_lshr_b32 s66, s63, 27 +; GFX8-NEXT: s_lshr_b32 s26, s63, 24 +; GFX8-NEXT: s_lshr_b32 s64, s63, 25 +; GFX8-NEXT: s_lshr_b32 s20, s63, 22 +; GFX8-NEXT: s_lshr_b32 s24, s63, 23 +; GFX8-NEXT: s_lshr_b32 s28, s63, 20 +; GFX8-NEXT: s_lshr_b32 s38, s63, 21 +; GFX8-NEXT: s_lshr_b32 s46, s63, 18 +; GFX8-NEXT: s_lshr_b32 s14, s63, 19 +; GFX8-NEXT: s_lshr_b32 s18, s63, 16 +; GFX8-NEXT: s_lshr_b32 s36, s63, 17 +; GFX8-NEXT: s_mov_b32 s16, s63 +; GFX8-NEXT: v_writelane_b32 v50, s3, 37 +; GFX8-NEXT: s_lshr_b32 s86, s62, 26 +; GFX8-NEXT: s_lshr_b32 vcc_lo, s62, 27 +; GFX8-NEXT: s_lshr_b32 s84, s62, 24 +; GFX8-NEXT: s_lshr_b32 s82, s62, 25 +; GFX8-NEXT: s_lshr_b32 s80, s62, 22 +; GFX8-NEXT: s_lshr_b32 s78, s62, 23 +; GFX8-NEXT: s_lshr_b32 s76, s62, 20 +; GFX8-NEXT: s_lshr_b32 s74, s62, 21 +; GFX8-NEXT: s_lshr_b32 s72, s62, 18 +; GFX8-NEXT: s_lshr_b32 s70, s62, 19 +; GFX8-NEXT: s_lshr_b32 s68, s62, 16 +; GFX8-NEXT: s_lshr_b32 s60, s62, 17 +; GFX8-NEXT: s_lshr_b32 s58, s62, 14 +; GFX8-NEXT: s_lshr_b32 s56, s62, 15 +; GFX8-NEXT: s_lshr_b32 s54, s62, 12 +; GFX8-NEXT: s_lshr_b32 s52, s62, 13 +; GFX8-NEXT: s_lshr_b32 s50, s62, 10 +; GFX8-NEXT: s_lshr_b32 s40, s62, 11 +; GFX8-NEXT: s_lshr_b32 s34, s62, 8 +; GFX8-NEXT: s_lshr_b32 s12, s62, 9 +; GFX8-NEXT: s_lshr_b32 s10, s62, 6 +; GFX8-NEXT: s_lshr_b32 s8, s62, 7 +; GFX8-NEXT: s_lshr_b32 s6, s62, 4 +; GFX8-NEXT: s_lshr_b32 s4, s62, 5 +; GFX8-NEXT: s_lshr_b32 s2, s62, 2 +; GFX8-NEXT: v_mov_b32_e32 v8, s22 +; GFX8-NEXT: s_lshr_b32 s22, s62, 3 +; GFX8-NEXT: v_mov_b32_e32 v10, s30 +; GFX8-NEXT: s_lshr_b32 s30, s62, 1 ; GFX8-NEXT: s_bfe_i64 s[62:63], s[62:63], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[64:65], s[64:65], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[66:67], s[66:67], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[68:69], s[68:69], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[70:71], s[70:71], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[72:73], s[72:73], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[74:75], s[74:75], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[76:77], s[76:77], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[78:79], s[78:79], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[80:81], s[80:81], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[84:85], s[84:85], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[82:83], s[82:83], 0x10000 +; GFX8-NEXT: v_writelane_b32 v50, s62, 38 +; GFX8-NEXT: v_writelane_b32 v50, s63, 39 +; GFX8-NEXT: v_mov_b32_e32 v11, s31 ; GFX8-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000 +; GFX8-NEXT: v_writelane_b32 v50, s30, 40 +; GFX8-NEXT: v_mov_b32_e32 v9, s23 +; GFX8-NEXT: v_writelane_b32 v50, s31, 41 ; GFX8-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000 +; GFX8-NEXT: v_writelane_b32 v50, s22, 42 +; GFX8-NEXT: v_writelane_b32 v50, s23, 43 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000 +; GFX8-NEXT: v_writelane_b32 v50, s2, 44 +; GFX8-NEXT: v_writelane_b32 v50, s3, 45 +; GFX8-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[66:67], 0x10000 +; GFX8-NEXT: v_writelane_b32 v50, s4, 46 +; GFX8-NEXT: v_mov_b32_e32 v2, s2 +; GFX8-NEXT: v_writelane_b32 v50, s5, 47 +; GFX8-NEXT: v_mov_b32_e32 v3, s3 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[6:7], 0x10000 +; GFX8-NEXT: v_writelane_b32 v50, s2, 48 +; GFX8-NEXT: v_writelane_b32 v50, s3, 49 +; GFX8-NEXT: s_bfe_i64 s[4:5], s[8:9], 0x10000 +; GFX8-NEXT: v_writelane_b32 v50, s4, 50 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[26:27], 0x10000 +; GFX8-NEXT: v_writelane_b32 v50, s5, 51 +; GFX8-NEXT: s_bfe_i64 s[4:5], s[10:11], 0x10000 +; GFX8-NEXT: v_mov_b32_e32 v16, s2 +; GFX8-NEXT: v_mov_b32_e32 v17, s3 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[64:65], 0x10000 +; GFX8-NEXT: v_writelane_b32 v50, s4, 52 +; GFX8-NEXT: v_mov_b32_e32 v18, s2 +; GFX8-NEXT: v_writelane_b32 v50, s5, 53 +; GFX8-NEXT: v_mov_b32_e32 v19, s3 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[12:13], 0x10000 +; GFX8-NEXT: v_writelane_b32 v50, s2, 54 +; GFX8-NEXT: v_writelane_b32 v50, s3, 55 +; GFX8-NEXT: s_bfe_i64 s[10:11], s[36:37], 0x10000 +; GFX8-NEXT: v_mov_b32_e32 v30, s10 +; GFX8-NEXT: v_mov_b32_e32 v31, s11 +; GFX8-NEXT: v_readlane_b32 s10, v50, 0 +; GFX8-NEXT: v_readlane_b32 s11, v50, 1 ; GFX8-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000 +; GFX8-NEXT: v_mov_b32_e32 v32, s10 +; GFX8-NEXT: v_mov_b32_e32 v33, s11 +; GFX8-NEXT: v_readlane_b32 s10, v50, 2 +; GFX8-NEXT: v_readlane_b32 s11, v50, 3 +; GFX8-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 +; GFX8-NEXT: v_mov_b32_e32 v34, s10 +; GFX8-NEXT: v_mov_b32_e32 v35, s11 +; GFX8-NEXT: v_readlane_b32 s10, v50, 4 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[20:21], 0x10000 +; GFX8-NEXT: v_readlane_b32 s11, v50, 5 +; GFX8-NEXT: v_mov_b32_e32 v24, s2 +; GFX8-NEXT: v_mov_b32_e32 v25, s3 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[24:25], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 +; GFX8-NEXT: v_mov_b32_e32 v26, s2 +; GFX8-NEXT: v_mov_b32_e32 v27, s3 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[28:29], 0x10000 +; GFX8-NEXT: v_mov_b32_e32 v36, s10 +; GFX8-NEXT: v_mov_b32_e32 v37, s11 +; GFX8-NEXT: v_readlane_b32 s10, v50, 6 +; GFX8-NEXT: v_mov_b32_e32 v12, s2 +; GFX8-NEXT: v_mov_b32_e32 v13, s3 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[38:39], 0x10000 +; GFX8-NEXT: v_readlane_b32 s11, v50, 7 +; GFX8-NEXT: v_mov_b32_e32 v14, s2 +; GFX8-NEXT: v_mov_b32_e32 v15, s3 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[46:47], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 +; GFX8-NEXT: v_mov_b32_e32 v20, s2 +; GFX8-NEXT: v_mov_b32_e32 v21, s3 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[14:15], 0x10000 +; GFX8-NEXT: v_mov_b32_e32 v38, s10 +; GFX8-NEXT: v_mov_b32_e32 v39, s11 +; GFX8-NEXT: v_readlane_b32 s10, v50, 8 +; GFX8-NEXT: v_mov_b32_e32 v22, s2 +; GFX8-NEXT: v_mov_b32_e32 v23, s3 +; GFX8-NEXT: v_readlane_b32 s2, v50, 36 +; GFX8-NEXT: v_readlane_b32 s11, v50, 9 +; GFX8-NEXT: s_mov_b32 s19, s27 +; GFX8-NEXT: v_readlane_b32 s3, v50, 37 +; GFX8-NEXT: v_readlane_b32 s4, v50, 34 +; GFX8-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[24:25], s[50:51], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[50:51], s[80:81], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[80:81], s[2:3], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[18:19], 0x10000 +; GFX8-NEXT: v_readlane_b32 s5, v50, 35 +; GFX8-NEXT: v_mov_b32_e32 v40, s10 +; GFX8-NEXT: v_mov_b32_e32 v41, s11 +; GFX8-NEXT: v_readlane_b32 s10, v50, 10 +; GFX8-NEXT: v_mov_b32_e32 v4, s42 +; GFX8-NEXT: v_mov_b32_e32 v5, s43 +; GFX8-NEXT: s_bfe_i64 s[42:43], s[72:73], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[72:73], s[86:87], 0x10000 +; GFX8-NEXT: v_mov_b32_e32 v28, s2 +; GFX8-NEXT: s_bfe_i64 s[86:87], s[4:5], 0x10000 +; GFX8-NEXT: v_readlane_b32 s4, v50, 32 +; GFX8-NEXT: v_mov_b32_e32 v29, s3 +; GFX8-NEXT: v_readlane_b32 s2, v50, 30 +; GFX8-NEXT: v_readlane_b32 s11, v50, 11 +; GFX8-NEXT: s_mov_b32 s17, s27 +; GFX8-NEXT: s_bfe_i64 s[30:31], s[44:45], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[22:23], s[48:49], 0x10000 +; GFX8-NEXT: v_readlane_b32 s5, v50, 33 +; GFX8-NEXT: v_readlane_b32 s3, v50, 31 +; GFX8-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 +; GFX8-NEXT: v_mov_b32_e32 v6, s30 +; GFX8-NEXT: v_mov_b32_e32 v7, s31 +; GFX8-NEXT: v_mov_b32_e32 v0, s22 +; GFX8-NEXT: v_mov_b32_e32 v1, s23 +; GFX8-NEXT: s_bfe_i64 s[30:31], s[58:59], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[58:59], s[4:5], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[8:9], s[2:3], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[4:5], s[16:17], 0x10000 +; GFX8-NEXT: v_readlane_b32 s2, v50, 28 +; GFX8-NEXT: v_readlane_b32 s6, v50, 26 +; GFX8-NEXT: v_readlane_b32 s12, v50, 24 +; GFX8-NEXT: v_readlane_b32 s14, v50, 22 +; GFX8-NEXT: v_readlane_b32 s16, v50, 20 +; GFX8-NEXT: v_readlane_b32 s18, v50, 18 +; GFX8-NEXT: v_readlane_b32 s22, v50, 16 +; GFX8-NEXT: v_mov_b32_e32 v42, s10 +; GFX8-NEXT: v_readlane_b32 s36, v50, 14 +; GFX8-NEXT: v_mov_b32_e32 v43, s11 +; GFX8-NEXT: v_readlane_b32 s10, v50, 12 +; GFX8-NEXT: v_readlane_b32 s3, v50, 29 +; GFX8-NEXT: v_readlane_b32 s7, v50, 27 +; GFX8-NEXT: v_readlane_b32 s13, v50, 25 +; GFX8-NEXT: v_readlane_b32 s15, v50, 23 +; GFX8-NEXT: v_readlane_b32 s17, v50, 21 +; GFX8-NEXT: v_readlane_b32 s19, v50, 19 +; GFX8-NEXT: v_readlane_b32 s23, v50, 17 +; GFX8-NEXT: v_readlane_b32 s37, v50, 15 +; GFX8-NEXT: v_readlane_b32 s11, v50, 13 +; GFX8-NEXT: s_bfe_i64 s[66:67], s[34:35], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[62:63], s[40:41], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[26:27], s[52:53], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[28:29], s[54:55], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[20:21], s[56:57], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[34:35], s[60:61], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[38:39], s[68:69], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[40:41], s[70:71], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[44:45], s[74:75], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[46:47], s[76:77], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[48:49], s[78:79], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[52:53], s[82:83], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[64:65], s[84:85], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[70:71], vcc, 0x10000 +; GFX8-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000 ; GFX8-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000 -; GFX8-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x10000 -; GFX8-NEXT: s_add_u32 s86, s0, 0x1f0 -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v46, s86 -; GFX8-NEXT: v_mov_b32_e32 v47, s87 -; GFX8-NEXT: s_add_u32 s86, s0, 0x1e0 -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v48, s86 -; GFX8-NEXT: v_mov_b32_e32 v49, s87 -; GFX8-NEXT: s_add_u32 s86, s0, 0x1d0 -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v50, s86 -; GFX8-NEXT: v_mov_b32_e32 v51, s87 -; GFX8-NEXT: s_add_u32 s86, s0, 0x1c0 -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v52, s86 -; GFX8-NEXT: v_mov_b32_e32 v53, s87 -; GFX8-NEXT: s_add_u32 s86, s0, 0x1b0 -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v54, s86 -; GFX8-NEXT: v_mov_b32_e32 v55, s87 -; GFX8-NEXT: s_add_u32 s86, s0, 0x1a0 -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v56, s86 -; GFX8-NEXT: v_mov_b32_e32 v57, s87 -; GFX8-NEXT: s_add_u32 s86, s0, 0x190 -; GFX8-NEXT: flat_store_dwordx4 v[46:47], v[12:15] -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v12, s86 -; GFX8-NEXT: v_mov_b32_e32 v13, s87 -; GFX8-NEXT: s_add_u32 s86, s0, 0x180 -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v14, s86 -; GFX8-NEXT: v_mov_b32_e32 v15, s87 -; GFX8-NEXT: s_add_u32 s86, s0, 0x170 -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v58, s86 -; GFX8-NEXT: v_mov_b32_e32 v59, s87 -; GFX8-NEXT: s_add_u32 s86, s0, 0x160 -; GFX8-NEXT: flat_store_dwordx4 v[48:49], v[4:7] -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v6, s86 -; GFX8-NEXT: v_mov_b32_e32 v7, s87 -; GFX8-NEXT: s_add_u32 s86, s0, 0x150 -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v48, s86 -; GFX8-NEXT: v_mov_b32_e32 v49, s87 -; GFX8-NEXT: s_add_u32 s86, s0, 0x140 -; GFX8-NEXT: s_addc_u32 s87, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v46, s4 -; GFX8-NEXT: s_add_u32 s4, s0, 0x130 -; GFX8-NEXT: v_mov_b32_e32 v47, s5 -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: flat_store_dwordx4 v[50:51], v[0:3] -; GFX8-NEXT: flat_store_dwordx4 v[52:53], v[8:11] -; GFX8-NEXT: flat_store_dwordx4 v[54:55], v[16:19] -; GFX8-NEXT: flat_store_dwordx4 v[56:57], v[20:23] -; GFX8-NEXT: flat_store_dwordx4 v[12:13], v[24:27] -; GFX8-NEXT: v_mov_b32_e32 v9, s5 -; GFX8-NEXT: v_mov_b32_e32 v8, s4 -; GFX8-NEXT: s_add_u32 s4, s0, 0x120 -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v11, s5 -; GFX8-NEXT: v_mov_b32_e32 v60, s86 -; GFX8-NEXT: v_mov_b32_e32 v4, s10 -; GFX8-NEXT: v_mov_b32_e32 v5, s11 -; GFX8-NEXT: v_mov_b32_e32 v10, s4 -; GFX8-NEXT: s_add_u32 s4, s0, 0x110 -; GFX8-NEXT: v_mov_b32_e32 v61, s87 -; GFX8-NEXT: v_mov_b32_e32 v0, s6 -; GFX8-NEXT: v_mov_b32_e32 v1, s7 -; GFX8-NEXT: v_mov_b32_e32 v2, s8 -; GFX8-NEXT: v_mov_b32_e32 v3, s9 +; GFX8-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[54:55], s[36:37], 0x10000 +; GFX8-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 +; GFX8-NEXT: s_add_u32 s36, s0, 0x1f0 +; GFX8-NEXT: s_addc_u32 s37, s1, 0 +; GFX8-NEXT: s_add_u32 s56, s0, 0x1e0 +; GFX8-NEXT: s_addc_u32 s57, s1, 0 +; GFX8-NEXT: s_add_u32 s60, s0, 0x1d0 +; GFX8-NEXT: s_addc_u32 s61, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v45, s37 +; GFX8-NEXT: v_mov_b32_e32 v44, s36 +; GFX8-NEXT: s_add_u32 s36, s0, 0x1c0 +; GFX8-NEXT: v_mov_b32_e32 v46, s56 +; GFX8-NEXT: s_addc_u32 s37, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v47, s57 +; GFX8-NEXT: s_add_u32 s56, s0, 0x1b0 +; GFX8-NEXT: v_mov_b32_e32 v48, s60 +; GFX8-NEXT: s_addc_u32 s57, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v49, s61 +; GFX8-NEXT: s_add_u32 s60, s0, 0x1a0 +; GFX8-NEXT: flat_store_dwordx4 v[44:45], v[8:11] +; GFX8-NEXT: s_addc_u32 s61, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v10, s36 +; GFX8-NEXT: v_mov_b32_e32 v11, s37 +; GFX8-NEXT: s_add_u32 s36, s0, 0x190 +; GFX8-NEXT: v_mov_b32_e32 v44, s56 +; GFX8-NEXT: s_addc_u32 s37, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v45, s57 +; GFX8-NEXT: s_add_u32 s56, s0, 0x180 +; GFX8-NEXT: s_addc_u32 s57, s1, 0 +; GFX8-NEXT: flat_store_dwordx4 v[48:49], v[0:3] +; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[16:19] +; GFX8-NEXT: flat_store_dwordx4 v[44:45], v[24:27] +; GFX8-NEXT: v_mov_b32_e32 v0, s10 +; GFX8-NEXT: s_add_u32 s10, s0, 0x170 +; GFX8-NEXT: v_mov_b32_e32 v1, s11 +; GFX8-NEXT: s_addc_u32 s11, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v10, s10 +; GFX8-NEXT: v_mov_b32_e32 v8, s60 +; GFX8-NEXT: v_mov_b32_e32 v11, s11 +; GFX8-NEXT: s_add_u32 s10, s0, 0x160 +; GFX8-NEXT: v_mov_b32_e32 v9, s61 +; GFX8-NEXT: s_addc_u32 s11, s1, 0 +; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[12:15] +; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[32:35] +; GFX8-NEXT: v_mov_b32_e32 v13, s11 +; GFX8-NEXT: v_mov_b32_e32 v12, s10 +; GFX8-NEXT: s_add_u32 s10, s0, 0x150 +; GFX8-NEXT: s_addc_u32 s11, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v15, s11 +; GFX8-NEXT: v_mov_b32_e32 v14, s10 +; GFX8-NEXT: s_add_u32 s10, s0, 0x140 +; GFX8-NEXT: s_addc_u32 s11, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v17, s11 +; GFX8-NEXT: v_mov_b32_e32 v16, s10 +; GFX8-NEXT: s_add_u32 s10, s0, 0x130 +; GFX8-NEXT: s_addc_u32 s11, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v10, s10 +; GFX8-NEXT: flat_store_dwordx4 v[46:47], v[4:7] +; GFX8-NEXT: v_mov_b32_e32 v11, s11 +; GFX8-NEXT: v_mov_b32_e32 v4, s36 +; GFX8-NEXT: v_mov_b32_e32 v6, s56 +; GFX8-NEXT: s_add_u32 s10, s0, 0x120 +; GFX8-NEXT: v_mov_b32_e32 v5, s37 +; GFX8-NEXT: v_mov_b32_e32 v7, s57 +; GFX8-NEXT: v_mov_b32_e32 v2, s54 +; GFX8-NEXT: s_addc_u32 s11, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v3, s55 +; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[20:23] +; GFX8-NEXT: v_mov_b32_e32 v4, s22 +; GFX8-NEXT: v_mov_b32_e32 v5, s23 ; GFX8-NEXT: flat_store_dwordx4 v[6:7], v[28:31] -; GFX8-NEXT: v_mov_b32_e32 v6, s12 -; GFX8-NEXT: v_mov_b32_e32 v7, s13 -; GFX8-NEXT: flat_store_dwordx4 v[48:49], v[32:35] -; GFX8-NEXT: flat_store_dwordx4 v[60:61], v[44:47] -; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3] +; GFX8-NEXT: v_mov_b32_e32 v6, s18 +; GFX8-NEXT: v_mov_b32_e32 v7, s19 +; GFX8-NEXT: flat_store_dwordx4 v[12:13], v[36:39] +; GFX8-NEXT: flat_store_dwordx4 v[14:15], v[40:43] +; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s14 -; GFX8-NEXT: v_mov_b32_e32 v1, s15 -; GFX8-NEXT: v_mov_b32_e32 v2, s16 -; GFX8-NEXT: v_mov_b32_e32 v3, s17 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0x100 -; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s22 -; GFX8-NEXT: v_mov_b32_e32 v1, s23 -; GFX8-NEXT: v_mov_b32_e32 v2, s20 -; GFX8-NEXT: v_mov_b32_e32 v3, s21 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0xf0 +; GFX8-NEXT: v_mov_b32_e32 v0, s10 +; GFX8-NEXT: v_mov_b32_e32 v2, s6 +; GFX8-NEXT: s_add_u32 s6, s0, 0x110 +; GFX8-NEXT: v_mov_b32_e32 v8, s16 +; GFX8-NEXT: v_mov_b32_e32 v9, s17 +; GFX8-NEXT: v_mov_b32_e32 v10, s14 +; GFX8-NEXT: v_mov_b32_e32 v11, s15 +; GFX8-NEXT: v_mov_b32_e32 v1, s11 +; GFX8-NEXT: v_mov_b32_e32 v3, s7 +; GFX8-NEXT: s_addc_u32 s7, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v4, s6 +; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[8:11] +; GFX8-NEXT: v_mov_b32_e32 v0, s12 +; GFX8-NEXT: v_mov_b32_e32 v1, s13 +; GFX8-NEXT: v_mov_b32_e32 v5, s7 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s24 -; GFX8-NEXT: v_mov_b32_e32 v1, s25 -; GFX8-NEXT: v_mov_b32_e32 v2, s26 -; GFX8-NEXT: v_mov_b32_e32 v3, s27 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0xe0 +; GFX8-NEXT: s_nop 0 +; GFX8-NEXT: v_mov_b32_e32 v2, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0x100 +; GFX8-NEXT: v_mov_b32_e32 v3, s3 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0xf0 +; GFX8-NEXT: v_mov_b32_e32 v0, s4 +; GFX8-NEXT: v_mov_b32_e32 v1, s5 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s30 -; GFX8-NEXT: v_mov_b32_e32 v1, s31 -; GFX8-NEXT: v_mov_b32_e32 v2, s82 -; GFX8-NEXT: v_mov_b32_e32 v3, s83 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0xd0 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0xe0 +; GFX8-NEXT: v_mov_b32_e32 v0, s8 +; GFX8-NEXT: v_mov_b32_e32 v1, s9 +; GFX8-NEXT: v_mov_b32_e32 v2, s58 +; GFX8-NEXT: v_mov_b32_e32 v3, s59 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s84 -; GFX8-NEXT: v_mov_b32_e32 v1, s85 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0xd0 +; GFX8-NEXT: v_mov_b32_e32 v0, s86 +; GFX8-NEXT: v_mov_b32_e32 v1, s87 ; GFX8-NEXT: v_mov_b32_e32 v2, s80 ; GFX8-NEXT: v_mov_b32_e32 v3, s81 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0xc0 -; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s78 -; GFX8-NEXT: v_mov_b32_e32 v1, s79 -; GFX8-NEXT: v_mov_b32_e32 v2, s76 -; GFX8-NEXT: v_mov_b32_e32 v3, s77 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0xb0 -; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s74 -; GFX8-NEXT: v_mov_b32_e32 v1, s75 -; GFX8-NEXT: v_mov_b32_e32 v2, s72 -; GFX8-NEXT: v_mov_b32_e32 v3, s73 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0xa0 -; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s70 -; GFX8-NEXT: v_mov_b32_e32 v1, s71 -; GFX8-NEXT: v_mov_b32_e32 v2, s68 -; GFX8-NEXT: v_mov_b32_e32 v3, s69 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0x90 -; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s66 -; GFX8-NEXT: v_mov_b32_e32 v1, s67 -; GFX8-NEXT: v_mov_b32_e32 v2, s64 -; GFX8-NEXT: v_mov_b32_e32 v3, s65 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0x80 -; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s62 -; GFX8-NEXT: v_mov_b32_e32 v1, s63 -; GFX8-NEXT: v_mov_b32_e32 v2, s60 -; GFX8-NEXT: v_mov_b32_e32 v3, s61 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0x70 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s58 -; GFX8-NEXT: v_mov_b32_e32 v1, s59 -; GFX8-NEXT: v_mov_b32_e32 v2, s56 -; GFX8-NEXT: v_mov_b32_e32 v3, s57 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0x60 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0xc0 +; GFX8-NEXT: v_mov_b32_e32 v0, s72 +; GFX8-NEXT: v_mov_b32_e32 v1, s73 +; GFX8-NEXT: v_mov_b32_e32 v2, s70 +; GFX8-NEXT: v_mov_b32_e32 v3, s71 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s54 -; GFX8-NEXT: v_mov_b32_e32 v1, s55 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0xb0 +; GFX8-NEXT: v_mov_b32_e32 v0, s64 +; GFX8-NEXT: v_mov_b32_e32 v1, s65 ; GFX8-NEXT: v_mov_b32_e32 v2, s52 ; GFX8-NEXT: v_mov_b32_e32 v3, s53 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 0x50 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0xa0 ; GFX8-NEXT: v_mov_b32_e32 v0, s50 ; GFX8-NEXT: v_mov_b32_e32 v1, s51 ; GFX8-NEXT: v_mov_b32_e32 v2, s48 ; GFX8-NEXT: v_mov_b32_e32 v3, s49 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 64 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0x90 ; GFX8-NEXT: v_mov_b32_e32 v0, s46 ; GFX8-NEXT: v_mov_b32_e32 v1, s47 ; GFX8-NEXT: v_mov_b32_e32 v2, s44 ; GFX8-NEXT: v_mov_b32_e32 v3, s45 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 48 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0x80 ; GFX8-NEXT: v_mov_b32_e32 v0, s42 ; GFX8-NEXT: v_mov_b32_e32 v1, s43 ; GFX8-NEXT: v_mov_b32_e32 v2, s40 ; GFX8-NEXT: v_mov_b32_e32 v3, s41 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 32 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0x70 ; GFX8-NEXT: v_mov_b32_e32 v0, s38 ; GFX8-NEXT: v_mov_b32_e32 v1, s39 -; GFX8-NEXT: v_mov_b32_e32 v2, s36 -; GFX8-NEXT: v_mov_b32_e32 v3, s37 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 -; GFX8-NEXT: s_add_u32 s4, s0, 16 +; GFX8-NEXT: v_mov_b32_e32 v2, s34 +; GFX8-NEXT: v_mov_b32_e32 v3, s35 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX8-NEXT: s_addc_u32 s5, s1, 0 -; GFX8-NEXT: v_mov_b32_e32 v4, s4 -; GFX8-NEXT: v_mov_b32_e32 v0, s34 -; GFX8-NEXT: v_mov_b32_e32 v1, s35 -; GFX8-NEXT: v_mov_b32_e32 v2, s28 -; GFX8-NEXT: v_mov_b32_e32 v3, s29 -; GFX8-NEXT: v_mov_b32_e32 v5, s5 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0x60 +; GFX8-NEXT: v_mov_b32_e32 v0, s30 +; GFX8-NEXT: v_mov_b32_e32 v1, s31 +; GFX8-NEXT: v_mov_b32_e32 v2, s20 +; GFX8-NEXT: v_mov_b32_e32 v3, s21 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 +; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 0x50 +; GFX8-NEXT: v_mov_b32_e32 v0, s28 +; GFX8-NEXT: v_mov_b32_e32 v1, s29 +; GFX8-NEXT: v_mov_b32_e32 v2, s26 +; GFX8-NEXT: v_mov_b32_e32 v3, s27 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 +; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v0, s24 +; GFX8-NEXT: v_mov_b32_e32 v1, s25 +; GFX8-NEXT: v_mov_b32_e32 v2, s62 +; GFX8-NEXT: v_mov_b32_e32 v3, s63 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: v_readlane_b32 s2, v50, 54 +; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX8-NEXT: v_readlane_b32 s3, v50, 55 +; GFX8-NEXT: v_mov_b32_e32 v2, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 64 +; GFX8-NEXT: v_mov_b32_e32 v3, s3 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: v_readlane_b32 s2, v50, 52 +; GFX8-NEXT: v_mov_b32_e32 v0, s66 +; GFX8-NEXT: v_mov_b32_e32 v1, s67 +; GFX8-NEXT: v_readlane_b32 s3, v50, 53 +; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX8-NEXT: s_nop 0 +; GFX8-NEXT: v_mov_b32_e32 v0, s2 +; GFX8-NEXT: v_mov_b32_e32 v1, s3 +; GFX8-NEXT: v_readlane_b32 s2, v50, 50 +; GFX8-NEXT: v_readlane_b32 s3, v50, 51 +; GFX8-NEXT: v_mov_b32_e32 v2, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 48 +; GFX8-NEXT: v_mov_b32_e32 v3, s3 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: v_readlane_b32 s2, v50, 48 +; GFX8-NEXT: v_readlane_b32 s3, v50, 49 +; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX8-NEXT: s_nop 0 +; GFX8-NEXT: v_mov_b32_e32 v0, s2 +; GFX8-NEXT: v_mov_b32_e32 v1, s3 +; GFX8-NEXT: v_readlane_b32 s2, v50, 46 +; GFX8-NEXT: v_readlane_b32 s3, v50, 47 +; GFX8-NEXT: v_mov_b32_e32 v2, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 32 +; GFX8-NEXT: v_mov_b32_e32 v3, s3 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: v_readlane_b32 s2, v50, 44 +; GFX8-NEXT: v_readlane_b32 s3, v50, 45 +; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX8-NEXT: s_nop 0 +; GFX8-NEXT: v_mov_b32_e32 v0, s2 +; GFX8-NEXT: v_mov_b32_e32 v1, s3 +; GFX8-NEXT: v_readlane_b32 s2, v50, 42 +; GFX8-NEXT: v_readlane_b32 s3, v50, 43 +; GFX8-NEXT: v_mov_b32_e32 v2, s2 +; GFX8-NEXT: s_add_u32 s2, s0, 16 +; GFX8-NEXT: v_mov_b32_e32 v3, s3 +; GFX8-NEXT: s_addc_u32 s3, s1, 0 +; GFX8-NEXT: v_mov_b32_e32 v5, s3 +; GFX8-NEXT: v_mov_b32_e32 v4, s2 +; GFX8-NEXT: v_readlane_b32 s2, v50, 38 +; GFX8-NEXT: v_readlane_b32 s3, v50, 39 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: v_mov_b32_e32 v5, s1 -; GFX8-NEXT: v_mov_b32_e32 v0, s18 -; GFX8-NEXT: v_mov_b32_e32 v1, s19 +; GFX8-NEXT: v_mov_b32_e32 v0, s2 +; GFX8-NEXT: v_mov_b32_e32 v1, s3 +; GFX8-NEXT: v_readlane_b32 s2, v50, 40 +; GFX8-NEXT: v_readlane_b32 s3, v50, 41 ; GFX8-NEXT: v_mov_b32_e32 v2, s2 ; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: v_mov_b32_e32 v4, s0 -; GFX8-NEXT: flat_store_dwordx4 v[14:15], v[36:39] -; GFX8-NEXT: flat_store_dwordx4 v[58:59], v[40:43] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: s_endpgm ; @@ -11044,541 +11156,770 @@ define amdgpu_kernel void @constant_sextload_v64i1_to_v64i64(ptr addrspace(1) %o ; ; GFX12-LABEL: constant_sextload_v64i1_to_v64i64: ; GFX12: ; %bb.0: -; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 -; GFX12-NEXT: s_mov_b32 s61, 0 +; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x24 +; GFX12-NEXT: ; implicit-def: $vgpr30 : SGPR spill to VGPR lane +; GFX12-NEXT: ; implicit-def: $vgpr29 : SGPR spill to VGPR lane +; GFX12-NEXT: s_mov_b32 s75, 0 ; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX12-NEXT: s_mov_b32 s55, s61 -; GFX12-NEXT: s_mov_b32 s43, s61 -; GFX12-NEXT: s_mov_b32 s51, s61 -; GFX12-NEXT: s_mov_b32 s29, s61 -; GFX12-NEXT: s_mov_b32 s39, s61 -; GFX12-NEXT: s_mov_b32 s17, s61 -; GFX12-NEXT: s_mov_b32 s25, s61 -; GFX12-NEXT: s_mov_b32 s49, s61 +; GFX12-NEXT: s_mov_b32 s59, s75 +; GFX12-NEXT: s_mov_b32 s57, s75 +; GFX12-NEXT: s_mov_b32 s61, s75 +; GFX12-NEXT: s_mov_b32 s67, s75 +; GFX12-NEXT: s_mov_b32 s63, s75 +; GFX12-NEXT: s_mov_b32 s53, s75 +; GFX12-NEXT: s_mov_b32 s23, s75 +; GFX12-NEXT: s_mov_b32 s71, s75 +; GFX12-NEXT: s_mov_b32 s55, s75 ; GFX12-NEXT: s_wait_kmcnt 0x0 -; GFX12-NEXT: s_load_b64 s[4:5], s[2:3], 0x0 -; GFX12-NEXT: s_mov_b32 s3, s61 +; GFX12-NEXT: s_load_b64 s[16:17], s[10:11], 0x0 ; GFX12-NEXT: s_wait_kmcnt 0x0 -; GFX12-NEXT: s_lshr_b32 s98, s5, 30 -; GFX12-NEXT: s_lshr_b32 s90, s5, 31 -; GFX12-NEXT: s_lshr_b32 s96, s5, 28 -; GFX12-NEXT: s_lshr_b32 s76, s5, 29 -; GFX12-NEXT: s_lshr_b32 s72, s5, 27 -; GFX12-NEXT: s_lshr_b32 s60, s5, 24 -; GFX12-NEXT: s_lshr_b32 s86, s5, 26 -; GFX12-NEXT: s_bfe_i64 s[98:99], s[98:99], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[90:91], s[90:91], 0x10000 -; GFX12-NEXT: s_lshr_b32 s64, s5, 25 -; GFX12-NEXT: s_bfe_i64 s[96:97], s[96:97], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[76:77], s[76:77], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[72:73], s[72:73], 0x10000 +; GFX12-NEXT: s_lshr_b32 s0, s17, 27 +; GFX12-NEXT: s_lshr_b32 s82, s17, 30 +; GFX12-NEXT: v_writelane_b32 v30, s0, 0 +; GFX12-NEXT: s_lshr_b32 s86, s17, 31 +; GFX12-NEXT: s_lshr_b32 s92, s17, 28 +; GFX12-NEXT: s_lshr_b32 s102, s17, 29 +; GFX12-NEXT: s_lshr_b32 s100, s17, 26 +; GFX12-NEXT: v_writelane_b32 v30, s1, 1 +; GFX12-NEXT: s_lshr_b32 s0, s17, 25 +; GFX12-NEXT: s_lshr_b32 s74, s17, 24 +; GFX12-NEXT: s_lshr_b32 s70, s17, 22 +; GFX12-NEXT: s_lshr_b32 s66, s17, 23 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 2 +; GFX12-NEXT: s_lshr_b32 s62, s17, 20 +; GFX12-NEXT: s_lshr_b32 s60, s17, 21 +; GFX12-NEXT: s_lshr_b32 s58, s17, 18 +; GFX12-NEXT: s_lshr_b32 s56, s17, 19 +; GFX12-NEXT: v_writelane_b32 v30, s1, 3 +; GFX12-NEXT: s_lshr_b32 s0, s17, 14 +; GFX12-NEXT: s_lshr_b32 s52, s17, 16 +; GFX12-NEXT: s_lshr_b32 s54, s17, 17 +; GFX12-NEXT: s_lshr_b32 vcc_lo, s17, 5 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 4 +; GFX12-NEXT: s_lshr_b32 s98, s17, 2 +; GFX12-NEXT: s_lshr_b32 s96, s17, 3 +; GFX12-NEXT: s_lshr_b32 s94, s17, 1 +; GFX12-NEXT: s_mov_b32 s22, s17 +; GFX12-NEXT: v_writelane_b32 v30, s1, 5 +; GFX12-NEXT: s_lshr_b32 s0, s17, 15 +; GFX12-NEXT: s_lshr_b32 s90, s16, 30 +; GFX12-NEXT: s_lshr_b32 s88, s16, 31 +; GFX12-NEXT: s_lshr_b32 s84, s16, 28 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 6 +; GFX12-NEXT: s_lshr_b32 s80, s16, 29 +; GFX12-NEXT: s_lshr_b32 s64, s16, 26 +; GFX12-NEXT: s_lshr_b32 s28, s16, 27 +; GFX12-NEXT: s_lshr_b32 s26, s16, 24 +; GFX12-NEXT: v_writelane_b32 v30, s1, 7 +; GFX12-NEXT: s_lshr_b32 s0, s17, 12 +; GFX12-NEXT: s_lshr_b32 s24, s16, 25 +; GFX12-NEXT: s_lshr_b32 s50, s16, 22 +; GFX12-NEXT: s_lshr_b32 s48, s16, 23 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 8 +; GFX12-NEXT: s_lshr_b32 s46, s16, 20 +; GFX12-NEXT: s_lshr_b32 s44, s16, 21 +; GFX12-NEXT: s_lshr_b32 s42, s16, 18 +; GFX12-NEXT: s_lshr_b32 s40, s16, 19 +; GFX12-NEXT: v_writelane_b32 v30, s1, 9 +; GFX12-NEXT: s_lshr_b32 s0, s17, 13 +; GFX12-NEXT: s_lshr_b32 s38, s16, 16 +; GFX12-NEXT: s_lshr_b32 s36, s16, 17 +; GFX12-NEXT: s_lshr_b32 s34, s16, 14 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 10 +; GFX12-NEXT: s_lshr_b32 s30, s16, 15 +; GFX12-NEXT: s_lshr_b32 s20, s16, 12 +; GFX12-NEXT: s_lshr_b32 s68, s16, 13 +; GFX12-NEXT: s_lshr_b32 s72, s16, 10 +; GFX12-NEXT: v_writelane_b32 v30, s1, 11 +; GFX12-NEXT: s_lshr_b32 s0, s17, 10 +; GFX12-NEXT: s_lshr_b32 s76, s16, 11 +; GFX12-NEXT: s_lshr_b32 s78, s16, 8 +; GFX12-NEXT: s_lshr_b32 s18, s16, 9 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 12 +; GFX12-NEXT: s_lshr_b32 s14, s16, 6 +; GFX12-NEXT: s_lshr_b32 s10, s16, 7 +; GFX12-NEXT: s_lshr_b32 s12, s16, 4 +; GFX12-NEXT: s_lshr_b32 s6, s16, 5 +; GFX12-NEXT: v_writelane_b32 v30, s1, 13 +; GFX12-NEXT: s_lshr_b32 s0, s17, 11 +; GFX12-NEXT: s_lshr_b32 s4, s16, 2 +; GFX12-NEXT: s_lshr_b32 s2, s16, 3 +; GFX12-NEXT: s_bfe_i64 s[58:59], s[58:59], 0x10000 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 14 +; GFX12-NEXT: s_bfe_i64 s[56:57], s[56:57], 0x10000 ; GFX12-NEXT: s_bfe_i64 s[60:61], s[60:61], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s98 -; GFX12-NEXT: s_lshr_b32 s54, s5, 22 -; GFX12-NEXT: s_lshr_b32 s42, s5, 23 -; GFX12-NEXT: v_dual_mov_b32 v2, s99 :: v_dual_mov_b32 v3, s90 -; GFX12-NEXT: v_dual_mov_b32 v4, s91 :: v_dual_mov_b32 v5, s96 -; GFX12-NEXT: s_bfe_i64 s[86:87], s[86:87], 0x10000 -; GFX12-NEXT: s_lshr_b32 s50, s5, 20 -; GFX12-NEXT: s_lshr_b32 s28, s5, 21 -; GFX12-NEXT: s_lshr_b32 s2, s5, 17 -; GFX12-NEXT: s_lshr_b32 s6, s5, 14 -; GFX12-NEXT: s_lshr_b32 s8, s5, 15 -; GFX12-NEXT: v_dual_mov_b32 v6, s97 :: v_dual_mov_b32 v7, s76 -; GFX12-NEXT: v_dual_mov_b32 v8, s77 :: v_dual_mov_b32 v9, s86 -; GFX12-NEXT: v_dual_mov_b32 v12, s73 :: v_dual_mov_b32 v13, s60 -; GFX12-NEXT: v_mov_b32_e32 v14, s61 -; GFX12-NEXT: s_bfe_i64 s[60:61], s[64:65], 0x10000 -; GFX12-NEXT: s_lshr_b32 s38, s5, 18 -; GFX12-NEXT: s_lshr_b32 s16, s5, 19 -; GFX12-NEXT: s_lshr_b32 s10, s5, 12 -; GFX12-NEXT: s_lshr_b32 s12, s5, 13 -; GFX12-NEXT: v_dual_mov_b32 v10, s87 :: v_dual_mov_b32 v11, s72 -; GFX12-NEXT: s_bfe_i64 s[54:55], s[54:55], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 -; GFX12-NEXT: s_lshr_b32 s24, s5, 16 -; GFX12-NEXT: s_lshr_b32 s14, s5, 10 -; GFX12-NEXT: s_lshr_b32 s18, s5, 11 +; GFX12-NEXT: v_dual_mov_b32 v26, s59 :: v_dual_mov_b32 v27, s56 +; GFX12-NEXT: v_writelane_b32 v30, s1, 15 +; GFX12-NEXT: s_lshr_b32 s0, s17, 8 +; GFX12-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x10000 +; GFX12-NEXT: v_mov_b32_e32 v28, s57 +; GFX12-NEXT: v_dual_mov_b32 v24, s61 :: v_dual_mov_b32 v25, s58 ; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) -; GFX12-NEXT: v_dual_mov_b32 v15, s60 :: v_dual_mov_b32 v16, s61 -; GFX12-NEXT: v_mov_b32_e32 v17, s54 +; GFX12-NEXT: v_writelane_b32 v30, s0, 16 +; GFX12-NEXT: s_bfe_i64 s[54:55], s[54:55], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000 ; GFX12-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000 -; GFX12-NEXT: s_lshr_b32 s20, s5, 8 -; GFX12-NEXT: s_lshr_b32 s22, s5, 9 -; GFX12-NEXT: v_dual_mov_b32 v18, s55 :: v_dual_mov_b32 v19, s42 -; GFX12-NEXT: v_dual_mov_b32 v20, s43 :: v_dual_mov_b32 v21, s50 -; GFX12-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 -; GFX12-NEXT: s_lshr_b32 s26, s5, 6 -; GFX12-NEXT: s_lshr_b32 s30, s5, 7 -; GFX12-NEXT: v_dual_mov_b32 v22, s51 :: v_dual_mov_b32 v23, s28 -; GFX12-NEXT: v_dual_mov_b32 v24, s29 :: v_dual_mov_b32 v25, s38 -; GFX12-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000 -; GFX12-NEXT: s_clause 0x1 -; GFX12-NEXT: global_store_b128 v0, v[1:4], s[0:1] offset:496 -; GFX12-NEXT: global_store_b128 v0, v[5:8], s[0:1] offset:480 -; GFX12-NEXT: v_dual_mov_b32 v32, s3 :: v_dual_mov_b32 v1, s6 -; GFX12-NEXT: v_dual_mov_b32 v2, s7 :: v_dual_mov_b32 v3, s8 -; GFX12-NEXT: v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10 -; GFX12-NEXT: s_lshr_b32 s34, s5, 4 -; GFX12-NEXT: s_lshr_b32 s36, s5, 5 -; GFX12-NEXT: s_lshr_b32 s40, s5, 2 -; GFX12-NEXT: s_lshr_b32 s44, s5, 3 -; GFX12-NEXT: v_dual_mov_b32 v26, s39 :: v_dual_mov_b32 v27, s16 -; GFX12-NEXT: v_dual_mov_b32 v28, s17 :: v_dual_mov_b32 v29, s24 -; GFX12-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v7, s12 -; GFX12-NEXT: v_mov_b32_e32 v8, s13 -; GFX12-NEXT: s_lshr_b32 s46, s5, 1 -; GFX12-NEXT: s_mov_b32 s48, s5 -; GFX12-NEXT: v_dual_mov_b32 v30, s25 :: v_dual_mov_b32 v31, s2 -; GFX12-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 -; GFX12-NEXT: s_clause 0x5 -; GFX12-NEXT: global_store_b128 v0, v[9:12], s[0:1] offset:464 -; GFX12-NEXT: global_store_b128 v0, v[13:16], s[0:1] offset:448 -; GFX12-NEXT: global_store_b128 v0, v[17:20], s[0:1] offset:432 -; GFX12-NEXT: global_store_b128 v0, v[21:24], s[0:1] offset:416 -; GFX12-NEXT: global_store_b128 v0, v[25:28], s[0:1] offset:400 -; GFX12-NEXT: global_store_b128 v0, v[29:32], s[0:1] offset:384 -; GFX12-NEXT: v_dual_mov_b32 v9, s14 :: v_dual_mov_b32 v10, s15 -; GFX12-NEXT: v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19 -; GFX12-NEXT: v_mov_b32_e32 v13, s20 -; GFX12-NEXT: s_lshr_b32 s52, s4, 30 -; GFX12-NEXT: s_lshr_b32 s56, s4, 31 ; GFX12-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x10000 +; GFX12-NEXT: v_writelane_b32 v30, s1, 17 +; GFX12-NEXT: s_lshr_b32 s0, s17, 9 +; GFX12-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x10000 ; GFX12-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 18 ; GFX12-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000 ; GFX12-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v14, s21 :: v_dual_mov_b32 v15, s22 -; GFX12-NEXT: v_dual_mov_b32 v16, s23 :: v_dual_mov_b32 v17, s26 -; GFX12-NEXT: s_lshr_b32 s58, s4, 28 -; GFX12-NEXT: s_lshr_b32 s62, s4, 29 -; GFX12-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v18, s27 :: v_dual_mov_b32 v19, s30 -; GFX12-NEXT: v_dual_mov_b32 v20, s31 :: v_dual_mov_b32 v21, s34 -; GFX12-NEXT: s_lshr_b32 s66, s4, 26 -; GFX12-NEXT: s_lshr_b32 s68, s4, 27 -; GFX12-NEXT: s_bfe_i64 s[56:57], s[56:57], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v22, s35 :: v_dual_mov_b32 v23, s36 -; GFX12-NEXT: v_mov_b32_e32 v24, s37 -; GFX12-NEXT: s_clause 0x5 -; GFX12-NEXT: global_store_b128 v0, v[1:4], s[0:1] offset:368 -; GFX12-NEXT: global_store_b128 v0, v[5:8], s[0:1] offset:352 -; GFX12-NEXT: global_store_b128 v0, v[9:12], s[0:1] offset:336 -; GFX12-NEXT: global_store_b128 v0, v[13:16], s[0:1] offset:320 -; GFX12-NEXT: global_store_b128 v0, v[17:20], s[0:1] offset:304 -; GFX12-NEXT: global_store_b128 v0, v[21:24], s[0:1] offset:288 -; GFX12-NEXT: v_dual_mov_b32 v1, s40 :: v_dual_mov_b32 v2, s41 -; GFX12-NEXT: v_dual_mov_b32 v3, s44 :: v_dual_mov_b32 v4, s45 -; GFX12-NEXT: v_mov_b32_e32 v5, s48 -; GFX12-NEXT: s_lshr_b32 s70, s4, 24 -; GFX12-NEXT: s_lshr_b32 s74, s4, 25 -; GFX12-NEXT: s_lshr_b32 s78, s4, 22 -; GFX12-NEXT: s_lshr_b32 s80, s4, 23 -; GFX12-NEXT: s_bfe_i64 s[62:63], s[62:63], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[58:59], s[58:59], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v6, s49 :: v_dual_mov_b32 v7, s46 -; GFX12-NEXT: v_dual_mov_b32 v8, s47 :: v_dual_mov_b32 v9, s52 -; GFX12-NEXT: s_lshr_b32 s82, s4, 20 -; GFX12-NEXT: s_lshr_b32 s84, s4, 21 -; GFX12-NEXT: s_bfe_i64 s[68:69], s[68:69], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[66:67], s[66:67], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v10, s53 :: v_dual_mov_b32 v11, s56 -; GFX12-NEXT: v_dual_mov_b32 v12, s57 :: v_dual_mov_b32 v13, s58 -; GFX12-NEXT: s_lshr_b32 s88, s4, 18 -; GFX12-NEXT: s_lshr_b32 s92, s4, 19 -; GFX12-NEXT: s_bfe_i64 s[80:81], s[80:81], 0x10000 +; GFX12-NEXT: v_writelane_b32 v30, s1, 19 +; GFX12-NEXT: s_lshr_b32 s0, s17, 6 ; GFX12-NEXT: s_bfe_i64 s[78:79], s[78:79], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[74:75], s[74:75], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[70:71], s[70:71], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v14, s59 :: v_dual_mov_b32 v15, s62 -; GFX12-NEXT: v_dual_mov_b32 v16, s63 :: v_dual_mov_b32 v17, s66 -; GFX12-NEXT: s_lshr_b32 s94, s4, 16 -; GFX12-NEXT: s_lshr_b32 s100, s4, 17 -; GFX12-NEXT: s_bfe_i64 s[84:85], s[84:85], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[82:83], s[82:83], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v18, s67 :: v_dual_mov_b32 v19, s68 -; GFX12-NEXT: v_dual_mov_b32 v20, s69 :: v_dual_mov_b32 v21, s70 -; GFX12-NEXT: s_lshr_b32 s98, s4, 14 -; GFX12-NEXT: s_lshr_b32 s102, s4, 15 -; GFX12-NEXT: s_lshr_b32 s96, s4, 13 -; GFX12-NEXT: s_lshr_b32 s86, s4, 8 -; GFX12-NEXT: s_lshr_b32 s64, s4, 7 -; GFX12-NEXT: s_lshr_b32 s50, s4, 5 -; GFX12-NEXT: s_lshr_b32 s38, s4, 3 -; GFX12-NEXT: s_lshr_b32 s24, s4, 1 -; GFX12-NEXT: s_bfe_i64 s[92:93], s[92:93], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[88:89], s[88:89], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v22, s71 :: v_dual_mov_b32 v23, s74 -; GFX12-NEXT: v_mov_b32_e32 v24, s75 -; GFX12-NEXT: s_clause 0x5 -; GFX12-NEXT: global_store_b128 v0, v[1:4], s[0:1] offset:272 -; GFX12-NEXT: global_store_b128 v0, v[5:8], s[0:1] offset:256 -; GFX12-NEXT: global_store_b128 v0, v[9:12], s[0:1] offset:240 -; GFX12-NEXT: global_store_b128 v0, v[13:16], s[0:1] offset:224 -; GFX12-NEXT: global_store_b128 v0, v[17:20], s[0:1] offset:208 -; GFX12-NEXT: global_store_b128 v0, v[21:24], s[0:1] offset:192 -; GFX12-NEXT: v_dual_mov_b32 v1, s78 :: v_dual_mov_b32 v2, s79 -; GFX12-NEXT: v_dual_mov_b32 v3, s80 :: v_dual_mov_b32 v4, s81 -; GFX12-NEXT: v_mov_b32_e32 v5, s82 -; GFX12-NEXT: s_lshr_b32 s90, s4, 12 -; GFX12-NEXT: s_lshr_b32 s76, s4, 10 -; GFX12-NEXT: s_lshr_b32 s72, s4, 11 -; GFX12-NEXT: s_bfe_i64 s[100:101], s[100:101], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[94:95], s[94:95], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v6, s83 :: v_dual_mov_b32 v7, s84 -; GFX12-NEXT: v_dual_mov_b32 v8, s85 :: v_dual_mov_b32 v9, s88 -; GFX12-NEXT: s_lshr_b32 s60, s4, 9 -; GFX12-NEXT: s_lshr_b32 s54, s4, 6 -; GFX12-NEXT: s_lshr_b32 s42, s4, 4 -; GFX12-NEXT: s_lshr_b32 s28, s4, 2 -; GFX12-NEXT: s_bfe_i64 s[16:17], s[4:5], 0x10000 -; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) -; GFX12-NEXT: s_bfe_i64 s[4:5], s[24:25], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[24:25], s[38:39], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[38:39], s[50:51], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[50:51], s[64:65], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[64:65], s[86:87], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[86:87], s[96:97], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[96:97], s[102:103], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[98:99], s[98:99], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v10, s89 :: v_dual_mov_b32 v11, s92 -; GFX12-NEXT: v_dual_mov_b32 v12, s93 :: v_dual_mov_b32 v13, s94 +; GFX12-NEXT: s_bfe_i64 s[68:69], s[68:69], 0x10000 ; GFX12-NEXT: s_bfe_i64 s[72:73], s[72:73], 0x10000 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 20 ; GFX12-NEXT: s_bfe_i64 s[76:77], s[76:77], 0x10000 -; GFX12-NEXT: s_bfe_i64 s[90:91], s[90:91], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v14, s95 :: v_dual_mov_b32 v15, s100 +; GFX12-NEXT: v_mov_b32_e32 v23, s60 +; GFX12-NEXT: v_writelane_b32 v30, s1, 21 +; GFX12-NEXT: s_lshr_b32 s0, s17, 7 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 22 +; GFX12-NEXT: v_writelane_b32 v30, s1, 23 +; GFX12-NEXT: s_lshr_b32 s0, s17, 4 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 24 +; GFX12-NEXT: v_writelane_b32 v30, s1, 25 +; GFX12-NEXT: s_lshr_b32 s0, s16, 1 +; GFX12-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x10000 +; GFX12-NEXT: v_writelane_b32 v30, s16, 26 +; GFX12-NEXT: v_writelane_b32 v30, s17, 27 +; GFX12-NEXT: s_bfe_i64 s[16:17], s[20:21], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[20:21], s[70:71], 0x10000 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: v_mov_b32_e32 v17, s20 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 28 +; GFX12-NEXT: v_writelane_b32 v30, s1, 29 +; GFX12-NEXT: s_bfe_i64 s[0:1], s[2:3], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[2:3], s[86:87], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[86:87], s[26:27], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[26:27], s[62:63], 0x10000 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v30, s0, 30 +; GFX12-NEXT: v_dual_mov_b32 v22, s27 :: v_dual_mov_b32 v3, s2 +; GFX12-NEXT: v_mov_b32_e32 v21, s26 +; GFX12-NEXT: v_writelane_b32 v30, s1, 31 +; GFX12-NEXT: s_bfe_i64 s[0:1], s[4:5], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[4:5], s[100:101], 0x10000 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v29, s0, 0 +; GFX12-NEXT: v_mov_b32_e32 v9, s4 +; GFX12-NEXT: v_readlane_b32 s56, v30, 4 +; GFX12-NEXT: v_readlane_b32 s58, v30, 8 +; GFX12-NEXT: v_readlane_b32 s57, v30, 5 +; GFX12-NEXT: v_writelane_b32 v29, s1, 1 +; GFX12-NEXT: s_bfe_i64 s[0:1], s[6:7], 0x10000 +; GFX12-NEXT: v_readlane_b32 s62, v30, 14 +; GFX12-NEXT: v_readlane_b32 s60, v30, 12 +; GFX12-NEXT: v_readlane_b32 s59, v30, 9 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v29, s0, 2 +; GFX12-NEXT: v_readlane_b32 s26, v30, 16 +; GFX12-NEXT: v_readlane_b32 s63, v30, 15 +; GFX12-NEXT: v_readlane_b32 s61, v30, 13 +; GFX12-NEXT: s_bfe_i64 s[56:57], s[56:57], 0x10000 +; GFX12-NEXT: v_writelane_b32 v29, s1, 3 +; GFX12-NEXT: s_bfe_i64 s[0:1], s[12:13], 0x10000 +; GFX12-NEXT: v_readlane_b32 s12, v30, 2 +; GFX12-NEXT: v_readlane_b32 s13, v30, 3 +; GFX12-NEXT: s_bfe_i64 s[58:59], s[58:59], 0x10000 ; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) -; GFX12-NEXT: v_dual_mov_b32 v16, s101 :: v_dual_mov_b32 v17, s98 +; GFX12-NEXT: v_writelane_b32 v29, s0, 4 +; GFX12-NEXT: s_bfe_i64 s[62:63], s[62:63], 0x10000 ; GFX12-NEXT: s_bfe_i64 s[60:61], s[60:61], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v18, s99 :: v_dual_mov_b32 v19, s96 -; GFX12-NEXT: v_dual_mov_b32 v20, s97 :: v_dual_mov_b32 v21, s90 -; GFX12-NEXT: s_bfe_i64 s[54:55], s[54:55], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v22, s91 :: v_dual_mov_b32 v23, s86 -; GFX12-NEXT: v_mov_b32_e32 v24, s87 -; GFX12-NEXT: s_clause 0x5 -; GFX12-NEXT: global_store_b128 v0, v[1:4], s[0:1] offset:176 -; GFX12-NEXT: global_store_b128 v0, v[5:8], s[0:1] offset:160 -; GFX12-NEXT: global_store_b128 v0, v[9:12], s[0:1] offset:144 -; GFX12-NEXT: global_store_b128 v0, v[13:16], s[0:1] offset:128 -; GFX12-NEXT: global_store_b128 v0, v[17:20], s[0:1] offset:112 -; GFX12-NEXT: global_store_b128 v0, v[21:24], s[0:1] offset:96 -; GFX12-NEXT: v_dual_mov_b32 v1, s76 :: v_dual_mov_b32 v2, s77 -; GFX12-NEXT: v_dual_mov_b32 v3, s72 :: v_dual_mov_b32 v4, s73 -; GFX12-NEXT: v_mov_b32_e32 v5, s64 -; GFX12-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[6:7], s[88:89], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[100:101], s[84:85], 0x10000 +; GFX12-NEXT: v_writelane_b32 v29, s1, 5 +; GFX12-NEXT: s_bfe_i64 s[0:1], s[10:11], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[10:11], s[74:75], 0x10000 +; GFX12-NEXT: v_readlane_b32 s27, v30, 17 +; GFX12-NEXT: v_mov_b32_e32 v13, s10 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v29, s0, 6 +; GFX12-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 +; GFX12-NEXT: v_writelane_b32 v29, s1, 7 +; GFX12-NEXT: s_bfe_i64 s[0:1], s[14:15], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[14:15], s[12:13], 0x10000 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: v_dual_mov_b32 v14, s11 :: v_dual_mov_b32 v15, s14 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v29, s0, 8 +; GFX12-NEXT: v_mov_b32_e32 v16, s15 +; GFX12-NEXT: s_bfe_i64 s[12:13], s[96:97], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[14:15], s[98:99], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[10:11], s[94:95], 0x10000 +; GFX12-NEXT: v_writelane_b32 v29, s1, 9 +; GFX12-NEXT: s_bfe_i64 s[0:1], s[18:19], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[18:19], vcc, 0x10000 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_writelane_b32 v29, s0, 10 +; GFX12-NEXT: v_writelane_b32 v29, s1, 11 +; GFX12-NEXT: s_bfe_i64 s[0:1], s[82:83], 0x10000 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0 +; GFX12-NEXT: v_mov_b32_e32 v2, s1 +; GFX12-NEXT: s_bfe_i64 s[0:1], s[92:93], 0x10000 ; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) -; GFX12-NEXT: v_dual_mov_b32 v6, s65 :: v_dual_mov_b32 v7, s60 -; GFX12-NEXT: v_dual_mov_b32 v8, s61 :: v_dual_mov_b32 v9, s54 +; GFX12-NEXT: v_dual_mov_b32 v4, s3 :: v_dual_mov_b32 v5, s0 +; GFX12-NEXT: s_bfe_i64 s[2:3], s[102:103], 0x10000 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v7, s2 +; GFX12-NEXT: v_mov_b32_e32 v8, s3 +; GFX12-NEXT: v_readlane_b32 s2, v30, 0 +; GFX12-NEXT: v_readlane_b32 s3, v30, 1 +; GFX12-NEXT: s_bfe_i64 s[102:103], s[64:65], 0x10000 +; GFX12-NEXT: v_readlane_b32 s64, v30, 10 +; GFX12-NEXT: v_readlane_b32 s65, v30, 11 +; GFX12-NEXT: s_bfe_i64 s[92:93], s[28:29], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_dual_mov_b32 v10, s5 :: v_dual_mov_b32 v11, s2 +; GFX12-NEXT: v_mov_b32_e32 v12, s3 +; GFX12-NEXT: s_bfe_i64 s[2:3], s[22:23], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[22:23], s[66:67], 0x10000 +; GFX12-NEXT: v_readlane_b32 s66, v30, 6 +; GFX12-NEXT: v_readlane_b32 s67, v30, 7 +; GFX12-NEXT: v_mov_b32_e32 v20, s23 +; GFX12-NEXT: v_readlane_b32 s28, v30, 18 +; GFX12-NEXT: s_bfe_i64 s[82:83], s[24:25], 0x10000 +; GFX12-NEXT: v_dual_mov_b32 v18, s21 :: v_dual_mov_b32 v19, s22 +; GFX12-NEXT: v_readlane_b32 s24, v30, 22 +; GFX12-NEXT: v_readlane_b32 s22, v30, 20 +; GFX12-NEXT: v_readlane_b32 s29, v30, 19 +; GFX12-NEXT: v_readlane_b32 s20, v30, 24 +; GFX12-NEXT: v_readlane_b32 s25, v30, 23 +; GFX12-NEXT: v_readlane_b32 s23, v30, 21 +; GFX12-NEXT: v_readlane_b32 s21, v30, 25 +; GFX12-NEXT: s_bfe_i64 s[66:67], s[66:67], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[64:65], s[64:65], 0x10000 +; GFX12-NEXT: s_clause 0x1 +; GFX12-NEXT: global_store_b128 v0, v[1:4], s[8:9] offset:496 +; GFX12-NEXT: global_store_b128 v0, v[5:8], s[8:9] offset:480 +; GFX12-NEXT: v_dual_mov_b32 v1, s52 :: v_dual_mov_b32 v2, s53 +; GFX12-NEXT: v_dual_mov_b32 v3, s54 :: v_dual_mov_b32 v4, s55 +; GFX12-NEXT: s_clause 0x5 +; GFX12-NEXT: global_store_b128 v0, v[9:12], s[8:9] offset:464 +; GFX12-NEXT: global_store_b128 v0, v[13:16], s[8:9] offset:448 +; GFX12-NEXT: global_store_b128 v0, v[17:20], s[8:9] offset:432 +; GFX12-NEXT: global_store_b128 v0, v[21:24], s[8:9] offset:416 +; GFX12-NEXT: global_store_b128 v0, v[25:28], s[8:9] offset:400 +; GFX12-NEXT: global_store_b128 v0, v[1:4], s[8:9] offset:384 +; GFX12-NEXT: v_dual_mov_b32 v1, s56 :: v_dual_mov_b32 v2, s57 +; GFX12-NEXT: v_dual_mov_b32 v3, s66 :: v_dual_mov_b32 v4, s67 +; GFX12-NEXT: v_mov_b32_e32 v5, s58 ; GFX12-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 -; GFX12-NEXT: v_dual_mov_b32 v10, s55 :: v_dual_mov_b32 v11, s50 -; GFX12-NEXT: v_dual_mov_b32 v12, s51 :: v_dual_mov_b32 v13, s42 -; GFX12-NEXT: v_dual_mov_b32 v14, s43 :: v_dual_mov_b32 v15, s38 +; GFX12-NEXT: v_dual_mov_b32 v6, s59 :: v_dual_mov_b32 v7, s64 +; GFX12-NEXT: v_dual_mov_b32 v8, s65 :: v_dual_mov_b32 v9, s60 +; GFX12-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000 +; GFX12-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 +; GFX12-NEXT: v_dual_mov_b32 v10, s61 :: v_dual_mov_b32 v11, s62 +; GFX12-NEXT: v_dual_mov_b32 v12, s63 :: v_dual_mov_b32 v13, s26 +; GFX12-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000 +; GFX12-NEXT: v_dual_mov_b32 v14, s27 :: v_dual_mov_b32 v15, s28 +; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) +; GFX12-NEXT: v_dual_mov_b32 v16, s29 :: v_dual_mov_b32 v17, s22 +; GFX12-NEXT: v_dual_mov_b32 v18, s23 :: v_dual_mov_b32 v19, s24 +; GFX12-NEXT: v_dual_mov_b32 v20, s25 :: v_dual_mov_b32 v21, s20 +; GFX12-NEXT: s_bfe_i64 s[4:5], s[90:91], 0x10000 +; GFX12-NEXT: v_dual_mov_b32 v22, s21 :: v_dual_mov_b32 v23, s18 +; GFX12-NEXT: v_mov_b32_e32 v24, s19 +; GFX12-NEXT: s_clause 0x5 +; GFX12-NEXT: global_store_b128 v0, v[1:4], s[8:9] offset:368 +; GFX12-NEXT: global_store_b128 v0, v[5:8], s[8:9] offset:352 +; GFX12-NEXT: global_store_b128 v0, v[9:12], s[8:9] offset:336 +; GFX12-NEXT: global_store_b128 v0, v[13:16], s[8:9] offset:320 +; GFX12-NEXT: global_store_b128 v0, v[17:20], s[8:9] offset:304 +; GFX12-NEXT: global_store_b128 v0, v[21:24], s[8:9] offset:288 +; GFX12-NEXT: v_dual_mov_b32 v1, s14 :: v_dual_mov_b32 v2, s15 +; GFX12-NEXT: v_dual_mov_b32 v3, s12 :: v_dual_mov_b32 v4, s13 +; GFX12-NEXT: v_mov_b32_e32 v5, s2 +; GFX12-NEXT: s_bfe_i64 s[0:1], s[80:81], 0x10000 +; GFX12-NEXT: v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v7, s10 ; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0) -; GFX12-NEXT: v_dual_mov_b32 v16, s39 :: v_dual_mov_b32 v17, s28 -; GFX12-NEXT: v_dual_mov_b32 v18, s29 :: v_dual_mov_b32 v19, s24 -; GFX12-NEXT: v_dual_mov_b32 v20, s25 :: v_dual_mov_b32 v21, s16 -; GFX12-NEXT: v_dual_mov_b32 v22, s17 :: v_dual_mov_b32 v23, s4 -; GFX12-NEXT: v_mov_b32_e32 v24, s5 +; GFX12-NEXT: v_dual_mov_b32 v8, s11 :: v_dual_mov_b32 v9, s4 +; GFX12-NEXT: v_dual_mov_b32 v10, s5 :: v_dual_mov_b32 v11, s6 +; GFX12-NEXT: v_dual_mov_b32 v12, s7 :: v_dual_mov_b32 v13, s100 +; GFX12-NEXT: v_dual_mov_b32 v14, s101 :: v_dual_mov_b32 v15, s0 +; GFX12-NEXT: v_dual_mov_b32 v16, s1 :: v_dual_mov_b32 v17, s102 +; GFX12-NEXT: v_dual_mov_b32 v18, s103 :: v_dual_mov_b32 v19, s92 +; GFX12-NEXT: v_dual_mov_b32 v20, s93 :: v_dual_mov_b32 v21, s86 +; GFX12-NEXT: v_readlane_b32 s0, v29, 10 +; GFX12-NEXT: v_dual_mov_b32 v22, s87 :: v_dual_mov_b32 v23, s82 +; GFX12-NEXT: v_mov_b32_e32 v24, s83 ; GFX12-NEXT: s_clause 0x5 -; GFX12-NEXT: global_store_b128 v0, v[1:4], s[0:1] offset:80 -; GFX12-NEXT: global_store_b128 v0, v[5:8], s[0:1] offset:64 -; GFX12-NEXT: global_store_b128 v0, v[9:12], s[0:1] offset:48 -; GFX12-NEXT: global_store_b128 v0, v[13:16], s[0:1] offset:32 -; GFX12-NEXT: global_store_b128 v0, v[17:20], s[0:1] offset:16 -; GFX12-NEXT: global_store_b128 v0, v[21:24], s[0:1] +; GFX12-NEXT: global_store_b128 v0, v[1:4], s[8:9] offset:272 +; GFX12-NEXT: global_store_b128 v0, v[5:8], s[8:9] offset:256 +; GFX12-NEXT: global_store_b128 v0, v[9:12], s[8:9] offset:240 +; GFX12-NEXT: global_store_b128 v0, v[13:16], s[8:9] offset:224 +; GFX12-NEXT: global_store_b128 v0, v[17:20], s[8:9] offset:208 +; GFX12-NEXT: global_store_b128 v0, v[21:24], s[8:9] offset:192 +; GFX12-NEXT: v_dual_mov_b32 v1, s50 :: v_dual_mov_b32 v2, s51 +; GFX12-NEXT: v_dual_mov_b32 v3, s48 :: v_dual_mov_b32 v4, s49 +; GFX12-NEXT: v_mov_b32_e32 v5, s46 +; GFX12-NEXT: v_readlane_b32 s1, v29, 11 +; GFX12-NEXT: v_dual_mov_b32 v6, s47 :: v_dual_mov_b32 v7, s44 +; GFX12-NEXT: v_dual_mov_b32 v8, s45 :: v_dual_mov_b32 v9, s42 +; GFX12-NEXT: v_dual_mov_b32 v10, s43 :: v_dual_mov_b32 v11, s40 +; GFX12-NEXT: v_dual_mov_b32 v12, s41 :: v_dual_mov_b32 v13, s38 +; GFX12-NEXT: v_dual_mov_b32 v14, s39 :: v_dual_mov_b32 v15, s36 +; GFX12-NEXT: v_dual_mov_b32 v16, s37 :: v_dual_mov_b32 v17, s34 +; GFX12-NEXT: v_dual_mov_b32 v18, s35 :: v_dual_mov_b32 v19, s30 +; GFX12-NEXT: v_dual_mov_b32 v20, s31 :: v_dual_mov_b32 v21, s16 +; GFX12-NEXT: v_dual_mov_b32 v22, s17 :: v_dual_mov_b32 v23, s68 +; GFX12-NEXT: v_mov_b32_e32 v24, s69 +; GFX12-NEXT: s_clause 0x5 +; GFX12-NEXT: global_store_b128 v0, v[1:4], s[8:9] offset:176 +; GFX12-NEXT: global_store_b128 v0, v[5:8], s[8:9] offset:160 +; GFX12-NEXT: global_store_b128 v0, v[9:12], s[8:9] offset:144 +; GFX12-NEXT: global_store_b128 v0, v[13:16], s[8:9] offset:128 +; GFX12-NEXT: global_store_b128 v0, v[17:20], s[8:9] offset:112 +; GFX12-NEXT: global_store_b128 v0, v[21:24], s[8:9] offset:96 +; GFX12-NEXT: s_wait_alu depctr_va_sdst(0) +; GFX12-NEXT: v_dual_mov_b32 v6, s79 :: v_dual_mov_b32 v7, s0 +; GFX12-NEXT: v_mov_b32_e32 v8, s1 +; GFX12-NEXT: v_readlane_b32 s0, v29, 8 +; GFX12-NEXT: v_readlane_b32 s1, v29, 9 +; GFX12-NEXT: v_dual_mov_b32 v1, s72 :: v_dual_mov_b32 v2, s73 +; GFX12-NEXT: v_mov_b32_e32 v3, s76 +; GFX12-NEXT: s_wait_alu depctr_va_sdst(0) +; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2) +; GFX12-NEXT: v_dual_mov_b32 v9, s0 :: v_dual_mov_b32 v10, s1 +; GFX12-NEXT: v_readlane_b32 s0, v29, 6 +; GFX12-NEXT: v_readlane_b32 s1, v29, 7 +; GFX12-NEXT: v_dual_mov_b32 v4, s77 :: v_dual_mov_b32 v5, s78 +; GFX12-NEXT: s_wait_alu depctr_va_sdst(0) +; GFX12-NEXT: v_dual_mov_b32 v11, s0 :: v_dual_mov_b32 v12, s1 +; GFX12-NEXT: v_readlane_b32 s0, v29, 4 +; GFX12-NEXT: v_readlane_b32 s1, v29, 5 +; GFX12-NEXT: s_wait_alu depctr_va_sdst(0) +; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX12-NEXT: v_dual_mov_b32 v13, s0 :: v_dual_mov_b32 v14, s1 +; GFX12-NEXT: v_readlane_b32 s0, v29, 2 +; GFX12-NEXT: v_readlane_b32 s1, v29, 3 +; GFX12-NEXT: s_wait_alu depctr_va_sdst(0) +; GFX12-NEXT: v_dual_mov_b32 v15, s0 :: v_dual_mov_b32 v16, s1 +; GFX12-NEXT: v_readlane_b32 s0, v29, 0 +; GFX12-NEXT: v_readlane_b32 s1, v29, 1 +; GFX12-NEXT: s_wait_alu depctr_va_sdst(0) +; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX12-NEXT: v_dual_mov_b32 v17, s0 :: v_dual_mov_b32 v18, s1 +; GFX12-NEXT: v_readlane_b32 s0, v30, 30 +; GFX12-NEXT: v_readlane_b32 s1, v30, 31 +; GFX12-NEXT: s_wait_alu depctr_va_sdst(0) +; GFX12-NEXT: v_dual_mov_b32 v19, s0 :: v_dual_mov_b32 v20, s1 +; GFX12-NEXT: v_readlane_b32 s0, v30, 26 +; GFX12-NEXT: v_readlane_b32 s1, v30, 27 +; GFX12-NEXT: s_wait_alu depctr_va_sdst(0) +; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX12-NEXT: v_dual_mov_b32 v21, s0 :: v_dual_mov_b32 v22, s1 +; GFX12-NEXT: v_readlane_b32 s0, v30, 28 +; GFX12-NEXT: v_readlane_b32 s1, v30, 29 +; GFX12-NEXT: s_wait_alu depctr_va_sdst(0) +; GFX12-NEXT: v_dual_mov_b32 v23, s0 :: v_dual_mov_b32 v24, s1 +; GFX12-NEXT: s_clause 0x5 +; GFX12-NEXT: global_store_b128 v0, v[1:4], s[8:9] offset:80 +; GFX12-NEXT: global_store_b128 v0, v[5:8], s[8:9] offset:64 +; GFX12-NEXT: global_store_b128 v0, v[9:12], s[8:9] offset:48 +; GFX12-NEXT: global_store_b128 v0, v[13:16], s[8:9] offset:32 +; GFX12-NEXT: global_store_b128 v0, v[17:20], s[8:9] offset:16 +; GFX12-NEXT: global_store_b128 v0, v[21:24], s[8:9] ; GFX12-NEXT: s_endpgm ; ; GFX1250-LABEL: constant_sextload_v64i1_to_v64i64: ; GFX1250: ; %bb.0: ; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0 -; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv -; GFX1250-NEXT: s_mov_b32 s61, 0 +; GFX1250-NEXT: s_load_b128 s[8:11], s[4:5], 0x24 nv +; GFX1250-NEXT: ; implicit-def: $vgpr30 : SGPR spill to VGPR lane +; GFX1250-NEXT: ; implicit-def: $vgpr5 : SGPR spill to VGPR lane +; GFX1250-NEXT: s_mov_b32 s75, 0 ; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX1250-NEXT: s_mov_b32 s55, s61 -; GFX1250-NEXT: s_mov_b32 s43, s61 -; GFX1250-NEXT: s_mov_b32 s51, s61 -; GFX1250-NEXT: s_mov_b32 s29, s61 -; GFX1250-NEXT: s_mov_b32 s39, s61 -; GFX1250-NEXT: s_mov_b32 s17, s61 -; GFX1250-NEXT: s_mov_b32 s25, s61 -; GFX1250-NEXT: s_mov_b32 s49, s61 +; GFX1250-NEXT: s_mov_b32 s59, s75 +; GFX1250-NEXT: s_mov_b32 s57, s75 +; GFX1250-NEXT: s_mov_b32 s61, s75 +; GFX1250-NEXT: s_mov_b32 s67, s75 +; GFX1250-NEXT: s_mov_b32 s63, s75 +; GFX1250-NEXT: s_mov_b32 s53, s75 +; GFX1250-NEXT: s_mov_b32 s23, s75 +; GFX1250-NEXT: s_mov_b32 s71, s75 +; GFX1250-NEXT: s_mov_b32 s55, s75 ; GFX1250-NEXT: s_wait_kmcnt 0x0 -; GFX1250-NEXT: s_load_b64 s[4:5], s[2:3], 0x0 nv -; GFX1250-NEXT: s_wait_xcnt 0x0 -; GFX1250-NEXT: s_mov_b32 s3, s61 +; GFX1250-NEXT: s_load_b64 s[16:17], s[10:11], 0x0 nv ; GFX1250-NEXT: s_wait_kmcnt 0x0 -; GFX1250-NEXT: s_lshr_b32 s98, s5, 30 -; GFX1250-NEXT: s_lshr_b32 s90, s5, 31 -; GFX1250-NEXT: s_lshr_b32 s96, s5, 28 -; GFX1250-NEXT: s_lshr_b32 s76, s5, 29 -; GFX1250-NEXT: s_lshr_b32 s72, s5, 27 -; GFX1250-NEXT: s_lshr_b32 s60, s5, 24 -; GFX1250-NEXT: s_lshr_b32 s86, s5, 26 -; GFX1250-NEXT: s_bfe_i64 s[98:99], s[98:99], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[90:91], s[90:91], 0x10000 -; GFX1250-NEXT: s_lshr_b32 s64, s5, 25 -; GFX1250-NEXT: s_bfe_i64 s[96:97], s[96:97], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[76:77], s[76:77], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[72:73], s[72:73], 0x10000 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 27 +; GFX1250-NEXT: s_lshr_b32 s82, s17, 30 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 0 +; GFX1250-NEXT: s_lshr_b32 s86, s17, 31 +; GFX1250-NEXT: s_lshr_b32 s92, s17, 28 +; GFX1250-NEXT: s_lshr_b32 s102, s17, 29 +; GFX1250-NEXT: s_lshr_b32 s100, s17, 26 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 1 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 25 +; GFX1250-NEXT: s_lshr_b32 s74, s17, 24 +; GFX1250-NEXT: s_lshr_b32 s70, s17, 22 +; GFX1250-NEXT: s_lshr_b32 s66, s17, 23 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 2 +; GFX1250-NEXT: s_lshr_b32 s62, s17, 20 +; GFX1250-NEXT: s_lshr_b32 s60, s17, 21 +; GFX1250-NEXT: s_lshr_b32 s58, s17, 18 +; GFX1250-NEXT: s_lshr_b32 s56, s17, 19 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 3 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 14 +; GFX1250-NEXT: s_lshr_b32 s52, s17, 16 +; GFX1250-NEXT: s_lshr_b32 s54, s17, 17 +; GFX1250-NEXT: s_lshr_b32 vcc_lo, s17, 5 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 4 +; GFX1250-NEXT: s_lshr_b32 s98, s17, 2 +; GFX1250-NEXT: s_lshr_b32 s96, s17, 3 +; GFX1250-NEXT: s_lshr_b32 s94, s17, 1 +; GFX1250-NEXT: s_mov_b32 s22, s17 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 5 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 15 +; GFX1250-NEXT: s_lshr_b32 s90, s16, 30 +; GFX1250-NEXT: s_lshr_b32 s88, s16, 31 +; GFX1250-NEXT: s_lshr_b32 s84, s16, 28 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 6 +; GFX1250-NEXT: s_lshr_b32 s80, s16, 29 +; GFX1250-NEXT: s_lshr_b32 s64, s16, 26 +; GFX1250-NEXT: s_lshr_b32 s28, s16, 27 +; GFX1250-NEXT: s_lshr_b32 s26, s16, 24 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 7 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 12 +; GFX1250-NEXT: s_lshr_b32 s24, s16, 25 +; GFX1250-NEXT: s_lshr_b32 s50, s16, 22 +; GFX1250-NEXT: s_lshr_b32 s48, s16, 23 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 8 +; GFX1250-NEXT: s_lshr_b32 s46, s16, 20 +; GFX1250-NEXT: s_lshr_b32 s44, s16, 21 +; GFX1250-NEXT: s_lshr_b32 s42, s16, 18 +; GFX1250-NEXT: s_lshr_b32 s40, s16, 19 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 9 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 13 +; GFX1250-NEXT: s_lshr_b32 s38, s16, 16 +; GFX1250-NEXT: s_lshr_b32 s36, s16, 17 +; GFX1250-NEXT: s_lshr_b32 s34, s16, 14 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 10 +; GFX1250-NEXT: s_lshr_b32 s30, s16, 15 +; GFX1250-NEXT: s_lshr_b32 s20, s16, 12 +; GFX1250-NEXT: s_lshr_b32 s68, s16, 13 +; GFX1250-NEXT: s_lshr_b32 s72, s16, 10 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 11 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 10 +; GFX1250-NEXT: s_lshr_b32 s76, s16, 11 +; GFX1250-NEXT: s_lshr_b32 s78, s16, 8 +; GFX1250-NEXT: s_lshr_b32 s18, s16, 9 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 12 +; GFX1250-NEXT: s_lshr_b32 s14, s16, 6 +; GFX1250-NEXT: s_lshr_b32 s12, s16, 7 +; GFX1250-NEXT: s_lshr_b32 s10, s16, 4 +; GFX1250-NEXT: s_lshr_b32 s6, s16, 5 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 13 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 11 +; GFX1250-NEXT: s_lshr_b32 s4, s16, 2 +; GFX1250-NEXT: s_lshr_b32 s2, s16, 3 +; GFX1250-NEXT: s_bfe_i64 s[58:59], s[58:59], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 14 +; GFX1250-NEXT: s_bfe_i64 s[56:57], s[56:57], 0x10000 ; GFX1250-NEXT: s_bfe_i64 s[60:61], s[60:61], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v0, s98 -; GFX1250-NEXT: s_lshr_b32 s54, s5, 22 -; GFX1250-NEXT: s_lshr_b32 s42, s5, 23 -; GFX1250-NEXT: v_dual_mov_b32 v1, s99 :: v_dual_mov_b32 v2, s90 -; GFX1250-NEXT: v_dual_mov_b32 v3, s91 :: v_dual_mov_b32 v4, s96 -; GFX1250-NEXT: s_bfe_i64 s[86:87], s[86:87], 0x10000 -; GFX1250-NEXT: s_lshr_b32 s50, s5, 20 -; GFX1250-NEXT: s_lshr_b32 s28, s5, 21 -; GFX1250-NEXT: s_lshr_b32 s2, s5, 17 -; GFX1250-NEXT: s_lshr_b32 s6, s5, 14 -; GFX1250-NEXT: s_lshr_b32 s8, s5, 15 -; GFX1250-NEXT: v_dual_mov_b32 v5, s97 :: v_dual_mov_b32 v6, s76 -; GFX1250-NEXT: v_dual_mov_b32 v7, s77 :: v_dual_mov_b32 v10, s86 -; GFX1250-NEXT: v_dual_mov_b32 v13, s73 :: v_dual_mov_b32 v14, s60 -; GFX1250-NEXT: v_mov_b32_e32 v15, s61 -; GFX1250-NEXT: s_bfe_i64 s[60:61], s[64:65], 0x10000 -; GFX1250-NEXT: s_lshr_b32 s38, s5, 18 -; GFX1250-NEXT: s_lshr_b32 s16, s5, 19 -; GFX1250-NEXT: s_lshr_b32 s10, s5, 12 -; GFX1250-NEXT: s_lshr_b32 s12, s5, 13 -; GFX1250-NEXT: v_dual_mov_b32 v11, s87 :: v_dual_mov_b32 v12, s72 +; GFX1250-NEXT: v_dual_mov_b32 v27, s59 :: v_dual_mov_b32 v28, s56 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 15 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 8 +; GFX1250-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x10000 +; GFX1250-NEXT: v_dual_mov_b32 v29, s57 :: v_dual_mov_b32 v25, s61 +; GFX1250-NEXT: v_mov_b32_e32 v26, s58 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 16 ; GFX1250-NEXT: s_bfe_i64 s[54:55], s[54:55], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 -; GFX1250-NEXT: s_lshr_b32 s24, s5, 16 -; GFX1250-NEXT: s_lshr_b32 s14, s5, 10 -; GFX1250-NEXT: s_lshr_b32 s18, s5, 11 -; GFX1250-NEXT: v_dual_mov_b32 v16, s60 :: v_dual_mov_b32 v17, s61 -; GFX1250-NEXT: v_mov_b32_e32 v18, s54 +; GFX1250-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000 ; GFX1250-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000 -; GFX1250-NEXT: s_lshr_b32 s20, s5, 8 -; GFX1250-NEXT: s_lshr_b32 s22, s5, 9 -; GFX1250-NEXT: v_dual_mov_b32 v19, s55 :: v_dual_mov_b32 v20, s42 -; GFX1250-NEXT: v_dual_mov_b32 v21, s43 :: v_dual_mov_b32 v22, s50 +; GFX1250-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 17 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 9 +; GFX1250-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 18 +; GFX1250-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000 ; GFX1250-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 19 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 6 +; GFX1250-NEXT: s_bfe_i64 s[78:79], s[78:79], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[68:69], s[68:69], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[72:73], s[72:73], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 20 +; GFX1250-NEXT: s_bfe_i64 s[76:77], s[76:77], 0x10000 +; GFX1250-NEXT: v_mov_b32_e32 v24, s60 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 21 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 7 +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX1250-NEXT: v_writelane_b32 v30, s0, 22 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 23 +; GFX1250-NEXT: s_lshr_b32 s0, s17, 4 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 24 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 25 +; GFX1250-NEXT: s_lshr_b32 s0, s16, 1 ; GFX1250-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000 -; GFX1250-NEXT: s_lshr_b32 s26, s5, 6 -; GFX1250-NEXT: s_lshr_b32 s30, s5, 7 -; GFX1250-NEXT: v_dual_mov_b32 v23, s51 :: v_dual_mov_b32 v24, s28 -; GFX1250-NEXT: v_dual_mov_b32 v25, s29 :: v_dual_mov_b32 v26, s38 -; GFX1250-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v30, s16, 26 +; GFX1250-NEXT: v_writelane_b32 v30, s17, 27 +; GFX1250-NEXT: s_bfe_i64 s[16:17], s[20:21], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[20:21], s[70:71], 0x10000 +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: v_mov_b32_e32 v18, s20 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 28 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 29 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[2:3], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[2:3], s[86:87], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[86:87], s[26:27], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[26:27], s[62:63], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v30, s0, 30 +; GFX1250-NEXT: v_dual_mov_b32 v23, s27 :: v_dual_mov_b32 v2, s2 +; GFX1250-NEXT: v_mov_b32_e32 v22, s26 +; GFX1250-NEXT: v_writelane_b32 v30, s1, 31 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[4:5], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[4:5], s[88:89], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v5, s0, 0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX1250-NEXT: v_readlane_b32 s56, v30, 4 +; GFX1250-NEXT: v_readlane_b32 s58, v30, 8 +; GFX1250-NEXT: v_readlane_b32 s57, v30, 5 +; GFX1250-NEXT: v_writelane_b32 v5, s1, 1 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[6:7], 0x10000 +; GFX1250-NEXT: v_readlane_b32 s62, v30, 14 +; GFX1250-NEXT: v_readlane_b32 s60, v30, 12 +; GFX1250-NEXT: v_readlane_b32 s59, v30, 9 +; GFX1250-NEXT: v_writelane_b32 v5, s0, 2 +; GFX1250-NEXT: v_readlane_b32 s26, v30, 16 +; GFX1250-NEXT: v_readlane_b32 s63, v30, 15 +; GFX1250-NEXT: v_readlane_b32 s61, v30, 13 +; GFX1250-NEXT: s_bfe_i64 s[56:57], s[56:57], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v5, s1, 3 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[10:11], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[58:59], s[58:59], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[62:63], s[62:63], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[60:61], s[60:61], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v5, s0, 4 +; GFX1250-NEXT: s_bfe_i64 s[10:11], s[90:91], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[6:7], s[80:81], 0x10000 +; GFX1250-NEXT: v_readlane_b32 s27, v30, 17 +; GFX1250-NEXT: v_writelane_b32 v5, s1, 5 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[12:13], 0x10000 +; GFX1250-NEXT: v_readlane_b32 s12, v30, 2 +; GFX1250-NEXT: v_readlane_b32 s13, v30, 3 +; GFX1250-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v5, s0, 6 +; GFX1250-NEXT: v_writelane_b32 v5, s1, 7 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[14:15], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[14:15], s[12:13], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[12:13], s[96:97], 0x10000 +; GFX1250-NEXT: v_mov_b32_e32 v16, s14 +; GFX1250-NEXT: v_writelane_b32 v5, s0, 8 +; GFX1250-NEXT: v_mov_b32_e32 v17, s15 +; GFX1250-NEXT: s_bfe_i64 s[14:15], s[98:99], 0x10000 +; GFX1250-NEXT: v_writelane_b32 v5, s1, 9 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[18:19], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[18:19], vcc, 0x10000 +; GFX1250-NEXT: v_writelane_b32 v5, s0, 10 +; GFX1250-NEXT: v_writelane_b32 v5, s1, 11 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[82:83], 0x10000 +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) +; GFX1250-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v0, s0 +; GFX1250-NEXT: v_mov_b32_e32 v1, s1 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[92:93], 0x10000 +; GFX1250-NEXT: v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v6, s0 +; GFX1250-NEXT: s_bfe_i64 s[2:3], s[102:103], 0x10000 +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX1250-NEXT: v_dual_mov_b32 v7, s1 :: v_dual_mov_b32 v8, s2 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[100:101], 0x10000 +; GFX1250-NEXT: v_dual_mov_b32 v9, s3 :: v_dual_mov_b32 v10, s0 +; GFX1250-NEXT: v_readlane_b32 s2, v30, 0 +; GFX1250-NEXT: v_readlane_b32 s3, v30, 1 +; GFX1250-NEXT: s_bfe_i64 s[102:103], s[64:65], 0x10000 +; GFX1250-NEXT: v_readlane_b32 s64, v30, 10 +; GFX1250-NEXT: v_readlane_b32 s65, v30, 11 +; GFX1250-NEXT: s_bfe_i64 s[92:93], s[28:29], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x10000 +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) +; GFX1250-NEXT: v_dual_mov_b32 v11, s1 :: v_dual_mov_b32 v12, s2 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[74:75], 0x10000 +; GFX1250-NEXT: v_dual_mov_b32 v13, s3 :: v_dual_mov_b32 v14, s0 +; GFX1250-NEXT: s_bfe_i64 s[2:3], s[22:23], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[22:23], s[66:67], 0x10000 +; GFX1250-NEXT: v_readlane_b32 s66, v30, 6 +; GFX1250-NEXT: v_readlane_b32 s67, v30, 7 +; GFX1250-NEXT: v_mov_b32_e32 v21, s23 +; GFX1250-NEXT: v_readlane_b32 s28, v30, 18 +; GFX1250-NEXT: s_bfe_i64 s[82:83], s[24:25], 0x10000 +; GFX1250-NEXT: v_dual_mov_b32 v15, s1 :: v_dual_mov_b32 v19, s21 +; GFX1250-NEXT: v_mov_b32_e32 v20, s22 +; GFX1250-NEXT: v_readlane_b32 s24, v30, 22 +; GFX1250-NEXT: v_readlane_b32 s22, v30, 20 +; GFX1250-NEXT: v_readlane_b32 s29, v30, 19 +; GFX1250-NEXT: v_readlane_b32 s20, v30, 24 +; GFX1250-NEXT: v_readlane_b32 s25, v30, 23 +; GFX1250-NEXT: v_readlane_b32 s23, v30, 21 +; GFX1250-NEXT: v_readlane_b32 s21, v30, 25 +; GFX1250-NEXT: s_bfe_i64 s[66:67], s[66:67], 0x10000 +; GFX1250-NEXT: s_bfe_i64 s[64:65], s[64:65], 0x10000 ; GFX1250-NEXT: s_clause 0x1 -; GFX1250-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:496 -; GFX1250-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:480 +; GFX1250-NEXT: global_store_b128 v4, v[0:3], s[8:9] offset:496 +; GFX1250-NEXT: global_store_b128 v4, v[6:9], s[8:9] offset:480 ; GFX1250-NEXT: s_wait_xcnt 0x1 -; GFX1250-NEXT: v_dual_mov_b32 v33, s3 :: v_dual_mov_b32 v0, s6 -; GFX1250-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_mov_b32 v2, s8 +; GFX1250-NEXT: v_dual_mov_b32 v0, s52 :: v_dual_mov_b32 v1, s53 +; GFX1250-NEXT: v_dual_mov_b32 v2, s54 :: v_dual_mov_b32 v3, s55 +; GFX1250-NEXT: s_clause 0x5 +; GFX1250-NEXT: global_store_b128 v4, v[10:13], s[8:9] offset:464 +; GFX1250-NEXT: global_store_b128 v4, v[14:17], s[8:9] offset:448 +; GFX1250-NEXT: global_store_b128 v4, v[18:21], s[8:9] offset:432 +; GFX1250-NEXT: global_store_b128 v4, v[22:25], s[8:9] offset:416 +; GFX1250-NEXT: global_store_b128 v4, v[26:29], s[8:9] offset:400 +; GFX1250-NEXT: global_store_b128 v4, v[0:3], s[8:9] offset:384 ; GFX1250-NEXT: s_wait_xcnt 0x0 -; GFX1250-NEXT: v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10 -; GFX1250-NEXT: s_lshr_b32 s34, s5, 4 -; GFX1250-NEXT: s_lshr_b32 s36, s5, 5 -; GFX1250-NEXT: s_lshr_b32 s40, s5, 2 -; GFX1250-NEXT: s_lshr_b32 s44, s5, 3 -; GFX1250-NEXT: v_dual_mov_b32 v27, s39 :: v_dual_mov_b32 v28, s16 -; GFX1250-NEXT: v_dual_mov_b32 v29, s17 :: v_dual_mov_b32 v30, s24 +; GFX1250-NEXT: v_dual_mov_b32 v0, s56 :: v_dual_mov_b32 v1, s57 +; GFX1250-NEXT: v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s67 +; GFX1250-NEXT: v_mov_b32_e32 v6, s58 +; GFX1250-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 +; GFX1250-NEXT: v_dual_mov_b32 v7, s59 :: v_dual_mov_b32 v8, s64 +; GFX1250-NEXT: v_dual_mov_b32 v9, s65 :: v_dual_mov_b32 v10, s60 +; GFX1250-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000 ; GFX1250-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000 +; GFX1250-NEXT: v_dual_mov_b32 v11, s61 :: v_dual_mov_b32 v12, s62 +; GFX1250-NEXT: v_dual_mov_b32 v13, s63 :: v_dual_mov_b32 v14, s26 ; GFX1250-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v5, s11 :: v_dual_mov_b32 v6, s12 -; GFX1250-NEXT: v_mov_b32_e32 v7, s13 -; GFX1250-NEXT: s_lshr_b32 s46, s5, 1 -; GFX1250-NEXT: s_mov_b32 s48, s5 -; GFX1250-NEXT: v_dual_mov_b32 v31, s25 :: v_dual_mov_b32 v32, s2 -; GFX1250-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000 -; GFX1250-NEXT: s_clause 0x5 -; GFX1250-NEXT: global_store_b128 v8, v[10:13], s[0:1] offset:464 -; GFX1250-NEXT: global_store_b128 v8, v[14:17], s[0:1] offset:448 -; GFX1250-NEXT: global_store_b128 v8, v[18:21], s[0:1] offset:432 -; GFX1250-NEXT: global_store_b128 v8, v[22:25], s[0:1] offset:416 -; GFX1250-NEXT: global_store_b128 v8, v[26:29], s[0:1] offset:400 -; GFX1250-NEXT: global_store_b128 v8, v[30:33], s[0:1] offset:384 -; GFX1250-NEXT: s_wait_xcnt 0x5 -; GFX1250-NEXT: v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v11, s15 -; GFX1250-NEXT: v_dual_mov_b32 v12, s18 :: v_dual_mov_b32 v13, s19 -; GFX1250-NEXT: s_wait_xcnt 0x4 -; GFX1250-NEXT: v_mov_b32_e32 v14, s20 -; GFX1250-NEXT: s_lshr_b32 s52, s4, 30 -; GFX1250-NEXT: s_lshr_b32 s56, s4, 31 -; GFX1250-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v15, s21 :: v_dual_mov_b32 v16, s22 -; GFX1250-NEXT: s_wait_xcnt 0x3 -; GFX1250-NEXT: v_dual_mov_b32 v17, s23 :: v_dual_mov_b32 v18, s26 -; GFX1250-NEXT: s_lshr_b32 s58, s4, 28 -; GFX1250-NEXT: s_lshr_b32 s62, s4, 29 -; GFX1250-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v19, s27 :: v_dual_mov_b32 v20, s30 -; GFX1250-NEXT: s_wait_xcnt 0x2 -; GFX1250-NEXT: v_dual_mov_b32 v21, s31 :: v_dual_mov_b32 v22, s34 -; GFX1250-NEXT: s_lshr_b32 s66, s4, 26 -; GFX1250-NEXT: s_lshr_b32 s68, s4, 27 -; GFX1250-NEXT: s_bfe_i64 s[56:57], s[56:57], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v23, s35 :: v_dual_mov_b32 v24, s36 -; GFX1250-NEXT: v_mov_b32_e32 v25, s37 +; GFX1250-NEXT: v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v16, s28 +; GFX1250-NEXT: v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v18, s22 +; GFX1250-NEXT: s_bfe_i64 s[0:1], s[94:95], 0x10000 +; GFX1250-NEXT: v_dual_mov_b32 v19, s23 :: v_dual_mov_b32 v20, s24 +; GFX1250-NEXT: v_dual_mov_b32 v21, s25 :: v_dual_mov_b32 v22, s20 +; GFX1250-NEXT: v_dual_mov_b32 v23, s21 :: v_dual_mov_b32 v24, s18 +; GFX1250-NEXT: v_mov_b32_e32 v25, s19 ; GFX1250-NEXT: s_clause 0x5 -; GFX1250-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:368 -; GFX1250-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:352 -; GFX1250-NEXT: global_store_b128 v8, v[10:13], s[0:1] offset:336 -; GFX1250-NEXT: global_store_b128 v8, v[14:17], s[0:1] offset:320 -; GFX1250-NEXT: global_store_b128 v8, v[18:21], s[0:1] offset:304 -; GFX1250-NEXT: global_store_b128 v8, v[22:25], s[0:1] offset:288 +; GFX1250-NEXT: global_store_b128 v4, v[0:3], s[8:9] offset:368 +; GFX1250-NEXT: global_store_b128 v4, v[6:9], s[8:9] offset:352 +; GFX1250-NEXT: global_store_b128 v4, v[10:13], s[8:9] offset:336 +; GFX1250-NEXT: global_store_b128 v4, v[14:17], s[8:9] offset:320 +; GFX1250-NEXT: global_store_b128 v4, v[18:21], s[8:9] offset:304 +; GFX1250-NEXT: global_store_b128 v4, v[22:25], s[8:9] offset:288 ; GFX1250-NEXT: s_wait_xcnt 0x5 -; GFX1250-NEXT: v_dual_mov_b32 v0, s40 :: v_dual_mov_b32 v1, s41 -; GFX1250-NEXT: v_dual_mov_b32 v2, s44 :: v_dual_mov_b32 v3, s45 +; GFX1250-NEXT: v_dual_mov_b32 v0, s14 :: v_dual_mov_b32 v1, s15 +; GFX1250-NEXT: v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v3, s13 ; GFX1250-NEXT: s_wait_xcnt 0x4 -; GFX1250-NEXT: v_mov_b32_e32 v4, s48 -; GFX1250-NEXT: s_lshr_b32 s70, s4, 24 -; GFX1250-NEXT: s_lshr_b32 s74, s4, 25 -; GFX1250-NEXT: s_lshr_b32 s78, s4, 22 -; GFX1250-NEXT: s_lshr_b32 s80, s4, 23 -; GFX1250-NEXT: s_bfe_i64 s[62:63], s[62:63], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[58:59], s[58:59], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v5, s49 :: v_dual_mov_b32 v6, s46 +; GFX1250-NEXT: v_mov_b32_e32 v6, s2 +; GFX1250-NEXT: s_bfe_i64 s[100:101], s[84:85], 0x10000 +; GFX1250-NEXT: v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v8, s0 ; GFX1250-NEXT: s_wait_xcnt 0x3 -; GFX1250-NEXT: v_dual_mov_b32 v7, s47 :: v_dual_mov_b32 v10, s52 -; GFX1250-NEXT: s_lshr_b32 s82, s4, 20 -; GFX1250-NEXT: s_lshr_b32 s84, s4, 21 -; GFX1250-NEXT: s_bfe_i64 s[68:69], s[68:69], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[66:67], s[66:67], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v11, s53 :: v_dual_mov_b32 v12, s56 +; GFX1250-NEXT: v_dual_mov_b32 v9, s1 :: v_dual_mov_b32 v10, s10 +; GFX1250-NEXT: v_dual_mov_b32 v11, s11 :: v_dual_mov_b32 v12, s4 ; GFX1250-NEXT: s_wait_xcnt 0x2 -; GFX1250-NEXT: v_dual_mov_b32 v13, s57 :: v_dual_mov_b32 v14, s58 -; GFX1250-NEXT: s_lshr_b32 s88, s4, 18 -; GFX1250-NEXT: s_lshr_b32 s92, s4, 19 -; GFX1250-NEXT: s_bfe_i64 s[80:81], s[80:81], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[78:79], s[78:79], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[74:75], s[74:75], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[70:71], s[70:71], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v15, s59 :: v_dual_mov_b32 v16, s62 +; GFX1250-NEXT: v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v14, s100 +; GFX1250-NEXT: v_dual_mov_b32 v15, s101 :: v_dual_mov_b32 v16, s6 ; GFX1250-NEXT: s_wait_xcnt 0x1 -; GFX1250-NEXT: v_dual_mov_b32 v17, s63 :: v_dual_mov_b32 v18, s66 -; GFX1250-NEXT: s_lshr_b32 s94, s4, 16 -; GFX1250-NEXT: s_lshr_b32 s100, s4, 17 -; GFX1250-NEXT: s_bfe_i64 s[84:85], s[84:85], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[82:83], s[82:83], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v19, s67 :: v_dual_mov_b32 v20, s68 +; GFX1250-NEXT: v_dual_mov_b32 v17, s7 :: v_dual_mov_b32 v18, s102 +; GFX1250-NEXT: v_dual_mov_b32 v19, s103 :: v_dual_mov_b32 v20, s92 ; GFX1250-NEXT: s_wait_xcnt 0x0 -; GFX1250-NEXT: v_dual_mov_b32 v21, s69 :: v_dual_mov_b32 v22, s70 -; GFX1250-NEXT: s_lshr_b32 s98, s4, 14 -; GFX1250-NEXT: s_lshr_b32 s102, s4, 15 -; GFX1250-NEXT: s_lshr_b32 s96, s4, 13 -; GFX1250-NEXT: s_lshr_b32 s86, s4, 8 -; GFX1250-NEXT: s_lshr_b32 s64, s4, 7 -; GFX1250-NEXT: s_lshr_b32 s50, s4, 5 -; GFX1250-NEXT: s_lshr_b32 s38, s4, 3 -; GFX1250-NEXT: s_lshr_b32 s24, s4, 1 -; GFX1250-NEXT: s_bfe_i64 s[92:93], s[92:93], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[88:89], s[88:89], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v23, s71 :: v_dual_mov_b32 v24, s74 -; GFX1250-NEXT: v_mov_b32_e32 v25, s75 +; GFX1250-NEXT: v_dual_mov_b32 v21, s93 :: v_dual_mov_b32 v22, s86 +; GFX1250-NEXT: v_readlane_b32 s0, v5, 10 +; GFX1250-NEXT: v_dual_mov_b32 v23, s87 :: v_dual_mov_b32 v24, s82 +; GFX1250-NEXT: v_mov_b32_e32 v25, s83 ; GFX1250-NEXT: s_clause 0x5 -; GFX1250-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:272 -; GFX1250-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:256 -; GFX1250-NEXT: global_store_b128 v8, v[10:13], s[0:1] offset:240 -; GFX1250-NEXT: global_store_b128 v8, v[14:17], s[0:1] offset:224 -; GFX1250-NEXT: global_store_b128 v8, v[18:21], s[0:1] offset:208 -; GFX1250-NEXT: global_store_b128 v8, v[22:25], s[0:1] offset:192 +; GFX1250-NEXT: global_store_b128 v4, v[0:3], s[8:9] offset:272 +; GFX1250-NEXT: global_store_b128 v4, v[6:9], s[8:9] offset:256 +; GFX1250-NEXT: global_store_b128 v4, v[10:13], s[8:9] offset:240 +; GFX1250-NEXT: global_store_b128 v4, v[14:17], s[8:9] offset:224 +; GFX1250-NEXT: global_store_b128 v4, v[18:21], s[8:9] offset:208 +; GFX1250-NEXT: global_store_b128 v4, v[22:25], s[8:9] offset:192 ; GFX1250-NEXT: s_wait_xcnt 0x5 -; GFX1250-NEXT: v_dual_mov_b32 v0, s78 :: v_dual_mov_b32 v1, s79 -; GFX1250-NEXT: v_dual_mov_b32 v2, s80 :: v_dual_mov_b32 v3, s81 +; GFX1250-NEXT: v_dual_mov_b32 v0, s50 :: v_dual_mov_b32 v1, s51 +; GFX1250-NEXT: v_dual_mov_b32 v2, s48 :: v_dual_mov_b32 v3, s49 ; GFX1250-NEXT: s_wait_xcnt 0x4 -; GFX1250-NEXT: v_mov_b32_e32 v4, s82 -; GFX1250-NEXT: s_lshr_b32 s90, s4, 12 -; GFX1250-NEXT: s_lshr_b32 s76, s4, 10 -; GFX1250-NEXT: s_lshr_b32 s72, s4, 11 -; GFX1250-NEXT: s_bfe_i64 s[100:101], s[100:101], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[94:95], s[94:95], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v5, s83 :: v_dual_mov_b32 v6, s84 +; GFX1250-NEXT: v_mov_b32_e32 v6, s46 +; GFX1250-NEXT: v_readlane_b32 s1, v5, 11 +; GFX1250-NEXT: v_dual_mov_b32 v7, s47 :: v_dual_mov_b32 v8, s44 ; GFX1250-NEXT: s_wait_xcnt 0x3 -; GFX1250-NEXT: v_dual_mov_b32 v7, s85 :: v_dual_mov_b32 v10, s88 -; GFX1250-NEXT: s_lshr_b32 s60, s4, 9 -; GFX1250-NEXT: s_lshr_b32 s54, s4, 6 -; GFX1250-NEXT: s_lshr_b32 s42, s4, 4 -; GFX1250-NEXT: s_lshr_b32 s28, s4, 2 -; GFX1250-NEXT: s_bfe_i64 s[16:17], s[4:5], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[4:5], s[24:25], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[24:25], s[38:39], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[38:39], s[50:51], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[50:51], s[64:65], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[64:65], s[86:87], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[86:87], s[96:97], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[96:97], s[102:103], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[98:99], s[98:99], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v11, s89 :: v_dual_mov_b32 v12, s92 +; GFX1250-NEXT: v_dual_mov_b32 v9, s45 :: v_dual_mov_b32 v10, s42 +; GFX1250-NEXT: v_dual_mov_b32 v11, s43 :: v_dual_mov_b32 v12, s40 ; GFX1250-NEXT: s_wait_xcnt 0x2 -; GFX1250-NEXT: v_dual_mov_b32 v13, s93 :: v_dual_mov_b32 v14, s94 -; GFX1250-NEXT: s_bfe_i64 s[72:73], s[72:73], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[76:77], s[76:77], 0x10000 -; GFX1250-NEXT: s_bfe_i64 s[90:91], s[90:91], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v15, s95 :: v_dual_mov_b32 v16, s100 +; GFX1250-NEXT: v_dual_mov_b32 v13, s41 :: v_dual_mov_b32 v14, s38 +; GFX1250-NEXT: v_dual_mov_b32 v15, s39 :: v_dual_mov_b32 v16, s36 ; GFX1250-NEXT: s_wait_xcnt 0x1 -; GFX1250-NEXT: v_dual_mov_b32 v17, s101 :: v_dual_mov_b32 v18, s98 -; GFX1250-NEXT: s_bfe_i64 s[60:61], s[60:61], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v19, s99 :: v_dual_mov_b32 v20, s96 +; GFX1250-NEXT: v_dual_mov_b32 v17, s37 :: v_dual_mov_b32 v18, s34 +; GFX1250-NEXT: v_dual_mov_b32 v19, s35 :: v_dual_mov_b32 v20, s30 ; GFX1250-NEXT: s_wait_xcnt 0x0 -; GFX1250-NEXT: v_dual_mov_b32 v21, s97 :: v_dual_mov_b32 v22, s90 -; GFX1250-NEXT: s_bfe_i64 s[54:55], s[54:55], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v23, s91 :: v_dual_mov_b32 v24, s86 -; GFX1250-NEXT: v_mov_b32_e32 v25, s87 +; GFX1250-NEXT: v_dual_mov_b32 v21, s31 :: v_dual_mov_b32 v22, s16 +; GFX1250-NEXT: v_dual_mov_b32 v23, s17 :: v_dual_mov_b32 v24, s68 +; GFX1250-NEXT: v_mov_b32_e32 v25, s69 ; GFX1250-NEXT: s_clause 0x5 -; GFX1250-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:176 -; GFX1250-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:160 -; GFX1250-NEXT: global_store_b128 v8, v[10:13], s[0:1] offset:144 -; GFX1250-NEXT: global_store_b128 v8, v[14:17], s[0:1] offset:128 -; GFX1250-NEXT: global_store_b128 v8, v[18:21], s[0:1] offset:112 -; GFX1250-NEXT: global_store_b128 v8, v[22:25], s[0:1] offset:96 -; GFX1250-NEXT: s_wait_xcnt 0x5 -; GFX1250-NEXT: v_dual_mov_b32 v0, s76 :: v_dual_mov_b32 v1, s77 -; GFX1250-NEXT: v_dual_mov_b32 v2, s72 :: v_dual_mov_b32 v3, s73 +; GFX1250-NEXT: global_store_b128 v4, v[0:3], s[8:9] offset:176 +; GFX1250-NEXT: global_store_b128 v4, v[6:9], s[8:9] offset:160 +; GFX1250-NEXT: global_store_b128 v4, v[10:13], s[8:9] offset:144 +; GFX1250-NEXT: global_store_b128 v4, v[14:17], s[8:9] offset:128 +; GFX1250-NEXT: global_store_b128 v4, v[18:21], s[8:9] offset:112 +; GFX1250-NEXT: global_store_b128 v4, v[22:25], s[8:9] offset:96 ; GFX1250-NEXT: s_wait_xcnt 0x4 -; GFX1250-NEXT: v_mov_b32_e32 v4, s64 -; GFX1250-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v5, s65 :: v_dual_mov_b32 v6, s60 +; GFX1250-NEXT: v_dual_mov_b32 v7, s79 :: v_dual_mov_b32 v8, s0 +; GFX1250-NEXT: v_mov_b32_e32 v9, s1 +; GFX1250-NEXT: v_readlane_b32 s0, v5, 8 +; GFX1250-NEXT: v_readlane_b32 s1, v5, 9 +; GFX1250-NEXT: v_dual_mov_b32 v0, s72 :: v_dual_mov_b32 v1, s73 ; GFX1250-NEXT: s_wait_xcnt 0x3 -; GFX1250-NEXT: v_dual_mov_b32 v7, s61 :: v_dual_mov_b32 v10, s54 -; GFX1250-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000 -; GFX1250-NEXT: v_dual_mov_b32 v11, s55 :: v_dual_mov_b32 v12, s50 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX1250-NEXT: v_dual_mov_b32 v2, s76 :: v_dual_mov_b32 v10, s0 +; GFX1250-NEXT: v_mov_b32_e32 v11, s1 +; GFX1250-NEXT: v_readlane_b32 s0, v5, 6 +; GFX1250-NEXT: v_readlane_b32 s1, v5, 7 +; GFX1250-NEXT: v_dual_mov_b32 v3, s77 :: v_dual_mov_b32 v6, s78 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_dual_mov_b32 v12, s0 :: v_dual_mov_b32 v13, s1 +; GFX1250-NEXT: v_readlane_b32 s0, v5, 4 +; GFX1250-NEXT: v_readlane_b32 s1, v5, 5 ; GFX1250-NEXT: s_wait_xcnt 0x2 -; GFX1250-NEXT: v_dual_mov_b32 v13, s51 :: v_dual_mov_b32 v14, s42 -; GFX1250-NEXT: v_dual_mov_b32 v15, s43 :: v_dual_mov_b32 v16, s38 +; GFX1250-NEXT: v_dual_mov_b32 v14, s0 :: v_dual_mov_b32 v15, s1 +; GFX1250-NEXT: v_readlane_b32 s0, v5, 2 +; GFX1250-NEXT: v_readlane_b32 s1, v5, 3 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_dual_mov_b32 v16, s0 :: v_dual_mov_b32 v17, s1 +; GFX1250-NEXT: v_readlane_b32 s0, v5, 0 +; GFX1250-NEXT: v_readlane_b32 s1, v5, 1 ; GFX1250-NEXT: s_wait_xcnt 0x1 -; GFX1250-NEXT: v_dual_mov_b32 v17, s39 :: v_dual_mov_b32 v18, s28 -; GFX1250-NEXT: v_dual_mov_b32 v19, s29 :: v_dual_mov_b32 v20, s24 +; GFX1250-NEXT: v_dual_mov_b32 v18, s0 :: v_dual_mov_b32 v19, s1 +; GFX1250-NEXT: v_readlane_b32 s0, v30, 30 +; GFX1250-NEXT: v_readlane_b32 s1, v30, 31 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_dual_mov_b32 v20, s0 :: v_dual_mov_b32 v21, s1 +; GFX1250-NEXT: v_readlane_b32 s0, v30, 26 +; GFX1250-NEXT: v_readlane_b32 s1, v30, 27 ; GFX1250-NEXT: s_wait_xcnt 0x0 -; GFX1250-NEXT: v_dual_mov_b32 v21, s25 :: v_dual_mov_b32 v22, s16 -; GFX1250-NEXT: v_dual_mov_b32 v23, s17 :: v_dual_mov_b32 v24, s4 -; GFX1250-NEXT: v_mov_b32_e32 v25, s5 +; GFX1250-NEXT: v_dual_mov_b32 v22, s0 :: v_dual_mov_b32 v23, s1 +; GFX1250-NEXT: v_readlane_b32 s0, v30, 28 +; GFX1250-NEXT: v_readlane_b32 s1, v30, 29 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_dual_mov_b32 v24, s0 :: v_dual_mov_b32 v25, s1 ; GFX1250-NEXT: s_clause 0x5 -; GFX1250-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:80 -; GFX1250-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:64 -; GFX1250-NEXT: global_store_b128 v8, v[10:13], s[0:1] offset:48 -; GFX1250-NEXT: global_store_b128 v8, v[14:17], s[0:1] offset:32 -; GFX1250-NEXT: global_store_b128 v8, v[18:21], s[0:1] offset:16 -; GFX1250-NEXT: global_store_b128 v8, v[22:25], s[0:1] +; GFX1250-NEXT: global_store_b128 v4, v[0:3], s[8:9] offset:80 +; GFX1250-NEXT: global_store_b128 v4, v[6:9], s[8:9] offset:64 +; GFX1250-NEXT: global_store_b128 v4, v[10:13], s[8:9] offset:48 +; GFX1250-NEXT: global_store_b128 v4, v[14:17], s[8:9] offset:32 +; GFX1250-NEXT: global_store_b128 v4, v[18:21], s[8:9] offset:16 +; GFX1250-NEXT: global_store_b128 v4, v[22:25], s[8:9] ; GFX1250-NEXT: s_endpgm %load = load <64 x i1>, ptr addrspace(4) %in %ext = sext <64 x i1> %load to <64 x i64> diff --git a/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll b/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll index 0021af9381335..d870b02b496f2 100644 --- a/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll +++ b/llvm/test/CodeGen/AMDGPU/load-constant-i16.ll @@ -2601,90 +2601,88 @@ define amdgpu_kernel void @constant_zextload_v32i16_to_v32i32(ptr addrspace(1) % ; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x9 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s19, 0xf000 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s18, -1 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s33, s15, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s14, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s35, s15, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s36, s14, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s15, s15, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s14, s14, 0xffff -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s18, s1, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s19, s0, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s3, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s21, s2, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s13, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s31, s12, 16 -; GCN-NOHSA-SI-NEXT: s_and_b32 s35, s1, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s36, s0, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s37, s3, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s38, s2, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s33, s13, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s12, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s13, s13, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s12, s12, 0xffff -; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s16 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s17 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s14 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s34 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s36 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s15 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s33 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s11, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s29, s10, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s11, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s31, s10, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s11, s11, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s10, s10, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:112 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s12 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s34 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s13 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s30 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s9, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s27, s8, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s33 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s9, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s29, s8, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s9, s9, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s8, s8, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:96 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s10 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s29 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s31 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s11 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s28 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s7, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s25, s6, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s30 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s7, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s27, s6, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s7, s7, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s6, s6, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:80 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s8 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s27 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s29 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s9 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s26 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s5, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s23, s4, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s28 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s5, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s25, s4, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s5, s5, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s4, s4, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:64 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s25 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s27 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s7 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s24 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s26 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s3, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s23, s2, 16 +; GCN-NOHSA-SI-NEXT: s_and_b32 s3, s3, 0xffff +; GCN-NOHSA-SI-NEXT: s_and_b32 s2, s2, 0xffff +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:48 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s4 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s23 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s25 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s24 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s1, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s21, s0, 16 +; GCN-NOHSA-SI-NEXT: s_and_b32 s1, s1, 0xffff +; GCN-NOHSA-SI-NEXT: s_and_b32 s0, s0, 0xffff +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:32 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s2 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s23 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s3 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s22 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s38 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s0 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s21 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s37 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s1 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s20 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s36 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s19 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s35 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s18 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: constant_zextload_v32i16_to_v32i32: @@ -2699,34 +2697,34 @@ define amdgpu_kernel void @constant_zextload_v32i16_to_v32i32(ptr addrspace(1) % ; GCN-HSA-NEXT: s_lshr_b32 s18, s1, 16 ; GCN-HSA-NEXT: s_lshr_b32 s19, s0, 16 ; GCN-HSA-NEXT: s_lshr_b32 s20, s3, 16 -; GCN-HSA-NEXT: s_lshr_b32 s21, s2, 16 -; GCN-HSA-NEXT: s_lshr_b32 s22, s5, 16 -; GCN-HSA-NEXT: s_lshr_b32 s23, s4, 16 -; GCN-HSA-NEXT: s_lshr_b32 s24, s7, 16 -; GCN-HSA-NEXT: s_lshr_b32 s25, s6, 16 -; GCN-HSA-NEXT: s_lshr_b32 s26, s9, 16 -; GCN-HSA-NEXT: s_lshr_b32 s27, s8, 16 -; GCN-HSA-NEXT: s_lshr_b32 s28, s11, 16 -; GCN-HSA-NEXT: s_lshr_b32 s29, s10, 16 -; GCN-HSA-NEXT: s_lshr_b32 s30, s13, 16 -; GCN-HSA-NEXT: s_lshr_b32 s31, s12, 16 -; GCN-HSA-NEXT: s_lshr_b32 s33, s15, 16 -; GCN-HSA-NEXT: s_lshr_b32 s34, s14, 16 -; GCN-HSA-NEXT: s_and_b32 s35, s1, 0xffff -; GCN-HSA-NEXT: s_and_b32 s36, s0, 0xffff +; GCN-HSA-NEXT: s_and_b32 s21, s1, 0xffff +; GCN-HSA-NEXT: s_and_b32 s22, s0, 0xffff ; GCN-HSA-NEXT: s_and_b32 s3, s3, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s23, s2, 16 ; GCN-HSA-NEXT: s_and_b32 s2, s2, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s24, s5, 16 ; GCN-HSA-NEXT: s_and_b32 s5, s5, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s25, s4, 16 ; GCN-HSA-NEXT: s_and_b32 s4, s4, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s26, s7, 16 ; GCN-HSA-NEXT: s_and_b32 s7, s7, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s27, s6, 16 ; GCN-HSA-NEXT: s_and_b32 s6, s6, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s28, s9, 16 ; GCN-HSA-NEXT: s_and_b32 s9, s9, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s29, s8, 16 ; GCN-HSA-NEXT: s_and_b32 s8, s8, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s30, s11, 16 ; GCN-HSA-NEXT: s_and_b32 s11, s11, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s31, s10, 16 ; GCN-HSA-NEXT: s_and_b32 s10, s10, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s33, s13, 16 ; GCN-HSA-NEXT: s_and_b32 s13, s13, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s34, s12, 16 ; GCN-HSA-NEXT: s_and_b32 s12, s12, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s35, s15, 16 ; GCN-HSA-NEXT: s_and_b32 s15, s15, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s36, s14, 16 ; GCN-HSA-NEXT: s_and_b32 s14, s14, 0xffff ; GCN-HSA-NEXT: s_add_u32 s0, s16, 0x70 ; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 @@ -2739,62 +2737,62 @@ define amdgpu_kernel void @constant_zextload_v32i16_to_v32i32(ptr addrspace(1) % ; GCN-HSA-NEXT: s_add_u32 s0, s16, 0x50 ; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s34 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s36 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s15 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s33 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s35 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s0 ; GCN-HSA-NEXT: s_add_u32 s0, s16, 64 -; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[0:3] -; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: s_add_u32 s0, s16, 48 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s12 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s31 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s34 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s30 -; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s33 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s10 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s29 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s31 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s11 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s28 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s30 +; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[8:11] +; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GCN-HSA-NEXT: s_add_u32 s0, s16, 48 +; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s27 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s29 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s9 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s26 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s28 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: s_add_u32 s0, s16, 32 ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s27 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s24 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s26 ; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: s_add_u32 s0, s16, 16 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s23 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s22 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s24 ; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s23 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s36 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s22 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s19 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s35 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s21 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s18 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] @@ -3076,90 +3074,88 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i32(ptr addrspace(1) % ; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x9 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s19, 0xf000 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s18, -1 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s37, s15, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s38, s14, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s35, s15, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s36, s14, 16 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s15, s15 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s14, s14 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s18, s1, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s19, s0, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s20, s1 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s21, s0 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s22, s3, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s23, s2, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s24, s3 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s25, s2 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s35, s13, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s36, s12, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s13, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s34, s12, 16 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s13, s13 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s12, s12 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s16 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s17 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s14 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s38 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s36 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s15 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s37 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s11, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s34, s10, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s30, s11, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s31, s10, 16 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s11, s11 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s10, s10 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:112 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s12 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s36 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s34 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s13 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s30, s9, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s31, s8, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s33 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s28, s9, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s29, s8, 16 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s9, s9 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s8, s8 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:96 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s10 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s34 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s31 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s11 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s33 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s28, s7, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s29, s6, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s30 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s26, s7, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s27, s6, 16 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s7, s7 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s6, s6 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:80 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s8 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s29 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s9 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s30 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s26, s5, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s27, s4, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s28 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s24, s5, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s25, s4, 16 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s5, s5 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s4, s4 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:64 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s29 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s27 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s7 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s28 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s26 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s22, s3, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s23, s2, 16 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s3, s3 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s2, s2 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:48 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s4 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s27 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s25 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s26 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s24 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s20, s1, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s21, s0, 16 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s1, s1 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s0, s0 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:32 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s25 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s2 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s23 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s24 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s3 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s22 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s21 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s19 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s20 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s18 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s21 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s1 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s20 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: constant_sextload_v32i16_to_v32i32: @@ -3171,8 +3167,8 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i32(ptr addrspace(1) % ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GCN-HSA-NEXT: s_ashr_i32 s18, s1, 16 -; GCN-HSA-NEXT: s_ashr_i32 s19, s0, 16 +; GCN-HSA-NEXT: s_ashr_i32 s20, s1, 16 +; GCN-HSA-NEXT: s_ashr_i32 s21, s0, 16 ; GCN-HSA-NEXT: s_ashr_i32 s22, s3, 16 ; GCN-HSA-NEXT: s_ashr_i32 s23, s2, 16 ; GCN-HSA-NEXT: s_ashr_i32 s24, s5, 16 @@ -3187,55 +3183,55 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i32(ptr addrspace(1) % ; GCN-HSA-NEXT: s_ashr_i32 s34, s12, 16 ; GCN-HSA-NEXT: s_ashr_i32 s35, s15, 16 ; GCN-HSA-NEXT: s_ashr_i32 s36, s14, 16 -; GCN-HSA-NEXT: s_sext_i32_i16 s21, s0 -; GCN-HSA-NEXT: s_add_u32 s0, s16, 0x70 -; GCN-HSA-NEXT: s_sext_i32_i16 s20, s1 -; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s0 -; GCN-HSA-NEXT: s_add_u32 s0, s16, 0x60 -; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s0 -; GCN-HSA-NEXT: s_add_u32 s0, s16, 0x50 -; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 -; GCN-HSA-NEXT: s_sext_i32_i16 s15, s15 +; GCN-HSA-NEXT: s_add_u32 s18, s16, 0x70 +; GCN-HSA-NEXT: s_addc_u32 s19, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s18 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s19 +; GCN-HSA-NEXT: s_add_u32 s18, s16, 0x60 +; GCN-HSA-NEXT: s_sext_i32_i16 s10, s10 +; GCN-HSA-NEXT: s_addc_u32 s19, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s10 +; GCN-HSA-NEXT: s_sext_i32_i16 s10, s11 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s10 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 0x50 ; GCN-HSA-NEXT: s_sext_i32_i16 s14, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s0 +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 +; GCN-HSA-NEXT: s_sext_i32_i16 s14, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s36 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s35 -; GCN-HSA-NEXT: s_add_u32 s0, s16, 64 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s10 +; GCN-HSA-NEXT: s_sext_i32_i16 s10, s0 +; GCN-HSA-NEXT: s_sext_i32_i16 s0, s9 +; GCN-HSA-NEXT: s_sext_i32_i16 s8, s8 ; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[0:3] +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s0 +; GCN-HSA-NEXT: s_add_u32 s0, s16, 64 +; GCN-HSA-NEXT: s_sext_i32_i16 s12, s12 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s8 +; GCN-HSA-NEXT: s_sext_i32_i16 s8, s1 ; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: s_sext_i32_i16 s13, s13 -; GCN-HSA-NEXT: s_sext_i32_i16 s12, s12 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s18 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s12 +; GCN-HSA-NEXT: s_sext_i32_i16 s12, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 ; GCN-HSA-NEXT: s_add_u32 s0, s16, 48 -; GCN-HSA-NEXT: s_sext_i32_i16 s11, s11 -; GCN-HSA-NEXT: s_sext_i32_i16 s10, s10 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s12 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s19 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s34 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s13 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s33 ; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 -; GCN-HSA-NEXT: s_sext_i32_i16 s9, s9 -; GCN-HSA-NEXT: s_sext_i32_i16 s8, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s31 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s30 ; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[8:11] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: s_sext_i32_i16 s7, s7 ; GCN-HSA-NEXT: s_sext_i32_i16 s6, s6 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s29 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s28 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: s_add_u32 s0, s16, 32 @@ -3267,10 +3263,10 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i32(ptr addrspace(1) % ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s21 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s19 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s20 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s18 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: s_endpgm @@ -3555,170 +3551,170 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i32(ptr addrspace(1) % define amdgpu_kernel void @constant_zextload_v64i16_to_v64i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 { ; GCN-NOHSA-SI-LABEL: constant_zextload_v64i16_to_v64i32: ; GCN-NOHSA-SI: ; %bb.0: -; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[36:39], s[4:5], 0x9 +; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x9 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s39, 0xf000 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s38, -1 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0 -; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x10 +; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s36, s16 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s37, s17 +; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[16:31], s[18:19], 0x10 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s35, s3, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s40, s2, 16 -; GCN-NOHSA-SI-NEXT: s_and_b32 s55, s3, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s56, s2, 0xffff -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s2, s22, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s3, s25, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s67, s31, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s68, s30, 16 -; GCN-NOHSA-SI-NEXT: s_and_b32 s31, s31, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s30, s30, 0xffff -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s33, s1, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s0, 16 -; GCN-NOHSA-SI-NEXT: s_and_b32 s44, s1, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s46, s0, 0xffff -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s59, s21, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s60, s20, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s65, s29, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s66, s28, 16 -; GCN-NOHSA-SI-NEXT: s_and_b32 s21, s21, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s20, s20, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s29, s29, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s28, s28, 0xffff -; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s36 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s37 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s30 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s68 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s31 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s67 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s3 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s2 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s57, s19, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s58, s18, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s61, s23, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s62, s24, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s63, s27, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s64, s26, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s43, s7, 16 +; GCN-NOHSA-SI-NEXT: s_and_b32 s7, s7, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s41, s5, 16 +; GCN-NOHSA-SI-NEXT: s_and_b32 s44, s30, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s30, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s30 +; GCN-NOHSA-SI-NEXT: s_and_b32 s30, s31, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s31, s31, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s31 +; GCN-NOHSA-SI-NEXT: s_and_b32 s31, s28, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s28, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s28 +; GCN-NOHSA-SI-NEXT: s_and_b32 s28, s29, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s29, s29, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s29 +; GCN-NOHSA-SI-NEXT: s_and_b32 s29, s26, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s26, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s26 +; GCN-NOHSA-SI-NEXT: s_and_b32 s26, s27, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s27, s27, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s27 +; GCN-NOHSA-SI-NEXT: s_and_b32 s27, s24, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s24, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s24 +; GCN-NOHSA-SI-NEXT: s_and_b32 s24, s25, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s25, s25, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s25 +; GCN-NOHSA-SI-NEXT: s_and_b32 s25, s22, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s22, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s22 +; GCN-NOHSA-SI-NEXT: s_and_b32 s22, s23, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s23, s23, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s44 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s30 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s23 +; GCN-NOHSA-SI-NEXT: s_and_b32 s23, s20, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s20, 16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:240 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s20 +; GCN-NOHSA-SI-NEXT: s_and_b32 s20, s21, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s21, s21, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s28 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s23 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s20 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s19, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s21 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s21, s18, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s19, s19, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s18, s18, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s23, s23, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s22, s22, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s25, s25, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s24, s24, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s27, s27, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s26, s26, 0xffff -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s28 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s66 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s65 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s20 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s60 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s21 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s59 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s38, s17, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s39, s16, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s29 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s26 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s27 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s24 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s25 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s22 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s17, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s23, s16, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s17, s17, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s16, s16, 0xffff -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s26 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s64 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s27 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s63 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s24 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s62 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s25 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s22 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s23 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s61 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:224 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:208 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:176 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[36:39], 0 offset:224 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[36:39], 0 offset:208 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[36:39], 0 offset:192 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[36:39], 0 offset:176 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:160 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s18 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s58 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s21 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s19 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s57 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s53, s15, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s54, s14, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s20 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s15, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s25, s14, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s15, s15, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s14, s14, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:144 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s39 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s23 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s17 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s38 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s51, s13, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s52, s12, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s22 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s13, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s27, s12, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s13, s13, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s12, s12, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:128 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s14 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s54 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s25 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s15 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s53 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s49, s11, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s50, s10, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s24 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s11, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s29, s10, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s11, s11, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s10, s10, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:112 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s12 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s52 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s27 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s13 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s51 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s47, s9, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s48, s8, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s26 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s9, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s31, s8, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s9, s9, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s8, s8, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:96 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s10 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s50 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s29 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s11 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s49 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s43, s7, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s45, s6, 16 -; GCN-NOHSA-SI-NEXT: s_and_b32 s7, s7, 0xffff +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s28 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s44, s6, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s6, s6, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:80 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s8 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s48 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s31 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s9 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s47 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s41, s5, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s30 ; GCN-NOHSA-SI-NEXT: s_lshr_b32 s42, s4, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s5, s5, 0xffff ; GCN-NOHSA-SI-NEXT: s_and_b32 s4, s4, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:64 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s45 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s44 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s7 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s43 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s35, s3, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s40, s2, 16 +; GCN-NOHSA-SI-NEXT: s_and_b32 s3, s3, 0xffff +; GCN-NOHSA-SI-NEXT: s_and_b32 s2, s2, 0xffff +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:48 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s4 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s42 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s5 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s41 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s33, s1, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s0, 16 +; GCN-NOHSA-SI-NEXT: s_and_b32 s1, s1, 0xffff +; GCN-NOHSA-SI-NEXT: s_and_b32 s0, s0, 0xffff +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:32 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s56 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s2 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s40 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s55 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s3 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s46 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s0 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s34 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s44 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s1 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s33 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: constant_zextload_v64i16_to_v64i32: @@ -3739,14 +3735,6 @@ define amdgpu_kernel void @constant_zextload_v64i16_to_v64i32(ptr addrspace(1) % ; GCN-HSA-NEXT: s_lshr_b32 s42, s4, 16 ; GCN-HSA-NEXT: s_lshr_b32 s43, s7, 16 ; GCN-HSA-NEXT: s_lshr_b32 s44, s6, 16 -; GCN-HSA-NEXT: s_lshr_b32 s45, s9, 16 -; GCN-HSA-NEXT: s_lshr_b32 s46, s8, 16 -; GCN-HSA-NEXT: s_lshr_b32 s47, s11, 16 -; GCN-HSA-NEXT: s_lshr_b32 s48, s10, 16 -; GCN-HSA-NEXT: s_lshr_b32 s49, s13, 16 -; GCN-HSA-NEXT: s_lshr_b32 s50, s12, 16 -; GCN-HSA-NEXT: s_lshr_b32 s51, s15, 16 -; GCN-HSA-NEXT: s_lshr_b32 s52, s14, 16 ; GCN-HSA-NEXT: s_and_b32 s1, s1, 0xffff ; GCN-HSA-NEXT: s_and_b32 s0, s0, 0xffff ; GCN-HSA-NEXT: s_and_b32 s3, s3, 0xffff @@ -3755,137 +3743,144 @@ define amdgpu_kernel void @constant_zextload_v64i16_to_v64i32(ptr addrspace(1) % ; GCN-HSA-NEXT: s_and_b32 s4, s4, 0xffff ; GCN-HSA-NEXT: s_and_b32 s7, s7, 0xffff ; GCN-HSA-NEXT: s_and_b32 s6, s6, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s45, s9, 16 ; GCN-HSA-NEXT: s_and_b32 s9, s9, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s46, s8, 16 ; GCN-HSA-NEXT: s_and_b32 s8, s8, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s47, s11, 16 ; GCN-HSA-NEXT: s_and_b32 s11, s11, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s48, s10, 16 ; GCN-HSA-NEXT: s_and_b32 s10, s10, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s49, s13, 16 ; GCN-HSA-NEXT: s_and_b32 s13, s13, 0xffff -; GCN-HSA-NEXT: s_and_b32 s38, s12, 0xffff -; GCN-HSA-NEXT: s_and_b32 s12, s15, 0xffff -; GCN-HSA-NEXT: s_and_b32 s15, s14, 0xffff -; GCN-HSA-NEXT: s_lshr_b32 s14, s17, 16 -; GCN-HSA-NEXT: s_lshr_b32 s39, s16, 16 -; GCN-HSA-NEXT: s_lshr_b32 s53, s19, 16 -; GCN-HSA-NEXT: s_lshr_b32 s54, s18, 16 -; GCN-HSA-NEXT: s_lshr_b32 s55, s21, 16 -; GCN-HSA-NEXT: s_lshr_b32 s56, s20, 16 -; GCN-HSA-NEXT: s_lshr_b32 s57, s23, 16 -; GCN-HSA-NEXT: s_lshr_b32 s58, s22, 16 -; GCN-HSA-NEXT: s_lshr_b32 s59, s25, 16 -; GCN-HSA-NEXT: s_lshr_b32 s60, s24, 16 -; GCN-HSA-NEXT: s_lshr_b32 s61, s27, 16 -; GCN-HSA-NEXT: s_lshr_b32 s62, s26, 16 -; GCN-HSA-NEXT: s_lshr_b32 s63, s29, 16 -; GCN-HSA-NEXT: s_lshr_b32 s64, s28, 16 -; GCN-HSA-NEXT: s_lshr_b32 s65, s31, 16 -; GCN-HSA-NEXT: s_lshr_b32 s66, s30, 16 -; GCN-HSA-NEXT: s_and_b32 s67, s17, 0xffff -; GCN-HSA-NEXT: s_and_b32 s68, s16, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s50, s12, 16 +; GCN-HSA-NEXT: s_and_b32 s12, s12, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s38, s15, 16 +; GCN-HSA-NEXT: s_and_b32 s39, s15, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s51, s14, 16 +; GCN-HSA-NEXT: s_and_b32 s52, s14, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s53, s17, 16 +; GCN-HSA-NEXT: s_and_b32 s17, s17, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s54, s16, 16 +; GCN-HSA-NEXT: s_and_b32 s16, s16, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s55, s19, 16 ; GCN-HSA-NEXT: s_and_b32 s19, s19, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s56, s18, 16 ; GCN-HSA-NEXT: s_and_b32 s18, s18, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s57, s21, 16 ; GCN-HSA-NEXT: s_and_b32 s21, s21, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s58, s20, 16 ; GCN-HSA-NEXT: s_and_b32 s20, s20, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s59, s23, 16 ; GCN-HSA-NEXT: s_and_b32 s23, s23, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s60, s22, 16 ; GCN-HSA-NEXT: s_and_b32 s22, s22, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s61, s25, 16 ; GCN-HSA-NEXT: s_and_b32 s25, s25, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s62, s24, 16 ; GCN-HSA-NEXT: s_and_b32 s24, s24, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s63, s27, 16 ; GCN-HSA-NEXT: s_and_b32 s27, s27, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s64, s26, 16 ; GCN-HSA-NEXT: s_and_b32 s26, s26, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s65, s29, 16 ; GCN-HSA-NEXT: s_and_b32 s29, s29, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s66, s28, 16 ; GCN-HSA-NEXT: s_and_b32 s28, s28, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s67, s31, 16 ; GCN-HSA-NEXT: s_and_b32 s31, s31, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s68, s30, 16 ; GCN-HSA-NEXT: s_and_b32 s30, s30, 0xffff -; GCN-HSA-NEXT: s_add_u32 s16, s36, 0xf0 -; GCN-HSA-NEXT: s_addc_u32 s17, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s17 -; GCN-HSA-NEXT: s_add_u32 s16, s36, 0xe0 -; GCN-HSA-NEXT: s_addc_u32 s17, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s16 -; GCN-HSA-NEXT: s_add_u32 s16, s36, 0xd0 -; GCN-HSA-NEXT: s_addc_u32 s17, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s16 -; GCN-HSA-NEXT: s_add_u32 s16, s36, 0xc0 -; GCN-HSA-NEXT: s_addc_u32 s17, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s16 -; GCN-HSA-NEXT: s_add_u32 s16, s36, 0xb0 -; GCN-HSA-NEXT: s_addc_u32 s17, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v24, s16 -; GCN-HSA-NEXT: s_add_u32 s16, s36, 0xa0 -; GCN-HSA-NEXT: s_addc_u32 s17, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v27, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v26, s16 -; GCN-HSA-NEXT: s_add_u32 s16, s36, 0x90 +; GCN-HSA-NEXT: s_add_u32 s14, s36, 0xf0 +; GCN-HSA-NEXT: s_addc_u32 s15, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s14 +; GCN-HSA-NEXT: s_add_u32 s14, s36, 0xe0 +; GCN-HSA-NEXT: s_addc_u32 s15, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s14 +; GCN-HSA-NEXT: s_add_u32 s14, s36, 0xd0 +; GCN-HSA-NEXT: s_addc_u32 s15, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v28, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s14 +; GCN-HSA-NEXT: s_add_u32 s14, s36, 0xc0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s68 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s31 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s67 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s28 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s66 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s29 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s65 +; GCN-HSA-NEXT: s_addc_u32 s15, s37, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[23:24], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[25:26], v[4:7] +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s14 +; GCN-HSA-NEXT: s_add_u32 s14, s36, 0xb0 +; GCN-HSA-NEXT: s_addc_u32 s15, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v30, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, s14 +; GCN-HSA-NEXT: s_add_u32 s14, s36, 0xa0 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s26 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s62 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s64 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s27 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s61 -; GCN-HSA-NEXT: s_addc_u32 s17, s37, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[8:11] -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s16 -; GCN-HSA-NEXT: s_add_u32 s16, s36, 0x80 -; GCN-HSA-NEXT: s_addc_u32 s17, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s63 +; GCN-HSA-NEXT: s_addc_u32 s15, s37, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[27:28], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s24 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s60 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s62 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s25 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s59 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s14 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s61 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s14 +; GCN-HSA-NEXT: s_add_u32 s14, s36, 0x90 +; GCN-HSA-NEXT: s_addc_u32 s15, s37, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s22 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s14 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s15 +; GCN-HSA-NEXT: s_add_u32 s14, s36, 0x80 +; GCN-HSA-NEXT: s_addc_u32 s15, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s14 ; GCN-HSA-NEXT: s_add_u32 s14, s36, 0x70 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s66 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s31 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s65 -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[12:15] -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s28 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s60 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s23 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s59 ; GCN-HSA-NEXT: s_addc_u32 s15, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s64 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s29 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s63 -; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s12 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s22 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s58 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s23 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s57 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s20 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s58 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s21 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s57 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s56 +; GCN-HSA-NEXT: flat_store_dwordx4 v[29:30], v[16:19] +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s12 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s15 ; GCN-HSA-NEXT: s_add_u32 s12, s36, 0x60 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s20 -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[4:7] -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s56 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s21 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s55 -; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s18 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s13 -; GCN-HSA-NEXT: s_addc_u32 s13, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s19 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s55 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s54 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s19 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s53 -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s38 -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s15 -; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[16:19] -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s68 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s39 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s67 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s52 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s51 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s50 -; GCN-HSA-NEXT: v_mov_b32_e32 v24, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s49 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s12 -; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[4:7] -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[8:11] -; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] -; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; GCN-HSA-NEXT: s_nop 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s52 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s51 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s39 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s38 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s14 +; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[20:23] +; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7] +; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s13 +; GCN-HSA-NEXT: s_addc_u32 s13, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s50 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s49 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 ; GCN-HSA-NEXT: s_add_u32 s10, s36, 0x50 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11 @@ -3948,34 +3943,57 @@ define amdgpu_kernel void @constant_zextload_v64i16_to_v64i32(ptr addrspace(1) % ; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[36:39], s[4:5], 0x24 ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NOHSA-VI-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x0 -; GCN-NOHSA-VI-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x40 +; GCN-NOHSA-VI-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0 +; GCN-NOHSA-VI-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x40 ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s33, s17, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s34, s16, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s35, s19, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s40, s18, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s41, s21, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s42, s20, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s43, s23, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s44, s22, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s45, s25, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s46, s24, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s47, s27, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s48, s26, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s38, s29, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s39, s28, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s49, s31, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s50, s30, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s51, s1, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s52, s0, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s53, s3, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s54, s2, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s55, s5, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s56, s4, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s57, s7, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s58, s6, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s59, s9, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s33, s1, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s34, s0, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s35, s3, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s40, s2, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s41, s5, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s42, s4, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s43, s7, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s44, s6, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s45, s9, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s46, s8, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s47, s11, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s48, s10, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s38, s13, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s39, s12, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s49, s15, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s50, s14, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s51, s17, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s52, s16, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s53, s19, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s54, s18, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s55, s21, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s56, s20, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s57, s23, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s58, s22, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s59, s25, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s60, s24, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s61, s27, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s62, s26, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s63, s29, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s64, s28, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s65, s31, 16 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s66, s30, 16 +; GCN-NOHSA-VI-NEXT: s_and_b32 s1, s1, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s0, s0, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s3, s3, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s2, s2, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s5, s5, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s4, s4, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s7, s7, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s6, s6, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s9, s9, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s8, s8, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s67, s11, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s68, s10, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s13, s13, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s12, s12, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s15, s15, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s14, s14, 0xffff ; GCN-NOHSA-VI-NEXT: s_and_b32 s17, s17, 0xffff ; GCN-NOHSA-VI-NEXT: s_and_b32 s16, s16, 0xffff ; GCN-NOHSA-VI-NEXT: s_and_b32 s19, s19, 0xffff @@ -3990,170 +4008,151 @@ define amdgpu_kernel void @constant_zextload_v64i16_to_v64i32(ptr addrspace(1) % ; GCN-NOHSA-VI-NEXT: s_and_b32 s26, s26, 0xffff ; GCN-NOHSA-VI-NEXT: s_and_b32 s29, s29, 0xffff ; GCN-NOHSA-VI-NEXT: s_and_b32 s28, s28, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s31, s31, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s30, s30, 0xffff -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s60, s8, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s61, s11, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s62, s10, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s63, s13, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s64, s12, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s65, s15, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s66, s14, 16 -; GCN-NOHSA-VI-NEXT: s_and_b32 s67, s1, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s68, s0, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s3, s3, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s2, s2, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s5, s5, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s4, s4, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s7, s7, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s6, s6, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s9, s9, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s8, s8, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s11, s11, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s10, s10, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s13, s13, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s12, s12, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s0, s15, 0xffff -; GCN-NOHSA-VI-NEXT: s_and_b32 s1, s14, 0xffff -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 0xf0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s1 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 0xe0 +; GCN-NOHSA-VI-NEXT: s_and_b32 s10, s31, 0xffff +; GCN-NOHSA-VI-NEXT: s_and_b32 s11, s30, 0xffff +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s10 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s36, 0xf0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s11 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s66 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s65 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s36, 0xe0 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 0xd0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s12 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s28 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s64 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s13 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s29 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s63 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s36, 0xd0 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 0xc0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s10 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s26 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s62 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s11 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s27 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s61 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s36, 0xc0 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 0xb0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s8 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s24 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s60 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s25 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s59 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s36, 0xb0 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 0xa0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s6 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s22 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s58 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s7 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s23 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s57 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s36, 0xa0 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 0x90 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s4 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s20 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s56 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s21 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s55 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s36, 0x90 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 0x80 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s2 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s18 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s54 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s3 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s19 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s53 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s36, 0x80 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 0x70 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s68 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s16 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s52 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s67 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s17 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s51 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s36, 0x70 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 0x60 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s30 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s14 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s50 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s31 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s15 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s49 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s36, 0x60 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 0x50 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s28 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s12 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s39 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s29 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s13 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s38 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s36, 0x50 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 64 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s26 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s68 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s48 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s27 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s67 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s47 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 48 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s24 +; GCN-NOHSA-VI-NEXT: s_nop 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s8 +; GCN-NOHSA-VI-NEXT: s_add_u32 s8, s36, 64 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s9 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s9, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s8 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s46 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s25 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s45 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s9 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 32 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s22 +; GCN-NOHSA-VI-NEXT: s_nop 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s6 +; GCN-NOHSA-VI-NEXT: s_add_u32 s6, s36, 48 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s7 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s7, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s6 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s44 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s23 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s43 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s7 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s36, 16 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s20 +; GCN-NOHSA-VI-NEXT: s_nop 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s4 +; GCN-NOHSA-VI-NEXT: s_add_u32 s4, s36, 32 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s5 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s5, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s4 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s42 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s21 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s41 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s5 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s18 +; GCN-NOHSA-VI-NEXT: s_nop 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s2 +; GCN-NOHSA-VI-NEXT: s_add_u32 s2, s36, 16 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s3 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s3, s37, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s3 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s40 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s19 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s35 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s2 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s36 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s16 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s0 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s34 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s17 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s1 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s33 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s37 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] @@ -4451,170 +4450,170 @@ define amdgpu_kernel void @constant_zextload_v64i16_to_v64i32(ptr addrspace(1) % define amdgpu_kernel void @constant_sextload_v64i16_to_v64i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 { ; GCN-NOHSA-SI-LABEL: constant_sextload_v64i16_to_v64i32: ; GCN-NOHSA-SI: ; %bb.0: -; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[36:39], s[4:5], 0x9 +; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s39, 0xf000 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s38, -1 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0 -; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x10 +; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[16:31], s[2:3], 0x0 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s36, s0 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s37, s1 +; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[0:15], s[2:3], 0x10 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s41, s3, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s42, s2, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s43, s3 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s44, s2 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s2, s22, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s3, s23 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s67, s31, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s68, s30, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s43, s23, 16 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s23, s23 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s41, s21, 16 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s44, s14 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s14, s14, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s14 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s14, s15 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s15, s15, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s15 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s15, s12 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s12, s12, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s12 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s12, s13 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s13, s13, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s13 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s13, s10 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s10, s10, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s10 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s10, s11 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s11, s11, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s11 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s11, s8 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s8, s8, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s8 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s8, s9 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s9, s9, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s9 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s9, s6 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s6, s6, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s6 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s6, s7 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s7, s7, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s44 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s14 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s7 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s7, s4 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s4, s4, 16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:240 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s4 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s4, s5 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s5, s5, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s15 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s12 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s7 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s4 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s4, s3, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s5 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s5, s2, 16 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s3, s3 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s2, s2 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s13 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s10 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s11 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s8 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s6 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s6, s1, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s7, s0, 16 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s1, s1 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s0, s0 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[36:39], 0 offset:224 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[36:39], 0 offset:208 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[36:39], 0 offset:192 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[36:39], 0 offset:176 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:160 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s2 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s3 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s4 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s8, s31, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s9, s30, 16 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s31, s31 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s30, s30 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s1, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s34, s0, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s35, s1 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s40, s0 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s59, s21, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s60, s20, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s21, s21 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s20, s20 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s65, s29, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s66, s28, 16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:144 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s7 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s1 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s6 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s10, s29, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s11, s28, 16 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s29, s29 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s28, s28 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s36 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s37 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:128 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s30 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s68 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s9 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s31 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s67 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s2 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s3 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s57, s19, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s58, s18, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s19, s19 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s18, s18 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s61, s23, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s22, s22 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s23, s25, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s62, s24, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s25, s25 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s24, s24 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s63, s27, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s64, s26, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s8 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s12, s27, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s13, s26, 16 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s27, s27 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s26, s26 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s28 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s66 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s65 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:112 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s20 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s60 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s21 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s59 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s55, s17, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s56, s16, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s17, s17 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s16, s16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s26 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s64 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s27 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s63 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s24 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s62 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s25 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s23 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s22 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s61 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:224 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:208 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:176 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s28 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s11 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s29 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s10 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s14, s25, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s15, s24, 16 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s25, s25 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s24, s24 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:96 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s18 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s58 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s19 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s57 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s38, s15, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s39, s14, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s15, s15 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s14, s14 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s56 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s17 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s55 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s53, s13, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s54, s12, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s13, s13 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s12, s12 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s14 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s39 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s15 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s38 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s51, s11, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s52, s10, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s11, s11 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s10, s10 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s12 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s13 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s53 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s49, s9, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s50, s8, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s9, s9 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s8, s8 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s10 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s52 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s11 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s51 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s47, s7, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s48, s6, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s7, s7 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s6, s6 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s8 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s50 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s9 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s49 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s45, s5, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s46, s4, 16 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s5, s5 -; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s4, s4 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s26 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s13 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s27 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s12 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s44, s22, 16 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s22, s22 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:80 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s48 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s7 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s47 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s24 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s15 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s25 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s14 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s42, s20, 16 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s21, s21 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s20, s20 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:64 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s4 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s46 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s45 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s22 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s44 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s23 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s43 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s35, s19, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s40, s18, 16 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s19, s19 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s18, s18 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:48 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s44 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s20 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s42 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s43 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s21 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s41 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s17, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s34, s16, 16 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s17, s17 +; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s16, s16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:32 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s18 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s40 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s19 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s40 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s16 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s34 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s35 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s17 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s33 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: constant_sextload_v64i16_to_v64i32: @@ -4639,14 +4638,14 @@ define amdgpu_kernel void @constant_sextload_v64i16_to_v64i32(ptr addrspace(1) % ; GCN-HSA-NEXT: s_ashr_i32 s46, s8, 16 ; GCN-HSA-NEXT: s_ashr_i32 s47, s11, 16 ; GCN-HSA-NEXT: s_ashr_i32 s48, s10, 16 -; GCN-HSA-NEXT: s_ashr_i32 s49, s13, 16 -; GCN-HSA-NEXT: s_ashr_i32 s50, s12, 16 -; GCN-HSA-NEXT: s_ashr_i32 s38, s15, 16 -; GCN-HSA-NEXT: s_ashr_i32 s39, s14, 16 +; GCN-HSA-NEXT: s_ashr_i32 s38, s13, 16 +; GCN-HSA-NEXT: s_ashr_i32 s39, s12, 16 +; GCN-HSA-NEXT: s_ashr_i32 s49, s15, 16 +; GCN-HSA-NEXT: s_ashr_i32 s50, s14, 16 ; GCN-HSA-NEXT: s_ashr_i32 s51, s17, 16 -; GCN-HSA-NEXT: s_ashr_i32 s52, s16, 16 -; GCN-HSA-NEXT: s_ashr_i32 s53, s19, 16 -; GCN-HSA-NEXT: s_ashr_i32 s54, s18, 16 +; GCN-HSA-NEXT: s_ashr_i32 s54, s16, 16 +; GCN-HSA-NEXT: s_ashr_i32 s55, s19, 16 +; GCN-HSA-NEXT: s_ashr_i32 s56, s18, 16 ; GCN-HSA-NEXT: s_ashr_i32 s57, s21, 16 ; GCN-HSA-NEXT: s_ashr_i32 s58, s20, 16 ; GCN-HSA-NEXT: s_ashr_i32 s59, s23, 16 @@ -4659,179 +4658,179 @@ define amdgpu_kernel void @constant_sextload_v64i16_to_v64i32(ptr addrspace(1) % ; GCN-HSA-NEXT: s_ashr_i32 s66, s28, 16 ; GCN-HSA-NEXT: s_ashr_i32 s67, s31, 16 ; GCN-HSA-NEXT: s_ashr_i32 s68, s30, 16 -; GCN-HSA-NEXT: s_sext_i32_i16 s56, s18 -; GCN-HSA-NEXT: s_add_u32 s18, s36, 0xf0 -; GCN-HSA-NEXT: s_sext_i32_i16 s55, s19 -; GCN-HSA-NEXT: s_addc_u32 s19, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s18 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s19 -; GCN-HSA-NEXT: s_add_u32 s18, s36, 0xe0 -; GCN-HSA-NEXT: s_addc_u32 s19, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s18 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s19 -; GCN-HSA-NEXT: s_add_u32 s18, s36, 0xd0 -; GCN-HSA-NEXT: s_addc_u32 s19, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s19 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s18 +; GCN-HSA-NEXT: s_add_u32 s52, s36, 0xf0 +; GCN-HSA-NEXT: s_addc_u32 s53, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s52 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s53 +; GCN-HSA-NEXT: s_add_u32 s52, s36, 0xe0 +; GCN-HSA-NEXT: s_sext_i32_i16 s30, s30 +; GCN-HSA-NEXT: s_addc_u32 s53, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s52 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30 +; GCN-HSA-NEXT: s_sext_i32_i16 s30, s31 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s53 +; GCN-HSA-NEXT: s_add_u32 s52, s36, 0xd0 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s68 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s30 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s67 +; GCN-HSA-NEXT: s_sext_i32_i16 s18, s18 +; GCN-HSA-NEXT: s_addc_u32 s53, s37, 0 +; GCN-HSA-NEXT: s_sext_i32_i16 s28, s28 +; GCN-HSA-NEXT: flat_store_dwordx4 v[23:24], v[0:3] +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s28 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18 +; GCN-HSA-NEXT: s_sext_i32_i16 s18, s19 +; GCN-HSA-NEXT: s_sext_i32_i16 s28, s29 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s18 ; GCN-HSA-NEXT: s_add_u32 s18, s36, 0xc0 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s66 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s28 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s65 ; GCN-HSA-NEXT: s_addc_u32 s19, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s19 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s18 -; GCN-HSA-NEXT: s_add_u32 s18, s36, 0xb0 -; GCN-HSA-NEXT: s_addc_u32 s19, s37, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[25:26], v[4:7] ; GCN-HSA-NEXT: v_mov_b32_e32 v25, s19 ; GCN-HSA-NEXT: v_mov_b32_e32 v24, s18 -; GCN-HSA-NEXT: s_add_u32 s18, s36, 0xa0 -; GCN-HSA-NEXT: s_addc_u32 s19, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v27, s19 -; GCN-HSA-NEXT: s_sext_i32_i16 s27, s27 +; GCN-HSA-NEXT: s_sext_i32_i16 s16, s16 +; GCN-HSA-NEXT: s_add_u32 s18, s36, 0xb0 ; GCN-HSA-NEXT: s_sext_i32_i16 s26, s26 -; GCN-HSA-NEXT: v_mov_b32_e32 v26, s18 -; GCN-HSA-NEXT: s_add_u32 s18, s36, 0x90 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 +; GCN-HSA-NEXT: s_addc_u32 s19, s37, 0 +; GCN-HSA-NEXT: s_sext_i32_i16 s16, s17 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s52 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s26 +; GCN-HSA-NEXT: s_sext_i32_i16 s26, s27 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s16 +; GCN-HSA-NEXT: s_add_u32 s16, s36, 0xa0 +; GCN-HSA-NEXT: v_mov_b32_e32 v28, s53 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s64 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s27 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s26 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s63 -; GCN-HSA-NEXT: s_addc_u32 s19, s37, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[8:11] -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s19 -; GCN-HSA-NEXT: s_sext_i32_i16 s25, s25 -; GCN-HSA-NEXT: s_sext_i32_i16 s24, s24 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s18 -; GCN-HSA-NEXT: s_add_u32 s18, s36, 0x80 +; GCN-HSA-NEXT: s_addc_u32 s17, s37, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[27:28], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s17 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s16 ; GCN-HSA-NEXT: s_sext_i32_i16 s14, s14 -; GCN-HSA-NEXT: s_sext_i32_i16 s31, s31 -; GCN-HSA-NEXT: s_sext_i32_i16 s30, s30 +; GCN-HSA-NEXT: s_add_u32 s16, s36, 0x90 +; GCN-HSA-NEXT: s_sext_i32_i16 s24, s24 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s14 +; GCN-HSA-NEXT: s_addc_u32 s17, s37, 0 +; GCN-HSA-NEXT: s_sext_i32_i16 s14, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s24 +; GCN-HSA-NEXT: s_sext_i32_i16 s24, s25 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s14 +; GCN-HSA-NEXT: s_add_u32 s14, s36, 0x80 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s62 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s25 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s24 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s61 -; GCN-HSA-NEXT: s_addc_u32 s19, s37, 0 -; GCN-HSA-NEXT: s_sext_i32_i16 s15, s15 -; GCN-HSA-NEXT: s_sext_i32_i16 s23, s23 +; GCN-HSA-NEXT: s_addc_u32 s15, s37, 0 ; GCN-HSA-NEXT: s_sext_i32_i16 s22, s22 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s68 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s31 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s67 -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[12:15] -; GCN-HSA-NEXT: s_sext_i32_i16 s12, s12 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s14 +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s22 +; GCN-HSA-NEXT: s_sext_i32_i16 s22, s23 +; GCN-HSA-NEXT: v_mov_b32_e32 v30, s19 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s14 ; GCN-HSA-NEXT: s_add_u32 s14, s36, 0x70 -; GCN-HSA-NEXT: s_sext_i32_i16 s29, s29 -; GCN-HSA-NEXT: s_sext_i32_i16 s28, s28 -; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s15 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s22 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s60 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s23 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s59 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s60 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s22 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s59 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, s18 ; GCN-HSA-NEXT: s_addc_u32 s15, s37, 0 -; GCN-HSA-NEXT: s_sext_i32_i16 s13, s13 -; GCN-HSA-NEXT: s_sext_i32_i16 s21, s21 -; GCN-HSA-NEXT: s_sext_i32_i16 s20, s20 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s28 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s66 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s29 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s65 -; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s20 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12 -; GCN-HSA-NEXT: s_add_u32 s12, s36, 0x60 -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[4:7] -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s58 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s21 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s57 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s13 -; GCN-HSA-NEXT: s_addc_u32 s13, s37, 0 -; GCN-HSA-NEXT: s_sext_i32_i16 s10, s10 -; GCN-HSA-NEXT: s_sext_i32_i16 s17, s17 -; GCN-HSA-NEXT: s_sext_i32_i16 s16, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s56 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s16 +; GCN-HSA-NEXT: flat_store_dwordx4 v[29:30], v[16:19] +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s56 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s55 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s17 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s14 +; GCN-HSA-NEXT: s_sext_i32_i16 s14, s0 +; GCN-HSA-NEXT: s_sext_i32_i16 s0, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s54 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s55 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s53 -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s19 -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s15 -; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[16:19] -; GCN-HSA-NEXT: s_sext_i32_i16 s11, s11 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s52 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s18 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s51 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s51 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s50 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s49 +; GCN-HSA-NEXT: s_sext_i32_i16 s12, s12 +; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7] +; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s0 +; GCN-HSA-NEXT: s_add_u32 s0, s36, 0x60 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s12 +; GCN-HSA-NEXT: s_sext_i32_i16 s12, s1 +; GCN-HSA-NEXT: s_addc_u32 s1, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GCN-HSA-NEXT: s_add_u32 s0, s36, 0x50 +; GCN-HSA-NEXT: s_addc_u32 s1, s37, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s39 +; GCN-HSA-NEXT: s_sext_i32_i16 s11, s11 +; GCN-HSA-NEXT: s_sext_i32_i16 s10, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s38 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s50 -; GCN-HSA-NEXT: v_mov_b32_e32 v24, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s49 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s12 -; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[4:7] -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[8:11] -; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] -; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; GCN-HSA-NEXT: s_sext_i32_i16 s8, s8 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GCN-HSA-NEXT: s_add_u32 s0, s36, 64 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 -; GCN-HSA-NEXT: s_add_u32 s10, s36, 0x50 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11 -; GCN-HSA-NEXT: s_addc_u32 s11, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s48 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s47 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 -; GCN-HSA-NEXT: s_sext_i32_i16 s9, s9 +; GCN-HSA-NEXT: s_addc_u32 s1, s37, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_sext_i32_i16 s6, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GCN-HSA-NEXT: s_sext_i32_i16 s9, s9 +; GCN-HSA-NEXT: s_sext_i32_i16 s8, s8 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GCN-HSA-NEXT: s_add_u32 s0, s36, 48 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 -; GCN-HSA-NEXT: s_add_u32 s8, s36, 64 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9 -; GCN-HSA-NEXT: s_addc_u32 s9, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s46 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s45 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 -; GCN-HSA-NEXT: s_sext_i32_i16 s7, s7 +; GCN-HSA-NEXT: s_addc_u32 s1, s37, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_sext_i32_i16 s4, s4 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GCN-HSA-NEXT: s_sext_i32_i16 s7, s7 +; GCN-HSA-NEXT: s_sext_i32_i16 s6, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GCN-HSA-NEXT: s_add_u32 s0, s36, 32 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 -; GCN-HSA-NEXT: s_add_u32 s6, s36, 48 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7 -; GCN-HSA-NEXT: s_addc_u32 s7, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s44 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s43 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 -; GCN-HSA-NEXT: s_sext_i32_i16 s5, s5 +; GCN-HSA-NEXT: s_addc_u32 s1, s37, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_sext_i32_i16 s2, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GCN-HSA-NEXT: s_sext_i32_i16 s5, s5 +; GCN-HSA-NEXT: s_sext_i32_i16 s4, s4 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GCN-HSA-NEXT: s_add_u32 s0, s36, 16 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 -; GCN-HSA-NEXT: s_add_u32 s4, s36, 32 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5 -; GCN-HSA-NEXT: s_addc_u32 s5, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s42 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s41 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 +; GCN-HSA-NEXT: s_addc_u32 s1, s37, 0 ; GCN-HSA-NEXT: s_sext_i32_i16 s3, s3 +; GCN-HSA-NEXT: s_sext_i32_i16 s2, s2 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_sext_i32_i16 s1, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GCN-HSA-NEXT: s_sext_i32_i16 s20, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s36, 16 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s3 -; GCN-HSA-NEXT: s_addc_u32 s3, s37, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s40 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s35 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GCN-HSA-NEXT: s_sext_i32_i16 s0, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s20 +; GCN-HSA-NEXT: s_sext_i32_i16 s20, s21 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s36 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s58 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s20 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s57 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s34 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s33 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s37 +; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[20:23] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: s_endpgm ; @@ -7155,113 +7154,113 @@ define amdgpu_kernel void @constant_sextload_v16i16_to_v16i64(ptr addrspace(1) % ; GCN-HSA: ; %bb.0: ; GCN-HSA-NEXT: s_load_dwordx4 s[8:11], s[8:9], 0x0 ; GCN-HSA-NEXT: s_add_i32 s12, s12, s17 -; GCN-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 ; GCN-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 +; GCN-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0 ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GCN-HSA-NEXT: s_mov_b32 s12, s7 -; GCN-HSA-NEXT: s_ashr_i32 s25, s1, 31 -; GCN-HSA-NEXT: s_ashr_i32 s27, s1, 16 -; GCN-HSA-NEXT: s_ashr_i32 s30, s3, 31 -; GCN-HSA-NEXT: s_ashr_i32 s31, s3, 16 -; GCN-HSA-NEXT: s_mov_b32 s14, s5 -; GCN-HSA-NEXT: s_mov_b32 s16, s3 -; GCN-HSA-NEXT: s_mov_b32 s18, s1 -; GCN-HSA-NEXT: s_lshr_b32 s20, s6, 16 +; GCN-HSA-NEXT: s_mov_b32 s16, s5 +; GCN-HSA-NEXT: s_mov_b32 s18, s3 +; GCN-HSA-NEXT: s_mov_b32 s20, s1 ; GCN-HSA-NEXT: s_lshr_b32 s22, s4, 16 ; GCN-HSA-NEXT: s_lshr_b32 s24, s2, 16 ; GCN-HSA-NEXT: s_lshr_b32 s26, s0, 16 -; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[2:3], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[12:13], 0x100000 -; GCN-HSA-NEXT: s_ashr_i32 s33, s5, 31 -; GCN-HSA-NEXT: s_ashr_i32 s34, s5, 16 -; GCN-HSA-NEXT: s_ashr_i32 s35, s7, 31 -; GCN-HSA-NEXT: s_ashr_i32 s36, s7, 16 -; GCN-HSA-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[28:29], s[4:5], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x100000 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[26:27], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[24:25], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[22:23], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[4:5], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s27, s1, 31 +; GCN-HSA-NEXT: s_ashr_i32 s29, s1, 16 +; GCN-HSA-NEXT: s_mov_b32 s4, s7 +; GCN-HSA-NEXT: s_lshr_b32 s28, s6, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[0:1], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[2:3], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s33, s3, 31 +; GCN-HSA-NEXT: s_ashr_i32 s34, s3, 16 +; GCN-HSA-NEXT: s_ashr_i32 s35, s5, 31 +; GCN-HSA-NEXT: s_ashr_i32 s36, s5, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[30:31], s[6:7], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s37, s7, 31 +; GCN-HSA-NEXT: s_ashr_i32 s38, s7, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[0:1], s[26:27], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[24:25], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[22:23], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[28:29], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x100000 -; GCN-HSA-NEXT: s_add_u32 s22, s8, 0x70 -; GCN-HSA-NEXT: s_addc_u32 s23, s9, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s14 -; GCN-HSA-NEXT: s_add_u32 s14, s8, 0x50 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s15 -; GCN-HSA-NEXT: s_addc_u32 s15, s9, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s15 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s14 -; GCN-HSA-NEXT: s_add_u32 s14, s8, 48 -; GCN-HSA-NEXT: s_addc_u32 s15, s9, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s22 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s15 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s23 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s36 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s35 -; GCN-HSA-NEXT: s_add_u32 s14, s8, 16 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s34 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s33 +; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x100000 +; GCN-HSA-NEXT: s_add_u32 s24, s8, 0x70 +; GCN-HSA-NEXT: s_addc_u32 s25, s9, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s24 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s25 +; GCN-HSA-NEXT: s_add_u32 s24, s8, 0x50 +; GCN-HSA-NEXT: s_addc_u32 s25, s9, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 +; GCN-HSA-NEXT: s_add_u32 s4, s8, 48 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 +; GCN-HSA-NEXT: s_addc_u32 s5, s9, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s5 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s24 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s38 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s37 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s4 +; GCN-HSA-NEXT: s_add_u32 s4, s8, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s25 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s36 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s35 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s18 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s19 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s34 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s33 ; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[0:3] -; GCN-HSA-NEXT: s_addc_u32 s15, s9, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s31 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s30 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s18 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s19 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s27 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s15 ; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[8:11] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s25 +; GCN-HSA-NEXT: s_addc_u32 s5, s9, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 +; GCN-HSA-NEXT: s_add_u32 s4, s8, 0x60 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s20 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s21 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s29 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s27 +; GCN-HSA-NEXT: s_addc_u32 s5, s9, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 -; GCN-HSA-NEXT: s_add_u32 s6, s8, 0x60 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s7 -; GCN-HSA-NEXT: s_addc_u32 s7, s9, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s20 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s21 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 -; GCN-HSA-NEXT: s_add_u32 s6, s8, 64 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_addc_u32 s7, s9, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s28 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s29 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s12 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s31 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s22 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s23 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 +; GCN-HSA-NEXT: s_add_u32 s4, s8, 64 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_nop 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4 -; GCN-HSA-NEXT: s_add_u32 s4, s8, 32 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5 ; GCN-HSA-NEXT: s_addc_u32 s5, s9, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s11 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s8, 32 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 +; GCN-HSA-NEXT: s_addc_u32 s3, s9, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_endpgm -; -; GCN-NOHSA-VI-LABEL: constant_sextload_v16i16_to_v16i64: +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s11 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 +; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GCN-HSA-NEXT: s_endpgm +; +; GCN-NOHSA-VI-LABEL: constant_sextload_v16i16_to_v16i64: ; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24 ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) @@ -7521,106 +7520,104 @@ define amdgpu_kernel void @constant_zextload_v32i16_to_v32i64(ptr addrspace(1) % ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, v1 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s19, 0xf000 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s18, -1 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s25, s15, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s27, s15, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s15, s15, 0xffff -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s18, s1, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s19, s3, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s13, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s33, s2, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s0, 16 -; GCN-NOHSA-SI-NEXT: s_and_b32 s35, s0, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s36, s2, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s37, s1, 0xffff -; GCN-NOHSA-SI-NEXT: s_and_b32 s38, s3, 0xffff +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s13, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s13, s13, 0xffff -; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s16 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s17 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s15 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s25 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s23, s11, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s27 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s25, s11, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s11, s11, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:240 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s13 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s24 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s9, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s26 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s9, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s9, s9, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:208 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:208 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s11 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s23 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s21, s7, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s25 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s23, s7, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s7, s7, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:176 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s9 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s22 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s5, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s24 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s5, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s5, s5, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:144 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s7 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s21 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s23 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s21, s3, 16 +; GCN-NOHSA-SI-NEXT: s_and_b32 s3, s3, 0xffff +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:112 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s20 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s22 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s1, 16 +; GCN-NOHSA-SI-NEXT: s_and_b32 s1, s1, 0xffff +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:80 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s38 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s19 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s14, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s3 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s21 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s14, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s14, s14, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:48 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s37 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s18 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s27, s12, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s1 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s20 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s29, s12, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s12, s12, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s14 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s26 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s10, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s28 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s10, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s10, s10, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:224 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s12 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s27 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s29, s8, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s29 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s31, s8, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s8, s8, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:192 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:192 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s10 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s28 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s6, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s30 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s33, s6, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s6, s6, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:160 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s8 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s29 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s31, s4, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s31 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s4, 16 ; GCN-NOHSA-SI-NEXT: s_and_b32 s4, s4, 0xffff -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:128 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s30 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s33 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s35, s2, 16 +; GCN-NOHSA-SI-NEXT: s_and_b32 s2, s2, 0xffff +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:96 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s4 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s31 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s34 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s36, s0, 16 +; GCN-NOHSA-SI-NEXT: s_and_b32 s0, s0, 0xffff +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:64 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s36 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s33 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s2 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s35 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:32 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s35 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s34 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s36 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: constant_zextload_v32i16_to_v32i64: @@ -7634,119 +7631,120 @@ define amdgpu_kernel void @constant_zextload_v32i16_to_v32i64(ptr addrspace(1) % ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GCN-HSA-NEXT: s_lshr_b32 s23, s1, 16 -; GCN-HSA-NEXT: s_lshr_b32 s24, s3, 16 -; GCN-HSA-NEXT: s_lshr_b32 s25, s5, 16 -; GCN-HSA-NEXT: s_lshr_b32 s26, s7, 16 -; GCN-HSA-NEXT: s_lshr_b32 s27, s9, 16 -; GCN-HSA-NEXT: s_lshr_b32 s28, s11, 16 -; GCN-HSA-NEXT: s_lshr_b32 s29, s13, 16 -; GCN-HSA-NEXT: s_lshr_b32 s30, s15, 16 -; GCN-HSA-NEXT: s_lshr_b32 s31, s14, 16 -; GCN-HSA-NEXT: s_lshr_b32 s33, s12, 16 -; GCN-HSA-NEXT: s_lshr_b32 s34, s10, 16 -; GCN-HSA-NEXT: s_lshr_b32 s22, s8, 16 -; GCN-HSA-NEXT: s_lshr_b32 s21, s6, 16 ; GCN-HSA-NEXT: s_lshr_b32 s20, s4, 16 ; GCN-HSA-NEXT: s_lshr_b32 s19, s2, 16 ; GCN-HSA-NEXT: s_lshr_b32 s18, s0, 16 ; GCN-HSA-NEXT: s_and_b32 s0, s0, 0xffff ; GCN-HSA-NEXT: s_and_b32 s2, s2, 0xffff ; GCN-HSA-NEXT: s_and_b32 s4, s4, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s21, s6, 16 ; GCN-HSA-NEXT: s_and_b32 s6, s6, 0xffff -; GCN-HSA-NEXT: s_and_b32 s35, s8, 0xffff -; GCN-HSA-NEXT: s_and_b32 s10, s10, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s22, s8, 16 +; GCN-HSA-NEXT: s_and_b32 s8, s8, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s23, s10, 16 +; GCN-HSA-NEXT: s_and_b32 s24, s10, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s25, s12, 16 ; GCN-HSA-NEXT: s_and_b32 s12, s12, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s26, s14, 16 ; GCN-HSA-NEXT: s_and_b32 s14, s14, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s27, s1, 16 ; GCN-HSA-NEXT: s_and_b32 s1, s1, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s28, s3, 16 ; GCN-HSA-NEXT: s_and_b32 s3, s3, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s29, s5, 16 ; GCN-HSA-NEXT: s_and_b32 s5, s5, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s30, s7, 16 ; GCN-HSA-NEXT: s_and_b32 s7, s7, 0xffff -; GCN-HSA-NEXT: s_and_b32 s36, s9, 0xffff -; GCN-HSA-NEXT: s_and_b32 s11, s11, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s31, s9, 16 +; GCN-HSA-NEXT: s_and_b32 s9, s9, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s33, s11, 16 +; GCN-HSA-NEXT: s_and_b32 s34, s11, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s35, s13, 16 ; GCN-HSA-NEXT: s_and_b32 s13, s13, 0xffff +; GCN-HSA-NEXT: s_lshr_b32 s36, s15, 16 ; GCN-HSA-NEXT: s_and_b32 s15, s15, 0xffff -; GCN-HSA-NEXT: s_add_u32 s8, s16, 0xf0 -; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 -; GCN-HSA-NEXT: s_add_u32 s8, s16, 0xd0 -; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s9 -; GCN-HSA-NEXT: s_add_u32 s8, s16, 0xb0 -; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s9 -; GCN-HSA-NEXT: s_add_u32 s8, s16, 0x90 -; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s9 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s8 -; GCN-HSA-NEXT: s_add_u32 s8, s16, 0x70 -; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s9 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s8 -; GCN-HSA-NEXT: s_add_u32 s8, s16, 0x50 -; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s9 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s8 -; GCN-HSA-NEXT: s_add_u32 s8, s16, 48 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 0xf0 +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 0xd0 +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s11 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 0xb0 +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s11 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 0x90 +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s11 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 0x70 +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s11 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s10 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 0x50 +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s15 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s30 -; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s36 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s11 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s9 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s29 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s35 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 48 ; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s11 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s28 -; GCN-HSA-NEXT: s_add_u32 s8, s16, 16 +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s34 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s33 ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] -; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s36 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s27 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s11 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s9 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s31 ; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s9 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s7 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s26 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s30 ; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s8 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 16 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s25 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s29 ; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[0:3] -; GCN-HSA-NEXT: s_add_u32 s8, s16, 0xe0 +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s24 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s28 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10 ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s23 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s27 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 0xe0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s31 -; GCN-HSA-NEXT: s_add_u32 s8, s16, 0xc0 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s26 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 0xc0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8 +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s33 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 -; GCN-HSA-NEXT: s_add_u32 s8, s16, 0xa0 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s25 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 +; GCN-HSA-NEXT: s_add_u32 s10, s16, 0xa0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s34 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 -; GCN-HSA-NEXT: s_add_u32 s8, s16, 0x80 +; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s24 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s23 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GCN-HSA-NEXT: s_nop 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 +; GCN-HSA-NEXT: s_add_u32 s8, s16, 0x80 ; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s35 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s22 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] @@ -8190,157 +8188,156 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) % ; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x9 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-SI-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s19, 0xf000 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s18, -1 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NOHSA-SI-NEXT: s_mov_b32 s42, s15 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s43, s11, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s25, s3, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s27, s3, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s45, s11, 16 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s44, s13 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s54, s3 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s36, s2, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[2:3], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[2:3], s[42:43], 0x100000 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s47, s13, 31 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s46, s11 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s2 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s3 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[2:3], s[44:45], 0x100000 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s49, s13, 16 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s48, s9 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s2 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s3 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[2:3], s[46:47], 0x100000 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s51, s15, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s53, s15, 16 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s50, s7 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s52, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s2 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s3 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[2:3], s[48:49], 0x100000 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s1, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s23, s1, 16 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s40, s1 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s38, s0, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[0:1], 0x100000 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s16 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s17 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s2 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s3 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[2:3], s[50:51], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[52:53], 0x100000 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s29, s5, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s31, s5, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s14, 16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s2 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s3 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s53 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s51 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s49 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s47 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, s16 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, s17 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[54:55], 0x100000 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s12, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x100000 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, s31 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v23, s29 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s68, s0, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[0:1], 0x100000 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s15, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s0 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s15, 31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s0 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s13, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s0 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s13, 31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s0 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s11, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s0 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s11, 31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s0 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s9, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s0 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s9, 31 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s34, s15 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s0 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s7, 16 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s44, s5 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s0 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s7, 31 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s42, s1 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s64, s4, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s66, s2, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[2:3], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[4:5], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s34 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s35 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s2, s1, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s4, s1, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s0 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[0:1], s[44:45], 0x100000 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s40, s13 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s48, s7 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:240 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s16 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:208 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s17 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s27 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s25 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s0 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s5, 16 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s52, s11 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s56, s9 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s38, s3 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s60, s8, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[8:9], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[48:49], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s0 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s0, s5, 31 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s58, s10, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[10:11], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s40 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s41 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[56:57], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s8 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s1 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s8, s3, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s3, s3, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s0 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[0:1], s[38:39], 0x100000 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s46, s14, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s62, s6, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[6:7], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s52 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s53 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s10 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s11 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s9 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[42:43], 0x100000 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[16:19], 0 offset:208 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[16:19], 0 offset:176 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[16:19], 0 offset:144 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[16:19], 0 offset:112 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:80 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s23 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x100000 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s10, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x100000 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s1 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s3 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s8 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s54, s12, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[50:51], s[14:15], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x100000 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:48 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s14 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s15 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s22 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s23 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s8, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x100000 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s7 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s4 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s2 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[12:13], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[54:55], 0x100000 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s12 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s13 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s24 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s25 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s39, s9, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s41, s9, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s6, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x100000 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:192 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s50 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s51 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s46 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s47 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[56:57], s[58:59], 0x100000 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:224 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s10 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s11 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s26 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s27 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s35, s7, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s37, s7, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s4, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x100000 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s36 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s37 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s10 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s11 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[52:53], s[60:61], 0x100000 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:192 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s8 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s9 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s28 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s29 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x100000 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s35 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x100000 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s30 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s56 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s57 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[62:63], 0x100000 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:160 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s7 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s30 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s31 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s37 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[40:41], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x100000 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s28 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s29 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s52 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s53 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[64:65], 0x100000 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:128 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s4 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s34 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s17 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[38:39], 0x100000 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s26 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s27 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s12 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s13 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[66:67], 0x100000 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:96 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s24 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s25 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s40 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s41 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[68:69], 0x100000 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:64 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s22 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s23 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s14 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s15 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:32 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s20 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s21 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s36 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s37 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s45 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s43 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s41 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s39 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s33 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s18 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s19 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s17 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:176 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:144 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s34 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: constant_sextload_v32i16_to_v32i64: @@ -8352,158 +8349,157 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) % ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GCN-HSA-NEXT: s_mov_b32 s30, s15 -; GCN-HSA-NEXT: s_ashr_i32 s41, s3, 31 -; GCN-HSA-NEXT: s_ashr_i32 s55, s3, 16 -; GCN-HSA-NEXT: s_ashr_i32 s57, s5, 31 -; GCN-HSA-NEXT: s_ashr_i32 s59, s5, 16 -; GCN-HSA-NEXT: s_ashr_i32 s61, s7, 31 -; GCN-HSA-NEXT: s_ashr_i32 s63, s7, 16 -; GCN-HSA-NEXT: s_ashr_i32 s65, s9, 31 -; GCN-HSA-NEXT: s_ashr_i32 s67, s9, 16 -; GCN-HSA-NEXT: s_mov_b32 s42, s13 -; GCN-HSA-NEXT: s_mov_b32 s44, s11 -; GCN-HSA-NEXT: s_mov_b32 s46, s9 -; GCN-HSA-NEXT: s_mov_b32 s48, s7 -; GCN-HSA-NEXT: s_mov_b32 s50, s5 +; GCN-HSA-NEXT: s_mov_b32 s40, s5 ; GCN-HSA-NEXT: s_mov_b32 s38, s3 ; GCN-HSA-NEXT: s_mov_b32 s36, s1 -; GCN-HSA-NEXT: s_lshr_b32 s52, s14, 16 -; GCN-HSA-NEXT: s_lshr_b32 s54, s12, 16 +; GCN-HSA-NEXT: s_lshr_b32 s34, s4, 16 +; GCN-HSA-NEXT: s_lshr_b32 s42, s2, 16 +; GCN-HSA-NEXT: s_lshr_b32 s44, s0, 16 +; GCN-HSA-NEXT: s_ashr_i32 s55, s1, 16 +; GCN-HSA-NEXT: s_ashr_i32 s57, s3, 31 +; GCN-HSA-NEXT: s_ashr_i32 s59, s3, 16 +; GCN-HSA-NEXT: s_ashr_i32 s61, s5, 31 +; GCN-HSA-NEXT: s_ashr_i32 s63, s5, 16 +; GCN-HSA-NEXT: s_mov_b32 s46, s7 +; GCN-HSA-NEXT: s_lshr_b32 s48, s6, 16 +; GCN-HSA-NEXT: s_ashr_i32 s65, s7, 31 +; GCN-HSA-NEXT: s_mov_b32 s50, s9 +; GCN-HSA-NEXT: s_lshr_b32 s52, s8, 16 +; GCN-HSA-NEXT: s_mov_b32 s54, s11 ; GCN-HSA-NEXT: s_lshr_b32 s56, s10, 16 -; GCN-HSA-NEXT: s_lshr_b32 s58, s8, 16 -; GCN-HSA-NEXT: s_lshr_b32 s60, s6, 16 -; GCN-HSA-NEXT: s_lshr_b32 s62, s4, 16 -; GCN-HSA-NEXT: s_lshr_b32 s64, s2, 16 -; GCN-HSA-NEXT: s_lshr_b32 s66, s0, 16 -; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[2:3], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[30:31], 0x100000 +; GCN-HSA-NEXT: s_mov_b32 s58, s13 +; GCN-HSA-NEXT: s_lshr_b32 s60, s12, 16 +; GCN-HSA-NEXT: s_mov_b32 s62, s15 +; GCN-HSA-NEXT: s_lshr_b32 s64, s14, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[0:1], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[2:3], 0x100000 ; GCN-HSA-NEXT: s_ashr_i32 s33, s1, 31 -; GCN-HSA-NEXT: s_ashr_i32 s40, s1, 16 -; GCN-HSA-NEXT: s_ashr_i32 s68, s11, 31 -; GCN-HSA-NEXT: s_ashr_i32 s69, s11, 16 -; GCN-HSA-NEXT: s_ashr_i32 s70, s13, 31 -; GCN-HSA-NEXT: s_ashr_i32 s71, s13, 16 -; GCN-HSA-NEXT: s_ashr_i32 s72, s15, 31 -; GCN-HSA-NEXT: s_ashr_i32 s73, s15, 16 -; GCN-HSA-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[4:5], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[0:1], s[4:5], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[6:7], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s66, s7, 16 ; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[8:9], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s67, s9, 31 +; GCN-HSA-NEXT: s_ashr_i32 s68, s9, 16 ; GCN-HSA-NEXT: s_bfe_i64 s[26:27], s[10:11], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s69, s11, 31 +; GCN-HSA-NEXT: s_ashr_i32 s70, s11, 16 ; GCN-HSA-NEXT: s_bfe_i64 s[28:29], s[12:13], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[34:35], s[14:15], 0x100000 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 -; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[66:67], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[64:65], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[62:63], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[60:61], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[58:59], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s71, s13, 31 +; GCN-HSA-NEXT: s_ashr_i32 s72, s13, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[30:31], s[14:15], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s73, s15, 31 +; GCN-HSA-NEXT: s_ashr_i32 s74, s15, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[44:45], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[42:43], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[34:35], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[48:49], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[52:53], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[56:57], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[54:55], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[30:31], s[52:53], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[60:61], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[34:35], s[64:65], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[42:43], s[46:47], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[44:45], s[50:51], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[46:47], s[54:55], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[48:49], s[58:59], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[50:51], s[62:63], 0x100000 ; GCN-HSA-NEXT: s_add_u32 s52, s16, 0xf0 ; GCN-HSA-NEXT: s_addc_u32 s53, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s42 -; GCN-HSA-NEXT: s_add_u32 s42, s16, 0xd0 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s43 -; GCN-HSA-NEXT: s_addc_u32 s43, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s42 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s43 -; GCN-HSA-NEXT: s_add_u32 s42, s16, 0xb0 -; GCN-HSA-NEXT: s_addc_u32 s43, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s42 -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s43 -; GCN-HSA-NEXT: s_add_u32 s42, s16, 0x90 -; GCN-HSA-NEXT: s_addc_u32 s43, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v24, s42 -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s43 -; GCN-HSA-NEXT: s_add_u32 s42, s16, 0x70 -; GCN-HSA-NEXT: s_addc_u32 s43, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v26, s42 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s52 -; GCN-HSA-NEXT: v_mov_b32_e32 v27, s43 -; GCN-HSA-NEXT: s_add_u32 s42, s16, 0x50 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s53 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s73 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s72 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s71 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s70 -; GCN-HSA-NEXT: s_addc_u32 s43, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s44 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s45 -; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[2:5] -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s69 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s68 -; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[6:9] -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s36 -; GCN-HSA-NEXT: s_add_u32 s36, s16, 48 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s37 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s52 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s53 +; GCN-HSA-NEXT: s_add_u32 s52, s16, 0xd0 +; GCN-HSA-NEXT: s_addc_u32 s53, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s52 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s53 +; GCN-HSA-NEXT: s_add_u32 s52, s16, 0xb0 +; GCN-HSA-NEXT: s_addc_u32 s53, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s50 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s51 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s74 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s73 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s48 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s49 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s72 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s71 +; GCN-HSA-NEXT: flat_store_dwordx4 v[23:24], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[25:26], v[4:7] +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s38 +; GCN-HSA-NEXT: s_add_u32 s38, s16, 0x90 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s39 +; GCN-HSA-NEXT: s_addc_u32 s39, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s38 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s39 +; GCN-HSA-NEXT: s_add_u32 s38, s16, 0x70 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s52 +; GCN-HSA-NEXT: s_addc_u32 s39, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v28, s53 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s46 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s47 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s70 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s69 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s36 +; GCN-HSA-NEXT: s_add_u32 s36, s16, 0x50 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s37 ; GCN-HSA-NEXT: s_addc_u32 s37, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s36 -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s37 -; GCN-HSA-NEXT: s_add_u32 s36, s16, 16 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s46 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s47 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s67 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s65 +; GCN-HSA-NEXT: flat_store_dwordx4 v[27:28], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s36 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s37 +; GCN-HSA-NEXT: s_add_u32 s36, s16, 48 ; GCN-HSA-NEXT: s_addc_u32 s37, s17, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[14:17] -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s48 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s30 -; GCN-HSA-NEXT: s_add_u32 s30, s16, 0xe0 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s49 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s63 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s61 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s31 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s44 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s45 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s68 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s67 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s30 +; GCN-HSA-NEXT: s_add_u32 s30, s16, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, s38 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s31 +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] ; GCN-HSA-NEXT: s_addc_u32 s31, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v28, s42 -; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s50 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14 -; GCN-HSA-NEXT: s_add_u32 s14, s16, 0xc0 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s51 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s59 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s57 -; GCN-HSA-NEXT: v_mov_b32_e32 v29, s43 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s15 -; GCN-HSA-NEXT: s_addc_u32 s15, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s38 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s39 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s55 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s41 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s36 ; GCN-HSA-NEXT: v_mov_b32_e32 v24, s30 -; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[18:21] -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s37 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s15 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s40 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s33 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s34 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s35 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s28 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s29 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s42 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s43 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s66 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s65 +; GCN-HSA-NEXT: v_mov_b32_e32 v30, s39 ; GCN-HSA-NEXT: v_mov_b32_e32 v25, s31 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s14 -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[4:7] +; GCN-HSA-NEXT: s_add_u32 s30, s16, 0xe0 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s40 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s41 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s63 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s61 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s36 +; GCN-HSA-NEXT: flat_store_dwordx4 v[29:30], v[16:19] +; GCN-HSA-NEXT: s_addc_u32 s31, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s30 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s59 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s57 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s55 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s33 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s37 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s34 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s35 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s31 +; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[20:23] +; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] -; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[0:3] -; GCN-HSA-NEXT: s_nop 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s14 +; GCN-HSA-NEXT: s_add_u32 s14, s16, 0xc0 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s15 +; GCN-HSA-NEXT: s_addc_u32 s15, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s12 ; GCN-HSA-NEXT: s_add_u32 s12, s16, 0xa0 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s28 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s29 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s13 ; GCN-HSA-NEXT: s_addc_u32 s13, s17, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s12 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s26 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s27 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s13 @@ -8529,28 +8525,27 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) % ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: s_nop 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GCN-HSA-NEXT: s_add_u32 s0, s16, 64 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GCN-HSA-NEXT: s_add_u32 s0, s16, 32 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6 -; GCN-HSA-NEXT: s_add_u32 s6, s16, 64 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7 -; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 +; GCN-HSA-NEXT: s_addc_u32 s1, s17, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4 -; GCN-HSA-NEXT: s_add_u32 s4, s16, 32 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5 -; GCN-HSA-NEXT: s_addc_u32 s5, s17, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s19 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s19 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17 @@ -8563,211 +8558,208 @@ define amdgpu_kernel void @constant_sextload_v32i16_to_v32i64(ptr addrspace(1) % ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-VI-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s22, s0, 16 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s26, s1 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s28, s1, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s30, s2, 16 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s34, s3 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s36, s3, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s40, s4, 16 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s42, s5 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s44, s5, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s46, s6, 16 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s48, s7 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s50, s7, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s52, s8, 16 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s54, s9 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s56, s9, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s58, s10, 16 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s60, s11 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s62, s11, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s66, s12, 16 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s68, s13 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s70, s13, 16 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s74, s14, 16 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s76, s15 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s78, s15, 16 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s20, s1 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s26, s1, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[24:25], s[2:3], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s2, s2, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[30:31], s[4:5], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s4, s4, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[38:39], s[6:7], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s6, s6, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[44:45], s[8:9], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s8, s8, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[50:51], s[10:11], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s10, s10, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[56:57], s[12:13], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s12, s12, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[62:63], s[14:15], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s14, s14, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[22:23], s[20:21], 0x100000 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[20:21], s[26:27], 0x100000 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[26:27], s[2:3], 0x100000 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s2, s3 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[34:35], s[4:5], 0x100000 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s4, s5 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[40:41], s[6:7], 0x100000 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s6, s7 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[46:47], s[8:9], 0x100000 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s8, s9 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[52:53], s[10:11], 0x100000 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s10, s11 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[58:59], s[12:13], 0x100000 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s12, s13 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[64:65], s[14:15], 0x100000 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s14, s15 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[18:19], s[0:1], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[0:1], s[2:3], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[20:21], s[6:7], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[24:25], s[8:9], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[38:39], s[10:11], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[64:65], s[12:13], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[72:73], s[14:15], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[4:5], s[22:23], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[8:9], s[26:27], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[6:7], s[28:29], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[10:11], s[30:31], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[14:15], s[34:35], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[12:13], s[36:37], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[22:23], s[40:41], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[28:29], s[42:43], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[26:27], s[44:45], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[30:31], s[46:47], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[36:37], s[48:49], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[34:35], s[50:51], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[40:41], s[52:53], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[44:45], s[54:55], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[42:43], s[56:57], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[46:47], s[58:59], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[48:49], s[60:61], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[50:51], s[62:63], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[52:53], s[66:67], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[54:55], s[68:69], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[56:57], s[70:71], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[58:59], s[74:75], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[60:61], s[76:77], 0x100000 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[62:63], s[78:79], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s0, s0, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[28:29], s[2:3], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s2, s3, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[36:37], s[4:5], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s4, s5, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[42:43], s[6:7], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s6, s7, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[48:49], s[8:9], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s8, s9, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[54:55], s[10:11], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s10, s11, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[60:61], s[12:13], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s12, s13, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[66:67], s[14:15], 0x100000 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s14, s15, 16 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x100000 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x100000 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x100000 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x100000 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x100000 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x100000 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x100000 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x100000 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s14 +; GCN-NOHSA-VI-NEXT: s_add_u32 s14, s16, 0xf0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s15 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s15, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s14 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s66 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s67 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s15 +; GCN-NOHSA-VI-NEXT: s_add_u32 s14, s16, 0xe0 +; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GCN-NOHSA-VI-NEXT: s_addc_u32 s15, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s14 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s62 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s63 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s64 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s65 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s15 +; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GCN-NOHSA-VI-NEXT: s_nop 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s12 +; GCN-NOHSA-VI-NEXT: s_add_u32 s12, s16, 0xd0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s13 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s13, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s12 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s60 -; GCN-NOHSA-VI-NEXT: s_add_u32 s60, s16, 0xf0 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s61 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s61, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s60 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s62 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s63 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s61 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s13 +; GCN-NOHSA-VI-NEXT: s_add_u32 s12, s16, 0xc0 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: s_nop 0 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s13, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s12 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s56 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s57 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s58 -; GCN-NOHSA-VI-NEXT: s_add_u32 s58, s16, 0xe0 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s59 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s59, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s58 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s72 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s73 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s59 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s13 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-NOHSA-VI-NEXT: s_nop 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s10 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s16, 0xb0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s11 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s54 -; GCN-NOHSA-VI-NEXT: s_add_u32 s54, s16, 0xd0 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s55 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s55, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s54 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s56 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s57 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s55 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 +; GCN-NOHSA-VI-NEXT: s_add_u32 s10, s16, 0xa0 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: s_nop 0 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s11, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s50 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s51 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s52 -; GCN-NOHSA-VI-NEXT: s_add_u32 s52, s16, 0xc0 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s53 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s53, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s52 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s64 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s65 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s53 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s11 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-NOHSA-VI-NEXT: s_nop 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s8 +; GCN-NOHSA-VI-NEXT: s_add_u32 s8, s16, 0x90 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s9 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s9, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s8 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s48 -; GCN-NOHSA-VI-NEXT: s_add_u32 s48, s16, 0xb0 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s49 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s49, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s48 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s50 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s51 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s49 -; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: s_nop 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s38 -; GCN-NOHSA-VI-NEXT: s_add_u32 s38, s16, 0xa0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s39 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s39, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s38 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s46 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s47 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s39 -; GCN-NOHSA-VI-NEXT: s_add_u32 s38, s16, 0x90 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s9 +; GCN-NOHSA-VI-NEXT: s_add_u32 s8, s16, 0x80 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: s_addc_u32 s39, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s38 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s9, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s8 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s44 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s45 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s42 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s43 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s39 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s46 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s47 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s9 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-NOHSA-VI-NEXT: s_nop 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s24 -; GCN-NOHSA-VI-NEXT: s_add_u32 s24, s16, 0x80 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s25 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s25, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s24 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s6 +; GCN-NOHSA-VI-NEXT: s_add_u32 s6, s16, 0x70 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s7 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s7, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s6 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s42 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s43 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s7 +; GCN-NOHSA-VI-NEXT: s_add_u32 s6, s16, 0x60 +; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GCN-NOHSA-VI-NEXT: s_addc_u32 s7, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s6 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s38 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s39 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s40 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s41 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s25 -; GCN-NOHSA-VI-NEXT: s_add_u32 s24, s16, 0x70 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s7 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: s_addc_u32 s25, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s24 +; GCN-NOHSA-VI-NEXT: s_nop 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s4 +; GCN-NOHSA-VI-NEXT: s_add_u32 s4, s16, 0x50 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s5 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s5, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s4 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s36 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s37 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s5 +; GCN-NOHSA-VI-NEXT: s_add_u32 s4, s16, 64 +; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GCN-NOHSA-VI-NEXT: s_addc_u32 s5, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s4 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s30 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s31 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s34 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s35 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s25 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s5 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-NOHSA-VI-NEXT: s_nop 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s20 -; GCN-NOHSA-VI-NEXT: s_add_u32 s20, s16, 0x60 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s21 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s21, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s20 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s30 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s31 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s21 -; GCN-NOHSA-VI-NEXT: s_add_u32 s20, s16, 0x50 -; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: s_addc_u32 s21, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s20 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s2 +; GCN-NOHSA-VI-NEXT: s_add_u32 s2, s16, 48 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s3 +; GCN-NOHSA-VI-NEXT: s_addc_u32 s3, s17, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s3 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s2 +; GCN-NOHSA-VI-NEXT: s_add_u32 s2, s16, 32 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s28 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s26 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s27 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s21 -; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: s_nop 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s2 -; GCN-NOHSA-VI-NEXT: s_add_u32 s2, s16, 64 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s3 ; GCN-NOHSA-VI-NEXT: s_addc_u32 s3, s17, 0 +; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s3 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s2 -; GCN-NOHSA-VI-NEXT: s_add_u32 s2, s16, 48 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s22 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s23 +; GCN-NOHSA-VI-NEXT: s_add_u32 s2, s16, 16 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s24 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s25 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s26 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s27 ; GCN-NOHSA-VI-NEXT: s_addc_u32 s3, s17, 0 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s3 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s14 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s15 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s12 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s13 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s22 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s23 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s20 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s21 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s2 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: s_nop 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s16, 32 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s1 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s17, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: s_add_u32 s0, s16, 16 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s10 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s11 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s1, s17, 0 -; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s1 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s8 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s9 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s6 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s7 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s0 -; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s16 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s18 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s19 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s4 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s1 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s17 ; GCN-NOHSA-VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-NOHSA-VI-NEXT: s_endpgm diff --git a/llvm/test/CodeGen/AMDGPU/load-constant-i32.ll b/llvm/test/CodeGen/AMDGPU/load-constant-i32.ll index 2e862cee733f4..ae8c0e151b671 100644 --- a/llvm/test/CodeGen/AMDGPU/load-constant-i32.ll +++ b/llvm/test/CodeGen/AMDGPU/load-constant-i32.ll @@ -3158,74 +3158,76 @@ define amdgpu_kernel void @constant_sextload_v16i32_to_v16i64(ptr addrspace(1) % ; GFX7-HSA-NEXT: s_ashr_i32 s36, s14, 31 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0x70 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s19 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s18 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s19 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0x60 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s19 -; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0x50 -; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s19 -; GFX7-HSA-NEXT: s_add_u32 s18, s16, 64 -; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s19 -; GFX7-HSA-NEXT: s_add_u32 s18, s16, 48 -; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s36 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s35 +; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s10 +; GFX7-HSA-NEXT: s_add_u32 s10, s16, 0x50 +; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s11 +; GFX7-HSA-NEXT: s_addc_u32 s11, s17, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s18 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s36 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s15 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s19 -; GFX7-HSA-NEXT: s_add_u32 s18, s16, 32 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s34 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[5:6], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s33 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13 -; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s31 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s29 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[8:9], v[3:6] -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s30 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s11 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s28 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s8 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s19 -; GFX7-HSA-NEXT: s_add_u32 s18, s16, 16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s27 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[10:11], v[0:3] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[12:13], v[6:9] -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s6 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s35 +; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s8 +; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s11 +; GFX7-HSA-NEXT: s_add_u32 s8, s16, 64 +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s19 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s34 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s13 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s33 +; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s31 +; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s30 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s10 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[13:14], v[0:3] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[15:16], v[4:7] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[17:18], v[8:11] +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s9 +; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s29 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s28 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s9 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6 +; GFX7-HSA-NEXT: s_add_u32 s6, s16, 48 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7 +; GFX7-HSA-NEXT: s_addc_u32 s7, s17, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s27 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s26 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s26 -; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s18 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[14:15], v[3:6] -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s25 +; GFX7-HSA-NEXT: s_add_u32 s4, s16, 32 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5 +; GFX7-HSA-NEXT: s_addc_u32 s5, s17, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s25 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s24 -; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s19 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s23 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s22 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s2 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s21 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[18:19], v[9:12] -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s1 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s20 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s17 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[6:9] +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: s_nop 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GFX7-HSA-NEXT: s_add_u32 s2, s16, 16 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s3 +; GFX7-HSA-NEXT: s_addc_u32 s3, s17, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s23 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s22 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s21 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s20 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_endpgm ; ; GFX8-NOHSA-LABEL: constant_sextload_v16i32_to_v16i64: @@ -3954,136 +3956,137 @@ define amdgpu_kernel void @constant_zextload_v16i32_to_v16i64(ptr addrspace(1) % define amdgpu_kernel void @constant_sextload_v32i32_to_v32i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 { ; GFX6-NOHSA-LABEL: constant_sextload_v32i32_to_v32i64: ; GFX6-NOHSA: ; %bb.0: -; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 +; GFX6-NOHSA-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x9 ; GFX6-NOHSA-NEXT: s_mov_b32 s39, 0xf000 ; GFX6-NOHSA-NEXT: s_mov_b32 s38, -1 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NOHSA-NEXT: s_load_dwordx16 s[16:31], s[2:3], 0x10 -; GFX6-NOHSA-NEXT: s_mov_b32 s36, s0 -; GFX6-NOHSA-NEXT: s_mov_b32 s37, s1 -; GFX6-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[2:3], 0x0 +; GFX6-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 +; GFX6-NOHSA-NEXT: s_mov_b32 s36, s16 +; GFX6-NOHSA-NEXT: s_mov_b32 s37, s17 +; GFX6-NOHSA-NEXT: s_load_dwordx16 s[16:31], s[18:19], 0x10 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NOHSA-NEXT: s_ashr_i32 s44, s30, 31 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s44 -; GFX6-NOHSA-NEXT: s_ashr_i32 s44, s31, 31 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s44 -; GFX6-NOHSA-NEXT: s_ashr_i32 s44, s28, 31 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s44 -; GFX6-NOHSA-NEXT: s_ashr_i32 s44, s29, 31 +; GFX6-NOHSA-NEXT: s_ashr_i32 s43, s7, 31 +; GFX6-NOHSA-NEXT: s_ashr_i32 s44, s6, 31 +; GFX6-NOHSA-NEXT: s_ashr_i32 s41, s5, 31 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s30 +; GFX6-NOHSA-NEXT: s_ashr_i32 s30, s30, 31 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s34, s16, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s40, s18, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s42, s20, 31 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s44 -; GFX6-NOHSA-NEXT: s_ashr_i32 s44, s22, 31 +; GFX6-NOHSA-NEXT: s_ashr_i32 s31, s31, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s30 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s28 +; GFX6-NOHSA-NEXT: s_ashr_i32 s28, s28, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s29 +; GFX6-NOHSA-NEXT: s_ashr_i32 s29, s29, 31 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:240 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s28 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s29 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s22 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s20 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s18 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v20, s16 -; GFX6-NOHSA-NEXT: s_ashr_i32 s16, s25, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s18, s24, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s20, s27, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s22, s26, 31 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[3:6], off, s[36:39], 0 offset:224 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s26 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s22 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s27 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s20 +; GFX6-NOHSA-NEXT: s_ashr_i32 s20, s20, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s21 +; GFX6-NOHSA-NEXT: s_ashr_i32 s21, s21, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s28 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s29 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s26 +; GFX6-NOHSA-NEXT: s_ashr_i32 s26, s26, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s27 +; GFX6-NOHSA-NEXT: s_ashr_i32 s27, s27, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s24 +; GFX6-NOHSA-NEXT: s_ashr_i32 s24, s24, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s25 +; GFX6-NOHSA-NEXT: s_ashr_i32 s25, s25, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s22 +; GFX6-NOHSA-NEXT: s_ashr_i32 s22, s22, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s23 +; GFX6-NOHSA-NEXT: s_ashr_i32 s23, s23, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s20 +; GFX6-NOHSA-NEXT: s_ashr_i32 s20, s19, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s21 +; GFX6-NOHSA-NEXT: s_ashr_i32 s21, s18, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s26 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s27 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s25 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s22 +; GFX6-NOHSA-NEXT: s_ashr_i32 s22, s17, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s23 +; GFX6-NOHSA-NEXT: s_ashr_i32 s23, s16, 31 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[36:39], 0 offset:224 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[36:39], 0 offset:208 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[36:39], 0 offset:192 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[36:39], 0 offset:176 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:160 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s18 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s21 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s19 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s20 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s18 -; GFX6-NOHSA-NEXT: s_ashr_i32 s18, s15, 31 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s16 -; GFX6-NOHSA-NEXT: s_ashr_i32 s16, s14, 31 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:208 -; GFX6-NOHSA-NEXT: s_ashr_i32 s30, s13, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s31, s12, 31 +; GFX6-NOHSA-NEXT: s_ashr_i32 s24, s15, 31 +; GFX6-NOHSA-NEXT: s_ashr_i32 s25, s14, 31 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:144 +; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s16 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s23 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s17 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s22 +; GFX6-NOHSA-NEXT: s_ashr_i32 s26, s13, 31 +; GFX6-NOHSA-NEXT: s_ashr_i32 s27, s12, 31 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:128 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s14 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s16 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s25 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s15 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s18 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s24 ; GFX6-NOHSA-NEXT: s_ashr_i32 s28, s11, 31 ; GFX6-NOHSA-NEXT: s_ashr_i32 s29, s10, 31 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:112 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s27 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s13 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s30 -; GFX6-NOHSA-NEXT: s_ashr_i32 s26, s9, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s27, s8, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s26 +; GFX6-NOHSA-NEXT: s_ashr_i32 s30, s9, 31 +; GFX6-NOHSA-NEXT: s_ashr_i32 s31, s8, 31 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:96 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s10 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s29 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s11 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s28 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s24 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s25 -; GFX6-NOHSA-NEXT: s_ashr_i32 s24, s7, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s25, s6, 31 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:80 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s8 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s27 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s31 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s9 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s26 -; GFX6-NOHSA-NEXT: s_ashr_i32 s43, s23, 31 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s23 -; GFX6-NOHSA-NEXT: s_ashr_i32 s22, s5, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s23, s4, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s30 +; GFX6-NOHSA-NEXT: s_ashr_i32 s42, s4, 31 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:64 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s6 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s25 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s44 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s7 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s24 -; GFX6-NOHSA-NEXT: s_ashr_i32 s41, s21, 31 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s21 -; GFX6-NOHSA-NEXT: s_ashr_i32 s20, s3, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s21, s2, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s43 +; GFX6-NOHSA-NEXT: s_ashr_i32 s35, s3, 31 +; GFX6-NOHSA-NEXT: s_ashr_i32 s40, s2, 31 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:48 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s23 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s42 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s5 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s22 -; GFX6-NOHSA-NEXT: s_ashr_i32 s33, s17, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s35, s19, 31 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s19 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v22, s17 -; GFX6-NOHSA-NEXT: s_ashr_i32 s17, s1, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s19, s0, 31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s41 +; GFX6-NOHSA-NEXT: s_ashr_i32 s33, s1, 31 +; GFX6-NOHSA-NEXT: s_ashr_i32 s34, s0, 31 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:32 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s2 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s21 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s40 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s3 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s20 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s44 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s43 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s42 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s41 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s40 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s35 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v21, s34 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v23, s33 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s35 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:16 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s19 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s34 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s1 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s17 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[36:39], 0 offset:192 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[36:39], 0 offset:176 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[36:39], 0 offset:160 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[36:39], 0 offset:144 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[20:23], off, s[36:39], 0 offset:128 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s33 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 ; GFX6-NOHSA-NEXT: s_endpgm ; @@ -4094,182 +4097,186 @@ define amdgpu_kernel void @constant_sextload_v32i32_to_v32i64(ptr addrspace(1) % ; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GFX7-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-HSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x10 ; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0 +; GFX7-HSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x10 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-HSA-NEXT: s_ashr_i32 s33, s17, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s34, s16, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s35, s19, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s40, s18, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s41, s21, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s42, s20, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s43, s23, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s44, s22, 31 -; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s30 -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s28 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s26 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s24 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s22 -; GFX7-HSA-NEXT: s_ashr_i32 s45, s25, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s46, s24, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s47, s27, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s26, s26, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s48, s29, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s28, s28, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s24, s31, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s30, s30, 31 -; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s31 -; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s29 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s27 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s23 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s20 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s21 -; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s19 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s17 -; GFX7-HSA-NEXT: s_ashr_i32 s16, s1, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s17, s0, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s18, s3, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s19, s2, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s20, s5, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s21, s4, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s22, s7, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s23, s6, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s27, s9, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s29, s8, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s31, s11, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s38, s10, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s39, s13, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s49, s12, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s50, s15, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s51, s14, 31 -; GFX7-HSA-NEXT: v_mov_b32_e32 v28, s24 -; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0xf0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s25 -; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v30, s25 -; GFX7-HSA-NEXT: v_mov_b32_e32 v29, s24 -; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0xe0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s30 -; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[29:30], v[25:28] -; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s28 -; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s25 -; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s24 -; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0xd0 -; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v28, s25 -; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s48 -; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s24 -; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0xc0 -; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[25:26], v[18:21] +; GFX7-HSA-NEXT: s_ashr_i32 s33, s1, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s34, s0, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s35, s3, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s40, s2, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s41, s5, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s42, s4, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s43, s7, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s44, s6, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s45, s9, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s46, s8, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s47, s11, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s48, s10, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s38, s13, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s39, s12, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s49, s15, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s52, s14, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s53, s17, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s54, s16, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s55, s19, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s56, s18, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s57, s21, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s58, s20, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s59, s23, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s60, s22, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s61, s25, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s62, s24, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s63, s27, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s64, s26, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s65, s29, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s66, s28, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s67, s31, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s68, s30, 31 +; GFX7-HSA-NEXT: s_add_u32 s50, s36, 0xf0 +; GFX7-HSA-NEXT: s_addc_u32 s51, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s50 +; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s51 +; GFX7-HSA-NEXT: s_add_u32 s50, s36, 0xe0 +; GFX7-HSA-NEXT: s_addc_u32 s51, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s50 +; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s51 +; GFX7-HSA-NEXT: s_add_u32 s50, s36, 0xd0 +; GFX7-HSA-NEXT: s_addc_u32 s51, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s30 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s68 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s31 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s67 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[23:24], v[0:3] +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s28 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18 +; GFX7-HSA-NEXT: s_add_u32 s18, s36, 0xc0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s66 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s29 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s65 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s19 +; GFX7-HSA-NEXT: s_addc_u32 s19, s37, 0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[25:26], v[4:7] +; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s19 +; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s18 +; GFX7-HSA-NEXT: s_add_u32 s18, s36, 0xb0 +; GFX7-HSA-NEXT: s_addc_u32 s19, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s50 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16 +; GFX7-HSA-NEXT: s_add_u32 s16, s36, 0xa0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v28, s51 ; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s26 -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s24 -; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s25 -; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0xb0 -; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s24 -; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s25 -; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0xa0 -; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v30, s25 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s47 -; GFX7-HSA-NEXT: v_mov_b32_e32 v29, s24 -; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0x90 -; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[27:28], v[7:10] +; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s64 +; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s27 +; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s63 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s17 +; GFX7-HSA-NEXT: s_addc_u32 s17, s37, 0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[27:28], v[8:11] +; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s17 +; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s16 +; GFX7-HSA-NEXT: s_add_u32 s16, s36, 0x90 +; GFX7-HSA-NEXT: s_addc_u32 s17, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s14 +; GFX7-HSA-NEXT: s_add_u32 s14, s36, 0x80 +; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s24 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s62 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s25 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s61 +; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s15 +; GFX7-HSA-NEXT: s_addc_u32 s15, s37, 0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] +; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s15 +; GFX7-HSA-NEXT: v_mov_b32_e32 v30, s19 +; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s14 +; GFX7-HSA-NEXT: s_add_u32 s14, s36, 0x70 +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s22 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s60 +; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s23 +; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s59 +; GFX7-HSA-NEXT: v_mov_b32_e32 v29, s18 +; GFX7-HSA-NEXT: s_addc_u32 s15, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s20 +; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s58 +; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s21 +; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s57 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s56 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s16 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[29:30], v[16:19] +; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s12 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s15 +; GFX7-HSA-NEXT: s_add_u32 s12, s36, 0x60 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s55 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s54 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s53 +; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s52 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s17 +; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s49 +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s14 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[26:27], v[20:23] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[14:15], v[0:3] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s13 +; GFX7-HSA-NEXT: s_addc_u32 s13, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s39 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s38 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s13 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s10 +; GFX7-HSA-NEXT: s_add_u32 s10, s36, 0x50 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s11 +; GFX7-HSA-NEXT: s_addc_u32 s11, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s48 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s47 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: s_nop 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8 +; GFX7-HSA-NEXT: s_add_u32 s8, s36, 64 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s9 +; GFX7-HSA-NEXT: s_addc_u32 s9, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s46 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s24 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s25 -; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0x80 -; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s25 -; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s24 -; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0x70 -; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v32, s25 -; GFX7-HSA-NEXT: v_mov_b32_e32 v31, s24 -; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0x60 -; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v34, s25 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s45 -; GFX7-HSA-NEXT: v_mov_b32_e32 v33, s24 -; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0x50 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s44 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s43 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[18:19], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s51 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s50 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s15 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s42 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s41 -; GFX7-HSA-NEXT: v_mov_b32_e32 v36, s25 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[20:21], v[4:7] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[31:32], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s49 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s39 -; GFX7-HSA-NEXT: s_add_u32 s14, s36, 64 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13 -; GFX7-HSA-NEXT: v_mov_b32_e32 v35, s24 -; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s40 -; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s35 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[29:30], v[11:14] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[8:9], v[22:25] -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s38 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s31 -; GFX7-HSA-NEXT: s_addc_u32 s15, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[33:34], v[3:6] -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s11 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s29 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s27 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s15 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[35:36], v[6:9] -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s8 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[9:12] +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6 ; GFX7-HSA-NEXT: s_add_u32 s6, s36, 48 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7 ; GFX7-HSA-NEXT: s_addc_u32 s7, s37, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s23 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s22 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s44 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s43 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s34 +; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-HSA-NEXT: s_add_u32 s4, s36, 32 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5 ; GFX7-HSA-NEXT: s_addc_u32 s5, s37, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s21 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s20 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s42 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s41 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s33 +; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GFX7-HSA-NEXT: s_add_u32 s2, s36, 16 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s3 ; GFX7-HSA-NEXT: s_addc_u32 s3, s37, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s18 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s40 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s35 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s36 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s17 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s34 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s1 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s16 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s33 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s37 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[26:27], v[15:18] ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_endpgm ; @@ -4619,37 +4626,36 @@ define amdgpu_kernel void @constant_sextload_v32i32_to_v32i64(ptr addrspace(1) % ; GFX9-HSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x40 ; GFX9-HSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-HSA-NEXT: s_ashr_i32 s58, s30, 31 -; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s58 -; GFX9-HSA-NEXT: s_ashr_i32 s58, s31, 31 -; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s58 -; GFX9-HSA-NEXT: s_ashr_i32 s58, s28, 31 -; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s58 -; GFX9-HSA-NEXT: s_ashr_i32 s58, s29, 31 -; GFX9-HSA-NEXT: v_mov_b32_e32 v7, s58 -; GFX9-HSA-NEXT: s_ashr_i32 s58, s26, 31 -; GFX9-HSA-NEXT: v_mov_b32_e32 v8, s58 -; GFX9-HSA-NEXT: s_ashr_i32 s58, s27, 31 -; GFX9-HSA-NEXT: v_mov_b32_e32 v10, s58 -; GFX9-HSA-NEXT: s_ashr_i32 s58, s24, 31 -; GFX9-HSA-NEXT: v_mov_b32_e32 v11, s58 -; GFX9-HSA-NEXT: s_ashr_i32 s58, s25, 31 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s30 +; GFX9-HSA-NEXT: s_ashr_i32 s30, s30, 31 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s31 +; GFX9-HSA-NEXT: s_ashr_i32 s31, s31, 31 +; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s30 +; GFX9-HSA-NEXT: s_ashr_i32 s30, s27, 31 +; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s31 +; GFX9-HSA-NEXT: s_ashr_i32 s31, s26, 31 +; GFX9-HSA-NEXT: s_ashr_i32 s59, s25, 31 +; GFX9-HSA-NEXT: s_ashr_i32 s60, s24, 31 +; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:240 ; GFX9-HSA-NEXT: s_ashr_i32 s57, s23, 31 -; GFX9-HSA-NEXT: v_mov_b32_e32 v13, s58 +; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s26 +; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s31 +; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s27 +; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s30 ; GFX9-HSA-NEXT: s_ashr_i32 s58, s22, 31 -; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:240 -; GFX9-HSA-NEXT: v_mov_b32_e32 v6, s29 -; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s28 +; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:208 ; GFX9-HSA-NEXT: s_ashr_i32 s55, s21, 31 +; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s24 +; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s60 +; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s25 +; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s59 ; GFX9-HSA-NEXT: s_ashr_i32 s56, s20, 31 -; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[4:7], s[36:37] offset:224 +; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:192 +; GFX9-HSA-NEXT: s_ashr_i32 s53, s19, 31 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s22 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s58 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s23 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s57 -; GFX9-HSA-NEXT: s_ashr_i32 s53, s19, 31 ; GFX9-HSA-NEXT: s_ashr_i32 s54, s18, 31 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:176 ; GFX9-HSA-NEXT: s_ashr_i32 s51, s17, 31 @@ -4707,6 +4713,8 @@ define amdgpu_kernel void @constant_sextload_v32i32_to_v32i64(ptr addrspace(1) % ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s41 ; GFX9-HSA-NEXT: s_ashr_i32 s38, s2, 31 +; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s28 +; GFX9-HSA-NEXT: s_ashr_i32 s28, s28, 31 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:48 ; GFX9-HSA-NEXT: s_ashr_i32 s33, s1, 31 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s4 @@ -4714,18 +4722,17 @@ define amdgpu_kernel void @constant_sextload_v32i32_to_v32i64(ptr addrspace(1) % ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s39 ; GFX9-HSA-NEXT: s_ashr_i32 s34, s0, 31 -; GFX9-HSA-NEXT: v_mov_b32_e32 v7, s26 -; GFX9-HSA-NEXT: v_mov_b32_e32 v9, s27 +; GFX9-HSA-NEXT: v_mov_b32_e32 v6, s28 +; GFX9-HSA-NEXT: s_ashr_i32 s28, s29, 31 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:32 -; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[7:10], s[36:37] offset:208 +; GFX9-HSA-NEXT: v_mov_b32_e32 v7, s29 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s2 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s38 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s35 -; GFX9-HSA-NEXT: v_mov_b32_e32 v10, s24 -; GFX9-HSA-NEXT: v_mov_b32_e32 v12, s25 +; GFX9-HSA-NEXT: v_mov_b32_e32 v8, s28 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:16 -; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[10:13], s[36:37] offset:192 +; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[5:8], s[36:37] offset:224 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s0 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s34 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s1 @@ -5048,21 +5055,21 @@ define amdgpu_kernel void @constant_zextload_v32i32_to_v32i64(ptr addrspace(1) % ; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s0 ; GFX7-HSA-NEXT: s_add_u32 s0, s36, 0xb0 ; GFX7-HSA-NEXT: s_addc_u32 s1, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s1 ; GFX7-HSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x10 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s1 ; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s0 ; GFX7-HSA-NEXT: s_add_u32 s0, s36, 0xa0 ; GFX7-HSA-NEXT: s_addc_u32 s1, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s1 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s0 -; GFX7-HSA-NEXT: s_add_u32 s0, s36, 0x90 -; GFX7-HSA-NEXT: s_addc_u32 s1, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, v1 +; GFX7-HSA-NEXT: s_add_u32 s2, s36, 0x90 +; GFX7-HSA-NEXT: s_addc_u32 s3, s37, 0 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s30 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s31 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s1 -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, v1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s2 ; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_nop 0 @@ -5096,61 +5103,67 @@ define amdgpu_kernel void @constant_zextload_v32i32_to_v32i64(ptr addrspace(1) % ; GFX7-HSA-NEXT: s_addc_u32 s17, s37, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17 -; GFX7-HSA-NEXT: s_add_u32 s16, s36, 0x70 -; GFX7-HSA-NEXT: s_addc_u32 s17, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s17 -; GFX7-HSA-NEXT: s_add_u32 s16, s36, 0x60 -; GFX7-HSA-NEXT: s_addc_u32 s17, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s17 -; GFX7-HSA-NEXT: s_add_u32 s16, s36, 0x50 -; GFX7-HSA-NEXT: s_addc_u32 s17, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s17 -; GFX7-HSA-NEXT: s_add_u32 s16, s36, 64 -; GFX7-HSA-NEXT: s_addc_u32 s17, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s17 -; GFX7-HSA-NEXT: s_add_u32 s16, s36, 48 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s17, s37, 0 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14 +; GFX7-HSA-NEXT: s_add_u32 s14, s36, 0x70 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s15 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3] -; GFX7-HSA-NEXT: s_add_u32 s14, s36, 32 +; GFX7-HSA-NEXT: s_addc_u32 s15, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s14 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s15 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12 +; GFX7-HSA-NEXT: s_add_u32 s12, s36, 0x60 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s13 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s16 +; GFX7-HSA-NEXT: s_addc_u32 s13, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s10 +; GFX7-HSA-NEXT: s_add_u32 s10, s36, 0x50 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s11 -; GFX7-HSA-NEXT: s_addc_u32 s15, s37, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[10:11], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s17 +; GFX7-HSA-NEXT: s_addc_u32 s11, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8 +; GFX7-HSA-NEXT: s_add_u32 s8, s36, 64 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s14 -; GFX7-HSA-NEXT: s_add_u32 s12, s36, 16 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[12:13], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s15 +; GFX7-HSA-NEXT: s_addc_u32 s9, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6 +; GFX7-HSA-NEXT: s_add_u32 s6, s36, 48 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7 -; GFX7-HSA-NEXT: s_addc_u32 s13, s37, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s12 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[14:15], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s13 +; GFX7-HSA-NEXT: s_addc_u32 s7, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4 +; GFX7-HSA-NEXT: s_add_u32 s4, s36, 32 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5 +; GFX7-HSA-NEXT: s_addc_u32 s5, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s36 +; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GFX7-HSA-NEXT: s_add_u32 s2, s36, 16 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s3 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s37 +; GFX7-HSA-NEXT: s_addc_u32 s3, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s36 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s37 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_endpgm ; @@ -5674,55 +5687,56 @@ define amdgpu_kernel void @constant_load_v32i32(ptr addrspace(1) %out, ptr addrs ; ; GFX7-HSA-LABEL: constant_load_v32i32: ; GFX7-HSA: ; %bb.0: +; GFX7-HSA-NEXT: s_load_dwordx4 s[36:39], s[8:9], 0x0 ; GFX7-HSA-NEXT: s_add_i32 s12, s12, s17 -; GFX7-HSA-NEXT: s_load_dwordx4 s[16:19], s[8:9], 0x0 -; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GFX7-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 +; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x10 +; GFX7-HSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x10 +; GFX7-HSA-NEXT: s_add_u32 s0, s36, 0x70 +; GFX7-HSA-NEXT: s_addc_u32 s1, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s0 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s13 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s14 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s15 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s11 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s4 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s5 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s6 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s7 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s1 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s2 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s3 -; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 -; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0x70 -; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s19 -; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0x60 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19 -; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0x50 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s28 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s29 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s30 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s31 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s24 +; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0x60 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s25 +; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3] +; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s24 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s26 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s27 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s25 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7] -; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19 -; GFX7-HSA-NEXT: s_add_u32 s18, s16, 64 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11] -; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s20 +; GFX7-HSA-NEXT: s_add_u32 s20, s36, 0x50 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s21 +; GFX7-HSA-NEXT: s_addc_u32 s21, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s20 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s22 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s23 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s21 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: s_nop 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s16 +; GFX7-HSA-NEXT: s_add_u32 s16, s36, 64 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s17 +; GFX7-HSA-NEXT: s_addc_u32 s17, s37, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s18 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s19 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12 -; GFX7-HSA-NEXT: s_add_u32 s12, s16, 48 +; GFX7-HSA-NEXT: s_add_u32 s12, s36, 48 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s13 -; GFX7-HSA-NEXT: s_addc_u32 s13, s17, 0 +; GFX7-HSA-NEXT: s_addc_u32 s13, s37, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s14 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s15 @@ -5730,9 +5744,9 @@ define amdgpu_kernel void @constant_load_v32i32(ptr addrspace(1) %out, ptr addrs ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8 -; GFX7-HSA-NEXT: s_add_u32 s8, s16, 32 +; GFX7-HSA-NEXT: s_add_u32 s8, s36, 32 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s9 -; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 +; GFX7-HSA-NEXT: s_addc_u32 s9, s37, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s10 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s11 @@ -5740,20 +5754,20 @@ define amdgpu_kernel void @constant_load_v32i32(ptr addrspace(1) %out, ptr addrs ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4 -; GFX7-HSA-NEXT: s_add_u32 s4, s16, 16 +; GFX7-HSA-NEXT: s_add_u32 s4, s36, 16 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s5 -; GFX7-HSA-NEXT: s_addc_u32 s5, s17, 0 +; GFX7-HSA-NEXT: s_addc_u32 s5, s37, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s36 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s37 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_endpgm ; diff --git a/llvm/test/CodeGen/AMDGPU/load-constant-i64.ll b/llvm/test/CodeGen/AMDGPU/load-constant-i64.ll index bc666066a7acd..1925f037b74fc 100644 --- a/llvm/test/CodeGen/AMDGPU/load-constant-i64.ll +++ b/llvm/test/CodeGen/AMDGPU/load-constant-i64.ll @@ -620,55 +620,56 @@ define amdgpu_kernel void @constant_load_v16i64(ptr addrspace(1) %out, ptr addrs ; ; GFX7-LABEL: constant_load_v16i64: ; GFX7: ; %bb.0: ; %entry +; GFX7-NEXT: s_load_dwordx4 s[36:39], s[8:9], 0x0 ; GFX7-NEXT: s_add_i32 s12, s12, s17 -; GFX7-NEXT: s_load_dwordx4 s[16:19], s[8:9], 0x0 -; GFX7-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GFX7-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 +; GFX7-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GFX7-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x10 +; GFX7-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x10 +; GFX7-NEXT: s_add_u32 s0, s36, 0x70 +; GFX7-NEXT: s_addc_u32 s1, s37, 0 +; GFX7-NEXT: v_mov_b32_e32 v7, s1 +; GFX7-NEXT: v_mov_b32_e32 v6, s0 ; GFX7-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-NEXT: v_mov_b32_e32 v0, s12 -; GFX7-NEXT: v_mov_b32_e32 v1, s13 -; GFX7-NEXT: v_mov_b32_e32 v2, s14 -; GFX7-NEXT: v_mov_b32_e32 v3, s15 -; GFX7-NEXT: v_mov_b32_e32 v4, s8 -; GFX7-NEXT: v_mov_b32_e32 v5, s9 -; GFX7-NEXT: v_mov_b32_e32 v6, s10 -; GFX7-NEXT: v_mov_b32_e32 v7, s11 -; GFX7-NEXT: v_mov_b32_e32 v8, s4 -; GFX7-NEXT: v_mov_b32_e32 v9, s5 -; GFX7-NEXT: v_mov_b32_e32 v10, s6 -; GFX7-NEXT: v_mov_b32_e32 v11, s7 -; GFX7-NEXT: v_mov_b32_e32 v12, s0 -; GFX7-NEXT: v_mov_b32_e32 v13, s1 -; GFX7-NEXT: v_mov_b32_e32 v14, s2 -; GFX7-NEXT: v_mov_b32_e32 v15, s3 -; GFX7-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 -; GFX7-NEXT: s_add_u32 s18, s16, 0x70 -; GFX7-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-NEXT: v_mov_b32_e32 v16, s18 -; GFX7-NEXT: v_mov_b32_e32 v17, s19 -; GFX7-NEXT: s_add_u32 s18, s16, 0x60 -; GFX7-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; GFX7-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-NEXT: v_mov_b32_e32 v0, s18 -; GFX7-NEXT: v_mov_b32_e32 v1, s19 -; GFX7-NEXT: s_add_u32 s18, s16, 0x50 +; GFX7-NEXT: v_mov_b32_e32 v0, s28 +; GFX7-NEXT: v_mov_b32_e32 v1, s29 +; GFX7-NEXT: v_mov_b32_e32 v2, s30 +; GFX7-NEXT: v_mov_b32_e32 v3, s31 +; GFX7-NEXT: v_mov_b32_e32 v4, s24 +; GFX7-NEXT: s_add_u32 s24, s36, 0x60 +; GFX7-NEXT: v_mov_b32_e32 v5, s25 +; GFX7-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0 +; GFX7-NEXT: flat_store_dwordx4 v[6:7], v[0:3] +; GFX7-NEXT: s_addc_u32 s25, s37, 0 +; GFX7-NEXT: v_mov_b32_e32 v0, s24 +; GFX7-NEXT: v_mov_b32_e32 v6, s26 +; GFX7-NEXT: v_mov_b32_e32 v7, s27 +; GFX7-NEXT: v_mov_b32_e32 v1, s25 ; GFX7-NEXT: flat_store_dwordx4 v[0:1], v[4:7] -; GFX7-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-NEXT: v_mov_b32_e32 v0, s18 -; GFX7-NEXT: v_mov_b32_e32 v1, s19 -; GFX7-NEXT: s_add_u32 s18, s16, 64 -; GFX7-NEXT: flat_store_dwordx4 v[0:1], v[8:11] -; GFX7-NEXT: s_addc_u32 s19, s17, 0 -; GFX7-NEXT: v_mov_b32_e32 v0, s18 -; GFX7-NEXT: v_mov_b32_e32 v1, s19 -; GFX7-NEXT: flat_store_dwordx4 v[0:1], v[12:15] +; GFX7-NEXT: v_mov_b32_e32 v0, s20 +; GFX7-NEXT: s_add_u32 s20, s36, 0x50 +; GFX7-NEXT: v_mov_b32_e32 v1, s21 +; GFX7-NEXT: s_addc_u32 s21, s37, 0 +; GFX7-NEXT: v_mov_b32_e32 v4, s20 +; GFX7-NEXT: v_mov_b32_e32 v2, s22 +; GFX7-NEXT: v_mov_b32_e32 v3, s23 +; GFX7-NEXT: v_mov_b32_e32 v5, s21 +; GFX7-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-NEXT: s_nop 0 +; GFX7-NEXT: v_mov_b32_e32 v0, s16 +; GFX7-NEXT: s_add_u32 s16, s36, 64 +; GFX7-NEXT: v_mov_b32_e32 v1, s17 +; GFX7-NEXT: s_addc_u32 s17, s37, 0 +; GFX7-NEXT: v_mov_b32_e32 v4, s16 +; GFX7-NEXT: v_mov_b32_e32 v2, s18 +; GFX7-NEXT: v_mov_b32_e32 v3, s19 +; GFX7-NEXT: v_mov_b32_e32 v5, s17 +; GFX7-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: v_mov_b32_e32 v0, s12 -; GFX7-NEXT: s_add_u32 s12, s16, 48 +; GFX7-NEXT: s_add_u32 s12, s36, 48 ; GFX7-NEXT: v_mov_b32_e32 v1, s13 -; GFX7-NEXT: s_addc_u32 s13, s17, 0 +; GFX7-NEXT: s_addc_u32 s13, s37, 0 ; GFX7-NEXT: v_mov_b32_e32 v4, s12 ; GFX7-NEXT: v_mov_b32_e32 v2, s14 ; GFX7-NEXT: v_mov_b32_e32 v3, s15 @@ -676,9 +677,9 @@ define amdgpu_kernel void @constant_load_v16i64(ptr addrspace(1) %out, ptr addrs ; GFX7-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-NEXT: s_nop 0 ; GFX7-NEXT: v_mov_b32_e32 v0, s8 -; GFX7-NEXT: s_add_u32 s8, s16, 32 +; GFX7-NEXT: s_add_u32 s8, s36, 32 ; GFX7-NEXT: v_mov_b32_e32 v1, s9 -; GFX7-NEXT: s_addc_u32 s9, s17, 0 +; GFX7-NEXT: s_addc_u32 s9, s37, 0 ; GFX7-NEXT: v_mov_b32_e32 v4, s8 ; GFX7-NEXT: v_mov_b32_e32 v2, s10 ; GFX7-NEXT: v_mov_b32_e32 v3, s11 @@ -686,20 +687,20 @@ define amdgpu_kernel void @constant_load_v16i64(ptr addrspace(1) %out, ptr addrs ; GFX7-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-NEXT: s_nop 0 ; GFX7-NEXT: v_mov_b32_e32 v0, s4 -; GFX7-NEXT: s_add_u32 s4, s16, 16 +; GFX7-NEXT: s_add_u32 s4, s36, 16 ; GFX7-NEXT: v_mov_b32_e32 v1, s5 -; GFX7-NEXT: s_addc_u32 s5, s17, 0 +; GFX7-NEXT: s_addc_u32 s5, s37, 0 ; GFX7-NEXT: v_mov_b32_e32 v4, s4 ; GFX7-NEXT: v_mov_b32_e32 v2, s6 ; GFX7-NEXT: v_mov_b32_e32 v3, s7 ; GFX7-NEXT: v_mov_b32_e32 v5, s5 ; GFX7-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-NEXT: v_mov_b32_e32 v4, s16 +; GFX7-NEXT: v_mov_b32_e32 v4, s36 ; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v2, s2 ; GFX7-NEXT: v_mov_b32_e32 v3, s3 -; GFX7-NEXT: v_mov_b32_e32 v5, s17 +; GFX7-NEXT: v_mov_b32_e32 v5, s37 ; GFX7-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-NEXT: s_endpgm ; diff --git a/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll b/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll index 14c1e04776561..f4c35ada46063 100644 --- a/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll +++ b/llvm/test/CodeGen/AMDGPU/load-constant-i8.ll @@ -2463,28 +2463,28 @@ define amdgpu_kernel void @constant_zextload_v32i8_to_v32i32(ptr addrspace(1) %o ; GFX7-HSA-NEXT: s_bfe_u32 s17, s6, 0x80008 ; GFX7-HSA-NEXT: s_lshr_b32 s18, s7, 24 ; GFX7-HSA-NEXT: s_bfe_u32 s19, s7, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s20, s8, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s21, s8, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s22, s9, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s23, s9, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s24, s10, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s25, s10, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s26, s11, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s27, s11, 0x80008 -; GFX7-HSA-NEXT: s_and_b32 s28, s4, 0xff +; GFX7-HSA-NEXT: s_and_b32 s20, s4, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s4, s4, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s29, s5, 0xff +; GFX7-HSA-NEXT: s_and_b32 s21, s5, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s5, s5, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s30, s6, 0xff +; GFX7-HSA-NEXT: s_and_b32 s22, s6, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s6, s6, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s31, s7, 0xff +; GFX7-HSA-NEXT: s_and_b32 s23, s7, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s7, s7, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s33, s8, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s24, s8, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s25, s8, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s26, s8, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s8, s8, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s34, s9, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s27, s9, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s28, s9, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s29, s9, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s9, s9, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s35, s10, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s30, s10, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s31, s10, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s33, s10, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s10, s10, 0x80010 +; GFX7-HSA-NEXT: s_lshr_b32 s34, s11, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s35, s11, 0x80008 ; GFX7-HSA-NEXT: s_and_b32 s36, s11, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s11, s11, 0x80010 ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 0x70 @@ -2498,37 +2498,37 @@ define amdgpu_kernel void @constant_zextload_v32i8_to_v32i32(ptr addrspace(1) %o ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s2 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s36 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s27 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s35 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s11 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s26 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s34 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s2 ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 64 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s33 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s31 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s10 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s30 +; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s29 +; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s28 +; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s27 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[13:14], v[0:3] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[15:16], v[4:7] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[17:18], v[8:11] ; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 48 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s35 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s25 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s24 ; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s34 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s23 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s22 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[15:16], v[4:7] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[17:18], v[8:11] ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s33 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s21 +; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s26 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s25 ; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s8 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s20 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s24 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 32 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s31 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s23 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s18 @@ -2537,21 +2537,21 @@ define amdgpu_kernel void @constant_zextload_v32i8_to_v32i32(ptr addrspace(1) %o ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s30 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s22 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s17 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s16 ; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s29 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s21 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s15 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s14 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s28 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s20 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s13 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s4 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s12 @@ -2922,114 +2922,114 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i32(ptr addrspace(1) %o ; ; GFX7-HSA-LABEL: constant_sextload_v32i8_to_v32i32: ; GFX7-HSA: ; %bb.0: -; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 +; GFX7-HSA-NEXT: s_load_dwordx4 s[8:11], s[8:9], 0x0 ; GFX7-HSA-NEXT: s_add_i32 s12, s12, s17 ; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GFX7-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-HSA-NEXT: s_load_dwordx8 s[4:11], s[2:3], 0x0 +; GFX7-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-HSA-NEXT: s_ashr_i32 s12, s4, 24 -; GFX7-HSA-NEXT: s_bfe_i32 s13, s4, 0x80010 -; GFX7-HSA-NEXT: s_bfe_i32 s14, s4, 0x80008 -; GFX7-HSA-NEXT: s_ashr_i32 s15, s5, 24 -; GFX7-HSA-NEXT: s_bfe_i32 s16, s5, 0x80010 -; GFX7-HSA-NEXT: s_bfe_i32 s17, s5, 0x80008 -; GFX7-HSA-NEXT: s_ashr_i32 s18, s6, 24 -; GFX7-HSA-NEXT: s_bfe_i32 s19, s6, 0x80010 -; GFX7-HSA-NEXT: s_bfe_i32 s20, s6, 0x80008 -; GFX7-HSA-NEXT: s_ashr_i32 s21, s7, 24 -; GFX7-HSA-NEXT: s_bfe_i32 s22, s7, 0x80010 -; GFX7-HSA-NEXT: s_bfe_i32 s23, s7, 0x80008 -; GFX7-HSA-NEXT: s_ashr_i32 s24, s8, 24 -; GFX7-HSA-NEXT: s_bfe_i32 s25, s8, 0x80010 -; GFX7-HSA-NEXT: s_bfe_i32 s26, s8, 0x80008 -; GFX7-HSA-NEXT: s_ashr_i32 s27, s9, 24 -; GFX7-HSA-NEXT: s_bfe_i32 s28, s9, 0x80010 -; GFX7-HSA-NEXT: s_bfe_i32 s29, s9, 0x80008 -; GFX7-HSA-NEXT: s_ashr_i32 s30, s10, 24 -; GFX7-HSA-NEXT: s_bfe_i32 s31, s10, 0x80010 -; GFX7-HSA-NEXT: s_bfe_i32 s33, s10, 0x80008 -; GFX7-HSA-NEXT: s_ashr_i32 s34, s11, 24 -; GFX7-HSA-NEXT: s_bfe_i32 s35, s11, 0x80010 -; GFX7-HSA-NEXT: s_bfe_i32 s36, s11, 0x80008 -; GFX7-HSA-NEXT: s_add_u32 s2, s0, 0x70 -; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s2 -; GFX7-HSA-NEXT: s_add_u32 s2, s0, 0x60 -; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s2 -; GFX7-HSA-NEXT: s_add_u32 s2, s0, 0x50 -; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GFX7-HSA-NEXT: s_sext_i32_i8 s11, s11 -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s2 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s11 +; GFX7-HSA-NEXT: s_ashr_i32 s12, s0, 24 +; GFX7-HSA-NEXT: s_bfe_i32 s13, s0, 0x80010 +; GFX7-HSA-NEXT: s_bfe_i32 s14, s0, 0x80008 +; GFX7-HSA-NEXT: s_ashr_i32 s15, s1, 24 +; GFX7-HSA-NEXT: s_bfe_i32 s16, s1, 0x80010 +; GFX7-HSA-NEXT: s_bfe_i32 s17, s1, 0x80008 +; GFX7-HSA-NEXT: s_ashr_i32 s18, s2, 24 +; GFX7-HSA-NEXT: s_bfe_i32 s19, s2, 0x80010 +; GFX7-HSA-NEXT: s_bfe_i32 s20, s2, 0x80008 +; GFX7-HSA-NEXT: s_ashr_i32 s21, s3, 24 +; GFX7-HSA-NEXT: s_bfe_i32 s22, s3, 0x80010 +; GFX7-HSA-NEXT: s_bfe_i32 s23, s3, 0x80008 +; GFX7-HSA-NEXT: s_ashr_i32 s24, s4, 24 +; GFX7-HSA-NEXT: s_bfe_i32 s25, s4, 0x80010 +; GFX7-HSA-NEXT: s_bfe_i32 s26, s4, 0x80008 +; GFX7-HSA-NEXT: s_ashr_i32 s27, s5, 24 +; GFX7-HSA-NEXT: s_bfe_i32 s28, s5, 0x80010 +; GFX7-HSA-NEXT: s_bfe_i32 s29, s5, 0x80008 +; GFX7-HSA-NEXT: s_ashr_i32 s30, s6, 24 +; GFX7-HSA-NEXT: s_bfe_i32 s31, s6, 0x80010 +; GFX7-HSA-NEXT: s_bfe_i32 s33, s6, 0x80008 +; GFX7-HSA-NEXT: s_ashr_i32 s34, s7, 24 +; GFX7-HSA-NEXT: s_bfe_i32 s35, s7, 0x80010 +; GFX7-HSA-NEXT: s_bfe_i32 s36, s7, 0x80008 +; GFX7-HSA-NEXT: s_add_u32 s10, s8, 0x70 +; GFX7-HSA-NEXT: s_addc_u32 s11, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s11 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s10 +; GFX7-HSA-NEXT: s_add_u32 s10, s8, 0x60 +; GFX7-HSA-NEXT: s_addc_u32 s11, s9, 0 +; GFX7-HSA-NEXT: s_sext_i32_i8 s6, s6 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6 +; GFX7-HSA-NEXT: s_sext_i32_i8 s5, s5 +; GFX7-HSA-NEXT: s_sext_i32_i8 s6, s4 +; GFX7-HSA-NEXT: s_add_u32 s4, s8, 0x50 +; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s5 +; GFX7-HSA-NEXT: s_addc_u32 s5, s9, 0 +; GFX7-HSA-NEXT: s_sext_i32_i8 s7, s7 +; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s5 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s7 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s36 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s35 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s34 -; GFX7-HSA-NEXT: s_add_u32 s2, s0, 64 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s4 +; GFX7-HSA-NEXT: s_sext_i32_i8 s4, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s8, 64 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[13:14], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GFX7-HSA-NEXT: s_sext_i32_i8 s10, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GFX7-HSA-NEXT: s_add_u32 s2, s0, 48 -; GFX7-HSA-NEXT: s_sext_i32_i8 s9, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10 +; GFX7-HSA-NEXT: s_sext_i32_i8 s5, s1 +; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s11 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GFX7-HSA-NEXT: s_add_u32 s0, s8, 48 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s10 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s33 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s31 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s30 -; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GFX7-HSA-NEXT: s_sext_i32_i8 s8, s8 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s9 +; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s29 ; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s28 ; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s27 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[15:16], v[4:7] ; GFX7-HSA-NEXT: flat_store_dwordx4 v[17:18], v[8:11] -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GFX7-HSA-NEXT: s_sext_i32_i8 s7, s7 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s8 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s6 +; GFX7-HSA-NEXT: s_sext_i32_i8 s3, s3 ; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s26 ; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s25 ; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s24 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GFX7-HSA-NEXT: s_add_u32 s2, s0, 32 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s8, 32 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s7 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s3 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s23 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s22 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s21 -; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GFX7-HSA-NEXT: s_sext_i32_i8 s6, s6 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GFX7-HSA-NEXT: s_add_u32 s2, s0, 16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: s_sext_i32_i8 s2, s2 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s8, 16 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s20 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s19 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s18 -; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GFX7-HSA-NEXT: s_sext_i32_i8 s5, s5 +; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s5 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s17 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s16 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s15 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GFX7-HSA-NEXT: s_sext_i32_i8 s4, s4 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s14 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s13 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_endpgm ; @@ -3332,166 +3332,164 @@ define amdgpu_kernel void @constant_zextload_v64i8_to_v64i32(ptr addrspace(1) %o ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x9 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 +; GFX6-NOHSA-NEXT: s_mov_b32 s19, 0xf000 +; GFX6-NOHSA-NEXT: s_mov_b32 s18, -1 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NOHSA-NEXT: s_lshr_b32 s22, s2, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s23, s2, 0x80008 -; GFX6-NOHSA-NEXT: s_lshr_b32 s24, s3, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s25, s3, 0x80008 -; GFX6-NOHSA-NEXT: s_lshr_b32 s49, s15, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s50, s15, 0x80008 -; GFX6-NOHSA-NEXT: s_and_b32 s55, s2, 0xff -; GFX6-NOHSA-NEXT: s_bfe_u32 s56, s2, 0x80010 -; GFX6-NOHSA-NEXT: s_and_b32 s57, s3, 0xff -; GFX6-NOHSA-NEXT: s_bfe_u32 s58, s3, 0x80010 -; GFX6-NOHSA-NEXT: s_and_b32 s2, s11, 0xff -; GFX6-NOHSA-NEXT: s_bfe_u32 s3, s11, 0x80010 -; GFX6-NOHSA-NEXT: s_and_b32 s68, s15, 0xff -; GFX6-NOHSA-NEXT: s_bfe_u32 s15, s15, 0x80010 -; GFX6-NOHSA-NEXT: s_lshr_b32 s18, s0, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s19, s0, 0x80008 -; GFX6-NOHSA-NEXT: s_lshr_b32 s20, s1, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s21, s1, 0x80008 -; GFX6-NOHSA-NEXT: s_lshr_b32 s39, s10, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s40, s10, 0x80008 -; GFX6-NOHSA-NEXT: s_lshr_b32 s47, s14, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s48, s14, 0x80008 -; GFX6-NOHSA-NEXT: s_and_b32 s51, s0, 0xff -; GFX6-NOHSA-NEXT: s_bfe_u32 s52, s0, 0x80010 -; GFX6-NOHSA-NEXT: s_and_b32 s53, s1, 0xff -; GFX6-NOHSA-NEXT: s_bfe_u32 s54, s1, 0x80010 -; GFX6-NOHSA-NEXT: s_and_b32 s65, s10, 0xff +; GFX6-NOHSA-NEXT: s_and_b32 s44, s15, 0xff +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s44 +; GFX6-NOHSA-NEXT: s_bfe_u32 s44, s15, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s44 +; GFX6-NOHSA-NEXT: s_bfe_u32 s44, s15, 0x80010 +; GFX6-NOHSA-NEXT: s_lshr_b32 s15, s15, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s15 +; GFX6-NOHSA-NEXT: s_and_b32 s15, s14, 0xff +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s15 +; GFX6-NOHSA-NEXT: s_bfe_u32 s15, s14, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s15 +; GFX6-NOHSA-NEXT: s_bfe_u32 s15, s14, 0x80010 +; GFX6-NOHSA-NEXT: s_lshr_b32 s14, s14, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s14 +; GFX6-NOHSA-NEXT: s_and_b32 s14, s13, 0xff +; GFX6-NOHSA-NEXT: s_lshr_b32 s43, s11, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s14 +; GFX6-NOHSA-NEXT: s_bfe_u32 s14, s13, 0x80008 +; GFX6-NOHSA-NEXT: s_lshr_b32 s41, s10, 24 +; GFX6-NOHSA-NEXT: s_bfe_u32 s42, s10, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s44 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s15 +; GFX6-NOHSA-NEXT: s_lshr_b32 s15, s12, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s14 +; GFX6-NOHSA-NEXT: s_bfe_u32 s14, s13, 0x80010 +; GFX6-NOHSA-NEXT: s_lshr_b32 s13, s13, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s43 +; GFX6-NOHSA-NEXT: s_and_b32 s43, s10, 0xff ; GFX6-NOHSA-NEXT: s_bfe_u32 s10, s10, 0x80010 -; GFX6-NOHSA-NEXT: s_and_b32 s67, s14, 0xff -; GFX6-NOHSA-NEXT: s_bfe_u32 s14, s14, 0x80010 -; GFX6-NOHSA-NEXT: s_mov_b32 s0, s16 -; GFX6-NOHSA-NEXT: s_mov_b32 s1, s17 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s68 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s50 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s15 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s49 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s2 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s3 -; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000 -; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1 -; GFX6-NOHSA-NEXT: s_lshr_b32 s37, s9, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s38, s9, 0x80008 -; GFX6-NOHSA-NEXT: s_lshr_b32 s41, s11, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s42, s11, 0x80008 -; GFX6-NOHSA-NEXT: s_lshr_b32 s43, s12, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s44, s12, 0x80008 -; GFX6-NOHSA-NEXT: s_lshr_b32 s45, s13, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s46, s13, 0x80008 -; GFX6-NOHSA-NEXT: s_and_b32 s64, s9, 0xff -; GFX6-NOHSA-NEXT: s_bfe_u32 s9, s9, 0x80010 -; GFX6-NOHSA-NEXT: s_and_b32 s11, s12, 0xff +; GFX6-NOHSA-NEXT: s_lshr_b32 s39, s9, 24 +; GFX6-NOHSA-NEXT: s_bfe_u32 s40, s9, 0x80008 +; GFX6-NOHSA-NEXT: s_bfe_u32 s44, s11, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s14 +; GFX6-NOHSA-NEXT: s_bfe_u32 s14, s12, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s13 +; GFX6-NOHSA-NEXT: s_and_b32 s13, s12, 0xff ; GFX6-NOHSA-NEXT: s_bfe_u32 s12, s12, 0x80010 -; GFX6-NOHSA-NEXT: s_and_b32 s66, s13, 0xff -; GFX6-NOHSA-NEXT: s_bfe_u32 s13, s13, 0x80010 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s67 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s48 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s14 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s47 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s15 +; GFX6-NOHSA-NEXT: s_and_b32 s15, s11, 0xff +; GFX6-NOHSA-NEXT: s_bfe_u32 s11, s11, 0x80010 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:240 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s65 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s40 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s43 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s42 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s10 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s39 -; GFX6-NOHSA-NEXT: s_lshr_b32 s35, s8, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s36, s8, 0x80008 -; GFX6-NOHSA-NEXT: s_and_b32 s63, s8, 0xff -; GFX6-NOHSA-NEXT: s_bfe_u32 s8, s8, 0x80010 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s66 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s46 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s13 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s45 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s11 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s44 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s41 +; GFX6-NOHSA-NEXT: s_and_b32 s41, s9, 0xff +; GFX6-NOHSA-NEXT: s_bfe_u32 s9, s9, 0x80010 +; GFX6-NOHSA-NEXT: s_lshr_b32 s37, s8, 24 +; GFX6-NOHSA-NEXT: s_bfe_u32 s38, s8, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s13 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s14 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s12 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s43 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s42 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s41 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:224 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:208 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:176 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s15 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s44 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s11 +; GFX6-NOHSA-NEXT: s_and_b32 s10, s8, 0xff +; GFX6-NOHSA-NEXT: s_bfe_u32 s8, s8, 0x80010 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[16:19], 0 offset:224 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[16:19], 0 offset:208 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[16:19], 0 offset:192 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[16:19], 0 offset:176 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:160 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s64 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s38 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s41 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s40 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s9 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s37 -; GFX6-NOHSA-NEXT: s_lshr_b32 s33, s7, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s34, s7, 0x80008 -; GFX6-NOHSA-NEXT: s_and_b32 s62, s7, 0xff +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s39 +; GFX6-NOHSA-NEXT: s_lshr_b32 s35, s7, 24 +; GFX6-NOHSA-NEXT: s_bfe_u32 s36, s7, 0x80008 +; GFX6-NOHSA-NEXT: s_and_b32 s42, s7, 0xff ; GFX6-NOHSA-NEXT: s_bfe_u32 s7, s7, 0x80010 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:144 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s63 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s36 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s10 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s38 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s8 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s35 -; GFX6-NOHSA-NEXT: s_lshr_b32 s30, s6, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s31, s6, 0x80008 -; GFX6-NOHSA-NEXT: s_and_b32 s61, s6, 0xff +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s37 +; GFX6-NOHSA-NEXT: s_lshr_b32 s33, s6, 24 +; GFX6-NOHSA-NEXT: s_bfe_u32 s34, s6, 0x80008 +; GFX6-NOHSA-NEXT: s_and_b32 s43, s6, 0xff ; GFX6-NOHSA-NEXT: s_bfe_u32 s6, s6, 0x80010 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:128 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s62 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s34 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s42 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s36 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s7 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s33 -; GFX6-NOHSA-NEXT: s_lshr_b32 s28, s5, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s29, s5, 0x80008 -; GFX6-NOHSA-NEXT: s_and_b32 s60, s5, 0xff +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s35 +; GFX6-NOHSA-NEXT: s_lshr_b32 s30, s5, 24 +; GFX6-NOHSA-NEXT: s_bfe_u32 s31, s5, 0x80008 +; GFX6-NOHSA-NEXT: s_and_b32 s11, s5, 0xff ; GFX6-NOHSA-NEXT: s_bfe_u32 s5, s5, 0x80010 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:112 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s61 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s43 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s34 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s6 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s30 -; GFX6-NOHSA-NEXT: s_lshr_b32 s26, s4, 24 -; GFX6-NOHSA-NEXT: s_bfe_u32 s27, s4, 0x80008 -; GFX6-NOHSA-NEXT: s_and_b32 s59, s4, 0xff +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s33 +; GFX6-NOHSA-NEXT: s_lshr_b32 s28, s4, 24 +; GFX6-NOHSA-NEXT: s_bfe_u32 s29, s4, 0x80008 +; GFX6-NOHSA-NEXT: s_and_b32 s44, s4, 0xff ; GFX6-NOHSA-NEXT: s_bfe_u32 s4, s4, 0x80010 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:96 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s60 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s29 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s11 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s31 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s5 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s30 +; GFX6-NOHSA-NEXT: s_lshr_b32 s26, s3, 24 +; GFX6-NOHSA-NEXT: s_bfe_u32 s27, s3, 0x80008 +; GFX6-NOHSA-NEXT: s_and_b32 s15, s3, 0xff +; GFX6-NOHSA-NEXT: s_bfe_u32 s3, s3, 0x80010 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:80 +; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s44 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s29 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s4 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s28 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 +; GFX6-NOHSA-NEXT: s_lshr_b32 s24, s2, 24 +; GFX6-NOHSA-NEXT: s_bfe_u32 s25, s2, 0x80008 +; GFX6-NOHSA-NEXT: s_and_b32 s12, s2, 0xff +; GFX6-NOHSA-NEXT: s_bfe_u32 s2, s2, 0x80010 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:64 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s59 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s15 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s27 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s4 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s3 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s26 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 +; GFX6-NOHSA-NEXT: s_lshr_b32 s22, s1, 24 +; GFX6-NOHSA-NEXT: s_bfe_u32 s23, s1, 0x80008 +; GFX6-NOHSA-NEXT: s_and_b32 s14, s1, 0xff +; GFX6-NOHSA-NEXT: s_bfe_u32 s1, s1, 0x80010 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:48 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s57 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s25 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s58 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s2 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s24 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 +; GFX6-NOHSA-NEXT: s_lshr_b32 s20, s0, 24 +; GFX6-NOHSA-NEXT: s_bfe_u32 s21, s0, 0x80008 +; GFX6-NOHSA-NEXT: s_and_b32 s13, s0, 0xff +; GFX6-NOHSA-NEXT: s_bfe_u32 s0, s0, 0x80010 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:32 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s55 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s14 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s23 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s56 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s1 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s22 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:16 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s53 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s13 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s21 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s54 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s0 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s20 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 -; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s51 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s19 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s52 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s18 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 ; GFX6-NOHSA-NEXT: s_endpgm ; ; GFX7-HSA-LABEL: constant_zextload_v64i8_to_v64i32: @@ -3510,160 +3508,160 @@ define amdgpu_kernel void @constant_zextload_v64i8_to_v64i32(ptr addrspace(1) %o ; GFX7-HSA-NEXT: s_lshr_b32 s22, s2, 24 ; GFX7-HSA-NEXT: s_bfe_u32 s23, s2, 0x80008 ; GFX7-HSA-NEXT: s_lshr_b32 s25, s3, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s26, s3, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s28, s4, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s29, s4, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s31, s5, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s33, s5, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s35, s6, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s37, s6, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s38, s7, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s39, s7, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s41, s8, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s43, s8, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s44, s9, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s45, s9, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s46, s10, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s47, s10, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s48, s11, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s49, s11, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s50, s12, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s51, s12, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s52, s13, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s53, s13, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s54, s14, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s55, s14, 0x80008 -; GFX7-HSA-NEXT: s_lshr_b32 s56, s15, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s57, s15, 0x80008 ; GFX7-HSA-NEXT: s_and_b32 s24, s0, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s0, s0, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s27, s1, 0xff +; GFX7-HSA-NEXT: s_and_b32 s26, s1, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s1, s1, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s30, s2, 0xff +; GFX7-HSA-NEXT: s_and_b32 s27, s2, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s2, s2, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s34, s3, 0xff +; GFX7-HSA-NEXT: s_bfe_u32 s28, s3, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s29, s3, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s3, s3, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s36, s4, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s30, s4, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s31, s4, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s33, s4, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s4, s4, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s40, s5, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s34, s5, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s35, s5, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s36, s5, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s5, s5, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s42, s6, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s37, s6, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s38, s6, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s39, s6, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s6, s6, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s58, s7, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s40, s7, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s41, s7, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s42, s7, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s7, s7, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s59, s8, 0xff -; GFX7-HSA-NEXT: s_bfe_u32 s60, s8, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s61, s9, 0xff -; GFX7-HSA-NEXT: s_bfe_u32 s62, s9, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s63, s10, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s43, s8, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s44, s8, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s45, s8, 0xff +; GFX7-HSA-NEXT: s_bfe_u32 s46, s8, 0x80010 +; GFX7-HSA-NEXT: s_lshr_b32 s47, s9, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s48, s9, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s49, s9, 0xff +; GFX7-HSA-NEXT: s_bfe_u32 s50, s9, 0x80010 +; GFX7-HSA-NEXT: s_lshr_b32 s51, s10, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s52, s10, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s53, s10, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s10, s10, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s64, s11, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s54, s11, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s55, s11, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s56, s11, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s11, s11, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s65, s12, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s57, s12, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s58, s12, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s59, s12, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s12, s12, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s66, s13, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s60, s13, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s61, s13, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s62, s13, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s13, s13, 0x80010 -; GFX7-HSA-NEXT: s_and_b32 s67, s14, 0xff +; GFX7-HSA-NEXT: s_lshr_b32 s63, s14, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s64, s14, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s65, s14, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s14, s14, 0x80010 +; GFX7-HSA-NEXT: s_lshr_b32 s66, s15, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s67, s15, 0x80008 ; GFX7-HSA-NEXT: s_and_b32 s68, s15, 0xff ; GFX7-HSA-NEXT: s_bfe_u32 s15, s15, 0x80010 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xf0 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s8 +; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s8 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xe0 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s8 +; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s8 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xd0 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s8 +; GFX7-HSA-NEXT: v_mov_b32_e32 v28, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s8 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xc0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s68 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s67 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s15 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s66 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s65 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s64 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s14 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s63 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s8 -; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xb0 -; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[23:24], v[0:3] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[25:26], v[4:7] ; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s9 ; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s8 +; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xb0 +; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v30, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v29, s8 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xa0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s62 +; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s61 +; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s13 +; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s60 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[27:28], v[8:11] ; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s9 ; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s8 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0x90 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s66 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s53 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s13 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s52 +; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s59 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s58 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s12 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s57 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[20:21], v[8:11] -; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s8 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s56 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s8 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0x80 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s65 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s51 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s50 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[22:23], v[12:15] -; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s68 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s57 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s15 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s56 -; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s8 +; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s8 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0x70 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s55 +; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s11 +; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s54 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s64 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s49 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s11 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s48 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s67 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s55 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s14 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s54 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s63 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6 +; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s53 +; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s52 +; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s10 +; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s51 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[29:30], v[16:19] +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s49 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s48 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s50 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s47 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s45 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s44 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s46 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s43 +; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s42 +; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s41 +; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s7 +; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s40 +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s8 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[26:27], v[20:23] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[14:15], v[0:3] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s6 ; GFX7-HSA-NEXT: s_add_u32 s6, s16, 0x60 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[18:19], v[4:7] -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s47 -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s46 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s7 ; GFX7-HSA-NEXT: s_addc_u32 s7, s17, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[26:27], v[16:19] -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s61 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s7 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s45 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s62 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s44 -; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s6 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s7 ; GFX7-HSA-NEXT: s_add_u32 s6, s16, 0x50 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s59 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s43 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s60 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s58 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s41 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s42 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s39 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s38 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s37 -; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s8 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s35 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[20:21], v[4:7] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[22:23], v[8:11] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] +; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s39 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s38 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s37 ; GFX7-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s40 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s33 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s36 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s35 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s31 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s34 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_nop 0 @@ -3671,16 +3669,16 @@ define amdgpu_kernel void @constant_zextload_v64i8_to_v64i32(ptr addrspace(1) %o ; GFX7-HSA-NEXT: s_add_u32 s4, s16, 64 ; GFX7-HSA-NEXT: s_addc_u32 s5, s17, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s36 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s29 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s28 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s33 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s31 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s30 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GFX7-HSA-NEXT: s_add_u32 s4, s16, 48 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_addc_u32 s5, s17, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s34 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s26 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s29 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s28 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s3 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s25 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5 @@ -3692,13 +3690,13 @@ define amdgpu_kernel void @constant_zextload_v64i8_to_v64i32(ptr addrspace(1) %o ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GFX7-HSA-NEXT: s_add_u32 s2, s16, 16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s30 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s27 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s23 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s22 ; GFX7-HSA-NEXT: s_addc_u32 s3, s17, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s27 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s26 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s21 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s1 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s20 @@ -4232,166 +4230,164 @@ define amdgpu_kernel void @constant_sextload_v64i8_to_v64i32(ptr addrspace(1) %o ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x9 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0 +; GFX6-NOHSA-NEXT: s_mov_b32 s19, 0xf000 +; GFX6-NOHSA-NEXT: s_mov_b32 s18, -1 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NOHSA-NEXT: s_ashr_i32 s26, s2, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s27, s2, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s28, s2, 0x80008 -; GFX6-NOHSA-NEXT: s_sext_i32_i8 s29, s2 -; GFX6-NOHSA-NEXT: s_ashr_i32 s30, s3, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s31, s3, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s33, s3, 0x80008 -; GFX6-NOHSA-NEXT: s_sext_i32_i8 s34, s3 -; GFX6-NOHSA-NEXT: s_bfe_i32 s2, s11, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s3, s11, 0x80008 -; GFX6-NOHSA-NEXT: s_ashr_i32 s66, s15, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s67, s15, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s68, s15, 0x80008 -; GFX6-NOHSA-NEXT: s_sext_i32_i8 s15, s15 -; GFX6-NOHSA-NEXT: s_ashr_i32 s18, s0, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s19, s0, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s20, s0, 0x80008 -; GFX6-NOHSA-NEXT: s_sext_i32_i8 s21, s0 -; GFX6-NOHSA-NEXT: s_ashr_i32 s22, s1, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s23, s1, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s24, s1, 0x80008 -; GFX6-NOHSA-NEXT: s_sext_i32_i8 s25, s1 -; GFX6-NOHSA-NEXT: s_ashr_i32 s53, s10, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s54, s10, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s55, s10, 0x80008 -; GFX6-NOHSA-NEXT: s_sext_i32_i8 s10, s10 -; GFX6-NOHSA-NEXT: s_ashr_i32 s63, s14, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s64, s14, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s65, s14, 0x80008 -; GFX6-NOHSA-NEXT: s_sext_i32_i8 s14, s14 -; GFX6-NOHSA-NEXT: s_mov_b32 s0, s16 -; GFX6-NOHSA-NEXT: s_mov_b32 s1, s17 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s15 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s68 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s67 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s66 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s3 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s2 -; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000 -; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1 -; GFX6-NOHSA-NEXT: s_ashr_i32 s50, s9, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s51, s9, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s52, s9, 0x80008 -; GFX6-NOHSA-NEXT: s_sext_i32_i8 s9, s9 -; GFX6-NOHSA-NEXT: s_ashr_i32 s56, s11, 24 -; GFX6-NOHSA-NEXT: s_sext_i32_i8 s11, s11 -; GFX6-NOHSA-NEXT: s_ashr_i32 s57, s12, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s58, s12, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s59, s12, 0x80008 -; GFX6-NOHSA-NEXT: s_sext_i32_i8 s12, s12 -; GFX6-NOHSA-NEXT: s_ashr_i32 s60, s13, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s61, s13, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s62, s13, 0x80008 -; GFX6-NOHSA-NEXT: s_sext_i32_i8 s13, s13 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s14 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s65 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s64 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s63 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 +; GFX6-NOHSA-NEXT: s_sext_i32_i8 s44, s15 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s44 +; GFX6-NOHSA-NEXT: s_bfe_i32 s44, s15, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s44 +; GFX6-NOHSA-NEXT: s_bfe_i32 s44, s15, 0x80010 +; GFX6-NOHSA-NEXT: s_ashr_i32 s15, s15, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s15 +; GFX6-NOHSA-NEXT: s_sext_i32_i8 s15, s14 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s15 +; GFX6-NOHSA-NEXT: s_bfe_i32 s15, s14, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s15 +; GFX6-NOHSA-NEXT: s_bfe_i32 s15, s14, 0x80010 +; GFX6-NOHSA-NEXT: s_ashr_i32 s14, s14, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s14 +; GFX6-NOHSA-NEXT: s_sext_i32_i8 s14, s13 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s14 +; GFX6-NOHSA-NEXT: s_bfe_i32 s14, s13, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s14 +; GFX6-NOHSA-NEXT: s_bfe_i32 s14, s13, 0x80010 +; GFX6-NOHSA-NEXT: s_ashr_i32 s13, s13, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s13 +; GFX6-NOHSA-NEXT: s_sext_i32_i8 s13, s12 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s13 +; GFX6-NOHSA-NEXT: s_bfe_i32 s13, s12, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s13 +; GFX6-NOHSA-NEXT: s_bfe_i32 s13, s12, 0x80010 +; GFX6-NOHSA-NEXT: s_ashr_i32 s12, s12, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s12 +; GFX6-NOHSA-NEXT: s_sext_i32_i8 s12, s11 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s12 +; GFX6-NOHSA-NEXT: s_bfe_i32 s12, s11, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s12 +; GFX6-NOHSA-NEXT: s_bfe_i32 s12, s11, 0x80010 +; GFX6-NOHSA-NEXT: s_ashr_i32 s11, s11, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s44 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s11 +; GFX6-NOHSA-NEXT: s_sext_i32_i8 s11, s10 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:240 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s10 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s55 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s54 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s53 -; GFX6-NOHSA-NEXT: s_ashr_i32 s47, s8, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s48, s8, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s49, s8, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s11 +; GFX6-NOHSA-NEXT: s_bfe_i32 s11, s10, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s11 +; GFX6-NOHSA-NEXT: s_bfe_i32 s11, s10, 0x80010 +; GFX6-NOHSA-NEXT: s_ashr_i32 s10, s10, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s15 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s12 +; GFX6-NOHSA-NEXT: s_ashr_i32 s12, s9, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s11 +; GFX6-NOHSA-NEXT: s_bfe_i32 s11, s9, 0x80010 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s10 +; GFX6-NOHSA-NEXT: s_bfe_i32 s10, s9, 0x80008 +; GFX6-NOHSA-NEXT: s_sext_i32_i8 s9, s9 +; GFX6-NOHSA-NEXT: s_ashr_i32 s15, s8, 24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s14 +; GFX6-NOHSA-NEXT: s_bfe_i32 s14, s8, 0x80010 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s13 +; GFX6-NOHSA-NEXT: s_bfe_i32 s13, s8, 0x80008 ; GFX6-NOHSA-NEXT: s_sext_i32_i8 s8, s8 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s13 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s62 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s61 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s60 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s12 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s59 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s58 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s57 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s11 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s56 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:224 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:208 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:176 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[16:19], 0 offset:224 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[16:19], 0 offset:208 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[16:19], 0 offset:192 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[16:19], 0 offset:176 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:160 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s9 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s52 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s51 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s50 -; GFX6-NOHSA-NEXT: s_ashr_i32 s44, s7, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s45, s7, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s46, s7, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s10 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s11 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s12 +; GFX6-NOHSA-NEXT: s_ashr_i32 s42, s7, 24 +; GFX6-NOHSA-NEXT: s_bfe_i32 s43, s7, 0x80010 +; GFX6-NOHSA-NEXT: s_bfe_i32 s44, s7, 0x80008 ; GFX6-NOHSA-NEXT: s_sext_i32_i8 s7, s7 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:144 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s8 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s49 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s48 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s47 -; GFX6-NOHSA-NEXT: s_ashr_i32 s41, s6, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s42, s6, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s43, s6, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s13 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s14 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s15 +; GFX6-NOHSA-NEXT: s_ashr_i32 s39, s6, 24 +; GFX6-NOHSA-NEXT: s_bfe_i32 s40, s6, 0x80010 +; GFX6-NOHSA-NEXT: s_bfe_i32 s41, s6, 0x80008 ; GFX6-NOHSA-NEXT: s_sext_i32_i8 s6, s6 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:128 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s7 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s46 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s45 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s44 -; GFX6-NOHSA-NEXT: s_ashr_i32 s38, s5, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s39, s5, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s40, s5, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s44 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s43 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s42 +; GFX6-NOHSA-NEXT: s_ashr_i32 s36, s5, 24 +; GFX6-NOHSA-NEXT: s_bfe_i32 s37, s5, 0x80010 +; GFX6-NOHSA-NEXT: s_bfe_i32 s38, s5, 0x80008 ; GFX6-NOHSA-NEXT: s_sext_i32_i8 s5, s5 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:112 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s6 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s43 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s42 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s41 -; GFX6-NOHSA-NEXT: s_ashr_i32 s35, s4, 24 -; GFX6-NOHSA-NEXT: s_bfe_i32 s36, s4, 0x80010 -; GFX6-NOHSA-NEXT: s_bfe_i32 s37, s4, 0x80008 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s41 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s40 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s39 +; GFX6-NOHSA-NEXT: s_ashr_i32 s33, s4, 24 +; GFX6-NOHSA-NEXT: s_bfe_i32 s34, s4, 0x80010 +; GFX6-NOHSA-NEXT: s_bfe_i32 s35, s4, 0x80008 ; GFX6-NOHSA-NEXT: s_sext_i32_i8 s4, s4 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:96 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s5 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s40 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s39 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s38 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s38 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s37 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s36 +; GFX6-NOHSA-NEXT: s_ashr_i32 s29, s3, 24 +; GFX6-NOHSA-NEXT: s_bfe_i32 s30, s3, 0x80010 +; GFX6-NOHSA-NEXT: s_bfe_i32 s31, s3, 0x80008 +; GFX6-NOHSA-NEXT: s_sext_i32_i8 s3, s3 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:80 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s37 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s36 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s35 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s35 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s34 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s33 +; GFX6-NOHSA-NEXT: s_ashr_i32 s26, s2, 24 +; GFX6-NOHSA-NEXT: s_bfe_i32 s27, s2, 0x80010 +; GFX6-NOHSA-NEXT: s_bfe_i32 s28, s2, 0x80008 +; GFX6-NOHSA-NEXT: s_sext_i32_i8 s2, s2 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:64 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s34 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s33 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s31 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s30 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s3 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s30 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s29 +; GFX6-NOHSA-NEXT: s_ashr_i32 s23, s1, 24 +; GFX6-NOHSA-NEXT: s_bfe_i32 s24, s1, 0x80010 +; GFX6-NOHSA-NEXT: s_bfe_i32 s25, s1, 0x80008 +; GFX6-NOHSA-NEXT: s_sext_i32_i8 s1, s1 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:48 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s29 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s2 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s28 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s27 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s26 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GFX6-NOHSA-NEXT: s_ashr_i32 s20, s0, 24 +; GFX6-NOHSA-NEXT: s_bfe_i32 s21, s0, 0x80010 +; GFX6-NOHSA-NEXT: s_bfe_i32 s22, s0, 0x80008 +; GFX6-NOHSA-NEXT: s_sext_i32_i8 s0, s0 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:32 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s25 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s24 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s23 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s22 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s1 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s25 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s23 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:16 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s21 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s20 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s19 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s18 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s22 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s21 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s20 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 ; GFX6-NOHSA-NEXT: s_endpgm ; ; GFX7-HSA-LABEL: constant_sextload_v64i8_to_v64i32: @@ -4424,16 +4420,15 @@ define amdgpu_kernel void @constant_sextload_v64i8_to_v64i32(ptr addrspace(1) %o ; GFX7-HSA-NEXT: s_ashr_i32 s37, s6, 24 ; GFX7-HSA-NEXT: s_bfe_i32 s38, s6, 0x80010 ; GFX7-HSA-NEXT: s_bfe_i32 s39, s6, 0x80008 -; GFX7-HSA-NEXT: s_sext_i32_i8 s40, s6 -; GFX7-HSA-NEXT: s_ashr_i32 s6, s7, 24 +; GFX7-HSA-NEXT: s_ashr_i32 s40, s7, 24 ; GFX7-HSA-NEXT: s_bfe_i32 s41, s7, 0x80010 ; GFX7-HSA-NEXT: s_bfe_i32 s42, s7, 0x80008 ; GFX7-HSA-NEXT: s_ashr_i32 s43, s8, 24 -; GFX7-HSA-NEXT: s_bfe_i32 s44, s8, 0x80010 -; GFX7-HSA-NEXT: s_bfe_i32 s45, s8, 0x80008 -; GFX7-HSA-NEXT: s_ashr_i32 s47, s9, 24 -; GFX7-HSA-NEXT: s_bfe_i32 s48, s9, 0x80010 -; GFX7-HSA-NEXT: s_bfe_i32 s49, s9, 0x80008 +; GFX7-HSA-NEXT: s_bfe_i32 s46, s8, 0x80010 +; GFX7-HSA-NEXT: s_bfe_i32 s47, s8, 0x80008 +; GFX7-HSA-NEXT: s_ashr_i32 s48, s9, 24 +; GFX7-HSA-NEXT: s_bfe_i32 s49, s9, 0x80010 +; GFX7-HSA-NEXT: s_bfe_i32 s50, s9, 0x80008 ; GFX7-HSA-NEXT: s_ashr_i32 s51, s10, 24 ; GFX7-HSA-NEXT: s_bfe_i32 s52, s10, 0x80010 ; GFX7-HSA-NEXT: s_bfe_i32 s53, s10, 0x80008 @@ -4452,162 +4447,163 @@ define amdgpu_kernel void @constant_sextload_v64i8_to_v64i32(ptr addrspace(1) %o ; GFX7-HSA-NEXT: s_ashr_i32 s66, s15, 24 ; GFX7-HSA-NEXT: s_bfe_i32 s67, s15, 0x80010 ; GFX7-HSA-NEXT: s_bfe_i32 s68, s15, 0x80008 -; GFX7-HSA-NEXT: s_sext_i32_i8 s46, s8 -; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xf0 -; GFX7-HSA-NEXT: s_sext_i32_i8 s50, s9 -; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s8 -; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xe0 -; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s8 -; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xd0 -; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s8 -; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xc0 -; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s8 +; GFX7-HSA-NEXT: s_add_u32 s44, s16, 0xf0 +; GFX7-HSA-NEXT: s_addc_u32 s45, s17, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s44 +; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s45 +; GFX7-HSA-NEXT: s_add_u32 s44, s16, 0xe0 +; GFX7-HSA-NEXT: s_addc_u32 s45, s17, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s44 +; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s45 +; GFX7-HSA-NEXT: s_add_u32 s44, s16, 0xd0 +; GFX7-HSA-NEXT: s_addc_u32 s45, s17, 0 +; GFX7-HSA-NEXT: s_sext_i32_i8 s10, s10 +; GFX7-HSA-NEXT: s_sext_i32_i8 s14, s14 +; GFX7-HSA-NEXT: s_sext_i32_i8 s11, s11 +; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s10 +; GFX7-HSA-NEXT: s_add_u32 s10, s16, 0xc0 +; GFX7-HSA-NEXT: s_sext_i32_i8 s15, s15 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s14 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s65 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s64 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s63 +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s11 +; GFX7-HSA-NEXT: s_addc_u32 s11, s17, 0 +; GFX7-HSA-NEXT: s_sext_i32_i8 s8, s8 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s15 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s68 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s67 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s66 +; GFX7-HSA-NEXT: s_sext_i32_i8 s9, s9 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[25:26], v[4:7] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[23:24], v[0:3] +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xb0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s9 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s9 -; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s8 -; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xa0 -; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v30, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s44 ; GFX7-HSA-NEXT: s_sext_i32_i8 s13, s13 -; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s8 -; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0x90 +; GFX7-HSA-NEXT: v_mov_b32_e32 v29, s8 +; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0xa0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v28, s45 ; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s13 ; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s62 ; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s61 ; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s60 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[20:21], v[8:11] -; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s9 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[27:28], v[8:11] +; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s9 ; GFX7-HSA-NEXT: s_sext_i32_i8 s12, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s8 -; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0x80 -; GFX7-HSA-NEXT: s_sext_i32_i8 s15, s15 +; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s11 +; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s8 +; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0x90 ; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s12 ; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s59 ; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s58 ; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s57 +; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s10 +; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] +; GFX7-HSA-NEXT: s_sext_i32_i8 s6, s6 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s8 +; GFX7-HSA-NEXT: s_add_u32 s8, s16, 0x80 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0 ; GFX7-HSA-NEXT: s_sext_i32_i8 s7, s7 -; GFX7-HSA-NEXT: s_sext_i32_i8 s11, s11 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s15 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s68 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s67 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s66 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[22:23], v[12:15] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s6 +; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s6 ; GFX7-HSA-NEXT: s_add_u32 s6, s16, 0x70 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s11 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s56 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s55 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s54 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s7 -; GFX7-HSA-NEXT: s_addc_u32 s7, s17, 0 -; GFX7-HSA-NEXT: s_sext_i32_i8 s14, s14 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s7 -; GFX7-HSA-NEXT: s_sext_i32_i8 s10, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s14 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s65 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s64 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s63 -; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s6 -; GFX7-HSA-NEXT: s_add_u32 s6, s16, 0x60 -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s10 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[18:19], v[4:7] -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s53 -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s52 -; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s51 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s56 +; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s55 +; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s54 +; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s7 ; GFX7-HSA-NEXT: s_addc_u32 s7, s17, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[26:27], v[16:19] -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s50 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[29:30], v[16:19] +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s50 ; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s7 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s49 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s48 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s47 -; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s49 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s48 +; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s9 ; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s6 -; GFX7-HSA-NEXT: s_add_u32 s6, s16, 0x50 +; GFX7-HSA-NEXT: s_sext_i32_i8 s6, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s16, 0x60 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s47 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s46 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s43 +; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s42 +; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s41 +; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s40 +; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s8 +; GFX7-HSA-NEXT: s_sext_i32_i8 s7, s1 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[14:15], v[0:3] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] +; GFX7-HSA-NEXT: s_addc_u32 s1, s17, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GFX7-HSA-NEXT: s_add_u32 s0, s16, 0x50 +; GFX7-HSA-NEXT: s_addc_u32 s1, s17, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s39 ; GFX7-HSA-NEXT: s_sext_i32_i8 s5, s5 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s46 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s45 -; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s8 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s44 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s43 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s40 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s42 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s41 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s39 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s38 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s37 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[20:21], v[4:7] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[22:23], v[8:11] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s7, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6 -; GFX7-HSA-NEXT: s_sext_i32_i8 s4, s4 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s38 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s37 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s16, 64 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s5 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s36 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s35 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s34 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7 +; GFX7-HSA-NEXT: s_addc_u32 s1, s17, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_sext_i32_i8 s3, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: s_sext_i32_i8 s4, s4 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s16, 48 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4 -; GFX7-HSA-NEXT: s_add_u32 s4, s16, 64 -; GFX7-HSA-NEXT: s_addc_u32 s5, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s33 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s31 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s30 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5 -; GFX7-HSA-NEXT: s_add_u32 s4, s16, 48 +; GFX7-HSA-NEXT: s_addc_u32 s1, s17, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s5, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GFX7-HSA-NEXT: s_sext_i32_i8 s2, s2 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: s_sext_i32_i8 s3, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s16, 32 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s3 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s29 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s28 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s27 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5 +; GFX7-HSA-NEXT: s_addc_u32 s1, s17, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_sext_i32_i8 s1, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: s_sext_i32_i8 s2, s2 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s16, 16 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GFX7-HSA-NEXT: s_add_u32 s2, s16, 32 -; GFX7-HSA-NEXT: s_addc_u32 s3, s17, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GFX7-HSA-NEXT: s_add_u32 s2, s16, 16 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s26 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s25 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s24 -; GFX7-HSA-NEXT: s_addc_u32 s3, s17, 0 +; GFX7-HSA-NEXT: s_addc_u32 s1, s17, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s7 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s23 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s22 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s21 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GFX7-HSA-NEXT: s_sext_i32_i8 s0, s0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s53 +; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s52 +; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s51 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s20 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s19 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s18 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[26:27], v[20:23] ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_endpgm ; @@ -7038,98 +7034,99 @@ define amdgpu_kernel void @constant_sextload_v16i8_to_v16i64(ptr addrspace(1) %o ; GFX7-HSA: ; %bb.0: ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 ; GFX7-HSA-NEXT: s_add_i32 s12, s12, s17 -; GFX7-HSA-NEXT: s_mov_b32 s9, 0 +; GFX7-HSA-NEXT: s_mov_b32 s11, 0 +; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GFX7-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 -; GFX7-HSA-NEXT: s_mov_b32 s11, s9 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0 -; GFX7-HSA-NEXT: s_mov_b32 s21, s9 -; GFX7-HSA-NEXT: s_mov_b32 s23, s9 -; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 +; GFX7-HSA-NEXT: s_mov_b32 s15, s11 +; GFX7-HSA-NEXT: s_mov_b32 s13, s11 +; GFX7-HSA-NEXT: s_mov_b32 s9, s11 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-HSA-NEXT: s_lshr_b32 s8, s7, 16 -; GFX7-HSA-NEXT: s_lshr_b32 s10, s7, 8 -; GFX7-HSA-NEXT: s_mov_b32 s12, s7 -; GFX7-HSA-NEXT: s_lshr_b32 s14, s6, 16 -; GFX7-HSA-NEXT: s_lshr_b32 s16, s6, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s10, s7, 16 +; GFX7-HSA-NEXT: s_lshr_b32 s14, s7, 8 +; GFX7-HSA-NEXT: s_mov_b32 s16, s7 +; GFX7-HSA-NEXT: s_lshr_b32 s12, s5, 16 +; GFX7-HSA-NEXT: s_lshr_b32 s8, s5, 8 +; GFX7-HSA-NEXT: s_mov_b32 s18, s5 +; GFX7-HSA-NEXT: s_lshr_b32 s20, s4, 16 +; GFX7-HSA-NEXT: s_lshr_b32 s22, s4, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s24, s4, 8 ; GFX7-HSA-NEXT: s_ashr_i32 s29, s5, 31 ; GFX7-HSA-NEXT: s_ashr_i32 s31, s5, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s18, s6, 8 -; GFX7-HSA-NEXT: s_lshr_b32 s20, s5, 16 -; GFX7-HSA-NEXT: s_lshr_b32 s22, s5, 8 -; GFX7-HSA-NEXT: s_mov_b32 s24, s5 -; GFX7-HSA-NEXT: s_lshr_b32 s26, s4, 16 -; GFX7-HSA-NEXT: s_lshr_b32 s28, s4, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s30, s4, 8 +; GFX7-HSA-NEXT: s_lshr_b32 s26, s6, 16 +; GFX7-HSA-NEXT: s_lshr_b32 s28, s6, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s30, s6, 8 ; GFX7-HSA-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[4:5], s[8:9], 0x80000 -; GFX7-HSA-NEXT: s_ashr_i32 s33, s7, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s36, s7, 24 +; GFX7-HSA-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000 ; GFX7-HSA-NEXT: s_bfe_i64 s[34:35], s[6:7], 0x80000 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s5 -; GFX7-HSA-NEXT: s_bfe_i64 s[4:5], s[30:31], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[6:7], s[28:29], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[8:9], s[26:27], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000 +; GFX7-HSA-NEXT: s_ashr_i32 s33, s7, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s38, s7, 24 +; GFX7-HSA-NEXT: s_bfe_i64 s[36:37], s[10:11], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[4:5], s[24:25], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[6:7], s[22:23], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[10:11], s[20:21], 0x80000 ; GFX7-HSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[20:21], s[30:31], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[22:23], s[28:29], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[24:25], s[26:27], 0x80000 ; GFX7-HSA-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000 ; GFX7-HSA-NEXT: s_add_u32 s26, s0, 0x70 ; GFX7-HSA-NEXT: s_addc_u32 s27, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s10 -; GFX7-HSA-NEXT: s_add_u32 s10, s0, 0x60 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s11 -; GFX7-HSA-NEXT: s_addc_u32 s11, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s26 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s11 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s27 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s36 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s26 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s27 +; GFX7-HSA-NEXT: s_add_u32 s26, s0, 0x60 +; GFX7-HSA-NEXT: s_addc_u32 s27, s1, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s14 +; GFX7-HSA-NEXT: s_add_u32 s14, s0, 0x50 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s15 +; GFX7-HSA-NEXT: s_addc_u32 s15, s1, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s15 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s26 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s36 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s37 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s38 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s33 -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s10 -; GFX7-HSA-NEXT: s_add_u32 s10, s0, 0x50 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[14:15], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s11, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s11 -; GFX7-HSA-NEXT: s_add_u32 s10, s0, 64 -; GFX7-HSA-NEXT: s_addc_u32 s11, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s11 -; GFX7-HSA-NEXT: s_add_u32 s10, s0, 48 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s14 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s15 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s14 +; GFX7-HSA-NEXT: s_add_u32 s14, s0, 64 +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s27 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17 +; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s24 +; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s25 +; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s22 +; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s23 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[13:14], v[0:3] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[15:16], v[4:7] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[17:18], v[8:11] +; GFX7-HSA-NEXT: s_addc_u32 s15, s1, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14 ; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s34 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s17 ; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s35 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s19 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[4:7] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[2:3], v[12:15] -; GFX7-HSA-NEXT: s_addc_u32 s11, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s20 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s21 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s20 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s21 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s15 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12 +; GFX7-HSA-NEXT: s_add_u32 s12, s0, 48 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s13 +; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s31 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s29 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11 -; GFX7-HSA-NEXT: s_add_u32 s10, s0, 32 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s11, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s24 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s25 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s22 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s23 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11 +; GFX7-HSA-NEXT: s_nop 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s8 +; GFX7-HSA-NEXT: s_add_u32 s8, s0, 32 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s9 +; GFX7-HSA-NEXT: s_addc_u32 s9, s1, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6 @@ -7137,8 +7134,8 @@ define amdgpu_kernel void @constant_sextload_v16i8_to_v16i64(ptr addrspace(1) %o ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GFX7-HSA-NEXT: s_addc_u32 s7, s1, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s10 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s11 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 @@ -7533,160 +7530,157 @@ define amdgpu_kernel void @constant_zextload_v32i8_to_v32i64(ptr addrspace(1) %o ; ; GFX7-HSA-LABEL: constant_zextload_v32i8_to_v32i64: ; GFX7-HSA: ; %bb.0: -; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 +; GFX7-HSA-NEXT: s_load_dwordx4 s[8:11], s[8:9], 0x0 ; GFX7-HSA-NEXT: s_add_i32 s12, s12, s17 ; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GFX7-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, 0 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-HSA-NEXT: s_load_dwordx8 s[12:19], s[2:3], 0x0 +; GFX7-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, v1 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-HSA-NEXT: s_lshr_b32 s11, s12, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s20, s13, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s21, s14, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s22, s15, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s23, s16, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s24, s17, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s25, s18, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s26, s19, 24 -; GFX7-HSA-NEXT: s_bfe_u32 s27, s19, 0x80008 -; GFX7-HSA-NEXT: s_bfe_u32 s28, s18, 0x80008 -; GFX7-HSA-NEXT: s_bfe_u32 s29, s17, 0x80008 -; GFX7-HSA-NEXT: s_bfe_u32 s10, s16, 0x80008 -; GFX7-HSA-NEXT: s_bfe_u32 s8, s15, 0x80008 -; GFX7-HSA-NEXT: s_bfe_u32 s6, s14, 0x80008 -; GFX7-HSA-NEXT: s_bfe_u32 s4, s13, 0x80008 -; GFX7-HSA-NEXT: s_bfe_u32 s2, s12, 0x80008 -; GFX7-HSA-NEXT: s_and_b32 s3, s12, 0xff -; GFX7-HSA-NEXT: s_and_b32 s5, s13, 0xff -; GFX7-HSA-NEXT: s_and_b32 s7, s14, 0xff -; GFX7-HSA-NEXT: s_and_b32 s9, s15, 0xff -; GFX7-HSA-NEXT: s_and_b32 s30, s16, 0xff -; GFX7-HSA-NEXT: s_and_b32 s31, s17, 0xff -; GFX7-HSA-NEXT: s_and_b32 s33, s18, 0xff -; GFX7-HSA-NEXT: s_and_b32 s34, s19, 0xff -; GFX7-HSA-NEXT: s_bfe_u32 s35, s12, 0x80010 -; GFX7-HSA-NEXT: s_bfe_u32 s36, s13, 0x80010 -; GFX7-HSA-NEXT: s_bfe_u32 s14, s14, 0x80010 -; GFX7-HSA-NEXT: s_bfe_u32 s15, s15, 0x80010 -; GFX7-HSA-NEXT: s_bfe_u32 s16, s16, 0x80010 -; GFX7-HSA-NEXT: s_bfe_u32 s17, s17, 0x80010 -; GFX7-HSA-NEXT: s_bfe_u32 s18, s18, 0x80010 -; GFX7-HSA-NEXT: s_bfe_u32 s19, s19, 0x80010 -; GFX7-HSA-NEXT: s_add_u32 s12, s0, 0xf0 -; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13 -; GFX7-HSA-NEXT: s_add_u32 s12, s0, 0xd0 -; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s13 -; GFX7-HSA-NEXT: s_add_u32 s12, s0, 0xb0 -; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s13 -; GFX7-HSA-NEXT: s_add_u32 s12, s0, 0x90 -; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s13 -; GFX7-HSA-NEXT: s_add_u32 s12, s0, 0x70 -; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s13 -; GFX7-HSA-NEXT: s_add_u32 s12, s0, 0x50 -; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s13 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s12 -; GFX7-HSA-NEXT: s_add_u32 s12, s0, 48 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s19 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s26 -; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 +; GFX7-HSA-NEXT: s_lshr_b32 s17, s0, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s18, s1, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s19, s2, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s20, s3, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s16, s3, 0x80008 +; GFX7-HSA-NEXT: s_bfe_u32 s14, s2, 0x80008 +; GFX7-HSA-NEXT: s_bfe_u32 s12, s1, 0x80008 +; GFX7-HSA-NEXT: s_bfe_u32 s10, s0, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s11, s0, 0xff +; GFX7-HSA-NEXT: s_and_b32 s13, s1, 0xff +; GFX7-HSA-NEXT: s_and_b32 s15, s2, 0xff +; GFX7-HSA-NEXT: s_bfe_u32 s21, s0, 0x80010 +; GFX7-HSA-NEXT: s_bfe_u32 s1, s1, 0x80010 +; GFX7-HSA-NEXT: s_bfe_u32 s22, s2, 0x80010 +; GFX7-HSA-NEXT: s_and_b32 s0, s3, 0xff +; GFX7-HSA-NEXT: s_bfe_u32 s23, s3, 0x80010 +; GFX7-HSA-NEXT: s_lshr_b32 s24, s4, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s25, s4, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s26, s4, 0xff +; GFX7-HSA-NEXT: s_bfe_u32 s4, s4, 0x80010 +; GFX7-HSA-NEXT: s_lshr_b32 s27, s5, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s28, s5, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s29, s5, 0xff +; GFX7-HSA-NEXT: s_bfe_u32 s5, s5, 0x80010 +; GFX7-HSA-NEXT: s_lshr_b32 s30, s6, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s31, s6, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s33, s6, 0xff +; GFX7-HSA-NEXT: s_bfe_u32 s6, s6, 0x80010 +; GFX7-HSA-NEXT: s_lshr_b32 s34, s7, 24 +; GFX7-HSA-NEXT: s_bfe_u32 s35, s7, 0x80008 +; GFX7-HSA-NEXT: s_and_b32 s36, s7, 0xff +; GFX7-HSA-NEXT: s_bfe_u32 s7, s7, 0x80010 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 0xf0 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 0xd0 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s2 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 0xb0 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s2 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 0x90 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s2 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 0x70 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s2 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 0x50 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s2 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 48 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s7 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s34 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s13 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s25 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s30 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s17 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s24 -; GFX7-HSA-NEXT: s_add_u32 s12, s0, 16 +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s2 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s5 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s27 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s23 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 16 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s24 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[10:11], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s13 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s15 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s22 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s23 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s20 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[12:13], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s21 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s22 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s19 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[14:15], v[0:3] -; GFX7-HSA-NEXT: s_add_u32 s12, s0, 0xe0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s36 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s20 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s18 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 0xe0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s35 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s11 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[18:19], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s34 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s27 -; GFX7-HSA-NEXT: s_add_u32 s12, s0, 0xc0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s33 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s28 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13 -; GFX7-HSA-NEXT: s_add_u32 s12, s0, 0xa0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s13, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s31 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s29 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s21 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s17 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_nop 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s10 -; GFX7-HSA-NEXT: s_add_u32 s10, s0, 0x80 -; GFX7-HSA-NEXT: s_addc_u32 s11, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s30 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 0xc0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s36 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s35 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_nop 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s8 -; GFX7-HSA-NEXT: s_add_u32 s8, s0, 0x60 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s9 -; GFX7-HSA-NEXT: s_addc_u32 s9, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 0xa0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s33 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s31 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_nop 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6 -; GFX7-HSA-NEXT: s_add_u32 s6, s0, 64 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s7 -; GFX7-HSA-NEXT: s_addc_u32 s7, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GFX7-HSA-NEXT: s_add_u32 s2, s8, 0x80 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s29 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s28 +; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s26 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s25 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_nop 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s4 -; GFX7-HSA-NEXT: s_add_u32 s4, s0, 32 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s5 -; GFX7-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s8, 0x60 +; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s8, 64 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s16 +; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s8, 32 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s15 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s14 +; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s13 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s12 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s11 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s10 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_endpgm ; @@ -8105,349 +8099,348 @@ define amdgpu_kernel void @constant_zextload_v32i8_to_v32i64(ptr addrspace(1) %o define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 { ; GFX6-NOHSA-LABEL: constant_sextload_v32i8_to_v32i64: ; GFX6-NOHSA: ; %bb.0: -; GFX6-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x9 -; GFX6-NOHSA-NEXT: s_mov_b32 s57, 0 -; GFX6-NOHSA-NEXT: s_mov_b32 s47, s57 -; GFX6-NOHSA-NEXT: s_mov_b32 s19, s57 -; GFX6-NOHSA-NEXT: s_mov_b32 s15, s57 +; GFX6-NOHSA-NEXT: s_load_dwordx4 s[12:15], s[4:5], 0x9 +; GFX6-NOHSA-NEXT: s_mov_b32 s37, 0 +; GFX6-NOHSA-NEXT: s_mov_b32 s25, s37 +; GFX6-NOHSA-NEXT: s_mov_b32 s31, s37 +; GFX6-NOHSA-NEXT: s_mov_b32 s23, s37 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0 -; GFX6-NOHSA-NEXT: s_mov_b32 s21, s57 -; GFX6-NOHSA-NEXT: s_mov_b32 s23, s57 -; GFX6-NOHSA-NEXT: s_mov_b32 s39, s57 -; GFX6-NOHSA-NEXT: s_mov_b32 s41, s57 +; GFX6-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[14:15], 0x0 +; GFX6-NOHSA-NEXT: s_mov_b32 s8, s12 +; GFX6-NOHSA-NEXT: s_mov_b32 s9, s13 +; GFX6-NOHSA-NEXT: s_mov_b32 s15, s37 +; GFX6-NOHSA-NEXT: s_mov_b32 s35, s37 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX6-NOHSA-NEXT: s_lshr_b32 s56, s7, 16 -; GFX6-NOHSA-NEXT: s_lshr_b32 s46, s7, 8 -; GFX6-NOHSA-NEXT: s_mov_b32 s60, s7 -; GFX6-NOHSA-NEXT: s_lshr_b32 s50, s6, 16 -; GFX6-NOHSA-NEXT: s_lshr_b32 s36, s6, 24 -; GFX6-NOHSA-NEXT: s_lshr_b32 s24, s6, 8 -; GFX6-NOHSA-NEXT: s_ashr_i32 s33, s3, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s43, s3, 24 -; GFX6-NOHSA-NEXT: s_ashr_i32 s31, s7, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s35, s7, 24 -; GFX6-NOHSA-NEXT: s_lshr_b32 s20, s3, 16 -; GFX6-NOHSA-NEXT: s_lshr_b32 s22, s3, 8 -; GFX6-NOHSA-NEXT: s_mov_b32 s26, s3 -; GFX6-NOHSA-NEXT: s_lshr_b32 s28, s2, 16 -; GFX6-NOHSA-NEXT: s_lshr_b32 s30, s2, 24 -; GFX6-NOHSA-NEXT: s_lshr_b32 s34, s2, 8 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[12:13], s[2:3], 0x80000 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[2:3], s[6:7], 0x80000 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[56:57], 0x80000 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s6 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s7 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[60:61], 0x80000 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s6 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s7 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[46:47], 0x80000 -; GFX6-NOHSA-NEXT: s_ashr_i32 s25, s1, 24 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s6 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s7 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[50:51], 0x80000 -; GFX6-NOHSA-NEXT: s_lshr_b32 s18, s5, 16 +; GFX6-NOHSA-NEXT: s_lshr_b32 s36, s7, 16 +; GFX6-NOHSA-NEXT: s_mov_b32 s53, s37 +; GFX6-NOHSA-NEXT: s_mov_b32 s55, s37 +; GFX6-NOHSA-NEXT: s_lshr_b32 s58, s0, 16 +; GFX6-NOHSA-NEXT: s_lshr_b32 s60, s0, 24 +; GFX6-NOHSA-NEXT: s_lshr_b32 s62, s0, 8 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x80000 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[12:13], s[0:1], 0x80000 +; GFX6-NOHSA-NEXT: s_ashr_i32 s0, s7, 24 +; GFX6-NOHSA-NEXT: s_lshr_b32 s24, s7, 8 +; GFX6-NOHSA-NEXT: s_mov_b32 s44, s7 +; GFX6-NOHSA-NEXT: s_lshr_b32 s42, s6, 16 ; GFX6-NOHSA-NEXT: s_lshr_b32 s14, s5, 8 -; GFX6-NOHSA-NEXT: s_mov_b32 s16, s5 +; GFX6-NOHSA-NEXT: s_mov_b32 s26, s5 +; GFX6-NOHSA-NEXT: s_lshr_b32 s46, s2, 16 +; GFX6-NOHSA-NEXT: s_lshr_b32 s48, s2, 24 +; GFX6-NOHSA-NEXT: s_lshr_b32 s50, s2, 8 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s36 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s37 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s0 +; GFX6-NOHSA-NEXT: s_ashr_i32 s0, s7, 31 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[36:37], s[2:3], 0x80000 +; GFX6-NOHSA-NEXT: s_ashr_i32 s2, s5, 24 +; GFX6-NOHSA-NEXT: s_mov_b32 s11, 0xf000 +; GFX6-NOHSA-NEXT: s_mov_b32 s10, -1 +; GFX6-NOHSA-NEXT: s_lshr_b32 s28, s6, 24 +; GFX6-NOHSA-NEXT: s_lshr_b32 s38, s6, 8 +; GFX6-NOHSA-NEXT: s_lshr_b32 s30, s5, 16 +; GFX6-NOHSA-NEXT: s_lshr_b32 s16, s4, 16 +; GFX6-NOHSA-NEXT: s_lshr_b32 s18, s4, 24 +; GFX6-NOHSA-NEXT: s_lshr_b32 s20, s4, 8 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s0 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x80000 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[64:65], s[4:5], 0x80000 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x80000 ; GFX6-NOHSA-NEXT: s_ashr_i32 s17, s1, 31 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s6 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s7 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[36:37], 0x80000 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s2 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s3 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[2:3], s[24:25], 0x80000 -; GFX6-NOHSA-NEXT: s_lshr_b32 s62, s4, 16 -; GFX6-NOHSA-NEXT: s_lshr_b32 s58, s4, 24 -; GFX6-NOHSA-NEXT: s_lshr_b32 s38, s1, 16 -; GFX6-NOHSA-NEXT: s_lshr_b32 s40, s1, 8 -; GFX6-NOHSA-NEXT: s_mov_b32 s44, s1 -; GFX6-NOHSA-NEXT: s_lshr_b32 s48, s0, 16 -; GFX6-NOHSA-NEXT: s_lshr_b32 s52, s0, 24 -; GFX6-NOHSA-NEXT: s_lshr_b32 s54, s0, 8 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[10:11], s[0:1], 0x80000 -; GFX6-NOHSA-NEXT: s_mov_b32 s0, s8 -; GFX6-NOHSA-NEXT: s_mov_b32 s1, s9 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s6 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s7 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s2 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s3 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[2:3], s[18:19], 0x80000 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[16:17], 0x80000 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[8:9], s[14:15], 0x80000 -; GFX6-NOHSA-NEXT: s_lshr_b32 s42, s4, 8 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s2 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s3 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s35 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s31 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v20, s6 -; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000 -; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v21, s7 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v22, s8 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v23, s9 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[62:63], 0x80000 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[8:9], s[58:59], 0x80000 -; GFX6-NOHSA-NEXT: s_ashr_i32 s27, s5, 31 -; GFX6-NOHSA-NEXT: s_ashr_i32 s29, s5, 24 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x80000 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s2 +; GFX6-NOHSA-NEXT: s_ashr_i32 s2, s5, 31 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[4:5], s[26:27], 0x80000 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s44 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s45 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[66:67], s[6:7], 0x80000 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s25 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s42 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s43 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[42:43], s[28:29], 0x80000 +; GFX6-NOHSA-NEXT: s_ashr_i32 s21, s1, 24 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x80000 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:240 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s6 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s7 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s8 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s9 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[42:43], 0x80000 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s27 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:224 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s14 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s15 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[14:15], s[16:17], 0x80000 +; GFX6-NOHSA-NEXT: s_lshr_b32 s22, s3, 16 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s42 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s43 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s66 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s67 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s38 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s39 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s30 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s31 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s2 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[4:5], s[20:21], 0x80000 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[8:11], 0 offset:224 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[8:11], 0 offset:208 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[8:11], 0 offset:192 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[8:11], 0 offset:176 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:160 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s4 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s5 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s6 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s7 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:160 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:128 -; GFX6-NOHSA-NEXT: s_waitcnt expcnt(1) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s20 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s21 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s43 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s33 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s29 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x80000 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s14 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s15 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s18 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s19 +; GFX6-NOHSA-NEXT: s_lshr_b32 s34, s3, 8 +; GFX6-NOHSA-NEXT: s_mov_b32 s40, s3 +; GFX6-NOHSA-NEXT: s_ashr_i32 s26, s3, 31 +; GFX6-NOHSA-NEXT: s_ashr_i32 s27, s3, 24 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[2:3], s[22:23], 0x80000 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:144 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s26 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s27 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s22 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s23 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s64 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s65 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s4 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s5 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[30:31], s[40:41], 0x80000 ; GFX6-NOHSA-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x80000 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:128 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s28 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s29 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s30 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s31 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[36:37], s[38:39], 0x80000 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s2 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s3 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s27 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s26 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[38:39], s[48:49], 0x80000 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x80000 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:112 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s13 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s30 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s31 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s34 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s35 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[14:15], s[44:45], 0x80000 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[18:19], s[40:41], 0x80000 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 +; GFX6-NOHSA-NEXT: s_lshr_b32 s52, s1, 16 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x80000 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:96 +; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s46 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s47 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s38 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s39 +; GFX6-NOHSA-NEXT: s_lshr_b32 s54, s1, 8 +; GFX6-NOHSA-NEXT: s_mov_b32 s56, s1 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[0:1], s[52:53], 0x80000 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:80 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s36 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s37 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s25 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s50 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s51 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[44:45], s[56:57], 0x80000 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[42:43], s[54:55], 0x80000 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:64 +; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s1 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s21 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s17 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[52:53], 0x80000 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[8:9], s[48:49], 0x80000 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[24:25], s[60:61], 0x80000 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[28:29], s[58:59], 0x80000 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:48 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s14 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s15 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s18 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s19 -; GFX6-NOHSA-NEXT: s_bfe_i64 s[4:5], s[54:55], 0x80000 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s44 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s45 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s42 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s43 +; GFX6-NOHSA-NEXT: s_bfe_i64 s[6:7], s[62:63], 0x80000 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:32 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s8 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s9 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s28 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s29 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s24 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s25 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:16 +; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12 +; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s13 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s6 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s7 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 -; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0) -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s10 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s11 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s4 -; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s5 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:208 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:176 -; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 ; GFX6-NOHSA-NEXT: s_endpgm ; ; GFX7-HSA-LABEL: constant_sextload_v32i8_to_v32i64: ; GFX7-HSA: ; %bb.0: ; GFX7-HSA-NEXT: s_load_dwordx4 s[8:11], s[8:9], 0x0 ; GFX7-HSA-NEXT: s_add_i32 s12, s12, s17 -; GFX7-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 -; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 +; GFX7-HSA-NEXT: s_mov_b32 s17, 0 +; GFX7-HSA-NEXT: s_mov_b32 s15, s17 +; GFX7-HSA-NEXT: s_mov_b32 s19, s17 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0 -; GFX7-HSA-NEXT: s_mov_b32 s11, 0 -; GFX7-HSA-NEXT: s_mov_b32 s37, s11 -; GFX7-HSA-NEXT: s_mov_b32 s57, s11 -; GFX7-HSA-NEXT: s_mov_b32 s47, s11 +; GFX7-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 +; GFX7-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 +; GFX7-HSA-NEXT: s_mov_b32 s13, s17 +; GFX7-HSA-NEXT: s_mov_b32 s21, s17 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-HSA-NEXT: s_lshr_b32 s10, s7, 16 -; GFX7-HSA-NEXT: s_lshr_b32 s36, s7, 8 -; GFX7-HSA-NEXT: s_mov_b32 s38, s7 -; GFX7-HSA-NEXT: s_lshr_b32 s40, s6, 16 -; GFX7-HSA-NEXT: s_ashr_i32 s39, s1, 24 -; GFX7-HSA-NEXT: s_ashr_i32 s41, s3, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s50, s3, 24 -; GFX7-HSA-NEXT: s_ashr_i32 s65, s5, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s52, s6, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s54, s6, 8 -; GFX7-HSA-NEXT: s_lshr_b32 s56, s5, 16 -; GFX7-HSA-NEXT: s_lshr_b32 s46, s5, 8 -; GFX7-HSA-NEXT: s_mov_b32 s48, s5 -; GFX7-HSA-NEXT: s_lshr_b32 s44, s4, 16 -; GFX7-HSA-NEXT: s_lshr_b32 s42, s4, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s34, s4, 8 -; GFX7-HSA-NEXT: s_lshr_b32 s30, s3, 16 -; GFX7-HSA-NEXT: s_lshr_b32 s24, s3, 8 -; GFX7-HSA-NEXT: s_mov_b32 s26, s3 -; GFX7-HSA-NEXT: s_lshr_b32 s22, s2, 16 -; GFX7-HSA-NEXT: s_lshr_b32 s20, s2, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s18, s2, 8 -; GFX7-HSA-NEXT: s_lshr_b32 s16, s1, 16 -; GFX7-HSA-NEXT: s_lshr_b32 s58, s1, 8 -; GFX7-HSA-NEXT: s_mov_b32 s12, s1 -; GFX7-HSA-NEXT: s_lshr_b32 s60, s0, 16 -; GFX7-HSA-NEXT: s_lshr_b32 s62, s0, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s64, s0, 8 -; GFX7-HSA-NEXT: s_bfe_i64 s[14:15], s[2:3], 0x80000 -; GFX7-HSA-NEXT: s_mov_b32 s31, s11 -; GFX7-HSA-NEXT: s_mov_b32 s25, s11 -; GFX7-HSA-NEXT: s_mov_b32 s17, s11 -; GFX7-HSA-NEXT: s_mov_b32 s59, s11 -; GFX7-HSA-NEXT: s_bfe_i64 s[2:3], s[10:11], 0x80000 +; GFX7-HSA-NEXT: s_lshr_b32 s14, s3, 8 +; GFX7-HSA-NEXT: s_lshr_b32 s18, s1, 16 +; GFX7-HSA-NEXT: s_lshr_b32 s20, s3, 16 +; GFX7-HSA-NEXT: s_mov_b32 s28, s3 +; GFX7-HSA-NEXT: s_lshr_b32 s26, s2, 16 +; GFX7-HSA-NEXT: s_lshr_b32 s24, s2, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s36, s2, 8 +; GFX7-HSA-NEXT: s_lshr_b32 s12, s1, 8 +; GFX7-HSA-NEXT: s_mov_b32 s38, s1 +; GFX7-HSA-NEXT: s_lshr_b32 s40, s0, 16 +; GFX7-HSA-NEXT: s_lshr_b32 s48, s0, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s50, s0, 8 +; GFX7-HSA-NEXT: s_bfe_i64 s[10:11], s[0:1], 0x80000 ; GFX7-HSA-NEXT: s_ashr_i32 s33, s1, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s51, s5, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s68, s7, 31 -; GFX7-HSA-NEXT: s_ashr_i32 s69, s7, 24 -; GFX7-HSA-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[28:29], s[4:5], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[66:67], s[6:7], 0x80000 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GFX7-HSA-NEXT: s_bfe_i64 s[2:3], s[64:65], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[4:5], s[62:63], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[6:7], s[60:61], 0x80000 +; GFX7-HSA-NEXT: s_ashr_i32 s44, s1, 24 +; GFX7-HSA-NEXT: s_bfe_i64 s[0:1], s[18:19], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[18:19], s[14:15], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[14:15], s[2:3], 0x80000 +; GFX7-HSA-NEXT: s_ashr_i32 s45, s3, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s46, s3, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s2, s5, 8 +; GFX7-HSA-NEXT: s_mov_b32 s3, s17 +; GFX7-HSA-NEXT: s_bfe_i64 s[34:35], s[2:3], 0x80000 +; GFX7-HSA-NEXT: s_lshr_b32 s2, s5, 16 +; GFX7-HSA-NEXT: s_mov_b32 s52, s5 +; GFX7-HSA-NEXT: s_lshr_b32 s54, s4, 16 +; GFX7-HSA-NEXT: s_lshr_b32 s56, s4, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s58, s4, 8 +; GFX7-HSA-NEXT: s_ashr_i32 s63, s5, 24 +; GFX7-HSA-NEXT: s_bfe_i64 s[42:43], s[2:3], 0x80000 +; GFX7-HSA-NEXT: s_lshr_b32 s2, s7, 8 +; GFX7-HSA-NEXT: s_lshr_b32 s16, s7, 16 +; GFX7-HSA-NEXT: s_mov_b32 s62, s7 +; GFX7-HSA-NEXT: s_lshr_b32 s64, s6, 16 +; GFX7-HSA-NEXT: s_lshr_b32 s66, s6, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s68, s6, 8 +; GFX7-HSA-NEXT: s_ashr_i32 s65, s7, 31 +; GFX7-HSA-NEXT: s_ashr_i32 s67, s7, 24 ; GFX7-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[10:11], s[58:59], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[22:23], s[20:21], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[30:31], s[4:5], 0x80000 +; GFX7-HSA-NEXT: s_ashr_i32 s47, s5, 31 +; GFX7-HSA-NEXT: s_bfe_i64 s[60:61], s[2:3], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[70:71], s[6:7], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[72:73], s[16:17], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[2:3], s[50:51], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[4:5], s[48:49], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[6:7], s[40:41], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[16:17], s[38:39], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[20:21], s[36:37], 0x80000 ; GFX7-HSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[56:57], s[56:57], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[54:55], s[54:55], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[58:59], s[40:41], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[60:61], s[38:39], 0x80000 -; GFX7-HSA-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x80000 -; GFX7-HSA-NEXT: s_add_u32 s62, s8, 0xf0 -; GFX7-HSA-NEXT: s_addc_u32 s63, s9, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s36 -; GFX7-HSA-NEXT: s_add_u32 s36, s8, 0xe0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s37 -; GFX7-HSA-NEXT: s_addc_u32 s37, s9, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s36 -; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s37 -; GFX7-HSA-NEXT: s_add_u32 s36, s8, 0xd0 -; GFX7-HSA-NEXT: s_addc_u32 s37, s9, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s36 -; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s37 -; GFX7-HSA-NEXT: s_add_u32 s36, s8, 0xc0 -; GFX7-HSA-NEXT: s_addc_u32 s37, s9, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s36 -; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s37 -; GFX7-HSA-NEXT: s_add_u32 s36, s8, 0xb0 -; GFX7-HSA-NEXT: s_addc_u32 s37, s9, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s36 -; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s37 -; GFX7-HSA-NEXT: s_add_u32 s36, s8, 0xa0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s58 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s59 +; GFX7-HSA-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[36:37], s[58:59], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[38:39], s[56:57], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[40:41], s[54:55], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[48:49], s[52:53], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[50:51], s[68:69], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[52:53], s[66:67], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[54:55], s[64:65], 0x80000 +; GFX7-HSA-NEXT: s_bfe_i64 s[56:57], s[62:63], 0x80000 +; GFX7-HSA-NEXT: s_add_u32 s58, s8, 0xf0 +; GFX7-HSA-NEXT: s_addc_u32 s59, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s58 +; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s59 +; GFX7-HSA-NEXT: s_add_u32 s58, s8, 0xe0 +; GFX7-HSA-NEXT: s_addc_u32 s59, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s58 +; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s59 +; GFX7-HSA-NEXT: s_add_u32 s58, s8, 0xd0 +; GFX7-HSA-NEXT: s_addc_u32 s59, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s72 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s73 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s67 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s65 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s56 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s57 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s60 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s61 +; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s34 +; GFX7-HSA-NEXT: s_add_u32 s34, s8, 0xc0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[23:24], v[0:3] +; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s35 +; GFX7-HSA-NEXT: s_addc_u32 s35, s9, 0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[25:26], v[4:7] +; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s34 +; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s35 +; GFX7-HSA-NEXT: s_add_u32 s34, s8, 0xb0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s58 +; GFX7-HSA-NEXT: s_addc_u32 s35, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v28, s59 +; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s54 +; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s55 ; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s52 ; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s53 -; GFX7-HSA-NEXT: s_addc_u32 s37, s9, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[22:23], v[8:11] -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s66 -; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s28 -; GFX7-HSA-NEXT: s_add_u32 s28, s8, 0x90 -; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s29 -; GFX7-HSA-NEXT: s_addc_u32 s29, s9, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s28 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s67 -; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s54 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s55 -; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s29 -; GFX7-HSA-NEXT: s_add_u32 s28, s8, 0x80 -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s62 -; GFX7-HSA-NEXT: s_addc_u32 s29, s9, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] -; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s28 -; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s63 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s69 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s68 -; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s29 -; GFX7-HSA-NEXT: s_add_u32 s28, s8, 0x70 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s60 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s61 -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s56 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s57 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[18:19], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s65 -; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s51 -; GFX7-HSA-NEXT: s_addc_u32 s29, s9, 0 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[20:21], v[4:7] -; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s36 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[26:27], v[16:19] -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s48 -; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s24 -; GFX7-HSA-NEXT: s_add_u32 s24, s8, 0x60 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s49 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s46 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s47 -; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s37 -; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s25 -; GFX7-HSA-NEXT: s_addc_u32 s25, s9, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s44 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s45 -; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s42 -; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s43 -; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s28 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[20:21], v[0:3] -; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s34 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s24 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s20 -; GFX7-HSA-NEXT: s_add_u32 s20, s8, 0x50 -; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s35 -; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s30 -; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s31 -; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s26 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s30 +; GFX7-HSA-NEXT: s_add_u32 s30, s8, 0xa0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s31 +; GFX7-HSA-NEXT: s_addc_u32 s31, s9, 0 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[27:28], v[8:11] +; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s30 +; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s31 +; GFX7-HSA-NEXT: s_add_u32 s30, s8, 0x90 +; GFX7-HSA-NEXT: s_addc_u32 s31, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s22 +; GFX7-HSA-NEXT: s_add_u32 s22, s8, 0x80 +; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s70 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s71 ; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s50 -; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s41 -; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s27 -; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s29 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s25 -; GFX7-HSA-NEXT: flat_store_dwordx4 v[22:23], v[4:7] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[8:11] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[26:27], v[12:15] -; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19] -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s21 -; GFX7-HSA-NEXT: s_addc_u32 s21, s9, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s20 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s22 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s23 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s21 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s51 +; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s23 +; GFX7-HSA-NEXT: s_addc_u32 s23, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v29, s34 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] +; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s23 +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s42 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s43 +; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s63 +; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s47 +; GFX7-HSA-NEXT: v_mov_b32_e32 v30, s35 +; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s22 +; GFX7-HSA-NEXT: s_add_u32 s22, s8, 0x70 +; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s48 +; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s49 +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s30 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[29:30], v[16:19] +; GFX7-HSA-NEXT: s_addc_u32 s23, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s22 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s40 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s41 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s38 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s39 +; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s36 +; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s37 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s31 +; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s46 +; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s45 +; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s23 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[26:27], v[20:23] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[14:15], v[0:3] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7] +; GFX7-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] +; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s18 +; GFX7-HSA-NEXT: s_add_u32 s18, s8, 0x60 +; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s19 +; GFX7-HSA-NEXT: s_addc_u32 s19, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19 +; GFX7-HSA-NEXT: s_add_u32 s18, s8, 0x50 +; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s28 +; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s29 +; GFX7-HSA-NEXT: s_addc_u32 s19, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s18 +; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s26 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s27 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s24 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s25 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s19 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_nop 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14 @@ -8455,42 +8448,41 @@ define amdgpu_kernel void @constant_sextload_v32i8_to_v32i64(ptr addrspace(1) %o ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s15 ; GFX7-HSA-NEXT: s_addc_u32 s15, s9, 0 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s14 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s18 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s19 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s20 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s21 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s15 -; GFX7-HSA-NEXT: s_add_u32 s14, s8, 48 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_addc_u32 s15, s9, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s14 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s17 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s39 +; GFX7-HSA-NEXT: s_nop 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s8, 48 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s8, 32 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s44 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s33 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s15 +; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_nop 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s10 -; GFX7-HSA-NEXT: s_add_u32 s10, s8, 32 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s11 -; GFX7-HSA-NEXT: s_addc_u32 s11, s9, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s13 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 +; GFX7-HSA-NEXT: s_add_u32 s0, s8, 16 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s16 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s17 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s12 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s13 +; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GFX7-HSA-NEXT: s_nop 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s4 -; GFX7-HSA-NEXT: s_add_u32 s4, s8, 16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s5 -; GFX7-HSA-NEXT: s_addc_u32 s5, s9, 0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4 +; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s7 -; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s4 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s5 +; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s10 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s11 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9 @@ -11287,68 +11279,69 @@ define amdgpu_kernel void @constant_zextload_v32i8_to_v32i16(ptr addrspace(1) %o ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GFX7-HSA-NEXT: s_and_b32 s22, s1, 0xff00 -; GFX7-HSA-NEXT: s_and_b32 s12, s0, 0xff00 -; GFX7-HSA-NEXT: s_and_b32 s23, s1, 0xff -; GFX7-HSA-NEXT: s_lshl_b32 s22, s22, 8 -; GFX7-HSA-NEXT: s_lshr_b32 s21, s0, 24 -; GFX7-HSA-NEXT: s_or_b32 s22, s23, s22 -; GFX7-HSA-NEXT: s_and_b32 s23, s0, 0xff -; GFX7-HSA-NEXT: s_lshl_b32 s12, s12, 8 -; GFX7-HSA-NEXT: s_lshr_b32 s13, s1, 24 -; GFX7-HSA-NEXT: s_or_b32 s23, s23, s12 -; GFX7-HSA-NEXT: s_mov_b32 s12, s1 -; GFX7-HSA-NEXT: s_mov_b32 s1, s21 -; GFX7-HSA-NEXT: s_and_b32 s20, s3, 0xff00 -; GFX7-HSA-NEXT: s_lshr_b64 s[12:13], s[12:13], 16 +; GFX7-HSA-NEXT: s_and_b32 s25, s1, 0xff00 +; GFX7-HSA-NEXT: s_and_b32 s16, s0, 0xff00 +; GFX7-HSA-NEXT: s_and_b32 s26, s1, 0xff +; GFX7-HSA-NEXT: s_lshl_b32 s25, s25, 8 +; GFX7-HSA-NEXT: s_lshr_b32 s24, s0, 24 +; GFX7-HSA-NEXT: s_or_b32 s25, s26, s25 +; GFX7-HSA-NEXT: s_and_b32 s26, s0, 0xff +; GFX7-HSA-NEXT: s_lshl_b32 s16, s16, 8 +; GFX7-HSA-NEXT: s_lshr_b32 s17, s1, 24 +; GFX7-HSA-NEXT: s_or_b32 s26, s26, s16 +; GFX7-HSA-NEXT: s_mov_b32 s16, s1 +; GFX7-HSA-NEXT: s_mov_b32 s1, s24 +; GFX7-HSA-NEXT: s_and_b32 s23, s3, 0xff00 +; GFX7-HSA-NEXT: s_lshr_b64 s[16:17], s[16:17], 16 ; GFX7-HSA-NEXT: s_lshr_b64 s[0:1], s[0:1], 16 -; GFX7-HSA-NEXT: s_and_b32 s19, s2, 0xff00 -; GFX7-HSA-NEXT: s_and_b32 s13, s0, 0xff00ff +; GFX7-HSA-NEXT: s_and_b32 s14, s2, 0xff00 +; GFX7-HSA-NEXT: s_and_b32 s17, s0, 0xff00ff ; GFX7-HSA-NEXT: s_and_b32 s0, s3, 0xff -; GFX7-HSA-NEXT: s_lshl_b32 s1, s20, 8 -; GFX7-HSA-NEXT: s_or_b32 s20, s0, s1 +; GFX7-HSA-NEXT: s_lshl_b32 s1, s23, 8 +; GFX7-HSA-NEXT: s_lshr_b32 s22, s2, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s15, s3, 24 +; GFX7-HSA-NEXT: s_or_b32 s23, s0, s1 ; GFX7-HSA-NEXT: s_and_b32 s0, s2, 0xff -; GFX7-HSA-NEXT: s_lshl_b32 s1, s19, 8 -; GFX7-HSA-NEXT: s_lshr_b32 s18, s2, 24 -; GFX7-HSA-NEXT: s_or_b32 s19, s0, s1 -; GFX7-HSA-NEXT: s_lshr_b32 s1, s3, 24 -; GFX7-HSA-NEXT: s_mov_b32 s0, s3 -; GFX7-HSA-NEXT: s_lshr_b64 s[0:1], s[0:1], 16 -; GFX7-HSA-NEXT: s_mov_b32 s3, s18 -; GFX7-HSA-NEXT: s_and_b32 s17, s5, 0xff00 -; GFX7-HSA-NEXT: s_and_b32 s21, s0, 0xff00ff +; GFX7-HSA-NEXT: s_lshl_b32 s1, s14, 8 +; GFX7-HSA-NEXT: s_mov_b32 s14, s3 +; GFX7-HSA-NEXT: s_or_b32 s24, s0, s1 +; GFX7-HSA-NEXT: s_lshr_b64 s[0:1], s[14:15], 16 +; GFX7-HSA-NEXT: s_mov_b32 s3, s22 +; GFX7-HSA-NEXT: s_and_b32 s21, s5, 0xff00 +; GFX7-HSA-NEXT: s_and_b32 s14, s0, 0xff00ff ; GFX7-HSA-NEXT: s_lshr_b64 s[0:1], s[2:3], 16 -; GFX7-HSA-NEXT: s_and_b32 s10, s4, 0xff00 +; GFX7-HSA-NEXT: s_and_b32 s12, s4, 0xff00 ; GFX7-HSA-NEXT: s_and_b32 s2, s0, 0xff00ff ; GFX7-HSA-NEXT: s_and_b32 s0, s5, 0xff -; GFX7-HSA-NEXT: s_lshl_b32 s1, s17, 8 -; GFX7-HSA-NEXT: s_lshr_b32 s16, s4, 24 -; GFX7-HSA-NEXT: s_lshr_b32 s11, s5, 24 +; GFX7-HSA-NEXT: s_lshl_b32 s1, s21, 8 +; GFX7-HSA-NEXT: s_lshr_b32 s20, s4, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s13, s5, 24 ; GFX7-HSA-NEXT: s_or_b32 s3, s0, s1 ; GFX7-HSA-NEXT: s_and_b32 s0, s4, 0xff -; GFX7-HSA-NEXT: s_lshl_b32 s1, s10, 8 -; GFX7-HSA-NEXT: s_mov_b32 s10, s5 -; GFX7-HSA-NEXT: s_or_b32 s17, s0, s1 -; GFX7-HSA-NEXT: s_lshr_b64 s[0:1], s[10:11], 16 -; GFX7-HSA-NEXT: s_mov_b32 s5, s16 -; GFX7-HSA-NEXT: s_and_b32 s15, s7, 0xff00 -; GFX7-HSA-NEXT: s_and_b32 s10, s0, 0xff00ff +; GFX7-HSA-NEXT: s_lshl_b32 s1, s12, 8 +; GFX7-HSA-NEXT: s_mov_b32 s12, s5 +; GFX7-HSA-NEXT: s_or_b32 s15, s0, s1 +; GFX7-HSA-NEXT: s_lshr_b64 s[0:1], s[12:13], 16 +; GFX7-HSA-NEXT: s_mov_b32 s5, s20 +; GFX7-HSA-NEXT: s_and_b32 s19, s7, 0xff00 +; GFX7-HSA-NEXT: s_and_b32 s12, s0, 0xff00ff ; GFX7-HSA-NEXT: s_lshr_b64 s[0:1], s[4:5], 16 -; GFX7-HSA-NEXT: s_and_b32 s14, s6, 0xff00 +; GFX7-HSA-NEXT: s_and_b32 s10, s6, 0xff00 ; GFX7-HSA-NEXT: s_and_b32 s4, s0, 0xff00ff ; GFX7-HSA-NEXT: s_and_b32 s0, s7, 0xff -; GFX7-HSA-NEXT: s_lshl_b32 s1, s15, 8 +; GFX7-HSA-NEXT: s_lshl_b32 s1, s19, 8 +; GFX7-HSA-NEXT: s_lshr_b32 s18, s6, 24 +; GFX7-HSA-NEXT: s_lshr_b32 s11, s7, 24 ; GFX7-HSA-NEXT: s_or_b32 s5, s0, s1 ; GFX7-HSA-NEXT: s_and_b32 s0, s6, 0xff -; GFX7-HSA-NEXT: s_lshl_b32 s1, s14, 8 -; GFX7-HSA-NEXT: s_or_b32 s11, s0, s1 -; GFX7-HSA-NEXT: s_lshr_b32 s1, s7, 24 -; GFX7-HSA-NEXT: s_mov_b32 s0, s7 -; GFX7-HSA-NEXT: s_lshr_b64 s[0:1], s[0:1], 16 -; GFX7-HSA-NEXT: s_lshr_b32 s7, s6, 24 -; GFX7-HSA-NEXT: s_and_b32 s14, s0, 0xff00ff +; GFX7-HSA-NEXT: s_lshl_b32 s1, s10, 8 +; GFX7-HSA-NEXT: s_mov_b32 s10, s7 +; GFX7-HSA-NEXT: s_or_b32 s13, s0, s1 +; GFX7-HSA-NEXT: s_lshr_b64 s[0:1], s[10:11], 16 +; GFX7-HSA-NEXT: s_mov_b32 s7, s18 +; GFX7-HSA-NEXT: s_and_b32 s10, s0, 0xff00ff ; GFX7-HSA-NEXT: s_lshr_b64 s[0:1], s[6:7], 16 -; GFX7-HSA-NEXT: s_and_b32 s12, s12, 0xff00ff +; GFX7-HSA-NEXT: s_and_b32 s16, s16, 0xff00ff ; GFX7-HSA-NEXT: s_and_b32 s0, s0, 0xff00ff ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s0 ; GFX7-HSA-NEXT: s_add_u32 s0, s8, 48 @@ -11356,32 +11349,32 @@ define amdgpu_kernel void @constant_zextload_v32i8_to_v32i16(ptr addrspace(1) %o ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GFX7-HSA-NEXT: s_add_u32 s0, s8, 32 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s11 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s13 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s14 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s10 ; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GFX7-HSA-NEXT: s_add_u32 s0, s8, 16 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s17 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s15 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s4 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s3 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s10 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s12 ; GFX7-HSA-NEXT: s_addc_u32 s1, s9, 0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s19 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s24 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s2 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s20 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s21 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s23 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s14 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8 -; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s23 -; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s13 -; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s22 -; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s12 +; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s26 +; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s17 +; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s25 +; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s16 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX7-HSA-NEXT: s_endpgm diff --git a/llvm/test/CodeGen/AMDGPU/load-global-i16.ll b/llvm/test/CodeGen/AMDGPU/load-global-i16.ll index f8c8be01f2d35..d832d16601049 100644 --- a/llvm/test/CodeGen/AMDGPU/load-global-i16.ll +++ b/llvm/test/CodeGen/AMDGPU/load-global-i16.ll @@ -2201,40 +2201,40 @@ define amdgpu_kernel void @global_zextload_v16i16_to_v16i32(ptr addrspace(1) %ou ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s1 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s0 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 32 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v27, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v24, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v26, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v28, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v30, s0 ; GCN-HSA-NEXT: s_waitcnt vmcnt(1) ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v1 +; GCN-HSA-NEXT: s_waitcnt vmcnt(0) +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v23, 16, v7 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v21, 16, v6 +; GCN-HSA-NEXT: v_and_b32_e32 v22, 0xffff, v7 +; GCN-HSA-NEXT: v_and_b32_e32 v20, 0xffff, v6 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v0 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 16, v3 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v2 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v5 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v4 ; GCN-HSA-NEXT: v_and_b32_e32 v10, 0xffff, v1 ; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xffff, v0 ; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xffff, v3 ; GCN-HSA-NEXT: v_and_b32_e32 v12, 0xffff, v2 -; GCN-HSA-NEXT: s_waitcnt vmcnt(0) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v7 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v6 -; GCN-HSA-NEXT: v_and_b32_e32 v2, 0xffff, v7 -; GCN-HSA-NEXT: v_and_b32_e32 v0, 0xffff, v6 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v5 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v4 ; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v5 ; GCN-HSA-NEXT: v_and_b32_e32 v16, 0xffff, v4 -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[0:3] -; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] -; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] -; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[8:11] +; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[20:23] +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[16:19] +; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15] +; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[8:11] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_zextload_v16i16_to_v16i32: @@ -2640,40 +2640,41 @@ define amdgpu_kernel void @global_zextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v17, 16, v2 ; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v23, 16, v1 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v35, 16, v13 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v33, 16, v12 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v34, 0xffff, v13 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v32, 0xffff, v12 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v39, 16, v13 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v37, 16, v12 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v38, 0xffff, v13 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v36, 0xffff, v12 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v43, 16, v15 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v41, 16, v14 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v42, 0xffff, v15 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v40, 0xffff, v14 ; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v21, 16, v0 ; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v27, 16, v7 ; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v25, 16, v6 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v31, 16, v5 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v29, 16, v4 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v35, 16, v11 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v33, 16, v10 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v39, 16, v9 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v37, 16, v8 ; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v18, 0xffff, v3 ; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v16, 0xffff, v2 ; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v22, 0xffff, v1 ; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v20, 0xffff, v0 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v3, 16, v5 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v1, 16, v4 ; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v26, 0xffff, v7 ; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v24, 0xffff, v6 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v2, 0xffff, v5 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v0, 0xffff, v4 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v7, 16, v11 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v5, 16, v10 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v31, 16, v9 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v29, 16, v8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v6, 0xffff, v11 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v4, 0xffff, v10 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v30, 0xffff, v9 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v28, 0xffff, v8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v11, 16, v15 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v9, 16, v14 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v10, 0xffff, v15 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v8, 0xffff, v14 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v30, 0xffff, v5 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v28, 0xffff, v4 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v34, 0xffff, v11 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v32, 0xffff, v10 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v38, 0xffff, v9 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v36, 0xffff, v8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[40:43], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:32 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:48 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:16 @@ -2691,93 +2692,92 @@ define amdgpu_kernel void @global_zextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 32 -; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 -; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCN-HSA-NEXT: s_add_u32 s2, s2, 48 -; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 +; GCN-HSA-NEXT: s_add_u32 s4, s2, 48 +; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[4:5] +; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 +; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9] ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v24, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v27, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v26, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v28, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: s_add_u32 s4, s0, 64 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v30, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x50 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: s_add_u32 s6, s0, 0x50 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 32 ; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 -; GCN-HSA-NEXT: s_add_u32 s8, s0, 32 -; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s9 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s0 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 48 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v29, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v31, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v28, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v30, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v32, s0 ; GCN-HSA-NEXT: s_waitcnt vmcnt(3) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v5 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v4 -; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v5 -; GCN-HSA-NEXT: v_and_b32_e32 v16, 0xffff, v4 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[16:19] -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v0 +; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v1 +; GCN-HSA-NEXT: v_and_b32_e32 v16, 0xffff, v0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s5 ; GCN-HSA-NEXT: s_waitcnt vmcnt(3) ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v13 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v12 ; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v13 ; GCN-HSA-NEXT: v_and_b32_e32 v16, 0xffff, v12 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s7 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[16:19] -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v14 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v7 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v6 -; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v7 -; GCN-HSA-NEXT: v_and_b32_e32 v16, 0xffff, v6 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v15 -; GCN-HSA-NEXT: v_and_b32_e32 v6, 0xffff, v15 -; GCN-HSA-NEXT: v_and_b32_e32 v4, 0xffff, v14 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s6 -; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[4:7] -; GCN-HSA-NEXT: s_waitcnt vmcnt(4) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v23, 16, v3 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v1 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v0 -; GCN-HSA-NEXT: v_and_b32_e32 v6, 0xffff, v1 -; GCN-HSA-NEXT: v_and_b32_e32 v4, 0xffff, v0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[4:7] -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v21, 16, v2 -; GCN-HSA-NEXT: v_and_b32_e32 v22, 0xffff, v3 -; GCN-HSA-NEXT: v_and_b32_e32 v20, 0xffff, v2 -; GCN-HSA-NEXT: s_waitcnt vmcnt(4) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v11 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v10 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v14, 16, v9 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 16, v8 -; GCN-HSA-NEXT: v_and_b32_e32 v6, 0xffff, v11 -; GCN-HSA-NEXT: v_and_b32_e32 v4, 0xffff, v10 -; GCN-HSA-NEXT: v_and_b32_e32 v13, 0xffff, v9 -; GCN-HSA-NEXT: v_and_b32_e32 v11, 0xffff, v8 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s4 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19] +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v14 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v3 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v2 +; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v3 +; GCN-HSA-NEXT: v_and_b32_e32 v16, 0xffff, v2 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v15 +; GCN-HSA-NEXT: v_and_b32_e32 v2, 0xffff, v15 +; GCN-HSA-NEXT: v_and_b32_e32 v0, 0xffff, v14 +; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[0:3] +; GCN-HSA-NEXT: s_waitcnt vmcnt(3) +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v23, 16, v9 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v21, 16, v8 +; GCN-HSA-NEXT: v_and_b32_e32 v22, 0xffff, v9 +; GCN-HSA-NEXT: v_and_b32_e32 v20, 0xffff, v8 ; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[20:23] -; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[11:14] -; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[4:7] -; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[16:19] +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v7 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v23, 16, v11 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v21, 16, v10 +; GCN-HSA-NEXT: v_and_b32_e32 v22, 0xffff, v11 +; GCN-HSA-NEXT: v_and_b32_e32 v20, 0xffff, v10 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v6 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 16, v5 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v4 +; GCN-HSA-NEXT: v_and_b32_e32 v2, 0xffff, v7 +; GCN-HSA-NEXT: v_and_b32_e32 v0, 0xffff, v6 +; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xffff, v5 +; GCN-HSA-NEXT: v_and_b32_e32 v12, 0xffff, v4 +; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[20:23] +; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15] +; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[16:19] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_zextload_v32i16_to_v32i32: @@ -2801,15 +2801,16 @@ define amdgpu_kernel void @global_zextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v18, 0xffff, v3 ; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v17, 16, v2 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v31, 16, v13 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v30, 0xffff, v13 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v29, 16, v12 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v28, 0xffff, v12 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v16, 0xffff, v2 ; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v31, 16, v15 ; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v30, 0xffff, v15 ; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v29, 16, v14 ; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v28, 0xffff, v14 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v15, 16, v13 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v14, 0xffff, v13 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v13, 16, v12 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v12, 0xffff, v12 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v16, 0xffff, v2 ; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1 ; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v2, 0xffff, v1 ; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 @@ -2830,7 +2831,6 @@ define amdgpu_kernel void @global_zextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v10, 0xffff, v9 ; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v9, 16, v8 ; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v8, 0xffff, v8 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:96 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:112 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:64 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:80 @@ -3033,10 +3033,16 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v17, 16, v2 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v18, v3, 0, 16 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v35, 16, v13 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v33, 16, v12 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v34, v13, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v32, v12, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v31, 16, v13 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v29, 16, v12 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v30, v13, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v28, v12, 0, 16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v31, 16, v15 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v29, 16, v14 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v30, v15, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v28, v14, 0, 16 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v16, v2, 0, 16 ; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 16, v1 ; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v21, 16, v0 @@ -3054,17 +3060,12 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v5, 16, v10 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v6, v11, 0, 16 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v4, v10, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v31, 16, v9 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v29, 16, v8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v30, v9, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v28, v8, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v11, 16, v15 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v9, 16, v14 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v10, v15, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v8, v14, 0, 16 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v12, 16, v9 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v10, 16, v8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v11, v9, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v9, v8, 0, 16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[9:12], off, s[0:3], 0 offset:64 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:32 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 @@ -3076,13 +3077,13 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-HSA: ; %bb.0: ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 ; GCN-HSA-NEXT: s_add_i32 s12, s12, s17 -; GCN-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GCN-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 +; GCN-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] ; GCN-HSA-NEXT: s_add_u32 s4, s2, 48 +; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 @@ -3108,9 +3109,13 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v27, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v26, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v28, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_waitcnt vmcnt(3) @@ -3121,16 +3126,13 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v29, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v28, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v18, 16, v15 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v16, 16, v14 ; GCN-HSA-NEXT: v_bfe_i32 v17, v15, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v15, v14, 0, 16 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: s_add_u32 s0, s0, 48 ; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[15:18] ; GCN-HSA-NEXT: s_waitcnt vmcnt(4) ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v14, 16, v11 @@ -3141,8 +3143,7 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v16, 16, v8 ; GCN-HSA-NEXT: v_bfe_i32 v17, v9, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v15, v8, 0, 16 -; GCN-HSA-NEXT: s_add_u32 s0, s0, 48 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, s3 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[15:18] ; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[11:14] @@ -3155,11 +3156,11 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v12, 16, v4 ; GCN-HSA-NEXT: v_bfe_i32 v13, v5, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v11, v4, 0, 16 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v31, s1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[19:20], v[11:14] -; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[7:10] -; GCN-HSA-NEXT: v_mov_b32_e32 v30, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v30, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s1 +; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[11:14] +; GCN-HSA-NEXT: flat_store_dwordx4 v[19:20], v[7:10] +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s0 ; GCN-HSA-NEXT: s_waitcnt vmcnt(6) ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v10, 16, v1 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v8, 16, v0 @@ -3169,8 +3170,8 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 16, v2 ; GCN-HSA-NEXT: v_bfe_i32 v5, v3, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v3, v2, 0, 16 -; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[7:10] -; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[3:6] +; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[7:10] +; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[3:6] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_sextload_v32i16_to_v32i32: @@ -3194,11 +3195,16 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v17, 16, v2 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v18, v3, 0, 16 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v35, 16, v13 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v33, 16, v12 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v34, v13, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v32, v12, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v31, 16, v13 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v29, 16, v12 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v30, v13, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v28, v12, 0, 16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v16, v2, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v31, 16, v15 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v29, 16, v14 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v30, v15, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v28, v14, 0, 16 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 16, v1 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v21, 16, v0 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v1, 0, 16 @@ -3215,17 +3221,12 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i32(ptr addrspace(1) %ou ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v5, 16, v10 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v6, v11, 0, 16 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v4, v10, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v31, 16, v9 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v29, 16, v8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v30, v9, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v28, v8, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v11, 16, v15 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v9, 16, v14 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v10, v15, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v8, v14, 0, 16 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:64 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v12, 16, v9 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v10, 16, v8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v11, v9, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v9, v8, 0, 16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[9:12], off, s[0:3], 0 offset:64 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:32 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 @@ -3430,134 +3431,113 @@ define amdgpu_kernel void @global_zextload_v64i16_to_v64i32(ptr addrspace(1) %ou ; GCN-NOHSA-SI-LABEL: global_zextload_v64i16_to_v64i32: ; GCN-NOHSA-SI: ; %bb.0: ; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s12, SCRATCH_RSRC_DWORD0 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s13, SCRATCH_RSRC_DWORD1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s14, -1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s15, 0xe8f000 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-SI-NEXT: s_add_u32 s12, s12, s11 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s10, s2 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s3 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-SI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s3 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:16 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[27:30], off, s[8:11], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[31:34], off, s[8:11], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[35:38], off, s[8:11], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[39:42], off, s[8:11], 0 offset:112 -; GCN-NOHSA-SI-NEXT: s_addc_u32 s13, s13, 0 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[20:23], off, s[8:11], 0 offset:112 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[24:27], off, s[8:11], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[28:31], off, s[8:11], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(6) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v35, 16, v21 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v34, 0xffff, v21 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v32, 0xffff, v20 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:224 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v35, 16, v23 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v34, 0xffff, v23 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v32, 0xffff, v22 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(6) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v23, 16, v25 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v22, 0xffff, v25 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v21, 16, v24 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v20, 0xffff, v24 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:240 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v35, 16, v27 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v34, 0xffff, v27 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v32, 0xffff, v26 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:192 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(7) expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v23, 16, v29 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v22, 0xffff, v29 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v21, 16, v28 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v20, 0xffff, v28 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v27, 16, v31 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v26, 0xffff, v31 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v25, 16, v30 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v24, 0xffff, v30 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:208 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(7) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v18, 16, v15 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v16, 16, v14 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v17, 0xffff, v15 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v15, 0xffff, v14 -; GCN-NOHSA-SI-NEXT: buffer_store_dword v15, off, s[12:15], 0 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v16, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v17, off, s[12:15], 0 offset:8 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v18, off, s[12:15], 0 offset:12 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v21, 16, v13 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v19, 16, v12 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v20, 0xffff, v13 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v31, 16, v17 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v30, 0xffff, v17 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v29, 16, v16 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v28, 0xffff, v16 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v38, 16, v19 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:160 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v36, 16, v18 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v37, 0xffff, v19 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(1) +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v35, 0xffff, v18 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(6) expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v20, 16, v12 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v21, 0xffff, v13 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v19, 0xffff, v12 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v40, 16, v14 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v39, 0xffff, v14 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v14, 16, v11 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v12, 16, v10 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v13, 0xffff, v11 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v11, 0xffff, v10 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v32, 16, v6 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:176 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v16, 16, v4 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(6) expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 16, v3 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v42, 16, v15 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:128 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v41, 0xffff, v15 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v24, 16, v2 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v18, 0xffff, v12 -; GCN-NOHSA-SI-NEXT: buffer_store_dword v18, off, s[12:15], 0 offset:16 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v19, off, s[12:15], 0 offset:20 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v20, off, s[12:15], 0 offset:24 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v21, off, s[12:15], 0 offset:28 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(14) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 16, v11 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v24, 16, v10 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(2) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v19, 16, v9 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v17, 16, v8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v25, 0xffff, v11 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v23, 0xffff, v10 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v18, 0xffff, v9 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v16, 0xffff, v8 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(12) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v11, 16, v3 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v9, 16, v2 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v50, 16, v1 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v48, 16, v0 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v10, 0xffff, v3 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v8, 0xffff, v2 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v49, 0xffff, v1 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v47, 0xffff, v0 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(8) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v3, 16, v40 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v1, 16, v39 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v2, 0xffff, v40 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v0, 0xffff, v39 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v15, 16, v7 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v13, 16, v6 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v44, 16, v4 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v14, 0xffff, v7 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v12, 0xffff, v6 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v45, 0xffff, v5 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v43, 0xffff, v4 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v54, 16, v30 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v52, 16, v29 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v58, 16, v28 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v56, 16, v27 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v53, 0xffff, v30 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v51, 0xffff, v29 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v57, 0xffff, v28 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v55, 0xffff, v27 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 16, v34 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v28, 16, v33 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v62, 16, v32 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v60, 16, v31 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v29, 0xffff, v34 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v27, 0xffff, v33 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v61, 0xffff, v32 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v59, 0xffff, v31 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v34, 16, v38 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v32, 16, v37 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v7, 16, v36 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v5, 16, v35 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v33, 0xffff, v38 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v31, 0xffff, v37 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v6, 0xffff, v36 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v4, 0xffff, v35 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v38, 16, v42 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v36, 16, v41 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v37, 0xffff, v42 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v35, 0xffff, v41 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:240 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:192 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:208 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[59:62], off, s[0:3], 0 offset:160 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:176 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[55:58], off, s[0:3], 0 offset:128 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[51:54], off, s[0:3], 0 offset:144 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[47:50], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v46, 16, v9 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:144 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v44, 16, v8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v45, 0xffff, v9 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v43, 0xffff, v8 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v28, 16, v0 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v33, 0xffff, v7 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v31, 0xffff, v6 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v17, 0xffff, v5 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v15, 0xffff, v4 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v25, 0xffff, v3 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v23, 0xffff, v2 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 offset:112 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[43:46], off, s[0:3], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v29, 0xffff, v1 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v27, 0xffff, v0 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:32 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_load_dword v0, off, s[12:15], 0 offset:16 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:20 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v2, off, s[12:15], 0 offset:24 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v3, off, s[12:15], 0 offset:28 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: buffer_load_dword v0, off, s[12:15], 0 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: global_zextload_v64i16_to_v64i32: @@ -3569,321 +3549,297 @@ define amdgpu_kernel void @global_zextload_v64i16_to_v64i32(ptr addrspace(1) %ou ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCN-HSA-NEXT: flat_load_dwordx4 v[24:27], v[0:1] -; GCN-HSA-NEXT: s_add_u32 s4, s2, 16 +; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] +; GCN-HSA-NEXT: s_add_u32 s8, s2, 16 +; GCN-HSA-NEXT: s_addc_u32 s9, s3, 0 +; GCN-HSA-NEXT: s_add_u32 s4, s2, 32 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 -; GCN-HSA-NEXT: s_add_u32 s6, s2, 32 +; GCN-HSA-NEXT: s_add_u32 s6, s2, 48 ; GCN-HSA-NEXT: s_addc_u32 s7, s3, 0 -; GCN-HSA-NEXT: s_add_u32 s8, s2, 48 -; GCN-HSA-NEXT: s_addc_u32 s9, s3, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s9 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s7 ; GCN-HSA-NEXT: s_add_u32 s10, s2, 64 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s8 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s6 ; GCN-HSA-NEXT: s_addc_u32 s11, s3, 0 -; GCN-HSA-NEXT: flat_load_dwordx4 v[20:23], v[16:17] +; GCN-HSA-NEXT: flat_load_dwordx4 v[16:19], v[16:17] ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s11 ; GCN-HSA-NEXT: s_add_u32 s10, s2, 0x50 +; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s11, s3, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s11 ; GCN-HSA-NEXT: s_add_u32 s10, s2, 0x60 -; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] -; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[4:5] ; GCN-HSA-NEXT: s_addc_u32 s11, s3, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 0x70 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GCN-HSA-NEXT: flat_load_dwordx4 v[24:27], v[0:1] +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GCN-HSA-NEXT: flat_load_dwordx4 v[28:31], v[4:5] +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s11 +; GCN-HSA-NEXT: flat_load_dwordx4 v[20:23], v[0:1] +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 -; GCN-HSA-NEXT: flat_load_dwordx4 v[28:31], v[12:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s7 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s4 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s6 -; GCN-HSA-NEXT: flat_load_dwordx4 v[16:19], v[12:13] -; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[14:15] +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9 +; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v37, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v36, s0 ; GCN-HSA-NEXT: s_waitcnt vmcnt(7) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v35, 16, v25 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; GCN-HSA-NEXT: v_and_b32_e32 v34, 0xffff, v25 -; GCN-HSA-NEXT: v_and_b32_e32 v32, 0xffff, v24 -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v24, s2 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v35, 16, v13 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v33, 16, v12 +; GCN-HSA-NEXT: v_and_b32_e32 v34, 0xffff, v13 +; GCN-HSA-NEXT: v_and_b32_e32 v32, 0xffff, v12 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[32:35] +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0xf0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[36:37], v[32:35] -; GCN-HSA-NEXT: v_mov_b32_e32 v37, s3 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v36, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xd0 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xc0 ; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 -; GCN-HSA-NEXT: s_add_u32 s8, s0, 0xa0 +; GCN-HSA-NEXT: s_add_u32 s8, s0, 0xd0 ; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0 -; GCN-HSA-NEXT: s_add_u32 s10, s0, 0xb0 +; GCN-HSA-NEXT: s_add_u32 s10, s0, 0xa0 ; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0 -; GCN-HSA-NEXT: s_add_u32 s12, s0, 0x80 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v35, 16, v27 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v33, 16, v26 -; GCN-HSA-NEXT: v_and_b32_e32 v34, 0xffff, v27 -; GCN-HSA-NEXT: v_and_b32_e32 v32, 0xffff, v26 +; GCN-HSA-NEXT: s_add_u32 s12, s0, 0xb0 ; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[32:35] +; GCN-HSA-NEXT: s_add_u32 s14, s0, 0x80 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v35, 16, v15 +; GCN-HSA-NEXT: v_and_b32_e32 v34, 0xffff, v15 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v33, 16, v14 +; GCN-HSA-NEXT: v_and_b32_e32 v32, 0xffff, v14 +; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[32:35] ; GCN-HSA-NEXT: s_waitcnt vmcnt(7) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v27, 16, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v33, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v32, s12 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v25, 16, v0 -; GCN-HSA-NEXT: v_and_b32_e32 v26, 0xffff, v1 -; GCN-HSA-NEXT: v_and_b32_e32 v24, 0xffff, v0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[24:27] -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 16, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v32, s14 +; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xffff, v9 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v8 +; GCN-HSA-NEXT: v_and_b32_e32 v12, 0xffff, v8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[12:15] +; GCN-HSA-NEXT: v_mov_b32_e32 v33, s11 +; GCN-HSA-NEXT: v_mov_b32_e32 v32, s10 ; GCN-HSA-NEXT: s_waitcnt vmcnt(7) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v27, 16, v9 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v25, 16, v8 -; GCN-HSA-NEXT: v_and_b32_e32 v26, 0xffff, v9 -; GCN-HSA-NEXT: v_and_b32_e32 v24, 0xffff, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s10 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[24:27] -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s11 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v27, 16, v11 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v25, 16, v10 -; GCN-HSA-NEXT: v_and_b32_e32 v26, 0xffff, v11 -; GCN-HSA-NEXT: v_and_b32_e32 v24, 0xffff, v10 -; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[24:27] -; GCN-HSA-NEXT: s_waitcnt vmcnt(8) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v5 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v4 -; GCN-HSA-NEXT: v_and_b32_e32 v10, 0xffff, v5 -; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xffff, v4 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v33, s7 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v27, 16, v7 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v25, 16, v6 -; GCN-HSA-NEXT: v_and_b32_e32 v26, 0xffff, v7 -; GCN-HSA-NEXT: v_and_b32_e32 v24, 0xffff, v6 -; GCN-HSA-NEXT: v_mov_b32_e32 v32, s6 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[8:11] -; GCN-HSA-NEXT: s_waitcnt vmcnt(8) -; GCN-HSA-NEXT: v_and_b32_e32 v7, 0xffff, v28 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v10, 16, v29 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v8, 16, v28 -; GCN-HSA-NEXT: v_and_b32_e32 v9, 0xffff, v29 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 16, v25 +; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xffff, v25 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v24 +; GCN-HSA-NEXT: v_and_b32_e32 v12, 0xffff, v24 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s13 +; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[12:15] +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s12 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 16, v27 +; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xffff, v27 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v26 +; GCN-HSA-NEXT: v_and_b32_e32 v12, 0xffff, v26 +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s9 +; GCN-HSA-NEXT: s_waitcnt vmcnt(7) +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 16, v21 +; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xffff, v21 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v20 +; GCN-HSA-NEXT: v_and_b32_e32 v12, 0xffff, v20 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[12:15] +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v25, 16, v23 +; GCN-HSA-NEXT: v_and_b32_e32 v24, 0xffff, v23 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v23, 16, v22 +; GCN-HSA-NEXT: v_and_b32_e32 v22, 0xffff, v22 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90 -; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[24:27] +; GCN-HSA-NEXT: v_mov_b32_e32 v33, s5 +; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[22:25] +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v21, 16, v28 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v23, 16, v29 +; GCN-HSA-NEXT: v_and_b32_e32 v22, 0xffff, v29 +; GCN-HSA-NEXT: v_and_b32_e32 v20, 0xffff, v28 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v32, s4 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v27, 16, v31 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v25, 16, v30 ; GCN-HSA-NEXT: v_and_b32_e32 v26, 0xffff, v31 ; GCN-HSA-NEXT: v_and_b32_e32 v24, 0xffff, v30 -; GCN-HSA-NEXT: flat_store_dwordx4 v[36:37], v[7:10] -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[24:27] -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 +; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[20:23] +; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[24:27] +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 16, v3 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v2 -; GCN-HSA-NEXT: v_and_b32_e32 v5, 0xffff, v3 -; GCN-HSA-NEXT: v_and_b32_e32 v3, 0xffff, v2 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[3:6] -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v20 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v26, 16, v11 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v24, 16, v10 +; GCN-HSA-NEXT: v_and_b32_e32 v25, 0xffff, v11 +; GCN-HSA-NEXT: v_and_b32_e32 v23, 0xffff, v10 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[23:26] ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v21 -; GCN-HSA-NEXT: v_and_b32_e32 v2, 0xffff, v21 -; GCN-HSA-NEXT: v_and_b32_e32 v0, 0xffff, v20 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v24, 16, v16 +; GCN-HSA-NEXT: v_and_b32_e32 v23, 0xffff, v16 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v23 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v22 -; GCN-HSA-NEXT: v_and_b32_e32 v6, 0xffff, v23 -; GCN-HSA-NEXT: v_and_b32_e32 v4, 0xffff, v22 +; GCN-HSA-NEXT: s_waitcnt vmcnt(10) +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v22, 16, v1 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v20, 16, v0 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v26, 16, v17 +; GCN-HSA-NEXT: v_and_b32_e32 v25, 0xffff, v17 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v30, 16, v19 +; GCN-HSA-NEXT: v_and_b32_e32 v29, 0xffff, v19 +; GCN-HSA-NEXT: v_and_b32_e32 v21, 0xffff, v1 +; GCN-HSA-NEXT: v_and_b32_e32 v19, 0xffff, v0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: s_waitcnt vmcnt(12) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v18 -; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7] -; GCN-HSA-NEXT: s_waitcnt vmcnt(12) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v15 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v17 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v16 -; GCN-HSA-NEXT: v_and_b32_e32 v0, 0xffff, v18 -; GCN-HSA-NEXT: v_and_b32_e32 v6, 0xffff, v17 -; GCN-HSA-NEXT: v_and_b32_e32 v4, 0xffff, v16 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v18, 16, v13 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 16, v12 -; GCN-HSA-NEXT: v_and_b32_e32 v10, 0xffff, v15 -; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xffff, v13 -; GCN-HSA-NEXT: v_and_b32_e32 v15, 0xffff, v12 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[23:26] +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v26, 16, v5 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v24, 16, v4 +; GCN-HSA-NEXT: v_and_b32_e32 v25, 0xffff, v5 +; GCN-HSA-NEXT: v_and_b32_e32 v23, 0xffff, v4 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[23:26] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[15:18] -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v10, 16, v7 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v8, 16, v6 +; GCN-HSA-NEXT: v_and_b32_e32 v9, 0xffff, v7 +; GCN-HSA-NEXT: v_and_b32_e32 v7, 0xffff, v6 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v14 -; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xffff, v14 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[7:10] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 48 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[19:22] ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7] -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v19 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 -; GCN-HSA-NEXT: v_and_b32_e32 v2, 0xffff, v19 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v14, 16, v3 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 16, v2 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v28, 16, v18 +; GCN-HSA-NEXT: v_and_b32_e32 v27, 0xffff, v18 +; GCN-HSA-NEXT: v_and_b32_e32 v13, 0xffff, v3 +; GCN-HSA-NEXT: v_and_b32_e32 v11, 0xffff, v2 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[27:30] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[11:14] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_zextload_v64i16_to_v64i32: ; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s90, -1 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s91, 0xe80000 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s3, 0xf000 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-VI-NEXT: s_add_u32 s88, s88, s11 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s10, s2 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, s3 ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-VI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, s3 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:16 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[27:30], off, s[8:11], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[31:34], off, s[8:11], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[35:38], off, s[8:11], 0 offset:96 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[39:42], off, s[8:11], 0 offset:112 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s89, s89, 0 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[20:23], off, s[8:11], 0 offset:112 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[24:27], off, s[8:11], 0 offset:96 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[28:31], off, s[8:11], 0 offset:80 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:64 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:16 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(6) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v35, 16, v21 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v34, 0xffff, v21 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v32, 0xffff, v20 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:224 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(6) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v21, 16, v24 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v35, 16, v23 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v34, 0xffff, v23 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v32, 0xffff, v22 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v23, 16, v25 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v22, 0xffff, v25 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xffff, v24 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:240 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:192 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v35, 16, v27 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v34, 0xffff, v27 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v32, 0xffff, v26 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(7) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v18, 16, v15 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v16, 16, v14 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v17, 0xffff, v15 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v15, 0xffff, v14 -; GCN-NOHSA-VI-NEXT: buffer_store_dword v15, off, s[88:91], 0 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v16, off, s[88:91], 0 offset:4 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v17, off, s[88:91], 0 offset:8 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v18, off, s[88:91], 0 offset:12 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v21, 16, v13 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v19, 16, v12 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xffff, v13 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v18, 0xffff, v12 -; GCN-NOHSA-VI-NEXT: buffer_store_dword v18, off, s[88:91], 0 offset:16 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v19, off, s[88:91], 0 offset:20 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v20, off, s[88:91], 0 offset:24 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v21, off, s[88:91], 0 offset:28 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(14) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v26, 16, v11 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v24, 16, v10 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v19, 16, v9 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v17, 16, v8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v25, 0xffff, v11 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v23, 0xffff, v10 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v18, 0xffff, v9 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v16, 0xffff, v8 -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(12) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v11, 16, v3 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v9, 16, v2 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v50, 16, v1 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v48, 16, v0 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v10, 0xffff, v3 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v8, 0xffff, v2 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v49, 0xffff, v1 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v47, 0xffff, v0 -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(8) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v3, 16, v40 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v1, 16, v39 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v2, 0xffff, v40 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v0, 0xffff, v39 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v15, 16, v7 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v13, 16, v6 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v46, 16, v5 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v44, 16, v4 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v14, 0xffff, v7 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v12, 0xffff, v6 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v45, 0xffff, v5 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v43, 0xffff, v4 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v54, 16, v30 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v52, 16, v29 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v58, 16, v28 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v56, 16, v27 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v53, 0xffff, v30 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v51, 0xffff, v29 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v57, 0xffff, v28 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v55, 0xffff, v27 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v30, 16, v34 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v28, 16, v33 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v62, 16, v32 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v60, 16, v31 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v29, 0xffff, v34 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v27, 0xffff, v33 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v61, 0xffff, v32 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v59, 0xffff, v31 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v34, 16, v38 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v32, 16, v37 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v7, 16, v36 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v5, 16, v35 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v33, 0xffff, v38 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v31, 0xffff, v37 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v6, 0xffff, v36 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v4, 0xffff, v35 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v38, 16, v42 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v36, 16, v41 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v37, 0xffff, v42 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v35, 0xffff, v41 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:240 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:192 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:208 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[59:62], off, s[0:3], 0 offset:160 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:176 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[55:58], off, s[0:3], 0 offset:128 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[51:54], off, s[0:3], 0 offset:144 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[47:50], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v23, 16, v29 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v22, 0xffff, v29 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v21, 16, v28 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xffff, v28 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v27, 16, v31 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v26, 0xffff, v31 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v25, 16, v30 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v24, 0xffff, v30 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:208 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(7) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v31, 16, v17 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v30, 0xffff, v17 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v28, 0xffff, v16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v38, 16, v19 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:160 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v36, 16, v18 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v37, 0xffff, v19 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v35, 0xffff, v18 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(6) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v20, 16, v12 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v21, 0xffff, v13 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v19, 0xffff, v12 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v40, 16, v14 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v39, 0xffff, v14 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v14, 16, v11 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v12, 16, v10 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v13, 0xffff, v11 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v11, 0xffff, v10 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v34, 16, v7 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v32, 16, v6 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v18, 16, v5 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:176 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v16, 16, v4 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(6) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v26, 16, v3 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v42, 16, v15 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:128 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v41, 0xffff, v15 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v24, 16, v2 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v46, 16, v9 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:144 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v44, 16, v8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v45, 0xffff, v9 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v43, 0xffff, v8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v28, 16, v0 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v33, 0xffff, v7 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v31, 0xffff, v6 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v17, 0xffff, v5 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v15, 0xffff, v4 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v25, 0xffff, v3 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v23, 0xffff, v2 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 offset:112 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[43:46], off, s[0:3], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v29, 0xffff, v1 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v27, 0xffff, v0 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:32 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_load_dword v0, off, s[88:91], 0 offset:16 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:20 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v2, off, s[88:91], 0 offset:24 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v3, off, s[88:91], 0 offset:28 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dword v0, off, s[88:91], 0 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v2, off, s[88:91], 0 offset:8 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v3, off, s[88:91], 0 offset:12 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:16 ; GCN-NOHSA-VI-NEXT: s_endpgm ; ; EG-LABEL: global_zextload_v64i16_to_v64i32: @@ -4207,136 +4163,117 @@ define amdgpu_kernel void @global_sextload_v64i16_to_v64i32(ptr addrspace(1) %ou ; GCN-NOHSA-SI-LABEL: global_sextload_v64i16_to_v64i32: ; GCN-NOHSA-SI: ; %bb.0: ; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s12, SCRATCH_RSRC_DWORD0 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s13, SCRATCH_RSRC_DWORD1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s14, -1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s15, 0xe8f000 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-SI-NEXT: s_add_u32 s12, s12, s11 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s10, s2 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s3 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-SI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s3 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:16 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[23:26], off, s[8:11], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[27:30], off, s[8:11], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[31:34], off, s[8:11], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[35:38], off, s[8:11], 0 offset:112 -; GCN-NOHSA-SI-NEXT: s_addc_u32 s13, s13, 0 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[24:27], off, s[8:11], 0 offset:112 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[28:31], off, s[8:11], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[20:23], off, s[8:11], 0 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:32 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(7) -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v18, 16, v15 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v16, 16, v14 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v17, v15, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v15, v14, 0, 16 -; GCN-NOHSA-SI-NEXT: buffer_store_dword v15, off, s[12:15], 0 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v16, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v17, off, s[12:15], 0 offset:8 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v18, off, s[12:15], 0 offset:12 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(2) -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v16, 16, v13 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v14, 16, v12 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v15, v13, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v13, v12, 0, 16 -; GCN-NOHSA-SI-NEXT: buffer_store_dword v13, off, s[12:15], 0 offset:16 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v14, off, s[12:15], 0 offset:20 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v15, off, s[12:15], 0 offset:24 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v16, off, s[12:15], 0 offset:28 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(14) -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v19, 16, v11 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(5) -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v17, 16, v10 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(4) -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v18, v11, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v35, 16, v25 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v33, 16, v24 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v34, v25, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v32, v24, 0, 16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:224 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v35, 16, v27 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v34, v27, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v33, 16, v26 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v32, v26, 0, 16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:240 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(8) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v27, 16, v29 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v26, v29, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v25, 16, v28 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v24, v28, 0, 16 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v33, 16, v31 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v32, v31, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v31, 16, v30 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v30, v30, 0, 16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:192 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(8) expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v27, 16, v13 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v26, v13, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v25, 16, v12 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v24, v12, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v37, 16, v15 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v36, v15, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v35, 16, v14 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v34, v14, 0, 16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[30:33], off, s[0:3], 0 offset:208 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(8) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v15, 16, v1 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v14, v1, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v13, 16, v0 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v12, v0, 0, 16 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v32, 16, v3 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v30, 16, v2 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v31, v3, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v29, v2, 0, 16 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(6) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v38, 16, v17 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[34:37], off, s[0:3], 0 offset:176 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v36, 16, v16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v37, v17, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v35, v16, 0, 16 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(6) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v16, 16, v7 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:128 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v14, 16, v6 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v15, v7, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v13, v6, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v33, 16, v5 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[29:32], off, s[0:3], 0 offset:144 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v31, 16, v4 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v32, v5, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v30, v4, 0, 16 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(7) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v7, 16, v11 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v5, 16, v10 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v6, v11, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v4, v10, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v28, 16, v23 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:160 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v16, v10, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v26, 16, v22 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v27, v23, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v25, v22, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v3, 16, v21 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v1, 16, v20 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v2, v21, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v0, v20, 0, 16 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v22, 16, v19 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v20, 16, v18 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v19, 0, 16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v19, v18, 0, 16 ; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v42, 16, v9 ; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v40, 16, v8 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v41, v9, 0, 16 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v39, v8, 0, 16 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(12) -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v11, 16, v3 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v9, 16, v2 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v10, v3, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v8, v2, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v50, 16, v1 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v48, 16, v0 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v49, v1, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v47, v0, 0, 16 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(8) -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v3, 16, v36 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v1, 16, v35 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v2, v36, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v0, v35, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v15, 16, v7 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v13, 16, v6 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v14, v7, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v12, v6, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v46, 16, v5 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v44, 16, v4 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v45, v5, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v43, v4, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v54, 16, v26 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v52, 16, v25 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v53, v26, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v51, v25, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v58, 16, v24 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v56, 16, v23 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v57, v24, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v55, v23, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v26, 16, v30 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v24, 16, v29 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v25, v30, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v23, v29, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v62, 16, v28 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v60, 16, v27 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v61, v28, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v59, v27, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v30, 16, v34 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v28, 16, v33 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v29, v34, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v27, v33, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v7, 16, v32 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v5, 16, v31 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v6, v32, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v4, v31, 0, 16 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v34, 16, v38 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v32, 16, v37 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v33, v38, 0, 16 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v31, v37, 0, 16 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:240 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:192 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:208 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[59:62], off, s[0:3], 0 offset:160 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:176 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[55:58], off, s[0:3], 0 offset:128 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[51:54], off, s[0:3], 0 offset:144 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[47:50], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[43:46], off, s[0:3], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_load_dword v0, off, s[12:15], 0 offset:16 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:20 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v2, off, s[12:15], 0 offset:24 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v3, off, s[12:15], 0 offset:28 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[30:33], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:48 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: buffer_load_dword v0, off, s[12:15], 0 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: global_sextload_v64i16_to_v64i32: @@ -4353,34 +4290,34 @@ define amdgpu_kernel void @global_sextload_v64i16_to_v64i32(ptr addrspace(1) %ou ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 -; GCN-HSA-NEXT: flat_load_dwordx4 v[20:23], v[0:1] ; GCN-HSA-NEXT: s_add_u32 s4, s2, 0x60 +; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 0x50 -; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 64 -; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1] -; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 -; GCN-HSA-NEXT: s_add_u32 s4, s2, 48 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 -; GCN-HSA-NEXT: s_add_u32 s6, s2, 32 +; GCN-HSA-NEXT: s_add_u32 s6, s2, 48 ; GCN-HSA-NEXT: s_addc_u32 s7, s3, 0 +; GCN-HSA-NEXT: s_add_u32 s8, s2, 32 +; GCN-HSA-NEXT: s_addc_u32 s9, s3, 0 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 -; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 -; GCN-HSA-NEXT: flat_load_dwordx4 v[24:27], v[8:9] -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s4 -; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9] +; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1] +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 +; GCN-HSA-NEXT: flat_load_dwordx4 v[24:27], v[16:17] +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s5 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s4 +; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[20:23], v[16:17] ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s6 ; GCN-HSA-NEXT: flat_load_dwordx4 v[16:19], v[16:17] @@ -4398,271 +4335,251 @@ define amdgpu_kernel void @global_sextload_v64i16_to_v64i32(ptr addrspace(1) %ou ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[36:37], v[32:35] -; GCN-HSA-NEXT: v_mov_b32_e32 v36, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v35, s2 +; GCN-HSA-NEXT: s_nop 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v34, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xf0 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v34, 16, v31 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v32, 16, v30 -; GCN-HSA-NEXT: v_bfe_i32 v33, v31, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v31, v30, 0, 16 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[31:34] +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v33, 16, v31 +; GCN-HSA-NEXT: v_bfe_i32 v32, v31, 0, 16 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v31, 16, v30 +; GCN-HSA-NEXT: v_bfe_i32 v30, v30, 0, 16 +; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[30:33] ; GCN-HSA-NEXT: s_waitcnt vmcnt(8) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v29, 16, v20 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v29, 16, v12 ; GCN-HSA-NEXT: v_mov_b32_e32 v33, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v32, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v31, 16, v21 -; GCN-HSA-NEXT: v_bfe_i32 v30, v21, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v28, v20, 0, 16 -; GCN-HSA-NEXT: flat_store_dwordx4 v[35:36], v[28:31] -; GCN-HSA-NEXT: v_mov_b32_e32 v35, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v34, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xd0 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v37, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v36, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v31, 16, v23 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v29, 16, v22 -; GCN-HSA-NEXT: v_bfe_i32 v30, v23, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v28, v22, 0, 16 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xd0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[28:31] -; GCN-HSA-NEXT: v_mov_b32_e32 v33, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v32, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xb0 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v31, 16, v13 +; GCN-HSA-NEXT: v_bfe_i32 v30, v13, 0, 16 +; GCN-HSA-NEXT: v_bfe_i32 v28, v12, 0, 16 +; GCN-HSA-NEXT: flat_store_dwordx4 v[34:35], v[28:31] +; GCN-HSA-NEXT: v_mov_b32_e32 v35, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v34, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v39, s3 -; GCN-HSA-NEXT: s_waitcnt vmcnt(9) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v23, 16, v13 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v21, 16, v12 -; GCN-HSA-NEXT: v_bfe_i32 v22, v13, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v20, v12, 0, 16 ; GCN-HSA-NEXT: v_mov_b32_e32 v38, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xb0 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v31, 16, v15 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v29, 16, v14 ; GCN-HSA-NEXT: v_bfe_i32 v30, v15, 0, 16 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v29, 16, v14 ; GCN-HSA-NEXT: v_bfe_i32 v28, v14, 0, 16 -; GCN-HSA-NEXT: flat_store_dwordx4 v[34:35], v[20:23] -; GCN-HSA-NEXT: flat_store_dwordx4 v[36:37], v[28:31] -; GCN-HSA-NEXT: s_waitcnt vmcnt(10) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v5 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v4 -; GCN-HSA-NEXT: v_bfe_i32 v14, v5, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v12, v4, 0, 16 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v23, 16, v7 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v21, 16, v6 -; GCN-HSA-NEXT: v_bfe_i32 v22, v7, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v20, v6, 0, 16 +; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[28:31] +; GCN-HSA-NEXT: v_mov_b32_e32 v33, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v32, s2 ; GCN-HSA-NEXT: s_waitcnt vmcnt(9) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v1 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v0 -; GCN-HSA-NEXT: v_bfe_i32 v6, v1, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v4, v0, 0, 16 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v9 +; GCN-HSA-NEXT: v_bfe_i32 v14, v9, 0, 16 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v8 +; GCN-HSA-NEXT: v_bfe_i32 v12, v8, 0, 16 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v31, 16, v11 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v29, 16, v10 +; GCN-HSA-NEXT: v_bfe_i32 v30, v11, 0, 16 +; GCN-HSA-NEXT: v_bfe_i32 v28, v10, 0, 16 +; GCN-HSA-NEXT: flat_store_dwordx4 v[36:37], v[12:15] +; GCN-HSA-NEXT: flat_store_dwordx4 v[34:35], v[28:31] +; GCN-HSA-NEXT: s_waitcnt vmcnt(10) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 16, v5 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v4 +; GCN-HSA-NEXT: v_bfe_i32 v10, v5, 0, 16 +; GCN-HSA-NEXT: v_bfe_i32 v8, v4, 0, 16 +; GCN-HSA-NEXT: v_bfe_i32 v12, v6, 0, 16 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v7 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v6 +; GCN-HSA-NEXT: v_bfe_i32 v14, v7, 0, 16 +; GCN-HSA-NEXT: flat_store_dwordx4 v[38:39], v[8:11] +; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[12:15] +; GCN-HSA-NEXT: s_waitcnt vmcnt(11) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v10, 16, v27 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v8, 16, v26 +; GCN-HSA-NEXT: v_bfe_i32 v9, v27, 0, 16 +; GCN-HSA-NEXT: v_bfe_i32 v7, v26, 0, 16 +; GCN-HSA-NEXT: s_waitcnt vmcnt(9) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v29, 16, v21 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v27, 16, v20 +; GCN-HSA-NEXT: v_bfe_i32 v28, v21, 0, 16 +; GCN-HSA-NEXT: v_bfe_i32 v26, v20, 0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v14, 16, v25 +; GCN-HSA-NEXT: flat_store_dwordx4 v[11:12], v[26:29] +; GCN-HSA-NEXT: v_bfe_i32 v13, v25, 0, 16 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v28, 16, v23 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v26, 16, v22 +; GCN-HSA-NEXT: v_bfe_i32 v27, v23, 0, 16 +; GCN-HSA-NEXT: v_bfe_i32 v25, v22, 0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 -; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[12:15] -; GCN-HSA-NEXT: flat_store_dwordx4 v[38:39], v[20:23] +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v12, 16, v24 +; GCN-HSA-NEXT: v_bfe_i32 v11, v24, 0, 16 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v24, 16, v1 +; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[25:28] +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v22, 16, v0 +; GCN-HSA-NEXT: v_bfe_i32 v23, v1, 0, 16 +; GCN-HSA-NEXT: v_bfe_i32 v21, v0, 0, 16 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v23, 16, v3 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v21, 16, v2 -; GCN-HSA-NEXT: v_bfe_i32 v22, v3, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v20, v2, 0, 16 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[20:23] -; GCN-HSA-NEXT: s_waitcnt vmcnt(11) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v9 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v8 -; GCN-HSA-NEXT: v_bfe_i32 v2, v9, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v0, v8, 0, 16 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: s_waitcnt vmcnt(10) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v32, 16, v17 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v30, 16, v16 +; GCN-HSA-NEXT: v_bfe_i32 v31, v17, 0, 16 +; GCN-HSA-NEXT: v_bfe_i32 v29, v16, 0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[29:32] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v28, 16, v19 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v26, 16, v18 +; GCN-HSA-NEXT: v_bfe_i32 v27, v19, 0, 16 +; GCN-HSA-NEXT: v_bfe_i32 v25, v18, 0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v24 -; GCN-HSA-NEXT: v_bfe_i32 v12, v24, 0, 16 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v24, 16, v11 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v22, 16, v10 -; GCN-HSA-NEXT: v_bfe_i32 v23, v11, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v21, v10, 0, 16 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[25:28] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[21:24] -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 -; GCN-HSA-NEXT: s_waitcnt vmcnt(12) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v19 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v18 -; GCN-HSA-NEXT: v_bfe_i32 v2, v19, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v0, v18, 0, 16 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v20, 16, v17 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v18, 16, v16 -; GCN-HSA-NEXT: v_bfe_i32 v19, v17, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v17, v16, 0, 16 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[21:24] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[17:20] -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v6, 16, v3 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 16, v2 +; GCN-HSA-NEXT: v_bfe_i32 v5, v3, 0, 16 +; GCN-HSA-NEXT: v_bfe_i32 v3, v2, 0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 -; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[3:6] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v25 -; GCN-HSA-NEXT: v_bfe_i32 v14, v25, 0, 16 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 48 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[11:14] ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v27 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v26 -; GCN-HSA-NEXT: v_bfe_i32 v6, v27, 0, 16 -; GCN-HSA-NEXT: v_bfe_i32 v4, v26, 0, 16 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[7:10] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_sextload_v64i16_to_v64i32: ; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s90, -1 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s91, 0xe80000 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s3, 0xf000 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-VI-NEXT: s_add_u32 s88, s88, s11 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s10, s2 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, s3 ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-VI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, s3 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:16 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[23:26], off, s[8:11], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[27:30], off, s[8:11], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[31:34], off, s[8:11], 0 offset:96 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[35:38], off, s[8:11], 0 offset:112 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s89, s89, 0 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[24:27], off, s[8:11], 0 offset:112 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[28:31], off, s[8:11], 0 offset:96 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:80 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:64 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[20:23], off, s[8:11], 0 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:32 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(7) -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v18, 16, v15 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v16, 16, v14 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v17, v15, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v15, v14, 0, 16 -; GCN-NOHSA-VI-NEXT: buffer_store_dword v15, off, s[88:91], 0 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v16, off, s[88:91], 0 offset:4 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v17, off, s[88:91], 0 offset:8 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v18, off, s[88:91], 0 offset:12 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v16, 16, v13 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v14, 16, v12 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v15, v13, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v13, v12, 0, 16 -; GCN-NOHSA-VI-NEXT: buffer_store_dword v13, off, s[88:91], 0 offset:16 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v14, off, s[88:91], 0 offset:20 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v15, off, s[88:91], 0 offset:24 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v16, off, s[88:91], 0 offset:28 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(14) -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v19, 16, v11 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v17, 16, v10 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v18, v11, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v16, v10, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v35, 16, v25 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v33, 16, v24 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v34, v25, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v32, v24, 0, 16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:224 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(7) +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v25, 16, v28 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v35, 16, v27 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v34, v27, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v33, 16, v26 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v32, v26, 0, 16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:240 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v27, 16, v29 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v26, v29, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v24, v28, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v33, 16, v31 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v32, v31, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v31, 16, v30 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v30, v30, 0, 16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:192 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(8) +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v37, 16, v15 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v27, 16, v13 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v26, v13, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v25, 16, v12 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v24, v12, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v36, v15, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v35, 16, v14 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v34, v14, 0, 16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[30:33], off, s[0:3], 0 offset:208 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(8) +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v15, 16, v1 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v14, v1, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v13, 16, v0 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v12, v0, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v32, 16, v3 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v30, 16, v2 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v31, v3, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v29, v2, 0, 16 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(6) +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v38, 16, v17 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[34:37], off, s[0:3], 0 offset:176 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:128 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v36, 16, v16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v37, v17, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v35, v16, 0, 16 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(7) +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v16, 16, v7 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v14, 16, v6 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v15, v7, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v13, v6, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v33, 16, v5 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[29:32], off, s[0:3], 0 offset:144 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(7) +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v7, 16, v11 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v31, 16, v4 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v32, v5, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v30, v4, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v5, 16, v10 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v6, v11, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v4, v10, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v28, 16, v23 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:160 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v3, 16, v21 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v26, 16, v22 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v27, v23, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v25, v22, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v1, 16, v20 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v2, v21, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v0, v20, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v22, 16, v19 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v20, 16, v18 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v19, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v19, v18, 0, 16 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v42, 16, v9 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v40, 16, v8 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v41, v9, 0, 16 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v39, v8, 0, 16 -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(12) -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v11, 16, v3 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v9, 16, v2 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v10, v3, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v8, v2, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v50, 16, v1 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v48, 16, v0 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v49, v1, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v47, v0, 0, 16 -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(8) -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v3, 16, v36 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v1, 16, v35 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v2, v36, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v0, v35, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v15, 16, v7 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v13, 16, v6 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v14, v7, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v12, v6, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v46, 16, v5 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v44, 16, v4 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v45, v5, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v43, v4, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v54, 16, v26 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v52, 16, v25 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v53, v26, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v51, v25, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v58, 16, v24 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v56, 16, v23 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v57, v24, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v55, v23, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v26, 16, v30 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v24, 16, v29 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v25, v30, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v23, v29, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v62, 16, v28 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v60, 16, v27 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v61, v28, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v59, v27, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v30, 16, v34 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v28, 16, v33 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v29, v34, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v27, v33, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v7, 16, v32 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v5, 16, v31 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v6, v32, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v4, v31, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v34, 16, v38 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v32, 16, v37 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v33, v38, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v31, v37, 0, 16 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:240 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:192 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:208 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[59:62], off, s[0:3], 0 offset:160 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:176 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[55:58], off, s[0:3], 0 offset:128 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[51:54], off, s[0:3], 0 offset:144 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[47:50], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[43:46], off, s[0:3], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_load_dword v0, off, s[88:91], 0 offset:16 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:20 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v2, off, s[88:91], 0 offset:24 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v3, off, s[88:91], 0 offset:28 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 offset:64 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[30:33], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:48 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dword v0, off, s[88:91], 0 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v2, off, s[88:91], 0 offset:8 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v3, off, s[88:91], 0 offset:12 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:16 ; GCN-NOHSA-VI-NEXT: s_endpgm ; ; EG-LABEL: global_sextload_v64i16_to_v64i32: @@ -6426,139 +6343,140 @@ define amdgpu_kernel void @global_zextload_v16i16_to_v16i64(ptr addrspace(1) %ou ; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7 ; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 ; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v29, 0 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v31, v29 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, 0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, v9 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v23, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v25, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v27, v29 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v24, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v26, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v28, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v30, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v32, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v34, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v36, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v38, v9 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v10, 16, v1 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v21, 16, v1 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v28, 0xffff, v5 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v14, 16, v3 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v18, 16, v4 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v22, 16, v2 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 16, v0 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v24, 0xffff, v0 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v20, 0xffff, v2 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v8, 0xffff, v1 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v12, 0xffff, v3 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v2, 16, v6 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v0, 0xffff, v6 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v16, 0xffff, v4 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v6, 16, v7 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v4, 0xffff, v7 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, v29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, v29 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v10, 16, v5 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v8, 0xffff, v5 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v13, 16, v7 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v11, 0xffff, v7 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v17, 16, v3 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v25, 16, v4 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v37, 16, v0 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v35, 0xffff, v0 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v31, 0xffff, v2 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v27, 0xffff, v6 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v23, 0xffff, v4 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v19, 0xffff, v1 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v15, 0xffff, v3 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: global_zextload_v16i16_to_v16i64: ; GCN-HSA: ; %bb.0: ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 ; GCN-HSA-NEXT: s_add_i32 s12, s12, s17 -; GCN-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 ; GCN-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, 0 +; GCN-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, 0 ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] +; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: s_add_u32 s4, s0, 16 -; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s4 -; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x50 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, v8 -; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v23, v8 +; GCN-HSA-NEXT: v_mov_b32_e32 v37, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v36, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, v9 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, v9 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, v9 ; GCN-HSA-NEXT: s_waitcnt vmcnt(1) +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v10, 16, v3 +; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xffff, v3 +; GCN-HSA-NEXT: flat_store_dwordx4 v[36:37], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v37, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v36, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v39, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v38, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v1 ; GCN-HSA-NEXT: v_and_b32_e32 v11, 0xffff, v1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[11:14] -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s4 -; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x70 -; GCN-HSA-NEXT: s_waitcnt vmcnt(1) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 16, v5 -; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xffff, v5 -; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[14:17] -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v7 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 -; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xffff, v7 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[17:20] -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v3 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[36:37], v[11:14] +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s3 -; GCN-HSA-NEXT: v_and_b32_e32 v7, 0xffff, v3 -; GCN-HSA-NEXT: v_mov_b32_e32 v24, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[7:10] -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s1 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s0 +; GCN-HSA-NEXT: s_waitcnt vmcnt(2) +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 16, v5 +; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xffff, v5 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 0x60 +; GCN-HSA-NEXT: flat_store_dwordx4 v[38:39], v[14:17] ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, v8 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 16, v4 -; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xffff, v4 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v27, s1 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 16, v2 -; GCN-HSA-NEXT: v_and_b32_e32 v10, 0xffff, v2 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, v8 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v8, 16, v6 -; GCN-HSA-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v26, s0 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v22, 16, v0 -; GCN-HSA-NEXT: v_and_b32_e32 v20, 0xffff, v0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[10:13] -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[20:23] -; GCN-HSA-NEXT: flat_store_dwordx4 v[3:4], v[14:17] -; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[6:9] +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v7 +; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xffff, v7 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v37, s1 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v22, 16, v2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[17:20] +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2 +; GCN-HSA-NEXT: v_and_b32_e32 v20, 0xffff, v2 +; GCN-HSA-NEXT: v_mov_b32_e32 v36, s0 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v26, 16, v0 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v30, 16, v4 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v34, 16, v6 +; GCN-HSA-NEXT: v_and_b32_e32 v32, 0xffff, v6 +; GCN-HSA-NEXT: v_and_b32_e32 v28, 0xffff, v4 +; GCN-HSA-NEXT: v_and_b32_e32 v24, 0xffff, v0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[20:23] +; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[24:27] +; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[28:31] +; GCN-HSA-NEXT: flat_store_dwordx4 v[36:37], v[32:35] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_zextload_v16i16_to_v16i64: @@ -6573,50 +6491,50 @@ define amdgpu_kernel void @global_zextload_v16i16_to_v16i64(ptr addrspace(1) %ou ; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s7 ; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 ; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v29, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v31, v29 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v9, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v11, v9 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v25, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v27, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v21, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v23, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v17, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v19, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v13, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v15, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v9, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v11, v29 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v12, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v14, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v16, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v18, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v20, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v22, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v24, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v26, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v28, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v30, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v32, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v34, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v36, v9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v38, v9 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v10, 16, v0 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v37, 16, v0 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v28, 0xffff, v5 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v8, 0xffff, v0 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v14, 16, v1 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v12, 0xffff, v1 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v18, 16, v2 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v16, 0xffff, v2 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v3 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v0, 0xffff, v3 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v22, 16, v6 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xffff, v6 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v26, 16, v7 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v24, 0xffff, v7 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v6, 16, v4 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v7, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, v29 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v10, 16, v5 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v8, 0xffff, v5 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v13, 16, v4 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v11, 0xffff, v4 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v35, 0xffff, v0 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v31, 0xffff, v1 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v29, 16, v2 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v27, 0xffff, v2 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v25, 16, v3 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v23, 0xffff, v3 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v21, 16, v6 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v19, 0xffff, v6 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v17, 16, v7 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v15, 0xffff, v7 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:64 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 ; GCN-NOHSA-VI-NEXT: s_endpgm ; ; EG-LABEL: global_zextload_v16i16_to_v16i64: @@ -6789,87 +6707,86 @@ define amdgpu_kernel void @global_sextload_v16i16_to_v16i64(ptr addrspace(1) %ou ; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7 ; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:16 ; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s9, v3 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s7, v1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s14, s9 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s6, v0 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s8, v2 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s10, v4 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s11, v5 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s12, v6 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s13, v7 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s16, s7 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s39, s9, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s40, s9, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x100000 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s18, s13 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s20, s11 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s8, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s6, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s12, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s10, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s23, s11, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s25, s11, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s27, s13, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s29, s13, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s7, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s38, s7, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x100000 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s5, v1 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s7, v3 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s4, v0 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s6, v2 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s8, v4 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s9, v5 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s10, v6 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s11, v7 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s12, s7 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s14, s5 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s16, s11 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s18, s9 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s6, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s4, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s10, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s8, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s21, s9, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s23, s9, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s25, s11, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s27, s11, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s5, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s38, s5, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s39, s7, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s40, s7, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[8:9], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[10:11], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[4:5], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[6:7], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[26:27], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[24:25], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[22:23], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[20:21], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x100000 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s40 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s39 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s14 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s15 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[10:11], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[12:13], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[6:7], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[8:9], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[28:29], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[26:27], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[24:25], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[22:23], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x100000 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s38 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s33 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s38 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s33 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s12 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s13 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s14 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s15 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s27 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s25 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s23 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s21 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s36 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s37 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, s34 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, s35 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v24, s30 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v25, s31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v28, s28 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v29, s29 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s17 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s18 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s19 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s10 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s11 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, s8 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v23, s9 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s17 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s27 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s25 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s23 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s36 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s37 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s34 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s35 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, s30 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v23, s31 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v26, s4 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v27, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s18 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s19 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s20 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s21 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s12 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s13 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, s10 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, s11 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v24, s8 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v25, s9 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v28, s6 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v29, s7 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:16 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[26:29], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v26, s6 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v27, s7 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v30, s4 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v31, s5 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: global_sextload_v16i16_to_v16i64: @@ -6946,55 +6863,55 @@ define amdgpu_kernel void @global_sextload_v16i16_to_v16i64(ptr addrspace(1) %ou ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s13 ; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15] -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s21 +; GCN-HSA-NEXT: v_mov_b32_e32 v28, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s10 -; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s19 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 +; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[0:3] +; GCN-HSA-NEXT: v_mov_b32_e32 v29, s3 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[4:7] +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s21 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s19 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s9 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[14:17] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[14:17] -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v21, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[18:21] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[18:21] -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[8:11] -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GCN-HSA-NEXT: s_add_u32 s0, s0, 64 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s24 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s25 ; GCN-HSA-NEXT: v_mov_b32_e32 v24, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v25, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 +; GCN-HSA-NEXT: s_add_u32 s0, s0, 64 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[22:25] ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[22:25] -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s22 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s23 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s22 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s23 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[26:29] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_sextload_v16i16_to_v16i64: @@ -7007,60 +6924,60 @@ define amdgpu_kernel void @global_sextload_v16i16_to_v16i64(ptr addrspace(1) %ou ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-VI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[1:4], off, s[8:11], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[5:8], off, s[8:11], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v0, v1, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v10, 16, v1 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v10, 16, v0 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v1, 16, v6 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v13, v3, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v12, 16, v3 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v3, v1, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v1, v6, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v9, v2, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v11, 16, v2 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v17, v4, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v14, 16, v4 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v2, 31, v1 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v4, 31, v3 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[1:4], off, s[0:3], 0 offset:80 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v25, v5, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v1, 16, v7 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v6, v1, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v1, 16, v5 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v3, 16, v8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v27, v1, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v4, v7, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v2, v10, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v11, v11, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v15, v12, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v19, v14, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v23, v3, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v8, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v26, 31, v25 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v28, 31, v27 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v18, 31, v17 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v6, 0, 16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v6, 16, v6 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v15, 16, v4 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v19, 16, v5 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v11, 16, v1 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v14, 16, v2 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v16, v3, 0, 16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v24, v7, 0, 16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v28, v4, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v4, v5, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v6, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v30, v15, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v6, v19, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v8, v0, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v0, v1, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v12, v2, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v10, v10, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v2, v11, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v14, v14, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v18, v3, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v26, v7, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v29, 31, v28 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v22, 31, v21 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v20, 31, v19 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v7, 31, v6 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v24, 31, v23 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[21:24], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[17:20], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[9:12], off, s[0:3], 0 offset:16 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v31, 31, v30 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v9, 31, v8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v1, 31, v0 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v13, 31, v12 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v21, 31, v20 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v25, 31, v24 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v11, 31, v10 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v3, 31, v2 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v15, 31, v14 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v19, 31, v18 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 31, v22 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v27, 31, v26 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:64 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 ; GCN-NOHSA-VI-NEXT: s_endpgm ; ; EG-LABEL: global_sextload_v16i16_to_v16i64: @@ -7234,102 +7151,99 @@ define amdgpu_kernel void @global_zextload_v32i16_to_v32i64(ptr addrspace(1) %ou ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-SI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[27:30], off, s[8:11], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[31:34], off, s[8:11], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[10:13], off, s[8:11], 0 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[14:17], off, s[8:11], 0 offset:16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v54, 0 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, 0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, v16 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v50, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v52, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v43, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v45, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v25, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v47, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v56, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v40, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v36, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v38, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, v54 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v23, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v25, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v26, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v28, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v29, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v31, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v32, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v34, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v35, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v37, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v38, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v40, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v46, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v48, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v42, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v44, v16 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(3) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v37, 16, v27 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v35, 0xffff, v27 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v41, 16, v29 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v39, 0xffff, v29 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v29, 16, v28 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v27, 0xffff, v28 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v44, 16, v30 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v42, 0xffff, v30 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(2) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v51, 16, v33 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v49, 0xffff, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v28, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v30, v54 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v6, 16, v10 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v4, 0xffff, v10 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v10, 0xffff, v14 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 16, v17 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v24, 0xffff, v17 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v48, 16, v31 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v46, 0xffff, v31 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:144 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v21, 16, v1 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v19, 0xffff, v1 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:208 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(3) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v24, 16, v7 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v27, v54 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[49:52], off, s[0:3], 0 offset:224 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v22, 0xffff, v7 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:176 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v27, 16, v5 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v49, v54 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v20, 16, v11 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v23, 16, v13 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v2, 16, v16 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v9, 16, v12 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v7, 0xffff, v12 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v18, 0xffff, v11 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v21, 0xffff, v13 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v12, 16, v14 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v0, 0xffff, v16 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v55, 16, v34 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v53, 0xffff, v34 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[42:45], off, s[0:3], 0 offset:176 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v25, 0xffff, v5 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:144 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(4) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 16, v11 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v24, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v42, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, v54 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[46:49], off, s[0:3], 0 offset:192 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[53:56], off, s[0:3], 0 offset:240 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 offset:160 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:128 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v28, 0xffff, v11 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v33, 16, v9 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, v54 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v14, 0xffff, v15 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v33, 16, v32 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v31, 0xffff, v32 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v32, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v34, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, v54 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[21:24], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v31, 0xffff, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, v16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(5) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v36, 16, v15 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, v54 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v34, 0xffff, v15 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v21, 16, v13 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v19, 0xffff, v13 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v25, v16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[34:37], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v17, 16, v3 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v24, 16, v2 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v39, 16, v0 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, v54 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:208 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:16 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v22, 0xffff, v2 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v47, 16, v14 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v15, 0xffff, v3 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v3, 16, v12 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v1, 0xffff, v12 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v45, 0xffff, v14 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v29, 0xffff, v4 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v37, 0xffff, v0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v28, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v30, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v34, v16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v36, v16 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v27, 16, v6 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:224 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v43, 16, v10 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v35, 16, v8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:240 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v33, 0xffff, v8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v41, 0xffff, v10 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(1) +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v25, 0xffff, v6 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[37:40], off, s[0:3], 0 offset:192 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:160 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[29:32], off, s[0:3], 0 offset:128 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[41:44], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[33:36], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[45:48], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[1:4], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: global_zextload_v32i16_to_v32i64: @@ -7343,20 +7257,20 @@ define amdgpu_kernel void @global_zextload_v32i16_to_v32i64(ptr addrspace(1) %ou ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 -; GCN-HSA-NEXT: flat_load_dwordx4 v[2:5], v[0:1] ; GCN-HSA-NEXT: s_add_u32 s4, s2, 32 +; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 -; GCN-HSA-NEXT: flat_load_dwordx4 v[6:9], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[0:1] ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 48 -; GCN-HSA-NEXT: flat_load_dwordx4 v[10:13], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCN-HSA-NEXT: flat_load_dwordx4 v[14:17], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[16:19], v[0:1] ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 16 @@ -7371,123 +7285,133 @@ define amdgpu_kernel void @global_zextload_v32i16_to_v32i64(ptr addrspace(1) %ou ; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0 ; GCN-HSA-NEXT: s_add_u32 s14, s0, 0x70 ; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s14 -; GCN-HSA-NEXT: s_add_u32 s14, s0, 0x50 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v32, s14 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, s11 +; GCN-HSA-NEXT: v_mov_b32_e32 v34, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v38, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v21, v1 -; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v37, s4 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v24, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v40, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v42, v1 ; GCN-HSA-NEXT: s_waitcnt vmcnt(3) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v20, 16, v5 -; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v5 -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[18:21] -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s15 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s14 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v20, 16, v3 -; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v3 -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[18:21] -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s11 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s10 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v30, 16, v7 +; GCN-HSA-NEXT: v_and_b32_e32 v28, 0xffff, v7 +; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[28:31] +; GCN-HSA-NEXT: v_mov_b32_e32 v33, v1 +; GCN-HSA-NEXT: s_waitcnt vmcnt(3) +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v32, 16, v11 +; GCN-HSA-NEXT: v_and_b32_e32 v30, 0xffff, v11 +; GCN-HSA-NEXT: flat_store_dwordx4 v[34:35], v[30:33] +; GCN-HSA-NEXT: v_mov_b32_e32 v36, s13 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, s12 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v32, 16, v9 +; GCN-HSA-NEXT: v_and_b32_e32 v30, 0xffff, v9 +; GCN-HSA-NEXT: flat_store_dwordx4 v[35:36], v[30:33] ; GCN-HSA-NEXT: s_waitcnt vmcnt(4) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v20, 16, v9 -; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v9 -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[18:21] -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s12 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v20, 16, v7 -; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v7 -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[18:21] -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s4 -; GCN-HSA-NEXT: s_waitcnt vmcnt(5) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v20, 16, v11 -; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v11 -; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[18:21] -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s7 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s6 -; GCN-HSA-NEXT: s_waitcnt vmcnt(5) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v17 -; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xffff, v17 -; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[17:20] -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s9 -; GCN-HSA-NEXT: s_add_u32 s4, s0, 32 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s8 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v15 -; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xffff, v15 -; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[17:20] -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s4 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v12 -; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xffff, v12 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s1 -; GCN-HSA-NEXT: s_add_u32 s4, s0, 0xe0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[17:20] -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s0 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v10 -; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xffff, v10 -; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[11:12], v[17:20] -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v16 -; GCN-HSA-NEXT: v_and_b32_e32 v9, 0xffff, v16 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s4 -; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[9:12] -; GCN-HSA-NEXT: v_and_b32_e32 v0, 0xffff, v13 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v2 -; GCN-HSA-NEXT: v_and_b32_e32 v9, 0xffff, v2 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 16, v13 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v22, 16, v13 +; GCN-HSA-NEXT: v_mov_b32_e32 v32, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 +; GCN-HSA-NEXT: v_and_b32_e32 v20, 0xffff, v13 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[37:38], v[20:23] +; GCN-HSA-NEXT: v_mov_b32_e32 v45, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v38, s9 +; GCN-HSA-NEXT: s_waitcnt vmcnt(4) +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v25, 16, v19 +; GCN-HSA-NEXT: v_and_b32_e32 v23, 0xffff, v19 +; GCN-HSA-NEXT: v_mov_b32_e32 v44, s2 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 16, v15 +; GCN-HSA-NEXT: v_and_b32_e32 v0, 0xffff, v15 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 +; GCN-HSA-NEXT: v_mov_b32_e32 v34, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v36, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v37, s8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[23:26] +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v35, 16, v5 +; GCN-HSA-NEXT: v_and_b32_e32 v33, 0xffff, v5 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v28, 16, v17 +; GCN-HSA-NEXT: v_and_b32_e32 v26, 0xffff, v17 +; GCN-HSA-NEXT: flat_store_dwordx4 v[31:32], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[44:45], v[33:36] +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[37:38], v[26:29] +; GCN-HSA-NEXT: v_and_b32_e32 v24, 0xffff, v14 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v26, 16, v14 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[24:27] +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s1 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v30, 16, v12 +; GCN-HSA-NEXT: v_and_b32_e32 v28, 0xffff, v12 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s0 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[28:31] +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v39, 16, v18 +; GCN-HSA-NEXT: v_and_b32_e32 v37, 0xffff, v18 +; GCN-HSA-NEXT: v_mov_b32_e32 v38, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[37:40] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v23, 16, v14 -; GCN-HSA-NEXT: v_and_b32_e32 v21, 0xffff, v14 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, v1 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v43, 16, v16 +; GCN-HSA-NEXT: v_and_b32_e32 v41, 0xffff, v16 +; GCN-HSA-NEXT: v_mov_b32_e32 v44, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[21:24] +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[41:44] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v20, 16, v8 -; GCN-HSA-NEXT: v_and_b32_e32 v18, 0xffff, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, v1 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v10 +; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xffff, v10 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 -; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[18:21] +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[17:20] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v6 -; GCN-HSA-NEXT: v_and_b32_e32 v15, 0xffff, v6 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, v1 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v23, 16, v8 +; GCN-HSA-NEXT: v_and_b32_e32 v21, 0xffff, v8 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, v1 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 64 -; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[15:18] -; GCN-HSA-NEXT: v_mov_b32_e32 v6, v1 +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[21:24] ; GCN-HSA-NEXT: v_mov_b32_e32 v8, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, v1 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v4 -; GCN-HSA-NEXT: v_and_b32_e32 v5, 0xffff, v4 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v6 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v4 +; GCN-HSA-NEXT: v_and_b32_e32 v11, 0xffff, v4 +; GCN-HSA-NEXT: v_and_b32_e32 v7, 0xffff, v6 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[5:8] -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[9:12] +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[7:10] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[11:14] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_zextload_v32i16_to_v32i64: @@ -7500,97 +7424,94 @@ define amdgpu_kernel void @global_zextload_v32i16_to_v32i64(ptr addrspace(1) %ou ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-VI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[7:10], off, s[8:11], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[13:16], off, s[8:11], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v21, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v23, v1 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v6, 0xffff, v10 -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v19, 16, v14 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v17, 0xffff, v14 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v23, 16, v13 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v21, 0xffff, v13 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v25, 0xffff, v16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v28, 0xffff, v15 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[13:16], off, s[8:11], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[31:34], off, s[8:11], 0 offset:48 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v0, 0xffff, v8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v5, 16, v7 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v3, 0xffff, v7 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v8, 16, v10 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v12, 16, v9 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v10, 0xffff, v9 -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v40, 16, v13 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v38, 0xffff, v13 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v46, 16, v15 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v44, 0xffff, v15 -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v15, 16, v32 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v13, 0xffff, v32 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v52, 16, v34 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v50, 0xffff, v34 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v34, 16, v33 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v32, 0xffff, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v33, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v51, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v53, v33 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v49, 16, v31 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v47, 0xffff, v31 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[50:53], off, s[0:3], 0 offset:240 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v48, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v50, v33 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[47:50], off, s[0:3], 0 offset:192 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v45, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v47, v33 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v43, 16, v16 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v41, 0xffff, v16 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[44:47], off, s[0:3], 0 offset:160 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v42, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v44, v33 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[41:44], off, s[0:3], 0 offset:176 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v39, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v41, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v29, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v31, v33 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v37, 16, v14 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v35, 0xffff, v14 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v14, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v16, v33 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[38:41], off, s[0:3], 0 offset:128 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v36, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v38, v33 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v26, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v28, v33 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:208 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:144 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v22, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v35, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v24, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v18, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v20, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v11, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v13, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v7, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v9, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, v33 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:224 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[21:24], off, s[0:3], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[17:20], off, s[0:3], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, v33 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v6, v33 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[3:6], off, s[0:3], 0 -; GCN-NOHSA-VI-NEXT: s_nop 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, v33 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v24, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v26, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v27, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v29, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v30, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v32, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v33, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v35, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v36, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v38, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v43, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v45, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v39, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v41, v1 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(3) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v22, 16, v11 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xffff, v11 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:240 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v25, 16, v8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v23, 0xffff, v8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:192 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v28, 16, v9 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v26, 0xffff, v9 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[26:29], off, s[0:3], 0 offset:208 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(5) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v31, 16, v18 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v29, 0xffff, v18 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v20, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v22, v1 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[29:32], off, s[0:3], 0 offset:160 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v34, 16, v19 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v32, 0xffff, v19 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v21, 16, v16 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v19, 0xffff, v16 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v23, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v25, v1 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:128 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v24, 16, v17 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v22, 0xffff, v17 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v9, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v11, v1 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:176 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:144 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(8) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v44, 16, v13 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v42, 0xffff, v13 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v21, 16, v12 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v19, 0xffff, v12 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(7) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v37, 16, v6 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v35, 0xffff, v6 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v10 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v0, 0xffff, v10 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v10, 16, v7 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v8, 0xffff, v7 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v22, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v26, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v28, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v32, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v16, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v18, v1 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v40, 16, v14 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v38, 0xffff, v14 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v31, 16, v5 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v29, 0xffff, v5 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v27, 16, v4 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v25, 0xffff, v4 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:64 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[29:32], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[38:41], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[42:45], off, s[0:3], 0 offset:16 ; GCN-NOHSA-VI-NEXT: s_endpgm ; ; EG-LABEL: global_zextload_v32i16_to_v32i64: @@ -7904,173 +7825,173 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i64(ptr addrspace(1) %ou ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(3) +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s28, v0 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s29, v1 ; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s15, v3 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s13, v1 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s10, v8 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s11, v9 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s20, v10 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s21, v11 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s36, s15 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s38, s13 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s26, s21 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s30, s11 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s52, s20, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s54, s10, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[10:11], 0x100000 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s57, s11, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s59, s11, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s60, s21, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s61, s21, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[20:21], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[36:37], 0x100000 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s12, v0 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s20 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s21 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[38:39], 0x100000 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s16, v4 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s20 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s20, s15, 16 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(2) +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s23, v7 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s35, v13 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s38, s15 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s56, s28, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[28:29], 0x100000 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s28, s29, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s39, s15, 31 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s19, v5 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s22, v6 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s37, v15 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s40, s29 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s42, s23 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s43, s35, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s41, s15, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s39 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s28 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x100000 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s28, s29, 31 ; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s14, v2 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s19, v7 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s20 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s20, s15, 31 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s17, v5 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s22, s19 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s20 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s20, s13, 16 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s18, v6 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s24, s17 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s64, s19, 31 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s20 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s20, s13, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s65, s19, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x100000 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s62, s17, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s63, s17, 16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s21 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s20 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x100000 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s31, v11 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s44, s19 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s45, s37, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s69, s23, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s70, s23, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s41 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s38 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s39 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[40:41], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s28 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[42:43], 0x100000 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s18, v4 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s27, v9 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s46, s31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s47, s37, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s65, s19, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s67, s19, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s38 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s39 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[44:45], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:208 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(1) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s22 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s23 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s65 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s64 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(2) -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s35, v15 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s28 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s29 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s70 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s69 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s48, s27 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s61, s31, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s63, s31, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[46:47], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s24 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s25 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s63 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s62 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s29, v13 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s40, s35 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s38 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s39 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s67 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s65 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s50, s37 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s57, s27, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s59, s27, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s26 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s27 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s61 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s60 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s42, s29 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s53, s35, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s55, s35, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s40 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s41 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s63 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s61 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s52, s35 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s30 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s48 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s49 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s59 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s57 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s44, s14, 16 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s29, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s51, s29, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x100000 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s54, s14, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s35, 31 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s40 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s41 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s55 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s53 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s46, s12, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[14:15], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s50 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s51 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s47 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s45 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s36, v14 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[14:15], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[54:55], s[54:55], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s42 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s43 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s51 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s52 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s53 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s43 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s33 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s34, v14 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s48, s18, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[12:13], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x100000 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s34, v12 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s58, s22, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s66, s36, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[36:37], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[56:57], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s38 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s39 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s44 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s45 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s28, v12 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s50, s16, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s56, s34, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[34:35], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[18:19], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s24 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s25 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s54 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s55 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s30, v10 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s60, s18, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s68, s34, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[34:35], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[22:23], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[58:59], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s36 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s37 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s46 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s47 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s58, s28, 16 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[28:29], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x100000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[50:51], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s20 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s21 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s36 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s37 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s26, v8 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s62, s30, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[30:31], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[18:19], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[60:61], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:192 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s34 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s35 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s48 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s49 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[52:53], 0x100000 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s16 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s17 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s28 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s29 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[54:55], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s34 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s64, s26, 16 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[26:27], 0x100000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[62:63], 0x100000 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s12 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s13 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s30 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s31 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[64:65], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s10 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s11 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s20 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s21 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[56:57], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s26 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s27 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[66:67], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s8 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s9 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s18 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s19 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[58:59], 0x100000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s22 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s23 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[68:69], 0x100000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s7 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s14 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s15 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s18 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s19 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s4 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s12 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s13 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s14 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s15 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; @@ -8084,169 +8005,168 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i64(ptr addrspace(1) %ou ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 48 -; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 32 -; GCN-HSA-NEXT: flat_load_dwordx4 v[16:19], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 -; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCN-HSA-NEXT: flat_load_dwordx4 v[2:5], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: s_waitcnt vmcnt(3) -; GCN-HSA-NEXT: v_readfirstlane_b32 s7, v13 -; GCN-HSA-NEXT: v_readfirstlane_b32 s9, v15 -; GCN-HSA-NEXT: v_readfirstlane_b32 s8, v14 -; GCN-HSA-NEXT: s_mov_b32 s10, s9 -; GCN-HSA-NEXT: s_mov_b32 s12, s7 +; GCN-HSA-NEXT: v_readfirstlane_b32 s6, v8 +; GCN-HSA-NEXT: v_readfirstlane_b32 s7, v9 +; GCN-HSA-NEXT: v_readfirstlane_b32 s10, v10 +; GCN-HSA-NEXT: v_readfirstlane_b32 s11, v11 +; GCN-HSA-NEXT: s_mov_b32 s14, s11 +; GCN-HSA-NEXT: s_mov_b32 s16, s7 +; GCN-HSA-NEXT: s_lshr_b32 s8, s10, 16 +; GCN-HSA-NEXT: s_lshr_b32 s18, s6, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[10:11], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s17, s11, 31 +; GCN-HSA-NEXT: s_ashr_i32 s19, s11, 16 ; GCN-HSA-NEXT: s_waitcnt vmcnt(2) -; GCN-HSA-NEXT: v_readfirstlane_b32 s19, v19 -; GCN-HSA-NEXT: v_readfirstlane_b32 s6, v12 -; GCN-HSA-NEXT: s_lshr_b32 s16, s8, 16 -; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[8:9], 0x100000 -; GCN-HSA-NEXT: s_ashr_i32 s49, s9, 31 -; GCN-HSA-NEXT: s_ashr_i32 s50, s9, 16 -; GCN-HSA-NEXT: v_readfirstlane_b32 s8, v16 -; GCN-HSA-NEXT: v_readfirstlane_b32 s9, v17 -; GCN-HSA-NEXT: v_readfirstlane_b32 s18, v18 -; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x100000 -; GCN-HSA-NEXT: s_mov_b32 s20, s19 -; GCN-HSA-NEXT: s_lshr_b32 s14, s6, 16 +; GCN-HSA-NEXT: v_readfirstlane_b32 s12, v12 +; GCN-HSA-NEXT: v_readfirstlane_b32 s13, v13 +; GCN-HSA-NEXT: v_readfirstlane_b32 s10, v14 +; GCN-HSA-NEXT: v_readfirstlane_b32 s11, v15 ; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[6:7], 0x100000 ; GCN-HSA-NEXT: s_ashr_i32 s33, s7, 31 -; GCN-HSA-NEXT: s_ashr_i32 s48, s7, 16 -; GCN-HSA-NEXT: s_mov_b32 s22, s9 -; GCN-HSA-NEXT: s_lshr_b32 s24, s18, 16 -; GCN-HSA-NEXT: s_lshr_b32 s28, s8, 16 -; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[8:9], 0x100000 -; GCN-HSA-NEXT: s_ashr_i32 s51, s9, 31 -; GCN-HSA-NEXT: s_ashr_i32 s52, s9, 16 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s11 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s12 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s13 +; GCN-HSA-NEXT: s_ashr_i32 s38, s7, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[18:19], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[16:17], 0x100000 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s19 +; GCN-HSA-NEXT: s_mov_b32 s16, s11 +; GCN-HSA-NEXT: s_mov_b32 s20, s13 +; GCN-HSA-NEXT: s_lshr_b32 s22, s10, 16 +; GCN-HSA-NEXT: s_lshr_b32 s26, s12, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[12:13], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[30:31], s[10:11], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s39, s13, 31 +; GCN-HSA-NEXT: s_ashr_i32 s54, s13, 16 +; GCN-HSA-NEXT: s_ashr_i32 s55, s11, 31 +; GCN-HSA-NEXT: s_ashr_i32 s56, s11, 16 ; GCN-HSA-NEXT: s_waitcnt vmcnt(1) -; GCN-HSA-NEXT: v_readfirstlane_b32 s9, v9 -; GCN-HSA-NEXT: v_readfirstlane_b32 s10, v10 -; GCN-HSA-NEXT: v_readfirstlane_b32 s11, v11 -; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[20:21], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[26:27], s[16:17], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[18:19], 0x100000 -; GCN-HSA-NEXT: s_ashr_i32 s53, s19, 31 -; GCN-HSA-NEXT: s_ashr_i32 s54, s19, 16 -; GCN-HSA-NEXT: v_readfirstlane_b32 s8, v8 -; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[28:29], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[30:31], s[24:25], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[40:41], s[22:23], 0x100000 +; GCN-HSA-NEXT: v_readfirstlane_b32 s11, v5 +; GCN-HSA-NEXT: v_readfirstlane_b32 s12, v6 +; GCN-HSA-NEXT: v_readfirstlane_b32 s13, v7 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s24 +; GCN-HSA-NEXT: v_readfirstlane_b32 s10, v4 +; GCN-HSA-NEXT: s_bfe_i64 s[28:29], s[26:27], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[36:37], s[22:23], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[42:43], s[16:17], 0x100000 +; GCN-HSA-NEXT: s_mov_b32 s16, s13 ; GCN-HSA-NEXT: s_mov_b32 s22, s11 -; GCN-HSA-NEXT: s_mov_b32 s24, s9 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s12 -; GCN-HSA-NEXT: s_ashr_i32 s57, s11, 31 -; GCN-HSA-NEXT: s_ashr_i32 s58, s11, 16 -; GCN-HSA-NEXT: s_lshr_b32 s12, s10, 16 -; GCN-HSA-NEXT: s_bfe_i64 s[28:29], s[10:11], 0x100000 +; GCN-HSA-NEXT: s_lshr_b32 s24, s12, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[26:27], s[12:13], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s59, s13, 31 +; GCN-HSA-NEXT: s_ashr_i32 s60, s13, 16 ; GCN-HSA-NEXT: s_waitcnt vmcnt(0) -; GCN-HSA-NEXT: v_readfirstlane_b32 s10, v2 -; GCN-HSA-NEXT: v_readfirstlane_b32 s11, v3 -; GCN-HSA-NEXT: v_readfirstlane_b32 s36, v4 -; GCN-HSA-NEXT: v_readfirstlane_b32 s37, v5 -; GCN-HSA-NEXT: s_lshr_b32 s20, s8, 16 -; GCN-HSA-NEXT: s_bfe_i64 s[34:35], s[12:13], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[38:39], s[24:25], 0x100000 -; GCN-HSA-NEXT: s_mov_b32 s44, s11 -; GCN-HSA-NEXT: s_lshr_b32 s12, s10, 16 -; GCN-HSA-NEXT: s_mov_b32 s46, s37 -; GCN-HSA-NEXT: s_lshr_b32 s24, s36, 16 +; GCN-HSA-NEXT: v_readfirstlane_b32 s12, v0 +; GCN-HSA-NEXT: v_readfirstlane_b32 s13, v1 +; GCN-HSA-NEXT: v_readfirstlane_b32 s44, v2 +; GCN-HSA-NEXT: v_readfirstlane_b32 s45, v3 ; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x100000 -; GCN-HSA-NEXT: s_ashr_i32 s55, s9, 31 -; GCN-HSA-NEXT: s_ashr_i32 s56, s9, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[40:41], s[20:21], 0x100000 +; GCN-HSA-NEXT: s_lshr_b32 s20, s10, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[34:35], s[24:25], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[46:47], s[22:23], 0x100000 +; GCN-HSA-NEXT: s_mov_b32 s24, s13 +; GCN-HSA-NEXT: s_lshr_b32 s22, s12, 16 +; GCN-HSA-NEXT: s_mov_b32 s50, s45 +; GCN-HSA-NEXT: s_lshr_b32 s52, s44, 16 ; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x100000 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s13 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s17 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s14 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s15 +; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[10:11], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s57, s11, 31 +; GCN-HSA-NEXT: s_ashr_i32 s58, s11, 16 ; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[42:43], s[22:23], 0x100000 -; GCN-HSA-NEXT: s_ashr_i32 s59, s11, 31 -; GCN-HSA-NEXT: s_ashr_i32 s60, s11, 16 -; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x100000 -; GCN-HSA-NEXT: s_ashr_i32 s61, s37, 31 -; GCN-HSA-NEXT: s_ashr_i32 s62, s37, 16 -; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[36:37], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[36:37], s[44:45], 0x100000 -; GCN-HSA-NEXT: s_bfe_i64 s[44:45], s[46:47], 0x100000 -; GCN-HSA-NEXT: s_add_u32 s46, s0, 48 -; GCN-HSA-NEXT: s_addc_u32 s47, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s46 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s47 -; GCN-HSA-NEXT: s_add_u32 s46, s0, 16 -; GCN-HSA-NEXT: s_addc_u32 s47, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s46 -; GCN-HSA-NEXT: v_mov_b32_e32 v26, s47 -; GCN-HSA-NEXT: s_add_u32 s46, s0, 0xf0 -; GCN-HSA-NEXT: s_addc_u32 s47, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s40 -; GCN-HSA-NEXT: s_add_u32 s40, s0, 0xd0 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s41 -; GCN-HSA-NEXT: s_addc_u32 s41, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v29, s40 -; GCN-HSA-NEXT: v_mov_b32_e32 v30, s41 -; GCN-HSA-NEXT: s_add_u32 s40, s0, 0xb0 -; GCN-HSA-NEXT: s_addc_u32 s41, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s50 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s49 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s38 -; GCN-HSA-NEXT: s_add_u32 s38, s0, 0x90 +; GCN-HSA-NEXT: s_bfe_i64 s[48:49], s[16:17], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[12:13], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s61, s13, 31 +; GCN-HSA-NEXT: s_ashr_i32 s62, s13, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[44:45], 0x100000 +; GCN-HSA-NEXT: s_ashr_i32 s63, s45, 31 +; GCN-HSA-NEXT: s_ashr_i32 s64, s45, 16 +; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[22:23], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[52:53], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[44:45], s[24:25], 0x100000 +; GCN-HSA-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x100000 +; GCN-HSA-NEXT: s_add_u32 s52, s0, 48 +; GCN-HSA-NEXT: s_addc_u32 s53, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s52 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s53 +; GCN-HSA-NEXT: s_add_u32 s52, s0, 16 +; GCN-HSA-NEXT: s_addc_u32 s53, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s52 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s53 +; GCN-HSA-NEXT: s_add_u32 s52, s0, 0xf0 +; GCN-HSA-NEXT: s_addc_u32 s53, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s52 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s53 +; GCN-HSA-NEXT: s_add_u32 s52, s0, 0xd0 +; GCN-HSA-NEXT: s_addc_u32 s53, s1, 0 +; GCN-HSA-NEXT: s_add_u32 s24, s0, 0xb0 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s25 +; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[8:11] +; GCN-HSA-NEXT: s_addc_u32 s25, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s24 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s52 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s38 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s33 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s42 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s43 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s25 +; GCN-HSA-NEXT: s_add_u32 s24, s0, 0x90 +; GCN-HSA-NEXT: v_mov_b32_e32 v28, s53 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s56 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s55 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s40 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s41 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s54 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s39 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s48 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s49 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s60 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s59 +; GCN-HSA-NEXT: flat_store_dwordx4 v[23:24], v[12:15] +; GCN-HSA-NEXT: flat_store_dwordx4 v[25:26], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[27:28], v[4:7] +; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[16:19] +; GCN-HSA-NEXT: s_addc_u32 s25, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s24 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25 +; GCN-HSA-NEXT: s_add_u32 s24, s0, 0x70 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s46 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s47 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s58 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s57 +; GCN-HSA-NEXT: s_addc_u32 s25, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s24 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[20:23] +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s50 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s51 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s64 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s63 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s25 +; GCN-HSA-NEXT: s_add_u32 s24, s0, 0x50 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s39 -; GCN-HSA-NEXT: s_addc_u32 s39, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s38 -; GCN-HSA-NEXT: v_mov_b32_e32 v27, s46 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s39 -; GCN-HSA-NEXT: s_add_u32 s38, s0, 0x70 -; GCN-HSA-NEXT: v_mov_b32_e32 v28, s47 -; GCN-HSA-NEXT: v_mov_b32_e32 v31, s40 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s48 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s33 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s54 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s53 -; GCN-HSA-NEXT: s_addc_u32 s39, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s38 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s42 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s43 -; GCN-HSA-NEXT: v_mov_b32_e32 v32, s41 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s52 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s51 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s58 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s57 -; GCN-HSA-NEXT: v_mov_b32_e32 v24, s56 -; GCN-HSA-NEXT: flat_store_dwordx4 v[25:26], v[6:9] -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s55 -; GCN-HSA-NEXT: flat_store_dwordx4 v[27:28], v[10:13] -; GCN-HSA-NEXT: flat_store_dwordx4 v[29:30], v[14:17] -; GCN-HSA-NEXT: flat_store_dwordx4 v[31:32], v[18:21] -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[22:25] +; GCN-HSA-NEXT: s_addc_u32 s25, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s24 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s44 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s45 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s62 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s61 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s39 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_nop 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s36 -; GCN-HSA-NEXT: s_add_u32 s36, s0, 0x50 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s37 -; GCN-HSA-NEXT: s_addc_u32 s37, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s36 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s60 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s59 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s37 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s25 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 @@ -8254,42 +8174,42 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i64(ptr addrspace(1) %ou ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s26 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s27 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s30 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s31 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s31 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s36 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s37 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s7 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s18 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s19 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s19 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s28 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s29 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s28 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s29 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s26 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s27 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s34 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s35 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 @@ -8297,18 +8217,18 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i64(ptr addrspace(1) %ou ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s21 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 64 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s22 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s23 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s24 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s25 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s16 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s17 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s22 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s23 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] @@ -8331,110 +8251,110 @@ define amdgpu_kernel void @global_sextload_v32i16_to_v32i64(ptr addrspace(1) %ou ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-VI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[7:10], off, s[8:11], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[15:18], off, s[8:11], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[11:14], off, s[8:11], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[3:6], off, s[8:11], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[14:17], off, s[8:11], 0 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[10:13], off, s[8:11], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[31:34], off, s[8:11], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[26:29], off, s[8:11], 0 offset:48 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(3) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v1, 16, v8 -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(2) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v17 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v19, v17, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v2, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v20, 31, v19 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v22, 31, v21 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v18 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:224 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v17, v18, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v19, v2, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v8, v17, 0, 16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v3, 16, v17 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(1) +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v30, v31, 0, 16 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v1, 16, v28 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v21, 16, v31 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v31, v34, 0, 16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v38, 16, v34 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v34, v28, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v36, v1, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v35, 31, v34 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v37, 31, v36 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v1, 16, v29 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v25, v32, 0, 16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v17, 16, v32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[34:37], off, s[0:3], 0 offset:224 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v32, v33, 0, 16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v19, 16, v33 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v33, v29, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v35, v1, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v34, 31, v33 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v36, 31, v35 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v1, 16, v26 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[33:36], off, s[0:3], 0 offset:240 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v9, 16, v27 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v34, v26, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v36, v1, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v35, 31, v34 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v37, 31, v36 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v33, v27, 0, 16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[34:37], off, s[0:3], 0 offset:192 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v27, v17, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v35, v9, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v34, 31, v33 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v36, 31, v35 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[33:36], off, s[0:3], 0 offset:208 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v34, v19, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v28, 31, v27 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v33, 31, v32 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v35, 31, v34 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:144 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:160 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v25, v12, 0, 16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v12, 16, v12 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v33, v38, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v27, v12, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v32, 31, v31 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v34, 31, v33 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v28, 31, v27 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v12, 16, v13 ; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v15 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[17:20], off, s[0:3], 0 offset:240 -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(2) -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v4, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v17, v15, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v19, v2, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v20, 31, v19 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v16 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[17:20], off, s[0:3], 0 offset:192 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v15, v16, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v17, v2, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v13 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:208 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v20, 16, v9 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v15, v13, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v17, v2, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v14 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:160 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v13, v14, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v15, v2, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v11 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:176 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v18, v9, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v13, v11, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v15, v2, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v12 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:128 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v9, v5, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v16, v2, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 16, v5 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v11, v2, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v2, v1, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v1, 16, v4 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v14, v12, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v4, 16, v3 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v24, v1, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v1, 16, v6 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v0, v8, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v8, v7, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v13, v10, 0, 16 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v19, 16, v10 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v28, v4, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v4, v6, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v6, v1, 0, 16 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:144 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[9:12], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v15, v19, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v10, v7, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v20, 0, 16 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v26, v3, 0, 16 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v4, v14, 0, 16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v6, 16, v14 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v14, v16, 0, 16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v16, 16, v16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v18, v11, 0, 16 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v7, 16, v11 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v11, 16, v10 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:176 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v32, v21, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v26, v13, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v28, v12, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v0, v15, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v10, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v2, v2, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v6, v6, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v10, v3, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v16, v16, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v7, 0, 16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v24, v11, 0, 16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v31, 31, v30 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v33, 31, v32 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v27, 31, v26 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v29, 31, v28 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v3, 31, v2 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v5, 31, v4 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v9, 31, v8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v11, 31, v10 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v16, 31, v15 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v15, 31, v14 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v19, 31, v18 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v21, 31, v20 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 31, v22 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v3, 31, v2 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[30:33], off, s[0:3], 0 offset:128 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v11, 31, v10 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v21, 31, v20 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v25, 31, v24 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v27, 31, v26 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v29, 31, v28 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[26:29], off, s[0:3], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[26:29], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:64 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GCN-NOHSA-VI-NEXT: s_endpgm ; diff --git a/llvm/test/CodeGen/AMDGPU/load-global-i32.ll b/llvm/test/CodeGen/AMDGPU/load-global-i32.ll index 9b0218f5bcba4..eab31770fb4b2 100644 --- a/llvm/test/CodeGen/AMDGPU/load-global-i32.ll +++ b/llvm/test/CodeGen/AMDGPU/load-global-i32.ll @@ -2342,69 +2342,68 @@ define amdgpu_kernel void @global_sextload_v16i32_to_v16i64(ptr addrspace(1) %ou ; SI-NOHSA-NEXT: s_waitcnt lgkmcnt(0) ; SI-NOHSA-NEXT: s_mov_b32 s8, s6 ; SI-NOHSA-NEXT: s_mov_b32 s9, s7 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:32 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:48 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:16 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:32 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:48 ; SI-NOHSA-NEXT: s_mov_b32 s0, s4 ; SI-NOHSA-NEXT: s_mov_b32 s1, s5 ; SI-NOHSA-NEXT: s_waitcnt vmcnt(3) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v19, 31, v3 -; SI-NOHSA-NEXT: s_waitcnt vmcnt(2) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v27, 31, v5 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v25, 31, v4 -; SI-NOHSA-NEXT: v_mov_b32_e32 v24, v4 -; SI-NOHSA-NEXT: v_mov_b32_e32 v26, v5 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v17, 31, v2 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v23, 31, v7 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v21, 31, v6 -; SI-NOHSA-NEXT: v_mov_b32_e32 v20, v6 -; SI-NOHSA-NEXT: v_mov_b32_e32 v22, v7 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v7, 31, v1 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v5, 31, v0 -; SI-NOHSA-NEXT: v_mov_b32_e32 v4, v0 -; SI-NOHSA-NEXT: v_mov_b32_e32 v6, v1 -; SI-NOHSA-NEXT: v_mov_b32_e32 v16, v2 -; SI-NOHSA-NEXT: v_mov_b32_e32 v18, v3 -; SI-NOHSA-NEXT: s_waitcnt vmcnt(1) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v3, 31, v11 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v1, 31, v10 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v31, 31, v9 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v29, 31, v8 -; SI-NOHSA-NEXT: v_mov_b32_e32 v28, v8 -; SI-NOHSA-NEXT: v_mov_b32_e32 v30, v9 -; SI-NOHSA-NEXT: v_mov_b32_e32 v0, v10 -; SI-NOHSA-NEXT: v_mov_b32_e32 v2, v11 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v18, 31, v3 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v16, 31, v2 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v22, 31, v1 ; SI-NOHSA-NEXT: s_waitcnt vmcnt(0) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v11, 31, v15 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v9, 31, v14 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v35, 31, v13 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v33, 31, v12 -; SI-NOHSA-NEXT: v_mov_b32_e32 v32, v12 -; SI-NOHSA-NEXT: v_mov_b32_e32 v34, v13 -; SI-NOHSA-NEXT: v_mov_b32_e32 v8, v14 -; SI-NOHSA-NEXT: v_mov_b32_e32 v10, v15 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:96 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:112 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:64 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:32 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v38, 31, v13 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v36, 31, v12 +; SI-NOHSA-NEXT: v_mov_b32_e32 v35, v12 +; SI-NOHSA-NEXT: v_mov_b32_e32 v37, v13 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v42, 31, v15 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v40, 31, v14 +; SI-NOHSA-NEXT: v_mov_b32_e32 v39, v14 +; SI-NOHSA-NEXT: v_mov_b32_e32 v41, v15 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v20, 31, v0 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v26, 31, v7 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v24, 31, v6 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v30, 31, v5 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v28, 31, v4 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v34, 31, v11 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v32, 31, v10 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:96 +; SI-NOHSA-NEXT: s_waitcnt expcnt(0) +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v38, 31, v9 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v36, 31, v8 +; SI-NOHSA-NEXT: v_mov_b32_e32 v35, v8 +; SI-NOHSA-NEXT: v_mov_b32_e32 v37, v9 +; SI-NOHSA-NEXT: v_mov_b32_e32 v31, v10 +; SI-NOHSA-NEXT: v_mov_b32_e32 v33, v11 +; SI-NOHSA-NEXT: v_mov_b32_e32 v27, v4 +; SI-NOHSA-NEXT: v_mov_b32_e32 v29, v5 +; SI-NOHSA-NEXT: v_mov_b32_e32 v23, v6 +; SI-NOHSA-NEXT: v_mov_b32_e32 v25, v7 +; SI-NOHSA-NEXT: v_mov_b32_e32 v19, v0 +; SI-NOHSA-NEXT: v_mov_b32_e32 v21, v1 +; SI-NOHSA-NEXT: v_mov_b32_e32 v15, v2 +; SI-NOHSA-NEXT: v_mov_b32_e32 v17, v3 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 offset:112 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:64 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:80 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:32 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:48 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:16 ; SI-NOHSA-NEXT: s_endpgm ; ; GCNX3-HSA-LABEL: global_sextload_v16i32_to_v16i64: ; GCNX3-HSA: ; %bb.0: ; GCNX3-HSA-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 ; GCNX3-HSA-NEXT: s_add_i32 s12, s12, s17 -; GCNX3-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GCNX3-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 +; GCNX3-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GCNX3-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCNX3-HSA-NEXT: flat_load_dwordx4 v[8:11], v[0:1] ; GCNX3-HSA-NEXT: s_add_u32 s4, s2, 48 +; GCNX3-HSA-NEXT: flat_load_dwordx4 v[8:11], v[0:1] ; GCNX3-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s5 @@ -2430,9 +2429,13 @@ define amdgpu_kernel void @global_sextload_v16i32_to_v16i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v27, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v21, s1 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v26, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 64 +; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v29, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v21, s1 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, s2 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v20, s0 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(3) @@ -2443,16 +2446,13 @@ define amdgpu_kernel void @global_sextload_v16i32_to_v16i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] ; GCNX3-HSA-NEXT: v_mov_b32_e32 v21, s3 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v20, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x50 -; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v29, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 32 +; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v19, 31, v11 ; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v17, 31, v10 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v16, v10 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v18, v11 -; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCNX3-HSA-NEXT: s_add_u32 s0, s0, 48 ; GCNX3-HSA-NEXT: flat_store_dwordx4 v[22:23], v[16:19] ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(4) ; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v15 @@ -2463,8 +2463,7 @@ define amdgpu_kernel void @global_sextload_v16i32_to_v16i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: v_mov_b32_e32 v18, v13 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v8, v14 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v10, v15 -; GCNX3-HSA-NEXT: s_add_u32 s0, s0, 48 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v23, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v31, s3 ; GCNX3-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCNX3-HSA-NEXT: flat_store_dwordx4 v[24:25], v[16:19] ; GCNX3-HSA-NEXT: flat_store_dwordx4 v[26:27], v[8:11] @@ -2477,11 +2476,11 @@ define amdgpu_kernel void @global_sextload_v16i32_to_v16i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: v_mov_b32_e32 v14, v5 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v8, v6 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v10, v7 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v22, s2 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v31, s1 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[20:21], v[12:15] -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[28:29], v[8:11] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v30, s0 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v30, s2 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v23, s1 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15] +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[20:21], v[8:11] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v22, s0 ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(6) ; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v1 ; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v0 @@ -2491,8 +2490,8 @@ define amdgpu_kernel void @global_sextload_v16i32_to_v16i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v2 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v4, v2 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v6, v3 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[22:23], v[8:11] -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[30:31], v[4:7] +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[30:31], v[8:11] +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[22:23], v[4:7] ; GCNX3-HSA-NEXT: s_endpgm ; ; GCNX3-NOHSA-LABEL: global_sextload_v16i32_to_v16i64: @@ -2505,56 +2504,54 @@ define amdgpu_kernel void @global_sextload_v16i32_to_v16i64(ptr addrspace(1) %ou ; GCNX3-NOHSA-NEXT: s_waitcnt lgkmcnt(0) ; GCNX3-NOHSA-NEXT: s_mov_b32 s8, s6 ; GCNX3-NOHSA-NEXT: s_mov_b32 s9, s7 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:32 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:48 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:16 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:32 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:48 ; GCNX3-NOHSA-NEXT: s_mov_b32 s0, s4 ; GCNX3-NOHSA-NEXT: s_mov_b32 s1, s5 ; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(3) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v19, 31, v3 -; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(2) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v27, 31, v5 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v25, 31, v4 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v24, v4 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v26, v5 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v17, 31, v2 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v23, 31, v7 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v21, 31, v6 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v20, v6 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v22, v7 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v7, 31, v1 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v5, 31, v0 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v4, v0 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v6, v1 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v16, v2 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v18, v3 -; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(1) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v3, 31, v11 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v1, 31, v10 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v31, 31, v9 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v29, 31, v8 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v28, v8 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v30, v9 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v0, v10 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v2, v11 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v18, 31, v3 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v16, 31, v2 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v22, 31, v1 ; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(0) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v11, 31, v15 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v9, 31, v14 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v35, 31, v13 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v33, 31, v12 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v32, v12 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v34, v13 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v8, v14 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v10, v15 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:96 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:112 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:64 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:32 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v38, 31, v13 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v36, 31, v12 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v35, v12 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v37, v13 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v42, 31, v15 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v40, 31, v14 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v39, v14 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v41, v15 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v20, 31, v0 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v26, 31, v7 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v24, 31, v6 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v30, 31, v5 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v28, 31, v4 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v34, 31, v11 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v32, 31, v10 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:96 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v31, v10 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v38, 31, v9 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v36, 31, v8 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v35, v8 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v37, v9 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v33, v11 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v27, v4 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v29, v5 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v23, v6 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v25, v7 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v19, v0 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v21, v1 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v15, v2 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v17, v3 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 offset:112 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:64 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:80 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:32 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:48 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:16 ; GCNX3-NOHSA-NEXT: s_endpgm ; ; EG-LABEL: global_sextload_v16i32_to_v16i64: @@ -2637,56 +2634,54 @@ define amdgpu_kernel void @global_sextload_v16i32_to_v16i64(ptr addrspace(1) %ou ; GCN-HSA-LABEL: global_sextload_v16i32_to_v16i64: ; GCN-HSA: ; %bb.0: ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 -; GCN-HSA-NEXT: v_mov_b32_e32 v36, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v43, 0 ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GCN-HSA-NEXT: global_load_dwordx4 v[0:3], v36, s[2:3] offset:32 -; GCN-HSA-NEXT: global_load_dwordx4 v[4:7], v36, s[2:3] offset:48 -; GCN-HSA-NEXT: global_load_dwordx4 v[8:11], v36, s[2:3] offset:16 -; GCN-HSA-NEXT: global_load_dwordx4 v[12:15], v36, s[2:3] +; GCN-HSA-NEXT: global_load_dwordx4 v[0:3], v43, s[2:3] +; GCN-HSA-NEXT: global_load_dwordx4 v[4:7], v43, s[2:3] offset:16 +; GCN-HSA-NEXT: global_load_dwordx4 v[8:11], v43, s[2:3] offset:32 +; GCN-HSA-NEXT: global_load_dwordx4 v[12:15], v43, s[2:3] offset:48 ; GCN-HSA-NEXT: s_waitcnt vmcnt(3) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v19, 31, v3 -; GCN-HSA-NEXT: s_waitcnt vmcnt(2) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v27, 31, v5 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v25, 31, v4 -; GCN-HSA-NEXT: v_mov_b32_e32 v24, v4 -; GCN-HSA-NEXT: v_mov_b32_e32 v26, v5 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 31, v2 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v23, 31, v7 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v21, 31, v6 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, v6 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, v7 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v1 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, v0 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, v2 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, v3 -; GCN-HSA-NEXT: s_waitcnt vmcnt(1) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 31, v11 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 31, v10 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v31, 31, v9 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v29, 31, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v28, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v30, v9 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, v10 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, v11 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v18, 31, v3 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v16, 31, v2 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v22, 31, v1 ; GCN-HSA-NEXT: s_waitcnt vmcnt(0) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v15 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v14 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v35, 31, v13 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v33, 31, v12 -; GCN-HSA-NEXT: v_mov_b32_e32 v32, v12 -; GCN-HSA-NEXT: v_mov_b32_e32 v34, v13 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, v14 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, v15 -; GCN-HSA-NEXT: global_store_dwordx4 v36, v[24:27], s[0:1] offset:96 -; GCN-HSA-NEXT: global_store_dwordx4 v36, v[20:23], s[0:1] offset:112 -; GCN-HSA-NEXT: global_store_dwordx4 v36, v[4:7], s[0:1] offset:64 -; GCN-HSA-NEXT: global_store_dwordx4 v36, v[16:19], s[0:1] offset:80 -; GCN-HSA-NEXT: global_store_dwordx4 v36, v[28:31], s[0:1] offset:32 -; GCN-HSA-NEXT: global_store_dwordx4 v36, v[0:3], s[0:1] offset:48 -; GCN-HSA-NEXT: global_store_dwordx4 v36, v[32:35], s[0:1] -; GCN-HSA-NEXT: global_store_dwordx4 v36, v[8:11], s[0:1] offset:16 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v38, 31, v13 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v36, 31, v12 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, v12 +; GCN-HSA-NEXT: v_mov_b32_e32 v37, v13 +; GCN-HSA-NEXT: global_store_dwordx4 v43, v[35:38], s[0:1] offset:96 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v42, 31, v15 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v38, 31, v9 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v40, 31, v14 +; GCN-HSA-NEXT: v_mov_b32_e32 v39, v14 +; GCN-HSA-NEXT: v_mov_b32_e32 v41, v15 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v36, 31, v8 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, v8 +; GCN-HSA-NEXT: v_mov_b32_e32 v37, v9 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v20, 31, v0 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v26, 31, v7 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v24, 31, v6 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v30, 31, v5 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v28, 31, v4 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v34, 31, v11 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v32, 31, v10 +; GCN-HSA-NEXT: global_store_dwordx4 v43, v[39:42], s[0:1] offset:112 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, v10 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, v11 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, v4 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, v5 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, v6 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, v7 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, v0 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, v2 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, v3 +; GCN-HSA-NEXT: global_store_dwordx4 v43, v[35:38], s[0:1] offset:64 +; GCN-HSA-NEXT: global_store_dwordx4 v43, v[31:34], s[0:1] offset:80 +; GCN-HSA-NEXT: global_store_dwordx4 v43, v[27:30], s[0:1] offset:32 +; GCN-HSA-NEXT: global_store_dwordx4 v43, v[23:26], s[0:1] offset:48 +; GCN-HSA-NEXT: global_store_dwordx4 v43, v[19:22], s[0:1] +; GCN-HSA-NEXT: global_store_dwordx4 v43, v[15:18], s[0:1] offset:16 ; GCN-HSA-NEXT: s_endpgm %ld = load <16 x i32>, ptr addrspace(1) %in %ext = sext <16 x i32> %ld to <16 x i64> @@ -2784,25 +2779,25 @@ define amdgpu_kernel void @global_zextload_v16i32_to_v16i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v27, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v21, s1 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v26, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 64 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v21, s1 +; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v19, v17 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v20, s0 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v29, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, s2 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(3) ; GCNX3-HSA-NEXT: v_mov_b32_e32 v16, v0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v18, v1 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCNX3-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x50 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v16, v2 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v18, v3 -; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GCNX3-HSA-NEXT: flat_store_dwordx4 v[22:23], v[16:19] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v3, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(4) ; GCNX3-HSA-NEXT: v_mov_b32_e32 v16, v4 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v18, v5 @@ -2817,12 +2812,12 @@ define amdgpu_kernel void @global_zextload_v16i32_to_v16i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: v_mov_b32_e32 v16, v8 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v18, v9 ; GCNX3-HSA-NEXT: s_add_u32 s0, s0, 48 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19] +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[28:29], v[16:19] ; GCNX3-HSA-NEXT: v_mov_b32_e32 v20, s2 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v16, v10 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v18, v11 ; GCNX3-HSA-NEXT: s_addc_u32 s1, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[2:3], v[16:19] +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19] ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s0 ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(6) ; GCNX3-HSA-NEXT: v_mov_b32_e32 v16, v12 @@ -3014,107 +3009,109 @@ define amdgpu_kernel void @global_sextload_v32i32_to_v32i64(ptr addrspace(1) %ou ; SI-NOHSA-NEXT: s_waitcnt lgkmcnt(0) ; SI-NOHSA-NEXT: s_mov_b32 s8, s6 ; SI-NOHSA-NEXT: s_mov_b32 s9, s7 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:96 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:112 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:80 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:64 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:48 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[20:23], off, s[8:11], 0 offset:32 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[24:27], off, s[8:11], 0 -; SI-NOHSA-NEXT: buffer_load_dwordx4 v[28:31], off, s[8:11], 0 offset:16 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[32:35], off, s[8:11], 0 offset:32 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:112 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:96 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:80 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[20:23], off, s[8:11], 0 offset:64 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[24:27], off, s[8:11], 0 offset:48 +; SI-NOHSA-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 ; SI-NOHSA-NEXT: s_mov_b32 s0, s4 ; SI-NOHSA-NEXT: s_mov_b32 s1, s5 -; SI-NOHSA-NEXT: s_waitcnt vmcnt(7) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v35, 31, v11 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v33, 31, v10 ; SI-NOHSA-NEXT: s_waitcnt vmcnt(6) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v39, 31, v15 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v37, 31, v14 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v43, 31, v13 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v41, 31, v12 -; SI-NOHSA-NEXT: v_mov_b32_e32 v40, v12 -; SI-NOHSA-NEXT: v_mov_b32_e32 v42, v13 -; SI-NOHSA-NEXT: v_mov_b32_e32 v36, v14 -; SI-NOHSA-NEXT: v_mov_b32_e32 v38, v15 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v15, 31, v9 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v13, 31, v8 -; SI-NOHSA-NEXT: v_mov_b32_e32 v12, v8 -; SI-NOHSA-NEXT: v_mov_b32_e32 v14, v9 -; SI-NOHSA-NEXT: v_mov_b32_e32 v32, v10 -; SI-NOHSA-NEXT: v_mov_b32_e32 v34, v11 -; SI-NOHSA-NEXT: s_waitcnt vmcnt(5) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v11, 31, v7 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v9, 31, v6 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v47, 31, v5 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v45, 31, v4 -; SI-NOHSA-NEXT: v_mov_b32_e32 v44, v4 -; SI-NOHSA-NEXT: v_mov_b32_e32 v46, v5 -; SI-NOHSA-NEXT: v_mov_b32_e32 v8, v6 -; SI-NOHSA-NEXT: v_mov_b32_e32 v10, v7 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v31, 31, v9 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v29, 31, v8 +; SI-NOHSA-NEXT: v_mov_b32_e32 v28, v8 +; SI-NOHSA-NEXT: v_mov_b32_e32 v30, v9 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:224 +; SI-NOHSA-NEXT: s_waitcnt expcnt(0) +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v29, 31, v10 +; SI-NOHSA-NEXT: v_mov_b32_e32 v28, v10 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v31, 31, v11 +; SI-NOHSA-NEXT: v_mov_b32_e32 v30, v11 +; SI-NOHSA-NEXT: s_waitcnt vmcnt(6) +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v9, 31, v12 +; SI-NOHSA-NEXT: v_mov_b32_e32 v8, v12 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v11, 31, v13 +; SI-NOHSA-NEXT: v_mov_b32_e32 v10, v13 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:240 +; SI-NOHSA-NEXT: s_waitcnt expcnt(0) +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v29, 31, v14 +; SI-NOHSA-NEXT: v_mov_b32_e32 v28, v14 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v31, 31, v15 +; SI-NOHSA-NEXT: v_mov_b32_e32 v30, v15 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:192 +; SI-NOHSA-NEXT: s_waitcnt vmcnt(7) expcnt(0) +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v9, 31, v16 +; SI-NOHSA-NEXT: v_mov_b32_e32 v8, v16 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v11, 31, v17 +; SI-NOHSA-NEXT: v_mov_b32_e32 v10, v17 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v13, 31, v18 +; SI-NOHSA-NEXT: v_mov_b32_e32 v12, v18 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v15, 31, v19 +; SI-NOHSA-NEXT: v_mov_b32_e32 v14, v19 +; SI-NOHSA-NEXT: s_waitcnt vmcnt(6) +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v17, 31, v20 +; SI-NOHSA-NEXT: v_mov_b32_e32 v16, v20 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v19, 31, v21 +; SI-NOHSA-NEXT: v_mov_b32_e32 v18, v21 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v39, 31, v23 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v37, 31, v22 +; SI-NOHSA-NEXT: v_mov_b32_e32 v36, v22 +; SI-NOHSA-NEXT: v_mov_b32_e32 v38, v23 ; SI-NOHSA-NEXT: s_waitcnt vmcnt(4) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v7, 31, v3 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v5, 31, v2 -; SI-NOHSA-NEXT: v_mov_b32_e32 v4, v2 -; SI-NOHSA-NEXT: v_mov_b32_e32 v6, v3 -; SI-NOHSA-NEXT: s_waitcnt vmcnt(3) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v3, 31, v19 -; SI-NOHSA-NEXT: v_mov_b32_e32 v2, v19 -; SI-NOHSA-NEXT: s_waitcnt vmcnt(2) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v19, 31, v23 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v51, 31, v1 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v49, 31, v0 -; SI-NOHSA-NEXT: v_mov_b32_e32 v48, v0 -; SI-NOHSA-NEXT: v_mov_b32_e32 v50, v1 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v1, 31, v18 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v55, 31, v17 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v53, 31, v16 -; SI-NOHSA-NEXT: v_mov_b32_e32 v52, v16 -; SI-NOHSA-NEXT: v_mov_b32_e32 v54, v17 -; SI-NOHSA-NEXT: v_mov_b32_e32 v0, v18 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v17, 31, v22 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v59, 31, v21 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v57, 31, v20 -; SI-NOHSA-NEXT: v_mov_b32_e32 v56, v20 -; SI-NOHSA-NEXT: v_mov_b32_e32 v58, v21 -; SI-NOHSA-NEXT: v_mov_b32_e32 v16, v22 -; SI-NOHSA-NEXT: v_mov_b32_e32 v18, v23 -; SI-NOHSA-NEXT: s_waitcnt vmcnt(1) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v22, 31, v27 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v20, 31, v26 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[40:43], off, s[0:3], 0 offset:224 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v23, 31, v25 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v21, 31, v24 +; SI-NOHSA-NEXT: v_mov_b32_e32 v20, v24 +; SI-NOHSA-NEXT: v_mov_b32_e32 v22, v25 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v43, 31, v27 +; SI-NOHSA-NEXT: v_mov_b32_e32 v42, v27 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v27, 31, v33 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:208 ; SI-NOHSA-NEXT: s_waitcnt expcnt(0) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v42, 31, v25 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v40, 31, v24 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:240 -; SI-NOHSA-NEXT: s_waitcnt vmcnt(2) expcnt(0) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v38, 31, v31 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v36, 31, v30 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v30, 31, v3 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:160 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v28, 31, v2 ; SI-NOHSA-NEXT: s_waitcnt expcnt(0) -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v15, 31, v29 -; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v13, 31, v28 -; SI-NOHSA-NEXT: v_mov_b32_e32 v12, v28 -; SI-NOHSA-NEXT: v_mov_b32_e32 v14, v29 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:208 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[44:47], off, s[0:3], 0 offset:160 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:176 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[48:51], off, s[0:3], 0 offset:128 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:144 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[52:55], off, s[0:3], 0 offset:96 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[56:59], off, s[0:3], 0 offset:64 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32 -; SI-NOHSA-NEXT: v_mov_b32_e32 v35, v30 -; SI-NOHSA-NEXT: v_mov_b32_e32 v37, v31 -; SI-NOHSA-NEXT: v_mov_b32_e32 v39, v24 -; SI-NOHSA-NEXT: v_mov_b32_e32 v41, v25 -; SI-NOHSA-NEXT: s_waitcnt expcnt(1) -; SI-NOHSA-NEXT: v_mov_b32_e32 v19, v26 -; SI-NOHSA-NEXT: v_mov_b32_e32 v21, v27 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:48 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 -; SI-NOHSA-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:16 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v10, 31, v1 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:176 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v8, 31, v0 +; SI-NOHSA-NEXT: s_waitcnt vmcnt(6) expcnt(0) +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v14, 31, v7 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:128 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v41, 31, v26 +; SI-NOHSA-NEXT: v_mov_b32_e32 v40, v26 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v12, 31, v6 +; SI-NOHSA-NEXT: s_waitcnt expcnt(0) +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v18, 31, v5 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:144 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v25, 31, v32 +; SI-NOHSA-NEXT: v_mov_b32_e32 v24, v32 +; SI-NOHSA-NEXT: v_mov_b32_e32 v26, v33 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v16, 31, v4 +; SI-NOHSA-NEXT: s_waitcnt expcnt(0) +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v39, 31, v35 +; SI-NOHSA-NEXT: v_ashrrev_i32_e32 v37, 31, v34 +; SI-NOHSA-NEXT: v_mov_b32_e32 v36, v34 +; SI-NOHSA-NEXT: v_mov_b32_e32 v38, v35 +; SI-NOHSA-NEXT: v_mov_b32_e32 v15, v4 +; SI-NOHSA-NEXT: v_mov_b32_e32 v17, v5 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:96 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[40:43], off, s[0:3], 0 offset:112 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:64 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:80 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:32 +; SI-NOHSA-NEXT: v_mov_b32_e32 v11, v6 +; SI-NOHSA-NEXT: v_mov_b32_e32 v13, v7 +; SI-NOHSA-NEXT: v_mov_b32_e32 v7, v0 +; SI-NOHSA-NEXT: v_mov_b32_e32 v9, v1 +; SI-NOHSA-NEXT: s_waitcnt expcnt(2) +; SI-NOHSA-NEXT: v_mov_b32_e32 v27, v2 +; SI-NOHSA-NEXT: v_mov_b32_e32 v29, v3 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:48 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 +; SI-NOHSA-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:16 ; SI-NOHSA-NEXT: s_endpgm ; ; GCNX3-HSA-LABEL: global_sextload_v32i32_to_v32i64: @@ -3136,181 +3133,182 @@ define amdgpu_kernel void @global_sextload_v32i32_to_v32i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s5 +; GCNX3-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] ; GCNX3-HSA-NEXT: s_add_u32 s4, s2, 0x50 -; GCNX3-HSA-NEXT: flat_load_dwordx4 v[20:23], v[0:1] ; GCNX3-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s5 +; GCNX3-HSA-NEXT: flat_load_dwordx4 v[8:11], v[0:1] ; GCNX3-HSA-NEXT: s_add_u32 s4, s2, 64 -; GCNX3-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] ; GCNX3-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s5 -; GCNX3-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1] +; GCNX3-HSA-NEXT: flat_load_dwordx4 v[20:23], v[0:1] ; GCNX3-HSA-NEXT: s_add_u32 s4, s2, 48 ; GCNX3-HSA-NEXT: s_addc_u32 s5, s3, 0 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v9, s5 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v8, s4 -; GCNX3-HSA-NEXT: flat_load_dwordx4 v[16:19], v[8:9] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v17, s5 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v16, s4 +; GCNX3-HSA-NEXT: flat_load_dwordx4 v[16:19], v[16:17] ; GCNX3-HSA-NEXT: s_add_u32 s6, s2, 32 ; GCNX3-HSA-NEXT: s_addc_u32 s7, s3, 0 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s6 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s7 +; GCNX3-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1] ; GCNX3-HSA-NEXT: s_add_u32 s2, s2, 16 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v9, s7 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v8, s6 ; GCNX3-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] -; GCNX3-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9] ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v37, s1 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v36, s0 ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(7) ; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v35, 31, v29 ; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v33, 31, v28 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v32, v28 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v34, v29 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v29, s1 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, s0 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[28:29], v[32:35] ; GCNX3-HSA-NEXT: v_mov_b32_e32 v29, s3 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xe0 -; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[36:37], v[32:35] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v37, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v36, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xf0 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v35, 31, v31 ; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v33, 31, v30 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v32, v30 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v35, 31, v31 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v34, v31 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: flat_store_dwordx4 v[28:29], v[32:35] ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(8) -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v31, 31, v25 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v29, 31, v24 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v33, s3 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v32, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xc0 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xf0 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v35, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v34, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xd0 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v29, 31, v24 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, v24 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v31, 31, v25 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v30, v25 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v25, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v24, s2 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xc0 +; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[32:33], v[28:31] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v33, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v32, s2 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xd0 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[36:37], v[28:31] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v37, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v36, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xa0 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v31, 31, v27 ; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v29, 31, v26 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, v26 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v31, 31, v27 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v30, v27 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[24:25], v[28:31] +; GCNX3-HSA-NEXT: s_waitcnt vmcnt(9) +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v25, 31, v12 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v29, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, s2 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xa0 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[32:33], v[28:31] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v33, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v32, s2 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v31, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v30, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xb0 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v39, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v38, s2 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v24, v12 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v27, 31, v13 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v26, v13 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[32:33], v[24:27] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v33, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v32, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x80 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v25, 31, v14 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v24, v14 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v27, 31, v15 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v26, v15 ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(9) -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v27, 31, v21 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v25, 31, v20 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v24, v20 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v26, v21 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v13, 31, v8 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v12, v8 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v15, 31, v9 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v14, v9 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v31, 31, v23 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v29, 31, v22 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, v22 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v30, v23 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[34:35], v[24:27] -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[36:37], v[28:31] -; GCNX3-HSA-NEXT: s_waitcnt vmcnt(10) -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v23, 31, v15 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v21, 31, v14 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v27, 31, v13 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v25, 31, v12 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v24, v12 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v26, v13 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v20, v14 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v22, v15 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[28:29], v[24:27] ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(9) -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v15, 31, v5 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v13, 31, v4 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v12, v4 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v14, v5 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v20 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v27, 31, v11 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v25, 31, v10 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v24, v10 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v26, v11 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[30:31], v[12:15] +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[32:33], v[24:27] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v14, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v13, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x90 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v21 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v8, v20 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v10, v21 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[4:5], v[12:15] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[13:14], v[8:11] +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v28, 31, v23 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v9, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x60 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[32:33], v[24:27] -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[38:39], v[20:23] -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v26, 31, v7 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v24, 31, v6 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v23, v6 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v25, v7 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v26, 31, v22 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v25, v22 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v27, v23 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[4:5], v[23:26] -; GCNX3-HSA-NEXT: s_waitcnt vmcnt(12) -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v16 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v4, v16 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v16, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v15, s2 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[8:9], v[25:28] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v9, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x70 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v17 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v6, v17 +; GCNX3-HSA-NEXT: s_waitcnt vmcnt(12) +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v28, 31, v17 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v26, 31, v16 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v25, v16 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v27, v17 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[15:16], v[4:7] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v16, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v15, s2 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[8:9], v[25:28] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v9, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 64 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v26, 31, v19 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v24, 31, v18 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v23, v18 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v25, v19 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[15:16], v[23:26] ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(12) -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v18, 31, v9 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v16, 31, v8 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v15, v8 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v17, v9 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v9, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v8, s2 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v24, 31, v5 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v22, 31, v4 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v21, v4 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v23, v5 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[8:9], v[15:18] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v9, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v8, s2 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[4:5], v[21:24] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 32 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v14, 31, v1 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v12, 31, v0 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v11 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v6, v11 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v11, v0 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v13, v1 +; GCNX3-HSA-NEXT: s_waitcnt vmcnt(12) +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v20, 31, v1 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v28, 31, v19 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v26, 31, v18 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v25, v18 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v27, v19 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v18, 31, v0 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v17, v0 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v19, v1 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCNX3-HSA-NEXT: s_add_u32 s0, s0, 48 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[0:1], v[11:14] +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v12, 31, v7 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v10, 31, v6 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[8:9], v[25:28] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v9, v6 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v11, v7 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[0:1], v[17:20] ; GCNX3-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v22, 31, v3 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v20, 31, v2 -; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v10 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v4, v10 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v19, v2 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v21, v3 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v15, 31, v3 +; GCNX3-HSA-NEXT: v_ashrrev_i32_e32 v13, 31, v2 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[4:5], v[9:12] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v14, v3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v12, v2 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7] -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[0:1], v[19:22] +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] ; GCNX3-HSA-NEXT: s_endpgm ; ; GCNX3-NOHSA-LABEL: global_sextload_v32i32_to_v32i64: @@ -3323,104 +3321,102 @@ define amdgpu_kernel void @global_sextload_v32i32_to_v32i64(ptr addrspace(1) %ou ; GCNX3-NOHSA-NEXT: s_waitcnt lgkmcnt(0) ; GCNX3-NOHSA-NEXT: s_mov_b32 s8, s6 ; GCNX3-NOHSA-NEXT: s_mov_b32 s9, s7 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:96 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:112 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:80 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:64 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:48 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[20:23], off, s[8:11], 0 offset:32 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[24:27], off, s[8:11], 0 -; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[28:31], off, s[8:11], 0 offset:16 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[32:35], off, s[8:11], 0 offset:32 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:112 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:96 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:80 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[20:23], off, s[8:11], 0 offset:64 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[24:27], off, s[8:11], 0 offset:48 +; GCNX3-NOHSA-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 ; GCNX3-NOHSA-NEXT: s_mov_b32 s0, s4 ; GCNX3-NOHSA-NEXT: s_mov_b32 s1, s5 +; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(6) +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v31, 31, v9 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v29, 31, v8 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v28, v8 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v30, v9 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:224 +; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(6) +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v9, 31, v12 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v29, 31, v10 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v28, v10 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v31, 31, v11 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v30, v11 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v8, v12 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v11, 31, v13 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v10, v13 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:240 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:192 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v29, 31, v14 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v28, v14 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v31, 31, v15 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v30, v15 ; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(7) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v35, 31, v11 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v33, 31, v10 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v9, 31, v16 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v8, v16 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v11, 31, v17 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v10, v17 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v13, 31, v18 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v12, v18 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v15, 31, v19 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v14, v19 ; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(6) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v39, 31, v15 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v37, 31, v14 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v43, 31, v13 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v41, 31, v12 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v40, v12 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v42, v13 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v36, v14 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v38, v15 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v15, 31, v9 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v13, 31, v8 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v12, v8 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v14, v9 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v32, v10 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v34, v11 -; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(5) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v11, 31, v7 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v9, 31, v6 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v47, 31, v5 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v45, 31, v4 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v44, v4 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v46, v5 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v8, v6 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v10, v7 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v17, 31, v20 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v16, v20 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v19, 31, v21 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v18, v21 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v39, 31, v23 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v37, 31, v22 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v36, v22 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v38, v23 ; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(4) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v7, 31, v3 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v5, 31, v2 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v4, v2 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v6, v3 -; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(3) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v3, 31, v19 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v2, v19 -; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(2) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v19, 31, v23 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v51, 31, v1 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v49, 31, v0 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v48, v0 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v50, v1 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v1, 31, v18 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v55, 31, v17 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v53, 31, v16 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v52, v16 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v54, v17 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v0, v18 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v17, 31, v22 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v59, 31, v21 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v57, 31, v20 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v56, v20 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v58, v21 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v16, v22 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v18, v23 -; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(1) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v22, 31, v27 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v20, 31, v26 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[40:43], off, s[0:3], 0 offset:224 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:240 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v42, 31, v25 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v40, 31, v24 -; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(2) -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v38, 31, v31 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v36, 31, v30 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v37, v31 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v15, 31, v29 -; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v13, 31, v28 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v12, v28 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v14, v29 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:208 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[44:47], off, s[0:3], 0 offset:160 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:176 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[48:51], off, s[0:3], 0 offset:128 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:144 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[52:55], off, s[0:3], 0 offset:96 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[56:59], off, s[0:3], 0 offset:64 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v35, v30 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v39, v24 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v41, v25 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v19, v26 -; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v21, v27 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:48 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 -; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:16 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v23, 31, v25 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v21, 31, v24 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v20, v24 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v22, v25 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v43, 31, v27 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v42, v27 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v27, 31, v33 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:208 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:160 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v30, 31, v3 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v28, 31, v2 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v10, 31, v1 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:176 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v8, 31, v0 +; GCNX3-NOHSA-NEXT: s_waitcnt vmcnt(6) +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v14, 31, v7 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:128 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v41, 31, v26 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v40, v26 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v12, 31, v6 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v18, 31, v5 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:144 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v25, 31, v32 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v24, v32 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v26, v33 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v16, 31, v4 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v39, 31, v35 +; GCNX3-NOHSA-NEXT: v_ashrrev_i32_e32 v37, 31, v34 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v36, v34 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v38, v35 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v15, v4 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v17, v5 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:96 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[40:43], off, s[0:3], 0 offset:112 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:64 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:80 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:32 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v11, v6 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v13, v7 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v7, v0 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v9, v1 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v27, v2 +; GCNX3-NOHSA-NEXT: v_mov_b32_e32 v29, v3 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:48 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 +; GCNX3-NOHSA-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:16 ; GCNX3-NOHSA-NEXT: s_endpgm ; ; EG-LABEL: global_sextload_v32i32_to_v32i64: @@ -3564,233 +3560,108 @@ define amdgpu_kernel void @global_sextload_v32i32_to_v32i64(ptr addrspace(1) %ou ; EG-NEXT: 56(7.847271e-44), 0(0.000000e+00) ; EG-NEXT: MOV * T32.Z, T7.Y, ; -; GCN-GFX900-HSA-LABEL: global_sextload_v32i32_to_v32i64: -; GCN-GFX900-HSA: ; %bb.0: -; GCN-GFX900-HSA-NEXT: s_mov_b64 s[22:23], s[2:3] -; GCN-GFX900-HSA-NEXT: s_mov_b64 s[20:21], s[0:1] -; GCN-GFX900-HSA-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v12, 0 -; GCN-GFX900-HSA-NEXT: s_add_u32 s20, s20, s17 -; GCN-GFX900-HSA-NEXT: s_addc_u32 s21, s21, 0 -; GCN-GFX900-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GCN-GFX900-HSA-NEXT: global_load_dwordx4 v[4:7], v12, s[2:3] offset:96 -; GCN-GFX900-HSA-NEXT: global_load_dwordx4 v[8:11], v12, s[2:3] offset:112 -; GCN-GFX900-HSA-NEXT: global_load_dwordx4 v[25:28], v12, s[2:3] offset:80 -; GCN-GFX900-HSA-NEXT: global_load_dwordx4 v[13:16], v12, s[2:3] offset:64 -; GCN-GFX900-HSA-NEXT: global_load_dwordx4 v[17:20], v12, s[2:3] offset:48 -; GCN-GFX900-HSA-NEXT: global_load_dwordx4 v[21:24], v12, s[2:3] offset:32 -; GCN-GFX900-HSA-NEXT: global_load_dwordx4 v[0:3], v12, s[2:3] offset:16 -; GCN-GFX900-HSA-NEXT: s_waitcnt vmcnt(6) -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v32, 31, v7 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v30, 31, v6 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v29, v6 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v31, v7 -; GCN-GFX900-HSA-NEXT: s_waitcnt vmcnt(5) -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v36, 31, v11 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v34, 31, v10 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v40, 31, v9 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v38, 31, v8 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v37, v8 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v39, v9 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v33, v10 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v35, v11 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v5 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v4 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v8, v4 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v10, v5 -; GCN-GFX900-HSA-NEXT: buffer_store_dword v29, off, s[20:23], 0 ; 4-byte Folded Spill -; GCN-GFX900-HSA-NEXT: s_nop 0 -; GCN-GFX900-HSA-NEXT: buffer_store_dword v30, off, s[20:23], 0 offset:4 ; 4-byte Folded Spill -; GCN-GFX900-HSA-NEXT: buffer_store_dword v31, off, s[20:23], 0 offset:8 ; 4-byte Folded Spill -; GCN-GFX900-HSA-NEXT: buffer_store_dword v32, off, s[20:23], 0 offset:12 ; 4-byte Folded Spill -; GCN-GFX900-HSA-NEXT: s_waitcnt vmcnt(7) -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v16 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v15 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v48, 31, v14 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v46, 31, v13 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v45, v13 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v47, v14 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v4, v15 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v6, v16 -; GCN-GFX900-HSA-NEXT: s_waitcnt vmcnt(6) -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v16, 31, v20 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v14, 31, v19 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v52, 31, v18 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v50, 31, v17 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v49, v17 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v51, v18 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v13, v19 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v15, v20 -; GCN-GFX900-HSA-NEXT: s_waitcnt vmcnt(5) -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v20, 31, v24 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v18, 31, v23 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v56, 31, v22 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v54, 31, v21 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v53, v21 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v55, v22 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v17, v23 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v19, v24 -; GCN-GFX900-HSA-NEXT: global_load_dwordx4 v[21:24], v12, s[2:3] -; GCN-GFX900-HSA-NEXT: s_nop 0 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[37:40], s[0:1] offset:224 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[33:36], s[0:1] offset:240 -; GCN-GFX900-HSA-NEXT: buffer_load_dword v33, off, s[20:23], 0 ; 4-byte Folded Reload -; GCN-GFX900-HSA-NEXT: s_nop 0 -; GCN-GFX900-HSA-NEXT: buffer_load_dword v34, off, s[20:23], 0 offset:4 ; 4-byte Folded Reload -; GCN-GFX900-HSA-NEXT: buffer_load_dword v35, off, s[20:23], 0 offset:8 ; 4-byte Folded Reload -; GCN-GFX900-HSA-NEXT: buffer_load_dword v36, off, s[20:23], 0 offset:12 ; 4-byte Folded Reload -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v32, 31, v28 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v30, 31, v27 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v44, 31, v26 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v42, 31, v25 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v41, v25 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v43, v26 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v29, v27 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v31, v28 -; GCN-GFX900-HSA-NEXT: s_waitcnt vmcnt(11) -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v60, 31, v3 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v58, 31, v2 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v28, 31, v1 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v26, 31, v0 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v25, v0 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v27, v1 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v57, v2 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v59, v3 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:192 -; GCN-GFX900-HSA-NEXT: s_waitcnt vmcnt(7) -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v3, 31, v24 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v1, 31, v23 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v0, v23 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v2, v24 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v22 -; GCN-GFX900-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v21 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v8, v21 -; GCN-GFX900-HSA-NEXT: v_mov_b32_e32 v10, v22 -; GCN-GFX900-HSA-NEXT: s_waitcnt vmcnt(1) -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[33:36], s[0:1] offset:208 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[41:44], s[0:1] offset:160 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[29:32], s[0:1] offset:176 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[45:48], s[0:1] offset:128 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:144 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[49:52], s[0:1] offset:96 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[13:16], s[0:1] offset:112 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[53:56], s[0:1] offset:64 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[17:20], s[0:1] offset:80 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[25:28], s[0:1] offset:32 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[57:60], s[0:1] offset:48 -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] -; GCN-GFX900-HSA-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16 -; GCN-GFX900-HSA-NEXT: s_endpgm -; -; GCN-GFX908-HSA-LABEL: global_sextload_v32i32_to_v32i64: -; GCN-GFX908-HSA: ; %bb.0: -; GCN-GFX908-HSA-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v12, 0 -; GCN-GFX908-HSA-NEXT: s_waitcnt lgkmcnt(0) -; GCN-GFX908-HSA-NEXT: global_load_dwordx4 v[4:7], v12, s[2:3] offset:96 -; GCN-GFX908-HSA-NEXT: global_load_dwordx4 v[8:11], v12, s[2:3] offset:112 -; GCN-GFX908-HSA-NEXT: global_load_dwordx4 v[25:28], v12, s[2:3] offset:80 -; GCN-GFX908-HSA-NEXT: global_load_dwordx4 v[13:16], v12, s[2:3] offset:64 -; GCN-GFX908-HSA-NEXT: global_load_dwordx4 v[17:20], v12, s[2:3] offset:48 -; GCN-GFX908-HSA-NEXT: global_load_dwordx4 v[21:24], v12, s[2:3] offset:32 -; GCN-GFX908-HSA-NEXT: global_load_dwordx4 v[0:3], v12, s[2:3] offset:16 -; GCN-GFX908-HSA-NEXT: s_waitcnt vmcnt(6) -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v32, 31, v7 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v30, 31, v6 -; GCN-GFX908-HSA-NEXT: s_waitcnt vmcnt(5) -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v36, 31, v11 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v34, 31, v10 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v40, 31, v9 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v38, 31, v8 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v37, v8 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v39, v9 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v33, v10 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v35, v11 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v5 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v4 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v8, v4 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v10, v5 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v29, v6 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v31, v7 -; GCN-GFX908-HSA-NEXT: s_waitcnt vmcnt(3) -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v16 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v15 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v48, 31, v14 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v46, 31, v13 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v45, v13 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v47, v14 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v4, v15 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v6, v16 -; GCN-GFX908-HSA-NEXT: s_waitcnt vmcnt(2) -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v16, 31, v20 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v14, 31, v19 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v52, 31, v18 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v50, 31, v17 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v49, v17 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v51, v18 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v13, v19 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v15, v20 -; GCN-GFX908-HSA-NEXT: s_waitcnt vmcnt(1) -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v20, 31, v24 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v18, 31, v23 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v56, 31, v22 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v54, 31, v21 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v53, v21 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v55, v22 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v17, v23 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v19, v24 -; GCN-GFX908-HSA-NEXT: global_load_dwordx4 v[21:24], v12, s[2:3] -; GCN-GFX908-HSA-NEXT: v_accvgpr_write_b32 a0, v29 -; GCN-GFX908-HSA-NEXT: v_accvgpr_write_b32 a3, v32 -; GCN-GFX908-HSA-NEXT: v_accvgpr_write_b32 a1, v30 -; GCN-GFX908-HSA-NEXT: v_accvgpr_write_b32 a2, v31 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[37:40], s[0:1] offset:224 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[33:36], s[0:1] offset:240 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v32, 31, v28 -; GCN-GFX908-HSA-NEXT: v_accvgpr_read_b32 v36, a3 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v30, 31, v27 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v44, 31, v26 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v42, 31, v25 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v41, v25 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v43, v26 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v29, v27 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v31, v28 -; GCN-GFX908-HSA-NEXT: s_waitcnt vmcnt(3) -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v60, 31, v3 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v58, 31, v2 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v28, 31, v1 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v26, 31, v0 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v25, v0 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v27, v1 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v57, v2 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v59, v3 -; GCN-GFX908-HSA-NEXT: v_accvgpr_read_b32 v35, a2 -; GCN-GFX908-HSA-NEXT: v_accvgpr_read_b32 v34, a1 -; GCN-GFX908-HSA-NEXT: v_accvgpr_read_b32 v33, a0 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] offset:192 -; GCN-GFX908-HSA-NEXT: s_waitcnt vmcnt(3) -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v3, 31, v24 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v1, 31, v23 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v0, v23 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v2, v24 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v22 -; GCN-GFX908-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v21 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v8, v21 -; GCN-GFX908-HSA-NEXT: v_mov_b32_e32 v10, v22 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[33:36], s[0:1] offset:208 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[41:44], s[0:1] offset:160 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[29:32], s[0:1] offset:176 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[45:48], s[0:1] offset:128 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[4:7], s[0:1] offset:144 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[49:52], s[0:1] offset:96 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[13:16], s[0:1] offset:112 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[53:56], s[0:1] offset:64 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[17:20], s[0:1] offset:80 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[25:28], s[0:1] offset:32 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[57:60], s[0:1] offset:48 -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[8:11], s[0:1] -; GCN-GFX908-HSA-NEXT: global_store_dwordx4 v12, v[0:3], s[0:1] offset:16 -; GCN-GFX908-HSA-NEXT: s_endpgm +; GCN-HSA-LABEL: global_sextload_v32i32_to_v32i64: +; GCN-HSA: ; %bb.0: +; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, 0 +; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) +; GCN-HSA-NEXT: global_load_dwordx4 v[13:16], v12, s[2:3] offset:112 +; GCN-HSA-NEXT: global_load_dwordx4 v[17:20], v12, s[2:3] offset:96 +; GCN-HSA-NEXT: global_load_dwordx4 v[21:24], v12, s[2:3] offset:80 +; GCN-HSA-NEXT: global_load_dwordx4 v[25:28], v12, s[2:3] offset:64 +; GCN-HSA-NEXT: global_load_dwordx4 v[0:3], v12, s[2:3] +; GCN-HSA-NEXT: global_load_dwordx4 v[29:32], v12, s[2:3] offset:48 +; GCN-HSA-NEXT: global_load_dwordx4 v[4:7], v12, s[2:3] offset:16 +; GCN-HSA-NEXT: global_load_dwordx4 v[8:11], v12, s[2:3] offset:32 +; GCN-HSA-NEXT: s_waitcnt vmcnt(7) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v36, 31, v14 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v34, 31, v13 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, v13 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, v14 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[33:36], s[0:1] offset:224 +; GCN-HSA-NEXT: s_waitcnt vmcnt(7) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v14, 31, v17 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v34, 31, v15 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, v15 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v36, 31, v16 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, v16 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, v17 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v16, 31, v18 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, v18 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[33:36], s[0:1] offset:240 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[13:16], s[0:1] offset:192 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v34, 31, v19 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, v19 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v36, 31, v20 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, v20 +; GCN-HSA-NEXT: s_waitcnt vmcnt(8) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v14, 31, v21 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, v21 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v16, 31, v22 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, v22 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v18, 31, v23 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, v23 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[33:36], s[0:1] offset:208 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v20, 31, v24 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, v24 +; GCN-HSA-NEXT: s_waitcnt vmcnt(8) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v22, 31, v25 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, v25 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v24, 31, v26 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, v26 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v36, 31, v28 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[13:16], s[0:1] offset:160 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v34, 31, v27 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, v27 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, v28 +; GCN-HSA-NEXT: s_waitcnt vmcnt(8) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v16, 31, v3 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v14, 31, v2 +; GCN-HSA-NEXT: s_waitcnt vmcnt(7) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v28, 31, v30 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v26, 31, v29 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, v29 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, v30 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v40, 31, v32 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v38, 31, v31 +; GCN-HSA-NEXT: v_mov_b32_e32 v37, v31 +; GCN-HSA-NEXT: v_mov_b32_e32 v39, v32 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, v2 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, v3 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[17:20], s[0:1] offset:176 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[21:24], s[0:1] offset:128 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v20, 31, v1 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v18, 31, v0 +; GCN-HSA-NEXT: s_waitcnt vmcnt(8) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v24, 31, v7 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v22, 31, v6 +; GCN-HSA-NEXT: s_waitcnt vmcnt(7) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v32, 31, v9 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[33:36], s[0:1] offset:144 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v30, 31, v8 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, v8 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, v9 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v36, 31, v5 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v34, 31, v4 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v44, 31, v11 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[25:28], s[0:1] offset:96 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v42, 31, v10 +; GCN-HSA-NEXT: v_mov_b32_e32 v41, v10 +; GCN-HSA-NEXT: v_mov_b32_e32 v43, v11 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, v4 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, v5 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, v6 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, v7 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, v0 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, v1 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[37:40], s[0:1] offset:112 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[29:32], s[0:1] offset:64 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[41:44], s[0:1] offset:80 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[33:36], s[0:1] offset:32 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[21:24], s[0:1] offset:48 +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[17:20], s[0:1] +; GCN-HSA-NEXT: global_store_dwordx4 v12, v[13:16], s[0:1] offset:16 +; GCN-HSA-NEXT: s_endpgm %ld = load <32 x i32>, ptr addrspace(1) %in %ext = sext <32 x i32> %ld to <32 x i64> store <32 x i64> %ext, ptr addrspace(1) %out @@ -3894,13 +3765,13 @@ define amdgpu_kernel void @global_zextload_v32i32_to_v32i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 ; GCNX3-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCNX3-HSA-NEXT: s_add_u32 s4, s2, 16 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCNX3-HSA-NEXT: s_addc_u32 s5, s3, 0 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCNX3-HSA-NEXT: s_add_u32 s6, s2, 32 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCNX3-HSA-NEXT: flat_load_dwordx4 v[32:35], v[0:1] ; GCNX3-HSA-NEXT: s_addc_u32 s7, s3, 0 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCNX3-HSA-NEXT: s_add_u32 s8, s2, 48 -; GCNX3-HSA-NEXT: flat_load_dwordx4 v[28:31], v[0:1] ; GCNX3-HSA-NEXT: s_addc_u32 s9, s3, 0 ; GCNX3-HSA-NEXT: s_add_u32 s10, s2, 64 ; GCNX3-HSA-NEXT: s_addc_u32 s11, s3, 0 @@ -3912,7 +3783,7 @@ define amdgpu_kernel void @global_zextload_v32i32_to_v32i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCNX3-HSA-NEXT: flat_load_dwordx4 v[32:35], v[0:1] +; GCNX3-HSA-NEXT: flat_load_dwordx4 v[28:31], v[0:1] ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s14 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s15 ; GCNX3-HSA-NEXT: flat_load_dwordx4 v[24:27], v[0:1] @@ -3921,111 +3792,109 @@ define amdgpu_kernel void @global_zextload_v32i32_to_v32i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: flat_load_dwordx4 v[20:23], v[0:1] ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s10 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s11 -; GCNX3-HSA-NEXT: flat_load_dwordx4 v[16:19], v[0:1] +; GCNX3-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, s8 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, s9 -; GCNX3-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] +; GCNX3-HSA-NEXT: flat_load_dwordx4 v[16:19], v[0:1] ; GCNX3-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v9, s7 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v6, s6 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v5, s5 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v8, s6 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v7, s7 +; GCNX3-HSA-NEXT: flat_load_dwordx4 v[8:11], v[6:7] ; GCNX3-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] -; GCNX3-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, 0 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 16 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v3, v1 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v1, 0 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v37, s1 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v3, v1 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v36, s0 ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(7) -; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v28 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v29 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v29, s1 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, s0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[28:29], v[0:3] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v29, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xe0 -; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v30 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v31 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v31, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v30, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xf0 -; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[28:29], v[0:3] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v29, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xc0 -; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: s_waitcnt vmcnt(8) ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v32 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v33 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[30:31], v[0:3] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v31, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v30, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xd0 -; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v33, s3 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v32, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xa0 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xe0 +; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[36:37], v[0:3] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v37, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v36, s2 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xf0 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v34 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v35 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[32:33], v[0:3] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v33, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v32, s2 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xc0 +; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v35, s3 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v34, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xb0 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xd0 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[28:29], v[0:3] +; GCNX3-HSA-NEXT: s_waitcnt vmcnt(8) +; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v28 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v29 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v29, s3 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v28, s2 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xa0 +; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[36:37], v[0:3] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v37, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v36, s2 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0xb0 +; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v30 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v31 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v31, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v30, s2 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x80 ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[32:33], v[0:3] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v33, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v32, s2 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x90 +; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(9) ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v24 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v25 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v25, s3 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v24, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x90 +; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x60 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[34:35], v[0:3] ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[30:31], v[0:3] -; GCNX3-HSA-NEXT: s_nop 0 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v26 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v27 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v27, s3 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v26, s2 -; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x60 -; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[32:33], v[0:3] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v31, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v35, s3 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[28:29], v[0:3] +; GCNX3-HSA-NEXT: v_mov_b32_e32 v34, s2 ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(10) ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v20 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v21 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[34:35], v[0:3] -; GCNX3-HSA-NEXT: v_mov_b32_e32 v30, s2 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v22 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v23 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 0x70 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[28:29], v[0:3] +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[36:37], v[0:3] ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v22 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v23 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[30:31], v[0:3] ; GCNX3-HSA-NEXT: s_waitcnt vmcnt(11) -; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v16 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v17 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3] -; GCNX3-HSA-NEXT: s_nop 0 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v18 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v19 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[26:27], v[0:3] -; GCNX3-HSA-NEXT: s_waitcnt vmcnt(12) ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v12 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v13 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[32:33], v[0:3] ; GCNX3-HSA-NEXT: v_mov_b32_e32 v13, s3 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v14 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v15 +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3] ; GCNX3-HSA-NEXT: v_mov_b32_e32 v12, s2 +; GCNX3-HSA-NEXT: s_waitcnt vmcnt(12) +; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v16 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v17 ; GCNX3-HSA-NEXT: s_add_u32 s2, s0, 64 -; GCNX3-HSA-NEXT: flat_store_dwordx4 v[30:31], v[0:3] +; GCNX3-HSA-NEXT: flat_store_dwordx4 v[34:35], v[0:3] ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v14 -; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v15 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v18 +; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v19 ; GCNX3-HSA-NEXT: flat_store_dwordx4 v[12:13], v[0:3] -; GCNX3-HSA-NEXT: s_waitcnt vmcnt(12) +; GCNX3-HSA-NEXT: s_waitcnt vmcnt(13) ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v8 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v9 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v9, s3 @@ -4041,6 +3910,7 @@ define amdgpu_kernel void @global_zextload_v32i32_to_v32i64(ptr addrspace(1) %ou ; GCNX3-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCNX3-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GCNX3-HSA-NEXT: s_add_u32 s0, s0, 48 +; GCNX3-HSA-NEXT: s_waitcnt vmcnt(14) ; GCNX3-HSA-NEXT: v_mov_b32_e32 v0, v4 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v2, v5 ; GCNX3-HSA-NEXT: v_mov_b32_e32 v5, s3 @@ -4594,3 +4464,6 @@ define amdgpu_kernel void @global_load_v32i32(ptr addrspace(1) %out, ptr addrspa } attributes #0 = { nounwind "amdgpu-flat-work-group-size"="1024,1024" } +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; GCN-GFX900-HSA: {{.*}} +; GCN-GFX908-HSA: {{.*}} diff --git a/llvm/test/CodeGen/AMDGPU/load-global-i8.ll b/llvm/test/CodeGen/AMDGPU/load-global-i8.ll index f074770ad6e92..ac3cdc198f162 100644 --- a/llvm/test/CodeGen/AMDGPU/load-global-i8.ll +++ b/llvm/test/CodeGen/AMDGPU/load-global-i8.ll @@ -2075,36 +2075,36 @@ define amdgpu_kernel void @global_zextload_v16i8_to_v16i32(ptr addrspace(1) %out ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s1 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s0 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 16 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s3 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s0 ; GCN-HSA-NEXT: s_waitcnt vmcnt(0) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v10, 24, v3 -; GCN-HSA-NEXT: v_bfe_u32 v8, v3, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v7, 0xff, v3 -; GCN-HSA-NEXT: v_bfe_u32 v9, v3, 16, 8 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v18, 24, v3 +; GCN-HSA-NEXT: v_bfe_u32 v16, v3, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v15, 0xff, v3 +; GCN-HSA-NEXT: v_bfe_u32 v17, v3, 16, 8 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v14, 24, v2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[11:12], v[15:18] +; GCN-HSA-NEXT: v_bfe_u32 v12, v2, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v11, 0xff, v2 +; GCN-HSA-NEXT: v_bfe_u32 v13, v2, 16, 8 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 24, v0 ; GCN-HSA-NEXT: v_bfe_u32 v4, v0, 8, 8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[11:12], v[7:10] -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v14, 24, v2 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v10, 24, v1 ; GCN-HSA-NEXT: v_bfe_u32 v8, v1, 8, 8 -; GCN-HSA-NEXT: v_bfe_u32 v12, v2, 8, 8 ; GCN-HSA-NEXT: v_and_b32_e32 v3, 0xff, v0 ; GCN-HSA-NEXT: v_bfe_u32 v5, v0, 16, 8 ; GCN-HSA-NEXT: v_and_b32_e32 v7, 0xff, v1 ; GCN-HSA-NEXT: v_bfe_u32 v9, v1, 16, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v11, 0xff, v2 -; GCN-HSA-NEXT: v_bfe_u32 v13, v2, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[11:14] -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[7:10] -; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[3:6] +; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[11:14] +; GCN-HSA-NEXT: flat_store_dwordx4 v[23:24], v[7:10] +; GCN-HSA-NEXT: flat_store_dwordx4 v[19:20], v[3:6] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_zextload_v16i8_to_v16i32: @@ -2298,38 +2298,38 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i32(ptr addrspace(1) %out ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s1 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 16 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s0 ; GCN-HSA-NEXT: s_waitcnt vmcnt(0) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 24, v3 -; GCN-HSA-NEXT: v_bfe_i32 v10, v3, 16, 8 -; GCN-HSA-NEXT: v_bfe_i32 v9, v3, 8, 8 -; GCN-HSA-NEXT: v_bfe_i32 v8, v3, 0, 8 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 24, v3 +; GCN-HSA-NEXT: v_bfe_i32 v14, v3, 16, 8 +; GCN-HSA-NEXT: v_bfe_i32 v13, v3, 8, 8 +; GCN-HSA-NEXT: v_bfe_i32 v12, v3, 0, 8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[12:15] ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 24, v0 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 24, v2 +; GCN-HSA-NEXT: v_bfe_i32 v14, v2, 16, 8 +; GCN-HSA-NEXT: v_bfe_i32 v13, v2, 8, 8 +; GCN-HSA-NEXT: v_bfe_i32 v12, v2, 0, 8 ; GCN-HSA-NEXT: v_bfe_i32 v6, v0, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v5, v0, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v4, v0, 0, 8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[8:11] -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 24, v2 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 24, v1 ; GCN-HSA-NEXT: v_bfe_i32 v10, v1, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v9, v1, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v8, v1, 0, 8 -; GCN-HSA-NEXT: v_bfe_i32 v14, v2, 16, 8 -; GCN-HSA-NEXT: v_bfe_i32 v13, v2, 8, 8 -; GCN-HSA-NEXT: v_bfe_i32 v12, v2, 0, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15] -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11] +; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[8:11] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[4:7] ; GCN-HSA-NEXT: s_endpgm ; @@ -2509,47 +2509,49 @@ define amdgpu_kernel void @global_zextload_v32i8_to_v32i32(ptr addrspace(1) %out ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v11, 24, v0 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v10, 24, v0 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v35, 24, v7 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v33, v7, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v32, 0xff, v7 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v34, v7, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v9, v0, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v15, 24, v1 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v13, v1, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v19, 24, v2 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v17, v2, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v23, 24, v3 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v21, v3, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v8, 0xff, v0 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v10, v0, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v12, 0xff, v1 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v14, v1, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v16, 0xff, v2 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v18, v2, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v20, 0xff, v3 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v22, v3, 16, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v3, 24, v4 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v1, v4, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v27, 24, v5 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v25, v5, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v31, 24, v6 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v29, v6, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v0, 0xff, v4 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v2, v4, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v24, 0xff, v5 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v26, v5, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v28, 0xff, v6 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v30, v6, 16, 8 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 24, v7 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v28, v7, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v27, 0xff, v7 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v29, v7, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 24, v6 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v28, v6, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v27, 0xff, v6 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v29, v6, 16, 8 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 24, v4 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v24, v4, 8, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 24, v5 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v28, v5, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v27, 0xff, v5 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v29, v5, 16, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v23, 0xff, v4 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v25, v4, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v8, v0, 8, 8 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v14, 24, v1 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v12, v1, 8, 8 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v18, 24, v2 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v16, v2, 8, 8 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v22, 24, v3 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v20, v3, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v7, 0xff, v0 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v9, v0, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v11, 0xff, v1 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v13, v1, 16, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v15, 0xff, v2 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v17, v2, 16, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v19, 0xff, v3 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v21, v3, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: global_zextload_v32i8_to_v32i32: @@ -2581,64 +2583,64 @@ define amdgpu_kernel void @global_zextload_v32i8_to_v32i32(ptr addrspace(1) %out ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s1 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s0 +; GCN-HSA-NEXT: s_add_u32 s0, s0, 64 +; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s0 ; GCN-HSA-NEXT: s_waitcnt vmcnt(1) ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 24, v7 ; GCN-HSA-NEXT: v_bfe_u32 v9, v7, 8, 8 ; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xff, v7 ; GCN-HSA-NEXT: v_bfe_u32 v10, v7, 16, 8 ; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[8:11] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_and_b32_e32 v7, 0xff, v6 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v10, 24, v6 ; GCN-HSA-NEXT: v_bfe_u32 v8, v6, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v7, 0xff, v6 ; GCN-HSA-NEXT: v_bfe_u32 v9, v6, 16, 8 ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[7:10] -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 +; GCN-HSA-NEXT: v_and_b32_e32 v6, 0xff, v5 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 24, v5 ; GCN-HSA-NEXT: v_bfe_u32 v7, v5, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v6, 0xff, v5 ; GCN-HSA-NEXT: v_bfe_u32 v8, v5, 16, 8 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[6:9] -; GCN-HSA-NEXT: v_and_b32_e32 v5, 0xff, v4 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v8, 24, v4 -; GCN-HSA-NEXT: v_bfe_u32 v6, v4, 8, 8 -; GCN-HSA-NEXT: v_bfe_u32 v7, v4, 16, 8 -; GCN-HSA-NEXT: s_add_u32 s0, s0, 64 -; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[5:8] +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 24, v4 +; GCN-HSA-NEXT: v_bfe_u32 v9, v4, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xff, v4 +; GCN-HSA-NEXT: v_bfe_u32 v10, v4, 16, 8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[8:11] ; GCN-HSA-NEXT: s_waitcnt vmcnt(4) -; GCN-HSA-NEXT: v_and_b32_e32 v4, 0xff, v3 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 24, v3 -; GCN-HSA-NEXT: v_bfe_u32 v5, v3, 8, 8 -; GCN-HSA-NEXT: v_bfe_u32 v6, v3, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3 -; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 24, v0 -; GCN-HSA-NEXT: v_bfe_u32 v9, v0, 8, 8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[4:7] ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 24, v2 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 24, v1 -; GCN-HSA-NEXT: v_bfe_u32 v4, v1, 8, 8 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 24, v3 +; GCN-HSA-NEXT: v_bfe_u32 v17, v3, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v16, 0xff, v3 +; GCN-HSA-NEXT: v_bfe_u32 v18, v3, 16, 8 ; GCN-HSA-NEXT: v_bfe_u32 v13, v2, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xff, v0 -; GCN-HSA-NEXT: v_bfe_u32 v10, v0, 16, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v3, 0xff, v1 -; GCN-HSA-NEXT: v_bfe_u32 v5, v1, 16, 8 ; GCN-HSA-NEXT: v_and_b32_e32 v12, 0xff, v2 ; GCN-HSA-NEXT: v_bfe_u32 v14, v2, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[12:15] -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[3:6] -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11] +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 24, v0 +; GCN-HSA-NEXT: v_bfe_u32 v5, v0, 8, 8 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 24, v1 +; GCN-HSA-NEXT: v_bfe_u32 v9, v1, 8, 8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] +; GCN-HSA-NEXT: v_and_b32_e32 v4, 0xff, v0 +; GCN-HSA-NEXT: v_bfe_u32 v6, v0, 16, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xff, v1 +; GCN-HSA-NEXT: v_bfe_u32 v10, v1, 16, 8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[12:15] +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[8:11] +; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[4:7] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_zextload_v32i8_to_v32i32: @@ -2656,47 +2658,47 @@ define amdgpu_kernel void @global_zextload_v32i8_to_v32i32(ptr addrspace(1) %out ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v11, 24, v0 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v10, 24, v0 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v35, 24, v7 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v33, v7, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v32, 0xff, v7 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v34, v7, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v9, v0, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v15, 24, v1 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v13, v1, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v19, 24, v2 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v17, v2, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v23, 24, v3 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v21, v3, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v8, 0xff, v0 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v10, v0, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v12, 0xff, v1 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v14, v1, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v16, 0xff, v2 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v18, v2, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xff, v3 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v22, v3, 16, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v3, 24, v4 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v1, v4, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v27, 24, v5 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v25, v5, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v31, 24, v6 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v29, v6, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v0, 0xff, v4 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v2, v4, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v24, 0xff, v5 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v26, v5, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v28, 0xff, v6 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v30, v6, 16, 8 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v30, 24, v7 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v28, v7, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v27, 0xff, v7 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v29, v7, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v26, 24, v4 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v30, 24, v6 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v28, v6, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v27, 0xff, v6 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v29, v6, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v24, v4, 8, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v23, 0xff, v4 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v30, 24, v5 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v28, v5, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v27, 0xff, v5 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v29, v5, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v25, v4, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v8, v0, 8, 8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v14, 24, v1 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v12, v1, 8, 8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v18, 24, v2 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v16, v2, 8, 8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v22, 24, v3 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v20, v3, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v7, 0xff, v0 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v9, v0, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v11, 0xff, v1 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v13, v1, 16, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v15, 0xff, v2 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v17, v2, 16, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v19, 0xff, v3 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v21, v3, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:64 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 ; GCN-NOHSA-VI-NEXT: s_endpgm ; ; EG-LABEL: global_zextload_v32i8_to_v32i32: @@ -2894,10 +2896,14 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i32(ptr addrspace(1) %out ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(1) ; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v11, 24, v0 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v35, 24, v7 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v34, v7, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v33, v7, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v32, v7, 0, 8 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 24, v7 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v22, v7, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v7, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v7, 0, 8 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v27, 24, v6 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v26, v6, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v25, v6, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v24, v6, 0, 8 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v10, v0, 16, 8 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v9, v0, 8, 8 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v8, v0, 0, 8 @@ -2909,24 +2915,22 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i32(ptr addrspace(1) %out ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v18, v2, 16, 8 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v17, v2, 8, 8 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v16, v2, 0, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 24, v3 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:96 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v22, v3, 16, 8 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v27, 24, v5 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v26, v5, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v25, v5, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v24, v5, 0, 8 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v3, 8, 8 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v3, 0, 8 ; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v3, 24, v4 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v2, v4, 16, 8 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v1, v4, 8, 8 ; GCN-NOHSA-SI-NEXT: v_bfe_i32 v0, v4, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v27, 24, v5 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v26, v5, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v25, v5, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v24, v5, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v31, 24, v6 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v30, v6, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v29, v6, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v28, v6, 0, 8 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:80 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:48 @@ -2964,64 +2968,64 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i32(ptr addrspace(1) %out ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s1 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s0 +; GCN-HSA-NEXT: s_add_u32 s0, s0, 64 +; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s2 ; GCN-HSA-NEXT: s_waitcnt vmcnt(1) ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v10, 24, v7 ; GCN-HSA-NEXT: v_bfe_i32 v9, v7, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v8, v7, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v7, v7, 0, 8 ; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[7:10] -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: s_waitcnt vmcnt(1) +; GCN-HSA-NEXT: v_bfe_i32 v14, v3, 16, 8 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 24, v6 ; GCN-HSA-NEXT: v_bfe_i32 v8, v6, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v7, v6, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v6, v6, 0, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s3 ; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[6:9] -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 24, v3 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v8, 24, v5 ; GCN-HSA-NEXT: v_bfe_i32 v7, v5, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v6, v5, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v5, v5, 0, 8 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[5:8] -; GCN-HSA-NEXT: s_add_u32 s0, s0, 64 +; GCN-HSA-NEXT: v_bfe_i32 v13, v3, 8, 8 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 24, v4 ; GCN-HSA-NEXT: v_bfe_i32 v6, v4, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v5, v4, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v4, v4, 0, 8 ; GCN-HSA-NEXT: flat_store_dwordx4 v[11:12], v[4:7] -; GCN-HSA-NEXT: s_waitcnt vmcnt(4) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 24, v3 -; GCN-HSA-NEXT: v_bfe_i32 v10, v3, 16, 8 -; GCN-HSA-NEXT: v_bfe_i32 v9, v3, 8, 8 -; GCN-HSA-NEXT: v_bfe_i32 v8, v3, 0, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3 -; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 +; GCN-HSA-NEXT: v_bfe_i32 v12, v3, 0, 8 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s1 +; GCN-HSA-NEXT: flat_store_dwordx4 v[19:20], v[12:15] +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s0 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 24, v2 +; GCN-HSA-NEXT: v_bfe_i32 v14, v2, 16, 8 +; GCN-HSA-NEXT: v_bfe_i32 v13, v2, 8, 8 +; GCN-HSA-NEXT: v_bfe_i32 v12, v2, 0, 8 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 24, v0 ; GCN-HSA-NEXT: v_bfe_i32 v6, v0, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v5, v0, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v4, v0, 0, 8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[8:11] -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 24, v2 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 24, v1 ; GCN-HSA-NEXT: v_bfe_i32 v10, v1, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v9, v1, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v8, v1, 0, 8 -; GCN-HSA-NEXT: v_bfe_i32 v14, v2, 16, 8 -; GCN-HSA-NEXT: v_bfe_i32 v13, v2, 8, 8 -; GCN-HSA-NEXT: v_bfe_i32 v12, v2, 0, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[19:20], v[12:15] -; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7] +; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[12:15] +; GCN-HSA-NEXT: flat_store_dwordx4 v[23:24], v[8:11] +; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[4:7] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_sextload_v32i8_to_v32i32: @@ -3041,10 +3045,14 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i32(ptr addrspace(1) %out ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(1) ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v11, 24, v0 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v35, 24, v7 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v34, v7, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v33, v7, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v32, v7, 0, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 24, v7 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v7, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v7, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v7, 0, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v27, 24, v6 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v26, v6, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v25, v6, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v24, v6, 0, 8 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v10, v0, 16, 8 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v9, v0, 8, 8 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v8, v0, 0, 8 @@ -3056,24 +3064,20 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i32(ptr addrspace(1) %out ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v18, v2, 16, 8 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v17, v2, 8, 8 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v16, v2, 0, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:96 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 24, v3 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v3, 16, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v27, 24, v5 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v26, v5, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v25, v5, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v24, v5, 0, 8 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v3, 8, 8 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v3, 0, 8 ; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v3, 24, v4 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v2, v4, 16, 8 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v1, v4, 8, 8 ; GCN-NOHSA-VI-NEXT: v_bfe_i32 v0, v4, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v27, 24, v5 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v26, v5, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v25, v5, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v24, v5, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v31, 24, v6 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v30, v6, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v29, v6, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v28, v6, 0, 8 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:80 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:48 @@ -3313,115 +3317,112 @@ define amdgpu_kernel void @global_zextload_v64i8_to_v64i32(ptr addrspace(1) %out ; GCN-NOHSA-SI-LABEL: global_zextload_v64i8_to_v64i32: ; GCN-NOHSA-SI: ; %bb.0: ; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s12, SCRATCH_RSRC_DWORD0 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s13, SCRATCH_RSRC_DWORD1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s14, -1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s15, 0xe8f000 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-SI-NEXT: s_add_u32 s12, s12, s11 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s10, s2 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s3 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-SI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s3 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[28:31], off, s[8:11], 0 offset:16 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[32:35], off, s[8:11], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[36:39], off, s[8:11], 0 offset:48 -; GCN-NOHSA-SI-NEXT: s_addc_u32 s13, s13, 0 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(3) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v3, 24, v17 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v1, v17, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v0, 0xff, v17 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v2, v17, 16, 8 -; GCN-NOHSA-SI-NEXT: buffer_store_dword v0, off, s[12:15], 0 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v3, 24, v38 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v1, v38, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v0, 0xff, v38 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v2, v38, 16, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v7, 24, v16 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v5, v16, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v11, 24, v19 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v9, v19, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v15, 24, v18 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v13, v18, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v4, 0xff, v16 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v6, v16, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v8, 0xff, v19 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v10, v19, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v12, 0xff, v18 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v14, v18, 16, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v19, 24, v29 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v17, v29, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v23, 24, v28 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v21, v28, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v27, 24, v31 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v25, v31, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v43, 24, v30 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v41, v30, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v16, 0xff, v29 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v18, v29, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v20, 0xff, v28 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v22, v28, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v24, 0xff, v31 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v26, v31, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v40, 0xff, v30 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v42, v30, 16, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v29, v33, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v47, 24, v32 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v45, v32, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v51, 24, v35 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v49, v35, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v55, 24, v34 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v53, v34, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v28, 0xff, v33 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v30, v33, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v44, 0xff, v32 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v46, v32, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v48, 0xff, v35 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v50, v35, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v52, 0xff, v34 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v54, v34, 16, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v35, 24, v37 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v33, v37, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v59, 24, v36 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v57, v36, 8, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v63, 24, v39 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v61, v39, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v32, 0xff, v37 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v34, v37, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v56, 0xff, v36 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v58, v36, 16, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v60, 0xff, v39 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v62, v39, 16, 8 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[60:63], off, s[0:3], 0 offset:240 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[56:59], off, s[0:3], 0 offset:192 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:208 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[52:55], off, s[0:3], 0 offset:160 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[48:51], off, s[0:3], 0 offset:176 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[44:47], off, s[0:3], 0 offset:128 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:144 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[40:43], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 -; GCN-NOHSA-SI-NEXT: buffer_load_dword v0, off, s[12:15], 0 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v3, 24, v5 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(2) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v23, 24, v18 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v21, v18, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v20, 0xff, v18 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v22, v18, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:224 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v23, 24, v19 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v21, v19, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v20, 0xff, v19 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v22, v19, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:240 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(3) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 24, v14 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v24, v14, 8, 8 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v23, 0xff, v14 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v25, v14, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:160 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 24, v15 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v24, v15, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v23, 0xff, v15 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v25, v15, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:176 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 24, v12 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v24, v12, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v23, 0xff, v12 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v25, v12, 16, 8 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(4) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 24, v10 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v28, v10, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v27, 0xff, v10 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v29, v10, 16, 8 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v22, 24, v16 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v20, v16, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v19, 0xff, v16 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v21, v16, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:128 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 24, v13 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v24, v13, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v23, 0xff, v13 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v25, v13, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 24, v11 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v28, v11, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v27, 0xff, v11 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v29, v11, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:192 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v22, 24, v17 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v20, v17, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v19, 0xff, v17 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v21, v17, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:144 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 24, v9 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v24, v9, 8, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 24, v8 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v28, v8, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v27, 0xff, v8 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v29, v8, 16, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v23, 0xff, v9 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v25, v9, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v1, v5, 8, 8 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v18, 24, v4 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v16, v4, 8, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:208 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v22, 24, v7 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v20, v7, 8, 8 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v14, 24, v6 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v12, v6, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v0, 0xff, v5 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v2, v5, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v15, 0xff, v4 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v17, v4, 16, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v19, 0xff, v7 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v21, v7, 16, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v11, 0xff, v6 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v13, v6, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_endpgm ; @@ -3437,12 +3438,12 @@ define amdgpu_kernel void @global_zextload_v64i8_to_v64i32(ptr addrspace(1) %out ; GCN-HSA-NEXT: s_add_u32 s6, s2, 32 ; GCN-HSA-NEXT: s_addc_u32 s7, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s7 -; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[4:5] ; GCN-HSA-NEXT: s_add_u32 s2, s2, 48 +; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[4:5] ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 @@ -3468,6 +3469,10 @@ define amdgpu_kernel void @global_zextload_v64i8_to_v64i32(ptr addrspace(1) %out ; GCN-HSA-NEXT: s_addc_u32 s17, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v21, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s16 +; GCN-HSA-NEXT: v_mov_b32_e32 v30, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, s14 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s13 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s12 ; GCN-HSA-NEXT: s_waitcnt vmcnt(3) ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 24, v2 ; GCN-HSA-NEXT: v_bfe_u32 v17, v2, 8, 8 @@ -3475,241 +3480,224 @@ define amdgpu_kernel void @global_zextload_v64i8_to_v64i32(ptr addrspace(1) %out ; GCN-HSA-NEXT: v_bfe_u32 v18, v2, 16, 8 ; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] ; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2 ; GCN-HSA-NEXT: s_waitcnt vmcnt(3) ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 24, v14 ; GCN-HSA-NEXT: v_bfe_u32 v17, v14, 8, 8 ; GCN-HSA-NEXT: v_and_b32_e32 v16, 0xff, v14 ; GCN-HSA-NEXT: v_bfe_u32 v18, v14, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2 ; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s5 +; GCN-HSA-NEXT: s_waitcnt vmcnt(3) +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v28, 24, v9 +; GCN-HSA-NEXT: v_bfe_u32 v26, v9, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v25, 0xff, v9 +; GCN-HSA-NEXT: v_bfe_u32 v27, v9, 16, 8 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xb0 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s4 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 24, v15 ; GCN-HSA-NEXT: v_bfe_u32 v17, v15, 8, 8 ; GCN-HSA-NEXT: v_and_b32_e32 v16, 0xff, v15 ; GCN-HSA-NEXT: v_bfe_u32 v18, v15, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[16:19] -; GCN-HSA-NEXT: v_bfe_u32 v15, v12, 8, 8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[29:30], v[25:28] +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v28, 24, v3 +; GCN-HSA-NEXT: v_bfe_u32 v26, v3, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v25, 0xff, v3 +; GCN-HSA-NEXT: v_bfe_u32 v27, v3, 16, 8 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s1 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s7 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 24, v12 +; GCN-HSA-NEXT: v_bfe_u32 v15, v12, 8, 8 ; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xff, v12 ; GCN-HSA-NEXT: v_bfe_u32 v16, v12, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[25:28] +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s6 ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[14:17] ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s9 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 24, v13 ; GCN-HSA-NEXT: v_bfe_u32 v15, v13, 8, 8 ; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xff, v13 ; GCN-HSA-NEXT: v_bfe_u32 v16, v13, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s7 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[14:17] -; GCN-HSA-NEXT: s_waitcnt vmcnt(6) -; GCN-HSA-NEXT: v_bfe_u32 v13, v10, 8, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s11 +; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[14:17] +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s11 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 24, v10 +; GCN-HSA-NEXT: v_bfe_u32 v13, v10, 8, 8 ; GCN-HSA-NEXT: v_and_b32_e32 v12, 0xff, v10 ; GCN-HSA-NEXT: v_bfe_u32 v14, v10, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s10 -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15] -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s13 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 24, v11 -; GCN-HSA-NEXT: v_bfe_u32 v13, v11, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v12, 0xff, v11 -; GCN-HSA-NEXT: v_bfe_u32 v14, v11, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s12 -; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[12:15] -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 24, v8 -; GCN-HSA-NEXT: v_bfe_u32 v11, v8, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v10, 0xff, v8 -; GCN-HSA-NEXT: v_bfe_u32 v12, v8, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s15 -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s2 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 24, v9 -; GCN-HSA-NEXT: v_bfe_u32 v11, v9, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v10, 0xff, v9 -; GCN-HSA-NEXT: v_bfe_u32 v12, v9, 16, 8 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 -; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[10:13] -; GCN-HSA-NEXT: v_bfe_u32 v9, v3, 8, 8 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 24, v3 -; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xff, v3 -; GCN-HSA-NEXT: v_bfe_u32 v10, v3, 16, 8 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90 -; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[8:11] -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v20, 24, v1 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 24, v0 -; GCN-HSA-NEXT: v_bfe_u32 v9, v0, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xff, v0 -; GCN-HSA-NEXT: v_bfe_u32 v10, v0, 16, 8 -; GCN-HSA-NEXT: v_bfe_u32 v18, v1, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xff, v1 -; GCN-HSA-NEXT: v_bfe_u32 v19, v1, 16, 8 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v28, 24, v1 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v32, 24, v0 +; GCN-HSA-NEXT: v_bfe_u32 v30, v0, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v29, 0xff, v0 +; GCN-HSA-NEXT: v_bfe_u32 v31, v0, 16, 8 +; GCN-HSA-NEXT: v_bfe_u32 v26, v1, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v25, 0xff, v1 +; GCN-HSA-NEXT: v_bfe_u32 v27, v1, 16, 8 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s10 +; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15] +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 24, v11 +; GCN-HSA-NEXT: v_bfe_u32 v14, v11, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v13, 0xff, v11 +; GCN-HSA-NEXT: v_bfe_u32 v15, v11, 16, 8 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 +; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[13:16] +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v20, 24, v8 +; GCN-HSA-NEXT: v_bfe_u32 v18, v8, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xff, v8 +; GCN-HSA-NEXT: v_bfe_u32 v19, v8, 16, 8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[25:28] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: s_waitcnt vmcnt(10) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 24, v5 -; GCN-HSA-NEXT: v_bfe_u32 v14, v5, 8, 8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[8:11] -; GCN-HSA-NEXT: v_and_b32_e32 v13, 0xff, v5 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 24, v4 -; GCN-HSA-NEXT: v_bfe_u32 v9, v4, 8, 8 -; GCN-HSA-NEXT: v_bfe_u32 v15, v5, 16, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xff, v4 -; GCN-HSA-NEXT: v_bfe_u32 v10, v4, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[17:20] +; GCN-HSA-NEXT: s_waitcnt vmcnt(11) +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v24, 24, v6 +; GCN-HSA-NEXT: v_bfe_u32 v22, v6, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v21, 0xff, v6 +; GCN-HSA-NEXT: v_bfe_u32 v23, v6, 16, 8 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[17:20] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[21:24] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v20, 24, v6 -; GCN-HSA-NEXT: v_bfe_u32 v18, v6, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xff, v6 -; GCN-HSA-NEXT: v_bfe_u32 v19, v6, 16, 8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[17:20] -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 24, v7 -; GCN-HSA-NEXT: v_bfe_u32 v1, v7, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v0, 0xff, v7 -; GCN-HSA-NEXT: v_bfe_u32 v2, v7, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v20, 24, v7 +; GCN-HSA-NEXT: v_bfe_u32 v18, v7, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xff, v7 +; GCN-HSA-NEXT: v_bfe_u32 v19, v7, 16, 8 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[17:20] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 24, v4 +; GCN-HSA-NEXT: v_bfe_u32 v14, v4, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v13, 0xff, v4 +; GCN-HSA-NEXT: v_bfe_u32 v15, v4, 16, 8 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 0x50 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[13:16] ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 24, v5 +; GCN-HSA-NEXT: v_bfe_u32 v10, v5, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v9, 0xff, v5 +; GCN-HSA-NEXT: v_bfe_u32 v11, v5, 16, 8 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[13:16] +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[29:32] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[9:12] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_zextload_v64i8_to_v64i32: ; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s90, -1 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s91, 0xe80000 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s3, 0xf000 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-VI-NEXT: s_add_u32 s88, s88, s11 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s10, s2 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, s3 ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-VI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, s3 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[28:31], off, s[8:11], 0 offset:16 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[32:35], off, s[8:11], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[36:39], off, s[8:11], 0 offset:48 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s89, s89, 0 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:16 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(3) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v3, 24, v17 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v1, v17, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v0, 0xff, v17 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v2, v17, 16, 8 -; GCN-NOHSA-VI-NEXT: buffer_store_dword v0, off, s[88:91], 0 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v2, off, s[88:91], 0 offset:8 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v3, off, s[88:91], 0 offset:12 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(4) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v3, 24, v38 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v1, v38, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v0, 0xff, v38 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v2, v38, 16, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v7, 24, v16 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v5, v16, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v11, 24, v19 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v9, v19, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v15, 24, v18 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v13, v18, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v4, 0xff, v16 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v6, v16, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v8, 0xff, v19 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v10, v19, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v12, 0xff, v18 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v14, v18, 16, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v19, 24, v29 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v17, v29, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v23, 24, v28 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v21, v28, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v27, 24, v31 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v25, v31, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v43, 24, v30 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v41, v30, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v16, 0xff, v29 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v18, v29, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xff, v28 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v22, v28, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v24, 0xff, v31 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v26, v31, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v40, 0xff, v30 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v42, v30, 16, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v31, 24, v33 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v29, v33, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v47, 24, v32 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v45, v32, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v51, 24, v35 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v49, v35, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v55, 24, v34 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v53, v34, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v28, 0xff, v33 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v30, v33, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v44, 0xff, v32 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v46, v32, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v48, 0xff, v35 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v50, v35, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v52, 0xff, v34 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v54, v34, 16, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v35, 24, v37 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v33, v37, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v59, 24, v36 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v57, v36, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v63, 24, v39 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v61, v39, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v32, 0xff, v37 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v34, v37, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v56, 0xff, v36 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v58, v36, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v60, 0xff, v39 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v62, v39, 16, 8 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[60:63], off, s[0:3], 0 offset:240 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[56:59], off, s[0:3], 0 offset:192 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:208 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[52:55], off, s[0:3], 0 offset:160 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[48:51], off, s[0:3], 0 offset:176 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[44:47], off, s[0:3], 0 offset:128 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:144 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[40:43], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dword v0, off, s[88:91], 0 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v2, off, s[88:91], 0 offset:8 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v3, off, s[88:91], 0 offset:12 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v3, 24, v5 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(2) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v23, 24, v18 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v21, v18, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xff, v18 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v22, v18, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:224 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(2) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v26, 24, v14 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v23, 24, v19 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v21, v19, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xff, v19 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v22, v19, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:240 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v24, v14, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v23, 0xff, v14 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v25, v14, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:160 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(3) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v30, 24, v10 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v26, 24, v15 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v24, v15, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v23, 0xff, v15 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v25, v15, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:176 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v28, v10, 8, 8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v26, 24, v12 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v24, v12, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v23, 0xff, v12 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v25, v12, 16, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v27, 0xff, v10 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v29, v10, 16, 8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v22, 24, v16 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v20, v16, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v19, 0xff, v16 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v21, v16, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:128 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v26, 24, v13 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v24, v13, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v23, 0xff, v13 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v25, v13, 16, 8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v30, 24, v11 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v28, v11, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v27, 0xff, v11 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v29, v11, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:192 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:144 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v22, 24, v17 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v20, v17, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v19, 0xff, v17 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v21, v17, 16, 8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v26, 24, v9 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v24, v9, 8, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v23, 0xff, v9 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v30, 24, v8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v28, v8, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v27, 0xff, v8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v29, v8, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v25, v9, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v1, v5, 8, 8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v18, 24, v4 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v16, v4, 8, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:208 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v14, 24, v6 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v22, 24, v7 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v20, v7, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v12, v6, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v0, 0xff, v5 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v2, v5, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:64 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v15, 0xff, v4 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v17, v4, 16, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v19, 0xff, v7 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v21, v7, 16, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v11, 0xff, v6 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v13, v6, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GCN-NOHSA-VI-NEXT: s_endpgm ; @@ -4052,115 +4040,110 @@ define amdgpu_kernel void @global_sextload_v64i8_to_v64i32(ptr addrspace(1) %out ; GCN-NOHSA-SI-LABEL: global_sextload_v64i8_to_v64i32: ; GCN-NOHSA-SI: ; %bb.0: ; GCN-NOHSA-SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s12, SCRATCH_RSRC_DWORD0 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s13, SCRATCH_RSRC_DWORD1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s14, -1 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s15, 0xe8f000 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s3, 0xf000 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-SI-NEXT: s_add_u32 s12, s12, s11 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s10, s2 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s3 ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-SI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s3 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[10:13], off, s[8:11], 0 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[26:29], off, s[8:11], 0 offset:16 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[30:33], off, s[8:11], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[34:37], off, s[8:11], 0 offset:48 -; GCN-NOHSA-SI-NEXT: s_addc_u32 s13, s13, 0 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(3) -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v3, 24, v11 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v2, v11, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v1, v11, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v0, v11, 0, 8 -; GCN-NOHSA-SI-NEXT: buffer_store_dword v0, off, s[12:15], 0 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: buffer_store_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Spill -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(4) expcnt(0) -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v3, 24, v36 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v2, v36, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v1, v36, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v0, v36, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v7, 24, v10 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v6, v10, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v5, v10, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v4, v10, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v11, 24, v13 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v10, v13, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v9, v13, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v8, v13, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v15, 24, v12 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v14, v12, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v13, v12, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v12, v12, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v19, 24, v27 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v18, v27, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v17, v27, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v16, v27, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 24, v26 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v22, v26, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v26, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v26, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v27, 24, v29 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v26, v29, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v25, v29, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v24, v29, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v41, 24, v28 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v40, v28, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v39, v28, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v38, v28, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v45, 24, v31 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v44, v31, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v43, v31, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v42, v31, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v49, 24, v30 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v48, v30, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v47, v30, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v46, v30, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v31, 24, v33 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v30, v33, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v29, v33, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v28, v33, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v53, 24, v32 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v52, v32, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v51, v32, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v50, v32, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v57, 24, v35 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v56, v35, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v55, v35, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v54, v35, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v61, 24, v34 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v60, v34, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v59, v34, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v58, v34, 0, 8 -; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v35, 24, v37 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v34, v37, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v33, v37, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_i32 v32, v37, 0, 8 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:240 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[58:61], off, s[0:3], 0 offset:192 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[54:57], off, s[0:3], 0 offset:208 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[50:53], off, s[0:3], 0 offset:160 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:176 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[46:49], off, s[0:3], 0 offset:128 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[42:45], off, s[0:3], 0 offset:144 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[38:41], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v3, 24, v5 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(2) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 24, v18 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v22, v18, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v18, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v18, 0, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:224 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v22, 24, v19 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v19, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v19, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v19, v19, 0, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:240 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v21, 24, v16 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v16, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v19, v16, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v18, v16, 0, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:192 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 24, v17 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v22, v17, 16, 8 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v17, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v17, 0, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:208 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(5) expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 24, v14 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v22, v14, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v14, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v14, 0, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:160 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 24, v15 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v22, v15, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v15, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v15, 0, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:176 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 24, v12 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v22, v12, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v12, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v12, 0, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:128 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 24, v13 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v22, v13, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v13, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v13, 0, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:144 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(8) expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 24, v10 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v22, v10, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v10, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v10, 0, 8 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v27, 24, v11 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v26, v11, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v25, v11, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v24, v11, 0, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v2, v5, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v1, v5, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v0, v5, 0, 8 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v19, 24, v4 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v18, v4, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v17, v4, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v16, v4, 0, 8 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v15, 24, v7 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v14, v7, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v13, v7, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v12, v7, 0, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v23, 24, v6 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 -; GCN-NOHSA-SI-NEXT: buffer_load_dword v0, off, s[12:15], 0 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: buffer_load_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Reload -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v22, v6, 16, 8 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v27, 24, v8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v26, v8, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v25, v8, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v24, v8, 0, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v21, v6, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v20, v6, 0, 8 +; GCN-NOHSA-SI-NEXT: v_ashrrev_i32_e32 v7, 24, v9 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v6, v9, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v5, v9, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_i32 v4, v9, 0, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_endpgm ; @@ -4183,8 +4166,8 @@ define amdgpu_kernel void @global_sextload_v64i8_to_v64i32(ptr addrspace(1) %out ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 -; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1] ; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 +; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1] ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 @@ -4202,20 +4185,20 @@ define amdgpu_kernel void @global_sextload_v64i8_to_v64i32(ptr addrspace(1) %out ; GCN-HSA-NEXT: v_bfe_i32 v16, v14, 0, 8 ; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s2 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v18, 24, v15 ; GCN-HSA-NEXT: v_bfe_i32 v17, v15, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v16, v15, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v15, v15, 0, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s2 ; GCN-HSA-NEXT: flat_store_dwordx4 v[19:20], v[15:18] ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s1 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s0 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 24, v12 ; GCN-HSA-NEXT: v_bfe_i32 v16, v12, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v15, v12, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v14, v12, 0, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s0 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[14:17] ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s2 @@ -4224,11 +4207,11 @@ define amdgpu_kernel void @global_sextload_v64i8_to_v64i32(ptr addrspace(1) %out ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xf0 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v16, 24, v13 ; GCN-HSA-NEXT: v_bfe_i32 v15, v13, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v14, v13, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v13, v13, 0, 8 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[13:16] ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 @@ -4244,211 +4227,197 @@ define amdgpu_kernel void @global_sextload_v64i8_to_v64i32(ptr addrspace(1) %out ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xd0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v14, 24, v11 ; GCN-HSA-NEXT: v_bfe_i32 v13, v11, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v12, v11, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v11, v11, 0, 8 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s3 ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[11:14] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 24, v8 -; GCN-HSA-NEXT: v_bfe_i32 v12, v8, 16, 8 -; GCN-HSA-NEXT: v_bfe_i32 v11, v8, 8, 8 -; GCN-HSA-NEXT: v_bfe_i32 v10, v8, 0, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3 -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s2 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v12, 24, v9 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v16, 24, v8 +; GCN-HSA-NEXT: v_bfe_i32 v15, v8, 16, 8 +; GCN-HSA-NEXT: v_bfe_i32 v14, v8, 8, 8 +; GCN-HSA-NEXT: v_bfe_i32 v13, v8, 0, 8 ; GCN-HSA-NEXT: v_bfe_i32 v11, v9, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v10, v9, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v9, v9, 0, 8 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xb0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[9:12] +; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[13:16] +; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[9:12] ; GCN-HSA-NEXT: s_waitcnt vmcnt(9) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v14, 24, v6 -; GCN-HSA-NEXT: v_bfe_i32 v13, v6, 16, 8 -; GCN-HSA-NEXT: v_bfe_i32 v12, v6, 8, 8 -; GCN-HSA-NEXT: v_bfe_i32 v11, v6, 0, 8 +; GCN-HSA-NEXT: v_bfe_i32 v8, v6, 0, 8 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 24, v6 +; GCN-HSA-NEXT: v_bfe_i32 v10, v6, 16, 8 +; GCN-HSA-NEXT: v_bfe_i32 v9, v6, 8, 8 +; GCN-HSA-NEXT: s_waitcnt vmcnt(8) +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 24, v1 +; GCN-HSA-NEXT: v_bfe_i32 v14, v1, 16, 8 +; GCN-HSA-NEXT: v_bfe_i32 v13, v1, 8, 8 +; GCN-HSA-NEXT: v_bfe_i32 v12, v1, 0, 8 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v19, 24, v0 +; GCN-HSA-NEXT: v_bfe_i32 v18, v0, 16, 8 +; GCN-HSA-NEXT: v_bfe_i32 v17, v0, 8, 8 +; GCN-HSA-NEXT: v_bfe_i32 v16, v0, 0, 8 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[11:14] -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v10, 24, v7 ; GCN-HSA-NEXT: v_bfe_i32 v9, v7, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v8, v7, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v7, v7, 0, 8 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[7:10] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[7:10] -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 24, v4 ; GCN-HSA-NEXT: v_bfe_i32 v8, v4, 16, 8 ; GCN-HSA-NEXT: v_bfe_i32 v7, v4, 8, 8 ; GCN-HSA-NEXT: v_bfe_i32 v6, v4, 0, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90 -; GCN-HSA-NEXT: s_waitcnt vmcnt(10) -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v14, 24, v1 -; GCN-HSA-NEXT: v_bfe_i32 v13, v1, 16, 8 -; GCN-HSA-NEXT: v_bfe_i32 v12, v1, 8, 8 -; GCN-HSA-NEXT: v_bfe_i32 v11, v1, 0, 8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[6:9] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[6:9] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 24, v0 -; GCN-HSA-NEXT: v_bfe_i32 v8, v0, 16, 8 -; GCN-HSA-NEXT: v_bfe_i32 v7, v0, 8, 8 -; GCN-HSA-NEXT: v_bfe_i32 v6, v0, 0, 8 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v18, 24, v5 -; GCN-HSA-NEXT: v_bfe_i32 v17, v5, 16, 8 -; GCN-HSA-NEXT: v_bfe_i32 v16, v5, 8, 8 -; GCN-HSA-NEXT: v_bfe_i32 v15, v5, 0, 8 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v10, 24, v5 +; GCN-HSA-NEXT: v_bfe_i32 v9, v5, 16, 8 +; GCN-HSA-NEXT: v_bfe_i32 v8, v5, 8, 8 +; GCN-HSA-NEXT: v_bfe_i32 v7, v5, 0, 8 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[15:18] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[7:10] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v18, 24, v3 -; GCN-HSA-NEXT: v_bfe_i32 v17, v3, 16, 8 -; GCN-HSA-NEXT: v_bfe_i32 v16, v3, 8, 8 -; GCN-HSA-NEXT: v_bfe_i32 v15, v3, 0, 8 -; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 24, v2 -; GCN-HSA-NEXT: v_bfe_i32 v4, v2, 16, 8 -; GCN-HSA-NEXT: v_bfe_i32 v3, v2, 8, 8 -; GCN-HSA-NEXT: v_bfe_i32 v2, v2, 0, 8 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v23, 24, v3 +; GCN-HSA-NEXT: v_bfe_i32 v22, v3, 16, 8 +; GCN-HSA-NEXT: v_bfe_i32 v21, v3, 8, 8 +; GCN-HSA-NEXT: v_bfe_i32 v20, v3, 0, 8 +; GCN-HSA-NEXT: v_ashrrev_i32_e32 v6, 24, v2 +; GCN-HSA-NEXT: v_bfe_i32 v5, v2, 16, 8 +; GCN-HSA-NEXT: v_bfe_i32 v4, v2, 8, 8 +; GCN-HSA-NEXT: v_bfe_i32 v3, v2, 0, 8 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[2:5] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[3:6] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[15:18] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[20:23] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 0x50 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[6:9] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19] ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[11:14] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_sextload_v64i8_to_v64i32: ; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s90, -1 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s91, 0xe80000 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s3, 0xf000 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s2, -1 -; GCN-NOHSA-VI-NEXT: s_add_u32 s88, s88, s11 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s10, s2 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, s3 ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-VI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, s3 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[10:13], off, s[8:11], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[26:29], off, s[8:11], 0 offset:16 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[30:33], off, s[8:11], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[34:37], off, s[8:11], 0 offset:48 -; GCN-NOHSA-VI-NEXT: s_addc_u32 s89, s89, 0 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[16:19], off, s[8:11], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[12:15], off, s[8:11], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:16 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(3) -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v3, 24, v11 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v2, v11, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v1, v11, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v0, v11, 0, 8 -; GCN-NOHSA-VI-NEXT: buffer_store_dword v0, off, s[88:91], 0 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v2, off, s[88:91], 0 offset:8 ; 4-byte Folded Spill -; GCN-NOHSA-VI-NEXT: buffer_store_dword v3, off, s[88:91], 0 offset:12 ; 4-byte Folded Spill +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v3, 24, v5 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(2) +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 24, v18 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v18, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v18, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v18, 0, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:224 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v18, v16, 0, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v22, 24, v19 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v19, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v19, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v19, v19, 0, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:240 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 24, v17 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v21, 24, v16 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v16, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v19, v16, 8, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:192 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v17, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v17, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v17, 0, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:208 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(4) -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v3, 24, v36 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v2, v36, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v1, v36, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v0, v36, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v7, 24, v10 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v6, v10, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v5, v10, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v4, v10, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v11, 24, v13 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v10, v13, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v9, v13, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v8, v13, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v15, 24, v12 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v14, v12, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v13, v12, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v12, v12, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v19, 24, v27 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v18, v27, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v17, v27, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v16, v27, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 24, v26 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v26, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v26, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v26, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v27, 24, v29 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v26, v29, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v25, v29, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v24, v29, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v41, 24, v28 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v40, v28, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v39, v28, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v38, v28, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v45, 24, v31 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v44, v31, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v43, v31, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v42, v31, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v49, 24, v30 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v48, v30, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v47, v30, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v46, v30, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v31, 24, v33 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v30, v33, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v29, v33, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v28, v33, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v53, 24, v32 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v52, v32, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v51, v32, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v50, v32, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v57, 24, v35 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v56, v35, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v55, v35, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v54, v35, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v61, 24, v34 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v60, v34, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v59, v34, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v58, v34, 0, 8 -; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v35, 24, v37 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v34, v37, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v33, v37, 8, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_i32 v32, v37, 0, 8 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:240 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[58:61], off, s[0:3], 0 offset:192 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[54:57], off, s[0:3], 0 offset:208 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[50:53], off, s[0:3], 0 offset:160 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:176 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[46:49], off, s[0:3], 0 offset:128 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[42:45], off, s[0:3], 0 offset:144 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[38:41], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v27, 24, v11 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 24, v14 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v14, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v14, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v14, 0, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:160 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v26, v11, 16, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 24, v15 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v15, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v15, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v15, 0, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:176 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v25, v11, 8, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 24, v12 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v12, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v12, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v12, 0, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:128 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v24, v11, 0, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 24, v13 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v13, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v13, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v13, 0, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:144 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v2, v5, 16, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 24, v10 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v10, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v10, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v10, 0, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v1, v5, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v0, v5, 0, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v19, 24, v4 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v18, v4, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v17, v4, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v16, v4, 0, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v15, 24, v7 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v14, v7, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v13, v7, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v12, v7, 0, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:96 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dword v0, off, s[88:91], 0 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v2, off, s[88:91], 0 offset:8 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: buffer_load_dword v3, off, s[88:91], 0 offset:12 ; 4-byte Folded Reload -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v23, 24, v6 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v22, v6, 16, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v27, 24, v8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v26, v8, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v25, v8, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v24, v8, 0, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v21, v6, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v20, v6, 0, 8 +; GCN-NOHSA-VI-NEXT: v_ashrrev_i32_e32 v7, 24, v9 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v6, v9, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v5, v9, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_i32 v4, v9, 0, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:64 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GCN-NOHSA-VI-NEXT: s_endpgm ; @@ -5882,39 +5851,39 @@ define amdgpu_kernel void @global_zextload_v8i8_to_v8i64(ptr addrspace(1) %out, ; GCN-HSA-NEXT: flat_load_dwordx2 v[15:16], v[0:1] ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s1 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s0 +; GCN-HSA-NEXT: s_add_u32 s0, s0, 32 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s3 +; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, v1 -; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s0 ; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 24, v16 ; GCN-HSA-NEXT: v_bfe_u32 v0, v16, 16, 8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: s_add_u32 s0, s0, 32 -; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s1 +; GCN-HSA-NEXT: flat_store_dwordx4 v[19:20], v[0:3] ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 24, v15 ; GCN-HSA-NEXT: v_bfe_u32 v3, v15, 16, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s0 ; GCN-HSA-NEXT: v_bfe_u32 v9, v16, 8, 8 ; GCN-HSA-NEXT: v_bfe_u32 v13, v15, 8, 8 ; GCN-HSA-NEXT: v_and_b32_e32 v11, 0xff, v15 ; GCN-HSA-NEXT: v_and_b32_e32 v7, 0xff, v16 -; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[3:6] -; GCN-HSA-NEXT: flat_store_dwordx4 v[19:20], v[7:10] -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[11:14] +; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[3:6] +; GCN-HSA-NEXT: flat_store_dwordx4 v[23:24], v[7:10] +; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[11:14] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_zextload_v8i8_to_v8i64: @@ -6351,49 +6320,52 @@ define amdgpu_kernel void @global_zextload_v16i8_to_v16i64(ptr addrspace(1) %out ; GCN-NOHSA-SI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7 ; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v33, 0 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v35, v33 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, 0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, v5 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v29, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v31, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v25, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v27, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v23, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, v33 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, v33 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v24, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v26, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v28, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v30, v5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v32, v5 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v34, 24, v2 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v32, v2, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v6, v3, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v10, v0, 8, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v14, v1, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v12, 0xff, v1 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v8, 0xff, v0 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v4, 0xff, v3 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v18, v2, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v16, 0xff, v2 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v22, 24, v1 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v20, v1, 16, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 24, v0 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v24, v0, 16, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 24, v3 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v28, v3, 16, 8 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:80 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:16 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v6, 24, v2 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v4, v2, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v9, 24, v3 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v7, v3, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v12, 24, v0 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v10, v0, 16, 8 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v15, 24, v1 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v13, v1, 16, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v19, v2, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v23, v3, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v27, v0, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v31, v1, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v29, 0xff, v1 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v25, 0xff, v0 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v21, 0xff, v3 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v17, 0xff, v2 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[17:20], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[21:24], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[29:32], off, s[0:3], 0 offset:32 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: global_zextload_v16i8_to_v16i64: @@ -6411,72 +6383,72 @@ define amdgpu_kernel void @global_zextload_v16i8_to_v16i64(ptr addrspace(1) %out ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x70 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s4 -; GCN-HSA-NEXT: s_add_u32 s4, s0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, v5 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, v5 -; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s4 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, v5 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, v5 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, v5 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, v5 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, v5 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, v5 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, v5 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, v5 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, v5 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, v5 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, v5 ; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v10, 24, v3 ; GCN-HSA-NEXT: v_bfe_u32 v8, v3, 16, 8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[8:11] +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 24, v2 +; GCN-HSA-NEXT: v_bfe_u32 v4, v2, 16, 8 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, v5 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, v5 +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7] +; GCN-HSA-NEXT: v_mov_b32_e32 v25, v5 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s3 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 24, v0 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s4 -; GCN-HSA-NEXT: s_add_u32 s4, s0, 48 ; GCN-HSA-NEXT: v_bfe_u32 v11, v0, 16, 8 -; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[11:14] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, v5 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s4 -; GCN-HSA-NEXT: s_add_u32 s4, s0, 64 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s2 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 +; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[11:14] +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 24, v1 ; GCN-HSA-NEXT: v_bfe_u32 v14, v1, 16, 8 -; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[14:17] -; GCN-HSA-NEXT: v_mov_b32_e32 v9, v5 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, v5 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s4 -; GCN-HSA-NEXT: v_bfe_u32 v10, v2, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v8, 0xff, v2 -; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[8:11] -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s2 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 24, v2 -; GCN-HSA-NEXT: v_bfe_u32 v4, v2, 16, 8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[14:17] +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, v5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, v5 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, v5 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, v5 -; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[4:7] -; GCN-HSA-NEXT: v_mov_b32_e32 v16, v5 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s3 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 32 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s3 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 -; GCN-HSA-NEXT: v_bfe_u32 v13, v3, 8, 8 +; GCN-HSA-NEXT: v_bfe_u32 v19, v2, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xff, v2 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[17:20] +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s1 +; GCN-HSA-NEXT: v_bfe_u32 v22, v3, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v20, 0xff, v3 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s0 ; GCN-HSA-NEXT: v_bfe_u32 v9, v0, 8, 8 -; GCN-HSA-NEXT: v_bfe_u32 v17, v1, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v15, 0xff, v1 +; GCN-HSA-NEXT: v_bfe_u32 v26, v1, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v24, 0xff, v1 ; GCN-HSA-NEXT: v_and_b32_e32 v7, 0xff, v0 -; GCN-HSA-NEXT: v_and_b32_e32 v11, 0xff, v3 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[19:20], v[11:14] +; GCN-HSA-NEXT: flat_store_dwordx4 v[11:12], v[20:23] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[7:10] -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[15:18] +; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[24:27] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_zextload_v16i8_to_v16i64: @@ -6490,49 +6462,49 @@ define amdgpu_kernel void @global_zextload_v16i8_to_v16i64(ptr addrspace(1) %out ; GCN-NOHSA-VI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s7 ; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v29, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v31, v29 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v7, v5 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v25, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v27, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v21, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v23, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v17, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v19, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v7, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v9, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v11, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v13, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v15, v29 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v8, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v10, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v11, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v13, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v14, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v16, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v18, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v20, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v22, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v24, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v26, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v28, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v30, v5 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v32, v5 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v30, 24, v3 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v28, v3, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v6, v1, 8, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v10, 24, v0 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v14, v0, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v12, 0xff, v0 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v8, v0, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v4, 0xff, v1 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v18, v3, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v16, 0xff, v3 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v22, v2, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xff, v2 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v26, 24, v2 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v24, v2, 16, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v2, 24, v1 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v0, v1, 16, 8 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, v29 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, v29 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v6, 24, v3 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v4, v3, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v9, 24, v1 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v7, v1, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:48 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v12, 24, v2 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v10, v2, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v15, v2, 8, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v19, v3, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v13, 0xff, v2 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v23, v1, 8, 8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v27, 24, v0 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v31, v0, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v29, 0xff, v0 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v25, v0, 16, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v21, 0xff, v1 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v17, 0xff, v3 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:64 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[17:20], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[21:24], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[29:32], off, s[0:3], 0 ; GCN-NOHSA-VI-NEXT: s_endpgm ; ; EG-LABEL: global_zextload_v16i8_to_v16i64: @@ -6713,89 +6685,89 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out ; GCN-NOHSA-SI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7 ; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s13, 0 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s15, s13 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s17, s13 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s19, s13 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, 0 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s13, s11 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s15, s11 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s17, s11 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s7, v3 ; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s6, v2 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s12, s7, 16 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s7, v3 ; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s4, v0 ; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s5, v1 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s14, s7, 8 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s20, s7 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s6, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s6, 24 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s6, 8 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s35, s7, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s38, s7, 24 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s16, s5, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s18, s5, 8 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s28, s5 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s10, s4, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s10, s7, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s12, s7, 8 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s18, s7 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s20, s6, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s6, 24 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s6, 8 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s14, s5, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s16, s5, 8 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s26, s5 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s4, 16 ; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s4, 24 ; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s4, 8 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[6:7], 0x80000 ; GCN-NOHSA-SI-NEXT: s_ashr_i32 s31, s5, 31 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s35, s7, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s38, s7, 24 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s38 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s12 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s13 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[4:5], 0x80000 ; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s5, 24 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[34:35], 0x80000 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[30:31], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s38 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s36 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s37 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s20 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s21 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s14 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s15 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s22 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s23 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s24 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s25 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s26 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s27 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s10 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s11 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s18 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s19 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s12 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s13 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s20 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s21 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, s22 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, s23 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s24 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s25 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s33 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s31 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s8 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s9 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s17 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s14 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s15 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s26 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s27 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s17 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s28 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s18 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s19 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:80 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s10 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s11 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s6 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s7 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s6 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s7 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s4 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s5 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:64 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:16 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; @@ -6813,8 +6785,8 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out ; GCN-HSA-NEXT: s_mov_b32 s5, s3 ; GCN-HSA-NEXT: s_mov_b32 s7, s3 ; GCN-HSA-NEXT: s_mov_b32 s9, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s0 ; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: v_readfirstlane_b32 s10, v0 ; GCN-HSA-NEXT: v_readfirstlane_b32 s11, v1 @@ -6826,98 +6798,98 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out ; GCN-HSA-NEXT: s_lshr_b32 s16, s12, 16 ; GCN-HSA-NEXT: s_lshr_b32 s18, s12, 24 ; GCN-HSA-NEXT: s_lshr_b32 s20, s12, 8 -; GCN-HSA-NEXT: s_ashr_i32 s15, s13, 31 -; GCN-HSA-NEXT: s_ashr_i32 s17, s13, 24 -; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[10:11], 0x80000 ; GCN-HSA-NEXT: s_lshr_b32 s6, s11, 16 ; GCN-HSA-NEXT: s_lshr_b32 s8, s11, 8 ; GCN-HSA-NEXT: s_mov_b32 s22, s11 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13 -; GCN-HSA-NEXT: s_lshr_b32 s12, s10, 16 -; GCN-HSA-NEXT: s_ashr_i32 s13, s11, 31 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s15 -; GCN-HSA-NEXT: s_ashr_i32 s15, s11, 24 -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s24 -; GCN-HSA-NEXT: s_lshr_b32 s24, s10, 24 -; GCN-HSA-NEXT: s_lshr_b32 s10, s10, 8 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s15 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s25 -; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000 +; GCN-HSA-NEXT: s_lshr_b32 s24, s10, 16 +; GCN-HSA-NEXT: s_lshr_b32 s26, s10, 24 +; GCN-HSA-NEXT: s_lshr_b32 s28, s10, 8 +; GCN-HSA-NEXT: s_ashr_i32 s15, s11, 31 +; GCN-HSA-NEXT: s_ashr_i32 s17, s11, 24 +; GCN-HSA-NEXT: s_ashr_i32 s19, s13, 31 +; GCN-HSA-NEXT: s_ashr_i32 s21, s13, 24 +; GCN-HSA-NEXT: s_bfe_i64 s[30:31], s[10:11], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[34:35], s[12:13], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[28:29], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[26:27], 0x80000 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s21 ; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s19 ; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000 ; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000 ; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x80000 ; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000 ; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s17 ; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s15 ; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000 ; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x80000 ; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x80000 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 +; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[2:5] -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s15 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 -; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[2:5] -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s18 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s19 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s14 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s4 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s5 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[14:17] +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s34 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s35 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s20 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s21 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 +; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[4:7] +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s7 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[4:7] -; GCN-HSA-NEXT: s_add_u32 s0, s0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s16 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s17 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s18 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s19 +; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[8:11] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s22 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s23 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s9 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s22 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s23 +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[18:21] +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s20 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s21 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[12:15] -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s24 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s25 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s10 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s11 +; GCN-HSA-NEXT: s_add_u32 s0, s0, 16 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] +; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s24 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s25 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s12 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s13 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s30 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s31 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s11 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19] +; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[12:15] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_sextload_v16i8_to_v16i64: @@ -6932,23 +6904,20 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out ; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s7 ; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s17, 0 -; GCN-NOHSA-VI-NEXT: s_mov_b32 s19, s17 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 +; GCN-NOHSA-VI-NEXT: s_mov_b32 s19, s17 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s9, v3 ; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s8, v2 -; GCN-NOHSA-VI-NEXT: s_lshr_b32 s16, s9, 16 +; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s9, v3 ; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s4, v0 ; GCN-NOHSA-VI-NEXT: v_readfirstlane_b32 s5, v1 +; GCN-NOHSA-VI-NEXT: s_lshr_b32 s16, s9, 16 ; GCN-NOHSA-VI-NEXT: s_lshr_b32 s20, s9, 8 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s22, s9 ; GCN-NOHSA-VI-NEXT: s_lshr_b32 s24, s8, 16 ; GCN-NOHSA-VI-NEXT: s_lshr_b32 s26, s8, 24 ; GCN-NOHSA-VI-NEXT: s_lshr_b32 s28, s8, 8 -; GCN-NOHSA-VI-NEXT: s_ashr_i32 s35, s9, 31 -; GCN-NOHSA-VI-NEXT: s_ashr_i32 s38, s9, 24 -; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000 ; GCN-NOHSA-VI-NEXT: s_lshr_b32 s18, s5, 16 ; GCN-NOHSA-VI-NEXT: s_lshr_b32 s12, s5, 8 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s14, s5 @@ -6957,15 +6926,14 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out ; GCN-NOHSA-VI-NEXT: s_lshr_b32 s34, s4, 8 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[36:37], s[8:9], 0x80000 ; GCN-NOHSA-VI-NEXT: s_ashr_i32 s31, s5, 31 +; GCN-NOHSA-VI-NEXT: s_ashr_i32 s35, s9, 31 +; GCN-NOHSA-VI-NEXT: s_ashr_i32 s38, s9, 24 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x80000 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s38 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s35 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s16 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s17 +; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[6:7], s[4:5], 0x80000 ; GCN-NOHSA-VI-NEXT: s_ashr_i32 s33, s5, 24 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[4:5], s[34:35], 0x80000 @@ -6974,41 +6942,45 @@ define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s38 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s35 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, s36 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v5, s37 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s16 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s17 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v14, s22 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v15, s23 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v16, s20 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v17, s21 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v18, s24 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v19, s25 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v20, s26 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v21, s27 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v6, s28 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s24 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s25 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s26 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s27 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v7, s29 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v10, s33 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v11, s31 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v12, s6 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v13, s7 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v8, s18 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v9, s19 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s14 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s15 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v18, s12 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v16, s14 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v17, s15 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v19, s13 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s12 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s13 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v16, s10 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v17, s11 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:80 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v14, s4 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v0, s10 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, s11 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v2, s8 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, s9 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v18, s8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v19, s9 ; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v15, s5 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:64 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:16 ; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 ; GCN-NOHSA-VI-NEXT: s_endpgm ; @@ -7206,98 +7178,95 @@ define amdgpu_kernel void @global_zextload_v32i8_to_v32i64(ptr addrspace(1) %out ; GCN-NOHSA-SI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-SI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[3:6], off, s[8:11], 0 -; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[7:10], off, s[8:11], 0 offset:16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v54, 0 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:16 +; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, 0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, v9 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v50, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v52, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v47, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v29, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v31, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v26, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v44, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v23, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v41, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v37, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v39, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v33, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v35, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v56, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, v54 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v24, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v25, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v27, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v28, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v30, v9 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v13, v5, 8, 8 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v51, 24, v8 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v49, v8, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v2, v3, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v0, 0xff, v3 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v11, 0xff, v5 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v21, v6, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v19, 0xff, v6 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v24, 24, v3 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v22, v3, 16, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v30, 24, v5 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v28, v5, 16, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v5, 24, v6 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v3, v6, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v34, v7, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v32, 0xff, v7 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v38, v8, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v36, 0xff, v8 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v42, v9, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v40, 0xff, v9 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v48, 24, v7 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v46, v7, 16, 8 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v8, 24, v9 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v6, v9, 16, 8 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, v54 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[49:52], off, s[0:3], 0 offset:176 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v14, 24, v2 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v12, v2, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:208 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v17, 24, v1 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v49, v54 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v17, v4, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v15, 0xff, v4 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v27, 24, v4 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v25, v4, 16, 8 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v45, v10, 8, 8 -; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v43, 0xff, v10 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:208 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[46:49], off, s[0:3], 0 offset:144 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, v54 -; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(1) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, v54 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v15, v1, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:176 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v28, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v46, v54 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[3:6], off, s[0:3], 0 offset:112 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, v9 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v20, 24, v0 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v18, v0, 16, 8 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(2) +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v14, 24, v5 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v12, v5, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:144 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v25, v54 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[43:46], off, s[0:3], 0 offset:224 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, v9 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v23, 24, v7 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v21, v7, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v17, 24, v4 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v43, v54 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, v54 -; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v55, 24, v10 -; GCN-NOHSA-SI-NEXT: v_bfe_u32 v53, v10, 16, 8 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v15, v4, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[21:24], off, s[0:3], 0 offset:112 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v22, v54 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[40:43], off, s[0:3], 0 offset:192 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:160 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:128 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[53:56], off, s[0:3], 0 offset:240 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:96 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:64 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:32 -; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v21, v9 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v26, 24, v6 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v24, v6, 16, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:16 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v20, v3, 8, 8 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v18, 0xff, v3 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:80 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v24, v9 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:224 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v23, v2, 8, 8 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v21, 0xff, v2 +; GCN-NOHSA-SI-NEXT: v_lshrrev_b32_e32 v10, 24, v3 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v8, v3, 16, 8 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, v9 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[21:24], off, s[0:3], 0 offset:192 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v26, v1, 8, 8 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v24, 0xff, v1 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v13, v0, 8, 8 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:240 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v3, v4, 8, 8 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v1, 0xff, v4 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v11, 0xff, v0 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, v9 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v20, v9 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:160 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v17, v7, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v21, v6, 8, 8 +; GCN-NOHSA-SI-NEXT: v_bfe_u32 v29, v5, 8, 8 +; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v27, 0xff, v5 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v19, 0xff, v6 +; GCN-NOHSA-SI-NEXT: v_and_b32_e32 v15, 0xff, v7 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:128 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:96 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:64 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:32 +; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[1:4], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; ; GCN-HSA-LABEL: global_zextload_v32i8_to_v32i64: @@ -7309,134 +7278,151 @@ define amdgpu_kernel void @global_zextload_v32i8_to_v32i64(ptr addrspace(1) %out ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCN-HSA-NEXT: flat_load_dwordx4 v[2:5], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[3:6], v[0:1] ; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 -; GCN-HSA-NEXT: flat_load_dwordx4 v[6:9], v[0:1] +; GCN-HSA-NEXT: flat_load_dwordx4 v[7:10], v[0:1] ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x50 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s5 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s4 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 48 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, v1 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, v1 -; GCN-HSA-NEXT: s_waitcnt vmcnt(1) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 24, v4 -; GCN-HSA-NEXT: v_bfe_u32 v10, v4, 16, 8 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s5 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s4 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 16 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 24, v3 -; GCN-HSA-NEXT: v_bfe_u32 v10, v3, 16, 8 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, v1 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v33, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v35, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v37, v1 +; GCN-HSA-NEXT: s_waitcnt vmcnt(1) +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 24, v5 +; GCN-HSA-NEXT: v_bfe_u32 v11, v5, 16, 8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[11:14] +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 24, v4 +; GCN-HSA-NEXT: v_bfe_u32 v14, v4, 16, 8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[14:17] +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s5 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s4 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0xf0 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 24, v2 -; GCN-HSA-NEXT: v_bfe_u32 v10, v2, 16, 8 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 24, v3 +; GCN-HSA-NEXT: v_bfe_u32 v17, v3, 16, 8 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[17:20] +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s5 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s4 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0xd0 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, v1 ; GCN-HSA-NEXT: s_waitcnt vmcnt(3) -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 24, v9 -; GCN-HSA-NEXT: v_bfe_u32 v10, v9, 16, 8 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v22, 24, v10 +; GCN-HSA-NEXT: v_bfe_u32 v20, v10, 16, 8 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 +; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[20:23] +; GCN-HSA-NEXT: v_mov_b32_e32 v14, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s5 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s4 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0xb0 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 24, v8 -; GCN-HSA-NEXT: v_bfe_u32 v10, v8, 16, 8 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 24, v9 +; GCN-HSA-NEXT: v_bfe_u32 v11, v9, 16, 8 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 +; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[11:14] +; GCN-HSA-NEXT: v_mov_b32_e32 v17, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s5 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s4 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x90 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 24, v7 -; GCN-HSA-NEXT: v_bfe_u32 v10, v7, 16, 8 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 24, v8 +; GCN-HSA-NEXT: v_bfe_u32 v14, v8, 16, 8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[11:12], v[14:17] +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s5 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s4 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x60 -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 24, v6 -; GCN-HSA-NEXT: v_bfe_u32 v10, v6, 16, 8 -; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 -; GCN-HSA-NEXT: s_add_u32 s4, s0, 64 -; GCN-HSA-NEXT: v_bfe_u32 v12, v5, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v10, 0xff, v5 -; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 -; GCN-HSA-NEXT: s_add_u32 s4, s0, 32 -; GCN-HSA-NEXT: v_bfe_u32 v12, v4, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v10, 0xff, v4 -; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s4 -; GCN-HSA-NEXT: v_bfe_u32 v12, v3, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v10, 0xff, v3 -; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[10:13] -; GCN-HSA-NEXT: s_add_u32 s4, s0, 0xe0 -; GCN-HSA-NEXT: v_bfe_u32 v12, v2, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v10, 0xff, v2 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[10:13] ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4 -; GCN-HSA-NEXT: v_bfe_u32 v11, v9, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v9, 0xff, v9 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, v1 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5 -; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[9:12] -; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 24, v5 -; GCN-HSA-NEXT: v_bfe_u32 v0, v5, 16, 8 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s5 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 24, v7 +; GCN-HSA-NEXT: v_bfe_u32 v17, v7, 16, 8 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s4 +; GCN-HSA-NEXT: flat_store_dwordx4 v[11:12], v[17:20] +; GCN-HSA-NEXT: v_bfe_u32 v22, v6, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v20, 0xff, v6 +; GCN-HSA-NEXT: v_bfe_u32 v11, v5, 8, 8 +; GCN-HSA-NEXT: v_bfe_u32 v15, v4, 8, 8 +; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[20:23] +; GCN-HSA-NEXT: v_bfe_u32 v28, v9, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v26, 0xff, v9 +; GCN-HSA-NEXT: v_and_b32_e32 v13, 0xff, v4 +; GCN-HSA-NEXT: v_and_b32_e32 v9, 0xff, v5 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 +; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 24, v6 +; GCN-HSA-NEXT: v_bfe_u32 v19, v3, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v17, 0xff, v3 +; GCN-HSA-NEXT: v_bfe_u32 v0, v6, 16, 8 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 +; GCN-HSA-NEXT: v_bfe_u32 v24, v10, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v22, 0xff, v10 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[9:12] +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[13:16] +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s0 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[17:20] +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, v1 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 +; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[22:25] +; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 -; GCN-HSA-NEXT: v_bfe_u32 v16, v8, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v14, 0xff, v8 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, v1 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 0x80 -; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[14:17] -; GCN-HSA-NEXT: v_mov_b32_e32 v8, v1 +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[26:29] ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, v1 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 -; GCN-HSA-NEXT: v_bfe_u32 v9, v7, 8, 8 -; GCN-HSA-NEXT: v_bfe_u32 v13, v6, 8, 8 -; GCN-HSA-NEXT: v_and_b32_e32 v11, 0xff, v6 -; GCN-HSA-NEXT: v_and_b32_e32 v7, 0xff, v7 +; GCN-HSA-NEXT: v_bfe_u32 v32, v8, 8, 8 +; GCN-HSA-NEXT: v_bfe_u32 v36, v7, 8, 8 +; GCN-HSA-NEXT: v_and_b32_e32 v34, 0xff, v7 +; GCN-HSA-NEXT: v_and_b32_e32 v30, 0xff, v8 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[7:10] -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[11:14] +; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[30:33] +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[34:37] ; GCN-HSA-NEXT: s_endpgm ; ; GCN-NOHSA-VI-LABEL: global_zextload_v32i8_to_v32i64: @@ -7449,92 +7435,84 @@ define amdgpu_kernel void @global_zextload_v32i8_to_v32i64(ptr addrspace(1) %out ; GCN-NOHSA-VI-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NOHSA-VI-NEXT: s_mov_b32 s8, s6 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s9, s7 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[10:13], off, s[8:11], 0 -; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[14:17], off, s[8:11], 0 offset:16 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v53, 0 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v49, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v51, v53 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v8, 0 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v12, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v14, v8 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s0, s4 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s1, s5 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v46, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v43, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v40, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v37, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v30, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v32, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v34, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v27, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v23, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v25, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v55, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v19, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v21, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v8, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v6, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v1, v53 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v15, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v17, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v18, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v20, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v21, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v23, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v24, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v26, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v10, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v27, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v29, v8 ; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v9, v11, 8, 8 -; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(0) -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v50, 24, v15 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v48, v15, 16, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v47, 24, v16 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v45, v16, 16, 8 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[48:51], off, s[0:3], 0 offset:176 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v44, v16, 8, 8 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v48, v53 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v42, 0xff, v16 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[45:48], off, s[0:3], 0 offset:208 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v41, v15, 8, 8 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v45, v53 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v39, 0xff, v15 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[42:45], off, s[0:3], 0 offset:192 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v38, 24, v14 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v42, v53 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v36, v14, 16, 8 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[39:42], off, s[0:3], 0 offset:160 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v5, 24, v10 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v39, v53 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v2, v10, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v0, 0xff, v10 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v3, v10, 16, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v7, 0xff, v11 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v20, v12, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v18, 0xff, v12 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v24, 24, v12 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v22, v12, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v28, v13, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v26, 0xff, v13 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v12, 24, v11 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v10, v11, 16, 8 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v31, 24, v13 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v29, v13, 16, 8 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v35, v14, 8, 8 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v33, 0xff, v14 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v11, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v13, v53 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:144 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v16, v17, 8, 8 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v36, v53 -; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v14, 0xff, v17 -; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v54, 24, v17 -; GCN-NOHSA-VI-NEXT: v_bfe_u32 v52, v17, 16, 8 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[29:32], off, s[0:3], 0 offset:112 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:48 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v15, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v17, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v29, v53 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v10, v53 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[33:36], off, s[0:3], 0 offset:128 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[26:29], off, s[0:3], 0 offset:96 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:80 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[52:55], off, s[0:3], 0 offset:240 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:64 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:32 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[3:6], off, s[0:3], 0 offset:16 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:224 -; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v3, v53 -; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v13, 24, v5 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v11, v5, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:176 +; GCN-NOHSA-VI-NEXT: s_waitcnt vmcnt(1) +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v16, 24, v3 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v14, v3, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:112 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v19, 24, v1 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v14, v8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v17, v1, 16, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v13, v6, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v11, 0xff, v6 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[17:20], off, s[0:3], 0 offset:48 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v22, v7, 8, 8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v17, v8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xff, v7 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:192 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v16, v5, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v14, 0xff, v5 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:224 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v25, 24, v6 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v20, v8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v23, v6, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:160 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v19, 24, v4 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v17, v4, 16, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:208 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[17:20], off, s[0:3], 0 offset:144 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v23, v8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v22, v4, 8, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v20, 0xff, v4 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v9, 24, v7 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v7, v7, 16, 8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v11, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v13, v8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:128 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v25, v3, 8, 8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v12, 24, v2 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v23, 0xff, v3 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v5, v0, 8, 8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:240 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v3, 0xff, v0 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v10, v2, 16, 8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v4, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v6, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v17, v8 +; GCN-NOHSA-VI-NEXT: v_mov_b32_e32 v19, v8 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:96 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v28, v2, 8, 8 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v16, v1, 8, 8 +; GCN-NOHSA-VI-NEXT: v_lshrrev_b32_e32 v20, 24, v0 +; GCN-NOHSA-VI-NEXT: v_bfe_u32 v18, v0, 16, 8 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v14, 0xff, v1 +; GCN-NOHSA-VI-NEXT: v_and_b32_e32 v26, 0xff, v2 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:80 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[26:29], off, s[0:3], 0 offset:64 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:32 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:16 +; GCN-NOHSA-VI-NEXT: buffer_store_dwordx4 v[3:6], off, s[0:3], 0 ; GCN-NOHSA-VI-NEXT: s_endpgm ; ; EG-LABEL: global_zextload_v32i8_to_v32i64: @@ -7859,176 +7837,176 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i64(ptr addrspace(1) %out ; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s7 ; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:16 ; GCN-NOHSA-SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s29, 0 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s27, s29 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s23, s29 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s29 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s7, s29 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s29 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s13, s29 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s15, s29 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s25, 0 ; GCN-NOHSA-SI-NEXT: s_mov_b32 s0, s4 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s1, s5 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s17, s25 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s11, s25 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s7, s25 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s9, s25 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s13, s25 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s31, s25 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s35, s25 ; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s43, v3 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s5, v1 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s43, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s5, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s10, s5, 8 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s6, s43, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s8, s43, 24 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x80000 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s4, v0 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s42, v2 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s43, 8 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s12, s43 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s30, s5 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s8 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s6 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s28 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s29 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s20, v2 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s21, v3 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s19, v1 +; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(0) +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s4, v6 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s5, v7 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s24, s21, 16 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s15, s21, 24 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[46:47], s[20:21], 0x80000 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s18, v0 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s38, v4 +; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s39, v5 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s16, s21, 8 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s54, s21 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s50, s20, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s6, s19, 8 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s28, s19 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s40, s4, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s48, s4, 24 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s52, s4, 8 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s15 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s15, s21, 31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s46 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s47 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[46:47], s[4:5], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s4, s19, 24 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s44, s20, 24 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s42, s20, 8 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s10, s19, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s14, s18, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s22, s18, 24 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s18, 8 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s30, s39, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s39, 8 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s56, s39 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s58, s38, 16 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s60, s38, 24 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s15 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s62, s38, 8 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[38:39], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s24 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[64:65], s[18:19], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s25 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[54:55], 0x80000 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s15, s39, 31 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s23, s39, 24 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[16:17], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s4 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s4, s19, 31 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[28:29], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x80000 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s8, s5, 16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s24 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s25 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s38 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s39 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s50 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s51 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[50:51], s[44:45], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x80000 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s38, s42, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s36, s42, 24 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s42, 8 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s16, s4, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s18, s4, 24 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[44:45], s[12:13], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s22 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s23 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[30:31], 0x80000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s10 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s10, s5, 24 -; GCN-NOHSA-SI-NEXT: s_waitcnt vmcnt(1) -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s24, v4 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s25, v5 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s21, v7 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s40, s4, 8 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x80000 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v8, s44 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v9, s45 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v10, s26 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v11, s27 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x80000 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s22 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s23 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s11 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v18, s10 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s10, s5, 31 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x80000 -; GCN-NOHSA-SI-NEXT: v_readfirstlane_b32 s20, v6 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s6, s21, 16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v4, s42 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v5, s43 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s12, s25, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s14, s25, 8 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v12, s38 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v13, s39 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s38, s25 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s36 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s37 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s36, s24, 16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s34 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s35 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s34, s24, 24 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s46, s24, 8 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s33, s25, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s43, s25, 24 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[22:23], s[24:25], 0x80000 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s10 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[4:5], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s18 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s27, s5, 31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s19 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s6 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[18:19], s[22:23], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s7 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[14:15], 0x80000 +; GCN-NOHSA-SI-NEXT: s_lshr_b32 s12, s5, 8 +; GCN-NOHSA-SI-NEXT: s_mov_b32 s36, s5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v14, s50 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v15, s51 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v6, s42 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v7, s43 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v16, s10 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v17, s11 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v19, s4 +; GCN-NOHSA-SI-NEXT: s_ashr_i32 s28, s5, 24 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[8:9], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[26:27], 0x80000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:224 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:208 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:192 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:176 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s16 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s17 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s7 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s18 ; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s19 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s8, s21, 8 -; GCN-NOHSA-SI-NEXT: s_mov_b32 s42, s21 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s45, s21, 31 -; GCN-NOHSA-SI-NEXT: s_ashr_i32 s47, s21, 24 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x80000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s24 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s25 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s40 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s41 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s28, s20, 16 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s44, s20, 24 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[34:35], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[38:39], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[42:43], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s64 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s65 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s8 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s9 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[36:37], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s6 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s7 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s47 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s45 -; GCN-NOHSA-SI-NEXT: s_lshr_b32 s26, s20, 8 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[36:37], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[36:37], s[44:45], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s4 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s28 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s27 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[42:43], s[48:49], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x80000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s38 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s39 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s8 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s9 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x80000 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s10 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s11 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s12 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s13 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[50:51], s[52:53], 0x80000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s28 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s29 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s36 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s37 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s40 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s41 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s42 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s43 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s20 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s21 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s26 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s27 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s46 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s47 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s50 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s51 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[44:45], s[56:57], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x80000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s12 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s13 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s43 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s33 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s30 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s31 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s23 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s15 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[16:17], s[60:61], 0x80000 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[38:39], s[58:59], 0x80000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s34 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s35 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s14 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s15 -; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[46:47], 0x80000 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s44 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s45 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s34 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s35 +; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[24:25], s[62:63], 0x80000 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s30 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s31 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s10 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s11 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s38 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s39 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s16 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s17 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16 ; GCN-NOHSA-SI-NEXT: s_waitcnt expcnt(0) -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s22 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s23 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s4 -; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s5 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v0, s20 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v1, s21 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v2, s24 +; GCN-NOHSA-SI-NEXT: v_mov_b32_e32 v3, s25 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: s_endpgm ; @@ -8038,7 +8016,6 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i64(ptr addrspace(1) %out ; GCN-HSA-NEXT: s_add_i32 s12, s12, s17 ; GCN-HSA-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 ; GCN-HSA-NEXT: s_mov_b32 flat_scratch_lo, s13 -; GCN-HSA-NEXT: s_mov_b32 s5, 0 ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 @@ -8048,219 +8025,216 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i64(ptr addrspace(1) %out ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] -; GCN-HSA-NEXT: s_mov_b32 s9, s5 -; GCN-HSA-NEXT: s_mov_b32 s3, s5 -; GCN-HSA-NEXT: s_mov_b32 s7, s5 -; GCN-HSA-NEXT: s_mov_b32 s31, s5 -; GCN-HSA-NEXT: s_mov_b32 s27, s5 -; GCN-HSA-NEXT: s_mov_b32 s15, s5 -; GCN-HSA-NEXT: s_mov_b32 s11, s5 +; GCN-HSA-NEXT: s_mov_b32 s3, 0 +; GCN-HSA-NEXT: s_mov_b32 s19, s3 +; GCN-HSA-NEXT: s_mov_b32 s15, s3 +; GCN-HSA-NEXT: s_mov_b32 s5, s3 +; GCN-HSA-NEXT: s_mov_b32 s9, s3 +; GCN-HSA-NEXT: s_mov_b32 s11, s3 +; GCN-HSA-NEXT: s_mov_b32 s13, s3 +; GCN-HSA-NEXT: s_mov_b32 s17, s3 ; GCN-HSA-NEXT: s_waitcnt vmcnt(1) -; GCN-HSA-NEXT: v_readfirstlane_b32 s17, v7 -; GCN-HSA-NEXT: v_readfirstlane_b32 s12, v4 -; GCN-HSA-NEXT: v_readfirstlane_b32 s13, v5 -; GCN-HSA-NEXT: v_readfirstlane_b32 s16, v6 -; GCN-HSA-NEXT: s_lshr_b32 s4, s17, 16 -; GCN-HSA-NEXT: s_lshr_b32 s8, s17, 8 -; GCN-HSA-NEXT: s_mov_b32 s14, s17 -; GCN-HSA-NEXT: s_lshr_b32 s2, s13, 16 -; GCN-HSA-NEXT: s_lshr_b32 s6, s13, 8 -; GCN-HSA-NEXT: s_mov_b32 s10, s13 -; GCN-HSA-NEXT: s_lshr_b32 s18, s12, 16 -; GCN-HSA-NEXT: s_lshr_b32 s22, s12, 24 -; GCN-HSA-NEXT: s_lshr_b32 s24, s12, 8 -; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[12:13], 0x80000 -; GCN-HSA-NEXT: s_lshr_b32 s12, s16, 16 -; GCN-HSA-NEXT: s_lshr_b32 s26, s16, 24 -; GCN-HSA-NEXT: s_lshr_b32 s30, s16, 8 -; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000 +; GCN-HSA-NEXT: v_readfirstlane_b32 s21, v5 +; GCN-HSA-NEXT: v_readfirstlane_b32 s20, v4 +; GCN-HSA-NEXT: v_readfirstlane_b32 s22, v6 +; GCN-HSA-NEXT: v_readfirstlane_b32 s23, v7 +; GCN-HSA-NEXT: s_lshr_b32 s18, s21, 8 +; GCN-HSA-NEXT: s_lshr_b32 s2, s23, 16 +; GCN-HSA-NEXT: s_lshr_b32 s14, s23, 8 +; GCN-HSA-NEXT: s_mov_b32 s4, s23 +; GCN-HSA-NEXT: s_lshr_b32 s8, s22, 16 +; GCN-HSA-NEXT: s_lshr_b32 s10, s22, 24 +; GCN-HSA-NEXT: s_lshr_b32 s12, s22, 8 +; GCN-HSA-NEXT: s_mov_b32 s34, s21 +; GCN-HSA-NEXT: s_lshr_b32 s38, s20, 24 +; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[18:19], 0x80000 ; GCN-HSA-NEXT: s_waitcnt vmcnt(0) -; GCN-HSA-NEXT: v_readfirstlane_b32 s38, v0 -; GCN-HSA-NEXT: v_readfirstlane_b32 s39, v1 -; GCN-HSA-NEXT: v_readfirstlane_b32 s48, v2 -; GCN-HSA-NEXT: v_readfirstlane_b32 s49, v3 -; GCN-HSA-NEXT: s_ashr_i32 s59, s17, 31 -; GCN-HSA-NEXT: s_ashr_i32 s60, s17, 24 -; GCN-HSA-NEXT: s_bfe_i64 s[46:47], s[16:17], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[14:15], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[28:29], s[24:25], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[34:35], s[22:23], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[36:37], s[18:19], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[42:43], s[10:11], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[40:41], s[6:7], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[50:51], s[2:3], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[52:53], s[30:31], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[54:55], s[26:27], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[56:57], s[12:13], 0x80000 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8 -; GCN-HSA-NEXT: s_lshr_b32 s30, s49, 16 -; GCN-HSA-NEXT: s_lshr_b32 s26, s49, 8 -; GCN-HSA-NEXT: s_lshr_b32 s14, s39, 16 -; GCN-HSA-NEXT: s_lshr_b32 s10, s39, 8 -; GCN-HSA-NEXT: s_mov_b32 s12, s39 -; GCN-HSA-NEXT: s_lshr_b32 s8, s38, 16 -; GCN-HSA-NEXT: s_lshr_b32 s6, s38, 24 -; GCN-HSA-NEXT: s_lshr_b32 s4, s38, 8 -; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[38:39], 0x80000 -; GCN-HSA-NEXT: s_mov_b32 s38, s49 -; GCN-HSA-NEXT: s_lshr_b32 s24, s48, 16 -; GCN-HSA-NEXT: s_lshr_b32 s22, s48, 24 -; GCN-HSA-NEXT: s_lshr_b32 s18, s48, 8 -; GCN-HSA-NEXT: s_ashr_i32 s45, s13, 31 -; GCN-HSA-NEXT: s_ashr_i32 s58, s13, 24 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s17 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9 -; GCN-HSA-NEXT: s_ashr_i32 s33, s39, 31 -; GCN-HSA-NEXT: s_ashr_i32 s44, s39, 24 -; GCN-HSA-NEXT: s_ashr_i32 s61, s49, 31 -; GCN-HSA-NEXT: s_ashr_i32 s62, s49, 24 -; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[48:49], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x80000 +; GCN-HSA-NEXT: v_readfirstlane_b32 s18, v0 +; GCN-HSA-NEXT: v_readfirstlane_b32 s19, v1 +; GCN-HSA-NEXT: v_readfirstlane_b32 s28, v2 +; GCN-HSA-NEXT: v_readfirstlane_b32 s29, v3 +; GCN-HSA-NEXT: s_lshr_b32 s16, s21, 16 +; GCN-HSA-NEXT: s_lshr_b32 s26, s20, 16 +; GCN-HSA-NEXT: s_lshr_b32 s40, s20, 8 +; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[20:21], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[36:37], s[22:23], 0x80000 +; GCN-HSA-NEXT: s_ashr_i32 s53, s21, 31 +; GCN-HSA-NEXT: s_ashr_i32 s61, s21, 24 +; GCN-HSA-NEXT: s_ashr_i32 s20, s23, 31 +; GCN-HSA-NEXT: s_ashr_i32 s21, s23, 24 +; GCN-HSA-NEXT: s_bfe_i64 s[44:45], s[14:15], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[2:3], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[38:39], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[46:47], s[34:35], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[50:51], s[12:13], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[54:55], s[10:11], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[56:57], s[8:9], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[34:35], s[4:5], 0x80000 +; GCN-HSA-NEXT: s_lshr_b32 s10, s19, 16 +; GCN-HSA-NEXT: s_lshr_b32 s12, s19, 8 +; GCN-HSA-NEXT: s_mov_b32 s38, s19 +; GCN-HSA-NEXT: s_lshr_b32 s42, s18, 16 +; GCN-HSA-NEXT: s_lshr_b32 s58, s18, 24 +; GCN-HSA-NEXT: s_lshr_b32 s60, s18, 8 +; GCN-HSA-NEXT: s_lshr_b32 s4, s29, 16 +; GCN-HSA-NEXT: s_lshr_b32 s8, s29, 8 +; GCN-HSA-NEXT: s_mov_b32 s62, s29 +; GCN-HSA-NEXT: s_lshr_b32 s64, s28, 16 +; GCN-HSA-NEXT: s_lshr_b32 s66, s28, 24 +; GCN-HSA-NEXT: s_lshr_b32 s68, s28, 8 +; GCN-HSA-NEXT: s_ashr_i32 s63, s29, 31 +; GCN-HSA-NEXT: s_ashr_i32 s65, s29, 24 +; GCN-HSA-NEXT: s_bfe_i64 s[30:31], s[16:17], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[40:41], 0x80000 ; GCN-HSA-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x80000 -; GCN-HSA-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x80000 -; GCN-HSA-NEXT: s_add_u32 s48, s0, 0x70 -; GCN-HSA-NEXT: s_addc_u32 s49, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s48 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s49 -; GCN-HSA-NEXT: s_add_u32 s48, s0, 0x60 -; GCN-HSA-NEXT: s_addc_u32 s49, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v24, s48 -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s49 -; GCN-HSA-NEXT: s_add_u32 s48, s0, 0x50 -; GCN-HSA-NEXT: s_addc_u32 s49, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s46 -; GCN-HSA-NEXT: s_add_u32 s46, s0, 64 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s47 -; GCN-HSA-NEXT: s_addc_u32 s47, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s42 -; GCN-HSA-NEXT: s_add_u32 s42, s0, 48 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s43 -; GCN-HSA-NEXT: s_addc_u32 s43, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3] -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s60 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s36 -; GCN-HSA-NEXT: s_add_u32 s36, s0, 32 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s59 -; GCN-HSA-NEXT: v_mov_b32_e32 v30, s42 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s37 -; GCN-HSA-NEXT: s_addc_u32 s37, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s50 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s51 -; GCN-HSA-NEXT: v_mov_b32_e32 v31, s43 -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[4:7] -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s58 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s45 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s20 -; GCN-HSA-NEXT: s_add_u32 s20, s0, 16 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s21 -; GCN-HSA-NEXT: s_addc_u32 s21, s1, 0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[16:19] -; GCN-HSA-NEXT: v_mov_b32_e32 v24, s36 -; GCN-HSA-NEXT: v_mov_b32_e32 v16, s20 -; GCN-HSA-NEXT: v_mov_b32_e32 v17, s21 -; GCN-HSA-NEXT: s_add_u32 s20, s0, 0xf0 -; GCN-HSA-NEXT: s_addc_u32 s21, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v18, s20 -; GCN-HSA-NEXT: v_mov_b32_e32 v22, s40 -; GCN-HSA-NEXT: v_mov_b32_e32 v23, s41 -; GCN-HSA-NEXT: v_mov_b32_e32 v25, s37 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s34 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s35 -; GCN-HSA-NEXT: v_mov_b32_e32 v19, s21 -; GCN-HSA-NEXT: s_add_u32 s20, s0, 0xe0 -; GCN-HSA-NEXT: v_mov_b32_e32 v26, s48 -; GCN-HSA-NEXT: v_mov_b32_e32 v28, s46 -; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[20:23] -; GCN-HSA-NEXT: s_addc_u32 s21, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v20, s20 -; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s21 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s20 +; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[18:19], 0x80000 +; GCN-HSA-NEXT: s_ashr_i32 s33, s19, 31 +; GCN-HSA-NEXT: s_ashr_i32 s52, s19, 24 +; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[28:29], 0x80000 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s34 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s35 +; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[10:11], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[40:41], s[8:9], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[48:49], s[4:5], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[60:61], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[58:59], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[42:43], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[38:39], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[28:29], s[68:69], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[34:35], s[66:67], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[38:39], s[64:65], 0x80000 +; GCN-HSA-NEXT: s_bfe_i64 s[42:43], s[62:63], 0x80000 +; GCN-HSA-NEXT: s_add_u32 s58, s0, 0x70 +; GCN-HSA-NEXT: s_addc_u32 s59, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s58 +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s59 +; GCN-HSA-NEXT: s_add_u32 s58, s0, 0x60 +; GCN-HSA-NEXT: s_addc_u32 s59, s1, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[25:26], v[0:3] +; GCN-HSA-NEXT: v_mov_b32_e32 v26, s22 +; GCN-HSA-NEXT: s_add_u32 s22, s0, 0x50 +; GCN-HSA-NEXT: v_mov_b32_e32 v27, s23 +; GCN-HSA-NEXT: s_addc_u32 s23, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v28, s58 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 64 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s44 +; GCN-HSA-NEXT: v_mov_b32_e32 v29, s59 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s45 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s7 +; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[4:7] +; GCN-HSA-NEXT: v_mov_b32_e32 v29, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, s23 +; GCN-HSA-NEXT: v_mov_b32_e32 v28, s6 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 48 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s56 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s57 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s54 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s55 -; GCN-HSA-NEXT: v_mov_b32_e32 v27, s49 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s52 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s53 -; GCN-HSA-NEXT: v_mov_b32_e32 v29, s47 -; GCN-HSA-NEXT: v_mov_b32_e32 v6, s28 -; GCN-HSA-NEXT: v_mov_b32_e32 v7, s29 -; GCN-HSA-NEXT: v_mov_b32_e32 v21, s21 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 -; GCN-HSA-NEXT: s_add_u32 s20, s0, 0xd0 -; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v30, s22 +; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s36 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s6 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 32 +; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v31, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v30, s6 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 16 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s37 +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s50 +; GCN-HSA-NEXT: v_mov_b32_e32 v15, s51 +; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15] -; GCN-HSA-NEXT: v_mov_b32_e32 v8, s30 -; GCN-HSA-NEXT: v_mov_b32_e32 v9, s31 -; GCN-HSA-NEXT: v_mov_b32_e32 v10, s62 -; GCN-HSA-NEXT: v_mov_b32_e32 v11, s61 -; GCN-HSA-NEXT: v_mov_b32_e32 v12, s38 -; GCN-HSA-NEXT: v_mov_b32_e32 v13, s39 -; GCN-HSA-NEXT: v_mov_b32_e32 v14, s26 -; GCN-HSA-NEXT: v_mov_b32_e32 v15, s27 -; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7] -; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[8:11] -; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[12:15] -; GCN-HSA-NEXT: s_addc_u32 s21, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s20 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s24 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s22 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s23 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s21 +; GCN-HSA-NEXT: v_mov_b32_e32 v16, s30 +; GCN-HSA-NEXT: v_mov_b32_e32 v12, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s6 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xf0 +; GCN-HSA-NEXT: v_mov_b32_e32 v17, s31 +; GCN-HSA-NEXT: v_mov_b32_e32 v18, s61 +; GCN-HSA-NEXT: v_mov_b32_e32 v19, s53 +; GCN-HSA-NEXT: v_mov_b32_e32 v20, s46 +; GCN-HSA-NEXT: v_mov_b32_e32 v21, s47 +; GCN-HSA-NEXT: v_mov_b32_e32 v22, s24 +; GCN-HSA-NEXT: v_mov_b32_e32 v23, s25 +; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v24, s26 +; GCN-HSA-NEXT: v_mov_b32_e32 v25, s27 +; GCN-HSA-NEXT: flat_store_dwordx4 v[9:10], v[16:19] +; GCN-HSA-NEXT: v_mov_b32_e32 v14, s7 +; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[20:23] +; GCN-HSA-NEXT: flat_store_dwordx4 v[11:12], v[24:27] +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s1 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s16 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s17 +; GCN-HSA-NEXT: v_mov_b32_e32 v13, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s0 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xe0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s48 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s49 +; GCN-HSA-NEXT: v_mov_b32_e32 v6, s65 +; GCN-HSA-NEXT: v_mov_b32_e32 v7, s63 +; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[0:3] +; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[4:7] +; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s7 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xd0 +; GCN-HSA-NEXT: v_mov_b32_e32 v8, s42 +; GCN-HSA-NEXT: v_mov_b32_e32 v9, s43 +; GCN-HSA-NEXT: v_mov_b32_e32 v10, s40 +; GCN-HSA-NEXT: v_mov_b32_e32 v11, s41 +; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 +; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11] +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s38 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s39 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s34 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s35 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xc0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_nop 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s16 -; GCN-HSA-NEXT: s_add_u32 s16, s0, 0xc0 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s17 -; GCN-HSA-NEXT: s_addc_u32 s17, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s18 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s19 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17 +; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s20 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s28 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s29 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xb0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_nop 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 -; GCN-HSA-NEXT: s_add_u32 s14, s0, 0xb0 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s15 -; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s44 +; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s19 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s52 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s33 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s15 -; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_nop 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10 -; GCN-HSA-NEXT: s_add_u32 s10, s0, 0xa0 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s11 -; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 +; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xa0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] -; GCN-HSA-NEXT: s_nop 0 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6 +; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 +; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 +; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 ; GCN-HSA-NEXT: s_add_u32 s6, s0, 0x90 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s15 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s12 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s13 ; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 +; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 0x80 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s11 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] @@ -12468,17 +12442,15 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i16(ptr addrspace(1) %out ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 +; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 -; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: s_waitcnt vmcnt(1) -; GCN-HSA-NEXT: v_readfirstlane_b32 s2, v2 ; GCN-HSA-NEXT: v_readfirstlane_b32 s3, v3 ; GCN-HSA-NEXT: v_readfirstlane_b32 s4, v0 ; GCN-HSA-NEXT: v_readfirstlane_b32 s5, v1 -; GCN-HSA-NEXT: s_waitcnt vmcnt(0) -; GCN-HSA-NEXT: v_readfirstlane_b32 s21, v5 +; GCN-HSA-NEXT: v_readfirstlane_b32 s2, v2 ; GCN-HSA-NEXT: s_ashr_i32 s6, s5, 24 ; GCN-HSA-NEXT: s_bfe_i32 s7, s5, 0x80010 ; GCN-HSA-NEXT: s_bfe_i32 s8, s5, 0x80008 @@ -12493,11 +12465,11 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i16(ptr addrspace(1) %out ; GCN-HSA-NEXT: s_sext_i32_i8 s3, s3 ; GCN-HSA-NEXT: s_ashr_i32 s15, s2, 24 ; GCN-HSA-NEXT: s_bfe_i32 s16, s2, 0x80010 -; GCN-HSA-NEXT: s_ashr_i32 s22, s21, 24 -; GCN-HSA-NEXT: s_bfe_i32 s23, s21, 0x80010 +; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: v_readfirstlane_b32 s18, v6 ; GCN-HSA-NEXT: v_readfirstlane_b32 s19, v7 ; GCN-HSA-NEXT: v_readfirstlane_b32 s20, v4 +; GCN-HSA-NEXT: v_readfirstlane_b32 s21, v5 ; GCN-HSA-NEXT: s_lshl_b32 s6, s6, 16 ; GCN-HSA-NEXT: s_and_b32 s7, s7, 0xffff ; GCN-HSA-NEXT: s_lshl_b32 s8, s8, 16 @@ -12510,57 +12482,59 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i16(ptr addrspace(1) %out ; GCN-HSA-NEXT: s_and_b32 s13, s13, 0xffff ; GCN-HSA-NEXT: s_lshl_b32 s14, s14, 16 ; GCN-HSA-NEXT: s_and_b32 s3, s3, 0xffff +; GCN-HSA-NEXT: s_bfe_i32 s17, s2, 0x80008 ; GCN-HSA-NEXT: s_lshl_b32 s15, s15, 16 ; GCN-HSA-NEXT: s_and_b32 s16, s16, 0xffff -; GCN-HSA-NEXT: s_lshl_b32 s22, s22, 16 -; GCN-HSA-NEXT: s_and_b32 s23, s23, 0xffff -; GCN-HSA-NEXT: s_bfe_i32 s17, s2, 0x80008 +; GCN-HSA-NEXT: s_ashr_i32 s22, s21, 24 +; GCN-HSA-NEXT: s_bfe_i32 s23, s21, 0x80010 ; GCN-HSA-NEXT: s_bfe_i32 s24, s21, 0x80008 ; GCN-HSA-NEXT: s_sext_i32_i8 s21, s21 ; GCN-HSA-NEXT: s_ashr_i32 s25, s20, 24 +; GCN-HSA-NEXT: s_bfe_i32 s26, s20, 0x80010 +; GCN-HSA-NEXT: s_bfe_i32 s27, s20, 0x80008 +; GCN-HSA-NEXT: s_sext_i32_i8 s20, s20 ; GCN-HSA-NEXT: s_or_b32 s6, s7, s6 -; GCN-HSA-NEXT: s_bfe_i32 s7, s20, 0x80010 +; GCN-HSA-NEXT: s_ashr_i32 s7, s19, 24 ; GCN-HSA-NEXT: s_or_b32 s5, s5, s8 -; GCN-HSA-NEXT: s_bfe_i32 s8, s20, 0x80008 -; GCN-HSA-NEXT: s_sext_i32_i8 s20, s20 +; GCN-HSA-NEXT: s_bfe_i32 s8, s19, 0x80010 ; GCN-HSA-NEXT: s_or_b32 s9, s10, s9 -; GCN-HSA-NEXT: s_ashr_i32 s10, s19, 24 +; GCN-HSA-NEXT: s_bfe_i32 s10, s19, 0x80008 +; GCN-HSA-NEXT: s_sext_i32_i8 s19, s19 ; GCN-HSA-NEXT: s_or_b32 s4, s4, s11 -; GCN-HSA-NEXT: s_bfe_i32 s11, s19, 0x80010 +; GCN-HSA-NEXT: s_ashr_i32 s11, s18, 24 ; GCN-HSA-NEXT: s_or_b32 s12, s13, s12 -; GCN-HSA-NEXT: s_bfe_i32 s13, s19, 0x80008 -; GCN-HSA-NEXT: s_sext_i32_i8 s19, s19 +; GCN-HSA-NEXT: s_bfe_i32 s13, s18, 0x80010 ; GCN-HSA-NEXT: s_or_b32 s3, s3, s14 -; GCN-HSA-NEXT: s_ashr_i32 s14, s18, 24 -; GCN-HSA-NEXT: s_or_b32 s15, s16, s15 -; GCN-HSA-NEXT: s_bfe_i32 s16, s18, 0x80010 -; GCN-HSA-NEXT: s_or_b32 s22, s23, s22 -; GCN-HSA-NEXT: s_bfe_i32 s23, s18, 0x80008 +; GCN-HSA-NEXT: s_bfe_i32 s14, s18, 0x80008 ; GCN-HSA-NEXT: s_sext_i32_i8 s18, s18 ; GCN-HSA-NEXT: s_sext_i32_i8 s2, s2 ; GCN-HSA-NEXT: s_lshl_b32 s17, s17, 16 -; GCN-HSA-NEXT: s_lshl_b32 s24, s24, 16 +; GCN-HSA-NEXT: s_or_b32 s15, s16, s15 +; GCN-HSA-NEXT: s_lshl_b32 s16, s22, 16 +; GCN-HSA-NEXT: s_and_b32 s22, s23, 0xffff +; GCN-HSA-NEXT: s_lshl_b32 s23, s24, 16 ; GCN-HSA-NEXT: s_and_b32 s21, s21, 0xffff -; GCN-HSA-NEXT: s_lshl_b32 s25, s25, 16 -; GCN-HSA-NEXT: s_and_b32 s7, s7, 0xffff -; GCN-HSA-NEXT: s_lshl_b32 s8, s8, 16 +; GCN-HSA-NEXT: s_lshl_b32 s24, s25, 16 +; GCN-HSA-NEXT: s_and_b32 s25, s26, 0xffff +; GCN-HSA-NEXT: s_lshl_b32 s26, s27, 16 ; GCN-HSA-NEXT: s_and_b32 s20, s20, 0xffff +; GCN-HSA-NEXT: s_lshl_b32 s7, s7, 16 +; GCN-HSA-NEXT: s_and_b32 s8, s8, 0xffff ; GCN-HSA-NEXT: s_lshl_b32 s10, s10, 16 -; GCN-HSA-NEXT: s_and_b32 s11, s11, 0xffff -; GCN-HSA-NEXT: s_lshl_b32 s13, s13, 16 ; GCN-HSA-NEXT: s_and_b32 s19, s19, 0xffff +; GCN-HSA-NEXT: s_lshl_b32 s11, s11, 16 +; GCN-HSA-NEXT: s_and_b32 s13, s13, 0xffff ; GCN-HSA-NEXT: s_lshl_b32 s14, s14, 16 -; GCN-HSA-NEXT: s_and_b32 s16, s16, 0xffff -; GCN-HSA-NEXT: s_lshl_b32 s23, s23, 16 ; GCN-HSA-NEXT: s_and_b32 s18, s18, 0xffff ; GCN-HSA-NEXT: s_and_b32 s2, s2, 0xffff -; GCN-HSA-NEXT: s_or_b32 s21, s21, s24 -; GCN-HSA-NEXT: s_or_b32 s7, s7, s25 -; GCN-HSA-NEXT: s_or_b32 s8, s20, s8 -; GCN-HSA-NEXT: s_or_b32 s10, s11, s10 -; GCN-HSA-NEXT: s_or_b32 s11, s19, s13 -; GCN-HSA-NEXT: s_or_b32 s13, s16, s14 -; GCN-HSA-NEXT: s_or_b32 s14, s18, s23 +; GCN-HSA-NEXT: s_or_b32 s16, s22, s16 +; GCN-HSA-NEXT: s_or_b32 s21, s21, s23 +; GCN-HSA-NEXT: s_or_b32 s22, s25, s24 +; GCN-HSA-NEXT: s_or_b32 s20, s20, s26 +; GCN-HSA-NEXT: s_or_b32 s7, s8, s7 +; GCN-HSA-NEXT: s_or_b32 s8, s19, s10 +; GCN-HSA-NEXT: s_or_b32 s10, s13, s11 +; GCN-HSA-NEXT: s_or_b32 s11, s18, s14 ; GCN-HSA-NEXT: s_or_b32 s2, s2, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 @@ -12582,18 +12556,18 @@ define amdgpu_kernel void @global_sextload_v32i8_to_v32i16(ptr addrspace(1) %out ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 32 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13 -; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s11 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s10 +; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 -; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 -; GCN-HSA-NEXT: v_mov_b32_e32 v1, s7 +; GCN-HSA-NEXT: v_mov_b32_e32 v0, s20 +; GCN-HSA-NEXT: v_mov_b32_e32 v1, s22 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s21 -; GCN-HSA-NEXT: v_mov_b32_e32 v3, s22 +; GCN-HSA-NEXT: v_mov_b32_e32 v3, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: s_endpgm diff --git a/llvm/test/CodeGen/AMDGPU/load-local-i16.ll b/llvm/test/CodeGen/AMDGPU/load-local-i16.ll index c4c15e0095c85..3c46a9345f490 100644 --- a/llvm/test/CodeGen/AMDGPU/load-local-i16.ll +++ b/llvm/test/CodeGen/AMDGPU/load-local-i16.ll @@ -1526,28 +1526,28 @@ define amdgpu_kernel void @local_zextload_v16i16_to_v16i32(ptr addrspace(3) %out ; SI-NEXT: ds_read2_b64 v[0:3], v4 offset1:1 ; SI-NEXT: ds_read2_b64 v[4:7], v4 offset0:2 offset1:3 ; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v1 ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v0 +; SI-NEXT: s_waitcnt lgkmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v6 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v0 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v6 +; SI-NEXT: v_mov_b32_e32 v0, s0 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v1 ; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v2 -; SI-NEXT: s_waitcnt lgkmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v4 ; SI-NEXT: v_and_b32_e32 v8, 0xffff, v1 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v0 ; SI-NEXT: v_and_b32_e32 v12, 0xffff, v3 ; SI-NEXT: v_and_b32_e32 v14, 0xffff, v2 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v7 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v6 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v4 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v7 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v6 -; SI-NEXT: v_mov_b32_e32 v4, s0 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v5 ; SI-NEXT: v_and_b32_e32 v16, 0xffff, v5 -; SI-NEXT: ds_write2_b64 v4, v[2:3], v[0:1] offset0:6 offset1:7 -; SI-NEXT: ds_write2_b64 v4, v[18:19], v[16:17] offset0:4 offset1:5 -; SI-NEXT: ds_write2_b64 v4, v[14:15], v[12:13] offset0:2 offset1:3 -; SI-NEXT: ds_write2_b64 v4, v[10:11], v[8:9] offset1:1 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v4 +; SI-NEXT: ds_write2_b64 v0, v[22:23], v[20:21] offset0:6 offset1:7 +; SI-NEXT: ds_write2_b64 v0, v[18:19], v[16:17] offset0:4 offset1:5 +; SI-NEXT: ds_write2_b64 v0, v[14:15], v[12:13] offset0:2 offset1:3 +; SI-NEXT: ds_write2_b64 v0, v[10:11], v[8:9] offset1:1 ; SI-NEXT: s_endpgm ; ; VI-NO-DS128-LABEL: local_zextload_v16i16_to_v16i32: @@ -1795,28 +1795,28 @@ define amdgpu_kernel void @local_sextload_v16i16_to_v16i32(ptr addrspace(3) %out ; SI-NEXT: ds_read2_b64 v[0:3], v4 offset1:1 ; SI-NEXT: ds_read2_b64 v[4:7], v4 offset0:2 offset1:3 ; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_ashrrev_i32_e32 v9, 16, v1 ; SI-NEXT: v_ashrrev_i32_e32 v11, 16, v0 +; SI-NEXT: s_waitcnt lgkmcnt(0) +; SI-NEXT: v_ashrrev_i32_e32 v21, 16, v7 +; SI-NEXT: v_ashrrev_i32_e32 v23, 16, v6 +; SI-NEXT: v_bfe_i32 v10, v0, 0, 16 +; SI-NEXT: v_bfe_i32 v20, v7, 0, 16 +; SI-NEXT: v_bfe_i32 v22, v6, 0, 16 +; SI-NEXT: v_mov_b32_e32 v0, s0 +; SI-NEXT: v_ashrrev_i32_e32 v9, 16, v1 ; SI-NEXT: v_ashrrev_i32_e32 v13, 16, v3 ; SI-NEXT: v_ashrrev_i32_e32 v15, 16, v2 -; SI-NEXT: s_waitcnt lgkmcnt(0) +; SI-NEXT: v_ashrrev_i32_e32 v17, 16, v5 ; SI-NEXT: v_ashrrev_i32_e32 v19, 16, v4 ; SI-NEXT: v_bfe_i32 v8, v1, 0, 16 -; SI-NEXT: v_bfe_i32 v10, v0, 0, 16 ; SI-NEXT: v_bfe_i32 v12, v3, 0, 16 ; SI-NEXT: v_bfe_i32 v14, v2, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v1, 16, v7 -; SI-NEXT: v_ashrrev_i32_e32 v3, 16, v6 -; SI-NEXT: v_bfe_i32 v18, v4, 0, 16 -; SI-NEXT: v_bfe_i32 v0, v7, 0, 16 -; SI-NEXT: v_bfe_i32 v2, v6, 0, 16 -; SI-NEXT: v_mov_b32_e32 v4, s0 -; SI-NEXT: v_ashrrev_i32_e32 v17, 16, v5 ; SI-NEXT: v_bfe_i32 v16, v5, 0, 16 -; SI-NEXT: ds_write2_b64 v4, v[2:3], v[0:1] offset0:6 offset1:7 -; SI-NEXT: ds_write2_b64 v4, v[18:19], v[16:17] offset0:4 offset1:5 -; SI-NEXT: ds_write2_b64 v4, v[14:15], v[12:13] offset0:2 offset1:3 -; SI-NEXT: ds_write2_b64 v4, v[10:11], v[8:9] offset1:1 +; SI-NEXT: v_bfe_i32 v18, v4, 0, 16 +; SI-NEXT: ds_write2_b64 v0, v[22:23], v[20:21] offset0:6 offset1:7 +; SI-NEXT: ds_write2_b64 v0, v[18:19], v[16:17] offset0:4 offset1:5 +; SI-NEXT: ds_write2_b64 v0, v[14:15], v[12:13] offset0:2 offset1:3 +; SI-NEXT: ds_write2_b64 v0, v[10:11], v[8:9] offset1:1 ; SI-NEXT: s_endpgm ; ; VI-NO-DS128-LABEL: local_sextload_v16i16_to_v16i32: @@ -1828,28 +1828,28 @@ define amdgpu_kernel void @local_sextload_v16i16_to_v16i32(ptr addrspace(3) %out ; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v4 offset1:1 ; VI-NO-DS128-NEXT: ds_read2_b64 v[4:7], v4 offset0:2 offset1:3 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v1 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v0 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v7 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v6 +; VI-NO-DS128-NEXT: v_bfe_i32 v10, v0, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v20, v7, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v22, v6, 0, 16 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v0, s0 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v1 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v3 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v2 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v5 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v4 ; VI-NO-DS128-NEXT: v_bfe_i32 v8, v1, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v10, v0, 0, 16 ; VI-NO-DS128-NEXT: v_bfe_i32 v12, v3, 0, 16 ; VI-NO-DS128-NEXT: v_bfe_i32 v14, v2, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v7 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v6 -; VI-NO-DS128-NEXT: v_bfe_i32 v18, v4, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v0, v7, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v2, v6, 0, 16 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v4, s0 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v5 ; VI-NO-DS128-NEXT: v_bfe_i32 v16, v5, 0, 16 -; VI-NO-DS128-NEXT: ds_write2_b64 v4, v[2:3], v[0:1] offset0:6 offset1:7 -; VI-NO-DS128-NEXT: ds_write2_b64 v4, v[18:19], v[16:17] offset0:4 offset1:5 -; VI-NO-DS128-NEXT: ds_write2_b64 v4, v[14:15], v[12:13] offset0:2 offset1:3 -; VI-NO-DS128-NEXT: ds_write2_b64 v4, v[10:11], v[8:9] offset1:1 +; VI-NO-DS128-NEXT: v_bfe_i32 v18, v4, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[22:23], v[20:21] offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[18:19], v[16:17] offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[14:15], v[12:13] offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[10:11], v[8:9] offset1:1 ; VI-NO-DS128-NEXT: s_endpgm ; ; GFX9-NO-DS128-LABEL: local_sextload_v16i16_to_v16i32: @@ -1860,28 +1860,28 @@ define amdgpu_kernel void @local_sextload_v16i16_to_v16i32(ptr addrspace(3) %out ; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v4 offset1:1 ; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v4 offset0:2 offset1:3 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v1 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v0 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v7 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v6 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v10, v0, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v20, v7, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v22, v6, 0, 16 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v0, s0 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v1 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v3 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v2 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v5 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v4 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v8, v1, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v10, v0, 0, 16 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v12, v3, 0, 16 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v14, v2, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v7 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v6 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v4, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v0, v7, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v2, v6, 0, 16 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v4, s0 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v5 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v5, 0, 16 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v4, v[2:3], v[0:1] offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v4, v[18:19], v[16:17] offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v4, v[14:15], v[12:13] offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v4, v[10:11], v[8:9] offset1:1 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v4, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[22:23], v[20:21] offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[18:19], v[16:17] offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[14:15], v[12:13] offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[10:11], v[8:9] offset1:1 ; GFX9-NO-DS128-NEXT: s_endpgm ; ; EG-LABEL: local_sextload_v16i16_to_v16i32: @@ -2003,28 +2003,28 @@ define amdgpu_kernel void @local_sextload_v16i16_to_v16i32(ptr addrspace(3) %out ; VI-DS128-NEXT: ds_read_b128 v[0:3], v4 ; VI-DS128-NEXT: ds_read_b128 v[4:7], v4 offset:16 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v1 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v0 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) +; VI-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v7 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v6 +; VI-DS128-NEXT: v_bfe_i32 v8, v0, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v22, v7, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v20, v6, 0, 16 +; VI-DS128-NEXT: v_mov_b32_e32 v0, s0 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v1 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v3 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v2 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) +; VI-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v5 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v4 ; VI-DS128-NEXT: v_bfe_i32 v10, v1, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v8, v0, 0, 16 ; VI-DS128-NEXT: v_bfe_i32 v14, v3, 0, 16 ; VI-DS128-NEXT: v_bfe_i32 v12, v2, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v7 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v6 -; VI-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v2, v7, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v0, v6, 0, 16 -; VI-DS128-NEXT: v_mov_b32_e32 v4, s0 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v5 ; VI-DS128-NEXT: v_bfe_i32 v18, v5, 0, 16 -; VI-DS128-NEXT: ds_write_b128 v4, v[0:3] offset:48 -; VI-DS128-NEXT: ds_write_b128 v4, v[16:19] offset:32 -; VI-DS128-NEXT: ds_write_b128 v4, v[12:15] offset:16 -; VI-DS128-NEXT: ds_write_b128 v4, v[8:11] +; VI-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v0, v[20:23] offset:48 +; VI-DS128-NEXT: ds_write_b128 v0, v[16:19] offset:32 +; VI-DS128-NEXT: ds_write_b128 v0, v[12:15] offset:16 +; VI-DS128-NEXT: ds_write_b128 v0, v[8:11] ; VI-DS128-NEXT: s_endpgm ; ; GFX9-DS128-LABEL: local_sextload_v16i16_to_v16i32: @@ -2035,28 +2035,28 @@ define amdgpu_kernel void @local_sextload_v16i16_to_v16i32(ptr addrspace(3) %out ; GFX9-DS128-NEXT: ds_read_b128 v[0:3], v4 ; GFX9-DS128-NEXT: ds_read_b128 v[4:7], v4 offset:16 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v1 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v0 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v7 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v6 +; GFX9-DS128-NEXT: v_bfe_i32 v8, v0, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v22, v7, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v20, v6, 0, 16 +; GFX9-DS128-NEXT: v_mov_b32_e32 v0, s0 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v1 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v3 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v2 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v5 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v4 ; GFX9-DS128-NEXT: v_bfe_i32 v10, v1, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v8, v0, 0, 16 ; GFX9-DS128-NEXT: v_bfe_i32 v14, v3, 0, 16 ; GFX9-DS128-NEXT: v_bfe_i32 v12, v2, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v7 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v6 -; GFX9-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v2, v7, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v0, v6, 0, 16 -; GFX9-DS128-NEXT: v_mov_b32_e32 v4, s0 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v5 ; GFX9-DS128-NEXT: v_bfe_i32 v18, v5, 0, 16 -; GFX9-DS128-NEXT: ds_write_b128 v4, v[0:3] offset:48 -; GFX9-DS128-NEXT: ds_write_b128 v4, v[16:19] offset:32 -; GFX9-DS128-NEXT: ds_write_b128 v4, v[12:15] offset:16 -; GFX9-DS128-NEXT: ds_write_b128 v4, v[8:11] +; GFX9-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[20:23] offset:48 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[16:19] offset:32 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[12:15] offset:16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[8:11] ; GFX9-DS128-NEXT: s_endpgm %load = load <16 x i16>, ptr addrspace(3) %in %ext = sext <16 x i16> %load to <16 x i32> @@ -2070,56 +2070,56 @@ define amdgpu_kernel void @local_zextload_v32i16_to_v32i32(ptr addrspace(3) %out ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 ; SI-NEXT: s_mov_b32 m0, -1 ; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_mov_b32_e32 v24, s1 -; SI-NEXT: ds_read2_b64 v[0:3], v24 offset1:1 -; SI-NEXT: ds_read2_b64 v[4:7], v24 offset0:2 offset1:3 -; SI-NEXT: v_mov_b32_e32 v32, s0 -; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v1 -; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v0 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v3 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v2 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v5 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v1 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v0 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v3 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v2 -; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v4 -; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v7 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v5 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v4 -; SI-NEXT: ds_read2_b64 v[0:3], v24 offset0:4 offset1:5 -; SI-NEXT: v_and_b32_e32 v20, 0xffff, v7 -; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v6 -; SI-NEXT: v_and_b32_e32 v22, 0xffff, v6 -; SI-NEXT: ds_read2_b64 v[4:7], v24 offset0:6 offset1:7 -; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v1 -; SI-NEXT: v_and_b32_e32 v24, 0xffff, v1 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v7 -; SI-NEXT: v_and_b32_e32 v30, 0xffff, v7 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v3 -; SI-NEXT: v_and_b32_e32 v26, 0xffff, v3 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v5 -; SI-NEXT: v_and_b32_e32 v28, 0xffff, v5 -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v4 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; SI-NEXT: ds_write2_b64 v32, v[6:7], v[30:31] offset0:14 offset1:15 -; SI-NEXT: ds_write2_b64 v32, v[4:5], v[28:29] offset0:12 offset1:13 -; SI-NEXT: ds_write2_b64 v32, v[2:3], v[26:27] offset0:10 offset1:11 -; SI-NEXT: ds_write2_b64 v32, v[0:1], v[24:25] offset0:8 offset1:9 -; SI-NEXT: ds_write2_b64 v32, v[22:23], v[20:21] offset0:6 offset1:7 -; SI-NEXT: ds_write2_b64 v32, v[18:19], v[16:17] offset0:4 offset1:5 -; SI-NEXT: ds_write2_b64 v32, v[14:15], v[12:13] offset0:2 offset1:3 -; SI-NEXT: ds_write2_b64 v32, v[10:11], v[8:9] offset1:1 +; SI-NEXT: v_mov_b32_e32 v12, s1 +; SI-NEXT: ds_read2_b64 v[0:3], v12 offset1:1 +; SI-NEXT: ds_read2_b64 v[4:7], v12 offset0:6 offset1:7 +; SI-NEXT: ds_read2_b64 v[8:11], v12 offset0:4 offset1:5 +; SI-NEXT: ds_read2_b64 v[12:15], v12 offset0:2 offset1:3 +; SI-NEXT: v_mov_b32_e32 v28, s0 +; SI-NEXT: s_waitcnt lgkmcnt(3) +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v1 +; SI-NEXT: s_waitcnt lgkmcnt(2) +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v6 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v6 +; SI-NEXT: ds_write2_b64 v28, v[20:21], v[18:19] offset0:14 offset1:15 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v5 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v4 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v5 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v4 +; SI-NEXT: ds_write2_b64 v28, v[22:23], v[20:21] offset0:12 offset1:13 +; SI-NEXT: s_waitcnt lgkmcnt(3) +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v11 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v10 +; SI-NEXT: ds_write2_b64 v28, v[24:25], v[22:23] offset0:10 offset1:11 +; SI-NEXT: s_waitcnt lgkmcnt(3) +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v15 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v9 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v9 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v8 +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v14 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v15 +; SI-NEXT: v_and_b32_e32 v7, 0xffff, v14 +; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v0 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v2 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v13 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v12 +; SI-NEXT: ds_write2_b64 v28, v[26:27], v[24:25] offset0:8 offset1:9 +; SI-NEXT: v_and_b32_e32 v16, 0xffff, v1 +; SI-NEXT: v_and_b32_e32 v5, 0xffff, v0 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v2 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v13 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v12 +; SI-NEXT: ds_write2_b64 v28, v[7:8], v[22:23] offset0:6 offset1:7 +; SI-NEXT: ds_write2_b64 v28, v[9:10], v[20:21] offset0:4 offset1:5 +; SI-NEXT: ds_write2_b64 v28, v[3:4], v[18:19] offset0:2 offset1:3 +; SI-NEXT: ds_write2_b64 v28, v[5:6], v[16:17] offset1:1 ; SI-NEXT: s_endpgm ; ; VI-NO-DS128-LABEL: local_zextload_v32i16_to_v32i32: @@ -2127,112 +2127,111 @@ define amdgpu_kernel void @local_zextload_v32i16_to_v32i32(ptr addrspace(3) %out ; VI-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-NO-DS128-NEXT: s_mov_b32 m0, -1 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_mov_b32_e32 v24, s1 -; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v24 offset1:1 -; VI-NO-DS128-NEXT: ds_read2_b64 v[4:7], v24 offset0:2 offset1:3 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v32, s0 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v3 -; VI-NO-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v3 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v2 -; VI-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v2 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v1 -; VI-NO-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v1 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v0 -; VI-NO-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v0 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v7 -; VI-NO-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v7 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v6 -; VI-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v6 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v5 -; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v24 offset0:4 offset1:5 -; VI-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v5 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v4 -; VI-NO-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v4 -; VI-NO-DS128-NEXT: ds_read2_b64 v[4:7], v24 offset0:6 offset1:7 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v1 -; VI-NO-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v1 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; VI-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v31, 16, v5 -; VI-NO-DS128-NEXT: v_and_b32_e32 v30, 0xffff, v5 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v12, s1 +; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v12 offset1:1 +; VI-NO-DS128-NEXT: ds_read2_b64 v[4:7], v12 offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_read2_b64 v[8:11], v12 offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_read2_b64 v[12:15], v12 offset0:4 offset1:5 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v20, s0 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v3 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(2) +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v5 +; VI-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v5 ; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v4 ; VI-NO-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v27, 16, v3 -; VI-NO-DS128-NEXT: v_and_b32_e32 v26, 0xffff, v3 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v2 -; VI-NO-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v7 -; VI-NO-DS128-NEXT: v_and_b32_e32 v28, 0xffff, v7 +; VI-NO-DS128-NEXT: ds_write2_b64 v20, v[4:5], v[18:19] offset0:12 offset1:13 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v7 +; VI-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v7 ; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v6 ; VI-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[4:5], v[30:31] offset0:12 offset1:13 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[6:7], v[28:29] offset0:14 offset1:15 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[2:3], v[26:27] offset0:10 offset1:11 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[0:1], v[24:25] offset0:8 offset1:9 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[22:23], v[20:21] offset0:4 offset1:5 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[18:19], v[16:17] offset0:6 offset1:7 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[14:15], v[12:13] offset1:1 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[10:11], v[8:9] offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_write2_b64 v20, v[6:7], v[18:19] offset0:14 offset1:15 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(2) +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v15 +; VI-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v15 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v14 +; VI-NO-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; VI-NO-DS128-NEXT: ds_write2_b64 v20, v[14:15], v[18:19] offset0:10 offset1:11 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v9 +; VI-NO-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v9 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v13 +; VI-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v13 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v12 +; VI-NO-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v8 +; VI-NO-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; VI-NO-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v3 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v2 +; VI-NO-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v1 +; VI-NO-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v1 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; VI-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v11 +; VI-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v11 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v10 +; VI-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; VI-NO-DS128-NEXT: ds_write2_b64 v20, v[12:13], v[18:19] offset0:8 offset1:9 +; VI-NO-DS128-NEXT: ds_write2_b64 v20, v[8:9], v[14:15] offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_write2_b64 v20, v[10:11], v[6:7] offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_write2_b64 v20, v[0:1], v[4:5] offset1:1 +; VI-NO-DS128-NEXT: ds_write2_b64 v20, v[2:3], v[16:17] offset0:2 offset1:3 ; VI-NO-DS128-NEXT: s_endpgm ; ; GFX9-NO-DS128-LABEL: local_zextload_v32i16_to_v32i32: ; GFX9-NO-DS128: ; %bb.0: ; GFX9-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v24, s1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v24 offset1:1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v24 offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v32, s0 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v3 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v3 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v2 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v2 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v1 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v1 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v0 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v0 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v7 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v7 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v6 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v6 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v5 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v24 offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v5 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v4 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v4 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v24 offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v1 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v1 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v31, 16, v5 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v30, 0xffff, v5 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v12, s1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v12 offset1:1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v12 offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[8:11], v12 offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[12:15], v12 offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v20, s0 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v3 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(2) +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v5 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v5 ; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v4 ; GFX9-NO-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v27, 16, v3 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v26, 0xffff, v3 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v2 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v7 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v28, 0xffff, v7 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v20, v[4:5], v[18:19] offset0:12 offset1:13 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v7 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v7 ; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v6 ; GFX9-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[4:5], v[30:31] offset0:12 offset1:13 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[6:7], v[28:29] offset0:14 offset1:15 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[2:3], v[26:27] offset0:10 offset1:11 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[0:1], v[24:25] offset0:8 offset1:9 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[22:23], v[20:21] offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[18:19], v[16:17] offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[14:15], v[12:13] offset1:1 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[10:11], v[8:9] offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v20, v[6:7], v[18:19] offset0:14 offset1:15 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v11 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v11 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v10 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v20, v[10:11], v[18:19] offset0:10 offset1:11 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v9 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v9 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v8 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v14 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v14 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v13 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v20, v[8:9], v[18:19] offset0:8 offset1:9 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v12 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v12 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v3 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v2 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v2 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v1 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v1 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v15 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v15 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v20, v[8:9], v[13:14] offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v20, v[10:11], v[6:7] offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v20, v[0:1], v[4:5] offset1:1 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v20, v[2:3], v[16:17] offset0:2 offset1:3 ; GFX9-NO-DS128-NEXT: s_endpgm ; ; EG-LABEL: local_zextload_v32i16_to_v32i32: @@ -2437,108 +2436,111 @@ define amdgpu_kernel void @local_zextload_v32i16_to_v32i32(ptr addrspace(3) %out ; VI-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-DS128-NEXT: s_mov_b32 m0, -1 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_mov_b32_e32 v20, s1 -; VI-DS128-NEXT: ds_read_b128 v[0:3], v20 -; VI-DS128-NEXT: ds_read_b128 v[4:7], v20 offset:16 -; VI-DS128-NEXT: ds_read_b128 v[16:19], v20 offset:32 -; VI-DS128-NEXT: ds_read_b128 v[20:23], v20 offset:48 -; VI-DS128-NEXT: v_mov_b32_e32 v32, s0 +; VI-DS128-NEXT: v_mov_b32_e32 v12, s1 +; VI-DS128-NEXT: ds_read_b128 v[0:3], v12 +; VI-DS128-NEXT: ds_read_b128 v[4:7], v12 offset:48 +; VI-DS128-NEXT: ds_read_b128 v[8:11], v12 offset:16 +; VI-DS128-NEXT: ds_read_b128 v[12:15], v12 offset:32 +; VI-DS128-NEXT: v_mov_b32_e32 v24, s0 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(3) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v3 -; VI-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v3 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v2 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v31, 16, v23 -; VI-DS128-NEXT: v_and_b32_e32 v30, 0xffff, v23 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v22 -; VI-DS128-NEXT: v_and_b32_e32 v28, 0xffff, v22 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v21 -; VI-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v21 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v20 -; VI-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; VI-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v2 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v3 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(2) +; VI-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v5 +; VI-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v5 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v4 +; VI-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v4 +; VI-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:96 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v7 +; VI-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v7 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v6 +; VI-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v6 +; VI-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:112 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(2) +; VI-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v13 +; VI-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v13 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v12 +; VI-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v12 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v11 +; VI-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v11 +; VI-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:64 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v10 +; VI-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v10 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v9 +; VI-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v9 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v15 +; VI-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v15 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v14 +; VI-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v14 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v8 +; VI-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v8 +; VI-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v3 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v2 +; VI-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v2 ; VI-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v1 ; VI-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v1 ; VI-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; VI-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v7 -; VI-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v7 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v6 -; VI-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v6 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v5 -; VI-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v5 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v4 -; VI-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v27, 16, v19 -; VI-DS128-NEXT: v_and_b32_e32 v26, 0xffff, v19 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v18 -; VI-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v18 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v17 -; VI-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v17 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v16 -; VI-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; VI-DS128-NEXT: ds_write_b128 v32, v[20:23] offset:96 -; VI-DS128-NEXT: ds_write_b128 v32, v[28:31] offset:112 -; VI-DS128-NEXT: ds_write_b128 v32, v[16:19] offset:64 -; VI-DS128-NEXT: ds_write_b128 v32, v[24:27] offset:80 -; VI-DS128-NEXT: ds_write_b128 v32, v[4:7] offset:32 -; VI-DS128-NEXT: ds_write_b128 v32, v[12:15] offset:48 -; VI-DS128-NEXT: ds_write_b128 v32, v[0:3] -; VI-DS128-NEXT: ds_write_b128 v32, v[8:11] offset:16 +; VI-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:80 +; VI-DS128-NEXT: ds_write_b128 v24, v[8:11] offset:32 +; VI-DS128-NEXT: ds_write_b128 v24, v[4:7] offset:48 +; VI-DS128-NEXT: ds_write_b128 v24, v[0:3] +; VI-DS128-NEXT: ds_write_b128 v24, v[16:19] offset:16 ; VI-DS128-NEXT: s_endpgm ; ; GFX9-DS128-LABEL: local_zextload_v32i16_to_v32i32: ; GFX9-DS128: ; %bb.0: ; GFX9-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_mov_b32_e32 v20, s1 -; GFX9-DS128-NEXT: ds_read_b128 v[0:3], v20 -; GFX9-DS128-NEXT: ds_read_b128 v[4:7], v20 offset:16 -; GFX9-DS128-NEXT: ds_read_b128 v[16:19], v20 offset:32 -; GFX9-DS128-NEXT: ds_read_b128 v[20:23], v20 offset:48 -; GFX9-DS128-NEXT: v_mov_b32_e32 v32, s0 +; GFX9-DS128-NEXT: v_mov_b32_e32 v12, s1 +; GFX9-DS128-NEXT: ds_read_b128 v[0:3], v12 +; GFX9-DS128-NEXT: ds_read_b128 v[4:7], v12 offset:48 +; GFX9-DS128-NEXT: ds_read_b128 v[8:11], v12 offset:32 +; GFX9-DS128-NEXT: ds_read_b128 v[12:15], v12 offset:16 +; GFX9-DS128-NEXT: v_mov_b32_e32 v24, s0 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(3) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v3 -; GFX9-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v3 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v2 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v31, 16, v23 -; GFX9-DS128-NEXT: v_and_b32_e32 v30, 0xffff, v23 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v22 -; GFX9-DS128-NEXT: v_and_b32_e32 v28, 0xffff, v22 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v21 -; GFX9-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v21 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v20 -; GFX9-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; GFX9-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v2 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v3 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(2) +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v5 +; GFX9-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v5 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v4 +; GFX9-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v4 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:96 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v7 +; GFX9-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v7 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v6 +; GFX9-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v6 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:112 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(3) +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v9 +; GFX9-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v9 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v8 +; GFX9-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v8 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(2) +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v15 +; GFX9-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v15 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:64 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v14 +; GFX9-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v14 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v13 +; GFX9-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v13 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v11 +; GFX9-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v11 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v10 +; GFX9-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v10 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v12 +; GFX9-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX9-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v3 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v2 +; GFX9-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v2 ; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v1 ; GFX9-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v1 ; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX9-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v7 -; GFX9-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v7 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v6 -; GFX9-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v6 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v5 -; GFX9-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v5 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v4 -; GFX9-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v4 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v27, 16, v19 -; GFX9-DS128-NEXT: v_and_b32_e32 v26, 0xffff, v19 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v18 -; GFX9-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v18 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v17 -; GFX9-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v17 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v16 -; GFX9-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[20:23] offset:96 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[28:31] offset:112 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[16:19] offset:64 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[24:27] offset:80 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[4:7] offset:32 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[12:15] offset:48 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[0:3] -; GFX9-DS128-NEXT: ds_write_b128 v32, v[8:11] offset:16 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:80 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[12:15] offset:32 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[4:7] offset:48 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[0:3] +; GFX9-DS128-NEXT: ds_write_b128 v24, v[16:19] offset:16 ; GFX9-DS128-NEXT: s_endpgm %load = load <32 x i16>, ptr addrspace(3) %in %ext = zext <32 x i16> %load to <32 x i32> @@ -2552,56 +2554,55 @@ define amdgpu_kernel void @local_sextload_v32i16_to_v32i32(ptr addrspace(3) %out ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 ; SI-NEXT: s_mov_b32 m0, -1 ; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_mov_b32_e32 v24, s1 -; SI-NEXT: ds_read2_b64 v[0:3], v24 offset1:1 -; SI-NEXT: ds_read2_b64 v[4:7], v24 offset0:2 offset1:3 -; SI-NEXT: v_mov_b32_e32 v32, s0 -; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_ashrrev_i32_e32 v9, 16, v1 -; SI-NEXT: v_ashrrev_i32_e32 v11, 16, v0 -; SI-NEXT: v_ashrrev_i32_e32 v13, 16, v3 -; SI-NEXT: v_ashrrev_i32_e32 v15, 16, v2 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_ashrrev_i32_e32 v17, 16, v5 -; SI-NEXT: v_bfe_i32 v8, v1, 0, 16 -; SI-NEXT: v_bfe_i32 v10, v0, 0, 16 -; SI-NEXT: v_bfe_i32 v12, v3, 0, 16 -; SI-NEXT: v_bfe_i32 v14, v2, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v19, 16, v4 -; SI-NEXT: v_ashrrev_i32_e32 v21, 16, v7 -; SI-NEXT: v_bfe_i32 v16, v5, 0, 16 -; SI-NEXT: v_bfe_i32 v18, v4, 0, 16 -; SI-NEXT: ds_read2_b64 v[0:3], v24 offset0:4 offset1:5 -; SI-NEXT: v_bfe_i32 v20, v7, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v23, 16, v6 -; SI-NEXT: v_bfe_i32 v22, v6, 0, 16 -; SI-NEXT: ds_read2_b64 v[4:7], v24 offset0:6 offset1:7 -; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_ashrrev_i32_e32 v25, 16, v1 -; SI-NEXT: v_bfe_i32 v24, v1, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v1, 16, v0 -; SI-NEXT: v_bfe_i32 v0, v0, 0, 16 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_ashrrev_i32_e32 v31, 16, v7 -; SI-NEXT: v_bfe_i32 v30, v7, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v7, 16, v6 -; SI-NEXT: v_bfe_i32 v6, v6, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v27, 16, v3 -; SI-NEXT: v_bfe_i32 v26, v3, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v3, 16, v2 -; SI-NEXT: v_bfe_i32 v2, v2, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v29, 16, v5 -; SI-NEXT: v_bfe_i32 v28, v5, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v5, 16, v4 -; SI-NEXT: v_bfe_i32 v4, v4, 0, 16 -; SI-NEXT: ds_write2_b64 v32, v[6:7], v[30:31] offset0:14 offset1:15 -; SI-NEXT: ds_write2_b64 v32, v[4:5], v[28:29] offset0:12 offset1:13 -; SI-NEXT: ds_write2_b64 v32, v[2:3], v[26:27] offset0:10 offset1:11 -; SI-NEXT: ds_write2_b64 v32, v[0:1], v[24:25] offset0:8 offset1:9 -; SI-NEXT: ds_write2_b64 v32, v[22:23], v[20:21] offset0:6 offset1:7 -; SI-NEXT: ds_write2_b64 v32, v[18:19], v[16:17] offset0:4 offset1:5 -; SI-NEXT: ds_write2_b64 v32, v[14:15], v[12:13] offset0:2 offset1:3 -; SI-NEXT: ds_write2_b64 v32, v[10:11], v[8:9] offset1:1 +; SI-NEXT: v_mov_b32_e32 v12, s1 +; SI-NEXT: ds_read2_b64 v[0:3], v12 offset1:1 +; SI-NEXT: ds_read2_b64 v[4:7], v12 offset0:6 offset1:7 +; SI-NEXT: ds_read2_b64 v[8:11], v12 offset0:2 offset1:3 +; SI-NEXT: ds_read2_b64 v[12:15], v12 offset0:4 offset1:5 +; SI-NEXT: s_waitcnt lgkmcnt(3) +; SI-NEXT: v_ashrrev_i32_e32 v16, 16, v1 +; SI-NEXT: s_waitcnt lgkmcnt(2) +; SI-NEXT: v_ashrrev_i32_e32 v18, 16, v7 +; SI-NEXT: v_ashrrev_i32_e32 v20, 16, v6 +; SI-NEXT: v_bfe_i32 v17, v7, 0, 16 +; SI-NEXT: v_bfe_i32 v19, v6, 0, 16 +; SI-NEXT: v_mov_b32_e32 v7, s0 +; SI-NEXT: ds_write2_b64 v7, v[19:20], v[17:18] offset0:14 offset1:15 +; SI-NEXT: v_ashrrev_i32_e32 v20, 16, v5 +; SI-NEXT: v_ashrrev_i32_e32 v22, 16, v4 +; SI-NEXT: v_bfe_i32 v19, v5, 0, 16 +; SI-NEXT: v_bfe_i32 v21, v4, 0, 16 +; SI-NEXT: ds_write2_b64 v7, v[21:22], v[19:20] offset0:12 offset1:13 +; SI-NEXT: s_waitcnt lgkmcnt(2) +; SI-NEXT: v_ashrrev_i32_e32 v22, 16, v15 +; SI-NEXT: v_ashrrev_i32_e32 v24, 16, v14 +; SI-NEXT: v_bfe_i32 v21, v15, 0, 16 +; SI-NEXT: v_bfe_i32 v23, v14, 0, 16 +; SI-NEXT: ds_write2_b64 v7, v[23:24], v[21:22] offset0:10 offset1:11 +; SI-NEXT: v_ashrrev_i32_e32 v22, 16, v11 +; SI-NEXT: v_ashrrev_i32_e32 v24, 16, v13 +; SI-NEXT: v_ashrrev_i32_e32 v26, 16, v12 +; SI-NEXT: v_bfe_i32 v23, v13, 0, 16 +; SI-NEXT: v_bfe_i32 v25, v12, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v12, 16, v10 +; SI-NEXT: v_bfe_i32 v21, v11, 0, 16 +; SI-NEXT: v_bfe_i32 v11, v10, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v6, 16, v0 +; SI-NEXT: v_ashrrev_i32_e32 v18, 16, v3 +; SI-NEXT: v_ashrrev_i32_e32 v4, 16, v2 +; SI-NEXT: v_ashrrev_i32_e32 v20, 16, v9 +; SI-NEXT: v_ashrrev_i32_e32 v14, 16, v8 +; SI-NEXT: ds_write2_b64 v7, v[25:26], v[23:24] offset0:8 offset1:9 +; SI-NEXT: v_bfe_i32 v15, v1, 0, 16 +; SI-NEXT: v_bfe_i32 v5, v0, 0, 16 +; SI-NEXT: v_bfe_i32 v17, v3, 0, 16 +; SI-NEXT: v_bfe_i32 v3, v2, 0, 16 +; SI-NEXT: v_bfe_i32 v19, v9, 0, 16 +; SI-NEXT: v_bfe_i32 v13, v8, 0, 16 +; SI-NEXT: ds_write2_b64 v7, v[11:12], v[21:22] offset0:6 offset1:7 +; SI-NEXT: ds_write2_b64 v7, v[13:14], v[19:20] offset0:4 offset1:5 +; SI-NEXT: ds_write2_b64 v7, v[3:4], v[17:18] offset0:2 offset1:3 +; SI-NEXT: ds_write2_b64 v7, v[5:6], v[15:16] offset1:1 ; SI-NEXT: s_endpgm ; ; VI-NO-DS128-LABEL: local_sextload_v32i16_to_v32i32: @@ -2609,116 +2610,115 @@ define amdgpu_kernel void @local_sextload_v32i16_to_v32i32(ptr addrspace(3) %out ; VI-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-NO-DS128-NEXT: s_mov_b32 m0, -1 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_mov_b32_e32 v24, s1 -; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v24 offset1:1 -; VI-NO-DS128-NEXT: ds_read2_b64 v[4:7], v24 offset0:2 offset1:3 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v32, s0 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v3 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v2 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v1 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v0 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v7 -; VI-NO-DS128-NEXT: v_bfe_i32 v8, v3, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v10, v2, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v12, v1, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v14, v0, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v6 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v5 -; VI-NO-DS128-NEXT: v_bfe_i32 v16, v7, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v18, v6, 0, 16 -; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v24 offset0:4 offset1:5 -; VI-NO-DS128-NEXT: v_bfe_i32 v20, v5, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v4 -; VI-NO-DS128-NEXT: v_bfe_i32 v22, v4, 0, 16 -; VI-NO-DS128-NEXT: ds_read2_b64 v[4:7], v24 offset0:6 offset1:7 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v25, 16, v1 -; VI-NO-DS128-NEXT: v_bfe_i32 v24, v1, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v0 -; VI-NO-DS128-NEXT: v_bfe_i32 v0, v0, 0, 16 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v31, 16, v5 -; VI-NO-DS128-NEXT: v_bfe_i32 v30, v5, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v5, 16, v4 -; VI-NO-DS128-NEXT: v_bfe_i32 v4, v4, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v27, 16, v3 -; VI-NO-DS128-NEXT: v_bfe_i32 v26, v3, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v2 -; VI-NO-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v29, 16, v7 -; VI-NO-DS128-NEXT: v_bfe_i32 v28, v7, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 16, v6 -; VI-NO-DS128-NEXT: v_bfe_i32 v6, v6, 0, 16 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[4:5], v[30:31] offset0:12 offset1:13 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[6:7], v[28:29] offset0:14 offset1:15 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[2:3], v[26:27] offset0:10 offset1:11 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[0:1], v[24:25] offset0:8 offset1:9 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[22:23], v[20:21] offset0:4 offset1:5 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[18:19], v[16:17] offset0:6 offset1:7 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[14:15], v[12:13] offset1:1 -; VI-NO-DS128-NEXT: ds_write2_b64 v32, v[10:11], v[8:9] offset0:2 offset1:3 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v12, s1 +; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v12 offset1:1 +; VI-NO-DS128-NEXT: ds_read2_b64 v[4:7], v12 offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_read2_b64 v[8:11], v12 offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_read2_b64 v[12:15], v12 offset0:4 offset1:5 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v27, s0 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v16, 16, v3 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(2) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 16, v5 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 16, v4 +; VI-NO-DS128-NEXT: v_bfe_i32 v17, v5, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v19, v4, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v27, v[19:20], v[17:18] offset0:12 offset1:13 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 16, v7 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 16, v6 +; VI-NO-DS128-NEXT: v_bfe_i32 v19, v7, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v21, v6, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v27, v[21:22], v[19:20] offset0:14 offset1:15 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(2) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 16, v15 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v24, 16, v14 +; VI-NO-DS128-NEXT: v_bfe_i32 v21, v15, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v23, v14, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 16, v11 +; VI-NO-DS128-NEXT: ds_write2_b64 v27, v[23:24], v[21:22] offset0:10 offset1:11 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 16, v9 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v24, 16, v13 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v26, 16, v12 +; VI-NO-DS128-NEXT: v_bfe_i32 v23, v13, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v25, v12, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v12, 16, v8 +; VI-NO-DS128-NEXT: v_bfe_i32 v19, v11, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v21, v9, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v11, v8, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v2 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 16, v1 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v0 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v14, 16, v10 +; VI-NO-DS128-NEXT: ds_write2_b64 v27, v[25:26], v[23:24] offset0:8 offset1:9 +; VI-NO-DS128-NEXT: v_bfe_i32 v15, v3, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v3, v2, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v17, v1, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v5, v0, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v13, v10, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v27, v[11:12], v[21:22] offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_write2_b64 v27, v[13:14], v[19:20] offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_write2_b64 v27, v[5:6], v[17:18] offset1:1 +; VI-NO-DS128-NEXT: ds_write2_b64 v27, v[3:4], v[15:16] offset0:2 offset1:3 ; VI-NO-DS128-NEXT: s_endpgm ; ; GFX9-NO-DS128-LABEL: local_sextload_v32i16_to_v32i32: ; GFX9-NO-DS128: ; %bb.0: ; GFX9-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v24, s1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v24 offset1:1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v24 offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v32, s0 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v3 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v2 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v1 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v0 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v7 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v8, v3, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v10, v2, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v12, v1, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v14, v0, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v6 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v5 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v7, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v6, 0, 16 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v24 offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v20, v5, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v4 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v22, v4, 0, 16 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v24 offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v25, 16, v1 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v24, v1, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v0 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v0, v0, 0, 16 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v31, 16, v5 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v30, v5, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v5, 16, v4 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v4, v4, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v27, 16, v3 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v26, v3, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v2 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v29, 16, v7 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v28, v7, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 16, v6 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v6, v6, 0, 16 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[4:5], v[30:31] offset0:12 offset1:13 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[6:7], v[28:29] offset0:14 offset1:15 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[2:3], v[26:27] offset0:10 offset1:11 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[0:1], v[24:25] offset0:8 offset1:9 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[22:23], v[20:21] offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[18:19], v[16:17] offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[14:15], v[12:13] offset1:1 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v32, v[10:11], v[8:9] offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: s_endpgm -; -; EG-LABEL: local_sextload_v32i16_to_v32i32: -; EG: ; %bb.0: +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v12, s1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v12 offset1:1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v12 offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[8:11], v12 offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[12:15], v12 offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v28, s0 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v3 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(2) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v5 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v4 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v5, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v20, v4, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v28, v[20:21], v[18:19] offset0:12 offset1:13 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v7 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v6 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v20, v7, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v22, v6, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v28, v[22:23], v[20:21] offset0:14 offset1:15 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v11 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v25, 16, v10 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v22, v11, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v24, v10, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v28, v[24:25], v[22:23] offset0:10 offset1:11 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v13 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v25, 16, v9 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v27, 16, v8 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v24, v9, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v26, v8, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v8, 16, v12 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v22, v13, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v7, v12, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v2 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v1 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v0 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v15 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v10, 16, v14 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v28, v[26:27], v[24:25] offset0:8 offset1:9 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v3, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v2, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v1, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v5, v0, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v20, v15, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v9, v14, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v28, v[7:8], v[22:23] offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v28, v[9:10], v[20:21] offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v28, v[5:6], v[18:19] offset1:1 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v28, v[3:4], v[16:17] offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: s_endpgm +; +; EG-LABEL: local_sextload_v32i16_to_v32i32: +; EG: ; %bb.0: ; EG-NEXT: ALU 101, @23, KC0[CB0:0-32], KC1[] ; EG-NEXT: ADD_INT * T0.W, KC0[2].Z, literal.x, ; EG-NEXT: 4(5.605194e-45), 0(0.000000e+00) @@ -2938,112 +2938,111 @@ define amdgpu_kernel void @local_sextload_v32i16_to_v32i32(ptr addrspace(3) %out ; VI-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-DS128-NEXT: s_mov_b32 m0, -1 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_mov_b32_e32 v24, s1 -; VI-DS128-NEXT: ds_read_b128 v[0:3], v24 -; VI-DS128-NEXT: ds_read_b128 v[4:7], v24 offset:16 -; VI-DS128-NEXT: ds_read_b128 v[20:23], v24 offset:32 +; VI-DS128-NEXT: v_mov_b32_e32 v12, s1 +; VI-DS128-NEXT: ds_read_b128 v[0:3], v12 +; VI-DS128-NEXT: ds_read_b128 v[4:7], v12 offset:48 +; VI-DS128-NEXT: ds_read_b128 v[8:11], v12 offset:16 +; VI-DS128-NEXT: ds_read_b128 v[12:15], v12 offset:32 +; VI-DS128-NEXT: v_mov_b32_e32 v31, s0 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(3) +; VI-DS128-NEXT: v_ashrrev_i32_e32 v18, 16, v3 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(2) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v3 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v2 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v1 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v0 -; VI-DS128-NEXT: v_bfe_i32 v10, v3, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v8, v2, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v14, v1, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v12, v0, 0, 16 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v7 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v6 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v5 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v4 -; VI-DS128-NEXT: v_bfe_i32 v2, v7, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v0, v6, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v18, v5, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; VI-DS128-NEXT: ds_read_b128 v[4:7], v24 offset:48 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v26, 16, v7 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v24, 16, v6 +; VI-DS128-NEXT: v_bfe_i32 v25, v7, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v23, v6, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v31, v[23:26] offset:112 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v26, 16, v23 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v24, 16, v22 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v30, 16, v21 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v28, 16, v20 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v38, 16, v5 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v36, 16, v4 -; VI-DS128-NEXT: v_bfe_i32 v37, v5, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v35, v4, 0, 16 -; VI-DS128-NEXT: v_mov_b32_e32 v4, s0 -; VI-DS128-NEXT: v_bfe_i32 v25, v23, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v23, v22, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v29, v21, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v27, v20, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v34, 16, v7 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v32, 16, v6 -; VI-DS128-NEXT: v_bfe_i32 v33, v7, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v31, v6, 0, 16 -; VI-DS128-NEXT: ds_write_b128 v4, v[35:38] offset:96 -; VI-DS128-NEXT: ds_write_b128 v4, v[31:34] offset:112 -; VI-DS128-NEXT: ds_write_b128 v4, v[27:30] offset:64 -; VI-DS128-NEXT: ds_write_b128 v4, v[23:26] offset:80 -; VI-DS128-NEXT: ds_write_b128 v4, v[16:19] offset:32 -; VI-DS128-NEXT: ds_write_b128 v4, v[0:3] offset:48 -; VI-DS128-NEXT: ds_write_b128 v4, v[12:15] -; VI-DS128-NEXT: ds_write_b128 v4, v[8:11] offset:16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v26, 16, v13 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v24, 16, v12 +; VI-DS128-NEXT: v_bfe_i32 v25, v13, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v23, v12, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v22, 16, v5 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v20, 16, v4 +; VI-DS128-NEXT: v_bfe_i32 v21, v5, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v19, v4, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v31, v[23:26] offset:64 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v26, 16, v9 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v30, 16, v15 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v28, 16, v14 +; VI-DS128-NEXT: v_bfe_i32 v29, v15, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v27, v14, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v24, 16, v8 +; VI-DS128-NEXT: v_bfe_i32 v25, v9, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v23, v8, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v31, v[19:22] offset:96 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v16, 16, v2 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v22, 16, v1 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v20, 16, v0 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v11 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v10 +; VI-DS128-NEXT: ds_write_b128 v31, v[27:30] offset:80 +; VI-DS128-NEXT: v_bfe_i32 v17, v3, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v15, v2, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v21, v1, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v19, v0, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v5, v11, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v3, v10, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v31, v[23:26] offset:32 +; VI-DS128-NEXT: ds_write_b128 v31, v[3:6] offset:48 +; VI-DS128-NEXT: ds_write_b128 v31, v[19:22] +; VI-DS128-NEXT: ds_write_b128 v31, v[15:18] offset:16 ; VI-DS128-NEXT: s_endpgm ; ; GFX9-DS128-LABEL: local_sextload_v32i16_to_v32i32: ; GFX9-DS128: ; %bb.0: ; GFX9-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_mov_b32_e32 v24, s1 -; GFX9-DS128-NEXT: ds_read_b128 v[0:3], v24 -; GFX9-DS128-NEXT: ds_read_b128 v[4:7], v24 offset:16 -; GFX9-DS128-NEXT: ds_read_b128 v[20:23], v24 offset:32 +; GFX9-DS128-NEXT: v_mov_b32_e32 v12, s1 +; GFX9-DS128-NEXT: ds_read_b128 v[0:3], v12 +; GFX9-DS128-NEXT: ds_read_b128 v[4:7], v12 offset:48 +; GFX9-DS128-NEXT: ds_read_b128 v[8:11], v12 offset:32 +; GFX9-DS128-NEXT: ds_read_b128 v[12:15], v12 offset:16 +; GFX9-DS128-NEXT: v_mov_b32_e32 v32, s0 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(3) +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v3 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(2) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v3 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v2 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v1 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v0 -; GFX9-DS128-NEXT: v_bfe_i32 v10, v3, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v8, v2, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v14, v1, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v12, v0, 0, 16 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v7 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v6 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v5 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v4 -; GFX9-DS128-NEXT: v_bfe_i32 v2, v7, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v0, v6, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v18, v5, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; GFX9-DS128-NEXT: ds_read_b128 v[4:7], v24 offset:48 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v26, 16, v23 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v24, 16, v22 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v30, 16, v21 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v28, 16, v20 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v38, 16, v5 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v36, 16, v4 -; GFX9-DS128-NEXT: v_bfe_i32 v37, v5, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v35, v4, 0, 16 -; GFX9-DS128-NEXT: v_mov_b32_e32 v4, s0 -; GFX9-DS128-NEXT: v_bfe_i32 v25, v23, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v23, v22, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v29, v21, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v27, v20, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v34, 16, v7 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v32, 16, v6 -; GFX9-DS128-NEXT: v_bfe_i32 v33, v7, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v31, v6, 0, 16 -; GFX9-DS128-NEXT: ds_write_b128 v4, v[35:38] offset:96 -; GFX9-DS128-NEXT: ds_write_b128 v4, v[31:34] offset:112 -; GFX9-DS128-NEXT: ds_write_b128 v4, v[27:30] offset:64 -; GFX9-DS128-NEXT: ds_write_b128 v4, v[23:26] offset:80 -; GFX9-DS128-NEXT: ds_write_b128 v4, v[16:19] offset:32 -; GFX9-DS128-NEXT: ds_write_b128 v4, v[0:3] offset:48 -; GFX9-DS128-NEXT: ds_write_b128 v4, v[12:15] -; GFX9-DS128-NEXT: ds_write_b128 v4, v[8:11] offset:16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v27, 16, v7 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v25, 16, v6 +; GFX9-DS128-NEXT: v_bfe_i32 v26, v7, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v24, v6, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v32, v[24:27] offset:112 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(2) +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v27, 16, v9 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v25, 16, v8 +; GFX9-DS128-NEXT: v_bfe_i32 v26, v9, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v24, v8, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v5 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v4 +; GFX9-DS128-NEXT: v_bfe_i32 v22, v5, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v20, v4, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v32, v[24:27] offset:64 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(2) +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v27, 16, v13 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v31, 16, v11 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v29, 16, v10 +; GFX9-DS128-NEXT: v_bfe_i32 v30, v11, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v28, v10, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v25, 16, v12 +; GFX9-DS128-NEXT: v_bfe_i32 v26, v13, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v24, v12, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v32, v[20:23] offset:96 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v2 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v1 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v0 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v15 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v14 +; GFX9-DS128-NEXT: ds_write_b128 v32, v[28:31] offset:80 +; GFX9-DS128-NEXT: v_bfe_i32 v18, v3, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v16, v2, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v22, v1, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v20, v0, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v5, v15, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v3, v14, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v32, v[24:27] offset:32 +; GFX9-DS128-NEXT: ds_write_b128 v32, v[3:6] offset:48 +; GFX9-DS128-NEXT: ds_write_b128 v32, v[20:23] +; GFX9-DS128-NEXT: ds_write_b128 v32, v[16:19] offset:16 ; GFX9-DS128-NEXT: s_endpgm %load = load <32 x i16>, ptr addrspace(3) %in %ext = sext <32 x i16> %load to <32 x i32> @@ -3056,346 +3055,299 @@ define amdgpu_kernel void @local_zextload_v64i16_to_v64i32(ptr addrspace(3) %out ; SI: ; %bb.0: ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 ; SI-NEXT: s_mov_b32 m0, -1 -; SI-NEXT: s_mov_b32 s12, SCRATCH_RSRC_DWORD0 -; SI-NEXT: s_mov_b32 s13, SCRATCH_RSRC_DWORD1 -; SI-NEXT: s_mov_b32 s14, -1 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_mov_b32_e32 v16, s1 -; SI-NEXT: ds_read2_b64 v[10:13], v16 offset0:8 offset1:9 -; SI-NEXT: ds_read2_b64 v[17:20], v16 offset0:10 offset1:11 -; SI-NEXT: ds_read2_b64 v[21:24], v16 offset0:12 offset1:13 -; SI-NEXT: s_mov_b32 s15, 0xe8f000 -; SI-NEXT: s_add_u32 s12, s12, s11 -; SI-NEXT: s_waitcnt lgkmcnt(2) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v11 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v10 -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v13 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v12 -; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v18 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v11 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v10 -; SI-NEXT: v_and_b32_e32 v4, 0xffff, v13 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v12 -; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v17 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v20 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v18 -; SI-NEXT: v_and_b32_e32 v10, 0xffff, v17 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v20 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v19 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v19 -; SI-NEXT: ds_read2_b64 v[17:20], v16 offset0:14 offset1:15 -; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v22 -; SI-NEXT: v_and_b32_e32 v25, 0xffff, v22 -; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v21 -; SI-NEXT: v_and_b32_e32 v27, 0xffff, v21 -; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v24 -; SI-NEXT: v_and_b32_e32 v29, 0xffff, v24 -; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v23 -; SI-NEXT: v_and_b32_e32 v31, 0xffff, v23 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v18 -; SI-NEXT: v_and_b32_e32 v33, 0xffff, v18 -; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v17 -; SI-NEXT: v_and_b32_e32 v35, 0xffff, v17 -; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v20 -; SI-NEXT: ds_read2_b64 v[21:24], v16 offset1:1 -; SI-NEXT: v_and_b32_e32 v37, 0xffff, v20 -; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v19 -; SI-NEXT: v_and_b32_e32 v39, 0xffff, v19 -; SI-NEXT: ds_read2_b64 v[17:20], v16 offset0:2 offset1:3 -; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v22 -; SI-NEXT: v_and_b32_e32 v41, 0xffff, v22 -; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v21 -; SI-NEXT: v_and_b32_e32 v43, 0xffff, v21 -; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v24 -; SI-NEXT: v_and_b32_e32 v45, 0xffff, v24 -; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v23 -; SI-NEXT: v_and_b32_e32 v47, 0xffff, v23 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v18 -; SI-NEXT: v_and_b32_e32 v49, 0xffff, v18 -; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v17 -; SI-NEXT: v_and_b32_e32 v51, 0xffff, v17 -; SI-NEXT: ds_read2_b64 v[21:24], v16 offset0:4 offset1:5 -; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v19 -; SI-NEXT: v_and_b32_e32 v55, 0xffff, v19 -; SI-NEXT: ds_read2_b64 v[16:19], v16 offset0:6 offset1:7 -; SI-NEXT: s_addc_u32 s13, s13, 0 -; SI-NEXT: buffer_store_dword v0, off, s[12:15], 0 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill -; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v20 -; SI-NEXT: v_and_b32_e32 v53, 0xffff, v20 ; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v19 -; SI-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v18 -; SI-NEXT: v_and_b32_e32 v0, 0xffff, v18 -; SI-NEXT: v_mov_b32_e32 v18, s0 -; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v22 -; SI-NEXT: v_and_b32_e32 v57, 0xffff, v22 -; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v21 -; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v24 -; SI-NEXT: v_and_b32_e32 v59, 0xffff, v24 -; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v23 -; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v17 -; SI-NEXT: v_and_b32_e32 v61, 0xffff, v17 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v16 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; SI-NEXT: ds_write2_b64 v18, v[0:1], v[19:20] offset0:14 offset1:15 -; SI-NEXT: ds_write2_b64 v18, v[16:17], v[61:62] offset0:12 offset1:13 -; SI-NEXT: ds_write2_b64 v18, v[23:24], v[59:60] offset0:10 offset1:11 -; SI-NEXT: ds_write2_b64 v18, v[21:22], v[57:58] offset0:8 offset1:9 -; SI-NEXT: ds_write2_b64 v18, v[55:56], v[53:54] offset0:6 offset1:7 -; SI-NEXT: ds_write2_b64 v18, v[51:52], v[49:50] offset0:4 offset1:5 -; SI-NEXT: ds_write2_b64 v18, v[47:48], v[45:46] offset0:2 offset1:3 -; SI-NEXT: ds_write2_b64 v18, v[43:44], v[41:42] offset1:1 -; SI-NEXT: ds_write2_b64 v18, v[39:40], v[37:38] offset0:30 offset1:31 -; SI-NEXT: ds_write2_b64 v18, v[35:36], v[33:34] offset0:28 offset1:29 -; SI-NEXT: ds_write2_b64 v18, v[31:32], v[29:30] offset0:26 offset1:27 -; SI-NEXT: ds_write2_b64 v18, v[27:28], v[25:26] offset0:24 offset1:25 -; SI-NEXT: ds_write2_b64 v18, v[14:15], v[12:13] offset0:22 offset1:23 -; SI-NEXT: ds_write2_b64 v18, v[10:11], v[8:9] offset0:20 offset1:21 -; SI-NEXT: ds_write2_b64 v18, v[6:7], v[4:5] offset0:18 offset1:19 -; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: ds_write2_b64 v18, v[2:3], v[0:1] offset0:16 offset1:17 +; SI-NEXT: v_mov_b32_e32 v29, s1 +; SI-NEXT: ds_read2_b64 v[9:12], v29 offset0:6 offset1:7 +; SI-NEXT: ds_read2_b64 v[13:16], v29 offset0:4 offset1:5 +; SI-NEXT: ds_read2_b64 v[4:7], v29 offset0:8 offset1:9 +; SI-NEXT: ds_read2_b64 v[0:3], v29 offset0:10 offset1:11 +; SI-NEXT: ds_read2_b64 v[17:20], v29 offset0:12 offset1:13 +; SI-NEXT: ds_read2_b64 v[21:24], v29 offset0:14 offset1:15 +; SI-NEXT: ds_read2_b64 v[25:28], v29 offset1:1 +; SI-NEXT: ds_read2_b64 v[29:32], v29 offset0:2 offset1:3 +; SI-NEXT: v_mov_b32_e32 v8, s0 +; SI-NEXT: s_waitcnt lgkmcnt(7) +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v11 +; SI-NEXT: v_and_b32_e32 v33, 0xffff, v12 +; SI-NEXT: v_and_b32_e32 v35, 0xffff, v11 +; SI-NEXT: ds_write2_b64 v8, v[35:36], v[33:34] offset0:14 offset1:15 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v9 +; SI-NEXT: v_and_b32_e32 v33, 0xffff, v9 +; SI-NEXT: ds_write2_b64 v8, v[33:34], v[10:11] offset0:12 offset1:13 +; SI-NEXT: s_waitcnt lgkmcnt(8) +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v16 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v16 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v15 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v15 +; SI-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:10 offset1:11 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v14 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v14 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v13 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v13 +; SI-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:8 offset1:9 +; SI-NEXT: s_waitcnt lgkmcnt(4) +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v32 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v32 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v31 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v31 +; SI-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:6 offset1:7 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v30 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v30 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v29 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v29 +; SI-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:4 offset1:5 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v28 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v28 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v27 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v27 +; SI-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:2 offset1:3 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v26 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v26 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v25 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v25 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v23 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v23 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v22 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v21 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v22 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v21 +; SI-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset1:1 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v24 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v24 +; SI-NEXT: ds_write2_b64 v8, v[22:23], v[15:16] offset0:28 offset1:29 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v20 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v19 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v20 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v19 +; SI-NEXT: ds_write2_b64 v8, v[24:25], v[22:23] offset0:26 offset1:27 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v18 +; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v17 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v18 +; SI-NEXT: v_and_b32_e32 v26, 0xffff, v17 +; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v3 +; SI-NEXT: ds_write2_b64 v8, v[26:27], v[24:25] offset0:24 offset1:25 +; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v2 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v3 +; SI-NEXT: v_and_b32_e32 v24, 0xffff, v2 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v5 +; SI-NEXT: ds_write2_b64 v8, v[13:14], v[11:12] offset0:30 offset1:31 +; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v4 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v7 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v6 +; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v0 +; SI-NEXT: v_and_b32_e32 v9, 0xffff, v5 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v4 +; SI-NEXT: v_and_b32_e32 v13, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v15, 0xffff, v6 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v1 +; SI-NEXT: v_and_b32_e32 v18, 0xffff, v0 +; SI-NEXT: ds_write2_b64 v8, v[24:25], v[22:23] offset0:22 offset1:23 +; SI-NEXT: ds_write2_b64 v8, v[18:19], v[20:21] offset0:20 offset1:21 +; SI-NEXT: ds_write2_b64 v8, v[15:16], v[13:14] offset0:18 offset1:19 +; SI-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:16 offset1:17 ; SI-NEXT: s_endpgm ; ; VI-NO-DS128-LABEL: local_zextload_v64i16_to_v64i32: ; VI-NO-DS128: ; %bb.0: ; VI-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-NO-DS128-NEXT: s_mov_b32 m0, -1 -; VI-NO-DS128-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0 -; VI-NO-DS128-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1 -; VI-NO-DS128-NEXT: s_mov_b32 s90, -1 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_mov_b32_e32 v16, s1 -; VI-NO-DS128-NEXT: ds_read2_b64 v[10:13], v16 offset1:1 -; VI-NO-DS128-NEXT: ds_read2_b64 v[17:20], v16 offset0:2 offset1:3 -; VI-NO-DS128-NEXT: ds_read2_b64 v[21:24], v16 offset0:4 offset1:5 -; VI-NO-DS128-NEXT: s_mov_b32 s91, 0xe80000 -; VI-NO-DS128-NEXT: s_add_u32 s88, s88, s11 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(2) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v11 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v10 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v13 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v12 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v18 -; VI-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v11 -; VI-NO-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v10 -; VI-NO-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v13 -; VI-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v12 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v17 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v20 -; VI-NO-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v18 -; VI-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v17 -; VI-NO-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v20 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v19 -; VI-NO-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v19 -; VI-NO-DS128-NEXT: ds_read2_b64 v[17:20], v16 offset0:6 offset1:7 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v26, 16, v22 -; VI-NO-DS128-NEXT: v_and_b32_e32 v25, 0xffff, v22 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v28, 16, v21 -; VI-NO-DS128-NEXT: v_and_b32_e32 v27, 0xffff, v21 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v30, 16, v24 -; VI-NO-DS128-NEXT: v_and_b32_e32 v29, 0xffff, v24 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v32, 16, v23 -; VI-NO-DS128-NEXT: v_and_b32_e32 v31, 0xffff, v23 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v34, 16, v18 -; VI-NO-DS128-NEXT: v_and_b32_e32 v33, 0xffff, v18 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v36, 16, v17 -; VI-NO-DS128-NEXT: v_and_b32_e32 v35, 0xffff, v17 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v38, 16, v20 -; VI-NO-DS128-NEXT: ds_read2_b64 v[21:24], v16 offset0:8 offset1:9 -; VI-NO-DS128-NEXT: v_and_b32_e32 v37, 0xffff, v20 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v40, 16, v19 -; VI-NO-DS128-NEXT: v_and_b32_e32 v39, 0xffff, v19 -; VI-NO-DS128-NEXT: ds_read2_b64 v[17:20], v16 offset0:10 offset1:11 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v42, 16, v22 -; VI-NO-DS128-NEXT: v_and_b32_e32 v41, 0xffff, v22 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v44, 16, v21 -; VI-NO-DS128-NEXT: v_and_b32_e32 v43, 0xffff, v21 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v46, 16, v24 -; VI-NO-DS128-NEXT: v_and_b32_e32 v45, 0xffff, v24 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v48, 16, v23 -; VI-NO-DS128-NEXT: v_and_b32_e32 v47, 0xffff, v23 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v50, 16, v18 -; VI-NO-DS128-NEXT: v_and_b32_e32 v49, 0xffff, v18 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v52, 16, v17 -; VI-NO-DS128-NEXT: v_and_b32_e32 v51, 0xffff, v17 -; VI-NO-DS128-NEXT: ds_read2_b64 v[21:24], v16 offset0:12 offset1:13 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v56, 16, v19 -; VI-NO-DS128-NEXT: v_and_b32_e32 v55, 0xffff, v19 -; VI-NO-DS128-NEXT: ds_read2_b64 v[16:19], v16 offset0:14 offset1:15 -; VI-NO-DS128-NEXT: s_addc_u32 s89, s89, 0 -; VI-NO-DS128-NEXT: buffer_store_dword v0, off, s[88:91], 0 ; 4-byte Folded Spill -; VI-NO-DS128-NEXT: buffer_store_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Spill -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v54, 16, v20 -; VI-NO-DS128-NEXT: v_and_b32_e32 v53, 0xffff, v20 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v19 -; VI-NO-DS128-NEXT: v_and_b32_e32 v19, 0xffff, v19 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v18 -; VI-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v18 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v18, s0 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v58, 16, v22 -; VI-NO-DS128-NEXT: v_and_b32_e32 v57, 0xffff, v22 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v22, 16, v21 -; VI-NO-DS128-NEXT: v_and_b32_e32 v21, 0xffff, v21 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v60, 16, v24 -; VI-NO-DS128-NEXT: v_and_b32_e32 v59, 0xffff, v24 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v24, 16, v23 -; VI-NO-DS128-NEXT: v_and_b32_e32 v23, 0xffff, v23 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v62, 16, v17 -; VI-NO-DS128-NEXT: v_and_b32_e32 v61, 0xffff, v17 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v16 -; VI-NO-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[0:1], v[19:20] offset0:30 offset1:31 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[16:17], v[61:62] offset0:28 offset1:29 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[23:24], v[59:60] offset0:26 offset1:27 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[21:22], v[57:58] offset0:24 offset1:25 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[55:56], v[53:54] offset0:22 offset1:23 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[51:52], v[49:50] offset0:20 offset1:21 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[47:48], v[45:46] offset0:18 offset1:19 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[43:44], v[41:42] offset0:16 offset1:17 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[39:40], v[37:38] offset0:14 offset1:15 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[35:36], v[33:34] offset0:12 offset1:13 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[31:32], v[29:30] offset0:10 offset1:11 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[27:28], v[25:26] offset0:8 offset1:9 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[14:15], v[12:13] offset0:6 offset1:7 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[10:11], v[8:9] offset0:4 offset1:5 -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[6:7], v[4:5] offset0:2 offset1:3 -; VI-NO-DS128-NEXT: buffer_load_dword v0, off, s[88:91], 0 ; 4-byte Folded Reload -; VI-NO-DS128-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Reload -; VI-NO-DS128-NEXT: s_waitcnt vmcnt(0) -; VI-NO-DS128-NEXT: ds_write2_b64 v18, v[2:3], v[0:1] offset1:1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v29, s1 +; VI-NO-DS128-NEXT: ds_read2_b64 v[9:12], v29 offset0:14 offset1:15 +; VI-NO-DS128-NEXT: ds_read2_b64 v[13:16], v29 offset0:12 offset1:13 +; VI-NO-DS128-NEXT: ds_read2_b64 v[4:7], v29 offset1:1 +; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v29 offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_read2_b64 v[17:20], v29 offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_read2_b64 v[21:24], v29 offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_read2_b64 v[25:28], v29 offset0:8 offset1:9 +; VI-NO-DS128-NEXT: ds_read2_b64 v[29:32], v29 offset0:10 offset1:11 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v8, s0 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(7) +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v34, 16, v12 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v36, 16, v11 +; VI-NO-DS128-NEXT: v_and_b32_e32 v33, 0xffff, v12 +; VI-NO-DS128-NEXT: v_and_b32_e32 v35, 0xffff, v11 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[35:36], v[33:34] offset0:30 offset1:31 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v10 +; VI-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v34, 16, v9 +; VI-NO-DS128-NEXT: v_and_b32_e32 v33, 0xffff, v9 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[33:34], v[10:11] offset0:28 offset1:29 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(8) +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v16 +; VI-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v16 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v15 +; VI-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v15 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:26 offset1:27 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v14 +; VI-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v14 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v13 +; VI-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v13 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:24 offset1:25 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(4) +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v32 +; VI-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v32 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v31 +; VI-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v31 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:22 offset1:23 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v30 +; VI-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v30 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v29 +; VI-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v29 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:20 offset1:21 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v28 +; VI-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v28 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v27 +; VI-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v27 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:18 offset1:19 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v26 +; VI-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v26 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v25 +; VI-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v25 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v23 +; VI-NO-DS128-NEXT: v_and_b32_e32 v13, 0xffff, v23 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v22 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v21 +; VI-NO-DS128-NEXT: v_and_b32_e32 v15, 0xffff, v22 +; VI-NO-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v21 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:16 offset1:17 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v24 +; VI-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v24 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[22:23], v[15:16] offset0:12 offset1:13 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v20 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v19 +; VI-NO-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v20 +; VI-NO-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v19 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[24:25], v[22:23] offset0:10 offset1:11 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v18 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v27, 16, v17 +; VI-NO-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v18 +; VI-NO-DS128-NEXT: v_and_b32_e32 v26, 0xffff, v17 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v3 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[26:27], v[24:25] offset0:8 offset1:9 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v2 +; VI-NO-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v3 +; VI-NO-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v2 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v5 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[13:14], v[11:12] offset0:14 offset1:15 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v4 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v7 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v6 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v1 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v0 +; VI-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v5 +; VI-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v4 +; VI-NO-DS128-NEXT: v_and_b32_e32 v13, 0xffff, v7 +; VI-NO-DS128-NEXT: v_and_b32_e32 v15, 0xffff, v6 +; VI-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v1 +; VI-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v0 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[24:25], v[22:23] offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[18:19], v[20:21] offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[15:16], v[13:14] offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset1:1 ; VI-NO-DS128-NEXT: s_endpgm ; ; GFX9-NO-DS128-LABEL: local_zextload_v64i16_to_v64i32: ; GFX9-NO-DS128: ; %bb.0: ; GFX9-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; GFX9-NO-DS128-NEXT: s_mov_b32 s12, SCRATCH_RSRC_DWORD0 -; GFX9-NO-DS128-NEXT: s_mov_b32 s13, SCRATCH_RSRC_DWORD1 -; GFX9-NO-DS128-NEXT: s_mov_b32 s14, -1 -; GFX9-NO-DS128-NEXT: s_mov_b32 s15, 0xe00000 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v56, s1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[10:13], v56 offset1:1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[14:17], v56 offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[18:21], v56 offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[22:25], v56 offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: s_add_u32 s12, s12, s11 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v11 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v10 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v13 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v12 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(2) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v15 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v11 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v10 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v13 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v12 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v14 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v17 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v15 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v14 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v17 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v16 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v16 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v27, 16, v19 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v26, 0xffff, v19 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v18 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v28, 0xffff, v18 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v31, 16, v21 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v30, 0xffff, v21 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v33, 16, v20 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v32, 0xffff, v20 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v35, 16, v23 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v34, 0xffff, v23 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v37, 16, v22 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v36, 0xffff, v22 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[16:19], v56 offset0:8 offset1:9 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[20:23], v56 offset0:10 offset1:11 -; GFX9-NO-DS128-NEXT: s_addc_u32 s13, s13, 0 -; GFX9-NO-DS128-NEXT: buffer_store_dword v0, off, s[12:15], 0 ; 4-byte Folded Spill -; GFX9-NO-DS128-NEXT: s_nop 0 -; GFX9-NO-DS128-NEXT: buffer_store_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v0, s0 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v41, 16, v17 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v40, 0xffff, v17 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v43, 16, v16 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v42, 0xffff, v16 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v45, 16, v19 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v44, 0xffff, v19 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v47, 16, v18 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v46, 0xffff, v18 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v49, 16, v21 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v48, 0xffff, v21 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v51, 16, v20 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v50, 0xffff, v20 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v53, 16, v23 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[16:19], v56 offset0:12 offset1:13 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v52, 0xffff, v23 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v55, 16, v22 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v54, 0xffff, v22 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[20:23], v56 offset0:14 offset1:15 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v39, 16, v25 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v38, 0xffff, v25 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v24 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v24 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v63, 16, v23 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v62, 0xffff, v23 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v22 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v22 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v57, 16, v17 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v56, 0xffff, v17 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v16 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v16 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v59, 16, v19 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v58, 0xffff, v19 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v18 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v18 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v61, 16, v21 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v60, 0xffff, v21 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v20 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v20 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[22:23], v[62:63] offset0:30 offset1:31 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[20:21], v[60:61] offset0:28 offset1:29 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[18:19], v[58:59] offset0:26 offset1:27 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[16:17], v[56:57] offset0:24 offset1:25 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[54:55], v[52:53] offset0:22 offset1:23 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[50:51], v[48:49] offset0:20 offset1:21 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[46:47], v[44:45] offset0:18 offset1:19 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[42:43], v[40:41] offset0:16 offset1:17 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[24:25], v[38:39] offset0:14 offset1:15 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[36:37], v[34:35] offset0:12 offset1:13 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[32:33], v[30:31] offset0:10 offset1:11 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[28:29], v[26:27] offset0:8 offset1:9 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[14:15], v[12:13] offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[10:11], v[8:9] offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[6:7], v[4:5] offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: buffer_load_dword v4, off, s[12:15], 0 ; 4-byte Folded Reload -; GFX9-NO-DS128-NEXT: buffer_load_dword v5, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload -; GFX9-NO-DS128-NEXT: s_waitcnt vmcnt(0) -; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[2:3], v[4:5] offset1:1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v29, s1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[9:12], v29 offset0:14 offset1:15 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[13:16], v29 offset0:12 offset1:13 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v29 offset1:1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v29 offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[17:20], v29 offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[21:24], v29 offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[25:28], v29 offset0:8 offset1:9 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[29:32], v29 offset0:10 offset1:11 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v8, s0 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(7) +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v34, 16, v12 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v36, 16, v11 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v33, 0xffff, v12 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v35, 0xffff, v11 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[35:36], v[33:34] offset0:30 offset1:31 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v10 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v34, 16, v9 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v33, 0xffff, v9 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[33:34], v[10:11] offset0:28 offset1:29 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(8) +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v16 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v16 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v15 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v15 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:26 offset1:27 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v14 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v14 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v13 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v13 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:24 offset1:25 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(4) +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v32 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v32 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v31 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v31 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:22 offset1:23 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v30 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v30 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v29 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v29 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:20 offset1:21 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v28 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v28 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v27 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v27 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:18 offset1:19 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v26 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v26 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v25 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v25 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v23 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v13, 0xffff, v23 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v22 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v21 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v15, 0xffff, v22 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v21 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset0:16 offset1:17 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v24 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v24 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[22:23], v[15:16] offset0:12 offset1:13 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v20 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v19 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v20 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v19 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[24:25], v[22:23] offset0:10 offset1:11 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v18 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v27, 16, v17 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v18 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v26, 0xffff, v17 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v3 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[26:27], v[24:25] offset0:8 offset1:9 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v2 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v3 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v2 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v5 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[13:14], v[11:12] offset0:14 offset1:15 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v4 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v7 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v6 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v1 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v0 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v5 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v4 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v13, 0xffff, v7 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v15, 0xffff, v6 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v1 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v0 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[24:25], v[22:23] offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[18:19], v[20:21] offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[15:16], v[13:14] offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v8, v[11:12], v[9:10] offset1:1 ; GFX9-NO-DS128-NEXT: s_endpgm ; ; EG-LABEL: local_zextload_v64i16_to_v64i32: @@ -3794,278 +3746,199 @@ define amdgpu_kernel void @local_zextload_v64i16_to_v64i32(ptr addrspace(3) %out ; VI-DS128: ; %bb.0: ; VI-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-DS128-NEXT: s_mov_b32 m0, -1 -; VI-DS128-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0 -; VI-DS128-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1 -; VI-DS128-NEXT: s_mov_b32 s90, -1 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_mov_b32_e32 v0, s1 -; VI-DS128-NEXT: ds_read_b128 v[8:11], v0 -; VI-DS128-NEXT: ds_read_b128 v[16:19], v0 offset:16 -; VI-DS128-NEXT: s_mov_b32 s91, 0xe80000 -; VI-DS128-NEXT: s_add_u32 s88, s88, s11 -; VI-DS128-NEXT: ds_read_b128 v[20:23], v0 offset:32 -; VI-DS128-NEXT: ds_read_b128 v[24:27], v0 offset:48 +; VI-DS128-NEXT: v_mov_b32_e32 v33, s1 +; VI-DS128-NEXT: ds_read_b128 v[5:8], v33 offset:112 +; VI-DS128-NEXT: ds_read_b128 v[9:12], v33 offset:96 +; VI-DS128-NEXT: ds_read_b128 v[13:16], v33 +; VI-DS128-NEXT: ds_read_b128 v[0:3], v33 offset:16 +; VI-DS128-NEXT: ds_read_b128 v[21:24], v33 offset:32 +; VI-DS128-NEXT: ds_read_b128 v[25:28], v33 offset:48 +; VI-DS128-NEXT: ds_read_b128 v[29:32], v33 offset:64 +; VI-DS128-NEXT: ds_read_b128 v[33:36], v33 offset:80 +; VI-DS128-NEXT: v_mov_b32_e32 v4, s0 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(7) +; VI-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v6 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v5 +; VI-DS128-NEXT: v_and_b32_e32 v19, 0xffff, v6 +; VI-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v5 +; VI-DS128-NEXT: ds_write_b128 v4, v[17:20] offset:224 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v8 +; VI-DS128-NEXT: v_and_b32_e32 v19, 0xffff, v8 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v7 +; VI-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v7 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(7) +; VI-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v10 +; VI-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v10 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v9 +; VI-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v9 +; VI-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:192 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v12 +; VI-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v12 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v11 +; VI-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v11 +; VI-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:208 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(3) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v11 -; VI-DS128-NEXT: s_addc_u32 s89, s89, 0 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v10 -; VI-DS128-NEXT: v_mov_b32_e32 v4, v3 -; VI-DS128-NEXT: v_and_b32_e32 v3, 0xffff, v11 -; VI-DS128-NEXT: v_and_b32_e32 v1, 0xffff, v10 -; VI-DS128-NEXT: buffer_store_dword v1, off, s[88:91], 0 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v2, off, s[88:91], 0 offset:4 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v3, off, s[88:91], 0 offset:8 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v4, off, s[88:91], 0 offset:12 ; 4-byte Folded Spill -; VI-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v9 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v8 -; VI-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v9 -; VI-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v8 -; VI-DS128-NEXT: buffer_store_dword v4, off, s[88:91], 0 offset:16 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v5, off, s[88:91], 0 offset:20 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v6, off, s[88:91], 0 offset:24 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v7, off, s[88:91], 0 offset:28 ; 4-byte Folded Spill -; VI-DS128-NEXT: s_waitcnt lgkmcnt(2) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v19 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v18 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v17 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v16 -; VI-DS128-NEXT: v_and_b32_e32 v3, 0xffff, v19 -; VI-DS128-NEXT: v_and_b32_e32 v1, 0xffff, v18 -; VI-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v17 -; VI-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v16 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v23 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v22 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v31, 16, v21 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v20 -; VI-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v23 -; VI-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v22 -; VI-DS128-NEXT: v_and_b32_e32 v30, 0xffff, v21 -; VI-DS128-NEXT: v_and_b32_e32 v28, 0xffff, v20 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v27 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v26 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v35, 16, v25 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; VI-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v27 -; VI-DS128-NEXT: ds_read_b128 v[36:39], v0 offset:64 -; VI-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v26 -; VI-DS128-NEXT: v_and_b32_e32 v34, 0xffff, v25 -; VI-DS128-NEXT: v_and_b32_e32 v32, 0xffff, v24 -; VI-DS128-NEXT: ds_read_b128 v[24:27], v0 offset:80 -; VI-DS128-NEXT: ds_read_b128 v[55:58], v0 offset:96 -; VI-DS128-NEXT: buffer_store_dword v1, off, s[88:91], 0 offset:32 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v2, off, s[88:91], 0 offset:36 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v3, off, s[88:91], 0 offset:40 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v4, off, s[88:91], 0 offset:44 ; 4-byte Folded Spill -; VI-DS128-NEXT: s_waitcnt lgkmcnt(2) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v42, 16, v39 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v40, 16, v38 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v50, 16, v27 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v48, 16, v26 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v54, 16, v25 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v52, 16, v24 -; VI-DS128-NEXT: v_and_b32_e32 v49, 0xffff, v27 -; VI-DS128-NEXT: v_and_b32_e32 v47, 0xffff, v26 -; VI-DS128-NEXT: v_and_b32_e32 v53, 0xffff, v25 -; VI-DS128-NEXT: v_and_b32_e32 v51, 0xffff, v24 -; VI-DS128-NEXT: ds_read_b128 v[24:27], v0 offset:112 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v46, 16, v37 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v44, 16, v36 -; VI-DS128-NEXT: v_and_b32_e32 v41, 0xffff, v39 -; VI-DS128-NEXT: v_and_b32_e32 v39, 0xffff, v38 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v25 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v24 -; VI-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v25 -; VI-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v24 -; VI-DS128-NEXT: v_mov_b32_e32 v24, s0 -; VI-DS128-NEXT: v_and_b32_e32 v45, 0xffff, v37 -; VI-DS128-NEXT: v_and_b32_e32 v43, 0xffff, v36 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v61, 16, v58 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v59, 16, v57 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v56 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v55 -; VI-DS128-NEXT: v_and_b32_e32 v60, 0xffff, v58 -; VI-DS128-NEXT: v_and_b32_e32 v58, 0xffff, v57 -; VI-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v56 -; VI-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v55 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v27 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v26 -; VI-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v27 -; VI-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v26 -; VI-DS128-NEXT: ds_write_b128 v24, v[0:3] offset:224 -; VI-DS128-NEXT: ds_write_b128 v24, v[4:7] offset:240 -; VI-DS128-NEXT: ds_write_b128 v24, v[8:11] offset:192 -; VI-DS128-NEXT: ds_write_b128 v24, v[58:61] offset:208 -; VI-DS128-NEXT: ds_write_b128 v24, v[51:54] offset:160 -; VI-DS128-NEXT: ds_write_b128 v24, v[47:50] offset:176 -; VI-DS128-NEXT: ds_write_b128 v24, v[43:46] offset:128 -; VI-DS128-NEXT: ds_write_b128 v24, v[39:42] offset:144 -; VI-DS128-NEXT: ds_write_b128 v24, v[32:35] offset:96 -; VI-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:112 -; VI-DS128-NEXT: ds_write_b128 v24, v[28:31] offset:64 -; VI-DS128-NEXT: ds_write_b128 v24, v[16:19] offset:80 -; VI-DS128-NEXT: ds_write_b128 v24, v[12:15] offset:32 -; VI-DS128-NEXT: buffer_load_dword v0, off, s[88:91], 0 offset:32 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:36 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v2, off, s[88:91], 0 offset:40 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v3, off, s[88:91], 0 offset:44 ; 4-byte Folded Reload -; VI-DS128-NEXT: s_waitcnt vmcnt(0) -; VI-DS128-NEXT: ds_write_b128 v24, v[0:3] offset:48 -; VI-DS128-NEXT: buffer_load_dword v0, off, s[88:91], 0 offset:16 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:20 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v2, off, s[88:91], 0 offset:24 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v3, off, s[88:91], 0 offset:28 ; 4-byte Folded Reload -; VI-DS128-NEXT: s_waitcnt vmcnt(0) -; VI-DS128-NEXT: ds_write_b128 v24, v[0:3] -; VI-DS128-NEXT: buffer_load_dword v0, off, s[88:91], 0 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v2, off, s[88:91], 0 offset:8 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v3, off, s[88:91], 0 offset:12 ; 4-byte Folded Reload -; VI-DS128-NEXT: s_waitcnt vmcnt(0) -; VI-DS128-NEXT: ds_write_b128 v24, v[0:3] offset:16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v34 +; VI-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v34 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v33 +; VI-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v33 +; VI-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:160 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v36 +; VI-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v36 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v35 +; VI-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v35 +; VI-DS128-NEXT: ds_write_b128 v4, v[17:20] offset:240 +; VI-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:176 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v30 +; VI-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v30 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v29 +; VI-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v29 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v26 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v25 +; VI-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v26 +; VI-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v25 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v28 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v27 +; VI-DS128-NEXT: v_and_b32_e32 v19, 0xffff, v28 +; VI-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v27 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v28, 16, v22 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v26, 16, v21 +; VI-DS128-NEXT: v_and_b32_e32 v27, 0xffff, v22 +; VI-DS128-NEXT: v_and_b32_e32 v25, 0xffff, v21 +; VI-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:128 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v32 +; VI-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v32 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v31 +; VI-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v31 +; VI-DS128-NEXT: ds_write_b128 v4, v[25:28] offset:64 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v1 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v24 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v27, 16, v23 +; VI-DS128-NEXT: v_and_b32_e32 v28, 0xffff, v24 +; VI-DS128-NEXT: v_and_b32_e32 v26, 0xffff, v23 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v0 +; VI-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v1 +; VI-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v0 +; VI-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:144 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v16 +; VI-DS128-NEXT: ds_write_b128 v4, v[9:12] offset:96 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v15 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v14 +; VI-DS128-NEXT: ds_write_b128 v4, v[17:20] offset:112 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v13 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v3 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v2 +; VI-DS128-NEXT: ds_write_b128 v4, v[26:29] offset:80 +; VI-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v16 +; VI-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v15 +; VI-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v14 +; VI-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v13 +; VI-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v3 +; VI-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v2 +; VI-DS128-NEXT: ds_write_b128 v4, v[22:25] offset:32 +; VI-DS128-NEXT: ds_write_b128 v4, v[16:19] offset:48 +; VI-DS128-NEXT: ds_write_b128 v4, v[9:12] +; VI-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:16 ; VI-DS128-NEXT: s_endpgm ; ; GFX9-DS128-LABEL: local_zextload_v64i16_to_v64i32: ; GFX9-DS128: ; %bb.0: ; GFX9-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; GFX9-DS128-NEXT: s_mov_b32 s12, SCRATCH_RSRC_DWORD0 -; GFX9-DS128-NEXT: s_mov_b32 s13, SCRATCH_RSRC_DWORD1 -; GFX9-DS128-NEXT: s_mov_b32 s14, -1 -; GFX9-DS128-NEXT: s_mov_b32 s15, 0xe00000 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_mov_b32_e32 v0, s1 -; GFX9-DS128-NEXT: ds_read_b128 v[8:11], v0 -; GFX9-DS128-NEXT: ds_read_b128 v[16:19], v0 offset:16 -; GFX9-DS128-NEXT: s_add_u32 s12, s12, s11 -; GFX9-DS128-NEXT: ds_read_b128 v[20:23], v0 offset:32 -; GFX9-DS128-NEXT: ds_read_b128 v[24:27], v0 offset:48 +; GFX9-DS128-NEXT: v_mov_b32_e32 v33, s1 +; GFX9-DS128-NEXT: ds_read_b128 v[5:8], v33 offset:112 +; GFX9-DS128-NEXT: ds_read_b128 v[9:12], v33 offset:96 +; GFX9-DS128-NEXT: ds_read_b128 v[13:16], v33 +; GFX9-DS128-NEXT: ds_read_b128 v[0:3], v33 offset:16 +; GFX9-DS128-NEXT: ds_read_b128 v[21:24], v33 offset:32 +; GFX9-DS128-NEXT: ds_read_b128 v[25:28], v33 offset:48 +; GFX9-DS128-NEXT: ds_read_b128 v[29:32], v33 offset:64 +; GFX9-DS128-NEXT: ds_read_b128 v[33:36], v33 offset:80 +; GFX9-DS128-NEXT: v_mov_b32_e32 v4, s0 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(7) +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v6 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v5 +; GFX9-DS128-NEXT: v_and_b32_e32 v19, 0xffff, v6 +; GFX9-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v5 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[17:20] offset:224 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v8 +; GFX9-DS128-NEXT: v_and_b32_e32 v19, 0xffff, v8 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v7 +; GFX9-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v7 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(7) +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v10 +; GFX9-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v10 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v9 +; GFX9-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v9 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:192 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v12 +; GFX9-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v12 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v11 +; GFX9-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v11 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:208 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(3) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v11 -; GFX9-DS128-NEXT: s_addc_u32 s13, s13, 0 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v10 -; GFX9-DS128-NEXT: v_mov_b32_e32 v4, v3 -; GFX9-DS128-NEXT: v_and_b32_e32 v3, 0xffff, v11 -; GFX9-DS128-NEXT: v_and_b32_e32 v1, 0xffff, v10 -; GFX9-DS128-NEXT: buffer_store_dword v1, off, s[12:15], 0 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: s_nop 0 -; GFX9-DS128-NEXT: buffer_store_dword v2, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: buffer_store_dword v3, off, s[12:15], 0 offset:8 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: buffer_store_dword v4, off, s[12:15], 0 offset:12 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v9 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v8 -; GFX9-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v9 -; GFX9-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v8 -; GFX9-DS128-NEXT: buffer_store_dword v4, off, s[12:15], 0 offset:16 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: s_nop 0 -; GFX9-DS128-NEXT: buffer_store_dword v5, off, s[12:15], 0 offset:20 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: buffer_store_dword v6, off, s[12:15], 0 offset:24 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: buffer_store_dword v7, off, s[12:15], 0 offset:28 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(2) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v19 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v18 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v17 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v16 -; GFX9-DS128-NEXT: v_and_b32_e32 v3, 0xffff, v19 -; GFX9-DS128-NEXT: v_and_b32_e32 v1, 0xffff, v18 -; GFX9-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v17 -; GFX9-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v16 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v23 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v22 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v31, 16, v21 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v20 -; GFX9-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v23 -; GFX9-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v22 -; GFX9-DS128-NEXT: v_and_b32_e32 v30, 0xffff, v21 -; GFX9-DS128-NEXT: v_and_b32_e32 v28, 0xffff, v20 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v27 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v26 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v35, 16, v25 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v33, 16, v24 -; GFX9-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v27 -; GFX9-DS128-NEXT: ds_read_b128 v[36:39], v0 offset:64 -; GFX9-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v26 -; GFX9-DS128-NEXT: v_and_b32_e32 v34, 0xffff, v25 -; GFX9-DS128-NEXT: v_and_b32_e32 v32, 0xffff, v24 -; GFX9-DS128-NEXT: ds_read_b128 v[24:27], v0 offset:80 -; GFX9-DS128-NEXT: ds_read_b128 v[55:58], v0 offset:96 -; GFX9-DS128-NEXT: buffer_store_dword v1, off, s[12:15], 0 offset:32 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: s_nop 0 -; GFX9-DS128-NEXT: buffer_store_dword v2, off, s[12:15], 0 offset:36 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: buffer_store_dword v3, off, s[12:15], 0 offset:40 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: buffer_store_dword v4, off, s[12:15], 0 offset:44 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(2) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v42, 16, v39 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v40, 16, v38 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v50, 16, v27 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v48, 16, v26 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v54, 16, v25 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v52, 16, v24 -; GFX9-DS128-NEXT: v_and_b32_e32 v49, 0xffff, v27 -; GFX9-DS128-NEXT: v_and_b32_e32 v47, 0xffff, v26 -; GFX9-DS128-NEXT: v_and_b32_e32 v53, 0xffff, v25 -; GFX9-DS128-NEXT: v_and_b32_e32 v51, 0xffff, v24 -; GFX9-DS128-NEXT: ds_read_b128 v[24:27], v0 offset:112 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v46, 16, v37 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v44, 16, v36 -; GFX9-DS128-NEXT: v_and_b32_e32 v41, 0xffff, v39 -; GFX9-DS128-NEXT: v_and_b32_e32 v39, 0xffff, v38 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v25 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v24 -; GFX9-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v25 -; GFX9-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v24 -; GFX9-DS128-NEXT: v_mov_b32_e32 v24, s0 -; GFX9-DS128-NEXT: v_and_b32_e32 v45, 0xffff, v37 -; GFX9-DS128-NEXT: v_and_b32_e32 v43, 0xffff, v36 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v61, 16, v58 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v59, 16, v57 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v56 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v55 -; GFX9-DS128-NEXT: v_and_b32_e32 v60, 0xffff, v58 -; GFX9-DS128-NEXT: v_and_b32_e32 v58, 0xffff, v57 -; GFX9-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v56 -; GFX9-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v55 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v27 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v26 -; GFX9-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v27 -; GFX9-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v26 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[0:3] offset:224 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[4:7] offset:240 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[8:11] offset:192 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[58:61] offset:208 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[51:54] offset:160 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[47:50] offset:176 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[43:46] offset:128 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[39:42] offset:144 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[32:35] offset:96 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:112 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[28:31] offset:64 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[16:19] offset:80 -; GFX9-DS128-NEXT: ds_write_b128 v24, v[12:15] offset:32 -; GFX9-DS128-NEXT: buffer_load_dword v0, off, s[12:15], 0 offset:32 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:36 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v2, off, s[12:15], 0 offset:40 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v3, off, s[12:15], 0 offset:44 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: s_waitcnt vmcnt(0) -; GFX9-DS128-NEXT: ds_write_b128 v24, v[0:3] offset:48 -; GFX9-DS128-NEXT: buffer_load_dword v0, off, s[12:15], 0 offset:16 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:20 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v2, off, s[12:15], 0 offset:24 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v3, off, s[12:15], 0 offset:28 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: s_waitcnt vmcnt(0) -; GFX9-DS128-NEXT: ds_write_b128 v24, v[0:3] -; GFX9-DS128-NEXT: buffer_load_dword v0, off, s[12:15], 0 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: s_waitcnt vmcnt(0) -; GFX9-DS128-NEXT: ds_write_b128 v24, v[0:3] offset:16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v34 +; GFX9-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v34 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v33 +; GFX9-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v33 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:160 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v36 +; GFX9-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v36 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v35 +; GFX9-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v35 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[17:20] offset:240 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:176 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v30 +; GFX9-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v30 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v29 +; GFX9-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v29 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v26 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v25 +; GFX9-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v26 +; GFX9-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v25 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v28 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v27 +; GFX9-DS128-NEXT: v_and_b32_e32 v19, 0xffff, v28 +; GFX9-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v27 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v28, 16, v22 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v26, 16, v21 +; GFX9-DS128-NEXT: v_and_b32_e32 v27, 0xffff, v22 +; GFX9-DS128-NEXT: v_and_b32_e32 v25, 0xffff, v21 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:128 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v32 +; GFX9-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v32 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v31 +; GFX9-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v31 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[25:28] offset:64 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v1 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v24 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v27, 16, v23 +; GFX9-DS128-NEXT: v_and_b32_e32 v28, 0xffff, v24 +; GFX9-DS128-NEXT: v_and_b32_e32 v26, 0xffff, v23 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v0 +; GFX9-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v1 +; GFX9-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v0 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:144 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v16 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[9:12] offset:96 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v15 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v14 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[17:20] offset:112 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v13 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v3 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v2 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[26:29] offset:80 +; GFX9-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v16 +; GFX9-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v15 +; GFX9-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v14 +; GFX9-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v13 +; GFX9-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v3 +; GFX9-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v2 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[22:25] offset:32 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[16:19] offset:48 +; GFX9-DS128-NEXT: ds_write_b128 v4, v[9:12] +; GFX9-DS128-NEXT: ds_write_b128 v4, v[5:8] offset:16 ; GFX9-DS128-NEXT: s_endpgm %load = load <64 x i16>, ptr addrspace(3) %in %ext = zext <64 x i16> %load to <64 x i32> @@ -4078,337 +3951,312 @@ define amdgpu_kernel void @local_sextload_v64i16_to_v64i32(ptr addrspace(3) %out ; SI: ; %bb.0: ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 ; SI-NEXT: s_mov_b32 m0, -1 -; SI-NEXT: s_mov_b32 s12, SCRATCH_RSRC_DWORD0 -; SI-NEXT: s_mov_b32 s13, SCRATCH_RSRC_DWORD1 -; SI-NEXT: s_mov_b32 s14, -1 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_mov_b32_e32 v28, s1 -; SI-NEXT: ds_read2_b64 v[29:32], v28 offset0:14 offset1:15 -; SI-NEXT: ds_read2_b64 v[33:36], v28 offset1:1 -; SI-NEXT: ds_read2_b64 v[10:13], v28 offset0:8 offset1:9 -; SI-NEXT: ds_read2_b64 v[14:17], v28 offset0:10 offset1:11 -; SI-NEXT: ds_read2_b64 v[20:23], v28 offset0:12 offset1:13 -; SI-NEXT: s_mov_b32 s15, 0xe8f000 -; SI-NEXT: s_waitcnt lgkmcnt(4) -; SI-NEXT: v_ashrrev_i32_e32 v25, 16, v30 -; SI-NEXT: v_bfe_i32 v24, v30, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v27, 16, v29 -; SI-NEXT: v_bfe_i32 v26, v29, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v38, 16, v32 -; SI-NEXT: v_bfe_i32 v37, v32, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v40, 16, v31 -; SI-NEXT: v_bfe_i32 v39, v31, 0, 16 -; SI-NEXT: ds_read2_b64 v[29:32], v28 offset0:2 offset1:3 -; SI-NEXT: s_waitcnt lgkmcnt(4) -; SI-NEXT: v_ashrrev_i32_e32 v42, 16, v34 -; SI-NEXT: v_bfe_i32 v41, v34, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v44, 16, v33 -; SI-NEXT: v_bfe_i32 v43, v33, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v46, 16, v36 -; SI-NEXT: v_bfe_i32 v45, v36, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v48, 16, v35 -; SI-NEXT: v_bfe_i32 v47, v35, 0, 16 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_ashrrev_i32_e32 v50, 16, v30 -; SI-NEXT: v_bfe_i32 v49, v30, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v52, 16, v29 -; SI-NEXT: v_bfe_i32 v51, v29, 0, 16 -; SI-NEXT: ds_read2_b64 v[33:36], v28 offset0:4 offset1:5 -; SI-NEXT: v_ashrrev_i32_e32 v56, 16, v31 -; SI-NEXT: v_bfe_i32 v55, v31, 0, 16 -; SI-NEXT: ds_read2_b64 v[28:31], v28 offset0:6 offset1:7 -; SI-NEXT: s_add_u32 s12, s12, s11 -; SI-NEXT: s_addc_u32 s13, s13, 0 -; SI-NEXT: v_ashrrev_i32_e32 v1, 16, v11 -; SI-NEXT: v_bfe_i32 v0, v11, 0, 16 -; SI-NEXT: buffer_store_dword v0, off, s[12:15], 0 ; 4-byte Folded Spill -; SI-NEXT: buffer_store_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill -; SI-NEXT: v_ashrrev_i32_e32 v54, 16, v32 -; SI-NEXT: v_bfe_i32 v53, v32, 0, 16 ; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_ashrrev_i32_e32 v32, 16, v31 -; SI-NEXT: v_bfe_i32 v31, v31, 0, 16 -; SI-NEXT: s_waitcnt expcnt(0) -; SI-NEXT: v_ashrrev_i32_e32 v1, 16, v30 -; SI-NEXT: v_bfe_i32 v0, v30, 0, 16 -; SI-NEXT: v_mov_b32_e32 v30, s0 -; SI-NEXT: v_ashrrev_i32_e32 v3, 16, v10 -; SI-NEXT: v_ashrrev_i32_e32 v5, 16, v13 -; SI-NEXT: v_ashrrev_i32_e32 v7, 16, v12 -; SI-NEXT: v_ashrrev_i32_e32 v9, 16, v15 -; SI-NEXT: v_bfe_i32 v2, v10, 0, 16 -; SI-NEXT: v_bfe_i32 v4, v13, 0, 16 -; SI-NEXT: v_bfe_i32 v6, v12, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v11, 16, v14 -; SI-NEXT: v_ashrrev_i32_e32 v13, 16, v17 -; SI-NEXT: v_bfe_i32 v8, v15, 0, 16 -; SI-NEXT: v_bfe_i32 v10, v14, 0, 16 -; SI-NEXT: v_bfe_i32 v12, v17, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v15, 16, v16 -; SI-NEXT: v_bfe_i32 v14, v16, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v17, 16, v21 -; SI-NEXT: v_bfe_i32 v16, v21, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v19, 16, v20 -; SI-NEXT: v_bfe_i32 v18, v20, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v21, 16, v23 -; SI-NEXT: v_bfe_i32 v20, v23, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v23, 16, v22 -; SI-NEXT: v_bfe_i32 v22, v22, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v58, 16, v34 -; SI-NEXT: v_bfe_i32 v57, v34, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v34, 16, v33 -; SI-NEXT: v_bfe_i32 v33, v33, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v60, 16, v36 -; SI-NEXT: v_bfe_i32 v59, v36, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v36, 16, v35 -; SI-NEXT: v_bfe_i32 v35, v35, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v62, 16, v29 -; SI-NEXT: v_bfe_i32 v61, v29, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v29, 16, v28 -; SI-NEXT: v_bfe_i32 v28, v28, 0, 16 -; SI-NEXT: ds_write2_b64 v30, v[0:1], v[31:32] offset0:14 offset1:15 -; SI-NEXT: ds_write2_b64 v30, v[28:29], v[61:62] offset0:12 offset1:13 -; SI-NEXT: ds_write2_b64 v30, v[35:36], v[59:60] offset0:10 offset1:11 -; SI-NEXT: ds_write2_b64 v30, v[33:34], v[57:58] offset0:8 offset1:9 -; SI-NEXT: ds_write2_b64 v30, v[55:56], v[53:54] offset0:6 offset1:7 -; SI-NEXT: ds_write2_b64 v30, v[51:52], v[49:50] offset0:4 offset1:5 -; SI-NEXT: ds_write2_b64 v30, v[47:48], v[45:46] offset0:2 offset1:3 -; SI-NEXT: ds_write2_b64 v30, v[43:44], v[41:42] offset1:1 -; SI-NEXT: ds_write2_b64 v30, v[39:40], v[37:38] offset0:30 offset1:31 -; SI-NEXT: ds_write2_b64 v30, v[26:27], v[24:25] offset0:28 offset1:29 -; SI-NEXT: ds_write2_b64 v30, v[22:23], v[20:21] offset0:26 offset1:27 -; SI-NEXT: ds_write2_b64 v30, v[18:19], v[16:17] offset0:24 offset1:25 -; SI-NEXT: ds_write2_b64 v30, v[14:15], v[12:13] offset0:22 offset1:23 -; SI-NEXT: ds_write2_b64 v30, v[10:11], v[8:9] offset0:20 offset1:21 -; SI-NEXT: ds_write2_b64 v30, v[6:7], v[4:5] offset0:18 offset1:19 -; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0 ; 4-byte Folded Reload -; SI-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload -; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: ds_write2_b64 v30, v[2:3], v[0:1] offset0:16 offset1:17 +; SI-NEXT: v_mov_b32_e32 v29, s1 +; SI-NEXT: ds_read2_b64 v[1:4], v29 offset0:6 offset1:7 +; SI-NEXT: ds_read2_b64 v[5:8], v29 offset0:4 offset1:5 +; SI-NEXT: ds_read2_b64 v[9:12], v29 offset0:2 offset1:3 +; SI-NEXT: ds_read2_b64 v[13:16], v29 offset1:1 +; SI-NEXT: v_mov_b32_e32 v0, s0 +; SI-NEXT: ds_read2_b64 v[17:20], v29 offset0:14 offset1:15 +; SI-NEXT: ds_read2_b64 v[21:24], v29 offset0:12 offset1:13 +; SI-NEXT: ds_read2_b64 v[25:28], v29 offset0:10 offset1:11 +; SI-NEXT: ds_read2_b64 v[29:32], v29 offset0:8 offset1:9 +; SI-NEXT: s_waitcnt lgkmcnt(7) +; SI-NEXT: v_ashrrev_i32_e32 v34, 16, v4 +; SI-NEXT: v_ashrrev_i32_e32 v36, 16, v3 +; SI-NEXT: v_bfe_i32 v33, v4, 0, 16 +; SI-NEXT: v_bfe_i32 v35, v3, 0, 16 +; SI-NEXT: ds_write2_b64 v0, v[35:36], v[33:34] offset0:14 offset1:15 +; SI-NEXT: v_ashrrev_i32_e32 v3, 16, v2 +; SI-NEXT: v_bfe_i32 v2, v2, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v34, 16, v1 +; SI-NEXT: v_bfe_i32 v33, v1, 0, 16 +; SI-NEXT: ds_write2_b64 v0, v[33:34], v[2:3] offset0:12 offset1:13 +; SI-NEXT: s_waitcnt lgkmcnt(8) +; SI-NEXT: v_ashrrev_i32_e32 v2, 16, v8 +; SI-NEXT: v_bfe_i32 v1, v8, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v4, 16, v7 +; SI-NEXT: v_bfe_i32 v3, v7, 0, 16 +; SI-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:10 offset1:11 +; SI-NEXT: v_ashrrev_i32_e32 v2, 16, v6 +; SI-NEXT: v_bfe_i32 v1, v6, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v4, 16, v5 +; SI-NEXT: v_bfe_i32 v3, v5, 0, 16 +; SI-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:8 offset1:9 +; SI-NEXT: s_waitcnt lgkmcnt(9) +; SI-NEXT: v_ashrrev_i32_e32 v2, 16, v12 +; SI-NEXT: v_bfe_i32 v1, v12, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v4, 16, v11 +; SI-NEXT: v_bfe_i32 v3, v11, 0, 16 +; SI-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:6 offset1:7 +; SI-NEXT: v_ashrrev_i32_e32 v2, 16, v10 +; SI-NEXT: v_bfe_i32 v1, v10, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v4, 16, v9 +; SI-NEXT: v_bfe_i32 v3, v9, 0, 16 +; SI-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:4 offset1:5 +; SI-NEXT: s_waitcnt lgkmcnt(10) +; SI-NEXT: v_ashrrev_i32_e32 v2, 16, v16 +; SI-NEXT: v_bfe_i32 v1, v16, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v4, 16, v15 +; SI-NEXT: v_bfe_i32 v3, v15, 0, 16 +; SI-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:2 offset1:3 +; SI-NEXT: v_ashrrev_i32_e32 v2, 16, v14 +; SI-NEXT: v_bfe_i32 v1, v14, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v4, 16, v13 +; SI-NEXT: v_bfe_i32 v3, v13, 0, 16 +; SI-NEXT: s_waitcnt lgkmcnt(10) +; SI-NEXT: v_ashrrev_i32_e32 v8, 16, v18 +; SI-NEXT: v_ashrrev_i32_e32 v10, 16, v17 +; SI-NEXT: v_bfe_i32 v7, v18, 0, 16 +; SI-NEXT: v_bfe_i32 v9, v17, 0, 16 +; SI-NEXT: s_waitcnt lgkmcnt(9) +; SI-NEXT: v_ashrrev_i32_e32 v12, 16, v24 +; SI-NEXT: v_ashrrev_i32_e32 v14, 16, v23 +; SI-NEXT: v_bfe_i32 v11, v24, 0, 16 +; SI-NEXT: v_bfe_i32 v13, v23, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v16, 16, v22 +; SI-NEXT: v_ashrrev_i32_e32 v18, 16, v21 +; SI-NEXT: v_bfe_i32 v15, v22, 0, 16 +; SI-NEXT: v_bfe_i32 v17, v21, 0, 16 +; SI-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset1:1 +; SI-NEXT: v_ashrrev_i32_e32 v4, 16, v20 +; SI-NEXT: v_ashrrev_i32_e32 v6, 16, v19 +; SI-NEXT: v_bfe_i32 v3, v20, 0, 16 +; SI-NEXT: v_bfe_i32 v5, v19, 0, 16 +; SI-NEXT: ds_write2_b64 v0, v[13:14], v[11:12] offset0:26 offset1:27 +; SI-NEXT: s_waitcnt lgkmcnt(10) +; SI-NEXT: v_ashrrev_i32_e32 v14, 16, v28 +; SI-NEXT: ds_write2_b64 v0, v[17:18], v[15:16] offset0:24 offset1:25 +; SI-NEXT: v_ashrrev_i32_e32 v16, 16, v27 +; SI-NEXT: v_bfe_i32 v13, v28, 0, 16 +; SI-NEXT: v_bfe_i32 v15, v27, 0, 16 +; SI-NEXT: s_waitcnt lgkmcnt(10) +; SI-NEXT: v_ashrrev_i32_e32 v2, 16, v30 +; SI-NEXT: ds_write2_b64 v0, v[5:6], v[3:4] offset0:30 offset1:31 +; SI-NEXT: v_ashrrev_i32_e32 v4, 16, v29 +; SI-NEXT: v_ashrrev_i32_e32 v6, 16, v32 +; SI-NEXT: ds_write2_b64 v0, v[9:10], v[7:8] offset0:28 offset1:29 +; SI-NEXT: v_ashrrev_i32_e32 v8, 16, v31 +; SI-NEXT: v_ashrrev_i32_e32 v10, 16, v26 +; SI-NEXT: v_ashrrev_i32_e32 v12, 16, v25 +; SI-NEXT: v_bfe_i32 v1, v30, 0, 16 +; SI-NEXT: v_bfe_i32 v3, v29, 0, 16 +; SI-NEXT: v_bfe_i32 v5, v32, 0, 16 +; SI-NEXT: v_bfe_i32 v7, v31, 0, 16 +; SI-NEXT: v_bfe_i32 v9, v26, 0, 16 +; SI-NEXT: v_bfe_i32 v11, v25, 0, 16 +; SI-NEXT: ds_write2_b64 v0, v[15:16], v[13:14] offset0:22 offset1:23 +; SI-NEXT: ds_write2_b64 v0, v[11:12], v[9:10] offset0:20 offset1:21 +; SI-NEXT: ds_write2_b64 v0, v[7:8], v[5:6] offset0:18 offset1:19 +; SI-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:16 offset1:17 ; SI-NEXT: s_endpgm ; ; VI-NO-DS128-LABEL: local_sextload_v64i16_to_v64i32: ; VI-NO-DS128: ; %bb.0: ; VI-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-NO-DS128-NEXT: s_mov_b32 m0, -1 -; VI-NO-DS128-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0 -; VI-NO-DS128-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1 -; VI-NO-DS128-NEXT: s_mov_b32 s90, -1 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_mov_b32_e32 v28, s1 -; VI-NO-DS128-NEXT: ds_read2_b64 v[20:23], v28 offset0:4 offset1:5 -; VI-NO-DS128-NEXT: ds_read2_b64 v[29:32], v28 offset0:6 offset1:7 -; VI-NO-DS128-NEXT: ds_read2_b64 v[33:36], v28 offset0:8 offset1:9 -; VI-NO-DS128-NEXT: ds_read2_b64 v[10:13], v28 offset1:1 -; VI-NO-DS128-NEXT: ds_read2_b64 v[14:17], v28 offset0:2 offset1:3 -; VI-NO-DS128-NEXT: s_mov_b32 s91, 0xe80000 -; VI-NO-DS128-NEXT: s_add_u32 s88, s88, s11 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v25, 16, v30 -; VI-NO-DS128-NEXT: v_bfe_i32 v24, v30, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v27, 16, v29 -; VI-NO-DS128-NEXT: v_bfe_i32 v26, v29, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v38, 16, v32 -; VI-NO-DS128-NEXT: v_bfe_i32 v37, v32, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v40, 16, v31 -; VI-NO-DS128-NEXT: v_bfe_i32 v39, v31, 0, 16 -; VI-NO-DS128-NEXT: ds_read2_b64 v[29:32], v28 offset0:10 offset1:11 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v42, 16, v34 -; VI-NO-DS128-NEXT: v_bfe_i32 v41, v34, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v44, 16, v33 -; VI-NO-DS128-NEXT: v_bfe_i32 v43, v33, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v46, 16, v36 -; VI-NO-DS128-NEXT: v_bfe_i32 v45, v36, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v48, 16, v35 -; VI-NO-DS128-NEXT: v_bfe_i32 v47, v35, 0, 16 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v50, 16, v30 -; VI-NO-DS128-NEXT: v_bfe_i32 v49, v30, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v52, 16, v29 -; VI-NO-DS128-NEXT: v_bfe_i32 v51, v29, 0, 16 -; VI-NO-DS128-NEXT: ds_read2_b64 v[33:36], v28 offset0:12 offset1:13 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v56, 16, v31 -; VI-NO-DS128-NEXT: v_bfe_i32 v55, v31, 0, 16 -; VI-NO-DS128-NEXT: ds_read2_b64 v[28:31], v28 offset0:14 offset1:15 -; VI-NO-DS128-NEXT: s_addc_u32 s89, s89, 0 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v11 -; VI-NO-DS128-NEXT: v_bfe_i32 v0, v11, 0, 16 -; VI-NO-DS128-NEXT: buffer_store_dword v0, off, s[88:91], 0 ; 4-byte Folded Spill -; VI-NO-DS128-NEXT: buffer_store_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Spill -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v54, 16, v32 -; VI-NO-DS128-NEXT: v_bfe_i32 v53, v32, 0, 16 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v32, 16, v31 -; VI-NO-DS128-NEXT: v_bfe_i32 v31, v31, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v30 -; VI-NO-DS128-NEXT: v_bfe_i32 v0, v30, 0, 16 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v30, s0 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v10 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v5, 16, v13 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 16, v12 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v15 -; VI-NO-DS128-NEXT: v_bfe_i32 v2, v10, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v4, v13, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v6, v12, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v14 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v17 -; VI-NO-DS128-NEXT: v_bfe_i32 v8, v15, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v10, v14, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v12, v17, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v16 -; VI-NO-DS128-NEXT: v_bfe_i32 v14, v16, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v21 -; VI-NO-DS128-NEXT: v_bfe_i32 v16, v21, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v20 -; VI-NO-DS128-NEXT: v_bfe_i32 v18, v20, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v23 -; VI-NO-DS128-NEXT: v_bfe_i32 v20, v23, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v22 -; VI-NO-DS128-NEXT: v_bfe_i32 v22, v22, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v58, 16, v34 -; VI-NO-DS128-NEXT: v_bfe_i32 v57, v34, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v34, 16, v33 -; VI-NO-DS128-NEXT: v_bfe_i32 v33, v33, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v60, 16, v36 -; VI-NO-DS128-NEXT: v_bfe_i32 v59, v36, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v36, 16, v35 -; VI-NO-DS128-NEXT: v_bfe_i32 v35, v35, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v62, 16, v29 -; VI-NO-DS128-NEXT: v_bfe_i32 v61, v29, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v29, 16, v28 -; VI-NO-DS128-NEXT: v_bfe_i32 v28, v28, 0, 16 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[0:1], v[31:32] offset0:30 offset1:31 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[28:29], v[61:62] offset0:28 offset1:29 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[35:36], v[59:60] offset0:26 offset1:27 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[33:34], v[57:58] offset0:24 offset1:25 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[55:56], v[53:54] offset0:22 offset1:23 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[51:52], v[49:50] offset0:20 offset1:21 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[47:48], v[45:46] offset0:18 offset1:19 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[43:44], v[41:42] offset0:16 offset1:17 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[39:40], v[37:38] offset0:14 offset1:15 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[26:27], v[24:25] offset0:12 offset1:13 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[22:23], v[20:21] offset0:10 offset1:11 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[18:19], v[16:17] offset0:8 offset1:9 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[14:15], v[12:13] offset0:6 offset1:7 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[10:11], v[8:9] offset0:4 offset1:5 -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[6:7], v[4:5] offset0:2 offset1:3 -; VI-NO-DS128-NEXT: buffer_load_dword v0, off, s[88:91], 0 ; 4-byte Folded Reload -; VI-NO-DS128-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Reload -; VI-NO-DS128-NEXT: s_waitcnt vmcnt(0) -; VI-NO-DS128-NEXT: ds_write2_b64 v30, v[2:3], v[0:1] offset1:1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v29, s1 +; VI-NO-DS128-NEXT: ds_read2_b64 v[1:4], v29 offset0:14 offset1:15 +; VI-NO-DS128-NEXT: ds_read2_b64 v[5:8], v29 offset0:12 offset1:13 +; VI-NO-DS128-NEXT: ds_read2_b64 v[9:12], v29 offset0:10 offset1:11 +; VI-NO-DS128-NEXT: ds_read2_b64 v[13:16], v29 offset0:8 offset1:9 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v0, s0 +; VI-NO-DS128-NEXT: ds_read2_b64 v[17:20], v29 offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_read2_b64 v[21:24], v29 offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_read2_b64 v[25:28], v29 offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_read2_b64 v[29:32], v29 offset1:1 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(7) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v34, 16, v4 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v36, 16, v3 +; VI-NO-DS128-NEXT: v_bfe_i32 v33, v4, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v35, v3, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[35:36], v[33:34] offset0:30 offset1:31 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v2 +; VI-NO-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v34, 16, v1 +; VI-NO-DS128-NEXT: v_bfe_i32 v33, v1, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[33:34], v[2:3] offset0:28 offset1:29 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(8) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v8 +; VI-NO-DS128-NEXT: v_bfe_i32 v1, v8, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v7 +; VI-NO-DS128-NEXT: v_bfe_i32 v3, v7, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:26 offset1:27 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v6 +; VI-NO-DS128-NEXT: v_bfe_i32 v1, v6, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v5 +; VI-NO-DS128-NEXT: v_bfe_i32 v3, v5, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:24 offset1:25 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(9) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v12 +; VI-NO-DS128-NEXT: v_bfe_i32 v1, v12, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v11 +; VI-NO-DS128-NEXT: v_bfe_i32 v3, v11, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:22 offset1:23 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v10 +; VI-NO-DS128-NEXT: v_bfe_i32 v1, v10, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v9 +; VI-NO-DS128-NEXT: v_bfe_i32 v3, v9, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:20 offset1:21 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(10) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v16 +; VI-NO-DS128-NEXT: v_bfe_i32 v1, v16, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v15 +; VI-NO-DS128-NEXT: v_bfe_i32 v3, v15, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:18 offset1:19 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v14 +; VI-NO-DS128-NEXT: v_bfe_i32 v1, v14, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v13 +; VI-NO-DS128-NEXT: v_bfe_i32 v3, v13, 0, 16 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(10) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v8, 16, v18 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v10, 16, v17 +; VI-NO-DS128-NEXT: v_bfe_i32 v7, v18, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v9, v17, 0, 16 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(9) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v12, 16, v24 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v14, 16, v23 +; VI-NO-DS128-NEXT: v_bfe_i32 v11, v24, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v13, v23, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v16, 16, v22 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 16, v21 +; VI-NO-DS128-NEXT: v_bfe_i32 v15, v22, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v17, v21, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:16 offset1:17 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v20 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v19 +; VI-NO-DS128-NEXT: v_bfe_i32 v3, v20, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v5, v19, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[13:14], v[11:12] offset0:10 offset1:11 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(10) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v14, 16, v28 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[17:18], v[15:16] offset0:8 offset1:9 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v16, 16, v27 +; VI-NO-DS128-NEXT: v_bfe_i32 v13, v28, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v15, v27, 0, 16 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(10) +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v30 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[5:6], v[3:4] offset0:14 offset1:15 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v29 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v32 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[9:10], v[7:8] offset0:12 offset1:13 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v8, 16, v31 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v10, 16, v26 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v12, 16, v25 +; VI-NO-DS128-NEXT: v_bfe_i32 v1, v30, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v3, v29, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v5, v32, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v7, v31, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v9, v26, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v11, v25, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[15:16], v[13:14] offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[11:12], v[9:10] offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[7:8], v[5:6] offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset1:1 ; VI-NO-DS128-NEXT: s_endpgm ; ; GFX9-NO-DS128-LABEL: local_sextload_v64i16_to_v64i32: ; GFX9-NO-DS128: ; %bb.0: ; GFX9-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; GFX9-NO-DS128-NEXT: s_mov_b32 s12, SCRATCH_RSRC_DWORD0 -; GFX9-NO-DS128-NEXT: s_mov_b32 s13, SCRATCH_RSRC_DWORD1 -; GFX9-NO-DS128-NEXT: s_mov_b32 s14, -1 -; GFX9-NO-DS128-NEXT: s_mov_b32 s15, 0xe00000 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v28, s1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[20:23], v28 offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[29:32], v28 offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[33:36], v28 offset0:8 offset1:9 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[10:13], v28 offset1:1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[14:17], v28 offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: s_add_u32 s12, s12, s11 -; GFX9-NO-DS128-NEXT: s_addc_u32 s13, s13, 0 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v25, 16, v30 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v24, v30, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v27, 16, v29 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v26, v29, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v38, 16, v32 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v37, v32, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v40, 16, v31 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v39, v31, 0, 16 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[29:32], v28 offset0:10 offset1:11 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v42, 16, v34 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v41, v34, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v44, 16, v33 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v43, v33, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v46, 16, v36 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v45, v36, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v48, 16, v35 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v47, v35, 0, 16 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v50, 16, v30 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v49, v30, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v52, 16, v29 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v51, v29, 0, 16 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[33:36], v28 offset0:12 offset1:13 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v56, 16, v31 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v55, v31, 0, 16 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[28:31], v28 offset0:14 offset1:15 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v11 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v0, v11, 0, 16 -; GFX9-NO-DS128-NEXT: buffer_store_dword v0, off, s[12:15], 0 ; 4-byte Folded Spill -; GFX9-NO-DS128-NEXT: s_nop 0 -; GFX9-NO-DS128-NEXT: buffer_store_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v54, 16, v32 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v53, v32, 0, 16 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v32, 16, v31 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v31, v31, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v30 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v0, v30, 0, 16 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v30, s0 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v10 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v5, 16, v13 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 16, v12 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v15 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v2, v10, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v4, v13, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v6, v12, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v14 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v17 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v8, v15, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v10, v14, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v12, v17, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v14, v16, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v21 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v21, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v20 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v20, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v23 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v20, v23, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v22 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v22, v22, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v58, 16, v34 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v57, v34, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v34, 16, v33 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v33, v33, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v60, 16, v36 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v59, v36, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v36, 16, v35 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v35, v35, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v62, 16, v29 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v61, v29, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v29, 16, v28 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v28, v28, 0, 16 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[0:1], v[31:32] offset0:30 offset1:31 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[28:29], v[61:62] offset0:28 offset1:29 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[35:36], v[59:60] offset0:26 offset1:27 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[33:34], v[57:58] offset0:24 offset1:25 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[55:56], v[53:54] offset0:22 offset1:23 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[51:52], v[49:50] offset0:20 offset1:21 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[47:48], v[45:46] offset0:18 offset1:19 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[43:44], v[41:42] offset0:16 offset1:17 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[39:40], v[37:38] offset0:14 offset1:15 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[26:27], v[24:25] offset0:12 offset1:13 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[22:23], v[20:21] offset0:10 offset1:11 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[18:19], v[16:17] offset0:8 offset1:9 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[14:15], v[12:13] offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[10:11], v[8:9] offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[6:7], v[4:5] offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: buffer_load_dword v0, off, s[12:15], 0 ; 4-byte Folded Reload -; GFX9-NO-DS128-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload -; GFX9-NO-DS128-NEXT: s_waitcnt vmcnt(0) -; GFX9-NO-DS128-NEXT: ds_write2_b64 v30, v[2:3], v[0:1] offset1:1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v29, s1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[1:4], v29 offset0:14 offset1:15 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[5:8], v29 offset0:12 offset1:13 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[9:12], v29 offset0:10 offset1:11 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[13:16], v29 offset0:8 offset1:9 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v0, s0 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[17:20], v29 offset1:1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[21:24], v29 offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[25:28], v29 offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[29:32], v29 offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(7) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v34, 16, v4 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v36, 16, v3 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v33, v4, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v35, v3, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[35:36], v[33:34] offset0:30 offset1:31 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v2 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v34, 16, v1 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v33, v1, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[33:34], v[2:3] offset0:28 offset1:29 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(8) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v8 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v1, v8, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v7 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v7, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:26 offset1:27 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v6 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v1, v6, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v5 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v5, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:24 offset1:25 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(9) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v12 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v1, v12, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v11 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v11, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:22 offset1:23 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v10 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v1, v10, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v9 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v9, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:20 offset1:21 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(10) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v1, v16, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v15 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v15, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:18 offset1:19 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v14 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v1, v14, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v13 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v13, 0, 16 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(8) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v12, 16, v28 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v14, 16, v27 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v11, v28, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v13, v27, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v16, 16, v26 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v27, 16, v25 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v15, v26, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v26, v25, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset0:16 offset1:17 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(8) +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v32 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v31 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v32, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v5, v31, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v8, 16, v30 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v10, 16, v29 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v7, v30, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v9, v29, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[13:14], v[11:12] offset0:10 offset1:11 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v14, 16, v24 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[26:27], v[15:16] offset0:8 offset1:9 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v16, 16, v23 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v13, v24, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v15, v23, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v18 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[5:6], v[3:4] offset0:14 offset1:15 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v17 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v20 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[9:10], v[7:8] offset0:12 offset1:13 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v8, 16, v19 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v10, 16, v22 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v12, 16, v21 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v1, v18, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v17, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v5, v20, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v7, v19, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v9, v22, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v11, v21, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[15:16], v[13:14] offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[11:12], v[9:10] offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[7:8], v[5:6] offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v0, v[3:4], v[1:2] offset1:1 ; GFX9-NO-DS128-NEXT: s_endpgm ; ; EG-LABEL: local_sextload_v64i16_to_v64i32: @@ -4840,258 +4688,207 @@ define amdgpu_kernel void @local_sextload_v64i16_to_v64i32(ptr addrspace(3) %out ; VI-DS128-LABEL: local_sextload_v64i16_to_v64i32: ; VI-DS128: ; %bb.0: ; VI-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; VI-DS128-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0 ; VI-DS128-NEXT: s_mov_b32 m0, -1 -; VI-DS128-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1 -; VI-DS128-NEXT: s_mov_b32 s90, -1 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_mov_b32_e32 v32, s1 -; VI-DS128-NEXT: ds_read_b128 v[8:11], v32 -; VI-DS128-NEXT: ds_read_b128 v[16:19], v32 offset:16 -; VI-DS128-NEXT: ds_read_b128 v[24:27], v32 offset:32 -; VI-DS128-NEXT: ds_read_b128 v[33:36], v32 offset:48 -; VI-DS128-NEXT: s_mov_b32 s91, 0xe80000 -; VI-DS128-NEXT: s_add_u32 s88, s88, s11 -; VI-DS128-NEXT: s_addc_u32 s89, s89, 0 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(3) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v11 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v10 -; VI-DS128-NEXT: v_bfe_i32 v2, v11, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v0, v10, 0, 16 -; VI-DS128-NEXT: buffer_store_dword v0, off, s[88:91], 0 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v2, off, s[88:91], 0 offset:8 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v3, off, s[88:91], 0 offset:12 ; 4-byte Folded Spill -; VI-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v9 +; VI-DS128-NEXT: v_mov_b32_e32 v33, s1 +; VI-DS128-NEXT: ds_read_b128 v[1:4], v33 offset:112 +; VI-DS128-NEXT: ds_read_b128 v[5:8], v33 offset:96 +; VI-DS128-NEXT: ds_read_b128 v[9:12], v33 offset:80 +; VI-DS128-NEXT: ds_read_b128 v[13:16], v33 offset:64 +; VI-DS128-NEXT: v_mov_b32_e32 v0, s0 +; VI-DS128-NEXT: ds_read_b128 v[21:24], v33 offset:48 +; VI-DS128-NEXT: ds_read_b128 v[25:28], v33 offset:32 +; VI-DS128-NEXT: ds_read_b128 v[29:32], v33 offset:16 +; VI-DS128-NEXT: ds_read_b128 v[33:36], v33 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(7) +; VI-DS128-NEXT: v_ashrrev_i32_e32 v20, 16, v2 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v18, 16, v1 +; VI-DS128-NEXT: v_bfe_i32 v19, v2, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v17, v1, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v0, v[17:20] offset:224 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v20, 16, v4 +; VI-DS128-NEXT: v_bfe_i32 v19, v4, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v18, 16, v3 +; VI-DS128-NEXT: v_bfe_i32 v17, v3, 0, 16 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(7) +; VI-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v6 +; VI-DS128-NEXT: v_bfe_i32 v3, v6, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v5 +; VI-DS128-NEXT: v_bfe_i32 v1, v5, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:192 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v8 -; VI-DS128-NEXT: v_bfe_i32 v5, v9, 0, 16 ; VI-DS128-NEXT: v_bfe_i32 v3, v8, 0, 16 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(2) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v19 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v18 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v17 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v16 -; VI-DS128-NEXT: v_bfe_i32 v10, v19, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v8, v18, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v14, v17, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v12, v16, 0, 16 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v27 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v26 -; VI-DS128-NEXT: v_bfe_i32 v18, v27, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v16, v26, 0, 16 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v27, 16, v36 -; VI-DS128-NEXT: v_bfe_i32 v26, v36, 0, 16 -; VI-DS128-NEXT: ds_read_b128 v[36:39], v32 offset:64 -; VI-DS128-NEXT: ds_read_b128 v[40:43], v32 offset:80 -; VI-DS128-NEXT: ds_read_b128 v[56:59], v32 offset:96 -; VI-DS128-NEXT: buffer_store_dword v3, off, s[88:91], 0 offset:16 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v4, off, s[88:91], 0 offset:20 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v5, off, s[88:91], 0 offset:24 ; 4-byte Folded Spill -; VI-DS128-NEXT: buffer_store_dword v6, off, s[88:91], 0 offset:28 ; 4-byte Folded Spill -; VI-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v25 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(2) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v47, 16, v39 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v45, 16, v38 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v51, 16, v37 -; VI-DS128-NEXT: v_bfe_i32 v46, v39, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v44, v38, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v50, v37, 0, 16 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v53, 16, v40 -; VI-DS128-NEXT: v_bfe_i32 v52, v40, 0, 16 -; VI-DS128-NEXT: ds_read_b128 v[37:40], v32 offset:112 -; VI-DS128-NEXT: v_mov_b32_e32 v32, s0 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v24 -; VI-DS128-NEXT: v_bfe_i32 v22, v25, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v20, v24, 0, 16 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v38 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v37 -; VI-DS128-NEXT: v_bfe_i32 v2, v38, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v0, v37, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v25, 16, v35 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v31, 16, v34 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v29, 16, v33 -; VI-DS128-NEXT: v_bfe_i32 v24, v35, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v30, v34, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v28, v33, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v49, 16, v36 -; VI-DS128-NEXT: v_bfe_i32 v48, v36, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v36, 16, v43 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v34, 16, v42 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v55, 16, v41 -; VI-DS128-NEXT: v_bfe_i32 v35, v43, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v33, v42, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v54, v41, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v62, 16, v59 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v60, 16, v58 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v7, 16, v57 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v5, 16, v56 -; VI-DS128-NEXT: v_bfe_i32 v61, v59, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v59, v58, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v6, v57, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v4, v56, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v43, 16, v40 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v41, 16, v39 -; VI-DS128-NEXT: v_bfe_i32 v42, v40, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v40, v39, 0, 16 -; VI-DS128-NEXT: ds_write_b128 v32, v[0:3] offset:224 -; VI-DS128-NEXT: ds_write_b128 v32, v[40:43] offset:240 -; VI-DS128-NEXT: ds_write_b128 v32, v[4:7] offset:192 -; VI-DS128-NEXT: ds_write_b128 v32, v[59:62] offset:208 -; VI-DS128-NEXT: ds_write_b128 v32, v[52:55] offset:160 -; VI-DS128-NEXT: ds_write_b128 v32, v[33:36] offset:176 -; VI-DS128-NEXT: ds_write_b128 v32, v[48:51] offset:128 -; VI-DS128-NEXT: ds_write_b128 v32, v[44:47] offset:144 -; VI-DS128-NEXT: ds_write_b128 v32, v[28:31] offset:96 -; VI-DS128-NEXT: ds_write_b128 v32, v[24:27] offset:112 -; VI-DS128-NEXT: ds_write_b128 v32, v[20:23] offset:64 -; VI-DS128-NEXT: ds_write_b128 v32, v[16:19] offset:80 -; VI-DS128-NEXT: ds_write_b128 v32, v[12:15] offset:32 -; VI-DS128-NEXT: ds_write_b128 v32, v[8:11] offset:48 -; VI-DS128-NEXT: buffer_load_dword v0, off, s[88:91], 0 offset:16 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:20 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v2, off, s[88:91], 0 offset:24 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v3, off, s[88:91], 0 offset:28 ; 4-byte Folded Reload -; VI-DS128-NEXT: s_waitcnt vmcnt(0) -; VI-DS128-NEXT: ds_write_b128 v32, v[0:3] -; VI-DS128-NEXT: buffer_load_dword v0, off, s[88:91], 0 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v1, off, s[88:91], 0 offset:4 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v2, off, s[88:91], 0 offset:8 ; 4-byte Folded Reload -; VI-DS128-NEXT: buffer_load_dword v3, off, s[88:91], 0 offset:12 ; 4-byte Folded Reload -; VI-DS128-NEXT: s_waitcnt vmcnt(0) -; VI-DS128-NEXT: ds_write_b128 v32, v[0:3] offset:16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v7 +; VI-DS128-NEXT: v_bfe_i32 v1, v7, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:208 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(8) +; VI-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v10 +; VI-DS128-NEXT: v_bfe_i32 v3, v10, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v9 +; VI-DS128-NEXT: v_bfe_i32 v1, v9, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:160 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v12 +; VI-DS128-NEXT: v_bfe_i32 v3, v12, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v11 +; VI-DS128-NEXT: v_bfe_i32 v1, v11, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:176 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(9) +; VI-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v14 +; VI-DS128-NEXT: v_bfe_i32 v3, v14, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v13 +; VI-DS128-NEXT: v_bfe_i32 v1, v13, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:128 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v16 +; VI-DS128-NEXT: v_bfe_i32 v3, v16, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v15 +; VI-DS128-NEXT: v_bfe_i32 v1, v15, 0, 16 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(8) +; VI-DS128-NEXT: v_ashrrev_i32_e32 v16, 16, v26 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v14, 16, v25 +; VI-DS128-NEXT: v_bfe_i32 v15, v26, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v13, v25, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v0, v[17:20] offset:240 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v8, 16, v22 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v21 +; VI-DS128-NEXT: v_bfe_i32 v7, v22, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v5, v21, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v12, 16, v24 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v10, 16, v23 +; VI-DS128-NEXT: v_bfe_i32 v11, v24, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v9, v23, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v0, v[13:16] offset:64 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(9) +; VI-DS128-NEXT: v_ashrrev_i32_e32 v16, 16, v30 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v20, 16, v28 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v18, 16, v27 +; VI-DS128-NEXT: v_bfe_i32 v19, v28, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v17, v27, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v14, 16, v29 +; VI-DS128-NEXT: v_bfe_i32 v15, v30, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v13, v29, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:144 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(9) +; VI-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v36 +; VI-DS128-NEXT: ds_write_b128 v0, v[5:8] offset:96 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v35 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v8, 16, v34 +; VI-DS128-NEXT: ds_write_b128 v0, v[9:12] offset:112 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v33 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v12, 16, v32 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v10, 16, v31 +; VI-DS128-NEXT: ds_write_b128 v0, v[17:20] offset:80 +; VI-DS128-NEXT: v_bfe_i32 v3, v36, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v1, v35, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v7, v34, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v5, v33, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v11, v32, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v9, v31, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v0, v[13:16] offset:32 +; VI-DS128-NEXT: ds_write_b128 v0, v[9:12] offset:48 +; VI-DS128-NEXT: ds_write_b128 v0, v[5:8] +; VI-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:16 ; VI-DS128-NEXT: s_endpgm ; ; GFX9-DS128-LABEL: local_sextload_v64i16_to_v64i32: ; GFX9-DS128: ; %bb.0: ; GFX9-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; GFX9-DS128-NEXT: s_mov_b32 s12, SCRATCH_RSRC_DWORD0 -; GFX9-DS128-NEXT: s_mov_b32 s13, SCRATCH_RSRC_DWORD1 -; GFX9-DS128-NEXT: s_mov_b32 s14, -1 -; GFX9-DS128-NEXT: s_mov_b32 s15, 0xe00000 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_mov_b32_e32 v32, s1 -; GFX9-DS128-NEXT: ds_read_b128 v[8:11], v32 -; GFX9-DS128-NEXT: ds_read_b128 v[16:19], v32 offset:16 -; GFX9-DS128-NEXT: ds_read_b128 v[24:27], v32 offset:32 -; GFX9-DS128-NEXT: ds_read_b128 v[33:36], v32 offset:48 -; GFX9-DS128-NEXT: s_add_u32 s12, s12, s11 -; GFX9-DS128-NEXT: s_addc_u32 s13, s13, 0 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(3) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v11 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v10 -; GFX9-DS128-NEXT: v_bfe_i32 v2, v11, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v0, v10, 0, 16 -; GFX9-DS128-NEXT: buffer_store_dword v0, off, s[12:15], 0 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: s_nop 0 -; GFX9-DS128-NEXT: buffer_store_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: buffer_store_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: buffer_store_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v9 +; GFX9-DS128-NEXT: v_mov_b32_e32 v33, s1 +; GFX9-DS128-NEXT: ds_read_b128 v[1:4], v33 offset:112 +; GFX9-DS128-NEXT: ds_read_b128 v[5:8], v33 offset:96 +; GFX9-DS128-NEXT: ds_read_b128 v[9:12], v33 offset:80 +; GFX9-DS128-NEXT: ds_read_b128 v[13:16], v33 offset:64 +; GFX9-DS128-NEXT: v_mov_b32_e32 v0, s0 +; GFX9-DS128-NEXT: ds_read_b128 v[21:24], v33 +; GFX9-DS128-NEXT: ds_read_b128 v[25:28], v33 offset:16 +; GFX9-DS128-NEXT: ds_read_b128 v[29:32], v33 offset:32 +; GFX9-DS128-NEXT: ds_read_b128 v[33:36], v33 offset:48 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(7) +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v20, 16, v2 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v18, 16, v1 +; GFX9-DS128-NEXT: v_bfe_i32 v19, v2, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v17, v1, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[17:20] offset:224 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v20, 16, v4 +; GFX9-DS128-NEXT: v_bfe_i32 v19, v4, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v18, 16, v3 +; GFX9-DS128-NEXT: v_bfe_i32 v17, v3, 0, 16 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(7) +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v6 +; GFX9-DS128-NEXT: v_bfe_i32 v3, v6, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v5 +; GFX9-DS128-NEXT: v_bfe_i32 v1, v5, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:192 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v8 -; GFX9-DS128-NEXT: v_bfe_i32 v5, v9, 0, 16 ; GFX9-DS128-NEXT: v_bfe_i32 v3, v8, 0, 16 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(2) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v11, 16, v19 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v9, 16, v18 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v15, 16, v17 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v13, 16, v16 -; GFX9-DS128-NEXT: v_bfe_i32 v10, v19, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v8, v18, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v14, v17, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v12, v16, 0, 16 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v19, 16, v27 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v17, 16, v26 -; GFX9-DS128-NEXT: v_bfe_i32 v18, v27, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v16, v26, 0, 16 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v27, 16, v36 -; GFX9-DS128-NEXT: v_bfe_i32 v26, v36, 0, 16 -; GFX9-DS128-NEXT: ds_read_b128 v[36:39], v32 offset:64 -; GFX9-DS128-NEXT: ds_read_b128 v[40:43], v32 offset:80 -; GFX9-DS128-NEXT: ds_read_b128 v[56:59], v32 offset:96 -; GFX9-DS128-NEXT: buffer_store_dword v3, off, s[12:15], 0 offset:16 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: s_nop 0 -; GFX9-DS128-NEXT: buffer_store_dword v4, off, s[12:15], 0 offset:20 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: buffer_store_dword v5, off, s[12:15], 0 offset:24 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: buffer_store_dword v6, off, s[12:15], 0 offset:28 ; 4-byte Folded Spill -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v23, 16, v25 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(2) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v47, 16, v39 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v45, 16, v38 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v51, 16, v37 -; GFX9-DS128-NEXT: v_bfe_i32 v46, v39, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v44, v38, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v50, v37, 0, 16 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v53, 16, v40 -; GFX9-DS128-NEXT: v_bfe_i32 v52, v40, 0, 16 -; GFX9-DS128-NEXT: ds_read_b128 v[37:40], v32 offset:112 -; GFX9-DS128-NEXT: v_mov_b32_e32 v32, s0 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v21, 16, v24 -; GFX9-DS128-NEXT: v_bfe_i32 v22, v25, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v20, v24, 0, 16 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v3, 16, v38 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v1, 16, v37 -; GFX9-DS128-NEXT: v_bfe_i32 v2, v38, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v0, v37, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v25, 16, v35 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v31, 16, v34 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v29, 16, v33 -; GFX9-DS128-NEXT: v_bfe_i32 v24, v35, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v30, v34, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v28, v33, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v49, 16, v36 -; GFX9-DS128-NEXT: v_bfe_i32 v48, v36, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v36, 16, v43 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v34, 16, v42 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v55, 16, v41 -; GFX9-DS128-NEXT: v_bfe_i32 v35, v43, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v33, v42, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v54, v41, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v62, 16, v59 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v60, 16, v58 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v7, 16, v57 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v5, 16, v56 -; GFX9-DS128-NEXT: v_bfe_i32 v61, v59, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v59, v58, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v6, v57, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v4, v56, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v43, 16, v40 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v41, 16, v39 -; GFX9-DS128-NEXT: v_bfe_i32 v42, v40, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v40, v39, 0, 16 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[0:3] offset:224 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[40:43] offset:240 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[4:7] offset:192 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[59:62] offset:208 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[52:55] offset:160 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[33:36] offset:176 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[48:51] offset:128 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[44:47] offset:144 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[28:31] offset:96 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[24:27] offset:112 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[20:23] offset:64 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[16:19] offset:80 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[12:15] offset:32 -; GFX9-DS128-NEXT: ds_write_b128 v32, v[8:11] offset:48 -; GFX9-DS128-NEXT: buffer_load_dword v0, off, s[12:15], 0 offset:16 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:20 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v2, off, s[12:15], 0 offset:24 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v3, off, s[12:15], 0 offset:28 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: s_waitcnt vmcnt(0) -; GFX9-DS128-NEXT: ds_write_b128 v32, v[0:3] -; GFX9-DS128-NEXT: buffer_load_dword v0, off, s[12:15], 0 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: buffer_load_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Reload -; GFX9-DS128-NEXT: s_waitcnt vmcnt(0) -; GFX9-DS128-NEXT: ds_write_b128 v32, v[0:3] offset:16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v7 +; GFX9-DS128-NEXT: v_bfe_i32 v1, v7, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:208 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(8) +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v10 +; GFX9-DS128-NEXT: v_bfe_i32 v3, v10, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v9 +; GFX9-DS128-NEXT: v_bfe_i32 v1, v9, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:160 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v12 +; GFX9-DS128-NEXT: v_bfe_i32 v3, v12, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v11 +; GFX9-DS128-NEXT: v_bfe_i32 v1, v11, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:176 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(9) +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v14 +; GFX9-DS128-NEXT: v_bfe_i32 v3, v14, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v13 +; GFX9-DS128-NEXT: v_bfe_i32 v1, v13, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:128 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v16 +; GFX9-DS128-NEXT: v_bfe_i32 v3, v16, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v15 +; GFX9-DS128-NEXT: v_bfe_i32 v1, v15, 0, 16 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(7) +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v16, 16, v30 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 16, v29 +; GFX9-DS128-NEXT: v_bfe_i32 v15, v30, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v13, v29, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[17:20] offset:240 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(7) +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v8, 16, v34 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v33 +; GFX9-DS128-NEXT: v_bfe_i32 v7, v34, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v5, v33, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v12, 16, v36 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v10, 16, v35 +; GFX9-DS128-NEXT: v_bfe_i32 v11, v36, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v9, v35, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[13:16] offset:64 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v16, 16, v26 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v20, 16, v32 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v18, 16, v31 +; GFX9-DS128-NEXT: v_bfe_i32 v19, v32, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v17, v31, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 16, v25 +; GFX9-DS128-NEXT: v_bfe_i32 v15, v26, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v13, v25, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:144 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v4, 16, v24 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[5:8] offset:96 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v2, 16, v23 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v8, 16, v22 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[9:12] offset:112 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v6, 16, v21 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v12, 16, v28 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v10, 16, v27 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[17:20] offset:80 +; GFX9-DS128-NEXT: v_bfe_i32 v3, v24, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v1, v23, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v7, v22, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v5, v21, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v11, v28, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v9, v27, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[13:16] offset:32 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[9:12] offset:48 +; GFX9-DS128-NEXT: ds_write_b128 v0, v[5:8] +; GFX9-DS128-NEXT: ds_write_b128 v0, v[1:4] offset:16 ; GFX9-DS128-NEXT: s_endpgm %load = load <64 x i16>, ptr addrspace(3) %in %ext = sext <64 x i16> %load to <64 x i32> @@ -6392,45 +6189,50 @@ define amdgpu_kernel void @local_zextload_v16i16_to_v16i64(ptr addrspace(3) %out ; SI-NEXT: s_mov_b32 m0, -1 ; SI-NEXT: v_mov_b32_e32 v9, 0 ; SI-NEXT: v_mov_b32_e32 v15, v9 -; SI-NEXT: v_mov_b32_e32 v17, v9 +; SI-NEXT: v_mov_b32_e32 v20, v9 ; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: v_mov_b32_e32 v4, s1 ; SI-NEXT: ds_read2_b64 v[0:3], v4 offset1:1 ; SI-NEXT: ds_read2_b64 v[4:7], v4 offset0:2 offset1:3 -; SI-NEXT: v_mov_b32_e32 v18, s0 +; SI-NEXT: v_mov_b32_e32 v24, s0 ; SI-NEXT: v_mov_b32_e32 v13, v9 ; SI-NEXT: v_mov_b32_e32 v11, v9 ; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v1 +; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v3 ; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v5 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v5 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v5 ; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v7 -; SI-NEXT: ds_write2_b64 v18, v[16:17], v[14:15] offset0:10 offset1:11 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v7 -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v3 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v4 +; SI-NEXT: ds_write2_b64 v24, v[19:20], v[14:15] offset0:10 offset1:11 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v2 -; SI-NEXT: ds_write2_b64 v18, v[14:15], v[12:13] offset0:14 offset1:15 -; SI-NEXT: v_and_b32_e32 v12, 0xffff, v3 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v2 +; SI-NEXT: v_and_b32_e32 v2, 0xffff, v3 +; SI-NEXT: v_and_b32_e32 v3, 0xffff, v7 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v4 +; SI-NEXT: v_mov_b32_e32 v4, v9 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v6 +; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6 +; SI-NEXT: ds_write2_b64 v24, v[3:4], v[12:13] offset0:14 offset1:15 +; SI-NEXT: v_mov_b32_e32 v7, v9 +; SI-NEXT: v_mov_b32_e32 v3, v9 +; SI-NEXT: v_mov_b32_e32 v19, v9 +; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v1 ; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v2 +; SI-NEXT: v_mov_b32_e32 v23, v9 +; SI-NEXT: ds_write2_b64 v24, v[2:3], v[10:11] offset0:6 offset1:7 +; SI-NEXT: v_mov_b32_e32 v21, v9 ; SI-NEXT: v_mov_b32_e32 v2, v9 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v0 -; SI-NEXT: ds_write2_b64 v18, v[12:13], v[10:11] offset0:6 offset1:7 +; SI-NEXT: v_mov_b32_e32 v17, v9 +; SI-NEXT: ds_write2_b64 v24, v[6:7], v[18:19] offset0:12 offset1:13 +; SI-NEXT: v_mov_b32_e32 v6, v9 +; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v0 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v4 -; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v6 -; SI-NEXT: v_and_b32_e32 v14, 0xffff, v6 -; SI-NEXT: v_and_b32_e32 v16, 0xffff, v4 -; SI-NEXT: ds_write2_b64 v18, v[1:2], v[8:9] offset0:2 offset1:3 -; SI-NEXT: v_mov_b32_e32 v4, v9 +; SI-NEXT: ds_write2_b64 v24, v[1:2], v[8:9] offset0:2 offset1:3 ; SI-NEXT: v_mov_b32_e32 v1, v9 -; SI-NEXT: v_mov_b32_e32 v6, v9 -; SI-NEXT: v_mov_b32_e32 v8, v9 -; SI-NEXT: ds_write2_b64 v18, v[16:17], v[10:11] offset0:8 offset1:9 -; SI-NEXT: ds_write2_b64 v18, v[14:15], v[12:13] offset0:12 offset1:13 -; SI-NEXT: ds_write2_b64 v18, v[3:4], v[5:6] offset0:4 offset1:5 -; SI-NEXT: ds_write2_b64 v18, v[0:1], v[7:8] offset1:1 +; SI-NEXT: ds_write2_b64 v24, v[22:23], v[16:17] offset0:8 offset1:9 +; SI-NEXT: ds_write2_b64 v24, v[20:21], v[5:6] offset0:4 offset1:5 +; SI-NEXT: ds_write2_b64 v24, v[0:1], v[14:15] offset1:1 ; SI-NEXT: s_endpgm ; ; VI-NO-DS128-LABEL: local_zextload_v16i16_to_v16i64: @@ -6438,96 +6240,104 @@ define amdgpu_kernel void @local_zextload_v16i16_to_v16i64(ptr addrspace(3) %out ; VI-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-NO-DS128-NEXT: s_mov_b32 m0, -1 ; VI-NO-DS128-NEXT: v_mov_b32_e32 v8, 0 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v10, v8 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v13, v8 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v21, v8 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v18, v8 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) ; VI-NO-DS128-NEXT: v_mov_b32_e32 v4, s1 ; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v4 offset1:1 ; VI-NO-DS128-NEXT: ds_read2_b64 v[4:7], v4 offset0:2 offset1:3 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v14, s0 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v14, v8 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v0 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v3 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v5 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v5 -; VI-NO-DS128-NEXT: ds_write2_b64 v14, v[12:13], v[9:10] offset0:10 offset1:11 -; VI-NO-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v6 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v6 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v6, v8 -; VI-NO-DS128-NEXT: ds_write2_b64 v14, v[5:6], v[9:10] offset0:12 offset1:13 -; VI-NO-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v7 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v7 -; VI-NO-DS128-NEXT: ds_write2_b64 v14, v[5:6], v[9:10] offset0:14 offset1:15 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v3 -; VI-NO-DS128-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; VI-NO-DS128-NEXT: v_and_b32_e32 v13, 0xffff, v7 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v7 +; VI-NO-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v5 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v5 +; VI-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v4 ; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v4 -; VI-NO-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v4 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v5, s0 +; VI-NO-DS128-NEXT: ds_write2_b64 v5, v[20:21], v[7:8] offset0:8 offset1:9 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v20, v8 +; VI-NO-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v6 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v6 +; VI-NO-DS128-NEXT: ds_write2_b64 v5, v[17:18], v[19:20] offset0:10 offset1:11 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v7, v8 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v17, v8 +; VI-NO-DS128-NEXT: ds_write2_b64 v5, v[16:17], v[6:7] offset0:12 offset1:13 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v16, v8 +; VI-NO-DS128-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; VI-NO-DS128-NEXT: ds_write2_b64 v5, v[13:14], v[15:16] offset0:14 offset1:15 ; VI-NO-DS128-NEXT: v_mov_b32_e32 v4, v8 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v2 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v13, v8 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v2 ; VI-NO-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; VI-NO-DS128-NEXT: ds_write2_b64 v14, v[12:13], v[7:8] offset0:8 offset1:9 -; VI-NO-DS128-NEXT: ds_write2_b64 v14, v[3:4], v[9:10] offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_write2_b64 v5, v[3:4], v[12:13] offset0:6 offset1:7 ; VI-NO-DS128-NEXT: v_mov_b32_e32 v3, v8 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v7, v8 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v12, v8 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v1 ; VI-NO-DS128-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; VI-NO-DS128-NEXT: ds_write2_b64 v14, v[2:3], v[6:7] offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_write2_b64 v5, v[2:3], v[11:12] offset0:4 offset1:5 ; VI-NO-DS128-NEXT: v_mov_b32_e32 v2, v8 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v6, v8 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v11, v8 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v0 ; VI-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; VI-NO-DS128-NEXT: ds_write2_b64 v14, v[1:2], v[5:6] offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_write2_b64 v5, v[1:2], v[10:11] offset0:2 offset1:3 ; VI-NO-DS128-NEXT: v_mov_b32_e32 v1, v8 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v12, v8 -; VI-NO-DS128-NEXT: ds_write2_b64 v14, v[0:1], v[11:12] offset1:1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v10, v8 +; VI-NO-DS128-NEXT: ds_write2_b64 v5, v[0:1], v[9:10] offset1:1 ; VI-NO-DS128-NEXT: s_endpgm ; ; GFX9-NO-DS128-LABEL: local_zextload_v16i16_to_v16i64: ; GFX9-NO-DS128: ; %bb.0: ; GFX9-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v8, 0 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v10, v8 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v12, v8 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v21, v8 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v18, v8 ; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v14, v8 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v4, s1 ; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v4 offset1:1 ; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v4 offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v15, s0 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v0 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v3 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v5 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[11:12], v[9:10] offset0:10 offset1:11 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v6 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v6 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v6, v8 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[5:6], v[9:10] offset0:12 offset1:13 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v7 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v7 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[5:6], v[9:10] offset0:14 offset1:15 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v13, 0xffff, v7 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v7 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v5 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v5 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v4 ; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v4 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v4 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v11, v8 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v3 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v5, s0 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v5, v[20:21], v[7:8] offset0:8 offset1:9 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v20, v8 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v6 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v6 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v5, v[17:18], v[19:20] offset0:10 offset1:11 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v7, v8 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v17, v8 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v5, v[16:17], v[6:7] offset0:12 offset1:13 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v16, v8 ; GFX9-NO-DS128-NEXT: v_and_b32_e32 v3, 0xffff, v3 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[10:11], v[7:8] offset0:8 offset1:9 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v5, v[13:14], v[15:16] offset0:14 offset1:15 ; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v4, v8 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v10, v8 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v2 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v13, v8 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v2 ; GFX9-NO-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v2 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[3:4], v[9:10] offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v5, v[3:4], v[12:13] offset0:6 offset1:7 ; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v3, v8 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v7, v8 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v12, v8 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v1 ; GFX9-NO-DS128-NEXT: v_and_b32_e32 v1, 0xffff, v1 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[2:3], v[6:7] offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v5, v[2:3], v[11:12] offset0:4 offset1:5 ; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v2, v8 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v6, v8 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v11, v8 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v0 ; GFX9-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v0 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[1:2], v[5:6] offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v5, v[1:2], v[10:11] offset0:2 offset1:3 ; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v1, v8 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[0:1], v[13:14] offset1:1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v10, v8 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v5, v[0:1], v[9:10] offset1:1 ; GFX9-NO-DS128-NEXT: s_endpgm ; ; EG-LABEL: local_zextload_v16i16_to_v16i64: @@ -6684,105 +6494,105 @@ define amdgpu_kernel void @local_zextload_v16i16_to_v16i64(ptr addrspace(3) %out ; VI-DS128: ; %bb.0: ; VI-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-DS128-NEXT: s_mov_b32 m0, -1 -; VI-DS128-NEXT: v_mov_b32_e32 v26, 0 -; VI-DS128-NEXT: v_mov_b32_e32 v22, v26 -; VI-DS128-NEXT: v_mov_b32_e32 v24, v26 +; VI-DS128-NEXT: v_mov_b32_e32 v8, 0 +; VI-DS128-NEXT: v_mov_b32_e32 v24, v8 +; VI-DS128-NEXT: v_mov_b32_e32 v26, v8 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_mov_b32_e32 v5, s1 -; VI-DS128-NEXT: ds_read_b128 v[0:3], v5 -; VI-DS128-NEXT: ds_read_b128 v[13:16], v5 offset:16 -; VI-DS128-NEXT: v_mov_b32_e32 v11, v26 -; VI-DS128-NEXT: v_mov_b32_e32 v19, v26 -; VI-DS128-NEXT: v_mov_b32_e32 v8, v26 +; VI-DS128-NEXT: v_mov_b32_e32 v4, s1 +; VI-DS128-NEXT: ds_read_b128 v[0:3], v4 +; VI-DS128-NEXT: ds_read_b128 v[4:7], v4 offset:16 +; VI-DS128-NEXT: v_mov_b32_e32 v27, s0 +; VI-DS128-NEXT: v_mov_b32_e32 v21, v8 +; VI-DS128-NEXT: v_mov_b32_e32 v18, v8 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v2 -; VI-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v2 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v2 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v13 -; VI-DS128-NEXT: v_and_b32_e32 v21, 0xffff, v13 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v27, 16, v14 -; VI-DS128-NEXT: v_and_b32_e32 v25, 0xffff, v14 -; VI-DS128-NEXT: v_mov_b32_e32 v14, s0 -; VI-DS128-NEXT: v_mov_b32_e32 v13, v26 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v1 -; VI-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v1 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v16 -; VI-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v16 -; VI-DS128-NEXT: ds_write_b128 v14, v[21:24] offset:64 -; VI-DS128-NEXT: v_mov_b32_e32 v21, v26 -; VI-DS128-NEXT: ds_write_b128 v14, v[10:13] offset:32 -; VI-DS128-NEXT: v_mov_b32_e32 v10, v26 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v0 -; VI-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v0 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v7 +; VI-DS128-NEXT: v_and_b32_e32 v23, 0xffff, v7 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v22, 16, v6 +; VI-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v6 +; VI-DS128-NEXT: ds_write_b128 v27, v[23:26] offset:112 +; VI-DS128-NEXT: v_mov_b32_e32 v23, v8 +; VI-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v2 +; VI-DS128-NEXT: ds_write_b128 v27, v[20:23] offset:96 +; VI-DS128-NEXT: v_mov_b32_e32 v20, v8 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v1 +; VI-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v1 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v5 +; VI-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v5 +; VI-DS128-NEXT: v_mov_b32_e32 v10, v8 +; VI-DS128-NEXT: ds_write_b128 v27, v[17:20] offset:32 +; VI-DS128-NEXT: v_mov_b32_e32 v15, v8 +; VI-DS128-NEXT: v_mov_b32_e32 v17, v8 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v0 +; VI-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v0 ; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v3 ; VI-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v3 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v15 -; VI-DS128-NEXT: v_and_b32_e32 v15, 0xffff, v15 -; VI-DS128-NEXT: ds_write_b128 v14, v[18:21] offset:112 -; VI-DS128-NEXT: v_mov_b32_e32 v16, v26 -; VI-DS128-NEXT: v_mov_b32_e32 v18, v26 -; VI-DS128-NEXT: v_mov_b32_e32 v1, v26 -; VI-DS128-NEXT: v_mov_b32_e32 v3, v26 -; VI-DS128-NEXT: v_mov_b32_e32 v28, v26 -; VI-DS128-NEXT: ds_write_b128 v14, v[7:10] offset:16 -; VI-DS128-NEXT: v_mov_b32_e32 v5, v26 -; VI-DS128-NEXT: v_mov_b32_e32 v7, v26 -; VI-DS128-NEXT: ds_write_b128 v14, v[15:18] offset:96 -; VI-DS128-NEXT: ds_write_b128 v14, v[0:3] offset:48 -; VI-DS128-NEXT: ds_write_b128 v14, v[25:28] offset:80 -; VI-DS128-NEXT: ds_write_b128 v14, v[4:7] +; VI-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v4 +; VI-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; VI-DS128-NEXT: ds_write_b128 v27, v[7:10] offset:80 +; VI-DS128-NEXT: v_mov_b32_e32 v5, v8 +; VI-DS128-NEXT: v_mov_b32_e32 v7, v8 +; VI-DS128-NEXT: v_mov_b32_e32 v1, v8 +; VI-DS128-NEXT: v_mov_b32_e32 v3, v8 +; VI-DS128-NEXT: ds_write_b128 v27, v[14:17] offset:16 +; VI-DS128-NEXT: v_mov_b32_e32 v12, v8 +; VI-DS128-NEXT: v_mov_b32_e32 v14, v8 +; VI-DS128-NEXT: ds_write_b128 v27, v[4:7] offset:64 +; VI-DS128-NEXT: ds_write_b128 v27, v[0:3] offset:48 +; VI-DS128-NEXT: ds_write_b128 v27, v[11:14] ; VI-DS128-NEXT: s_endpgm ; ; GFX9-DS128-LABEL: local_zextload_v16i16_to_v16i64: ; GFX9-DS128: ; %bb.0: ; GFX9-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; GFX9-DS128-NEXT: v_mov_b32_e32 v25, 0 -; GFX9-DS128-NEXT: v_mov_b32_e32 v21, v25 -; GFX9-DS128-NEXT: v_mov_b32_e32 v23, v25 -; GFX9-DS128-NEXT: v_mov_b32_e32 v18, v25 +; GFX9-DS128-NEXT: v_mov_b32_e32 v4, 0 +; GFX9-DS128-NEXT: v_mov_b32_e32 v25, v4 +; GFX9-DS128-NEXT: v_mov_b32_e32 v27, v4 +; GFX9-DS128-NEXT: v_mov_b32_e32 v22, v4 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_mov_b32_e32 v4, s1 -; GFX9-DS128-NEXT: ds_read_b128 v[0:3], v4 -; GFX9-DS128-NEXT: ds_read_b128 v[4:7], v4 offset:16 -; GFX9-DS128-NEXT: v_mov_b32_e32 v28, s0 -; GFX9-DS128-NEXT: v_mov_b32_e32 v15, v25 -; GFX9-DS128-NEXT: v_mov_b32_e32 v12, v25 +; GFX9-DS128-NEXT: v_mov_b32_e32 v5, s1 +; GFX9-DS128-NEXT: ds_read_b128 v[0:3], v5 +; GFX9-DS128-NEXT: ds_read_b128 v[5:8], v5 offset:16 +; GFX9-DS128-NEXT: v_mov_b32_e32 v19, v4 +; GFX9-DS128-NEXT: v_mov_b32_e32 v16, v4 +; GFX9-DS128-NEXT: v_mov_b32_e32 v13, v4 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v2 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v2 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v22, 16, v7 -; GFX9-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v7 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v6 -; GFX9-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v6 -; GFX9-DS128-NEXT: ds_write_b128 v28, v[20:23] offset:112 -; GFX9-DS128-NEXT: v_mov_b32_e32 v20, v25 -; GFX9-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v2 -; GFX9-DS128-NEXT: ds_write_b128 v28, v[17:20] offset:96 -; GFX9-DS128-NEXT: v_mov_b32_e32 v17, v25 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v1 -; GFX9-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v1 -; GFX9-DS128-NEXT: ds_write_b128 v28, v[14:17] offset:32 -; GFX9-DS128-NEXT: v_mov_b32_e32 v14, v25 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v0 -; GFX9-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v0 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v3 -; GFX9-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v3 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v4 -; GFX9-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v4 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v7 +; GFX9-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v7 ; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v26, 16, v5 ; GFX9-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v5 -; GFX9-DS128-NEXT: v_mov_b32_e32 v5, v25 -; GFX9-DS128-NEXT: v_mov_b32_e32 v7, v25 -; GFX9-DS128-NEXT: v_mov_b32_e32 v1, v25 -; GFX9-DS128-NEXT: v_mov_b32_e32 v3, v25 -; GFX9-DS128-NEXT: v_mov_b32_e32 v27, v25 -; GFX9-DS128-NEXT: ds_write_b128 v28, v[11:14] offset:16 -; GFX9-DS128-NEXT: v_mov_b32_e32 v9, v25 -; GFX9-DS128-NEXT: v_mov_b32_e32 v11, v25 -; GFX9-DS128-NEXT: ds_write_b128 v28, v[4:7] offset:64 -; GFX9-DS128-NEXT: ds_write_b128 v28, v[0:3] offset:48 -; GFX9-DS128-NEXT: ds_write_b128 v28, v[24:27] offset:80 -; GFX9-DS128-NEXT: ds_write_b128 v28, v[8:11] +; GFX9-DS128-NEXT: v_mov_b32_e32 v7, s0 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v8 +; GFX9-DS128-NEXT: v_and_b32_e32 v21, 0xffff, v8 +; GFX9-DS128-NEXT: ds_write_b128 v7, v[24:27] offset:64 +; GFX9-DS128-NEXT: v_mov_b32_e32 v24, v4 +; GFX9-DS128-NEXT: ds_write_b128 v7, v[21:24] offset:112 +; GFX9-DS128-NEXT: v_mov_b32_e32 v21, v4 +; GFX9-DS128-NEXT: v_and_b32_e32 v15, 0xffff, v2 +; GFX9-DS128-NEXT: ds_write_b128 v7, v[18:21] offset:96 +; GFX9-DS128-NEXT: v_mov_b32_e32 v18, v4 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v0 +; GFX9-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v0 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v1 +; GFX9-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v1 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v3 +; GFX9-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v3 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v6 +; GFX9-DS128-NEXT: v_and_b32_e32 v3, 0xffff, v6 +; GFX9-DS128-NEXT: v_mov_b32_e32 v6, v4 +; GFX9-DS128-NEXT: ds_write_b128 v7, v[15:18] offset:32 +; GFX9-DS128-NEXT: v_mov_b32_e32 v15, v4 +; GFX9-DS128-NEXT: ds_write_b128 v7, v[3:6] offset:80 +; GFX9-DS128-NEXT: v_mov_b32_e32 v1, v4 +; GFX9-DS128-NEXT: v_mov_b32_e32 v3, v4 +; GFX9-DS128-NEXT: ds_write_b128 v7, v[12:15] offset:16 +; GFX9-DS128-NEXT: v_mov_b32_e32 v10, v4 +; GFX9-DS128-NEXT: v_mov_b32_e32 v12, v4 +; GFX9-DS128-NEXT: ds_write_b128 v7, v[0:3] offset:48 +; GFX9-DS128-NEXT: ds_write_b128 v7, v[9:12] ; GFX9-DS128-NEXT: s_endpgm %load = load <16 x i16>, ptr addrspace(3) %in %ext = zext <16 x i16> %load to <16 x i64> @@ -6799,53 +6609,53 @@ define amdgpu_kernel void @local_sextload_v16i16_to_v16i64(ptr addrspace(3) %out ; SI-NEXT: v_mov_b32_e32 v4, s1 ; SI-NEXT: ds_read2_b64 v[0:3], v4 offset0:2 offset1:3 ; SI-NEXT: ds_read2_b64 v[4:7], v4 offset1:1 -; SI-NEXT: v_mov_b32_e32 v19, s0 -; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_bfe_i32 v12, v3, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v11, 31, v3 -; SI-NEXT: v_ashrrev_i32_e32 v10, 16, v3 -; SI-NEXT: v_ashrrev_i32_e32 v13, 31, v12 -; SI-NEXT: ds_write2_b64 v19, v[12:13], v[10:11] offset0:14 offset1:15 -; SI-NEXT: v_bfe_i32 v12, v1, 0, 16 +; SI-NEXT: v_mov_b32_e32 v22, s0 ; SI-NEXT: s_waitcnt lgkmcnt(1) -; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v4 -; SI-NEXT: v_ashrrev_i32_e32 v11, 31, v1 -; SI-NEXT: v_ashrrev_i32_e32 v10, 16, v1 -; SI-NEXT: v_ashrrev_i32_e32 v13, 31, v12 -; SI-NEXT: ds_write2_b64 v19, v[12:13], v[10:11] offset0:10 offset1:11 -; SI-NEXT: v_bfe_i32 v12, v14, 0, 16 -; SI-NEXT: v_bfe_i32 v14, v7, 0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v0 +; SI-NEXT: v_bfe_i32 v14, v3, 0, 16 +; SI-NEXT: s_waitcnt lgkmcnt(0) +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v4 +; SI-NEXT: v_ashrrev_i32_e32 v13, 31, v3 +; SI-NEXT: v_ashrrev_i32_e32 v12, 16, v3 +; SI-NEXT: v_ashrrev_i32_e32 v15, 31, v14 +; SI-NEXT: ds_write2_b64 v22, v[14:15], v[12:13] offset0:14 offset1:15 +; SI-NEXT: v_bfe_i32 v14, v17, 0, 16 +; SI-NEXT: v_bfe_i32 v17, v1, 0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v0 +; SI-NEXT: v_ashrrev_i32_e32 v13, 31, v1 +; SI-NEXT: v_ashrrev_i32_e32 v12, 16, v1 +; SI-NEXT: v_ashrrev_i32_e32 v18, 31, v17 +; SI-NEXT: ds_write2_b64 v22, v[17:18], v[12:13] offset0:10 offset1:11 +; SI-NEXT: v_bfe_i32 v12, v20, 0, 16 +; SI-NEXT: v_bfe_i32 v20, v7, 0, 16 ; SI-NEXT: v_ashrrev_i32_e32 v11, 31, v7 ; SI-NEXT: v_ashrrev_i32_e32 v10, 16, v7 -; SI-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v6 -; SI-NEXT: ds_write2_b64 v19, v[14:15], v[10:11] offset0:6 offset1:7 -; SI-NEXT: v_bfe_i32 v14, v16, 0, 16 -; SI-NEXT: v_bfe_i32 v16, v5, 0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v2 +; SI-NEXT: v_ashrrev_i32_e32 v21, 31, v20 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v2 +; SI-NEXT: ds_write2_b64 v22, v[20:21], v[10:11] offset0:6 offset1:7 +; SI-NEXT: v_bfe_i32 v10, v5, 0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v6 ; SI-NEXT: v_ashrrev_i32_e32 v9, 31, v5 ; SI-NEXT: v_ashrrev_i32_e32 v8, 16, v5 -; SI-NEXT: v_bfe_i32 v10, v17, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; SI-NEXT: ds_write2_b64 v19, v[16:17], v[8:9] offset0:2 offset1:3 -; SI-NEXT: v_bfe_i32 v7, v18, 0, 16 -; SI-NEXT: v_bfe_i32 v16, v2, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v8, 31, v7 +; SI-NEXT: v_bfe_i32 v18, v19, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v11, 31, v10 +; SI-NEXT: v_bfe_i32 v7, v2, 0, 16 +; SI-NEXT: v_bfe_i32 v16, v16, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v19, 31, v18 ; SI-NEXT: v_bfe_i32 v3, v4, 0, 16 ; SI-NEXT: v_bfe_i32 v5, v6, 0, 16 ; SI-NEXT: v_bfe_i32 v0, v0, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; SI-NEXT: v_ashrrev_i32_e32 v13, 31, v12 -; SI-NEXT: v_ashrrev_i32_e32 v11, 31, v10 +; SI-NEXT: ds_write2_b64 v22, v[10:11], v[8:9] offset0:2 offset1:3 +; SI-NEXT: v_ashrrev_i32_e32 v8, 31, v7 ; SI-NEXT: v_ashrrev_i32_e32 v15, 31, v14 +; SI-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; SI-NEXT: v_ashrrev_i32_e32 v13, 31, v12 ; SI-NEXT: v_ashrrev_i32_e32 v4, 31, v3 ; SI-NEXT: v_ashrrev_i32_e32 v6, 31, v5 ; SI-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; SI-NEXT: ds_write2_b64 v19, v[16:17], v[7:8] offset0:12 offset1:13 -; SI-NEXT: ds_write2_b64 v19, v[0:1], v[14:15] offset0:8 offset1:9 -; SI-NEXT: ds_write2_b64 v19, v[5:6], v[10:11] offset0:4 offset1:5 -; SI-NEXT: ds_write2_b64 v19, v[3:4], v[12:13] offset1:1 +; SI-NEXT: ds_write2_b64 v22, v[7:8], v[18:19] offset0:12 offset1:13 +; SI-NEXT: ds_write2_b64 v22, v[0:1], v[12:13] offset0:8 offset1:9 +; SI-NEXT: ds_write2_b64 v22, v[5:6], v[16:17] offset0:4 offset1:5 +; SI-NEXT: ds_write2_b64 v22, v[3:4], v[14:15] offset1:1 ; SI-NEXT: s_endpgm ; ; VI-NO-DS128-LABEL: local_sextload_v16i16_to_v16i64: @@ -6856,57 +6666,57 @@ define amdgpu_kernel void @local_sextload_v16i16_to_v16i64(ptr addrspace(3) %out ; VI-NO-DS128-NEXT: v_mov_b32_e32 v4, s1 ; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v4 offset1:1 ; VI-NO-DS128-NEXT: ds_read2_b64 v[4:7], v4 offset0:2 offset1:3 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v19, s0 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v21, s0 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v3 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v3 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v4 -; VI-NO-DS128-NEXT: v_bfe_i32 v14, v14, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v4 +; VI-NO-DS128-NEXT: v_bfe_i32 v16, v16, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v18, v4, 0, 16 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v5 -; VI-NO-DS128-NEXT: ds_write2_b64 v19, v[16:17], v[14:15] offset0:8 offset1:9 -; VI-NO-DS128-NEXT: v_bfe_i32 v14, v4, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v4, v5, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; VI-NO-DS128-NEXT: ds_write2_b64 v19, v[4:5], v[14:15] offset0:10 offset1:11 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v6 -; VI-NO-DS128-NEXT: v_bfe_i32 v4, v4, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v14, v6, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v7 -; VI-NO-DS128-NEXT: ds_write2_b64 v19, v[14:15], v[4:5] offset0:12 offset1:13 -; VI-NO-DS128-NEXT: v_bfe_i32 v14, v6, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v6, v7, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 +; VI-NO-DS128-NEXT: ds_write2_b64 v21, v[18:19], v[16:17] offset0:8 offset1:9 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v5 +; VI-NO-DS128-NEXT: v_bfe_i32 v16, v16, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v18, v5, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 +; VI-NO-DS128-NEXT: ds_write2_b64 v21, v[18:19], v[16:17] offset0:10 offset1:11 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v6 +; VI-NO-DS128-NEXT: v_bfe_i32 v16, v16, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v19, v6, 0, 16 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v7 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 ; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v0 ; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v1 ; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v2 -; VI-NO-DS128-NEXT: v_bfe_i32 v4, v18, 0, 16 -; VI-NO-DS128-NEXT: ds_write2_b64 v19, v[6:7], v[14:15] offset0:14 offset1:15 -; VI-NO-DS128-NEXT: v_bfe_i32 v6, v2, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v14, v14, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v4, v4, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v21, v[19:20], v[16:17] offset0:12 offset1:13 +; VI-NO-DS128-NEXT: v_bfe_i32 v16, v2, 0, 16 ; VI-NO-DS128-NEXT: v_bfe_i32 v2, v3, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v6, v7, 0, 16 ; VI-NO-DS128-NEXT: v_bfe_i32 v8, v8, 0, 16 ; VI-NO-DS128-NEXT: v_bfe_i32 v10, v9, 0, 16 ; VI-NO-DS128-NEXT: v_bfe_i32 v12, v11, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; VI-NO-DS128-NEXT: v_bfe_i32 v16, v0, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v18, v0, 0, 16 ; VI-NO-DS128-NEXT: v_bfe_i32 v0, v1, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v9, 31, v8 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v11, 31, v10 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v13, 31, v12 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 -; VI-NO-DS128-NEXT: ds_write2_b64 v19, v[2:3], v[4:5] offset0:6 offset1:7 -; VI-NO-DS128-NEXT: ds_write2_b64 v19, v[6:7], v[12:13] offset0:4 offset1:5 -; VI-NO-DS128-NEXT: ds_write2_b64 v19, v[0:1], v[10:11] offset0:2 offset1:3 -; VI-NO-DS128-NEXT: ds_write2_b64 v19, v[16:17], v[8:9] offset1:1 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; VI-NO-DS128-NEXT: ds_write2_b64 v21, v[6:7], v[4:5] offset0:14 offset1:15 +; VI-NO-DS128-NEXT: ds_write2_b64 v21, v[2:3], v[14:15] offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_write2_b64 v21, v[16:17], v[12:13] offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_write2_b64 v21, v[0:1], v[10:11] offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_write2_b64 v21, v[18:19], v[8:9] offset1:1 ; VI-NO-DS128-NEXT: s_endpgm ; ; GFX9-NO-DS128-LABEL: local_sextload_v16i16_to_v16i64: @@ -6916,57 +6726,57 @@ define amdgpu_kernel void @local_sextload_v16i16_to_v16i64(ptr addrspace(3) %out ; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v4, s1 ; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v4 offset1:1 ; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v4 offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v19, s0 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v21, s0 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v3 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v3 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v4 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v14, v14, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v4 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v16, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v4, 0, 16 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v19, v[16:17], v[14:15] offset0:8 offset1:9 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v14, v4, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v4, v5, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v19, v[4:5], v[14:15] offset0:10 offset1:11 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v6 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v4, v4, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v14, v6, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v7 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v19, v[14:15], v[4:5] offset0:12 offset1:13 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v14, v6, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v6, v7, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v21, v[18:19], v[16:17] offset0:8 offset1:9 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v5 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v16, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v5, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v21, v[18:19], v[16:17] offset0:10 offset1:11 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v6 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v16, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v19, v6, 0, 16 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v7 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 ; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v0 ; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v1 ; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v2 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v4, v18, 0, 16 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v19, v[6:7], v[14:15] offset0:14 offset1:15 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v6, v2, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v14, v14, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v4, v4, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v21, v[19:20], v[16:17] offset0:12 offset1:13 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v2, 0, 16 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v2, v3, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v6, v7, 0, 16 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v8, v8, 0, 16 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v10, v9, 0, 16 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v12, v11, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v0, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v0, 0, 16 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v0, v1, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v9, 31, v8 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v11, 31, v10 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v13, 31, v12 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v19, v[2:3], v[4:5] offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v19, v[6:7], v[12:13] offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v19, v[0:1], v[10:11] offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v19, v[16:17], v[8:9] offset1:1 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v21, v[6:7], v[4:5] offset0:14 offset1:15 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v21, v[2:3], v[14:15] offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v21, v[16:17], v[12:13] offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v21, v[0:1], v[10:11] offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v21, v[18:19], v[8:9] offset1:1 ; GFX9-NO-DS128-NEXT: s_endpgm ; ; EG-LABEL: local_sextload_v16i16_to_v16i64: @@ -7145,120 +6955,120 @@ define amdgpu_kernel void @local_sextload_v16i16_to_v16i64(ptr addrspace(3) %out ; VI-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-DS128-NEXT: s_mov_b32 m0, -1 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_mov_b32_e32 v0, s1 -; VI-DS128-NEXT: ds_read_b128 v[3:6], v0 -; VI-DS128-NEXT: ds_read_b128 v[7:10], v0 offset:16 +; VI-DS128-NEXT: v_mov_b32_e32 v4, s1 +; VI-DS128-NEXT: ds_read_b128 v[0:3], v4 +; VI-DS128-NEXT: ds_read_b128 v[4:7], v4 offset:16 +; VI-DS128-NEXT: v_mov_b32_e32 v24, s0 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(1) +; VI-DS128-NEXT: v_bfe_i32 v8, v0, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; VI-DS128-NEXT: v_bfe_i32 v10, v0, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v2 +; VI-DS128-NEXT: v_bfe_i32 v18, v0, 0, 16 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v5 +; VI-DS128-NEXT: v_bfe_i32 v19, v5, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v21, v0, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v4 +; VI-DS128-NEXT: v_bfe_i32 v12, v1, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; VI-DS128-NEXT: ds_write_b128 v24, v[19:22] offset:80 +; VI-DS128-NEXT: v_bfe_i32 v20, v4, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v22, v0, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v6 +; VI-DS128-NEXT: v_bfe_i32 v14, v1, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v16, v2, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v21, 31, v20 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v23, 31, v22 ; VI-DS128-NEXT: v_bfe_i32 v0, v3, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v7 ; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v3 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v8 -; VI-DS128-NEXT: v_bfe_i32 v11, v8, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v13, v3, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; VI-DS128-NEXT: v_mov_b32_e32 v8, s0 -; VI-DS128-NEXT: ds_write_b128 v8, v[11:14] offset:80 -; VI-DS128-NEXT: v_bfe_i32 v11, v7, 0, 16 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; VI-DS128-NEXT: v_bfe_i32 v13, v7, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v10 -; VI-DS128-NEXT: ds_write_b128 v8, v[11:14] offset:64 -; VI-DS128-NEXT: v_bfe_i32 v11, v10, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v13, v7, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; VI-DS128-NEXT: v_bfe_i32 v10, v4, 0, 16 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v4 -; VI-DS128-NEXT: ds_write_b128 v8, v[11:14] offset:112 -; VI-DS128-NEXT: v_bfe_i32 v12, v4, 0, 16 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v9 -; VI-DS128-NEXT: v_bfe_i32 v14, v9, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v5 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v6 -; VI-DS128-NEXT: ds_write_b128 v8, v[14:17] offset:96 -; VI-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v4, v6, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v6, v7, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v3, v6, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v5, v5, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:64 +; VI-DS128-NEXT: v_bfe_i32 v20, v7, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v22, v1, 0, 16 ; VI-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v14, v5, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v4, 31, v3 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v6, 31, v5 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v21, 31, v20 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v23, 31, v22 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v1, 31, v0 +; VI-DS128-NEXT: ds_write_b128 v24, v[3:6] offset:96 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v11, 31, v10 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v9, 31, v8 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v13, 31, v12 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v11, 31, v10 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; VI-DS128-NEXT: ds_write_b128 v8, v[4:7] offset:48 -; VI-DS128-NEXT: ds_write_b128 v8, v[14:17] offset:32 -; VI-DS128-NEXT: ds_write_b128 v8, v[10:13] offset:16 -; VI-DS128-NEXT: ds_write_b128 v8, v[0:3] +; VI-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 +; VI-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:112 +; VI-DS128-NEXT: ds_write_b128 v24, v[0:3] offset:48 +; VI-DS128-NEXT: ds_write_b128 v24, v[16:19] offset:32 +; VI-DS128-NEXT: ds_write_b128 v24, v[12:15] offset:16 +; VI-DS128-NEXT: ds_write_b128 v24, v[8:11] ; VI-DS128-NEXT: s_endpgm ; ; GFX9-DS128-LABEL: local_sextload_v16i16_to_v16i64: ; GFX9-DS128: ; %bb.0: ; GFX9-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_mov_b32_e32 v0, s1 -; GFX9-DS128-NEXT: ds_read_b128 v[3:6], v0 -; GFX9-DS128-NEXT: ds_read_b128 v[7:10], v0 offset:16 +; GFX9-DS128-NEXT: v_mov_b32_e32 v4, s1 +; GFX9-DS128-NEXT: ds_read_b128 v[0:3], v4 +; GFX9-DS128-NEXT: ds_read_b128 v[4:7], v4 offset:16 +; GFX9-DS128-NEXT: v_mov_b32_e32 v24, s0 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(1) +; GFX9-DS128-NEXT: v_bfe_i32 v8, v0, 0, 16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; GFX9-DS128-NEXT: v_bfe_i32 v10, v0, 0, 16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v2 +; GFX9-DS128-NEXT: v_bfe_i32 v18, v0, 0, 16 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v5 +; GFX9-DS128-NEXT: v_bfe_i32 v19, v5, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v21, v0, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v4 +; GFX9-DS128-NEXT: v_bfe_i32 v12, v1, 0, 16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[19:22] offset:80 +; GFX9-DS128-NEXT: v_bfe_i32 v20, v4, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v22, v0, 0, 16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v6 +; GFX9-DS128-NEXT: v_bfe_i32 v14, v1, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v16, v2, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v21, 31, v20 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v23, 31, v22 ; GFX9-DS128-NEXT: v_bfe_i32 v0, v3, 0, 16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v7 ; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v3 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v8 -; GFX9-DS128-NEXT: v_bfe_i32 v11, v8, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v13, v3, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-DS128-NEXT: v_mov_b32_e32 v8, s0 -; GFX9-DS128-NEXT: ds_write_b128 v8, v[11:14] offset:80 -; GFX9-DS128-NEXT: v_bfe_i32 v11, v7, 0, 16 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-DS128-NEXT: v_bfe_i32 v13, v7, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v10 -; GFX9-DS128-NEXT: ds_write_b128 v8, v[11:14] offset:64 -; GFX9-DS128-NEXT: v_bfe_i32 v11, v10, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v13, v7, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-DS128-NEXT: v_bfe_i32 v10, v4, 0, 16 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v4 -; GFX9-DS128-NEXT: ds_write_b128 v8, v[11:14] offset:112 -; GFX9-DS128-NEXT: v_bfe_i32 v12, v4, 0, 16 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v9 -; GFX9-DS128-NEXT: v_bfe_i32 v14, v9, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v5 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v6 -; GFX9-DS128-NEXT: ds_write_b128 v8, v[14:17] offset:96 -; GFX9-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v4, v6, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v6, v7, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v3, v6, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v5, v5, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:64 +; GFX9-DS128-NEXT: v_bfe_i32 v20, v7, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v22, v1, 0, 16 ; GFX9-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v14, v5, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v4, 31, v3 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v6, 31, v5 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v21, 31, v20 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v23, 31, v22 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v1, 31, v0 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[3:6] offset:96 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v11, 31, v10 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v9, 31, v8 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v13, 31, v12 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v11, 31, v10 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-DS128-NEXT: ds_write_b128 v8, v[4:7] offset:48 -; GFX9-DS128-NEXT: ds_write_b128 v8, v[14:17] offset:32 -; GFX9-DS128-NEXT: ds_write_b128 v8, v[10:13] offset:16 -; GFX9-DS128-NEXT: ds_write_b128 v8, v[0:3] +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[20:23] offset:112 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[0:3] offset:48 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[16:19] offset:32 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[12:15] offset:16 +; GFX9-DS128-NEXT: ds_write_b128 v24, v[8:11] ; GFX9-DS128-NEXT: s_endpgm %load = load <16 x i16>, ptr addrspace(3) %in %ext = sext <16 x i16> %load to <16 x i64> @@ -7271,236 +7081,254 @@ define amdgpu_kernel void @local_zextload_v32i16_to_v32i64(ptr addrspace(3) %out ; SI: ; %bb.0: ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 ; SI-NEXT: s_mov_b32 m0, -1 -; SI-NEXT: v_mov_b32_e32 v4, 0 -; SI-NEXT: v_mov_b32_e32 v17, v4 -; SI-NEXT: v_mov_b32_e32 v19, v4 -; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_mov_b32_e32 v12, s1 -; SI-NEXT: ds_read2_b64 v[0:3], v12 offset1:1 -; SI-NEXT: ds_read2_b64 v[5:8], v12 offset0:2 offset1:3 -; SI-NEXT: v_mov_b32_e32 v20, s0 +; SI-NEXT: v_mov_b32_e32 v5, 0 +; SI-NEXT: v_mov_b32_e32 v19, v5 +; SI-NEXT: v_mov_b32_e32 v21, v5 ; SI-NEXT: s_waitcnt lgkmcnt(0) -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v8 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v8 -; SI-NEXT: ds_read2_b64 v[8:11], v12 offset0:4 offset1:5 -; SI-NEXT: ds_read2_b64 v[12:15], v12 offset0:6 offset1:7 -; SI-NEXT: ds_write2_b64 v20, v[18:19], v[16:17] offset0:14 offset1:15 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v6 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v6 -; SI-NEXT: ds_write2_b64 v20, v[18:19], v[16:17] offset0:10 offset1:11 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v3 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v3 -; SI-NEXT: ds_write2_b64 v20, v[18:19], v[16:17] offset0:6 offset1:7 -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v1 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v1 -; SI-NEXT: ds_write2_b64 v20, v[18:19], v[16:17] offset0:2 offset1:3 +; SI-NEXT: v_mov_b32_e32 v4, s1 +; SI-NEXT: ds_read2_b64 v[0:3], v4 offset1:1 +; SI-NEXT: ds_read2_b64 v[6:9], v4 offset0:2 offset1:3 +; SI-NEXT: ds_read2_b64 v[10:13], v4 offset0:4 offset1:5 +; SI-NEXT: ds_read2_b64 v[14:17], v4 offset0:6 offset1:7 +; SI-NEXT: v_mov_b32_e32 v29, s0 +; SI-NEXT: v_mov_b32_e32 v22, v5 +; SI-NEXT: v_mov_b32_e32 v23, v5 +; SI-NEXT: s_waitcnt lgkmcnt(2) +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v9 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v9 +; SI-NEXT: ds_write2_b64 v29, v[20:21], v[18:19] offset0:14 offset1:15 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v7 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v7 +; SI-NEXT: ds_write2_b64 v29, v[20:21], v[18:19] offset0:10 offset1:11 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v3 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v3 +; SI-NEXT: ds_write2_b64 v29, v[20:21], v[18:19] offset0:6 offset1:7 +; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v1 +; SI-NEXT: v_mov_b32_e32 v20, v5 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v1 +; SI-NEXT: ds_write2_b64 v29, v[21:22], v[19:20] offset0:2 offset1:3 ; SI-NEXT: s_waitcnt lgkmcnt(4) -; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v15 -; SI-NEXT: v_and_b32_e32 v18, 0xffff, v15 -; SI-NEXT: ds_write2_b64 v20, v[18:19], v[16:17] offset0:30 offset1:31 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v13 -; SI-NEXT: v_mov_b32_e32 v16, v4 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v13 -; SI-NEXT: v_mov_b32_e32 v18, v4 -; SI-NEXT: ds_write2_b64 v20, v[17:18], v[15:16] offset0:26 offset1:27 -; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v11 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v11 -; SI-NEXT: ds_write2_b64 v20, v[17:18], v[15:16] offset0:22 offset1:23 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v7 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v7 -; SI-NEXT: v_mov_b32_e32 v7, v4 -; SI-NEXT: ds_write2_b64 v20, v[15:16], v[6:7] offset0:12 offset1:13 -; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v5 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v5 -; SI-NEXT: ds_write2_b64 v20, v[15:16], v[6:7] offset0:8 offset1:9 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 -; SI-NEXT: v_and_b32_e32 v5, 0xffff, v2 -; SI-NEXT: v_mov_b32_e32 v6, v4 -; SI-NEXT: v_mov_b32_e32 v2, v4 -; SI-NEXT: ds_write2_b64 v20, v[5:6], v[1:2] offset0:4 offset1:5 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v0 -; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v9 -; SI-NEXT: ds_write2_b64 v20, v[6:7], v[1:2] offset1:1 -; SI-NEXT: v_and_b32_e32 v6, 0xffff, v9 -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v10 -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v8 -; SI-NEXT: v_and_b32_e32 v2, 0xffff, v8 -; SI-NEXT: v_and_b32_e32 v8, 0xffff, v10 -; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v14 -; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12 -; SI-NEXT: v_and_b32_e32 v15, 0xffff, v12 -; SI-NEXT: v_and_b32_e32 v17, 0xffff, v14 -; SI-NEXT: ds_write2_b64 v20, v[6:7], v[3:4] offset0:18 offset1:19 -; SI-NEXT: v_mov_b32_e32 v9, v4 -; SI-NEXT: v_mov_b32_e32 v3, v4 -; SI-NEXT: v_mov_b32_e32 v11, v4 -; SI-NEXT: v_mov_b32_e32 v14, v4 -; SI-NEXT: v_mov_b32_e32 v6, v4 -; SI-NEXT: v_mov_b32_e32 v1, v4 -; SI-NEXT: ds_write2_b64 v20, v[17:18], v[10:11] offset0:28 offset1:29 -; SI-NEXT: ds_write2_b64 v20, v[15:16], v[13:14] offset0:24 offset1:25 -; SI-NEXT: ds_write2_b64 v20, v[8:9], v[5:6] offset0:20 offset1:21 -; SI-NEXT: ds_write2_b64 v20, v[2:3], v[0:1] offset0:16 offset1:17 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v17 +; SI-NEXT: v_mov_b32_e32 v21, v5 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v17 +; SI-NEXT: ds_write2_b64 v29, v[22:23], v[20:21] offset0:30 offset1:31 +; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 +; SI-NEXT: v_and_b32_e32 v22, 0xffff, v15 +; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v13 +; SI-NEXT: v_mov_b32_e32 v19, v5 +; SI-NEXT: ds_write2_b64 v29, v[22:23], v[20:21] offset0:26 offset1:27 +; SI-NEXT: v_and_b32_e32 v20, 0xffff, v13 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v8 +; SI-NEXT: ds_write2_b64 v29, v[20:21], v[18:19] offset0:22 offset1:23 +; SI-NEXT: v_and_b32_e32 v17, 0xffff, v8 +; SI-NEXT: v_mov_b32_e32 v18, v5 +; SI-NEXT: v_mov_b32_e32 v8, v5 +; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v11 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v6 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2 +; SI-NEXT: ds_write2_b64 v29, v[17:18], v[7:8] offset0:12 offset1:13 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v10 +; SI-NEXT: v_and_b32_e32 v19, 0xffff, v10 +; SI-NEXT: v_and_b32_e32 v10, 0xffff, v11 +; SI-NEXT: v_and_b32_e32 v21, 0xffff, v12 +; SI-NEXT: v_and_b32_e32 v27, 0xffff, v2 +; SI-NEXT: v_and_b32_e32 v11, 0xffff, v6 +; SI-NEXT: v_mov_b32_e32 v12, v5 +; SI-NEXT: v_mov_b32_e32 v2, v5 +; SI-NEXT: ds_write2_b64 v29, v[11:12], v[1:2] offset0:8 offset1:9 +; SI-NEXT: v_mov_b32_e32 v11, v5 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v0 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v16 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14 +; SI-NEXT: v_and_b32_e32 v23, 0xffff, v14 +; SI-NEXT: v_and_b32_e32 v25, 0xffff, v16 +; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; SI-NEXT: v_mov_b32_e32 v28, v5 +; SI-NEXT: v_mov_b32_e32 v1, v5 +; SI-NEXT: v_mov_b32_e32 v26, v5 +; SI-NEXT: ds_write2_b64 v29, v[10:11], v[4:5] offset0:18 offset1:19 +; SI-NEXT: v_mov_b32_e32 v24, v5 +; SI-NEXT: v_mov_b32_e32 v4, v5 +; SI-NEXT: v_mov_b32_e32 v10, v5 +; SI-NEXT: v_mov_b32_e32 v14, v5 +; SI-NEXT: v_mov_b32_e32 v16, v5 +; SI-NEXT: v_mov_b32_e32 v22, v5 +; SI-NEXT: ds_write2_b64 v29, v[27:28], v[3:4] offset0:4 offset1:5 +; SI-NEXT: v_mov_b32_e32 v20, v5 +; SI-NEXT: ds_write2_b64 v29, v[0:1], v[9:10] offset1:1 +; SI-NEXT: ds_write2_b64 v29, v[25:26], v[13:14] offset0:28 offset1:29 +; SI-NEXT: ds_write2_b64 v29, v[23:24], v[15:16] offset0:24 offset1:25 +; SI-NEXT: ds_write2_b64 v29, v[21:22], v[7:8] offset0:20 offset1:21 +; SI-NEXT: ds_write2_b64 v29, v[19:20], v[17:18] offset0:16 offset1:17 ; SI-NEXT: s_endpgm ; ; VI-NO-DS128-LABEL: local_zextload_v32i16_to_v32i64: ; VI-NO-DS128: ; %bb.0: ; VI-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-NO-DS128-NEXT: s_mov_b32 m0, -1 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v5, 0 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v19, v5 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v21, v5 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v1, 0 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v19, v1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v21, v1 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_mov_b32_e32 v4, s1 -; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v4 offset0:6 offset1:7 -; VI-NO-DS128-NEXT: ds_read2_b64 v[6:9], v4 offset0:4 offset1:5 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v22, s0 -; VI-NO-DS128-NEXT: ds_read2_b64 v[10:13], v4 offset0:2 offset1:3 -; VI-NO-DS128-NEXT: ds_read2_b64 v[14:17], v4 offset1:1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v0, s1 +; VI-NO-DS128-NEXT: ds_read2_b64 v[2:5], v0 offset0:6 offset1:7 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v25, s0 +; VI-NO-DS128-NEXT: ds_read2_b64 v[6:9], v0 offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_read2_b64 v[10:13], v0 offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_read2_b64 v[14:17], v0 offset1:1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v22, v1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v24, v1 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v2 -; VI-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v2 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[18:19], v[20:21] offset0:28 offset1:29 -; VI-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v1 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v2, v5 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[18:19], v[1:2] offset0:26 offset1:27 -; VI-NO-DS128-NEXT: v_and_b32_e32 v1, 0xffff, v0 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v0 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[1:2], v[18:19] offset0:24 offset1:25 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v4 +; VI-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v4 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[18:19], v[20:21] offset0:28 offset1:29 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v3 +; VI-NO-DS128-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v4, v1 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[3:4], v[18:19] offset0:26 offset1:27 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v2 +; VI-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v2 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[20:21], v[18:19] offset0:24 offset1:25 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(5) -; VI-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v9 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v1, v5 ; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v9 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[0:1], v[18:19] offset0:22 offset1:23 -; VI-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v8 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v8 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v9, v5 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[0:1], v[8:9] offset0:20 offset1:21 -; VI-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v7 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v8, v5 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[0:1], v[7:8] offset0:18 offset1:19 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v6 -; VI-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v7, v5 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[0:1] offset0:16 offset1:17 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(8) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v13 -; VI-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v13 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[0:1] offset0:14 offset1:15 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v12 -; VI-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v12 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[0:1] offset0:12 offset1:13 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v11 -; VI-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v11 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[0:1] offset0:10 offset1:11 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(10) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v14 -; VI-NO-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v14 -; VI-NO-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v3 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v3 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v14, v5 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v10 -; VI-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v10 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v17 -; VI-NO-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v17 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[4:5], v[13:14] offset0:30 offset1:31 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v13, v5 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v11, v5 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[1:2] offset0:8 offset1:9 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v16 -; VI-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v16 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[12:13], v[10:11] offset0:6 offset1:7 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v10, v5 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v3, v5 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v15 -; VI-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v15 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[9:10], v[2:3] offset0:4 offset1:5 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v2, v5 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[1:2] offset0:2 offset1:3 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v9, v5 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v1, v5 -; VI-NO-DS128-NEXT: ds_write2_b64 v22, v[8:9], v[0:1] offset1:1 +; VI-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v9 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[20:21], v[18:19] offset0:22 offset1:23 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v8 +; VI-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v8 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[20:21], v[18:19] offset0:20 offset1:21 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v7 +; VI-NO-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v8, v1 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[7:8], v[21:22] offset0:18 offset1:19 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v6 +; VI-NO-DS128-NEXT: v_and_b32_e32 v23, 0xffff, v6 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[23:24], v[21:22] offset0:16 offset1:17 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v5 +; VI-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v5 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[0:1], v[23:24] offset0:30 offset1:31 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(9) +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v13 +; VI-NO-DS128-NEXT: v_and_b32_e32 v23, 0xffff, v13 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v6, v1 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v22, 16, v12 +; VI-NO-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[23:24], v[5:6] offset0:14 offset1:15 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v13, v1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v23, v1 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v11 +; VI-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[12:13], v[22:23] offset0:12 offset1:13 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v12, v1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v22, v1 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v10 +; VI-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[11:12], v[21:22] offset0:10 offset1:11 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v11, v1 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(11) +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v16 +; VI-NO-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v17 +; VI-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v17 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[10:11], v[7:8] offset0:8 offset1:9 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v17, v1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v10, v1 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v15 +; VI-NO-DS128-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[16:17], v[9:10] offset0:4 offset1:5 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v16, v1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v5, v1 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v14 +; VI-NO-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v21, v1 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[15:16], v[4:5] offset0:2 offset1:3 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v15, v1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v4, v1 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[20:21], v[18:19] offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_write2_b64 v25, v[14:15], v[3:4] offset1:1 ; VI-NO-DS128-NEXT: s_endpgm ; ; GFX9-NO-DS128-LABEL: local_zextload_v32i16_to_v32i64: ; GFX9-NO-DS128: ; %bb.0: ; GFX9-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v5, 0 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v19, v5 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v21, v5 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v1, 0 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v19, v1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v21, v1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v22, v1 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v4, s1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[6:9], v4 offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v4 offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v22, s0 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[10:13], v4 offset1:1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[14:17], v4 offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v0, s1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[2:5], v0 offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[6:9], v0 offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v25, s0 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[10:13], v0 offset1:1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[14:17], v0 offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v24, v1 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(2) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v2 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v2 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[18:19], v[20:21] offset0:28 offset1:29 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v1 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v2, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[18:19], v[1:2] offset0:26 offset1:27 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v1, 0xffff, v0 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v0 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[1:2], v[18:19] offset0:24 offset1:25 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v8 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v18, 0xffff, v8 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[18:19], v[20:21] offset0:28 offset1:29 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v7 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v7 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v8, v1 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[7:8], v[18:19] offset0:26 offset1:27 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v6 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v6 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[20:21], v[18:19] offset0:24 offset1:25 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v5 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v6, v1 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[5:6], v[18:19] offset0:22 offset1:23 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v4 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v4 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[20:21], v[18:19] offset0:20 offset1:21 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v3 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v3, 0xffff, v3 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v4, v1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v20, v1 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[3:4], v[19:20] offset0:18 offset1:19 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v2 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v21, 0xffff, v2 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[21:22], v[19:20] offset0:16 offset1:17 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v9 ; GFX9-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v9 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v1, v5 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v9 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[0:1], v[18:19] offset0:22 offset1:23 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v8 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v8 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v9, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[0:1], v[8:9] offset0:20 offset1:21 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v7 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v7 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v8, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[0:1], v[7:8] offset0:18 offset1:19 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v6 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v6 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v7, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[0:1] offset0:16 offset1:17 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(7) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v17 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v17 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[0:1] offset0:14 offset1:15 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v16 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v16 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[0:1] offset0:12 offset1:13 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v15 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v15 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[0:1] offset0:10 offset1:11 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v14 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v14 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v10 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v8, 0xffff, v10 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[1:2] offset0:8 offset1:9 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v12 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v12 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v10, 16, v13 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v13 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v3 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v3 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v14, v5 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v11 -; GFX9-NO-DS128-NEXT: v_and_b32_e32 v6, 0xffff, v11 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[4:5], v[13:14] offset0:30 offset1:31 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v13, v5 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v11, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[12:13], v[10:11] offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v10, v5 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v3, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[9:10], v[2:3] offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v2, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[6:7], v[1:2] offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v9, v5 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v1, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v22, v[8:9], v[0:1] offset1:1 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[0:1], v[21:22] offset0:30 offset1:31 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(8) +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v21, 16, v17 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v23, 0xffff, v17 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v16 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[23:24], v[21:22] offset0:14 offset1:15 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v17, v1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v21, v1 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v15 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v15, 0xffff, v15 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[16:17], v[20:21] offset0:12 offset1:13 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v16, v1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v20, v1 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v14 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v14 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[15:16], v[19:20] offset0:10 offset1:11 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v15, v1 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v13 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v13, 0xffff, v13 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[14:15], v[3:4] offset0:8 offset1:9 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v14, v1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v19, v1 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v12 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v12 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[13:14], v[18:19] offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v13, v1 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v11 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v11 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[12:13], v[5:6] offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v12, v1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v9, v1 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v10 +; GFX9-NO-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v10 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[11:12], v[8:9] offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v11, v1 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v8, v1 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v25, v[10:11], v[7:8] offset1:1 ; GFX9-NO-DS128-NEXT: s_endpgm ; ; EG-LABEL: local_zextload_v32i16_to_v32i64: @@ -7802,193 +7630,169 @@ define amdgpu_kernel void @local_zextload_v32i16_to_v32i64(ptr addrspace(3) %out ; VI-DS128: ; %bb.0: ; VI-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-DS128-NEXT: s_mov_b32 m0, -1 +; VI-DS128-NEXT: v_mov_b32_e32 v1, 0 +; VI-DS128-NEXT: v_mov_b32_e32 v23, v1 +; VI-DS128-NEXT: v_mov_b32_e32 v25, v1 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_mov_b32_e32 v1, s1 -; VI-DS128-NEXT: ds_read_b128 v[3:6], v1 -; VI-DS128-NEXT: ds_read_b128 v[7:10], v1 offset:16 -; VI-DS128-NEXT: v_mov_b32_e32 v52, s0 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v6 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v8 -; VI-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v8 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v22, 16, v7 -; VI-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v7 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v10 -; VI-DS128-NEXT: v_and_b32_e32 v23, 0xffff, v10 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v28, 16, v9 -; VI-DS128-NEXT: v_and_b32_e32 v26, 0xffff, v9 -; VI-DS128-NEXT: ds_read_b128 v[7:10], v1 offset:32 -; VI-DS128-NEXT: ds_read_b128 v[29:32], v1 offset:48 -; VI-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v6 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v4 -; VI-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v4 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v38, 16, v7 -; VI-DS128-NEXT: v_and_b32_e32 v36, 0xffff, v7 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v44, 16, v9 -; VI-DS128-NEXT: v_and_b32_e32 v42, 0xffff, v9 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v30 -; VI-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v30 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v50, 16, v32 -; VI-DS128-NEXT: v_and_b32_e32 v48, 0xffff, v32 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v32, 16, v31 -; VI-DS128-NEXT: v_and_b32_e32 v30, 0xffff, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v31, 0 -; VI-DS128-NEXT: v_mov_b32_e32 v49, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v51, v31 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v47, 16, v29 -; VI-DS128-NEXT: v_and_b32_e32 v45, 0xffff, v29 -; VI-DS128-NEXT: ds_write_b128 v52, v[48:51] offset:240 -; VI-DS128-NEXT: v_mov_b32_e32 v46, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v48, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v27, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v29, v31 -; VI-DS128-NEXT: ds_write_b128 v52, v[45:48] offset:192 -; VI-DS128-NEXT: v_mov_b32_e32 v43, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v45, v31 -; VI-DS128-NEXT: ds_write_b128 v52, v[26:29] offset:96 -; VI-DS128-NEXT: v_mov_b32_e32 v24, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v26, v31 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v41, 16, v10 -; VI-DS128-NEXT: v_and_b32_e32 v39, 0xffff, v10 -; VI-DS128-NEXT: ds_write_b128 v52, v[42:45] offset:160 -; VI-DS128-NEXT: v_mov_b32_e32 v40, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v42, v31 -; VI-DS128-NEXT: ds_write_b128 v52, v[23:26] offset:112 -; VI-DS128-NEXT: v_mov_b32_e32 v21, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v23, v31 -; VI-DS128-NEXT: ds_write_b128 v52, v[39:42] offset:176 -; VI-DS128-NEXT: v_mov_b32_e32 v37, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v39, v31 -; VI-DS128-NEXT: ds_write_b128 v52, v[20:23] offset:64 -; VI-DS128-NEXT: v_mov_b32_e32 v18, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v20, v31 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v35, 16, v8 -; VI-DS128-NEXT: v_and_b32_e32 v33, 0xffff, v8 -; VI-DS128-NEXT: v_mov_b32_e32 v8, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v10, v31 -; VI-DS128-NEXT: ds_write_b128 v52, v[36:39] offset:128 -; VI-DS128-NEXT: v_mov_b32_e32 v34, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v36, v31 -; VI-DS128-NEXT: ds_write_b128 v52, v[17:20] offset:80 -; VI-DS128-NEXT: v_mov_b32_e32 v15, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v17, v31 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v3 -; VI-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v3 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v5 -; VI-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v5 -; VI-DS128-NEXT: ds_write_b128 v52, v[7:10] offset:208 -; VI-DS128-NEXT: ds_write_b128 v52, v[33:36] offset:144 -; VI-DS128-NEXT: v_mov_b32_e32 v5, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v7, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v33, v31 -; VI-DS128-NEXT: ds_write_b128 v52, v[14:17] offset:48 -; VI-DS128-NEXT: v_mov_b32_e32 v12, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v14, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v1, v31 -; VI-DS128-NEXT: v_mov_b32_e32 v3, v31 -; VI-DS128-NEXT: ds_write_b128 v52, v[4:7] offset:32 -; VI-DS128-NEXT: ds_write_b128 v52, v[30:33] offset:224 -; VI-DS128-NEXT: ds_write_b128 v52, v[11:14] -; VI-DS128-NEXT: ds_write_b128 v52, v[0:3] offset:16 +; VI-DS128-NEXT: v_mov_b32_e32 v0, s1 +; VI-DS128-NEXT: ds_read_b128 v[6:9], v0 offset:48 +; VI-DS128-NEXT: ds_read_b128 v[10:13], v0 offset:32 +; VI-DS128-NEXT: ds_read_b128 v[14:17], v0 offset:16 +; VI-DS128-NEXT: ds_read_b128 v[18:21], v0 +; VI-DS128-NEXT: v_mov_b32_e32 v31, s0 +; VI-DS128-NEXT: v_mov_b32_e32 v27, v1 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(2) +; VI-DS128-NEXT: v_lshrrev_b32_e32 v26, 16, v13 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v24, 16, v7 +; VI-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v7 +; VI-DS128-NEXT: ds_write_b128 v31, v[22:25] offset:208 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v24, 16, v12 +; VI-DS128-NEXT: v_and_b32_e32 v22, 0xffff, v12 +; VI-DS128-NEXT: ds_write_b128 v31, v[22:25] offset:160 +; VI-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v13 +; VI-DS128-NEXT: ds_write_b128 v31, v[24:27] offset:176 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v10 +; VI-DS128-NEXT: v_and_b32_e32 v27, 0xffff, v10 +; VI-DS128-NEXT: v_mov_b32_e32 v28, v1 +; VI-DS128-NEXT: v_mov_b32_e32 v30, v1 +; VI-DS128-NEXT: ds_write_b128 v31, v[27:30] offset:128 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v11 +; VI-DS128-NEXT: v_and_b32_e32 v27, 0xffff, v11 +; VI-DS128-NEXT: v_mov_b32_e32 v3, v1 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v9 +; VI-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v9 +; VI-DS128-NEXT: v_mov_b32_e32 v5, v1 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(5) +; VI-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v15 +; VI-DS128-NEXT: v_and_b32_e32 v10, 0xffff, v15 +; VI-DS128-NEXT: ds_write_b128 v31, v[27:30] offset:144 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v14 +; VI-DS128-NEXT: v_and_b32_e32 v13, 0xffff, v14 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v16 +; VI-DS128-NEXT: v_and_b32_e32 v27, 0xffff, v16 +; VI-DS128-NEXT: v_mov_b32_e32 v14, v1 +; VI-DS128-NEXT: v_mov_b32_e32 v16, v1 +; VI-DS128-NEXT: ds_write_b128 v31, v[2:5] offset:240 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v6 +; VI-DS128-NEXT: v_and_b32_e32 v2, 0xffff, v6 +; VI-DS128-NEXT: ds_write_b128 v31, v[13:16] offset:64 +; VI-DS128-NEXT: v_mov_b32_e32 v11, v1 +; VI-DS128-NEXT: v_mov_b32_e32 v13, v1 +; VI-DS128-NEXT: ds_write_b128 v31, v[2:5] offset:192 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(8) +; VI-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v18 +; VI-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v18 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v26, 16, v20 +; VI-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v20 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v8 +; VI-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v8 +; VI-DS128-NEXT: ds_write_b128 v31, v[27:30] offset:96 +; VI-DS128-NEXT: ds_write_b128 v31, v[10:13] offset:80 +; VI-DS128-NEXT: v_mov_b32_e32 v27, v1 +; VI-DS128-NEXT: v_mov_b32_e32 v8, v1 +; VI-DS128-NEXT: v_mov_b32_e32 v10, v1 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v19 +; VI-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v19 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v21 +; VI-DS128-NEXT: v_and_b32_e32 v21, 0xffff, v21 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v17 +; VI-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v17 +; VI-DS128-NEXT: v_mov_b32_e32 v18, v1 +; VI-DS128-NEXT: v_mov_b32_e32 v20, v1 +; VI-DS128-NEXT: ds_write_b128 v31, v[24:27] offset:32 +; VI-DS128-NEXT: v_mov_b32_e32 v22, v1 +; VI-DS128-NEXT: v_mov_b32_e32 v24, v1 +; VI-DS128-NEXT: ds_write_b128 v31, v[7:10] +; VI-DS128-NEXT: v_mov_b32_e32 v7, v1 +; VI-DS128-NEXT: ds_write_b128 v31, v[0:3] offset:224 +; VI-DS128-NEXT: ds_write_b128 v31, v[17:20] offset:112 +; VI-DS128-NEXT: ds_write_b128 v31, v[21:24] offset:48 +; VI-DS128-NEXT: ds_write_b128 v31, v[4:7] offset:16 ; VI-DS128-NEXT: s_endpgm ; ; GFX9-DS128-LABEL: local_zextload_v32i16_to_v32i64: ; GFX9-DS128: ; %bb.0: ; GFX9-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 +; GFX9-DS128-NEXT: v_mov_b32_e32 v1, 0 +; GFX9-DS128-NEXT: v_mov_b32_e32 v22, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v24, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v25, v1 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_mov_b32_e32 v1, s1 -; GFX9-DS128-NEXT: ds_read_b128 v[3:6], v1 -; GFX9-DS128-NEXT: ds_read_b128 v[7:10], v1 offset:16 -; GFX9-DS128-NEXT: v_mov_b32_e32 v52, s0 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v6 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v19, 16, v8 -; GFX9-DS128-NEXT: v_and_b32_e32 v17, 0xffff, v8 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v22, 16, v7 -; GFX9-DS128-NEXT: v_and_b32_e32 v20, 0xffff, v7 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v25, 16, v10 -; GFX9-DS128-NEXT: v_and_b32_e32 v23, 0xffff, v10 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v28, 16, v9 -; GFX9-DS128-NEXT: v_and_b32_e32 v26, 0xffff, v9 -; GFX9-DS128-NEXT: ds_read_b128 v[7:10], v1 offset:32 -; GFX9-DS128-NEXT: ds_read_b128 v[29:32], v1 offset:48 -; GFX9-DS128-NEXT: v_and_b32_e32 v14, 0xffff, v6 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v4 -; GFX9-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v4 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v38, 16, v7 -; GFX9-DS128-NEXT: v_and_b32_e32 v36, 0xffff, v7 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v44, 16, v9 -; GFX9-DS128-NEXT: v_and_b32_e32 v42, 0xffff, v9 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v9, 16, v30 -; GFX9-DS128-NEXT: v_and_b32_e32 v7, 0xffff, v30 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v50, 16, v32 -; GFX9-DS128-NEXT: v_and_b32_e32 v48, 0xffff, v32 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v32, 16, v31 -; GFX9-DS128-NEXT: v_and_b32_e32 v30, 0xffff, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v31, 0 -; GFX9-DS128-NEXT: v_mov_b32_e32 v49, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v51, v31 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v47, 16, v29 -; GFX9-DS128-NEXT: v_and_b32_e32 v45, 0xffff, v29 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[48:51] offset:240 -; GFX9-DS128-NEXT: v_mov_b32_e32 v46, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v48, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v27, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v29, v31 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[45:48] offset:192 -; GFX9-DS128-NEXT: v_mov_b32_e32 v43, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v45, v31 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[26:29] offset:96 -; GFX9-DS128-NEXT: v_mov_b32_e32 v24, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v26, v31 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v41, 16, v10 -; GFX9-DS128-NEXT: v_and_b32_e32 v39, 0xffff, v10 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[42:45] offset:160 -; GFX9-DS128-NEXT: v_mov_b32_e32 v40, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v42, v31 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[23:26] offset:112 -; GFX9-DS128-NEXT: v_mov_b32_e32 v21, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v23, v31 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[39:42] offset:176 -; GFX9-DS128-NEXT: v_mov_b32_e32 v37, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v39, v31 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[20:23] offset:64 -; GFX9-DS128-NEXT: v_mov_b32_e32 v18, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v20, v31 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v35, 16, v8 -; GFX9-DS128-NEXT: v_and_b32_e32 v33, 0xffff, v8 -; GFX9-DS128-NEXT: v_mov_b32_e32 v8, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v10, v31 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[36:39] offset:128 -; GFX9-DS128-NEXT: v_mov_b32_e32 v34, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v36, v31 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[17:20] offset:80 -; GFX9-DS128-NEXT: v_mov_b32_e32 v15, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v17, v31 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v3 -; GFX9-DS128-NEXT: v_and_b32_e32 v11, 0xffff, v3 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v5 -; GFX9-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v5 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[7:10] offset:208 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[33:36] offset:144 -; GFX9-DS128-NEXT: v_mov_b32_e32 v5, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v7, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v33, v31 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[14:17] offset:48 -; GFX9-DS128-NEXT: v_mov_b32_e32 v12, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v14, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v1, v31 -; GFX9-DS128-NEXT: v_mov_b32_e32 v3, v31 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[4:7] offset:32 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[30:33] offset:224 -; GFX9-DS128-NEXT: ds_write_b128 v52, v[11:14] -; GFX9-DS128-NEXT: ds_write_b128 v52, v[0:3] offset:16 +; GFX9-DS128-NEXT: v_mov_b32_e32 v0, s1 +; GFX9-DS128-NEXT: ds_read_b128 v[2:5], v0 offset:32 +; GFX9-DS128-NEXT: ds_read_b128 v[6:9], v0 offset:48 +; GFX9-DS128-NEXT: v_mov_b32_e32 v34, s0 +; GFX9-DS128-NEXT: ds_read_b128 v[13:16], v0 +; GFX9-DS128-NEXT: ds_read_b128 v[17:20], v0 offset:16 +; GFX9-DS128-NEXT: v_mov_b32_e32 v27, v1 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(3) +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v26, 16, v2 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(2) +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v7 +; GFX9-DS128-NEXT: v_and_b32_e32 v21, 0xffff, v7 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[21:24] offset:208 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v4 +; GFX9-DS128-NEXT: v_and_b32_e32 v21, 0xffff, v4 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[21:24] offset:160 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v5 +; GFX9-DS128-NEXT: v_and_b32_e32 v21, 0xffff, v5 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[21:24] offset:176 +; GFX9-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v2 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[24:27] offset:128 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v3 +; GFX9-DS128-NEXT: v_and_b32_e32 v27, 0xffff, v3 +; GFX9-DS128-NEXT: v_mov_b32_e32 v28, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v30, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v10, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v12, v1 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v9 +; GFX9-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v9 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[27:30] offset:144 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(5) +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v32, 16, v19 +; GFX9-DS128-NEXT: v_and_b32_e32 v30, 0xffff, v19 +; GFX9-DS128-NEXT: v_mov_b32_e32 v31, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v33, v1 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[9:12] offset:240 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v6 +; GFX9-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v6 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v29, 16, v20 +; GFX9-DS128-NEXT: v_and_b32_e32 v27, 0xffff, v20 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[30:33] offset:96 +; GFX9-DS128-NEXT: v_mov_b32_e32 v30, v1 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[9:12] offset:192 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v11, 16, v14 +; GFX9-DS128-NEXT: v_and_b32_e32 v9, 0xffff, v14 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v13 +; GFX9-DS128-NEXT: v_and_b32_e32 v12, 0xffff, v13 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v23, 16, v15 +; GFX9-DS128-NEXT: v_and_b32_e32 v21, 0xffff, v15 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v26, 16, v18 +; GFX9-DS128-NEXT: v_and_b32_e32 v24, 0xffff, v18 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[27:30] offset:112 +; GFX9-DS128-NEXT: v_mov_b32_e32 v27, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v13, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v15, v1 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v16 +; GFX9-DS128-NEXT: v_and_b32_e32 v4, 0xffff, v16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v17 +; GFX9-DS128-NEXT: v_and_b32_e32 v16, 0xffff, v17 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v8 +; GFX9-DS128-NEXT: v_and_b32_e32 v0, 0xffff, v8 +; GFX9-DS128-NEXT: v_mov_b32_e32 v3, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v17, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v19, v1 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[24:27] offset:80 +; GFX9-DS128-NEXT: v_mov_b32_e32 v24, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v5, v1 +; GFX9-DS128-NEXT: v_mov_b32_e32 v7, v1 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[12:15] +; GFX9-DS128-NEXT: v_mov_b32_e32 v12, v1 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[0:3] offset:224 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[16:19] offset:64 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[21:24] offset:32 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[4:7] offset:48 +; GFX9-DS128-NEXT: ds_write_b128 v34, v[9:12] offset:16 ; GFX9-DS128-NEXT: s_endpgm %load = load <32 x i16>, ptr addrspace(3) %in %ext = zext <32 x i16> %load to <32 x i64> @@ -8004,8 +7808,8 @@ define amdgpu_kernel void @local_sextload_v32i16_to_v32i64(ptr addrspace(3) %out ; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: v_mov_b32_e32 v5, s1 ; SI-NEXT: ds_read2_b64 v[0:3], v5 offset0:2 offset1:3 -; SI-NEXT: ds_read2_b64 v[6:9], v5 offset1:1 ; SI-NEXT: v_mov_b32_e32 v4, s0 +; SI-NEXT: ds_read2_b64 v[6:9], v5 offset1:1 ; SI-NEXT: ds_read2_b64 v[10:13], v5 offset0:6 offset1:7 ; SI-NEXT: ds_read2_b64 v[14:17], v5 offset0:4 offset1:5 ; SI-NEXT: s_waitcnt lgkmcnt(3) @@ -8046,60 +7850,60 @@ define amdgpu_kernel void @local_sextload_v32i16_to_v32i64(ptr addrspace(3) %out ; SI-NEXT: v_ashrrev_i32_e32 v19, 31, v17 ; SI-NEXT: v_ashrrev_i32_e32 v18, 16, v17 ; SI-NEXT: v_ashrrev_i32_e32 v21, 31, v20 +; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v0 ; SI-NEXT: ds_write2_b64 v4, v[20:21], v[18:19] offset0:22 offset1:23 ; SI-NEXT: v_bfe_i32 v19, v15, 0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2 ; SI-NEXT: v_ashrrev_i32_e32 v18, 31, v15 ; SI-NEXT: v_ashrrev_i32_e32 v17, 16, v15 ; SI-NEXT: v_ashrrev_i32_e32 v20, 31, v19 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v2 +; SI-NEXT: v_bfe_i32 v22, v5, 0, 16 +; SI-NEXT: v_bfe_i32 v24, v0, 0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v8 ; SI-NEXT: ds_write2_b64 v4, v[19:20], v[17:18] offset0:18 offset1:19 -; SI-NEXT: v_bfe_i32 v17, v1, 0, 16 -; SI-NEXT: v_bfe_i32 v1, v2, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; SI-NEXT: v_ashrrev_i32_e32 v2, 31, v1 -; SI-NEXT: ds_write2_b64 v4, v[1:2], v[17:18] offset0:12 offset1:13 -; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 -; SI-NEXT: v_bfe_i32 v0, v0, 0, 16 -; SI-NEXT: v_bfe_i32 v2, v1, 0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v8 -; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v6 -; SI-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; SI-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; SI-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset0:8 offset1:9 -; SI-NEXT: v_bfe_i32 v0, v5, 0, 16 -; SI-NEXT: v_bfe_i32 v2, v8, 0, 16 -; SI-NEXT: v_bfe_i32 v5, v6, 0, 16 -; SI-NEXT: v_bfe_i32 v17, v9, 0, 16 -; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v12 -; SI-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; SI-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; SI-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; SI-NEXT: v_ashrrev_i32_e32 v6, 31, v5 -; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v10 -; SI-NEXT: ds_write2_b64 v4, v[2:3], v[0:1] offset0:4 offset1:5 -; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v16 -; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v14 -; SI-NEXT: ds_write2_b64 v4, v[5:6], v[17:18] offset1:1 -; SI-NEXT: v_bfe_i32 v5, v11, 0, 16 -; SI-NEXT: v_bfe_i32 v11, v12, 0, 16 -; SI-NEXT: v_bfe_i32 v0, v0, 0, 16 +; SI-NEXT: v_bfe_i32 v19, v3, 0, 16 ; SI-NEXT: v_bfe_i32 v2, v2, 0, 16 -; SI-NEXT: v_bfe_i32 v7, v7, 0, 16 -; SI-NEXT: v_ashrrev_i32_e32 v6, 31, v5 -; SI-NEXT: v_bfe_i32 v13, v14, 0, 16 -; SI-NEXT: v_bfe_i32 v15, v16, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v23, 31, v22 +; SI-NEXT: v_ashrrev_i32_e32 v25, 31, v24 +; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v6 +; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12 +; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v10 +; SI-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; SI-NEXT: v_ashrrev_i32_e32 v3, 31, v2 +; SI-NEXT: ds_write2_b64 v4, v[24:25], v[22:23] offset0:8 offset1:9 +; SI-NEXT: v_bfe_i32 v25, v9, 0, 16 +; SI-NEXT: v_bfe_i32 v8, v8, 0, 16 +; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v16 +; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v14 +; SI-NEXT: ds_write2_b64 v4, v[2:3], v[19:20] offset0:12 offset1:13 +; SI-NEXT: v_bfe_i32 v19, v11, 0, 16 +; SI-NEXT: v_bfe_i32 v21, v13, 0, 16 +; SI-NEXT: v_bfe_i32 v23, v7, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; SI-NEXT: v_ashrrev_i32_e32 v9, 31, v8 +; SI-NEXT: v_bfe_i32 v5, v12, 0, 16 +; SI-NEXT: v_bfe_i32 v11, v6, 0, 16 +; SI-NEXT: v_bfe_i32 v17, v15, 0, 16 +; SI-NEXT: v_bfe_i32 v1, v1, 0, 16 +; SI-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; SI-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; SI-NEXT: v_bfe_i32 v7, v14, 0, 16 +; SI-NEXT: ds_write2_b64 v4, v[8:9], v[25:26] offset0:4 offset1:5 +; SI-NEXT: v_bfe_i32 v13, v16, 0, 16 ; SI-NEXT: v_bfe_i32 v9, v10, 0, 16 ; SI-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; SI-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; SI-NEXT: v_ashrrev_i32_e32 v3, 31, v2 +; SI-NEXT: v_ashrrev_i32_e32 v6, 31, v5 +; SI-NEXT: v_ashrrev_i32_e32 v18, 31, v17 +; SI-NEXT: v_ashrrev_i32_e32 v2, 31, v1 +; SI-NEXT: v_ashrrev_i32_e32 v20, 31, v19 ; SI-NEXT: v_ashrrev_i32_e32 v8, 31, v7 ; SI-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; SI-NEXT: v_ashrrev_i32_e32 v16, 31, v15 ; SI-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; SI-NEXT: ds_write2_b64 v4, v[11:12], v[5:6] offset0:28 offset1:29 -; SI-NEXT: ds_write2_b64 v4, v[9:10], v[7:8] offset0:24 offset1:25 -; SI-NEXT: ds_write2_b64 v4, v[15:16], v[2:3] offset0:20 offset1:21 -; SI-NEXT: ds_write2_b64 v4, v[13:14], v[0:1] offset0:16 offset1:17 +; SI-NEXT: ds_write2_b64 v4, v[11:12], v[23:24] offset1:1 +; SI-NEXT: ds_write2_b64 v4, v[5:6], v[21:22] offset0:28 offset1:29 +; SI-NEXT: ds_write2_b64 v4, v[9:10], v[19:20] offset0:24 offset1:25 +; SI-NEXT: ds_write2_b64 v4, v[13:14], v[1:2] offset0:20 offset1:21 +; SI-NEXT: ds_write2_b64 v4, v[7:8], v[17:18] offset0:16 offset1:17 ; SI-NEXT: s_endpgm ; ; VI-NO-DS128-LABEL: local_sextload_v32i16_to_v32i64: @@ -8107,222 +7911,221 @@ define amdgpu_kernel void @local_sextload_v32i16_to_v32i64(ptr addrspace(3) %out ; VI-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; VI-NO-DS128-NEXT: s_mov_b32 m0, -1 ; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; VI-NO-DS128-NEXT: v_mov_b32_e32 v4, s1 -; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v4 offset0:6 offset1:7 -; VI-NO-DS128-NEXT: ds_read2_b64 v[12:15], v4 offset0:4 offset1:5 -; VI-NO-DS128-NEXT: v_mov_b32_e32 v11, s0 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v3 -; VI-NO-DS128-NEXT: v_bfe_i32 v16, v3, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v18, v5, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 -; VI-NO-DS128-NEXT: ds_read2_b64 v[7:10], v4 offset0:2 offset1:3 -; VI-NO-DS128-NEXT: ds_read2_b64 v[3:6], v4 offset1:1 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[16:17], v[18:19] offset0:30 offset1:31 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v2 -; VI-NO-DS128-NEXT: v_bfe_i32 v16, v16, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v18, v2, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v8, s1 +; VI-NO-DS128-NEXT: ds_read2_b64 v[0:3], v8 offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_read2_b64 v[13:16], v8 offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_read2_b64 v[4:7], v8 offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_read2_b64 v[8:11], v8 offset1:1 +; VI-NO-DS128-NEXT: v_mov_b32_e32 v12, s0 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(2) +; VI-NO-DS128-NEXT: v_bfe_i32 v21, v16, 0, 16 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v3 +; VI-NO-DS128-NEXT: v_bfe_i32 v17, v3, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v19, v18, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v8 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[17:18], v[19:20] offset0:30 offset1:31 +; VI-NO-DS128-NEXT: v_bfe_i32 v17, v3, 0, 16 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v2 +; VI-NO-DS128-NEXT: v_bfe_i32 v18, v3, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[2:3], v[18:19] offset0:28 offset1:29 ; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v1 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[18:19], v[16:17] offset0:28 offset1:29 -; VI-NO-DS128-NEXT: v_bfe_i32 v16, v2, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v1, v1, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 31, v1 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[1:2], v[16:17] offset0:26 offset1:27 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v0 -; VI-NO-DS128-NEXT: v_bfe_i32 v16, v0, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v18, v17, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[16:17], v[18:19] offset0:24 offset1:25 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(6) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v15 -; VI-NO-DS128-NEXT: v_bfe_i32 v16, v16, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v18, v15, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v15, 16, v14 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[18:19], v[16:17] offset0:22 offset1:23 -; VI-NO-DS128-NEXT: v_bfe_i32 v15, v15, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v17, v14, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v13 -; VI-NO-DS128-NEXT: s_waitcnt lgkmcnt(5) -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v4 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[17:18], v[15:16] offset0:20 offset1:21 -; VI-NO-DS128-NEXT: v_bfe_i32 v14, v14, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v16, v13, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; VI-NO-DS128-NEXT: v_bfe_i32 v13, v0, 0, 16 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v5 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[16:17], v[14:15] offset0:18 offset1:19 -; VI-NO-DS128-NEXT: v_bfe_i32 v15, v0, 0, 16 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v12 -; VI-NO-DS128-NEXT: v_bfe_i32 v17, v12, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v19, v1, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[19:20], v[2:3] offset0:26 offset1:27 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; VI-NO-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 ; VI-NO-DS128-NEXT: v_bfe_i32 v19, v0, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v10 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[17:18], v[19:20] offset0:16 offset1:17 -; VI-NO-DS128-NEXT: v_bfe_i32 v17, v0, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v19, v10, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v16 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[19:20], v[2:3] offset0:24 offset1:25 +; VI-NO-DS128-NEXT: v_bfe_i32 v19, v0, 0, 16 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v9 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[19:20], v[17:18] offset0:14 offset1:15 -; VI-NO-DS128-NEXT: v_bfe_i32 v17, v0, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v9, v9, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v8 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[9:10], v[17:18] offset0:12 offset1:13 -; VI-NO-DS128-NEXT: v_bfe_i32 v9, v0, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v17, v8, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v10 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[21:22], v[19:20] offset0:22 offset1:23 +; VI-NO-DS128-NEXT: v_bfe_i32 v19, v0, 0, 16 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v15 +; VI-NO-DS128-NEXT: v_bfe_i32 v20, v0, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v15, v15, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 31, v20 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v14 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[15:16], v[20:21] offset0:20 offset1:21 +; VI-NO-DS128-NEXT: v_bfe_i32 v15, v0, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v21, v14, 0, 16 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v11 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; VI-NO-DS128-NEXT: v_bfe_i32 v14, v0, 0, 16 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v13 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[21:22], v[15:16] offset0:18 offset1:19 +; VI-NO-DS128-NEXT: v_bfe_i32 v15, v0, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v21, v13, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 ; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v7 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[17:18], v[9:10] offset0:10 offset1:11 -; VI-NO-DS128-NEXT: v_bfe_i32 v17, v0, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v19, v7, 0, 16 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v12, 16, v6 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 -; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v3 -; VI-NO-DS128-NEXT: v_bfe_i32 v8, v12, 0, 16 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[19:20], v[17:18] offset0:8 offset1:9 -; VI-NO-DS128-NEXT: v_bfe_i32 v17, v5, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v5, v6, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[21:22], v[15:16] offset0:16 offset1:17 +; VI-NO-DS128-NEXT: v_bfe_i32 v21, v0, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v23, v7, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v4 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[23:24], v[21:22] offset0:14 offset1:15 +; VI-NO-DS128-NEXT: v_bfe_i32 v21, v0, 0, 16 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v6 +; VI-NO-DS128-NEXT: v_bfe_i32 v22, v0, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v6, v6, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v23, 31, v22 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v5 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[6:7], v[22:23] offset0:12 offset1:13 +; VI-NO-DS128-NEXT: v_bfe_i32 v6, v0, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v24, v5, 0, 16 +; VI-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v9 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v25, 31, v24 +; VI-NO-DS128-NEXT: v_bfe_i32 v5, v9, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v3, v11, 0, 16 +; VI-NO-DS128-NEXT: v_bfe_i32 v9, v4, 0, 16 ; VI-NO-DS128-NEXT: v_bfe_i32 v1, v1, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v9, 31, v8 -; VI-NO-DS128-NEXT: v_bfe_i32 v21, v3, 0, 16 -; VI-NO-DS128-NEXT: v_bfe_i32 v3, v4, 0, 16 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v6, 31, v5 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 31, v1 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; VI-NO-DS128-NEXT: v_bfe_i32 v23, v8, 0, 16 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[24:25], v[6:7] offset0:10 offset1:11 +; VI-NO-DS128-NEXT: v_bfe_i32 v7, v10, 0, 16 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v10, 31, v9 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 31, v3 ; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[5:6], v[8:9] offset0:6 offset1:7 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[17:18], v[15:16] offset0:4 offset1:5 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[3:4], v[13:14] offset0:2 offset1:3 -; VI-NO-DS128-NEXT: ds_write2_b64 v11, v[21:22], v[1:2] offset1:1 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 31, v1 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v6, 31, v5 +; VI-NO-DS128-NEXT: v_ashrrev_i32_e32 v8, 31, v7 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[9:10], v[21:22] offset0:8 offset1:9 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[3:4], v[14:15] offset0:6 offset1:7 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[7:8], v[19:20] offset0:4 offset1:5 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[5:6], v[1:2] offset0:2 offset1:3 +; VI-NO-DS128-NEXT: ds_write2_b64 v12, v[23:24], v[17:18] offset1:1 ; VI-NO-DS128-NEXT: s_endpgm ; ; GFX9-NO-DS128-LABEL: local_sextload_v32i16_to_v32i64: ; GFX9-NO-DS128: ; %bb.0: ; GFX9-NO-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v11, s1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v11 offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v11 offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v15, s0 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v12, s1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[4:7], v12 offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[0:3], v12 offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[8:11], v12 offset1:1 +; GFX9-NO-DS128-NEXT: ds_read2_b64 v[12:15], v12 offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: v_mov_b32_e32 v16, s0 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(3) +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v18, 16, v7 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v17, v7, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v19, v18, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 ; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(1) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v7 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v7, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v8, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[7:10], v11 offset1:1 -; GFX9-NO-DS128-NEXT: ds_read2_b64 v[11:14], v11 offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[16:17], v[18:19] offset0:30 offset1:31 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v6 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v16, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v6, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v8 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[17:18], v[19:20] offset0:30 offset1:31 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v17, v7, 0, 16 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v6 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v7, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v6, v6, 0, 16 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[6:7], v[18:19] offset0:28 offset1:29 ; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[18:19], v[16:17] offset0:28 offset1:29 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v6, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v5, v5, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v6, 31, v5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[5:6], v[16:17] offset0:26 offset1:27 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v4 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v17, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(5) +; GFX9-NO-DS128-NEXT: v_bfe_i32 v6, v6, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v19, v5, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[19:20], v[6:7] offset0:26 offset1:27 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v4 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v6, v6, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v19, v4, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 ; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v3 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[16:17], v[18:19] offset0:24 offset1:25 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v4, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v3, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 31, v3 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[3:4], v[16:17] offset0:22 offset1:23 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v2 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[19:20], v[6:7] offset0:24 offset1:25 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v19, v4, 0, 16 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v3, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v2, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 31, v3 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[3:4], v[19:20] offset0:22 offset1:23 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v2 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v19, v4, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v21, v2, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 ; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v1 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[16:17], v[3:4] offset0:20 offset1:21 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v1, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[16:17], v[2:3] offset0:18 offset1:19 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v17, 16, v0 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v0, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v17, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[16:17], v[18:19] offset0:16 offset1:17 -; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(8) -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v16, 16, v14 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v16, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v14, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v14, 16, v13 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[18:19], v[16:17] offset0:14 offset1:15 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v14, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v13, v13, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[13:14], v[16:17] offset0:12 offset1:13 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v13, 16, v12 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v10 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v13, v13, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v12, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v12, v0, 0, 16 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v11 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[16:17], v[13:14] offset0:10 offset1:11 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v0, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v18, v11, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v19, 31, v18 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v7 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v20, 16, v8 -; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v9 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[18:19], v[16:17] offset0:8 offset1:9 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v16, v9, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v9, v10, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[21:22], v[19:20] offset0:20 offset1:21 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v19, v2, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v1, v1, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 31, v1 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[1:2], v[19:20] offset0:18 offset1:19 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v19, v2, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v21, v0, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; GFX9-NO-DS128-NEXT: s_waitcnt lgkmcnt(7) +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v15 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[21:22], v[19:20] offset0:16 offset1:17 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v19, v0, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v21, v15, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v12 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[21:22], v[19:20] offset0:14 offset1:15 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v19, v0, 0, 16 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v14 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v20, v0, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v14, v14, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 31, v20 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v13 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[14:15], v[20:21] offset0:12 offset1:13 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v14, v0, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v21, v13, 0, 16 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v11 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v9 +; GFX9-NO-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v10 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v1, v1, 0, 16 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[21:22], v[14:15] offset0:10 offset1:11 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v11, v11, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v21, v12, 0, 16 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v5, v5, 0, 16 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v1, v20, 0, 16 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v3, v3, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v13, 31, v12 -; GFX9-NO-DS128-NEXT: v_bfe_i32 v20, v7, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 31, v1 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 ; GFX9-NO-DS128-NEXT: v_bfe_i32 v7, v8, 0, 16 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v10, 31, v9 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v13, v9, 0, 16 +; GFX9-NO-DS128-NEXT: v_bfe_i32 v9, v10, 0, 16 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v6, 31, v5 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v2, 31, v1 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v4, 31, v3 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v21, 31, v20 ; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v8, 31, v7 -; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[9:10], v[12:13] offset0:6 offset1:7 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[16:17], v[3:4] offset0:4 offset1:5 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[7:8], v[1:2] offset0:2 offset1:3 -; GFX9-NO-DS128-NEXT: ds_write2_b64 v15, v[20:21], v[5:6] offset1:1 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 +; GFX9-NO-DS128-NEXT: v_ashrrev_i32_e32 v10, 31, v9 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[21:22], v[19:20] offset0:8 offset1:9 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[11:12], v[1:2] offset0:6 offset1:7 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[9:10], v[3:4] offset0:4 offset1:5 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[13:14], v[5:6] offset0:2 offset1:3 +; GFX9-NO-DS128-NEXT: ds_write2_b64 v16, v[7:8], v[17:18] offset1:1 ; GFX9-NO-DS128-NEXT: s_endpgm ; ; EG-LABEL: local_sextload_v32i16_to_v32i64: @@ -8675,221 +8478,221 @@ define amdgpu_kernel void @local_sextload_v32i16_to_v32i64(ptr addrspace(3) %out ; VI-DS128-NEXT: s_waitcnt lgkmcnt(0) ; VI-DS128-NEXT: v_mov_b32_e32 v4, s1 ; VI-DS128-NEXT: ds_read_b128 v[0:3], v4 offset:48 -; VI-DS128-NEXT: ds_read_b128 v[9:12], v4 offset:32 -; VI-DS128-NEXT: v_mov_b32_e32 v8, s0 -; VI-DS128-NEXT: ds_read_b128 v[17:20], v4 offset:16 -; VI-DS128-NEXT: ds_read_b128 v[4:7], v4 +; VI-DS128-NEXT: v_mov_b32_e32 v14, s0 +; VI-DS128-NEXT: ds_read_b128 v[15:18], v4 offset:32 +; VI-DS128-NEXT: ds_read_b128 v[6:9], v4 offset:16 +; VI-DS128-NEXT: ds_read_b128 v[10:13], v4 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(3) -; VI-DS128-NEXT: v_bfe_i32 v13, v2, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v19, v2, 0, 16 ; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; VI-DS128-NEXT: v_bfe_i32 v15, v2, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v3 -; VI-DS128-NEXT: ds_write_b128 v8, v[13:16] offset:224 -; VI-DS128-NEXT: v_bfe_i32 v15, v2, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v13, v3, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v0 -; VI-DS128-NEXT: ds_write_b128 v8, v[13:16] offset:240 -; VI-DS128-NEXT: v_bfe_i32 v15, v2, 0, 16 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v1 -; VI-DS128-NEXT: v_bfe_i32 v13, v0, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v0, v1, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; VI-DS128-NEXT: ds_write_b128 v8, v[0:3] offset:208 +; VI-DS128-NEXT: v_bfe_i32 v21, v2, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; VI-DS128-NEXT: ds_write_b128 v14, v[19:22] offset:224 +; VI-DS128-NEXT: v_bfe_i32 v19, v3, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v3 +; VI-DS128-NEXT: v_bfe_i32 v21, v3, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; VI-DS128-NEXT: ds_write_b128 v14, v[19:22] offset:240 +; VI-DS128-NEXT: v_bfe_i32 v19, v0, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; VI-DS128-NEXT: v_bfe_i32 v21, v0, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v1 +; VI-DS128-NEXT: ds_write_b128 v14, v[19:22] offset:192 +; VI-DS128-NEXT: v_bfe_i32 v19, v1, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v21, v0, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 ; VI-DS128-NEXT: s_waitcnt lgkmcnt(5) -; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v11 -; VI-DS128-NEXT: v_bfe_i32 v0, v11, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; VI-DS128-NEXT: ds_write_b128 v8, v[0:3] offset:160 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v12 -; VI-DS128-NEXT: v_bfe_i32 v0, v12, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; VI-DS128-NEXT: ds_write_b128 v8, v[0:3] offset:176 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v9 -; VI-DS128-NEXT: v_bfe_i32 v0, v9, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v1, 31, v0 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v17 +; VI-DS128-NEXT: ds_write_b128 v14, v[19:22] offset:208 +; VI-DS128-NEXT: v_bfe_i32 v20, v17, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v22, v0, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v21, 31, v20 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v23, 31, v22 +; VI-DS128-NEXT: s_waitcnt lgkmcnt(4) +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v10 +; VI-DS128-NEXT: ds_write_b128 v14, v[20:23] offset:160 +; VI-DS128-NEXT: v_bfe_i32 v21, v0, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v18 +; VI-DS128-NEXT: v_bfe_i32 v22, v18, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v24, v0, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v23, 31, v22 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v25, 31, v24 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v15 +; VI-DS128-NEXT: ds_write_b128 v14, v[22:25] offset:176 +; VI-DS128-NEXT: v_bfe_i32 v23, v15, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v25, v0, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v16 +; VI-DS128-NEXT: ds_write_b128 v14, v[23:26] offset:128 +; VI-DS128-NEXT: v_bfe_i32 v23, v16, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v25, v0, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v13 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; VI-DS128-NEXT: v_bfe_i32 v17, v0, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v8 +; VI-DS128-NEXT: ds_write_b128 v14, v[23:26] offset:144 +; VI-DS128-NEXT: v_bfe_i32 v23, v8, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v25, v0, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v9 +; VI-DS128-NEXT: ds_write_b128 v14, v[23:26] offset:96 +; VI-DS128-NEXT: v_bfe_i32 v23, v9, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v25, v0, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v6 +; VI-DS128-NEXT: ds_write_b128 v14, v[23:26] offset:112 +; VI-DS128-NEXT: v_bfe_i32 v23, v6, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v25, v0, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v12 +; VI-DS128-NEXT: v_bfe_i32 v19, v10, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; VI-DS128-NEXT: v_bfe_i32 v10, v0, 0, 16 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v7 +; VI-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v11 +; VI-DS128-NEXT: v_bfe_i32 v8, v12, 0, 16 +; VI-DS128-NEXT: ds_write_b128 v14, v[23:26] offset:64 +; VI-DS128-NEXT: v_bfe_i32 v23, v7, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v25, v0, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v2, v11, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v4, v4, 0, 16 +; VI-DS128-NEXT: v_bfe_i32 v15, v13, 0, 16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v9, 31, v8 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v11, 31, v10 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; VI-DS128-NEXT: ds_write_b128 v8, v[0:3] offset:128 -; VI-DS128-NEXT: s_waitcnt lgkmcnt(6) -; VI-DS128-NEXT: v_bfe_i32 v0, v5, 0, 16 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v5 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v10 -; VI-DS128-NEXT: v_bfe_i32 v9, v10, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v11, v5, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v19 -; VI-DS128-NEXT: ds_write_b128 v8, v[9:12] offset:144 -; VI-DS128-NEXT: v_bfe_i32 v9, v19, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v11, v5, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v20 -; VI-DS128-NEXT: ds_write_b128 v8, v[9:12] offset:96 -; VI-DS128-NEXT: v_bfe_i32 v9, v20, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v11, v5, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v5, 16, v17 -; VI-DS128-NEXT: ds_write_b128 v8, v[9:12] offset:112 -; VI-DS128-NEXT: v_bfe_i32 v9, v17, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v11, v5, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; VI-DS128-NEXT: ds_write_b128 v8, v[9:12] offset:64 -; VI-DS128-NEXT: v_bfe_i32 v9, v4, 0, 16 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v4 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; VI-DS128-NEXT: v_bfe_i32 v11, v4, 0, 16 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v18 -; VI-DS128-NEXT: ds_write_b128 v8, v[13:16] offset:192 -; VI-DS128-NEXT: v_bfe_i32 v13, v18, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v15, v4, 0, 16 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; VI-DS128-NEXT: ds_write_b128 v8, v[13:16] offset:80 -; VI-DS128-NEXT: v_bfe_i32 v13, v7, 0, 16 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v7 -; VI-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v6 -; VI-DS128-NEXT: v_bfe_i32 v15, v4, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v4, v6, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v6, v7, 0, 16 -; VI-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v1, 31, v0 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v10, 31, v9 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v12, 31, v11 -; VI-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 ; VI-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; VI-DS128-NEXT: ds_write_b128 v8, v[4:7] offset:32 -; VI-DS128-NEXT: ds_write_b128 v8, v[13:16] offset:48 -; VI-DS128-NEXT: ds_write_b128 v8, v[9:12] -; VI-DS128-NEXT: ds_write_b128 v8, v[0:3] offset:16 +; VI-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 +; VI-DS128-NEXT: ds_write_b128 v14, v[23:26] offset:80 +; VI-DS128-NEXT: ds_write_b128 v14, v[8:11] offset:32 +; VI-DS128-NEXT: ds_write_b128 v14, v[15:18] offset:48 +; VI-DS128-NEXT: ds_write_b128 v14, v[19:22] +; VI-DS128-NEXT: ds_write_b128 v14, v[2:5] offset:16 ; VI-DS128-NEXT: s_endpgm ; ; GFX9-DS128-LABEL: local_sextload_v32i16_to_v32i64: ; GFX9-DS128: ; %bb.0: ; GFX9-DS128-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-DS128-NEXT: v_mov_b32_e32 v13, s1 -; GFX9-DS128-NEXT: ds_read_b128 v[4:7], v13 offset:48 -; GFX9-DS128-NEXT: ds_read_b128 v[0:3], v13 offset:32 -; GFX9-DS128-NEXT: v_mov_b32_e32 v12, s0 -; GFX9-DS128-NEXT: ds_read_b128 v[8:11], v13 -; GFX9-DS128-NEXT: ds_read_b128 v[18:21], v13 offset:16 +; GFX9-DS128-NEXT: v_mov_b32_e32 v8, s1 +; GFX9-DS128-NEXT: ds_read_b128 v[4:7], v8 offset:48 +; GFX9-DS128-NEXT: ds_read_b128 v[0:3], v8 offset:32 +; GFX9-DS128-NEXT: v_mov_b32_e32 v18, s0 +; GFX9-DS128-NEXT: ds_read_b128 v[14:17], v8 +; GFX9-DS128-NEXT: ds_read_b128 v[10:13], v8 offset:16 ; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(3) -; GFX9-DS128-NEXT: v_bfe_i32 v14, v6, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v19, v6, 0, 16 ; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v6 -; GFX9-DS128-NEXT: v_bfe_i32 v16, v6, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v17, 31, v16 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v7 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[14:17] offset:224 -; GFX9-DS128-NEXT: v_bfe_i32 v15, v6, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v13, v7, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v4 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[13:16] offset:240 -; GFX9-DS128-NEXT: v_bfe_i32 v15, v6, 0, 16 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v6, 16, v5 -; GFX9-DS128-NEXT: v_bfe_i32 v13, v4, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v4, v5, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v6, v6, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[4:7] offset:208 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(5) -; GFX9-DS128-NEXT: v_bfe_i32 v4, v2, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v21, v6, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[19:22] offset:224 +; GFX9-DS128-NEXT: v_bfe_i32 v19, v7, 0, 16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v7, 16, v7 +; GFX9-DS128-NEXT: v_bfe_i32 v21, v7, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[19:22] offset:240 +; GFX9-DS128-NEXT: v_bfe_i32 v19, v4, 0, 16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v4 +; GFX9-DS128-NEXT: v_bfe_i32 v21, v4, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v5 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[19:22] offset:192 +; GFX9-DS128-NEXT: v_bfe_i32 v19, v5, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v21, v4, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[19:22] offset:208 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(6) +; GFX9-DS128-NEXT: v_bfe_i32 v20, v2, 0, 16 ; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-DS128-NEXT: v_bfe_i32 v6, v2, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; GFX9-DS128-NEXT: v_bfe_i32 v22, v2, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v21, 31, v20 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v23, 31, v22 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(5) +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v14 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[20:23] offset:160 +; GFX9-DS128-NEXT: v_bfe_i32 v21, v2, 0, 16 ; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v3 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[4:7] offset:160 -; GFX9-DS128-NEXT: v_bfe_i32 v4, v3, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v6, v2, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 +; GFX9-DS128-NEXT: v_bfe_i32 v24, v2, 0, 16 ; GFX9-DS128-NEXT: v_bfe_i32 v2, v0, 0, 16 ; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[4:7] offset:176 ; GFX9-DS128-NEXT: v_bfe_i32 v4, v0, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v22, v3, 0, 16 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(6) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v9 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[2:5] offset:128 -; GFX9-DS128-NEXT: v_bfe_i32 v4, v0, 0, 16 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v1 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[13:16] offset:192 -; GFX9-DS128-NEXT: v_bfe_i32 v13, v1, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v15, v0, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(7) -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v20 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[13:16] offset:144 -; GFX9-DS128-NEXT: v_bfe_i32 v13, v20, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v15, v0, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v21 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[13:16] offset:96 -; GFX9-DS128-NEXT: v_bfe_i32 v13, v21, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v15, v0, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v18 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[13:16] offset:112 -; GFX9-DS128-NEXT: v_bfe_i32 v13, v18, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v15, v0, 0, 16 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v8 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GFX9-DS128-NEXT: v_bfe_i32 v6, v8, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v8, v0, 0, 16 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v19 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[13:16] offset:64 -; GFX9-DS128-NEXT: v_bfe_i32 v13, v19, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v15, v0, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v11 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[13:16] offset:80 -; GFX9-DS128-NEXT: v_bfe_i32 v15, v0, 0, 16 -; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v0, 16, v10 -; GFX9-DS128-NEXT: v_bfe_i32 v17, v10, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v19, v0, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v2, v9, 0, 16 -; GFX9-DS128-NEXT: v_bfe_i32 v13, v11, 0, 16 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v18, 31, v17 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[2:5] offset:128 +; GFX9-DS128-NEXT: v_bfe_i32 v2, v1, 0, 16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v1, 16, v1 +; GFX9-DS128-NEXT: v_bfe_i32 v4, v1, 0, 16 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v5, 31, v4 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v23, 31, v22 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v25, 31, v24 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[2:5] offset:144 +; GFX9-DS128-NEXT: s_waitcnt lgkmcnt(7) +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v3, 16, v12 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[22:25] offset:176 +; GFX9-DS128-NEXT: v_bfe_i32 v23, v12, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v25, v3, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v13 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[23:26] offset:96 +; GFX9-DS128-NEXT: v_bfe_i32 v23, v13, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v25, v4, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v10 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[23:26] offset:112 +; GFX9-DS128-NEXT: v_bfe_i32 v23, v10, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v25, v4, 0, 16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v16 +; GFX9-DS128-NEXT: v_bfe_i32 v19, v14, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; GFX9-DS128-NEXT: v_bfe_i32 v14, v4, 0, 16 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v4, 16, v11 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v8, 16, v15 +; GFX9-DS128-NEXT: v_lshrrev_b32_e32 v2, 16, v17 +; GFX9-DS128-NEXT: v_bfe_i32 v12, v16, 0, 16 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[23:26] offset:64 +; GFX9-DS128-NEXT: v_bfe_i32 v23, v11, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v25, v4, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v6, v15, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v8, v8, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v0, v17, 0, 16 +; GFX9-DS128-NEXT: v_bfe_i32 v2, v2, 0, 16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v13, 31, v12 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v24, 31, v23 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v26, 31, v25 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v15, 31, v14 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v7, 31, v6 ; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v9, 31, v8 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v14, 31, v13 -; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v16, 31, v15 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[17:20] offset:32 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[13:16] offset:48 -; GFX9-DS128-NEXT: ds_write_b128 v12, v[6:9] -; GFX9-DS128-NEXT: ds_write_b128 v12, v[2:5] offset:16 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v20, 31, v19 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v22, 31, v21 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v1, 31, v0 +; GFX9-DS128-NEXT: v_ashrrev_i32_e32 v3, 31, v2 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[23:26] offset:80 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[12:15] offset:32 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[0:3] offset:48 +; GFX9-DS128-NEXT: ds_write_b128 v18, v[19:22] +; GFX9-DS128-NEXT: ds_write_b128 v18, v[6:9] offset:16 ; GFX9-DS128-NEXT: s_endpgm %load = load <32 x i16>, ptr addrspace(3) %in %ext = sext <32 x i16> %load to <32 x i64> diff --git a/llvm/test/CodeGen/AMDGPU/machine-scheduler-rematerialization-scoring.mir b/llvm/test/CodeGen/AMDGPU/machine-scheduler-rematerialization-scoring.mir index cf186d0588afc..0bfcb638038fd 100644 --- a/llvm/test/CodeGen/AMDGPU/machine-scheduler-rematerialization-scoring.mir +++ b/llvm/test/CodeGen/AMDGPU/machine-scheduler-rematerialization-scoring.mir @@ -432,8 +432,8 @@ body: | ; CHECK-NEXT: [[V_CVT_I32_F64_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode ; CHECK-NEXT: [[V_CVT_I32_F64_e32_30:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode ; CHECK-NEXT: [[V_CVT_I32_F64_e32_31:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode - ; CHECK-NEXT: [[V_CVT_I32_F64_e32_32:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode ; CHECK-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_24]], implicit [[V_CVT_I32_F64_e32_25]], implicit [[V_CVT_I32_F64_e32_26]], implicit [[V_CVT_I32_F64_e32_27]], implicit [[V_CVT_I32_F64_e32_28]], implicit [[V_CVT_I32_F64_e32_29]], implicit [[V_CVT_I32_F64_e32_30]], implicit [[V_CVT_I32_F64_e32_31]] + ; CHECK-NEXT: [[V_CVT_I32_F64_e32_32:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode ; CHECK-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_32]], implicit [[V_CVT_I32_F64_e32_]], implicit [[V_CVT_I32_F64_e32_1]], implicit [[V_CVT_I32_F64_e32_2]], implicit [[V_CVT_I32_F64_e32_3]], implicit [[V_CVT_I32_F64_e32_4]], implicit [[V_CVT_I32_F64_e32_5]], implicit [[V_CVT_I32_F64_e32_6]] ; CHECK-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_7]], implicit [[V_CVT_I32_F64_e32_8]], implicit [[V_CVT_I32_F64_e32_9]], implicit [[V_CVT_I32_F64_e32_10]], implicit [[V_CVT_I32_F64_e32_11]], implicit [[V_CVT_I32_F64_e32_12]], implicit [[V_CVT_I32_F64_e32_13]], implicit [[V_CVT_I32_F64_e32_14]] ; CHECK-NEXT: S_BRANCH %bb.1 diff --git a/llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir b/llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir index b6157fb8c0a95..88e32a8411ab0 100644 --- a/llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir +++ b/llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir @@ -352,8 +352,8 @@ body: | ; GFX908-NEXT: successors: %bb.2(0x80000000) ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: [[V_CVT_I32_F64_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_23]] + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_24]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.2: @@ -510,8 +510,8 @@ body: | ; GFX908-NEXT: successors: %bb.2(0x80000000) ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: [[V_CVT_I32_F64_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_23]] + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_24]], implicit [[V_CVT_I32_F64_e32_22]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.2: @@ -665,8 +665,8 @@ body: | ; GFX908-NEXT: successors: %bb.2(0x80000000) ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: [[V_CVT_I32_F64_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_23]] + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_24]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.2: @@ -678,8 +678,8 @@ body: | ; GFX908-NEXT: successors: %bb.4(0x80000000) ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: [[V_CVT_I32_F64_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_25]] + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_26]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.4: @@ -861,23 +861,23 @@ body: | ; GFX908-NEXT: successors: %bb.2(0x80000000) ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: [[V_CVT_I32_F64_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_22]] ; GFX908-NEXT: [[V_CVT_I32_F64_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode ; GFX908-NEXT: [[V_CVT_I32_F64_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_22]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_24]], implicit [[V_CVT_I32_F64_e32_23]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.2: ; GFX908-NEXT: successors: %bb.3(0x80000000) ; GFX908-NEXT: {{ $}} - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.3: ; GFX908-NEXT: successors: %bb.4(0x80000000) ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: [[V_CVT_I32_F64_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_26]] + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_27]], implicit [[V_CVT_I32_F64_e32_25]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.4: @@ -1677,22 +1677,22 @@ body: | ; GFX908-NEXT: [[S_MOV_B32_70:%[0-9]+]]:sgpr_32 = S_MOV_B32 69 ; GFX908-NEXT: [[S_MOV_B32_71:%[0-9]+]]:sgpr_32 = S_MOV_B32 70 ; GFX908-NEXT: [[S_MOV_B32_72:%[0-9]+]]:sgpr_32 = S_MOV_B32 71 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_73:%[0-9]+]]:sgpr_32 = S_MOV_B32 72 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_74:%[0-9]+]]:sgpr_32 = S_MOV_B32 73 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_75:%[0-9]+]]:sgpr_32 = S_MOV_B32 74 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_76:%[0-9]+]]:sgpr_32 = S_MOV_B32 75 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_77:%[0-9]+]]:sgpr_32 = S_MOV_B32 76 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_78:%[0-9]+]]:sgpr_32 = S_MOV_B32 77 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_79:%[0-9]+]]:sgpr_32 = S_MOV_B32 78 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 26, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_80:%[0-9]+]]:sgpr_32 = S_MOV_B32 79 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_81:%[0-9]+]]:sgpr_32 = S_MOV_B32 80 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 29, implicit $exec, implicit $mode, implicit-def $m0 @@ -2395,9 +2395,8 @@ body: | ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = S_MOV_B32 0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec - ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 @@ -2415,7 +2414,6 @@ body: | ; GFX908-NEXT: [[V_CVT_I32_F64_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sgpr_32 = S_MOV_B32 8 ; GFX908-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sgpr_32 = S_MOV_B32 9 ; GFX908-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sgpr_32 = S_MOV_B32 10 @@ -2480,16 +2478,18 @@ body: | ; GFX908-NEXT: [[S_MOV_B32_62:%[0-9]+]]:sgpr_32 = S_MOV_B32 69 ; GFX908-NEXT: [[S_MOV_B32_63:%[0-9]+]]:sgpr_32 = S_MOV_B32 70 ; GFX908-NEXT: [[S_MOV_B32_64:%[0-9]+]]:sgpr_32 = S_MOV_B32 71 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_65:%[0-9]+]]:sgpr_32 = S_MOV_B32 72 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_66:%[0-9]+]]:sgpr_32 = S_MOV_B32 73 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_67:%[0-9]+]]:sgpr_32 = S_MOV_B32 74 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_68:%[0-9]+]]:sgpr_32 = S_MOV_B32 75 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_69:%[0-9]+]]:sgpr_32 = S_MOV_B32 76 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_70:%[0-9]+]]:sgpr_32 = S_MOV_B32 77 + ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode ; GFX908-NEXT: [[S_MOV_B32_71:%[0-9]+]]:sgpr_32 = S_MOV_B32 78 ; GFX908-NEXT: [[S_MOV_B32_72:%[0-9]+]]:sgpr_32 = S_MOV_B32 79 ; GFX908-NEXT: [[S_MOV_B32_73:%[0-9]+]]:sgpr_32 = S_MOV_B32 80 @@ -3003,9 +3003,8 @@ body: | ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = S_MOV_B32 0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec - ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 @@ -3023,7 +3022,6 @@ body: | ; GFX908-NEXT: [[V_CVT_I32_F64_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sgpr_32 = S_MOV_B32 12 ; GFX908-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sgpr_32 = S_MOV_B32 13 ; GFX908-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sgpr_32 = S_MOV_B32 14 @@ -3084,16 +3082,18 @@ body: | ; GFX908-NEXT: [[S_MOV_B32_58:%[0-9]+]]:sgpr_32 = S_MOV_B32 69 ; GFX908-NEXT: [[S_MOV_B32_59:%[0-9]+]]:sgpr_32 = S_MOV_B32 70 ; GFX908-NEXT: [[S_MOV_B32_60:%[0-9]+]]:sgpr_32 = S_MOV_B32 71 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_61:%[0-9]+]]:sgpr_32 = S_MOV_B32 72 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_62:%[0-9]+]]:sgpr_32 = S_MOV_B32 73 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_63:%[0-9]+]]:sgpr_32 = S_MOV_B32 74 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_64:%[0-9]+]]:sgpr_32 = S_MOV_B32 75 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_65:%[0-9]+]]:sgpr_32 = S_MOV_B32 76 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[S_MOV_B32_66:%[0-9]+]]:sgpr_32 = S_MOV_B32 77 + ; GFX908-NEXT: [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode ; GFX908-NEXT: [[S_MOV_B32_67:%[0-9]+]]:sgpr_32 = S_MOV_B32 78 ; GFX908-NEXT: [[S_MOV_B32_68:%[0-9]+]]:sgpr_32 = S_MOV_B32 79 ; GFX908-NEXT: [[S_MOV_B32_69:%[0-9]+]]:sgpr_32 = S_MOV_B32 80 @@ -3656,8 +3656,8 @@ body: | ; GFX908-NEXT: bb.2: ; GFX908-NEXT: successors: %bb.3(0x80000000) ; GFX908-NEXT: {{ $}} - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_23]] + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 25, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0 ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.3: @@ -4426,8 +4426,8 @@ body: | ; GFX908-NEXT: successors: %bb.3(0x80000000) ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: [[V_CVT_I32_F64_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 28, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_27]] + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 27, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_28]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.3: @@ -4691,8 +4691,8 @@ body: | ; GFX908-NEXT: successors: %bb.3(0x80000000) ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: [[V_CVT_I32_F64_e32_31:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 32, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_32:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_31]] + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_32:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 31, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_32]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.3: @@ -4974,8 +4974,8 @@ body: | ; GFX908-NEXT: successors: %bb.3(0x80000000) ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: [[V_CVT_I32_F64_e32_35:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 36, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_36:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_35]] + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_36:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 35, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_36]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.3: @@ -8289,20 +8289,20 @@ body: | ; GFX908-NEXT: [[V_CVT_I32_F64_e32_13:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_14:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_15:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: undef [[V_CVT_I32_F64_e32_16:%[0-9]+]].sub0:vreg_128 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_16:%[0-9]+]].sub1:vreg_128 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: undef [[V_CVT_I32_F64_e32_21:%[0-9]+]].sub0:vreg_128 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]].sub1:vreg_128 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.1: ; GFX908-NEXT: successors: %bb.2(0x80000000) ; GFX908-NEXT: {{ $}} - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_16:%[0-9]+]].sub2:vreg_128 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_16:%[0-9]+]].sub3:vreg_128 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_16]] + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]].sub2:vreg_128 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]].sub3:vreg_128 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_21]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.2: ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_]], implicit [[V_CVT_I32_F64_e32_1]] @@ -8313,9 +8313,9 @@ body: | ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_10]], implicit [[V_CVT_I32_F64_e32_11]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_12]], implicit [[V_CVT_I32_F64_e32_13]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_14]], implicit [[V_CVT_I32_F64_e32_15]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_17]], implicit [[V_CVT_I32_F64_e32_18]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_19]], implicit [[V_CVT_I32_F64_e32_20]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_21]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_16]], implicit [[V_CVT_I32_F64_e32_17]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_18]], implicit [[V_CVT_I32_F64_e32_19]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_20]] ; GFX908-NEXT: S_ENDPGM 0 ; ; GFX908-GCNTRACKERS-LABEL: name: test_no_sink_two_subregs_in_def_block @@ -8607,8 +8607,8 @@ body: | ; GFX908-NEXT: successors: %bb.2(0x80000000) ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: [[V_CVT_I32_F64_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_F64_I32_e32_:%[0-9]+]]:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_22]] + ; GFX908-NEXT: [[V_CVT_F64_I32_e32_:%[0-9]+]]:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_F64_I32_e32_]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.2: @@ -8760,8 +8760,8 @@ body: | ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: [[V_CVT_I32_F64_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: [[V_CVT_F64_I32_e32_:%[0-9]+]]:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_22]], implicit [[V_CVT_I32_F64_e32_23]] + ; GFX908-NEXT: [[V_CVT_F64_I32_e32_:%[0-9]+]]:vreg_64 = nofpexcept V_CVT_F64_I32_e32 22, implicit $exec, implicit $mode ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_F64_I32_e32_]] ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.2: @@ -11046,8 +11046,6 @@ body: | ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = S_MOV_B32 0 - ; GFX908-NEXT: $vgpr8 = IMPLICIT_DEF - ; GFX908-NEXT: $vgpr9 = IMPLICIT_DEF ; GFX908-NEXT: dead [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF @@ -11066,73 +11064,75 @@ body: | ; GFX908-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF16:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF17:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF17]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF18:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF19:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec - ; GFX908-NEXT: dead undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 $vgpr8, implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 $vgpr9, implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF1]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF2]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_5:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF3]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_6:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF4]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_7:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF5]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_8:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF6]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_9:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF7]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_10:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF8]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_11:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF9]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_12:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF10]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_13:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF11]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_14:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF12]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_15:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF13]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF14]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF15]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF16]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF18]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF19]], implicit $exec, implicit $mode + ; GFX908-NEXT: dead [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF19]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF20:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF20]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF21:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF21]], implicit $exec, implicit $mode + ; GFX908-NEXT: dead [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec + ; GFX908-NEXT: dead undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF1]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF2]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF3]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF4]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_5:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF5]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_6:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF6]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_7:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF7]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_8:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF8]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_9:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF9]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_10:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF10]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_11:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF11]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_12:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF12]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_13:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF13]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_14:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF14]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_15:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF15]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF16]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF17]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF18]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF20]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF21]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF22:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF22]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF22]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF23:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF23]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF23]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF24:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF24]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF24]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF25:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF25]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF25]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF26:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF26]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF26]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF27:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF27]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF27]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF28:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF28]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF28]], implicit $exec, implicit $mode + ; GFX908-NEXT: $vgpr8 = IMPLICIT_DEF + ; GFX908-NEXT: $vgpr9 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF29:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 $vgpr8, implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 $vgpr9, implicit $exec, implicit $mode ; GFX908-NEXT: [[V_CVT_I32_F32_e32_30:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF29]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF30:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: S_BRANCH %bb.1 ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.1: - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_3]], implicit [[V_CVT_I32_F32_e32_11]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_1]], implicit [[V_CVT_I32_F32_e32_9]] ; GFX908-NEXT: [[V_CVT_I32_F32_e32_31:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF30]], implicit $exec, implicit $mode - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_1]], implicit [[V_CVT_I32_F32_e32_31]], implicit [[DEF30]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_2]], implicit [[V_CVT_I32_F32_e32_30]], implicit [[DEF29]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_28]], implicit [[V_CVT_I32_F32_e32_31]], implicit [[DEF30]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_29]], implicit [[V_CVT_I32_F32_e32_30]], implicit [[DEF29]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_2]], implicit [[V_CVT_I32_F32_e32_10]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_3]], implicit [[V_CVT_I32_F32_e32_11]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_4]], implicit [[V_CVT_I32_F32_e32_12]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_5]], implicit [[V_CVT_I32_F32_e32_13]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_6]], implicit [[V_CVT_I32_F32_e32_14]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_7]], implicit [[V_CVT_I32_F32_e32_15]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_8]], implicit [[V_CVT_I32_F32_e32_16]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_9]], implicit [[V_CVT_I32_F32_e32_17]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_10]], implicit [[V_CVT_I32_F32_e32_18]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_17]], implicit [[V_CVT_I32_F32_e32_18]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_19]], implicit [[V_CVT_I32_F32_e32_20]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_19]], implicit [[V_CVT_I32_F32_e32_20]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_21]], implicit [[V_CVT_I32_F32_e32_22]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_21]], implicit [[V_CVT_I32_F32_e32_22]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_23]], implicit [[V_CVT_I32_F32_e32_24]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_25]], implicit [[V_CVT_I32_F32_e32_26]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_27]], implicit [[V_CVT_I32_F32_e32_28]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_29]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_27]] ; GFX908-NEXT: S_ENDPGM 0 ; ; GFX908-GCNTRACKERS-LABEL: name: test_occ_8_physreg_use @@ -11362,9 +11362,11 @@ body: | ; GFX908-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF16:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF17:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF17]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF18:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF19:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: dead [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF19]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[DEF20:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: [[DEF21:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: dead [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec ; GFX908-NEXT: dead undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 ; GFX908-NEXT: [[V_CVT_I32_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF1]], implicit $exec, implicit $mode @@ -11383,11 +11385,9 @@ body: | ; GFX908-NEXT: [[V_CVT_I32_F32_e32_14:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF14]], implicit $exec, implicit $mode ; GFX908-NEXT: [[V_CVT_I32_F32_e32_15:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF15]], implicit $exec, implicit $mode ; GFX908-NEXT: [[V_CVT_I32_F32_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF16]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF18]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF19]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[DEF20:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF17]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF18]], implicit $exec, implicit $mode ; GFX908-NEXT: [[V_CVT_I32_F32_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF20]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[DEF21:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[V_CVT_I32_F32_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF21]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF22:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[V_CVT_I32_F32_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF22]], implicit $exec, implicit $mode @@ -11404,21 +11404,21 @@ body: | ; GFX908-NEXT: [[DEF28:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[V_CVT_I32_F32_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF28]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF29:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: [[DEF30:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF29]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF30]], implicit $exec, implicit $mode ; GFX908-NEXT: $vgpr8 = IMPLICIT_DEF ; GFX908-NEXT: $vgpr9 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF30:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 2, implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF29]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_30:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF30]], implicit $exec, implicit $mode ; GFX908-NEXT: S_BRANCH %bb.1 ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.1: ; GFX908-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 255 ; GFX908-NEXT: [[S_AND_SAVEEXEC_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_SAVEEXEC_B64 [[S_MOV_B64_]], implicit-def $exec, implicit-def $scc, implicit $exec ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_1]], implicit [[V_CVT_I32_F32_e32_9]] - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_31:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 1, implicit $exec, implicit $mode - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_31]], implicit [[V_CVT_I32_F32_e32_29]], implicit [[DEF29]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_28]], implicit [[V_CVT_I32_F32_e32_30]], implicit [[DEF30]] + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_30:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 1, implicit $exec, implicit $mode + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_30]], implicit [[V_CVT_I32_F32_e32_28]], implicit [[DEF29]] + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_31:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 2, implicit $exec, implicit $mode + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_31]], implicit [[V_CVT_I32_F32_e32_29]], implicit [[DEF30]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_2]], implicit [[V_CVT_I32_F32_e32_10]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_3]], implicit [[V_CVT_I32_F32_e32_11]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_4]], implicit [[V_CVT_I32_F32_e32_12]] @@ -12240,85 +12240,85 @@ body: | ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) - ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = S_MOV_B32 0 - ; GFX908-NEXT: undef [[DEF:%[0-9]+]].sub0:vreg_512 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF:%[0-9]+]].sub1:vreg_512 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF:%[0-9]+]].sub2:vreg_512 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF:%[0-9]+]].sub3:vreg_512 = IMPLICIT_DEF + ; GFX908-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF3]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF4:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF5:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[DEF6:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec - ; GFX908-NEXT: dead undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF1]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF2]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF4]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF5]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[DEF6:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_5:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF7]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_6:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF8]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF9:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_7:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF9]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF10:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_8:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF10]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_9:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF11]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_10:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF12]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF13:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_11:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF13]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF14:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_12:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF14]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_13:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF15]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF16:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_14:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF16]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF17:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_15:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF17]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF18:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF18]], implicit $exec, implicit $mode + ; GFX908-NEXT: dead [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF18]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF19:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF19]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF20:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF20]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF1]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF2]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF3]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_5:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF4]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_6:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF5]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_7:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF6]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_8:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF7]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_9:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF8]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_10:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF9]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_11:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF10]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_12:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF11]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_13:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF12]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_14:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF13]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_15:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF14]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF15]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF16]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF17]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF19]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF20]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF21:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF21]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[DEF22:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF22]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF21]], implicit $exec, implicit $mode + ; GFX908-NEXT: undef [[DEF22:%[0-9]+]].sub0:vreg_512 = IMPLICIT_DEF + ; GFX908-NEXT: [[DEF22:%[0-9]+]].sub2:vreg_512 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF23:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF23]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF24:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF25:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF26:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF27:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF22]].sub0, implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF23]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF22]].sub2, implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF24]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF25]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF26]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF27]], implicit $exec, implicit $mode + ; GFX908-NEXT: dead [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec ; GFX908-NEXT: [[DEF28:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF29:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = S_MOV_B32 0 + ; GFX908-NEXT: [[DEF22:%[0-9]+]].sub1:vreg_512 = IMPLICIT_DEF + ; GFX908-NEXT: [[DEF22:%[0-9]+]].sub3:vreg_512 = IMPLICIT_DEF + ; GFX908-NEXT: dead [[DEF29:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: dead undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 ; GFX908-NEXT: [[DEF30:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF31:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF24]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF25]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF26]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF27]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF]].sub2, implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF28]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF29]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF30]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_30:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF31]], implicit $exec, implicit $mode ; GFX908-NEXT: S_BRANCH %bb.1 ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.1: ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_1]], implicit [[V_CVT_I32_F32_e32_6]] - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_31:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF]].sub0, implicit $exec, implicit $mode - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_31]], implicit [[V_CVT_I32_F32_e32_26]], implicit [[DEF]].sub0, implicit [[DEF]].sub2 - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_22]], implicit [[V_CVT_I32_F32_e32_27]], implicit [[DEF24]], implicit [[DEF28]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_23]], implicit [[V_CVT_I32_F32_e32_28]], implicit [[DEF25]], implicit [[DEF29]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_24]], implicit [[V_CVT_I32_F32_e32_29]], implicit [[DEF26]], implicit [[DEF30]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_25]], implicit [[V_CVT_I32_F32_e32_30]], implicit [[DEF27]], implicit [[DEF31]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_22]], implicit [[V_CVT_I32_F32_e32_24]], implicit [[DEF22]].sub0, implicit [[DEF22]].sub2 + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF28]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_30:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF30]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_31:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF31]], implicit $exec, implicit $mode + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_29]], implicit [[V_CVT_I32_F32_e32_25]], implicit [[DEF28]], implicit [[DEF24]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_30]], implicit [[V_CVT_I32_F32_e32_26]], implicit [[DEF30]], implicit [[DEF25]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_31]], implicit [[V_CVT_I32_F32_e32_27]], implicit [[DEF31]], implicit [[DEF26]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_23]], implicit [[V_CVT_I32_F32_e32_28]], implicit [[DEF23]], implicit [[DEF27]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_2]], implicit [[V_CVT_I32_F32_e32_7]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_3]], implicit [[V_CVT_I32_F32_e32_8]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_4]], implicit [[V_CVT_I32_F32_e32_9]] @@ -12544,58 +12544,55 @@ body: | ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) - ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = S_MOV_B32 0 ; GFX908-NEXT: undef [[DEF:%[0-9]+]].sub0:vreg_512 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF:%[0-9]+]].sub1:vreg_512 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF:%[0-9]+]].sub2:vreg_512 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF:%[0-9]+]].sub3:vreg_512 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF3]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF4:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF5:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[DEF6:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec - ; GFX908-NEXT: dead undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF1]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF2]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF4]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF5]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[DEF6:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_5:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF7]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_6:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF8]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF9:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_7:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF9]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF10:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_8:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF10]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_9:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF11]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_10:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF12]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF13:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_11:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF13]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF14:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_12:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF14]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_13:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF15]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF16:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_14:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF16]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF17:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_15:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF17]], implicit $exec, implicit $mode + ; GFX908-NEXT: dead [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF17]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF18:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF18]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF19:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF19]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF]].sub0, implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF1]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF2]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF3]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_5:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF4]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_6:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF5]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_7:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF]].sub2, implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_8:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF6]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_9:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF7]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_10:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF8]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_11:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF9]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_12:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF10]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_13:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF11]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_14:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF12]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_15:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF13]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF14]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF15]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF16]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF18]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF19]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF20:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF20]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF20]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF21:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF21]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF21]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF22:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF22]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF22]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF23:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF23]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF24:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF25:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF26:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF @@ -12603,37 +12600,40 @@ body: | ; GFX908-NEXT: [[DEF28:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF29:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF30:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF31:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF]].sub0, implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF24]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF25]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF26]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF27]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF]].sub2, implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF28]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF29]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_30:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF30]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_31:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF31]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF23]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF24]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF25]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF26]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF27]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF28]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_30:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF29]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_31:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF30]], implicit $exec, implicit $mode + ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = S_MOV_B32 0 + ; GFX908-NEXT: dead [[DEF31:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: dead [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec + ; GFX908-NEXT: dead undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 + ; GFX908-NEXT: undef [[DEF:%[0-9]+]].sub1:vreg_512 = IMPLICIT_DEF + ; GFX908-NEXT: [[DEF:%[0-9]+]].sub3:vreg_512 = IMPLICIT_DEF ; GFX908-NEXT: S_BRANCH %bb.1 ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.1: - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_22]], implicit [[V_CVT_I32_F32_e32_27]], implicit [[DEF]].sub1, implicit [[DEF]].sub3 - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_1]], implicit [[V_CVT_I32_F32_e32_6]], implicit [[DEF24]], implicit [[DEF28]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_23]], implicit [[V_CVT_I32_F32_e32_28]], implicit [[DEF25]], implicit [[DEF29]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_24]], implicit [[V_CVT_I32_F32_e32_29]], implicit [[DEF26]], implicit [[DEF30]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_25]], implicit [[V_CVT_I32_F32_e32_30]], implicit [[DEF27]], implicit [[DEF31]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_26]], implicit [[V_CVT_I32_F32_e32_31]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_2]], implicit [[V_CVT_I32_F32_e32_7]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_3]], implicit [[V_CVT_I32_F32_e32_8]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_4]], implicit [[V_CVT_I32_F32_e32_9]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_5]], implicit [[V_CVT_I32_F32_e32_10]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_11]], implicit [[V_CVT_I32_F32_e32_12]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_13]], implicit [[V_CVT_I32_F32_e32_14]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_1]], implicit [[V_CVT_I32_F32_e32_7]], implicit [[DEF]].sub1, implicit [[DEF]].sub3 + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_2]], implicit [[V_CVT_I32_F32_e32_8]], implicit [[DEF23]], implicit [[DEF27]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_24]], implicit [[V_CVT_I32_F32_e32_28]], implicit [[DEF24]], implicit [[DEF28]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_25]], implicit [[V_CVT_I32_F32_e32_29]], implicit [[DEF25]], implicit [[DEF29]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_26]], implicit [[V_CVT_I32_F32_e32_30]], implicit [[DEF26]], implicit [[DEF30]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_27]], implicit [[V_CVT_I32_F32_e32_31]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_3]], implicit [[V_CVT_I32_F32_e32_9]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_4]], implicit [[V_CVT_I32_F32_e32_10]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_5]], implicit [[V_CVT_I32_F32_e32_11]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_6]], implicit [[V_CVT_I32_F32_e32_12]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_13]], implicit [[V_CVT_I32_F32_e32_14]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_15]], implicit [[V_CVT_I32_F32_e32_16]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_15]], implicit [[V_CVT_I32_F32_e32_16]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_17]], implicit [[V_CVT_I32_F32_e32_18]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_19]], implicit [[V_CVT_I32_F32_e32_20]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_21]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_21]], implicit [[V_CVT_I32_F32_e32_22]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_23]] ; GFX908-NEXT: S_ENDPGM 0 ; ; GFX908-GCNTRACKERS-LABEL: name: remat_virtual_vgpr_subreg_uses_not_available @@ -12849,86 +12849,86 @@ body: | ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 ; GFX908-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]](p4), 52, 0 :: (dereferenceable invariant load (s64), align 4, addrspace 4) - ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = S_MOV_B32 0 - ; GFX908-NEXT: undef [[DEF:%[0-9]+]].sub0:vreg_512 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF:%[0-9]+]].sub1:vreg_512 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF:%[0-9]+]].sub2:vreg_512 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF:%[0-9]+]].sub3:vreg_512 = IMPLICIT_DEF + ; GFX908-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF3]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF4:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF5:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[DEF6:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec - ; GFX908-NEXT: dead undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 - ; GFX908-NEXT: undef [[V_CVT_I32_F32_e32_1:%[0-9]+]].sub1:vreg_64 = nofpexcept V_CVT_I32_F32_e32 [[DEF1]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF2]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF4]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF5]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[DEF6:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_5:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF7]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_6:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF8]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF9:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_7:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF9]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF10:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_8:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF10]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_9:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF11]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_10:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF12]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF13:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_11:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF13]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF14:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_12:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF14]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_13:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF15]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF16:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_14:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF16]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF17:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_15:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF17]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF18:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF18]], implicit $exec, implicit $mode + ; GFX908-NEXT: dead [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF18]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF19:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF19]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF20:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF20]], implicit $exec, implicit $mode + ; GFX908-NEXT: undef [[V_CVT_I32_F32_e32_1:%[0-9]+]].sub1:vreg_64 = nofpexcept V_CVT_I32_F32_e32 [[DEF]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF1]], implicit $exec, implicit $mode + ; GFX908-NEXT: dead [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[S_LOAD_DWORDX2_IMM]].sub0, [[COPY1]](s32), implicit $exec + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF2]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF3]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_5:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF4]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_6:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF5]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_7:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF6]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_8:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF7]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_9:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF8]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_10:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF9]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_11:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF10]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_12:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF11]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_13:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF12]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_14:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF13]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_15:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF14]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_16:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF15]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_17:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF16]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_18:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF17]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF19]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF20]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF21:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_19:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF21]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF21]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF22:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF22]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[DEF23:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF23]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF22]], implicit $exec, implicit $mode + ; GFX908-NEXT: undef [[DEF23:%[0-9]+]].sub0:vreg_512 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF24:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF24]], implicit $exec, implicit $mode ; GFX908-NEXT: [[DEF25:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF26:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF27:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[DEF28:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: undef [[V_CVT_I32_F32_e32_1:%[0-9]+]].sub0:vreg_64 = nofpexcept V_CVT_I32_F32_e32 [[DEF23]].sub0, implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF24]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF25]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF26]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF27]], implicit $exec, implicit $mode + ; GFX908-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = S_MOV_B32 0 + ; GFX908-NEXT: [[DEF23:%[0-9]+]].sub1:vreg_512 = IMPLICIT_DEF + ; GFX908-NEXT: [[DEF23:%[0-9]+]].sub3:vreg_512 = IMPLICIT_DEF + ; GFX908-NEXT: dead [[DEF28:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GFX908-NEXT: dead undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = COPY [[S_LOAD_DWORDX2_IMM]].sub1 + ; GFX908-NEXT: [[DEF23:%[0-9]+]].sub2:vreg_512 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF29:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF30:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; GFX908-NEXT: [[DEF31:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_23:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF25]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_24:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF29]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_25:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF30]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_26:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF31]], implicit $exec, implicit $mode - ; GFX908-NEXT: undef [[V_CVT_I32_F32_e32_1:%[0-9]+]].sub0:vreg_64 = nofpexcept V_CVT_I32_F32_e32 [[DEF]].sub0, implicit $exec, implicit $mode ; GFX908-NEXT: S_BRANCH %bb.1 ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.1: ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_2]], implicit [[V_CVT_I32_F32_e32_7]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_3]], implicit [[V_CVT_I32_F32_e32_8]] - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF]].sub2, implicit $exec, implicit $mode - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_1]].sub0, implicit [[V_CVT_I32_F32_e32_27]], implicit [[DEF]].sub0, implicit [[DEF]].sub2 - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF28]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF26]], implicit $exec, implicit $mode - ; GFX908-NEXT: [[V_CVT_I32_F32_e32_30:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF27]], implicit $exec, implicit $mode - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_23]], implicit [[V_CVT_I32_F32_e32_28]], implicit [[DEF1]], implicit [[DEF28]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_23]], implicit [[V_CVT_I32_F32_e32_24]], implicit [[DEF25]], implicit [[DEF29]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_29]], implicit [[V_CVT_I32_F32_e32_25]], implicit [[DEF26]], implicit [[DEF30]] - ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_30]], implicit [[V_CVT_I32_F32_e32_26]], implicit [[DEF27]], implicit [[DEF31]] + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_27:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF23]].sub2, implicit $exec, implicit $mode + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_1]].sub0, implicit [[V_CVT_I32_F32_e32_27]], implicit [[DEF23]].sub0, implicit [[DEF23]].sub2 + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_28:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF31]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_29:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF29]], implicit $exec, implicit $mode + ; GFX908-NEXT: [[V_CVT_I32_F32_e32_30:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[DEF30]], implicit $exec, implicit $mode + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_23]], implicit [[V_CVT_I32_F32_e32_28]], implicit [[DEF]], implicit [[DEF31]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_23]], implicit [[V_CVT_I32_F32_e32_24]], implicit [[DEF24]], implicit [[DEF25]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_29]], implicit [[V_CVT_I32_F32_e32_25]], implicit [[DEF29]], implicit [[DEF26]] + ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_30]], implicit [[V_CVT_I32_F32_e32_26]], implicit [[DEF30]], implicit [[DEF27]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_4]], implicit [[V_CVT_I32_F32_e32_9]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_5]], implicit [[V_CVT_I32_F32_e32_10]] ; GFX908-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_6]], implicit [[V_CVT_I32_F32_e32_11]] @@ -13151,9 +13151,9 @@ body: | ; GFX908-NEXT: successors: %bb.1(0x80000000) ; GFX908-NEXT: liveins: $sgpr3, $sgpr4 ; GFX908-NEXT: {{ $}} - ; GFX908-NEXT: [[V_CVT_I32_F64_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[DEF:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; GFX908-NEXT: dead [[DEF1:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; GFX908-NEXT: undef [[V_RCP_F32_e32_:%[0-9]+]].sub0:vreg_64_align2 = nnan ninf nsz arcp contract afn reassoc nofpexcept V_RCP_F32_e32 [[DEF]].sub0, implicit $mode, implicit $exec + ; GFX908-NEXT: [[V_CVT_I32_F64_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 @@ -13194,9 +13194,9 @@ body: | ; GFX908-NEXT: [[V_CVT_I32_F64_e32_38:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 48, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_39:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 49, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_40:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 50, implicit $exec, implicit $mode, implicit-def $m0 + ; GFX908-NEXT: dead [[DEF1:%[0-9]+]]:vreg_64 = IMPLICIT_DEF ; GFX908-NEXT: [[V_CVT_I32_F64_e32_41:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 51, implicit $exec, implicit $mode, implicit-def $m0 ; GFX908-NEXT: [[V_CVT_I32_F64_e32_42:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 52, implicit $exec, implicit $mode, implicit-def $m0 - ; GFX908-NEXT: undef [[V_RCP_F32_e32_:%[0-9]+]].sub0:vreg_64_align2 = nnan ninf nsz arcp contract afn reassoc nofpexcept V_RCP_F32_e32 [[DEF]].sub0, implicit $mode, implicit $exec ; GFX908-NEXT: [[DEF2:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF ; GFX908-NEXT: {{ $}} ; GFX908-NEXT: bb.1: diff --git a/llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll b/llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll index 073f682f222e9..7b32c347a0286 100644 --- a/llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll +++ b/llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll @@ -98,59 +98,60 @@ define amdgpu_kernel void @memcpy_p5_p4_minsize(ptr addrspace(5) %local, ptr add ; CHECK-NEXT: s_mov_b64 s[20:21], s[0:1] ; CHECK-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x8 ; CHECK-NEXT: s_load_dword s2, s[8:9], 0x0 -; CHECK-NEXT: v_mov_b32_e32 v24, 0 +; CHECK-NEXT: v_mov_b32_e32 v28, 0 ; CHECK-NEXT: s_add_u32 s20, s20, s17 ; CHECK-NEXT: s_waitcnt lgkmcnt(0) -; CHECK-NEXT: global_load_dwordx4 v[0:3], v24, s[0:1] offset:112 -; CHECK-NEXT: global_load_dwordx4 v[4:7], v24, s[0:1] offset:96 -; CHECK-NEXT: global_load_dwordx4 v[8:11], v24, s[0:1] offset:80 -; CHECK-NEXT: global_load_dwordx4 v[12:15], v24, s[0:1] offset:64 -; CHECK-NEXT: global_load_dwordx4 v[16:19], v24, s[0:1] offset:48 -; CHECK-NEXT: global_load_dwordx4 v[20:23], v24, s[0:1] offset:32 +; CHECK-NEXT: global_load_dwordx4 v[0:3], v28, s[0:1] offset:112 +; CHECK-NEXT: global_load_dwordx4 v[4:7], v28, s[0:1] offset:96 +; CHECK-NEXT: global_load_dwordx4 v[8:11], v28, s[0:1] offset:80 +; CHECK-NEXT: global_load_dwordx4 v[12:15], v28, s[0:1] offset:64 +; CHECK-NEXT: global_load_dwordx4 v[16:19], v28, s[0:1] offset:48 +; CHECK-NEXT: global_load_dwordx4 v[20:23], v28, s[0:1] offset:32 +; CHECK-NEXT: global_load_dwordx4 v[24:27], v28, s[0:1] offset:16 ; CHECK-NEXT: s_addc_u32 s21, s21, 0 -; CHECK-NEXT: v_mov_b32_e32 v25, s2 -; CHECK-NEXT: s_waitcnt vmcnt(5) -; CHECK-NEXT: buffer_store_dword v3, v25, s[20:23], 0 offen offset:124 -; CHECK-NEXT: buffer_store_dword v2, v25, s[20:23], 0 offen offset:120 -; CHECK-NEXT: buffer_store_dword v1, v25, s[20:23], 0 offen offset:116 -; CHECK-NEXT: buffer_store_dword v0, v25, s[20:23], 0 offen offset:112 -; CHECK-NEXT: global_load_dwordx4 v[0:3], v24, s[0:1] offset:16 +; CHECK-NEXT: v_mov_b32_e32 v29, s2 +; CHECK-NEXT: s_waitcnt vmcnt(6) +; CHECK-NEXT: buffer_store_dword v3, v29, s[20:23], 0 offen offset:124 +; CHECK-NEXT: buffer_store_dword v2, v29, s[20:23], 0 offen offset:120 +; CHECK-NEXT: buffer_store_dword v1, v29, s[20:23], 0 offen offset:116 +; CHECK-NEXT: buffer_store_dword v0, v29, s[20:23], 0 offen offset:112 ; CHECK-NEXT: s_waitcnt vmcnt(9) -; CHECK-NEXT: buffer_store_dword v7, v25, s[20:23], 0 offen offset:108 -; CHECK-NEXT: buffer_store_dword v6, v25, s[20:23], 0 offen offset:104 -; CHECK-NEXT: buffer_store_dword v5, v25, s[20:23], 0 offen offset:100 -; CHECK-NEXT: buffer_store_dword v4, v25, s[20:23], 0 offen offset:96 -; CHECK-NEXT: global_load_dwordx4 v[4:7], v24, s[0:1] +; CHECK-NEXT: buffer_store_dword v7, v29, s[20:23], 0 offen offset:108 +; CHECK-NEXT: global_load_dwordx4 v[0:3], v28, s[0:1] +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v6, v29, s[20:23], 0 offen offset:104 +; CHECK-NEXT: buffer_store_dword v5, v29, s[20:23], 0 offen offset:100 +; CHECK-NEXT: buffer_store_dword v4, v29, s[20:23], 0 offen offset:96 ; CHECK-NEXT: s_waitcnt vmcnt(13) -; CHECK-NEXT: buffer_store_dword v11, v25, s[20:23], 0 offen offset:92 -; CHECK-NEXT: buffer_store_dword v10, v25, s[20:23], 0 offen offset:88 -; CHECK-NEXT: buffer_store_dword v9, v25, s[20:23], 0 offen offset:84 -; CHECK-NEXT: buffer_store_dword v8, v25, s[20:23], 0 offen offset:80 +; CHECK-NEXT: buffer_store_dword v11, v29, s[20:23], 0 offen offset:92 +; CHECK-NEXT: buffer_store_dword v10, v29, s[20:23], 0 offen offset:88 +; CHECK-NEXT: buffer_store_dword v9, v29, s[20:23], 0 offen offset:84 +; CHECK-NEXT: buffer_store_dword v8, v29, s[20:23], 0 offen offset:80 ; CHECK-NEXT: s_waitcnt vmcnt(16) -; CHECK-NEXT: buffer_store_dword v15, v25, s[20:23], 0 offen offset:76 -; CHECK-NEXT: buffer_store_dword v14, v25, s[20:23], 0 offen offset:72 -; CHECK-NEXT: buffer_store_dword v13, v25, s[20:23], 0 offen offset:68 -; CHECK-NEXT: buffer_store_dword v12, v25, s[20:23], 0 offen offset:64 +; CHECK-NEXT: buffer_store_dword v15, v29, s[20:23], 0 offen offset:76 +; CHECK-NEXT: buffer_store_dword v14, v29, s[20:23], 0 offen offset:72 +; CHECK-NEXT: buffer_store_dword v13, v29, s[20:23], 0 offen offset:68 +; CHECK-NEXT: buffer_store_dword v12, v29, s[20:23], 0 offen offset:64 ; CHECK-NEXT: s_waitcnt vmcnt(19) -; CHECK-NEXT: buffer_store_dword v19, v25, s[20:23], 0 offen offset:60 -; CHECK-NEXT: buffer_store_dword v18, v25, s[20:23], 0 offen offset:56 -; CHECK-NEXT: buffer_store_dword v17, v25, s[20:23], 0 offen offset:52 -; CHECK-NEXT: buffer_store_dword v16, v25, s[20:23], 0 offen offset:48 +; CHECK-NEXT: buffer_store_dword v19, v29, s[20:23], 0 offen offset:60 +; CHECK-NEXT: buffer_store_dword v18, v29, s[20:23], 0 offen offset:56 +; CHECK-NEXT: buffer_store_dword v17, v29, s[20:23], 0 offen offset:52 +; CHECK-NEXT: buffer_store_dword v16, v29, s[20:23], 0 offen offset:48 ; CHECK-NEXT: s_waitcnt vmcnt(22) -; CHECK-NEXT: buffer_store_dword v23, v25, s[20:23], 0 offen offset:44 -; CHECK-NEXT: buffer_store_dword v22, v25, s[20:23], 0 offen offset:40 -; CHECK-NEXT: buffer_store_dword v21, v25, s[20:23], 0 offen offset:36 -; CHECK-NEXT: buffer_store_dword v20, v25, s[20:23], 0 offen offset:32 -; CHECK-NEXT: s_waitcnt vmcnt(21) -; CHECK-NEXT: buffer_store_dword v3, v25, s[20:23], 0 offen offset:28 -; CHECK-NEXT: buffer_store_dword v2, v25, s[20:23], 0 offen offset:24 -; CHECK-NEXT: buffer_store_dword v1, v25, s[20:23], 0 offen offset:20 -; CHECK-NEXT: buffer_store_dword v0, v25, s[20:23], 0 offen offset:16 -; CHECK-NEXT: s_waitcnt vmcnt(20) -; CHECK-NEXT: buffer_store_dword v7, v25, s[20:23], 0 offen offset:12 -; CHECK-NEXT: buffer_store_dword v6, v25, s[20:23], 0 offen offset:8 -; CHECK-NEXT: buffer_store_dword v5, v25, s[20:23], 0 offen offset:4 -; CHECK-NEXT: buffer_store_dword v4, v25, s[20:23], 0 offen +; CHECK-NEXT: buffer_store_dword v23, v29, s[20:23], 0 offen offset:44 +; CHECK-NEXT: buffer_store_dword v22, v29, s[20:23], 0 offen offset:40 +; CHECK-NEXT: buffer_store_dword v21, v29, s[20:23], 0 offen offset:36 +; CHECK-NEXT: buffer_store_dword v20, v29, s[20:23], 0 offen offset:32 +; CHECK-NEXT: s_waitcnt vmcnt(25) +; CHECK-NEXT: buffer_store_dword v27, v29, s[20:23], 0 offen offset:28 +; CHECK-NEXT: buffer_store_dword v26, v29, s[20:23], 0 offen offset:24 +; CHECK-NEXT: buffer_store_dword v25, v29, s[20:23], 0 offen offset:20 +; CHECK-NEXT: buffer_store_dword v24, v29, s[20:23], 0 offen offset:16 +; CHECK-NEXT: s_waitcnt vmcnt(23) +; CHECK-NEXT: buffer_store_dword v3, v29, s[20:23], 0 offen offset:12 +; CHECK-NEXT: buffer_store_dword v2, v29, s[20:23], 0 offen offset:8 +; CHECK-NEXT: buffer_store_dword v1, v29, s[20:23], 0 offen offset:4 +; CHECK-NEXT: buffer_store_dword v0, v29, s[20:23], 0 offen ; CHECK-NEXT: s_endpgm entry: tail call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) %local, ptr addrspace(4) %0, i64 128, i1 false) @@ -386,59 +387,60 @@ define amdgpu_kernel void @memcpy_p5_p4_optsize(ptr addrspace(5) %local, ptr add ; CHECK-NEXT: s_mov_b64 s[20:21], s[0:1] ; CHECK-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x8 ; CHECK-NEXT: s_load_dword s2, s[8:9], 0x0 -; CHECK-NEXT: v_mov_b32_e32 v24, 0 +; CHECK-NEXT: v_mov_b32_e32 v28, 0 ; CHECK-NEXT: s_add_u32 s20, s20, s17 ; CHECK-NEXT: s_waitcnt lgkmcnt(0) -; CHECK-NEXT: global_load_dwordx4 v[0:3], v24, s[0:1] offset:112 -; CHECK-NEXT: global_load_dwordx4 v[4:7], v24, s[0:1] offset:96 -; CHECK-NEXT: global_load_dwordx4 v[8:11], v24, s[0:1] offset:80 -; CHECK-NEXT: global_load_dwordx4 v[12:15], v24, s[0:1] offset:64 -; CHECK-NEXT: global_load_dwordx4 v[16:19], v24, s[0:1] offset:48 -; CHECK-NEXT: global_load_dwordx4 v[20:23], v24, s[0:1] offset:32 +; CHECK-NEXT: global_load_dwordx4 v[0:3], v28, s[0:1] offset:112 +; CHECK-NEXT: global_load_dwordx4 v[4:7], v28, s[0:1] offset:96 +; CHECK-NEXT: global_load_dwordx4 v[8:11], v28, s[0:1] offset:80 +; CHECK-NEXT: global_load_dwordx4 v[12:15], v28, s[0:1] offset:64 +; CHECK-NEXT: global_load_dwordx4 v[16:19], v28, s[0:1] offset:48 +; CHECK-NEXT: global_load_dwordx4 v[20:23], v28, s[0:1] offset:32 +; CHECK-NEXT: global_load_dwordx4 v[24:27], v28, s[0:1] offset:16 ; CHECK-NEXT: s_addc_u32 s21, s21, 0 -; CHECK-NEXT: v_mov_b32_e32 v25, s2 -; CHECK-NEXT: s_waitcnt vmcnt(5) -; CHECK-NEXT: buffer_store_dword v3, v25, s[20:23], 0 offen offset:124 -; CHECK-NEXT: buffer_store_dword v2, v25, s[20:23], 0 offen offset:120 -; CHECK-NEXT: buffer_store_dword v1, v25, s[20:23], 0 offen offset:116 -; CHECK-NEXT: buffer_store_dword v0, v25, s[20:23], 0 offen offset:112 -; CHECK-NEXT: global_load_dwordx4 v[0:3], v24, s[0:1] offset:16 +; CHECK-NEXT: v_mov_b32_e32 v29, s2 +; CHECK-NEXT: s_waitcnt vmcnt(6) +; CHECK-NEXT: buffer_store_dword v3, v29, s[20:23], 0 offen offset:124 +; CHECK-NEXT: buffer_store_dword v2, v29, s[20:23], 0 offen offset:120 +; CHECK-NEXT: buffer_store_dword v1, v29, s[20:23], 0 offen offset:116 +; CHECK-NEXT: buffer_store_dword v0, v29, s[20:23], 0 offen offset:112 ; CHECK-NEXT: s_waitcnt vmcnt(9) -; CHECK-NEXT: buffer_store_dword v7, v25, s[20:23], 0 offen offset:108 -; CHECK-NEXT: buffer_store_dword v6, v25, s[20:23], 0 offen offset:104 -; CHECK-NEXT: buffer_store_dword v5, v25, s[20:23], 0 offen offset:100 -; CHECK-NEXT: buffer_store_dword v4, v25, s[20:23], 0 offen offset:96 -; CHECK-NEXT: global_load_dwordx4 v[4:7], v24, s[0:1] +; CHECK-NEXT: buffer_store_dword v7, v29, s[20:23], 0 offen offset:108 +; CHECK-NEXT: global_load_dwordx4 v[0:3], v28, s[0:1] +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v6, v29, s[20:23], 0 offen offset:104 +; CHECK-NEXT: buffer_store_dword v5, v29, s[20:23], 0 offen offset:100 +; CHECK-NEXT: buffer_store_dword v4, v29, s[20:23], 0 offen offset:96 ; CHECK-NEXT: s_waitcnt vmcnt(13) -; CHECK-NEXT: buffer_store_dword v11, v25, s[20:23], 0 offen offset:92 -; CHECK-NEXT: buffer_store_dword v10, v25, s[20:23], 0 offen offset:88 -; CHECK-NEXT: buffer_store_dword v9, v25, s[20:23], 0 offen offset:84 -; CHECK-NEXT: buffer_store_dword v8, v25, s[20:23], 0 offen offset:80 +; CHECK-NEXT: buffer_store_dword v11, v29, s[20:23], 0 offen offset:92 +; CHECK-NEXT: buffer_store_dword v10, v29, s[20:23], 0 offen offset:88 +; CHECK-NEXT: buffer_store_dword v9, v29, s[20:23], 0 offen offset:84 +; CHECK-NEXT: buffer_store_dword v8, v29, s[20:23], 0 offen offset:80 ; CHECK-NEXT: s_waitcnt vmcnt(16) -; CHECK-NEXT: buffer_store_dword v15, v25, s[20:23], 0 offen offset:76 -; CHECK-NEXT: buffer_store_dword v14, v25, s[20:23], 0 offen offset:72 -; CHECK-NEXT: buffer_store_dword v13, v25, s[20:23], 0 offen offset:68 -; CHECK-NEXT: buffer_store_dword v12, v25, s[20:23], 0 offen offset:64 +; CHECK-NEXT: buffer_store_dword v15, v29, s[20:23], 0 offen offset:76 +; CHECK-NEXT: buffer_store_dword v14, v29, s[20:23], 0 offen offset:72 +; CHECK-NEXT: buffer_store_dword v13, v29, s[20:23], 0 offen offset:68 +; CHECK-NEXT: buffer_store_dword v12, v29, s[20:23], 0 offen offset:64 ; CHECK-NEXT: s_waitcnt vmcnt(19) -; CHECK-NEXT: buffer_store_dword v19, v25, s[20:23], 0 offen offset:60 -; CHECK-NEXT: buffer_store_dword v18, v25, s[20:23], 0 offen offset:56 -; CHECK-NEXT: buffer_store_dword v17, v25, s[20:23], 0 offen offset:52 -; CHECK-NEXT: buffer_store_dword v16, v25, s[20:23], 0 offen offset:48 +; CHECK-NEXT: buffer_store_dword v19, v29, s[20:23], 0 offen offset:60 +; CHECK-NEXT: buffer_store_dword v18, v29, s[20:23], 0 offen offset:56 +; CHECK-NEXT: buffer_store_dword v17, v29, s[20:23], 0 offen offset:52 +; CHECK-NEXT: buffer_store_dword v16, v29, s[20:23], 0 offen offset:48 ; CHECK-NEXT: s_waitcnt vmcnt(22) -; CHECK-NEXT: buffer_store_dword v23, v25, s[20:23], 0 offen offset:44 -; CHECK-NEXT: buffer_store_dword v22, v25, s[20:23], 0 offen offset:40 -; CHECK-NEXT: buffer_store_dword v21, v25, s[20:23], 0 offen offset:36 -; CHECK-NEXT: buffer_store_dword v20, v25, s[20:23], 0 offen offset:32 -; CHECK-NEXT: s_waitcnt vmcnt(21) -; CHECK-NEXT: buffer_store_dword v3, v25, s[20:23], 0 offen offset:28 -; CHECK-NEXT: buffer_store_dword v2, v25, s[20:23], 0 offen offset:24 -; CHECK-NEXT: buffer_store_dword v1, v25, s[20:23], 0 offen offset:20 -; CHECK-NEXT: buffer_store_dword v0, v25, s[20:23], 0 offen offset:16 -; CHECK-NEXT: s_waitcnt vmcnt(20) -; CHECK-NEXT: buffer_store_dword v7, v25, s[20:23], 0 offen offset:12 -; CHECK-NEXT: buffer_store_dword v6, v25, s[20:23], 0 offen offset:8 -; CHECK-NEXT: buffer_store_dword v5, v25, s[20:23], 0 offen offset:4 -; CHECK-NEXT: buffer_store_dword v4, v25, s[20:23], 0 offen +; CHECK-NEXT: buffer_store_dword v23, v29, s[20:23], 0 offen offset:44 +; CHECK-NEXT: buffer_store_dword v22, v29, s[20:23], 0 offen offset:40 +; CHECK-NEXT: buffer_store_dword v21, v29, s[20:23], 0 offen offset:36 +; CHECK-NEXT: buffer_store_dword v20, v29, s[20:23], 0 offen offset:32 +; CHECK-NEXT: s_waitcnt vmcnt(25) +; CHECK-NEXT: buffer_store_dword v27, v29, s[20:23], 0 offen offset:28 +; CHECK-NEXT: buffer_store_dword v26, v29, s[20:23], 0 offen offset:24 +; CHECK-NEXT: buffer_store_dword v25, v29, s[20:23], 0 offen offset:20 +; CHECK-NEXT: buffer_store_dword v24, v29, s[20:23], 0 offen offset:16 +; CHECK-NEXT: s_waitcnt vmcnt(23) +; CHECK-NEXT: buffer_store_dword v3, v29, s[20:23], 0 offen offset:12 +; CHECK-NEXT: buffer_store_dword v2, v29, s[20:23], 0 offen offset:8 +; CHECK-NEXT: buffer_store_dword v1, v29, s[20:23], 0 offen offset:4 +; CHECK-NEXT: buffer_store_dword v0, v29, s[20:23], 0 offen ; CHECK-NEXT: s_endpgm entry: tail call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) %local, ptr addrspace(4) %0, i64 128, i1 false) diff --git a/llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll b/llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll index a64db94eae5be..631a7229dbd1e 100644 --- a/llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll +++ b/llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll @@ -1624,497 +1624,499 @@ define void @memcpy_p0_p4_sz2048(ptr addrspace(0) align 1 %dst, ptr addrspace(4) ; ALIGNED-NEXT: s_mov_b64 s[4:5], 0 ; ALIGNED-NEXT: .LBB2_1: ; %static-memcpy-expansion-main-body ; ALIGNED-NEXT: ; =>This Inner Loop Header: Depth=1 -; ALIGNED-NEXT: v_add_co_u32 v8, vcc_lo, v2, s4 -; ALIGNED-NEXT: v_add_co_ci_u32_e64 v9, null, s5, v3, vcc_lo -; ALIGNED-NEXT: v_add_co_u32 v84, vcc_lo, v0, s4 -; ALIGNED-NEXT: v_add_co_ci_u32_e64 v85, null, s5, v1, vcc_lo +; ALIGNED-NEXT: v_add_co_u32 v4, vcc_lo, v2, s4 +; ALIGNED-NEXT: v_add_co_ci_u32_e64 v5, null, s5, v3, vcc_lo +; ALIGNED-NEXT: v_add_co_u32 v64, vcc_lo, v0, s4 +; ALIGNED-NEXT: v_add_co_ci_u32_e64 v65, null, s5, v1, vcc_lo ; ALIGNED-NEXT: s_clause 0xf -; ALIGNED-NEXT: global_load_dwordx4 v[98:101], v[8:9], off offset:240 -; ALIGNED-NEXT: global_load_dwordx4 v[112:115], v[8:9], off offset:224 -; ALIGNED-NEXT: global_load_dwordx4 v[80:83], v[8:9], off offset:208 -; ALIGNED-NEXT: global_load_dwordx4 v[68:71], v[8:9], off offset:192 -; ALIGNED-NEXT: global_load_dwordx4 v[64:67], v[8:9], off offset:176 -; ALIGNED-NEXT: global_load_dwordx4 v[52:55], v[8:9], off offset:160 -; ALIGNED-NEXT: global_load_dwordx4 v[48:51], v[8:9], off offset:144 -; ALIGNED-NEXT: global_load_dwordx4 v[36:39], v[8:9], off offset:128 -; ALIGNED-NEXT: global_load_dwordx4 v[32:35], v[8:9], off offset:112 -; ALIGNED-NEXT: global_load_dwordx4 v[28:31], v[8:9], off offset:96 -; ALIGNED-NEXT: global_load_dwordx4 v[24:27], v[8:9], off offset:80 -; ALIGNED-NEXT: global_load_dwordx4 v[20:23], v[8:9], off offset:64 -; ALIGNED-NEXT: global_load_dwordx4 v[16:19], v[8:9], off offset:48 -; ALIGNED-NEXT: global_load_dwordx4 v[12:15], v[8:9], off offset:32 -; ALIGNED-NEXT: global_load_dwordx4 v[4:7], v[8:9], off -; ALIGNED-NEXT: global_load_dwordx4 v[8:11], v[8:9], off offset:16 -; ALIGNED-NEXT: v_add_co_u32 v96, vcc_lo, v84, 6 -; ALIGNED-NEXT: v_add_co_ci_u32_e64 v97, null, 0, v85, vcc_lo -; ALIGNED-NEXT: v_add_co_u32 v86, vcc_lo, v84, 3 -; ALIGNED-NEXT: v_add_co_ci_u32_e64 v87, null, 0, v85, vcc_lo +; ALIGNED-NEXT: global_load_dwordx4 v[80:83], v[4:5], off offset:240 +; ALIGNED-NEXT: global_load_dwordx4 v[84:87], v[4:5], off offset:224 +; ALIGNED-NEXT: global_load_dwordx4 v[96:99], v[4:5], off offset:208 +; ALIGNED-NEXT: global_load_dwordx4 v[100:103], v[4:5], off offset:192 +; ALIGNED-NEXT: global_load_dwordx4 v[112:115], v[4:5], off offset:176 +; ALIGNED-NEXT: global_load_dwordx4 v[52:55], v[4:5], off offset:160 +; ALIGNED-NEXT: global_load_dwordx4 v[48:51], v[4:5], off offset:144 +; ALIGNED-NEXT: global_load_dwordx4 v[36:39], v[4:5], off offset:128 +; ALIGNED-NEXT: global_load_dwordx4 v[32:35], v[4:5], off offset:112 +; ALIGNED-NEXT: global_load_dwordx4 v[28:31], v[4:5], off offset:96 +; ALIGNED-NEXT: global_load_dwordx4 v[24:27], v[4:5], off offset:80 +; ALIGNED-NEXT: global_load_dwordx4 v[20:23], v[4:5], off offset:64 +; ALIGNED-NEXT: global_load_dwordx4 v[16:19], v[4:5], off offset:48 +; ALIGNED-NEXT: global_load_dwordx4 v[12:15], v[4:5], off offset:32 +; ALIGNED-NEXT: global_load_dwordx4 v[8:11], v[4:5], off offset:16 +; ALIGNED-NEXT: global_load_dwordx4 v[4:7], v[4:5], off +; ALIGNED-NEXT: v_add_co_u32 v66, vcc_lo, v64, 3 +; ALIGNED-NEXT: v_add_co_ci_u32_e64 v67, null, 0, v65, vcc_lo +; ALIGNED-NEXT: v_add_co_u32 v68, vcc_lo, v64, 6 +; ALIGNED-NEXT: v_add_co_ci_u32_e64 v69, null, 0, v65, vcc_lo ; ALIGNED-NEXT: s_add_u32 s4, s4, 0x100 ; ALIGNED-NEXT: s_addc_u32 s5, s5, 0 ; ALIGNED-NEXT: s_waitcnt vmcnt(15) -; ALIGNED-NEXT: buffer_store_dword v100, off, s[0:3], s32 offset:168 -; ALIGNED-NEXT: buffer_store_dword v101, off, s[0:3], s32 offset:172 -; ALIGNED-NEXT: buffer_store_dword v99, off, s[0:3], s32 offset:164 -; ALIGNED-NEXT: buffer_store_dword v98, off, s[0:3], s32 offset:160 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v100 offset:244 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v101 offset:248 -; ALIGNED-NEXT: flat_store_byte v[86:87], v101 offset:249 -; ALIGNED-NEXT: flat_store_byte v[86:87], v100 offset:245 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v99 offset:240 -; ALIGNED-NEXT: flat_store_byte v[86:87], v99 offset:241 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v98 offset:236 -; ALIGNED-NEXT: flat_store_byte v[86:87], v98 offset:237 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v100 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 24, v101 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v101 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 8, v100 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v116, 24, v99 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v117, 8, v99 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v118, 24, v98 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v119, 8, v98 -; ALIGNED-NEXT: flat_store_byte v[86:87], v102 offset:248 -; ALIGNED-NEXT: flat_store_byte v[86:87], v100 offset:246 -; ALIGNED-NEXT: flat_store_byte v[86:87], v103 offset:252 +; ALIGNED-NEXT: buffer_store_dword v82, off, s[0:3], s32 offset:168 +; ALIGNED-NEXT: buffer_store_dword v83, off, s[0:3], s32 offset:172 +; ALIGNED-NEXT: buffer_store_dword v81, off, s[0:3], s32 offset:164 +; ALIGNED-NEXT: buffer_store_dword v80, off, s[0:3], s32 offset:160 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v82 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 8, v82 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v82 offset:244 +; ALIGNED-NEXT: flat_store_byte v[66:67], v82 offset:245 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v83 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v83 offset:248 +; ALIGNED-NEXT: flat_store_byte v[66:67], v83 offset:249 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v83 +; ALIGNED-NEXT: flat_store_byte v[66:67], v70 offset:248 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v81 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v81 offset:240 +; ALIGNED-NEXT: flat_store_byte v[66:67], v81 offset:241 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v81 +; ALIGNED-NEXT: flat_store_byte v[66:67], v71 offset:246 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 24, v80 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v80 offset:236 +; ALIGNED-NEXT: flat_store_byte v[66:67], v80 offset:237 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 8, v80 +; ALIGNED-NEXT: flat_store_byte v[66:67], v82 offset:252 ; ALIGNED-NEXT: s_waitcnt vmcnt(14) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v114 -; ALIGNED-NEXT: flat_store_byte v[86:87], v101 offset:250 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v114 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v115 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v115 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v113 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v113 -; ALIGNED-NEXT: flat_store_byte v[86:87], v116 offset:244 -; ALIGNED-NEXT: flat_store_byte v[86:87], v117 offset:242 -; ALIGNED-NEXT: flat_store_byte v[86:87], v118 offset:240 -; ALIGNED-NEXT: flat_store_byte v[86:87], v119 offset:238 -; ALIGNED-NEXT: buffer_store_dword v114, off, s[0:3], s32 offset:184 -; ALIGNED-NEXT: buffer_store_dword v115, off, s[0:3], s32 offset:188 -; ALIGNED-NEXT: buffer_store_dword v113, off, s[0:3], s32 offset:180 -; ALIGNED-NEXT: buffer_store_dword v112, off, s[0:3], s32 offset:176 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v114 offset:228 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v115 offset:232 -; ALIGNED-NEXT: flat_store_byte v[86:87], v115 offset:233 -; ALIGNED-NEXT: flat_store_byte v[86:87], v114 offset:229 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v113 offset:224 -; ALIGNED-NEXT: flat_store_byte v[86:87], v113 offset:225 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v112 offset:220 -; ALIGNED-NEXT: flat_store_byte v[86:87], v112 offset:221 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v112 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v112 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v86 +; ALIGNED-NEXT: flat_store_byte v[66:67], v83 offset:250 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v86 +; ALIGNED-NEXT: flat_store_byte v[66:67], v70 offset:244 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v87 +; ALIGNED-NEXT: flat_store_byte v[66:67], v81 offset:242 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v87 +; ALIGNED-NEXT: flat_store_byte v[66:67], v71 offset:240 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 24, v85 +; ALIGNED-NEXT: flat_store_byte v[66:67], v80 offset:238 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 8, v85 +; ALIGNED-NEXT: buffer_store_dword v86, off, s[0:3], s32 offset:184 +; ALIGNED-NEXT: buffer_store_dword v87, off, s[0:3], s32 offset:188 +; ALIGNED-NEXT: buffer_store_dword v85, off, s[0:3], s32 offset:180 +; ALIGNED-NEXT: buffer_store_dword v84, off, s[0:3], s32 offset:176 +; ALIGNED-NEXT: flat_store_byte v[66:67], v82 offset:232 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v84 +; ALIGNED-NEXT: flat_store_byte v[66:67], v83 offset:230 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v84 +; ALIGNED-NEXT: flat_store_byte v[66:67], v70 offset:236 ; ALIGNED-NEXT: s_waitcnt vmcnt(13) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v82 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v82 -; ALIGNED-NEXT: flat_store_byte v[86:87], v98 offset:232 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v83 -; ALIGNED-NEXT: flat_store_byte v[86:87], v99 offset:230 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v83 -; ALIGNED-NEXT: flat_store_byte v[86:87], v100 offset:236 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v81 -; ALIGNED-NEXT: flat_store_byte v[86:87], v101 offset:234 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v81 -; ALIGNED-NEXT: flat_store_byte v[86:87], v102 offset:228 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v80 -; ALIGNED-NEXT: flat_store_byte v[86:87], v103 offset:226 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v80 -; ALIGNED-NEXT: flat_store_byte v[86:87], v113 offset:224 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v98 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v87 offset:232 +; ALIGNED-NEXT: flat_store_byte v[66:67], v87 offset:233 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v98 +; ALIGNED-NEXT: flat_store_byte v[66:67], v81 offset:234 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 24, v99 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v86 offset:228 +; ALIGNED-NEXT: flat_store_byte v[66:67], v86 offset:229 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 8, v99 +; ALIGNED-NEXT: flat_store_byte v[66:67], v71 offset:228 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 24, v97 +; ALIGNED-NEXT: flat_store_byte v[66:67], v80 offset:226 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 8, v97 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v85 offset:224 +; ALIGNED-NEXT: flat_store_byte v[66:67], v85 offset:225 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 24, v96 +; ALIGNED-NEXT: flat_store_byte v[66:67], v82 offset:224 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 8, v96 +; ALIGNED-NEXT: flat_store_byte v[66:67], v83 offset:222 ; ALIGNED-NEXT: s_waitcnt vmcnt(12) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v70 -; ALIGNED-NEXT: flat_store_byte v[86:87], v112 offset:222 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v70 -; ALIGNED-NEXT: buffer_store_dword v82, off, s[0:3], s32 offset:136 -; ALIGNED-NEXT: buffer_store_dword v83, off, s[0:3], s32 offset:140 -; ALIGNED-NEXT: buffer_store_dword v81, off, s[0:3], s32 offset:132 -; ALIGNED-NEXT: buffer_store_dword v80, off, s[0:3], s32 offset:128 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v82 offset:212 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v83 offset:216 -; ALIGNED-NEXT: flat_store_byte v[86:87], v83 offset:217 -; ALIGNED-NEXT: flat_store_byte v[86:87], v82 offset:213 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v81 offset:208 -; ALIGNED-NEXT: flat_store_byte v[86:87], v81 offset:209 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v80 offset:204 -; ALIGNED-NEXT: flat_store_byte v[86:87], v80 offset:205 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v71 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v71 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v69 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v69 -; ALIGNED-NEXT: flat_store_byte v[86:87], v114 offset:216 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v68 -; ALIGNED-NEXT: flat_store_byte v[86:87], v115 offset:214 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v68 -; ALIGNED-NEXT: flat_store_byte v[86:87], v98 offset:220 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 24, v102 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v84 offset:220 +; ALIGNED-NEXT: flat_store_byte v[66:67], v84 offset:221 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 8, v102 +; ALIGNED-NEXT: buffer_store_dword v98, off, s[0:3], s32 offset:136 +; ALIGNED-NEXT: buffer_store_dword v99, off, s[0:3], s32 offset:140 +; ALIGNED-NEXT: buffer_store_dword v97, off, s[0:3], s32 offset:132 +; ALIGNED-NEXT: buffer_store_dword v96, off, s[0:3], s32 offset:128 +; ALIGNED-NEXT: flat_store_byte v[66:67], v70 offset:216 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v103 +; ALIGNED-NEXT: flat_store_byte v[66:67], v87 offset:214 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v103 +; ALIGNED-NEXT: flat_store_byte v[66:67], v81 offset:220 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 24, v101 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v99 offset:216 +; ALIGNED-NEXT: flat_store_byte v[66:67], v99 offset:217 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v101 +; ALIGNED-NEXT: flat_store_byte v[66:67], v86 offset:218 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v100 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v98 offset:212 +; ALIGNED-NEXT: flat_store_byte v[66:67], v98 offset:213 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 8, v100 +; ALIGNED-NEXT: flat_store_byte v[66:67], v71 offset:212 ; ALIGNED-NEXT: s_waitcnt vmcnt(11) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v66 -; ALIGNED-NEXT: flat_store_byte v[86:87], v99 offset:218 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v66 -; ALIGNED-NEXT: flat_store_byte v[86:87], v100 offset:212 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v67 -; ALIGNED-NEXT: flat_store_byte v[86:87], v101 offset:210 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v67 -; ALIGNED-NEXT: flat_store_byte v[86:87], v102 offset:208 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v65 -; ALIGNED-NEXT: flat_store_byte v[86:87], v103 offset:206 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v65 -; ALIGNED-NEXT: buffer_store_dword v70, off, s[0:3], s32 offset:152 -; ALIGNED-NEXT: buffer_store_dword v71, off, s[0:3], s32 offset:156 -; ALIGNED-NEXT: buffer_store_dword v69, off, s[0:3], s32 offset:148 -; ALIGNED-NEXT: buffer_store_dword v68, off, s[0:3], s32 offset:144 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v70 offset:196 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v71 offset:200 -; ALIGNED-NEXT: flat_store_byte v[86:87], v71 offset:201 -; ALIGNED-NEXT: flat_store_byte v[86:87], v70 offset:197 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v69 offset:192 -; ALIGNED-NEXT: flat_store_byte v[86:87], v69 offset:193 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v68 offset:188 -; ALIGNED-NEXT: flat_store_byte v[86:87], v68 offset:189 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v64 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 8, v64 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 24, v114 +; ALIGNED-NEXT: flat_store_byte v[66:67], v80 offset:210 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 8, v114 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v97 offset:208 +; ALIGNED-NEXT: flat_store_byte v[66:67], v97 offset:209 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 24, v115 +; ALIGNED-NEXT: flat_store_byte v[66:67], v85 offset:208 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 8, v115 +; ALIGNED-NEXT: flat_store_byte v[66:67], v82 offset:206 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v113 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v96 offset:204 +; ALIGNED-NEXT: flat_store_byte v[66:67], v96 offset:205 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 8, v113 +; ALIGNED-NEXT: buffer_store_dword v102, off, s[0:3], s32 offset:152 +; ALIGNED-NEXT: buffer_store_dword v103, off, s[0:3], s32 offset:156 +; ALIGNED-NEXT: buffer_store_dword v101, off, s[0:3], s32 offset:148 +; ALIGNED-NEXT: buffer_store_dword v100, off, s[0:3], s32 offset:144 +; ALIGNED-NEXT: flat_store_byte v[66:67], v83 offset:200 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 24, v112 +; ALIGNED-NEXT: flat_store_byte v[66:67], v84 offset:198 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 8, v112 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v103 offset:200 +; ALIGNED-NEXT: flat_store_byte v[66:67], v103 offset:201 ; ALIGNED-NEXT: s_waitcnt vmcnt(10) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v54 +; ALIGNED-NEXT: flat_store_byte v[66:67], v70 offset:204 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v54 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 8, v54 -; ALIGNED-NEXT: flat_store_byte v[86:87], v113 offset:200 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v55 -; ALIGNED-NEXT: flat_store_byte v[86:87], v112 offset:198 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v55 -; ALIGNED-NEXT: flat_store_byte v[86:87], v80 offset:204 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v52 -; ALIGNED-NEXT: flat_store_byte v[86:87], v81 offset:202 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v52 -; ALIGNED-NEXT: flat_store_byte v[86:87], v82 offset:196 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v53 -; ALIGNED-NEXT: flat_store_byte v[86:87], v83 offset:194 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v53 -; ALIGNED-NEXT: flat_store_byte v[86:87], v114 offset:192 +; ALIGNED-NEXT: flat_store_byte v[66:67], v87 offset:202 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 24, v55 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v102 offset:196 +; ALIGNED-NEXT: flat_store_byte v[66:67], v102 offset:197 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 8, v55 +; ALIGNED-NEXT: flat_store_byte v[66:67], v81 offset:196 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 24, v52 +; ALIGNED-NEXT: flat_store_byte v[66:67], v99 offset:194 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v52 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v101 offset:192 +; ALIGNED-NEXT: flat_store_byte v[66:67], v101 offset:193 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 24, v53 +; ALIGNED-NEXT: flat_store_byte v[66:67], v86 offset:192 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 8, v53 +; ALIGNED-NEXT: flat_store_byte v[66:67], v98 offset:190 ; ALIGNED-NEXT: s_waitcnt vmcnt(9) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v50 -; ALIGNED-NEXT: flat_store_byte v[86:87], v115 offset:190 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v50 -; ALIGNED-NEXT: buffer_store_dword v66, off, s[0:3], s32 offset:232 -; ALIGNED-NEXT: buffer_store_dword v67, off, s[0:3], s32 offset:236 -; ALIGNED-NEXT: buffer_store_dword v65, off, s[0:3], s32 offset:228 -; ALIGNED-NEXT: buffer_store_dword v64, off, s[0:3], s32 offset:224 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v66 offset:180 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v67 offset:184 -; ALIGNED-NEXT: flat_store_byte v[86:87], v67 offset:185 -; ALIGNED-NEXT: flat_store_byte v[86:87], v66 offset:181 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v65 offset:176 -; ALIGNED-NEXT: flat_store_byte v[86:87], v65 offset:177 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v64 offset:172 -; ALIGNED-NEXT: flat_store_byte v[86:87], v64 offset:173 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v64, 24, v51 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v65, 8, v51 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v66, 24, v49 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v67, 8, v49 -; ALIGNED-NEXT: flat_store_byte v[86:87], v98 offset:184 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v48 -; ALIGNED-NEXT: flat_store_byte v[86:87], v99 offset:182 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v48 -; ALIGNED-NEXT: flat_store_byte v[86:87], v100 offset:188 -; ALIGNED-NEXT: flat_store_byte v[86:87], v101 offset:186 -; ALIGNED-NEXT: flat_store_byte v[86:87], v102 offset:180 -; ALIGNED-NEXT: flat_store_byte v[86:87], v103 offset:178 -; ALIGNED-NEXT: flat_store_byte v[86:87], v68 offset:176 -; ALIGNED-NEXT: flat_store_byte v[86:87], v69 offset:174 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v50 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v100 offset:188 +; ALIGNED-NEXT: flat_store_byte v[66:67], v100 offset:189 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 8, v50 +; ALIGNED-NEXT: buffer_store_dword v114, off, s[0:3], s32 offset:232 +; ALIGNED-NEXT: buffer_store_dword v115, off, s[0:3], s32 offset:236 +; ALIGNED-NEXT: buffer_store_dword v113, off, s[0:3], s32 offset:228 +; ALIGNED-NEXT: buffer_store_dword v112, off, s[0:3], s32 offset:224 +; ALIGNED-NEXT: flat_store_byte v[66:67], v71 offset:184 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 24, v51 +; ALIGNED-NEXT: flat_store_byte v[66:67], v80 offset:182 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 8, v51 +; ALIGNED-NEXT: flat_store_byte v[66:67], v97 offset:188 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 24, v49 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v115 offset:184 +; ALIGNED-NEXT: flat_store_byte v[66:67], v115 offset:185 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v49 +; ALIGNED-NEXT: flat_store_byte v[66:67], v85 offset:186 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 24, v48 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v114 offset:180 +; ALIGNED-NEXT: flat_store_byte v[66:67], v114 offset:181 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v48 +; ALIGNED-NEXT: flat_store_byte v[66:67], v82 offset:180 +; ALIGNED-NEXT: flat_store_byte v[66:67], v96 offset:178 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v113 offset:176 +; ALIGNED-NEXT: flat_store_byte v[66:67], v113 offset:177 +; ALIGNED-NEXT: s_waitcnt vmcnt(8) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v39 +; ALIGNED-NEXT: flat_store_byte v[66:67], v83 offset:176 +; ALIGNED-NEXT: flat_store_byte v[66:67], v84 offset:174 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v112 offset:172 +; ALIGNED-NEXT: flat_store_byte v[66:67], v112 offset:173 ; ALIGNED-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:252 ; ALIGNED-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:248 ; ALIGNED-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:244 ; ALIGNED-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:240 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v54 offset:164 -; ALIGNED-NEXT: flat_store_byte v[86:87], v54 offset:165 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v55 offset:168 -; ALIGNED-NEXT: flat_store_byte v[86:87], v55 offset:169 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v52 offset:156 -; ALIGNED-NEXT: flat_store_byte v[86:87], v52 offset:157 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v53 offset:160 -; ALIGNED-NEXT: flat_store_byte v[86:87], v53 offset:161 -; ALIGNED-NEXT: s_waitcnt vmcnt(8) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 24, v36 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v38 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v38 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v39 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v39 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v37 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 8, v37 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 8, v36 +; ALIGNED-NEXT: flat_store_byte v[66:67], v103 offset:166 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v36 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v38 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 8, v38 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v39 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v37 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v37 +; ALIGNED-NEXT: flat_store_byte v[66:67], v70 offset:168 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v36 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v54 offset:164 +; ALIGNED-NEXT: flat_store_byte v[66:67], v54 offset:165 ; ALIGNED-NEXT: s_waitcnt vmcnt(7) ; ALIGNED-NEXT: v_lshrrev_b32_e32 v54, 24, v34 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v55, 8, v34 -; ALIGNED-NEXT: flat_store_byte v[86:87], v70 offset:168 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v35 -; ALIGNED-NEXT: flat_store_byte v[86:87], v71 offset:166 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 8, v35 -; ALIGNED-NEXT: flat_store_byte v[86:87], v113 offset:172 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v33 -; ALIGNED-NEXT: flat_store_byte v[86:87], v112 offset:170 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v33 -; ALIGNED-NEXT: flat_store_byte v[86:87], v80 offset:160 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v32 -; ALIGNED-NEXT: flat_store_byte v[86:87], v81 offset:158 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v32 -; ALIGNED-NEXT: flat_store_byte v[86:87], v82 offset:164 -; ALIGNED-NEXT: flat_store_byte v[86:87], v83 offset:162 +; ALIGNED-NEXT: flat_store_byte v[66:67], v87 offset:172 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v34 +; ALIGNED-NEXT: flat_store_byte v[66:67], v102 offset:170 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v35 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v55 offset:168 +; ALIGNED-NEXT: flat_store_byte v[66:67], v55 offset:169 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v55, 8, v35 +; ALIGNED-NEXT: flat_store_byte v[66:67], v81 offset:160 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 24, v33 +; ALIGNED-NEXT: flat_store_byte v[66:67], v99 offset:158 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v33 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v52 offset:156 +; ALIGNED-NEXT: flat_store_byte v[66:67], v52 offset:157 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 24, v32 +; ALIGNED-NEXT: flat_store_byte v[66:67], v101 offset:164 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v32 +; ALIGNED-NEXT: flat_store_byte v[66:67], v86 offset:162 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v53 offset:160 +; ALIGNED-NEXT: flat_store_byte v[66:67], v53 offset:161 ; ALIGNED-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:200 ; ALIGNED-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:204 ; ALIGNED-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:196 ; ALIGNED-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:192 -; ALIGNED-NEXT: flat_store_byte v[86:87], v114 offset:152 +; ALIGNED-NEXT: flat_store_byte v[66:67], v98 offset:152 ; ALIGNED-NEXT: s_waitcnt vmcnt(6) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v28 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v31 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v50 offset:148 +; ALIGNED-NEXT: flat_store_byte v[66:67], v50 offset:149 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 8, v28 ; ALIGNED-NEXT: v_cmp_gt_u64_e64 s6, 0x800, s[4:5] -; ALIGNED-NEXT: flat_store_byte v[86:87], v115 offset:150 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v28 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v30 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v30 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v50 offset:148 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v51 offset:152 -; ALIGNED-NEXT: flat_store_byte v[86:87], v51 offset:153 -; ALIGNED-NEXT: flat_store_byte v[86:87], v50 offset:149 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v49 offset:144 -; ALIGNED-NEXT: flat_store_byte v[86:87], v49 offset:145 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v48 offset:140 -; ALIGNED-NEXT: flat_store_byte v[86:87], v48 offset:141 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v48, 24, v31 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v49, 8, v31 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 24, v29 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v30 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 8, v30 +; ALIGNED-NEXT: flat_store_byte v[66:67], v100 offset:150 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 8, v31 +; ALIGNED-NEXT: flat_store_byte v[66:67], v71 offset:156 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 24, v29 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v51 offset:152 +; ALIGNED-NEXT: flat_store_byte v[66:67], v51 offset:153 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v51, 8, v29 -; ALIGNED-NEXT: flat_store_byte v[86:87], v64 offset:156 +; ALIGNED-NEXT: flat_store_byte v[66:67], v80 offset:154 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v28 +; ALIGNED-NEXT: flat_store_byte v[66:67], v97 offset:148 ; ALIGNED-NEXT: s_waitcnt vmcnt(5) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v64, 24, v26 -; ALIGNED-NEXT: flat_store_byte v[86:87], v65 offset:154 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v65, 8, v26 -; ALIGNED-NEXT: flat_store_byte v[86:87], v66 offset:148 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v66, 24, v27 -; ALIGNED-NEXT: flat_store_byte v[86:87], v67 offset:146 -; ALIGNED-NEXT: flat_store_byte v[86:87], v98 offset:144 -; ALIGNED-NEXT: flat_store_byte v[86:87], v99 offset:142 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 24, v26 +; ALIGNED-NEXT: flat_store_byte v[66:67], v115 offset:146 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v26 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v49 offset:144 +; ALIGNED-NEXT: flat_store_byte v[66:67], v49 offset:145 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v49, 24, v27 +; ALIGNED-NEXT: flat_store_byte v[66:67], v85 offset:144 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 8, v27 +; ALIGNED-NEXT: flat_store_byte v[66:67], v114 offset:142 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v25 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v48 offset:140 +; ALIGNED-NEXT: flat_store_byte v[66:67], v48 offset:141 ; ALIGNED-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:216 ; ALIGNED-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; ALIGNED-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:212 ; ALIGNED-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:208 -; ALIGNED-NEXT: flat_store_byte v[86:87], v52 offset:128 +; ALIGNED-NEXT: flat_store_byte v[66:67], v113 offset:140 +; ALIGNED-NEXT: s_waitcnt vmcnt(4) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v22 +; ALIGNED-NEXT: flat_store_byte v[66:67], v103 offset:126 ; ALIGNED-NEXT: s_waitcnt vmcnt(3) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 24, v18 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v67, 8, v27 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v38 offset:132 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v39 offset:136 -; ALIGNED-NEXT: flat_store_byte v[86:87], v39 offset:137 -; ALIGNED-NEXT: flat_store_byte v[86:87], v38 offset:133 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v37 offset:128 -; ALIGNED-NEXT: flat_store_byte v[86:87], v37 offset:129 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v36 offset:124 -; ALIGNED-NEXT: flat_store_byte v[84:85], v36 offset:128 -; ALIGNED-NEXT: flat_store_byte v[86:87], v100 offset:136 -; ALIGNED-NEXT: flat_store_byte v[86:87], v101 offset:134 -; ALIGNED-NEXT: flat_store_byte v[86:87], v102 offset:140 -; ALIGNED-NEXT: flat_store_byte v[86:87], v103 offset:138 -; ALIGNED-NEXT: flat_store_byte v[86:87], v68 offset:132 -; ALIGNED-NEXT: flat_store_byte v[86:87], v69 offset:130 -; ALIGNED-NEXT: flat_store_byte v[86:87], v53 offset:126 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 8, v18 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 24, v18 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v48, 8, v25 +; ALIGNED-NEXT: flat_store_byte v[66:67], v82 offset:136 +; ALIGNED-NEXT: flat_store_byte v[66:67], v96 offset:134 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v39 offset:136 +; ALIGNED-NEXT: flat_store_byte v[66:67], v39 offset:137 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v39, 8, v22 +; ALIGNED-NEXT: flat_store_byte v[66:67], v83 offset:138 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v38 offset:132 +; ALIGNED-NEXT: flat_store_byte v[66:67], v38 offset:133 +; ALIGNED-NEXT: flat_store_byte v[66:67], v84 offset:132 +; ALIGNED-NEXT: flat_store_byte v[66:67], v112 offset:130 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v37 offset:128 +; ALIGNED-NEXT: flat_store_byte v[66:67], v37 offset:129 +; ALIGNED-NEXT: flat_store_byte v[66:67], v70 offset:128 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v36 offset:124 +; ALIGNED-NEXT: flat_store_byte v[64:65], v36 offset:128 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v36, 8, v18 ; ALIGNED-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:40 ; ALIGNED-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:44 ; ALIGNED-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:36 ; ALIGNED-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:32 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v34 offset:116 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v35 offset:120 -; ALIGNED-NEXT: flat_store_byte v[86:87], v35 offset:121 -; ALIGNED-NEXT: flat_store_byte v[86:87], v34 offset:117 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v33 offset:112 -; ALIGNED-NEXT: flat_store_byte v[86:87], v33 offset:113 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v32 offset:108 -; ALIGNED-NEXT: flat_store_byte v[86:87], v32 offset:109 -; ALIGNED-NEXT: flat_store_byte v[86:87], v54 offset:120 -; ALIGNED-NEXT: flat_store_byte v[86:87], v55 offset:118 -; ALIGNED-NEXT: flat_store_byte v[86:87], v70 offset:124 +; ALIGNED-NEXT: flat_store_byte v[66:67], v54 offset:120 +; ALIGNED-NEXT: flat_store_byte v[66:67], v87 offset:118 +; ALIGNED-NEXT: flat_store_byte v[66:67], v102 offset:124 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v35 offset:120 +; ALIGNED-NEXT: flat_store_byte v[66:67], v35 offset:121 +; ALIGNED-NEXT: flat_store_byte v[66:67], v55 offset:122 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v34 offset:116 +; ALIGNED-NEXT: flat_store_byte v[66:67], v34 offset:117 +; ALIGNED-NEXT: flat_store_byte v[66:67], v81 offset:116 ; ALIGNED-NEXT: s_waitcnt vmcnt(2) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v14 -; ALIGNED-NEXT: flat_store_byte v[86:87], v71 offset:122 -; ALIGNED-NEXT: flat_store_byte v[86:87], v113 offset:116 -; ALIGNED-NEXT: flat_store_byte v[86:87], v112 offset:114 -; ALIGNED-NEXT: flat_store_byte v[86:87], v80 offset:112 -; ALIGNED-NEXT: flat_store_byte v[86:87], v81 offset:110 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 24, v14 +; ALIGNED-NEXT: flat_store_byte v[66:67], v99 offset:114 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v33 offset:112 +; ALIGNED-NEXT: flat_store_byte v[66:67], v33 offset:113 +; ALIGNED-NEXT: flat_store_byte v[66:67], v52 offset:112 +; ALIGNED-NEXT: flat_store_byte v[66:67], v101 offset:110 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v32 offset:108 +; ALIGNED-NEXT: flat_store_byte v[66:67], v32 offset:109 ; ALIGNED-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:56 ; ALIGNED-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:60 ; ALIGNED-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:52 ; ALIGNED-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:48 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v30 offset:100 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v31 offset:104 -; ALIGNED-NEXT: flat_store_byte v[86:87], v31 offset:105 -; ALIGNED-NEXT: flat_store_byte v[86:87], v30 offset:101 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v29 offset:96 -; ALIGNED-NEXT: flat_store_byte v[86:87], v29 offset:97 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v28 offset:92 -; ALIGNED-NEXT: flat_store_byte v[86:87], v28 offset:93 -; ALIGNED-NEXT: s_waitcnt vmcnt(0) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v30, 24, v10 -; ALIGNED-NEXT: flat_store_byte v[86:87], v114 offset:96 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v6 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v25 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v32, 24, v19 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 8, v14 +; ALIGNED-NEXT: flat_store_byte v[66:67], v98 offset:108 +; ALIGNED-NEXT: s_waitcnt vmcnt(1) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v10 +; ALIGNED-NEXT: flat_store_byte v[66:67], v50 offset:94 +; ALIGNED-NEXT: s_waitcnt vmcnt(0) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 24, v6 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 24, v23 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v54, 24, v19 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v14 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v31 offset:104 +; ALIGNED-NEXT: flat_store_byte v[66:67], v31 offset:105 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v31, 8, v10 -; ALIGNED-NEXT: flat_store_byte v[86:87], v115 offset:94 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v6 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v28 offset:92 +; ALIGNED-NEXT: flat_store_byte v[66:67], v28 offset:93 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v28, 8, v6 ; ALIGNED-NEXT: s_and_b32 vcc_lo, exec_lo, s6 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v25 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v33, 8, v19 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v36, 24, v24 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v37, 8, v24 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v34, 24, v17 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v15 -; ALIGNED-NEXT: flat_store_byte v[86:87], v82 offset:104 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v11 -; ALIGNED-NEXT: flat_store_byte v[86:87], v83 offset:102 -; ALIGNED-NEXT: flat_store_byte v[86:87], v48 offset:108 -; ALIGNED-NEXT: flat_store_byte v[86:87], v49 offset:106 -; ALIGNED-NEXT: flat_store_byte v[86:87], v50 offset:100 -; ALIGNED-NEXT: flat_store_byte v[86:87], v51 offset:98 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v24 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v33, 24, v15 +; ALIGNED-NEXT: flat_store_byte v[66:67], v86 offset:104 +; ALIGNED-NEXT: flat_store_byte v[66:67], v53 offset:102 +; ALIGNED-NEXT: flat_store_byte v[66:67], v100 offset:106 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v11 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v30 offset:100 +; ALIGNED-NEXT: flat_store_byte v[66:67], v30 offset:101 +; ALIGNED-NEXT: flat_store_byte v[66:67], v71 offset:100 +; ALIGNED-NEXT: flat_store_byte v[66:67], v51 offset:98 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v29 offset:96 +; ALIGNED-NEXT: flat_store_byte v[66:67], v29 offset:97 +; ALIGNED-NEXT: flat_store_byte v[66:67], v80 offset:96 ; ALIGNED-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:8 ; ALIGNED-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:12 ; ALIGNED-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; ALIGNED-NEXT: buffer_store_dword v24, off, s[0:3], s32 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v26 offset:84 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v27 offset:88 -; ALIGNED-NEXT: flat_store_byte v[86:87], v27 offset:89 -; ALIGNED-NEXT: flat_store_byte v[86:87], v26 offset:85 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v25 offset:80 -; ALIGNED-NEXT: flat_store_byte v[86:87], v25 offset:81 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v24 offset:76 -; ALIGNED-NEXT: flat_store_byte v[86:87], v24 offset:77 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v24, 24, v7 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v38, 24, v22 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v39, 8, v22 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v23 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v23 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v21 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v21 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v20 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 8, v20 +; ALIGNED-NEXT: flat_store_byte v[66:67], v97 offset:88 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 24, v7 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 8, v24 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v38, 8, v23 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v21 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v21 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v37, 24, v20 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 8, v20 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v19 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v17 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v35, 8, v17 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v54, 24, v16 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v55, 8, v16 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v15 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v13 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v13 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v28, 24, v12 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v29, 8, v12 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v11 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v48, 24, v9 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v49, 8, v9 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 24, v8 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v51, 8, v8 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v25, 8, v7 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v26, 24, v5 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v55, 24, v16 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v34, 8, v16 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 8, v15 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 24, v13 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v32, 8, v13 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v12 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 8, v12 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v30, 8, v11 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 24, v9 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v51, 8, v9 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v29, 24, v8 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 8, v8 +; ALIGNED-NEXT: flat_store_byte v[66:67], v115 offset:86 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v7 +; ALIGNED-NEXT: flat_store_byte v[66:67], v49 offset:92 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v49, 24, v5 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v27 offset:88 +; ALIGNED-NEXT: flat_store_byte v[66:67], v27 offset:89 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v27, 8, v5 -; ALIGNED-NEXT: flat_store_byte v[86:87], v64 offset:88 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v64, 24, v4 -; ALIGNED-NEXT: flat_store_byte v[86:87], v65 offset:86 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v65, 8, v4 -; ALIGNED-NEXT: flat_store_byte v[86:87], v66 offset:92 -; ALIGNED-NEXT: flat_store_byte v[86:87], v67 offset:90 -; ALIGNED-NEXT: flat_store_byte v[86:87], v98 offset:84 -; ALIGNED-NEXT: flat_store_byte v[86:87], v99 offset:82 -; ALIGNED-NEXT: flat_store_byte v[86:87], v36 offset:80 -; ALIGNED-NEXT: flat_store_byte v[86:87], v37 offset:78 +; ALIGNED-NEXT: flat_store_byte v[66:67], v85 offset:90 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 24, v4 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v26 offset:84 +; ALIGNED-NEXT: flat_store_byte v[66:67], v26 offset:85 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v26, 8, v4 +; ALIGNED-NEXT: flat_store_byte v[66:67], v114 offset:84 +; ALIGNED-NEXT: flat_store_byte v[66:67], v48 offset:82 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v25 offset:80 +; ALIGNED-NEXT: flat_store_byte v[66:67], v25 offset:81 +; ALIGNED-NEXT: flat_store_byte v[66:67], v82 offset:80 +; ALIGNED-NEXT: flat_store_byte v[66:67], v96 offset:78 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v24 offset:76 +; ALIGNED-NEXT: flat_store_byte v[66:67], v24 offset:77 ; ALIGNED-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:24 ; ALIGNED-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:28 ; ALIGNED-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:20 ; ALIGNED-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:16 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v22 offset:68 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v23 offset:72 -; ALIGNED-NEXT: flat_store_byte v[86:87], v23 offset:73 -; ALIGNED-NEXT: flat_store_byte v[86:87], v22 offset:69 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v21 offset:64 -; ALIGNED-NEXT: flat_store_byte v[86:87], v21 offset:65 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v20 offset:60 -; ALIGNED-NEXT: flat_store_byte v[84:85], v20 offset:64 -; ALIGNED-NEXT: flat_store_byte v[86:87], v38 offset:72 -; ALIGNED-NEXT: flat_store_byte v[86:87], v39 offset:70 -; ALIGNED-NEXT: flat_store_byte v[86:87], v100 offset:76 -; ALIGNED-NEXT: flat_store_byte v[86:87], v101 offset:74 -; ALIGNED-NEXT: flat_store_byte v[86:87], v102 offset:68 -; ALIGNED-NEXT: flat_store_byte v[86:87], v103 offset:66 -; ALIGNED-NEXT: flat_store_byte v[86:87], v68 offset:64 -; ALIGNED-NEXT: flat_store_byte v[86:87], v69 offset:62 +; ALIGNED-NEXT: flat_store_byte v[66:67], v113 offset:72 +; ALIGNED-NEXT: flat_store_byte v[66:67], v39 offset:70 +; ALIGNED-NEXT: flat_store_byte v[66:67], v83 offset:76 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v23 offset:72 +; ALIGNED-NEXT: flat_store_byte v[66:67], v23 offset:73 +; ALIGNED-NEXT: flat_store_byte v[66:67], v38 offset:74 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v22 offset:68 +; ALIGNED-NEXT: flat_store_byte v[66:67], v22 offset:69 +; ALIGNED-NEXT: flat_store_byte v[66:67], v84 offset:68 +; ALIGNED-NEXT: flat_store_byte v[66:67], v112 offset:66 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v21 offset:64 +; ALIGNED-NEXT: flat_store_byte v[66:67], v21 offset:65 +; ALIGNED-NEXT: flat_store_byte v[66:67], v37 offset:64 +; ALIGNED-NEXT: flat_store_byte v[66:67], v70 offset:62 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v20 offset:60 +; ALIGNED-NEXT: flat_store_byte v[64:65], v20 offset:64 ; ALIGNED-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:104 ; ALIGNED-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:108 ; ALIGNED-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; ALIGNED-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:96 -; ALIGNED-NEXT: flat_store_byte v[86:87], v52 offset:56 -; ALIGNED-NEXT: flat_store_byte v[86:87], v53 offset:54 -; ALIGNED-NEXT: flat_store_byte v[86:87], v32 offset:60 -; ALIGNED-NEXT: flat_store_byte v[86:87], v33 offset:58 -; ALIGNED-NEXT: flat_store_byte v[86:87], v34 offset:52 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v18 offset:52 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v19 offset:56 -; ALIGNED-NEXT: flat_store_byte v[86:87], v19 offset:57 -; ALIGNED-NEXT: flat_store_byte v[86:87], v18 offset:53 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v17 offset:48 -; ALIGNED-NEXT: flat_store_byte v[86:87], v35 offset:50 -; ALIGNED-NEXT: flat_store_byte v[86:87], v17 offset:49 -; ALIGNED-NEXT: flat_store_byte v[86:87], v54 offset:48 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v16 offset:44 -; ALIGNED-NEXT: flat_store_byte v[86:87], v55 offset:46 -; ALIGNED-NEXT: flat_store_byte v[86:87], v16 offset:45 +; ALIGNED-NEXT: flat_store_byte v[66:67], v103 offset:56 +; ALIGNED-NEXT: flat_store_byte v[66:67], v36 offset:54 +; ALIGNED-NEXT: flat_store_byte v[66:67], v54 offset:60 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v19 offset:56 +; ALIGNED-NEXT: flat_store_byte v[66:67], v19 offset:57 +; ALIGNED-NEXT: flat_store_byte v[66:67], v87 offset:58 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v18 offset:52 +; ALIGNED-NEXT: flat_store_byte v[66:67], v18 offset:53 +; ALIGNED-NEXT: flat_store_byte v[66:67], v102 offset:52 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v17 offset:48 +; ALIGNED-NEXT: flat_store_byte v[66:67], v35 offset:50 +; ALIGNED-NEXT: flat_store_byte v[66:67], v17 offset:49 +; ALIGNED-NEXT: flat_store_byte v[66:67], v55 offset:48 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v16 offset:44 +; ALIGNED-NEXT: flat_store_byte v[66:67], v34 offset:46 +; ALIGNED-NEXT: flat_store_byte v[66:67], v16 offset:45 ; ALIGNED-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:120 ; ALIGNED-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; ALIGNED-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:116 ; ALIGNED-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:112 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v14 offset:36 -; ALIGNED-NEXT: flat_store_byte v[86:87], v70 offset:40 -; ALIGNED-NEXT: flat_store_byte v[86:87], v71 offset:38 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v15 offset:40 -; ALIGNED-NEXT: flat_store_byte v[86:87], v113 offset:44 -; ALIGNED-NEXT: flat_store_byte v[86:87], v15 offset:41 -; ALIGNED-NEXT: flat_store_byte v[86:87], v112 offset:42 -; ALIGNED-NEXT: flat_store_byte v[86:87], v14 offset:37 -; ALIGNED-NEXT: flat_store_byte v[86:87], v80 offset:36 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v13 offset:32 -; ALIGNED-NEXT: flat_store_byte v[86:87], v81 offset:34 -; ALIGNED-NEXT: flat_store_byte v[86:87], v13 offset:33 -; ALIGNED-NEXT: flat_store_byte v[86:87], v28 offset:32 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v12 offset:28 -; ALIGNED-NEXT: flat_store_byte v[86:87], v29 offset:30 -; ALIGNED-NEXT: flat_store_byte v[84:85], v12 offset:32 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v14 offset:36 +; ALIGNED-NEXT: flat_store_byte v[66:67], v81 offset:40 +; ALIGNED-NEXT: flat_store_byte v[66:67], v99 offset:38 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v15 offset:40 +; ALIGNED-NEXT: flat_store_byte v[66:67], v33 offset:44 +; ALIGNED-NEXT: flat_store_byte v[66:67], v15 offset:41 +; ALIGNED-NEXT: flat_store_byte v[66:67], v52 offset:42 +; ALIGNED-NEXT: flat_store_byte v[66:67], v14 offset:37 +; ALIGNED-NEXT: flat_store_byte v[66:67], v101 offset:36 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v13 offset:32 +; ALIGNED-NEXT: flat_store_byte v[66:67], v32 offset:34 +; ALIGNED-NEXT: flat_store_byte v[66:67], v13 offset:33 +; ALIGNED-NEXT: flat_store_byte v[66:67], v86 offset:32 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v12 offset:28 +; ALIGNED-NEXT: flat_store_byte v[66:67], v53 offset:30 +; ALIGNED-NEXT: flat_store_byte v[64:65], v12 offset:32 ; ALIGNED-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:72 ; ALIGNED-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:76 ; ALIGNED-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:68 ; ALIGNED-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:64 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v10 offset:20 -; ALIGNED-NEXT: flat_store_byte v[86:87], v30 offset:24 -; ALIGNED-NEXT: flat_store_byte v[86:87], v31 offset:22 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v11 offset:24 -; ALIGNED-NEXT: flat_store_byte v[86:87], v82 offset:28 -; ALIGNED-NEXT: flat_store_byte v[86:87], v11 offset:25 -; ALIGNED-NEXT: flat_store_byte v[86:87], v83 offset:26 -; ALIGNED-NEXT: flat_store_byte v[86:87], v10 offset:21 -; ALIGNED-NEXT: flat_store_byte v[86:87], v48 offset:20 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v9 offset:16 -; ALIGNED-NEXT: flat_store_byte v[86:87], v49 offset:18 -; ALIGNED-NEXT: flat_store_byte v[86:87], v9 offset:17 -; ALIGNED-NEXT: flat_store_byte v[86:87], v50 offset:16 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v8 offset:12 -; ALIGNED-NEXT: flat_store_byte v[86:87], v51 offset:14 -; ALIGNED-NEXT: flat_store_byte v[84:85], v8 offset:16 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v10 offset:20 +; ALIGNED-NEXT: flat_store_byte v[66:67], v98 offset:24 +; ALIGNED-NEXT: flat_store_byte v[66:67], v31 offset:22 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v11 offset:24 +; ALIGNED-NEXT: flat_store_byte v[66:67], v100 offset:28 +; ALIGNED-NEXT: flat_store_byte v[66:67], v11 offset:25 +; ALIGNED-NEXT: flat_store_byte v[66:67], v30 offset:26 +; ALIGNED-NEXT: flat_store_byte v[66:67], v10 offset:21 +; ALIGNED-NEXT: flat_store_byte v[66:67], v71 offset:20 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v9 offset:16 +; ALIGNED-NEXT: flat_store_byte v[66:67], v51 offset:18 +; ALIGNED-NEXT: flat_store_byte v[66:67], v9 offset:17 +; ALIGNED-NEXT: flat_store_byte v[66:67], v29 offset:16 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v8 offset:12 +; ALIGNED-NEXT: flat_store_byte v[66:67], v80 offset:14 +; ALIGNED-NEXT: flat_store_byte v[64:65], v8 offset:16 ; ALIGNED-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; ALIGNED-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; ALIGNED-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:84 ; ALIGNED-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:80 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v6 offset:4 -; ALIGNED-NEXT: flat_store_byte v[86:87], v114 offset:8 -; ALIGNED-NEXT: flat_store_byte v[86:87], v115 offset:6 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v7 offset:8 -; ALIGNED-NEXT: flat_store_byte v[86:87], v24 offset:12 -; ALIGNED-NEXT: flat_store_byte v[86:87], v7 offset:9 -; ALIGNED-NEXT: flat_store_byte v[86:87], v25 offset:10 -; ALIGNED-NEXT: flat_store_byte v[84:85], v6 offset:8 -; ALIGNED-NEXT: flat_store_byte v[86:87], v26 offset:4 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v5 -; ALIGNED-NEXT: flat_store_byte v[86:87], v27 offset:2 -; ALIGNED-NEXT: flat_store_byte v[84:85], v5 offset:4 -; ALIGNED-NEXT: flat_store_byte v[86:87], v64 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[84:85], v4 offset:2 -; ALIGNED-NEXT: flat_store_byte v[84:85], v65 offset:1 -; ALIGNED-NEXT: flat_store_byte v[84:85], v4 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v6 offset:4 +; ALIGNED-NEXT: flat_store_byte v[66:67], v50 offset:8 +; ALIGNED-NEXT: flat_store_byte v[66:67], v28 offset:6 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v7 offset:8 +; ALIGNED-NEXT: flat_store_byte v[66:67], v97 offset:12 +; ALIGNED-NEXT: flat_store_byte v[66:67], v7 offset:9 +; ALIGNED-NEXT: flat_store_byte v[66:67], v115 offset:10 +; ALIGNED-NEXT: flat_store_byte v[64:65], v6 offset:8 +; ALIGNED-NEXT: flat_store_byte v[66:67], v49 offset:4 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[68:69], v5 +; ALIGNED-NEXT: flat_store_byte v[66:67], v27 offset:2 +; ALIGNED-NEXT: flat_store_byte v[64:65], v5 offset:4 +; ALIGNED-NEXT: flat_store_byte v[66:67], v85 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[64:65], v4 offset:2 +; ALIGNED-NEXT: flat_store_byte v[64:65], v26 offset:1 +; ALIGNED-NEXT: flat_store_byte v[64:65], v4 ; ALIGNED-NEXT: s_cbranch_vccnz .LBB2_1 ; ALIGNED-NEXT: ; %bb.2: ; %static-memcpy-post-expansion ; ALIGNED-NEXT: s_waitcnt lgkmcnt(0) @@ -3664,14 +3666,14 @@ define void @memcpy_p0_p5_sz2048(ptr addrspace(0) align 1 %dst, ptr addrspace(5) ; CHECK-NEXT: buffer_load_dword v66, v2, s[0:3], 0 offen offset:168 ; CHECK-NEXT: buffer_load_dword v65, v2, s[0:3], 0 offen offset:164 ; CHECK-NEXT: buffer_load_dword v64, v2, s[0:3], 0 offen offset:160 -; CHECK-NEXT: buffer_load_dword v71, v2, s[0:3], 0 offen offset:156 -; CHECK-NEXT: buffer_load_dword v70, v2, s[0:3], 0 offen offset:152 -; CHECK-NEXT: buffer_load_dword v69, v2, s[0:3], 0 offen offset:148 -; CHECK-NEXT: buffer_load_dword v68, v2, s[0:3], 0 offen offset:144 -; CHECK-NEXT: buffer_load_dword v83, v2, s[0:3], 0 offen offset:140 -; CHECK-NEXT: buffer_load_dword v82, v2, s[0:3], 0 offen offset:136 -; CHECK-NEXT: buffer_load_dword v81, v2, s[0:3], 0 offen offset:132 -; CHECK-NEXT: buffer_load_dword v80, v2, s[0:3], 0 offen offset:128 +; CHECK-NEXT: buffer_load_dword v71, v2, s[0:3], 0 offen offset:140 +; CHECK-NEXT: buffer_load_dword v83, v2, s[0:3], 0 offen offset:156 +; CHECK-NEXT: buffer_load_dword v82, v2, s[0:3], 0 offen offset:152 +; CHECK-NEXT: buffer_load_dword v81, v2, s[0:3], 0 offen offset:148 +; CHECK-NEXT: buffer_load_dword v80, v2, s[0:3], 0 offen offset:144 +; CHECK-NEXT: buffer_load_dword v70, v2, s[0:3], 0 offen offset:136 +; CHECK-NEXT: buffer_load_dword v69, v2, s[0:3], 0 offen offset:132 +; CHECK-NEXT: buffer_load_dword v68, v2, s[0:3], 0 offen offset:128 ; CHECK-NEXT: buffer_load_dword v84, v2, s[0:3], 0 offen ; CHECK-NEXT: buffer_load_dword v85, v2, s[0:3], 0 offen offset:4 ; CHECK-NEXT: buffer_load_dword v86, v2, s[0:3], 0 offen offset:8 @@ -3700,10 +3702,10 @@ define void @memcpy_p0_p5_sz2048(ptr addrspace(0) align 1 %dst, ptr addrspace(5) ; CHECK-NEXT: flat_store_dwordx4 v[102:103], v[52:55] offset:128 ; CHECK-NEXT: s_waitcnt vmcnt(16) ; CHECK-NEXT: flat_store_dwordx4 v[102:103], v[64:67] offset:112 -; CHECK-NEXT: s_waitcnt vmcnt(12) -; CHECK-NEXT: flat_store_dwordx4 v[102:103], v[68:71] offset:96 +; CHECK-NEXT: s_waitcnt vmcnt(11) +; CHECK-NEXT: flat_store_dwordx4 v[102:103], v[80:83] offset:96 ; CHECK-NEXT: s_waitcnt vmcnt(8) -; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[80:83] offset:128 +; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[68:71] offset:128 ; CHECK-NEXT: flat_store_dwordx4 v[102:103], v[48:51] offset:64 ; CHECK-NEXT: flat_store_dwordx4 v[102:103], v[35:38] offset:48 ; CHECK-NEXT: flat_store_dwordx4 v[102:103], v[15:18] offset:32 @@ -8603,7 +8605,7 @@ define void @memmove_p0_p4_sz2048(ptr addrspace(0) align 1 %dst, ptr addrspace(4 ; ALIGNED-NEXT: .LBB7_2: ; %memmove_fwd_loop ; ALIGNED-NEXT: ; =>This Inner Loop Header: Depth=1 ; ALIGNED-NEXT: s_clause 0xf -; ALIGNED-NEXT: global_load_dwordx4 v[112:115], v[2:3], off offset:240 +; ALIGNED-NEXT: global_load_dwordx4 v[96:99], v[2:3], off offset:240 ; ALIGNED-NEXT: global_load_dwordx4 v[84:87], v[2:3], off offset:224 ; ALIGNED-NEXT: global_load_dwordx4 v[80:83], v[2:3], off offset:208 ; ALIGNED-NEXT: global_load_dwordx4 v[68:71], v[2:3], off offset:192 @@ -8617,482 +8619,483 @@ define void @memmove_p0_p4_sz2048(ptr addrspace(0) align 1 %dst, ptr addrspace(4 ; ALIGNED-NEXT: global_load_dwordx4 v[20:23], v[2:3], off offset:64 ; ALIGNED-NEXT: global_load_dwordx4 v[16:19], v[2:3], off offset:48 ; ALIGNED-NEXT: global_load_dwordx4 v[12:15], v[2:3], off offset:32 -; ALIGNED-NEXT: global_load_dwordx4 v[4:7], v[2:3], off ; ALIGNED-NEXT: global_load_dwordx4 v[8:11], v[2:3], off offset:16 -; ALIGNED-NEXT: v_add_co_u32 v96, vcc_lo, v0, 6 -; ALIGNED-NEXT: v_add_co_ci_u32_e64 v97, null, 0, v1, vcc_lo -; ALIGNED-NEXT: v_add_co_u32 v98, vcc_lo, v0, 3 -; ALIGNED-NEXT: v_add_co_ci_u32_e64 v99, null, 0, v1, vcc_lo +; ALIGNED-NEXT: global_load_dwordx4 v[4:7], v[2:3], off +; ALIGNED-NEXT: v_add_co_u32 v100, vcc_lo, v0, 6 +; ALIGNED-NEXT: v_add_co_ci_u32_e64 v101, null, 0, v1, vcc_lo +; ALIGNED-NEXT: v_add_co_u32 v102, vcc_lo, v0, 3 +; ALIGNED-NEXT: v_add_co_ci_u32_e64 v103, null, 0, v1, vcc_lo ; ALIGNED-NEXT: v_add_co_u32 v2, vcc_lo, 0x100, v2 ; ALIGNED-NEXT: v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo ; ALIGNED-NEXT: s_add_u32 s4, s4, 0xffffff00 ; ALIGNED-NEXT: s_addc_u32 s5, s5, -1 ; ALIGNED-NEXT: s_waitcnt vmcnt(15) -; ALIGNED-NEXT: buffer_store_dword v114, off, s[0:3], s32 offset:168 -; ALIGNED-NEXT: buffer_store_dword v115, off, s[0:3], s32 offset:172 -; ALIGNED-NEXT: buffer_store_dword v113, off, s[0:3], s32 offset:164 -; ALIGNED-NEXT: buffer_store_dword v112, off, s[0:3], s32 offset:160 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v114 offset:244 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v114 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v114 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v115 offset:248 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v115 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:249 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v115 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:245 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v113 offset:240 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:241 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v112 offset:236 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:237 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v113 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v113 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v112 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v112 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:248 +; ALIGNED-NEXT: buffer_store_dword v98, off, s[0:3], s32 offset:168 +; ALIGNED-NEXT: buffer_store_dword v99, off, s[0:3], s32 offset:172 +; ALIGNED-NEXT: buffer_store_dword v97, off, s[0:3], s32 offset:164 +; ALIGNED-NEXT: buffer_store_dword v96, off, s[0:3], s32 offset:160 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 24, v98 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 8, v98 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v99 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v98 offset:244 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v99 offset:248 +; ALIGNED-NEXT: flat_store_byte v[102:103], v99 offset:249 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v99 +; ALIGNED-NEXT: flat_store_byte v[102:103], v98 offset:245 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v97 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v97 offset:240 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v97 +; ALIGNED-NEXT: flat_store_byte v[102:103], v97 offset:241 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 24, v96 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v96 offset:236 +; ALIGNED-NEXT: flat_store_byte v[102:103], v96 offset:237 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 8, v96 +; ALIGNED-NEXT: flat_store_byte v[102:103], v112 offset:248 ; ALIGNED-NEXT: s_waitcnt vmcnt(14) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v86 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:246 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v86 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:252 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v87 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:250 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v87 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:244 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v85 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:242 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v85 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:240 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v84 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:238 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v84 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 24, v86 +; ALIGNED-NEXT: flat_store_byte v[102:103], v113 offset:246 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 8, v86 +; ALIGNED-NEXT: flat_store_byte v[102:103], v114 offset:252 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v87 +; ALIGNED-NEXT: flat_store_byte v[102:103], v99 offset:250 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v87 +; ALIGNED-NEXT: flat_store_byte v[102:103], v98 offset:244 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v85 +; ALIGNED-NEXT: flat_store_byte v[102:103], v115 offset:242 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v85 +; ALIGNED-NEXT: flat_store_byte v[102:103], v97 offset:240 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 24, v84 +; ALIGNED-NEXT: flat_store_byte v[102:103], v96 offset:238 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 8, v84 ; ALIGNED-NEXT: buffer_store_dword v86, off, s[0:3], s32 offset:184 ; ALIGNED-NEXT: buffer_store_dword v87, off, s[0:3], s32 offset:188 ; ALIGNED-NEXT: buffer_store_dword v85, off, s[0:3], s32 offset:180 ; ALIGNED-NEXT: buffer_store_dword v84, off, s[0:3], s32 offset:176 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v86 offset:228 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v87 offset:232 -; ALIGNED-NEXT: flat_store_byte v[98:99], v87 offset:233 -; ALIGNED-NEXT: flat_store_byte v[98:99], v86 offset:229 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v85 offset:224 -; ALIGNED-NEXT: flat_store_byte v[98:99], v85 offset:225 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v84 offset:220 -; ALIGNED-NEXT: flat_store_byte v[98:99], v84 offset:221 +; ALIGNED-NEXT: flat_store_byte v[102:103], v112 offset:232 ; ALIGNED-NEXT: s_waitcnt vmcnt(13) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v82 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 8, v82 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v83 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 24, v82 +; ALIGNED-NEXT: flat_store_byte v[102:103], v113 offset:230 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 8, v82 +; ALIGNED-NEXT: flat_store_byte v[102:103], v114 offset:236 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v83 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v87 offset:232 +; ALIGNED-NEXT: flat_store_byte v[102:103], v87 offset:233 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v83 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:232 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v81 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:230 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v81 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:236 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v80 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:234 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v80 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:228 +; ALIGNED-NEXT: flat_store_byte v[102:103], v99 offset:234 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 24, v81 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v86 offset:228 +; ALIGNED-NEXT: flat_store_byte v[102:103], v86 offset:229 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 8, v81 +; ALIGNED-NEXT: flat_store_byte v[102:103], v98 offset:228 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v80 +; ALIGNED-NEXT: flat_store_byte v[102:103], v115 offset:226 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v80 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v85 offset:224 +; ALIGNED-NEXT: flat_store_byte v[102:103], v85 offset:225 ; ALIGNED-NEXT: s_waitcnt vmcnt(12) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v70 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:226 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v70 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:224 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v71 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:222 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v71 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 24, v70 +; ALIGNED-NEXT: flat_store_byte v[102:103], v97 offset:224 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 8, v70 +; ALIGNED-NEXT: flat_store_byte v[102:103], v96 offset:222 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 24, v71 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v84 offset:220 +; ALIGNED-NEXT: flat_store_byte v[102:103], v84 offset:221 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 8, v71 ; ALIGNED-NEXT: buffer_store_dword v82, off, s[0:3], s32 offset:136 ; ALIGNED-NEXT: buffer_store_dword v83, off, s[0:3], s32 offset:140 ; ALIGNED-NEXT: buffer_store_dword v81, off, s[0:3], s32 offset:132 ; ALIGNED-NEXT: buffer_store_dword v80, off, s[0:3], s32 offset:128 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v82 offset:212 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v83 offset:216 -; ALIGNED-NEXT: flat_store_byte v[98:99], v83 offset:217 -; ALIGNED-NEXT: flat_store_byte v[98:99], v82 offset:213 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v81 offset:208 -; ALIGNED-NEXT: flat_store_byte v[98:99], v81 offset:209 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v80 offset:204 -; ALIGNED-NEXT: flat_store_byte v[98:99], v80 offset:205 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v69 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v69 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v68 +; ALIGNED-NEXT: flat_store_byte v[102:103], v112 offset:216 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 24, v69 +; ALIGNED-NEXT: flat_store_byte v[102:103], v113 offset:214 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 8, v69 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v83 offset:216 +; ALIGNED-NEXT: flat_store_byte v[102:103], v83 offset:217 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v68 -; ALIGNED-NEXT: flat_store_byte v[98:99], v84 offset:216 +; ALIGNED-NEXT: flat_store_byte v[102:103], v114 offset:220 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v68 +; ALIGNED-NEXT: flat_store_byte v[102:103], v87 offset:218 ; ALIGNED-NEXT: s_waitcnt vmcnt(11) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v66 -; ALIGNED-NEXT: flat_store_byte v[98:99], v85 offset:214 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 8, v66 -; ALIGNED-NEXT: flat_store_byte v[98:99], v86 offset:220 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v67 -; ALIGNED-NEXT: flat_store_byte v[98:99], v87 offset:218 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v67 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:212 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v65 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:210 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v65 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:208 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v64 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:206 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v64 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 24, v66 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v82 offset:212 +; ALIGNED-NEXT: flat_store_byte v[102:103], v82 offset:213 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 8, v66 +; ALIGNED-NEXT: flat_store_byte v[102:103], v99 offset:212 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 24, v67 +; ALIGNED-NEXT: flat_store_byte v[102:103], v86 offset:210 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 8, v67 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v81 offset:208 +; ALIGNED-NEXT: flat_store_byte v[102:103], v81 offset:209 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 24, v65 +; ALIGNED-NEXT: flat_store_byte v[102:103], v98 offset:208 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 8, v65 +; ALIGNED-NEXT: flat_store_byte v[102:103], v115 offset:206 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v64 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v80 offset:204 +; ALIGNED-NEXT: flat_store_byte v[102:103], v80 offset:205 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 8, v64 ; ALIGNED-NEXT: buffer_store_dword v70, off, s[0:3], s32 offset:152 ; ALIGNED-NEXT: buffer_store_dword v71, off, s[0:3], s32 offset:156 ; ALIGNED-NEXT: buffer_store_dword v69, off, s[0:3], s32 offset:148 ; ALIGNED-NEXT: buffer_store_dword v68, off, s[0:3], s32 offset:144 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v70 offset:196 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v71 offset:200 -; ALIGNED-NEXT: flat_store_byte v[98:99], v71 offset:201 -; ALIGNED-NEXT: flat_store_byte v[98:99], v70 offset:197 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v69 offset:192 -; ALIGNED-NEXT: flat_store_byte v[98:99], v69 offset:193 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v68 offset:188 -; ALIGNED-NEXT: flat_store_byte v[98:99], v68 offset:189 +; ALIGNED-NEXT: flat_store_byte v[102:103], v85 offset:200 ; ALIGNED-NEXT: s_waitcnt vmcnt(10) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v54 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 8, v54 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v55 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 24, v54 +; ALIGNED-NEXT: flat_store_byte v[102:103], v97 offset:198 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 8, v54 +; ALIGNED-NEXT: flat_store_byte v[102:103], v96 offset:204 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 24, v55 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v71 offset:200 +; ALIGNED-NEXT: flat_store_byte v[102:103], v71 offset:201 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 8, v55 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:200 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v52 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:198 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v52 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:204 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v53 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:202 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v53 -; ALIGNED-NEXT: flat_store_byte v[98:99], v80 offset:196 +; ALIGNED-NEXT: flat_store_byte v[102:103], v84 offset:202 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v52 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v70 offset:196 +; ALIGNED-NEXT: flat_store_byte v[102:103], v70 offset:197 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 8, v52 +; ALIGNED-NEXT: flat_store_byte v[102:103], v112 offset:196 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 24, v53 +; ALIGNED-NEXT: flat_store_byte v[102:103], v113 offset:194 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 8, v53 +; ALIGNED-NEXT: flat_store_byte v[102:103], v83 offset:190 ; ALIGNED-NEXT: s_waitcnt vmcnt(9) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v50 -; ALIGNED-NEXT: flat_store_byte v[98:99], v81 offset:194 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v50 -; ALIGNED-NEXT: flat_store_byte v[98:99], v82 offset:192 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v51 -; ALIGNED-NEXT: flat_store_byte v[98:99], v83 offset:190 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v51 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 24, v51 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v69 offset:192 +; ALIGNED-NEXT: flat_store_byte v[102:103], v69 offset:193 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 24, v50 +; ALIGNED-NEXT: flat_store_byte v[102:103], v114 offset:192 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v50 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v68 offset:188 +; ALIGNED-NEXT: flat_store_byte v[102:103], v68 offset:189 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 8, v51 ; ALIGNED-NEXT: buffer_store_dword v66, off, s[0:3], s32 offset:232 ; ALIGNED-NEXT: buffer_store_dword v67, off, s[0:3], s32 offset:236 ; ALIGNED-NEXT: buffer_store_dword v65, off, s[0:3], s32 offset:228 ; ALIGNED-NEXT: buffer_store_dword v64, off, s[0:3], s32 offset:224 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v66 offset:180 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v67 offset:184 -; ALIGNED-NEXT: flat_store_byte v[98:99], v67 offset:185 -; ALIGNED-NEXT: flat_store_byte v[98:99], v66 offset:181 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v65 offset:176 -; ALIGNED-NEXT: flat_store_byte v[98:99], v65 offset:177 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v64 offset:172 -; ALIGNED-NEXT: flat_store_byte v[98:99], v64 offset:173 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v64, 24, v49 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v65, 8, v49 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v66, 24, v48 +; ALIGNED-NEXT: flat_store_byte v[102:103], v87 offset:184 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 24, v49 +; ALIGNED-NEXT: flat_store_byte v[102:103], v82 offset:182 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 8, v49 +; ALIGNED-NEXT: flat_store_byte v[102:103], v99 offset:188 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 24, v48 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v67 offset:184 +; ALIGNED-NEXT: flat_store_byte v[102:103], v67 offset:185 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v67, 8, v48 -; ALIGNED-NEXT: flat_store_byte v[98:99], v84 offset:184 +; ALIGNED-NEXT: flat_store_byte v[102:103], v86 offset:186 ; ALIGNED-NEXT: s_waitcnt vmcnt(8) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v38 -; ALIGNED-NEXT: flat_store_byte v[98:99], v85 offset:182 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 8, v38 -; ALIGNED-NEXT: flat_store_byte v[98:99], v86 offset:188 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v39 -; ALIGNED-NEXT: flat_store_byte v[98:99], v87 offset:186 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v39 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:180 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v37 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:178 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v37 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:176 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v36 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:174 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v36 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v38 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v66 offset:180 +; ALIGNED-NEXT: flat_store_byte v[102:103], v66 offset:181 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v66, 8, v38 +; ALIGNED-NEXT: flat_store_byte v[102:103], v81 offset:180 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 24, v39 +; ALIGNED-NEXT: flat_store_byte v[102:103], v98 offset:178 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 8, v39 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v65 offset:176 +; ALIGNED-NEXT: flat_store_byte v[102:103], v65 offset:177 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v65, 24, v37 +; ALIGNED-NEXT: flat_store_byte v[102:103], v115 offset:176 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v37 +; ALIGNED-NEXT: flat_store_byte v[102:103], v80 offset:174 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v36 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v64 offset:172 +; ALIGNED-NEXT: flat_store_byte v[102:103], v64 offset:173 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v64, 8, v36 ; ALIGNED-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:252 ; ALIGNED-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:248 ; ALIGNED-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:244 ; ALIGNED-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:240 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v54 offset:164 -; ALIGNED-NEXT: flat_store_byte v[98:99], v54 offset:165 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v55 offset:168 -; ALIGNED-NEXT: flat_store_byte v[98:99], v55 offset:169 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v52 offset:156 -; ALIGNED-NEXT: flat_store_byte v[98:99], v52 offset:157 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v53 offset:160 -; ALIGNED-NEXT: flat_store_byte v[98:99], v53 offset:161 +; ALIGNED-NEXT: flat_store_byte v[102:103], v85 offset:168 ; ALIGNED-NEXT: s_waitcnt vmcnt(7) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 24, v34 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 8, v34 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 24, v34 +; ALIGNED-NEXT: flat_store_byte v[102:103], v97 offset:166 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 8, v34 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v54 offset:164 +; ALIGNED-NEXT: flat_store_byte v[102:103], v54 offset:165 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v54, 24, v35 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v55, 8, v35 -; ALIGNED-NEXT: flat_store_byte v[98:99], v68 offset:168 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v33 -; ALIGNED-NEXT: flat_store_byte v[98:99], v69 offset:166 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 8, v33 -; ALIGNED-NEXT: flat_store_byte v[98:99], v70 offset:172 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v32 -; ALIGNED-NEXT: flat_store_byte v[98:99], v71 offset:170 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 8, v32 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:160 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:158 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:164 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:162 +; ALIGNED-NEXT: flat_store_byte v[102:103], v96 offset:172 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 8, v35 +; ALIGNED-NEXT: flat_store_byte v[102:103], v71 offset:170 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 24, v33 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v55 offset:168 +; ALIGNED-NEXT: flat_store_byte v[102:103], v55 offset:169 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v55, 8, v33 +; ALIGNED-NEXT: flat_store_byte v[102:103], v84 offset:160 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v32 +; ALIGNED-NEXT: flat_store_byte v[102:103], v70 offset:158 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 8, v32 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v52 offset:156 +; ALIGNED-NEXT: flat_store_byte v[102:103], v52 offset:157 +; ALIGNED-NEXT: s_waitcnt vmcnt(6) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 24, v30 +; ALIGNED-NEXT: flat_store_byte v[102:103], v112 offset:164 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v30 +; ALIGNED-NEXT: flat_store_byte v[102:103], v113 offset:162 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v53 offset:160 +; ALIGNED-NEXT: flat_store_byte v[102:103], v53 offset:161 ; ALIGNED-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:200 ; ALIGNED-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:204 ; ALIGNED-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:196 ; ALIGNED-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:192 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v50 offset:148 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v51 offset:152 -; ALIGNED-NEXT: flat_store_byte v[98:99], v51 offset:153 -; ALIGNED-NEXT: flat_store_byte v[98:99], v50 offset:149 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v49 offset:144 -; ALIGNED-NEXT: flat_store_byte v[98:99], v49 offset:145 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v48 offset:140 -; ALIGNED-NEXT: flat_store_byte v[98:99], v48 offset:141 -; ALIGNED-NEXT: s_waitcnt vmcnt(6) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v48, 24, v29 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v49, 8, v29 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 24, v28 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v30 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v30 +; ALIGNED-NEXT: flat_store_byte v[102:103], v83 offset:156 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 24, v28 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v31 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v31 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v51 offset:152 +; ALIGNED-NEXT: flat_store_byte v[102:103], v51 offset:153 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v51, 8, v28 -; ALIGNED-NEXT: flat_store_byte v[98:99], v80 offset:152 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 8, v31 +; ALIGNED-NEXT: flat_store_byte v[102:103], v69 offset:152 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 24, v29 +; ALIGNED-NEXT: flat_store_byte v[102:103], v114 offset:150 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v29 +; ALIGNED-NEXT: flat_store_byte v[102:103], v68 offset:154 ; ALIGNED-NEXT: s_waitcnt vmcnt(5) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v26 -; ALIGNED-NEXT: flat_store_byte v[98:99], v81 offset:150 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v26 -; ALIGNED-NEXT: flat_store_byte v[98:99], v82 offset:156 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v27 -; ALIGNED-NEXT: flat_store_byte v[98:99], v83 offset:154 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v27 -; ALIGNED-NEXT: flat_store_byte v[98:99], v64 offset:148 -; ALIGNED-NEXT: flat_store_byte v[98:99], v65 offset:146 -; ALIGNED-NEXT: flat_store_byte v[98:99], v66 offset:144 -; ALIGNED-NEXT: flat_store_byte v[98:99], v67 offset:142 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v26 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v50 offset:148 +; ALIGNED-NEXT: flat_store_byte v[102:103], v50 offset:149 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 8, v26 +; ALIGNED-NEXT: flat_store_byte v[102:103], v87 offset:148 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 24, v27 +; ALIGNED-NEXT: flat_store_byte v[102:103], v82 offset:146 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 8, v27 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v49 offset:144 +; ALIGNED-NEXT: flat_store_byte v[102:103], v49 offset:145 +; ALIGNED-NEXT: flat_store_byte v[102:103], v99 offset:144 +; ALIGNED-NEXT: flat_store_byte v[102:103], v67 offset:142 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v48 offset:140 +; ALIGNED-NEXT: flat_store_byte v[102:103], v48 offset:141 ; ALIGNED-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:216 ; ALIGNED-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; ALIGNED-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:212 ; ALIGNED-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:208 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v38 offset:132 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v39 offset:136 -; ALIGNED-NEXT: flat_store_byte v[98:99], v39 offset:137 -; ALIGNED-NEXT: flat_store_byte v[98:99], v38 offset:133 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v37 offset:128 -; ALIGNED-NEXT: flat_store_byte v[98:99], v37 offset:129 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v36 offset:124 -; ALIGNED-NEXT: flat_store_byte v[0:1], v36 offset:128 +; ALIGNED-NEXT: flat_store_byte v[102:103], v86 offset:136 ; ALIGNED-NEXT: s_waitcnt vmcnt(4) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v36, 24, v22 -; ALIGNED-NEXT: flat_store_byte v[98:99], v84 offset:136 -; ALIGNED-NEXT: flat_store_byte v[98:99], v85 offset:134 -; ALIGNED-NEXT: flat_store_byte v[98:99], v86 offset:140 -; ALIGNED-NEXT: flat_store_byte v[98:99], v87 offset:138 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:132 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v22 +; ALIGNED-NEXT: flat_store_byte v[102:103], v66 offset:134 +; ALIGNED-NEXT: flat_store_byte v[102:103], v81 offset:140 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v39 offset:136 +; ALIGNED-NEXT: flat_store_byte v[102:103], v39 offset:137 +; ALIGNED-NEXT: flat_store_byte v[102:103], v98 offset:138 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v38 offset:132 +; ALIGNED-NEXT: flat_store_byte v[102:103], v38 offset:133 +; ALIGNED-NEXT: flat_store_byte v[102:103], v65 offset:132 +; ALIGNED-NEXT: flat_store_byte v[102:103], v115 offset:130 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v37 offset:128 +; ALIGNED-NEXT: flat_store_byte v[102:103], v37 offset:129 ; ALIGNED-NEXT: s_waitcnt vmcnt(3) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 24, v18 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:130 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:128 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:126 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v37, 24, v18 +; ALIGNED-NEXT: flat_store_byte v[102:103], v80 offset:128 +; ALIGNED-NEXT: flat_store_byte v[102:103], v64 offset:126 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v36 offset:124 +; ALIGNED-NEXT: flat_store_byte v[0:1], v36 offset:128 ; ALIGNED-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:40 ; ALIGNED-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:44 ; ALIGNED-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:36 ; ALIGNED-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:32 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v34 offset:116 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v35 offset:120 -; ALIGNED-NEXT: flat_store_byte v[98:99], v35 offset:121 -; ALIGNED-NEXT: flat_store_byte v[98:99], v34 offset:117 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v33 offset:112 -; ALIGNED-NEXT: flat_store_byte v[98:99], v33 offset:113 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v32 offset:108 -; ALIGNED-NEXT: flat_store_byte v[98:99], v32 offset:109 -; ALIGNED-NEXT: flat_store_byte v[98:99], v52 offset:120 +; ALIGNED-NEXT: flat_store_byte v[102:103], v85 offset:120 +; ALIGNED-NEXT: flat_store_byte v[102:103], v97 offset:118 +; ALIGNED-NEXT: flat_store_byte v[102:103], v54 offset:124 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v35 offset:120 +; ALIGNED-NEXT: flat_store_byte v[102:103], v35 offset:121 +; ALIGNED-NEXT: flat_store_byte v[102:103], v96 offset:122 ; ALIGNED-NEXT: s_waitcnt vmcnt(2) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 24, v14 -; ALIGNED-NEXT: flat_store_byte v[98:99], v53 offset:118 -; ALIGNED-NEXT: flat_store_byte v[98:99], v54 offset:124 -; ALIGNED-NEXT: flat_store_byte v[98:99], v55 offset:122 -; ALIGNED-NEXT: flat_store_byte v[98:99], v68 offset:116 -; ALIGNED-NEXT: flat_store_byte v[98:99], v69 offset:114 -; ALIGNED-NEXT: flat_store_byte v[98:99], v70 offset:112 -; ALIGNED-NEXT: flat_store_byte v[98:99], v71 offset:110 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 24, v14 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v34 offset:116 +; ALIGNED-NEXT: flat_store_byte v[102:103], v34 offset:117 +; ALIGNED-NEXT: flat_store_byte v[102:103], v71 offset:116 +; ALIGNED-NEXT: flat_store_byte v[102:103], v55 offset:114 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v33 offset:112 +; ALIGNED-NEXT: flat_store_byte v[102:103], v33 offset:113 +; ALIGNED-NEXT: flat_store_byte v[102:103], v84 offset:112 +; ALIGNED-NEXT: flat_store_byte v[102:103], v70 offset:110 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v32 offset:108 +; ALIGNED-NEXT: flat_store_byte v[102:103], v32 offset:109 ; ALIGNED-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:56 ; ALIGNED-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:60 ; ALIGNED-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:52 ; ALIGNED-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:48 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v30 offset:100 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v31 offset:104 -; ALIGNED-NEXT: flat_store_byte v[98:99], v31 offset:105 -; ALIGNED-NEXT: flat_store_byte v[98:99], v30 offset:101 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v29 offset:96 -; ALIGNED-NEXT: flat_store_byte v[98:99], v29 offset:97 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v28 offset:92 -; ALIGNED-NEXT: flat_store_byte v[98:99], v28 offset:93 -; ALIGNED-NEXT: s_waitcnt vmcnt(0) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v28, 24, v10 -; ALIGNED-NEXT: flat_store_byte v[98:99], v48 offset:100 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v48, 24, v6 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v37, 8, v22 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 8, v18 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 8, v14 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v29, 8, v10 -; ALIGNED-NEXT: flat_store_byte v[98:99], v49 offset:98 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v49, 8, v6 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v64, 24, v25 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v38, 24, v23 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 24, v19 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v54, 24, v15 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v30, 24, v11 -; ALIGNED-NEXT: flat_store_byte v[98:99], v50 offset:96 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 24, v7 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v65, 8, v25 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v66, 24, v24 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v67, 8, v24 +; ALIGNED-NEXT: flat_store_byte v[102:103], v52 offset:104 +; ALIGNED-NEXT: s_waitcnt vmcnt(1) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 24, v10 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v29 offset:96 +; ALIGNED-NEXT: flat_store_byte v[102:103], v29 offset:97 +; ALIGNED-NEXT: s_waitcnt vmcnt(0) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v29, 24, v6 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v66, 8, v22 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 8, v18 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v34, 8, v14 +; ALIGNED-NEXT: flat_store_byte v[102:103], v112 offset:102 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v10 +; ALIGNED-NEXT: flat_store_byte v[102:103], v83 offset:96 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v6 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v49, 24, v25 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 24, v23 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v64, 24, v19 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 24, v15 +; ALIGNED-NEXT: flat_store_byte v[102:103], v113 offset:108 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v11 +; ALIGNED-NEXT: flat_store_byte v[102:103], v51 offset:94 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v51, 24, v7 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v25 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v67, 24, v24 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v48, 8, v24 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v39, 8, v23 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v21 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 8, v21 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v20 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v20 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 8, v19 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v32, 24, v17 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v34, 24, v16 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v21 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v38, 8, v21 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v65, 24, v20 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v20 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v36, 8, v19 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 24, v17 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 8, v17 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v54, 24, v16 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v35, 8, v16 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v55, 8, v15 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v13 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 8, v13 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v33, 24, v13 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 8, v13 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v12 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 8, v12 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v32, 8, v12 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v31 offset:104 +; ALIGNED-NEXT: flat_store_byte v[102:103], v31 offset:105 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v31, 8, v11 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:104 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v9 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:102 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v9 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:108 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v8 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:106 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v8 -; ALIGNED-NEXT: flat_store_byte v[98:99], v51 offset:94 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v51, 8, v7 +; ALIGNED-NEXT: flat_store_byte v[102:103], v53 offset:106 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 24, v9 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v30 offset:100 +; ALIGNED-NEXT: flat_store_byte v[102:103], v30 offset:101 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v30, 8, v9 +; ALIGNED-NEXT: flat_store_byte v[102:103], v69 offset:100 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 24, v8 +; ALIGNED-NEXT: flat_store_byte v[102:103], v114 offset:98 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v8 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v28 offset:92 +; ALIGNED-NEXT: flat_store_byte v[102:103], v28 offset:93 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v28, 8, v7 ; ALIGNED-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:8 ; ALIGNED-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:12 ; ALIGNED-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4 ; ALIGNED-NEXT: buffer_store_dword v24, off, s[0:3], s32 -; ALIGNED-NEXT: flat_store_byte v[98:99], v80 offset:88 -; ALIGNED-NEXT: flat_store_byte v[98:99], v81 offset:86 -; ALIGNED-NEXT: flat_store_byte v[98:99], v82 offset:92 -; ALIGNED-NEXT: flat_store_byte v[98:99], v83 offset:90 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v4 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v26 offset:84 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v27 offset:88 -; ALIGNED-NEXT: flat_store_byte v[98:99], v27 offset:89 -; ALIGNED-NEXT: flat_store_byte v[98:99], v26 offset:85 -; ALIGNED-NEXT: flat_store_byte v[98:99], v64 offset:84 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v25 offset:80 -; ALIGNED-NEXT: flat_store_byte v[98:99], v65 offset:82 -; ALIGNED-NEXT: flat_store_byte v[98:99], v25 offset:81 -; ALIGNED-NEXT: flat_store_byte v[98:99], v66 offset:80 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v24 offset:76 -; ALIGNED-NEXT: flat_store_byte v[98:99], v67 offset:78 -; ALIGNED-NEXT: flat_store_byte v[98:99], v24 offset:77 +; ALIGNED-NEXT: flat_store_byte v[102:103], v68 offset:88 +; ALIGNED-NEXT: flat_store_byte v[102:103], v50 offset:86 +; ALIGNED-NEXT: flat_store_byte v[102:103], v87 offset:92 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v27 offset:88 +; ALIGNED-NEXT: flat_store_byte v[102:103], v27 offset:89 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v27, 8, v4 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v26 offset:84 +; ALIGNED-NEXT: flat_store_byte v[102:103], v82 offset:90 +; ALIGNED-NEXT: flat_store_byte v[102:103], v26 offset:85 +; ALIGNED-NEXT: flat_store_byte v[102:103], v49 offset:84 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v25 offset:80 +; ALIGNED-NEXT: flat_store_byte v[102:103], v99 offset:82 +; ALIGNED-NEXT: flat_store_byte v[102:103], v25 offset:81 +; ALIGNED-NEXT: flat_store_byte v[102:103], v67 offset:80 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v24 offset:76 +; ALIGNED-NEXT: flat_store_byte v[102:103], v48 offset:78 +; ALIGNED-NEXT: flat_store_byte v[102:103], v24 offset:77 ; ALIGNED-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:24 ; ALIGNED-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:28 ; ALIGNED-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:20 ; ALIGNED-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:16 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v22 offset:68 -; ALIGNED-NEXT: flat_store_byte v[98:99], v36 offset:72 -; ALIGNED-NEXT: flat_store_byte v[98:99], v37 offset:70 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v23 offset:72 -; ALIGNED-NEXT: flat_store_byte v[98:99], v38 offset:76 -; ALIGNED-NEXT: flat_store_byte v[98:99], v23 offset:73 -; ALIGNED-NEXT: flat_store_byte v[98:99], v39 offset:74 -; ALIGNED-NEXT: flat_store_byte v[98:99], v22 offset:69 -; ALIGNED-NEXT: flat_store_byte v[98:99], v84 offset:68 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v21 offset:64 -; ALIGNED-NEXT: flat_store_byte v[98:99], v85 offset:66 -; ALIGNED-NEXT: flat_store_byte v[98:99], v21 offset:65 -; ALIGNED-NEXT: flat_store_byte v[98:99], v86 offset:64 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v20 offset:60 -; ALIGNED-NEXT: flat_store_byte v[98:99], v87 offset:62 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v22 offset:68 +; ALIGNED-NEXT: flat_store_byte v[102:103], v86 offset:72 +; ALIGNED-NEXT: flat_store_byte v[102:103], v66 offset:70 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v23 offset:72 +; ALIGNED-NEXT: flat_store_byte v[102:103], v81 offset:76 +; ALIGNED-NEXT: flat_store_byte v[102:103], v23 offset:73 +; ALIGNED-NEXT: flat_store_byte v[102:103], v39 offset:74 +; ALIGNED-NEXT: flat_store_byte v[102:103], v22 offset:69 +; ALIGNED-NEXT: flat_store_byte v[102:103], v98 offset:68 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v21 offset:64 +; ALIGNED-NEXT: flat_store_byte v[102:103], v38 offset:66 +; ALIGNED-NEXT: flat_store_byte v[102:103], v21 offset:65 +; ALIGNED-NEXT: flat_store_byte v[102:103], v65 offset:64 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v20 offset:60 +; ALIGNED-NEXT: flat_store_byte v[102:103], v115 offset:62 ; ALIGNED-NEXT: flat_store_byte v[0:1], v20 offset:64 ; ALIGNED-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:104 ; ALIGNED-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:108 ; ALIGNED-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; ALIGNED-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:96 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v18 offset:52 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:56 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:54 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v19 offset:56 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:60 -; ALIGNED-NEXT: flat_store_byte v[98:99], v19 offset:57 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:58 -; ALIGNED-NEXT: flat_store_byte v[98:99], v18 offset:53 -; ALIGNED-NEXT: flat_store_byte v[98:99], v32 offset:52 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v17 offset:48 -; ALIGNED-NEXT: flat_store_byte v[98:99], v33 offset:50 -; ALIGNED-NEXT: flat_store_byte v[98:99], v17 offset:49 -; ALIGNED-NEXT: flat_store_byte v[98:99], v34 offset:48 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v16 offset:44 -; ALIGNED-NEXT: flat_store_byte v[98:99], v35 offset:46 -; ALIGNED-NEXT: flat_store_byte v[98:99], v16 offset:45 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v18 offset:52 +; ALIGNED-NEXT: flat_store_byte v[102:103], v37 offset:56 +; ALIGNED-NEXT: flat_store_byte v[102:103], v80 offset:54 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v19 offset:56 +; ALIGNED-NEXT: flat_store_byte v[102:103], v64 offset:60 +; ALIGNED-NEXT: flat_store_byte v[102:103], v19 offset:57 +; ALIGNED-NEXT: flat_store_byte v[102:103], v36 offset:58 +; ALIGNED-NEXT: flat_store_byte v[102:103], v18 offset:53 +; ALIGNED-NEXT: flat_store_byte v[102:103], v85 offset:52 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v17 offset:48 +; ALIGNED-NEXT: flat_store_byte v[102:103], v97 offset:50 +; ALIGNED-NEXT: flat_store_byte v[102:103], v17 offset:49 +; ALIGNED-NEXT: flat_store_byte v[102:103], v54 offset:48 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v16 offset:44 +; ALIGNED-NEXT: flat_store_byte v[102:103], v35 offset:46 +; ALIGNED-NEXT: flat_store_byte v[102:103], v16 offset:45 ; ALIGNED-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:120 ; ALIGNED-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; ALIGNED-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:116 ; ALIGNED-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:112 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v14 offset:36 -; ALIGNED-NEXT: flat_store_byte v[98:99], v52 offset:40 -; ALIGNED-NEXT: flat_store_byte v[98:99], v53 offset:38 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v15 offset:40 -; ALIGNED-NEXT: flat_store_byte v[98:99], v54 offset:44 -; ALIGNED-NEXT: flat_store_byte v[98:99], v15 offset:41 -; ALIGNED-NEXT: flat_store_byte v[98:99], v55 offset:42 -; ALIGNED-NEXT: flat_store_byte v[98:99], v14 offset:37 -; ALIGNED-NEXT: flat_store_byte v[98:99], v68 offset:36 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v13 offset:32 -; ALIGNED-NEXT: flat_store_byte v[98:99], v69 offset:34 -; ALIGNED-NEXT: flat_store_byte v[98:99], v13 offset:33 -; ALIGNED-NEXT: flat_store_byte v[98:99], v70 offset:32 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v12 offset:28 -; ALIGNED-NEXT: flat_store_byte v[98:99], v71 offset:30 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v14 offset:36 +; ALIGNED-NEXT: flat_store_byte v[102:103], v96 offset:40 +; ALIGNED-NEXT: flat_store_byte v[102:103], v34 offset:38 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v15 offset:40 +; ALIGNED-NEXT: flat_store_byte v[102:103], v71 offset:44 +; ALIGNED-NEXT: flat_store_byte v[102:103], v15 offset:41 +; ALIGNED-NEXT: flat_store_byte v[102:103], v55 offset:42 +; ALIGNED-NEXT: flat_store_byte v[102:103], v14 offset:37 +; ALIGNED-NEXT: flat_store_byte v[102:103], v33 offset:36 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v13 offset:32 +; ALIGNED-NEXT: flat_store_byte v[102:103], v84 offset:34 +; ALIGNED-NEXT: flat_store_byte v[102:103], v13 offset:33 +; ALIGNED-NEXT: flat_store_byte v[102:103], v70 offset:32 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v12 offset:28 +; ALIGNED-NEXT: flat_store_byte v[102:103], v32 offset:30 ; ALIGNED-NEXT: flat_store_byte v[0:1], v12 offset:32 ; ALIGNED-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:72 ; ALIGNED-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:76 ; ALIGNED-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:68 ; ALIGNED-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:64 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v10 offset:20 -; ALIGNED-NEXT: flat_store_byte v[98:99], v28 offset:24 -; ALIGNED-NEXT: flat_store_byte v[98:99], v29 offset:22 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v11 offset:24 -; ALIGNED-NEXT: flat_store_byte v[98:99], v30 offset:28 -; ALIGNED-NEXT: flat_store_byte v[98:99], v11 offset:25 -; ALIGNED-NEXT: flat_store_byte v[98:99], v31 offset:26 -; ALIGNED-NEXT: flat_store_byte v[98:99], v10 offset:21 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:20 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v9 offset:16 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:18 -; ALIGNED-NEXT: flat_store_byte v[98:99], v9 offset:17 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:16 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v8 offset:12 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:14 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v10 offset:20 +; ALIGNED-NEXT: flat_store_byte v[102:103], v52 offset:24 +; ALIGNED-NEXT: flat_store_byte v[102:103], v112 offset:22 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v11 offset:24 +; ALIGNED-NEXT: flat_store_byte v[102:103], v113 offset:28 +; ALIGNED-NEXT: flat_store_byte v[102:103], v11 offset:25 +; ALIGNED-NEXT: flat_store_byte v[102:103], v31 offset:26 +; ALIGNED-NEXT: flat_store_byte v[102:103], v10 offset:21 +; ALIGNED-NEXT: flat_store_byte v[102:103], v53 offset:20 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v9 offset:16 +; ALIGNED-NEXT: flat_store_byte v[102:103], v30 offset:18 +; ALIGNED-NEXT: flat_store_byte v[102:103], v9 offset:17 +; ALIGNED-NEXT: flat_store_byte v[102:103], v69 offset:16 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v8 offset:12 +; ALIGNED-NEXT: flat_store_byte v[102:103], v114 offset:14 ; ALIGNED-NEXT: flat_store_byte v[0:1], v8 offset:16 ; ALIGNED-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; ALIGNED-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; ALIGNED-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:84 ; ALIGNED-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:80 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v6 offset:4 -; ALIGNED-NEXT: flat_store_byte v[98:99], v48 offset:8 -; ALIGNED-NEXT: flat_store_byte v[98:99], v49 offset:6 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v7 offset:8 -; ALIGNED-NEXT: flat_store_byte v[98:99], v50 offset:12 -; ALIGNED-NEXT: flat_store_byte v[98:99], v7 offset:9 -; ALIGNED-NEXT: flat_store_byte v[98:99], v51 offset:10 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v6 offset:4 +; ALIGNED-NEXT: flat_store_byte v[102:103], v29 offset:8 +; ALIGNED-NEXT: flat_store_byte v[102:103], v83 offset:6 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v7 offset:8 +; ALIGNED-NEXT: flat_store_byte v[102:103], v51 offset:12 +; ALIGNED-NEXT: flat_store_byte v[102:103], v7 offset:9 +; ALIGNED-NEXT: flat_store_byte v[102:103], v28 offset:10 ; ALIGNED-NEXT: flat_store_byte v[0:1], v6 offset:8 ; ALIGNED-NEXT: flat_store_byte v[0:1], v5 offset:4 ; ALIGNED-NEXT: flat_store_byte_d16_hi v[0:1], v4 offset:2 -; ALIGNED-NEXT: flat_store_byte v[0:1], v83 offset:1 +; ALIGNED-NEXT: flat_store_byte v[0:1], v27 offset:1 ; ALIGNED-NEXT: flat_store_byte v[0:1], v4 ; ALIGNED-NEXT: v_add_co_u32 v0, vcc_lo, 0x100, v0 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v5 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v5 ; ALIGNED-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo -; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v5 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 8, v5 ; ALIGNED-NEXT: s_cmp_lg_u64 s[4:5], 0 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v4 -; ALIGNED-NEXT: flat_store_byte v[98:99], v80 offset:4 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v5 -; ALIGNED-NEXT: flat_store_byte v[98:99], v81 offset:2 -; ALIGNED-NEXT: flat_store_byte v[98:99], v82 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 24, v4 +; ALIGNED-NEXT: flat_store_byte v[102:103], v68 offset:4 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[100:101], v5 +; ALIGNED-NEXT: flat_store_byte v[102:103], v50 offset:2 +; ALIGNED-NEXT: flat_store_byte v[102:103], v87 ; ALIGNED-NEXT: s_cbranch_scc1 .LBB7_2 ; ALIGNED-NEXT: .LBB7_3: ; %Flow16 ; ALIGNED-NEXT: s_andn2_saveexec_b32 s6, s6 @@ -9105,7 +9108,7 @@ define void @memmove_p0_p4_sz2048(ptr addrspace(0) align 1 %dst, ptr addrspace(4 ; ALIGNED-NEXT: .LBB7_5: ; %memmove_bwd_loop ; ALIGNED-NEXT: ; =>This Inner Loop Header: Depth=1 ; ALIGNED-NEXT: s_clause 0xf -; ALIGNED-NEXT: global_load_dwordx4 v[100:103], v[2:3], off offset:2032 +; ALIGNED-NEXT: global_load_dwordx4 v[96:99], v[2:3], off offset:2032 ; ALIGNED-NEXT: global_load_dwordx4 v[84:87], v[2:3], off offset:2016 ; ALIGNED-NEXT: global_load_dwordx4 v[80:83], v[2:3], off offset:2000 ; ALIGNED-NEXT: global_load_dwordx4 v[68:71], v[2:3], off offset:1984 @@ -9119,481 +9122,483 @@ define void @memmove_p0_p4_sz2048(ptr addrspace(0) align 1 %dst, ptr addrspace(4 ; ALIGNED-NEXT: global_load_dwordx4 v[20:23], v[2:3], off offset:1856 ; ALIGNED-NEXT: global_load_dwordx4 v[16:19], v[2:3], off offset:1840 ; ALIGNED-NEXT: global_load_dwordx4 v[12:15], v[2:3], off offset:1824 -; ALIGNED-NEXT: global_load_dwordx4 v[4:7], v[2:3], off offset:1792 ; ALIGNED-NEXT: global_load_dwordx4 v[8:11], v[2:3], off offset:1808 -; ALIGNED-NEXT: v_add_co_u32 v96, vcc_lo, v0, 6 -; ALIGNED-NEXT: v_add_co_ci_u32_e64 v97, null, 0, v1, vcc_lo -; ALIGNED-NEXT: v_add_co_u32 v98, vcc_lo, v0, 3 -; ALIGNED-NEXT: v_add_co_ci_u32_e64 v99, null, 0, v1, vcc_lo +; ALIGNED-NEXT: global_load_dwordx4 v[4:7], v[2:3], off offset:1792 +; ALIGNED-NEXT: v_add_co_u32 v100, vcc_lo, v0, 3 +; ALIGNED-NEXT: v_add_co_ci_u32_e64 v101, null, 0, v1, vcc_lo +; ALIGNED-NEXT: v_add_co_u32 v102, vcc_lo, v0, 6 +; ALIGNED-NEXT: v_add_co_ci_u32_e64 v103, null, 0, v1, vcc_lo ; ALIGNED-NEXT: v_add_co_u32 v2, vcc_lo, 0xffffff00, v2 ; ALIGNED-NEXT: v_add_co_ci_u32_e64 v3, null, -1, v3, vcc_lo ; ALIGNED-NEXT: s_add_u32 s4, s4, 0x100 ; ALIGNED-NEXT: s_addc_u32 s5, s5, 0 ; ALIGNED-NEXT: s_waitcnt vmcnt(15) -; ALIGNED-NEXT: buffer_store_dword v102, off, s[0:3], s32 offset:296 -; ALIGNED-NEXT: buffer_store_dword v103, off, s[0:3], s32 offset:300 -; ALIGNED-NEXT: buffer_store_dword v101, off, s[0:3], s32 offset:292 -; ALIGNED-NEXT: buffer_store_dword v100, off, s[0:3], s32 offset:288 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v102 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v102 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v103 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v103 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v102 offset:244 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v103 offset:248 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:249 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:245 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v101 offset:240 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:241 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v100 offset:236 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:237 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 24, v101 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 8, v101 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 24, v100 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 8, v100 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:248 +; ALIGNED-NEXT: buffer_store_dword v98, off, s[0:3], s32 offset:296 +; ALIGNED-NEXT: buffer_store_dword v99, off, s[0:3], s32 offset:300 +; ALIGNED-NEXT: buffer_store_dword v97, off, s[0:3], s32 offset:292 +; ALIGNED-NEXT: buffer_store_dword v96, off, s[0:3], s32 offset:288 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 24, v98 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v98 offset:244 +; ALIGNED-NEXT: flat_store_byte v[100:101], v98 offset:245 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 8, v98 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v99 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v99 offset:248 +; ALIGNED-NEXT: flat_store_byte v[100:101], v99 offset:249 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v99 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v97 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v97 offset:240 +; ALIGNED-NEXT: flat_store_byte v[100:101], v97 offset:241 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 8, v97 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v96 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v96 offset:236 +; ALIGNED-NEXT: flat_store_byte v[100:101], v96 offset:237 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 8, v96 +; ALIGNED-NEXT: flat_store_byte v[100:101], v112 offset:248 ; ALIGNED-NEXT: s_waitcnt vmcnt(14) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v86 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:246 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v86 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:252 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 24, v86 +; ALIGNED-NEXT: flat_store_byte v[100:101], v98 offset:246 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 8, v86 +; ALIGNED-NEXT: flat_store_byte v[100:101], v113 offset:252 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v87 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:250 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v87 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:244 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 24, v85 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:242 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 8, v85 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:240 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 24, v84 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:238 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 8, v84 +; ALIGNED-NEXT: flat_store_byte v[100:101], v99 offset:250 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v87 +; ALIGNED-NEXT: flat_store_byte v[100:101], v114 offset:244 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v85 +; ALIGNED-NEXT: flat_store_byte v[100:101], v97 offset:242 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 8, v85 +; ALIGNED-NEXT: flat_store_byte v[100:101], v115 offset:240 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v84 +; ALIGNED-NEXT: flat_store_byte v[100:101], v96 offset:238 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 8, v84 ; ALIGNED-NEXT: buffer_store_dword v86, off, s[0:3], s32 offset:312 ; ALIGNED-NEXT: buffer_store_dword v87, off, s[0:3], s32 offset:316 ; ALIGNED-NEXT: buffer_store_dword v85, off, s[0:3], s32 offset:308 ; ALIGNED-NEXT: buffer_store_dword v84, off, s[0:3], s32 offset:304 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v86 offset:228 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v87 offset:232 -; ALIGNED-NEXT: flat_store_byte v[98:99], v87 offset:233 -; ALIGNED-NEXT: flat_store_byte v[98:99], v86 offset:229 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v85 offset:224 -; ALIGNED-NEXT: flat_store_byte v[98:99], v85 offset:225 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v84 offset:220 -; ALIGNED-NEXT: flat_store_byte v[98:99], v84 offset:221 +; ALIGNED-NEXT: flat_store_byte v[100:101], v112 offset:232 ; ALIGNED-NEXT: s_waitcnt vmcnt(13) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v82 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 8, v82 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v83 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 24, v82 +; ALIGNED-NEXT: flat_store_byte v[100:101], v98 offset:230 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 8, v82 +; ALIGNED-NEXT: flat_store_byte v[100:101], v113 offset:236 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v83 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v87 offset:232 +; ALIGNED-NEXT: flat_store_byte v[100:101], v87 offset:233 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v83 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:232 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v81 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:230 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v81 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:236 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v80 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:234 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v80 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:228 +; ALIGNED-NEXT: flat_store_byte v[100:101], v99 offset:234 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 24, v81 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v86 offset:228 +; ALIGNED-NEXT: flat_store_byte v[100:101], v86 offset:229 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 8, v81 +; ALIGNED-NEXT: flat_store_byte v[100:101], v114 offset:228 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v80 +; ALIGNED-NEXT: flat_store_byte v[100:101], v97 offset:226 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 8, v80 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v85 offset:224 +; ALIGNED-NEXT: flat_store_byte v[100:101], v85 offset:225 ; ALIGNED-NEXT: s_waitcnt vmcnt(12) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 24, v70 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:226 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 8, v70 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:224 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 24, v71 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:222 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 8, v71 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 24, v70 +; ALIGNED-NEXT: flat_store_byte v[100:101], v115 offset:224 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v70 +; ALIGNED-NEXT: flat_store_byte v[100:101], v96 offset:222 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 24, v71 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v84 offset:220 +; ALIGNED-NEXT: flat_store_byte v[100:101], v84 offset:221 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 8, v71 ; ALIGNED-NEXT: buffer_store_dword v82, off, s[0:3], s32 offset:264 ; ALIGNED-NEXT: buffer_store_dword v83, off, s[0:3], s32 offset:268 ; ALIGNED-NEXT: buffer_store_dword v81, off, s[0:3], s32 offset:260 ; ALIGNED-NEXT: buffer_store_dword v80, off, s[0:3], s32 offset:256 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v82 offset:212 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v83 offset:216 -; ALIGNED-NEXT: flat_store_byte v[98:99], v83 offset:217 -; ALIGNED-NEXT: flat_store_byte v[98:99], v82 offset:213 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v81 offset:208 -; ALIGNED-NEXT: flat_store_byte v[98:99], v81 offset:209 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v80 offset:204 -; ALIGNED-NEXT: flat_store_byte v[98:99], v80 offset:205 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v69 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v69 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v68 +; ALIGNED-NEXT: flat_store_byte v[100:101], v112 offset:216 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 24, v69 +; ALIGNED-NEXT: flat_store_byte v[100:101], v98 offset:214 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 8, v69 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v83 offset:216 +; ALIGNED-NEXT: flat_store_byte v[100:101], v83 offset:217 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v68 -; ALIGNED-NEXT: flat_store_byte v[98:99], v84 offset:216 +; ALIGNED-NEXT: flat_store_byte v[100:101], v113 offset:220 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v68 +; ALIGNED-NEXT: flat_store_byte v[100:101], v87 offset:218 ; ALIGNED-NEXT: s_waitcnt vmcnt(11) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v66 -; ALIGNED-NEXT: flat_store_byte v[98:99], v85 offset:214 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 8, v66 -; ALIGNED-NEXT: flat_store_byte v[98:99], v86 offset:220 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v67 -; ALIGNED-NEXT: flat_store_byte v[98:99], v87 offset:218 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v67 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:212 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v65 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:210 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 24, v66 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v82 offset:212 +; ALIGNED-NEXT: flat_store_byte v[100:101], v82 offset:213 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 8, v66 +; ALIGNED-NEXT: flat_store_byte v[100:101], v99 offset:212 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 24, v67 +; ALIGNED-NEXT: flat_store_byte v[100:101], v86 offset:210 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 8, v67 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v81 offset:208 +; ALIGNED-NEXT: flat_store_byte v[100:101], v81 offset:209 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 24, v65 +; ALIGNED-NEXT: flat_store_byte v[100:101], v114 offset:208 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v65 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:208 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v64 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:206 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v64 +; ALIGNED-NEXT: flat_store_byte v[100:101], v97 offset:206 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 24, v64 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v80 offset:204 +; ALIGNED-NEXT: flat_store_byte v[100:101], v80 offset:205 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 8, v64 ; ALIGNED-NEXT: buffer_store_dword v70, off, s[0:3], s32 offset:280 ; ALIGNED-NEXT: buffer_store_dword v71, off, s[0:3], s32 offset:284 ; ALIGNED-NEXT: buffer_store_dword v69, off, s[0:3], s32 offset:276 ; ALIGNED-NEXT: buffer_store_dword v68, off, s[0:3], s32 offset:272 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v70 offset:196 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v71 offset:200 -; ALIGNED-NEXT: flat_store_byte v[98:99], v71 offset:201 -; ALIGNED-NEXT: flat_store_byte v[98:99], v70 offset:197 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v69 offset:192 -; ALIGNED-NEXT: flat_store_byte v[98:99], v69 offset:193 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v68 offset:188 -; ALIGNED-NEXT: flat_store_byte v[98:99], v68 offset:189 +; ALIGNED-NEXT: flat_store_byte v[100:101], v85 offset:200 ; ALIGNED-NEXT: s_waitcnt vmcnt(10) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v54 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 8, v54 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v55 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 24, v54 +; ALIGNED-NEXT: flat_store_byte v[100:101], v115 offset:198 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v54 +; ALIGNED-NEXT: flat_store_byte v[100:101], v96 offset:204 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 24, v55 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v71 offset:200 +; ALIGNED-NEXT: flat_store_byte v[100:101], v71 offset:201 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 8, v55 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:200 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 24, v53 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:198 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 8, v53 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:204 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 24, v52 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:202 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 8, v52 -; ALIGNED-NEXT: flat_store_byte v[98:99], v80 offset:196 +; ALIGNED-NEXT: flat_store_byte v[100:101], v84 offset:202 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v53 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v70 offset:196 +; ALIGNED-NEXT: flat_store_byte v[100:101], v70 offset:197 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 8, v53 +; ALIGNED-NEXT: flat_store_byte v[100:101], v112 offset:196 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 24, v52 +; ALIGNED-NEXT: flat_store_byte v[100:101], v98 offset:194 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 8, v52 +; ALIGNED-NEXT: flat_store_byte v[100:101], v83 offset:190 ; ALIGNED-NEXT: s_waitcnt vmcnt(9) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v50 -; ALIGNED-NEXT: flat_store_byte v[98:99], v81 offset:194 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v50 -; ALIGNED-NEXT: flat_store_byte v[98:99], v82 offset:192 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v51 -; ALIGNED-NEXT: flat_store_byte v[98:99], v83 offset:190 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v51 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 24, v51 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v69 offset:192 +; ALIGNED-NEXT: flat_store_byte v[100:101], v69 offset:193 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 24, v50 +; ALIGNED-NEXT: flat_store_byte v[100:101], v113 offset:192 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 8, v50 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v68 offset:188 +; ALIGNED-NEXT: flat_store_byte v[100:101], v68 offset:189 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 8, v51 ; ALIGNED-NEXT: buffer_store_dword v66, off, s[0:3], s32 offset:360 ; ALIGNED-NEXT: buffer_store_dword v67, off, s[0:3], s32 offset:364 ; ALIGNED-NEXT: buffer_store_dword v65, off, s[0:3], s32 offset:356 ; ALIGNED-NEXT: buffer_store_dword v64, off, s[0:3], s32 offset:352 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v66 offset:180 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v67 offset:184 -; ALIGNED-NEXT: flat_store_byte v[98:99], v67 offset:185 -; ALIGNED-NEXT: flat_store_byte v[98:99], v66 offset:181 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v65 offset:176 -; ALIGNED-NEXT: flat_store_byte v[98:99], v65 offset:177 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v64 offset:172 -; ALIGNED-NEXT: flat_store_byte v[98:99], v64 offset:173 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v64, 24, v49 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v65, 8, v49 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v66, 24, v48 +; ALIGNED-NEXT: flat_store_byte v[100:101], v87 offset:184 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 24, v49 +; ALIGNED-NEXT: flat_store_byte v[100:101], v82 offset:182 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 8, v49 +; ALIGNED-NEXT: flat_store_byte v[100:101], v99 offset:188 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 24, v48 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v67 offset:184 +; ALIGNED-NEXT: flat_store_byte v[100:101], v67 offset:185 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v67, 8, v48 -; ALIGNED-NEXT: flat_store_byte v[98:99], v84 offset:184 +; ALIGNED-NEXT: flat_store_byte v[100:101], v86 offset:186 ; ALIGNED-NEXT: s_waitcnt vmcnt(8) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v38 -; ALIGNED-NEXT: flat_store_byte v[98:99], v85 offset:182 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 8, v38 -; ALIGNED-NEXT: flat_store_byte v[98:99], v86 offset:188 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v39 -; ALIGNED-NEXT: flat_store_byte v[98:99], v87 offset:186 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v39 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:180 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v37 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:178 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v37 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:176 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v36 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:174 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v36 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v38 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v66 offset:180 +; ALIGNED-NEXT: flat_store_byte v[100:101], v66 offset:181 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v66, 8, v38 +; ALIGNED-NEXT: flat_store_byte v[100:101], v81 offset:180 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 24, v39 +; ALIGNED-NEXT: flat_store_byte v[100:101], v114 offset:178 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v39 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v65 offset:176 +; ALIGNED-NEXT: flat_store_byte v[100:101], v65 offset:177 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v65, 24, v37 +; ALIGNED-NEXT: flat_store_byte v[100:101], v97 offset:176 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 8, v37 +; ALIGNED-NEXT: flat_store_byte v[100:101], v80 offset:174 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v36 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v64 offset:172 +; ALIGNED-NEXT: flat_store_byte v[100:101], v64 offset:173 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v64, 8, v36 ; ALIGNED-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:376 ; ALIGNED-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:380 ; ALIGNED-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:372 ; ALIGNED-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:368 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v54 offset:164 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v55 offset:168 -; ALIGNED-NEXT: flat_store_byte v[98:99], v55 offset:169 -; ALIGNED-NEXT: flat_store_byte v[98:99], v54 offset:165 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v53 offset:160 -; ALIGNED-NEXT: flat_store_byte v[98:99], v53 offset:161 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v52 offset:156 -; ALIGNED-NEXT: flat_store_byte v[98:99], v52 offset:157 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v55 offset:168 +; ALIGNED-NEXT: flat_store_byte v[100:101], v55 offset:169 ; ALIGNED-NEXT: s_waitcnt vmcnt(7) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 24, v34 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 8, v34 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v54, 24, v35 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v55, 8, v35 -; ALIGNED-NEXT: flat_store_byte v[98:99], v68 offset:168 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v33 -; ALIGNED-NEXT: flat_store_byte v[98:99], v69 offset:166 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 8, v33 -; ALIGNED-NEXT: flat_store_byte v[98:99], v70 offset:172 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v32 -; ALIGNED-NEXT: flat_store_byte v[98:99], v71 offset:170 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 8, v32 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:164 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:162 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:160 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:158 +; ALIGNED-NEXT: flat_store_byte v[100:101], v85 offset:168 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 24, v34 +; ALIGNED-NEXT: flat_store_byte v[100:101], v115 offset:166 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v34 +; ALIGNED-NEXT: flat_store_byte v[100:101], v96 offset:172 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 24, v35 +; ALIGNED-NEXT: flat_store_byte v[100:101], v71 offset:170 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 24, v33 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v54 offset:164 +; ALIGNED-NEXT: flat_store_byte v[100:101], v54 offset:165 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v54, 8, v33 +; ALIGNED-NEXT: flat_store_byte v[100:101], v84 offset:164 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v32 +; ALIGNED-NEXT: flat_store_byte v[100:101], v70 offset:162 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 8, v32 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v53 offset:160 +; ALIGNED-NEXT: flat_store_byte v[100:101], v53 offset:161 +; ALIGNED-NEXT: s_waitcnt vmcnt(6) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 24, v30 +; ALIGNED-NEXT: flat_store_byte v[100:101], v112 offset:160 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v30 +; ALIGNED-NEXT: flat_store_byte v[100:101], v98 offset:158 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v52 offset:156 +; ALIGNED-NEXT: flat_store_byte v[100:101], v52 offset:157 ; ALIGNED-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:328 ; ALIGNED-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:332 ; ALIGNED-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:324 ; ALIGNED-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:320 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v50 offset:148 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v51 offset:152 -; ALIGNED-NEXT: flat_store_byte v[98:99], v51 offset:153 -; ALIGNED-NEXT: flat_store_byte v[98:99], v50 offset:149 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v49 offset:144 -; ALIGNED-NEXT: flat_store_byte v[98:99], v49 offset:145 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v48 offset:140 -; ALIGNED-NEXT: flat_store_byte v[98:99], v48 offset:141 -; ALIGNED-NEXT: s_waitcnt vmcnt(6) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v48, 24, v29 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v49, 8, v29 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 24, v28 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 24, v30 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 8, v30 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 24, v31 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 8, v31 +; ALIGNED-NEXT: flat_store_byte v[100:101], v83 offset:156 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 24, v28 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v31 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v51 offset:152 +; ALIGNED-NEXT: flat_store_byte v[100:101], v51 offset:153 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v51, 8, v28 -; ALIGNED-NEXT: flat_store_byte v[98:99], v80 offset:152 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 8, v31 +; ALIGNED-NEXT: flat_store_byte v[100:101], v69 offset:152 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 24, v29 +; ALIGNED-NEXT: flat_store_byte v[100:101], v113 offset:150 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 8, v29 +; ALIGNED-NEXT: flat_store_byte v[100:101], v68 offset:154 ; ALIGNED-NEXT: s_waitcnt vmcnt(5) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 24, v26 -; ALIGNED-NEXT: flat_store_byte v[98:99], v81 offset:150 -; ALIGNED-NEXT: flat_store_byte v[98:99], v82 offset:156 -; ALIGNED-NEXT: flat_store_byte v[98:99], v83 offset:154 -; ALIGNED-NEXT: flat_store_byte v[98:99], v64 offset:148 -; ALIGNED-NEXT: flat_store_byte v[98:99], v65 offset:146 -; ALIGNED-NEXT: flat_store_byte v[98:99], v66 offset:144 -; ALIGNED-NEXT: flat_store_byte v[98:99], v67 offset:142 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v26 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v50 offset:148 +; ALIGNED-NEXT: flat_store_byte v[100:101], v50 offset:149 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 8, v26 +; ALIGNED-NEXT: flat_store_byte v[100:101], v87 offset:148 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 24, v27 +; ALIGNED-NEXT: flat_store_byte v[100:101], v82 offset:146 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 8, v27 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v49 offset:144 +; ALIGNED-NEXT: flat_store_byte v[100:101], v49 offset:145 +; ALIGNED-NEXT: flat_store_byte v[100:101], v99 offset:144 +; ALIGNED-NEXT: flat_store_byte v[100:101], v67 offset:142 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v48 offset:140 +; ALIGNED-NEXT: flat_store_byte v[100:101], v48 offset:141 ; ALIGNED-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:344 ; ALIGNED-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:348 ; ALIGNED-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:340 ; ALIGNED-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:336 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v38 offset:132 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v39 offset:136 -; ALIGNED-NEXT: flat_store_byte v[98:99], v39 offset:137 -; ALIGNED-NEXT: flat_store_byte v[98:99], v38 offset:133 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v37 offset:128 -; ALIGNED-NEXT: flat_store_byte v[98:99], v37 offset:129 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v36 offset:124 -; ALIGNED-NEXT: flat_store_byte v[0:1], v36 offset:128 -; ALIGNED-NEXT: flat_store_byte v[98:99], v84 offset:136 -; ALIGNED-NEXT: flat_store_byte v[98:99], v85 offset:134 -; ALIGNED-NEXT: flat_store_byte v[98:99], v86 offset:140 -; ALIGNED-NEXT: flat_store_byte v[98:99], v87 offset:138 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:132 +; ALIGNED-NEXT: flat_store_byte v[100:101], v86 offset:136 +; ALIGNED-NEXT: s_waitcnt vmcnt(4) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v22 +; ALIGNED-NEXT: flat_store_byte v[100:101], v66 offset:134 +; ALIGNED-NEXT: flat_store_byte v[100:101], v81 offset:140 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v39 offset:136 +; ALIGNED-NEXT: flat_store_byte v[100:101], v39 offset:137 +; ALIGNED-NEXT: flat_store_byte v[100:101], v114 offset:138 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v38 offset:132 +; ALIGNED-NEXT: flat_store_byte v[100:101], v38 offset:133 +; ALIGNED-NEXT: flat_store_byte v[100:101], v65 offset:132 +; ALIGNED-NEXT: flat_store_byte v[100:101], v97 offset:130 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v37 offset:128 +; ALIGNED-NEXT: flat_store_byte v[100:101], v37 offset:129 ; ALIGNED-NEXT: s_waitcnt vmcnt(3) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 24, v18 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:130 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:128 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:126 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v37, 24, v18 +; ALIGNED-NEXT: flat_store_byte v[100:101], v80 offset:128 +; ALIGNED-NEXT: flat_store_byte v[100:101], v64 offset:126 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v36 offset:124 +; ALIGNED-NEXT: flat_store_byte v[0:1], v36 offset:128 ; ALIGNED-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:424 ; ALIGNED-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:428 ; ALIGNED-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:420 ; ALIGNED-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:416 -; ALIGNED-NEXT: flat_store_byte v[98:99], v52 offset:120 +; ALIGNED-NEXT: flat_store_byte v[100:101], v55 offset:122 ; ALIGNED-NEXT: s_waitcnt vmcnt(2) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 24, v14 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 8, v26 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 8, v18 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v34 offset:116 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v35 offset:120 -; ALIGNED-NEXT: flat_store_byte v[98:99], v35 offset:121 -; ALIGNED-NEXT: flat_store_byte v[98:99], v34 offset:117 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v33 offset:112 -; ALIGNED-NEXT: flat_store_byte v[98:99], v33 offset:113 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v32 offset:108 -; ALIGNED-NEXT: flat_store_byte v[98:99], v32 offset:109 -; ALIGNED-NEXT: flat_store_byte v[98:99], v53 offset:118 -; ALIGNED-NEXT: flat_store_byte v[98:99], v54 offset:124 -; ALIGNED-NEXT: flat_store_byte v[98:99], v55 offset:122 -; ALIGNED-NEXT: flat_store_byte v[98:99], v68 offset:116 -; ALIGNED-NEXT: flat_store_byte v[98:99], v69 offset:114 -; ALIGNED-NEXT: flat_store_byte v[98:99], v70 offset:112 -; ALIGNED-NEXT: flat_store_byte v[98:99], v71 offset:110 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v55, 24, v14 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v66, 8, v22 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v80, 8, v18 +; ALIGNED-NEXT: flat_store_byte v[100:101], v85 offset:120 +; ALIGNED-NEXT: flat_store_byte v[100:101], v115 offset:118 +; ALIGNED-NEXT: flat_store_byte v[100:101], v96 offset:124 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v35 offset:120 +; ALIGNED-NEXT: flat_store_byte v[100:101], v35 offset:121 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v34 offset:116 +; ALIGNED-NEXT: flat_store_byte v[100:101], v34 offset:117 +; ALIGNED-NEXT: flat_store_byte v[100:101], v71 offset:116 +; ALIGNED-NEXT: flat_store_byte v[100:101], v54 offset:114 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v33 offset:112 +; ALIGNED-NEXT: flat_store_byte v[100:101], v33 offset:113 +; ALIGNED-NEXT: flat_store_byte v[100:101], v84 offset:112 +; ALIGNED-NEXT: flat_store_byte v[100:101], v70 offset:110 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v32 offset:108 +; ALIGNED-NEXT: flat_store_byte v[100:101], v32 offset:109 ; ALIGNED-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:440 ; ALIGNED-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:444 ; ALIGNED-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:436 ; ALIGNED-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:432 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v30 offset:100 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v31 offset:104 -; ALIGNED-NEXT: flat_store_byte v[98:99], v31 offset:105 -; ALIGNED-NEXT: flat_store_byte v[98:99], v30 offset:101 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v29 offset:96 -; ALIGNED-NEXT: flat_store_byte v[98:99], v29 offset:97 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v28 offset:92 -; ALIGNED-NEXT: flat_store_byte v[98:99], v28 offset:93 -; ALIGNED-NEXT: s_waitcnt vmcnt(0) -; ALIGNED-NEXT: v_lshrrev_b32_e32 v28, 24, v10 -; ALIGNED-NEXT: flat_store_byte v[98:99], v48 offset:100 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v48, 24, v6 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v82, 24, v27 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 24, v19 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 8, v14 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v29, 8, v10 -; ALIGNED-NEXT: flat_store_byte v[98:99], v49 offset:98 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v49, 8, v6 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v27 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v64, 24, v25 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v54, 24, v15 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v30, 24, v11 -; ALIGNED-NEXT: flat_store_byte v[98:99], v50 offset:96 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 24, v7 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v65, 8, v25 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v66, 24, v24 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v67, 8, v24 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v36, 24, v22 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v37, 8, v22 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v38, 24, v23 +; ALIGNED-NEXT: flat_store_byte v[100:101], v53 offset:104 +; ALIGNED-NEXT: s_waitcnt vmcnt(1) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v53, 24, v10 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v29 offset:96 +; ALIGNED-NEXT: flat_store_byte v[100:101], v29 offset:97 +; ALIGNED-NEXT: s_waitcnt vmcnt(0) +; ALIGNED-NEXT: v_lshrrev_b32_e32 v29, 24, v6 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v81, 24, v23 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v64, 24, v19 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v34, 8, v14 +; ALIGNED-NEXT: flat_store_byte v[100:101], v112 offset:102 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v10 +; ALIGNED-NEXT: flat_store_byte v[100:101], v83 offset:96 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v83, 8, v6 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v49, 24, v25 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v99, 8, v25 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 24, v15 +; ALIGNED-NEXT: flat_store_byte v[100:101], v98 offset:108 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v98, 24, v11 +; ALIGNED-NEXT: flat_store_byte v[100:101], v51 offset:94 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v51, 24, v7 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v67, 24, v24 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v48, 8, v24 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v39, 8, v23 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 24, v21 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 8, v21 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v86, 24, v20 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 8, v20 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v112, 8, v19 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v32, 24, v17 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v33, 8, v17 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v34, 24, v16 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v114, 24, v21 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v38, 8, v21 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v65, 24, v20 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v97, 8, v20 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v36, 8, v19 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v85, 24, v17 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v115, 8, v17 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v96, 24, v16 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v35, 8, v16 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v55, 8, v15 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v12 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 8, v12 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v54, 8, v15 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v33, 24, v12 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v84, 8, v12 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v70, 24, v13 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v71, 8, v13 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v32, 8, v13 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v31 offset:104 +; ALIGNED-NEXT: flat_store_byte v[100:101], v31 offset:105 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v31, 8, v11 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:104 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v103, 24, v9 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:102 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v102, 8, v9 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:108 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v101, 24, v8 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:106 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v100, 8, v8 -; ALIGNED-NEXT: flat_store_byte v[98:99], v51 offset:94 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v51, 8, v7 +; ALIGNED-NEXT: flat_store_byte v[100:101], v52 offset:106 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v52, 24, v9 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v30 offset:100 +; ALIGNED-NEXT: flat_store_byte v[100:101], v30 offset:101 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v30, 8, v9 +; ALIGNED-NEXT: flat_store_byte v[100:101], v69 offset:100 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v69, 24, v8 +; ALIGNED-NEXT: flat_store_byte v[100:101], v113 offset:98 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v113, 8, v8 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v28 offset:92 +; ALIGNED-NEXT: flat_store_byte v[100:101], v28 offset:93 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v28, 8, v7 ; ALIGNED-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:392 ; ALIGNED-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:396 ; ALIGNED-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:388 ; ALIGNED-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:384 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v26 offset:84 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v27 offset:88 -; ALIGNED-NEXT: flat_store_byte v[98:99], v27 offset:89 -; ALIGNED-NEXT: flat_store_byte v[98:99], v26 offset:85 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v25 offset:80 -; ALIGNED-NEXT: flat_store_byte v[98:99], v25 offset:81 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v24 offset:76 -; ALIGNED-NEXT: flat_store_byte v[98:99], v24 offset:77 +; ALIGNED-NEXT: flat_store_byte v[100:101], v68 offset:88 +; ALIGNED-NEXT: flat_store_byte v[100:101], v50 offset:86 +; ALIGNED-NEXT: flat_store_byte v[100:101], v87 offset:92 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v27 offset:88 +; ALIGNED-NEXT: flat_store_byte v[100:101], v27 offset:89 ; ALIGNED-NEXT: v_lshrrev_b32_e32 v27, 8, v4 -; ALIGNED-NEXT: flat_store_byte v[98:99], v80 offset:88 -; ALIGNED-NEXT: flat_store_byte v[98:99], v81 offset:86 -; ALIGNED-NEXT: flat_store_byte v[98:99], v82 offset:92 -; ALIGNED-NEXT: flat_store_byte v[98:99], v83 offset:90 -; ALIGNED-NEXT: flat_store_byte v[98:99], v64 offset:84 -; ALIGNED-NEXT: flat_store_byte v[98:99], v65 offset:82 -; ALIGNED-NEXT: flat_store_byte v[98:99], v66 offset:80 -; ALIGNED-NEXT: flat_store_byte v[98:99], v67 offset:78 +; ALIGNED-NEXT: flat_store_byte v[100:101], v82 offset:90 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v26 offset:84 +; ALIGNED-NEXT: flat_store_byte v[100:101], v26 offset:85 +; ALIGNED-NEXT: flat_store_byte v[100:101], v49 offset:84 +; ALIGNED-NEXT: flat_store_byte v[100:101], v99 offset:82 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v25 offset:80 +; ALIGNED-NEXT: flat_store_byte v[100:101], v25 offset:81 +; ALIGNED-NEXT: flat_store_byte v[100:101], v67 offset:80 +; ALIGNED-NEXT: flat_store_byte v[100:101], v48 offset:78 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v24 offset:76 +; ALIGNED-NEXT: flat_store_byte v[100:101], v24 offset:77 ; ALIGNED-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:408 ; ALIGNED-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:412 ; ALIGNED-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:404 ; ALIGNED-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:400 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v22 offset:68 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v23 offset:72 -; ALIGNED-NEXT: flat_store_byte v[98:99], v23 offset:73 -; ALIGNED-NEXT: flat_store_byte v[98:99], v22 offset:69 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v21 offset:64 -; ALIGNED-NEXT: flat_store_byte v[98:99], v21 offset:65 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v20 offset:60 +; ALIGNED-NEXT: flat_store_byte v[100:101], v86 offset:72 +; ALIGNED-NEXT: flat_store_byte v[100:101], v66 offset:70 +; ALIGNED-NEXT: flat_store_byte v[100:101], v81 offset:76 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v23 offset:72 +; ALIGNED-NEXT: flat_store_byte v[100:101], v23 offset:73 +; ALIGNED-NEXT: flat_store_byte v[100:101], v39 offset:74 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v22 offset:68 +; ALIGNED-NEXT: flat_store_byte v[100:101], v22 offset:69 +; ALIGNED-NEXT: flat_store_byte v[100:101], v114 offset:68 +; ALIGNED-NEXT: flat_store_byte v[100:101], v38 offset:66 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v21 offset:64 +; ALIGNED-NEXT: flat_store_byte v[100:101], v21 offset:65 +; ALIGNED-NEXT: flat_store_byte v[100:101], v65 offset:64 +; ALIGNED-NEXT: flat_store_byte v[100:101], v97 offset:62 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v20 offset:60 ; ALIGNED-NEXT: flat_store_byte v[0:1], v20 offset:64 -; ALIGNED-NEXT: flat_store_byte v[98:99], v36 offset:72 -; ALIGNED-NEXT: flat_store_byte v[98:99], v37 offset:70 -; ALIGNED-NEXT: flat_store_byte v[98:99], v38 offset:76 -; ALIGNED-NEXT: flat_store_byte v[98:99], v39 offset:74 -; ALIGNED-NEXT: flat_store_byte v[98:99], v84 offset:68 -; ALIGNED-NEXT: flat_store_byte v[98:99], v85 offset:66 -; ALIGNED-NEXT: flat_store_byte v[98:99], v86 offset:64 -; ALIGNED-NEXT: flat_store_byte v[98:99], v87 offset:62 ; ALIGNED-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:488 ; ALIGNED-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:492 ; ALIGNED-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:484 ; ALIGNED-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:480 -; ALIGNED-NEXT: flat_store_byte v[98:99], v115 offset:56 -; ALIGNED-NEXT: flat_store_byte v[98:99], v114 offset:54 -; ALIGNED-NEXT: flat_store_byte v[98:99], v113 offset:60 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v18 offset:52 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v19 offset:56 -; ALIGNED-NEXT: flat_store_byte v[98:99], v19 offset:57 -; ALIGNED-NEXT: flat_store_byte v[98:99], v112 offset:58 -; ALIGNED-NEXT: flat_store_byte v[98:99], v18 offset:53 -; ALIGNED-NEXT: flat_store_byte v[98:99], v32 offset:52 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v17 offset:48 -; ALIGNED-NEXT: flat_store_byte v[98:99], v33 offset:50 -; ALIGNED-NEXT: flat_store_byte v[98:99], v17 offset:49 -; ALIGNED-NEXT: flat_store_byte v[98:99], v34 offset:48 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v16 offset:44 -; ALIGNED-NEXT: flat_store_byte v[98:99], v35 offset:46 -; ALIGNED-NEXT: flat_store_byte v[98:99], v16 offset:45 +; ALIGNED-NEXT: flat_store_byte v[100:101], v37 offset:56 +; ALIGNED-NEXT: flat_store_byte v[100:101], v80 offset:54 +; ALIGNED-NEXT: flat_store_byte v[100:101], v64 offset:60 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v18 offset:52 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v19 offset:56 +; ALIGNED-NEXT: flat_store_byte v[100:101], v19 offset:57 +; ALIGNED-NEXT: flat_store_byte v[100:101], v36 offset:58 +; ALIGNED-NEXT: flat_store_byte v[100:101], v18 offset:53 +; ALIGNED-NEXT: flat_store_byte v[100:101], v85 offset:52 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v17 offset:48 +; ALIGNED-NEXT: flat_store_byte v[100:101], v115 offset:50 +; ALIGNED-NEXT: flat_store_byte v[100:101], v17 offset:49 +; ALIGNED-NEXT: flat_store_byte v[100:101], v96 offset:48 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v16 offset:44 +; ALIGNED-NEXT: flat_store_byte v[100:101], v35 offset:46 +; ALIGNED-NEXT: flat_store_byte v[100:101], v16 offset:45 ; ALIGNED-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:508 ; ALIGNED-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:504 ; ALIGNED-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:500 ; ALIGNED-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:496 -; ALIGNED-NEXT: flat_store_byte v[98:99], v52 offset:40 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v14 offset:36 -; ALIGNED-NEXT: flat_store_byte v[98:99], v53 offset:38 -; ALIGNED-NEXT: flat_store_byte v[98:99], v14 offset:37 -; ALIGNED-NEXT: flat_store_byte v[98:99], v54 offset:44 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v15 offset:40 -; ALIGNED-NEXT: flat_store_byte v[98:99], v55 offset:42 -; ALIGNED-NEXT: flat_store_byte v[98:99], v15 offset:41 -; ALIGNED-NEXT: flat_store_byte v[98:99], v68 offset:32 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v12 offset:28 -; ALIGNED-NEXT: flat_store_byte v[98:99], v69 offset:30 +; ALIGNED-NEXT: flat_store_byte v[100:101], v55 offset:40 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v14 offset:36 +; ALIGNED-NEXT: flat_store_byte v[100:101], v34 offset:38 +; ALIGNED-NEXT: flat_store_byte v[100:101], v14 offset:37 +; ALIGNED-NEXT: flat_store_byte v[100:101], v71 offset:44 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v15 offset:40 +; ALIGNED-NEXT: flat_store_byte v[100:101], v54 offset:42 +; ALIGNED-NEXT: flat_store_byte v[100:101], v15 offset:41 +; ALIGNED-NEXT: flat_store_byte v[100:101], v33 offset:32 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v12 offset:28 +; ALIGNED-NEXT: flat_store_byte v[100:101], v84 offset:30 ; ALIGNED-NEXT: flat_store_byte v[0:1], v12 offset:32 -; ALIGNED-NEXT: flat_store_byte v[98:99], v70 offset:36 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v13 offset:32 -; ALIGNED-NEXT: flat_store_byte v[98:99], v71 offset:34 -; ALIGNED-NEXT: flat_store_byte v[98:99], v13 offset:33 +; ALIGNED-NEXT: flat_store_byte v[100:101], v70 offset:36 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v13 offset:32 +; ALIGNED-NEXT: flat_store_byte v[100:101], v32 offset:34 +; ALIGNED-NEXT: flat_store_byte v[100:101], v13 offset:33 ; ALIGNED-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:456 ; ALIGNED-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:460 ; ALIGNED-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:452 ; ALIGNED-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:448 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v10 offset:20 -; ALIGNED-NEXT: flat_store_byte v[98:99], v28 offset:24 -; ALIGNED-NEXT: flat_store_byte v[98:99], v29 offset:22 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v11 offset:24 -; ALIGNED-NEXT: flat_store_byte v[98:99], v30 offset:28 -; ALIGNED-NEXT: flat_store_byte v[98:99], v11 offset:25 -; ALIGNED-NEXT: flat_store_byte v[98:99], v31 offset:26 -; ALIGNED-NEXT: flat_store_byte v[98:99], v10 offset:21 -; ALIGNED-NEXT: flat_store_byte v[98:99], v103 offset:20 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v9 offset:16 -; ALIGNED-NEXT: flat_store_byte v[98:99], v102 offset:18 -; ALIGNED-NEXT: flat_store_byte v[98:99], v9 offset:17 -; ALIGNED-NEXT: flat_store_byte v[98:99], v101 offset:16 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v8 offset:12 -; ALIGNED-NEXT: flat_store_byte v[98:99], v100 offset:14 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v10 offset:20 +; ALIGNED-NEXT: flat_store_byte v[100:101], v53 offset:24 +; ALIGNED-NEXT: flat_store_byte v[100:101], v112 offset:22 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v11 offset:24 +; ALIGNED-NEXT: flat_store_byte v[100:101], v98 offset:28 +; ALIGNED-NEXT: flat_store_byte v[100:101], v11 offset:25 +; ALIGNED-NEXT: flat_store_byte v[100:101], v31 offset:26 +; ALIGNED-NEXT: flat_store_byte v[100:101], v10 offset:21 +; ALIGNED-NEXT: flat_store_byte v[100:101], v52 offset:20 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v9 offset:16 +; ALIGNED-NEXT: flat_store_byte v[100:101], v30 offset:18 +; ALIGNED-NEXT: flat_store_byte v[100:101], v9 offset:17 +; ALIGNED-NEXT: flat_store_byte v[100:101], v69 offset:16 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v8 offset:12 +; ALIGNED-NEXT: flat_store_byte v[100:101], v113 offset:14 ; ALIGNED-NEXT: flat_store_byte v[0:1], v8 offset:16 ; ALIGNED-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:472 ; ALIGNED-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:476 ; ALIGNED-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:468 ; ALIGNED-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:464 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v6 offset:4 -; ALIGNED-NEXT: flat_store_byte v[98:99], v48 offset:8 -; ALIGNED-NEXT: flat_store_byte v[98:99], v49 offset:6 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v7 offset:8 -; ALIGNED-NEXT: flat_store_byte v[98:99], v50 offset:12 -; ALIGNED-NEXT: flat_store_byte v[98:99], v7 offset:9 -; ALIGNED-NEXT: flat_store_byte v[98:99], v51 offset:10 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v6 offset:4 +; ALIGNED-NEXT: flat_store_byte v[100:101], v29 offset:8 +; ALIGNED-NEXT: flat_store_byte v[100:101], v83 offset:6 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v7 offset:8 +; ALIGNED-NEXT: flat_store_byte v[100:101], v51 offset:12 +; ALIGNED-NEXT: flat_store_byte v[100:101], v7 offset:9 +; ALIGNED-NEXT: flat_store_byte v[100:101], v28 offset:10 ; ALIGNED-NEXT: flat_store_byte v[0:1], v6 offset:8 ; ALIGNED-NEXT: flat_store_byte v[0:1], v5 offset:4 ; ALIGNED-NEXT: flat_store_byte_d16_hi v[0:1], v4 offset:2 ; ALIGNED-NEXT: flat_store_byte v[0:1], v27 offset:1 ; ALIGNED-NEXT: flat_store_byte v[0:1], v4 ; ALIGNED-NEXT: v_add_co_u32 v0, vcc_lo, 0xffffff00, v0 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v24, 24, v5 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v68, 24, v5 ; ALIGNED-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo -; ALIGNED-NEXT: v_lshrrev_b32_e32 v25, 8, v5 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v50, 8, v5 ; ALIGNED-NEXT: s_cmp_eq_u64 s[4:5], 0 -; ALIGNED-NEXT: v_lshrrev_b32_e32 v26, 24, v4 -; ALIGNED-NEXT: flat_store_byte v[98:99], v24 offset:4 -; ALIGNED-NEXT: flat_store_byte_d16_hi v[96:97], v5 -; ALIGNED-NEXT: flat_store_byte v[98:99], v25 offset:2 -; ALIGNED-NEXT: flat_store_byte v[98:99], v26 +; ALIGNED-NEXT: v_lshrrev_b32_e32 v87, 24, v4 +; ALIGNED-NEXT: flat_store_byte v[100:101], v68 offset:4 +; ALIGNED-NEXT: flat_store_byte_d16_hi v[102:103], v5 +; ALIGNED-NEXT: flat_store_byte v[100:101], v50 offset:2 +; ALIGNED-NEXT: flat_store_byte v[100:101], v87 ; ALIGNED-NEXT: s_cbranch_scc0 .LBB7_5 ; ALIGNED-NEXT: .LBB7_6: ; %Flow17 ; ALIGNED-NEXT: s_or_b32 exec_lo, exec_lo, s6 @@ -12656,22 +12661,22 @@ define void @memmove_p0_p5_sz2048(ptr addrspace(0) align 1 %dst, ptr addrspace(5 ; CHECK-NEXT: buffer_load_dword v50, v2, s[0:3], 0 offen offset:1960 ; CHECK-NEXT: buffer_load_dword v49, v2, s[0:3], 0 offen offset:1956 ; CHECK-NEXT: buffer_load_dword v48, v2, s[0:3], 0 offen offset:1952 -; CHECK-NEXT: buffer_load_dword v67, v2, s[0:3], 0 offen offset:1948 -; CHECK-NEXT: buffer_load_dword v66, v2, s[0:3], 0 offen offset:1944 -; CHECK-NEXT: buffer_load_dword v65, v2, s[0:3], 0 offen offset:1940 -; CHECK-NEXT: buffer_load_dword v64, v2, s[0:3], 0 offen offset:1936 -; CHECK-NEXT: buffer_load_dword v71, v2, s[0:3], 0 offen offset:1932 -; CHECK-NEXT: buffer_load_dword v70, v2, s[0:3], 0 offen offset:1928 -; CHECK-NEXT: buffer_load_dword v69, v2, s[0:3], 0 offen offset:1924 -; CHECK-NEXT: buffer_load_dword v68, v2, s[0:3], 0 offen offset:1920 -; CHECK-NEXT: buffer_load_dword v83, v2, s[0:3], 0 offen offset:1916 -; CHECK-NEXT: buffer_load_dword v82, v2, s[0:3], 0 offen offset:1912 -; CHECK-NEXT: buffer_load_dword v81, v2, s[0:3], 0 offen offset:1908 -; CHECK-NEXT: buffer_load_dword v80, v2, s[0:3], 0 offen offset:1904 -; CHECK-NEXT: buffer_load_dword v87, v2, s[0:3], 0 offen offset:1900 -; CHECK-NEXT: buffer_load_dword v86, v2, s[0:3], 0 offen offset:1896 -; CHECK-NEXT: buffer_load_dword v85, v2, s[0:3], 0 offen offset:1892 -; CHECK-NEXT: buffer_load_dword v84, v2, s[0:3], 0 offen offset:1888 +; CHECK-NEXT: buffer_load_dword v67, v2, s[0:3], 0 offen offset:1932 +; CHECK-NEXT: buffer_load_dword v71, v2, s[0:3], 0 offen offset:1948 +; CHECK-NEXT: buffer_load_dword v70, v2, s[0:3], 0 offen offset:1944 +; CHECK-NEXT: buffer_load_dword v69, v2, s[0:3], 0 offen offset:1940 +; CHECK-NEXT: buffer_load_dword v68, v2, s[0:3], 0 offen offset:1936 +; CHECK-NEXT: buffer_load_dword v66, v2, s[0:3], 0 offen offset:1928 +; CHECK-NEXT: buffer_load_dword v65, v2, s[0:3], 0 offen offset:1924 +; CHECK-NEXT: buffer_load_dword v64, v2, s[0:3], 0 offen offset:1920 +; CHECK-NEXT: buffer_load_dword v83, v2, s[0:3], 0 offen offset:1900 +; CHECK-NEXT: buffer_load_dword v87, v2, s[0:3], 0 offen offset:1916 +; CHECK-NEXT: buffer_load_dword v86, v2, s[0:3], 0 offen offset:1912 +; CHECK-NEXT: buffer_load_dword v85, v2, s[0:3], 0 offen offset:1908 +; CHECK-NEXT: buffer_load_dword v84, v2, s[0:3], 0 offen offset:1904 +; CHECK-NEXT: buffer_load_dword v82, v2, s[0:3], 0 offen offset:1896 +; CHECK-NEXT: buffer_load_dword v81, v2, s[0:3], 0 offen offset:1892 +; CHECK-NEXT: buffer_load_dword v80, v2, s[0:3], 0 offen offset:1888 ; CHECK-NEXT: buffer_load_dword v96, v2, s[0:3], 0 offen offset:1840 ; CHECK-NEXT: buffer_load_dword v97, v2, s[0:3], 0 offen offset:1844 ; CHECK-NEXT: buffer_load_dword v98, v2, s[0:3], 0 offen offset:1848 @@ -12693,10 +12698,10 @@ define void @memmove_p0_p5_sz2048(ptr addrspace(0) align 1 %dst, ptr addrspace(5 ; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[52:55] offset:128 ; CHECK-NEXT: s_waitcnt vmcnt(20) ; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[48:51] offset:112 -; CHECK-NEXT: s_waitcnt vmcnt(16) -; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[64:67] offset:96 +; CHECK-NEXT: s_waitcnt vmcnt(15) +; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[68:71] offset:96 ; CHECK-NEXT: s_waitcnt vmcnt(12) -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[68:71] offset:128 +; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[64:67] offset:128 ; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[15:18] offset:64 ; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[11:14] offset:32 ; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[7:10] offset:16 @@ -12704,10 +12709,10 @@ define void @memmove_p0_p5_sz2048(ptr addrspace(0) align 1 %dst, ptr addrspace(5 ; CHECK-NEXT: v_add_co_u32 v0, vcc_lo, 0xffffff00, v0 ; CHECK-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo ; CHECK-NEXT: s_cmp_eq_u64 s[4:5], 0 -; CHECK-NEXT: s_waitcnt vmcnt(8) -; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[80:83] offset:64 +; CHECK-NEXT: s_waitcnt vmcnt(7) +; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[84:87] offset:64 ; CHECK-NEXT: s_waitcnt vmcnt(4) -; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[84:87] offset:48 +; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[80:83] offset:48 ; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[19:22] offset:32 ; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: flat_store_dwordx4 v[100:101], v[96:99] diff --git a/llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll b/llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll index 16d50bf927f85..028fd560fdcdf 100644 --- a/llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll +++ b/llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll @@ -506,8 +506,6 @@ define void @memset_p0_sz1055_align_4_varsetval(ptr addrspace(0) align 4 %dst, i ; GFX942-SDAG-NEXT: v_accvgpr_write_b32 a9, v57 ; Reload Reuse ; GFX942-SDAG-NEXT: v_accvgpr_write_b32 a10, v58 ; Reload Reuse ; GFX942-SDAG-NEXT: v_accvgpr_write_b32 a11, v59 ; Reload Reuse -; GFX942-SDAG-NEXT: v_accvgpr_write_b32 a12, v60 ; Reload Reuse -; GFX942-SDAG-NEXT: v_accvgpr_write_b32 a13, v61 ; Reload Reuse ; GFX942-SDAG-NEXT: s_mov_b32 s0, 0x4040404 ; GFX942-SDAG-NEXT: v_perm_b32 v4, v2, v2, s0 ; GFX942-SDAG-NEXT: v_mov_b32_e32 v5, v4 @@ -574,8 +572,8 @@ define void @memset_p0_sz1055_align_4_varsetval(ptr addrspace(0) align 4 %dst, i ; GFX942-SDAG-NEXT: v_lshl_add_u64 v[46:47], v[38:39], 0, s[14:15] ; GFX942-SDAG-NEXT: v_lshl_add_u64 v[56:57], v[38:39], 0, s[16:17] ; GFX942-SDAG-NEXT: v_lshl_add_u64 v[58:59], v[38:39], 0, s[18:19] -; GFX942-SDAG-NEXT: v_lshl_add_u64 v[60:61], v[38:39], 0, s[20:21] ; GFX942-SDAG-NEXT: flat_store_dwordx4 v[38:39], v[4:7] offset:128 +; GFX942-SDAG-NEXT: v_lshl_add_u64 v[38:39], v[38:39], 0, s[20:21] ; GFX942-SDAG-NEXT: flat_store_dwordx4 v[48:49], v[32:35] ; GFX942-SDAG-NEXT: flat_store_dwordx4 v[50:51], v[28:31] ; GFX942-SDAG-NEXT: flat_store_dwordx4 v[52:53], v[24:27] @@ -586,7 +584,7 @@ define void @memset_p0_sz1055_align_4_varsetval(ptr addrspace(0) align 4 %dst, i ; GFX942-SDAG-NEXT: flat_store_dwordx4 v[46:47], v[20:23] ; GFX942-SDAG-NEXT: flat_store_dwordx4 v[56:57], v[16:19] ; GFX942-SDAG-NEXT: flat_store_dwordx4 v[58:59], v[12:15] -; GFX942-SDAG-NEXT: flat_store_dwordx4 v[60:61], v[8:11] +; GFX942-SDAG-NEXT: flat_store_dwordx4 v[38:39], v[8:11] ; GFX942-SDAG-NEXT: s_cbranch_vccnz .LBB4_1 ; GFX942-SDAG-NEXT: ; %bb.2: ; %static-memset-post-expansion ; GFX942-SDAG-NEXT: s_mov_b32 s0, 0x4040404 @@ -600,8 +598,6 @@ define void @memset_p0_sz1055_align_4_varsetval(ptr addrspace(0) align 4 %dst, i ; GFX942-SDAG-NEXT: flat_store_dwordx3 v[0:1], v[4:6] offset:1040 ; GFX942-SDAG-NEXT: flat_store_short v[0:1], v3 offset:1052 ; GFX942-SDAG-NEXT: flat_store_byte v[0:1], v2 offset:1054 -; GFX942-SDAG-NEXT: v_accvgpr_read_b32 v61, a13 ; Reload Reuse -; GFX942-SDAG-NEXT: v_accvgpr_read_b32 v60, a12 ; Reload Reuse ; GFX942-SDAG-NEXT: v_accvgpr_read_b32 v59, a11 ; Reload Reuse ; GFX942-SDAG-NEXT: v_accvgpr_read_b32 v58, a10 ; Reload Reuse ; GFX942-SDAG-NEXT: v_accvgpr_read_b32 v57, a9 ; Reload Reuse @@ -1108,9 +1104,6 @@ define void @memset_p3_sz1055_align_4_varsetval(ptr addrspace(3) align 4 %dst, i ; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX942-SDAG-NEXT: s_mov_b32 s0, 0x4040404 ; GFX942-SDAG-NEXT: v_perm_b32 v2, v1, v1, s0 -; GFX942-SDAG-NEXT: s_mov_b64 s[0:1], 0 -; GFX942-SDAG-NEXT: v_mov_b64_e32 v[34:35], 0x400 -; GFX942-SDAG-NEXT: v_mov_b32_e32 v36, v0 ; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, v2 ; GFX942-SDAG-NEXT: v_mov_b32_e32 v4, v2 ; GFX942-SDAG-NEXT: v_mov_b32_e32 v5, v2 @@ -1142,6 +1135,9 @@ define void @memset_p3_sz1055_align_4_varsetval(ptr addrspace(3) align 4 %dst, i ; GFX942-SDAG-NEXT: v_mov_b32_e32 v31, v2 ; GFX942-SDAG-NEXT: v_mov_b32_e32 v32, v2 ; GFX942-SDAG-NEXT: v_mov_b32_e32 v33, v2 +; GFX942-SDAG-NEXT: s_mov_b64 s[0:1], 0 +; GFX942-SDAG-NEXT: v_mov_b64_e32 v[34:35], 0x400 +; GFX942-SDAG-NEXT: v_mov_b32_e32 v36, v0 ; GFX942-SDAG-NEXT: .LBB8_1: ; %static-memset-expansion-main-body ; GFX942-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX942-SDAG-NEXT: s_add_u32 s0, s0, 0x100 @@ -1269,8 +1265,6 @@ define void @memset_p3_sz2048_align_4_varsetval(ptr addrspace(3) align 4 %dst, i ; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX942-SDAG-NEXT: s_mov_b32 s0, 0x4040404 ; GFX942-SDAG-NEXT: v_perm_b32 v2, v1, v1, s0 -; GFX942-SDAG-NEXT: s_mov_b64 s[0:1], 0 -; GFX942-SDAG-NEXT: v_mov_b64_e32 v[34:35], 0x800 ; GFX942-SDAG-NEXT: v_mov_b32_e32 v1, v2 ; GFX942-SDAG-NEXT: v_mov_b32_e32 v4, v2 ; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, v2 @@ -1302,6 +1296,8 @@ define void @memset_p3_sz2048_align_4_varsetval(ptr addrspace(3) align 4 %dst, i ; GFX942-SDAG-NEXT: v_mov_b32_e32 v29, v2 ; GFX942-SDAG-NEXT: v_mov_b32_e32 v32, v2 ; GFX942-SDAG-NEXT: v_mov_b32_e32 v31, v2 +; GFX942-SDAG-NEXT: s_mov_b64 s[0:1], 0 +; GFX942-SDAG-NEXT: v_mov_b64_e32 v[34:35], 0x800 ; GFX942-SDAG-NEXT: .LBB9_1: ; %static-memset-expansion-main-body ; GFX942-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX942-SDAG-NEXT: s_add_u32 s0, s0, 0x100 diff --git a/llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll b/llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll index 263298d1cd1c8..b1ab747e7fbb1 100644 --- a/llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll +++ b/llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll @@ -375,19 +375,18 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32_inline_asm_virtual_agpr(ptr ; GFX908-NEXT: v_accvgpr_read_b32 v26, a2 ; GFX908-NEXT: v_accvgpr_read_b32 v25, a1 ; GFX908-NEXT: v_accvgpr_read_b32 v24, a0 +; GFX908-NEXT: v_accvgpr_read_b32 v31, a7 +; GFX908-NEXT: v_accvgpr_read_b32 v30, a6 +; GFX908-NEXT: v_accvgpr_read_b32 v29, a5 ; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:96 -; GFX908-NEXT: s_nop 0 -; GFX908-NEXT: v_accvgpr_read_b32 v3, a7 -; GFX908-NEXT: v_accvgpr_read_b32 v2, a6 -; GFX908-NEXT: v_accvgpr_read_b32 v1, a5 -; GFX908-NEXT: v_accvgpr_read_b32 v0, a4 +; GFX908-NEXT: v_accvgpr_read_b32 v28, a4 ; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:112 ; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:64 ; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:80 ; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:32 ; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:48 ; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] -; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:16 +; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:16 ; GFX908-NEXT: s_endpgm bb: %acc = call i32 asm sideeffect "; def $0", "={a0}"() @@ -482,19 +481,18 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32_inline_asm_phys_agpr(ptr add ; GFX908-NEXT: v_accvgpr_read_b32 v26, a2 ; GFX908-NEXT: v_accvgpr_read_b32 v25, a1 ; GFX908-NEXT: v_accvgpr_read_b32 v24, a0 +; GFX908-NEXT: v_accvgpr_read_b32 v31, a7 +; GFX908-NEXT: v_accvgpr_read_b32 v30, a6 +; GFX908-NEXT: v_accvgpr_read_b32 v29, a5 ; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:96 -; GFX908-NEXT: s_nop 0 -; GFX908-NEXT: v_accvgpr_read_b32 v3, a7 -; GFX908-NEXT: v_accvgpr_read_b32 v2, a6 -; GFX908-NEXT: v_accvgpr_read_b32 v1, a5 -; GFX908-NEXT: v_accvgpr_read_b32 v0, a4 +; GFX908-NEXT: v_accvgpr_read_b32 v28, a4 ; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:112 ; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:64 ; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:80 ; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:32 ; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:48 ; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] -; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:16 +; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:16 ; GFX908-NEXT: s_endpgm bb: call void asm sideeffect "; use $0", "{a[100:131]}"(<32 x float> poison) @@ -588,19 +586,18 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32_inline_asm_no_agprs(ptr addr ; GFX908-NEXT: v_accvgpr_read_b32 v26, a2 ; GFX908-NEXT: v_accvgpr_read_b32 v25, a1 ; GFX908-NEXT: v_accvgpr_read_b32 v24, a0 +; GFX908-NEXT: v_accvgpr_read_b32 v31, a7 +; GFX908-NEXT: v_accvgpr_read_b32 v30, a6 +; GFX908-NEXT: v_accvgpr_read_b32 v29, a5 ; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:96 -; GFX908-NEXT: s_nop 0 -; GFX908-NEXT: v_accvgpr_read_b32 v3, a7 -; GFX908-NEXT: v_accvgpr_read_b32 v2, a6 -; GFX908-NEXT: v_accvgpr_read_b32 v1, a5 -; GFX908-NEXT: v_accvgpr_read_b32 v0, a4 +; GFX908-NEXT: v_accvgpr_read_b32 v28, a4 ; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:112 ; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:64 ; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:80 ; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:32 ; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:48 ; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] -; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:16 +; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:16 ; GFX908-NEXT: s_endpgm bb: %acc = call i32 asm sideeffect "; def $0", "={v0}"() @@ -717,19 +714,18 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32_call(ptr addrspace(1) %arg) ; GFX908-NEXT: v_accvgpr_read_b32 v26, a2 ; GFX908-NEXT: v_accvgpr_read_b32 v25, a1 ; GFX908-NEXT: v_accvgpr_read_b32 v24, a0 +; GFX908-NEXT: v_accvgpr_read_b32 v31, a7 +; GFX908-NEXT: v_accvgpr_read_b32 v30, a6 ; GFX908-NEXT: global_store_dwordx4 v40, v[0:3], s[34:35] offset:96 -; GFX908-NEXT: s_nop 0 -; GFX908-NEXT: v_accvgpr_read_b32 v3, a7 -; GFX908-NEXT: v_accvgpr_read_b32 v2, a6 -; GFX908-NEXT: v_accvgpr_read_b32 v1, a5 -; GFX908-NEXT: v_accvgpr_read_b32 v0, a4 +; GFX908-NEXT: v_accvgpr_read_b32 v29, a5 +; GFX908-NEXT: v_accvgpr_read_b32 v28, a4 ; GFX908-NEXT: global_store_dwordx4 v40, v[4:7], s[34:35] offset:112 ; GFX908-NEXT: global_store_dwordx4 v40, v[8:11], s[34:35] offset:64 ; GFX908-NEXT: global_store_dwordx4 v40, v[12:15], s[34:35] offset:80 ; GFX908-NEXT: global_store_dwordx4 v40, v[16:19], s[34:35] offset:32 ; GFX908-NEXT: global_store_dwordx4 v40, v[20:23], s[34:35] offset:48 ; GFX908-NEXT: global_store_dwordx4 v40, v[24:27], s[34:35] -; GFX908-NEXT: global_store_dwordx4 v40, v[0:3], s[34:35] offset:16 +; GFX908-NEXT: global_store_dwordx4 v40, v[28:31], s[34:35] offset:16 ; GFX908-NEXT: s_endpgm bb: call void @foo() @@ -1003,19 +999,18 @@ define void @test_mfma_f32_32x32x1f32_nonentry_noagpr(ptr addrspace(1) %arg) #0 ; GFX908-NEXT: v_accvgpr_read_b32 v28, a2 ; GFX908-NEXT: v_accvgpr_read_b32 v27, a1 ; GFX908-NEXT: v_accvgpr_read_b32 v26, a0 +; GFX908-NEXT: v_accvgpr_read_b32 v33, a7 +; GFX908-NEXT: v_accvgpr_read_b32 v32, a6 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[2:5], off offset:96 -; GFX908-NEXT: s_nop 0 -; GFX908-NEXT: v_accvgpr_read_b32 v5, a7 -; GFX908-NEXT: v_accvgpr_read_b32 v4, a6 -; GFX908-NEXT: v_accvgpr_read_b32 v3, a5 -; GFX908-NEXT: v_accvgpr_read_b32 v2, a4 +; GFX908-NEXT: v_accvgpr_read_b32 v31, a5 +; GFX908-NEXT: v_accvgpr_read_b32 v30, a4 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:112 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[10:13], off offset:64 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[14:17], off offset:80 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[18:21], off offset:32 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[22:25], off offset:48 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[26:29], off -; GFX908-NEXT: global_store_dwordx4 v[0:1], v[2:5], off offset:16 +; GFX908-NEXT: global_store_dwordx4 v[0:1], v[30:33], off offset:16 ; GFX908-NEXT: s_waitcnt vmcnt(0) ; GFX908-NEXT: s_setpc_b64 s[30:31] bb: @@ -1104,19 +1099,18 @@ define void @test_mfma_f32_32x32x1f32_nonentry_with_agpr(ptr addrspace(1) %arg) ; GFX908-NEXT: v_accvgpr_read_b32 v28, a2 ; GFX908-NEXT: v_accvgpr_read_b32 v27, a1 ; GFX908-NEXT: v_accvgpr_read_b32 v26, a0 +; GFX908-NEXT: v_accvgpr_read_b32 v33, a7 +; GFX908-NEXT: v_accvgpr_read_b32 v32, a6 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[2:5], off offset:96 -; GFX908-NEXT: s_nop 0 -; GFX908-NEXT: v_accvgpr_read_b32 v5, a7 -; GFX908-NEXT: v_accvgpr_read_b32 v4, a6 -; GFX908-NEXT: v_accvgpr_read_b32 v3, a5 -; GFX908-NEXT: v_accvgpr_read_b32 v2, a4 +; GFX908-NEXT: v_accvgpr_read_b32 v31, a5 +; GFX908-NEXT: v_accvgpr_read_b32 v30, a4 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:112 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[10:13], off offset:64 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[14:17], off offset:80 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[18:21], off offset:32 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[22:25], off offset:48 ; GFX908-NEXT: global_store_dwordx4 v[0:1], v[26:29], off -; GFX908-NEXT: global_store_dwordx4 v[0:1], v[2:5], off offset:16 +; GFX908-NEXT: global_store_dwordx4 v[0:1], v[30:33], off offset:16 ; GFX908-NEXT: s_waitcnt vmcnt(0) ; GFX908-NEXT: s_setpc_b64 s[30:31] bb: diff --git a/llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll b/llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll index 85b076f636187..8ead853404e68 100644 --- a/llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll +++ b/llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll @@ -221,6 +221,7 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32(ptr addrspace(1) %arg) #0 { ; GREEDY90A-NEXT: s_load_dwordx2 s[34:35], s[4:5], 0x24 ; GREEDY90A-NEXT: v_mov_b32_e32 v64, 1.0 ; GREEDY90A-NEXT: v_mov_b32_e32 v65, 2.0 +; GREEDY90A-NEXT: v_mov_b32_e32 v66, 0 ; GREEDY90A-NEXT: s_waitcnt lgkmcnt(0) ; GREEDY90A-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0 ; GREEDY90A-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40 @@ -292,19 +293,18 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32(ptr addrspace(1) %arg) #0 { ; GREEDY90A-NEXT: v_mov_b32_e32 v29, v59 ; GREEDY90A-NEXT: v_mov_b32_e32 v30, v60 ; GREEDY90A-NEXT: v_mov_b32_e32 v31, v61 -; GREEDY90A-NEXT: v_mov_b32_e32 v32, 0 -; GREEDY90A-NEXT: s_nop 0 +; GREEDY90A-NEXT: s_nop 1 ; GREEDY90A-NEXT: v_mfma_f32_32x32x1f32 v[0:31], v64, v65, v[0:31] ; GREEDY90A-NEXT: s_nop 15 ; GREEDY90A-NEXT: s_nop 2 -; GREEDY90A-NEXT: global_store_dwordx4 v32, v[24:27], s[34:35] offset:96 -; GREEDY90A-NEXT: global_store_dwordx4 v32, v[28:31], s[34:35] offset:112 -; GREEDY90A-NEXT: global_store_dwordx4 v32, v[16:19], s[34:35] offset:64 -; GREEDY90A-NEXT: global_store_dwordx4 v32, v[20:23], s[34:35] offset:80 -; GREEDY90A-NEXT: global_store_dwordx4 v32, v[8:11], s[34:35] offset:32 -; GREEDY90A-NEXT: global_store_dwordx4 v32, v[12:15], s[34:35] offset:48 -; GREEDY90A-NEXT: global_store_dwordx4 v32, v[0:3], s[34:35] -; GREEDY90A-NEXT: global_store_dwordx4 v32, v[4:7], s[34:35] offset:16 +; GREEDY90A-NEXT: global_store_dwordx4 v66, v[24:27], s[34:35] offset:96 +; GREEDY90A-NEXT: global_store_dwordx4 v66, v[28:31], s[34:35] offset:112 +; GREEDY90A-NEXT: global_store_dwordx4 v66, v[16:19], s[34:35] offset:64 +; GREEDY90A-NEXT: global_store_dwordx4 v66, v[20:23], s[34:35] offset:80 +; GREEDY90A-NEXT: global_store_dwordx4 v66, v[8:11], s[34:35] offset:32 +; GREEDY90A-NEXT: global_store_dwordx4 v66, v[12:15], s[34:35] offset:48 +; GREEDY90A-NEXT: global_store_dwordx4 v66, v[0:3], s[34:35] +; GREEDY90A-NEXT: global_store_dwordx4 v66, v[4:7], s[34:35] offset:16 ; GREEDY90A-NEXT: s_endpgm ; ; GREEDY942-LABEL: test_mfma_f32_32x32x1f32: @@ -312,6 +312,7 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32(ptr addrspace(1) %arg) #0 { ; GREEDY942-NEXT: s_load_dwordx2 s[34:35], s[4:5], 0x24 ; GREEDY942-NEXT: v_mov_b32_e32 v64, 1.0 ; GREEDY942-NEXT: v_mov_b32_e32 v65, 2.0 +; GREEDY942-NEXT: v_mov_b32_e32 v66, 0 ; GREEDY942-NEXT: s_waitcnt lgkmcnt(0) ; GREEDY942-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0 ; GREEDY942-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40 @@ -383,19 +384,18 @@ define amdgpu_kernel void @test_mfma_f32_32x32x1f32(ptr addrspace(1) %arg) #0 { ; GREEDY942-NEXT: v_mov_b32_e32 v29, v59 ; GREEDY942-NEXT: v_mov_b32_e32 v30, v60 ; GREEDY942-NEXT: v_mov_b32_e32 v31, v61 -; GREEDY942-NEXT: v_mov_b32_e32 v32, 0 -; GREEDY942-NEXT: s_nop 0 +; GREEDY942-NEXT: s_nop 1 ; GREEDY942-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v64, v65, v[0:31] ; GREEDY942-NEXT: s_nop 15 ; GREEDY942-NEXT: s_nop 1 -; GREEDY942-NEXT: global_store_dwordx4 v32, v[24:27], s[34:35] offset:96 -; GREEDY942-NEXT: global_store_dwordx4 v32, v[28:31], s[34:35] offset:112 -; GREEDY942-NEXT: global_store_dwordx4 v32, v[16:19], s[34:35] offset:64 -; GREEDY942-NEXT: global_store_dwordx4 v32, v[20:23], s[34:35] offset:80 -; GREEDY942-NEXT: global_store_dwordx4 v32, v[8:11], s[34:35] offset:32 -; GREEDY942-NEXT: global_store_dwordx4 v32, v[12:15], s[34:35] offset:48 -; GREEDY942-NEXT: global_store_dwordx4 v32, v[0:3], s[34:35] -; GREEDY942-NEXT: global_store_dwordx4 v32, v[4:7], s[34:35] offset:16 +; GREEDY942-NEXT: global_store_dwordx4 v66, v[24:27], s[34:35] offset:96 +; GREEDY942-NEXT: global_store_dwordx4 v66, v[28:31], s[34:35] offset:112 +; GREEDY942-NEXT: global_store_dwordx4 v66, v[16:19], s[34:35] offset:64 +; GREEDY942-NEXT: global_store_dwordx4 v66, v[20:23], s[34:35] offset:80 +; GREEDY942-NEXT: global_store_dwordx4 v66, v[8:11], s[34:35] offset:32 +; GREEDY942-NEXT: global_store_dwordx4 v66, v[12:15], s[34:35] offset:48 +; GREEDY942-NEXT: global_store_dwordx4 v66, v[0:3], s[34:35] +; GREEDY942-NEXT: global_store_dwordx4 v66, v[4:7], s[34:35] offset:16 ; GREEDY942-NEXT: s_endpgm ; ; GREEDY90A-GISEL-LABEL: test_mfma_f32_32x32x1f32: diff --git a/llvm/test/CodeGen/AMDGPU/mul.ll b/llvm/test/CodeGen/AMDGPU/mul.ll index d10e4511a5c6a..7d0ee360b7c67 100644 --- a/llvm/test/CodeGen/AMDGPU/mul.ll +++ b/llvm/test/CodeGen/AMDGPU/mul.ll @@ -3767,37 +3767,37 @@ define amdgpu_kernel void @v_mul_i128(ptr addrspace(1) %out, ptr addrspace(1) %a ; VI: ; %bb.0: ; %entry ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c ; VI-NEXT: v_lshlrev_b32_e32 v2, 4, v0 -; VI-NEXT: v_mov_b32_e32 v10, 0 +; VI-NEXT: v_mov_b32_e32 v9, 0 ; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v2 ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_mov_b32_e32 v3, s3 -; VI-NEXT: v_add_u32_e32 v12, vcc, s2, v2 -; VI-NEXT: v_addc_u32_e32 v13, vcc, 0, v3, vcc +; VI-NEXT: v_add_u32_e32 v11, vcc, s2, v2 +; VI-NEXT: v_addc_u32_e32 v12, vcc, 0, v3, vcc ; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] -; VI-NEXT: flat_load_dwordx4 v[4:7], v[12:13] +; VI-NEXT: flat_load_dwordx4 v[4:7], v[11:12] ; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: v_mul_lo_u32 v3, v4, v3 -; VI-NEXT: v_mad_u64_u32 v[14:15], s[0:1], v4, v2, 0 -; VI-NEXT: v_mad_u64_u32 v[8:9], s[0:1], v0, v4, 0 -; VI-NEXT: v_mul_lo_u32 v11, v5, v2 -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v3 -; VI-NEXT: v_mad_u64_u32 v[2:3], s[0:1], v1, v4, v[9:10] -; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v11 -; VI-NEXT: v_mul_lo_u32 v4, v7, v0 -; VI-NEXT: v_mul_lo_u32 v11, v6, v1 -; VI-NEXT: v_mad_u64_u32 v[6:7], s[0:1], v6, v0, v[14:15] -; VI-NEXT: v_mov_b32_e32 v9, v2 -; VI-NEXT: v_mad_u64_u32 v[9:10], s[0:1], v0, v5, v[9:10] -; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v7 -; VI-NEXT: v_add_u32_e32 v2, vcc, v3, v10 +; VI-NEXT: v_mad_u64_u32 v[13:14], s[0:1], v4, v2, 0 +; VI-NEXT: v_mul_lo_u32 v15, v7, v0 +; VI-NEXT: v_mad_u64_u32 v[7:8], s[0:1], v0, v4, 0 +; VI-NEXT: v_mul_lo_u32 v10, v5, v2 +; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v3 +; VI-NEXT: v_mad_u64_u32 v[2:3], s[0:1], v1, v4, v[8:9] +; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v10 +; VI-NEXT: v_mad_u64_u32 v[13:14], s[0:1], v6, v0, v[13:14] +; VI-NEXT: v_mov_b32_e32 v8, v2 +; VI-NEXT: v_mad_u64_u32 v[8:9], s[0:1], v0, v5, v[8:9] +; VI-NEXT: v_mul_lo_u32 v16, v6, v1 +; VI-NEXT: v_add_u32_e32 v4, vcc, v15, v14 +; VI-NEXT: v_add_u32_e32 v2, vcc, v3, v9 ; VI-NEXT: v_addc_u32_e64 v3, s[0:1], 0, 0, vcc ; VI-NEXT: v_mad_u64_u32 v[0:1], s[0:1], v1, v5, v[2:3] -; VI-NEXT: v_add_u32_e32 v2, vcc, v11, v4 -; VI-NEXT: v_add_u32_e32 v10, vcc, v0, v6 -; VI-NEXT: v_addc_u32_e32 v11, vcc, v1, v2, vcc -; VI-NEXT: flat_store_dwordx4 v[12:13], v[8:11] +; VI-NEXT: v_add_u32_e32 v2, vcc, v16, v4 +; VI-NEXT: v_add_u32_e32 v9, vcc, v0, v13 +; VI-NEXT: v_addc_u32_e32 v10, vcc, v1, v2, vcc +; VI-NEXT: flat_store_dwordx4 v[11:12], v[7:10] ; VI-NEXT: s_endpgm ; ; GFX9-LABEL: v_mul_i128: @@ -3815,15 +3815,15 @@ define amdgpu_kernel void @v_mul_i128(ptr addrspace(1) %out, ptr addrspace(1) %a ; GFX9-NEXT: v_mad_u64_u32 v[2:3], s[0:1], v4, v2, 0 ; GFX9-NEXT: v_mad_u64_u32 v[11:12], s[0:1], v1, v4, v[9:10] ; GFX9-NEXT: v_mul_lo_u32 v4, v6, v1 +; GFX9-NEXT: v_mul_lo_u32 v16, v7, v0 ; GFX9-NEXT: v_add3_u32 v3, v3, v15, v14 ; GFX9-NEXT: v_mov_b32_e32 v9, v11 ; GFX9-NEXT: v_mad_u64_u32 v[9:10], s[0:1], v0, v5, v[9:10] ; GFX9-NEXT: v_mad_u64_u32 v[2:3], s[0:1], v6, v0, v[2:3] -; GFX9-NEXT: v_mul_lo_u32 v11, v7, v0 ; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, v12, v10 ; GFX9-NEXT: v_addc_co_u32_e64 v7, s[0:1], 0, 0, vcc ; GFX9-NEXT: v_mad_u64_u32 v[0:1], s[0:1], v1, v5, v[6:7] -; GFX9-NEXT: v_add3_u32 v3, v11, v3, v4 +; GFX9-NEXT: v_add3_u32 v3, v16, v3, v4 ; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, v0, v2 ; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, v1, v3, vcc ; GFX9-NEXT: global_store_dwordx4 v13, v[8:11], s[2:3] diff --git a/llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll b/llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll index 57981d1763959..7a1501c7725e0 100644 --- a/llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll +++ b/llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll @@ -73,22 +73,22 @@ define void @lsr_order_mul24_1(i32 %arg, i32 %arg1, i32 %arg2, ptr addrspace(3) ; GFX9-NEXT: .LBB1_2: ; %bb23 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: v_cvt_f32_u32_e32 v3, v0 +; GFX9-NEXT: v_add_u32_e32 v18, v9, v0 ; GFX9-NEXT: v_add_u32_e32 v12, v17, v0 +; GFX9-NEXT: v_add_u32_e32 v0, v0, v2 ; GFX9-NEXT: v_madak_f32 v3, v3, v7, 0x3727c5ac ; GFX9-NEXT: v_cvt_u32_f32_e32 v3, v3 -; GFX9-NEXT: v_mul_u32_u24_e32 v18, v3, v5 -; GFX9-NEXT: v_add_u32_e32 v19, v3, v16 -; GFX9-NEXT: v_add_u32_e32 v3, v9, v0 -; GFX9-NEXT: v_sub_u32_e32 v3, v3, v18 -; GFX9-NEXT: v_sub_u32_e32 v12, v12, v18 -; GFX9-NEXT: v_cmp_lt_u32_e64 s[4:5], v19, v13 -; GFX9-NEXT: v_mad_u64_u32 v[18:19], s[6:7], v19, v15, v[3:4] +; GFX9-NEXT: v_mul_u32_u24_e32 v19, v3, v5 +; GFX9-NEXT: v_add_u32_e32 v20, v3, v16 +; GFX9-NEXT: v_sub_u32_e32 v3, v18, v19 +; GFX9-NEXT: v_sub_u32_e32 v12, v12, v19 +; GFX9-NEXT: v_mad_u64_u32 v[18:19], s[6:7], v20, v15, v[3:4] +; GFX9-NEXT: v_cmp_lt_u32_e64 s[4:5], v20, v13 ; GFX9-NEXT: v_cmp_lt_u32_e64 s[6:7], v12, v14 ; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], s[6:7] ; GFX9-NEXT: s_and_b64 s[4:5], s[4:5], vcc ; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, v18, s[4:5] ; GFX9-NEXT: v_lshlrev_b64 v[18:19], 2, v[3:4] -; GFX9-NEXT: v_add_u32_e32 v0, v0, v2 ; GFX9-NEXT: v_add_co_u32_e64 v18, s[6:7], v10, v18 ; GFX9-NEXT: v_addc_co_u32_e64 v19, s[6:7], v11, v19, s[6:7] ; GFX9-NEXT: global_load_dword v3, v[18:19], off diff --git a/llvm/test/CodeGen/AMDGPU/packed-fp32.ll b/llvm/test/CodeGen/AMDGPU/packed-fp32.ll index dca6ad5efa859..80872e707b59b 100644 --- a/llvm/test/CodeGen/AMDGPU/packed-fp32.ll +++ b/llvm/test/CodeGen/AMDGPU/packed-fp32.ll @@ -188,64 +188,66 @@ define amdgpu_kernel void @fadd_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX900-LABEL: fadd_v32_vs: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; GFX900-NEXT: v_lshlrev_b32_e32 v0, 7, v0 -; GFX900-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa4 +; GFX900-NEXT: v_lshlrev_b32_e32 v16, 7, v0 ; GFX900-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe4 ; GFX900-NEXT: s_waitcnt lgkmcnt(0) -; GFX900-NEXT: global_load_dwordx4 v[25:28], v0, s[0:1] offset:112 -; GFX900-NEXT: global_load_dwordx4 v[29:32], v0, s[0:1] offset:96 -; GFX900-NEXT: global_load_dwordx4 v[1:4], v0, s[0:1] offset:16 -; GFX900-NEXT: global_load_dwordx4 v[5:8], v0, s[0:1] -; GFX900-NEXT: global_load_dwordx4 v[9:12], v0, s[0:1] offset:48 -; GFX900-NEXT: global_load_dwordx4 v[13:16], v0, s[0:1] offset:32 -; GFX900-NEXT: global_load_dwordx4 v[17:20], v0, s[0:1] offset:80 -; GFX900-NEXT: global_load_dwordx4 v[21:24], v0, s[0:1] offset:64 -; GFX900-NEXT: s_waitcnt vmcnt(5) -; GFX900-NEXT: v_add_f32_e32 v4, s43, v4 -; GFX900-NEXT: v_add_f32_e32 v3, s42, v3 -; GFX900-NEXT: v_add_f32_e32 v2, s41, v2 -; GFX900-NEXT: v_add_f32_e32 v1, s40, v1 -; GFX900-NEXT: v_add_f32_e32 v32, s19, v32 -; GFX900-NEXT: v_add_f32_e32 v31, s18, v31 -; GFX900-NEXT: v_add_f32_e32 v30, s17, v30 -; GFX900-NEXT: v_add_f32_e32 v29, s16, v29 -; GFX900-NEXT: s_waitcnt vmcnt(4) -; GFX900-NEXT: v_add_f32_e32 v8, s39, v8 -; GFX900-NEXT: v_add_f32_e32 v7, s38, v7 -; GFX900-NEXT: v_add_f32_e32 v6, s37, v6 -; GFX900-NEXT: v_add_f32_e32 v5, s36, v5 +; GFX900-NEXT: global_load_dwordx4 v[0:3], v16, s[0:1] offset:112 +; GFX900-NEXT: global_load_dwordx4 v[4:7], v16, s[0:1] offset:96 +; GFX900-NEXT: global_load_dwordx4 v[8:11], v16, s[0:1] offset:64 +; GFX900-NEXT: global_load_dwordx4 v[12:15], v16, s[0:1] offset:80 ; GFX900-NEXT: s_waitcnt vmcnt(3) -; GFX900-NEXT: v_add_f32_e32 v12, s51, v12 -; GFX900-NEXT: v_add_f32_e32 v11, s50, v11 -; GFX900-NEXT: v_add_f32_e32 v10, s49, v10 -; GFX900-NEXT: v_add_f32_e32 v9, s48, v9 -; GFX900-NEXT: s_waitcnt vmcnt(2) -; GFX900-NEXT: v_add_f32_e32 v16, s47, v16 -; GFX900-NEXT: v_add_f32_e32 v15, s46, v15 -; GFX900-NEXT: v_add_f32_e32 v14, s45, v14 -; GFX900-NEXT: v_add_f32_e32 v13, s44, v13 +; GFX900-NEXT: v_add_f32_e32 v3, s23, v3 +; GFX900-NEXT: v_add_f32_e32 v2, s22, v2 ; GFX900-NEXT: s_waitcnt vmcnt(1) -; GFX900-NEXT: v_add_f32_e32 v20, s15, v20 -; GFX900-NEXT: v_add_f32_e32 v19, s14, v19 -; GFX900-NEXT: v_add_f32_e32 v18, s13, v18 -; GFX900-NEXT: v_add_f32_e32 v17, s12, v17 +; GFX900-NEXT: v_add_f32_e32 v11, s11, v11 +; GFX900-NEXT: v_add_f32_e32 v10, s10, v10 +; GFX900-NEXT: v_add_f32_e32 v9, s9, v9 +; GFX900-NEXT: v_add_f32_e32 v8, s8, v8 +; GFX900-NEXT: s_waitcnt vmcnt(0) +; GFX900-NEXT: v_add_f32_e32 v15, s15, v15 +; GFX900-NEXT: v_add_f32_e32 v14, s14, v14 +; GFX900-NEXT: v_add_f32_e32 v13, s13, v13 +; GFX900-NEXT: v_add_f32_e32 v12, s12, v12 +; GFX900-NEXT: v_add_f32_e32 v1, s21, v1 +; GFX900-NEXT: v_add_f32_e32 v0, s20, v0 +; GFX900-NEXT: v_add_f32_e32 v7, s19, v7 +; GFX900-NEXT: v_add_f32_e32 v6, s18, v6 +; GFX900-NEXT: v_add_f32_e32 v5, s17, v5 +; GFX900-NEXT: v_add_f32_e32 v4, s16, v4 +; GFX900-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:64 +; GFX900-NEXT: global_load_dwordx4 v[8:11], v16, s[0:1] offset:48 +; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1] offset:96 +; GFX900-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1] offset:112 +; GFX900-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1] offset:80 +; GFX900-NEXT: global_load_dwordx4 v[12:15], v16, s[0:1] offset:32 +; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: global_load_dwordx4 v[0:3], v16, s[0:1] +; GFX900-NEXT: global_load_dwordx4 v[4:7], v16, s[0:1] offset:16 +; GFX900-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xa4 +; GFX900-NEXT: s_waitcnt vmcnt(6) lgkmcnt(0) +; GFX900-NEXT: v_add_f32_e32 v11, s23, v11 +; GFX900-NEXT: v_add_f32_e32 v10, s22, v10 +; GFX900-NEXT: v_add_f32_e32 v9, s21, v9 +; GFX900-NEXT: s_waitcnt vmcnt(2) +; GFX900-NEXT: v_add_f32_e32 v15, s19, v15 +; GFX900-NEXT: v_add_f32_e32 v14, s18, v14 +; GFX900-NEXT: v_add_f32_e32 v13, s17, v13 +; GFX900-NEXT: v_add_f32_e32 v12, s16, v12 ; GFX900-NEXT: s_waitcnt vmcnt(0) -; GFX900-NEXT: v_add_f32_e32 v24, s11, v24 -; GFX900-NEXT: v_add_f32_e32 v23, s10, v23 -; GFX900-NEXT: v_add_f32_e32 v22, s9, v22 -; GFX900-NEXT: v_add_f32_e32 v21, s8, v21 -; GFX900-NEXT: v_add_f32_e32 v28, s23, v28 -; GFX900-NEXT: v_add_f32_e32 v27, s22, v27 -; GFX900-NEXT: v_add_f32_e32 v26, s21, v26 -; GFX900-NEXT: v_add_f32_e32 v25, s20, v25 -; GFX900-NEXT: global_store_dwordx4 v0, v[29:32], s[0:1] offset:96 -; GFX900-NEXT: global_store_dwordx4 v0, v[25:28], s[0:1] offset:112 -; GFX900-NEXT: global_store_dwordx4 v0, v[21:24], s[0:1] offset:64 -; GFX900-NEXT: global_store_dwordx4 v0, v[17:20], s[0:1] offset:80 -; GFX900-NEXT: global_store_dwordx4 v0, v[13:16], s[0:1] offset:32 -; GFX900-NEXT: global_store_dwordx4 v0, v[9:12], s[0:1] offset:48 -; GFX900-NEXT: global_store_dwordx4 v0, v[5:8], s[0:1] -; GFX900-NEXT: global_store_dwordx4 v0, v[1:4], s[0:1] offset:16 +; GFX900-NEXT: v_add_f32_e32 v7, s15, v7 +; GFX900-NEXT: v_add_f32_e32 v6, s14, v6 +; GFX900-NEXT: v_add_f32_e32 v5, s13, v5 +; GFX900-NEXT: v_add_f32_e32 v4, s12, v4 +; GFX900-NEXT: v_add_f32_e32 v3, s11, v3 +; GFX900-NEXT: v_add_f32_e32 v2, s10, v2 +; GFX900-NEXT: v_add_f32_e32 v1, s9, v1 +; GFX900-NEXT: v_add_f32_e32 v0, s8, v0 +; GFX900-NEXT: v_add_f32_e32 v8, s20, v8 +; GFX900-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1] offset:32 +; GFX900-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:48 +; GFX900-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1] +; GFX900-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1] offset:16 ; GFX900-NEXT: s_endpgm ; ; PACKED-SDAG-LABEL: fadd_v32_vs: @@ -354,21 +356,21 @@ define amdgpu_kernel void @fadd_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-SDAG-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4 nv ; GFX1250-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0xe4 nv ; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-SDAG-NEXT: v_lshlrev_b32_e32 v56, 7, v0 +; GFX1250-SDAG-NEXT: v_lshlrev_b32_e32 v60, 7, v0 ; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-NEXT: s_clause 0x7 -; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v56, s[0:1] offset:16 -; GFX1250-SDAG-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:48 -; GFX1250-SDAG-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:32 -; GFX1250-SDAG-NEXT: global_load_b128 v[12:15], v56, s[0:1] -; GFX1250-SDAG-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:80 -; GFX1250-SDAG-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:96 -; GFX1250-SDAG-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:64 -; GFX1250-SDAG-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:112 -; GFX1250-SDAG-NEXT: v_dual_mov_b32 v32, s40 :: v_dual_mov_b32 v33, s41 +; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v60, s[0:1] offset:16 +; GFX1250-SDAG-NEXT: global_load_b128 v[4:7], v60, s[0:1] +; GFX1250-SDAG-NEXT: global_load_b128 v[8:11], v60, s[0:1] offset:48 +; GFX1250-SDAG-NEXT: global_load_b128 v[12:15], v60, s[0:1] offset:32 +; GFX1250-SDAG-NEXT: global_load_b128 v[16:19], v60, s[0:1] offset:80 +; GFX1250-SDAG-NEXT: global_load_b128 v[20:23], v60, s[0:1] offset:64 +; GFX1250-SDAG-NEXT: global_load_b128 v[24:27], v60, s[0:1] offset:112 +; GFX1250-SDAG-NEXT: global_load_b128 v[28:31], v60, s[0:1] offset:96 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v34, s42 :: v_dual_mov_b32 v35, s43 -; GFX1250-SDAG-NEXT: v_dual_mov_b32 v40, s50 :: v_dual_mov_b32 v41, s51 -; GFX1250-SDAG-NEXT: v_dual_mov_b32 v38, s48 :: v_dual_mov_b32 v39, s49 +; GFX1250-SDAG-NEXT: v_dual_mov_b32 v32, s40 :: v_dual_mov_b32 v33, s41 +; GFX1250-SDAG-NEXT: v_dual_mov_b32 v56, s16 :: v_dual_mov_b32 v57, s17 +; GFX1250-SDAG-NEXT: v_dual_mov_b32 v58, s18 :: v_dual_mov_b32 v59, s19 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v52, s20 :: v_dual_mov_b32 v53, s21 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v54, s22 :: v_dual_mov_b32 v55, s23 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v50, s10 :: v_dual_mov_b32 v51, s11 @@ -377,39 +379,40 @@ define amdgpu_kernel void @fadd_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v42, s44 :: v_dual_mov_b32 v43, s45 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v44, s46 :: v_dual_mov_b32 v45, s47 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v36, s38 :: v_dual_mov_b32 v37, s39 +; GFX1250-SDAG-NEXT: v_dual_mov_b32 v38, s48 :: v_dual_mov_b32 v39, s49 +; GFX1250-SDAG-NEXT: v_dual_mov_b32 v40, s50 :: v_dual_mov_b32 v41, s51 ; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x7 -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[32:33] ; GFX1250-SDAG-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[34:35] -; GFX1250-SDAG-NEXT: v_dual_mov_b32 v32, s16 :: v_dual_mov_b32 v33, s17 -; GFX1250-SDAG-NEXT: v_dual_mov_b32 v34, s18 :: v_dual_mov_b32 v35, s19 -; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x6 -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[6:7], v[6:7], v[40:41] -; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[40:41], s[8:9] -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[4:5], v[4:5], v[38:39] -; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[38:39], s[36:37] +; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[34:35], s[8:9] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[32:33] +; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[32:33], s[36:37] +; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x3 +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[16:17], v[16:17], v[46:47] ; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x2 -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[20:21], v[20:21], v[32:33] -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[22:23], v[22:23], v[34:35] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[22:23], v[22:23], v[50:51] +; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x1 +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[24:25], v[24:25], v[52:53] ; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0 -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[28:29], v[28:29], v[52:53] -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[30:31], v[30:31], v[54:55] -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[26:27], v[26:27], v[50:51] -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[24:25], v[24:25], v[40:41] -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[16:17], v[16:17], v[46:47] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[28:29], v[28:29], v[56:57] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[30:31], v[30:31], v[58:59] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[26:27], v[26:27], v[54:55] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[20:21], v[20:21], v[34:35] ; GFX1250-SDAG-NEXT: v_pk_add_f32 v[18:19], v[18:19], v[48:49] -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[8:9], v[8:9], v[42:43] -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[10:11], v[10:11], v[44:45] -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[14:15], v[14:15], v[36:37] -; GFX1250-SDAG-NEXT: v_pk_add_f32 v[12:13], v[12:13], v[38:39] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[12:13], v[12:13], v[42:43] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[14:15], v[14:15], v[44:45] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[6:7], v[6:7], v[36:37] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[8:9], v[8:9], v[38:39] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[10:11], v[10:11], v[40:41] +; GFX1250-SDAG-NEXT: v_pk_add_f32 v[4:5], v[4:5], v[32:33] ; GFX1250-SDAG-NEXT: s_clause 0x7 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:96 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:112 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:64 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:80 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:32 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:48 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[12:15], s[0:1] -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[0:3], s[0:1] offset:16 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[28:31], s[0:1] offset:96 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[24:27], s[0:1] offset:112 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[20:23], s[0:1] offset:64 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[16:19], s[0:1] offset:80 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[12:15], s[0:1] offset:32 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[8:11], s[0:1] offset:48 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[4:7], s[0:1] +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[0:3], s[0:1] offset:16 ; GFX1250-SDAG-NEXT: s_endpgm ; ; GFX1250-GISEL-LABEL: fadd_v32_vs: @@ -421,17 +424,17 @@ define amdgpu_kernel void @fadd_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-GISEL-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4 nv ; GFX1250-GISEL-NEXT: s_load_b512 s[8:23], s[4:5], 0xe4 nv ; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v56, 7, v0 +; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v58, 7, v0 ; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0 ; GFX1250-GISEL-NEXT: s_clause 0x7 -; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v56, s[0:1] -; GFX1250-GISEL-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:16 -; GFX1250-GISEL-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:32 -; GFX1250-GISEL-NEXT: global_load_b128 v[12:15], v56, s[0:1] offset:48 -; GFX1250-GISEL-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:64 -; GFX1250-GISEL-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:80 -; GFX1250-GISEL-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:96 -; GFX1250-GISEL-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:112 +; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v58, s[0:1] +; GFX1250-GISEL-NEXT: global_load_b128 v[4:7], v58, s[0:1] offset:16 +; GFX1250-GISEL-NEXT: global_load_b128 v[8:11], v58, s[0:1] offset:32 +; GFX1250-GISEL-NEXT: global_load_b128 v[12:15], v58, s[0:1] offset:48 +; GFX1250-GISEL-NEXT: global_load_b128 v[16:19], v58, s[0:1] offset:64 +; GFX1250-GISEL-NEXT: global_load_b128 v[20:23], v58, s[0:1] offset:80 +; GFX1250-GISEL-NEXT: global_load_b128 v[24:27], v58, s[0:1] offset:96 +; GFX1250-GISEL-NEXT: global_load_b128 v[28:31], v58, s[0:1] offset:112 ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[36:37] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[38:39] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[40:41] @@ -444,16 +447,16 @@ define amdgpu_kernel void @fadd_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[50:51], s[10:11] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[52:53], s[12:13] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[54:55], s[14:15] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[56:57], s[16:17] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x7 ; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[32:33] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[18:19] ; GFX1250-GISEL-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[34:35] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[16:17] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[18:19] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[20:21] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x6 ; GFX1250-GISEL-NEXT: v_pk_add_f32 v[4:5], v[4:5], v[36:37] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[22:23] ; GFX1250-GISEL-NEXT: v_pk_add_f32 v[6:7], v[6:7], v[38:39] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[20:21] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[38:39], s[22:23] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x5 ; GFX1250-GISEL-NEXT: v_pk_add_f32 v[8:9], v[8:9], v[40:41] ; GFX1250-GISEL-NEXT: v_pk_add_f32 v[10:11], v[10:11], v[42:43] @@ -467,20 +470,20 @@ define amdgpu_kernel void @fadd_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-GISEL-NEXT: v_pk_add_f32 v[20:21], v[20:21], v[52:53] ; GFX1250-GISEL-NEXT: v_pk_add_f32 v[22:23], v[22:23], v[54:55] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x1 -; GFX1250-GISEL-NEXT: v_pk_add_f32 v[24:25], v[24:25], v[32:33] -; GFX1250-GISEL-NEXT: v_pk_add_f32 v[26:27], v[26:27], v[34:35] +; GFX1250-GISEL-NEXT: v_pk_add_f32 v[24:25], v[24:25], v[56:57] +; GFX1250-GISEL-NEXT: v_pk_add_f32 v[26:27], v[26:27], v[32:33] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0 -; GFX1250-GISEL-NEXT: v_pk_add_f32 v[28:29], v[28:29], v[36:37] -; GFX1250-GISEL-NEXT: v_pk_add_f32 v[30:31], v[30:31], v[38:39] +; GFX1250-GISEL-NEXT: v_pk_add_f32 v[28:29], v[28:29], v[34:35] +; GFX1250-GISEL-NEXT: v_pk_add_f32 v[30:31], v[30:31], v[36:37] ; GFX1250-GISEL-NEXT: s_clause 0x7 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[0:3], s[0:1] -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:16 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:32 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[12:15], s[0:1] offset:48 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:64 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:80 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:96 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:112 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[0:3], s[0:1] +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[4:7], s[0:1] offset:16 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[8:11], s[0:1] offset:32 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[12:15], s[0:1] offset:48 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[16:19], s[0:1] offset:64 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[20:23], s[0:1] offset:80 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[24:27], s[0:1] offset:96 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[28:31], s[0:1] offset:112 ; GFX1250-GISEL-NEXT: s_endpgm %id = tail call i32 @llvm.amdgcn.workitem.id.x() %gep = getelementptr inbounds <32 x float>, ptr addrspace(1) %a, i32 %id @@ -1552,64 +1555,66 @@ define amdgpu_kernel void @fmul_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX900-LABEL: fmul_v32_vs: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; GFX900-NEXT: v_lshlrev_b32_e32 v0, 7, v0 -; GFX900-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa4 +; GFX900-NEXT: v_lshlrev_b32_e32 v16, 7, v0 ; GFX900-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe4 ; GFX900-NEXT: s_waitcnt lgkmcnt(0) -; GFX900-NEXT: global_load_dwordx4 v[25:28], v0, s[0:1] offset:112 -; GFX900-NEXT: global_load_dwordx4 v[29:32], v0, s[0:1] offset:96 -; GFX900-NEXT: global_load_dwordx4 v[1:4], v0, s[0:1] offset:16 -; GFX900-NEXT: global_load_dwordx4 v[5:8], v0, s[0:1] -; GFX900-NEXT: global_load_dwordx4 v[9:12], v0, s[0:1] offset:48 -; GFX900-NEXT: global_load_dwordx4 v[13:16], v0, s[0:1] offset:32 -; GFX900-NEXT: global_load_dwordx4 v[17:20], v0, s[0:1] offset:80 -; GFX900-NEXT: global_load_dwordx4 v[21:24], v0, s[0:1] offset:64 -; GFX900-NEXT: s_waitcnt vmcnt(5) -; GFX900-NEXT: v_mul_f32_e32 v4, s43, v4 -; GFX900-NEXT: v_mul_f32_e32 v3, s42, v3 -; GFX900-NEXT: v_mul_f32_e32 v2, s41, v2 -; GFX900-NEXT: v_mul_f32_e32 v1, s40, v1 -; GFX900-NEXT: v_mul_f32_e32 v32, s19, v32 -; GFX900-NEXT: v_mul_f32_e32 v31, s18, v31 -; GFX900-NEXT: v_mul_f32_e32 v30, s17, v30 -; GFX900-NEXT: v_mul_f32_e32 v29, s16, v29 -; GFX900-NEXT: s_waitcnt vmcnt(4) -; GFX900-NEXT: v_mul_f32_e32 v8, s39, v8 -; GFX900-NEXT: v_mul_f32_e32 v7, s38, v7 -; GFX900-NEXT: v_mul_f32_e32 v6, s37, v6 -; GFX900-NEXT: v_mul_f32_e32 v5, s36, v5 +; GFX900-NEXT: global_load_dwordx4 v[0:3], v16, s[0:1] offset:112 +; GFX900-NEXT: global_load_dwordx4 v[4:7], v16, s[0:1] offset:96 +; GFX900-NEXT: global_load_dwordx4 v[8:11], v16, s[0:1] offset:64 +; GFX900-NEXT: global_load_dwordx4 v[12:15], v16, s[0:1] offset:80 ; GFX900-NEXT: s_waitcnt vmcnt(3) -; GFX900-NEXT: v_mul_f32_e32 v12, s51, v12 -; GFX900-NEXT: v_mul_f32_e32 v11, s50, v11 -; GFX900-NEXT: v_mul_f32_e32 v10, s49, v10 -; GFX900-NEXT: v_mul_f32_e32 v9, s48, v9 -; GFX900-NEXT: s_waitcnt vmcnt(2) -; GFX900-NEXT: v_mul_f32_e32 v16, s47, v16 -; GFX900-NEXT: v_mul_f32_e32 v15, s46, v15 -; GFX900-NEXT: v_mul_f32_e32 v14, s45, v14 -; GFX900-NEXT: v_mul_f32_e32 v13, s44, v13 +; GFX900-NEXT: v_mul_f32_e32 v3, s23, v3 +; GFX900-NEXT: v_mul_f32_e32 v2, s22, v2 ; GFX900-NEXT: s_waitcnt vmcnt(1) -; GFX900-NEXT: v_mul_f32_e32 v20, s15, v20 -; GFX900-NEXT: v_mul_f32_e32 v19, s14, v19 -; GFX900-NEXT: v_mul_f32_e32 v18, s13, v18 -; GFX900-NEXT: v_mul_f32_e32 v17, s12, v17 +; GFX900-NEXT: v_mul_f32_e32 v11, s11, v11 +; GFX900-NEXT: v_mul_f32_e32 v10, s10, v10 +; GFX900-NEXT: v_mul_f32_e32 v9, s9, v9 +; GFX900-NEXT: v_mul_f32_e32 v8, s8, v8 ; GFX900-NEXT: s_waitcnt vmcnt(0) -; GFX900-NEXT: v_mul_f32_e32 v24, s11, v24 -; GFX900-NEXT: v_mul_f32_e32 v23, s10, v23 -; GFX900-NEXT: v_mul_f32_e32 v22, s9, v22 -; GFX900-NEXT: v_mul_f32_e32 v21, s8, v21 -; GFX900-NEXT: v_mul_f32_e32 v28, s23, v28 -; GFX900-NEXT: v_mul_f32_e32 v27, s22, v27 -; GFX900-NEXT: v_mul_f32_e32 v26, s21, v26 -; GFX900-NEXT: v_mul_f32_e32 v25, s20, v25 -; GFX900-NEXT: global_store_dwordx4 v0, v[29:32], s[0:1] offset:96 -; GFX900-NEXT: global_store_dwordx4 v0, v[25:28], s[0:1] offset:112 -; GFX900-NEXT: global_store_dwordx4 v0, v[21:24], s[0:1] offset:64 -; GFX900-NEXT: global_store_dwordx4 v0, v[17:20], s[0:1] offset:80 -; GFX900-NEXT: global_store_dwordx4 v0, v[13:16], s[0:1] offset:32 -; GFX900-NEXT: global_store_dwordx4 v0, v[9:12], s[0:1] offset:48 -; GFX900-NEXT: global_store_dwordx4 v0, v[5:8], s[0:1] -; GFX900-NEXT: global_store_dwordx4 v0, v[1:4], s[0:1] offset:16 +; GFX900-NEXT: v_mul_f32_e32 v15, s15, v15 +; GFX900-NEXT: v_mul_f32_e32 v14, s14, v14 +; GFX900-NEXT: v_mul_f32_e32 v13, s13, v13 +; GFX900-NEXT: v_mul_f32_e32 v12, s12, v12 +; GFX900-NEXT: v_mul_f32_e32 v1, s21, v1 +; GFX900-NEXT: v_mul_f32_e32 v0, s20, v0 +; GFX900-NEXT: v_mul_f32_e32 v7, s19, v7 +; GFX900-NEXT: v_mul_f32_e32 v6, s18, v6 +; GFX900-NEXT: v_mul_f32_e32 v5, s17, v5 +; GFX900-NEXT: v_mul_f32_e32 v4, s16, v4 +; GFX900-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:64 +; GFX900-NEXT: global_load_dwordx4 v[8:11], v16, s[0:1] offset:48 +; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1] offset:96 +; GFX900-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1] offset:112 +; GFX900-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1] offset:80 +; GFX900-NEXT: global_load_dwordx4 v[12:15], v16, s[0:1] offset:32 +; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: global_load_dwordx4 v[0:3], v16, s[0:1] +; GFX900-NEXT: global_load_dwordx4 v[4:7], v16, s[0:1] offset:16 +; GFX900-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xa4 +; GFX900-NEXT: s_waitcnt vmcnt(6) lgkmcnt(0) +; GFX900-NEXT: v_mul_f32_e32 v11, s23, v11 +; GFX900-NEXT: v_mul_f32_e32 v10, s22, v10 +; GFX900-NEXT: v_mul_f32_e32 v9, s21, v9 +; GFX900-NEXT: s_waitcnt vmcnt(2) +; GFX900-NEXT: v_mul_f32_e32 v15, s19, v15 +; GFX900-NEXT: v_mul_f32_e32 v14, s18, v14 +; GFX900-NEXT: v_mul_f32_e32 v13, s17, v13 +; GFX900-NEXT: v_mul_f32_e32 v12, s16, v12 +; GFX900-NEXT: s_waitcnt vmcnt(0) +; GFX900-NEXT: v_mul_f32_e32 v7, s15, v7 +; GFX900-NEXT: v_mul_f32_e32 v6, s14, v6 +; GFX900-NEXT: v_mul_f32_e32 v5, s13, v5 +; GFX900-NEXT: v_mul_f32_e32 v4, s12, v4 +; GFX900-NEXT: v_mul_f32_e32 v3, s11, v3 +; GFX900-NEXT: v_mul_f32_e32 v2, s10, v2 +; GFX900-NEXT: v_mul_f32_e32 v1, s9, v1 +; GFX900-NEXT: v_mul_f32_e32 v0, s8, v0 +; GFX900-NEXT: v_mul_f32_e32 v8, s20, v8 +; GFX900-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1] offset:32 +; GFX900-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:48 +; GFX900-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1] +; GFX900-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1] offset:16 ; GFX900-NEXT: s_endpgm ; ; PACKED-SDAG-LABEL: fmul_v32_vs: @@ -1718,21 +1723,21 @@ define amdgpu_kernel void @fmul_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-SDAG-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4 nv ; GFX1250-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0xe4 nv ; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-SDAG-NEXT: v_lshlrev_b32_e32 v56, 7, v0 +; GFX1250-SDAG-NEXT: v_lshlrev_b32_e32 v60, 7, v0 ; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-NEXT: s_clause 0x7 -; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v56, s[0:1] offset:16 -; GFX1250-SDAG-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:48 -; GFX1250-SDAG-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:32 -; GFX1250-SDAG-NEXT: global_load_b128 v[12:15], v56, s[0:1] -; GFX1250-SDAG-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:80 -; GFX1250-SDAG-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:96 -; GFX1250-SDAG-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:64 -; GFX1250-SDAG-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:112 -; GFX1250-SDAG-NEXT: v_dual_mov_b32 v32, s40 :: v_dual_mov_b32 v33, s41 +; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v60, s[0:1] offset:16 +; GFX1250-SDAG-NEXT: global_load_b128 v[4:7], v60, s[0:1] +; GFX1250-SDAG-NEXT: global_load_b128 v[8:11], v60, s[0:1] offset:48 +; GFX1250-SDAG-NEXT: global_load_b128 v[12:15], v60, s[0:1] offset:32 +; GFX1250-SDAG-NEXT: global_load_b128 v[16:19], v60, s[0:1] offset:80 +; GFX1250-SDAG-NEXT: global_load_b128 v[20:23], v60, s[0:1] offset:64 +; GFX1250-SDAG-NEXT: global_load_b128 v[24:27], v60, s[0:1] offset:112 +; GFX1250-SDAG-NEXT: global_load_b128 v[28:31], v60, s[0:1] offset:96 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v34, s42 :: v_dual_mov_b32 v35, s43 -; GFX1250-SDAG-NEXT: v_dual_mov_b32 v40, s50 :: v_dual_mov_b32 v41, s51 -; GFX1250-SDAG-NEXT: v_dual_mov_b32 v38, s48 :: v_dual_mov_b32 v39, s49 +; GFX1250-SDAG-NEXT: v_dual_mov_b32 v32, s40 :: v_dual_mov_b32 v33, s41 +; GFX1250-SDAG-NEXT: v_dual_mov_b32 v56, s16 :: v_dual_mov_b32 v57, s17 +; GFX1250-SDAG-NEXT: v_dual_mov_b32 v58, s18 :: v_dual_mov_b32 v59, s19 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v52, s20 :: v_dual_mov_b32 v53, s21 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v54, s22 :: v_dual_mov_b32 v55, s23 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v50, s10 :: v_dual_mov_b32 v51, s11 @@ -1741,39 +1746,40 @@ define amdgpu_kernel void @fmul_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v42, s44 :: v_dual_mov_b32 v43, s45 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v44, s46 :: v_dual_mov_b32 v45, s47 ; GFX1250-SDAG-NEXT: v_dual_mov_b32 v36, s38 :: v_dual_mov_b32 v37, s39 +; GFX1250-SDAG-NEXT: v_dual_mov_b32 v38, s48 :: v_dual_mov_b32 v39, s49 +; GFX1250-SDAG-NEXT: v_dual_mov_b32 v40, s50 :: v_dual_mov_b32 v41, s51 ; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x7 -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[32:33] ; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[2:3], v[2:3], v[34:35] -; GFX1250-SDAG-NEXT: v_dual_mov_b32 v32, s16 :: v_dual_mov_b32 v33, s17 -; GFX1250-SDAG-NEXT: v_dual_mov_b32 v34, s18 :: v_dual_mov_b32 v35, s19 -; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x6 -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[6:7], v[6:7], v[40:41] -; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[40:41], s[8:9] -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[4:5], v[4:5], v[38:39] -; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[38:39], s[36:37] +; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[34:35], s[8:9] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[32:33] +; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[32:33], s[36:37] +; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x3 +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[16:17], v[16:17], v[46:47] ; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x2 -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[20:21], v[20:21], v[32:33] -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[22:23], v[22:23], v[34:35] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[22:23], v[22:23], v[50:51] +; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x1 +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[24:25], v[24:25], v[52:53] ; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0 -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[28:29], v[28:29], v[52:53] -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[30:31], v[30:31], v[54:55] -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[26:27], v[26:27], v[50:51] -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[24:25], v[24:25], v[40:41] -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[16:17], v[16:17], v[46:47] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[28:29], v[28:29], v[56:57] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[30:31], v[30:31], v[58:59] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[26:27], v[26:27], v[54:55] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[20:21], v[20:21], v[34:35] ; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[18:19], v[18:19], v[48:49] -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[8:9], v[8:9], v[42:43] -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[10:11], v[10:11], v[44:45] -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[14:15], v[14:15], v[36:37] -; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[12:13], v[12:13], v[38:39] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[12:13], v[12:13], v[42:43] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[14:15], v[14:15], v[44:45] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[6:7], v[6:7], v[36:37] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[8:9], v[8:9], v[38:39] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[10:11], v[10:11], v[40:41] +; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[4:5], v[4:5], v[32:33] ; GFX1250-SDAG-NEXT: s_clause 0x7 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:96 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:112 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:64 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:80 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:32 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:48 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[12:15], s[0:1] -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[0:3], s[0:1] offset:16 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[28:31], s[0:1] offset:96 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[24:27], s[0:1] offset:112 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[20:23], s[0:1] offset:64 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[16:19], s[0:1] offset:80 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[12:15], s[0:1] offset:32 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[8:11], s[0:1] offset:48 +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[4:7], s[0:1] +; GFX1250-SDAG-NEXT: global_store_b128 v60, v[0:3], s[0:1] offset:16 ; GFX1250-SDAG-NEXT: s_endpgm ; ; GFX1250-GISEL-LABEL: fmul_v32_vs: @@ -1785,17 +1791,17 @@ define amdgpu_kernel void @fmul_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-GISEL-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4 nv ; GFX1250-GISEL-NEXT: s_load_b512 s[8:23], s[4:5], 0xe4 nv ; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v56, 7, v0 +; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v58, 7, v0 ; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0 ; GFX1250-GISEL-NEXT: s_clause 0x7 -; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v56, s[0:1] -; GFX1250-GISEL-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:16 -; GFX1250-GISEL-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:32 -; GFX1250-GISEL-NEXT: global_load_b128 v[12:15], v56, s[0:1] offset:48 -; GFX1250-GISEL-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:64 -; GFX1250-GISEL-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:80 -; GFX1250-GISEL-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:96 -; GFX1250-GISEL-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:112 +; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v58, s[0:1] +; GFX1250-GISEL-NEXT: global_load_b128 v[4:7], v58, s[0:1] offset:16 +; GFX1250-GISEL-NEXT: global_load_b128 v[8:11], v58, s[0:1] offset:32 +; GFX1250-GISEL-NEXT: global_load_b128 v[12:15], v58, s[0:1] offset:48 +; GFX1250-GISEL-NEXT: global_load_b128 v[16:19], v58, s[0:1] offset:64 +; GFX1250-GISEL-NEXT: global_load_b128 v[20:23], v58, s[0:1] offset:80 +; GFX1250-GISEL-NEXT: global_load_b128 v[24:27], v58, s[0:1] offset:96 +; GFX1250-GISEL-NEXT: global_load_b128 v[28:31], v58, s[0:1] offset:112 ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[36:37] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[38:39] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[40:41] @@ -1808,16 +1814,16 @@ define amdgpu_kernel void @fmul_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[50:51], s[10:11] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[52:53], s[12:13] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[54:55], s[14:15] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[56:57], s[16:17] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x7 ; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[32:33] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[18:19] ; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[2:3], v[2:3], v[34:35] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[16:17] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[18:19] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[20:21] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x6 ; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[4:5], v[4:5], v[36:37] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[22:23] ; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[6:7], v[6:7], v[38:39] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[20:21] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[38:39], s[22:23] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x5 ; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[8:9], v[8:9], v[40:41] ; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[10:11], v[10:11], v[42:43] @@ -1831,20 +1837,20 @@ define amdgpu_kernel void @fmul_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[20:21], v[20:21], v[52:53] ; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[22:23], v[22:23], v[54:55] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x1 -; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[24:25], v[24:25], v[32:33] -; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[26:27], v[26:27], v[34:35] +; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[24:25], v[24:25], v[56:57] +; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[26:27], v[26:27], v[32:33] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0 -; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[28:29], v[28:29], v[36:37] -; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[30:31], v[30:31], v[38:39] +; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[28:29], v[28:29], v[34:35] +; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[30:31], v[30:31], v[36:37] ; GFX1250-GISEL-NEXT: s_clause 0x7 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[0:3], s[0:1] -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:16 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:32 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[12:15], s[0:1] offset:48 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:64 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:80 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:96 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:112 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[0:3], s[0:1] +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[4:7], s[0:1] offset:16 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[8:11], s[0:1] offset:32 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[12:15], s[0:1] offset:48 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[16:19], s[0:1] offset:64 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[20:23], s[0:1] offset:80 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[24:27], s[0:1] offset:96 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[28:31], s[0:1] offset:112 ; GFX1250-GISEL-NEXT: s_endpgm %id = tail call i32 @llvm.amdgcn.workitem.id.x() %gep = getelementptr inbounds <32 x float>, ptr addrspace(1) %a, i32 %id @@ -2400,64 +2406,66 @@ define amdgpu_kernel void @fma_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX900-LABEL: fma_v32_vs: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 -; GFX900-NEXT: v_lshlrev_b32_e32 v0, 7, v0 -; GFX900-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa4 +; GFX900-NEXT: v_lshlrev_b32_e32 v16, 7, v0 ; GFX900-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe4 ; GFX900-NEXT: s_waitcnt lgkmcnt(0) -; GFX900-NEXT: global_load_dwordx4 v[25:28], v0, s[0:1] offset:112 -; GFX900-NEXT: global_load_dwordx4 v[29:32], v0, s[0:1] offset:96 -; GFX900-NEXT: global_load_dwordx4 v[1:4], v0, s[0:1] offset:16 -; GFX900-NEXT: global_load_dwordx4 v[5:8], v0, s[0:1] -; GFX900-NEXT: global_load_dwordx4 v[9:12], v0, s[0:1] offset:48 -; GFX900-NEXT: global_load_dwordx4 v[13:16], v0, s[0:1] offset:32 -; GFX900-NEXT: global_load_dwordx4 v[17:20], v0, s[0:1] offset:80 -; GFX900-NEXT: global_load_dwordx4 v[21:24], v0, s[0:1] offset:64 -; GFX900-NEXT: s_waitcnt vmcnt(5) -; GFX900-NEXT: v_fma_f32 v4, v4, s43, s43 -; GFX900-NEXT: v_fma_f32 v3, v3, s42, s42 -; GFX900-NEXT: v_fma_f32 v2, v2, s41, s41 -; GFX900-NEXT: v_fma_f32 v1, v1, s40, s40 -; GFX900-NEXT: v_fma_f32 v32, v32, s19, s19 -; GFX900-NEXT: v_fma_f32 v31, v31, s18, s18 -; GFX900-NEXT: v_fma_f32 v30, v30, s17, s17 -; GFX900-NEXT: v_fma_f32 v29, v29, s16, s16 -; GFX900-NEXT: s_waitcnt vmcnt(4) -; GFX900-NEXT: v_fma_f32 v8, v8, s39, s39 -; GFX900-NEXT: v_fma_f32 v7, v7, s38, s38 -; GFX900-NEXT: v_fma_f32 v6, v6, s37, s37 -; GFX900-NEXT: v_fma_f32 v5, v5, s36, s36 +; GFX900-NEXT: global_load_dwordx4 v[0:3], v16, s[0:1] offset:112 +; GFX900-NEXT: global_load_dwordx4 v[4:7], v16, s[0:1] offset:96 +; GFX900-NEXT: global_load_dwordx4 v[8:11], v16, s[0:1] offset:64 +; GFX900-NEXT: global_load_dwordx4 v[12:15], v16, s[0:1] offset:80 ; GFX900-NEXT: s_waitcnt vmcnt(3) -; GFX900-NEXT: v_fma_f32 v12, v12, s51, s51 -; GFX900-NEXT: v_fma_f32 v11, v11, s50, s50 -; GFX900-NEXT: v_fma_f32 v10, v10, s49, s49 -; GFX900-NEXT: v_fma_f32 v9, v9, s48, s48 -; GFX900-NEXT: s_waitcnt vmcnt(2) -; GFX900-NEXT: v_fma_f32 v16, v16, s47, s47 -; GFX900-NEXT: v_fma_f32 v15, v15, s46, s46 -; GFX900-NEXT: v_fma_f32 v14, v14, s45, s45 -; GFX900-NEXT: v_fma_f32 v13, v13, s44, s44 +; GFX900-NEXT: v_fma_f32 v3, v3, s23, s23 +; GFX900-NEXT: v_fma_f32 v2, v2, s22, s22 ; GFX900-NEXT: s_waitcnt vmcnt(1) -; GFX900-NEXT: v_fma_f32 v20, v20, s15, s15 -; GFX900-NEXT: v_fma_f32 v19, v19, s14, s14 -; GFX900-NEXT: v_fma_f32 v18, v18, s13, s13 -; GFX900-NEXT: v_fma_f32 v17, v17, s12, s12 +; GFX900-NEXT: v_fma_f32 v11, v11, s11, s11 +; GFX900-NEXT: v_fma_f32 v10, v10, s10, s10 +; GFX900-NEXT: v_fma_f32 v9, v9, s9, s9 +; GFX900-NEXT: v_fma_f32 v8, v8, s8, s8 +; GFX900-NEXT: s_waitcnt vmcnt(0) +; GFX900-NEXT: v_fma_f32 v15, v15, s15, s15 +; GFX900-NEXT: v_fma_f32 v14, v14, s14, s14 +; GFX900-NEXT: v_fma_f32 v13, v13, s13, s13 +; GFX900-NEXT: v_fma_f32 v12, v12, s12, s12 +; GFX900-NEXT: v_fma_f32 v1, v1, s21, s21 +; GFX900-NEXT: v_fma_f32 v0, v0, s20, s20 +; GFX900-NEXT: v_fma_f32 v7, v7, s19, s19 +; GFX900-NEXT: v_fma_f32 v6, v6, s18, s18 +; GFX900-NEXT: v_fma_f32 v5, v5, s17, s17 +; GFX900-NEXT: v_fma_f32 v4, v4, s16, s16 +; GFX900-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:64 +; GFX900-NEXT: global_load_dwordx4 v[8:11], v16, s[0:1] offset:48 +; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1] offset:96 +; GFX900-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1] offset:112 +; GFX900-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1] offset:80 +; GFX900-NEXT: global_load_dwordx4 v[12:15], v16, s[0:1] offset:32 +; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: global_load_dwordx4 v[0:3], v16, s[0:1] +; GFX900-NEXT: global_load_dwordx4 v[4:7], v16, s[0:1] offset:16 +; GFX900-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xa4 +; GFX900-NEXT: s_waitcnt vmcnt(6) lgkmcnt(0) +; GFX900-NEXT: v_fma_f32 v11, v11, s23, s23 +; GFX900-NEXT: v_fma_f32 v10, v10, s22, s22 +; GFX900-NEXT: v_fma_f32 v9, v9, s21, s21 +; GFX900-NEXT: s_waitcnt vmcnt(2) +; GFX900-NEXT: v_fma_f32 v15, v15, s19, s19 +; GFX900-NEXT: v_fma_f32 v14, v14, s18, s18 +; GFX900-NEXT: v_fma_f32 v13, v13, s17, s17 +; GFX900-NEXT: v_fma_f32 v12, v12, s16, s16 ; GFX900-NEXT: s_waitcnt vmcnt(0) -; GFX900-NEXT: v_fma_f32 v24, v24, s11, s11 -; GFX900-NEXT: v_fma_f32 v23, v23, s10, s10 -; GFX900-NEXT: v_fma_f32 v22, v22, s9, s9 -; GFX900-NEXT: v_fma_f32 v21, v21, s8, s8 -; GFX900-NEXT: v_fma_f32 v28, v28, s23, s23 -; GFX900-NEXT: v_fma_f32 v27, v27, s22, s22 -; GFX900-NEXT: v_fma_f32 v26, v26, s21, s21 -; GFX900-NEXT: v_fma_f32 v25, v25, s20, s20 -; GFX900-NEXT: global_store_dwordx4 v0, v[29:32], s[0:1] offset:96 -; GFX900-NEXT: global_store_dwordx4 v0, v[25:28], s[0:1] offset:112 -; GFX900-NEXT: global_store_dwordx4 v0, v[21:24], s[0:1] offset:64 -; GFX900-NEXT: global_store_dwordx4 v0, v[17:20], s[0:1] offset:80 -; GFX900-NEXT: global_store_dwordx4 v0, v[13:16], s[0:1] offset:32 -; GFX900-NEXT: global_store_dwordx4 v0, v[9:12], s[0:1] offset:48 -; GFX900-NEXT: global_store_dwordx4 v0, v[5:8], s[0:1] -; GFX900-NEXT: global_store_dwordx4 v0, v[1:4], s[0:1] offset:16 +; GFX900-NEXT: v_fma_f32 v7, v7, s15, s15 +; GFX900-NEXT: v_fma_f32 v6, v6, s14, s14 +; GFX900-NEXT: v_fma_f32 v5, v5, s13, s13 +; GFX900-NEXT: v_fma_f32 v4, v4, s12, s12 +; GFX900-NEXT: v_fma_f32 v3, v3, s11, s11 +; GFX900-NEXT: v_fma_f32 v2, v2, s10, s10 +; GFX900-NEXT: v_fma_f32 v1, v1, s9, s9 +; GFX900-NEXT: v_fma_f32 v0, v0, s8, s8 +; GFX900-NEXT: v_fma_f32 v8, v8, s20, s20 +; GFX900-NEXT: global_store_dwordx4 v16, v[12:15], s[0:1] offset:32 +; GFX900-NEXT: global_store_dwordx4 v16, v[8:11], s[0:1] offset:48 +; GFX900-NEXT: global_store_dwordx4 v16, v[0:3], s[0:1] +; GFX900-NEXT: global_store_dwordx4 v16, v[4:7], s[0:1] offset:16 ; GFX900-NEXT: s_endpgm ; ; PACKED-SDAG-LABEL: fma_v32_vs: @@ -2566,21 +2574,21 @@ define amdgpu_kernel void @fma_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-SDAG-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4 nv ; GFX1250-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0xe4 nv ; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-SDAG-NEXT: v_lshlrev_b32_e32 v56, 7, v0 +; GFX1250-SDAG-NEXT: v_lshlrev_b32_e32 v58, 7, v0 ; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0 ; GFX1250-SDAG-NEXT: s_clause 0x7 -; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v56, s[0:1] offset:16 -; GFX1250-SDAG-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:48 -; GFX1250-SDAG-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:32 -; GFX1250-SDAG-NEXT: global_load_b128 v[12:15], v56, s[0:1] -; GFX1250-SDAG-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:80 -; GFX1250-SDAG-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:96 -; GFX1250-SDAG-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:64 -; GFX1250-SDAG-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:112 +; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v58, s[0:1] offset:16 +; GFX1250-SDAG-NEXT: global_load_b128 v[4:7], v58, s[0:1] +; GFX1250-SDAG-NEXT: global_load_b128 v[8:11], v58, s[0:1] offset:48 +; GFX1250-SDAG-NEXT: global_load_b128 v[12:15], v58, s[0:1] offset:32 +; GFX1250-SDAG-NEXT: global_load_b128 v[16:19], v58, s[0:1] offset:80 +; GFX1250-SDAG-NEXT: global_load_b128 v[20:23], v58, s[0:1] offset:64 +; GFX1250-SDAG-NEXT: global_load_b128 v[24:27], v58, s[0:1] offset:112 +; GFX1250-SDAG-NEXT: global_load_b128 v[28:31], v58, s[0:1] offset:96 ; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[32:33], s[40:41] +; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[36:37], s[38:39] ; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[34:35], s[42:43] -; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[40:41], s[50:51] -; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[38:39], s[48:49] +; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[56:57], s[16:17] ; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[52:53], s[20:21] ; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[54:55], s[22:23] ; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[50:51], s[10:11] @@ -2588,40 +2596,40 @@ define amdgpu_kernel void @fma_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[48:49], s[14:15] ; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[42:43], s[44:45] ; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[44:45], s[46:47] -; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[36:37], s[38:39] +; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[38:39], s[48:49] +; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[40:41], s[50:51] ; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x7 ; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[32:33], v[32:33] -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[2:3], v[2:3], v[34:35], v[34:35] -; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[32:33], s[16:17] -; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[34:35], s[18:19] +; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[32:33], s[18:19] ; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x6 -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[6:7], v[6:7], v[40:41], v[40:41] -; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[40:41], s[8:9] -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[4:5], v[4:5], v[38:39], v[38:39] -; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[38:39], s[36:37] -; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x2 -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[20:21], v[20:21], v[32:33], v[32:33] -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[22:23], v[22:23], v[34:35], v[34:35] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[6:7], v[6:7], v[36:37], v[36:37] +; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[36:37], s[8:9] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[2:3], v[2:3], v[34:35], v[34:35] +; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[34:35], s[36:37] +; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x1 +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[24:25], v[24:25], v[52:53], v[52:53] ; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0 -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[28:29], v[28:29], v[52:53], v[52:53] -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[30:31], v[30:31], v[54:55], v[54:55] -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[26:27], v[26:27], v[50:51], v[50:51] -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[24:25], v[24:25], v[40:41], v[40:41] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[28:29], v[28:29], v[56:57], v[56:57] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[30:31], v[30:31], v[32:33], v[32:33] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[26:27], v[26:27], v[54:55], v[54:55] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[22:23], v[22:23], v[50:51], v[50:51] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[20:21], v[20:21], v[36:37], v[36:37] ; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[16:17], v[16:17], v[46:47], v[46:47] ; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[18:19], v[18:19], v[48:49], v[48:49] -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[8:9], v[8:9], v[42:43], v[42:43] -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[10:11], v[10:11], v[44:45], v[44:45] -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[14:15], v[14:15], v[36:37], v[36:37] -; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[12:13], v[12:13], v[38:39], v[38:39] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[12:13], v[12:13], v[42:43], v[42:43] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[14:15], v[14:15], v[44:45], v[44:45] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[8:9], v[8:9], v[38:39], v[38:39] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[10:11], v[10:11], v[40:41], v[40:41] +; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[4:5], v[4:5], v[34:35], v[34:35] ; GFX1250-SDAG-NEXT: s_clause 0x7 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:96 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:112 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:64 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:80 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:32 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:48 -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[12:15], s[0:1] -; GFX1250-SDAG-NEXT: global_store_b128 v56, v[0:3], s[0:1] offset:16 +; GFX1250-SDAG-NEXT: global_store_b128 v58, v[28:31], s[0:1] offset:96 +; GFX1250-SDAG-NEXT: global_store_b128 v58, v[24:27], s[0:1] offset:112 +; GFX1250-SDAG-NEXT: global_store_b128 v58, v[20:23], s[0:1] offset:64 +; GFX1250-SDAG-NEXT: global_store_b128 v58, v[16:19], s[0:1] offset:80 +; GFX1250-SDAG-NEXT: global_store_b128 v58, v[12:15], s[0:1] offset:32 +; GFX1250-SDAG-NEXT: global_store_b128 v58, v[8:11], s[0:1] offset:48 +; GFX1250-SDAG-NEXT: global_store_b128 v58, v[4:7], s[0:1] +; GFX1250-SDAG-NEXT: global_store_b128 v58, v[0:3], s[0:1] offset:16 ; GFX1250-SDAG-NEXT: s_endpgm ; ; GFX1250-GISEL-LABEL: fma_v32_vs: @@ -2633,17 +2641,17 @@ define amdgpu_kernel void @fma_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-GISEL-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4 nv ; GFX1250-GISEL-NEXT: s_load_b512 s[8:23], s[4:5], 0xe4 nv ; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v56, 7, v0 +; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v58, 7, v0 ; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0 ; GFX1250-GISEL-NEXT: s_clause 0x7 -; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v56, s[0:1] -; GFX1250-GISEL-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:16 -; GFX1250-GISEL-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:32 -; GFX1250-GISEL-NEXT: global_load_b128 v[12:15], v56, s[0:1] offset:48 -; GFX1250-GISEL-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:64 -; GFX1250-GISEL-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:80 -; GFX1250-GISEL-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:96 -; GFX1250-GISEL-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:112 +; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v58, s[0:1] +; GFX1250-GISEL-NEXT: global_load_b128 v[4:7], v58, s[0:1] offset:16 +; GFX1250-GISEL-NEXT: global_load_b128 v[8:11], v58, s[0:1] offset:32 +; GFX1250-GISEL-NEXT: global_load_b128 v[12:15], v58, s[0:1] offset:48 +; GFX1250-GISEL-NEXT: global_load_b128 v[16:19], v58, s[0:1] offset:64 +; GFX1250-GISEL-NEXT: global_load_b128 v[20:23], v58, s[0:1] offset:80 +; GFX1250-GISEL-NEXT: global_load_b128 v[24:27], v58, s[0:1] offset:96 +; GFX1250-GISEL-NEXT: global_load_b128 v[28:31], v58, s[0:1] offset:112 ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[36:37] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[38:39] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[40:41] @@ -2656,16 +2664,16 @@ define amdgpu_kernel void @fma_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[50:51], s[10:11] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[52:53], s[12:13] ; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[54:55], s[14:15] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[56:57], s[16:17] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x7 ; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[32:33], v[32:33] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[18:19] ; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[2:3], v[2:3], v[34:35], v[34:35] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[16:17] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[18:19] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[20:21] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x6 ; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[4:5], v[4:5], v[36:37], v[36:37] +; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[22:23] ; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[6:7], v[6:7], v[38:39], v[38:39] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[20:21] -; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[38:39], s[22:23] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x5 ; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[8:9], v[8:9], v[40:41], v[40:41] ; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[10:11], v[10:11], v[42:43], v[42:43] @@ -2679,20 +2687,20 @@ define amdgpu_kernel void @fma_v32_vs(ptr addrspace(1) %a, <32 x float> %x) { ; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[20:21], v[20:21], v[52:53], v[52:53] ; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[22:23], v[22:23], v[54:55], v[54:55] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x1 -; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[24:25], v[24:25], v[32:33], v[32:33] -; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[26:27], v[26:27], v[34:35], v[34:35] +; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[24:25], v[24:25], v[56:57], v[56:57] +; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[26:27], v[26:27], v[32:33], v[32:33] ; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0 -; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[28:29], v[28:29], v[36:37], v[36:37] -; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[30:31], v[30:31], v[38:39], v[38:39] +; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[28:29], v[28:29], v[34:35], v[34:35] +; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[30:31], v[30:31], v[36:37], v[36:37] ; GFX1250-GISEL-NEXT: s_clause 0x7 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[0:3], s[0:1] -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:16 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:32 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[12:15], s[0:1] offset:48 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:64 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:80 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:96 -; GFX1250-GISEL-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:112 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[0:3], s[0:1] +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[4:7], s[0:1] offset:16 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[8:11], s[0:1] offset:32 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[12:15], s[0:1] offset:48 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[16:19], s[0:1] offset:64 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[20:23], s[0:1] offset:80 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[24:27], s[0:1] offset:96 +; GFX1250-GISEL-NEXT: global_store_b128 v58, v[28:31], s[0:1] offset:112 ; GFX1250-GISEL-NEXT: s_endpgm %id = tail call i32 @llvm.amdgcn.workitem.id.x() %gep = getelementptr inbounds <32 x float>, ptr addrspace(1) %a, i32 %id diff --git a/llvm/test/CodeGen/AMDGPU/packed-fp64.ll b/llvm/test/CodeGen/AMDGPU/packed-fp64.ll index ff0c3edc9dcf0..6c891999aefb2 100644 --- a/llvm/test/CodeGen/AMDGPU/packed-fp64.ll +++ b/llvm/test/CodeGen/AMDGPU/packed-fp64.ll @@ -188,68 +188,67 @@ define amdgpu_kernel void @fadd_v32_vs(ptr addrspace(1) %a, <32 x double> %x) { ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s74 :: v_dual_mov_b32 v69, s75 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s68 :: v_dual_mov_b32 v71, s69 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s70 :: v_dual_mov_b32 v73, s71 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s80 :: v_dual_mov_b32 v75, s81 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s82 :: v_dual_mov_b32 v77, s83 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xf -; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) ; GFX1251-SDAG-NEXT: v_pk_add_f64 v[40:43], v[40:43], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s80 :: v_dual_mov_b32 v67, s81 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s82 :: v_dual_mov_b32 v69, s83 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s76 :: v_dual_mov_b32 v67, s77 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s78 :: v_dual_mov_b32 v69, s79 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xe ; GFX1251-SDAG-NEXT: v_pk_add_f64 v[36:39], v[36:39], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s76 :: v_dual_mov_b32 v71, s77 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s78 :: v_dual_mov_b32 v73, s79 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s56 :: v_dual_mov_b32 v71, s57 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s58 :: v_dual_mov_b32 v73, s59 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xd -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[32:35], v[32:35], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s56 :: v_dual_mov_b32 v67, s57 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s58 :: v_dual_mov_b32 v69, s59 +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[32:35], v[32:35], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s52 :: v_dual_mov_b32 v75, s53 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s54 :: v_dual_mov_b32 v77, s55 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xc -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[28:31], v[28:31], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s52 :: v_dual_mov_b32 v71, s53 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s54 :: v_dual_mov_b32 v73, s55 -; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xb -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[24:27], v[24:27], v[66:69] +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[28:31], v[28:31], v[66:69] ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s64 :: v_dual_mov_b32 v67, s65 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s66 :: v_dual_mov_b32 v69, s67 -; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xa -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[20:23], v[20:23], v[70:73] +; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xb +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[24:27], v[24:27], v[70:73] ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s60 :: v_dual_mov_b32 v71, s61 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s62 :: v_dual_mov_b32 v73, s63 +; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xa +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[20:23], v[20:23], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s12 :: v_dual_mov_b32 v75, s13 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s14 :: v_dual_mov_b32 v77, s15 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x9 ; GFX1251-SDAG-NEXT: v_pk_add_f64 v[16:19], v[16:19], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s12 :: v_dual_mov_b32 v67, s13 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s14 :: v_dual_mov_b32 v69, s15 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, s9 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s10 :: v_dual_mov_b32 v69, s11 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x8 ; GFX1251-SDAG-NEXT: v_pk_add_f64 v[12:15], v[12:15], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s8 :: v_dual_mov_b32 v71, s9 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s10 :: v_dual_mov_b32 v73, s11 +; GFX1251-SDAG-NEXT: v_mov_b32_e32 v72, s18 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x7 -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[8:11], v[8:11], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s40 :: v_dual_mov_b32 v67, s41 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s42 :: v_dual_mov_b32 v69, s43 +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[8:11], v[8:11], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s40 :: v_dual_mov_b32 v75, s41 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s42 :: v_dual_mov_b32 v77, s43 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x6 -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[4:7], v[4:7], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s36 :: v_dual_mov_b32 v71, s37 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s38 :: v_dual_mov_b32 v73, s39 +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[4:7], v[4:7], v[66:69] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s36 :: v_dual_mov_b32 v67, s37 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s38 :: v_dual_mov_b32 v69, s39 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x5 -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[0:3], v[0:3], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s48 :: v_dual_mov_b32 v67, s49 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s50 :: v_dual_mov_b32 v69, s51 +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[0:3], v[0:3], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s48 :: v_dual_mov_b32 v75, s49 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s50 :: v_dual_mov_b32 v77, s51 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x4 -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[46:49], v[46:49], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s44 :: v_dual_mov_b32 v71, s45 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s46 :: v_dual_mov_b32 v73, s47 +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[46:49], v[46:49], v[66:69] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s44 :: v_dual_mov_b32 v67, s45 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s46 :: v_dual_mov_b32 v69, s47 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v73, s19 :: v_dual_mov_b32 v70, s16 +; GFX1251-SDAG-NEXT: v_mov_b32_e32 v71, s17 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x3 -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[50:53], v[50:53], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s16 :: v_dual_mov_b32 v67, s17 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s18 :: v_dual_mov_b32 v69, s19 +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[50:53], v[50:53], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s20 :: v_dual_mov_b32 v75, s21 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s22 :: v_dual_mov_b32 v77, s23 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x2 -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[54:57], v[54:57], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s20 :: v_dual_mov_b32 v71, s21 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s22 :: v_dual_mov_b32 v73, s23 +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[54:57], v[54:57], v[66:69] ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x1 -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[58:61], v[58:61], v[66:69] +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[58:61], v[58:61], v[70:73] ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0 -; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) -; GFX1251-SDAG-NEXT: v_pk_add_f64 v[62:65], v[62:65], v[70:73] +; GFX1251-SDAG-NEXT: v_pk_add_f64 v[62:65], v[62:65], v[74:77] ; GFX1251-SDAG-NEXT: s_clause 0xf ; GFX1251-SDAG-NEXT: global_store_b128 v44, v[54:57], s[0:1] offset:96 ; GFX1251-SDAG-NEXT: global_store_b128 v44, v[50:53], s[0:1] offset:112 @@ -1005,68 +1004,67 @@ define amdgpu_kernel void @fmul_v32_vs(ptr addrspace(1) %a, <32 x double> %x) { ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s74 :: v_dual_mov_b32 v69, s75 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s68 :: v_dual_mov_b32 v71, s69 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s70 :: v_dual_mov_b32 v73, s71 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s80 :: v_dual_mov_b32 v75, s81 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s82 :: v_dual_mov_b32 v77, s83 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xf -; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) ; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[40:43], v[40:43], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s80 :: v_dual_mov_b32 v67, s81 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s82 :: v_dual_mov_b32 v69, s83 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s76 :: v_dual_mov_b32 v67, s77 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s78 :: v_dual_mov_b32 v69, s79 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xe ; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[36:39], v[36:39], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s76 :: v_dual_mov_b32 v71, s77 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s78 :: v_dual_mov_b32 v73, s79 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s56 :: v_dual_mov_b32 v71, s57 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s58 :: v_dual_mov_b32 v73, s59 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xd -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[32:35], v[32:35], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s56 :: v_dual_mov_b32 v67, s57 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s58 :: v_dual_mov_b32 v69, s59 +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[32:35], v[32:35], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s52 :: v_dual_mov_b32 v75, s53 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s54 :: v_dual_mov_b32 v77, s55 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xc -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[28:31], v[28:31], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s52 :: v_dual_mov_b32 v71, s53 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s54 :: v_dual_mov_b32 v73, s55 -; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xb -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[24:27], v[24:27], v[66:69] +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[28:31], v[28:31], v[66:69] ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s64 :: v_dual_mov_b32 v67, s65 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s66 :: v_dual_mov_b32 v69, s67 -; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xa -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[20:23], v[20:23], v[70:73] +; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xb +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[24:27], v[24:27], v[70:73] ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s60 :: v_dual_mov_b32 v71, s61 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s62 :: v_dual_mov_b32 v73, s63 +; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xa +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[20:23], v[20:23], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s12 :: v_dual_mov_b32 v75, s13 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s14 :: v_dual_mov_b32 v77, s15 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x9 ; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[16:19], v[16:19], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s12 :: v_dual_mov_b32 v67, s13 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s14 :: v_dual_mov_b32 v69, s15 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, s9 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s10 :: v_dual_mov_b32 v69, s11 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x8 ; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[12:15], v[12:15], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s8 :: v_dual_mov_b32 v71, s9 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s10 :: v_dual_mov_b32 v73, s11 +; GFX1251-SDAG-NEXT: v_mov_b32_e32 v72, s18 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x7 -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[8:11], v[8:11], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s40 :: v_dual_mov_b32 v67, s41 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s42 :: v_dual_mov_b32 v69, s43 +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[8:11], v[8:11], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s40 :: v_dual_mov_b32 v75, s41 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s42 :: v_dual_mov_b32 v77, s43 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x6 -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[4:7], v[4:7], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s36 :: v_dual_mov_b32 v71, s37 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s38 :: v_dual_mov_b32 v73, s39 +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[4:7], v[4:7], v[66:69] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s36 :: v_dual_mov_b32 v67, s37 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s38 :: v_dual_mov_b32 v69, s39 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x5 -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[0:3], v[0:3], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s48 :: v_dual_mov_b32 v67, s49 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s50 :: v_dual_mov_b32 v69, s51 +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[0:3], v[0:3], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s48 :: v_dual_mov_b32 v75, s49 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s50 :: v_dual_mov_b32 v77, s51 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x4 -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[46:49], v[46:49], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s44 :: v_dual_mov_b32 v71, s45 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s46 :: v_dual_mov_b32 v73, s47 +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[46:49], v[46:49], v[66:69] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s44 :: v_dual_mov_b32 v67, s45 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s46 :: v_dual_mov_b32 v69, s47 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v73, s19 :: v_dual_mov_b32 v70, s16 +; GFX1251-SDAG-NEXT: v_mov_b32_e32 v71, s17 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x3 -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[50:53], v[50:53], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s16 :: v_dual_mov_b32 v67, s17 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s18 :: v_dual_mov_b32 v69, s19 +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[50:53], v[50:53], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s20 :: v_dual_mov_b32 v75, s21 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s22 :: v_dual_mov_b32 v77, s23 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x2 -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[54:57], v[54:57], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s20 :: v_dual_mov_b32 v71, s21 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s22 :: v_dual_mov_b32 v73, s23 +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[54:57], v[54:57], v[66:69] ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x1 -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[58:61], v[58:61], v[66:69] +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[58:61], v[58:61], v[70:73] ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0 -; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) -; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[62:65], v[62:65], v[70:73] +; GFX1251-SDAG-NEXT: v_pk_mul_f64 v[62:65], v[62:65], v[74:77] ; GFX1251-SDAG-NEXT: s_clause 0xf ; GFX1251-SDAG-NEXT: global_store_b128 v44, v[54:57], s[0:1] offset:96 ; GFX1251-SDAG-NEXT: global_store_b128 v44, v[50:53], s[0:1] offset:112 diff --git a/llvm/test/CodeGen/AMDGPU/packed-u64.ll b/llvm/test/CodeGen/AMDGPU/packed-u64.ll index 77e45fb1560e3..c9aa8b5cfdfed 100644 --- a/llvm/test/CodeGen/AMDGPU/packed-u64.ll +++ b/llvm/test/CodeGen/AMDGPU/packed-u64.ll @@ -188,67 +188,66 @@ define amdgpu_kernel void @add_v32_vs(ptr addrspace(1) %a, <32 x i64> %x) { ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s74 :: v_dual_mov_b32 v69, s75 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s68 :: v_dual_mov_b32 v71, s69 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s70 :: v_dual_mov_b32 v73, s71 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s80 :: v_dual_mov_b32 v75, s81 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s82 :: v_dual_mov_b32 v77, s83 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xf -; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) ; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[40:43], v[40:43], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s80 :: v_dual_mov_b32 v67, s81 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s82 :: v_dual_mov_b32 v69, s83 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s76 :: v_dual_mov_b32 v67, s77 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s78 :: v_dual_mov_b32 v69, s79 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xe ; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[36:39], v[36:39], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s76 :: v_dual_mov_b32 v71, s77 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s78 :: v_dual_mov_b32 v73, s79 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s56 :: v_dual_mov_b32 v71, s57 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s58 :: v_dual_mov_b32 v73, s59 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xd -; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[32:35], v[32:35], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s56 :: v_dual_mov_b32 v67, s57 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s58 :: v_dual_mov_b32 v69, s59 +; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[32:35], v[32:35], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s52 :: v_dual_mov_b32 v75, s53 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s54 :: v_dual_mov_b32 v77, s55 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xc -; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[28:31], v[28:31], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s52 :: v_dual_mov_b32 v71, s53 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s54 :: v_dual_mov_b32 v73, s55 -; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xb -; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[24:27], v[24:27], v[66:69] +; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[28:31], v[28:31], v[66:69] ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s64 :: v_dual_mov_b32 v67, s65 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s66 :: v_dual_mov_b32 v69, s67 -; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xa -; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[20:23], v[20:23], v[70:73] +; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xb +; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[24:27], v[24:27], v[70:73] ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s60 :: v_dual_mov_b32 v71, s61 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s62 :: v_dual_mov_b32 v73, s63 +; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xa +; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[20:23], v[20:23], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s12 :: v_dual_mov_b32 v75, s13 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s14 :: v_dual_mov_b32 v77, s15 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x9 ; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[16:19], v[16:19], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s12 :: v_dual_mov_b32 v67, s13 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s14 :: v_dual_mov_b32 v69, s15 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, s9 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s10 :: v_dual_mov_b32 v69, s11 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x8 ; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[12:15], v[12:15], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s8 :: v_dual_mov_b32 v71, s9 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s10 :: v_dual_mov_b32 v73, s11 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s20 :: v_dual_mov_b32 v71, s21 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s22 :: v_dual_mov_b32 v73, s23 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x7 -; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[8:11], v[8:11], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s20 :: v_dual_mov_b32 v67, s21 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s22 :: v_dual_mov_b32 v69, s23 +; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[8:11], v[8:11], v[74:77] +; GFX1251-SDAG-NEXT: v_mov_b32_e32 v76, s42 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x6 -; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[4:7], v[4:7], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s36 :: v_dual_mov_b32 v71, s37 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s38 :: v_dual_mov_b32 v73, s39 +; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[4:7], v[4:7], v[66:69] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s36 :: v_dual_mov_b32 v67, s37 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s38 :: v_dual_mov_b32 v69, s39 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x5 -; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[0:3], v[0:3], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s48 :: v_dual_mov_b32 v67, s49 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s50 :: v_dual_mov_b32 v69, s51 +; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[0:3], v[0:3], v[70:73] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s48 :: v_dual_mov_b32 v71, s49 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s50 :: v_dual_mov_b32 v73, s51 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x4 -; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[46:49], v[46:49], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s44 :: v_dual_mov_b32 v71, s45 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s46 :: v_dual_mov_b32 v73, s47 +; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[46:49], v[46:49], v[66:69] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s44 :: v_dual_mov_b32 v67, s45 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s46 :: v_dual_mov_b32 v69, s47 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v77, s43 :: v_dual_mov_b32 v74, s40 +; GFX1251-SDAG-NEXT: v_mov_b32_e32 v75, s41 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x3 -; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[50:53], v[50:53], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s40 :: v_dual_mov_b32 v67, s41 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s42 :: v_dual_mov_b32 v69, s43 -; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x2 -; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[54:57], v[54:57], v[70:73] +; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[50:53], v[50:53], v[70:73] ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s16 :: v_dual_mov_b32 v71, s17 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s18 :: v_dual_mov_b32 v73, s19 +; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x2 +; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[54:57], v[54:57], v[66:69] ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x1 -; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[58:61], v[58:61], v[66:69] +; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[58:61], v[58:61], v[74:77] ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0 -; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX1251-SDAG-NEXT: v_pk_add_nc_u64 v[62:65], v[62:65], v[70:73] ; GFX1251-SDAG-NEXT: s_clause 0xf ; GFX1251-SDAG-NEXT: global_store_b128 v44, v[54:57], s[0:1] offset:96 @@ -771,67 +770,66 @@ define amdgpu_kernel void @sub_v32_vs(ptr addrspace(1) %a, <32 x i64> %x) { ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s74 :: v_dual_mov_b32 v69, s75 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s68 :: v_dual_mov_b32 v71, s69 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s70 :: v_dual_mov_b32 v73, s71 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s80 :: v_dual_mov_b32 v75, s81 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s82 :: v_dual_mov_b32 v77, s83 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xf -; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) ; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[40:43], v[40:43], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s80 :: v_dual_mov_b32 v67, s81 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s82 :: v_dual_mov_b32 v69, s83 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s76 :: v_dual_mov_b32 v67, s77 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s78 :: v_dual_mov_b32 v69, s79 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xe ; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[36:39], v[36:39], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s76 :: v_dual_mov_b32 v71, s77 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s78 :: v_dual_mov_b32 v73, s79 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s56 :: v_dual_mov_b32 v71, s57 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s58 :: v_dual_mov_b32 v73, s59 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xd -; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[32:35], v[32:35], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s56 :: v_dual_mov_b32 v67, s57 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s58 :: v_dual_mov_b32 v69, s59 +; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[32:35], v[32:35], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s52 :: v_dual_mov_b32 v75, s53 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s54 :: v_dual_mov_b32 v77, s55 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xc -; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[28:31], v[28:31], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s52 :: v_dual_mov_b32 v71, s53 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s54 :: v_dual_mov_b32 v73, s55 -; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xb -; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[24:27], v[24:27], v[66:69] +; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[28:31], v[28:31], v[66:69] ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s64 :: v_dual_mov_b32 v67, s65 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s66 :: v_dual_mov_b32 v69, s67 -; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xa -; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[20:23], v[20:23], v[70:73] +; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xb +; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[24:27], v[24:27], v[70:73] ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s60 :: v_dual_mov_b32 v71, s61 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s62 :: v_dual_mov_b32 v73, s63 +; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xa +; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[20:23], v[20:23], v[74:77] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v74, s12 :: v_dual_mov_b32 v75, s13 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v76, s14 :: v_dual_mov_b32 v77, s15 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x9 ; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[16:19], v[16:19], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s12 :: v_dual_mov_b32 v67, s13 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s14 :: v_dual_mov_b32 v69, s15 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, s9 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s10 :: v_dual_mov_b32 v69, s11 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x8 ; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[12:15], v[12:15], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s8 :: v_dual_mov_b32 v71, s9 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s10 :: v_dual_mov_b32 v73, s11 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s20 :: v_dual_mov_b32 v71, s21 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s22 :: v_dual_mov_b32 v73, s23 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x7 -; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[8:11], v[8:11], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s20 :: v_dual_mov_b32 v67, s21 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s22 :: v_dual_mov_b32 v69, s23 +; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[8:11], v[8:11], v[74:77] +; GFX1251-SDAG-NEXT: v_mov_b32_e32 v76, s42 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x6 -; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[4:7], v[4:7], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s36 :: v_dual_mov_b32 v71, s37 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s38 :: v_dual_mov_b32 v73, s39 +; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[4:7], v[4:7], v[66:69] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s36 :: v_dual_mov_b32 v67, s37 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s38 :: v_dual_mov_b32 v69, s39 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x5 -; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[0:3], v[0:3], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s48 :: v_dual_mov_b32 v67, s49 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s50 :: v_dual_mov_b32 v69, s51 +; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[0:3], v[0:3], v[70:73] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s48 :: v_dual_mov_b32 v71, s49 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s50 :: v_dual_mov_b32 v73, s51 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x4 -; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[46:49], v[46:49], v[70:73] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s44 :: v_dual_mov_b32 v71, s45 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s46 :: v_dual_mov_b32 v73, s47 +; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[46:49], v[46:49], v[66:69] +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s44 :: v_dual_mov_b32 v67, s45 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s46 :: v_dual_mov_b32 v69, s47 +; GFX1251-SDAG-NEXT: v_dual_mov_b32 v77, s43 :: v_dual_mov_b32 v74, s40 +; GFX1251-SDAG-NEXT: v_mov_b32_e32 v75, s41 ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x3 -; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[50:53], v[50:53], v[66:69] -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v66, s40 :: v_dual_mov_b32 v67, s41 -; GFX1251-SDAG-NEXT: v_dual_mov_b32 v68, s42 :: v_dual_mov_b32 v69, s43 -; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x2 -; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[54:57], v[54:57], v[70:73] +; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[50:53], v[50:53], v[70:73] ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v70, s16 :: v_dual_mov_b32 v71, s17 ; GFX1251-SDAG-NEXT: v_dual_mov_b32 v72, s18 :: v_dual_mov_b32 v73, s19 +; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x2 +; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[54:57], v[54:57], v[66:69] ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x1 -; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[58:61], v[58:61], v[66:69] +; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[58:61], v[58:61], v[74:77] ; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0 -; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX1251-SDAG-NEXT: v_pk_sub_nc_u64 v[62:65], v[62:65], v[70:73] ; GFX1251-SDAG-NEXT: s_clause 0xf ; GFX1251-SDAG-NEXT: global_store_b128 v44, v[54:57], s[0:1] offset:96 diff --git a/llvm/test/CodeGen/AMDGPU/pr51516.mir b/llvm/test/CodeGen/AMDGPU/pr51516.mir index 69983faf2b154..2a3d3e938f091 100644 --- a/llvm/test/CodeGen/AMDGPU/pr51516.mir +++ b/llvm/test/CodeGen/AMDGPU/pr51516.mir @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 -# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -amdgpu-disable-unclustered-high-rp-reschedule -verify-misched -start-before=machine-scheduler -stop-after=virtregrewriter,2 -o - %s | FileCheck -check-prefix=GCN %s +# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -amdgpu-disable-unclustered-high-rp-reschedule -amdgpu-use-amdgpu-trackers=0 -verify-misched -start-before=machine-scheduler -stop-after=virtregrewriter,2 -o - %s | FileCheck -check-prefix=GCN %s # RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -amdgpu-disable-unclustered-high-rp-reschedule -amdgpu-use-amdgpu-trackers=1 -verify-misched -start-before=machine-scheduler -stop-after=virtregrewriter,2 -o - %s | FileCheck -check-prefix=GCN-GCNTRACKER %s # Check that %3 was not rematerialized before the last store since its operand %1 diff --git a/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll b/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll index e2b4e19bada87..60a5574c317a3 100644 --- a/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll +++ b/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll @@ -140,10 +140,10 @@ define void @preserve_wwm_copy_dstreg(ptr %parg0, ptr %parg1, ptr %parg2) #0 { ; GFX906-NEXT: buffer_store_dword v39, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill ; GFX906-NEXT: s_mov_b64 exec, s[34:35] ; GFX906-NEXT: v_readlane_b32 s16, v39, 22 +; GFX906-NEXT: v_mov_b32_e32 v31, v32 ; GFX906-NEXT: s_mov_b32 s12, s24 ; GFX906-NEXT: s_mov_b32 s13, s23 ; GFX906-NEXT: s_mov_b32 s14, s22 -; GFX906-NEXT: v_mov_b32_e32 v31, v32 ; GFX906-NEXT: s_mov_b32 s15, s21 ; GFX906-NEXT: s_mov_b64 s[10:11], s[26:27] ; GFX906-NEXT: v_readlane_b32 s17, v39, 23 @@ -524,10 +524,10 @@ define void @preserve_wwm_copy_dstreg(ptr %parg0, ptr %parg1, ptr %parg2) #0 { ; GFX908-NEXT: buffer_store_dword v39, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill ; GFX908-NEXT: s_mov_b64 exec, s[34:35] ; GFX908-NEXT: v_readlane_b32 s16, v39, 22 +; GFX908-NEXT: v_mov_b32_e32 v31, v32 ; GFX908-NEXT: s_mov_b32 s12, s24 ; GFX908-NEXT: s_mov_b32 s13, s23 ; GFX908-NEXT: s_mov_b32 s14, s22 -; GFX908-NEXT: v_mov_b32_e32 v31, v32 ; GFX908-NEXT: s_mov_b32 s15, s21 ; GFX908-NEXT: s_mov_b64 s[10:11], s[26:27] ; GFX908-NEXT: v_readlane_b32 s17, v39, 23 diff --git a/llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll b/llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll index fa1d34da9376e..50d3c85cfa232 100644 --- a/llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll +++ b/llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll @@ -370,110 +370,110 @@ define hidden amdgpu_kernel void @clmem_read(ptr addrspace(1) %buffer) { ; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_swappc_b64 s[30:31], s[4:5] ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 17, v0 -; GFX8-NEXT: v_and_b32_e32 v10, 0xfe000000, v1 +; GFX8-NEXT: v_and_b32_e32 v6, 0xfe000000, v1 ; GFX8-NEXT: v_mov_b32_e32 v1, 3 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 -; GFX8-NEXT: v_or_b32_e32 v0, v10, v0 +; GFX8-NEXT: v_or_b32_e32 v0, v6, v0 ; GFX8-NEXT: v_mov_b32_e32 v1, s35 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, s34, v0 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc -; GFX8-NEXT: s_movk_i32 s0, 0x2800 -; GFX8-NEXT: v_add_u32_e32 v0, vcc, s0, v0 +; GFX8-NEXT: s_movk_i32 s2, 0x2800 +; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v0 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc -; GFX8-NEXT: v_mov_b32_e32 v6, 0 -; GFX8-NEXT: v_mov_b32_e32 v7, 0 -; GFX8-NEXT: v_mov_b32_e32 v11, 0x7f -; GFX8-NEXT: s_movk_i32 s1, 0x800 -; GFX8-NEXT: s_movk_i32 s2, 0x1000 -; GFX8-NEXT: s_movk_i32 s3, 0x1800 -; GFX8-NEXT: s_movk_i32 s4, 0x2000 +; GFX8-NEXT: v_mov_b32_e32 v4, 0 +; GFX8-NEXT: v_mov_b32_e32 v5, 0 +; GFX8-NEXT: v_mov_b32_e32 v7, 0x7f +; GFX8-NEXT: s_movk_i32 s3, 0x800 +; GFX8-NEXT: s_movk_i32 s4, 0x1000 +; GFX8-NEXT: s_movk_i32 s5, 0x1800 +; GFX8-NEXT: s_movk_i32 s6, 0x2000 ; GFX8-NEXT: .LBB1_1: ; %for.cond.preheader ; GFX8-NEXT: ; =>This Loop Header: Depth=1 ; GFX8-NEXT: ; Child Loop BB1_2 Depth 2 ; GFX8-NEXT: v_mov_b32_e32 v3, v1 -; GFX8-NEXT: s_mov_b32 s5, 0 +; GFX8-NEXT: s_mov_b32 s7, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, v0 ; GFX8-NEXT: .LBB1_2: ; %for.body ; GFX8-NEXT: ; Parent Loop BB1_1 Depth=1 ; GFX8-NEXT: ; => This Inner Loop Header: Depth=2 ; GFX8-NEXT: v_add_u32_e32 v8, vcc, 0xffffd800, v2 ; GFX8-NEXT: v_addc_u32_e32 v9, vcc, -1, v3, vcc -; GFX8-NEXT: flat_load_dwordx2 v[4:5], v[2:3] -; GFX8-NEXT: flat_load_dwordx2 v[14:15], v[8:9] ; GFX8-NEXT: v_add_u32_e32 v12, vcc, 0xffffe000, v2 +; GFX8-NEXT: flat_load_dwordx2 v[8:9], v[8:9] ; GFX8-NEXT: v_addc_u32_e32 v13, vcc, -1, v3, vcc +; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xffffe800, v2 ; GFX8-NEXT: flat_load_dwordx2 v[12:13], v[12:13] -; GFX8-NEXT: v_add_u32_e32 v8, vcc, 0xffffe800, v2 -; GFX8-NEXT: v_addc_u32_e32 v9, vcc, -1, v3, vcc -; GFX8-NEXT: flat_load_dwordx2 v[18:19], v[8:9] +; GFX8-NEXT: flat_load_dwordx2 v[10:11], v[2:3] +; GFX8-NEXT: v_addc_u32_e32 v15, vcc, -1, v3, vcc +; GFX8-NEXT: flat_load_dwordx2 v[14:15], v[14:15] ; GFX8-NEXT: v_add_u32_e32 v16, vcc, 0xfffff000, v2 ; GFX8-NEXT: v_addc_u32_e32 v17, vcc, -1, v3, vcc -; GFX8-NEXT: v_add_u32_e32 v20, vcc, 0xfffff800, v2 -; GFX8-NEXT: v_addc_u32_e32 v21, vcc, -1, v3, vcc -; GFX8-NEXT: flat_load_dwordx2 v[8:9], v[16:17] -; GFX8-NEXT: v_add_u32_e32 v16, vcc, s1, v2 -; GFX8-NEXT: v_addc_u32_e32 v17, vcc, 0, v3, vcc -; GFX8-NEXT: s_addk_i32 s5, 0x2000 -; GFX8-NEXT: s_cmp_gt_u32 s5, 0x3fffff -; GFX8-NEXT: s_waitcnt vmcnt(3) -; GFX8-NEXT: v_add_u32_e32 v22, vcc, v14, v6 -; GFX8-NEXT: v_addc_u32_e32 v23, vcc, v15, v7, vcc -; GFX8-NEXT: v_add_u32_e32 v6, vcc, s2, v2 -; GFX8-NEXT: flat_load_dwordx2 v[14:15], v[20:21] +; GFX8-NEXT: v_add_u32_e32 v18, vcc, 0xfffff800, v2 ; GFX8-NEXT: flat_load_dwordx2 v[16:17], v[16:17] -; GFX8-NEXT: v_addc_u32_e32 v7, vcc, 0, v3, vcc -; GFX8-NEXT: v_add_u32_e32 v20, vcc, s3, v2 -; GFX8-NEXT: v_addc_u32_e32 v21, vcc, 0, v3, vcc -; GFX8-NEXT: s_waitcnt vmcnt(4) -; GFX8-NEXT: v_add_u32_e32 v22, vcc, v12, v22 -; GFX8-NEXT: v_addc_u32_e32 v23, vcc, v13, v23, vcc -; GFX8-NEXT: v_add_u32_e32 v12, vcc, s4, v2 -; GFX8-NEXT: flat_load_dwordx2 v[6:7], v[6:7] -; GFX8-NEXT: flat_load_dwordx2 v[20:21], v[20:21] -; GFX8-NEXT: v_addc_u32_e32 v13, vcc, 0, v3, vcc +; GFX8-NEXT: v_addc_u32_e32 v19, vcc, -1, v3, vcc +; GFX8-NEXT: flat_load_dwordx2 v[18:19], v[18:19] +; GFX8-NEXT: s_addk_i32 s7, 0x2000 +; GFX8-NEXT: s_cmp_gt_u32 s7, 0x3fffff +; GFX8-NEXT: s_waitcnt vmcnt(5) +; GFX8-NEXT: v_add_u32_e64 v8, s[0:1], v8, v4 +; GFX8-NEXT: v_add_u32_e32 v4, vcc, s3, v2 +; GFX8-NEXT: v_addc_u32_e64 v9, s[0:1], v9, v5, s[0:1] +; GFX8-NEXT: v_addc_u32_e32 v5, vcc, 0, v3, vcc +; GFX8-NEXT: flat_load_dwordx2 v[4:5], v[4:5] ; GFX8-NEXT: s_waitcnt vmcnt(5) -; GFX8-NEXT: v_add_u32_e32 v22, vcc, v18, v22 -; GFX8-NEXT: v_addc_u32_e32 v23, vcc, v19, v23, vcc -; GFX8-NEXT: v_add_u32_e32 v18, vcc, s0, v2 +; GFX8-NEXT: v_add_u32_e64 v12, s[0:1], v12, v8 +; GFX8-NEXT: v_add_u32_e32 v8, vcc, s4, v2 +; GFX8-NEXT: v_addc_u32_e64 v13, s[0:1], v13, v9, s[0:1] +; GFX8-NEXT: v_addc_u32_e32 v9, vcc, 0, v3, vcc +; GFX8-NEXT: s_waitcnt vmcnt(3) +; GFX8-NEXT: v_add_u32_e64 v14, s[0:1], v14, v12 +; GFX8-NEXT: v_add_u32_e32 v12, vcc, s5, v2 +; GFX8-NEXT: v_addc_u32_e64 v15, s[0:1], v15, v13, s[0:1] +; GFX8-NEXT: v_addc_u32_e32 v13, vcc, 0, v3, vcc +; GFX8-NEXT: flat_load_dwordx2 v[8:9], v[8:9] ; GFX8-NEXT: flat_load_dwordx2 v[12:13], v[12:13] -; GFX8-NEXT: v_addc_u32_e32 v19, vcc, 0, v3, vcc -; GFX8-NEXT: flat_load_dwordx2 v[18:19], v[18:19] +; GFX8-NEXT: s_waitcnt vmcnt(4) +; GFX8-NEXT: v_add_u32_e64 v16, s[0:1], v16, v14 +; GFX8-NEXT: v_add_u32_e32 v14, vcc, s6, v2 +; GFX8-NEXT: v_addc_u32_e64 v17, s[0:1], v17, v15, s[0:1] +; GFX8-NEXT: v_addc_u32_e32 v15, vcc, 0, v3, vcc +; GFX8-NEXT: s_waitcnt vmcnt(3) +; GFX8-NEXT: v_add_u32_e64 v18, s[0:1], v18, v16 +; GFX8-NEXT: v_add_u32_e32 v16, vcc, s2, v2 +; GFX8-NEXT: flat_load_dwordx2 v[14:15], v[14:15] +; GFX8-NEXT: v_addc_u32_e64 v19, s[0:1], v19, v17, s[0:1] +; GFX8-NEXT: v_addc_u32_e32 v17, vcc, 0, v3, vcc +; GFX8-NEXT: flat_load_dwordx2 v[16:17], v[16:17] ; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x10000, v2 ; GFX8-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc -; GFX8-NEXT: s_waitcnt vmcnt(6) -; GFX8-NEXT: v_add_u32_e32 v8, vcc, v8, v22 -; GFX8-NEXT: v_addc_u32_e32 v9, vcc, v9, v23, vcc -; GFX8-NEXT: s_waitcnt vmcnt(5) -; GFX8-NEXT: v_add_u32_e32 v8, vcc, v14, v8 -; GFX8-NEXT: v_addc_u32_e32 v9, vcc, v15, v9, vcc -; GFX8-NEXT: v_add_u32_e32 v4, vcc, v4, v8 -; GFX8-NEXT: v_addc_u32_e32 v5, vcc, v5, v9, vcc +; GFX8-NEXT: v_add_u32_e32 v10, vcc, v10, v18 +; GFX8-NEXT: v_addc_u32_e32 v11, vcc, v11, v19, vcc ; GFX8-NEXT: s_waitcnt vmcnt(4) -; GFX8-NEXT: v_add_u32_e32 v4, vcc, v16, v4 -; GFX8-NEXT: v_addc_u32_e32 v5, vcc, v17, v5, vcc +; GFX8-NEXT: v_add_u32_e32 v4, vcc, v4, v10 +; GFX8-NEXT: v_addc_u32_e32 v5, vcc, v5, v11, vcc ; GFX8-NEXT: s_waitcnt vmcnt(3) -; GFX8-NEXT: v_add_u32_e32 v4, vcc, v6, v4 -; GFX8-NEXT: v_addc_u32_e32 v5, vcc, v7, v5, vcc +; GFX8-NEXT: v_add_u32_e32 v4, vcc, v8, v4 +; GFX8-NEXT: v_addc_u32_e32 v5, vcc, v9, v5, vcc ; GFX8-NEXT: s_waitcnt vmcnt(2) -; GFX8-NEXT: v_add_u32_e32 v4, vcc, v20, v4 -; GFX8-NEXT: v_addc_u32_e32 v5, vcc, v21, v5, vcc -; GFX8-NEXT: s_waitcnt vmcnt(1) ; GFX8-NEXT: v_add_u32_e32 v4, vcc, v12, v4 ; GFX8-NEXT: v_addc_u32_e32 v5, vcc, v13, v5, vcc +; GFX8-NEXT: s_waitcnt vmcnt(1) +; GFX8-NEXT: v_add_u32_e32 v4, vcc, v14, v4 +; GFX8-NEXT: v_addc_u32_e32 v5, vcc, v15, v5, vcc ; GFX8-NEXT: s_waitcnt vmcnt(0) -; GFX8-NEXT: v_add_u32_e32 v6, vcc, v18, v4 -; GFX8-NEXT: v_addc_u32_e32 v7, vcc, v19, v5, vcc +; GFX8-NEXT: v_add_u32_e32 v4, vcc, v16, v4 +; GFX8-NEXT: v_addc_u32_e32 v5, vcc, v17, v5, vcc ; GFX8-NEXT: s_cbranch_scc0 .LBB1_2 ; GFX8-NEXT: ; %bb.3: ; %while.cond.loopexit ; GFX8-NEXT: ; in Loop: Header=BB1_1 Depth=1 -; GFX8-NEXT: v_subrev_u32_e32 v11, vcc, 1, v11 +; GFX8-NEXT: v_subrev_u32_e32 v7, vcc, 1, v7 ; GFX8-NEXT: s_and_b64 vcc, exec, vcc ; GFX8-NEXT: s_cbranch_vccz .LBB1_1 ; GFX8-NEXT: ; %bb.4: ; %while.end ; GFX8-NEXT: v_mov_b32_e32 v1, s35 -; GFX8-NEXT: v_add_u32_e32 v0, vcc, s34, v10 +; GFX8-NEXT: v_add_u32_e32 v0, vcc, s34, v6 ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc -; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[6:7] +; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[4:5] ; GFX8-NEXT: s_endpgm ; ; GFX900-LABEL: clmem_read: @@ -523,57 +523,58 @@ define hidden amdgpu_kernel void @clmem_read(ptr addrspace(1) %buffer) { ; GFX900-NEXT: ; => This Inner Loop Header: Depth=2 ; GFX900-NEXT: v_add_co_u32_e32 v8, vcc, 0xffffe000, v2 ; GFX900-NEXT: v_addc_co_u32_e32 v9, vcc, -1, v3, vcc -; GFX900-NEXT: global_load_dwordx2 v[14:15], v[8:9], off offset:-2048 +; GFX900-NEXT: global_load_dwordx2 v[18:19], v[8:9], off offset:-2048 +; GFX900-NEXT: global_load_dwordx2 v[20:21], v[8:9], off +; GFX900-NEXT: v_add_co_u32_e32 v16, vcc, s2, v2 +; GFX900-NEXT: v_add_co_u32_e64 v14, s[0:1], s3, v2 +; GFX900-NEXT: v_addc_co_u32_e32 v17, vcc, -1, v3, vcc +; GFX900-NEXT: v_addc_co_u32_e64 v15, s[0:1], 0, v3, s[0:1] +; GFX900-NEXT: global_load_dwordx2 v[8:9], v[16:17], off offset:-2048 +; GFX900-NEXT: global_load_dwordx2 v[22:23], v[14:15], off offset:2048 ; GFX900-NEXT: global_load_dwordx2 v[10:11], v[2:3], off offset:-4096 ; GFX900-NEXT: global_load_dwordx2 v[12:13], v[2:3], off offset:-2048 ; GFX900-NEXT: s_addk_i32 s5, 0x2000 ; GFX900-NEXT: s_cmp_gt_u32 s5, 0x3fffff -; GFX900-NEXT: s_waitcnt vmcnt(2) -; GFX900-NEXT: v_add_co_u32_e32 v16, vcc, v14, v4 -; GFX900-NEXT: v_addc_co_u32_e32 v17, vcc, v15, v5, vcc -; GFX900-NEXT: global_load_dwordx2 v[4:5], v[2:3], off -; GFX900-NEXT: global_load_dwordx2 v[14:15], v[8:9], off -; GFX900-NEXT: s_waitcnt vmcnt(0) -; GFX900-NEXT: v_add_co_u32_e32 v14, vcc, v14, v16 -; GFX900-NEXT: v_addc_co_u32_e32 v15, vcc, v15, v17, vcc -; GFX900-NEXT: v_add_co_u32_e32 v8, vcc, s2, v2 -; GFX900-NEXT: v_addc_co_u32_e32 v9, vcc, -1, v3, vcc -; GFX900-NEXT: global_load_dwordx2 v[8:9], v[8:9], off offset:-2048 -; GFX900-NEXT: s_waitcnt vmcnt(0) -; GFX900-NEXT: v_add_co_u32_e32 v14, vcc, v8, v14 -; GFX900-NEXT: v_addc_co_u32_e32 v15, vcc, v9, v15, vcc -; GFX900-NEXT: global_load_dwordx2 v[8:9], v[2:3], off offset:2048 -; GFX900-NEXT: v_add_co_u32_e32 v14, vcc, v10, v14 -; GFX900-NEXT: v_addc_co_u32_e32 v11, vcc, v11, v15, vcc -; GFX900-NEXT: v_add_co_u32_e64 v14, s[0:1], v12, v14 -; GFX900-NEXT: v_addc_co_u32_e64 v15, s[0:1], v13, v11, s[0:1] -; GFX900-NEXT: v_add_co_u32_e32 v10, vcc, s3, v2 -; GFX900-NEXT: v_add_co_u32_e64 v12, s[0:1], s4, v2 -; GFX900-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v3, vcc -; GFX900-NEXT: v_addc_co_u32_e64 v13, vcc, 0, v3, s[0:1] -; GFX900-NEXT: v_add_co_u32_e32 v16, vcc, v4, v14 -; GFX900-NEXT: v_addc_co_u32_e32 v17, vcc, v5, v15, vcc -; GFX900-NEXT: global_load_dwordx2 v[4:5], v[12:13], off offset:-4096 -; GFX900-NEXT: global_load_dwordx2 v[14:15], v[10:11], off offset:2048 -; GFX900-NEXT: s_waitcnt vmcnt(2) +; GFX900-NEXT: s_waitcnt vmcnt(5) +; GFX900-NEXT: v_add_co_u32_e32 v14, vcc, v18, v4 +; GFX900-NEXT: v_addc_co_u32_e32 v15, vcc, v19, v5, vcc +; GFX900-NEXT: s_waitcnt vmcnt(4) +; GFX900-NEXT: v_add_co_u32_e32 v16, vcc, v20, v14 +; GFX900-NEXT: v_add_co_u32_e64 v14, s[0:1], s4, v2 +; GFX900-NEXT: v_addc_co_u32_e32 v17, vcc, v21, v15, vcc +; GFX900-NEXT: v_addc_co_u32_e64 v15, vcc, 0, v3, s[0:1] +; GFX900-NEXT: s_waitcnt vmcnt(3) ; GFX900-NEXT: v_add_co_u32_e32 v16, vcc, v8, v16 +; GFX900-NEXT: global_load_dwordx2 v[4:5], v[2:3], off ; GFX900-NEXT: v_addc_co_u32_e32 v17, vcc, v9, v17, vcc -; GFX900-NEXT: global_load_dwordx2 v[8:9], v[12:13], off -; GFX900-NEXT: global_load_dwordx2 v[10:11], v[12:13], off offset:2048 +; GFX900-NEXT: s_waitcnt vmcnt(2) +; GFX900-NEXT: v_add_co_u32_e32 v16, vcc, v10, v16 +; GFX900-NEXT: global_load_dwordx2 v[8:9], v[14:15], off offset:2048 +; GFX900-NEXT: v_addc_co_u32_e32 v17, vcc, v11, v17, vcc +; GFX900-NEXT: global_load_dwordx2 v[10:11], v[2:3], off offset:2048 +; GFX900-NEXT: s_waitcnt vmcnt(3) +; GFX900-NEXT: v_add_co_u32_e32 v18, vcc, v12, v16 +; GFX900-NEXT: v_addc_co_u32_e32 v19, vcc, v13, v17, vcc +; GFX900-NEXT: global_load_dwordx2 v[12:13], v[14:15], off offset:-4096 +; GFX900-NEXT: global_load_dwordx2 v[16:17], v[14:15], off ; GFX900-NEXT: v_add_co_u32_e32 v2, vcc, 0x10000, v2 ; GFX900-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc -; GFX900-NEXT: s_waitcnt vmcnt(3) -; GFX900-NEXT: v_add_co_u32_e32 v4, vcc, v4, v16 -; GFX900-NEXT: v_addc_co_u32_e32 v5, vcc, v5, v17, vcc +; GFX900-NEXT: s_waitcnt vmcnt(4) +; GFX900-NEXT: v_add_co_u32_e32 v4, vcc, v4, v18 +; GFX900-NEXT: v_addc_co_u32_e32 v5, vcc, v5, v19, vcc ; GFX900-NEXT: s_waitcnt vmcnt(2) -; GFX900-NEXT: v_add_co_u32_e32 v4, vcc, v14, v4 -; GFX900-NEXT: v_addc_co_u32_e32 v5, vcc, v15, v5, vcc +; GFX900-NEXT: v_add_co_u32_e32 v4, vcc, v10, v4 +; GFX900-NEXT: v_addc_co_u32_e32 v5, vcc, v11, v5, vcc ; GFX900-NEXT: s_waitcnt vmcnt(1) +; GFX900-NEXT: v_add_co_u32_e32 v4, vcc, v12, v4 +; GFX900-NEXT: v_addc_co_u32_e32 v5, vcc, v13, v5, vcc +; GFX900-NEXT: v_add_co_u32_e32 v4, vcc, v22, v4 +; GFX900-NEXT: v_addc_co_u32_e32 v5, vcc, v23, v5, vcc +; GFX900-NEXT: s_waitcnt vmcnt(0) +; GFX900-NEXT: v_add_co_u32_e32 v4, vcc, v16, v4 +; GFX900-NEXT: v_addc_co_u32_e32 v5, vcc, v17, v5, vcc ; GFX900-NEXT: v_add_co_u32_e32 v4, vcc, v8, v4 ; GFX900-NEXT: v_addc_co_u32_e32 v5, vcc, v9, v5, vcc -; GFX900-NEXT: s_waitcnt vmcnt(0) -; GFX900-NEXT: v_add_co_u32_e32 v4, vcc, v10, v4 -; GFX900-NEXT: v_addc_co_u32_e32 v5, vcc, v11, v5, vcc ; GFX900-NEXT: s_cbranch_scc0 .LBB1_2 ; GFX900-NEXT: ; %bb.3: ; %while.cond.loopexit ; GFX900-NEXT: ; in Loop: Header=BB1_1 Depth=1 diff --git a/llvm/test/CodeGen/AMDGPU/rem_i128.ll b/llvm/test/CodeGen/AMDGPU/rem_i128.ll index 163a64ce24fd3..b0d40488de6a1 100644 --- a/llvm/test/CodeGen/AMDGPU/rem_i128.ll +++ b/llvm/test/CodeGen/AMDGPU/rem_i128.ll @@ -46,73 +46,73 @@ define i128 @v_srem_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, 64, v7 ; GFX9-NEXT: v_addc_co_u32_e64 v8, s[6:7], 0, 0, vcc ; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5] -; GFX9-NEXT: v_ffbh_u32_e32 v10, v1 +; GFX9-NEXT: v_ffbh_u32_e32 v9, v3 ; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc ; GFX9-NEXT: v_ffbh_u32_e32 v7, v2 -; GFX9-NEXT: v_cndmask_b32_e64 v9, v8, 0, vcc ; GFX9-NEXT: v_add_u32_e32 v7, 32, v7 -; GFX9-NEXT: v_ffbh_u32_e32 v8, v3 -; GFX9-NEXT: v_min_u32_e32 v7, v7, v8 -; GFX9-NEXT: v_ffbh_u32_e32 v8, v0 -; GFX9-NEXT: v_add_u32_e32 v8, 32, v8 -; GFX9-NEXT: v_min_u32_e32 v8, v8, v10 -; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, 64, v8 +; GFX9-NEXT: v_min_u32_e32 v7, v7, v9 +; GFX9-NEXT: v_ffbh_u32_e32 v9, v0 +; GFX9-NEXT: v_add_u32_e32 v9, 32, v9 +; GFX9-NEXT: v_ffbh_u32_e32 v10, v1 +; GFX9-NEXT: v_min_u32_e32 v9, v9, v10 +; GFX9-NEXT: v_cndmask_b32_e64 v8, v8, 0, vcc +; GFX9-NEXT: v_add_co_u32_e32 v9, vcc, 64, v9 ; GFX9-NEXT: v_addc_co_u32_e64 v10, s[6:7], 0, 0, vcc ; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] ; GFX9-NEXT: v_mov_b32_e32 v23, v20 -; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v7, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v7, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v10, v10, 0, vcc -; GFX9-NEXT: v_sub_co_u32_e32 v8, vcc, v6, v7 -; GFX9-NEXT: v_subb_co_u32_e32 v9, vcc, v9, v10, vcc +; GFX9-NEXT: v_sub_co_u32_e32 v6, vcc, v6, v7 +; GFX9-NEXT: v_subb_co_u32_e32 v7, vcc, v8, v10, vcc ; GFX9-NEXT: v_subb_co_u32_e64 v10, s[6:7], 0, 0, vcc ; GFX9-NEXT: v_subb_co_u32_e64 v11, s[6:7], 0, 0, s[6:7] ; GFX9-NEXT: s_mov_b64 s[6:7], 0x7f -; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[8:9] -; GFX9-NEXT: v_or_b32_e32 v13, v9, v11 -; GFX9-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc +; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[6:7] +; GFX9-NEXT: v_or_b32_e32 v13, v7, v11 +; GFX9-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc ; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[10:11] -; GFX9-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc +; GFX9-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc ; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[10:11] -; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc -; GFX9-NEXT: v_and_b32_e32 v6, 1, v6 -; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6 -; GFX9-NEXT: v_xor_b32_e32 v6, 0x7f, v8 -; GFX9-NEXT: v_or_b32_e32 v12, v6, v10 +; GFX9-NEXT: v_cndmask_b32_e32 v8, v9, v8, vcc +; GFX9-NEXT: v_and_b32_e32 v8, 1, v8 +; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v8 +; GFX9-NEXT: v_xor_b32_e32 v8, 0x7f, v6 +; GFX9-NEXT: v_or_b32_e32 v12, v8, v10 ; GFX9-NEXT: s_or_b64 s[4:5], s[4:5], vcc ; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[12:13] ; GFX9-NEXT: s_xor_b64 s[6:7], s[4:5], -1 -; GFX9-NEXT: v_cndmask_b32_e64 v7, v3, 0, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e64 v6, v2, 0, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v9, v3, 0, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v8, v2, 0, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v12, v1, 0, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v13, v0, 0, s[4:5] ; GFX9-NEXT: s_and_b64 s[4:5], s[6:7], vcc ; GFX9-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB0_6 ; GFX9-NEXT: ; %bb.1: ; %udiv-bb1 -; GFX9-NEXT: v_add_co_u32_e32 v24, vcc, 1, v8 -; GFX9-NEXT: v_addc_co_u32_e32 v25, vcc, 0, v9, vcc +; GFX9-NEXT: v_add_co_u32_e32 v24, vcc, 1, v6 +; GFX9-NEXT: v_addc_co_u32_e32 v25, vcc, 0, v7, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v26, vcc, 0, v10, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v27, vcc, 0, v11, vcc -; GFX9-NEXT: v_sub_u32_e32 v11, 0x7f, v8 +; GFX9-NEXT: v_sub_u32_e32 v11, 0x7f, v6 ; GFX9-NEXT: v_sub_u32_e32 v9, 64, v11 -; GFX9-NEXT: v_lshlrev_b64 v[6:7], v11, v[2:3] +; GFX9-NEXT: v_lshlrev_b64 v[7:8], v11, v[2:3] ; GFX9-NEXT: v_lshrrev_b64 v[9:10], v9, v[0:1] -; GFX9-NEXT: s_xor_b64 s[8:9], vcc, -1 -; GFX9-NEXT: v_or_b32_e32 v9, v6, v9 -; GFX9-NEXT: v_sub_u32_e32 v6, 63, v8 -; GFX9-NEXT: v_or_b32_e32 v10, v7, v10 +; GFX9-NEXT: v_sub_u32_e32 v6, 63, v6 +; GFX9-NEXT: v_or_b32_e32 v8, v8, v10 +; GFX9-NEXT: v_or_b32_e32 v10, v7, v9 ; GFX9-NEXT: v_lshlrev_b64 v[6:7], v6, v[0:1] +; GFX9-NEXT: s_xor_b64 s[8:9], vcc, -1 ; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v11 -; GFX9-NEXT: v_cndmask_b32_e32 v6, v6, v9, vcc -; GFX9-NEXT: v_lshlrev_b64 v[8:9], v11, v[0:1] -; GFX9-NEXT: v_cndmask_b32_e32 v7, v7, v10, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v11 -; GFX9-NEXT: v_cndmask_b32_e64 v7, v7, v3, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v2, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e32 v9, 0, v9, vcc +; GFX9-NEXT: v_cndmask_b32_e64 v9, v7, v3, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e32 v8, v6, v10, vcc +; GFX9-NEXT: v_lshlrev_b64 v[6:7], v11, v[0:1] +; GFX9-NEXT: v_cndmask_b32_e64 v8, v8, v2, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e32 v7, 0, v7, vcc ; GFX9-NEXT: v_mov_b32_e32 v10, 0 ; GFX9-NEXT: v_mov_b32_e32 v11, 0 -; GFX9-NEXT: v_cndmask_b32_e32 v8, 0, v8, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v6, 0, v6, vcc ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], s[8:9] ; GFX9-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB0_5 @@ -127,97 +127,97 @@ define i128 @v_srem_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-NEXT: v_lshrrev_b64 v[10:11], v10, v[2:3] ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v24 ; GFX9-NEXT: v_cndmask_b32_e32 v11, v11, v13, vcc -; GFX9-NEXT: v_cndmask_b32_e64 v15, v11, v1, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v13, v11, v1, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e32 v12, v10, v12, vcc ; GFX9-NEXT: v_lshrrev_b64 v[10:11], v24, v[2:3] -; GFX9-NEXT: v_cndmask_b32_e64 v14, v12, v0, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v12, v12, v0, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e32 v17, 0, v11, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v16, 0, v10, vcc ; GFX9-NEXT: v_add_co_u32_e32 v28, vcc, -1, v22 ; GFX9-NEXT: v_addc_co_u32_e32 v29, vcc, -1, v21, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v30, vcc, -1, v4, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v31, vcc, -1, v5, vcc -; GFX9-NEXT: v_mov_b32_e32 v12, 0 -; GFX9-NEXT: v_mov_b32_e32 v13, 0 -; GFX9-NEXT: s_mov_b64 s[4:5], 0 +; GFX9-NEXT: v_mov_b32_e32 v14, 0 +; GFX9-NEXT: v_mov_b32_e32 v15, 0 +; GFX9-NEXT: s_mov_b64 s[10:11], 0 ; GFX9-NEXT: v_mov_b32_e32 v18, 0 ; GFX9-NEXT: v_mov_b32_e32 v19, 0 ; GFX9-NEXT: v_mov_b32_e32 v11, 0 ; GFX9-NEXT: .LBB0_3: ; %udiv-do-while ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX9-NEXT: v_lshlrev_b64 v[32:33], 1, v[8:9] ; GFX9-NEXT: v_lshlrev_b64 v[16:17], 1, v[16:17] -; GFX9-NEXT: v_or_b32_e32 v8, v18, v32 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 31, v15 -; GFX9-NEXT: v_lshlrev_b64 v[14:15], 1, v[14:15] -; GFX9-NEXT: v_or_b32_e32 v16, v16, v18 -; GFX9-NEXT: v_lshrrev_b32_e32 v18, 31, v7 -; GFX9-NEXT: v_or_b32_e32 v14, v14, v18 -; GFX9-NEXT: v_sub_co_u32_e32 v18, vcc, v28, v14 -; GFX9-NEXT: v_subb_co_u32_e32 v18, vcc, v29, v15, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v18, vcc, v30, v16, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v18, vcc, v31, v17, vcc -; GFX9-NEXT: v_ashrrev_i32_e32 v32, 31, v18 -; GFX9-NEXT: v_and_b32_e32 v18, v32, v22 -; GFX9-NEXT: v_lshrrev_b32_e32 v10, 31, v9 -; GFX9-NEXT: v_or_b32_e32 v9, v19, v33 -; GFX9-NEXT: v_and_b32_e32 v19, v32, v21 -; GFX9-NEXT: v_sub_co_u32_e32 v14, vcc, v14, v18 -; GFX9-NEXT: v_subb_co_u32_e32 v15, vcc, v15, v19, vcc -; GFX9-NEXT: v_and_b32_e32 v18, v32, v4 -; GFX9-NEXT: v_and_b32_e32 v19, v32, v5 -; GFX9-NEXT: v_subb_co_u32_e32 v16, vcc, v16, v18, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v17, vcc, v17, v19, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v10, 31, v13 +; GFX9-NEXT: v_lshlrev_b64 v[12:13], 1, v[12:13] +; GFX9-NEXT: v_or_b32_e32 v10, v16, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v16, 31, v9 +; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] +; GFX9-NEXT: v_or_b32_e32 v12, v12, v16 +; GFX9-NEXT: v_lshrrev_b32_e32 v16, 31, v7 +; GFX9-NEXT: v_or3_b32 v8, v8, v16, v14 +; GFX9-NEXT: v_sub_co_u32_e64 v16, s[4:5], v28, v12 +; GFX9-NEXT: v_subb_co_u32_e64 v16, s[4:5], v29, v13, s[4:5] +; GFX9-NEXT: v_lshlrev_b64 v[6:7], 1, v[6:7] +; GFX9-NEXT: v_subb_co_u32_e64 v16, s[4:5], v30, v10, s[4:5] ; GFX9-NEXT: v_add_co_u32_e32 v24, vcc, -1, v24 +; GFX9-NEXT: v_subb_co_u32_e64 v16, s[4:5], v31, v17, s[4:5] ; GFX9-NEXT: v_addc_co_u32_e32 v25, vcc, -1, v25, vcc +; GFX9-NEXT: v_or_b32_e32 v6, v18, v6 +; GFX9-NEXT: v_ashrrev_i32_e32 v18, 31, v16 ; GFX9-NEXT: v_addc_co_u32_e32 v26, vcc, -1, v26, vcc +; GFX9-NEXT: v_and_b32_e32 v16, v18, v22 ; GFX9-NEXT: v_addc_co_u32_e32 v27, vcc, -1, v27, vcc -; GFX9-NEXT: v_lshlrev_b64 v[6:7], 1, v[6:7] -; GFX9-NEXT: v_or_b32_e32 v18, v24, v26 -; GFX9-NEXT: v_or_b32_e32 v19, v25, v27 -; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[18:19] -; GFX9-NEXT: v_or3_b32 v6, v6, v10, v12 -; GFX9-NEXT: v_and_b32_e32 v10, 1, v32 +; GFX9-NEXT: v_or_b32_e32 v7, v19, v7 +; GFX9-NEXT: v_and_b32_e32 v19, v18, v21 +; GFX9-NEXT: v_sub_co_u32_e64 v12, s[4:5], v12, v16 +; GFX9-NEXT: v_or_b32_e32 v32, v24, v26 +; GFX9-NEXT: v_or_b32_e32 v33, v25, v27 +; GFX9-NEXT: v_subb_co_u32_e64 v13, s[4:5], v13, v19, s[4:5] +; GFX9-NEXT: v_and_b32_e32 v16, v18, v4 +; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[32:33] +; GFX9-NEXT: v_and_b32_e32 v19, v18, v5 +; GFX9-NEXT: v_subb_co_u32_e64 v16, s[4:5], v10, v16, s[4:5] +; GFX9-NEXT: v_subb_co_u32_e64 v17, s[4:5], v17, v19, s[4:5] +; GFX9-NEXT: v_and_b32_e32 v10, 1, v18 ; GFX9-NEXT: v_mov_b32_e32 v19, v11 -; GFX9-NEXT: v_or3_b32 v7, v7, 0, v13 -; GFX9-NEXT: s_or_b64 s[4:5], vcc, s[4:5] +; GFX9-NEXT: v_or3_b32 v9, v9, 0, v15 +; GFX9-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GFX9-NEXT: v_mov_b32_e32 v18, v10 -; GFX9-NEXT: s_andn2_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GFX9-NEXT: s_cbranch_execnz .LBB0_3 ; GFX9-NEXT: ; %bb.4: ; %Flow -; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_or_b64 exec, exec, s[10:11] ; GFX9-NEXT: .LBB0_5: ; %Flow2 ; GFX9-NEXT: s_or_b64 exec, exec, s[8:9] -; GFX9-NEXT: v_lshlrev_b64 v[6:7], 1, v[6:7] -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 31, v9 ; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] -; GFX9-NEXT: v_or_b32_e32 v6, v6, v12 -; GFX9-NEXT: v_or_b32_e32 v12, v11, v9 -; GFX9-NEXT: v_or_b32_e32 v13, v10, v8 +; GFX9-NEXT: v_lshrrev_b32_e32 v12, 31, v7 +; GFX9-NEXT: v_lshlrev_b64 v[6:7], 1, v[6:7] +; GFX9-NEXT: v_or_b32_e32 v8, v8, v12 +; GFX9-NEXT: v_or_b32_e32 v12, v11, v7 +; GFX9-NEXT: v_or_b32_e32 v13, v10, v6 ; GFX9-NEXT: .LBB0_6: ; %Flow3 ; GFX9-NEXT: s_or_b64 exec, exec, s[6:7] -; GFX9-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v22, v13, 0 -; GFX9-NEXT: v_mov_b32_e32 v10, 0 -; GFX9-NEXT: v_mul_lo_u32 v11, v12, v4 -; GFX9-NEXT: v_mul_lo_u32 v16, v13, v5 -; GFX9-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v21, v13, v[9:10] -; GFX9-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v13, v4, 0 -; GFX9-NEXT: v_mul_lo_u32 v13, v6, v21 -; GFX9-NEXT: v_mul_lo_u32 v17, v7, v22 -; GFX9-NEXT: v_mov_b32_e32 v9, v14 -; GFX9-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v22, v12, v[9:10] -; GFX9-NEXT: v_add3_u32 v5, v5, v16, v11 -; GFX9-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v6, v22, v[4:5] -; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, v15, v10 -; GFX9-NEXT: v_addc_co_u32_e64 v7, s[4:5], 0, 0, vcc -; GFX9-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v21, v12, v[6:7] -; GFX9-NEXT: v_add3_u32 v5, v17, v5, v13 -; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, v6, v4 -; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, v7, v5, vcc -; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v8 -; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v9, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v2, vcc, v2, v4, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v3, vcc, v3, v5, vcc +; GFX9-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v22, v13, 0 +; GFX9-NEXT: v_mov_b32_e32 v16, 0 +; GFX9-NEXT: v_mul_lo_u32 v17, v13, v5 +; GFX9-NEXT: v_mul_lo_u32 v7, v12, v4 +; GFX9-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v21, v13, v[15:16] +; GFX9-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v13, v4, 0 +; GFX9-NEXT: v_mul_lo_u32 v13, v8, v21 +; GFX9-NEXT: v_mul_lo_u32 v9, v9, v22 +; GFX9-NEXT: v_mov_b32_e32 v15, v5 +; GFX9-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v22, v12, v[15:16] +; GFX9-NEXT: v_add3_u32 v11, v11, v17, v7 +; GFX9-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v8, v22, v[10:11] +; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, v6, v5 +; GFX9-NEXT: v_addc_co_u32_e64 v6, s[4:5], 0, 0, vcc +; GFX9-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v21, v12, v[5:6] +; GFX9-NEXT: v_add3_u32 v8, v9, v8, v13 +; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, v5, v7 +; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, v6, v8, vcc +; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v14 +; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v4, vcc +; GFX9-NEXT: v_subb_co_u32_e32 v2, vcc, v2, v5, vcc +; GFX9-NEXT: v_subb_co_u32_e32 v3, vcc, v3, v6, vcc ; GFX9-NEXT: v_xor_b32_e32 v0, v0, v20 ; GFX9-NEXT: v_xor_b32_e32 v1, v1, v23 ; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v20 @@ -1473,72 +1473,72 @@ define i128 @v_urem_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-NEXT: v_add_co_u32_e32 v9, vcc, 64, v9 ; GFX9-NEXT: v_addc_co_u32_e64 v10, s[6:7], 0, 0, vcc ; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[6:7] -; GFX9-NEXT: v_ffbh_u32_e32 v12, v1 +; GFX9-NEXT: v_ffbh_u32_e32 v11, v3 ; GFX9-NEXT: v_cndmask_b32_e32 v8, v9, v8, vcc ; GFX9-NEXT: v_ffbh_u32_e32 v9, v2 -; GFX9-NEXT: v_cndmask_b32_e64 v11, v10, 0, vcc ; GFX9-NEXT: v_add_u32_e32 v9, 32, v9 -; GFX9-NEXT: v_ffbh_u32_e32 v10, v3 -; GFX9-NEXT: v_min_u32_e32 v9, v9, v10 -; GFX9-NEXT: v_ffbh_u32_e32 v10, v0 -; GFX9-NEXT: v_add_u32_e32 v10, 32, v10 -; GFX9-NEXT: v_min_u32_e32 v10, v10, v12 -; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, 64, v10 +; GFX9-NEXT: v_min_u32_e32 v9, v9, v11 +; GFX9-NEXT: v_ffbh_u32_e32 v11, v0 +; GFX9-NEXT: v_add_u32_e32 v11, 32, v11 +; GFX9-NEXT: v_ffbh_u32_e32 v12, v1 +; GFX9-NEXT: v_min_u32_e32 v11, v11, v12 +; GFX9-NEXT: v_cndmask_b32_e64 v10, v10, 0, vcc +; GFX9-NEXT: v_add_co_u32_e32 v11, vcc, 64, v11 ; GFX9-NEXT: v_addc_co_u32_e64 v12, s[6:7], 0, 0, vcc ; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] -; GFX9-NEXT: v_cndmask_b32_e32 v9, v10, v9, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v9, v11, v9, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v12, v12, 0, vcc -; GFX9-NEXT: v_sub_co_u32_e32 v10, vcc, v8, v9 -; GFX9-NEXT: v_subb_co_u32_e32 v11, vcc, v11, v12, vcc +; GFX9-NEXT: v_sub_co_u32_e32 v8, vcc, v8, v9 +; GFX9-NEXT: v_subb_co_u32_e32 v9, vcc, v10, v12, vcc ; GFX9-NEXT: v_subb_co_u32_e64 v12, s[6:7], 0, 0, vcc ; GFX9-NEXT: v_subb_co_u32_e64 v13, s[6:7], 0, 0, s[6:7] ; GFX9-NEXT: s_mov_b64 s[6:7], 0x7f -; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[10:11] -; GFX9-NEXT: v_or_b32_e32 v15, v11, v13 -; GFX9-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc +; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[8:9] +; GFX9-NEXT: v_or_b32_e32 v15, v9, v13 +; GFX9-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc ; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[12:13] -; GFX9-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc +; GFX9-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc ; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[12:13] -; GFX9-NEXT: v_cndmask_b32_e32 v8, v9, v8, vcc -; GFX9-NEXT: v_and_b32_e32 v8, 1, v8 -; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v8 -; GFX9-NEXT: v_xor_b32_e32 v8, 0x7f, v10 -; GFX9-NEXT: v_or_b32_e32 v14, v8, v12 +; GFX9-NEXT: v_cndmask_b32_e32 v10, v11, v10, vcc +; GFX9-NEXT: v_and_b32_e32 v10, 1, v10 +; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v10 +; GFX9-NEXT: v_xor_b32_e32 v10, 0x7f, v8 +; GFX9-NEXT: v_or_b32_e32 v14, v10, v12 ; GFX9-NEXT: s_or_b64 s[4:5], s[4:5], vcc ; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[14:15] ; GFX9-NEXT: s_xor_b64 s[6:7], s[4:5], -1 -; GFX9-NEXT: v_cndmask_b32_e64 v9, v3, 0, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e64 v8, v2, 0, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v11, v3, 0, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v10, v2, 0, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v14, v1, 0, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v15, v0, 0, s[4:5] ; GFX9-NEXT: s_and_b64 s[4:5], s[6:7], vcc ; GFX9-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB1_6 ; GFX9-NEXT: ; %bb.1: ; %udiv-bb1 -; GFX9-NEXT: v_add_co_u32_e32 v22, vcc, 1, v10 -; GFX9-NEXT: v_addc_co_u32_e32 v23, vcc, 0, v11, vcc +; GFX9-NEXT: v_add_co_u32_e32 v22, vcc, 1, v8 +; GFX9-NEXT: v_addc_co_u32_e32 v23, vcc, 0, v9, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v24, vcc, 0, v12, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v25, vcc, 0, v13, vcc -; GFX9-NEXT: v_sub_u32_e32 v13, 0x7f, v10 +; GFX9-NEXT: v_sub_u32_e32 v13, 0x7f, v8 ; GFX9-NEXT: v_sub_u32_e32 v11, 64, v13 -; GFX9-NEXT: v_lshlrev_b64 v[8:9], v13, v[2:3] +; GFX9-NEXT: v_lshlrev_b64 v[9:10], v13, v[2:3] ; GFX9-NEXT: v_lshrrev_b64 v[11:12], v11, v[0:1] -; GFX9-NEXT: s_xor_b64 s[8:9], vcc, -1 -; GFX9-NEXT: v_or_b32_e32 v11, v8, v11 -; GFX9-NEXT: v_sub_u32_e32 v8, 63, v10 -; GFX9-NEXT: v_or_b32_e32 v12, v9, v12 +; GFX9-NEXT: v_sub_u32_e32 v8, 63, v8 +; GFX9-NEXT: v_or_b32_e32 v10, v10, v12 +; GFX9-NEXT: v_or_b32_e32 v12, v9, v11 ; GFX9-NEXT: v_lshlrev_b64 v[8:9], v8, v[0:1] +; GFX9-NEXT: s_xor_b64 s[8:9], vcc, -1 ; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v13 -; GFX9-NEXT: v_cndmask_b32_e32 v8, v8, v11, vcc -; GFX9-NEXT: v_lshlrev_b64 v[10:11], v13, v[0:1] -; GFX9-NEXT: v_cndmask_b32_e32 v9, v9, v12, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v13 -; GFX9-NEXT: v_cndmask_b32_e64 v9, v9, v3, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e64 v8, v8, v2, s[4:5] -; GFX9-NEXT: v_cndmask_b32_e32 v11, 0, v11, vcc +; GFX9-NEXT: v_cndmask_b32_e64 v11, v9, v3, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e32 v10, v8, v12, vcc +; GFX9-NEXT: v_lshlrev_b64 v[8:9], v13, v[0:1] +; GFX9-NEXT: v_cndmask_b32_e64 v10, v10, v2, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e32 v9, 0, v9, vcc ; GFX9-NEXT: v_mov_b32_e32 v12, 0 ; GFX9-NEXT: v_mov_b32_e32 v13, 0 -; GFX9-NEXT: v_cndmask_b32_e32 v10, 0, v10, vcc +; GFX9-NEXT: v_cndmask_b32_e32 v8, 0, v8, vcc ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], s[8:9] ; GFX9-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GFX9-NEXT: s_cbranch_execz .LBB1_5 @@ -1553,95 +1553,95 @@ define i128 @v_urem_i128_vv(i128 %lhs, i128 %rhs) { ; GFX9-NEXT: v_lshrrev_b64 v[12:13], v12, v[2:3] ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v22 ; GFX9-NEXT: v_cndmask_b32_e32 v13, v13, v15, vcc -; GFX9-NEXT: v_cndmask_b32_e64 v17, v13, v1, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v15, v13, v1, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e32 v14, v12, v14, vcc ; GFX9-NEXT: v_lshrrev_b64 v[12:13], v22, v[2:3] -; GFX9-NEXT: v_cndmask_b32_e64 v16, v14, v0, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e64 v14, v14, v0, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e32 v19, 0, v13, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v18, 0, v12, vcc ; GFX9-NEXT: v_add_co_u32_e32 v26, vcc, -1, v4 ; GFX9-NEXT: v_addc_co_u32_e32 v27, vcc, -1, v5, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v28, vcc, -1, v6, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v29, vcc, -1, v7, vcc -; GFX9-NEXT: v_mov_b32_e32 v14, 0 -; GFX9-NEXT: v_mov_b32_e32 v15, 0 -; GFX9-NEXT: s_mov_b64 s[4:5], 0 +; GFX9-NEXT: v_mov_b32_e32 v16, 0 +; GFX9-NEXT: v_mov_b32_e32 v17, 0 +; GFX9-NEXT: s_mov_b64 s[10:11], 0 ; GFX9-NEXT: v_mov_b32_e32 v20, 0 ; GFX9-NEXT: v_mov_b32_e32 v21, 0 ; GFX9-NEXT: v_mov_b32_e32 v13, 0 ; GFX9-NEXT: .LBB1_3: ; %udiv-do-while ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX9-NEXT: v_lshlrev_b64 v[30:31], 1, v[10:11] ; GFX9-NEXT: v_lshlrev_b64 v[18:19], 1, v[18:19] -; GFX9-NEXT: v_or_b32_e32 v10, v20, v30 -; GFX9-NEXT: v_lshrrev_b32_e32 v20, 31, v17 -; GFX9-NEXT: v_lshlrev_b64 v[16:17], 1, v[16:17] -; GFX9-NEXT: v_or_b32_e32 v18, v18, v20 -; GFX9-NEXT: v_lshrrev_b32_e32 v20, 31, v9 -; GFX9-NEXT: v_or_b32_e32 v16, v16, v20 -; GFX9-NEXT: v_sub_co_u32_e32 v20, vcc, v26, v16 -; GFX9-NEXT: v_subb_co_u32_e32 v20, vcc, v27, v17, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v20, vcc, v28, v18, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v20, vcc, v29, v19, vcc -; GFX9-NEXT: v_ashrrev_i32_e32 v30, 31, v20 -; GFX9-NEXT: v_and_b32_e32 v20, v30, v4 -; GFX9-NEXT: v_lshrrev_b32_e32 v12, 31, v11 -; GFX9-NEXT: v_or_b32_e32 v11, v21, v31 -; GFX9-NEXT: v_and_b32_e32 v21, v30, v5 -; GFX9-NEXT: v_sub_co_u32_e32 v16, vcc, v16, v20 -; GFX9-NEXT: v_subb_co_u32_e32 v17, vcc, v17, v21, vcc -; GFX9-NEXT: v_and_b32_e32 v20, v30, v6 -; GFX9-NEXT: v_and_b32_e32 v21, v30, v7 -; GFX9-NEXT: v_subb_co_u32_e32 v18, vcc, v18, v20, vcc -; GFX9-NEXT: v_subb_co_u32_e32 v19, vcc, v19, v21, vcc +; GFX9-NEXT: v_lshrrev_b32_e32 v12, 31, v15 +; GFX9-NEXT: v_lshlrev_b64 v[14:15], 1, v[14:15] +; GFX9-NEXT: v_or_b32_e32 v12, v18, v12 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 31, v11 +; GFX9-NEXT: v_lshlrev_b64 v[10:11], 1, v[10:11] +; GFX9-NEXT: v_or_b32_e32 v14, v14, v18 +; GFX9-NEXT: v_lshrrev_b32_e32 v18, 31, v9 +; GFX9-NEXT: v_or3_b32 v10, v10, v18, v16 +; GFX9-NEXT: v_sub_co_u32_e64 v18, s[4:5], v26, v14 +; GFX9-NEXT: v_subb_co_u32_e64 v18, s[4:5], v27, v15, s[4:5] +; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] +; GFX9-NEXT: v_subb_co_u32_e64 v18, s[4:5], v28, v12, s[4:5] ; GFX9-NEXT: v_add_co_u32_e32 v22, vcc, -1, v22 +; GFX9-NEXT: v_subb_co_u32_e64 v18, s[4:5], v29, v19, s[4:5] ; GFX9-NEXT: v_addc_co_u32_e32 v23, vcc, -1, v23, vcc +; GFX9-NEXT: v_or_b32_e32 v8, v20, v8 +; GFX9-NEXT: v_ashrrev_i32_e32 v20, 31, v18 ; GFX9-NEXT: v_addc_co_u32_e32 v24, vcc, -1, v24, vcc +; GFX9-NEXT: v_and_b32_e32 v18, v20, v4 ; GFX9-NEXT: v_addc_co_u32_e32 v25, vcc, -1, v25, vcc -; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] -; GFX9-NEXT: v_or_b32_e32 v20, v22, v24 -; GFX9-NEXT: v_or_b32_e32 v21, v23, v25 -; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[20:21] -; GFX9-NEXT: v_or3_b32 v8, v8, v12, v14 -; GFX9-NEXT: v_and_b32_e32 v12, 1, v30 +; GFX9-NEXT: v_or_b32_e32 v9, v21, v9 +; GFX9-NEXT: v_and_b32_e32 v21, v20, v5 +; GFX9-NEXT: v_sub_co_u32_e64 v14, s[4:5], v14, v18 +; GFX9-NEXT: v_or_b32_e32 v30, v22, v24 +; GFX9-NEXT: v_or_b32_e32 v31, v23, v25 +; GFX9-NEXT: v_subb_co_u32_e64 v15, s[4:5], v15, v21, s[4:5] +; GFX9-NEXT: v_and_b32_e32 v18, v20, v6 +; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[30:31] +; GFX9-NEXT: v_and_b32_e32 v21, v20, v7 +; GFX9-NEXT: v_subb_co_u32_e64 v18, s[4:5], v12, v18, s[4:5] +; GFX9-NEXT: v_subb_co_u32_e64 v19, s[4:5], v19, v21, s[4:5] +; GFX9-NEXT: v_and_b32_e32 v12, 1, v20 ; GFX9-NEXT: v_mov_b32_e32 v21, v13 -; GFX9-NEXT: v_or3_b32 v9, v9, 0, v15 -; GFX9-NEXT: s_or_b64 s[4:5], vcc, s[4:5] +; GFX9-NEXT: v_or3_b32 v11, v11, 0, v17 +; GFX9-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GFX9-NEXT: v_mov_b32_e32 v20, v12 -; GFX9-NEXT: s_andn2_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GFX9-NEXT: s_cbranch_execnz .LBB1_3 ; GFX9-NEXT: ; %bb.4: ; %Flow -; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX9-NEXT: s_or_b64 exec, exec, s[10:11] ; GFX9-NEXT: .LBB1_5: ; %Flow2 ; GFX9-NEXT: s_or_b64 exec, exec, s[8:9] -; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] -; GFX9-NEXT: v_lshrrev_b32_e32 v14, 31, v11 ; GFX9-NEXT: v_lshlrev_b64 v[10:11], 1, v[10:11] -; GFX9-NEXT: v_or_b32_e32 v8, v8, v14 -; GFX9-NEXT: v_or_b32_e32 v14, v13, v11 -; GFX9-NEXT: v_or_b32_e32 v15, v12, v10 +; GFX9-NEXT: v_lshrrev_b32_e32 v14, 31, v9 +; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9] +; GFX9-NEXT: v_or_b32_e32 v10, v10, v14 +; GFX9-NEXT: v_or_b32_e32 v14, v13, v9 +; GFX9-NEXT: v_or_b32_e32 v15, v12, v8 ; GFX9-NEXT: .LBB1_6: ; %Flow3 ; GFX9-NEXT: s_or_b64 exec, exec, s[6:7] -; GFX9-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v4, v15, 0 -; GFX9-NEXT: v_mov_b32_e32 v12, 0 -; GFX9-NEXT: v_mul_lo_u32 v13, v14, v6 -; GFX9-NEXT: v_mul_lo_u32 v18, v15, v7 -; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v5, v15, v[11:12] -; GFX9-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v15, v6, 0 -; GFX9-NEXT: v_mul_lo_u32 v15, v8, v5 -; GFX9-NEXT: v_mul_lo_u32 v19, v9, v4 -; GFX9-NEXT: v_mov_b32_e32 v11, v16 -; GFX9-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v4, v14, v[11:12] -; GFX9-NEXT: v_add3_u32 v7, v7, v18, v13 -; GFX9-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v8, v4, v[6:7] -; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, v17, v12 -; GFX9-NEXT: v_addc_co_u32_e64 v9, s[4:5], 0, 0, vcc -; GFX9-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v5, v14, v[8:9] -; GFX9-NEXT: v_add3_u32 v7, v19, v7, v15 -; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, v4, v6 +; GFX9-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v4, v15, 0 +; GFX9-NEXT: v_mov_b32_e32 v18, 0 +; GFX9-NEXT: v_mul_lo_u32 v19, v15, v7 +; GFX9-NEXT: v_mul_lo_u32 v9, v14, v6 +; GFX9-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v5, v15, v[17:18] +; GFX9-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v15, v6, 0 +; GFX9-NEXT: v_mul_lo_u32 v15, v10, v5 +; GFX9-NEXT: v_mul_lo_u32 v11, v11, v4 +; GFX9-NEXT: v_mov_b32_e32 v17, v7 +; GFX9-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v4, v14, v[17:18] +; GFX9-NEXT: v_add3_u32 v13, v13, v19, v9 +; GFX9-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v10, v4, v[12:13] +; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, v8, v7 +; GFX9-NEXT: v_addc_co_u32_e64 v8, s[4:5], 0, 0, vcc +; GFX9-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v5, v14, v[7:8] +; GFX9-NEXT: v_add3_u32 v7, v11, v10, v15 +; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, v4, v9 ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, v5, v7, vcc -; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v10 -; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v11, vcc +; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v16 +; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v6, vcc ; GFX9-NEXT: v_subb_co_u32_e32 v2, vcc, v2, v4, vcc ; GFX9-NEXT: v_subb_co_u32_e32 v3, vcc, v3, v5, vcc ; GFX9-NEXT: s_setpc_b64 s[30:31] diff --git a/llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll b/llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll index ce59330eed898..261b504d9de3a 100644 --- a/llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll +++ b/llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll @@ -121,11 +121,15 @@ define amdgpu_kernel void @test_spill_cost_reset( ; CHECK-NEXT: [[V_MOV_B32_e32_12:%[0-9]+]].sub1:vreg_128_align2 = V_MOV_B32_e32 0, implicit $exec, implicit $exec ; CHECK-NEXT: [[V_MOV_B32_e32_12:%[0-9]+]].sub2:vreg_128_align2 = V_MOV_B32_e32 0, implicit $exec, implicit $exec ; CHECK-NEXT: [[V_MOV_B32_e32_12:%[0-9]+]].sub3:vreg_128_align2 = V_MOV_B32_e32 0, implicit $exec, implicit $exec - ; CHECK-NEXT: [[COPY1:%[0-9]+]]:av_128_align2 = COPY %1891.sub0_sub1_sub2_sub3 - ; CHECK-NEXT: [[COPY2:%[0-9]+]]:av_128_align2 = COPY %1892.sub0_sub1_sub2_sub3 - ; CHECK-NEXT: [[COPY3:%[0-9]+]]:av_128_align2 = COPY %1891.sub4_sub5_sub6_sub7 - ; CHECK-NEXT: [[COPY4:%[0-9]+]]:av_128_align2 = COPY %1892.sub4_sub5_sub6_sub7 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 + ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 + ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 + ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 + ; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 + ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 + ; CHECK-NEXT: undef [[COPY4:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 + ; CHECK-NEXT: [[COPY4:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 ; CHECK-NEXT: undef [[COPY5:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 ; CHECK-NEXT: [[COPY5:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 ; CHECK-NEXT: undef [[COPY6:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 @@ -321,11 +325,9 @@ define amdgpu_kernel void @test_spill_cost_reset( ; CHECK-NEXT: undef [[COPY101:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 ; CHECK-NEXT: [[COPY101:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 ; CHECK-NEXT: undef [[COPY102:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 + ; CHECK-NEXT: [[COPY103:%[0-9]+]]:av_128_align2 = COPY %1892.sub0_sub1_sub2_sub3 ; CHECK-NEXT: [[COPY102:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 - ; CHECK-NEXT: undef [[COPY103:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 - ; CHECK-NEXT: [[COPY103:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 - ; CHECK-NEXT: undef [[COPY104:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 - ; CHECK-NEXT: [[COPY104:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 + ; CHECK-NEXT: [[COPY104:%[0-9]+]]:av_128_align2 = COPY %1891.sub0_sub1_sub2_sub3 ; CHECK-NEXT: undef [[COPY105:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 ; CHECK-NEXT: [[COPY105:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 ; CHECK-NEXT: undef [[COPY106:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 @@ -376,77 +378,71 @@ define amdgpu_kernel void @test_spill_cost_reset( ; CHECK-NEXT: [[COPY128:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 ; CHECK-NEXT: undef [[COPY129:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 ; CHECK-NEXT: [[COPY129:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 - ; CHECK-NEXT: undef [[COPY130:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 - ; CHECK-NEXT: [[COPY130:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 - ; CHECK-NEXT: undef [[COPY131:%[0-9]+]].sub0:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 - ; CHECK-NEXT: [[COPY131:%[0-9]+]].sub1:vreg_64_align2 = COPY [[V_MOV_B32_e32_]].sub0 + ; CHECK-NEXT: [[COPY130:%[0-9]+]]:av_128_align2 = COPY %1891.sub4_sub5_sub6_sub7 + ; CHECK-NEXT: [[COPY131:%[0-9]+]]:av_128_align2 = COPY %1892.sub4_sub5_sub6_sub7 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1.loop: ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.1(0x7c000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MOV_B32_e32_12:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_12]], 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[COPY131:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY131]], 8, [[COPY131]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[COPY130:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY130]], 8, [[COPY130]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_12:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_12]], 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_F32_16X16X32_F16_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY130]], [[COPY131]], [[V_MOV_B32_e32_12]], 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_F32_16X16X32_F16_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MFMA_F32_16X16X32_F16_vgprcd_e64_]], 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_F32_16X16X32_F16_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY130]], [[COPY131]], [[V_MFMA_F32_16X16X32_F16_vgprcd_e64_1]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY129:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY129]], 8, [[COPY129]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY128:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY128]], 8, [[COPY128]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY127:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY127]], 8, [[COPY127]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_11:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_11]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY126:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY126]], 8, [[COPY126]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY125:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY125]], 8, [[COPY125]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY124:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY124]], 8, [[COPY124]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_10:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_10]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY123:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY123]], 8, [[COPY123]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY122:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY122]], 8, [[COPY122]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY121:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY121]], 8, [[COPY121]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_9:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_9]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY120:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY120]], 8, [[COPY120]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY119:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY119]], 8, [[COPY119]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY118:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY118]], 8, [[COPY118]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_8:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_8]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY117:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY117]], 8, [[COPY117]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY116:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY116]], 8, [[COPY116]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_11:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_11]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY115:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY115]], 8, [[COPY115]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_7:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_7]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY114:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY114]], 8, [[COPY114]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY113:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY113]], 8, [[COPY113]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_10:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_10]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY112:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY112]], 8, [[COPY112]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_6:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_6]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY111:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY111]], 8, [[COPY111]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY110:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY110]], 8, [[COPY110]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_9:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_9]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY109:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY109]], 8, [[COPY109]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_5:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_5]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY108:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY108]], 8, [[COPY108]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY107:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY107]], 8, [[COPY107]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_8:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_8]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY106:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY106]], 8, [[COPY106]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_4:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_4]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY105:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY105]], 8, [[COPY105]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[COPY104:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY104]], 8, [[COPY104]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[COPY103:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY103]], 8, [[COPY103]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_3:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_3]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY102:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY102]], 8, [[COPY102]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_7:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_7]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY101:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY101]], 8, [[COPY101]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY100:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY100]], 8, [[COPY100]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_2]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY99:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY99]], 8, [[COPY99]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_6:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_6]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY98:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY98]], 8, [[COPY98]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY97:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY97]], 8, [[COPY97]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MOV_B32_e32_1]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY96:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY96]], 8, [[COPY96]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_5:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_5]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY95:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY95]], 8, [[COPY95]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY94:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY94]], 8, [[COPY94]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY93:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY93]], 8, [[COPY93]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_4:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_4]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY92:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY92]], 8, [[COPY92]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY91:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY91]], 8, [[COPY91]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_F32_16X16X32_F16_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY3]], [[COPY4]], [[V_MOV_B32_e32_12]], 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_F32_16X16X32_F16_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY1]], [[COPY2]], [[V_MFMA_F32_16X16X32_F16_vgprcd_e64_]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY90:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY90]], 8, [[COPY90]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_3:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_3]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY89:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY89]], 8, [[COPY89]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY88:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY88]], 8, [[COPY88]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_F32_16X16X32_F16_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY3]], [[COPY4]], [[V_MFMA_F32_16X16X32_F16_vgprcd_e64_1]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY87:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY87]], 8, [[COPY87]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_2]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY86:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY86]], 8, [[COPY86]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY85:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY85]], 8, [[COPY85]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY84:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY84]], 8, [[COPY84]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 [[COPY104]], [[COPY103]], [[V_MOV_B32_e32_1]], 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY83:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY83]], 8, [[COPY83]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY82:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY82]], 8, [[COPY82]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY81:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY81]], 8, [[COPY81]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec @@ -526,6 +522,10 @@ define amdgpu_kernel void @test_spill_cost_reset( ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY7]], 8, [[COPY7]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY6]], 8, [[COPY6]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY5]], 8, [[COPY5]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY4]], 8, [[COPY4]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY3]], 8, [[COPY3]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY2]], 8, [[COPY2]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY1]], 8, [[COPY1]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_MOV_B32_]], 1, implicit-def dead $scc ; CHECK-NEXT: S_CMP_LT_I32 [[S_MOV_B32_]], [[S_LOAD_DWORD_IMM]], implicit-def $scc ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[V_MOV_B32_e32_]], 8, [[V_MOV_B32_e32_]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll b/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll index 5aa2cc713a4ec..2b39dfaf639ac 100644 --- a/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll +++ b/llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll @@ -406,27 +406,31 @@ define amdgpu_kernel void @illegal_mfma_after_rewrite() #1 { ; CHECK-NEXT: v_mov_b32_e32 v10, v8 ; CHECK-NEXT: v_mov_b32_e32 v11, v8 ; CHECK-NEXT: v_cvt_f16_f32_e32 v2, v6 +; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[20:23], v[26:27], v[26:27], v[16:19] ; CHECK-NEXT: v_mov_b64_e32 v[0:1], 0 -; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[8:11], v[26:27], v[26:27], v[8:11] ; CHECK-NEXT: global_store_short v[0:1], v2, off +; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[8:11], v[26:27], v[26:27], v[8:11] ; CHECK-NEXT: buffer_wbl2 sc0 sc1 ; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: buffer_inv sc0 sc1 -; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[2:5], v[26:27], v[28:29], v[16:19] ; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[6:9], v[26:27], v[26:27], v[8:11] -; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[20:23], v[26:27], v[26:27], v[16:19] +; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[2:5], v[26:27], v[26:27], v[20:23] ; CHECK-NEXT: s_nop 5 ; CHECK-NEXT: v_cvt_f16_f32_e32 v10, v6 -; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[6:9], v[26:27], v[26:27], v[12:15] +; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[6:9], v[26:27], v[28:29], v[16:19] ; CHECK-NEXT: global_store_short v[0:1], v10, off -; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[2:5], v[26:27], v[26:27], v[2:5] +; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[6:9], v[26:27], v[26:27], v[6:9] ; CHECK-NEXT: buffer_wbl2 sc0 sc1 ; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: buffer_inv sc0 sc1 -; CHECK-NEXT: s_nop 1 +; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[10:13], v[26:27], v[26:27], v[12:15] +; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[6:9], v[28:29], v[26:27], v[6:9] +; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[2:5], v[30:31], v[26:27], v[2:5] +; CHECK-NEXT: s_nop 4 +; CHECK-NEXT: v_cvt_f16_f32_e32 v10, v10 ; CHECK-NEXT: v_cvt_f16_f32_e32 v6, v6 -; CHECK-NEXT: global_store_short v[0:1], v6, off -; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[16:19], v[26:27], v[26:27], v[20:23] +; CHECK-NEXT: global_store_short v[0:1], v10, off +; CHECK-NEXT: v_cvt_f16_f32_e32 v2, v2 ; CHECK-NEXT: buffer_wbl2 sc0 sc1 ; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: buffer_inv sc0 sc1 @@ -434,16 +438,10 @@ define amdgpu_kernel void @illegal_mfma_after_rewrite() #1 { ; CHECK-NEXT: buffer_wbl2 sc0 sc1 ; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: buffer_inv sc0 sc1 -; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[2:5], v[28:29], v[26:27], v[2:5] -; CHECK-NEXT: s_nop 6 -; CHECK-NEXT: v_cvt_f16_f32_e32 v6, v2 -; CHECK-NEXT: v_mfma_f32_16x16x16_f16 v[2:5], v[30:31], v[26:27], v[16:19] ; CHECK-NEXT: global_store_short v[0:1], v6, off ; CHECK-NEXT: buffer_wbl2 sc0 sc1 ; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: buffer_inv sc0 sc1 -; CHECK-NEXT: s_nop 2 -; CHECK-NEXT: v_cvt_f16_f32_e32 v2, v2 ; CHECK-NEXT: global_store_short v[0:1], v2, off ; CHECK-NEXT: s_endpgm entry: @@ -595,8 +593,8 @@ define amdgpu_kernel void @test_rewrite_mfma_direct_copy_from_agpr_class(ptr add ; CHECK-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; CHECK-NEXT: s_nop 0 ; CHECK-NEXT: v_mfma_f32_32x32x1_2b_f32 v[32:63], a34, a33, v[0:31] -; CHECK-NEXT: v_mov_b32_e32 v1, 0x41000000 ; CHECK-NEXT: v_accvgpr_read_b32 v0, a32 +; CHECK-NEXT: v_mov_b32_e32 v1, 0x41800000 ; CHECK-NEXT: s_nop 15 ; CHECK-NEXT: v_mov_b64_e32 v[2:3], v[32:33] ; CHECK-NEXT: v_mov_b64_e32 v[4:5], v[34:35] @@ -623,10 +621,9 @@ define amdgpu_kernel void @test_rewrite_mfma_direct_copy_from_agpr_class(ptr add ; CHECK-NEXT: global_store_dwordx4 v0, v[10:13], s[0:1] offset:32 ; CHECK-NEXT: global_store_dwordx4 v0, v[6:9], s[0:1] offset:16 ; CHECK-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] +; CHECK-NEXT: v_mov_b32_e32 v26, 0x41000000 ; CHECK-NEXT: s_nop 1 -; CHECK-NEXT: v_mov_b32_e32 v2, 0x41800000 -; CHECK-NEXT: s_nop 1 -; CHECK-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v1, v2, a[0:31] +; CHECK-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v26, v1, a[0:31] ; CHECK-NEXT: s_nop 15 ; CHECK-NEXT: s_nop 1 ; CHECK-NEXT: global_store_dwordx4 v0, a[24:27], s[2:3] offset:96 diff --git a/llvm/test/CodeGen/AMDGPU/rsq.f64.ll b/llvm/test/CodeGen/AMDGPU/rsq.f64.ll index 77fd3437224c3..112a577af4706 100644 --- a/llvm/test/CodeGen/AMDGPU/rsq.f64.ll +++ b/llvm/test/CodeGen/AMDGPU/rsq.f64.ll @@ -2310,7 +2310,7 @@ define <2 x double> @v_rsq_v2f64(<2 x double> %x) { ; SI-GISEL-NEXT: v_rsq_f64_e32 v[6:7], v[0:1] ; SI-GISEL-NEXT: v_mov_b32_e32 v14, 0xffffff80 ; SI-GISEL-NEXT: v_mov_b32_e32 v15, 0x260 -; SI-GISEL-NEXT: v_mov_b32_e32 v18, 0x3ff00000 +; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0x3ff00000 ; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[6:7], 0.5 ; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[0:1], v[6:7] ; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[8:9], v[6:7], 0.5 @@ -2351,23 +2351,24 @@ define <2 x double> @v_rsq_v2f64(<2 x double> %x) { ; SI-GISEL-NEXT: v_div_scale_f64 v[12:13], s[4:5], 1.0, v[0:1], 1.0 ; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[6:7], v[4:5], v[6:7] ; SI-GISEL-NEXT: v_rcp_f64_e32 v[6:7], v[8:9] -; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v11 ; SI-GISEL-NEXT: v_mul_f64 v[14:15], v[12:13], v[4:5] -; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v13, v18 -; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[8:9], v[6:7], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[10:11], v[14:15], v[12:13] -; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[16:17], v[6:7] -; SI-GISEL-NEXT: v_div_scale_f64 v[16:17], s[6:7], 1.0, v[2:3], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[8:9], v[6:7], 1.0 +; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v13, v20 +; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[8:9], v[6:7], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[10:11], v[14:15], v[12:13] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[18:19], v[6:7] +; SI-GISEL-NEXT: v_div_scale_f64 v[18:19], s[4:5], 1.0, v[2:3], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[8:9], v[6:7], 1.0 +; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v11 +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7] ; SI-GISEL-NEXT: s_xor_b64 vcc, vcc, s[4:5] -; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7] -; SI-GISEL-NEXT: v_div_fmas_f64 v[4:5], v[12:13], v[4:5], v[14:15] -; SI-GISEL-NEXT: v_mul_f64 v[10:11], v[16:17], v[6:7] -; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v17, v18 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[8:9], v[10:11], v[16:17] +; SI-GISEL-NEXT: v_mul_f64 v[10:11], v[18:19], v[6:7] +; SI-GISEL-NEXT: v_div_fmas_f64 v[4:5], v[16:17], v[4:5], v[14:15] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[8:9], v[10:11], v[18:19] +; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v19, v20 ; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v9 ; SI-GISEL-NEXT: s_xor_b64 vcc, vcc, s[4:5] ; SI-GISEL-NEXT: v_div_fixup_f64 v[0:1], v[4:5], v[0:1], 1.0 +; SI-GISEL-NEXT: s_nop 0 ; SI-GISEL-NEXT: v_div_fmas_f64 v[6:7], v[12:13], v[6:7], v[10:11] ; SI-GISEL-NEXT: v_div_fixup_f64 v[2:3], v[6:7], v[2:3], 1.0 ; SI-GISEL-NEXT: s_setpc_b64 s[30:31] @@ -2606,7 +2607,7 @@ define <2 x double> @v_neg_rsq_v2f64(<2 x double> %x) { ; SI-GISEL-NEXT: v_rsq_f64_e32 v[6:7], v[0:1] ; SI-GISEL-NEXT: v_mov_b32_e32 v14, 0xffffff80 ; SI-GISEL-NEXT: v_mov_b32_e32 v15, 0x260 -; SI-GISEL-NEXT: v_mov_b32_e32 v18, 0xbff00000 +; SI-GISEL-NEXT: v_mov_b32_e32 v20, 0xbff00000 ; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[6:7], 0.5 ; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[0:1], v[6:7] ; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[8:9], v[6:7], 0.5 @@ -2647,23 +2648,24 @@ define <2 x double> @v_neg_rsq_v2f64(<2 x double> %x) { ; SI-GISEL-NEXT: v_div_scale_f64 v[12:13], s[4:5], -1.0, v[0:1], -1.0 ; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[6:7], v[4:5], v[6:7] ; SI-GISEL-NEXT: v_rcp_f64_e32 v[6:7], v[8:9] -; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v11 ; SI-GISEL-NEXT: v_mul_f64 v[14:15], v[12:13], v[4:5] -; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v13, v18 -; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[8:9], v[6:7], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[10:11], v[14:15], v[12:13] -; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[16:17], v[6:7] -; SI-GISEL-NEXT: v_div_scale_f64 v[16:17], s[6:7], -1.0, v[2:3], -1.0 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[8:9], v[6:7], 1.0 +; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v13, v20 +; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[8:9], v[6:7], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[10:11], v[14:15], v[12:13] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[18:19], v[6:7] +; SI-GISEL-NEXT: v_div_scale_f64 v[18:19], s[4:5], -1.0, v[2:3], -1.0 +; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[8:9], v[6:7], 1.0 +; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v11 +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7] ; SI-GISEL-NEXT: s_xor_b64 vcc, vcc, s[4:5] -; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7] -; SI-GISEL-NEXT: v_div_fmas_f64 v[4:5], v[12:13], v[4:5], v[14:15] -; SI-GISEL-NEXT: v_mul_f64 v[10:11], v[16:17], v[6:7] -; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v17, v18 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[8:9], v[10:11], v[16:17] +; SI-GISEL-NEXT: v_mul_f64 v[10:11], v[18:19], v[6:7] +; SI-GISEL-NEXT: v_div_fmas_f64 v[4:5], v[16:17], v[4:5], v[14:15] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[8:9], v[10:11], v[18:19] +; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v19, v20 ; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v9 ; SI-GISEL-NEXT: s_xor_b64 vcc, vcc, s[4:5] ; SI-GISEL-NEXT: v_div_fixup_f64 v[0:1], v[4:5], v[0:1], -1.0 +; SI-GISEL-NEXT: s_nop 0 ; SI-GISEL-NEXT: v_div_fmas_f64 v[6:7], v[12:13], v[6:7], v[10:11] ; SI-GISEL-NEXT: v_div_fixup_f64 v[2:3], v[6:7], v[2:3], -1.0 ; SI-GISEL-NEXT: s_setpc_b64 s[30:31] @@ -2869,6 +2871,8 @@ define <2 x double> @v_neg_rsq_v2f64_poisonelt(<2 x double> %x) { ; SI-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v6 ; SI-GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] ; SI-GISEL-NEXT: v_rsq_f64_e32 v[6:7], v[0:1] +; SI-GISEL-NEXT: v_mov_b32_e32 v14, 0xffffff80 +; SI-GISEL-NEXT: v_mov_b32_e32 v15, 0x260 ; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[6:7], 0.5 ; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[0:1], v[6:7] ; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[8:9], v[6:7], 0.5 @@ -2876,61 +2880,59 @@ define <2 x double> @v_neg_rsq_v2f64_poisonelt(<2 x double> %x) { ; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9] ; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[6:7], v[6:7], v[0:1] ; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[10:11], v[8:9], v[6:7] -; SI-GISEL-NEXT: v_lshlrev_b32_e32 v6, 8, v12 -; SI-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v6 +; SI-GISEL-NEXT: v_lshlrev_b32_e32 v10, 8, v12 ; SI-GISEL-NEXT: v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1] -; SI-GISEL-NEXT: v_rsq_f64_e32 v[10:11], v[2:3] +; SI-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v10 ; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[6:7], v[8:9], v[4:5] -; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0xffffff80 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v13, 0, v12, vcc -; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[10:11], 0.5 -; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[2:3], v[10:11] -; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[4:5], v13 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[6:7], v[8:9], 0.5 -; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x260 -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9] -; SI-GISEL-NEXT: v_cmp_class_f64_e32 vcc, v[0:1], v13 -; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7] -; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[8:9], v[8:9], v[2:3] +; SI-GISEL-NEXT: v_rsq_f64_e32 v[6:7], v[2:3] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, 0, v14, vcc +; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[4:5], v8 +; SI-GISEL-NEXT: v_cmp_class_f64_e32 vcc, v[0:1], v15 +; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[6:7], 0.5 +; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[2:3], v[6:7] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[8:9], v[6:7], 0.5 ; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[10:11], v[6:7], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[6:7], v[10:11], v[6:7] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[8:9], v[10:11], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[4:5], v[4:5], v[2:3] ; SI-GISEL-NEXT: v_div_scale_f64 v[10:11], s[6:7], v[0:1], v[0:1], -1.0 -; SI-GISEL-NEXT: v_fma_f64 v[4:5], -v[8:9], v[8:9], v[2:3] -; SI-GISEL-NEXT: v_cmp_class_f64_e32 vcc, v[2:3], v13 -; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9] -; SI-GISEL-NEXT: v_rcp_f64_e32 v[6:7], v[10:11] -; SI-GISEL-NEXT: v_cndmask_b32_e64 v8, 0, v12, s[4:5] -; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[4:5], v8 -; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[10:11], v[6:7], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[8:9], v[6:7], v[4:5] +; SI-GISEL-NEXT: v_cmp_class_f64_e32 vcc, v[2:3], v15 +; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[4:5], v[4:5], v[2:3] +; SI-GISEL-NEXT: v_rcp_f64_e32 v[12:13], v[10:11] +; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[8:9], v[6:7], v[4:5] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v6, 0, v14, s[4:5] +; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[4:5], v6 +; SI-GISEL-NEXT: v_fma_f64 v[6:7], -v[10:11], v[12:13], 1.0 ; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc -; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[6:7], v[8:9], v[6:7] -; SI-GISEL-NEXT: v_div_scale_f64 v[6:7], s[4:5], v[2:3], v[2:3], s[4:5] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[10:11], v[4:5], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[12:13], v[6:7], v[12:13] +; SI-GISEL-NEXT: v_div_scale_f64 v[8:9], s[4:5], v[2:3], v[2:3], s[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[4:5], -v[10:11], v[6:7], 1.0 ; SI-GISEL-NEXT: v_div_scale_f64 v[12:13], s[4:5], -1.0, v[0:1], -1.0 -; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5] -; SI-GISEL-NEXT: v_rcp_f64_e32 v[14:15], v[6:7] -; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[12:13], v[4:5] -; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[6:7], v[14:15], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[10:11], v[8:9], v[12:13] -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] +; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[6:7], v[4:5], v[6:7] +; SI-GISEL-NEXT: v_rcp_f64_e32 v[6:7], v[8:9] +; SI-GISEL-NEXT: v_mul_f64 v[14:15], v[12:13], v[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[8:9], v[6:7], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[10:11], v[14:15], v[12:13] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[18:19], v[6:7] ; SI-GISEL-NEXT: v_mov_b32_e32 v10, 0xbff00000 ; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v13, v10 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[6:7], v[14:15], 1.0 -; SI-GISEL-NEXT: v_div_scale_f64 v[16:17], s[4:5], s[4:5], v[2:3], s[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[8:9], v[6:7], 1.0 +; SI-GISEL-NEXT: v_div_scale_f64 v[18:19], s[4:5], s[4:5], v[2:3], s[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7] ; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v11 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[14:15], v[12:13], v[14:15] ; SI-GISEL-NEXT: s_xor_b64 vcc, vcc, s[4:5] -; SI-GISEL-NEXT: v_mul_f64 v[12:13], v[16:17], v[10:11] -; SI-GISEL-NEXT: v_div_fmas_f64 v[4:5], v[18:19], v[4:5], v[8:9] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[6:7], v[12:13], v[16:17] -; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, s4, v17 -; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v7 +; SI-GISEL-NEXT: v_mul_f64 v[10:11], v[18:19], v[6:7] +; SI-GISEL-NEXT: v_div_fmas_f64 v[4:5], v[16:17], v[4:5], v[14:15] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[8:9], v[10:11], v[18:19] +; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, s4, v19 +; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v9 ; SI-GISEL-NEXT: s_xor_b64 vcc, vcc, s[4:5] ; SI-GISEL-NEXT: v_div_fixup_f64 v[0:1], v[4:5], v[0:1], -1.0 ; SI-GISEL-NEXT: s_nop 0 -; SI-GISEL-NEXT: v_div_fmas_f64 v[6:7], v[8:9], v[10:11], v[12:13] +; SI-GISEL-NEXT: v_div_fmas_f64 v[6:7], v[12:13], v[6:7], v[10:11] ; SI-GISEL-NEXT: v_div_fixup_f64 v[2:3], v[6:7], v[2:3], s[4:5] ; SI-GISEL-NEXT: s_setpc_b64 s[30:31] ; @@ -3139,6 +3141,8 @@ define <2 x double> @v_neg_pos_rsq_v2f64(<2 x double> %x) { ; SI-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v6 ; SI-GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] ; SI-GISEL-NEXT: v_rsq_f64_e32 v[6:7], v[0:1] +; SI-GISEL-NEXT: v_mov_b32_e32 v14, 0xffffff80 +; SI-GISEL-NEXT: v_mov_b32_e32 v15, 0x260 ; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[6:7], 0.5 ; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[0:1], v[6:7] ; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[8:9], v[6:7], 0.5 @@ -3146,62 +3150,60 @@ define <2 x double> @v_neg_pos_rsq_v2f64(<2 x double> %x) { ; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9] ; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[6:7], v[6:7], v[0:1] ; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[10:11], v[8:9], v[6:7] -; SI-GISEL-NEXT: v_lshlrev_b32_e32 v6, 8, v12 -; SI-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v6 +; SI-GISEL-NEXT: v_lshlrev_b32_e32 v10, 8, v12 ; SI-GISEL-NEXT: v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1] -; SI-GISEL-NEXT: v_rsq_f64_e32 v[10:11], v[2:3] +; SI-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v10 ; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[6:7], v[8:9], v[4:5] -; SI-GISEL-NEXT: v_mov_b32_e32 v12, 0xffffff80 -; SI-GISEL-NEXT: v_cndmask_b32_e32 v13, 0, v12, vcc -; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[10:11], 0.5 -; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[2:3], v[10:11] -; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[4:5], v13 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[6:7], v[8:9], 0.5 -; SI-GISEL-NEXT: v_mov_b32_e32 v13, 0x260 -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9] -; SI-GISEL-NEXT: v_cmp_class_f64_e32 vcc, v[0:1], v13 -; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7] -; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[8:9], v[8:9], v[2:3] +; SI-GISEL-NEXT: v_rsq_f64_e32 v[6:7], v[2:3] +; SI-GISEL-NEXT: v_cndmask_b32_e32 v8, 0, v14, vcc +; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[4:5], v8 +; SI-GISEL-NEXT: v_cmp_class_f64_e32 vcc, v[0:1], v15 +; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[6:7], 0.5 +; SI-GISEL-NEXT: v_mul_f64 v[6:7], v[2:3], v[6:7] ; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; SI-GISEL-NEXT: v_fma_f64 v[10:11], -v[8:9], v[6:7], 0.5 ; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc -; SI-GISEL-NEXT: v_fma_f64 v[8:9], v[10:11], v[6:7], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[6:7], v[10:11], v[6:7] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[8:9], v[10:11], v[8:9] +; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[4:5], v[4:5], v[2:3] ; SI-GISEL-NEXT: v_div_scale_f64 v[10:11], s[6:7], v[0:1], v[0:1], -1.0 -; SI-GISEL-NEXT: v_fma_f64 v[4:5], -v[8:9], v[8:9], v[2:3] -; SI-GISEL-NEXT: v_cmp_class_f64_e32 vcc, v[2:3], v13 -; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9] -; SI-GISEL-NEXT: v_rcp_f64_e32 v[6:7], v[10:11] -; SI-GISEL-NEXT: v_cndmask_b32_e64 v8, 0, v12, s[4:5] -; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[4:5], v8 -; SI-GISEL-NEXT: v_div_scale_f64 v[12:13], s[4:5], -1.0, v[0:1], -1.0 -; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[10:11], v[6:7], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[8:9], v[6:7], v[4:5] +; SI-GISEL-NEXT: v_cmp_class_f64_e32 vcc, v[2:3], v15 +; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[4:5], v[4:5], v[2:3] +; SI-GISEL-NEXT: v_rcp_f64_e32 v[12:13], v[10:11] +; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[8:9], v[6:7], v[4:5] +; SI-GISEL-NEXT: v_cndmask_b32_e64 v6, 0, v14, s[4:5] +; SI-GISEL-NEXT: v_ldexp_f64 v[4:5], v[4:5], v6 +; SI-GISEL-NEXT: v_fma_f64 v[6:7], -v[10:11], v[12:13], 1.0 ; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc ; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc -; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[6:7], v[8:9], v[6:7] -; SI-GISEL-NEXT: v_div_scale_f64 v[6:7], s[4:5], v[2:3], v[2:3], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[10:11], v[4:5], 1.0 -; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5] -; SI-GISEL-NEXT: v_rcp_f64_e32 v[14:15], v[6:7] -; SI-GISEL-NEXT: v_mul_f64 v[8:9], v[12:13], v[4:5] -; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[10:11], v[8:9], v[12:13] -; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[6:7], v[14:15], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[12:13], v[6:7], v[12:13] +; SI-GISEL-NEXT: v_div_scale_f64 v[8:9], s[4:5], v[2:3], v[2:3], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[4:5], -v[10:11], v[6:7], 1.0 +; SI-GISEL-NEXT: v_div_scale_f64 v[12:13], s[4:5], -1.0, v[0:1], -1.0 +; SI-GISEL-NEXT: v_fma_f64 v[4:5], v[6:7], v[4:5], v[6:7] +; SI-GISEL-NEXT: v_rcp_f64_e32 v[6:7], v[8:9] +; SI-GISEL-NEXT: v_mul_f64 v[14:15], v[12:13], v[4:5] +; SI-GISEL-NEXT: v_fma_f64 v[18:19], -v[8:9], v[6:7], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[16:17], -v[10:11], v[14:15], v[12:13] +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[18:19], v[6:7] ; SI-GISEL-NEXT: v_mov_b32_e32 v10, 0xbff00000 -; SI-GISEL-NEXT: v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] ; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v13, v10 -; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[6:7], v[14:15], 1.0 -; SI-GISEL-NEXT: v_div_scale_f64 v[16:17], s[4:5], 1.0, v[2:3], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[8:9], v[6:7], 1.0 +; SI-GISEL-NEXT: v_div_scale_f64 v[18:19], s[4:5], 1.0, v[2:3], 1.0 +; SI-GISEL-NEXT: v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7] ; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v11 -; SI-GISEL-NEXT: v_fma_f64 v[10:11], v[14:15], v[12:13], v[14:15] ; SI-GISEL-NEXT: s_xor_b64 vcc, vcc, s[4:5] -; SI-GISEL-NEXT: v_mul_f64 v[12:13], v[16:17], v[10:11] -; SI-GISEL-NEXT: v_div_fmas_f64 v[4:5], v[18:19], v[4:5], v[8:9] -; SI-GISEL-NEXT: v_fma_f64 v[8:9], -v[6:7], v[12:13], v[16:17] -; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0x3ff00000 -; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v17, v6 -; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v7 +; SI-GISEL-NEXT: v_mul_f64 v[10:11], v[18:19], v[6:7] +; SI-GISEL-NEXT: v_div_fmas_f64 v[4:5], v[16:17], v[4:5], v[14:15] +; SI-GISEL-NEXT: v_fma_f64 v[12:13], -v[8:9], v[10:11], v[18:19] +; SI-GISEL-NEXT: v_mov_b32_e32 v8, 0x3ff00000 +; SI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v19, v8 +; SI-GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v9 ; SI-GISEL-NEXT: s_xor_b64 vcc, vcc, s[4:5] ; SI-GISEL-NEXT: v_div_fixup_f64 v[0:1], v[4:5], v[0:1], -1.0 ; SI-GISEL-NEXT: s_nop 0 -; SI-GISEL-NEXT: v_div_fmas_f64 v[6:7], v[8:9], v[10:11], v[12:13] +; SI-GISEL-NEXT: v_div_fmas_f64 v[6:7], v[12:13], v[6:7], v[10:11] ; SI-GISEL-NEXT: v_div_fixup_f64 v[2:3], v[6:7], v[2:3], 1.0 ; SI-GISEL-NEXT: s_setpc_b64 s[30:31] ; diff --git a/llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir b/llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir index f1d1ff7effae1..15f9882fe4aa8 100644 --- a/llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir +++ b/llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir @@ -24,25 +24,25 @@ body: | ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: undef [[V_MOV_B32_e32_:%[0-9]+]].sub3:vreg_512 = V_MOV_B32_e32 0, implicit $exec ; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_512 = COPY [[V_MOV_B32_e32_]] + ; CHECK-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.1(0x80000000) ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: BUFFER_STORE_DWORD_OFFEN [[V_MOV_B32_e32_]].sub3, undef %5:vgpr_32, $sgpr24_sgpr25_sgpr26_sgpr27, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32), align 8, addrspace 5) + ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:vreg_512 = COPY [[COPY]].sub0 + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:vreg_512 = COPY [[COPY]].sub1 + ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:vreg_512 = COPY undef [[V_MOV_B32_e32_1]] + ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:vreg_512 = COPY [[COPY]].sub3 + ; CHECK-NEXT: [[COPY1:%[0-9]+]].sub5:vreg_512 = COPY undef [[V_MOV_B32_e32_1]] + ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 0, [[V_MOV_B32_e32_1]], implicit $exec ; CHECK-NEXT: dead [[DS_READ_B32_gfx9_:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 undef %7:vgpr_32, 0, 0, implicit $exec ; CHECK-NEXT: dead [[DS_READ_B64_gfx9_:%[0-9]+]]:vreg_64 = DS_READ_B64_gfx9 [[V_MOV_B32_e32_1]], 0, 0, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 0, [[V_MOV_B32_e32_1]], implicit $exec ; CHECK-NEXT: dead [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128 = DS_READ_B128_gfx9 [[V_ADD_U32_e32_]], 0, 0, implicit $exec - ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0 - ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub1:vreg_512 = COPY [[COPY]].sub1 - ; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def dead [[COPY1]], regdef:VGPR_32, def dead [[COPY]].sub1, reguse:VGPR_32, [[COPY1]], reguse:VGPR_32, [[COPY]].sub1 - ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub0:vreg_512 = COPY [[COPY]].sub0 - ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub3:vreg_512 = COPY [[COPY]].sub3 - ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2:vreg_512 = COPY undef [[V_MOV_B32_e32_1]] - ; CHECK-NEXT: [[COPY2:%[0-9]+]].sub5:vreg_512 = COPY undef [[V_MOV_B32_e32_1]] - ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_512 = COPY [[COPY2]] + ; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def dead [[COPY2]], regdef:VGPR_32, def dead undef [[COPY]].sub1, reguse:VGPR_32, [[COPY2]], reguse:VGPR_32, [[COPY]].sub1 + ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_512 = COPY [[COPY1]] ; CHECK-NEXT: dead [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 4, [[V_MOV_B32_e32_2]], implicit-def dead $vcc, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.1 bb.0: diff --git a/llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir b/llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir index bd2307952a92a..be18cc644bbca 100644 --- a/llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir +++ b/llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir @@ -43,7 +43,7 @@ body: | ; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def dead %11 ; CHECK-NEXT: GLOBAL_STORE_DWORD undef %12:vreg_64, [[BUFFER_LOAD_DWORD_OFFEN]], 0, 0, implicit $exec :: (store (s32), addrspace 1) ; CHECK-NEXT: [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec - ; CHECK-NEXT: [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_64 = COPY [[V_MOV_B32_e32_1]] ; CHECK-NEXT: [[DS_READ_B64_gfx9_:%[0-9]+]]:vreg_64 = DS_READ_B64_gfx9 undef %14:vgpr_32, 0, 0, implicit $exec :: (load (s64), addrspace 3) ; CHECK-NEXT: INLINEASM &"def $0 $1", sideeffect attdialect, regdef:VGPR_32, def %15, regdef:VGPR_32, def %16 ; CHECK-NEXT: [[DS_READ_B32_gfx9_:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 [[V_MOV_B32_e32_1]], 0, 0, implicit $exec @@ -51,8 +51,8 @@ body: | ; CHECK-NEXT: [[DS_READ_B32_gfx9_2:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 undef %20:vgpr_32, 0, 0, implicit $exec ; CHECK-NEXT: INLINEASM &"def $0 $1", sideeffect attdialect, regdef:VGPR_32, def %21, regdef:VGPR_32, def %22 ; CHECK-NEXT: [[DS_READ_B32_gfx9_3:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 [[V_MOV_B32_e32_2]], 0, 0, implicit $exec + ; CHECK-NEXT: [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec ; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def dead [[V_MOV_B32_e32_3]], regdef:VGPR_32, def dead [[V_MOV_B32_e32_4]], reguse:VGPR_32, [[DS_READ_B64_gfx9_]].sub0, reguse tiedto:$0, [[V_MOV_B32_e32_3]](tied-def 3), reguse tiedto:$1, [[V_MOV_B32_e32_4]](tied-def 5), reguse:VGPR_32, %15, reguse:VGPR_32, %16, reguse:VGPR_32, [[DS_READ_B32_gfx9_1]], reguse:VGPR_32, [[DS_READ_B32_gfx9_]], reguse:VGPR_32, [[DS_READ_B32_gfx9_3]], reguse:VGPR_32, [[DS_READ_B32_gfx9_2]] - ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_64 = COPY [[V_MOV_B32_e32_1]] ; CHECK-NEXT: DS_WRITE_B32_gfx9 undef %28:vgpr_32, %21, 0, 0, implicit $exec :: (store (s32), addrspace 3) ; CHECK-NEXT: DS_WRITE_B32_gfx9 undef %29:vgpr_32, %22, 0, 0, implicit $exec :: (store (s32), addrspace 3) ; CHECK-NEXT: DS_WRITE_B64_gfx9 undef %30:vgpr_32, [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (store (s64), addrspace 3) diff --git a/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir b/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir index 71838881aee99..abe9fb3b04272 100644 --- a/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir +++ b/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir @@ -236,36 +236,36 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -332,36 +332,36 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF16]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF13]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -429,47 +429,47 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.4(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -543,48 +543,48 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.4(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF16]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -661,42 +661,42 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.3, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF17]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) @@ -704,10 +704,10 @@ body: | ; CHECK-NEXT: KILL [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5]] ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_2]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_2]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -789,42 +789,42 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.3, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF17]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) @@ -832,11 +832,11 @@ body: | ; CHECK-NEXT: KILL [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5]] ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF16]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec - ; CHECK-NEXT: undef [[V_ADD_U32_e32_3:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_1]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF13]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_3:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_1]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_1]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_1]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -920,38 +920,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -963,16 +963,16 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF17]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.6(0x80000000) @@ -980,10 +980,10 @@ body: | ; CHECK-NEXT: KILL [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5]] ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.6: - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_2]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_2]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -1077,38 +1077,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -1120,16 +1120,16 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF17]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.6(0x80000000) @@ -1137,11 +1137,11 @@ body: | ; CHECK-NEXT: KILL [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5]] ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.6: - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF16]].sub1, [[V_ADD_U32_e32_1]].sub0, implicit $exec - ; CHECK-NEXT: undef [[V_ADD_U32_e32_3:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF13]].sub1, [[V_ADD_U32_e32_1]].sub0, implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_3:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -1236,30 +1236,30 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.3(0x40000000) @@ -1270,17 +1270,17 @@ body: | ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.5 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -1357,30 +1357,30 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.3(0x40000000) @@ -1391,21 +1391,21 @@ body: | ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.5 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF16]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF13]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]], [[V_ADD_U32_e32_2]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]], [[V_ADD_U32_e32_2]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -1486,42 +1486,42 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.4(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.6(0x40000000), %bb.5(0x40000000) @@ -1532,19 +1532,19 @@ body: | ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.7 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.7(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -1631,42 +1631,42 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.4(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.6(0x40000000), %bb.5(0x40000000) @@ -1677,21 +1677,21 @@ body: | ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.7 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.7(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF16]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]], [[V_ADD_U32_e32_2]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_1]], [[V_ADD_U32_e32_2]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -1779,48 +1779,48 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.4, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF17]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_6:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_7:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_8:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_9:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_10:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_11:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_6:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_7:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_8:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_9:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_10:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_11:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) @@ -1836,17 +1836,17 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.5 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.6(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_3:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_3:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.6: ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_3]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -1945,42 +1945,42 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.4, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF17]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) @@ -1996,21 +1996,21 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.6(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_1]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_1]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_1]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_1]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.6 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.6(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_1]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_1]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_1]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_1]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.6: - ; CHECK-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF16]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF13]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_1]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_1]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -2105,38 +2105,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -2148,16 +2148,16 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF17]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.6(0x80000000) @@ -2173,19 +2173,19 @@ body: | ; CHECK-NEXT: bb.7: ; CHECK-NEXT: successors: %bb.9(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.9 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.8: ; CHECK-NEXT: successors: %bb.9(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.9: ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_2]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_2]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -2290,38 +2290,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -2333,10 +2333,10 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF17]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.6(0x40000000) @@ -2347,21 +2347,21 @@ body: | ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.8 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.8: - ; CHECK-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF16]].sub1, [[V_ADD_U32_e32_1]].sub0, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF13]].sub1, [[V_ADD_U32_e32_1]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -2459,38 +2459,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.3, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) @@ -2498,10 +2498,10 @@ body: | ; CHECK-NEXT: KILL [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5]] ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]], 0, 0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[DS_READ_B128_gfx9_]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[DS_READ_B128_gfx9_]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -2581,38 +2581,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.3, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) @@ -2623,7 +2623,7 @@ body: | ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF16]].sub1, [[DS_READ_B128_gfx9_]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[DS_READ_B128_gfx9_]], [[V_ADD_U32_e32_]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[DS_READ_B128_gfx9_]], [[V_ADD_U32_e32_]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -2703,47 +2703,47 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF15]], 0, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF15]], 128, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 128, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.4(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[DS_READ_B128_gfx9_]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[DS_READ_B128_gfx9_]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -2818,48 +2818,48 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF15]], 0, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF15]], 128, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 128, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.4(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], 0, 0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -2934,42 +2934,42 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 128, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 128, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF17]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF18]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF19]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_1]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_1]], 0, 0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_1]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_1]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -3043,43 +3043,43 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 128, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 128, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF17]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF18]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF19]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]], 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_1]], 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_1]], 128, 0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_1]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_1]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -3154,38 +3154,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 256, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 256, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 512, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 512, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -3197,16 +3197,16 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_1]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF17]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF18]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF19]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]], 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]], 128, 0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -3290,38 +3290,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 256, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 256, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 512, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 512, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -3333,17 +3333,17 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_1]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF17]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF18]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF19]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_1]], 128, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]], 384, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_1]], 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]], 384, 0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -3430,30 +3430,30 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.3(0x40000000) @@ -3464,17 +3464,17 @@ body: | ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], 0, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.5 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], 128, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -3550,30 +3550,30 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.3(0x40000000) @@ -3584,21 +3584,21 @@ body: | ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 256, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 256, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.5 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 256, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 256, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]], 0, 0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -3680,42 +3680,42 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF15]], 0, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF15]], 256, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 256, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.4(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.6(0x40000000), %bb.5(0x40000000) @@ -3726,19 +3726,19 @@ body: | ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 128, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.7 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.7(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 128, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -3826,42 +3826,42 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF15]], 0, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF15]], 256, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 256, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.4(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.6(0x40000000), %bb.5(0x40000000) @@ -3872,21 +3872,21 @@ body: | ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 128, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.7 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.7(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, 128, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF15]], [[DS_READ_B128_gfx9_]].sub0, 256, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]].sub0, 256, 0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -3974,36 +3974,36 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 256, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 256, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.3, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF17]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF18]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF19]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.3(0x40000000) @@ -4014,17 +4014,17 @@ body: | ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_1]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_1]], 0, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.5 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_1]], 256, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_1]], 256, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_1]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_1]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -4108,36 +4108,36 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 256, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 256, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.3, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF17]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF18]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF19]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.3(0x40000000) @@ -4148,21 +4148,21 @@ body: | ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_1]].sub0, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_1]].sub1, 256, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_1]].sub0, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_1]].sub1, 256, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.5 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_1]].sub1, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_1]].sub0, 256, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_1]].sub1, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_1]].sub0, 256, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]], 0, 0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_1]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_1]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -4250,38 +4250,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 256, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 256, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 512, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 512, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -4293,10 +4293,10 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_1]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF17]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF18]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF19]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.6(0x40000000) @@ -4307,19 +4307,19 @@ body: | ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]].sub0, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]].sub1, 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]].sub0, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]].sub1, 128, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.8 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]].sub1, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]].sub0, 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]].sub1, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]].sub0, 128, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.8: ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -4415,38 +4415,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 0, 0, implicit $exec - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 256, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 256, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF11]], 512, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 512, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -4458,10 +4458,10 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DS_READ_B128_gfx9_1]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF17]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF18]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF12]], [[DEF13]], [[DEF19]], 4, 4, [[DEF15]].sub0, [[DEF11]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.6(0x40000000) @@ -4472,21 +4472,21 @@ body: | ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]].sub0, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]].sub1, 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]].sub0, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]].sub1, 128, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.8 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]].sub1, 0, 0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_]].sub0, 128, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]].sub1, 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B32_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_]].sub0, 128, 0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.8: - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF11]], [[DS_READ_B128_gfx9_1]], 256, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[DS_READ_B128_gfx9_1]], 256, 0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF14]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[DS_READ_B128_gfx9_]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -4584,36 +4584,36 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], 0, 0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -4682,38 +4682,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF15]], 0, 0, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -4725,10 +4725,10 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF17]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.6(0x40000000) @@ -4739,20 +4739,20 @@ body: | ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF15]], [[V_ADD_U32_e32_]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[V_ADD_U32_e32_]], 0, 0, implicit $exec ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_BRANCH %bb.8 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[DEF20:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[DEF20:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[DEF20:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF20:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_ADD_U32_e32_]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.8: ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF21:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF21]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[DEF20]] + ; CHECK-NEXT: KILL [[DEF21]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_]], [[DEF20]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -4849,42 +4849,42 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: $scc = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.3, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF17]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF19]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[V_ADD_U32_e32_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF17]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF18]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF14]], [[DEF15]], [[DEF19]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) @@ -4892,11 +4892,11 @@ body: | ; CHECK-NEXT: KILL [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_4]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_5]] ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF16]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF15]], [[V_ADD_U32_e32_1]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[V_ADD_U32_e32_1]], 0, 0, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF13]].sub1, [[V_ADD_U32_e32_]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_1]], [[V_ADD_U32_e32_2]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF16]], [[DEF13]], [[DEF17]], [[DEF18]], [[DEF19]], [[V_ADD_U32_e32_1]], [[V_ADD_U32_e32_2]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -4980,42 +4980,42 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF15]], 0, 0, implicit $exec + ; CHECK-NEXT: [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128_align2 = DS_READ_B128_gfx9 [[DEF12]], 0, 0, implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[DS_READ_B128_gfx9_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[DS_READ_B128_gfx9_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF12]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.4(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DS_READ_B128_gfx9_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.6(0x40000000), %bb.5(0x40000000) @@ -5026,20 +5026,20 @@ body: | ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.7 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.7(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], 0, 0, implicit $exec + ; CHECK-NEXT: DS_WRITE_B128_gfx9 [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], 0, 0, implicit $exec ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: - ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DS_READ_B128_gfx9_]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DS_READ_B128_gfx9_]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_1]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_1]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -5126,24 +5126,24 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF11:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: $scc = IMPLICIT_DEF - ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) @@ -5154,30 +5154,30 @@ body: | ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.3(0x40000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF15]], implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_ADD_U32_e32_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: $scc = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.4, implicit killed $scc + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub0, [[DEF13]], implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF15]], [[DEF16]], [[V_ADD_U32_e32_]], 4, 4, [[DEF12]].sub0, [[DEF13]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF12]].sub0, [[DEF13]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF12]].sub0, [[DEF13]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF15]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF12]].sub0, [[DEF13]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.4, implicit $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: ; CHECK-NEXT: successors: %bb.4(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF18]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF15]], [[DEF16]], [[DEF18]], 4, 4, [[DEF12]].sub0, [[DEF13]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF15]], [[DEF16]], [[DEF18]], 4, 4, [[DEF12]].sub0, [[DEF13]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF15]], [[DEF16]], [[DEF18]], 4, 4, [[DEF12]].sub0, [[DEF13]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF18:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF15]], [[DEF16]], [[DEF18]], 4, 4, [[DEF12]].sub0, [[DEF13]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.4: - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF18]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF18]].sub0, [[DEF13]], implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF19]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[DEF18]], [[V_ADD_U32_e32_1]] + ; CHECK-NEXT: KILL [[DEF19]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF17]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[DEF18]], [[V_ADD_U32_e32_1]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -5263,38 +5263,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: undef [[AV_MOV_:%[0-9]+]].sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec ; CHECK-NEXT: [[AV_MOV_:%[0-9]+]].sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec ; CHECK-NEXT: [[AV_MOV_:%[0-9]+]].sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec ; CHECK-NEXT: [[AV_MOV_:%[0-9]+]].sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[AV_MOV_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[AV_MOV_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF16]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_]] + ; CHECK-NEXT: KILL [[DEF16]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -5363,36 +5363,36 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: undef [[AV_MOV_:%[0-9]+]].sub0_sub1:vreg_128_align2 = AV_MOV_B64_IMM_PSEUDO 0, implicit $exec ; CHECK-NEXT: [[AV_MOV_:%[0-9]+]].sub2_sub3:vreg_128_align2 = AV_MOV_B64_IMM_PSEUDO 0, implicit $exec + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[AV_MOV_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[AV_MOV_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF16]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_]] + ; CHECK-NEXT: KILL [[DEF16]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_1]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_2]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_3]], [[V_ADD_U32_e32_]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -5459,38 +5459,38 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF14:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF11]], [[DEF12]], [[DEF16]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF13]], [[DEF14]], [[DEF16]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: [[COPY:%[0-9]+]]:areg_128_align2 = COPY [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]] - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_:%[0-9]+]]:areg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64 [[DEF11]], [[DEF12]], [[COPY]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_1:%[0-9]+]]:areg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec - ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_2:%[0-9]+]]:areg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64 [[DEF11]], [[DEF12]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_1]], 4, 4, [[DEF14]].sub0, [[DEF15]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_:%[0-9]+]]:areg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64 [[DEF13]], [[DEF14]], [[COPY]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_1:%[0-9]+]]:areg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_2:%[0-9]+]]:areg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64 [[DEF13]], [[DEF14]], [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_1]], 4, 4, [[DEF11]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: - ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]].sub0, [[DEF15]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_]].sub0, [[DEF12]], implicit $exec ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_128_align2 = COPY [[V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_2]] ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vreg_128_align2 = COPY [[COPY1]] ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF17:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF13]], [[DEF16]], [[V_ADD_U32_e32_]], [[COPY2]] + ; CHECK-NEXT: KILL [[DEF17]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF16]], [[V_ADD_U32_e32_]], [[COPY2]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -5557,16 +5557,16 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %9 ; CHECK-NEXT: S_NOP 0, implicit-def %10 + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[AV_MOV_:%[0-9]+]]:vreg_64_align2 = AV_MOV_B64_IMM_PSEUDO 0, implicit $exec ; CHECK-NEXT: [[COPY:%[0-9]+]]:areg_64_align2 = COPY [[AV_MOV_]] + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) @@ -5583,7 +5583,7 @@ body: | ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vreg_64_align2 = COPY [[COPY1]] ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF11]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[V_ADD_U32_e32_]], [[COPY2]] + ; CHECK-NEXT: KILL [[DEF11]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF6]], [[DEF5]], [[DEF7]], [[V_ADD_U32_e32_]], [[COPY2]] ; CHECK-NEXT: S_NOP 0, implicit %9, implicit %10 ; CHECK-NEXT: S_ENDPGM 0 bb.0: diff --git a/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_cost.mir b/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_cost.mir index bf50a81979876..07ee81e78b6cd 100644 --- a/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_cost.mir +++ b/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_cost.mir @@ -46,35 +46,35 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF11:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF12:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF13]], implicit $exec ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub0, [[DEF13]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF13]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -89,7 +89,7 @@ body: | ; CHECK-NEXT: [[DEF17:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF17]], [[DEF18]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF19]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF17]], [[DEF18]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF19]].sub0, [[DEF13]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.6(0x40000000) @@ -100,8 +100,8 @@ body: | ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF12]], implicit $exec - ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF13]], implicit $exec + ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF13]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.8 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: @@ -113,20 +113,20 @@ body: | ; CHECK-NEXT: bb.8: ; CHECK-NEXT: successors: %bb.9(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_3:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub0, [[DEF12]], implicit $exec - ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_3:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_3:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF13]], implicit $exec + ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_3:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF13]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.9: ; CHECK-NEXT: successors: %bb.10(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_4:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF14]].sub0, implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_4:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub2, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_4:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub2, [[DEF13]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_4:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF16]].sub0, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.10: - ; CHECK-NEXT: [[V_ADD_U32_e32_5:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF14]].sub0, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_5:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF16]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF11]], [[DEF13]], [[DEF14]], [[V_ADD_U32_e32_4]], [[V_ADD_U32_e32_5]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF14]], [[DEF16]], [[V_ADD_U32_e32_4]], [[V_ADD_U32_e32_5]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -230,35 +230,35 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF11:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF12:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF13]], implicit $exec ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub0, [[DEF13]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF13]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -273,7 +273,7 @@ body: | ; CHECK-NEXT: [[DEF17:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF17]], [[DEF18]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF19]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF17]], [[DEF18]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF19]].sub0, [[DEF13]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.6(0x40000000) @@ -284,21 +284,21 @@ body: | ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF12]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF13]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF13]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.8 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub0, [[DEF12]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF13]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF13]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.8: - ; CHECK-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF13]].sub1, [[V_ADD_U32_e32_1]].sub0, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF14]].sub1, [[V_ADD_U32_e32_1]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF11]], [[DEF13]], [[DEF14]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF14]], [[DEF16]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: @@ -392,33 +392,33 @@ body: | ; CHECK-NEXT: [[DEF1:%[0-9]+]]:vreg_64 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_128 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %5 ; CHECK-NEXT: S_NOP 0, implicit-def %6 + ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead [[DEF12:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF10]].sub1, [[DEF9]], implicit $exec + ; CHECK-NEXT: dead [[DEF5:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF6:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF8]].sub1, [[DEF7]], implicit $exec ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF10:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF10]].sub0, [[DEF9]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF8]].sub0, [[DEF7]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF10]].sub1, [[DEF9]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF8]].sub1, [[DEF7]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -430,7 +430,7 @@ body: | ; CHECK-NEXT: bb.4: ; CHECK-NEXT: successors: %bb.5(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF5]], [[DEF6]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF8]].sub0, [[DEF9]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF9]], [[DEF10]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF11]].sub0, [[DEF7]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.6(0x40000000) @@ -441,20 +441,20 @@ body: | ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF11]].sub1, [[DEF9]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF11]].sub0, [[DEF9]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF7]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF7]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.8 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF11]].sub0, [[DEF9]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF11]].sub1, [[DEF9]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF7]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF7]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.8: - ; CHECK-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF10]].sub1, [[V_ADD_U32_e32_1]].sub0, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF8]].sub1, [[V_ADD_U32_e32_1]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: KILL [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF7]], [[DEF10]], [[DEF11]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] + ; CHECK-NEXT: KILL [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF12]], [[DEF8]], [[DEF13]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] ; CHECK-NEXT: S_NOP 0, implicit %5, implicit %6 ; CHECK-NEXT: S_ENDPGM 0 bb.0: diff --git a/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_diff_types.mir b/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_diff_types.mir index 19612060d5733..d9214142a1855 100644 --- a/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_diff_types.mir +++ b/llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_diff_types.mir @@ -35,35 +35,35 @@ body: | ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_512 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_128 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vreg_512 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vreg_128 = IMPLICIT_DEF ; CHECK-NEXT: S_NOP 0, implicit-def %12 ; CHECK-NEXT: S_NOP 0, implicit-def %13 + ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vreg_1024_align2 = IMPLICIT_DEF ; CHECK-NEXT: SCHED_BARRIER 0 - ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF11:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF12:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF13:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF - ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: dead undef [[V_ADD_U32_e32_:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF13]], implicit $exec ; CHECK-NEXT: $scc = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF15:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF + ; CHECK-NEXT: [[DEF16:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub0, [[DEF13]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.3(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF13]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_1:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF13]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: @@ -78,7 +78,7 @@ body: | ; CHECK-NEXT: [[DEF17:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF18:%[0-9]+]]:av_128_align2 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF19:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF10:%[0-9]+]].sub0_sub1_sub2_sub3:vreg_1024_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF17]], [[DEF18]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF19]].sub0, [[DEF12]], 0, 0, implicit $mode, implicit $exec + ; CHECK-NEXT: [[DEF10:%[0-9]+]].sub0_sub1_sub2_sub3:vreg_1024_align2 = contract nofpexcept V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 [[DEF17]], [[DEF18]], [[V_ADD_U32_e32_1]], 4, 4, [[DEF19]].sub0, [[DEF13]], 0, 0, implicit $mode, implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.6(0x40000000) @@ -89,21 +89,21 @@ body: | ; CHECK-NEXT: bb.6: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF12]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub0, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF13]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF13]], implicit $exec ; CHECK-NEXT: S_BRANCH %bb.8 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.7: ; CHECK-NEXT: successors: %bb.8(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub0, [[DEF12]], implicit $exec - ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF14]].sub1, [[DEF12]], implicit $exec + ; CHECK-NEXT: undef [[V_ADD_U32_e32_2:%[0-9]+]].sub0:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub0, [[DEF13]], implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]].sub1:vreg_128_align2 = V_ADD_U32_e32 [[DEF16]].sub1, [[DEF13]], implicit $exec ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.8: - ; CHECK-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF13]].sub1, [[V_ADD_U32_e32_1]].sub0, implicit $exec + ; CHECK-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF14]].sub1, [[V_ADD_U32_e32_1]].sub0, implicit $exec ; CHECK-NEXT: SCHED_BARRIER 0 ; CHECK-NEXT: [[DEF20:%[0-9]+]]:vreg_1024 = IMPLICIT_DEF - ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF9]], [[DEF10]], [[DEF11]], [[DEF13]], [[DEF14]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] + ; CHECK-NEXT: KILL [[DEF20]], [[DEF]], [[DEF1]], [[DEF2]], [[DEF3]], [[DEF4]], [[DEF9]], [[DEF5]], [[DEF6]], [[DEF7]], [[DEF8]], [[DEF10]], [[DEF15]], [[DEF14]], [[DEF16]], [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]] ; CHECK-NEXT: S_NOP 0, implicit %12, implicit %13 ; CHECK-NEXT: S_ENDPGM 0 bb.0: diff --git a/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll b/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll index deec6a2d307f2..a804562b6dc95 100644 --- a/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll +++ b/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll @@ -1,10 +1,10 @@ -; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -verify-misched < %s | FileCheck --check-prefixes=GFX11-PAL %s +; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -amdgpu-use-amdgpu-trackers=0 -verify-misched < %s | FileCheck --check-prefixes=GFX11-PAL %s ; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -amdgpu-use-amdgpu-trackers=1 -verify-misched < %s | FileCheck --check-prefixes=GFX11-PAL-GCNTRACKERS %s -; RUN: llc -mtriple=amdgcn -mcpu=tonga -amdgpu-scalarize-global-loads=false -verify-misched < %s | FileCheck --check-prefixes=TONGA %s +; RUN: llc -mtriple=amdgcn -mcpu=tonga -amdgpu-scalarize-global-loads=false -amdgpu-use-amdgpu-trackers=0 -verify-misched < %s | FileCheck --check-prefixes=TONGA %s ; RUN: llc -mtriple=amdgcn -mcpu=tonga -amdgpu-scalarize-global-loads=false -amdgpu-use-amdgpu-trackers=1 -verify-misched < %s | FileCheck --check-prefixes=TONGA-GCNTRACKERS %s -; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-misched < %s | FileCheck --check-prefixes=GFX908 %s +; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -amdgpu-use-amdgpu-trackers=0 -verify-misched < %s | FileCheck --check-prefixes=GFX908 %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -amdgpu-use-amdgpu-trackers=1 -verify-misched < %s | FileCheck --check-prefixes=GFX908-GCNTRACKERS %s -; RUN: llc -mtriple=amdgcn -mcpu=gfx600 -verify-misched < %s | FileCheck --check-prefixes=GENERIC %s +; RUN: llc -mtriple=amdgcn -mcpu=gfx600 -amdgpu-use-amdgpu-trackers=0 -verify-misched < %s | FileCheck --check-prefixes=GENERIC %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx600 -amdgpu-use-amdgpu-trackers=1 -verify-misched < %s | FileCheck --check-prefixes=GENERIC-GCNTRACKERS %s ; GCN Trackers are sensitive to minor changes in RP, and will avoid scheduling certain instructions, which, if scheduled, diff --git a/llvm/test/CodeGen/AMDGPU/schedule-barrier.mir b/llvm/test/CodeGen/AMDGPU/schedule-barrier.mir index 88e11c9ce3d1d..69381edc0514b 100644 --- a/llvm/test/CodeGen/AMDGPU/schedule-barrier.mir +++ b/llvm/test/CodeGen/AMDGPU/schedule-barrier.mir @@ -17,20 +17,20 @@ body: | ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub3:vreg_128 = COPY $vgpr9 ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub2:vreg_128 = COPY $vgpr8 ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub1:vreg_128 = COPY $vgpr7 - ; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1 - ; CHECK-NEXT: [[COPY3:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 - ; CHECK-NEXT: undef [[COPY4:%[0-9]+]].sub0:vreg_128 = COPY $vgpr6 - ; CHECK-NEXT: undef [[COPY5:%[0-9]+]].sub3:vreg_128 = COPY $vgpr5 - ; CHECK-NEXT: undef [[COPY6:%[0-9]+]].sub2:vreg_128 = COPY $vgpr4 - ; CHECK-NEXT: undef [[COPY7:%[0-9]+]].sub1:vreg_128 = COPY $vgpr3 - ; CHECK-NEXT: undef [[COPY8:%[0-9]+]].sub0:vreg_128 = COPY $vgpr2 - ; CHECK-NEXT: undef [[V_READFIRSTLANE_B32_:%[0-9]+]].sub0:sgpr_128 = V_READFIRSTLANE_B32 [[COPY8]].sub0, implicit $exec - ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]].sub1:sgpr_128 = V_READFIRSTLANE_B32 [[COPY7]].sub1, implicit $exec - ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]].sub2:sgpr_128 = V_READFIRSTLANE_B32 [[COPY6]].sub2, implicit $exec - ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]].sub3:sgpr_128 = V_READFIRSTLANE_B32 [[COPY5]].sub3, implicit $exec + ; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0:vreg_128 = COPY $vgpr6 + ; CHECK-NEXT: undef [[COPY4:%[0-9]+]].sub3:vreg_128 = COPY $vgpr5 + ; CHECK-NEXT: undef [[COPY5:%[0-9]+]].sub2:vreg_128 = COPY $vgpr4 + ; CHECK-NEXT: undef [[COPY6:%[0-9]+]].sub1:vreg_128 = COPY $vgpr3 + ; CHECK-NEXT: undef [[COPY7:%[0-9]+]].sub0:vreg_128 = COPY $vgpr2 + ; CHECK-NEXT: undef [[COPY8:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1 + ; CHECK-NEXT: [[COPY8:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0 ; CHECK-NEXT: S_BARRIER + ; CHECK-NEXT: undef [[V_READFIRSTLANE_B32_:%[0-9]+]].sub0:sgpr_128 = V_READFIRSTLANE_B32 [[COPY7]].sub0, implicit $exec + ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]].sub1:sgpr_128 = V_READFIRSTLANE_B32 [[COPY6]].sub1, implicit $exec + ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]].sub2:sgpr_128 = V_READFIRSTLANE_B32 [[COPY5]].sub2, implicit $exec + ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]].sub3:sgpr_128 = V_READFIRSTLANE_B32 [[COPY4]].sub3, implicit $exec ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFSET:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFSET [[V_READFIRSTLANE_B32_]], 0, 0, 0, 0, implicit $exec - ; CHECK-NEXT: undef [[V_READFIRSTLANE_B32_1:%[0-9]+]].sub0:sgpr_128 = V_READFIRSTLANE_B32 [[COPY4]].sub0, implicit $exec + ; CHECK-NEXT: undef [[V_READFIRSTLANE_B32_1:%[0-9]+]].sub0:sgpr_128 = V_READFIRSTLANE_B32 [[COPY3]].sub0, implicit $exec ; CHECK-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]].sub1:sgpr_128 = V_READFIRSTLANE_B32 [[COPY2]].sub1, implicit $exec ; CHECK-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]].sub2:sgpr_128 = V_READFIRSTLANE_B32 [[COPY1]].sub2, implicit $exec ; CHECK-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]].sub3:sgpr_128 = V_READFIRSTLANE_B32 [[COPY]].sub3, implicit $exec @@ -38,7 +38,7 @@ body: | ; CHECK-NEXT: [[V_MUL_LO_U32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_LO_U32_e64 [[BUFFER_LOAD_DWORD_OFFSET]], [[BUFFER_LOAD_DWORD_OFFSET]], implicit $exec ; CHECK-NEXT: [[V_MUL_LO_U32_e64_1:%[0-9]+]]:vgpr_32 = V_MUL_LO_U32_e64 [[BUFFER_LOAD_DWORD_OFFSET1]], [[BUFFER_LOAD_DWORD_OFFSET1]], implicit $exec ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_MUL_LO_U32_e64_]], [[V_MUL_LO_U32_e64_1]], implicit $exec - ; CHECK-NEXT: GLOBAL_STORE_DWORD [[COPY3]], [[V_ADD_U32_e32_]], 0, 0, implicit $exec + ; CHECK-NEXT: GLOBAL_STORE_DWORD [[COPY8]], [[V_ADD_U32_e32_]], 0, 0, implicit $exec ; CHECK-NEXT: S_ENDPGM 0 undef %43.sub3:vreg_128 = COPY $vgpr9 undef %42.sub2:vreg_128 = COPY $vgpr8 diff --git a/llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir b/llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir index aa0d1fe45e9a8..1b3e6756acc9d 100644 --- a/llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir +++ b/llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -start-before=machine-scheduler -stop-after=greedy,2 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s +# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -start-before=machine-scheduler -stop-after=greedy,2 -amdgpu-use-amdgpu-trackers=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s # RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -start-before=machine-scheduler -stop-after=greedy,2 -amdgpu-use-amdgpu-trackers=1 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN-GCNTRACKER %s --- | diff --git a/llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll b/llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll index 7b8eba1091b48..96c587cc3da32 100644 --- a/llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll +++ b/llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll @@ -1,6 +1,6 @@ -; RUN: llc -mtriple=amdgcn -mcpu=gfx906 < %s | FileCheck --check-prefix=OCC %s +; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -amdgpu-use-amdgpu-trackers=0 < %s | FileCheck --check-prefix=OCC %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -amdgpu-use-amdgpu-trackers=1 < %s | FileCheck --check-prefix=OCC-GCNTRACKER %s -; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -amdgpu-schedule-relaxed-occupancy=true < %s | FileCheck --check-prefix=RELAX %s +; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -amdgpu-use-amdgpu-trackers=0 -amdgpu-schedule-relaxed-occupancy=true < %s | FileCheck --check-prefix=RELAX %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -amdgpu-use-amdgpu-trackers=1 -amdgpu-schedule-relaxed-occupancy=true < %s | FileCheck --check-prefix=RELAX-GCNTRACKER %s diff --git a/llvm/test/CodeGen/AMDGPU/scratch-simple.ll b/llvm/test/CodeGen/AMDGPU/scratch-simple.ll index c253f42e0d3c8..5bd3b17f52265 100644 --- a/llvm/test/CodeGen/AMDGPU/scratch-simple.ll +++ b/llvm/test/CodeGen/AMDGPU/scratch-simple.ll @@ -596,7 +596,7 @@ define amdgpu_ps float @ps_main(i32 %idx) { ; GFX9-FLATSCR-NEXT: s_add_u32 flat_scratch_lo, s0, s2 ; GFX9-FLATSCR-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX9-FLATSCR-NEXT: s_addc_u32 flat_scratch_hi, s1, 0 -; GFX9-FLATSCR-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-NEXT: s_mov_b32 s0, 0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 @@ -632,48 +632,49 @@ define amdgpu_ps float @ps_main(i32 %idx) { ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v0, off +; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-LABEL: ps_main: @@ -769,7 +770,7 @@ define amdgpu_ps float @ps_main(i32 %idx) { ; GFX9-FLATSCR-PAL-NEXT: s_mov_b32 s2, s0 ; GFX9-FLATSCR-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 ; GFX9-FLATSCR-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0 -; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt lgkmcnt(0) @@ -809,48 +810,49 @@ define amdgpu_ps float @ps_main(i32 %idx) { ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v0, off +; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-PAL-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-PAL-LABEL: ps_main: @@ -1600,7 +1602,7 @@ define amdgpu_vs float @vs_main(i32 %idx) { ; GFX9-FLATSCR-NEXT: s_add_u32 flat_scratch_lo, s0, s2 ; GFX9-FLATSCR-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX9-FLATSCR-NEXT: s_addc_u32 flat_scratch_hi, s1, 0 -; GFX9-FLATSCR-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-NEXT: s_mov_b32 s0, 0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 @@ -1636,48 +1638,49 @@ define amdgpu_vs float @vs_main(i32 %idx) { ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v0, off +; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-LABEL: vs_main: @@ -1773,7 +1776,7 @@ define amdgpu_vs float @vs_main(i32 %idx) { ; GFX9-FLATSCR-PAL-NEXT: s_mov_b32 s2, s0 ; GFX9-FLATSCR-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 ; GFX9-FLATSCR-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0 -; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt lgkmcnt(0) @@ -1813,48 +1816,49 @@ define amdgpu_vs float @vs_main(i32 %idx) { ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v0, off +; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-PAL-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-PAL-LABEL: vs_main: @@ -2602,86 +2606,87 @@ define amdgpu_cs float @cs_main(i32 %idx) { ; GFX9-FLATSCR-LABEL: cs_main: ; GFX9-FLATSCR: ; %bb.0: ; GFX9-FLATSCR-NEXT: s_add_u32 flat_scratch_lo, s0, s2 +; GFX9-FLATSCR-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX9-FLATSCR-NEXT: s_addc_u32 flat_scratch_hi, s1, 0 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, 0xbf20e7f4 +; GFX9-FLATSCR-NEXT: v_and_b32_e32 v4, 0x1fc, v0 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-NEXT: s_mov_b32 s0, 0 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v1, 0x3f5f2ee2 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, 0x3f523be1 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, 0x3f3d349e -; GFX9-FLATSCR-NEXT: v_lshlrev_b32_e32 v0, 2, v0 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[4:7], s0 offset:320 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, 0xbeae29dc -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v3 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v6, v2 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, v1 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v10, 0x3eae29dc -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v11, 0x3eae29d8 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v12, 0x3e319356 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v13, 0x3e31934f -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v15, 0xbf3d349e -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, 0xbf20e7f5 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v17, 0x3efcd89f -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, 0x3efcd89c -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v26, 0xbf5f2ee3 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v29, 0xbf523be3 -; GFX9-FLATSCR-NEXT: v_and_b32_e32 v31, 0x1fc, v0 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f638e37 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[4:7], s0 offset:288 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v23, 0xbefcd89f -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v24, 0xbefcd8a3 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v22, v21 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, 0xb702e758 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, 0xb7043519 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v6, 0xbe31934f -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, 0xbe319356 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[10:13], s0 offset:240 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[15:18], s0 offset:224 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v27, 0xbf638e39 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v28, v26 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, 0x3f20e7f5 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v19, v15 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v29 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v11, 0x3703c499 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:304 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[21:24], s0 offset:272 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[4:7], s0 offset:256 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:208 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:192 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v31 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v8, v11 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v9, v12 -; GFX9-FLATSCR-NEXT: scratch_load_dword v32, v4, off -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v25, v7 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:720 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, 0xbf523be1 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, 0x3f3d349c -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v2 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v6, v15 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v3 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v13, v10 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v28, v0 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v29, v26 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v30, v1 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v28, 0x3f523be1 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v29, 0x3f3d349e +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:320 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v17, 0xbeae29dc +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v1, v29 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, v28 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, v27 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v11, 0xbf3d349e +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v12, 0xbf20e7f5 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v13, 0x3efcd89f +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, 0x3efcd89c +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v22, 0xbf5f2ee3 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v25, 0xbf523be3 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v26, 0x3f638e37 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:288 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v19, 0xbefcd89f +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, 0xbefcd8a3 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xb702e758 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v1, 0xb7043519 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, 0xbe31934f +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, 0xbe319356 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v6, 0x3eae29dc +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, 0x3eae29d8 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v8, 0x3e319356 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v9, 0x3e31934f +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:224 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v23, 0xbf638e39 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v24, v22 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v15, v11 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v4 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 +; GFX9-FLATSCR-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, v11 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, 0x3703c499 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v29 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v9, v6 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-NEXT: v_add_u32_e32 v2, 0x200, v4 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[4:7], s0 offset:784 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v22, v16 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v6, 0xbf5f2ee2 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, v1 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v24, v21 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:736 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:816 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v17, v23 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v21 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[27:30], s0 offset:768 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v24, v26 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v25, v22 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v26, v27 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, v27 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v13, v19 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, v17 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 +; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(8) ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[4:7], s0 offset:752 -; GFX9-FLATSCR-NEXT: v_add_u32_e32 v0, 0x200, v31 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:800 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[15:18], s0 offset:704 -; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v0, off +; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v32, v0 +; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-LABEL: cs_main: @@ -2776,89 +2781,90 @@ define amdgpu_cs float @cs_main(i32 %idx) { ; GFX9-FLATSCR-PAL-NEXT: s_getpc_b64 s[2:3] ; GFX9-FLATSCR-PAL-NEXT: s_mov_b32 s2, s0 ; GFX9-FLATSCR-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x10 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, 0xbf20e7f4 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v1, 0x3f5f2ee2 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, 0x3f523be1 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, 0x3f3d349e +; GFX9-FLATSCR-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0 +; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v4, 0x1fc, v0 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-FLATSCR-PAL-NEXT: s_and_b32 s3, s3, 0xffff ; GFX9-FLATSCR-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s0 ; GFX9-FLATSCR-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 0 ; GFX9-FLATSCR-PAL-NEXT: s_mov_b32 s0, 0 -; GFX9-FLATSCR-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[4:7], s0 offset:320 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, 0xbeae29dc -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v3 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v6, v2 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, v1 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v10, 0x3eae29dc -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v11, 0x3eae29d8 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v12, 0x3e319356 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v13, 0x3e31934f -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v15, 0xbf3d349e -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, 0xbf20e7f5 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v17, 0x3efcd89f -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, 0x3efcd89c -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v26, 0xbf5f2ee3 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v29, 0xbf523be3 -; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v31, 0x1fc, v0 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f638e37 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[4:7], s0 offset:288 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v23, 0xbefcd89f -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v24, 0xbefcd8a3 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v22, v21 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, 0xb702e758 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, 0xb7043519 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v6, 0xbe31934f -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, 0xbe319356 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[10:13], s0 offset:240 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[15:18], s0 offset:224 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v27, 0xbf638e39 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v28, v26 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, 0x3f20e7f5 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v19, v15 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v29 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v11, 0x3703c499 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:304 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[21:24], s0 offset:272 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[4:7], s0 offset:256 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:208 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:192 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v31 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v8, v11 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v9, v12 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v32, v4, off -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v25, v7 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:720 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, 0xbf523be1 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, 0x3f3d349c -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v2 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v6, v15 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v3 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v13, v10 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v28, v0 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v29, v26 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v30, v1 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v28, 0x3f523be1 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v29, 0x3f3d349e +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:320 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v17, 0xbeae29dc +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v1, v29 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, v28 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, v27 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v11, 0xbf3d349e +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v12, 0xbf20e7f5 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v13, 0x3efcd89f +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, 0x3efcd89c +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v22, 0xbf5f2ee3 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v25, 0xbf523be3 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v26, 0x3f638e37 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:288 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v19, 0xbefcd89f +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, 0xbefcd8a3 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xb702e758 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v1, 0xb7043519 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, 0xbe31934f +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, 0xbe319356 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v6, 0x3eae29dc +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, 0x3eae29d8 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v8, 0x3e319356 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v9, 0x3e31934f +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:224 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v23, 0xbf638e39 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v24, v22 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v15, v11 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v4 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, v11 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, 0x3703c499 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v29 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v9, v6 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v2, 0x200, v4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[4:7], s0 offset:784 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v22, v16 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v6, 0xbf5f2ee2 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, v1 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v24, v21 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:736 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:816 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v17, v23 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v21 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[27:30], s0 offset:768 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v24, v26 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v25, v22 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v26, v27 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, v27 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v13, v19 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, v17 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 +; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(8) ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[4:7], s0 offset:752 -; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v0, 0x200, v31 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:800 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[15:18], s0 offset:704 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v0, off +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v32, v0 +; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-PAL-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-PAL-LABEL: cs_main: @@ -3605,7 +3611,7 @@ define amdgpu_hs float @hs_main(i32 %idx) { ; GFX9-FLATSCR-NEXT: s_add_u32 flat_scratch_lo, s0, s5 ; GFX9-FLATSCR-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX9-FLATSCR-NEXT: s_addc_u32 flat_scratch_hi, s1, 0 -; GFX9-FLATSCR-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-NEXT: s_mov_b32 s0, 0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 @@ -3641,48 +3647,49 @@ define amdgpu_hs float @hs_main(i32 %idx) { ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v0, off +; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-LABEL: hs_main: @@ -3778,7 +3785,7 @@ define amdgpu_hs float @hs_main(i32 %idx) { ; GFX9-FLATSCR-PAL-NEXT: s_mov_b32 s0, s8 ; GFX9-FLATSCR-PAL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 ; GFX9-FLATSCR-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0 -; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt lgkmcnt(0) @@ -3818,48 +3825,49 @@ define amdgpu_hs float @hs_main(i32 %idx) { ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v0, off +; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-PAL-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-PAL-LABEL: hs_main: @@ -4606,7 +4614,7 @@ define amdgpu_gs float @gs_main(i32 %idx) { ; GFX9-FLATSCR-NEXT: s_add_u32 flat_scratch_lo, s0, s5 ; GFX9-FLATSCR-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX9-FLATSCR-NEXT: s_addc_u32 flat_scratch_hi, s1, 0 -; GFX9-FLATSCR-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-NEXT: s_mov_b32 s0, 0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 @@ -4642,48 +4650,49 @@ define amdgpu_gs float @gs_main(i32 %idx) { ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v0, off +; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-LABEL: gs_main: @@ -4779,7 +4788,7 @@ define amdgpu_gs float @gs_main(i32 %idx) { ; GFX9-FLATSCR-PAL-NEXT: s_mov_b32 s0, s8 ; GFX9-FLATSCR-PAL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 ; GFX9-FLATSCR-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0 -; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt lgkmcnt(0) @@ -4819,48 +4828,49 @@ define amdgpu_gs float @gs_main(i32 %idx) { ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v0, off +; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-PAL-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-PAL-LABEL: gs_main: @@ -5616,7 +5626,7 @@ define amdgpu_hs <{i32, i32, i32, float}> @hs_ir_uses_scratch_offset(i32 inreg, ; GFX9-FLATSCR-NEXT: s_add_u32 flat_scratch_lo, s0, s5 ; GFX9-FLATSCR-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX9-FLATSCR-NEXT: s_addc_u32 flat_scratch_hi, s1, 0 -; GFX9-FLATSCR-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-NEXT: s_mov_b32 s0, 0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 @@ -5652,49 +5662,50 @@ define amdgpu_hs <{i32, i32, i32, float}> @hs_ir_uses_scratch_offset(i32 inreg, ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v0, off ; GFX9-FLATSCR-NEXT: s_mov_b32 s2, s7 +; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-LABEL: hs_ir_uses_scratch_offset: @@ -5791,7 +5802,7 @@ define amdgpu_hs <{i32, i32, i32, float}> @hs_ir_uses_scratch_offset(i32 inreg, ; GFX9-FLATSCR-PAL-NEXT: s_mov_b32 s0, s8 ; GFX9-FLATSCR-PAL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 ; GFX9-FLATSCR-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0 -; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt lgkmcnt(0) @@ -5831,49 +5842,50 @@ define amdgpu_hs <{i32, i32, i32, float}> @hs_ir_uses_scratch_offset(i32 inreg, ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v0, off ; GFX9-FLATSCR-PAL-NEXT: s_mov_b32 s2, s5 +; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-PAL-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-PAL-LABEL: hs_ir_uses_scratch_offset: @@ -6627,7 +6639,7 @@ define amdgpu_gs <{i32, i32, i32, float}> @gs_ir_uses_scratch_offset(i32 inreg, ; GFX9-FLATSCR-NEXT: s_add_u32 flat_scratch_lo, s0, s5 ; GFX9-FLATSCR-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX9-FLATSCR-NEXT: s_addc_u32 flat_scratch_hi, s1, 0 -; GFX9-FLATSCR-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-NEXT: s_mov_b32 s0, 0 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 @@ -6663,49 +6675,50 @@ define amdgpu_gs <{i32, i32, i32, float}> @gs_ir_uses_scratch_offset(i32 inreg, ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v0, off ; GFX9-FLATSCR-NEXT: s_mov_b32 s2, s7 +; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-LABEL: gs_ir_uses_scratch_offset: @@ -6802,7 +6815,7 @@ define amdgpu_gs <{i32, i32, i32, float}> @gs_ir_uses_scratch_offset(i32 inreg, ; GFX9-FLATSCR-PAL-NEXT: s_mov_b32 s0, s8 ; GFX9-FLATSCR-PAL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 ; GFX9-FLATSCR-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0 -; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v30, 0x1fc, v0 +; GFX9-FLATSCR-PAL-NEXT: v_and_b32_e32 v4, 0x1fc, v0 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v27, 0x3f5f2ee2 ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt lgkmcnt(0) @@ -6842,49 +6855,50 @@ define amdgpu_gs <{i32, i32, i32, float}> @gs_ir_uses_scratch_offset(i32 inreg, ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, 0x3f20e7f5 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v15, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v25 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v4 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[26:29], s0 offset:304 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[17:20], s0 offset:272 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:256 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[6:9], s0 offset:240 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[22:25], s0 offset:208 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:192 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v1, v5, off +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v30, 0xbf523be1 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, 0x3f3d349c +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v31, v28 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, v11 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v7, 0x3703c499 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v31, v0, off -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v16, v29 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0xbf523be1 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, 0x3f3d349c -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v1, v28 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, v11 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v21, v3 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:784 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v9, v6 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v10, v13 +; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v2, 0x200, v4 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v0, 0x3f20e7f4 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v24, v26 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v25, v22 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v26, v27 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:784 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v18, v12 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v2, 0xbf5f2ee2 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v3, v27 -; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v20, v17 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v32, 0xbf5f2ee2 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v33, v27 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[13:16], s0 offset:736 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v4, v7 +; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v5, v8 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v13, v19 ; GFX9-FLATSCR-PAL-NEXT: v_mov_b32_e32 v14, v17 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 -; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:752 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[18:21], s0 offset:800 -; GFX9-FLATSCR-PAL-NEXT: v_add_u32_e32 v0, 0x200, v30 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[7:10], s0 offset:816 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[23:26], s0 offset:768 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[30:33], s0 offset:752 +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[3:6], s0 offset:720 ; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[11:14], s0 offset:704 -; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v0, off ; GFX9-FLATSCR-PAL-NEXT: s_mov_b32 s2, s5 +; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(8) +; GFX9-FLATSCR-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:832 +; GFX9-FLATSCR-PAL-NEXT: scratch_load_dword v0, v2, off ; GFX9-FLATSCR-PAL-NEXT: s_waitcnt vmcnt(0) -; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v31, v0 +; GFX9-FLATSCR-PAL-NEXT: v_add_f32_e32 v0, v1, v0 ; GFX9-FLATSCR-PAL-NEXT: ; return to shader part epilog ; ; GFX10-FLATSCR-PAL-LABEL: gs_ir_uses_scratch_offset: diff --git a/llvm/test/CodeGen/AMDGPU/sdiv.ll b/llvm/test/CodeGen/AMDGPU/sdiv.ll index c1de1bd96bd5b..009889f5dd3bd 100644 --- a/llvm/test/CodeGen/AMDGPU/sdiv.ll +++ b/llvm/test/CodeGen/AMDGPU/sdiv.ll @@ -909,255 +909,255 @@ define amdgpu_kernel void @sdiv_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %i ; GCN-LABEL: sdiv_v4i32: ; GCN: ; %bb.0: ; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 -; GCN-NEXT: s_mov_b32 s7, 0xf000 -; GCN-NEXT: s_mov_b32 s6, -1 -; GCN-NEXT: s_mov_b32 s10, s6 -; GCN-NEXT: s_mov_b32 s11, s7 +; GCN-NEXT: s_mov_b32 s11, 0xf000 +; GCN-NEXT: s_mov_b32 s10, -1 +; GCN-NEXT: s_mov_b32 s6, s10 +; GCN-NEXT: s_mov_b32 s7, s11 ; GCN-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NEXT: s_mov_b32 s8, s2 -; GCN-NEXT: s_mov_b32 s9, s3 -; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 -; GCN-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 -; GCN-NEXT: s_mov_b32 s4, s0 -; GCN-NEXT: s_mov_b32 s5, s1 +; GCN-NEXT: s_mov_b32 s4, s2 +; GCN-NEXT: s_mov_b32 s5, s3 +; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 +; GCN-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16 +; GCN-NEXT: s_mov_b32 s8, s0 +; GCN-NEXT: s_mov_b32 s9, s1 ; GCN-NEXT: s_waitcnt vmcnt(1) -; GCN-NEXT: v_sub_i32_e32 v9, vcc, 0, v0 +; GCN-NEXT: v_sub_i32_e32 v12, vcc, 0, v1 ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: v_sub_i32_e32 v10, vcc, 0, v4 ; GCN-NEXT: v_xor_b32_e32 v8, v0, v4 ; GCN-NEXT: v_max_i32_e32 v4, v4, v10 -; GCN-NEXT: v_cvt_f32_u32_e32 v10, v4 -; GCN-NEXT: v_sub_i32_e32 v13, vcc, 0, v5 ; GCN-NEXT: v_xor_b32_e32 v11, v1, v5 -; GCN-NEXT: v_rcp_f32_e32 v10, v10 -; GCN-NEXT: v_max_i32_e32 v5, v5, v13 -; GCN-NEXT: v_cvt_f32_u32_e32 v13, v5 -; GCN-NEXT: v_sub_i32_e32 v16, vcc, 0, v4 -; GCN-NEXT: v_mul_f32_e32 v10, 0x4f7ffffe, v10 -; GCN-NEXT: v_cvt_u32_f32_e32 v10, v10 -; GCN-NEXT: v_rcp_f32_e32 v13, v13 -; GCN-NEXT: v_sub_i32_e32 v12, vcc, 0, v1 -; GCN-NEXT: v_mul_lo_u32 v16, v16, v10 -; GCN-NEXT: v_mul_f32_e32 v13, 0x4f7ffffe, v13 -; GCN-NEXT: v_cvt_u32_f32_e32 v13, v13 -; GCN-NEXT: v_max_i32_e32 v0, v0, v9 -; GCN-NEXT: v_mul_hi_u32 v16, v10, v16 ; GCN-NEXT: v_max_i32_e32 v1, v1, v12 -; GCN-NEXT: v_sub_i32_e32 v15, vcc, 0, v6 -; GCN-NEXT: v_add_i32_e32 v10, vcc, v10, v16 -; GCN-NEXT: v_sub_i32_e32 v16, vcc, 0, v5 -; GCN-NEXT: v_mul_lo_u32 v16, v16, v13 -; GCN-NEXT: v_mul_hi_u32 v10, v0, v10 +; GCN-NEXT: v_cvt_f32_u32_e32 v12, v4 +; GCN-NEXT: v_sub_i32_e32 v13, vcc, 0, v5 +; GCN-NEXT: v_sub_i32_e32 v16, vcc, 0, v6 ; GCN-NEXT: v_xor_b32_e32 v14, v2, v6 -; GCN-NEXT: v_max_i32_e32 v6, v6, v15 -; GCN-NEXT: v_mul_hi_u32 v12, v13, v16 -; GCN-NEXT: v_cvt_f32_u32_e32 v15, v6 -; GCN-NEXT: v_ashrrev_i32_e32 v8, 31, v8 -; GCN-NEXT: v_ashrrev_i32_e32 v11, 31, v11 -; GCN-NEXT: v_add_i32_e32 v12, vcc, v13, v12 -; GCN-NEXT: v_mul_lo_u32 v13, v10, v4 -; GCN-NEXT: v_mul_hi_u32 v12, v1, v12 -; GCN-NEXT: v_rcp_f32_e32 v9, v15 -; GCN-NEXT: v_ashrrev_i32_e32 v14, 31, v14 -; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v13 -; GCN-NEXT: v_add_i32_e32 v13, vcc, 1, v10 -; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v4 -; GCN-NEXT: v_cndmask_b32_e64 v10, v10, v13, s[0:1] -; GCN-NEXT: v_sub_i32_e32 v13, vcc, v0, v4 -; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v13, s[0:1] +; GCN-NEXT: v_max_i32_e32 v5, v5, v13 +; GCN-NEXT: v_max_i32_e32 v6, v6, v16 +; GCN-NEXT: v_ashrrev_i32_e32 v10, 31, v14 +; GCN-NEXT: v_cvt_f32_u32_e32 v14, v5 +; GCN-NEXT: v_cvt_f32_u32_e32 v16, v6 +; GCN-NEXT: v_rcp_f32_e32 v12, v12 +; GCN-NEXT: v_sub_i32_e32 v13, vcc, 0, v4 +; GCN-NEXT: v_rcp_f32_e32 v14, v14 +; GCN-NEXT: v_rcp_f32_e32 v16, v16 +; GCN-NEXT: v_mul_f32_e32 v12, 0x4f7ffffe, v12 +; GCN-NEXT: v_cvt_u32_f32_e32 v12, v12 +; GCN-NEXT: v_mul_f32_e32 v14, 0x4f7ffffe, v14 +; GCN-NEXT: v_mul_f32_e32 v16, 0x4f7ffffe, v16 +; GCN-NEXT: v_cvt_u32_f32_e32 v14, v14 +; GCN-NEXT: v_cvt_u32_f32_e32 v16, v16 +; GCN-NEXT: v_mul_lo_u32 v13, v13, v12 +; GCN-NEXT: v_sub_i32_e32 v9, vcc, 0, v0 +; GCN-NEXT: v_sub_i32_e32 v15, vcc, 0, v2 +; GCN-NEXT: v_sub_i32_e32 v17, vcc, 0, v7 +; GCN-NEXT: v_max_i32_e32 v0, v0, v9 +; GCN-NEXT: v_ashrrev_i32_e32 v9, 31, v11 +; GCN-NEXT: v_max_i32_e32 v2, v2, v15 +; GCN-NEXT: v_max_i32_e32 v11, v7, v17 +; GCN-NEXT: v_sub_i32_e32 v15, vcc, 0, v5 +; GCN-NEXT: v_sub_i32_e32 v17, vcc, 0, v6 +; GCN-NEXT: v_mul_lo_u32 v15, v15, v14 +; GCN-NEXT: v_mul_lo_u32 v17, v17, v16 +; GCN-NEXT: v_mul_hi_u32 v13, v12, v13 +; GCN-NEXT: v_cvt_f32_u32_e32 v18, v11 +; GCN-NEXT: v_mul_hi_u32 v15, v14, v15 +; GCN-NEXT: v_mul_hi_u32 v17, v16, v17 +; GCN-NEXT: v_add_i32_e32 v12, vcc, v12, v13 +; GCN-NEXT: v_mul_hi_u32 v12, v0, v12 +; GCN-NEXT: v_add_i32_e32 v13, vcc, v14, v15 +; GCN-NEXT: v_add_i32_e32 v14, vcc, v16, v17 +; GCN-NEXT: v_mul_hi_u32 v13, v1, v13 +; GCN-NEXT: v_mul_hi_u32 v14, v2, v14 +; GCN-NEXT: v_mul_lo_u32 v15, v12, v4 +; GCN-NEXT: v_rcp_f32_e32 v18, v18 +; GCN-NEXT: v_mul_lo_u32 v17, v13, v5 +; GCN-NEXT: v_add_i32_e32 v16, vcc, 1, v12 +; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v15 +; GCN-NEXT: v_mul_lo_u32 v15, v14, v6 +; GCN-NEXT: v_mul_f32_e32 v18, 0x4f7ffffe, v18 +; GCN-NEXT: v_cvt_u32_f32_e32 v18, v18 +; GCN-NEXT: v_sub_i32_e32 v1, vcc, v1, v17 +; GCN-NEXT: v_sub_i32_e32 v2, vcc, v2, v15 +; GCN-NEXT: v_add_i32_e32 v17, vcc, 1, v13 +; GCN-NEXT: v_add_i32_e32 v15, vcc, 1, v14 ; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v4 -; GCN-NEXT: v_mul_lo_u32 v0, v12, v5 -; GCN-NEXT: v_mul_f32_e32 v9, 0x4f7ffffe, v9 -; GCN-NEXT: v_cvt_u32_f32_e32 v9, v9 -; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v6 -; GCN-NEXT: v_sub_i32_e32 v0, vcc, v1, v0 -; GCN-NEXT: v_add_i32_e32 v1, vcc, 1, v12 -; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v0, v5 -; GCN-NEXT: v_cndmask_b32_e64 v1, v12, v1, s[2:3] -; GCN-NEXT: v_sub_i32_e32 v12, vcc, v0, v5 -; GCN-NEXT: v_mul_lo_u32 v4, v4, v9 -; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v12, s[2:3] -; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v0, v5 -; GCN-NEXT: v_sub_i32_e32 v0, vcc, 0, v7 -; GCN-NEXT: v_max_i32_e32 v5, v7, v0 -; GCN-NEXT: v_cvt_f32_u32_e32 v0, v5 -; GCN-NEXT: v_mul_hi_u32 v4, v9, v4 -; GCN-NEXT: v_add_i32_e32 v13, vcc, 1, v10 -; GCN-NEXT: v_rcp_f32_e32 v0, v0 -; GCN-NEXT: v_add_i32_e32 v4, vcc, v9, v4 -; GCN-NEXT: v_sub_i32_e32 v9, vcc, 0, v2 -; GCN-NEXT: v_max_i32_e32 v2, v2, v9 -; GCN-NEXT: v_mul_hi_u32 v4, v2, v4 -; GCN-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 -; GCN-NEXT: v_cvt_u32_f32_e32 v9, v0 -; GCN-NEXT: v_cndmask_b32_e64 v0, v10, v13, s[0:1] +; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v1, v5 +; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v2, v6 +; GCN-NEXT: v_sub_i32_e32 v19, vcc, 0, v11 +; GCN-NEXT: v_cndmask_b32_e64 v12, v12, v16, s[0:1] +; GCN-NEXT: v_sub_i32_e32 v16, vcc, v0, v4 +; GCN-NEXT: v_cndmask_b32_e64 v13, v13, v17, s[2:3] +; GCN-NEXT: v_sub_i32_e32 v17, vcc, v1, v5 +; GCN-NEXT: v_cndmask_b32_e64 v14, v14, v15, s[4:5] +; GCN-NEXT: v_sub_i32_e32 v15, vcc, v2, v6 +; GCN-NEXT: v_mul_lo_u32 v19, v19, v18 +; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v16, s[0:1] +; GCN-NEXT: v_add_i32_e32 v16, vcc, 1, v12 +; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v17, s[2:3] +; GCN-NEXT: v_add_i32_e32 v17, vcc, 1, v13 +; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v15, s[4:5] +; GCN-NEXT: v_add_i32_e32 v15, vcc, 1, v14 +; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 +; GCN-NEXT: v_cndmask_b32_e32 v0, v12, v16, vcc +; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v5 +; GCN-NEXT: v_ashrrev_i32_e32 v8, 31, v8 +; GCN-NEXT: v_cndmask_b32_e32 v1, v13, v17, vcc ; GCN-NEXT: v_xor_b32_e32 v0, v0, v8 +; GCN-NEXT: v_xor_b32_e32 v1, v1, v9 +; GCN-NEXT: v_mul_hi_u32 v4, v18, v19 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v8 -; GCN-NEXT: v_mul_lo_u32 v8, v4, v6 -; GCN-NEXT: v_add_i32_e32 v12, vcc, 1, v1 -; GCN-NEXT: v_sub_i32_e32 v10, vcc, 0, v5 -; GCN-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 -; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v12, s[2:3] -; GCN-NEXT: v_mul_lo_u32 v10, v10, v9 -; GCN-NEXT: v_add_i32_e32 v8, vcc, 1, v4 -; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v2, v6 -; GCN-NEXT: v_xor_b32_e32 v1, v1, v11 -; GCN-NEXT: v_cndmask_b32_e64 v4, v4, v8, s[0:1] -; GCN-NEXT: v_sub_i32_e32 v8, vcc, v2, v6 -; GCN-NEXT: v_sub_i32_e32 v1, vcc, v1, v11 -; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v8, s[0:1] -; GCN-NEXT: v_add_i32_e32 v8, vcc, 1, v4 +; GCN-NEXT: v_sub_i32_e32 v1, vcc, v1, v9 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6 -; GCN-NEXT: v_cndmask_b32_e32 v2, v4, v8, vcc -; GCN-NEXT: v_mul_hi_u32 v4, v9, v10 -; GCN-NEXT: v_sub_i32_e32 v6, vcc, 0, v3 -; GCN-NEXT: v_max_i32_e32 v6, v3, v6 -; GCN-NEXT: v_add_i32_e32 v4, vcc, v9, v4 -; GCN-NEXT: v_mul_hi_u32 v4, v6, v4 -; GCN-NEXT: v_xor_b32_e32 v2, v2, v14 -; GCN-NEXT: v_sub_i32_e32 v2, vcc, v2, v14 -; GCN-NEXT: v_mul_lo_u32 v8, v4, v5 +; GCN-NEXT: v_cndmask_b32_e32 v2, v14, v15, vcc +; GCN-NEXT: v_sub_i32_e32 v5, vcc, 0, v3 +; GCN-NEXT: v_max_i32_e32 v5, v3, v5 +; GCN-NEXT: v_add_i32_e32 v4, vcc, v18, v4 +; GCN-NEXT: v_mul_hi_u32 v4, v5, v4 +; GCN-NEXT: v_xor_b32_e32 v2, v2, v10 +; GCN-NEXT: v_sub_i32_e32 v2, vcc, v2, v10 +; GCN-NEXT: v_mul_lo_u32 v6, v4, v11 ; GCN-NEXT: v_xor_b32_e32 v3, v3, v7 -; GCN-NEXT: v_add_i32_e32 v7, vcc, 1, v4 -; GCN-NEXT: v_sub_i32_e32 v6, vcc, v6, v8 -; GCN-NEXT: v_sub_i32_e32 v8, vcc, v6, v5 -; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v6, v5 -; GCN-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc -; GCN-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc -; GCN-NEXT: v_add_i32_e32 v7, vcc, 1, v4 -; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v6, v5 ; GCN-NEXT: v_ashrrev_i32_e32 v3, 31, v3 -; GCN-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc +; GCN-NEXT: v_sub_i32_e32 v5, vcc, v5, v6 +; GCN-NEXT: v_add_i32_e32 v6, vcc, 1, v4 +; GCN-NEXT: v_sub_i32_e32 v7, vcc, v5, v11 +; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v5, v11 +; GCN-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc +; GCN-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc +; GCN-NEXT: v_add_i32_e32 v6, vcc, 1, v4 +; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v5, v11 +; GCN-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc ; GCN-NEXT: v_xor_b32_e32 v4, v4, v3 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, v4, v3 -; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 +; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 ; GCN-NEXT: s_endpgm ; ; TONGA-LABEL: sdiv_v4i32: ; TONGA: ; %bb.0: ; TONGA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 -; TONGA-NEXT: s_mov_b32 s7, 0xf000 -; TONGA-NEXT: s_mov_b32 s6, -1 -; TONGA-NEXT: s_mov_b32 s10, s6 -; TONGA-NEXT: s_mov_b32 s11, s7 +; TONGA-NEXT: s_mov_b32 s11, 0xf000 +; TONGA-NEXT: s_mov_b32 s10, -1 +; TONGA-NEXT: s_mov_b32 s6, s10 +; TONGA-NEXT: s_mov_b32 s7, s11 ; TONGA-NEXT: s_waitcnt lgkmcnt(0) -; TONGA-NEXT: s_mov_b32 s8, s2 -; TONGA-NEXT: s_mov_b32 s9, s3 -; TONGA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 -; TONGA-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 -; TONGA-NEXT: s_mov_b32 s4, s0 -; TONGA-NEXT: s_mov_b32 s5, s1 +; TONGA-NEXT: s_mov_b32 s4, s2 +; TONGA-NEXT: s_mov_b32 s5, s3 +; TONGA-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 +; TONGA-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16 +; TONGA-NEXT: s_mov_b32 s8, s0 +; TONGA-NEXT: s_mov_b32 s9, s1 ; TONGA-NEXT: s_waitcnt vmcnt(1) -; TONGA-NEXT: v_sub_u32_e32 v9, vcc, 0, v0 +; TONGA-NEXT: v_sub_u32_e32 v12, vcc, 0, v1 ; TONGA-NEXT: s_waitcnt vmcnt(0) ; TONGA-NEXT: v_sub_u32_e32 v10, vcc, 0, v4 ; TONGA-NEXT: v_xor_b32_e32 v8, v0, v4 ; TONGA-NEXT: v_max_i32_e32 v4, v4, v10 -; TONGA-NEXT: v_cvt_f32_u32_e32 v10, v4 -; TONGA-NEXT: v_sub_u32_e32 v13, vcc, 0, v5 ; TONGA-NEXT: v_xor_b32_e32 v11, v1, v5 -; TONGA-NEXT: v_rcp_f32_e32 v10, v10 -; TONGA-NEXT: v_max_i32_e32 v5, v5, v13 -; TONGA-NEXT: v_cvt_f32_u32_e32 v13, v5 -; TONGA-NEXT: v_sub_u32_e32 v16, vcc, 0, v4 -; TONGA-NEXT: v_mul_f32_e32 v10, 0x4f7ffffe, v10 -; TONGA-NEXT: v_cvt_u32_f32_e32 v10, v10 -; TONGA-NEXT: v_rcp_f32_e32 v13, v13 -; TONGA-NEXT: v_sub_u32_e32 v12, vcc, 0, v1 -; TONGA-NEXT: v_mul_lo_u32 v16, v16, v10 -; TONGA-NEXT: v_mul_f32_e32 v13, 0x4f7ffffe, v13 -; TONGA-NEXT: v_cvt_u32_f32_e32 v13, v13 -; TONGA-NEXT: v_max_i32_e32 v0, v0, v9 -; TONGA-NEXT: v_mul_hi_u32 v16, v10, v16 ; TONGA-NEXT: v_max_i32_e32 v1, v1, v12 -; TONGA-NEXT: v_sub_u32_e32 v15, vcc, 0, v6 -; TONGA-NEXT: v_add_u32_e32 v10, vcc, v10, v16 -; TONGA-NEXT: v_sub_u32_e32 v16, vcc, 0, v5 -; TONGA-NEXT: v_mul_lo_u32 v16, v16, v13 -; TONGA-NEXT: v_mul_hi_u32 v10, v0, v10 +; TONGA-NEXT: v_cvt_f32_u32_e32 v12, v4 +; TONGA-NEXT: v_sub_u32_e32 v13, vcc, 0, v5 +; TONGA-NEXT: v_sub_u32_e32 v16, vcc, 0, v6 ; TONGA-NEXT: v_xor_b32_e32 v14, v2, v6 -; TONGA-NEXT: v_max_i32_e32 v6, v6, v15 -; TONGA-NEXT: v_mul_hi_u32 v12, v13, v16 -; TONGA-NEXT: v_cvt_f32_u32_e32 v15, v6 -; TONGA-NEXT: v_ashrrev_i32_e32 v8, 31, v8 -; TONGA-NEXT: v_ashrrev_i32_e32 v11, 31, v11 -; TONGA-NEXT: v_add_u32_e32 v12, vcc, v13, v12 -; TONGA-NEXT: v_mul_lo_u32 v13, v10, v4 -; TONGA-NEXT: v_mul_hi_u32 v12, v1, v12 -; TONGA-NEXT: v_rcp_f32_e32 v9, v15 -; TONGA-NEXT: v_ashrrev_i32_e32 v14, 31, v14 -; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v0, v13 -; TONGA-NEXT: v_add_u32_e32 v13, vcc, 1, v10 -; TONGA-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v4 -; TONGA-NEXT: v_cndmask_b32_e64 v10, v10, v13, s[0:1] -; TONGA-NEXT: v_sub_u32_e32 v13, vcc, v0, v4 -; TONGA-NEXT: v_cndmask_b32_e64 v0, v0, v13, s[0:1] +; TONGA-NEXT: v_max_i32_e32 v5, v5, v13 +; TONGA-NEXT: v_max_i32_e32 v6, v6, v16 +; TONGA-NEXT: v_ashrrev_i32_e32 v10, 31, v14 +; TONGA-NEXT: v_cvt_f32_u32_e32 v14, v5 +; TONGA-NEXT: v_cvt_f32_u32_e32 v16, v6 +; TONGA-NEXT: v_rcp_f32_e32 v12, v12 +; TONGA-NEXT: v_sub_u32_e32 v13, vcc, 0, v4 +; TONGA-NEXT: v_rcp_f32_e32 v14, v14 +; TONGA-NEXT: v_rcp_f32_e32 v16, v16 +; TONGA-NEXT: v_mul_f32_e32 v12, 0x4f7ffffe, v12 +; TONGA-NEXT: v_cvt_u32_f32_e32 v12, v12 +; TONGA-NEXT: v_mul_f32_e32 v14, 0x4f7ffffe, v14 +; TONGA-NEXT: v_mul_f32_e32 v16, 0x4f7ffffe, v16 +; TONGA-NEXT: v_cvt_u32_f32_e32 v14, v14 +; TONGA-NEXT: v_cvt_u32_f32_e32 v16, v16 +; TONGA-NEXT: v_mul_lo_u32 v13, v13, v12 +; TONGA-NEXT: v_sub_u32_e32 v9, vcc, 0, v0 +; TONGA-NEXT: v_sub_u32_e32 v15, vcc, 0, v2 +; TONGA-NEXT: v_sub_u32_e32 v17, vcc, 0, v7 +; TONGA-NEXT: v_max_i32_e32 v0, v0, v9 +; TONGA-NEXT: v_ashrrev_i32_e32 v9, 31, v11 +; TONGA-NEXT: v_max_i32_e32 v2, v2, v15 +; TONGA-NEXT: v_max_i32_e32 v11, v7, v17 +; TONGA-NEXT: v_sub_u32_e32 v15, vcc, 0, v5 +; TONGA-NEXT: v_sub_u32_e32 v17, vcc, 0, v6 +; TONGA-NEXT: v_mul_lo_u32 v15, v15, v14 +; TONGA-NEXT: v_mul_lo_u32 v17, v17, v16 +; TONGA-NEXT: v_mul_hi_u32 v13, v12, v13 +; TONGA-NEXT: v_cvt_f32_u32_e32 v18, v11 +; TONGA-NEXT: v_mul_hi_u32 v15, v14, v15 +; TONGA-NEXT: v_mul_hi_u32 v17, v16, v17 +; TONGA-NEXT: v_add_u32_e32 v12, vcc, v12, v13 +; TONGA-NEXT: v_mul_hi_u32 v12, v0, v12 +; TONGA-NEXT: v_add_u32_e32 v13, vcc, v14, v15 +; TONGA-NEXT: v_add_u32_e32 v14, vcc, v16, v17 +; TONGA-NEXT: v_mul_hi_u32 v13, v1, v13 +; TONGA-NEXT: v_mul_hi_u32 v14, v2, v14 +; TONGA-NEXT: v_mul_lo_u32 v15, v12, v4 +; TONGA-NEXT: v_rcp_f32_e32 v18, v18 +; TONGA-NEXT: v_mul_lo_u32 v17, v13, v5 +; TONGA-NEXT: v_add_u32_e32 v16, vcc, 1, v12 +; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v0, v15 +; TONGA-NEXT: v_mul_lo_u32 v15, v14, v6 +; TONGA-NEXT: v_mul_f32_e32 v18, 0x4f7ffffe, v18 +; TONGA-NEXT: v_cvt_u32_f32_e32 v18, v18 +; TONGA-NEXT: v_sub_u32_e32 v1, vcc, v1, v17 +; TONGA-NEXT: v_sub_u32_e32 v2, vcc, v2, v15 +; TONGA-NEXT: v_add_u32_e32 v17, vcc, 1, v13 +; TONGA-NEXT: v_add_u32_e32 v15, vcc, 1, v14 ; TONGA-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v4 -; TONGA-NEXT: v_mul_lo_u32 v0, v12, v5 -; TONGA-NEXT: v_mul_f32_e32 v9, 0x4f7ffffe, v9 -; TONGA-NEXT: v_cvt_u32_f32_e32 v9, v9 -; TONGA-NEXT: v_sub_u32_e32 v4, vcc, 0, v6 -; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v1, v0 -; TONGA-NEXT: v_add_u32_e32 v1, vcc, 1, v12 -; TONGA-NEXT: v_cmp_ge_u32_e64 s[2:3], v0, v5 -; TONGA-NEXT: v_cndmask_b32_e64 v1, v12, v1, s[2:3] -; TONGA-NEXT: v_sub_u32_e32 v12, vcc, v0, v5 -; TONGA-NEXT: v_mul_lo_u32 v4, v4, v9 -; TONGA-NEXT: v_cndmask_b32_e64 v0, v0, v12, s[2:3] -; TONGA-NEXT: v_cmp_ge_u32_e64 s[2:3], v0, v5 -; TONGA-NEXT: v_sub_u32_e32 v0, vcc, 0, v7 -; TONGA-NEXT: v_max_i32_e32 v5, v7, v0 -; TONGA-NEXT: v_cvt_f32_u32_e32 v0, v5 -; TONGA-NEXT: v_mul_hi_u32 v4, v9, v4 -; TONGA-NEXT: v_add_u32_e32 v13, vcc, 1, v10 -; TONGA-NEXT: v_rcp_f32_e32 v0, v0 -; TONGA-NEXT: v_add_u32_e32 v4, vcc, v9, v4 -; TONGA-NEXT: v_sub_u32_e32 v9, vcc, 0, v2 -; TONGA-NEXT: v_max_i32_e32 v2, v2, v9 -; TONGA-NEXT: v_mul_hi_u32 v4, v2, v4 -; TONGA-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 -; TONGA-NEXT: v_cvt_u32_f32_e32 v9, v0 -; TONGA-NEXT: v_cndmask_b32_e64 v0, v10, v13, s[0:1] +; TONGA-NEXT: v_cmp_ge_u32_e64 s[2:3], v1, v5 +; TONGA-NEXT: v_cmp_ge_u32_e64 s[4:5], v2, v6 +; TONGA-NEXT: v_sub_u32_e32 v19, vcc, 0, v11 +; TONGA-NEXT: v_cndmask_b32_e64 v12, v12, v16, s[0:1] +; TONGA-NEXT: v_sub_u32_e32 v16, vcc, v0, v4 +; TONGA-NEXT: v_cndmask_b32_e64 v13, v13, v17, s[2:3] +; TONGA-NEXT: v_sub_u32_e32 v17, vcc, v1, v5 +; TONGA-NEXT: v_cndmask_b32_e64 v14, v14, v15, s[4:5] +; TONGA-NEXT: v_sub_u32_e32 v15, vcc, v2, v6 +; TONGA-NEXT: v_mul_lo_u32 v19, v19, v18 +; TONGA-NEXT: v_cndmask_b32_e64 v0, v0, v16, s[0:1] +; TONGA-NEXT: v_add_u32_e32 v16, vcc, 1, v12 +; TONGA-NEXT: v_cndmask_b32_e64 v1, v1, v17, s[2:3] +; TONGA-NEXT: v_add_u32_e32 v17, vcc, 1, v13 +; TONGA-NEXT: v_cndmask_b32_e64 v2, v2, v15, s[4:5] +; TONGA-NEXT: v_add_u32_e32 v15, vcc, 1, v14 +; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 +; TONGA-NEXT: v_cndmask_b32_e32 v0, v12, v16, vcc +; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v1, v5 +; TONGA-NEXT: v_ashrrev_i32_e32 v8, 31, v8 +; TONGA-NEXT: v_cndmask_b32_e32 v1, v13, v17, vcc ; TONGA-NEXT: v_xor_b32_e32 v0, v0, v8 +; TONGA-NEXT: v_xor_b32_e32 v1, v1, v9 +; TONGA-NEXT: v_mul_hi_u32 v4, v18, v19 ; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v0, v8 -; TONGA-NEXT: v_mul_lo_u32 v8, v4, v6 -; TONGA-NEXT: v_add_u32_e32 v12, vcc, 1, v1 -; TONGA-NEXT: v_sub_u32_e32 v10, vcc, 0, v5 -; TONGA-NEXT: v_sub_u32_e32 v2, vcc, v2, v8 -; TONGA-NEXT: v_cndmask_b32_e64 v1, v1, v12, s[2:3] -; TONGA-NEXT: v_mul_lo_u32 v10, v10, v9 -; TONGA-NEXT: v_add_u32_e32 v8, vcc, 1, v4 -; TONGA-NEXT: v_cmp_ge_u32_e64 s[0:1], v2, v6 -; TONGA-NEXT: v_xor_b32_e32 v1, v1, v11 -; TONGA-NEXT: v_cndmask_b32_e64 v4, v4, v8, s[0:1] -; TONGA-NEXT: v_sub_u32_e32 v8, vcc, v2, v6 -; TONGA-NEXT: v_sub_u32_e32 v1, vcc, v1, v11 -; TONGA-NEXT: v_cndmask_b32_e64 v2, v2, v8, s[0:1] -; TONGA-NEXT: v_add_u32_e32 v8, vcc, 1, v4 +; TONGA-NEXT: v_sub_u32_e32 v1, vcc, v1, v9 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6 -; TONGA-NEXT: v_cndmask_b32_e32 v2, v4, v8, vcc -; TONGA-NEXT: v_mul_hi_u32 v4, v9, v10 -; TONGA-NEXT: v_sub_u32_e32 v6, vcc, 0, v3 -; TONGA-NEXT: v_max_i32_e32 v6, v3, v6 -; TONGA-NEXT: v_add_u32_e32 v4, vcc, v9, v4 -; TONGA-NEXT: v_mul_hi_u32 v4, v6, v4 -; TONGA-NEXT: v_xor_b32_e32 v2, v2, v14 -; TONGA-NEXT: v_sub_u32_e32 v2, vcc, v2, v14 -; TONGA-NEXT: v_mul_lo_u32 v8, v4, v5 +; TONGA-NEXT: v_cndmask_b32_e32 v2, v14, v15, vcc +; TONGA-NEXT: v_sub_u32_e32 v5, vcc, 0, v3 +; TONGA-NEXT: v_max_i32_e32 v5, v3, v5 +; TONGA-NEXT: v_add_u32_e32 v4, vcc, v18, v4 +; TONGA-NEXT: v_mul_hi_u32 v4, v5, v4 +; TONGA-NEXT: v_xor_b32_e32 v2, v2, v10 +; TONGA-NEXT: v_sub_u32_e32 v2, vcc, v2, v10 +; TONGA-NEXT: v_mul_lo_u32 v6, v4, v11 ; TONGA-NEXT: v_xor_b32_e32 v3, v3, v7 -; TONGA-NEXT: v_add_u32_e32 v7, vcc, 1, v4 -; TONGA-NEXT: v_sub_u32_e32 v6, vcc, v6, v8 -; TONGA-NEXT: v_sub_u32_e32 v8, vcc, v6, v5 -; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v6, v5 -; TONGA-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc -; TONGA-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc -; TONGA-NEXT: v_add_u32_e32 v7, vcc, 1, v4 -; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v6, v5 ; TONGA-NEXT: v_ashrrev_i32_e32 v3, 31, v3 -; TONGA-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc +; TONGA-NEXT: v_sub_u32_e32 v5, vcc, v5, v6 +; TONGA-NEXT: v_add_u32_e32 v6, vcc, 1, v4 +; TONGA-NEXT: v_sub_u32_e32 v7, vcc, v5, v11 +; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v5, v11 +; TONGA-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc +; TONGA-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc +; TONGA-NEXT: v_add_u32_e32 v6, vcc, 1, v4 +; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v5, v11 +; TONGA-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc ; TONGA-NEXT: v_xor_b32_e32 v4, v4, v3 ; TONGA-NEXT: v_sub_u32_e32 v3, vcc, v4, v3 -; TONGA-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 +; TONGA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 ; TONGA-NEXT: s_endpgm ; ; GFX9-LABEL: sdiv_v4i32: diff --git a/llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll b/llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll index fa705fb455ba8..955f7ce44c22a 100644 --- a/llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll +++ b/llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll @@ -873,20 +873,20 @@ define amdgpu_kernel void @mul_v8half(ptr addrspace(1) %out, ptr addrspace(1) %i ; NOSDWA-NEXT: v_lshrrev_b32_e32 v13, 16, v5 ; NOSDWA-NEXT: v_mul_f16_e32 v1, v5, v1 ; NOSDWA-NEXT: v_lshrrev_b32_e32 v5, 16, v0 +; NOSDWA-NEXT: v_lshrrev_b32_e32 v14, 16, v4 ; NOSDWA-NEXT: v_mul_f16_e32 v0, v4, v0 -; NOSDWA-NEXT: v_lshrrev_b32_e32 v4, 16, v4 -; NOSDWA-NEXT: v_mul_f16_e32 v10, v11, v10 +; NOSDWA-NEXT: v_mul_f16_e32 v4, v11, v10 ; NOSDWA-NEXT: v_mul_f16_e32 v7, v12, v7 ; NOSDWA-NEXT: v_mul_f16_e32 v6, v13, v6 -; NOSDWA-NEXT: v_mul_f16_e32 v4, v4, v5 -; NOSDWA-NEXT: v_lshlrev_b32_e32 v5, 16, v10 +; NOSDWA-NEXT: v_mul_f16_e32 v5, v14, v5 +; NOSDWA-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; NOSDWA-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; NOSDWA-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; NOSDWA-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; NOSDWA-NEXT: v_or_b32_e32 v3, v3, v5 +; NOSDWA-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; NOSDWA-NEXT: v_or_b32_e32 v3, v3, v4 ; NOSDWA-NEXT: v_or_b32_e32 v2, v2, v7 ; NOSDWA-NEXT: v_or_b32_e32 v1, v1, v6 -; NOSDWA-NEXT: v_or_b32_e32 v0, v0, v4 +; NOSDWA-NEXT: v_or_b32_e32 v0, v0, v5 ; NOSDWA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; NOSDWA-NEXT: s_endpgm ; diff --git a/llvm/test/CodeGen/AMDGPU/sema-v-unsched-bundle.ll b/llvm/test/CodeGen/AMDGPU/sema-v-unsched-bundle.ll index 295075266271a..993330a86254f 100644 --- a/llvm/test/CodeGen/AMDGPU/sema-v-unsched-bundle.ll +++ b/llvm/test/CodeGen/AMDGPU/sema-v-unsched-bundle.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc -mtriple=amdgcn -O1 -mcpu=gfx90a -debug-only=machine-scheduler -filetype=null < %s 2>&1 | FileCheck --check-prefix=DEBUG %s +; RUN: llc -mtriple=amdgcn -O1 -mcpu=gfx90a -amdgpu-use-amdgpu-trackers=0 -debug-only=machine-scheduler -filetype=null < %s 2>&1 | FileCheck --check-prefix=DEBUG %s ; DEBUG: Reverting scheduling for region 0 diff --git a/llvm/test/CodeGen/AMDGPU/shift-i128.ll b/llvm/test/CodeGen/AMDGPU/shift-i128.ll index 942ad6f5f6390..59d427725fd8d 100644 --- a/llvm/test/CodeGen/AMDGPU/shift-i128.ll +++ b/llvm/test/CodeGen/AMDGPU/shift-i128.ll @@ -296,18 +296,18 @@ define <2 x i128> @v_shl_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GCN-NEXT: v_lshr_b64 v[16:17], v[0:1], v16 ; GCN-NEXT: v_lshl_b64 v[18:19], v[2:3], v8 ; GCN-NEXT: v_cmp_gt_u64_e32 vcc, 64, v[8:9] +; GCN-NEXT: v_or_b32_e32 v18, v18, v16 ; GCN-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[10:11] -; GCN-NEXT: v_or_b32_e32 v11, v9, v11 -; GCN-NEXT: v_subrev_i32_e64 v9, s[6:7], 64, v8 +; GCN-NEXT: v_subrev_i32_e64 v16, s[6:7], 64, v8 ; GCN-NEXT: v_or_b32_e32 v19, v19, v17 -; GCN-NEXT: v_or_b32_e32 v18, v18, v16 +; GCN-NEXT: v_lshl_b64 v[16:17], v[0:1], v16 +; GCN-NEXT: v_or_b32_e32 v11, v9, v11 ; GCN-NEXT: v_or_b32_e32 v10, v8, v10 -; GCN-NEXT: v_lshl_b64 v[16:17], v[0:1], v9 ; GCN-NEXT: s_and_b64 vcc, s[4:5], vcc ; GCN-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[10:11] -; GCN-NEXT: v_cndmask_b32_e32 v9, v16, v18, vcc -; GCN-NEXT: v_cndmask_b32_e64 v2, v9, v2, s[4:5] +; GCN-NEXT: v_cndmask_b32_e32 v16, v16, v18, vcc ; GCN-NEXT: v_sub_i32_e64 v9, s[6:7], 64, v12 +; GCN-NEXT: v_cndmask_b32_e64 v2, v16, v2, s[4:5] ; GCN-NEXT: v_cndmask_b32_e32 v11, v17, v19, vcc ; GCN-NEXT: v_lshr_b64 v[9:10], v[4:5], v9 ; GCN-NEXT: v_lshl_b64 v[16:17], v[6:7], v12 @@ -345,18 +345,18 @@ define <2 x i128> @v_lshr_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GCN-NEXT: v_lshl_b64 v[16:17], v[2:3], v16 ; GCN-NEXT: v_lshr_b64 v[18:19], v[0:1], v8 ; GCN-NEXT: v_cmp_gt_u64_e32 vcc, 64, v[8:9] +; GCN-NEXT: v_or_b32_e32 v18, v18, v16 ; GCN-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[10:11] -; GCN-NEXT: v_or_b32_e32 v11, v9, v11 -; GCN-NEXT: v_subrev_i32_e64 v9, s[6:7], 64, v8 +; GCN-NEXT: v_subrev_i32_e64 v16, s[6:7], 64, v8 ; GCN-NEXT: v_or_b32_e32 v19, v19, v17 -; GCN-NEXT: v_or_b32_e32 v18, v18, v16 +; GCN-NEXT: v_lshr_b64 v[16:17], v[2:3], v16 +; GCN-NEXT: v_or_b32_e32 v11, v9, v11 ; GCN-NEXT: v_or_b32_e32 v10, v8, v10 -; GCN-NEXT: v_lshr_b64 v[16:17], v[2:3], v9 ; GCN-NEXT: s_and_b64 vcc, s[4:5], vcc ; GCN-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[10:11] -; GCN-NEXT: v_cndmask_b32_e32 v9, v16, v18, vcc -; GCN-NEXT: v_cndmask_b32_e64 v0, v9, v0, s[4:5] +; GCN-NEXT: v_cndmask_b32_e32 v16, v16, v18, vcc ; GCN-NEXT: v_sub_i32_e64 v9, s[6:7], 64, v12 +; GCN-NEXT: v_cndmask_b32_e64 v0, v16, v0, s[4:5] ; GCN-NEXT: v_cndmask_b32_e32 v11, v17, v19, vcc ; GCN-NEXT: v_lshl_b64 v[9:10], v[6:7], v9 ; GCN-NEXT: v_lshr_b64 v[16:17], v[4:5], v12 @@ -394,18 +394,18 @@ define <2 x i128> @v_ashr_v2i128_vv(<2 x i128> %lhs, <2 x i128> %rhs) { ; GCN-NEXT: v_lshl_b64 v[16:17], v[2:3], v16 ; GCN-NEXT: v_lshr_b64 v[18:19], v[0:1], v8 ; GCN-NEXT: v_cmp_gt_u64_e32 vcc, 64, v[8:9] +; GCN-NEXT: v_or_b32_e32 v18, v18, v16 ; GCN-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[10:11] -; GCN-NEXT: v_or_b32_e32 v11, v9, v11 -; GCN-NEXT: v_subrev_i32_e64 v9, s[6:7], 64, v8 +; GCN-NEXT: v_subrev_i32_e64 v16, s[6:7], 64, v8 ; GCN-NEXT: v_or_b32_e32 v19, v19, v17 -; GCN-NEXT: v_or_b32_e32 v18, v18, v16 +; GCN-NEXT: v_ashr_i64 v[16:17], v[2:3], v16 +; GCN-NEXT: v_or_b32_e32 v11, v9, v11 ; GCN-NEXT: v_or_b32_e32 v10, v8, v10 -; GCN-NEXT: v_ashr_i64 v[16:17], v[2:3], v9 ; GCN-NEXT: s_and_b64 vcc, s[4:5], vcc ; GCN-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[10:11] -; GCN-NEXT: v_cndmask_b32_e32 v9, v16, v18, vcc -; GCN-NEXT: v_cndmask_b32_e64 v0, v9, v0, s[4:5] +; GCN-NEXT: v_cndmask_b32_e32 v16, v16, v18, vcc ; GCN-NEXT: v_sub_i32_e64 v9, s[6:7], 64, v12 +; GCN-NEXT: v_cndmask_b32_e64 v0, v16, v0, s[4:5] ; GCN-NEXT: v_cndmask_b32_e32 v11, v17, v19, vcc ; GCN-NEXT: v_lshl_b64 v[9:10], v[6:7], v9 ; GCN-NEXT: v_lshr_b64 v[16:17], v[4:5], v12 diff --git a/llvm/test/CodeGen/AMDGPU/shl.ll b/llvm/test/CodeGen/AMDGPU/shl.ll index 7278247d9b45f..e2d473fbe4de4 100644 --- a/llvm/test/CodeGen/AMDGPU/shl.ll +++ b/llvm/test/CodeGen/AMDGPU/shl.ll @@ -911,20 +911,20 @@ define amdgpu_kernel void @shl_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %in ; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_mov_b32 s8, s2 ; SI-NEXT: s_mov_b32 s9, s3 -; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:48 -; SI-NEXT: buffer_load_dwordx4 v[3:6], off, s[8:11], 0 offset:16 -; SI-NEXT: buffer_load_dwordx4 v[7:10], off, s[8:11], 0 -; SI-NEXT: buffer_load_dwordx4 v[11:14], off, s[8:11], 0 offset:32 +; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 +; SI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:32 +; SI-NEXT: buffer_load_dwordx4 v[11:14], off, s[8:11], 0 offset:48 ; SI-NEXT: s_mov_b32 s4, s0 ; SI-NEXT: s_mov_b32 s5, s1 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshl_b64 v[5:6], v[5:6], v2 -; SI-NEXT: v_lshl_b64 v[3:4], v[3:4], v0 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshl_b64 v[2:3], v[2:3], v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshl_b64 v[9:10], v[9:10], v13 -; SI-NEXT: v_lshl_b64 v[7:8], v[7:8], v11 -; SI-NEXT: buffer_store_dwordx4 v[3:6], off, s[4:7], 0 offset:16 -; SI-NEXT: buffer_store_dwordx4 v[7:10], off, s[4:7], 0 +; SI-NEXT: v_lshl_b64 v[6:7], v[6:7], v13 +; SI-NEXT: v_lshl_b64 v[4:5], v[4:5], v11 +; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 +; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:16 +; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 ; SI-NEXT: s_endpgm ; ; VI-LABEL: shl_v4i64: diff --git a/llvm/test/CodeGen/AMDGPU/shl.v2i64.ll b/llvm/test/CodeGen/AMDGPU/shl.v2i64.ll index 9b57faa81d46f..5e8bf447f6df1 100644 --- a/llvm/test/CodeGen/AMDGPU/shl.v2i64.ll +++ b/llvm/test/CodeGen/AMDGPU/shl.v2i64.ll @@ -349,58 +349,58 @@ define amdgpu_kernel void @v_shl_v16i64(ptr addrspace(1) %out, ptr addrspace(1) ; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv ; GFX1250-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-NEXT: v_lshlrev_b32_e32 v52, 7, v0 +; GFX1250-NEXT: v_lshlrev_b32_e32 v64, 7, v0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 -; GFX1250-NEXT: s_clause 0xc -; GFX1250-NEXT: global_load_b128 v[0:3], v52, s[2:3] offset:144 -; GFX1250-NEXT: global_load_b128 v[4:7], v52, s[2:3] offset:16 -; GFX1250-NEXT: global_load_b128 v[8:11], v52, s[2:3] -; GFX1250-NEXT: global_load_b128 v[12:15], v52, s[2:3] offset:128 -; GFX1250-NEXT: global_load_b128 v[16:19], v52, s[2:3] offset:64 -; GFX1250-NEXT: global_load_b128 v[20:23], v52, s[2:3] offset:192 -; GFX1250-NEXT: global_load_b128 v[24:27], v52, s[2:3] offset:96 -; GFX1250-NEXT: global_load_b128 v[28:31], v52, s[2:3] offset:112 -; GFX1250-NEXT: global_load_b128 v[32:35], v52, s[2:3] offset:80 -; GFX1250-NEXT: global_load_b128 v[36:39], v52, s[2:3] offset:32 -; GFX1250-NEXT: global_load_b128 v[40:43], v52, s[2:3] offset:48 -; GFX1250-NEXT: global_load_b128 v[44:47], v52, s[2:3] offset:224 -; GFX1250-NEXT: global_load_b128 v[48:51], v52, s[2:3] offset:240 +; GFX1250-NEXT: s_clause 0xf +; GFX1250-NEXT: global_load_b128 v[0:3], v64, s[2:3] offset:64 +; GFX1250-NEXT: global_load_b128 v[4:7], v64, s[2:3] offset:80 +; GFX1250-NEXT: global_load_b128 v[8:11], v64, s[2:3] +; GFX1250-NEXT: global_load_b128 v[12:15], v64, s[2:3] offset:16 +; GFX1250-NEXT: global_load_b128 v[16:19], v64, s[2:3] offset:128 +; GFX1250-NEXT: global_load_b128 v[20:23], v64, s[2:3] offset:144 +; GFX1250-NEXT: global_load_b128 v[24:27], v64, s[2:3] offset:32 +; GFX1250-NEXT: global_load_b128 v[28:31], v64, s[2:3] offset:48 +; GFX1250-NEXT: global_load_b128 v[32:35], v64, s[2:3] offset:160 +; GFX1250-NEXT: global_load_b128 v[36:39], v64, s[2:3] offset:176 +; GFX1250-NEXT: global_load_b128 v[40:43], v64, s[2:3] offset:192 +; GFX1250-NEXT: global_load_b128 v[44:47], v64, s[2:3] offset:208 +; GFX1250-NEXT: global_load_b128 v[48:51], v64, s[2:3] offset:96 +; GFX1250-NEXT: global_load_b128 v[52:55], v64, s[2:3] offset:112 +; GFX1250-NEXT: global_load_b128 v[56:59], v64, s[2:3] offset:240 +; GFX1250-NEXT: global_load_b128 v[60:63], v64, s[2:3] offset:224 ; GFX1250-NEXT: s_wait_loadcnt 0xb -; GFX1250-NEXT: v_lshlrev_b64_e32 v[2:3], v2, v[6:7] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[0:1], v0, v[4:5] -; GFX1250-NEXT: global_load_b128 v[4:7], v52, s[2:3] offset:208 +; GFX1250-NEXT: v_lshlrev_b64_e32 v[10:11], v18, v[10:11] ; GFX1250-NEXT: s_wait_loadcnt 0xa -; GFX1250-NEXT: v_lshlrev_b64_e32 v[10:11], v14, v[10:11] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[8:9], v12, v[8:9] -; GFX1250-NEXT: global_load_b128 v[12:15], v52, s[2:3] offset:176 -; GFX1250-NEXT: s_wait_loadcnt 0x9 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[18:19], v22, v[18:19] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[16:17], v20, v[16:17] -; GFX1250-NEXT: global_load_b128 v[20:23], v52, s[2:3] offset:160 +; GFX1250-NEXT: v_lshlrev_b64_e32 v[14:15], v22, v[14:15] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[12:13], v20, v[12:13] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[8:9], v16, v[8:9] +; GFX1250-NEXT: s_wait_loadcnt 0x7 +; GFX1250-NEXT: v_lshlrev_b64_e32 v[22:23], v34, v[26:27] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[20:21], v32, v[24:25] +; GFX1250-NEXT: s_wait_loadcnt 0x5 +; GFX1250-NEXT: v_lshlrev_b64_e32 v[2:3], v42, v[2:3] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[0:1], v40, v[0:1] ; GFX1250-NEXT: s_wait_loadcnt 0x4 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[26:27], v46, v[26:27] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[24:25], v44, v[24:25] -; GFX1250-NEXT: s_wait_loadcnt 0x3 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[30:31], v50, v[30:31] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[28:29], v48, v[28:29] -; GFX1250-NEXT: s_wait_loadcnt 0x2 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[6:7], v6, v[34:35] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[4:5], v4, v[32:33] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[6:7], v46, v[6:7] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[4:5], v44, v[4:5] ; GFX1250-NEXT: s_wait_loadcnt 0x1 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[14:15], v14, v[42:43] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[12:13], v12, v[40:41] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[54:55], v58, v[54:55] ; GFX1250-NEXT: s_wait_loadcnt 0x0 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[22:23], v22, v[38:39] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[20:21], v20, v[36:37] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[50:51], v62, v[50:51] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[48:49], v60, v[48:49] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[52:53], v56, v[52:53] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[18:19], v38, v[30:31] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[16:17], v36, v[28:29] ; GFX1250-NEXT: s_clause 0x7 -; GFX1250-NEXT: global_store_b128 v52, v[24:27], s[0:1] offset:96 -; GFX1250-NEXT: global_store_b128 v52, v[28:31], s[0:1] offset:112 -; GFX1250-NEXT: global_store_b128 v52, v[16:19], s[0:1] offset:64 -; GFX1250-NEXT: global_store_b128 v52, v[4:7], s[0:1] offset:80 -; GFX1250-NEXT: global_store_b128 v52, v[20:23], s[0:1] offset:32 -; GFX1250-NEXT: global_store_b128 v52, v[12:15], s[0:1] offset:48 -; GFX1250-NEXT: global_store_b128 v52, v[8:11], s[0:1] -; GFX1250-NEXT: global_store_b128 v52, v[0:3], s[0:1] offset:16 +; GFX1250-NEXT: global_store_b128 v64, v[48:51], s[0:1] offset:96 +; GFX1250-NEXT: global_store_b128 v64, v[52:55], s[0:1] offset:112 +; GFX1250-NEXT: global_store_b128 v64, v[0:3], s[0:1] offset:64 +; GFX1250-NEXT: global_store_b128 v64, v[4:7], s[0:1] offset:80 +; GFX1250-NEXT: global_store_b128 v64, v[20:23], s[0:1] offset:32 +; GFX1250-NEXT: global_store_b128 v64, v[16:19], s[0:1] offset:48 +; GFX1250-NEXT: global_store_b128 v64, v[8:11], s[0:1] +; GFX1250-NEXT: global_store_b128 v64, v[12:15], s[0:1] offset:16 +; GFX1250-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) ; GFX1250-NEXT: s_endpgm ; ; GFX1251-LABEL: v_shl_v16i64: @@ -409,60 +409,59 @@ define amdgpu_kernel void @v_shl_v16i64(ptr addrspace(1) %out, ptr addrspace(1) ; GFX1251-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv ; GFX1251-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1251-NEXT: v_lshlrev_b32_e32 v52, 7, v0 +; GFX1251-NEXT: v_lshlrev_b32_e32 v64, 7, v0 ; GFX1251-NEXT: s_wait_kmcnt 0x0 -; GFX1251-NEXT: s_clause 0xb -; GFX1251-NEXT: global_load_b128 v[0:3], v52, s[2:3] offset:144 -; GFX1251-NEXT: global_load_b128 v[4:7], v52, s[2:3] offset:16 -; GFX1251-NEXT: global_load_b128 v[8:11], v52, s[2:3] -; GFX1251-NEXT: global_load_b128 v[12:15], v52, s[2:3] offset:128 -; GFX1251-NEXT: global_load_b128 v[16:19], v52, s[2:3] offset:176 -; GFX1251-NEXT: global_load_b128 v[20:23], v52, s[2:3] offset:48 -; GFX1251-NEXT: global_load_b128 v[24:27], v52, s[2:3] offset:32 -; GFX1251-NEXT: global_load_b128 v[28:31], v52, s[2:3] offset:160 -; GFX1251-NEXT: global_load_b128 v[32:35], v52, s[2:3] offset:96 -; GFX1251-NEXT: global_load_b128 v[36:39], v52, s[2:3] offset:112 -; GFX1251-NEXT: global_load_b128 v[40:43], v52, s[2:3] offset:64 -; GFX1251-NEXT: global_load_b128 v[44:47], v52, s[2:3] offset:80 -; GFX1251-NEXT: s_wait_loadcnt 0xa -; GFX1251-NEXT: v_lshlrev_b64_e32 v[2:3], v2, v[6:7] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[0:1], v0, v[4:5] -; GFX1251-NEXT: s_clause 0x1 -; GFX1251-NEXT: global_load_b128 v[4:7], v52, s[2:3] offset:224 -; GFX1251-NEXT: global_load_b128 v[48:51], v52, s[2:3] offset:240 +; GFX1251-NEXT: s_clause 0xf +; GFX1251-NEXT: global_load_b128 v[0:3], v64, s[2:3] offset:64 +; GFX1251-NEXT: global_load_b128 v[4:7], v64, s[2:3] offset:80 +; GFX1251-NEXT: global_load_b128 v[8:11], v64, s[2:3] +; GFX1251-NEXT: global_load_b128 v[12:15], v64, s[2:3] offset:16 +; GFX1251-NEXT: global_load_b128 v[16:19], v64, s[2:3] offset:128 +; GFX1251-NEXT: global_load_b128 v[20:23], v64, s[2:3] offset:144 +; GFX1251-NEXT: global_load_b128 v[24:27], v64, s[2:3] offset:32 +; GFX1251-NEXT: global_load_b128 v[28:31], v64, s[2:3] offset:48 +; GFX1251-NEXT: global_load_b128 v[32:35], v64, s[2:3] offset:160 +; GFX1251-NEXT: global_load_b128 v[36:39], v64, s[2:3] offset:176 +; GFX1251-NEXT: global_load_b128 v[40:43], v64, s[2:3] offset:192 +; GFX1251-NEXT: global_load_b128 v[44:47], v64, s[2:3] offset:208 +; GFX1251-NEXT: global_load_b128 v[48:51], v64, s[2:3] offset:96 +; GFX1251-NEXT: global_load_b128 v[52:55], v64, s[2:3] offset:112 +; GFX1251-NEXT: global_load_b128 v[56:59], v64, s[2:3] offset:240 +; GFX1251-NEXT: global_load_b128 v[60:63], v64, s[2:3] offset:224 +; GFX1251-NEXT: s_wait_loadcnt 0xb +; GFX1251-NEXT: v_lshlrev_b64_e32 v[8:9], v16, v[8:9] ; GFX1251-NEXT: s_wait_loadcnt 0xa -; GFX1251-NEXT: v_lshlrev_b64_e32 v[10:11], v14, v[10:11] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[8:9], v12, v[8:9] -; GFX1251-NEXT: s_wait_loadcnt 0x8 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[14:15], v18, v[22:23] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[12:13], v16, v[20:21] -; GFX1251-NEXT: s_clause 0x1 -; GFX1251-NEXT: global_load_b128 v[16:19], v52, s[2:3] offset:208 -; GFX1251-NEXT: global_load_b128 v[20:23], v52, s[2:3] offset:192 -; GFX1251-NEXT: s_wait_loadcnt 0x8 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[26:27], v30, v[26:27] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[24:25], v28, v[24:25] -; GFX1251-NEXT: s_wait_loadcnt 0x3 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[6:7], v6, v[34:35] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[4:5], v4, v[32:33] -; GFX1251-NEXT: s_wait_loadcnt 0x2 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[38:39], v50, v[38:39] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[36:37], v48, v[36:37] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[14:15], v22, v[14:15] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[12:13], v20, v[12:13] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[10:11], v18, v[10:11] +; GFX1251-NEXT: s_wait_loadcnt 0x7 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[22:23], v34, v[26:27] +; GFX1251-NEXT: s_wait_loadcnt 0x6 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[16:17], v36, v[28:29] +; GFX1251-NEXT: s_wait_loadcnt 0x5 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[2:3], v42, v[2:3] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[0:1], v40, v[0:1] +; GFX1251-NEXT: s_wait_loadcnt 0x4 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[6:7], v46, v[6:7] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[4:5], v44, v[4:5] ; GFX1251-NEXT: s_wait_loadcnt 0x1 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[18:19], v18, v[46:47] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[28:29], v58, v[54:55] ; GFX1251-NEXT: s_wait_loadcnt 0x0 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[22:23], v22, v[42:43] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[20:21], v20, v[40:41] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[16:17], v16, v[44:45] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[36:37], v62, v[50:51] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[34:35], v60, v[48:49] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[26:27], v56, v[52:53] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[20:21], v32, v[24:25] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[18:19], v38, v[30:31] ; GFX1251-NEXT: s_clause 0x7 -; GFX1251-NEXT: global_store_b128 v52, v[4:7], s[0:1] offset:96 -; GFX1251-NEXT: global_store_b128 v52, v[36:39], s[0:1] offset:112 -; GFX1251-NEXT: global_store_b128 v52, v[20:23], s[0:1] offset:64 -; GFX1251-NEXT: global_store_b128 v52, v[16:19], s[0:1] offset:80 -; GFX1251-NEXT: global_store_b128 v52, v[24:27], s[0:1] offset:32 -; GFX1251-NEXT: global_store_b128 v52, v[12:15], s[0:1] offset:48 -; GFX1251-NEXT: global_store_b128 v52, v[8:11], s[0:1] -; GFX1251-NEXT: global_store_b128 v52, v[0:3], s[0:1] offset:16 +; GFX1251-NEXT: global_store_b128 v64, v[34:37], s[0:1] offset:96 +; GFX1251-NEXT: global_store_b128 v64, v[26:29], s[0:1] offset:112 +; GFX1251-NEXT: global_store_b128 v64, v[0:3], s[0:1] offset:64 +; GFX1251-NEXT: global_store_b128 v64, v[4:7], s[0:1] offset:80 +; GFX1251-NEXT: global_store_b128 v64, v[20:23], s[0:1] offset:32 +; GFX1251-NEXT: global_store_b128 v64, v[16:19], s[0:1] offset:48 +; GFX1251-NEXT: global_store_b128 v64, v[8:11], s[0:1] +; GFX1251-NEXT: global_store_b128 v64, v[12:15], s[0:1] offset:16 +; GFX1251-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) ; GFX1251-NEXT: s_endpgm %tid = call i32 @llvm.amdgcn.workitem.id.x() %tid.ext = sext i32 %tid to i64 @@ -483,107 +482,107 @@ define amdgpu_kernel void @v_shl_v32i64(ptr addrspace(1) %out, ptr addrspace(1) ; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv ; GFX1250-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1250-NEXT: v_lshlrev_b32_e32 v24, 8, v0 +; GFX1250-NEXT: v_lshlrev_b32_e32 v48, 8, v0 ; GFX1250-NEXT: s_wait_kmcnt 0x0 -; GFX1250-NEXT: s_clause 0x13 -; GFX1250-NEXT: global_load_b128 v[0:3], v24, s[2:3] offset:400 -; GFX1250-NEXT: global_load_b128 v[4:7], v24, s[2:3] offset:144 -; GFX1250-NEXT: global_load_b128 v[8:11], v24, s[2:3] offset:128 -; GFX1250-NEXT: global_load_b128 v[12:15], v24, s[2:3] offset:384 -; GFX1250-NEXT: global_load_b128 v[16:19], v24, s[2:3] offset:432 -; GFX1250-NEXT: global_load_b128 v[20:23], v24, s[2:3] offset:176 -; GFX1250-NEXT: global_load_b128 v[26:29], v24, s[2:3] offset:160 -; GFX1250-NEXT: global_load_b128 v[30:33], v24, s[2:3] offset:416 -; GFX1250-NEXT: global_load_b128 v[34:37], v24, s[2:3] offset:464 -; GFX1250-NEXT: global_load_b128 v[38:41], v24, s[2:3] offset:208 -; GFX1250-NEXT: global_load_b128 v[42:45], v24, s[2:3] offset:192 -; GFX1250-NEXT: global_load_b128 v[46:49], v24, s[2:3] offset:448 -; GFX1250-NEXT: global_load_b128 v[50:53], v24, s[2:3] offset:496 -; GFX1250-NEXT: global_load_b128 v[54:57], v24, s[2:3] offset:240 -; GFX1250-NEXT: global_load_b128 v[58:61], v24, s[2:3] offset:224 -; GFX1250-NEXT: global_load_b128 v[62:65], v24, s[2:3] offset:480 -; GFX1250-NEXT: global_load_b128 v[66:69], v24, s[2:3] offset:16 -; GFX1250-NEXT: global_load_b128 v[70:73], v24, s[2:3] -; GFX1250-NEXT: global_load_b128 v[74:77], v24, s[2:3] offset:272 -; GFX1250-NEXT: global_load_b128 v[78:81], v24, s[2:3] offset:256 +; GFX1250-NEXT: s_clause 0x19 +; GFX1250-NEXT: global_load_b128 v[4:7], v48, s[2:3] offset:368 +; GFX1250-NEXT: global_load_b128 v[8:11], v48, s[2:3] offset:112 +; GFX1250-NEXT: global_load_b128 v[0:3], v48, s[2:3] offset:96 +; GFX1250-NEXT: global_load_b128 v[12:15], v48, s[2:3] offset:352 +; GFX1250-NEXT: global_load_b128 v[32:35], v48, s[2:3] offset:400 +; GFX1250-NEXT: global_load_b128 v[40:43], v48, s[2:3] offset:144 +; GFX1250-NEXT: global_load_b128 v[36:39], v48, s[2:3] offset:128 +; GFX1250-NEXT: global_load_b128 v[44:47], v48, s[2:3] offset:384 +; GFX1250-NEXT: global_load_b128 v[20:23], v48, s[2:3] offset:432 +; GFX1250-NEXT: global_load_b128 v[24:27], v48, s[2:3] offset:176 +; GFX1250-NEXT: global_load_b128 v[16:19], v48, s[2:3] offset:160 +; GFX1250-NEXT: global_load_b128 v[28:31], v48, s[2:3] offset:416 +; GFX1250-NEXT: global_load_b128 v[50:53], v48, s[2:3] offset:464 +; GFX1250-NEXT: global_load_b128 v[54:57], v48, s[2:3] offset:208 +; GFX1250-NEXT: global_load_b128 v[58:61], v48, s[2:3] offset:192 +; GFX1250-NEXT: global_load_b128 v[62:65], v48, s[2:3] offset:448 +; GFX1250-NEXT: global_load_b128 v[66:69], v48, s[2:3] offset:240 +; GFX1250-NEXT: global_load_b128 v[70:73], v48, s[2:3] offset:496 +; GFX1250-NEXT: global_load_b128 v[74:77], v48, s[2:3] offset:480 +; GFX1250-NEXT: global_load_b128 v[78:81], v48, s[2:3] offset:224 +; GFX1250-NEXT: global_load_b128 v[82:85], v48, s[2:3] offset:16 +; GFX1250-NEXT: global_load_b128 v[86:89], v48, s[2:3] offset:272 +; GFX1250-NEXT: global_load_b128 v[90:93], v48, s[2:3] offset:256 +; GFX1250-NEXT: global_load_b128 v[94:97], v48, s[2:3] +; GFX1250-NEXT: global_load_b128 v[98:101], v48, s[2:3] offset:288 +; GFX1250-NEXT: global_load_b128 v[102:105], v48, s[2:3] offset:304 +; GFX1250-NEXT: s_wait_loadcnt 0x18 +; GFX1250-NEXT: v_lshlrev_b64_e32 v[6:7], v6, v[10:11] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[4:5], v4, v[8:9] +; GFX1250-NEXT: s_wait_loadcnt 0x16 +; GFX1250-NEXT: v_lshlrev_b64_e32 v[2:3], v14, v[2:3] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[0:1], v12, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt 0x14 +; GFX1250-NEXT: v_lshlrev_b64_e32 v[10:11], v34, v[42:43] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[8:9], v32, v[40:41] ; GFX1250-NEXT: s_wait_loadcnt 0x12 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[2:3], v2, v[6:7] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[0:1], v0, v[4:5] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[14:15], v46, v[38:39] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[12:13], v44, v[36:37] ; GFX1250-NEXT: s_wait_loadcnt 0x10 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[6:7], v14, v[10:11] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[4:5], v12, v[8:9] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[22:23], v22, v[26:27] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[20:21], v20, v[24:25] ; GFX1250-NEXT: s_wait_loadcnt 0xe -; GFX1250-NEXT: v_lshlrev_b64_e32 v[10:11], v18, v[22:23] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[8:9], v16, v[20:21] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[18:19], v30, v[18:19] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[16:17], v28, v[16:17] ; GFX1250-NEXT: s_wait_loadcnt 0xc -; GFX1250-NEXT: v_lshlrev_b64_e32 v[14:15], v32, v[28:29] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[12:13], v30, v[26:27] -; GFX1250-NEXT: global_load_b128 v[26:29], v24, s[2:3] offset:32 -; GFX1250-NEXT: s_wait_loadcnt 0xb -; GFX1250-NEXT: v_lshlrev_b64_e32 v[18:19], v36, v[40:41] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[16:17], v34, v[38:39] -; GFX1250-NEXT: global_load_b128 v[30:33], v24, s[2:3] offset:288 -; GFX1250-NEXT: s_wait_loadcnt 0xa -; GFX1250-NEXT: v_lshlrev_b64_e32 v[22:23], v48, v[44:45] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[20:21], v46, v[42:43] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[26:27], v52, v[56:57] ; GFX1250-NEXT: s_clause 0x1 -; GFX1250-NEXT: global_load_b128 v[34:37], v24, s[2:3] offset:320 -; GFX1250-NEXT: global_load_b128 v[42:45], v24, s[2:3] offset:64 +; GFX1250-NEXT: global_load_b128 v[28:31], v48, s[2:3] offset:336 +; GFX1250-NEXT: global_load_b128 v[40:43], v48, s[2:3] offset:320 +; GFX1250-NEXT: v_lshlrev_b64_e32 v[24:25], v50, v[54:55] +; GFX1250-NEXT: s_wait_loadcnt 0xc +; GFX1250-NEXT: v_lshlrev_b64_e32 v[46:47], v64, v[60:61] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[44:45], v62, v[58:59] ; GFX1250-NEXT: s_wait_loadcnt 0xa -; GFX1250-NEXT: v_lshlrev_b64_e32 v[40:41], v52, v[56:57] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[38:39], v50, v[54:55] -; GFX1250-NEXT: s_wait_loadcnt 0x8 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[48:49], v64, v[60:61] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[46:47], v62, v[58:59] -; GFX1250-NEXT: global_load_b128 v[50:53], v24, s[2:3] offset:80 -; GFX1250-NEXT: s_wait_loadcnt 0x6 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[56:57], v76, v[68:69] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[54:55], v74, v[66:67] -; GFX1250-NEXT: global_load_b128 v[58:61], v24, s[2:3] offset:48 -; GFX1250-NEXT: s_wait_loadcnt 0x6 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[64:65], v80, v[72:73] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[62:63], v78, v[70:71] -; GFX1250-NEXT: global_load_b128 v[66:69], v24, s[2:3] offset:304 -; GFX1250-NEXT: s_wait_loadcnt 0x5 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[28:29], v32, v[28:29] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[26:27], v30, v[26:27] -; GFX1250-NEXT: global_load_b128 v[30:33], v24, s[2:3] offset:336 -; GFX1250-NEXT: s_wait_loadcnt 0x4 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[36:37], v36, v[44:45] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[34:35], v34, v[42:43] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[52:53], v72, v[68:69] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[50:51], v70, v[66:67] ; GFX1250-NEXT: s_clause 0x3 -; GFX1250-NEXT: global_load_b128 v[42:45], v24, s[2:3] offset:352 -; GFX1250-NEXT: global_load_b128 v[70:73], v24, s[2:3] offset:96 -; GFX1250-NEXT: global_load_b128 v[74:77], v24, s[2:3] offset:112 -; GFX1250-NEXT: global_load_b128 v[78:81], v24, s[2:3] offset:368 -; GFX1250-NEXT: s_wait_loadcnt 0x4 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[32:33], v32, v[52:53] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[30:31], v30, v[50:51] +; GFX1250-NEXT: global_load_b128 v[62:65], v48, s[2:3] offset:80 +; GFX1250-NEXT: global_load_b128 v[66:69], v48, s[2:3] offset:64 +; GFX1250-NEXT: global_load_b128 v[32:35], v48, s[2:3] offset:48 +; GFX1250-NEXT: global_load_b128 v[36:39], v48, s[2:3] offset:32 +; GFX1250-NEXT: s_wait_loadcnt 0xc +; GFX1250-NEXT: v_lshlrev_b64_e32 v[56:57], v76, v[80:81] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[54:55], v74, v[78:79] +; GFX1250-NEXT: s_wait_loadcnt 0xa +; GFX1250-NEXT: v_lshlrev_b64_e32 v[60:61], v88, v[84:85] +; GFX1250-NEXT: s_wait_loadcnt 0x8 +; GFX1250-NEXT: v_lshlrev_b64_e32 v[70:71], v92, v[96:97] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[58:59], v86, v[82:83] +; GFX1250-NEXT: s_wait_loadcnt 0x3 +; GFX1250-NEXT: v_lshlrev_b64_e32 v[30:31], v30, v[64:65] ; GFX1250-NEXT: s_wait_loadcnt 0x2 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[44:45], v44, v[72:73] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[42:43], v42, v[70:71] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[42:43], v42, v[68:69] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[40:41], v40, v[66:67] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[28:29], v28, v[62:63] ; GFX1250-NEXT: s_wait_loadcnt 0x0 -; GFX1250-NEXT: v_lshlrev_b64_e32 v[72:73], v80, v[76:77] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[70:71], v78, v[74:75] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[52:53], v68, v[60:61] -; GFX1250-NEXT: v_lshlrev_b64_e32 v[50:51], v66, v[58:59] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[38:39], v100, v[38:39] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[36:37], v98, v[36:37] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[34:35], v104, v[34:35] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[32:33], v102, v[32:33] +; GFX1250-NEXT: v_lshlrev_b64_e32 v[68:69], v90, v[94:95] ; GFX1250-NEXT: s_clause 0xf -; GFX1250-NEXT: global_store_b128 v24, v[42:45], s[0:1] offset:96 -; GFX1250-NEXT: global_store_b128 v24, v[70:73], s[0:1] offset:112 -; GFX1250-NEXT: global_store_b128 v24, v[34:37], s[0:1] offset:64 -; GFX1250-NEXT: global_store_b128 v24, v[30:33], s[0:1] offset:80 -; GFX1250-NEXT: global_store_b128 v24, v[26:29], s[0:1] offset:32 -; GFX1250-NEXT: global_store_b128 v24, v[50:53], s[0:1] offset:48 -; GFX1250-NEXT: global_store_b128 v24, v[62:65], s[0:1] -; GFX1250-NEXT: global_store_b128 v24, v[54:57], s[0:1] offset:16 -; GFX1250-NEXT: global_store_b128 v24, v[46:49], s[0:1] offset:224 -; GFX1250-NEXT: global_store_b128 v24, v[38:41], s[0:1] offset:240 -; GFX1250-NEXT: global_store_b128 v24, v[20:23], s[0:1] offset:192 -; GFX1250-NEXT: global_store_b128 v24, v[16:19], s[0:1] offset:208 -; GFX1250-NEXT: global_store_b128 v24, v[12:15], s[0:1] offset:160 -; GFX1250-NEXT: global_store_b128 v24, v[8:11], s[0:1] offset:176 -; GFX1250-NEXT: global_store_b128 v24, v[4:7], s[0:1] offset:128 -; GFX1250-NEXT: global_store_b128 v24, v[0:3], s[0:1] offset:144 +; GFX1250-NEXT: global_store_b128 v48, v[0:3], s[0:1] offset:96 +; GFX1250-NEXT: global_store_b128 v48, v[4:7], s[0:1] offset:112 +; GFX1250-NEXT: global_store_b128 v48, v[40:43], s[0:1] offset:64 +; GFX1250-NEXT: global_store_b128 v48, v[28:31], s[0:1] offset:80 +; GFX1250-NEXT: global_store_b128 v48, v[36:39], s[0:1] offset:32 +; GFX1250-NEXT: global_store_b128 v48, v[32:35], s[0:1] offset:48 +; GFX1250-NEXT: global_store_b128 v48, v[68:71], s[0:1] +; GFX1250-NEXT: global_store_b128 v48, v[58:61], s[0:1] offset:16 +; GFX1250-NEXT: global_store_b128 v48, v[54:57], s[0:1] offset:224 +; GFX1250-NEXT: global_store_b128 v48, v[50:53], s[0:1] offset:240 +; GFX1250-NEXT: global_store_b128 v48, v[44:47], s[0:1] offset:192 +; GFX1250-NEXT: global_store_b128 v48, v[24:27], s[0:1] offset:208 +; GFX1250-NEXT: global_store_b128 v48, v[16:19], s[0:1] offset:160 +; GFX1250-NEXT: global_store_b128 v48, v[20:23], s[0:1] offset:176 +; GFX1250-NEXT: global_store_b128 v48, v[12:15], s[0:1] offset:128 +; GFX1250-NEXT: global_store_b128 v48, v[8:11], s[0:1] offset:144 ; GFX1250-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) ; GFX1250-NEXT: s_endpgm ; @@ -593,107 +592,108 @@ define amdgpu_kernel void @v_shl_v32i64(ptr addrspace(1) %out, ptr addrspace(1) ; GFX1251-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv ; GFX1251-NEXT: v_and_b32_e32 v0, 0x3ff, v0 ; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX1251-NEXT: v_lshlrev_b32_e32 v24, 8, v0 +; GFX1251-NEXT: v_lshlrev_b32_e32 v48, 8, v0 ; GFX1251-NEXT: s_wait_kmcnt 0x0 -; GFX1251-NEXT: s_clause 0x13 -; GFX1251-NEXT: global_load_b128 v[0:3], v24, s[2:3] offset:400 -; GFX1251-NEXT: global_load_b128 v[4:7], v24, s[2:3] offset:144 -; GFX1251-NEXT: global_load_b128 v[8:11], v24, s[2:3] offset:128 -; GFX1251-NEXT: global_load_b128 v[12:15], v24, s[2:3] offset:384 -; GFX1251-NEXT: global_load_b128 v[16:19], v24, s[2:3] offset:432 -; GFX1251-NEXT: global_load_b128 v[20:23], v24, s[2:3] offset:176 -; GFX1251-NEXT: global_load_b128 v[26:29], v24, s[2:3] offset:160 -; GFX1251-NEXT: global_load_b128 v[30:33], v24, s[2:3] offset:416 -; GFX1251-NEXT: global_load_b128 v[34:37], v24, s[2:3] offset:464 -; GFX1251-NEXT: global_load_b128 v[38:41], v24, s[2:3] offset:208 -; GFX1251-NEXT: global_load_b128 v[42:45], v24, s[2:3] offset:192 -; GFX1251-NEXT: global_load_b128 v[46:49], v24, s[2:3] offset:448 -; GFX1251-NEXT: global_load_b128 v[50:53], v24, s[2:3] offset:496 -; GFX1251-NEXT: global_load_b128 v[54:57], v24, s[2:3] offset:240 -; GFX1251-NEXT: global_load_b128 v[58:61], v24, s[2:3] offset:224 -; GFX1251-NEXT: global_load_b128 v[62:65], v24, s[2:3] offset:480 -; GFX1251-NEXT: global_load_b128 v[66:69], v24, s[2:3] offset:16 -; GFX1251-NEXT: global_load_b128 v[70:73], v24, s[2:3] -; GFX1251-NEXT: global_load_b128 v[74:77], v24, s[2:3] offset:272 -; GFX1251-NEXT: global_load_b128 v[78:81], v24, s[2:3] offset:256 +; GFX1251-NEXT: s_clause 0x19 +; GFX1251-NEXT: global_load_b128 v[0:3], v48, s[2:3] offset:368 +; GFX1251-NEXT: global_load_b128 v[12:15], v48, s[2:3] offset:112 +; GFX1251-NEXT: global_load_b128 v[4:7], v48, s[2:3] offset:96 +; GFX1251-NEXT: global_load_b128 v[8:11], v48, s[2:3] offset:352 +; GFX1251-NEXT: global_load_b128 v[32:35], v48, s[2:3] offset:400 +; GFX1251-NEXT: global_load_b128 v[44:47], v48, s[2:3] offset:144 +; GFX1251-NEXT: global_load_b128 v[36:39], v48, s[2:3] offset:128 +; GFX1251-NEXT: global_load_b128 v[40:43], v48, s[2:3] offset:384 +; GFX1251-NEXT: global_load_b128 v[16:19], v48, s[2:3] offset:432 +; GFX1251-NEXT: global_load_b128 v[28:31], v48, s[2:3] offset:176 +; GFX1251-NEXT: global_load_b128 v[20:23], v48, s[2:3] offset:160 +; GFX1251-NEXT: global_load_b128 v[24:27], v48, s[2:3] offset:416 +; GFX1251-NEXT: global_load_b128 v[50:53], v48, s[2:3] offset:464 +; GFX1251-NEXT: global_load_b128 v[54:57], v48, s[2:3] offset:208 +; GFX1251-NEXT: global_load_b128 v[58:61], v48, s[2:3] offset:192 +; GFX1251-NEXT: global_load_b128 v[62:65], v48, s[2:3] offset:448 +; GFX1251-NEXT: global_load_b128 v[66:69], v48, s[2:3] offset:240 +; GFX1251-NEXT: global_load_b128 v[70:73], v48, s[2:3] offset:496 +; GFX1251-NEXT: global_load_b128 v[74:77], v48, s[2:3] offset:480 +; GFX1251-NEXT: global_load_b128 v[78:81], v48, s[2:3] offset:224 +; GFX1251-NEXT: global_load_b128 v[82:85], v48, s[2:3] offset:272 +; GFX1251-NEXT: global_load_b128 v[86:89], v48, s[2:3] offset:16 +; GFX1251-NEXT: global_load_b128 v[90:93], v48, s[2:3] offset:288 +; GFX1251-NEXT: global_load_b128 v[94:97], v48, s[2:3] offset:304 +; GFX1251-NEXT: global_load_b128 v[98:101], v48, s[2:3] offset:256 +; GFX1251-NEXT: global_load_b128 v[102:105], v48, s[2:3] +; GFX1251-NEXT: s_wait_loadcnt 0x18 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[2:3], v2, v[14:15] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[0:1], v0, v[12:13] +; GFX1251-NEXT: s_wait_loadcnt 0x16 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[4:5], v8, v[4:5] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[6:7], v10, v[6:7] +; GFX1251-NEXT: s_wait_loadcnt 0x14 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[8:9], v32, v[44:45] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[10:11], v34, v[46:47] ; GFX1251-NEXT: s_wait_loadcnt 0x12 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[2:3], v2, v[6:7] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[0:1], v0, v[4:5] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[14:15], v42, v[38:39] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[12:13], v40, v[36:37] +; GFX1251-NEXT: s_clause 0x1 +; GFX1251-NEXT: global_load_b128 v[38:41], v48, s[2:3] offset:336 +; GFX1251-NEXT: global_load_b128 v[42:45], v48, s[2:3] offset:320 +; GFX1251-NEXT: s_wait_loadcnt 0x12 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[18:19], v18, v[30:31] ; GFX1251-NEXT: s_wait_loadcnt 0x10 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[6:7], v14, v[10:11] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[4:5], v12, v[8:9] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[22:23], v26, v[22:23] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[20:21], v24, v[20:21] ; GFX1251-NEXT: s_wait_loadcnt 0xe -; GFX1251-NEXT: v_lshlrev_b64_e32 v[10:11], v18, v[22:23] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[8:9], v16, v[20:21] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[26:27], v52, v[56:57] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[24:25], v50, v[54:55] +; GFX1251-NEXT: s_clause 0x1 +; GFX1251-NEXT: global_load_b128 v[30:33], v48, s[2:3] offset:48 +; GFX1251-NEXT: global_load_b128 v[34:37], v48, s[2:3] offset:32 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[16:17], v16, v[28:29] ; GFX1251-NEXT: s_wait_loadcnt 0xc -; GFX1251-NEXT: v_lshlrev_b64_e32 v[14:15], v32, v[28:29] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[12:13], v30, v[26:27] -; GFX1251-NEXT: global_load_b128 v[26:29], v24, s[2:3] offset:48 -; GFX1251-NEXT: s_wait_loadcnt 0xb -; GFX1251-NEXT: v_lshlrev_b64_e32 v[18:19], v36, v[40:41] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[16:17], v34, v[38:39] -; GFX1251-NEXT: global_load_b128 v[30:33], v24, s[2:3] offset:304 -; GFX1251-NEXT: s_wait_loadcnt 0xa -; GFX1251-NEXT: v_lshlrev_b64_e32 v[22:23], v48, v[44:45] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[20:21], v46, v[42:43] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[56:57], v72, v[68:69] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[54:55], v70, v[66:67] ; GFX1251-NEXT: s_clause 0x1 -; GFX1251-NEXT: global_load_b128 v[34:37], v24, s[2:3] offset:80 -; GFX1251-NEXT: global_load_b128 v[42:45], v24, s[2:3] offset:336 +; GFX1251-NEXT: global_load_b128 v[66:69], v48, s[2:3] offset:80 +; GFX1251-NEXT: global_load_b128 v[70:73], v48, s[2:3] offset:64 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[52:53], v64, v[60:61] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[50:51], v62, v[58:59] +; GFX1251-NEXT: s_wait_loadcnt 0xc +; GFX1251-NEXT: v_lshlrev_b64_e32 v[60:61], v76, v[80:81] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[58:59], v74, v[78:79] ; GFX1251-NEXT: s_wait_loadcnt 0xa -; GFX1251-NEXT: v_lshlrev_b64_e32 v[40:41], v52, v[56:57] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[38:39], v50, v[54:55] -; GFX1251-NEXT: s_wait_loadcnt 0x8 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[48:49], v64, v[60:61] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[46:47], v62, v[58:59] -; GFX1251-NEXT: global_load_b128 v[50:53], v24, s[2:3] offset:64 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[64:65], v84, v[88:89] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[62:63], v82, v[86:87] ; GFX1251-NEXT: s_wait_loadcnt 0x6 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[56:57], v76, v[68:69] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[54:55], v74, v[66:67] -; GFX1251-NEXT: global_load_b128 v[58:61], v24, s[2:3] offset:32 -; GFX1251-NEXT: s_wait_loadcnt 0x6 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[64:65], v80, v[72:73] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[62:63], v78, v[70:71] -; GFX1251-NEXT: global_load_b128 v[66:69], v24, s[2:3] offset:288 -; GFX1251-NEXT: s_wait_loadcnt 0x5 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[28:29], v32, v[28:29] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[26:27], v30, v[26:27] -; GFX1251-NEXT: global_load_b128 v[30:33], v24, s[2:3] offset:320 -; GFX1251-NEXT: s_wait_loadcnt 0x4 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[36:37], v44, v[36:37] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[34:35], v42, v[34:35] -; GFX1251-NEXT: s_clause 0x3 -; GFX1251-NEXT: global_load_b128 v[42:45], v24, s[2:3] offset:368 -; GFX1251-NEXT: global_load_b128 v[70:73], v24, s[2:3] offset:112 -; GFX1251-NEXT: global_load_b128 v[74:77], v24, s[2:3] offset:96 -; GFX1251-NEXT: global_load_b128 v[78:81], v24, s[2:3] offset:352 -; GFX1251-NEXT: s_wait_loadcnt 0x4 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[32:33], v32, v[52:53] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[30:31], v30, v[50:51] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[46:47], v100, v[104:105] +; GFX1251-NEXT: s_wait_loadcnt 0x3 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[32:33], v96, v[32:33] ; GFX1251-NEXT: s_wait_loadcnt 0x2 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[44:45], v44, v[72:73] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[42:43], v42, v[70:71] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[36:37], v92, v[36:37] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[34:35], v90, v[34:35] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[30:31], v94, v[30:31] +; GFX1251-NEXT: s_wait_loadcnt 0x1 +; GFX1251-NEXT: v_lshlrev_b64_e32 v[40:41], v40, v[68:69] ; GFX1251-NEXT: s_wait_loadcnt 0x0 -; GFX1251-NEXT: v_lshlrev_b64_e32 v[72:73], v80, v[76:77] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[70:71], v78, v[74:75] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[52:53], v68, v[60:61] -; GFX1251-NEXT: v_lshlrev_b64_e32 v[50:51], v66, v[58:59] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[72:73], v44, v[72:73] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[70:71], v42, v[70:71] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[38:39], v38, v[66:67] +; GFX1251-NEXT: v_lshlrev_b64_e32 v[44:45], v98, v[102:103] ; GFX1251-NEXT: s_clause 0xf -; GFX1251-NEXT: global_store_b128 v24, v[70:73], s[0:1] offset:96 -; GFX1251-NEXT: global_store_b128 v24, v[42:45], s[0:1] offset:112 -; GFX1251-NEXT: global_store_b128 v24, v[30:33], s[0:1] offset:64 -; GFX1251-NEXT: global_store_b128 v24, v[34:37], s[0:1] offset:80 -; GFX1251-NEXT: global_store_b128 v24, v[50:53], s[0:1] offset:32 -; GFX1251-NEXT: global_store_b128 v24, v[26:29], s[0:1] offset:48 -; GFX1251-NEXT: global_store_b128 v24, v[62:65], s[0:1] -; GFX1251-NEXT: global_store_b128 v24, v[54:57], s[0:1] offset:16 -; GFX1251-NEXT: global_store_b128 v24, v[46:49], s[0:1] offset:224 -; GFX1251-NEXT: global_store_b128 v24, v[38:41], s[0:1] offset:240 -; GFX1251-NEXT: global_store_b128 v24, v[20:23], s[0:1] offset:192 -; GFX1251-NEXT: global_store_b128 v24, v[16:19], s[0:1] offset:208 -; GFX1251-NEXT: global_store_b128 v24, v[12:15], s[0:1] offset:160 -; GFX1251-NEXT: global_store_b128 v24, v[8:11], s[0:1] offset:176 -; GFX1251-NEXT: global_store_b128 v24, v[4:7], s[0:1] offset:128 -; GFX1251-NEXT: global_store_b128 v24, v[0:3], s[0:1] offset:144 +; GFX1251-NEXT: global_store_b128 v48, v[4:7], s[0:1] offset:96 +; GFX1251-NEXT: global_store_b128 v48, v[0:3], s[0:1] offset:112 +; GFX1251-NEXT: global_store_b128 v48, v[70:73], s[0:1] offset:64 +; GFX1251-NEXT: global_store_b128 v48, v[38:41], s[0:1] offset:80 +; GFX1251-NEXT: global_store_b128 v48, v[34:37], s[0:1] offset:32 +; GFX1251-NEXT: global_store_b128 v48, v[30:33], s[0:1] offset:48 +; GFX1251-NEXT: global_store_b128 v48, v[44:47], s[0:1] +; GFX1251-NEXT: global_store_b128 v48, v[62:65], s[0:1] offset:16 +; GFX1251-NEXT: global_store_b128 v48, v[58:61], s[0:1] offset:224 +; GFX1251-NEXT: global_store_b128 v48, v[54:57], s[0:1] offset:240 +; GFX1251-NEXT: global_store_b128 v48, v[50:53], s[0:1] offset:192 +; GFX1251-NEXT: global_store_b128 v48, v[24:27], s[0:1] offset:208 +; GFX1251-NEXT: global_store_b128 v48, v[20:23], s[0:1] offset:160 +; GFX1251-NEXT: global_store_b128 v48, v[16:19], s[0:1] offset:176 +; GFX1251-NEXT: global_store_b128 v48, v[12:15], s[0:1] offset:128 +; GFX1251-NEXT: global_store_b128 v48, v[8:11], s[0:1] offset:144 ; GFX1251-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) ; GFX1251-NEXT: s_endpgm %tid = call i32 @llvm.amdgcn.workitem.id.x() diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll index a747af428c1b5..f82a46dcdd6cf 100644 --- a/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll +++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll @@ -622,14 +622,14 @@ define void @v_shuffle_v2i64_v8i64__15_0(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_0: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v32, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[16:31] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v32, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -671,14 +671,14 @@ define void @v_shuffle_v2i64_v8i64__15_1(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_1: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v30, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v30, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -721,14 +721,14 @@ define void @v_shuffle_v2i64_v8i64__15_2(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_2: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v28, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v28, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -771,14 +771,14 @@ define void @v_shuffle_v2i64_v8i64__15_3(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v26, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v26, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -821,14 +821,14 @@ define void @v_shuffle_v2i64_v8i64__15_4(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_4: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v24, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v24, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -871,14 +871,14 @@ define void @v_shuffle_v2i64_v8i64__15_5(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_5: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v22, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v22, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -921,14 +921,14 @@ define void @v_shuffle_v2i64_v8i64__15_6(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_6: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v20, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v20, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -971,14 +971,14 @@ define void @v_shuffle_v2i64_v8i64__15_7(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_7: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1021,13 +1021,13 @@ define void @v_shuffle_v2i64_v8i64__15_8(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_8: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v0 ; GFX900-NEXT: v_mov_b32_e32 v17, v1 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1068,13 +1068,13 @@ define void @v_shuffle_v2i64_v8i64__15_9(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_9: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v2 ; GFX900-NEXT: v_mov_b32_e32 v17, v3 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1115,13 +1115,13 @@ define void @v_shuffle_v2i64_v8i64__15_10(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_10: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v4 ; GFX900-NEXT: v_mov_b32_e32 v17, v5 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1162,13 +1162,13 @@ define void @v_shuffle_v2i64_v8i64__15_11(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_11: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v6 ; GFX900-NEXT: v_mov_b32_e32 v17, v7 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1209,13 +1209,13 @@ define void @v_shuffle_v2i64_v8i64__15_12(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_12: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v8 ; GFX900-NEXT: v_mov_b32_e32 v17, v9 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1256,13 +1256,13 @@ define void @v_shuffle_v2i64_v8i64__15_13(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_13: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v10 ; GFX900-NEXT: v_mov_b32_e32 v17, v11 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1303,13 +1303,13 @@ define void @v_shuffle_v2i64_v8i64__15_14(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_14: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v12 ; GFX900-NEXT: v_mov_b32_e32 v17, v13 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1350,13 +1350,13 @@ define void @v_shuffle_v2i64_v8i64__15_15(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__15_15: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1751,13 +1751,13 @@ define void @v_shuffle_v2i64_v8i64__7_0(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__7_0: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v0 ; GFX900-NEXT: v_mov_b32_e32 v17, v1 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1840,12 +1840,12 @@ define void @v_shuffle_v2i64_v8i64__9_0(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[16:31] +; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v4, v16 -; GFX900-NEXT: v_mov_b32_e32 v5, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v18, 0 +; GFX900-NEXT: v_mov_b32_e32 v6, v0 +; GFX900-NEXT: v_mov_b32_e32 v7, v1 +; GFX900-NEXT: global_store_dwordx4 v18, v[4:7], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1896,12 +1896,12 @@ define void @v_shuffle_v2i64_v8i64__10_0(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[16:31] +; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v6, v16 -; GFX900-NEXT: v_mov_b32_e32 v7, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v18, 0 +; GFX900-NEXT: v_mov_b32_e32 v8, v0 +; GFX900-NEXT: v_mov_b32_e32 v9, v1 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -1952,12 +1952,12 @@ define void @v_shuffle_v2i64_v8i64__11_0(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[16:31] +; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v16 -; GFX900-NEXT: v_mov_b32_e32 v9, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v18, 0 +; GFX900-NEXT: v_mov_b32_e32 v10, v0 +; GFX900-NEXT: v_mov_b32_e32 v11, v1 +; GFX900-NEXT: global_store_dwordx4 v18, v[8:11], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2008,12 +2008,12 @@ define void @v_shuffle_v2i64_v8i64__12_0(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[16:31] +; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v10, v16 -; GFX900-NEXT: v_mov_b32_e32 v11, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v18, 0 +; GFX900-NEXT: v_mov_b32_e32 v12, v0 +; GFX900-NEXT: v_mov_b32_e32 v13, v1 +; GFX900-NEXT: global_store_dwordx4 v18, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2064,12 +2064,12 @@ define void @v_shuffle_v2i64_v8i64__13_0(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[16:31] +; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v12, v16 -; GFX900-NEXT: v_mov_b32_e32 v13, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v18, 0 +; GFX900-NEXT: v_mov_b32_e32 v14, v0 +; GFX900-NEXT: v_mov_b32_e32 v15, v1 +; GFX900-NEXT: global_store_dwordx4 v18, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2120,12 +2120,12 @@ define void @v_shuffle_v2i64_v8i64__14_0(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[16:31] +; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v14, v16 -; GFX900-NEXT: v_mov_b32_e32 v15, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v18, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v0 +; GFX900-NEXT: v_mov_b32_e32 v17, v1 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2520,13 +2520,13 @@ define void @v_shuffle_v2i64_v8i64__7_1(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__7_1: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v2 ; GFX900-NEXT: v_mov_b32_e32 v17, v3 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2606,15 +2606,15 @@ define void @v_shuffle_v2i64_v8i64__9_1(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[14:29] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v4, v16 -; GFX900-NEXT: v_mov_b32_e32 v5, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v20, 0 +; GFX900-NEXT: v_mov_b32_e32 v8, v2 +; GFX900-NEXT: v_mov_b32_e32 v9, v3 +; GFX900-NEXT: global_store_dwordx4 v20, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2662,15 +2662,15 @@ define void @v_shuffle_v2i64_v8i64__10_1(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[14:29] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v6, v16 -; GFX900-NEXT: v_mov_b32_e32 v7, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v20, 0 +; GFX900-NEXT: v_mov_b32_e32 v10, v2 +; GFX900-NEXT: v_mov_b32_e32 v11, v3 +; GFX900-NEXT: global_store_dwordx4 v20, v[8:11], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2718,15 +2718,15 @@ define void @v_shuffle_v2i64_v8i64__11_1(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[14:29] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v16 -; GFX900-NEXT: v_mov_b32_e32 v9, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v20, 0 +; GFX900-NEXT: v_mov_b32_e32 v12, v2 +; GFX900-NEXT: v_mov_b32_e32 v13, v3 +; GFX900-NEXT: global_store_dwordx4 v20, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2774,15 +2774,15 @@ define void @v_shuffle_v2i64_v8i64__12_1(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[14:29] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v10, v16 -; GFX900-NEXT: v_mov_b32_e32 v11, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v20, 0 +; GFX900-NEXT: v_mov_b32_e32 v14, v2 +; GFX900-NEXT: v_mov_b32_e32 v15, v3 +; GFX900-NEXT: global_store_dwordx4 v20, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2830,15 +2830,15 @@ define void @v_shuffle_v2i64_v8i64__13_1(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[14:29] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v12, v16 -; GFX900-NEXT: v_mov_b32_e32 v13, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v20, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v2 +; GFX900-NEXT: v_mov_b32_e32 v17, v3 +; GFX900-NEXT: global_store_dwordx4 v20, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2886,15 +2886,15 @@ define void @v_shuffle_v2i64_v8i64__14_1(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[14:29] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v14, v16 -; GFX900-NEXT: v_mov_b32_e32 v15, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v20, 0 +; GFX900-NEXT: v_mov_b32_e32 v18, v2 +; GFX900-NEXT: v_mov_b32_e32 v19, v3 +; GFX900-NEXT: global_store_dwordx4 v20, v[16:19], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -3289,13 +3289,13 @@ define void @v_shuffle_v2i64_v8i64__7_2(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__7_2: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v4 ; GFX900-NEXT: v_mov_b32_e32 v17, v5 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -3375,15 +3375,15 @@ define void @v_shuffle_v2i64_v8i64__9_2(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[12:27] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v4, v16 -; GFX900-NEXT: v_mov_b32_e32 v5, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v22, 0 +; GFX900-NEXT: v_mov_b32_e32 v10, v4 +; GFX900-NEXT: v_mov_b32_e32 v11, v5 +; GFX900-NEXT: global_store_dwordx4 v22, v[8:11], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -3431,15 +3431,15 @@ define void @v_shuffle_v2i64_v8i64__10_2(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[12:27] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v6, v16 -; GFX900-NEXT: v_mov_b32_e32 v7, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v22, 0 +; GFX900-NEXT: v_mov_b32_e32 v12, v4 +; GFX900-NEXT: v_mov_b32_e32 v13, v5 +; GFX900-NEXT: global_store_dwordx4 v22, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -3487,15 +3487,15 @@ define void @v_shuffle_v2i64_v8i64__11_2(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[12:27] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v16 -; GFX900-NEXT: v_mov_b32_e32 v9, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v22, 0 +; GFX900-NEXT: v_mov_b32_e32 v14, v4 +; GFX900-NEXT: v_mov_b32_e32 v15, v5 +; GFX900-NEXT: global_store_dwordx4 v22, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -3543,15 +3543,15 @@ define void @v_shuffle_v2i64_v8i64__12_2(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[12:27] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v10, v16 -; GFX900-NEXT: v_mov_b32_e32 v11, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v22, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v4 +; GFX900-NEXT: v_mov_b32_e32 v17, v5 +; GFX900-NEXT: global_store_dwordx4 v22, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -3599,15 +3599,15 @@ define void @v_shuffle_v2i64_v8i64__13_2(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[12:27] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v12, v16 -; GFX900-NEXT: v_mov_b32_e32 v13, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v22, 0 +; GFX900-NEXT: v_mov_b32_e32 v18, v4 +; GFX900-NEXT: v_mov_b32_e32 v19, v5 +; GFX900-NEXT: global_store_dwordx4 v22, v[16:19], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -3655,15 +3655,15 @@ define void @v_shuffle_v2i64_v8i64__14_2(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[12:27] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v14, v16 -; GFX900-NEXT: v_mov_b32_e32 v15, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v22, 0 +; GFX900-NEXT: v_mov_b32_e32 v20, v4 +; GFX900-NEXT: v_mov_b32_e32 v21, v5 +; GFX900-NEXT: global_store_dwordx4 v22, v[18:21], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4058,13 +4058,13 @@ define void @v_shuffle_v2i64_v8i64__7_3(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__7_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v6 ; GFX900-NEXT: v_mov_b32_e32 v17, v7 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4144,15 +4144,15 @@ define void @v_shuffle_v2i64_v8i64__9_3(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[10:25] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v4, v16 -; GFX900-NEXT: v_mov_b32_e32 v5, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v24, 0 +; GFX900-NEXT: v_mov_b32_e32 v12, v6 +; GFX900-NEXT: v_mov_b32_e32 v13, v7 +; GFX900-NEXT: global_store_dwordx4 v24, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4200,15 +4200,15 @@ define void @v_shuffle_v2i64_v8i64__10_3(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[10:25] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v6, v16 -; GFX900-NEXT: v_mov_b32_e32 v7, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v24, 0 +; GFX900-NEXT: v_mov_b32_e32 v14, v6 +; GFX900-NEXT: v_mov_b32_e32 v15, v7 +; GFX900-NEXT: global_store_dwordx4 v24, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4256,15 +4256,15 @@ define void @v_shuffle_v2i64_v8i64__11_3(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[10:25] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v16 -; GFX900-NEXT: v_mov_b32_e32 v9, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v24, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v6 +; GFX900-NEXT: v_mov_b32_e32 v17, v7 +; GFX900-NEXT: global_store_dwordx4 v24, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4312,15 +4312,15 @@ define void @v_shuffle_v2i64_v8i64__12_3(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[10:25] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v10, v16 -; GFX900-NEXT: v_mov_b32_e32 v11, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v24, 0 +; GFX900-NEXT: v_mov_b32_e32 v18, v6 +; GFX900-NEXT: v_mov_b32_e32 v19, v7 +; GFX900-NEXT: global_store_dwordx4 v24, v[16:19], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4368,15 +4368,15 @@ define void @v_shuffle_v2i64_v8i64__13_3(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[10:25] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v12, v16 -; GFX900-NEXT: v_mov_b32_e32 v13, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v24, 0 +; GFX900-NEXT: v_mov_b32_e32 v20, v6 +; GFX900-NEXT: v_mov_b32_e32 v21, v7 +; GFX900-NEXT: global_store_dwordx4 v24, v[18:21], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4424,15 +4424,15 @@ define void @v_shuffle_v2i64_v8i64__14_3(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[10:25] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v14, v16 -; GFX900-NEXT: v_mov_b32_e32 v15, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v24, 0 +; GFX900-NEXT: v_mov_b32_e32 v22, v6 +; GFX900-NEXT: v_mov_b32_e32 v23, v7 +; GFX900-NEXT: global_store_dwordx4 v24, v[20:23], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4827,13 +4827,13 @@ define void @v_shuffle_v2i64_v8i64__7_4(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__7_4: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v8 ; GFX900-NEXT: v_mov_b32_e32 v17, v9 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4913,15 +4913,15 @@ define void @v_shuffle_v2i64_v8i64__9_4(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[8:23] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v4, v16 -; GFX900-NEXT: v_mov_b32_e32 v5, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v26, 0 +; GFX900-NEXT: v_mov_b32_e32 v14, v8 +; GFX900-NEXT: v_mov_b32_e32 v15, v9 +; GFX900-NEXT: global_store_dwordx4 v26, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4969,15 +4969,15 @@ define void @v_shuffle_v2i64_v8i64__10_4(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[8:23] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v6, v16 -; GFX900-NEXT: v_mov_b32_e32 v7, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v26, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v8 +; GFX900-NEXT: v_mov_b32_e32 v17, v9 +; GFX900-NEXT: global_store_dwordx4 v26, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5025,15 +5025,15 @@ define void @v_shuffle_v2i64_v8i64__11_4(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[8:23] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v16 -; GFX900-NEXT: v_mov_b32_e32 v9, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v26, 0 +; GFX900-NEXT: v_mov_b32_e32 v18, v8 +; GFX900-NEXT: v_mov_b32_e32 v19, v9 +; GFX900-NEXT: global_store_dwordx4 v26, v[16:19], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5081,15 +5081,15 @@ define void @v_shuffle_v2i64_v8i64__12_4(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[8:23] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v10, v16 -; GFX900-NEXT: v_mov_b32_e32 v11, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v26, 0 +; GFX900-NEXT: v_mov_b32_e32 v20, v8 +; GFX900-NEXT: v_mov_b32_e32 v21, v9 +; GFX900-NEXT: global_store_dwordx4 v26, v[18:21], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5137,15 +5137,15 @@ define void @v_shuffle_v2i64_v8i64__13_4(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[8:23] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v12, v16 -; GFX900-NEXT: v_mov_b32_e32 v13, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v26, 0 +; GFX900-NEXT: v_mov_b32_e32 v22, v8 +; GFX900-NEXT: v_mov_b32_e32 v23, v9 +; GFX900-NEXT: global_store_dwordx4 v26, v[20:23], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5193,15 +5193,15 @@ define void @v_shuffle_v2i64_v8i64__14_4(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[8:23] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v14, v16 -; GFX900-NEXT: v_mov_b32_e32 v15, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v26, 0 +; GFX900-NEXT: v_mov_b32_e32 v24, v8 +; GFX900-NEXT: v_mov_b32_e32 v25, v9 +; GFX900-NEXT: global_store_dwordx4 v26, v[22:25], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5596,13 +5596,13 @@ define void @v_shuffle_v2i64_v8i64__7_5(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__7_5: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v10 ; GFX900-NEXT: v_mov_b32_e32 v17, v11 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5682,15 +5682,15 @@ define void @v_shuffle_v2i64_v8i64__9_5(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[6:21] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v4, v16 -; GFX900-NEXT: v_mov_b32_e32 v5, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v28, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v10 +; GFX900-NEXT: v_mov_b32_e32 v17, v11 +; GFX900-NEXT: global_store_dwordx4 v28, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5738,15 +5738,15 @@ define void @v_shuffle_v2i64_v8i64__10_5(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[6:21] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v6, v16 -; GFX900-NEXT: v_mov_b32_e32 v7, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v28, 0 +; GFX900-NEXT: v_mov_b32_e32 v18, v10 +; GFX900-NEXT: v_mov_b32_e32 v19, v11 +; GFX900-NEXT: global_store_dwordx4 v28, v[16:19], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5794,15 +5794,15 @@ define void @v_shuffle_v2i64_v8i64__11_5(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[6:21] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v16 -; GFX900-NEXT: v_mov_b32_e32 v9, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v28, 0 +; GFX900-NEXT: v_mov_b32_e32 v20, v10 +; GFX900-NEXT: v_mov_b32_e32 v21, v11 +; GFX900-NEXT: global_store_dwordx4 v28, v[18:21], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5850,15 +5850,15 @@ define void @v_shuffle_v2i64_v8i64__12_5(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[6:21] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v10, v16 -; GFX900-NEXT: v_mov_b32_e32 v11, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v28, 0 +; GFX900-NEXT: v_mov_b32_e32 v22, v10 +; GFX900-NEXT: v_mov_b32_e32 v23, v11 +; GFX900-NEXT: global_store_dwordx4 v28, v[20:23], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5906,15 +5906,15 @@ define void @v_shuffle_v2i64_v8i64__13_5(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[6:21] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v12, v16 -; GFX900-NEXT: v_mov_b32_e32 v13, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v28, 0 +; GFX900-NEXT: v_mov_b32_e32 v24, v10 +; GFX900-NEXT: v_mov_b32_e32 v25, v11 +; GFX900-NEXT: global_store_dwordx4 v28, v[22:25], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5962,15 +5962,15 @@ define void @v_shuffle_v2i64_v8i64__14_5(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[6:21] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v14, v16 -; GFX900-NEXT: v_mov_b32_e32 v15, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v28, 0 +; GFX900-NEXT: v_mov_b32_e32 v26, v10 +; GFX900-NEXT: v_mov_b32_e32 v27, v11 +; GFX900-NEXT: global_store_dwordx4 v28, v[24:27], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6365,13 +6365,13 @@ define void @v_shuffle_v2i64_v8i64__7_6(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__7_6: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v12 ; GFX900-NEXT: v_mov_b32_e32 v17, v13 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6451,15 +6451,15 @@ define void @v_shuffle_v2i64_v8i64__9_6(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[4:19] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v4, v16 -; GFX900-NEXT: v_mov_b32_e32 v5, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v30, 0 +; GFX900-NEXT: v_mov_b32_e32 v18, v12 +; GFX900-NEXT: v_mov_b32_e32 v19, v13 +; GFX900-NEXT: global_store_dwordx4 v30, v[16:19], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6507,15 +6507,15 @@ define void @v_shuffle_v2i64_v8i64__10_6(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[4:19] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v6, v16 -; GFX900-NEXT: v_mov_b32_e32 v7, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v30, 0 +; GFX900-NEXT: v_mov_b32_e32 v20, v12 +; GFX900-NEXT: v_mov_b32_e32 v21, v13 +; GFX900-NEXT: global_store_dwordx4 v30, v[18:21], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6563,15 +6563,15 @@ define void @v_shuffle_v2i64_v8i64__11_6(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[4:19] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v16 -; GFX900-NEXT: v_mov_b32_e32 v9, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v30, 0 +; GFX900-NEXT: v_mov_b32_e32 v22, v12 +; GFX900-NEXT: v_mov_b32_e32 v23, v13 +; GFX900-NEXT: global_store_dwordx4 v30, v[20:23], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6619,15 +6619,15 @@ define void @v_shuffle_v2i64_v8i64__12_6(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[4:19] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v10, v16 -; GFX900-NEXT: v_mov_b32_e32 v11, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v30, 0 +; GFX900-NEXT: v_mov_b32_e32 v24, v12 +; GFX900-NEXT: v_mov_b32_e32 v25, v13 +; GFX900-NEXT: global_store_dwordx4 v30, v[22:25], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6675,15 +6675,15 @@ define void @v_shuffle_v2i64_v8i64__13_6(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[4:19] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v12, v16 -; GFX900-NEXT: v_mov_b32_e32 v13, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v30, 0 +; GFX900-NEXT: v_mov_b32_e32 v26, v12 +; GFX900-NEXT: v_mov_b32_e32 v27, v13 +; GFX900-NEXT: global_store_dwordx4 v30, v[24:27], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6731,15 +6731,15 @@ define void @v_shuffle_v2i64_v8i64__14_6(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[4:19] +; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v14, v16 -; GFX900-NEXT: v_mov_b32_e32 v15, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v30, 0 +; GFX900-NEXT: v_mov_b32_e32 v28, v12 +; GFX900-NEXT: v_mov_b32_e32 v29, v13 +; GFX900-NEXT: global_store_dwordx4 v30, v[26:29], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -7134,13 +7134,13 @@ define void @v_shuffle_v2i64_v8i64__7_7(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-LABEL: v_shuffle_v2i64_v8i64__7_7: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -7220,15 +7220,15 @@ define void @v_shuffle_v2i64_v8i64__9_7(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[2:17] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v32, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v4, v16 -; GFX900-NEXT: v_mov_b32_e32 v5, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v20, v14 +; GFX900-NEXT: v_mov_b32_e32 v21, v15 +; GFX900-NEXT: global_store_dwordx4 v32, v[18:21], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -7276,15 +7276,15 @@ define void @v_shuffle_v2i64_v8i64__10_7(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[2:17] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v32, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v6, v16 -; GFX900-NEXT: v_mov_b32_e32 v7, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v22, v14 +; GFX900-NEXT: v_mov_b32_e32 v23, v15 +; GFX900-NEXT: global_store_dwordx4 v32, v[20:23], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -7332,15 +7332,15 @@ define void @v_shuffle_v2i64_v8i64__11_7(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[2:17] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v32, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v16 -; GFX900-NEXT: v_mov_b32_e32 v9, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v24, v14 +; GFX900-NEXT: v_mov_b32_e32 v25, v15 +; GFX900-NEXT: global_store_dwordx4 v32, v[22:25], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -7388,15 +7388,15 @@ define void @v_shuffle_v2i64_v8i64__12_7(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[2:17] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v32, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v10, v16 -; GFX900-NEXT: v_mov_b32_e32 v11, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v26, v14 +; GFX900-NEXT: v_mov_b32_e32 v27, v15 +; GFX900-NEXT: global_store_dwordx4 v32, v[24:27], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -7444,15 +7444,15 @@ define void @v_shuffle_v2i64_v8i64__13_7(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[2:17] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v32, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v12, v16 -; GFX900-NEXT: v_mov_b32_e32 v13, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v28, v14 +; GFX900-NEXT: v_mov_b32_e32 v29, v15 +; GFX900-NEXT: global_store_dwordx4 v32, v[26:29], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -7500,15 +7500,15 @@ define void @v_shuffle_v2i64_v8i64__14_7(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[2:17] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v32, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v14, v16 -; GFX900-NEXT: v_mov_b32_e32 v15, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v30, v14 +; GFX900-NEXT: v_mov_b32_e32 v31, v15 +; GFX900-NEXT: global_store_dwordx4 v32, v[28:31], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -8211,10 +8211,10 @@ define void @v_shuffle_v2i64_v8i64__0_9(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v2, v4 ; GFX900-NEXT: v_mov_b32_e32 v3, v5 -; GFX900-NEXT: v_mov_b32_e32 v4, 0 -; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -8267,10 +8267,10 @@ define void @v_shuffle_v2i64_v8i64__1_9(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v20, 0 ; GFX900-NEXT: v_mov_b32_e32 v4, v6 ; GFX900-NEXT: v_mov_b32_e32 v5, v7 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -8323,10 +8323,10 @@ define void @v_shuffle_v2i64_v8i64__2_9(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v22, 0 ; GFX900-NEXT: v_mov_b32_e32 v6, v8 ; GFX900-NEXT: v_mov_b32_e32 v7, v9 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -8379,10 +8379,10 @@ define void @v_shuffle_v2i64_v8i64__3_9(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v24, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v10 ; GFX900-NEXT: v_mov_b32_e32 v9, v11 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -8435,10 +8435,10 @@ define void @v_shuffle_v2i64_v8i64__4_9(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v26, 0 ; GFX900-NEXT: v_mov_b32_e32 v10, v12 ; GFX900-NEXT: v_mov_b32_e32 v11, v13 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -8491,10 +8491,10 @@ define void @v_shuffle_v2i64_v8i64__5_9(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v28, 0 ; GFX900-NEXT: v_mov_b32_e32 v12, v14 ; GFX900-NEXT: v_mov_b32_e32 v13, v15 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -8547,10 +8547,10 @@ define void @v_shuffle_v2i64_v8i64__6_9(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v30, 0 ; GFX900-NEXT: v_mov_b32_e32 v14, v16 ; GFX900-NEXT: v_mov_b32_e32 v15, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -8598,15 +8598,15 @@ define void @v_shuffle_v2i64_v8i64__7_9(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v16, v2 -; GFX900-NEXT: v_mov_b32_e32 v17, v3 +; GFX900-NEXT: v_mov_b32_e32 v32, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v18 +; GFX900-NEXT: v_mov_b32_e32 v17, v19 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v32, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9014,10 +9014,10 @@ define void @v_shuffle_v2i64_v8i64__0_10(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v2, v6 ; GFX900-NEXT: v_mov_b32_e32 v3, v7 -; GFX900-NEXT: v_mov_b32_e32 v4, 0 -; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9070,10 +9070,10 @@ define void @v_shuffle_v2i64_v8i64__1_10(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v20, 0 ; GFX900-NEXT: v_mov_b32_e32 v4, v8 ; GFX900-NEXT: v_mov_b32_e32 v5, v9 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9126,10 +9126,10 @@ define void @v_shuffle_v2i64_v8i64__2_10(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v22, 0 ; GFX900-NEXT: v_mov_b32_e32 v6, v10 ; GFX900-NEXT: v_mov_b32_e32 v7, v11 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9182,10 +9182,10 @@ define void @v_shuffle_v2i64_v8i64__3_10(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v24, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v12 ; GFX900-NEXT: v_mov_b32_e32 v9, v13 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9238,10 +9238,10 @@ define void @v_shuffle_v2i64_v8i64__4_10(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v26, 0 ; GFX900-NEXT: v_mov_b32_e32 v10, v14 ; GFX900-NEXT: v_mov_b32_e32 v11, v15 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9294,10 +9294,10 @@ define void @v_shuffle_v2i64_v8i64__5_10(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v28, 0 ; GFX900-NEXT: v_mov_b32_e32 v12, v16 ; GFX900-NEXT: v_mov_b32_e32 v13, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9350,10 +9350,10 @@ define void @v_shuffle_v2i64_v8i64__6_10(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v30, 0 ; GFX900-NEXT: v_mov_b32_e32 v14, v18 ; GFX900-NEXT: v_mov_b32_e32 v15, v19 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9401,15 +9401,15 @@ define void @v_shuffle_v2i64_v8i64__7_10(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v16, v4 -; GFX900-NEXT: v_mov_b32_e32 v17, v5 +; GFX900-NEXT: v_mov_b32_e32 v32, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v20 +; GFX900-NEXT: v_mov_b32_e32 v17, v21 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v32, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9817,10 +9817,10 @@ define void @v_shuffle_v2i64_v8i64__0_11(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v2, v8 ; GFX900-NEXT: v_mov_b32_e32 v3, v9 -; GFX900-NEXT: v_mov_b32_e32 v4, 0 -; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9873,10 +9873,10 @@ define void @v_shuffle_v2i64_v8i64__1_11(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v20, 0 ; GFX900-NEXT: v_mov_b32_e32 v4, v10 ; GFX900-NEXT: v_mov_b32_e32 v5, v11 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9929,10 +9929,10 @@ define void @v_shuffle_v2i64_v8i64__2_11(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v22, 0 ; GFX900-NEXT: v_mov_b32_e32 v6, v12 ; GFX900-NEXT: v_mov_b32_e32 v7, v13 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9985,10 +9985,10 @@ define void @v_shuffle_v2i64_v8i64__3_11(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v24, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v14 ; GFX900-NEXT: v_mov_b32_e32 v9, v15 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -10041,10 +10041,10 @@ define void @v_shuffle_v2i64_v8i64__4_11(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v26, 0 ; GFX900-NEXT: v_mov_b32_e32 v10, v16 ; GFX900-NEXT: v_mov_b32_e32 v11, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -10097,10 +10097,10 @@ define void @v_shuffle_v2i64_v8i64__5_11(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v28, 0 ; GFX900-NEXT: v_mov_b32_e32 v12, v18 ; GFX900-NEXT: v_mov_b32_e32 v13, v19 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -10153,10 +10153,10 @@ define void @v_shuffle_v2i64_v8i64__6_11(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v30, 0 ; GFX900-NEXT: v_mov_b32_e32 v14, v20 ; GFX900-NEXT: v_mov_b32_e32 v15, v21 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -10204,15 +10204,15 @@ define void @v_shuffle_v2i64_v8i64__7_11(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v16, v6 -; GFX900-NEXT: v_mov_b32_e32 v17, v7 +; GFX900-NEXT: v_mov_b32_e32 v32, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v22 +; GFX900-NEXT: v_mov_b32_e32 v17, v23 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v32, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -10620,10 +10620,10 @@ define void @v_shuffle_v2i64_v8i64__0_12(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v2, v10 ; GFX900-NEXT: v_mov_b32_e32 v3, v11 -; GFX900-NEXT: v_mov_b32_e32 v4, 0 -; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -10676,10 +10676,10 @@ define void @v_shuffle_v2i64_v8i64__1_12(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v20, 0 ; GFX900-NEXT: v_mov_b32_e32 v4, v12 ; GFX900-NEXT: v_mov_b32_e32 v5, v13 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -10732,10 +10732,10 @@ define void @v_shuffle_v2i64_v8i64__2_12(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v22, 0 ; GFX900-NEXT: v_mov_b32_e32 v6, v14 ; GFX900-NEXT: v_mov_b32_e32 v7, v15 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -10788,10 +10788,10 @@ define void @v_shuffle_v2i64_v8i64__3_12(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v24, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v16 ; GFX900-NEXT: v_mov_b32_e32 v9, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -10844,10 +10844,10 @@ define void @v_shuffle_v2i64_v8i64__4_12(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v26, 0 ; GFX900-NEXT: v_mov_b32_e32 v10, v18 ; GFX900-NEXT: v_mov_b32_e32 v11, v19 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -10900,10 +10900,10 @@ define void @v_shuffle_v2i64_v8i64__5_12(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v28, 0 ; GFX900-NEXT: v_mov_b32_e32 v12, v20 ; GFX900-NEXT: v_mov_b32_e32 v13, v21 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -10956,10 +10956,10 @@ define void @v_shuffle_v2i64_v8i64__6_12(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v30, 0 ; GFX900-NEXT: v_mov_b32_e32 v14, v22 ; GFX900-NEXT: v_mov_b32_e32 v15, v23 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11007,15 +11007,15 @@ define void @v_shuffle_v2i64_v8i64__7_12(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v16, v8 -; GFX900-NEXT: v_mov_b32_e32 v17, v9 +; GFX900-NEXT: v_mov_b32_e32 v32, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v24 +; GFX900-NEXT: v_mov_b32_e32 v17, v25 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v32, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11423,10 +11423,10 @@ define void @v_shuffle_v2i64_v8i64__0_13(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v2, v12 ; GFX900-NEXT: v_mov_b32_e32 v3, v13 -; GFX900-NEXT: v_mov_b32_e32 v4, 0 -; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11479,10 +11479,10 @@ define void @v_shuffle_v2i64_v8i64__1_13(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v20, 0 ; GFX900-NEXT: v_mov_b32_e32 v4, v14 ; GFX900-NEXT: v_mov_b32_e32 v5, v15 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11535,10 +11535,10 @@ define void @v_shuffle_v2i64_v8i64__2_13(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v22, 0 ; GFX900-NEXT: v_mov_b32_e32 v6, v16 ; GFX900-NEXT: v_mov_b32_e32 v7, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11591,10 +11591,10 @@ define void @v_shuffle_v2i64_v8i64__3_13(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v24, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v18 ; GFX900-NEXT: v_mov_b32_e32 v9, v19 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11647,10 +11647,10 @@ define void @v_shuffle_v2i64_v8i64__4_13(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v26, 0 ; GFX900-NEXT: v_mov_b32_e32 v10, v20 ; GFX900-NEXT: v_mov_b32_e32 v11, v21 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11703,10 +11703,10 @@ define void @v_shuffle_v2i64_v8i64__5_13(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v28, 0 ; GFX900-NEXT: v_mov_b32_e32 v12, v22 ; GFX900-NEXT: v_mov_b32_e32 v13, v23 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11759,10 +11759,10 @@ define void @v_shuffle_v2i64_v8i64__6_13(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v30, 0 ; GFX900-NEXT: v_mov_b32_e32 v14, v24 ; GFX900-NEXT: v_mov_b32_e32 v15, v25 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11810,15 +11810,15 @@ define void @v_shuffle_v2i64_v8i64__7_13(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v16, v10 -; GFX900-NEXT: v_mov_b32_e32 v17, v11 +; GFX900-NEXT: v_mov_b32_e32 v32, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v26 +; GFX900-NEXT: v_mov_b32_e32 v17, v27 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v32, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -12226,10 +12226,10 @@ define void @v_shuffle_v2i64_v8i64__0_14(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v2, v14 ; GFX900-NEXT: v_mov_b32_e32 v3, v15 -; GFX900-NEXT: v_mov_b32_e32 v4, 0 -; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -12282,10 +12282,10 @@ define void @v_shuffle_v2i64_v8i64__1_14(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v20, 0 ; GFX900-NEXT: v_mov_b32_e32 v4, v16 ; GFX900-NEXT: v_mov_b32_e32 v5, v17 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -12338,10 +12338,10 @@ define void @v_shuffle_v2i64_v8i64__2_14(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v22, 0 ; GFX900-NEXT: v_mov_b32_e32 v6, v18 ; GFX900-NEXT: v_mov_b32_e32 v7, v19 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -12394,10 +12394,10 @@ define void @v_shuffle_v2i64_v8i64__3_14(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v24, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v20 ; GFX900-NEXT: v_mov_b32_e32 v9, v21 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -12450,10 +12450,10 @@ define void @v_shuffle_v2i64_v8i64__4_14(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v26, 0 ; GFX900-NEXT: v_mov_b32_e32 v10, v22 ; GFX900-NEXT: v_mov_b32_e32 v11, v23 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -12506,10 +12506,10 @@ define void @v_shuffle_v2i64_v8i64__5_14(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v28, 0 ; GFX900-NEXT: v_mov_b32_e32 v12, v24 ; GFX900-NEXT: v_mov_b32_e32 v13, v25 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -12562,10 +12562,10 @@ define void @v_shuffle_v2i64_v8i64__6_14(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v30, 0 ; GFX900-NEXT: v_mov_b32_e32 v14, v26 ; GFX900-NEXT: v_mov_b32_e32 v15, v27 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -12613,15 +12613,15 @@ define void @v_shuffle_v2i64_v8i64__7_14(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v16, v12 -; GFX900-NEXT: v_mov_b32_e32 v17, v13 +; GFX900-NEXT: v_mov_b32_e32 v32, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v28 +; GFX900-NEXT: v_mov_b32_e32 v17, v29 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v32, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -13029,10 +13029,10 @@ define void @v_shuffle_v2i64_v8i64__0_15(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:17] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v2, v16 ; GFX900-NEXT: v_mov_b32_e32 v3, v17 -; GFX900-NEXT: v_mov_b32_e32 v4, 0 -; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[0:3], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -13085,10 +13085,10 @@ define void @v_shuffle_v2i64_v8i64__1_15(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[4:19] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v20, 0 ; GFX900-NEXT: v_mov_b32_e32 v4, v18 ; GFX900-NEXT: v_mov_b32_e32 v5, v19 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v20, v[2:5], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -13141,10 +13141,10 @@ define void @v_shuffle_v2i64_v8i64__2_15(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[6:21] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v22, 0 ; GFX900-NEXT: v_mov_b32_e32 v6, v20 ; GFX900-NEXT: v_mov_b32_e32 v7, v21 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[4:7], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v22, v[4:7], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -13197,10 +13197,10 @@ define void @v_shuffle_v2i64_v8i64__3_15(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:23] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v24, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v22 ; GFX900-NEXT: v_mov_b32_e32 v9, v23 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v24, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -13253,10 +13253,10 @@ define void @v_shuffle_v2i64_v8i64__4_15(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[10:25] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v26, 0 ; GFX900-NEXT: v_mov_b32_e32 v10, v24 ; GFX900-NEXT: v_mov_b32_e32 v11, v25 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[8:11], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v26, v[8:11], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -13309,10 +13309,10 @@ define void @v_shuffle_v2i64_v8i64__5_15(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[12:27] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v28, 0 ; GFX900-NEXT: v_mov_b32_e32 v12, v26 ; GFX900-NEXT: v_mov_b32_e32 v13, v27 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v28, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -13365,10 +13365,10 @@ define void @v_shuffle_v2i64_v8i64__6_15(ptr addrspace(1) inreg %ptr) #0 { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[14:29] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v30, 0 ; GFX900-NEXT: v_mov_b32_e32 v14, v28 ; GFX900-NEXT: v_mov_b32_e32 v15, v29 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[12:15], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v30, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -13416,15 +13416,15 @@ define void @v_shuffle_v2i64_v8i64__7_15(ptr addrspace(1) inreg %ptr) #0 { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:15] +; GFX900-NEXT: ; def v[16:31] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v16, v14 -; GFX900-NEXT: v_mov_b32_e32 v17, v15 +; GFX900-NEXT: v_mov_b32_e32 v32, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v30 +; GFX900-NEXT: v_mov_b32_e32 v17, v31 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v32, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll index 32e0f5fd3e57b..103ace732944a 100644 --- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll +++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll @@ -879,18 +879,17 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_u(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_7_3_u: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2163,20 +2162,19 @@ define void @v_shuffle_v4i64_v4i64__7_1_0_0(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_1_0_0: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v16, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:9] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: v_mov_b32_e32 v0, v2 ; GFX900-NEXT: v_mov_b32_e32 v1, v3 -; GFX900-NEXT: v_mov_b32_e32 v8, v4 -; GFX900-NEXT: v_mov_b32_e32 v9, v5 -; GFX900-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v14, v4 +; GFX900-NEXT: v_mov_b32_e32 v15, v5 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[6:13] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2631,18 +2629,17 @@ define void @v_shuffle_v4i64_v4i64__7_7_u_0(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_7_u_0: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:9] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v0, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[4:11] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v12, v10 +; GFX900-NEXT: v_mov_b32_e32 v13, v11 +; GFX900-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2818,20 +2815,19 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_0(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_7_3_0: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v0 -; GFX900-NEXT: v_mov_b32_e32 v9, v1 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v0 +; GFX900-NEXT: v_mov_b32_e32 v9, v1 +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -3014,16 +3010,16 @@ define void @v_shuffle_v4i64_v4i64__7_7_6_0(ptr addrspace(1) inreg %ptr) { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:9] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v14, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[4:11] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v0, v8 ; GFX900-NEXT: v_mov_b32_e32 v1, v9 -; GFX900-NEXT: v_mov_b32_e32 v4, 0 ; GFX900-NEXT: v_mov_b32_e32 v12, v10 ; GFX900-NEXT: v_mov_b32_e32 v13, v11 -; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v4, v[10:13], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v14, v[0:3], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4269,20 +4265,19 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_1(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_7_3_1: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v2 -; GFX900-NEXT: v_mov_b32_e32 v9, v3 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v2 +; GFX900-NEXT: v_mov_b32_e32 v9, v3 +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5719,20 +5714,19 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_2(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_7_3_2: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v4 -; GFX900-NEXT: v_mov_b32_e32 v9, v5 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v4 +; GFX900-NEXT: v_mov_b32_e32 v9, v5 +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6475,18 +6469,17 @@ define void @v_shuffle_v4i64_v4i64__7_u_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_u_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v16, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v6 +; GFX900-NEXT: v_mov_b32_e32 v9, v7 +; GFX900-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v16, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6535,17 +6528,17 @@ define void @v_shuffle_v4i64_v4i64__7_0_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_0_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] -; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6712,20 +6705,19 @@ define void @v_shuffle_v4i64_v4i64__7_4_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_4_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 +; GFX900-NEXT: v_mov_b32_e32 v20, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[10:17] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v0 -; GFX900-NEXT: v_mov_b32_e32 v9, v1 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v6 +; GFX900-NEXT: v_mov_b32_e32 v9, v7 +; GFX900-NEXT: v_mov_b32_e32 v18, v10 +; GFX900-NEXT: v_mov_b32_e32 v19, v11 +; GFX900-NEXT: global_store_dwordx4 v20, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v20, v[16:19], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6778,20 +6770,19 @@ define void @v_shuffle_v4i64_v4i64__7_5_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_5_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v2 -; GFX900-NEXT: v_mov_b32_e32 v9, v3 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v6 +; GFX900-NEXT: v_mov_b32_e32 v9, v7 +; GFX900-NEXT: v_mov_b32_e32 v16, v10 +; GFX900-NEXT: v_mov_b32_e32 v17, v11 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6843,20 +6834,19 @@ define void @v_shuffle_v4i64_v4i64__7_6_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_6_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v4 -; GFX900-NEXT: v_mov_b32_e32 v9, v5 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v6 +; GFX900-NEXT: v_mov_b32_e32 v9, v7 +; GFX900-NEXT: v_mov_b32_e32 v16, v12 +; GFX900-NEXT: v_mov_b32_e32 v17, v13 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6908,20 +6898,19 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_7_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v8, v6 ; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -8447,17 +8436,17 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_4(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__7_7_3_4: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] -; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9835,18 +9824,18 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_5(ptr addrspace(1) inreg %ptr) { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] -; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v10 ; GFX900-NEXT: v_mov_b32_e32 v9, v11 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11229,18 +11218,18 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_6(ptr addrspace(1) inreg %ptr) { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] -; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v12 ; GFX900-NEXT: v_mov_b32_e32 v9, v13 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11641,18 +11630,19 @@ define void @v_shuffle_v4i64_v4i64__3_7_7_7(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4i64_v4i64__3_7_7_7: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 +; GFX900-NEXT: v_mov_b32_e32 v8, v14 +; GFX900-NEXT: v_mov_b32_e32 v9, v15 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -12617,18 +12607,18 @@ define void @v_shuffle_v4i64_v4i64__7_7_3_7(ptr addrspace(1) inreg %ptr) { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] -; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v14 ; GFX900-NEXT: v_mov_b32_e32 v9, v15 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll index 8e905b09c5fdc..ddb243879cb84 100644 --- a/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll +++ b/llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll @@ -879,18 +879,17 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_u(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_7_3_u: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2163,20 +2162,19 @@ define void @v_shuffle_v4p0_v4p0__7_1_0_0(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_1_0_0: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: v_mov_b32_e32 v16, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:9] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: v_mov_b32_e32 v0, v2 ; GFX900-NEXT: v_mov_b32_e32 v1, v3 -; GFX900-NEXT: v_mov_b32_e32 v8, v4 -; GFX900-NEXT: v_mov_b32_e32 v9, v5 -; GFX900-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v14, v4 +; GFX900-NEXT: v_mov_b32_e32 v15, v5 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[6:13] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2631,18 +2629,17 @@ define void @v_shuffle_v4p0_v4p0__7_7_u_0(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_7_u_0: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:9] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: global_store_dwordx4 v10, v[0:3], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v0, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[4:11] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v12, v10 +; GFX900-NEXT: v_mov_b32_e32 v13, v11 +; GFX900-NEXT: global_store_dwordx4 v0, v[0:3], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v0, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -2818,20 +2815,19 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_0(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_7_3_0: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v0 -; GFX900-NEXT: v_mov_b32_e32 v9, v1 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v0 +; GFX900-NEXT: v_mov_b32_e32 v9, v1 +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -3014,16 +3010,16 @@ define void @v_shuffle_v4p0_v4p0__7_7_6_0(ptr addrspace(1) inreg %ptr) { ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[2:9] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v14, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[4:11] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v0, v8 ; GFX900-NEXT: v_mov_b32_e32 v1, v9 -; GFX900-NEXT: v_mov_b32_e32 v4, 0 ; GFX900-NEXT: v_mov_b32_e32 v12, v10 ; GFX900-NEXT: v_mov_b32_e32 v13, v11 -; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v4, v[10:13], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v14, v[0:3], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v14, v[10:13], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -4269,20 +4265,19 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_1(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_7_3_1: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v2 -; GFX900-NEXT: v_mov_b32_e32 v9, v3 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v2 +; GFX900-NEXT: v_mov_b32_e32 v9, v3 +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -5719,20 +5714,19 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_2(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_7_3_2: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v4 -; GFX900-NEXT: v_mov_b32_e32 v9, v5 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v4 +; GFX900-NEXT: v_mov_b32_e32 v9, v5 +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6475,18 +6469,17 @@ define void @v_shuffle_v4p0_v4p0__7_u_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_u_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v16, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v6 +; GFX900-NEXT: v_mov_b32_e32 v9, v7 +; GFX900-NEXT: global_store_dwordx4 v16, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v16, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6535,17 +6528,17 @@ define void @v_shuffle_v4p0_v4p0__7_0_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_0_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] -; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6712,20 +6705,19 @@ define void @v_shuffle_v4p0_v4p0__7_4_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_4_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 +; GFX900-NEXT: v_mov_b32_e32 v20, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[10:17] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v0 -; GFX900-NEXT: v_mov_b32_e32 v9, v1 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v6 +; GFX900-NEXT: v_mov_b32_e32 v9, v7 +; GFX900-NEXT: v_mov_b32_e32 v18, v10 +; GFX900-NEXT: v_mov_b32_e32 v19, v11 +; GFX900-NEXT: global_store_dwordx4 v20, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v20, v[16:19], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6778,20 +6770,19 @@ define void @v_shuffle_v4p0_v4p0__7_5_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_5_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v2 -; GFX900-NEXT: v_mov_b32_e32 v9, v3 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v6 +; GFX900-NEXT: v_mov_b32_e32 v9, v7 +; GFX900-NEXT: v_mov_b32_e32 v16, v10 +; GFX900-NEXT: v_mov_b32_e32 v17, v11 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6843,20 +6834,19 @@ define void @v_shuffle_v4p0_v4p0__7_6_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_6_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v4 -; GFX900-NEXT: v_mov_b32_e32 v9, v5 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v8, v6 +; GFX900-NEXT: v_mov_b32_e32 v9, v7 +; GFX900-NEXT: v_mov_b32_e32 v16, v12 +; GFX900-NEXT: v_mov_b32_e32 v17, v13 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -6908,20 +6898,19 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_3(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_7_3_3: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND ; GFX900-NEXT: v_mov_b32_e32 v8, v6 ; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -8447,17 +8436,17 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_4(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__7_7_3_4: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] -; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v0, 0 ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -9835,18 +9824,18 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_5(ptr addrspace(1) inreg %ptr) { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] -; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v10 ; GFX900-NEXT: v_mov_b32_e32 v9, v11 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11229,18 +11218,18 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_6(ptr addrspace(1) inreg %ptr) { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] -; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v12 ; GFX900-NEXT: v_mov_b32_e32 v9, v13 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -11641,18 +11630,19 @@ define void @v_shuffle_v4p0_v4p0__3_7_7_7(ptr addrspace(1) inreg %ptr) { ; GFX900-LABEL: v_shuffle_v4p0_v4p0__3_7_7_7: ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX900-NEXT: v_mov_b32_e32 v10, 0 ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: v_mov_b32_e32 v8, v6 -; GFX900-NEXT: v_mov_b32_e32 v9, v7 -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: s_nop 0 +; GFX900-NEXT: v_mov_b32_e32 v18, 0 +; GFX900-NEXT: v_mov_b32_e32 v16, v14 +; GFX900-NEXT: v_mov_b32_e32 v17, v15 +; GFX900-NEXT: v_mov_b32_e32 v8, v14 +; GFX900-NEXT: v_mov_b32_e32 v9, v15 ; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[0:7] ; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: global_store_dwordx4 v10, v[6:9], s[16:17] +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; @@ -12617,18 +12607,18 @@ define void @v_shuffle_v4p0_v4p0__7_7_3_7(ptr addrspace(1) inreg %ptr) { ; GFX900: ; %bb.0: ; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX900-NEXT: ;;#ASMSTART -; GFX900-NEXT: ; def v[0:7] -; GFX900-NEXT: ;;#ASMEND -; GFX900-NEXT: ;;#ASMSTART ; GFX900-NEXT: ; def v[8:15] ; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: v_mov_b32_e32 v18, 0 ; GFX900-NEXT: v_mov_b32_e32 v8, v14 ; GFX900-NEXT: v_mov_b32_e32 v9, v15 -; GFX900-NEXT: v_mov_b32_e32 v0, 0 ; GFX900-NEXT: v_mov_b32_e32 v16, v14 ; GFX900-NEXT: v_mov_b32_e32 v17, v15 -; GFX900-NEXT: global_store_dwordx4 v0, v[6:9], s[16:17] offset:16 -; GFX900-NEXT: global_store_dwordx4 v0, v[14:17], s[16:17] +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; def v[0:7] +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: global_store_dwordx4 v18, v[6:9], s[16:17] offset:16 +; GFX900-NEXT: global_store_dwordx4 v18, v[14:17], s[16:17] ; GFX900-NEXT: s_waitcnt vmcnt(0) ; GFX900-NEXT: s_setpc_b64 s[30:31] ; diff --git a/llvm/test/CodeGen/AMDGPU/sibling-call.ll b/llvm/test/CodeGen/AMDGPU/sibling-call.ll index 862ed39078fea..8bea8a5ab6ccf 100644 --- a/llvm/test/CodeGen/AMDGPU/sibling-call.ll +++ b/llvm/test/CodeGen/AMDGPU/sibling-call.ll @@ -731,13 +731,13 @@ define hidden fastcc i32 @indirect_divergent_sibling_call_i32_fastcc_i32_i32(ptr ; HAWAII-NEXT: s_mov_b64 s[4:5], s[48:49] ; HAWAII-NEXT: s_mov_b64 s[6:7], s[38:39] ; HAWAII-NEXT: s_mov_b64 s[8:9], s[36:37] -; HAWAII-NEXT: s_mov_b64 s[10:11], s[34:35] ; HAWAII-NEXT: s_mov_b32 s12, s53 ; HAWAII-NEXT: s_mov_b32 s13, s52 ; HAWAII-NEXT: s_mov_b32 s14, s51 ; HAWAII-NEXT: s_mov_b32 s15, s50 ; HAWAII-NEXT: v_mov_b32_e32 v0, v2 ; HAWAII-NEXT: v_mov_b32_e32 v1, v3 +; HAWAII-NEXT: s_mov_b64 s[10:11], s[34:35] ; HAWAII-NEXT: s_swappc_b64 s[30:31], s[16:17] ; HAWAII-NEXT: v_mov_b32_e32 v4, v0 ; HAWAII-NEXT: ; implicit-def: $vgpr0_vgpr1 diff --git a/llvm/test/CodeGen/AMDGPU/spill-agpr.ll b/llvm/test/CodeGen/AMDGPU/spill-agpr.ll index f2dd473162034..d29234d783763 100644 --- a/llvm/test/CodeGen/AMDGPU/spill-agpr.ll +++ b/llvm/test/CodeGen/AMDGPU/spill-agpr.ll @@ -45,10 +45,10 @@ define amdgpu_kernel void @max_12regs_13a_used(i32 %cond, ptr addrspace(1) %arg, ; GFX908-NEXT: v_accvgpr_write_b32 a6, v3 ; GFX908-NEXT: v_accvgpr_write_b32 a5, v2 ; GFX908-NEXT: v_accvgpr_write_b32 a4, v1 +; GFX908-NEXT: v_mov_b32_e32 v4, 0 ; GFX908-NEXT: v_mov_b32_e32 v1, v0 ; GFX908-NEXT: v_mov_b32_e32 v2, v0 ; GFX908-NEXT: v_mov_b32_e32 v3, v0 -; GFX908-NEXT: v_mov_b32_e32 v4, 0 ; GFX908-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7] ; GFX908-NEXT: s_waitcnt vmcnt(0) ; GFX908-NEXT: ;;#ASMSTART diff --git a/llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll b/llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll index f08b68f9b8c38..52ea6cf4360ea 100644 --- a/llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll +++ b/llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll @@ -10,7 +10,8 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK: ; %bb.0: ; %entry ; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; CHECK-NEXT: s_or_saveexec_b64 s[4:5], -1 -; CHECK-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:1632 ; 4-byte Folded Spill +; CHECK-NEXT: s_add_i32 s6, s32, 0x50000 +; CHECK-NEXT: buffer_store_dword v63, off, s[0:3], s6 ; 4-byte Folded Spill ; CHECK-NEXT: s_mov_b64 exec, s[4:5] ; CHECK-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:980 ; 4-byte Folded Spill ; CHECK-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:976 ; 4-byte Folded Spill @@ -75,248 +76,264 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: v_writelane_b32 v63, s55, 13 ; CHECK-NEXT: v_writelane_b32 v63, s30, 14 ; CHECK-NEXT: v_writelane_b32 v63, s31, 15 -; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1264 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1424 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1268 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1428 ; 4-byte Folded Spill ; CHECK-NEXT: v_mov_b32_e32 v30, v29 -; CHECK-NEXT: buffer_load_dword a43, off, s[0:3], s32 offset:368 -; CHECK-NEXT: buffer_load_dword a42, off, s[0:3], s32 offset:364 -; CHECK-NEXT: buffer_load_dword a41, off, s[0:3], s32 offset:360 -; CHECK-NEXT: buffer_load_dword a40, off, s[0:3], s32 offset:356 -; CHECK-NEXT: buffer_load_dword a39, off, s[0:3], s32 offset:352 -; CHECK-NEXT: buffer_load_dword a38, off, s[0:3], s32 offset:348 -; CHECK-NEXT: buffer_load_dword a37, off, s[0:3], s32 offset:344 -; CHECK-NEXT: buffer_load_dword a36, off, s[0:3], s32 offset:340 -; CHECK-NEXT: buffer_load_dword a35, off, s[0:3], s32 offset:336 -; CHECK-NEXT: buffer_load_dword a34, off, s[0:3], s32 offset:332 -; CHECK-NEXT: buffer_load_dword a33, off, s[0:3], s32 offset:328 -; CHECK-NEXT: buffer_load_dword a32, off, s[0:3], s32 offset:324 -; CHECK-NEXT: buffer_load_dword a31, off, s[0:3], s32 offset:320 -; CHECK-NEXT: buffer_load_dword a30, off, s[0:3], s32 offset:316 -; CHECK-NEXT: buffer_load_dword a29, off, s[0:3], s32 offset:312 -; CHECK-NEXT: buffer_load_dword a28, off, s[0:3], s32 offset:308 -; CHECK-NEXT: buffer_load_dword a27, off, s[0:3], s32 offset:304 -; CHECK-NEXT: buffer_load_dword a26, off, s[0:3], s32 offset:300 -; CHECK-NEXT: buffer_load_dword a25, off, s[0:3], s32 offset:296 -; CHECK-NEXT: buffer_load_dword a24, off, s[0:3], s32 offset:292 -; CHECK-NEXT: buffer_load_dword a23, off, s[0:3], s32 offset:288 -; CHECK-NEXT: buffer_load_dword a22, off, s[0:3], s32 offset:284 -; CHECK-NEXT: buffer_load_dword a21, off, s[0:3], s32 offset:280 -; CHECK-NEXT: buffer_load_dword a20, off, s[0:3], s32 offset:276 -; CHECK-NEXT: buffer_load_dword a19, off, s[0:3], s32 offset:272 -; CHECK-NEXT: buffer_load_dword a18, off, s[0:3], s32 offset:268 -; CHECK-NEXT: v_and_b32_e32 v17, 1, v17 -; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 1, v17 -; CHECK-NEXT: v_and_b32_e32 v16, 1, v16 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[56:57], 1, v16 +; CHECK-NEXT: buffer_load_dword a38, off, s[0:3], s32 offset:380 +; CHECK-NEXT: buffer_load_dword a37, off, s[0:3], s32 offset:376 +; CHECK-NEXT: buffer_load_dword a36, off, s[0:3], s32 offset:372 +; CHECK-NEXT: buffer_load_dword a35, off, s[0:3], s32 offset:368 +; CHECK-NEXT: buffer_load_dword a34, off, s[0:3], s32 offset:364 +; CHECK-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:788 +; CHECK-NEXT: buffer_load_dword a33, off, s[0:3], s32 offset:360 +; CHECK-NEXT: buffer_load_dword a32, off, s[0:3], s32 offset:356 +; CHECK-NEXT: buffer_load_dword a31, off, s[0:3], s32 offset:352 +; CHECK-NEXT: buffer_load_dword a30, off, s[0:3], s32 offset:348 +; CHECK-NEXT: buffer_load_dword a29, off, s[0:3], s32 offset:344 +; CHECK-NEXT: buffer_load_dword a28, off, s[0:3], s32 offset:340 +; CHECK-NEXT: buffer_load_dword a27, off, s[0:3], s32 offset:336 +; CHECK-NEXT: buffer_load_dword a26, off, s[0:3], s32 offset:332 +; CHECK-NEXT: buffer_load_dword a25, off, s[0:3], s32 offset:328 +; CHECK-NEXT: buffer_load_dword a24, off, s[0:3], s32 offset:324 +; CHECK-NEXT: buffer_load_dword a23, off, s[0:3], s32 offset:320 +; CHECK-NEXT: buffer_load_dword a22, off, s[0:3], s32 offset:316 +; CHECK-NEXT: buffer_load_dword a21, off, s[0:3], s32 offset:312 +; CHECK-NEXT: buffer_load_dword a20, off, s[0:3], s32 offset:308 +; CHECK-NEXT: buffer_load_dword a19, off, s[0:3], s32 offset:304 +; CHECK-NEXT: buffer_load_dword a18, off, s[0:3], s32 offset:300 +; CHECK-NEXT: buffer_load_dword a17, off, s[0:3], s32 offset:296 +; CHECK-NEXT: buffer_load_dword a16, off, s[0:3], s32 offset:292 +; CHECK-NEXT: buffer_load_dword a15, off, s[0:3], s32 offset:288 +; CHECK-NEXT: buffer_load_dword a14, off, s[0:3], s32 offset:284 +; CHECK-NEXT: buffer_load_dword a13, off, s[0:3], s32 offset:280 +; CHECK-NEXT: buffer_load_dword a12, off, s[0:3], s32 offset:276 +; CHECK-NEXT: buffer_load_dword a11, off, s[0:3], s32 offset:272 +; CHECK-NEXT: buffer_load_dword a10, off, s[0:3], s32 offset:268 +; CHECK-NEXT: v_and_b32_e32 v2, 1, v2 +; CHECK-NEXT: v_and_b32_e32 v7, 1, v7 +; CHECK-NEXT: v_and_b32_e32 v6, 1, v6 +; CHECK-NEXT: v_and_b32_e32 v5, 1, v5 +; CHECK-NEXT: v_and_b32_e32 v4, 1, v4 +; CHECK-NEXT: v_and_b32_e32 v3, 1, v3 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[36:37], 1, v2 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[90:91], 1, v7 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[92:93], 1, v6 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[94:95], 1, v5 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[30:31], 1, v4 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[34:35], 1, v3 +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:784 +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:780 ; CHECK-NEXT: s_mov_b64 s[48:49], 0 ; CHECK-NEXT: s_mov_b64 s[52:53], 0 -; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1400 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1432 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1404 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:1496 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1436 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:1144 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:1500 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:1148 ; 4-byte Folded Spill ; CHECK-NEXT: v_mov_b32_e32 v30, v27 -; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1408 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(30) +; CHECK-NEXT: v_cmp_lt_i32_e64 s[38:39], 2, v62 +; CHECK-NEXT: s_waitcnt vmcnt(4) +; CHECK-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:992 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:996 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1456 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1460 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1136 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1140 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v30, v25 +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1440 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1412 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1416 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1444 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:3304 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1420 ; 4-byte Folded Spill -; CHECK-NEXT: v_mov_b32_e32 v26, v25 -; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1432 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:3308 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v30, v23 +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1464 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1436 ; 4-byte Folded Spill -; CHECK-NEXT: v_mov_b32_e32 v26, v23 -; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1424 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1468 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:1448 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1428 ; 4-byte Folded Spill -; CHECK-NEXT: v_mov_b32_e32 v26, v21 -; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1440 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:1452 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v22, v21 +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:1472 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1444 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:1448 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:1476 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:1480 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:1452 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:1484 ; 4-byte Folded Spill ; CHECK-NEXT: v_mov_b32_e32 v20, v19 -; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:1456 ; 4-byte Folded Spill -; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:1460 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:1464 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:1468 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:992 ; 4-byte Folded Spill -; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:996 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_load_ushort v0, off, s[0:3], s32 offset:136 -; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_load_ushort v1, off, s[0:3], s32 offset:132 -; CHECK-NEXT: buffer_load_ushort v18, off, s[0:3], s32 offset:128 -; CHECK-NEXT: buffer_load_ushort v19, off, s[0:3], s32 offset:124 -; CHECK-NEXT: buffer_load_ushort v20, off, s[0:3], s32 offset:120 -; CHECK-NEXT: buffer_load_ushort v21, off, s[0:3], s32 offset:116 -; CHECK-NEXT: buffer_load_ushort v23, off, s[0:3], s32 offset:112 -; CHECK-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:108 -; CHECK-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:104 -; CHECK-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:100 -; CHECK-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:96 -; CHECK-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:92 -; CHECK-NEXT: buffer_load_ushort v26, off, s[0:3], s32 offset:88 -; CHECK-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:84 +; CHECK-NEXT: v_mov_b32_e32 v21, v9 +; CHECK-NEXT: v_mov_b32_e32 v19, v8 +; CHECK-NEXT: buffer_load_ushort v8, off, s[0:3], s32 offset:136 +; CHECK-NEXT: buffer_load_ushort v9, off, s[0:3], s32 offset:132 +; CHECK-NEXT: buffer_load_ushort v33, off, s[0:3], s32 offset:128 +; CHECK-NEXT: buffer_load_ushort v34, off, s[0:3], s32 offset:124 +; CHECK-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:120 +; CHECK-NEXT: buffer_load_ushort v36, off, s[0:3], s32 offset:116 +; CHECK-NEXT: buffer_load_ushort v37, off, s[0:3], s32 offset:112 +; CHECK-NEXT: buffer_load_ushort v38, off, s[0:3], s32 offset:108 +; CHECK-NEXT: buffer_load_ushort v39, off, s[0:3], s32 offset:104 +; CHECK-NEXT: buffer_load_ushort v48, off, s[0:3], s32 offset:100 +; CHECK-NEXT: buffer_load_ushort v22, off, s[0:3], s32 offset:96 +; CHECK-NEXT: buffer_load_ushort v27, off, s[0:3], s32 offset:92 +; CHECK-NEXT: buffer_load_ushort v29, off, s[0:3], s32 offset:88 +; CHECK-NEXT: buffer_load_ushort v25, off, s[0:3], s32 offset:84 ; CHECK-NEXT: buffer_load_ushort v31, off, s[0:3], s32 offset:80 -; CHECK-NEXT: buffer_load_ushort v35, off, s[0:3], s32 offset:76 -; CHECK-NEXT: s_waitcnt vmcnt(15) -; CHECK-NEXT: v_and_b32_e32 v0, 1, v0 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[40:41], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v15 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[58:59], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v14 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[60:61], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v13 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[62:63], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v12 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[72:73], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v11 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[74:75], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v10 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[76:77], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v9 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[78:79], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v8 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[88:89], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v7 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[90:91], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v6 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[92:93], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v5 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[94:95], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v4 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[30:31], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v3 -; CHECK-NEXT: s_waitcnt vmcnt(14) -; CHECK-NEXT: v_and_b32_e32 v1, 1, v1 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[34:35], 1, v0 -; CHECK-NEXT: v_and_b32_e32 v0, 1, v2 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[44:45], 1, v1 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[36:37], 1, v0 -; CHECK-NEXT: buffer_load_dword a49, off, s[0:3], s32 offset:392 -; CHECK-NEXT: buffer_load_dword a48, off, s[0:3], s32 offset:388 -; CHECK-NEXT: buffer_load_dword a47, off, s[0:3], s32 offset:384 -; CHECK-NEXT: buffer_load_dword a46, off, s[0:3], s32 offset:380 -; CHECK-NEXT: buffer_load_dword a45, off, s[0:3], s32 offset:376 -; CHECK-NEXT: buffer_load_dword a44, off, s[0:3], s32 offset:372 -; CHECK-NEXT: buffer_load_ubyte v1, off, s[0:3], s32 offset:792 -; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:788 -; CHECK-NEXT: s_waitcnt vmcnt(21) -; CHECK-NEXT: v_and_b32_e32 v17, 1, v18 -; CHECK-NEXT: s_waitcnt vmcnt(20) -; CHECK-NEXT: v_and_b32_e32 v18, 1, v19 -; CHECK-NEXT: s_waitcnt vmcnt(19) -; CHECK-NEXT: v_and_b32_e32 v19, 1, v20 -; CHECK-NEXT: s_waitcnt vmcnt(18) -; CHECK-NEXT: v_and_b32_e32 v20, 1, v21 -; CHECK-NEXT: s_waitcnt vmcnt(17) -; CHECK-NEXT: v_and_b32_e32 v21, 1, v23 -; CHECK-NEXT: s_waitcnt vmcnt(16) -; CHECK-NEXT: v_and_b32_e32 v23, 1, v32 -; CHECK-NEXT: s_waitcnt vmcnt(15) -; CHECK-NEXT: v_and_b32_e32 v32, 1, v25 -; CHECK-NEXT: s_waitcnt vmcnt(14) -; CHECK-NEXT: v_and_b32_e32 v25, 1, v33 -; CHECK-NEXT: s_waitcnt vmcnt(13) -; CHECK-NEXT: v_and_b32_e32 v33, 1, v27 -; CHECK-NEXT: s_waitcnt vmcnt(12) -; CHECK-NEXT: v_and_b32_e32 v27, 1, v34 -; CHECK-NEXT: s_waitcnt vmcnt(11) -; CHECK-NEXT: v_and_b32_e32 v34, 1, v26 -; CHECK-NEXT: s_waitcnt vmcnt(10) -; CHECK-NEXT: v_and_b32_e32 v26, 1, v29 -; CHECK-NEXT: s_waitcnt vmcnt(9) -; CHECK-NEXT: v_and_b32_e32 v29, 1, v31 -; CHECK-NEXT: s_waitcnt vmcnt(8) -; CHECK-NEXT: v_and_b32_e32 v31, 1, v35 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[14:15], 1, v32 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[10:11], 1, v33 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[6:7], 1, v34 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], 1, v31 -; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:264 -; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:260 -; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:256 -; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:252 -; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:248 -; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:244 -; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:240 -; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:236 -; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:232 -; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:228 -; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:224 -; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:220 -; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:216 -; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:212 -; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:208 -; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:204 -; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:200 -; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:196 -; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:192 -; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:188 -; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:184 -; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:180 -; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:176 -; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:172 -; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:168 -; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:164 -; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:160 -; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:156 -; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:152 -; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:148 -; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:144 -; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:140 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[42:43], 1, v18 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[28:29], 1, v20 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[26:27], 1, v17 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[22:23], 1, v19 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[18:19], 1, v21 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[24:25], 1, v23 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[20:21], 1, v25 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[16:17], 1, v27 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[12:13], 1, v26 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[8:9], 1, v29 -; CHECK-NEXT: buffer_store_dword a18, off, s[0:3], s32 offset:1136 ; 4-byte Folded Spill -; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword a19, off, s[0:3], s32 offset:1140 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a20, off, s[0:3], s32 offset:1144 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a21, off, s[0:3], s32 offset:1148 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a22, off, s[0:3], s32 offset:1152 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a23, off, s[0:3], s32 offset:1156 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a24, off, s[0:3], s32 offset:1160 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a25, off, s[0:3], s32 offset:1164 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a26, off, s[0:3], s32 offset:1168 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a27, off, s[0:3], s32 offset:1172 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a28, off, s[0:3], s32 offset:1176 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a29, off, s[0:3], s32 offset:1180 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a30, off, s[0:3], s32 offset:1184 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a31, off, s[0:3], s32 offset:1188 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a32, off, s[0:3], s32 offset:1192 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a33, off, s[0:3], s32 offset:1196 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a34, off, s[0:3], s32 offset:1200 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a35, off, s[0:3], s32 offset:1204 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a36, off, s[0:3], s32 offset:1208 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a37, off, s[0:3], s32 offset:1212 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a38, off, s[0:3], s32 offset:1216 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a39, off, s[0:3], s32 offset:1220 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a40, off, s[0:3], s32 offset:1224 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a41, off, s[0:3], s32 offset:1228 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a42, off, s[0:3], s32 offset:1232 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a43, off, s[0:3], s32 offset:1236 ; 4-byte Folded Spill -; CHECK-NEXT: s_waitcnt vmcnt(60) -; CHECK-NEXT: buffer_store_dword a44, off, s[0:3], s32 offset:1240 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a45, off, s[0:3], s32 offset:1244 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a46, off, s[0:3], s32 offset:1248 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a47, off, s[0:3], s32 offset:1252 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a48, off, s[0:3], s32 offset:1256 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword a49, off, s[0:3], s32 offset:1260 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_load_dword a30, off, s[0:3], s32 offset:712 +; CHECK-NEXT: buffer_load_ushort v32, off, s[0:3], s32 offset:76 +; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:8 +; CHECK-NEXT: buffer_load_dword a41, off, s[0:3], s32 offset:392 +; CHECK-NEXT: buffer_load_dword a40, off, s[0:3], s32 offset:388 +; CHECK-NEXT: buffer_load_dword a39, off, s[0:3], s32 offset:384 +; CHECK-NEXT: buffer_load_ubyte v23, off, s[0:3], s32 offset:792 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword a10, off, s[0:3], s32 offset:1168 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword a11, off, s[0:3], s32 offset:1172 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a12, off, s[0:3], s32 offset:1176 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a13, off, s[0:3], s32 offset:1180 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a14, off, s[0:3], s32 offset:1184 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a15, off, s[0:3], s32 offset:1188 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a16, off, s[0:3], s32 offset:1192 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a17, off, s[0:3], s32 offset:1196 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a18, off, s[0:3], s32 offset:1200 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a19, off, s[0:3], s32 offset:1204 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a20, off, s[0:3], s32 offset:1208 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a21, off, s[0:3], s32 offset:1212 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a22, off, s[0:3], s32 offset:1216 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a23, off, s[0:3], s32 offset:1220 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a24, off, s[0:3], s32 offset:1224 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a25, off, s[0:3], s32 offset:1228 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a26, off, s[0:3], s32 offset:1232 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a27, off, s[0:3], s32 offset:1236 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a28, off, s[0:3], s32 offset:1240 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a29, off, s[0:3], s32 offset:1244 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a30, off, s[0:3], s32 offset:1248 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a31, off, s[0:3], s32 offset:1252 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a32, off, s[0:3], s32 offset:1256 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a33, off, s[0:3], s32 offset:1260 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a34, off, s[0:3], s32 offset:1264 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a35, off, s[0:3], s32 offset:1268 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a36, off, s[0:3], s32 offset:1272 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a37, off, s[0:3], s32 offset:1276 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a38, off, s[0:3], s32 offset:1280 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(30) +; CHECK-NEXT: buffer_store_dword a39, off, s[0:3], s32 offset:1284 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a40, off, s[0:3], s32 offset:1288 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a41, off, s[0:3], s32 offset:1292 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:1160 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:1164 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:4 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_load_dword a31, off, s[0:3], s32 offset:264 +; CHECK-NEXT: buffer_load_dword a30, off, s[0:3], s32 offset:260 +; CHECK-NEXT: buffer_load_dword a29, off, s[0:3], s32 offset:256 +; CHECK-NEXT: buffer_load_dword a28, off, s[0:3], s32 offset:252 +; CHECK-NEXT: buffer_load_dword a27, off, s[0:3], s32 offset:248 +; CHECK-NEXT: buffer_load_dword a26, off, s[0:3], s32 offset:244 +; CHECK-NEXT: buffer_load_dword a25, off, s[0:3], s32 offset:240 +; CHECK-NEXT: buffer_load_dword a24, off, s[0:3], s32 offset:236 +; CHECK-NEXT: buffer_load_dword a23, off, s[0:3], s32 offset:232 +; CHECK-NEXT: buffer_load_dword a22, off, s[0:3], s32 offset:228 +; CHECK-NEXT: buffer_load_dword a21, off, s[0:3], s32 offset:224 +; CHECK-NEXT: buffer_load_dword a20, off, s[0:3], s32 offset:220 +; CHECK-NEXT: buffer_load_dword a19, off, s[0:3], s32 offset:216 +; CHECK-NEXT: buffer_load_dword a18, off, s[0:3], s32 offset:212 +; CHECK-NEXT: buffer_load_dword a17, off, s[0:3], s32 offset:208 +; CHECK-NEXT: buffer_load_dword a16, off, s[0:3], s32 offset:204 +; CHECK-NEXT: buffer_load_dword a15, off, s[0:3], s32 offset:200 +; CHECK-NEXT: buffer_load_dword a14, off, s[0:3], s32 offset:196 +; CHECK-NEXT: buffer_load_dword a13, off, s[0:3], s32 offset:192 +; CHECK-NEXT: buffer_load_dword a12, off, s[0:3], s32 offset:188 +; CHECK-NEXT: buffer_load_dword a11, off, s[0:3], s32 offset:184 +; CHECK-NEXT: buffer_load_dword a10, off, s[0:3], s32 offset:180 +; CHECK-NEXT: buffer_load_dword a9, off, s[0:3], s32 offset:176 +; CHECK-NEXT: buffer_load_dword a8, off, s[0:3], s32 offset:172 +; CHECK-NEXT: buffer_load_dword a7, off, s[0:3], s32 offset:168 +; CHECK-NEXT: buffer_load_dword a6, off, s[0:3], s32 offset:164 +; CHECK-NEXT: buffer_load_dword a5, off, s[0:3], s32 offset:160 +; CHECK-NEXT: buffer_load_dword a4, off, s[0:3], s32 offset:156 +; CHECK-NEXT: buffer_load_dword a3, off, s[0:3], s32 offset:152 +; CHECK-NEXT: buffer_load_dword a2, off, s[0:3], s32 offset:148 +; CHECK-NEXT: buffer_load_dword a1, off, s[0:3], s32 offset:144 +; CHECK-NEXT: buffer_load_dword a0, off, s[0:3], s32 offset:140 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v8 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v22 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[24:25], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v27 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[28:29], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v29 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[26:27], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v9, 1, v9 +; CHECK-NEXT: s_waitcnt vmcnt(62) +; CHECK-NEXT: v_and_b32_e32 v2, 1, v23 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[6:7], 1, v9 +; CHECK-NEXT: v_cmp_ne_u32_e64 s[46:47], 1, v2 +; CHECK-NEXT: v_and_b32_e32 v33, 1, v33 +; CHECK-NEXT: v_and_b32_e32 v34, 1, v34 +; CHECK-NEXT: v_and_b32_e32 v35, 1, v35 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[8:9], 1, v33 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[14:15], 1, v34 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[10:11], 1, v35 +; CHECK-NEXT: v_and_b32_e32 v36, 1, v36 +; CHECK-NEXT: v_and_b32_e32 v37, 1, v37 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[18:19], 1, v36 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[12:13], 1, v37 +; CHECK-NEXT: v_and_b32_e32 v38, 1, v38 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[20:21], 1, v38 +; CHECK-NEXT: v_and_b32_e32 v39, 1, v39 +; CHECK-NEXT: v_and_b32_e32 v48, 1, v48 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[16:17], 1, v39 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[22:23], 1, v48 +; CHECK-NEXT: s_waitcnt vmcnt(1) +; CHECK-NEXT: buffer_store_dword a0, off, s[0:3], s32 offset:1296 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword a1, off, s[0:3], s32 offset:1300 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a2, off, s[0:3], s32 offset:1304 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a3, off, s[0:3], s32 offset:1308 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a4, off, s[0:3], s32 offset:1312 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a5, off, s[0:3], s32 offset:1316 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a6, off, s[0:3], s32 offset:1320 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a7, off, s[0:3], s32 offset:1324 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a8, off, s[0:3], s32 offset:1328 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a9, off, s[0:3], s32 offset:1332 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a10, off, s[0:3], s32 offset:1336 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a11, off, s[0:3], s32 offset:1340 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a12, off, s[0:3], s32 offset:1344 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a13, off, s[0:3], s32 offset:1348 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a14, off, s[0:3], s32 offset:1352 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a15, off, s[0:3], s32 offset:1356 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a16, off, s[0:3], s32 offset:1360 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a17, off, s[0:3], s32 offset:1364 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a18, off, s[0:3], s32 offset:1368 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a19, off, s[0:3], s32 offset:1372 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a20, off, s[0:3], s32 offset:1376 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a21, off, s[0:3], s32 offset:1380 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a22, off, s[0:3], s32 offset:1384 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a23, off, s[0:3], s32 offset:1388 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a24, off, s[0:3], s32 offset:1392 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a25, off, s[0:3], s32 offset:1396 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a26, off, s[0:3], s32 offset:1400 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a27, off, s[0:3], s32 offset:1404 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a28, off, s[0:3], s32 offset:1408 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a29, off, s[0:3], s32 offset:1412 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a30, off, s[0:3], s32 offset:1416 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword a31, off, s[0:3], s32 offset:1420 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:1152 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:1156 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(34) +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1128 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1132 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword a30, off, s[0:3], s32 offset:712 ; CHECK-NEXT: buffer_load_dword a28, off, s[0:3], s32 offset:708 ; CHECK-NEXT: buffer_load_dword a26, off, s[0:3], s32 offset:704 ; CHECK-NEXT: buffer_load_dword a24, off, s[0:3], s32 offset:700 @@ -330,61 +347,628 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: buffer_load_dword a8, off, s[0:3], s32 offset:668 ; CHECK-NEXT: buffer_load_dword a6, off, s[0:3], s32 offset:664 ; CHECK-NEXT: buffer_load_dword a4, off, s[0:3], s32 offset:660 -; CHECK-NEXT: ; kill: def $agpr1 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr3 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr5 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr7 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr9 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr11 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr13 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr15 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr17 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr19 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr21 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr23 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr25 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr27 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr29 killed $sgpr4 killed $exec -; CHECK-NEXT: ; kill: def $agpr31 killed $sgpr4 killed $exec ; CHECK-NEXT: buffer_load_dword a2, off, s[0:3], s32 offset:656 ; CHECK-NEXT: buffer_load_dword a0, off, s[0:3], s32 offset:652 -; CHECK-NEXT: s_waitcnt vmcnt(48) -; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1272 ; 4-byte Folded Spill -; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1276 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:1280 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:1284 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:1288 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:1292 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:1296 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:1300 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:1304 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:1308 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:1312 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:1316 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:1320 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:1324 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:1328 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:1332 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:1336 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:1340 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:1344 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:1348 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:1352 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:1356 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:1360 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:1364 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:1368 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:1372 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:1376 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:1380 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:1384 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:1388 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:1392 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:1396 ; 4-byte Folded Spill -; CHECK-NEXT: v_and_b32_e32 v1, 1, v1 -; CHECK-NEXT: v_cmp_ne_u32_e64 s[46:47], 1, v1 -; CHECK-NEXT: s_waitcnt vmcnt(32) +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:584 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v25 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[42:43], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v31 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[40:41], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v32 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[44:45], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v17 +; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v16 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[56:57], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v15 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[58:59], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v14 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[60:61], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v13 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[62:63], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v12 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[72:73], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v11 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[74:75], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v10 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[76:77], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v21 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[78:79], 1, v8 +; CHECK-NEXT: v_and_b32_e32 v8, 1, v19 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[88:89], 1, v8 +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:3176 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:3180 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:3184 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:3188 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:3192 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:3196 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:3200 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:3204 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:3208 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:3212 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:3216 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:3220 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:3224 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:3228 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:3232 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:3236 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:3240 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:3244 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:3248 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:3252 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:3256 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:3260 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:3264 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:3268 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:3272 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:3276 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:3280 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:3284 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:3288 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:3292 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(30) +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:3296 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:3300 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:580 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:576 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:3048 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:3052 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:3056 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:3060 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:3064 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:3068 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:3072 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:3076 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:3080 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:3084 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:3088 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:3092 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:3096 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:3100 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:3104 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:3108 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:3112 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:3116 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:3120 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:3124 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:3128 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:3132 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:3136 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:3140 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:3144 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:3148 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(26) +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:3152 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:3156 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:3160 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:3164 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:3168 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:3172 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:572 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:2920 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:2924 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:2928 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:2932 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:2936 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:2940 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:2944 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:2948 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:2952 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:2956 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:2960 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:2964 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:2968 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:2972 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:2976 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:2980 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:2984 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:2988 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:2992 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:2996 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:3000 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:3004 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:3008 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:3012 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(24) +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:3016 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:3020 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:3024 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:3028 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:3032 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:3036 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:3040 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:3044 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:568 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:2792 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:2796 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:2800 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:2804 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:2808 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:2812 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:2816 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:2820 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:2824 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:2828 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:2832 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:2836 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:2840 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:2844 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:2848 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:2852 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:2856 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:2860 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:2864 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:2868 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:2872 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:2876 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(22) +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:2880 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:2884 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:2888 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:2892 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:2896 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:2900 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:2904 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:2908 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:2912 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:2916 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:564 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:2664 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:2668 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:2672 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:2676 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:2680 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:2684 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:2688 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:2692 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:2696 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:2700 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:2704 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:2708 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:2712 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:2716 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:2720 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:2724 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:2728 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:2732 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:2736 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:2740 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(20) +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:2744 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:2748 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:2752 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:2756 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:2760 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:2764 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:2768 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:2772 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:2776 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:2780 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:2784 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:2788 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:560 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:2536 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:2540 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:2544 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:2548 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:2552 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:2556 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:2560 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:2564 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:2568 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:2572 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:2576 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:2580 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:2584 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:2588 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:2592 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:2596 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:2600 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:2604 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(18) +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:2608 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:2612 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:2616 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:2620 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:2624 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:2628 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:2632 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:2636 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:2640 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:2644 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:2648 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:2652 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:2656 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:2660 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:556 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:2280 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:2284 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:2288 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:2292 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:2296 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:2300 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:2304 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:2308 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:2312 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:2316 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:2320 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:2324 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:2328 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:2332 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:2336 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:2340 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(16) +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:2344 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:2348 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:2352 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:2356 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:2360 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:2364 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:2368 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:2372 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:2376 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:2380 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:2384 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:2388 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:2392 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:2396 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:2400 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:2404 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:552 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:3312 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:3316 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:3320 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:3324 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:3328 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:3332 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:3336 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:3340 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:3344 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:3348 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:3352 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:3356 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:3360 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:3364 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(14) +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:3368 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:3372 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:3376 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:3380 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:3384 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:3388 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:3392 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:3396 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:3400 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:3404 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:3408 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:3412 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:3416 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:3420 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:3424 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:3428 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:3432 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:3436 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:548 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:3440 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:3444 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:3448 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:3452 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:3456 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:3460 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:3464 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:3468 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:3472 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:3476 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:3480 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:3484 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(12) +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:3488 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:3492 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:3496 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:3500 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:3504 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:3508 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:3512 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:3516 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:3520 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:3524 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:3528 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:3532 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:3536 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:3540 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:3544 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:3548 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:3552 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:3556 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:3560 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:3564 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:544 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:2408 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:2412 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:2416 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:2420 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:2424 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:2428 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:2432 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:2436 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:2440 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:2444 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(10) +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:2448 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:2452 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:2456 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:2460 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:2464 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:2468 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:2472 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:2476 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:2480 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:2484 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:2488 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:2492 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:2496 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:2500 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:2504 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:2508 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:2512 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:2516 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:2520 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:2524 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:2528 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:2532 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:540 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:2024 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:2028 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:2032 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:2036 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:2040 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:2044 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:2048 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:2052 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(8) +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:2056 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:2060 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:2064 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:2068 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:2072 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:2076 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:2080 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:2084 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:2088 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:2092 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:2096 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:2100 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:2104 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:2108 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:2112 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:2116 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:2120 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:2124 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:2128 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:2132 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:2136 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:2140 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:2144 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:2148 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:2152 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:2156 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:2160 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:2164 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:2168 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:2172 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(6) +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:2176 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:2180 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:2184 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:2188 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:2192 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:2196 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:2200 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:2204 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:2208 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:2212 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:2216 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:2220 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:2224 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:2228 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:2232 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:2236 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:2240 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:2244 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:2248 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:2252 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:2256 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:2260 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:2264 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:2268 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:2272 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:2276 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:532 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:1896 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:1900 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1904 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:1908 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(4) +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1912 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1916 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:1920 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:1924 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:1928 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:1932 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:1936 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:1940 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:1944 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:1948 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:1952 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:1956 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:1960 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:1964 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:1968 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:1972 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:1976 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:1980 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:1984 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:1988 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:1992 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:1996 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:2000 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:2004 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:2008 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:2012 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:2016 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:2020 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:528 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:1768 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:1772 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(2) +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1776 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:1780 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1784 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1788 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:1792 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:1796 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:1800 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:1804 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:1808 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:1812 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:1816 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:1820 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:1824 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:1828 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:1832 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:1836 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:1840 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:1844 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:1848 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:1852 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:1856 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:1860 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:1864 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:1868 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1872 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1876 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:1880 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:1884 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1888 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1892 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1488 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:1492 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1496 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1500 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:1504 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:1508 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:1512 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:1516 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:1520 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:1524 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:1528 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:1532 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:1536 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:1540 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:1544 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:1548 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:1552 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:1556 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:1560 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:1564 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:1568 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:1572 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:1576 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:1580 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1584 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1588 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:1592 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:1596 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1600 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1604 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:1608 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:1612 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:456 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:1616 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:1620 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1624 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:1628 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1632 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1636 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:1640 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:1644 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:1648 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:1652 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:1656 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:1660 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:1664 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:1668 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:1672 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:1676 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:1680 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:1684 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:1688 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:1692 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:1696 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:1700 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:1704 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:1708 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:1712 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:1716 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1720 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1724 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:1728 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:1732 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(30) +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1736 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1740 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:452 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:448 +; CHECK-NEXT: buffer_load_dword a44, off, s[0:3], s32 offset:444 +; CHECK-NEXT: buffer_load_dword a42, off, s[0:3], s32 offset:440 +; CHECK-NEXT: buffer_load_dword a46, off, s[0:3], s32 offset:436 +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:432 +; CHECK-NEXT: buffer_load_dword a40, off, s[0:3], s32 offset:428 +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:424 +; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 +; CHECK-NEXT: buffer_load_dword a54, off, s[0:3], s32 offset:416 +; CHECK-NEXT: buffer_load_dword a58, off, s[0:3], s32 offset:412 +; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:408 +; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:404 +; CHECK-NEXT: buffer_load_dword a62, off, s[0:3], s32 offset:400 +; CHECK-NEXT: buffer_load_dword a60, off, s[0:3], s32 offset:396 +; CHECK-NEXT: s_nop 0 ; CHECK-NEXT: buffer_store_dword a0, off, s[0:3], s32 offset:1000 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 ; CHECK-NEXT: buffer_store_dword a1, off, s[0:3], s32 offset:1004 ; 4-byte Folded Spill @@ -418,392 +1002,1828 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: buffer_store_dword a29, off, s[0:3], s32 offset:1116 ; 4-byte Folded Spill ; CHECK-NEXT: buffer_store_dword a30, off, s[0:3], s32 offset:1120 ; 4-byte Folded Spill ; CHECK-NEXT: buffer_store_dword a31, off, s[0:3], s32 offset:1124 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:412 -; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_load_dword a6, off, s[0:3], s32 offset:408 -; CHECK-NEXT: buffer_load_dword a20, off, s[0:3], s32 offset:416 -; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:404 -; CHECK-NEXT: buffer_load_dword a22, off, s[0:3], s32 offset:420 -; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:400 -; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:396 -; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:424 -; CHECK-NEXT: buffer_load_dword a32, off, s[0:3], s32 offset:440 -; CHECK-NEXT: buffer_load_dword a34, off, s[0:3], s32 offset:436 -; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1472 ; 4-byte Folded Spill +; CHECK-NEXT: ; kill: def $vgpr3 killed $sgpr4 killed $exec +; CHECK-NEXT: s_waitcnt vmcnt(38) +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:3696 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:1476 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_load_dword a24, off, s[0:3], s32 offset:432 +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:3700 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(37) +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:3704 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:3708 ; 4-byte Folded Spill +; CHECK-NEXT: s_waitcnt vmcnt(38) +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:3712 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:3716 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:3720 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:3724 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:3728 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:3732 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:3736 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:3740 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:3744 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:3748 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:3752 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:3756 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:3760 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:3764 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:3768 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:3772 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:3776 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:3780 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:3784 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:3788 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:3792 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:3796 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:3800 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:3804 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:3808 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:3812 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:3816 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:3820 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:3568 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1480 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:3572 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:3576 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:3580 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:3584 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:3588 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:3592 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:3596 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:3600 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:3604 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:3608 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:3612 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:3616 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:3620 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:3624 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:3628 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:3632 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:3636 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:3640 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:3644 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:3648 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:3652 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:3656 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:3660 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:3664 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:3668 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:3672 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:3676 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:3680 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:3684 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:3688 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:3692 ; 4-byte Folded Spill +; CHECK-NEXT: ; kill: def $vgpr7 killed $sgpr4 killed $exec +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:3824 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:1484 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:428 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:3828 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:3832 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:3836 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:3840 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:3844 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:3848 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:3852 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:3856 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:3860 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:3864 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:3868 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:3872 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:3876 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:3880 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:3884 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:3888 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:3892 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:3896 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:3900 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:3904 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:3908 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:3912 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:3916 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:3920 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:3924 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:3928 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:3932 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:3936 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:3940 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:3944 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:3948 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v32, 0x1378 +; CHECK-NEXT: buffer_store_dword v0, v32, s[0:3], s32 offen ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1488 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v1, v32, s[0:3], s32 offen offset:4 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, v32, s[0:3], s32 offen offset:8 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, v32, s[0:3], s32 offen offset:12 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, v32, s[0:3], s32 offen offset:16 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, v32, s[0:3], s32 offen offset:20 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, v32, s[0:3], s32 offen offset:24 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, v32, s[0:3], s32 offen offset:28 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, v32, s[0:3], s32 offen offset:32 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, v32, s[0:3], s32 offen offset:36 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, v32, s[0:3], s32 offen offset:40 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, v32, s[0:3], s32 offen offset:44 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, v32, s[0:3], s32 offen offset:48 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, v32, s[0:3], s32 offen offset:52 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, v32, s[0:3], s32 offen offset:56 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, v32, s[0:3], s32 offen offset:60 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, v32, s[0:3], s32 offen offset:64 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, v32, s[0:3], s32 offen offset:68 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, v32, s[0:3], s32 offen offset:72 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, v32, s[0:3], s32 offen offset:76 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, v32, s[0:3], s32 offen offset:80 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, v32, s[0:3], s32 offen offset:84 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, v32, s[0:3], s32 offen offset:88 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, v32, s[0:3], s32 offen offset:92 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, v32, s[0:3], s32 offen offset:96 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, v32, s[0:3], s32 offen offset:100 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, v32, s[0:3], s32 offen offset:104 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, v32, s[0:3], s32 offen offset:108 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, v32, s[0:3], s32 offen offset:112 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, v32, s[0:3], s32 offen offset:116 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, v32, s[0:3], s32 offen offset:120 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, v32, s[0:3], s32 offen offset:124 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v32, 0xff0 +; CHECK-NEXT: buffer_store_dword v0, v32, s[0:3], s32 offen ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:1492 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:784 +; CHECK-NEXT: buffer_store_dword v1, v32, s[0:3], s32 offen offset:4 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, v32, s[0:3], s32 offen offset:8 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, v32, s[0:3], s32 offen offset:12 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, v32, s[0:3], s32 offen offset:16 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, v32, s[0:3], s32 offen offset:20 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, v32, s[0:3], s32 offen offset:24 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, v32, s[0:3], s32 offen offset:28 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, v32, s[0:3], s32 offen offset:32 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, v32, s[0:3], s32 offen offset:36 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, v32, s[0:3], s32 offen offset:40 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, v32, s[0:3], s32 offen offset:44 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, v32, s[0:3], s32 offen offset:48 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, v32, s[0:3], s32 offen offset:52 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, v32, s[0:3], s32 offen offset:56 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, v32, s[0:3], s32 offen offset:60 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, v32, s[0:3], s32 offen offset:64 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, v32, s[0:3], s32 offen offset:68 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, v32, s[0:3], s32 offen offset:72 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, v32, s[0:3], s32 offen offset:76 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, v32, s[0:3], s32 offen offset:80 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, v32, s[0:3], s32 offen offset:84 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, v32, s[0:3], s32 offen offset:88 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, v32, s[0:3], s32 offen offset:92 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, v32, s[0:3], s32 offen offset:96 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, v32, s[0:3], s32 offen offset:100 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, v32, s[0:3], s32 offen offset:104 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, v32, s[0:3], s32 offen offset:108 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, v32, s[0:3], s32 offen offset:112 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, v32, s[0:3], s32 offen offset:116 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, v32, s[0:3], s32 offen offset:120 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, v32, s[0:3], s32 offen offset:124 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v32, 0x1070 +; CHECK-NEXT: buffer_store_dword v0, v32, s[0:3], s32 offen ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:780 -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:984 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v1, v32, s[0:3], s32 offen offset:4 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, v32, s[0:3], s32 offen offset:8 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, v32, s[0:3], s32 offen offset:12 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, v32, s[0:3], s32 offen offset:16 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, v32, s[0:3], s32 offen offset:20 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, v32, s[0:3], s32 offen offset:24 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, v32, s[0:3], s32 offen offset:28 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, v32, s[0:3], s32 offen offset:32 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, v32, s[0:3], s32 offen offset:36 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, v32, s[0:3], s32 offen offset:40 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, v32, s[0:3], s32 offen offset:44 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, v32, s[0:3], s32 offen offset:48 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, v32, s[0:3], s32 offen offset:52 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, v32, s[0:3], s32 offen offset:56 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, v32, s[0:3], s32 offen offset:60 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, v32, s[0:3], s32 offen offset:64 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, v32, s[0:3], s32 offen offset:68 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, v32, s[0:3], s32 offen offset:72 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, v32, s[0:3], s32 offen offset:76 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, v32, s[0:3], s32 offen offset:80 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, v32, s[0:3], s32 offen offset:84 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, v32, s[0:3], s32 offen offset:88 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, v32, s[0:3], s32 offen offset:92 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, v32, s[0:3], s32 offen offset:96 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, v32, s[0:3], s32 offen offset:100 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, v32, s[0:3], s32 offen offset:104 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, v32, s[0:3], s32 offen offset:108 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, v32, s[0:3], s32 offen offset:112 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, v32, s[0:3], s32 offen offset:116 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, v32, s[0:3], s32 offen offset:120 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, v32, s[0:3], s32 offen offset:124 ; 4-byte Folded Spill +; CHECK-NEXT: ; kill: def $vgpr15 killed $sgpr4 killed $exec +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:3952 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:988 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_load_dword a28, off, s[0:3], s32 offset:8 -; CHECK-NEXT: buffer_load_dword a26, off, s[0:3], s32 offset:4 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:3956 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:3960 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:3964 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:3968 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:3972 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:3976 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:3980 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:3984 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:3988 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:3992 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:3996 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:4000 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:4004 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:4008 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:4012 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:4016 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:4020 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:4024 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:4028 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:4032 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:4036 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:4040 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:4044 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:4048 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:4052 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:4056 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:4060 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:4064 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:4068 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:4072 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:4076 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v32, 0x1178 +; CHECK-NEXT: buffer_store_dword v0, v32, s[0:3], s32 offen ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1128 ; 4-byte Folded Spill -; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:1132 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_load_dword a30, off, s[0:3], s32 offset:456 -; CHECK-NEXT: buffer_load_dword a36, off, s[0:3], s32 offset:584 -; CHECK-NEXT: buffer_load_dword a40, off, s[0:3], s32 offset:580 -; CHECK-NEXT: buffer_load_dword a38, off, s[0:3], s32 offset:576 -; CHECK-NEXT: buffer_load_dword a42, off, s[0:3], s32 offset:572 -; CHECK-NEXT: buffer_load_dword a44, off, s[0:3], s32 offset:568 -; CHECK-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:564 -; CHECK-NEXT: buffer_load_dword a46, off, s[0:3], s32 offset:560 -; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:556 -; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:552 -; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:548 -; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:544 -; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:540 -; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:536 -; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:532 -; CHECK-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:528 +; CHECK-NEXT: buffer_store_dword v1, v32, s[0:3], s32 offen offset:4 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, v32, s[0:3], s32 offen offset:8 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, v32, s[0:3], s32 offen offset:12 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, v32, s[0:3], s32 offen offset:16 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, v32, s[0:3], s32 offen offset:20 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, v32, s[0:3], s32 offen offset:24 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, v32, s[0:3], s32 offen offset:28 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, v32, s[0:3], s32 offen offset:32 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, v32, s[0:3], s32 offen offset:36 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, v32, s[0:3], s32 offen offset:40 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, v32, s[0:3], s32 offen offset:44 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, v32, s[0:3], s32 offen offset:48 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, v32, s[0:3], s32 offen offset:52 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, v32, s[0:3], s32 offen offset:56 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, v32, s[0:3], s32 offen offset:60 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, v32, s[0:3], s32 offen offset:64 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, v32, s[0:3], s32 offen offset:68 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, v32, s[0:3], s32 offen offset:72 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, v32, s[0:3], s32 offen offset:76 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, v32, s[0:3], s32 offen offset:80 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, v32, s[0:3], s32 offen offset:84 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, v32, s[0:3], s32 offen offset:88 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, v32, s[0:3], s32 offen offset:92 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, v32, s[0:3], s32 offen offset:96 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, v32, s[0:3], s32 offen offset:100 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, v32, s[0:3], s32 offen offset:104 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, v32, s[0:3], s32 offen offset:108 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, v32, s[0:3], s32 offen offset:112 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, v32, s[0:3], s32 offen offset:116 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, v32, s[0:3], s32 offen offset:120 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, v32, s[0:3], s32 offen offset:124 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v32, 0x10f0 +; CHECK-NEXT: buffer_store_dword v0, v32, s[0:3], s32 offen ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:524 +; CHECK-NEXT: buffer_store_dword v1, v32, s[0:3], s32 offen offset:4 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, v32, s[0:3], s32 offen offset:8 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, v32, s[0:3], s32 offen offset:12 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, v32, s[0:3], s32 offen offset:16 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, v32, s[0:3], s32 offen offset:20 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, v32, s[0:3], s32 offen offset:24 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, v32, s[0:3], s32 offen offset:28 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, v32, s[0:3], s32 offen offset:32 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, v32, s[0:3], s32 offen offset:36 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, v32, s[0:3], s32 offen offset:40 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, v32, s[0:3], s32 offen offset:44 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, v32, s[0:3], s32 offen offset:48 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, v32, s[0:3], s32 offen offset:52 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, v32, s[0:3], s32 offen offset:56 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, v32, s[0:3], s32 offen offset:60 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, v32, s[0:3], s32 offen offset:64 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, v32, s[0:3], s32 offen offset:68 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, v32, s[0:3], s32 offen offset:72 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, v32, s[0:3], s32 offen offset:76 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, v32, s[0:3], s32 offen offset:80 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, v32, s[0:3], s32 offen offset:84 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, v32, s[0:3], s32 offen offset:88 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, v32, s[0:3], s32 offen offset:92 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, v32, s[0:3], s32 offen offset:96 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, v32, s[0:3], s32 offen offset:100 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, v32, s[0:3], s32 offen offset:104 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, v32, s[0:3], s32 offen offset:108 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, v32, s[0:3], s32 offen offset:112 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, v32, s[0:3], s32 offen offset:116 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, v32, s[0:3], s32 offen offset:120 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, v32, s[0:3], s32 offen offset:124 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v32, 0x1278 +; CHECK-NEXT: buffer_store_dword v0, v32, s[0:3], s32 offen ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:1504 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v1, v32, s[0:3], s32 offen offset:4 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, v32, s[0:3], s32 offen offset:8 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, v32, s[0:3], s32 offen offset:12 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, v32, s[0:3], s32 offen offset:16 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, v32, s[0:3], s32 offen offset:20 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, v32, s[0:3], s32 offen offset:24 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, v32, s[0:3], s32 offen offset:28 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, v32, s[0:3], s32 offen offset:32 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, v32, s[0:3], s32 offen offset:36 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, v32, s[0:3], s32 offen offset:40 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, v32, s[0:3], s32 offen offset:44 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, v32, s[0:3], s32 offen offset:48 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, v32, s[0:3], s32 offen offset:52 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, v32, s[0:3], s32 offen offset:56 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, v32, s[0:3], s32 offen offset:60 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, v32, s[0:3], s32 offen offset:64 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, v32, s[0:3], s32 offen offset:68 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, v32, s[0:3], s32 offen offset:72 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, v32, s[0:3], s32 offen offset:76 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, v32, s[0:3], s32 offen offset:80 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, v32, s[0:3], s32 offen offset:84 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, v32, s[0:3], s32 offen offset:88 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, v32, s[0:3], s32 offen offset:92 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, v32, s[0:3], s32 offen offset:96 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, v32, s[0:3], s32 offen offset:100 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, v32, s[0:3], s32 offen offset:104 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, v32, s[0:3], s32 offen offset:108 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, v32, s[0:3], s32 offen offset:112 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, v32, s[0:3], s32 offen offset:116 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, v32, s[0:3], s32 offen offset:120 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, v32, s[0:3], s32 offen offset:124 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v32, 0x11f8 +; CHECK-NEXT: buffer_store_dword v0, v32, s[0:3], s32 offen ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:1508 ; 4-byte Folded Spill -; CHECK-NEXT: s_waitcnt vmcnt(2) -; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1512 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:1516 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1520 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1524 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:1528 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:1532 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:1536 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:1540 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:1544 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:1548 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:1552 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:1556 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:1560 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:1564 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:1568 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:1572 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:1576 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:1580 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:1584 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:1588 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:1592 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:1596 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:1600 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:1604 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:1608 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:1612 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:1616 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:1620 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:1624 ; 4-byte Folded Spill -; CHECK-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:1628 ; 4-byte Folded Spill -; CHECK-NEXT: v_cmp_lt_i32_e64 s[38:39], 2, v0 +; CHECK-NEXT: buffer_store_dword v1, v32, s[0:3], s32 offen offset:4 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, v32, s[0:3], s32 offen offset:8 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, v32, s[0:3], s32 offen offset:12 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, v32, s[0:3], s32 offen offset:16 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, v32, s[0:3], s32 offen offset:20 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, v32, s[0:3], s32 offen offset:24 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, v32, s[0:3], s32 offen offset:28 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, v32, s[0:3], s32 offen offset:32 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, v32, s[0:3], s32 offen offset:36 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, v32, s[0:3], s32 offen offset:40 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, v32, s[0:3], s32 offen offset:44 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, v32, s[0:3], s32 offen offset:48 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, v32, s[0:3], s32 offen offset:52 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, v32, s[0:3], s32 offen offset:56 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, v32, s[0:3], s32 offen offset:60 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, v32, s[0:3], s32 offen offset:64 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, v32, s[0:3], s32 offen offset:68 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, v32, s[0:3], s32 offen offset:72 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, v32, s[0:3], s32 offen offset:76 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, v32, s[0:3], s32 offen offset:80 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, v32, s[0:3], s32 offen offset:84 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, v32, s[0:3], s32 offen offset:88 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, v32, s[0:3], s32 offen offset:92 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, v32, s[0:3], s32 offen offset:96 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, v32, s[0:3], s32 offen offset:100 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, v32, s[0:3], s32 offen offset:104 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, v32, s[0:3], s32 offen offset:108 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, v32, s[0:3], s32 offen offset:112 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, v32, s[0:3], s32 offen offset:116 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, v32, s[0:3], s32 offen offset:120 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, v32, s[0:3], s32 offen offset:124 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v32, 0x12f8 +; CHECK-NEXT: buffer_store_dword v0, v32, s[0:3], s32 offen ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, v32, s[0:3], s32 offen offset:4 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, v32, s[0:3], s32 offen offset:8 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v3, v32, s[0:3], s32 offen offset:12 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v4, v32, s[0:3], s32 offen offset:16 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v5, v32, s[0:3], s32 offen offset:20 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, v32, s[0:3], s32 offen offset:24 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, v32, s[0:3], s32 offen offset:28 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v8, v32, s[0:3], s32 offen offset:32 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v9, v32, s[0:3], s32 offen offset:36 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v10, v32, s[0:3], s32 offen offset:40 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v11, v32, s[0:3], s32 offen offset:44 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v12, v32, s[0:3], s32 offen offset:48 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v13, v32, s[0:3], s32 offen offset:52 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v14, v32, s[0:3], s32 offen offset:56 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v15, v32, s[0:3], s32 offen offset:60 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v16, v32, s[0:3], s32 offen offset:64 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v17, v32, s[0:3], s32 offen offset:68 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v18, v32, s[0:3], s32 offen offset:72 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v19, v32, s[0:3], s32 offen offset:76 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v20, v32, s[0:3], s32 offen offset:80 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v21, v32, s[0:3], s32 offen offset:84 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v22, v32, s[0:3], s32 offen offset:88 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v23, v32, s[0:3], s32 offen offset:92 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v24, v32, s[0:3], s32 offen offset:96 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v25, v32, s[0:3], s32 offen offset:100 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v26, v32, s[0:3], s32 offen offset:104 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v27, v32, s[0:3], s32 offen offset:108 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v28, v32, s[0:3], s32 offen offset:112 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v29, v32, s[0:3], s32 offen offset:116 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v30, v32, s[0:3], s32 offen offset:120 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v31, v32, s[0:3], s32 offen offset:124 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:1760 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:1764 ; 4-byte Folded Spill +; CHECK-NEXT: ; kill: def $vgpr5 killed $sgpr4 killed $exec +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:1752 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:1756 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1744 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:1748 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v2, 0x1170 +; CHECK-NEXT: buffer_store_dword v8, v2, s[0:3], s32 offen ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v9, v2, s[0:3], s32 offen offset:4 ; 4-byte Folded Spill +; CHECK-NEXT: v_mov_b32_e32 v2, 0x13f8 +; CHECK-NEXT: buffer_store_dword v10, v2, s[0:3], s32 offen ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v11, v2, s[0:3], s32 offen offset:4 ; 4-byte Folded Spill ; CHECK-NEXT: s_and_saveexec_b64 s[50:51], s[38:39] ; CHECK-NEXT: s_xor_b64 s[50:51], exec, s[50:51] ; CHECK-NEXT: s_cbranch_execz .LBB0_4 ; CHECK-NEXT: ; %bb.1: ; %LeafBlock46 -; CHECK-NEXT: v_cmp_eq_u32_e64 s[38:39], 3, v0 +; CHECK-NEXT: v_cmp_eq_u32_e64 s[38:39], 3, v62 ; CHECK-NEXT: s_mov_b64 s[54:55], -1 ; CHECK-NEXT: s_and_saveexec_b64 s[52:53], s[38:39] ; CHECK-NEXT: s_cbranch_execz .LBB0_3 ; CHECK-NEXT: ; %bb.2: ; %bb2 -; CHECK-NEXT: v_accvgpr_write_b32 a10, v42 -; CHECK-NEXT: v_accvgpr_write_b32 a14, v48 -; CHECK-NEXT: v_accvgpr_write_b32 a4, v56 -; CHECK-NEXT: v_accvgpr_write_b32 a2, v50 -; CHECK-NEXT: v_accvgpr_write_b32 a11, v43 -; CHECK-NEXT: v_accvgpr_write_b32 a8, v40 -; CHECK-NEXT: v_accvgpr_write_b32 a15, v49 -; CHECK-NEXT: v_accvgpr_write_b32 a5, v57 -; CHECK-NEXT: v_accvgpr_write_b32 a3, v51 -; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:1000 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1004 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:1008 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1012 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:1016 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1020 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1024 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:1028 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:1032 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:1036 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:1040 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:1044 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:1048 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:1052 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:1056 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:1060 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:1064 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:1068 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:1072 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:1076 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:1080 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:1084 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:1088 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:1092 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:1096 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:1100 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:1104 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:1108 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:1112 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:1116 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:1120 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:1124 ; 4-byte Folded Reload -; CHECK-NEXT: v_accvgpr_write_b32 a16, v58 -; CHECK-NEXT: v_accvgpr_write_b32 a17, v59 -; CHECK-NEXT: v_accvgpr_read_b32 v60, a36 -; CHECK-NEXT: v_accvgpr_read_b32 v58, a40 -; CHECK-NEXT: s_xor_b64 s[54:55], exec, -1 -; CHECK-NEXT: s_waitcnt vmcnt(29) -; CHECK-NEXT: v_xor_b32_e32 v28, v28, v18 -; CHECK-NEXT: s_waitcnt vmcnt(28) -; CHECK-NEXT: v_xor_b32_e32 v0, v29, v3 -; CHECK-NEXT: v_accvgpr_write_b32 a9, v0 -; CHECK-NEXT: v_accvgpr_read_b32 v29, a27 -; CHECK-NEXT: s_waitcnt vmcnt(26) -; CHECK-NEXT: v_xor_b32_e32 v29, v31, v29 -; CHECK-NEXT: s_waitcnt vmcnt(24) -; CHECK-NEXT: v_xor_b32_e32 v0, v33, v7 -; CHECK-NEXT: v_accvgpr_write_b32 a27, v0 -; CHECK-NEXT: v_xor_b32_e32 v0, v30, v4 -; CHECK-NEXT: v_accvgpr_write_b32 a12, v0 -; CHECK-NEXT: s_waitcnt vmcnt(20) -; CHECK-NEXT: v_xor_b32_e32 v62, v37, v11 -; CHECK-NEXT: v_xor_b32_e32 v0, v32, v6 -; CHECK-NEXT: v_xor_b32_e32 v32, v34, v8 -; CHECK-NEXT: v_xor_b32_e32 v34, v36, v10 -; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:984 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:988 ; 4-byte Folded Reload -; CHECK-NEXT: v_accvgpr_read_b32 v31, a39 -; CHECK-NEXT: v_accvgpr_read_b32 v30, a46 -; CHECK-NEXT: v_xor_b32_e32 v33, v35, v9 -; CHECK-NEXT: s_waitcnt vmcnt(20) -; CHECK-NEXT: v_xor_b32_e32 v35, v39, v13 -; CHECK-NEXT: s_waitcnt vmcnt(15) -; CHECK-NEXT: v_xor_b32_e32 v10, v44, v30 -; CHECK-NEXT: v_accvgpr_read_b32 v30, a44 -; CHECK-NEXT: s_waitcnt vmcnt(11) -; CHECK-NEXT: v_xor_b32_e32 v6, v48, v30 -; CHECK-NEXT: v_accvgpr_read_b32 v30, a42 -; CHECK-NEXT: v_xor_b32_e32 v9, v47, v21 -; CHECK-NEXT: s_waitcnt vmcnt(8) -; CHECK-NEXT: v_xor_b32_e32 v21, v51, v25 +; CHECK-NEXT: v_accvgpr_write_b32 a57, v39 +; CHECK-NEXT: v_accvgpr_write_b32 a56, v38 +; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:1000 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:1004 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:1008 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:1012 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:1016 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1020 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:1024 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1028 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:1032 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1036 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1040 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:1044 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:1048 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:1052 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:1056 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:1060 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:1064 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:1068 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:1072 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:1076 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:1080 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:1084 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:1088 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:1092 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:1096 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:1100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:1104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:1108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:1112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:1116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:1120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:1124 ; 4-byte Folded Reload +; CHECK-NEXT: v_accvgpr_write_b32 a48, v60 +; CHECK-NEXT: v_accvgpr_write_b32 a49, v61 +; CHECK-NEXT: v_accvgpr_write_b32 a37, v1 ; CHECK-NEXT: v_accvgpr_write_b32 a36, v0 -; CHECK-NEXT: s_waitcnt vmcnt(6) -; CHECK-NEXT: v_xor_b32_e32 v13, v53, v31 -; CHECK-NEXT: v_accvgpr_read_b32 v31, a29 +; CHECK-NEXT: s_waitcnt vmcnt(62) +; CHECK-NEXT: v_accvgpr_mov_b32 a34, a62 +; CHECK-NEXT: v_accvgpr_mov_b32 a35, a63 +; CHECK-NEXT: v_accvgpr_write_b32 a50, v18 +; CHECK-NEXT: v_accvgpr_write_b32 a52, v20 +; CHECK-NEXT: s_add_i32 s54, s32, 0x45e00 +; CHECK-NEXT: s_waitcnt vmcnt(16) +; CHECK-NEXT: v_accvgpr_write_b32 a0, v22 +; CHECK-NEXT: v_accvgpr_write_b32 a1, v23 +; CHECK-NEXT: v_accvgpr_write_b32 a2, v24 +; CHECK-NEXT: v_accvgpr_write_b32 a3, v25 +; CHECK-NEXT: v_accvgpr_write_b32 a4, v26 +; CHECK-NEXT: v_accvgpr_write_b32 a5, v27 +; CHECK-NEXT: v_accvgpr_write_b32 a6, v28 +; CHECK-NEXT: v_accvgpr_write_b32 a7, v29 +; CHECK-NEXT: v_accvgpr_write_b32 a8, v30 +; CHECK-NEXT: v_accvgpr_write_b32 a9, v31 +; CHECK-NEXT: v_accvgpr_write_b32 a10, v32 +; CHECK-NEXT: v_accvgpr_write_b32 a11, v33 ; CHECK-NEXT: s_waitcnt vmcnt(4) -; CHECK-NEXT: v_xor_b32_e32 v1, v55, v31 +; CHECK-NEXT: v_accvgpr_write_b32 a16, v38 ; CHECK-NEXT: s_waitcnt vmcnt(3) -; CHECK-NEXT: v_xor_b32_e32 v25, v56, v60 -; CHECK-NEXT: v_xor_b32_e32 v8, v46, v20 -; CHECK-NEXT: v_xor_b32_e32 v20, v50, v30 -; CHECK-NEXT: v_accvgpr_read_b32 v30, a38 -; CHECK-NEXT: v_xor_b32_e32 v0, v54, v58 -; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1 -; CHECK-NEXT: v_xor_b32_e32 v11, v45, v19 -; CHECK-NEXT: v_xor_b32_e32 v19, v27, v5 -; CHECK-NEXT: v_xor_b32_e32 v4, v52, v30 -; CHECK-NEXT: v_xor_b32_e32 v30, v26, v2 -; CHECK-NEXT: v_lshlrev_b32_e32 v5, 17, v25 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 14, v[0:1] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v5 -; CHECK-NEXT: v_and_b32_e32 v5, 0x7fffffff, v13 -; CHECK-NEXT: v_xor_b32_e32 v18, v38, v12 -; CHECK-NEXT: v_lshlrev_b32_e32 v12, 18, v0 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 13, v[4:5] -; CHECK-NEXT: v_or_b32_e32 v1, v1, v12 -; CHECK-NEXT: v_xor_b32_e32 v7, v49, v23 -; CHECK-NEXT: v_and_b32_e32 v21, 0x7fffffff, v21 -; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v7 -; CHECK-NEXT: v_and_b32_e32 v9, 0x7fffffff, v9 -; CHECK-NEXT: v_and_b32_e32 v11, 0x7fffffff, v11 -; CHECK-NEXT: v_accvgpr_read_b32 v31, a37 +; CHECK-NEXT: v_xor_b32_e32 v2, v50, v54 ; CHECK-NEXT: s_waitcnt vmcnt(2) -; CHECK-NEXT: v_xor_b32_e32 v23, v57, v31 -; CHECK-NEXT: v_xor_b32_e32 v17, v43, v17 -; CHECK-NEXT: v_xor_b32_e32 v16, v42, v16 -; CHECK-NEXT: v_and_b32_e32 v17, 0x7fffffff, v17 -; CHECK-NEXT: v_xor_b32_e32 v15, v41, v15 -; CHECK-NEXT: v_xor_b32_e32 v14, v40, v14 -; CHECK-NEXT: v_and_b32_e32 v15, 0x7fffffff, v15 -; CHECK-NEXT: v_accvgpr_read_b32 v57, a5 -; CHECK-NEXT: v_accvgpr_read_b32 v43, a11 -; CHECK-NEXT: v_accvgpr_read_b32 v49, a15 -; CHECK-NEXT: v_accvgpr_read_b32 v51, a3 -; CHECK-NEXT: v_accvgpr_read_b32 v59, a17 -; CHECK-NEXT: v_accvgpr_read_b32 v56, a4 -; CHECK-NEXT: v_accvgpr_read_b32 v42, a10 -; CHECK-NEXT: v_accvgpr_read_b32 v40, a8 -; CHECK-NEXT: v_accvgpr_read_b32 v48, a14 -; CHECK-NEXT: v_accvgpr_read_b32 v50, a2 -; CHECK-NEXT: v_accvgpr_read_b32 v58, a16 +; CHECK-NEXT: v_xor_b32_e32 v3, v51, v55 +; CHECK-NEXT: v_accvgpr_write_b32 a12, v34 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_write_b32 a30, v52 +; CHECK-NEXT: v_accvgpr_write_b32 a13, v35 +; CHECK-NEXT: v_accvgpr_write_b32 a14, v36 +; CHECK-NEXT: v_accvgpr_write_b32 a15, v37 +; CHECK-NEXT: v_accvgpr_write_b32 a17, v39 +; CHECK-NEXT: v_accvgpr_write_b32 a18, v40 +; CHECK-NEXT: v_accvgpr_write_b32 a19, v41 +; CHECK-NEXT: v_accvgpr_write_b32 a20, v42 +; CHECK-NEXT: v_accvgpr_write_b32 a21, v43 +; CHECK-NEXT: v_accvgpr_write_b32 a22, v44 +; CHECK-NEXT: v_accvgpr_write_b32 a23, v45 +; CHECK-NEXT: v_accvgpr_write_b32 a24, v46 +; CHECK-NEXT: v_accvgpr_write_b32 a25, v47 +; CHECK-NEXT: v_accvgpr_write_b32 a26, v48 +; CHECK-NEXT: v_accvgpr_write_b32 a27, v49 +; CHECK-NEXT: v_accvgpr_write_b32 a31, v53 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:3176 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:3180 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:3184 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:3188 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:3192 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:3196 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:3200 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:3204 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:3208 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:3212 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:3216 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:3220 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:3224 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:3228 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:3232 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:3236 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:3240 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:3244 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:3248 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:3252 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:3256 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:3260 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:3264 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:3268 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:3272 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:3276 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:3280 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:3284 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:3288 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:3292 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:3296 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:3300 ; 4-byte Folded Reload +; CHECK-NEXT: s_waitcnt vmcnt(2) +; CHECK-NEXT: v_accvgpr_read_b32 v59, a31 +; CHECK-NEXT: v_accvgpr_read_b32 v58, a30 +; CHECK-NEXT: v_accvgpr_read_b32 v57, a27 +; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3 +; CHECK-NEXT: v_accvgpr_read_b32 v56, a26 +; CHECK-NEXT: v_accvgpr_read_b32 v55, a25 +; CHECK-NEXT: v_accvgpr_read_b32 v54, a24 +; CHECK-NEXT: v_accvgpr_read_b32 v53, a23 +; CHECK-NEXT: v_accvgpr_read_b32 v52, a22 +; CHECK-NEXT: v_accvgpr_read_b32 v51, a21 +; CHECK-NEXT: v_accvgpr_read_b32 v50, a20 +; CHECK-NEXT: v_accvgpr_read_b32 v49, a19 +; CHECK-NEXT: v_accvgpr_read_b32 v48, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v47, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v46, a16 +; CHECK-NEXT: v_lshrrev_b64 v[4:5], 14, v[2:3] +; CHECK-NEXT: v_accvgpr_read_b32 v27, a51 +; CHECK-NEXT: v_lshlrev_b32_e32 v6, 18, v2 ; CHECK-NEXT: s_waitcnt vmcnt(1) -; CHECK-NEXT: v_add_co_u32_e64 v12, s[38:39], 24, v36 +; CHECK-NEXT: v_xor_b32_e32 v62, v58, v60 +; CHECK-NEXT: v_lshlrev_b32_e32 v3, 17, v62 +; CHECK-NEXT: v_or_b32_e32 v5, v5, v3 +; CHECK-NEXT: v_xor_b32_e32 v3, v57, v27 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:3048 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:3052 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:3056 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:3060 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:3064 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:3068 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:3072 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:3076 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:3080 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:3084 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:3088 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:3092 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:3096 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:3100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:3104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:3108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:3112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:3116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:3120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:3124 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:3128 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:3132 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:3136 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:3140 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:3144 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:3148 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:3152 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:3156 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:3160 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:3164 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:3168 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:3172 ; 4-byte Folded Reload +; CHECK-NEXT: s_waitcnt vmcnt(29) +; CHECK-NEXT: v_accvgpr_read_b32 v32, a26 +; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v3 +; CHECK-NEXT: v_accvgpr_read_b32 v31, a25 +; CHECK-NEXT: v_accvgpr_read_b32 v30, a24 +; CHECK-NEXT: v_accvgpr_read_b32 v29, a23 +; CHECK-NEXT: v_accvgpr_read_b32 v28, a22 +; CHECK-NEXT: v_accvgpr_read_b32 v27, a21 +; CHECK-NEXT: v_accvgpr_read_b32 v26, a20 +; CHECK-NEXT: v_accvgpr_read_b32 v25, a19 +; CHECK-NEXT: v_accvgpr_read_b32 v24, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v23, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v22, a16 +; CHECK-NEXT: s_waitcnt vmcnt(6) +; CHECK-NEXT: v_accvgpr_read_b32 v55, a25 +; CHECK-NEXT: v_accvgpr_read_b32 v54, a24 +; CHECK-NEXT: v_accvgpr_read_b32 v53, a23 +; CHECK-NEXT: v_accvgpr_read_b32 v52, a22 +; CHECK-NEXT: v_accvgpr_read_b32 v51, a21 +; CHECK-NEXT: v_accvgpr_read_b32 v50, a20 +; CHECK-NEXT: v_accvgpr_read_b32 v49, a19 +; CHECK-NEXT: v_accvgpr_read_b32 v48, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v47, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v46, a16 +; CHECK-NEXT: s_waitcnt vmcnt(5) +; CHECK-NEXT: v_xor_b32_e32 v0, v32, v56 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 13, v[0:1] +; CHECK-NEXT: v_accvgpr_write_b32 a26, v0 +; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:992 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:996 ; 4-byte Folded Reload +; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 +; CHECK-NEXT: s_waitcnt vmcnt(1) +; CHECK-NEXT: v_add_co_u32_e64 v26, s[38:39], 24, v0 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_addc_co_u32_e64 v27, s[38:39], 0, v1, s[38:39] +; CHECK-NEXT: v_accvgpr_write_b32 a39, v1 +; CHECK-NEXT: flat_store_dwordx4 v[26:27], v[2:5] offset:80 +; CHECK-NEXT: v_accvgpr_write_b32 a63, v27 +; CHECK-NEXT: s_add_i32 s38, s32, 0x4be00 +; CHECK-NEXT: v_accvgpr_write_b32 a38, v0 +; CHECK-NEXT: v_accvgpr_write_b32 a62, v26 +; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s38 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s38 offset:4 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s38 offset:8 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s38 offset:12 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s38 offset:16 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v5, off, s[0:3], s38 offset:20 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s38 offset:24 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v7, off, s[0:3], s38 offset:28 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s38 offset:32 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s38 offset:36 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s38 offset:40 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s38 offset:44 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s38 offset:48 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v13, off, s[0:3], s38 offset:52 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s38 offset:56 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s38 offset:60 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s38 offset:64 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s38 offset:68 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v18, off, s[0:3], s38 offset:72 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v19, off, s[0:3], s38 offset:76 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v20, off, s[0:3], s38 offset:80 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v21, off, s[0:3], s38 offset:84 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s38 offset:88 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v23, off, s[0:3], s38 offset:92 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s38 offset:96 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v25, off, s[0:3], s38 offset:100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s38 offset:104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s38 offset:108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s38 offset:112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s38 offset:116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s38 offset:120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s38 offset:124 ; 4-byte Folded Reload +; CHECK-NEXT: s_add_i32 s38, s32, 0x47e00 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v2, a26 +; CHECK-NEXT: v_accvgpr_read_b32 v6, a62 +; CHECK-NEXT: v_accvgpr_read_b32 v7, a63 +; CHECK-NEXT: v_accvgpr_mov_b32 a63, a35 +; CHECK-NEXT: v_accvgpr_mov_b32 a62, a34 +; CHECK-NEXT: v_xor_b32_e32 v29, v55, v25 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:2920 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2924 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:2928 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:2932 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:2936 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:2940 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:2944 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:2948 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:2952 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:2956 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:2960 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:2964 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:2968 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:2972 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:2976 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:2980 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:2984 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:2988 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:2992 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:2996 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:3000 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:3004 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:3008 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:3012 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:3016 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:3020 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:3024 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:3028 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:3032 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:3036 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:3040 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:3044 ; 4-byte Folded Reload +; CHECK-NEXT: v_accvgpr_read_b32 v26, a24 +; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v29 +; CHECK-NEXT: v_accvgpr_read_b32 v24, a22 +; CHECK-NEXT: v_accvgpr_read_b32 v25, a23 +; CHECK-NEXT: v_lshlrev_b32_e32 v24, 19, v2 +; CHECK-NEXT: v_accvgpr_read_b32 v23, a21 +; CHECK-NEXT: v_accvgpr_read_b32 v22, a20 +; CHECK-NEXT: v_accvgpr_read_b32 v21, a19 +; CHECK-NEXT: v_accvgpr_read_b32 v20, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v19, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v18, a16 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v0, v26, v54 +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s38 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s38 offset:4 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s38 offset:8 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s38 offset:12 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s38 offset:16 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s38 offset:20 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s38 offset:24 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s38 offset:28 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s38 offset:32 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s38 offset:36 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s38 offset:40 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s38 offset:44 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s38 offset:48 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s38 offset:52 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s38 offset:56 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s38 offset:60 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s38 offset:64 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s38 offset:68 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s38 offset:72 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s38 offset:76 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s38 offset:80 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s38 offset:84 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s38 offset:88 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s38 offset:92 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s38 offset:96 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s38 offset:100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s38 offset:104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s38 offset:108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s38 offset:112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s38 offset:116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s38 offset:120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s38 offset:124 ; 4-byte Folded Reload +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 12, v[0:1] +; CHECK-NEXT: v_or_b32_e32 v3, v3, v24 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v39, a15 +; CHECK-NEXT: v_accvgpr_read_b32 v24, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v47, a23 +; CHECK-NEXT: v_accvgpr_read_b32 v38, a14 +; CHECK-NEXT: v_accvgpr_read_b32 v37, a13 +; CHECK-NEXT: v_accvgpr_read_b32 v36, a12 +; CHECK-NEXT: v_accvgpr_read_b32 v35, a11 +; CHECK-NEXT: v_accvgpr_read_b32 v34, a10 +; CHECK-NEXT: v_accvgpr_read_b32 v33, a9 +; CHECK-NEXT: v_accvgpr_read_b32 v32, a8 +; CHECK-NEXT: v_accvgpr_read_b32 v31, a7 +; CHECK-NEXT: v_accvgpr_read_b32 v30, a6 +; CHECK-NEXT: v_accvgpr_read_b32 v29, a5 +; CHECK-NEXT: v_accvgpr_read_b32 v28, a4 +; CHECK-NEXT: v_accvgpr_read_b32 v27, a3 +; CHECK-NEXT: v_accvgpr_read_b32 v26, a2 +; CHECK-NEXT: v_accvgpr_read_b32 v25, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v46, a22 +; CHECK-NEXT: v_accvgpr_read_b32 v45, a21 +; CHECK-NEXT: v_accvgpr_read_b32 v44, a20 +; CHECK-NEXT: v_accvgpr_read_b32 v43, a19 +; CHECK-NEXT: v_accvgpr_read_b32 v42, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v41, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v40, a16 +; CHECK-NEXT: v_accvgpr_write_b32 a0, v24 +; CHECK-NEXT: v_accvgpr_write_b32 a1, v25 +; CHECK-NEXT: v_accvgpr_write_b32 a2, v26 +; CHECK-NEXT: v_accvgpr_write_b32 a3, v27 +; CHECK-NEXT: v_accvgpr_write_b32 a4, v28 +; CHECK-NEXT: v_accvgpr_write_b32 a5, v29 +; CHECK-NEXT: v_accvgpr_write_b32 a6, v30 +; CHECK-NEXT: v_accvgpr_write_b32 a7, v31 +; CHECK-NEXT: v_accvgpr_write_b32 a8, v32 +; CHECK-NEXT: v_accvgpr_write_b32 a9, v33 +; CHECK-NEXT: v_accvgpr_write_b32 a10, v34 +; CHECK-NEXT: v_accvgpr_write_b32 a11, v35 +; CHECK-NEXT: v_accvgpr_write_b32 a12, v36 +; CHECK-NEXT: v_accvgpr_write_b32 a13, v37 +; CHECK-NEXT: v_accvgpr_write_b32 a14, v38 +; CHECK-NEXT: v_accvgpr_write_b32 a15, v39 +; CHECK-NEXT: v_lshlrev_b32_e32 v8, 20, v0 +; CHECK-NEXT: s_add_i32 s38, s32, 0x49e00 +; CHECK-NEXT: v_accvgpr_read_b32 v27, a19 +; CHECK-NEXT: v_accvgpr_read_b32 v26, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v25, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v24, a16 +; CHECK-NEXT: v_xor_b32_e32 v23, v47, v51 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:2792 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2796 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:2800 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:2804 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:2808 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:2812 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:2816 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:2820 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:2824 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:2828 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:2832 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:2836 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:2840 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:2844 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:2848 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:2852 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:2856 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:2860 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:2864 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:2868 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:2872 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:2876 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:2880 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:2884 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:2888 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:2892 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:2896 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:2900 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:2904 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:2908 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:2912 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:2916 ; 4-byte Folded Reload +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v46, a22 +; CHECK-NEXT: v_and_b32_e32 v11, 0x7fffffff, v23 +; CHECK-NEXT: v_accvgpr_read_b32 v45, a21 +; CHECK-NEXT: v_accvgpr_read_b32 v44, a20 +; CHECK-NEXT: v_accvgpr_read_b32 v43, a19 +; CHECK-NEXT: v_accvgpr_read_b32 v42, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v41, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v40, a16 +; CHECK-NEXT: v_xor_b32_e32 v10, v46, v52 +; CHECK-NEXT: v_lshrrev_b64 v[0:1], 11, v[10:11] +; CHECK-NEXT: v_or_b32_e32 v1, v1, v8 +; CHECK-NEXT: flat_store_dwordx4 v[6:7], v[0:3] offset:64 +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s38 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s38 offset:4 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s38 offset:8 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s38 offset:12 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s38 offset:16 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s38 offset:20 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s38 offset:24 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s38 offset:28 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s38 offset:32 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s38 offset:36 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s38 offset:40 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s38 offset:44 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s38 offset:48 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s38 offset:52 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s38 offset:56 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s38 offset:60 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s38 offset:64 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s38 offset:68 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s38 offset:72 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s38 offset:76 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s38 offset:80 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s38 offset:84 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s38 offset:88 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s38 offset:92 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s38 offset:96 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s38 offset:100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s38 offset:104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s38 offset:108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s38 offset:112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s38 offset:116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s38 offset:120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s38 offset:124 ; 4-byte Folded Reload ; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: v_addc_co_u32_e64 v13, s[38:39], 0, v37, s[38:39] -; CHECK-NEXT: flat_store_dwordx4 v[12:13], v[0:3] offset:80 +; CHECK-NEXT: v_accvgpr_read_b32 v33, a21 +; CHECK-NEXT: v_accvgpr_read_b32 v32, a20 +; CHECK-NEXT: v_accvgpr_read_b32 v31, a19 +; CHECK-NEXT: v_accvgpr_read_b32 v30, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v29, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v28, a16 +; CHECK-NEXT: s_add_i32 s38, s32, 0x43c00 +; CHECK-NEXT: v_lshlrev_b32_e32 v8, 21, v10 +; CHECK-NEXT: v_pk_mov_b32 v[10:11], v[6:7], v[6:7] op_sel:[0,1] +; CHECK-NEXT: v_xor_b32_e32 v3, v33, v49 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:2664 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2668 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:2672 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:2676 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:2680 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:2684 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:2688 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:2692 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:2696 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:2700 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:2704 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:2708 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:2712 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:2716 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:2720 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:2724 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:2728 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:2732 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:2736 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:2740 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:2744 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:2748 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:2752 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:2756 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:2760 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:2764 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:2768 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:2772 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:2776 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:2780 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:2784 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:2788 ; 4-byte Folded Reload +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v32, a20 +; CHECK-NEXT: v_accvgpr_read_b32 v31, a19 +; CHECK-NEXT: v_accvgpr_read_b32 v30, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v29, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v28, a16 +; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3 +; CHECK-NEXT: v_xor_b32_e32 v2, v32, v50 +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s38 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s38 offset:4 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s38 offset:8 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s38 offset:12 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s38 offset:16 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s38 offset:20 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s38 offset:24 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s38 offset:28 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s38 offset:32 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s38 offset:36 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s38 offset:40 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s38 offset:44 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s38 offset:48 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s38 offset:52 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s38 offset:56 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s38 offset:60 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s38 offset:64 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s38 offset:68 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s38 offset:72 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s38 offset:76 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s38 offset:80 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s38 offset:84 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s38 offset:88 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s38 offset:92 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s38 offset:96 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s38 offset:100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s38 offset:104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s38 offset:108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s38 offset:112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s38 offset:116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s38 offset:120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s38 offset:124 ; 4-byte Folded Reload +; CHECK-NEXT: v_lshrrev_b64 v[4:5], 10, v[2:3] +; CHECK-NEXT: v_or_b32_e32 v5, v5, v8 +; CHECK-NEXT: v_lshlrev_b32_e32 v8, 22, v2 +; CHECK-NEXT: s_add_i32 s38, s32, 0x41c00 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v3, v27, v47 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:2536 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2540 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:2544 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:2548 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:2552 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:2556 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:2560 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:2564 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:2568 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:2572 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:2576 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:2580 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:2584 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:2588 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:2592 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:2596 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:2600 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:2604 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:2608 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:2612 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:2616 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:2620 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:2624 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:2628 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:2632 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:2636 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:2640 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:2644 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:2648 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:2652 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:2656 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:2660 ; 4-byte Folded Reload +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v46, a18 +; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v3 +; CHECK-NEXT: v_accvgpr_read_b32 v44, a16 +; CHECK-NEXT: v_accvgpr_read_b32 v45, a17 +; CHECK-NEXT: v_accvgpr_write_b32 a16, v44 +; CHECK-NEXT: v_accvgpr_write_b32 a17, v45 +; CHECK-NEXT: v_accvgpr_read_b32 v27, a15 +; CHECK-NEXT: v_accvgpr_read_b32 v25, a13 +; CHECK-NEXT: v_accvgpr_read_b32 v24, a12 +; CHECK-NEXT: v_accvgpr_read_b32 v26, a14 +; CHECK-NEXT: v_accvgpr_read_b32 v23, a11 +; CHECK-NEXT: v_accvgpr_read_b32 v22, a10 +; CHECK-NEXT: v_accvgpr_read_b32 v21, a9 +; CHECK-NEXT: v_accvgpr_read_b32 v20, a8 +; CHECK-NEXT: v_accvgpr_read_b32 v19, a7 +; CHECK-NEXT: v_accvgpr_read_b32 v18, a6 +; CHECK-NEXT: v_accvgpr_read_b32 v17, a5 +; CHECK-NEXT: v_accvgpr_read_b32 v16, a4 +; CHECK-NEXT: v_accvgpr_read_b32 v15, a3 +; CHECK-NEXT: v_accvgpr_read_b32 v14, a2 +; CHECK-NEXT: v_accvgpr_read_b32 v13, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v12, a0 +; CHECK-NEXT: v_accvgpr_write_b32 a0, v12 +; CHECK-NEXT: v_accvgpr_write_b32 a10, v22 +; CHECK-NEXT: v_accvgpr_write_b32 a9, v21 +; CHECK-NEXT: v_accvgpr_write_b32 a1, v13 +; CHECK-NEXT: v_accvgpr_write_b32 a2, v14 +; CHECK-NEXT: v_accvgpr_write_b32 a3, v15 +; CHECK-NEXT: v_accvgpr_write_b32 a4, v16 +; CHECK-NEXT: v_accvgpr_write_b32 a5, v17 +; CHECK-NEXT: v_accvgpr_write_b32 a6, v18 +; CHECK-NEXT: v_accvgpr_write_b32 a7, v19 +; CHECK-NEXT: v_accvgpr_write_b32 a8, v20 +; CHECK-NEXT: v_xor_b32_e32 v0, v46, v48 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 9, v[0:1] +; CHECK-NEXT: v_or_b32_e32 v3, v3, v8 +; CHECK-NEXT: flat_store_dwordx4 v[6:7], v[2:5] offset:48 +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s38 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s38 offset:4 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s38 offset:8 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s38 offset:12 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s38 offset:16 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s38 offset:20 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s38 offset:24 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s38 offset:28 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s38 offset:32 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s38 offset:36 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s38 offset:40 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s38 offset:44 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s38 offset:48 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s38 offset:52 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s38 offset:56 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s38 offset:60 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s38 offset:64 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s38 offset:68 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s38 offset:72 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s38 offset:76 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s38 offset:80 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s38 offset:84 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s38 offset:88 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s38 offset:92 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s38 offset:96 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s38 offset:100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s38 offset:104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s38 offset:108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s38 offset:112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s38 offset:116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s38 offset:120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s38 offset:124 ; 4-byte Folded Reload +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v29, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v27, a15 +; CHECK-NEXT: v_accvgpr_read_b32 v28, a16 +; CHECK-NEXT: v_accvgpr_read_b32 v26, a14 +; CHECK-NEXT: v_accvgpr_write_b32 a19, v27 +; CHECK-NEXT: s_add_i32 s38, s32, 0x3fc00 +; CHECK-NEXT: v_accvgpr_write_b32 a18, v0 +; CHECK-NEXT: v_accvgpr_write_b32 a20, v28 +; CHECK-NEXT: v_accvgpr_write_b32 a21, v29 +; CHECK-NEXT: v_accvgpr_mov_b32 a15, a19 +; CHECK-NEXT: v_accvgpr_mov_b32 a17, a21 +; CHECK-NEXT: v_accvgpr_mov_b32 a16, a20 +; CHECK-NEXT: v_xor_b32_e32 v3, v25, v41 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:3440 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:3444 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:3448 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:3452 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:3456 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:3460 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:3464 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:3468 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:3472 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:3476 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:3480 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:3484 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:3488 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:3492 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:3496 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:3500 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:3504 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:3508 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:3512 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:3516 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:3520 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:3524 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:3528 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:3532 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:3536 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:3540 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:3544 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:3548 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:3552 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:3556 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:3560 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:3564 ; 4-byte Folded Reload +; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v2, v24, v42 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:3312 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:3316 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:3320 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:3324 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:3328 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:3332 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:3336 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:3340 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:3344 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:3348 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:3352 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:3356 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:3360 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:3364 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:3368 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:3372 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:3376 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:3380 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:3384 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:3388 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:3392 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:3396 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:3400 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:3404 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:3408 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:3412 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:3416 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:3420 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:3424 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:3428 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:3432 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:3436 ; 4-byte Folded Reload +; CHECK-NEXT: v_lshrrev_b64 v[4:5], 6, v[2:3] +; CHECK-NEXT: v_lshlrev_b32_e32 v8, 26, v2 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v0, v26, v44 +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s38 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s38 offset:4 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s38 offset:8 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s38 offset:12 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s38 offset:16 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s38 offset:20 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s38 offset:24 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s38 offset:28 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s38 offset:32 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s38 offset:36 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s38 offset:40 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s38 offset:44 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s38 offset:48 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s38 offset:52 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s38 offset:56 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s38 offset:60 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s38 offset:64 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s38 offset:68 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s38 offset:72 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s38 offset:76 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s38 offset:80 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s38 offset:84 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s38 offset:88 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s38 offset:92 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s38 offset:96 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s38 offset:100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s38 offset:104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s38 offset:108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s38 offset:112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s38 offset:116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s38 offset:120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s38 offset:124 ; 4-byte Folded Reload +; CHECK-NEXT: v_lshlrev_b32_e32 v3, 25, v0 +; CHECK-NEXT: v_or_b32_e32 v5, v5, v3 +; CHECK-NEXT: v_accvgpr_read_b32 v27, a21 +; CHECK-NEXT: v_accvgpr_read_b32 v25, a19 +; CHECK-NEXT: v_accvgpr_read_b32 v26, a20 +; CHECK-NEXT: v_accvgpr_read_b32 v27, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v26, a16 ; CHECK-NEXT: s_movk_i32 s38, 0x7c -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 19, v4 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 12, v[20:21] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v0 -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 20, v20 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 11, v[6:7] -; CHECK-NEXT: v_or_b32_e32 v1, v1, v4 -; CHECK-NEXT: flat_store_dwordx4 v[12:13], v[0:3] offset:64 -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 22, v8 -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 21, v6 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 10, v[8:9] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v0 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 9, v[10:11] -; CHECK-NEXT: v_or_b32_e32 v1, v1, v4 -; CHECK-NEXT: flat_store_dwordx4 v[12:13], v[0:3] offset:48 -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 26, v18 -; CHECK-NEXT: v_add_co_u32_e64 v0, s[38:39], s38, v36 -; CHECK-NEXT: v_addc_co_u32_e64 v1, s[38:39], 0, v37, s[38:39] -; CHECK-NEXT: v_lshrrev_b32_e32 v2, 15, v23 -; CHECK-NEXT: s_movk_i32 s38, 0x78 -; CHECK-NEXT: flat_store_short v[0:1], v2 -; CHECK-NEXT: v_add_co_u32_e64 v0, s[38:39], s38, v36 -; CHECK-NEXT: v_alignbit_b32 v2, v23, v25, 15 -; CHECK-NEXT: v_addc_co_u32_e64 v1, s[38:39], 0, v37, s[38:39] -; CHECK-NEXT: flat_store_dword v[0:1], v2 -; CHECK-NEXT: v_and_b32_e32 v0, 0x7fffffff, v19 -; CHECK-NEXT: v_lshlrev_b32_e32 v1, 31, v28 -; CHECK-NEXT: v_or_b32_e32 v31, v0, v1 -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 23, v10 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 8, v[16:17] -; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 -; CHECK-NEXT: flat_store_dwordx2 v[36:37], v[0:1] offset:64 -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 24, v16 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 7, v[14:15] -; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 -; CHECK-NEXT: v_and_b32_e32 v19, 0x7fffffff, v35 -; CHECK-NEXT: flat_store_dwordx2 v[12:13], v[0:1] offset:32 -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 25, v14 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 6, v[18:19] -; CHECK-NEXT: v_and_b32_e32 v35, 0x7fffffff, v62 -; CHECK-NEXT: v_or_b32_e32 v3, v3, v0 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 5, v[34:35] -; CHECK-NEXT: v_or_b32_e32 v1, v1, v4 -; CHECK-NEXT: flat_store_dwordx4 v[12:13], v[0:3] offset:16 -; CHECK-NEXT: v_accvgpr_read_b32 v6, a36 -; CHECK-NEXT: v_mov_b32_e32 v0, v33 -; CHECK-NEXT: v_and_b32_e32 v33, 0x7fffffff, v0 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 4, v[32:33] -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 27, v34 -; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 -; CHECK-NEXT: flat_store_dwordx2 v[36:37], v[0:1] offset:32 -; CHECK-NEXT: v_accvgpr_read_b32 v0, a27 -; CHECK-NEXT: v_accvgpr_read_b32 v2, a36 -; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v0 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 3, v[2:3] -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 28, v32 -; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 -; CHECK-NEXT: flat_store_dwordx2 v[12:13], v[0:1] -; CHECK-NEXT: v_mov_b32_e32 v0, v29 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v3, v23, v39 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:2408 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2412 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:2416 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:2420 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:2424 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:2428 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:2432 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:2436 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:2440 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:2444 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:2448 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:2452 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:2456 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:2460 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:2464 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:2468 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:2472 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:2476 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:2480 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:2484 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:2488 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:2492 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:2496 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:2500 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:2504 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:2508 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:2512 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:2516 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:2520 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:2524 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:2528 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:2532 ; 4-byte Folded Reload +; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v3 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v6, v22, v40 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 5, v[6:7] +; CHECK-NEXT: v_or_b32_e32 v3, v3, v8 +; CHECK-NEXT: flat_store_dwordx4 v[10:11], v[2:5] offset:16 +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:3952 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:3956 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:3960 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:3964 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:3968 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:3972 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:3976 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:3980 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:3984 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:3988 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:3992 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:3996 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4000 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:4004 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4008 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:4012 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:4016 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:4020 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:4024 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4028 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:4032 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:4036 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:4040 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:4044 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:4048 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:4052 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:4056 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:4060 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:4064 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:4068 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:4072 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4076 ; 4-byte Folded Reload +; CHECK-NEXT: v_accvgpr_write_b32 a10, v6 +; CHECK-NEXT: v_pk_mov_b32 v[8:9], v[10:11], v[10:11] op_sel:[0,1] +; CHECK-NEXT: v_accvgpr_read_b32 v19, a9 +; CHECK-NEXT: v_accvgpr_read_b32 v17, a7 +; CHECK-NEXT: v_accvgpr_read_b32 v16, a6 +; CHECK-NEXT: v_accvgpr_read_b32 v15, a5 +; CHECK-NEXT: v_accvgpr_read_b32 v14, a4 +; CHECK-NEXT: v_accvgpr_read_b32 v13, a3 +; CHECK-NEXT: v_accvgpr_read_b32 v12, a2 +; CHECK-NEXT: v_accvgpr_read_b32 v11, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v10, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v16, a6 +; CHECK-NEXT: v_accvgpr_read_b32 v18, a8 +; CHECK-NEXT: v_accvgpr_read_b32 v15, a5 +; CHECK-NEXT: v_accvgpr_read_b32 v14, a4 +; CHECK-NEXT: v_accvgpr_read_b32 v13, a3 +; CHECK-NEXT: v_accvgpr_read_b32 v12, a2 +; CHECK-NEXT: v_accvgpr_read_b32 v11, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v10, a0 +; CHECK-NEXT: v_accvgpr_write_b32 a8, v18 +; CHECK-NEXT: v_accvgpr_write_b32 a9, v19 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v2, v25, v43 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:2280 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2284 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:2288 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:2292 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:2296 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:2300 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:2304 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:2308 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:2312 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:2316 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:2320 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:2324 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:2328 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:2332 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:2336 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:2340 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:2344 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:2348 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:2352 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:2356 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:2360 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:2364 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:2368 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:2372 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:2376 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:2380 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:2384 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:2388 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:2392 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:2396 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:2400 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:2404 ; 4-byte Folded Reload +; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v2 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 7, v[0:1] +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v6, v26, v46 +; CHECK-NEXT: v_lshlrev_b32_e32 v4, 24, v6 +; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 +; CHECK-NEXT: flat_store_dwordx2 v[8:9], v[2:3] offset:32 +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:3824 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:3828 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:3832 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:3836 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:3840 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:3844 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:3848 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:3852 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:3856 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:3860 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:3864 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:3868 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:3872 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:3876 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:3880 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:3884 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:3888 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:3892 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:3896 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:3900 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:3904 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:3908 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:3912 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:3916 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:3920 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:3924 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:3928 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:3932 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:3936 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:3940 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:3944 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:3948 ; 4-byte Folded Reload +; CHECK-NEXT: v_accvgpr_write_b32 a12, v6 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v3, v17, v35 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:2152 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2156 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:2160 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:2164 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:2168 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:2172 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:2176 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:2180 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:2184 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:2188 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:2192 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:2196 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:2200 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:2204 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:2208 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:2212 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:2216 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:2220 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:2224 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:2228 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:2232 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:2236 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:2240 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:2244 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:2248 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:2252 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:2256 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:2260 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:2264 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:2268 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:2272 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:2276 ; 4-byte Folded Reload +; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v3 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v0, v16, v36 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:2024 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2028 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:2032 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:2036 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:2040 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:2044 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:2048 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:2052 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:2056 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:2060 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:2064 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:2068 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:2072 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:2076 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:2080 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:2084 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:2088 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:2092 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:2096 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:2100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:2104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:2108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:2112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:2116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:2120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:2124 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:2128 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:2132 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:2136 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:2140 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:2144 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:2148 ; 4-byte Folded Reload +; CHECK-NEXT: v_lshrrev_b64 v[4:5], 3, v[0:1] +; CHECK-NEXT: v_accvgpr_write_b32 a6, v0 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v2, v18, v38 +; CHECK-NEXT: v_lshlrev_b32_e32 v3, 28, v2 +; CHECK-NEXT: v_or_b32_e32 v5, v5, v3 +; CHECK-NEXT: flat_store_dwordx2 v[8:9], v[4:5] +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:1768 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1772 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1776 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:1780 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:1784 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:1788 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:1792 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:1796 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:1800 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:1804 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:1808 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:1812 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:1816 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:1820 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:1824 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:1828 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:1832 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:1836 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:1840 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:1844 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:1848 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:1852 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:1856 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:1860 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:1864 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:1868 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:1872 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:1876 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:1880 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:1884 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:1888 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:1892 ; 4-byte Folded Reload +; CHECK-NEXT: v_accvgpr_write_b32 a14, v2 +; CHECK-NEXT: v_accvgpr_read_b32 v0, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v1, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v2, a2 +; CHECK-NEXT: v_accvgpr_read_b32 v3, a3 +; CHECK-NEXT: v_accvgpr_read_b32 v4, a4 +; CHECK-NEXT: v_accvgpr_read_b32 v5, a5 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v32, v2, v32 +; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:3696 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:3700 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:3704 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:3708 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:3712 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:3716 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:3720 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:3724 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:3728 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:3732 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:3736 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:3740 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:3744 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:3748 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:3752 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:3756 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:3760 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:3764 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:3768 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:3772 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:3776 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:3780 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:3784 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:3788 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:3792 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:3796 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:3800 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:3804 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:3808 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:3812 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:3816 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:3820 ; 4-byte Folded Reload +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_lshlrev_b32_e32 v4, 31, v32 +; CHECK-NEXT: v_mov_b32_e32 v0, v32 +; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:3568 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:3572 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:3576 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:3580 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:3584 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:3588 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:3592 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:3596 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:3600 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:3604 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:3608 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:3612 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:3616 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:3620 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:3624 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:3628 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:3632 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:3636 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:3640 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:3644 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:3648 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:3652 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:3656 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:3660 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:3664 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:3668 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:3672 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:3676 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:3680 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:3684 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:3688 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:3692 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:1896 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1900 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1904 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:1908 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:1912 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:1916 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:1920 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:1924 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:1928 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:1932 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:1936 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:1940 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:1944 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:1948 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:1952 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:1956 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:1960 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:1964 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:1968 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:1972 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:1976 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:1980 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:1984 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:1988 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:1992 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:1996 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:2000 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:2004 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:2008 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:2012 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:2016 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:2020 ; 4-byte Folded Reload +; CHECK-NEXT: v_accvgpr_read_b32 v3, a1 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v13, a5 +; CHECK-NEXT: v_accvgpr_read_b32 v12, a4 +; CHECK-NEXT: v_accvgpr_read_b32 v11, a3 +; CHECK-NEXT: v_accvgpr_read_b32 v17, a9 +; CHECK-NEXT: v_accvgpr_write_b32 a8, v12 +; CHECK-NEXT: v_accvgpr_write_b32 a9, v13 +; CHECK-NEXT: v_accvgpr_read_b32 v26, a38 +; CHECK-NEXT: v_accvgpr_read_b32 v27, a39 +; CHECK-NEXT: v_accvgpr_read_b32 v21, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v2, a0 ; CHECK-NEXT: v_accvgpr_read_b32 v2, a12 -; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v0 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 2, v[2:3] -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 29, v6 -; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 -; CHECK-NEXT: flat_store_dwordx2 v[36:37], v[0:1] offset:16 -; CHECK-NEXT: v_accvgpr_read_b32 v0, a9 -; CHECK-NEXT: v_accvgpr_read_b32 v4, a12 -; CHECK-NEXT: v_and_b32_e32 v29, 0x7fffffff, v0 -; CHECK-NEXT: v_lshrrev_b64 v[32:33], 1, v[28:29] -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 30, v4 -; CHECK-NEXT: v_or_b32_e32 v33, v33, v0 -; CHECK-NEXT: flat_store_dwordx4 v[36:37], v[30:33] +; CHECK-NEXT: v_mov_b32_e32 v13, v17 +; CHECK-NEXT: v_accvgpr_read_b32 v18, a50 +; CHECK-NEXT: v_accvgpr_read_b32 v20, a52 +; CHECK-NEXT: v_xor_b32_e32 v3, v3, v1 +; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3 +; CHECK-NEXT: v_or_b32_e32 v5, v3, v4 +; CHECK-NEXT: v_accvgpr_read_b32 v4, a0 +; CHECK-NEXT: v_xor_b32_e32 v3, v11, v9 +; CHECK-NEXT: v_accvgpr_read_b32 v8, a8 +; CHECK-NEXT: v_xor_b32_e32 v8, v8, v34 +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:1488 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1492 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1496 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:1500 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:1504 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:1508 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:1512 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:1516 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:1520 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:1524 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:1528 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:1532 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:1536 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:1540 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:1544 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:1548 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:1552 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:1556 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:1560 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:1564 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:1568 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:1572 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:1576 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:1580 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:1584 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:1588 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:1592 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:1596 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:1600 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:1604 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:1608 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:1612 ; 4-byte Folded Reload +; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v3 +; CHECK-NEXT: v_lshrrev_b64 v[6:7], 1, v[0:1] +; CHECK-NEXT: v_lshlrev_b32_e32 v3, 30, v8 +; CHECK-NEXT: v_or_b32_e32 v7, v7, v3 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v31, a53 +; CHECK-NEXT: v_accvgpr_read_b32 v33, a31 +; CHECK-NEXT: v_xor_b32_e32 v3, v33, v31 +; CHECK-NEXT: v_accvgpr_read_b32 v9, a9 +; CHECK-NEXT: v_accvgpr_read_b32 v9, a9 +; CHECK-NEXT: v_accvgpr_read_b32 v0, a36 +; CHECK-NEXT: v_accvgpr_read_b32 v61, a49 +; CHECK-NEXT: v_accvgpr_read_b32 v1, a37 +; CHECK-NEXT: v_accvgpr_read_b32 v60, a48 +; CHECK-NEXT: v_xor_b32_e32 v4, v4, v30 +; CHECK-NEXT: flat_store_dwordx4 v[26:27], v[4:7] +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: v_add_co_u32_e64 v4, s[38:39], s38, v26 +; CHECK-NEXT: v_addc_co_u32_e64 v5, s[38:39], 0, v27, s[38:39] +; CHECK-NEXT: v_lshrrev_b32_e32 v6, 15, v3 +; CHECK-NEXT: s_movk_i32 s38, 0x78 +; CHECK-NEXT: flat_store_short v[4:5], v6 +; CHECK-NEXT: v_add_co_u32_e64 v4, s[38:39], s38, v26 +; CHECK-NEXT: v_alignbit_b32 v3, v3, v62, 15 +; CHECK-NEXT: v_addc_co_u32_e64 v5, s[38:39], 0, v27, s[38:39] +; CHECK-NEXT: flat_store_dword v[4:5], v3 +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s54 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s54 offset:4 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s54 offset:8 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s54 offset:12 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s54 offset:16 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s54 offset:20 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s54 offset:24 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s54 offset:28 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s54 offset:32 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s54 offset:36 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s54 offset:40 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s54 offset:44 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s54 offset:48 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s54 offset:52 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s54 offset:56 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s54 offset:60 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s54 offset:64 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s54 offset:68 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s54 offset:72 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s54 offset:76 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s54 offset:80 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s54 offset:84 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s54 offset:88 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s54 offset:92 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s54 offset:96 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s54 offset:100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s54 offset:104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s54 offset:108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s54 offset:112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s54 offset:116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s54 offset:120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s54 offset:124 ; 4-byte Folded Reload +; CHECK-NEXT: s_add_i32 s54, s32, 0x4de00 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_xor_b32_e32 v3, v21, v45 +; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3 +; CHECK-NEXT: v_lshrrev_b64 v[4:5], 8, v[2:3] +; CHECK-NEXT: v_accvgpr_read_b32 v2, a18 +; CHECK-NEXT: v_lshlrev_b32_e32 v3, 23, v2 +; CHECK-NEXT: v_or_b32_e32 v5, v5, v3 +; CHECK-NEXT: flat_store_dwordx2 v[26:27], v[4:5] offset:64 +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s54 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s54 offset:4 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s54 offset:8 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s54 offset:12 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s54 offset:16 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s54 offset:20 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s54 offset:24 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s54 offset:28 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s54 offset:32 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s54 offset:36 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s54 offset:40 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s54 offset:44 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s54 offset:48 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s54 offset:52 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s54 offset:56 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s54 offset:60 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s54 offset:64 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s54 offset:68 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v46, off, s[0:3], s54 offset:72 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v47, off, s[0:3], s54 offset:76 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v48, off, s[0:3], s54 offset:80 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v49, off, s[0:3], s54 offset:84 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v50, off, s[0:3], s54 offset:88 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v51, off, s[0:3], s54 offset:92 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s54 offset:96 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s54 offset:100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v54, off, s[0:3], s54 offset:104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v55, off, s[0:3], s54 offset:108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v56, off, s[0:3], s54 offset:112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v57, off, s[0:3], s54 offset:116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v58, off, s[0:3], s54 offset:120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v59, off, s[0:3], s54 offset:124 ; 4-byte Folded Reload +; CHECK-NEXT: v_accvgpr_read_b32 v2, a14 +; CHECK-NEXT: v_accvgpr_read_b32 v4, a10 +; CHECK-NEXT: v_lshlrev_b32_e32 v4, 27, v4 +; CHECK-NEXT: v_accvgpr_read_b32 v5, a29 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v38, a56 +; CHECK-NEXT: v_accvgpr_read_b32 v39, a57 +; CHECK-NEXT: s_xor_b64 s[54:55], exec, -1 +; CHECK-NEXT: v_xor_b32_e32 v3, v13, v37 +; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 4, v[2:3] +; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 +; CHECK-NEXT: flat_store_dwordx2 v[26:27], v[2:3] offset:32 +; CHECK-NEXT: v_xor_b32_e32 v2, v9, v5 +; CHECK-NEXT: v_and_b32_e32 v9, 0x7fffffff, v2 +; CHECK-NEXT: v_accvgpr_read_b32 v4, a6 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 2, v[8:9] +; CHECK-NEXT: v_lshlrev_b32_e32 v4, 29, v4 +; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 +; CHECK-NEXT: flat_store_dwordx2 v[26:27], v[2:3] offset:16 ; CHECK-NEXT: .LBB0_3: ; %Flow52 ; CHECK-NEXT: s_or_b64 exec, exec, s[52:53] ; CHECK-NEXT: s_and_b64 s[52:53], s[54:55], exec -; CHECK-NEXT: ; implicit-def: $vgpr0 +; CHECK-NEXT: ; implicit-def: $vgpr62 ; CHECK-NEXT: .LBB0_4: ; %Flow51 ; CHECK-NEXT: s_andn2_saveexec_b64 s[50:51], s[50:51] ; CHECK-NEXT: ; %bb.5: ; %LeafBlock -; CHECK-NEXT: v_cmp_ne_u32_e64 s[38:39], 2, v0 +; CHECK-NEXT: v_cmp_ne_u32_e64 s[38:39], 2, v62 ; CHECK-NEXT: s_andn2_b64 s[48:49], s[52:53], exec ; CHECK-NEXT: s_and_b64 s[38:39], s[38:39], exec ; CHECK-NEXT: s_or_b64 s[52:53], s[48:49], s[38:39] ; CHECK-NEXT: s_mov_b64 s[48:49], exec ; CHECK-NEXT: ; %bb.6: ; %Flow53 ; CHECK-NEXT: s_or_b64 exec, exec, s[50:51] -; CHECK-NEXT: s_mov_b64 s[38:39], exec -; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:992 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:996 ; 4-byte Folded Reload -; CHECK-NEXT: s_and_b64 s[50:51], s[38:39], s[52:53] -; CHECK-NEXT: s_mov_b64 exec, s[50:51] +; CHECK-NEXT: s_and_saveexec_b64 s[38:39], s[52:53] ; CHECK-NEXT: s_cbranch_execz .LBB0_44 ; CHECK-NEXT: ; %bb.7: ; %bb0 ; CHECK-NEXT: s_and_saveexec_b64 s[50:51], s[46:47] ; CHECK-NEXT: s_xor_b64 s[50:51], exec, s[50:51] ; CHECK-NEXT: s_cbranch_execz .LBB0_41 ; CHECK-NEXT: ; %bb.8: ; %bb0b -; CHECK-NEXT: s_mov_b64 s[52:53], exec -; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:1456 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:1460 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:1464 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:1468 ; 4-byte Folded Reload -; CHECK-NEXT: s_and_b64 s[36:37], s[52:53], s[36:37] -; CHECK-NEXT: ; kill: def $vgpr8 killed $vgpr8 def $vgpr9 -; CHECK-NEXT: s_mov_b64 exec, s[36:37] +; CHECK-NEXT: s_and_saveexec_b64 s[52:53], s[36:37] ; CHECK-NEXT: s_cbranch_execz .LBB0_10 ; CHECK-NEXT: ; %bb.9: ; %cond.load -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: flat_load_dwordx2 v[8:9], v[0:1] +; CHECK-NEXT: flat_load_dwordx2 v[18:19], v[0:1] ; CHECK-NEXT: .LBB0_10: ; %else ; CHECK-NEXT: s_or_b64 exec, exec, s[52:53] ; CHECK-NEXT: s_mov_b64 s[36:37], exec -; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:1448 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:1452 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:1440 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:1444 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:1424 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:1428 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:1432 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:1436 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:1416 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1420 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:1408 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:1412 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:1496 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1500 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1400 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:1404 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:1264 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1268 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:1480 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:1484 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:1472 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:1476 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:1448 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:1452 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:1464 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:1468 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:1456 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:1460 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:1440 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:1444 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:3304 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:3308 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1432 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:1436 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:1424 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1428 ; 4-byte Folded Reload ; CHECK-NEXT: s_and_b64 s[34:35], s[36:37], s[34:35] ; CHECK-NEXT: s_mov_b64 exec, s[34:35] ; CHECK-NEXT: s_cbranch_execz .LBB0_12 ; CHECK-NEXT: ; %bb.11: ; %cond.load1 -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: flat_load_dwordx2 v[10:11], v[0:1] offset:8 +; CHECK-NEXT: flat_load_dwordx2 v[20:21], v[0:1] offset:8 ; CHECK-NEXT: .LBB0_12: ; %else2 ; CHECK-NEXT: s_or_b64 exec, exec, s[36:37] ; CHECK-NEXT: s_and_saveexec_b64 s[34:35], s[30:31] ; CHECK-NEXT: s_cbranch_execz .LBB0_14 ; CHECK-NEXT: ; %bb.13: ; %cond.load4 ; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: flat_load_dwordx2 v[12:13], v[0:1] offset:16 +; CHECK-NEXT: flat_load_dwordx2 v[2:3], v[0:1] offset:16 ; CHECK-NEXT: .LBB0_14: ; %else5 ; CHECK-NEXT: s_or_b64 exec, exec, s[34:35] ; CHECK-NEXT: s_and_saveexec_b64 s[30:31], s[94:95] @@ -838,28 +2858,34 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: s_cbranch_execz .LBB0_24 ; CHECK-NEXT: ; %bb.23: ; %cond.load19 ; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: flat_load_dwordx2 v[18:19], v[0:1] offset:56 +; CHECK-NEXT: flat_load_dwordx2 v[4:5], v[0:1] offset:56 ; CHECK-NEXT: .LBB0_24: ; %else20 ; CHECK-NEXT: s_or_b64 exec, exec, s[88:89] ; CHECK-NEXT: s_and_saveexec_b64 s[78:79], s[76:77] ; CHECK-NEXT: s_cbranch_execz .LBB0_26 ; CHECK-NEXT: ; %bb.25: ; %cond.load22 -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: flat_load_dwordx2 v[26:27], v[0:1] offset:64 +; CHECK-NEXT: flat_load_dwordx2 v[6:7], v[0:1] offset:64 +; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:1136 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:1140 ; 4-byte Folded Spill ; CHECK-NEXT: .LBB0_26: ; %else23 ; CHECK-NEXT: s_or_b64 exec, exec, s[78:79] ; CHECK-NEXT: s_and_saveexec_b64 s[76:77], s[74:75] ; CHECK-NEXT: s_cbranch_execz .LBB0_28 ; CHECK-NEXT: ; %bb.27: ; %cond.load25 ; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: flat_load_dwordx2 v[20:21], v[0:1] offset:72 +; CHECK-NEXT: flat_load_dwordx2 v[34:35], v[0:1] offset:72 ; CHECK-NEXT: .LBB0_28: ; %else26 ; CHECK-NEXT: s_or_b64 exec, exec, s[76:77] ; CHECK-NEXT: s_and_saveexec_b64 s[74:75], s[72:73] ; CHECK-NEXT: s_cbranch_execz .LBB0_30 ; CHECK-NEXT: ; %bb.29: ; %cond.load28 -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: flat_load_dwordx2 v[28:29], v[0:1] offset:80 +; CHECK-NEXT: flat_load_dwordx2 v[6:7], v[0:1] offset:80 +; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:1144 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:1148 ; 4-byte Folded Spill ; CHECK-NEXT: .LBB0_30: ; %else29 ; CHECK-NEXT: s_or_b64 exec, exec, s[74:75] ; CHECK-NEXT: s_and_saveexec_b64 s[72:73], s[62:63] @@ -879,160 +2905,175 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: s_and_saveexec_b64 s[60:61], s[58:59] ; CHECK-NEXT: s_cbranch_execz .LBB0_36 ; CHECK-NEXT: ; %bb.35: ; %cond.load37 -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: flat_load_dwordx2 v[2:3], v[0:1] offset:104 +; CHECK-NEXT: flat_load_dwordx2 v[6:7], v[0:1] offset:104 ; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) -; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:1128 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:1128 ; 4-byte Folded Spill ; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:1132 ; 4-byte Folded Spill +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:1132 ; 4-byte Folded Spill ; CHECK-NEXT: .LBB0_36: ; %else38 ; CHECK-NEXT: s_or_b64 exec, exec, s[60:61] ; CHECK-NEXT: s_and_saveexec_b64 s[58:59], s[56:57] ; CHECK-NEXT: s_cbranch_execz .LBB0_38 ; CHECK-NEXT: ; %bb.37: ; %cond.load40 -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: flat_load_dwordx2 a[26:27], v[0:1] offset:112 +; CHECK-NEXT: flat_load_dwordx2 v[6:7], v[0:1] offset:112 +; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; CHECK-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:1152 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:1156 ; 4-byte Folded Spill ; CHECK-NEXT: .LBB0_38: ; %else41 ; CHECK-NEXT: s_or_b64 exec, exec, s[58:59] +; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; CHECK-NEXT: v_accvgpr_write_b32 a0, v2 +; CHECK-NEXT: v_accvgpr_write_b32 a1, v3 ; CHECK-NEXT: s_and_saveexec_b64 s[56:57], vcc ; CHECK-NEXT: s_cbranch_execz .LBB0_40 ; CHECK-NEXT: ; %bb.39: ; %cond.load43 -; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: flat_load_dwordx2 a[28:29], v[0:1] offset:120 +; CHECK-NEXT: flat_load_dwordx2 v[0:1], v[0:1] offset:120 +; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:1160 ; 4-byte Folded Spill +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:1164 ; 4-byte Folded Spill ; CHECK-NEXT: .LBB0_40: ; %else44 ; CHECK-NEXT: s_or_b64 exec, exec, s[56:57] -; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:984 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:988 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:1128 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:1132 ; 4-byte Folded Reload -; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) -; CHECK-NEXT: v_accvgpr_read_b32 v4, a28 -; CHECK-NEXT: v_accvgpr_read_b32 v5, a29 -; CHECK-NEXT: v_lshrrev_b32_e32 v2, 15, v5 +; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:1152 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:1156 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:1160 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:1164 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:992 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:996 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:1144 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1148 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:1136 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1140 ; 4-byte Folded Reload ; CHECK-NEXT: v_and_b32_e32 v31, 0x7fffffff, v31 ; CHECK-NEXT: v_and_b32_e32 v33, 0x7fffffff, v33 -; CHECK-NEXT: v_and_b32_e32 v29, 0x7fffffff, v29 -; CHECK-NEXT: v_and_b32_e32 v21, 0x7fffffff, v21 -; CHECK-NEXT: v_and_b32_e32 v27, 0x7fffffff, v27 -; CHECK-NEXT: v_and_b32_e32 v19, 0x7fffffff, v19 +; CHECK-NEXT: v_and_b32_e32 v35, 0x7fffffff, v35 ; CHECK-NEXT: v_and_b32_e32 v25, 0x7fffffff, v25 ; CHECK-NEXT: v_and_b32_e32 v17, 0x7fffffff, v17 -; CHECK-NEXT: v_and_b32_e32 v23, 0x7fffffff, v23 +; CHECK-NEXT: v_and_b32_e32 v5, 0x7fffffff, v5 ; CHECK-NEXT: v_and_b32_e32 v15, 0x7fffffff, v15 -; CHECK-NEXT: v_and_b32_e32 v13, 0x7fffffff, v13 -; CHECK-NEXT: v_and_b32_e32 v11, 0x7fffffff, v11 -; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x7c, v34 -; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc -; CHECK-NEXT: flat_store_short v[0:1], v2 -; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x78, v34 -; CHECK-NEXT: v_alignbit_b32 v2, v5, v4, 15 -; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc -; CHECK-NEXT: flat_store_dword v[0:1], v2 -; CHECK-NEXT: v_accvgpr_read_b32 v2, a26 -; CHECK-NEXT: v_accvgpr_read_b32 v3, a27 -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 31, v10 -; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v9 +; CHECK-NEXT: v_and_b32_e32 v21, 0x7fffffff, v21 +; CHECK-NEXT: v_and_b32_e32 v23, 0x7fffffff, v23 +; CHECK-NEXT: s_waitcnt vmcnt(7) +; CHECK-NEXT: v_lshlrev_b32_e32 v0, 17, v8 ; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3 -; CHECK-NEXT: v_or_b32_e32 v9, v1, v0 -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 17, v4 -; CHECK-NEXT: v_lshrrev_b64 v[4:5], 14, v[2:3] -; CHECK-NEXT: v_and_b32_e32 v37, 0x7fffffff, v37 -; CHECK-NEXT: v_or_b32_e32 v5, v5, v0 -; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 24, v34 -; CHECK-NEXT: v_lshlrev_b32_e32 v6, 18, v2 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 13, v[36:37] -; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v35, vcc -; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:80 -; CHECK-NEXT: v_lshlrev_b32_e32 v6, 20, v30 -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 19, v36 -; CHECK-NEXT: v_lshrrev_b64 v[4:5], 12, v[30:31] -; CHECK-NEXT: v_or_b32_e32 v5, v5, v2 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 11, v[32:33] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:64 -; CHECK-NEXT: v_lshlrev_b32_e32 v6, 22, v28 +; CHECK-NEXT: v_lshrrev_b64 v[12:13], 14, v[2:3] +; CHECK-NEXT: v_or_b32_e32 v13, v13, v0 +; CHECK-NEXT: v_lshlrev_b32_e32 v0, 18, v2 +; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:1128 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:1132 ; 4-byte Folded Reload +; CHECK-NEXT: s_waitcnt vmcnt(4) +; CHECK-NEXT: v_and_b32_e32 v29, 0x7fffffff, v29 +; CHECK-NEXT: s_waitcnt vmcnt(2) +; CHECK-NEXT: v_and_b32_e32 v27, 0x7fffffff, v27 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3 +; CHECK-NEXT: v_lshrrev_b64 v[10:11], 13, v[2:3] +; CHECK-NEXT: v_or_b32_e32 v11, v11, v0 +; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 24, v6 +; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v7, vcc +; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[10:13] offset:80 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 19, v2 +; CHECK-NEXT: v_lshrrev_b64 v[12:13], 12, v[30:31] +; CHECK-NEXT: v_or_b32_e32 v13, v13, v2 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 20, v30 +; CHECK-NEXT: v_lshrrev_b64 v[10:11], 11, v[32:33] +; CHECK-NEXT: v_or_b32_e32 v11, v11, v2 +; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[10:13] offset:64 ; CHECK-NEXT: v_lshlrev_b32_e32 v2, 21, v32 -; CHECK-NEXT: v_lshrrev_b64 v[4:5], 10, v[28:29] -; CHECK-NEXT: v_or_b32_e32 v5, v5, v2 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 9, v[20:21] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:48 -; CHECK-NEXT: v_lshlrev_b32_e32 v6, 26, v24 -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 23, v20 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 8, v[26:27] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 -; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[2:3] offset:64 +; CHECK-NEXT: v_lshrrev_b64 v[12:13], 10, v[28:29] +; CHECK-NEXT: v_or_b32_e32 v13, v13, v2 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 22, v28 +; CHECK-NEXT: v_lshrrev_b64 v[10:11], 9, v[34:35] +; CHECK-NEXT: v_or_b32_e32 v11, v11, v2 +; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[10:13] offset:48 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 25, v4 +; CHECK-NEXT: v_lshrrev_b64 v[12:13], 6, v[24:25] +; CHECK-NEXT: v_or_b32_e32 v13, v13, v2 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 26, v24 +; CHECK-NEXT: v_lshrrev_b64 v[10:11], 5, v[16:17] +; CHECK-NEXT: v_or_b32_e32 v11, v11, v2 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 7, v[4:5] ; CHECK-NEXT: v_lshlrev_b32_e32 v4, 24, v26 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 7, v[18:19] ; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 ; CHECK-NEXT: flat_store_dwordx2 v[0:1], v[2:3] offset:32 -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 25, v18 -; CHECK-NEXT: v_lshrrev_b64 v[4:5], 6, v[24:25] -; CHECK-NEXT: v_or_b32_e32 v5, v5, v2 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 5, v[16:17] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:16 -; CHECK-NEXT: v_lshrrev_b64 v[10:11], 1, v[10:11] -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 27, v16 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 4, v[22:23] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 -; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[2:3] offset:32 ; CHECK-NEXT: v_lshlrev_b32_e32 v4, 28, v22 ; CHECK-NEXT: v_lshrrev_b64 v[2:3], 3, v[14:15] ; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 +; CHECK-NEXT: v_accvgpr_read_b32 v5, a1 +; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[10:13] offset:16 ; CHECK-NEXT: flat_store_dwordx2 v[0:1], v[2:3] +; CHECK-NEXT: v_and_b32_e32 v0, 0x7fffffff, v19 +; CHECK-NEXT: v_lshlrev_b32_e32 v1, 31, v20 +; CHECK-NEXT: v_accvgpr_read_b32 v4, a0 +; CHECK-NEXT: v_or_b32_e32 v19, v0, v1 +; CHECK-NEXT: v_lshrrev_b64 v[20:21], 1, v[20:21] +; CHECK-NEXT: v_lshlrev_b32_e32 v0, 30, v4 +; CHECK-NEXT: v_or_b32_e32 v21, v21, v0 +; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x7c, v6 +; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v7, vcc +; CHECK-NEXT: v_lshrrev_b32_e32 v2, 15, v9 +; CHECK-NEXT: flat_store_short v[0:1], v2 +; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x78, v6 +; CHECK-NEXT: v_alignbit_b32 v2, v9, v8, 15 +; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v7, vcc +; CHECK-NEXT: flat_store_dword v[0:1], v2 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 23, v34 +; CHECK-NEXT: v_lshrrev_b64 v[0:1], 8, v[26:27] +; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 +; CHECK-NEXT: flat_store_dwordx2 v[6:7], v[0:1] offset:64 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 27, v16 +; CHECK-NEXT: v_lshrrev_b64 v[0:1], 4, v[22:23] +; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 +; CHECK-NEXT: v_and_b32_e32 v5, 0x7fffffff, v5 +; CHECK-NEXT: flat_store_dwordx2 v[6:7], v[0:1] offset:32 ; CHECK-NEXT: v_lshlrev_b32_e32 v2, 29, v14 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 2, v[12:13] +; CHECK-NEXT: v_lshrrev_b64 v[0:1], 2, v[4:5] ; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 -; CHECK-NEXT: flat_store_dwordx2 v[34:35], v[0:1] offset:16 -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 30, v12 -; CHECK-NEXT: v_or_b32_e32 v11, v11, v0 -; CHECK-NEXT: flat_store_dwordx4 v[34:35], v[8:11] +; CHECK-NEXT: flat_store_dwordx4 v[6:7], v[18:21] +; CHECK-NEXT: flat_store_dwordx2 v[6:7], v[0:1] offset:16 ; CHECK-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; CHECK-NEXT: ; kill: killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; CHECK-NEXT: .LBB0_41: ; %Flow ; CHECK-NEXT: s_andn2_saveexec_b64 s[56:57], s[50:51] ; CHECK-NEXT: s_cbranch_execz .LBB0_43 ; CHECK-NEXT: ; %bb.42: ; %bb0a -; CHECK-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:984 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:988 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:1000 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:1004 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:1008 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:1012 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:1016 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:1020 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:1024 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:1028 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:1032 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:1036 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:1040 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:1044 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:1048 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:1052 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:1056 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:1060 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:1064 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:1068 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:1072 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1076 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:1080 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1084 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:1088 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1092 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1096 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:1100 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:1104 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:1108 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:1112 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:1116 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:1120 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:1124 ; 4-byte Folded Reload +; CHECK-NEXT: v_pk_mov_b32 v[8:9], v[38:39], v[38:39] op_sel:[0,1] +; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:1000 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:1004 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:1008 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:1012 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:1016 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:1020 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:1024 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:1028 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:1032 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:1036 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:1040 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:1044 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:1048 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1052 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:1056 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1060 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:1064 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1068 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1072 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:1076 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:1080 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:1084 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:1088 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:1092 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:1096 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:1100 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:1104 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:1108 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:1112 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:1116 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:1120 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:1124 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:992 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:996 ; 4-byte Folded Reload ; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: v_and_b32_e32 v11, 0x7fffffff, v11 -; CHECK-NEXT: v_and_b32_e32 v13, 0x7fffffff, v13 -; CHECK-NEXT: v_and_b32_e32 v15, 0x7fffffff, v15 ; CHECK-NEXT: v_and_b32_e32 v17, 0x7fffffff, v17 ; CHECK-NEXT: v_and_b32_e32 v19, 0x7fffffff, v19 ; CHECK-NEXT: v_and_b32_e32 v21, 0x7fffffff, v21 @@ -1040,75 +3081,80 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: v_and_b32_e32 v25, 0x7fffffff, v25 ; CHECK-NEXT: v_and_b32_e32 v27, 0x7fffffff, v27 ; CHECK-NEXT: v_and_b32_e32 v29, 0x7fffffff, v29 +; CHECK-NEXT: v_lshlrev_b32_e32 v4, 24, v30 ; CHECK-NEXT: v_and_b32_e32 v31, 0x7fffffff, v31 ; CHECK-NEXT: v_and_b32_e32 v33, 0x7fffffff, v33 ; CHECK-NEXT: v_and_b32_e32 v35, 0x7fffffff, v35 -; CHECK-NEXT: v_lshlrev_b32_e32 v6, 18, v36 -; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x7c, v52 -; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v53, vcc -; CHECK-NEXT: v_lshrrev_b32_e32 v2, 15, v39 -; CHECK-NEXT: flat_store_short v[0:1], v2 -; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x78, v52 -; CHECK-NEXT: v_alignbit_b32 v2, v39, v38, 15 -; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v53, vcc -; CHECK-NEXT: flat_store_dword v[0:1], v2 -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 31, v10 -; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v9 ; CHECK-NEXT: v_and_b32_e32 v37, 0x7fffffff, v37 -; CHECK-NEXT: v_or_b32_e32 v9, v1, v0 -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 17, v38 -; CHECK-NEXT: v_lshrrev_b64 v[4:5], 14, v[36:37] -; CHECK-NEXT: v_or_b32_e32 v5, v5, v0 -; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 24, v52 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 13, v[34:35] -; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v53, vcc -; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:80 -; CHECK-NEXT: v_lshlrev_b32_e32 v6, 20, v32 -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 19, v34 -; CHECK-NEXT: v_lshrrev_b64 v[4:5], 12, v[32:33] -; CHECK-NEXT: v_or_b32_e32 v5, v5, v2 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 11, v[30:31] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:64 -; CHECK-NEXT: v_lshlrev_b32_e32 v6, 22, v28 -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 21, v30 -; CHECK-NEXT: v_lshrrev_b64 v[4:5], 10, v[28:29] -; CHECK-NEXT: v_or_b32_e32 v5, v5, v2 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 9, v[26:27] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:48 -; CHECK-NEXT: v_lshlrev_b32_e32 v6, 26, v20 -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 23, v26 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 8, v[24:25] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 -; CHECK-NEXT: flat_store_dwordx2 v[52:53], v[2:3] offset:64 -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 24, v24 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 7, v[22:23] +; CHECK-NEXT: v_and_b32_e32 v39, 0x7fffffff, v39 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 19, v40 +; CHECK-NEXT: v_and_b32_e32 v41, 0x7fffffff, v41 +; CHECK-NEXT: v_lshrrev_b64 v[10:11], 13, v[40:41] +; CHECK-NEXT: v_and_b32_e32 v43, 0x7fffffff, v43 +; CHECK-NEXT: v_lshlrev_b32_e32 v0, 17, v44 +; CHECK-NEXT: v_lshrrev_b64 v[12:13], 14, v[42:43] +; CHECK-NEXT: v_or_b32_e32 v13, v13, v0 +; CHECK-NEXT: v_lshlrev_b32_e32 v0, 18, v42 +; CHECK-NEXT: v_or_b32_e32 v11, v11, v0 +; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 24, v6 +; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v7, vcc +; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[10:13] offset:80 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: v_lshrrev_b64 v[12:13], 12, v[38:39] +; CHECK-NEXT: v_or_b32_e32 v13, v13, v2 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 20, v38 +; CHECK-NEXT: v_lshrrev_b64 v[10:11], 11, v[36:37] +; CHECK-NEXT: v_or_b32_e32 v11, v11, v2 +; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[10:13] offset:64 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 21, v36 +; CHECK-NEXT: v_lshrrev_b64 v[12:13], 10, v[34:35] +; CHECK-NEXT: v_or_b32_e32 v13, v13, v2 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 22, v34 +; CHECK-NEXT: v_lshrrev_b64 v[10:11], 9, v[32:33] +; CHECK-NEXT: v_or_b32_e32 v11, v11, v2 +; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[10:13] offset:48 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 25, v28 +; CHECK-NEXT: v_lshrrev_b64 v[12:13], 6, v[26:27] +; CHECK-NEXT: v_or_b32_e32 v13, v13, v2 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 26, v26 +; CHECK-NEXT: v_lshrrev_b64 v[10:11], 5, v[24:25] +; CHECK-NEXT: v_or_b32_e32 v11, v11, v2 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 7, v[28:29] ; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 ; CHECK-NEXT: flat_store_dwordx2 v[0:1], v[2:3] offset:32 -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 25, v22 -; CHECK-NEXT: v_lshrrev_b64 v[4:5], 6, v[20:21] -; CHECK-NEXT: v_or_b32_e32 v5, v5, v2 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 5, v[18:19] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:16 -; CHECK-NEXT: v_lshrrev_b64 v[10:11], 1, v[10:11] -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 27, v18 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 4, v[16:17] -; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 -; CHECK-NEXT: flat_store_dwordx2 v[52:53], v[2:3] offset:32 -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 28, v16 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 3, v[14:15] +; CHECK-NEXT: v_lshlrev_b32_e32 v4, 28, v22 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 3, v[20:21] ; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 +; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[10:13] offset:16 ; CHECK-NEXT: flat_store_dwordx2 v[0:1], v[2:3] -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 29, v14 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 2, v[12:13] +; CHECK-NEXT: v_and_b32_e32 v0, 0x7fffffff, v15 +; CHECK-NEXT: v_lshlrev_b32_e32 v1, 31, v16 +; CHECK-NEXT: v_or_b32_e32 v15, v0, v1 +; CHECK-NEXT: v_lshrrev_b64 v[16:17], 1, v[16:17] +; CHECK-NEXT: v_lshlrev_b32_e32 v0, 30, v18 +; CHECK-NEXT: v_or_b32_e32 v17, v17, v0 +; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x7c, v6 +; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v7, vcc +; CHECK-NEXT: v_lshrrev_b32_e32 v2, 15, v45 +; CHECK-NEXT: flat_store_short v[0:1], v2 +; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x78, v6 +; CHECK-NEXT: v_alignbit_b32 v2, v45, v44, 15 +; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v7, vcc +; CHECK-NEXT: flat_store_dword v[0:1], v2 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 23, v32 +; CHECK-NEXT: v_lshrrev_b64 v[0:1], 8, v[30:31] ; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 -; CHECK-NEXT: flat_store_dwordx2 v[52:53], v[0:1] offset:16 -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 30, v12 -; CHECK-NEXT: v_or_b32_e32 v11, v11, v0 -; CHECK-NEXT: flat_store_dwordx4 v[52:53], v[8:11] +; CHECK-NEXT: flat_store_dwordx2 v[6:7], v[0:1] offset:64 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 27, v24 +; CHECK-NEXT: v_lshrrev_b64 v[0:1], 4, v[22:23] +; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 +; CHECK-NEXT: flat_store_dwordx2 v[6:7], v[0:1] offset:32 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 29, v20 +; CHECK-NEXT: v_lshrrev_b64 v[0:1], 2, v[18:19] +; CHECK-NEXT: v_pk_mov_b32 v[38:39], v[8:9], v[8:9] op_sel:[0,1] +; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 +; CHECK-NEXT: flat_store_dwordx4 v[6:7], v[14:17] +; CHECK-NEXT: flat_store_dwordx2 v[6:7], v[0:1] offset:16 ; CHECK-NEXT: .LBB0_43: ; %Flow48 ; CHECK-NEXT: s_or_b64 exec, exec, s[56:57] ; CHECK-NEXT: s_andn2_b64 s[48:49], s[48:49], exec @@ -1121,141 +3167,158 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: s_xor_b64 s[46:47], exec, s[58:59] ; CHECK-NEXT: s_cbranch_execz .LBB0_47 ; CHECK-NEXT: ; %bb.46: ; %bb1b -; CHECK-NEXT: v_accvgpr_read_b32 v31, a31 -; CHECK-NEXT: v_accvgpr_read_b32 v32, a30 -; CHECK-NEXT: v_lshrrev_b32_e32 v33, 15, v31 -; CHECK-NEXT: v_alignbit_b32 v36, v31, v32, 15 -; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:1504 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:1508 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:1512 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:1516 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:1520 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:1524 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:1528 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:1532 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:1536 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:1540 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:1544 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:1548 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:1552 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:1556 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:1560 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:1564 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:1568 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:1572 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:1576 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:1580 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:1584 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:1588 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:1592 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:1596 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:1600 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:1604 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:1608 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1612 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:1616 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1620 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:1624 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1628 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:984 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:988 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:1488 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:1492 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:1480 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:1484 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:992 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:996 ; 4-byte Folded Reload +; CHECK-NEXT: v_accvgpr_read_b32 v31, a61 +; CHECK-NEXT: v_lshrrev_b32_e32 v2, 15, v31 +; CHECK-NEXT: s_add_i32 s58, s32, 0x4fe00 ; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: v_lshlrev_b32_e32 v6, 17, v32 -; CHECK-NEXT: v_and_b32_e32 v59, 0x7fffffff, v59 -; CHECK-NEXT: v_and_b32_e32 v51, 0x7fffffff, v51 -; CHECK-NEXT: v_and_b32_e32 v57, 0x7fffffff, v57 -; CHECK-NEXT: v_and_b32_e32 v49, 0x7fffffff, v49 -; CHECK-NEXT: v_and_b32_e32 v43, 0x7fffffff, v43 -; CHECK-NEXT: v_and_b32_e32 v4, 0x7fffffff, v1 -; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x7c, v10 -; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v11, vcc -; CHECK-NEXT: flat_store_short v[0:1], v33 -; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x78, v10 -; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v11, vcc -; CHECK-NEXT: flat_store_dword v[0:1], v36 -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 31, v42 +; CHECK-NEXT: v_accvgpr_read_b32 v14, a62 +; CHECK-NEXT: v_and_b32_e32 v39, 0x7fffffff, v39 +; CHECK-NEXT: v_and_b32_e32 v61, 0x7fffffff, v61 +; CHECK-NEXT: v_accvgpr_read_b32 v15, a63 +; CHECK-NEXT: v_and_b32_e32 v15, 0x7fffffff, v15 +; CHECK-NEXT: v_accvgpr_read_b32 v12, a60 +; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x7c, v8 +; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v9, vcc +; CHECK-NEXT: flat_store_short v[0:1], v2 +; CHECK-NEXT: buffer_load_dword a0, off, s[0:3], s32 offset:1616 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a1, off, s[0:3], s32 offset:1620 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a2, off, s[0:3], s32 offset:1624 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a3, off, s[0:3], s32 offset:1628 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a4, off, s[0:3], s32 offset:1632 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a5, off, s[0:3], s32 offset:1636 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a6, off, s[0:3], s32 offset:1640 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a7, off, s[0:3], s32 offset:1644 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a8, off, s[0:3], s32 offset:1648 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a9, off, s[0:3], s32 offset:1652 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a10, off, s[0:3], s32 offset:1656 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a11, off, s[0:3], s32 offset:1660 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a12, off, s[0:3], s32 offset:1664 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a13, off, s[0:3], s32 offset:1668 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a14, off, s[0:3], s32 offset:1672 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a15, off, s[0:3], s32 offset:1676 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a16, off, s[0:3], s32 offset:1680 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a17, off, s[0:3], s32 offset:1684 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a18, off, s[0:3], s32 offset:1688 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a19, off, s[0:3], s32 offset:1692 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a20, off, s[0:3], s32 offset:1696 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a21, off, s[0:3], s32 offset:1700 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a22, off, s[0:3], s32 offset:1704 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a23, off, s[0:3], s32 offset:1708 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a24, off, s[0:3], s32 offset:1712 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a25, off, s[0:3], s32 offset:1716 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a26, off, s[0:3], s32 offset:1720 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a27, off, s[0:3], s32 offset:1724 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a28, off, s[0:3], s32 offset:1728 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a29, off, s[0:3], s32 offset:1732 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a30, off, s[0:3], s32 offset:1736 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a31, off, s[0:3], s32 offset:1740 ; 4-byte Folded Reload +; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 0x78, v8 +; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v9, vcc +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v30, a30 +; CHECK-NEXT: v_alignbit_b32 v2, v31, v30, 15 +; CHECK-NEXT: flat_store_dword v[0:1], v2 +; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s58 ; 4-byte Folded Reload +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: buffer_load_dword v3, off, s[0:3], s58 offset:4 ; 4-byte Folded Reload +; CHECK-NEXT: s_add_i32 s58, s32, 0x45c00 +; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s58 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v11, off, s[0:3], s58 offset:4 ; 4-byte Folded Reload +; CHECK-NEXT: v_accvgpr_read_b32 v1, a33 +; CHECK-NEXT: v_lshlrev_b32_e32 v0, 31, v14 +; CHECK-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1 +; CHECK-NEXT: v_or_b32_e32 v13, v1, v0 +; CHECK-NEXT: v_lshlrev_b32_e32 v0, 17, v30 +; CHECK-NEXT: v_lshrrev_b64 v[14:15], 1, v[14:15] +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_lshlrev_b32_e32 v6, 18, v2 ; CHECK-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3 -; CHECK-NEXT: v_or_b32_e32 v41, v4, v0 ; CHECK-NEXT: v_lshrrev_b64 v[4:5], 14, v[2:3] -; CHECK-NEXT: v_and_b32_e32 v9, 0x7fffffff, v9 -; CHECK-NEXT: v_or_b32_e32 v5, v5, v6 -; CHECK-NEXT: v_lshlrev_b32_e32 v6, 18, v2 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 13, v[8:9] +; CHECK-NEXT: v_and_b32_e32 v11, 0x7fffffff, v11 +; CHECK-NEXT: v_or_b32_e32 v5, v5, v0 +; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 24, v8 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 13, v[10:11] +; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v9, vcc ; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 -; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:1472 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:1476 ; 4-byte Folded Reload -; CHECK-NEXT: v_add_co_u32_e32 v0, vcc, 24, v10 -; CHECK-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v11, vcc +; CHECK-NEXT: v_accvgpr_read_b32 v6, a44 ; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:80 -; CHECK-NEXT: v_lshrrev_b64 v[42:43], 1, v[42:43] -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 19, v8 -; CHECK-NEXT: v_accvgpr_read_b32 v8, a32 -; CHECK-NEXT: v_accvgpr_read_b32 v9, a33 -; CHECK-NEXT: v_and_b32_e32 v9, 0x7fffffff, v9 -; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_accvgpr_read_b32 v7, a45 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 19, v10 +; CHECK-NEXT: v_accvgpr_read_b32 v10, a42 ; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v7 +; CHECK-NEXT: v_accvgpr_read_b32 v11, a43 ; CHECK-NEXT: v_lshrrev_b64 v[4:5], 12, v[6:7] +; CHECK-NEXT: v_and_b32_e32 v11, 0x7fffffff, v11 ; CHECK-NEXT: v_or_b32_e32 v5, v5, v2 ; CHECK-NEXT: v_lshlrev_b32_e32 v6, 20, v6 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 11, v[8:9] +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 11, v[10:11] ; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 -; CHECK-NEXT: v_accvgpr_read_b32 v6, a34 -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:64 -; CHECK-NEXT: v_accvgpr_read_b32 v7, a35 -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 21, v8 -; CHECK-NEXT: v_accvgpr_read_b32 v8, a24 +; CHECK-NEXT: v_accvgpr_read_b32 v6, a46 +; CHECK-NEXT: v_accvgpr_read_b32 v7, a47 ; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v7 -; CHECK-NEXT: v_accvgpr_read_b32 v9, a25 +; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:64 +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 21, v10 ; CHECK-NEXT: v_lshrrev_b64 v[4:5], 10, v[6:7] -; CHECK-NEXT: v_and_b32_e32 v9, 0x7fffffff, v9 ; CHECK-NEXT: v_or_b32_e32 v5, v5, v2 ; CHECK-NEXT: v_lshlrev_b32_e32 v6, 22, v6 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 9, v[8:9] +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 9, v[38:39] ; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 +; CHECK-NEXT: v_accvgpr_read_b32 v6, a40 +; CHECK-NEXT: v_accvgpr_read_b32 v7, a41 +; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v7 ; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:48 -; CHECK-NEXT: v_accvgpr_read_b32 v6, a22 -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 23, v8 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 8, v[58:59] +; CHECK-NEXT: v_accvgpr_read_b32 v10, a54 +; CHECK-NEXT: v_lshlrev_b32_e32 v4, 23, v38 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 8, v[6:7] ; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 -; CHECK-NEXT: flat_store_dwordx2 v[10:11], v[2:3] offset:64 -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 24, v58 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 7, v[50:51] -; CHECK-NEXT: v_accvgpr_read_b32 v7, a23 -; CHECK-NEXT: v_accvgpr_read_b32 v8, a20 +; CHECK-NEXT: v_lshlrev_b32_e32 v4, 24, v6 +; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:1744 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:1748 ; 4-byte Folded Reload +; CHECK-NEXT: v_accvgpr_read_b32 v11, a55 +; CHECK-NEXT: flat_store_dwordx2 v[8:9], v[2:3] offset:64 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 7, v[60:61] ; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 -; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v7 -; CHECK-NEXT: v_accvgpr_read_b32 v9, a21 ; CHECK-NEXT: flat_store_dwordx2 v[0:1], v[2:3] offset:32 -; CHECK-NEXT: v_lshlrev_b32_e32 v2, 25, v50 +; CHECK-NEXT: v_lshlrev_b32_e32 v2, 25, v60 +; CHECK-NEXT: v_and_b32_e32 v11, 0x7fffffff, v11 +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v7 ; CHECK-NEXT: v_lshrrev_b64 v[4:5], 6, v[6:7] -; CHECK-NEXT: v_and_b32_e32 v9, 0x7fffffff, v9 ; CHECK-NEXT: v_or_b32_e32 v5, v5, v2 ; CHECK-NEXT: v_lshlrev_b32_e32 v6, 26, v6 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 5, v[8:9] +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 5, v[10:11] ; CHECK-NEXT: v_or_b32_e32 v3, v3, v6 -; CHECK-NEXT: v_accvgpr_read_b32 v6, a6 +; CHECK-NEXT: v_accvgpr_read_b32 v6, a58 +; CHECK-NEXT: v_accvgpr_read_b32 v7, a59 +; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v7 ; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[2:5] offset:16 -; CHECK-NEXT: v_accvgpr_read_b32 v7, a7 -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 27, v8 -; CHECK-NEXT: v_lshrrev_b64 v[2:3], 4, v[56:57] +; CHECK-NEXT: s_nop 0 +; CHECK-NEXT: v_lshlrev_b32_e32 v4, 27, v10 +; CHECK-NEXT: v_lshrrev_b64 v[2:3], 4, v[6:7] ; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 +; CHECK-NEXT: v_lshlrev_b32_e32 v4, 28, v6 +; CHECK-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:1752 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:1756 ; 4-byte Folded Reload +; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: v_and_b32_e32 v7, 0x7fffffff, v7 -; CHECK-NEXT: flat_store_dwordx2 v[10:11], v[2:3] offset:32 -; CHECK-NEXT: v_lshlrev_b32_e32 v4, 28, v56 +; CHECK-NEXT: flat_store_dwordx2 v[8:9], v[2:3] offset:32 ; CHECK-NEXT: v_lshrrev_b64 v[2:3], 3, v[6:7] ; CHECK-NEXT: v_or_b32_e32 v3, v3, v4 +; CHECK-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:1760 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:1764 ; 4-byte Folded Reload +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_and_b32_e32 v5, 0x7fffffff, v5 ; CHECK-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; CHECK-NEXT: v_lshlrev_b32_e32 v2, 29, v6 -; CHECK-NEXT: v_lshrrev_b64 v[0:1], 2, v[48:49] +; CHECK-NEXT: v_lshrrev_b64 v[0:1], 2, v[4:5] ; CHECK-NEXT: v_or_b32_e32 v1, v1, v2 -; CHECK-NEXT: flat_store_dwordx2 v[10:11], v[0:1] offset:16 -; CHECK-NEXT: v_lshlrev_b32_e32 v0, 30, v48 -; CHECK-NEXT: v_or_b32_e32 v43, v43, v0 -; CHECK-NEXT: flat_store_dwordx4 v[10:11], v[40:43] +; CHECK-NEXT: flat_store_dwordx2 v[8:9], v[0:1] offset:16 +; CHECK-NEXT: v_lshlrev_b32_e32 v0, 30, v4 +; CHECK-NEXT: v_or_b32_e32 v15, v15, v0 +; CHECK-NEXT: flat_store_dwordx4 v[8:9], v[12:15] ; CHECK-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; CHECK-NEXT: ; kill: killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; CHECK-NEXT: ; implicit-def: $vgpr0_vgpr1 @@ -1266,70 +3329,70 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: s_andn2_saveexec_b64 s[46:47], s[46:47] ; CHECK-NEXT: s_cbranch_execz .LBB0_49 ; CHECK-NEXT: ; %bb.48: ; %bb1a -; CHECK-NEXT: buffer_load_dword a32, off, s[0:3], s32 offset:1136 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a33, off, s[0:3], s32 offset:1140 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a34, off, s[0:3], s32 offset:1144 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a35, off, s[0:3], s32 offset:1148 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a36, off, s[0:3], s32 offset:1152 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a37, off, s[0:3], s32 offset:1156 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a38, off, s[0:3], s32 offset:1160 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a39, off, s[0:3], s32 offset:1164 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a40, off, s[0:3], s32 offset:1168 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a41, off, s[0:3], s32 offset:1172 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a42, off, s[0:3], s32 offset:1176 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a43, off, s[0:3], s32 offset:1180 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a44, off, s[0:3], s32 offset:1184 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a45, off, s[0:3], s32 offset:1188 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a46, off, s[0:3], s32 offset:1192 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a47, off, s[0:3], s32 offset:1196 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a48, off, s[0:3], s32 offset:1200 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a49, off, s[0:3], s32 offset:1204 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a50, off, s[0:3], s32 offset:1208 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a51, off, s[0:3], s32 offset:1212 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a52, off, s[0:3], s32 offset:1216 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a53, off, s[0:3], s32 offset:1220 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a54, off, s[0:3], s32 offset:1224 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a55, off, s[0:3], s32 offset:1228 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a56, off, s[0:3], s32 offset:1232 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a57, off, s[0:3], s32 offset:1236 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a58, off, s[0:3], s32 offset:1240 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a59, off, s[0:3], s32 offset:1244 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a60, off, s[0:3], s32 offset:1248 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a61, off, s[0:3], s32 offset:1252 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a62, off, s[0:3], s32 offset:1256 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a63, off, s[0:3], s32 offset:1260 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a0, off, s[0:3], s32 offset:1272 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a1, off, s[0:3], s32 offset:1276 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a2, off, s[0:3], s32 offset:1280 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a3, off, s[0:3], s32 offset:1284 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a4, off, s[0:3], s32 offset:1288 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a5, off, s[0:3], s32 offset:1292 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a6, off, s[0:3], s32 offset:1296 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a7, off, s[0:3], s32 offset:1300 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a8, off, s[0:3], s32 offset:1304 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a9, off, s[0:3], s32 offset:1308 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a10, off, s[0:3], s32 offset:1312 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a11, off, s[0:3], s32 offset:1316 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a12, off, s[0:3], s32 offset:1320 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a13, off, s[0:3], s32 offset:1324 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a14, off, s[0:3], s32 offset:1328 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a15, off, s[0:3], s32 offset:1332 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a16, off, s[0:3], s32 offset:1336 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a17, off, s[0:3], s32 offset:1340 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a18, off, s[0:3], s32 offset:1344 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a19, off, s[0:3], s32 offset:1348 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a20, off, s[0:3], s32 offset:1352 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a21, off, s[0:3], s32 offset:1356 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a22, off, s[0:3], s32 offset:1360 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a23, off, s[0:3], s32 offset:1364 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a24, off, s[0:3], s32 offset:1368 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a25, off, s[0:3], s32 offset:1372 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a26, off, s[0:3], s32 offset:1376 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a27, off, s[0:3], s32 offset:1380 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a28, off, s[0:3], s32 offset:1384 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a29, off, s[0:3], s32 offset:1388 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a30, off, s[0:3], s32 offset:1392 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword a31, off, s[0:3], s32 offset:1396 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a32, off, s[0:3], s32 offset:1168 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a33, off, s[0:3], s32 offset:1172 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a34, off, s[0:3], s32 offset:1176 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a35, off, s[0:3], s32 offset:1180 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a36, off, s[0:3], s32 offset:1184 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a37, off, s[0:3], s32 offset:1188 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a38, off, s[0:3], s32 offset:1192 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a39, off, s[0:3], s32 offset:1196 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a40, off, s[0:3], s32 offset:1200 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a41, off, s[0:3], s32 offset:1204 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a42, off, s[0:3], s32 offset:1208 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a43, off, s[0:3], s32 offset:1212 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a44, off, s[0:3], s32 offset:1216 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a45, off, s[0:3], s32 offset:1220 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a46, off, s[0:3], s32 offset:1224 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a47, off, s[0:3], s32 offset:1228 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a48, off, s[0:3], s32 offset:1232 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a49, off, s[0:3], s32 offset:1236 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a50, off, s[0:3], s32 offset:1240 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a51, off, s[0:3], s32 offset:1244 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a52, off, s[0:3], s32 offset:1248 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a53, off, s[0:3], s32 offset:1252 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a54, off, s[0:3], s32 offset:1256 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a55, off, s[0:3], s32 offset:1260 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a56, off, s[0:3], s32 offset:1264 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a57, off, s[0:3], s32 offset:1268 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a58, off, s[0:3], s32 offset:1272 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a59, off, s[0:3], s32 offset:1276 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a60, off, s[0:3], s32 offset:1280 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a61, off, s[0:3], s32 offset:1284 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a62, off, s[0:3], s32 offset:1288 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a63, off, s[0:3], s32 offset:1292 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a0, off, s[0:3], s32 offset:1296 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a1, off, s[0:3], s32 offset:1300 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a2, off, s[0:3], s32 offset:1304 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a3, off, s[0:3], s32 offset:1308 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a4, off, s[0:3], s32 offset:1312 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a5, off, s[0:3], s32 offset:1316 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a6, off, s[0:3], s32 offset:1320 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a7, off, s[0:3], s32 offset:1324 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a8, off, s[0:3], s32 offset:1328 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a9, off, s[0:3], s32 offset:1332 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a10, off, s[0:3], s32 offset:1336 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a11, off, s[0:3], s32 offset:1340 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a12, off, s[0:3], s32 offset:1344 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a13, off, s[0:3], s32 offset:1348 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a14, off, s[0:3], s32 offset:1352 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a15, off, s[0:3], s32 offset:1356 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a16, off, s[0:3], s32 offset:1360 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a17, off, s[0:3], s32 offset:1364 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a18, off, s[0:3], s32 offset:1368 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a19, off, s[0:3], s32 offset:1372 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a20, off, s[0:3], s32 offset:1376 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a21, off, s[0:3], s32 offset:1380 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a22, off, s[0:3], s32 offset:1384 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a23, off, s[0:3], s32 offset:1388 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a24, off, s[0:3], s32 offset:1392 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a25, off, s[0:3], s32 offset:1396 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a26, off, s[0:3], s32 offset:1400 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a27, off, s[0:3], s32 offset:1404 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a28, off, s[0:3], s32 offset:1408 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a29, off, s[0:3], s32 offset:1412 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a30, off, s[0:3], s32 offset:1416 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword a31, off, s[0:3], s32 offset:1420 ; 4-byte Folded Reload ; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: v_accvgpr_read_b32 v0, a0 ; CHECK-NEXT: v_accvgpr_read_b32 v30, a30 @@ -1340,7 +3403,7 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: v_accvgpr_read_b32 v32, a34 ; CHECK-NEXT: v_accvgpr_read_b32 v33, a35 ; CHECK-NEXT: v_accvgpr_read_b32 v34, a36 -; CHECK-NEXT: v_accvgpr_read_b32 v36, a38 +; CHECK-NEXT: v_accvgpr_read_b32 v48, a50 ; CHECK-NEXT: v_accvgpr_read_b32 v32, a28 ; CHECK-NEXT: v_accvgpr_read_b32 v28, a60 ; CHECK-NEXT: v_accvgpr_read_b32 v30, a62 @@ -1353,18 +3416,18 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: v_accvgpr_read_b32 v26, a26 ; CHECK-NEXT: v_accvgpr_read_b32 v27, a27 ; CHECK-NEXT: v_accvgpr_read_b32 v29, a29 -; CHECK-NEXT: v_accvgpr_read_b32 v37, a39 -; CHECK-NEXT: v_accvgpr_read_b32 v38, a40 -; CHECK-NEXT: v_accvgpr_read_b32 v39, a41 +; CHECK-NEXT: v_accvgpr_read_b32 v49, a51 +; CHECK-NEXT: v_accvgpr_read_b32 v50, a52 +; CHECK-NEXT: v_accvgpr_read_b32 v51, a53 ; CHECK-NEXT: v_accvgpr_read_b32 v59, a61 -; CHECK-NEXT: v_cndmask_b32_e64 v36, v28, v32, s[44:45] +; CHECK-NEXT: v_cndmask_b32_e64 v48, v28, v32, s[6:7] ; CHECK-NEXT: v_accvgpr_read_b32 v33, a31 ; CHECK-NEXT: v_accvgpr_read_b32 v31, a63 ; CHECK-NEXT: v_accvgpr_read_b32 v34, a30 ; CHECK-NEXT: v_accvgpr_read_b32 v30, a62 -; CHECK-NEXT: v_cndmask_b32_e64 v37, v59, v29, s[44:45] -; CHECK-NEXT: v_cndmask_b32_e64 v39, v31, v33, s[40:41] -; CHECK-NEXT: v_cndmask_b32_e64 v38, v30, v34, s[40:41] +; CHECK-NEXT: v_cndmask_b32_e64 v49, v59, v29, s[6:7] +; CHECK-NEXT: v_cndmask_b32_e64 v51, v31, v33, s[4:5] +; CHECK-NEXT: v_cndmask_b32_e64 v50, v30, v34, s[4:5] ; CHECK-NEXT: v_accvgpr_read_b32 v31, a27 ; CHECK-NEXT: v_accvgpr_read_b32 v16, a16 ; CHECK-NEXT: v_accvgpr_read_b32 v17, a17 @@ -1379,7 +3442,7 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: v_accvgpr_read_b32 v21, a17 ; CHECK-NEXT: v_accvgpr_read_b32 v20, a16 ; CHECK-NEXT: v_accvgpr_read_b32 v16, a48 -; CHECK-NEXT: v_accvgpr_read_b32 v49, a51 +; CHECK-NEXT: v_accvgpr_read_b32 v53, a55 ; CHECK-NEXT: v_accvgpr_read_b32 v29, a25 ; CHECK-NEXT: v_accvgpr_read_b32 v28, a24 ; CHECK-NEXT: v_accvgpr_read_b32 v20, a52 @@ -1390,7 +3453,7 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: v_accvgpr_read_b32 v25, a57 ; CHECK-NEXT: v_accvgpr_read_b32 v26, a58 ; CHECK-NEXT: v_accvgpr_read_b32 v27, a59 -; CHECK-NEXT: v_cndmask_b32_e64 v49, v25, v29, s[42:43] +; CHECK-NEXT: v_cndmask_b32_e64 v53, v25, v29, s[14:15] ; CHECK-NEXT: v_accvgpr_read_b32 v28, a24 ; CHECK-NEXT: v_accvgpr_read_b32 v17, a49 ; CHECK-NEXT: v_accvgpr_read_b32 v18, a50 @@ -1405,9 +3468,9 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: v_accvgpr_read_b32 v32, a30 ; CHECK-NEXT: v_accvgpr_read_b32 v16, a48 ; CHECK-NEXT: v_accvgpr_read_b32 v26, a58 -; CHECK-NEXT: v_accvgpr_read_b32 v48, a50 -; CHECK-NEXT: v_accvgpr_read_b32 v50, a52 -; CHECK-NEXT: v_accvgpr_read_b32 v51, a53 +; CHECK-NEXT: v_accvgpr_read_b32 v52, a54 +; CHECK-NEXT: v_accvgpr_read_b32 v54, a56 +; CHECK-NEXT: v_accvgpr_read_b32 v55, a57 ; CHECK-NEXT: v_accvgpr_read_b32 v30, a26 ; CHECK-NEXT: v_accvgpr_read_b32 v25, a21 ; CHECK-NEXT: v_accvgpr_read_b32 v17, a49 @@ -1421,63 +3484,59 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: v_accvgpr_read_b32 v33, a27 ; CHECK-NEXT: v_accvgpr_read_b32 v27, a59 ; CHECK-NEXT: v_accvgpr_read_b32 v34, a26 -; CHECK-NEXT: v_cndmask_b32_e64 v48, v24, v28, s[42:43] -; CHECK-NEXT: v_cndmask_b32_e64 v51, v27, v33, s[26:27] -; CHECK-NEXT: v_cndmask_b32_e64 v50, v26, v34, s[26:27] +; CHECK-NEXT: v_cndmask_b32_e64 v52, v24, v28, s[14:15] +; CHECK-NEXT: v_cndmask_b32_e64 v55, v27, v33, s[8:9] +; CHECK-NEXT: v_cndmask_b32_e64 v54, v26, v34, s[8:9] ; CHECK-NEXT: v_accvgpr_read_b32 v31, a23 ; CHECK-NEXT: v_accvgpr_read_b32 v16, a48 -; CHECK-NEXT: v_accvgpr_read_b32 v53, a55 -; CHECK-NEXT: v_accvgpr_read_b32 v29, a21 -; CHECK-NEXT: v_accvgpr_read_b32 v24, a16 -; CHECK-NEXT: v_accvgpr_read_b32 v20, a52 -; CHECK-NEXT: v_accvgpr_read_b32 v21, a53 -; CHECK-NEXT: v_accvgpr_read_b32 v22, a54 -; CHECK-NEXT: v_accvgpr_read_b32 v23, a55 -; CHECK-NEXT: v_cndmask_b32_e64 v53, v21, v29, s[28:29] -; CHECK-NEXT: v_accvgpr_read_b32 v24, a20 -; CHECK-NEXT: v_accvgpr_read_b32 v17, a49 -; CHECK-NEXT: v_accvgpr_read_b32 v18, a50 -; CHECK-NEXT: v_accvgpr_read_b32 v19, a51 -; CHECK-NEXT: v_accvgpr_read_b32 v20, a16 +; CHECK-NEXT: v_accvgpr_read_b32 v39, a41 ; CHECK-NEXT: v_accvgpr_read_b32 v32, a26 -; CHECK-NEXT: v_accvgpr_read_b32 v23, a19 -; CHECK-NEXT: v_accvgpr_read_b32 v22, a18 -; CHECK-NEXT: v_accvgpr_read_b32 v16, a48 ; CHECK-NEXT: v_accvgpr_read_b32 v30, a22 +; CHECK-NEXT: v_accvgpr_read_b32 v29, a21 ; CHECK-NEXT: v_accvgpr_read_b32 v28, a20 -; CHECK-NEXT: v_accvgpr_read_b32 v18, a50 -; CHECK-NEXT: v_accvgpr_read_b32 v19, a51 -; CHECK-NEXT: v_accvgpr_read_b32 v33, a23 -; CHECK-NEXT: v_accvgpr_read_b32 v22, a54 -; CHECK-NEXT: v_accvgpr_read_b32 v52, a54 -; CHECK-NEXT: v_accvgpr_read_b32 v54, a56 -; CHECK-NEXT: v_accvgpr_read_b32 v55, a57 +; CHECK-NEXT: v_accvgpr_read_b32 v21, a53 +; CHECK-NEXT: v_cndmask_b32_e64 v39, v21, v29, s[18:19] +; CHECK-NEXT: v_accvgpr_read_b32 v32, a20 +; CHECK-NEXT: v_accvgpr_read_b32 v35, a37 +; CHECK-NEXT: v_accvgpr_read_b32 v38, a40 ; CHECK-NEXT: v_accvgpr_read_b32 v20, a52 -; CHECK-NEXT: v_accvgpr_read_b32 v32, a22 -; CHECK-NEXT: v_accvgpr_read_b32 v23, a55 ; CHECK-NEXT: v_accvgpr_read_b32 v31, a19 -; CHECK-NEXT: v_accvgpr_read_b32 v34, a22 +; CHECK-NEXT: v_accvgpr_read_b32 v30, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v36, a38 +; CHECK-NEXT: v_accvgpr_read_b32 v17, a49 ; CHECK-NEXT: v_accvgpr_read_b32 v18, a50 +; CHECK-NEXT: v_accvgpr_read_b32 v19, a51 +; CHECK-NEXT: v_cndmask_b32_e64 v38, v20, v32, s[18:19] +; CHECK-NEXT: v_accvgpr_read_b32 v35, a23 +; CHECK-NEXT: v_accvgpr_read_b32 v33, a19 ; CHECK-NEXT: v_accvgpr_read_b32 v40, a42 ; CHECK-NEXT: v_accvgpr_read_b32 v41, a43 +; CHECK-NEXT: v_accvgpr_read_b32 v22, a54 +; CHECK-NEXT: v_accvgpr_read_b32 v23, a55 +; CHECK-NEXT: v_accvgpr_read_b32 v34, a22 +; CHECK-NEXT: v_accvgpr_read_b32 v36, a22 +; CHECK-NEXT: v_accvgpr_read_b32 v32, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v16, a48 ; CHECK-NEXT: v_accvgpr_read_b32 v42, a44 ; CHECK-NEXT: v_accvgpr_read_b32 v43, a45 +; CHECK-NEXT: v_accvgpr_read_b32 v44, a46 +; CHECK-NEXT: v_accvgpr_read_b32 v45, a47 ; CHECK-NEXT: v_accvgpr_read_b32 v27, a19 ; CHECK-NEXT: v_accvgpr_read_b32 v26, a18 ; CHECK-NEXT: v_accvgpr_read_b32 v25, a17 -; CHECK-NEXT: v_accvgpr_read_b32 v21, a17 -; CHECK-NEXT: v_accvgpr_read_b32 v17, a49 -; CHECK-NEXT: v_cndmask_b32_e64 v52, v20, v24, s[28:29] -; CHECK-NEXT: v_cndmask_b32_e64 v55, v23, v33, s[22:23] -; CHECK-NEXT: v_accvgpr_read_b32 v30, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v24, a16 ; CHECK-NEXT: v_accvgpr_read_b32 v29, a17 ; CHECK-NEXT: v_accvgpr_read_b32 v28, a16 -; CHECK-NEXT: v_cndmask_b32_e64 v54, v22, v34, s[22:23] -; CHECK-NEXT: v_accvgpr_read_b32 v20, a16 -; CHECK-NEXT: v_accvgpr_read_b32 v16, a48 -; CHECK-NEXT: v_accvgpr_read_b32 v33, a19 +; CHECK-NEXT: v_cndmask_b32_e64 v41, v23, v35, s[10:11] +; CHECK-NEXT: v_cndmask_b32_e64 v40, v22, v36, s[10:11] +; CHECK-NEXT: v_accvgpr_read_b32 v31, a17 +; CHECK-NEXT: v_accvgpr_read_b32 v30, a16 +; CHECK-NEXT: v_accvgpr_read_b32 v17, a49 +; CHECK-NEXT: v_accvgpr_read_b32 v18, a50 ; CHECK-NEXT: v_accvgpr_read_b32 v19, a51 -; CHECK-NEXT: v_accvgpr_read_b32 v34, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v32, a16 +; CHECK-NEXT: v_accvgpr_read_b32 v35, a19 +; CHECK-NEXT: v_accvgpr_read_b32 v36, a18 ; CHECK-NEXT: v_accvgpr_read_b32 v1, a1 ; CHECK-NEXT: v_accvgpr_read_b32 v2, a2 ; CHECK-NEXT: v_accvgpr_read_b32 v3, a3 @@ -1493,125 +3552,125 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: v_accvgpr_read_b32 v13, a13 ; CHECK-NEXT: v_accvgpr_read_b32 v14, a14 ; CHECK-NEXT: v_accvgpr_read_b32 v15, a15 -; CHECK-NEXT: v_cndmask_b32_e64 v41, v17, v29, s[24:25] -; CHECK-NEXT: v_cndmask_b32_e64 v40, v16, v20, s[24:25] -; CHECK-NEXT: v_cndmask_b32_e64 v43, v19, v33, s[18:19] -; CHECK-NEXT: v_cndmask_b32_e64 v42, v18, v34, s[18:19] -; CHECK-NEXT: v_accvgpr_read_b32 v31, a15 +; CHECK-NEXT: v_cndmask_b32_e64 v43, v17, v31, s[20:21] +; CHECK-NEXT: v_cndmask_b32_e64 v42, v16, v32, s[20:21] +; CHECK-NEXT: v_cndmask_b32_e64 v45, v19, v35, s[12:13] +; CHECK-NEXT: v_cndmask_b32_e64 v44, v18, v36, s[12:13] +; CHECK-NEXT: v_accvgpr_read_b32 v33, a15 ; CHECK-NEXT: v_accvgpr_read_b32 v0, a32 -; CHECK-NEXT: v_accvgpr_read_b32 v30, a14 +; CHECK-NEXT: v_accvgpr_read_b32 v32, a14 ; CHECK-NEXT: v_accvgpr_read_b32 v12, a44 ; CHECK-NEXT: v_accvgpr_read_b32 v13, a45 -; CHECK-NEXT: v_accvgpr_read_b32 v29, a13 -; CHECK-NEXT: v_accvgpr_read_b32 v28, a12 -; CHECK-NEXT: v_accvgpr_read_b32 v27, a11 -; CHECK-NEXT: v_accvgpr_read_b32 v26, a10 -; CHECK-NEXT: v_accvgpr_read_b32 v25, a9 -; CHECK-NEXT: v_accvgpr_read_b32 v24, a8 -; CHECK-NEXT: v_accvgpr_read_b32 v23, a7 -; CHECK-NEXT: v_accvgpr_read_b32 v22, a6 -; CHECK-NEXT: v_accvgpr_read_b32 v21, a5 -; CHECK-NEXT: v_accvgpr_read_b32 v20, a4 -; CHECK-NEXT: v_accvgpr_read_b32 v17, a1 -; CHECK-NEXT: v_accvgpr_read_b32 v16, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v31, a13 ; CHECK-NEXT: v_accvgpr_read_b32 v30, a12 -; CHECK-NEXT: v_cndmask_b32_e64 v17, v13, v29, s[20:21] -; CHECK-NEXT: v_cndmask_b32_e64 v16, v12, v30, s[20:21] -; CHECK-NEXT: v_accvgpr_read_b32 v31, a11 -; CHECK-NEXT: v_accvgpr_read_b32 v32, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v29, a11 +; CHECK-NEXT: v_accvgpr_read_b32 v28, a10 +; CHECK-NEXT: v_accvgpr_read_b32 v27, a9 +; CHECK-NEXT: v_accvgpr_read_b32 v26, a8 +; CHECK-NEXT: v_accvgpr_read_b32 v25, a7 +; CHECK-NEXT: v_accvgpr_read_b32 v24, a6 +; CHECK-NEXT: v_accvgpr_read_b32 v23, a5 +; CHECK-NEXT: v_accvgpr_read_b32 v22, a4 +; CHECK-NEXT: v_accvgpr_read_b32 v19, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v18, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v32, a12 +; CHECK-NEXT: v_cndmask_b32_e64 v19, v13, v31, s[22:23] +; CHECK-NEXT: v_cndmask_b32_e64 v18, v12, v32, s[22:23] +; CHECK-NEXT: v_accvgpr_read_b32 v33, a11 ; CHECK-NEXT: v_accvgpr_read_b32 v9, a41 -; CHECK-NEXT: v_accvgpr_read_b32 v30, a10 -; CHECK-NEXT: v_accvgpr_read_b32 v29, a9 -; CHECK-NEXT: v_accvgpr_read_b32 v28, a8 -; CHECK-NEXT: v_accvgpr_read_b32 v27, a7 -; CHECK-NEXT: v_accvgpr_read_b32 v26, a6 -; CHECK-NEXT: v_accvgpr_read_b32 v25, a5 -; CHECK-NEXT: v_accvgpr_read_b32 v24, a4 -; CHECK-NEXT: v_accvgpr_read_b32 v23, a3 -; CHECK-NEXT: v_accvgpr_read_b32 v22, a2 -; CHECK-NEXT: v_accvgpr_read_b32 v21, a1 -; CHECK-NEXT: v_accvgpr_read_b32 v33, a15 -; CHECK-NEXT: v_cndmask_b32_e64 v21, v9, v29, s[16:17] +; CHECK-NEXT: v_accvgpr_read_b32 v32, a10 +; CHECK-NEXT: v_accvgpr_read_b32 v31, a9 ; CHECK-NEXT: v_accvgpr_read_b32 v30, a8 -; CHECK-NEXT: v_accvgpr_read_b32 v8, a40 -; CHECK-NEXT: v_accvgpr_read_b32 v15, a47 -; CHECK-NEXT: v_accvgpr_read_b32 v19, a3 -; CHECK-NEXT: v_accvgpr_read_b32 v32, a14 -; CHECK-NEXT: v_accvgpr_read_b32 v20, a0 ; CHECK-NEXT: v_accvgpr_read_b32 v29, a7 ; CHECK-NEXT: v_accvgpr_read_b32 v28, a6 ; CHECK-NEXT: v_accvgpr_read_b32 v27, a5 ; CHECK-NEXT: v_accvgpr_read_b32 v26, a4 ; CHECK-NEXT: v_accvgpr_read_b32 v25, a3 ; CHECK-NEXT: v_accvgpr_read_b32 v24, a2 -; CHECK-NEXT: v_cndmask_b32_e64 v19, v15, v33, s[14:15] -; CHECK-NEXT: v_accvgpr_read_b32 v33, a11 -; CHECK-NEXT: v_cndmask_b32_e64 v20, v8, v30, s[16:17] -; CHECK-NEXT: v_accvgpr_read_b32 v31, a7 -; CHECK-NEXT: v_accvgpr_read_b32 v5, a37 -; CHECK-NEXT: v_accvgpr_read_b32 v11, a43 ; CHECK-NEXT: v_accvgpr_read_b32 v23, a1 -; CHECK-NEXT: v_accvgpr_read_b32 v32, a10 +; CHECK-NEXT: v_cndmask_b32_e64 v23, v9, v31, s[28:29] +; CHECK-NEXT: v_accvgpr_read_b32 v32, a8 +; CHECK-NEXT: v_accvgpr_read_b32 v8, a40 +; CHECK-NEXT: v_accvgpr_read_b32 v22, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v31, a7 ; CHECK-NEXT: v_accvgpr_read_b32 v30, a6 ; CHECK-NEXT: v_accvgpr_read_b32 v29, a5 ; CHECK-NEXT: v_accvgpr_read_b32 v28, a4 ; CHECK-NEXT: v_accvgpr_read_b32 v27, a3 ; CHECK-NEXT: v_accvgpr_read_b32 v26, a2 -; CHECK-NEXT: v_accvgpr_read_b32 v25, a1 -; CHECK-NEXT: v_cndmask_b32_e64 v23, v11, v33, s[10:11] -; CHECK-NEXT: v_cndmask_b32_e64 v25, v5, v29, s[12:13] -; CHECK-NEXT: v_accvgpr_read_b32 v30, a4 +; CHECK-NEXT: v_cndmask_b32_e64 v22, v8, v32, s[28:29] ; CHECK-NEXT: v_accvgpr_read_b32 v33, a7 -; CHECK-NEXT: v_accvgpr_read_b32 v4, a36 -; CHECK-NEXT: v_accvgpr_read_b32 v7, a39 -; CHECK-NEXT: v_accvgpr_read_b32 v24, a0 -; CHECK-NEXT: v_accvgpr_read_b32 v27, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v5, a37 ; CHECK-NEXT: v_accvgpr_read_b32 v32, a6 -; CHECK-NEXT: v_cndmask_b32_e64 v24, v4, v30, s[12:13] -; CHECK-NEXT: v_cndmask_b32_e64 v27, v7, v33, s[6:7] -; CHECK-NEXT: v_accvgpr_read_b32 v33, a3 +; CHECK-NEXT: v_accvgpr_read_b32 v31, a5 +; CHECK-NEXT: v_accvgpr_read_b32 v30, a4 ; CHECK-NEXT: v_accvgpr_read_b32 v29, a3 ; CHECK-NEXT: v_accvgpr_read_b32 v28, a2 -; CHECK-NEXT: v_accvgpr_read_b32 v30, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v27, a1 +; CHECK-NEXT: v_cndmask_b32_e64 v27, v5, v31, s[42:43] +; CHECK-NEXT: v_accvgpr_read_b32 v32, a4 +; CHECK-NEXT: v_accvgpr_read_b32 v4, a36 +; CHECK-NEXT: v_accvgpr_read_b32 v26, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v31, a3 ; CHECK-NEXT: v_accvgpr_read_b32 v30, a2 -; CHECK-NEXT: v_accvgpr_read_b32 v29, a1 -; CHECK-NEXT: v_accvgpr_read_b32 v28, a0 -; CHECK-NEXT: v_accvgpr_read_b32 v29, a1 -; CHECK-NEXT: v_accvgpr_read_b32 v28, a0 +; CHECK-NEXT: v_cndmask_b32_e64 v26, v4, v32, s[42:43] +; CHECK-NEXT: v_accvgpr_read_b32 v33, a3 ; CHECK-NEXT: v_accvgpr_read_b32 v1, a33 -; CHECK-NEXT: v_accvgpr_read_b32 v28, a0 -; CHECK-NEXT: v_cndmask_b32_e64 v29, v1, v29, s[4:5] -; CHECK-NEXT: v_cndmask_b32_e64 v28, v0, v28, s[4:5] -; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:984 ; 4-byte Folded Reload -; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:988 ; 4-byte Folded Reload -; CHECK-NEXT: v_accvgpr_read_b32 v14, a46 -; CHECK-NEXT: v_accvgpr_read_b32 v18, a2 +; CHECK-NEXT: v_accvgpr_read_b32 v32, a2 +; CHECK-NEXT: v_accvgpr_read_b32 v31, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v30, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v9, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v32, a2 +; CHECK-NEXT: v_accvgpr_read_b32 v8, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v0, a32 +; CHECK-NEXT: v_accvgpr_read_b32 v31, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v30, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v1, a33 +; CHECK-NEXT: v_accvgpr_read_b32 v8, a0 +; CHECK-NEXT: v_cndmask_b32_e64 v31, v1, v9, s[44:45] +; CHECK-NEXT: v_cndmask_b32_e64 v30, v0, v8, s[44:45] +; CHECK-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:992 ; 4-byte Folded Reload +; CHECK-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:996 ; 4-byte Folded Reload +; CHECK-NEXT: v_accvgpr_read_b32 v34, a18 +; CHECK-NEXT: v_accvgpr_read_b32 v35, a15 +; CHECK-NEXT: v_accvgpr_read_b32 v15, a47 +; CHECK-NEXT: v_accvgpr_read_b32 v21, a3 ; CHECK-NEXT: v_accvgpr_read_b32 v34, a14 +; CHECK-NEXT: v_accvgpr_read_b32 v14, a46 +; CHECK-NEXT: v_accvgpr_read_b32 v20, a2 +; CHECK-NEXT: v_cndmask_b32_e64 v21, v15, v35, s[16:17] +; CHECK-NEXT: v_accvgpr_read_b32 v36, a14 +; CHECK-NEXT: v_accvgpr_read_b32 v35, a11 ; CHECK-NEXT: v_accvgpr_read_b32 v2, a34 ; CHECK-NEXT: v_accvgpr_read_b32 v3, a35 ; CHECK-NEXT: v_accvgpr_read_b32 v10, a42 -; CHECK-NEXT: v_cndmask_b32_e64 v18, v14, v34, s[14:15] -; CHECK-NEXT: v_accvgpr_read_b32 v22, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v11, a43 +; CHECK-NEXT: v_cndmask_b32_e64 v20, v14, v36, s[16:17] +; CHECK-NEXT: v_accvgpr_read_b32 v25, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v24, a0 ; CHECK-NEXT: v_accvgpr_read_b32 v34, a10 -; CHECK-NEXT: v_accvgpr_read_b32 v31, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v36, a10 ; CHECK-NEXT: v_accvgpr_read_b32 v6, a38 -; CHECK-NEXT: v_cndmask_b32_e64 v22, v10, v34, s[10:11] -; CHECK-NEXT: v_accvgpr_read_b32 v26, a0 -; CHECK-NEXT: v_accvgpr_read_b32 v34, a6 -; CHECK-NEXT: v_cndmask_b32_e64 v31, v3, v33, s[8:9] -; CHECK-NEXT: v_cndmask_b32_e64 v30, v2, v30, s[8:9] -; CHECK-NEXT: v_cndmask_b32_e64 v26, v6, v34, s[6:7] +; CHECK-NEXT: v_accvgpr_read_b32 v7, a39 +; CHECK-NEXT: v_cndmask_b32_e64 v25, v11, v35, s[24:25] +; CHECK-NEXT: v_cndmask_b32_e64 v24, v10, v36, s[24:25] +; CHECK-NEXT: v_accvgpr_read_b32 v29, a1 +; CHECK-NEXT: v_accvgpr_read_b32 v28, a0 +; CHECK-NEXT: v_accvgpr_read_b32 v35, a7 +; CHECK-NEXT: v_accvgpr_read_b32 v36, a6 +; CHECK-NEXT: v_cndmask_b32_e64 v33, v3, v33, s[40:41] +; CHECK-NEXT: v_cndmask_b32_e64 v32, v2, v32, s[40:41] +; CHECK-NEXT: v_cndmask_b32_e64 v29, v7, v35, s[26:27] +; CHECK-NEXT: v_cndmask_b32_e64 v28, v6, v36, s[26:27] ; CHECK-NEXT: s_waitcnt vmcnt(0) -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[28:31] -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[24:27] offset:16 -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[20:23] offset:32 -; CHECK-NEXT: v_accvgpr_read_b32 v35, a37 -; CHECK-NEXT: v_add_co_u32_e32 v20, vcc, 48, v0 -; CHECK-NEXT: v_addc_co_u32_e32 v21, vcc, 0, v1, vcc -; CHECK-NEXT: v_add_co_u32_e32 v4, vcc, 0x70, v0 -; CHECK-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v1, vcc -; CHECK-NEXT: v_accvgpr_read_b32 v44, a46 -; CHECK-NEXT: v_accvgpr_read_b32 v45, a47 +; CHECK-NEXT: flat_store_dwordx4 v[8:9], v[30:33] +; CHECK-NEXT: flat_store_dwordx4 v[8:9], v[26:29] offset:16 +; CHECK-NEXT: flat_store_dwordx4 v[8:9], v[22:25] offset:32 +; CHECK-NEXT: v_accvgpr_read_b32 v37, a39 +; CHECK-NEXT: v_add_co_u32_e32 v22, vcc, 48, v8 +; CHECK-NEXT: v_addc_co_u32_e32 v23, vcc, 0, v9, vcc +; CHECK-NEXT: v_add_co_u32_e32 v4, vcc, 0x70, v8 +; CHECK-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v9, vcc ; CHECK-NEXT: v_accvgpr_read_b32 v46, a48 ; CHECK-NEXT: v_accvgpr_read_b32 v47, a49 ; CHECK-NEXT: v_accvgpr_read_b32 v56, a58 @@ -1619,12 +3678,12 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: v_accvgpr_read_b32 v58, a60 ; CHECK-NEXT: v_accvgpr_read_b32 v60, a62 ; CHECK-NEXT: v_accvgpr_read_b32 v61, a63 -; CHECK-NEXT: v_accvgpr_read_b32 v32, a2 -; CHECK-NEXT: flat_store_dwordx4 v[20:21], v[16:19] -; CHECK-NEXT: flat_store_dwordx4 v[0:1], v[40:43] offset:64 -; CHECK-NEXT: flat_store_dwordx4 v[20:21], v[52:55] offset:32 -; CHECK-NEXT: flat_store_dwordx4 v[20:21], v[48:51] offset:48 -; CHECK-NEXT: flat_store_dwordx4 v[4:5], v[36:39] +; CHECK-NEXT: v_accvgpr_read_b32 v34, a6 +; CHECK-NEXT: flat_store_dwordx4 v[22:23], v[18:21] +; CHECK-NEXT: flat_store_dwordx4 v[8:9], v[42:45] offset:64 +; CHECK-NEXT: flat_store_dwordx4 v[22:23], v[38:41] offset:32 +; CHECK-NEXT: flat_store_dwordx4 v[22:23], v[52:55] offset:48 +; CHECK-NEXT: flat_store_dwordx4 v[4:5], v[48:51] ; CHECK-NEXT: .LBB0_49: ; %UnifiedReturnBlock ; CHECK-NEXT: s_or_b64 exec, exec, s[56:57] ; CHECK-NEXT: buffer_load_dword a63, off, s[0:3], s32 offset:796 ; 4-byte Folded Reload @@ -1691,7 +3750,8 @@ define void @f(ptr %p, <16 x i1> %m, <16 x i63> %pt, <16 x i1> %sc, ; CHECK-NEXT: v_readlane_b32 s35, v63, 1 ; CHECK-NEXT: v_readlane_b32 s34, v63, 0 ; CHECK-NEXT: s_or_saveexec_b64 s[4:5], -1 -; CHECK-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:1632 ; 4-byte Folded Reload +; CHECK-NEXT: s_add_i32 s6, s32, 0x50000 +; CHECK-NEXT: buffer_load_dword v63, off, s[0:3], s6 ; 4-byte Folded Reload ; CHECK-NEXT: s_mov_b64 exec, s[4:5] ; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; CHECK-NEXT: s_setpc_b64 s[30:31] diff --git a/llvm/test/CodeGen/AMDGPU/sra.ll b/llvm/test/CodeGen/AMDGPU/sra.ll index c7e7927c37da3..2cbbc1c1396ea 100644 --- a/llvm/test/CodeGen/AMDGPU/sra.ll +++ b/llvm/test/CodeGen/AMDGPU/sra.ll @@ -602,46 +602,46 @@ define amdgpu_kernel void @ashr_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %i ; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_mov_b32 s8, s2 ; SI-NEXT: s_mov_b32 s9, s3 -; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:48 -; SI-NEXT: buffer_load_dwordx4 v[3:6], off, s[8:11], 0 offset:16 -; SI-NEXT: buffer_load_dwordx4 v[7:10], off, s[8:11], 0 -; SI-NEXT: buffer_load_dwordx4 v[11:14], off, s[8:11], 0 offset:32 +; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 +; SI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:32 +; SI-NEXT: buffer_load_dwordx4 v[11:14], off, s[8:11], 0 offset:48 ; SI-NEXT: s_mov_b32 s4, s0 ; SI-NEXT: s_mov_b32 s5, s1 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_ashr_i64 v[5:6], v[5:6], v2 -; SI-NEXT: v_ashr_i64 v[3:4], v[3:4], v0 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_ashr_i64 v[2:3], v[2:3], v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_ashr_i64 v[9:10], v[9:10], v13 -; SI-NEXT: v_ashr_i64 v[7:8], v[7:8], v11 -; SI-NEXT: buffer_store_dwordx4 v[3:6], off, s[4:7], 0 offset:16 -; SI-NEXT: buffer_store_dwordx4 v[7:10], off, s[4:7], 0 +; SI-NEXT: v_ashr_i64 v[6:7], v[6:7], v13 +; SI-NEXT: v_ashr_i64 v[4:5], v[4:5], v11 +; SI-NEXT: v_ashr_i64 v[0:1], v[0:1], v8 +; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:16 +; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 ; SI-NEXT: s_endpgm ; ; VI-LABEL: ashr_v4i64: ; VI: ; %bb.0: -; VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24 -; VI-NEXT: s_mov_b32 s3, 0xf000 -; VI-NEXT: s_mov_b32 s2, -1 -; VI-NEXT: s_mov_b32 s10, s2 -; VI-NEXT: s_mov_b32 s11, s3 +; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 +; VI-NEXT: s_mov_b32 s7, 0xf000 +; VI-NEXT: s_mov_b32 s6, -1 +; VI-NEXT: s_mov_b32 s10, s6 +; VI-NEXT: s_mov_b32 s11, s7 ; VI-NEXT: s_waitcnt lgkmcnt(0) -; VI-NEXT: s_mov_b32 s8, s6 -; VI-NEXT: s_mov_b32 s9, s7 -; VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:48 -; VI-NEXT: buffer_load_dwordx4 v[3:6], off, s[8:11], 0 offset:16 -; VI-NEXT: buffer_load_dwordx4 v[7:10], off, s[8:11], 0 -; VI-NEXT: buffer_load_dwordx4 v[11:14], off, s[8:11], 0 offset:32 -; VI-NEXT: s_mov_b32 s0, s4 -; VI-NEXT: s_mov_b32 s1, s5 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_ashrrev_i64 v[5:6], v2, v[5:6] -; VI-NEXT: v_ashrrev_i64 v[3:4], v0, v[3:4] +; VI-NEXT: s_mov_b32 s8, s2 +; VI-NEXT: s_mov_b32 s9, s3 +; VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 +; VI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:32 +; VI-NEXT: buffer_load_dwordx4 v[11:14], off, s[8:11], 0 offset:48 +; VI-NEXT: s_mov_b32 s4, s0 +; VI-NEXT: s_mov_b32 s5, s1 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_ashrrev_i64 v[2:3], v10, v[2:3] ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_ashrrev_i64 v[9:10], v13, v[9:10] -; VI-NEXT: v_ashrrev_i64 v[7:8], v11, v[7:8] -; VI-NEXT: buffer_store_dwordx4 v[3:6], off, s[0:3], 0 offset:16 -; VI-NEXT: buffer_store_dwordx4 v[7:10], off, s[0:3], 0 +; VI-NEXT: v_ashrrev_i64 v[6:7], v13, v[6:7] +; VI-NEXT: v_ashrrev_i64 v[4:5], v11, v[4:5] +; VI-NEXT: v_ashrrev_i64 v[0:1], v8, v[0:1] +; VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:16 +; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 ; VI-NEXT: s_endpgm ; ; EG-LABEL: ashr_v4i64: diff --git a/llvm/test/CodeGen/AMDGPU/srem.ll b/llvm/test/CodeGen/AMDGPU/srem.ll index 966042692c194..2db5783fae409 100644 --- a/llvm/test/CodeGen/AMDGPU/srem.ll +++ b/llvm/test/CodeGen/AMDGPU/srem.ll @@ -5534,67 +5534,67 @@ define amdgpu_kernel void @srem_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %i ; TAHITI-NEXT: v_madmk_f32 v11, v18, 0xcf800000, v11 ; TAHITI-NEXT: v_cvt_u32_f32_e32 v18, v18 ; TAHITI-NEXT: v_cvt_u32_f32_e32 v11, v11 -; TAHITI-NEXT: v_mul_lo_u32 v22, v19, v18 -; TAHITI-NEXT: v_mul_hi_u32 v21, v19, v11 +; TAHITI-NEXT: v_mul_lo_u32 v21, v19, v18 +; TAHITI-NEXT: v_mul_hi_u32 v22, v19, v11 ; TAHITI-NEXT: v_mul_lo_u32 v23, v20, v11 -; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v22, v21 +; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v21, v22 ; TAHITI-NEXT: v_mul_lo_u32 v22, v19, v11 ; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v21, v23 ; TAHITI-NEXT: v_mul_lo_u32 v23, v11, v21 ; TAHITI-NEXT: v_mul_hi_u32 v24, v11, v22 ; TAHITI-NEXT: v_mul_hi_u32 v25, v11, v21 -; TAHITI-NEXT: v_mul_hi_u32 v26, v18, v21 -; TAHITI-NEXT: v_mul_lo_u32 v21, v18, v21 ; TAHITI-NEXT: v_add_i32_e32 v23, vcc, v24, v23 ; TAHITI-NEXT: v_addc_u32_e32 v24, vcc, 0, v25, vcc ; TAHITI-NEXT: v_mul_lo_u32 v25, v18, v22 ; TAHITI-NEXT: v_mul_hi_u32 v22, v18, v22 ; TAHITI-NEXT: v_add_i32_e32 v23, vcc, v23, v25 +; TAHITI-NEXT: v_mul_hi_u32 v23, v18, v21 +; TAHITI-NEXT: v_mul_lo_u32 v21, v18, v21 ; TAHITI-NEXT: v_addc_u32_e32 v22, vcc, v24, v22, vcc -; TAHITI-NEXT: v_addc_u32_e32 v23, vcc, 0, v26, vcc +; TAHITI-NEXT: v_addc_u32_e32 v23, vcc, 0, v23, vcc ; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v22, v21 ; TAHITI-NEXT: v_addc_u32_e32 v22, vcc, 0, v23, vcc ; TAHITI-NEXT: v_add_i32_e32 v11, vcc, v11, v21 ; TAHITI-NEXT: v_addc_u32_e32 v18, vcc, v18, v22, vcc -; TAHITI-NEXT: v_mul_lo_u32 v21, v19, v11 -; TAHITI-NEXT: v_mul_lo_u32 v22, v19, v18 -; TAHITI-NEXT: v_mul_hi_u32 v19, v19, v11 +; TAHITI-NEXT: v_mul_lo_u32 v21, v19, v18 +; TAHITI-NEXT: v_mul_hi_u32 v22, v19, v11 ; TAHITI-NEXT: v_mul_lo_u32 v20, v20, v11 -; TAHITI-NEXT: v_mul_hi_u32 v23, v18, v21 -; TAHITI-NEXT: v_add_i32_e32 v19, vcc, v22, v19 -; TAHITI-NEXT: v_add_i32_e32 v19, vcc, v20, v19 -; TAHITI-NEXT: v_mul_lo_u32 v20, v11, v19 -; TAHITI-NEXT: v_mul_hi_u32 v22, v11, v21 -; TAHITI-NEXT: v_mul_hi_u32 v24, v11, v19 -; TAHITI-NEXT: v_mul_lo_u32 v21, v18, v21 -; TAHITI-NEXT: v_add_i32_e32 v20, vcc, v22, v20 -; TAHITI-NEXT: v_addc_u32_e32 v22, vcc, 0, v24, vcc -; TAHITI-NEXT: v_mul_hi_u32 v24, v18, v19 -; TAHITI-NEXT: v_mul_lo_u32 v19, v18, v19 +; TAHITI-NEXT: v_mul_lo_u32 v19, v19, v11 +; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v21, v22 ; TAHITI-NEXT: v_add_i32_e32 v20, vcc, v20, v21 -; TAHITI-NEXT: v_addc_u32_e32 v20, vcc, v22, v23, vcc -; TAHITI-NEXT: v_addc_u32_e32 v21, vcc, 0, v24, vcc -; TAHITI-NEXT: v_add_i32_e32 v19, vcc, v20, v19 -; TAHITI-NEXT: v_addc_u32_e32 v20, vcc, 0, v21, vcc -; TAHITI-NEXT: v_add_i32_e32 v11, vcc, v11, v19 -; TAHITI-NEXT: v_addc_u32_e32 v18, vcc, v18, v20, vcc +; TAHITI-NEXT: v_mul_lo_u32 v21, v11, v20 +; TAHITI-NEXT: v_mul_hi_u32 v22, v11, v19 +; TAHITI-NEXT: v_mul_hi_u32 v23, v11, v20 +; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v22, v21 +; TAHITI-NEXT: v_mul_hi_u32 v22, v18, v19 +; TAHITI-NEXT: v_mul_lo_u32 v19, v18, v19 +; TAHITI-NEXT: v_addc_u32_e32 v23, vcc, 0, v23, vcc +; TAHITI-NEXT: v_add_i32_e32 v19, vcc, v21, v19 +; TAHITI-NEXT: v_mul_hi_u32 v19, v18, v20 +; TAHITI-NEXT: v_mul_lo_u32 v20, v18, v20 +; TAHITI-NEXT: v_addc_u32_e32 v21, vcc, v23, v22, vcc +; TAHITI-NEXT: v_addc_u32_e32 v19, vcc, 0, v19, vcc +; TAHITI-NEXT: v_add_i32_e32 v20, vcc, v21, v20 +; TAHITI-NEXT: v_addc_u32_e32 v19, vcc, 0, v19, vcc +; TAHITI-NEXT: v_add_i32_e32 v11, vcc, v11, v20 +; TAHITI-NEXT: v_addc_u32_e32 v18, vcc, v18, v19, vcc ; TAHITI-NEXT: v_ashrrev_i32_e32 v19, 31, v15 ; TAHITI-NEXT: v_add_i32_e32 v20, vcc, v14, v19 ; TAHITI-NEXT: v_xor_b32_e32 v20, v20, v19 ; TAHITI-NEXT: v_mul_lo_u32 v21, v20, v18 ; TAHITI-NEXT: v_mul_hi_u32 v22, v20, v11 -; TAHITI-NEXT: v_mul_hi_u32 v23, v20, v18 ; TAHITI-NEXT: v_addc_u32_e32 v15, vcc, v15, v19, vcc +; TAHITI-NEXT: v_mul_hi_u32 v23, v20, v18 ; TAHITI-NEXT: v_xor_b32_e32 v15, v15, v19 ; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v22, v21 -; TAHITI-NEXT: v_addc_u32_e32 v22, vcc, 0, v23, vcc -; TAHITI-NEXT: v_mul_lo_u32 v23, v15, v11 +; TAHITI-NEXT: v_mul_lo_u32 v22, v15, v11 +; TAHITI-NEXT: v_addc_u32_e32 v23, vcc, 0, v23, vcc ; TAHITI-NEXT: v_mul_hi_u32 v11, v15, v11 -; TAHITI-NEXT: v_mul_hi_u32 v24, v15, v18 +; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v21, v22 +; TAHITI-NEXT: v_mul_hi_u32 v21, v15, v18 ; TAHITI-NEXT: v_mul_lo_u32 v18, v15, v18 -; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v21, v23 -; TAHITI-NEXT: v_addc_u32_e32 v11, vcc, v22, v11, vcc -; TAHITI-NEXT: v_addc_u32_e32 v21, vcc, 0, v24, vcc +; TAHITI-NEXT: v_addc_u32_e32 v11, vcc, v23, v11, vcc +; TAHITI-NEXT: v_addc_u32_e32 v21, vcc, 0, v21, vcc ; TAHITI-NEXT: v_add_i32_e32 v11, vcc, v11, v18 ; TAHITI-NEXT: v_addc_u32_e32 v18, vcc, 0, v21, vcc ; TAHITI-NEXT: v_mul_lo_u32 v18, v9, v18 @@ -5685,15 +5685,15 @@ define amdgpu_kernel void @srem_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %i ; TAHITI-NEXT: v_mul_lo_u32 v21, v13, v19 ; TAHITI-NEXT: v_mul_hi_u32 v22, v13, v20 ; TAHITI-NEXT: v_mul_hi_u32 v23, v13, v19 -; TAHITI-NEXT: v_mul_hi_u32 v24, v14, v19 -; TAHITI-NEXT: v_mul_lo_u32 v19, v14, v19 ; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v22, v21 -; TAHITI-NEXT: v_addc_u32_e32 v22, vcc, 0, v23, vcc -; TAHITI-NEXT: v_mul_lo_u32 v23, v14, v20 +; TAHITI-NEXT: v_mul_lo_u32 v22, v14, v20 +; TAHITI-NEXT: v_addc_u32_e32 v23, vcc, 0, v23, vcc ; TAHITI-NEXT: v_mul_hi_u32 v20, v14, v20 -; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v21, v23 -; TAHITI-NEXT: v_addc_u32_e32 v20, vcc, v22, v20, vcc -; TAHITI-NEXT: v_addc_u32_e32 v21, vcc, 0, v24, vcc +; TAHITI-NEXT: v_add_i32_e32 v21, vcc, v21, v22 +; TAHITI-NEXT: v_mul_hi_u32 v21, v14, v19 +; TAHITI-NEXT: v_mul_lo_u32 v19, v14, v19 +; TAHITI-NEXT: v_addc_u32_e32 v20, vcc, v23, v20, vcc +; TAHITI-NEXT: v_addc_u32_e32 v21, vcc, 0, v21, vcc ; TAHITI-NEXT: v_add_i32_e32 v19, vcc, v20, v19 ; TAHITI-NEXT: v_addc_u32_e32 v20, vcc, 0, v21, vcc ; TAHITI-NEXT: v_add_i32_e32 v13, vcc, v13, v19 @@ -6301,26 +6301,26 @@ define amdgpu_kernel void @srem_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %i ; TONGA-NEXT: v_mad_u64_u32 v[13:14], s[0:1], v22, v21, 0 ; TONGA-NEXT: v_mul_lo_u32 v18, v23, v21 ; TONGA-NEXT: v_add_u32_e32 v14, vcc, v14, v15 -; TONGA-NEXT: v_add_u32_e32 v24, vcc, v14, v18 -; TONGA-NEXT: v_mad_u64_u32 v[14:15], s[0:1], v21, v24, 0 -; TONGA-NEXT: v_mul_hi_u32 v25, v21, v13 -; TONGA-NEXT: v_mad_u64_u32 v[18:19], s[0:1], v20, v13, 0 -; TONGA-NEXT: v_add_u32_e32 v25, vcc, v25, v14 -; TONGA-NEXT: v_mad_u64_u32 v[13:14], s[0:1], v20, v24, 0 +; TONGA-NEXT: v_add_u32_e32 v18, vcc, v14, v18 +; TONGA-NEXT: v_mul_hi_u32 v19, v21, v13 +; TONGA-NEXT: v_mad_u64_u32 v[14:15], s[0:1], v21, v18, 0 +; TONGA-NEXT: v_add_u32_e32 v19, vcc, v19, v14 +; TONGA-NEXT: v_mad_u64_u32 v[13:14], s[0:1], v20, v13, 0 ; TONGA-NEXT: v_addc_u32_e32 v15, vcc, 0, v15, vcc -; TONGA-NEXT: v_add_u32_e32 v18, vcc, v25, v18 -; TONGA-NEXT: v_addc_u32_e32 v15, vcc, v15, v19, vcc -; TONGA-NEXT: v_addc_u32_e32 v14, vcc, 0, v14, vcc -; TONGA-NEXT: v_add_u32_e32 v13, vcc, v15, v13 +; TONGA-NEXT: v_add_u32_e32 v13, vcc, v19, v13 +; TONGA-NEXT: v_mad_u64_u32 v[18:19], s[0:1], v20, v18, 0 +; TONGA-NEXT: v_addc_u32_e32 v13, vcc, v15, v14, vcc +; TONGA-NEXT: v_addc_u32_e32 v14, vcc, 0, v19, vcc +; TONGA-NEXT: v_add_u32_e32 v13, vcc, v13, v18 ; TONGA-NEXT: v_addc_u32_e32 v14, vcc, 0, v14, vcc ; TONGA-NEXT: v_add_u32_e32 v21, vcc, v21, v13 ; TONGA-NEXT: v_addc_u32_e32 v20, vcc, v20, v14, vcc -; TONGA-NEXT: v_mad_u64_u32 v[13:14], s[0:1], v22, v21, 0 ; TONGA-NEXT: v_mul_lo_u32 v15, v22, v20 +; TONGA-NEXT: v_mad_u64_u32 v[13:14], s[0:1], v22, v21, 0 ; TONGA-NEXT: v_mul_lo_u32 v18, v23, v21 -; TONGA-NEXT: v_mul_hi_u32 v23, v21, v13 ; TONGA-NEXT: v_add_u32_e32 v14, vcc, v15, v14 ; TONGA-NEXT: v_add_u32_e32 v22, vcc, v18, v14 +; TONGA-NEXT: v_mul_hi_u32 v23, v21, v13 ; TONGA-NEXT: v_mad_u64_u32 v[14:15], s[0:1], v21, v22, 0 ; TONGA-NEXT: v_mad_u64_u32 v[18:19], s[0:1], v20, v13, 0 ; TONGA-NEXT: v_add_u32_e32 v23, vcc, v23, v14 @@ -6336,8 +6336,8 @@ define amdgpu_kernel void @srem_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %i ; TONGA-NEXT: v_ashrrev_i32_e32 v20, 31, v17 ; TONGA-NEXT: v_add_u32_e32 v13, vcc, v16, v20 ; TONGA-NEXT: v_xor_b32_e32 v21, v13, v20 -; TONGA-NEXT: v_mad_u64_u32 v[13:14], s[0:1], v21, v19, 0 ; TONGA-NEXT: v_mul_hi_u32 v22, v21, v15 +; TONGA-NEXT: v_mad_u64_u32 v[13:14], s[0:1], v21, v19, 0 ; TONGA-NEXT: v_addc_u32_e32 v17, vcc, v17, v20, vcc ; TONGA-NEXT: v_xor_b32_e32 v23, v17, v20 ; TONGA-NEXT: v_mad_u64_u32 v[17:18], s[0:1], v23, v15, 0 @@ -9017,33 +9017,33 @@ define amdgpu_kernel void @srem_v4i64_4(ptr addrspace(1) %out, ptr addrspace(1) ; TONGA-NEXT: s_waitcnt vmcnt(1) ; TONGA-NEXT: v_ashrrev_i32_e32 v12, 31, v1 ; TONGA-NEXT: v_lshrrev_b32_e32 v12, 30, v12 -; TONGA-NEXT: v_add_u32_e32 v12, vcc, v0, v12 -; TONGA-NEXT: v_addc_u32_e32 v16, vcc, 0, v1, vcc -; TONGA-NEXT: v_and_b32_e32 v12, -4, v12 ; TONGA-NEXT: v_ashrrev_i32_e32 v13, 31, v3 -; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v0, v12 +; TONGA-NEXT: v_add_u32_e32 v12, vcc, v0, v12 ; TONGA-NEXT: v_lshrrev_b32_e32 v13, 30, v13 -; TONGA-NEXT: v_subb_u32_e32 v1, vcc, v1, v16, vcc -; TONGA-NEXT: v_add_u32_e32 v12, vcc, v2, v13 -; TONGA-NEXT: v_addc_u32_e32 v13, vcc, 0, v3, vcc -; TONGA-NEXT: v_and_b32_e32 v12, -4, v12 +; TONGA-NEXT: v_addc_u32_e32 v16, vcc, 0, v1, vcc ; TONGA-NEXT: s_waitcnt vmcnt(0) ; TONGA-NEXT: v_ashrrev_i32_e32 v14, 31, v5 -; TONGA-NEXT: v_ashrrev_i32_e32 v15, 31, v7 -; TONGA-NEXT: v_sub_u32_e32 v2, vcc, v2, v12 +; TONGA-NEXT: v_add_u32_e32 v13, vcc, v2, v13 ; TONGA-NEXT: v_lshrrev_b32_e32 v14, 30, v14 +; TONGA-NEXT: v_addc_u32_e32 v17, vcc, 0, v3, vcc +; TONGA-NEXT: v_ashrrev_i32_e32 v15, 31, v7 +; TONGA-NEXT: v_add_u32_e32 v14, vcc, v4, v14 ; TONGA-NEXT: v_lshrrev_b32_e32 v15, 30, v15 -; TONGA-NEXT: v_subb_u32_e32 v3, vcc, v3, v13, vcc -; TONGA-NEXT: v_add_u32_e64 v12, s[0:1], v4, v14 -; TONGA-NEXT: v_add_u32_e32 v13, vcc, v6, v15 -; TONGA-NEXT: v_addc_u32_e32 v15, vcc, 0, v7, vcc +; TONGA-NEXT: v_addc_u32_e32 v18, vcc, 0, v5, vcc +; TONGA-NEXT: v_add_u32_e32 v15, vcc, v6, v15 +; TONGA-NEXT: v_addc_u32_e32 v19, vcc, 0, v7, vcc ; TONGA-NEXT: v_and_b32_e32 v12, -4, v12 -; TONGA-NEXT: v_addc_u32_e64 v14, s[0:1], 0, v5, s[0:1] -; TONGA-NEXT: v_sub_u32_e32 v4, vcc, v4, v12 +; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v0, v12 ; TONGA-NEXT: v_and_b32_e32 v13, -4, v13 -; TONGA-NEXT: v_subb_u32_e32 v5, vcc, v5, v14, vcc -; TONGA-NEXT: v_sub_u32_e32 v6, vcc, v6, v13 -; TONGA-NEXT: v_subb_u32_e32 v7, vcc, v7, v15, vcc +; TONGA-NEXT: v_subb_u32_e32 v1, vcc, v1, v16, vcc +; TONGA-NEXT: v_sub_u32_e32 v2, vcc, v2, v13 +; TONGA-NEXT: v_and_b32_e32 v14, -4, v14 +; TONGA-NEXT: v_subb_u32_e32 v3, vcc, v3, v17, vcc +; TONGA-NEXT: v_sub_u32_e32 v4, vcc, v4, v14 +; TONGA-NEXT: v_and_b32_e32 v15, -4, v15 +; TONGA-NEXT: v_subb_u32_e32 v5, vcc, v5, v18, vcc +; TONGA-NEXT: v_sub_u32_e32 v6, vcc, v6, v15 +; TONGA-NEXT: v_subb_u32_e32 v7, vcc, v7, v19, vcc ; TONGA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; TONGA-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; TONGA-NEXT: s_endpgm diff --git a/llvm/test/CodeGen/AMDGPU/srl.ll b/llvm/test/CodeGen/AMDGPU/srl.ll index 094f114dd4fdc..69d02b7c0c009 100644 --- a/llvm/test/CodeGen/AMDGPU/srl.ll +++ b/llvm/test/CodeGen/AMDGPU/srl.ll @@ -266,20 +266,20 @@ define amdgpu_kernel void @lshr_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %i ; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_mov_b32 s8, s2 ; SI-NEXT: s_mov_b32 s9, s3 -; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:48 -; SI-NEXT: buffer_load_dwordx4 v[3:6], off, s[8:11], 0 offset:16 -; SI-NEXT: buffer_load_dwordx4 v[7:10], off, s[8:11], 0 -; SI-NEXT: buffer_load_dwordx4 v[11:14], off, s[8:11], 0 offset:32 +; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 +; SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16 +; SI-NEXT: buffer_load_dwordx4 v[8:11], off, s[8:11], 0 offset:32 +; SI-NEXT: buffer_load_dwordx4 v[11:14], off, s[8:11], 0 offset:48 ; SI-NEXT: s_mov_b32 s4, s0 ; SI-NEXT: s_mov_b32 s5, s1 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_lshr_b64 v[5:6], v[5:6], v2 -; SI-NEXT: v_lshr_b64 v[3:4], v[3:4], v0 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshr_b64 v[2:3], v[2:3], v10 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshr_b64 v[9:10], v[9:10], v13 -; SI-NEXT: v_lshr_b64 v[7:8], v[7:8], v11 -; SI-NEXT: buffer_store_dwordx4 v[3:6], off, s[4:7], 0 offset:16 -; SI-NEXT: buffer_store_dwordx4 v[7:10], off, s[4:7], 0 +; SI-NEXT: v_lshr_b64 v[6:7], v[6:7], v13 +; SI-NEXT: v_lshr_b64 v[4:5], v[4:5], v11 +; SI-NEXT: v_lshr_b64 v[0:1], v[0:1], v8 +; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:16 +; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 ; SI-NEXT: s_endpgm ; ; VI-LABEL: lshr_v4i64: diff --git a/llvm/test/CodeGen/AMDGPU/udiv.ll b/llvm/test/CodeGen/AMDGPU/udiv.ll index 17a579c59eeb3..a9eeb77b0faea 100644 --- a/llvm/test/CodeGen/AMDGPU/udiv.ll +++ b/llvm/test/CodeGen/AMDGPU/udiv.ll @@ -841,18 +841,18 @@ define amdgpu_kernel void @udiv_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %i ; GCN-NEXT: v_rcp_f32_e32 v14, v14 ; GCN-NEXT: v_rcp_f32_e32 v16, v16 ; GCN-NEXT: v_mul_f32_e32 v10, 0x4f7ffffe, v10 +; GCN-NEXT: v_cvt_u32_f32_e32 v10, v10 +; GCN-NEXT: v_sub_u32_e32 v11, vcc, 0, v0 ; GCN-NEXT: v_mul_f32_e32 v12, 0x4f7ffffe, v12 ; GCN-NEXT: v_mul_f32_e32 v14, 0x4f7ffffe, v14 ; GCN-NEXT: v_mul_f32_e32 v16, 0x4f7ffffe, v16 -; GCN-NEXT: v_cvt_u32_f32_e32 v10, v10 ; GCN-NEXT: v_cvt_u32_f32_e32 v12, v12 ; GCN-NEXT: v_cvt_u32_f32_e32 v14, v14 ; GCN-NEXT: v_cvt_u32_f32_e32 v16, v16 -; GCN-NEXT: v_sub_u32_e32 v11, vcc, 0, v0 +; GCN-NEXT: v_mul_lo_u32 v11, v11, v10 ; GCN-NEXT: v_sub_u32_e32 v13, vcc, 0, v1 ; GCN-NEXT: v_sub_u32_e32 v15, vcc, 0, v2 ; GCN-NEXT: v_sub_u32_e32 v17, vcc, 0, v3 -; GCN-NEXT: v_mul_lo_u32 v11, v11, v10 ; GCN-NEXT: v_mul_lo_u32 v13, v13, v12 ; GCN-NEXT: v_mul_lo_u32 v15, v15, v14 ; GCN-NEXT: v_mul_lo_u32 v17, v17, v16 @@ -861,54 +861,54 @@ define amdgpu_kernel void @udiv_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %i ; GCN-NEXT: v_mul_hi_u32 v15, v14, v15 ; GCN-NEXT: v_mul_hi_u32 v17, v16, v17 ; GCN-NEXT: v_add_u32_e32 v10, vcc, v10, v11 +; GCN-NEXT: s_waitcnt vmcnt(0) +; GCN-NEXT: v_mul_hi_u32 v10, v6, v10 ; GCN-NEXT: v_add_u32_e32 v11, vcc, v12, v13 ; GCN-NEXT: v_add_u32_e32 v12, vcc, v14, v15 ; GCN-NEXT: v_add_u32_e32 v13, vcc, v16, v17 -; GCN-NEXT: s_waitcnt vmcnt(0) -; GCN-NEXT: v_mul_hi_u32 v10, v6, v10 ; GCN-NEXT: v_mul_hi_u32 v11, v7, v11 ; GCN-NEXT: v_mul_hi_u32 v12, v8, v12 ; GCN-NEXT: v_mul_hi_u32 v13, v9, v13 ; GCN-NEXT: v_mul_lo_u32 v14, v10, v0 ; GCN-NEXT: v_mul_lo_u32 v16, v11, v1 ; GCN-NEXT: v_mul_lo_u32 v18, v12, v2 -; GCN-NEXT: v_mul_lo_u32 v19, v13, v3 +; GCN-NEXT: v_add_u32_e32 v15, vcc, 1, v10 ; GCN-NEXT: v_sub_u32_e32 v6, vcc, v6, v14 +; GCN-NEXT: v_mul_lo_u32 v14, v13, v3 ; GCN-NEXT: v_sub_u32_e32 v7, vcc, v7, v16 ; GCN-NEXT: v_sub_u32_e32 v8, vcc, v8, v18 -; GCN-NEXT: v_sub_u32_e32 v9, vcc, v9, v19 -; GCN-NEXT: v_add_u32_e32 v15, vcc, 1, v10 +; GCN-NEXT: v_sub_u32_e32 v9, vcc, v9, v14 ; GCN-NEXT: v_add_u32_e32 v17, vcc, 1, v11 -; GCN-NEXT: v_add_u32_e32 v14, vcc, 1, v12 +; GCN-NEXT: v_add_u32_e32 v19, vcc, 1, v12 ; GCN-NEXT: v_add_u32_e32 v16, vcc, 1, v13 ; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v6, v0 ; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v7, v1 ; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v2 ; GCN-NEXT: v_cmp_ge_u32_e64 s[6:7], v9, v3 -; GCN-NEXT: v_sub_u32_e32 v18, vcc, v6, v0 +; GCN-NEXT: v_sub_u32_e32 v14, vcc, v6, v0 ; GCN-NEXT: v_cndmask_b32_e64 v10, v10, v15, s[0:1] ; GCN-NEXT: v_sub_u32_e32 v15, vcc, v7, v1 ; GCN-NEXT: v_cndmask_b32_e64 v11, v11, v17, s[2:3] ; GCN-NEXT: v_sub_u32_e32 v17, vcc, v8, v2 -; GCN-NEXT: v_cndmask_b32_e64 v12, v12, v14, s[4:5] -; GCN-NEXT: v_sub_u32_e32 v14, vcc, v9, v3 +; GCN-NEXT: v_cndmask_b32_e64 v12, v12, v19, s[4:5] ; GCN-NEXT: v_cndmask_b32_e64 v13, v13, v16, s[6:7] -; GCN-NEXT: v_cndmask_b32_e64 v6, v6, v18, s[0:1] -; GCN-NEXT: v_add_u32_e32 v16, vcc, 1, v10 +; GCN-NEXT: v_sub_u32_e32 v18, vcc, v9, v3 +; GCN-NEXT: v_cndmask_b32_e64 v6, v6, v14, s[0:1] +; GCN-NEXT: v_add_u32_e32 v14, vcc, 1, v10 ; GCN-NEXT: v_cndmask_b32_e64 v7, v7, v15, s[2:3] ; GCN-NEXT: v_add_u32_e32 v15, vcc, 1, v11 ; GCN-NEXT: v_cndmask_b32_e64 v8, v8, v17, s[4:5] -; GCN-NEXT: v_add_u32_e32 v17, vcc, 1, v12 -; GCN-NEXT: v_cndmask_b32_e64 v9, v9, v14, s[6:7] -; GCN-NEXT: v_add_u32_e32 v14, vcc, 1, v13 +; GCN-NEXT: v_add_u32_e32 v16, vcc, 1, v12 +; GCN-NEXT: v_add_u32_e32 v17, vcc, 1, v13 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v6, v0 -; GCN-NEXT: v_cndmask_b32_e32 v0, v10, v16, vcc +; GCN-NEXT: v_cndmask_b32_e32 v0, v10, v14, vcc ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v7, v1 +; GCN-NEXT: v_cndmask_b32_e64 v9, v9, v18, s[6:7] ; GCN-NEXT: v_cndmask_b32_e32 v1, v11, v15, vcc ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v8, v2 -; GCN-NEXT: v_cndmask_b32_e32 v2, v12, v17, vcc +; GCN-NEXT: v_cndmask_b32_e32 v2, v12, v16, vcc ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v9, v3 -; GCN-NEXT: v_cndmask_b32_e32 v3, v13, v14, vcc +; GCN-NEXT: v_cndmask_b32_e32 v3, v13, v17, vcc ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-NEXT: s_endpgm ; diff --git a/llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll b/llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll index e12028f674d73..071b1a50e9525 100644 --- a/llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll +++ b/llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll @@ -340,15 +340,15 @@ define hidden void @blam() #0 { ; GCN-NEXT: s_getpc_b64 s[16:17] ; GCN-NEXT: s_add_u32 s16, s16, spam@rel32@lo+4 ; GCN-NEXT: s_addc_u32 s17, s17, spam@rel32@hi+12 -; GCN-NEXT: s_mov_b64 s[4:5], s[48:49] -; GCN-NEXT: s_mov_b64 s[6:7], s[38:39] -; GCN-NEXT: s_mov_b64 s[8:9], s[36:37] -; GCN-NEXT: s_mov_b64 s[10:11], s[34:35] +; GCN-NEXT: v_mov_b32_e32 v31, v40 ; GCN-NEXT: s_mov_b32 s12, s65 ; GCN-NEXT: s_mov_b32 s13, s64 ; GCN-NEXT: s_mov_b32 s14, s55 ; GCN-NEXT: s_mov_b32 s15, s54 -; GCN-NEXT: v_mov_b32_e32 v31, v40 +; GCN-NEXT: s_mov_b64 s[4:5], s[48:49] +; GCN-NEXT: s_mov_b64 s[6:7], s[38:39] +; GCN-NEXT: s_mov_b64 s[8:9], s[36:37] +; GCN-NEXT: s_mov_b64 s[10:11], s[34:35] ; GCN-NEXT: s_swappc_b64 s[30:31], s[16:17] ; GCN-NEXT: v_cmp_neq_f32_e32 vcc, 0, v0 ; GCN-NEXT: s_mov_b64 s[6:7], 0 diff --git a/llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll b/llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll index 7c2f25fa78f28..aa1bfb6dba755 100644 --- a/llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll +++ b/llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll @@ -3024,26 +3024,26 @@ define i64 @test_vector_reduce_mul_v8i64(<8 x i64> %v) { ; GFX7-GISEL-LABEL: test_vector_reduce_mul_v8i64: ; GFX7-GISEL: ; %bb.0: ; %entry ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v4, v12, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v4, v13, v[17:18] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v5, v12, v[18:19] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v0, v8, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v4, v16, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[17:18], s[4:5], v0, v9, v[5:6] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[21:22], s[4:5], v4, v20, v[13:14] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v6, v14, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v6, v15, v[5:6] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v2, v10, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[23:24], s[4:5], v7, v14, v[19:20] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v2, v11, v[6:7] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v5, v4, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v5, v23, v[7:8] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[23:24], s[4:5], v3, v10, v[13:14] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v1, v8, v[17:18] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v12, v6, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v23, v4, v[19:20] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v2, v16, v[21:22] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v12, v7, v[1:2] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v2, v10, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v8, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v2, v11, v[19:20] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v6, v14, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v0, v9, v[17:18] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[26:27], s[4:5], v6, v15, v[20:21] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v4, v12, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[30:31], s[4:5], v7, v14, v[26:27] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[28:29], s[4:5], v4, v13, v[21:22] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v18, v19, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v3, v10, v[24:25] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v16, v20, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v5, v12, v[28:29] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v18, v30, v[7:8] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v1, v8, v[22:23] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v2, v6, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v16, v9, v[3:4] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v13, v19, v[4:5] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v10, v20, v[7:8] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v2, v11, v[1:2] ; GFX7-GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v3, v6, v[4:5] ; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] ; @@ -3090,26 +3090,26 @@ define i64 @test_vector_reduce_mul_v8i64(<8 x i64> %v) { ; GFX8-GISEL-LABEL: test_vector_reduce_mul_v8i64: ; GFX8-GISEL: ; %bb.0: ; %entry ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v4, v12, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v4, v13, v[17:18] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v5, v12, v[18:19] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v0, v8, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v4, v16, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[17:18], s[4:5], v0, v9, v[5:6] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[21:22], s[4:5], v4, v20, v[13:14] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v6, v14, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v6, v15, v[5:6] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v2, v10, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[23:24], s[4:5], v7, v14, v[19:20] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v2, v11, v[6:7] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v5, v4, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v5, v23, v[7:8] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[23:24], s[4:5], v3, v10, v[13:14] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v1, v8, v[17:18] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v12, v6, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v23, v4, v[19:20] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v2, v16, v[21:22] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v12, v7, v[1:2] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v2, v10, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v0, v8, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v2, v11, v[19:20] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v6, v14, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v0, v9, v[17:18] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[26:27], s[4:5], v6, v15, v[20:21] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v4, v12, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[30:31], s[4:5], v7, v14, v[26:27] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[28:29], s[4:5], v4, v13, v[21:22] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v18, v19, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v3, v10, v[24:25] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v16, v20, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v5, v12, v[28:29] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v18, v30, v[7:8] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v1, v8, v[22:23] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v2, v6, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v16, v9, v[3:4] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v13, v19, v[4:5] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v10, v20, v[7:8] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v2, v11, v[1:2] ; GFX8-GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v3, v6, v[4:5] ; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31] ; @@ -3411,268 +3411,268 @@ define i64 @test_vector_reduce_mul_v16i64(<16 x i64> %v) { ; GFX7-SDAG: ; %bb.0: ; %entry ; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v19, v2, v19 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v32, v3, v18 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v2, v18, 0 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v27, v10, v27 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v33, v11, v26 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v10, v26, 0 -; GFX7-SDAG-NEXT: v_add_i32_e32 v3, vcc, v3, v19 -; GFX7-SDAG-NEXT: v_add_i32_e32 v32, vcc, v3, v32 ; GFX7-SDAG-NEXT: v_mul_lo_u32 v21, v4, v21 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v4, v20, 0 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v23, v6, v23 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v26, v7, v22 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v6, v22, 0 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v5, v5, v20 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v32, v5, v20 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v4, v20, 0 ; GFX7-SDAG-NEXT: v_mul_lo_u32 v20, v12, v29 ; GFX7-SDAG-NEXT: v_mul_lo_u32 v29, v13, v28 ; GFX7-SDAG-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v12, v28, 0 -; GFX7-SDAG-NEXT: v_add_i32_e32 v11, vcc, v11, v27 -; GFX7-SDAG-NEXT: v_add_i32_e32 v11, vcc, v11, v33 -; GFX7-SDAG-NEXT: v_add_i32_e32 v4, vcc, v4, v21 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v14, v30, 0 -; GFX7-SDAG-NEXT: v_add_i32_e32 v7, vcc, v7, v23 -; GFX7-SDAG-NEXT: v_add_i32_e32 v23, vcc, v4, v5 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v2, v10, 0 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v2, v2, v11 -; GFX7-SDAG-NEXT: v_add_i32_e32 v11, vcc, v13, v20 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v22, v15, v30 ; GFX7-SDAG-NEXT: v_mul_lo_u32 v17, v0, v17 ; GFX7-SDAG-NEXT: v_mul_lo_u32 v28, v1, v16 ; GFX7-SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v0, v16, 0 ; GFX7-SDAG-NEXT: v_mul_lo_u32 v25, v8, v25 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v8, v24, 0 -; GFX7-SDAG-NEXT: v_add_i32_e32 v21, vcc, v7, v26 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v33, v9, v24 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v8, v24, 0 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v23, v6, v23 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v24, v7, v22 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v6, v22, 0 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v19, v2, v19 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v22, v3, v18 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v2, v18, 0 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v18, v10, v27 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v27, v11, v26 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v10, v26, 0 ; GFX7-SDAG-NEXT: v_add_i32_e32 v1, vcc, v1, v17 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v6, v18, 0 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v10, v32, v10 -; GFX7-SDAG-NEXT: v_add_i32_e32 v2, vcc, v5, v2 -; GFX7-SDAG-NEXT: v_add_i32_e32 v11, vcc, v11, v29 -; GFX7-SDAG-NEXT: v_add_i32_e32 v5, vcc, v2, v10 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v26, v15, v30 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v14, v30, 0 +; GFX7-SDAG-NEXT: v_add_i32_e32 v11, vcc, v11, v18 +; GFX7-SDAG-NEXT: v_add_i32_e32 v18, vcc, v1, v28 +; GFX7-SDAG-NEXT: v_add_i32_e32 v5, vcc, v5, v21 +; GFX7-SDAG-NEXT: v_add_i32_e32 v9, vcc, v9, v25 +; GFX7-SDAG-NEXT: v_add_i32_e32 v17, vcc, v5, v32 +; GFX7-SDAG-NEXT: v_add_i32_e32 v5, vcc, v9, v33 +; GFX7-SDAG-NEXT: v_add_i32_e32 v9, vcc, v11, v27 +; GFX7-SDAG-NEXT: v_add_i32_e32 v3, vcc, v3, v19 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v9, v2, v9 +; GFX7-SDAG-NEXT: v_add_i32_e32 v3, vcc, v3, v22 +; GFX7-SDAG-NEXT: v_add_i32_e32 v7, vcc, v7, v23 +; GFX7-SDAG-NEXT: v_add_i32_e32 v7, vcc, v7, v24 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v7, v7, v15 +; GFX7-SDAG-NEXT: v_add_i32_e32 v13, vcc, v13, v20 +; GFX7-SDAG-NEXT: v_add_i32_e32 v13, vcc, v13, v29 ; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX7-SDAG-NEXT: v_mul_lo_u32 v13, v14, v31 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v14, v21, v18 -; GFX7-SDAG-NEXT: v_add_i32_e32 v13, vcc, v19, v13 -; GFX7-SDAG-NEXT: v_add_i32_e32 v13, vcc, v13, v22 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v6, v6, v13 -; GFX7-SDAG-NEXT: v_add_i32_e32 v13, vcc, v1, v28 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v1, v9, v24 -; GFX7-SDAG-NEXT: v_add_i32_e32 v9, vcc, v16, v25 -; GFX7-SDAG-NEXT: v_add_i32_e32 v2, vcc, v8, v6 -; GFX7-SDAG-NEXT: v_add_i32_e32 v1, vcc, v9, v1 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v6, v0, v1 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v0, v15, 0 -; GFX7-SDAG-NEXT: v_add_i32_e32 v8, vcc, v2, v14 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v9, v3, v11 -; GFX7-SDAG-NEXT: v_add_i32_e32 v6, vcc, v1, v6 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v3, v12, 0 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v3, v23, v12 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v10, v13, v15 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v8, v4, v8 -; GFX7-SDAG-NEXT: v_add_i32_e32 v2, vcc, v2, v9 -; GFX7-SDAG-NEXT: v_add_i32_e32 v2, vcc, v2, v3 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v9, v0, v2 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v0, v1, 0 -; GFX7-SDAG-NEXT: v_add_i32_e32 v0, vcc, v6, v10 -; GFX7-SDAG-NEXT: v_add_i32_e32 v6, vcc, v3, v9 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v4, v7, 0 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v9, v0, v1 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v0, v5, v7 -; GFX7-SDAG-NEXT: v_add_i32_e32 v1, vcc, v4, v8 -; GFX7-SDAG-NEXT: v_add_i32_e32 v0, vcc, v1, v0 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v4, v2, v0 -; GFX7-SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v2, v3, 0 -; GFX7-SDAG-NEXT: v_add_i32_e32 v2, vcc, v6, v9 -; GFX7-SDAG-NEXT: v_mul_lo_u32 v2, v2, v3 -; GFX7-SDAG-NEXT: v_add_i32_e32 v1, vcc, v1, v4 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v1, v14, v31 +; GFX7-SDAG-NEXT: v_add_i32_e32 v1, vcc, v16, v1 +; GFX7-SDAG-NEXT: v_add_i32_e32 v11, vcc, v1, v26 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v2, v10, 0 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v10, v3, v10 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v11, v6, v11 +; GFX7-SDAG-NEXT: v_add_i32_e32 v9, vcc, v2, v9 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v6, v15, 0 +; GFX7-SDAG-NEXT: v_add_i32_e32 v9, vcc, v9, v10 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v10, v0, v5 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v0, v8, 0 +; GFX7-SDAG-NEXT: v_add_i32_e32 v3, vcc, v3, v11 +; GFX7-SDAG-NEXT: v_add_i32_e32 v0, vcc, v3, v7 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v7, v4, v13 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v4, v12, 0 +; GFX7-SDAG-NEXT: v_add_i32_e32 v6, vcc, v6, v10 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v10, v17, v12 +; GFX7-SDAG-NEXT: v_add_i32_e32 v4, vcc, v4, v7 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v8, v18, v8 +; GFX7-SDAG-NEXT: v_add_i32_e32 v4, vcc, v4, v10 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v7, v5, v4 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v5, v3, 0 +; GFX7-SDAG-NEXT: v_add_i32_e32 v8, vcc, v6, v8 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v0, v1, v0 +; GFX7-SDAG-NEXT: v_add_i32_e32 v7, vcc, v5, v7 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v1, v2, 0 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v1, v9, v2 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v3, v8, v3 +; GFX7-SDAG-NEXT: v_add_i32_e32 v0, vcc, v6, v0 +; GFX7-SDAG-NEXT: v_add_i32_e32 v0, vcc, v0, v1 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v2, v4, v0 +; GFX7-SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v4, v5, 0 +; GFX7-SDAG-NEXT: v_add_i32_e32 v3, vcc, v7, v3 +; GFX7-SDAG-NEXT: v_mul_lo_u32 v3, v3, v5 ; GFX7-SDAG-NEXT: v_add_i32_e32 v1, vcc, v1, v2 +; GFX7-SDAG-NEXT: v_add_i32_e32 v1, vcc, v1, v3 ; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] ; ; GFX7-GISEL-LABEL: test_vector_reduce_mul_v16i64: ; GFX7-GISEL: ; %bb.0: ; %entry ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[31:32], s[4:5], v10, v26, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[33:34], s[4:5], v10, v27, v[32:33] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[35:36], s[4:5], v11, v26, v[33:34] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v2, v18, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[32:33], s[4:5], v2, v19, v[11:12] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[26:27], s[4:5], v10, v31, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[36:37], s[4:5], v10, v35, v[27:28] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v3, v18, v[32:33] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v12, v28, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v10, v31, v[36:37] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v12, v29, v[3:4] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[31:32], s[4:5], v13, v28, v[10:11] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v4, v20, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v4, v21, v[11:12] -; GFX7-GISEL-NEXT: buffer_load_dword v21, off, s[0:3], s32 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v10, v2, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[27:28], s[4:5], v10, v31, v[4:5] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v5, v20, v[12:13] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v6, v22, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v10, v2, v[27:28] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v14, v30, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v6, v23, v[5:6] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[31:32], s[4:5], v0, v16, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[33:34], s[4:5], v0, v17, v[32:33] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[35:36], s[4:5], v1, v16, v[33:34] +; GFX7-GISEL-NEXT: buffer_load_dword v34, off, s[0:3], s32 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v2, v18, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v2, v19, v[1:2] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v4, v20, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[36:37], s[4:5], v3, v18, v[16:17] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[32:33], s[4:5], v4, v21, v[2:3] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v6, v22, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v10, v26, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[37:38], s[4:5], v5, v20, v[32:33] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v8, v24, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[38:39], s[4:5], v10, v27, v[17:18] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[17:18], s[4:5], v14, v30, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v6, v23, v[3:4] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[32:33], s[4:5], v8, v25, v[5:6] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v12, v28, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[50:51], s[4:5], v7, v22, v[19:20] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v9, v24, v[32:33] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[48:49], s[4:5], v12, v29, v[6:7] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v2, v17, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v1, v5, 0 ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v14, v21, v[11:12] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v7, v22, v[12:13] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v15, v30, v[5:6] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v4, v10, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v4, v11, v[6:7] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v8, v24, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v20, v10, v[12:13] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v0, v16, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v8, v25, v[7:8] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v10, v6, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v0, v17, v[11:12] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v9, v24, v[12:13] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v26, v5, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[23:24], s[4:5], v1, v16, v[20:21] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v10, v22, v[8:9] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v7, v3, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v26, v14, v[12:13] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v23, v6, v[0:1] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v7, v19, v[9:10] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v18, v5, v[15:16] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v8, v11, 0 -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v12, v3, v[13:14] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v8, v6, v[1:2] -; GFX7-GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v4, v11, v[9:10] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v14, v34, v[18:19] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v0, v16, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[23:24], s[4:5], v15, v30, v[20:21] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v11, v26, v[38:39] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v13, v28, v[48:49] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v18, v6, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v31, v4, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v2, v23, v[7:8] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[25:26], s[4:5], v0, v20, v[19:20] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v1, v24, v[9:10] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v14, v8, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v50, v17, v[12:13] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v31, v22, v[15:16] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[21:22], s[4:5], v36, v16, v[25:26] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v37, v5, v[19:20] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v18, v0, v[11:12] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v35, v4, v[12:13] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v14, v15, v[3:4] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v2, v10, 0 +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v21, v6, v[16:17] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v18, v8, v[4:5] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v2, v11, v[1:2] +; GFX7-GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v6, v10, v[3:4] ; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX8-SDAG-LABEL: test_vector_reduce_mul_v16i64: ; GFX8-SDAG: ; %bb.0: ; %entry ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v19, v2, v19 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v32, v3, v18 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v2, v18, 0 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v27, v10, v27 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v33, v11, v26 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v10, v26, 0 -; GFX8-SDAG-NEXT: v_add_u32_e32 v3, vcc, v3, v19 -; GFX8-SDAG-NEXT: v_add_u32_e32 v32, vcc, v3, v32 ; GFX8-SDAG-NEXT: v_mul_lo_u32 v21, v4, v21 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v4, v20, 0 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v23, v6, v23 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v26, v7, v22 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v6, v22, 0 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v5, v5, v20 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v32, v5, v20 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v4, v20, 0 ; GFX8-SDAG-NEXT: v_mul_lo_u32 v20, v12, v29 ; GFX8-SDAG-NEXT: v_mul_lo_u32 v29, v13, v28 ; GFX8-SDAG-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v12, v28, 0 -; GFX8-SDAG-NEXT: v_add_u32_e32 v11, vcc, v11, v27 -; GFX8-SDAG-NEXT: v_add_u32_e32 v11, vcc, v11, v33 -; GFX8-SDAG-NEXT: v_add_u32_e32 v4, vcc, v4, v21 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v14, v30, 0 -; GFX8-SDAG-NEXT: v_add_u32_e32 v7, vcc, v7, v23 -; GFX8-SDAG-NEXT: v_add_u32_e32 v23, vcc, v4, v5 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v2, v10, 0 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v2, v2, v11 -; GFX8-SDAG-NEXT: v_add_u32_e32 v11, vcc, v13, v20 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v22, v15, v30 ; GFX8-SDAG-NEXT: v_mul_lo_u32 v17, v0, v17 ; GFX8-SDAG-NEXT: v_mul_lo_u32 v28, v1, v16 ; GFX8-SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v0, v16, 0 ; GFX8-SDAG-NEXT: v_mul_lo_u32 v25, v8, v25 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v8, v24, 0 -; GFX8-SDAG-NEXT: v_add_u32_e32 v21, vcc, v7, v26 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v33, v9, v24 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v8, v24, 0 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v23, v6, v23 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v24, v7, v22 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v6, v22, 0 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v19, v2, v19 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v22, v3, v18 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v2, v18, 0 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v18, v10, v27 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v27, v11, v26 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v10, v26, 0 ; GFX8-SDAG-NEXT: v_add_u32_e32 v1, vcc, v1, v17 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v6, v18, 0 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v10, v32, v10 -; GFX8-SDAG-NEXT: v_add_u32_e32 v2, vcc, v5, v2 -; GFX8-SDAG-NEXT: v_add_u32_e32 v11, vcc, v11, v29 -; GFX8-SDAG-NEXT: v_add_u32_e32 v5, vcc, v2, v10 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v26, v15, v30 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v14, v30, 0 +; GFX8-SDAG-NEXT: v_add_u32_e32 v11, vcc, v11, v18 +; GFX8-SDAG-NEXT: v_add_u32_e32 v18, vcc, v1, v28 +; GFX8-SDAG-NEXT: v_add_u32_e32 v5, vcc, v5, v21 +; GFX8-SDAG-NEXT: v_add_u32_e32 v9, vcc, v9, v25 +; GFX8-SDAG-NEXT: v_add_u32_e32 v17, vcc, v5, v32 +; GFX8-SDAG-NEXT: v_add_u32_e32 v5, vcc, v9, v33 +; GFX8-SDAG-NEXT: v_add_u32_e32 v9, vcc, v11, v27 +; GFX8-SDAG-NEXT: v_add_u32_e32 v3, vcc, v3, v19 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v9, v2, v9 +; GFX8-SDAG-NEXT: v_add_u32_e32 v3, vcc, v3, v22 +; GFX8-SDAG-NEXT: v_add_u32_e32 v7, vcc, v7, v23 +; GFX8-SDAG-NEXT: v_add_u32_e32 v7, vcc, v7, v24 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v7, v7, v15 +; GFX8-SDAG-NEXT: v_add_u32_e32 v13, vcc, v13, v20 +; GFX8-SDAG-NEXT: v_add_u32_e32 v13, vcc, v13, v29 ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX8-SDAG-NEXT: v_mul_lo_u32 v13, v14, v31 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v14, v21, v18 -; GFX8-SDAG-NEXT: v_add_u32_e32 v13, vcc, v19, v13 -; GFX8-SDAG-NEXT: v_add_u32_e32 v13, vcc, v13, v22 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v6, v6, v13 -; GFX8-SDAG-NEXT: v_add_u32_e32 v13, vcc, v1, v28 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v1, v9, v24 -; GFX8-SDAG-NEXT: v_add_u32_e32 v9, vcc, v16, v25 -; GFX8-SDAG-NEXT: v_add_u32_e32 v2, vcc, v8, v6 -; GFX8-SDAG-NEXT: v_add_u32_e32 v1, vcc, v9, v1 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v6, v0, v1 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v0, v15, 0 -; GFX8-SDAG-NEXT: v_add_u32_e32 v8, vcc, v2, v14 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v9, v3, v11 -; GFX8-SDAG-NEXT: v_add_u32_e32 v6, vcc, v1, v6 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v3, v12, 0 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v3, v23, v12 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v10, v13, v15 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v8, v4, v8 -; GFX8-SDAG-NEXT: v_add_u32_e32 v2, vcc, v2, v9 -; GFX8-SDAG-NEXT: v_add_u32_e32 v2, vcc, v2, v3 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v9, v0, v2 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v0, v1, 0 -; GFX8-SDAG-NEXT: v_add_u32_e32 v0, vcc, v6, v10 -; GFX8-SDAG-NEXT: v_add_u32_e32 v6, vcc, v3, v9 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v4, v7, 0 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v9, v0, v1 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v0, v5, v7 -; GFX8-SDAG-NEXT: v_add_u32_e32 v1, vcc, v4, v8 -; GFX8-SDAG-NEXT: v_add_u32_e32 v0, vcc, v1, v0 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v4, v2, v0 -; GFX8-SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v2, v3, 0 -; GFX8-SDAG-NEXT: v_add_u32_e32 v2, vcc, v6, v9 -; GFX8-SDAG-NEXT: v_mul_lo_u32 v2, v2, v3 -; GFX8-SDAG-NEXT: v_add_u32_e32 v1, vcc, v1, v4 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v1, v14, v31 +; GFX8-SDAG-NEXT: v_add_u32_e32 v1, vcc, v16, v1 +; GFX8-SDAG-NEXT: v_add_u32_e32 v11, vcc, v1, v26 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v2, v10, 0 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v10, v3, v10 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v11, v6, v11 +; GFX8-SDAG-NEXT: v_add_u32_e32 v9, vcc, v2, v9 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v6, v15, 0 +; GFX8-SDAG-NEXT: v_add_u32_e32 v9, vcc, v9, v10 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v10, v0, v5 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v0, v8, 0 +; GFX8-SDAG-NEXT: v_add_u32_e32 v3, vcc, v3, v11 +; GFX8-SDAG-NEXT: v_add_u32_e32 v0, vcc, v3, v7 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v7, v4, v13 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v4, v12, 0 +; GFX8-SDAG-NEXT: v_add_u32_e32 v6, vcc, v6, v10 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v10, v17, v12 +; GFX8-SDAG-NEXT: v_add_u32_e32 v4, vcc, v4, v7 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v8, v18, v8 +; GFX8-SDAG-NEXT: v_add_u32_e32 v4, vcc, v4, v10 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v7, v5, v4 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v5, v3, 0 +; GFX8-SDAG-NEXT: v_add_u32_e32 v8, vcc, v6, v8 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v0, v1, v0 +; GFX8-SDAG-NEXT: v_add_u32_e32 v7, vcc, v5, v7 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v1, v2, 0 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v1, v9, v2 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v3, v8, v3 +; GFX8-SDAG-NEXT: v_add_u32_e32 v0, vcc, v6, v0 +; GFX8-SDAG-NEXT: v_add_u32_e32 v0, vcc, v0, v1 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v2, v4, v0 +; GFX8-SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v4, v5, 0 +; GFX8-SDAG-NEXT: v_add_u32_e32 v3, vcc, v7, v3 +; GFX8-SDAG-NEXT: v_mul_lo_u32 v3, v3, v5 ; GFX8-SDAG-NEXT: v_add_u32_e32 v1, vcc, v1, v2 +; GFX8-SDAG-NEXT: v_add_u32_e32 v1, vcc, v1, v3 ; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31] ; ; GFX8-GISEL-LABEL: test_vector_reduce_mul_v16i64: ; GFX8-GISEL: ; %bb.0: ; %entry ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[31:32], s[4:5], v10, v26, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[33:34], s[4:5], v10, v27, v[32:33] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[35:36], s[4:5], v11, v26, v[33:34] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v2, v18, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[32:33], s[4:5], v2, v19, v[11:12] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[26:27], s[4:5], v10, v31, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[36:37], s[4:5], v10, v35, v[27:28] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v3, v18, v[32:33] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v12, v28, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v10, v31, v[36:37] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v12, v29, v[3:4] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[31:32], s[4:5], v13, v28, v[10:11] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v4, v20, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v4, v21, v[11:12] -; GFX8-GISEL-NEXT: buffer_load_dword v21, off, s[0:3], s32 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v10, v2, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[27:28], s[4:5], v10, v31, v[4:5] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v5, v20, v[12:13] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v6, v22, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v10, v2, v[27:28] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v14, v30, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v6, v23, v[5:6] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[31:32], s[4:5], v0, v16, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[33:34], s[4:5], v0, v17, v[32:33] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[35:36], s[4:5], v1, v16, v[33:34] +; GFX8-GISEL-NEXT: buffer_load_dword v34, off, s[0:3], s32 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v2, v18, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v2, v19, v[1:2] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v4, v20, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[36:37], s[4:5], v3, v18, v[16:17] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[32:33], s[4:5], v4, v21, v[2:3] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v6, v22, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v10, v26, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[37:38], s[4:5], v5, v20, v[32:33] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v8, v24, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[38:39], s[4:5], v10, v27, v[17:18] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[17:18], s[4:5], v14, v30, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v6, v23, v[3:4] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[32:33], s[4:5], v8, v25, v[5:6] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v12, v28, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[50:51], s[4:5], v7, v22, v[19:20] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v9, v24, v[32:33] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[48:49], s[4:5], v12, v29, v[6:7] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v2, v17, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v1, v5, 0 ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v14, v21, v[11:12] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v7, v22, v[12:13] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v15, v30, v[5:6] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v4, v10, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v4, v11, v[6:7] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v8, v24, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v20, v10, v[12:13] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v0, v16, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v8, v25, v[7:8] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[7:8], s[4:5], v10, v6, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v0, v17, v[11:12] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[22:23], s[4:5], v9, v24, v[12:13] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v26, v5, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[23:24], s[4:5], v1, v16, v[20:21] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v10, v22, v[8:9] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[8:9], s[4:5], v7, v3, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v26, v14, v[12:13] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v23, v6, v[0:1] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[13:14], s[4:5], v7, v19, v[9:10] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v18, v5, v[15:16] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v8, v11, 0 -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v12, v3, v[13:14] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[9:10], s[4:5], v8, v6, v[1:2] -; GFX8-GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v4, v11, v[9:10] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v14, v34, v[18:19] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v0, v16, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[23:24], s[4:5], v15, v30, v[20:21] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[20:21], s[4:5], v11, v26, v[38:39] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[24:25], s[4:5], v13, v28, v[48:49] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[10:11], s[4:5], v18, v6, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[14:15], s[4:5], v31, v4, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v2, v23, v[7:8] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[25:26], s[4:5], v0, v20, v[19:20] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[19:20], s[4:5], v1, v24, v[9:10] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v14, v8, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v50, v17, v[12:13] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[12:13], s[4:5], v31, v22, v[15:16] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[21:22], s[4:5], v36, v16, v[25:26] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[15:16], s[4:5], v37, v5, v[19:20] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[16:17], s[4:5], v18, v0, v[11:12] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[18:19], s[4:5], v35, v4, v[12:13] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v14, v15, v[3:4] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v2, v10, 0 +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[11:12], s[4:5], v21, v6, v[16:17] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[6:7], s[4:5], v18, v8, v[4:5] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v2, v11, v[1:2] +; GFX8-GISEL-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v6, v10, v[3:4] ; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-SDAG-LABEL: test_vector_reduce_mul_v16i64: @@ -3911,53 +3911,53 @@ define i64 @test_vector_reduce_mul_v16i64(<16 x i64> %v) { ; GFX10-GISEL-LABEL: test_vector_reduce_mul_v16i64: ; GFX10-GISEL: ; %bb.0: ; %entry ; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX10-GISEL-NEXT: buffer_load_dword v35, off, s[0:3], s32 +; GFX10-GISEL-NEXT: buffer_load_dword v39, off, s[0:3], s32 ; GFX10-GISEL-NEXT: v_mad_u64_u32 v[31:32], s4, v14, v30, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[33:34], s4, v6, v22, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[33:34], s4, v0, v16, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[35:36], s4, v2, v18, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[37:38], s4, v6, v22, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[48:49], s4, v10, v26, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[50:51], s4, v12, v28, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[52:53], s4, v4, v20, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[64:65], s4, v8, v24, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[68:69], s4, v0, v17, v[34:35] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[69:70], s4, v2, v19, v[36:37] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[66:67], s4, v37, v31, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[70:71], s4, v10, v27, v[49:50] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[80:81], s4, v12, v29, v[51:52] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[0:1], s4, v1, v16, v[68:69] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[10:11], s4, v11, v26, v[70:71] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[17:18], s4, v3, v18, v[69:70] ; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[36:37], s4, v14, v35, v[32:33] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[37:38], s4, v6, v23, v[34:35] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[34:35], s4, v33, v31, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[14:15], s4, v15, v30, v[36:37] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[36:37], s4, v7, v22, v[37:38] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[6:7], s4, v2, v18, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[22:23], s4, v10, v26, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[32:33], s4, v33, v14, v[35:36] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[14:15], s4, v4, v20, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[35:36], s4, v36, v31, v[32:33] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[30:31], s4, v8, v24, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[32:33], s4, v12, v28, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[36:37], s4, v2, v19, v[7:8] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[37:38], s4, v4, v21, v[15:16] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[38:39], s4, v10, v27, v[23:24] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[7:8], s4, v8, v25, v[31:32] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[48:49], s4, v12, v29, v[33:34] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[18:19], s4, v3, v18, v[36:37] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[19:20], s4, v5, v20, v[37:38] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[2:3], s4, v0, v16, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[10:11], s4, v11, v26, v[38:39] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[4:5], s4, v6, v22, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[20:21], s4, v9, v24, v[7:8] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[11:12], s4, v13, v28, v[48:49] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[7:8], s4, v14, v32, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[12:13], s4, v0, v17, v[3:4] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[23:24], s4, v6, v10, v[5:6] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[5:6], s4, v2, v30, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[13:14], s4, v14, v11, v[8:9] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[8:9], s4, v4, v34, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[10:11], s4, v5, v7, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[0:1], s4, v1, v16, v[12:13] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[12:13], s4, v19, v32, v[13:14] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[1:2], s4, v2, v20, v[6:7] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[2:3], s4, v18, v22, v[23:24] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[3:4], s4, v4, v35, v[9:10] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[4:5], s4, v5, v12, v[11:12] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[13:14], s4, v0, v30, v[1:2] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[0:1], s4, v10, v8, 0 -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[2:3], s4, v2, v34, v[3:4] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[3:4], s4, v13, v7, v[4:5] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[1:2], s4, v10, v2, v[1:2] -; GFX10-GISEL-NEXT: v_mad_u64_u32 v[1:2], s4, v3, v8, v[1:2] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[54:55], s4, v14, v39, v[32:33] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[38:39], s4, v6, v23, v[38:39] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[54:55], s4, v15, v30, v[54:55] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[14:15], s4, v35, v48, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[29:30], s4, v52, v50, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[81:82], s4, v4, v21, v[53:54] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[82:83], s4, v8, v25, v[65:66] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[21:22], s4, v7, v22, v[38:39] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[6:7], s4, v33, v64, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[2:3], s4, v14, v66, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[11:12], s4, v13, v28, v[80:81] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[12:13], s4, v37, v54, v[67:68] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[8:9], s4, v9, v24, v[82:83] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[9:10], s4, v35, v10, v[15:16] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[18:19], s4, v5, v20, v[81:82] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[4:5], s4, v6, v29, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[10:11], s4, v52, v11, v[30:31] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[11:12], s4, v21, v31, v[12:13] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[7:8], s4, v33, v8, v[7:8] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[8:9], s4, v17, v48, v[9:10] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[9:10], s4, v18, v50, v[10:11] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[10:11], s4, v14, v11, v[3:4] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[11:12], s4, v0, v64, v[7:8] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[5:6], s4, v6, v9, v[5:6] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[0:1], s4, v4, v2, 0 +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[6:7], s4, v8, v66, v[10:11] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[7:8], s4, v11, v29, v[5:6] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[3:4], s4, v4, v6, v[1:2] +; GFX10-GISEL-NEXT: v_mad_u64_u32 v[1:2], s4, v7, v2, v[3:4] ; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-SDAG-LABEL: test_vector_reduce_mul_v16i64: diff --git a/llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll b/llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll index acfbc5c8be15a..a7bef2f26575a 100644 --- a/llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll +++ b/llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll @@ -3730,38 +3730,38 @@ define i64 @test_vector_reduce_smax_v16i64(<16 x i64> %v) { ; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX7-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[8:9], v[24:25] -; GFX7-SDAG-NEXT: v_cmp_gt_i64_e64 s[4:5], v[10:11], v[26:27] +; GFX7-SDAG-NEXT: v_cmp_gt_i64_e64 s[4:5], v[0:1], v[16:17] +; GFX7-SDAG-NEXT: v_cmp_gt_i64_e64 s[6:7], v[12:13], v[28:29] +; GFX7-SDAG-NEXT: v_cmp_gt_i64_e64 s[8:9], v[4:5], v[20:21] +; GFX7-SDAG-NEXT: v_cmp_gt_i64_e64 s[12:13], v[10:11], v[26:27] +; GFX7-SDAG-NEXT: v_cmp_gt_i64_e64 s[14:15], v[2:3], v[18:19] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, v17, v1, s[4:5] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[6:7] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[8:9] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX7-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[0:1], v[16:17] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc -; GFX7-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[12:13], v[28:29] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX7-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[20:21] -; GFX7-SDAG-NEXT: v_cmp_gt_i64_e64 s[6:7], v[0:1], v[8:9] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX7-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[6:7], v[22:23] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v0, v16, v0, s[4:5] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[6:7] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[8:9] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[14:15] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[14:15] ; GFX7-SDAG-NEXT: v_cmp_gt_i64_e64 s[4:5], v[4:5], v[12:13] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX7-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[2:3], v[18:19] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc +; GFX7-SDAG-NEXT: v_cmp_gt_i64_e64 s[6:7], v[0:1], v[8:9] ; GFX7-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[2:3], v[10:11] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, v9, v1, s[6:7] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v4, v12, v4, s[4:5] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v0, v8, v0, s[6:7] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v3, v11, v3, vcc ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc ; GFX7-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[0:1], v[4:5] +; GFX7-SDAG-NEXT: v_cmp_gt_i64_e64 s[10:11], v[6:7], v[22:23] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[10:11] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[10:11] ; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX7-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[14:15], v[30:31] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v5, v31, v15, vcc @@ -3782,29 +3782,17 @@ define i64 @test_vector_reduce_smax_v16i64(<16 x i64> %v) { ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX7-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[0:1], v[16:17] -; GFX7-GISEL-NEXT: v_cmp_gt_i64_e64 s[4:5], v[10:11], v[26:27] +; GFX7-GISEL-NEXT: v_cmp_gt_i64_e64 s[6:7], v[4:5], v[20:21] +; GFX7-GISEL-NEXT: v_cmp_gt_i64_e64 s[10:11], v[8:9], v[24:25] +; GFX7-GISEL-NEXT: v_cmp_gt_i64_e64 s[14:15], v[12:13], v[28:29] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[6:7] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v8, v24, v8, s[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[14:15] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX7-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[2:3], v[18:19] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX7-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[20:21] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX7-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[6:7], v[22:23] -; GFX7-GISEL-NEXT: v_cmp_gt_i64_e64 s[4:5], v[2:3], v[10:11] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX7-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[8:9], v[24:25] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc -; GFX7-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[12:13], v[28:29] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[6:7] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v9, v25, v9, s[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[14:15] ; GFX7-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[0:1], v[8:9] ; GFX7-GISEL-NEXT: v_cmp_gt_i64_e64 s[6:7], v[4:5], v[12:13] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc @@ -3812,8 +3800,20 @@ define i64 @test_vector_reduce_smax_v16i64(<16 x i64> %v) { ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc ; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[6:7] ; GFX7-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[0:1], v[4:5] +; GFX7-GISEL-NEXT: v_cmp_gt_i64_e64 s[4:5], v[2:3], v[18:19] +; GFX7-GISEL-NEXT: v_cmp_gt_i64_e64 s[8:9], v[6:7], v[22:23] +; GFX7-GISEL-NEXT: v_cmp_gt_i64_e64 s[12:13], v[10:11], v[26:27] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[8:9] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[8:9] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX7-GISEL-NEXT: v_cmp_gt_i64_e64 s[4:5], v[2:3], v[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX7-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[14:15], v[30:31] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v4, v30, v14, vcc @@ -3834,38 +3834,38 @@ define i64 @test_vector_reduce_smax_v16i64(<16 x i64> %v) { ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX8-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[8:9], v[24:25] -; GFX8-SDAG-NEXT: v_cmp_gt_i64_e64 s[4:5], v[10:11], v[26:27] +; GFX8-SDAG-NEXT: v_cmp_gt_i64_e64 s[4:5], v[0:1], v[16:17] +; GFX8-SDAG-NEXT: v_cmp_gt_i64_e64 s[6:7], v[12:13], v[28:29] +; GFX8-SDAG-NEXT: v_cmp_gt_i64_e64 s[8:9], v[4:5], v[20:21] +; GFX8-SDAG-NEXT: v_cmp_gt_i64_e64 s[12:13], v[10:11], v[26:27] +; GFX8-SDAG-NEXT: v_cmp_gt_i64_e64 s[14:15], v[2:3], v[18:19] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v1, v17, v1, s[4:5] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[6:7] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[8:9] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX8-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[0:1], v[16:17] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc -; GFX8-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[12:13], v[28:29] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX8-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[20:21] -; GFX8-SDAG-NEXT: v_cmp_gt_i64_e64 s[6:7], v[0:1], v[8:9] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX8-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[6:7], v[22:23] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v0, v16, v0, s[4:5] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[6:7] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[8:9] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[14:15] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[14:15] ; GFX8-SDAG-NEXT: v_cmp_gt_i64_e64 s[4:5], v[4:5], v[12:13] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX8-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[2:3], v[18:19] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc +; GFX8-SDAG-NEXT: v_cmp_gt_i64_e64 s[6:7], v[0:1], v[8:9] ; GFX8-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[2:3], v[10:11] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v1, v9, v1, s[6:7] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v4, v12, v4, s[4:5] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v0, v8, v0, s[6:7] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v3, v11, v3, vcc ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc ; GFX8-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[0:1], v[4:5] +; GFX8-SDAG-NEXT: v_cmp_gt_i64_e64 s[10:11], v[6:7], v[22:23] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[10:11] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[10:11] ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX8-SDAG-NEXT: v_cmp_gt_i64_e32 vcc, v[14:15], v[30:31] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v5, v31, v15, vcc @@ -3886,29 +3886,17 @@ define i64 @test_vector_reduce_smax_v16i64(<16 x i64> %v) { ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX8-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[0:1], v[16:17] -; GFX8-GISEL-NEXT: v_cmp_gt_i64_e64 s[4:5], v[10:11], v[26:27] +; GFX8-GISEL-NEXT: v_cmp_gt_i64_e64 s[6:7], v[4:5], v[20:21] +; GFX8-GISEL-NEXT: v_cmp_gt_i64_e64 s[10:11], v[8:9], v[24:25] +; GFX8-GISEL-NEXT: v_cmp_gt_i64_e64 s[14:15], v[12:13], v[28:29] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[6:7] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v8, v24, v8, s[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[14:15] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX8-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[2:3], v[18:19] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX8-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[4:5], v[20:21] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX8-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[6:7], v[22:23] -; GFX8-GISEL-NEXT: v_cmp_gt_i64_e64 s[4:5], v[2:3], v[10:11] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX8-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[8:9], v[24:25] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc -; GFX8-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[12:13], v[28:29] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[6:7] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v9, v25, v9, s[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[14:15] ; GFX8-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[0:1], v[8:9] ; GFX8-GISEL-NEXT: v_cmp_gt_i64_e64 s[6:7], v[4:5], v[12:13] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc @@ -3916,8 +3904,20 @@ define i64 @test_vector_reduce_smax_v16i64(<16 x i64> %v) { ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc ; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[6:7] ; GFX8-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[0:1], v[4:5] +; GFX8-GISEL-NEXT: v_cmp_gt_i64_e64 s[4:5], v[2:3], v[18:19] +; GFX8-GISEL-NEXT: v_cmp_gt_i64_e64 s[8:9], v[6:7], v[22:23] +; GFX8-GISEL-NEXT: v_cmp_gt_i64_e64 s[12:13], v[10:11], v[26:27] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[8:9] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[8:9] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX8-GISEL-NEXT: v_cmp_gt_i64_e64 s[4:5], v[2:3], v[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX8-GISEL-NEXT: v_cmp_gt_i64_e32 vcc, v[14:15], v[30:31] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v4, v30, v14, vcc diff --git a/llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll b/llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll index a7edd4b759a99..38eb42f268fa1 100644 --- a/llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll +++ b/llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll @@ -3729,38 +3729,38 @@ define i64 @test_vector_reduce_smin_v16i64(<16 x i64> %v) { ; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX7-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[8:9], v[24:25] -; GFX7-SDAG-NEXT: v_cmp_lt_i64_e64 s[4:5], v[10:11], v[26:27] +; GFX7-SDAG-NEXT: v_cmp_lt_i64_e64 s[4:5], v[0:1], v[16:17] +; GFX7-SDAG-NEXT: v_cmp_lt_i64_e64 s[6:7], v[12:13], v[28:29] +; GFX7-SDAG-NEXT: v_cmp_lt_i64_e64 s[8:9], v[4:5], v[20:21] +; GFX7-SDAG-NEXT: v_cmp_lt_i64_e64 s[12:13], v[10:11], v[26:27] +; GFX7-SDAG-NEXT: v_cmp_lt_i64_e64 s[14:15], v[2:3], v[18:19] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, v17, v1, s[4:5] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[6:7] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[8:9] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX7-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[0:1], v[16:17] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc -; GFX7-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[12:13], v[28:29] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX7-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[4:5], v[20:21] -; GFX7-SDAG-NEXT: v_cmp_lt_i64_e64 s[6:7], v[0:1], v[8:9] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX7-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[6:7], v[22:23] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v0, v16, v0, s[4:5] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[6:7] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[8:9] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[14:15] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[14:15] ; GFX7-SDAG-NEXT: v_cmp_lt_i64_e64 s[4:5], v[4:5], v[12:13] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX7-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[2:3], v[18:19] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc +; GFX7-SDAG-NEXT: v_cmp_lt_i64_e64 s[6:7], v[0:1], v[8:9] ; GFX7-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[2:3], v[10:11] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, v9, v1, s[6:7] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v4, v12, v4, s[4:5] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v0, v8, v0, s[6:7] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v3, v11, v3, vcc ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc ; GFX7-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[0:1], v[4:5] +; GFX7-SDAG-NEXT: v_cmp_lt_i64_e64 s[10:11], v[6:7], v[22:23] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[10:11] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[10:11] ; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX7-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[14:15], v[30:31] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v5, v31, v15, vcc @@ -3781,29 +3781,17 @@ define i64 @test_vector_reduce_smin_v16i64(<16 x i64> %v) { ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX7-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[0:1], v[16:17] -; GFX7-GISEL-NEXT: v_cmp_lt_i64_e64 s[4:5], v[10:11], v[26:27] +; GFX7-GISEL-NEXT: v_cmp_lt_i64_e64 s[6:7], v[4:5], v[20:21] +; GFX7-GISEL-NEXT: v_cmp_lt_i64_e64 s[10:11], v[8:9], v[24:25] +; GFX7-GISEL-NEXT: v_cmp_lt_i64_e64 s[14:15], v[12:13], v[28:29] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[6:7] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v8, v24, v8, s[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[14:15] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX7-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[2:3], v[18:19] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX7-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[4:5], v[20:21] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX7-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[6:7], v[22:23] -; GFX7-GISEL-NEXT: v_cmp_lt_i64_e64 s[4:5], v[2:3], v[10:11] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX7-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[8:9], v[24:25] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc -; GFX7-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[12:13], v[28:29] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[6:7] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v9, v25, v9, s[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[14:15] ; GFX7-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[0:1], v[8:9] ; GFX7-GISEL-NEXT: v_cmp_lt_i64_e64 s[6:7], v[4:5], v[12:13] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc @@ -3811,8 +3799,20 @@ define i64 @test_vector_reduce_smin_v16i64(<16 x i64> %v) { ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc ; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[6:7] ; GFX7-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[0:1], v[4:5] +; GFX7-GISEL-NEXT: v_cmp_lt_i64_e64 s[4:5], v[2:3], v[18:19] +; GFX7-GISEL-NEXT: v_cmp_lt_i64_e64 s[8:9], v[6:7], v[22:23] +; GFX7-GISEL-NEXT: v_cmp_lt_i64_e64 s[12:13], v[10:11], v[26:27] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[8:9] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[8:9] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX7-GISEL-NEXT: v_cmp_lt_i64_e64 s[4:5], v[2:3], v[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX7-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[14:15], v[30:31] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v4, v30, v14, vcc @@ -3833,38 +3833,38 @@ define i64 @test_vector_reduce_smin_v16i64(<16 x i64> %v) { ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX8-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[8:9], v[24:25] -; GFX8-SDAG-NEXT: v_cmp_lt_i64_e64 s[4:5], v[10:11], v[26:27] +; GFX8-SDAG-NEXT: v_cmp_lt_i64_e64 s[4:5], v[0:1], v[16:17] +; GFX8-SDAG-NEXT: v_cmp_lt_i64_e64 s[6:7], v[12:13], v[28:29] +; GFX8-SDAG-NEXT: v_cmp_lt_i64_e64 s[8:9], v[4:5], v[20:21] +; GFX8-SDAG-NEXT: v_cmp_lt_i64_e64 s[12:13], v[10:11], v[26:27] +; GFX8-SDAG-NEXT: v_cmp_lt_i64_e64 s[14:15], v[2:3], v[18:19] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v1, v17, v1, s[4:5] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[6:7] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[8:9] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX8-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[0:1], v[16:17] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc -; GFX8-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[12:13], v[28:29] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX8-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[4:5], v[20:21] -; GFX8-SDAG-NEXT: v_cmp_lt_i64_e64 s[6:7], v[0:1], v[8:9] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX8-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[6:7], v[22:23] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v0, v16, v0, s[4:5] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[6:7] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[8:9] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[14:15] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[14:15] ; GFX8-SDAG-NEXT: v_cmp_lt_i64_e64 s[4:5], v[4:5], v[12:13] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX8-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[2:3], v[18:19] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc +; GFX8-SDAG-NEXT: v_cmp_lt_i64_e64 s[6:7], v[0:1], v[8:9] ; GFX8-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[2:3], v[10:11] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v1, v9, v1, s[6:7] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v4, v12, v4, s[4:5] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v0, v8, v0, s[6:7] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v3, v11, v3, vcc ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc ; GFX8-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[0:1], v[4:5] +; GFX8-SDAG-NEXT: v_cmp_lt_i64_e64 s[10:11], v[6:7], v[22:23] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[10:11] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[10:11] ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX8-SDAG-NEXT: v_cmp_lt_i64_e32 vcc, v[14:15], v[30:31] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v5, v31, v15, vcc @@ -3885,29 +3885,17 @@ define i64 @test_vector_reduce_smin_v16i64(<16 x i64> %v) { ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX8-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[0:1], v[16:17] -; GFX8-GISEL-NEXT: v_cmp_lt_i64_e64 s[4:5], v[10:11], v[26:27] +; GFX8-GISEL-NEXT: v_cmp_lt_i64_e64 s[6:7], v[4:5], v[20:21] +; GFX8-GISEL-NEXT: v_cmp_lt_i64_e64 s[10:11], v[8:9], v[24:25] +; GFX8-GISEL-NEXT: v_cmp_lt_i64_e64 s[14:15], v[12:13], v[28:29] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[6:7] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v8, v24, v8, s[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[14:15] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX8-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[2:3], v[18:19] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX8-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[4:5], v[20:21] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX8-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[6:7], v[22:23] -; GFX8-GISEL-NEXT: v_cmp_lt_i64_e64 s[4:5], v[2:3], v[10:11] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX8-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[8:9], v[24:25] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc -; GFX8-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[12:13], v[28:29] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[6:7] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v9, v25, v9, s[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[14:15] ; GFX8-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[0:1], v[8:9] ; GFX8-GISEL-NEXT: v_cmp_lt_i64_e64 s[6:7], v[4:5], v[12:13] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc @@ -3915,8 +3903,20 @@ define i64 @test_vector_reduce_smin_v16i64(<16 x i64> %v) { ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc ; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[6:7] ; GFX8-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[0:1], v[4:5] +; GFX8-GISEL-NEXT: v_cmp_lt_i64_e64 s[4:5], v[2:3], v[18:19] +; GFX8-GISEL-NEXT: v_cmp_lt_i64_e64 s[8:9], v[6:7], v[22:23] +; GFX8-GISEL-NEXT: v_cmp_lt_i64_e64 s[12:13], v[10:11], v[26:27] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[8:9] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[8:9] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX8-GISEL-NEXT: v_cmp_lt_i64_e64 s[4:5], v[2:3], v[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX8-GISEL-NEXT: v_cmp_lt_i64_e32 vcc, v[14:15], v[30:31] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v4, v30, v14, vcc diff --git a/llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll b/llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll index 6376d3a462c12..ea018698c2895 100644 --- a/llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll +++ b/llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll @@ -3602,38 +3602,38 @@ define i64 @test_vector_reduce_umax_v16i64(<16 x i64> %v) { ; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX7-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[8:9], v[24:25] -; GFX7-SDAG-NEXT: v_cmp_gt_u64_e64 s[4:5], v[10:11], v[26:27] +; GFX7-SDAG-NEXT: v_cmp_gt_u64_e64 s[4:5], v[0:1], v[16:17] +; GFX7-SDAG-NEXT: v_cmp_gt_u64_e64 s[6:7], v[12:13], v[28:29] +; GFX7-SDAG-NEXT: v_cmp_gt_u64_e64 s[8:9], v[4:5], v[20:21] +; GFX7-SDAG-NEXT: v_cmp_gt_u64_e64 s[12:13], v[10:11], v[26:27] +; GFX7-SDAG-NEXT: v_cmp_gt_u64_e64 s[14:15], v[2:3], v[18:19] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, v17, v1, s[4:5] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[6:7] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[8:9] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX7-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[16:17] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc -; GFX7-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[12:13], v[28:29] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX7-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[4:5], v[20:21] -; GFX7-SDAG-NEXT: v_cmp_gt_u64_e64 s[6:7], v[0:1], v[8:9] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX7-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[6:7], v[22:23] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v0, v16, v0, s[4:5] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[6:7] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[8:9] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[14:15] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[14:15] ; GFX7-SDAG-NEXT: v_cmp_gt_u64_e64 s[4:5], v[4:5], v[12:13] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX7-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[2:3], v[18:19] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc +; GFX7-SDAG-NEXT: v_cmp_gt_u64_e64 s[6:7], v[0:1], v[8:9] ; GFX7-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[2:3], v[10:11] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, v9, v1, s[6:7] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v4, v12, v4, s[4:5] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v0, v8, v0, s[6:7] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v3, v11, v3, vcc ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc ; GFX7-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[4:5] +; GFX7-SDAG-NEXT: v_cmp_gt_u64_e64 s[10:11], v[6:7], v[22:23] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[10:11] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[10:11] ; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX7-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[14:15], v[30:31] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v5, v31, v15, vcc @@ -3654,29 +3654,17 @@ define i64 @test_vector_reduce_umax_v16i64(<16 x i64> %v) { ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX7-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[16:17] -; GFX7-GISEL-NEXT: v_cmp_gt_u64_e64 s[4:5], v[10:11], v[26:27] +; GFX7-GISEL-NEXT: v_cmp_gt_u64_e64 s[6:7], v[4:5], v[20:21] +; GFX7-GISEL-NEXT: v_cmp_gt_u64_e64 s[10:11], v[8:9], v[24:25] +; GFX7-GISEL-NEXT: v_cmp_gt_u64_e64 s[14:15], v[12:13], v[28:29] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[6:7] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v8, v24, v8, s[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[14:15] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX7-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[2:3], v[18:19] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX7-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[4:5], v[20:21] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX7-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[6:7], v[22:23] -; GFX7-GISEL-NEXT: v_cmp_gt_u64_e64 s[4:5], v[2:3], v[10:11] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX7-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[8:9], v[24:25] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc -; GFX7-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[12:13], v[28:29] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[6:7] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v9, v25, v9, s[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[14:15] ; GFX7-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[8:9] ; GFX7-GISEL-NEXT: v_cmp_gt_u64_e64 s[6:7], v[4:5], v[12:13] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc @@ -3684,8 +3672,20 @@ define i64 @test_vector_reduce_umax_v16i64(<16 x i64> %v) { ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc ; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[6:7] ; GFX7-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[4:5] +; GFX7-GISEL-NEXT: v_cmp_gt_u64_e64 s[4:5], v[2:3], v[18:19] +; GFX7-GISEL-NEXT: v_cmp_gt_u64_e64 s[8:9], v[6:7], v[22:23] +; GFX7-GISEL-NEXT: v_cmp_gt_u64_e64 s[12:13], v[10:11], v[26:27] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[8:9] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[8:9] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX7-GISEL-NEXT: v_cmp_gt_u64_e64 s[4:5], v[2:3], v[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX7-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[14:15], v[30:31] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v4, v30, v14, vcc @@ -3706,38 +3706,38 @@ define i64 @test_vector_reduce_umax_v16i64(<16 x i64> %v) { ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX8-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[8:9], v[24:25] -; GFX8-SDAG-NEXT: v_cmp_gt_u64_e64 s[4:5], v[10:11], v[26:27] +; GFX8-SDAG-NEXT: v_cmp_gt_u64_e64 s[4:5], v[0:1], v[16:17] +; GFX8-SDAG-NEXT: v_cmp_gt_u64_e64 s[6:7], v[12:13], v[28:29] +; GFX8-SDAG-NEXT: v_cmp_gt_u64_e64 s[8:9], v[4:5], v[20:21] +; GFX8-SDAG-NEXT: v_cmp_gt_u64_e64 s[12:13], v[10:11], v[26:27] +; GFX8-SDAG-NEXT: v_cmp_gt_u64_e64 s[14:15], v[2:3], v[18:19] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v1, v17, v1, s[4:5] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[6:7] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[8:9] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX8-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[16:17] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc -; GFX8-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[12:13], v[28:29] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX8-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[4:5], v[20:21] -; GFX8-SDAG-NEXT: v_cmp_gt_u64_e64 s[6:7], v[0:1], v[8:9] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX8-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[6:7], v[22:23] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v0, v16, v0, s[4:5] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[6:7] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[8:9] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[14:15] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[14:15] ; GFX8-SDAG-NEXT: v_cmp_gt_u64_e64 s[4:5], v[4:5], v[12:13] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX8-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[2:3], v[18:19] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc +; GFX8-SDAG-NEXT: v_cmp_gt_u64_e64 s[6:7], v[0:1], v[8:9] ; GFX8-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[2:3], v[10:11] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v1, v9, v1, s[6:7] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v4, v12, v4, s[4:5] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v0, v8, v0, s[6:7] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v3, v11, v3, vcc ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc ; GFX8-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[4:5] +; GFX8-SDAG-NEXT: v_cmp_gt_u64_e64 s[10:11], v[6:7], v[22:23] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[10:11] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[10:11] ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX8-SDAG-NEXT: v_cmp_gt_u64_e32 vcc, v[14:15], v[30:31] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v5, v31, v15, vcc @@ -3758,29 +3758,17 @@ define i64 @test_vector_reduce_umax_v16i64(<16 x i64> %v) { ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX8-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[16:17] -; GFX8-GISEL-NEXT: v_cmp_gt_u64_e64 s[4:5], v[10:11], v[26:27] +; GFX8-GISEL-NEXT: v_cmp_gt_u64_e64 s[6:7], v[4:5], v[20:21] +; GFX8-GISEL-NEXT: v_cmp_gt_u64_e64 s[10:11], v[8:9], v[24:25] +; GFX8-GISEL-NEXT: v_cmp_gt_u64_e64 s[14:15], v[12:13], v[28:29] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[6:7] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v8, v24, v8, s[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[14:15] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX8-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[2:3], v[18:19] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX8-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[4:5], v[20:21] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX8-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[6:7], v[22:23] -; GFX8-GISEL-NEXT: v_cmp_gt_u64_e64 s[4:5], v[2:3], v[10:11] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX8-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[8:9], v[24:25] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc -; GFX8-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[12:13], v[28:29] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[6:7] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v9, v25, v9, s[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[14:15] ; GFX8-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[8:9] ; GFX8-GISEL-NEXT: v_cmp_gt_u64_e64 s[6:7], v[4:5], v[12:13] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc @@ -3788,8 +3776,20 @@ define i64 @test_vector_reduce_umax_v16i64(<16 x i64> %v) { ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc ; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[6:7] ; GFX8-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[0:1], v[4:5] +; GFX8-GISEL-NEXT: v_cmp_gt_u64_e64 s[4:5], v[2:3], v[18:19] +; GFX8-GISEL-NEXT: v_cmp_gt_u64_e64 s[8:9], v[6:7], v[22:23] +; GFX8-GISEL-NEXT: v_cmp_gt_u64_e64 s[12:13], v[10:11], v[26:27] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[8:9] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[8:9] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX8-GISEL-NEXT: v_cmp_gt_u64_e64 s[4:5], v[2:3], v[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX8-GISEL-NEXT: v_cmp_gt_u64_e32 vcc, v[14:15], v[30:31] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v4, v30, v14, vcc diff --git a/llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll b/llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll index 1612fef4638dd..60d81abb85316 100644 --- a/llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll +++ b/llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll @@ -3375,38 +3375,38 @@ define i64 @test_vector_reduce_umin_v16i64(<16 x i64> %v) { ; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX7-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[8:9], v[24:25] -; GFX7-SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], v[10:11], v[26:27] +; GFX7-SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], v[0:1], v[16:17] +; GFX7-SDAG-NEXT: v_cmp_lt_u64_e64 s[6:7], v[12:13], v[28:29] +; GFX7-SDAG-NEXT: v_cmp_lt_u64_e64 s[8:9], v[4:5], v[20:21] +; GFX7-SDAG-NEXT: v_cmp_lt_u64_e64 s[12:13], v[10:11], v[26:27] +; GFX7-SDAG-NEXT: v_cmp_lt_u64_e64 s[14:15], v[2:3], v[18:19] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, v17, v1, s[4:5] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[6:7] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[8:9] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX7-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[0:1], v[16:17] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc -; GFX7-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[12:13], v[28:29] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX7-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[4:5], v[20:21] -; GFX7-SDAG-NEXT: v_cmp_lt_u64_e64 s[6:7], v[0:1], v[8:9] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX7-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[6:7], v[22:23] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v0, v16, v0, s[4:5] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[6:7] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[8:9] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[14:15] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[14:15] ; GFX7-SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], v[4:5], v[12:13] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX7-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[2:3], v[18:19] -; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc +; GFX7-SDAG-NEXT: v_cmp_lt_u64_e64 s[6:7], v[0:1], v[8:9] ; GFX7-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[2:3], v[10:11] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, v9, v1, s[6:7] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v4, v12, v4, s[4:5] ; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v0, v8, v0, s[6:7] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v3, v11, v3, vcc ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc ; GFX7-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[0:1], v[4:5] +; GFX7-SDAG-NEXT: v_cmp_lt_u64_e64 s[10:11], v[6:7], v[22:23] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[10:11] +; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[10:11] ; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX7-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[14:15], v[30:31] ; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v5, v31, v15, vcc @@ -3427,29 +3427,17 @@ define i64 @test_vector_reduce_umin_v16i64(<16 x i64> %v) { ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX7-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[0:1], v[16:17] -; GFX7-GISEL-NEXT: v_cmp_lt_u64_e64 s[4:5], v[10:11], v[26:27] +; GFX7-GISEL-NEXT: v_cmp_lt_u64_e64 s[6:7], v[4:5], v[20:21] +; GFX7-GISEL-NEXT: v_cmp_lt_u64_e64 s[10:11], v[8:9], v[24:25] +; GFX7-GISEL-NEXT: v_cmp_lt_u64_e64 s[14:15], v[12:13], v[28:29] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[6:7] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v8, v24, v8, s[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[14:15] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX7-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[2:3], v[18:19] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX7-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[4:5], v[20:21] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX7-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[6:7], v[22:23] -; GFX7-GISEL-NEXT: v_cmp_lt_u64_e64 s[4:5], v[2:3], v[10:11] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX7-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[8:9], v[24:25] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc -; GFX7-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[12:13], v[28:29] -; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[6:7] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v9, v25, v9, s[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[14:15] ; GFX7-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[0:1], v[8:9] ; GFX7-GISEL-NEXT: v_cmp_lt_u64_e64 s[6:7], v[4:5], v[12:13] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc @@ -3457,8 +3445,20 @@ define i64 @test_vector_reduce_umin_v16i64(<16 x i64> %v) { ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc ; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[6:7] ; GFX7-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[0:1], v[4:5] +; GFX7-GISEL-NEXT: v_cmp_lt_u64_e64 s[4:5], v[2:3], v[18:19] +; GFX7-GISEL-NEXT: v_cmp_lt_u64_e64 s[8:9], v[6:7], v[22:23] +; GFX7-GISEL-NEXT: v_cmp_lt_u64_e64 s[12:13], v[10:11], v[26:27] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[8:9] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[8:9] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX7-GISEL-NEXT: v_cmp_lt_u64_e64 s[4:5], v[2:3], v[10:11] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] +; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] ; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX7-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[14:15], v[30:31] ; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v4, v30, v14, vcc @@ -3479,38 +3479,38 @@ define i64 @test_vector_reduce_umin_v16i64(<16 x i64> %v) { ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX8-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[8:9], v[24:25] -; GFX8-SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], v[10:11], v[26:27] +; GFX8-SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], v[0:1], v[16:17] +; GFX8-SDAG-NEXT: v_cmp_lt_u64_e64 s[6:7], v[12:13], v[28:29] +; GFX8-SDAG-NEXT: v_cmp_lt_u64_e64 s[8:9], v[4:5], v[20:21] +; GFX8-SDAG-NEXT: v_cmp_lt_u64_e64 s[12:13], v[10:11], v[26:27] +; GFX8-SDAG-NEXT: v_cmp_lt_u64_e64 s[14:15], v[2:3], v[18:19] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v1, v17, v1, s[4:5] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[6:7] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[8:9] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX8-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[0:1], v[16:17] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc -; GFX8-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[12:13], v[28:29] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX8-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[4:5], v[20:21] -; GFX8-SDAG-NEXT: v_cmp_lt_u64_e64 s[6:7], v[0:1], v[8:9] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX8-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[6:7], v[22:23] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v0, v16, v0, s[4:5] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[6:7] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[8:9] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[14:15] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[14:15] ; GFX8-SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], v[4:5], v[12:13] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX8-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[2:3], v[18:19] -; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc +; GFX8-SDAG-NEXT: v_cmp_lt_u64_e64 s[6:7], v[0:1], v[8:9] ; GFX8-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[2:3], v[10:11] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[4:5] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v1, v9, v1, s[6:7] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v4, v12, v4, s[4:5] ; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v0, v8, v0, s[6:7] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v3, v11, v3, vcc ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc ; GFX8-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[0:1], v[4:5] +; GFX8-SDAG-NEXT: v_cmp_lt_u64_e64 s[10:11], v[6:7], v[22:23] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[10:11] +; GFX8-SDAG-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[10:11] ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) ; GFX8-SDAG-NEXT: v_cmp_lt_u64_e32 vcc, v[14:15], v[30:31] ; GFX8-SDAG-NEXT: v_cndmask_b32_e32 v5, v31, v15, vcc @@ -3531,29 +3531,17 @@ define i64 @test_vector_reduce_umin_v16i64(<16 x i64> %v) { ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32 ; GFX8-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[0:1], v[16:17] -; GFX8-GISEL-NEXT: v_cmp_lt_u64_e64 s[4:5], v[10:11], v[26:27] +; GFX8-GISEL-NEXT: v_cmp_lt_u64_e64 s[6:7], v[4:5], v[20:21] +; GFX8-GISEL-NEXT: v_cmp_lt_u64_e64 s[10:11], v[8:9], v[24:25] +; GFX8-GISEL-NEXT: v_cmp_lt_u64_e64 s[14:15], v[12:13], v[28:29] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[6:7] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v8, v24, v8, s[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v12, v28, v12, s[14:15] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc -; GFX8-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[2:3], v[18:19] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc -; GFX8-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[4:5], v[20:21] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc -; GFX8-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[6:7], v[22:23] -; GFX8-GISEL-NEXT: v_cmp_lt_u64_e64 s[4:5], v[2:3], v[10:11] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc -; GFX8-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[8:9], v[24:25] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc -; GFX8-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[12:13], v[28:29] -; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc -; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v5, v21, v5, s[6:7] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v9, v25, v9, s[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v13, v29, v13, s[14:15] ; GFX8-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[0:1], v[8:9] ; GFX8-GISEL-NEXT: v_cmp_lt_u64_e64 s[6:7], v[4:5], v[12:13] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc @@ -3561,8 +3549,20 @@ define i64 @test_vector_reduce_umin_v16i64(<16 x i64> %v) { ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc ; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[6:7] ; GFX8-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[0:1], v[4:5] +; GFX8-GISEL-NEXT: v_cmp_lt_u64_e64 s[4:5], v[2:3], v[18:19] +; GFX8-GISEL-NEXT: v_cmp_lt_u64_e64 s[8:9], v[6:7], v[22:23] +; GFX8-GISEL-NEXT: v_cmp_lt_u64_e64 s[12:13], v[10:11], v[26:27] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v18, v2, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v6, v22, v6, s[8:9] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v10, v26, v10, s[12:13] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v7, v23, v7, s[8:9] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v11, v27, v11, s[12:13] +; GFX8-GISEL-NEXT: v_cmp_lt_u64_e64 s[4:5], v[2:3], v[10:11] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[4:5] +; GFX8-GISEL-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[4:5] ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) ; GFX8-GISEL-NEXT: v_cmp_lt_u64_e32 vcc, v[14:15], v[30:31] ; GFX8-GISEL-NEXT: v_cndmask_b32_e32 v4, v30, v14, vcc diff --git a/llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll b/llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll index 0f67d80e97104..a71519393273e 100644 --- a/llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll +++ b/llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll @@ -390,30 +390,27 @@ define <8 x half> @baz() nounwind { ; CHECK-NEXT: v_writelane_b32 v93, s31, 13 ; CHECK-NEXT: v_dual_mov_b32 v92, v31 :: v_dual_mov_b32 v1, 0 ; CHECK-NEXT: v_dual_mov_b32 v0, 0x60 :: v_dual_mov_b32 v3, 0 -; CHECK-NEXT: v_dual_mov_b32 v2, 0x50 :: v_dual_mov_b32 v5, 0 -; CHECK-NEXT: v_dual_mov_b32 v4, 64 :: v_dual_mov_b32 v7, 0 -; CHECK-NEXT: v_mov_b32_e32 v6, 48 +; CHECK-NEXT: v_mov_b32_e32 v2, 0x50 ; CHECK-NEXT: s_clause 0x1 ; CHECK-NEXT: global_load_b128 v[56:59], v[0:1], off ; CHECK-NEXT: global_load_b128 v[104:107], v[2:3], off -; CHECK-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, 0 -; CHECK-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0x70 -; CHECK-NEXT: v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v8, 0x80 -; CHECK-NEXT: s_clause 0x1 -; CHECK-NEXT: global_load_b128 v[108:111], v[4:5], off -; CHECK-NEXT: global_load_b128 v[60:63], v[6:7], off -; CHECK-NEXT: v_mov_b32_e32 v5, 0 -; CHECK-NEXT: s_clause 0x4 -; CHECK-NEXT: global_load_b128 v[72:75], v[0:1], off -; CHECK-NEXT: global_load_b128 v[10:13], v[2:3], off -; CHECK-NEXT: global_load_b128 v[14:17], v[8:9], off -; CHECK-NEXT: global_load_b128 v[18:21], v[8:9], off offset:16 -; CHECK-NEXT: global_load_b128 v[22:25], v[8:9], off offset:32 -; CHECK-NEXT: v_dual_mov_b32 v4, 32 :: v_dual_mov_b32 v7, 0 -; CHECK-NEXT: v_mov_b32_e32 v6, 16 -; CHECK-NEXT: s_clause 0x1 -; CHECK-NEXT: global_load_b128 v[76:79], v[4:5], off -; CHECK-NEXT: global_load_b128 v[88:91], v[6:7], off +; CHECK-NEXT: v_dual_mov_b32 v0, 64 :: v_dual_mov_b32 v3, 0 +; CHECK-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 48 +; CHECK-NEXT: v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, 32 +; CHECK-NEXT: v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v6, 16 +; CHECK-NEXT: v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v8, 0 +; CHECK-NEXT: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v10, 0x70 +; CHECK-NEXT: v_dual_mov_b32 v13, 0 :: v_dual_mov_b32 v12, 0x80 +; CHECK-NEXT: s_clause 0x8 +; CHECK-NEXT: global_load_b128 v[108:111], v[0:1], off +; CHECK-NEXT: global_load_b128 v[60:63], v[2:3], off +; CHECK-NEXT: global_load_b128 v[72:75], v[4:5], off +; CHECK-NEXT: global_load_b128 v[76:79], v[6:7], off +; CHECK-NEXT: global_load_b128 v[88:91], v[8:9], off +; CHECK-NEXT: global_load_b128 v[14:17], v[10:11], off +; CHECK-NEXT: global_load_b128 v[18:21], v[12:13], off +; CHECK-NEXT: global_load_b128 v[22:25], v[12:13], off offset:16 +; CHECK-NEXT: global_load_b128 v[26:29], v[12:13], off offset:32 ; CHECK-NEXT: s_getpc_b64 s[0:1] ; CHECK-NEXT: s_wait_alu depctr_sa_sdst(0) ; CHECK-NEXT: s_sext_i32_i16 s1, s1 @@ -429,39 +426,40 @@ define <8 x half> @baz() nounwind { ; CHECK-NEXT: s_mov_b64 s[36:37], s[8:9] ; CHECK-NEXT: s_mov_b64 s[38:39], s[6:7] ; CHECK-NEXT: s_mov_b64 s[48:49], s[4:5] -; CHECK-NEXT: s_wait_loadcnt 0x5 -; CHECK-NEXT: scratch_store_b128 off, v[10:13], s33 offset:148 ; 16-byte Folded Spill -; CHECK-NEXT: s_wait_loadcnt 0x4 -; CHECK-NEXT: scratch_store_b128 off, v[14:17], s33 offset:164 ; 16-byte Folded Spill ; CHECK-NEXT: s_wait_loadcnt 0x3 -; CHECK-NEXT: scratch_store_b128 off, v[18:21], s33 offset:180 ; 16-byte Folded Spill +; CHECK-NEXT: scratch_store_b128 off, v[14:17], s33 offset:148 ; 16-byte Folded Spill ; CHECK-NEXT: s_wait_loadcnt 0x2 +; CHECK-NEXT: scratch_store_b128 off, v[18:21], s33 offset:164 ; 16-byte Folded Spill +; CHECK-NEXT: s_wait_loadcnt 0x1 +; CHECK-NEXT: scratch_store_b128 off, v[22:25], s33 offset:180 ; 16-byte Folded Spill +; CHECK-NEXT: s_wait_loadcnt 0x0 ; CHECK-NEXT: s_clause 0x4 ; 80-byte Folded Spill -; CHECK-NEXT: scratch_store_b128 off, v[22:25], s33 offset:196 -; CHECK-NEXT: scratch_store_b128 off, v[26:29], s33 offset:212 -; CHECK-NEXT: scratch_store_b128 off, v[30:33], s33 offset:228 -; CHECK-NEXT: scratch_store_b128 off, v[34:37], s33 offset:244 -; CHECK-NEXT: scratch_store_b128 off, v[38:41], s33 offset:260 +; CHECK-NEXT: scratch_store_b128 off, v[26:29], s33 offset:196 +; CHECK-NEXT: scratch_store_b128 off, v[30:33], s33 offset:212 +; CHECK-NEXT: scratch_store_b128 off, v[34:37], s33 offset:228 +; CHECK-NEXT: scratch_store_b128 off, v[38:41], s33 offset:244 +; CHECK-NEXT: scratch_store_b128 off, v[42:45], s33 offset:260 ; CHECK-NEXT: s_clause 0x4 -; CHECK-NEXT: global_load_b128 v[10:13], v[8:9], off offset:48 -; CHECK-NEXT: global_load_b128 v[14:17], v[8:9], off offset:64 -; CHECK-NEXT: global_load_b128 v[18:21], v[8:9], off offset:80 -; CHECK-NEXT: global_load_b128 v[22:25], v[8:9], off offset:96 -; CHECK-NEXT: global_load_b128 v[26:29], v[8:9], off offset:112 +; CHECK-NEXT: global_load_b128 v[14:17], v[12:13], off offset:48 +; CHECK-NEXT: global_load_b128 v[18:21], v[12:13], off offset:64 +; CHECK-NEXT: global_load_b128 v[22:25], v[12:13], off offset:80 +; CHECK-NEXT: global_load_b128 v[26:29], v[12:13], off offset:96 +; CHECK-NEXT: global_load_b128 v[30:33], v[12:13], off offset:112 ; CHECK-NEXT: s_wait_loadcnt 0x4 -; CHECK-NEXT: scratch_store_b128 off, v[10:13], s33 offset:276 ; 16-byte Folded Spill +; CHECK-NEXT: scratch_store_b128 off, v[14:17], s33 offset:276 ; 16-byte Folded Spill ; CHECK-NEXT: s_wait_loadcnt 0x3 -; CHECK-NEXT: scratch_store_b128 off, v[14:17], s33 offset:292 ; 16-byte Folded Spill +; CHECK-NEXT: scratch_store_b128 off, v[18:21], s33 offset:292 ; 16-byte Folded Spill ; CHECK-NEXT: s_wait_loadcnt 0x2 -; CHECK-NEXT: scratch_store_b128 off, v[18:21], s33 offset:308 ; 16-byte Folded Spill +; CHECK-NEXT: scratch_store_b128 off, v[22:25], s33 offset:308 ; 16-byte Folded Spill ; CHECK-NEXT: s_wait_loadcnt 0x1 -; CHECK-NEXT: scratch_store_b128 off, v[22:25], s33 offset:324 ; 16-byte Folded Spill +; CHECK-NEXT: scratch_store_b128 off, v[26:29], s33 offset:324 ; 16-byte Folded Spill ; CHECK-NEXT: s_wait_loadcnt 0x0 ; CHECK-NEXT: s_clause 0x3 ; 64-byte Folded Spill -; CHECK-NEXT: scratch_store_b128 off, v[26:29], s33 offset:340 -; CHECK-NEXT: scratch_store_b128 off, v[30:33], s33 offset:356 -; CHECK-NEXT: scratch_store_b128 off, v[34:37], s33 offset:372 -; CHECK-NEXT: scratch_store_b128 off, v[38:41], s33 offset:388 +; CHECK-NEXT: scratch_store_b128 off, v[30:33], s33 offset:340 +; CHECK-NEXT: scratch_store_b128 off, v[34:37], s33 offset:356 +; CHECK-NEXT: scratch_store_b128 off, v[38:41], s33 offset:372 +; CHECK-NEXT: scratch_store_b128 off, v[42:45], s33 offset:388 +; CHECK-NEXT: v_mov_b32_e32 v31, v92 ; CHECK-NEXT: s_wait_kmcnt 0x0 ; CHECK-NEXT: s_wait_alu depctr_sa_sdst(0) ; CHECK-NEXT: s_swappc_b64 s[30:31], s[0:1] @@ -508,10 +506,10 @@ define <8 x half> @baz() nounwind { ; CHECK-NEXT: scratch_store_b128 off, v[11:14], s32 offset:96 ; CHECK-NEXT: scratch_store_b128 off, v[7:10], s32 offset:80 ; CHECK-NEXT: scratch_store_b128 off, v[3:6], s32 offset:64 -; CHECK-NEXT: v_dual_mov_b32 v4, v88 :: v_dual_mov_b32 v5, v89 -; CHECK-NEXT: v_dual_mov_b32 v6, v90 :: v_dual_mov_b32 v7, v91 -; CHECK-NEXT: v_dual_mov_b32 v8, v76 :: v_dual_mov_b32 v9, v77 -; CHECK-NEXT: v_dual_mov_b32 v10, v78 :: v_dual_mov_b32 v11, v79 +; CHECK-NEXT: v_dual_mov_b32 v4, v76 :: v_dual_mov_b32 v5, v77 +; CHECK-NEXT: v_dual_mov_b32 v6, v78 :: v_dual_mov_b32 v7, v79 +; CHECK-NEXT: v_dual_mov_b32 v8, v72 :: v_dual_mov_b32 v9, v73 +; CHECK-NEXT: v_dual_mov_b32 v10, v74 :: v_dual_mov_b32 v11, v75 ; CHECK-NEXT: v_dual_mov_b32 v12, v60 :: v_dual_mov_b32 v13, v61 ; CHECK-NEXT: v_dual_mov_b32 v14, v62 :: v_dual_mov_b32 v15, v63 ; CHECK-NEXT: v_dual_mov_b32 v16, v108 :: v_dual_mov_b32 v17, v109 @@ -519,8 +517,8 @@ define <8 x half> @baz() nounwind { ; CHECK-NEXT: s_wait_loadcnt 0x1 ; CHECK-NEXT: v_dual_mov_b32 v44, v0 :: v_dual_mov_b32 v45, v1 ; CHECK-NEXT: v_mov_b32_e32 v46, v2 -; CHECK-NEXT: v_dual_mov_b32 v0, v72 :: v_dual_mov_b32 v1, v73 -; CHECK-NEXT: v_dual_mov_b32 v2, v74 :: v_dual_mov_b32 v3, v75 +; CHECK-NEXT: v_dual_mov_b32 v0, v88 :: v_dual_mov_b32 v1, v89 +; CHECK-NEXT: v_dual_mov_b32 v2, v90 :: v_dual_mov_b32 v3, v91 ; CHECK-NEXT: v_mov_b32_e32 v43, v34 ; CHECK-NEXT: v_dual_mov_b32 v42, v33 :: v_dual_mov_b32 v41, v32 ; CHECK-NEXT: v_dual_mov_b32 v40, v31 :: v_dual_mov_b32 v39, v30 diff --git a/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll b/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll index 20789232b1f25..200e4794d0278 100644 --- a/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll +++ b/llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll @@ -257,26 +257,27 @@ define amdgpu_kernel void @v256i8_liveout(ptr addrspace(1) %src1, ptr addrspace( ; GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 ; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34 ; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0 -; GFX942-NEXT: v_lshlrev_b32_e32 v1, 3, v0 -; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0 -; GFX942-NEXT: s_waitcnt lgkmcnt(0) -; GFX942-NEXT: global_load_dwordx4 v[30:33], v1, s[0:1] offset:240 -; GFX942-NEXT: global_load_dwordx4 v[26:29], v1, s[0:1] offset:224 -; GFX942-NEXT: global_load_dwordx4 v[22:25], v1, s[0:1] offset:208 -; GFX942-NEXT: global_load_dwordx4 v[18:21], v1, s[0:1] offset:192 -; GFX942-NEXT: global_load_dwordx4 v[14:17], v1, s[0:1] offset:176 -; GFX942-NEXT: global_load_dwordx4 v[10:13], v1, s[0:1] offset:160 -; GFX942-NEXT: global_load_dwordx4 v[6:9], v1, s[0:1] offset:144 -; GFX942-NEXT: global_load_dwordx4 v[2:5], v1, s[0:1] offset:128 -; GFX942-NEXT: global_load_dwordx4 a[0:3], v1, s[0:1] offset:112 -; GFX942-NEXT: global_load_dwordx4 v[58:61], v1, s[0:1] offset:96 -; GFX942-NEXT: global_load_dwordx4 v[54:57], v1, s[0:1] offset:80 -; GFX942-NEXT: global_load_dwordx4 v[50:53], v1, s[0:1] offset:64 -; GFX942-NEXT: global_load_dwordx4 v[46:49], v1, s[0:1] offset:48 -; GFX942-NEXT: global_load_dwordx4 v[42:45], v1, s[0:1] offset:32 -; GFX942-NEXT: global_load_dwordx4 v[38:41], v1, s[0:1] offset:16 -; GFX942-NEXT: global_load_dwordx4 v[34:37], v1, s[0:1] +; GFX942-NEXT: v_lshlrev_b32_e32 v50, 3, v0 ; GFX942-NEXT: v_mov_b32_e32 v1, 0 +; GFX942-NEXT: s_waitcnt lgkmcnt(0) +; GFX942-NEXT: global_load_dwordx4 v[30:33], v50, s[0:1] offset:240 +; GFX942-NEXT: global_load_dwordx4 v[26:29], v50, s[0:1] offset:224 +; GFX942-NEXT: global_load_dwordx4 v[22:25], v50, s[0:1] offset:208 +; GFX942-NEXT: global_load_dwordx4 v[18:21], v50, s[0:1] offset:192 +; GFX942-NEXT: global_load_dwordx4 v[14:17], v50, s[0:1] offset:176 +; GFX942-NEXT: global_load_dwordx4 v[10:13], v50, s[0:1] offset:160 +; GFX942-NEXT: global_load_dwordx4 v[6:9], v50, s[0:1] offset:144 +; GFX942-NEXT: global_load_dwordx4 v[2:5], v50, s[0:1] offset:128 +; GFX942-NEXT: global_load_dwordx4 v[46:49], v50, s[0:1] offset:112 +; GFX942-NEXT: global_load_dwordx4 v[42:45], v50, s[0:1] offset:96 +; GFX942-NEXT: global_load_dwordx4 v[38:41], v50, s[0:1] offset:80 +; GFX942-NEXT: global_load_dwordx4 v[34:37], v50, s[0:1] offset:64 +; GFX942-NEXT: global_load_dwordx4 a[0:3], v50, s[0:1] offset:48 +; GFX942-NEXT: global_load_dwordx4 v[58:61], v50, s[0:1] offset:32 +; GFX942-NEXT: global_load_dwordx4 v[54:57], v50, s[0:1] offset:16 +; GFX942-NEXT: s_nop 0 +; GFX942-NEXT: global_load_dwordx4 v[50:53], v50, s[0:1] +; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0 ; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc ; GFX942-NEXT: s_cbranch_execz .LBB6_2 ; GFX942-NEXT: ; %bb.1: ; %bb.1 @@ -289,32 +290,32 @@ define amdgpu_kernel void @v256i8_liveout(ptr addrspace(1) %src1, ptr addrspace( ; GFX942-NEXT: global_load_dwordx4 v[10:13], v0, s[2:3] offset:160 ; GFX942-NEXT: global_load_dwordx4 v[6:9], v0, s[2:3] offset:144 ; GFX942-NEXT: global_load_dwordx4 v[2:5], v0, s[2:3] offset:128 -; GFX942-NEXT: global_load_dwordx4 a[0:3], v0, s[2:3] offset:112 -; GFX942-NEXT: global_load_dwordx4 v[58:61], v0, s[2:3] offset:96 -; GFX942-NEXT: global_load_dwordx4 v[54:57], v0, s[2:3] offset:80 -; GFX942-NEXT: global_load_dwordx4 v[50:53], v0, s[2:3] offset:64 -; GFX942-NEXT: global_load_dwordx4 v[46:49], v0, s[2:3] offset:48 -; GFX942-NEXT: global_load_dwordx4 v[42:45], v0, s[2:3] offset:32 -; GFX942-NEXT: global_load_dwordx4 v[38:41], v0, s[2:3] offset:16 -; GFX942-NEXT: global_load_dwordx4 v[34:37], v0, s[2:3] +; GFX942-NEXT: global_load_dwordx4 v[46:49], v0, s[2:3] offset:112 +; GFX942-NEXT: global_load_dwordx4 v[42:45], v0, s[2:3] offset:96 +; GFX942-NEXT: global_load_dwordx4 v[38:41], v0, s[2:3] offset:80 +; GFX942-NEXT: global_load_dwordx4 v[34:37], v0, s[2:3] offset:64 +; GFX942-NEXT: global_load_dwordx4 a[0:3], v0, s[2:3] offset:48 +; GFX942-NEXT: global_load_dwordx4 v[58:61], v0, s[2:3] offset:32 +; GFX942-NEXT: global_load_dwordx4 v[54:57], v0, s[2:3] offset:16 +; GFX942-NEXT: global_load_dwordx4 v[50:53], v0, s[2:3] ; GFX942-NEXT: .LBB6_2: ; %bb.2 ; GFX942-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX942-NEXT: s_waitcnt vmcnt(7) -; GFX942-NEXT: global_store_dwordx4 v1, a[0:3], s[6:7] offset:112 +; GFX942-NEXT: global_store_dwordx4 v1, v[46:49], s[6:7] offset:112 ; GFX942-NEXT: s_waitcnt vmcnt(7) -; GFX942-NEXT: global_store_dwordx4 v1, v[58:61], s[6:7] offset:96 +; GFX942-NEXT: global_store_dwordx4 v1, v[42:45], s[6:7] offset:96 ; GFX942-NEXT: s_waitcnt vmcnt(7) -; GFX942-NEXT: global_store_dwordx4 v1, v[54:57], s[6:7] offset:80 +; GFX942-NEXT: global_store_dwordx4 v1, v[38:41], s[6:7] offset:80 ; GFX942-NEXT: s_waitcnt vmcnt(7) -; GFX942-NEXT: global_store_dwordx4 v1, v[50:53], s[6:7] offset:64 +; GFX942-NEXT: global_store_dwordx4 v1, v[34:37], s[6:7] offset:64 ; GFX942-NEXT: s_waitcnt vmcnt(7) -; GFX942-NEXT: global_store_dwordx4 v1, v[46:49], s[6:7] offset:48 +; GFX942-NEXT: global_store_dwordx4 v1, a[0:3], s[6:7] offset:48 ; GFX942-NEXT: s_waitcnt vmcnt(7) -; GFX942-NEXT: global_store_dwordx4 v1, v[42:45], s[6:7] offset:32 +; GFX942-NEXT: global_store_dwordx4 v1, v[58:61], s[6:7] offset:32 ; GFX942-NEXT: s_waitcnt vmcnt(7) -; GFX942-NEXT: global_store_dwordx4 v1, v[38:41], s[6:7] offset:16 +; GFX942-NEXT: global_store_dwordx4 v1, v[54:57], s[6:7] offset:16 ; GFX942-NEXT: s_waitcnt vmcnt(7) -; GFX942-NEXT: global_store_dwordx4 v1, v[34:37], s[6:7] +; GFX942-NEXT: global_store_dwordx4 v1, v[50:53], s[6:7] ; GFX942-NEXT: global_store_dwordx4 v1, v[30:33], s[6:7] offset:240 ; GFX942-NEXT: global_store_dwordx4 v1, v[26:29], s[6:7] offset:224 ; GFX942-NEXT: global_store_dwordx4 v1, v[22:25], s[6:7] offset:208